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samples: matter: enable dual-bank dfu config for template on nRF54L15
Internal DFU (dual bank) configuration has not been defined in sample.yaml, thus additional configuration has been defined. Internal configuration is an release configuration with enabled LTO to reduce size as much as possibile. Additionaly aligned the pm_static for internal configuration. Signed-off-by: Michał Szablowski <[email protected]>
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samples/matter/template/boards/nrf54l15pdk_nrf54l15_cpuapp_internal.conf
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# | ||
# Copyright (c) 2024 Nordic Semiconductor ASA | ||
# | ||
# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause | ||
# | ||
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# Multirole is the only currently supported role by SoftDevice. | ||
CONFIG_BT_LL_SOFTDEVICE_MULTIROLE=y | ||
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CONFIG_FPU=n | ||
CONFIG_PM=n | ||
CONFIG_HWINFO_NRF=n | ||
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# TODO: Workaround to be removed once Zephyr's CONFIG_FPROTECT is supported on nRF54L | ||
CONFIG_CHIP_FACTORY_DATA_WRITE_PROTECT=n | ||
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# nRF54L15 requires bigger stack sizes than nRF52/nRF53 families | ||
CONFIG_CHIP_MALLOC_SYS_HEAP_SIZE=10240 | ||
CONFIG_MPSL_WORK_STACK_SIZE=2048 | ||
CONFIG_CHIP_TASK_STACK_SIZE=7168 | ||
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# Set the NVS sector count to match the settings partition size that is 40 kB for this application. | ||
CONFIG_SETTINGS_NVS_SECTOR_COUNT=10 | ||
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# Release Configuration | ||
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# Enable system reset on fatal error | ||
CONFIG_RESET_ON_FATAL_ERROR=y | ||
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# Disable all debug features | ||
CONFIG_THREAD_NAME=n | ||
CONFIG_MPU_STACK_GUARD=n | ||
CONFIG_CHIP_LIB_SHELL=n | ||
CONFIG_USE_SEGGER_RTT=n | ||
CONFIG_SHELL=n | ||
CONFIG_OPENTHREAD_SHELL=n | ||
CONFIG_CONSOLE=n | ||
CONFIG_UART_CONSOLE=n | ||
CONFIG_SERIAL=n | ||
CONFIG_LOG=n | ||
CONFIG_LOG_MODE_MINIMAL=n | ||
CONFIG_ASSERT_VERBOSE=n | ||
CONFIG_ASSERT_NO_FILE_INFO=y | ||
CONFIG_PRINTK=n | ||
CONFIG_PRINTK_SYNC=n | ||
CONFIG_THREAD_NAME=n | ||
CONFIG_BOOT_BANNER=n | ||
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# Enable Watchdog | ||
CONFIG_NCS_SAMPLE_MATTER_WATCHDOG=y | ||
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# Enable LTO | ||
CONFIG_LTO=y | ||
CONFIG_ISR_TABLES_LOCAL_DECLARATION=y |
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samples/matter/template/boards/nrf54l15pdk_nrf54l15_cpuapp_internal.overlay
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/* | ||
* Copyright (c) 2024 Nordic Semiconductor ASA | ||
* | ||
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause | ||
*/ | ||
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/ { | ||
aliases { | ||
// Use watchdog wdt31 as the application watchdog | ||
watchdog0 = &wdt31; | ||
}; | ||
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chosen { | ||
nordic,pm-ext-flash = &mx25r64; | ||
}; | ||
}; | ||
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// restore full RRAM and SRAM space - by default some parts are dedicated to FLRP | ||
&cpuapp_rram { | ||
reg = <0x0 DT_SIZE_K(1524)>; | ||
}; | ||
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&cpuapp_sram { | ||
reg = <0x20000000 DT_SIZE_K(256)>; | ||
ranges = <0x0 0x20000000 0x40000>; | ||
}; | ||
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// TODO: re-enable HWFC once it's fixed | ||
&uart20 { | ||
/delete-property/ hw-flow-control; | ||
}; | ||
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&mx25r64 { | ||
status = "okay"; | ||
}; | ||
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&wdt31 { | ||
status = "okay"; | ||
}; |
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