32 registers are defined in RV32I, which are used to store data and addresses. Each register is 32-bit wide.
+----+-------+
| 0 | zero |
| 1 | ra |
| 2 | sp |
| 3 | gp |
| 4 | tp |
+----+-------+
| 5 | t0 |
| 6 | t1 |
| 7 | t2 |
+----+-------+
| 8 | s0/fp |
| 9 | s1 |
+----+-------+
| 10 | a0 |
| 11 | a1 |
| 12 | a2 |
| 13 | a3 |
| 14 | a4 |
| 15 | a5 |
| 16 | a6 |
| 17 | a7 |
+----+-------+
| 18 | s2 |
| 19 | s3 |
| 20 | s4 |
| 21 | s5 |
| 22 | s6 |
| 23 | s7 |
| 24 | s8 |
| 25 | s9 |
| 26 | s10 |
| 27 | s11 |
+----+-------+
| 28 | t3 |
| 29 | t4 |
| 30 | s5 |
| 31 | t6 |
+----+-------+
RV32I basic instruction set is composed of 32-bit instructions. The instruction format is divided into six types: R-Type, I-Type, S-Type,U-Type,J-Type and B-Type. J-Type and B-Type are respectively come from I-Type and S-Type, so we can say that there are four basic types of instructions.
[R-Type]
+-------------------------------------------------------------------------------------------------+
| 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 |
+---------------------+--------------+--------------+--------+--------------+---------------------+
| funct7 | rs2 | rs1 | funct3 | rd | opcode |
+---------------------+--------------+--------------+--------+--------------+---------------------+
[I-Tpye]
+-------------------------------------------------------------------------------------------------+
| 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 |
+------------------------------------+--------------+--------+--------------+---------------------+
| imm_i | rs1 | funct3 | rd | opcode |
+------------------------------------+--------------+--------+--------------+---------------------+
[S-Type]
+-------------------------------------------------------------------------------------------------+
| 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 |
+---------------------+--------------+--------------+--------+--------------+---------------------+
| imm_s(11:5) | rs2 | rs1 | funct3 | imm_s(4:0) | opcode |
+---------------------+--------------+--------------+--------+--------------+---------------------+
[U-Type]
+-------------------------------------------------------------------------------------------------+
| 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 |
+------------------------------------------------------------+--------------+---------------------+
| imm_u(11:5) | rd | opcode |
+------------------------------------------------------------+--------------+---------------------+
[J-Type]
+-------------------------------------------------------------------------------------------------+
| 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 |
+------------------------------------------------------------+--------------+---------------------+
| imm_j(20 + 10:1 + 11 + 19:12) | rd | opcode |
+------------------------------------------------------------+--------------+---------------------+
[B-Type]
+-------------------------------------------------------------------------------------------------+
| 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 |
+---------------------+--------------+--------------+--------+--------------+---------------------+
| imm_b(12 + 10:5) | rs2 | rs1 | funct3 | imm_b(4:1+11)| opcode |
+---------------------+--------------+--------------+--------+--------------+---------------------+