From a6d9e712d996d1b02e46c0f1a615c757326019e2 Mon Sep 17 00:00:00 2001 From: Joo Liang Cheah Date: Fri, 19 Apr 2024 00:08:05 +0800 Subject: [PATCH] Reorganize examples to folders (#565) --- examples/{ => analog_in}/ai_multi_task_pxie_ref_clk.py | 0 examples/{ => analog_in}/ai_raw.py | 0 examples/{ => analog_in}/ai_voltage_sw_timed.py | 0 examples/{ => analog_out}/ao_voltage_hw_timed.py | 0 examples/{ => analog_out}/ao_voltage_sw_timed.py | 0 examples/{ => counter_in}/ci_count_edges.py | 0 examples/{ => counter_in}/ci_pulse_freq.py | 0 examples/{ => counter_out}/co_pulse_time.py | 0 examples/{ => digital_in}/di_sw_timed.py | 0 examples/{ => digital_out}/do_sw_timed.py | 0 10 files changed, 0 insertions(+), 0 deletions(-) rename examples/{ => analog_in}/ai_multi_task_pxie_ref_clk.py (100%) rename examples/{ => analog_in}/ai_raw.py (100%) rename examples/{ => analog_in}/ai_voltage_sw_timed.py (100%) rename examples/{ => analog_out}/ao_voltage_hw_timed.py (100%) rename examples/{ => analog_out}/ao_voltage_sw_timed.py (100%) rename examples/{ => counter_in}/ci_count_edges.py (100%) rename examples/{ => counter_in}/ci_pulse_freq.py (100%) rename examples/{ => counter_out}/co_pulse_time.py (100%) rename examples/{ => digital_in}/di_sw_timed.py (100%) rename examples/{ => digital_out}/do_sw_timed.py (100%) diff --git a/examples/ai_multi_task_pxie_ref_clk.py b/examples/analog_in/ai_multi_task_pxie_ref_clk.py similarity index 100% rename from examples/ai_multi_task_pxie_ref_clk.py rename to examples/analog_in/ai_multi_task_pxie_ref_clk.py diff --git a/examples/ai_raw.py b/examples/analog_in/ai_raw.py similarity index 100% rename from examples/ai_raw.py rename to examples/analog_in/ai_raw.py diff --git a/examples/ai_voltage_sw_timed.py b/examples/analog_in/ai_voltage_sw_timed.py similarity index 100% rename from examples/ai_voltage_sw_timed.py rename to examples/analog_in/ai_voltage_sw_timed.py diff --git a/examples/ao_voltage_hw_timed.py b/examples/analog_out/ao_voltage_hw_timed.py similarity index 100% rename from examples/ao_voltage_hw_timed.py rename to examples/analog_out/ao_voltage_hw_timed.py diff --git a/examples/ao_voltage_sw_timed.py b/examples/analog_out/ao_voltage_sw_timed.py similarity index 100% rename from examples/ao_voltage_sw_timed.py rename to examples/analog_out/ao_voltage_sw_timed.py diff --git a/examples/ci_count_edges.py b/examples/counter_in/ci_count_edges.py similarity index 100% rename from examples/ci_count_edges.py rename to examples/counter_in/ci_count_edges.py diff --git a/examples/ci_pulse_freq.py b/examples/counter_in/ci_pulse_freq.py similarity index 100% rename from examples/ci_pulse_freq.py rename to examples/counter_in/ci_pulse_freq.py diff --git a/examples/co_pulse_time.py b/examples/counter_out/co_pulse_time.py similarity index 100% rename from examples/co_pulse_time.py rename to examples/counter_out/co_pulse_time.py diff --git a/examples/di_sw_timed.py b/examples/digital_in/di_sw_timed.py similarity index 100% rename from examples/di_sw_timed.py rename to examples/digital_in/di_sw_timed.py diff --git a/examples/do_sw_timed.py b/examples/digital_out/do_sw_timed.py similarity index 100% rename from examples/do_sw_timed.py rename to examples/digital_out/do_sw_timed.py