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‎.gitignore

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*.tar

‎FPGA_Accelerator/FDTD_TEz/.gitignore

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build
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.vscode
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*.log
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.ipcache
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*.json
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to_aws/

‎FPGA_Accelerator/FDTD_TEz/Makefile

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################################################################################
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# this file was created by alfred. Do not trust it.
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#
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# tool chain path
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XILINX_VITIS ?= /tools/Xilinx/Vitis/2021.2
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XILINX_XRT ?= /opt/xilinx/xrt
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XILINX_VIVADO ?= /tools/Xilinx/Vivado/2021.2
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XILINX_HLS_INCLUDES ?= /tools/Xilinx/Vitis_HLS/2021.2/include
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# Platform path
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VITIS_PLATFORM = xilinx_aws-vu9p-f1_shell-v04261818_201920_3
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VITIS_PLATFORM_DIR = /home/alfred/Projects/Vitis/aws-fpga/Vitis/aws_platform/xilinx_aws-vu9p-f1_shell-v04261818_201920_3
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VITIS_PLATFORM_PATH = $(VITIS_PLATFORM_DIR)/xilinx_aws-vu9p-f1_shell-v04261818_201920_3.xpfm
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# Project Name
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PRJ_NAME ?= FDTD
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TARGET ?= hw_emu
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# Host source files
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HOST_SRC_DIR ?= host_src
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HOST_SRC += $(HOST_SRC_DIR)/host.cpp
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# Kernel Source Path, do not modify
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KERNEL_O_DIR ?= build/vitis_hls
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KERNEL_SRC_DIR ?= kernel_src
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# Kernel to build
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HW_KERNEL_OBJS += $(KERNEL_O_DIR)/FDTD_Kernel.xo
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# set kernel frequency if necessary
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KERNEL_EXT_CONFIG += --kernel_frequency
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KERNEL_EXT_CONFIG += 125
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# Bit Container Linker Configuration, edit independently
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BC_CONFIG += $(KERNEL_SRC_DIR)/linker.cfg
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################################################################################
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################# do not modify contents below if not necessary ################
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################################################################################
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VPP_OPTS = --target $(TARGET)
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# compiler tools
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VPP_LINKER ?= ${XILINX_VITIS}/bin/v++
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VPP ?= ${XILINX_VITIS}/bin/v++
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HOST_CXX ?= g++
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RM = rm -f
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RMDIR = rm -rf
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#
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# host complie flags
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CXXFLAGS += -std=c++1y -DVITIS_PLATFORM=$(VITIS_PLATFORM) -D__USE_XOPEN2K8 -I$(XILINX_XRT)/include/ -I$(XILINX_HLS_INCLUDES)/ -O2 -g -Wall -c -fmessage-length=0
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LDFLAGS += -luuid -lxrt_coreutil -lxilinxopencl -lpthread -lrt -lstdc++ -L$(XILINX_XRT)/lib/ -Wl,-rpath-link,$(XILINX_XRT)/lib
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BUILD_SUBDIRS += build
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BINARY_CONTAINER += build/vivado/bit_container.xclbin
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HOST_OBJ += build/host/host.o
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HOST_EXE = build/host/$(PRJ_NAME)
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LOG_DIR ?= build/logs
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REPORT_DIR ?= build/reports
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RUN_EXE ?= $(PRJ_NAME)
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RUN_BIN ?= bit_container.xclbin
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KERNEL_EXT_CONFIG += --platform
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KERNEL_EXT_CONFIG += $(VITIS_PLATFORM_PATH)
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KERNEL_EXT_CONFIG += --temp_dir
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KERNEL_EXT_CONFIG += build/vitis_hls
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KERNEL_EXT_CONFIG += --log_dir
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KERNEL_EXT_CONFIG += $(LOG_DIR)
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KERNEL_EXT_CONFIG += --report_dir
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KERNEL_EXT_CONFIG += $(REPORT_DIR)
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KERNEL_EXT_CONFIG += -s
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KERNEL_EXT_CONFIG += -g
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LINK_EXT_CONFIG += --temp_dir
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LINK_EXT_CONFIG += build/vivado
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#
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# primary build targets
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#
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.PHONY: all clean host kernel link run
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all: $(HW_KERNEL_OBJS) $(BINARY_CONTAINER) $(HOST_EXE)
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-@cp $(HOST_EXE) ./
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-@cp $(BINARY_CONTAINER) ./
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host: $(HOST_EXE)
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kernel: $(HW_KERNEL_OBJS)
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link: $(BINARY_CONTAINER)
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run: $(RUN_EXE) $(RUN_BIN) emconfig.json
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export XCL_EMULATION_MODE=$(TARGET) && ./$(RUN_EXE) $(RUN_BIN)
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$(RUN_EXE): $(HOST_EXE)
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-@cp $(HOST_EXE) ./
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$(RUN_BIN): $(BINARY_CONTAINER)
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-@cp $(BINARY_CONTAINER) ./
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clean:
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-$(RM) $(HW_KERNEL_OBJS) $(BINARY_CONTAINER) *.log *.mdb
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-$(RMDIR) $(BUILD_SUBDIRS)
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-$(RMDIR) .Xil
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-$(RM) *.json
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-$(RM) $(RUN_EXE)
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-$(RM) $(RUN_BIN)
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-$(RMDIR) .run
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-$(RMDIR) .ipcache
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.PHONY: incremental
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incremental: all
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nothing:
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# build kernels first, automatic build all kernels
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$(KERNEL_O_DIR)/%.xo: $(KERNEL_SRC_DIR)/%.cpp
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-@mkdir -p $(@D)
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-@mkdir -p $(LOG_DIR)
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-@mkdir -p $(REPORT_DIR)
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-@$(RM) $@
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$(VPP) $(VPP_OPTS) --compile -I"$(<D)" --kernel $(basename $(@F)) --advanced.misc solution_name=$(basename $(@F)) $(KERNEL_EXT_CONFIG) -o"$@" "$<"
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# link project secondly
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$(BINARY_CONTAINER): $(HW_KERNEL_OBJS) $(BC_CONFIG)
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-@mkdir -p $(@D)
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$(VPP_LINKER) $(VPP_OPTS) --link --platform $(VITIS_PLATFORM_PATH) --config $(BC_CONFIG) --temp_dir build/vivado --log_dir $(LOG_DIR) --report_dir $(REPORT_DIR) -R2 -o"$@" $(HW_KERNEL_OBJS)
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# bulid host finally
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$(HOST_EXE): $(HOST_OBJ)
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-@mkdir -p $(@D)
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$(HOST_CXX) -o "$@" $(+) $(LDFLAGS)
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$(HOST_OBJ): $(HOST_SRC)
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-@mkdir -p $(@D)
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$(HOST_CXX) $(CXXFLAGS) -o "$@" "$<"
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emconfig.json:
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-@emconfigutil --platform $(VITIS_PLATFORM_PATH)
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‎FPGA_Accelerator/FDTD_TEz/README.md

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# Vitis_Make
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This make file use xilinx v++ tool to build hls kernels, link the kernels and run sw/hw emulation. It is required to set correct vitis platform path in the makefile and specify the project name and kernels to build.
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To use the tool correctly:
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1. The cpp file that contains the kenrel to build must have the same name with the kernel. For example, if the kernel function name is 'func', its source file must be named as 'func.cpp'
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2. The project name must be specified in the Makefile.
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3. The kernel targets must be specified in the Makefile.
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4. The linker.cfg in kernel_src folder must be edit before building the 'link'. The syntax to write link file (especially [connectivity]) can be found online.[Xilinx --connectivity](https://docs.xilinx.com/r/en-US/ug1393-vitis-application-acceleration/connectivity-Options)
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5. Before running the emulation, you must source Xilinx Vitis settings and Xilinx XRT settings. Source (shell run 'source <filename>') the setup_xrt.sh in the folder may help (you have to specify your path in setup_xrt.sh).
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To run, simply type:
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```shell
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make <target> -j<threads_allowed>
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```
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For example, if you want build kernels with 8 threads in parallel, run:
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```shell
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make kernel -j8
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```
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If you have multiple kernels to build, it is suggested to use as many threads as possible. The maximum number should not exceed the physical number of threads of you computer of course.
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# Targets
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## all (default target)
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Build kernels, link kernels, build host program and copy them to the current folder.
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## kernels
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Build kernels. The new kernels are saved in the ./build/vitis_hls. The temporay hls projects are also saved there so that they can be opend with GUI and you can check the scheduling and debuging the kernel.
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## link
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Link the kernels. The linker file ./kernel_src/linker.cfg shall be edit beforehead. The xclbin will be generated in ./build/vivado. Build link will trigger build the kernels if the kernels haven't been build before.
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## host
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Just build the host excutable file. It does not depend on any other objects.
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## run
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Run the emulation (directly on hardware is not supported, it is designed for AWS). It depends on the excutable file and binary container that in the current folder. If the host and link have been build, the files will be copied to the current folder; if not, it triggers all compiling.
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## clean
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Clean up the project. Be careful.
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‎FPGA_Accelerator/FDTD_TEz/host_src/host.cpp

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#include <xrt/xrt_kernel.h>
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#include <xrt/xrt_bo.h>
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#include <math.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <unistd.h>
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#define M 20
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#define N 20
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#define T 80
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int main(int argc, char** argv) {
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FILE* fp;
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if (argc < 2) {
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std::cout << "Usage: " << argv[0] << " <XCLBIN File>" << std::endl;
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return EXIT_FAILURE;
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}
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std::string binaryFile = argv[1];
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const int T_val = T;
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const int M_val = M;
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printf("[Process]\tEmulation starts!\n");
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printf("[Info.]\tTotal time steps:\t%d\n", T);
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printf("[Info.]\tUse DC source for test!\n");
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printf("[Process]\tStart allocating vectors...\n");
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float source[T];
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float C[M][N];
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float Ca[M][N];
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float out_f1[T];
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float out_f2[T];
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int src_row = 11;
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int src_col = 11;
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int det_f1_row = 16;
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int det_f1_col = 16;
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int det_f2_row = 16;
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int det_f2_col = 16;
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printf("[Process]\tFinish allocating vectors!\n");
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printf("[Process]\tStart loading matrixes and vectors...\n");
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fp = fopen("/home/michelle/Projects/Matlab/FDTD/C.txt","r");
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if (fp == NULL){
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printf("[Error]\tFaild to load txt file!\n");
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printf("[Error]\tBreak simulation!\n");
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return 0 ;
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}
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printf("[Process]\tReading C...\n");
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for(int i = 0;i < M;i++){
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for(int j = 0; j < N; j++){
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// fscanf(fp,"%f",&C[i][j]);
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C[i][j] = 1;
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printf("%.4f\n",C[i][j]);
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}
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}
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fclose(fp);
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fp = fopen("/home/michelle/Projects/Matlab/FDTD/Ca.txt","r");
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printf("[Process]\tReading Ca...\n");
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for(int i = 0;i < M;i++){
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for(int j = 0; j < N; j++){
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// fscanf(fp,"%f",&Ca[i][j]);
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Ca[i][j] = 0.4901;
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printf("%.4f\n",Ca[i][j]);
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}
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}
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fclose(fp);
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printf("[Process]\tReading source...\n");
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for(int t = 0; t < T; t++){
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source[t] = sin(2 * 3.14159 * (t+1) * 0.0115);
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printf("%.4f\n",source[t]);
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}
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printf("[Process]\tSoftware initialization done!\n\n");
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printf("[Process]\tRun hardware initialization...\n\n");
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int device_id = 0;
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std::cout << "\tOpen the device" << device_id << std::endl;
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auto device = xrt::device(device_id);
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std::cout << "\tLoad the xclbin " << binaryFile << std::endl;
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auto uuid = device.load_xclbin(binaryFile);
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// Connect to kernels
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printf("[Process]\tConnect to %s kernel...\n", "FDTD_Kernel");
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auto FDTD_Kernel = xrt::kernel(device, uuid, "FDTD_Kernel");
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//allocate buffer
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std::cout << "[Process]\tAllocate Buffer in Global Memory...\n";
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printf("[Process]\tAllocate %s buffer...\n","out_f1");
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auto bo_out_f1 = xrt::bo(device, sizeof(out_f1), FDTD_Kernel.group_id(0));
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printf("[Process]\tAllocate %s buffer...\n","out_f2");
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auto bo_out_f2 = xrt::bo(device, sizeof(out_f2), FDTD_Kernel.group_id(1));
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printf("[Process]\tAllocate %s buffer...\n","source");
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auto bo_src = xrt::bo(device, sizeof(source), FDTD_Kernel.group_id(2));
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printf("[Process]\tAllocate %s buffer...\n","C");
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auto bo_C = xrt::bo(device, sizeof(C), FDTD_Kernel.group_id(3));
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printf("[Process]\tAllocate %s buffer...\n","Ca");
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auto bo_Ca = xrt::bo(device, sizeof(Ca), FDTD_Kernel.group_id(4));
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// Allocate Buffer in Global Memory
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bo_src.write(source);
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bo_src.sync(XCL_BO_SYNC_BO_TO_DEVICE);
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bo_C.write(C);
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bo_C.sync(XCL_BO_SYNC_BO_TO_DEVICE);
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bo_Ca.write(Ca);
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bo_Ca.sync(XCL_BO_SYNC_BO_TO_DEVICE);
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auto FDTD_Kernel_run = xrt::run(FDTD_Kernel);
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FDTD_Kernel_run.set_arg(0, bo_out_f1);
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FDTD_Kernel_run.set_arg(1, bo_out_f2);
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FDTD_Kernel_run.set_arg(2, bo_src);
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FDTD_Kernel_run.set_arg(3, bo_C);
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FDTD_Kernel_run.set_arg(4, bo_Ca);
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FDTD_Kernel_run.set_arg(5, T_val);
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FDTD_Kernel_run.set_arg(6, M_val);
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FDTD_Kernel_run.set_arg(7, src_row);
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FDTD_Kernel_run.set_arg(8, src_col);
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FDTD_Kernel_run.set_arg(9, det_f1_row);
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FDTD_Kernel_run.set_arg(10, det_f1_col);
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FDTD_Kernel_run.set_arg(11, det_f2_row);
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FDTD_Kernel_run.set_arg(12, det_f2_col);
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printf("[Process]\tHardware initialization done!\n\n");
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printf("[Process]\tStart writing matrixes to hardware...\n");
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std::cout << "[Process]\tFinished writing!" << std::endl;
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printf("[Process]\tStart simulation...\n");
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for (int tt = 0; tt < 2; tt++){
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printf("\tRound %d...",tt+1);
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FDTD_Kernel_run.start();
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// wait
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FDTD_Kernel_run.wait();
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std::cout << "[Process]\t\tupdate finished!" << std::endl;
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std::cout << "[Process]\t\tback finished!" << std::endl;
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std::cout << "[Process]\t\tobserver finished!" << std::endl;
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std::cout << "[Process]\tFinished one round!" << std::endl;
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bo_out_f1.sync(XCL_BO_SYNC_BO_FROM_DEVICE);
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bo_out_f1.read(out_f1);
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bo_out_f2.sync(XCL_BO_SYNC_BO_FROM_DEVICE);
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bo_out_f2.read(out_f2);
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usleep(10000);
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char fname[256];
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sprintf(fname, "/home/michelle/Projects/Vitis/FDTD_Vitis/Test/FDTD_S2_make/res_%d.txt", tt);
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fp = fopen(fname,"w");
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if (fp == NULL){
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printf("[Error]\tCannot open res.txt! Break!\n");
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return 0;
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}
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for (int t = 0; t < T; t++){
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fprintf(fp,"%.4f\t",out_f1[t]);
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fprintf(fp,"%.4f\t",out_f2[t]);
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fprintf(fp,"\n");
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out_f1[t] = -1;
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out_f2[t] = -1;
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}
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fclose(fp);
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}
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std::cout << "[Process]\tFinished simulation!" << std::endl;
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printf("[Process]\tWriting final result to res.txt!\n");
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printf("[Process]\tHost program finished!\n");
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return EXIT_SUCCESS;
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}

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