From 6990badc6902cf70d2702e5618d7f935bcadaaf2 Mon Sep 17 00:00:00 2001 From: Brendan <2bndy5@gmail.com> Date: Mon, 15 Jul 2024 04:00:56 -0700 Subject: [PATCH] replace `reg | R_REGISTER` with just `reg` `R_REGISTER` is defined as 0. `reg | 0` always results in `reg` --- RF24.cpp | 4 ++-- examples/rf24_ATTiny/timingSearch3pin/timingSearch3pin.ino | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/RF24.cpp b/RF24.cpp index c1df5fd32..d226cbcad 100644 --- a/RF24.cpp +++ b/RF24.cpp @@ -154,7 +154,7 @@ void RF24::read_register(uint8_t reg, uint8_t* buf, uint8_t len) uint8_t* ptx = spi_txbuff; uint8_t size = static_cast(len + 1); // Add register value to transmit buffer - *ptx++ = (R_REGISTER | reg); + *ptx++ = reg; while (len--) { *ptx++ = RF24_NOP; // Dummy operation, just for reading @@ -206,7 +206,7 @@ uint8_t RF24::read_register(uint8_t reg) uint8_t* prx = spi_rxbuff; uint8_t* ptx = spi_txbuff; - *ptx++ = (R_REGISTER | reg); + *ptx++ = reg; *ptx++ = RF24_NOP; // Dummy operation, just for reading #if defined(RF24_RP2) diff --git a/examples/rf24_ATTiny/timingSearch3pin/timingSearch3pin.ino b/examples/rf24_ATTiny/timingSearch3pin/timingSearch3pin.ino index d554c0452..c2b79b3a6 100644 --- a/examples/rf24_ATTiny/timingSearch3pin/timingSearch3pin.ino +++ b/examples/rf24_ATTiny/timingSearch3pin/timingSearch3pin.ino @@ -79,7 +79,7 @@ void csn(bool mode) { /****************************************************************************/ uint8_t read_register(uint8_t reg) { csn(LOW); - SPI.transfer(R_REGISTER | reg); + SPI.transfer(reg); uint8_t result = SPI.transfer(0xff); csn(HIGH); return result;