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Senso.qsf
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# -------------------------------------------------------------------------- #
#
# Copyright (C) 2019 Intel Corporation. All rights reserved.
# Your use of Intel Corporation's design tools, logic functions
# and other software and tools, and any partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Intel Program License
# Subscription Agreement, the Intel Quartus Prime License Agreement,
# the Intel FPGA IP License Agreement, or other applicable license
# agreement, including, without limitation, that your use is for
# the sole purpose of programming logic devices manufactured by
# Intel and sold by Intel or its authorized distributors. Please
# refer to the applicable agreement for further details, at
# https://fpgasoftware.intel.com/eula.
#
# -------------------------------------------------------------------------- #
#
# Quartus Prime
# Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition
# Date created = 17:44:37 November 13, 2019
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# Senso_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus Prime software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
set_global_assignment -name FAMILY "Cyclone V"
set_global_assignment -name DEVICE 5CGXFC5C6F27C7
set_global_assignment -name TOP_LEVEL_ENTITY senso
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 19.1.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:44:37 NOVEMBER 13, 2019"
set_global_assignment -name LAST_QUARTUS_VERSION "19.1.0 Lite Edition"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_timing
set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_symbol
set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_signal_integrity
set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_boundary_scan
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name EDA_TEST_BENCH_ENABLE_STATUS TEST_BENCH_MODE -section_id eda_simulation
set_global_assignment -name EDA_NATIVELINK_SIMULATION_TEST_BENCH testbench_1 -section_id eda_simulation
set_global_assignment -name EDA_TEST_BENCH_NAME testbench_1 -section_id eda_simulation
set_global_assignment -name EDA_DESIGN_INSTANCE_NAME NA -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME tb -section_id testbench_1
set_global_assignment -name EDA_USER_COMPILED_SIMULATION_LIBRARY_DIRECTORY "<None>" -section_id eda_simulation
set_global_assignment -name EDA_MAINTAIN_DESIGN_HIERARCHY ON -section_id eda_simulation
set_global_assignment -name VHDL_FILE timer_behav.vhd
set_global_assignment -name VHDL_FILE timer_entity.vhd
set_global_assignment -name VHDL_FILE counter_entity.vhd
set_global_assignment -name VHDL_FILE counter_behav.vhd
set_global_assignment -name VHDL_FILE galois_entity.vhd
set_global_assignment -name VHDL_FILE galois_behav.vhd
set_global_assignment -name VHDL_FILE input_entity.vhd
set_global_assignment -name VHDL_FILE input_behav.vhd
set_global_assignment -name VHDL_FILE button_behav.vhd
set_global_assignment -name VHDL_FILE button_entity.vhd
set_global_assignment -name VHDL_FILE senso_entity.vhd
set_global_assignment -name VHDL_FILE clk_res_gen_entity.vhd
set_global_assignment -name VHDL_FILE clk_res_gen_behav.vhd
set_global_assignment -name VHDL_FILE tb_entity.vhd
set_global_assignment -name VHDL_FILE tb_struct.vhd
set_global_assignment -name VHDL_FILE tester_input_entity.vhd
set_global_assignment -name VHDL_FILE tester_input_behav.vhd
set_global_assignment -name VHDL_FILE tester_timer_entity.vhd
set_global_assignment -name VHDL_FILE tester_timer_behav.vhd
set_global_assignment -name VHDL_FILE output_entity.vhd
set_global_assignment -name VHDL_FILE output_behav.vhd
set_global_assignment -name VHDL_FILE control_entity.vhd
set_global_assignment -name VHDL_FILE control_behav.vhd
set_global_assignment -name VHDL_FILE senso_struct.vhd
set_global_assignment -name EDA_TEST_BENCH_FILE button_entity.vhd -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_FILE button_behav.vhd -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_FILE clk_res_gen_entity.vhd -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_FILE clk_res_gen_behav.vhd -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_FILE control_entity.vhd -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_FILE control_behav.vhd -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_FILE counter_entity.vhd -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_FILE counter_behav.vhd -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_FILE galois_entity.vhd -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_FILE galois_behav.vhd -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_FILE input_entity.vhd -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_FILE input_behav.vhd -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_FILE output_entity.vhd -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_FILE output_behav.vhd -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_FILE tester_input_entity.vhd -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_FILE tester_input_behav.vhd -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_FILE timer_entity.vhd -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_FILE timer_behav.vhd -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_FILE senso_entity.vhd -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_FILE senso_struct.vhd -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_FILE tb_entity.vhd -section_id testbench_1
set_global_assignment -name EDA_TEST_BENCH_FILE tb_struct.vhd -section_id testbench_1
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_instance_assignment -name IO_STANDARD "1.2 V" -to key_in_n_int[3]
set_instance_assignment -name IO_STANDARD "1.2 V" -to key_in_n_int[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to clk
set_instance_assignment -name IO_STANDARD "1.2 V" -to key_in_n_int[1]
set_instance_assignment -name IO_STANDARD "1.2 V" -to key_in_n_int[0]
set_instance_assignment -name IO_STANDARD "1.2 V" -to key_in_n_int
set_instance_assignment -name IO_STANDARD "2.5 V" -to leds_int[3]
set_instance_assignment -name IO_STANDARD "2.5 V" -to leds_int[2]
set_location_assignment PIN_Y16 -to key_in_n_int[3]
set_location_assignment PIN_P11 -to key_in_n_int[0]
set_location_assignment PIN_P12 -to key_in_n_int[1]
set_location_assignment PIN_Y15 -to key_in_n_int[2]
set_location_assignment PIN_A5 -to leds_int[2]
set_location_assignment PIN_L7 -to leds_int[0]
set_location_assignment PIN_D8 -to leds_int[1]
set_location_assignment PIN_H8 -to leds_int[3]
set_location_assignment PIN_AB24 -to res_n
set_location_assignment PIN_AF24 -to score_high_int[0]
set_location_assignment PIN_AC19 -to score_high_int[1]
set_location_assignment PIN_AE25 -to score_high_int[2]
set_location_assignment PIN_AE26 -to score_high_int[3]
set_location_assignment PIN_AB19 -to score_high_int[4]
set_location_assignment PIN_AD26 -to score_high_int[5]
set_location_assignment PIN_AA18 -to score_high_int[6]
set_location_assignment PIN_Y18 -to score_low_int[0]
set_location_assignment PIN_Y19 -to score_low_int[1]
set_location_assignment PIN_Y20 -to score_low_int[2]
set_location_assignment PIN_W18 -to score_low_int[3]
set_location_assignment PIN_V17 -to score_low_int[4]
set_location_assignment PIN_V18 -to score_low_int[5]
set_location_assignment PIN_V19 -to score_low_int[6]
set_location_assignment PIN_R20 -to clk
set_instance_assignment -name IO_STANDARD "1.2 V" -to score_low_int[0]
set_instance_assignment -name IO_STANDARD "1.2 V" -to score_low_int[1]
set_instance_assignment -name IO_STANDARD "1.2 V" -to score_low_int[3]
set_instance_assignment -name IO_STANDARD "1.2 V" -to score_low_int[2]
set_instance_assignment -name IO_STANDARD "1.2 V" -to score_low_int[4]
set_instance_assignment -name IO_STANDARD "1.2 V" -to score_high_int[0]
set_instance_assignment -name IO_STANDARD "1.2 V" -to score_high_int[2]
set_instance_assignment -name IO_STANDARD "1.2 V" -to score_low_int[5]
set_instance_assignment -name IO_STANDARD "1.2 V" -to score_low_int[6]
set_instance_assignment -name IO_STANDARD "1.2 V" -to score_low_int
set_instance_assignment -name IO_STANDARD "1.2 V" -to score_high_int[1]
set_instance_assignment -name IO_STANDARD "1.2 V" -to score_high_int[3]
set_instance_assignment -name IO_STANDARD "1.2 V" -to score_high_int[4]
set_instance_assignment -name IO_STANDARD "1.2 V" -to score_high_int[5]
set_instance_assignment -name IO_STANDARD "1.2 V" -to score_high_int[6]
set_instance_assignment -name IO_STANDARD "1.2 V" -to score_high_int
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to res_n
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top