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TxElecIdle should be de-asserted at the same clock cycle the first TS in the Polling state starts to be transmitted #61

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MohamedAli25 opened this issue Jun 15, 2021 · 3 comments
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Design Issue regarding the design team implementation issues

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@MohamedAli25
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Steps:

  • Compile and run the code
  • In the Polling state:
  • the TxElecIdle is de-asserted at time 27ns while it should get de-asserted at 35ns with the first symbol of the first TS being sent

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@MohamedAli25 MohamedAli25 added the Design Issue regarding the design team implementation issues label Jun 15, 2021
@nerm-osama
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please consider this as design limitation , won't be fixed

@usfkotb
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usfkotb commented Jul 14, 2021

@mtantawi24 Please take a look at this and confirm

@mtantawi24
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@nerm-osama please provide a fix for this issue

@mtantawi24 mtantawi24 reopened this Jul 15, 2021
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9 participants