Run the evaluation with ./run-sancus-eval.sh.
This will produce two simulation outputs, the first one runs on the unchanged Sancus core, which will result in a memory violation (stopping the attack).
The second one runs after disabling the PC buffering, showing a successful overwrite of enclave values.
+ cd sancus-core
+ mkdir -p build
+ cd build/
+ cmake ..
-- Configuring done
-- Generating done
-- Build files have been written to: /home/jo/Documents/ipe-exposure/04_sancus_exploit/sancus-core/build
+ cd ..
+ ./core/sim/rtl_sim/run/run ../../../../../call_exploit
Cleanup...
=======================================================
| Start simulation: ../../../../../call_exploit
=======================================================
Seed: 679754580
Compile, link & generate IHEX file (Program Memory: 41984 B, Data Memory: 16384 B, Peripheral Space: 512 B)...
$ msp430-as -I ../src/sancus -alsm pmem.s43 -o pmem.o > pmem.l43
$ msp430-objdump -xdsStr pmem.o >> pmem.l43
$ msp430-ld -T ./pmem.x pmem.o -o pmem.elf
$ msp430-objcopy -O ihex pmem.elf pmem.ihex
Convert IHEX file to Verilog MEMH format...
Start Verilog simulation...
=== Spongent parameters ===
Rate: 18
State size: 176
===========================
=== SpongeWrap parameters ===
Rate: 16
Security: 64
Blocks in key: 4
=============================
=== File I/O ===
================
===============================================
START SIMULATION |
===============================================
VCD info: dumpfile tb_openMSP430.vcd opened for output.
waiting for foo entry..
New SM 1 config: 5c34 5c36 0262 0268, 0
Vendor key: e3077c6a4e4c0cd9
SM key: b4b6e25fc02191e5
[SM 1] mem violation @0x0262 from 0x5c30
===============================================
| SIMULATION FAILED |
| (the verilog stimulus didn't complete) |
===============================================
DMA REPORT: Total Accesses: 1206 Total RD: 413 Total WR: 793
Total Errors: 0 Error RD: 0 Error WR: 0
SIMULATION SEED: 679754580
+ git apply ../make-vulnerable.patch
+ ./core/sim/rtl_sim/run/run ../../../../../call_exploit
Cleanup...
=======================================================
| Start simulation: ../../../../../call_exploit
=======================================================
Seed: 1756831835
Compile, link & generate IHEX file (Program Memory: 41984 B, Data Memory: 16384 B, Peripheral Space: 512 B)...
$ msp430-as -I ../src/sancus -alsm pmem.s43 -o pmem.o > pmem.l43
$ msp430-objdump -xdsStr pmem.o >> pmem.l43
$ msp430-ld -T ./pmem.x pmem.o -o pmem.elf
$ msp430-objcopy -O ihex pmem.elf pmem.ihex
Convert IHEX file to Verilog MEMH format...
Start Verilog simulation...
=== Spongent parameters ===
Rate: 18
State size: 176
===========================
=== SpongeWrap parameters ===
Rate: 16
Security: 64
Blocks in key: 4
=============================
=== File I/O ===
================
===============================================
START SIMULATION |
===============================================
VCD info: dumpfile tb_openMSP430.vcd opened for output.
waiting for foo entry..
New SM 1 config: 5c34 5c36 0262 0268, 0
Vendor key: e3077c6a4e4c0cd9
SM key: b4b6e25fc02191e5
ERROR: ====== attacker successfully changed protected value ====== 1051750
===============================================
| SIMULATION FAILED |
| (some verilog stimulus checks failed) |
===============================================
DMA REPORT: Total Accesses: 1183 Total RD: 387 Total WR: 796
Total Errors: 0 Error RD: 0 Error WR: 0
SIMULATION SEED: 1756831835
+ git checkout .
Updated 4 paths from the index