forked from TILOS-AI-Institute/MacroPlacement
-
Notifications
You must be signed in to change notification settings - Fork 0
/
gen_macro_place_def.tcl
76 lines (59 loc) · 2.42 KB
/
gen_macro_place_def.tcl
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
# This script was written and developed by ABKGroup students at UCSD. However, the underlying commands and reports are copyrighted by Cadence.
# We thank Cadence for granting permission to share our research to help promote and foster the next generation of innovators.
source lib_setup.tcl
source design_setup.tcl
set handoff_dir $::env(SYN_HANDOFF)
set netlist ${handoff_dir}/${DESIGN}.v
set sdc ${handoff_dir}/${DESIGN}.sdc
source mmmc_setup.tcl
setMultiCpuUsage -localCpu 16
set util 0.3
# default settings
set init_pwr_net VDD
set init_gnd_net VSS
# default settings
set init_verilog "$netlist"
set init_design_netlisttype "Verilog"
set init_design_settop 1
set init_top_cell "$DESIGN"
set init_lef_file "$lefs"
# MCMM setup
init_design -setup {WC_VIEW} -hold {BC_VIEW}
set_power_analysis_mode -leakage_power_view WC_VIEW -dynamic_power_view WC_VIEW
set_interactive_constraint_modes {CON}
setAnalysisMode -reset
setAnalysisMode -analysisType onChipVariation -cppr both
clearGlobalNets
globalNetConnect VDD -type pgpin -pin VDD -inst * -override
globalNetConnect VSS -type pgpin -pin VSS -inst * -override
globalNetConnect VDD -type tiehi -inst * -override
globalNetConnect VSS -type tielo -inst * -override
setOptMode -powerEffort low -leakageToDynamicRatio 0.5
setGenerateViaMode -auto true
generateVias
# basic path groups
createBasicPathGroups -expanded
## Generate the floorplan ##
defIn $floorplan_def
set origin_x [dbget top.fPlan.coreBox_llx]
set origin_y [dbget top.fPlan.coreBox_lly]
if {[info exist ::env(pb_netlist)] &&
[info exist ::env(plc_file)] &&
[file exist $::env(pb_netlist)] &&
[file exist $::env(plc_file)]} {
exec /home/sakundu/.conda/envs/py-tf/bin/python3.8 \
../../../../util/plc_pb_to_placement_tcl.py $::env(plc_file) $::env(pb_netlist) \
"macro_place.tcl" $origin_x $origin_y
source macro_place.tcl
} elseif { [info exist ::env(pl_file)] && [file exist $::env(pl_file)] } {
source ../../../../util/place_from_pl.tcl
place_macro_from_pl $::env(pl_file)
}
if { [info exist ::env(run_refine_macro_place)] && $::env(run_refine_macro_place) == 1 } {
dbset [dbget top.insts.cell.subClass block -p2 ].pStatus placed
refine_macro_place
}
addHaloToBlock -allMacro $HALO_WIDTH $HALO_WIDTH $HALO_WIDTH $HALO_WIDTH
dbset [dbget top.insts.cell.subClass block -p2 ].pStatus fixed
defOut -floorplan ./${DESIGN}_fp_new_placed_macros.def
exit