From bf1bc46fa965a86eebfceb4fb93de80834c6aa3f Mon Sep 17 00:00:00 2001 From: "Jes B. Klinke" Date: Tue, 14 Jan 2025 15:36:44 -0800 Subject: [PATCH 1/3] [opentitantool] Adjusted operation order HyperDebug firmware has special code to pause during SPI or I2C TPM transactions, waiting for a pulse on a Google-specific "ready" signal. This change modifies the way the arguments must be passed to `spi.run_transaction()` to invoke that feature, such that they more closely match the sequence of events: Write, TpmPoll, Read, GscReady. Change-Id: Ia38e142c97f311c27367c916cbcda51af45ad500 Signed-off-by: Jes B. Klinke --- sw/host/opentitanlib/src/tpm/driver.rs | 4 ++-- sw/host/opentitanlib/src/transport/hyperdebug/spi.rs | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/sw/host/opentitanlib/src/tpm/driver.rs b/sw/host/opentitanlib/src/tpm/driver.rs index 20991f9f321c3..6df9a79ca8135 100644 --- a/sw/host/opentitanlib/src/tpm/driver.rs +++ b/sw/host/opentitanlib/src/tpm/driver.rs @@ -273,7 +273,7 @@ const SPI_TPM_WRITE: u32 = 0x40000000; const SPI_TPM_DATA_LEN_POS: u8 = 24; const SPI_TPM_ADDRESS_OFFSET: u32 = 0x00D40000; -const MAX_TRANSACTION_SIZE: usize = 32; +const MAX_TRANSACTION_SIZE: usize = 64; const RESPONSE_HEADER_SIZE: usize = 6; const MAX_RESPONSE_SIZE: usize = 4096; const TIMEOUT: Duration = Duration::from_millis(500); @@ -288,9 +288,9 @@ impl Driver for SpiDriver { if self.use_gsc_ready { self.spi.run_transaction(&mut [ spi::Transfer::Write(&req), - spi::Transfer::GscReady, spi::Transfer::TpmPoll, spi::Transfer::Read(data), + spi::Transfer::GscReady, ]) } else { self.spi.run_transaction(&mut [ diff --git a/sw/host/opentitanlib/src/transport/hyperdebug/spi.rs b/sw/host/opentitanlib/src/transport/hyperdebug/spi.rs index 5f271159541d6..4861f26ff352d 100644 --- a/sw/host/opentitanlib/src/transport/hyperdebug/spi.rs +++ b/sw/host/opentitanlib/src/transport/hyperdebug/spi.rs @@ -809,7 +809,7 @@ impl Target for HyperdebugSpiTarget { self.receive(rbuf)?; return Ok(()); } - [Transfer::Write(wbuf), Transfer::GscReady, Transfer::TpmPoll, Transfer::Read(rbuf)] => { + [Transfer::Write(wbuf), Transfer::TpmPoll, Transfer::Read(rbuf), Transfer::GscReady] => { // Hyperdebug can do SPI TPM transaction as a single USB // request/reply. ensure!( From ab6d92cf2138c86fa15aa5b6ab5c6a22260a2c22 Mon Sep 17 00:00:00 2001 From: "Jes B. Klinke" Date: Tue, 14 Jan 2025 15:37:59 -0800 Subject: [PATCH 2/3] [opentitantool] Removed debug logging left by accident Change-Id: I7a304af363e05083a78213c1697e3eded4aa665f Signed-off-by: Jes B. Klinke --- sw/host/opentitanlib/src/app/i2c.rs | 1 - 1 file changed, 1 deletion(-) diff --git a/sw/host/opentitanlib/src/app/i2c.rs b/sw/host/opentitanlib/src/app/i2c.rs index fb42f90092543..27a8565ba0e1f 100644 --- a/sw/host/opentitanlib/src/app/i2c.rs +++ b/sw/host/opentitanlib/src/app/i2c.rs @@ -131,7 +131,6 @@ impl Bus for LogicalI2cWrapper { serial_data: Option<&Rc>, gsc_ready: Option<&Rc>, ) -> Result<()> { - log::error!("LogicalI2cWrapper::set_pins()"); let mut inner = self.inner.borrow_mut(); if serial_clock.is_some() { inner.serial_clock = serial_clock.map(Rc::clone); From 40c4ca878d7f55f7929682b0c22aaca126ec158b Mon Sep 17 00:00:00 2001 From: "Jes B. Klinke" Date: Fri, 31 Jan 2025 15:25:53 -0800 Subject: [PATCH 3/3] [opentitantool] Tolerate 1% deviation either way If doing bitbanging and specifying a pause between segments of the waveform, the delay may not be an exact multiple of the base bitbanging sample frequency, as in this example: ``` opentitantool gpio bitbang --clock 115200Hz -s "0100001001 1ms 0100001001" CN9_6 ``` The code was intended to round off to a whole number of samples, as long as the actual time is within 1% of what was requested (115 sample times in the case above). However the original code had a bug meaning that it would accept only 99%-100% of the requested period, rather than 99%-101%. Change-Id: I79fd67926fedd7fb6dbae27d6314a28bc0b7f2e1 Signed-off-by: Jes B. Klinke --- sw/host/opentitanlib/src/util/bitbang.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sw/host/opentitanlib/src/util/bitbang.rs b/sw/host/opentitanlib/src/util/bitbang.rs index 2207f43859248..6cf5124839dae 100644 --- a/sw/host/opentitanlib/src/util/bitbang.rs +++ b/sw/host/opentitanlib/src/util/bitbang.rs @@ -171,7 +171,7 @@ pub fn parse_delay(num: &str, time_unit: &str, clock: Duration) -> Result { let actual_duration = clock.mul(closest_ticks); let ratio = actual_duration.as_secs_f64() / duration; ensure!( - (0.99..=1.00).contains(&ratio), + (0.99..=1.01).contains(&ratio), "Requested delay cannot be approximated to within 1%, try increasing clock frequency", ); Ok(closest_ticks)