How does loongarch deal with herb sutter's P0709? It needs an extra register for passing the error.

[trcrsired]

https://www.open-std.org/jtc1/sc22/wg14/www/docs/n2289.pdf

For fails(E) returns, it is proposed for at least AArch64, ARM, x86 and x64, that the
discriminant be returned via the CPU's carry flag. This is because compilers can often fold
the setting or clearing of the CPU's carry flag into the ordering of other operations, thus
making this a zero runtime overhead choice of discriminant1
. On other architectures such as
RISC-V (which has no status register), an extra register would make more sense. It doesn't
matter what an architecture chooses, so long as it is consistent across all compilers.

how do you define this?

[xen0n]

I would say that an extra GPR would be appropriate for LoongArch. Because while there is a "flags" register on current Loongson-3-series models, it's part of LBT context, so the base ABI cannot rely on that.