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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 |
| 2 | +; RUN: opt -S --passes=slp-vectorizer < %s | FileCheck %s |
| 3 | + |
| 4 | +define i1 @test(<4 x i32> %x) { |
| 5 | +; CHECK-LABEL: define i1 @test( |
| 6 | +; CHECK-SAME: <4 x i32> [[X:%.*]]) { |
| 7 | +; CHECK-NEXT: [[X0:%.*]] = extractelement <4 x i32> [[X]], i32 0 |
| 8 | +; CHECK-NEXT: [[X1:%.*]] = extractelement <4 x i32> [[X]], i32 -1 |
| 9 | +; CHECK-NEXT: [[X2:%.*]] = extractelement <4 x i32> [[X]], i32 2 |
| 10 | +; CHECK-NEXT: [[X3:%.*]] = extractelement <4 x i32> [[X]], i32 3 |
| 11 | +; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X0]], 0 |
| 12 | +; CHECK-NEXT: [[C1:%.*]] = icmp slt i32 [[X1]], 0 |
| 13 | +; CHECK-NEXT: [[C2:%.*]] = icmp sgt i32 [[X2]], 0 |
| 14 | +; CHECK-NEXT: [[C3:%.*]] = icmp slt i32 [[X3]], 0 |
| 15 | +; CHECK-NEXT: [[OP_RDX:%.*]] = select i1 [[C3]], i1 [[C1]], i1 false |
| 16 | +; CHECK-NEXT: [[OP_RDX1:%.*]] = select i1 [[OP_RDX]], i1 [[TMP1]], i1 false |
| 17 | +; CHECK-NEXT: ret i1 [[OP_RDX1]] |
| 18 | +; |
| 19 | + %x0 = extractelement <4 x i32> %x, i32 0 |
| 20 | + %x1 = extractelement <4 x i32> %x, i32 -1 |
| 21 | + %x2 = extractelement <4 x i32> %x, i32 2 |
| 22 | + %x3 = extractelement <4 x i32> %x, i32 3 |
| 23 | + %2 = icmp ugt i32 %x0, 0 |
| 24 | + %c1 = icmp slt i32 %x1, 0 |
| 25 | + %c2 = icmp sgt i32 %x2, 0 |
| 26 | + %c3 = icmp slt i32 %x3, 0 |
| 27 | + %s1 = select i1 %2, i1 %c1, i1 false |
| 28 | + %s2 = select i1 %s1, i1 %c3, i1 false |
| 29 | + %s3 = select i1 %s2, i1 %c3, i1 false |
| 30 | + ret i1 %s3 |
| 31 | +} |
| 32 | + |
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