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This repository has been archived by the owner on Jan 13, 2021. It is now read-only.
The RISCV target is no longer “experimental” (see Changes to the RISCV Target below for more details).
Support for target-independent hardware loops in IR has been added, with PowerPC and Arm implementations.
Various optimisations
Changes to the LLVM IR
Added immarg parameter attribute. This indicates an intrinsic parameter is required to be a simple constant. This annotation must be accurate to avoid possible miscompiles.
The 2-field form of global variables @llvm.global_ctors and @llvm.global_dtors has been deleted. The third field of their element type is now mandatory. Specify i8* null to migrate from the obsoleted 2-field form.
The byval attribute can now take a type parameter: byval(<ty>). If present it must be identical to the argument’s pointee type. In the next release we intend to make this parameter mandatory in preparation for opaque pointer types.
LLVM 9.0 was recently released, with many things inside:
Changes to the LLVM IR
immarg
parameter attribute. This indicates an intrinsic parameter is required to be a simple constant. This annotation must be accurate to avoid possible miscompiles.@llvm.global_ctors
and@llvm.global_dtors
has been deleted. The third field of their element type is now mandatory. Specify i8* null to migrate from the obsoleted 2-field form.byval
attribute can now take a type parameter:byval(<ty>)
. If present it must be identical to the argument’s pointee type. In the next release we intend to make this parameter mandatory in preparation for opaque pointer types.atomicrmw xchg
now allows floating point typesatomicrmw
now supportsfadd
andfsub
Depends on klee#1136
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