vivado.log

#-----------------------------------------------------------
# Vivado v2016.2 (64-bit)
# SW Build 1577090 on Thu Jun  2 16:32:40 MDT 2016
# IP Build 1577682 on Fri Jun  3 12:00:54 MDT 2016
# Start of session at: Sun Jul 17 20:45:22 2016
# Process ID: 3424
# Current directory: G:/study/verilog/RSA/RSAfinal
# Command line: vivado.exe -gui_launcher_event rodinguilauncherevent6428 G:\study\verilog\RSA\RSAfinal\RSA.xpr
# Log file: G:/study/verilog/RSA/RSAfinal/vivado.log
# Journal file: G:/study/verilog/RSA/RSAfinal\vivado.jou
#-----------------------------------------------------------
start_gui
open_project G:/study/verilog/RSA/RSAfinal/RSA.xpr
INFO: [Project 1-313] Project file moved from 'C:/Users/rajandeep****** Webtalk v2016.2 (64-bit)
  **** SW Build 1577090 on Thu Jun  2 16:32:40 MDT 2016
  **** IP Build 1577682 on Fri Jun  3 12:00:54 MDT 2016
    ** Copyright 1986-2016 Xilinx, Inc. AINFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'G:/xilinx_vivado/Vivado/2016.2/data/ip'.
open_project: Time (s): cpu = 00:00:14 ; elapsed = 00:00:38 . Memory (MB): peak = 714.793 ; gain = 151.609
update_compile_order exit
INFO: [Common archive_project C:/Users/rajandeep/Desktop/rsa/RSA.xpr.zip -temp_dir G:/study/verilog/RSA/RSAfinal/.Xil/Vivado-2804-dell -force
INFO: [Coretcl 2-137] starting archive...
INFO: [Coretcl 2-1499] Saving project copy to temporary location 'G:/study/verilog/RSA/RSAfinal/.Xil/Vivado-2804-dell' for archiving project
Scanning sources...
Finished scanning sources
INFO: [Coretcl 2-1211] Creating project copy for archival...
INFO: [Coretcl 2-1213] Including run results for 'synth_1'
INFO: [Coretcl 2-1213] Including run results for 'impl_1'