From acbfdb96ecf531f0b242e14ac0b027a7ade06b35 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 3 Apr 2013 16:14:27 +0100 Subject: [PATCH 0001/1167] mfd: wm5102: Add missing break Change-Id: I5281ff74dec06a61f492771019876a32f4283bfc Signed-off-by: Charles Keepax --- drivers/mfd/wm5102-tables.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index 155c4a1a6a9..7dec3adbc73 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -86,9 +86,11 @@ int wm5102_patch(struct arizona *arizona) case 0: wm5102_patch = wm5102_reva_patch; patch_size = ARRAY_SIZE(wm5102_reva_patch); + break; default: wm5102_patch = wm5102_revb_patch; patch_size = ARRAY_SIZE(wm5102_revb_patch); + break; } regcache_cache_bypass(arizona->regmap, true); From a5f268dfc200d6a3bf374ccda355c8b5e1067469 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 16 Sep 2013 15:34:35 +0100 Subject: [PATCH 0002/1167] ASoC: arizona: Improve handling of setting REFCLK to 0 This patch suppresses calculation of REFCLK parameters when the REFCLK source frequency is set to zero, additionally it will consider a source frequency of zero as the REFCLK being disabled and switch to using the SYNCCLK. Reported-by: Kyung Kwee Ryu Signed-off-by: Charles Keepax Signed-off-by: Mark Brown (cherry picked from commit 49c60547daebaa79e8de9d2dff6dee994576c94c) Change-Id: I90ebdd1a6f96c517bdcbb0f13839fb93d46cd598 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 389f2325383..fa3860d947c 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1407,21 +1407,25 @@ static void arizona_enable_fll(struct arizona_fll *fll, { struct arizona *arizona = fll->arizona; int ret; + bool use_sync = false; /* * If we have both REFCLK and SYNCCLK then enable both, * otherwise apply the SYNCCLK settings to REFCLK. */ - if (fll->ref_src >= 0 && fll->ref_src != fll->sync_src) { + if (fll->ref_src >= 0 && fll->ref_freq && + fll->ref_src != fll->sync_src) { regmap_update_bits(arizona->regmap, fll->base + 5, ARIZONA_FLL1_OUTDIV_MASK, ref->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT); arizona_apply_fll(arizona, fll->base, ref, fll->ref_src, false); - if (fll->sync_src >= 0) + if (fll->sync_src >= 0) { arizona_apply_fll(arizona, fll->base + 0x10, sync, fll->sync_src, true); + use_sync = true; + } } else if (fll->sync_src >= 0) { regmap_update_bits(arizona->regmap, fll->base + 5, ARIZONA_FLL1_OUTDIV_MASK, @@ -1441,7 +1445,7 @@ static void arizona_enable_fll(struct arizona_fll *fll, * Increase the bandwidth if we're not using a low frequency * sync source. */ - if (fll->sync_src >= 0 && fll->sync_freq > 100000) + if (use_sync && fll->sync_freq > 100000) regmap_update_bits(arizona->regmap, fll->base + 0x17, ARIZONA_FLL1_SYNC_BW, 0); else @@ -1456,8 +1460,7 @@ static void arizona_enable_fll(struct arizona_fll *fll, regmap_update_bits(arizona->regmap, fll->base + 1, ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA); - if (fll->ref_src >= 0 && fll->sync_src >= 0 && - fll->ref_src != fll->sync_src) + if (use_sync) regmap_update_bits(arizona->regmap, fll->base + 0x11, ARIZONA_FLL1_SYNC_ENA, ARIZONA_FLL1_SYNC_ENA); @@ -1491,10 +1494,12 @@ int arizona_set_fll_refclk(struct arizona_fll *fll, int source, if (fll->ref_src == source && fll->ref_freq == Fref) return 0; - if (fll->fout && Fref > 0) { - ret = arizona_calc_fll(fll, &ref, Fref, fll->fout); - if (ret != 0) - return ret; + if (fll->fout) { + if (Fref > 0) { + ret = arizona_calc_fll(fll, &ref, Fref, fll->fout); + if (ret != 0) + return ret; + } if (fll->sync_src >= 0) { ret = arizona_calc_fll(fll, &sync, fll->sync_freq, From 30b4a3cc38bd5cf71f1fc8a66e3b336e51ffdbaf Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Tue, 9 Apr 2013 16:04:35 +0100 Subject: [PATCH 0003/1167] mfd: arizona: Read the device identification information after boot Future devices may not fully report the device identification information until their boot sequence is complete so defer acting on these until that has finished. Signed-off-by: Mark Brown (cherry picked from commit ca76ceb8b9ca1466be9b6de5e4c0fb19b37417ee) Change-Id: Ia0ea345d928db469f76e8f0b987868fe19a8d2e6 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 80 +++++++++++++++++++++++--------------- 1 file changed, 49 insertions(+), 31 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 6ab03043fd6..81907f9fc92 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -536,51 +536,22 @@ int arizona_dev_init(struct arizona *arizona) regcache_cache_only(arizona->regmap, false); + /* Verify that this is a chip we know about */ ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); if (ret != 0) { dev_err(dev, "Failed to read ID register: %d\n", ret); goto err_reset; } - ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION, - &arizona->rev); - if (ret != 0) { - dev_err(dev, "Failed to read revision register: %d\n", ret); - goto err_reset; - } - arizona->rev &= ARIZONA_DEVICE_REVISION_MASK; - switch (reg) { -#ifdef CONFIG_MFD_WM5102 case 0x5102: - type_name = "WM5102"; - if (arizona->type != WM5102) { - dev_err(arizona->dev, "WM5102 registered as %d\n", - arizona->type); - arizona->type = WM5102; - } - apply_patch = wm5102_patch; - arizona->rev &= 0x7; - break; -#endif -#ifdef CONFIG_MFD_WM5110 case 0x5110: - type_name = "WM5110"; - if (arizona->type != WM5110) { - dev_err(arizona->dev, "WM5110 registered as %d\n", - arizona->type); - arizona->type = WM5110; - } - apply_patch = wm5110_patch; break; -#endif default: - dev_err(arizona->dev, "Unknown device ID %x\n", reg); + dev_err(arizona->dev, "Unknown device ID: %x\n", reg); goto err_reset; } - dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); - /* If we have a /RESET GPIO we'll already be reset */ if (!arizona->pdata.reset) { regcache_mark_dirty(arizona->regmap); @@ -600,6 +571,7 @@ int arizona_dev_init(struct arizona *arizona) } } + /* Ensure device startup is complete */ switch (arizona->type) { case WM5102: ret = regmap_read(arizona->regmap, 0x19, &val); @@ -620,6 +592,52 @@ int arizona_dev_init(struct arizona *arizona) break; } + /* Read the device ID information & do device specific stuff */ + ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); + if (ret != 0) { + dev_err(dev, "Failed to read ID register: %d\n", ret); + goto err_reset; + } + + ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION, + &arizona->rev); + if (ret != 0) { + dev_err(dev, "Failed to read revision register: %d\n", ret); + goto err_reset; + } + arizona->rev &= ARIZONA_DEVICE_REVISION_MASK; + + switch (reg) { +#ifdef CONFIG_MFD_WM5102 + case 0x5102: + type_name = "WM5102"; + if (arizona->type != WM5102) { + dev_err(arizona->dev, "WM5102 registered as %d\n", + arizona->type); + arizona->type = WM5102; + } + apply_patch = wm5102_patch; + arizona->rev &= 0x7; + break; +#endif +#ifdef CONFIG_MFD_WM5110 + case 0x5110: + type_name = "WM5110"; + if (arizona->type != WM5110) { + dev_err(arizona->dev, "WM5110 registered as %d\n", + arizona->type); + arizona->type = WM5110; + } + apply_patch = wm5110_patch; + break; +#endif + default: + dev_err(arizona->dev, "Unknown device ID %x\n", reg); + goto err_reset; + } + + dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); + if (apply_patch) { ret = apply_patch(arizona); if (ret != 0) { From 864d8f620956c91ed88cc0919a2a7472dd5e682f Mon Sep 17 00:00:00 2001 From: Dimitris Papastamos Date: Wed, 8 May 2013 14:15:35 +0100 Subject: [PATCH 0004/1167] ASoC: wm_adsp: Expose coefficient blocks as ALSA binary controls Add initial support for runtime tuning for the ADSP cores. This is achieved by exposing the coefficient configuration blocks as ALSA binary controls. The current code assumes that no controls on the DSP are volatile. Signed-off-by: Dimitris Papastamos Signed-off-by: Mark Brown (cherry picked from commit 6ab2b7b415441fa46357bef883e1ead086de1387) Change-Id: Ie316e98ab1ff5cb4cd5b562435417de62089e36e Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 458 ++++++++++++++++++++++++++++++++++++- sound/soc/codecs/wm_adsp.h | 3 + 2 files changed, 454 insertions(+), 7 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 3470b649c0b..13783061192 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -215,6 +216,36 @@ static struct { [WM_ADSP_FW_RX_ANC] = { .file = "rx-anc" }, }; +struct wm_coeff_ctl_ops { + int (*xget)(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); + int (*xput)(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); + int (*xinfo)(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo); +}; + +struct wm_coeff { + struct device *dev; + struct list_head ctl_list; + struct regmap *regmap; +}; + +struct wm_coeff_ctl { + const char *name; + struct snd_card *card; + struct wm_adsp_alg_region region; + struct wm_coeff_ctl_ops ops; + struct wm_adsp *adsp; + void *private; + unsigned int enabled:1; + struct list_head list; + void *cache; + size_t len; + unsigned int dirty:1; + struct snd_kcontrol *kcontrol; +}; + static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { @@ -334,6 +365,181 @@ static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *region, } } +static int wm_coeff_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; + + uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; + uinfo->count = ctl->len; + return 0; +} + +static int wm_coeff_write_control(struct snd_kcontrol *kcontrol, + const void *buf, size_t len) +{ + struct wm_coeff *wm_coeff= snd_kcontrol_chip(kcontrol); + struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; + struct wm_adsp_alg_region *region = &ctl->region; + const struct wm_adsp_region *mem; + struct wm_adsp *adsp = ctl->adsp; + void *scratch; + int ret; + unsigned int reg; + + mem = wm_adsp_find_region(adsp, region->type); + if (!mem) { + adsp_err(adsp, "No base for region %x\n", + region->type); + return -EINVAL; + } + + reg = ctl->region.base; + reg = wm_adsp_region_to_reg(mem, reg); + + scratch = kmemdup(buf, ctl->len, GFP_KERNEL | GFP_DMA); + if (!scratch) + return -ENOMEM; + + ret = regmap_raw_write(wm_coeff->regmap, reg, scratch, + ctl->len); + if (ret) { + adsp_err(adsp, "Failed to write %zu bytes to %x\n", + ctl->len, reg); + kfree(scratch); + return ret; + } + + kfree(scratch); + + return 0; +} + +static int wm_coeff_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; + char *p = ucontrol->value.bytes.data; + + memcpy(ctl->cache, p, ctl->len); + + if (!ctl->enabled) { + ctl->dirty = 1; + return 0; + } + + return wm_coeff_write_control(kcontrol, p, ctl->len); +} + +static int wm_coeff_read_control(struct snd_kcontrol *kcontrol, + void *buf, size_t len) +{ + struct wm_coeff *wm_coeff= snd_kcontrol_chip(kcontrol); + struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; + struct wm_adsp_alg_region *region = &ctl->region; + const struct wm_adsp_region *mem; + struct wm_adsp *adsp = ctl->adsp; + void *scratch; + int ret; + unsigned int reg; + + mem = wm_adsp_find_region(adsp, region->type); + if (!mem) { + adsp_err(adsp, "No base for region %x\n", + region->type); + return -EINVAL; + } + + reg = ctl->region.base; + reg = wm_adsp_region_to_reg(mem, reg); + + scratch = kmalloc(ctl->len, GFP_KERNEL | GFP_DMA); + if (!scratch) + return -ENOMEM; + + ret = regmap_raw_read(wm_coeff->regmap, reg, scratch, ctl->len); + if (ret) { + adsp_err(adsp, "Failed to read %zu bytes from %x\n", + ctl->len, reg); + kfree(scratch); + return ret; + } + + memcpy(buf, scratch, ctl->len); + kfree(scratch); + + return 0; +} + +static int wm_coeff_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; + char *p = ucontrol->value.bytes.data; + + memcpy(p, ctl->cache, ctl->len); + return 0; +} + +static int wm_coeff_add_kcontrol(struct wm_coeff *wm_coeff, + struct wm_coeff_ctl *ctl, + const struct snd_kcontrol_new *kctl) +{ + int ret; + struct snd_kcontrol *kcontrol; + + kcontrol = snd_ctl_new1(kctl, wm_coeff); + ret = snd_ctl_add(ctl->card, kcontrol); + if (ret < 0) { + dev_err(wm_coeff->dev, "Failed to add %s: %d\n", + kctl->name, ret); + return ret; + } + ctl->kcontrol = kcontrol; + return 0; +} + +struct wmfw_ctl_work { + struct wm_coeff *wm_coeff; + struct wm_coeff_ctl *ctl; + struct work_struct work; +}; + +static int wmfw_add_ctl(struct wm_coeff *wm_coeff, + struct wm_coeff_ctl *ctl) +{ + struct snd_kcontrol_new *kcontrol; + int ret; + + if (!wm_coeff || !ctl || !ctl->name || !ctl->card) + return -EINVAL; + + kcontrol = kzalloc(sizeof(*kcontrol), GFP_KERNEL); + if (!kcontrol) + return -ENOMEM; + kcontrol->iface = SNDRV_CTL_ELEM_IFACE_MIXER; + + kcontrol->name = ctl->name; + kcontrol->info = wm_coeff_info; + kcontrol->get = wm_coeff_get; + kcontrol->put = wm_coeff_put; + kcontrol->private_value = (unsigned long)ctl; + + ret = wm_coeff_add_kcontrol(wm_coeff, + ctl, kcontrol); + if (ret < 0) + goto err_kcontrol; + + kfree(kcontrol); + + list_add(&ctl->list, &wm_coeff->ctl_list); + return 0; + +err_kcontrol: + kfree(kcontrol); + return ret; +} + static int wm_adsp_load(struct wm_adsp *dsp) { LIST_HEAD(buf_list); @@ -547,7 +753,156 @@ static int wm_adsp_load(struct wm_adsp *dsp) return ret; } -static int wm_adsp_setup_algs(struct wm_adsp *dsp) +static int wm_coeff_init_control_caches(struct wm_coeff *wm_coeff) +{ + struct wm_coeff_ctl *ctl; + int ret; + + list_for_each_entry(ctl, &wm_coeff->ctl_list, + list) { + if (!ctl->enabled || ctl->dirty) + continue; + ret = wm_coeff_read_control(ctl->kcontrol, + ctl->cache, + ctl->len); + if (ret < 0) + return ret; + } + + return 0; +} + +static int wm_coeff_sync_controls(struct wm_coeff *wm_coeff) +{ + struct wm_coeff_ctl *ctl; + int ret; + + list_for_each_entry(ctl, &wm_coeff->ctl_list, + list) { + if (!ctl->enabled) + continue; + if (ctl->dirty) { + ret = wm_coeff_write_control(ctl->kcontrol, + ctl->cache, + ctl->len); + if (ret < 0) + return ret; + ctl->dirty = 0; + } + } + + return 0; +} + +static void wm_adsp_ctl_work(struct work_struct *work) +{ + struct wmfw_ctl_work *ctl_work = container_of(work, + struct wmfw_ctl_work, + work); + + wmfw_add_ctl(ctl_work->wm_coeff, ctl_work->ctl); + kfree(ctl_work); +} + +static int wm_adsp_create_control(struct snd_soc_codec *codec, + const struct wm_adsp_alg_region *region) + +{ + struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec); + struct wm_coeff_ctl *ctl; + struct wmfw_ctl_work *ctl_work; + char *name; + char *region_name; + int ret; + + name = kmalloc(PAGE_SIZE, GFP_KERNEL); + if (!name) + return -ENOMEM; + + switch (region->type) { + case WMFW_ADSP1_PM: + region_name = "PM"; + break; + case WMFW_ADSP1_DM: + region_name = "DM"; + break; + case WMFW_ADSP2_XM: + region_name = "XM"; + break; + case WMFW_ADSP2_YM: + region_name = "YM"; + break; + case WMFW_ADSP1_ZM: + region_name = "ZM"; + break; + default: + return -EINVAL; + } + + snprintf(name, PAGE_SIZE, "DSP%d %s %x", + dsp->num, region_name, region->alg); + + list_for_each_entry(ctl, &dsp->wm_coeff->ctl_list, + list) { + if (!strcmp(ctl->name, name)) { + if (!ctl->enabled) + ctl->enabled = 1; + return 0; + } + } + + ctl = kzalloc(sizeof(*ctl), GFP_KERNEL); + if (!ctl) { + ret = -ENOMEM; + goto err_name; + } + ctl->region = *region; + ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL); + if (!ctl->name) { + ret = -ENOMEM; + goto err_ctl; + } + ctl->enabled = 1; + ctl->dirty = 0; + ctl->ops.xget = wm_coeff_get; + ctl->ops.xput = wm_coeff_put; + ctl->card = codec->card->snd_card; + ctl->adsp = dsp; + + ctl->len = region->len; + ctl->cache = kzalloc(ctl->len, GFP_KERNEL); + if (!ctl->cache) { + ret = -ENOMEM; + goto err_ctl_name; + } + + ctl_work = kzalloc(sizeof(*ctl_work), GFP_KERNEL); + if (!ctl_work) { + ret = -ENOMEM; + goto err_ctl_cache; + } + + ctl_work->wm_coeff = dsp->wm_coeff; + ctl_work->ctl = ctl; + INIT_WORK(&ctl_work->work, wm_adsp_ctl_work); + schedule_work(&ctl_work->work); + + kfree(name); + + return 0; + +err_ctl_cache: + kfree(ctl->cache); +err_ctl_name: + kfree(ctl->name); +err_ctl: + kfree(ctl); +err_name: + kfree(name); + return ret; +} + +static int wm_adsp_setup_algs(struct wm_adsp *dsp, struct snd_soc_codec *codec) { struct regmap *regmap = dsp->regmap; struct wmfw_adsp1_id_hdr adsp1_id; @@ -730,7 +1085,16 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->type = WMFW_ADSP1_DM; region->alg = be32_to_cpu(adsp1_alg[i].alg.id); region->base = be32_to_cpu(adsp1_alg[i].dm); + region->len = 0; list_add_tail(®ion->list, &dsp->alg_regions); + if (i + 1 < algs) { + region->len = be32_to_cpu(adsp1_alg[i + 1].dm); + region->len -= be32_to_cpu(adsp1_alg[i].dm); + wm_adsp_create_control(codec, region); + } else { + adsp_warn(dsp, "Missing length info for region DM with ID %x\n", + be32_to_cpu(adsp1_alg[i].alg.id)); + } region = kzalloc(sizeof(*region), GFP_KERNEL); if (!region) @@ -738,7 +1102,16 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->type = WMFW_ADSP1_ZM; region->alg = be32_to_cpu(adsp1_alg[i].alg.id); region->base = be32_to_cpu(adsp1_alg[i].zm); + region->len = 0; list_add_tail(®ion->list, &dsp->alg_regions); + if (i + 1 < algs) { + region->len = be32_to_cpu(adsp1_alg[i + 1].zm); + region->len -= be32_to_cpu(adsp1_alg[i].zm); + wm_adsp_create_control(codec, region); + } else { + adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", + be32_to_cpu(adsp1_alg[i].alg.id)); + } break; case WMFW_ADSP2: @@ -758,7 +1131,16 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->type = WMFW_ADSP2_XM; region->alg = be32_to_cpu(adsp2_alg[i].alg.id); region->base = be32_to_cpu(adsp2_alg[i].xm); + region->len = 0; list_add_tail(®ion->list, &dsp->alg_regions); + if (i + 1 < algs) { + region->len = be32_to_cpu(adsp2_alg[i + 1].xm); + region->len -= be32_to_cpu(adsp2_alg[i].xm); + wm_adsp_create_control(codec, region); + } else { + adsp_warn(dsp, "Missing length info for region XM with ID %x\n", + be32_to_cpu(adsp2_alg[i].alg.id)); + } region = kzalloc(sizeof(*region), GFP_KERNEL); if (!region) @@ -766,7 +1148,16 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->type = WMFW_ADSP2_YM; region->alg = be32_to_cpu(adsp2_alg[i].alg.id); region->base = be32_to_cpu(adsp2_alg[i].ym); + region->len = 0; list_add_tail(®ion->list, &dsp->alg_regions); + if (i + 1 < algs) { + region->len = be32_to_cpu(adsp2_alg[i + 1].ym); + region->len -= be32_to_cpu(adsp2_alg[i].ym); + wm_adsp_create_control(codec, region); + } else { + adsp_warn(dsp, "Missing length info for region YM with ID %x\n", + be32_to_cpu(adsp2_alg[i].alg.id)); + } region = kzalloc(sizeof(*region), GFP_KERNEL); if (!region) @@ -774,7 +1165,16 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->type = WMFW_ADSP2_ZM; region->alg = be32_to_cpu(adsp2_alg[i].alg.id); region->base = be32_to_cpu(adsp2_alg[i].zm); + region->len = 0; list_add_tail(®ion->list, &dsp->alg_regions); + if (i + 1 < algs) { + region->len = be32_to_cpu(adsp2_alg[i + 1].zm); + region->len -= be32_to_cpu(adsp2_alg[i].zm); + wm_adsp_create_control(codec, region); + } else { + adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", + be32_to_cpu(adsp2_alg[i].alg.id)); + } break; } } @@ -986,6 +1386,7 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, struct snd_soc_codec *codec = w->codec; struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); struct wm_adsp *dsp = &dsps[w->shift]; + struct wm_coeff_ctl *ctl; int ret; int val; @@ -1023,7 +1424,7 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, if (ret != 0) goto err; - ret = wm_adsp_setup_algs(dsp); + ret = wm_adsp_setup_algs(dsp, codec); if (ret != 0) goto err; @@ -1031,6 +1432,16 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, if (ret != 0) goto err; + /* Initialize caches for enabled and non-dirty controls */ + ret = wm_coeff_init_control_caches(dsp->wm_coeff); + if (ret != 0) + goto err; + + /* Sync dirty controls */ + ret = wm_coeff_sync_controls(dsp->wm_coeff); + if (ret != 0) + goto err; + /* Start the core running */ regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, ADSP1_CORE_ENA | ADSP1_START, @@ -1047,6 +1458,11 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, ADSP1_SYS_ENA, 0); + + list_for_each_entry(ctl, &dsp->wm_coeff->ctl_list, + list) { + ctl->enabled = 0; + } break; default: @@ -1099,6 +1515,7 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); struct wm_adsp *dsp = &dsps[w->shift]; struct wm_adsp_alg_region *alg_region; + struct wm_coeff_ctl *ctl; unsigned int val; int ret; @@ -1164,7 +1581,7 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, if (ret != 0) goto err; - ret = wm_adsp_setup_algs(dsp); + ret = wm_adsp_setup_algs(dsp, codec); if (ret != 0) goto err; @@ -1172,6 +1589,16 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, if (ret != 0) goto err; + /* Initialize caches for enabled and non-dirty controls */ + ret = wm_coeff_init_control_caches(dsp->wm_coeff); + if (ret != 0) + goto err; + + /* Sync dirty controls */ + ret = wm_coeff_sync_controls(dsp->wm_coeff); + if (ret != 0) + goto err; + ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, ADSP2_CORE_ENA | ADSP2_START, @@ -1209,6 +1636,11 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, ret); } + list_for_each_entry(ctl, &dsp->wm_coeff->ctl_list, + list) { + ctl->enabled = 0; + } + while (!list_empty(&dsp->alg_regions)) { alg_region = list_first_entry(&dsp->alg_regions, struct wm_adsp_alg_region, @@ -1247,36 +1679,48 @@ int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs) INIT_LIST_HEAD(&adsp->alg_regions); + adsp->wm_coeff = kzalloc(sizeof(*adsp->wm_coeff), + GFP_KERNEL); + if (!adsp->wm_coeff) + return -ENOMEM; + adsp->wm_coeff->regmap = adsp->regmap; + adsp->wm_coeff->dev = adsp->dev; + INIT_LIST_HEAD(&adsp->wm_coeff->ctl_list); + if (dvfs) { adsp->dvfs = devm_regulator_get(adsp->dev, "DCVDD"); if (IS_ERR(adsp->dvfs)) { ret = PTR_ERR(adsp->dvfs); dev_err(adsp->dev, "Failed to get DCVDD: %d\n", ret); - return ret; + goto out_coeff; } ret = regulator_enable(adsp->dvfs); if (ret != 0) { dev_err(adsp->dev, "Failed to enable DCVDD: %d\n", ret); - return ret; + goto out_coeff; } ret = regulator_set_voltage(adsp->dvfs, 1200000, 1800000); if (ret != 0) { dev_err(adsp->dev, "Failed to initialise DVFS: %d\n", ret); - return ret; + goto out_coeff; } ret = regulator_disable(adsp->dvfs); if (ret != 0) { dev_err(adsp->dev, "Failed to disable DCVDD: %d\n", ret); - return ret; + goto out_coeff; } } return 0; + +out_coeff: + kfree(adsp->wm_coeff); + return ret; } EXPORT_SYMBOL_GPL(wm_adsp2_init); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index fea51462752..6e890b91659 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -30,6 +30,7 @@ struct wm_adsp_alg_region { unsigned int alg; int type; unsigned int base; + size_t len; }; struct wm_adsp { @@ -55,6 +56,8 @@ struct wm_adsp { bool running; struct regulator *dvfs; + + struct wm_coeff *wm_coeff; }; #define WM_ADSP1(wname, num) \ From 25012d08ab6902cf6b053aa331dfd4c639abbbef Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 25 Mar 2013 00:11:27 +0000 Subject: [PATCH 0005/1167] mfd: Add device tree bindings for Arizona class devices Signed-off-by: Mark Brown (cherry picked from commit d781009ca6bb5b9711c74700242855e0a70ee7a3) Change-Id: Idf492bac074d3e74d7734c2348ed8c423a3fc1e1 Signed-off-by: Charles Keepax --- .../devicetree/bindings/mfd/arizona.txt | 62 +++++++++++++++++ drivers/mfd/arizona-core.c | 69 +++++++++++++++++++ drivers/mfd/arizona-i2c.c | 10 ++- drivers/mfd/arizona-spi.c | 10 ++- drivers/mfd/arizona.h | 12 ++++ 5 files changed, 159 insertions(+), 4 deletions(-) create mode 100644 Documentation/devicetree/bindings/mfd/arizona.txt diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt new file mode 100644 index 00000000000..0e295c9d893 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -0,0 +1,62 @@ +Wolfson Arizona class audio SoCs + +These devices are audio SoCs with extensive digital capabilites and a range +of analogue I/O. + +Required properties: + + - compatible : one of the following chip-specific strings: + "wlf,wm5102" + "wlf,wm5110" + - reg : I2C slave address when connected using I2C, chip select number when + using SPI. + + - interrupts : The interrupt line the /IRQ signal for the device is + connected to. + - interrupt-controller : Arizona class devices contain interrupt controllers + and may provide interrupt services to other devices. + - interrupt-parent : The parent interrupt controller. + - #interrupt-cells: the number of cells to describe an IRQ, this should be 2. + The first cell is the IRQ number. + The second cell is the flags, encoded as the trigger masks from + Documentation/devicetree/bindings/interrupts.txt + + - gpio-controller : Indicates this device is a GPIO controller. + - #gpio-cells : Must be 2. The first cell is the pin number and the + second cell is used to specify optional parameters (currently unused). + + - AVDD1-supply, DBVDD1-supply, DBVDD2-supply, DBVDD3-supply, CPVDD-supply, + SPKVDDL-supply, SPKVDDR-supply : power supplies for the device, as covered + in Documentation/devicetree/bindings/regulator/regulator.txt + +Optional properties: + + - wlf,reset : GPIO specifier for the GPIO controlling /RESET + - wlf,ldoena : GPIO specifier for the GPIO controlling LDOENA + + - wlf,gpio-defaults : A list of GPIO configuration register values. If + absent, no configuration of these registers is performed. If any + entry has a value that is out of range for a 16 bit register then + the chip default will be used. If present exactly five values must + be specified. + +Example: + +codec: wm5102@1a { + compatible = "wlf,wm5102"; + reg = <0x1a>; + interrupts = <347>; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + + gpio-controller; + #gpio-cells = <2>; + + wlf,gpio-defaults = < + 0x00000000, /* AIF1TXLRCLK */ + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + >; +}; diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 81907f9fc92..767fead2242 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -16,6 +16,9 @@ #include #include #include +#include +#include +#include #include #include #include @@ -429,6 +432,70 @@ const struct dev_pm_ops arizona_pm_ops = { }; EXPORT_SYMBOL_GPL(arizona_pm_ops); +#ifdef CONFIG_OF +int arizona_of_get_type(struct device *dev) +{ + const struct of_device_id *id = of_match_device(arizona_of_match, dev); + + if (id) + return (int)id->data; + else + return 0; +} +EXPORT_SYMBOL_GPL(arizona_of_get_type); + +static int arizona_of_get_core_pdata(struct arizona *arizona) +{ + int ret, i; + + arizona->pdata.reset = of_get_named_gpio(arizona->dev->of_node, + "wlf,reset", 0); + if (arizona->pdata.reset < 0) + arizona->pdata.reset = 0; + + arizona->pdata.ldoena = of_get_named_gpio(arizona->dev->of_node, + "wlf,ldoena", 0); + if (arizona->pdata.ldoena < 0) + arizona->pdata.ldoena = 0; + + ret = of_property_read_u32_array(arizona->dev->of_node, + "wlf,gpio-defaults", + arizona->pdata.gpio_defaults, + ARRAY_SIZE(arizona->pdata.gpio_defaults)); + if (ret >= 0) { + /* + * All values are literal except out of range values + * which are chip default, translate into platform + * data which uses 0 as chip default and out of range + * as zero. + */ + for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { + if (arizona->pdata.gpio_defaults[i] > 0xffff) + arizona->pdata.gpio_defaults[i] = 0; + if (arizona->pdata.gpio_defaults[i] == 0) + arizona->pdata.gpio_defaults[i] = 0x10000; + } + } else { + dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n", + ret); + } + + return 0; +} + +const struct of_device_id arizona_of_match[] = { + { .compatible = "wlf,wm5102", .data = (void *)WM5102 }, + { .compatible = "wlf,wm5110", .data = (void *)WM5110 }, + {}, +}; +EXPORT_SYMBOL_GPL(arizona_of_match); +#else +static inline int arizona_of_get_core_pdata(struct arizona *arizona) +{ + return 0; +} +#endif + static struct mfd_cell early_devs[] = { { .name = "arizona-ldo1" }, }; @@ -462,6 +529,8 @@ int arizona_dev_init(struct arizona *arizona) dev_set_drvdata(arizona->dev, arizona); mutex_init(&arizona->clk_lock); + arizona_of_get_core_pdata(arizona); + if (dev_get_platdata(arizona->dev)) memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), sizeof(arizona->pdata)); diff --git a/drivers/mfd/arizona-i2c.c b/drivers/mfd/arizona-i2c.c index 44a1bb96984..deb267ebf84 100644 --- a/drivers/mfd/arizona-i2c.c +++ b/drivers/mfd/arizona-i2c.c @@ -27,9 +27,14 @@ static int arizona_i2c_probe(struct i2c_client *i2c, { struct arizona *arizona; const struct regmap_config *regmap_config; - int ret; + int ret, type; - switch (id->driver_data) { + if (i2c->dev.of_node) + type = arizona_of_get_type(&i2c->dev); + else + type = id->driver_data; + + switch (type) { #ifdef CONFIG_MFD_WM5102 case WM5102: regmap_config = &wm5102_i2c_regmap; @@ -84,6 +89,7 @@ static struct i2c_driver arizona_i2c_driver = { .name = "arizona", .owner = THIS_MODULE, .pm = &arizona_pm_ops, + .of_match_table = of_match_ptr(arizona_of_match), }, .probe = arizona_i2c_probe, .remove = arizona_i2c_remove, diff --git a/drivers/mfd/arizona-spi.c b/drivers/mfd/arizona-spi.c index b57e642d2b4..47be7b35b5c 100644 --- a/drivers/mfd/arizona-spi.c +++ b/drivers/mfd/arizona-spi.c @@ -27,9 +27,14 @@ static int arizona_spi_probe(struct spi_device *spi) const struct spi_device_id *id = spi_get_device_id(spi); struct arizona *arizona; const struct regmap_config *regmap_config; - int ret; + int ret, type; - switch (id->driver_data) { + if (spi->dev.of_node) + type = arizona_of_get_type(&spi->dev); + else + type = id->driver_data; + + switch (type) { #ifdef CONFIG_MFD_WM5102 case WM5102: regmap_config = &wm5102_spi_regmap; @@ -84,6 +89,7 @@ static struct spi_driver arizona_spi_driver = { .name = "arizona", .owner = THIS_MODULE, .pm = &arizona_pm_ops, + .of_match_table = of_match_ptr(arizona_of_match), }, .probe = arizona_spi_probe, .remove = arizona_spi_remove, diff --git a/drivers/mfd/arizona.h b/drivers/mfd/arizona.h index 9798ae5da67..db55d9854a5 100644 --- a/drivers/mfd/arizona.h +++ b/drivers/mfd/arizona.h @@ -13,6 +13,7 @@ #ifndef _WM5102_H #define _WM5102_H +#include #include #include @@ -26,6 +27,8 @@ extern const struct regmap_config wm5110_spi_regmap; extern const struct dev_pm_ops arizona_pm_ops; +extern const struct of_device_id arizona_of_match[]; + extern const struct regmap_irq_chip wm5102_aod; extern const struct regmap_irq_chip wm5102_irq; @@ -37,4 +40,13 @@ int arizona_dev_exit(struct arizona *arizona); int arizona_irq_init(struct arizona *arizona); int arizona_irq_exit(struct arizona *arizona); +#ifdef CONFIG_OF +int arizona_of_get_type(struct device *dev); +#else +static inline int arizona_of_get_type(struct device *dev) +{ + return 0; +} +#endif + #endif From c626f8c34bfbd3fd6b60944f3fcf351ec8a7dbc7 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Tue, 23 Apr 2013 19:44:16 +0100 Subject: [PATCH 0006/1167] mfd: arizona: Support use of external DCVDD When the device is used with an external DCVDD supply instead of the internal LDO1 then an extra step is required when suspending and resuming the device. Signed-off-by: Mark Brown (cherry picked from commit 5927467d0ca274bc3b8eed9fd5db964bbde56e1c) Change-Id: I19ec545b86012821110b2e6054b7c87a8bd119f8 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 43 ++++++++++++++++++++++++++++++++ include/linux/mfd/arizona/core.h | 2 ++ 2 files changed, 45 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 767fead2242..73431e02c7d 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include @@ -347,6 +348,17 @@ static int arizona_runtime_resume(struct device *dev) switch (arizona->type) { case WM5102: + if (arizona->external_dcvdd) { + ret = regmap_update_bits(arizona->regmap, + ARIZONA_ISOLATION_CONTROL, + ARIZONA_ISOLATE_DCVDD1, 0); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to connect DCVDD: %d\n", ret); + goto err; + } + } + ret = wm5102_patch(arizona); if (ret != 0) { dev_err(arizona->dev, "Failed to apply patch: %d\n", @@ -368,6 +380,16 @@ static int arizona_runtime_resume(struct device *dev) goto err; } + if (arizona->external_dcvdd) { + ret = regmap_update_bits(arizona->regmap, + ARIZONA_ISOLATION_CONTROL, + ARIZONA_ISOLATE_DCVDD1, 0); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to connect DCVDD: %d\n", ret); + goto err; + } + } break; } @@ -388,9 +410,22 @@ static int arizona_runtime_resume(struct device *dev) static int arizona_runtime_suspend(struct device *dev) { struct arizona *arizona = dev_get_drvdata(dev); + int ret; dev_dbg(arizona->dev, "Entering AoD mode\n"); + if (arizona->external_dcvdd) { + ret = regmap_update_bits(arizona->regmap, + ARIZONA_ISOLATION_CONTROL, + ARIZONA_ISOLATE_DCVDD1, + ARIZONA_ISOLATE_DCVDD1); + if (ret != 0) { + dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", + ret); + return ret; + } + } + regulator_disable(arizona->dcvdd); regcache_cache_only(arizona->regmap, true); regcache_mark_dirty(arizona->regmap); @@ -738,6 +773,14 @@ int arizona_dev_init(struct arizona *arizona) arizona->pdata.gpio_defaults[i]); } + /* + * LDO1 can only be used to supply DCVDD so if it has no + * consumers then DCVDD is supplied externally. + */ + if (arizona->pdata.ldo1 && + arizona->pdata.ldo1->num_consumer_supplies == 0) + arizona->external_dcvdd = true; + pm_runtime_set_autosuspend_delay(arizona->dev, 100); pm_runtime_use_autosuspend(arizona->dev); pm_runtime_enable(arizona->dev); diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index cc281368dc5..f797bb9b8b5 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -95,6 +95,8 @@ struct arizona { struct arizona_pdata pdata; + unsigned int external_dcvdd:1; + int irq; struct irq_domain *virq; struct regmap_irq_chip_data *aod_irq_chip; From 8efaa814e59e59aa5a05502c225d5cd35bd9079a Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Fri, 17 May 2013 13:29:03 +0100 Subject: [PATCH 0007/1167] ASoC: arizona: Provide simple DAI ops for autoconfiguring interfaces Signed-off-by: Mark Brown (cherry picked from commit bd1dd8856998408dd72768930958ea2dc84296a9) Change-Id: I875b636b496338c4a53c73c23286c22614abbde8 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 7 +++++++ sound/soc/codecs/arizona.h | 3 ++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index fa3860d947c..bbb28420a78 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1198,6 +1198,13 @@ const struct snd_soc_dai_ops arizona_dai_ops = { }; EXPORT_SYMBOL_GPL(arizona_dai_ops); +const struct snd_soc_dai_ops arizona_simple_dai_ops = { + .startup = arizona_startup, + .hw_params = arizona_hw_params_rate, + .set_sysclk = arizona_dai_set_sysclk, +}; +EXPORT_SYMBOL_GPL(arizona_simple_dai_ops); + int arizona_init_dai(struct arizona_priv *priv, int id) { struct arizona_dai_priv *dai_priv = &priv->dai[id]; diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index af39f100642..b60b08ccc1d 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -57,7 +57,7 @@ #define ARIZONA_CLK_98MHZ 5 #define ARIZONA_CLK_147MHZ 6 -#define ARIZONA_MAX_DAI 4 +#define ARIZONA_MAX_DAI 6 #define ARIZONA_MAX_ADSP 4 struct arizona; @@ -213,6 +213,7 @@ extern int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id, int source, unsigned int freq, int dir); extern const struct snd_soc_dai_ops arizona_dai_ops; +extern const struct snd_soc_dai_ops arizona_simple_dai_ops; #define ARIZONA_FLL_NAME_LEN 20 From 3ac68c937e6c61fdc26e10ca17e5b95701149f22 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 16 May 2013 14:30:28 +0100 Subject: [PATCH 0008/1167] ASoC: wm5102: Correct OSR control name for EPOUT Signed-off-by: Charles Keepax Signed-off-by: Mark Brown (cherry picked from commit a64cbb949a18a8eefc40881e6e68734ca7275d36) Change-Id: Ic9a35d4842ba637d3d0bef587e408f6821daeb53 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5102.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 100fdadda56..d3124316ec7 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -814,7 +814,7 @@ SOC_DOUBLE_R_TLV("SPKDAT1 Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_5L, SOC_VALUE_ENUM("HPOUT1 OSR", wm5102_hpout_osr[0]), SOC_VALUE_ENUM("HPOUT2 OSR", wm5102_hpout_osr[1]), -SOC_VALUE_ENUM("HPOUT3 OSR", wm5102_hpout_osr[2]), +SOC_VALUE_ENUM("EPOUT OSR", wm5102_hpout_osr[2]), SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp), SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp), From 10c9b243886ead41212ec68ecb155265bef22d75 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 21 May 2013 14:56:58 +0100 Subject: [PATCH 0009/1167] mfd: arizona: Change fast_start pdata name to better reflect functionality The bit in the register enables MICBIAS fast startup when clear not when set. This patch changes the name of this pdata option to soft_start to better match the functionality. We rename rather than invert the handling to keep the same default functionality, which is fast start active. Signed-off-by: Charles Keepax Signed-off-by: Mark Brown (cherry picked from commit f773fc6dca4619bdf8da767eaba101a83b766059) Change-Id: I8785b3a0c237e5ff9c40ab6e6e29dbe443e8b006 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 2 +- include/linux/mfd/arizona/pdata.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 73431e02c7d..4aacb982a7b 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -827,7 +827,7 @@ int arizona_dev_init(struct arizona *arizona) if (arizona->pdata.micbias[i].discharge) val |= ARIZONA_MICB1_DISCH; - if (arizona->pdata.micbias[i].fast_start) + if (arizona->pdata.micbias[i].soft_start) val |= ARIZONA_MICB1_RATE; if (arizona->pdata.micbias[i].bypass) diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 80dead1f710..12a5c135c74 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -77,7 +77,7 @@ struct arizona_micbias { int mV; /** Regulated voltage */ unsigned int ext_cap:1; /** External capacitor fitted */ unsigned int discharge:1; /** Actively discharge */ - unsigned int fast_start:1; /** Enable aggressive startup ramp rate */ + unsigned int soft_start:1; /** Disable aggressive startup ramp rate */ unsigned int bypass:1; /** Use bypass mode */ }; From 7997936bfae8ca5dc3b3a87a905f8cba564da724 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 22 May 2013 18:55:25 -0500 Subject: [PATCH 0010/1167] mfd: wm5110: Make DSPn_STATUS_3 readable These registers have been documented since the driver was originally submitted so expose them. Signed-off-by: Mark Brown (cherry picked from commit e5657054ff508c9e547a8ceb931de07838ee3ba0) Change-Id: I231a5add18ae671675d5c6cb7f949c4410656f22 Signed-off-by: Charles Keepax --- drivers/mfd/wm5110-tables.c | 8 ++++++++ include/linux/mfd/arizona/registers.h | 3 +++ 2 files changed, 11 insertions(+) diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c index c4159981529..2a797234915 100644 --- a/drivers/mfd/wm5110-tables.c +++ b/drivers/mfd/wm5110-tables.c @@ -2273,18 +2273,22 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DSP1_CLOCKING_1: case ARIZONA_DSP1_STATUS_1: case ARIZONA_DSP1_STATUS_2: + case ARIZONA_DSP1_STATUS_3: case ARIZONA_DSP2_CONTROL_1: case ARIZONA_DSP2_CLOCKING_1: case ARIZONA_DSP2_STATUS_1: case ARIZONA_DSP2_STATUS_2: + case ARIZONA_DSP2_STATUS_3: case ARIZONA_DSP3_CONTROL_1: case ARIZONA_DSP3_CLOCKING_1: case ARIZONA_DSP3_STATUS_1: case ARIZONA_DSP3_STATUS_2: + case ARIZONA_DSP3_STATUS_3: case ARIZONA_DSP4_CONTROL_1: case ARIZONA_DSP4_CLOCKING_1: case ARIZONA_DSP4_STATUS_1: case ARIZONA_DSP4_STATUS_2: + case ARIZONA_DSP4_STATUS_3: return true; default: return false; @@ -2334,12 +2338,16 @@ static bool wm5110_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_DSP1_CLOCKING_1: case ARIZONA_DSP1_STATUS_1: case ARIZONA_DSP1_STATUS_2: + case ARIZONA_DSP1_STATUS_3: case ARIZONA_DSP2_STATUS_1: case ARIZONA_DSP2_STATUS_2: + case ARIZONA_DSP2_STATUS_3: case ARIZONA_DSP3_STATUS_1: case ARIZONA_DSP3_STATUS_2: + case ARIZONA_DSP3_STATUS_3: case ARIZONA_DSP4_STATUS_1: case ARIZONA_DSP4_STATUS_2: + case ARIZONA_DSP4_STATUS_3: return true; default: return false; diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 715b6ba3d52..4730b5c576e 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -1002,6 +1002,7 @@ #define ARIZONA_DSP2_CLOCKING_1 0x1201 #define ARIZONA_DSP2_STATUS_1 0x1204 #define ARIZONA_DSP2_STATUS_2 0x1205 +#define ARIZONA_DSP2_STATUS_3 0x1206 #define ARIZONA_DSP2_SCRATCH_0 0x1240 #define ARIZONA_DSP2_SCRATCH_1 0x1241 #define ARIZONA_DSP2_SCRATCH_2 0x1242 @@ -1010,6 +1011,7 @@ #define ARIZONA_DSP3_CLOCKING_1 0x1301 #define ARIZONA_DSP3_STATUS_1 0x1304 #define ARIZONA_DSP3_STATUS_2 0x1305 +#define ARIZONA_DSP3_STATUS_3 0x1306 #define ARIZONA_DSP3_SCRATCH_0 0x1340 #define ARIZONA_DSP3_SCRATCH_1 0x1341 #define ARIZONA_DSP3_SCRATCH_2 0x1342 @@ -1018,6 +1020,7 @@ #define ARIZONA_DSP4_CLOCKING_1 0x1401 #define ARIZONA_DSP4_STATUS_1 0x1404 #define ARIZONA_DSP4_STATUS_2 0x1405 +#define ARIZONA_DSP4_STATUS_3 0x1406 #define ARIZONA_DSP4_SCRATCH_0 0x1440 #define ARIZONA_DSP4_SCRATCH_1 0x1441 #define ARIZONA_DSP4_SCRATCH_2 0x1442 From 6a3f36ad8aefc57a6a2aa3804fe5713a6a904b6c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 17 Sep 2013 15:23:04 +0100 Subject: [PATCH 0011/1167] mfd: arizona: Update registers for WM5110 DSP DSPx_CONTROL_1 and DSPx_CLOCKING_1 are not volatile registers and are incorrectly marked as such, fix this. Also add the DSP scratch registers, which are frequently used to output debug info from the DSP core. Signed-off-by: Charles Keepax Signed-off-by: Lee Jones (cherry picked from commit 5832ae7cf741630d7fa6f79782c70e53f16f5e41) Change-Id: Ia49b909a4302a9e50ecd1cbbaa22006ac65d714a Signed-off-by: Charles Keepax --- drivers/mfd/wm5110-tables.c | 34 ++++++++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c index 2a797234915..37463f3f024 100644 --- a/drivers/mfd/wm5110-tables.c +++ b/drivers/mfd/wm5110-tables.c @@ -2274,21 +2274,37 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DSP1_STATUS_1: case ARIZONA_DSP1_STATUS_2: case ARIZONA_DSP1_STATUS_3: + case ARIZONA_DSP1_SCRATCH_0: + case ARIZONA_DSP1_SCRATCH_1: + case ARIZONA_DSP1_SCRATCH_2: + case ARIZONA_DSP1_SCRATCH_3: case ARIZONA_DSP2_CONTROL_1: case ARIZONA_DSP2_CLOCKING_1: case ARIZONA_DSP2_STATUS_1: case ARIZONA_DSP2_STATUS_2: case ARIZONA_DSP2_STATUS_3: + case ARIZONA_DSP2_SCRATCH_0: + case ARIZONA_DSP2_SCRATCH_1: + case ARIZONA_DSP2_SCRATCH_2: + case ARIZONA_DSP2_SCRATCH_3: case ARIZONA_DSP3_CONTROL_1: case ARIZONA_DSP3_CLOCKING_1: case ARIZONA_DSP3_STATUS_1: case ARIZONA_DSP3_STATUS_2: case ARIZONA_DSP3_STATUS_3: + case ARIZONA_DSP3_SCRATCH_0: + case ARIZONA_DSP3_SCRATCH_1: + case ARIZONA_DSP3_SCRATCH_2: + case ARIZONA_DSP3_SCRATCH_3: case ARIZONA_DSP4_CONTROL_1: case ARIZONA_DSP4_CLOCKING_1: case ARIZONA_DSP4_STATUS_1: case ARIZONA_DSP4_STATUS_2: case ARIZONA_DSP4_STATUS_3: + case ARIZONA_DSP4_SCRATCH_0: + case ARIZONA_DSP4_SCRATCH_1: + case ARIZONA_DSP4_SCRATCH_2: + case ARIZONA_DSP4_SCRATCH_3: return true; default: return false; @@ -2334,20 +2350,34 @@ static bool wm5110_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_AOD_IRQ2: case ARIZONA_ASRC_STATUS: case ARIZONA_DSP_STATUS: - case ARIZONA_DSP1_CONTROL_1: - case ARIZONA_DSP1_CLOCKING_1: case ARIZONA_DSP1_STATUS_1: case ARIZONA_DSP1_STATUS_2: case ARIZONA_DSP1_STATUS_3: + case ARIZONA_DSP1_SCRATCH_0: + case ARIZONA_DSP1_SCRATCH_1: + case ARIZONA_DSP1_SCRATCH_2: + case ARIZONA_DSP1_SCRATCH_3: case ARIZONA_DSP2_STATUS_1: case ARIZONA_DSP2_STATUS_2: case ARIZONA_DSP2_STATUS_3: + case ARIZONA_DSP2_SCRATCH_0: + case ARIZONA_DSP2_SCRATCH_1: + case ARIZONA_DSP2_SCRATCH_2: + case ARIZONA_DSP2_SCRATCH_3: case ARIZONA_DSP3_STATUS_1: case ARIZONA_DSP3_STATUS_2: case ARIZONA_DSP3_STATUS_3: + case ARIZONA_DSP3_SCRATCH_0: + case ARIZONA_DSP3_SCRATCH_1: + case ARIZONA_DSP3_SCRATCH_2: + case ARIZONA_DSP3_SCRATCH_3: case ARIZONA_DSP4_STATUS_1: case ARIZONA_DSP4_STATUS_2: case ARIZONA_DSP4_STATUS_3: + case ARIZONA_DSP4_SCRATCH_0: + case ARIZONA_DSP4_SCRATCH_1: + case ARIZONA_DSP4_SCRATCH_2: + case ARIZONA_DSP4_SCRATCH_3: return true; default: return false; From 6b33c71d57aab021ad68fce07f2d681e138566e7 Mon Sep 17 00:00:00 2001 From: Dimitris Papastamos Date: Tue, 28 May 2013 12:01:50 +0100 Subject: [PATCH 0012/1167] ASoC: wm_adsp: Ensure set controls are synced on each boot Rename `dirty' to `set' as it is a bit more descriptive. A set control is any control that has been set by the user. We need to ensure that everytime we boot the DSP we sync out any controls that were set. We could at some point start keeping track of the default values of the controls to suppress some of the device I/O. Signed-off-by: Dimitris Papastamos Signed-off-by: Mark Brown (cherry picked from commit 0c2e3f3420bb790a4e5bc14d3d50a722964ad73e) Change-Id: I2030f97abce635a8755cd75ab16910dae584171a Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 13783061192..dcb2f5af827 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -242,7 +242,7 @@ struct wm_coeff_ctl { struct list_head list; void *cache; size_t len; - unsigned int dirty:1; + unsigned int set:1; struct snd_kcontrol *kcontrol; }; @@ -424,7 +424,7 @@ static int wm_coeff_put(struct snd_kcontrol *kcontrol, memcpy(ctl->cache, p, ctl->len); if (!ctl->enabled) { - ctl->dirty = 1; + ctl->set = 1; return 0; } @@ -760,7 +760,7 @@ static int wm_coeff_init_control_caches(struct wm_coeff *wm_coeff) list_for_each_entry(ctl, &wm_coeff->ctl_list, list) { - if (!ctl->enabled || ctl->dirty) + if (!ctl->enabled || ctl->set) continue; ret = wm_coeff_read_control(ctl->kcontrol, ctl->cache, @@ -781,13 +781,12 @@ static int wm_coeff_sync_controls(struct wm_coeff *wm_coeff) list) { if (!ctl->enabled) continue; - if (ctl->dirty) { + if (ctl->set) { ret = wm_coeff_write_control(ctl->kcontrol, ctl->cache, ctl->len); if (ret < 0) return ret; - ctl->dirty = 0; } } @@ -863,7 +862,7 @@ static int wm_adsp_create_control(struct snd_soc_codec *codec, goto err_ctl; } ctl->enabled = 1; - ctl->dirty = 0; + ctl->set = 0; ctl->ops.xget = wm_coeff_get; ctl->ops.xput = wm_coeff_put; ctl->card = codec->card->snd_card; @@ -1432,12 +1431,12 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, if (ret != 0) goto err; - /* Initialize caches for enabled and non-dirty controls */ + /* Initialize caches for enabled and unset controls */ ret = wm_coeff_init_control_caches(dsp->wm_coeff); if (ret != 0) goto err; - /* Sync dirty controls */ + /* Sync set controls */ ret = wm_coeff_sync_controls(dsp->wm_coeff); if (ret != 0) goto err; @@ -1589,12 +1588,12 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, if (ret != 0) goto err; - /* Initialize caches for enabled and non-dirty controls */ + /* Initialize caches for enabled and unset controls */ ret = wm_coeff_init_control_caches(dsp->wm_coeff); if (ret != 0) goto err; - /* Sync dirty controls */ + /* Sync set controls */ ret = wm_coeff_sync_controls(dsp->wm_coeff); if (ret != 0) goto err; From e91b9e690e4473410a94c1e92ce070919ed8ba12 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 12 Jun 2013 17:44:07 +0100 Subject: [PATCH 0013/1167] mfd: wm5102: Expose DRE control registers Certain use cases may require specific DRE settings so expose the necessary registers. Signed-off-by: Charles Keepax Signed-off-by: Mark Brown (cherry picked from commit 1b4d7d9787beb45a51c1ccf2f0a7fcee9213fb38) Change-Id: I5e254802dcc2f59dbfdbf11ca595fe957b219517 Signed-off-by: Charles Keepax --- drivers/mfd/wm5102-tables.c | 9 +++++- include/linux/mfd/arizona/registers.h | 44 +++++++++++++++++++++++++++ 2 files changed, 52 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index 7dec3adbc73..bc6b0cf9afe 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -65,7 +65,8 @@ static const struct reg_default wm5102_revb_patch[] = { { 0x418, 0xa080 }, { 0x420, 0xa080 }, { 0x428, 0xe000 }, - { 0x443, 0xDC1A }, + { 0x442, 0x3F0A }, + { 0x443, 0xDC1F }, { 0x4B0, 0x0066 }, { 0x458, 0x000b }, { 0x212, 0x0000 }, @@ -426,6 +427,9 @@ static const struct reg_default wm5102_reg_default[] = { { 0x00000435, 0x0180 }, /* R1077 - DAC Digital Volume 5R */ { 0x00000436, 0x0081 }, /* R1078 - DAC Volume Limit 5R */ { 0x00000437, 0x0200 }, /* R1079 - Noise Gate Select 5R */ + { 0x00000440, 0x8FFF }, /* R1088 - DRE Enable */ + { 0x00000442, 0x3F0A }, /* R1090 - DRE Control 2 */ + { 0x00000443, 0xDC1F }, /* R1090 - DRE Control 3 */ { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */ { 0x00000458, 0x000B }, /* R1112 - Noise Gate Control */ { 0x00000490, 0x0069 }, /* R1168 - PDM SPK1 CTRL 1 */ @@ -1199,6 +1203,9 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DAC_DIGITAL_VOLUME_5R: case ARIZONA_DAC_VOLUME_LIMIT_5R: case ARIZONA_NOISE_GATE_SELECT_5R: + case ARIZONA_DRE_ENABLE: + case ARIZONA_DRE_CONTROL_2: + case ARIZONA_DRE_CONTROL_3: case ARIZONA_DAC_AEC_CONTROL_1: case ARIZONA_NOISE_GATE_CONTROL: case ARIZONA_PDM_SPK1_CTRL_1: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 4730b5c576e..4706d3d46e5 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -215,6 +215,9 @@ #define ARIZONA_DAC_DIGITAL_VOLUME_6R 0x43D #define ARIZONA_DAC_VOLUME_LIMIT_6R 0x43E #define ARIZONA_NOISE_GATE_SELECT_6R 0x43F +#define ARIZONA_DRE_ENABLE 0x440 +#define ARIZONA_DRE_CONTROL_2 0x442 +#define ARIZONA_DRE_CONTROL_3 0x443 #define ARIZONA_DAC_AEC_CONTROL_1 0x450 #define ARIZONA_NOISE_GATE_CONTROL 0x458 #define ARIZONA_PDM_SPK1_CTRL_1 0x490 @@ -3132,6 +3135,47 @@ #define ARIZONA_OUT6R_NGATE_SRC_SHIFT 0 /* OUT6R_NGATE_SRC - [11:0] */ #define ARIZONA_OUT6R_NGATE_SRC_WIDTH 12 /* OUT6R_NGATE_SRC - [11:0] */ +/* + * R1088 (0x440) - DRE Enable + */ +#define ARIZONA_DRE3L_ENA 0x0010 /* DRE3L_ENA */ +#define ARIZONA_DRE3L_ENA_MASK 0x0010 /* DRE3L_ENA */ +#define ARIZONA_DRE3L_ENA_SHIFT 4 /* DRE3L_ENA */ +#define ARIZONA_DRE3L_ENA_WIDTH 1 /* DRE3L_ENA */ +#define ARIZONA_DRE2R_ENA 0x0008 /* DRE2R_ENA */ +#define ARIZONA_DRE2R_ENA_MASK 0x0008 /* DRE2R_ENA */ +#define ARIZONA_DRE2R_ENA_SHIFT 3 /* DRE2R_ENA */ +#define ARIZONA_DRE2R_ENA_WIDTH 1 /* DRE2R_ENA */ +#define ARIZONA_DRE2L_ENA 0x0004 /* DRE2L_ENA */ +#define ARIZONA_DRE2L_ENA_MASK 0x0004 /* DRE2L_ENA */ +#define ARIZONA_DRE2L_ENA_SHIFT 2 /* DRE2L_ENA */ +#define ARIZONA_DRE2L_ENA_WIDTH 1 /* DRE2L_ENA */ +#define ARIZONA_DRE1R_ENA 0x0002 /* DRE1R_ENA */ +#define ARIZONA_DRE1R_ENA_MASK 0x0002 /* DRE1R_ENA */ +#define ARIZONA_DRE1R_ENA_SHIFT 1 /* DRE1R_ENA */ +#define ARIZONA_DRE1R_ENA_WIDTH 1 /* DRE1R_ENA */ +#define ARIZONA_DRE1L_ENA 0x0001 /* DRE1L_ENA */ +#define ARIZONA_DRE1L_ENA_MASK 0x0001 /* DRE1L_ENA */ +#define ARIZONA_DRE1L_ENA_SHIFT 0 /* DRE1L_ENA */ +#define ARIZONA_DRE1L_ENA_WIDTH 1 /* DRE1L_ENA */ + +/* + * R1090 (0x442) - DRE Control 2 + */ +#define ARIZONA_DRE_T_LOW_MASK 0x3F00 /* DRE_T_LOW - [13:8] */ +#define ARIZONA_DRE_T_LOW_SHIFT 8 /* DRE_T_LOW - [13:8] */ +#define ARIZONA_DRE_T_LOW_WIDTH 6 /* DRE_T_LOW - [13:8] */ + +/* + * R1091 (0x443) - DRE Control 3 + */ +#define ARIZONA_DRE_GAIN_SHIFT_MASK 0xC000 /* DRE_GAIN_SHIFT - [15:14] */ +#define ARIZONA_DRE_GAIN_SHIFT_SHIFT 14 /* DRE_GAIN_SHIFT - [15:14] */ +#define ARIZONA_DRE_GAIN_SHIFT_WIDTH 2 /* DRE_GAIN_SHIFT - [15:14] */ +#define ARIZONA_DRE_LOW_LEVEL_ABS_MASK 0x000F /* LOW_LEVEL_ABS - [3:0] */ +#define ARIZONA_DRE_LOW_LEVEL_ABS_SHIFT 0 /* LOW_LEVEL_ABS - [3:0] */ +#define ARIZONA_DRE_LOW_LEVEL_ABS_WIDTH 4 /* LOW_LEVEL_ABS - [3:0] */ + /* * R1104 (0x450) - DAC AEC Control 1 */ From 5758c71e168ceff5f3704aee52595fffd69acb86 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 12 Jun 2013 17:44:08 +0100 Subject: [PATCH 0014/1167] ASoC: wm5102: Expose controls for DRE Certain use cases may require specific DRE settings so expose control of these. Signed-off-by: Charles Keepax Signed-off-by: Mark Brown (cherry picked from commit 7c470373e097822ce6ca7bbac44b3afec0e7c1f8) Change-Id: I41e382b5a56ac8125857d12f5104a25d4097ffc3 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5102.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index d3124316ec7..4af0515f050 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -816,6 +816,19 @@ SOC_VALUE_ENUM("HPOUT1 OSR", wm5102_hpout_osr[0]), SOC_VALUE_ENUM("HPOUT2 OSR", wm5102_hpout_osr[1]), SOC_VALUE_ENUM("EPOUT OSR", wm5102_hpout_osr[2]), +SOC_DOUBLE("HPOUT1 DRE Switch", ARIZONA_DRE_ENABLE, + ARIZONA_DRE1L_ENA_SHIFT, ARIZONA_DRE1R_ENA_SHIFT, 1, 0), +SOC_DOUBLE("HPOUT2 DRE Switch", ARIZONA_DRE_ENABLE, + ARIZONA_DRE2L_ENA_SHIFT, ARIZONA_DRE2R_ENA_SHIFT, 1, 0), +SOC_SINGLE("EPOUT DRE Switch", ARIZONA_DRE_ENABLE, + ARIZONA_DRE3L_ENA_SHIFT, 1, 0), + +SOC_SINGLE("DRE Threshold", ARIZONA_DRE_CONTROL_2, + ARIZONA_DRE_T_LOW_SHIFT, 63, 0), + +SOC_SINGLE("DRE Low Level ABS", ARIZONA_DRE_CONTROL_3, + ARIZONA_DRE_LOW_LEVEL_ABS_SHIFT, 15, 0), + SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp), SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp), From 66a9843a203661decf14f1dc08df9df74cc613fe Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Fri, 17 May 2013 13:29:04 +0100 Subject: [PATCH 0015/1167] ASoC: wm5102: Stub hookup for Slimbus interface Signed-off-by: Mark Brown (cherry picked from commit 1804aff60d3bfe34223744ec8c301699bc0b0407) Change-Id: I530c7000bec6af2915ecfedd2ef7b39a2d65115f Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5102.c | 179 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 179 insertions(+) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 4af0515f050..4662a51e6ac 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -865,6 +865,15 @@ ARIZONA_MIXER_CONTROLS("AIF2TX2", ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("AIF3TX1", ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("AIF3TX2", ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("SLIMTX1", ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX2", ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX3", ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX4", ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX5", ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX6", ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX7", ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX8", ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE), }; ARIZONA_MIXER_ENUMS(EQ1, ARIZONA_EQ1MIX_INPUT_1_SOURCE); @@ -911,6 +920,15 @@ ARIZONA_MIXER_ENUMS(AIF2TX2, ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE); ARIZONA_MIXER_ENUMS(AIF3TX1, ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE); ARIZONA_MIXER_ENUMS(AIF3TX2, ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX1, ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX2, ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX3, ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX4, ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX5, ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX6, ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX7, ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX8, ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE); + ARIZONA_MUX_ENUMS(ASRC1L, ARIZONA_ASRC1LMIX_INPUT_1_SOURCE); ARIZONA_MUX_ENUMS(ASRC1R, ARIZONA_ASRC1RMIX_INPUT_1_SOURCE); ARIZONA_MUX_ENUMS(ASRC2L, ARIZONA_ASRC2LMIX_INPUT_1_SOURCE); @@ -1130,6 +1148,56 @@ SND_SOC_DAPM_AIF_IN("AIF3RX1", NULL, 0, SND_SOC_DAPM_AIF_IN("AIF3RX2", NULL, 0, ARIZONA_AIF3_RX_ENABLES, ARIZONA_AIF3RX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX1", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX2", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX3", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX4", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX5", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX6", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX7", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX8", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("SLIMRX1", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX2", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX3", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX4", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX5", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX6", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX7", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX8", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX8_ENA_SHIFT, 0), + ARIZONA_DSP_WIDGETS(DSP1, "DSP1"), SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, @@ -1202,6 +1270,15 @@ ARIZONA_MIXER_WIDGETS(AIF2TX2, "AIF2TX2"), ARIZONA_MIXER_WIDGETS(AIF3TX1, "AIF3TX1"), ARIZONA_MIXER_WIDGETS(AIF3TX2, "AIF3TX2"), +ARIZONA_MIXER_WIDGETS(SLIMTX1, "SLIMTX1"), +ARIZONA_MIXER_WIDGETS(SLIMTX2, "SLIMTX2"), +ARIZONA_MIXER_WIDGETS(SLIMTX3, "SLIMTX3"), +ARIZONA_MIXER_WIDGETS(SLIMTX4, "SLIMTX4"), +ARIZONA_MIXER_WIDGETS(SLIMTX5, "SLIMTX5"), +ARIZONA_MIXER_WIDGETS(SLIMTX6, "SLIMTX6"), +ARIZONA_MIXER_WIDGETS(SLIMTX7, "SLIMTX7"), +ARIZONA_MIXER_WIDGETS(SLIMTX8, "SLIMTX8"), + ARIZONA_MUX_WIDGETS(ASRC1L, "ASRC1L"), ARIZONA_MUX_WIDGETS(ASRC1R, "ASRC1R"), ARIZONA_MUX_WIDGETS(ASRC2L, "ASRC2L"), @@ -1262,6 +1339,14 @@ SND_SOC_DAPM_OUTPUT("MICSUPP"), { name, "AIF2RX2", "AIF2RX2" }, \ { name, "AIF3RX1", "AIF3RX1" }, \ { name, "AIF3RX2", "AIF3RX2" }, \ + { name, "SLIMRX1", "SLIMRX1" }, \ + { name, "SLIMRX2", "SLIMRX2" }, \ + { name, "SLIMRX3", "SLIMRX3" }, \ + { name, "SLIMRX4", "SLIMRX4" }, \ + { name, "SLIMRX5", "SLIMRX5" }, \ + { name, "SLIMRX6", "SLIMRX6" }, \ + { name, "SLIMRX7", "SLIMRX7" }, \ + { name, "SLIMRX8", "SLIMRX8" }, \ { name, "EQ1", "EQ1" }, \ { name, "EQ2", "EQ2" }, \ { name, "EQ3", "EQ3" }, \ @@ -1358,13 +1443,41 @@ static const struct snd_soc_dapm_route wm5102_dapm_routes[] = { { "AIF3RX1", NULL, "AIF3 Playback" }, { "AIF3RX2", NULL, "AIF3 Playback" }, + { "Slim1 Capture", NULL, "SLIMTX1" }, + { "Slim1 Capture", NULL, "SLIMTX2" }, + { "Slim1 Capture", NULL, "SLIMTX3" }, + { "Slim1 Capture", NULL, "SLIMTX4" }, + + { "SLIMRX1", NULL, "Slim1 Playback" }, + { "SLIMRX2", NULL, "Slim1 Playback" }, + { "SLIMRX3", NULL, "Slim1 Playback" }, + { "SLIMRX4", NULL, "Slim1 Playback" }, + + { "Slim2 Capture", NULL, "SLIMTX5" }, + { "Slim2 Capture", NULL, "SLIMTX6" }, + + { "SLIMRX5", NULL, "Slim2 Playback" }, + { "SLIMRX6", NULL, "Slim2 Playback" }, + + { "Slim3 Capture", NULL, "SLIMTX7" }, + { "Slim3 Capture", NULL, "SLIMTX8" }, + + { "SLIMRX7", NULL, "Slim3 Playback" }, + { "SLIMRX8", NULL, "Slim3 Playback" }, + { "AIF1 Playback", NULL, "SYSCLK" }, { "AIF2 Playback", NULL, "SYSCLK" }, { "AIF3 Playback", NULL, "SYSCLK" }, + { "Slim1 Playback", NULL, "SYSCLK" }, + { "Slim2 Playback", NULL, "SYSCLK" }, + { "Slim3 Playback", NULL, "SYSCLK" }, { "AIF1 Capture", NULL, "SYSCLK" }, { "AIF2 Capture", NULL, "SYSCLK" }, { "AIF3 Capture", NULL, "SYSCLK" }, + { "Slim1 Capture", NULL, "SYSCLK" }, + { "Slim2 Capture", NULL, "SYSCLK" }, + { "Slim3 Capture", NULL, "SYSCLK" }, { "IN1L PGA", NULL, "IN1L" }, { "IN1R PGA", NULL, "IN1R" }, @@ -1421,6 +1534,15 @@ static const struct snd_soc_dapm_route wm5102_dapm_routes[] = { ARIZONA_MIXER_ROUTES("AIF3TX1", "AIF3TX1"), ARIZONA_MIXER_ROUTES("AIF3TX2", "AIF3TX2"), + ARIZONA_MIXER_ROUTES("SLIMTX1", "SLIMTX1"), + ARIZONA_MIXER_ROUTES("SLIMTX2", "SLIMTX2"), + ARIZONA_MIXER_ROUTES("SLIMTX3", "SLIMTX3"), + ARIZONA_MIXER_ROUTES("SLIMTX4", "SLIMTX4"), + ARIZONA_MIXER_ROUTES("SLIMTX5", "SLIMTX5"), + ARIZONA_MIXER_ROUTES("SLIMTX6", "SLIMTX6"), + ARIZONA_MIXER_ROUTES("SLIMTX7", "SLIMTX7"), + ARIZONA_MIXER_ROUTES("SLIMTX8", "SLIMTX8"), + ARIZONA_MIXER_ROUTES("EQ1", "EQ1"), ARIZONA_MIXER_ROUTES("EQ2", "EQ2"), ARIZONA_MIXER_ROUTES("EQ3", "EQ3"), @@ -1573,6 +1695,63 @@ static struct snd_soc_dai_driver wm5102_dai[] = { .ops = &arizona_dai_ops, .symmetric_rates = 1, }, + { + .name = "wm5102-slim1", + .id = 4, + .playback = { + .stream_name = "Slim1 Playback", + .channels_min = 1, + .channels_max = 4, + .rates = WM5102_RATES, + .formats = WM5102_FORMATS, + }, + .capture = { + .stream_name = "Slim1 Capture", + .channels_min = 1, + .channels_max = 4, + .rates = WM5102_RATES, + .formats = WM5102_FORMATS, + }, + .ops = &arizona_simple_dai_ops, + }, + { + .name = "wm5102-slim2", + .id = 5, + .playback = { + .stream_name = "Slim2 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = WM5102_RATES, + .formats = WM5102_FORMATS, + }, + .capture = { + .stream_name = "Slim2 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = WM5102_RATES, + .formats = WM5102_FORMATS, + }, + .ops = &arizona_simple_dai_ops, + }, + { + .name = "wm5102-slim3", + .id = 6, + .playback = { + .stream_name = "Slim3 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = WM5102_RATES, + .formats = WM5102_FORMATS, + }, + .capture = { + .stream_name = "Slim3 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = WM5102_RATES, + .formats = WM5102_FORMATS, + }, + .ops = &arizona_simple_dai_ops, + }, }; static int wm5102_codec_probe(struct snd_soc_codec *codec) From 5fb132bc2f95b5d8453e8f3575dcb0af41863dad Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Fri, 17 May 2013 13:29:05 +0100 Subject: [PATCH 0016/1167] ASoC: wm5110: Stub hookup for Slimbus interface Signed-off-by: Mark Brown (cherry picked from commit d217f9055631fb910f4f2e09ccf6446d93ff6533) Change-Id: I57b3086ed7248d45344ab8111612a51249741497 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5110.c | 179 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 179 insertions(+) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 88ad7db52dd..b4b6e2c8426 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -309,6 +309,15 @@ ARIZONA_MIXER_CONTROLS("AIF2TX2", ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("AIF3TX1", ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("AIF3TX2", ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("SLIMTX1", ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX2", ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX3", ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX4", ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX5", ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX6", ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX7", ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX8", ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE), }; ARIZONA_MIXER_ENUMS(EQ1, ARIZONA_EQ1MIX_INPUT_1_SOURCE); @@ -360,6 +369,15 @@ ARIZONA_MIXER_ENUMS(AIF2TX2, ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE); ARIZONA_MIXER_ENUMS(AIF3TX1, ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE); ARIZONA_MIXER_ENUMS(AIF3TX2, ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX1, ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX2, ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX3, ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX4, ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX5, ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX6, ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX7, ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX8, ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE); + ARIZONA_MUX_ENUMS(ASRC1L, ARIZONA_ASRC1LMIX_INPUT_1_SOURCE); ARIZONA_MUX_ENUMS(ASRC1R, ARIZONA_ASRC1RMIX_INPUT_1_SOURCE); ARIZONA_MUX_ENUMS(ASRC2L, ARIZONA_ASRC2LMIX_INPUT_1_SOURCE); @@ -550,6 +568,56 @@ SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0, SND_SOC_DAPM_AIF_IN("AIF2RX2", NULL, 0, ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX1", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX2", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX3", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX4", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX5", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX6", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX7", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX8", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("SLIMTX1", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX2", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX3", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX4", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX5", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX6", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX7", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX8", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX8_ENA_SHIFT, 0), + SND_SOC_DAPM_AIF_OUT("AIF3TX1", NULL, 0, ARIZONA_AIF3_TX_ENABLES, ARIZONA_AIF3TX1_ENA_SHIFT, 0), SND_SOC_DAPM_AIF_OUT("AIF3TX2", NULL, 0, @@ -640,6 +708,15 @@ ARIZONA_MIXER_WIDGETS(AIF2TX2, "AIF2TX2"), ARIZONA_MIXER_WIDGETS(AIF3TX1, "AIF3TX1"), ARIZONA_MIXER_WIDGETS(AIF3TX2, "AIF3TX2"), +ARIZONA_MIXER_WIDGETS(SLIMTX1, "SLIMTX1"), +ARIZONA_MIXER_WIDGETS(SLIMTX2, "SLIMTX2"), +ARIZONA_MIXER_WIDGETS(SLIMTX3, "SLIMTX3"), +ARIZONA_MIXER_WIDGETS(SLIMTX4, "SLIMTX4"), +ARIZONA_MIXER_WIDGETS(SLIMTX5, "SLIMTX5"), +ARIZONA_MIXER_WIDGETS(SLIMTX6, "SLIMTX6"), +ARIZONA_MIXER_WIDGETS(SLIMTX7, "SLIMTX7"), +ARIZONA_MIXER_WIDGETS(SLIMTX8, "SLIMTX8"), + ARIZONA_MUX_WIDGETS(ASRC1L, "ASRC1L"), ARIZONA_MUX_WIDGETS(ASRC1R, "ASRC1R"), ARIZONA_MUX_WIDGETS(ASRC2L, "ASRC2L"), @@ -690,6 +767,14 @@ SND_SOC_DAPM_OUTPUT("MICSUPP"), { name, "AIF2RX2", "AIF2RX2" }, \ { name, "AIF3RX1", "AIF3RX1" }, \ { name, "AIF3RX2", "AIF3RX2" }, \ + { name, "SLIMRX1", "SLIMRX1" }, \ + { name, "SLIMRX2", "SLIMRX2" }, \ + { name, "SLIMRX3", "SLIMRX3" }, \ + { name, "SLIMRX4", "SLIMRX4" }, \ + { name, "SLIMRX5", "SLIMRX5" }, \ + { name, "SLIMRX6", "SLIMRX6" }, \ + { name, "SLIMRX7", "SLIMRX7" }, \ + { name, "SLIMRX8", "SLIMRX8" }, \ { name, "EQ1", "EQ1" }, \ { name, "EQ2", "EQ2" }, \ { name, "EQ3", "EQ3" }, \ @@ -777,13 +862,41 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { { "AIF3RX1", NULL, "AIF3 Playback" }, { "AIF3RX2", NULL, "AIF3 Playback" }, + { "Slim1 Capture", NULL, "SLIMTX1" }, + { "Slim1 Capture", NULL, "SLIMTX2" }, + { "Slim1 Capture", NULL, "SLIMTX3" }, + { "Slim1 Capture", NULL, "SLIMTX4" }, + + { "SLIMRX1", NULL, "Slim1 Playback" }, + { "SLIMRX2", NULL, "Slim1 Playback" }, + { "SLIMRX3", NULL, "Slim1 Playback" }, + { "SLIMRX4", NULL, "Slim1 Playback" }, + + { "Slim2 Capture", NULL, "SLIMTX5" }, + { "Slim2 Capture", NULL, "SLIMTX6" }, + + { "SLIMRX5", NULL, "Slim2 Playback" }, + { "SLIMRX6", NULL, "Slim2 Playback" }, + + { "Slim3 Capture", NULL, "SLIMTX7" }, + { "Slim3 Capture", NULL, "SLIMTX8" }, + + { "SLIMRX7", NULL, "Slim3 Playback" }, + { "SLIMRX8", NULL, "Slim3 Playback" }, + { "AIF1 Playback", NULL, "SYSCLK" }, { "AIF2 Playback", NULL, "SYSCLK" }, { "AIF3 Playback", NULL, "SYSCLK" }, + { "Slim1 Playback", NULL, "SYSCLK" }, + { "Slim2 Playback", NULL, "SYSCLK" }, + { "Slim3 Playback", NULL, "SYSCLK" }, { "AIF1 Capture", NULL, "SYSCLK" }, { "AIF2 Capture", NULL, "SYSCLK" }, { "AIF3 Capture", NULL, "SYSCLK" }, + { "Slim1 Capture", NULL, "SYSCLK" }, + { "Slim2 Capture", NULL, "SYSCLK" }, + { "Slim3 Capture", NULL, "SYSCLK" }, { "IN1L PGA", NULL, "IN1L" }, { "IN1R PGA", NULL, "IN1R" }, @@ -829,6 +942,15 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { ARIZONA_MIXER_ROUTES("AIF3TX1", "AIF3TX1"), ARIZONA_MIXER_ROUTES("AIF3TX2", "AIF3TX2"), + ARIZONA_MIXER_ROUTES("SLIMTX1", "SLIMTX1"), + ARIZONA_MIXER_ROUTES("SLIMTX2", "SLIMTX2"), + ARIZONA_MIXER_ROUTES("SLIMTX3", "SLIMTX3"), + ARIZONA_MIXER_ROUTES("SLIMTX4", "SLIMTX4"), + ARIZONA_MIXER_ROUTES("SLIMTX5", "SLIMTX5"), + ARIZONA_MIXER_ROUTES("SLIMTX6", "SLIMTX6"), + ARIZONA_MIXER_ROUTES("SLIMTX7", "SLIMTX7"), + ARIZONA_MIXER_ROUTES("SLIMTX8", "SLIMTX8"), + ARIZONA_MIXER_ROUTES("EQ1", "EQ1"), ARIZONA_MIXER_ROUTES("EQ2", "EQ2"), ARIZONA_MIXER_ROUTES("EQ3", "EQ3"), @@ -963,6 +1085,63 @@ static struct snd_soc_dai_driver wm5110_dai[] = { .ops = &arizona_dai_ops, .symmetric_rates = 1, }, + { + .name = "wm5110-slim1", + .id = 4, + .playback = { + .stream_name = "Slim1 Playback", + .channels_min = 1, + .channels_max = 4, + .rates = WM5110_RATES, + .formats = WM5110_FORMATS, + }, + .capture = { + .stream_name = "Slim1 Capture", + .channels_min = 1, + .channels_max = 4, + .rates = WM5110_RATES, + .formats = WM5110_FORMATS, + }, + .ops = &arizona_simple_dai_ops, + }, + { + .name = "wm5110-slim2", + .id = 5, + .playback = { + .stream_name = "Slim2 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = WM5110_RATES, + .formats = WM5110_FORMATS, + }, + .capture = { + .stream_name = "Slim2 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = WM5110_RATES, + .formats = WM5110_FORMATS, + }, + .ops = &arizona_simple_dai_ops, + }, + { + .name = "wm5110-slim3", + .id = 6, + .playback = { + .stream_name = "Slim3 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = WM5110_RATES, + .formats = WM5110_FORMATS, + }, + .capture = { + .stream_name = "Slim3 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = WM5110_RATES, + .formats = WM5110_FORMATS, + }, + .ops = &arizona_simple_dai_ops, + }, }; static int wm5110_codec_probe(struct snd_soc_codec *codec) From 853c51a91e8d679da2e9f8a24cf38d67b7798587 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 14 Jun 2013 14:19:36 +0100 Subject: [PATCH 0017/1167] ASoC: wm5110: Correct rate control for DSP4 Reported-by: Dennis May Signed-off-by: Charles Keepax Signed-off-by: Mark Brown (cherry picked from commit 5be9c5b477bd3eda6bbe0f6e3431da45c3fd28f4) Change-Id: I364cca4797fecb7241a3e6a401259d969ebf4603 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index dcb2f5af827..0dee46ed887 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -310,7 +310,7 @@ static const struct soc_enum wm_adsp2_rate_enum[] = { ARIZONA_DSP1_RATE_SHIFT, 0xf, ARIZONA_RATE_ENUM_SIZE, arizona_rate_text, arizona_rate_val), - SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP3_CONTROL_1, + SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP4_CONTROL_1, ARIZONA_DSP1_RATE_SHIFT, 0xf, ARIZONA_RATE_ENUM_SIZE, arizona_rate_text, arizona_rate_val), From 5e798b553273a69811b18d3310970be589b8026c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 4 Jul 2013 08:56:27 +0100 Subject: [PATCH 0018/1167] mfd: arizona: Add GPIO control register bit definitions Signed-off-by: Charles Keepax Signed-off-by: Mark Brown (cherry picked from commit 326c29b6bedb7440b4232631686027af84a62cf5) Change-Id: I87522e6f3e99311d096c4033e21d105c70aab865 Signed-off-by: Charles Keepax --- include/linux/mfd/arizona/gpio.h | 96 ++++++++++++++++++++++++++++++++ 1 file changed, 96 insertions(+) create mode 100644 include/linux/mfd/arizona/gpio.h diff --git a/include/linux/mfd/arizona/gpio.h b/include/linux/mfd/arizona/gpio.h new file mode 100644 index 00000000000..d2146bb74f8 --- /dev/null +++ b/include/linux/mfd/arizona/gpio.h @@ -0,0 +1,96 @@ +/* + * GPIO configuration for Arizona devices + * + * Copyright 2013 Wolfson Microelectronics. PLC. + * + * Author: Charles Keepax + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _ARIZONA_GPIO_H +#define _ARIZONA_GPIO_H + +#define ARIZONA_GP_FN_TXLRCLK 0x00 +#define ARIZONA_GP_FN_GPIO 0x01 +#define ARIZONA_GP_FN_IRQ1 0x02 +#define ARIZONA_GP_FN_IRQ2 0x03 +#define ARIZONA_GP_FN_OPCLK 0x04 +#define ARIZONA_GP_FN_FLL1_OUT 0x05 +#define ARIZONA_GP_FN_FLL2_OUT 0x06 +#define ARIZONA_GP_FN_PWM1 0x08 +#define ARIZONA_GP_FN_PWM2 0x09 +#define ARIZONA_GP_FN_SYSCLK_UNDERCLOCKED 0x0A +#define ARIZONA_GP_FN_ASYNCCLK_UNDERCLOCKED 0x0B +#define ARIZONA_GP_FN_FLL1_LOCK 0x0C +#define ARIZONA_GP_FN_FLL2_LOCK 0x0D +#define ARIZONA_GP_FN_FLL1_CLOCK_OK 0x0F +#define ARIZONA_GP_FN_FLL2_CLOCK_OK 0x10 +#define ARIZONA_GP_FN_HEADPHONE_DET 0x12 +#define ARIZONA_GP_FN_MIC_DET 0x13 +#define ARIZONA_GP_FN_WSEQ_STATUS 0x15 +#define ARIZONA_GP_FN_CIF_ADDRESS_ERROR 0x16 +#define ARIZONA_GP_FN_ASRC1_LOCK 0x1A +#define ARIZONA_GP_FN_ASRC2_LOCK 0x1B +#define ARIZONA_GP_FN_ASRC_CONFIG_ERROR 0x1C +#define ARIZONA_GP_FN_DRC1_SIGNAL_DETECT 0x1D +#define ARIZONA_GP_FN_DRC1_ANTICLIP 0x1E +#define ARIZONA_GP_FN_DRC1_DECAY 0x1F +#define ARIZONA_GP_FN_DRC1_NOISE 0x20 +#define ARIZONA_GP_FN_DRC1_QUICK_RELEASE 0x21 +#define ARIZONA_GP_FN_DRC2_SIGNAL_DETECT 0x22 +#define ARIZONA_GP_FN_DRC2_ANTICLIP 0x23 +#define ARIZONA_GP_FN_DRC2_DECAY 0x24 +#define ARIZONA_GP_FN_DRC2_NOISE 0x25 +#define ARIZONA_GP_FN_DRC2_QUICK_RELEASE 0x26 +#define ARIZONA_GP_FN_MIXER_DROPPED_SAMPLE 0x27 +#define ARIZONA_GP_FN_AIF1_CONFIG_ERROR 0x28 +#define ARIZONA_GP_FN_AIF2_CONFIG_ERROR 0x29 +#define ARIZONA_GP_FN_AIF3_CONFIG_ERROR 0x2A +#define ARIZONA_GP_FN_SPK_TEMP_SHUTDOWN 0x2B +#define ARIZONA_GP_FN_SPK_TEMP_WARNING 0x2C +#define ARIZONA_GP_FN_UNDERCLOCKED 0x2D +#define ARIZONA_GP_FN_OVERCLOCKED 0x2E +#define ARIZONA_GP_FN_DSP_IRQ1 0x35 +#define ARIZONA_GP_FN_DSP_IRQ2 0x36 +#define ARIZONA_GP_FN_ASYNC_OPCLK 0x3D +#define ARIZONA_GP_FN_BOOT_DONE 0x44 +#define ARIZONA_GP_FN_DSP1_RAM_READY 0x45 +#define ARIZONA_GP_FN_SYSCLK_ENA_STATUS 0x4B +#define ARIZONA_GP_FN_ASYNCCLK_ENA_STATUS 0x4C + +#define ARIZONA_GPN_DIR 0x8000 /* GPN_DIR */ +#define ARIZONA_GPN_DIR_MASK 0x8000 /* GPN_DIR */ +#define ARIZONA_GPN_DIR_SHIFT 15 /* GPN_DIR */ +#define ARIZONA_GPN_DIR_WIDTH 1 /* GPN_DIR */ +#define ARIZONA_GPN_PU 0x4000 /* GPN_PU */ +#define ARIZONA_GPN_PU_MASK 0x4000 /* GPN_PU */ +#define ARIZONA_GPN_PU_SHIFT 14 /* GPN_PU */ +#define ARIZONA_GPN_PU_WIDTH 1 /* GPN_PU */ +#define ARIZONA_GPN_PD 0x2000 /* GPN_PD */ +#define ARIZONA_GPN_PD_MASK 0x2000 /* GPN_PD */ +#define ARIZONA_GPN_PD_SHIFT 13 /* GPN_PD */ +#define ARIZONA_GPN_PD_WIDTH 1 /* GPN_PD */ +#define ARIZONA_GPN_LVL 0x0800 /* GPN_LVL */ +#define ARIZONA_GPN_LVL_MASK 0x0800 /* GPN_LVL */ +#define ARIZONA_GPN_LVL_SHIFT 11 /* GPN_LVL */ +#define ARIZONA_GPN_LVL_WIDTH 1 /* GPN_LVL */ +#define ARIZONA_GPN_POL 0x0400 /* GPN_POL */ +#define ARIZONA_GPN_POL_MASK 0x0400 /* GPN_POL */ +#define ARIZONA_GPN_POL_SHIFT 10 /* GPN_POL */ +#define ARIZONA_GPN_POL_WIDTH 1 /* GPN_POL */ +#define ARIZONA_GPN_OP_CFG 0x0200 /* GPN_OP_CFG */ +#define ARIZONA_GPN_OP_CFG_MASK 0x0200 /* GPN_OP_CFG */ +#define ARIZONA_GPN_OP_CFG_SHIFT 9 /* GPN_OP_CFG */ +#define ARIZONA_GPN_OP_CFG_WIDTH 1 /* GPN_OP_CFG */ +#define ARIZONA_GPN_DB 0x0100 /* GPN_DB */ +#define ARIZONA_GPN_DB_MASK 0x0100 /* GPN_DB */ +#define ARIZONA_GPN_DB_SHIFT 8 /* GPN_DB */ +#define ARIZONA_GPN_DB_WIDTH 1 /* GPN_DB */ +#define ARIZONA_GPN_FN_MASK 0x007F /* GPN_DB */ +#define ARIZONA_GPN_FN_SHIFT 0 /* GPN_DB */ +#define ARIZONA_GPN_FN_WIDTH 7 /* GPN_DB */ + +#endif From f8a3d0651f44ae6ed5bfeb933203e25109f2df81 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 4 Jul 2013 08:56:28 +0100 Subject: [PATCH 0019/1167] ASoC: arizona: Add signal activity output for DRC When doing signal activity detection, the only output from the DRC will often be a GPIO pin. This patch adds a signal activity output that is activated when a GPIO is configured to output the DRC signal activity detection. Signed-off-by: Charles Keepax Signed-off-by: Mark Brown (cherry picked from commit b63144e6c6097486e7678f9ecc2769b68d2ec83e) Change-Id: Ic0bffe1b712721ddd7cd414a06b06ae573d22ef2 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 33 +++++++++++++++++++++++++++++++++ sound/soc/codecs/arizona.h | 1 + sound/soc/codecs/wm5102.c | 6 ++++++ sound/soc/codecs/wm5110.c | 9 +++++++++ 4 files changed, 49 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index bbb28420a78..5e8c2387026 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -19,6 +19,7 @@ #include #include +#include #include #include "arizona.h" @@ -223,6 +224,38 @@ int arizona_init_spk(struct snd_soc_codec *codec) } EXPORT_SYMBOL_GPL(arizona_init_spk); +int arizona_init_gpio(struct snd_soc_codec *codec) +{ + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; + int i; + + switch (arizona->type) { + case WM5110: + snd_soc_dapm_disable_pin(&codec->dapm, "DRC2 Signal Activity"); + } + + snd_soc_dapm_disable_pin(&codec->dapm, "DRC1 Signal Activity"); + + for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { + switch (arizona->pdata.gpio_defaults[i] & ARIZONA_GPN_FN_MASK) { + case ARIZONA_GP_FN_DRC1_SIGNAL_DETECT: + snd_soc_dapm_enable_pin(&codec->dapm, + "DRC1 Signal Activity"); + break; + case ARIZONA_GP_FN_DRC2_SIGNAL_DETECT: + snd_soc_dapm_enable_pin(&codec->dapm, + "DRC2 Signal Activity"); + break; + default: + break; + } + } + + return 0; +} +EXPORT_SYMBOL_GPL(arizona_init_gpio); + const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = { "None", "Tone Generator 1", diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index b60b08ccc1d..fe1b794bd5f 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -242,6 +242,7 @@ extern int arizona_set_fll(struct arizona_fll *fll, int source, unsigned int Fref, unsigned int Fout); extern int arizona_init_spk(struct snd_soc_codec *codec); +extern int arizona_init_gpio(struct snd_soc_codec *codec); extern int arizona_init_dai(struct arizona_priv *priv, int dai); diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 4662a51e6ac..fc4bda6387c 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -998,6 +998,8 @@ SND_SOC_DAPM_INPUT("IN2R"), SND_SOC_DAPM_INPUT("IN3L"), SND_SOC_DAPM_INPUT("IN3R"), +SND_SOC_DAPM_OUTPUT("DRC1 Signal Activity"), + SND_SOC_DAPM_PGA_E("IN1L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN1L_ENA_SHIFT, 0, NULL, 0, arizona_in_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | @@ -1603,6 +1605,9 @@ static const struct snd_soc_dapm_route wm5102_dapm_routes[] = { { "SPKDAT1R", NULL, "OUT5R" }, { "MICSUPP", NULL, "SYSCLK" }, + + { "DRC1 Signal Activity", NULL, "DRC1L" }, + { "DRC1 Signal Activity", NULL, "DRC1R" }, }; static int wm5102_set_fll(struct snd_soc_codec *codec, int fll_id, int source, @@ -1770,6 +1775,7 @@ static int wm5102_codec_probe(struct snd_soc_codec *codec) return ret; arizona_init_spk(codec); + arizona_init_gpio(codec); snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index b4b6e2c8426..22c393e6689 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -432,6 +432,9 @@ SND_SOC_DAPM_INPUT("IN3R"), SND_SOC_DAPM_INPUT("IN4L"), SND_SOC_DAPM_INPUT("IN4R"), +SND_SOC_DAPM_OUTPUT("DRC1 Signal Activity"), +SND_SOC_DAPM_OUTPUT("DRC2 Signal Activity"), + SND_SOC_DAPM_PGA_E("IN1L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN1L_ENA_SHIFT, 0, NULL, 0, arizona_in_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | @@ -993,6 +996,11 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { { "SPKDAT2R", NULL, "OUT6R" }, { "MICSUPP", NULL, "SYSCLK" }, + + { "DRC1 Signal Activity", NULL, "DRC1L" }, + { "DRC1 Signal Activity", NULL, "DRC1R" }, + { "DRC2 Signal Activity", NULL, "DRC2L" }, + { "DRC2 Signal Activity", NULL, "DRC2R" }, }; static int wm5110_set_fll(struct snd_soc_codec *codec, int fll_id, int source, @@ -1157,6 +1165,7 @@ static int wm5110_codec_probe(struct snd_soc_codec *codec) return ret; arizona_init_spk(codec); + arizona_init_gpio(codec); snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); From 9390e5a1427c885597f268a3d4213bbb7d755d2e Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 6 Aug 2013 16:42:27 +0100 Subject: [PATCH 0020/1167] mfd: wm5110: Mark register containing FLL gains as readable The FLL gains are present on all devices and controlled from common code shared between them. This patch adds these registers into defaults list for wm5110 and marks them as readable. Reported-by: D.J. Barrow Signed-off-by: Charles Keepax Signed-off-by: Lee Jones (cherry picked from commit c78d20350d682267ed48c2f907d18f2b413f3c66) Change-Id: Iedf374ac31ed1f1f3e88781eaf34d607e8a4a843 Signed-off-by: Charles Keepax --- drivers/mfd/wm5110-tables.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c index 37463f3f024..ffbc2601f3c 100644 --- a/drivers/mfd/wm5110-tables.c +++ b/drivers/mfd/wm5110-tables.c @@ -468,12 +468,14 @@ static const struct reg_default wm5110_reg_default[] = { { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */ { 0x00000177, 0x0281 }, /* R375 - FLL1 Loop Filter Test 1 */ { 0x00000178, 0x0000 }, /* R376 - FLL1 NCO Test 0 */ + { 0x00000179, 0x0000 }, /* R376 - FLL1 Control 7 */ { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */ { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */ { 0x00000183, 0x0000 }, /* R387 - FLL1 Synchroniser 3 */ { 0x00000184, 0x0000 }, /* R388 - FLL1 Synchroniser 4 */ { 0x00000185, 0x0000 }, /* R389 - FLL1 Synchroniser 5 */ { 0x00000186, 0x0000 }, /* R390 - FLL1 Synchroniser 6 */ + { 0x00000187, 0x0001 }, /* R390 - FLL1 Synchroniser 7 */ { 0x00000189, 0x0000 }, /* R393 - FLL1 Spread Spectrum */ { 0x0000018A, 0x0004 }, /* R394 - FLL1 GPIO Clock */ { 0x00000191, 0x0000 }, /* R401 - FLL2 Control 1 */ @@ -484,12 +486,14 @@ static const struct reg_default wm5110_reg_default[] = { { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */ { 0x00000197, 0x0000 }, /* R407 - FLL2 Loop Filter Test 1 */ { 0x00000198, 0x0000 }, /* R408 - FLL2 NCO Test 0 */ + { 0x00000199, 0x0000 }, /* R408 - FLL2 Control 7 */ { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */ { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */ { 0x000001A3, 0x0000 }, /* R419 - FLL2 Synchroniser 3 */ { 0x000001A4, 0x0000 }, /* R420 - FLL2 Synchroniser 4 */ { 0x000001A5, 0x0000 }, /* R421 - FLL2 Synchroniser 5 */ { 0x000001A6, 0x0000 }, /* R422 - FLL2 Synchroniser 6 */ + { 0x000001A7, 0x0001 }, /* R422 - FLL2 Synchroniser 7 */ { 0x000001A9, 0x0000 }, /* R425 - FLL2 Spread Spectrum */ { 0x000001AA, 0x0004 }, /* R426 - FLL2 GPIO Clock */ { 0x00000200, 0x0006 }, /* R512 - Mic Charge Pump 1 */ @@ -1392,6 +1396,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg) case ARIZONA_FLL1_CONTROL_4: case ARIZONA_FLL1_CONTROL_5: case ARIZONA_FLL1_CONTROL_6: + case ARIZONA_FLL1_CONTROL_7: case ARIZONA_FLL1_LOOP_FILTER_TEST_1: case ARIZONA_FLL1_NCO_TEST_0: case ARIZONA_FLL1_SYNCHRONISER_1: @@ -1400,6 +1405,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg) case ARIZONA_FLL1_SYNCHRONISER_4: case ARIZONA_FLL1_SYNCHRONISER_5: case ARIZONA_FLL1_SYNCHRONISER_6: + case ARIZONA_FLL1_SYNCHRONISER_7: case ARIZONA_FLL1_SPREAD_SPECTRUM: case ARIZONA_FLL1_GPIO_CLOCK: case ARIZONA_FLL2_CONTROL_1: @@ -1408,6 +1414,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg) case ARIZONA_FLL2_CONTROL_4: case ARIZONA_FLL2_CONTROL_5: case ARIZONA_FLL2_CONTROL_6: + case ARIZONA_FLL2_CONTROL_7: case ARIZONA_FLL2_LOOP_FILTER_TEST_1: case ARIZONA_FLL2_NCO_TEST_0: case ARIZONA_FLL2_SYNCHRONISER_1: @@ -1416,6 +1423,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg) case ARIZONA_FLL2_SYNCHRONISER_4: case ARIZONA_FLL2_SYNCHRONISER_5: case ARIZONA_FLL2_SYNCHRONISER_6: + case ARIZONA_FLL2_SYNCHRONISER_7: case ARIZONA_FLL2_SPREAD_SPECTRUM: case ARIZONA_FLL2_GPIO_CLOCK: case ARIZONA_MIC_CHARGE_PUMP_1: From cac6b1448bf3753b16a32232c0a7cda1da8741db Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 6 Aug 2013 16:42:28 +0100 Subject: [PATCH 0021/1167] mfd: wm5110: Add mic detect level registers The mic detect level registers are used from common code to configure the button detection code. Add these registers to the defaults list and mark them as readable for wm5110. Signed-off-by: Charles Keepax Signed-off-by: Lee Jones (cherry picked from commit acf0be17836c42b5cba25eda42f5eae5d417f318) Change-Id: I470da1292c2f965e8559952b6ffc33435e6f193a Signed-off-by: Charles Keepax --- drivers/mfd/wm5110-tables.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c index ffbc2601f3c..1f730be88b7 100644 --- a/drivers/mfd/wm5110-tables.c +++ b/drivers/mfd/wm5110-tables.c @@ -507,6 +507,10 @@ static const struct reg_default wm5110_reg_default[] = { { 0x0000029C, 0x0000 }, /* R668 - Headphone Detect 2 */ { 0x000002A3, 0x1102 }, /* R675 - Mic Detect 1 */ { 0x000002A4, 0x009F }, /* R676 - Mic Detect 2 */ + { 0x000002A6, 0x3737 }, /* R678 - Mic Detect Level 1 */ + { 0x000002A7, 0x372C }, /* R679 - Mic Detect Level 2 */ + { 0x000002A8, 0x1422 }, /* R680 - Mic Detect Level 3 */ + { 0x000002A9, 0x300A }, /* R681 - Mic Detect Level 4 */ { 0x000002C3, 0x0000 }, /* R707 - Mic noise mix control 1 */ { 0x000002D3, 0x0000 }, /* R723 - Jack detect analogue */ { 0x00000300, 0x0000 }, /* R768 - Input Enables */ @@ -1438,6 +1442,10 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg) case ARIZONA_MIC_DETECT_1: case ARIZONA_MIC_DETECT_2: case ARIZONA_MIC_DETECT_3: + case ARIZONA_MIC_DETECT_LEVEL_1: + case ARIZONA_MIC_DETECT_LEVEL_2: + case ARIZONA_MIC_DETECT_LEVEL_3: + case ARIZONA_MIC_DETECT_LEVEL_4: case ARIZONA_MIC_NOISE_MIX_CONTROL_1: case ARIZONA_JACK_DETECT_ANALOGUE: case ARIZONA_INPUT_ENABLES: From 9d40adbd0996937d502483eca4164f0fe42f2d68 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 6 Aug 2013 16:42:29 +0100 Subject: [PATCH 0022/1167] mfd: wm5110: Add missing Mic Detect 3 register into defaults Signed-off-by: Charles Keepax Signed-off-by: Lee Jones (cherry picked from commit f5abfaa4396869bac41443dbe9a67dd05a52c283) Change-Id: I3ccae86c5d672c6fb37f8e6665cea8fe57d3c82c Signed-off-by: Charles Keepax --- drivers/mfd/wm5110-tables.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c index 1f730be88b7..c3664a0e83d 100644 --- a/drivers/mfd/wm5110-tables.c +++ b/drivers/mfd/wm5110-tables.c @@ -507,6 +507,7 @@ static const struct reg_default wm5110_reg_default[] = { { 0x0000029C, 0x0000 }, /* R668 - Headphone Detect 2 */ { 0x000002A3, 0x1102 }, /* R675 - Mic Detect 1 */ { 0x000002A4, 0x009F }, /* R676 - Mic Detect 2 */ + { 0x000002A5, 0x0000 }, /* R677 - Mic Detect 3 */ { 0x000002A6, 0x3737 }, /* R678 - Mic Detect Level 1 */ { 0x000002A7, 0x372C }, /* R679 - Mic Detect Level 2 */ { 0x000002A8, 0x1422 }, /* R680 - Mic Detect Level 3 */ From 4fa74d8a06fd32f8c1c6abf2bf6bb57fa07b6230 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 6 Aug 2013 16:42:30 +0100 Subject: [PATCH 0023/1167] mfd: wm5110: Set FX_CTRL2 to volatile FX_CTRL2 is a volatile register and should be marked as such, this patch does so. Signed-off-by: Charles Keepax Signed-off-by: Lee Jones (cherry picked from commit 44955ab50af17ac23ca2c5c17d91eb19daadae8b) Change-Id: I0556e81f9361c63a0a3b09289dc2d59923962055 Signed-off-by: Charles Keepax --- drivers/mfd/wm5110-tables.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c index c3664a0e83d..a8a9bb972cf 100644 --- a/drivers/mfd/wm5110-tables.c +++ b/drivers/mfd/wm5110-tables.c @@ -2365,6 +2365,7 @@ static bool wm5110_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_IRQ_PIN_STATUS: case ARIZONA_AOD_IRQ1: case ARIZONA_AOD_IRQ2: + case ARIZONA_FX_CTRL2: case ARIZONA_ASRC_STATUS: case ARIZONA_DSP_STATUS: case ARIZONA_DSP1_STATUS_1: From 6753a1568c497ee420cdc5d4a871a8a7a9e9fd68 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 6 Aug 2013 17:03:55 +0100 Subject: [PATCH 0024/1167] ASoC: wm5110: Correct input OSR bits for wm5110 The input OSR bits are specified differently for wm5110 than for current revs of wm5102. This patch corrects support for this on wm5110. Signed-off-by: Charles Keepax Signed-off-by: Mark Brown (cherry picked from commit c7f3843575eac1eea1fbda2f6b61d36627fa8f7c) Change-Id: Ib5a4405317f3ab6cd632d8c792f1217aba03ad83 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 20 ++++++++++++++++++++ sound/soc/codecs/arizona.h | 1 + sound/soc/codecs/wm5110.c | 12 ++++-------- 3 files changed, 25 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 5e8c2387026..58e8f674f6c 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -550,6 +550,26 @@ const struct soc_enum arizona_ng_hold = 4, arizona_ng_hold_text); EXPORT_SYMBOL_GPL(arizona_ng_hold); +static const char * const arizona_in_dmic_osr_text[] = { + "1.536MHz", "3.072MHz", "6.144MHz", +}; + +const struct soc_enum arizona_in_dmic_osr[] = { + SOC_ENUM_SINGLE(ARIZONA_IN1L_CONTROL, ARIZONA_IN1_OSR_SHIFT, + ARRAY_SIZE(arizona_in_dmic_osr_text), + arizona_in_dmic_osr_text), + SOC_ENUM_SINGLE(ARIZONA_IN2L_CONTROL, ARIZONA_IN2_OSR_SHIFT, + ARRAY_SIZE(arizona_in_dmic_osr_text), + arizona_in_dmic_osr_text), + SOC_ENUM_SINGLE(ARIZONA_IN3L_CONTROL, ARIZONA_IN3_OSR_SHIFT, + ARRAY_SIZE(arizona_in_dmic_osr_text), + arizona_in_dmic_osr_text), + SOC_ENUM_SINGLE(ARIZONA_IN4L_CONTROL, ARIZONA_IN4_OSR_SHIFT, + ARRAY_SIZE(arizona_in_dmic_osr_text), + arizona_in_dmic_osr_text), +}; +EXPORT_SYMBOL_GPL(arizona_in_dmic_osr); + static void arizona_in_set_vu(struct snd_soc_codec *codec, int ena) { struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index fe1b794bd5f..b6b6d7036ea 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -198,6 +198,7 @@ extern const struct soc_enum arizona_lhpf3_mode; extern const struct soc_enum arizona_lhpf4_mode; extern const struct soc_enum arizona_ng_hold; +extern const struct soc_enum arizona_in_dmic_osr[]; extern int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 22c393e6689..b1ce066ff5a 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -58,14 +58,10 @@ static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); SOC_SINGLE(name " NG SPKDAT2R Switch", base, 11, 1, 0) static const struct snd_kcontrol_new wm5110_snd_controls[] = { -SOC_SINGLE("IN1 High Performance Switch", ARIZONA_IN1L_CONTROL, - ARIZONA_IN1_OSR_SHIFT, 1, 0), -SOC_SINGLE("IN2 High Performance Switch", ARIZONA_IN2L_CONTROL, - ARIZONA_IN2_OSR_SHIFT, 1, 0), -SOC_SINGLE("IN3 High Performance Switch", ARIZONA_IN3L_CONTROL, - ARIZONA_IN3_OSR_SHIFT, 1, 0), -SOC_SINGLE("IN4 High Performance Switch", ARIZONA_IN4L_CONTROL, - ARIZONA_IN4_OSR_SHIFT, 1, 0), +SOC_ENUM("IN1 OSR", arizona_in_dmic_osr[0]), +SOC_ENUM("IN2 OSR", arizona_in_dmic_osr[1]), +SOC_ENUM("IN3 OSR", arizona_in_dmic_osr[2]), +SOC_ENUM("IN4 OSR", arizona_in_dmic_osr[3]), SOC_SINGLE_RANGE_TLV("IN1L Volume", ARIZONA_IN1L_CONTROL, ARIZONA_IN1L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), From 390cf6d70fe15405e566d91e5027b77aaff6a8d6 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 6 Aug 2013 17:18:35 +0100 Subject: [PATCH 0025/1167] mfd: arizona: Move regulator disable to after marking cache only If we disable DCVDD before we mark the cache as cache only, we might attempt to write to the chip whilst it is powered down and lose a write. Signed-off-by: Charles Keepax Signed-off-by: Lee Jones (cherry picked from commit e293e847275b2d1a4768ca25f0933a70b2383016) Change-Id: I6851ba7538affaa1b4954a6871b9c4cc2204fa7a Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 4aacb982a7b..d9e2dc0abb5 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -426,9 +426,9 @@ static int arizona_runtime_suspend(struct device *dev) } } - regulator_disable(arizona->dcvdd); regcache_cache_only(arizona->regmap, true); regcache_mark_dirty(arizona->regmap); + regulator_disable(arizona->dcvdd); return 0; } From 5f11de93fc33098d1367ae5aa9d703a6dc55110e Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 7 Aug 2013 12:17:14 +0100 Subject: [PATCH 0026/1167] extcon: arizona: Clear trig_sts bits on all paths We want the trig_sts bits to be cleared in all cases where we consider the jack detection interrupt to have been handled. Specifically, if a duplicate detection event was suppressed these bits were not cleared causing the CODEC to not enter a low power state. This patch clears the bits on the duplicate detection code path. Reported-by: Ryo Tsutsui Signed-off-by: Charles Keepax Signed-off-by: Chanwoo Choi (cherry picked from commit 46ed938eef8daacecc2df16f63baf38ab6af0bdd) Change-Id: Ic5a2961717240258dba68a7dc59040ca3bea74a7 Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 7a1b4a7791b..4df68de5a3f 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -1034,6 +1034,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) else info->micd_timeout = DEFAULT_MICD_TIMEOUT; +out: /* Clear trig_sts to make sure DCVDD is not forced up */ regmap_write(arizona->regmap, ARIZONA_AOD_WKUP_AND_TRIG, ARIZONA_MICD_CLAMP_FALL_TRIG_STS | @@ -1041,7 +1042,6 @@ static irqreturn_t arizona_jackdet(int irq, void *data) ARIZONA_JD1_FALL_TRIG_STS | ARIZONA_JD1_RISE_TRIG_STS); -out: mutex_unlock(&info->lock); pm_runtime_mark_last_busy(info->dev); From 57fbc428536eb4453d8716ab393f5fc6acce1a56 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 5 Jun 2013 14:51:31 +0100 Subject: [PATCH 0027/1167] ASoC: arizona: Hookup SYSCLK to inputs and noise generators All sources and sinks should enable SYSCLK. Signed-off-by: Charles Keepax Signed-off-by: Mark Brown (cherry picked from commit 6dc6a3f81ee66b50acee5f1aa1de2f7d2d4e55fa) Change-Id: I397953692409a3125a6aeafe1c4ca9c8a94a8746 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5102.c | 11 +++++++++++ sound/soc/codecs/wm5110.c | 13 +++++++++++++ 2 files changed, 24 insertions(+) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index fc4bda6387c..a6cbdb4b5c0 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1404,10 +1404,21 @@ static const struct snd_soc_dapm_route wm5102_dapm_routes[] = { { "OUT5L", NULL, "SYSCLK" }, { "OUT5R", NULL, "SYSCLK" }, + { "IN1L", NULL, "SYSCLK" }, + { "IN1R", NULL, "SYSCLK" }, + { "IN2L", NULL, "SYSCLK" }, + { "IN2R", NULL, "SYSCLK" }, + { "IN3L", NULL, "SYSCLK" }, + { "IN3R", NULL, "SYSCLK" }, + { "MICBIAS1", NULL, "MICVDD" }, { "MICBIAS2", NULL, "MICVDD" }, { "MICBIAS3", NULL, "MICVDD" }, + { "Noise Generator", NULL, "SYSCLK" }, + { "Tone Generator 1", NULL, "SYSCLK" }, + { "Tone Generator 2", NULL, "SYSCLK" }, + { "Noise Generator", NULL, "NOISE" }, { "Tone Generator 1", NULL, "TONE" }, { "Tone Generator 2", NULL, "TONE" }, diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index b1ce066ff5a..77fd531bf3c 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -820,10 +820,23 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { { "OUT6L", NULL, "SYSCLK" }, { "OUT6R", NULL, "SYSCLK" }, + { "IN1L", NULL, "SYSCLK" }, + { "IN1R", NULL, "SYSCLK" }, + { "IN2L", NULL, "SYSCLK" }, + { "IN2R", NULL, "SYSCLK" }, + { "IN3L", NULL, "SYSCLK" }, + { "IN3R", NULL, "SYSCLK" }, + { "IN4L", NULL, "SYSCLK" }, + { "IN4R", NULL, "SYSCLK" }, + { "MICBIAS1", NULL, "MICVDD" }, { "MICBIAS2", NULL, "MICVDD" }, { "MICBIAS3", NULL, "MICVDD" }, + { "Noise Generator", NULL, "SYSCLK" }, + { "Tone Generator 1", NULL, "SYSCLK" }, + { "Tone Generator 2", NULL, "SYSCLK" }, + { "Noise Generator", NULL, "NOISE" }, { "Tone Generator 1", NULL, "TONE" }, { "Tone Generator 2", NULL, "TONE" }, From a7570bedee64962a4db07872eb0a2cad94ee53cb Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 17 Sep 2013 15:44:20 +0100 Subject: [PATCH 0028/1167] mfd: wm5110: Update noise gate default to match the patch file The default value for the noise gate control register is changed in the patch file, we need to reflect this in the defaults array, this patch does so. Signed-off-by: Charles Keepax Signed-off-by: Lee Jones (cherry picked from commit 9989253ac42f12cfbc8def1fd4b946e6723c36e0) Change-Id: I813c5a64597fd2a822d68778cb25f1352f2a8433 Signed-off-by: Charles Keepax --- drivers/mfd/wm5110-tables.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c index a8a9bb972cf..f71bd9b3d0a 100644 --- a/drivers/mfd/wm5110-tables.c +++ b/drivers/mfd/wm5110-tables.c @@ -592,7 +592,7 @@ static const struct reg_default wm5110_reg_default[] = { { 0x0000043E, 0x0080 }, /* R1086 - DAC Volume Limit 6R */ { 0x0000043F, 0x0800 }, /* R1087 - Noise Gate Select 6R */ { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */ - { 0x00000458, 0x0001 }, /* R1112 - Noise Gate Control */ + { 0x00000458, 0x0000 }, /* R1112 - Noise Gate Control */ { 0x00000480, 0x0040 }, /* R1152 - Class W ANC Threshold 1 */ { 0x00000481, 0x0040 }, /* R1153 - Class W ANC Threshold 2 */ { 0x00000490, 0x0069 }, /* R1168 - PDM SPK1 CTRL 1 */ From 7728b8478424104126eab36a4755f377c3b3a55f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 4 Jul 2013 16:53:03 +0100 Subject: [PATCH 0029/1167] ASoC: arizona: Add default case to silence build warning Reported-by: Fengguang Wu Signed-off-by: Charles Keepax Signed-off-by: Mark Brown (cherry picked from commit b79fae606c921522577f3000b6b9a807cd733d2e) Change-Id: I13761b3d1a0a45464724a4892510c90045666607 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 58e8f674f6c..13bc286c4cd 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -233,6 +233,9 @@ int arizona_init_gpio(struct snd_soc_codec *codec) switch (arizona->type) { case WM5110: snd_soc_dapm_disable_pin(&codec->dapm, "DRC2 Signal Activity"); + break; + default: + break; } snd_soc_dapm_disable_pin(&codec->dapm, "DRC1 Signal Activity"); From eee27895305841d1a9049b6d446500e8edd0f408 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 13 Aug 2013 17:51:20 +0100 Subject: [PATCH 0030/1167] extcon: arizona: Correct typo in headphone detect range transitions We should move range when the measured value is greater than or equal to the max value not when greater than. Change-Id: I47c43e3893e43be7a8d9c4fd54f679977fed2524 Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 4df68de5a3f..80a007dd697 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -388,7 +388,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) >> ARIZONA_HP_IMPEDANCE_RANGE_SHIFT; if (range < ARRAY_SIZE(arizona_hpdet_b_ranges) - 1 && - (val < 100 || val > 0x3fb)) { + (val < 100 || val >= 0x3fb)) { range++; dev_dbg(arizona->dev, "Moving to HPDET range %d\n", range); @@ -401,7 +401,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) } /* If we go out of range report top of range */ - if (val < 100 || val > 0x3fb) { + if (val < 100 || val >= 0x3fb) { dev_dbg(arizona->dev, "Measurement out of range\n"); return ARIZONA_HPDET_MAX; } From 123cbe82cd6aff2af6c0eb767b103240be9ca60b Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 17 Sep 2013 11:23:42 +0100 Subject: [PATCH 0031/1167] mfd: arizona: Correct register definition for FLL2_SYNC_BW Change-Id: I16f2c8724545f8c28df4627257d3a68d1a5d7f8f Signed-off-by: Charles Keepax --- include/linux/mfd/arizona/registers.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 4706d3d46e5..cb49417f8ba 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -1908,7 +1908,7 @@ #define ARIZONA_FLL2_SYNC_GAIN_MASK 0x003c /* FLL2_SYNC_GAIN */ #define ARIZONA_FLL2_SYNC_GAIN_SHIFT 2 /* FLL2_SYNC_GAIN */ #define ARIZONA_FLL2_SYNC_GAIN_WIDTH 4 /* FLL2_SYNC_GAIN */ -#define ARIZONA_FLL2_SYNC_BW_MASK 0x0001 /* FLL2_SYNC_BW */ +#define ARIZONA_FLL2_SYNC_BW 0x0001 /* FLL2_SYNC_BW */ #define ARIZONA_FLL2_SYNC_BW_MASK 0x0001 /* FLL2_SYNC_BW */ #define ARIZONA_FLL2_SYNC_BW_SHIFT 0 /* FLL2_SYNC_BW */ #define ARIZONA_FLL2_SYNC_BW_WIDTH 1 /* FLL2_SYNC_BW */ From d61f8d18481c032a97f80ae9de220e2cbc00f311 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 20 Sep 2013 14:51:48 +0100 Subject: [PATCH 0032/1167] extcon: arizona: Don't require micbias to be shifted in pdata Every other pdata field is specified unshifted the patch handles shifting for the MICBIAS from the microphone detection polarity configurations in the extcon driver rather than demanding it in pdata to match other fields. Change-Id: Ib39cc67ff7afe1260a86b2f4a108dccfe25a2c3e Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 80a007dd697..f684bbf8b19 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -86,8 +86,8 @@ struct arizona_extcon_info { }; static const struct arizona_micd_config micd_default_modes[] = { - { ARIZONA_ACCDET_SRC, 1 << ARIZONA_MICD_BIAS_SRC_SHIFT, 0 }, - { 0, 2 << ARIZONA_MICD_BIAS_SRC_SHIFT, 1 }, + { ARIZONA_ACCDET_SRC, 1, 0 }, + { 0, 2, 1 }, }; static const struct arizona_micd_range micd_default_ranges[] = { @@ -182,7 +182,8 @@ static void arizona_extcon_set_mode(struct arizona_extcon_info *info, int mode) info->micd_modes[mode].gpio); regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, ARIZONA_MICD_BIAS_SRC_MASK, - info->micd_modes[mode].bias); + info->micd_modes[mode].bias << + ARIZONA_MICD_BIAS_SRC_SHIFT); regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, ARIZONA_ACCDET_SRC, info->micd_modes[mode].src); @@ -193,7 +194,7 @@ static void arizona_extcon_set_mode(struct arizona_extcon_info *info, int mode) static const char *arizona_extcon_get_micbias(struct arizona_extcon_info *info) { - switch (info->micd_modes[0].bias >> ARIZONA_MICD_BIAS_SRC_SHIFT) { + switch (info->micd_modes[0].bias) { case 1: return "MICBIAS1"; case 2: From 5ae2f3d4b20e8f94b356981709aac7601fd663e8 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 19 Sep 2013 18:45:54 +0100 Subject: [PATCH 0033/1167] mfd: arizona: Add device tree helper functions Factor out reading of specific device tree bindings into seperate functions in preperation for adding more of them. Whilst we are at is fixup a couple of small issues in the existing binding documentation. Change-Id: I3ae581f8b15fa6d0bf989e8a0fb08a99e595ebe8 Signed-off-by: Charles Keepax --- .../devicetree/bindings/mfd/arizona.txt | 12 +- drivers/mfd/arizona-core.c | 121 +++++++++++++----- 2 files changed, 95 insertions(+), 38 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 0e295c9d893..e2cecfc396b 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -25,7 +25,7 @@ Required properties: - #gpio-cells : Must be 2. The first cell is the pin number and the second cell is used to specify optional parameters (currently unused). - - AVDD1-supply, DBVDD1-supply, DBVDD2-supply, DBVDD3-supply, CPVDD-supply, + - AVDD-supply, DBVDD1-supply, DBVDD2-supply, DBVDD3-supply, CPVDD-supply, SPKVDDL-supply, SPKVDDR-supply : power supplies for the device, as covered in Documentation/devicetree/bindings/regulator/regulator.txt @@ -53,10 +53,10 @@ codec: wm5102@1a { #gpio-cells = <2>; wlf,gpio-defaults = < - 0x00000000, /* AIF1TXLRCLK */ - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, + 0x00000000 /* AIF1TXLRCLK */ + 0xffffffff + 0xffffffff + 0xffffffff + 0xffffffff >; }; diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index d9e2dc0abb5..67471f63e95 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -479,42 +479,99 @@ int arizona_of_get_type(struct device *dev) } EXPORT_SYMBOL_GPL(arizona_of_get_type); -static int arizona_of_get_core_pdata(struct arizona *arizona) +static int arizona_of_get_named_gpio(struct arizona *arizona, + const char *prop, bool mandatory, + int *gpio) { - int ret, i; + int ret; - arizona->pdata.reset = of_get_named_gpio(arizona->dev->of_node, - "wlf,reset", 0); - if (arizona->pdata.reset < 0) - arizona->pdata.reset = 0; - - arizona->pdata.ldoena = of_get_named_gpio(arizona->dev->of_node, - "wlf,ldoena", 0); - if (arizona->pdata.ldoena < 0) - arizona->pdata.ldoena = 0; - - ret = of_property_read_u32_array(arizona->dev->of_node, - "wlf,gpio-defaults", - arizona->pdata.gpio_defaults, - ARRAY_SIZE(arizona->pdata.gpio_defaults)); - if (ret >= 0) { - /* - * All values are literal except out of range values - * which are chip default, translate into platform - * data which uses 0 as chip default and out of range - * as zero. - */ - for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { - if (arizona->pdata.gpio_defaults[i] > 0xffff) - arizona->pdata.gpio_defaults[i] = 0; - if (arizona->pdata.gpio_defaults[i] == 0) - arizona->pdata.gpio_defaults[i] = 0x10000; - } - } else { - dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n", - ret); + ret = of_get_named_gpio(arizona->dev->of_node, prop, 0); + *gpio = ret; + if (ret >= 0) + return ret; + + *gpio = 0; + + if (mandatory) + dev_err(arizona->dev, + "Mandatory DT gpio %s missing/malformed: %d\n", + prop, ret); + + return ret; +} + +static int arizona_of_read_u32_array(struct arizona *arizona, + const char *prop, bool mandatory, + u32 *data, size_t num) +{ + int ret; + + ret = of_property_read_u32_array(arizona->dev->of_node, prop, + data, num); + + if (ret >= 0) + return 0; + + switch (ret) { + case -EINVAL: + if (mandatory) + dev_err(arizona->dev, + "Mandatory DT property %s is missing\n", + prop); + break; + default: + dev_err(arizona->dev, + "DT property %s is malformed: %d\n", + prop, ret); } + return ret; +} + +static int arizona_of_read_u32(struct arizona *arizona, + const char* prop, bool mandatory, + u32 *data) +{ + return arizona_of_read_u32_array(arizona, prop, mandatory, data, 1); +} + +static int arizona_of_get_gpio_defaults(struct arizona *arizona, + const char *prop) +{ + struct arizona_pdata *pdata = &arizona->pdata; + int i, ret; + + ret = arizona_of_read_u32_array(arizona, prop, false, + pdata->gpio_defaults, + ARRAY_SIZE(pdata->gpio_defaults)); + if (ret < 0) + return ret; + + /* + * All values are literal except out of range values + * which are chip default, translate into platform + * data which uses 0 as chip default and out of range + * as zero. + */ + for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) { + if (pdata->gpio_defaults[i] > 0xffff) + pdata->gpio_defaults[i] = 0; + if (pdata->gpio_defaults[i] == 0) + pdata->gpio_defaults[i] = 0x10000; + } + + return ret; +} + +static int arizona_of_get_core_pdata(struct arizona *arizona) +{ + struct arizona_pdata *pdata = &arizona->pdata; + + arizona_of_get_named_gpio(arizona, "wlf,reset", true, &pdata->reset); + arizona_of_get_named_gpio(arizona, "wlf,ldoena", true, &pdata->ldoena); + + arizona_of_get_gpio_defaults(arizona, "wlf,gpio-defaults"); + return 0; } From 96fba833d0915ef9d0e31cd846cf3d2c0c39d6c0 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 19 Sep 2013 17:51:03 +0100 Subject: [PATCH 0034/1167] mfd: arizona: Add device tree binding for max_channels_clocked Add device tree bindings for the pdata max_channels_clocked, that allows the user to limit the number of channels clocked on a single AIF. Change-Id: I9726a0f4a1fc507f4760cef76d7bbaa029ef97e8 Signed-off-by: Charles Keepax --- Documentation/devicetree/bindings/mfd/arizona.txt | 7 +++++++ drivers/mfd/arizona-core.c | 5 +++++ 2 files changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index e2cecfc396b..9eeef628f6c 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -40,6 +40,11 @@ Optional properties: the chip default will be used. If present exactly five values must be specified. + - wlf,max-channels-clocked : The maximum number of channels to be clocked on + each AIF, useful for I2S systems with multiple data lines being mastered. + If specified three cells must supplied one for each AIF, specify zero for + AIFs that should be handled normally. + Example: codec: wm5102@1a { @@ -59,4 +64,6 @@ codec: wm5102@1a { 0xffffffff 0xffffffff >; + + wlf,max-channels-clocked = <2 0 0>; }; diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 67471f63e95..a03a148a7f2 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -572,6 +572,11 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) arizona_of_get_gpio_defaults(arizona, "wlf,gpio-defaults"); + arizona_of_read_u32_array(arizona, "wlf,max-channels-clocked", + false, + pdata->max_channels_clocked, + ARRAY_SIZE(pdata->max_channels_clocked)); + return 0; } From 6d2143fb2ac2e608e7ae593eb77a726037f6ae21 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 19 Sep 2013 17:57:15 +0100 Subject: [PATCH 0035/1167] mfd: arizona: Add simple microphone detection device tree bindings Add device tree bindings for several of simpler microphone detection pdata fields. Change-Id: I695b55087c3f5fdbdf2fcfe90176138241e2e4f2 Signed-off-by: Charles Keepax --- .../devicetree/bindings/mfd/arizona.txt | 23 +++++++++++++++++++ drivers/mfd/arizona-core.c | 22 ++++++++++++++++++ 2 files changed, 45 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 9eeef628f6c..3ee659da7ce 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -34,6 +34,22 @@ Optional properties: - wlf,reset : GPIO specifier for the GPIO controlling /RESET - wlf,ldoena : GPIO specifier for the GPIO controlling LDOENA + - wlf,micd-detect-debounce : Additional software microphone detection + debounce specified in milliseconds + - wlf,micd-pol-gpio : GPIO specifier for the GPIO controlling the headset + polarity if one exists + - wlf,micd-bias-start-time : Time allowed for MICBIAS to startup prior to + performing microphone detection, specified as per the MICD_BIAS_STARTTIME + bits in the register MIC_DETECT_1 + - wlf,micd-rate : Delay between successive microphone detection measurements, + specified as per the MICD_RATE bits in the register MIC_DETECT_1 + - wlf,micd-dbtime : Microphone detection hardware debounce level, specified + as per the MICD_DBTIME bits in the register MIC_DETECT_1 + - wlf,micd-timeout : Timeout for microphone detection, specified in + milliseconds + - wlf,micd-force-micbias : Force MICBIAS continuously on during microphone + detection + - wlf,gpio-defaults : A list of GPIO configuration register values. If absent, no configuration of these registers is performed. If any entry has a value that is out of range for a 16 bit register then @@ -57,6 +73,13 @@ codec: wm5102@1a { gpio-controller; #gpio-cells = <2>; + wlf,micd-detect-debounce = <10>; + wlf,micd-bias-start-time = <0x1>; + wlf,micd-rate = <0x1>; + wlf,micd-dbtime = <0x1>; + wlf,micd-timeout = <10>; + wlf,micd-force-micbias; + wlf,gpio-defaults = < 0x00000000 /* AIF1TXLRCLK */ 0xffffffff diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index a03a148a7f2..bfdb445ab29 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -570,6 +570,28 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) arizona_of_get_named_gpio(arizona, "wlf,reset", true, &pdata->reset); arizona_of_get_named_gpio(arizona, "wlf,ldoena", true, &pdata->ldoena); + arizona_of_read_u32(arizona, "wlf,micd-detect-debounce", false, + &pdata->micd_detect_debounce); + + arizona_of_get_named_gpio(arizona, "wlf,micd-pol-gpio", false, + &pdata->micd_pol_gpio); + + arizona_of_read_u32(arizona, "wlf,micd-bias-start-time", false, + &pdata->micd_bias_start_time); + + arizona_of_read_u32(arizona, "wlf,micd-rate", false, + &pdata->micd_rate); + + arizona_of_read_u32(arizona, "wlf,micd-dbtime", false, + &pdata->micd_dbtime); + + arizona_of_read_u32(arizona, "wlf,micd-timeout", false, + &pdata->micd_timeout); + + pdata->micd_force_micbias = + of_property_read_bool(arizona->dev->of_node, + "wlf,micd-force-micbias"); + arizona_of_get_gpio_defaults(arizona, "wlf,gpio-defaults"); arizona_of_read_u32_array(arizona, "wlf,max-channels-clocked", From 62346a7df6668f8f17de6a1d3a6aa9a1b9ea4024 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 19 Sep 2013 18:01:37 +0100 Subject: [PATCH 0036/1167] mfd: arizona: Add micdet ranges and polarity device tree bindings Add device tree bindings for the pdata that configures the microphone button detection and microphone detection polarity configurations. Change-Id: I4d6d57c0e4d588944e7c074935817ccc7f8fa195 Signed-off-by: Charles Keepax --- .../devicetree/bindings/mfd/arizona.txt | 26 ++++ drivers/mfd/arizona-core.c | 116 ++++++++++++++++++ 2 files changed, 142 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 3ee659da7ce..09e384c02d0 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -49,6 +49,20 @@ Optional properties: milliseconds - wlf,micd-force-micbias : Force MICBIAS continuously on during microphone detection + - wlf,micd-ranges : Microphone detection level and key configuration, this + field can be of variable length but should always be a multiple of 2 cells + long, each two cell group represents one button configuration + The first cell is the maximum impedance for this button in ohms + The second cell the key that should be reported to the input layer + - wlf,micd-configs : Headset polarity configurations, the field can be of + variable length but should always be a multiple of 3 cells long, each two + cell group represents one polarity configration + The first cell is the accessory detection source as per the ACCDET_SRC bits + in the ACCESSORY_DETECT_MODE_1 register + The second cell represents the MICBIAS to be used as per the MICD_BIAS_SRC + bits in the MIC_DETECT_1 register + The third cell represents the value of the micd-pol-gpio pin, a non-zero + value indicates this should be on - wlf,gpio-defaults : A list of GPIO configuration register values. If absent, no configuration of these registers is performed. If any @@ -79,6 +93,18 @@ codec: wm5102@1a { wlf,micd-dbtime = <0x1>; wlf,micd-timeout = <10>; wlf,micd-force-micbias; + wlf,micd-ranges = < + 11 0x100 + 28 0x101 + 54 0x102 + 100 0x103 + 186 0x104 + 430 0x105 + >; + wlf,micd-configs = < + 0x1 1 0 + 0x0 2 1 + >; wlf,gpio-defaults = < 0x00000000 /* AIF1TXLRCLK */ diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index bfdb445ab29..a08fff85484 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -563,6 +563,119 @@ static int arizona_of_get_gpio_defaults(struct arizona *arizona, return ret; } +static int arizona_of_get_u32_num_groups(struct arizona *arizona, + const char *prop, + int group_size) +{ + int len_prop; + int num_groups; + + if (!of_get_property(arizona->dev->of_node, prop, &len_prop)) + return -EINVAL; + + num_groups = len_prop / (group_size * sizeof(u32)); + + if (num_groups * group_size * sizeof(u32) != len_prop) { + dev_err(arizona->dev, + "DT property %s is malformed: %d\n", + prop, -EOVERFLOW); + return -EOVERFLOW; + } + + return num_groups; +} + +static int arizona_of_get_micd_ranges(struct arizona *arizona, + const char *prop) +{ + int nranges; + int i, j; + int ret = 0; + u32 value; + struct arizona_micd_range *micd_ranges; + + nranges = arizona_of_get_u32_num_groups(arizona, prop, 2); + if (nranges < 0) + return nranges; + + micd_ranges = devm_kzalloc(arizona->dev, + nranges * sizeof(struct arizona_micd_range), + GFP_KERNEL); + + for (i = 0, j = 0; i < nranges; ++i) { + ret = of_property_read_u32_index(arizona->dev->of_node, + prop, j++, &value); + if (ret < 0) + goto error; + micd_ranges[i].max = value; + + ret = of_property_read_u32_index(arizona->dev->of_node, + prop, j++, &value); + if (ret < 0) + goto error; + micd_ranges[i].key = value; + } + + arizona->pdata.micd_ranges = micd_ranges; + arizona->pdata.num_micd_ranges = nranges; + + return ret; + +error: + devm_kfree(arizona->dev, micd_ranges); + dev_err(arizona->dev, "DT property %s is malformed: %d\n", prop, ret); + return ret; +} + +static int arizona_of_get_micd_configs(struct arizona *arizona, + const char *prop) +{ + int nconfigs; + int i, j; + int ret = 0; + u32 value; + struct arizona_micd_config *micd_configs; + + nconfigs = arizona_of_get_u32_num_groups(arizona, prop, 3); + if (nconfigs < 0) + return nconfigs; + + micd_configs = devm_kzalloc(arizona->dev, + nconfigs * + sizeof(struct arizona_micd_config), + GFP_KERNEL); + + for (i = 0, j = 0; i < nconfigs; ++i) { + ret = of_property_read_u32_index(arizona->dev->of_node, + prop, j++, &value); + if (ret < 0) + goto error; + micd_configs[i].src = value; + + ret = of_property_read_u32_index(arizona->dev->of_node, + prop, j++, &value); + if (ret < 0) + goto error; + micd_configs[i].bias = value; + + ret = of_property_read_u32_index(arizona->dev->of_node, + prop, j++, &value); + if (ret < 0) + goto error; + micd_configs[i].gpio = value; + } + + arizona->pdata.micd_configs = micd_configs; + arizona->pdata.num_micd_configs = nconfigs; + + return ret; + +error: + devm_kfree(arizona->dev, micd_configs); + dev_err(arizona->dev, "DT property %s is malformed: %d\n", prop, ret); + return ret; +} + static int arizona_of_get_core_pdata(struct arizona *arizona) { struct arizona_pdata *pdata = &arizona->pdata; @@ -592,6 +705,9 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) of_property_read_bool(arizona->dev->of_node, "wlf,micd-force-micbias"); + arizona_of_get_micd_ranges(arizona, "wlf,micd-ranges"); + arizona_of_get_micd_configs(arizona, "wlf,micd-configs"); + arizona_of_get_gpio_defaults(arizona, "wlf,gpio-defaults"); arizona_of_read_u32_array(arizona, "wlf,max-channels-clocked", From 3ad151afcd18892331f55a20620854670b7871c8 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 20 Sep 2013 11:52:12 +0100 Subject: [PATCH 0037/1167] mfd: arizona: Add device tree bindings for MICBIAS generators Add device tree bindings for the pdata needed to configure the MICBIAS generators. Change-Id: I4e2ba9b935ad260af6e3c4fe3eba1c47b56fa2a9 Signed-off-by: Charles Keepax --- .../devicetree/bindings/mfd/arizona.txt | 15 +++++++++++ drivers/mfd/arizona-core.c | 25 +++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 09e384c02d0..20730dd4477 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -64,6 +64,19 @@ Optional properties: The third cell represents the value of the micd-pol-gpio pin, a non-zero value indicates this should be on + - wlf,micbias1 : Configuration for the micbias regulator, should include 5 + cells. + The first cell is the output voltage in millivolts + The second cell a non-zero value indicates an external capacitor is fitted + The third cell a non-zero value indicates the micbias should be actively + discharged + The four cell a non-zero value indicates that the micbias should be + brought up slowly to reduce pops + The fifth cell a non-zero value indicates the micbias should be bypassed + and simply output MICVDD + - wlf,micbias2 : See wlf,micbias1 + - wlf,micbias3 : See wlf,micbias1 + - wlf,gpio-defaults : A list of GPIO configuration register values. If absent, no configuration of these registers is performed. If any entry has a value that is out of range for a 16 bit register then @@ -106,6 +119,8 @@ codec: wm5102@1a { 0x0 2 1 >; + wlf,micbias2 = <2600 0 1 1 0>; + wlf,gpio-defaults = < 0x00000000 /* AIF1TXLRCLK */ 0xffffffff diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index a08fff85484..ef825a34da6 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -673,6 +673,27 @@ static int arizona_of_get_micd_configs(struct arizona *arizona, error: devm_kfree(arizona->dev, micd_configs); dev_err(arizona->dev, "DT property %s is malformed: %d\n", prop, ret); + + return ret; +} + +static int arizona_of_get_micbias(struct arizona *arizona, + const char *prop, int index) +{ + int ret; + u32 micbias_config[5]; + + ret = arizona_of_read_u32_array(arizona, prop, false, + micbias_config, + ARRAY_SIZE(micbias_config)); + if (ret >= 0) { + arizona->pdata.micbias[index].mV = micbias_config[0]; + arizona->pdata.micbias[index].ext_cap = micbias_config[1]; + arizona->pdata.micbias[index].discharge = micbias_config[2]; + arizona->pdata.micbias[index].soft_start = micbias_config[3]; + arizona->pdata.micbias[index].bypass = micbias_config[4]; + } + return ret; } @@ -708,6 +729,10 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) arizona_of_get_micd_ranges(arizona, "wlf,micd-ranges"); arizona_of_get_micd_configs(arizona, "wlf,micd-configs"); + arizona_of_get_micbias(arizona, "wlf,micbias1", 0); + arizona_of_get_micbias(arizona, "wlf,micbias2", 1); + arizona_of_get_micbias(arizona, "wlf,micbias3", 2); + arizona_of_get_gpio_defaults(arizona, "wlf,gpio-defaults"); arizona_of_read_u32_array(arizona, "wlf,max-channels-clocked", From 64c923d9a08177411dd2a974f47bfc2ebd98e78d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 12 Aug 2013 11:33:32 +0100 Subject: [PATCH 0038/1167] ASoC: arizona: Add widget<->mux route into mux route macro The routes linking the widget and the input mux were being added manually, rather than by the ARIZONA_MUX_ROUTES macro. This patchs adds the routes to the macro. Signed-off-by: Charles Keepax Signed-off-by: Mark Brown (cherry picked from commit e7edb2731bf8e00aaeb7d20800ae108068618f63) Change-Id: I9055e358fde5003fbf5085ff80f073a24ee4bd58 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.h | 3 ++- sound/soc/codecs/wm5102.c | 41 +++++++++++--------------------------- sound/soc/codecs/wm5110.c | 8 ++++---- 3 files changed, 18 insertions(+), 34 deletions(-) diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index b6b6d7036ea..9e81b639269 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -150,7 +150,8 @@ extern int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS]; ARIZONA_MUX(name_str " Aux 5", &name##_aux5_mux), \ ARIZONA_MUX(name_str " Aux 6", &name##_aux6_mux) -#define ARIZONA_MUX_ROUTES(name) \ +#define ARIZONA_MUX_ROUTES(widget, name) \ + { widget, NULL, name " Input" }, \ ARIZONA_MIXER_INPUT_ROUTES(name " Input") #define ARIZONA_MIXER_ROUTES(widget, name) \ diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index a6cbdb4b5c0..f38c52d43b8 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1501,23 +1501,6 @@ static const struct snd_soc_dapm_route wm5102_dapm_routes[] = { { "IN3L PGA", NULL, "IN3L" }, { "IN3R PGA", NULL, "IN3R" }, - { "ASRC1L", NULL, "ASRC1L Input" }, - { "ASRC1R", NULL, "ASRC1R Input" }, - { "ASRC2L", NULL, "ASRC2L Input" }, - { "ASRC2R", NULL, "ASRC2R Input" }, - - { "ISRC1DEC1", NULL, "ISRC1DEC1 Input" }, - { "ISRC1DEC2", NULL, "ISRC1DEC2 Input" }, - - { "ISRC1INT1", NULL, "ISRC1INT1 Input" }, - { "ISRC1INT2", NULL, "ISRC1INT2 Input" }, - - { "ISRC2DEC1", NULL, "ISRC2DEC1 Input" }, - { "ISRC2DEC2", NULL, "ISRC2DEC2 Input" }, - - { "ISRC2INT1", NULL, "ISRC2INT1 Input" }, - { "ISRC2INT2", NULL, "ISRC2INT2 Input" }, - ARIZONA_MIXER_ROUTES("OUT1L", "HPOUT1L"), ARIZONA_MIXER_ROUTES("OUT1R", "HPOUT1R"), ARIZONA_MIXER_ROUTES("OUT2L", "HPOUT2L"), @@ -1569,22 +1552,22 @@ static const struct snd_soc_dapm_route wm5102_dapm_routes[] = { ARIZONA_MIXER_ROUTES("LHPF3", "LHPF3"), ARIZONA_MIXER_ROUTES("LHPF4", "LHPF4"), - ARIZONA_MUX_ROUTES("ASRC1L"), - ARIZONA_MUX_ROUTES("ASRC1R"), - ARIZONA_MUX_ROUTES("ASRC2L"), - ARIZONA_MUX_ROUTES("ASRC2R"), + ARIZONA_MUX_ROUTES("ASRC1L", "ASRC1L"), + ARIZONA_MUX_ROUTES("ASRC1R", "ASRC1R"), + ARIZONA_MUX_ROUTES("ASRC2L", "ASRC2L"), + ARIZONA_MUX_ROUTES("ASRC2R", "ASRC2R"), - ARIZONA_MUX_ROUTES("ISRC1INT1"), - ARIZONA_MUX_ROUTES("ISRC1INT2"), + ARIZONA_MUX_ROUTES("ISRC1INT1", "ISRC1INT1"), + ARIZONA_MUX_ROUTES("ISRC1INT2", "ISRC1INT2"), - ARIZONA_MUX_ROUTES("ISRC1DEC1"), - ARIZONA_MUX_ROUTES("ISRC1DEC2"), + ARIZONA_MUX_ROUTES("ISRC1DEC1", "ISRC1DEC1"), + ARIZONA_MUX_ROUTES("ISRC1DEC2", "ISRC1DEC2"), - ARIZONA_MUX_ROUTES("ISRC2INT1"), - ARIZONA_MUX_ROUTES("ISRC2INT2"), + ARIZONA_MUX_ROUTES("ISRC2INT1", "ISRC2INT1"), + ARIZONA_MUX_ROUTES("ISRC2INT2", "ISRC2INT2"), - ARIZONA_MUX_ROUTES("ISRC2DEC1"), - ARIZONA_MUX_ROUTES("ISRC2DEC2"), + ARIZONA_MUX_ROUTES("ISRC2DEC1", "ISRC2DEC1"), + ARIZONA_MUX_ROUTES("ISRC2DEC2", "ISRC2DEC2"), ARIZONA_DSP_ROUTES("DSP1"), diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 77fd531bf3c..38e50c81a95 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -978,10 +978,10 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { ARIZONA_MIXER_ROUTES("LHPF3", "LHPF3"), ARIZONA_MIXER_ROUTES("LHPF4", "LHPF4"), - ARIZONA_MUX_ROUTES("ASRC1L"), - ARIZONA_MUX_ROUTES("ASRC1R"), - ARIZONA_MUX_ROUTES("ASRC2L"), - ARIZONA_MUX_ROUTES("ASRC2R"), + ARIZONA_MUX_ROUTES("ASRC1L", "ASRC1L"), + ARIZONA_MUX_ROUTES("ASRC1R", "ASRC1R"), + ARIZONA_MUX_ROUTES("ASRC2L", "ASRC2L"), + ARIZONA_MUX_ROUTES("ASRC2R", "ASRC2R"), { "HPOUT1L", NULL, "OUT1L" }, { "HPOUT1R", NULL, "OUT1R" }, From 22d48d69efcaf3d3f0123d1733b0027313f6b9d6 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 12 Aug 2013 23:58:58 +0100 Subject: [PATCH 0039/1167] ASoC: wm5102: Add inputs for noise and mic mixers The noise and mic mixer inputs were not connected, do so. Signed-off-by: Mark Brown (cherry picked from commit 3efd8a6f1a74b4bbf54c992e1cf23381c64de216) Change-Id: I73fb43ef0898d0c713128ec04291f9f22b76d12e Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5102.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index f38c52d43b8..8bbddc151aa 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1423,9 +1423,6 @@ static const struct snd_soc_dapm_route wm5102_dapm_routes[] = { { "Tone Generator 1", NULL, "TONE" }, { "Tone Generator 2", NULL, "TONE" }, - { "Mic Mute Mixer", NULL, "Noise Mixer" }, - { "Mic Mute Mixer", NULL, "Mic Mixer" }, - { "AIF1 Capture", NULL, "AIF1TX1" }, { "AIF1 Capture", NULL, "AIF1TX2" }, { "AIF1 Capture", NULL, "AIF1TX3" }, @@ -1552,6 +1549,9 @@ static const struct snd_soc_dapm_route wm5102_dapm_routes[] = { ARIZONA_MIXER_ROUTES("LHPF3", "LHPF3"), ARIZONA_MIXER_ROUTES("LHPF4", "LHPF4"), + ARIZONA_MIXER_ROUTES("Mic Mute Mixer", "Noise"), + ARIZONA_MIXER_ROUTES("Mic Mute Mixer", "Mic"), + ARIZONA_MUX_ROUTES("ASRC1L", "ASRC1L"), ARIZONA_MUX_ROUTES("ASRC1R", "ASRC1R"), ARIZONA_MUX_ROUTES("ASRC2L", "ASRC2L"), From 0657e22bf6647a3c3abd1bbb65f65ffa52b92ac7 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 12 Aug 2013 23:59:08 +0100 Subject: [PATCH 0040/1167] ASoC: wm5110: Add inputs for noise and mic mixers The noise and mic mixer inputs were not connected, do so. Signed-off-by: Mark Brown (cherry picked from commit 66e7aa22c751af82567f9af82fe7e1254f751870) Change-Id: I224fc602b6c9820e414c0a89e0d97c65751af825 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5110.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 38e50c81a95..bbd64384ca1 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -841,9 +841,6 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { { "Tone Generator 1", NULL, "TONE" }, { "Tone Generator 2", NULL, "TONE" }, - { "Mic Mute Mixer", NULL, "Noise Mixer" }, - { "Mic Mute Mixer", NULL, "Mic Mixer" }, - { "AIF1 Capture", NULL, "AIF1TX1" }, { "AIF1 Capture", NULL, "AIF1TX2" }, { "AIF1 Capture", NULL, "AIF1TX3" }, @@ -978,6 +975,9 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { ARIZONA_MIXER_ROUTES("LHPF3", "LHPF3"), ARIZONA_MIXER_ROUTES("LHPF4", "LHPF4"), + ARIZONA_MIXER_ROUTES("Mic Mute Mixer", "Noise"), + ARIZONA_MIXER_ROUTES("Mic Mute Mixer", "Mic"), + ARIZONA_MUX_ROUTES("ASRC1L", "ASRC1L"), ARIZONA_MUX_ROUTES("ASRC1R", "ASRC1R"), ARIZONA_MUX_ROUTES("ASRC2L", "ASRC2L"), From 8f3bbb53ecce539d06469559e04e2947bbae89a8 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 26 Sep 2013 16:30:46 +0100 Subject: [PATCH 0041/1167] ASoC: arizona: Set CODEC of_node to match SPI node This allows the DAPM framework to locate the supplies for the CODEC as these are attached to the MFD device through device tree. Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5102.c | 4 ++++ sound/soc/codecs/wm5110.c | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 8bbddc151aa..93cf86c39a2 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1831,6 +1831,10 @@ static int wm5102_probe(struct platform_device *pdev) return -ENOMEM; platform_set_drvdata(pdev, wm5102); + /* Set of_node to parent from the SPI device to allow DAPM to + * locate regulator supplies */ + pdev->dev.of_node = arizona->dev->of_node; + wm5102->core.arizona = arizona; wm5102->core.num_inputs = 6; diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index bbd64384ca1..33e609a03b4 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -1238,6 +1238,10 @@ static int wm5110_probe(struct platform_device *pdev) return -ENOMEM; platform_set_drvdata(pdev, wm5110); + /* Set of_node to parent from the SPI device to allow DAPM to + * locate regulator supplies */ + pdev->dev.of_node = arizona->dev->of_node; + wm5110->core.arizona = arizona; wm5110->core.num_inputs = 8; From 874d0eac346048db80da82a3b83815a2530ad1f7 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Sat, 28 Sep 2013 13:51:39 +0100 Subject: [PATCH 0042/1167] extcon: arizona: Get pdata from arizona structure not device In the case of a device tree system there will be no pdata attached to the device, causing us to deference a NULL pointer. Better to take the pdata from the Arizona structure as this will always exist and we know will have been populated since it is populated by the MFD device which binds in the extcon driver. Change-Id: I204cff353a38149312238787c99f17cfa78196bb Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index f684bbf8b19..12ef71aaaea 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -1074,7 +1074,7 @@ static void arizona_micd_set_level(struct arizona *arizona, int index, static int arizona_extcon_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); - struct arizona_pdata *pdata; + struct arizona_pdata *pdata = &arizona->pdata; struct arizona_extcon_info *info; unsigned int val; int jack_irq_fall, jack_irq_rise; @@ -1083,8 +1083,6 @@ static int arizona_extcon_probe(struct platform_device *pdev) if (!arizona->dapm || !arizona->dapm->card) return -EPROBE_DEFER; - pdata = dev_get_platdata(arizona->dev); - info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); if (!info) { dev_err(&pdev->dev, "Failed to allocate memory\n"); From 32bfbdb4d1673d394f8b3da645c53c74f15d4c46 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Sun, 29 Sep 2013 19:43:19 +0100 Subject: [PATCH 0043/1167] gpio: arizona: Use the of_node from the Arizona device We need to use the of_node from the main Arizona device as that holds our configuration. Change-Id: I6d7c6e37a9cbb09409b3de6606f1b567b43f25df Signed-off-by: Charles Keepax --- drivers/gpio/gpio-arizona.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpio/gpio-arizona.c b/drivers/gpio/gpio-arizona.c index 0ea853f68db..058df2579ed 100644 --- a/drivers/gpio/gpio-arizona.c +++ b/drivers/gpio/gpio-arizona.c @@ -109,6 +109,9 @@ static int arizona_gpio_probe(struct platform_device *pdev) arizona_gpio->arizona = arizona; arizona_gpio->gpio_chip = template_chip; arizona_gpio->gpio_chip.dev = &pdev->dev; +#ifdef CONFIG_OF_GPIO + arizona_gpio->gpio_chip.of_node = arizona->dev->of_node; +#endif switch (arizona->type) { case WM5102: From 0d0d49cfb260dd04b2574527224af41c9ab7e314 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 9 Jul 2013 12:10:55 +0100 Subject: [PATCH 0044/1167] ASoC: wm5110: Add register patch for new rev D chip Certainly values from the register patch need to be written after SYSCLK is enabled. These are handled in the same manor as we do for wm5102. Change-Id: Id10a9dc660112ee3f2e8524f05517d64c1549fff Signed-off-by: Charles Keepax --- drivers/mfd/wm5110-tables.c | 30 +++++++++++++++++++++++++- sound/soc/codecs/wm5110.c | 43 ++++++++++++++++++++++++++++++++++++- 2 files changed, 71 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c index f71bd9b3d0a..4dc1650c53c 100644 --- a/drivers/mfd/wm5110-tables.c +++ b/drivers/mfd/wm5110-tables.c @@ -223,6 +223,31 @@ static const struct reg_default wm5110_revb_patch[] = { { 0x80, 0x0 }, }; +static const struct reg_default wm5110_revd_patch[] = { + { 0x80, 0x3 }, + { 0x80, 0x3 }, + { 0x393, 0x27 }, + { 0x394, 0x27 }, + { 0x395, 0x27 }, + { 0x396, 0x27 }, + { 0x397, 0x27 }, + { 0x398, 0x26 }, + { 0x221, 0x90 }, + { 0x211, 0x8 }, + { 0x36c, 0x1fb }, + { 0x26e, 0x64 }, + { 0x26f, 0xea }, + { 0x270, 0x1f16 }, + { 0x51b, 0x1 }, + { 0x55b, 0x1 }, + { 0x59b, 0x1 }, + { 0x4f0, 0x633 }, + { 0x441, 0xc059 }, + { 0x209, 0x27 }, + { 0x80, 0x0 }, + { 0x80, 0x0 }, +}; + /* We use a function so we can use ARRAY_SIZE() */ int wm5110_patch(struct arizona *arizona) { @@ -235,7 +260,10 @@ int wm5110_patch(struct arizona *arizona) return regmap_register_patch(arizona->regmap, wm5110_revb_patch, ARRAY_SIZE(wm5110_revb_patch)); - + case 3: + return regmap_register_patch(arizona->regmap, + wm5110_revd_patch, + ARRAY_SIZE(wm5110_revd_patch)); default: return 0; } diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 33e609a03b4..3103945961e 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -37,6 +37,47 @@ struct wm5110_priv { struct arizona_fll fll[2]; }; +static const struct reg_default wm5110_sysclk_revd_patch[] = { + { 0x3093, 0x1001 }, + { 0x30E3, 0x1301 }, + { 0x3133, 0x1201 }, + { 0x3183, 0x1501 }, + { 0x31D3, 0x1401 }, +}; + +static int wm5110_sysclk_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + struct regmap *regmap = codec->control_data; + const struct reg_default *patch = NULL; + int i, patch_size; + + switch (arizona->rev) { + case 3: + patch = wm5110_sysclk_revd_patch; + patch_size = ARRAY_SIZE(wm5110_sysclk_revd_patch); + break; + default: + return 0; + } + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + if (patch) + for (i = 0; i < patch_size; i++) + regmap_write(regmap, patch[i].reg, + patch[i].def); + break; + + default: + break; + } + + return 0; +} + static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); @@ -400,7 +441,7 @@ static const struct snd_kcontrol_new wm5110_aec_loopback_mux = static const struct snd_soc_dapm_widget wm5110_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT, - 0, NULL, 0), + 0, wm5110_sysclk_ev, SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_SUPPLY("ASYNCCLK", ARIZONA_ASYNC_CLOCK_1, ARIZONA_ASYNC_CLK_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK, From 13277bd7b9513d1493a67de1ce882f3b5b2a758b Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 4 Jan 2013 15:02:47 +0000 Subject: [PATCH 0045/1167] mfd: wm5110: Make DSP memories readable Change-Id: I5788b78ec3eac59bf7c89c2cd677cca2b034a382 Signed-off-by: Charles Keepax --- drivers/mfd/wm5110-tables.c | 69 ++++++++++++++++++++++++++++++++++--- 1 file changed, 65 insertions(+), 4 deletions(-) diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c index 4dc1650c53c..159c6d17372 100644 --- a/drivers/mfd/wm5110-tables.c +++ b/drivers/mfd/wm5110-tables.c @@ -14,6 +14,7 @@ #include #include +#include #include "arizona.h" @@ -1364,6 +1365,64 @@ static const struct reg_default wm5110_reg_default[] = { { 0x00001404, 0x0000 }, /* R5124 - DSP4 Status 1 */ }; +static bool wm5110_is_rev_b_adsp_memory(unsigned int reg) +{ + if ((reg >= 0x100000 && reg < 0x103000) || + (reg >= 0x180000 && reg < 0x181000) || + (reg >= 0x190000 && reg < 0x192000) || + (reg >= 0x1a8000 && reg < 0x1a9000) || + (reg >= 0x200000 && reg < 0x209000) || + (reg >= 0x280000 && reg < 0x281000) || + (reg >= 0x290000 && reg < 0x29a000) || + (reg >= 0x2a8000 && reg < 0x2aa000) || + (reg >= 0x300000 && reg < 0x30f000) || + (reg >= 0x380000 && reg < 0x382000) || + (reg >= 0x390000 && reg < 0x39e000) || + (reg >= 0x3a8000 && reg < 0x3b6000) || + (reg >= 0x400000 && reg < 0x403000) || + (reg >= 0x480000 && reg < 0x481000) || + (reg >= 0x490000 && reg < 0x492000) || + (reg >= 0x4a8000 && reg < 0x4a9000)) + return true; + else + return false; +} + +static bool wm5110_is_rev_d_adsp_memory(unsigned int reg) +{ + if ((reg >= 0x100000 && reg < 0x106000) || + (reg >= 0x180000 && reg < 0x182000) || + (reg >= 0x190000 && reg < 0x198000) || + (reg >= 0x1a8000 && reg < 0x1aa000) || + (reg >= 0x200000 && reg < 0x20f000) || + (reg >= 0x280000 && reg < 0x282000) || + (reg >= 0x290000 && reg < 0x29c000) || + (reg >= 0x2a6000 && reg < 0x2b4000) || + (reg >= 0x300000 && reg < 0x30f000) || + (reg >= 0x380000 && reg < 0x382000) || + (reg >= 0x390000 && reg < 0x3a2000) || + (reg >= 0x3a6000 && reg < 0x3b4000) || + (reg >= 0x400000 && reg < 0x406000) || + (reg >= 0x480000 && reg < 0x482000) || + (reg >= 0x490000 && reg < 0x498000) || + (reg >= 0x4a8000 && reg < 0x4aa000)) + return true; + else + return false; +} + +static bool wm5110_is_adsp_memory(struct device *dev, unsigned int reg) +{ + struct arizona *arizona = dev_get_drvdata(dev); + + switch (arizona->rev) { + case 0 ... 2: + return wm5110_is_rev_b_adsp_memory(reg); + default: + return wm5110_is_rev_d_adsp_memory(reg); + } +} + static bool wm5110_readable_register(struct device *dev, unsigned int reg) { switch (reg) { @@ -2352,7 +2411,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DSP4_SCRATCH_3: return true; default: - return false; + return wm5110_is_adsp_memory(dev, reg); } } @@ -2426,16 +2485,18 @@ static bool wm5110_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_DSP4_SCRATCH_3: return true; default: - return false; + return wm5110_is_adsp_memory(dev, reg); } } +#define WM5110_MAX_REGISTER 0x4a9fff + const struct regmap_config wm5110_spi_regmap = { .reg_bits = 32, .pad_bits = 16, .val_bits = 16, - .max_register = ARIZONA_DSP1_STATUS_2, + .max_register = WM5110_MAX_REGISTER, .readable_reg = wm5110_readable_register, .volatile_reg = wm5110_volatile_register, @@ -2449,7 +2510,7 @@ const struct regmap_config wm5110_i2c_regmap = { .reg_bits = 32, .val_bits = 16, - .max_register = ARIZONA_DSP1_STATUS_2, + .max_register = WM5110_MAX_REGISTER, .readable_reg = wm5110_readable_register, .volatile_reg = wm5110_volatile_register, From 1a07d4d32f368f0a274448cdf3147921bdc94694 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Sun, 26 Aug 2012 13:51:57 -0700 Subject: [PATCH 0046/1167] ASoC: wm5110: Hook up ADSP2 cores Change-Id: I5d91bab104f2789a72918e88ac4a7246cbfa4b50 Signed-off-by: Mark Brown Signed-off-by: Charles Keepax --- sound/soc/codecs/Kconfig | 2 + sound/soc/codecs/wm5110.c | 119 +++++++++++++++++++++++++++++++++++++- 2 files changed, 119 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 2f45f00e31b..2b28e280982 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -154,8 +154,10 @@ config SND_SOC_WM_HUBS config SND_SOC_WM_ADSP tristate default y if SND_SOC_WM5102=y + default y if SND_SOC_WM5110=y default y if SND_SOC_WM2200=y default m if SND_SOC_WM5102=m + default m if SND_SOC_WM5110=m default m if SND_SOC_WM2200=m config SND_SOC_AB8500_CODEC diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 3103945961e..757b1d6db9b 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -30,13 +30,51 @@ #include #include "arizona.h" +#include "wm_adsp.h" #include "wm5110.h" +#define WM5110_NUM_ADSP 4 + struct wm5110_priv { struct arizona_priv core; struct arizona_fll fll[2]; }; +static const struct wm_adsp_region wm5110_dsp1_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x100000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x180000 }, + { .type = WMFW_ADSP2_XM, .base = 0x190000 }, + { .type = WMFW_ADSP2_YM, .base = 0x1a8000 }, +}; + +static const struct wm_adsp_region wm5110_dsp2_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x200000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x280000 }, + { .type = WMFW_ADSP2_XM, .base = 0x290000 }, + { .type = WMFW_ADSP2_YM, .base = 0x2a8000 }, +}; + +static const struct wm_adsp_region wm5110_dsp3_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x300000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x380000 }, + { .type = WMFW_ADSP2_XM, .base = 0x390000 }, + { .type = WMFW_ADSP2_YM, .base = 0x3a8000 }, +}; + +static const struct wm_adsp_region wm5110_dsp4_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x400000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x480000 }, + { .type = WMFW_ADSP2_XM, .base = 0x490000 }, + { .type = WMFW_ADSP2_YM, .base = 0x4a8000 }, +}; + +static const struct wm_adsp_region *wm5110_dsp_regions[] = { + wm5110_dsp1_regions, + wm5110_dsp2_regions, + wm5110_dsp3_regions, + wm5110_dsp4_regions, +}; + static const struct reg_default wm5110_sysclk_revd_patch[] = { { 0x3093, 0x1001 }, { 0x30E3, 0x1301 }, @@ -372,6 +410,22 @@ ARIZONA_MIXER_ENUMS(LHPF2, ARIZONA_HPLP2MIX_INPUT_1_SOURCE); ARIZONA_MIXER_ENUMS(LHPF3, ARIZONA_HPLP3MIX_INPUT_1_SOURCE); ARIZONA_MIXER_ENUMS(LHPF4, ARIZONA_HPLP4MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(DSP1L, ARIZONA_DSP1LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(DSP1R, ARIZONA_DSP1RMIX_INPUT_1_SOURCE); +ARIZONA_DSP_AUX_ENUMS(DSP1, ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(DSP2L, ARIZONA_DSP2LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(DSP2R, ARIZONA_DSP2RMIX_INPUT_1_SOURCE); +ARIZONA_DSP_AUX_ENUMS(DSP2, ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(DSP3L, ARIZONA_DSP3LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(DSP3R, ARIZONA_DSP3RMIX_INPUT_1_SOURCE); +ARIZONA_DSP_AUX_ENUMS(DSP3, ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(DSP4L, ARIZONA_DSP4LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(DSP4R, ARIZONA_DSP4RMIX_INPUT_1_SOURCE); +ARIZONA_DSP_AUX_ENUMS(DSP4, ARIZONA_DSP4AUX1MIX_INPUT_1_SOURCE); + ARIZONA_MIXER_ENUMS(Mic, ARIZONA_MICMIX_INPUT_1_SOURCE); ARIZONA_MIXER_ENUMS(Noise, ARIZONA_NOISEMIX_INPUT_1_SOURCE); @@ -560,6 +614,11 @@ SND_SOC_DAPM_PGA("ASRC2L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2L_ENA_SHIFT, 0, SND_SOC_DAPM_PGA("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0, NULL, 0), +WM_ADSP2("DSP1", 0), +WM_ADSP2("DSP2", 1), +WM_ADSP2("DSP3", 2), +WM_ADSP2("DSP4", 3), + SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, &wm5110_aec_loopback_mux), @@ -762,6 +821,11 @@ ARIZONA_MUX_WIDGETS(ASRC1R, "ASRC1R"), ARIZONA_MUX_WIDGETS(ASRC2L, "ASRC2L"), ARIZONA_MUX_WIDGETS(ASRC2R, "ASRC2R"), +ARIZONA_DSP_WIDGETS(DSP1, "DSP1"), +ARIZONA_DSP_WIDGETS(DSP2, "DSP2"), +ARIZONA_DSP_WIDGETS(DSP3, "DSP3"), +ARIZONA_DSP_WIDGETS(DSP4, "DSP4"), + SND_SOC_DAPM_OUTPUT("HPOUT1L"), SND_SOC_DAPM_OUTPUT("HPOUT1R"), SND_SOC_DAPM_OUTPUT("HPOUT2L"), @@ -830,7 +894,31 @@ SND_SOC_DAPM_OUTPUT("MICSUPP"), { name, "ASRC1L", "ASRC1L" }, \ { name, "ASRC1R", "ASRC1R" }, \ { name, "ASRC2L", "ASRC2L" }, \ - { name, "ASRC2R", "ASRC2R" } + { name, "ASRC2R", "ASRC2R" }, \ + { name, "DSP1.1", "DSP1" }, \ + { name, "DSP1.2", "DSP1" }, \ + { name, "DSP1.3", "DSP1" }, \ + { name, "DSP1.4", "DSP1" }, \ + { name, "DSP1.5", "DSP1" }, \ + { name, "DSP1.6", "DSP1" }, \ + { name, "DSP2.1", "DSP2" }, \ + { name, "DSP2.2", "DSP2" }, \ + { name, "DSP2.3", "DSP2" }, \ + { name, "DSP2.4", "DSP2" }, \ + { name, "DSP2.5", "DSP2" }, \ + { name, "DSP2.6", "DSP2" }, \ + { name, "DSP3.1", "DSP3" }, \ + { name, "DSP3.2", "DSP3" }, \ + { name, "DSP3.3", "DSP3" }, \ + { name, "DSP3.4", "DSP3" }, \ + { name, "DSP3.5", "DSP3" }, \ + { name, "DSP3.6", "DSP3" }, \ + { name, "DSP4.1", "DSP4" }, \ + { name, "DSP4.2", "DSP4" }, \ + { name, "DSP4.3", "DSP4" }, \ + { name, "DSP4.4", "DSP4" }, \ + { name, "DSP4.5", "DSP4" }, \ + { name, "DSP4.6", "DSP4" } static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { { "AIF2 Capture", NULL, "DBVDD2" }, @@ -1024,6 +1112,11 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { ARIZONA_MUX_ROUTES("ASRC2L", "ASRC2L"), ARIZONA_MUX_ROUTES("ASRC2R", "ASRC2R"), + ARIZONA_DSP_ROUTES("DSP1"), + ARIZONA_DSP_ROUTES("DSP2"), + ARIZONA_DSP_ROUTES("DSP3"), + ARIZONA_DSP_ROUTES("DSP4"), + { "HPOUT1L", NULL, "OUT1L" }, { "HPOUT1R", NULL, "OUT1R" }, @@ -1217,6 +1310,10 @@ static int wm5110_codec_probe(struct snd_soc_codec *codec) arizona_init_spk(codec); arizona_init_gpio(codec); + ret = snd_soc_add_codec_controls(codec, wm_adsp2_fw_controls, 8); + if (ret != 0) + return ret; + snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); priv->core.arizona->dapm = &codec->dapm; @@ -1271,7 +1368,7 @@ static int wm5110_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); struct wm5110_priv *wm5110; - int i; + int i, ret; wm5110 = devm_kzalloc(&pdev->dev, sizeof(struct wm5110_priv), GFP_KERNEL); @@ -1286,6 +1383,24 @@ static int wm5110_probe(struct platform_device *pdev) wm5110->core.arizona = arizona; wm5110->core.num_inputs = 8; + for (i = 0; i < WM5110_NUM_ADSP; i++) { + wm5110->core.adsp[i].part = "wm5110"; + wm5110->core.adsp[i].num = i + 1; + wm5110->core.adsp[i].type = WMFW_ADSP2; + wm5110->core.adsp[i].dev = arizona->dev; + wm5110->core.adsp[i].regmap = arizona->regmap; + + wm5110->core.adsp[i].base = ARIZONA_DSP1_CONTROL_1 + + (0x100 * i); + wm5110->core.adsp[i].mem = wm5110_dsp_regions[i]; + wm5110->core.adsp[i].num_mems + = ARRAY_SIZE(wm5110_dsp1_regions); + + ret = wm_adsp2_init(&wm5110->core.adsp[i], false); + if (ret != 0) + return ret; + } + for (i = 0; i < ARRAY_SIZE(wm5110->fll); i++) wm5110->fll[i].vco_mult = 3; From edb6d9fa91431bbe74dfcf704d1c30ab7cc570c5 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 27 Jun 2013 09:41:04 +0100 Subject: [PATCH 0047/1167] ASoC: arizona: Support new fratio encoding on wm5110 rev D The reference clock path on the wm5110 rev D FLLs requires a different fratio configuration, this patch adds support for this. Change-Id: Ie397e6df6aa1f9a11b706bd256d2b922cc6e6052 Signed-off-by: Charles Keepax --- include/linux/mfd/arizona/registers.h | 6 ++-- sound/soc/codecs/arizona.c | 52 +++++++++++++++++++-------- 2 files changed, 40 insertions(+), 18 deletions(-) diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index cb49417f8ba..3be5e382d09 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -1665,9 +1665,9 @@ /* * R373 (0x175) - FLL1 Control 5 */ -#define ARIZONA_FLL1_FRATIO_MASK 0x0700 /* FLL1_FRATIO - [10:8] */ -#define ARIZONA_FLL1_FRATIO_SHIFT 8 /* FLL1_FRATIO - [10:8] */ -#define ARIZONA_FLL1_FRATIO_WIDTH 3 /* FLL1_FRATIO - [10:8] */ +#define ARIZONA_FLL1_FRATIO_MASK 0x0F00 /* FLL1_FRATIO - [11:8] */ +#define ARIZONA_FLL1_FRATIO_SHIFT 8 /* FLL1_FRATIO - [11:8] */ +#define ARIZONA_FLL1_FRATIO_WIDTH 4 /* FLL1_FRATIO - [11:8] */ #define ARIZONA_FLL1_OUTDIV_MASK 0x000E /* FLL1_OUTDIV - [3:1] */ #define ARIZONA_FLL1_OUTDIV_SHIFT 1 /* FLL1_OUTDIV - [3:1] */ #define ARIZONA_FLL1_OUTDIV_WIDTH 3 /* FLL1_OUTDIV - [3:1] */ diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 13bc286c4cd..c46d6c2121f 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1285,14 +1285,14 @@ static irqreturn_t arizona_fll_clock_ok(int irq, void *data) static struct { unsigned int min; unsigned int max; - u16 fratio; + u16 fratio[2]; int ratio; } fll_fratios[] = { - { 0, 64000, 4, 16 }, - { 64000, 128000, 3, 8 }, - { 128000, 256000, 2, 4 }, - { 256000, 1000000, 1, 2 }, - { 1000000, 13500000, 0, 1 }, + { 0, 64000, { 4, 0xf }, 16 }, + { 64000, 128000, { 3, 0x7 }, 8 }, + { 128000, 256000, { 2, 0x3 }, 4 }, + { 256000, 1000000, { 1, 0x1 }, 2 }, + { 1000000, 13500000, { 0, 0x0 }, 1 }, }; static struct { @@ -1311,10 +1311,24 @@ struct arizona_fll_cfg { int lambda; int refdiv; int outdiv; - int fratio; + int fratio_ref; + int fratio_sync; int gain; }; +static inline int arizona_fratio_ref(struct arizona *arizona, int i) +{ + if (arizona->rev >= 3 && arizona->type == WM5110) + return fll_fratios[i].fratio[1]; + else + return fll_fratios[i].fratio[0]; +} + +static inline int arizona_fratio_sync(struct arizona *arizona, int i) +{ + return fll_fratios[i].fratio[0]; +} + static int arizona_calc_fll(struct arizona_fll *fll, struct arizona_fll_cfg *cfg, unsigned int Fref, @@ -1361,7 +1375,8 @@ static int arizona_calc_fll(struct arizona_fll *fll, /* Find an appropraite FLL_FRATIO and factor it out of the target */ for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) { if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) { - cfg->fratio = fll_fratios[i].fratio; + cfg->fratio_ref = arizona_fratio_ref(fll->arizona, i); + cfg->fratio_sync = arizona_fratio_sync(fll->arizona, i); ratio = fll_fratios[i].ratio; break; } @@ -1409,8 +1424,11 @@ static int arizona_calc_fll(struct arizona_fll *fll, arizona_fll_dbg(fll, "N=%x THETA=%x LAMBDA=%x\n", cfg->n, cfg->theta, cfg->lambda); - arizona_fll_dbg(fll, "FRATIO=%x(%d) OUTDIV=%x REFCLK_DIV=%x\n", - cfg->fratio, cfg->fratio, cfg->outdiv, cfg->refdiv); + arizona_fll_dbg(fll, "FRATIO_REF=%x(%d) FRATIO_SYNC=%x(%d)\n", + cfg->fratio_ref, cfg->fratio_ref, + cfg->fratio_sync, cfg->fratio_sync); + arizona_fll_dbg(fll, "OUTDIV=%x REFCLK_DIV=%x\n", + cfg->outdiv, cfg->refdiv); arizona_fll_dbg(fll, "GAIN=%d\n", cfg->gain); return 0; @@ -1425,23 +1443,27 @@ static void arizona_apply_fll(struct arizona *arizona, unsigned int base, ARIZONA_FLL1_THETA_MASK, cfg->theta); regmap_update_bits(arizona->regmap, base + 4, ARIZONA_FLL1_LAMBDA_MASK, cfg->lambda); - regmap_update_bits(arizona->regmap, base + 5, - ARIZONA_FLL1_FRATIO_MASK, - cfg->fratio << ARIZONA_FLL1_FRATIO_SHIFT); regmap_update_bits(arizona->regmap, base + 6, ARIZONA_FLL1_CLK_REF_DIV_MASK | ARIZONA_FLL1_CLK_REF_SRC_MASK, cfg->refdiv << ARIZONA_FLL1_CLK_REF_DIV_SHIFT | source << ARIZONA_FLL1_CLK_REF_SRC_SHIFT); - if (sync) + if (sync) { + regmap_update_bits(arizona->regmap, base + 5, + ARIZONA_FLL1_FRATIO_MASK, + cfg->fratio_sync << ARIZONA_FLL1_FRATIO_SHIFT); regmap_update_bits(arizona->regmap, base + 0x7, ARIZONA_FLL1_GAIN_MASK, cfg->gain << ARIZONA_FLL1_GAIN_SHIFT); - else + } else { + regmap_update_bits(arizona->regmap, base + 5, + ARIZONA_FLL1_FRATIO_MASK, + cfg->fratio_ref << ARIZONA_FLL1_FRATIO_SHIFT); regmap_update_bits(arizona->regmap, base + 0x9, ARIZONA_FLL1_GAIN_MASK, cfg->gain << ARIZONA_FLL1_GAIN_SHIFT); + } regmap_update_bits(arizona->regmap, base + 2, ARIZONA_FLL1_CTRL_UPD | ARIZONA_FLL1_N_MASK, From 93b792566a7599c4bc5657c8c4d3c47a1380a4ae Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 9 Jul 2013 17:34:46 +0100 Subject: [PATCH 0048/1167] mfd: wm5110: Ensure known register state exiting sleep mode Change-Id: I9f37592ce7ba3e498dc5c8255e03fcb55acd8639 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 29 +++++++++++++++++++++++------ 1 file changed, 23 insertions(+), 6 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index ef825a34da6..18204de97f8 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -330,6 +330,21 @@ static int arizona_apply_hardware_patch(struct arizona* arizona) return err; } +static int arizona_soft_reset(struct arizona *arizona) +{ + int ret; + + ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); + if (ret != 0) { + dev_err(arizona->dev, "Failed to reset device: %d\n", ret); + goto err; + } + msleep(1); + +err: + return ret; +} + #ifdef CONFIG_PM_RUNTIME static int arizona_runtime_resume(struct device *dev) { @@ -346,6 +361,12 @@ static int arizona_runtime_resume(struct device *dev) regcache_cache_only(arizona->regmap, false); + if (arizona->rev == 3 && arizona->type == WM5110) { + ret = arizona_soft_reset(arizona); + if (ret != 0) + goto err; + } + switch (arizona->type) { case WM5102: if (arizona->external_dcvdd) { @@ -885,13 +906,9 @@ int arizona_dev_init(struct arizona *arizona) if (!arizona->pdata.reset) { regcache_mark_dirty(arizona->regmap); - ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); - if (ret != 0) { - dev_err(dev, "Failed to reset device: %d\n", ret); + ret = arizona_soft_reset(arizona); + if (ret != 0) goto err_reset; - } - - msleep(1); ret = regcache_sync(arizona->regmap); if (ret != 0) { From 970832f73d2dc112010f62bc8fde77b3f020a2d4 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 5 Jul 2013 13:41:10 +0100 Subject: [PATCH 0049/1167] ASoC: wm5110: Add basic support for ISRCs Add support for the ISRCs that matches the current support on the w5102. Change-Id: I38e07db92942ce45f23c8297d50728ae61cb93e0 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5110.c | 178 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 178 insertions(+) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 757b1d6db9b..4a5174e8856 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -258,6 +258,10 @@ SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode), SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode), SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), +SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), +SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), +SOC_VALUE_ENUM("ISRC3 FSL", arizona_isrc_fsl[2]), + ARIZONA_MIXER_CONTROLS("DSP1L", ARIZONA_DSP1LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("DSP1R", ARIZONA_DSP1RMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("DSP2L", ARIZONA_DSP2LMIX_INPUT_1_SOURCE), @@ -474,6 +478,36 @@ ARIZONA_MUX_ENUMS(ASRC1R, ARIZONA_ASRC1RMIX_INPUT_1_SOURCE); ARIZONA_MUX_ENUMS(ASRC2L, ARIZONA_ASRC2LMIX_INPUT_1_SOURCE); ARIZONA_MUX_ENUMS(ASRC2R, ARIZONA_ASRC2RMIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1INT1, ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1INT2, ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1INT3, ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1INT4, ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC1DEC1, ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1DEC2, ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1DEC3, ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1DEC4, ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC2INT1, ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2INT2, ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2INT3, ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2INT4, ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC2DEC1, ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2DEC2, ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2DEC3, ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2DEC4, ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC3INT1, ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC3INT2, ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC3INT3, ARIZONA_ISRC3INT3MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC3INT4, ARIZONA_ISRC3INT4MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC3DEC1, ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC3DEC2, ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC3DEC3, ARIZONA_ISRC3DEC3MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC3DEC4, ARIZONA_ISRC3DEC4MIX_INPUT_1_SOURCE); + static const char *wm5110_aec_loopback_texts[] = { "HPOUT1L", "HPOUT1R", "HPOUT2L", "HPOUT2R", "HPOUT3L", "HPOUT3R", "SPKOUTL", "SPKOUTR", "SPKDAT1L", "SPKDAT1R", "SPKDAT2L", "SPKDAT2R", @@ -619,6 +653,60 @@ WM_ADSP2("DSP2", 1), WM_ADSP2("DSP3", 2), WM_ADSP2("DSP4", 3), +SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT2", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT3", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT4", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC1DEC1", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC2", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC3", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC4", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC2INT1", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT2", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT3", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT4", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC2DEC1", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC2", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC3", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC4", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC3INT1", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC3INT2", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_INT1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC3INT3", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_INT2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC3INT4", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_INT3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC3DEC1", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC3DEC2", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_DEC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC3DEC3", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_DEC2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC3DEC4", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_DEC3_ENA_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, &wm5110_aec_loopback_mux), @@ -826,6 +914,36 @@ ARIZONA_DSP_WIDGETS(DSP2, "DSP2"), ARIZONA_DSP_WIDGETS(DSP3, "DSP3"), ARIZONA_DSP_WIDGETS(DSP4, "DSP4"), +ARIZONA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), +ARIZONA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"), +ARIZONA_MUX_WIDGETS(ISRC1DEC3, "ISRC1DEC3"), +ARIZONA_MUX_WIDGETS(ISRC1DEC4, "ISRC1DEC4"), + +ARIZONA_MUX_WIDGETS(ISRC1INT1, "ISRC1INT1"), +ARIZONA_MUX_WIDGETS(ISRC1INT2, "ISRC1INT2"), +ARIZONA_MUX_WIDGETS(ISRC1INT3, "ISRC1INT3"), +ARIZONA_MUX_WIDGETS(ISRC1INT4, "ISRC1INT4"), + +ARIZONA_MUX_WIDGETS(ISRC2DEC1, "ISRC2DEC1"), +ARIZONA_MUX_WIDGETS(ISRC2DEC2, "ISRC2DEC2"), +ARIZONA_MUX_WIDGETS(ISRC2DEC3, "ISRC2DEC3"), +ARIZONA_MUX_WIDGETS(ISRC2DEC4, "ISRC2DEC4"), + +ARIZONA_MUX_WIDGETS(ISRC2INT1, "ISRC2INT1"), +ARIZONA_MUX_WIDGETS(ISRC2INT2, "ISRC2INT2"), +ARIZONA_MUX_WIDGETS(ISRC2INT3, "ISRC2INT3"), +ARIZONA_MUX_WIDGETS(ISRC2INT4, "ISRC2INT4"), + +ARIZONA_MUX_WIDGETS(ISRC3DEC1, "ISRC3DEC1"), +ARIZONA_MUX_WIDGETS(ISRC3DEC2, "ISRC3DEC2"), +ARIZONA_MUX_WIDGETS(ISRC3DEC3, "ISRC3DEC3"), +ARIZONA_MUX_WIDGETS(ISRC3DEC4, "ISRC3DEC4"), + +ARIZONA_MUX_WIDGETS(ISRC3INT1, "ISRC3INT1"), +ARIZONA_MUX_WIDGETS(ISRC3INT2, "ISRC3INT2"), +ARIZONA_MUX_WIDGETS(ISRC3INT3, "ISRC3INT3"), +ARIZONA_MUX_WIDGETS(ISRC3INT4, "ISRC3INT4"), + SND_SOC_DAPM_OUTPUT("HPOUT1L"), SND_SOC_DAPM_OUTPUT("HPOUT1R"), SND_SOC_DAPM_OUTPUT("HPOUT2L"), @@ -895,6 +1013,30 @@ SND_SOC_DAPM_OUTPUT("MICSUPP"), { name, "ASRC1R", "ASRC1R" }, \ { name, "ASRC2L", "ASRC2L" }, \ { name, "ASRC2R", "ASRC2R" }, \ + { name, "ISRC1DEC1", "ISRC1DEC1" }, \ + { name, "ISRC1DEC2", "ISRC1DEC2" }, \ + { name, "ISRC1DEC3", "ISRC1DEC3" }, \ + { name, "ISRC1DEC4", "ISRC1DEC4" }, \ + { name, "ISRC1INT1", "ISRC1INT1" }, \ + { name, "ISRC1INT2", "ISRC1INT2" }, \ + { name, "ISRC1INT3", "ISRC1INT3" }, \ + { name, "ISRC1INT4", "ISRC1INT4" }, \ + { name, "ISRC2DEC1", "ISRC2DEC1" }, \ + { name, "ISRC2DEC2", "ISRC2DEC2" }, \ + { name, "ISRC2DEC3", "ISRC2DEC3" }, \ + { name, "ISRC2DEC4", "ISRC2DEC4" }, \ + { name, "ISRC2INT1", "ISRC2INT1" }, \ + { name, "ISRC2INT2", "ISRC2INT2" }, \ + { name, "ISRC2INT3", "ISRC2INT3" }, \ + { name, "ISRC2INT4", "ISRC2INT4" }, \ + { name, "ISRC3DEC1", "ISRC3DEC1" }, \ + { name, "ISRC3DEC2", "ISRC3DEC2" }, \ + { name, "ISRC3DEC3", "ISRC3DEC3" }, \ + { name, "ISRC3DEC4", "ISRC3DEC4" }, \ + { name, "ISRC3INT1", "ISRC3INT1" }, \ + { name, "ISRC3INT2", "ISRC3INT2" }, \ + { name, "ISRC3INT3", "ISRC3INT3" }, \ + { name, "ISRC3INT4", "ISRC3INT4" }, \ { name, "DSP1.1", "DSP1" }, \ { name, "DSP1.2", "DSP1" }, \ { name, "DSP1.3", "DSP1" }, \ @@ -1117,6 +1259,36 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { ARIZONA_DSP_ROUTES("DSP3"), ARIZONA_DSP_ROUTES("DSP4"), + ARIZONA_MUX_ROUTES("ISRC1INT1", "ISRC1INT1"), + ARIZONA_MUX_ROUTES("ISRC1INT2", "ISRC1INT2"), + ARIZONA_MUX_ROUTES("ISRC1INT3", "ISRC1INT3"), + ARIZONA_MUX_ROUTES("ISRC1INT4", "ISRC1INT4"), + + ARIZONA_MUX_ROUTES("ISRC1DEC1", "ISRC1DEC1"), + ARIZONA_MUX_ROUTES("ISRC1DEC2", "ISRC1DEC2"), + ARIZONA_MUX_ROUTES("ISRC1DEC3", "ISRC1DEC3"), + ARIZONA_MUX_ROUTES("ISRC1DEC4", "ISRC1DEC4"), + + ARIZONA_MUX_ROUTES("ISRC2INT1", "ISRC2INT1"), + ARIZONA_MUX_ROUTES("ISRC2INT2", "ISRC2INT2"), + ARIZONA_MUX_ROUTES("ISRC2INT3", "ISRC2INT3"), + ARIZONA_MUX_ROUTES("ISRC2INT4", "ISRC2INT4"), + + ARIZONA_MUX_ROUTES("ISRC2DEC1", "ISRC2DEC1"), + ARIZONA_MUX_ROUTES("ISRC2DEC2", "ISRC2DEC2"), + ARIZONA_MUX_ROUTES("ISRC2DEC3", "ISRC2DEC3"), + ARIZONA_MUX_ROUTES("ISRC2DEC4", "ISRC2DEC4"), + + ARIZONA_MUX_ROUTES("ISRC3INT1", "ISRC3INT1"), + ARIZONA_MUX_ROUTES("ISRC3INT2", "ISRC3INT2"), + ARIZONA_MUX_ROUTES("ISRC3INT3", "ISRC3INT3"), + ARIZONA_MUX_ROUTES("ISRC3INT4", "ISRC3INT4"), + + ARIZONA_MUX_ROUTES("ISRC3DEC1", "ISRC3DEC1"), + ARIZONA_MUX_ROUTES("ISRC3DEC2", "ISRC3DEC2"), + ARIZONA_MUX_ROUTES("ISRC3DEC3", "ISRC3DEC3"), + ARIZONA_MUX_ROUTES("ISRC3DEC4", "ISRC3DEC4"), + { "HPOUT1L", NULL, "OUT1L" }, { "HPOUT1R", NULL, "OUT1R" }, @@ -1411,6 +1583,12 @@ static int wm5110_probe(struct platform_device *pdev) ARIZONA_IRQ_FLL2_LOCK, ARIZONA_IRQ_FLL2_CLOCK_OK, &wm5110->fll[1]); + /* SR2 fixed at 8kHz, SR3 fixed at 16kHz */ + regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_2, + ARIZONA_SAMPLE_RATE_2_MASK, 0x11); + regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_3, + ARIZONA_SAMPLE_RATE_3_MASK, 0x12); + for (i = 0; i < ARRAY_SIZE(wm5110_dai); i++) arizona_init_dai(&wm5110->core, i); From eee6d0d8a327fcbed52543a4f79d84164c4a86eb Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 8 Aug 2013 16:36:49 +0100 Subject: [PATCH 0050/1167] ASoC: wm5110: Expose input high pass filter controls Change-Id: I4957e0d27530607102e0a235c7209ad534f1c043 Signed-off-by: Charles Keepax --- drivers/mfd/wm5110-tables.c | 4 +++ include/linux/mfd/arizona/registers.h | 37 +++++++++++++++++++++++++++ sound/soc/codecs/arizona.c | 10 ++++++++ sound/soc/codecs/arizona.h | 1 + sound/soc/codecs/wm5110.c | 19 ++++++++++++++ 5 files changed, 71 insertions(+) diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c index 159c6d17372..55fa6d21cae 100644 --- a/drivers/mfd/wm5110-tables.c +++ b/drivers/mfd/wm5110-tables.c @@ -546,6 +546,7 @@ static const struct reg_default wm5110_reg_default[] = { { 0x00000300, 0x0000 }, /* R768 - Input Enables */ { 0x00000308, 0x0000 }, /* R776 - Input Rate */ { 0x00000309, 0x0022 }, /* R777 - Input Volume Ramp */ + { 0x0000030C, 0x0002 }, /* R780 - HPF Control */ { 0x00000310, 0x2080 }, /* R784 - IN1L Control */ { 0x00000311, 0x0180 }, /* R785 - ADC Digital Volume 1L */ { 0x00000312, 0x0000 }, /* R786 - DMIC1L Control */ @@ -567,6 +568,7 @@ static const struct reg_default wm5110_reg_default[] = { { 0x00000328, 0x2000 }, /* R808 - IN4L Control */ { 0x00000329, 0x0180 }, /* R809 - ADC Digital Volume 4L */ { 0x0000032A, 0x0000 }, /* R810 - DMIC4L Control */ + { 0x0000032C, 0x0000 }, /* R812 - IN4R Control */ { 0x0000032D, 0x0180 }, /* R813 - ADC Digital Volume 4R */ { 0x0000032E, 0x0000 }, /* R814 - DMIC4R Control */ { 0x00000400, 0x0000 }, /* R1024 - Output Enables 1 */ @@ -1540,6 +1542,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg) case ARIZONA_INPUT_ENABLES_STATUS: case ARIZONA_INPUT_RATE: case ARIZONA_INPUT_VOLUME_RAMP: + case ARIZONA_HPF_CONTROL: case ARIZONA_IN1L_CONTROL: case ARIZONA_ADC_DIGITAL_VOLUME_1L: case ARIZONA_DMIC1L_CONTROL: @@ -1561,6 +1564,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg) case ARIZONA_IN4L_CONTROL: case ARIZONA_ADC_DIGITAL_VOLUME_4L: case ARIZONA_DMIC4L_CONTROL: + case ARIZONA_IN4R_CONTROL: case ARIZONA_ADC_DIGITAL_VOLUME_4R: case ARIZONA_DMIC4R_CONTROL: case ARIZONA_OUTPUT_ENABLES_1: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 3be5e382d09..56c67688889 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -139,6 +139,7 @@ #define ARIZONA_INPUT_ENABLES_STATUS 0x301 #define ARIZONA_INPUT_RATE 0x308 #define ARIZONA_INPUT_VOLUME_RAMP 0x309 +#define ARIZONA_HPF_CONTROL 0x30C #define ARIZONA_IN1L_CONTROL 0x310 #define ARIZONA_ADC_DIGITAL_VOLUME_1L 0x311 #define ARIZONA_DMIC1L_CONTROL 0x312 @@ -160,6 +161,7 @@ #define ARIZONA_IN4L_CONTROL 0x328 #define ARIZONA_ADC_DIGITAL_VOLUME_4L 0x329 #define ARIZONA_DMIC4L_CONTROL 0x32A +#define ARIZONA_IN4R_CONTROL 0x32C #define ARIZONA_ADC_DIGITAL_VOLUME_4R 0x32D #define ARIZONA_DMIC4R_CONTROL 0x32E #define ARIZONA_OUTPUT_ENABLES_1 0x400 @@ -2292,9 +2294,19 @@ #define ARIZONA_IN_VI_RAMP_SHIFT 0 /* IN_VI_RAMP - [2:0] */ #define ARIZONA_IN_VI_RAMP_WIDTH 3 /* IN_VI_RAMP - [2:0] */ +/* + * R780 (0x30C) - HPF Control + */ +#define ARIZONA_IN_HPF_CUT_MASK 0x0007 /* IN_HPF_CUT [2:0] */ +#define ARIZONA_IN_HPF_CUT_SHIFT 0 /* IN_HPF_CUT [2:0] */ +#define ARIZONA_IN_HPF_CUT_WIDTH 3 /* IN_HPF_CUT [2:0] */ + /* * R784 (0x310) - IN1L Control */ +#define ARIZONA_IN1L_HPF_MASK 0x8000 /* IN1L_HPF - [15] */ +#define ARIZONA_IN1L_HPF_SHIFT 15 /* IN1L_HPF - [15] */ +#define ARIZONA_IN1L_HPF_WIDTH 1 /* IN1L_HPF - [15] */ #define ARIZONA_IN1_OSR_MASK 0x6000 /* IN1_OSR - [14:13] */ #define ARIZONA_IN1_OSR_SHIFT 13 /* IN1_OSR - [14:13] */ #define ARIZONA_IN1_OSR_WIDTH 2 /* IN1_OSR - [14:13] */ @@ -2333,6 +2345,9 @@ /* * R788 (0x314) - IN1R Control */ +#define ARIZONA_IN1R_HPF_MASK 0x8000 /* IN1R_HPF - [15] */ +#define ARIZONA_IN1R_HPF_SHIFT 15 /* IN1R_HPF - [15] */ +#define ARIZONA_IN1R_HPF_WIDTH 1 /* IN1R_HPF - [15] */ #define ARIZONA_IN1R_PGA_VOL_MASK 0x00FE /* IN1R_PGA_VOL - [7:1] */ #define ARIZONA_IN1R_PGA_VOL_SHIFT 1 /* IN1R_PGA_VOL - [7:1] */ #define ARIZONA_IN1R_PGA_VOL_WIDTH 7 /* IN1R_PGA_VOL - [7:1] */ @@ -2362,6 +2377,9 @@ /* * R792 (0x318) - IN2L Control */ +#define ARIZONA_IN2L_HPF_MASK 0x8000 /* IN2L_HPF - [15] */ +#define ARIZONA_IN2L_HPF_SHIFT 15 /* IN2L_HPF - [15] */ +#define ARIZONA_IN2L_HPF_WIDTH 1 /* IN2L_HPF - [15] */ #define ARIZONA_IN2_OSR_MASK 0x6000 /* IN2_OSR - [14:13] */ #define ARIZONA_IN2_OSR_SHIFT 13 /* IN2_OSR - [14:13] */ #define ARIZONA_IN2_OSR_WIDTH 2 /* IN2_OSR - [14:13] */ @@ -2400,6 +2418,9 @@ /* * R796 (0x31C) - IN2R Control */ +#define ARIZONA_IN2R_HPF_MASK 0x8000 /* IN2R_HPF - [15] */ +#define ARIZONA_IN2R_HPF_SHIFT 15 /* IN2R_HPF - [15] */ +#define ARIZONA_IN2R_HPF_WIDTH 1 /* IN2R_HPF - [15] */ #define ARIZONA_IN2R_PGA_VOL_MASK 0x00FE /* IN2R_PGA_VOL - [7:1] */ #define ARIZONA_IN2R_PGA_VOL_SHIFT 1 /* IN2R_PGA_VOL - [7:1] */ #define ARIZONA_IN2R_PGA_VOL_WIDTH 7 /* IN2R_PGA_VOL - [7:1] */ @@ -2429,6 +2450,9 @@ /* * R800 (0x320) - IN3L Control */ +#define ARIZONA_IN3L_HPF_MASK 0x8000 /* IN3L_HPF - [15] */ +#define ARIZONA_IN3L_HPF_SHIFT 15 /* IN3L_HPF - [15] */ +#define ARIZONA_IN3L_HPF_WIDTH 1 /* IN3L_HPF - [15] */ #define ARIZONA_IN3_OSR_MASK 0x6000 /* IN3_OSR - [14:13] */ #define ARIZONA_IN3_OSR_SHIFT 13 /* IN3_OSR - [14:13] */ #define ARIZONA_IN3_OSR_WIDTH 2 /* IN3_OSR - [14:13] */ @@ -2467,6 +2491,9 @@ /* * R804 (0x324) - IN3R Control */ +#define ARIZONA_IN3R_HPF_MASK 0x8000 /* IN3R_HPF - [15] */ +#define ARIZONA_IN3R_HPF_SHIFT 15 /* IN3R_HPF - [15] */ +#define ARIZONA_IN3R_HPF_WIDTH 1 /* IN3R_HPF - [15] */ #define ARIZONA_IN3R_PGA_VOL_MASK 0x00FE /* IN3R_PGA_VOL - [7:1] */ #define ARIZONA_IN3R_PGA_VOL_SHIFT 1 /* IN3R_PGA_VOL - [7:1] */ #define ARIZONA_IN3R_PGA_VOL_WIDTH 7 /* IN3R_PGA_VOL - [7:1] */ @@ -2496,6 +2523,9 @@ /* * R808 (0x328) - IN4 Control */ +#define ARIZONA_IN4L_HPF_MASK 0x8000 /* IN4L_HPF - [15] */ +#define ARIZONA_IN4L_HPF_SHIFT 15 /* IN4L_HPF - [15] */ +#define ARIZONA_IN4L_HPF_WIDTH 1 /* IN4L_HPF - [15] */ #define ARIZONA_IN4_OSR_MASK 0x6000 /* IN4_OSR - [14:13] */ #define ARIZONA_IN4_OSR_SHIFT 13 /* IN4_OSR - [14:13] */ #define ARIZONA_IN4_OSR_WIDTH 2 /* IN4_OSR - [14:13] */ @@ -2525,6 +2555,13 @@ #define ARIZONA_IN4L_DMIC_DLY_SHIFT 0 /* IN4L_DMIC_DLY - [5:0] */ #define ARIZONA_IN4L_DMIC_DLY_WIDTH 6 /* IN4L_DMIC_DLY - [5:0] */ +/* + * R812 (0x32C) - IN4R Control + */ +#define ARIZONA_IN4R_HPF_MASK 0x8000 /* IN4R_HPF - [15] */ +#define ARIZONA_IN4R_HPF_SHIFT 15 /* IN4R_HPF - [15] */ +#define ARIZONA_IN4R_HPF_WIDTH 1 /* IN4R_HPF - [15] */ + /* * R813 (0x32D) - ADC Digital Volume 4R */ diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index c46d6c2121f..33ca14e3a19 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -553,6 +553,16 @@ const struct soc_enum arizona_ng_hold = 4, arizona_ng_hold_text); EXPORT_SYMBOL_GPL(arizona_ng_hold); +static const char * const arizona_in_hpf_cut_text[] = { + "2.5Hz", "5Hz", "10Hz", "20Hz", "40Hz" +}; + +const struct soc_enum arizona_in_hpf_cut_enum = + SOC_ENUM_SINGLE(ARIZONA_HPF_CONTROL, ARIZONA_IN_HPF_CUT_SHIFT, + ARRAY_SIZE(arizona_in_hpf_cut_text), + arizona_in_hpf_cut_text); +EXPORT_SYMBOL_GPL(arizona_in_hpf_cut_enum); + static const char * const arizona_in_dmic_osr_text[] = { "1.536MHz", "3.072MHz", "6.144MHz", }; diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 9e81b639269..f8e63865a1c 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -199,6 +199,7 @@ extern const struct soc_enum arizona_lhpf3_mode; extern const struct soc_enum arizona_lhpf4_mode; extern const struct soc_enum arizona_ng_hold; +extern const struct soc_enum arizona_in_hpf_cut_enum; extern const struct soc_enum arizona_in_dmic_osr[]; extern int arizona_in_ev(struct snd_soc_dapm_widget *w, diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 4a5174e8856..03d3fe15410 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -155,6 +155,25 @@ SOC_SINGLE_RANGE_TLV("IN3L Volume", ARIZONA_IN3L_CONTROL, SOC_SINGLE_RANGE_TLV("IN3R Volume", ARIZONA_IN3R_CONTROL, ARIZONA_IN3R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), +SOC_ENUM("IN HPF Cutoff Frequency", arizona_in_hpf_cut_enum), + +SOC_SINGLE("IN1L HPF Switch", ARIZONA_IN1L_CONTROL, + ARIZONA_IN1L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN1R HPF Switch", ARIZONA_IN1R_CONTROL, + ARIZONA_IN1R_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN2L HPF Switch", ARIZONA_IN2L_CONTROL, + ARIZONA_IN2L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN2R HPF Switch", ARIZONA_IN2R_CONTROL, + ARIZONA_IN2R_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN3L HPF Switch", ARIZONA_IN3L_CONTROL, + ARIZONA_IN3L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN3R HPF Switch", ARIZONA_IN3R_CONTROL, + ARIZONA_IN3R_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN4L HPF Switch", ARIZONA_IN4L_CONTROL, + ARIZONA_IN4L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN4R HPF Switch", ARIZONA_IN4R_CONTROL, + ARIZONA_IN4R_HPF_SHIFT, 1, 0), + SOC_SINGLE_TLV("IN1L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1L, ARIZONA_IN1L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), SOC_SINGLE_TLV("IN1R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1R, From 0302ab0c6acbf0a835f2ab38d95986c13f660f47 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 4 Oct 2013 10:25:52 +0100 Subject: [PATCH 0051/1167] mfd: arizona: Add inmode and dmic-ref device tree bindings Signed-off-by: Charles Keepax --- Documentation/devicetree/bindings/mfd/arizona.txt | 11 +++++++++++ drivers/mfd/arizona-core.c | 6 ++++++ 2 files changed, 17 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 20730dd4477..8f2f5833d64 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -88,6 +88,14 @@ Optional properties: If specified three cells must supplied one for each AIF, specify zero for AIFs that should be handled normally. + - wlf,dmic-ref : DMIC reference for each input, must contain four cells if + specified. 0 indicates MICVDD and is the default, 1,2,3 indicate the + respective MICBIAS. + + - wlf,inmode : Input mode for each input, must contain four cells if + specified. 0 indicates Differential, 1 indicates Single Ended and 2 + indicates a digital microphone. + Example: codec: wm5102@1a { @@ -121,6 +129,9 @@ codec: wm5102@1a { wlf,micbias2 = <2600 0 1 1 0>; + wlf,dmic-ref = <0 0 1 0>; + wlf,inmode = <0 0 2 0>; + wlf,gpio-defaults = < 0x00000000 /* AIF1TXLRCLK */ 0xffffffff diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 18204de97f8..08ef21455b5 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -761,6 +761,12 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) pdata->max_channels_clocked, ARRAY_SIZE(pdata->max_channels_clocked)); + arizona_of_read_u32_array(arizona, "wlf,dmic-ref", false, + pdata->dmic_ref, ARRAY_SIZE(pdata->dmic_ref)); + + arizona_of_read_u32_array(arizona, "wlf,inmode", false, + pdata->inmode, ARRAY_SIZE(pdata->inmode)); + return 0; } From fe61b5a63678fa95bed95a482c86634d3d8c6db9 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Sun, 29 Sep 2013 16:25:34 +0100 Subject: [PATCH 0052/1167] extcon: arizona: Add defines for microphone detection levels Improve readability by creating a define for each microphone detection level. Change-Id: I12bdaa6585fd98e98104fecbd9414f1332847147 Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 21 ++++++++++++++++----- include/linux/mfd/arizona/registers.h | 9 +++++++++ 2 files changed, 25 insertions(+), 5 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 12ef71aaaea..5901993f451 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -44,6 +44,17 @@ #define HPDET_DEBOUNCE 500 #define DEFAULT_MICD_TIMEOUT 2000 +enum { + MICD_LVL_1_TO_7 = ARIZONA_MICD_LVL_1 | ARIZONA_MICD_LVL_2 | + ARIZONA_MICD_LVL_3 | ARIZONA_MICD_LVL_4 | + ARIZONA_MICD_LVL_5 | ARIZONA_MICD_LVL_6 | + ARIZONA_MICD_LVL_7, + + MICD_LVL_0_TO_7 = ARIZONA_MICD_LVL_0 | MICD_LVL_1_TO_7, + + MICD_LVL_0_TO_8 = MICD_LVL_0_TO_7 | ARIZONA_MICD_LVL_8, +}; + struct arizona_extcon_info { struct device *dev; struct arizona *arizona; @@ -767,7 +778,7 @@ static void arizona_micd_detect(struct work_struct *work) mutex_lock(&info->lock); - for (i = 0; i < 10 && !(val & 0x7fc); i++) { + for (i = 0; i < 10 && !(val & MICD_LVL_0_TO_8); i++) { ret = regmap_read(arizona->regmap, ARIZONA_MIC_DETECT_3, &val); if (ret != 0) { dev_err(arizona->dev, "Failed to read MICDET: %d\n", ret); @@ -784,7 +795,7 @@ static void arizona_micd_detect(struct work_struct *work) } } - if (i == 10 && !(val & 0x7fc)) { + if (i == 10 && !(val & MICD_LVL_0_TO_8)) { dev_err(arizona->dev, "Failed to get valid MICDET value\n"); mutex_unlock(&info->lock); return; @@ -798,7 +809,7 @@ static void arizona_micd_detect(struct work_struct *work) } /* If we got a high impedence we should have a headset, report it. */ - if (info->detecting && (val & 0x400)) { + if (info->detecting && (val & ARIZONA_MICD_LVL_8)) { arizona_identify_headphone(info); ret = extcon_update_state(&info->edev, @@ -827,7 +838,7 @@ static void arizona_micd_detect(struct work_struct *work) * plain headphones. If both polarities report a low * impedence then give up and report headphones. */ - if (info->detecting && (val & 0x3f8)) { + if (info->detecting && (val & MICD_LVL_1_TO_7)) { if (info->jack_flips >= info->micd_num_modes * 10) { dev_dbg(arizona->dev, "Detected HP/line\n"); arizona_identify_headphone(info); @@ -851,7 +862,7 @@ static void arizona_micd_detect(struct work_struct *work) * If we're still detecting and we detect a short then we've * got a headphone. Otherwise it's a button press. */ - if (val & 0x3fc) { + if (val & MICD_LVL_0_TO_7) { if (info->mic) { dev_dbg(arizona->dev, "Mic button detected\n"); diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 56c67688889..27d8aba092e 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -2198,6 +2198,15 @@ /* * R677 (0x2A5) - Mic Detect 3 */ +#define ARIZONA_MICD_LVL_0 0x0004 /* MICD_LVL - [2] */ +#define ARIZONA_MICD_LVL_1 0x0008 /* MICD_LVL - [3] */ +#define ARIZONA_MICD_LVL_2 0x0010 /* MICD_LVL - [4] */ +#define ARIZONA_MICD_LVL_3 0x0020 /* MICD_LVL - [5] */ +#define ARIZONA_MICD_LVL_4 0x0040 /* MICD_LVL - [6] */ +#define ARIZONA_MICD_LVL_5 0x0080 /* MICD_LVL - [7] */ +#define ARIZONA_MICD_LVL_6 0x0100 /* MICD_LVL - [8] */ +#define ARIZONA_MICD_LVL_7 0x0200 /* MICD_LVL - [9] */ +#define ARIZONA_MICD_LVL_8 0x0400 /* MICD_LVL - [10] */ #define ARIZONA_MICD_LVL_MASK 0x07FC /* MICD_LVL - [10:2] */ #define ARIZONA_MICD_LVL_SHIFT 2 /* MICD_LVL - [10:2] */ #define ARIZONA_MICD_LVL_WIDTH 9 /* MICD_LVL - [10:2] */ From 0480d648e7d1703c2b79462cad147aecfa414c4d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Sun, 29 Sep 2013 16:35:19 +0100 Subject: [PATCH 0053/1167] extcon: arizona: Add support for headphone detection on wm5110 rev D Change-Id: I0a715b952a10e4dd720100c9d7509ffa21f9b4e5 Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 5901993f451..dd0c46710a8 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -437,6 +437,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) } val &= ARIZONA_HP_LVL_B_MASK; + val /= 2; regmap_read(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, &range); @@ -1129,6 +1130,16 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; } break; + case WM5110: + switch (arizona->rev) { + case 0 ... 2: + break; + default: + info->micd_clamp = true; + info->hpdet_ip = 2; + break; + } + break; default: break; } From d3d8c503e03044ae93698c7870fee8c9f81e6bee Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Sun, 29 Sep 2013 16:29:32 +0100 Subject: [PATCH 0054/1167] extcon: arizona: Add support for new ADC value headphone detect Newer devices give users the option to make the 3/4 pole jack determination using a software comparison rather than a hardware one. This patch adds support for this functionality. Change-Id: Ic874aa1e37fad439e3e36e6f4dbc477c0615353b Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 66 ++++++++++++++++++++++++--- drivers/mfd/wm5110-tables.c | 3 ++ include/linux/mfd/arizona/pdata.h | 3 ++ include/linux/mfd/arizona/registers.h | 17 +++++-- 4 files changed, 80 insertions(+), 9 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index dd0c46710a8..0e0e31659c6 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -38,12 +38,18 @@ #define ARIZONA_ACCDET_MODE_MIC 0 #define ARIZONA_ACCDET_MODE_HPL 1 #define ARIZONA_ACCDET_MODE_HPR 2 +#define ARIZONA_ACCDET_MODE_HPM 4 +#define ARIZONA_ACCDET_MODE_ADC 7 #define ARIZONA_HPDET_MAX 10000 #define HPDET_DEBOUNCE 500 #define DEFAULT_MICD_TIMEOUT 2000 +#define QUICK_HEADPHONE_MAX_OHM 3 +#define MICROPHONE_MIN_OHM 1257 +#define MICROPHONE_MAX_OHM 30000 + enum { MICD_LVL_1_TO_7 = ARIZONA_MICD_LVL_1 | ARIZONA_MICD_LVL_2 | ARIZONA_MICD_LVL_3 | ARIZONA_MICD_LVL_4 | @@ -110,12 +116,15 @@ static const struct arizona_micd_range micd_default_ranges[] = { { .max = 430, .key = BTN_5 }, }; +/* The number of levels in arizona_micd_levels valid for button thresholds */ +#define ARIZONA_NUM_MICD_BUTTON_LEVELS 64 + static const int arizona_micd_levels[] = { 3, 6, 8, 11, 13, 16, 18, 21, 23, 26, 28, 31, 34, 36, 39, 41, 44, 46, 49, 52, 54, 57, 60, 62, 65, 67, 70, 73, 75, 78, 81, 83, 89, 94, 100, 105, 111, 116, 122, 127, 139, 150, 161, 173, 186, 196, 209, 220, 245, 270, 295, 321, 348, 375, 402, 430, 489, 550, 614, 681, 752, 903, 1071, - 1257, + 1257, 30000, }; #define ARIZONA_CABLE_MECHANICAL 0 @@ -254,6 +263,7 @@ static void arizona_start_mic(struct arizona_extcon_info *info) struct arizona *arizona = info->arizona; bool change; int ret; + unsigned int mode; /* Microphone detection can't use idle mode */ pm_runtime_get(info->dev); @@ -279,9 +289,14 @@ static void arizona_start_mic(struct arizona_extcon_info *info) regmap_write(arizona->regmap, 0x80, 0x0); } + if (info->detecting && arizona->pdata.micd_software_compare) + mode = ARIZONA_ACCDET_MODE_ADC; + else + mode = ARIZONA_ACCDET_MODE_MIC; + regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, - ARIZONA_ACCDET_MODE_MASK, ARIZONA_ACCDET_MODE_MIC); + ARIZONA_ACCDET_MODE_MASK, mode); arizona_extcon_pulse_micbias(info); @@ -779,6 +794,37 @@ static void arizona_micd_detect(struct work_struct *work) mutex_lock(&info->lock); + if (info->detecting && arizona->pdata.micd_software_compare) { + /* Must disable MICD before we read the ADCVAL */ + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, 0); + ret = regmap_read(arizona->regmap, ARIZONA_MIC_DETECT_4, &val); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to read MICDET_ADCVAL: %d\n", + ret); + mutex_unlock(&info->lock); + return; + } + + dev_dbg(arizona->dev, "MICDET_ADCVAL: %x\n", val); + + val &= ARIZONA_MICDET_ADCVAL_MASK; + if (val < ARRAY_SIZE(arizona_micd_levels)) + val = arizona_micd_levels[val]; + else + val = INT_MAX; + + if (val <= QUICK_HEADPHONE_MAX_OHM) + val = ARIZONA_MICD_STS | ARIZONA_MICD_LVL_0; + else if (val <= MICROPHONE_MIN_OHM) + val = ARIZONA_MICD_STS | ARIZONA_MICD_LVL_1; + else if (val <= MICROPHONE_MAX_OHM) + val = ARIZONA_MICD_STS | ARIZONA_MICD_LVL_8; + else + val = ARIZONA_MICD_LVL_8; + } + for (i = 0; i < 10 && !(val & MICD_LVL_0_TO_8); i++) { ret = regmap_read(arizona->regmap, ARIZONA_MIC_DETECT_3, &val); if (ret != 0) { @@ -902,9 +948,16 @@ static void arizona_micd_detect(struct work_struct *work) } handled: - if (info->detecting) + if (info->detecting) { + if (arizona->pdata.micd_software_compare) + regmap_update_bits(arizona->regmap, + ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, + ARIZONA_MICD_ENA); + schedule_delayed_work(&info->micd_timeout_work, msecs_to_jiffies(info->micd_timeout)); + } pm_runtime_mark_last_busy(info->dev); mutex_unlock(&info->lock); @@ -1220,7 +1273,8 @@ static int arizona_extcon_probe(struct platform_device *pdev) arizona->pdata.micd_dbtime << ARIZONA_MICD_DBTIME_SHIFT); - BUILD_BUG_ON(ARRAY_SIZE(arizona_micd_levels) != 0x40); + BUILD_BUG_ON(ARRAY_SIZE(arizona_micd_levels) < + ARIZONA_NUM_MICD_BUTTON_LEVELS); if (arizona->pdata.num_micd_ranges) { info->micd_ranges = pdata->micd_ranges; @@ -1253,11 +1307,11 @@ static int arizona_extcon_probe(struct platform_device *pdev) /* Set up all the buttons the user specified */ for (i = 0; i < info->num_micd_ranges; i++) { - for (j = 0; j < ARRAY_SIZE(arizona_micd_levels); j++) + for (j = 0; j < ARIZONA_NUM_MICD_BUTTON_LEVELS; j++) if (arizona_micd_levels[j] >= info->micd_ranges[i].max) break; - if (j == ARRAY_SIZE(arizona_micd_levels)) { + if (j == ARIZONA_NUM_MICD_BUTTON_LEVELS) { dev_err(arizona->dev, "Unsupported MICD level %d\n", info->micd_ranges[i].max); ret = -EINVAL; diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c index 55fa6d21cae..592328d345e 100644 --- a/drivers/mfd/wm5110-tables.c +++ b/drivers/mfd/wm5110-tables.c @@ -541,6 +541,7 @@ static const struct reg_default wm5110_reg_default[] = { { 0x000002A7, 0x372C }, /* R679 - Mic Detect Level 2 */ { 0x000002A8, 0x1422 }, /* R680 - Mic Detect Level 3 */ { 0x000002A9, 0x300A }, /* R681 - Mic Detect Level 4 */ + { 0x000002AB, 0x0000 }, /* R683 - Mic Detect 4 */ { 0x000002C3, 0x0000 }, /* R707 - Mic noise mix control 1 */ { 0x000002D3, 0x0000 }, /* R723 - Jack detect analogue */ { 0x00000300, 0x0000 }, /* R768 - Input Enables */ @@ -1532,6 +1533,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg) case ARIZONA_MIC_DETECT_1: case ARIZONA_MIC_DETECT_2: case ARIZONA_MIC_DETECT_3: + case ARIZONA_MIC_DETECT_4: case ARIZONA_MIC_DETECT_LEVEL_1: case ARIZONA_MIC_DETECT_LEVEL_2: case ARIZONA_MIC_DETECT_LEVEL_3: @@ -2430,6 +2432,7 @@ static bool wm5110_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_SAMPLE_RATE_3_STATUS: case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: case ARIZONA_MIC_DETECT_3: + case ARIZONA_MIC_DETECT_4: case ARIZONA_HEADPHONE_DETECT_2: case ARIZONA_INPUT_ENABLES_STATUS: case ARIZONA_OUTPUT_STATUS_1: diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 12a5c135c74..8a5dda3a424 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -136,6 +136,9 @@ struct arizona_pdata { /** GPIO used for mic isolation with HPDET */ int hpdet_id_gpio; + /** Use software comparison to determine mic presence */ + bool micd_software_compare; + /** Extra debounce timeout used during initial mic detection (ms) */ int micd_detect_debounce; diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 27d8aba092e..6f61443f8a6 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -132,6 +132,7 @@ #define ARIZONA_MIC_DETECT_LEVEL_2 0x2A7 #define ARIZONA_MIC_DETECT_LEVEL_3 0x2A8 #define ARIZONA_MIC_DETECT_LEVEL_4 0x2A9 +#define ARIZONA_MIC_DETECT_4 0x2AB #define ARIZONA_MIC_NOISE_MIX_CONTROL_1 0x2C3 #define ARIZONA_ISOLATION_CONTROL 0x2CB #define ARIZONA_JACK_DETECT_ANALOGUE 0x2D3 @@ -2108,9 +2109,9 @@ #define ARIZONA_ACCDET_SRC_MASK 0x2000 /* ACCDET_SRC */ #define ARIZONA_ACCDET_SRC_SHIFT 13 /* ACCDET_SRC */ #define ARIZONA_ACCDET_SRC_WIDTH 1 /* ACCDET_SRC */ -#define ARIZONA_ACCDET_MODE_MASK 0x0003 /* ACCDET_MODE - [1:0] */ -#define ARIZONA_ACCDET_MODE_SHIFT 0 /* ACCDET_MODE - [1:0] */ -#define ARIZONA_ACCDET_MODE_WIDTH 2 /* ACCDET_MODE - [1:0] */ +#define ARIZONA_ACCDET_MODE_MASK 0x0007 /* ACCDET_MODE - [2:0] */ +#define ARIZONA_ACCDET_MODE_SHIFT 0 /* ACCDET_MODE - [2:0] */ +#define ARIZONA_ACCDET_MODE_WIDTH 3 /* ACCDET_MODE - [2:0] */ /* * R667 (0x29B) - Headphone Detect 1 @@ -2219,6 +2220,16 @@ #define ARIZONA_MICD_STS_SHIFT 0 /* MICD_STS */ #define ARIZONA_MICD_STS_WIDTH 1 /* MICD_STS */ +/* + * R683 (0x2AB) - Mic Detect 4 + */ +#define ARIZONA_MICDET_ADCVAL_DIFF_MASK 0xFF00 /* MICDET_ADCVAL_DIFF - [15:8] */ +#define ARIZONA_MICDET_ADCVAL_DIFF_SHIFT 8 /* MICDET_ADCVAL_DIFF - [15:8] */ +#define ARIZONA_MICDET_ADCVAL_DIFF_WIDTH 8 /* MICDET_ADCVAL_DIFF - [15:8] */ +#define ARIZONA_MICDET_ADCVAL_MASK 0x007F /* MICDET_ADCVAL - [15:8] */ +#define ARIZONA_MICDET_ADCVAL_SHIFT 0 /* MICDET_ADCVAL - [15:8] */ +#define ARIZONA_MICDET_ADCVAL_WIDTH 7 /* MICDET_ADCVAL - [15:8] */ + /* * R707 (0x2C3) - Mic noise mix control 1 */ From 9311359c951eecc94633a9a7e72dc9bf7607910b Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 9 Oct 2013 12:58:16 +0100 Subject: [PATCH 0055/1167] mfd: arizona: Mark missing AOD registers as volatile This registers ARIZONA_AOD_WKUP_AND_TRIG and ARIZONA_AOD_IRQ_RAW_STATUS contain interrupt status bits and thus should be volatile. They are correctly marked on wm5102 but not on wm5110, this patch changes this. Furthermore volatile registers don't need defaults so remove those. Change-Id: If34b87ba434f8a181bebadca0de4558927033658 Signed-off-by: Charles Keepax --- drivers/mfd/wm5102-tables.c | 1 - drivers/mfd/wm5110-tables.c | 3 ++- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index bc6b0cf9afe..a675e6e4245 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -905,7 +905,6 @@ static const struct reg_default wm5102_reg_default[] = { { 0x00000D1B, 0xFFFF }, /* R3355 - IRQ2 Status 4 Mask */ { 0x00000D1C, 0xFFFF }, /* R3356 - IRQ2 Status 5 Mask */ { 0x00000D1F, 0x0000 }, /* R3359 - IRQ2 Control */ - { 0x00000D50, 0x0000 }, /* R3408 - AOD wkup and trig */ { 0x00000D53, 0xFFFF }, /* R3411 - AOD IRQ Mask IRQ1 */ { 0x00000D54, 0xFFFF }, /* R3412 - AOD IRQ Mask IRQ2 */ { 0x00000D56, 0x0000 }, /* R3414 - Jack detect debounce */ diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c index 592328d345e..ae343db3942 100644 --- a/drivers/mfd/wm5110-tables.c +++ b/drivers/mfd/wm5110-tables.c @@ -1236,7 +1236,6 @@ static const struct reg_default wm5110_reg_default[] = { { 0x00000D1B, 0xFFFF }, /* R3355 - IRQ2 Status 4 Mask */ { 0x00000D1C, 0xFFFF }, /* R3356 - IRQ2 Status 5 Mask */ { 0x00000D1F, 0x0000 }, /* R3359 - IRQ2 Control */ - { 0x00000D50, 0x0000 }, /* R3408 - AOD wkup and trig */ { 0x00000D53, 0xFFFF }, /* R3411 - AOD IRQ Mask IRQ1 */ { 0x00000D54, 0xFFFF }, /* R3412 - AOD IRQ Mask IRQ2 */ { 0x00000D56, 0x0000 }, /* R3414 - Jack detect debounce */ @@ -2457,8 +2456,10 @@ static bool wm5110_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_INTERRUPT_RAW_STATUS_7: case ARIZONA_INTERRUPT_RAW_STATUS_8: case ARIZONA_IRQ_PIN_STATUS: + case ARIZONA_AOD_WKUP_AND_TRIG: case ARIZONA_AOD_IRQ1: case ARIZONA_AOD_IRQ2: + case ARIZONA_AOD_IRQ_RAW_STATUS: case ARIZONA_FX_CTRL2: case ARIZONA_ASRC_STATUS: case ARIZONA_DSP_STATUS: From 74f1a62fc4a7ee1d97be21c05644c33e62fb03f1 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 22 Oct 2013 16:17:37 +0100 Subject: [PATCH 0056/1167] mfd: arizona: Export some of the DT helper functions Change-Id: I25910a0cf1cf3e527ddaedbab8a4eadcc20ebc82 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 17 ++++++++++------- include/linux/mfd/arizona/core.h | 7 +++++++ 2 files changed, 17 insertions(+), 7 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 08ef21455b5..60a45ee66dc 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -500,9 +500,9 @@ int arizona_of_get_type(struct device *dev) } EXPORT_SYMBOL_GPL(arizona_of_get_type); -static int arizona_of_get_named_gpio(struct arizona *arizona, - const char *prop, bool mandatory, - int *gpio) +int arizona_of_get_named_gpio(struct arizona *arizona, + const char *prop, bool mandatory, + int *gpio) { int ret; @@ -520,10 +520,11 @@ static int arizona_of_get_named_gpio(struct arizona *arizona, return ret; } +EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio); -static int arizona_of_read_u32_array(struct arizona *arizona, - const char *prop, bool mandatory, - u32 *data, size_t num) +int arizona_of_read_u32_array(struct arizona *arizona, + const char *prop, bool mandatory, + u32 *data, size_t num) { int ret; @@ -548,13 +549,15 @@ static int arizona_of_read_u32_array(struct arizona *arizona, return ret; } +EXPORT_SYMBOL_GPL(arizona_of_read_u32_array); -static int arizona_of_read_u32(struct arizona *arizona, +int arizona_of_read_u32(struct arizona *arizona, const char* prop, bool mandatory, u32 *data) { return arizona_of_read_u32_array(arizona, prop, mandatory, data, 1); } +EXPORT_SYMBOL_GPL(arizona_of_read_u32); static int arizona_of_get_gpio_defaults(struct arizona *arizona, const char *prop) diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index f797bb9b8b5..821f757888c 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -122,4 +122,11 @@ int arizona_set_irq_wake(struct arizona *arizona, int irq, int on); int wm5102_patch(struct arizona *arizona); int wm5110_patch(struct arizona *arizona); +extern int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, + bool mandatory, int *gpio); +extern int arizona_of_read_u32_array(struct arizona *arizona, const char *prop, + bool mandatory, u32 *data, size_t num); +extern int arizona_of_read_u32(struct arizona *arizona, const char* prop, + bool mandatory, u32 *data); + #endif From 739b96c68a48e53ea436a2c17ce95bcf920f1016 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 22 Oct 2013 16:13:40 +0100 Subject: [PATCH 0057/1167] extcon: arizona: Move processing of mic det DT into extcon driver Change-Id: I7bdf1cf4197b8bd44ed26f4737b24392b2c1b516 Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 32 ++++++++++++++++++++++++++++++++ drivers/mfd/arizona-core.c | 22 ---------------------- 2 files changed, 32 insertions(+), 22 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 0e0e31659c6..2129b55d22d 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -26,6 +26,7 @@ #include #include #include +#include #include @@ -1136,6 +1137,35 @@ static void arizona_micd_set_level(struct arizona *arizona, int index, regmap_update_bits(arizona->regmap, reg, mask, level); } +static int arizona_extcon_get_pdata(struct arizona *arizona) +{ + struct arizona_pdata *pdata = &arizona->pdata; + + arizona_of_read_u32(arizona, "wlf,micd-detect-debounce", false, + &pdata->micd_detect_debounce); + + arizona_of_get_named_gpio(arizona, "wlf,micd-pol-gpio", false, + &pdata->micd_pol_gpio); + + arizona_of_read_u32(arizona, "wlf,micd-bias-start-time", false, + &pdata->micd_bias_start_time); + + arizona_of_read_u32(arizona, "wlf,micd-rate", false, + &pdata->micd_rate); + + arizona_of_read_u32(arizona, "wlf,micd-dbtime", false, + &pdata->micd_dbtime); + + arizona_of_read_u32(arizona, "wlf,micd-timeout", false, + &pdata->micd_timeout); + + pdata->micd_force_micbias = + of_property_read_bool(arizona->dev->of_node, + "wlf,micd-force-micbias"); + + return 0; +} + static int arizona_extcon_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); @@ -1148,6 +1178,8 @@ static int arizona_extcon_probe(struct platform_device *pdev) if (!arizona->dapm || !arizona->dapm->card) return -EPROBE_DEFER; + arizona_extcon_get_pdata(arizona); + info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); if (!info) { dev_err(&pdev->dev, "Failed to allocate memory\n"); diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 60a45ee66dc..2e08ceeefa9 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -728,28 +728,6 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) arizona_of_get_named_gpio(arizona, "wlf,reset", true, &pdata->reset); arizona_of_get_named_gpio(arizona, "wlf,ldoena", true, &pdata->ldoena); - arizona_of_read_u32(arizona, "wlf,micd-detect-debounce", false, - &pdata->micd_detect_debounce); - - arizona_of_get_named_gpio(arizona, "wlf,micd-pol-gpio", false, - &pdata->micd_pol_gpio); - - arizona_of_read_u32(arizona, "wlf,micd-bias-start-time", false, - &pdata->micd_bias_start_time); - - arizona_of_read_u32(arizona, "wlf,micd-rate", false, - &pdata->micd_rate); - - arizona_of_read_u32(arizona, "wlf,micd-dbtime", false, - &pdata->micd_dbtime); - - arizona_of_read_u32(arizona, "wlf,micd-timeout", false, - &pdata->micd_timeout); - - pdata->micd_force_micbias = - of_property_read_bool(arizona->dev->of_node, - "wlf,micd-force-micbias"); - arizona_of_get_micd_ranges(arizona, "wlf,micd-ranges"); arizona_of_get_micd_configs(arizona, "wlf,micd-configs"); From 4b336459a70b455a8d19bcf0bf5de6abc7856598 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Fri, 27 Sep 2013 14:25:55 +0100 Subject: [PATCH 0058/1167] mfd: arizona: Only attempt to parse DT if platform data was not passed If platform data is passed when probing the device then it should take precedence over Device Tree. This patch saves cycles in the pdata case and prevents error messages when DT is not passed. Reported-by: Mark Brown Signed-off-by: Lee Jones (cherry picked from commit df7b309970b764d60c56c230895d130374ade069) Change-Id: I86ef9cfc5574d0aa1182c92c9f7c3c276185a957 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 2e08ceeefa9..f44a8a63a01 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -797,11 +797,11 @@ int arizona_dev_init(struct arizona *arizona) dev_set_drvdata(arizona->dev, arizona); mutex_init(&arizona->clk_lock); - arizona_of_get_core_pdata(arizona); - if (dev_get_platdata(arizona->dev)) memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), sizeof(arizona->pdata)); + else + arizona_of_get_core_pdata(arizona); regcache_cache_only(arizona->regmap, true); From 74ffd9668ae81c1a6d9f8eacc2c54a36a68da1a6 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 3 Oct 2013 16:16:01 +0100 Subject: [PATCH 0059/1167] mfd: arizona: Correct handling of device tree gpio defaults When setting GPIO defaults we are required to make a distinction between writing 0x0000 to the registers and leaving them untouched. When we receive between 0x0000 and 0xFFFF (inclusive) from either Platform Data or Device Tree, we should write the provided configuration to the device. Conversely, when we receive >0xFFFF we should leave the device configuration at its default setting. This patch fixes a bug and ensures that configuration 0x0000 isn't mistakenly written when the intention was to keep the default one. Reported-by: Heather Lomond Signed-off-by: Charles Keepax Signed-off-by: Lee Jones (cherry picked from commit 90a03846d272c39a1c5d49b16a65919d4957a224) Change-Id: I502fb78bd611c8cf2f8dd40eb6dd2c0073f1495f Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index f44a8a63a01..b368de77a26 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -580,7 +580,7 @@ static int arizona_of_get_gpio_defaults(struct arizona *arizona, for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) { if (pdata->gpio_defaults[i] > 0xffff) pdata->gpio_defaults[i] = 0; - if (pdata->gpio_defaults[i] == 0) + else if (pdata->gpio_defaults[i] == 0) pdata->gpio_defaults[i] = 0x10000; } From afe1d7d264b3e08f5a4c1f11ce6566f255dc6ed1 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 23 Oct 2013 16:11:05 +0100 Subject: [PATCH 0060/1167] mfd: wm5110: Enable micd clamp functionality Add missing registers and interrupts required for the micd clamping. Change-Id: I9e1c678677dfec73268fb8822bc30a392da7224c Signed-off-by: Charles Keepax --- drivers/mfd/wm5110-tables.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c index ae343db3942..989af1d7efd 100644 --- a/drivers/mfd/wm5110-tables.c +++ b/drivers/mfd/wm5110-tables.c @@ -272,6 +272,12 @@ int wm5110_patch(struct arizona *arizona) EXPORT_SYMBOL_GPL(wm5110_patch); static const struct regmap_irq wm5110_aod_irqs[ARIZONA_NUM_IRQ] = { + [ARIZONA_IRQ_MICD_CLAMP_FALL] = { + .mask = ARIZONA_MICD_CLAMP_FALL_EINT1 + }, + [ARIZONA_IRQ_MICD_CLAMP_RISE] = { + .mask = ARIZONA_MICD_CLAMP_RISE_EINT1 + }, [ARIZONA_IRQ_GP5_FALL] = { .mask = ARIZONA_GP5_FALL_EINT1 }, [ARIZONA_IRQ_GP5_RISE] = { .mask = ARIZONA_GP5_RISE_EINT1 }, [ARIZONA_IRQ_JD_FALL] = { .mask = ARIZONA_JD1_FALL_EINT1 }, @@ -534,6 +540,7 @@ static const struct reg_default wm5110_reg_default[] = { { 0x00000293, 0x0000 }, /* R659 - Accessory Detect Mode 1 */ { 0x0000029B, 0x0020 }, /* R667 - Headphone Detect 1 */ { 0x0000029C, 0x0000 }, /* R668 - Headphone Detect 2 */ + { 0x000002A2, 0x0000 }, /* R674 - Micd clamp control */ { 0x000002A3, 0x1102 }, /* R675 - Mic Detect 1 */ { 0x000002A4, 0x009F }, /* R676 - Mic Detect 2 */ { 0x000002A5, 0x0000 }, /* R677 - Mic Detect 3 */ @@ -1529,6 +1536,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg) case ARIZONA_ACCESSORY_DETECT_MODE_1: case ARIZONA_HEADPHONE_DETECT_1: case ARIZONA_HEADPHONE_DETECT_2: + case ARIZONA_MICD_CLAMP_CONTROL: case ARIZONA_MIC_DETECT_1: case ARIZONA_MIC_DETECT_2: case ARIZONA_MIC_DETECT_3: From 61f5a40840ec34020844f5c51f227caa303d7455 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 23 Oct 2013 16:32:28 +0100 Subject: [PATCH 0061/1167] extcon: arizona: Include device tree bindings for GPIO5 jack det Change-Id: I28c71c7597a108fc640db5557a50e99c2bc99868 Signed-off-by: Charles Keepax --- Documentation/devicetree/bindings/mfd/arizona.txt | 4 ++++ drivers/extcon/extcon-arizona.c | 6 ++++++ 2 files changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 8f2f5833d64..b33b2fa6f05 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -96,6 +96,10 @@ Optional properties: specified. 0 indicates Differential, 1 indicates Single Ended and 2 indicates a digital microphone. + - wlf,use-jd-gpio : Use GPIO input for jack detection. + - wlf,usr-jd-gpio-nopull : Internal pull on GPIO is disabled when used for + jack detection. + Example: codec: wm5102@1a { diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 2129b55d22d..f4cf7949b24 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -1163,6 +1163,12 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) of_property_read_bool(arizona->dev->of_node, "wlf,micd-force-micbias"); + pdata->jd_gpio5 = of_property_read_bool(arizona->dev->of_node, + "wlf,use-jd-gpio"); + + pdata->jd_gpio5_nopull = of_property_read_bool(arizona->dev->of_node, + "wlf,jd-gpio-nopull"); + return 0; } From b9efbcd06236a172185a5fefc4793295f3ee6b48 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 23 Oct 2013 16:43:38 +0100 Subject: [PATCH 0062/1167] extcon: arizona: Add support for general purpose switch The switch is typically used in conjunction with the MICDET clamp in order to suppress pops and clicks associated with jack insertion. Change-Id: I6924939fdffca1a4cea5cd251250897ad576f955 Signed-off-by: Charles Keepax --- Documentation/devicetree/bindings/mfd/arizona.txt | 5 +++++ drivers/extcon/extcon-arizona.c | 6 ++++++ drivers/mfd/wm5110-tables.c | 2 ++ include/linux/mfd/arizona/pdata.h | 3 +++ include/linux/mfd/arizona/registers.h | 8 ++++++++ 5 files changed, 24 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index b33b2fa6f05..516a6ad4ca4 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -100,6 +100,9 @@ Optional properties: - wlf,usr-jd-gpio-nopull : Internal pull on GPIO is disabled when used for jack detection. + - wlf,gpsw : Settings for the general purpose switch, set as per the + SW1_MODE bits in the GP Switch 1 register + Example: codec: wm5102@1a { @@ -136,6 +139,8 @@ codec: wm5102@1a { wlf,dmic-ref = <0 0 1 0>; wlf,inmode = <0 0 2 0>; + wlf,gpsw = <0x3>; + wlf,gpio-defaults = < 0x00000000 /* AIF1TXLRCLK */ 0xffffffff diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index f4cf7949b24..acd7a271517 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -1169,6 +1169,8 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) pdata->jd_gpio5_nopull = of_property_read_bool(arizona->dev->of_node, "wlf,jd-gpio-nopull"); + arizona_of_read_u32(arizona, "wlf,gpsw", false, &pdata->gpsw); + return 0; } @@ -1264,6 +1266,10 @@ static int arizona_extcon_probe(struct platform_device *pdev) info->micd_num_modes = ARRAY_SIZE(micd_default_modes); } + if (arizona->pdata.gpsw > 0) + regmap_update_bits(arizona->regmap, ARIZONA_GP_SWITCH_1, + ARIZONA_SW1_MODE_MASK, arizona->pdata.gpsw); + if (arizona->pdata.micd_pol_gpio > 0) { if (info->micd_modes[0].gpio) mode = GPIOF_OUT_INIT_HIGH; diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c index 989af1d7efd..044b28165f3 100644 --- a/drivers/mfd/wm5110-tables.c +++ b/drivers/mfd/wm5110-tables.c @@ -1213,6 +1213,7 @@ static const struct reg_default wm5110_reg_default[] = { { 0x00000C04, 0xA101 }, /* R3076 - GPIO5 CTRL */ { 0x00000C0F, 0x0400 }, /* R3087 - IRQ CTRL 1 */ { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */ + { 0x00000C18, 0x0000 }, /* R3096 - GP Switch 1 */ { 0x00000C20, 0x8002 }, /* R3104 - Misc Pad Ctrl 1 */ { 0x00000C21, 0x8001 }, /* R3105 - Misc Pad Ctrl 2 */ { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */ @@ -2212,6 +2213,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg) case ARIZONA_GPIO5_CTRL: case ARIZONA_IRQ_CTRL_1: case ARIZONA_GPIO_DEBOUNCE_CONFIG: + case ARIZONA_GP_SWITCH_1: case ARIZONA_MISC_PAD_CTRL_1: case ARIZONA_MISC_PAD_CTRL_2: case ARIZONA_MISC_PAD_CTRL_3: diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 8a5dda3a424..d6b53e58dae 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -191,6 +191,9 @@ struct arizona_pdata { /** GPIO for primary IRQ (used for edge triggered emulation) */ int irq_gpio; + + /** General purpose switch control */ + int gpsw; }; #endif diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 6f61443f8a6..6d86c59fc7a 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -819,6 +819,7 @@ #define ARIZONA_GPIO5_CTRL 0xC04 #define ARIZONA_IRQ_CTRL_1 0xC0F #define ARIZONA_GPIO_DEBOUNCE_CONFIG 0xC10 +#define ARIZONA_GP_SWITCH_1 0xC18 #define ARIZONA_MISC_PAD_CTRL_1 0xC20 #define ARIZONA_MISC_PAD_CTRL_2 0xC21 #define ARIZONA_MISC_PAD_CTRL_3 0xC22 @@ -4253,6 +4254,13 @@ #define ARIZONA_GP_DBTIME_SHIFT 12 /* GP_DBTIME - [15:12] */ #define ARIZONA_GP_DBTIME_WIDTH 4 /* GP_DBTIME - [15:12] */ +/* + * R3096 (0xC18) - GP Switch 1 + */ +#define ARIZONA_SW1_MODE_MASK 0x0003 /* SW1_MODE - [1:0] */ +#define ARIZONA_SW1_MODE_SHIFT 0 /* SW1_MODE - [1:0] */ +#define ARIZONA_SW1_MODE_WIDTH 2 /* SW1_MODE - [1:0] */ + /* * R3104 (0xC20) - Misc Pad Ctrl 1 */ From 1b15737c8cbe2e502e96b3954b26c7443f7def31 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 24 Oct 2013 10:21:13 +0100 Subject: [PATCH 0063/1167] extcon: arizona: Add device tree binding for micd software comparison Change-Id: I82a85499e7114fd47204c6a3808a0773423c17af Signed-off-by: Charles Keepax --- Documentation/devicetree/bindings/mfd/arizona.txt | 2 ++ drivers/extcon/extcon-arizona.c | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 516a6ad4ca4..8966c81ccc2 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -34,6 +34,8 @@ Optional properties: - wlf,reset : GPIO specifier for the GPIO controlling /RESET - wlf,ldoena : GPIO specifier for the GPIO controlling LDOENA + - wlf,micd-software-compare : Use a software comparison to determine mic + presence - wlf,micd-detect-debounce : Additional software microphone detection debounce specified in milliseconds - wlf,micd-pol-gpio : GPIO specifier for the GPIO controlling the headset diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index acd7a271517..eaaa12cf9d1 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -1163,6 +1163,10 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) of_property_read_bool(arizona->dev->of_node, "wlf,micd-force-micbias"); + pdata->micd_software_compare = + of_property_read_bool(arizona->dev->of_node, + "wlf,micd-software-compare"); + pdata->jd_gpio5 = of_property_read_bool(arizona->dev->of_node, "wlf,use-jd-gpio"); From 1e866158d8f896161f988b43562545efa5ec7503 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 24 Oct 2013 17:14:26 +0100 Subject: [PATCH 0064/1167] extcon: arizona: Fix reset of HPDET after race with removal We need to make sure we reset back to our starting state, especially making sure that we have disabled poll in the register cache. Change-Id: I8a0c92417ffdeef0d0ca804a0028cf949c0762f4 Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index eaaa12cf9d1..8bd1a7c66a1 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -589,6 +589,13 @@ static irqreturn_t arizona_hpdet_irq(int irq, void *data) goto out; } else if (!ret) { dev_dbg(arizona->dev, "Ignoring HPDET for removed cable\n"); + + /* Reset back to starting range */ + regmap_update_bits(arizona->regmap, + ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_IMPEDANCE_RANGE_MASK | ARIZONA_HP_POLL, + 0); + goto done; } @@ -624,9 +631,9 @@ static irqreturn_t arizona_hpdet_irq(int irq, void *data) dev_err(arizona->dev, "Failed to report HP/line: %d\n", ret); +done: arizona_extcon_do_magic(info, 0); -done: if (id_gpio) gpio_set_value_cansleep(id_gpio, 0); From 22950ed3060c4c0877f093e3ce07d8752767d07e Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 24 Oct 2013 16:00:03 +0100 Subject: [PATCH 0065/1167] extcon: arizona: Backport to provide switch like functionality Change-Id: I39f823f81f54defa9a2b1b1ad64dbc9511bfb058 Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 85 ++++++++++----------------------- 1 file changed, 25 insertions(+), 60 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 8bd1a7c66a1..f3969425fd7 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -97,6 +97,7 @@ struct arizona_extcon_info { bool mic; bool detecting; int jack_flips; + bool cable; int hpdet_ip; @@ -128,17 +129,11 @@ static const int arizona_micd_levels[] = { 1257, 30000, }; -#define ARIZONA_CABLE_MECHANICAL 0 -#define ARIZONA_CABLE_MICROPHONE 1 -#define ARIZONA_CABLE_HEADPHONE 2 -#define ARIZONA_CABLE_LINEOUT 3 - -static const char *arizona_cable[] = { - "Mechanical", - "Microphone", - "Headphone", - "Line-out", - NULL, +/* These values are copied from Android WiredAccessoryObserver */ +enum headset_state { + BIT_NO_HEADSET = 0, + BIT_HEADSET = (1 << 0), + BIT_HEADSET_NO_MIC = (1 << 1), }; static void arizona_start_hpdet_acc_id(struct arizona_extcon_info *info); @@ -568,7 +563,6 @@ static irqreturn_t arizona_hpdet_irq(int irq, void *data) struct arizona_extcon_info *info = data; struct arizona *arizona = info->arizona; int id_gpio = arizona->pdata.hpdet_id_gpio; - int report = ARIZONA_CABLE_HEADPHONE; int ret, reading; bool mic = false; @@ -582,12 +576,7 @@ static irqreturn_t arizona_hpdet_irq(int irq, void *data) } /* If the cable was removed while measuring ignore the result */ - ret = extcon_get_cable_state_(&info->edev, ARIZONA_CABLE_MECHANICAL); - if (ret < 0) { - dev_err(arizona->dev, "Failed to check cable state: %d\n", - ret); - goto out; - } else if (!ret) { + if (!info->cable) { dev_dbg(arizona->dev, "Ignoring HPDET for removed cable\n"); /* Reset back to starting range */ @@ -620,16 +609,10 @@ static irqreturn_t arizona_hpdet_irq(int irq, void *data) goto done; } - /* Report high impedence cables as line outputs */ - if (reading >= 5000) - report = ARIZONA_CABLE_LINEOUT; + if (mic || info->mic) + extcon_set_state(&info->edev, BIT_HEADSET); else - report = ARIZONA_CABLE_HEADPHONE; - - ret = extcon_set_cable_state_(&info->edev, report, true); - if (ret != 0) - dev_err(arizona->dev, "Failed to report HP/line: %d\n", - ret); + extcon_set_state(&info->edev, BIT_HEADSET_NO_MIC); done: arizona_extcon_do_magic(info, 0); @@ -703,14 +686,12 @@ static void arizona_identify_headphone(struct arizona_extcon_info *info) ARIZONA_ACCDET_MODE_MASK, ARIZONA_ACCDET_MODE_MIC); /* Just report headphone */ - ret = extcon_update_state(&info->edev, - 1 << ARIZONA_CABLE_HEADPHONE, - 1 << ARIZONA_CABLE_HEADPHONE); - if (ret != 0) - dev_err(arizona->dev, "Failed to report headphone: %d\n", ret); - - if (info->mic) + if (info->mic) { + extcon_set_state(&info->edev, BIT_HEADSET); arizona_start_mic(info); + } else { + extcon_set_state(&info->edev, BIT_HEADSET_NO_MIC); + } info->hpdet_active = false; } @@ -762,11 +743,10 @@ static void arizona_start_hpdet_acc_id(struct arizona_extcon_info *info) ARIZONA_ACCDET_MODE_MASK, ARIZONA_ACCDET_MODE_MIC); /* Just report headphone */ - ret = extcon_update_state(&info->edev, - 1 << ARIZONA_CABLE_HEADPHONE, - 1 << ARIZONA_CABLE_HEADPHONE); - if (ret != 0) - dev_err(arizona->dev, "Failed to report headphone: %d\n", ret); + if (info->mic) + extcon_set_state(&info->edev, BIT_HEADSET); + else + extcon_set_state(&info->edev, BIT_HEADSET_NO_MIC); info->hpdet_active = false; } @@ -865,15 +845,9 @@ static void arizona_micd_detect(struct work_struct *work) /* If we got a high impedence we should have a headset, report it. */ if (info->detecting && (val & ARIZONA_MICD_LVL_8)) { - arizona_identify_headphone(info); - - ret = extcon_update_state(&info->edev, - 1 << ARIZONA_CABLE_MICROPHONE, - 1 << ARIZONA_CABLE_MICROPHONE); + info->mic = true; - if (ret != 0) - dev_err(arizona->dev, "Headset report failed: %d\n", - ret); + arizona_identify_headphone(info); /* Don't need to regulate for button detection */ ret = regulator_allow_bypass(info->micvdd, false); @@ -882,7 +856,6 @@ static void arizona_micd_detect(struct work_struct *work) ret); } - info->mic = true; info->detecting = false; goto handled; } @@ -1054,12 +1027,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) if (info->last_jackdet == present) { dev_dbg(arizona->dev, "Detected jack\n"); - ret = extcon_set_cable_state_(&info->edev, - ARIZONA_CABLE_MECHANICAL, true); - - if (ret != 0) - dev_err(arizona->dev, "Mechanical report failed: %d\n", - ret); + info->cable = true; if (!arizona->pdata.hpdet_acc_id) { info->detecting = true; @@ -1078,6 +1046,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) } else { dev_dbg(arizona->dev, "Detected jack removal\n"); + info->cable = false; arizona_stop_mic(info); info->num_hpdet_res = 0; @@ -1092,10 +1061,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) info->micd_ranges[i].key, 0); input_sync(info->input); - ret = extcon_update_state(&info->edev, 0xffffffff, 0); - if (ret != 0) - dev_err(arizona->dev, "Removal report failed: %d\n", - ret); + extcon_set_state(&info->edev, BIT_NO_HEADSET); regmap_update_bits(arizona->regmap, ARIZONA_JACK_DETECT_DEBOUNCE, @@ -1248,8 +1214,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; } - info->edev.name = "Headset Jack"; - info->edev.supported_cable = arizona_cable; + info->edev.name = "h2w"; ret = extcon_dev_register(&info->edev, arizona->dev); if (ret < 0) { From 073c7a1ee9a0c498de56c7f50f376b37fbdae264 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 25 Oct 2013 15:34:01 +0100 Subject: [PATCH 0066/1167] ASoC: wm5110: Add missing routes for AEC Loopback Change-Id: I56e63bfde227c38c15c037bda4ca858077f1bc12 Reported-by: Nariman Poushin Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5110.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 03d3fe15410..de3799ce0dc 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -1308,24 +1308,36 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { ARIZONA_MUX_ROUTES("ISRC3DEC3", "ISRC3DEC3"), ARIZONA_MUX_ROUTES("ISRC3DEC4", "ISRC3DEC4"), + { "AEC Loopback", "HPOUT1L", "OUT1L" }, + { "AEC Loopback", "HPOUT1R", "OUT1R" }, { "HPOUT1L", NULL, "OUT1L" }, { "HPOUT1R", NULL, "OUT1R" }, + { "AEC Loopback", "HPOUT2L", "OUT2L" }, + { "AEC Loopback", "HPOUT2R", "OUT2R" }, { "HPOUT2L", NULL, "OUT2L" }, { "HPOUT2R", NULL, "OUT2R" }, + { "AEC Loopback", "HPOUT3L", "OUT3L" }, + { "AEC Loopback", "HPOUT3R", "OUT3R" }, { "HPOUT3L", NULL, "OUT3L" }, { "HPOUT3R", NULL, "OUT3L" }, + { "AEC Loopback", "SPKOUTL", "OUT4L" }, { "SPKOUTLN", NULL, "OUT4L" }, { "SPKOUTLP", NULL, "OUT4L" }, + { "AEC Loopback", "SPKOUTR", "OUT4R" }, { "SPKOUTRN", NULL, "OUT4R" }, { "SPKOUTRP", NULL, "OUT4R" }, + { "AEC Loopback", "SPKDAT1L", "OUT5L" }, + { "AEC Loopback", "SPKDAT1R", "OUT5R" }, { "SPKDAT1L", NULL, "OUT5L" }, { "SPKDAT1R", NULL, "OUT5R" }, + { "AEC Loopback", "SPKDAT2L", "OUT6L" }, + { "AEC Loopback", "SPKDAT2R", "OUT6R" }, { "SPKDAT2L", NULL, "OUT6L" }, { "SPKDAT2R", NULL, "OUT6R" }, From 8bb9cd33430d54e0fd36dc9dae88c65e3303a674 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 22 Jan 2013 14:38:11 +0000 Subject: [PATCH 0067/1167] ASoC: core: Add support for platform and CODEC drivers on same device Currently DAI playback and capture widgets are created during soc_probe_codec and soc_probe_platform, using the device associated with the DAI to check which widgets should be created. If a device registers both a CODEC and platform driver this leads the CODEC playback and capture widgets being overwritten by the widgets created by the platform probe. It is more sensible to retain the CODEC widgets as the most common use case for registering both a CODEC and platform driver on the same chip is a CODEC which contains a DSP for compressed playback. In this situation it is more sensible to attach the routing information to the CODEC and add a thin platform driver interface to link into the compressed API. So this patch will check for existing widgets during soc_probe_platform and only create new widgets if no existing ones exist. Change-Id: I06f234b13fbfe39fba6a939f8c8d5babf8fc7aa6 Signed-off-by: Charles Keepax --- sound/soc/soc-core.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index d56bbea6e75..7aefba73620 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -1160,7 +1160,8 @@ static int soc_probe_platform(struct snd_soc_card *card, /* Create DAPM widgets for each DAI stream */ list_for_each_entry(dai, &dai_list, list) { - if (dai->dev != platform->dev) + if (dai->dev != platform->dev || + dai->playback_widget || dai->capture_widget) continue; snd_soc_dapm_new_dai_widgets(&platform->dapm, dai); From 0da3b7e24da3db026fcd00d0bd513285a4b2bac3 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 23 Jul 2013 14:09:53 +0100 Subject: [PATCH 0068/1167] ASoC: wm5110: Register platform driver for CODEC Register a platform driver for the CODEC and provide stubs for the compressed ops. This will be used to hookup compressed record functionality. Change-Id: I05737c0224c8e8513b13587f6f8c2d201267f367 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5110.c | 86 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 85 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index de3799ce0dc..ed9f80b7b65 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -1498,6 +1498,57 @@ static struct snd_soc_dai_driver wm5110_dai[] = { }, }; +static int wm5110_open(struct snd_compr_stream *stream) +{ + return 0; +} + +static int wm5110_free(struct snd_compr_stream *stream) +{ + return 0; +} + +static int wm5110_set_params(struct snd_compr_stream *stream, + struct snd_compr_params *params) +{ + return 0; +} + +static int wm5110_get_params(struct snd_compr_stream *stream, + struct snd_codec *params) +{ + return 0; +} + +static int wm5110_trigger(struct snd_compr_stream *stream, int cmd) +{ + return 0; +} + +static int wm5110_pointer(struct snd_compr_stream *stream, + struct snd_compr_tstamp *tstamp) +{ + return 0; +} + +static int wm5110_copy(struct snd_compr_stream *stream, char __user *buf, + size_t count) +{ + return 0; +} + +static int wm5110_get_caps(struct snd_compr_stream *stream, + struct snd_compr_caps *caps) +{ + return 0; +} + +static int wm5110_get_codec_caps(struct snd_compr_stream *stream, + struct snd_compr_codec_caps *codec) +{ + return 0; +} + static int wm5110_codec_probe(struct snd_soc_codec *codec) { struct wm5110_priv *priv = snd_soc_codec_get_drvdata(codec); @@ -1567,6 +1618,22 @@ static struct snd_soc_codec_driver soc_codec_dev_wm5110 = { .num_dapm_routes = ARRAY_SIZE(wm5110_dapm_routes), }; +static struct snd_compr_ops wm5110_compr_ops = { + .open = wm5110_open, + .free = wm5110_free, + .set_params = wm5110_set_params, + .get_params = wm5110_get_params, + .trigger = wm5110_trigger, + .pointer = wm5110_pointer, + .copy = wm5110_copy, + .get_caps = wm5110_get_caps, + .get_codec_caps = wm5110_get_codec_caps, +}; + +static struct snd_soc_platform_driver wm5110_compr_platform = { + .compr_ops = &wm5110_compr_ops, +}; + static int wm5110_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); @@ -1631,8 +1698,25 @@ static int wm5110_probe(struct platform_device *pdev) pm_runtime_enable(&pdev->dev); pm_runtime_idle(&pdev->dev); - return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_wm5110, + ret = snd_soc_register_platform(&pdev->dev, &wm5110_compr_platform); + if (ret < 0) { + dev_err(&pdev->dev, + "Failed to register platform: %d\n", + ret); + goto error; + } + + ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_wm5110, wm5110_dai, ARRAY_SIZE(wm5110_dai)); + if (ret < 0) { + dev_err(&pdev->dev, + "Failed to register codec: %d\n", + ret); + snd_soc_unregister_platform(&pdev->dev); + } + +error: + return ret; } static int wm5110_remove(struct platform_device *pdev) From 78a5cd4aa0be277268f2567802de699268b6e170 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 23 Jul 2013 14:19:49 +0100 Subject: [PATCH 0069/1167] ASoC: wm5110: Add DAIs for voice control Change-Id: I6d645f4e676f399b31de7045dbe08747ec847602 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.h | 2 +- sound/soc/codecs/wm5110.c | 26 ++++++++++++++++++++++++++ 2 files changed, 27 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index f8e63865a1c..d906b2f6416 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -57,7 +57,7 @@ #define ARIZONA_CLK_98MHZ 5 #define ARIZONA_CLK_147MHZ 6 -#define ARIZONA_MAX_DAI 6 +#define ARIZONA_MAX_DAI 8 #define ARIZONA_MAX_ADSP 4 struct arizona; diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index ed9f80b7b65..4fe01b9478e 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -1197,6 +1197,11 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { { "Slim2 Capture", NULL, "SYSCLK" }, { "Slim3 Capture", NULL, "SYSCLK" }, + { "Voice Control CPU", NULL, "Voice Control DSP" }, + { "Voice Control DSP", NULL, "DSP3" }, + { "Voice Control CPU", NULL, "SYSCLK" }, + { "Voice Control DSP", NULL, "SYSCLK" }, + { "IN1L PGA", NULL, "IN1L" }, { "IN1R PGA", NULL, "IN1R" }, @@ -1496,6 +1501,27 @@ static struct snd_soc_dai_driver wm5110_dai[] = { }, .ops = &arizona_simple_dai_ops, }, + { + .name = "wm5110-cpu-voicectrl", + .capture = { + .stream_name = "Voice Control CPU", + .channels_min = 1, + .channels_max = 1, + .rates = WM5110_RATES, + .formats = WM5110_FORMATS, + }, + .compress_dai = 1, + }, + { + .name = "wm5110-dsp-voicectrl", + .capture = { + .stream_name = "Voice Control DSP", + .channels_min = 1, + .channels_max = 1, + .rates = WM5110_RATES, + .formats = WM5110_FORMATS, + }, + }, }; static int wm5110_open(struct snd_compr_stream *stream) From 8b5c714f04b73bb2d6693a76e3b13ac279770eab Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 23 Jul 2013 14:43:35 +0100 Subject: [PATCH 0070/1167] ASoC: wm_adsp: Add support to specify capabilities per firmware Change-Id: Iefd9cc23b9162246dac9fbea87dc83999dcb9b0e Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 71 +++++++++++++++++++++++++++++++++++++- sound/soc/codecs/wm_adsp.h | 10 ++++++ 2 files changed, 80 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 0dee46ed887..aace5dda3a5 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -207,8 +207,16 @@ static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_RX_ANC] = "Rx ANC", }; -static struct { +struct wm_adsp_fw_caps { + u32 id; + struct snd_codec_desc desc; +}; + +static const struct { const char *file; + int compr_direction; + int num_caps; + const struct wm_adsp_fw_caps *caps; } wm_adsp_fw[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" }, [WM_ADSP_FW_TX] = { .file = "tx" }, @@ -1723,3 +1731,64 @@ int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs) return ret; } EXPORT_SYMBOL_GPL(wm_adsp2_init); + +bool wm_adsp_compress_supported(const struct wm_adsp* adsp, + const struct snd_compr_stream* stream) +{ + if (adsp->fw >= 0 && adsp->fw < WM_ADSP_NUM_FW) { + if (wm_adsp_fw[adsp->fw].num_caps == 0) + return false; + + if (wm_adsp_fw[adsp->fw].compr_direction == stream->direction) + return true; + } + + return false; +} +EXPORT_SYMBOL_GPL(wm_adsp_compress_supported); + +bool wm_adsp_format_supported(const struct wm_adsp *adsp, + const struct snd_compr_stream *stream, + const struct snd_compr_params *params) +{ + const struct wm_adsp_fw_caps *caps; + int i; + + for (i = 0; i < wm_adsp_fw[adsp->fw].num_caps; i++) { + caps = &wm_adsp_fw[adsp->fw].caps[i]; + + if (caps->id != params->codec.id) + continue; + + if (stream->direction == SND_COMPRESS_PLAYBACK) { + if (caps->desc.max_ch < params->codec.ch_out) + continue; + } else { + if (caps->desc.max_ch < params->codec.ch_in) + continue; + } + + if ((caps->desc.sample_rates & params->codec.sample_rate) && + (caps->desc.formats & (1 << params->codec.format))) + return true; + } + + return false; +} +EXPORT_SYMBOL_GPL(wm_adsp_format_supported); + +void wm_adsp_get_caps(const struct wm_adsp *adsp, + const struct snd_compr_stream *stream, + struct snd_compr_caps *caps) +{ + int i; + + if (wm_adsp_fw[adsp->fw].caps) { + for (i = 0; i < wm_adsp_fw[adsp->fw].num_caps; i++) + caps->codecs[i] = wm_adsp_fw[adsp->fw].caps[i].id; + + caps->num_codecs = i; + caps->direction = wm_adsp_fw[adsp->fw].compr_direction; + } +} +EXPORT_SYMBOL_GPL(wm_adsp_get_caps); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 6e890b91659..32a2fa2ce40 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -15,6 +15,7 @@ #include #include +#include #include "wmfw.h" @@ -80,4 +81,13 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, int wm_adsp2_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); +extern bool wm_adsp_compress_supported(const struct wm_adsp* adsp, + const struct snd_compr_stream* stream); +extern bool wm_adsp_format_supported(const struct wm_adsp *adsp, + const struct snd_compr_stream *stream, + const struct snd_compr_params *params); +extern void wm_adsp_get_caps(const struct wm_adsp *adsp, + const struct snd_compr_stream *stream, + struct snd_compr_caps *caps); + #endif From df4d5620b3705c6a65ff1bcb5a5f537ec0571bf8 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 23 Jul 2013 14:50:25 +0100 Subject: [PATCH 0071/1167] ASoC: wm_adsp: Add Ez2Control firmware Change-Id: I7b941721f10be2242d784485f59494c31f2171a8 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 45 +++++++++++++++++++++++++++----------- 1 file changed, 32 insertions(+), 13 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index aace5dda3a5..9f2afd5d616 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -193,18 +193,20 @@ static void wm_adsp_buf_free(struct list_head *list) } } -#define WM_ADSP_NUM_FW 4 +#define WM_ADSP_NUM_FW 5 -#define WM_ADSP_FW_MBC_VSS 0 -#define WM_ADSP_FW_TX 1 -#define WM_ADSP_FW_TX_SPK 2 -#define WM_ADSP_FW_RX_ANC 3 +#define WM_ADSP_FW_MBC_VSS 0 +#define WM_ADSP_FW_TX 1 +#define WM_ADSP_FW_TX_SPK 2 +#define WM_ADSP_FW_RX_ANC 3 +#define WM_ADSP_FW_EZ2CONTROL 4 static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { - [WM_ADSP_FW_MBC_VSS] = "MBC/VSS", - [WM_ADSP_FW_TX] = "Tx", - [WM_ADSP_FW_TX_SPK] = "Tx Speaker", - [WM_ADSP_FW_RX_ANC] = "Rx ANC", + [WM_ADSP_FW_MBC_VSS] = "MBC/VSS", + [WM_ADSP_FW_TX] = "Tx", + [WM_ADSP_FW_TX_SPK] = "Tx Speaker", + [WM_ADSP_FW_RX_ANC] = "Rx ANC", + [WM_ADSP_FW_EZ2CONTROL] = "Ez2Control", }; struct wm_adsp_fw_caps { @@ -212,16 +214,33 @@ struct wm_adsp_fw_caps { struct snd_codec_desc desc; }; +static const struct wm_adsp_fw_caps ez2control_caps[] = { + { + .id = SND_AUDIOCODEC_PCM, + .desc = { + .max_ch = 1, + .sample_rates = SNDRV_PCM_RATE_16000, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + }, + }, +}; + static const struct { const char *file; int compr_direction; int num_caps; const struct wm_adsp_fw_caps *caps; } wm_adsp_fw[WM_ADSP_NUM_FW] = { - [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" }, - [WM_ADSP_FW_TX] = { .file = "tx" }, - [WM_ADSP_FW_TX_SPK] = { .file = "tx-spk" }, - [WM_ADSP_FW_RX_ANC] = { .file = "rx-anc" }, + [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" }, + [WM_ADSP_FW_TX] = { .file = "tx" }, + [WM_ADSP_FW_TX_SPK] = { .file = "tx-spk" }, + [WM_ADSP_FW_RX_ANC] = { .file = "rx-anc" }, + [WM_ADSP_FW_EZ2CONTROL] = { + .file = "ez2-control", + .compr_direction = SND_COMPRESS_CAPTURE, + .num_caps = ARRAY_SIZE(ez2control_caps), + .caps = ez2control_caps, + }, }; struct wm_coeff_ctl_ops { From 82a38d6c1ebd23fa7005972146536156ae765fe5 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 23 Jul 2013 17:24:17 +0100 Subject: [PATCH 0072/1167] ASoC: wm5110: Hookup stream opening and cap checking Add in hookup for opening a stream including all necessary checking that that an appropriate firmware is loaded. Change-Id: Ia95710372904d27e4ee2c78d2b81d7c0ff930a75 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5110.c | 93 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 91 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 4fe01b9478e..5a8e5c36c13 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -35,9 +35,20 @@ #define WM5110_NUM_ADSP 4 +#define WM5110_DEFAULT_FRAGMENTS 1 +#define WM5110_DEFAULT_FRAGMENT_SIZE 4096 + +struct wm5110_compr { + struct mutex lock; + + struct snd_compr_stream *stream; + struct wm_adsp* adsp; +}; + struct wm5110_priv { struct arizona_priv core; struct arizona_fll fll[2]; + struct wm5110_compr compr_info; }; static const struct wm_adsp_region wm5110_dsp1_regions[] = { @@ -1526,18 +1537,77 @@ static struct snd_soc_dai_driver wm5110_dai[] = { static int wm5110_open(struct snd_compr_stream *stream) { - return 0; + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm5110_priv *wm5110 = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = wm5110->core.arizona; + int i, ret = 0; + + mutex_lock(&wm5110->compr_info.lock); + + if (wm5110->compr_info.stream) { + ret = -EBUSY; + goto out; + } + + for (i = 0; i < WM5110_NUM_ADSP; ++i) { + if (wm_adsp_compress_supported(&wm5110->core.adsp[i], stream)) { + wm5110->compr_info.adsp = &wm5110->core.adsp[i]; + break; + } + } + + if (!wm5110->compr_info.adsp) { + dev_err(arizona->dev, + "No suitable firmware for compressed stream\n"); + ret = -EINVAL; + goto out; + } + + wm5110->compr_info.stream = stream; + +out: + mutex_unlock(&wm5110->compr_info.lock); + + return ret; } static int wm5110_free(struct snd_compr_stream *stream) { + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm5110_priv *wm5110 = snd_soc_codec_get_drvdata(rtd->codec); + + mutex_lock(&wm5110->compr_info.lock); + + wm5110->compr_info.stream = NULL; + + mutex_unlock(&wm5110->compr_info.lock); + return 0; } static int wm5110_set_params(struct snd_compr_stream *stream, struct snd_compr_params *params) { - return 0; + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm5110_priv *wm5110 = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = wm5110->core.arizona; + struct wm5110_compr *compr = &wm5110->compr_info; + int ret = 0; + + mutex_lock(&compr->lock); + + if (!wm_adsp_format_supported(compr->adsp, stream, params)) { + dev_err(arizona->dev, + "Invalid params: id:%u, chan:%u,%u, rate:%u format:%u\n", + params->codec.id, params->codec.ch_in, + params->codec.ch_out, params->codec.sample_rate, + params->codec.format); + ret = -EINVAL; + } + + mutex_unlock(&compr->lock); + + return ret; } static int wm5110_get_params(struct snd_compr_stream *stream, @@ -1566,6 +1636,23 @@ static int wm5110_copy(struct snd_compr_stream *stream, char __user *buf, static int wm5110_get_caps(struct snd_compr_stream *stream, struct snd_compr_caps *caps) { + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm5110_priv *wm5110 = snd_soc_codec_get_drvdata(rtd->codec); + + mutex_lock(&wm5110->compr_info.lock); + + memset(caps, 0, sizeof(*caps)); + + caps->direction = stream->direction; + caps->min_fragment_size = WM5110_DEFAULT_FRAGMENT_SIZE; + caps->max_fragment_size = WM5110_DEFAULT_FRAGMENT_SIZE; + caps->min_fragments = WM5110_DEFAULT_FRAGMENTS; + caps->max_fragments = WM5110_DEFAULT_FRAGMENTS; + + wm_adsp_get_caps(wm5110->compr_info.adsp, stream, caps); + + mutex_unlock(&wm5110->compr_info.lock); + return 0; } @@ -1676,6 +1763,8 @@ static int wm5110_probe(struct platform_device *pdev) * locate regulator supplies */ pdev->dev.of_node = arizona->dev->of_node; + mutex_init(&wm5110->compr_info.lock); + wm5110->core.arizona = arizona; wm5110->core.num_inputs = 8; From c048876d19845f284cb49581a6c354ee8afc92dd Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 24 Jul 2013 11:23:30 +0100 Subject: [PATCH 0073/1167] ASoC: wm5110: Add DSP interrupt Change-Id: I6695b176905f8f6c17bd33779ee6632bc7a561ad Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5110.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 5a8e5c36c13..77957036a55 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -1535,6 +1535,11 @@ static struct snd_soc_dai_driver wm5110_dai[] = { }, }; +static irqreturn_t adsp2_irq(int irq, void *data) +{ + return IRQ_HANDLED; +} + static int wm5110_open(struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; @@ -1563,8 +1568,14 @@ static int wm5110_open(struct snd_compr_stream *stream) goto out; } - wm5110->compr_info.stream = stream; + ret = arizona_request_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, + "ADSP2 interrupt 1", adsp2_irq, wm5110); + if (ret != 0) { + dev_err(arizona->dev, "Failed to request DSP IRQ: %d\n", ret); + goto out; + } + wm5110->compr_info.stream = stream; out: mutex_unlock(&wm5110->compr_info.lock); @@ -1575,9 +1586,12 @@ static int wm5110_free(struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; struct wm5110_priv *wm5110 = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = wm5110->core.arizona; mutex_lock(&wm5110->compr_info.lock); + arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, wm5110); + wm5110->compr_info.stream = NULL; mutex_unlock(&wm5110->compr_info.lock); From a76bbccc515b84270d985fd95e8b5e81551105aa Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 26 Jul 2013 10:09:44 +0100 Subject: [PATCH 0074/1167] ASoC: wm_adsp: Add functions to read and write to DSP memory Change-Id: I4eadbe7a3c6bc854b95af998f93d27fb0545538f Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 49 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 9f2afd5d616..507e36e9e97 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1811,3 +1811,52 @@ void wm_adsp_get_caps(const struct wm_adsp *adsp, } } EXPORT_SYMBOL_GPL(wm_adsp_get_caps); + +static int wm_adsp_read_data_block(struct wm_adsp* adsp, int mem_type, + unsigned int mem_addr, + unsigned int num_words, + u32* data) +{ + struct wm_adsp_region const *region = wm_adsp_find_region(adsp, + mem_type); + unsigned int i, reg; + int ret; + + if (!region) + return -EINVAL; + + reg = wm_adsp_region_to_reg(region, mem_addr); + + ret = regmap_raw_read(adsp->regmap, reg, data, + sizeof(*data) * num_words); + if (ret < 0) + return ret; + + for (i = 0; i < num_words; ++i) + data[i] = be32_to_cpu(data[i]) & 0x00ffffffu; + + return 0; +} + +static int wm_adsp_read_data_word(struct wm_adsp* adsp, int mem_type, + unsigned int mem_addr, u32* data) +{ + return wm_adsp_read_data_block(adsp, mem_type, mem_addr, 1, data); +} + +static int wm_adsp_write_data_word(struct wm_adsp* adsp, int mem_type, + unsigned int mem_addr, u32 data) +{ + struct wm_adsp_region const *region = wm_adsp_find_region(adsp, + mem_type); + unsigned int reg; + + if (!region) + return -EINVAL; + + reg = wm_adsp_region_to_reg(region, mem_addr); + + data = cpu_to_be32(data & 0x00ffffffu); + + return regmap_raw_write(adsp->regmap, reg, &data, sizeof(data)); +} From fd5d4864c9bc549477ea53b66e8cd6641f7d5098 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 26 Jul 2013 11:33:58 +0100 Subject: [PATCH 0075/1167] ASoC: wm5110: Read circular buffer parameters from ADSP Change-Id: I9fc6512e89708e70da009c2b0c8a02d3c1c3f6fc Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5110.c | 27 ++++- sound/soc/codecs/wm_adsp.c | 211 +++++++++++++++++++++++++++++++++++++ sound/soc/codecs/wm_adsp.h | 18 ++++ 3 files changed, 255 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 77957036a55..82cd776d8ad 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -1594,6 +1594,8 @@ static int wm5110_free(struct snd_compr_stream *stream) wm5110->compr_info.stream = NULL; + wm_adsp_stream_free(wm5110->compr_info.adsp); + mutex_unlock(&wm5110->compr_info.lock); return 0; @@ -1617,8 +1619,12 @@ static int wm5110_set_params(struct snd_compr_stream *stream, params->codec.ch_out, params->codec.sample_rate, params->codec.format); ret = -EINVAL; + goto out; } + ret = wm_adsp_stream_alloc(compr->adsp, params); + +out: mutex_unlock(&compr->lock); return ret; @@ -1632,7 +1638,26 @@ static int wm5110_get_params(struct snd_compr_stream *stream, static int wm5110_trigger(struct snd_compr_stream *stream, int cmd) { - return 0; + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm5110_priv *wm5110 = snd_soc_codec_get_drvdata(rtd->codec); + int ret = 0; + + mutex_lock(&wm5110->compr_info.lock); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + ret = wm_adsp_stream_start(wm5110->compr_info.adsp); + break; + case SNDRV_PCM_TRIGGER_STOP: + break; + default: + ret = -EINVAL; + break; + } + + mutex_unlock(&wm5110->compr_info.lock); + + return ret; } static int wm5110_pointer(struct snd_compr_stream *stream, diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 507e36e9e97..3f586933d38 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -209,9 +209,92 @@ static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_EZ2CONTROL] = "Ez2Control", }; +struct wm_adsp_buffer_region_def { + unsigned int mem_type; + unsigned int base_offset; + unsigned int size_offset; +}; + struct wm_adsp_fw_caps { u32 id; struct snd_codec_desc desc; + int num_host_regions; + struct wm_adsp_buffer_region_def *host_region_defs; +}; + +struct wm_adsp_system_config_xm_hdr { + __be32 sys_enable; + __be32 fw_id; + __be32 fw_rev; + __be32 boot_status; + __be32 watchdog; + __be32 dma_buffer_size; + __be32 rdma[6]; + __be32 wdma[8]; + __be32 build_job_name[3]; + __be32 build_job_number; +}; + +struct wm_adsp_alg_xm_struct { + __be32 magic; + __be32 smoothing; + __be32 threshold; + __be32 host_buf_ptr; + __be32 start_seq; + __be32 high_water_mark; + __be32 low_water_mark; + __be64 smoothed_power; +}; + +struct wm_adsp_host_buffer { + __be32 X_buf_base; + __be32 X_buf_size; + __be32 X_buf_base2; + __be32 X_buf_size2; + __be32 Y_buf_base; + __be32 Y_buf_size; + __be32 high_water_mark; + __be32 low_water_mark; + __be32 next_write_index; + __be32 next_read_index; + __be32 overflow; + __be32 state; + __be32 wrapped; + __be32 requested_rewind; + __be32 applied_rewind; +}; + +#define WM_ADSP_DATA_WORD_SIZE 3 +#define WM_ADSP_ALG_XM_STRUCT_MAGIC 0x58b90c + +#define ADSP2_SYSTEM_CONFIG_XM_PTR \ + (offsetof(struct wmfw_adsp2_id_hdr, xm) / sizeof(__be32)) + +#define WM_ADSP_ALG_XM_PTR \ + (sizeof(struct wm_adsp_system_config_xm_hdr) / sizeof(__be32)) + +#define HOST_BUFFER_FIELD(field) \ + (offsetof(struct wm_adsp_host_buffer, field) / sizeof(__be32)) + +#define ALG_XM_FIELD(field) \ + (offsetof(struct wm_adsp_alg_xm_struct, field) / sizeof(__be32)) + +struct wm_adsp_buffer_region_def ez2control_regions[] = { + { + .mem_type = WMFW_ADSP2_XM, + .base_offset = HOST_BUFFER_FIELD(X_buf_base), + .size_offset = HOST_BUFFER_FIELD(X_buf_size), + }, + { + .mem_type = WMFW_ADSP2_XM, + .base_offset = HOST_BUFFER_FIELD(X_buf_base2), + .size_offset = HOST_BUFFER_FIELD(X_buf_size2), + }, + { + .mem_type = WMFW_ADSP2_YM, + .base_offset = HOST_BUFFER_FIELD(Y_buf_base), + .size_offset = HOST_BUFFER_FIELD(Y_buf_size), + }, }; static const struct wm_adsp_fw_caps ez2control_caps[] = { @@ -222,6 +305,8 @@ static const struct wm_adsp_fw_caps ez2control_caps[] = { .sample_rates = SNDRV_PCM_RATE_16000, .formats = SNDRV_PCM_FMTBIT_S16_LE, }, + .num_host_regions = ARRAY_SIZE(ez2control_regions), + .host_region_defs = ez2control_regions, }, }; @@ -1860,3 +1945,129 @@ static int wm_adsp_write_data_word(struct wm_adsp* adsp, int mem_type, return regmap_raw_write(adsp->regmap, reg, &data, sizeof(data)); } + +static inline unsigned int wm_adsp_words_to_samps(const struct wm_adsp *adsp, + unsigned int words) +{ + return (words * WM_ADSP_DATA_WORD_SIZE) / adsp->sample_size; +} + +static inline int wm_adsp_host_buffer_read(struct wm_adsp *adsp, + unsigned int field_offset, u32* data) +{ + return wm_adsp_read_data_word(adsp, WMFW_ADSP2_XM, + adsp->host_buf_ptr + field_offset, data); +} + +static int wm_adsp_populate_buffer_regions(struct wm_adsp *adsp) +{ + int i, ret; + u32 size; + u32 cumulative_samps = 0; + struct wm_adsp_buffer_region_def *host_region_defs = + wm_adsp_fw[adsp->fw].caps->host_region_defs; + struct wm_adsp_buffer_region *region; + + for (i = 0; i < wm_adsp_fw[adsp->fw].caps->num_host_regions; ++i) { + region = &adsp->host_regions[i]; + + region->offset_samps = cumulative_samps; + region->mem_type = host_region_defs[i].mem_type; + + ret = wm_adsp_host_buffer_read(adsp, + host_region_defs[i].base_offset, + ®ion->base_addr); + if (ret < 0) + return ret; + + ret = wm_adsp_host_buffer_read(adsp, + host_region_defs[i].size_offset, + &size); + if (ret < 0) + return ret; + + cumulative_samps += wm_adsp_words_to_samps(adsp, size); + + region->cumulative_samps = cumulative_samps; + } + + return 0; +} + +int wm_adsp_stream_alloc(struct wm_adsp* adsp, + const struct snd_compr_params *params) +{ + unsigned int size; + + switch (params->codec.format) { + case SNDRV_PCM_FORMAT_S16_LE: + adsp->sample_size = 2; + break; + default: + return -EINVAL; + } + + if (!adsp->host_regions) { + size = wm_adsp_fw[adsp->fw].caps->num_host_regions * + sizeof(*adsp->host_regions); + adsp->host_regions = kzalloc(size, GFP_KERNEL); + + if (!adsp->host_regions) + return -ENOMEM; + } + + return 0; +} +EXPORT_SYMBOL_GPL(wm_adsp_stream_alloc); + +int wm_adsp_stream_free(struct wm_adsp* adsp) +{ + if (adsp->host_regions) { + kfree(adsp->host_regions); + adsp->host_regions = NULL; + } + + return 0; +} +EXPORT_SYMBOL_GPL(wm_adsp_stream_free); + +int wm_adsp_stream_start(struct wm_adsp *adsp) +{ + u32 xm_base, magic; + int ret; + + ret = wm_adsp_read_data_word(adsp, WMFW_ADSP2_XM, + ADSP2_SYSTEM_CONFIG_XM_PTR, &xm_base); + if (ret < 0) + return ret; + + ret = wm_adsp_read_data_word(adsp, WMFW_ADSP2_XM, + xm_base + WM_ADSP_ALG_XM_PTR + + ALG_XM_FIELD(magic), + &magic); + if (ret < 0) + return ret; + + if (magic != WM_ADSP_ALG_XM_STRUCT_MAGIC) + return -EINVAL; + + ret = wm_adsp_read_data_word(adsp, WMFW_ADSP2_XM, + xm_base + WM_ADSP_ALG_XM_PTR + + ALG_XM_FIELD(host_buf_ptr), + &adsp->host_buf_ptr); + if (ret < 0) + return ret; + + ret = wm_adsp_host_buffer_read(adsp, + HOST_BUFFER_FIELD(low_water_mark), + &adsp->low_water_mark); + if (ret < 0) + return ret; + + ret = wm_adsp_populate_buffer_regions(adsp); + if (ret < 0) + return ret; + + return 0; +} +EXPORT_SYMBOL_GPL(wm_adsp_stream_start); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 32a2fa2ce40..8b010afbaef 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -34,6 +34,13 @@ struct wm_adsp_alg_region { size_t len; }; +struct wm_adsp_buffer_region { + unsigned int offset_samps; + unsigned int cumulative_samps; + unsigned int mem_type; + unsigned int base_addr; +}; + struct wm_adsp { const char *part; int num; @@ -59,6 +66,12 @@ struct wm_adsp { struct regulator *dvfs; struct wm_coeff *wm_coeff; + + u32 host_buf_ptr; + u32 low_water_mark; + + int sample_size; + struct wm_adsp_buffer_region *host_regions; }; #define WM_ADSP1(wname, num) \ @@ -90,4 +103,9 @@ extern void wm_adsp_get_caps(const struct wm_adsp *adsp, const struct snd_compr_stream *stream, struct snd_compr_caps *caps); +extern int wm_adsp_stream_alloc(struct wm_adsp* adsp, + const struct snd_compr_params *params); +extern int wm_adsp_stream_free(struct wm_adsp* adsp); +extern int wm_adsp_stream_start(struct wm_adsp *adsp); + #endif From e460e3aff33be837cc0054508fbd5960bd6fae4b Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 9 Aug 2013 13:42:57 +0100 Subject: [PATCH 0076/1167] ASoC: wm5110: Read data from DSP into local buffer Change-Id: I2fcc5ba721251625b5979c04e14216423179ee49 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5110.c | 21 +++ sound/soc/codecs/wm_adsp.c | 265 ++++++++++++++++++++++++++++++++++++- sound/soc/codecs/wm_adsp.h | 7 + 3 files changed, 288 insertions(+), 5 deletions(-) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 82cd776d8ad..879652004f4 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -43,6 +43,8 @@ struct wm5110_compr { struct snd_compr_stream *stream; struct wm_adsp* adsp; + + size_t total_copied; }; struct wm5110_priv { @@ -1537,6 +1539,24 @@ static struct snd_soc_dai_driver wm5110_dai[] = { static irqreturn_t adsp2_irq(int irq, void *data) { + struct wm5110_priv *wm5110 = data; + int ret; + + mutex_lock(&wm5110->compr_info.lock); + + ret = wm_adsp_stream_capture(wm5110->compr_info.adsp); + if (ret < 0) { + dev_err(wm5110->core.arizona->dev, + "Failed to capture DSP data: %d\n", + ret); + goto out; + } + + wm5110->compr_info.total_copied += ret; + +out: + mutex_unlock(&wm5110->compr_info.lock); + return IRQ_HANDLED; } @@ -1593,6 +1613,7 @@ static int wm5110_free(struct snd_compr_stream *stream) arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, wm5110); wm5110->compr_info.stream = NULL; + wm5110->compr_info.total_copied = 0; wm_adsp_stream_free(wm5110->compr_info.adsp); diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 3f586933d38..331acf6b5d1 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -193,6 +193,9 @@ static void wm_adsp_buf_free(struct list_head *list) } } +/* Must remain a power of two */ +#define WM_ADSP_CAPTURE_BUFFER_SIZE 1048576 + #define WM_ADSP_NUM_FW 5 #define WM_ADSP_FW_MBC_VSS 0 @@ -210,9 +213,9 @@ static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { }; struct wm_adsp_buffer_region_def { - unsigned int mem_type; - unsigned int base_offset; - unsigned int size_offset; + unsigned int mem_type; + unsigned int base_offset; + unsigned int size_offset; }; struct wm_adsp_fw_caps { @@ -265,6 +268,7 @@ struct wm_adsp_host_buffer { }; #define WM_ADSP_DATA_WORD_SIZE 3 +#define WM_ADSP_RAW_BUFFER_SAMPS 384 #define WM_ADSP_ALG_XM_STRUCT_MAGIC 0x58b90c #define ADSP2_SYSTEM_CONFIG_XM_PTR \ @@ -279,6 +283,16 @@ struct wm_adsp_host_buffer { #define ALG_XM_FIELD(field) \ (offsetof(struct wm_adsp_alg_xm_struct, field) / sizeof(__be32)) +static const struct { + int words_per_group; + int samps_per_group; +} wm_adsp_sample_group[4] = { + [2] = { + .words_per_group = 2, + .samps_per_group = 3, + }, +}; + struct wm_adsp_buffer_region_def ez2control_regions[] = { { .mem_type = WMFW_ADSP2_XM, @@ -1952,6 +1966,21 @@ static inline unsigned int wm_adsp_words_to_samps(const struct wm_adsp *adsp, return (words * WM_ADSP_DATA_WORD_SIZE) / adsp->sample_size; } +static inline unsigned int wm_adsp_samps_to_words(const struct wm_adsp *adsp, + unsigned int samples, + unsigned int offset) +{ + unsigned int groups; + unsigned int words_per_group = + wm_adsp_sample_group[adsp->sample_size].words_per_group; + + samples += offset; + samples += words_per_group - 1; + groups = samples / words_per_group; + + return groups * words_per_group; +} + static inline int wm_adsp_host_buffer_read(struct wm_adsp *adsp, unsigned int field_offset, u32* data) { @@ -1959,6 +1988,14 @@ static inline int wm_adsp_host_buffer_read(struct wm_adsp *adsp, adsp->host_buf_ptr + field_offset, data); } +static inline int wm_adsp_host_buffer_write(struct wm_adsp *adsp, + unsigned int field_offset, u32 data) +{ + return wm_adsp_write_data_word(adsp, WMFW_ADSP2_XM, + adsp->host_buf_ptr + field_offset, + data); +} + static int wm_adsp_populate_buffer_regions(struct wm_adsp *adsp) { int i, ret; @@ -1994,9 +2031,156 @@ static int wm_adsp_populate_buffer_regions(struct wm_adsp *adsp) return 0; } +static void wm_adsp_extract_16bit(struct wm_adsp *adsp, int num_samps, + int group_offset) +{ + int i; + int16_t sample; + u32* raw_buf = adsp->raw_capt_buf; + int words_per_group = + wm_adsp_sample_group[sizeof(int16_t)].words_per_group; + + for (i = 0; i < num_samps; ++i) { + switch (group_offset++) { + case 2: + sample = (raw_buf[1] >> 8) & 0xffff; + raw_buf += words_per_group; + group_offset = 0; + break; + case 1: + sample = ((raw_buf[0] & 0xff) << 8) | + (raw_buf[1] & 0xff); + break; + default: + sample = (raw_buf[0] >> 8) & 0xffff; + break; + } + + *(int16_t*)(adsp->capt_buf.buf + adsp->capt_buf.head) = sample; + + adsp->capt_buf.head += adsp->sample_size; + adsp->capt_buf.head &= adsp->capt_buf_size - 1; + } +} + +static int wm_adsp_read_samples(struct wm_adsp *adsp, int32_t read_index, + int avail) +{ + int circ_space_s = CIRC_SPACE(adsp->capt_buf.head, + adsp->capt_buf.tail, + adsp->capt_buf_size) / adsp->sample_size; + int samps_per_group = + wm_adsp_sample_group[adsp->sample_size].samps_per_group; + int words_per_group = + wm_adsp_sample_group[adsp->sample_size].words_per_group; + int mem_type; + unsigned int adsp_addr, adsp_read_len; + int group_index, group_offset; + int num_samps; + int i, ret; + + /* Calculate read parameters */ + for (i = 0; i < wm_adsp_fw[adsp->fw].caps->num_host_regions; ++i) { + if (read_index < adsp->host_regions[i].cumulative_samps) + break; + } + + if (i == wm_adsp_fw[adsp->fw].caps->num_host_regions) + return -EINVAL; + + num_samps = adsp->host_regions[i].cumulative_samps - read_index; + group_index = (read_index - adsp->host_regions[i].offset_samps) / + samps_per_group; + group_offset = read_index % samps_per_group; + mem_type = adsp->host_regions[i].mem_type; + adsp_addr = adsp->host_regions[i].base_addr + + (group_index * words_per_group); + + if (circ_space_s < num_samps) + num_samps = circ_space_s; + if (avail < num_samps) + num_samps = avail; + if (num_samps >= adsp->raw_buf_samps) { + num_samps = adsp->raw_buf_samps; + num_samps -= group_offset; + } + if (!num_samps) + return 0; + + /* Read data from DSP */ + adsp_read_len = wm_adsp_samps_to_words(adsp, num_samps, group_offset); + ret = wm_adsp_read_data_block(adsp, mem_type, adsp_addr, + adsp_read_len, adsp->raw_capt_buf); + if (ret != 0) + return ret; + + /* Extract samples from raw buffer into the capture buffer */ + switch (adsp->sample_size) { + case 2: + wm_adsp_extract_16bit(adsp, num_samps, group_offset); + break; + default: + return -EINVAL; + } + + return num_samps; +} + +static int wm_adsp_capture_block(struct wm_adsp *adsp, int* avail) +{ + int last_region = wm_adsp_fw[adsp->fw].caps->num_host_regions - 1; + int host_size_samps = + adsp->host_regions[last_region].cumulative_samps; + int num_samps; + u32 next_read_index, next_write_index; + int32_t write_index, read_index; + int ret; + + /* Get current host buffer status */ + ret = wm_adsp_host_buffer_read(adsp, + HOST_BUFFER_FIELD(next_read_index), + &next_read_index); + if (ret < 0) + return ret; + ret = wm_adsp_host_buffer_read(adsp, + HOST_BUFFER_FIELD(next_write_index), + &next_write_index); + if (ret < 0) + return ret; + + read_index = sign_extend32(next_read_index, 23); + write_index = sign_extend32(next_write_index, 23); + + if (read_index < 0) + return -EIO; /* stream has not yet started */ + + *avail = write_index - read_index; + if (*avail < 0) + *avail += host_size_samps; + + /* Read data from DSP */ + num_samps = wm_adsp_read_samples(adsp, read_index, *avail); + if (num_samps <= 0) + return num_samps; + + /* update read index to account for samples read */ + next_read_index += num_samps; + if (next_read_index == host_size_samps) + next_read_index = 0; + + ret = wm_adsp_host_buffer_write(adsp, + HOST_BUFFER_FIELD(next_read_index), + next_read_index); + if (ret < 0) + return ret; + + return num_samps; +} + int wm_adsp_stream_alloc(struct wm_adsp* adsp, const struct snd_compr_params *params) { + int ret; unsigned int size; switch (params->codec.format) { @@ -2007,16 +2191,48 @@ int wm_adsp_stream_alloc(struct wm_adsp* adsp, return -EINVAL; } + if (!adsp->capt_buf.buf) { + adsp->capt_buf_size = WM_ADSP_CAPTURE_BUFFER_SIZE; + adsp->capt_buf.buf = kzalloc(adsp->capt_buf_size, GFP_KERNEL); + + if (!adsp->capt_buf.buf) + return -ENOMEM; + } + + adsp->capt_buf.head = 0; + adsp->capt_buf.tail = 0; + + if (!adsp->raw_capt_buf) { + adsp->raw_buf_samps = WM_ADSP_RAW_BUFFER_SAMPS; + size = wm_adsp_samps_to_words(adsp, adsp->raw_buf_samps, 0) * + sizeof(*adsp->raw_capt_buf); + adsp->raw_capt_buf = kzalloc(size, GFP_KERNEL); + + if (!adsp->raw_capt_buf) { + ret = -ENOMEM; + goto err_capt_buf; + } + } + if (!adsp->host_regions) { size = wm_adsp_fw[adsp->fw].caps->num_host_regions * sizeof(*adsp->host_regions); adsp->host_regions = kzalloc(size, GFP_KERNEL); - if (!adsp->host_regions) - return -ENOMEM; + if (!adsp->host_regions) { + ret = -ENOMEM; + goto err_raw_capt_buf; + } } return 0; + +err_raw_capt_buf: + kfree(adsp->raw_capt_buf); +err_capt_buf: + kfree(adsp->capt_buf.buf); + + return ret; } EXPORT_SYMBOL_GPL(wm_adsp_stream_alloc); @@ -2027,6 +2243,16 @@ int wm_adsp_stream_free(struct wm_adsp* adsp) adsp->host_regions = NULL; } + if (adsp->raw_capt_buf) { + kfree(adsp->raw_capt_buf); + adsp->raw_capt_buf = NULL; + } + + if (adsp->capt_buf.buf) { + kfree(adsp->capt_buf.buf); + adsp->capt_buf.buf = NULL; + } + return 0; } EXPORT_SYMBOL_GPL(wm_adsp_stream_free); @@ -2071,3 +2297,32 @@ int wm_adsp_stream_start(struct wm_adsp *adsp) return 0; } EXPORT_SYMBOL_GPL(wm_adsp_stream_start); + +int wm_adsp_stream_capture(struct wm_adsp *adsp) +{ + int avail = 0; + int amount_read; + int total_read = 0; + int ret = 0; + + adsp->buffer_drain_pending = false; + + do { + amount_read = 0; + do { + ret = wm_adsp_capture_block(adsp, &avail); + if (ret < 0) + return ret; + + amount_read += ret; + } while (ret > 0); + + total_read += amount_read; + } while (amount_read > 0 && avail > adsp->low_water_mark); + + if (avail > adsp->low_water_mark) + adsp->buffer_drain_pending = true; + + return total_read; +} +EXPORT_SYMBOL_GPL(wm_adsp_stream_capture); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 8b010afbaef..57593068637 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -13,6 +13,7 @@ #ifndef __WM_ADSP_H #define __WM_ADSP_H +#include #include #include #include @@ -71,7 +72,12 @@ struct wm_adsp { u32 low_water_mark; int sample_size; + u32 *raw_capt_buf; + int raw_buf_samps; + struct circ_buf capt_buf; + int capt_buf_size; struct wm_adsp_buffer_region *host_regions; + bool buffer_drain_pending; }; #define WM_ADSP1(wname, num) \ @@ -107,5 +113,6 @@ extern int wm_adsp_stream_alloc(struct wm_adsp* adsp, const struct snd_compr_params *params); extern int wm_adsp_stream_free(struct wm_adsp* adsp); extern int wm_adsp_stream_start(struct wm_adsp *adsp); +extern int wm_adsp_stream_capture(struct wm_adsp *adsp); #endif From 6e428dbd9f4d0c68fa6542bcf11845caf31979fe Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 9 Aug 2013 13:48:00 +0100 Subject: [PATCH 0077/1167] ASoC: wm5110: Copy data out to user-space Change-Id: I7bdc8ffb94a1f1d12cda97608cdabfbe9c1f35ee Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5110.c | 29 +++++++++++++++++++-- sound/soc/codecs/wm_adsp.c | 52 ++++++++++++++++++++++++++++++++++++++ sound/soc/codecs/wm_adsp.h | 3 +++ 3 files changed, 82 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 879652004f4..99738f20383 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -1540,7 +1540,7 @@ static struct snd_soc_dai_driver wm5110_dai[] = { static irqreturn_t adsp2_irq(int irq, void *data) { struct wm5110_priv *wm5110 = data; - int ret; + int ret, avail; mutex_lock(&wm5110->compr_info.lock); @@ -1554,6 +1554,10 @@ static irqreturn_t adsp2_irq(int irq, void *data) wm5110->compr_info.total_copied += ret; + avail = wm_adsp_stream_avail(wm5110->compr_info.adsp); + if (avail > WM5110_DEFAULT_FRAGMENT_SIZE) + snd_compr_fragment_elapsed(wm5110->compr_info.stream); + out: mutex_unlock(&wm5110->compr_info.lock); @@ -1684,13 +1688,34 @@ static int wm5110_trigger(struct snd_compr_stream *stream, int cmd) static int wm5110_pointer(struct snd_compr_stream *stream, struct snd_compr_tstamp *tstamp) { + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm5110_priv *wm5110 = snd_soc_codec_get_drvdata(rtd->codec); + + mutex_lock(&wm5110->compr_info.lock); + tstamp->byte_offset = 0; + tstamp->copied_total = wm5110->compr_info.total_copied; + mutex_unlock(&wm5110->compr_info.lock); + return 0; } static int wm5110_copy(struct snd_compr_stream *stream, char __user *buf, size_t count) { - return 0; + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm5110_priv *wm5110 = snd_soc_codec_get_drvdata(rtd->codec); + int ret; + + mutex_lock(&wm5110->compr_info.lock); + + if (stream->direction == SND_COMPRESS_PLAYBACK) + ret = -EINVAL; + else + ret = wm_adsp_stream_read(wm5110->compr_info.adsp, buf, count); + + mutex_unlock(&wm5110->compr_info.lock); + + return ret; } static int wm5110_get_caps(struct snd_compr_stream *stream, diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 331acf6b5d1..230e0c88f94 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2326,3 +2326,55 @@ int wm_adsp_stream_capture(struct wm_adsp *adsp) return total_read; } EXPORT_SYMBOL_GPL(wm_adsp_stream_capture); + +int wm_adsp_stream_read(struct wm_adsp *adsp, char __user *buf, size_t count) +{ + int avail, to_end; + + if (!adsp->running) + return -EIO; + + avail = CIRC_CNT(adsp->capt_buf.head, + adsp->capt_buf.tail, + adsp->capt_buf_size); + to_end = CIRC_CNT_TO_END(adsp->capt_buf.head, + adsp->capt_buf.tail, + adsp->capt_buf_size); + + if (avail < count) + count = avail; + + if (count > to_end) { + if (copy_to_user(buf, + adsp->capt_buf.buf + + adsp->capt_buf.tail, + to_end)) + return -EFAULT; + if (copy_to_user(buf + to_end, adsp->capt_buf.buf, + count - to_end)) + return -EFAULT; + } else { + if (copy_to_user(buf, + adsp->capt_buf.buf + + adsp->capt_buf.tail, + count)) + return -EFAULT; + } + + adsp->capt_buf.tail += count; + adsp->capt_buf.tail &= adsp->capt_buf_size - 1; + + if (adsp->buffer_drain_pending) + wm_adsp_stream_capture(adsp); + + return count; +} +EXPORT_SYMBOL_GPL(wm_adsp_stream_read); + +int wm_adsp_stream_avail(const struct wm_adsp *adsp) +{ + return CIRC_CNT(adsp->capt_buf.head, + adsp->capt_buf.tail, + adsp->capt_buf_size); +} +EXPORT_SYMBOL_GPL(wm_adsp_stream_avail); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 57593068637..d45630af434 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -114,5 +114,8 @@ extern int wm_adsp_stream_alloc(struct wm_adsp* adsp, extern int wm_adsp_stream_free(struct wm_adsp* adsp); extern int wm_adsp_stream_start(struct wm_adsp *adsp); extern int wm_adsp_stream_capture(struct wm_adsp *adsp); +extern int wm_adsp_stream_read(struct wm_adsp *adsp, char __user *buf, + size_t count); +extern int wm_adsp_stream_avail(const struct wm_adsp *adsp); #endif From 6503d6450d2fc222c6fe68127f035524e70f4552 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 30 Jul 2013 09:00:49 +0100 Subject: [PATCH 0078/1167] ASoC: wm5110: Set DSP IRQ to be a wake source Change-Id: If387357e512e7e42fe3e81e60208bdd0c92bd3ce Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5110.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 99738f20383..ff747aa85c9 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -1599,6 +1599,15 @@ static int wm5110_open(struct snd_compr_stream *stream) goto out; } + ret = irq_set_irq_wake(arizona->irq, 1); + if (ret) { + dev_err(arizona->dev, + "Failed to set DSP IRQ to wake source: %d\n", + ret); + arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, wm5110); + goto out; + } + wm5110->compr_info.stream = stream; out: mutex_unlock(&wm5110->compr_info.lock); @@ -1614,6 +1623,7 @@ static int wm5110_free(struct snd_compr_stream *stream) mutex_lock(&wm5110->compr_info.lock); + irq_set_irq_wake(arizona->irq, 0); arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, wm5110); wm5110->compr_info.stream = NULL; From 605a6e30becaef4e08a9093b62f202f0a989d67f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 29 Oct 2013 15:54:02 +0000 Subject: [PATCH 0079/1167] ALSA: compress: Pass through return value of open ops callback The snd_compr_open function would always return 0 even if the compressed ops open function failed, obviously this is incorrect. This patch fixes this. Change-Id: Iedc3bd2d64c9a9864af5f25cf0b106e80ddedbe3 Signed-off-by: Charles Keepax --- sound/core/compress_offload.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/core/compress_offload.c b/sound/core/compress_offload.c index 99db892d729..93b44920788 100644 --- a/sound/core/compress_offload.c +++ b/sound/core/compress_offload.c @@ -133,7 +133,7 @@ static int snd_compr_open(struct inode *inode, struct file *f) kfree(data); } snd_card_unref(compr->card); - return 0; + return ret; } static int snd_compr_free(struct inode *inode, struct file *f) From 234aa664b3a3b8967922a7f0b365cb2d12d4ef87 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 7 Nov 2013 14:43:58 +0000 Subject: [PATCH 0080/1167] Revert "extcon: arizona: Backport to provide switch like functionality" This reverts commit 22950ed3060c4c0877f093e3ce07d8752767d07e. Switch emulation under extcon does not work because Android's wired observer daemon requires the uevent to originate from devices/virtual/switch/h2w which will not be the case under extcon. With this in mind there is no point using compatability mode under extcon so we may as well offer the full extcon driver and a switch driver side by side. Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 85 +++++++++++++++++++++++---------- 1 file changed, 60 insertions(+), 25 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index f3969425fd7..8bd1a7c66a1 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -97,7 +97,6 @@ struct arizona_extcon_info { bool mic; bool detecting; int jack_flips; - bool cable; int hpdet_ip; @@ -129,11 +128,17 @@ static const int arizona_micd_levels[] = { 1257, 30000, }; -/* These values are copied from Android WiredAccessoryObserver */ -enum headset_state { - BIT_NO_HEADSET = 0, - BIT_HEADSET = (1 << 0), - BIT_HEADSET_NO_MIC = (1 << 1), +#define ARIZONA_CABLE_MECHANICAL 0 +#define ARIZONA_CABLE_MICROPHONE 1 +#define ARIZONA_CABLE_HEADPHONE 2 +#define ARIZONA_CABLE_LINEOUT 3 + +static const char *arizona_cable[] = { + "Mechanical", + "Microphone", + "Headphone", + "Line-out", + NULL, }; static void arizona_start_hpdet_acc_id(struct arizona_extcon_info *info); @@ -563,6 +568,7 @@ static irqreturn_t arizona_hpdet_irq(int irq, void *data) struct arizona_extcon_info *info = data; struct arizona *arizona = info->arizona; int id_gpio = arizona->pdata.hpdet_id_gpio; + int report = ARIZONA_CABLE_HEADPHONE; int ret, reading; bool mic = false; @@ -576,7 +582,12 @@ static irqreturn_t arizona_hpdet_irq(int irq, void *data) } /* If the cable was removed while measuring ignore the result */ - if (!info->cable) { + ret = extcon_get_cable_state_(&info->edev, ARIZONA_CABLE_MECHANICAL); + if (ret < 0) { + dev_err(arizona->dev, "Failed to check cable state: %d\n", + ret); + goto out; + } else if (!ret) { dev_dbg(arizona->dev, "Ignoring HPDET for removed cable\n"); /* Reset back to starting range */ @@ -609,10 +620,16 @@ static irqreturn_t arizona_hpdet_irq(int irq, void *data) goto done; } - if (mic || info->mic) - extcon_set_state(&info->edev, BIT_HEADSET); + /* Report high impedence cables as line outputs */ + if (reading >= 5000) + report = ARIZONA_CABLE_LINEOUT; else - extcon_set_state(&info->edev, BIT_HEADSET_NO_MIC); + report = ARIZONA_CABLE_HEADPHONE; + + ret = extcon_set_cable_state_(&info->edev, report, true); + if (ret != 0) + dev_err(arizona->dev, "Failed to report HP/line: %d\n", + ret); done: arizona_extcon_do_magic(info, 0); @@ -686,12 +703,14 @@ static void arizona_identify_headphone(struct arizona_extcon_info *info) ARIZONA_ACCDET_MODE_MASK, ARIZONA_ACCDET_MODE_MIC); /* Just report headphone */ - if (info->mic) { - extcon_set_state(&info->edev, BIT_HEADSET); + ret = extcon_update_state(&info->edev, + 1 << ARIZONA_CABLE_HEADPHONE, + 1 << ARIZONA_CABLE_HEADPHONE); + if (ret != 0) + dev_err(arizona->dev, "Failed to report headphone: %d\n", ret); + + if (info->mic) arizona_start_mic(info); - } else { - extcon_set_state(&info->edev, BIT_HEADSET_NO_MIC); - } info->hpdet_active = false; } @@ -743,10 +762,11 @@ static void arizona_start_hpdet_acc_id(struct arizona_extcon_info *info) ARIZONA_ACCDET_MODE_MASK, ARIZONA_ACCDET_MODE_MIC); /* Just report headphone */ - if (info->mic) - extcon_set_state(&info->edev, BIT_HEADSET); - else - extcon_set_state(&info->edev, BIT_HEADSET_NO_MIC); + ret = extcon_update_state(&info->edev, + 1 << ARIZONA_CABLE_HEADPHONE, + 1 << ARIZONA_CABLE_HEADPHONE); + if (ret != 0) + dev_err(arizona->dev, "Failed to report headphone: %d\n", ret); info->hpdet_active = false; } @@ -845,10 +865,16 @@ static void arizona_micd_detect(struct work_struct *work) /* If we got a high impedence we should have a headset, report it. */ if (info->detecting && (val & ARIZONA_MICD_LVL_8)) { - info->mic = true; - arizona_identify_headphone(info); + ret = extcon_update_state(&info->edev, + 1 << ARIZONA_CABLE_MICROPHONE, + 1 << ARIZONA_CABLE_MICROPHONE); + + if (ret != 0) + dev_err(arizona->dev, "Headset report failed: %d\n", + ret); + /* Don't need to regulate for button detection */ ret = regulator_allow_bypass(info->micvdd, false); if (ret != 0) { @@ -856,6 +882,7 @@ static void arizona_micd_detect(struct work_struct *work) ret); } + info->mic = true; info->detecting = false; goto handled; } @@ -1027,7 +1054,12 @@ static irqreturn_t arizona_jackdet(int irq, void *data) if (info->last_jackdet == present) { dev_dbg(arizona->dev, "Detected jack\n"); - info->cable = true; + ret = extcon_set_cable_state_(&info->edev, + ARIZONA_CABLE_MECHANICAL, true); + + if (ret != 0) + dev_err(arizona->dev, "Mechanical report failed: %d\n", + ret); if (!arizona->pdata.hpdet_acc_id) { info->detecting = true; @@ -1046,7 +1078,6 @@ static irqreturn_t arizona_jackdet(int irq, void *data) } else { dev_dbg(arizona->dev, "Detected jack removal\n"); - info->cable = false; arizona_stop_mic(info); info->num_hpdet_res = 0; @@ -1061,7 +1092,10 @@ static irqreturn_t arizona_jackdet(int irq, void *data) info->micd_ranges[i].key, 0); input_sync(info->input); - extcon_set_state(&info->edev, BIT_NO_HEADSET); + ret = extcon_update_state(&info->edev, 0xffffffff, 0); + if (ret != 0) + dev_err(arizona->dev, "Removal report failed: %d\n", + ret); regmap_update_bits(arizona->regmap, ARIZONA_JACK_DETECT_DEBOUNCE, @@ -1214,7 +1248,8 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; } - info->edev.name = "h2w"; + info->edev.name = "Headset Jack"; + info->edev.supported_cable = arizona_cable; ret = extcon_dev_register(&info->edev, arizona->dev); if (ret < 0) { From 2cf495cfec8b261c1fdaef59111817b1036e6e68 Mon Sep 17 00:00:00 2001 From: Mike Lockwood Date: Tue, 14 Oct 2008 12:50:16 -0400 Subject: [PATCH 0081/1167] drivers: Import Android switch driver Change-Id: Ia18b1a0d2845f2f0018a74680f2f58862beef9cc Signed-off-by: Charles Keepax --- drivers/Kconfig | 2 + drivers/Makefile | 1 + drivers/switch/Kconfig | 15 +++ drivers/switch/Makefile | 4 + drivers/switch/switch_class.c | 174 ++++++++++++++++++++++++++++++++++ drivers/switch/switch_gpio.c | 172 +++++++++++++++++++++++++++++++++ include/linux/switch.h | 53 +++++++++++ 7 files changed, 421 insertions(+) create mode 100644 drivers/switch/Kconfig create mode 100644 drivers/switch/Makefile create mode 100644 drivers/switch/switch_class.c create mode 100644 drivers/switch/switch_gpio.c create mode 100644 include/linux/switch.h diff --git a/drivers/Kconfig b/drivers/Kconfig index 9953a42809e..e40c5e6d541 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -100,6 +100,8 @@ source "drivers/memstick/Kconfig" source "drivers/leds/Kconfig" +source "drivers/switch/Kconfig" + source "drivers/accessibility/Kconfig" source "drivers/infiniband/Kconfig" diff --git a/drivers/Makefile b/drivers/Makefile index 130abc1dfd6..2bb844b79a6 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -111,6 +111,7 @@ obj-$(CONFIG_CPU_IDLE) += cpuidle/ obj-y += mmc/ obj-$(CONFIG_MEMSTICK) += memstick/ obj-y += leds/ +obj-$(CONFIG_SWITCH) += switch/ obj-$(CONFIG_INFINIBAND) += infiniband/ obj-$(CONFIG_SGI_SN) += sn/ obj-y += firmware/ diff --git a/drivers/switch/Kconfig b/drivers/switch/Kconfig new file mode 100644 index 00000000000..19404b6f777 --- /dev/null +++ b/drivers/switch/Kconfig @@ -0,0 +1,15 @@ +menuconfig SWITCH + tristate "Switch class support" + help + Say Y here to enable switch class support. This allows + monitoring switches by userspace via sysfs and uevent. + +if SWITCH + +config SWITCH_GPIO + tristate "GPIO Swith support" + depends on GPIOLIB + help + Say Y here to enable GPIO based switch support. + +endif # SWITCH diff --git a/drivers/switch/Makefile b/drivers/switch/Makefile new file mode 100644 index 00000000000..f7606ed4a71 --- /dev/null +++ b/drivers/switch/Makefile @@ -0,0 +1,4 @@ +# Switch Class Driver +obj-$(CONFIG_SWITCH) += switch_class.o +obj-$(CONFIG_SWITCH_GPIO) += switch_gpio.o + diff --git a/drivers/switch/switch_class.c b/drivers/switch/switch_class.c new file mode 100644 index 00000000000..e05fc259114 --- /dev/null +++ b/drivers/switch/switch_class.c @@ -0,0 +1,174 @@ +/* + * drivers/switch/switch_class.c + * + * Copyright (C) 2008 Google, Inc. + * Author: Mike Lockwood + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * +*/ + +#include +#include +#include +#include +#include +#include +#include + +struct class *switch_class; +static atomic_t device_count; + +static ssize_t state_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct switch_dev *sdev = (struct switch_dev *) + dev_get_drvdata(dev); + + if (sdev->print_state) { + int ret = sdev->print_state(sdev, buf); + if (ret >= 0) + return ret; + } + return sprintf(buf, "%d\n", sdev->state); +} + +static ssize_t name_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct switch_dev *sdev = (struct switch_dev *) + dev_get_drvdata(dev); + + if (sdev->print_name) { + int ret = sdev->print_name(sdev, buf); + if (ret >= 0) + return ret; + } + return sprintf(buf, "%s\n", sdev->name); +} + +static DEVICE_ATTR(state, S_IRUGO | S_IWUSR, state_show, NULL); +static DEVICE_ATTR(name, S_IRUGO | S_IWUSR, name_show, NULL); + +void switch_set_state(struct switch_dev *sdev, int state) +{ + char name_buf[120]; + char state_buf[120]; + char *prop_buf; + char *envp[3]; + int env_offset = 0; + int length; + + if (sdev->state != state) { + sdev->state = state; + + prop_buf = (char *)get_zeroed_page(GFP_KERNEL); + if (prop_buf) { + length = name_show(sdev->dev, NULL, prop_buf); + if (length > 0) { + if (prop_buf[length - 1] == '\n') + prop_buf[length - 1] = 0; + snprintf(name_buf, sizeof(name_buf), + "SWITCH_NAME=%s", prop_buf); + envp[env_offset++] = name_buf; + } + length = state_show(sdev->dev, NULL, prop_buf); + if (length > 0) { + if (prop_buf[length - 1] == '\n') + prop_buf[length - 1] = 0; + snprintf(state_buf, sizeof(state_buf), + "SWITCH_STATE=%s", prop_buf); + envp[env_offset++] = state_buf; + } + envp[env_offset] = NULL; + kobject_uevent_env(&sdev->dev->kobj, KOBJ_CHANGE, envp); + free_page((unsigned long)prop_buf); + } else { + printk(KERN_ERR "out of memory in switch_set_state\n"); + kobject_uevent(&sdev->dev->kobj, KOBJ_CHANGE); + } + } +} +EXPORT_SYMBOL_GPL(switch_set_state); + +static int create_switch_class(void) +{ + if (!switch_class) { + switch_class = class_create(THIS_MODULE, "switch"); + if (IS_ERR(switch_class)) + return PTR_ERR(switch_class); + atomic_set(&device_count, 0); + } + + return 0; +} + +int switch_dev_register(struct switch_dev *sdev) +{ + int ret; + + if (!switch_class) { + ret = create_switch_class(); + if (ret < 0) + return ret; + } + + sdev->index = atomic_inc_return(&device_count); + sdev->dev = device_create(switch_class, NULL, + MKDEV(0, sdev->index), NULL, sdev->name); + if (IS_ERR(sdev->dev)) + return PTR_ERR(sdev->dev); + + ret = device_create_file(sdev->dev, &dev_attr_state); + if (ret < 0) + goto err_create_file_1; + ret = device_create_file(sdev->dev, &dev_attr_name); + if (ret < 0) + goto err_create_file_2; + + dev_set_drvdata(sdev->dev, sdev); + sdev->state = 0; + return 0; + +err_create_file_2: + device_remove_file(sdev->dev, &dev_attr_state); +err_create_file_1: + device_destroy(switch_class, MKDEV(0, sdev->index)); + printk(KERN_ERR "switch: Failed to register driver %s\n", sdev->name); + + return ret; +} +EXPORT_SYMBOL_GPL(switch_dev_register); + +void switch_dev_unregister(struct switch_dev *sdev) +{ + device_remove_file(sdev->dev, &dev_attr_name); + device_remove_file(sdev->dev, &dev_attr_state); + device_destroy(switch_class, MKDEV(0, sdev->index)); + dev_set_drvdata(sdev->dev, NULL); +} +EXPORT_SYMBOL_GPL(switch_dev_unregister); + +static int __init switch_class_init(void) +{ + return create_switch_class(); +} + +static void __exit switch_class_exit(void) +{ + class_destroy(switch_class); +} + +module_init(switch_class_init); +module_exit(switch_class_exit); + +MODULE_AUTHOR("Mike Lockwood "); +MODULE_DESCRIPTION("Switch class driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/switch/switch_gpio.c b/drivers/switch/switch_gpio.c new file mode 100644 index 00000000000..621d62d20c9 --- /dev/null +++ b/drivers/switch/switch_gpio.c @@ -0,0 +1,172 @@ +/* + * drivers/switch/switch_gpio.c + * + * Copyright (C) 2008 Google, Inc. + * Author: Mike Lockwood + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * +*/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct gpio_switch_data { + struct switch_dev sdev; + unsigned gpio; + const char *name_on; + const char *name_off; + const char *state_on; + const char *state_off; + int irq; + struct work_struct work; +}; + +static void gpio_switch_work(struct work_struct *work) +{ + int state; + struct gpio_switch_data *data = + container_of(work, struct gpio_switch_data, work); + + state = gpio_get_value(data->gpio); + switch_set_state(&data->sdev, state); +} + +static irqreturn_t gpio_irq_handler(int irq, void *dev_id) +{ + struct gpio_switch_data *switch_data = + (struct gpio_switch_data *)dev_id; + + schedule_work(&switch_data->work); + return IRQ_HANDLED; +} + +static ssize_t switch_gpio_print_state(struct switch_dev *sdev, char *buf) +{ + struct gpio_switch_data *switch_data = + container_of(sdev, struct gpio_switch_data, sdev); + const char *state; + if (switch_get_state(sdev)) + state = switch_data->state_on; + else + state = switch_data->state_off; + + if (state) + return sprintf(buf, "%s\n", state); + return -1; +} + +static int gpio_switch_probe(struct platform_device *pdev) +{ + struct gpio_switch_platform_data *pdata = pdev->dev.platform_data; + struct gpio_switch_data *switch_data; + int ret = 0; + + if (!pdata) + return -EBUSY; + + switch_data = kzalloc(sizeof(struct gpio_switch_data), GFP_KERNEL); + if (!switch_data) + return -ENOMEM; + + switch_data->sdev.name = pdata->name; + switch_data->gpio = pdata->gpio; + switch_data->name_on = pdata->name_on; + switch_data->name_off = pdata->name_off; + switch_data->state_on = pdata->state_on; + switch_data->state_off = pdata->state_off; + switch_data->sdev.print_state = switch_gpio_print_state; + + ret = switch_dev_register(&switch_data->sdev); + if (ret < 0) + goto err_switch_dev_register; + + ret = gpio_request(switch_data->gpio, pdev->name); + if (ret < 0) + goto err_request_gpio; + + ret = gpio_direction_input(switch_data->gpio); + if (ret < 0) + goto err_set_gpio_input; + + INIT_WORK(&switch_data->work, gpio_switch_work); + + switch_data->irq = gpio_to_irq(switch_data->gpio); + if (switch_data->irq < 0) { + ret = switch_data->irq; + goto err_detect_irq_num_failed; + } + + ret = request_irq(switch_data->irq, gpio_irq_handler, + IRQF_TRIGGER_LOW, pdev->name, switch_data); + if (ret < 0) + goto err_request_irq; + + /* Perform initial detection */ + gpio_switch_work(&switch_data->work); + + return 0; + +err_request_irq: +err_detect_irq_num_failed: +err_set_gpio_input: + gpio_free(switch_data->gpio); +err_request_gpio: + switch_dev_unregister(&switch_data->sdev); +err_switch_dev_register: + kfree(switch_data); + + return ret; +} + +static int gpio_switch_remove(struct platform_device *pdev) +{ + struct gpio_switch_data *switch_data = platform_get_drvdata(pdev); + + cancel_work_sync(&switch_data->work); + gpio_free(switch_data->gpio); + switch_dev_unregister(&switch_data->sdev); + kfree(switch_data); + + return 0; +} + +static struct platform_driver gpio_switch_driver = { + .probe = gpio_switch_probe, + .remove = gpio_switch_remove, + .driver = { + .name = "switch-gpio", + .owner = THIS_MODULE, + }, +}; + +static int __init gpio_switch_init(void) +{ + return platform_driver_register(&gpio_switch_driver); +} + +static void __exit gpio_switch_exit(void) +{ + platform_driver_unregister(&gpio_switch_driver); +} + +module_init(gpio_switch_init); +module_exit(gpio_switch_exit); + +MODULE_AUTHOR("Mike Lockwood "); +MODULE_DESCRIPTION("GPIO Switch driver"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/switch.h b/include/linux/switch.h new file mode 100644 index 00000000000..3e4c748e343 --- /dev/null +++ b/include/linux/switch.h @@ -0,0 +1,53 @@ +/* + * Switch class driver + * + * Copyright (C) 2008 Google, Inc. + * Author: Mike Lockwood + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * +*/ + +#ifndef __LINUX_SWITCH_H__ +#define __LINUX_SWITCH_H__ + +struct switch_dev { + const char *name; + struct device *dev; + int index; + int state; + + ssize_t (*print_name)(struct switch_dev *sdev, char *buf); + ssize_t (*print_state)(struct switch_dev *sdev, char *buf); +}; + +struct gpio_switch_platform_data { + const char *name; + unsigned gpio; + + /* if NULL, switch_dev.name will be printed */ + const char *name_on; + const char *name_off; + /* if NULL, "0" or "1" will be printed */ + const char *state_on; + const char *state_off; +}; + +extern int switch_dev_register(struct switch_dev *sdev); +extern void switch_dev_unregister(struct switch_dev *sdev); + +static inline int switch_get_state(struct switch_dev *sdev) +{ + return sdev->state; +} + +extern void switch_set_state(struct switch_dev *sdev, int state); + +#endif /* __LINUX_SWITCH_H__ */ From 25eaa5bb5d1b0d109031f0b95f8879b7509e163d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 7 Nov 2013 16:47:45 +0000 Subject: [PATCH 0082/1167] extcon: arizona: Ensure that the headphone detection is disabled The previous fixup to this function only covered some paths, this patch will ensure that the headphone detection is reset on all paths which would terminate the headphone detection. Change-Id: If620316a65522b26b64b0adf9deb0d5e2d0430e4 Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 8bd1a7c66a1..63c1de41944 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -589,13 +589,6 @@ static irqreturn_t arizona_hpdet_irq(int irq, void *data) goto out; } else if (!ret) { dev_dbg(arizona->dev, "Ignoring HPDET for removed cable\n"); - - /* Reset back to starting range */ - regmap_update_bits(arizona->regmap, - ARIZONA_HEADPHONE_DETECT_1, - ARIZONA_HP_IMPEDANCE_RANGE_MASK | ARIZONA_HP_POLL, - 0); - goto done; } @@ -632,6 +625,12 @@ static irqreturn_t arizona_hpdet_irq(int irq, void *data) ret); done: + /* Reset back to starting range */ + regmap_update_bits(arizona->regmap, + ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_IMPEDANCE_RANGE_MASK | ARIZONA_HP_POLL, + 0); + arizona_extcon_do_magic(info, 0); if (id_gpio) From 94522eb59942b09bf3ebae196082ffbbd6c857ca Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 31 Oct 2013 14:19:58 +0000 Subject: [PATCH 0083/1167] extcon: arizona: Fix headphone detection accuracy on wm5110 wm5110 requires slightly different configuration of the headphone detection to other Arizona devices. Otherwise accuracy will be limited especially at high impedances. Change-Id: I706928ca4201f698659f253e254c31bb5d728d27 Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 63c1de41944..6a5d7c58d6a 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -147,8 +147,24 @@ static void arizona_extcon_do_magic(struct arizona_extcon_info *info, unsigned int magic) { struct arizona *arizona = info->arizona; + unsigned int mask = 0, val = 0; int ret; + switch (arizona->type) { + case WM5110: + mask = 0x0007; + if (magic) + val = 0x0001; + else + val = 0x0006; + break; + default: + mask = 0x4000; + if (magic) + val = 0x4000; + break; + }; + mutex_lock(&arizona->dapm->card->dapm_mutex); arizona->hpdet_magic = magic; @@ -165,14 +181,12 @@ static void arizona_extcon_do_magic(struct arizona_extcon_info *info, ret); } - ret = regmap_update_bits(arizona->regmap, 0x225, 0x4000, - magic); + ret = regmap_update_bits(arizona->regmap, 0x225, mask, val); if (ret != 0) dev_warn(arizona->dev, "Failed to do magic: %d\n", ret); - ret = regmap_update_bits(arizona->regmap, 0x226, 0x4000, - magic); + ret = regmap_update_bits(arizona->regmap, 0x226, mask, val); if (ret != 0) dev_warn(arizona->dev, "Failed to do magic: %d\n", ret); From b088d2341aacac956fcb64f9392b38b8bbb80b9a Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 1 Nov 2013 13:10:41 +0000 Subject: [PATCH 0084/1167] extcon: arizona: No need to switch back down HPDET ranges No point in revisiting ranges the detection will be no more accurate the second time simply report that the resistance is right on the range boundry. Change-Id: I481cdb3241dabcb6a54eaefc619840aa939513c8 Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 21 +++++++-------------- 1 file changed, 7 insertions(+), 14 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 6a5d7c58d6a..664d077f69d 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -474,20 +474,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) range = (range & ARIZONA_HP_IMPEDANCE_RANGE_MASK) >> ARIZONA_HP_IMPEDANCE_RANGE_SHIFT; - /* Skip up or down a range? */ - if (range && (val < arizona_hpdet_c_ranges[range].min)) { - range--; - dev_dbg(arizona->dev, "Moving to HPDET range %d-%d\n", - arizona_hpdet_c_ranges[range].min, - arizona_hpdet_c_ranges[range].max); - regmap_update_bits(arizona->regmap, - ARIZONA_HEADPHONE_DETECT_1, - ARIZONA_HP_IMPEDANCE_RANGE_MASK, - range << - ARIZONA_HP_IMPEDANCE_RANGE_SHIFT); - return -EAGAIN; - } - + /* Skip up a range, or report? */ if (range < ARRAY_SIZE(arizona_hpdet_c_ranges) - 1 && (val >= arizona_hpdet_c_ranges[range].max)) { range++; @@ -501,6 +488,12 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) ARIZONA_HP_IMPEDANCE_RANGE_SHIFT); return -EAGAIN; } + + if (range && (val < arizona_hpdet_c_ranges[range].min)) { + dev_dbg(arizona->dev, "Reporting range boundary %d\n", + arizona_hpdet_c_ranges[range].min); + val = arizona_hpdet_c_ranges[range].min; + } } dev_dbg(arizona->dev, "HP impedance %d ohms\n", val); From 05d3e978b1eec2aa800079d320dd500dc52cbc17 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 7 Nov 2013 15:13:09 +0000 Subject: [PATCH 0085/1167] extcon: arizona: Fix race with microphone detection and removal The microphone detection code is run as delayed work to provide additional debounce, it is possible that the jack could have been removed by the time we process the microphone detection. Turn this case into a no op. Change-Id: If9d29a2c7f23e627fd8639a1cabb329a3a055e79 Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 664d077f69d..8003a20e186 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -808,6 +808,19 @@ static void arizona_micd_detect(struct work_struct *work) mutex_lock(&info->lock); + /* If the cable was removed while measuring ignore the result */ + ret = extcon_get_cable_state_(&info->edev, ARIZONA_CABLE_MECHANICAL); + if (ret < 0) { + dev_err(arizona->dev, "Failed to check cable state: %d\n", + ret); + mutex_unlock(&info->lock); + return; + } else if (!ret) { + dev_dbg(arizona->dev, "Ignoring MICDET for removed cable\n"); + mutex_unlock(&info->lock); + return; + } + if (info->detecting && arizona->pdata.micd_software_compare) { /* Must disable MICD before we read the ADCVAL */ regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, From 0e61c25af3ed2b726bb75624e905b3d8f556ed0a Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Mon, 28 Oct 2013 11:58:06 +0000 Subject: [PATCH 0086/1167] extcon: arizona: Expose headphone impedance through sysfs Change-Id: I6269dd381a327e2e05f781fb4d0d68ce1f00117e Signed-off-by: Nariman Poushin --- drivers/extcon/extcon-arizona.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 8003a20e186..3a567fd6cf8 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -27,6 +27,7 @@ #include #include #include +#include #include @@ -70,6 +71,7 @@ struct arizona_extcon_info { struct input_dev *input; u16 last_jackdet; + u32 hp_impedance; int micd_mode; const struct arizona_micd_config *micd_modes; @@ -141,6 +143,11 @@ static const char *arizona_cable[] = { NULL, }; +static ssize_t arizona_extcon_show(struct device *dev, + struct device_attribute *attr, + char *buf); +DEVICE_ATTR(hp_impedance, S_IRUGO, arizona_extcon_show, NULL); + static void arizona_start_hpdet_acc_id(struct arizona_extcon_info *info); static void arizona_extcon_do_magic(struct arizona_extcon_info *info, @@ -496,6 +503,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) } } + info->hp_impedance = val; dev_dbg(arizona->dev, "HP impedance %d ohms\n", val); return val; } @@ -1105,6 +1113,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) info->mic = false; info->hpdet_done = false; info->hpdet_retried = false; + info->hp_impedance = 0; for (i = 0; i < info->num_micd_ranges; i++) input_report_key(info->input, @@ -1204,6 +1213,16 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) return 0; } +static ssize_t arizona_extcon_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct platform_device *pdev = to_platform_device(dev); + struct arizona_extcon_info *info = platform_get_drvdata(pdev); + + return scnprintf(buf, PAGE_SIZE, "%d\n", info->hp_impedance); +} + static int arizona_extcon_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); @@ -1513,6 +1532,12 @@ static int arizona_extcon_probe(struct platform_device *pdev) goto err_hpdet; } + ret = device_create_file(&pdev->dev, &dev_attr_hp_impedance); + if (ret != 0) + dev_err(&pdev->dev, + "Failed to create sysfs node for hp_impedance %d\n", + ret); + return 0; err_hpdet: @@ -1565,6 +1590,8 @@ static int arizona_extcon_remove(struct platform_device *pdev) regmap_update_bits(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, ARIZONA_JD1_ENA, 0); arizona_clk32k_disable(arizona); + + device_remove_file(&pdev->dev, &dev_attr_hp_impedance); extcon_dev_unregister(&info->edev); return 0; From 787b332adb03fe198efaf3e26acaef8b321b0668 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 7 Nov 2013 14:19:23 +0000 Subject: [PATCH 0087/1167] switch: arizona: Initial switch driver for Arizona class devices Change-Id: Ib3b2c5250899891cb21574261188212e5694d29e Signed-off-by: Charles Keepax --- drivers/switch/Kconfig | 8 + drivers/switch/Makefile | 1 + drivers/switch/switch-arizona.c | 1545 +++++++++++++++++++++++++++++++ 3 files changed, 1554 insertions(+) create mode 100644 drivers/switch/switch-arizona.c diff --git a/drivers/switch/Kconfig b/drivers/switch/Kconfig index 19404b6f777..98026a093b7 100644 --- a/drivers/switch/Kconfig +++ b/drivers/switch/Kconfig @@ -12,4 +12,12 @@ config SWITCH_GPIO help Say Y here to enable GPIO based switch support. +config SWITCH_ARIZONA + tristate "Wolfson Arizona Switch support" + depends on MFD_ARIZONA && INPUT && SND_SOC + help + Say Y here to enable support for external accessory detection + with Wolfson Arizona devices. These are audio CODECs with + advanced audio accessory detection support. + endif # SWITCH diff --git a/drivers/switch/Makefile b/drivers/switch/Makefile index f7606ed4a71..2fd6461ffc9 100644 --- a/drivers/switch/Makefile +++ b/drivers/switch/Makefile @@ -2,3 +2,4 @@ obj-$(CONFIG_SWITCH) += switch_class.o obj-$(CONFIG_SWITCH_GPIO) += switch_gpio.o +obj-$(CONFIG_SWITCH_ARIZONA) += switch-arizona.o diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c new file mode 100644 index 00000000000..ae05523436c --- /dev/null +++ b/drivers/switch/switch-arizona.c @@ -0,0 +1,1545 @@ +/* + * extcon-arizona.c - Extcon driver Wolfson Arizona devices + * + * Copyright (C) 2012 Wolfson Microelectronics plc + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include + +#define ARIZONA_MAX_MICD_RANGE 8 + +#define ARIZONA_ACCDET_MODE_MIC 0 +#define ARIZONA_ACCDET_MODE_HPL 1 +#define ARIZONA_ACCDET_MODE_HPR 2 +#define ARIZONA_ACCDET_MODE_HPM 4 +#define ARIZONA_ACCDET_MODE_ADC 7 + +#define ARIZONA_HPDET_MAX 10000 + +#define HPDET_DEBOUNCE 500 +#define DEFAULT_MICD_TIMEOUT 2000 + +#define QUICK_HEADPHONE_MAX_OHM 3 +#define MICROPHONE_MIN_OHM 1257 +#define MICROPHONE_MAX_OHM 30000 + +enum { + MICD_LVL_1_TO_7 = ARIZONA_MICD_LVL_1 | ARIZONA_MICD_LVL_2 | + ARIZONA_MICD_LVL_3 | ARIZONA_MICD_LVL_4 | + ARIZONA_MICD_LVL_5 | ARIZONA_MICD_LVL_6 | + ARIZONA_MICD_LVL_7, + + MICD_LVL_0_TO_7 = ARIZONA_MICD_LVL_0 | MICD_LVL_1_TO_7, + + MICD_LVL_0_TO_8 = MICD_LVL_0_TO_7 | ARIZONA_MICD_LVL_8, +}; + +struct arizona_extcon_info { + struct device *dev; + struct arizona *arizona; + struct mutex lock; + struct regulator *micvdd; + struct input_dev *input; + + u16 last_jackdet; + + int micd_mode; + const struct arizona_micd_config *micd_modes; + int micd_num_modes; + + const struct arizona_micd_range *micd_ranges; + int num_micd_ranges; + + int micd_timeout; + + bool micd_reva; + bool micd_clamp; + + struct delayed_work hpdet_work; + struct delayed_work micd_detect_work; + struct delayed_work micd_timeout_work; + + bool hpdet_active; + bool hpdet_done; + bool hpdet_retried; + + int num_hpdet_res; + unsigned int hpdet_res[3]; + + bool mic; + bool detecting; + int jack_flips; + bool cable; + + int hpdet_ip; + + struct switch_dev edev; +}; + +static const struct arizona_micd_config micd_default_modes[] = { + { ARIZONA_ACCDET_SRC, 1, 0 }, + { 0, 2, 1 }, +}; + +static const struct arizona_micd_range micd_default_ranges[] = { + { .max = 11, .key = BTN_0 }, + { .max = 28, .key = BTN_1 }, + { .max = 54, .key = BTN_2 }, + { .max = 100, .key = BTN_3 }, + { .max = 186, .key = BTN_4 }, + { .max = 430, .key = BTN_5 }, +}; + +/* The number of levels in arizona_micd_levels valid for button thresholds */ +#define ARIZONA_NUM_MICD_BUTTON_LEVELS 64 + +static const int arizona_micd_levels[] = { + 3, 6, 8, 11, 13, 16, 18, 21, 23, 26, 28, 31, 34, 36, 39, 41, 44, 46, + 49, 52, 54, 57, 60, 62, 65, 67, 70, 73, 75, 78, 81, 83, 89, 94, 100, + 105, 111, 116, 122, 127, 139, 150, 161, 173, 186, 196, 209, 220, 245, + 270, 295, 321, 348, 375, 402, 430, 489, 550, 614, 681, 752, 903, 1071, + 1257, 30000, +}; + +/* These values are copied from Android WiredAccessoryObserver */ +enum headset_state { + BIT_NO_HEADSET = 0, + BIT_HEADSET = (1 << 0), + BIT_HEADSET_NO_MIC = (1 << 1), +}; + +static void arizona_start_hpdet_acc_id(struct arizona_extcon_info *info); + +static void arizona_extcon_do_magic(struct arizona_extcon_info *info, + unsigned int magic) +{ + struct arizona *arizona = info->arizona; + unsigned int mask = 0, val = 0; + int ret; + + switch (arizona->type) { + case WM5110: + mask = 0x0007; + if (magic) + val = 0x0001; + else + val = 0x0006; + break; + default: + mask = 0x4000; + if (magic) + val = 0x4000; + break; + }; + + mutex_lock(&arizona->dapm->card->dapm_mutex); + + arizona->hpdet_magic = magic; + + /* Keep the HP output stages disabled while doing the magic */ + if (magic) { + ret = regmap_update_bits(arizona->regmap, + ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT1L_ENA | + ARIZONA_OUT1R_ENA, 0); + if (ret != 0) + dev_warn(arizona->dev, + "Failed to disable headphone outputs: %d\n", + ret); + } + + ret = regmap_update_bits(arizona->regmap, 0x225, mask, val); + if (ret != 0) + dev_warn(arizona->dev, "Failed to do magic: %d\n", + ret); + + ret = regmap_update_bits(arizona->regmap, 0x226, mask, val); + if (ret != 0) + dev_warn(arizona->dev, "Failed to do magic: %d\n", + ret); + + /* Restore the desired state while not doing the magic */ + if (!magic) { + ret = regmap_update_bits(arizona->regmap, + ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT1L_ENA | + ARIZONA_OUT1R_ENA, arizona->hp_ena); + if (ret != 0) + dev_warn(arizona->dev, + "Failed to restore headphone outputs: %d\n", + ret); + } + + mutex_unlock(&arizona->dapm->card->dapm_mutex); +} + +static void arizona_extcon_set_mode(struct arizona_extcon_info *info, int mode) +{ + struct arizona *arizona = info->arizona; + + mode %= info->micd_num_modes; + + if (arizona->pdata.micd_pol_gpio > 0) + gpio_set_value_cansleep(arizona->pdata.micd_pol_gpio, + info->micd_modes[mode].gpio); + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_BIAS_SRC_MASK, + info->micd_modes[mode].bias << + ARIZONA_MICD_BIAS_SRC_SHIFT); + regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_SRC, info->micd_modes[mode].src); + + info->micd_mode = mode; + + dev_dbg(arizona->dev, "Set jack polarity to %d\n", mode); +} + +static const char *arizona_extcon_get_micbias(struct arizona_extcon_info *info) +{ + switch (info->micd_modes[0].bias) { + case 1: + return "MICBIAS1"; + case 2: + return "MICBIAS2"; + case 3: + return "MICBIAS3"; + default: + return "MICVDD"; + } +} + +static void arizona_extcon_pulse_micbias(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + const char *widget = arizona_extcon_get_micbias(info); + struct snd_soc_dapm_context *dapm = arizona->dapm; + int ret; + + mutex_lock(&dapm->card->dapm_mutex); + + ret = snd_soc_dapm_force_enable_pin(dapm, widget); + if (ret != 0) + dev_warn(arizona->dev, "Failed to enable %s: %d\n", + widget, ret); + + mutex_unlock(&dapm->card->dapm_mutex); + + snd_soc_dapm_sync(dapm); + + if (!arizona->pdata.micd_force_micbias) { + mutex_lock(&dapm->card->dapm_mutex); + + ret = snd_soc_dapm_disable_pin(arizona->dapm, widget); + if (ret != 0) + dev_warn(arizona->dev, "Failed to disable %s: %d\n", + widget, ret); + + mutex_unlock(&dapm->card->dapm_mutex); + + snd_soc_dapm_sync(dapm); + } +} + +static void arizona_start_mic(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + bool change; + int ret; + unsigned int mode; + + /* Microphone detection can't use idle mode */ + pm_runtime_get(info->dev); + + if (info->detecting) { + ret = regulator_allow_bypass(info->micvdd, false); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to regulate MICVDD: %d\n", + ret); + } + } + + ret = regulator_enable(info->micvdd); + if (ret != 0) { + dev_err(arizona->dev, "Failed to enable MICVDD: %d\n", + ret); + } + + if (info->micd_reva) { + regmap_write(arizona->regmap, 0x80, 0x3); + regmap_write(arizona->regmap, 0x294, 0); + regmap_write(arizona->regmap, 0x80, 0x0); + } + + if (info->detecting && arizona->pdata.micd_software_compare) + mode = ARIZONA_ACCDET_MODE_ADC; + else + mode = ARIZONA_ACCDET_MODE_MIC; + + regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_MODE_MASK, mode); + + arizona_extcon_pulse_micbias(info); + + regmap_update_bits_check(arizona->regmap, ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, ARIZONA_MICD_ENA, + &change); + if (!change) { + regulator_disable(info->micvdd); + pm_runtime_put_autosuspend(info->dev); + } +} + +static void arizona_stop_mic(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + const char *widget = arizona_extcon_get_micbias(info); + struct snd_soc_dapm_context *dapm = arizona->dapm; + bool change; + int ret; + + regmap_update_bits_check(arizona->regmap, ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, 0, + &change); + + mutex_lock(&dapm->card->dapm_mutex); + + ret = snd_soc_dapm_disable_pin(dapm, widget); + if (ret != 0) + dev_warn(arizona->dev, + "Failed to disable %s: %d\n", + widget, ret); + + mutex_unlock(&dapm->card->dapm_mutex); + + snd_soc_dapm_sync(dapm); + + if (info->micd_reva) { + regmap_write(arizona->regmap, 0x80, 0x3); + regmap_write(arizona->regmap, 0x294, 2); + regmap_write(arizona->regmap, 0x80, 0x0); + } + + ret = regulator_allow_bypass(info->micvdd, true); + if (ret != 0) { + dev_err(arizona->dev, "Failed to bypass MICVDD: %d\n", + ret); + } + + if (change) { + regulator_disable(info->micvdd); + pm_runtime_mark_last_busy(info->dev); + pm_runtime_put_autosuspend(info->dev); + } +} + +static struct { + unsigned int factor_a; + unsigned int factor_b; +} arizona_hpdet_b_ranges[] = { + { 5528, 362464 }, + { 11084, 6186851 }, + { 11065, 65460395 }, +}; + +static struct { + int min; + int max; +} arizona_hpdet_c_ranges[] = { + { 0, 30 }, + { 8, 100 }, + { 100, 1000 }, + { 1000, 10000 }, +}; + +static int arizona_hpdet_read(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + unsigned int val, range; + int ret; + + ret = regmap_read(arizona->regmap, ARIZONA_HEADPHONE_DETECT_2, &val); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read HPDET status: %d\n", + ret); + return ret; + } + + switch (info->hpdet_ip) { + case 0: + if (!(val & ARIZONA_HP_DONE)) { + dev_err(arizona->dev, "HPDET did not complete: %x\n", + val); + return -EAGAIN; + } + + val &= ARIZONA_HP_LVL_MASK; + break; + + case 1: + if (!(val & ARIZONA_HP_DONE_B)) { + dev_err(arizona->dev, "HPDET did not complete: %x\n", + val); + return -EAGAIN; + } + + ret = regmap_read(arizona->regmap, ARIZONA_HP_DACVAL, &val); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read HP value: %d\n", + ret); + return -EAGAIN; + } + + regmap_read(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, + &range); + range = (range & ARIZONA_HP_IMPEDANCE_RANGE_MASK) + >> ARIZONA_HP_IMPEDANCE_RANGE_SHIFT; + + if (range < ARRAY_SIZE(arizona_hpdet_b_ranges) - 1 && + (val < 100 || val >= 0x3fb)) { + range++; + dev_dbg(arizona->dev, "Moving to HPDET range %d\n", + range); + regmap_update_bits(arizona->regmap, + ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_IMPEDANCE_RANGE_MASK, + range << + ARIZONA_HP_IMPEDANCE_RANGE_SHIFT); + return -EAGAIN; + } + + /* If we go out of range report top of range */ + if (val < 100 || val >= 0x3fb) { + dev_dbg(arizona->dev, "Measurement out of range\n"); + return ARIZONA_HPDET_MAX; + } + + dev_dbg(arizona->dev, "HPDET read %d in range %d\n", + val, range); + + val = arizona_hpdet_b_ranges[range].factor_b + / ((val * 100) - + arizona_hpdet_b_ranges[range].factor_a); + break; + + default: + dev_warn(arizona->dev, "Unknown HPDET IP revision %d\n", + info->hpdet_ip); + case 2: + if (!(val & ARIZONA_HP_DONE_B)) { + dev_err(arizona->dev, "HPDET did not complete: %x\n", + val); + return -EAGAIN; + } + + val &= ARIZONA_HP_LVL_B_MASK; + val /= 2; + + regmap_read(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, + &range); + range = (range & ARIZONA_HP_IMPEDANCE_RANGE_MASK) + >> ARIZONA_HP_IMPEDANCE_RANGE_SHIFT; + + /* Skip up a range, or report? */ + if (range < ARRAY_SIZE(arizona_hpdet_c_ranges) - 1 && + (val >= arizona_hpdet_c_ranges[range].max)) { + range++; + dev_dbg(arizona->dev, "Moving to HPDET range %d-%d\n", + arizona_hpdet_c_ranges[range].min, + arizona_hpdet_c_ranges[range].max); + regmap_update_bits(arizona->regmap, + ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_IMPEDANCE_RANGE_MASK, + range << + ARIZONA_HP_IMPEDANCE_RANGE_SHIFT); + return -EAGAIN; + } + + if (range && (val < arizona_hpdet_c_ranges[range].min)) { + dev_dbg(arizona->dev, "Reporting range boundary %d\n", + arizona_hpdet_c_ranges[range].min); + val = arizona_hpdet_c_ranges[range].min; + } + } + + dev_dbg(arizona->dev, "HP impedance %d ohms\n", val); + return val; +} + +static int arizona_hpdet_do_id(struct arizona_extcon_info *info, int *reading, + bool *mic) +{ + struct arizona *arizona = info->arizona; + int id_gpio = arizona->pdata.hpdet_id_gpio; + + /* + * If we're using HPDET for accessory identification we need + * to take multiple measurements, step through them in sequence. + */ + if (arizona->pdata.hpdet_acc_id) { + info->hpdet_res[info->num_hpdet_res++] = *reading; + + /* Only check the mic directly if we didn't already ID it */ + if (id_gpio && info->num_hpdet_res == 1) { + dev_dbg(arizona->dev, "Measuring mic\n"); + + regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_MODE_MASK | + ARIZONA_ACCDET_SRC, + ARIZONA_ACCDET_MODE_HPR | + info->micd_modes[0].src); + + gpio_set_value_cansleep(id_gpio, 1); + + regmap_update_bits(arizona->regmap, + ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_POLL, ARIZONA_HP_POLL); + return -EAGAIN; + } + + /* OK, got both. Now, compare... */ + dev_dbg(arizona->dev, "HPDET measured %d %d\n", + info->hpdet_res[0], info->hpdet_res[1]); + + /* Take the headphone impedance for the main report */ + *reading = info->hpdet_res[0]; + + /* Sometimes we get false readings due to slow insert */ + if (*reading >= ARIZONA_HPDET_MAX && !info->hpdet_retried) { + dev_dbg(arizona->dev, "Retrying high impedance\n"); + info->num_hpdet_res = 0; + info->hpdet_retried = true; + arizona_start_hpdet_acc_id(info); + pm_runtime_put(info->dev); + return -EAGAIN; + } + + /* + * If we measure the mic as + */ + if (!id_gpio || info->hpdet_res[1] > 50) { + dev_dbg(arizona->dev, "Detected mic\n"); + *mic = true; + info->detecting = true; + } else { + dev_dbg(arizona->dev, "Detected headphone\n"); + } + + /* Make sure everything is reset back to the real polarity */ + regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_SRC, + info->micd_modes[0].src); + } + + return 0; +} + +static irqreturn_t arizona_hpdet_irq(int irq, void *data) +{ + struct arizona_extcon_info *info = data; + struct arizona *arizona = info->arizona; + int id_gpio = arizona->pdata.hpdet_id_gpio; + int ret, reading; + bool mic = false; + + mutex_lock(&info->lock); + + /* If we got a spurious IRQ for some reason then ignore it */ + if (!info->hpdet_active) { + dev_warn(arizona->dev, "Spurious HPDET IRQ\n"); + mutex_unlock(&info->lock); + return IRQ_NONE; + } + + /* If the cable was removed while measuring ignore the result */ + if (!info->cable) { + dev_dbg(arizona->dev, "Ignoring HPDET for removed cable\n"); + goto done; + } + + ret = arizona_hpdet_read(info); + if (ret == -EAGAIN) { + goto out; + } else if (ret < 0) { + goto done; + } + reading = ret; + + /* Reset back to starting range */ + regmap_update_bits(arizona->regmap, + ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_IMPEDANCE_RANGE_MASK | ARIZONA_HP_POLL, + 0); + + ret = arizona_hpdet_do_id(info, &reading, &mic); + if (ret == -EAGAIN) { + goto out; + } else if (ret < 0) { + goto done; + } + + if (mic || info->mic) + switch_set_state(&info->edev, BIT_HEADSET); + else + switch_set_state(&info->edev, BIT_HEADSET_NO_MIC); + +done: + /* Reset back to starting range */ + regmap_update_bits(arizona->regmap, + ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_IMPEDANCE_RANGE_MASK | ARIZONA_HP_POLL, + 0); + + arizona_extcon_do_magic(info, 0); + + if (id_gpio) + gpio_set_value_cansleep(id_gpio, 0); + + /* Revert back to MICDET mode */ + regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_MODE_MASK, ARIZONA_ACCDET_MODE_MIC); + + /* If we have a mic then reenable MICDET */ + if (mic || info->mic) + arizona_start_mic(info); + + if (info->hpdet_active) { + pm_runtime_put_autosuspend(info->dev); + info->hpdet_active = false; + } + + info->hpdet_done = true; + +out: + mutex_unlock(&info->lock); + + return IRQ_HANDLED; +} + +static void arizona_identify_headphone(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + int ret; + + if (info->hpdet_done) + return; + + dev_dbg(arizona->dev, "Starting HPDET\n"); + + /* Make sure we keep the device enabled during the measurement */ + pm_runtime_get(info->dev); + + info->hpdet_active = true; + + if (info->mic) + arizona_stop_mic(info); + + arizona_extcon_do_magic(info, 0x4000); + + ret = regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_MODE_MASK, + ARIZONA_ACCDET_MODE_HPL); + if (ret != 0) { + dev_err(arizona->dev, "Failed to set HPDETL mode: %d\n", ret); + goto err; + } + + ret = regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_POLL, ARIZONA_HP_POLL); + if (ret != 0) { + dev_err(arizona->dev, "Can't start HPDETL measurement: %d\n", + ret); + goto err; + } + + return; + +err: + regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_MODE_MASK, ARIZONA_ACCDET_MODE_MIC); + + /* Just report headphone */ + if (info->mic) { + switch_set_state(&info->edev, BIT_HEADSET); + arizona_start_mic(info); + } else { + switch_set_state(&info->edev, BIT_HEADSET_NO_MIC); + } + + info->hpdet_active = false; +} + +static void arizona_start_hpdet_acc_id(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + int hp_reading = 32; + bool mic; + int ret; + + dev_dbg(arizona->dev, "Starting identification via HPDET\n"); + + /* Make sure we keep the device enabled during the measurement */ + pm_runtime_get_sync(info->dev); + + info->hpdet_active = true; + + arizona_extcon_do_magic(info, 0x4000); + + ret = regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_SRC | ARIZONA_ACCDET_MODE_MASK, + info->micd_modes[0].src | + ARIZONA_ACCDET_MODE_HPL); + if (ret != 0) { + dev_err(arizona->dev, "Failed to set HPDETL mode: %d\n", ret); + goto err; + } + + if (arizona->pdata.hpdet_acc_id_line) { + ret = regmap_update_bits(arizona->regmap, + ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_POLL, ARIZONA_HP_POLL); + if (ret != 0) { + dev_err(arizona->dev, + "Can't start HPDETL measurement: %d\n", + ret); + goto err; + } + } else { + arizona_hpdet_do_id(info, &hp_reading, &mic); + } + + return; + +err: + regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_MODE_MASK, ARIZONA_ACCDET_MODE_MIC); + + /* Just report headphone */ + if (info->mic) + switch_set_state(&info->edev, BIT_HEADSET); + else + switch_set_state(&info->edev, BIT_HEADSET_NO_MIC); + + info->hpdet_active = false; +} + +static void arizona_micd_timeout_work(struct work_struct *work) +{ + struct arizona_extcon_info *info = container_of(work, + struct arizona_extcon_info, + micd_timeout_work.work); + + mutex_lock(&info->lock); + + dev_dbg(info->arizona->dev, "MICD timed out, reporting HP\n"); + arizona_identify_headphone(info); + + info->detecting = false; + + arizona_stop_mic(info); + + mutex_unlock(&info->lock); +} + +static void arizona_micd_detect(struct work_struct *work) +{ + struct arizona_extcon_info *info = container_of(work, + struct arizona_extcon_info, + micd_detect_work.work); + struct arizona *arizona = info->arizona; + unsigned int val = 0, lvl; + int ret, i, key; + + cancel_delayed_work_sync(&info->micd_timeout_work); + + mutex_lock(&info->lock); + + if (!info->cable) { + dev_dbg(arizona->dev, "Ignoring MICDET for removed cable\n"); + mutex_unlock(&info->lock); + return; + } + + if (info->detecting && arizona->pdata.micd_software_compare) { + /* Must disable MICD before we read the ADCVAL */ + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, 0); + ret = regmap_read(arizona->regmap, ARIZONA_MIC_DETECT_4, &val); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to read MICDET_ADCVAL: %d\n", + ret); + mutex_unlock(&info->lock); + return; + } + + dev_dbg(arizona->dev, "MICDET_ADCVAL: %x\n", val); + + val &= ARIZONA_MICDET_ADCVAL_MASK; + if (val < ARRAY_SIZE(arizona_micd_levels)) + val = arizona_micd_levels[val]; + else + val = INT_MAX; + + if (val <= QUICK_HEADPHONE_MAX_OHM) + val = ARIZONA_MICD_STS | ARIZONA_MICD_LVL_0; + else if (val <= MICROPHONE_MIN_OHM) + val = ARIZONA_MICD_STS | ARIZONA_MICD_LVL_1; + else if (val <= MICROPHONE_MAX_OHM) + val = ARIZONA_MICD_STS | ARIZONA_MICD_LVL_8; + else + val = ARIZONA_MICD_LVL_8; + } + + for (i = 0; i < 10 && !(val & MICD_LVL_0_TO_8); i++) { + ret = regmap_read(arizona->regmap, ARIZONA_MIC_DETECT_3, &val); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read MICDET: %d\n", ret); + mutex_unlock(&info->lock); + return; + } + + dev_dbg(arizona->dev, "MICDET: %x\n", val); + + if (!(val & ARIZONA_MICD_VALID)) { + dev_warn(arizona->dev, "Microphone detection state invalid\n"); + mutex_unlock(&info->lock); + return; + } + } + + if (i == 10 && !(val & MICD_LVL_0_TO_8)) { + dev_err(arizona->dev, "Failed to get valid MICDET value\n"); + mutex_unlock(&info->lock); + return; + } + + /* Due to jack detect this should never happen */ + if (!(val & ARIZONA_MICD_STS)) { + dev_warn(arizona->dev, "Detected open circuit\n"); + info->detecting = false; + goto handled; + } + + /* If we got a high impedence we should have a headset, report it. */ + if (info->detecting && (val & ARIZONA_MICD_LVL_8)) { + info->mic = true; + + arizona_identify_headphone(info); + + /* Don't need to regulate for button detection */ + ret = regulator_allow_bypass(info->micvdd, false); + if (ret != 0) { + dev_err(arizona->dev, "Failed to bypass MICVDD: %d\n", + ret); + } + + info->detecting = false; + goto handled; + } + + /* If we detected a lower impedence during initial startup + * then we probably have the wrong polarity, flip it. Don't + * do this for the lowest impedences to speed up detection of + * plain headphones. If both polarities report a low + * impedence then give up and report headphones. + */ + if (info->detecting && (val & MICD_LVL_1_TO_7)) { + if (info->jack_flips >= info->micd_num_modes * 10) { + dev_dbg(arizona->dev, "Detected HP/line\n"); + arizona_identify_headphone(info); + + info->detecting = false; + + arizona_stop_mic(info); + } else { + info->micd_mode++; + if (info->micd_mode == info->micd_num_modes) + info->micd_mode = 0; + arizona_extcon_set_mode(info, info->micd_mode); + + info->jack_flips++; + } + + goto handled; + } + + /* + * If we're still detecting and we detect a short then we've + * got a headphone. Otherwise it's a button press. + */ + if (val & MICD_LVL_0_TO_7) { + if (info->mic) { + dev_dbg(arizona->dev, "Mic button detected\n"); + + lvl = val & ARIZONA_MICD_LVL_MASK; + lvl >>= ARIZONA_MICD_LVL_SHIFT; + + for (i = 0; i < info->num_micd_ranges; i++) + input_report_key(info->input, + info->micd_ranges[i].key, 0); + + WARN_ON(!lvl); + WARN_ON(ffs(lvl) - 1 >= info->num_micd_ranges); + if (lvl && ffs(lvl) - 1 < info->num_micd_ranges) { + key = info->micd_ranges[ffs(lvl) - 1].key; + input_report_key(info->input, key, 1); + input_sync(info->input); + } + + } else if (info->detecting) { + dev_dbg(arizona->dev, "Headphone detected\n"); + info->detecting = false; + arizona_stop_mic(info); + + arizona_identify_headphone(info); + } else { + dev_warn(arizona->dev, "Button with no mic: %x\n", + val); + } + } else { + dev_dbg(arizona->dev, "Mic button released\n"); + for (i = 0; i < info->num_micd_ranges; i++) + input_report_key(info->input, + info->micd_ranges[i].key, 0); + input_sync(info->input); + arizona_extcon_pulse_micbias(info); + } + +handled: + if (info->detecting) { + if (arizona->pdata.micd_software_compare) + regmap_update_bits(arizona->regmap, + ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, + ARIZONA_MICD_ENA); + + schedule_delayed_work(&info->micd_timeout_work, + msecs_to_jiffies(info->micd_timeout)); + } + + pm_runtime_mark_last_busy(info->dev); + mutex_unlock(&info->lock); +} + +static irqreturn_t arizona_micdet(int irq, void *data) +{ + struct arizona_extcon_info *info = data; + struct arizona *arizona = info->arizona; + int debounce = arizona->pdata.micd_detect_debounce; + + cancel_delayed_work_sync(&info->micd_detect_work); + cancel_delayed_work_sync(&info->micd_timeout_work); + + mutex_lock(&info->lock); + if (!info->detecting) + debounce = 0; + mutex_unlock(&info->lock); + + if (debounce) + schedule_delayed_work(&info->micd_detect_work, + msecs_to_jiffies(debounce)); + else + arizona_micd_detect(&info->micd_detect_work.work); + + return IRQ_HANDLED; +} + +static void arizona_hpdet_work(struct work_struct *work) +{ + struct arizona_extcon_info *info = container_of(work, + struct arizona_extcon_info, + hpdet_work.work); + + mutex_lock(&info->lock); + arizona_start_hpdet_acc_id(info); + mutex_unlock(&info->lock); +} + +static irqreturn_t arizona_jackdet(int irq, void *data) +{ + struct arizona_extcon_info *info = data; + struct arizona *arizona = info->arizona; + unsigned int val, present, mask; + bool cancelled_hp, cancelled_mic; + int ret, i; + + cancelled_hp = cancel_delayed_work_sync(&info->hpdet_work); + cancelled_mic = cancel_delayed_work_sync(&info->micd_timeout_work); + + pm_runtime_get_sync(info->dev); + + mutex_lock(&info->lock); + + if (arizona->pdata.jd_gpio5) { + mask = ARIZONA_MICD_CLAMP_STS; + present = 0; + } else { + mask = ARIZONA_JD1_STS; + present = ARIZONA_JD1_STS; + } + + ret = regmap_read(arizona->regmap, ARIZONA_AOD_IRQ_RAW_STATUS, &val); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read jackdet status: %d\n", + ret); + mutex_unlock(&info->lock); + pm_runtime_put_autosuspend(info->dev); + return IRQ_NONE; + } + + val &= mask; + if (val == info->last_jackdet) { + dev_dbg(arizona->dev, "Suppressing duplicate JACKDET\n"); + if (cancelled_hp) + schedule_delayed_work(&info->hpdet_work, + msecs_to_jiffies(HPDET_DEBOUNCE)); + + if (cancelled_mic) + schedule_delayed_work(&info->micd_timeout_work, + msecs_to_jiffies(info->micd_timeout)); + + goto out; + } + info->last_jackdet = val; + + if (info->last_jackdet == present) { + dev_dbg(arizona->dev, "Detected jack\n"); + info->cable = true; + + if (!arizona->pdata.hpdet_acc_id) { + info->detecting = true; + info->mic = false; + info->jack_flips = 0; + + arizona_start_mic(info); + } else { + schedule_delayed_work(&info->hpdet_work, + msecs_to_jiffies(HPDET_DEBOUNCE)); + } + + regmap_update_bits(arizona->regmap, + ARIZONA_JACK_DETECT_DEBOUNCE, + ARIZONA_MICD_CLAMP_DB | ARIZONA_JD1_DB, 0); + } else { + dev_dbg(arizona->dev, "Detected jack removal\n"); + + info->cable = false; + arizona_stop_mic(info); + + info->num_hpdet_res = 0; + for (i = 0; i < ARRAY_SIZE(info->hpdet_res); i++) + info->hpdet_res[i] = 0; + info->mic = false; + info->hpdet_done = false; + info->hpdet_retried = false; + + for (i = 0; i < info->num_micd_ranges; i++) + input_report_key(info->input, + info->micd_ranges[i].key, 0); + input_sync(info->input); + + switch_set_state(&info->edev, BIT_NO_HEADSET); + + regmap_update_bits(arizona->regmap, + ARIZONA_JACK_DETECT_DEBOUNCE, + ARIZONA_MICD_CLAMP_DB | ARIZONA_JD1_DB, + ARIZONA_MICD_CLAMP_DB | ARIZONA_JD1_DB); + } + + if (arizona->pdata.micd_timeout) + info->micd_timeout = arizona->pdata.micd_timeout; + else + info->micd_timeout = DEFAULT_MICD_TIMEOUT; + +out: + /* Clear trig_sts to make sure DCVDD is not forced up */ + regmap_write(arizona->regmap, ARIZONA_AOD_WKUP_AND_TRIG, + ARIZONA_MICD_CLAMP_FALL_TRIG_STS | + ARIZONA_MICD_CLAMP_RISE_TRIG_STS | + ARIZONA_JD1_FALL_TRIG_STS | + ARIZONA_JD1_RISE_TRIG_STS); + + mutex_unlock(&info->lock); + + pm_runtime_mark_last_busy(info->dev); + pm_runtime_put_autosuspend(info->dev); + + return IRQ_HANDLED; +} + +/* Map a level onto a slot in the register bank */ +static void arizona_micd_set_level(struct arizona *arizona, int index, + unsigned int level) +{ + int reg; + unsigned int mask; + + reg = ARIZONA_MIC_DETECT_LEVEL_4 - (index / 2); + + if (!(index % 2)) { + mask = 0x3f00; + level <<= 8; + } else { + mask = 0x3f; + } + + /* Program the level itself */ + regmap_update_bits(arizona->regmap, reg, mask, level); +} + +static int arizona_extcon_get_pdata(struct arizona *arizona) +{ + struct arizona_pdata *pdata = &arizona->pdata; + + arizona_of_read_u32(arizona, "wlf,micd-detect-debounce", false, + &pdata->micd_detect_debounce); + + arizona_of_get_named_gpio(arizona, "wlf,micd-pol-gpio", false, + &pdata->micd_pol_gpio); + + arizona_of_read_u32(arizona, "wlf,micd-bias-start-time", false, + &pdata->micd_bias_start_time); + + arizona_of_read_u32(arizona, "wlf,micd-rate", false, + &pdata->micd_rate); + + arizona_of_read_u32(arizona, "wlf,micd-dbtime", false, + &pdata->micd_dbtime); + + arizona_of_read_u32(arizona, "wlf,micd-timeout", false, + &pdata->micd_timeout); + + pdata->micd_force_micbias = + of_property_read_bool(arizona->dev->of_node, + "wlf,micd-force-micbias"); + + pdata->micd_software_compare = + of_property_read_bool(arizona->dev->of_node, + "wlf,micd-software-compare"); + + pdata->jd_gpio5 = of_property_read_bool(arizona->dev->of_node, + "wlf,use-jd-gpio"); + + pdata->jd_gpio5_nopull = of_property_read_bool(arizona->dev->of_node, + "wlf,jd-gpio-nopull"); + + arizona_of_read_u32(arizona, "wlf,gpsw", false, &pdata->gpsw); + + return 0; +} + +static int arizona_extcon_probe(struct platform_device *pdev) +{ + struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); + struct arizona_pdata *pdata = &arizona->pdata; + struct arizona_extcon_info *info; + unsigned int val; + int jack_irq_fall, jack_irq_rise; + int ret, mode, i, j; + + if (!arizona->dapm || !arizona->dapm->card) + return -EPROBE_DEFER; + + arizona_extcon_get_pdata(arizona); + + info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); + if (!info) { + dev_err(&pdev->dev, "Failed to allocate memory\n"); + ret = -ENOMEM; + goto err; + } + + info->micvdd = devm_regulator_get(arizona->dev, "MICVDD"); + if (IS_ERR(info->micvdd)) { + ret = PTR_ERR(info->micvdd); + dev_err(arizona->dev, "Failed to get MICVDD: %d\n", ret); + goto err; + } + + mutex_init(&info->lock); + info->arizona = arizona; + info->dev = &pdev->dev; + info->last_jackdet = ~(ARIZONA_MICD_CLAMP_STS | ARIZONA_JD1_STS); + INIT_DELAYED_WORK(&info->hpdet_work, arizona_hpdet_work); + INIT_DELAYED_WORK(&info->micd_detect_work, arizona_micd_detect); + INIT_DELAYED_WORK(&info->micd_timeout_work, arizona_micd_timeout_work); + platform_set_drvdata(pdev, info); + + switch (arizona->type) { + case WM5102: + switch (arizona->rev) { + case 0: + info->micd_reva = true; + break; + default: + info->micd_clamp = true; + info->hpdet_ip = 1; + break; + } + break; + case WM5110: + switch (arizona->rev) { + case 0 ... 2: + break; + default: + info->micd_clamp = true; + info->hpdet_ip = 2; + break; + } + break; + default: + break; + } + + info->edev.name = "h2w"; + + ret = switch_dev_register(&info->edev); + if (ret < 0) { + dev_err(arizona->dev, "extcon_dev_register() failed: %d\n", + ret); + goto err; + } + + info->input = devm_input_allocate_device(&pdev->dev); + if (!info->input) { + dev_err(arizona->dev, "Can't allocate input dev\n"); + ret = -ENOMEM; + goto err_register; + } + + info->input->name = "Headset"; + info->input->phys = "arizona/extcon"; + info->input->dev.parent = &pdev->dev; + + if (pdata->num_micd_configs) { + info->micd_modes = pdata->micd_configs; + info->micd_num_modes = pdata->num_micd_configs; + } else { + info->micd_modes = micd_default_modes; + info->micd_num_modes = ARRAY_SIZE(micd_default_modes); + } + + if (arizona->pdata.gpsw > 0) + regmap_update_bits(arizona->regmap, ARIZONA_GP_SWITCH_1, + ARIZONA_SW1_MODE_MASK, arizona->pdata.gpsw); + + if (arizona->pdata.micd_pol_gpio > 0) { + if (info->micd_modes[0].gpio) + mode = GPIOF_OUT_INIT_HIGH; + else + mode = GPIOF_OUT_INIT_LOW; + + ret = devm_gpio_request_one(&pdev->dev, + arizona->pdata.micd_pol_gpio, + mode, + "MICD polarity"); + if (ret != 0) { + dev_err(arizona->dev, "Failed to request GPIO%d: %d\n", + arizona->pdata.micd_pol_gpio, ret); + goto err_register; + } + } + + if (arizona->pdata.hpdet_id_gpio > 0) { + ret = devm_gpio_request_one(&pdev->dev, + arizona->pdata.hpdet_id_gpio, + GPIOF_OUT_INIT_LOW, + "HPDET"); + if (ret != 0) { + dev_err(arizona->dev, "Failed to request GPIO%d: %d\n", + arizona->pdata.hpdet_id_gpio, ret); + goto err_register; + } + } + + if (arizona->pdata.micd_bias_start_time) + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_BIAS_STARTTIME_MASK, + arizona->pdata.micd_bias_start_time + << ARIZONA_MICD_BIAS_STARTTIME_SHIFT); + + if (arizona->pdata.micd_rate) + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_RATE_MASK, + arizona->pdata.micd_rate + << ARIZONA_MICD_RATE_SHIFT); + + if (arizona->pdata.micd_dbtime) + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_DBTIME_MASK, + arizona->pdata.micd_dbtime + << ARIZONA_MICD_DBTIME_SHIFT); + + BUILD_BUG_ON(ARRAY_SIZE(arizona_micd_levels) < + ARIZONA_NUM_MICD_BUTTON_LEVELS); + + if (arizona->pdata.num_micd_ranges) { + info->micd_ranges = pdata->micd_ranges; + info->num_micd_ranges = pdata->num_micd_ranges; + } else { + info->micd_ranges = micd_default_ranges; + info->num_micd_ranges = ARRAY_SIZE(micd_default_ranges); + } + + if (arizona->pdata.num_micd_ranges > ARIZONA_MAX_MICD_RANGE) { + dev_err(arizona->dev, "Too many MICD ranges: %d\n", + arizona->pdata.num_micd_ranges); + } + + if (info->num_micd_ranges > 1) { + for (i = 1; i < info->num_micd_ranges; i++) { + if (info->micd_ranges[i - 1].max > + info->micd_ranges[i].max) { + dev_err(arizona->dev, + "MICD ranges must be sorted\n"); + ret = -EINVAL; + goto err_input; + } + } + } + + /* Disable all buttons by default */ + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_2, + ARIZONA_MICD_LVL_SEL_MASK, 0x81); + + /* Set up all the buttons the user specified */ + for (i = 0; i < info->num_micd_ranges; i++) { + for (j = 0; j < ARIZONA_NUM_MICD_BUTTON_LEVELS; j++) + if (arizona_micd_levels[j] >= info->micd_ranges[i].max) + break; + + if (j == ARIZONA_NUM_MICD_BUTTON_LEVELS) { + dev_err(arizona->dev, "Unsupported MICD level %d\n", + info->micd_ranges[i].max); + ret = -EINVAL; + goto err_input; + } + + dev_dbg(arizona->dev, "%d ohms for MICD threshold %d\n", + arizona_micd_levels[j], i); + + arizona_micd_set_level(arizona, i, j); + input_set_capability(info->input, EV_KEY, + info->micd_ranges[i].key); + + /* Enable reporting of that range */ + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_2, + 1 << i, 1 << i); + } + + /* Set all the remaining keys to a maximum */ + for (; i < ARIZONA_MAX_MICD_RANGE; i++) + arizona_micd_set_level(arizona, i, 0x3f); + + /* + * If we have a clamp use it, activating in conjunction with + * GPIO5 if that is connected for jack detect operation. + */ + if (info->micd_clamp) { + if (arizona->pdata.jd_gpio5) { + /* Put the GPIO into input mode with optional pull */ + val = 0xc101; + if (arizona->pdata.jd_gpio5_nopull) + val &= ~ARIZONA_GPN_PU; + + regmap_write(arizona->regmap, ARIZONA_GPIO5_CTRL, + val); + + regmap_update_bits(arizona->regmap, + ARIZONA_MICD_CLAMP_CONTROL, + ARIZONA_MICD_CLAMP_MODE_MASK, 0x9); + } else { + regmap_update_bits(arizona->regmap, + ARIZONA_MICD_CLAMP_CONTROL, + ARIZONA_MICD_CLAMP_MODE_MASK, 0x4); + } + + regmap_update_bits(arizona->regmap, + ARIZONA_JACK_DETECT_DEBOUNCE, + ARIZONA_MICD_CLAMP_DB, + ARIZONA_MICD_CLAMP_DB); + } + + arizona_extcon_set_mode(info, 0); + + pm_runtime_enable(&pdev->dev); + pm_runtime_idle(&pdev->dev); + pm_runtime_get_sync(&pdev->dev); + + if (arizona->pdata.jd_gpio5) { + jack_irq_rise = ARIZONA_IRQ_MICD_CLAMP_RISE; + jack_irq_fall = ARIZONA_IRQ_MICD_CLAMP_FALL; + } else { + jack_irq_rise = ARIZONA_IRQ_JD_RISE; + jack_irq_fall = ARIZONA_IRQ_JD_FALL; + } + + ret = arizona_request_irq(arizona, jack_irq_rise, + "JACKDET rise", arizona_jackdet, info); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to get JACKDET rise IRQ: %d\n", + ret); + goto err_input; + } + + ret = arizona_set_irq_wake(arizona, jack_irq_rise, 1); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to set JD rise IRQ wake: %d\n", + ret); + goto err_rise; + } + + ret = arizona_request_irq(arizona, jack_irq_fall, + "JACKDET fall", arizona_jackdet, info); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to get JD fall IRQ: %d\n", ret); + goto err_rise_wake; + } + + ret = arizona_set_irq_wake(arizona, jack_irq_fall, 1); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to set JD fall IRQ wake: %d\n", + ret); + goto err_fall; + } + + ret = arizona_request_irq(arizona, ARIZONA_IRQ_MICDET, + "MICDET", arizona_micdet, info); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to get MICDET IRQ: %d\n", ret); + goto err_fall_wake; + } + + ret = arizona_request_irq(arizona, ARIZONA_IRQ_HPDET, + "HPDET", arizona_hpdet_irq, info); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to get HPDET IRQ: %d\n", ret); + goto err_micdet; + } + + arizona_clk32k_enable(arizona); + regmap_update_bits(arizona->regmap, ARIZONA_JACK_DETECT_DEBOUNCE, + ARIZONA_JD1_DB, ARIZONA_JD1_DB); + regmap_update_bits(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, + ARIZONA_JD1_ENA, ARIZONA_JD1_ENA); + + ret = regulator_allow_bypass(info->micvdd, true); + if (ret != 0) + dev_warn(arizona->dev, "Failed to set MICVDD to bypass: %d\n", + ret); + + pm_runtime_put(&pdev->dev); + + ret = input_register_device(info->input); + if (ret) { + dev_err(&pdev->dev, "Can't register input device: %d\n", ret); + goto err_hpdet; + } + + return 0; + +err_hpdet: + arizona_free_irq(arizona, ARIZONA_IRQ_HPDET, info); +err_micdet: + arizona_free_irq(arizona, ARIZONA_IRQ_MICDET, info); +err_fall_wake: + arizona_set_irq_wake(arizona, jack_irq_fall, 0); +err_fall: + arizona_free_irq(arizona, jack_irq_fall, info); +err_rise_wake: + arizona_set_irq_wake(arizona, jack_irq_rise, 0); +err_rise: + arizona_free_irq(arizona, jack_irq_rise, info); +err_input: +err_register: + pm_runtime_disable(&pdev->dev); + switch_dev_unregister(&info->edev); +err: + return ret; +} + +static int arizona_extcon_remove(struct platform_device *pdev) +{ + struct arizona_extcon_info *info = platform_get_drvdata(pdev); + struct arizona *arizona = info->arizona; + int jack_irq_rise, jack_irq_fall; + + pm_runtime_disable(&pdev->dev); + + regmap_update_bits(arizona->regmap, + ARIZONA_MICD_CLAMP_CONTROL, + ARIZONA_MICD_CLAMP_MODE_MASK, 0); + + if (arizona->pdata.jd_gpio5) { + jack_irq_rise = ARIZONA_IRQ_MICD_CLAMP_RISE; + jack_irq_fall = ARIZONA_IRQ_MICD_CLAMP_FALL; + } else { + jack_irq_rise = ARIZONA_IRQ_JD_RISE; + jack_irq_fall = ARIZONA_IRQ_JD_FALL; + } + + arizona_set_irq_wake(arizona, jack_irq_rise, 0); + arizona_set_irq_wake(arizona, jack_irq_fall, 0); + arizona_free_irq(arizona, ARIZONA_IRQ_HPDET, info); + arizona_free_irq(arizona, ARIZONA_IRQ_MICDET, info); + arizona_free_irq(arizona, jack_irq_rise, info); + arizona_free_irq(arizona, jack_irq_fall, info); + cancel_delayed_work_sync(&info->hpdet_work); + regmap_update_bits(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, + ARIZONA_JD1_ENA, 0); + arizona_clk32k_disable(arizona); + switch_dev_unregister(&info->edev); + + return 0; +} + +static struct platform_driver arizona_extcon_driver = { + .driver = { + .name = "arizona-extcon", + .owner = THIS_MODULE, + }, + .probe = arizona_extcon_probe, + .remove = arizona_extcon_remove, +}; + +module_platform_driver(arizona_extcon_driver); + +MODULE_DESCRIPTION("Arizona Extcon driver"); +MODULE_AUTHOR("Mark Brown "); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:extcon-arizona"); From be6ca852838635cc14ff908d5b98e1439cdf1c9d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 7 Nov 2013 15:56:30 +0000 Subject: [PATCH 0088/1167] switch: arizona: Add callback when headphone impedance is measured Allowing further system-specific responses. Change-Id: I20e7d41c52316a763ee62cb6abc99b28c184cf03 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 3 +++ include/linux/mfd/arizona/pdata.h | 3 +++ sound/soc/codecs/arizona.c | 11 +++++++++++ sound/soc/codecs/arizona.h | 3 +++ 4 files changed, 20 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index ae05523436c..b56960996de 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -609,6 +609,9 @@ static irqreturn_t arizona_hpdet_irq(int irq, void *data) goto done; } + if (arizona->pdata.hpdet_cb) + arizona->pdata.hpdet_cb(reading); + if (mic || info->mic) switch_set_state(&info->edev, BIT_HEADSET); else diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index d6b53e58dae..81e26beaff0 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -136,6 +136,9 @@ struct arizona_pdata { /** GPIO used for mic isolation with HPDET */ int hpdet_id_gpio; + /** Callback notifying HPDET result */ + void (*hpdet_cb)(unsigned int measurement); + /** Use software comparison to determine mic presence */ bool micd_software_compare; diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 33ca14e3a19..8d5b5a03251 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1729,6 +1729,17 @@ int arizona_set_output_mode(struct snd_soc_codec *codec, int output, bool diff) } EXPORT_SYMBOL_GPL(arizona_set_output_mode); +int arizona_set_hpdet_cb(struct snd_soc_codec *codec, + void (*hpdet_cb)(unsigned int)) +{ + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + + arizona->pdata.hpdet_cb = hpdet_cb; + + return 0; +} +EXPORT_SYMBOL_GPL(arizona_set_hpdet_cb); + MODULE_DESCRIPTION("ASoC Wolfson Arizona class device support"); MODULE_AUTHOR("Mark Brown "); MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index d906b2f6416..fb9fe2ff282 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -252,4 +252,7 @@ extern int arizona_init_dai(struct arizona_priv *priv, int dai); int arizona_set_output_mode(struct snd_soc_codec *codec, int output, bool diff); +extern int arizona_set_hpdet_cb(struct snd_soc_codec *codec, + void (*hpdet_cb)(unsigned int)); + #endif From 122eda06790b1908beb11d72758b25f58fade2c6 Mon Sep 17 00:00:00 2001 From: Dimitris Papastamos Date: Mon, 29 Jul 2013 13:25:44 +0100 Subject: [PATCH 0089/1167] ASoC: core: Add snd_soc_card_get_kcontrol() This is useful for drivers who want to grab a pointer to snd_kcontrol outside of the kcontrol callbacks. Change-Id: Iea313b7edae6d1f95d6b244673dbc824c6c59918 Signed-off-by: Dimitris Papastamos --- include/sound/soc.h | 2 ++ sound/soc/soc-core.c | 16 ++++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/include/sound/soc.h b/include/sound/soc.h index 85c15226103..744ae2454e0 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -473,6 +473,8 @@ void snd_soc_free_ac97_codec(struct snd_soc_codec *codec); struct snd_kcontrol *snd_soc_cnew(const struct snd_kcontrol_new *_template, void *data, const char *long_name, const char *prefix); +struct snd_kcontrol *snd_soc_card_get_kcontrol(struct snd_soc_card *soc_card, + const char *name); int snd_soc_add_codec_controls(struct snd_soc_codec *codec, const struct snd_kcontrol_new *controls, int num_controls); int snd_soc_add_platform_controls(struct snd_soc_platform *platform, diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index 7aefba73620..99646c2d550 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -2309,6 +2309,22 @@ static int snd_soc_add_controls(struct snd_card *card, struct device *dev, return 0; } +struct snd_kcontrol *snd_soc_card_get_kcontrol(struct snd_soc_card *soc_card, + const char *name) +{ + struct snd_card *card = soc_card->snd_card; + struct snd_kcontrol *kctl; + + if (unlikely(!name)) + return NULL; + + list_for_each_entry(kctl, &card->controls, list) + if (!strncmp(kctl->id.name, name, sizeof(kctl->id.name))) + return kctl; + return NULL; +} +EXPORT_SYMBOL_GPL(snd_soc_card_get_kcontrol); + /** * snd_soc_add_codec_controls - add an array of controls to a codec. * Convenience function to add a list of controls. Many codecs were From 0bfdf34c817138733869bb4f42f14aebca5dcfa1 Mon Sep 17 00:00:00 2001 From: Dimitris Papastamos Date: Mon, 29 Jul 2013 13:27:13 +0100 Subject: [PATCH 0090/1167] ASoC: wm_adsp: Simplify kcontrol handling Get rid off the wm_coeff struct and the wm_coeff_add_kcontrol() function. We are now using the snd_soc_card_kcontrol() function to get the kcontrol pointers. No need to call into ALSA code to register the kcontrols. Change-Id: I3b4c63536b4a2006e6d7325aaa62f15edf51d6c1 Signed-off-by: Dimitris Papastamos --- sound/soc/codecs/wm_adsp.c | 103 +++++++++++-------------------------- sound/soc/codecs/wm_adsp.h | 2 +- 2 files changed, 32 insertions(+), 73 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 230e0c88f94..7b1137e9f63 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -351,15 +351,9 @@ struct wm_coeff_ctl_ops { struct snd_ctl_elem_info *uinfo); }; -struct wm_coeff { - struct device *dev; - struct list_head ctl_list; - struct regmap *regmap; -}; - struct wm_coeff_ctl { const char *name; - struct snd_card *card; + struct snd_soc_card *card; struct wm_adsp_alg_region region; struct wm_coeff_ctl_ops ops; struct wm_adsp *adsp; @@ -504,7 +498,6 @@ static int wm_coeff_info(struct snd_kcontrol *kcontrol, static int wm_coeff_write_control(struct snd_kcontrol *kcontrol, const void *buf, size_t len) { - struct wm_coeff *wm_coeff= snd_kcontrol_chip(kcontrol); struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; struct wm_adsp_alg_region *region = &ctl->region; const struct wm_adsp_region *mem; @@ -527,7 +520,7 @@ static int wm_coeff_write_control(struct snd_kcontrol *kcontrol, if (!scratch) return -ENOMEM; - ret = regmap_raw_write(wm_coeff->regmap, reg, scratch, + ret = regmap_raw_write(adsp->regmap, reg, scratch, ctl->len); if (ret) { adsp_err(adsp, "Failed to write %zu bytes to %x\n", @@ -560,7 +553,6 @@ static int wm_coeff_put(struct snd_kcontrol *kcontrol, static int wm_coeff_read_control(struct snd_kcontrol *kcontrol, void *buf, size_t len) { - struct wm_coeff *wm_coeff= snd_kcontrol_chip(kcontrol); struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; struct wm_adsp_alg_region *region = &ctl->region; const struct wm_adsp_region *mem; @@ -583,7 +575,7 @@ static int wm_coeff_read_control(struct snd_kcontrol *kcontrol, if (!scratch) return -ENOMEM; - ret = regmap_raw_read(wm_coeff->regmap, reg, scratch, ctl->len); + ret = regmap_raw_read(adsp->regmap, reg, scratch, ctl->len); if (ret) { adsp_err(adsp, "Failed to read %zu bytes from %x\n", ctl->len, reg); @@ -607,37 +599,18 @@ static int wm_coeff_get(struct snd_kcontrol *kcontrol, return 0; } -static int wm_coeff_add_kcontrol(struct wm_coeff *wm_coeff, - struct wm_coeff_ctl *ctl, - const struct snd_kcontrol_new *kctl) -{ - int ret; - struct snd_kcontrol *kcontrol; - - kcontrol = snd_ctl_new1(kctl, wm_coeff); - ret = snd_ctl_add(ctl->card, kcontrol); - if (ret < 0) { - dev_err(wm_coeff->dev, "Failed to add %s: %d\n", - kctl->name, ret); - return ret; - } - ctl->kcontrol = kcontrol; - return 0; -} - struct wmfw_ctl_work { - struct wm_coeff *wm_coeff; + struct wm_adsp *adsp; struct wm_coeff_ctl *ctl; struct work_struct work; }; -static int wmfw_add_ctl(struct wm_coeff *wm_coeff, - struct wm_coeff_ctl *ctl) +static int wmfw_add_ctl(struct wm_adsp *adsp, struct wm_coeff_ctl *ctl) { struct snd_kcontrol_new *kcontrol; int ret; - if (!wm_coeff || !ctl || !ctl->name || !ctl->card) + if (!ctl || !ctl->name || !ctl->card) return -EINVAL; kcontrol = kzalloc(sizeof(*kcontrol), GFP_KERNEL); @@ -651,14 +624,17 @@ static int wmfw_add_ctl(struct wm_coeff *wm_coeff, kcontrol->put = wm_coeff_put; kcontrol->private_value = (unsigned long)ctl; - ret = wm_coeff_add_kcontrol(wm_coeff, - ctl, kcontrol); + ret = snd_soc_add_card_controls(ctl->card, + kcontrol, 1); if (ret < 0) goto err_kcontrol; kfree(kcontrol); - list_add(&ctl->list, &wm_coeff->ctl_list); + ctl->kcontrol = snd_soc_card_get_kcontrol(ctl->card, + ctl->name); + + list_add(&ctl->list, &adsp->ctl_list); return 0; err_kcontrol: @@ -879,13 +855,12 @@ static int wm_adsp_load(struct wm_adsp *dsp) return ret; } -static int wm_coeff_init_control_caches(struct wm_coeff *wm_coeff) +static int wm_coeff_init_control_caches(struct wm_adsp *adsp) { struct wm_coeff_ctl *ctl; int ret; - list_for_each_entry(ctl, &wm_coeff->ctl_list, - list) { + list_for_each_entry(ctl, &adsp->ctl_list, list) { if (!ctl->enabled || ctl->set) continue; ret = wm_coeff_read_control(ctl->kcontrol, @@ -898,13 +873,12 @@ static int wm_coeff_init_control_caches(struct wm_coeff *wm_coeff) return 0; } -static int wm_coeff_sync_controls(struct wm_coeff *wm_coeff) +static int wm_coeff_sync_controls(struct wm_adsp *adsp) { struct wm_coeff_ctl *ctl; int ret; - list_for_each_entry(ctl, &wm_coeff->ctl_list, - list) { + list_for_each_entry(ctl, &adsp->ctl_list, list) { if (!ctl->enabled) continue; if (ctl->set) { @@ -925,7 +899,7 @@ static void wm_adsp_ctl_work(struct work_struct *work) struct wmfw_ctl_work, work); - wmfw_add_ctl(ctl_work->wm_coeff, ctl_work->ctl); + wmfw_add_ctl(ctl_work->adsp, ctl_work->ctl); kfree(ctl_work); } @@ -967,7 +941,7 @@ static int wm_adsp_create_control(struct snd_soc_codec *codec, snprintf(name, PAGE_SIZE, "DSP%d %s %x", dsp->num, region_name, region->alg); - list_for_each_entry(ctl, &dsp->wm_coeff->ctl_list, + list_for_each_entry(ctl, &dsp->ctl_list, list) { if (!strcmp(ctl->name, name)) { if (!ctl->enabled) @@ -991,7 +965,7 @@ static int wm_adsp_create_control(struct snd_soc_codec *codec, ctl->set = 0; ctl->ops.xget = wm_coeff_get; ctl->ops.xput = wm_coeff_put; - ctl->card = codec->card->snd_card; + ctl->card = codec->card; ctl->adsp = dsp; ctl->len = region->len; @@ -1007,7 +981,7 @@ static int wm_adsp_create_control(struct snd_soc_codec *codec, goto err_ctl_cache; } - ctl_work->wm_coeff = dsp->wm_coeff; + ctl_work->adsp = dsp; ctl_work->ctl = ctl; INIT_WORK(&ctl_work->work, wm_adsp_ctl_work); schedule_work(&ctl_work->work); @@ -1558,12 +1532,12 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, goto err; /* Initialize caches for enabled and unset controls */ - ret = wm_coeff_init_control_caches(dsp->wm_coeff); + ret = wm_coeff_init_control_caches(dsp); if (ret != 0) goto err; /* Sync set controls */ - ret = wm_coeff_sync_controls(dsp->wm_coeff); + ret = wm_coeff_sync_controls(dsp); if (ret != 0) goto err; @@ -1584,10 +1558,8 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, ADSP1_SYS_ENA, 0); - list_for_each_entry(ctl, &dsp->wm_coeff->ctl_list, - list) { + list_for_each_entry(ctl, &dsp->ctl_list, list) ctl->enabled = 0; - } break; default: @@ -1715,12 +1687,12 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, goto err; /* Initialize caches for enabled and unset controls */ - ret = wm_coeff_init_control_caches(dsp->wm_coeff); + ret = wm_coeff_init_control_caches(dsp); if (ret != 0) goto err; /* Sync set controls */ - ret = wm_coeff_sync_controls(dsp->wm_coeff); + ret = wm_coeff_sync_controls(dsp); if (ret != 0) goto err; @@ -1761,10 +1733,8 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, ret); } - list_for_each_entry(ctl, &dsp->wm_coeff->ctl_list, - list) { + list_for_each_entry(ctl, &dsp->ctl_list, list) ctl->enabled = 0; - } while (!list_empty(&dsp->alg_regions)) { alg_region = list_first_entry(&dsp->alg_regions, @@ -1803,50 +1773,39 @@ int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs) } INIT_LIST_HEAD(&adsp->alg_regions); - - adsp->wm_coeff = kzalloc(sizeof(*adsp->wm_coeff), - GFP_KERNEL); - if (!adsp->wm_coeff) - return -ENOMEM; - adsp->wm_coeff->regmap = adsp->regmap; - adsp->wm_coeff->dev = adsp->dev; - INIT_LIST_HEAD(&adsp->wm_coeff->ctl_list); + INIT_LIST_HEAD(&adsp->ctl_list); if (dvfs) { adsp->dvfs = devm_regulator_get(adsp->dev, "DCVDD"); if (IS_ERR(adsp->dvfs)) { ret = PTR_ERR(adsp->dvfs); dev_err(adsp->dev, "Failed to get DCVDD: %d\n", ret); - goto out_coeff; + return ret; } ret = regulator_enable(adsp->dvfs); if (ret != 0) { dev_err(adsp->dev, "Failed to enable DCVDD: %d\n", ret); - goto out_coeff; + return ret; } ret = regulator_set_voltage(adsp->dvfs, 1200000, 1800000); if (ret != 0) { dev_err(adsp->dev, "Failed to initialise DVFS: %d\n", ret); - goto out_coeff; + return ret; } ret = regulator_disable(adsp->dvfs); if (ret != 0) { dev_err(adsp->dev, "Failed to disable DCVDD: %d\n", ret); - goto out_coeff; + return ret; } } return 0; - -out_coeff: - kfree(adsp->wm_coeff); - return ret; } EXPORT_SYMBOL_GPL(wm_adsp2_init); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index d45630af434..0c4aa54bf10 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -66,7 +66,7 @@ struct wm_adsp { struct regulator *dvfs; - struct wm_coeff *wm_coeff; + struct list_head ctl_list; u32 host_buf_ptr; u32 low_water_mark; From 93cca3b79a739069841cddb66788e7d8d6187d23 Mon Sep 17 00:00:00 2001 From: Dimitris Papastamos Date: Thu, 1 Aug 2013 11:03:22 +0100 Subject: [PATCH 0091/1167] ASoC: wm_adsp: Sanitize parameter passing No need to hold on to the `codec' pointer. We can use the `dsp' pointer and grab all the information we need from there. This makes the parameters for the functions a bit more sane and idiomatic. Change-Id: Ieaefe13bac30b890fa12dc58ab453298e9f04095 Signed-off-by: Dimitris Papastamos --- sound/soc/codecs/wm_adsp.c | 31 ++++++++++++++++--------------- sound/soc/codecs/wm_adsp.h | 1 + 2 files changed, 17 insertions(+), 15 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 7b1137e9f63..fc79f909e0a 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -353,7 +353,6 @@ struct wm_coeff_ctl_ops { struct wm_coeff_ctl { const char *name; - struct snd_soc_card *card; struct wm_adsp_alg_region region; struct wm_coeff_ctl_ops ops; struct wm_adsp *adsp; @@ -610,7 +609,7 @@ static int wmfw_add_ctl(struct wm_adsp *adsp, struct wm_coeff_ctl *ctl) struct snd_kcontrol_new *kcontrol; int ret; - if (!ctl || !ctl->name || !ctl->card) + if (!ctl || !ctl->name) return -EINVAL; kcontrol = kzalloc(sizeof(*kcontrol), GFP_KERNEL); @@ -624,14 +623,14 @@ static int wmfw_add_ctl(struct wm_adsp *adsp, struct wm_coeff_ctl *ctl) kcontrol->put = wm_coeff_put; kcontrol->private_value = (unsigned long)ctl; - ret = snd_soc_add_card_controls(ctl->card, + ret = snd_soc_add_card_controls(adsp->card, kcontrol, 1); if (ret < 0) goto err_kcontrol; kfree(kcontrol); - ctl->kcontrol = snd_soc_card_get_kcontrol(ctl->card, + ctl->kcontrol = snd_soc_card_get_kcontrol(adsp->card, ctl->name); list_add(&ctl->list, &adsp->ctl_list); @@ -903,11 +902,10 @@ static void wm_adsp_ctl_work(struct work_struct *work) kfree(ctl_work); } -static int wm_adsp_create_control(struct snd_soc_codec *codec, +static int wm_adsp_create_control(struct wm_adsp *dsp, const struct wm_adsp_alg_region *region) { - struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec); struct wm_coeff_ctl *ctl; struct wmfw_ctl_work *ctl_work; char *name; @@ -965,7 +963,6 @@ static int wm_adsp_create_control(struct snd_soc_codec *codec, ctl->set = 0; ctl->ops.xget = wm_coeff_get; ctl->ops.xput = wm_coeff_put; - ctl->card = codec->card; ctl->adsp = dsp; ctl->len = region->len; @@ -1001,7 +998,7 @@ static int wm_adsp_create_control(struct snd_soc_codec *codec, return ret; } -static int wm_adsp_setup_algs(struct wm_adsp *dsp, struct snd_soc_codec *codec) +static int wm_adsp_setup_algs(struct wm_adsp *dsp) { struct regmap *regmap = dsp->regmap; struct wmfw_adsp1_id_hdr adsp1_id; @@ -1189,7 +1186,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp, struct snd_soc_codec *codec) if (i + 1 < algs) { region->len = be32_to_cpu(adsp1_alg[i + 1].dm); region->len -= be32_to_cpu(adsp1_alg[i].dm); - wm_adsp_create_control(codec, region); + wm_adsp_create_control(dsp, region); } else { adsp_warn(dsp, "Missing length info for region DM with ID %x\n", be32_to_cpu(adsp1_alg[i].alg.id)); @@ -1206,7 +1203,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp, struct snd_soc_codec *codec) if (i + 1 < algs) { region->len = be32_to_cpu(adsp1_alg[i + 1].zm); region->len -= be32_to_cpu(adsp1_alg[i].zm); - wm_adsp_create_control(codec, region); + wm_adsp_create_control(dsp, region); } else { adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", be32_to_cpu(adsp1_alg[i].alg.id)); @@ -1235,7 +1232,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp, struct snd_soc_codec *codec) if (i + 1 < algs) { region->len = be32_to_cpu(adsp2_alg[i + 1].xm); region->len -= be32_to_cpu(adsp2_alg[i].xm); - wm_adsp_create_control(codec, region); + wm_adsp_create_control(dsp, region); } else { adsp_warn(dsp, "Missing length info for region XM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); @@ -1252,7 +1249,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp, struct snd_soc_codec *codec) if (i + 1 < algs) { region->len = be32_to_cpu(adsp2_alg[i + 1].ym); region->len -= be32_to_cpu(adsp2_alg[i].ym); - wm_adsp_create_control(codec, region); + wm_adsp_create_control(dsp, region); } else { adsp_warn(dsp, "Missing length info for region YM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); @@ -1269,7 +1266,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp, struct snd_soc_codec *codec) if (i + 1 < algs) { region->len = be32_to_cpu(adsp2_alg[i + 1].zm); region->len -= be32_to_cpu(adsp2_alg[i].zm); - wm_adsp_create_control(codec, region); + wm_adsp_create_control(dsp, region); } else { adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); @@ -1489,6 +1486,8 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, int ret; int val; + dsp->card = codec->card; + switch (event) { case SND_SOC_DAPM_POST_PMU: regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, @@ -1523,7 +1522,7 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, if (ret != 0) goto err; - ret = wm_adsp_setup_algs(dsp, codec); + ret = wm_adsp_setup_algs(dsp); if (ret != 0) goto err; @@ -1616,6 +1615,8 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, unsigned int val; int ret; + dsp->card = codec->card; + switch (event) { case SND_SOC_DAPM_POST_PMU: /* @@ -1678,7 +1679,7 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, if (ret != 0) goto err; - ret = wm_adsp_setup_algs(dsp, codec); + ret = wm_adsp_setup_algs(dsp); if (ret != 0) goto err; diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 0c4aa54bf10..fcd26017f42 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -48,6 +48,7 @@ struct wm_adsp { int type; struct device *dev; struct regmap *regmap; + struct snd_soc_card *card; int base; int sysclk_reg; From cb00c706ee3107c39a2b81604623365fea334ee7 Mon Sep 17 00:00:00 2001 From: Dimitris Papastamos Date: Wed, 30 Oct 2013 16:51:05 +0000 Subject: [PATCH 0092/1167] ASoC: wm_adsp: Print error when regmap reads/writes fail Change-Id: I782f7684d9ef38adcbee6c6ed6809534dc7ff9b9 Signed-off-by: Dimitris Papastamos --- sound/soc/codecs/wm_adsp.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index fc79f909e0a..151412db59c 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -522,8 +522,8 @@ static int wm_coeff_write_control(struct snd_kcontrol *kcontrol, ret = regmap_raw_write(adsp->regmap, reg, scratch, ctl->len); if (ret) { - adsp_err(adsp, "Failed to write %zu bytes to %x\n", - ctl->len, reg); + adsp_err(adsp, "Failed to write %zu bytes to %x: %d\n", + ctl->len, reg, ret); kfree(scratch); return ret; } @@ -576,8 +576,8 @@ static int wm_coeff_read_control(struct snd_kcontrol *kcontrol, ret = regmap_raw_read(adsp->regmap, reg, scratch, ctl->len); if (ret) { - adsp_err(adsp, "Failed to read %zu bytes from %x\n", - ctl->len, reg); + adsp_err(adsp, "Failed to read %zu bytes from %x: %d\n", + ctl->len, reg, ret); kfree(scratch); return ret; } @@ -1437,8 +1437,8 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) le32_to_cpu(blk->len)); if (ret != 0) { adsp_err(dsp, - "%s.%d: Failed to write to %x in %s\n", - file, blocks, reg, region_name); + "%s.%d: Failed to write to %x in %s: %d\n", + file, blocks, reg, region_name, ret); } } From 23adab61876fbe28358c717f4aca8392011bcddb Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Thu, 31 Oct 2013 11:52:06 +0000 Subject: [PATCH 0093/1167] ASoC: wm_adsp: Interpret ADSP memory region lengths as 32 bit words Pad the ADSP word (3 bytes) to 4 bytes in the kernel and calculate lengths based on padded ADSP words instead of treating them as bytes Change-Id: I6ae55ad50abb836fbffc16126ed2383beb95eb16 Signed-off-by: Nariman Poushin --- sound/soc/codecs/wm_adsp.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 151412db59c..f1189e1917e 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1186,6 +1186,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) if (i + 1 < algs) { region->len = be32_to_cpu(adsp1_alg[i + 1].dm); region->len -= be32_to_cpu(adsp1_alg[i].dm); + region->len *= 4; wm_adsp_create_control(dsp, region); } else { adsp_warn(dsp, "Missing length info for region DM with ID %x\n", @@ -1203,6 +1204,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) if (i + 1 < algs) { region->len = be32_to_cpu(adsp1_alg[i + 1].zm); region->len -= be32_to_cpu(adsp1_alg[i].zm); + region->len *= 4; wm_adsp_create_control(dsp, region); } else { adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", @@ -1232,6 +1234,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) if (i + 1 < algs) { region->len = be32_to_cpu(adsp2_alg[i + 1].xm); region->len -= be32_to_cpu(adsp2_alg[i].xm); + region->len *= 4; wm_adsp_create_control(dsp, region); } else { adsp_warn(dsp, "Missing length info for region XM with ID %x\n", @@ -1249,6 +1252,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) if (i + 1 < algs) { region->len = be32_to_cpu(adsp2_alg[i + 1].ym); region->len -= be32_to_cpu(adsp2_alg[i].ym); + region->len *= 4; wm_adsp_create_control(dsp, region); } else { adsp_warn(dsp, "Missing length info for region YM with ID %x\n", @@ -1266,6 +1270,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) if (i + 1 < algs) { region->len = be32_to_cpu(adsp2_alg[i + 1].zm); region->len -= be32_to_cpu(adsp2_alg[i].zm); + region->len *= 4; wm_adsp_create_control(dsp, region); } else { adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", From fa98160ac86c5e90de46a34bb5e3e1151f7b3f6b Mon Sep 17 00:00:00 2001 From: Dimitris Papastamos Date: Tue, 29 Oct 2013 13:43:07 +0000 Subject: [PATCH 0094/1167] ASoC: wm_adsp: Add support for grouped ALSA binary controls Currently the ALSA ABI imposes a hard limit of 512 bytes per binary control. To support coefficient data blocks of larger sizes we carve up this space into multiple alsa controls. All of these controls are identified by a common prefix and suffix of the form ":". Control groupings can also consist of a single block in which case the suffix ":0" is used. Change-Id: Ib8560bbd98425b1732b2ccf372a53102bdeb7d7f Signed-off-by: Dimitris Papastamos --- sound/soc/codecs/wm_adsp.c | 59 ++++++++++++++++++++++++++++++++------ sound/soc/codecs/wm_adsp.h | 1 + 2 files changed, 52 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index f1189e1917e..05ed2e09fc3 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -904,7 +904,6 @@ static void wm_adsp_ctl_work(struct work_struct *work) static int wm_adsp_create_control(struct wm_adsp *dsp, const struct wm_adsp_alg_region *region) - { struct wm_coeff_ctl *ctl; struct wmfw_ctl_work *ctl_work; @@ -936,8 +935,8 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, return -EINVAL; } - snprintf(name, PAGE_SIZE, "DSP%d %s %x", - dsp->num, region_name, region->alg); + snprintf(name, PAGE_SIZE, "DSP%d %s %x:%d", + dsp->num, region_name, region->alg, region->block); list_for_each_entry(ctl, &dsp->ctl_list, list) { @@ -998,6 +997,50 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, return ret; } +static int wm_adsp_create_grouped_control(struct wm_adsp *dsp, + struct wm_adsp_alg_region *region) +{ + size_t len = region->len, offset = 0; + struct wm_adsp_alg_region *r; + int ret; + + region->block = 0; + /* This is the quick case for control groups of a single block */ + if (region->len <= 512) + return wm_adsp_create_control(dsp, region); + + /* The passed `region' is already in the list + * of algorithm regions so just create the control for it and don't + * add it to the list */ + region->len = 512; + ret = wm_adsp_create_control(dsp, region); + if (ret < 0) + return ret; + offset += 512; + + /* Carve up the entire region into 512-byte chunks */ + do { + r = kzalloc(sizeof(*r), GFP_KERNEL); + if (!r) + return -ENOMEM; + r->block = offset / 512; + r->type = region->type; + r->alg = region->alg; + r->base = region->base + offset / 4; + if (len - offset > 512) + r->len = 512; + else + r->len = len - offset; + offset += r->len; + list_add_tail(&r->list, &dsp->alg_regions); + ret = wm_adsp_create_control(dsp, r); + if (ret < 0) + return ret; + } while (offset < len); + + return 0; +} + static int wm_adsp_setup_algs(struct wm_adsp *dsp) { struct regmap *regmap = dsp->regmap; @@ -1187,7 +1230,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len = be32_to_cpu(adsp1_alg[i + 1].dm); region->len -= be32_to_cpu(adsp1_alg[i].dm); region->len *= 4; - wm_adsp_create_control(dsp, region); + wm_adsp_create_grouped_control(dsp, region); } else { adsp_warn(dsp, "Missing length info for region DM with ID %x\n", be32_to_cpu(adsp1_alg[i].alg.id)); @@ -1205,7 +1248,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len = be32_to_cpu(adsp1_alg[i + 1].zm); region->len -= be32_to_cpu(adsp1_alg[i].zm); region->len *= 4; - wm_adsp_create_control(dsp, region); + wm_adsp_create_grouped_control(dsp, region); } else { adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", be32_to_cpu(adsp1_alg[i].alg.id)); @@ -1235,7 +1278,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len = be32_to_cpu(adsp2_alg[i + 1].xm); region->len -= be32_to_cpu(adsp2_alg[i].xm); region->len *= 4; - wm_adsp_create_control(dsp, region); + wm_adsp_create_grouped_control(dsp, region); } else { adsp_warn(dsp, "Missing length info for region XM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); @@ -1253,7 +1296,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len = be32_to_cpu(adsp2_alg[i + 1].ym); region->len -= be32_to_cpu(adsp2_alg[i].ym); region->len *= 4; - wm_adsp_create_control(dsp, region); + wm_adsp_create_grouped_control(dsp, region); } else { adsp_warn(dsp, "Missing length info for region YM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); @@ -1271,7 +1314,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len = be32_to_cpu(adsp2_alg[i + 1].zm); region->len -= be32_to_cpu(adsp2_alg[i].zm); region->len *= 4; - wm_adsp_create_control(dsp, region); + wm_adsp_create_grouped_control(dsp, region); } else { adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index fcd26017f42..c482bb70727 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -29,6 +29,7 @@ struct wm_adsp_region { struct wm_adsp_alg_region { struct list_head list; + unsigned int block; unsigned int alg; int type; unsigned int base; From 8d52999472a58391fdb87c4e6550ab4d1b8943a9 Mon Sep 17 00:00:00 2001 From: Dimitris Papastamos Date: Fri, 1 Nov 2013 14:04:36 +0000 Subject: [PATCH 0095/1167] ASoC: wm_adsp: Add debug info on get()/put() transfers Change-Id: I04a6a6715667cd5ba5e47014961f6a12f685d705 Signed-off-by: Dimitris Papastamos --- sound/soc/codecs/wm_adsp.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 05ed2e09fc3..76be973cec8 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -527,6 +527,7 @@ static int wm_coeff_write_control(struct snd_kcontrol *kcontrol, kfree(scratch); return ret; } + adsp_dbg(adsp, "Wrote %zu bytes to %x\n", ctl->len, reg); kfree(scratch); @@ -581,6 +582,7 @@ static int wm_coeff_read_control(struct snd_kcontrol *kcontrol, kfree(scratch); return ret; } + adsp_dbg(adsp, "Read %zu bytes from %x\n", ctl->len, reg); memcpy(buf, scratch, ctl->len); kfree(scratch); From 514a80040d6e3080e5253ae15d15853c2a189fb6 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 22 Aug 2013 08:52:17 +0100 Subject: [PATCH 0096/1167] ASoC: wm5110: Unmask DRC2 IRQ for Ez2Control Unmask the DRC2 signal detect IRQ on the IRQ2 domain which will allow the DSP to receive the signal detection status. Change-Id: Ia41db0ba38d6dd7e907de9650042d68a52c00bc6 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5110.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index ff747aa85c9..a59e2664a89 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -1608,6 +1608,16 @@ static int wm5110_open(struct snd_compr_stream *stream) goto out; } + ret = regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, + ARIZONA_IM_DRC2_SIG_DET_EINT2, + ARIZONA_IM_DRC2_SIG_DET_EINT2); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to unmask DRC2 IRQ for DSP: %d\n", + ret); + goto out; + } + wm5110->compr_info.stream = stream; out: mutex_unlock(&wm5110->compr_info.lock); @@ -1625,6 +1635,9 @@ static int wm5110_free(struct snd_compr_stream *stream) irq_set_irq_wake(arizona->irq, 0); arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, wm5110); + regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, + ARIZONA_IM_DRC2_SIG_DET_EINT2, + 0); wm5110->compr_info.stream = NULL; wm5110->compr_info.total_copied = 0; From 6752ebf411e9db5e894f09d1d40851b3ac3dcb02 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 30 Aug 2013 16:15:54 +0100 Subject: [PATCH 0097/1167] ASoC: wm_adsp: Allow DSP time to set host_buf_ptr It seems host_buf_ptr is set dynamically on the DSP and if we trigger the compressed stream too soon, we might read zero. Poll this value a few times to give the DSP time to set it up. Change-Id: Ia36abaf4ed001c43818391f6361b963b1b454b44 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 24 +++++++++++++++++------- 1 file changed, 17 insertions(+), 7 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 76be973cec8..1e8d6079170 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2270,7 +2270,7 @@ EXPORT_SYMBOL_GPL(wm_adsp_stream_free); int wm_adsp_stream_start(struct wm_adsp *adsp) { u32 xm_base, magic; - int ret; + int i, ret; ret = wm_adsp_read_data_word(adsp, WMFW_ADSP2_XM, ADSP2_SYSTEM_CONFIG_XM_PTR, &xm_base); @@ -2287,12 +2287,22 @@ int wm_adsp_stream_start(struct wm_adsp *adsp) if (magic != WM_ADSP_ALG_XM_STRUCT_MAGIC) return -EINVAL; - ret = wm_adsp_read_data_word(adsp, WMFW_ADSP2_XM, - xm_base + WM_ADSP_ALG_XM_PTR + - ALG_XM_FIELD(host_buf_ptr), - &adsp->host_buf_ptr); - if (ret < 0) - return ret; + for (i = 0; i < 5; ++i) { + ret = wm_adsp_read_data_word(adsp, WMFW_ADSP2_XM, + xm_base + WM_ADSP_ALG_XM_PTR + + ALG_XM_FIELD(host_buf_ptr), + &adsp->host_buf_ptr); + if (ret < 0) + return ret; + + if (adsp->host_buf_ptr) + break; + + msleep(1); + } + + if (!adsp->host_buf_ptr) + return -EIO; ret = wm_adsp_host_buffer_read(adsp, HOST_BUFFER_FIELD(low_water_mark), From 6edff2623685d283d87821744263044a7a39d6ea Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 10 Sep 2013 12:42:04 +0100 Subject: [PATCH 0098/1167] ASoC: wm5110: Add virtual mux to use shared memory as core input Certain use-cases will require a DSP core to take an input stream from the shared memory. We need to be able to inform DAPM of this so the second core is correctly powered up, this patch adds a mux that allows linking of cores 2 and 3 using the virtual memory. Change-Id: I0bc3f9691f02cfe06f451e94a482d30ffbf65589 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5110.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index a59e2664a89..b1e8e878dac 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -540,6 +540,20 @@ ARIZONA_MUX_ENUMS(ISRC3DEC2, ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE); ARIZONA_MUX_ENUMS(ISRC3DEC3, ARIZONA_ISRC3DEC3MIX_INPUT_1_SOURCE); ARIZONA_MUX_ENUMS(ISRC3DEC4, ARIZONA_ISRC3DEC4MIX_INPUT_1_SOURCE); +static const char * const wm5110_memory_mux_texts[] = { + "None", + "Shared Memory", +}; + +static const struct soc_enum wm5110_memory_enum = + SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm5110_memory_mux_texts), + wm5110_memory_mux_texts); + +static const struct snd_kcontrol_new wm5110_memory_mux[] = { + SOC_DAPM_ENUM_VIRT("DSP2 Virtual Input", wm5110_memory_enum), + SOC_DAPM_ENUM_VIRT("DSP3 Virtual Input", wm5110_memory_enum), +}; + static const char *wm5110_aec_loopback_texts[] = { "HPOUT1L", "HPOUT1R", "HPOUT2L", "HPOUT2R", "HPOUT3L", "HPOUT3R", "SPKOUTL", "SPKOUTR", "SPKDAT1L", "SPKDAT1R", "SPKDAT2L", "SPKDAT2R", @@ -946,6 +960,11 @@ ARIZONA_DSP_WIDGETS(DSP2, "DSP2"), ARIZONA_DSP_WIDGETS(DSP3, "DSP3"), ARIZONA_DSP_WIDGETS(DSP4, "DSP4"), +SND_SOC_DAPM_VIRT_MUX("DSP2 Virtual Input", SND_SOC_NOPM, 0, 0, + &wm5110_memory_mux[0]), +SND_SOC_DAPM_VIRT_MUX("DSP3 Virtual Input", SND_SOC_NOPM, 0, 0, + &wm5110_memory_mux[1]), + ARIZONA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), ARIZONA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"), ARIZONA_MUX_WIDGETS(ISRC1DEC3, "ISRC1DEC3"), @@ -1296,6 +1315,11 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { ARIZONA_DSP_ROUTES("DSP3"), ARIZONA_DSP_ROUTES("DSP4"), + { "DSP2", NULL, "DSP2 Virtual Input" }, + { "DSP2 Virtual Input", "Shared Memory", "DSP3" }, + { "DSP3", NULL, "DSP3 Virtual Input" }, + { "DSP3 Virtual Input", "Shared Memory", "DSP2" }, + ARIZONA_MUX_ROUTES("ISRC1INT1", "ISRC1INT1"), ARIZONA_MUX_ROUTES("ISRC1INT2", "ISRC1INT2"), ARIZONA_MUX_ROUTES("ISRC1INT3", "ISRC1INT3"), From 1bf0342233add6d2402a9e8cf0d433a9d3658453 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 30 Oct 2013 15:54:01 +0000 Subject: [PATCH 0099/1167] ASoC: arizona: Add trigger callback for Ez2Control All users to receive notification of the trigger being recieved in their machine drivers. Change-Id: I894cb25f6420e93a7819d55e813d2ec539de2c53 Signed-off-by: Charles Keepax --- include/linux/mfd/arizona/pdata.h | 3 +++ sound/soc/codecs/arizona.c | 11 +++++++++++ sound/soc/codecs/arizona.h | 2 ++ sound/soc/codecs/wm5110.c | 4 ++++ 4 files changed, 20 insertions(+) diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 81e26beaff0..5ecb07e3469 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -197,6 +197,9 @@ struct arizona_pdata { /** General purpose switch control */ int gpsw; + + /** Callback which is called when the trigger phrase is detected */ + void (*ez2ctrl_trigger)(void); }; #endif diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 8d5b5a03251..ad1a0f277af 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1740,6 +1740,17 @@ int arizona_set_hpdet_cb(struct snd_soc_codec *codec, } EXPORT_SYMBOL_GPL(arizona_set_hpdet_cb); +int arizona_set_ez2ctrl_cb(struct snd_soc_codec *codec, + void (*ez2ctrl_trigger)(void)) +{ + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + + arizona->pdata.ez2ctrl_trigger = ez2ctrl_trigger; + + return 0; +} +EXPORT_SYMBOL_GPL(arizona_set_ez2ctrl_cb); + MODULE_DESCRIPTION("ASoC Wolfson Arizona class device support"); MODULE_AUTHOR("Mark Brown "); MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index fb9fe2ff282..fc72e746e00 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -254,5 +254,7 @@ int arizona_set_output_mode(struct snd_soc_codec *codec, int output, extern int arizona_set_hpdet_cb(struct snd_soc_codec *codec, void (*hpdet_cb)(unsigned int)); +extern int arizona_set_ez2ctrl_cb(struct snd_soc_codec *codec, + void (*ez2ctrl_trigger)(void)); #endif diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index b1e8e878dac..6159ae0959f 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -1568,6 +1568,10 @@ static irqreturn_t adsp2_irq(int irq, void *data) mutex_lock(&wm5110->compr_info.lock); + if (wm5110->core.arizona->pdata.ez2ctrl_trigger && + !wm5110->compr_info.total_copied) + wm5110->core.arizona->pdata.ez2ctrl_trigger(); + ret = wm_adsp_stream_capture(wm5110->compr_info.adsp); if (ret < 0) { dev_err(wm5110->core.arizona->dev, From de058414b10b49baa2eb064662c82b3e4ec857e9 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 31 Oct 2013 09:39:41 +0000 Subject: [PATCH 0100/1167] ASoC: wm5110: Add virtual output mixer Change-Id: I40ce8cd71eabd3a9d9e0d4f3e7f08e6b5274d20f Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5110.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 6159ae0959f..389a1ec407b 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -540,6 +540,19 @@ ARIZONA_MUX_ENUMS(ISRC3DEC2, ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE); ARIZONA_MUX_ENUMS(ISRC3DEC3, ARIZONA_ISRC3DEC3MIX_INPUT_1_SOURCE); ARIZONA_MUX_ENUMS(ISRC3DEC4, ARIZONA_ISRC3DEC4MIX_INPUT_1_SOURCE); +static const char * const wm5110_dsp_output_texts[] = { + "None", + "DSP3", +}; + +static const struct soc_enum wm5110_dsp_output_enum = + SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm5110_dsp_output_texts), + wm5110_dsp_output_texts); + +static const struct snd_kcontrol_new wm5110_dsp_output_mux[] = { + SOC_DAPM_ENUM_VIRT("DSP Virtual Output Mux", wm5110_dsp_output_enum), +}; + static const char * const wm5110_memory_mux_texts[] = { "None", "Shared Memory", @@ -606,6 +619,8 @@ SND_SOC_DAPM_INPUT("IN4R"), SND_SOC_DAPM_OUTPUT("DRC1 Signal Activity"), SND_SOC_DAPM_OUTPUT("DRC2 Signal Activity"), +SND_SOC_DAPM_OUTPUT("DSP Virtual Output"), + SND_SOC_DAPM_PGA_E("IN1L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN1L_ENA_SHIFT, 0, NULL, 0, arizona_in_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | @@ -965,6 +980,9 @@ SND_SOC_DAPM_VIRT_MUX("DSP2 Virtual Input", SND_SOC_NOPM, 0, 0, SND_SOC_DAPM_VIRT_MUX("DSP3 Virtual Input", SND_SOC_NOPM, 0, 0, &wm5110_memory_mux[1]), +SND_SOC_DAPM_VIRT_MUX("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, + &wm5110_dsp_output_mux[0]), + ARIZONA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), ARIZONA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"), ARIZONA_MUX_WIDGETS(ISRC1DEC3, "ISRC1DEC3"), @@ -1320,6 +1338,10 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { { "DSP3", NULL, "DSP3 Virtual Input" }, { "DSP3 Virtual Input", "Shared Memory", "DSP2" }, + { "DSP Virtual Output", NULL, "DSP Virtual Output Mux" }, + { "DSP Virtual Output Mux", "DSP3", "DSP3" }, + { "DSP Virtual Output", NULL, "SYSCLK" }, + ARIZONA_MUX_ROUTES("ISRC1INT1", "ISRC1INT1"), ARIZONA_MUX_ROUTES("ISRC1INT2", "ISRC1INT2"), ARIZONA_MUX_ROUTES("ISRC1INT3", "ISRC1INT3"), From 177b0611ce28c6383ee2a4807424ec29eac88218 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 31 Oct 2013 09:51:08 +0000 Subject: [PATCH 0101/1167] ASoC: wm5110: All ez2ctrl to run without utilising compressed audio Change-Id: I812ff614859665b9937337af9d1d469231851160 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5110.c | 24 +++++++++++++++++++++--- 1 file changed, 21 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 389a1ec407b..e3948126ab1 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -45,6 +45,7 @@ struct wm5110_compr { struct wm_adsp* adsp; size_t total_copied; + bool trig; }; struct wm5110_priv { @@ -129,6 +130,16 @@ static int wm5110_sysclk_ev(struct snd_soc_dapm_widget *w, return 0; } +static int wm5110_virt_dsp_power_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct wm5110_priv *wm5110 = snd_soc_codec_get_drvdata(w->codec); + + wm5110->compr_info.trig = false; + + return 0; +} + static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); @@ -980,8 +991,9 @@ SND_SOC_DAPM_VIRT_MUX("DSP2 Virtual Input", SND_SOC_NOPM, 0, 0, SND_SOC_DAPM_VIRT_MUX("DSP3 Virtual Input", SND_SOC_NOPM, 0, 0, &wm5110_memory_mux[1]), -SND_SOC_DAPM_VIRT_MUX("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, - &wm5110_dsp_output_mux[0]), +SND_SOC_DAPM_VIRT_MUX_E("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, + &wm5110_dsp_output_mux[0], wm5110_virt_dsp_power_ev, + SND_SOC_DAPM_POST_PMU), ARIZONA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), ARIZONA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"), @@ -1591,8 +1603,13 @@ static irqreturn_t adsp2_irq(int irq, void *data) mutex_lock(&wm5110->compr_info.lock); if (wm5110->core.arizona->pdata.ez2ctrl_trigger && - !wm5110->compr_info.total_copied) + !wm5110->compr_info.trig) { wm5110->core.arizona->pdata.ez2ctrl_trigger(); + wm5110->compr_info.trig = true; + } + + if (!wm5110->compr_info.stream) + goto out; ret = wm_adsp_stream_capture(wm5110->compr_info.adsp); if (ret < 0) { @@ -1691,6 +1708,7 @@ static int wm5110_free(struct snd_compr_stream *stream) wm5110->compr_info.stream = NULL; wm5110->compr_info.total_copied = 0; + wm5110->compr_info.trig = false; wm_adsp_stream_free(wm5110->compr_info.adsp); From c1a15bb29497c924e448775356be9d8615921be2 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 31 Oct 2013 10:00:06 +0000 Subject: [PATCH 0102/1167] ASoC: wm5110: Keep Ez2Control interrupts registered Change-Id: Iffe1895a13a907a81ad5a4205dba7ed217933751 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5110.c | 67 ++++++++++++++++++++------------------- 1 file changed, 34 insertions(+), 33 deletions(-) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index e3948126ab1..9f8afa5dbab 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -1659,32 +1659,6 @@ static int wm5110_open(struct snd_compr_stream *stream) goto out; } - ret = arizona_request_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, - "ADSP2 interrupt 1", adsp2_irq, wm5110); - if (ret != 0) { - dev_err(arizona->dev, "Failed to request DSP IRQ: %d\n", ret); - goto out; - } - - ret = irq_set_irq_wake(arizona->irq, 1); - if (ret) { - dev_err(arizona->dev, - "Failed to set DSP IRQ to wake source: %d\n", - ret); - arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, wm5110); - goto out; - } - - ret = regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, - ARIZONA_IM_DRC2_SIG_DET_EINT2, - ARIZONA_IM_DRC2_SIG_DET_EINT2); - if (ret != 0) { - dev_err(arizona->dev, - "Failed to unmask DRC2 IRQ for DSP: %d\n", - ret); - goto out; - } - wm5110->compr_info.stream = stream; out: mutex_unlock(&wm5110->compr_info.lock); @@ -1696,16 +1670,9 @@ static int wm5110_free(struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; struct wm5110_priv *wm5110 = snd_soc_codec_get_drvdata(rtd->codec); - struct arizona *arizona = wm5110->core.arizona; mutex_lock(&wm5110->compr_info.lock); - irq_set_irq_wake(arizona->irq, 0); - arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, wm5110); - regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, - ARIZONA_IM_DRC2_SIG_DET_EINT2, - 0); - wm5110->compr_info.stream = NULL; wm5110->compr_info.total_copied = 0; wm5110->compr_info.trig = false; @@ -1841,6 +1808,7 @@ static int wm5110_get_codec_caps(struct snd_compr_stream *stream, static int wm5110_codec_probe(struct snd_soc_codec *codec) { struct wm5110_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->core.arizona; int ret; codec->control_data = priv->core.arizona->regmap; @@ -1861,12 +1829,45 @@ static int wm5110_codec_probe(struct snd_soc_codec *codec) priv->core.arizona->dapm = &codec->dapm; + ret = arizona_request_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, + "ADSP2 interrupt 1", adsp2_irq, priv); + if (ret != 0) { + dev_err(arizona->dev, "Failed to request DSP IRQ: %d\n", ret); + return ret; + } + + ret = irq_set_irq_wake(arizona->irq, 1); + if (ret) { + dev_err(arizona->dev, + "Failed to set DSP IRQ to wake source: %d\n", + ret); + arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); + return ret; + } + + ret = regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, + ARIZONA_IM_DRC2_SIG_DET_EINT2, + ARIZONA_IM_DRC2_SIG_DET_EINT2); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to unmask DRC2 IRQ for DSP: %d\n", + ret); + return ret; + } + return 0; } static int wm5110_codec_remove(struct snd_soc_codec *codec) { struct wm5110_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->core.arizona; + + irq_set_irq_wake(arizona->irq, 0); + arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); + regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, + ARIZONA_IM_DRC2_SIG_DET_EINT2, + 0); priv->core.arizona->dapm = NULL; From 1fe472457673924d8e81fa86aaaae2bac0df1890 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Sat, 9 Nov 2013 15:46:41 +0000 Subject: [PATCH 0103/1167] ASoC: wm_adsp: Allow direct specification of bin file name Change-Id: Iac55459c47960204c6ec6d365f8be091b7a43e08 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 1e8d6079170..265c8b4003f 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -326,6 +326,7 @@ static const struct wm_adsp_fw_caps ez2control_caps[] = { static const struct { const char *file; + const char *binfile; int compr_direction; int num_caps; const struct wm_adsp_fw_caps *caps; @@ -1349,8 +1350,12 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) if (file == NULL) return -ENOMEM; - snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.bin", dsp->part, dsp->num, - wm_adsp_fw[dsp->fw].file); + if (wm_adsp_fw[dsp->fw].binfile) + snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.bin", dsp->part, + dsp->num, wm_adsp_fw[dsp->fw].binfile); + else + snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.bin", dsp->part, + dsp->num, wm_adsp_fw[dsp->fw].file); file[PAGE_SIZE - 1] = '\0'; ret = request_firmware(&firmware, file, dsp->dev); From 2e65a425046d1b0f9adbaa8e7e33d5eca180946b Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Sat, 9 Nov 2013 14:21:19 +0000 Subject: [PATCH 0104/1167] ASoC: wm_adsp: Switch to listing firmwares per core Change-Id: I3ce2687dec8159012dcacc38b5867fdcc9a24679 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 67 +++++++++++++++----------------------- sound/soc/codecs/wm_adsp.h | 24 ++++++++++++++ 2 files changed, 51 insertions(+), 40 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 265c8b4003f..ecd6645c0ff 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -212,19 +212,6 @@ static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_EZ2CONTROL] = "Ez2Control", }; -struct wm_adsp_buffer_region_def { - unsigned int mem_type; - unsigned int base_offset; - unsigned int size_offset; -}; - -struct wm_adsp_fw_caps { - u32 id; - struct snd_codec_desc desc; - int num_host_regions; - struct wm_adsp_buffer_region_def *host_region_defs; -}; - struct wm_adsp_system_config_xm_hdr { __be32 sys_enable; __be32 fw_id; @@ -324,13 +311,7 @@ static const struct wm_adsp_fw_caps ez2control_caps[] = { }, }; -static const struct { - const char *file; - const char *binfile; - int compr_direction; - int num_caps; - const struct wm_adsp_fw_caps *caps; -} wm_adsp_fw[WM_ADSP_NUM_FW] = { +static struct wm_adsp_fw_defs wm_adsp_fw[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" }, [WM_ADSP_FW_TX] = { .file = "tx" }, [WM_ADSP_FW_TX_SPK] = { .file = "tx-spk" }, @@ -388,7 +369,7 @@ static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol, if (ucontrol->value.integer.value[0] == adsp[e->shift_l].fw) return 0; - if (ucontrol->value.integer.value[0] >= WM_ADSP_NUM_FW) + if (ucontrol->value.integer.value[0] >= adsp[e->shift_l].num_firmwares) return -EINVAL; if (adsp[e->shift_l].running) @@ -668,7 +649,7 @@ static int wm_adsp_load(struct wm_adsp *dsp) return -ENOMEM; snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.wmfw", dsp->part, dsp->num, - wm_adsp_fw[dsp->fw].file); + dsp->firmwares[dsp->fw].file); file[PAGE_SIZE - 1] = '\0'; ret = request_firmware(&firmware, file, dsp->dev); @@ -1350,12 +1331,12 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) if (file == NULL) return -ENOMEM; - if (wm_adsp_fw[dsp->fw].binfile) + if (dsp->firmwares[dsp->fw].binfile) snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.bin", dsp->part, - dsp->num, wm_adsp_fw[dsp->fw].binfile); + dsp->num, dsp->firmwares[dsp->fw].binfile); else snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.bin", dsp->part, - dsp->num, wm_adsp_fw[dsp->fw].file); + dsp->num, dsp->firmwares[dsp->fw].file); file[PAGE_SIZE - 1] = '\0'; ret = request_firmware(&firmware, file, dsp->dev); @@ -1861,6 +1842,9 @@ int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs) } } + adsp->num_firmwares = WM_ADSP_NUM_FW; + adsp->firmwares = wm_adsp_fw; + return 0; } EXPORT_SYMBOL_GPL(wm_adsp2_init); @@ -1868,11 +1852,14 @@ EXPORT_SYMBOL_GPL(wm_adsp2_init); bool wm_adsp_compress_supported(const struct wm_adsp* adsp, const struct snd_compr_stream* stream) { - if (adsp->fw >= 0 && adsp->fw < WM_ADSP_NUM_FW) { - if (wm_adsp_fw[adsp->fw].num_caps == 0) + if (adsp->fw >= 0 && adsp->fw < adsp->num_firmwares) { + const struct wm_adsp_fw_defs *fw_defs = + &adsp->firmwares[adsp->fw]; + + if (fw_defs->num_caps == 0) return false; - if (wm_adsp_fw[adsp->fw].compr_direction == stream->direction) + if (fw_defs->compr_direction == stream->direction) return true; } @@ -1887,8 +1874,8 @@ bool wm_adsp_format_supported(const struct wm_adsp *adsp, const struct wm_adsp_fw_caps *caps; int i; - for (i = 0; i < wm_adsp_fw[adsp->fw].num_caps; i++) { - caps = &wm_adsp_fw[adsp->fw].caps[i]; + for (i = 0; i < adsp->firmwares[adsp->fw].num_caps; i++) { + caps = &adsp->firmwares[adsp->fw].caps[i]; if (caps->id != params->codec.id) continue; @@ -1916,12 +1903,12 @@ void wm_adsp_get_caps(const struct wm_adsp *adsp, { int i; - if (wm_adsp_fw[adsp->fw].caps) { - for (i = 0; i < wm_adsp_fw[adsp->fw].num_caps; i++) - caps->codecs[i] = wm_adsp_fw[adsp->fw].caps[i].id; + if (adsp->firmwares[adsp->fw].caps) { + for (i = 0; i < adsp->firmwares[adsp->fw].num_caps; i++) + caps->codecs[i] = adsp->firmwares[adsp->fw].caps[i].id; caps->num_codecs = i; - caps->direction = wm_adsp_fw[adsp->fw].compr_direction; + caps->direction = adsp->firmwares[adsp->fw].compr_direction; } } EXPORT_SYMBOL_GPL(wm_adsp_get_caps); @@ -2017,10 +2004,10 @@ static int wm_adsp_populate_buffer_regions(struct wm_adsp *adsp) u32 size; u32 cumulative_samps = 0; struct wm_adsp_buffer_region_def *host_region_defs = - wm_adsp_fw[adsp->fw].caps->host_region_defs; + adsp->firmwares[adsp->fw].caps->host_region_defs; struct wm_adsp_buffer_region *region; - for (i = 0; i < wm_adsp_fw[adsp->fw].caps->num_host_regions; ++i) { + for (i = 0; i < adsp->firmwares[adsp->fw].caps->num_host_regions; ++i) { region = &adsp->host_regions[i]; region->offset_samps = cumulative_samps; @@ -2095,12 +2082,12 @@ static int wm_adsp_read_samples(struct wm_adsp *adsp, int32_t read_index, int i, ret; /* Calculate read parameters */ - for (i = 0; i < wm_adsp_fw[adsp->fw].caps->num_host_regions; ++i) { + for (i = 0; i < adsp->firmwares[adsp->fw].caps->num_host_regions; ++i) { if (read_index < adsp->host_regions[i].cumulative_samps) break; } - if (i == wm_adsp_fw[adsp->fw].caps->num_host_regions) + if (i == adsp->firmwares[adsp->fw].caps->num_host_regions) return -EINVAL; num_samps = adsp->host_regions[i].cumulative_samps - read_index; @@ -2143,7 +2130,7 @@ static int wm_adsp_read_samples(struct wm_adsp *adsp, int32_t read_index, static int wm_adsp_capture_block(struct wm_adsp *adsp, int* avail) { - int last_region = wm_adsp_fw[adsp->fw].caps->num_host_regions - 1; + int last_region = adsp->firmwares[adsp->fw].caps->num_host_regions - 1; int host_size_samps = adsp->host_regions[last_region].cumulative_samps; int num_samps; @@ -2230,7 +2217,7 @@ int wm_adsp_stream_alloc(struct wm_adsp* adsp, } if (!adsp->host_regions) { - size = wm_adsp_fw[adsp->fw].caps->num_host_regions * + size = adsp->firmwares[adsp->fw].caps->num_host_regions * sizeof(*adsp->host_regions); adsp->host_regions = kzalloc(size, GFP_KERNEL); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index c482bb70727..e5119de831a 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -43,6 +43,27 @@ struct wm_adsp_buffer_region { unsigned int base_addr; }; +struct wm_adsp_buffer_region_def { + unsigned int mem_type; + unsigned int base_offset; + unsigned int size_offset; +}; + +struct wm_adsp_fw_caps { + u32 id; + struct snd_codec_desc desc; + int num_host_regions; + struct wm_adsp_buffer_region_def *host_region_defs; +}; + +struct wm_adsp_fw_defs { + const char *file; + const char *binfile; + int compr_direction; + int num_caps; + const struct wm_adsp_fw_caps *caps; +}; + struct wm_adsp { const char *part; int num; @@ -80,6 +101,9 @@ struct wm_adsp { int capt_buf_size; struct wm_adsp_buffer_region *host_regions; bool buffer_drain_pending; + + int num_firmwares; + struct wm_adsp_fw_defs *firmwares; }; #define WM_ADSP1(wname, num) \ From fae0b55ad310b84f54f0e68d6bb5d3f838e970ad Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Sat, 9 Nov 2013 15:36:37 +0000 Subject: [PATCH 0105/1167] ASoC: wm_adsp: Add support for setting firmwares from device tree Change-Id: I85fdd673c35be9296f25773872d0c7c4e7c2e8fe Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 99 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 96 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index ecd6645c0ff..28e48d1a842 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -380,7 +381,7 @@ static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol, return 0; } -static const struct soc_enum wm_adsp_fw_enum[] = { +static struct soc_enum wm_adsp_fw_enum[] = { SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), @@ -1794,6 +1795,96 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, } EXPORT_SYMBOL_GPL(wm_adsp2_event); +static int wm_adsp_of_parse_firmware(struct wm_adsp *adsp, + struct device_node *np) +{ + struct device_node *fws = of_get_child_by_name(np, "firmware"); + struct device_node *fw = NULL; + const char **ctl_names; + int ret; + int i; + + if (!fws) + return 0; + + i = 0; + while ((fw = of_get_next_child(fws, fw)) != NULL) + i++; + + if (i == 0) + return 0; + + adsp->num_firmwares = i; + + adsp->firmwares = devm_kzalloc(adsp->dev, + i * sizeof(struct wm_adsp_fw_defs), + GFP_KERNEL); + if (!adsp->firmwares) + return -ENOMEM; + + ctl_names = devm_kzalloc(adsp->dev, + i * sizeof(const char *), + GFP_KERNEL); + if (!ctl_names) + return -ENOMEM; + + i = 0; + while ((fw = of_get_next_child(fws, fw)) != NULL) { + ctl_names[i] = fw->name; + + ret = of_property_read_string(fw, "wlf,wmfw-file", + &adsp->firmwares[i].file); + if (ret < 0) { + dev_err(adsp->dev, + "Firmware filename missing/malformed: %d\n", + ret); + return ret; + } + + ret = of_property_read_string(fw, "wlf,bin-file", + &adsp->firmwares[i].binfile); + if (ret < 0) + adsp->firmwares[i].binfile = NULL; + + i++; + } + + wm_adsp_fw_enum[adsp->num - 1].max = adsp->num_firmwares; + wm_adsp_fw_enum[adsp->num - 1].texts = ctl_names; + + return adsp->num_firmwares; +} + +static int wm_adsp_of_parse_adsp(struct wm_adsp *adsp) +{ + struct device_node *np = of_get_child_by_name(adsp->dev->of_node, + "adsps"); + struct device_node *core = NULL; + unsigned int addr; + int ret; + + if (!np) + return 0; + + while ((core = of_get_next_child(np, core)) != NULL) { + ret = of_property_read_u32(core, "reg", &addr); + if (ret < 0) { + dev_err(adsp->dev, + "Failed to get ADSP base address: %d\n", + ret); + return ret; + } + + if (addr == adsp->base) + break; + } + + if (!core) + return 0; + + return wm_adsp_of_parse_firmware(adsp, core); +} + int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs) { int ret; @@ -1842,8 +1933,10 @@ int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs) } } - adsp->num_firmwares = WM_ADSP_NUM_FW; - adsp->firmwares = wm_adsp_fw; + if (!adsp->dev->of_node || wm_adsp_of_parse_adsp(adsp) <= 0) { + adsp->num_firmwares = WM_ADSP_NUM_FW; + adsp->firmwares = wm_adsp_fw; + } return 0; } From 79e5883b86af88c7ddd2e4f2d7de503d958df4f0 Mon Sep 17 00:00:00 2001 From: Chanwoo Choi Date: Fri, 23 Aug 2013 10:21:37 +0900 Subject: [PATCH 0106/1167] extcon: Fix up 80 column coding style issues This patch fix 80 column coding sytle issues by using checkpatch script. Cc: Charles Keepax Cc: Mark Brown Signed-off-by: Chanwoo Choi Signed-off-by: Myungjoo Ham Signed-off-by: Greg Kroah-Hartman (cherry picked from commit c2275d2fa587712d285a4db97a68322a233ad2c8) Change-Id: I03dce77a551f6c001b904afe2342d65f21435a44 Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 25 +++--- drivers/extcon/extcon-class.c | 6 +- drivers/extcon/extcon-max77693.c | 129 +++++++++++++++++-------------- drivers/extcon/extcon-max8997.c | 6 +- 4 files changed, 94 insertions(+), 72 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 3a567fd6cf8..98cfeb5761d 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -788,8 +788,8 @@ static void arizona_start_hpdet_acc_id(struct arizona_extcon_info *info) static void arizona_micd_timeout_work(struct work_struct *work) { struct arizona_extcon_info *info = container_of(work, - struct arizona_extcon_info, - micd_timeout_work.work); + struct arizona_extcon_info, + micd_timeout_work.work); mutex_lock(&info->lock); @@ -806,8 +806,8 @@ static void arizona_micd_timeout_work(struct work_struct *work) static void arizona_micd_detect(struct work_struct *work) { struct arizona_extcon_info *info = container_of(work, - struct arizona_extcon_info, - micd_detect_work.work); + struct arizona_extcon_info, + micd_detect_work.work); struct arizona *arizona = info->arizona; unsigned int val = 0, lvl; int ret, i, key; @@ -863,7 +863,8 @@ static void arizona_micd_detect(struct work_struct *work) for (i = 0; i < 10 && !(val & MICD_LVL_0_TO_8); i++) { ret = regmap_read(arizona->regmap, ARIZONA_MIC_DETECT_3, &val); if (ret != 0) { - dev_err(arizona->dev, "Failed to read MICDET: %d\n", ret); + dev_err(arizona->dev, + "Failed to read MICDET: %d\n", ret); mutex_unlock(&info->lock); return; } @@ -871,7 +872,8 @@ static void arizona_micd_detect(struct work_struct *work) dev_dbg(arizona->dev, "MICDET: %x\n", val); if (!(val & ARIZONA_MICD_VALID)) { - dev_warn(arizona->dev, "Microphone detection state invalid\n"); + dev_warn(arizona->dev, + "Microphone detection state invalid\n"); mutex_unlock(&info->lock); return; } @@ -1024,8 +1026,8 @@ static irqreturn_t arizona_micdet(int irq, void *data) static void arizona_hpdet_work(struct work_struct *work) { struct arizona_extcon_info *info = container_of(work, - struct arizona_extcon_info, - hpdet_work.work); + struct arizona_extcon_info, + hpdet_work.work); mutex_lock(&info->lock); arizona_start_hpdet_acc_id(info); @@ -1071,9 +1073,12 @@ static irqreturn_t arizona_jackdet(int irq, void *data) schedule_delayed_work(&info->hpdet_work, msecs_to_jiffies(HPDET_DEBOUNCE)); - if (cancelled_mic) + if (cancelled_mic) { + int micd_timeout = info->micd_timeout; + schedule_delayed_work(&info->micd_timeout_work, - msecs_to_jiffies(info->micd_timeout)); + msecs_to_jiffies(micd_timeout)); + } goto out; } diff --git a/drivers/extcon/extcon-class.c b/drivers/extcon/extcon-class.c index 60adc04b056..2c7858339f6 100644 --- a/drivers/extcon/extcon-class.c +++ b/drivers/extcon/extcon-class.c @@ -470,7 +470,8 @@ int extcon_register_interest(struct extcon_specific_cable_nb *obj, if (!obj->edev) return -ENODEV; - obj->cable_index = extcon_find_cable_index(obj->edev, cable_name); + obj->cable_index = extcon_find_cable_index(obj->edev, + cable_name); if (obj->cable_index < 0) return obj->cable_index; @@ -478,7 +479,8 @@ int extcon_register_interest(struct extcon_specific_cable_nb *obj, obj->internal_nb.notifier_call = _call_per_cable; - return raw_notifier_chain_register(&obj->edev->nh, &obj->internal_nb); + return raw_notifier_chain_register(&obj->edev->nh, + &obj->internal_nb); } else { struct class_dev_iter iter; struct extcon_dev *extd; diff --git a/drivers/extcon/extcon-max77693.c b/drivers/extcon/extcon-max77693.c index b56bdaa27d4..5ee0344f734 100644 --- a/drivers/extcon/extcon-max77693.c +++ b/drivers/extcon/extcon-max77693.c @@ -189,14 +189,17 @@ enum max77693_muic_acc_type { /* The below accessories have same ADC value so ADCLow and ADC1K bit is used to separate specific accessory */ - MAX77693_MUIC_GND_USB_OTG = 0x100, /* ADC:0x0, VBVolot:0, ADCLow:0, ADC1K:0 */ - MAX77693_MUIC_GND_USB_OTG_VB = 0x104, /* ADC:0x0, VBVolot:1, ADCLow:0, ADC1K:0 */ - MAX77693_MUIC_GND_AV_CABLE_LOAD = 0x102,/* ADC:0x0, VBVolot:0, ADCLow:1, ADC1K:0 */ - MAX77693_MUIC_GND_MHL = 0x103, /* ADC:0x0, VBVolot:0, ADCLow:1, ADC1K:1 */ - MAX77693_MUIC_GND_MHL_VB = 0x107, /* ADC:0x0, VBVolot:1, ADCLow:1, ADC1K:1 */ + /* ADC|VBVolot|ADCLow|ADC1K| */ + MAX77693_MUIC_GND_USB_OTG = 0x100, /* 0x0| 0| 0| 0| */ + MAX77693_MUIC_GND_USB_OTG_VB = 0x104, /* 0x0| 1| 0| 0| */ + MAX77693_MUIC_GND_AV_CABLE_LOAD = 0x102,/* 0x0| 0| 1| 0| */ + MAX77693_MUIC_GND_MHL = 0x103, /* 0x0| 0| 1| 1| */ + MAX77693_MUIC_GND_MHL_VB = 0x107, /* 0x0| 1| 1| 1| */ }; -/* MAX77693 MUIC device support below list of accessories(external connector) */ +/* + * MAX77693 MUIC device support below list of accessories(external connector) + */ enum { EXTCON_CABLE_USB = 0, EXTCON_CABLE_USB_HOST, @@ -395,12 +398,12 @@ static int max77693_muic_get_cable_type(struct max77693_muic_info *info, vbvolt >>= STATUS2_VBVOLT_SHIFT; /** - * [0x1][VBVolt][ADCLow][ADC1K] - * [0x1 0 0 0 ] : USB_OTG - * [0x1 1 0 0 ] : USB_OTG_VB - * [0x1 0 1 0 ] : Audio Video Cable with load - * [0x1 0 1 1 ] : MHL without charging connector - * [0x1 1 1 1 ] : MHL with charging connector + * [0x1|VBVolt|ADCLow|ADC1K] + * [0x1| 0| 0| 0] USB_OTG + * [0x1| 1| 0| 0] USB_OTG_VB + * [0x1| 0| 1| 0] Audio Video cable with load + * [0x1| 0| 1| 1] MHL without charging cable + * [0x1| 1| 1| 1] MHL with charging cable */ cable_type = ((0x1 << 8) | (vbvolt << 2) @@ -723,11 +726,11 @@ static int max77693_muic_adc_handler(struct max77693_muic_info *info) if (ret < 0) return ret; break; - case MAX77693_MUIC_ADC_REMOTE_S3_BUTTON: /* DOCK_KEY_PREV */ - case MAX77693_MUIC_ADC_REMOTE_S7_BUTTON: /* DOCK_KEY_NEXT */ - case MAX77693_MUIC_ADC_REMOTE_S9_BUTTON: /* DOCK_VOL_DOWN */ - case MAX77693_MUIC_ADC_REMOTE_S10_BUTTON: /* DOCK_VOL_UP */ - case MAX77693_MUIC_ADC_REMOTE_S12_BUTTON: /* DOCK_KEY_PLAY_PAUSE */ + case MAX77693_MUIC_ADC_REMOTE_S3_BUTTON: /* DOCK_KEY_PREV */ + case MAX77693_MUIC_ADC_REMOTE_S7_BUTTON: /* DOCK_KEY_NEXT */ + case MAX77693_MUIC_ADC_REMOTE_S9_BUTTON: /* DOCK_VOL_DOWN */ + case MAX77693_MUIC_ADC_REMOTE_S10_BUTTON: /* DOCK_VOL_UP */ + case MAX77693_MUIC_ADC_REMOTE_S12_BUTTON: /* DOCK_KEY_PLAY_PAUSE */ /* * Button of DOCK device * - the Prev/Next/Volume Up/Volume Down/Play-Pause button @@ -815,19 +818,21 @@ static int max77693_muic_chg_handler(struct max77693_muic_info *info) case MAX77693_MUIC_GND_MHL_VB: /* * MHL cable with MHL_TA(USB/TA) cable - * - MHL cable include two port(HDMI line and separate micro- - * usb port. When the target connect MHL cable, extcon driver - * check whether MHL_TA(USB/TA) cable is connected. If MHL_TA - * cable is connected, extcon driver notify state to notifiee - * for charging battery. + * - MHL cable include two port(HDMI line and separate + * micro-usb port. When the target connect MHL cable, + * extcon driver check whether MHL_TA(USB/TA) cable is + * connected. If MHL_TA cable is connected, extcon + * driver notify state to notifiee for charging battery. * * Features of 'MHL_TA(USB/TA) with MHL cable' * - Support MHL - * - Support charging through micro-usb port without data connection + * - Support charging through micro-usb port without + * data connection */ extcon_set_cable_state(info->edev, "MHL_TA", attached); if (!cable_attached) - extcon_set_cable_state(info->edev, "MHL", cable_attached); + extcon_set_cable_state(info->edev, + "MHL", cable_attached); break; } @@ -839,47 +844,51 @@ static int max77693_muic_chg_handler(struct max77693_muic_info *info) case MAX77693_MUIC_ADC_AV_CABLE_NOLOAD: /* Dock-Audio */ /* * Dock-Audio device with USB/TA cable - * - Dock device include two port(Dock-Audio and micro-usb - * port). When the target connect Dock-Audio device, extcon - * driver check whether USB/TA cable is connected. If USB/TA - * cable is connected, extcon driver notify state to notifiee - * for charging battery. + * - Dock device include two port(Dock-Audio and micro- + * usb port). When the target connect Dock-Audio device, + * extcon driver check whether USB/TA cable is connected + * or not. If USB/TA cable is connected, extcon driver + * notify state to notifiee for charging battery. * * Features of 'USB/TA cable with Dock-Audio device' * - Support external output feature of audio. - * - Support charging through micro-usb port without data - * connection. + * - Support charging through micro-usb port without + * data connection. */ extcon_set_cable_state(info->edev, "USB", attached); if (!cable_attached) - extcon_set_cable_state(info->edev, "Dock-Audio", cable_attached); + extcon_set_cable_state(info->edev, "Dock-Audio", + cable_attached); break; case MAX77693_MUIC_ADC_RESERVED_ACC_3: /* Dock-Smart */ /* * Dock-Smart device with USB/TA cable * - Dock-Desk device include three type of cable which * are HDMI, USB for mouse/keyboard and micro-usb port - * for USB/TA cable. Dock-Smart device need always exteranl - * power supply(USB/TA cable through micro-usb cable). Dock- - * Smart device support screen output of target to separate - * monitor and mouse/keyboard for desktop mode. + * for USB/TA cable. Dock-Smart device need always + * exteranl power supply(USB/TA cable through micro-usb + * cable). Dock-Smart device support screen output of + * target to separate monitor and mouse/keyboard for + * desktop mode. * * Features of 'USB/TA cable with Dock-Smart device' * - Support MHL * - Support external output feature of audio - * - Support charging through micro-usb port without data - * connection if TA cable is connected to target. - * - Support charging and data connection through micro-usb port - * if USB cable is connected between target and host - * device. + * - Support charging through micro-usb port without + * data connection if TA cable is connected to target. + * - Support charging and data connection through micro- + * usb port if USB cable is connected between target + * and host device * - Support OTG device (Mouse/Keyboard) */ - ret = max77693_muic_set_path(info, info->path_usb, attached); + ret = max77693_muic_set_path(info, info->path_usb, + attached); if (ret < 0) return ret; - extcon_set_cable_state(info->edev, "Dock-Smart", attached); + extcon_set_cable_state(info->edev, "Dock-Smart", + attached); extcon_set_cable_state(info->edev, "MHL", attached); break; @@ -889,25 +898,28 @@ static int max77693_muic_chg_handler(struct max77693_muic_info *info) switch (chg_type) { case MAX77693_CHARGER_TYPE_NONE: /* - * When MHL(with USB/TA cable) or Dock-Audio with USB/TA cable - * is attached, muic device happen below two interrupt. - * - 'MAX77693_MUIC_IRQ_INT1_ADC' for detecting MHL/Dock-Audio. - * - 'MAX77693_MUIC_IRQ_INT2_CHGTYP' for detecting USB/TA cable - * connected to MHL or Dock-Audio. - * Always, happen eariler MAX77693_MUIC_IRQ_INT1_ADC interrupt - * than MAX77693_MUIC_IRQ_INT2_CHGTYP interrupt. + * When MHL(with USB/TA cable) or Dock-Audio with USB/TA + * cable is attached, muic device happen below two irq. + * - 'MAX77693_MUIC_IRQ_INT1_ADC' for detecting + * MHL/Dock-Audio. + * - 'MAX77693_MUIC_IRQ_INT2_CHGTYP' for detecting + * USB/TA cable connected to MHL or Dock-Audio. + * Always, happen eariler MAX77693_MUIC_IRQ_INT1_ADC + * irq than MAX77693_MUIC_IRQ_INT2_CHGTYP irq. * - * If user attach MHL (with USB/TA cable and immediately detach - * MHL with USB/TA cable before MAX77693_MUIC_IRQ_INT2_CHGTYP - * interrupt is happened, USB/TA cable remain connected state to - * target. But USB/TA cable isn't connected to target. The user - * be face with unusual action. So, driver should check this - * situation in spite of, that previous charger type is N/A. + * If user attach MHL (with USB/TA cable and immediately + * detach MHL with USB/TA cable before MAX77693_MUIC_IRQ + * _INT2_CHGTYP irq is happened, USB/TA cable remain + * connected state to target. But USB/TA cable isn't + * connected to target. The user be face with unusual + * action. So, driver should check this situation in + * spite of, that previous charger type is N/A. */ break; case MAX77693_CHARGER_TYPE_USB: /* Only USB cable, PATH:AP_USB */ - ret = max77693_muic_set_path(info, info->path_usb, attached); + ret = max77693_muic_set_path(info, info->path_usb, + attached); if (ret < 0) return ret; @@ -1214,7 +1226,8 @@ static int max77693_muic_probe(struct platform_device *pdev) } if (pdata->muic_data) { - struct max77693_muic_platform_data *muic_pdata = pdata->muic_data; + struct max77693_muic_platform_data *muic_pdata + = pdata->muic_data; /* * Default usb/uart path whether UART/USB or AUX_UART/AUX_USB diff --git a/drivers/extcon/extcon-max8997.c b/drivers/extcon/extcon-max8997.c index 67d6738d85a..b9e726daefc 100644 --- a/drivers/extcon/extcon-max8997.c +++ b/drivers/extcon/extcon-max8997.c @@ -426,7 +426,8 @@ static int max8997_muic_adc_handler(struct max8997_muic_info *info) break; case MAX8997_MUIC_ADC_FACTORY_MODE_USB_OFF: case MAX8997_MUIC_ADC_FACTORY_MODE_USB_ON: - ret = max8997_muic_handle_usb(info, MAX8997_USB_DEVICE, attached); + ret = max8997_muic_handle_usb(info, + MAX8997_USB_DEVICE, attached); if (ret < 0) return ret; break; @@ -504,7 +505,8 @@ static int max8997_muic_chg_handler(struct max8997_muic_info *info) } break; case MAX8997_CHARGER_TYPE_DOWNSTREAM_PORT: - extcon_set_cable_state(info->edev, "Charge-downstream", attached); + extcon_set_cable_state(info->edev, + "Charge-downstream", attached); break; case MAX8997_CHARGER_TYPE_DEDICATED_CHG: extcon_set_cable_state(info->edev, "TA", attached); From 4184bcdd1c9d11f0a20f740cef84346dd2d5c0b8 Mon Sep 17 00:00:00 2001 From: Chanwoo Choi Date: Fri, 23 Aug 2013 10:21:39 +0900 Subject: [PATCH 0107/1167] extcon: arizona: Fix up minor coding style to remove unnecessary braces This fixes up braces coding style issue by using checkpatch script. Cc: Charles Keepax Cc: Mark Brown Signed-off-by: Chanwoo Choi Signed-off-by: Greg Kroah-Hartman (cherry picked from commit d6675667540a19427099cfd7eb80fcd4320a951d) Change-Id: I7bc655ee91c306ca9aa28e3e4ac451eb24e2986a Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 98cfeb5761d..202ec8e747b 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -608,11 +608,10 @@ static irqreturn_t arizona_hpdet_irq(int irq, void *data) } ret = arizona_hpdet_read(info); - if (ret == -EAGAIN) { + if (ret == -EAGAIN) goto out; - } else if (ret < 0) { + else if (ret < 0) goto done; - } reading = ret; /* Reset back to starting range */ @@ -622,11 +621,10 @@ static irqreturn_t arizona_hpdet_irq(int irq, void *data) 0); ret = arizona_hpdet_do_id(info, &reading, &mic); - if (ret == -EAGAIN) { + if (ret == -EAGAIN) goto out; - } else if (ret < 0) { + else if (ret < 0) goto done; - } /* Report high impedence cables as line outputs */ if (reading >= 5000) From faf0eb86eed90168cf0b92a381f4a2be3c780cc6 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 20 Nov 2013 16:44:57 +0000 Subject: [PATCH 0108/1167] mfd: arizona: rename wm5110 to florida Renames support for Florida-class codecs from WM5110 to florida. Signed-off-by: Richard Fitzgerald --- drivers/mfd/Kconfig | 6 +- drivers/mfd/Makefile | 4 +- drivers/mfd/arizona-core.c | 35 +++--- drivers/mfd/arizona-i2c.c | 4 +- drivers/mfd/arizona-irq.c | 6 +- drivers/mfd/arizona-spi.c | 4 +- drivers/mfd/arizona.h | 14 +-- .../mfd/{wm5110-tables.c => florida-tables.c} | 102 +++++++++--------- include/linux/mfd/arizona/core.h | 2 +- 9 files changed, 93 insertions(+), 84 deletions(-) rename drivers/mfd/{wm5110-tables.c => florida-tables.c} (97%) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index d54e985748b..57052cd430b 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1040,11 +1040,11 @@ config MFD_WM5102 help Support for Wolfson Microelectronics WM5102 low power audio SoC -config MFD_WM5110 - bool "Wolfson Microelectronics WM5110" +config MFD_FLORIDA + bool "Wolfson Microelectronics Florida class codecs" depends on MFD_ARIZONA help - Support for Wolfson Microelectronics WM5110 low power audio SoC + Support for Wolfson Microelectronics Florida class low power audio SoC config MFD_WM8400 bool "Wolfson Microelectronics WM8400" diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 718e94a2a9a..d026173af5f 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -40,8 +40,8 @@ obj-$(CONFIG_MFD_ARIZONA_SPI) += arizona-spi.o ifneq ($(CONFIG_MFD_WM5102),n) obj-$(CONFIG_MFD_ARIZONA) += wm5102-tables.o endif -ifneq ($(CONFIG_MFD_WM5110),n) -obj-$(CONFIG_MFD_ARIZONA) += wm5110-tables.o +ifneq ($(CONFIG_MFD_FLORIDA),n) +obj-$(CONFIG_MFD_ARIZONA) += florida-tables.o endif obj-$(CONFIG_MFD_WM8400) += wm8400-core.o wm831x-objs := wm831x-core.o wm831x-irq.o wm831x-otp.o diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index b368de77a26..19c844fc867 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -361,10 +361,14 @@ static int arizona_runtime_resume(struct device *dev) regcache_cache_only(arizona->regmap, false); - if (arizona->rev == 3 && arizona->type == WM5110) { - ret = arizona_soft_reset(arizona); - if (ret != 0) - goto err; + switch (arizona->type) { + case WM5110: + if (arizona->rev == 3) { + ret = arizona_soft_reset(arizona); + if (ret != 0) + goto err; + } + break; } switch (arizona->type) { @@ -777,13 +781,13 @@ static struct mfd_cell wm5102_devs[] = { { .name = "wm5102-codec" }, }; -static struct mfd_cell wm5110_devs[] = { +static struct mfd_cell florida_devs[] = { { .name = "arizona-micsupp" }, { .name = "arizona-extcon" }, { .name = "arizona-gpio" }, { .name = "arizona-haptics" }, { .name = "arizona-pwm" }, - { .name = "wm5110-codec" }, + { .name = "florida-codec" }, }; int arizona_dev_init(struct arizona *arizona) @@ -953,15 +957,20 @@ int arizona_dev_init(struct arizona *arizona) arizona->rev &= 0x7; break; #endif -#ifdef CONFIG_MFD_WM5110 +#ifdef CONFIG_MFD_FLORIDA case 0x5110: - type_name = "WM5110"; - if (arizona->type != WM5110) { - dev_err(arizona->dev, "WM5110 registered as %d\n", + switch (arizona->type) { + case WM5110: + type_name = "WM5110"; + break; + + default: + dev_err(arizona->dev, "Florida codec registered as %d\n", arizona->type); arizona->type = WM5110; + break; } - apply_patch = wm5110_patch; + apply_patch = florida_patch; break; #endif default: @@ -1127,8 +1136,8 @@ int arizona_dev_init(struct arizona *arizona) ARRAY_SIZE(wm5102_devs), NULL, 0, NULL); break; case WM5110: - ret = mfd_add_devices(arizona->dev, -1, wm5110_devs, - ARRAY_SIZE(wm5110_devs), NULL, 0, NULL); + ret = mfd_add_devices(arizona->dev, -1, florida_devs, + ARRAY_SIZE(florida_devs), NULL, 0, NULL); break; } diff --git a/drivers/mfd/arizona-i2c.c b/drivers/mfd/arizona-i2c.c index deb267ebf84..786bd1ab671 100644 --- a/drivers/mfd/arizona-i2c.c +++ b/drivers/mfd/arizona-i2c.c @@ -40,9 +40,9 @@ static int arizona_i2c_probe(struct i2c_client *i2c, regmap_config = &wm5102_i2c_regmap; break; #endif -#ifdef CONFIG_MFD_WM5110 +#ifdef CONFIG_MFD_FLORIDA case WM5110: - regmap_config = &wm5110_i2c_regmap; + regmap_config = &florida_i2c_regmap; break; #endif default: diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index 64cd9b6dac9..b44d8f7d703 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -200,10 +200,10 @@ int arizona_irq_init(struct arizona *arizona) ctrlif_error = false; break; #endif -#ifdef CONFIG_MFD_WM5110 +#ifdef CONFIG_MFD_FLORIDA case WM5110: - aod = &wm5110_aod; - irq = &wm5110_irq; + aod = &florida_aod; + irq = &florida_irq; ctrlif_error = false; break; diff --git a/drivers/mfd/arizona-spi.c b/drivers/mfd/arizona-spi.c index 47be7b35b5c..8dd5f1a8a48 100644 --- a/drivers/mfd/arizona-spi.c +++ b/drivers/mfd/arizona-spi.c @@ -40,9 +40,9 @@ static int arizona_spi_probe(struct spi_device *spi) regmap_config = &wm5102_spi_regmap; break; #endif -#ifdef CONFIG_MFD_WM5110 +#ifdef CONFIG_MFD_FLORIDA case WM5110: - regmap_config = &wm5110_spi_regmap; + regmap_config = &florida_spi_regmap; break; #endif default: diff --git a/drivers/mfd/arizona.h b/drivers/mfd/arizona.h index db55d9854a5..7a82689cc17 100644 --- a/drivers/mfd/arizona.h +++ b/drivers/mfd/arizona.h @@ -1,5 +1,5 @@ /* - * wm5102.h -- WM5102 MFD internals + * arizona.h -- WM5102 MFD internals * * Copyright 2012 Wolfson Microelectronics plc * @@ -10,8 +10,8 @@ * published by the Free Software Foundation. */ -#ifndef _WM5102_H -#define _WM5102_H +#ifndef _ARIZONA_H +#define _ARIZONA_H #include #include @@ -22,8 +22,8 @@ struct wm_arizona; extern const struct regmap_config wm5102_i2c_regmap; extern const struct regmap_config wm5102_spi_regmap; -extern const struct regmap_config wm5110_i2c_regmap; -extern const struct regmap_config wm5110_spi_regmap; +extern const struct regmap_config florida_i2c_regmap; +extern const struct regmap_config florida_spi_regmap; extern const struct dev_pm_ops arizona_pm_ops; @@ -32,8 +32,8 @@ extern const struct of_device_id arizona_of_match[]; extern const struct regmap_irq_chip wm5102_aod; extern const struct regmap_irq_chip wm5102_irq; -extern const struct regmap_irq_chip wm5110_aod; -extern const struct regmap_irq_chip wm5110_irq; +extern const struct regmap_irq_chip florida_aod; +extern const struct regmap_irq_chip florida_irq; int arizona_dev_init(struct arizona *arizona); int arizona_dev_exit(struct arizona *arizona); diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/florida-tables.c similarity index 97% rename from drivers/mfd/wm5110-tables.c rename to drivers/mfd/florida-tables.c index 044b28165f3..a392ffea50f 100644 --- a/drivers/mfd/wm5110-tables.c +++ b/drivers/mfd/florida-tables.c @@ -1,5 +1,5 @@ /* - * wm5110-tables.c -- WM5110 data tables + * florida-tables.c -- data tables for Florida-class codecs * * Copyright 2012 Wolfson Microelectronics plc * @@ -18,10 +18,10 @@ #include "arizona.h" -#define WM5110_NUM_AOD_ISR 2 -#define WM5110_NUM_ISR 5 +#define FLORIDA_NUM_AOD_ISR 2 +#define FLORIDA_NUM_ISR 5 -static const struct reg_default wm5110_reva_patch[] = { +static const struct reg_default florida_reva_patch[] = { { 0x80, 0x3 }, { 0x44, 0x20 }, { 0x45, 0x40 }, @@ -134,7 +134,7 @@ static const struct reg_default wm5110_reva_patch[] = { { 0x209, 0x002A }, }; -static const struct reg_default wm5110_revb_patch[] = { +static const struct reg_default florida_revb_patch[] = { { 0x80, 0x3 }, { 0x36e, 0x0210 }, { 0x370, 0x0210 }, @@ -224,7 +224,7 @@ static const struct reg_default wm5110_revb_patch[] = { { 0x80, 0x0 }, }; -static const struct reg_default wm5110_revd_patch[] = { +static const struct reg_default florida_revd_patch[] = { { 0x80, 0x3 }, { 0x80, 0x3 }, { 0x393, 0x27 }, @@ -250,28 +250,28 @@ static const struct reg_default wm5110_revd_patch[] = { }; /* We use a function so we can use ARRAY_SIZE() */ -int wm5110_patch(struct arizona *arizona) +int florida_patch(struct arizona *arizona) { switch (arizona->rev) { case 0: return regmap_register_patch(arizona->regmap, - wm5110_reva_patch, - ARRAY_SIZE(wm5110_reva_patch)); + florida_reva_patch, + ARRAY_SIZE(florida_reva_patch)); case 1: return regmap_register_patch(arizona->regmap, - wm5110_revb_patch, - ARRAY_SIZE(wm5110_revb_patch)); + florida_revb_patch, + ARRAY_SIZE(florida_revb_patch)); case 3: return regmap_register_patch(arizona->regmap, - wm5110_revd_patch, - ARRAY_SIZE(wm5110_revd_patch)); + florida_revd_patch, + ARRAY_SIZE(florida_revd_patch)); default: return 0; } } -EXPORT_SYMBOL_GPL(wm5110_patch); +EXPORT_SYMBOL_GPL(florida_patch); -static const struct regmap_irq wm5110_aod_irqs[ARIZONA_NUM_IRQ] = { +static const struct regmap_irq florida_aod_irqs[ARIZONA_NUM_IRQ] = { [ARIZONA_IRQ_MICD_CLAMP_FALL] = { .mask = ARIZONA_MICD_CLAMP_FALL_EINT1 }, @@ -284,20 +284,20 @@ static const struct regmap_irq wm5110_aod_irqs[ARIZONA_NUM_IRQ] = { [ARIZONA_IRQ_JD_RISE] = { .mask = ARIZONA_JD1_RISE_EINT1 }, }; -const struct regmap_irq_chip wm5110_aod = { - .name = "wm5110 AOD", +const struct regmap_irq_chip florida_aod = { + .name = "florida AOD", .status_base = ARIZONA_AOD_IRQ1, .mask_base = ARIZONA_AOD_IRQ_MASK_IRQ1, .ack_base = ARIZONA_AOD_IRQ1, .wake_base = ARIZONA_WAKE_CONTROL, .wake_invert = 1, .num_regs = 1, - .irqs = wm5110_aod_irqs, - .num_irqs = ARRAY_SIZE(wm5110_aod_irqs), + .irqs = florida_aod_irqs, + .num_irqs = ARRAY_SIZE(florida_aod_irqs), }; -EXPORT_SYMBOL_GPL(wm5110_aod); +EXPORT_SYMBOL_GPL(florida_aod); -static const struct regmap_irq wm5110_irqs[ARIZONA_NUM_IRQ] = { +static const struct regmap_irq florida_irqs[ARIZONA_NUM_IRQ] = { [ARIZONA_IRQ_GP4] = { .reg_offset = 0, .mask = ARIZONA_GP4_EINT1 }, [ARIZONA_IRQ_GP3] = { .reg_offset = 0, .mask = ARIZONA_GP3_EINT1 }, [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 }, @@ -434,18 +434,18 @@ static const struct regmap_irq wm5110_irqs[ARIZONA_NUM_IRQ] = { }, }; -const struct regmap_irq_chip wm5110_irq = { - .name = "wm5110 IRQ", +const struct regmap_irq_chip florida_irq = { + .name = "florida IRQ", .status_base = ARIZONA_INTERRUPT_STATUS_1, .mask_base = ARIZONA_INTERRUPT_STATUS_1_MASK, .ack_base = ARIZONA_INTERRUPT_STATUS_1, .num_regs = 5, - .irqs = wm5110_irqs, - .num_irqs = ARRAY_SIZE(wm5110_irqs), + .irqs = florida_irqs, + .num_irqs = ARRAY_SIZE(florida_irqs), }; -EXPORT_SYMBOL_GPL(wm5110_irq); +EXPORT_SYMBOL_GPL(florida_irq); -static const struct reg_default wm5110_reg_default[] = { +static const struct reg_default florida_reg_default[] = { { 0x00000008, 0x0019 }, /* R8 - Ctrl IF SPI CFG 1 */ { 0x00000009, 0x0001 }, /* R9 - Ctrl IF I2C1 CFG 1 */ { 0x0000000A, 0x0001 }, /* R10 - Ctrl IF I2C2 CFG 1 */ @@ -1375,7 +1375,7 @@ static const struct reg_default wm5110_reg_default[] = { { 0x00001404, 0x0000 }, /* R5124 - DSP4 Status 1 */ }; -static bool wm5110_is_rev_b_adsp_memory(unsigned int reg) +static bool florida_is_rev_b_adsp_memory(unsigned int reg) { if ((reg >= 0x100000 && reg < 0x103000) || (reg >= 0x180000 && reg < 0x181000) || @@ -1398,7 +1398,7 @@ static bool wm5110_is_rev_b_adsp_memory(unsigned int reg) return false; } -static bool wm5110_is_rev_d_adsp_memory(unsigned int reg) +static bool florida_is_rev_d_adsp_memory(unsigned int reg) { if ((reg >= 0x100000 && reg < 0x106000) || (reg >= 0x180000 && reg < 0x182000) || @@ -1421,19 +1421,19 @@ static bool wm5110_is_rev_d_adsp_memory(unsigned int reg) return false; } -static bool wm5110_is_adsp_memory(struct device *dev, unsigned int reg) +static bool florida_is_adsp_memory(struct device *dev, unsigned int reg) { struct arizona *arizona = dev_get_drvdata(dev); switch (arizona->rev) { case 0 ... 2: - return wm5110_is_rev_b_adsp_memory(reg); + return florida_is_rev_b_adsp_memory(reg); default: - return wm5110_is_rev_d_adsp_memory(reg); + return florida_is_rev_d_adsp_memory(reg); } } -static bool wm5110_readable_register(struct device *dev, unsigned int reg) +static bool florida_readable_register(struct device *dev, unsigned int reg) { switch (reg) { case ARIZONA_SOFTWARE_RESET: @@ -2426,11 +2426,11 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DSP4_SCRATCH_3: return true; default: - return wm5110_is_adsp_memory(dev, reg); + return florida_is_adsp_memory(dev, reg); } } -static bool wm5110_volatile_register(struct device *dev, unsigned int reg) +static bool florida_volatile_register(struct device *dev, unsigned int reg) { switch (reg) { case ARIZONA_SOFTWARE_RESET: @@ -2503,37 +2503,37 @@ static bool wm5110_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_DSP4_SCRATCH_3: return true; default: - return wm5110_is_adsp_memory(dev, reg); + return florida_is_adsp_memory(dev, reg); } } -#define WM5110_MAX_REGISTER 0x4a9fff +#define FLORIDA_MAX_REGISTER 0x4a9fff -const struct regmap_config wm5110_spi_regmap = { +const struct regmap_config florida_spi_regmap = { .reg_bits = 32, .pad_bits = 16, .val_bits = 16, - .max_register = WM5110_MAX_REGISTER, - .readable_reg = wm5110_readable_register, - .volatile_reg = wm5110_volatile_register, + .max_register = FLORIDA_MAX_REGISTER, + .readable_reg = florida_readable_register, + .volatile_reg = florida_volatile_register, .cache_type = REGCACHE_RBTREE, - .reg_defaults = wm5110_reg_default, - .num_reg_defaults = ARRAY_SIZE(wm5110_reg_default), + .reg_defaults = florida_reg_default, + .num_reg_defaults = ARRAY_SIZE(florida_reg_default), }; -EXPORT_SYMBOL_GPL(wm5110_spi_regmap); +EXPORT_SYMBOL_GPL(florida_spi_regmap); -const struct regmap_config wm5110_i2c_regmap = { +const struct regmap_config florida_i2c_regmap = { .reg_bits = 32, .val_bits = 16, - .max_register = WM5110_MAX_REGISTER, - .readable_reg = wm5110_readable_register, - .volatile_reg = wm5110_volatile_register, + .max_register = FLORIDA_MAX_REGISTER, + .readable_reg = florida_readable_register, + .volatile_reg = florida_volatile_register, .cache_type = REGCACHE_RBTREE, - .reg_defaults = wm5110_reg_default, - .num_reg_defaults = ARRAY_SIZE(wm5110_reg_default), + .reg_defaults = florida_reg_default, + .num_reg_defaults = ARRAY_SIZE(florida_reg_default), }; -EXPORT_SYMBOL_GPL(wm5110_i2c_regmap); +EXPORT_SYMBOL_GPL(florida_i2c_regmap); diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 821f757888c..f7a686cde07 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -120,7 +120,7 @@ void arizona_free_irq(struct arizona *arizona, int irq, void *data); int arizona_set_irq_wake(struct arizona *arizona, int irq, int on); int wm5102_patch(struct arizona *arizona); -int wm5110_patch(struct arizona *arizona); +int florida_patch(struct arizona *arizona); extern int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, bool mandatory, int *gpio); From da758f81adb5de75460c50f66ad4471a129eba2e Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 20 Nov 2013 17:10:54 +0000 Subject: [PATCH 0109/1167] ASoC: arizona: rename wm5110 to florida Renames support for Florida-class codecs from WM5110 to florida. Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/Kconfig | 12 +- sound/soc/codecs/Makefile | 4 +- sound/soc/codecs/arizona.c | 12 +- sound/soc/codecs/{wm5110.c => florida.c} | 492 +++++++++++------------ sound/soc/codecs/{wm5110.h => florida.h} | 14 +- 5 files changed, 269 insertions(+), 265 deletions(-) rename sound/soc/codecs/{wm5110.c => florida.c} (84%) rename sound/soc/codecs/{wm5110.h => florida.h} (60%) diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 2b28e280982..c7a250827b2 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -82,7 +82,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_WM2200 if I2C select SND_SOC_WM5100 if I2C select SND_SOC_WM5102 if MFD_WM5102 - select SND_SOC_WM5110 if MFD_WM5110 + select SND_SOC_FLORIDA if MFD_FLORIDA select SND_SOC_WM8350 if MFD_WM8350 select SND_SOC_WM8400 if MFD_WM8400 select SND_SOC_WM8510 if SND_SOC_I2C_AND_SPI @@ -142,9 +142,9 @@ config SND_SOC_88PM860X config SND_SOC_ARIZONA tristate default y if SND_SOC_WM5102=y - default y if SND_SOC_WM5110=y + default y if SND_SOC_FLORIDA=y default m if SND_SOC_WM5102=m - default m if SND_SOC_WM5110=m + default m if SND_SOC_FLORIDA=m config SND_SOC_WM_HUBS tristate @@ -154,10 +154,10 @@ config SND_SOC_WM_HUBS config SND_SOC_WM_ADSP tristate default y if SND_SOC_WM5102=y - default y if SND_SOC_WM5110=y + default y if SND_SOC_FLORIDA=y default y if SND_SOC_WM2200=y default m if SND_SOC_WM5102=m - default m if SND_SOC_WM5110=m + default m if SND_SOC_FLORIDA=m default m if SND_SOC_WM2200=m config SND_SOC_AB8500_CODEC @@ -380,7 +380,7 @@ config SND_SOC_WM5100 config SND_SOC_WM5102 tristate -config SND_SOC_WM5110 +config SND_SOC_FLORIDA tristate config SND_SOC_WM8350 diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index b9e41c9a1f4..301552c1e17 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -74,7 +74,7 @@ snd-soc-wm2000-objs := wm2000.o snd-soc-wm2200-objs := wm2200.o snd-soc-wm5100-objs := wm5100.o wm5100-tables.o snd-soc-wm5102-objs := wm5102.o -snd-soc-wm5110-objs := wm5110.o +snd-soc-florida-objs := florida.o snd-soc-wm8350-objs := wm8350.o snd-soc-wm8400-objs := wm8400.o snd-soc-wm8510-objs := wm8510.o @@ -197,7 +197,7 @@ obj-$(CONFIG_SND_SOC_WM2000) += snd-soc-wm2000.o obj-$(CONFIG_SND_SOC_WM2200) += snd-soc-wm2200.o obj-$(CONFIG_SND_SOC_WM5100) += snd-soc-wm5100.o obj-$(CONFIG_SND_SOC_WM5102) += snd-soc-wm5102.o -obj-$(CONFIG_SND_SOC_WM5110) += snd-soc-wm5110.o +obj-$(CONFIG_SND_SOC_FLORIDA) += snd-soc-florida.o obj-$(CONFIG_SND_SOC_WM8350) += snd-soc-wm8350.o obj-$(CONFIG_SND_SOC_WM8400) += snd-soc-wm8400.o obj-$(CONFIG_SND_SOC_WM8510) += snd-soc-wm8510.o diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index ad1a0f277af..5fa7793bf29 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1328,10 +1328,14 @@ struct arizona_fll_cfg { static inline int arizona_fratio_ref(struct arizona *arizona, int i) { - if (arizona->rev >= 3 && arizona->type == WM5110) - return fll_fratios[i].fratio[1]; - else - return fll_fratios[i].fratio[0]; + switch (arizona->type) { + case WM5110: + if (arizona->rev >= 3) + return fll_fratios[i].fratio[1]; + else + return fll_fratios[i].fratio[0]; + break; + } } static inline int arizona_fratio_sync(struct arizona *arizona, int i) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/florida.c similarity index 84% rename from sound/soc/codecs/wm5110.c rename to sound/soc/codecs/florida.c index 9f8afa5dbab..5e3b9260b74 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/florida.c @@ -1,5 +1,5 @@ /* - * wm5110.c -- WM5110 ALSA SoC Audio driver + * florida.c -- ALSA SoC Audio driver for Florida-class codecs * * Copyright 2012 Wolfson Microelectronics plc * @@ -31,14 +31,14 @@ #include "arizona.h" #include "wm_adsp.h" -#include "wm5110.h" +#include "florida.h" -#define WM5110_NUM_ADSP 4 +#define FLORIDA_NUM_ADSP 4 -#define WM5110_DEFAULT_FRAGMENTS 1 -#define WM5110_DEFAULT_FRAGMENT_SIZE 4096 +#define FLORIDA_DEFAULT_FRAGMENTS 1 +#define FLORIDA_DEFAULT_FRAGMENT_SIZE 4096 -struct wm5110_compr { +struct florida_compr { struct mutex lock; struct snd_compr_stream *stream; @@ -48,48 +48,48 @@ struct wm5110_compr { bool trig; }; -struct wm5110_priv { +struct florida_priv { struct arizona_priv core; struct arizona_fll fll[2]; - struct wm5110_compr compr_info; + struct florida_compr compr_info; }; -static const struct wm_adsp_region wm5110_dsp1_regions[] = { +static const struct wm_adsp_region florida_dsp1_regions[] = { { .type = WMFW_ADSP2_PM, .base = 0x100000 }, { .type = WMFW_ADSP2_ZM, .base = 0x180000 }, { .type = WMFW_ADSP2_XM, .base = 0x190000 }, { .type = WMFW_ADSP2_YM, .base = 0x1a8000 }, }; -static const struct wm_adsp_region wm5110_dsp2_regions[] = { +static const struct wm_adsp_region florida_dsp2_regions[] = { { .type = WMFW_ADSP2_PM, .base = 0x200000 }, { .type = WMFW_ADSP2_ZM, .base = 0x280000 }, { .type = WMFW_ADSP2_XM, .base = 0x290000 }, { .type = WMFW_ADSP2_YM, .base = 0x2a8000 }, }; -static const struct wm_adsp_region wm5110_dsp3_regions[] = { +static const struct wm_adsp_region florida_dsp3_regions[] = { { .type = WMFW_ADSP2_PM, .base = 0x300000 }, { .type = WMFW_ADSP2_ZM, .base = 0x380000 }, { .type = WMFW_ADSP2_XM, .base = 0x390000 }, { .type = WMFW_ADSP2_YM, .base = 0x3a8000 }, }; -static const struct wm_adsp_region wm5110_dsp4_regions[] = { +static const struct wm_adsp_region florida_dsp4_regions[] = { { .type = WMFW_ADSP2_PM, .base = 0x400000 }, { .type = WMFW_ADSP2_ZM, .base = 0x480000 }, { .type = WMFW_ADSP2_XM, .base = 0x490000 }, { .type = WMFW_ADSP2_YM, .base = 0x4a8000 }, }; -static const struct wm_adsp_region *wm5110_dsp_regions[] = { - wm5110_dsp1_regions, - wm5110_dsp2_regions, - wm5110_dsp3_regions, - wm5110_dsp4_regions, +static const struct wm_adsp_region *florida_dsp_regions[] = { + florida_dsp1_regions, + florida_dsp2_regions, + florida_dsp3_regions, + florida_dsp4_regions, }; -static const struct reg_default wm5110_sysclk_revd_patch[] = { +static const struct reg_default florida_sysclk_revd_patch[] = { { 0x3093, 0x1001 }, { 0x30E3, 0x1301 }, { 0x3133, 0x1201 }, @@ -97,7 +97,7 @@ static const struct reg_default wm5110_sysclk_revd_patch[] = { { 0x31D3, 0x1401 }, }; -static int wm5110_sysclk_ev(struct snd_soc_dapm_widget *w, +static int florida_sysclk_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { struct snd_soc_codec *codec = w->codec; @@ -108,8 +108,8 @@ static int wm5110_sysclk_ev(struct snd_soc_dapm_widget *w, switch (arizona->rev) { case 3: - patch = wm5110_sysclk_revd_patch; - patch_size = ARRAY_SIZE(wm5110_sysclk_revd_patch); + patch = florida_sysclk_revd_patch; + patch_size = ARRAY_SIZE(florida_sysclk_revd_patch); break; default: return 0; @@ -130,12 +130,12 @@ static int wm5110_sysclk_ev(struct snd_soc_dapm_widget *w, return 0; } -static int wm5110_virt_dsp_power_ev(struct snd_soc_dapm_widget *w, +static int florida_virt_dsp_power_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { - struct wm5110_priv *wm5110 = snd_soc_codec_get_drvdata(w->codec); + struct florida_priv *florida = snd_soc_codec_get_drvdata(w->codec); - wm5110->compr_info.trig = false; + florida->compr_info.trig = false; return 0; } @@ -146,7 +146,7 @@ static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); static DECLARE_TLV_DB_SCALE(noise_tlv, 0, 600, 0); static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); -#define WM5110_NG_SRC(name, base) \ +#define FLORIDA_NG_SRC(name, base) \ SOC_SINGLE(name " NG HPOUT1L Switch", base, 0, 1, 0), \ SOC_SINGLE(name " NG HPOUT1R Switch", base, 1, 1, 0), \ SOC_SINGLE(name " NG HPOUT2L Switch", base, 2, 1, 0), \ @@ -160,7 +160,7 @@ static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); SOC_SINGLE(name " NG SPKDAT2L Switch", base, 10, 1, 0), \ SOC_SINGLE(name " NG SPKDAT2R Switch", base, 11, 1, 0) -static const struct snd_kcontrol_new wm5110_snd_controls[] = { +static const struct snd_kcontrol_new florida_snd_controls[] = { SOC_ENUM("IN1 OSR", arizona_in_dmic_osr[0]), SOC_ENUM("IN2 OSR", arizona_in_dmic_osr[1]), SOC_ENUM("IN3 OSR", arizona_in_dmic_osr[2]), @@ -404,18 +404,18 @@ SOC_SINGLE_TLV("Noise Gate Threshold Volume", ARIZONA_NOISE_GATE_CONTROL, ARIZONA_NGATE_THR_SHIFT, 7, 1, ng_tlv), SOC_ENUM("Noise Gate Hold", arizona_ng_hold), -WM5110_NG_SRC("HPOUT1L", ARIZONA_NOISE_GATE_SELECT_1L), -WM5110_NG_SRC("HPOUT1R", ARIZONA_NOISE_GATE_SELECT_1R), -WM5110_NG_SRC("HPOUT2L", ARIZONA_NOISE_GATE_SELECT_2L), -WM5110_NG_SRC("HPOUT2R", ARIZONA_NOISE_GATE_SELECT_2R), -WM5110_NG_SRC("HPOUT3L", ARIZONA_NOISE_GATE_SELECT_3L), -WM5110_NG_SRC("HPOUT3R", ARIZONA_NOISE_GATE_SELECT_3R), -WM5110_NG_SRC("SPKOUTL", ARIZONA_NOISE_GATE_SELECT_4L), -WM5110_NG_SRC("SPKOUTR", ARIZONA_NOISE_GATE_SELECT_4R), -WM5110_NG_SRC("SPKDAT1L", ARIZONA_NOISE_GATE_SELECT_5L), -WM5110_NG_SRC("SPKDAT1R", ARIZONA_NOISE_GATE_SELECT_5R), -WM5110_NG_SRC("SPKDAT2L", ARIZONA_NOISE_GATE_SELECT_6L), -WM5110_NG_SRC("SPKDAT2R", ARIZONA_NOISE_GATE_SELECT_6R), +FLORIDA_NG_SRC("HPOUT1L", ARIZONA_NOISE_GATE_SELECT_1L), +FLORIDA_NG_SRC("HPOUT1R", ARIZONA_NOISE_GATE_SELECT_1R), +FLORIDA_NG_SRC("HPOUT2L", ARIZONA_NOISE_GATE_SELECT_2L), +FLORIDA_NG_SRC("HPOUT2R", ARIZONA_NOISE_GATE_SELECT_2R), +FLORIDA_NG_SRC("HPOUT3L", ARIZONA_NOISE_GATE_SELECT_3L), +FLORIDA_NG_SRC("HPOUT3R", ARIZONA_NOISE_GATE_SELECT_3R), +FLORIDA_NG_SRC("SPKOUTL", ARIZONA_NOISE_GATE_SELECT_4L), +FLORIDA_NG_SRC("SPKOUTR", ARIZONA_NOISE_GATE_SELECT_4R), +FLORIDA_NG_SRC("SPKDAT1L", ARIZONA_NOISE_GATE_SELECT_5L), +FLORIDA_NG_SRC("SPKDAT1R", ARIZONA_NOISE_GATE_SELECT_5R), +FLORIDA_NG_SRC("SPKDAT2L", ARIZONA_NOISE_GATE_SELECT_6L), +FLORIDA_NG_SRC("SPKDAT2R", ARIZONA_NOISE_GATE_SELECT_6R), ARIZONA_MIXER_CONTROLS("AIF1TX1", ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("AIF1TX2", ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE), @@ -551,55 +551,55 @@ ARIZONA_MUX_ENUMS(ISRC3DEC2, ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE); ARIZONA_MUX_ENUMS(ISRC3DEC3, ARIZONA_ISRC3DEC3MIX_INPUT_1_SOURCE); ARIZONA_MUX_ENUMS(ISRC3DEC4, ARIZONA_ISRC3DEC4MIX_INPUT_1_SOURCE); -static const char * const wm5110_dsp_output_texts[] = { +static const char * const florida_dsp_output_texts[] = { "None", "DSP3", }; -static const struct soc_enum wm5110_dsp_output_enum = - SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm5110_dsp_output_texts), - wm5110_dsp_output_texts); +static const struct soc_enum florida_dsp_output_enum = + SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(florida_dsp_output_texts), + florida_dsp_output_texts); -static const struct snd_kcontrol_new wm5110_dsp_output_mux[] = { - SOC_DAPM_ENUM_VIRT("DSP Virtual Output Mux", wm5110_dsp_output_enum), +static const struct snd_kcontrol_new florida_dsp_output_mux[] = { + SOC_DAPM_ENUM_VIRT("DSP Virtual Output Mux", florida_dsp_output_enum), }; -static const char * const wm5110_memory_mux_texts[] = { +static const char * const florida_memory_mux_texts[] = { "None", "Shared Memory", }; -static const struct soc_enum wm5110_memory_enum = - SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm5110_memory_mux_texts), - wm5110_memory_mux_texts); +static const struct soc_enum florida_memory_enum = + SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(florida_memory_mux_texts), + florida_memory_mux_texts); -static const struct snd_kcontrol_new wm5110_memory_mux[] = { - SOC_DAPM_ENUM_VIRT("DSP2 Virtual Input", wm5110_memory_enum), - SOC_DAPM_ENUM_VIRT("DSP3 Virtual Input", wm5110_memory_enum), +static const struct snd_kcontrol_new florida_memory_mux[] = { + SOC_DAPM_ENUM_VIRT("DSP2 Virtual Input", florida_memory_enum), + SOC_DAPM_ENUM_VIRT("DSP3 Virtual Input", florida_memory_enum), }; -static const char *wm5110_aec_loopback_texts[] = { +static const char *florida_aec_loopback_texts[] = { "HPOUT1L", "HPOUT1R", "HPOUT2L", "HPOUT2R", "HPOUT3L", "HPOUT3R", "SPKOUTL", "SPKOUTR", "SPKDAT1L", "SPKDAT1R", "SPKDAT2L", "SPKDAT2R", }; -static const unsigned int wm5110_aec_loopback_values[] = { +static const unsigned int florida_aec_loopback_values[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, }; -static const struct soc_enum wm5110_aec_loopback = +static const struct soc_enum florida_aec_loopback = SOC_VALUE_ENUM_SINGLE(ARIZONA_DAC_AEC_CONTROL_1, ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, - ARRAY_SIZE(wm5110_aec_loopback_texts), - wm5110_aec_loopback_texts, - wm5110_aec_loopback_values); + ARRAY_SIZE(florida_aec_loopback_texts), + florida_aec_loopback_texts, + florida_aec_loopback_values); -static const struct snd_kcontrol_new wm5110_aec_loopback_mux = - SOC_DAPM_VALUE_ENUM("AEC Loopback", wm5110_aec_loopback); +static const struct snd_kcontrol_new florida_aec_loopback_mux = + SOC_DAPM_VALUE_ENUM("AEC Loopback", florida_aec_loopback); -static const struct snd_soc_dapm_widget wm5110_dapm_widgets[] = { +static const struct snd_soc_dapm_widget florida_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT, - 0, wm5110_sysclk_ev, SND_SOC_DAPM_POST_PMU), + 0, florida_sysclk_ev, SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_SUPPLY("ASYNCCLK", ARIZONA_ASYNC_CLOCK_1, ARIZONA_ASYNC_CLK_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK, @@ -781,7 +781,7 @@ SND_SOC_DAPM_PGA("ISRC3DEC4", ARIZONA_ISRC_3_CTRL_3, SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, - &wm5110_aec_loopback_mux), + &florida_aec_loopback_mux), SND_SOC_DAPM_AIF_OUT("AIF1TX1", NULL, 0, ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX1_ENA_SHIFT, 0), @@ -987,12 +987,12 @@ ARIZONA_DSP_WIDGETS(DSP3, "DSP3"), ARIZONA_DSP_WIDGETS(DSP4, "DSP4"), SND_SOC_DAPM_VIRT_MUX("DSP2 Virtual Input", SND_SOC_NOPM, 0, 0, - &wm5110_memory_mux[0]), + &florida_memory_mux[0]), SND_SOC_DAPM_VIRT_MUX("DSP3 Virtual Input", SND_SOC_NOPM, 0, 0, - &wm5110_memory_mux[1]), + &florida_memory_mux[1]), SND_SOC_DAPM_VIRT_MUX_E("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, - &wm5110_dsp_output_mux[0], wm5110_virt_dsp_power_ev, + &florida_dsp_output_mux[0], florida_virt_dsp_power_ev, SND_SOC_DAPM_POST_PMU), ARIZONA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), @@ -1143,7 +1143,7 @@ SND_SOC_DAPM_OUTPUT("MICSUPP"), { name, "DSP4.5", "DSP4" }, \ { name, "DSP4.6", "DSP4" } -static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { +static const struct snd_soc_dapm_route florida_dapm_routes[] = { { "AIF2 Capture", NULL, "DBVDD2" }, { "AIF2 Playback", NULL, "DBVDD2" }, @@ -1425,272 +1425,272 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { { "DRC2 Signal Activity", NULL, "DRC2R" }, }; -static int wm5110_set_fll(struct snd_soc_codec *codec, int fll_id, int source, +static int florida_set_fll(struct snd_soc_codec *codec, int fll_id, int source, unsigned int Fref, unsigned int Fout) { - struct wm5110_priv *wm5110 = snd_soc_codec_get_drvdata(codec); + struct florida_priv *florida = snd_soc_codec_get_drvdata(codec); switch (fll_id) { - case WM5110_FLL1: - return arizona_set_fll(&wm5110->fll[0], source, Fref, Fout); - case WM5110_FLL2: - return arizona_set_fll(&wm5110->fll[1], source, Fref, Fout); - case WM5110_FLL1_REFCLK: - return arizona_set_fll_refclk(&wm5110->fll[0], source, Fref, + case FLORIDA_FLL1: + return arizona_set_fll(&florida->fll[0], source, Fref, Fout); + case FLORIDA_FLL2: + return arizona_set_fll(&florida->fll[1], source, Fref, Fout); + case FLORIDA_FLL1_REFCLK: + return arizona_set_fll_refclk(&florida->fll[0], source, Fref, Fout); - case WM5110_FLL2_REFCLK: - return arizona_set_fll_refclk(&wm5110->fll[1], source, Fref, + case FLORIDA_FLL2_REFCLK: + return arizona_set_fll_refclk(&florida->fll[1], source, Fref, Fout); default: return -EINVAL; } } -#define WM5110_RATES SNDRV_PCM_RATE_8000_192000 +#define FLORIDA_RATES SNDRV_PCM_RATE_8000_192000 -#define WM5110_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ +#define FLORIDA_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) -static struct snd_soc_dai_driver wm5110_dai[] = { +static struct snd_soc_dai_driver florida_dai[] = { { - .name = "wm5110-aif1", + .name = "florida-aif1", .id = 1, .base = ARIZONA_AIF1_BCLK_CTRL, .playback = { .stream_name = "AIF1 Playback", .channels_min = 1, .channels_max = 8, - .rates = WM5110_RATES, - .formats = WM5110_FORMATS, + .rates = FLORIDA_RATES, + .formats = FLORIDA_FORMATS, }, .capture = { .stream_name = "AIF1 Capture", .channels_min = 1, .channels_max = 8, - .rates = WM5110_RATES, - .formats = WM5110_FORMATS, + .rates = FLORIDA_RATES, + .formats = FLORIDA_FORMATS, }, .ops = &arizona_dai_ops, .symmetric_rates = 1, }, { - .name = "wm5110-aif2", + .name = "florida-aif2", .id = 2, .base = ARIZONA_AIF2_BCLK_CTRL, .playback = { .stream_name = "AIF2 Playback", .channels_min = 1, .channels_max = 2, - .rates = WM5110_RATES, - .formats = WM5110_FORMATS, + .rates = FLORIDA_RATES, + .formats = FLORIDA_FORMATS, }, .capture = { .stream_name = "AIF2 Capture", .channels_min = 1, .channels_max = 2, - .rates = WM5110_RATES, - .formats = WM5110_FORMATS, + .rates = FLORIDA_RATES, + .formats = FLORIDA_FORMATS, }, .ops = &arizona_dai_ops, .symmetric_rates = 1, }, { - .name = "wm5110-aif3", + .name = "florida-aif3", .id = 3, .base = ARIZONA_AIF3_BCLK_CTRL, .playback = { .stream_name = "AIF3 Playback", .channels_min = 1, .channels_max = 2, - .rates = WM5110_RATES, - .formats = WM5110_FORMATS, + .rates = FLORIDA_RATES, + .formats = FLORIDA_FORMATS, }, .capture = { .stream_name = "AIF3 Capture", .channels_min = 1, .channels_max = 2, - .rates = WM5110_RATES, - .formats = WM5110_FORMATS, + .rates = FLORIDA_RATES, + .formats = FLORIDA_FORMATS, }, .ops = &arizona_dai_ops, .symmetric_rates = 1, }, { - .name = "wm5110-slim1", + .name = "florida-slim1", .id = 4, .playback = { .stream_name = "Slim1 Playback", .channels_min = 1, .channels_max = 4, - .rates = WM5110_RATES, - .formats = WM5110_FORMATS, + .rates = FLORIDA_RATES, + .formats = FLORIDA_FORMATS, }, .capture = { .stream_name = "Slim1 Capture", .channels_min = 1, .channels_max = 4, - .rates = WM5110_RATES, - .formats = WM5110_FORMATS, + .rates = FLORIDA_RATES, + .formats = FLORIDA_FORMATS, }, .ops = &arizona_simple_dai_ops, }, { - .name = "wm5110-slim2", + .name = "florida-slim2", .id = 5, .playback = { .stream_name = "Slim2 Playback", .channels_min = 1, .channels_max = 2, - .rates = WM5110_RATES, - .formats = WM5110_FORMATS, + .rates = FLORIDA_RATES, + .formats = FLORIDA_FORMATS, }, .capture = { .stream_name = "Slim2 Capture", .channels_min = 1, .channels_max = 2, - .rates = WM5110_RATES, - .formats = WM5110_FORMATS, + .rates = FLORIDA_RATES, + .formats = FLORIDA_FORMATS, }, .ops = &arizona_simple_dai_ops, }, { - .name = "wm5110-slim3", + .name = "florida-slim3", .id = 6, .playback = { .stream_name = "Slim3 Playback", .channels_min = 1, .channels_max = 2, - .rates = WM5110_RATES, - .formats = WM5110_FORMATS, + .rates = FLORIDA_RATES, + .formats = FLORIDA_FORMATS, }, .capture = { .stream_name = "Slim3 Capture", .channels_min = 1, .channels_max = 2, - .rates = WM5110_RATES, - .formats = WM5110_FORMATS, + .rates = FLORIDA_RATES, + .formats = FLORIDA_FORMATS, }, .ops = &arizona_simple_dai_ops, }, { - .name = "wm5110-cpu-voicectrl", + .name = "florida-cpu-voicectrl", .capture = { .stream_name = "Voice Control CPU", .channels_min = 1, .channels_max = 1, - .rates = WM5110_RATES, - .formats = WM5110_FORMATS, + .rates = FLORIDA_RATES, + .formats = FLORIDA_FORMATS, }, .compress_dai = 1, }, { - .name = "wm5110-dsp-voicectrl", + .name = "florida-dsp-voicectrl", .capture = { .stream_name = "Voice Control DSP", .channels_min = 1, .channels_max = 1, - .rates = WM5110_RATES, - .formats = WM5110_FORMATS, + .rates = FLORIDA_RATES, + .formats = FLORIDA_FORMATS, }, }, }; static irqreturn_t adsp2_irq(int irq, void *data) { - struct wm5110_priv *wm5110 = data; + struct florida_priv *florida = data; int ret, avail; - mutex_lock(&wm5110->compr_info.lock); + mutex_lock(&florida->compr_info.lock); - if (wm5110->core.arizona->pdata.ez2ctrl_trigger && - !wm5110->compr_info.trig) { - wm5110->core.arizona->pdata.ez2ctrl_trigger(); - wm5110->compr_info.trig = true; + if (florida->core.arizona->pdata.ez2ctrl_trigger && + !florida->compr_info.trig) { + florida->core.arizona->pdata.ez2ctrl_trigger(); + florida->compr_info.trig = true; } - if (!wm5110->compr_info.stream) + if (!florida->compr_info.stream) goto out; - ret = wm_adsp_stream_capture(wm5110->compr_info.adsp); + ret = wm_adsp_stream_capture(florida->compr_info.adsp); if (ret < 0) { - dev_err(wm5110->core.arizona->dev, + dev_err(florida->core.arizona->dev, "Failed to capture DSP data: %d\n", ret); goto out; } - wm5110->compr_info.total_copied += ret; + florida->compr_info.total_copied += ret; - avail = wm_adsp_stream_avail(wm5110->compr_info.adsp); - if (avail > WM5110_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(wm5110->compr_info.stream); + avail = wm_adsp_stream_avail(florida->compr_info.adsp); + if (avail > FLORIDA_DEFAULT_FRAGMENT_SIZE) + snd_compr_fragment_elapsed(florida->compr_info.stream); out: - mutex_unlock(&wm5110->compr_info.lock); + mutex_unlock(&florida->compr_info.lock); return IRQ_HANDLED; } -static int wm5110_open(struct snd_compr_stream *stream) +static int florida_open(struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct wm5110_priv *wm5110 = snd_soc_codec_get_drvdata(rtd->codec); - struct arizona *arizona = wm5110->core.arizona; + struct florida_priv *florida = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = florida->core.arizona; int i, ret = 0; - mutex_lock(&wm5110->compr_info.lock); + mutex_lock(&florida->compr_info.lock); - if (wm5110->compr_info.stream) { + if (florida->compr_info.stream) { ret = -EBUSY; goto out; } - for (i = 0; i < WM5110_NUM_ADSP; ++i) { - if (wm_adsp_compress_supported(&wm5110->core.adsp[i], stream)) { - wm5110->compr_info.adsp = &wm5110->core.adsp[i]; + for (i = 0; i < FLORIDA_NUM_ADSP; ++i) { + if (wm_adsp_compress_supported(&florida->core.adsp[i], stream)) { + florida->compr_info.adsp = &florida->core.adsp[i]; break; } } - if (!wm5110->compr_info.adsp) { + if (!florida->compr_info.adsp) { dev_err(arizona->dev, "No suitable firmware for compressed stream\n"); ret = -EINVAL; goto out; } - wm5110->compr_info.stream = stream; + florida->compr_info.stream = stream; out: - mutex_unlock(&wm5110->compr_info.lock); + mutex_unlock(&florida->compr_info.lock); return ret; } -static int wm5110_free(struct snd_compr_stream *stream) +static int florida_free(struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct wm5110_priv *wm5110 = snd_soc_codec_get_drvdata(rtd->codec); + struct florida_priv *florida = snd_soc_codec_get_drvdata(rtd->codec); - mutex_lock(&wm5110->compr_info.lock); + mutex_lock(&florida->compr_info.lock); - wm5110->compr_info.stream = NULL; - wm5110->compr_info.total_copied = 0; - wm5110->compr_info.trig = false; + florida->compr_info.stream = NULL; + florida->compr_info.total_copied = 0; + florida->compr_info.trig = false; - wm_adsp_stream_free(wm5110->compr_info.adsp); + wm_adsp_stream_free(florida->compr_info.adsp); - mutex_unlock(&wm5110->compr_info.lock); + mutex_unlock(&florida->compr_info.lock); return 0; } -static int wm5110_set_params(struct snd_compr_stream *stream, +static int florida_set_params(struct snd_compr_stream *stream, struct snd_compr_params *params) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct wm5110_priv *wm5110 = snd_soc_codec_get_drvdata(rtd->codec); - struct arizona *arizona = wm5110->core.arizona; - struct wm5110_compr *compr = &wm5110->compr_info; + struct florida_priv *florida = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = florida->core.arizona; + struct florida_compr *compr = &florida->compr_info; int ret = 0; mutex_lock(&compr->lock); @@ -1713,23 +1713,23 @@ static int wm5110_set_params(struct snd_compr_stream *stream, return ret; } -static int wm5110_get_params(struct snd_compr_stream *stream, +static int florida_get_params(struct snd_compr_stream *stream, struct snd_codec *params) { return 0; } -static int wm5110_trigger(struct snd_compr_stream *stream, int cmd) +static int florida_trigger(struct snd_compr_stream *stream, int cmd) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct wm5110_priv *wm5110 = snd_soc_codec_get_drvdata(rtd->codec); + struct florida_priv *florida = snd_soc_codec_get_drvdata(rtd->codec); int ret = 0; - mutex_lock(&wm5110->compr_info.lock); + mutex_lock(&florida->compr_info.lock); switch (cmd) { case SNDRV_PCM_TRIGGER_START: - ret = wm_adsp_stream_start(wm5110->compr_info.adsp); + ret = wm_adsp_stream_start(florida->compr_info.adsp); break; case SNDRV_PCM_TRIGGER_STOP: break; @@ -1738,76 +1738,76 @@ static int wm5110_trigger(struct snd_compr_stream *stream, int cmd) break; } - mutex_unlock(&wm5110->compr_info.lock); + mutex_unlock(&florida->compr_info.lock); return ret; } -static int wm5110_pointer(struct snd_compr_stream *stream, +static int florida_pointer(struct snd_compr_stream *stream, struct snd_compr_tstamp *tstamp) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct wm5110_priv *wm5110 = snd_soc_codec_get_drvdata(rtd->codec); + struct florida_priv *florida = snd_soc_codec_get_drvdata(rtd->codec); - mutex_lock(&wm5110->compr_info.lock); + mutex_lock(&florida->compr_info.lock); tstamp->byte_offset = 0; - tstamp->copied_total = wm5110->compr_info.total_copied; - mutex_unlock(&wm5110->compr_info.lock); + tstamp->copied_total = florida->compr_info.total_copied; + mutex_unlock(&florida->compr_info.lock); return 0; } -static int wm5110_copy(struct snd_compr_stream *stream, char __user *buf, +static int florida_copy(struct snd_compr_stream *stream, char __user *buf, size_t count) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct wm5110_priv *wm5110 = snd_soc_codec_get_drvdata(rtd->codec); + struct florida_priv *florida = snd_soc_codec_get_drvdata(rtd->codec); int ret; - mutex_lock(&wm5110->compr_info.lock); + mutex_lock(&florida->compr_info.lock); if (stream->direction == SND_COMPRESS_PLAYBACK) ret = -EINVAL; else - ret = wm_adsp_stream_read(wm5110->compr_info.adsp, buf, count); + ret = wm_adsp_stream_read(florida->compr_info.adsp, buf, count); - mutex_unlock(&wm5110->compr_info.lock); + mutex_unlock(&florida->compr_info.lock); return ret; } -static int wm5110_get_caps(struct snd_compr_stream *stream, +static int florida_get_caps(struct snd_compr_stream *stream, struct snd_compr_caps *caps) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct wm5110_priv *wm5110 = snd_soc_codec_get_drvdata(rtd->codec); + struct florida_priv *florida = snd_soc_codec_get_drvdata(rtd->codec); - mutex_lock(&wm5110->compr_info.lock); + mutex_lock(&florida->compr_info.lock); memset(caps, 0, sizeof(*caps)); caps->direction = stream->direction; - caps->min_fragment_size = WM5110_DEFAULT_FRAGMENT_SIZE; - caps->max_fragment_size = WM5110_DEFAULT_FRAGMENT_SIZE; - caps->min_fragments = WM5110_DEFAULT_FRAGMENTS; - caps->max_fragments = WM5110_DEFAULT_FRAGMENTS; + caps->min_fragment_size = FLORIDA_DEFAULT_FRAGMENT_SIZE; + caps->max_fragment_size = FLORIDA_DEFAULT_FRAGMENT_SIZE; + caps->min_fragments = FLORIDA_DEFAULT_FRAGMENTS; + caps->max_fragments = FLORIDA_DEFAULT_FRAGMENTS; - wm_adsp_get_caps(wm5110->compr_info.adsp, stream, caps); + wm_adsp_get_caps(florida->compr_info.adsp, stream, caps); - mutex_unlock(&wm5110->compr_info.lock); + mutex_unlock(&florida->compr_info.lock); return 0; } -static int wm5110_get_codec_caps(struct snd_compr_stream *stream, +static int florida_get_codec_caps(struct snd_compr_stream *stream, struct snd_compr_codec_caps *codec) { return 0; } -static int wm5110_codec_probe(struct snd_soc_codec *codec) +static int florida_codec_probe(struct snd_soc_codec *codec) { - struct wm5110_priv *priv = snd_soc_codec_get_drvdata(codec); + struct florida_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; int ret; @@ -1858,9 +1858,9 @@ static int wm5110_codec_probe(struct snd_soc_codec *codec) return 0; } -static int wm5110_codec_remove(struct snd_soc_codec *codec) +static int florida_codec_remove(struct snd_soc_codec *codec) { - struct wm5110_priv *priv = snd_soc_codec_get_drvdata(codec); + struct florida_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; irq_set_irq_wake(arizona->irq, 0); @@ -1874,9 +1874,9 @@ static int wm5110_codec_remove(struct snd_soc_codec *codec) return 0; } -#define WM5110_DIG_VU 0x0200 +#define FLORIDA_DIG_VU 0x0200 -static unsigned int wm5110_digital_vu[] = { +static unsigned int florida_digital_vu[] = { ARIZONA_DAC_DIGITAL_VOLUME_1L, ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_DAC_DIGITAL_VOLUME_2L, @@ -1891,87 +1891,87 @@ static unsigned int wm5110_digital_vu[] = { ARIZONA_DAC_DIGITAL_VOLUME_6R, }; -static struct snd_soc_codec_driver soc_codec_dev_wm5110 = { - .probe = wm5110_codec_probe, - .remove = wm5110_codec_remove, +static struct snd_soc_codec_driver soc_codec_dev_florida = { + .probe = florida_codec_probe, + .remove = florida_codec_remove, .idle_bias_off = true, .set_sysclk = arizona_set_sysclk, - .set_pll = wm5110_set_fll, - - .controls = wm5110_snd_controls, - .num_controls = ARRAY_SIZE(wm5110_snd_controls), - .dapm_widgets = wm5110_dapm_widgets, - .num_dapm_widgets = ARRAY_SIZE(wm5110_dapm_widgets), - .dapm_routes = wm5110_dapm_routes, - .num_dapm_routes = ARRAY_SIZE(wm5110_dapm_routes), + .set_pll = florida_set_fll, + + .controls = florida_snd_controls, + .num_controls = ARRAY_SIZE(florida_snd_controls), + .dapm_widgets = florida_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(florida_dapm_widgets), + .dapm_routes = florida_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(florida_dapm_routes), }; -static struct snd_compr_ops wm5110_compr_ops = { - .open = wm5110_open, - .free = wm5110_free, - .set_params = wm5110_set_params, - .get_params = wm5110_get_params, - .trigger = wm5110_trigger, - .pointer = wm5110_pointer, - .copy = wm5110_copy, - .get_caps = wm5110_get_caps, - .get_codec_caps = wm5110_get_codec_caps, +static struct snd_compr_ops florida_compr_ops = { + .open = florida_open, + .free = florida_free, + .set_params = florida_set_params, + .get_params = florida_get_params, + .trigger = florida_trigger, + .pointer = florida_pointer, + .copy = florida_copy, + .get_caps = florida_get_caps, + .get_codec_caps = florida_get_codec_caps, }; -static struct snd_soc_platform_driver wm5110_compr_platform = { - .compr_ops = &wm5110_compr_ops, +static struct snd_soc_platform_driver florida_compr_platform = { + .compr_ops = &florida_compr_ops, }; -static int wm5110_probe(struct platform_device *pdev) +static int florida_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); - struct wm5110_priv *wm5110; + struct florida_priv *florida; int i, ret; - wm5110 = devm_kzalloc(&pdev->dev, sizeof(struct wm5110_priv), + florida = devm_kzalloc(&pdev->dev, sizeof(struct florida_priv), GFP_KERNEL); - if (wm5110 == NULL) + if (florida == NULL) return -ENOMEM; - platform_set_drvdata(pdev, wm5110); + platform_set_drvdata(pdev, florida); /* Set of_node to parent from the SPI device to allow DAPM to * locate regulator supplies */ pdev->dev.of_node = arizona->dev->of_node; - mutex_init(&wm5110->compr_info.lock); + mutex_init(&florida->compr_info.lock); - wm5110->core.arizona = arizona; - wm5110->core.num_inputs = 8; + florida->core.arizona = arizona; + florida->core.num_inputs = 8; - for (i = 0; i < WM5110_NUM_ADSP; i++) { - wm5110->core.adsp[i].part = "wm5110"; - wm5110->core.adsp[i].num = i + 1; - wm5110->core.adsp[i].type = WMFW_ADSP2; - wm5110->core.adsp[i].dev = arizona->dev; - wm5110->core.adsp[i].regmap = arizona->regmap; + for (i = 0; i < FLORIDA_NUM_ADSP; i++) { + florida->core.adsp[i].part = "florida"; + florida->core.adsp[i].num = i + 1; + florida->core.adsp[i].type = WMFW_ADSP2; + florida->core.adsp[i].dev = arizona->dev; + florida->core.adsp[i].regmap = arizona->regmap; - wm5110->core.adsp[i].base = ARIZONA_DSP1_CONTROL_1 + florida->core.adsp[i].base = ARIZONA_DSP1_CONTROL_1 + (0x100 * i); - wm5110->core.adsp[i].mem = wm5110_dsp_regions[i]; - wm5110->core.adsp[i].num_mems - = ARRAY_SIZE(wm5110_dsp1_regions); + florida->core.adsp[i].mem = florida_dsp_regions[i]; + florida->core.adsp[i].num_mems + = ARRAY_SIZE(florida_dsp1_regions); - ret = wm_adsp2_init(&wm5110->core.adsp[i], false); + ret = wm_adsp2_init(&florida->core.adsp[i], false); if (ret != 0) return ret; } - for (i = 0; i < ARRAY_SIZE(wm5110->fll); i++) - wm5110->fll[i].vco_mult = 3; + for (i = 0; i < ARRAY_SIZE(florida->fll); i++) + florida->fll[i].vco_mult = 3; arizona_init_fll(arizona, 1, ARIZONA_FLL1_CONTROL_1 - 1, ARIZONA_IRQ_FLL1_LOCK, ARIZONA_IRQ_FLL1_CLOCK_OK, - &wm5110->fll[0]); + &florida->fll[0]); arizona_init_fll(arizona, 2, ARIZONA_FLL2_CONTROL_1 - 1, ARIZONA_IRQ_FLL2_LOCK, ARIZONA_IRQ_FLL2_CLOCK_OK, - &wm5110->fll[1]); + &florida->fll[1]); /* SR2 fixed at 8kHz, SR3 fixed at 16kHz */ regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_2, @@ -1979,18 +1979,18 @@ static int wm5110_probe(struct platform_device *pdev) regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_3, ARIZONA_SAMPLE_RATE_3_MASK, 0x12); - for (i = 0; i < ARRAY_SIZE(wm5110_dai); i++) - arizona_init_dai(&wm5110->core, i); + for (i = 0; i < ARRAY_SIZE(florida_dai); i++) + arizona_init_dai(&florida->core, i); /* Latch volume update bits */ - for (i = 0; i < ARRAY_SIZE(wm5110_digital_vu); i++) - regmap_update_bits(arizona->regmap, wm5110_digital_vu[i], - WM5110_DIG_VU, WM5110_DIG_VU); + for (i = 0; i < ARRAY_SIZE(florida_digital_vu); i++) + regmap_update_bits(arizona->regmap, florida_digital_vu[i], + FLORIDA_DIG_VU, FLORIDA_DIG_VU); pm_runtime_enable(&pdev->dev); pm_runtime_idle(&pdev->dev); - ret = snd_soc_register_platform(&pdev->dev, &wm5110_compr_platform); + ret = snd_soc_register_platform(&pdev->dev, &florida_compr_platform); if (ret < 0) { dev_err(&pdev->dev, "Failed to register platform: %d\n", @@ -1998,8 +1998,8 @@ static int wm5110_probe(struct platform_device *pdev) goto error; } - ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_wm5110, - wm5110_dai, ARRAY_SIZE(wm5110_dai)); + ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_florida, + florida_dai, ARRAY_SIZE(florida_dai)); if (ret < 0) { dev_err(&pdev->dev, "Failed to register codec: %d\n", @@ -2011,7 +2011,7 @@ static int wm5110_probe(struct platform_device *pdev) return ret; } -static int wm5110_remove(struct platform_device *pdev) +static int florida_remove(struct platform_device *pdev) { snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); @@ -2019,18 +2019,18 @@ static int wm5110_remove(struct platform_device *pdev) return 0; } -static struct platform_driver wm5110_codec_driver = { +static struct platform_driver florida_codec_driver = { .driver = { - .name = "wm5110-codec", + .name = "florida-codec", .owner = THIS_MODULE, }, - .probe = wm5110_probe, - .remove = wm5110_remove, + .probe = florida_probe, + .remove = florida_remove, }; -module_platform_driver(wm5110_codec_driver); +module_platform_driver(florida_codec_driver); -MODULE_DESCRIPTION("ASoC WM5110 driver"); +MODULE_DESCRIPTION("ASoC Florida driver"); MODULE_AUTHOR("Mark Brown "); MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:wm5110-codec"); +MODULE_ALIAS("platform:florida-codec"); diff --git a/sound/soc/codecs/wm5110.h b/sound/soc/codecs/florida.h similarity index 60% rename from sound/soc/codecs/wm5110.h rename to sound/soc/codecs/florida.h index e6c0cd4235c..6855d9dbd0e 100644 --- a/sound/soc/codecs/wm5110.h +++ b/sound/soc/codecs/florida.h @@ -1,5 +1,5 @@ /* - * wm5110.h -- WM5110 ALSA SoC Audio driver + * florida.h -- ALSA SoC Audio driver for Florida-class codecs * * Copyright 2012 Wolfson Microelectronics plc * @@ -10,14 +10,14 @@ * published by the Free Software Foundation. */ -#ifndef _WM5110_H -#define _WM5110_H +#ifndef _FLORIDA_H +#define _FLORIDA_H #include "arizona.h" -#define WM5110_FLL1 1 -#define WM5110_FLL2 2 -#define WM5110_FLL1_REFCLK 3 -#define WM5110_FLL2_REFCLK 4 +#define FLORIDA_FLL1 1 +#define FLORIDA_FLL2 2 +#define FLORIDA_FLL1_REFCLK 3 +#define FLORIDA_FLL2_REFCLK 4 #endif From b4ca0e38e7a022d38463e6fa5c1bc52aadc82a91 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 21 Nov 2013 14:21:04 +0000 Subject: [PATCH 0110/1167] mfd: arizona: Add support for WM8280 Signed-off-by: Richard Fitzgerald --- drivers/mfd/Kconfig | 1 + drivers/mfd/arizona-core.c | 16 ++++++++++++++-- drivers/mfd/arizona-i2c.c | 2 ++ drivers/mfd/arizona-irq.c | 1 + drivers/mfd/arizona-spi.c | 2 ++ include/linux/mfd/arizona/core.h | 1 + 6 files changed, 21 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 57052cd430b..65f94d8d495 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1045,6 +1045,7 @@ config MFD_FLORIDA depends on MFD_ARIZONA help Support for Wolfson Microelectronics Florida class low power audio SoC + such as the WM8280 config MFD_WM8400 bool "Wolfson Microelectronics WM8400" diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 19c844fc867..1389c27d476 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -363,6 +363,7 @@ static int arizona_runtime_resume(struct device *dev) switch (arizona->type) { case WM5110: + case WM8280: if (arizona->rev == 3) { ret = arizona_soft_reset(arizona); if (ret != 0) @@ -757,6 +758,7 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) const struct of_device_id arizona_of_match[] = { { .compatible = "wlf,wm5102", .data = (void *)WM5102 }, + { .compatible = "wlf,wm8280", .data = (void *)WM8280 }, { .compatible = "wlf,wm5110", .data = (void *)WM5110 }, {}, }; @@ -797,6 +799,7 @@ int arizona_dev_init(struct arizona *arizona) unsigned int reg, val; int (*apply_patch)(struct arizona *) = NULL; int ret, i; + char revision_char; dev_set_drvdata(arizona->dev, arizona); mutex_init(&arizona->clk_lock); @@ -812,6 +815,7 @@ int arizona_dev_init(struct arizona *arizona) switch (arizona->type) { case WM5102: case WM5110: + case WM8280: for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) arizona->core_supplies[i].supply = wm5102_core_supplies[i]; @@ -955,19 +959,26 @@ int arizona_dev_init(struct arizona *arizona) } apply_patch = wm5102_patch; arizona->rev &= 0x7; + revision_char = arizona->rev + 'A'; break; #endif #ifdef CONFIG_MFD_FLORIDA case 0x5110: switch (arizona->type) { + case WM8280: + type_name = "WM8280"; + revision_char = arizona->rev + 61; + break; + case WM5110: type_name = "WM5110"; + revision_char = arizona->rev + 'A'; break; default: dev_err(arizona->dev, "Florida codec registered as %d\n", arizona->type); - arizona->type = WM5110; + arizona->type = WM8280; break; } apply_patch = florida_patch; @@ -978,7 +989,7 @@ int arizona_dev_init(struct arizona *arizona) goto err_reset; } - dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); + dev_info(dev, "%s revision %c\n", type_name, revision_char); if (apply_patch) { ret = apply_patch(arizona); @@ -1135,6 +1146,7 @@ int arizona_dev_init(struct arizona *arizona) ret = mfd_add_devices(arizona->dev, -1, wm5102_devs, ARRAY_SIZE(wm5102_devs), NULL, 0, NULL); break; + case WM8280: case WM5110: ret = mfd_add_devices(arizona->dev, -1, florida_devs, ARRAY_SIZE(florida_devs), NULL, 0, NULL); diff --git a/drivers/mfd/arizona-i2c.c b/drivers/mfd/arizona-i2c.c index 786bd1ab671..391b7c5a416 100644 --- a/drivers/mfd/arizona-i2c.c +++ b/drivers/mfd/arizona-i2c.c @@ -41,6 +41,7 @@ static int arizona_i2c_probe(struct i2c_client *i2c, break; #endif #ifdef CONFIG_MFD_FLORIDA + case WM8280: case WM5110: regmap_config = &florida_i2c_regmap; break; @@ -79,6 +80,7 @@ static int arizona_i2c_remove(struct i2c_client *i2c) static const struct i2c_device_id arizona_i2c_id[] = { { "wm5102", WM5102 }, + { "wm8280", WM8280 }, { "wm5110", WM5110 }, { } }; diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index b44d8f7d703..ea92f117316 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -201,6 +201,7 @@ int arizona_irq_init(struct arizona *arizona) break; #endif #ifdef CONFIG_MFD_FLORIDA + case WM8280: case WM5110: aod = &florida_aod; irq = &florida_irq; diff --git a/drivers/mfd/arizona-spi.c b/drivers/mfd/arizona-spi.c index 8dd5f1a8a48..bc1ea185a4e 100644 --- a/drivers/mfd/arizona-spi.c +++ b/drivers/mfd/arizona-spi.c @@ -41,6 +41,7 @@ static int arizona_spi_probe(struct spi_device *spi) break; #endif #ifdef CONFIG_MFD_FLORIDA + case WM8280: case WM5110: regmap_config = &florida_spi_regmap; break; @@ -79,6 +80,7 @@ static int arizona_spi_remove(struct spi_device *spi) static const struct spi_device_id arizona_spi_ids[] = { { "wm5102", WM5102 }, + { "wm8280", WM8280 }, { "wm5110", WM5110 }, { }, }; diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index f7a686cde07..ff3f975058d 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -23,6 +23,7 @@ enum arizona_type { WM5102 = 1, WM5110 = 2, + WM8280 = 4 }; #define ARIZONA_IRQ_GP1 0 From f265956602dfcfe9848c4897b1a6e9f20ad2e926 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 21 Nov 2013 14:23:00 +0000 Subject: [PATCH 0111/1167] gpio: arizona: Add support for WM8280 Signed-off-by: Richard Fitzgerald --- drivers/gpio/gpio-arizona.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpio/gpio-arizona.c b/drivers/gpio/gpio-arizona.c index 058df2579ed..2a9d2c3dad1 100644 --- a/drivers/gpio/gpio-arizona.c +++ b/drivers/gpio/gpio-arizona.c @@ -115,6 +115,7 @@ static int arizona_gpio_probe(struct platform_device *pdev) switch (arizona->type) { case WM5102: + case WM8280: case WM5110: arizona_gpio->gpio_chip.ngpio = 5; break; From aa8ab7ed24ff1999e9421711d0c89ab6281b6efd Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 21 Nov 2013 14:26:02 +0000 Subject: [PATCH 0112/1167] ASoC: arizona: Add support for WM8280 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 5fa7793bf29..f46a47db466 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -231,6 +231,7 @@ int arizona_init_gpio(struct snd_soc_codec *codec) int i; switch (arizona->type) { + case WM8280: case WM5110: snd_soc_dapm_disable_pin(&codec->dapm, "DRC2 Signal Activity"); break; @@ -1329,6 +1330,7 @@ struct arizona_fll_cfg { static inline int arizona_fratio_ref(struct arizona *arizona, int i) { switch (arizona->type) { + case WM8280: case WM5110: if (arizona->rev >= 3) return fll_fratios[i].fratio[1]; From e1888c75511f136161e6c124de75aa3aff3b7181 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 21 Nov 2013 14:28:55 +0000 Subject: [PATCH 0113/1167] switch: arizona: Add support for WM8280 Signed-off-by: Richard Fitzgerald --- drivers/switch/switch-arizona.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index b56960996de..eb9e83b0618 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -146,6 +146,7 @@ static void arizona_extcon_do_magic(struct arizona_extcon_info *info, int ret; switch (arizona->type) { + case WM8280: case WM5110: mask = 0x0007; if (magic) @@ -1215,6 +1216,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; } break; + case WM8280: case WM5110: switch (arizona->rev) { case 0 ... 2: From 9b87e9fc0136375a48498bd59c7635f23b247c44 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 21 Nov 2013 15:44:55 +0000 Subject: [PATCH 0114/1167] extcon: arizona: Add support for WM8280 Signed-off-by: Richard Fitzgerald --- drivers/extcon/extcon-arizona.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 202ec8e747b..904e62f6d7e 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -158,6 +158,7 @@ static void arizona_extcon_do_magic(struct arizona_extcon_info *info, int ret; switch (arizona->type) { + case WM8280: case WM5110: mask = 0x0007; if (magic) @@ -1275,6 +1276,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; } break; + case WM8280: case WM5110: switch (arizona->rev) { case 0 ... 2: From 9f043d66e348657e051a86d9e9618cf88ee1b9cd Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 4 Oct 2013 09:54:31 +0100 Subject: [PATCH 0115/1167] ASoC: arizona: Set FLL to free-run before disabling Change-Id: I82f0373a67ae789cf6d521d2e86acaed8e90a0c8 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index f46a47db466..44437345aa4 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1559,6 +1559,8 @@ static void arizona_enable_fll(struct arizona_fll *fll, /* Clear any pending completions */ try_wait_for_completion(&fll->ok); + regmap_update_bits(arizona->regmap, fll->base + 1, + ARIZONA_FLL1_FREERUN, 0); regmap_update_bits(arizona->regmap, fll->base + 1, ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA); if (use_sync) @@ -1577,6 +1579,8 @@ static void arizona_disable_fll(struct arizona_fll *fll) struct arizona *arizona = fll->arizona; bool change; + regmap_update_bits(arizona->regmap, fll->base + 1, + ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN); regmap_update_bits_check(arizona->regmap, fll->base + 1, ARIZONA_FLL1_ENA, 0, &change); regmap_update_bits(arizona->regmap, fll->base + 0x11, From b09257859af42f0eafff04075318820a864e3c4f Mon Sep 17 00:00:00 2001 From: Dimitris Papastamos Date: Fri, 1 Nov 2013 15:20:43 +0000 Subject: [PATCH 0116/1167] ASoC: wm_adsp: Add support for algorithm and coefficient blocks Change-Id: Idc10a3e5d1b45009156172a925d1a2f3827241a5 Signed-off-by: Dimitris Papastamos --- sound/soc/codecs/wm_adsp.c | 463 +++++++++++++++++++++++++++---------- sound/soc/codecs/wm_adsp.h | 2 + sound/soc/codecs/wmfw.h | 37 ++- 3 files changed, 379 insertions(+), 123 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 28e48d1a842..9408ef4989b 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -348,6 +348,9 @@ struct wm_coeff_ctl { struct snd_kcontrol *kcontrol; }; +static int wm_adsp_create_grouped_control(struct wm_adsp *dsp, + struct wm_adsp_alg_region *region); + static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { @@ -497,6 +500,7 @@ static int wm_coeff_write_control(struct snd_kcontrol *kcontrol, reg = ctl->region.base; reg = wm_adsp_region_to_reg(mem, reg); + reg += ctl->region.offset; scratch = kmemdup(buf, ctl->len, GFP_KERNEL | GFP_DMA); if (!scratch) @@ -553,6 +557,7 @@ static int wm_coeff_read_control(struct snd_kcontrol *kcontrol, reg = ctl->region.base; reg = wm_adsp_region_to_reg(mem, reg); + reg += ctl->region.offset; scratch = kmalloc(ctl->len, GFP_KERNEL | GFP_DMA); if (!scratch) @@ -626,6 +631,113 @@ static int wmfw_add_ctl(struct wm_adsp *adsp, struct wm_coeff_ctl *ctl) return ret; } +static void wm_adsp2_dump_alg_data(const struct wm_adsp *dsp, + const struct wmfw_adsp2_alg_data *blk) +{ + adsp_dbg(dsp, "Algorithm ID: %#x\n", le32_to_cpu(blk->id)); + adsp_dbg(dsp, "Algorithm name: %s\n", blk->name); + adsp_dbg(dsp, "Algorithm description: %s\n", blk->descr); + adsp_dbg(dsp, "# of coefficient descriptors: %#x\n", + le32_to_cpu(blk->ncoeff)); +} + +static void wm_adsp2_dump_coeff_data_hdr(const struct wm_adsp *dsp, + const struct wmfw_adsp2_coeff_data_hdr *hdr) +{ + int offset, type; + + offset = le32_to_cpu(hdr->offset) & 0xffff; + type = (le32_to_cpu(hdr->type) >> 16) & 0xffff; + adsp_dbg(dsp, "\tCoefficient type: %#x\n", type); + adsp_dbg(dsp, "\tCoefficient offset: %#x\n", offset); + adsp_dbg(dsp, "\tCoefficient size: %#x\n", le32_to_cpu(hdr->size)); + +} + +static void wm_adsp2_dump_coeff_data(const struct wm_adsp *dsp, + const struct wmfw_adsp2_coeff_data *blk) +{ + adsp_dbg(dsp, "\tCoefficient name: %s\n", blk->name); + adsp_dbg(dsp, "\tCoefficient description: %s\n", blk->descr); + adsp_dbg(dsp, "\tALSA control type: %#x\n", le32_to_cpu(blk->type)); + adsp_dbg(dsp, "\tALSA control len: %#x\n", le32_to_cpu(blk->len)); +} + +static struct wmfw_adsp2_coeff_data_hdr *inc_coeff_hdr(struct wmfw_adsp2_coeff_data_hdr *hdr) +{ + return (void *)(u8 *)hdr + sizeof(*hdr) + hdr->size; +} + +static struct wmfw_adsp2_coeff_data *inc_coeff_blk(struct wmfw_adsp2_coeff_data_hdr *hdr) +{ + return (void *)(u8 *)hdr + sizeof(*hdr); +} + +static int wm_adsp_parse_coeff(struct wm_adsp *dsp, + const struct wmfw_region *region) +{ + struct wm_adsp_alg_region *alg_region; + const struct wmfw_adsp2_alg_data *alg_blk; + struct wmfw_adsp2_coeff_data_hdr *coeff_hdr; + struct wmfw_adsp2_coeff_data *coeff_blk; + int type, offset; + size_t len; + int i; + + alg_blk = (const struct wmfw_adsp2_alg_data *)region->data; + wm_adsp2_dump_alg_data(dsp, alg_blk); + + coeff_hdr = (void *)alg_blk->data; + coeff_blk = inc_coeff_blk(coeff_hdr); + for (i = 0; i < alg_blk->ncoeff; i++) { + wm_adsp2_dump_coeff_data_hdr(dsp, coeff_hdr); + wm_adsp2_dump_coeff_data(dsp, coeff_blk); + + switch (coeff_blk->type) { + case SNDRV_CTL_ELEM_TYPE_BYTES: + break; + default: + adsp_err(dsp, "Unknown control type: %d\n", + coeff_blk->type); + return -EINVAL; + } + + type = (le32_to_cpu(coeff_hdr->type) >> 16) & 0xffff; + offset = le32_to_cpu(coeff_hdr->offset) & 0xffff; + len = le32_to_cpu(coeff_blk->len); + + switch (type) { + case WMFW_ADSP1_DM: + case WMFW_ADSP1_ZM: + case WMFW_ADSP2_PM: + case WMFW_ADSP2_XM: + case WMFW_ADSP2_YM: + break; + default: + adsp_err(dsp, "Unknown region type: %d\n", type); + return -EINVAL; + } + + alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); + if (!alg_region) + return -ENOMEM; + + alg_region->type = type; + alg_region->offset = offset; + alg_region->alg = le32_to_cpu(alg_blk->id); + if (!len) + alg_region->len = 512; + else + alg_region->len = len; + list_add_tail(&alg_region->list, &dsp->alg_regions); + + coeff_hdr = inc_coeff_hdr(coeff_hdr); + coeff_blk = inc_coeff_blk(coeff_hdr); + } + + return 0; +} + static int wm_adsp_load(struct wm_adsp *dsp) { LIST_HEAD(buf_list); @@ -674,11 +786,12 @@ static int wm_adsp_load(struct wm_adsp *dsp) goto out_fw; } - if (header->ver != 0) { + if (header->ver > 1) { adsp_err(dsp, "%s: unknown file format %d\n", file, header->ver); goto out_fw; } + dsp->fw_ver = header->ver; if (header->core != dsp->type) { adsp_err(dsp, "%s: invalid core %d != %d\n", @@ -736,7 +849,7 @@ static int wm_adsp_load(struct wm_adsp *dsp) offset = le32_to_cpu(region->offset) & 0xffffff; type = be32_to_cpu(region->type) & 0xff; mem = wm_adsp_find_region(dsp, type); - + switch (type) { case WMFW_NAME_TEXT: region_name = "Firmware name"; @@ -752,6 +865,12 @@ static int wm_adsp_load(struct wm_adsp *dsp) region_name = "Absolute"; reg = offset; break; + case WMFW_ALGORITHM_DATA: + region_name = "Algorithm"; + ret = wm_adsp_parse_coeff(dsp, region); + if (ret != 0) + goto out_fw; + break; case WMFW_ADSP1_PM: BUG_ON(!mem); region_name = "PM"; @@ -1026,13 +1145,70 @@ static int wm_adsp_create_grouped_control(struct wm_adsp *dsp, return 0; } +static int wm_adsp1_fixup_region_base(struct wm_adsp *dsp, + struct wmfw_adsp1_alg_hdr *hdr) +{ + int adsp1_region_types[] = { WMFW_ADSP1_ZM, WMFW_ADSP1_DM }; + struct wm_adsp_alg_region *region; + int i; + + for (i = 0; i < ARRAY_SIZE(adsp1_region_types); i++) { + list_for_each_entry(region, &dsp->alg_regions, list) { + if (region->alg == be32_to_cpu(hdr->alg.id) + && region->type == adsp1_region_types[i]) { + switch (region->type) { + case WMFW_ADSP1_ZM: + region->base = be32_to_cpu(hdr->zm); + break; + case WMFW_ADSP1_DM: + region->base = be32_to_cpu(hdr->dm); + break; + } + break; + } + } + } + + return 0; +} + +static int wm_adsp2_fixup_region_base(struct wm_adsp *dsp, + struct wmfw_adsp2_alg_hdr *hdr) +{ + int adsp2_region_types[] = { WMFW_ADSP2_ZM, WMFW_ADSP2_YM, WMFW_ADSP2_XM }; + struct wm_adsp_alg_region *region; + int i; + + for (i = 0; i < ARRAY_SIZE(adsp2_region_types); i++) { + list_for_each_entry(region, &dsp->alg_regions, list) { + if (region->alg == be32_to_cpu(hdr->alg.id) + && region->type == adsp2_region_types[i]) { + switch (region->type) { + case WMFW_ADSP2_ZM: + region->base = be32_to_cpu(hdr->zm); + break; + case WMFW_ADSP2_YM: + region->base = be32_to_cpu(hdr->ym); + break; + case WMFW_ADSP2_XM: + region->base = be32_to_cpu(hdr->xm); + break; + } + break; + } + } + } + + return 0; +} + static int wm_adsp_setup_algs(struct wm_adsp *dsp) { struct regmap *regmap = dsp->regmap; struct wmfw_adsp1_id_hdr adsp1_id; struct wmfw_adsp2_id_hdr adsp2_id; - struct wmfw_adsp1_alg_hdr *adsp1_alg; - struct wmfw_adsp2_alg_hdr *adsp2_alg; + struct wmfw_adsp1_alg_hdr *adsp1_alg, adsp1_alg_tmp; + struct wmfw_adsp2_alg_hdr *adsp2_alg, adsp2_alg_tmp; void *alg, *buf; struct wm_adsp_alg_region *region; const struct wm_adsp_region *mem; @@ -1080,21 +1256,34 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) be32_to_cpu(adsp1_id.fw.ver) & 0xff, algs); - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP1_ZM; - region->alg = be32_to_cpu(adsp1_id.fw.id); - region->base = be32_to_cpu(adsp1_id.zm); - list_add_tail(®ion->list, &dsp->alg_regions); + if (dsp->fw_ver > 0) { + /* Translate `wmfw_adsp1_id_hdr' to `wmfw_adsp1_alg_hdr' */ + adsp1_alg_tmp.alg.id = adsp1_id.fw.id; + adsp1_alg_tmp.alg.ver = adsp1_id.fw.ver; + adsp1_alg_tmp.zm = adsp1_id.zm; + adsp1_alg_tmp.dm = adsp1_id.dm; + wm_adsp1_fixup_region_base(dsp, &adsp1_alg_tmp); + list_for_each_entry(region, &dsp->alg_regions, list) { + if (region->alg == be32_to_cpu(adsp1_alg_tmp.alg.id)) + wm_adsp_create_grouped_control(dsp, region); + } + } else { + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP1_ZM; + region->alg = be32_to_cpu(adsp1_id.fw.id); + region->base = be32_to_cpu(adsp1_id.zm); + list_add_tail(®ion->list, &dsp->alg_regions); - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP1_DM; - region->alg = be32_to_cpu(adsp1_id.fw.id); - region->base = be32_to_cpu(adsp1_id.dm); - list_add_tail(®ion->list, &dsp->alg_regions); + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP1_DM; + region->alg = be32_to_cpu(adsp1_id.fw.id); + region->base = be32_to_cpu(adsp1_id.dm); + list_add_tail(®ion->list, &dsp->alg_regions); + } pos = sizeof(adsp1_id) / 2; term = pos + ((sizeof(*adsp1_alg) * algs) / 2); @@ -1121,29 +1310,43 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) be32_to_cpu(adsp2_id.fw.ver) & 0xff, algs); - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP2_XM; - region->alg = be32_to_cpu(adsp2_id.fw.id); - region->base = be32_to_cpu(adsp2_id.xm); - list_add_tail(®ion->list, &dsp->alg_regions); + if (dsp->fw_ver > 0) { + /* Translate `wmfw_adsp2_id_hdr' to `wmfw_adsp2_alg_hdr' */ + adsp2_alg_tmp.alg.id = adsp2_id.fw.id; + adsp2_alg_tmp.alg.ver = adsp2_id.fw.ver; + adsp2_alg_tmp.zm = adsp2_id.zm; + adsp2_alg_tmp.ym = adsp2_id.ym; + adsp2_alg_tmp.xm = adsp2_id.xm; + wm_adsp2_fixup_region_base(dsp, &adsp2_alg_tmp); + list_for_each_entry(region, &dsp->alg_regions, list) { + if (region->alg == be32_to_cpu(adsp2_alg_tmp.alg.id)) + wm_adsp_create_grouped_control(dsp, region); + } + } else { + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP2_XM; + region->alg = be32_to_cpu(adsp2_id.fw.id); + region->base = be32_to_cpu(adsp2_id.xm); + list_add_tail(®ion->list, &dsp->alg_regions); - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP2_YM; - region->alg = be32_to_cpu(adsp2_id.fw.id); - region->base = be32_to_cpu(adsp2_id.ym); - list_add_tail(®ion->list, &dsp->alg_regions); + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP2_YM; + region->alg = be32_to_cpu(adsp2_id.fw.id); + region->base = be32_to_cpu(adsp2_id.ym); + list_add_tail(®ion->list, &dsp->alg_regions); - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP2_ZM; - region->alg = be32_to_cpu(adsp2_id.fw.id); - region->base = be32_to_cpu(adsp2_id.zm); - list_add_tail(®ion->list, &dsp->alg_regions); + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP2_ZM; + region->alg = be32_to_cpu(adsp2_id.fw.id); + region->base = be32_to_cpu(adsp2_id.zm); + list_add_tail(®ion->list, &dsp->alg_regions); + } pos = sizeof(adsp2_id) / 2; term = pos + ((sizeof(*adsp2_alg) * algs) / 2); @@ -1203,40 +1406,48 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) be32_to_cpu(adsp1_alg[i].dm), be32_to_cpu(adsp1_alg[i].zm)); - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP1_DM; - region->alg = be32_to_cpu(adsp1_alg[i].alg.id); - region->base = be32_to_cpu(adsp1_alg[i].dm); - region->len = 0; - list_add_tail(®ion->list, &dsp->alg_regions); - if (i + 1 < algs) { - region->len = be32_to_cpu(adsp1_alg[i + 1].dm); - region->len -= be32_to_cpu(adsp1_alg[i].dm); - region->len *= 4; - wm_adsp_create_grouped_control(dsp, region); + if (dsp->fw_ver > 0) { + wm_adsp1_fixup_region_base(dsp, &adsp1_alg[i]); + list_for_each_entry(region, &dsp->alg_regions, list) { + if (region->alg == be32_to_cpu(adsp1_alg[i].alg.id)) + wm_adsp_create_grouped_control(dsp, region); + } } else { - adsp_warn(dsp, "Missing length info for region DM with ID %x\n", - be32_to_cpu(adsp1_alg[i].alg.id)); - } + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP1_DM; + region->alg = be32_to_cpu(adsp1_alg[i].alg.id); + region->base = be32_to_cpu(adsp1_alg[i].dm); + region->len = 0; + list_add_tail(®ion->list, &dsp->alg_regions); + if (i + 1 < algs) { + region->len = be32_to_cpu(adsp1_alg[i + 1].dm); + region->len -= be32_to_cpu(adsp1_alg[i].dm); + region->len *= 4; + wm_adsp_create_grouped_control(dsp, region); + } else { + adsp_warn(dsp, "Missing length info for region DM with ID %x\n", + be32_to_cpu(adsp1_alg[i].alg.id)); + } - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP1_ZM; - region->alg = be32_to_cpu(adsp1_alg[i].alg.id); - region->base = be32_to_cpu(adsp1_alg[i].zm); - region->len = 0; - list_add_tail(®ion->list, &dsp->alg_regions); - if (i + 1 < algs) { - region->len = be32_to_cpu(adsp1_alg[i + 1].zm); - region->len -= be32_to_cpu(adsp1_alg[i].zm); - region->len *= 4; - wm_adsp_create_grouped_control(dsp, region); - } else { - adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", - be32_to_cpu(adsp1_alg[i].alg.id)); + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP1_ZM; + region->alg = be32_to_cpu(adsp1_alg[i].alg.id); + region->base = be32_to_cpu(adsp1_alg[i].zm); + region->len = 0; + list_add_tail(®ion->list, &dsp->alg_regions); + if (i + 1 < algs) { + region->len = be32_to_cpu(adsp1_alg[i + 1].zm); + region->len -= be32_to_cpu(adsp1_alg[i].zm); + region->len *= 4; + wm_adsp_create_grouped_control(dsp, region); + } else { + adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", + be32_to_cpu(adsp1_alg[i].alg.id)); + } } break; @@ -1251,58 +1462,66 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) be32_to_cpu(adsp2_alg[i].ym), be32_to_cpu(adsp2_alg[i].zm)); - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP2_XM; - region->alg = be32_to_cpu(adsp2_alg[i].alg.id); - region->base = be32_to_cpu(adsp2_alg[i].xm); - region->len = 0; - list_add_tail(®ion->list, &dsp->alg_regions); - if (i + 1 < algs) { - region->len = be32_to_cpu(adsp2_alg[i + 1].xm); - region->len -= be32_to_cpu(adsp2_alg[i].xm); - region->len *= 4; - wm_adsp_create_grouped_control(dsp, region); + if (dsp->fw_ver > 0) { + wm_adsp2_fixup_region_base(dsp, &adsp2_alg[i]); + list_for_each_entry(region, &dsp->alg_regions, list) { + if (region->alg == be32_to_cpu(adsp2_alg[i].alg.id)) + wm_adsp_create_grouped_control(dsp, region); + } } else { - adsp_warn(dsp, "Missing length info for region XM with ID %x\n", - be32_to_cpu(adsp2_alg[i].alg.id)); - } + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP2_XM; + region->alg = be32_to_cpu(adsp2_alg[i].alg.id); + region->base = be32_to_cpu(adsp2_alg[i].xm); + region->len = 0; + list_add_tail(®ion->list, &dsp->alg_regions); + if (i + 1 < algs) { + region->len = be32_to_cpu(adsp2_alg[i + 1].xm); + region->len -= be32_to_cpu(adsp2_alg[i].xm); + region->len *= 4; + wm_adsp_create_grouped_control(dsp, region); + } else { + adsp_warn(dsp, "Missing length info for region XM with ID %x\n", + be32_to_cpu(adsp2_alg[i].alg.id)); + } - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP2_YM; - region->alg = be32_to_cpu(adsp2_alg[i].alg.id); - region->base = be32_to_cpu(adsp2_alg[i].ym); - region->len = 0; - list_add_tail(®ion->list, &dsp->alg_regions); - if (i + 1 < algs) { - region->len = be32_to_cpu(adsp2_alg[i + 1].ym); - region->len -= be32_to_cpu(adsp2_alg[i].ym); - region->len *= 4; - wm_adsp_create_grouped_control(dsp, region); - } else { - adsp_warn(dsp, "Missing length info for region YM with ID %x\n", - be32_to_cpu(adsp2_alg[i].alg.id)); - } + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP2_YM; + region->alg = be32_to_cpu(adsp2_alg[i].alg.id); + region->base = be32_to_cpu(adsp2_alg[i].ym); + region->len = 0; + list_add_tail(®ion->list, &dsp->alg_regions); + if (i + 1 < algs) { + region->len = be32_to_cpu(adsp2_alg[i + 1].ym); + region->len -= be32_to_cpu(adsp2_alg[i].ym); + region->len *= 4; + wm_adsp_create_grouped_control(dsp, region); + } else { + adsp_warn(dsp, "Missing length info for region YM with ID %x\n", + be32_to_cpu(adsp2_alg[i].alg.id)); + } - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP2_ZM; - region->alg = be32_to_cpu(adsp2_alg[i].alg.id); - region->base = be32_to_cpu(adsp2_alg[i].zm); - region->len = 0; - list_add_tail(®ion->list, &dsp->alg_regions); - if (i + 1 < algs) { - region->len = be32_to_cpu(adsp2_alg[i + 1].zm); - region->len -= be32_to_cpu(adsp2_alg[i].zm); - region->len *= 4; - wm_adsp_create_grouped_control(dsp, region); - } else { - adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", - be32_to_cpu(adsp2_alg[i].alg.id)); + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP2_ZM; + region->alg = be32_to_cpu(adsp2_alg[i].alg.id); + region->base = be32_to_cpu(adsp2_alg[i].zm); + region->len = 0; + list_add_tail(®ion->list, &dsp->alg_regions); + if (i + 1 < algs) { + region->len = be32_to_cpu(adsp2_alg[i + 1].zm); + region->len -= be32_to_cpu(adsp2_alg[i].zm); + region->len *= 4; + wm_adsp_create_grouped_control(dsp, region); + } else { + adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", + be32_to_cpu(adsp2_alg[i].alg.id)); + } } break; } @@ -1596,6 +1815,7 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, list_for_each_entry(ctl, &dsp->ctl_list, list) ctl->enabled = 0; + break; default: @@ -1652,6 +1872,9 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, unsigned int val; int ret; + /* Always default to version 0 to ensure backwards + * compatibility with older firmware images */ + dsp->fw_ver = 0; dsp->card = codec->card; switch (event) { diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index e5119de831a..5539a2a60e7 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -33,6 +33,7 @@ struct wm_adsp_alg_region { unsigned int alg; int type; unsigned int base; + unsigned int offset; size_t len; }; @@ -86,6 +87,7 @@ struct wm_adsp { int fw; bool running; + int fw_ver; struct regulator *dvfs; diff --git a/sound/soc/codecs/wmfw.h b/sound/soc/codecs/wmfw.h index ef163360a74..877ce305bfc 100644 --- a/sound/soc/codecs/wmfw.h +++ b/sound/soc/codecs/wmfw.h @@ -15,6 +15,12 @@ #include +#define WMFW_MAX_ALG_NAME 256 +#define WMFW_MAX_ALG_DESCR_NAME 256 + +#define WMFW_MAX_COEFF_NAME 256 +#define WMFW_MAX_COEFF_DESCR_NAME 256 + struct wmfw_header { char magic[4]; __le32 len; @@ -90,6 +96,30 @@ struct wmfw_adsp2_alg_hdr { __be32 ym; } __packed; +struct wmfw_adsp2_alg_data { + __le32 id; + u8 name[WMFW_MAX_ALG_NAME]; + u8 descr[WMFW_MAX_ALG_DESCR_NAME]; + __le32 ncoeff; + u8 data[]; +} __packed; + +struct wmfw_adsp2_coeff_data_hdr { + union { + __le32 type; + __le32 offset; + }; + __le32 size; +} __packed; + +struct wmfw_adsp2_coeff_data { + u8 name[WMFW_MAX_COEFF_NAME]; + u8 descr[WMFW_MAX_COEFF_DESCR_NAME]; + __le32 type; + __le32 len; + u8 data[]; +} __packed; + struct wmfw_coeff_hdr { u8 magic[4]; __le32 len; @@ -117,9 +147,10 @@ struct wmfw_coeff_item { #define WMFW_ADSP1 1 #define WMFW_ADSP2 2 -#define WMFW_ABSOLUTE 0xf0 -#define WMFW_NAME_TEXT 0xfe -#define WMFW_INFO_TEXT 0xff +#define WMFW_ABSOLUTE 0xf0 +#define WMFW_ALGORITHM_DATA 0xf2 +#define WMFW_NAME_TEXT 0xfe +#define WMFW_INFO_TEXT 0xff #define WMFW_ADSP1_PM 2 #define WMFW_ADSP1_DM 3 From 4595e554917f05de183e4081527d9c1fd5c3a41d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 25 Oct 2013 10:20:58 +0100 Subject: [PATCH 0117/1167] ASoC: wm_adsp: Coding standards fixes, mostly pointer definitions Change-Id: I0a4631da5d5bd6b82eced3f4b1cbf1e5e31474ee Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 4 ++-- sound/soc/codecs/wm_adsp.c | 28 ++++++++++++++-------------- sound/soc/codecs/wm_adsp.h | 8 ++++---- 3 files changed, 20 insertions(+), 20 deletions(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 5e3b9260b74..8ea12135981 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -42,7 +42,7 @@ struct florida_compr { struct mutex lock; struct snd_compr_stream *stream; - struct wm_adsp* adsp; + struct wm_adsp *adsp; size_t total_copied; bool trig; @@ -578,7 +578,7 @@ static const struct snd_kcontrol_new florida_memory_mux[] = { SOC_DAPM_ENUM_VIRT("DSP3 Virtual Input", florida_memory_enum), }; -static const char *florida_aec_loopback_texts[] = { +static const char * const florida_aec_loopback_texts[] = { "HPOUT1L", "HPOUT1R", "HPOUT2L", "HPOUT2R", "HPOUT3L", "HPOUT3R", "SPKOUTL", "SPKOUTR", "SPKDAT1L", "SPKDAT1R", "SPKDAT2L", "SPKDAT2R", }; diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 9408ef4989b..ec5073392be 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2165,8 +2165,8 @@ int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs) } EXPORT_SYMBOL_GPL(wm_adsp2_init); -bool wm_adsp_compress_supported(const struct wm_adsp* adsp, - const struct snd_compr_stream* stream) +bool wm_adsp_compress_supported(const struct wm_adsp *adsp, + const struct snd_compr_stream *stream) { if (adsp->fw >= 0 && adsp->fw < adsp->num_firmwares) { const struct wm_adsp_fw_defs *fw_defs = @@ -2229,10 +2229,10 @@ void wm_adsp_get_caps(const struct wm_adsp *adsp, } EXPORT_SYMBOL_GPL(wm_adsp_get_caps); -static int wm_adsp_read_data_block(struct wm_adsp* adsp, int mem_type, +static int wm_adsp_read_data_block(struct wm_adsp *adsp, int mem_type, unsigned int mem_addr, unsigned int num_words, - u32* data) + u32 *data) { struct wm_adsp_region const *region = wm_adsp_find_region(adsp, mem_type); @@ -2255,13 +2255,13 @@ static int wm_adsp_read_data_block(struct wm_adsp* adsp, int mem_type, return 0; } -static int wm_adsp_read_data_word(struct wm_adsp* adsp, int mem_type, - unsigned int mem_addr, u32* data) +static int wm_adsp_read_data_word(struct wm_adsp *adsp, int mem_type, + unsigned int mem_addr, u32 *data) { return wm_adsp_read_data_block(adsp, mem_type, mem_addr, 1, data); } -static int wm_adsp_write_data_word(struct wm_adsp* adsp, int mem_type, +static int wm_adsp_write_data_word(struct wm_adsp *adsp, int mem_type, unsigned int mem_addr, u32 data) { struct wm_adsp_region const *region = wm_adsp_find_region(adsp, @@ -2300,7 +2300,7 @@ static inline unsigned int wm_adsp_samps_to_words(const struct wm_adsp *adsp, } static inline int wm_adsp_host_buffer_read(struct wm_adsp *adsp, - unsigned int field_offset, u32* data) + unsigned int field_offset, u32 *data) { return wm_adsp_read_data_word(adsp, WMFW_ADSP2_XM, adsp->host_buf_ptr + field_offset, data); @@ -2354,7 +2354,7 @@ static void wm_adsp_extract_16bit(struct wm_adsp *adsp, int num_samps, { int i; int16_t sample; - u32* raw_buf = adsp->raw_capt_buf; + u32 *raw_buf = adsp->raw_capt_buf; int words_per_group = wm_adsp_sample_group[sizeof(int16_t)].words_per_group; @@ -2444,7 +2444,7 @@ static int wm_adsp_read_samples(struct wm_adsp *adsp, int32_t read_index, return num_samps; } -static int wm_adsp_capture_block(struct wm_adsp *adsp, int* avail) +static int wm_adsp_capture_block(struct wm_adsp *adsp, int *avail) { int last_region = adsp->firmwares[adsp->fw].caps->num_host_regions - 1; int host_size_samps = @@ -2487,15 +2487,15 @@ static int wm_adsp_capture_block(struct wm_adsp *adsp, int* avail) next_read_index = 0; ret = wm_adsp_host_buffer_write(adsp, - HOST_BUFFER_FIELD(next_read_index), - next_read_index); + HOST_BUFFER_FIELD(next_read_index), + next_read_index); if (ret < 0) return ret; return num_samps; } -int wm_adsp_stream_alloc(struct wm_adsp* adsp, +int wm_adsp_stream_alloc(struct wm_adsp *adsp, const struct snd_compr_params *params) { int ret; @@ -2554,7 +2554,7 @@ int wm_adsp_stream_alloc(struct wm_adsp* adsp, } EXPORT_SYMBOL_GPL(wm_adsp_stream_alloc); -int wm_adsp_stream_free(struct wm_adsp* adsp) +int wm_adsp_stream_free(struct wm_adsp *adsp) { if (adsp->host_regions) { kfree(adsp->host_regions); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 5539a2a60e7..ace244d2ab7 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -128,8 +128,8 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, int wm_adsp2_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); -extern bool wm_adsp_compress_supported(const struct wm_adsp* adsp, - const struct snd_compr_stream* stream); +extern bool wm_adsp_compress_supported(const struct wm_adsp *adsp, + const struct snd_compr_stream *stream); extern bool wm_adsp_format_supported(const struct wm_adsp *adsp, const struct snd_compr_stream *stream, const struct snd_compr_params *params); @@ -137,9 +137,9 @@ extern void wm_adsp_get_caps(const struct wm_adsp *adsp, const struct snd_compr_stream *stream, struct snd_compr_caps *caps); -extern int wm_adsp_stream_alloc(struct wm_adsp* adsp, +extern int wm_adsp_stream_alloc(struct wm_adsp *adsp, const struct snd_compr_params *params); -extern int wm_adsp_stream_free(struct wm_adsp* adsp); +extern int wm_adsp_stream_free(struct wm_adsp *adsp); extern int wm_adsp_stream_start(struct wm_adsp *adsp); extern int wm_adsp_stream_capture(struct wm_adsp *adsp); extern int wm_adsp_stream_read(struct wm_adsp *adsp, char __user *buf, From c67188236036015cbf0669d5a7144830a28a269f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 22 Nov 2013 10:58:36 +0000 Subject: [PATCH 0118/1167] ASoC: wm_adsp: Update Ez2Control to new buffer format Change-Id: If2ff1091c067882161cec65f11462284955fa978 Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 2 +- sound/soc/codecs/wm_adsp.c | 287 +++++++++++++++++-------------------- sound/soc/codecs/wm_adsp.h | 13 +- 3 files changed, 137 insertions(+), 165 deletions(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 8ea12135981..64695e0ea91 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -1611,7 +1611,7 @@ static irqreturn_t adsp2_irq(int irq, void *data) if (!florida->compr_info.stream) goto out; - ret = wm_adsp_stream_capture(florida->compr_info.adsp); + ret = wm_adsp_stream_handle_irq(florida->compr_info.adsp); if (ret < 0) { dev_err(florida->core.arizona->dev, "Failed to capture DSP data: %d\n", diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index ec5073392be..8d8477db511 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -238,26 +238,29 @@ struct wm_adsp_alg_xm_struct { }; struct wm_adsp_host_buffer { - __be32 X_buf_base; - __be32 X_buf_size; - __be32 X_buf_base2; - __be32 X_buf_size2; - __be32 Y_buf_base; - __be32 Y_buf_size; - __be32 high_water_mark; - __be32 low_water_mark; - __be32 next_write_index; - __be32 next_read_index; - __be32 overflow; - __be32 state; - __be32 wrapped; - __be32 requested_rewind; - __be32 applied_rewind; + __be32 X_buf_base; /* XM base addr of first X area */ + __be32 X_buf_size; /* Size of 1st X area in words */ + __be32 X_buf_base2; /* XM base addr of 2nd X area */ + __be32 X_buf_brk; /* Total X size in words */ + __be32 Y_buf_base; /* YM base addr of Y area */ + __be32 wrap; /* Total size X and Y in words */ + __be32 high_water_mark; /* Point at which IRQ is asserted */ + __be32 irq_count; /* bits 1-31 count IRQ assertions */ + __be32 irq_ack; /* acked IRQ count, bit 0 enables IRQ */ + __be32 next_write_index; /* word index of next write */ + __be32 next_read_index; /* word index of next read */ + __be32 error; /* error if any */ + __be32 oldest_block_index; /* word index of oldest surviving */ + __be32 requested_rewind; /* how many blocks rewind was done */ + __be32 reserved_space; /* internal */ + __be32 min_free; /* min free space since stream start */ + __be32 blocks_written[2]; /* total blocks written (64 bit) */ + __be32 words_written[2]; /* total words written (64 bit) */ }; #define WM_ADSP_DATA_WORD_SIZE 3 -#define WM_ADSP_RAW_BUFFER_SAMPS 384 -#define WM_ADSP_ALG_XM_STRUCT_MAGIC 0x58b90c +#define WM_ADSP_MAX_READ_SIZE 256 +#define WM_ADSP_ALG_XM_STRUCT_MAGIC 0x49aec7 #define ADSP2_SYSTEM_CONFIG_XM_PTR \ (offsetof(struct wmfw_adsp2_id_hdr, xm) / sizeof(__be32)) @@ -271,16 +274,6 @@ struct wm_adsp_host_buffer { #define ALG_XM_FIELD(field) \ (offsetof(struct wm_adsp_alg_xm_struct, field) / sizeof(__be32)) -static const struct { - int words_per_group; - int samps_per_group; -} wm_adsp_sample_group[4] = { - [2] = { - .words_per_group = 2, - .samps_per_group = 3, - }, -}; - struct wm_adsp_buffer_region_def ez2control_regions[] = { { .mem_type = WMFW_ADSP2_XM, @@ -290,12 +283,12 @@ struct wm_adsp_buffer_region_def ez2control_regions[] = { { .mem_type = WMFW_ADSP2_XM, .base_offset = HOST_BUFFER_FIELD(X_buf_base2), - .size_offset = HOST_BUFFER_FIELD(X_buf_size2), + .size_offset = HOST_BUFFER_FIELD(X_buf_brk), }, { .mem_type = WMFW_ADSP2_YM, .base_offset = HOST_BUFFER_FIELD(Y_buf_base), - .size_offset = HOST_BUFFER_FIELD(Y_buf_size), + .size_offset = HOST_BUFFER_FIELD(wrap), }, }; @@ -2278,27 +2271,6 @@ static int wm_adsp_write_data_word(struct wm_adsp *adsp, int mem_type, return regmap_raw_write(adsp->regmap, reg, &data, sizeof(data)); } -static inline unsigned int wm_adsp_words_to_samps(const struct wm_adsp *adsp, - unsigned int words) -{ - return (words * WM_ADSP_DATA_WORD_SIZE) / adsp->sample_size; -} - -static inline unsigned int wm_adsp_samps_to_words(const struct wm_adsp *adsp, - unsigned int samples, - unsigned int offset) -{ - unsigned int groups; - unsigned int words_per_group = - wm_adsp_sample_group[adsp->sample_size].words_per_group; - - samples += offset; - samples += words_per_group - 1; - groups = samples / words_per_group; - - return groups * words_per_group; -} - static inline int wm_adsp_host_buffer_read(struct wm_adsp *adsp, unsigned int field_offset, u32 *data) { @@ -2317,8 +2289,7 @@ static inline int wm_adsp_host_buffer_write(struct wm_adsp *adsp, static int wm_adsp_populate_buffer_regions(struct wm_adsp *adsp) { int i, ret; - u32 size; - u32 cumulative_samps = 0; + u32 offset = 0; struct wm_adsp_buffer_region_def *host_region_defs = adsp->firmwares[adsp->fw].caps->host_region_defs; struct wm_adsp_buffer_region *region; @@ -2326,7 +2297,7 @@ static int wm_adsp_populate_buffer_regions(struct wm_adsp *adsp) for (i = 0; i < adsp->firmwares[adsp->fw].caps->num_host_regions; ++i) { region = &adsp->host_regions[i]; - region->offset_samps = cumulative_samps; + region->offset = offset; region->mem_type = host_region_defs[i].mem_type; ret = wm_adsp_host_buffer_read(adsp, @@ -2337,119 +2308,89 @@ static int wm_adsp_populate_buffer_regions(struct wm_adsp *adsp) ret = wm_adsp_host_buffer_read(adsp, host_region_defs[i].size_offset, - &size); + &offset); if (ret < 0) return ret; - cumulative_samps += wm_adsp_words_to_samps(adsp, size); + region->cumulative_size = offset; - region->cumulative_samps = cumulative_samps; + adsp_dbg(adsp, + "Region %d type %d base %04x off %04x size %04x\n", + i, region->mem_type, region->base_addr, + region->offset, region->cumulative_size); } return 0; } -static void wm_adsp_extract_16bit(struct wm_adsp *adsp, int num_samps, - int group_offset) +static int wm_adsp_read_buffer(struct wm_adsp *adsp, int32_t read_index, + int avail) { - int i; - int16_t sample; - u32 *raw_buf = adsp->raw_capt_buf; - int words_per_group = - wm_adsp_sample_group[sizeof(int16_t)].words_per_group; - - for (i = 0; i < num_samps; ++i) { - switch (group_offset++) { - case 2: - sample = (raw_buf[1] >> 8) & 0xffff; - raw_buf += words_per_group; - group_offset = 0; - break; - case 1: - sample = ((raw_buf[0] & 0xff) << 8) | - (raw_buf[1] & 0xff); - break; - default: - sample = (raw_buf[0] >> 8) & 0xffff; - break; - } - - *(int16_t*)(adsp->capt_buf.buf + adsp->capt_buf.head) = sample; - - adsp->capt_buf.head += adsp->sample_size; - adsp->capt_buf.head &= adsp->capt_buf_size - 1; - } -} - -static int wm_adsp_read_samples(struct wm_adsp *adsp, int32_t read_index, - int avail) -{ - int circ_space_s = CIRC_SPACE(adsp->capt_buf.head, - adsp->capt_buf.tail, - adsp->capt_buf_size) / adsp->sample_size; - int samps_per_group = - wm_adsp_sample_group[adsp->sample_size].samps_per_group; - int words_per_group = - wm_adsp_sample_group[adsp->sample_size].words_per_group; + int circ_space_words = CIRC_SPACE(adsp->capt_buf.head, + adsp->capt_buf.tail, + adsp->capt_buf_size) / + WM_ADSP_DATA_WORD_SIZE; + u8 *capt_buf = (u8 *)adsp->capt_buf.buf; + int capt_buf_h = adsp->capt_buf.head; + int capt_buf_mask = adsp->capt_buf_size - 1; int mem_type; - unsigned int adsp_addr, adsp_read_len; - int group_index, group_offset; - int num_samps; + unsigned int adsp_addr; + int num_words; int i, ret; /* Calculate read parameters */ - for (i = 0; i < adsp->firmwares[adsp->fw].caps->num_host_regions; ++i) { - if (read_index < adsp->host_regions[i].cumulative_samps) + for (i = 0; i < wm_adsp_fw[adsp->fw].caps->num_host_regions; ++i) { + if (read_index < adsp->host_regions[i].cumulative_size) break; } if (i == adsp->firmwares[adsp->fw].caps->num_host_regions) return -EINVAL; - num_samps = adsp->host_regions[i].cumulative_samps - read_index; - group_index = (read_index - adsp->host_regions[i].offset_samps) / - samps_per_group; - group_offset = read_index % samps_per_group; + num_words = adsp->host_regions[i].cumulative_size - read_index; mem_type = adsp->host_regions[i].mem_type; adsp_addr = adsp->host_regions[i].base_addr + - (group_index * words_per_group); + (read_index - adsp->host_regions[i].offset); - if (circ_space_s < num_samps) - num_samps = circ_space_s; - if (avail < num_samps) - num_samps = avail; - if (num_samps >= adsp->raw_buf_samps) { - num_samps = adsp->raw_buf_samps; - num_samps -= group_offset; + if (circ_space_words < num_words) + num_words = circ_space_words; + if (avail < num_words) + num_words = avail; + if (num_words >= WM_ADSP_MAX_READ_SIZE) { + num_words = WM_ADSP_MAX_READ_SIZE; } - if (!num_samps) + if (!num_words) return 0; /* Read data from DSP */ - adsp_read_len = wm_adsp_samps_to_words(adsp, num_samps, group_offset); ret = wm_adsp_read_data_block(adsp, mem_type, adsp_addr, - adsp_read_len, adsp->raw_capt_buf); + num_words, adsp->raw_capt_buf); if (ret != 0) return ret; - /* Extract samples from raw buffer into the capture buffer */ - switch (adsp->sample_size) { - case 2: - wm_adsp_extract_16bit(adsp, num_samps, group_offset); - break; - default: - return -EINVAL; + /* Copy to circular buffer */ + for (i = 0; i < num_words; ++i) { + u32 x = adsp->raw_capt_buf[i]; + + capt_buf[capt_buf_h++] = (u8)((x >> 0) & 0xff); + capt_buf_h &= capt_buf_mask; + capt_buf[capt_buf_h++] = (u8)((x >> 8) & 0xff); + capt_buf_h &= capt_buf_mask; + capt_buf[capt_buf_h++] = (u8)((x >> 16) & 0xff); + capt_buf_h &= capt_buf_mask; } - return num_samps; + adsp->capt_buf.head = capt_buf_h; + + return num_words; } static int wm_adsp_capture_block(struct wm_adsp *adsp, int *avail) { - int last_region = adsp->firmwares[adsp->fw].caps->num_host_regions - 1; - int host_size_samps = - adsp->host_regions[last_region].cumulative_samps; - int num_samps; + int last_region = wm_adsp_fw[adsp->fw].caps->num_host_regions - 1; + int host_size = + adsp->host_regions[last_region].cumulative_size; + int num_words; u32 next_read_index, next_write_index; int32_t write_index, read_index; int ret; @@ -2469,21 +2410,24 @@ static int wm_adsp_capture_block(struct wm_adsp *adsp, int *avail) read_index = sign_extend32(next_read_index, 23); write_index = sign_extend32(next_write_index, 23); + /* Don't empty the buffer as it kills the firmware */ + write_index--; + if (read_index < 0) return -EIO; /* stream has not yet started */ *avail = write_index - read_index; if (*avail < 0) - *avail += host_size_samps; + *avail += host_size; /* Read data from DSP */ - num_samps = wm_adsp_read_samples(adsp, read_index, *avail); - if (num_samps <= 0) - return num_samps; + num_words = wm_adsp_read_buffer(adsp, read_index, *avail); + if (num_words <= 0) + return num_words; - /* update read index to account for samples read */ - next_read_index += num_samps; - if (next_read_index == host_size_samps) + /* update read index to account for words read */ + next_read_index += num_words; + if (next_read_index == host_size) next_read_index = 0; ret = wm_adsp_host_buffer_write(adsp, @@ -2492,7 +2436,7 @@ static int wm_adsp_capture_block(struct wm_adsp *adsp, int *avail) if (ret < 0) return ret; - return num_samps; + return num_words; } int wm_adsp_stream_alloc(struct wm_adsp *adsp, @@ -2501,13 +2445,7 @@ int wm_adsp_stream_alloc(struct wm_adsp *adsp, int ret; unsigned int size; - switch (params->codec.format) { - case SNDRV_PCM_FORMAT_S16_LE: - adsp->sample_size = 2; - break; - default: - return -EINVAL; - } + adsp->dsp_error = 0; if (!adsp->capt_buf.buf) { adsp->capt_buf_size = WM_ADSP_CAPTURE_BUFFER_SIZE; @@ -2521,9 +2459,7 @@ int wm_adsp_stream_alloc(struct wm_adsp *adsp, adsp->capt_buf.tail = 0; if (!adsp->raw_capt_buf) { - adsp->raw_buf_samps = WM_ADSP_RAW_BUFFER_SAMPS; - size = wm_adsp_samps_to_words(adsp, adsp->raw_buf_samps, 0) * - sizeof(*adsp->raw_capt_buf); + size = WM_ADSP_MAX_READ_SIZE * sizeof(*adsp->raw_capt_buf); adsp->raw_capt_buf = kzalloc(size, GFP_KERNEL); if (!adsp->raw_capt_buf) { @@ -2612,12 +2548,7 @@ int wm_adsp_stream_start(struct wm_adsp *adsp) if (!adsp->host_buf_ptr) return -EIO; - ret = wm_adsp_host_buffer_read(adsp, - HOST_BUFFER_FIELD(low_water_mark), - &adsp->low_water_mark); - if (ret < 0) - return ret; - + adsp->max_dsp_read_bytes = WM_ADSP_MAX_READ_SIZE * sizeof(u32); ret = wm_adsp_populate_buffer_regions(adsp); if (ret < 0) return ret; @@ -2626,7 +2557,7 @@ int wm_adsp_stream_start(struct wm_adsp *adsp) } EXPORT_SYMBOL_GPL(wm_adsp_stream_start); -int wm_adsp_stream_capture(struct wm_adsp *adsp) +static int wm_adsp_stream_capture(struct wm_adsp *adsp) { int avail = 0; int amount_read; @@ -2646,14 +2577,51 @@ int wm_adsp_stream_capture(struct wm_adsp *adsp) } while (ret > 0); total_read += amount_read; - } while (amount_read > 0 && avail > adsp->low_water_mark); + } while (amount_read > 0 && avail > WM_ADSP_MAX_READ_SIZE); - if (avail > adsp->low_water_mark) + if (avail > WM_ADSP_MAX_READ_SIZE) adsp->buffer_drain_pending = true; - return total_read; + return total_read * WM_ADSP_DATA_WORD_SIZE; +} + +int wm_adsp_stream_handle_irq(struct wm_adsp *adsp) +{ + int ret, bytes_captured; + u32 irq_ack; + + ret = wm_adsp_host_buffer_read(adsp, + HOST_BUFFER_FIELD(error), + &adsp->dsp_error); + if (ret < 0) + return ret; + if (adsp->dsp_error != 0) { + adsp_err(adsp, "DSP error occurred: %d\n", adsp->dsp_error); + return -EIO; + } + + bytes_captured = wm_adsp_stream_capture(adsp); + if (bytes_captured < 0) + return bytes_captured; + + ret = wm_adsp_host_buffer_read(adsp, + HOST_BUFFER_FIELD(irq_count), + &irq_ack); + if (ret < 0) + return ret; + + if (!adsp->buffer_drain_pending) + irq_ack |= 1; /* enable further IRQs */ + + ret = wm_adsp_host_buffer_write(adsp, + HOST_BUFFER_FIELD(irq_ack), + irq_ack); + if (ret < 0) + return ret; + + return bytes_captured; } -EXPORT_SYMBOL_GPL(wm_adsp_stream_capture); +EXPORT_SYMBOL_GPL(wm_adsp_stream_handle_irq); int wm_adsp_stream_read(struct wm_adsp *adsp, char __user *buf, size_t count) { @@ -2672,6 +2640,9 @@ int wm_adsp_stream_read(struct wm_adsp *adsp, char __user *buf, size_t count) if (avail < count) count = avail; + adsp_dbg(adsp, "%s: avail=%d toend=%d count=%d\n", + __func__, avail, to_end, count); + if (count > to_end) { if (copy_to_user(buf, adsp->capt_buf.buf + diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index ace244d2ab7..dc9326c7e89 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -38,8 +38,8 @@ struct wm_adsp_alg_region { }; struct wm_adsp_buffer_region { - unsigned int offset_samps; - unsigned int cumulative_samps; + unsigned int offset; + unsigned int cumulative_size; unsigned int mem_type; unsigned int base_addr; }; @@ -94,11 +94,10 @@ struct wm_adsp { struct list_head ctl_list; u32 host_buf_ptr; - u32 low_water_mark; - int sample_size; + int max_dsp_read_bytes; + u32 dsp_error; u32 *raw_capt_buf; - int raw_buf_samps; struct circ_buf capt_buf; int capt_buf_size; struct wm_adsp_buffer_region *host_regions; @@ -141,9 +140,11 @@ extern int wm_adsp_stream_alloc(struct wm_adsp *adsp, const struct snd_compr_params *params); extern int wm_adsp_stream_free(struct wm_adsp *adsp); extern int wm_adsp_stream_start(struct wm_adsp *adsp); -extern int wm_adsp_stream_capture(struct wm_adsp *adsp); + +extern int wm_adsp_stream_handle_irq(struct wm_adsp *adsp); extern int wm_adsp_stream_read(struct wm_adsp *adsp, char __user *buf, size_t count); extern int wm_adsp_stream_avail(const struct wm_adsp *adsp); #endif + From 59a86c983b6df7ef2f70eeab3fb4d0ff8496a561 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 22 Nov 2013 16:06:57 +0000 Subject: [PATCH 0119/1167] ASoC: wm_adsp: Use new stream type from compressed data Change-Id: I2a824e224a233ab3be8abeae1b93a2b305ed061b Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 8d8477db511..b8fe57082ed 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -262,6 +262,8 @@ struct wm_adsp_host_buffer { #define WM_ADSP_MAX_READ_SIZE 256 #define WM_ADSP_ALG_XM_STRUCT_MAGIC 0x49aec7 +#define SND_AUDIOCODEC_SHORTEN ((__u32) 0x00000020) + #define ADSP2_SYSTEM_CONFIG_XM_PTR \ (offsetof(struct wmfw_adsp2_id_hdr, xm) / sizeof(__be32)) @@ -294,7 +296,7 @@ struct wm_adsp_buffer_region_def ez2control_regions[] = { static const struct wm_adsp_fw_caps ez2control_caps[] = { { - .id = SND_AUDIOCODEC_PCM, + .id = SND_AUDIOCODEC_SHORTEN, .desc = { .max_ch = 1, .sample_rates = SNDRV_PCM_RATE_16000, From 19ff3d2fba41fd035377ce2cba4d696a590ecd2d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 5 Nov 2013 10:26:45 +0000 Subject: [PATCH 0120/1167] mfd: arizona: Add additional registers as readable for debug Change-Id: I687f1f672b904438ae9ee6947dbd93f858b003f6 Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 8 ++++++++ include/linux/mfd/arizona/registers.h | 7 +++++++ 2 files changed, 15 insertions(+) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index a392ffea50f..0af16922a47 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -1534,6 +1534,12 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_MIC_BIAS_CTRL_1: case ARIZONA_MIC_BIAS_CTRL_2: case ARIZONA_MIC_BIAS_CTRL_3: + case ARIZONA_HP_CTRL_1L: + case ARIZONA_HP_CTRL_1R: + case ARIZONA_HP_CTRL_2L: + case ARIZONA_HP_CTRL_2R: + case ARIZONA_HP_CTRL_3L: + case ARIZONA_HP_CTRL_3R: case ARIZONA_ACCESSORY_DETECT_MODE_1: case ARIZONA_HEADPHONE_DETECT_1: case ARIZONA_HEADPHONE_DETECT_2: @@ -1579,6 +1585,7 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DMIC4R_CONTROL: case ARIZONA_OUTPUT_ENABLES_1: case ARIZONA_OUTPUT_STATUS_1: + case ARIZONA_OUTPUT_STANDBY_1: case ARIZONA_RAW_OUTPUT_STATUS_1: case ARIZONA_OUTPUT_RATE_1: case ARIZONA_OUTPUT_VOLUME_RAMP: @@ -1636,6 +1643,7 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_PDM_SPK1_CTRL_2: case ARIZONA_PDM_SPK2_CTRL_1: case ARIZONA_PDM_SPK2_CTRL_2: + case ARIZONA_SPK_CTRL_3: case ARIZONA_AIF1_BCLK_CTRL: case ARIZONA_AIF1_TX_PIN_CTRL: case ARIZONA_AIF1_RX_PIN_CTRL: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 6d86c59fc7a..07e1e30a3d3 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -120,6 +120,12 @@ #define ARIZONA_MIC_BIAS_CTRL_1 0x218 #define ARIZONA_MIC_BIAS_CTRL_2 0x219 #define ARIZONA_MIC_BIAS_CTRL_3 0x21A +#define ARIZONA_HP_CTRL_1L 0x225 +#define ARIZONA_HP_CTRL_1R 0x226 +#define ARIZONA_HP_CTRL_2L 0x227 +#define ARIZONA_HP_CTRL_2R 0x228 +#define ARIZONA_HP_CTRL_3L 0x229 +#define ARIZONA_HP_CTRL_3R 0x22A #define ARIZONA_ACCESSORY_DETECT_MODE_1 0x293 #define ARIZONA_HEADPHONE_DETECT_1 0x29B #define ARIZONA_HEADPHONE_DETECT_2 0x29C @@ -167,6 +173,7 @@ #define ARIZONA_DMIC4R_CONTROL 0x32E #define ARIZONA_OUTPUT_ENABLES_1 0x400 #define ARIZONA_OUTPUT_STATUS_1 0x401 +#define ARIZONA_OUTPUT_STANDBY_1 0x405 #define ARIZONA_RAW_OUTPUT_STATUS_1 0x406 #define ARIZONA_OUTPUT_RATE_1 0x408 #define ARIZONA_OUTPUT_VOLUME_RAMP 0x409 From e865da759bf4e6929fa66228b375345ae48d894e Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 26 Nov 2013 17:21:13 +0000 Subject: [PATCH 0121/1167] ASoC: florida: Enable DRC2 Signal Detect output The DRC2 Signal Detect output needs to be enabled whilst an output is being taken from the DRC. Enable this at the same point as we enable the interrupt output from the DRC. Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 64695e0ea91..1cf85fcdeb3 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -1845,6 +1845,7 @@ static int florida_codec_probe(struct snd_soc_codec *codec) return ret; } + snd_soc_dapm_enable_pin(&codec->dapm, "DRC2 Signal Activity"); ret = regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, ARIZONA_IM_DRC2_SIG_DET_EINT2, ARIZONA_IM_DRC2_SIG_DET_EINT2); From ecfd9257a244611ab58a74cbc65ad0afc3c295f0 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 26 Nov 2013 11:34:30 +0000 Subject: [PATCH 0122/1167] switch: arizona: Expose headphone impedance through sysfs Change-Id: I03382c4f8ecbb551a46de79a2173bbea7843981b Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index eb9e83b0618..2a67c9fb969 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -27,6 +27,7 @@ #include #include #include +#include #include @@ -70,6 +71,7 @@ struct arizona_extcon_info { struct input_dev *input; u16 last_jackdet; + u32 hp_impedance; int micd_mode; const struct arizona_micd_config *micd_modes; @@ -136,6 +138,11 @@ enum headset_state { BIT_HEADSET_NO_MIC = (1 << 1), }; +static ssize_t arizona_extcon_show(struct device *dev, + struct device_attribute *attr, + char *buf); +DEVICE_ATTR(hp_impedance, S_IRUGO, arizona_extcon_show, NULL); + static void arizona_start_hpdet_acc_id(struct arizona_extcon_info *info); static void arizona_extcon_do_magic(struct arizona_extcon_info *info, @@ -492,6 +499,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) } } + info->hp_impedance = val; dev_dbg(arizona->dev, "HP impedance %d ohms\n", val); return val; } @@ -1071,6 +1079,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) info->mic = false; info->hpdet_done = false; info->hpdet_retried = false; + info->hp_impedance = 0; for (i = 0; i < info->num_micd_ranges; i++) input_report_key(info->input, @@ -1167,6 +1176,16 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) return 0; } +static ssize_t arizona_extcon_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct platform_device *pdev = to_platform_device(dev); + struct arizona_extcon_info *info = platform_get_drvdata(pdev); + + return scnprintf(buf, PAGE_SIZE, "%d\n", info->hp_impedance); +} + static int arizona_extcon_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); @@ -1476,6 +1495,12 @@ static int arizona_extcon_probe(struct platform_device *pdev) goto err_hpdet; } + ret = device_create_file(&pdev->dev, &dev_attr_hp_impedance); + if (ret != 0) + dev_err(&pdev->dev, + "Failed to create sysfs node for hp_impedance %d\n", + ret); + return 0; err_hpdet: @@ -1528,6 +1553,8 @@ static int arizona_extcon_remove(struct platform_device *pdev) regmap_update_bits(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, ARIZONA_JD1_ENA, 0); arizona_clk32k_disable(arizona); + + device_remove_file(&pdev->dev, &dev_attr_hp_impedance); switch_dev_unregister(&info->edev); return 0; From d4bc59267475107f9bdfb3589ea67920fd1b43d5 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 26 Nov 2013 17:33:47 +0000 Subject: [PATCH 0123/1167] Revert "ASoC: wm_adsp: Use new stream type from compressed data" This reverts commit 59a86c983b6df7ef2f70eeab3fb4d0ff8496a561. Revert to using a PCM stream for now, until a more generic solution for custom compression formats is implemented. Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index b8fe57082ed..8d8477db511 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -262,8 +262,6 @@ struct wm_adsp_host_buffer { #define WM_ADSP_MAX_READ_SIZE 256 #define WM_ADSP_ALG_XM_STRUCT_MAGIC 0x49aec7 -#define SND_AUDIOCODEC_SHORTEN ((__u32) 0x00000020) - #define ADSP2_SYSTEM_CONFIG_XM_PTR \ (offsetof(struct wmfw_adsp2_id_hdr, xm) / sizeof(__be32)) @@ -296,7 +294,7 @@ struct wm_adsp_buffer_region_def ez2control_regions[] = { static const struct wm_adsp_fw_caps ez2control_caps[] = { { - .id = SND_AUDIOCODEC_SHORTEN, + .id = SND_AUDIOCODEC_PCM, .desc = { .max_ch = 1, .sample_rates = SNDRV_PCM_RATE_16000, From 6a23d3b01c2ed954cc51a4ccdcf92c3cb1cff65d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 26 Nov 2013 14:30:59 +0000 Subject: [PATCH 0124/1167] ASoC: wm_adsp: Ensure we don't attempt to create controls twice wm_adsp_create_grouped_control is called from a loop which iterates through the alg_regions list. However it also adds new regions into this list, controls for these regions will be added twice, once when the new region is added to the list and once when the iteration reached the new region in the list. This patch changes this such that the control is only added once it is processed from the alg_regions list. Change-Id: If8d30f5dc1ce1b496c198e31cf7e3b350c646d25 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 8d8477db511..626042476b2 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1101,7 +1101,6 @@ static int wm_adsp_create_grouped_control(struct wm_adsp *dsp, struct wm_adsp_alg_region *r; int ret; - region->block = 0; /* This is the quick case for control groups of a single block */ if (region->len <= 512) return wm_adsp_create_control(dsp, region); @@ -1129,10 +1128,11 @@ static int wm_adsp_create_grouped_control(struct wm_adsp *dsp, else r->len = len - offset; offset += r->len; + /* We do not need to create the control for this new + * region as it will be created once we reach the region + * whilst processing the alg_regions list. + */ list_add_tail(&r->list, &dsp->alg_regions); - ret = wm_adsp_create_control(dsp, r); - if (ret < 0) - return ret; } while (offset < len); return 0; From b521edd2d18cd8fb7554c3f5680e723444811df5 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 26 Nov 2013 11:04:13 +0000 Subject: [PATCH 0125/1167] ASoC: arizona: fix missing default case getting FLL fratio This error was introduced during the florida rename, the handling of wm5102 and wm8997 cases in arizona_fratio_ref() was accidentally lost. This change puts in the default case to handle those codecs. Change-Id: I39c83fa876c9c498d0713ef90e1493667bdef683 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 44437345aa4..5b333f95574 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1337,6 +1337,9 @@ static inline int arizona_fratio_ref(struct arizona *arizona, int i) else return fll_fratios[i].fratio[0]; break; + + default: + return fll_fratios[i].fratio[0]; } } From c53f1d3d8ed9b068b3cc8599c4bdf93e0de2539a Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 26 Nov 2013 11:11:17 +0000 Subject: [PATCH 0126/1167] mfd: arizona: fix potential bad pointer when printing chip ID If a Florida-type codec is found but the driver was not registered as a known Florida-type part the previous code would use an uninitialized pointer when logging that the codec was registered. This change fixes that. Change-Id: If85df6b00d5f4a719851f28c192322126245c9f6 Signed-off-by: Richard Fitzgerald --- drivers/mfd/arizona-core.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 1389c27d476..ae9546cb71f 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -795,7 +795,7 @@ static struct mfd_cell florida_devs[] = { int arizona_dev_init(struct arizona *arizona) { struct device *dev = arizona->dev; - const char *type_name; + const char *type_name = "Unknown"; unsigned int reg, val; int (*apply_patch)(struct arizona *) = NULL; int ret, i; @@ -979,6 +979,8 @@ int arizona_dev_init(struct arizona *arizona) dev_err(arizona->dev, "Florida codec registered as %d\n", arizona->type); arizona->type = WM8280; + type_name = "Florida"; + revision_char = arizona->rev + 61; break; } apply_patch = florida_patch; From ec34eb51185a27b89f2f508d92cbbacc64d6bbf7 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 27 Nov 2013 10:34:43 +0000 Subject: [PATCH 0127/1167] ASoC: arizona: Add default case to resolve build warning Signed-off-by: JS Park Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index ae9546cb71f..27f3ed98de3 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -370,6 +370,8 @@ static int arizona_runtime_resume(struct device *dev) goto err; } break; + default: + break; } switch (arizona->type) { From 57e23bb0e785f73797b8f10e2f35208cb1c7fb29 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 4 Nov 2013 14:49:39 +0000 Subject: [PATCH 0128/1167] ASoC: wm5102: fix spelling of EQ coefficient controls Change-Id: I38251e7798af37d40396d8ae720d73d3384dad99 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm5102.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 93cf86c39a2..475bd0a35b2 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -685,13 +685,13 @@ ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ4", ARIZONA_EQ4MIX_INPUT_1_SOURCE), -SND_SOC_BYTES_MASK("EQ1 Coefficeints", ARIZONA_EQ1_1, 21, +SND_SOC_BYTES_MASK("EQ1 Coefficients", ARIZONA_EQ1_1, 21, ARIZONA_EQ1_ENA_MASK), -SND_SOC_BYTES_MASK("EQ2 Coefficeints", ARIZONA_EQ2_1, 21, +SND_SOC_BYTES_MASK("EQ2 Coefficients", ARIZONA_EQ2_1, 21, ARIZONA_EQ2_ENA_MASK), -SND_SOC_BYTES_MASK("EQ3 Coefficeints", ARIZONA_EQ3_1, 21, +SND_SOC_BYTES_MASK("EQ3 Coefficients", ARIZONA_EQ3_1, 21, ARIZONA_EQ3_ENA_MASK), -SND_SOC_BYTES_MASK("EQ4 Coefficeints", ARIZONA_EQ4_1, 21, +SND_SOC_BYTES_MASK("EQ4 Coefficients", ARIZONA_EQ4_1, 21, ARIZONA_EQ4_ENA_MASK), SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, From ddb70da3eee9e5bc9a15f50dc60a66dbdbd3226c Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 4 Nov 2013 14:16:24 +0000 Subject: [PATCH 0129/1167] ASoC: wm5110: fix spelling of EQ coefficient controls Change-Id: If7056d0ffe6d4b3b8cbce18e7d382a6bca59f6fb Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/florida.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 1cf85fcdeb3..d20b02159b9 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -223,13 +223,13 @@ ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ4", ARIZONA_EQ4MIX_INPUT_1_SOURCE), -SND_SOC_BYTES_MASK("EQ1 Coefficeints", ARIZONA_EQ1_1, 21, +SND_SOC_BYTES_MASK("EQ1 Coefficients", ARIZONA_EQ1_1, 21, ARIZONA_EQ1_ENA_MASK), -SND_SOC_BYTES_MASK("EQ2 Coefficeints", ARIZONA_EQ2_1, 21, +SND_SOC_BYTES_MASK("EQ2 Coefficients", ARIZONA_EQ2_1, 21, ARIZONA_EQ2_ENA_MASK), -SND_SOC_BYTES_MASK("EQ3 Coefficeints", ARIZONA_EQ3_1, 21, +SND_SOC_BYTES_MASK("EQ3 Coefficients", ARIZONA_EQ3_1, 21, ARIZONA_EQ3_ENA_MASK), -SND_SOC_BYTES_MASK("EQ4 Coefficeints", ARIZONA_EQ4_1, 21, +SND_SOC_BYTES_MASK("EQ4 Coefficients", ARIZONA_EQ4_1, 21, ARIZONA_EQ4_ENA_MASK), SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, From 580aca500fa8e91177656ad6dc5671003f0c12a4 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 25 Nov 2013 09:44:47 +0000 Subject: [PATCH 0130/1167] ASoC: florida: Add extra AIF2 channels Change-Id: Ic60063cda6c65577f46b71b2aaf7037e73686d78 Signed-off-by: D.J. Barrow Signed-off-by: Richard Fitzgerald --- include/linux/mfd/arizona/registers.h | 121 ++++++++++++++++++++++++++ sound/soc/codecs/arizona.c | 8 ++ sound/soc/codecs/arizona.h | 2 +- sound/soc/codecs/florida.c | 48 +++++++++- 4 files changed, 176 insertions(+), 3 deletions(-) diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 07e1e30a3d3..6e1011b5e9a 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -521,6 +521,38 @@ #define ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME 0x74D #define ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE 0x74E #define ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME 0x74F +#define ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE 0x750 +#define ARIZONA_AIF2TX3MIX_INPUT_1_VOLUME 0x751 +#define ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE 0x752 +#define ARIZONA_AIF2TX3MIX_INPUT_2_VOLUME 0x753 +#define ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE 0x754 +#define ARIZONA_AIF2TX3MIX_INPUT_3_VOLUME 0x755 +#define ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE 0x756 +#define ARIZONA_AIF2TX3MIX_INPUT_4_VOLUME 0x757 +#define ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE 0x758 +#define ARIZONA_AIF2TX4MIX_INPUT_1_VOLUME 0x759 +#define ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE 0x75A +#define ARIZONA_AIF2TX4MIX_INPUT_2_VOLUME 0x75B +#define ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE 0x75C +#define ARIZONA_AIF2TX4MIX_INPUT_3_VOLUME 0x75D +#define ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE 0x75E +#define ARIZONA_AIF2TX4MIX_INPUT_4_VOLUME 0x75F +#define ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE 0x760 +#define ARIZONA_AIF2TX5MIX_INPUT_1_VOLUME 0x761 +#define ARIZONA_AIF2TX5MIX_INPUT_2_SOURCE 0x762 +#define ARIZONA_AIF2TX5MIX_INPUT_2_VOLUME 0x763 +#define ARIZONA_AIF2TX5MIX_INPUT_3_SOURCE 0x764 +#define ARIZONA_AIF2TX5MIX_INPUT_3_VOLUME 0x765 +#define ARIZONA_AIF2TX5MIX_INPUT_4_SOURCE 0x766 +#define ARIZONA_AIF2TX5MIX_INPUT_4_VOLUME 0x767 +#define ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE 0x768 +#define ARIZONA_AIF2TX6MIX_INPUT_1_VOLUME 0x769 +#define ARIZONA_AIF2TX6MIX_INPUT_2_SOURCE 0x76A +#define ARIZONA_AIF2TX6MIX_INPUT_2_VOLUME 0x76B +#define ARIZONA_AIF2TX6MIX_INPUT_3_SOURCE 0x76C +#define ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME 0x76D +#define ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE 0x76E +#define ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME 0x76F #define ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE 0x780 #define ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME 0x781 #define ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE 0x782 @@ -3790,6 +3822,35 @@ #define ARIZONA_AIF2TX2_SLOT_SHIFT 0 /* AIF2TX2_SLOT - [5:0] */ #define ARIZONA_AIF2TX2_SLOT_WIDTH 6 /* AIF2TX2_SLOT - [5:0] */ +/* + * R1355 (0x54B) - AIF2 Frame Ctrl 5 + */ +#define ARIZONA_AIF2TX3_SLOT_MASK 0x003F /* AIF2TX3_SLOT - [5:0] */ +#define ARIZONA_AIF2TX3_SLOT_SHIFT 0 /* AIF2TX3_SLOT - [5:0] */ +#define ARIZONA_AIF2TX3_SLOT_WIDTH 6 /* AIF2TX3_SLOT - [5:0] */ + +/* + * R1356 (0x54C) - AIF2 Frame Ctrl 6 + */ +#define ARIZONA_AIF2TX4_SLOT_MASK 0x003F /* AIF2TX4_SLOT - [5:0] */ +#define ARIZONA_AIF2TX4_SLOT_SHIFT 0 /* AIF2TX4_SLOT - [5:0] */ +#define ARIZONA_AIF2TX4_SLOT_WIDTH 6 /* AIF2TX4_SLOT - [5:0] */ + + +/* + * R1357 (0x54D) - AIF2 Frame Ctrl 7 + */ +#define ARIZONA_AIF2TX5_SLOT_MASK 0x003F /* AIF2TX5_SLOT - [5:0] */ +#define ARIZONA_AIF2TX5_SLOT_SHIFT 0 /* AIF2TX5_SLOT - [5:0] */ +#define ARIZONA_AIF2TX5_SLOT_WIDTH 6 /* AIF2TX5_SLOT - [5:0] */ + +/* + * R1358 (0x54E) - AIF2 Frame Ctrl 8 + */ +#define ARIZONA_AIF2TX6_SLOT_MASK 0x003F /* AIF2TX6_SLOT - [5:0] */ +#define ARIZONA_AIF2TX6_SLOT_SHIFT 0 /* AIF2TX6_SLOT - [5:0] */ +#define ARIZONA_AIF2TX6_SLOT_WIDTH 6 /* AIF2TX6_SLOT - [5:0] */ + /* * R1361 (0x551) - AIF2 Frame Ctrl 11 */ @@ -3804,9 +3865,53 @@ #define ARIZONA_AIF2RX2_SLOT_SHIFT 0 /* AIF2RX2_SLOT - [5:0] */ #define ARIZONA_AIF2RX2_SLOT_WIDTH 6 /* AIF2RX2_SLOT - [5:0] */ +/* + * R1363 (0x553) - AIF2 Frame Ctrl 13 + */ +#define ARIZONA_AIF2RX3_SLOT_MASK 0x003F /* AIF2RX3_SLOT - [5:0] */ +#define ARIZONA_AIF2RX3_SLOT_SHIFT 0 /* AIF2RX3_SLOT - [5:0] */ +#define ARIZONA_AIF2RX3_SLOT_WIDTH 6 /* AIF2RX3_SLOT - [5:0] */ + +/* + * R1364 (0x554) - AIF2 Frame Ctrl 14 + */ +#define ARIZONA_AIF2RX4_SLOT_MASK 0x003F /* AIF2RX4_SLOT - [5:0] */ +#define ARIZONA_AIF2RX4_SLOT_SHIFT 0 /* AIF2RX4_SLOT - [5:0] */ +#define ARIZONA_AIF2RX4_SLOT_WIDTH 6 /* AIF2RX4_SLOT - [5:0] */ + +/* + * R1365 (0x555) - AIF2 Frame Ctrl 15 + */ +#define ARIZONA_AIF2RX5_SLOT_MASK 0x003F /* AIF2RX5_SLOT - [5:0] */ +#define ARIZONA_AIF2RX5_SLOT_SHIFT 0 /* AIF2RX5_SLOT - [5:0] */ +#define ARIZONA_AIF2RX5_SLOT_WIDTH 6 /* AIF2RX5_SLOT - [5:0] */ + +/* + * R1366 (0x556) - AIF2 Frame Ctrl 16 + */ +#define ARIZONA_AIF2RX6_SLOT_MASK 0x003F /* AIF2RX6_SLOT - [5:0] */ +#define ARIZONA_AIF2RX6_SLOT_SHIFT 0 /* AIF2RX6_SLOT - [5:0] */ +#define ARIZONA_AIF2RX6_SLOT_WIDTH 6 /* AIF2RX6_SLOT - [5:0] */ + /* * R1369 (0x559) - AIF2 Tx Enables */ +#define ARIZONA_AIF2TX6_ENA 0x0020 /* AIF2TX6_ENA */ +#define ARIZONA_AIF2TX6_ENA_MASK 0x0020 /* AIF2TX6_ENA */ +#define ARIZONA_AIF2TX6_ENA_SHIFT 5 /* AIF2TX6_ENA */ +#define ARIZONA_AIF2TX6_ENA_WIDTH 1 /* AIF2TX6_ENA */ +#define ARIZONA_AIF2TX5_ENA 0x0010 /* AIF2TX5_ENA */ +#define ARIZONA_AIF2TX5_ENA_MASK 0x0010 /* AIF2TX5_ENA */ +#define ARIZONA_AIF2TX5_ENA_SHIFT 4 /* AIF2TX5_ENA */ +#define ARIZONA_AIF2TX5_ENA_WIDTH 1 /* AIF2TX5_ENA */ +#define ARIZONA_AIF2TX4_ENA 0x0008 /* AIF2TX4_ENA */ +#define ARIZONA_AIF2TX4_ENA_MASK 0x0008 /* AIF2TX4_ENA */ +#define ARIZONA_AIF2TX4_ENA_SHIFT 3 /* AIF2TX4_ENA */ +#define ARIZONA_AIF2TX4_ENA_WIDTH 1 /* AIF2TX4_ENA */ +#define ARIZONA_AIF2TX3_ENA 0x0004 /* AIF2TX3_ENA */ +#define ARIZONA_AIF2TX3_ENA_MASK 0x0004 /* AIF2TX3_ENA */ +#define ARIZONA_AIF2TX3_ENA_SHIFT 2 /* AIF2TX3_ENA */ +#define ARIZONA_AIF2TX3_ENA_WIDTH 1 /* AIF2TX3_ENA */ #define ARIZONA_AIF2TX2_ENA 0x0002 /* AIF2TX2_ENA */ #define ARIZONA_AIF2TX2_ENA_MASK 0x0002 /* AIF2TX2_ENA */ #define ARIZONA_AIF2TX2_ENA_SHIFT 1 /* AIF2TX2_ENA */ @@ -3819,6 +3924,22 @@ /* * R1370 (0x55A) - AIF2 Rx Enables */ +#define ARIZONA_AIF2RX6_ENA 0x0020 /* AIF2RX6_ENA */ +#define ARIZONA_AIF2RX6_ENA_MASK 0x0020 /* AIF2RX6_ENA */ +#define ARIZONA_AIF2RX6_ENA_SHIFT 5 /* AIF2RX6_ENA */ +#define ARIZONA_AIF2RX6_ENA_WIDTH 1 /* AIF2RX6_ENA */ +#define ARIZONA_AIF2RX5_ENA 0x0010 /* AIF2RX5_ENA */ +#define ARIZONA_AIF2RX5_ENA_MASK 0x0010 /* AIF2RX5_ENA */ +#define ARIZONA_AIF2RX5_ENA_SHIFT 4 /* AIF2RX5_ENA */ +#define ARIZONA_AIF2RX5_ENA_WIDTH 1 /* AIF2RX5_ENA */ +#define ARIZONA_AIF2RX4_ENA 0x0008 /* AIF2RX4_ENA */ +#define ARIZONA_AIF2RX4_ENA_MASK 0x0008 /* AIF2RX4_ENA */ +#define ARIZONA_AIF2RX4_ENA_SHIFT 3 /* AIF2RX4_ENA */ +#define ARIZONA_AIF2RX4_ENA_WIDTH 1 /* AIF2RX4_ENA */ +#define ARIZONA_AIF2RX3_ENA 0x0004 /* AIF2RX3_ENA */ +#define ARIZONA_AIF2RX3_ENA_MASK 0x0004 /* AIF2RX3_ENA */ +#define ARIZONA_AIF2RX3_ENA_SHIFT 2 /* AIF2RX3_ENA */ +#define ARIZONA_AIF2RX3_ENA_WIDTH 1 /* AIF2RX3_ENA */ #define ARIZONA_AIF2RX2_ENA 0x0002 /* AIF2RX2_ENA */ #define ARIZONA_AIF2RX2_ENA_MASK 0x0002 /* AIF2RX2_ENA */ #define ARIZONA_AIF2RX2_ENA_SHIFT 1 /* AIF2RX2_ENA */ diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 5b333f95574..4612158dd31 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -286,6 +286,10 @@ const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = { "AIF1RX8", "AIF2RX1", "AIF2RX2", + "AIF2RX3", + "AIF2RX4", + "AIF2RX5", + "AIF2RX6", "AIF3RX1", "AIF3RX2", "SLIMRX1", @@ -389,6 +393,10 @@ int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = { 0x27, 0x28, /* AIF2RX1 */ 0x29, + 0x2a, + 0x2b, + 0x2c, + 0x2d, 0x30, /* AIF3RX1 */ 0x31, 0x38, /* SLIMRX1 */ diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index fc72e746e00..f3653415493 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -81,7 +81,7 @@ struct arizona_priv { unsigned int spk_ena_pending:1; }; -#define ARIZONA_NUM_MIXER_INPUTS 99 +#define ARIZONA_NUM_MIXER_INPUTS 103 extern const unsigned int arizona_mixer_tlv[]; extern const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS]; diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index d20b02159b9..2006173e6fb 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -428,6 +428,10 @@ ARIZONA_MIXER_CONTROLS("AIF1TX8", ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("AIF2TX1", ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("AIF2TX2", ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX3", ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX4", ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX5", ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX6", ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("AIF3TX1", ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("AIF3TX2", ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE), @@ -503,6 +507,10 @@ ARIZONA_MIXER_ENUMS(AIF1TX8, ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE); ARIZONA_MIXER_ENUMS(AIF2TX1, ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE); ARIZONA_MIXER_ENUMS(AIF2TX2, ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX3, ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX4, ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX5, ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX6, ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE); ARIZONA_MIXER_ENUMS(AIF3TX1, ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE); ARIZONA_MIXER_ENUMS(AIF3TX2, ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE); @@ -821,11 +829,27 @@ SND_SOC_DAPM_AIF_OUT("AIF2TX1", NULL, 0, ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX1_ENA_SHIFT, 0), SND_SOC_DAPM_AIF_OUT("AIF2TX2", NULL, 0, ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX3", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX4", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX5", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX6", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX6_ENA_SHIFT, 0), SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0, ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX1_ENA_SHIFT, 0), SND_SOC_DAPM_AIF_IN("AIF2RX2", NULL, 0, ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX3", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX4", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX5", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX6", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX6_ENA_SHIFT, 0), SND_SOC_DAPM_AIF_IN("SLIMRX1", NULL, 0, ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, @@ -963,6 +987,10 @@ ARIZONA_MIXER_WIDGETS(AIF1TX8, "AIF1TX8"), ARIZONA_MIXER_WIDGETS(AIF2TX1, "AIF2TX1"), ARIZONA_MIXER_WIDGETS(AIF2TX2, "AIF2TX2"), +ARIZONA_MIXER_WIDGETS(AIF2TX3, "AIF2TX3"), +ARIZONA_MIXER_WIDGETS(AIF2TX4, "AIF2TX4"), +ARIZONA_MIXER_WIDGETS(AIF2TX5, "AIF2TX5"), +ARIZONA_MIXER_WIDGETS(AIF2TX6, "AIF2TX6"), ARIZONA_MIXER_WIDGETS(AIF3TX1, "AIF3TX1"), ARIZONA_MIXER_WIDGETS(AIF3TX2, "AIF3TX2"), @@ -1068,6 +1096,10 @@ SND_SOC_DAPM_OUTPUT("MICSUPP"), { name, "AIF1RX8", "AIF1RX8" }, \ { name, "AIF2RX1", "AIF2RX1" }, \ { name, "AIF2RX2", "AIF2RX2" }, \ + { name, "AIF2RX3", "AIF2RX3" }, \ + { name, "AIF2RX4", "AIF2RX4" }, \ + { name, "AIF2RX5", "AIF2RX5" }, \ + { name, "AIF2RX6", "AIF2RX6" }, \ { name, "AIF3RX1", "AIF3RX1" }, \ { name, "AIF3RX2", "AIF3RX2" }, \ { name, "SLIMRX1", "SLIMRX1" }, \ @@ -1213,9 +1245,17 @@ static const struct snd_soc_dapm_route florida_dapm_routes[] = { { "AIF2 Capture", NULL, "AIF2TX1" }, { "AIF2 Capture", NULL, "AIF2TX2" }, + { "AIF2 Capture", NULL, "AIF2TX3" }, + { "AIF2 Capture", NULL, "AIF2TX4" }, + { "AIF2 Capture", NULL, "AIF2TX5" }, + { "AIF2 Capture", NULL, "AIF2TX6" }, { "AIF2RX1", NULL, "AIF2 Playback" }, { "AIF2RX2", NULL, "AIF2 Playback" }, + { "AIF2RX3", NULL, "AIF2 Playback" }, + { "AIF2RX4", NULL, "AIF2 Playback" }, + { "AIF2RX5", NULL, "AIF2 Playback" }, + { "AIF2RX6", NULL, "AIF2 Playback" }, { "AIF3 Capture", NULL, "AIF3TX1" }, { "AIF3 Capture", NULL, "AIF3TX2" }, @@ -1304,6 +1344,10 @@ static const struct snd_soc_dapm_route florida_dapm_routes[] = { ARIZONA_MIXER_ROUTES("AIF2TX1", "AIF2TX1"), ARIZONA_MIXER_ROUTES("AIF2TX2", "AIF2TX2"), + ARIZONA_MIXER_ROUTES("AIF2TX3", "AIF2TX3"), + ARIZONA_MIXER_ROUTES("AIF2TX4", "AIF2TX4"), + ARIZONA_MIXER_ROUTES("AIF2TX5", "AIF2TX5"), + ARIZONA_MIXER_ROUTES("AIF2TX6", "AIF2TX6"), ARIZONA_MIXER_ROUTES("AIF3TX1", "AIF3TX1"), ARIZONA_MIXER_ROUTES("AIF3TX2", "AIF3TX2"), @@ -1480,14 +1524,14 @@ static struct snd_soc_dai_driver florida_dai[] = { .playback = { .stream_name = "AIF2 Playback", .channels_min = 1, - .channels_max = 2, + .channels_max = 6, .rates = FLORIDA_RATES, .formats = FLORIDA_FORMATS, }, .capture = { .stream_name = "AIF2 Capture", .channels_min = 1, - .channels_max = 2, + .channels_max = 6, .rates = FLORIDA_RATES, .formats = FLORIDA_FORMATS, }, From 00737d63ea356ab2897c5c31177389efc4172110 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 28 Nov 2013 15:38:27 +0000 Subject: [PATCH 0131/1167] ASoC: wm_adsp: Stop region iteration when the desired region is found When locating the memory region relating to a coefficient block written through a bin file we keep processing the list of regions even after we have found the region we require. This patch adds a break, so we don't process redundant list items. Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 626042476b2..b2048604f30 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1655,6 +1655,7 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) reg = wm_adsp_region_to_reg(mem, reg); reg += offset; + break; } } From d57e4cae011e7b54b7f9c6ccc3d5d87f7f040ad2 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 15 Nov 2013 14:35:15 +0000 Subject: [PATCH 0132/1167] regulator: arizona-micsupp: Correct wm5110 voltage selection wm5110 provides different voltage configurations that the other Arizona parts, this patch adds support for this into the regulator driver. Also fixup the default for the configuration register for wm5110. Change-Id: I3e80152be86679eb85fdb83810fe37eb3b22358c Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 2 +- drivers/regulator/arizona-micsupp.c | 77 +++++++++++++++++++++++++++-- 2 files changed, 74 insertions(+), 5 deletions(-) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 0af16922a47..3e40996843d 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -533,7 +533,7 @@ static const struct reg_default florida_reg_default[] = { { 0x000001AA, 0x0004 }, /* R426 - FLL2 GPIO Clock */ { 0x00000200, 0x0006 }, /* R512 - Mic Charge Pump 1 */ { 0x00000210, 0x0184 }, /* R528 - LDO1 Control 1 */ - { 0x00000213, 0x0344 }, /* R531 - LDO2 Control 1 */ + { 0x00000213, 0x03E4 }, /* R531 - LDO2 Control 1 */ { 0x00000218, 0x01A6 }, /* R536 - Mic Bias Ctrl 1 */ { 0x00000219, 0x01A6 }, /* R537 - Mic Bias Ctrl 2 */ { 0x0000021A, 0x01A6 }, /* R538 - Mic Bias Ctrl 3 */ diff --git a/drivers/regulator/arizona-micsupp.c b/drivers/regulator/arizona-micsupp.c index e87536bf0be..98ebcfda5a2 100644 --- a/drivers/regulator/arizona-micsupp.c +++ b/drivers/regulator/arizona-micsupp.c @@ -30,6 +30,9 @@ #define ARIZONA_MICSUPP_MAX_SELECTOR 0x1f +#define ARIZONA_MICSUPP_RANGE1_MAX_SELECTOR 0x14 +#define ARIZONA_MICSUPP_RANGE2_MAX_SELECTOR 0x27 + struct arizona_micsupp { struct regulator_dev *regulator; struct arizona *arizona; @@ -40,8 +43,7 @@ struct arizona_micsupp { struct work_struct check_cp_work; }; -static int arizona_micsupp_list_voltage(struct regulator_dev *rdev, - unsigned int selector) +static int arizona_micsupp_sel_to_voltage(unsigned int selector) { if (selector > ARIZONA_MICSUPP_MAX_SELECTOR) return -EINVAL; @@ -52,6 +54,32 @@ static int arizona_micsupp_list_voltage(struct regulator_dev *rdev, return (selector * 50000) + 1700000; } +static int arizona_micsupp_ext_sel_to_voltage(unsigned int selector) +{ + if (selector > ARIZONA_MICSUPP_RANGE2_MAX_SELECTOR) + return -EINVAL; + + if (selector < ARIZONA_MICSUPP_RANGE1_MAX_SELECTOR) { + return (selector * 25000) + 900000; + } else { + selector -= ARIZONA_MICSUPP_RANGE1_MAX_SELECTOR; + return (selector * 100000) + 1400000; + } +} + +static int arizona_micsupp_list_voltage(struct regulator_dev *rdev, + unsigned int selector) +{ + struct arizona_micsupp *micsupp = rdev_get_drvdata(rdev); + + switch (micsupp->arizona->type) { + case WM5110: + return arizona_micsupp_ext_sel_to_voltage(selector); + default: + return arizona_micsupp_sel_to_voltage(selector); + } +} + static int arizona_micsupp_map_voltage(struct regulator_dev *rdev, int min_uV, int max_uV) { @@ -174,6 +202,25 @@ static const struct regulator_desc arizona_micsupp = { .owner = THIS_MODULE, }; +static const struct regulator_desc arizona_micsupp_ext = { + .name = "MICVDD", + .supply_name = "CPVDD", + .type = REGULATOR_VOLTAGE, + .n_voltages = ARIZONA_MICSUPP_RANGE2_MAX_SELECTOR + 1, + .ops = &arizona_micsupp_ops, + + .vsel_reg = ARIZONA_LDO2_CONTROL_1, + .vsel_mask = ARIZONA_LDO2_VSEL_MASK, + .enable_reg = ARIZONA_MIC_CHARGE_PUMP_1, + .enable_mask = ARIZONA_CPMIC_ENA, + .bypass_reg = ARIZONA_MIC_CHARGE_PUMP_1, + .bypass_mask = ARIZONA_CPMIC_BYPASS, + + .enable_time = 3000, + + .owner = THIS_MODULE, +}; + static const struct regulator_init_data arizona_micsupp_default = { .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS | @@ -186,9 +233,22 @@ static const struct regulator_init_data arizona_micsupp_default = { .num_consumer_supplies = 1, }; +static const struct regulator_init_data arizona_micsupp_ext_default = { + .constraints = { + .valid_ops_mask = REGULATOR_CHANGE_STATUS | + REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_BYPASS, + .min_uV = 900000, + .max_uV = 3300000, + }, + + .num_consumer_supplies = 1, +}; + static int arizona_micsupp_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); + const struct regulator_desc *desc; struct regulator_config config = { }; struct arizona_micsupp *micsupp; int ret; @@ -207,7 +267,16 @@ static int arizona_micsupp_probe(struct platform_device *pdev) * default init_data for it. This will be overridden with * platform data if provided. */ - micsupp->init_data = arizona_micsupp_default; + switch (arizona->type) { + case WM5110: + desc = &arizona_micsupp_ext; + micsupp->init_data = arizona_micsupp_ext_default; + break; + default: + desc = &arizona_micsupp; + micsupp->init_data = arizona_micsupp_default; + break; + } micsupp->init_data.consumer_supplies = &micsupp->supply; micsupp->supply.supply = "MICVDD"; micsupp->supply.dev_name = dev_name(arizona->dev); @@ -225,7 +294,7 @@ static int arizona_micsupp_probe(struct platform_device *pdev) regmap_update_bits(arizona->regmap, ARIZONA_MIC_CHARGE_PUMP_1, ARIZONA_CPMIC_BYPASS, 0); - micsupp->regulator = regulator_register(&arizona_micsupp, &config); + micsupp->regulator = regulator_register(desc, &config); if (IS_ERR(micsupp->regulator)) { ret = PTR_ERR(micsupp->regulator); dev_err(arizona->dev, "Failed to register mic supply: %d\n", From b6156e1ef4d52fdc606d1e155503431b5b907663 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 27 Nov 2013 11:35:31 +0000 Subject: [PATCH 0133/1167] mfd: florida: Give new AIF2 registers defaults and mark as readable The registers associated with the new channels on AIF2 were accidentally missing defaults and not marked as readable this patch fixes this. Change-Id: Icc303aa0320cdde6c0c6bd6336630c119a0aa555 Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 64 ++++++++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 3e40996843d..5701b55a020 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -914,6 +914,38 @@ static const struct reg_default florida_reg_default[] = { { 0x0000074D, 0x0080 }, /* R1869 - AIF2TX2MIX Input 3 Volume */ { 0x0000074E, 0x0000 }, /* R1870 - AIF2TX2MIX Input 4 Source */ { 0x0000074F, 0x0080 }, /* R1871 - AIF2TX2MIX Input 4 Volume */ + { 0x00000750, 0x0000 }, /* R1872 - AIF2TX3MIX Input 1 Source */ + { 0x00000751, 0x0080 }, /* R1873 - AIF2TX3MIX Input 1 Volume */ + { 0x00000752, 0x0000 }, /* R1874 - AIF2TX3MIX Input 2 Source */ + { 0x00000753, 0x0080 }, /* R1875 - AIF2TX3MIX Input 2 Volume */ + { 0x00000754, 0x0000 }, /* R1876 - AIF2TX3MIX Input 3 Source */ + { 0x00000755, 0x0080 }, /* R1877 - AIF2TX3MIX Input 3 Volume */ + { 0x00000756, 0x0000 }, /* R1878 - AIF2TX3MIX Input 4 Source */ + { 0x00000757, 0x0080 }, /* R1879 - AIF2TX3MIX Input 4 Volume */ + { 0x00000758, 0x0000 }, /* R1880 - AIF2TX4MIX Input 1 Source */ + { 0x00000759, 0x0080 }, /* R1881 - AIF2TX4MIX Input 1 Volume */ + { 0x0000075A, 0x0000 }, /* R1882 - AIF2TX4MIX Input 2 Source */ + { 0x0000075B, 0x0080 }, /* R1883 - AIF2TX4MIX Input 2 Volume */ + { 0x0000075C, 0x0000 }, /* R1884 - AIF2TX4MIX Input 3 Source */ + { 0x0000075D, 0x0080 }, /* R1885 - AIF2TX4MIX Input 3 Volume */ + { 0x0000075E, 0x0000 }, /* R1886 - AIF2TX4MIX Input 4 Source */ + { 0x0000075F, 0x0080 }, /* R1887 - AIF2TX4MIX Input 4 Volume */ + { 0x00000760, 0x0000 }, /* R1888 - AIF2TX5MIX Input 1 Source */ + { 0x00000761, 0x0080 }, /* R1889 - AIF2TX5MIX Input 1 Volume */ + { 0x00000762, 0x0000 }, /* R1890 - AIF2TX5MIX Input 2 Source */ + { 0x00000763, 0x0080 }, /* R1891 - AIF2TX5MIX Input 2 Volume */ + { 0x00000764, 0x0000 }, /* R1892 - AIF2TX5MIX Input 3 Source */ + { 0x00000765, 0x0080 }, /* R1893 - AIF2TX5MIX Input 3 Volume */ + { 0x00000766, 0x0000 }, /* R1894 - AIF2TX5MIX Input 4 Source */ + { 0x00000767, 0x0080 }, /* R1895 - AIF2TX5MIX Input 4 Volume */ + { 0x00000768, 0x0000 }, /* R1896 - AIF2TX6MIX Input 1 Source */ + { 0x00000769, 0x0080 }, /* R1897 - AIF2TX6MIX Input 1 Volume */ + { 0x0000076A, 0x0000 }, /* R1898 - AIF2TX6MIX Input 2 Source */ + { 0x0000076B, 0x0080 }, /* R1899 - AIF2TX6MIX Input 2 Volume */ + { 0x0000076C, 0x0000 }, /* R1900 - AIF2TX6MIX Input 3 Source */ + { 0x0000076D, 0x0080 }, /* R1901 - AIF2TX6MIX Input 3 Volume */ + { 0x0000076E, 0x0000 }, /* R1902 - AIF2TX6MIX Input 4 Source */ + { 0x0000076F, 0x0080 }, /* R1903 - AIF2TX6MIX Input 4 Volume */ { 0x00000780, 0x0000 }, /* R1920 - AIF3TX1MIX Input 1 Source */ { 0x00000781, 0x0080 }, /* R1921 - AIF3TX1MIX Input 1 Volume */ { 0x00000782, 0x0000 }, /* R1922 - AIF3TX1MIX Input 2 Source */ @@ -1922,6 +1954,38 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME: case ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE: case ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX5MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX5MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX5MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX5MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX5MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX5MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX5MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX6MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX6MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX6MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX6MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME: case ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE: case ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME: case ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE: From c5d7433c5b2f2a6db451094a37320c62c34f5bc5 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 27 Nov 2013 14:13:23 +0000 Subject: [PATCH 0134/1167] ASoC: florida: Remove output OSR and PGA volume controls These are managed automatically in current revisions. Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 25 ------------------------- 1 file changed, 25 deletions(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 2006173e6fb..6e04c9b7ffe 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -333,19 +333,6 @@ ARIZONA_MIXER_CONTROLS("SPKDAT1R", ARIZONA_OUT5RMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("SPKDAT2L", ARIZONA_OUT6LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("SPKDAT2R", ARIZONA_OUT6RMIX_INPUT_1_SOURCE), -SOC_SINGLE("HPOUT1 High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_1L, - ARIZONA_OUT1_OSR_SHIFT, 1, 0), -SOC_SINGLE("HPOUT2 High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_2L, - ARIZONA_OUT2_OSR_SHIFT, 1, 0), -SOC_SINGLE("HPOUT3 High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_3L, - ARIZONA_OUT3_OSR_SHIFT, 1, 0), -SOC_SINGLE("Speaker High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_4L, - ARIZONA_OUT4_OSR_SHIFT, 1, 0), -SOC_SINGLE("SPKDAT1 High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_5L, - ARIZONA_OUT5_OSR_SHIFT, 1, 0), -SOC_SINGLE("SPKDAT2 High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_6L, - ARIZONA_OUT6_OSR_SHIFT, 1, 0), - SOC_DOUBLE_R("HPOUT1 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_1L, ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_MUTE_SHIFT, 1, 1), SOC_DOUBLE_R("HPOUT2 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_2L, @@ -378,18 +365,6 @@ SOC_DOUBLE_R_TLV("SPKDAT2 Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_6L, ARIZONA_DAC_DIGITAL_VOLUME_6R, ARIZONA_OUT6L_VOL_SHIFT, 0xbf, 0, digital_tlv), -SOC_DOUBLE_R_RANGE_TLV("HPOUT1 Volume", ARIZONA_OUTPUT_PATH_CONFIG_1L, - ARIZONA_OUTPUT_PATH_CONFIG_1R, - ARIZONA_OUT1L_PGA_VOL_SHIFT, - 0x34, 0x40, 0, ana_tlv), -SOC_DOUBLE_R_RANGE_TLV("HPOUT2 Volume", ARIZONA_OUTPUT_PATH_CONFIG_2L, - ARIZONA_OUTPUT_PATH_CONFIG_2R, - ARIZONA_OUT2L_PGA_VOL_SHIFT, - 0x34, 0x40, 0, ana_tlv), -SOC_DOUBLE_R_RANGE_TLV("HPOUT3 Volume", ARIZONA_OUTPUT_PATH_CONFIG_3L, - ARIZONA_OUTPUT_PATH_CONFIG_3R, - ARIZONA_OUT3L_PGA_VOL_SHIFT, 0x34, 0x40, 0, ana_tlv), - SOC_DOUBLE("SPKDAT1 Switch", ARIZONA_PDM_SPK1_CTRL_1, ARIZONA_SPK1L_MUTE_SHIFT, ARIZONA_SPK1R_MUTE_SHIFT, 1, 1), SOC_DOUBLE("SPKDAT2 Switch", ARIZONA_PDM_SPK2_CTRL_1, ARIZONA_SPK2L_MUTE_SHIFT, From ad5ea125d09384b09d08ff2612d87455c7b72a82 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 29 Nov 2013 13:33:11 +0000 Subject: [PATCH 0135/1167] ASoC: core: Use consistent byte ordering in snd_soc_bytes_get snd_soc_bytes_put treats the data in the binary control as big endian words, however snd_soc_bytes_get uses the endian of the host machine. This causes the two functions to be inconsistant with how the mask is applied on little endian machines. This patch applies the big_endian format used in snd_soc_bytes_put to snd_soc_bytes_get. Signed-off-by: Charles Keepax Signed-off-by: Mark Brown (cherry picked from commit 8f1ec93ae94e95e717283575997dd134a4c5397f) Change-Id: Id1ba54256e4963b5d3b5a388c75cf5f391a312a4 Signed-off-by: Charles Keepax --- sound/soc/soc-core.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index 99646c2d550..54be9830a14 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -3117,11 +3117,11 @@ int snd_soc_bytes_get(struct snd_kcontrol *kcontrol, break; case 2: ((u16 *)(&ucontrol->value.bytes.data))[0] - &= ~params->mask; + &= cpu_to_be16(~params->mask); break; case 4: ((u32 *)(&ucontrol->value.bytes.data))[0] - &= ~params->mask; + &= cpu_to_be32(~params->mask); break; default: return -EINVAL; From 31f3b18b0af5c8fef5e916155e7e402e19d7a682 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 2 Dec 2013 15:28:09 +0000 Subject: [PATCH 0136/1167] mfd: arizona: Do hard instead of soft reset coming out of sleep If possible to a hardware reset instead of a software reset when coming out of sleep, to ensure consistent register state. Change-Id: I6a39d191c065055229b4d7fba627468052fc87f2 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 27f3ed98de3..34593f6c36c 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -353,6 +353,16 @@ static int arizona_runtime_resume(struct device *dev) dev_dbg(arizona->dev, "Leaving AoD mode\n"); + switch (arizona->type) { + case WM5110: + case WM8280: + if (arizona->rev == 3 && arizona->pdata.reset) + gpio_set_value_cansleep(arizona->pdata.reset, 0); + break; + default: + break; + }; + ret = regulator_enable(arizona->dcvdd); if (ret != 0) { dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); @@ -365,9 +375,14 @@ static int arizona_runtime_resume(struct device *dev) case WM5110: case WM8280: if (arizona->rev == 3) { - ret = arizona_soft_reset(arizona); - if (ret != 0) - goto err; + if (!arizona->pdata.reset) { + ret = arizona_soft_reset(arizona); + if (ret != 0) + goto err; + } else { + gpio_set_value_cansleep(arizona->pdata.reset, 1); + msleep(1); + } } break; default: From 9a44889d108c5d367de95498f92b418049badb74 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 5 Dec 2013 12:01:17 +0000 Subject: [PATCH 0137/1167] regulator: arizona-micsupp: Add support for wm8280 Signed-off-by: Charles Keepax --- drivers/regulator/arizona-micsupp.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/regulator/arizona-micsupp.c b/drivers/regulator/arizona-micsupp.c index 98ebcfda5a2..dd8fad57fd7 100644 --- a/drivers/regulator/arizona-micsupp.c +++ b/drivers/regulator/arizona-micsupp.c @@ -73,6 +73,7 @@ static int arizona_micsupp_list_voltage(struct regulator_dev *rdev, struct arizona_micsupp *micsupp = rdev_get_drvdata(rdev); switch (micsupp->arizona->type) { + case WM8280: case WM5110: return arizona_micsupp_ext_sel_to_voltage(selector); default: @@ -268,6 +269,7 @@ static int arizona_micsupp_probe(struct platform_device *pdev) * platform data if provided. */ switch (arizona->type) { + case WM8280: case WM5110: desc = &arizona_micsupp_ext; micsupp->init_data = arizona_micsupp_ext_default; From 23294c607a2703c7b071bcbf7aab59d313da626d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 5 Dec 2013 12:02:23 +0000 Subject: [PATCH 0138/1167] regulator: arizona-micsupp: Add missing voltage mapping When the change to for correcting the wm5110 voltage selection was backported from mainline, required additions to the voltage mapping were omitted. This patch adds these. Signed-off-by: Charles Keepax --- drivers/regulator/arizona-micsupp.c | 49 +++++++++++++++++++++++++---- 1 file changed, 43 insertions(+), 6 deletions(-) diff --git a/drivers/regulator/arizona-micsupp.c b/drivers/regulator/arizona-micsupp.c index dd8fad57fd7..ae1970836ab 100644 --- a/drivers/regulator/arizona-micsupp.c +++ b/drivers/regulator/arizona-micsupp.c @@ -81,20 +81,57 @@ static int arizona_micsupp_list_voltage(struct regulator_dev *rdev, } } -static int arizona_micsupp_map_voltage(struct regulator_dev *rdev, - int min_uV, int max_uV) +static int arizona_micsupp_voltage_to_sel(int min_uV, int max_uV) { - unsigned int voltage; int selector; - if (min_uV < 1700000) - min_uV = 1700000; - if (min_uV > 3200000) selector = ARIZONA_MICSUPP_MAX_SELECTOR; else selector = DIV_ROUND_UP(min_uV - 1700000, 50000); + return selector; +} + +static int arizona_micsupp_ext_voltage_to_sel(int min_uV, int max_uV) +{ + int selector; + + if (min_uV > 3300000) { + selector = ARIZONA_MICSUPP_RANGE2_MAX_SELECTOR; + } else if (min_uV > 1400000) { + selector = DIV_ROUND_UP(min_uV - 1400000, 100000) + + ARIZONA_MICSUPP_RANGE1_MAX_SELECTOR; + } else { + selector = DIV_ROUND_UP(min_uV - 900000, 25000); + } + + return selector; +} + +static int arizona_micsupp_map_voltage(struct regulator_dev *rdev, + int min_uV, int max_uV) +{ + struct arizona_micsupp *micsupp = rdev_get_drvdata(rdev); + unsigned int voltage; + int selector; + + switch (micsupp->arizona->type) { + case WM8280: + case WM5110: + if (min_uV < 900000) + min_uV = 900000; + + selector = arizona_micsupp_ext_voltage_to_sel(min_uV, max_uV); + break; + default: + if (min_uV < 1700000) + min_uV = 1700000; + + selector = arizona_micsupp_voltage_to_sel(min_uV, max_uV); + break; + } + if (selector < 0) return -EINVAL; From 3e7200caa675fe8980288264de592c92a80a710f Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 3 Dec 2013 17:34:53 +0000 Subject: [PATCH 0139/1167] ASoC: wm_adsp: Add entry for trace firmware Change-Id: I7f52c60de137baacc56df1d16f0c420072396bda Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 41 +++++++++++++++++++++++++++++++++++++- 1 file changed, 40 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index b2048604f30..789d720d2d5 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -197,13 +197,14 @@ static void wm_adsp_buf_free(struct list_head *list) /* Must remain a power of two */ #define WM_ADSP_CAPTURE_BUFFER_SIZE 1048576 -#define WM_ADSP_NUM_FW 5 +#define WM_ADSP_NUM_FW 6 #define WM_ADSP_FW_MBC_VSS 0 #define WM_ADSP_FW_TX 1 #define WM_ADSP_FW_TX_SPK 2 #define WM_ADSP_FW_RX_ANC 3 #define WM_ADSP_FW_EZ2CONTROL 4 +#define WM_ADSP_FW_TRACE 5 static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_MBC_VSS] = "MBC/VSS", @@ -211,6 +212,7 @@ static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_TX_SPK] = "Tx Speaker", [WM_ADSP_FW_RX_ANC] = "Rx ANC", [WM_ADSP_FW_EZ2CONTROL] = "Ez2Control", + [WM_ADSP_FW_TRACE] = "Trace", }; struct wm_adsp_system_config_xm_hdr { @@ -305,6 +307,37 @@ static const struct wm_adsp_fw_caps ez2control_caps[] = { }, }; +struct wm_adsp_buffer_region_def trace_regions[] = { + { + .mem_type = WMFW_ADSP2_XM, + .base_offset = HOST_BUFFER_FIELD(X_buf_base), + .size_offset = HOST_BUFFER_FIELD(X_buf_size), + }, + { + .mem_type = WMFW_ADSP2_XM, + .base_offset = HOST_BUFFER_FIELD(X_buf_base2), + .size_offset = HOST_BUFFER_FIELD(X_buf_brk), + }, + { + .mem_type = WMFW_ADSP2_YM, + .base_offset = HOST_BUFFER_FIELD(Y_buf_base), + .size_offset = HOST_BUFFER_FIELD(wrap), + }, +}; + +static const struct wm_adsp_fw_caps trace_caps[] = { + { + .id = SND_AUDIOCODEC_PCM, + .desc = { + .max_ch = 8, + .sample_rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + }, + .num_host_regions = ARRAY_SIZE(trace_regions), + .host_region_defs = trace_regions, + }, +}; + static struct wm_adsp_fw_defs wm_adsp_fw[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" }, [WM_ADSP_FW_TX] = { .file = "tx" }, @@ -316,6 +349,12 @@ static struct wm_adsp_fw_defs wm_adsp_fw[WM_ADSP_NUM_FW] = { .num_caps = ARRAY_SIZE(ez2control_caps), .caps = ez2control_caps, }, + [WM_ADSP_FW_TRACE] = { + .file = "trace", + .compr_direction = SND_COMPRESS_CAPTURE, + .num_caps = ARRAY_SIZE(trace_caps), + .caps = trace_caps, + }, }; struct wm_coeff_ctl_ops { From 76b3c167210bbc74c66cf396f20513f6ffbefed8 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 4 Dec 2013 11:20:27 +0000 Subject: [PATCH 0140/1167] ASoC: florida: hook up trace capture streams Change-Id: I1a99f20b2603a182c2217805c56d18e3b9c73401 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/florida.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 6e04c9b7ffe..90e0f6edc60 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -1279,6 +1279,11 @@ static const struct snd_soc_dapm_route florida_dapm_routes[] = { { "Voice Control CPU", NULL, "SYSCLK" }, { "Voice Control DSP", NULL, "SYSCLK" }, + { "Trace CPU", NULL, "Trace DSP" }, + { "Trace DSP", NULL, "DSP1" }, + { "Trace CPU", NULL, "SYSCLK" }, + { "Trace DSP", NULL, "SYSCLK" }, + { "IN1L PGA", NULL, "IN1L" }, { "IN1R PGA", NULL, "IN1R" }, @@ -1612,6 +1617,27 @@ static struct snd_soc_dai_driver florida_dai[] = { .formats = FLORIDA_FORMATS, }, }, + { + .name = "florida-cpu-trace", + .capture = { + .stream_name = "Trace CPU", + .channels_min = 2, + .channels_max = 8, + .rates = FLORIDA_RATES, + .formats = FLORIDA_FORMATS, + }, + .compress_dai = 1, + }, + { + .name = "florida-dsp-trace", + .capture = { + .stream_name = "Trace DSP", + .channels_min = 2, + .channels_max = 8, + .rates = FLORIDA_RATES, + .formats = FLORIDA_FORMATS, + }, + }, }; static irqreturn_t adsp2_irq(int irq, void *data) From 7564373bb7082ba3c5bab8040f31bde0b07bc7b6 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 5 Dec 2013 15:52:42 +0000 Subject: [PATCH 0141/1167] ASoC: florida: select ADSP for compressed stream via codec DAI When opening a compressed stream the code previously looped through all ADSPs until it found one with a compressed-stream firmware currently selected. This isn't really valid because we can't randomly choose any ADSP, firmware and DAI combination. Since firmwares are currently hardcoded to specific ADSPs, this change selects the correct DSP based on the codec DAI. Change-Id: I5cbbd569ba3cd8edd369ed116d36d0b4a401e0d5 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/florida.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 90e0f6edc60..19cd100a1f2 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -1681,7 +1681,7 @@ static int florida_open(struct snd_compr_stream *stream) struct snd_soc_pcm_runtime *rtd = stream->private_data; struct florida_priv *florida = snd_soc_codec_get_drvdata(rtd->codec); struct arizona *arizona = florida->core.arizona; - int i, ret = 0; + int n_adsp, ret = 0; mutex_lock(&florida->compr_info.lock); @@ -1690,20 +1690,26 @@ static int florida_open(struct snd_compr_stream *stream) goto out; } - for (i = 0; i < FLORIDA_NUM_ADSP; ++i) { - if (wm_adsp_compress_supported(&florida->core.adsp[i], stream)) { - florida->compr_info.adsp = &florida->core.adsp[i]; - break; - } + if (strcmp(rtd->codec_dai->name, "florida-dsp-voicectrl") == 0) { + n_adsp = 2; + } else if (strcmp(rtd->codec_dai->name, "florida-dsp-trace") == 0) { + n_adsp = 0; + } else { + dev_err(arizona->dev, + "No suitable compressed stream for dai '%s'\n", + rtd->codec_dai->name); + ret = -EINVAL; + goto out; } - if (!florida->compr_info.adsp) { + if (!wm_adsp_compress_supported(&florida->core.adsp[n_adsp], stream)) { dev_err(arizona->dev, "No suitable firmware for compressed stream\n"); ret = -EINVAL; goto out; } + florida->compr_info.adsp = &florida->core.adsp[n_adsp]; florida->compr_info.stream = stream; out: mutex_unlock(&florida->compr_info.lock); From 2a29e416cbfb404200a7355fa327ffe0869eb441 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Sun, 8 Dec 2013 09:37:48 +0000 Subject: [PATCH 0142/1167] ASoC: wm_adsp: re-enable buffer irqs if data available If the compressed stream irq handler disables interrupts from the firmware, it must re-enable them on a subsequent stream read. Change-Id: I29e8e845d3db4d6a314fa287a159435719c971b5 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 42 +++++++++++++++++++++++++------------- 1 file changed, 28 insertions(+), 14 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 789d720d2d5..2011cf0af43 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2625,10 +2625,29 @@ static int wm_adsp_stream_capture(struct wm_adsp *adsp) return total_read * WM_ADSP_DATA_WORD_SIZE; } +static int wm_adsp_ack_buffer_interrupt(struct wm_adsp *adsp) +{ + u32 irq_ack; + int ret; + + ret = wm_adsp_host_buffer_read(adsp, + HOST_BUFFER_FIELD(irq_count), + &irq_ack); + if (ret < 0) + return ret; + + if (!adsp->buffer_drain_pending) + irq_ack |= 1; /* enable further IRQs */ + + ret = wm_adsp_host_buffer_write(adsp, + HOST_BUFFER_FIELD(irq_ack), + irq_ack); + return ret; +} + int wm_adsp_stream_handle_irq(struct wm_adsp *adsp) { int ret, bytes_captured; - u32 irq_ack; ret = wm_adsp_host_buffer_read(adsp, HOST_BUFFER_FIELD(error), @@ -2644,18 +2663,7 @@ int wm_adsp_stream_handle_irq(struct wm_adsp *adsp) if (bytes_captured < 0) return bytes_captured; - ret = wm_adsp_host_buffer_read(adsp, - HOST_BUFFER_FIELD(irq_count), - &irq_ack); - if (ret < 0) - return ret; - - if (!adsp->buffer_drain_pending) - irq_ack |= 1; /* enable further IRQs */ - - ret = wm_adsp_host_buffer_write(adsp, - HOST_BUFFER_FIELD(irq_ack), - irq_ack); + ret = wm_adsp_ack_buffer_interrupt(adsp); if (ret < 0) return ret; @@ -2666,6 +2674,7 @@ EXPORT_SYMBOL_GPL(wm_adsp_stream_handle_irq); int wm_adsp_stream_read(struct wm_adsp *adsp, char __user *buf, size_t count) { int avail, to_end; + int ret; if (!adsp->running) return -EIO; @@ -2703,9 +2712,14 @@ int wm_adsp_stream_read(struct wm_adsp *adsp, char __user *buf, size_t count) adsp->capt_buf.tail += count; adsp->capt_buf.tail &= adsp->capt_buf_size - 1; - if (adsp->buffer_drain_pending) + if (adsp->buffer_drain_pending) { wm_adsp_stream_capture(adsp); + ret = wm_adsp_ack_buffer_interrupt(adsp); + if (ret < 0) + return ret; + } + return count; } EXPORT_SYMBOL_GPL(wm_adsp_stream_read); From 60860fd1ee4fa1227897b43b8503c326fca8867f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Sun, 8 Dec 2013 13:47:32 +0000 Subject: [PATCH 0143/1167] ASoC: wm_adsp: Firmware array should be accessed through the ADSP core A couple of places in the compressed handling code were accessing the firmware array directly rather than through the ADSP core. This would cause some problems if the firmware list is specified in device tree. Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 2011cf0af43..b75383f5bf0 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2379,7 +2379,7 @@ static int wm_adsp_read_buffer(struct wm_adsp *adsp, int32_t read_index, int i, ret; /* Calculate read parameters */ - for (i = 0; i < wm_adsp_fw[adsp->fw].caps->num_host_regions; ++i) { + for (i = 0; i < adsp->firmwares[adsp->fw].caps->num_host_regions; ++i) { if (read_index < adsp->host_regions[i].cumulative_size) break; } @@ -2427,9 +2427,8 @@ static int wm_adsp_read_buffer(struct wm_adsp *adsp, int32_t read_index, static int wm_adsp_capture_block(struct wm_adsp *adsp, int *avail) { - int last_region = wm_adsp_fw[adsp->fw].caps->num_host_regions - 1; - int host_size = - adsp->host_regions[last_region].cumulative_size; + int last_region = adsp->firmwares[adsp->fw].caps->num_host_regions -1; + int host_size = adsp->host_regions[last_region].cumulative_size; int num_words; u32 next_read_index, next_write_index; int32_t write_index, read_index; From 2ba556cb330b075471dd380b876dc2c982aa3d3c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Sun, 8 Dec 2013 12:14:44 +0000 Subject: [PATCH 0144/1167] ASoC: wm_adsp: Read compressed caps from device tree Change-Id: Ib602e15931c14d79985efe6c3ba1a54c79fdf35a Signed-off-by: Charles Keepax Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 46 ++++++++++++++++++++++++++++++++++++-- sound/soc/codecs/wm_adsp.h | 2 +- 2 files changed, 45 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index b75383f5bf0..b569031ece0 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -294,7 +294,7 @@ struct wm_adsp_buffer_region_def ez2control_regions[] = { }, }; -static const struct wm_adsp_fw_caps ez2control_caps[] = { +static struct wm_adsp_fw_caps ez2control_caps[] = { { .id = SND_AUDIOCODEC_PCM, .desc = { @@ -325,7 +325,7 @@ struct wm_adsp_buffer_region_def trace_regions[] = { }, }; -static const struct wm_adsp_fw_caps trace_caps[] = { +static struct wm_adsp_fw_caps trace_caps[] = { { .id = SND_AUDIOCODEC_PCM, .desc = { @@ -2051,6 +2051,46 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, } EXPORT_SYMBOL_GPL(wm_adsp2_event); +static int wm_adsp_of_parse_caps(struct wm_adsp *adsp, + struct device_node *np, + struct wm_adsp_fw_defs *fw) +{ + int ret; + u32 of_caps[5]; + + ret = of_property_read_u32_array(np, "wlf,compr-caps", + of_caps, ARRAY_SIZE(of_caps)); + + if (ret >= 0) { + fw->num_caps = 1; + fw->caps = devm_kzalloc(adsp->dev, + sizeof(struct wm_adsp_fw_caps), + GFP_KERNEL); + if (!fw->caps) + return -ENOMEM; + + fw->caps->num_host_regions = ARRAY_SIZE(ez2control_regions); + fw->caps->host_region_defs = + devm_kzalloc(adsp->dev, + sizeof(ez2control_regions), + GFP_KERNEL); + if (!fw->caps->host_region_defs) + return -ENOMEM; + + memcpy(fw->caps->host_region_defs, + ez2control_regions, + sizeof(ez2control_regions)); + + fw->caps->id = of_caps[0]; + fw->caps->desc.max_ch = of_caps[1]; + fw->caps->desc.sample_rates = of_caps[2]; + fw->caps->desc.formats = of_caps[3]; + fw->compr_direction = of_caps[4]; + } + + return ret; +} + static int wm_adsp_of_parse_firmware(struct wm_adsp *adsp, struct device_node *np) { @@ -2102,6 +2142,8 @@ static int wm_adsp_of_parse_firmware(struct wm_adsp *adsp, if (ret < 0) adsp->firmwares[i].binfile = NULL; + wm_adsp_of_parse_caps(adsp, fw, &adsp->firmwares[i]); + i++; } diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index dc9326c7e89..da0648cf3a2 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -62,7 +62,7 @@ struct wm_adsp_fw_defs { const char *binfile; int compr_direction; int num_caps; - const struct wm_adsp_fw_caps *caps; + struct wm_adsp_fw_caps *caps; }; struct wm_adsp { From 4056af38b1ae28ae362292cb8e91279ffe514d1f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 9 Dec 2013 09:51:34 +0000 Subject: [PATCH 0145/1167] ASoC: wm_adsp: Fix regression for version 0 firmwares Large controls would no longer be created correctly for version 0 firmwares. This patch corrects this. Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 34 +++++++++++++++++++--------------- 1 file changed, 19 insertions(+), 15 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index b569031ece0..56b7a2bd78e 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -381,7 +381,8 @@ struct wm_coeff_ctl { }; static int wm_adsp_create_grouped_control(struct wm_adsp *dsp, - struct wm_adsp_alg_region *region); + struct wm_adsp_alg_region *region, + bool create); static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) @@ -1134,7 +1135,8 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, } static int wm_adsp_create_grouped_control(struct wm_adsp *dsp, - struct wm_adsp_alg_region *region) + struct wm_adsp_alg_region *region, + bool create) { size_t len = region->len, offset = 0; struct wm_adsp_alg_region *r; @@ -1167,11 +1169,13 @@ static int wm_adsp_create_grouped_control(struct wm_adsp *dsp, else r->len = len - offset; offset += r->len; - /* We do not need to create the control for this new - * region as it will be created once we reach the region - * whilst processing the alg_regions list. - */ + list_add_tail(&r->list, &dsp->alg_regions); + if (create) { + ret = wm_adsp_create_control(dsp, r); + if (ret < 0) + return ret; + } } while (offset < len); return 0; @@ -1297,7 +1301,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) wm_adsp1_fixup_region_base(dsp, &adsp1_alg_tmp); list_for_each_entry(region, &dsp->alg_regions, list) { if (region->alg == be32_to_cpu(adsp1_alg_tmp.alg.id)) - wm_adsp_create_grouped_control(dsp, region); + wm_adsp_create_grouped_control(dsp, region, false); } } else { region = kzalloc(sizeof(*region), GFP_KERNEL); @@ -1352,7 +1356,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) wm_adsp2_fixup_region_base(dsp, &adsp2_alg_tmp); list_for_each_entry(region, &dsp->alg_regions, list) { if (region->alg == be32_to_cpu(adsp2_alg_tmp.alg.id)) - wm_adsp_create_grouped_control(dsp, region); + wm_adsp_create_grouped_control(dsp, region, false); } } else { region = kzalloc(sizeof(*region), GFP_KERNEL); @@ -1442,7 +1446,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) wm_adsp1_fixup_region_base(dsp, &adsp1_alg[i]); list_for_each_entry(region, &dsp->alg_regions, list) { if (region->alg == be32_to_cpu(adsp1_alg[i].alg.id)) - wm_adsp_create_grouped_control(dsp, region); + wm_adsp_create_grouped_control(dsp, region, false); } } else { region = kzalloc(sizeof(*region), GFP_KERNEL); @@ -1457,7 +1461,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len = be32_to_cpu(adsp1_alg[i + 1].dm); region->len -= be32_to_cpu(adsp1_alg[i].dm); region->len *= 4; - wm_adsp_create_grouped_control(dsp, region); + wm_adsp_create_grouped_control(dsp, region, true); } else { adsp_warn(dsp, "Missing length info for region DM with ID %x\n", be32_to_cpu(adsp1_alg[i].alg.id)); @@ -1475,7 +1479,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len = be32_to_cpu(adsp1_alg[i + 1].zm); region->len -= be32_to_cpu(adsp1_alg[i].zm); region->len *= 4; - wm_adsp_create_grouped_control(dsp, region); + wm_adsp_create_grouped_control(dsp, region, true); } else { adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", be32_to_cpu(adsp1_alg[i].alg.id)); @@ -1498,7 +1502,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) wm_adsp2_fixup_region_base(dsp, &adsp2_alg[i]); list_for_each_entry(region, &dsp->alg_regions, list) { if (region->alg == be32_to_cpu(adsp2_alg[i].alg.id)) - wm_adsp_create_grouped_control(dsp, region); + wm_adsp_create_grouped_control(dsp, region, false); } } else { region = kzalloc(sizeof(*region), GFP_KERNEL); @@ -1513,7 +1517,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len = be32_to_cpu(adsp2_alg[i + 1].xm); region->len -= be32_to_cpu(adsp2_alg[i].xm); region->len *= 4; - wm_adsp_create_grouped_control(dsp, region); + wm_adsp_create_grouped_control(dsp, region, true); } else { adsp_warn(dsp, "Missing length info for region XM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); @@ -1531,7 +1535,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len = be32_to_cpu(adsp2_alg[i + 1].ym); region->len -= be32_to_cpu(adsp2_alg[i].ym); region->len *= 4; - wm_adsp_create_grouped_control(dsp, region); + wm_adsp_create_grouped_control(dsp, region, true); } else { adsp_warn(dsp, "Missing length info for region YM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); @@ -1549,7 +1553,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len = be32_to_cpu(adsp2_alg[i + 1].zm); region->len -= be32_to_cpu(adsp2_alg[i].zm); region->len *= 4; - wm_adsp_create_grouped_control(dsp, region); + wm_adsp_create_grouped_control(dsp, region, true); } else { adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); From 1cc958fa88c6c54ad9962e323e3f6fa4c7475fec Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 10 Dec 2013 14:23:47 +0000 Subject: [PATCH 0146/1167] ASoC: arizona: Increase MAX_DAI MAX_DAI was not increased when the debug capture DAI drivers were added. This patch fixes this and adds a build check to ensure this doesn't happen in future updates. Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.h | 2 +- sound/soc/codecs/florida.c | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index f3653415493..02efb5e5cdf 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -57,7 +57,7 @@ #define ARIZONA_CLK_98MHZ 5 #define ARIZONA_CLK_147MHZ 6 -#define ARIZONA_MAX_DAI 8 +#define ARIZONA_MAX_DAI 10 #define ARIZONA_MAX_ADSP 4 struct arizona; diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 19cd100a1f2..7dff0012d23 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -1982,6 +1982,8 @@ static int florida_probe(struct platform_device *pdev) struct florida_priv *florida; int i, ret; + BUILD_BUG_ON(ARRAY_SIZE(florida_dai) > ARIZONA_MAX_DAI); + florida = devm_kzalloc(&pdev->dev, sizeof(struct florida_priv), GFP_KERNEL); if (florida == NULL) From 707756b2fa0aac075050c8c8c8ec15b79666ce8e Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 10 Sep 2013 13:07:22 +0100 Subject: [PATCH 0147/1167] ASoC: florida: Add FSH for ISRCs Currently, the driver only supports configuration of the lower sample rate (FSL) on the ISRCs. With the higher rate being fixed a SYSCLK, this patch adds support for configuring the higher sample rate (FSH). Change-Id: I4987e4658204d54d2e551fec2b32110dadcc650b Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 16 ++++++++++++++++ sound/soc/codecs/arizona.h | 1 + sound/soc/codecs/florida.c | 3 +++ 3 files changed, 20 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 4612158dd31..a5fbe700215 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -488,6 +488,22 @@ const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE] = { EXPORT_SYMBOL_GPL(arizona_rate_val); +const struct soc_enum arizona_isrc_fsh[] = { + SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_1, + ARIZONA_ISRC1_FSH_SHIFT, 0xf, + ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_2_CTRL_1, + ARIZONA_ISRC2_FSH_SHIFT, 0xf, + ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_3_CTRL_1, + ARIZONA_ISRC3_FSH_SHIFT, 0xf, + ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), +}; +EXPORT_SYMBOL_GPL(arizona_isrc_fsh); + const struct soc_enum arizona_isrc_fsl[] = { SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_2, ARIZONA_ISRC1_FSL_SHIFT, 0xf, diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 02efb5e5cdf..fb45bb01f86 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -186,6 +186,7 @@ extern const char *arizona_rate_text[ARIZONA_RATE_ENUM_SIZE]; extern const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE]; extern const struct soc_enum arizona_isrc_fsl[]; +extern const struct soc_enum arizona_isrc_fsh[]; extern const struct soc_enum arizona_in_vi_ramp; extern const struct soc_enum arizona_in_vd_ramp; diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 7dff0012d23..8ae9bff4cbc 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -304,6 +304,9 @@ SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), SOC_VALUE_ENUM("ISRC3 FSL", arizona_isrc_fsl[2]), +SOC_VALUE_ENUM("ISRC1 FSH", arizona_isrc_fsh[0]), +SOC_VALUE_ENUM("ISRC2 FSH", arizona_isrc_fsh[1]), +SOC_VALUE_ENUM("ISRC3 FSH", arizona_isrc_fsh[2]), ARIZONA_MIXER_CONTROLS("DSP1L", ARIZONA_DSP1LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("DSP1R", ARIZONA_DSP1RMIX_INPUT_1_SOURCE), From 9d95560137f70a2e6a9a2f400872f1c3e3e57900 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 12 Dec 2013 10:55:20 +0000 Subject: [PATCH 0148/1167] ASoC: florida: Add support for ASRC RATE 1 Add support for configuring the sample rate on the SYSCLK side of the ASRC. Change-Id: I5aa820ef4f3c46e2304b714da9a3ff8c6a5d3e13 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 7 +++++++ sound/soc/codecs/arizona.h | 1 + sound/soc/codecs/florida.c | 1 + 3 files changed, 9 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index a5fbe700215..fa31a104711 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -520,6 +520,13 @@ const struct soc_enum arizona_isrc_fsl[] = { }; EXPORT_SYMBOL_GPL(arizona_isrc_fsl); +const struct soc_enum arizona_asrc_rate1 = + SOC_VALUE_ENUM_SINGLE(ARIZONA_ASRC_RATE1, + ARIZONA_ASRC_RATE1_SHIFT, 0xf, + ARIZONA_RATE_ENUM_SIZE - 1, + arizona_rate_text, arizona_rate_val); +EXPORT_SYMBOL_GPL(arizona_asrc_rate1); + static const char *arizona_vol_ramp_text[] = { "0ms/6dB", "0.5ms/6dB", "1ms/6dB", "2ms/6dB", "4ms/6dB", "8ms/6dB", "15ms/6dB", "30ms/6dB", diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index fb45bb01f86..30352209e40 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -187,6 +187,7 @@ extern const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE]; extern const struct soc_enum arizona_isrc_fsl[]; extern const struct soc_enum arizona_isrc_fsh[]; +extern const struct soc_enum arizona_asrc_rate1; extern const struct soc_enum arizona_in_vi_ramp; extern const struct soc_enum arizona_in_vd_ramp; diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 8ae9bff4cbc..2f627fafb6b 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -307,6 +307,7 @@ SOC_VALUE_ENUM("ISRC3 FSL", arizona_isrc_fsl[2]), SOC_VALUE_ENUM("ISRC1 FSH", arizona_isrc_fsh[0]), SOC_VALUE_ENUM("ISRC2 FSH", arizona_isrc_fsh[1]), SOC_VALUE_ENUM("ISRC3 FSH", arizona_isrc_fsh[2]), +SOC_VALUE_ENUM("ASRC RATE 1", arizona_asrc_rate1), ARIZONA_MIXER_CONTROLS("DSP1L", ARIZONA_DSP1LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("DSP1R", ARIZONA_DSP1RMIX_INPUT_1_SOURCE), From 52c1f3cc004b2c554d32a6cf178a3e50aa9b3a3f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 17 Dec 2013 11:26:00 +0000 Subject: [PATCH 0149/1167] ASoC: florida: Correct HPOUT3 DAPM route typo Reported-by: Kyung-Kwee Ryu Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 2f627fafb6b..21092e2f694 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -1425,7 +1425,7 @@ static const struct snd_soc_dapm_route florida_dapm_routes[] = { { "AEC Loopback", "HPOUT3L", "OUT3L" }, { "AEC Loopback", "HPOUT3R", "OUT3R" }, { "HPOUT3L", NULL, "OUT3L" }, - { "HPOUT3R", NULL, "OUT3L" }, + { "HPOUT3R", NULL, "OUT3R" }, { "AEC Loopback", "SPKOUTL", "OUT4L" }, { "SPKOUTLN", NULL, "OUT4L" }, From c5e5d671e15b3b930ae12f6c72ab087548b75761 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 17 Dec 2013 16:51:26 +0000 Subject: [PATCH 0150/1167] ASoC: wm_adsp: Remove duplicate info message for DSP RAM ready Change-Id: Ia9bb3f41253eefe22ef8559935b9499b1069b4ee Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 56b7a2bd78e..899c66de53a 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1893,7 +1893,6 @@ static int wm_adsp2_ena(struct wm_adsp *dsp) } adsp_dbg(dsp, "RAM ready after %d polls\n", count); - adsp_info(dsp, "RAM ready after %d polls\n", count); return 0; } From cbb27ab0685a22e018f67c39d0d45c45609f4548 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 17 Dec 2013 15:35:49 +0000 Subject: [PATCH 0151/1167] ASoC: wm_adsp: Add small delay whilst polling DSP RAM start Some devices are getting very close to the limit whilst polling the RAM start, this patch adds a small delay to this loop to give a more deterministic startup timeout. Change-Id: I1f316766a68f9b319a774221760144ba7961a9d1 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 899c66de53a..427c7c78722 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1879,13 +1879,17 @@ static int wm_adsp2_ena(struct wm_adsp *dsp) return ret; /* Wait for the RAM to start, should be near instantaneous */ - count = 0; - do { + for (count = 0; count < 10; ++count) { ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1, &val); if (ret != 0) return ret; - } while (!(val & ADSP2_RAM_RDY) && ++count < 10); + + if (val & ADSP2_RAM_RDY) + break; + + msleep(1); + } if (!(val & ADSP2_RAM_RDY)) { adsp_err(dsp, "Failed to start DSP RAM\n"); From 67dfb1389091c29af8e9d5a37193d7ed1c41e25e Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 17 Dec 2013 11:40:25 +0000 Subject: [PATCH 0152/1167] mfd: florida: Expose DRE control registers Certain use-cases require the DRE to be disabled so expose controls for the enables. Change-Id: Ia92405555254d9d4add850a9b3bfde27daf2dea5 Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 2 ++ include/linux/mfd/arizona/registers.h | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 5701b55a020..01094a40fe4 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -630,6 +630,7 @@ static const struct reg_default florida_reg_default[] = { { 0x0000043D, 0x0180 }, /* R1085 - DAC Digital Volume 6R */ { 0x0000043E, 0x0080 }, /* R1086 - DAC Volume Limit 6R */ { 0x0000043F, 0x0800 }, /* R1087 - Noise Gate Select 6R */ + { 0x00000440, 0x8FFF }, /* R1088 - DRE Enable */ { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */ { 0x00000458, 0x0000 }, /* R1112 - Noise Gate Control */ { 0x00000480, 0x0040 }, /* R1152 - Class W ANC Threshold 1 */ @@ -1669,6 +1670,7 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DAC_DIGITAL_VOLUME_6R: case ARIZONA_DAC_VOLUME_LIMIT_6R: case ARIZONA_NOISE_GATE_SELECT_6R: + case ARIZONA_DRE_ENABLE: case ARIZONA_DAC_AEC_CONTROL_1: case ARIZONA_NOISE_GATE_CONTROL: case ARIZONA_PDM_SPK1_CTRL_1: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 6e1011b5e9a..e38b3aff570 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -3235,6 +3235,10 @@ /* * R1088 (0x440) - DRE Enable */ +#define ARIZONA_DRE3R_ENA 0x0020 /* DRE3L_ENA */ +#define ARIZONA_DRE3R_ENA_MASK 0x0020 /* DRE3L_ENA */ +#define ARIZONA_DRE3R_ENA_SHIFT 5 /* DRE3L_ENA */ +#define ARIZONA_DRE3R_ENA_WIDTH 1 /* DRE3L_ENA */ #define ARIZONA_DRE3L_ENA 0x0010 /* DRE3L_ENA */ #define ARIZONA_DRE3L_ENA_MASK 0x0010 /* DRE3L_ENA */ #define ARIZONA_DRE3L_ENA_SHIFT 4 /* DRE3L_ENA */ From fafd05f9076676512864353159421908b972af9f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 17 Dec 2013 11:36:21 +0000 Subject: [PATCH 0153/1167] ASoC: florida: Expose switch controls for DRE Certain use-cases require the DRE to be disabled so expose controls for the enables. Change-Id: I804b1d0605d4c5182c3c233291f98a0128a2d715 Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 21092e2f694..615182b9479 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -374,6 +374,13 @@ SOC_DOUBLE("SPKDAT1 Switch", ARIZONA_PDM_SPK1_CTRL_1, ARIZONA_SPK1L_MUTE_SHIFT, SOC_DOUBLE("SPKDAT2 Switch", ARIZONA_PDM_SPK2_CTRL_1, ARIZONA_SPK2L_MUTE_SHIFT, ARIZONA_SPK2R_MUTE_SHIFT, 1, 1), +SOC_DOUBLE("HPOUT1 DRE Switch", ARIZONA_DRE_ENABLE, + ARIZONA_DRE1L_ENA_SHIFT, ARIZONA_DRE1R_ENA_SHIFT, 1, 0), +SOC_DOUBLE("HPOUT2 DRE Switch", ARIZONA_DRE_ENABLE, + ARIZONA_DRE2L_ENA_SHIFT, ARIZONA_DRE2R_ENA_SHIFT, 1, 0), +SOC_DOUBLE("HPOUT3 DRE Switch", ARIZONA_DRE_ENABLE, + ARIZONA_DRE3L_ENA_SHIFT, ARIZONA_DRE3R_ENA_SHIFT, 1, 0), + SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp), SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp), From 82bbf9028e249fc06f0edbba15eeccd82c16f101 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 18 Dec 2013 11:14:24 +0000 Subject: [PATCH 0154/1167] ASoC: wm_adsp: Add EDAC firmware Change-Id: I9091b7fd677d0a89e7965c064286aafdcf1acb52 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 427c7c78722..b4f023d7c20 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -197,7 +197,7 @@ static void wm_adsp_buf_free(struct list_head *list) /* Must remain a power of two */ #define WM_ADSP_CAPTURE_BUFFER_SIZE 1048576 -#define WM_ADSP_NUM_FW 6 +#define WM_ADSP_NUM_FW 7 #define WM_ADSP_FW_MBC_VSS 0 #define WM_ADSP_FW_TX 1 @@ -205,6 +205,7 @@ static void wm_adsp_buf_free(struct list_head *list) #define WM_ADSP_FW_RX_ANC 3 #define WM_ADSP_FW_EZ2CONTROL 4 #define WM_ADSP_FW_TRACE 5 +#define WM_ADSP_FW_EDAC 6 static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_MBC_VSS] = "MBC/VSS", @@ -213,6 +214,7 @@ static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_RX_ANC] = "Rx ANC", [WM_ADSP_FW_EZ2CONTROL] = "Ez2Control", [WM_ADSP_FW_TRACE] = "Trace", + [WM_ADSP_FW_EDAC] = "EDAC", }; struct wm_adsp_system_config_xm_hdr { @@ -355,6 +357,7 @@ static struct wm_adsp_fw_defs wm_adsp_fw[WM_ADSP_NUM_FW] = { .num_caps = ARRAY_SIZE(trace_caps), .caps = trace_caps, }, + [WM_ADSP_FW_EDAC] = { .file = "edac" }, }; struct wm_coeff_ctl_ops { From eec5cf448741e76525281fd771c53ac582070ab9 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 18 Dec 2013 16:55:21 +0000 Subject: [PATCH 0155/1167] ASoC: wm_adsp: Move ADSP2 cores to be powered as a DAPM pre event PGAs often control the output from a chip and if the DSP is also marked as a PGA it may be powered up after the output has been enabled. This patch changes the ADSP2 cores to be powered up during the DAPM pre event so they are powered up before any outputs. Move the powering up to a pre-event is also a step along the path of factoring out the DSP core bring up so it can be run asynchronously to the rest of the path bring up and it would be where we would wait for the initial bring completion to finish. Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 2 +- sound/soc/codecs/wm_adsp.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index b4f023d7c20..eb947c2de37 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1921,7 +1921,7 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, dsp->card = codec->card; switch (event) { - case SND_SOC_DAPM_POST_PMU: + case SND_SOC_DAPM_PRE_PMU: /* * For simplicity set the DSP clock rate to be the * SYSCLK rate rather than making it configurable. diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index da0648cf3a2..e74c3553280 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -110,12 +110,12 @@ struct wm_adsp { #define WM_ADSP1(wname, num) \ { .id = snd_soc_dapm_pga, .name = wname, .reg = SND_SOC_NOPM, \ .shift = num, .event = wm_adsp1_event, \ - .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD } + .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD } #define WM_ADSP2(wname, num) \ { .id = snd_soc_dapm_pga, .name = wname, .reg = SND_SOC_NOPM, \ .shift = num, .event = wm_adsp2_event, \ - .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD } + .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD } extern const struct snd_kcontrol_new wm_adsp1_fw_controls[]; extern const struct snd_kcontrol_new wm_adsp2_fw_controls[]; From 22d03211f57e0f09b8c564636cbb64abea2d0cf3 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 18 Dec 2013 14:09:59 +0000 Subject: [PATCH 0156/1167] mfd: arizona: Addition to suspend proceedure Evalution of the device has suggested additions to the suspend proceedure for optimal performance. Change-Id: I641e4d21608c4370c2ca14cc3179e0fba7c6f340 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 34593f6c36c..7d474fd6fbf 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -469,6 +469,15 @@ static int arizona_runtime_suspend(struct device *dev) } } + switch (arizona->type) { + case WM5110: + case WM8280: + regmap_write(arizona->regmap, 0x221, 0x000); + break; + default: + break; + } + regcache_cache_only(arizona->regmap, true); regcache_mark_dirty(arizona->regmap); regulator_disable(arizona->dcvdd); From 82592221047aaf74489cb18fd4c7b62b532ba5f7 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 20 Dec 2013 16:38:39 +0000 Subject: [PATCH 0157/1167] Revert "mfd: arizona: Addition to suspend proceedure" This reverts commit 22d03211f57e0f09b8c564636cbb64abea2d0cf3 This fix has been superceeded by a newer solution that will be released shortly. Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 7d474fd6fbf..34593f6c36c 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -469,15 +469,6 @@ static int arizona_runtime_suspend(struct device *dev) } } - switch (arizona->type) { - case WM5110: - case WM8280: - regmap_write(arizona->regmap, 0x221, 0x000); - break; - default: - break; - } - regcache_cache_only(arizona->regmap, true); regcache_mark_dirty(arizona->regmap); regulator_disable(arizona->dcvdd); From 749980d83cddfe74409891ef373867ebe780ec97 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 19 Dec 2013 16:34:12 +0000 Subject: [PATCH 0158/1167] mfd: florida: Add registers for headphone short circuit control Change-Id: Ifa8f4957a3b2c5cce2dbcc0d9ee9dc55cc09d5d9 Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 6 ++++++ include/linux/mfd/arizona/registers.h | 27 +++++++++++++++++++++++++++ 2 files changed, 33 insertions(+) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 01094a40fe4..893f1ca93e9 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -639,6 +639,9 @@ static const struct reg_default florida_reg_default[] = { { 0x00000491, 0x0000 }, /* R1169 - PDM SPK1 CTRL 2 */ { 0x00000492, 0x0069 }, /* R1170 - PDM SPK2 CTRL 1 */ { 0x00000493, 0x0000 }, /* R1171 - PDM SPK2 CTRL 2 */ + { 0x000004A0, 0x3480 }, /* R1184 - HP1 Short Circuit Ctrl */ + { 0x000004A1, 0x3480 }, /* R1185 - HP2 Short Circuit Ctrl */ + { 0x000004A2, 0x3480 }, /* R1186 - HP3 Short Circuit Ctrl */ { 0x00000500, 0x000C }, /* R1280 - AIF1 BCLK Ctrl */ { 0x00000501, 0x0008 }, /* R1281 - AIF1 Tx Pin Ctrl */ { 0x00000502, 0x0000 }, /* R1282 - AIF1 Rx Pin Ctrl */ @@ -1677,6 +1680,9 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_PDM_SPK1_CTRL_2: case ARIZONA_PDM_SPK2_CTRL_1: case ARIZONA_PDM_SPK2_CTRL_2: + case ARIZONA_HP1_SHORT_CIRCUIT_CTRL: + case ARIZONA_HP2_SHORT_CIRCUIT_CTRL: + case ARIZONA_HP3_SHORT_CIRCUIT_CTRL: case ARIZONA_SPK_CTRL_3: case ARIZONA_AIF1_BCLK_CTRL: case ARIZONA_AIF1_TX_PIN_CTRL: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index e38b3aff570..1b466778f37 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -234,6 +234,9 @@ #define ARIZONA_PDM_SPK1_CTRL_2 0x491 #define ARIZONA_PDM_SPK2_CTRL_1 0x492 #define ARIZONA_PDM_SPK2_CTRL_2 0x493 +#define ARIZONA_HP1_SHORT_CIRCUIT_CTRL 0x4A0 +#define ARIZONA_HP2_SHORT_CIRCUIT_CTRL 0x4A1 +#define ARIZONA_HP3_SHORT_CIRCUIT_CTRL 0x4A2 #define ARIZONA_SPK_CTRL_2 0x4B5 #define ARIZONA_SPK_CTRL_3 0x4B6 #define ARIZONA_DAC_COMP_1 0x4DC @@ -3360,6 +3363,30 @@ #define ARIZONA_SPK2_FMT_SHIFT 0 /* SPK2_FMT */ #define ARIZONA_SPK2_FMT_WIDTH 1 /* SPK2_FMT */ +/* + * R1184 (0x4A0) - HP1 Short Circuit Ctrl + */ +#define ARIZONA_HP1_SC_ENA 0x1000 /* HP1_SC_ENA */ +#define ARIZONA_HP1_SC_ENA_MASK 0x1000 /* HP1_SC_ENA */ +#define ARIZONA_HP1_SC_ENA_SHIFT 12 /* HP1_SC_ENA */ +#define ARIZONA_HP1_SC_ENA_WIDTH 1 /* HP1_SC_ENA */ + +/* + * R1185 (0x4A1) - HP2 Short Circuit Ctrl + */ +#define ARIZONA_HP2_SC_ENA 0x1000 /* HP2_SC_ENA */ +#define ARIZONA_HP2_SC_ENA_MASK 0x1000 /* HP2_SC_ENA */ +#define ARIZONA_HP2_SC_ENA_SHIFT 12 /* HP2_SC_ENA */ +#define ARIZONA_HP2_SC_ENA_WIDTH 1 /* HP2_SC_ENA */ + +/* + * R1186 (0x4A2) - HP3 Short Circuit Ctrl + */ +#define ARIZONA_HP3_SC_ENA 0x1000 /* HP3_SC_ENA */ +#define ARIZONA_HP3_SC_ENA_MASK 0x1000 /* HP3_SC_ENA */ +#define ARIZONA_HP3_SC_ENA_SHIFT 12 /* HP3_SC_ENA */ +#define ARIZONA_HP3_SC_ENA_WIDTH 1 /* HP3_SC_ENA */ + /* * R1244 (0x4DC) - DAC comp 1 */ From 25b9e0cb32fb3559fb46a14cf4684b35986dcb24 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 19 Dec 2013 16:37:02 +0000 Subject: [PATCH 0159/1167] ASoC: florida: Add controls for headphone short circuit protection Change-Id: I34b60710dc83ec7fb3fbb7fb1cc1c44124624f10 Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 615182b9479..aed3d1e3002 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -337,6 +337,13 @@ ARIZONA_MIXER_CONTROLS("SPKDAT1R", ARIZONA_OUT5RMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("SPKDAT2L", ARIZONA_OUT6LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("SPKDAT2R", ARIZONA_OUT6RMIX_INPUT_1_SOURCE), +SOC_SINGLE("HPOUT1 SC Protect", ARIZONA_HP1_SHORT_CIRCUIT_CTRL, + ARIZONA_HP1_SC_ENA_SHIFT, 1, 0), +SOC_SINGLE("HPOUT2 SC Protect", ARIZONA_HP2_SHORT_CIRCUIT_CTRL, + ARIZONA_HP2_SC_ENA_SHIFT, 1, 0), +SOC_SINGLE("HPOUT3 SC Protect", ARIZONA_HP3_SHORT_CIRCUIT_CTRL, + ARIZONA_HP3_SC_ENA_SHIFT, 1, 0), + SOC_DOUBLE_R("HPOUT1 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_1L, ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_MUTE_SHIFT, 1, 1), SOC_DOUBLE_R("HPOUT2 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_2L, From 549d28a9bdbe411cbc0e61a26c6a5a562d7890de Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 20 Dec 2013 10:10:56 +0000 Subject: [PATCH 0160/1167] ASoC: florida: Make sample rates 2 and 3 fully configurable Change-Id: I125b45bd7f0a6251ef3199d7813f9cd4a5569148 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 30 ++++++++++++++++++++++++++++-- sound/soc/codecs/arizona.h | 5 +++++ sound/soc/codecs/florida.c | 9 +++------ 3 files changed, 36 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index fa31a104711..d3181239b88 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -477,8 +477,35 @@ EXPORT_SYMBOL_GPL(arizona_mixer_values); const DECLARE_TLV_DB_SCALE(arizona_mixer_tlv, -3200, 100, 0); EXPORT_SYMBOL_GPL(arizona_mixer_tlv); +const char *arizona_sample_rate_text[ARIZONA_SAMPLE_RATE_ENUM_SIZE] = { + "12kHz", "24kHz", "48kHz", "96kHz", "192kHz", + "11.025kHz", "22.05kHz", "44.1kHz", "88.2kHz", "176.4kHz", + "4kHz", "8kHz", "16kHz", "32kHz", +}; +EXPORT_SYMBOL_GPL(arizona_sample_rate_text); + +const int arizona_sample_rate_val[ARIZONA_SAMPLE_RATE_ENUM_SIZE] = { + 0x01, 0x02, 0x03, 0x04, 0x05, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, + 0x10, 0x11, 0x12, 0x13, +}; +EXPORT_SYMBOL_GPL(arizona_sample_rate_val); + +const struct soc_enum arizona_sample_rate[] = { + SOC_VALUE_ENUM_SINGLE(ARIZONA_SAMPLE_RATE_2, + ARIZONA_SAMPLE_RATE_2_SHIFT, 0x1f, + ARIZONA_SAMPLE_RATE_ENUM_SIZE, + arizona_sample_rate_text, + arizona_sample_rate_val), + SOC_VALUE_ENUM_SINGLE(ARIZONA_SAMPLE_RATE_3, + ARIZONA_SAMPLE_RATE_3_SHIFT, 0x1f, + ARIZONA_SAMPLE_RATE_ENUM_SIZE, + arizona_sample_rate_text, + arizona_sample_rate_val), +}; +EXPORT_SYMBOL_GPL(arizona_sample_rate); + const char *arizona_rate_text[ARIZONA_RATE_ENUM_SIZE] = { - "SYNCCLK rate", "8kHz", "16kHz", "ASYNCCLK rate", + "SYNCCLK rate 1", "SYNCCLK rate 2", "SYNCCLK rate 3", "ASYNCCLK rate", }; EXPORT_SYMBOL_GPL(arizona_rate_text); @@ -487,7 +514,6 @@ const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE] = { }; EXPORT_SYMBOL_GPL(arizona_rate_val); - const struct soc_enum arizona_isrc_fsh[] = { SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_1, ARIZONA_ISRC1_FSH_SHIFT, 0xf, diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 30352209e40..fd5e8825f1a 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -182,9 +182,14 @@ extern int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS]; ARIZONA_MIXER_ROUTES(name, name "R") #define ARIZONA_RATE_ENUM_SIZE 4 +#define ARIZONA_SAMPLE_RATE_ENUM_SIZE 14 + extern const char *arizona_rate_text[ARIZONA_RATE_ENUM_SIZE]; extern const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE]; +extern const char *arizona_sample_rate_text[ARIZONA_SAMPLE_RATE_ENUM_SIZE]; +extern const int arizona_sample_rate_val[ARIZONA_SAMPLE_RATE_ENUM_SIZE]; +extern const struct soc_enum arizona_sample_rate[]; extern const struct soc_enum arizona_isrc_fsl[]; extern const struct soc_enum arizona_isrc_fsh[]; extern const struct soc_enum arizona_asrc_rate1; diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index aed3d1e3002..6a1a129c7a3 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -301,6 +301,9 @@ SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode), SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode), SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), +SOC_VALUE_ENUM("Sample Rate 2", arizona_sample_rate[0]), +SOC_VALUE_ENUM("Sample Rate 3", arizona_sample_rate[1]), + SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), SOC_VALUE_ENUM("ISRC3 FSL", arizona_isrc_fsl[2]), @@ -2045,12 +2048,6 @@ static int florida_probe(struct platform_device *pdev) ARIZONA_IRQ_FLL2_LOCK, ARIZONA_IRQ_FLL2_CLOCK_OK, &florida->fll[1]); - /* SR2 fixed at 8kHz, SR3 fixed at 16kHz */ - regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_2, - ARIZONA_SAMPLE_RATE_2_MASK, 0x11); - regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_3, - ARIZONA_SAMPLE_RATE_3_MASK, 0x12); - for (i = 0; i < ARRAY_SIZE(florida_dai); i++) arizona_init_dai(&florida->core, i); From 34efcd273fd92cfeea130a6fcdc9e14f59717497 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 20 Dec 2013 10:41:22 +0000 Subject: [PATCH 0161/1167] mfd: arizona: Factor out SYSCLK enable and hardware patch wm5102 applies a custom hardware boot sequence, for this the SYSCLK needs to be enabled. This patch factors out that SYSCLK enabling proceedure such that it can be used for other purposes. Change-Id: I74b61d269277a00f8f894543ebbab46c17df3b58 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 48 ++++++++++++++++++++++++-------------- 1 file changed, 31 insertions(+), 17 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 34593f6c36c..8ca1037a200 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -246,7 +246,8 @@ static int arizona_wait_for_boot(struct arizona *arizona) return ret; } -static int arizona_apply_hardware_patch(struct arizona* arizona) +static int arizona_exec_with_sysclk(struct arizona* arizona, + int (*exec)(struct arizona*)) { unsigned int fll, sysclk; int ret, err; @@ -290,23 +291,8 @@ static int arizona_apply_hardware_patch(struct arizona* arizona) goto err_fll; } - /* Start the write sequencer and wait for it to finish */ - ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, - ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); - if (ret != 0) { - dev_err(arizona->dev, "Failed to start write sequencer: %d\n", - ret); - goto err_sysclk; - } - ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1, - ARIZONA_WSEQ_BUSY, 0); - if (ret != 0) { - regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, - ARIZONA_WSEQ_ABORT); - ret = -ETIMEDOUT; - } + ret = exec(arizona); -err_sysclk: err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk); if (err != 0) { dev_err(arizona->dev, @@ -330,6 +316,34 @@ static int arizona_apply_hardware_patch(struct arizona* arizona) return err; } +static int arizona_hardware_patch_wseq(struct arizona* arizona) +{ + int ret; + + /* Start the write sequencer and wait for it to finish */ + ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, + ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); + if (ret != 0) { + dev_err(arizona->dev, "Failed to start write sequencer: %d\n", + ret); + return ret; + } + ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1, + ARIZONA_WSEQ_BUSY, 0); + if (ret != 0) { + regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, + ARIZONA_WSEQ_ABORT); + ret = -ETIMEDOUT; + } + + return ret; +} + +static int arizona_apply_hardware_patch(struct arizona* arizona) +{ + return arizona_exec_with_sysclk(arizona, arizona_hardware_patch_wseq); +} + static int arizona_soft_reset(struct arizona *arizona) { int ret; From e221e6008ce1191797f71cf62f07bc2a3ad8ec15 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 20 Dec 2013 10:48:24 +0000 Subject: [PATCH 0162/1167] mfd: arizona: Add register patch ensuring a clean exit from low power Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 8ca1037a200..2bd541a4f7b 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -344,6 +344,26 @@ static int arizona_apply_hardware_patch(struct arizona* arizona) return arizona_exec_with_sysclk(arizona, arizona_hardware_patch_wseq); } +static int arizona_sleep_patch(struct arizona* arizona) +{ + int ret; + + ret = regmap_write(arizona->regmap, 0x377A, 0xC100); + if (ret != 0) + return ret; + + ret = regmap_write(arizona->regmap, 0x377B, 0x0041); + if (ret != 0) + return ret; + + return 0; +} + +static int arizona_apply_sleep_patch(struct arizona* arizona) +{ + return arizona_exec_with_sysclk(arizona, arizona_sleep_patch); +} + static int arizona_soft_reset(struct arizona *arizona) { int ret; @@ -1042,6 +1062,16 @@ int arizona_dev_init(struct arizona *arizona) goto err_reset; } break; + case WM5110: + case WM8280: + ret = arizona_apply_sleep_patch(arizona); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to apply sleep patch: %d\n", + ret); + goto err_reset; + } + break; default: break; } From 8af080e85838114f5cf532c1c20b1fb0f0c8722b Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 6 Jan 2014 13:12:59 +0000 Subject: [PATCH 0163/1167] mfd: arizona: Correct registers used in sleep mode patch Change-Id: I8f1baf2c826f5e59c4f328c61f608e3c26cac4fe Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 2bd541a4f7b..2687112b847 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -348,11 +348,11 @@ static int arizona_sleep_patch(struct arizona* arizona) { int ret; - ret = regmap_write(arizona->regmap, 0x377A, 0xC100); + ret = regmap_write(arizona->regmap, 0x337A, 0xC100); if (ret != 0) return ret; - ret = regmap_write(arizona->regmap, 0x377B, 0x0041); + ret = regmap_write(arizona->regmap, 0x337B, 0x0041); if (ret != 0) return ret; From 87353e7bac6805e9c3d649de1eaf96d51797824d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 3 Jan 2014 15:21:26 +0000 Subject: [PATCH 0164/1167] mfd: arizona: Add delay before releasing reset line on cold boot Change-Id: If9b48c271f04410b74dfe6e2943fc0a5f50f7112 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 2687112b847..185a520a05a 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -925,6 +925,15 @@ int arizona_dev_init(struct arizona *arizona) goto err_enable; } + switch (arizona->type) { + case WM5110: + case WM8280: + msleep(5); + break; + default: + break; + } + if (arizona->pdata.reset) { gpio_set_value_cansleep(arizona->pdata.reset, 1); msleep(1); From 21780317646517a0556b6befe855cad76b6f04d6 Mon Sep 17 00:00:00 2001 From: Dimitris Papastamos Date: Wed, 21 Aug 2013 16:39:46 +0100 Subject: [PATCH 0165/1167] mfd: wm5102: Add low impedance headphone support Change-Id: I84314024b271e63c962303a1310525ce036af664 Signed-off-by: Dimitris Papastamos --- drivers/mfd/wm5102-tables.c | 3 +++ sound/soc/codecs/wm5102.c | 3 +++ 2 files changed, 6 insertions(+) diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index a675e6e4245..075524470bf 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -74,6 +74,9 @@ static const struct reg_default wm5102_revb_patch[] = { { 0x35E, 0x000C }, { 0x2D4, 0x0000 }, { 0x80, 0x0000 }, + { 0x46C, 0xC01 }, + { 0x46E, 0xC01 }, + { 0x470, 0xC01 }, }; /* We use a function so we can use ARRAY_SIZE() */ diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 475bd0a35b2..8272494b48e 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -575,6 +575,9 @@ static const struct reg_default wm5102_sysclk_revb_patch[] = { { 0x3083, 0x00ED }, { 0x30C1, 0x08FE }, { 0x30C3, 0x00ED }, + { 0x3125, 0x0A03 }, + { 0x3127, 0x0A03 }, + { 0x3129, 0x0A03 }, }; static int wm5102_sysclk_ev(struct snd_soc_dapm_widget *w, From 94296d78aca2233efc6b1088f9440fb872eda92b Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 5 Sep 2013 13:50:49 +0100 Subject: [PATCH 0166/1167] ASoC: wm5102: Factor out patch application In preparation for additional steps in the patch application process. Change-Id: I8a8c2c2b40e15653da8a07ea45fa7e4b1ce278c2 Signed-off-by: Charles Keepax --- drivers/mfd/wm5102-tables.c | 33 +++++++++++++++++++++----------- include/linux/mfd/arizona/core.h | 3 +++ sound/soc/codecs/wm5102.c | 7 ++----- 3 files changed, 27 insertions(+), 16 deletions(-) diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index 075524470bf..52a71b76773 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -79,12 +79,32 @@ static const struct reg_default wm5102_revb_patch[] = { { 0x470, 0xC01 }, }; +int wm5102_apply_patch(struct arizona *arizona, + const struct reg_default *wm5102_patch, + const int patch_size) +{ + int i, ret; + + for (i = 0; i < patch_size; i++) { + ret = regmap_write(arizona->regmap, wm5102_patch[i].reg, + wm5102_patch[i].def); + if (ret != 0) { + dev_err(arizona->dev, "Failed to write %x = %x: %d\n", + wm5102_patch[i].reg, wm5102_patch[i].def, ret); + return ret; + } + } + + return 0; +} +EXPORT_SYMBOL_GPL(wm5102_apply_patch); + /* We use a function so we can use ARRAY_SIZE() */ int wm5102_patch(struct arizona *arizona) { const struct reg_default *wm5102_patch; int ret = 0; - int i, patch_size; + int patch_size; switch (arizona->rev) { case 0: @@ -99,16 +119,7 @@ int wm5102_patch(struct arizona *arizona) regcache_cache_bypass(arizona->regmap, true); - for (i = 0; i < patch_size; i++) { - ret = regmap_write(arizona->regmap, wm5102_patch[i].reg, - wm5102_patch[i].def); - if (ret != 0) { - dev_err(arizona->dev, "Failed to write %x = %x: %d\n", - wm5102_patch[i].reg, wm5102_patch[i].def, ret); - goto out; - } - } - + ret = wm5102_apply_patch(arizona, wm5102_patch, patch_size); out: regcache_cache_bypass(arizona->regmap, false); return ret; diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index ff3f975058d..bb849b4236f 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -120,6 +120,9 @@ int arizona_request_irq(struct arizona *arizona, int irq, char *name, void arizona_free_irq(struct arizona *arizona, int irq, void *data); int arizona_set_irq_wake(struct arizona *arizona, int irq, int on); +extern int wm5102_apply_patch(struct arizona *arizona, + const struct reg_default *wm5102_patch, + const int patch_size); int wm5102_patch(struct arizona *arizona); int florida_patch(struct arizona *arizona); diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 8272494b48e..dbf3997f17d 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -585,9 +585,8 @@ static int wm5102_sysclk_ev(struct snd_soc_dapm_widget *w, { struct snd_soc_codec *codec = w->codec; struct arizona *arizona = dev_get_drvdata(codec->dev->parent); - struct regmap *regmap = codec->control_data; const struct reg_default *patch = NULL; - int i, patch_size; + int patch_size; switch (arizona->rev) { case 0: @@ -603,9 +602,7 @@ static int wm5102_sysclk_ev(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_POST_PMU: if (patch) - for (i = 0; i < patch_size; i++) - regmap_write(regmap, patch[i].reg, - patch[i].def); + wm5102_apply_patch(arizona, patch, patch_size); break; default: From 48667b86801579ceb678e09dcf814a25410be31d Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 6 Jan 2014 16:48:58 +0000 Subject: [PATCH 0167/1167] mfd: wm5102: Provide different output power configurations Change-Id: I4123992f861bfb66087c2efaad4a77eefe16902b Signed-off-by: Charles Keepax Signed-off-by: Richard Fitzgerald --- drivers/mfd/wm5102-tables.c | 69 +++++++++++++++++++++++++++++++ include/linux/mfd/arizona/pdata.h | 3 ++ sound/soc/codecs/wm5102.c | 8 ++++ 3 files changed, 80 insertions(+) diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index 52a71b76773..2d194e8f3ce 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -74,11 +74,69 @@ static const struct reg_default wm5102_revb_patch[] = { { 0x35E, 0x000C }, { 0x2D4, 0x0000 }, { 0x80, 0x0000 }, +}; + +static const struct reg_default wm5102t_pwr_1[] = { { 0x46C, 0xC01 }, { 0x46E, 0xC01 }, { 0x470, 0xC01 }, }; +static const struct reg_default wm5102t_pwr_2[] = { + { 0x462, 0xC00 }, + { 0x464, 0xC00 }, + { 0x466, 0xC00 }, + { 0x468, 0xC00 }, + { 0x46a, 0xC00 }, + { 0x46c, 0xC00 }, + { 0x46e, 0xC00 }, + { 0x470, 0xC00 }, + { 0x476, 0x806 }, +}; + +static const struct reg_default wm5102t_pwr_3[] = { + { 0x462, 0xC00 }, + { 0x464, 0xC00 }, + { 0x466, 0xC00 }, + { 0x468, 0xC00 }, + { 0x46a, 0xC00 }, + { 0x46c, 0xC00 }, + { 0x46e, 0xC00 }, + { 0x470, 0xC00 }, + { 0x472, 0xC00 }, + { 0x47c, 0x806 }, + { 0x47e, 0x80e }, +}; + +static const struct reg_default wm5102t_pwr_4[] = { + { 0x462, 0xC00 }, + { 0x464, 0xC00 }, + { 0x466, 0xC00 }, + { 0x468, 0xC00 }, + { 0x46a, 0xC00 }, + { 0x46c, 0xC00 }, + { 0x46e, 0xC00 }, + { 0x470, 0xC00 }, + { 0x472, 0xC00 }, + { 0x474, 0xC00 }, + { 0x476, 0xC00 }, + { 0x478, 0xC00 }, + { 0x47a, 0xC00 }, + { 0x47c, 0xC00 }, + { 0x47e, 0xC00 }, +}; + +static const struct { + const struct reg_default *patch; + int size; +} wm5102t_pwr[] = { + { NULL, 0 }, + { wm5102t_pwr_1, ARRAY_SIZE(wm5102t_pwr_1) }, + { wm5102t_pwr_2, ARRAY_SIZE(wm5102t_pwr_2) }, + { wm5102t_pwr_3, ARRAY_SIZE(wm5102t_pwr_3) }, + { wm5102t_pwr_4, ARRAY_SIZE(wm5102t_pwr_4) }, +}; + int wm5102_apply_patch(struct arizona *arizona, const struct reg_default *wm5102_patch, const int patch_size) @@ -105,6 +163,7 @@ int wm5102_patch(struct arizona *arizona) const struct reg_default *wm5102_patch; int ret = 0; int patch_size; + int pwr_index = arizona->pdata.wm5102t_output_pwr; switch (arizona->rev) { case 0: @@ -120,6 +179,16 @@ int wm5102_patch(struct arizona *arizona) regcache_cache_bypass(arizona->regmap, true); ret = wm5102_apply_patch(arizona, wm5102_patch, patch_size); + if (ret != 0) + goto out; + + if (pwr_index < ARRAY_SIZE(wm5102t_pwr)) + ret = wm5102_apply_patch(arizona, + wm5102t_pwr[pwr_index].patch, + wm5102t_pwr[pwr_index].size); + else + dev_err(arizona->dev, "Invalid wm5102t output power\n"); + out: regcache_cache_bypass(arizona->regmap, false); return ret; diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 5ecb07e3469..c18d9b7ec27 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -200,6 +200,9 @@ struct arizona_pdata { /** Callback which is called when the trigger phrase is detected */ void (*ez2ctrl_trigger)(void); + + /** wm5102t output power */ + int wm5102t_output_pwr; }; #endif diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index dbf3997f17d..87025568670 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -575,6 +575,9 @@ static const struct reg_default wm5102_sysclk_revb_patch[] = { { 0x3083, 0x00ED }, { 0x30C1, 0x08FE }, { 0x30C3, 0x00ED }, +}; + +static const struct reg_default wm5102t_sysclk_pwr[] = { { 0x3125, 0x0A03 }, { 0x3127, 0x0A03 }, { 0x3129, 0x0A03 }, @@ -603,6 +606,11 @@ static int wm5102_sysclk_ev(struct snd_soc_dapm_widget *w, case SND_SOC_DAPM_POST_PMU: if (patch) wm5102_apply_patch(arizona, patch, patch_size); + + if (arizona->pdata.wm5102t_output_pwr) + wm5102_apply_patch(arizona, + wm5102t_sysclk_pwr, + ARRAY_SIZE(wm5102t_sysclk_pwr)); break; default: From b5251e44ff8fcfd4b6aba24be511cc40ebb3a5d5 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 6 Sep 2013 12:56:54 +0100 Subject: [PATCH 0168/1167] ASoC: wm5102: Apply SYSCLK patch locally Change-Id: I56faecfa0e947ab2299c93e4000edd2d673fc2db Signed-off-by: Charles Keepax --- drivers/mfd/wm5102-tables.c | 7 +++---- include/linux/mfd/arizona/core.h | 3 --- include/linux/mfd/arizona/pdata.h | 2 +- sound/soc/codecs/wm5102.c | 14 +++++++++----- 4 files changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index 2d194e8f3ce..467a618be67 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -137,9 +137,9 @@ static const struct { { wm5102t_pwr_4, ARRAY_SIZE(wm5102t_pwr_4) }, }; -int wm5102_apply_patch(struct arizona *arizona, - const struct reg_default *wm5102_patch, - const int patch_size) +static int wm5102_apply_patch(struct arizona *arizona, + const struct reg_default *wm5102_patch, + const int patch_size) { int i, ret; @@ -155,7 +155,6 @@ int wm5102_apply_patch(struct arizona *arizona, return 0; } -EXPORT_SYMBOL_GPL(wm5102_apply_patch); /* We use a function so we can use ARRAY_SIZE() */ int wm5102_patch(struct arizona *arizona) diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index bb849b4236f..ff3f975058d 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -120,9 +120,6 @@ int arizona_request_irq(struct arizona *arizona, int irq, char *name, void arizona_free_irq(struct arizona *arizona, int irq, void *data); int arizona_set_irq_wake(struct arizona *arizona, int irq, int on); -extern int wm5102_apply_patch(struct arizona *arizona, - const struct reg_default *wm5102_patch, - const int patch_size); int wm5102_patch(struct arizona *arizona); int florida_patch(struct arizona *arizona); diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index c18d9b7ec27..0b26e8bf182 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -202,7 +202,7 @@ struct arizona_pdata { void (*ez2ctrl_trigger)(void); /** wm5102t output power */ - int wm5102t_output_pwr; + unsigned int wm5102t_output_pwr; }; #endif diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 87025568670..f96d683a6a5 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -588,8 +588,9 @@ static int wm5102_sysclk_ev(struct snd_soc_dapm_widget *w, { struct snd_soc_codec *codec = w->codec; struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + struct regmap *regmap = codec->control_data; const struct reg_default *patch = NULL; - int patch_size; + int i, patch_size; switch (arizona->rev) { case 0: @@ -605,12 +606,15 @@ static int wm5102_sysclk_ev(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_POST_PMU: if (patch) - wm5102_apply_patch(arizona, patch, patch_size); + for (i = 0; i < patch_size; i++) + regmap_write(regmap, patch[i].reg, + patch[i].def); if (arizona->pdata.wm5102t_output_pwr) - wm5102_apply_patch(arizona, - wm5102t_sysclk_pwr, - ARRAY_SIZE(wm5102t_sysclk_pwr)); + for (i = 0; i < ARRAY_SIZE(wm5102t_sysclk_pwr); i++) + regmap_write(regmap, + wm5102t_sysclk_pwr[i].reg, + wm5102t_sysclk_pwr[i].def); break; default: From 3beff610fe0cbfa0725edc380f9f630917141988 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 6 Jan 2014 17:24:09 +0000 Subject: [PATCH 0169/1167] mfd: wm5102: Parse DT for wm5102t output power setting Change-Id: I29998ef116432a2426b75944d7a0d732da6fa34b Signed-off-by: Richard Fitzgerald --- Documentation/devicetree/bindings/mfd/arizona.txt | 2 ++ drivers/mfd/arizona-core.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 8966c81ccc2..bb3b273452e 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -105,6 +105,8 @@ Optional properties: - wlf,gpsw : Settings for the general purpose switch, set as per the SW1_MODE bits in the GP Switch 1 register + wlf,wm5102t-output-pwr : Output power setting (WM5102T only) + Example: codec: wm5102@1a { diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 185a520a05a..c859daf6528 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -804,6 +804,8 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) arizona_of_read_u32_array(arizona, "wlf,inmode", false, pdata->inmode, ARRAY_SIZE(pdata->inmode)); + arizona_of_read_u32(arizona, "wlf,wm5102t-output-pwr", false, + &pdata->wm5102t_output_pwr); return 0; } From 3690f946c8b972b14ce5c8c1d65a5f699b2b86c9 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 19 Dec 2013 11:28:59 +0000 Subject: [PATCH 0170/1167] ASoC: wm_adsp: Factor out ADSP2 boot proceedure Move the ADSP2 boot proceedure into a work structure in preparation for running it asynchronously with the reset of the audio path bring up. Change-Id: I61fbfb013a57db7221f6742d5ab8e5162039e266 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 183 +++++++++++++++++++++---------------- sound/soc/codecs/wm_adsp.h | 2 + 2 files changed, 106 insertions(+), 79 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index eb947c2de37..2c8e2d0b2b6 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1904,110 +1904,134 @@ static int wm_adsp2_ena(struct wm_adsp *dsp) return 0; } -int wm_adsp2_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) +static void wm_adsp2_boot_work(struct work_struct *work) { - struct snd_soc_codec *codec = w->codec; - struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); - struct wm_adsp *dsp = &dsps[w->shift]; - struct wm_adsp_alg_region *alg_region; - struct wm_coeff_ctl *ctl; - unsigned int val; + struct wm_adsp *dsp = container_of(work, + struct wm_adsp, + boot_work); int ret; + unsigned int val; - /* Always default to version 0 to ensure backwards - * compatibility with older firmware images */ - dsp->fw_ver = 0; - dsp->card = codec->card; + /* + * For simplicity set the DSP clock rate to be the + * SYSCLK rate rather than making it configurable. + */ + ret = regmap_read(dsp->regmap, ARIZONA_SYSTEM_CLOCK_1, &val); + if (ret != 0) { + adsp_err(dsp, "Failed to read SYSCLK state: %d\n", ret); + return; + } + val = (val & ARIZONA_SYSCLK_FREQ_MASK) + >> ARIZONA_SYSCLK_FREQ_SHIFT; - switch (event) { - case SND_SOC_DAPM_PRE_PMU: - /* - * For simplicity set the DSP clock rate to be the - * SYSCLK rate rather than making it configurable. - */ - ret = regmap_read(dsp->regmap, ARIZONA_SYSTEM_CLOCK_1, &val); - if (ret != 0) { - adsp_err(dsp, "Failed to read SYSCLK state: %d\n", - ret); - return ret; - } - val = (val & ARIZONA_SYSCLK_FREQ_MASK) - >> ARIZONA_SYSCLK_FREQ_SHIFT; + ret = regmap_update_bits(dsp->regmap, + dsp->base + ADSP2_CLOCKING, + ADSP2_CLK_SEL_MASK, val); + if (ret != 0) { + adsp_err(dsp, "Failed to set clock rate: %d\n", ret); + return; + } - ret = regmap_update_bits(dsp->regmap, - dsp->base + ADSP2_CLOCKING, - ADSP2_CLK_SEL_MASK, val); + if (dsp->dvfs) { + ret = regmap_read(dsp->regmap, + dsp->base + ADSP2_CLOCKING, &val); if (ret != 0) { - adsp_err(dsp, "Failed to set clock rate: %d\n", - ret); - return ret; + dev_err(dsp->dev, "Failed to read clocking: %d\n", ret); + return; } - if (dsp->dvfs) { - ret = regmap_read(dsp->regmap, - dsp->base + ADSP2_CLOCKING, &val); + if ((val & ADSP2_CLK_SEL_MASK) >= 3) { + ret = regulator_enable(dsp->dvfs); if (ret != 0) { dev_err(dsp->dev, - "Failed to read clocking: %d\n", ret); - return ret; + "Failed to enable supply: %d\n", + ret); + return; } - if ((val & ADSP2_CLK_SEL_MASK) >= 3) { - ret = regulator_enable(dsp->dvfs); - if (ret != 0) { - dev_err(dsp->dev, - "Failed to enable supply: %d\n", - ret); - return ret; - } - - ret = regulator_set_voltage(dsp->dvfs, - 1800000, - 1800000); - if (ret != 0) { - dev_err(dsp->dev, - "Failed to raise supply: %d\n", - ret); - return ret; - } + ret = regulator_set_voltage(dsp->dvfs, + 1800000, + 1800000); + if (ret != 0) { + dev_err(dsp->dev, + "Failed to raise supply: %d\n", + ret); + return; } } + } - ret = wm_adsp2_ena(dsp); - if (ret != 0) - return ret; + ret = wm_adsp2_ena(dsp); + if (ret != 0) + return; - ret = wm_adsp_load(dsp); - if (ret != 0) - goto err; + ret = wm_adsp_load(dsp); + if (ret != 0) + goto err; - ret = wm_adsp_setup_algs(dsp); - if (ret != 0) - goto err; + ret = wm_adsp_setup_algs(dsp); + if (ret != 0) + goto err; - ret = wm_adsp_load_coeff(dsp); - if (ret != 0) - goto err; + ret = wm_adsp_load_coeff(dsp); + if (ret != 0) + goto err; - /* Initialize caches for enabled and unset controls */ - ret = wm_coeff_init_control_caches(dsp); - if (ret != 0) - goto err; + /* Initialize caches for enabled and unset controls */ + ret = wm_coeff_init_control_caches(dsp); + if (ret != 0) + goto err; - /* Sync set controls */ - ret = wm_coeff_sync_controls(dsp); - if (ret != 0) - goto err; + /* Sync set controls */ + ret = wm_coeff_sync_controls(dsp); + if (ret != 0) + goto err; + + ret = regmap_update_bits(dsp->regmap, + dsp->base + ADSP2_CONTROL, + ADSP2_CORE_ENA, + ADSP2_CORE_ENA); + if (ret != 0) + goto err; + + dsp->running = true; + + return; + +err: + regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, + ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0); +} + +int wm_adsp2_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); + struct wm_adsp *dsp = &dsps[w->shift]; + struct wm_adsp_alg_region *alg_region; + struct wm_coeff_ctl *ctl; + int ret; + + /* Always default to version 0 to ensure backwards + * compatibility with older firmware images */ + dsp->fw_ver = 0; + dsp->card = codec->card; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + queue_work(system_unbound_wq, &dsp->boot_work); + flush_work(&dsp->boot_work); + + if (!dsp->running) + return -EIO; ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, - ADSP2_CORE_ENA | ADSP2_START, - ADSP2_CORE_ENA | ADSP2_START); + ADSP2_START, + ADSP2_START); if (ret != 0) goto err; - - dsp->running = true; break; case SND_SOC_DAPM_PRE_PMD: @@ -2210,6 +2234,7 @@ int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs) INIT_LIST_HEAD(&adsp->alg_regions); INIT_LIST_HEAD(&adsp->ctl_list); + INIT_WORK(&adsp->boot_work, wm_adsp2_boot_work); if (dvfs) { adsp->dvfs = devm_regulator_get(adsp->dev, "DCVDD"); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index e74c3553280..bcfb953bf92 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -105,6 +105,8 @@ struct wm_adsp { int num_firmwares; struct wm_adsp_fw_defs *firmwares; + + struct work_struct boot_work; }; #define WM_ADSP1(wname, num) \ From 9511746bfe115387dc679cc2dc8bd69b5f33e056 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 19 Dec 2013 13:01:36 +0000 Subject: [PATCH 0171/1167] ASoC: wm_adsp: Start DSP booting earlier in the DAPM process Move the start of booting the DSP to earlier in the DAPM process, and move the final starting of the DSP to later in the DAPM process. This allows us to overlap some of the processing with other components of the system being brought up. Change-Id: I320dd138e608a9fa0b2d31d47a55e87dbcffa721 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.h | 17 +++++++++-------- sound/soc/codecs/wm_adsp.c | 26 ++++++++++++++++++++++---- sound/soc/codecs/wm_adsp.h | 9 +++++++-- 3 files changed, 38 insertions(+), 14 deletions(-) diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index fd5e8825f1a..1a9d00e42fe 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -166,20 +166,21 @@ extern int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS]; ARIZONA_MIXER_INPUT_ROUTES(name " Input 4") #define ARIZONA_DSP_ROUTES(name) \ - { name, NULL, name " Aux 1" }, \ - { name, NULL, name " Aux 2" }, \ - { name, NULL, name " Aux 3" }, \ - { name, NULL, name " Aux 4" }, \ - { name, NULL, name " Aux 5" }, \ - { name, NULL, name " Aux 6" }, \ + { name, NULL, name " Preloader"}, \ + { name " Preloader", NULL, name " Aux 1" }, \ + { name " Preloader", NULL, name " Aux 2" }, \ + { name " Preloader", NULL, name " Aux 3" }, \ + { name " Preloader", NULL, name " Aux 4" }, \ + { name " Preloader", NULL, name " Aux 5" }, \ + { name " Preloader", NULL, name " Aux 6" }, \ ARIZONA_MIXER_INPUT_ROUTES(name " Aux 1"), \ ARIZONA_MIXER_INPUT_ROUTES(name " Aux 2"), \ ARIZONA_MIXER_INPUT_ROUTES(name " Aux 3"), \ ARIZONA_MIXER_INPUT_ROUTES(name " Aux 4"), \ ARIZONA_MIXER_INPUT_ROUTES(name " Aux 5"), \ ARIZONA_MIXER_INPUT_ROUTES(name " Aux 6"), \ - ARIZONA_MIXER_ROUTES(name, name "L"), \ - ARIZONA_MIXER_ROUTES(name, name "R") + ARIZONA_MIXER_ROUTES(name " Preloader", name "L"), \ + ARIZONA_MIXER_ROUTES(name " Preloader", name "R") #define ARIZONA_RATE_ENUM_SIZE 4 #define ARIZONA_SAMPLE_RATE_ENUM_SIZE 14 diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 2c8e2d0b2b6..fa6fe75d39d 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2003,15 +2003,12 @@ static void wm_adsp2_boot_work(struct work_struct *work) ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0); } -int wm_adsp2_event(struct snd_soc_dapm_widget *w, +int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { struct snd_soc_codec *codec = w->codec; struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); struct wm_adsp *dsp = &dsps[w->shift]; - struct wm_adsp_alg_region *alg_region; - struct wm_coeff_ctl *ctl; - int ret; /* Always default to version 0 to ensure backwards * compatibility with older firmware images */ @@ -2021,6 +2018,27 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_PRE_PMU: queue_work(system_unbound_wq, &dsp->boot_work); + break; + default: + break; + }; + + return 0; +} +EXPORT_SYMBOL_GPL(wm_adsp2_early_event); + +int wm_adsp2_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); + struct wm_adsp *dsp = &dsps[w->shift]; + struct wm_adsp_alg_region *alg_region; + struct wm_coeff_ctl *ctl; + int ret; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: flush_work(&dsp->boot_work); if (!dsp->running) diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index bcfb953bf92..96eefbb5800 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -115,9 +115,12 @@ struct wm_adsp { .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD } #define WM_ADSP2(wname, num) \ -{ .id = snd_soc_dapm_pga, .name = wname, .reg = SND_SOC_NOPM, \ +{ .id = snd_soc_dapm_dai_link, .name = wname " Preloader", \ + .reg = SND_SOC_NOPM, .shift = num, .event = wm_adsp2_early_event, \ + .event_flags = SND_SOC_DAPM_PRE_PMU }, \ +{ .id = snd_soc_dapm_out_drv, .name = wname, .reg = SND_SOC_NOPM, \ .shift = num, .event = wm_adsp2_event, \ - .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD } + .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD } extern const struct snd_kcontrol_new wm_adsp1_fw_controls[]; extern const struct snd_kcontrol_new wm_adsp2_fw_controls[]; @@ -126,6 +129,8 @@ int wm_adsp1_init(struct wm_adsp *adsp); int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs); int wm_adsp1_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); +int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event); int wm_adsp2_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); From 76b3a4cd83dc592c05c70a681566a54e24ec0778 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 7 Jan 2014 15:26:43 +0000 Subject: [PATCH 0172/1167] ASoC: wm_adsp: Add special shutdown proceedure for EDAC firmware Change-Id: I18b6d2a00b8895199265ffc84f29a4536bcee389 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 43 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index fa6fe75d39d..a5e0817a80f 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2027,6 +2027,45 @@ int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, } EXPORT_SYMBOL_GPL(wm_adsp2_early_event); +static void wm_adsp_edac_shutdown(struct wm_adsp *dsp) +{ + int i, ret; + unsigned int val = 1; + const struct wm_adsp_region *mem; + + mem = wm_adsp_find_region(dsp, WMFW_ADSP2_YM); + if (!mem) { + adsp_err(dsp, "Failed to locate YM\n"); + return; + } + + ret = regmap_write(dsp->regmap, mem->base + 0x1, val); + if (ret != 0) { + adsp_err(dsp, + "Failed to inform eDAC to shutdown: %d\n", + ret); + return; + } + + for (i = 0; i < 5; ++i) { + ret = regmap_read(dsp->regmap, mem->base + 0x1, &val); + if (ret != 0) { + adsp_err(dsp, + "Failed to check for eDAC shutdown: %d\n", + ret); + return; + } + + if (!val) + break; + + msleep(1); + } + + if (val) + adsp_err(dsp, "Failed to shutdown eDAC firmware\n"); +} + int wm_adsp2_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { @@ -2053,6 +2092,10 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, break; case SND_SOC_DAPM_PRE_PMD: + if (dsp->fw_id == 0x40019) { + wm_adsp_edac_shutdown(dsp); + } + dsp->running = false; regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, From 13935da34cef7c5d6a569799f537c82b39637cf0 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 9 Jan 2014 14:37:18 +0000 Subject: [PATCH 0173/1167] ASoC: florida: Update name of short-circuit protection controls Boolean controls should end in the word Switch, add this to the short-circuit protection controls. Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 6a1a129c7a3..0b5ef5b37b0 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -340,11 +340,11 @@ ARIZONA_MIXER_CONTROLS("SPKDAT1R", ARIZONA_OUT5RMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("SPKDAT2L", ARIZONA_OUT6LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("SPKDAT2R", ARIZONA_OUT6RMIX_INPUT_1_SOURCE), -SOC_SINGLE("HPOUT1 SC Protect", ARIZONA_HP1_SHORT_CIRCUIT_CTRL, +SOC_SINGLE("HPOUT1 SC Protect Switch", ARIZONA_HP1_SHORT_CIRCUIT_CTRL, ARIZONA_HP1_SC_ENA_SHIFT, 1, 0), -SOC_SINGLE("HPOUT2 SC Protect", ARIZONA_HP2_SHORT_CIRCUIT_CTRL, +SOC_SINGLE("HPOUT2 SC Protect Switch", ARIZONA_HP2_SHORT_CIRCUIT_CTRL, ARIZONA_HP2_SC_ENA_SHIFT, 1, 0), -SOC_SINGLE("HPOUT3 SC Protect", ARIZONA_HP3_SHORT_CIRCUIT_CTRL, +SOC_SINGLE("HPOUT3 SC Protect Switch", ARIZONA_HP3_SHORT_CIRCUIT_CTRL, ARIZONA_HP3_SC_ENA_SHIFT, 1, 0), SOC_DOUBLE_R("HPOUT1 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_1L, From 904668e51be11ec944d69491d6e25d37d0916770 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 10 Jan 2014 09:40:13 +0000 Subject: [PATCH 0174/1167] ASoC: wm_adsp: Add info print to note that the DSP has shutdown Change-Id: I069f4b6333e6d7ccc4f23d2f2c60d4454857b294 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index a5e0817a80f..64ad4a8dba8 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2132,6 +2132,8 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, list_del(&alg_region->list); kfree(alg_region); } + + adsp_info(dsp, "Shutdown complete\n"); break; default: From ca56c2a5b46aee9364e91bca031914dcacf2dd50 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 10 Jan 2014 14:16:46 +0000 Subject: [PATCH 0175/1167] ASoC: wm_adsp: Move core_ena to be co-located with start bit Some firmwares do not wait for the start bit before they begin processing, move these core enable to happen at same time as the start bit to ensure these firmwares behave. Change-Id: I61aaf25d19f7386cf26890e8c62eacbcc0d66af8 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 64ad4a8dba8..1534004b04d 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1987,13 +1987,6 @@ static void wm_adsp2_boot_work(struct work_struct *work) if (ret != 0) goto err; - ret = regmap_update_bits(dsp->regmap, - dsp->base + ADSP2_CONTROL, - ADSP2_CORE_ENA, - ADSP2_CORE_ENA); - if (ret != 0) - goto err; - dsp->running = true; return; @@ -2085,8 +2078,8 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, - ADSP2_START, - ADSP2_START); + ADSP2_CORE_ENA | ADSP2_START, + ADSP2_CORE_ENA | ADSP2_START); if (ret != 0) goto err; break; From 88616a299dd8a4b1bb9669c148403fc70970affc Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 10 Jan 2014 16:54:43 +0000 Subject: [PATCH 0176/1167] ASoC: florida: Extend patch file for rev D Latest evaluation of the device has given some patch file additions. Change-Id: I30c494f1411567146fee66d40945d61d80b79b77 Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 48 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 0b5ef5b37b0..cf8383e6d99 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -95,6 +95,54 @@ static const struct reg_default florida_sysclk_revd_patch[] = { { 0x3133, 0x1201 }, { 0x3183, 0x1501 }, { 0x31D3, 0x1401 }, + { 0x0049, 0x01ea }, + { 0x004a, 0x01f2 }, + { 0x0057, 0x01e7 }, + { 0x0058, 0x01fb }, + { 0x33ce, 0xc4f5 }, + { 0x33cf, 0x1361 }, + { 0x33d0, 0x0402 }, + { 0x33d1, 0x4700 }, + { 0x33d2, 0x026d }, + { 0x33d3, 0xff00 }, + { 0x33d4, 0x026d }, + { 0x33d5, 0x0101 }, + { 0x33d6, 0xc4f5 }, + { 0x33d7, 0x0361 }, + { 0x33d8, 0x0402 }, + { 0x33d9, 0x6701 }, + { 0x33da, 0xc4f5 }, + { 0x33db, 0x136f }, + { 0x33dc, 0xc4f5 }, + { 0x33dd, 0x134f }, + { 0x33de, 0xc4f5 }, + { 0x33df, 0x131f }, + { 0x33e0, 0x026d }, + { 0x33e1, 0x4f01 }, + { 0x33e2, 0x026d }, + { 0x33e3, 0xf100 }, + { 0x33e4, 0x026d }, + { 0x33e5, 0x0001 }, + { 0x33e6, 0xc4f5 }, + { 0x33e7, 0x0361 }, + { 0x33e8, 0x0402 }, + { 0x33e9, 0x6601 }, + { 0x33ea, 0xc4f5 }, + { 0x33eb, 0x136f }, + { 0x33ec, 0xc4f5 }, + { 0x33ed, 0x134f }, + { 0x33ee, 0xc4f5 }, + { 0x33ef, 0x131f }, + { 0x33f0, 0x026d }, + { 0x33f1, 0x4e01 }, + { 0x33f2, 0x026d }, + { 0x33f3, 0xf000 }, + { 0x33f6, 0xc4f5 }, + { 0x33f7, 0x1361 }, + { 0x33f8, 0x0402 }, + { 0x33f9, 0x4600 }, + { 0x33fa, 0x026d }, + { 0x33fb, 0xfe00 }, }; static int florida_sysclk_ev(struct snd_soc_dapm_widget *w, From 262b7ae60c46daf676268d10a06e46d684a6d1b3 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 13 Jan 2014 08:10:54 +0000 Subject: [PATCH 0177/1167] ASoC: wm_adsp: Make missing length info message sound less serious Missing length info is not a serious issue so make the message sound a little less ominous. Change-Id: I1f1d92122466e3fe9f52b7720722c77277e3ec01 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 1534004b04d..eab61b27c48 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1466,7 +1466,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len *= 4; wm_adsp_create_grouped_control(dsp, region, true); } else { - adsp_warn(dsp, "Missing length info for region DM with ID %x\n", + adsp_warn(dsp, "Length info not specified for region DM with ID %x\n", be32_to_cpu(adsp1_alg[i].alg.id)); } @@ -1484,7 +1484,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len *= 4; wm_adsp_create_grouped_control(dsp, region, true); } else { - adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", + adsp_warn(dsp, "Length info not specified for region ZM with ID %x\n", be32_to_cpu(adsp1_alg[i].alg.id)); } } @@ -1522,7 +1522,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len *= 4; wm_adsp_create_grouped_control(dsp, region, true); } else { - adsp_warn(dsp, "Missing length info for region XM with ID %x\n", + adsp_warn(dsp, "Length info not specified for region XM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); } @@ -1540,7 +1540,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len *= 4; wm_adsp_create_grouped_control(dsp, region, true); } else { - adsp_warn(dsp, "Missing length info for region YM with ID %x\n", + adsp_warn(dsp, "Length info not specified for region YM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); } @@ -1558,7 +1558,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len *= 4; wm_adsp_create_grouped_control(dsp, region, true); } else { - adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", + adsp_warn(dsp, "Length info not specified for region ZM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); } } From c143811e86e028528132839ec827f1c50d7671bf Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 13 Jan 2014 10:31:49 +0000 Subject: [PATCH 0178/1167] ASoC: wm_adsp: Route virtual inputs through preloader All inputs to the DSP need to go through the preloader and this change was missed for the virtual inputs on cores 2 and 3 when the firmware loading was split out. Change-Id: Ie7504c8b375a6b347bbb960a81348ceda25ecb23 Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index cf8383e6d99..5228533d341 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -1438,9 +1438,9 @@ static const struct snd_soc_dapm_route florida_dapm_routes[] = { ARIZONA_DSP_ROUTES("DSP3"), ARIZONA_DSP_ROUTES("DSP4"), - { "DSP2", NULL, "DSP2 Virtual Input" }, + { "DSP2 Preloader", NULL, "DSP2 Virtual Input" }, { "DSP2 Virtual Input", "Shared Memory", "DSP3" }, - { "DSP3", NULL, "DSP3 Virtual Input" }, + { "DSP3 Preloader", NULL, "DSP3 Virtual Input" }, { "DSP3 Virtual Input", "Shared Memory", "DSP2" }, { "DSP Virtual Output", NULL, "DSP Virtual Output Mux" }, From c8cb9781bbbd6f94dfd1d5096ac6c0272396c77b Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 13 Jan 2014 09:54:41 +0000 Subject: [PATCH 0179/1167] ASoC: florida: Unhook MICSUPP from SYSCLK Only the 32kHz clock is required for the charge pump to function. Change-Id: I0da46a40c10e6046447f5c475681e4b28ac3ebed Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 5228533d341..e6300f92ebc 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -1510,8 +1510,6 @@ static const struct snd_soc_dapm_route florida_dapm_routes[] = { { "SPKDAT2L", NULL, "OUT6L" }, { "SPKDAT2R", NULL, "OUT6R" }, - { "MICSUPP", NULL, "SYSCLK" }, - { "DRC1 Signal Activity", NULL, "DRC1L" }, { "DRC1 Signal Activity", NULL, "DRC1R" }, { "DRC2 Signal Activity", NULL, "DRC2L" }, From bf70a783a0136cfb569c3497e1a994d2967c007a Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 14 Jan 2014 09:09:22 +0000 Subject: [PATCH 0180/1167] ASoC: arizona: Give florida an output enable delay Change-Id: I3691c5e40cbb4969b4898ec4a00688e8aa6f4599 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index d3181239b88..303839b5ae3 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -108,6 +108,15 @@ static int arizona_spk_ev(struct snd_soc_dapm_widget *w, snd_soc_update_bits(codec, ARIZONA_OUTPUT_ENABLES_1, 1 << w->shift, 1 << w->shift); + switch (arizona->type) { + case WM8280: + case WM5110: + msleep(10); + break; + default: + break; + }; + if (priv->spk_ena_pending) { msleep(75); snd_soc_write(codec, 0x4f5, 0xda); From 5deb1d07959e51fc9739fb7b3bcfa7e7d63d3187 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 16 Jan 2014 05:39:53 +0000 Subject: [PATCH 0181/1167] ASoC: florida: Improve EQ coefficient controls The EQ coefficient binary controls overlapped with the volume controls with B4 and B5 volumes being controllable with either the coefficient control or the volume control itself. This patch adds controls for the mode and enable and moves the coefficient control to only cover the coefficients. Change-Id: I68d23c6792821ed2503fd98cd403634d84f70662 Signed-off-by: Charles Keepax Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/florida.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index e6300f92ebc..f968b444db4 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -271,15 +271,8 @@ ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ4", ARIZONA_EQ4MIX_INPUT_1_SOURCE), -SND_SOC_BYTES_MASK("EQ1 Coefficients", ARIZONA_EQ1_1, 21, - ARIZONA_EQ1_ENA_MASK), -SND_SOC_BYTES_MASK("EQ2 Coefficients", ARIZONA_EQ2_1, 21, - ARIZONA_EQ2_ENA_MASK), -SND_SOC_BYTES_MASK("EQ3 Coefficients", ARIZONA_EQ3_1, 21, - ARIZONA_EQ3_ENA_MASK), -SND_SOC_BYTES_MASK("EQ4 Coefficients", ARIZONA_EQ4_1, 21, - ARIZONA_EQ4_ENA_MASK), - +SND_SOC_BYTES("EQ1 Coefficients", ARIZONA_EQ1_3, 18), +SOC_SINGLE("EQ1 Mode Switch", ARIZONA_EQ1_2, ARIZONA_EQ1_B1_MODE, 1, 0), SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ1 B2 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B2_GAIN_SHIFT, @@ -291,6 +284,8 @@ SOC_SINGLE_TLV("EQ1 B4 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ1 B5 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B5_GAIN_SHIFT, 24, 0, eq_tlv), +SND_SOC_BYTES("EQ2 Coefficients", ARIZONA_EQ2_3, 18), +SOC_SINGLE("EQ2 Mode Switch", ARIZONA_EQ2_2, ARIZONA_EQ2_B1_MODE, 1, 0), SOC_SINGLE_TLV("EQ2 B1 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ2 B2 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B2_GAIN_SHIFT, @@ -302,6 +297,8 @@ SOC_SINGLE_TLV("EQ2 B4 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ2 B5 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B5_GAIN_SHIFT, 24, 0, eq_tlv), +SND_SOC_BYTES("EQ3 Coefficients", ARIZONA_EQ3_3, 18), +SOC_SINGLE("EQ3 Mode Switch", ARIZONA_EQ3_2, ARIZONA_EQ3_B1_MODE, 1, 0), SOC_SINGLE_TLV("EQ3 B1 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ3 B2 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B2_GAIN_SHIFT, @@ -313,6 +310,8 @@ SOC_SINGLE_TLV("EQ3 B4 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ3 B5 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B5_GAIN_SHIFT, 24, 0, eq_tlv), +SND_SOC_BYTES("EQ4 Coefficients", ARIZONA_EQ4_3, 18), +SOC_SINGLE("EQ4 Mode Switch", ARIZONA_EQ4_2, ARIZONA_EQ4_B1_MODE, 1, 0), SOC_SINGLE_TLV("EQ4 B1 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ4 B2 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B2_GAIN_SHIFT, From d98f862e325613ff11c9e7213ff6fec9ebae9785 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 16 Jan 2014 05:45:06 +0000 Subject: [PATCH 0182/1167] ASoC: wm5102: Improve EQ coefficient controls The EQ coefficient binary controls overlapped with the volume controls with B4 and B5 volumes being controllable with either the coefficient control or the volume control itself. This patch adds controls for the mode and enable and moves the coefficient control to only cover the coefficients. Change-Id: I9a8a13ede2c8cf2559e05c7b8a51021310893966 Signed-off-by: Charles Keepax Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm5102.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index f96d683a6a5..4a9c73e544e 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -697,15 +697,8 @@ ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ4", ARIZONA_EQ4MIX_INPUT_1_SOURCE), -SND_SOC_BYTES_MASK("EQ1 Coefficients", ARIZONA_EQ1_1, 21, - ARIZONA_EQ1_ENA_MASK), -SND_SOC_BYTES_MASK("EQ2 Coefficients", ARIZONA_EQ2_1, 21, - ARIZONA_EQ2_ENA_MASK), -SND_SOC_BYTES_MASK("EQ3 Coefficients", ARIZONA_EQ3_1, 21, - ARIZONA_EQ3_ENA_MASK), -SND_SOC_BYTES_MASK("EQ4 Coefficients", ARIZONA_EQ4_1, 21, - ARIZONA_EQ4_ENA_MASK), - +SND_SOC_BYTES("EQ1 Coefficients", ARIZONA_EQ1_3, 18), +SOC_SINGLE("EQ1 Mode Switch", ARIZONA_EQ1_2, ARIZONA_EQ1_B1_MODE, 1, 0), SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ1 B2 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B2_GAIN_SHIFT, @@ -717,6 +710,8 @@ SOC_SINGLE_TLV("EQ1 B4 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ1 B5 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B5_GAIN_SHIFT, 24, 0, eq_tlv), +SND_SOC_BYTES("EQ2 Coefficients", ARIZONA_EQ2_3, 18), +SOC_SINGLE("EQ2 Mode Switch", ARIZONA_EQ2_2, ARIZONA_EQ2_B1_MODE, 1, 0), SOC_SINGLE_TLV("EQ2 B1 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ2 B2 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B2_GAIN_SHIFT, @@ -728,6 +723,8 @@ SOC_SINGLE_TLV("EQ2 B4 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ2 B5 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B5_GAIN_SHIFT, 24, 0, eq_tlv), +SND_SOC_BYTES("EQ3 Coefficients", ARIZONA_EQ3_3, 18), +SOC_SINGLE("EQ3 Mode Switch", ARIZONA_EQ3_2, ARIZONA_EQ3_B1_MODE, 1, 0), SOC_SINGLE_TLV("EQ3 B1 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ3 B2 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B2_GAIN_SHIFT, @@ -739,6 +736,8 @@ SOC_SINGLE_TLV("EQ3 B4 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ3 B5 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B5_GAIN_SHIFT, 24, 0, eq_tlv), +SND_SOC_BYTES("EQ4 Coefficients", ARIZONA_EQ4_3, 18), +SOC_SINGLE("EQ4 Mode Switch", ARIZONA_EQ4_2, ARIZONA_EQ4_B1_MODE, 1, 0), SOC_SINGLE_TLV("EQ4 B1 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ4 B2 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B2_GAIN_SHIFT, From 72c23ce0b33dd9e2186ded00bd22ab75a3c5305c Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Mon, 16 Dec 2013 14:55:34 +0530 Subject: [PATCH 0183/1167] ALSA: compress: change the way sample rates are sent to kernel The usage of SNDRV_RATES is not effective as we can have rates like 12000 or some other ones used by decoders. This change the usage of this to use the raw Hz values to be sent to kernel Change-Id: I20ad7ec23a81b8cb7ceba2168639d08bb1ba197c Signed-off-by: Vinod Koul Signed-off-by: Takashi Iwai (cherry picked from commit f0e9c08065dc31210fc4cf313c4ecaa088187dc5) Signed-off-by: Charles Keepax --- include/uapi/sound/compress_params.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/uapi/sound/compress_params.h b/include/uapi/sound/compress_params.h index 602dc6c45d1..1114e380aec 100644 --- a/include/uapi/sound/compress_params.h +++ b/include/uapi/sound/compress_params.h @@ -324,7 +324,7 @@ union snd_codec_options { /** struct snd_codec_desc - description of codec capabilities * @max_ch: Maximum number of audio channels - * @sample_rates: Sampling rates in Hz, use SNDRV_PCM_RATE_xxx for this + * @sample_rates: Sampling rates in Hz, use values like 48000 for this * @bit_rate: Indexed array containing supported bit rates * @num_bitrates: Number of valid values in bit_rate array * @rate_control: value is specified by SND_RATECONTROLMODE defines. From 44a124305a6dfb6b219d1dcac7667da30b7da77c Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Sat, 4 Jan 2014 16:59:11 +0530 Subject: [PATCH 0184/1167] ALSA: compress: remove the sample rate check commit f0e9c080 - "ALSA: compress: change the way sample rates are sent to kernel" changed the way sample rates are sent. So now we don't need to check for PCM_RATE_xxx in kernel Change-Id: I4977c75a5e74bf589dd6d469fbb030fa9f338ea4 Signed-off-by: Vinod Koul Signed-off-by: Takashi Iwai (cherry picked from commit 2aac06f787940543fb37bfdb982eb99431bc6094) Signed-off-by: Charles Keepax --- sound/core/compress_offload.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/sound/core/compress_offload.c b/sound/core/compress_offload.c index 93b44920788..8b88e835a56 100644 --- a/sound/core/compress_offload.c +++ b/sound/core/compress_offload.c @@ -490,9 +490,6 @@ static int snd_compress_check_input(struct snd_compr_params *params) if (params->codec.ch_in == 0 || params->codec.ch_out == 0) return -EINVAL; - if (!(params->codec.sample_rate & SNDRV_PCM_RATE_8000_192000)) - return -EINVAL; - return 0; } From 761079487e5217c5c094976b3c79c7cda0143aa6 Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Sat, 4 Jan 2014 16:59:12 +0530 Subject: [PATCH 0185/1167] ALSA: compress: update comment for sample rate in snd_codec Change-Id: I8984dafec01282ac8296154da9020f830d854521 Signed-off-by: Vinod Koul Signed-off-by: Takashi Iwai (cherry picked from commit d9afee6904caa7cf3c7f417f02e765db89d2b5dc) Signed-off-by: Charles Keepax --- include/uapi/sound/compress_params.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/uapi/sound/compress_params.h b/include/uapi/sound/compress_params.h index 1114e380aec..8c23aebc82a 100644 --- a/include/uapi/sound/compress_params.h +++ b/include/uapi/sound/compress_params.h @@ -364,7 +364,8 @@ struct snd_codec_desc { * @ch_out: Number of output channels. In case of contradiction between * this field and the channelMode field, the channelMode field * overrides. - * @sample_rate: Audio sample rate of input data + * @sample_rate: Audio sample rate of input data in Hz, use values like 48000 + * for this. * @bit_rate: Bitrate of encoded data. May be ignored by decoders * @rate_control: Encoding rate control. See SND_RATECONTROLMODE defines. * Encoders may rely on profiles for quality levels. From 78dab1878c644bbb8836641dc6c93a1125a0d3f9 Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Sat, 4 Jan 2014 16:59:13 +0530 Subject: [PATCH 0186/1167] ALSA: compress: update struct snd_codec_desc for sample rate Now that we don't use SNDRV_PCM_RATE_xxx bit fields for sample rate, we need to change the description to an array for describing the sample rates supported by the sink/source Change-Id: Ibcdb0428f89ece5af854cc33a6ca45e9f58d9ba6 Signed-off-by: Vinod Koul Signed-off-by: Takashi Iwai (cherry picked from commit b8bab04829ab190f71921d4180bda438ba6124ae) Signed-off-by: Charles Keepax --- include/uapi/sound/compress_params.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/uapi/sound/compress_params.h b/include/uapi/sound/compress_params.h index 8c23aebc82a..b62b24b7f83 100644 --- a/include/uapi/sound/compress_params.h +++ b/include/uapi/sound/compress_params.h @@ -57,6 +57,7 @@ #define MAX_NUM_CODECS 32 #define MAX_NUM_CODEC_DESCRIPTORS 32 #define MAX_NUM_BITRATES 32 +#define MAX_NUM_SAMPLE_RATES 32 /* Codecs are listed linearly to allow for extensibility */ #define SND_AUDIOCODEC_PCM ((__u32) 0x00000001) @@ -346,7 +347,7 @@ union snd_codec_options { struct snd_codec_desc { __u32 max_ch; - __u32 sample_rates; + __u32 sample_rates[MAX_NUM_SAMPLE_RATES]; __u32 bit_rate[MAX_NUM_BITRATES]; __u32 num_bitrates; __u32 rate_control; From f9a304d51baed7a728d20c7839d0e18e326a6c20 Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Tue, 7 Jan 2014 21:55:42 +0530 Subject: [PATCH 0187/1167] ALSA: compress: add num_sample_rates in snd_codec_desc this gives ability to convey the valid values of supported rates in sample_rates array Change-Id: Id69b31a228923dc187fb0c957daae5eb3b965af3 Signed-off-by: Vinod Koul Signed-off-by: Takashi Iwai (cherry picked from commit 929559be6d2c494e25bb58b730da4a78c1459e7b) Signed-off-by: Charles Keepax --- include/uapi/sound/compress_params.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/uapi/sound/compress_params.h b/include/uapi/sound/compress_params.h index b62b24b7f83..165e7059de7 100644 --- a/include/uapi/sound/compress_params.h +++ b/include/uapi/sound/compress_params.h @@ -326,6 +326,7 @@ union snd_codec_options { /** struct snd_codec_desc - description of codec capabilities * @max_ch: Maximum number of audio channels * @sample_rates: Sampling rates in Hz, use values like 48000 for this + * @num_sample_rates: Number of valid values in sample_rates array * @bit_rate: Indexed array containing supported bit rates * @num_bitrates: Number of valid values in bit_rate array * @rate_control: value is specified by SND_RATECONTROLMODE defines. @@ -348,6 +349,7 @@ union snd_codec_options { struct snd_codec_desc { __u32 max_ch; __u32 sample_rates[MAX_NUM_SAMPLE_RATES]; + __u32 num_sample_rates; __u32 bit_rate[MAX_NUM_BITRATES]; __u32 num_bitrates; __u32 rate_control; From 18104da02de6bd6252f1699eaf0a3a12f92f29be Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 17 Jan 2014 10:24:37 +0000 Subject: [PATCH 0188/1167] ASoC: wm_adsp: Update specification of sample rate to use new ABI Change-Id: I53aa2c29fe7339b70649b5e38bdf868f98ab8129 Signed-off-by: Charles Keepax Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 24 +++++++++++++++++------- 1 file changed, 17 insertions(+), 7 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index eab61b27c48..b78c52417ed 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -301,7 +301,8 @@ static struct wm_adsp_fw_caps ez2control_caps[] = { .id = SND_AUDIOCODEC_PCM, .desc = { .max_ch = 1, - .sample_rates = SNDRV_PCM_RATE_16000, + .sample_rates = { 16000 }, + .num_sample_rates = 1, .formats = SNDRV_PCM_FMTBIT_S16_LE, }, .num_host_regions = ARRAY_SIZE(ez2control_regions), @@ -332,7 +333,12 @@ static struct wm_adsp_fw_caps trace_caps[] = { .id = SND_AUDIOCODEC_PCM, .desc = { .max_ch = 8, - .sample_rates = SNDRV_PCM_RATE_8000_192000, + .sample_rates = { + 4000,8000,11025,12000,16000,22050, + 24000,32000,44100,48000,64000,88200, + 96000,176400,192000 + }, + .num_sample_rates = 15, .formats = SNDRV_PCM_FMTBIT_S16_LE, }, .num_host_regions = ARRAY_SIZE(trace_regions), @@ -2173,7 +2179,7 @@ static int wm_adsp_of_parse_caps(struct wm_adsp *adsp, fw->caps->id = of_caps[0]; fw->caps->desc.max_ch = of_caps[1]; - fw->caps->desc.sample_rates = of_caps[2]; + fw->caps->desc.sample_rates[0] = of_caps[2]; fw->caps->desc.formats = of_caps[3]; fw->compr_direction = of_caps[4]; } @@ -2354,7 +2360,7 @@ bool wm_adsp_format_supported(const struct wm_adsp *adsp, const struct snd_compr_params *params) { const struct wm_adsp_fw_caps *caps; - int i; + int i, j; for (i = 0; i < adsp->firmwares[adsp->fw].num_caps; i++) { caps = &adsp->firmwares[adsp->fw].caps[i]; @@ -2370,9 +2376,13 @@ bool wm_adsp_format_supported(const struct wm_adsp *adsp, continue; } - if ((caps->desc.sample_rates & params->codec.sample_rate) && - (caps->desc.formats & (1 << params->codec.format))) - return true; + if (!(caps->desc.formats & (1 << params->codec.format))) + continue; + + for (j = 0; j < caps->desc.num_sample_rates; ++j) + if (caps->desc.sample_rates[j] == + params->codec.sample_rate) + return true; } return false; From 94b97d882238ea69a47ef196c798191a5de0f9e7 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Sat, 18 Jan 2014 08:28:57 +0000 Subject: [PATCH 0189/1167] extcon: arizona: Add configurable delay before MICBIAS ramp Allow users to add a configurable delay between detection of a jack and ramping the MICBIAS to being microphone detection. Change-Id: I9da49e9ed00768fa309241468d1b8e7405a399cd Signed-off-by: Charles Keepax --- Documentation/devicetree/bindings/mfd/arizona.txt | 3 +++ drivers/extcon/extcon-arizona.c | 7 +++++++ include/linux/mfd/arizona/pdata.h | 3 +++ 3 files changed, 13 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index bb3b273452e..8a25210b39f 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -65,6 +65,8 @@ Optional properties: bits in the MIC_DETECT_1 register The third cell represents the value of the micd-pol-gpio pin, a non-zero value indicates this should be on + - wlf,init-mic-delay : Adds a delay in milliseconds between jack detection + and beginning ramp of MICBIAS. - wlf,micbias1 : Configuration for the micbias regulator, should include 5 cells. @@ -139,6 +141,7 @@ codec: wm5102@1a { >; wlf,micbias2 = <2600 0 1 1 0>; + wlf,init-mic-delay = <10>; wlf,dmic-ref = <0 0 1 0>; wlf,inmode = <0 0 2 0>; diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 904e62f6d7e..5ff28f3db55 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -28,6 +28,7 @@ #include #include #include +#include #include @@ -1097,6 +1098,9 @@ static irqreturn_t arizona_jackdet(int irq, void *data) info->mic = false; info->jack_flips = 0; + if (arizona->pdata.init_mic_delay) + msleep(arizona->pdata.init_mic_delay); + arizona_start_mic(info); } else { schedule_delayed_work(&info->hpdet_work, @@ -1214,6 +1218,9 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,gpsw", false, &pdata->gpsw); + arizona_of_read_u32(arizona, "wlf,init-mic-delay", false, + &pdata->init_mic_delay); + return 0; } diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 0b26e8bf182..f1abc4a896d 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -163,6 +163,9 @@ struct arizona_pdata { /** Force MICBIAS on for mic detect */ bool micd_force_micbias; + /** Delay between jack detection and MICBIAS ramp */ + int init_mic_delay; + /** Mic detect level parameters */ const struct arizona_micd_range *micd_ranges; int num_micd_ranges; From 1e781e4f37de11333fd1194f9fc04ee5a3160b33 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Sat, 18 Jan 2014 08:38:13 +0000 Subject: [PATCH 0190/1167] switch: arizona: Add configurable delay before MICBIAS ramp Allow users to add a configurable delay between detection of a jack and ramping the MICBIAS to being microphone detection. Change-Id: I8db53ade7efabb90f4c86028b84daa3026eecc50 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 2a67c9fb969..8f0f6a1db28 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -28,6 +28,7 @@ #include #include #include +#include #include @@ -1058,6 +1059,9 @@ static irqreturn_t arizona_jackdet(int irq, void *data) info->mic = false; info->jack_flips = 0; + if (arizona->pdata.init_mic_delay) + msleep(arizona->pdata.init_mic_delay); + arizona_start_mic(info); } else { schedule_delayed_work(&info->hpdet_work, @@ -1173,6 +1177,9 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,gpsw", false, &pdata->gpsw); + arizona_of_read_u32(arizona, "wlf,init-mic-delay", false, + &pdata->init_mic_delay); + return 0; } From e9a76c6d62b2ecc399100c7687a445c852eeb6df Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 9 Sep 2013 13:45:52 +0100 Subject: [PATCH 0191/1167] mfd: wm5102: Make additional DSP registers available to the user Signed-off-by: Charles Keepax --- drivers/mfd/wm5102-tables.c | 34 +++++++++++++++++++++++++++ include/linux/mfd/arizona/registers.h | 17 ++++++++++++++ 2 files changed, 51 insertions(+) diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index 467a618be67..92c8d613ea2 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -1936,6 +1936,23 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DSP1_STATUS_1: case ARIZONA_DSP1_STATUS_2: case ARIZONA_DSP1_STATUS_3: + case ARIZONA_DSP1_WDMA_BUFFER_1: + case ARIZONA_DSP1_WDMA_BUFFER_2: + case ARIZONA_DSP1_WDMA_BUFFER_3: + case ARIZONA_DSP1_WDMA_BUFFER_4: + case ARIZONA_DSP1_WDMA_BUFFER_5: + case ARIZONA_DSP1_WDMA_BUFFER_6: + case ARIZONA_DSP1_WDMA_BUFFER_7: + case ARIZONA_DSP1_WDMA_BUFFER_8: + case ARIZONA_DSP1_RDMA_BUFFER_1: + case ARIZONA_DSP1_RDMA_BUFFER_2: + case ARIZONA_DSP1_RDMA_BUFFER_3: + case ARIZONA_DSP1_RDMA_BUFFER_4: + case ARIZONA_DSP1_RDMA_BUFFER_5: + case ARIZONA_DSP1_RDMA_BUFFER_6: + case ARIZONA_DSP1_WDMA_CONFIG_1: + case ARIZONA_DSP1_WDMA_CONFIG_2: + case ARIZONA_DSP1_RDMA_CONFIG_1: case ARIZONA_DSP1_SCRATCH_0: case ARIZONA_DSP1_SCRATCH_1: case ARIZONA_DSP1_SCRATCH_2: @@ -1994,6 +2011,23 @@ static bool wm5102_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_DSP1_STATUS_1: case ARIZONA_DSP1_STATUS_2: case ARIZONA_DSP1_STATUS_3: + case ARIZONA_DSP1_WDMA_BUFFER_1: + case ARIZONA_DSP1_WDMA_BUFFER_2: + case ARIZONA_DSP1_WDMA_BUFFER_3: + case ARIZONA_DSP1_WDMA_BUFFER_4: + case ARIZONA_DSP1_WDMA_BUFFER_5: + case ARIZONA_DSP1_WDMA_BUFFER_6: + case ARIZONA_DSP1_WDMA_BUFFER_7: + case ARIZONA_DSP1_WDMA_BUFFER_8: + case ARIZONA_DSP1_RDMA_BUFFER_1: + case ARIZONA_DSP1_RDMA_BUFFER_2: + case ARIZONA_DSP1_RDMA_BUFFER_3: + case ARIZONA_DSP1_RDMA_BUFFER_4: + case ARIZONA_DSP1_RDMA_BUFFER_5: + case ARIZONA_DSP1_RDMA_BUFFER_6: + case ARIZONA_DSP1_WDMA_CONFIG_1: + case ARIZONA_DSP1_WDMA_CONFIG_2: + case ARIZONA_DSP1_RDMA_CONFIG_1: case ARIZONA_DSP1_SCRATCH_0: case ARIZONA_DSP1_SCRATCH_1: case ARIZONA_DSP1_SCRATCH_2: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 1b466778f37..ac3ffff7e2f 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -1043,6 +1043,23 @@ #define ARIZONA_DSP1_STATUS_1 0x1104 #define ARIZONA_DSP1_STATUS_2 0x1105 #define ARIZONA_DSP1_STATUS_3 0x1106 +#define ARIZONA_DSP1_WDMA_BUFFER_1 0x1110 +#define ARIZONA_DSP1_WDMA_BUFFER_2 0x1111 +#define ARIZONA_DSP1_WDMA_BUFFER_3 0x1112 +#define ARIZONA_DSP1_WDMA_BUFFER_4 0x1113 +#define ARIZONA_DSP1_WDMA_BUFFER_5 0x1114 +#define ARIZONA_DSP1_WDMA_BUFFER_6 0x1115 +#define ARIZONA_DSP1_WDMA_BUFFER_7 0x1116 +#define ARIZONA_DSP1_WDMA_BUFFER_8 0x1117 +#define ARIZONA_DSP1_RDMA_BUFFER_1 0x1120 +#define ARIZONA_DSP1_RDMA_BUFFER_2 0x1121 +#define ARIZONA_DSP1_RDMA_BUFFER_3 0x1122 +#define ARIZONA_DSP1_RDMA_BUFFER_4 0x1123 +#define ARIZONA_DSP1_RDMA_BUFFER_5 0x1124 +#define ARIZONA_DSP1_RDMA_BUFFER_6 0x1125 +#define ARIZONA_DSP1_WDMA_CONFIG_1 0x1130 +#define ARIZONA_DSP1_WDMA_CONFIG_2 0x1131 +#define ARIZONA_DSP1_RDMA_CONFIG_1 0x1134 #define ARIZONA_DSP1_SCRATCH_0 0x1140 #define ARIZONA_DSP1_SCRATCH_1 0x1141 #define ARIZONA_DSP1_SCRATCH_2 0x1142 From a7dc061b80e889f84eb08629a0b0b00c50f66786 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 9 Sep 2013 13:58:04 +0100 Subject: [PATCH 0192/1167] mfd: florida: Make additional DSP registers available to the user Change-Id: I761a483e7007f9e967ab7901d46523370e18b0be Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 168 ++++++++++++++++++++++++++ include/linux/mfd/arizona/registers.h | 67 ++++++++++ 2 files changed, 235 insertions(+) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 893f1ca93e9..b16c0f08481 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -2473,6 +2473,27 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DSP1_STATUS_1: case ARIZONA_DSP1_STATUS_2: case ARIZONA_DSP1_STATUS_3: + case ARIZONA_DSP1_STATUS_4: + case ARIZONA_DSP1_WDMA_BUFFER_1: + case ARIZONA_DSP1_WDMA_BUFFER_2: + case ARIZONA_DSP1_WDMA_BUFFER_3: + case ARIZONA_DSP1_WDMA_BUFFER_4: + case ARIZONA_DSP1_WDMA_BUFFER_5: + case ARIZONA_DSP1_WDMA_BUFFER_6: + case ARIZONA_DSP1_WDMA_BUFFER_7: + case ARIZONA_DSP1_WDMA_BUFFER_8: + case ARIZONA_DSP1_RDMA_BUFFER_1: + case ARIZONA_DSP1_RDMA_BUFFER_2: + case ARIZONA_DSP1_RDMA_BUFFER_3: + case ARIZONA_DSP1_RDMA_BUFFER_4: + case ARIZONA_DSP1_RDMA_BUFFER_5: + case ARIZONA_DSP1_RDMA_BUFFER_6: + case ARIZONA_DSP1_WDMA_CONFIG_1: + case ARIZONA_DSP1_WDMA_CONFIG_2: + case ARIZONA_DSP1_WDMA_OFFSET_1: + case ARIZONA_DSP1_RDMA_CONFIG_1: + case ARIZONA_DSP1_RDMA_OFFSET_1: + case ARIZONA_DSP1_EXTERNAL_START_SELECT_1: case ARIZONA_DSP1_SCRATCH_0: case ARIZONA_DSP1_SCRATCH_1: case ARIZONA_DSP1_SCRATCH_2: @@ -2482,6 +2503,27 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DSP2_STATUS_1: case ARIZONA_DSP2_STATUS_2: case ARIZONA_DSP2_STATUS_3: + case ARIZONA_DSP2_STATUS_4: + case ARIZONA_DSP2_WDMA_BUFFER_1: + case ARIZONA_DSP2_WDMA_BUFFER_2: + case ARIZONA_DSP2_WDMA_BUFFER_3: + case ARIZONA_DSP2_WDMA_BUFFER_4: + case ARIZONA_DSP2_WDMA_BUFFER_5: + case ARIZONA_DSP2_WDMA_BUFFER_6: + case ARIZONA_DSP2_WDMA_BUFFER_7: + case ARIZONA_DSP2_WDMA_BUFFER_8: + case ARIZONA_DSP2_RDMA_BUFFER_1: + case ARIZONA_DSP2_RDMA_BUFFER_2: + case ARIZONA_DSP2_RDMA_BUFFER_3: + case ARIZONA_DSP2_RDMA_BUFFER_4: + case ARIZONA_DSP2_RDMA_BUFFER_5: + case ARIZONA_DSP2_RDMA_BUFFER_6: + case ARIZONA_DSP2_WDMA_CONFIG_1: + case ARIZONA_DSP2_WDMA_CONFIG_2: + case ARIZONA_DSP2_WDMA_OFFSET_1: + case ARIZONA_DSP2_RDMA_CONFIG_1: + case ARIZONA_DSP2_RDMA_OFFSET_1: + case ARIZONA_DSP2_EXTERNAL_START_SELECT_1: case ARIZONA_DSP2_SCRATCH_0: case ARIZONA_DSP2_SCRATCH_1: case ARIZONA_DSP2_SCRATCH_2: @@ -2491,6 +2533,27 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DSP3_STATUS_1: case ARIZONA_DSP3_STATUS_2: case ARIZONA_DSP3_STATUS_3: + case ARIZONA_DSP3_STATUS_4: + case ARIZONA_DSP3_WDMA_BUFFER_1: + case ARIZONA_DSP3_WDMA_BUFFER_2: + case ARIZONA_DSP3_WDMA_BUFFER_3: + case ARIZONA_DSP3_WDMA_BUFFER_4: + case ARIZONA_DSP3_WDMA_BUFFER_5: + case ARIZONA_DSP3_WDMA_BUFFER_6: + case ARIZONA_DSP3_WDMA_BUFFER_7: + case ARIZONA_DSP3_WDMA_BUFFER_8: + case ARIZONA_DSP3_RDMA_BUFFER_1: + case ARIZONA_DSP3_RDMA_BUFFER_2: + case ARIZONA_DSP3_RDMA_BUFFER_3: + case ARIZONA_DSP3_RDMA_BUFFER_4: + case ARIZONA_DSP3_RDMA_BUFFER_5: + case ARIZONA_DSP3_RDMA_BUFFER_6: + case ARIZONA_DSP3_WDMA_CONFIG_1: + case ARIZONA_DSP3_WDMA_CONFIG_2: + case ARIZONA_DSP3_WDMA_OFFSET_1: + case ARIZONA_DSP3_RDMA_CONFIG_1: + case ARIZONA_DSP3_RDMA_OFFSET_1: + case ARIZONA_DSP3_EXTERNAL_START_SELECT_1: case ARIZONA_DSP3_SCRATCH_0: case ARIZONA_DSP3_SCRATCH_1: case ARIZONA_DSP3_SCRATCH_2: @@ -2500,6 +2563,27 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DSP4_STATUS_1: case ARIZONA_DSP4_STATUS_2: case ARIZONA_DSP4_STATUS_3: + case ARIZONA_DSP4_STATUS_4: + case ARIZONA_DSP4_WDMA_BUFFER_1: + case ARIZONA_DSP4_WDMA_BUFFER_2: + case ARIZONA_DSP4_WDMA_BUFFER_3: + case ARIZONA_DSP4_WDMA_BUFFER_4: + case ARIZONA_DSP4_WDMA_BUFFER_5: + case ARIZONA_DSP4_WDMA_BUFFER_6: + case ARIZONA_DSP4_WDMA_BUFFER_7: + case ARIZONA_DSP4_WDMA_BUFFER_8: + case ARIZONA_DSP4_RDMA_BUFFER_1: + case ARIZONA_DSP4_RDMA_BUFFER_2: + case ARIZONA_DSP4_RDMA_BUFFER_3: + case ARIZONA_DSP4_RDMA_BUFFER_4: + case ARIZONA_DSP4_RDMA_BUFFER_5: + case ARIZONA_DSP4_RDMA_BUFFER_6: + case ARIZONA_DSP4_WDMA_CONFIG_1: + case ARIZONA_DSP4_WDMA_CONFIG_2: + case ARIZONA_DSP4_WDMA_OFFSET_1: + case ARIZONA_DSP4_RDMA_CONFIG_1: + case ARIZONA_DSP4_RDMA_OFFSET_1: + case ARIZONA_DSP4_EXTERNAL_START_SELECT_1: case ARIZONA_DSP4_SCRATCH_0: case ARIZONA_DSP4_SCRATCH_1: case ARIZONA_DSP4_SCRATCH_2: @@ -2556,6 +2640,27 @@ static bool florida_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_DSP1_STATUS_1: case ARIZONA_DSP1_STATUS_2: case ARIZONA_DSP1_STATUS_3: + case ARIZONA_DSP1_STATUS_4: + case ARIZONA_DSP1_WDMA_BUFFER_1: + case ARIZONA_DSP1_WDMA_BUFFER_2: + case ARIZONA_DSP1_WDMA_BUFFER_3: + case ARIZONA_DSP1_WDMA_BUFFER_4: + case ARIZONA_DSP1_WDMA_BUFFER_5: + case ARIZONA_DSP1_WDMA_BUFFER_6: + case ARIZONA_DSP1_WDMA_BUFFER_7: + case ARIZONA_DSP1_WDMA_BUFFER_8: + case ARIZONA_DSP1_RDMA_BUFFER_1: + case ARIZONA_DSP1_RDMA_BUFFER_2: + case ARIZONA_DSP1_RDMA_BUFFER_3: + case ARIZONA_DSP1_RDMA_BUFFER_4: + case ARIZONA_DSP1_RDMA_BUFFER_5: + case ARIZONA_DSP1_RDMA_BUFFER_6: + case ARIZONA_DSP1_WDMA_CONFIG_1: + case ARIZONA_DSP1_WDMA_CONFIG_2: + case ARIZONA_DSP1_WDMA_OFFSET_1: + case ARIZONA_DSP1_RDMA_CONFIG_1: + case ARIZONA_DSP1_RDMA_OFFSET_1: + case ARIZONA_DSP1_EXTERNAL_START_SELECT_1: case ARIZONA_DSP1_SCRATCH_0: case ARIZONA_DSP1_SCRATCH_1: case ARIZONA_DSP1_SCRATCH_2: @@ -2563,6 +2668,27 @@ static bool florida_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_DSP2_STATUS_1: case ARIZONA_DSP2_STATUS_2: case ARIZONA_DSP2_STATUS_3: + case ARIZONA_DSP2_STATUS_4: + case ARIZONA_DSP2_WDMA_BUFFER_1: + case ARIZONA_DSP2_WDMA_BUFFER_2: + case ARIZONA_DSP2_WDMA_BUFFER_3: + case ARIZONA_DSP2_WDMA_BUFFER_4: + case ARIZONA_DSP2_WDMA_BUFFER_5: + case ARIZONA_DSP2_WDMA_BUFFER_6: + case ARIZONA_DSP2_WDMA_BUFFER_7: + case ARIZONA_DSP2_WDMA_BUFFER_8: + case ARIZONA_DSP2_RDMA_BUFFER_1: + case ARIZONA_DSP2_RDMA_BUFFER_2: + case ARIZONA_DSP2_RDMA_BUFFER_3: + case ARIZONA_DSP2_RDMA_BUFFER_4: + case ARIZONA_DSP2_RDMA_BUFFER_5: + case ARIZONA_DSP2_RDMA_BUFFER_6: + case ARIZONA_DSP2_WDMA_CONFIG_1: + case ARIZONA_DSP2_WDMA_CONFIG_2: + case ARIZONA_DSP2_WDMA_OFFSET_1: + case ARIZONA_DSP2_RDMA_CONFIG_1: + case ARIZONA_DSP2_RDMA_OFFSET_1: + case ARIZONA_DSP2_EXTERNAL_START_SELECT_1: case ARIZONA_DSP2_SCRATCH_0: case ARIZONA_DSP2_SCRATCH_1: case ARIZONA_DSP2_SCRATCH_2: @@ -2570,6 +2696,27 @@ static bool florida_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_DSP3_STATUS_1: case ARIZONA_DSP3_STATUS_2: case ARIZONA_DSP3_STATUS_3: + case ARIZONA_DSP3_STATUS_4: + case ARIZONA_DSP3_WDMA_BUFFER_1: + case ARIZONA_DSP3_WDMA_BUFFER_2: + case ARIZONA_DSP3_WDMA_BUFFER_3: + case ARIZONA_DSP3_WDMA_BUFFER_4: + case ARIZONA_DSP3_WDMA_BUFFER_5: + case ARIZONA_DSP3_WDMA_BUFFER_6: + case ARIZONA_DSP3_WDMA_BUFFER_7: + case ARIZONA_DSP3_WDMA_BUFFER_8: + case ARIZONA_DSP3_RDMA_BUFFER_1: + case ARIZONA_DSP3_RDMA_BUFFER_2: + case ARIZONA_DSP3_RDMA_BUFFER_3: + case ARIZONA_DSP3_RDMA_BUFFER_4: + case ARIZONA_DSP3_RDMA_BUFFER_5: + case ARIZONA_DSP3_RDMA_BUFFER_6: + case ARIZONA_DSP3_WDMA_CONFIG_1: + case ARIZONA_DSP3_WDMA_CONFIG_2: + case ARIZONA_DSP3_WDMA_OFFSET_1: + case ARIZONA_DSP3_RDMA_CONFIG_1: + case ARIZONA_DSP3_RDMA_OFFSET_1: + case ARIZONA_DSP3_EXTERNAL_START_SELECT_1: case ARIZONA_DSP3_SCRATCH_0: case ARIZONA_DSP3_SCRATCH_1: case ARIZONA_DSP3_SCRATCH_2: @@ -2577,6 +2724,27 @@ static bool florida_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_DSP4_STATUS_1: case ARIZONA_DSP4_STATUS_2: case ARIZONA_DSP4_STATUS_3: + case ARIZONA_DSP4_STATUS_4: + case ARIZONA_DSP4_WDMA_BUFFER_1: + case ARIZONA_DSP4_WDMA_BUFFER_2: + case ARIZONA_DSP4_WDMA_BUFFER_3: + case ARIZONA_DSP4_WDMA_BUFFER_4: + case ARIZONA_DSP4_WDMA_BUFFER_5: + case ARIZONA_DSP4_WDMA_BUFFER_6: + case ARIZONA_DSP4_WDMA_BUFFER_7: + case ARIZONA_DSP4_WDMA_BUFFER_8: + case ARIZONA_DSP4_RDMA_BUFFER_1: + case ARIZONA_DSP4_RDMA_BUFFER_2: + case ARIZONA_DSP4_RDMA_BUFFER_3: + case ARIZONA_DSP4_RDMA_BUFFER_4: + case ARIZONA_DSP4_RDMA_BUFFER_5: + case ARIZONA_DSP4_RDMA_BUFFER_6: + case ARIZONA_DSP4_WDMA_CONFIG_1: + case ARIZONA_DSP4_WDMA_CONFIG_2: + case ARIZONA_DSP4_WDMA_OFFSET_1: + case ARIZONA_DSP4_RDMA_CONFIG_1: + case ARIZONA_DSP4_RDMA_OFFSET_1: + case ARIZONA_DSP4_EXTERNAL_START_SELECT_1: case ARIZONA_DSP4_SCRATCH_0: case ARIZONA_DSP4_SCRATCH_1: case ARIZONA_DSP4_SCRATCH_2: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index ac3ffff7e2f..0ed7f6d1f8b 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -1043,6 +1043,7 @@ #define ARIZONA_DSP1_STATUS_1 0x1104 #define ARIZONA_DSP1_STATUS_2 0x1105 #define ARIZONA_DSP1_STATUS_3 0x1106 +#define ARIZONA_DSP1_STATUS_4 0x1107 #define ARIZONA_DSP1_WDMA_BUFFER_1 0x1110 #define ARIZONA_DSP1_WDMA_BUFFER_2 0x1111 #define ARIZONA_DSP1_WDMA_BUFFER_3 0x1112 @@ -1059,7 +1060,10 @@ #define ARIZONA_DSP1_RDMA_BUFFER_6 0x1125 #define ARIZONA_DSP1_WDMA_CONFIG_1 0x1130 #define ARIZONA_DSP1_WDMA_CONFIG_2 0x1131 +#define ARIZONA_DSP1_WDMA_OFFSET_1 0x1132 #define ARIZONA_DSP1_RDMA_CONFIG_1 0x1134 +#define ARIZONA_DSP1_RDMA_OFFSET_1 0x1135 +#define ARIZONA_DSP1_EXTERNAL_START_SELECT_1 0x1138 #define ARIZONA_DSP1_SCRATCH_0 0x1140 #define ARIZONA_DSP1_SCRATCH_1 0x1141 #define ARIZONA_DSP1_SCRATCH_2 0x1142 @@ -1069,6 +1073,27 @@ #define ARIZONA_DSP2_STATUS_1 0x1204 #define ARIZONA_DSP2_STATUS_2 0x1205 #define ARIZONA_DSP2_STATUS_3 0x1206 +#define ARIZONA_DSP2_STATUS_4 0x1207 +#define ARIZONA_DSP2_WDMA_BUFFER_1 0x1210 +#define ARIZONA_DSP2_WDMA_BUFFER_2 0x1211 +#define ARIZONA_DSP2_WDMA_BUFFER_3 0x1212 +#define ARIZONA_DSP2_WDMA_BUFFER_4 0x1213 +#define ARIZONA_DSP2_WDMA_BUFFER_5 0x1214 +#define ARIZONA_DSP2_WDMA_BUFFER_6 0x1215 +#define ARIZONA_DSP2_WDMA_BUFFER_7 0x1216 +#define ARIZONA_DSP2_WDMA_BUFFER_8 0x1217 +#define ARIZONA_DSP2_RDMA_BUFFER_1 0x1220 +#define ARIZONA_DSP2_RDMA_BUFFER_2 0x1221 +#define ARIZONA_DSP2_RDMA_BUFFER_3 0x1222 +#define ARIZONA_DSP2_RDMA_BUFFER_4 0x1223 +#define ARIZONA_DSP2_RDMA_BUFFER_5 0x1224 +#define ARIZONA_DSP2_RDMA_BUFFER_6 0x1225 +#define ARIZONA_DSP2_WDMA_CONFIG_1 0x1230 +#define ARIZONA_DSP2_WDMA_CONFIG_2 0x1231 +#define ARIZONA_DSP2_WDMA_OFFSET_1 0x1232 +#define ARIZONA_DSP2_RDMA_CONFIG_1 0x1234 +#define ARIZONA_DSP2_RDMA_OFFSET_1 0x1235 +#define ARIZONA_DSP2_EXTERNAL_START_SELECT_1 0x1238 #define ARIZONA_DSP2_SCRATCH_0 0x1240 #define ARIZONA_DSP2_SCRATCH_1 0x1241 #define ARIZONA_DSP2_SCRATCH_2 0x1242 @@ -1078,6 +1103,27 @@ #define ARIZONA_DSP3_STATUS_1 0x1304 #define ARIZONA_DSP3_STATUS_2 0x1305 #define ARIZONA_DSP3_STATUS_3 0x1306 +#define ARIZONA_DSP3_STATUS_4 0x1307 +#define ARIZONA_DSP3_WDMA_BUFFER_1 0x1310 +#define ARIZONA_DSP3_WDMA_BUFFER_2 0x1311 +#define ARIZONA_DSP3_WDMA_BUFFER_3 0x1312 +#define ARIZONA_DSP3_WDMA_BUFFER_4 0x1313 +#define ARIZONA_DSP3_WDMA_BUFFER_5 0x1314 +#define ARIZONA_DSP3_WDMA_BUFFER_6 0x1315 +#define ARIZONA_DSP3_WDMA_BUFFER_7 0x1316 +#define ARIZONA_DSP3_WDMA_BUFFER_8 0x1317 +#define ARIZONA_DSP3_RDMA_BUFFER_1 0x1320 +#define ARIZONA_DSP3_RDMA_BUFFER_2 0x1321 +#define ARIZONA_DSP3_RDMA_BUFFER_3 0x1322 +#define ARIZONA_DSP3_RDMA_BUFFER_4 0x1323 +#define ARIZONA_DSP3_RDMA_BUFFER_5 0x1324 +#define ARIZONA_DSP3_RDMA_BUFFER_6 0x1325 +#define ARIZONA_DSP3_WDMA_CONFIG_1 0x1330 +#define ARIZONA_DSP3_WDMA_CONFIG_2 0x1331 +#define ARIZONA_DSP3_WDMA_OFFSET_1 0x1332 +#define ARIZONA_DSP3_RDMA_CONFIG_1 0x1334 +#define ARIZONA_DSP3_RDMA_OFFSET_1 0x1335 +#define ARIZONA_DSP3_EXTERNAL_START_SELECT_1 0x1338 #define ARIZONA_DSP3_SCRATCH_0 0x1340 #define ARIZONA_DSP3_SCRATCH_1 0x1341 #define ARIZONA_DSP3_SCRATCH_2 0x1342 @@ -1087,6 +1133,27 @@ #define ARIZONA_DSP4_STATUS_1 0x1404 #define ARIZONA_DSP4_STATUS_2 0x1405 #define ARIZONA_DSP4_STATUS_3 0x1406 +#define ARIZONA_DSP4_STATUS_4 0x1407 +#define ARIZONA_DSP4_WDMA_BUFFER_1 0x1410 +#define ARIZONA_DSP4_WDMA_BUFFER_2 0x1411 +#define ARIZONA_DSP4_WDMA_BUFFER_3 0x1412 +#define ARIZONA_DSP4_WDMA_BUFFER_4 0x1413 +#define ARIZONA_DSP4_WDMA_BUFFER_5 0x1414 +#define ARIZONA_DSP4_WDMA_BUFFER_6 0x1415 +#define ARIZONA_DSP4_WDMA_BUFFER_7 0x1416 +#define ARIZONA_DSP4_WDMA_BUFFER_8 0x1417 +#define ARIZONA_DSP4_RDMA_BUFFER_1 0x1420 +#define ARIZONA_DSP4_RDMA_BUFFER_2 0x1421 +#define ARIZONA_DSP4_RDMA_BUFFER_3 0x1422 +#define ARIZONA_DSP4_RDMA_BUFFER_4 0x1423 +#define ARIZONA_DSP4_RDMA_BUFFER_5 0x1424 +#define ARIZONA_DSP4_RDMA_BUFFER_6 0x1425 +#define ARIZONA_DSP4_WDMA_CONFIG_1 0x1430 +#define ARIZONA_DSP4_WDMA_CONFIG_2 0x1431 +#define ARIZONA_DSP4_WDMA_OFFSET_1 0x1432 +#define ARIZONA_DSP4_RDMA_CONFIG_1 0x1434 +#define ARIZONA_DSP4_RDMA_OFFSET_1 0x1435 +#define ARIZONA_DSP4_EXTERNAL_START_SELECT_1 0x1438 #define ARIZONA_DSP4_SCRATCH_0 0x1440 #define ARIZONA_DSP4_SCRATCH_1 0x1441 #define ARIZONA_DSP4_SCRATCH_2 0x1442 From 46f9ad0a225c7e6a601054654f99e24bce39cc34 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 22 Jan 2014 15:00:37 +0000 Subject: [PATCH 0193/1167] ASoC: wm_adsp: Allow DT compr-caps to contain multiple sample rates Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 66 +++++++++++++++++++++++--------------- 1 file changed, 40 insertions(+), 26 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index b78c52417ed..0a7e85e1214 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2151,38 +2151,52 @@ static int wm_adsp_of_parse_caps(struct wm_adsp *adsp, struct device_node *np, struct wm_adsp_fw_defs *fw) { - int ret; - u32 of_caps[5]; + const char *prop = "wlf,compr-caps"; + int ret, i; + int len_prop; + u32 of_cap; - ret = of_property_read_u32_array(np, "wlf,compr-caps", - of_caps, ARRAY_SIZE(of_caps)); + if (!of_get_property(np, prop, &len_prop)) + return -EINVAL; - if (ret >= 0) { - fw->num_caps = 1; - fw->caps = devm_kzalloc(adsp->dev, - sizeof(struct wm_adsp_fw_caps), - GFP_KERNEL); - if (!fw->caps) - return -ENOMEM; + len_prop /= sizeof(u32); - fw->caps->num_host_regions = ARRAY_SIZE(ez2control_regions); - fw->caps->host_region_defs = - devm_kzalloc(adsp->dev, - sizeof(ez2control_regions), - GFP_KERNEL); - if (!fw->caps->host_region_defs) - return -ENOMEM; + if (len_prop < 5 || len_prop > 5 + MAX_NUM_SAMPLE_RATES) + return -EOVERFLOW; + + fw->num_caps = 1; + fw->caps = devm_kzalloc(adsp->dev, + sizeof(struct wm_adsp_fw_caps), + GFP_KERNEL); + if (!fw->caps) + return -ENOMEM; + + fw->caps->num_host_regions = ARRAY_SIZE(ez2control_regions); + fw->caps->host_region_defs = + devm_kzalloc(adsp->dev, + sizeof(ez2control_regions), + GFP_KERNEL); + if (!fw->caps->host_region_defs) + return -ENOMEM; + + memcpy(fw->caps->host_region_defs, + ez2control_regions, + sizeof(ez2control_regions)); - memcpy(fw->caps->host_region_defs, - ez2control_regions, - sizeof(ez2control_regions)); + of_property_read_u32_index(np, prop, 0, &of_cap); + fw->caps->id = of_cap; + of_property_read_u32_index(np, prop, 1, &of_cap); + fw->caps->desc.max_ch = of_cap; + of_property_read_u32_index(np, prop, 2, &of_cap); + fw->caps->desc.formats = of_cap; + of_property_read_u32_index(np, prop, 3, &of_cap); + fw->compr_direction = of_cap; - fw->caps->id = of_caps[0]; - fw->caps->desc.max_ch = of_caps[1]; - fw->caps->desc.sample_rates[0] = of_caps[2]; - fw->caps->desc.formats = of_caps[3]; - fw->compr_direction = of_caps[4]; + for (i = 4; i < len_prop; ++i) { + of_property_read_u32_index(np, prop, i, &of_cap); + fw->caps->desc.sample_rates[i - 4] = of_cap; } + fw->caps->desc.num_sample_rates = i - 4; return ret; } From e53372746d9e86101129101562c0e4720754dc91 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 23 Jan 2014 10:06:18 +0000 Subject: [PATCH 0194/1167] ASoC: florida: Only trigger ez2ctrl callback for ez2ctrl Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index f968b444db4..9fef873b6a3 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -1714,7 +1714,8 @@ static irqreturn_t adsp2_irq(int irq, void *data) mutex_lock(&florida->compr_info.lock); if (florida->core.arizona->pdata.ez2ctrl_trigger && - !florida->compr_info.trig) { + !florida->compr_info.trig && + florida->compr_info.adsp->fw_id == 0x4000d) { florida->core.arizona->pdata.ez2ctrl_trigger(); florida->compr_info.trig = true; } From ecae18f4b6267d925eac1aee9ec4f92acb5c077b Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 23 Jan 2014 11:24:56 +0000 Subject: [PATCH 0195/1167] ASoC: wm5102: Correct typo in EQ coefficient size Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5102.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 4a9c73e544e..ed7a67eba70 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -697,7 +697,7 @@ ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ4", ARIZONA_EQ4MIX_INPUT_1_SOURCE), -SND_SOC_BYTES("EQ1 Coefficients", ARIZONA_EQ1_3, 18), +SND_SOC_BYTES("EQ1 Coefficients", ARIZONA_EQ1_3, 19), SOC_SINGLE("EQ1 Mode Switch", ARIZONA_EQ1_2, ARIZONA_EQ1_B1_MODE, 1, 0), SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, 24, 0, eq_tlv), @@ -710,7 +710,7 @@ SOC_SINGLE_TLV("EQ1 B4 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ1 B5 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B5_GAIN_SHIFT, 24, 0, eq_tlv), -SND_SOC_BYTES("EQ2 Coefficients", ARIZONA_EQ2_3, 18), +SND_SOC_BYTES("EQ2 Coefficients", ARIZONA_EQ2_3, 19), SOC_SINGLE("EQ2 Mode Switch", ARIZONA_EQ2_2, ARIZONA_EQ2_B1_MODE, 1, 0), SOC_SINGLE_TLV("EQ2 B1 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B1_GAIN_SHIFT, 24, 0, eq_tlv), @@ -723,7 +723,7 @@ SOC_SINGLE_TLV("EQ2 B4 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ2 B5 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B5_GAIN_SHIFT, 24, 0, eq_tlv), -SND_SOC_BYTES("EQ3 Coefficients", ARIZONA_EQ3_3, 18), +SND_SOC_BYTES("EQ3 Coefficients", ARIZONA_EQ3_3, 19), SOC_SINGLE("EQ3 Mode Switch", ARIZONA_EQ3_2, ARIZONA_EQ3_B1_MODE, 1, 0), SOC_SINGLE_TLV("EQ3 B1 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B1_GAIN_SHIFT, 24, 0, eq_tlv), @@ -736,7 +736,7 @@ SOC_SINGLE_TLV("EQ3 B4 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ3 B5 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B5_GAIN_SHIFT, 24, 0, eq_tlv), -SND_SOC_BYTES("EQ4 Coefficients", ARIZONA_EQ4_3, 18), +SND_SOC_BYTES("EQ4 Coefficients", ARIZONA_EQ4_3, 19), SOC_SINGLE("EQ4 Mode Switch", ARIZONA_EQ4_2, ARIZONA_EQ4_B1_MODE, 1, 0), SOC_SINGLE_TLV("EQ4 B1 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B1_GAIN_SHIFT, 24, 0, eq_tlv), From efdef6126655c7269444e9e1c767ed1fe520b9b8 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 23 Jan 2014 11:26:24 +0000 Subject: [PATCH 0196/1167] ASoC: florida: Correct type in EQ coefficient size Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 9fef873b6a3..976fb2840d2 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -271,7 +271,7 @@ ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ4", ARIZONA_EQ4MIX_INPUT_1_SOURCE), -SND_SOC_BYTES("EQ1 Coefficients", ARIZONA_EQ1_3, 18), +SND_SOC_BYTES("EQ1 Coefficients", ARIZONA_EQ1_3, 19), SOC_SINGLE("EQ1 Mode Switch", ARIZONA_EQ1_2, ARIZONA_EQ1_B1_MODE, 1, 0), SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, 24, 0, eq_tlv), @@ -284,7 +284,7 @@ SOC_SINGLE_TLV("EQ1 B4 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ1 B5 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B5_GAIN_SHIFT, 24, 0, eq_tlv), -SND_SOC_BYTES("EQ2 Coefficients", ARIZONA_EQ2_3, 18), +SND_SOC_BYTES("EQ2 Coefficients", ARIZONA_EQ2_3, 19), SOC_SINGLE("EQ2 Mode Switch", ARIZONA_EQ2_2, ARIZONA_EQ2_B1_MODE, 1, 0), SOC_SINGLE_TLV("EQ2 B1 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B1_GAIN_SHIFT, 24, 0, eq_tlv), @@ -297,7 +297,7 @@ SOC_SINGLE_TLV("EQ2 B4 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ2 B5 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B5_GAIN_SHIFT, 24, 0, eq_tlv), -SND_SOC_BYTES("EQ3 Coefficients", ARIZONA_EQ3_3, 18), +SND_SOC_BYTES("EQ3 Coefficients", ARIZONA_EQ3_3, 19), SOC_SINGLE("EQ3 Mode Switch", ARIZONA_EQ3_2, ARIZONA_EQ3_B1_MODE, 1, 0), SOC_SINGLE_TLV("EQ3 B1 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B1_GAIN_SHIFT, 24, 0, eq_tlv), @@ -310,7 +310,7 @@ SOC_SINGLE_TLV("EQ3 B4 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ3 B5 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B5_GAIN_SHIFT, 24, 0, eq_tlv), -SND_SOC_BYTES("EQ4 Coefficients", ARIZONA_EQ4_3, 18), +SND_SOC_BYTES("EQ4 Coefficients", ARIZONA_EQ4_3, 19), SOC_SINGLE("EQ4 Mode Switch", ARIZONA_EQ4_2, ARIZONA_EQ4_B1_MODE, 1, 0), SOC_SINGLE_TLV("EQ4 B1 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B1_GAIN_SHIFT, 24, 0, eq_tlv), From 1f80956652572b64410e43f12a8a05eb2ba366c9 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 24 Jan 2014 10:15:18 +0000 Subject: [PATCH 0197/1167] ASoC: florida: Correct EQ Mode shift Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 976fb2840d2..109d77b4cdc 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -272,7 +272,7 @@ ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ4", ARIZONA_EQ4MIX_INPUT_1_SOURCE), SND_SOC_BYTES("EQ1 Coefficients", ARIZONA_EQ1_3, 19), -SOC_SINGLE("EQ1 Mode Switch", ARIZONA_EQ1_2, ARIZONA_EQ1_B1_MODE, 1, 0), +SOC_SINGLE("EQ1 Mode Switch", ARIZONA_EQ1_2, ARIZONA_EQ1_B1_MODE_SHIFT, 1, 0), SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ1 B2 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B2_GAIN_SHIFT, @@ -285,7 +285,7 @@ SOC_SINGLE_TLV("EQ1 B5 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B5_GAIN_SHIFT, 24, 0, eq_tlv), SND_SOC_BYTES("EQ2 Coefficients", ARIZONA_EQ2_3, 19), -SOC_SINGLE("EQ2 Mode Switch", ARIZONA_EQ2_2, ARIZONA_EQ2_B1_MODE, 1, 0), +SOC_SINGLE("EQ2 Mode Switch", ARIZONA_EQ2_2, ARIZONA_EQ2_B1_MODE_SHIFT, 1, 0), SOC_SINGLE_TLV("EQ2 B1 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ2 B2 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B2_GAIN_SHIFT, @@ -298,7 +298,7 @@ SOC_SINGLE_TLV("EQ2 B5 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B5_GAIN_SHIFT, 24, 0, eq_tlv), SND_SOC_BYTES("EQ3 Coefficients", ARIZONA_EQ3_3, 19), -SOC_SINGLE("EQ3 Mode Switch", ARIZONA_EQ3_2, ARIZONA_EQ3_B1_MODE, 1, 0), +SOC_SINGLE("EQ3 Mode Switch", ARIZONA_EQ3_2, ARIZONA_EQ3_B1_MODE_SHIFT, 1, 0), SOC_SINGLE_TLV("EQ3 B1 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ3 B2 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B2_GAIN_SHIFT, @@ -311,7 +311,7 @@ SOC_SINGLE_TLV("EQ3 B5 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B5_GAIN_SHIFT, 24, 0, eq_tlv), SND_SOC_BYTES("EQ4 Coefficients", ARIZONA_EQ4_3, 19), -SOC_SINGLE("EQ4 Mode Switch", ARIZONA_EQ4_2, ARIZONA_EQ4_B1_MODE, 1, 0), +SOC_SINGLE("EQ4 Mode Switch", ARIZONA_EQ4_2, ARIZONA_EQ4_B1_MODE_SHIFT, 1, 0), SOC_SINGLE_TLV("EQ4 B1 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ4 B2 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B2_GAIN_SHIFT, From f3d521fc48f3c047bb77913dcd4fa95abb8d678a Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 24 Jan 2014 10:16:04 +0000 Subject: [PATCH 0198/1167] ASoC: wm5102: Correct EQ Mode shift Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5102.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index ed7a67eba70..7df3d6d5499 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -698,7 +698,7 @@ ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ4", ARIZONA_EQ4MIX_INPUT_1_SOURCE), SND_SOC_BYTES("EQ1 Coefficients", ARIZONA_EQ1_3, 19), -SOC_SINGLE("EQ1 Mode Switch", ARIZONA_EQ1_2, ARIZONA_EQ1_B1_MODE, 1, 0), +SOC_SINGLE("EQ1 Mode Switch", ARIZONA_EQ1_2, ARIZONA_EQ1_B1_MODE_SHIFT, 1, 0), SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ1 B2 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B2_GAIN_SHIFT, @@ -711,7 +711,7 @@ SOC_SINGLE_TLV("EQ1 B5 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B5_GAIN_SHIFT, 24, 0, eq_tlv), SND_SOC_BYTES("EQ2 Coefficients", ARIZONA_EQ2_3, 19), -SOC_SINGLE("EQ2 Mode Switch", ARIZONA_EQ2_2, ARIZONA_EQ2_B1_MODE, 1, 0), +SOC_SINGLE("EQ2 Mode Switch", ARIZONA_EQ2_2, ARIZONA_EQ2_B1_MODE_SHIFT, 1, 0), SOC_SINGLE_TLV("EQ2 B1 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ2 B2 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B2_GAIN_SHIFT, @@ -724,7 +724,7 @@ SOC_SINGLE_TLV("EQ2 B5 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B5_GAIN_SHIFT, 24, 0, eq_tlv), SND_SOC_BYTES("EQ3 Coefficients", ARIZONA_EQ3_3, 19), -SOC_SINGLE("EQ3 Mode Switch", ARIZONA_EQ3_2, ARIZONA_EQ3_B1_MODE, 1, 0), +SOC_SINGLE("EQ3 Mode Switch", ARIZONA_EQ3_2, ARIZONA_EQ3_B1_MODE_SHIFT, 1, 0), SOC_SINGLE_TLV("EQ3 B1 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ3 B2 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B2_GAIN_SHIFT, @@ -737,7 +737,7 @@ SOC_SINGLE_TLV("EQ3 B5 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B5_GAIN_SHIFT, 24, 0, eq_tlv), SND_SOC_BYTES("EQ4 Coefficients", ARIZONA_EQ4_3, 19), -SOC_SINGLE("EQ4 Mode Switch", ARIZONA_EQ4_2, ARIZONA_EQ4_B1_MODE, 1, 0), +SOC_SINGLE("EQ4 Mode Switch", ARIZONA_EQ4_2, ARIZONA_EQ4_B1_MODE_SHIFT, 1, 0), SOC_SINGLE_TLV("EQ4 B1 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ4 B2 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B2_GAIN_SHIFT, From c31e056d2a39be84c4b12b6f2ede376c5f09b3d5 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 24 Jan 2014 15:04:53 +0000 Subject: [PATCH 0199/1167] ASoC: florida: Check if ez2control running directly We can't check the status of ez2control through the compr_info structure as it won't be configured correctly when ez2control is loaded directly rather than as part of a compressed stream. This patch checks the status of ez2control directly. Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 109d77b4cdc..0edd41588b4 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -1715,7 +1715,8 @@ static irqreturn_t adsp2_irq(int irq, void *data) if (florida->core.arizona->pdata.ez2ctrl_trigger && !florida->compr_info.trig && - florida->compr_info.adsp->fw_id == 0x4000d) { + florida->core.adsp[2].fw_id == 0x4000d && + florida->core.adsp[2].running) { florida->core.arizona->pdata.ez2ctrl_trigger(); florida->compr_info.trig = true; } From a084028fbee127ccffafe4592e9fc7c00ae0680f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 28 Jan 2014 13:18:33 +0000 Subject: [PATCH 0200/1167] ASoC: wm_adsp: Fix uninitialised variable Reported-by: JS Park Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 0a7e85e1214..ca9dcb83d13 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2152,7 +2152,7 @@ static int wm_adsp_of_parse_caps(struct wm_adsp *adsp, struct wm_adsp_fw_defs *fw) { const char *prop = "wlf,compr-caps"; - int ret, i; + int i; int len_prop; u32 of_cap; @@ -2198,7 +2198,7 @@ static int wm_adsp_of_parse_caps(struct wm_adsp *adsp, } fw->caps->desc.num_sample_rates = i - 4; - return ret; + return 0; } static int wm_adsp_of_parse_firmware(struct wm_adsp *adsp, From a750dfb7337e82121fe2b54c45221d7fbff43f19 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 21 Jan 2014 09:53:58 +0000 Subject: [PATCH 0201/1167] ASoC: wm5102: Make sample rates 2 and 3 fully configurable Change-Id: I2b7e343b76ac9840e7a3af835c374329f6fece08 Signed-off-by: Nariman Poushin Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm5102.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 7df3d6d5499..29f491a83af 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -773,6 +773,9 @@ SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode), SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode), SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), +SOC_VALUE_ENUM("Sample Rate 2", arizona_sample_rate[0]), +SOC_VALUE_ENUM("Sample Rate 3", arizona_sample_rate[1]), + SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), @@ -1872,12 +1875,6 @@ static int wm5102_probe(struct platform_device *pdev) ARIZONA_IRQ_FLL2_LOCK, ARIZONA_IRQ_FLL2_CLOCK_OK, &wm5102->fll[1]); - /* SR2 fixed at 8kHz, SR3 fixed at 16kHz */ - regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_2, - ARIZONA_SAMPLE_RATE_2_MASK, 0x11); - regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_3, - ARIZONA_SAMPLE_RATE_3_MASK, 0x12); - for (i = 0; i < ARRAY_SIZE(wm5102_dai); i++) arizona_init_dai(&wm5102->core, i); From 88ee49d3454935a5aefd518d35a181cc6b94c270 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 4 Dec 2013 11:11:26 +0000 Subject: [PATCH 0202/1167] ASoC: arizona: Add support for 768kHz DMIC operation The new IPs supports a new lower frequency 768kHz DMIC operation add support for this into the OSR control. Change-Id: I355a9a65744da867d0833059586d60f568f2f8b4 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 303839b5ae3..a9e2857ee4f 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -631,7 +631,7 @@ const struct soc_enum arizona_in_hpf_cut_enum = EXPORT_SYMBOL_GPL(arizona_in_hpf_cut_enum); static const char * const arizona_in_dmic_osr_text[] = { - "1.536MHz", "3.072MHz", "6.144MHz", + "1.536MHz", "3.072MHz", "6.144MHz", "768kHz", }; const struct soc_enum arizona_in_dmic_osr[] = { From 840a9de4a44731b35c681b0479088c5f2af5b9d4 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 28 Jan 2014 15:49:21 +0000 Subject: [PATCH 0203/1167] mfd: wm5102: Update register patch Update the register patch based on latest evaluation of the device. Change-Id: I32164966e0fcc26121d24bf85d30999f2b2c67e5 Signed-off-by: Charles Keepax --- drivers/mfd/wm5102-tables.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index 92c8d613ea2..8801f044471 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -73,6 +73,7 @@ static const struct reg_default wm5102_revb_patch[] = { { 0x171, 0x0000 }, { 0x35E, 0x000C }, { 0x2D4, 0x0000 }, + { 0x4DC, 0x0900 }, { 0x80, 0x0000 }, }; From 842eab5b8478c9d7bd2799e251900a5fedcfb411 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 28 Jan 2014 16:09:11 +0000 Subject: [PATCH 0204/1167] ASoC: arizona: Improve ultrasonic frequency response Evaluation of the device has given some settings to improve the ultrasonic frequency response. This patch allows the user the option of applying those. Change-Id: If2cf5812d802670e1abeeedb8d5430e59c94322d Signed-off-by: Charles Keepax --- include/linux/mfd/arizona/pdata.h | 3 +++ sound/soc/codecs/arizona.c | 15 +++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index f1abc4a896d..7aa4c1ea47c 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -186,6 +186,9 @@ struct arizona_pdata { /** Mode for outputs */ bool out_mono[ARIZONA_MAX_OUTPUT]; + /** Provide improved ultrasonic frequency response */ + bool ultrasonic_response; + /** PDM speaker mute setting */ unsigned int spk_mute[ARIZONA_MAX_PDM_SPK]; diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index a9e2857ee4f..2598bd2f49e 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1153,6 +1153,21 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, } sr_val = i; + switch (priv->arizona->type) { + case WM5102: + if (priv->arizona->pdata.ultrasonic_response) { + snd_soc_write(codec, 0x80, 0x3); + if (params_rate(params) >= 176400) + snd_soc_write(codec, 0x4dd, 0x1); + else + snd_soc_write(codec, 0x4dd, 0x0); + snd_soc_write(codec, 0x80, 0x0); + } + break; + default: + break; + } + switch (dai_priv->clk) { case ARIZONA_CLK_SYSCLK: snd_soc_update_bits(codec, ARIZONA_SAMPLE_RATE_1, From d0c6dceae327f5ac84db5ee9800fdd112b1e002b Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 31 Jan 2014 17:03:55 +0000 Subject: [PATCH 0205/1167] extcon: arizona: Update manual headphone detection calculation The higher levels of impedance have a higher minimum value than the first level. As the same value was used for all levels higher impedances were reported with a very low level of accuracy. This patch applies the approriate lower threshold for each level. Change-Id: I70bb8cd2772e9ff80d949f1a494a79ba06b1966a Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 5ff28f3db55..025ce2780af 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -377,12 +377,13 @@ static void arizona_stop_mic(struct arizona_extcon_info *info) } static struct { + unsigned int threshold; unsigned int factor_a; unsigned int factor_b; } arizona_hpdet_b_ranges[] = { - { 5528, 362464 }, - { 11084, 6186851 }, - { 11065, 65460395 }, + { 100, 5528, 362464 }, + { 169, 11084, 6186851 }, + { 169, 11065, 65460395 }, }; static struct { @@ -439,7 +440,8 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) >> ARIZONA_HP_IMPEDANCE_RANGE_SHIFT; if (range < ARRAY_SIZE(arizona_hpdet_b_ranges) - 1 && - (val < 100 || val >= 0x3fb)) { + (val < arizona_hpdet_b_ranges[range].threshold || + val >= 0x3fb)) { range++; dev_dbg(arizona->dev, "Moving to HPDET range %d\n", range); @@ -452,7 +454,8 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) } /* If we go out of range report top of range */ - if (val < 100 || val >= 0x3fb) { + if (val < arizona_hpdet_b_ranges[range].threshold || + val >= 0x3fb) { dev_dbg(arizona->dev, "Measurement out of range\n"); return ARIZONA_HPDET_MAX; } From 94a87ec2254a0a542685f69274ce05be14df178b Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 31 Jan 2014 17:25:09 +0000 Subject: [PATCH 0206/1167] switch: arizona: Update manual headphone detection calculation The higher levels of impedance have a higher minimum value than the first level. As the same value was used for all levels higher impedances were reported with a very low level of accuracy. This patch applies the approriate lower threshold for each level. Change-Id: I806729021dda3565634a8ffad34512757a9cb0ef Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 8f0f6a1db28..673a2730d5b 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -372,12 +372,13 @@ static void arizona_stop_mic(struct arizona_extcon_info *info) } static struct { + unsigned int threshold; unsigned int factor_a; unsigned int factor_b; } arizona_hpdet_b_ranges[] = { - { 5528, 362464 }, - { 11084, 6186851 }, - { 11065, 65460395 }, + { 100, 5528, 362464 }, + { 169, 11084, 6186851 }, + { 169, 11065, 65460395 }, }; static struct { @@ -434,7 +435,8 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) >> ARIZONA_HP_IMPEDANCE_RANGE_SHIFT; if (range < ARRAY_SIZE(arizona_hpdet_b_ranges) - 1 && - (val < 100 || val >= 0x3fb)) { + (val < arizona_hpdet_b_ranges[range].threshold || + val >= 0x3fb)) { range++; dev_dbg(arizona->dev, "Moving to HPDET range %d\n", range); @@ -447,7 +449,8 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) } /* If we go out of range report top of range */ - if (val < 100 || val >= 0x3fb) { + if (val < arizona_hpdet_b_ranges[range].threshold || + val >= 0x3fb) { dev_dbg(arizona->dev, "Measurement out of range\n"); return ARIZONA_HPDET_MAX; } From d535d8eb594e492d87db3c9b8ed8901a62b334e9 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Fri, 25 Jan 2013 19:19:30 +0800 Subject: [PATCH 0207/1167] ASoC: arizona: Always keep SYSCLK link for DAIs Don't disconnect SYSCLK when a DAI moves to the ASYNCCLK domain, we always need SYSCLK for operation even if it's not the reference clock for the domain. Change-Id: Ifa32d06494edfe13a07817f1ddc208651fad34bc Signed-off-by: Mark Brown Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 26 ++++++++++++++++++++------ 1 file changed, 20 insertions(+), 6 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 2598bd2f49e..fdf203c4f89 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1309,13 +1309,27 @@ static int arizona_dai_set_sysclk(struct snd_soc_dai *dai, routes[0].sink = dai->driver->capture.stream_name; routes[1].sink = dai->driver->playback.stream_name; - routes[0].source = arizona_dai_clk_str(dai_priv->clk); - routes[1].source = arizona_dai_clk_str(dai_priv->clk); - snd_soc_dapm_del_routes(&codec->dapm, routes, ARRAY_SIZE(routes)); + switch (clk_id) { + case ARIZONA_CLK_SYSCLK: + routes[0].source = arizona_dai_clk_str(dai_priv->clk); + routes[1].source = arizona_dai_clk_str(dai_priv->clk); + snd_soc_dapm_del_routes(&codec->dapm, routes, + ARRAY_SIZE(routes)); + break; + default: + break; + } - routes[0].source = arizona_dai_clk_str(clk_id); - routes[1].source = arizona_dai_clk_str(clk_id); - snd_soc_dapm_add_routes(&codec->dapm, routes, ARRAY_SIZE(routes)); + switch (clk_id) { + case ARIZONA_CLK_ASYNCCLK: + routes[0].source = arizona_dai_clk_str(clk_id); + routes[1].source = arizona_dai_clk_str(clk_id); + snd_soc_dapm_add_routes(&codec->dapm, routes, + ARRAY_SIZE(routes)); + break; + default: + break; + } dai_priv->clk = clk_id; From 2134b4b03d59088a5bef233072de1f8cc2e710dd Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 6 Feb 2014 04:41:46 +0000 Subject: [PATCH 0208/1167] extcon: arizona: Declare 3-pole jack if we detect open circuit on mic Change-Id: I7bfec30eddde46617af1f5298d06d47282d0feac Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 025ce2780af..7871a6fe163 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -891,6 +891,9 @@ static void arizona_micd_detect(struct work_struct *work) /* Due to jack detect this should never happen */ if (!(val & ARIZONA_MICD_STS)) { dev_warn(arizona->dev, "Detected open circuit\n"); + info->mic = false; + arizona_stop_mic(info); + arizona_identify_headphone(info); info->detecting = false; goto handled; } From 3ab3c7769776f9693041bad1095bd75ca8403133 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 14 Feb 2013 15:28:59 +0000 Subject: [PATCH 0209/1167] switch: arizona: Declare 3-pole jack if we detect open circuit on mic Change-Id: I507417164a89649d05a3526090c1d0374115e7a3 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 673a2730d5b..b9d4726b436 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -867,6 +867,9 @@ static void arizona_micd_detect(struct work_struct *work) /* Due to jack detect this should never happen */ if (!(val & ARIZONA_MICD_STS)) { dev_warn(arizona->dev, "Detected open circuit\n"); + info->mic = false; + arizona_stop_mic(info); + arizona_identify_headphone(info); info->detecting = false; goto handled; } From 9bd1602df645414320f874b8e6e194d586428fc8 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 6 Feb 2014 04:53:53 +0000 Subject: [PATCH 0210/1167] extcon: arizona: Give option to declare an mic open-circuit as a 4-pole Normally the driver will declare headphones for an open-circuit, whilst this is still the most sensible choice. Provide provision to declare open-circuit as a microphone for those that wish. Change-Id: Ic7dca9581cd94fb7204a37aa37f06cd5d4b470fc Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 6 +++++- include/linux/mfd/arizona/pdata.h | 3 +++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 7871a6fe163..1d08cb7564b 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -891,7 +891,7 @@ static void arizona_micd_detect(struct work_struct *work) /* Due to jack detect this should never happen */ if (!(val & ARIZONA_MICD_STS)) { dev_warn(arizona->dev, "Detected open circuit\n"); - info->mic = false; + info->mic = arizona->pdata.micd_open_circuit_declare; arizona_stop_mic(info); arizona_identify_headphone(info); info->detecting = false; @@ -1216,6 +1216,10 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) of_property_read_bool(arizona->dev->of_node, "wlf,micd-software-compare"); + pdata->micd_open_circuit_declare = + of_property_read_bool(arizona->dev->of_node, + "wlf,micd-open-circuit-declare"); + pdata->jd_gpio5 = of_property_read_bool(arizona->dev->of_node, "wlf,use-jd-gpio"); diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 7aa4c1ea47c..c8d03866512 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -163,6 +163,9 @@ struct arizona_pdata { /** Force MICBIAS on for mic detect */ bool micd_force_micbias; + /** Declare an open circuit as a 4 pole jack */ + bool micd_open_circuit_declare; + /** Delay between jack detection and MICBIAS ramp */ int init_mic_delay; From 67bb5f5fc40e39517558af0e61b5397852cb5af3 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 6 Feb 2014 04:57:31 +0000 Subject: [PATCH 0211/1167] switch: arizona: Give option to declare an mic open-circuit as a 4-pole Change-Id: I91d1982825c26ebcdb5491d71070d631fcca35c3 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index b9d4726b436..ad21a45faf1 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -867,7 +867,7 @@ static void arizona_micd_detect(struct work_struct *work) /* Due to jack detect this should never happen */ if (!(val & ARIZONA_MICD_STS)) { dev_warn(arizona->dev, "Detected open circuit\n"); - info->mic = false; + info->mic = arizona->pdata.micd_open_circuit_declare; arizona_stop_mic(info); arizona_identify_headphone(info); info->detecting = false; @@ -1175,6 +1175,10 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) of_property_read_bool(arizona->dev->of_node, "wlf,micd-software-compare"); + pdata->micd_open_circuit_declare = + of_property_read_bool(arizona->dev->of_node, + "wlf,micd-open-circuit-declare"); + pdata->jd_gpio5 = of_property_read_bool(arizona->dev->of_node, "wlf,use-jd-gpio"); From befc58255d36a0e6731582b684558e11313e4d0b Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Sat, 8 Feb 2014 05:09:41 +0000 Subject: [PATCH 0212/1167] extcon: arizona: Only stop mic if we are declaring 3-pole Button detection requires the microphone detection to be running, so make sure we don't disable it if we are going to declare mic. Change-Id: I91f072cd58a33462c89cc817796560040ad11bbd Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 1d08cb7564b..f5bef06e244 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -892,7 +892,8 @@ static void arizona_micd_detect(struct work_struct *work) if (!(val & ARIZONA_MICD_STS)) { dev_warn(arizona->dev, "Detected open circuit\n"); info->mic = arizona->pdata.micd_open_circuit_declare; - arizona_stop_mic(info); + if (!info->mic) + arizona_stop_mic(info); arizona_identify_headphone(info); info->detecting = false; goto handled; From 7a802d705abd1a986ed593052482d18d1291fe92 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Sat, 8 Feb 2014 05:10:40 +0000 Subject: [PATCH 0213/1167] switch: arizona: Only stop mic if we are declaring 3-pole Button detection requires the microphone detection to be running, so make sure we don't disable it if we are going to declare mic. Change-Id: Ia832f9c20dd8046f1b99d2e0c539f6e84b32a4d5 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index ad21a45faf1..0cb4fcfae82 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -868,7 +868,8 @@ static void arizona_micd_detect(struct work_struct *work) if (!(val & ARIZONA_MICD_STS)) { dev_warn(arizona->dev, "Detected open circuit\n"); info->mic = arizona->pdata.micd_open_circuit_declare; - arizona_stop_mic(info); + if (!info->mic) + arizona_stop_mic(info); arizona_identify_headphone(info); info->detecting = false; goto handled; From 04b3cfeb4c95f559a6921d9765372791df30bb06 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 6 Feb 2014 10:00:27 +0000 Subject: [PATCH 0214/1167] switch: arizona: Tune headphone configuration based on impedance Change-Id: I6285e5f751f74c7a668c4a7dc811d01b2cdacb52 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 158 ++++++++++++++++++++++++++++++- include/linux/mfd/arizona/core.h | 1 + sound/soc/codecs/arizona.c | 2 +- 3 files changed, 159 insertions(+), 2 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 0cb4fcfae82..9d3110ab275 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -29,6 +29,7 @@ #include #include #include +#include #include @@ -53,6 +54,9 @@ #define MICROPHONE_MIN_OHM 1257 #define MICROPHONE_MAX_OHM 30000 +#define HP_NORMAL_IMPEDANCE 0 +#define HP_LOW_IMPEDANCE 1 + enum { MICD_LVL_1_TO_7 = ARIZONA_MICD_LVL_1 | ARIZONA_MICD_LVL_2 | ARIZONA_MICD_LVL_3 | ARIZONA_MICD_LVL_4 | @@ -93,6 +97,7 @@ struct arizona_extcon_info { bool hpdet_active; bool hpdet_done; bool hpdet_retried; + int hp_imp_level; int num_hpdet_res; unsigned int hpdet_res[3]; @@ -196,7 +201,7 @@ static void arizona_extcon_do_magic(struct arizona_extcon_info *info, ret); /* Restore the desired state while not doing the magic */ - if (!magic) { + if (!magic && !arizona->hp_short) { ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT1L_ENA | @@ -578,6 +583,148 @@ static int arizona_hpdet_do_id(struct arizona_extcon_info *info, int *reading, return 0; } +static const struct reg_default low_impedance_patch[] = { + { 0x460, 0x0C21 }, + { 0x461, 0xA000 }, + { 0x462, 0x0C41 }, + { 0x463, 0x50E5 }, + { 0x464, 0x0C41 }, + { 0x465, 0x4040 }, + { 0x466, 0x0C41 }, + { 0x467, 0x3940 }, + { 0x468, 0x0C41 }, + { 0x469, 0x2418 }, + { 0x46A, 0x0846 }, + { 0x46B, 0x1990 }, + { 0x46C, 0x08C6 }, + { 0x46D, 0x1450 }, + { 0x46E, 0x04CE }, + { 0x46F, 0x1020 }, + { 0x470, 0x04CE }, + { 0x471, 0x0CD0 }, + { 0x472, 0x04CE }, + { 0x473, 0x0A30 }, + { 0x474, 0x044E }, + { 0x475, 0x0660 }, + { 0x476, 0x044E }, + { 0x477, 0x0510 }, + { 0x478, 0x04CE }, + { 0x479, 0x0400 }, + { 0x47A, 0x04CE }, + { 0x47B, 0x0330 }, + { 0x47C, 0x05DF }, + { 0x47D, 0x0001 }, + { 0x47E, 0x07FF }, + { 0x483, 0x0021 }, +}; + +static const struct reg_default normal_impedance_patch[] = { + { 0x460, 0x0C40 }, + { 0x461, 0xA000 }, + { 0x462, 0x0C42 }, + { 0x463, 0x50E5 }, + { 0x464, 0x0842 }, + { 0x465, 0x4040 }, + { 0x466, 0x0842 }, + { 0x467, 0x3940 }, + { 0x468, 0x0846 }, + { 0x469, 0x2418 }, + { 0x46A, 0x0442 }, + { 0x46B, 0x1990 }, + { 0x46C, 0x04C6 }, + { 0x46D, 0x1450 }, + { 0x46E, 0x04CE }, + { 0x46F, 0x1020 }, + { 0x470, 0x04CE }, + { 0x471, 0x0CD0 }, + { 0x472, 0x04CE }, + { 0x473, 0x0A30 }, + { 0x474, 0x044E }, + { 0x475, 0x0660 }, + { 0x476, 0x044E }, + { 0x477, 0x0510 }, + { 0x478, 0x04CE }, + { 0x479, 0x0400 }, + { 0x47A, 0x04CE }, + { 0x47B, 0x0330 }, + { 0x47C, 0x05DF }, + { 0x47D, 0x0001 }, + { 0x47E, 0x07FF }, + { 0x483, 0x0021 }, +}; + +int arizona_wm5110_tune_headphone(struct arizona_extcon_info *info, + int reading) +{ + struct arizona *arizona = info->arizona; + const struct reg_default *patch; + int i, ret, size; + unsigned int outputs; + + if (reading <= 4) { + /* Headphones are always off here so just mark them */ + arizona->hp_short = true; + dev_warn(arizona->dev, "Possible HP short, disabling\n"); + return 0; + } else if (reading <= 10) { + if (info->hp_imp_level == HP_LOW_IMPEDANCE) + return 0; + + info->hp_imp_level = HP_LOW_IMPEDANCE; + patch = low_impedance_patch; + size = ARRAY_SIZE(low_impedance_patch); + } else { + if (info->hp_imp_level == HP_NORMAL_IMPEDANCE) + return 0; + + info->hp_imp_level = HP_NORMAL_IMPEDANCE; + patch = normal_impedance_patch; + size = ARRAY_SIZE(normal_impedance_patch); + } + + mutex_lock(&arizona->dapm->card->dapm_mutex); + + ret = regmap_read(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, + &outputs); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read output state: %d\n", ret); + goto err; + } + ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT1L_ENA | ARIZONA_OUT1R_ENA | + ARIZONA_OUT2L_ENA | ARIZONA_OUT2R_ENA | + ARIZONA_OUT3L_ENA | ARIZONA_OUT3R_ENA, + 0); + if (ret != 0) { + dev_err(arizona->dev, "Failed to disable outputs: %d\n", ret); + goto err; + } + + for (i = 0; i < size; ++i) { + ret = regmap_write(arizona->regmap, + patch[i].reg, patch[i].def); + if (ret != 0) + dev_warn(arizona->dev, + "Failed to write headphone patch: %x <= %x\n", + patch[i].reg, patch[i].def); + } + + ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT1L_ENA | ARIZONA_OUT1R_ENA | + ARIZONA_OUT2L_ENA | ARIZONA_OUT2R_ENA | + ARIZONA_OUT3L_ENA | ARIZONA_OUT3R_ENA, + outputs); + if (ret != 0) { + dev_err(arizona->dev, "Failed to restore outputs: %d\n", ret); + goto err; + } + +err: + mutex_unlock(&arizona->dapm->card->dapm_mutex); + + return ret; +} + static irqreturn_t arizona_hpdet_irq(int irq, void *data) { struct arizona_extcon_info *info = data; @@ -622,6 +769,14 @@ static irqreturn_t arizona_hpdet_irq(int irq, void *data) goto done; } + switch (arizona->type) { + case WM5110: + arizona_wm5110_tune_headphone(info, reading); + break; + default: + break; + } + if (arizona->pdata.hpdet_cb) arizona->pdata.hpdet_cb(reading); @@ -1091,6 +1246,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) info->hpdet_done = false; info->hpdet_retried = false; info->hp_impedance = 0; + arizona->hp_short = false; for (i = 0; i < info->num_micd_ranges; i++) input_report_key(info->input, diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index ff3f975058d..c217765fd88 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -105,6 +105,7 @@ struct arizona { bool hpdet_magic; unsigned int hp_ena; + unsigned int hp_short; struct mutex clk_lock; int clk32k_ref; diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index fdf203c4f89..4093d09f185 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -758,7 +758,7 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, priv->arizona->hp_ena |= val; /* Force off if HPDET magic is active */ - if (priv->arizona->hpdet_magic) + if (priv->arizona->hpdet_magic || priv->arizona->hp_short) val = 0; snd_soc_update_bits(w->codec, ARIZONA_OUTPUT_ENABLES_1, mask, val); From 213ca661e7ac17db1fbc7d317a6b7358149e491d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 10 Feb 2014 04:34:52 +0000 Subject: [PATCH 0215/1167] regulator: arizona-micsupp: Add mutex lock for enable/disable pin The core does not lock for snd_soc_dapm_enable_pin and the other pin state functions. This patch adds a mutex lock around these calls. Change-Id: Ifbba8492b14be0a0f002b080d8627a4dabbb8cde Signed-off-by: Charles Keepax --- drivers/regulator/arizona-micsupp.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/regulator/arizona-micsupp.c b/drivers/regulator/arizona-micsupp.c index ae1970836ab..dcda95947fb 100644 --- a/drivers/regulator/arizona-micsupp.c +++ b/drivers/regulator/arizona-micsupp.c @@ -159,12 +159,16 @@ static void arizona_micsupp_check_cp(struct work_struct *work) } if (dapm) { + mutex_lock(&dapm->card->dapm_mutex); + if ((reg & (ARIZONA_CPMIC_ENA | ARIZONA_CPMIC_BYPASS)) == ARIZONA_CPMIC_ENA) snd_soc_dapm_force_enable_pin(dapm, "MICSUPP"); else snd_soc_dapm_disable_pin(dapm, "MICSUPP"); + mutex_unlock(&dapm->card->dapm_mutex); + snd_soc_dapm_sync(dapm); } } From 16a304993a797578bf155980b62a1303359a3a35 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 10 Feb 2014 10:04:39 +0000 Subject: [PATCH 0216/1167] ASoC: arizona: Add mutex lock for enable/disable pin The core does not lock for snd_soc_dapm_enable_pin and the other pin state functions. This patch adds a mutex lock around these calls. Change-Id: I3922d8705caedc8605aecc7c0fdd62ecf1e803ee Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 4 ++++ sound/soc/codecs/florida.c | 5 +++++ 2 files changed, 9 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 4093d09f185..1676610548d 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -239,6 +239,8 @@ int arizona_init_gpio(struct snd_soc_codec *codec) struct arizona *arizona = priv->arizona; int i; + mutex_lock(&codec->card->dapm_mutex); + switch (arizona->type) { case WM8280: case WM5110: @@ -265,6 +267,8 @@ int arizona_init_gpio(struct snd_soc_codec *codec) } } + mutex_unlock(&codec->card->dapm_mutex); + return 0; } EXPORT_SYMBOL_GPL(arizona_init_gpio); diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 0edd41588b4..3b26bffade6 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -1944,7 +1944,9 @@ static int florida_codec_probe(struct snd_soc_codec *codec) if (ret != 0) return ret; + mutex_lock(&codec->card->dapm_mutex); snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); + mutex_unlock(&codec->card->dapm_mutex); priv->core.arizona->dapm = &codec->dapm; @@ -1964,7 +1966,10 @@ static int florida_codec_probe(struct snd_soc_codec *codec) return ret; } + mutex_lock(&codec->card->dapm_mutex); snd_soc_dapm_enable_pin(&codec->dapm, "DRC2 Signal Activity"); + mutex_unlock(&codec->card->dapm_mutex); + ret = regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, ARIZONA_IM_DRC2_SIG_DET_EINT2, ARIZONA_IM_DRC2_SIG_DET_EINT2); From d565ecbe1388848f6602211a5c035ce8488c8398 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 12 Feb 2014 11:41:19 +0000 Subject: [PATCH 0217/1167] ASoC: wm_adsp: Add lock for creating controls Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 3 +++ sound/soc/codecs/wm_adsp.h | 1 + 2 files changed, 4 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index ca9dcb83d13..fd383b825e8 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -665,7 +665,9 @@ static int wmfw_add_ctl(struct wm_adsp *adsp, struct wm_coeff_ctl *ctl) ctl->kcontrol = snd_soc_card_get_kcontrol(adsp->card, ctl->name); + mutex_lock(&adsp->ctl_lock); list_add(&ctl->list, &adsp->ctl_list); + mutex_unlock(&adsp->ctl_lock); return 0; err_kcontrol: @@ -2311,6 +2313,7 @@ int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs) INIT_LIST_HEAD(&adsp->alg_regions); INIT_LIST_HEAD(&adsp->ctl_list); INIT_WORK(&adsp->boot_work, wm_adsp2_boot_work); + mutex_init(&adsp->ctl_lock); if (dvfs) { adsp->dvfs = devm_regulator_get(adsp->dev, "DCVDD"); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 96eefbb5800..a05f0995109 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -91,6 +91,7 @@ struct wm_adsp { struct regulator *dvfs; + struct mutex ctl_lock; struct list_head ctl_list; u32 host_buf_ptr; From 26f8592226c91daa2523cfa8417c328e42fbeb05 Mon Sep 17 00:00:00 2001 From: JS Park Date: Wed, 12 Feb 2014 13:29:28 +0000 Subject: [PATCH 0218/1167] ASoC: wm_adsp: Fix memory leak in wm_adsp_setup_algs Signed-off-by: JS Park Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 30 ++++++++++++++++++++---------- 1 file changed, 20 insertions(+), 10 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index fd383b825e8..0d4769678d1 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1461,8 +1461,10 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) } } else { region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; + if (!region) { + ret = -ENOMEM; + goto out; + } region->type = WMFW_ADSP1_DM; region->alg = be32_to_cpu(adsp1_alg[i].alg.id); region->base = be32_to_cpu(adsp1_alg[i].dm); @@ -1479,8 +1481,10 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) } region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; + if (!region) { + ret = -ENOMEM; + goto out; + } region->type = WMFW_ADSP1_ZM; region->alg = be32_to_cpu(adsp1_alg[i].alg.id); region->base = be32_to_cpu(adsp1_alg[i].zm); @@ -1517,8 +1521,10 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) } } else { region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; + if (!region) { + ret = -ENOMEM; + goto out; + } region->type = WMFW_ADSP2_XM; region->alg = be32_to_cpu(adsp2_alg[i].alg.id); region->base = be32_to_cpu(adsp2_alg[i].xm); @@ -1535,8 +1541,10 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) } region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; + if (!region) { + ret = -ENOMEM; + goto out; + } region->type = WMFW_ADSP2_YM; region->alg = be32_to_cpu(adsp2_alg[i].alg.id); region->base = be32_to_cpu(adsp2_alg[i].ym); @@ -1553,8 +1561,10 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) } region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; + if (!region) { + ret = -ENOMEM; + goto out; + } region->type = WMFW_ADSP2_ZM; region->alg = be32_to_cpu(adsp2_alg[i].alg.id); region->base = be32_to_cpu(adsp2_alg[i].zm); From cc586d616360e1ac482ddef65f50905f4fb81868 Mon Sep 17 00:00:00 2001 From: JS Park Date: Wed, 12 Feb 2014 13:38:54 +0000 Subject: [PATCH 0219/1167] ASoC: wm_adsp: Fix memory leak in wm_adsp_load Signed-off-by: JS Park Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 0d4769678d1..dcbe33c328f 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -963,7 +963,8 @@ static int wm_adsp_load(struct wm_adsp *dsp) &buf_list); if (!buf) { adsp_err(dsp, "Out of memory\n"); - return -ENOMEM; + ret = -ENOMEM; + goto out_buf; } ret = regmap_raw_write_async(regmap, reg, buf->buf, @@ -974,7 +975,7 @@ static int wm_adsp_load(struct wm_adsp *dsp) file, regions, le32_to_cpu(region->len), offset, region_name, ret); - goto out_fw; + goto out_buf; } } @@ -985,16 +986,16 @@ static int wm_adsp_load(struct wm_adsp *dsp) ret = regmap_async_complete(regmap); if (ret != 0) { adsp_err(dsp, "Failed to complete async write: %d\n", ret); - goto out_fw; + goto out_buf; } if (pos > firmware->size) adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", file, regions, pos - firmware->size); -out_fw: - regmap_async_complete(regmap); +out_buf: wm_adsp_buf_free(&buf_list); +out_fw: release_firmware(firmware); out: kfree(file); From ef698bf824ad04d2200970238591f4bf292cfe07 Mon Sep 17 00:00:00 2001 From: JS Park Date: Wed, 12 Feb 2014 13:42:35 +0000 Subject: [PATCH 0220/1167] ASoC: wm_adsp: Fix memory leak in wm_adsp_create_control Signed-off-by: JS Park Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index dcbe33c328f..ee688bc2bcb 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1081,6 +1081,7 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, region_name = "ZM"; break; default: + kfree(name); return -EINVAL; } @@ -1092,6 +1093,8 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, if (!strcmp(ctl->name, name)) { if (!ctl->enabled) ctl->enabled = 1; + + kfree(name); return 0; } } From 49f5d1838f1f4d76c9ec072c8d9286e05e4bac65 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 12 Feb 2014 13:58:56 +0000 Subject: [PATCH 0221/1167] ASoC: wm_adsp: Avoid attempt to free buffers that might still be in use We should not free any buffers associated with writing out coefficients to the DSP until all the async writes have completed. This patch updates the out of memory path when allocating a new buffer to include a call to regmap_async_complete. Reported-by: JS Park Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index ee688bc2bcb..3317e1834bd 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1603,7 +1603,8 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) const struct wm_adsp_region *mem; struct wm_adsp_alg_region *alg_region; const char *region_name; - int ret, pos, blocks, type, offset, reg; + int ret = 0; + int err, pos, blocks, type, offset, reg; char *file; struct wm_adsp_buf *buf; int tmp; @@ -1745,7 +1746,7 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) if (!buf) { adsp_err(dsp, "Out of memory\n"); ret = -ENOMEM; - goto out_fw; + goto out_async; } adsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n", @@ -1769,14 +1770,18 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) blocks++; } - ret = regmap_async_complete(regmap); - if (ret != 0) - adsp_err(dsp, "Failed to complete async write: %d\n", ret); - if (pos > firmware->size) adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", file, blocks, pos - firmware->size); +out_async: + err = regmap_async_complete(regmap); + if (err != 0) { + adsp_err(dsp, "Failed to complete async write: %d\n", err); + if (!ret) + ret = err; + } + out_fw: release_firmware(firmware); wm_adsp_buf_free(&buf_list); From 8b931e495df4253f701440e33b2a7ced678699a9 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Wed, 12 Feb 2014 04:47:55 +0000 Subject: [PATCH 0222/1167] ASoC: florida: Add control for Output Rate 1 Change-Id: Ie50ee2969d2d89ee13ff08504ff549ec0e310444 Signed-off-by: Nariman Poushin --- sound/soc/codecs/arizona.c | 9 +++++++++ sound/soc/codecs/arizona.h | 2 ++ sound/soc/codecs/florida.c | 2 ++ 3 files changed, 13 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 1676610548d..55372a0c834 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -522,6 +522,15 @@ const char *arizona_rate_text[ARIZONA_RATE_ENUM_SIZE] = { }; EXPORT_SYMBOL_GPL(arizona_rate_text); +const struct soc_enum arizona_output_rate = + SOC_VALUE_ENUM_SINGLE(ARIZONA_OUTPUT_RATE_1, + ARIZONA_OUT_RATE_SHIFT, + 0x0f, + ARIZONA_OUT_RATE_ENUM_SIZE, + arizona_rate_text, + arizona_sample_rate_val); +EXPORT_SYMBOL_GPL(arizona_output_rate); + const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE] = { 0, 1, 2, 8, }; diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 1a9d00e42fe..0faf67e76f9 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -184,6 +184,7 @@ extern int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS]; #define ARIZONA_RATE_ENUM_SIZE 4 #define ARIZONA_SAMPLE_RATE_ENUM_SIZE 14 +#define ARIZONA_OUT_RATE_ENUM_SIZE 3 extern const char *arizona_rate_text[ARIZONA_RATE_ENUM_SIZE]; extern const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE]; @@ -194,6 +195,7 @@ extern const struct soc_enum arizona_sample_rate[]; extern const struct soc_enum arizona_isrc_fsl[]; extern const struct soc_enum arizona_isrc_fsh[]; extern const struct soc_enum arizona_asrc_rate1; +extern const struct soc_enum arizona_output_rate; extern const struct soc_enum arizona_in_vi_ramp; extern const struct soc_enum arizona_in_vd_ramp; diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 3b26bffade6..2006c780657 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -447,6 +447,8 @@ SOC_SINGLE_TLV("Noise Gate Threshold Volume", ARIZONA_NOISE_GATE_CONTROL, ARIZONA_NGATE_THR_SHIFT, 7, 1, ng_tlv), SOC_ENUM("Noise Gate Hold", arizona_ng_hold), +SOC_VALUE_ENUM("Output Rate 1", arizona_output_rate), + FLORIDA_NG_SRC("HPOUT1L", ARIZONA_NOISE_GATE_SELECT_1L), FLORIDA_NG_SRC("HPOUT1R", ARIZONA_NOISE_GATE_SELECT_1R), FLORIDA_NG_SRC("HPOUT2L", ARIZONA_NOISE_GATE_SELECT_2L), From 3fc50045fafd8881205d5becaf58e8e6992f004d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 13 Feb 2014 09:11:30 +0000 Subject: [PATCH 0223/1167] extcon: arizona: We don't need to regulate for button detection We can use the bypass mode on the MICVDD reg for button detection, as the comment in the code states, however the code was mistakenly disabling bypass. Change-Id: I78921bc9c2be1716d490e2d3f5a5e463459dea39 Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index f5bef06e244..b53dc901de1 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -912,7 +912,7 @@ static void arizona_micd_detect(struct work_struct *work) ret); /* Don't need to regulate for button detection */ - ret = regulator_allow_bypass(info->micvdd, false); + ret = regulator_allow_bypass(info->micvdd, true); if (ret != 0) { dev_err(arizona->dev, "Failed to bypass MICVDD: %d\n", ret); From 0ed74da9d37169c22d0602a0a8972b19c1411ab7 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 13 Feb 2014 09:13:59 +0000 Subject: [PATCH 0224/1167] extcon: arizona: Enable bypass if we declare 4-pole from open circuit Change-Id: Ib453dbb1bfa2ba180b9fc5ebe81a652bd5ec38fb Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index b53dc901de1..db2c131c448 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -892,8 +892,17 @@ static void arizona_micd_detect(struct work_struct *work) if (!(val & ARIZONA_MICD_STS)) { dev_warn(arizona->dev, "Detected open circuit\n"); info->mic = arizona->pdata.micd_open_circuit_declare; - if (!info->mic) + if (!info->mic) { arizona_stop_mic(info); + } else { + /* Don't need to regulate for button detection */ + ret = regulator_allow_bypass(info->micvdd, true); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to bypass MICVDD: %d\n", + ret); + } + } arizona_identify_headphone(info); info->detecting = false; goto handled; From 7b0e0d5409ffe6337d2da61f57688696d5c663d7 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 13 Feb 2014 09:15:25 +0000 Subject: [PATCH 0225/1167] Revert "ASoC: florida: Unhook MICSUPP from SYSCLK" This reverts commit c8cb9781bbbd6f94dfd1d5096ac6c0272396c77b. We do need SYSCLK for MICSUPP as the charge pump will default to bypass mode otherwise. Change-Id: Iefcc750a66533f5c691fa4be73b92d37e14adb72 Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 2006c780657..bc71fee3a25 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -1511,6 +1511,8 @@ static const struct snd_soc_dapm_route florida_dapm_routes[] = { { "SPKDAT2L", NULL, "OUT6L" }, { "SPKDAT2R", NULL, "OUT6R" }, + { "MICSUPP", NULL, "SYSCLK" }, + { "DRC1 Signal Activity", NULL, "DRC1L" }, { "DRC1 Signal Activity", NULL, "DRC1R" }, { "DRC2 Signal Activity", NULL, "DRC2L" }, From 8dc0b059d724b559d4929a3ca6fea8e623d369e0 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 13 Feb 2014 09:56:38 +0000 Subject: [PATCH 0226/1167] switch: arizona: We don't need to regulate for button detection We can use the bypass mode on the MICVDD reg for button detection, as the comment in the code states, however the code was mistakenly disabling bypass. Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 9d3110ab275..a85234a92e8 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1037,7 +1037,7 @@ static void arizona_micd_detect(struct work_struct *work) arizona_identify_headphone(info); /* Don't need to regulate for button detection */ - ret = regulator_allow_bypass(info->micvdd, false); + ret = regulator_allow_bypass(info->micvdd, true); if (ret != 0) { dev_err(arizona->dev, "Failed to bypass MICVDD: %d\n", ret); From 909165968f7a162263dba8df93858da388e0aad6 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 13 Feb 2014 09:58:16 +0000 Subject: [PATCH 0227/1167] switch: arizona: Enable bypass if we declare 4-pole from open circuit Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index a85234a92e8..b34d456bcf2 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1023,8 +1023,17 @@ static void arizona_micd_detect(struct work_struct *work) if (!(val & ARIZONA_MICD_STS)) { dev_warn(arizona->dev, "Detected open circuit\n"); info->mic = arizona->pdata.micd_open_circuit_declare; - if (!info->mic) + if (!info->mic) { arizona_stop_mic(info); + } else { + /* Don't need to regulate for button detection */ + ret = regulator_allow_bypass(info->micvdd, true); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to bypass MICVDD: %d\n", + ret); + } + } arizona_identify_headphone(info); info->detecting = false; goto handled; From b353a1de32ad02dde16a11d955bd53d0bd544f89 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 13 Feb 2014 15:09:02 +0000 Subject: [PATCH 0228/1167] mfd: florida: Fix default for Headphone Detect 1 Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index b16c0f08481..cf5db8a7f09 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -538,7 +538,7 @@ static const struct reg_default florida_reg_default[] = { { 0x00000219, 0x01A6 }, /* R537 - Mic Bias Ctrl 2 */ { 0x0000021A, 0x01A6 }, /* R538 - Mic Bias Ctrl 3 */ { 0x00000293, 0x0000 }, /* R659 - Accessory Detect Mode 1 */ - { 0x0000029B, 0x0020 }, /* R667 - Headphone Detect 1 */ + { 0x0000029B, 0x0028 }, /* R667 - Headphone Detect 1 */ { 0x0000029C, 0x0000 }, /* R668 - Headphone Detect 2 */ { 0x000002A2, 0x0000 }, /* R674 - Micd clamp control */ { 0x000002A3, 0x1102 }, /* R675 - Mic Detect 1 */ From 840f4f2587199100717f6b9a06f326268b677997 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 7 Feb 2014 08:10:38 +0000 Subject: [PATCH 0229/1167] mfd: arizona: Apply additional settings entering sleep mode Recent evaluation of the device has given some additional settings to improve performance. Change-Id: I1bdbb3ab00c9ed67ac85798479f53c6b7204de9d Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 46 +++++++++++++++++++++++++++++++------- 1 file changed, 38 insertions(+), 8 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index c859daf6528..28efb3fb5e9 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -344,17 +344,29 @@ static int arizona_apply_hardware_patch(struct arizona* arizona) return arizona_exec_with_sysclk(arizona, arizona_hardware_patch_wseq); } +static const struct reg_default arizona_sysclk_reg_patch[] = { + { 0x337A, 0xC100 }, + { 0x337B, 0x0041 }, + { 0x3300, 0xa210 }, + { 0x3301, 0x050C }, +}; + static int arizona_sleep_patch(struct arizona* arizona) { - int ret; - - ret = regmap_write(arizona->regmap, 0x337A, 0xC100); - if (ret != 0) - return ret; + int i, ret; - ret = regmap_write(arizona->regmap, 0x337B, 0x0041); - if (ret != 0) - return ret; + for (i = 0; i < ARRAY_SIZE(arizona_sysclk_reg_patch); ++i) { + ret = regmap_write(arizona->regmap, + arizona_sysclk_reg_patch[i].reg, + arizona_sysclk_reg_patch[i].def); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to apply sleep patch: %x <= %x\n", + arizona_sysclk_reg_patch[i].reg, + arizona_sysclk_reg_patch[i].def); + return ret; + } + } return 0; } @@ -503,6 +515,24 @@ static int arizona_runtime_suspend(struct device *dev) } } + switch (arizona->type) { + case WM5110: + case WM8280: + ret = regmap_update_bits(arizona->regmap, + ARIZONA_LDO1_CONTROL_1, + ARIZONA_LDO1_VSEL_MASK, + 0x0b << ARIZONA_LDO1_VSEL_SHIFT); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to prepare for sleep %d\n", + ret); + return ret; + } + break; + default: + break; + } + regcache_cache_only(arizona->regmap, true); regcache_mark_dirty(arizona->regmap); regulator_disable(arizona->dcvdd); From f777e31fc895effc13d3780cf6bd00bd3d1c3353 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 14 Feb 2014 12:50:36 +0000 Subject: [PATCH 0230/1167] switch: arizona: Add option to regulate MICBIAS only during inital detection Change-Id: Ic51fd4283603d3d7d2648e75e77140ebc0e99636 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 6 ++++++ include/linux/mfd/arizona/pdata.h | 3 +++ 2 files changed, 9 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index b34d456bcf2..612be780c59 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -268,6 +268,9 @@ static void arizona_extcon_pulse_micbias(struct arizona_extcon_info *info) snd_soc_dapm_sync(dapm); + if (arizona->pdata.micd_force_micbias_initial && info->detecting) + return; + if (!arizona->pdata.micd_force_micbias) { mutex_lock(&dapm->card->dapm_mutex); @@ -1337,6 +1340,9 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) of_property_read_bool(arizona->dev->of_node, "wlf,micd-force-micbias"); + pdata->micd_force_micbias_initial = + of_property_read_bool(arizona->dev->of_node, + "wlf,micd-force-micbias-initial"); pdata->micd_software_compare = of_property_read_bool(arizona->dev->of_node, "wlf,micd-software-compare"); diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index c8d03866512..f9c61d6158b 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -163,6 +163,9 @@ struct arizona_pdata { /** Force MICBIAS on for mic detect */ bool micd_force_micbias; + /** Force MICBIAS on for initial mic detect only, not button detect */ + bool micd_force_micbias_initial; + /** Declare an open circuit as a 4 pole jack */ bool micd_open_circuit_declare; From 78101771c8d30727efc02db4a7e9a4c380d31775 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Thu, 13 Feb 2014 01:07:30 +0000 Subject: [PATCH 0231/1167] ASoC: arizona: Add missing parameter name for hpdet_callback Change-Id: Ibe16ad1c2f8a4632c11df5023c2c13d85b1d481c Signed-off-by: Nariman Poushin --- sound/soc/codecs/arizona.c | 2 +- sound/soc/codecs/arizona.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 55372a0c834..028b25a6d14 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1851,7 +1851,7 @@ int arizona_set_output_mode(struct snd_soc_codec *codec, int output, bool diff) EXPORT_SYMBOL_GPL(arizona_set_output_mode); int arizona_set_hpdet_cb(struct snd_soc_codec *codec, - void (*hpdet_cb)(unsigned int)) + void (*hpdet_cb)(unsigned int measurement)) { struct arizona *arizona = dev_get_drvdata(codec->dev->parent); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 0faf67e76f9..089c6cf8f06 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -263,7 +263,7 @@ int arizona_set_output_mode(struct snd_soc_codec *codec, int output, bool diff); extern int arizona_set_hpdet_cb(struct snd_soc_codec *codec, - void (*hpdet_cb)(unsigned int)); + void (*hpdet_cb)(unsigned int measurement)); extern int arizona_set_ez2ctrl_cb(struct snd_soc_codec *codec, void (*ez2ctrl_trigger)(void)); From 11f5f7fee891037cec5b64167028617510115ff4 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Thu, 13 Feb 2014 01:56:53 +0000 Subject: [PATCH 0232/1167] switch: arizona: Move the hpdet_cb invocations to be more robust Move the invocation of the callback as close to the impedance measurement / jack removal as possible to make sure we don't miss any events. Change-Id: If003ef3417a0b6c8c6e76d501a46a68a19609395 Signed-off-by: Nariman Poushin --- drivers/switch/switch-arizona.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 612be780c59..229438646b8 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -512,6 +512,10 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) } info->hp_impedance = val; + + if (arizona->pdata.hpdet_cb) + arizona->pdata.hpdet_cb(info->hp_impedance); + dev_dbg(arizona->dev, "HP impedance %d ohms\n", val); return val; } @@ -780,9 +784,6 @@ static irqreturn_t arizona_hpdet_irq(int irq, void *data) break; } - if (arizona->pdata.hpdet_cb) - arizona->pdata.hpdet_cb(reading); - if (mic || info->mic) switch_set_state(&info->edev, BIT_HEADSET); else From 727996fc04aefdfc59e2a2c42aeb9b6bf1e3c087 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Thu, 13 Feb 2014 02:09:31 +0000 Subject: [PATCH 0233/1167] switch: arizona: Use high z for hpdet_cb to notify no headset Use out of spec impedance to report open circuit on the headphone to the hpdet_cb. Change-Id: I3b12f53e6ff56a1b86921bb15a32fd1c0b4724b0 Signed-off-by: Nariman Poushin --- drivers/switch/switch-arizona.c | 5 +++++ include/linux/mfd/arizona/pdata.h | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 229438646b8..2a6e6426730 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1272,6 +1272,11 @@ static irqreturn_t arizona_jackdet(int irq, void *data) ARIZONA_JACK_DETECT_DEBOUNCE, ARIZONA_MICD_CLAMP_DB | ARIZONA_JD1_DB, ARIZONA_MICD_CLAMP_DB | ARIZONA_JD1_DB); + + /* Use a sufficiently large number to indicate open circuit */ + if (arizona->pdata.hpdet_cb) { + arizona->pdata.hpdet_cb(ARIZONA_HP_Z_OPEN); + } } if (arizona->pdata.micd_timeout) diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index f9c61d6158b..8ac525f9939 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -8,6 +8,8 @@ * published by the Free Software Foundation. */ +#include + #ifndef _ARIZONA_PDATA_H #define _ARIZONA_PDATA_H @@ -71,6 +73,9 @@ #define ARIZONA_MAX_PDM_SPK 2 +/* Treat INT_MAX impedance as open circuit */ +#define ARIZONA_HP_Z_OPEN INT_MAX + struct regulator_init_data; struct arizona_micbias { From f6f2586721662920eda880a21688c8b910f33c21 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Fri, 14 Feb 2014 05:01:15 +0000 Subject: [PATCH 0234/1167] mfd: arizona: Move measured hp_impedance to arizona Make the measured hp_impedance available to the whole arizona codec. Change-Id: I87e563d99709330aa7d4a0b341afd234ad7613b9 Signed-off-by: Nariman Poushin --- drivers/switch/switch-arizona.c | 9 ++++----- include/linux/mfd/arizona/core.h | 2 ++ 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 2a6e6426730..966e7fba52a 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -76,7 +76,6 @@ struct arizona_extcon_info { struct input_dev *input; u16 last_jackdet; - u32 hp_impedance; int micd_mode; const struct arizona_micd_config *micd_modes; @@ -511,10 +510,10 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) } } - info->hp_impedance = val; + arizona->hp_impedance = val; if (arizona->pdata.hpdet_cb) - arizona->pdata.hpdet_cb(info->hp_impedance); + arizona->pdata.hpdet_cb(arizona->hp_impedance); dev_dbg(arizona->dev, "HP impedance %d ohms\n", val); return val; @@ -1258,7 +1257,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) info->mic = false; info->hpdet_done = false; info->hpdet_retried = false; - info->hp_impedance = 0; + arizona->hp_impedance = 0; arizona->hp_short = false; for (i = 0; i < info->num_micd_ranges; i++) @@ -1378,7 +1377,7 @@ static ssize_t arizona_extcon_show(struct device *dev, struct platform_device *pdev = to_platform_device(dev); struct arizona_extcon_info *info = platform_get_drvdata(pdev); - return scnprintf(buf, PAGE_SIZE, "%d\n", info->hp_impedance); + return scnprintf(buf, PAGE_SIZE, "%d\n", info->arizona->hp_impedance); } static int arizona_extcon_probe(struct platform_device *pdev) diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index c217765fd88..e264e6d4f71 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -107,6 +107,8 @@ struct arizona { unsigned int hp_ena; unsigned int hp_short; + unsigned int hp_impedance; + struct mutex clk_lock; int clk32k_ref; From c5a9e53561ce5d9005263758e9c0997cd1911dc2 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 13 Feb 2014 15:36:49 +0000 Subject: [PATCH 0235/1167] switch: arizona: Don't need to disable CP to update The MICVDD charge pump can have its settings updated whilst still running. Change-Id: I2e202192d7a0e1ce74bffc45df05e78b9d546061 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 34 +-------------------------------- 1 file changed, 1 insertion(+), 33 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 966e7fba52a..76fcb7df552 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -665,7 +665,6 @@ int arizona_wm5110_tune_headphone(struct arizona_extcon_info *info, struct arizona *arizona = info->arizona; const struct reg_default *patch; int i, ret, size; - unsigned int outputs; if (reading <= 4) { /* Headphones are always off here so just mark them */ @@ -688,24 +687,6 @@ int arizona_wm5110_tune_headphone(struct arizona_extcon_info *info, size = ARRAY_SIZE(normal_impedance_patch); } - mutex_lock(&arizona->dapm->card->dapm_mutex); - - ret = regmap_read(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, - &outputs); - if (ret != 0) { - dev_err(arizona->dev, "Failed to read output state: %d\n", ret); - goto err; - } - ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, - ARIZONA_OUT1L_ENA | ARIZONA_OUT1R_ENA | - ARIZONA_OUT2L_ENA | ARIZONA_OUT2R_ENA | - ARIZONA_OUT3L_ENA | ARIZONA_OUT3R_ENA, - 0); - if (ret != 0) { - dev_err(arizona->dev, "Failed to disable outputs: %d\n", ret); - goto err; - } - for (i = 0; i < size; ++i) { ret = regmap_write(arizona->regmap, patch[i].reg, patch[i].def); @@ -715,20 +696,7 @@ int arizona_wm5110_tune_headphone(struct arizona_extcon_info *info, patch[i].reg, patch[i].def); } - ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, - ARIZONA_OUT1L_ENA | ARIZONA_OUT1R_ENA | - ARIZONA_OUT2L_ENA | ARIZONA_OUT2R_ENA | - ARIZONA_OUT3L_ENA | ARIZONA_OUT3R_ENA, - outputs); - if (ret != 0) { - dev_err(arizona->dev, "Failed to restore outputs: %d\n", ret); - goto err; - } - -err: - mutex_unlock(&arizona->dapm->card->dapm_mutex); - - return ret; + return 0; } static irqreturn_t arizona_hpdet_irq(int irq, void *data) From be8a46d0994024eb477658994b04cab3011a326f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 13 Feb 2014 16:05:20 +0000 Subject: [PATCH 0236/1167] mfd: florida: Add defaults for the charge pump settings Ensure these are synchronised, if we have updated then due to the headphone detection. Change-Id: I9cb6dc7afd0b9a45f517ec78b447ea4d9bcc262c Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index cf5db8a7f09..b7c4ffe41fe 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -633,8 +633,40 @@ static const struct reg_default florida_reg_default[] = { { 0x00000440, 0x8FFF }, /* R1088 - DRE Enable */ { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */ { 0x00000458, 0x0000 }, /* R1112 - Noise Gate Control */ + { 0x00000460, 0x0C40 }, + { 0x00000461, 0x8000 }, + { 0x00000462, 0x0C41 }, + { 0x00000463, 0x4820 }, + { 0x00000464, 0x0C41 }, + { 0x00000465, 0x4040 }, + { 0x00000466, 0x0C41 }, + { 0x00000467, 0x3940 }, + { 0x00000468, 0x0C42 }, + { 0x00000469, 0x2030 }, + { 0x0000046A, 0x0842 }, + { 0x0000046B, 0x1990 }, + { 0x0000046C, 0x08C2 }, + { 0x0000046D, 0x1450 }, + { 0x0000046E, 0x08C6 }, + { 0x0000046F, 0x1020 }, + { 0x00000470, 0x08C6 }, + { 0x00000471, 0x0CD0 }, + { 0x00000472, 0x08C6 }, + { 0x00000473, 0x0A30 }, + { 0x00000474, 0x0442 }, + { 0x00000475, 0x0660 }, + { 0x00000476, 0x0446 }, + { 0x00000477, 0x0510 }, + { 0x00000478, 0x04C6 }, + { 0x00000479, 0x0400 }, + { 0x0000047A, 0x04CE }, + { 0x0000047B, 0x0330 }, + { 0x0000047C, 0x05DF }, + { 0x0000047D, 0x0001 }, + { 0x0000047E, 0x07FF }, { 0x00000480, 0x0040 }, /* R1152 - Class W ANC Threshold 1 */ { 0x00000481, 0x0040 }, /* R1153 - Class W ANC Threshold 2 */ + { 0x00000483, 0x0826 }, { 0x00000490, 0x0069 }, /* R1168 - PDM SPK1 CTRL 1 */ { 0x00000491, 0x0000 }, /* R1169 - PDM SPK1 CTRL 2 */ { 0x00000492, 0x0069 }, /* R1170 - PDM SPK2 CTRL 1 */ From 0c060ce245010b9a9ab0e089d2fb32fa658e575c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 14 Feb 2014 13:58:33 +0000 Subject: [PATCH 0237/1167] switch: arizona: Update headphone tuning to use arizona->hp_impedance Change-Id: I6844b3e8c862ee4e523f3be1d61586772f29ac39 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 10 ++++------ include/linux/mfd/arizona/core.h | 2 +- sound/soc/codecs/arizona.c | 3 ++- 3 files changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 76fcb7df552..5ed1cd90344 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -200,7 +200,7 @@ static void arizona_extcon_do_magic(struct arizona_extcon_info *info, ret); /* Restore the desired state while not doing the magic */ - if (!magic && !arizona->hp_short) { + if (!magic && arizona->hp_impedance > ARIZONA_HP_SHORT_IMPEDANCE) { ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT1L_ENA | @@ -666,12 +666,11 @@ int arizona_wm5110_tune_headphone(struct arizona_extcon_info *info, const struct reg_default *patch; int i, ret, size; - if (reading <= 4) { + if (reading <= ARIZONA_HP_SHORT_IMPEDANCE) { /* Headphones are always off here so just mark them */ - arizona->hp_short = true; dev_warn(arizona->dev, "Possible HP short, disabling\n"); return 0; - } else if (reading <= 10) { + } else if (reading <= 13) { if (info->hp_imp_level == HP_LOW_IMPEDANCE) return 0; @@ -745,7 +744,7 @@ static irqreturn_t arizona_hpdet_irq(int irq, void *data) switch (arizona->type) { case WM5110: - arizona_wm5110_tune_headphone(info, reading); + arizona_wm5110_tune_headphone(info, arizona->hp_impedance); break; default: break; @@ -1226,7 +1225,6 @@ static irqreturn_t arizona_jackdet(int irq, void *data) info->hpdet_done = false; info->hpdet_retried = false; arizona->hp_impedance = 0; - arizona->hp_short = false; for (i = 0; i < info->num_micd_ranges; i++) input_report_key(info->input, diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index e264e6d4f71..49ce4302eee 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -81,6 +81,7 @@ enum arizona_type { #define ARIZONA_NUM_IRQ 52 +#define ARIZONA_HP_SHORT_IMPEDANCE 4 struct snd_soc_dapm_context; struct arizona { @@ -105,7 +106,6 @@ struct arizona { bool hpdet_magic; unsigned int hp_ena; - unsigned int hp_short; unsigned int hp_impedance; diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 028b25a6d14..2e57fa98ed3 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -771,7 +771,8 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, priv->arizona->hp_ena |= val; /* Force off if HPDET magic is active */ - if (priv->arizona->hpdet_magic || priv->arizona->hp_short) + if (priv->arizona->hpdet_magic || + priv->arizona->hp_impedance <= ARIZONA_HP_SHORT_IMPEDANCE) val = 0; snd_soc_update_bits(w->codec, ARIZONA_OUTPUT_ENABLES_1, mask, val); From a1614709d9cabc45db9d867f167490c7ee930ad7 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 14 Feb 2014 14:03:23 +0000 Subject: [PATCH 0238/1167] switch: arizona: Restore normal charge pump tuning on jack disconnect Change-Id: I3ce2729028fb035fb83315acc463a957fa690000 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 5ed1cd90344..c2c81af7d53 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1238,6 +1238,14 @@ static irqreturn_t arizona_jackdet(int irq, void *data) ARIZONA_MICD_CLAMP_DB | ARIZONA_JD1_DB, ARIZONA_MICD_CLAMP_DB | ARIZONA_JD1_DB); + switch (arizona->type) { + case WM5110: + arizona_wm5110_tune_headphone(info, ARIZONA_HP_Z_OPEN); + break; + default: + break; + } + /* Use a sufficiently large number to indicate open circuit */ if (arizona->pdata.hpdet_cb) { arizona->pdata.hpdet_cb(ARIZONA_HP_Z_OPEN); From 628e83953f1c2290e1ee38e06b64ff4d6aa88a60 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 14 Feb 2014 15:13:06 +0000 Subject: [PATCH 0239/1167] switch: arizona: Disable short circuit protect for low impedance HP Change-Id: I1c7c01ef1bbb7e2404aa2b7a70ead3d400531b04 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index c2c81af7d53..1c049cd70e8 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -675,6 +675,11 @@ int arizona_wm5110_tune_headphone(struct arizona_extcon_info *info, return 0; info->hp_imp_level = HP_LOW_IMPEDANCE; + + regmap_update_bits(arizona->regmap, + ARIZONA_HP1_SHORT_CIRCUIT_CTRL, + ARIZONA_HP1_SC_ENA_MASK, 0); + patch = low_impedance_patch; size = ARRAY_SIZE(low_impedance_patch); } else { @@ -682,6 +687,12 @@ int arizona_wm5110_tune_headphone(struct arizona_extcon_info *info, return 0; info->hp_imp_level = HP_NORMAL_IMPEDANCE; + + regmap_update_bits(arizona->regmap, + ARIZONA_HP1_SHORT_CIRCUIT_CTRL, + ARIZONA_HP1_SC_ENA_MASK, + ARIZONA_HP1_SC_ENA_MASK); + patch = normal_impedance_patch; size = ARRAY_SIZE(normal_impedance_patch); } From 3dc74c9d3054358dfdc3dbf21335de5d8f74a80c Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Mon, 17 Feb 2014 12:24:52 +0000 Subject: [PATCH 0240/1167] mfd: arizona: Only re-enable the irq in resume if it was disabled Protect against failed suspension by making sure we only enable the irq if we have disabled it. Change-Id: If4e738bb83ff56f860c8718174624bea2198c0fb Signed-off-by: Nariman Poushin --- drivers/mfd/arizona-core.c | 7 ++++++- include/linux/mfd/arizona/core.h | 1 + 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 28efb3fb5e9..43422678889 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -549,6 +549,8 @@ static int arizona_resume_noirq(struct device *dev) dev_dbg(arizona->dev, "Early resume, disabling IRQ\n"); disable_irq(arizona->irq); + arizona->irq_sem = 1; + return 0; } @@ -557,7 +559,10 @@ static int arizona_resume(struct device *dev) struct arizona *arizona = dev_get_drvdata(dev); dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n"); - enable_irq(arizona->irq); + if (arizona->irq_sem) { + enable_irq(arizona->irq); + arizona->irq_sem = 0; + } return 0; } diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 49ce4302eee..de5bb1b2257 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -99,6 +99,7 @@ struct arizona { unsigned int external_dcvdd:1; + unsigned int irq_sem; int irq; struct irq_domain *virq; struct regmap_irq_chip_data *aod_irq_chip; From fbbd1609b70e1a55a398a0a313ff41d7cab1d100 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 25 Feb 2014 14:21:30 +0000 Subject: [PATCH 0241/1167] switch: arizona: Allow headphone detection to be skipped Add a pdata/DT option to allow headphone detection to be skipped entirely. Change-Id: I0db05f532f5023fef1c80c79fa08a598814924b7 Signed-off-by: Charles Keepax --- .../devicetree/bindings/mfd/arizona.txt | 4 ++++ drivers/switch/switch-arizona.c | 24 ++++++++++++++++--- include/linux/mfd/arizona/pdata.h | 3 +++ 3 files changed, 28 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 8a25210b39f..fd0c45e58e2 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -109,6 +109,9 @@ Optional properties: wlf,wm5102t-output-pwr : Output power setting (WM5102T only) + - wlf,fixed-hpdet-imp : Do not perform any headphone detection, just use + the fixed value specified here as the headphone impedance. + Example: codec: wm5102@1a { @@ -139,6 +142,7 @@ codec: wm5102@1a { 0x1 1 0 0x0 2 1 >; + wlf,fixed-hpdet-imp = <8>; wlf,micbias2 = <2600 0 1 1 0>; wlf,init-mic-delay = <10>; diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 1c049cd70e8..ab5a2d648ea 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -808,6 +808,21 @@ static void arizona_identify_headphone(struct arizona_extcon_info *info) if (info->hpdet_done) return; + if (info->arizona->pdata.fixed_hpdet_imp) { + int imp = info->arizona->pdata.fixed_hpdet_imp; + + switch (arizona->type) { + case WM5110: + arizona_wm5110_tune_headphone(info, imp); + info->arizona->hp_impedance = imp; + break; + default: + break; + } + + goto out; + } + dev_dbg(arizona->dev, "Starting HPDET\n"); /* Make sure we keep the device enabled during the measurement */ @@ -826,7 +841,7 @@ static void arizona_identify_headphone(struct arizona_extcon_info *info) ARIZONA_ACCDET_MODE_HPL); if (ret != 0) { dev_err(arizona->dev, "Failed to set HPDETL mode: %d\n", ret); - goto err; + goto out; } ret = regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, @@ -834,12 +849,12 @@ static void arizona_identify_headphone(struct arizona_extcon_info *info) if (ret != 0) { dev_err(arizona->dev, "Can't start HPDETL measurement: %d\n", ret); - goto err; + goto out; } return; -err: +out: regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, ARIZONA_ACCDET_MODE_MASK, ARIZONA_ACCDET_MODE_MIC); @@ -1352,6 +1367,9 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,init-mic-delay", false, &pdata->init_mic_delay); + arizona_of_read_u32(arizona, "wlf,fixed-hpdet-imp", false, + &pdata->fixed_hpdet_imp); + return 0; } diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 8ac525f9939..ba174aaf885 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -132,6 +132,9 @@ struct arizona_pdata { /** Internal pull on GPIO5 is disabled when used for jack detection */ bool jd_gpio5_nopull; + /** If non-zero don't run headphone detection, report this value */ + int fixed_hpdet_imp; + /** Use the headphone detect circuit to identify the accessory */ bool hpdet_acc_id; From d31834d5643b3fd913de5a8ae1ef40e5213f414d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 26 Feb 2014 10:27:08 +0000 Subject: [PATCH 0242/1167] switch: arizona: Clear detecting before we begin headphone detection The detecting flag refers to the mic detection phase and as such should be cleared before we begin the headphone detection phase. Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index ab5a2d648ea..aa989937371 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1030,15 +1030,15 @@ static void arizona_micd_detect(struct work_struct *work) ret); } } - arizona_identify_headphone(info); info->detecting = false; + arizona_identify_headphone(info); goto handled; } /* If we got a high impedence we should have a headset, report it. */ if (info->detecting && (val & ARIZONA_MICD_LVL_8)) { info->mic = true; - + info->detecting = false; arizona_identify_headphone(info); /* Don't need to regulate for button detection */ @@ -1048,7 +1048,6 @@ static void arizona_micd_detect(struct work_struct *work) ret); } - info->detecting = false; goto handled; } @@ -1061,10 +1060,11 @@ static void arizona_micd_detect(struct work_struct *work) if (info->detecting && (val & MICD_LVL_1_TO_7)) { if (info->jack_flips >= info->micd_num_modes * 10) { dev_dbg(arizona->dev, "Detected HP/line\n"); - arizona_identify_headphone(info); info->detecting = false; + arizona_identify_headphone(info); + arizona_stop_mic(info); } else { info->micd_mode++; From 66f2c3f4ffe3617b6898d156d0c7f3ba1a918420 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 28 Feb 2014 10:41:37 +0000 Subject: [PATCH 0243/1167] ASoC: arizona: Force DAC positive when enabling analogue input Change-Id: Ib00f748495b9c425ca38b3f834a08b1c4d87a9a4 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 52 +++++++++++++++++++++++++++++++++++--- 1 file changed, 49 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 2e57fa98ed3..6b84a3a19a0 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -680,26 +680,72 @@ static void arizona_in_set_vu(struct snd_soc_codec *codec, int ena) ARIZONA_IN_VU, val); } +static int arizona_update_input(struct arizona* arizona, bool enable) +{ + unsigned int val; + + switch (arizona->type) { + case WM5110: + break; + default: + return 0; + } + + if (enable) { + regmap_write(arizona->regmap, 0x80, 0x3); + regmap_write(arizona->regmap, 0x3A5, 0x3); + regmap_write(arizona->regmap, 0x3A6, 0x5555); + regmap_write(arizona->regmap, 0x80, 0x0); + } else { + regmap_write(arizona->regmap, 0x80, 0x3); + + regmap_read(arizona->regmap, 0x3A5, &val); + if (val) { + msleep(10); + regmap_write(arizona->regmap, 0x3A5, 0x0); + regmap_write(arizona->regmap, 0x3A6, 0x0); + msleep(5); + } + + regmap_write(arizona->regmap, 0x80, 0x0); + } + + return 0; +} + int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); + unsigned int ctrl; unsigned int reg; - if (w->shift % 2) + if (w->shift % 2) { reg = ARIZONA_ADC_DIGITAL_VOLUME_1L + ((w->shift / 2) * 8); - else + ctrl = reg - 1; + } else { reg = ARIZONA_ADC_DIGITAL_VOLUME_1R + ((w->shift / 2) * 8); + ctrl = reg - 4; + } switch (event) { case SND_SOC_DAPM_PRE_PMU: priv->in_pending++; + + /* Check for analogue input */ + if ((snd_soc_read(w->codec, ctrl) & 0x0400) == 0) + arizona_update_input(priv->arizona, true); + break; case SND_SOC_DAPM_POST_PMU: + priv->in_pending--; + + if (priv->in_pending == 0) + arizona_update_input(priv->arizona, false); + snd_soc_update_bits(w->codec, reg, ARIZONA_IN1L_MUTE, 0); /* If this is the last input pending then allow VU */ - priv->in_pending--; if (priv->in_pending == 0) { msleep(1); arizona_in_set_vu(w->codec, 1); From 5978b8015022841e458aeff6279d5ea567eab8f9 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 3 Mar 2014 09:26:21 +0000 Subject: [PATCH 0244/1167] mfd: florida: Mark DSP clocking registers as volatile The DSPs will often control there own clock speeds whilst running as such we should mark the registers controlling this as volatile. Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index b7c4ffe41fe..9195e512243 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -2697,6 +2697,7 @@ static bool florida_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_DSP1_SCRATCH_1: case ARIZONA_DSP1_SCRATCH_2: case ARIZONA_DSP1_SCRATCH_3: + case ARIZONA_DSP1_CLOCKING_1: case ARIZONA_DSP2_STATUS_1: case ARIZONA_DSP2_STATUS_2: case ARIZONA_DSP2_STATUS_3: @@ -2725,6 +2726,7 @@ static bool florida_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_DSP2_SCRATCH_1: case ARIZONA_DSP2_SCRATCH_2: case ARIZONA_DSP2_SCRATCH_3: + case ARIZONA_DSP2_CLOCKING_1: case ARIZONA_DSP3_STATUS_1: case ARIZONA_DSP3_STATUS_2: case ARIZONA_DSP3_STATUS_3: @@ -2753,6 +2755,7 @@ static bool florida_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_DSP3_SCRATCH_1: case ARIZONA_DSP3_SCRATCH_2: case ARIZONA_DSP3_SCRATCH_3: + case ARIZONA_DSP3_CLOCKING_1: case ARIZONA_DSP4_STATUS_1: case ARIZONA_DSP4_STATUS_2: case ARIZONA_DSP4_STATUS_3: @@ -2781,6 +2784,7 @@ static bool florida_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_DSP4_SCRATCH_1: case ARIZONA_DSP4_SCRATCH_2: case ARIZONA_DSP4_SCRATCH_3: + case ARIZONA_DSP4_CLOCKING_1: return true; default: return florida_is_adsp_memory(dev, reg); From 2c66041881656e5901fda1d3753b1883d09702f6 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 3 Mar 2014 09:53:46 +0000 Subject: [PATCH 0245/1167] mfd: wm5102: Mark DSP clocking register as volatile The DSPs will often control there own clock speeds whilst running as such we should mark the registers controlling this as volatile. Signed-off-by: Charles Keepax --- drivers/mfd/wm5102-tables.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index 8801f044471..bba1a594a2e 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -2009,6 +2009,7 @@ static bool wm5102_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_AOD_IRQ1: case ARIZONA_AOD_IRQ2: case ARIZONA_AOD_IRQ_RAW_STATUS: + case ARIZONA_DSP1_CLOCKING_1: case ARIZONA_DSP1_STATUS_1: case ARIZONA_DSP1_STATUS_2: case ARIZONA_DSP1_STATUS_3: From 9e9d1202ae9cdc67a02db8b5a388e4a9c743ea03 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 4 Mar 2014 15:05:31 +0000 Subject: [PATCH 0246/1167] ASoC: wm_adsp: Bail out earlier if a control already exists If a control already exists the driver currently still processes a fairly large amount of the path that adds the control, which involves a fair few memory allocations so is not trivial. This patch bails out much earlier if the control exists and thus saves a lot of work. Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 3317e1834bd..b8b7d6cff5a 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1095,7 +1095,7 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, ctl->enabled = 1; kfree(name); - return 0; + return -EEXIST; } } @@ -1158,16 +1158,26 @@ static int wm_adsp_create_grouped_control(struct wm_adsp *dsp, int ret; /* This is the quick case for control groups of a single block */ - if (region->len <= 512) - return wm_adsp_create_control(dsp, region); + if (region->len <= 512) { + ret = wm_adsp_create_control(dsp, region); + if (ret == -EEXIST) + ret = 0; + + return ret; + } + /* The passed `region' is already in the list * of algorithm regions so just create the control for it and don't * add it to the list */ region->len = 512; ret = wm_adsp_create_control(dsp, region); - if (ret < 0) + if (ret < 0) { + if (ret == -EEXIST) + ret = 0; + return ret; + } offset += 512; /* Carve up the entire region into 512-byte chunks */ From f8e3547d096cf96ff20e21349e1c84d7d8776a18 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 4 Mar 2014 16:17:25 +0000 Subject: [PATCH 0247/1167] ASoC: florida: Add special handling for headphone enable without DRE To ensure a smooth enable of the headphone path when DRE is not enabled some additional steps are required. Change-Id: Idc921e29bc8dea754bfe41ab7f664137acaa385e Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 89 ++++++++++++++++++++++++++++++++++++++ sound/soc/codecs/florida.c | 29 ++++++++++++- 2 files changed, 116 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 6b84a3a19a0..455b435eaf2 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -767,15 +767,95 @@ int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, } EXPORT_SYMBOL_GPL(arizona_in_ev); +int florida_hp_pre_enable(struct snd_soc_dapm_widget *w) +{ + unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); + + switch (w->shift) { + case ARIZONA_OUT1L_ENA_SHIFT: + if (!(val & ARIZONA_DRE1L_ENA_MASK)) + snd_soc_update_bits(w->codec, + ARIZONA_OUTPUT_PATH_CONFIG_1L, + ARIZONA_OUT1L_PGA_VOL_MASK, + 0x56); + break; + case ARIZONA_OUT1R_ENA_SHIFT: + if (!(val & ARIZONA_DRE1R_ENA_MASK)) + snd_soc_update_bits(w->codec, + ARIZONA_OUTPUT_PATH_CONFIG_1R, + ARIZONA_OUT1R_PGA_VOL_MASK, + 0x56); + break; + + default: + break; + } + + return 0; +} + +int florida_hp_post_enable(struct snd_soc_dapm_widget *w) +{ + unsigned int wseq = 0; + unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); + + switch (w->shift) { + case ARIZONA_OUT1L_ENA_SHIFT: + if (!(val & ARIZONA_DRE1L_ENA_MASK)) { + snd_soc_write(w->codec, + ARIZONA_WRITE_SEQUENCER_CTRL_0, + ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | + 0x12E); + msleep(10); + snd_soc_update_bits(w->codec, + ARIZONA_OUTPUT_PATH_CONFIG_1L, + ARIZONA_OUT1L_PGA_VOL_MASK, + 0x80); + } + break; + case ARIZONA_OUT1R_ENA_SHIFT: + if (!(val & ARIZONA_DRE1R_ENA_MASK)) { + snd_soc_write(w->codec, + ARIZONA_WRITE_SEQUENCER_CTRL_0, + ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | + 0x133); + msleep(10); + snd_soc_update_bits(w->codec, + ARIZONA_OUTPUT_PATH_CONFIG_1R, + ARIZONA_OUT1R_PGA_VOL_MASK, + 0x80); + } + break; + + default: + break; + } + + return 0; +} + int arizona_out_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { + struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); + switch (event) { case SND_SOC_DAPM_POST_PMU: switch (w->shift) { case ARIZONA_OUT1L_ENA_SHIFT: case ARIZONA_OUT1R_ENA_SHIFT: + msleep(17); + + switch (priv->arizona->type) { + case WM5110: + florida_hp_post_enable(w); + break; + default: + break; + } + + break; case ARIZONA_OUT2L_ENA_SHIFT: case ARIZONA_OUT2R_ENA_SHIFT: case ARIZONA_OUT3L_ENA_SHIFT: @@ -802,6 +882,15 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, unsigned int val; switch (event) { + case SND_SOC_DAPM_PRE_PMU: + switch (priv->arizona->type) { + case WM5110: + florida_hp_pre_enable(w); + break; + default: + break; + } + return 0; case SND_SOC_DAPM_POST_PMU: val = mask; break; diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index bc71fee3a25..dbe9deda445 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -145,6 +145,25 @@ static const struct reg_default florida_sysclk_revd_patch[] = { { 0x33fb, 0xfe00 }, }; +static const struct reg_default florida_sysclk_reve_patch[] = { + { 0x325C, 0xE410 }, + { 0x325D, 0x3066 }, + { 0x325E, 0xE410 }, + { 0x325F, 0x3070 }, + { 0x3260, 0xE410 }, + { 0x3261, 0x3078 }, + { 0x3262, 0xE410 }, + { 0x3263, 0x3080 }, + { 0x3266, 0xE414 }, + { 0x3267, 0x3066 }, + { 0x3268, 0xE414 }, + { 0x3269, 0x3070 }, + { 0x326A, 0xE414 }, + { 0x326B, 0x3078 }, + { 0x326C, 0xE414 }, + { 0x326D, 0x3080 }, +}; + static int florida_sysclk_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { @@ -159,6 +178,10 @@ static int florida_sysclk_ev(struct snd_soc_dapm_widget *w, patch = florida_sysclk_revd_patch; patch_size = ARRAY_SIZE(florida_sysclk_revd_patch); break; + case 4: + patch = florida_sysclk_reve_patch; + patch_size = ARRAY_SIZE(florida_sysclk_reve_patch); + break; default: return 0; } @@ -958,10 +981,12 @@ SND_SOC_DAPM_AIF_IN("AIF3RX2", NULL, 0, SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_PRE_PMU | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_PRE_PMU | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT2L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT2L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), From 4aed916084a28e6ef3426556845008d898ac791f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 5 Mar 2014 09:11:35 +0000 Subject: [PATCH 0248/1167] ASoC: arizona: Remove unused variable Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 455b435eaf2..456cc0f3a51 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -796,7 +796,6 @@ int florida_hp_pre_enable(struct snd_soc_dapm_widget *w) int florida_hp_post_enable(struct snd_soc_dapm_widget *w) { - unsigned int wseq = 0; unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); switch (w->shift) { From 2a5d6027a03f8acb5fef4523645cceb79c2b8d14 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 5 Mar 2014 15:15:07 +0000 Subject: [PATCH 0249/1167] ASoC: florida: Mark headphone enable helpers as static Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 456cc0f3a51..ddb2d854630 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -767,7 +767,7 @@ int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, } EXPORT_SYMBOL_GPL(arizona_in_ev); -int florida_hp_pre_enable(struct snd_soc_dapm_widget *w) +static int florida_hp_pre_enable(struct snd_soc_dapm_widget *w) { unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); @@ -794,7 +794,7 @@ int florida_hp_pre_enable(struct snd_soc_dapm_widget *w) return 0; } -int florida_hp_post_enable(struct snd_soc_dapm_widget *w) +static int florida_hp_post_enable(struct snd_soc_dapm_widget *w) { unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); From 6127058f6c6efdc424acf9c4eb167055544420c0 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 5 Mar 2014 15:13:44 +0000 Subject: [PATCH 0250/1167] ASoC: florida: Add special handling for headphone disable without DRE To ensure a smooth disable of the headphone path when DRE is not enabled some additional steps are required. Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 88 ++++++++++++++++++++++++++++++++++++++ sound/soc/codecs/florida.c | 24 +++++++++-- 2 files changed, 108 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index ddb2d854630..01e49214b38 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -833,6 +833,77 @@ static int florida_hp_post_enable(struct snd_soc_dapm_widget *w) return 0; } +static int florida_hp_pre_disable(struct snd_soc_dapm_widget *w) +{ + unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); + + switch (w->shift) { + case ARIZONA_OUT1L_ENA_SHIFT: + if (!(val & ARIZONA_DRE1L_ENA_MASK)) { + snd_soc_write(w->codec, + ARIZONA_WRITE_SEQUENCER_CTRL_0, + ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | + 0x138); + msleep(10); + snd_soc_update_bits(w->codec, + ARIZONA_OUTPUT_PATH_CONFIG_1L, + ARIZONA_OUT1L_PGA_VOL_MASK, + 0x56); + } + break; + case ARIZONA_OUT1R_ENA_SHIFT: + if (!(val & ARIZONA_DRE1R_ENA_MASK)) { + snd_soc_write(w->codec, + ARIZONA_WRITE_SEQUENCER_CTRL_0, + ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | + 0x13d); + msleep(10); + snd_soc_update_bits(w->codec, + ARIZONA_OUTPUT_PATH_CONFIG_1R, + ARIZONA_OUT1R_PGA_VOL_MASK, + 0x56); + } + break; + + default: + break; + } + + return 0; +} + +static int florida_hp_post_disable(struct snd_soc_dapm_widget *w) +{ + unsigned int wseq = 0; + unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); + + switch (w->shift) { + case ARIZONA_OUT1L_ENA_SHIFT: + if (!(val & ARIZONA_DRE1L_ENA_MASK)) { + msleep(17); + snd_soc_update_bits(w->codec, + ARIZONA_OUTPUT_PATH_CONFIG_1L, + ARIZONA_OUT1L_PGA_VOL_MASK, + 0x80); + } + break; + case ARIZONA_OUT1R_ENA_SHIFT: + if (!(val & ARIZONA_DRE1R_ENA_MASK)) { + msleep(17); + snd_soc_update_bits(w->codec, + ARIZONA_OUTPUT_PATH_CONFIG_1R, + ARIZONA_OUT1R_PGA_VOL_MASK, + 0x80); + } + break; + + default: + break; + } + + return 0; +} + int arizona_out_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) @@ -895,7 +966,24 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, break; case SND_SOC_DAPM_PRE_PMD: val = 0; + switch (priv->arizona->type) { + case WM5110: + florida_hp_pre_disable(w); + break; + default: + break; + } break; + case SND_SOC_DAPM_POST_PMD: + switch (priv->arizona->type) { + case WM5110: + florida_hp_post_disable(w); + break; + default: + break; + } + + return 0; default: return -EINVAL; } diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index dbe9deda445..372fb112d1b 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -162,6 +162,22 @@ static const struct reg_default florida_sysclk_reve_patch[] = { { 0x326B, 0x3078 }, { 0x326C, 0xE414 }, { 0x326D, 0x3080 }, + { 0x3270, 0xE410 }, + { 0x3271, 0x3078 }, + { 0x3272, 0xE410 }, + { 0x3273, 0x3070 }, + { 0x3274, 0xE410 }, + { 0x3275, 0x3066 }, + { 0x3276, 0xE410 }, + { 0x3277, 0x3056 }, + { 0x327A, 0xE414 }, + { 0x327B, 0x3078 }, + { 0x327C, 0xE414 }, + { 0x327D, 0x3070 }, + { 0x327E, 0xE414 }, + { 0x327F, 0x3066 }, + { 0x3280, 0xE414 }, + { 0x3281, 0x3056 }, }; static int florida_sysclk_ev(struct snd_soc_dapm_widget *w, @@ -981,12 +997,12 @@ SND_SOC_DAPM_AIF_IN("AIF3RX2", NULL, 0, SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_PRE_PMU | - SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_PRE_PMU | - SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT2L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT2L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), From ab95f9a5027529228385c838dbb5a84d4ee39904 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 6 Mar 2014 07:25:33 +0000 Subject: [PATCH 0251/1167] ASoC: arizona: Remove unused variable Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 01e49214b38..7c88b1cfeb3 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -874,7 +874,6 @@ static int florida_hp_pre_disable(struct snd_soc_dapm_widget *w) static int florida_hp_post_disable(struct snd_soc_dapm_widget *w) { - unsigned int wseq = 0; unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); switch (w->shift) { From 14ace5ee6628080d7562aa8f9b40c70b306e6f77 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 5 Mar 2014 12:59:19 +0000 Subject: [PATCH 0252/1167] ASoC: wm_adsp: Split firmware load into smaller chunks The firmware files can be quite large and allocating the whole firmware a single DMA safe buffer can be problematic if the system is under a high memory load. Ease the requirements slightly by writing the firmware out in page sized chunks. Change-Id: Ic91c38cb021b6ea7bbe747acba8184856d5c928b Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 48 ++++++++++++++++++++++++-------------- 1 file changed, 31 insertions(+), 17 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index b8b7d6cff5a..e8e4a6accea 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -958,24 +958,38 @@ static int wm_adsp_load(struct wm_adsp *dsp) } if (reg) { - buf = wm_adsp_buf_alloc(region->data, - le32_to_cpu(region->len), - &buf_list); - if (!buf) { - adsp_err(dsp, "Out of memory\n"); - ret = -ENOMEM; - goto out_buf; - } + size_t to_write = PAGE_SIZE; + size_t remain = le32_to_cpu(region->len); + const u8 *data = region->data; + + while (remain > 0) { + if (remain < PAGE_SIZE) + to_write = remain; + + buf = wm_adsp_buf_alloc(data, + to_write, + &buf_list); + if (!buf) { + adsp_err(dsp, "Out of memory\n"); + ret = -ENOMEM; + goto out_buf; + } - ret = regmap_raw_write_async(regmap, reg, buf->buf, - le32_to_cpu(region->len)); - if (ret != 0) { - adsp_err(dsp, - "%s.%d: Failed to write %d bytes at %d in %s: %d\n", - file, regions, - le32_to_cpu(region->len), offset, - region_name, ret); - goto out_buf; + ret = regmap_raw_write_async(regmap, reg, + buf->buf, + to_write); + if (ret != 0) { + adsp_err(dsp, + "%s.%d: Failed to write %zd bytes at %d in %s: %d\n", + file, regions, + to_write, offset, + region_name, ret); + goto out_buf; + } + + data += to_write; + reg += to_write / 2; + remain -= to_write; } } From e2c14f3a2eedd7c0beb0ab72901f1a5d432fe4ee Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 7 Mar 2014 09:25:10 +0000 Subject: [PATCH 0253/1167] Revert "ASoC: wm_adsp: Bail out earlier if a control already exists" This reverts commit 9e9d1202ae9cdc67a02db8b5a388e4a9c743ea03. This commit causes the later sections of larger controls not to be enabled when the firmware is loaded for a second time. The control enabling and control creation are currently rather heavily intertwined in the code and seperating them will require more significant refactoring. As the original patch is a performance improvement rather than a bug fix revert until the refactoring can be done. Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 18 ++++-------------- 1 file changed, 4 insertions(+), 14 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index e8e4a6accea..2d6ae27322c 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1109,7 +1109,7 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, ctl->enabled = 1; kfree(name); - return -EEXIST; + return 0; } } @@ -1172,26 +1172,16 @@ static int wm_adsp_create_grouped_control(struct wm_adsp *dsp, int ret; /* This is the quick case for control groups of a single block */ - if (region->len <= 512) { - ret = wm_adsp_create_control(dsp, region); - if (ret == -EEXIST) - ret = 0; - - return ret; - } - + if (region->len <= 512) + return wm_adsp_create_control(dsp, region); /* The passed `region' is already in the list * of algorithm regions so just create the control for it and don't * add it to the list */ region->len = 512; ret = wm_adsp_create_control(dsp, region); - if (ret < 0) { - if (ret == -EEXIST) - ret = 0; - + if (ret < 0) return ret; - } offset += 512; /* Carve up the entire region into 512-byte chunks */ From 1f0adcdcedd5e6334491d21e9d640d54225adc08 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 10 Mar 2014 13:24:14 +0000 Subject: [PATCH 0254/1167] ASoC: arizona: Update ordering of input clear proceedure Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 7c88b1cfeb3..0ed6fc2deaa 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -693,8 +693,8 @@ static int arizona_update_input(struct arizona* arizona, bool enable) if (enable) { regmap_write(arizona->regmap, 0x80, 0x3); - regmap_write(arizona->regmap, 0x3A5, 0x3); regmap_write(arizona->regmap, 0x3A6, 0x5555); + regmap_write(arizona->regmap, 0x3A5, 0x3); regmap_write(arizona->regmap, 0x80, 0x0); } else { regmap_write(arizona->regmap, 0x80, 0x3); From 754449d756870c200fb7be367de09b674c6d3225 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 11 Mar 2014 13:04:53 +0000 Subject: [PATCH 0255/1167] ASoC: arizona: Correct control regiser for input clear Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 0ed6fc2deaa..9fd181f4d6b 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -725,7 +725,7 @@ int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, ctrl = reg - 1; } else { reg = ARIZONA_ADC_DIGITAL_VOLUME_1R + ((w->shift / 2) * 8); - ctrl = reg - 4; + ctrl = reg - 5; } switch (event) { From 5c9e53a463084acdf1ceee14ce6f6c3382f07f72 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 11 Mar 2014 13:39:33 +0000 Subject: [PATCH 0256/1167] ASoC: florida: Apply rev E patch to future devices These will still be required whilst the DRE is disabled. Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 372fb112d1b..9328c34c8b8 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -194,12 +194,10 @@ static int florida_sysclk_ev(struct snd_soc_dapm_widget *w, patch = florida_sysclk_revd_patch; patch_size = ARRAY_SIZE(florida_sysclk_revd_patch); break; - case 4: + default: patch = florida_sysclk_reve_patch; patch_size = ARRAY_SIZE(florida_sysclk_reve_patch); break; - default: - return 0; } switch (event) { From 99bfad7cb2e77042fcb95b844cac3fbd1cf105b2 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 12 Mar 2014 15:16:47 +0000 Subject: [PATCH 0257/1167] ASoC: arizona: Update headphone enable based on latest evaluation In the case that no DRE is running a special headphone enable sequence is needed, this patch updates this based on new evalution. Change-Id: Icf6d9d76b424b2be44b862287c682cd6b4417a32 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 123 ++++++++++++++++++++++++++++--------- 1 file changed, 93 insertions(+), 30 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 9fd181f4d6b..d1ae7eb7f81 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -767,24 +767,105 @@ int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, } EXPORT_SYMBOL_GPL(arizona_in_ev); +static const struct reg_default florida_no_dre_left_enable[] = { + { 0x3024, 0xE410 }, + { 0x3025, 0x0056 }, + { 0x301B, 0x0224 }, + { 0x301F, 0x4263 }, + { 0x3021, 0x5291 }, + { 0x3030, 0xE410 }, + { 0x3031, 0x3066 }, + { 0x3032, 0xE410 }, + { 0x3033, 0x3070 }, + { 0x3034, 0xE410 }, + { 0x3035, 0x3078 }, + { 0x3036, 0xE410 }, + { 0x3037, 0x3080 }, + { 0x3038, 0xE410 }, + { 0x3039, 0x3080 }, +}; + +static const struct reg_default florida_dre_left_enable[] = { + { 0x3024, 0x0231 }, + { 0x3025, 0x0B00 }, + { 0x301B, 0x0227 }, + { 0x301F, 0x4266 }, + { 0x3021, 0x5294 }, + { 0x3030, 0xE231 }, + { 0x3031, 0x0266 }, + { 0x3032, 0x8231 }, + { 0x3033, 0x4B15 }, + { 0x3034, 0x8231 }, + { 0x3035, 0x0B15 }, + { 0x3036, 0xE231 }, + { 0x3037, 0x5294 }, + { 0x3038, 0x0231 }, + { 0x3039, 0x0B00 }, +}; + +static const struct reg_default florida_no_dre_right_enable[] = { + { 0x3074, 0xE414 }, + { 0x3075, 0x0056 }, + { 0x306B, 0x0224 }, + { 0x306F, 0x4263 }, + { 0x3071, 0x5291 }, + { 0x3080, 0xE414 }, + { 0x3081, 0x3066 }, + { 0x3082, 0xE414 }, + { 0x3083, 0x3070 }, + { 0x3084, 0xE414 }, + { 0x3085, 0x3078 }, + { 0x3086, 0xE414 }, + { 0x3087, 0x3080 }, + { 0x3088, 0xE414 }, + { 0x3089, 0x3080 }, +}; + +static const struct reg_default florida_dre_right_enable[] = { + { 0x3074, 0x0231 }, + { 0x3075, 0x0B00 }, + { 0x306B, 0x0227 }, + { 0x306F, 0x4266 }, + { 0x3071, 0x5294 }, + { 0x3080, 0xE231 }, + { 0x3081, 0x0266 }, + { 0x3082, 0x8231 }, + { 0x3083, 0x4B17 }, + { 0x3084, 0x8231 }, + { 0x3085, 0x0B17 }, + { 0x3086, 0xE231 }, + { 0x3087, 0x5294 }, + { 0x3088, 0x0231 }, + { 0x3089, 0x0B00 }, +}; + static int florida_hp_pre_enable(struct snd_soc_dapm_widget *w) { + struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); switch (w->shift) { case ARIZONA_OUT1L_ENA_SHIFT: - if (!(val & ARIZONA_DRE1L_ENA_MASK)) - snd_soc_update_bits(w->codec, - ARIZONA_OUTPUT_PATH_CONFIG_1L, - ARIZONA_OUT1L_PGA_VOL_MASK, - 0x56); + if (val & ARIZONA_DRE1L_ENA_MASK) { + regmap_multi_reg_write(priv->arizona->regmap, + florida_dre_left_enable, + ARRAY_SIZE(florida_dre_left_enable)); + } else { + regmap_multi_reg_write(priv->arizona->regmap, + florida_no_dre_left_enable, + ARRAY_SIZE(florida_no_dre_left_enable)); + } break; case ARIZONA_OUT1R_ENA_SHIFT: - if (!(val & ARIZONA_DRE1R_ENA_MASK)) - snd_soc_update_bits(w->codec, - ARIZONA_OUTPUT_PATH_CONFIG_1R, - ARIZONA_OUT1R_PGA_VOL_MASK, - 0x56); + if (val & ARIZONA_DRE1R_ENA_MASK) { + regmap_multi_reg_write(priv->arizona->regmap, + florida_dre_right_enable, + ARRAY_SIZE(florida_dre_right_enable)); + } else { + regmap_multi_reg_write(priv->arizona->regmap, + florida_no_dre_right_enable, + ARRAY_SIZE(florida_no_dre_right_enable)); + } break; default: @@ -800,30 +881,12 @@ static int florida_hp_post_enable(struct snd_soc_dapm_widget *w) switch (w->shift) { case ARIZONA_OUT1L_ENA_SHIFT: - if (!(val & ARIZONA_DRE1L_ENA_MASK)) { - snd_soc_write(w->codec, - ARIZONA_WRITE_SEQUENCER_CTRL_0, - ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | - 0x12E); + if (!(val & ARIZONA_DRE1L_ENA_MASK)) msleep(10); - snd_soc_update_bits(w->codec, - ARIZONA_OUTPUT_PATH_CONFIG_1L, - ARIZONA_OUT1L_PGA_VOL_MASK, - 0x80); - } break; case ARIZONA_OUT1R_ENA_SHIFT: - if (!(val & ARIZONA_DRE1R_ENA_MASK)) { - snd_soc_write(w->codec, - ARIZONA_WRITE_SEQUENCER_CTRL_0, - ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | - 0x133); + if (!(val & ARIZONA_DRE1R_ENA_MASK)) msleep(10); - snd_soc_update_bits(w->codec, - ARIZONA_OUTPUT_PATH_CONFIG_1R, - ARIZONA_OUT1R_PGA_VOL_MASK, - 0x80); - } break; default: From b785a71ad34bd235f889d5a098d17e38ef5db46a Mon Sep 17 00:00:00 2001 From: Anthony Olech Date: Fri, 11 Oct 2013 15:31:11 +0100 Subject: [PATCH 0258/1167] regmap: new API regmap_multi_reg_write() definition New API regmap_multi_reg_write() is defined that allows a set of reg,val pairs to be written to a I2C client device as one block transfer from the point of view of a single I2C master system. A simple demonstration implementation is included that just splits the block write request into a sequence of single register writes. The implementation will be modified later to support those I2C clients that implement the alternative non-standard MULTIWRITE block write mode so to achieve a single I2C transfer that will be atomic even in multiple I2C master systems. Signed-off-by: Anthony Olech Signed-off-by: David Dajun Chen Signed-off-by: Mark Brown (cherry picked from commit e33fabd365596178e72f62bb4b89f0aaad0509ad) Change-Id: Ic4543e44f6503d689806eac32b94f0bbf2748335 Signed-off-by: Charles Keepax --- drivers/base/regmap/regmap.c | 41 ++++++++++++++++++++++++++++++++++++ include/linux/regmap.h | 2 ++ 2 files changed, 43 insertions(+) diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c index a941dcfe759..52a7d7e74ee 100644 --- a/drivers/base/regmap/regmap.c +++ b/drivers/base/regmap/regmap.c @@ -1319,6 +1319,47 @@ int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, } EXPORT_SYMBOL_GPL(regmap_bulk_write); +/* + * regmap_multi_reg_write(): Write multiple registers to the device + * + * where the set of register are supplied in any order + * + * @map: Register map to write to + * @regs: Array of structures containing register,value to be written + * @num_regs: Number of registers to write + * + * This function is intended to be used for writing a large block of data + * atomically to the device in single transfer for those I2C client devices + * that implement this alternative block write mode. + * + * A value of zero will be returned on success, a negative errno will + * be returned in error cases. + */ +int regmap_multi_reg_write(struct regmap *map, struct reg_default *regs, + int num_regs) +{ + int ret = 0, i; + + for (i = 0; i < num_regs; i++) { + int reg = regs[i].reg; + if (reg % map->reg_stride) + return -EINVAL; + } + + map->lock(map->lock_arg); + + for (i = 0; i < num_regs; i++) { + ret = _regmap_write(map, regs[i].reg, regs[i].def); + if (ret != 0) + goto out; + } +out: + map->unlock(map->lock_arg); + + return ret; +} +EXPORT_SYMBOL_GPL(regmap_multi_reg_write); + /** * regmap_raw_write_async(): Write raw values to one or more registers * asynchronously diff --git a/include/linux/regmap.h b/include/linux/regmap.h index 02d84e24b7c..c99de1356d4 100644 --- a/include/linux/regmap.h +++ b/include/linux/regmap.h @@ -375,6 +375,8 @@ int regmap_raw_write(struct regmap *map, unsigned int reg, const void *val, size_t val_len); int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, size_t val_count); +int regmap_multi_reg_write(struct regmap *map, struct reg_default *regs, + int num_regs); int regmap_raw_write_async(struct regmap *map, unsigned int reg, const void *val, size_t val_len); int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val); From 9ec95d9cb4ff4dba53cc307c7d0635f3ac19f419 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 25 Feb 2014 13:45:49 +0000 Subject: [PATCH 0259/1167] regmap: Mark reg_defaults in regmap_multi_reg_write as const There should be no need for the writes supplied to this function to be edited by it so mark them as const. Signed-off-by: Charles Keepax Signed-off-by: Mark Brown (cherry picked from commit f7e2cec02b0e5bfe2180f09de9b0bc724774c51a) Change-Id: I23a725b13f83b7e58e58ffa3f9894111e8462271 Signed-off-by: Charles Keepax --- drivers/base/regmap/regmap.c | 4 ++-- include/linux/regmap.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c index 52a7d7e74ee..2873b1cb03c 100644 --- a/drivers/base/regmap/regmap.c +++ b/drivers/base/regmap/regmap.c @@ -1335,8 +1335,8 @@ EXPORT_SYMBOL_GPL(regmap_bulk_write); * A value of zero will be returned on success, a negative errno will * be returned in error cases. */ -int regmap_multi_reg_write(struct regmap *map, struct reg_default *regs, - int num_regs) +int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs, + int num_regs) { int ret = 0, i; diff --git a/include/linux/regmap.h b/include/linux/regmap.h index c99de1356d4..aeefc304ec3 100644 --- a/include/linux/regmap.h +++ b/include/linux/regmap.h @@ -375,7 +375,7 @@ int regmap_raw_write(struct regmap *map, unsigned int reg, const void *val, size_t val_len); int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, size_t val_count); -int regmap_multi_reg_write(struct regmap *map, struct reg_default *regs, +int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs, int num_regs); int regmap_raw_write_async(struct regmap *map, unsigned int reg, const void *val, size_t val_len); From 6fbbbb33c72098733e632c7d90757680551dcf36 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 25 Feb 2014 13:45:50 +0000 Subject: [PATCH 0260/1167] regmap: Add bypassed version of regmap_multi_reg_write Devices with more complex boot proceedures may occasionally apply the register patch manual. regmap_multi_reg_write is a logical way to do so, however the patch must be applied with cache bypass on, such that it doesn't override any user settings. This patch adds a regmap_multi_reg_write_bypassed function that applies a set of writes with the bypass enabled. Signed-off-by: Charles Keepax Signed-off-by: Mark Brown (cherry-picked from commit 1d5b40bccf04994248b39e8ce234a7c1f3235cf5) Change-Id: Ie5566e7d50295f772bf292fcd65b4af050659e5b Signed-off-by: Charles Keepax --- drivers/base/regmap/regmap.c | 75 +++++++++++++++++++++++++++++------- include/linux/regmap.h | 3 ++ 2 files changed, 65 insertions(+), 13 deletions(-) diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c index 2873b1cb03c..e31a9baa819 100644 --- a/drivers/base/regmap/regmap.c +++ b/drivers/base/regmap/regmap.c @@ -1319,6 +1319,26 @@ int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, } EXPORT_SYMBOL_GPL(regmap_bulk_write); +static int _regmap_multi_reg_write(struct regmap *map, + const struct reg_default *regs, + int num_regs) +{ + int i, ret; + + for (i = 0; i < num_regs; i++) { + if (regs[i].reg % map->reg_stride) + return -EINVAL; + ret = _regmap_write(map, regs[i].reg, regs[i].def); + if (ret != 0) { + dev_err(map->dev, "Failed to write %x = %x: %d\n", + regs[i].reg, regs[i].def, ret); + return ret; + } + } + + return 0; +} + /* * regmap_multi_reg_write(): Write multiple registers to the device * @@ -1338,28 +1358,57 @@ EXPORT_SYMBOL_GPL(regmap_bulk_write); int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs, int num_regs) { - int ret = 0, i; - - for (i = 0; i < num_regs; i++) { - int reg = regs[i].reg; - if (reg % map->reg_stride) - return -EINVAL; - } + int ret; map->lock(map->lock_arg); - for (i = 0; i < num_regs; i++) { - ret = _regmap_write(map, regs[i].reg, regs[i].def); - if (ret != 0) - goto out; - } -out: + ret = _regmap_multi_reg_write(map, regs, num_regs); + map->unlock(map->lock_arg); return ret; } EXPORT_SYMBOL_GPL(regmap_multi_reg_write); +/* + * regmap_multi_reg_write_bypassed(): Write multiple registers to the + * device but not the cache + * + * where the set of register are supplied in any order + * + * @map: Register map to write to + * @regs: Array of structures containing register,value to be written + * @num_regs: Number of registers to write + * + * This function is intended to be used for writing a large block of data + * atomically to the device in single transfer for those I2C client devices + * that implement this alternative block write mode. + * + * A value of zero will be returned on success, a negative errno will + * be returned in error cases. + */ +int regmap_multi_reg_write_bypassed(struct regmap *map, + const struct reg_default *regs, + int num_regs) +{ + int ret; + bool bypass; + + map->lock(map->lock_arg); + + bypass = map->cache_bypass; + map->cache_bypass = true; + + ret = _regmap_multi_reg_write(map, regs, num_regs); + + map->cache_bypass = bypass; + + map->unlock(map->lock_arg); + + return ret; +} +EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed); + /** * regmap_raw_write_async(): Write raw values to one or more registers * asynchronously diff --git a/include/linux/regmap.h b/include/linux/regmap.h index aeefc304ec3..b3a7f3344c3 100644 --- a/include/linux/regmap.h +++ b/include/linux/regmap.h @@ -377,6 +377,9 @@ int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, size_t val_count); int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs, int num_regs); +int regmap_multi_reg_write_bypassed(struct regmap *map, + const struct reg_default *regs, + int num_regs); int regmap_raw_write_async(struct regmap *map, unsigned int reg, const void *val, size_t val_len); int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val); From fd2417364c4cd646fdfc61486bbbeff849251e00 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 25 Feb 2014 13:45:52 +0000 Subject: [PATCH 0261/1167] mfd: arizona: Use new regmap features for manual register patch On the wm5102 the register patches are applied manually, rather than by the regmap core. This application is wrapped in calls to regcache_cache_bypass. However, this is dangerous as other threads may be accessing the hardware at the same time as the pm_runtime operations and if they do so during the period whilst cache_bypass is enabled those writes will miss the cache when they shouldn't. Apply the register patch using the new regmap_multi_reg_write_bypassed function to avoid this problem. Also remove the call to regcache_cache_bypass from the hardware patch application as it is unneeded there and creates a similar window for writes to miss the cache. Signed-off-by: Charles Keepax Acked-by: Lee Jones Signed-off-by: Mark Brown (cherry picked from commit 1c18d2ca104c36fc2ce147cce053c62f61d2ea68) Change-Id: Ia28648b61f04a4ee2e837d0387daede9c58a8902 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 4 ---- drivers/mfd/wm5102-tables.c | 34 +++++++--------------------------- 2 files changed, 7 insertions(+), 31 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 43422678889..352118d15b3 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -252,8 +252,6 @@ static int arizona_exec_with_sysclk(struct arizona* arizona, unsigned int fll, sysclk; int ret, err; - regcache_cache_bypass(arizona->regmap, true); - /* Cache existing FLL and SYSCLK settings */ ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll); if (ret != 0) { @@ -308,8 +306,6 @@ static int arizona_exec_with_sysclk(struct arizona* arizona, err); } - regcache_cache_bypass(arizona->regmap, false); - if (ret != 0) return ret; else diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index bba1a594a2e..6f33b4b1a66 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -138,30 +138,11 @@ static const struct { { wm5102t_pwr_4, ARRAY_SIZE(wm5102t_pwr_4) }, }; -static int wm5102_apply_patch(struct arizona *arizona, - const struct reg_default *wm5102_patch, - const int patch_size) -{ - int i, ret; - - for (i = 0; i < patch_size; i++) { - ret = regmap_write(arizona->regmap, wm5102_patch[i].reg, - wm5102_patch[i].def); - if (ret != 0) { - dev_err(arizona->dev, "Failed to write %x = %x: %d\n", - wm5102_patch[i].reg, wm5102_patch[i].def, ret); - return ret; - } - } - - return 0; -} - /* We use a function so we can use ARRAY_SIZE() */ int wm5102_patch(struct arizona *arizona) { const struct reg_default *wm5102_patch; - int ret = 0; + int ret; int patch_size; int pwr_index = arizona->pdata.wm5102t_output_pwr; @@ -176,21 +157,20 @@ int wm5102_patch(struct arizona *arizona) break; } - regcache_cache_bypass(arizona->regmap, true); - - ret = wm5102_apply_patch(arizona, wm5102_patch, patch_size); + ret = regmap_multi_reg_write_bypassed(arizona->regmap, + wm5102_patch, + patch_size); if (ret != 0) goto out; if (pwr_index < ARRAY_SIZE(wm5102t_pwr)) - ret = wm5102_apply_patch(arizona, - wm5102t_pwr[pwr_index].patch, - wm5102t_pwr[pwr_index].size); + ret = regmap_multi_reg_write_bypassed(arizona->regmap, + wm5102t_pwr[pwr_index].patch, + wm5102t_pwr[pwr_index].size); else dev_err(arizona->dev, "Invalid wm5102t output power\n"); out: - regcache_cache_bypass(arizona->regmap, false); return ret; } From 5c14320fe0ec5c7c42f9dc99b0533332c4b45b53 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 30 Jan 2014 18:42:06 +0000 Subject: [PATCH 0262/1167] ASoC: arizona: An OUTDIV of 1 is not valid, avoid this One is not a valid value for the OUTDIV start searching at 2 instead. Change-Id: Ibeda365afbe7f25778da7f3c185e474a5565200c Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index d1ae7eb7f81..040bf63f212 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1770,7 +1770,7 @@ static int arizona_calc_fll(struct arizona_fll *fll, Fref /= div; /* Fvco should be over the targt; don't check the upper bound */ - div = 1; + div = 2; while (Fout * div < 90000000 * fll->vco_mult) { div++; if (div > 7) { From 03c2796e3495a575c6535f537be65c477d952a8a Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 29 Jan 2014 15:41:19 +0000 Subject: [PATCH 0263/1167] ASoC: arizona: Add defines for FLL configuration constants Improve readability by adding defines for some of the constants associated with FLL configuration. Change-Id: I7368357d8a0000614a450954a58c176e6329e09d Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 040bf63f212..cf1a4cc8ca4 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -53,6 +53,12 @@ #define ARIZONA_AIF_RX_ENABLES 0x1A #define ARIZONA_AIF_FORCE_WRITE 0x1B +#define ARIZONA_FLL_MAX_FREF 13500000 +#define ARIZONA_FLL_MIN_FVCO 90000000 +#define ARIZONA_FLL_MAX_REFDIV 8 +#define ARIZONA_FLL_MIN_OUTDIV 2 +#define ARIZONA_FLL_MAX_OUTDIV 7 + #define arizona_fll_err(_fll, fmt, ...) \ dev_err(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__) #define arizona_fll_warn(_fll, fmt, ...) \ @@ -1754,11 +1760,11 @@ static int arizona_calc_fll(struct arizona_fll *fll, /* Fref must be <=13.5MHz */ div = 1; cfg->refdiv = 0; - while ((Fref / div) > 13500000) { + while ((Fref / div) > ARIZONA_FLL_MAX_FREF) { div *= 2; cfg->refdiv++; - if (div > 8) { + if (div > ARIZONA_FLL_MAX_REFDIV) { arizona_fll_err(fll, "Can't scale %dMHz in to <=13.5MHz\n", Fref); @@ -1770,10 +1776,10 @@ static int arizona_calc_fll(struct arizona_fll *fll, Fref /= div; /* Fvco should be over the targt; don't check the upper bound */ - div = 2; - while (Fout * div < 90000000 * fll->vco_mult) { + div = ARIZONA_FLL_MIN_OUTDIV; + while (Fout * div < ARIZONA_FLL_MIN_FVCO * fll->vco_mult) { div++; - if (div > 7) { + if (div > ARIZONA_FLL_MAX_OUTDIV) { arizona_fll_err(fll, "No FLL_OUTDIV for Fout=%uHz\n", Fout); return -EINVAL; From 54ff4eaaf4f66a12638338ab60c2145e93f1995e Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 29 Jan 2014 16:33:35 +0000 Subject: [PATCH 0264/1167] ASoC: arizona: Move set of OUTDIV in to arizona_apply_fll Since we know in arizona_apply_fll if we are setting the sync or ref path there is no need to set the outdiv seperately anymore. This patch moves this from arizona_enable_fll to arizona_apply_fll. Change-Id: If0f1893b0dbc356a045ba32bd62e357ea05f88f0 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index cf1a4cc8ca4..b3b7b5ed3dc 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1878,6 +1878,9 @@ static void arizona_apply_fll(struct arizona *arizona, unsigned int base, regmap_update_bits(arizona->regmap, base + 5, ARIZONA_FLL1_FRATIO_MASK, cfg->fratio_ref << ARIZONA_FLL1_FRATIO_SHIFT); + regmap_update_bits(arizona->regmap, base + 0x5, + ARIZONA_FLL1_OUTDIV_MASK, + cfg->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT); regmap_update_bits(arizona->regmap, base + 0x9, ARIZONA_FLL1_GAIN_MASK, cfg->gain << ARIZONA_FLL1_GAIN_SHIFT); @@ -1918,10 +1921,6 @@ static void arizona_enable_fll(struct arizona_fll *fll, */ if (fll->ref_src >= 0 && fll->ref_freq && fll->ref_src != fll->sync_src) { - regmap_update_bits(arizona->regmap, fll->base + 5, - ARIZONA_FLL1_OUTDIV_MASK, - ref->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT); - arizona_apply_fll(arizona, fll->base, ref, fll->ref_src, false); if (fll->sync_src >= 0) { @@ -1930,10 +1929,6 @@ static void arizona_enable_fll(struct arizona_fll *fll, use_sync = true; } } else if (fll->sync_src >= 0) { - regmap_update_bits(arizona->regmap, fll->base + 5, - ARIZONA_FLL1_OUTDIV_MASK, - sync->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT); - arizona_apply_fll(arizona, fll->base, sync, fll->sync_src, false); From 3b0e8657f0d9ca4405b4909657a1e87a1b729ee0 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 29 Jan 2014 15:57:29 +0000 Subject: [PATCH 0265/1167] ASoC: arizona: Move calculation of FLL configuration Currently the FLL configuration is calculated before it is known which FLL path the configuration will be applied to. Newer versions of the IP have differences in the configuration required for each FLL path, which makes it complicated to calculate the FLL configuration in advance. This patch simply checks the validity of a requested input and output frequency before we know which FLL path they will be applied to and saves the actual calculation of the configuration until we know where the settings will be applied. Change-Id: I39a34a7775ba34479fefe655f14ae51e8d514db1 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 79 +++++++++++++++++++++----------------- 1 file changed, 44 insertions(+), 35 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index b3b7b5ed3dc..f41ba1caa7c 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1747,6 +1747,29 @@ static inline int arizona_fratio_sync(struct arizona *arizona, int i) return fll_fratios[i].fratio[0]; } +static int arizona_validate_fll(struct arizona_fll *fll, + unsigned int Fref, + unsigned int Fout) +{ + unsigned int Fvco_min; + + if (Fref / ARIZONA_FLL_MAX_REFDIV > ARIZONA_FLL_MAX_FREF) { + arizona_fll_err(fll, + "Can't scale %dMHz in to <=13.5MHz\n", + Fref); + return -EINVAL; + } + + Fvco_min = ARIZONA_FLL_MIN_FVCO * fll->vco_mult; + if (Fout * ARIZONA_FLL_MAX_OUTDIV < Fvco_min) { + arizona_fll_err(fll, "No FLL_OUTDIV for Fout=%uHz\n", + Fout); + return -EINVAL; + } + + return 0; +} + static int arizona_calc_fll(struct arizona_fll *fll, struct arizona_fll_cfg *cfg, unsigned int Fref, @@ -1764,12 +1787,8 @@ static int arizona_calc_fll(struct arizona_fll *fll, div *= 2; cfg->refdiv++; - if (div > ARIZONA_FLL_MAX_REFDIV) { - arizona_fll_err(fll, - "Can't scale %dMHz in to <=13.5MHz\n", - Fref); + if (div > ARIZONA_FLL_MAX_REFDIV) return -EINVAL; - } } /* Apply the division for our remaining calculations */ @@ -1779,11 +1798,8 @@ static int arizona_calc_fll(struct arizona_fll *fll, div = ARIZONA_FLL_MIN_OUTDIV; while (Fout * div < ARIZONA_FLL_MIN_FVCO * fll->vco_mult) { div++; - if (div > ARIZONA_FLL_MAX_OUTDIV) { - arizona_fll_err(fll, "No FLL_OUTDIV for Fout=%uHz\n", - Fout); + if (div > ARIZONA_FLL_MAX_OUTDIV) return -EINVAL; - } } target = Fout * div / fll->vco_mult; cfg->outdiv = div; @@ -1907,13 +1923,12 @@ static bool arizona_is_enabled_fll(struct arizona_fll *fll) return reg & ARIZONA_FLL1_ENA; } -static void arizona_enable_fll(struct arizona_fll *fll, - struct arizona_fll_cfg *ref, - struct arizona_fll_cfg *sync) +static void arizona_enable_fll(struct arizona_fll *fll) { struct arizona *arizona = fll->arizona; int ret; bool use_sync = false; + struct arizona_fll_cfg cfg; /* * If we have both REFCLK and SYNCCLK then enable both, @@ -1921,15 +1936,21 @@ static void arizona_enable_fll(struct arizona_fll *fll, */ if (fll->ref_src >= 0 && fll->ref_freq && fll->ref_src != fll->sync_src) { - arizona_apply_fll(arizona, fll->base, ref, fll->ref_src, + arizona_calc_fll(fll, &cfg, fll->ref_freq, fll->fout); + + arizona_apply_fll(arizona, fll->base, &cfg, fll->ref_src, false); if (fll->sync_src >= 0) { - arizona_apply_fll(arizona, fll->base + 0x10, sync, + arizona_calc_fll(fll, &cfg, fll->sync_freq, fll->fout); + + arizona_apply_fll(arizona, fll->base + 0x10, &cfg, fll->sync_src, true); use_sync = true; } } else if (fll->sync_src >= 0) { - arizona_apply_fll(arizona, fll->base, sync, + arizona_calc_fll(fll, &cfg, fll->sync_freq, fll->fout); + + arizona_apply_fll(arizona, fll->base, &cfg, fll->sync_src, false); regmap_update_bits(arizona->regmap, fll->base + 0x11, @@ -1990,32 +2011,22 @@ static void arizona_disable_fll(struct arizona_fll *fll) int arizona_set_fll_refclk(struct arizona_fll *fll, int source, unsigned int Fref, unsigned int Fout) { - struct arizona_fll_cfg ref, sync; int ret; if (fll->ref_src == source && fll->ref_freq == Fref) return 0; - if (fll->fout) { - if (Fref > 0) { - ret = arizona_calc_fll(fll, &ref, Fref, fll->fout); - if (ret != 0) - return ret; - } - - if (fll->sync_src >= 0) { - ret = arizona_calc_fll(fll, &sync, fll->sync_freq, - fll->fout); - if (ret != 0) - return ret; - } + if (fll->fout && Fref > 0) { + ret = arizona_validate_fll(fll, Fref, fll->fout); + if (ret != 0) + return ret; } fll->ref_src = source; fll->ref_freq = Fref; if (fll->fout && Fref > 0) { - arizona_enable_fll(fll, &ref, &sync); + arizona_enable_fll(fll); } return 0; @@ -2025,7 +2036,6 @@ EXPORT_SYMBOL_GPL(arizona_set_fll_refclk); int arizona_set_fll(struct arizona_fll *fll, int source, unsigned int Fref, unsigned int Fout) { - struct arizona_fll_cfg ref, sync; int ret; if (fll->sync_src == source && @@ -2034,13 +2044,12 @@ int arizona_set_fll(struct arizona_fll *fll, int source, if (Fout) { if (fll->ref_src >= 0) { - ret = arizona_calc_fll(fll, &ref, fll->ref_freq, - Fout); + ret = arizona_validate_fll(fll, fll->ref_freq, Fout); if (ret != 0) return ret; } - ret = arizona_calc_fll(fll, &sync, Fref, Fout); + ret = arizona_validate_fll(fll, Fref, Fout); if (ret != 0) return ret; } @@ -2050,7 +2059,7 @@ int arizona_set_fll(struct arizona_fll *fll, int source, fll->fout = Fout; if (Fout) { - arizona_enable_fll(fll, &ref, &sync); + arizona_enable_fll(fll); } else { arizona_disable_fll(fll); } From 68260ea3e07ce8a67fb727f57bcd6a31d29be01f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 29 Jan 2014 16:43:41 +0000 Subject: [PATCH 0266/1167] ASoC: arizona: Don't pass Fout into arizona_calc_fll As we now calculate the FLL configuration at a later stage in the process the fout member of the FLL structure will contain the desired Fout frequency so no need to pass this in seperately. Change-Id: I3737df0844c7614ea436b2e26c7e53189b4cc922 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index f41ba1caa7c..bc01bfe0bb7 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1772,13 +1772,12 @@ static int arizona_validate_fll(struct arizona_fll *fll, static int arizona_calc_fll(struct arizona_fll *fll, struct arizona_fll_cfg *cfg, - unsigned int Fref, - unsigned int Fout) + unsigned int Fref) { unsigned int target, div, gcd_fll; int i, ratio; - arizona_fll_dbg(fll, "Fref=%u Fout=%u\n", Fref, Fout); + arizona_fll_dbg(fll, "Fref=%u Fout=%u\n", Fref, fll->fout); /* Fref must be <=13.5MHz */ div = 1; @@ -1796,12 +1795,12 @@ static int arizona_calc_fll(struct arizona_fll *fll, /* Fvco should be over the targt; don't check the upper bound */ div = ARIZONA_FLL_MIN_OUTDIV; - while (Fout * div < ARIZONA_FLL_MIN_FVCO * fll->vco_mult) { + while (fll->fout * div < ARIZONA_FLL_MIN_FVCO * fll->vco_mult) { div++; if (div > ARIZONA_FLL_MAX_OUTDIV) return -EINVAL; } - target = Fout * div / fll->vco_mult; + target = fll->fout * div / fll->vco_mult; cfg->outdiv = div; arizona_fll_dbg(fll, "Fvco=%dHz\n", target); @@ -1936,19 +1935,19 @@ static void arizona_enable_fll(struct arizona_fll *fll) */ if (fll->ref_src >= 0 && fll->ref_freq && fll->ref_src != fll->sync_src) { - arizona_calc_fll(fll, &cfg, fll->ref_freq, fll->fout); + arizona_calc_fll(fll, &cfg, fll->ref_freq); arizona_apply_fll(arizona, fll->base, &cfg, fll->ref_src, false); if (fll->sync_src >= 0) { - arizona_calc_fll(fll, &cfg, fll->sync_freq, fll->fout); + arizona_calc_fll(fll, &cfg, fll->sync_freq); arizona_apply_fll(arizona, fll->base + 0x10, &cfg, fll->sync_src, true); use_sync = true; } } else if (fll->sync_src >= 0) { - arizona_calc_fll(fll, &cfg, fll->sync_freq, fll->fout); + arizona_calc_fll(fll, &cfg, fll->sync_freq); arizona_apply_fll(arizona, fll->base, &cfg, fll->sync_src, false); From c6a3cfbf78bb210fb722d6e969a938c3b2014c60 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 30 Jan 2014 10:14:14 +0000 Subject: [PATCH 0267/1167] ASoC: arizona: Calculate OUTDIV first OUTDIV will remain unchanged whilst the rest of the FLL configuration is calculated so do this first. Change-Id: Iad0eb162de90f0210063c0142d537c5a07277aae Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index bc01bfe0bb7..9592a39d5f0 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1779,6 +1779,18 @@ static int arizona_calc_fll(struct arizona_fll *fll, arizona_fll_dbg(fll, "Fref=%u Fout=%u\n", Fref, fll->fout); + /* Fvco should be over the targt; don't check the upper bound */ + div = ARIZONA_FLL_MIN_OUTDIV; + while (fll->fout * div < ARIZONA_FLL_MIN_FVCO * fll->vco_mult) { + div++; + if (div > ARIZONA_FLL_MAX_OUTDIV) + return -EINVAL; + } + target = fll->fout * div / fll->vco_mult; + cfg->outdiv = div; + + arizona_fll_dbg(fll, "Fvco=%dHz\n", target); + /* Fref must be <=13.5MHz */ div = 1; cfg->refdiv = 0; @@ -1793,18 +1805,6 @@ static int arizona_calc_fll(struct arizona_fll *fll, /* Apply the division for our remaining calculations */ Fref /= div; - /* Fvco should be over the targt; don't check the upper bound */ - div = ARIZONA_FLL_MIN_OUTDIV; - while (fll->fout * div < ARIZONA_FLL_MIN_FVCO * fll->vco_mult) { - div++; - if (div > ARIZONA_FLL_MAX_OUTDIV) - return -EINVAL; - } - target = fll->fout * div / fll->vco_mult; - cfg->outdiv = div; - - arizona_fll_dbg(fll, "Fvco=%dHz\n", target); - /* Find an appropraite FLL_FRATIO and factor it out of the target */ for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) { if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) { From 48cfb8b9082ff0583644f15c72dc650b53e8532b Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 30 Jan 2014 10:18:41 +0000 Subject: [PATCH 0268/1167] ASoC: arizona: Calculate FLL gain last No part of the FLL calculation depends on the value determined for the gain but the gain does depend on other values. In preparation for future updates this patch moves the gain to be the last thing calculated. Change-Id: I1feaee217dee944627cffa37c956d34a1255da9d Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 9592a39d5f0..c52d2b7b168 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1820,18 +1820,6 @@ static int arizona_calc_fll(struct arizona_fll *fll, return -EINVAL; } - for (i = 0; i < ARRAY_SIZE(fll_gains); i++) { - if (fll_gains[i].min <= Fref && Fref <= fll_gains[i].max) { - cfg->gain = fll_gains[i].gain; - break; - } - } - if (i == ARRAY_SIZE(fll_gains)) { - arizona_fll_err(fll, "Unable to find gain for Fref=%uHz\n", - Fref); - return -EINVAL; - } - cfg->n = target / (ratio * Fref); if (target % (ratio * Fref)) { @@ -1855,6 +1843,18 @@ static int arizona_calc_fll(struct arizona_fll *fll, cfg->lambda >>= 1; } + for (i = 0; i < ARRAY_SIZE(fll_gains); i++) { + if (fll_gains[i].min <= Fref && Fref <= fll_gains[i].max) { + cfg->gain = fll_gains[i].gain; + break; + } + } + if (i == ARRAY_SIZE(fll_gains)) { + arizona_fll_err(fll, "Unable to find gain for Fref=%uHz\n", + Fref); + return -EINVAL; + } + arizona_fll_dbg(fll, "N=%x THETA=%x LAMBDA=%x\n", cfg->n, cfg->theta, cfg->lambda); arizona_fll_dbg(fll, "FRATIO_REF=%x(%d) FRATIO_SYNC=%x(%d)\n", From 6536ebbce1f66caa4163b3186b3dddbfb42fa741 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 30 Jan 2014 18:38:21 +0000 Subject: [PATCH 0269/1167] ASoC: arizona: Update fratio calculation to avoid integer mode The reference clock path on newer IP should avoid integer mode operation. This patch updates the fratio calculation to do so. Change-Id: I87292e86c9dae03313c423899c6a1ef979e0fc9c Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 184 +++++++++++++++++++++++-------------- 1 file changed, 114 insertions(+), 70 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index c52d2b7b168..aac685b83e9 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -53,8 +53,10 @@ #define ARIZONA_AIF_RX_ENABLES 0x1A #define ARIZONA_AIF_FORCE_WRITE 0x1B +#define ARIZONA_FLL_VCO_CORNER 141900000 #define ARIZONA_FLL_MAX_FREF 13500000 #define ARIZONA_FLL_MIN_FVCO 90000000 +#define ARIZONA_FLL_MAX_FRATIO 16 #define ARIZONA_FLL_MAX_REFDIV 8 #define ARIZONA_FLL_MIN_OUTDIV 2 #define ARIZONA_FLL_MAX_OUTDIV 7 @@ -1695,14 +1697,14 @@ static irqreturn_t arizona_fll_clock_ok(int irq, void *data) static struct { unsigned int min; unsigned int max; - u16 fratio[2]; + u16 fratio; int ratio; } fll_fratios[] = { - { 0, 64000, { 4, 0xf }, 16 }, - { 64000, 128000, { 3, 0x7 }, 8 }, - { 128000, 256000, { 2, 0x3 }, 4 }, - { 256000, 1000000, { 1, 0x1 }, 2 }, - { 1000000, 13500000, { 0, 0x0 }, 1 }, + { 0, 64000, 4, 16 }, + { 64000, 128000, 3, 8 }, + { 128000, 256000, 2, 4 }, + { 256000, 1000000, 1, 2 }, + { 1000000, 13500000, 0, 1 }, }; static struct { @@ -1721,32 +1723,10 @@ struct arizona_fll_cfg { int lambda; int refdiv; int outdiv; - int fratio_ref; - int fratio_sync; + int fratio; int gain; }; -static inline int arizona_fratio_ref(struct arizona *arizona, int i) -{ - switch (arizona->type) { - case WM8280: - case WM5110: - if (arizona->rev >= 3) - return fll_fratios[i].fratio[1]; - else - return fll_fratios[i].fratio[0]; - break; - - default: - return fll_fratios[i].fratio[0]; - } -} - -static inline int arizona_fratio_sync(struct arizona *arizona, int i) -{ - return fll_fratios[i].fratio[0]; -} - static int arizona_validate_fll(struct arizona_fll *fll, unsigned int Fref, unsigned int Fout) @@ -1770,9 +1750,100 @@ static int arizona_validate_fll(struct arizona_fll *fll, return 0; } +static int arizona_find_fratio(unsigned int Fref, int *fratio) +{ + int i; + + /* Find an appropriate FLL_FRATIO */ + for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) { + if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) { + if (fratio) + *fratio = fll_fratios[i].fratio; + return fll_fratios[i].ratio; + } + } + + return -EINVAL; +} + +static int arizona_calc_fratio(struct arizona_fll *fll, + struct arizona_fll_cfg *cfg, + unsigned int target, + unsigned int Fref, bool sync) +{ + int init_ratio, ratio; + int refdiv, div; + + /* Fref must be <=13.5MHz, find initial refdiv */ + div = 1; + cfg->refdiv = 0; + while (Fref > ARIZONA_FLL_MAX_FREF) { + div *= 2; + Fref /= 2; + cfg->refdiv++; + + if (div > ARIZONA_FLL_MAX_REFDIV) + return -EINVAL; + } + + /* Find an appropriate FLL_FRATIO */ + init_ratio = arizona_find_fratio(Fref, &cfg->fratio); + if (init_ratio < 0) { + arizona_fll_err(fll, "Unable to find FRATIO for Fref=%uHz\n", + Fref); + return init_ratio; + } + + switch (fll->arizona->type) { + case WM8280: + case WM5110: + if (fll->arizona->rev < 3 || sync) + return init_ratio; + break; + default: + return init_ratio; + } + + cfg->fratio = init_ratio - 1; + + /* Adjust FRATIO/refdiv to avoid integer mode if possible */ + refdiv = cfg->refdiv; + + while (div <= ARIZONA_FLL_MAX_REFDIV) { + for (ratio = init_ratio; ratio <= ARIZONA_FLL_MAX_FRATIO; + ratio++) { + if (target % (ratio * Fref)) { + cfg->refdiv = refdiv; + cfg->fratio = ratio - 1; + return ratio; + } + } + + for (ratio = init_ratio - 1; ratio >= 0; ratio--) { + if (ARIZONA_FLL_VCO_CORNER / (fll->vco_mult * ratio) < + Fref) + break; + + if (target % (ratio * Fref)) { + cfg->refdiv = refdiv; + cfg->fratio = ratio - 1; + return ratio; + } + } + + div *= 2; + Fref /= 2; + refdiv++; + init_ratio = arizona_find_fratio(Fref, NULL); + } + + arizona_fll_warn(fll, "Falling back to integer mode operation\n"); + return cfg->fratio + 1; +} + static int arizona_calc_fll(struct arizona_fll *fll, struct arizona_fll_cfg *cfg, - unsigned int Fref) + unsigned int Fref, bool sync) { unsigned int target, div, gcd_fll; int i, ratio; @@ -1791,34 +1862,13 @@ static int arizona_calc_fll(struct arizona_fll *fll, arizona_fll_dbg(fll, "Fvco=%dHz\n", target); - /* Fref must be <=13.5MHz */ - div = 1; - cfg->refdiv = 0; - while ((Fref / div) > ARIZONA_FLL_MAX_FREF) { - div *= 2; - cfg->refdiv++; - - if (div > ARIZONA_FLL_MAX_REFDIV) - return -EINVAL; - } + /* Find an appropriate FLL_FRATIO and refdiv */ + ratio = arizona_calc_fratio(fll, cfg, target, Fref, sync); + if (ratio < 0) + return ratio; /* Apply the division for our remaining calculations */ - Fref /= div; - - /* Find an appropraite FLL_FRATIO and factor it out of the target */ - for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) { - if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) { - cfg->fratio_ref = arizona_fratio_ref(fll->arizona, i); - cfg->fratio_sync = arizona_fratio_sync(fll->arizona, i); - ratio = fll_fratios[i].ratio; - break; - } - } - if (i == ARRAY_SIZE(fll_fratios)) { - arizona_fll_err(fll, "Unable to find FRATIO for Fref=%uHz\n", - Fref); - return -EINVAL; - } + Fref = Fref / (1 << cfg->refdiv); cfg->n = target / (ratio * Fref); @@ -1857,11 +1907,8 @@ static int arizona_calc_fll(struct arizona_fll *fll, arizona_fll_dbg(fll, "N=%x THETA=%x LAMBDA=%x\n", cfg->n, cfg->theta, cfg->lambda); - arizona_fll_dbg(fll, "FRATIO_REF=%x(%d) FRATIO_SYNC=%x(%d)\n", - cfg->fratio_ref, cfg->fratio_ref, - cfg->fratio_sync, cfg->fratio_sync); - arizona_fll_dbg(fll, "OUTDIV=%x REFCLK_DIV=%x\n", - cfg->outdiv, cfg->refdiv); + arizona_fll_dbg(fll, "FRATIO=%x(%d) OUTDIV=%x REFCLK_DIV=%x\n", + cfg->fratio, cfg->fratio, cfg->outdiv, cfg->refdiv); arizona_fll_dbg(fll, "GAIN=%d\n", cfg->gain); return 0; @@ -1876,6 +1923,9 @@ static void arizona_apply_fll(struct arizona *arizona, unsigned int base, ARIZONA_FLL1_THETA_MASK, cfg->theta); regmap_update_bits(arizona->regmap, base + 4, ARIZONA_FLL1_LAMBDA_MASK, cfg->lambda); + regmap_update_bits(arizona->regmap, base + 5, + ARIZONA_FLL1_FRATIO_MASK, + cfg->fratio << ARIZONA_FLL1_FRATIO_SHIFT); regmap_update_bits(arizona->regmap, base + 6, ARIZONA_FLL1_CLK_REF_DIV_MASK | ARIZONA_FLL1_CLK_REF_SRC_MASK, @@ -1883,16 +1933,10 @@ static void arizona_apply_fll(struct arizona *arizona, unsigned int base, source << ARIZONA_FLL1_CLK_REF_SRC_SHIFT); if (sync) { - regmap_update_bits(arizona->regmap, base + 5, - ARIZONA_FLL1_FRATIO_MASK, - cfg->fratio_sync << ARIZONA_FLL1_FRATIO_SHIFT); regmap_update_bits(arizona->regmap, base + 0x7, ARIZONA_FLL1_GAIN_MASK, cfg->gain << ARIZONA_FLL1_GAIN_SHIFT); } else { - regmap_update_bits(arizona->regmap, base + 5, - ARIZONA_FLL1_FRATIO_MASK, - cfg->fratio_ref << ARIZONA_FLL1_FRATIO_SHIFT); regmap_update_bits(arizona->regmap, base + 0x5, ARIZONA_FLL1_OUTDIV_MASK, cfg->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT); @@ -1935,19 +1979,19 @@ static void arizona_enable_fll(struct arizona_fll *fll) */ if (fll->ref_src >= 0 && fll->ref_freq && fll->ref_src != fll->sync_src) { - arizona_calc_fll(fll, &cfg, fll->ref_freq); + arizona_calc_fll(fll, &cfg, fll->ref_freq, false); arizona_apply_fll(arizona, fll->base, &cfg, fll->ref_src, false); if (fll->sync_src >= 0) { - arizona_calc_fll(fll, &cfg, fll->sync_freq); + arizona_calc_fll(fll, &cfg, fll->sync_freq, true); arizona_apply_fll(arizona, fll->base + 0x10, &cfg, fll->sync_src, true); use_sync = true; } } else if (fll->sync_src >= 0) { - arizona_calc_fll(fll, &cfg, fll->sync_freq); + arizona_calc_fll(fll, &cfg, fll->sync_freq, false); arizona_apply_fll(arizona, fll->base, &cfg, fll->sync_src, false); From 6360fc9136176badfa04b33309ff27a783495503 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 13 Jun 2013 09:43:29 +0100 Subject: [PATCH 0270/1167] mfd: arizona: Integrate wm8997 into Arizona mfd The wm8997 is a compact, high-performance audio hub CODEC with SLIMbus interfacing, for smartphones, tablets and other portable audio devices based on the Arizona platform. This patch integrates the wm8997 into the Arizona mfd. Signed-off-by: Charles Keepax Signed-off-by: Samuel Ortiz (cherry picked from commit dc7d48635dd3c3fd5360238f7d2c697ff13abe7b) Signed-off-by: Charles Keepax --- drivers/mfd/Kconfig | 6 + drivers/mfd/Makefile | 3 + drivers/mfd/arizona-core.c | 28 + drivers/mfd/arizona-i2c.c | 6 + drivers/mfd/arizona-irq.c | 8 + drivers/mfd/arizona.h | 5 + drivers/mfd/wm8997-tables.c | 1525 ++++++++++++++++++++++++++++++ include/linux/mfd/arizona/core.h | 2 + 8 files changed, 1583 insertions(+) create mode 100644 drivers/mfd/wm8997-tables.c diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 65f94d8d495..05d070ca3c0 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1047,6 +1047,12 @@ config MFD_FLORIDA Support for Wolfson Microelectronics Florida class low power audio SoC such as the WM8280 +config MFD_WM8997 + bool "Support Wolfson Microelectronics WM8997" + depends on MFD_ARIZONA + help + Support for Wolfson Microelectronics WM8997 low power audio SoC + config MFD_WM8400 bool "Wolfson Microelectronics WM8400" select MFD_CORE diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index d026173af5f..7ce876bf52c 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -43,6 +43,9 @@ endif ifneq ($(CONFIG_MFD_FLORIDA),n) obj-$(CONFIG_MFD_ARIZONA) += florida-tables.o endif +ifneq ($(CONFIG_MFD_WM8997),n) +obj-$(CONFIG_MFD_ARIZONA) += wm8997-tables.o +endif obj-$(CONFIG_MFD_WM8400) += wm8400-core.o wm831x-objs := wm831x-core.o wm831x-irq.o wm831x-otp.o wm831x-objs += wm831x-auxadc.o diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 352118d15b3..1b731883148 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -844,6 +844,7 @@ const struct of_device_id arizona_of_match[] = { { .compatible = "wlf,wm5102", .data = (void *)WM5102 }, { .compatible = "wlf,wm8280", .data = (void *)WM8280 }, { .compatible = "wlf,wm5110", .data = (void *)WM5110 }, + { .compatible = "wlf,wm8997", .data = (void *)WM8997 }, {}, }; EXPORT_SYMBOL_GPL(arizona_of_match); @@ -876,6 +877,15 @@ static struct mfd_cell florida_devs[] = { { .name = "florida-codec" }, }; +static struct mfd_cell wm8997_devs[] = { + { .name = "arizona-micsupp" }, + { .name = "arizona-extcon" }, + { .name = "arizona-gpio" }, + { .name = "arizona-haptics" }, + { .name = "arizona-pwm" }, + { .name = "wm8997-codec" }, +}; + int arizona_dev_init(struct arizona *arizona) { struct device *dev = arizona->dev; @@ -900,6 +910,7 @@ int arizona_dev_init(struct arizona *arizona) case WM5102: case WM5110: case WM8280: + case WM8997: for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) arizona->core_supplies[i].supply = wm5102_core_supplies[i]; @@ -984,6 +995,7 @@ int arizona_dev_init(struct arizona *arizona) switch (reg) { case 0x5102: case 0x5110: + case 0x8997: break; default: dev_err(arizona->dev, "Unknown device ID: %x\n", reg); @@ -1078,6 +1090,18 @@ int arizona_dev_init(struct arizona *arizona) } apply_patch = florida_patch; break; +#endif +#ifdef CONFIG_MFD_WM8997 + case 0x8997: + type_name = "WM8997"; + revision_char = arizona->rev + 'A'; + if (arizona->type != WM8997) { + dev_err(arizona->dev, "WM8997 registered as %d\n", + arizona->type); + arizona->type = WM8997; + } + apply_patch = wm8997_patch; + break; #endif default: dev_err(arizona->dev, "Unknown device ID %x\n", reg); @@ -1256,6 +1280,10 @@ int arizona_dev_init(struct arizona *arizona) ret = mfd_add_devices(arizona->dev, -1, florida_devs, ARRAY_SIZE(florida_devs), NULL, 0, NULL); break; + case WM8997: + ret = mfd_add_devices(arizona->dev, -1, wm8997_devs, + ARRAY_SIZE(wm8997_devs), NULL, 0, NULL); + break; } if (ret != 0) { diff --git a/drivers/mfd/arizona-i2c.c b/drivers/mfd/arizona-i2c.c index 391b7c5a416..b402f9f11ec 100644 --- a/drivers/mfd/arizona-i2c.c +++ b/drivers/mfd/arizona-i2c.c @@ -45,6 +45,11 @@ static int arizona_i2c_probe(struct i2c_client *i2c, case WM5110: regmap_config = &florida_i2c_regmap; break; +#endif +#ifdef CONFIG_MFD_WM8997 + case WM8997: + regmap_config = &wm8997_i2c_regmap; + break; #endif default: dev_err(&i2c->dev, "Unknown device type %ld\n", @@ -82,6 +87,7 @@ static const struct i2c_device_id arizona_i2c_id[] = { { "wm5102", WM5102 }, { "wm8280", WM8280 }, { "wm5110", WM5110 }, + { "wm8997", WM8997 }, { } }; MODULE_DEVICE_TABLE(i2c, arizona_i2c_id); diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index ea92f117316..7d8baaf3f17 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -209,6 +209,14 @@ int arizona_irq_init(struct arizona *arizona) ctrlif_error = false; break; #endif +#ifdef CONFIG_MFD_WM8997 + case WM8997: + aod = &wm8997_aod; + irq = &wm8997_irq; + + ctrlif_error = false; + break; +#endif default: BUG_ON("Unknown Arizona class device" == NULL); return -EINVAL; diff --git a/drivers/mfd/arizona.h b/drivers/mfd/arizona.h index 7a82689cc17..0443fe92e14 100644 --- a/drivers/mfd/arizona.h +++ b/drivers/mfd/arizona.h @@ -25,6 +25,8 @@ extern const struct regmap_config wm5102_spi_regmap; extern const struct regmap_config florida_i2c_regmap; extern const struct regmap_config florida_spi_regmap; +extern const struct regmap_config wm8997_i2c_regmap; + extern const struct dev_pm_ops arizona_pm_ops; extern const struct of_device_id arizona_of_match[]; @@ -35,6 +37,9 @@ extern const struct regmap_irq_chip wm5102_irq; extern const struct regmap_irq_chip florida_aod; extern const struct regmap_irq_chip florida_irq; +extern const struct regmap_irq_chip wm8997_aod; +extern const struct regmap_irq_chip wm8997_irq; + int arizona_dev_init(struct arizona *arizona); int arizona_dev_exit(struct arizona *arizona); int arizona_irq_init(struct arizona *arizona); diff --git a/drivers/mfd/wm8997-tables.c b/drivers/mfd/wm8997-tables.c new file mode 100644 index 00000000000..5aa80768777 --- /dev/null +++ b/drivers/mfd/wm8997-tables.c @@ -0,0 +1,1525 @@ +/* + * wm8997-tables.c -- WM8997 data tables + * + * Copyright 2012 Wolfson Microelectronics plc + * + * Author: Charles Keepax + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include + +#include +#include + +#include "arizona.h" + +static const struct reg_default wm8997_reva_patch[] = { + { 0x80, 0x0003 }, + { 0x214, 0x0008 }, + { 0x458, 0x0000 }, + { 0x0081, 0xE022 }, + { 0x294, 0x0000 }, + { 0x80, 0x0000 }, + { 0x171, 0x0000 }, +}; + +/* We use a function so we can use ARRAY_SIZE() */ +int wm8997_patch(struct arizona *arizona) +{ + switch (arizona->rev) { + case 0: + return regmap_register_patch(arizona->regmap, + wm8997_reva_patch, + ARRAY_SIZE(wm8997_reva_patch)); + default: + return 0; + } +} +EXPORT_SYMBOL_GPL(wm8997_patch); + +static const struct regmap_irq wm8997_aod_irqs[ARIZONA_NUM_IRQ] = { + [ARIZONA_IRQ_GP5_FALL] = { .mask = ARIZONA_GP5_FALL_EINT1 }, + [ARIZONA_IRQ_GP5_RISE] = { .mask = ARIZONA_GP5_RISE_EINT1 }, + [ARIZONA_IRQ_JD_FALL] = { .mask = ARIZONA_JD1_FALL_EINT1 }, + [ARIZONA_IRQ_JD_RISE] = { .mask = ARIZONA_JD1_RISE_EINT1 }, +}; + +const struct regmap_irq_chip wm8997_aod = { + .name = "wm8997 AOD", + .status_base = ARIZONA_AOD_IRQ1, + .mask_base = ARIZONA_AOD_IRQ_MASK_IRQ1, + .ack_base = ARIZONA_AOD_IRQ1, + .num_regs = 1, + .irqs = wm8997_aod_irqs, + .num_irqs = ARRAY_SIZE(wm8997_aod_irqs), +}; +EXPORT_SYMBOL_GPL(wm8997_aod); + +static const struct regmap_irq wm8997_irqs[ARIZONA_NUM_IRQ] = { + [ARIZONA_IRQ_GP4] = { .reg_offset = 0, .mask = ARIZONA_GP4_EINT1 }, + [ARIZONA_IRQ_GP3] = { .reg_offset = 0, .mask = ARIZONA_GP3_EINT1 }, + [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 }, + [ARIZONA_IRQ_GP1] = { .reg_offset = 0, .mask = ARIZONA_GP1_EINT1 }, + + [ARIZONA_IRQ_SPK_SHUTDOWN_WARN] = { + .reg_offset = 2, .mask = ARIZONA_SPK_SHUTDOWN_WARN_EINT1 + }, + [ARIZONA_IRQ_SPK_SHUTDOWN] = { + .reg_offset = 2, .mask = ARIZONA_SPK_SHUTDOWN_EINT1 + }, + [ARIZONA_IRQ_HPDET] = { + .reg_offset = 2, .mask = ARIZONA_HPDET_EINT1 + }, + [ARIZONA_IRQ_MICDET] = { + .reg_offset = 2, .mask = ARIZONA_MICDET_EINT1 + }, + [ARIZONA_IRQ_WSEQ_DONE] = { + .reg_offset = 2, .mask = ARIZONA_WSEQ_DONE_EINT1 + }, + [ARIZONA_IRQ_DRC1_SIG_DET] = { + .reg_offset = 2, .mask = ARIZONA_DRC1_SIG_DET_EINT1 + }, + [ARIZONA_IRQ_UNDERCLOCKED] = { + .reg_offset = 2, .mask = ARIZONA_UNDERCLOCKED_EINT1 + }, + [ARIZONA_IRQ_OVERCLOCKED] = { + .reg_offset = 2, .mask = ARIZONA_OVERCLOCKED_EINT1 + }, + [ARIZONA_IRQ_FLL2_LOCK] = { + .reg_offset = 2, .mask = ARIZONA_FLL2_LOCK_EINT1 + }, + [ARIZONA_IRQ_FLL1_LOCK] = { + .reg_offset = 2, .mask = ARIZONA_FLL1_LOCK_EINT1 + }, + [ARIZONA_IRQ_CLKGEN_ERR] = { + .reg_offset = 2, .mask = ARIZONA_CLKGEN_ERR_EINT1 + }, + [ARIZONA_IRQ_CLKGEN_ERR_ASYNC] = { + .reg_offset = 2, .mask = ARIZONA_CLKGEN_ERR_ASYNC_EINT1 + }, + + [ARIZONA_IRQ_AIF2_ERR] = { + .reg_offset = 3, .mask = ARIZONA_AIF2_ERR_EINT1 + }, + [ARIZONA_IRQ_AIF1_ERR] = { + .reg_offset = 3, .mask = ARIZONA_AIF1_ERR_EINT1 + }, + [ARIZONA_IRQ_CTRLIF_ERR] = { + .reg_offset = 3, .mask = ARIZONA_CTRLIF_ERR_EINT1 + }, + [ARIZONA_IRQ_MIXER_DROPPED_SAMPLES] = { + .reg_offset = 3, .mask = ARIZONA_MIXER_DROPPED_SAMPLE_EINT1 + }, + [ARIZONA_IRQ_ASYNC_CLK_ENA_LOW] = { + .reg_offset = 3, .mask = ARIZONA_ASYNC_CLK_ENA_LOW_EINT1 + }, + [ARIZONA_IRQ_SYSCLK_ENA_LOW] = { + .reg_offset = 3, .mask = ARIZONA_SYSCLK_ENA_LOW_EINT1 + }, + [ARIZONA_IRQ_ISRC1_CFG_ERR] = { + .reg_offset = 3, .mask = ARIZONA_ISRC1_CFG_ERR_EINT1 + }, + [ARIZONA_IRQ_ISRC2_CFG_ERR] = { + .reg_offset = 3, .mask = ARIZONA_ISRC2_CFG_ERR_EINT1 + }, + + [ARIZONA_IRQ_BOOT_DONE] = { + .reg_offset = 4, .mask = ARIZONA_BOOT_DONE_EINT1 + }, + [ARIZONA_IRQ_DCS_DAC_DONE] = { + .reg_offset = 4, .mask = ARIZONA_DCS_DAC_DONE_EINT1 + }, + [ARIZONA_IRQ_DCS_HP_DONE] = { + .reg_offset = 4, .mask = ARIZONA_DCS_HP_DONE_EINT1 + }, + [ARIZONA_IRQ_FLL2_CLOCK_OK] = { + .reg_offset = 4, .mask = ARIZONA_FLL2_CLOCK_OK_EINT1 + }, + [ARIZONA_IRQ_FLL1_CLOCK_OK] = { + .reg_offset = 4, .mask = ARIZONA_FLL1_CLOCK_OK_EINT1 + }, +}; + +const struct regmap_irq_chip wm8997_irq = { + .name = "wm8997 IRQ", + .status_base = ARIZONA_INTERRUPT_STATUS_1, + .mask_base = ARIZONA_INTERRUPT_STATUS_1_MASK, + .ack_base = ARIZONA_INTERRUPT_STATUS_1, + .num_regs = 5, + .irqs = wm8997_irqs, + .num_irqs = ARRAY_SIZE(wm8997_irqs), +}; +EXPORT_SYMBOL_GPL(wm8997_irq); + +static const struct reg_default wm8997_reg_default[] = { + { 0x00000009, 0x0001 }, /* R9 - Ctrl IF I2C1 CFG 1 */ + { 0x00000016, 0x0000 }, /* R22 - Write Sequencer Ctrl 0 */ + { 0x00000017, 0x0000 }, /* R23 - Write Sequencer Ctrl 1 */ + { 0x00000018, 0x0000 }, /* R24 - Write Sequencer Ctrl 2 */ + { 0x00000020, 0x0000 }, /* R32 - Tone Generator 1 */ + { 0x00000021, 0x1000 }, /* R33 - Tone Generator 2 */ + { 0x00000022, 0x0000 }, /* R34 - Tone Generator 3 */ + { 0x00000023, 0x1000 }, /* R35 - Tone Generator 4 */ + { 0x00000024, 0x0000 }, /* R36 - Tone Generator 5 */ + { 0x00000030, 0x0000 }, /* R48 - PWM Drive 1 */ + { 0x00000031, 0x0100 }, /* R49 - PWM Drive 2 */ + { 0x00000032, 0x0100 }, /* R50 - PWM Drive 3 */ + { 0x00000040, 0x0000 }, /* R64 - Wake control */ + { 0x00000041, 0x0000 }, /* R65 - Sequence control */ + { 0x00000061, 0x01FF }, /* R97 - Sample Rate Sequence Select 1 */ + { 0x00000062, 0x01FF }, /* R98 - Sample Rate Sequence Select 2 */ + { 0x00000063, 0x01FF }, /* R99 - Sample Rate Sequence Select 3 */ + { 0x00000064, 0x01FF }, /* R100 - Sample Rate Sequence Select 4 */ + { 0x00000068, 0x01FF }, /* R104 - Always On Triggers Sequence Select 1 */ + { 0x00000069, 0x01FF }, /* R105 - Always On Triggers Sequence Select 2 */ + { 0x0000006A, 0x01FF }, /* R106 - Always On Triggers Sequence Select 3 */ + { 0x0000006B, 0x01FF }, /* R107 - Always On Triggers Sequence Select 4 */ + { 0x00000070, 0x0000 }, /* R112 - Comfort Noise Generator */ + { 0x00000090, 0x0000 }, /* R144 - Haptics Control 1 */ + { 0x00000091, 0x7FFF }, /* R145 - Haptics Control 2 */ + { 0x00000092, 0x0000 }, /* R146 - Haptics phase 1 intensity */ + { 0x00000093, 0x0000 }, /* R147 - Haptics phase 1 duration */ + { 0x00000094, 0x0000 }, /* R148 - Haptics phase 2 intensity */ + { 0x00000095, 0x0000 }, /* R149 - Haptics phase 2 duration */ + { 0x00000096, 0x0000 }, /* R150 - Haptics phase 3 intensity */ + { 0x00000097, 0x0000 }, /* R151 - Haptics phase 3 duration */ + { 0x00000100, 0x0002 }, /* R256 - Clock 32k 1 */ + { 0x00000101, 0x0304 }, /* R257 - System Clock 1 */ + { 0x00000102, 0x0011 }, /* R258 - Sample rate 1 */ + { 0x00000103, 0x0011 }, /* R259 - Sample rate 2 */ + { 0x00000104, 0x0011 }, /* R260 - Sample rate 3 */ + { 0x00000112, 0x0305 }, /* R274 - Async clock 1 */ + { 0x00000113, 0x0011 }, /* R275 - Async sample rate 1 */ + { 0x00000149, 0x0000 }, /* R329 - Output system clock */ + { 0x0000014A, 0x0000 }, /* R330 - Output async clock */ + { 0x00000152, 0x0000 }, /* R338 - Rate Estimator 1 */ + { 0x00000153, 0x0000 }, /* R339 - Rate Estimator 2 */ + { 0x00000154, 0x0000 }, /* R340 - Rate Estimator 3 */ + { 0x00000155, 0x0000 }, /* R341 - Rate Estimator 4 */ + { 0x00000156, 0x0000 }, /* R342 - Rate Estimator 5 */ + { 0x00000161, 0x0000 }, /* R353 - Dynamic Frequency Scaling 1 */ + { 0x00000171, 0x0000 }, /* R369 - FLL1 Control 1 */ + { 0x00000172, 0x0008 }, /* R370 - FLL1 Control 2 */ + { 0x00000173, 0x0018 }, /* R371 - FLL1 Control 3 */ + { 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */ + { 0x00000175, 0x0004 }, /* R373 - FLL1 Control 5 */ + { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */ + { 0x00000177, 0x0181 }, /* R375 - FLL1 Loop Filter Test 1 */ + { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */ + { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */ + { 0x00000183, 0x0000 }, /* R387 - FLL1 Synchroniser 3 */ + { 0x00000184, 0x0000 }, /* R388 - FLL1 Synchroniser 4 */ + { 0x00000185, 0x0000 }, /* R389 - FLL1 Synchroniser 5 */ + { 0x00000186, 0x0000 }, /* R390 - FLL1 Synchroniser 6 */ + { 0x00000189, 0x0000 }, /* R393 - FLL1 Spread Spectrum */ + { 0x0000018A, 0x0004 }, /* R394 - FLL1 GPIO Clock */ + { 0x00000191, 0x0000 }, /* R401 - FLL2 Control 1 */ + { 0x00000192, 0x0008 }, /* R402 - FLL2 Control 2 */ + { 0x00000193, 0x0018 }, /* R403 - FLL2 Control 3 */ + { 0x00000194, 0x007D }, /* R404 - FLL2 Control 4 */ + { 0x00000195, 0x0004 }, /* R405 - FLL2 Control 5 */ + { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */ + { 0x00000197, 0x0000 }, /* R407 - FLL2 Loop Filter Test 1 */ + { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */ + { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */ + { 0x000001A3, 0x0000 }, /* R419 - FLL2 Synchroniser 3 */ + { 0x000001A4, 0x0000 }, /* R420 - FLL2 Synchroniser 4 */ + { 0x000001A5, 0x0000 }, /* R421 - FLL2 Synchroniser 5 */ + { 0x000001A6, 0x0000 }, /* R422 - FLL2 Synchroniser 6 */ + { 0x000001A9, 0x0000 }, /* R425 - FLL2 Spread Spectrum */ + { 0x000001AA, 0x0004 }, /* R426 - FLL2 GPIO Clock */ + { 0x00000200, 0x0006 }, /* R512 - Mic Charge Pump 1 */ + { 0x00000210, 0x00D4 }, /* R528 - LDO1 Control 1 */ + { 0x00000212, 0x0000 }, /* R530 - LDO1 Control 2 */ + { 0x00000213, 0x0344 }, /* R531 - LDO2 Control 1 */ + { 0x00000218, 0x01A6 }, /* R536 - Mic Bias Ctrl 1 */ + { 0x00000219, 0x01A6 }, /* R537 - Mic Bias Ctrl 2 */ + { 0x0000021A, 0x01A6 }, /* R538 - Mic Bias Ctrl 3 */ + { 0x00000293, 0x0000 }, /* R659 - Accessory Detect Mode 1 */ + { 0x0000029B, 0x0020 }, /* R667 - Headphone Detect 1 */ + { 0x000002A3, 0x1102 }, /* R675 - Mic Detect 1 */ + { 0x000002A4, 0x009F }, /* R676 - Mic Detect 2 */ + { 0x000002A5, 0x0000 }, /* R677 - Mic Detect 3 */ + { 0x000002C3, 0x0000 }, /* R707 - Mic noise mix control 1 */ + { 0x000002CB, 0x0000 }, /* R715 - Isolation control */ + { 0x000002D3, 0x0000 }, /* R723 - Jack detect analogue */ + { 0x00000300, 0x0000 }, /* R768 - Input Enables */ + { 0x00000308, 0x0000 }, /* R776 - Input Rate */ + { 0x00000309, 0x0022 }, /* R777 - Input Volume Ramp */ + { 0x00000310, 0x2080 }, /* R784 - IN1L Control */ + { 0x00000311, 0x0180 }, /* R785 - ADC Digital Volume 1L */ + { 0x00000312, 0x0000 }, /* R786 - DMIC1L Control */ + { 0x00000314, 0x0080 }, /* R788 - IN1R Control */ + { 0x00000315, 0x0180 }, /* R789 - ADC Digital Volume 1R */ + { 0x00000316, 0x0000 }, /* R790 - DMIC1R Control */ + { 0x00000318, 0x2080 }, /* R792 - IN2L Control */ + { 0x00000319, 0x0180 }, /* R793 - ADC Digital Volume 2L */ + { 0x0000031A, 0x0000 }, /* R794 - DMIC2L Control */ + { 0x0000031C, 0x0080 }, /* R796 - IN2R Control */ + { 0x0000031D, 0x0180 }, /* R797 - ADC Digital Volume 2R */ + { 0x0000031E, 0x0000 }, /* R798 - DMIC2R Control */ + { 0x00000400, 0x0000 }, /* R1024 - Output Enables 1 */ + { 0x00000408, 0x0000 }, /* R1032 - Output Rate 1 */ + { 0x00000409, 0x0022 }, /* R1033 - Output Volume Ramp */ + { 0x00000410, 0x0080 }, /* R1040 - Output Path Config 1L */ + { 0x00000411, 0x0180 }, /* R1041 - DAC Digital Volume 1L */ + { 0x00000412, 0x0080 }, /* R1042 - DAC Volume Limit 1L */ + { 0x00000413, 0x0001 }, /* R1043 - Noise Gate Select 1L */ + { 0x00000414, 0x0080 }, /* R1044 - Output Path Config 1R */ + { 0x00000415, 0x0180 }, /* R1045 - DAC Digital Volume 1R */ + { 0x00000416, 0x0080 }, /* R1046 - DAC Volume Limit 1R */ + { 0x00000417, 0x0002 }, /* R1047 - Noise Gate Select 1R */ + { 0x00000420, 0x0080 }, /* R1056 - Output Path Config 3L */ + { 0x00000421, 0x0180 }, /* R1057 - DAC Digital Volume 3L */ + { 0x00000422, 0x0080 }, /* R1058 - DAC Volume Limit 3L */ + { 0x00000423, 0x0010 }, /* R1059 - Noise Gate Select 3L */ + { 0x00000428, 0x0000 }, /* R1064 - Output Path Config 4L */ + { 0x00000429, 0x0180 }, /* R1065 - DAC Digital Volume 4L */ + { 0x0000042A, 0x0080 }, /* R1066 - Out Volume 4L */ + { 0x0000042B, 0x0040 }, /* R1067 - Noise Gate Select 4L */ + { 0x00000430, 0x0000 }, /* R1072 - Output Path Config 5L */ + { 0x00000431, 0x0180 }, /* R1073 - DAC Digital Volume 5L */ + { 0x00000432, 0x0080 }, /* R1074 - DAC Volume Limit 5L */ + { 0x00000433, 0x0100 }, /* R1075 - Noise Gate Select 5L */ + { 0x00000435, 0x0180 }, /* R1077 - DAC Digital Volume 5R */ + { 0x00000436, 0x0080 }, /* R1078 - DAC Volume Limit 5R */ + { 0x00000437, 0x0200 }, /* R1079 - Noise Gate Select 5R */ + { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */ + { 0x00000458, 0x0000 }, /* R1112 - Noise Gate Control */ + { 0x00000490, 0x0069 }, /* R1168 - PDM SPK1 CTRL 1 */ + { 0x00000491, 0x0000 }, /* R1169 - PDM SPK1 CTRL 2 */ + { 0x00000500, 0x000C }, /* R1280 - AIF1 BCLK Ctrl */ + { 0x00000501, 0x0008 }, /* R1281 - AIF1 Tx Pin Ctrl */ + { 0x00000502, 0x0000 }, /* R1282 - AIF1 Rx Pin Ctrl */ + { 0x00000503, 0x0000 }, /* R1283 - AIF1 Rate Ctrl */ + { 0x00000504, 0x0000 }, /* R1284 - AIF1 Format */ + { 0x00000505, 0x0040 }, /* R1285 - AIF1 Tx BCLK Rate */ + { 0x00000506, 0x0040 }, /* R1286 - AIF1 Rx BCLK Rate */ + { 0x00000507, 0x1818 }, /* R1287 - AIF1 Frame Ctrl 1 */ + { 0x00000508, 0x1818 }, /* R1288 - AIF1 Frame Ctrl 2 */ + { 0x00000509, 0x0000 }, /* R1289 - AIF1 Frame Ctrl 3 */ + { 0x0000050A, 0x0001 }, /* R1290 - AIF1 Frame Ctrl 4 */ + { 0x0000050B, 0x0002 }, /* R1291 - AIF1 Frame Ctrl 5 */ + { 0x0000050C, 0x0003 }, /* R1292 - AIF1 Frame Ctrl 6 */ + { 0x0000050D, 0x0004 }, /* R1293 - AIF1 Frame Ctrl 7 */ + { 0x0000050E, 0x0005 }, /* R1294 - AIF1 Frame Ctrl 8 */ + { 0x0000050F, 0x0006 }, /* R1295 - AIF1 Frame Ctrl 9 */ + { 0x00000510, 0x0007 }, /* R1296 - AIF1 Frame Ctrl 10 */ + { 0x00000511, 0x0000 }, /* R1297 - AIF1 Frame Ctrl 11 */ + { 0x00000512, 0x0001 }, /* R1298 - AIF1 Frame Ctrl 12 */ + { 0x00000513, 0x0002 }, /* R1299 - AIF1 Frame Ctrl 13 */ + { 0x00000514, 0x0003 }, /* R1300 - AIF1 Frame Ctrl 14 */ + { 0x00000515, 0x0004 }, /* R1301 - AIF1 Frame Ctrl 15 */ + { 0x00000516, 0x0005 }, /* R1302 - AIF1 Frame Ctrl 16 */ + { 0x00000517, 0x0006 }, /* R1303 - AIF1 Frame Ctrl 17 */ + { 0x00000518, 0x0007 }, /* R1304 - AIF1 Frame Ctrl 18 */ + { 0x00000519, 0x0000 }, /* R1305 - AIF1 Tx Enables */ + { 0x0000051A, 0x0000 }, /* R1306 - AIF1 Rx Enables */ + { 0x00000540, 0x000C }, /* R1344 - AIF2 BCLK Ctrl */ + { 0x00000541, 0x0008 }, /* R1345 - AIF2 Tx Pin Ctrl */ + { 0x00000542, 0x0000 }, /* R1346 - AIF2 Rx Pin Ctrl */ + { 0x00000543, 0x0000 }, /* R1347 - AIF2 Rate Ctrl */ + { 0x00000544, 0x0000 }, /* R1348 - AIF2 Format */ + { 0x00000545, 0x0040 }, /* R1349 - AIF2 Tx BCLK Rate */ + { 0x00000546, 0x0040 }, /* R1350 - AIF2 Rx BCLK Rate */ + { 0x00000547, 0x1818 }, /* R1351 - AIF2 Frame Ctrl 1 */ + { 0x00000548, 0x1818 }, /* R1352 - AIF2 Frame Ctrl 2 */ + { 0x00000549, 0x0000 }, /* R1353 - AIF2 Frame Ctrl 3 */ + { 0x0000054A, 0x0001 }, /* R1354 - AIF2 Frame Ctrl 4 */ + { 0x00000551, 0x0000 }, /* R1361 - AIF2 Frame Ctrl 11 */ + { 0x00000552, 0x0001 }, /* R1362 - AIF2 Frame Ctrl 12 */ + { 0x00000559, 0x0000 }, /* R1369 - AIF2 Tx Enables */ + { 0x0000055A, 0x0000 }, /* R1370 - AIF2 Rx Enables */ + { 0x000005E3, 0x0004 }, /* R1507 - SLIMbus Framer Ref Gear */ + { 0x000005E5, 0x0000 }, /* R1509 - SLIMbus Rates 1 */ + { 0x000005E6, 0x0000 }, /* R1510 - SLIMbus Rates 2 */ + { 0x000005E7, 0x0000 }, /* R1511 - SLIMbus Rates 3 */ + { 0x000005E8, 0x0000 }, /* R1512 - SLIMbus Rates 4 */ + { 0x000005E9, 0x0000 }, /* R1513 - SLIMbus Rates 5 */ + { 0x000005EA, 0x0000 }, /* R1514 - SLIMbus Rates 6 */ + { 0x000005EB, 0x0000 }, /* R1515 - SLIMbus Rates 7 */ + { 0x000005EC, 0x0000 }, /* R1516 - SLIMbus Rates 8 */ + { 0x000005F5, 0x0000 }, /* R1525 - SLIMbus RX Channel Enable */ + { 0x000005F6, 0x0000 }, /* R1526 - SLIMbus TX Channel Enable */ + { 0x00000640, 0x0000 }, /* R1600 - PWM1MIX Input 1 Source */ + { 0x00000641, 0x0080 }, /* R1601 - PWM1MIX Input 1 Volume */ + { 0x00000642, 0x0000 }, /* R1602 - PWM1MIX Input 2 Source */ + { 0x00000643, 0x0080 }, /* R1603 - PWM1MIX Input 2 Volume */ + { 0x00000644, 0x0000 }, /* R1604 - PWM1MIX Input 3 Source */ + { 0x00000645, 0x0080 }, /* R1605 - PWM1MIX Input 3 Volume */ + { 0x00000646, 0x0000 }, /* R1606 - PWM1MIX Input 4 Source */ + { 0x00000647, 0x0080 }, /* R1607 - PWM1MIX Input 4 Volume */ + { 0x00000648, 0x0000 }, /* R1608 - PWM2MIX Input 1 Source */ + { 0x00000649, 0x0080 }, /* R1609 - PWM2MIX Input 1 Volume */ + { 0x0000064A, 0x0000 }, /* R1610 - PWM2MIX Input 2 Source */ + { 0x0000064B, 0x0080 }, /* R1611 - PWM2MIX Input 2 Volume */ + { 0x0000064C, 0x0000 }, /* R1612 - PWM2MIX Input 3 Source */ + { 0x0000064D, 0x0080 }, /* R1613 - PWM2MIX Input 3 Volume */ + { 0x0000064E, 0x0000 }, /* R1614 - PWM2MIX Input 4 Source */ + { 0x0000064F, 0x0080 }, /* R1615 - PWM2MIX Input 4 Volume */ + { 0x00000660, 0x0000 }, /* R1632 - MICMIX Input 1 Source */ + { 0x00000661, 0x0080 }, /* R1633 - MICMIX Input 1 Volume */ + { 0x00000662, 0x0000 }, /* R1634 - MICMIX Input 2 Source */ + { 0x00000663, 0x0080 }, /* R1635 - MICMIX Input 2 Volume */ + { 0x00000664, 0x0000 }, /* R1636 - MICMIX Input 3 Source */ + { 0x00000665, 0x0080 }, /* R1637 - MICMIX Input 3 Volume */ + { 0x00000666, 0x0000 }, /* R1638 - MICMIX Input 4 Source */ + { 0x00000667, 0x0080 }, /* R1639 - MICMIX Input 4 Volume */ + { 0x00000668, 0x0000 }, /* R1640 - NOISEMIX Input 1 Source */ + { 0x00000669, 0x0080 }, /* R1641 - NOISEMIX Input 1 Volume */ + { 0x0000066A, 0x0000 }, /* R1642 - NOISEMIX Input 2 Source */ + { 0x0000066B, 0x0080 }, /* R1643 - NOISEMIX Input 2 Volume */ + { 0x0000066C, 0x0000 }, /* R1644 - NOISEMIX Input 3 Source */ + { 0x0000066D, 0x0080 }, /* R1645 - NOISEMIX Input 3 Volume */ + { 0x0000066E, 0x0000 }, /* R1646 - NOISEMIX Input 4 Source */ + { 0x0000066F, 0x0080 }, /* R1647 - NOISEMIX Input 4 Volume */ + { 0x00000680, 0x0000 }, /* R1664 - OUT1LMIX Input 1 Source */ + { 0x00000681, 0x0080 }, /* R1665 - OUT1LMIX Input 1 Volume */ + { 0x00000682, 0x0000 }, /* R1666 - OUT1LMIX Input 2 Source */ + { 0x00000683, 0x0080 }, /* R1667 - OUT1LMIX Input 2 Volume */ + { 0x00000684, 0x0000 }, /* R1668 - OUT1LMIX Input 3 Source */ + { 0x00000685, 0x0080 }, /* R1669 - OUT1LMIX Input 3 Volume */ + { 0x00000686, 0x0000 }, /* R1670 - OUT1LMIX Input 4 Source */ + { 0x00000687, 0x0080 }, /* R1671 - OUT1LMIX Input 4 Volume */ + { 0x00000688, 0x0000 }, /* R1672 - OUT1RMIX Input 1 Source */ + { 0x00000689, 0x0080 }, /* R1673 - OUT1RMIX Input 1 Volume */ + { 0x0000068A, 0x0000 }, /* R1674 - OUT1RMIX Input 2 Source */ + { 0x0000068B, 0x0080 }, /* R1675 - OUT1RMIX Input 2 Volume */ + { 0x0000068C, 0x0000 }, /* R1676 - OUT1RMIX Input 3 Source */ + { 0x0000068D, 0x0080 }, /* R1677 - OUT1RMIX Input 3 Volume */ + { 0x0000068E, 0x0000 }, /* R1678 - OUT1RMIX Input 4 Source */ + { 0x0000068F, 0x0080 }, /* R1679 - OUT1RMIX Input 4 Volume */ + { 0x000006A0, 0x0000 }, /* R1696 - OUT3LMIX Input 1 Source */ + { 0x000006A1, 0x0080 }, /* R1697 - OUT3LMIX Input 1 Volume */ + { 0x000006A2, 0x0000 }, /* R1698 - OUT3LMIX Input 2 Source */ + { 0x000006A3, 0x0080 }, /* R1699 - OUT3LMIX Input 2 Volume */ + { 0x000006A4, 0x0000 }, /* R1700 - OUT3LMIX Input 3 Source */ + { 0x000006A5, 0x0080 }, /* R1701 - OUT3LMIX Input 3 Volume */ + { 0x000006A6, 0x0000 }, /* R1702 - OUT3LMIX Input 4 Source */ + { 0x000006A7, 0x0080 }, /* R1703 - OUT3LMIX Input 4 Volume */ + { 0x000006B0, 0x0000 }, /* R1712 - OUT4LMIX Input 1 Source */ + { 0x000006B1, 0x0080 }, /* R1713 - OUT4LMIX Input 1 Volume */ + { 0x000006B2, 0x0000 }, /* R1714 - OUT4LMIX Input 2 Source */ + { 0x000006B3, 0x0080 }, /* R1715 - OUT4LMIX Input 2 Volume */ + { 0x000006B4, 0x0000 }, /* R1716 - OUT4LMIX Input 3 Source */ + { 0x000006B5, 0x0080 }, /* R1717 - OUT4LMIX Input 3 Volume */ + { 0x000006B6, 0x0000 }, /* R1718 - OUT4LMIX Input 4 Source */ + { 0x000006B7, 0x0080 }, /* R1719 - OUT4LMIX Input 4 Volume */ + { 0x000006C0, 0x0000 }, /* R1728 - OUT5LMIX Input 1 Source */ + { 0x000006C1, 0x0080 }, /* R1729 - OUT5LMIX Input 1 Volume */ + { 0x000006C2, 0x0000 }, /* R1730 - OUT5LMIX Input 2 Source */ + { 0x000006C3, 0x0080 }, /* R1731 - OUT5LMIX Input 2 Volume */ + { 0x000006C4, 0x0000 }, /* R1732 - OUT5LMIX Input 3 Source */ + { 0x000006C5, 0x0080 }, /* R1733 - OUT5LMIX Input 3 Volume */ + { 0x000006C6, 0x0000 }, /* R1734 - OUT5LMIX Input 4 Source */ + { 0x000006C7, 0x0080 }, /* R1735 - OUT5LMIX Input 4 Volume */ + { 0x000006C8, 0x0000 }, /* R1736 - OUT5RMIX Input 1 Source */ + { 0x000006C9, 0x0080 }, /* R1737 - OUT5RMIX Input 1 Volume */ + { 0x000006CA, 0x0000 }, /* R1738 - OUT5RMIX Input 2 Source */ + { 0x000006CB, 0x0080 }, /* R1739 - OUT5RMIX Input 2 Volume */ + { 0x000006CC, 0x0000 }, /* R1740 - OUT5RMIX Input 3 Source */ + { 0x000006CD, 0x0080 }, /* R1741 - OUT5RMIX Input 3 Volume */ + { 0x000006CE, 0x0000 }, /* R1742 - OUT5RMIX Input 4 Source */ + { 0x000006CF, 0x0080 }, /* R1743 - OUT5RMIX Input 4 Volume */ + { 0x00000700, 0x0000 }, /* R1792 - AIF1TX1MIX Input 1 Source */ + { 0x00000701, 0x0080 }, /* R1793 - AIF1TX1MIX Input 1 Volume */ + { 0x00000702, 0x0000 }, /* R1794 - AIF1TX1MIX Input 2 Source */ + { 0x00000703, 0x0080 }, /* R1795 - AIF1TX1MIX Input 2 Volume */ + { 0x00000704, 0x0000 }, /* R1796 - AIF1TX1MIX Input 3 Source */ + { 0x00000705, 0x0080 }, /* R1797 - AIF1TX1MIX Input 3 Volume */ + { 0x00000706, 0x0000 }, /* R1798 - AIF1TX1MIX Input 4 Source */ + { 0x00000707, 0x0080 }, /* R1799 - AIF1TX1MIX Input 4 Volume */ + { 0x00000708, 0x0000 }, /* R1800 - AIF1TX2MIX Input 1 Source */ + { 0x00000709, 0x0080 }, /* R1801 - AIF1TX2MIX Input 1 Volume */ + { 0x0000070A, 0x0000 }, /* R1802 - AIF1TX2MIX Input 2 Source */ + { 0x0000070B, 0x0080 }, /* R1803 - AIF1TX2MIX Input 2 Volume */ + { 0x0000070C, 0x0000 }, /* R1804 - AIF1TX2MIX Input 3 Source */ + { 0x0000070D, 0x0080 }, /* R1805 - AIF1TX2MIX Input 3 Volume */ + { 0x0000070E, 0x0000 }, /* R1806 - AIF1TX2MIX Input 4 Source */ + { 0x0000070F, 0x0080 }, /* R1807 - AIF1TX2MIX Input 4 Volume */ + { 0x00000710, 0x0000 }, /* R1808 - AIF1TX3MIX Input 1 Source */ + { 0x00000711, 0x0080 }, /* R1809 - AIF1TX3MIX Input 1 Volume */ + { 0x00000712, 0x0000 }, /* R1810 - AIF1TX3MIX Input 2 Source */ + { 0x00000713, 0x0080 }, /* R1811 - AIF1TX3MIX Input 2 Volume */ + { 0x00000714, 0x0000 }, /* R1812 - AIF1TX3MIX Input 3 Source */ + { 0x00000715, 0x0080 }, /* R1813 - AIF1TX3MIX Input 3 Volume */ + { 0x00000716, 0x0000 }, /* R1814 - AIF1TX3MIX Input 4 Source */ + { 0x00000717, 0x0080 }, /* R1815 - AIF1TX3MIX Input 4 Volume */ + { 0x00000718, 0x0000 }, /* R1816 - AIF1TX4MIX Input 1 Source */ + { 0x00000719, 0x0080 }, /* R1817 - AIF1TX4MIX Input 1 Volume */ + { 0x0000071A, 0x0000 }, /* R1818 - AIF1TX4MIX Input 2 Source */ + { 0x0000071B, 0x0080 }, /* R1819 - AIF1TX4MIX Input 2 Volume */ + { 0x0000071C, 0x0000 }, /* R1820 - AIF1TX4MIX Input 3 Source */ + { 0x0000071D, 0x0080 }, /* R1821 - AIF1TX4MIX Input 3 Volume */ + { 0x0000071E, 0x0000 }, /* R1822 - AIF1TX4MIX Input 4 Source */ + { 0x0000071F, 0x0080 }, /* R1823 - AIF1TX4MIX Input 4 Volume */ + { 0x00000720, 0x0000 }, /* R1824 - AIF1TX5MIX Input 1 Source */ + { 0x00000721, 0x0080 }, /* R1825 - AIF1TX5MIX Input 1 Volume */ + { 0x00000722, 0x0000 }, /* R1826 - AIF1TX5MIX Input 2 Source */ + { 0x00000723, 0x0080 }, /* R1827 - AIF1TX5MIX Input 2 Volume */ + { 0x00000724, 0x0000 }, /* R1828 - AIF1TX5MIX Input 3 Source */ + { 0x00000725, 0x0080 }, /* R1829 - AIF1TX5MIX Input 3 Volume */ + { 0x00000726, 0x0000 }, /* R1830 - AIF1TX5MIX Input 4 Source */ + { 0x00000727, 0x0080 }, /* R1831 - AIF1TX5MIX Input 4 Volume */ + { 0x00000728, 0x0000 }, /* R1832 - AIF1TX6MIX Input 1 Source */ + { 0x00000729, 0x0080 }, /* R1833 - AIF1TX6MIX Input 1 Volume */ + { 0x0000072A, 0x0000 }, /* R1834 - AIF1TX6MIX Input 2 Source */ + { 0x0000072B, 0x0080 }, /* R1835 - AIF1TX6MIX Input 2 Volume */ + { 0x0000072C, 0x0000 }, /* R1836 - AIF1TX6MIX Input 3 Source */ + { 0x0000072D, 0x0080 }, /* R1837 - AIF1TX6MIX Input 3 Volume */ + { 0x0000072E, 0x0000 }, /* R1838 - AIF1TX6MIX Input 4 Source */ + { 0x0000072F, 0x0080 }, /* R1839 - AIF1TX6MIX Input 4 Volume */ + { 0x00000730, 0x0000 }, /* R1840 - AIF1TX7MIX Input 1 Source */ + { 0x00000731, 0x0080 }, /* R1841 - AIF1TX7MIX Input 1 Volume */ + { 0x00000732, 0x0000 }, /* R1842 - AIF1TX7MIX Input 2 Source */ + { 0x00000733, 0x0080 }, /* R1843 - AIF1TX7MIX Input 2 Volume */ + { 0x00000734, 0x0000 }, /* R1844 - AIF1TX7MIX Input 3 Source */ + { 0x00000735, 0x0080 }, /* R1845 - AIF1TX7MIX Input 3 Volume */ + { 0x00000736, 0x0000 }, /* R1846 - AIF1TX7MIX Input 4 Source */ + { 0x00000737, 0x0080 }, /* R1847 - AIF1TX7MIX Input 4 Volume */ + { 0x00000738, 0x0000 }, /* R1848 - AIF1TX8MIX Input 1 Source */ + { 0x00000739, 0x0080 }, /* R1849 - AIF1TX8MIX Input 1 Volume */ + { 0x0000073A, 0x0000 }, /* R1850 - AIF1TX8MIX Input 2 Source */ + { 0x0000073B, 0x0080 }, /* R1851 - AIF1TX8MIX Input 2 Volume */ + { 0x0000073C, 0x0000 }, /* R1852 - AIF1TX8MIX Input 3 Source */ + { 0x0000073D, 0x0080 }, /* R1853 - AIF1TX8MIX Input 3 Volume */ + { 0x0000073E, 0x0000 }, /* R1854 - AIF1TX8MIX Input 4 Source */ + { 0x0000073F, 0x0080 }, /* R1855 - AIF1TX8MIX Input 4 Volume */ + { 0x00000740, 0x0000 }, /* R1856 - AIF2TX1MIX Input 1 Source */ + { 0x00000741, 0x0080 }, /* R1857 - AIF2TX1MIX Input 1 Volume */ + { 0x00000742, 0x0000 }, /* R1858 - AIF2TX1MIX Input 2 Source */ + { 0x00000743, 0x0080 }, /* R1859 - AIF2TX1MIX Input 2 Volume */ + { 0x00000744, 0x0000 }, /* R1860 - AIF2TX1MIX Input 3 Source */ + { 0x00000745, 0x0080 }, /* R1861 - AIF2TX1MIX Input 3 Volume */ + { 0x00000746, 0x0000 }, /* R1862 - AIF2TX1MIX Input 4 Source */ + { 0x00000747, 0x0080 }, /* R1863 - AIF2TX1MIX Input 4 Volume */ + { 0x00000748, 0x0000 }, /* R1864 - AIF2TX2MIX Input 1 Source */ + { 0x00000749, 0x0080 }, /* R1865 - AIF2TX2MIX Input 1 Volume */ + { 0x0000074A, 0x0000 }, /* R1866 - AIF2TX2MIX Input 2 Source */ + { 0x0000074B, 0x0080 }, /* R1867 - AIF2TX2MIX Input 2 Volume */ + { 0x0000074C, 0x0000 }, /* R1868 - AIF2TX2MIX Input 3 Source */ + { 0x0000074D, 0x0080 }, /* R1869 - AIF2TX2MIX Input 3 Volume */ + { 0x0000074E, 0x0000 }, /* R1870 - AIF2TX2MIX Input 4 Source */ + { 0x0000074F, 0x0080 }, /* R1871 - AIF2TX2MIX Input 4 Volume */ + { 0x000007C0, 0x0000 }, /* R1984 - SLIMTX1MIX Input 1 Source */ + { 0x000007C1, 0x0080 }, /* R1985 - SLIMTX1MIX Input 1 Volume */ + { 0x000007C2, 0x0000 }, /* R1986 - SLIMTX1MIX Input 2 Source */ + { 0x000007C3, 0x0080 }, /* R1987 - SLIMTX1MIX Input 2 Volume */ + { 0x000007C4, 0x0000 }, /* R1988 - SLIMTX1MIX Input 3 Source */ + { 0x000007C5, 0x0080 }, /* R1989 - SLIMTX1MIX Input 3 Volume */ + { 0x000007C6, 0x0000 }, /* R1990 - SLIMTX1MIX Input 4 Source */ + { 0x000007C7, 0x0080 }, /* R1991 - SLIMTX1MIX Input 4 Volume */ + { 0x000007C8, 0x0000 }, /* R1992 - SLIMTX2MIX Input 1 Source */ + { 0x000007C9, 0x0080 }, /* R1993 - SLIMTX2MIX Input 1 Volume */ + { 0x000007CA, 0x0000 }, /* R1994 - SLIMTX2MIX Input 2 Source */ + { 0x000007CB, 0x0080 }, /* R1995 - SLIMTX2MIX Input 2 Volume */ + { 0x000007CC, 0x0000 }, /* R1996 - SLIMTX2MIX Input 3 Source */ + { 0x000007CD, 0x0080 }, /* R1997 - SLIMTX2MIX Input 3 Volume */ + { 0x000007CE, 0x0000 }, /* R1998 - SLIMTX2MIX Input 4 Source */ + { 0x000007CF, 0x0080 }, /* R1999 - SLIMTX2MIX Input 4 Volume */ + { 0x000007D0, 0x0000 }, /* R2000 - SLIMTX3MIX Input 1 Source */ + { 0x000007D1, 0x0080 }, /* R2001 - SLIMTX3MIX Input 1 Volume */ + { 0x000007D2, 0x0000 }, /* R2002 - SLIMTX3MIX Input 2 Source */ + { 0x000007D3, 0x0080 }, /* R2003 - SLIMTX3MIX Input 2 Volume */ + { 0x000007D4, 0x0000 }, /* R2004 - SLIMTX3MIX Input 3 Source */ + { 0x000007D5, 0x0080 }, /* R2005 - SLIMTX3MIX Input 3 Volume */ + { 0x000007D6, 0x0000 }, /* R2006 - SLIMTX3MIX Input 4 Source */ + { 0x000007D7, 0x0080 }, /* R2007 - SLIMTX3MIX Input 4 Volume */ + { 0x000007D8, 0x0000 }, /* R2008 - SLIMTX4MIX Input 1 Source */ + { 0x000007D9, 0x0080 }, /* R2009 - SLIMTX4MIX Input 1 Volume */ + { 0x000007DA, 0x0000 }, /* R2010 - SLIMTX4MIX Input 2 Source */ + { 0x000007DB, 0x0080 }, /* R2011 - SLIMTX4MIX Input 2 Volume */ + { 0x000007DC, 0x0000 }, /* R2012 - SLIMTX4MIX Input 3 Source */ + { 0x000007DD, 0x0080 }, /* R2013 - SLIMTX4MIX Input 3 Volume */ + { 0x000007DE, 0x0000 }, /* R2014 - SLIMTX4MIX Input 4 Source */ + { 0x000007DF, 0x0080 }, /* R2015 - SLIMTX4MIX Input 4 Volume */ + { 0x000007E0, 0x0000 }, /* R2016 - SLIMTX5MIX Input 1 Source */ + { 0x000007E1, 0x0080 }, /* R2017 - SLIMTX5MIX Input 1 Volume */ + { 0x000007E2, 0x0000 }, /* R2018 - SLIMTX5MIX Input 2 Source */ + { 0x000007E3, 0x0080 }, /* R2019 - SLIMTX5MIX Input 2 Volume */ + { 0x000007E4, 0x0000 }, /* R2020 - SLIMTX5MIX Input 3 Source */ + { 0x000007E5, 0x0080 }, /* R2021 - SLIMTX5MIX Input 3 Volume */ + { 0x000007E6, 0x0000 }, /* R2022 - SLIMTX5MIX Input 4 Source */ + { 0x000007E7, 0x0080 }, /* R2023 - SLIMTX5MIX Input 4 Volume */ + { 0x000007E8, 0x0000 }, /* R2024 - SLIMTX6MIX Input 1 Source */ + { 0x000007E9, 0x0080 }, /* R2025 - SLIMTX6MIX Input 1 Volume */ + { 0x000007EA, 0x0000 }, /* R2026 - SLIMTX6MIX Input 2 Source */ + { 0x000007EB, 0x0080 }, /* R2027 - SLIMTX6MIX Input 2 Volume */ + { 0x000007EC, 0x0000 }, /* R2028 - SLIMTX6MIX Input 3 Source */ + { 0x000007ED, 0x0080 }, /* R2029 - SLIMTX6MIX Input 3 Volume */ + { 0x000007EE, 0x0000 }, /* R2030 - SLIMTX6MIX Input 4 Source */ + { 0x000007EF, 0x0080 }, /* R2031 - SLIMTX6MIX Input 4 Volume */ + { 0x000007F0, 0x0000 }, /* R2032 - SLIMTX7MIX Input 1 Source */ + { 0x000007F1, 0x0080 }, /* R2033 - SLIMTX7MIX Input 1 Volume */ + { 0x000007F2, 0x0000 }, /* R2034 - SLIMTX7MIX Input 2 Source */ + { 0x000007F3, 0x0080 }, /* R2035 - SLIMTX7MIX Input 2 Volume */ + { 0x000007F4, 0x0000 }, /* R2036 - SLIMTX7MIX Input 3 Source */ + { 0x000007F5, 0x0080 }, /* R2037 - SLIMTX7MIX Input 3 Volume */ + { 0x000007F6, 0x0000 }, /* R2038 - SLIMTX7MIX Input 4 Source */ + { 0x000007F7, 0x0080 }, /* R2039 - SLIMTX7MIX Input 4 Volume */ + { 0x000007F8, 0x0000 }, /* R2040 - SLIMTX8MIX Input 1 Source */ + { 0x000007F9, 0x0080 }, /* R2041 - SLIMTX8MIX Input 1 Volume */ + { 0x000007FA, 0x0000 }, /* R2042 - SLIMTX8MIX Input 2 Source */ + { 0x000007FB, 0x0080 }, /* R2043 - SLIMTX8MIX Input 2 Volume */ + { 0x000007FC, 0x0000 }, /* R2044 - SLIMTX8MIX Input 3 Source */ + { 0x000007FD, 0x0080 }, /* R2045 - SLIMTX8MIX Input 3 Volume */ + { 0x000007FE, 0x0000 }, /* R2046 - SLIMTX8MIX Input 4 Source */ + { 0x000007FF, 0x0080 }, /* R2047 - SLIMTX8MIX Input 4 Volume */ + { 0x00000880, 0x0000 }, /* R2176 - EQ1MIX Input 1 Source */ + { 0x00000881, 0x0080 }, /* R2177 - EQ1MIX Input 1 Volume */ + { 0x00000882, 0x0000 }, /* R2178 - EQ1MIX Input 2 Source */ + { 0x00000883, 0x0080 }, /* R2179 - EQ1MIX Input 2 Volume */ + { 0x00000884, 0x0000 }, /* R2180 - EQ1MIX Input 3 Source */ + { 0x00000885, 0x0080 }, /* R2181 - EQ1MIX Input 3 Volume */ + { 0x00000886, 0x0000 }, /* R2182 - EQ1MIX Input 4 Source */ + { 0x00000887, 0x0080 }, /* R2183 - EQ1MIX Input 4 Volume */ + { 0x00000888, 0x0000 }, /* R2184 - EQ2MIX Input 1 Source */ + { 0x00000889, 0x0080 }, /* R2185 - EQ2MIX Input 1 Volume */ + { 0x0000088A, 0x0000 }, /* R2186 - EQ2MIX Input 2 Source */ + { 0x0000088B, 0x0080 }, /* R2187 - EQ2MIX Input 2 Volume */ + { 0x0000088C, 0x0000 }, /* R2188 - EQ2MIX Input 3 Source */ + { 0x0000088D, 0x0080 }, /* R2189 - EQ2MIX Input 3 Volume */ + { 0x0000088E, 0x0000 }, /* R2190 - EQ2MIX Input 4 Source */ + { 0x0000088F, 0x0080 }, /* R2191 - EQ2MIX Input 4 Volume */ + { 0x00000890, 0x0000 }, /* R2192 - EQ3MIX Input 1 Source */ + { 0x00000891, 0x0080 }, /* R2193 - EQ3MIX Input 1 Volume */ + { 0x00000892, 0x0000 }, /* R2194 - EQ3MIX Input 2 Source */ + { 0x00000893, 0x0080 }, /* R2195 - EQ3MIX Input 2 Volume */ + { 0x00000894, 0x0000 }, /* R2196 - EQ3MIX Input 3 Source */ + { 0x00000895, 0x0080 }, /* R2197 - EQ3MIX Input 3 Volume */ + { 0x00000896, 0x0000 }, /* R2198 - EQ3MIX Input 4 Source */ + { 0x00000897, 0x0080 }, /* R2199 - EQ3MIX Input 4 Volume */ + { 0x00000898, 0x0000 }, /* R2200 - EQ4MIX Input 1 Source */ + { 0x00000899, 0x0080 }, /* R2201 - EQ4MIX Input 1 Volume */ + { 0x0000089A, 0x0000 }, /* R2202 - EQ4MIX Input 2 Source */ + { 0x0000089B, 0x0080 }, /* R2203 - EQ4MIX Input 2 Volume */ + { 0x0000089C, 0x0000 }, /* R2204 - EQ4MIX Input 3 Source */ + { 0x0000089D, 0x0080 }, /* R2205 - EQ4MIX Input 3 Volume */ + { 0x0000089E, 0x0000 }, /* R2206 - EQ4MIX Input 4 Source */ + { 0x0000089F, 0x0080 }, /* R2207 - EQ4MIX Input 4 Volume */ + { 0x000008C0, 0x0000 }, /* R2240 - DRC1LMIX Input 1 Source */ + { 0x000008C1, 0x0080 }, /* R2241 - DRC1LMIX Input 1 Volume */ + { 0x000008C2, 0x0000 }, /* R2242 - DRC1LMIX Input 2 Source */ + { 0x000008C3, 0x0080 }, /* R2243 - DRC1LMIX Input 2 Volume */ + { 0x000008C4, 0x0000 }, /* R2244 - DRC1LMIX Input 3 Source */ + { 0x000008C5, 0x0080 }, /* R2245 - DRC1LMIX Input 3 Volume */ + { 0x000008C6, 0x0000 }, /* R2246 - DRC1LMIX Input 4 Source */ + { 0x000008C7, 0x0080 }, /* R2247 - DRC1LMIX Input 4 Volume */ + { 0x000008C8, 0x0000 }, /* R2248 - DRC1RMIX Input 1 Source */ + { 0x000008C9, 0x0080 }, /* R2249 - DRC1RMIX Input 1 Volume */ + { 0x000008CA, 0x0000 }, /* R2250 - DRC1RMIX Input 2 Source */ + { 0x000008CB, 0x0080 }, /* R2251 - DRC1RMIX Input 2 Volume */ + { 0x000008CC, 0x0000 }, /* R2252 - DRC1RMIX Input 3 Source */ + { 0x000008CD, 0x0080 }, /* R2253 - DRC1RMIX Input 3 Volume */ + { 0x000008CE, 0x0000 }, /* R2254 - DRC1RMIX Input 4 Source */ + { 0x000008CF, 0x0080 }, /* R2255 - DRC1RMIX Input 4 Volume */ + { 0x00000900, 0x0000 }, /* R2304 - HPLP1MIX Input 1 Source */ + { 0x00000901, 0x0080 }, /* R2305 - HPLP1MIX Input 1 Volume */ + { 0x00000902, 0x0000 }, /* R2306 - HPLP1MIX Input 2 Source */ + { 0x00000903, 0x0080 }, /* R2307 - HPLP1MIX Input 2 Volume */ + { 0x00000904, 0x0000 }, /* R2308 - HPLP1MIX Input 3 Source */ + { 0x00000905, 0x0080 }, /* R2309 - HPLP1MIX Input 3 Volume */ + { 0x00000906, 0x0000 }, /* R2310 - HPLP1MIX Input 4 Source */ + { 0x00000907, 0x0080 }, /* R2311 - HPLP1MIX Input 4 Volume */ + { 0x00000908, 0x0000 }, /* R2312 - HPLP2MIX Input 1 Source */ + { 0x00000909, 0x0080 }, /* R2313 - HPLP2MIX Input 1 Volume */ + { 0x0000090A, 0x0000 }, /* R2314 - HPLP2MIX Input 2 Source */ + { 0x0000090B, 0x0080 }, /* R2315 - HPLP2MIX Input 2 Volume */ + { 0x0000090C, 0x0000 }, /* R2316 - HPLP2MIX Input 3 Source */ + { 0x0000090D, 0x0080 }, /* R2317 - HPLP2MIX Input 3 Volume */ + { 0x0000090E, 0x0000 }, /* R2318 - HPLP2MIX Input 4 Source */ + { 0x0000090F, 0x0080 }, /* R2319 - HPLP2MIX Input 4 Volume */ + { 0x00000910, 0x0000 }, /* R2320 - HPLP3MIX Input 1 Source */ + { 0x00000911, 0x0080 }, /* R2321 - HPLP3MIX Input 1 Volume */ + { 0x00000912, 0x0000 }, /* R2322 - HPLP3MIX Input 2 Source */ + { 0x00000913, 0x0080 }, /* R2323 - HPLP3MIX Input 2 Volume */ + { 0x00000914, 0x0000 }, /* R2324 - HPLP3MIX Input 3 Source */ + { 0x00000915, 0x0080 }, /* R2325 - HPLP3MIX Input 3 Volume */ + { 0x00000916, 0x0000 }, /* R2326 - HPLP3MIX Input 4 Source */ + { 0x00000917, 0x0080 }, /* R2327 - HPLP3MIX Input 4 Volume */ + { 0x00000918, 0x0000 }, /* R2328 - HPLP4MIX Input 1 Source */ + { 0x00000919, 0x0080 }, /* R2329 - HPLP4MIX Input 1 Volume */ + { 0x0000091A, 0x0000 }, /* R2330 - HPLP4MIX Input 2 Source */ + { 0x0000091B, 0x0080 }, /* R2331 - HPLP4MIX Input 2 Volume */ + { 0x0000091C, 0x0000 }, /* R2332 - HPLP4MIX Input 3 Source */ + { 0x0000091D, 0x0080 }, /* R2333 - HPLP4MIX Input 3 Volume */ + { 0x0000091E, 0x0000 }, /* R2334 - HPLP4MIX Input 4 Source */ + { 0x0000091F, 0x0080 }, /* R2335 - HPLP4MIX Input 4 Volume */ + { 0x00000B00, 0x0000 }, /* R2816 - ISRC1DEC1MIX Input 1 Source */ + { 0x00000B08, 0x0000 }, /* R2824 - ISRC1DEC2MIX Input 1 Source */ + { 0x00000B20, 0x0000 }, /* R2848 - ISRC1INT1MIX Input 1 Source */ + { 0x00000B28, 0x0000 }, /* R2856 - ISRC1INT2MIX Input 1 Source */ + { 0x00000B40, 0x0000 }, /* R2880 - ISRC2DEC1MIX Input 1 Source */ + { 0x00000B48, 0x0000 }, /* R2888 - ISRC2DEC2MIX Input 1 Source */ + { 0x00000B60, 0x0000 }, /* R2912 - ISRC2INT1MIX Input 1 Source */ + { 0x00000B68, 0x0000 }, /* R2920 - ISRC2INT2MIX Input 1 Source */ + { 0x00000C00, 0xA101 }, /* R3072 - GPIO1 CTRL */ + { 0x00000C01, 0xA101 }, /* R3073 - GPIO2 CTRL */ + { 0x00000C02, 0xA101 }, /* R3074 - GPIO3 CTRL */ + { 0x00000C03, 0xA101 }, /* R3075 - GPIO4 CTRL */ + { 0x00000C04, 0xA101 }, /* R3076 - GPIO5 CTRL */ + { 0x00000C0F, 0x0400 }, /* R3087 - IRQ CTRL 1 */ + { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */ + { 0x00000C20, 0x8002 }, /* R3104 - Misc Pad Ctrl 1 */ + { 0x00000C21, 0x0001 }, /* R3105 - Misc Pad Ctrl 2 */ + { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */ + { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */ + { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */ + { 0x00000D08, 0xFFFF }, /* R3336 - Interrupt Status 1 Mask */ + { 0x00000D0A, 0xFFFF }, /* R3338 - Interrupt Status 3 Mask */ + { 0x00000D0B, 0xFFFF }, /* R3339 - Interrupt Status 4 Mask */ + { 0x00000D0C, 0xFEFF }, /* R3340 - Interrupt Status 5 Mask */ + { 0x00000D0F, 0x0000 }, /* R3343 - Interrupt Control */ + { 0x00000D18, 0xFFFF }, /* R3352 - IRQ2 Status 1 Mask */ + { 0x00000D1A, 0xFFFF }, /* R3354 - IRQ2 Status 3 Mask */ + { 0x00000D1B, 0xFFFF }, /* R3355 - IRQ2 Status 4 Mask */ + { 0x00000D1C, 0xFFFF }, /* R3356 - IRQ2 Status 5 Mask */ + { 0x00000D1F, 0x0000 }, /* R3359 - IRQ2 Control */ + { 0x00000D53, 0xFFFF }, /* R3411 - AOD IRQ Mask IRQ1 */ + { 0x00000D54, 0xFFFF }, /* R3412 - AOD IRQ Mask IRQ2 */ + { 0x00000D56, 0x0000 }, /* R3414 - Jack detect debounce */ + { 0x00000E00, 0x0000 }, /* R3584 - FX_Ctrl1 */ + { 0x00000E01, 0x0000 }, /* R3585 - FX_Ctrl2 */ + { 0x00000E10, 0x6318 }, /* R3600 - EQ1_1 */ + { 0x00000E11, 0x6300 }, /* R3601 - EQ1_2 */ + { 0x00000E12, 0x0FC8 }, /* R3602 - EQ1_3 */ + { 0x00000E13, 0x03FE }, /* R3603 - EQ1_4 */ + { 0x00000E14, 0x00E0 }, /* R3604 - EQ1_5 */ + { 0x00000E15, 0x1EC4 }, /* R3605 - EQ1_6 */ + { 0x00000E16, 0xF136 }, /* R3606 - EQ1_7 */ + { 0x00000E17, 0x0409 }, /* R3607 - EQ1_8 */ + { 0x00000E18, 0x04CC }, /* R3608 - EQ1_9 */ + { 0x00000E19, 0x1C9B }, /* R3609 - EQ1_10 */ + { 0x00000E1A, 0xF337 }, /* R3610 - EQ1_11 */ + { 0x00000E1B, 0x040B }, /* R3611 - EQ1_12 */ + { 0x00000E1C, 0x0CBB }, /* R3612 - EQ1_13 */ + { 0x00000E1D, 0x16F8 }, /* R3613 - EQ1_14 */ + { 0x00000E1E, 0xF7D9 }, /* R3614 - EQ1_15 */ + { 0x00000E1F, 0x040A }, /* R3615 - EQ1_16 */ + { 0x00000E20, 0x1F14 }, /* R3616 - EQ1_17 */ + { 0x00000E21, 0x058C }, /* R3617 - EQ1_18 */ + { 0x00000E22, 0x0563 }, /* R3618 - EQ1_19 */ + { 0x00000E23, 0x4000 }, /* R3619 - EQ1_20 */ + { 0x00000E24, 0x0B75 }, /* R3620 - EQ1_21 */ + { 0x00000E26, 0x6318 }, /* R3622 - EQ2_1 */ + { 0x00000E27, 0x6300 }, /* R3623 - EQ2_2 */ + { 0x00000E28, 0x0FC8 }, /* R3624 - EQ2_3 */ + { 0x00000E29, 0x03FE }, /* R3625 - EQ2_4 */ + { 0x00000E2A, 0x00E0 }, /* R3626 - EQ2_5 */ + { 0x00000E2B, 0x1EC4 }, /* R3627 - EQ2_6 */ + { 0x00000E2C, 0xF136 }, /* R3628 - EQ2_7 */ + { 0x00000E2D, 0x0409 }, /* R3629 - EQ2_8 */ + { 0x00000E2E, 0x04CC }, /* R3630 - EQ2_9 */ + { 0x00000E2F, 0x1C9B }, /* R3631 - EQ2_10 */ + { 0x00000E30, 0xF337 }, /* R3632 - EQ2_11 */ + { 0x00000E31, 0x040B }, /* R3633 - EQ2_12 */ + { 0x00000E32, 0x0CBB }, /* R3634 - EQ2_13 */ + { 0x00000E33, 0x16F8 }, /* R3635 - EQ2_14 */ + { 0x00000E34, 0xF7D9 }, /* R3636 - EQ2_15 */ + { 0x00000E35, 0x040A }, /* R3637 - EQ2_16 */ + { 0x00000E36, 0x1F14 }, /* R3638 - EQ2_17 */ + { 0x00000E37, 0x058C }, /* R3639 - EQ2_18 */ + { 0x00000E38, 0x0563 }, /* R3640 - EQ2_19 */ + { 0x00000E39, 0x4000 }, /* R3641 - EQ2_20 */ + { 0x00000E3A, 0x0B75 }, /* R3642 - EQ2_21 */ + { 0x00000E3C, 0x6318 }, /* R3644 - EQ3_1 */ + { 0x00000E3D, 0x6300 }, /* R3645 - EQ3_2 */ + { 0x00000E3E, 0x0FC8 }, /* R3646 - EQ3_3 */ + { 0x00000E3F, 0x03FE }, /* R3647 - EQ3_4 */ + { 0x00000E40, 0x00E0 }, /* R3648 - EQ3_5 */ + { 0x00000E41, 0x1EC4 }, /* R3649 - EQ3_6 */ + { 0x00000E42, 0xF136 }, /* R3650 - EQ3_7 */ + { 0x00000E43, 0x0409 }, /* R3651 - EQ3_8 */ + { 0x00000E44, 0x04CC }, /* R3652 - EQ3_9 */ + { 0x00000E45, 0x1C9B }, /* R3653 - EQ3_10 */ + { 0x00000E46, 0xF337 }, /* R3654 - EQ3_11 */ + { 0x00000E47, 0x040B }, /* R3655 - EQ3_12 */ + { 0x00000E48, 0x0CBB }, /* R3656 - EQ3_13 */ + { 0x00000E49, 0x16F8 }, /* R3657 - EQ3_14 */ + { 0x00000E4A, 0xF7D9 }, /* R3658 - EQ3_15 */ + { 0x00000E4B, 0x040A }, /* R3659 - EQ3_16 */ + { 0x00000E4C, 0x1F14 }, /* R3660 - EQ3_17 */ + { 0x00000E4D, 0x058C }, /* R3661 - EQ3_18 */ + { 0x00000E4E, 0x0563 }, /* R3662 - EQ3_19 */ + { 0x00000E4F, 0x4000 }, /* R3663 - EQ3_20 */ + { 0x00000E50, 0x0B75 }, /* R3664 - EQ3_21 */ + { 0x00000E52, 0x6318 }, /* R3666 - EQ4_1 */ + { 0x00000E53, 0x6300 }, /* R3667 - EQ4_2 */ + { 0x00000E54, 0x0FC8 }, /* R3668 - EQ4_3 */ + { 0x00000E55, 0x03FE }, /* R3669 - EQ4_4 */ + { 0x00000E56, 0x00E0 }, /* R3670 - EQ4_5 */ + { 0x00000E57, 0x1EC4 }, /* R3671 - EQ4_6 */ + { 0x00000E58, 0xF136 }, /* R3672 - EQ4_7 */ + { 0x00000E59, 0x0409 }, /* R3673 - EQ4_8 */ + { 0x00000E5A, 0x04CC }, /* R3674 - EQ4_9 */ + { 0x00000E5B, 0x1C9B }, /* R3675 - EQ4_10 */ + { 0x00000E5C, 0xF337 }, /* R3676 - EQ4_11 */ + { 0x00000E5D, 0x040B }, /* R3677 - EQ4_12 */ + { 0x00000E5E, 0x0CBB }, /* R3678 - EQ4_13 */ + { 0x00000E5F, 0x16F8 }, /* R3679 - EQ4_14 */ + { 0x00000E60, 0xF7D9 }, /* R3680 - EQ4_15 */ + { 0x00000E61, 0x040A }, /* R3681 - EQ4_16 */ + { 0x00000E62, 0x1F14 }, /* R3682 - EQ4_17 */ + { 0x00000E63, 0x058C }, /* R3683 - EQ4_18 */ + { 0x00000E64, 0x0563 }, /* R3684 - EQ4_19 */ + { 0x00000E65, 0x4000 }, /* R3685 - EQ4_20 */ + { 0x00000E66, 0x0B75 }, /* R3686 - EQ4_21 */ + { 0x00000E80, 0x0018 }, /* R3712 - DRC1 ctrl1 */ + { 0x00000E81, 0x0933 }, /* R3713 - DRC1 ctrl2 */ + { 0x00000E82, 0x0018 }, /* R3714 - DRC1 ctrl3 */ + { 0x00000E83, 0x0000 }, /* R3715 - DRC1 ctrl4 */ + { 0x00000E84, 0x0000 }, /* R3716 - DRC1 ctrl5 */ + { 0x00000EC0, 0x0000 }, /* R3776 - HPLPF1_1 */ + { 0x00000EC1, 0x0000 }, /* R3777 - HPLPF1_2 */ + { 0x00000EC4, 0x0000 }, /* R3780 - HPLPF2_1 */ + { 0x00000EC5, 0x0000 }, /* R3781 - HPLPF2_2 */ + { 0x00000EC8, 0x0000 }, /* R3784 - HPLPF3_1 */ + { 0x00000EC9, 0x0000 }, /* R3785 - HPLPF3_2 */ + { 0x00000ECC, 0x0000 }, /* R3788 - HPLPF4_1 */ + { 0x00000ECD, 0x0000 }, /* R3789 - HPLPF4_2 */ + { 0x00000EF0, 0x0000 }, /* R3824 - ISRC 1 CTRL 1 */ + { 0x00000EF1, 0x0000 }, /* R3825 - ISRC 1 CTRL 2 */ + { 0x00000EF2, 0x0000 }, /* R3826 - ISRC 1 CTRL 3 */ + { 0x00000EF3, 0x0000 }, /* R3827 - ISRC 2 CTRL 1 */ + { 0x00000EF4, 0x0000 }, /* R3828 - ISRC 2 CTRL 2 */ + { 0x00000EF5, 0x0000 }, /* R3829 - ISRC 2 CTRL 3 */ + { 0x00001100, 0x0010 }, /* R4352 - DSP1 Control 1 */ + { 0x00001101, 0x0000 }, /* R4353 - DSP1 Clocking 1 */ +}; + +static bool wm8997_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_SOFTWARE_RESET: + case ARIZONA_DEVICE_REVISION: + case ARIZONA_CTRL_IF_I2C1_CFG_1: + case ARIZONA_WRITE_SEQUENCER_CTRL_0: + case ARIZONA_WRITE_SEQUENCER_CTRL_1: + case ARIZONA_WRITE_SEQUENCER_CTRL_2: + case ARIZONA_TONE_GENERATOR_1: + case ARIZONA_TONE_GENERATOR_2: + case ARIZONA_TONE_GENERATOR_3: + case ARIZONA_TONE_GENERATOR_4: + case ARIZONA_TONE_GENERATOR_5: + case ARIZONA_PWM_DRIVE_1: + case ARIZONA_PWM_DRIVE_2: + case ARIZONA_PWM_DRIVE_3: + case ARIZONA_WAKE_CONTROL: + case ARIZONA_SEQUENCE_CONTROL: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_1: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_4: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4: + case ARIZONA_COMFORT_NOISE_GENERATOR: + case ARIZONA_HAPTICS_CONTROL_1: + case ARIZONA_HAPTICS_CONTROL_2: + case ARIZONA_HAPTICS_PHASE_1_INTENSITY: + case ARIZONA_HAPTICS_PHASE_1_DURATION: + case ARIZONA_HAPTICS_PHASE_2_INTENSITY: + case ARIZONA_HAPTICS_PHASE_2_DURATION: + case ARIZONA_HAPTICS_PHASE_3_INTENSITY: + case ARIZONA_HAPTICS_PHASE_3_DURATION: + case ARIZONA_HAPTICS_STATUS: + case ARIZONA_CLOCK_32K_1: + case ARIZONA_SYSTEM_CLOCK_1: + case ARIZONA_SAMPLE_RATE_1: + case ARIZONA_SAMPLE_RATE_2: + case ARIZONA_SAMPLE_RATE_3: + case ARIZONA_SAMPLE_RATE_1_STATUS: + case ARIZONA_SAMPLE_RATE_2_STATUS: + case ARIZONA_SAMPLE_RATE_3_STATUS: + case ARIZONA_ASYNC_CLOCK_1: + case ARIZONA_ASYNC_SAMPLE_RATE_1: + case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: + case ARIZONA_OUTPUT_SYSTEM_CLOCK: + case ARIZONA_OUTPUT_ASYNC_CLOCK: + case ARIZONA_RATE_ESTIMATOR_1: + case ARIZONA_RATE_ESTIMATOR_2: + case ARIZONA_RATE_ESTIMATOR_3: + case ARIZONA_RATE_ESTIMATOR_4: + case ARIZONA_RATE_ESTIMATOR_5: + case ARIZONA_FLL1_CONTROL_1: + case ARIZONA_FLL1_CONTROL_2: + case ARIZONA_FLL1_CONTROL_3: + case ARIZONA_FLL1_CONTROL_4: + case ARIZONA_FLL1_CONTROL_5: + case ARIZONA_FLL1_CONTROL_6: + case ARIZONA_FLL1_LOOP_FILTER_TEST_1: + case ARIZONA_FLL1_NCO_TEST_0: + case ARIZONA_FLL1_SYNCHRONISER_1: + case ARIZONA_FLL1_SYNCHRONISER_2: + case ARIZONA_FLL1_SYNCHRONISER_3: + case ARIZONA_FLL1_SYNCHRONISER_4: + case ARIZONA_FLL1_SYNCHRONISER_5: + case ARIZONA_FLL1_SYNCHRONISER_6: + case ARIZONA_FLL1_SPREAD_SPECTRUM: + case ARIZONA_FLL1_GPIO_CLOCK: + case ARIZONA_FLL2_CONTROL_1: + case ARIZONA_FLL2_CONTROL_2: + case ARIZONA_FLL2_CONTROL_3: + case ARIZONA_FLL2_CONTROL_4: + case ARIZONA_FLL2_CONTROL_5: + case ARIZONA_FLL2_CONTROL_6: + case ARIZONA_FLL2_LOOP_FILTER_TEST_1: + case ARIZONA_FLL2_NCO_TEST_0: + case ARIZONA_FLL2_SYNCHRONISER_1: + case ARIZONA_FLL2_SYNCHRONISER_2: + case ARIZONA_FLL2_SYNCHRONISER_3: + case ARIZONA_FLL2_SYNCHRONISER_4: + case ARIZONA_FLL2_SYNCHRONISER_5: + case ARIZONA_FLL2_SYNCHRONISER_6: + case ARIZONA_FLL2_SPREAD_SPECTRUM: + case ARIZONA_FLL2_GPIO_CLOCK: + case ARIZONA_MIC_CHARGE_PUMP_1: + case ARIZONA_LDO1_CONTROL_1: + case ARIZONA_LDO2_CONTROL_1: + case ARIZONA_MIC_BIAS_CTRL_1: + case ARIZONA_MIC_BIAS_CTRL_2: + case ARIZONA_MIC_BIAS_CTRL_3: + case ARIZONA_ACCESSORY_DETECT_MODE_1: + case ARIZONA_HEADPHONE_DETECT_1: + case ARIZONA_HEADPHONE_DETECT_2: + case ARIZONA_MIC_DETECT_1: + case ARIZONA_MIC_DETECT_2: + case ARIZONA_MIC_DETECT_3: + case ARIZONA_MIC_NOISE_MIX_CONTROL_1: + case ARIZONA_ISOLATION_CONTROL: + case ARIZONA_JACK_DETECT_ANALOGUE: + case ARIZONA_INPUT_ENABLES: + case ARIZONA_INPUT_ENABLES_STATUS: + case ARIZONA_INPUT_RATE: + case ARIZONA_INPUT_VOLUME_RAMP: + case ARIZONA_IN1L_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_1L: + case ARIZONA_DMIC1L_CONTROL: + case ARIZONA_IN1R_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_1R: + case ARIZONA_DMIC1R_CONTROL: + case ARIZONA_IN2L_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_2L: + case ARIZONA_DMIC2L_CONTROL: + case ARIZONA_IN2R_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_2R: + case ARIZONA_DMIC2R_CONTROL: + case ARIZONA_OUTPUT_ENABLES_1: + case ARIZONA_OUTPUT_STATUS_1: + case ARIZONA_RAW_OUTPUT_STATUS_1: + case ARIZONA_OUTPUT_RATE_1: + case ARIZONA_OUTPUT_VOLUME_RAMP: + case ARIZONA_OUTPUT_PATH_CONFIG_1L: + case ARIZONA_DAC_DIGITAL_VOLUME_1L: + case ARIZONA_DAC_VOLUME_LIMIT_1L: + case ARIZONA_NOISE_GATE_SELECT_1L: + case ARIZONA_OUTPUT_PATH_CONFIG_1R: + case ARIZONA_DAC_DIGITAL_VOLUME_1R: + case ARIZONA_DAC_VOLUME_LIMIT_1R: + case ARIZONA_NOISE_GATE_SELECT_1R: + case ARIZONA_OUTPUT_PATH_CONFIG_3L: + case ARIZONA_DAC_DIGITAL_VOLUME_3L: + case ARIZONA_DAC_VOLUME_LIMIT_3L: + case ARIZONA_NOISE_GATE_SELECT_3L: + case ARIZONA_OUTPUT_PATH_CONFIG_4L: + case ARIZONA_DAC_DIGITAL_VOLUME_4L: + case ARIZONA_OUT_VOLUME_4L: + case ARIZONA_NOISE_GATE_SELECT_4L: + case ARIZONA_OUTPUT_PATH_CONFIG_5L: + case ARIZONA_DAC_DIGITAL_VOLUME_5L: + case ARIZONA_DAC_VOLUME_LIMIT_5L: + case ARIZONA_NOISE_GATE_SELECT_5L: + case ARIZONA_DAC_DIGITAL_VOLUME_5R: + case ARIZONA_DAC_VOLUME_LIMIT_5R: + case ARIZONA_NOISE_GATE_SELECT_5R: + case ARIZONA_DAC_AEC_CONTROL_1: + case ARIZONA_NOISE_GATE_CONTROL: + case ARIZONA_PDM_SPK1_CTRL_1: + case ARIZONA_PDM_SPK1_CTRL_2: + case ARIZONA_AIF1_BCLK_CTRL: + case ARIZONA_AIF1_TX_PIN_CTRL: + case ARIZONA_AIF1_RX_PIN_CTRL: + case ARIZONA_AIF1_RATE_CTRL: + case ARIZONA_AIF1_FORMAT: + case ARIZONA_AIF1_TX_BCLK_RATE: + case ARIZONA_AIF1_RX_BCLK_RATE: + case ARIZONA_AIF1_FRAME_CTRL_1: + case ARIZONA_AIF1_FRAME_CTRL_2: + case ARIZONA_AIF1_FRAME_CTRL_3: + case ARIZONA_AIF1_FRAME_CTRL_4: + case ARIZONA_AIF1_FRAME_CTRL_5: + case ARIZONA_AIF1_FRAME_CTRL_6: + case ARIZONA_AIF1_FRAME_CTRL_7: + case ARIZONA_AIF1_FRAME_CTRL_8: + case ARIZONA_AIF1_FRAME_CTRL_9: + case ARIZONA_AIF1_FRAME_CTRL_10: + case ARIZONA_AIF1_FRAME_CTRL_11: + case ARIZONA_AIF1_FRAME_CTRL_12: + case ARIZONA_AIF1_FRAME_CTRL_13: + case ARIZONA_AIF1_FRAME_CTRL_14: + case ARIZONA_AIF1_FRAME_CTRL_15: + case ARIZONA_AIF1_FRAME_CTRL_16: + case ARIZONA_AIF1_FRAME_CTRL_17: + case ARIZONA_AIF1_FRAME_CTRL_18: + case ARIZONA_AIF1_TX_ENABLES: + case ARIZONA_AIF1_RX_ENABLES: + case ARIZONA_AIF2_BCLK_CTRL: + case ARIZONA_AIF2_TX_PIN_CTRL: + case ARIZONA_AIF2_RX_PIN_CTRL: + case ARIZONA_AIF2_RATE_CTRL: + case ARIZONA_AIF2_FORMAT: + case ARIZONA_AIF2_TX_BCLK_RATE: + case ARIZONA_AIF2_RX_BCLK_RATE: + case ARIZONA_AIF2_FRAME_CTRL_1: + case ARIZONA_AIF2_FRAME_CTRL_2: + case ARIZONA_AIF2_FRAME_CTRL_3: + case ARIZONA_AIF2_FRAME_CTRL_4: + case ARIZONA_AIF2_FRAME_CTRL_11: + case ARIZONA_AIF2_FRAME_CTRL_12: + case ARIZONA_AIF2_TX_ENABLES: + case ARIZONA_AIF2_RX_ENABLES: + case ARIZONA_SLIMBUS_FRAMER_REF_GEAR: + case ARIZONA_SLIMBUS_RATES_1: + case ARIZONA_SLIMBUS_RATES_2: + case ARIZONA_SLIMBUS_RATES_3: + case ARIZONA_SLIMBUS_RATES_4: + case ARIZONA_SLIMBUS_RATES_5: + case ARIZONA_SLIMBUS_RATES_6: + case ARIZONA_SLIMBUS_RATES_7: + case ARIZONA_SLIMBUS_RATES_8: + case ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE: + case ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE: + case ARIZONA_SLIMBUS_RX_PORT_STATUS: + case ARIZONA_SLIMBUS_TX_PORT_STATUS: + case ARIZONA_PWM1MIX_INPUT_1_SOURCE: + case ARIZONA_PWM1MIX_INPUT_1_VOLUME: + case ARIZONA_PWM1MIX_INPUT_2_SOURCE: + case ARIZONA_PWM1MIX_INPUT_2_VOLUME: + case ARIZONA_PWM1MIX_INPUT_3_SOURCE: + case ARIZONA_PWM1MIX_INPUT_3_VOLUME: + case ARIZONA_PWM1MIX_INPUT_4_SOURCE: + case ARIZONA_PWM1MIX_INPUT_4_VOLUME: + case ARIZONA_PWM2MIX_INPUT_1_SOURCE: + case ARIZONA_PWM2MIX_INPUT_1_VOLUME: + case ARIZONA_PWM2MIX_INPUT_2_SOURCE: + case ARIZONA_PWM2MIX_INPUT_2_VOLUME: + case ARIZONA_PWM2MIX_INPUT_3_SOURCE: + case ARIZONA_PWM2MIX_INPUT_3_VOLUME: + case ARIZONA_PWM2MIX_INPUT_4_SOURCE: + case ARIZONA_PWM2MIX_INPUT_4_VOLUME: + case ARIZONA_MICMIX_INPUT_1_SOURCE: + case ARIZONA_MICMIX_INPUT_1_VOLUME: + case ARIZONA_MICMIX_INPUT_2_SOURCE: + case ARIZONA_MICMIX_INPUT_2_VOLUME: + case ARIZONA_MICMIX_INPUT_3_SOURCE: + case ARIZONA_MICMIX_INPUT_3_VOLUME: + case ARIZONA_MICMIX_INPUT_4_SOURCE: + case ARIZONA_MICMIX_INPUT_4_VOLUME: + case ARIZONA_NOISEMIX_INPUT_1_SOURCE: + case ARIZONA_NOISEMIX_INPUT_1_VOLUME: + case ARIZONA_NOISEMIX_INPUT_2_SOURCE: + case ARIZONA_NOISEMIX_INPUT_2_VOLUME: + case ARIZONA_NOISEMIX_INPUT_3_SOURCE: + case ARIZONA_NOISEMIX_INPUT_3_VOLUME: + case ARIZONA_NOISEMIX_INPUT_4_SOURCE: + case ARIZONA_NOISEMIX_INPUT_4_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_1_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_1_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_2_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_2_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_3_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_3_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_4_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_4_VOLUME: + case ARIZONA_OUT3LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT3LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT3LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT3LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT3LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT3LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT3LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT3LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_1_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_1_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_2_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_2_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_3_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_3_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_4_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX7MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX7MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX7MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX7MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX7MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX7MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX7MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX8MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX8MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX8MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX8MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX8MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX8MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX8MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX1MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX1MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX1MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX1MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX1MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX1MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX1MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX2MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX2MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX2MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX2MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX2MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX2MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX2MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX3MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX3MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX3MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX3MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX3MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX3MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX3MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX4MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX4MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX4MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX4MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX4MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX4MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX4MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX5MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX5MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX5MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX5MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX5MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX5MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX5MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX6MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX6MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX6MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX6MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX6MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX6MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX6MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX7MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX7MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX7MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX7MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX7MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX7MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX7MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX8MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX8MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX8MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX8MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX8MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX8MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX8MIX_INPUT_4_VOLUME: + case ARIZONA_EQ1MIX_INPUT_1_SOURCE: + case ARIZONA_EQ1MIX_INPUT_1_VOLUME: + case ARIZONA_EQ1MIX_INPUT_2_SOURCE: + case ARIZONA_EQ1MIX_INPUT_2_VOLUME: + case ARIZONA_EQ1MIX_INPUT_3_SOURCE: + case ARIZONA_EQ1MIX_INPUT_3_VOLUME: + case ARIZONA_EQ1MIX_INPUT_4_SOURCE: + case ARIZONA_EQ1MIX_INPUT_4_VOLUME: + case ARIZONA_EQ2MIX_INPUT_1_SOURCE: + case ARIZONA_EQ2MIX_INPUT_1_VOLUME: + case ARIZONA_EQ2MIX_INPUT_2_SOURCE: + case ARIZONA_EQ2MIX_INPUT_2_VOLUME: + case ARIZONA_EQ2MIX_INPUT_3_SOURCE: + case ARIZONA_EQ2MIX_INPUT_3_VOLUME: + case ARIZONA_EQ2MIX_INPUT_4_SOURCE: + case ARIZONA_EQ2MIX_INPUT_4_VOLUME: + case ARIZONA_EQ3MIX_INPUT_1_SOURCE: + case ARIZONA_EQ3MIX_INPUT_1_VOLUME: + case ARIZONA_EQ3MIX_INPUT_2_SOURCE: + case ARIZONA_EQ3MIX_INPUT_2_VOLUME: + case ARIZONA_EQ3MIX_INPUT_3_SOURCE: + case ARIZONA_EQ3MIX_INPUT_3_VOLUME: + case ARIZONA_EQ3MIX_INPUT_4_SOURCE: + case ARIZONA_EQ3MIX_INPUT_4_VOLUME: + case ARIZONA_EQ4MIX_INPUT_1_SOURCE: + case ARIZONA_EQ4MIX_INPUT_1_VOLUME: + case ARIZONA_EQ4MIX_INPUT_2_SOURCE: + case ARIZONA_EQ4MIX_INPUT_2_VOLUME: + case ARIZONA_EQ4MIX_INPUT_3_SOURCE: + case ARIZONA_EQ4MIX_INPUT_3_VOLUME: + case ARIZONA_EQ4MIX_INPUT_4_SOURCE: + case ARIZONA_EQ4MIX_INPUT_4_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_1_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_1_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_2_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_2_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_3_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_3_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_4_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_4_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_1_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_1_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_2_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_2_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_3_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_3_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_4_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_4_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_4_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_4_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_4_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_4_VOLUME: + case ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE: + case ARIZONA_GPIO1_CTRL: + case ARIZONA_GPIO2_CTRL: + case ARIZONA_GPIO3_CTRL: + case ARIZONA_GPIO4_CTRL: + case ARIZONA_GPIO5_CTRL: + case ARIZONA_IRQ_CTRL_1: + case ARIZONA_GPIO_DEBOUNCE_CONFIG: + case ARIZONA_MISC_PAD_CTRL_1: + case ARIZONA_MISC_PAD_CTRL_2: + case ARIZONA_MISC_PAD_CTRL_3: + case ARIZONA_MISC_PAD_CTRL_4: + case ARIZONA_MISC_PAD_CTRL_5: + case ARIZONA_INTERRUPT_STATUS_1: + case ARIZONA_INTERRUPT_STATUS_2: + case ARIZONA_INTERRUPT_STATUS_3: + case ARIZONA_INTERRUPT_STATUS_4: + case ARIZONA_INTERRUPT_STATUS_5: + case ARIZONA_INTERRUPT_STATUS_1_MASK: + case ARIZONA_INTERRUPT_STATUS_3_MASK: + case ARIZONA_INTERRUPT_STATUS_4_MASK: + case ARIZONA_INTERRUPT_STATUS_5_MASK: + case ARIZONA_INTERRUPT_CONTROL: + case ARIZONA_IRQ2_STATUS_1: + case ARIZONA_IRQ2_STATUS_3: + case ARIZONA_IRQ2_STATUS_4: + case ARIZONA_IRQ2_STATUS_5: + case ARIZONA_IRQ2_STATUS_1_MASK: + case ARIZONA_IRQ2_STATUS_3_MASK: + case ARIZONA_IRQ2_STATUS_4_MASK: + case ARIZONA_IRQ2_STATUS_5_MASK: + case ARIZONA_IRQ2_CONTROL: + case ARIZONA_INTERRUPT_RAW_STATUS_3: + case ARIZONA_INTERRUPT_RAW_STATUS_4: + case ARIZONA_INTERRUPT_RAW_STATUS_5: + case ARIZONA_INTERRUPT_RAW_STATUS_6: + case ARIZONA_INTERRUPT_RAW_STATUS_7: + case ARIZONA_INTERRUPT_RAW_STATUS_8: + case ARIZONA_IRQ_PIN_STATUS: + case ARIZONA_AOD_WKUP_AND_TRIG: + case ARIZONA_AOD_IRQ1: + case ARIZONA_AOD_IRQ2: + case ARIZONA_AOD_IRQ_MASK_IRQ1: + case ARIZONA_AOD_IRQ_MASK_IRQ2: + case ARIZONA_AOD_IRQ_RAW_STATUS: + case ARIZONA_JACK_DETECT_DEBOUNCE: + case ARIZONA_FX_CTRL1: + case ARIZONA_FX_CTRL2: + case ARIZONA_EQ1_1: + case ARIZONA_EQ1_2: + case ARIZONA_EQ1_3: + case ARIZONA_EQ1_4: + case ARIZONA_EQ1_5: + case ARIZONA_EQ1_6: + case ARIZONA_EQ1_7: + case ARIZONA_EQ1_8: + case ARIZONA_EQ1_9: + case ARIZONA_EQ1_10: + case ARIZONA_EQ1_11: + case ARIZONA_EQ1_12: + case ARIZONA_EQ1_13: + case ARIZONA_EQ1_14: + case ARIZONA_EQ1_15: + case ARIZONA_EQ1_16: + case ARIZONA_EQ1_17: + case ARIZONA_EQ1_18: + case ARIZONA_EQ1_19: + case ARIZONA_EQ1_20: + case ARIZONA_EQ1_21: + case ARIZONA_EQ2_1: + case ARIZONA_EQ2_2: + case ARIZONA_EQ2_3: + case ARIZONA_EQ2_4: + case ARIZONA_EQ2_5: + case ARIZONA_EQ2_6: + case ARIZONA_EQ2_7: + case ARIZONA_EQ2_8: + case ARIZONA_EQ2_9: + case ARIZONA_EQ2_10: + case ARIZONA_EQ2_11: + case ARIZONA_EQ2_12: + case ARIZONA_EQ2_13: + case ARIZONA_EQ2_14: + case ARIZONA_EQ2_15: + case ARIZONA_EQ2_16: + case ARIZONA_EQ2_17: + case ARIZONA_EQ2_18: + case ARIZONA_EQ2_19: + case ARIZONA_EQ2_20: + case ARIZONA_EQ2_21: + case ARIZONA_EQ3_1: + case ARIZONA_EQ3_2: + case ARIZONA_EQ3_3: + case ARIZONA_EQ3_4: + case ARIZONA_EQ3_5: + case ARIZONA_EQ3_6: + case ARIZONA_EQ3_7: + case ARIZONA_EQ3_8: + case ARIZONA_EQ3_9: + case ARIZONA_EQ3_10: + case ARIZONA_EQ3_11: + case ARIZONA_EQ3_12: + case ARIZONA_EQ3_13: + case ARIZONA_EQ3_14: + case ARIZONA_EQ3_15: + case ARIZONA_EQ3_16: + case ARIZONA_EQ3_17: + case ARIZONA_EQ3_18: + case ARIZONA_EQ3_19: + case ARIZONA_EQ3_20: + case ARIZONA_EQ3_21: + case ARIZONA_EQ4_1: + case ARIZONA_EQ4_2: + case ARIZONA_EQ4_3: + case ARIZONA_EQ4_4: + case ARIZONA_EQ4_5: + case ARIZONA_EQ4_6: + case ARIZONA_EQ4_7: + case ARIZONA_EQ4_8: + case ARIZONA_EQ4_9: + case ARIZONA_EQ4_10: + case ARIZONA_EQ4_11: + case ARIZONA_EQ4_12: + case ARIZONA_EQ4_13: + case ARIZONA_EQ4_14: + case ARIZONA_EQ4_15: + case ARIZONA_EQ4_16: + case ARIZONA_EQ4_17: + case ARIZONA_EQ4_18: + case ARIZONA_EQ4_19: + case ARIZONA_EQ4_20: + case ARIZONA_EQ4_21: + case ARIZONA_DRC1_CTRL1: + case ARIZONA_DRC1_CTRL2: + case ARIZONA_DRC1_CTRL3: + case ARIZONA_DRC1_CTRL4: + case ARIZONA_DRC1_CTRL5: + case ARIZONA_HPLPF1_1: + case ARIZONA_HPLPF1_2: + case ARIZONA_HPLPF2_1: + case ARIZONA_HPLPF2_2: + case ARIZONA_HPLPF3_1: + case ARIZONA_HPLPF3_2: + case ARIZONA_HPLPF4_1: + case ARIZONA_HPLPF4_2: + case ARIZONA_ISRC_1_CTRL_1: + case ARIZONA_ISRC_1_CTRL_2: + case ARIZONA_ISRC_1_CTRL_3: + case ARIZONA_ISRC_2_CTRL_1: + case ARIZONA_ISRC_2_CTRL_2: + case ARIZONA_ISRC_2_CTRL_3: + return true; + default: + return false; + } +} + +static bool wm8997_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_SOFTWARE_RESET: + case ARIZONA_DEVICE_REVISION: + case ARIZONA_HAPTICS_STATUS: + case ARIZONA_SAMPLE_RATE_1_STATUS: + case ARIZONA_SAMPLE_RATE_2_STATUS: + case ARIZONA_SAMPLE_RATE_3_STATUS: + case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: + case ARIZONA_MIC_DETECT_3: + case ARIZONA_HEADPHONE_DETECT_2: + case ARIZONA_INPUT_ENABLES_STATUS: + case ARIZONA_OUTPUT_STATUS_1: + case ARIZONA_RAW_OUTPUT_STATUS_1: + case ARIZONA_SLIMBUS_RX_PORT_STATUS: + case ARIZONA_SLIMBUS_TX_PORT_STATUS: + case ARIZONA_INTERRUPT_STATUS_1: + case ARIZONA_INTERRUPT_STATUS_2: + case ARIZONA_INTERRUPT_STATUS_3: + case ARIZONA_INTERRUPT_STATUS_4: + case ARIZONA_INTERRUPT_STATUS_5: + case ARIZONA_IRQ2_STATUS_1: + case ARIZONA_IRQ2_STATUS_3: + case ARIZONA_IRQ2_STATUS_4: + case ARIZONA_IRQ2_STATUS_5: + case ARIZONA_INTERRUPT_RAW_STATUS_3: + case ARIZONA_INTERRUPT_RAW_STATUS_4: + case ARIZONA_INTERRUPT_RAW_STATUS_5: + case ARIZONA_INTERRUPT_RAW_STATUS_6: + case ARIZONA_INTERRUPT_RAW_STATUS_7: + case ARIZONA_INTERRUPT_RAW_STATUS_8: + case ARIZONA_IRQ_PIN_STATUS: + case ARIZONA_AOD_WKUP_AND_TRIG: + case ARIZONA_AOD_IRQ1: + case ARIZONA_AOD_IRQ2: + case ARIZONA_AOD_IRQ_RAW_STATUS: + case ARIZONA_FX_CTRL2: + return true; + default: + return false; + } +} + +#define WM8997_MAX_REGISTER 0x31ff + +const struct regmap_config wm8997_i2c_regmap = { + .reg_bits = 32, + .val_bits = 16, + + .max_register = WM8997_MAX_REGISTER, + .readable_reg = wm8997_readable_register, + .volatile_reg = wm8997_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = wm8997_reg_default, + .num_reg_defaults = ARRAY_SIZE(wm8997_reg_default), +}; +EXPORT_SYMBOL_GPL(wm8997_i2c_regmap); diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index de5bb1b2257..6c60ba730d1 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -23,6 +23,7 @@ enum arizona_type { WM5102 = 1, WM5110 = 2, + WM8997 = 3, WM8280 = 4 }; @@ -126,6 +127,7 @@ int arizona_set_irq_wake(struct arizona *arizona, int irq, int on); int wm5102_patch(struct arizona *arizona); int florida_patch(struct arizona *arizona); +int wm8997_patch(struct arizona *arizona); extern int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, bool mandatory, int *gpio); From 7c9c7fc493adbd3ce0c43583ef517e76baf0f063 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 17 Jul 2013 12:21:09 +0100 Subject: [PATCH 0271/1167] mfd: wm8997: Make Kconfig prompt for WM8997 more consistent The Kconfig prompt for WM8997 says "Support for..." while the other MFD Kconfigs (including the adjacent ones for other Arizona devices) just list the device name which sticks out like a sore thumb when doing configuration. Signed-off-by: Mark Brown Signed-off-by: Lee Jones Signed-off-by: Samuel Ortiz (cherry picked from commit ca16ecbccb718c8ba3a5d896f160831a10f8cdfb) Signed-off-by: Charles Keepax --- drivers/mfd/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 05d070ca3c0..e172411f72e 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1048,7 +1048,7 @@ config MFD_FLORIDA such as the WM8280 config MFD_WM8997 - bool "Support Wolfson Microelectronics WM8997" + bool "Wolfson Microelectronics WM8997" depends on MFD_ARIZONA help Support for Wolfson Microelectronics WM8997 low power audio SoC From 6a288f00e3cb4d2ab92ccf7c49da670f89ea1831 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 12 Aug 2013 23:46:55 +0100 Subject: [PATCH 0272/1167] ASoC: wm8997: Initial CODEC driver The wm8997 is a compact, high-performance audio hub CODEC with SLIMbus interfacing, for smartphones, tablets and other portable audio devices based on the Arizona platform. This patch adds the wm8997 CODEC driver. [Fixed some interface churn from bitrot due to the patch not going via the MFD tree as expected -- broonie] Signed-off-by: Charles Keepax Signed-off-by: Mark Brown (cherry picked from commit 40843aea5a9bd2c3d7917d086e6d23cb02cc4b39) Signed-off-by: Charles Keepax --- sound/soc/codecs/Kconfig | 6 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/arizona.c | 13 +- sound/soc/codecs/wm8997.c | 1179 ++++++++++++++++++++++++++++++++++++ sound/soc/codecs/wm8997.h | 23 + 5 files changed, 1220 insertions(+), 3 deletions(-) create mode 100644 sound/soc/codecs/wm8997.c create mode 100644 sound/soc/codecs/wm8997.h diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index c7a250827b2..c52bac71c0d 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -120,6 +120,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_WM8994 if MFD_WM8994 select SND_SOC_WM8995 if SND_SOC_I2C_AND_SPI select SND_SOC_WM8996 if I2C + select SND_SOC_WM8997 if MFD_WM8997 select SND_SOC_WM9081 if I2C select SND_SOC_WM9090 if I2C select SND_SOC_WM9705 if SND_SOC_AC97_BUS @@ -143,8 +144,10 @@ config SND_SOC_ARIZONA tristate default y if SND_SOC_WM5102=y default y if SND_SOC_FLORIDA=y + default y if SND_SOC_WM8997=y default m if SND_SOC_WM5102=m default m if SND_SOC_FLORIDA=m + default m if SND_SOC_WM8997=m config SND_SOC_WM_HUBS tristate @@ -494,6 +497,9 @@ config SND_SOC_WM8995 config SND_SOC_WM8996 tristate +config SND_SOC_WM8997 + tristate + config SND_SOC_WM9081 tristate diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 301552c1e17..e132d85a7eb 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -112,6 +112,7 @@ snd-soc-wm8991-objs := wm8991.o snd-soc-wm8993-objs := wm8993.o snd-soc-wm8994-objs := wm8994.o wm8958-dsp2.o snd-soc-wm8995-objs := wm8995.o +snd-soc-wm8997-objs := wm8997.o snd-soc-wm9081-objs := wm9081.o snd-soc-wm9090-objs := wm9090.o snd-soc-wm9705-objs := wm9705.o @@ -235,6 +236,7 @@ obj-$(CONFIG_SND_SOC_WM8991) += snd-soc-wm8991.o obj-$(CONFIG_SND_SOC_WM8993) += snd-soc-wm8993.o obj-$(CONFIG_SND_SOC_WM8994) += snd-soc-wm8994.o obj-$(CONFIG_SND_SOC_WM8995) += snd-soc-wm8995.o +obj-$(CONFIG_SND_SOC_WM8997) += snd-soc-wm8997.o obj-$(CONFIG_SND_SOC_WM9081) += snd-soc-wm9081.o obj-$(CONFIG_SND_SOC_WM9090) += snd-soc-wm9090.o obj-$(CONFIG_SND_SOC_WM9705) += snd-soc-wm9705.o diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index aac685b83e9..99d48dc0941 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -217,9 +217,16 @@ int arizona_init_spk(struct snd_soc_codec *codec) if (ret != 0) return ret; - ret = snd_soc_dapm_new_controls(&codec->dapm, &arizona_spkr, 1); - if (ret != 0) - return ret; + switch (arizona->type) { + case WM8997: + break; + default: + ret = snd_soc_dapm_new_controls(&codec->dapm, + &arizona_spkr, 1); + if (ret != 0) + return ret; + break; + } ret = arizona_request_irq(arizona, ARIZONA_IRQ_SPK_SHUTDOWN_WARN, "Thermal warning", arizona_thermal_warn, diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c new file mode 100644 index 00000000000..4f208cc76d2 --- /dev/null +++ b/sound/soc/codecs/wm8997.c @@ -0,0 +1,1179 @@ +/* + * wm8997.c -- WM8997 ALSA SoC Audio driver + * + * Copyright 2012 Wolfson Microelectronics plc + * + * Author: Charles Keepax + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "arizona.h" +#include "wm8997.h" + +struct wm8997_priv { + struct arizona_priv core; + struct arizona_fll fll[2]; +}; + +static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); +static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); +static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); +static DECLARE_TLV_DB_SCALE(noise_tlv, 0, 600, 0); +static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); + +static const struct reg_default wm8997_sysclk_reva_patch[] = { + { 0x301D, 0x7B15 }, + { 0x301B, 0x0050 }, + { 0x305D, 0x7B17 }, + { 0x305B, 0x0050 }, + { 0x3001, 0x08FE }, + { 0x3003, 0x00F4 }, + { 0x3041, 0x08FF }, + { 0x3043, 0x0005 }, + { 0x3020, 0x0225 }, + { 0x3021, 0x0A00 }, + { 0x3022, 0xE24D }, + { 0x3023, 0x0800 }, + { 0x3024, 0xE24D }, + { 0x3025, 0xF000 }, + { 0x3060, 0x0226 }, + { 0x3061, 0x0A00 }, + { 0x3062, 0xE252 }, + { 0x3063, 0x0800 }, + { 0x3064, 0xE252 }, + { 0x3065, 0xF000 }, + { 0x3116, 0x022B }, + { 0x3117, 0xFA00 }, + { 0x3110, 0x246C }, + { 0x3111, 0x0A03 }, + { 0x3112, 0x246E }, + { 0x3113, 0x0A03 }, + { 0x3114, 0x2470 }, + { 0x3115, 0x0A03 }, + { 0x3126, 0x246C }, + { 0x3127, 0x0A02 }, + { 0x3128, 0x246E }, + { 0x3129, 0x0A02 }, + { 0x312A, 0x2470 }, + { 0x312B, 0xFA02 }, + { 0x3125, 0x0800 }, +}; + +static int wm8997_sysclk_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + struct regmap *regmap = codec->control_data; + const struct reg_default *patch = NULL; + int i, patch_size; + + switch (arizona->rev) { + case 0: + patch = wm8997_sysclk_reva_patch; + patch_size = ARRAY_SIZE(wm8997_sysclk_reva_patch); + break; + default: + break; + } + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + if (patch) + for (i = 0; i < patch_size; i++) + regmap_write(regmap, patch[i].reg, + patch[i].def); + break; + default: + break; + } + + return 0; +} + +static const char *wm8997_osr_text[] = { + "Low power", "Normal", "High performance", +}; + +static const unsigned int wm8997_osr_val[] = { + 0x0, 0x3, 0x5, +}; + +static const struct soc_enum wm8997_hpout_osr[] = { + SOC_VALUE_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_1L, + ARIZONA_OUT1_OSR_SHIFT, 0x7, 3, + wm8997_osr_text, wm8997_osr_val), + SOC_VALUE_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_3L, + ARIZONA_OUT3_OSR_SHIFT, 0x7, 3, + wm8997_osr_text, wm8997_osr_val), +}; + +#define WM8997_NG_SRC(name, base) \ + SOC_SINGLE(name " NG HPOUT1L Switch", base, 0, 1, 0), \ + SOC_SINGLE(name " NG HPOUT1R Switch", base, 1, 1, 0), \ + SOC_SINGLE(name " NG EPOUT Switch", base, 4, 1, 0), \ + SOC_SINGLE(name " NG SPKOUT Switch", base, 6, 1, 0), \ + SOC_SINGLE(name " NG SPKDAT1L Switch", base, 8, 1, 0), \ + SOC_SINGLE(name " NG SPKDAT1R Switch", base, 9, 1, 0) + +static const struct snd_kcontrol_new wm8997_snd_controls[] = { +SOC_SINGLE("IN1 High Performance Switch", ARIZONA_IN1L_CONTROL, + ARIZONA_IN1_OSR_SHIFT, 1, 0), +SOC_SINGLE("IN2 High Performance Switch", ARIZONA_IN2L_CONTROL, + ARIZONA_IN2_OSR_SHIFT, 1, 0), + +SOC_SINGLE_RANGE_TLV("IN1L Volume", ARIZONA_IN1L_CONTROL, + ARIZONA_IN1L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), +SOC_SINGLE_RANGE_TLV("IN1R Volume", ARIZONA_IN1R_CONTROL, + ARIZONA_IN1R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), +SOC_SINGLE_RANGE_TLV("IN2L Volume", ARIZONA_IN2L_CONTROL, + ARIZONA_IN2L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), +SOC_SINGLE_RANGE_TLV("IN2R Volume", ARIZONA_IN2R_CONTROL, + ARIZONA_IN2R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), + +SOC_SINGLE_TLV("IN1L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN1R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1R, + ARIZONA_IN1R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN2L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_2L, + ARIZONA_IN2L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN2R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_2R, + ARIZONA_IN2R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), + +SOC_ENUM("Input Ramp Up", arizona_in_vi_ramp), +SOC_ENUM("Input Ramp Down", arizona_in_vd_ramp), + +ARIZONA_MIXER_CONTROLS("EQ1", ARIZONA_EQ1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("EQ4", ARIZONA_EQ4MIX_INPUT_1_SOURCE), + +SND_SOC_BYTES_MASK("EQ1 Coefficeints", ARIZONA_EQ1_1, 21, + ARIZONA_EQ1_ENA_MASK), +SND_SOC_BYTES_MASK("EQ2 Coefficeints", ARIZONA_EQ2_1, 21, + ARIZONA_EQ2_ENA_MASK), +SND_SOC_BYTES_MASK("EQ3 Coefficeints", ARIZONA_EQ3_1, 21, + ARIZONA_EQ3_ENA_MASK), +SND_SOC_BYTES_MASK("EQ4 Coefficeints", ARIZONA_EQ4_1, 21, + ARIZONA_EQ4_ENA_MASK), + +SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B2 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B3 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B4 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B5 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +SOC_SINGLE_TLV("EQ2 B1 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B2 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B3 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B4 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B5 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +SOC_SINGLE_TLV("EQ3 B1 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B2 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B3 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B4 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B5 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +SOC_SINGLE_TLV("EQ4 B1 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B2 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B3 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B4 Volume", ARIZONA_EQ4_2, ARIZONA_EQ4_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B5 Volume", ARIZONA_EQ4_2, ARIZONA_EQ4_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +ARIZONA_MIXER_CONTROLS("DRC1L", ARIZONA_DRC1LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DRC1R", ARIZONA_DRC1RMIX_INPUT_1_SOURCE), + +SND_SOC_BYTES_MASK("DRC1", ARIZONA_DRC1_CTRL1, 5, + ARIZONA_DRC1R_ENA | ARIZONA_DRC1L_ENA), + +ARIZONA_MIXER_CONTROLS("LHPF1", ARIZONA_HPLP1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LHPF2", ARIZONA_HPLP2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LHPF3", ARIZONA_HPLP3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LHPF4", ARIZONA_HPLP4MIX_INPUT_1_SOURCE), + +SOC_ENUM("LHPF1 Mode", arizona_lhpf1_mode), +SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode), +SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode), +SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), + +SND_SOC_BYTES("LHPF1 Coefficients", ARIZONA_HPLPF1_2, 1), +SND_SOC_BYTES("LHPF2 Coefficients", ARIZONA_HPLPF2_2, 1), +SND_SOC_BYTES("LHPF3 Coefficients", ARIZONA_HPLPF3_2, 1), +SND_SOC_BYTES("LHPF4 Coefficients", ARIZONA_HPLPF4_2, 1), + +SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), +SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), + +ARIZONA_MIXER_CONTROLS("Mic", ARIZONA_MICMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("Noise", ARIZONA_NOISEMIX_INPUT_1_SOURCE), + +SOC_SINGLE_TLV("Noise Generator Volume", ARIZONA_COMFORT_NOISE_GENERATOR, + ARIZONA_NOISE_GEN_GAIN_SHIFT, 0x16, 0, noise_tlv), + +ARIZONA_MIXER_CONTROLS("HPOUT1L", ARIZONA_OUT1LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("HPOUT1R", ARIZONA_OUT1RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("EPOUT", ARIZONA_OUT3LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SPKOUT", ARIZONA_OUT4LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SPKDAT1L", ARIZONA_OUT5LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SPKDAT1R", ARIZONA_OUT5RMIX_INPUT_1_SOURCE), + +SOC_SINGLE("Speaker High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_4L, + ARIZONA_OUT4_OSR_SHIFT, 1, 0), +SOC_SINGLE("SPKDAT1 High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_5L, + ARIZONA_OUT5_OSR_SHIFT, 1, 0), + +SOC_DOUBLE_R("HPOUT1 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_1L, + ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_MUTE_SHIFT, 1, 1), +SOC_SINGLE("EPOUT Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_3L, + ARIZONA_OUT3L_MUTE_SHIFT, 1, 1), +SOC_SINGLE("Speaker Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_4L, + ARIZONA_OUT4L_MUTE_SHIFT, 1, 1), +SOC_DOUBLE_R("SPKDAT1 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_5L, + ARIZONA_DAC_DIGITAL_VOLUME_5R, ARIZONA_OUT5L_MUTE_SHIFT, 1, 1), + +SOC_DOUBLE_R_TLV("HPOUT1 Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_1L, + ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_VOL_SHIFT, + 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("EPOUT Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_3L, + ARIZONA_OUT3L_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("Speaker Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_4L, + ARIZONA_OUT4L_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_DOUBLE_R_TLV("SPKDAT1 Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_5L, + ARIZONA_DAC_DIGITAL_VOLUME_5R, ARIZONA_OUT5L_VOL_SHIFT, + 0xbf, 0, digital_tlv), + +SOC_VALUE_ENUM("HPOUT1 OSR", wm8997_hpout_osr[0]), +SOC_VALUE_ENUM("EPOUT OSR", wm8997_hpout_osr[1]), + +SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp), +SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp), + +SOC_DOUBLE("SPKDAT1 Switch", ARIZONA_PDM_SPK1_CTRL_1, ARIZONA_SPK1L_MUTE_SHIFT, + ARIZONA_SPK1R_MUTE_SHIFT, 1, 1), + +SOC_SINGLE("Noise Gate Switch", ARIZONA_NOISE_GATE_CONTROL, + ARIZONA_NGATE_ENA_SHIFT, 1, 0), +SOC_SINGLE_TLV("Noise Gate Threshold Volume", ARIZONA_NOISE_GATE_CONTROL, + ARIZONA_NGATE_THR_SHIFT, 7, 1, ng_tlv), +SOC_ENUM("Noise Gate Hold", arizona_ng_hold), + +WM8997_NG_SRC("HPOUT1L", ARIZONA_NOISE_GATE_SELECT_1L), +WM8997_NG_SRC("HPOUT1R", ARIZONA_NOISE_GATE_SELECT_1R), +WM8997_NG_SRC("EPOUT", ARIZONA_NOISE_GATE_SELECT_3L), +WM8997_NG_SRC("SPKOUT", ARIZONA_NOISE_GATE_SELECT_4L), +WM8997_NG_SRC("SPKDAT1L", ARIZONA_NOISE_GATE_SELECT_5L), +WM8997_NG_SRC("SPKDAT1R", ARIZONA_NOISE_GATE_SELECT_5R), + +ARIZONA_MIXER_CONTROLS("AIF1TX1", ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX2", ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX3", ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX4", ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX5", ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX6", ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX7", ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX8", ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("AIF2TX1", ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX2", ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("SLIMTX1", ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX2", ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX3", ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX4", ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX5", ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX6", ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX7", ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX8", ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE), +}; + +ARIZONA_MIXER_ENUMS(EQ1, ARIZONA_EQ1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(EQ2, ARIZONA_EQ2MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(EQ3, ARIZONA_EQ3MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(EQ4, ARIZONA_EQ4MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(DRC1L, ARIZONA_DRC1LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(DRC1R, ARIZONA_DRC1RMIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(LHPF1, ARIZONA_HPLP1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(LHPF2, ARIZONA_HPLP2MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(LHPF3, ARIZONA_HPLP3MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(LHPF4, ARIZONA_HPLP4MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(Mic, ARIZONA_MICMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(Noise, ARIZONA_NOISEMIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(PWM1, ARIZONA_PWM1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(PWM2, ARIZONA_PWM2MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(OUT1L, ARIZONA_OUT1LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(OUT1R, ARIZONA_OUT1RMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(OUT3, ARIZONA_OUT3LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SPKOUT, ARIZONA_OUT4LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SPKDAT1L, ARIZONA_OUT5LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SPKDAT1R, ARIZONA_OUT5RMIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(AIF1TX1, ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX2, ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX3, ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX4, ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX5, ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX6, ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX7, ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX8, ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(AIF2TX1, ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX2, ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(SLIMTX1, ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX2, ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX3, ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX4, ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX5, ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX6, ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX7, ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX8, ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC1INT1, ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1INT2, ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC1DEC1, ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1DEC2, ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC2INT1, ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2INT2, ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC2DEC1, ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2DEC2, ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE); + +static const char *wm8997_aec_loopback_texts[] = { + "HPOUT1L", "HPOUT1R", "EPOUT", "SPKOUT", "SPKDAT1L", "SPKDAT1R", +}; + +static const unsigned int wm8997_aec_loopback_values[] = { + 0, 1, 4, 6, 8, 9, +}; + +static const struct soc_enum wm8997_aec_loopback = + SOC_VALUE_ENUM_SINGLE(ARIZONA_DAC_AEC_CONTROL_1, + ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, + ARRAY_SIZE(wm8997_aec_loopback_texts), + wm8997_aec_loopback_texts, + wm8997_aec_loopback_values); + +static const struct snd_kcontrol_new wm8997_aec_loopback_mux = + SOC_DAPM_VALUE_ENUM("AEC Loopback", wm8997_aec_loopback); + +static const struct snd_soc_dapm_widget wm8997_dapm_widgets[] = { +SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT, + 0, wm8997_sysclk_ev, SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_SUPPLY("ASYNCCLK", ARIZONA_ASYNC_CLOCK_1, + ARIZONA_ASYNC_CLK_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK, + ARIZONA_OPCLK_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("ASYNCOPCLK", ARIZONA_OUTPUT_ASYNC_CLOCK, + ARIZONA_OPCLK_ASYNC_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_REGULATOR_SUPPLY("DBVDD2", 0, 0), +SND_SOC_DAPM_REGULATOR_SUPPLY("CPVDD", 20, 0), +SND_SOC_DAPM_REGULATOR_SUPPLY("MICVDD", 0, SND_SOC_DAPM_REGULATOR_BYPASS), +SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDD", 0, 0), + +SND_SOC_DAPM_SIGGEN("TONE"), +SND_SOC_DAPM_SIGGEN("NOISE"), +SND_SOC_DAPM_SIGGEN("HAPTICS"), + +SND_SOC_DAPM_INPUT("IN1L"), +SND_SOC_DAPM_INPUT("IN1R"), +SND_SOC_DAPM_INPUT("IN2L"), +SND_SOC_DAPM_INPUT("IN2R"), + +SND_SOC_DAPM_PGA_E("IN1L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN1L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN1R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN1R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN2L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN2L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN2R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN2R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), + +SND_SOC_DAPM_SUPPLY("MICBIAS1", ARIZONA_MIC_BIAS_CTRL_1, + ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS2", ARIZONA_MIC_BIAS_CTRL_2, + ARIZONA_MICB2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS3", ARIZONA_MIC_BIAS_CTRL_3, + ARIZONA_MICB3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("Noise Generator", ARIZONA_COMFORT_NOISE_GENERATOR, + ARIZONA_NOISE_GEN_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("Tone Generator 1", ARIZONA_TONE_GENERATOR_1, + ARIZONA_TONE1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("Tone Generator 2", ARIZONA_TONE_GENERATOR_1, + ARIZONA_TONE2_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("Mic Mute Mixer", ARIZONA_MIC_NOISE_MIX_CONTROL_1, + ARIZONA_MICMUTE_MIX_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("EQ1", ARIZONA_EQ1_1, ARIZONA_EQ1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ2", ARIZONA_EQ2_1, ARIZONA_EQ2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ3", ARIZONA_EQ3_1, ARIZONA_EQ3_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ4", ARIZONA_EQ4_1, ARIZONA_EQ4_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("DRC1L", ARIZONA_DRC1_CTRL1, ARIZONA_DRC1L_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("DRC1R", ARIZONA_DRC1_CTRL1, ARIZONA_DRC1R_ENA_SHIFT, 0, + NULL, 0), + +SND_SOC_DAPM_PGA("LHPF1", ARIZONA_HPLPF1_1, ARIZONA_LHPF1_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF2", ARIZONA_HPLPF2_1, ARIZONA_LHPF2_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF3", ARIZONA_HPLPF3_1, ARIZONA_LHPF3_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF4", ARIZONA_HPLPF4_1, ARIZONA_LHPF4_ENA_SHIFT, 0, + NULL, 0), + +SND_SOC_DAPM_PGA("PWM1 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM1_ENA_SHIFT, + 0, NULL, 0), +SND_SOC_DAPM_PGA("PWM2 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM2_ENA_SHIFT, + 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT2", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC1DEC1", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC2", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC2INT1", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT2", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC2DEC1", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC2", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_AIF_OUT("AIF1TX1", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX2", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX3", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX4", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX5", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX6", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX7", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX8", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF1RX1", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX2", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX3", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX4", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX5", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX6", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX7", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX8", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("AIF2TX1", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX2", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX2", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("SLIMTX1", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX2", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX3", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX4", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX5", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX6", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX7", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX8", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("SLIMRX1", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX2", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX3", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX4", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX5", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX6", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX7", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX8", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, + ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, + &wm8997_aec_loopback_mux), + +SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, + ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, + ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT3L", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT3L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT5L", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT5L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT5R", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT5R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + +ARIZONA_MIXER_WIDGETS(EQ1, "EQ1"), +ARIZONA_MIXER_WIDGETS(EQ2, "EQ2"), +ARIZONA_MIXER_WIDGETS(EQ3, "EQ3"), +ARIZONA_MIXER_WIDGETS(EQ4, "EQ4"), + +ARIZONA_MIXER_WIDGETS(DRC1L, "DRC1L"), +ARIZONA_MIXER_WIDGETS(DRC1R, "DRC1R"), + +ARIZONA_MIXER_WIDGETS(LHPF1, "LHPF1"), +ARIZONA_MIXER_WIDGETS(LHPF2, "LHPF2"), +ARIZONA_MIXER_WIDGETS(LHPF3, "LHPF3"), +ARIZONA_MIXER_WIDGETS(LHPF4, "LHPF4"), + +ARIZONA_MIXER_WIDGETS(Mic, "Mic"), +ARIZONA_MIXER_WIDGETS(Noise, "Noise"), + +ARIZONA_MIXER_WIDGETS(PWM1, "PWM1"), +ARIZONA_MIXER_WIDGETS(PWM2, "PWM2"), + +ARIZONA_MIXER_WIDGETS(OUT1L, "HPOUT1L"), +ARIZONA_MIXER_WIDGETS(OUT1R, "HPOUT1R"), +ARIZONA_MIXER_WIDGETS(OUT3, "EPOUT"), +ARIZONA_MIXER_WIDGETS(SPKOUT, "SPKOUT"), +ARIZONA_MIXER_WIDGETS(SPKDAT1L, "SPKDAT1L"), +ARIZONA_MIXER_WIDGETS(SPKDAT1R, "SPKDAT1R"), + +ARIZONA_MIXER_WIDGETS(AIF1TX1, "AIF1TX1"), +ARIZONA_MIXER_WIDGETS(AIF1TX2, "AIF1TX2"), +ARIZONA_MIXER_WIDGETS(AIF1TX3, "AIF1TX3"), +ARIZONA_MIXER_WIDGETS(AIF1TX4, "AIF1TX4"), +ARIZONA_MIXER_WIDGETS(AIF1TX5, "AIF1TX5"), +ARIZONA_MIXER_WIDGETS(AIF1TX6, "AIF1TX6"), +ARIZONA_MIXER_WIDGETS(AIF1TX7, "AIF1TX7"), +ARIZONA_MIXER_WIDGETS(AIF1TX8, "AIF1TX8"), + +ARIZONA_MIXER_WIDGETS(AIF2TX1, "AIF2TX1"), +ARIZONA_MIXER_WIDGETS(AIF2TX2, "AIF2TX2"), + +ARIZONA_MIXER_WIDGETS(SLIMTX1, "SLIMTX1"), +ARIZONA_MIXER_WIDGETS(SLIMTX2, "SLIMTX2"), +ARIZONA_MIXER_WIDGETS(SLIMTX3, "SLIMTX3"), +ARIZONA_MIXER_WIDGETS(SLIMTX4, "SLIMTX4"), +ARIZONA_MIXER_WIDGETS(SLIMTX5, "SLIMTX5"), +ARIZONA_MIXER_WIDGETS(SLIMTX6, "SLIMTX6"), +ARIZONA_MIXER_WIDGETS(SLIMTX7, "SLIMTX7"), +ARIZONA_MIXER_WIDGETS(SLIMTX8, "SLIMTX8"), + +ARIZONA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), +ARIZONA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"), + +ARIZONA_MUX_WIDGETS(ISRC1INT1, "ISRC1INT1"), +ARIZONA_MUX_WIDGETS(ISRC1INT2, "ISRC1INT2"), + +ARIZONA_MUX_WIDGETS(ISRC2DEC1, "ISRC2DEC1"), +ARIZONA_MUX_WIDGETS(ISRC2DEC2, "ISRC2DEC2"), + +ARIZONA_MUX_WIDGETS(ISRC2INT1, "ISRC2INT1"), +ARIZONA_MUX_WIDGETS(ISRC2INT2, "ISRC2INT2"), + +SND_SOC_DAPM_OUTPUT("HPOUT1L"), +SND_SOC_DAPM_OUTPUT("HPOUT1R"), +SND_SOC_DAPM_OUTPUT("EPOUTN"), +SND_SOC_DAPM_OUTPUT("EPOUTP"), +SND_SOC_DAPM_OUTPUT("SPKOUTN"), +SND_SOC_DAPM_OUTPUT("SPKOUTP"), +SND_SOC_DAPM_OUTPUT("SPKDAT1L"), +SND_SOC_DAPM_OUTPUT("SPKDAT1R"), + +SND_SOC_DAPM_OUTPUT("MICSUPP"), +}; + +#define ARIZONA_MIXER_INPUT_ROUTES(name) \ + { name, "Noise Generator", "Noise Generator" }, \ + { name, "Tone Generator 1", "Tone Generator 1" }, \ + { name, "Tone Generator 2", "Tone Generator 2" }, \ + { name, "Haptics", "HAPTICS" }, \ + { name, "AEC", "AEC Loopback" }, \ + { name, "IN1L", "IN1L PGA" }, \ + { name, "IN1R", "IN1R PGA" }, \ + { name, "IN2L", "IN2L PGA" }, \ + { name, "IN2R", "IN2R PGA" }, \ + { name, "Mic Mute Mixer", "Mic Mute Mixer" }, \ + { name, "AIF1RX1", "AIF1RX1" }, \ + { name, "AIF1RX2", "AIF1RX2" }, \ + { name, "AIF1RX3", "AIF1RX3" }, \ + { name, "AIF1RX4", "AIF1RX4" }, \ + { name, "AIF1RX5", "AIF1RX5" }, \ + { name, "AIF1RX6", "AIF1RX6" }, \ + { name, "AIF1RX7", "AIF1RX7" }, \ + { name, "AIF1RX8", "AIF1RX8" }, \ + { name, "AIF2RX1", "AIF2RX1" }, \ + { name, "AIF2RX2", "AIF2RX2" }, \ + { name, "SLIMRX1", "SLIMRX1" }, \ + { name, "SLIMRX2", "SLIMRX2" }, \ + { name, "SLIMRX3", "SLIMRX3" }, \ + { name, "SLIMRX4", "SLIMRX4" }, \ + { name, "SLIMRX5", "SLIMRX5" }, \ + { name, "SLIMRX6", "SLIMRX6" }, \ + { name, "SLIMRX7", "SLIMRX7" }, \ + { name, "SLIMRX8", "SLIMRX8" }, \ + { name, "EQ1", "EQ1" }, \ + { name, "EQ2", "EQ2" }, \ + { name, "EQ3", "EQ3" }, \ + { name, "EQ4", "EQ4" }, \ + { name, "DRC1L", "DRC1L" }, \ + { name, "DRC1R", "DRC1R" }, \ + { name, "LHPF1", "LHPF1" }, \ + { name, "LHPF2", "LHPF2" }, \ + { name, "LHPF3", "LHPF3" }, \ + { name, "LHPF4", "LHPF4" }, \ + { name, "ISRC1DEC1", "ISRC1DEC1" }, \ + { name, "ISRC1DEC2", "ISRC1DEC2" }, \ + { name, "ISRC1INT1", "ISRC1INT1" }, \ + { name, "ISRC1INT2", "ISRC1INT2" }, \ + { name, "ISRC2DEC1", "ISRC2DEC1" }, \ + { name, "ISRC2DEC2", "ISRC2DEC2" }, \ + { name, "ISRC2INT1", "ISRC2INT1" }, \ + { name, "ISRC2INT2", "ISRC2INT2" } + +static const struct snd_soc_dapm_route wm8997_dapm_routes[] = { + { "AIF2 Capture", NULL, "DBVDD2" }, + { "AIF2 Playback", NULL, "DBVDD2" }, + + { "OUT1L", NULL, "CPVDD" }, + { "OUT1R", NULL, "CPVDD" }, + { "OUT3L", NULL, "CPVDD" }, + + { "OUT4L", NULL, "SPKVDD" }, + + { "OUT1L", NULL, "SYSCLK" }, + { "OUT1R", NULL, "SYSCLK" }, + { "OUT3L", NULL, "SYSCLK" }, + { "OUT4L", NULL, "SYSCLK" }, + + { "IN1L", NULL, "SYSCLK" }, + { "IN1R", NULL, "SYSCLK" }, + { "IN2L", NULL, "SYSCLK" }, + { "IN2R", NULL, "SYSCLK" }, + + { "MICBIAS1", NULL, "MICVDD" }, + { "MICBIAS2", NULL, "MICVDD" }, + { "MICBIAS3", NULL, "MICVDD" }, + + { "Noise Generator", NULL, "SYSCLK" }, + { "Tone Generator 1", NULL, "SYSCLK" }, + { "Tone Generator 2", NULL, "SYSCLK" }, + + { "Noise Generator", NULL, "NOISE" }, + { "Tone Generator 1", NULL, "TONE" }, + { "Tone Generator 2", NULL, "TONE" }, + + { "Mic Mute Mixer", NULL, "Noise Mixer" }, + { "Mic Mute Mixer", NULL, "Mic Mixer" }, + + { "AIF1 Capture", NULL, "AIF1TX1" }, + { "AIF1 Capture", NULL, "AIF1TX2" }, + { "AIF1 Capture", NULL, "AIF1TX3" }, + { "AIF1 Capture", NULL, "AIF1TX4" }, + { "AIF1 Capture", NULL, "AIF1TX5" }, + { "AIF1 Capture", NULL, "AIF1TX6" }, + { "AIF1 Capture", NULL, "AIF1TX7" }, + { "AIF1 Capture", NULL, "AIF1TX8" }, + + { "AIF1RX1", NULL, "AIF1 Playback" }, + { "AIF1RX2", NULL, "AIF1 Playback" }, + { "AIF1RX3", NULL, "AIF1 Playback" }, + { "AIF1RX4", NULL, "AIF1 Playback" }, + { "AIF1RX5", NULL, "AIF1 Playback" }, + { "AIF1RX6", NULL, "AIF1 Playback" }, + { "AIF1RX7", NULL, "AIF1 Playback" }, + { "AIF1RX8", NULL, "AIF1 Playback" }, + + { "AIF2 Capture", NULL, "AIF2TX1" }, + { "AIF2 Capture", NULL, "AIF2TX2" }, + + { "AIF2RX1", NULL, "AIF2 Playback" }, + { "AIF2RX2", NULL, "AIF2 Playback" }, + + { "Slim1 Capture", NULL, "SLIMTX1" }, + { "Slim1 Capture", NULL, "SLIMTX2" }, + { "Slim1 Capture", NULL, "SLIMTX3" }, + { "Slim1 Capture", NULL, "SLIMTX4" }, + + { "SLIMRX1", NULL, "Slim1 Playback" }, + { "SLIMRX2", NULL, "Slim1 Playback" }, + { "SLIMRX3", NULL, "Slim1 Playback" }, + { "SLIMRX4", NULL, "Slim1 Playback" }, + + { "Slim2 Capture", NULL, "SLIMTX5" }, + { "Slim2 Capture", NULL, "SLIMTX6" }, + + { "SLIMRX5", NULL, "Slim2 Playback" }, + { "SLIMRX6", NULL, "Slim2 Playback" }, + + { "Slim3 Capture", NULL, "SLIMTX7" }, + { "Slim3 Capture", NULL, "SLIMTX8" }, + + { "SLIMRX7", NULL, "Slim3 Playback" }, + { "SLIMRX8", NULL, "Slim3 Playback" }, + + { "AIF1 Playback", NULL, "SYSCLK" }, + { "AIF2 Playback", NULL, "SYSCLK" }, + { "Slim1 Playback", NULL, "SYSCLK" }, + { "Slim2 Playback", NULL, "SYSCLK" }, + { "Slim3 Playback", NULL, "SYSCLK" }, + + { "AIF1 Capture", NULL, "SYSCLK" }, + { "AIF2 Capture", NULL, "SYSCLK" }, + { "Slim1 Capture", NULL, "SYSCLK" }, + { "Slim2 Capture", NULL, "SYSCLK" }, + { "Slim3 Capture", NULL, "SYSCLK" }, + + { "IN1L PGA", NULL, "IN1L" }, + { "IN1R PGA", NULL, "IN1R" }, + + { "IN2L PGA", NULL, "IN2L" }, + { "IN2R PGA", NULL, "IN2R" }, + + ARIZONA_MIXER_ROUTES("OUT1L", "HPOUT1L"), + ARIZONA_MIXER_ROUTES("OUT1R", "HPOUT1R"), + ARIZONA_MIXER_ROUTES("OUT3L", "EPOUT"), + + ARIZONA_MIXER_ROUTES("OUT4L", "SPKOUT"), + ARIZONA_MIXER_ROUTES("OUT5L", "SPKDAT1L"), + ARIZONA_MIXER_ROUTES("OUT5R", "SPKDAT1R"), + + ARIZONA_MIXER_ROUTES("PWM1 Driver", "PWM1"), + ARIZONA_MIXER_ROUTES("PWM2 Driver", "PWM2"), + + ARIZONA_MIXER_ROUTES("AIF1TX1", "AIF1TX1"), + ARIZONA_MIXER_ROUTES("AIF1TX2", "AIF1TX2"), + ARIZONA_MIXER_ROUTES("AIF1TX3", "AIF1TX3"), + ARIZONA_MIXER_ROUTES("AIF1TX4", "AIF1TX4"), + ARIZONA_MIXER_ROUTES("AIF1TX5", "AIF1TX5"), + ARIZONA_MIXER_ROUTES("AIF1TX6", "AIF1TX6"), + ARIZONA_MIXER_ROUTES("AIF1TX7", "AIF1TX7"), + ARIZONA_MIXER_ROUTES("AIF1TX8", "AIF1TX8"), + + ARIZONA_MIXER_ROUTES("AIF2TX1", "AIF2TX1"), + ARIZONA_MIXER_ROUTES("AIF2TX2", "AIF2TX2"), + + ARIZONA_MIXER_ROUTES("SLIMTX1", "SLIMTX1"), + ARIZONA_MIXER_ROUTES("SLIMTX2", "SLIMTX2"), + ARIZONA_MIXER_ROUTES("SLIMTX3", "SLIMTX3"), + ARIZONA_MIXER_ROUTES("SLIMTX4", "SLIMTX4"), + ARIZONA_MIXER_ROUTES("SLIMTX5", "SLIMTX5"), + ARIZONA_MIXER_ROUTES("SLIMTX6", "SLIMTX6"), + ARIZONA_MIXER_ROUTES("SLIMTX7", "SLIMTX7"), + ARIZONA_MIXER_ROUTES("SLIMTX8", "SLIMTX8"), + + ARIZONA_MIXER_ROUTES("EQ1", "EQ1"), + ARIZONA_MIXER_ROUTES("EQ2", "EQ2"), + ARIZONA_MIXER_ROUTES("EQ3", "EQ3"), + ARIZONA_MIXER_ROUTES("EQ4", "EQ4"), + + ARIZONA_MIXER_ROUTES("DRC1L", "DRC1L"), + ARIZONA_MIXER_ROUTES("DRC1R", "DRC1R"), + + ARIZONA_MIXER_ROUTES("LHPF1", "LHPF1"), + ARIZONA_MIXER_ROUTES("LHPF2", "LHPF2"), + ARIZONA_MIXER_ROUTES("LHPF3", "LHPF3"), + ARIZONA_MIXER_ROUTES("LHPF4", "LHPF4"), + + ARIZONA_MUX_ROUTES("ISRC1INT1", "ISRC1INT1"), + ARIZONA_MUX_ROUTES("ISRC1INT2", "ISRC2INT2"), + + ARIZONA_MUX_ROUTES("ISRC1DEC1", "ISRC1DEC1"), + ARIZONA_MUX_ROUTES("ISRC1DEC2", "ISRC1DEC2"), + + ARIZONA_MUX_ROUTES("ISRC2INT1", "ISRC2INT1"), + ARIZONA_MUX_ROUTES("ISRC2INT2", "ISRC2INT2"), + + ARIZONA_MUX_ROUTES("ISRC2DEC1", "ISRC2DEC1"), + ARIZONA_MUX_ROUTES("ISRC2DEC2", "ISRC2DEC2"), + + { "AEC Loopback", "HPOUT1L", "OUT1L" }, + { "AEC Loopback", "HPOUT1R", "OUT1R" }, + { "HPOUT1L", NULL, "OUT1L" }, + { "HPOUT1R", NULL, "OUT1R" }, + + { "AEC Loopback", "EPOUT", "OUT3L" }, + { "EPOUTN", NULL, "OUT3L" }, + { "EPOUTP", NULL, "OUT3L" }, + + { "AEC Loopback", "SPKOUT", "OUT4L" }, + { "SPKOUTN", NULL, "OUT4L" }, + { "SPKOUTP", NULL, "OUT4L" }, + + { "AEC Loopback", "SPKDAT1L", "OUT5L" }, + { "AEC Loopback", "SPKDAT1R", "OUT5R" }, + { "SPKDAT1L", NULL, "OUT5L" }, + { "SPKDAT1R", NULL, "OUT5R" }, + + { "MICSUPP", NULL, "SYSCLK" }, +}; + +static int wm8997_set_fll(struct snd_soc_codec *codec, int fll_id, int source, + unsigned int Fref, unsigned int Fout) +{ + struct wm8997_priv *wm8997 = snd_soc_codec_get_drvdata(codec); + + switch (fll_id) { + case WM8997_FLL1: + return arizona_set_fll(&wm8997->fll[0], source, Fref, Fout); + case WM8997_FLL2: + return arizona_set_fll(&wm8997->fll[1], source, Fref, Fout); + case WM8997_FLL1_REFCLK: + return arizona_set_fll_refclk(&wm8997->fll[0], source, Fref, + Fout); + case WM8997_FLL2_REFCLK: + return arizona_set_fll_refclk(&wm8997->fll[1], source, Fref, + Fout); + default: + return -EINVAL; + } +} + +#define WM8997_RATES SNDRV_PCM_RATE_8000_192000 + +#define WM8997_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_driver wm8997_dai[] = { + { + .name = "wm8997-aif1", + .id = 1, + .base = ARIZONA_AIF1_BCLK_CTRL, + .playback = { + .stream_name = "AIF1 Playback", + .channels_min = 1, + .channels_max = 8, + .rates = WM8997_RATES, + .formats = WM8997_FORMATS, + }, + .capture = { + .stream_name = "AIF1 Capture", + .channels_min = 1, + .channels_max = 8, + .rates = WM8997_RATES, + .formats = WM8997_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "wm8997-aif2", + .id = 2, + .base = ARIZONA_AIF2_BCLK_CTRL, + .playback = { + .stream_name = "AIF2 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = WM8997_RATES, + .formats = WM8997_FORMATS, + }, + .capture = { + .stream_name = "AIF2 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = WM8997_RATES, + .formats = WM8997_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "wm8997-slim1", + .id = 3, + .playback = { + .stream_name = "Slim1 Playback", + .channels_min = 1, + .channels_max = 4, + .rates = WM8997_RATES, + .formats = WM8997_FORMATS, + }, + .capture = { + .stream_name = "Slim1 Capture", + .channels_min = 1, + .channels_max = 4, + .rates = WM8997_RATES, + .formats = WM8997_FORMATS, + }, + .ops = &arizona_simple_dai_ops, + }, + { + .name = "wm8997-slim2", + .id = 4, + .playback = { + .stream_name = "Slim2 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = WM8997_RATES, + .formats = WM8997_FORMATS, + }, + .capture = { + .stream_name = "Slim2 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = WM8997_RATES, + .formats = WM8997_FORMATS, + }, + .ops = &arizona_simple_dai_ops, + }, + { + .name = "wm8997-slim3", + .id = 5, + .playback = { + .stream_name = "Slim3 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = WM8997_RATES, + .formats = WM8997_FORMATS, + }, + .capture = { + .stream_name = "Slim3 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = WM8997_RATES, + .formats = WM8997_FORMATS, + }, + .ops = &arizona_simple_dai_ops, + }, +}; + +static int wm8997_codec_probe(struct snd_soc_codec *codec) +{ + struct wm8997_priv *priv = snd_soc_codec_get_drvdata(codec); + int ret; + + codec->control_data = priv->core.arizona->regmap; + + ret = snd_soc_codec_set_cache_io(codec, 32, 16, SND_SOC_REGMAP); + if (ret != 0) + return ret; + + arizona_init_spk(codec); + + snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); + + priv->core.arizona->dapm = &codec->dapm; + + return 0; +} + +static int wm8997_codec_remove(struct snd_soc_codec *codec) +{ + struct wm8997_priv *priv = snd_soc_codec_get_drvdata(codec); + + priv->core.arizona->dapm = NULL; + + return 0; +} + +#define WM8997_DIG_VU 0x0200 + +static unsigned int wm8997_digital_vu[] = { + ARIZONA_DAC_DIGITAL_VOLUME_1L, + ARIZONA_DAC_DIGITAL_VOLUME_1R, + ARIZONA_DAC_DIGITAL_VOLUME_3L, + ARIZONA_DAC_DIGITAL_VOLUME_4L, + ARIZONA_DAC_DIGITAL_VOLUME_5L, + ARIZONA_DAC_DIGITAL_VOLUME_5R, +}; + +static struct snd_soc_codec_driver soc_codec_dev_wm8997 = { + .probe = wm8997_codec_probe, + .remove = wm8997_codec_remove, + + .idle_bias_off = true, + + .set_sysclk = arizona_set_sysclk, + .set_pll = wm8997_set_fll, + + .controls = wm8997_snd_controls, + .num_controls = ARRAY_SIZE(wm8997_snd_controls), + .dapm_widgets = wm8997_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(wm8997_dapm_widgets), + .dapm_routes = wm8997_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(wm8997_dapm_routes), +}; + +static int wm8997_probe(struct platform_device *pdev) +{ + struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); + struct wm8997_priv *wm8997; + int i; + + wm8997 = devm_kzalloc(&pdev->dev, sizeof(struct wm8997_priv), + GFP_KERNEL); + if (wm8997 == NULL) + return -ENOMEM; + platform_set_drvdata(pdev, wm8997); + + /* Set of_node to parent from the SPI device to allow DAPM to + * locate regulator supplies */ + pdev->dev.of_node = arizona->dev->of_node; + + wm8997->core.arizona = arizona; + wm8997->core.num_inputs = 4; + + for (i = 0; i < ARRAY_SIZE(wm8997->fll); i++) + wm8997->fll[i].vco_mult = 1; + + arizona_init_fll(arizona, 1, ARIZONA_FLL1_CONTROL_1 - 1, + ARIZONA_IRQ_FLL1_LOCK, ARIZONA_IRQ_FLL1_CLOCK_OK, + &wm8997->fll[0]); + arizona_init_fll(arizona, 2, ARIZONA_FLL2_CONTROL_1 - 1, + ARIZONA_IRQ_FLL2_LOCK, ARIZONA_IRQ_FLL2_CLOCK_OK, + &wm8997->fll[1]); + + /* SR2 fixed at 8kHz, SR3 fixed at 16kHz */ + regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_2, + ARIZONA_SAMPLE_RATE_2_MASK, 0x11); + regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_3, + ARIZONA_SAMPLE_RATE_3_MASK, 0x12); + + for (i = 0; i < ARRAY_SIZE(wm8997_dai); i++) + arizona_init_dai(&wm8997->core, i); + + /* Latch volume update bits */ + for (i = 0; i < ARRAY_SIZE(wm8997_digital_vu); i++) + regmap_update_bits(arizona->regmap, wm8997_digital_vu[i], + WM8997_DIG_VU, WM8997_DIG_VU); + + pm_runtime_enable(&pdev->dev); + pm_runtime_idle(&pdev->dev); + + return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_wm8997, + wm8997_dai, ARRAY_SIZE(wm8997_dai)); +} + +static int wm8997_remove(struct platform_device *pdev) +{ + snd_soc_unregister_codec(&pdev->dev); + pm_runtime_disable(&pdev->dev); + + return 0; +} + +static struct platform_driver wm8997_codec_driver = { + .driver = { + .name = "wm8997-codec", + .owner = THIS_MODULE, + }, + .probe = wm8997_probe, + .remove = wm8997_remove, +}; + +module_platform_driver(wm8997_codec_driver); + +MODULE_DESCRIPTION("ASoC WM8997 driver"); +MODULE_AUTHOR("Charles Keepax "); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:wm8997-codec"); diff --git a/sound/soc/codecs/wm8997.h b/sound/soc/codecs/wm8997.h new file mode 100644 index 00000000000..5e91c6a7d56 --- /dev/null +++ b/sound/soc/codecs/wm8997.h @@ -0,0 +1,23 @@ +/* + * wm8997.h -- WM8997 ALSA SoC Audio driver + * + * Copyright 2012 Wolfson Microelectronics plc + * + * Author: Mark Brown + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _WM8997_H +#define _WM8997_H + +#include "arizona.h" + +#define WM8997_FLL1 1 +#define WM8997_FLL2 2 +#define WM8997_FLL1_REFCLK 3 +#define WM8997_FLL2_REFCLK 4 + +#endif From 40a3d2cd372c19cac41e5785cb9f957fdc7793b5 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 12 Aug 2013 23:59:19 +0100 Subject: [PATCH 0273/1167] ASoC: wm8997: Add inputs for noise and mic mixers The noise and mic mixer inputs were not connected, do so. Signed-off-by: Mark Brown (cherry picked from commit c5efb38a1354890297aed2a7e197ec5b23ce966a) Signed-off-by: Charles Keepax --- sound/soc/codecs/wm8997.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c index 4f208cc76d2..caa42f008e5 100644 --- a/sound/soc/codecs/wm8997.c +++ b/sound/soc/codecs/wm8997.c @@ -774,9 +774,6 @@ static const struct snd_soc_dapm_route wm8997_dapm_routes[] = { { "Tone Generator 1", NULL, "TONE" }, { "Tone Generator 2", NULL, "TONE" }, - { "Mic Mute Mixer", NULL, "Noise Mixer" }, - { "Mic Mute Mixer", NULL, "Mic Mixer" }, - { "AIF1 Capture", NULL, "AIF1TX1" }, { "AIF1 Capture", NULL, "AIF1TX2" }, { "AIF1 Capture", NULL, "AIF1TX3" }, @@ -886,6 +883,9 @@ static const struct snd_soc_dapm_route wm8997_dapm_routes[] = { ARIZONA_MIXER_ROUTES("LHPF3", "LHPF3"), ARIZONA_MIXER_ROUTES("LHPF4", "LHPF4"), + ARIZONA_MIXER_ROUTES("Mic Mute Mixer", "Noise"), + ARIZONA_MIXER_ROUTES("Mic Mute Mixer", "Mic"), + ARIZONA_MUX_ROUTES("ISRC1INT1", "ISRC1INT1"), ARIZONA_MUX_ROUTES("ISRC1INT2", "ISRC2INT2"), From 8e5f67670d467079e5ff57014e76be613d957110 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 11 Sep 2013 14:03:27 +0100 Subject: [PATCH 0274/1167] gpio: arizona: Add wm8997 support to probe Signed-off-by: Charles Keepax Signed-off-by: Linus Walleij (cherry picked from commit d9cadcc92a476b8dd5c301ebdea36a6459706465) Signed-off-by: Charles Keepax --- drivers/gpio/gpio-arizona.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpio/gpio-arizona.c b/drivers/gpio/gpio-arizona.c index 2a9d2c3dad1..94c272c270b 100644 --- a/drivers/gpio/gpio-arizona.c +++ b/drivers/gpio/gpio-arizona.c @@ -117,6 +117,7 @@ static int arizona_gpio_probe(struct platform_device *pdev) case WM5102: case WM8280: case WM5110: + case WM8997: arizona_gpio->gpio_chip.ngpio = 5; break; default: From 907b176fd0e840891f25cea3348de13079407299 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 12 Nov 2013 10:52:10 +0000 Subject: [PATCH 0275/1167] ASoC: wm8997: Correct typo in ISRC mux routes Signed-off-by: Charles Keepax Signed-off-by: Mark Brown (cherry picked from commit f4cdb6b493ec4cc97387e81a1e0c50335ed0b45d) Signed-off-by: Charles Keepax --- sound/soc/codecs/wm8997.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c index caa42f008e5..25dde0b4f6f 100644 --- a/sound/soc/codecs/wm8997.c +++ b/sound/soc/codecs/wm8997.c @@ -887,7 +887,7 @@ static const struct snd_soc_dapm_route wm8997_dapm_routes[] = { ARIZONA_MIXER_ROUTES("Mic Mute Mixer", "Mic"), ARIZONA_MUX_ROUTES("ISRC1INT1", "ISRC1INT1"), - ARIZONA_MUX_ROUTES("ISRC1INT2", "ISRC2INT2"), + ARIZONA_MUX_ROUTES("ISRC1INT2", "ISRC1INT2"), ARIZONA_MUX_ROUTES("ISRC1DEC1", "ISRC1DEC1"), ARIZONA_MUX_ROUTES("ISRC1DEC2", "ISRC1DEC2"), From a3e3afb4e1793e55c8c78c6de55a99c19bc28d89 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 14 Mar 2014 15:18:03 +0000 Subject: [PATCH 0276/1167] regulator: arizona-ldo1: Correct default regulator init_data Both 5102 and 8997 have the regulator capable of supplying 1.8V, and the voltage step from the 5110 regulator is different from what is specified in the default description. This patch updates the default regulator description to match 5110 and selects the 1.8V capable description for 8997. Change-Id: I67b706c56030dd2080cf4177b0d26ebdcf242e60 Signed-off-by: Charles Keepax --- drivers/regulator/arizona-ldo1.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/regulator/arizona-ldo1.c b/drivers/regulator/arizona-ldo1.c index 81d8681c319..7917bb2fa83 100644 --- a/drivers/regulator/arizona-ldo1.c +++ b/drivers/regulator/arizona-ldo1.c @@ -153,11 +153,9 @@ static const struct regulator_desc arizona_ldo1 = { .vsel_reg = ARIZONA_LDO1_CONTROL_1, .vsel_mask = ARIZONA_LDO1_VSEL_MASK, - .bypass_reg = ARIZONA_LDO1_CONTROL_1, - .bypass_mask = ARIZONA_LDO1_BYPASS, .min_uV = 900000, - .uV_step = 50000, - .n_voltages = 7, + .uV_step = 25000, + .n_voltages = 13, .enable_time = 500, .owner = THIS_MODULE, @@ -203,6 +201,7 @@ static int arizona_ldo1_probe(struct platform_device *pdev) */ switch (arizona->type) { case WM5102: + case WM8997: desc = &arizona_ldo1_hc; ldo1->init_data = arizona_ldo1_dvfs; break; From c388b262376611cf83d9db7e0cb7b96fb3037061 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 7 Mar 2014 17:32:27 +0000 Subject: [PATCH 0277/1167] arizona: Correct small errors in the DT binding documentation This patch does not alter the binding at all it only brings the documentation up to date with the existing binding. Change-Id: I373374716567686568bbb438cf127595d9607fac Signed-off-by: Charles Keepax --- Documentation/devicetree/bindings/mfd/arizona.txt | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index fd0c45e58e2..59b57dac1b5 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -5,9 +5,10 @@ of analogue I/O. Required properties: - - compatible : one of the following chip-specific strings: - "wlf,wm5102" - "wlf,wm5110" + - compatible : One of the following chip-specific strings: + "wlf,wm5102" + "wlf,wm5110" + "wlf,wm8997" - reg : I2C slave address when connected using I2C, chip select number when using SPI. @@ -25,8 +26,9 @@ Required properties: - #gpio-cells : Must be 2. The first cell is the pin number and the second cell is used to specify optional parameters (currently unused). - - AVDD-supply, DBVDD1-supply, DBVDD2-supply, DBVDD3-supply, CPVDD-supply, - SPKVDDL-supply, SPKVDDR-supply : power supplies for the device, as covered + - AVDD-supply, DBVDD1-supply, DBVDD2-supply, DBVDD3-supply (wm5102, wm5110), + CPVDD-supply, SPKVDDL-supply (wm5102, wm5110), SPKVDDR-supply (wm5102, + wm5110), SPKVDD-supply (wm8997) : Power supplies for the device, as covered in Documentation/devicetree/bindings/regulator/regulator.txt Optional properties: @@ -118,6 +120,7 @@ codec: wm5102@1a { compatible = "wlf,wm5102"; reg = <0x1a>; interrupts = <347>; + interrupt-controller; #interrupt-cells = <2>; interrupt-parent = <&gic>; From 4834796f2a7a43f7254c757a281ea1f8d4c99d5c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 14 Mar 2014 13:53:44 +0000 Subject: [PATCH 0278/1167] mfd: arizona: Fix read of device tree GPIOs On non-DT systems with device tree built in the current device tree GPIO reads will overwrite the pdata with zero when they fail. This patch ensures that the pdata version will be preserved if the device tree read fails. Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 1b731883148..742e649f0fd 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -587,23 +587,22 @@ int arizona_of_get_type(struct device *dev) } EXPORT_SYMBOL_GPL(arizona_of_get_type); -int arizona_of_get_named_gpio(struct arizona *arizona, - const char *prop, bool mandatory, - int *gpio) +int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, + bool mandatory, int *gpio) { int ret; ret = of_get_named_gpio(arizona->dev->of_node, prop, 0); - *gpio = ret; - if (ret >= 0) + if (ret >= 0) { + *gpio = ret; return ret; + } - *gpio = 0; - - if (mandatory) + /* Warn if GPIO is mandatory and not specified */ + if (mandatory && *gpio <= 0) dev_err(arizona->dev, - "Mandatory DT gpio %s missing/malformed: %d\n", - prop, ret); + "Mandatory DT gpio %s missing/malformed: %d\n", + prop, ret); return ret; } From 4f73dcec1d5edf807b2ba03e1f03aad292682819 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 14 Mar 2014 14:07:32 +0000 Subject: [PATCH 0279/1167] regulator: arizona-ldo1: Move setup processing from arizona-core It is more idiomatic to process things relating to the regulator in its driver. This patch moves both processing of device tree relating to the regulator and checking if the regulator is external from arizona-core into the regulator driver. Change-Id: I7655e4ce611df4a1808b5cee7f35f615b0a99e1d Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 12 +++--------- drivers/regulator/arizona-ldo1.c | 30 ++++++++++++++++++++++++++++++ 2 files changed, 33 insertions(+), 9 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 742e649f0fd..7ee1f3c311d 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -812,7 +812,6 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) struct arizona_pdata *pdata = &arizona->pdata; arizona_of_get_named_gpio(arizona, "wlf,reset", true, &pdata->reset); - arizona_of_get_named_gpio(arizona, "wlf,ldoena", true, &pdata->ldoena); arizona_of_get_micd_ranges(arizona, "wlf,micd-ranges"); arizona_of_get_micd_configs(arizona, "wlf,micd-configs"); @@ -921,6 +920,9 @@ int arizona_dev_init(struct arizona *arizona) return -EINVAL; } + /* Mark DCVDD as external, LDO1 driver will clear if internal */ + arizona->external_dcvdd = true; + ret = mfd_add_devices(arizona->dev, -1, early_devs, ARRAY_SIZE(early_devs), NULL, 0, NULL); if (ret != 0) { @@ -1150,14 +1152,6 @@ int arizona_dev_init(struct arizona *arizona) arizona->pdata.gpio_defaults[i]); } - /* - * LDO1 can only be used to supply DCVDD so if it has no - * consumers then DCVDD is supplied externally. - */ - if (arizona->pdata.ldo1 && - arizona->pdata.ldo1->num_consumer_supplies == 0) - arizona->external_dcvdd = true; - pm_runtime_set_autosuspend_delay(arizona->dev, 100); pm_runtime_use_autosuspend(arizona->dev); pm_runtime_enable(arizona->dev); diff --git a/drivers/regulator/arizona-ldo1.c b/drivers/regulator/arizona-ldo1.c index 7917bb2fa83..cadc23355f4 100644 --- a/drivers/regulator/arizona-ldo1.c +++ b/drivers/regulator/arizona-ldo1.c @@ -178,6 +178,22 @@ static const struct regulator_init_data arizona_ldo1_default = { .num_consumer_supplies = 1, }; +#ifdef CONFIG_OF +static int arizona_ldo1_of_get_pdata(struct arizona *arizona) +{ + struct arizona_pdata *pdata = &arizona->pdata; + + arizona_of_get_named_gpio(arizona, "wlf,ldoena", true, &pdata->ldoena); + + return 0; +} +#else +static inline int arizona_ldo1_of_get_pdata(struct arizona *arizona) +{ + return 0; +} +#endif + static int arizona_ldo1_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); @@ -186,6 +202,8 @@ static int arizona_ldo1_probe(struct platform_device *pdev) struct arizona_ldo1 *ldo1; int ret; + arizona->external_dcvdd = false; + ldo1 = devm_kzalloc(&pdev->dev, sizeof(*ldo1), GFP_KERNEL); if (ldo1 == NULL) { dev_err(&pdev->dev, "Unable to allocate private data\n"); @@ -218,6 +236,11 @@ static int arizona_ldo1_probe(struct platform_device *pdev) config.dev = arizona->dev; config.driver_data = ldo1; config.regmap = arizona->regmap; + + ret = arizona_ldo1_of_get_pdata(arizona); + if (ret < 0) + return ret; + config.ena_gpio = arizona->pdata.ldoena; if (arizona->pdata.ldo1) @@ -225,6 +248,13 @@ static int arizona_ldo1_probe(struct platform_device *pdev) else config.init_data = &ldo1->init_data; + /* + * LDO1 can only be used to supply DCVDD so if it has no + * consumers then DCVDD is supplied externally. + */ + if (config.init_data->num_consumer_supplies == 0) + arizona->external_dcvdd = true; + ldo1->regulator = regulator_register(desc, &config); if (IS_ERR(ldo1->regulator)) { ret = PTR_ERR(ldo1->regulator); From b41da0ec0d167c1f9de595ce6d0d8293b02ae71b Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 14 Mar 2014 14:34:59 +0000 Subject: [PATCH 0280/1167] regulator: arizona-ldo1: Add processing of init_data from device tree Change-Id: I64156d8c2e83db81945fa9dc6a58194d85677620 Signed-off-by: Charles Keepax --- .../devicetree/bindings/mfd/arizona.txt | 7 +++ drivers/regulator/arizona-ldo1.c | 46 +++++++++++++++++-- 2 files changed, 50 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 59b57dac1b5..c391a4440a2 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -114,6 +114,13 @@ Optional properties: - wlf,fixed-hpdet-imp : Do not perform any headphone detection, just use the fixed value specified here as the headphone impedance. + - ldo1 : Initial data for the LDO1 regulator, as covered in + Documentation/devicetree/bindings/regulator/regulator.txt + + - DCVDD-supply : Power supply, only needs to be specified if DCVDD is being + externally supplied. As covered in + Documentation/devicetree/bindings/regulator/regulator.txt + Example: codec: wm5102@1a { diff --git a/drivers/regulator/arizona-ldo1.c b/drivers/regulator/arizona-ldo1.c index cadc23355f4..7b673d88e0e 100644 --- a/drivers/regulator/arizona-ldo1.c +++ b/drivers/regulator/arizona-ldo1.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -179,19 +180,56 @@ static const struct regulator_init_data arizona_ldo1_default = { }; #ifdef CONFIG_OF -static int arizona_ldo1_of_get_pdata(struct arizona *arizona) +static int arizona_ldo1_of_get_pdata(struct arizona *arizona, + struct regulator_config *config) { struct arizona_pdata *pdata = &arizona->pdata; + struct arizona_ldo1 *ldo1 = config->driver_data; + struct device_node *init_node, *dcvdd_node; + struct regulator_init_data *init_data; arizona_of_get_named_gpio(arizona, "wlf,ldoena", true, &pdata->ldoena); + init_node = of_get_child_by_name(arizona->dev->of_node, "ldo1"); + dcvdd_node = of_parse_phandle(arizona->dev->of_node, "DCVDD-supply", 0); + + if (init_node) { + config->of_node = init_node; + + init_data = of_get_regulator_init_data(arizona->dev, init_node); + + if (init_data) { + init_data->consumer_supplies = &ldo1->supply; + init_data->num_consumer_supplies = 1; + + if (dcvdd_node && dcvdd_node != init_node) + arizona->external_dcvdd = true; + + pdata->ldo1 = init_data; + } + } else if (dcvdd_node) { + arizona->external_dcvdd = true; + } + + of_node_put(dcvdd_node); + return 0; } + +static void arizona_ldo1_of_put_pdata(struct regulator_config *config) +{ + of_node_put(config->of_node); +} #else -static inline int arizona_ldo1_of_get_pdata(struct arizona *arizona) +static inline int arizona_ldo1_of_get_pdata(struct arizona *arizona, + struct regulator_config *config) { return 0; } + +static inline void arizona_ldo1_of_put_pdata(struct regulator_config *config) +{ +} #endif static int arizona_ldo1_probe(struct platform_device *pdev) @@ -237,7 +275,7 @@ static int arizona_ldo1_probe(struct platform_device *pdev) config.driver_data = ldo1; config.regmap = arizona->regmap; - ret = arizona_ldo1_of_get_pdata(arizona); + ret = arizona_ldo1_of_get_pdata(arizona, &config); if (ret < 0) return ret; @@ -263,6 +301,8 @@ static int arizona_ldo1_probe(struct platform_device *pdev) return ret; } + arizona_ldo1_of_put_pdata(&config); + platform_set_drvdata(pdev, ldo1); return 0; From 9009426e3a157d65cf711cb418e3ea0deec61234 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 11 Mar 2014 16:46:37 +0000 Subject: [PATCH 0281/1167] regulator: arizona-micsupp: Add processing of init_data from device tree Change-Id: Ic9c831985dd5da999311f36e0e940f3e4d965cc9 Signed-off-by: Charles Keepax --- .../devicetree/bindings/mfd/arizona.txt | 6 ++- drivers/regulator/arizona-micsupp.c | 50 +++++++++++++++++++ 2 files changed, 54 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index c391a4440a2..c09d4842c1c 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -116,9 +116,11 @@ Optional properties: - ldo1 : Initial data for the LDO1 regulator, as covered in Documentation/devicetree/bindings/regulator/regulator.txt + - micvdd : Initial data for the MICVDD regulator, as covered in + Documentation/devicetree/bindings/regulator/regulator.txt - - DCVDD-supply : Power supply, only needs to be specified if DCVDD is being - externally supplied. As covered in + - DCVDD-supply, MICVDD-supply : Power supplies, only need to be specified if + they are being externally supplied. As covered in Documentation/devicetree/bindings/regulator/regulator.txt Example: diff --git a/drivers/regulator/arizona-micsupp.c b/drivers/regulator/arizona-micsupp.c index dcda95947fb..614787aa260 100644 --- a/drivers/regulator/arizona-micsupp.c +++ b/drivers/regulator/arizona-micsupp.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -287,6 +288,49 @@ static const struct regulator_init_data arizona_micsupp_ext_default = { .num_consumer_supplies = 1, }; +#ifdef CONFIG_OF +static int arizona_micsupp_of_get_pdata(struct arizona *arizona, + struct regulator_config *config) +{ + struct arizona_pdata *pdata = &arizona->pdata; + struct arizona_micsupp *micsupp = config->driver_data; + struct device_node *np; + struct regulator_init_data *init_data; + + np = of_get_child_by_name(arizona->dev->of_node, "micvdd"); + + if (np) { + config->of_node = np; + + init_data = of_get_regulator_init_data(arizona->dev, np); + + if (init_data) { + init_data->consumer_supplies = &micsupp->supply; + init_data->num_consumer_supplies = 1; + + pdata->micvdd = init_data; + } + } + + return 0; +} + +static void arizona_micsupp_of_put_pdata(struct regulator_config *config) +{ + of_node_put(config->of_node); +} +#else +static inline int arizona_micsupp_of_get_pdata(struct arizona *arizona, + struct regulator_config *config) +{ + return 0; +} + +static inline void arizona_micsupp_of_put_pdata(struct regulator_config *config) +{ +} +#endif + static int arizona_micsupp_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); @@ -328,6 +372,10 @@ static int arizona_micsupp_probe(struct platform_device *pdev) config.driver_data = micsupp; config.regmap = arizona->regmap; + ret = arizona_micsupp_of_get_pdata(arizona, &config); + if (ret < 0) + return ret; + if (arizona->pdata.micvdd) config.init_data = arizona->pdata.micvdd; else @@ -345,6 +393,8 @@ static int arizona_micsupp_probe(struct platform_device *pdev) return ret; } + arizona_micsupp_of_put_pdata(&config); + platform_set_drvdata(pdev, micsupp); return 0; From ac0e60512c9ae2264215beb4fc6aa61314b965fc Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 17 Mar 2014 16:07:09 +0000 Subject: [PATCH 0282/1167] mfd: wm8997: Add registers for high power mode Some output configurations can require a 50Mhz SYSCLK which requires DCVDD to be 1.8V. This patch adds the registers necessary for supporting this operational mode. Change-Id: I8f1f0bb7715225aa3de873961f78cc159c377f3c Signed-off-by: Charles Keepax --- drivers/mfd/wm8997-tables.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mfd/wm8997-tables.c b/drivers/mfd/wm8997-tables.c index 5aa80768777..c9c65197bb6 100644 --- a/drivers/mfd/wm8997-tables.c +++ b/drivers/mfd/wm8997-tables.c @@ -846,6 +846,7 @@ static bool wm8997_readable_register(struct device *dev, unsigned int reg) case ARIZONA_RATE_ESTIMATOR_3: case ARIZONA_RATE_ESTIMATOR_4: case ARIZONA_RATE_ESTIMATOR_5: + case ARIZONA_DYNAMIC_FREQUENCY_SCALING_1: case ARIZONA_FLL1_CONTROL_1: case ARIZONA_FLL1_CONTROL_2: case ARIZONA_FLL1_CONTROL_3: @@ -880,6 +881,7 @@ static bool wm8997_readable_register(struct device *dev, unsigned int reg) case ARIZONA_FLL2_GPIO_CLOCK: case ARIZONA_MIC_CHARGE_PUMP_1: case ARIZONA_LDO1_CONTROL_1: + case ARIZONA_LDO1_CONTROL_2: case ARIZONA_LDO2_CONTROL_1: case ARIZONA_MIC_BIAS_CTRL_1: case ARIZONA_MIC_BIAS_CTRL_2: From fb469704434afaff2078e495063616f89cb567ec Mon Sep 17 00:00:00 2001 From: Francis Bain Date: Thu, 13 Mar 2014 13:14:00 +0000 Subject: [PATCH 0283/1167] Documentation: Add WM8280/1 chip-specific strings Change-Id: Iab1d9f2b15f361a8faab390975c1c16bbba419cb Signed-off-by: Francis Bain --- Documentation/devicetree/bindings/mfd/arizona.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index c09d4842c1c..88fa07dfeec 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -8,6 +8,8 @@ Required properties: - compatible : One of the following chip-specific strings: "wlf,wm5102" "wlf,wm5110" + "wlf,wm8280" + "wlf,wm8281" "wlf,wm8997" - reg : I2C slave address when connected using I2C, chip select number when using SPI. From db610435919f12ca67c7e26e16e5cb9c914ea99b Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 14 Feb 2014 12:47:46 +0000 Subject: [PATCH 0284/1167] mfd: arizona: Add detection of WM8281 Change-Id: I52c2df6973a3cb060e75432e50c13dc3a5e5c64e Signed-off-by: Richard Fitzgerald Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 9 +++++++-- drivers/mfd/arizona-i2c.c | 1 + drivers/mfd/arizona-spi.c | 1 + 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 7ee1f3c311d..698a5515ffb 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1072,8 +1072,13 @@ int arizona_dev_init(struct arizona *arizona) case 0x5110: switch (arizona->type) { case WM8280: - type_name = "WM8280"; - revision_char = arizona->rev + 61; + if (arizona->rev >= 0x5) { + type_name = "WM8281"; + revision_char = arizona->rev + 60; + } else { + type_name = "WM8280"; + revision_char = arizona->rev + 61; + } break; case WM5110: diff --git a/drivers/mfd/arizona-i2c.c b/drivers/mfd/arizona-i2c.c index b402f9f11ec..7f684bfb007 100644 --- a/drivers/mfd/arizona-i2c.c +++ b/drivers/mfd/arizona-i2c.c @@ -86,6 +86,7 @@ static int arizona_i2c_remove(struct i2c_client *i2c) static const struct i2c_device_id arizona_i2c_id[] = { { "wm5102", WM5102 }, { "wm8280", WM8280 }, + { "wm8281", WM8280 }, { "wm5110", WM5110 }, { "wm8997", WM8997 }, { } diff --git a/drivers/mfd/arizona-spi.c b/drivers/mfd/arizona-spi.c index bc1ea185a4e..8d6455d1204 100644 --- a/drivers/mfd/arizona-spi.c +++ b/drivers/mfd/arizona-spi.c @@ -81,6 +81,7 @@ static int arizona_spi_remove(struct spi_device *spi) static const struct spi_device_id arizona_spi_ids[] = { { "wm5102", WM5102 }, { "wm8280", WM8280 }, + { "wm8281", WM8280 }, { "wm5110", WM5110 }, { }, }; From bdb62f5ac93c9cd22771f70672037d178e08e3ae Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 27 Feb 2014 16:59:43 +0000 Subject: [PATCH 0285/1167] extcon: arizona: Move measured hp_impedance to arizona The switch driver was already updated, however the extcon driver is not. This means that whilst running with the extcon driver the value in the arizona structure remains at zero and is treated as a short preventing headphone output. Change-Id: Id303054d1fa00483291ea9a6d35c75be190ceea7 Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index db2c131c448..82408b9685a 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -72,7 +72,6 @@ struct arizona_extcon_info { struct input_dev *input; u16 last_jackdet; - u32 hp_impedance; int micd_mode; const struct arizona_micd_config *micd_modes; @@ -508,7 +507,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) } } - info->hp_impedance = val; + arizona->hp_impedance = val; dev_dbg(arizona->dev, "HP impedance %d ohms\n", val); return val; } @@ -1137,7 +1136,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) info->mic = false; info->hpdet_done = false; info->hpdet_retried = false; - info->hp_impedance = 0; + arizona->hp_impedance = 0; for (i = 0; i < info->num_micd_ranges; i++) input_report_key(info->input, @@ -1251,7 +1250,7 @@ static ssize_t arizona_extcon_show(struct device *dev, struct platform_device *pdev = to_platform_device(dev); struct arizona_extcon_info *info = platform_get_drvdata(pdev); - return scnprintf(buf, PAGE_SIZE, "%d\n", info->hp_impedance); + return scnprintf(buf, PAGE_SIZE, "%d\n", info->arizona->hp_impedance); } static int arizona_extcon_probe(struct platform_device *pdev) From 71a15c613beaadd5917ed8e4a8a019a58033c920 Mon Sep 17 00:00:00 2001 From: nikesh Date: Tue, 18 Mar 2014 13:00:00 +0000 Subject: [PATCH 0286/1167] extcon: arizona: Use extcon cable api's Use extcon cable api's instead of state api's as they are much more indicative Change-Id: I41ffc43b9634dd1eea76edda7ca27d0e7d555f92 Signed-off-by: nikesh --- drivers/extcon/extcon-arizona.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 82408b9685a..5044acc76a6 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -719,9 +719,8 @@ static void arizona_identify_headphone(struct arizona_extcon_info *info) ARIZONA_ACCDET_MODE_MASK, ARIZONA_ACCDET_MODE_MIC); /* Just report headphone */ - ret = extcon_update_state(&info->edev, - 1 << ARIZONA_CABLE_HEADPHONE, - 1 << ARIZONA_CABLE_HEADPHONE); + ret = extcon_set_cable_state_(&info->edev, + ARIZONA_CABLE_HEADPHONE, true); if (ret != 0) dev_err(arizona->dev, "Failed to report headphone: %d\n", ret); @@ -778,9 +777,8 @@ static void arizona_start_hpdet_acc_id(struct arizona_extcon_info *info) ARIZONA_ACCDET_MODE_MASK, ARIZONA_ACCDET_MODE_MIC); /* Just report headphone */ - ret = extcon_update_state(&info->edev, - 1 << ARIZONA_CABLE_HEADPHONE, - 1 << ARIZONA_CABLE_HEADPHONE); + ret = extcon_set_cable_state_(&info->edev, + ARIZONA_CABLE_HEADPHONE, true); if (ret != 0) dev_err(arizona->dev, "Failed to report headphone: %d\n", ret); @@ -911,9 +909,8 @@ static void arizona_micd_detect(struct work_struct *work) if (info->detecting && (val & ARIZONA_MICD_LVL_8)) { arizona_identify_headphone(info); - ret = extcon_update_state(&info->edev, - 1 << ARIZONA_CABLE_MICROPHONE, - 1 << ARIZONA_CABLE_MICROPHONE); + ret = extcon_set_cable_state_(&info->edev, + ARIZONA_CABLE_MICROPHONE, true); if (ret != 0) dev_err(arizona->dev, "Headset report failed: %d\n", From f4ed6d337a25b59e46b2efc12de844cb78b08718 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 7 Mar 2014 13:58:04 +0000 Subject: [PATCH 0287/1167] switch: arizona: Add clear input after button press events Change-Id: I87c29cc83f0e67427a6b116af44e70f15e72aeae Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 128 ++++++++++++++++++++++++++ drivers/mfd/florida-tables.c | 12 +++ drivers/switch/switch-arizona.c | 34 +++++++ include/linux/mfd/arizona/core.h | 2 + include/linux/mfd/arizona/registers.h | 48 ++++++++++ 5 files changed, 224 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 698a5515ffb..21b726b1ec3 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -884,6 +884,134 @@ static struct mfd_cell wm8997_devs[] = { { .name = "wm8997-codec" }, }; +static const struct { + unsigned int enable; + unsigned int conf_reg; + unsigned int vol_reg; + unsigned int adc_reg; +} arizona_florida_channel_defs[] = { + { + ARIZONA_IN1R_ENA, ARIZONA_IN1L_CONTROL, + ARIZONA_ADC_DIGITAL_VOLUME_1R, ARIZONA_ADC_VCO_CAL_5 + }, + { + ARIZONA_IN1L_ENA, ARIZONA_IN1L_CONTROL, + ARIZONA_ADC_DIGITAL_VOLUME_1L, ARIZONA_ADC_VCO_CAL_4 + }, + { + ARIZONA_IN2R_ENA, ARIZONA_IN2L_CONTROL, + ARIZONA_ADC_DIGITAL_VOLUME_2R, ARIZONA_ADC_VCO_CAL_7 + }, + { + ARIZONA_IN2L_ENA, ARIZONA_IN2L_CONTROL, + ARIZONA_ADC_DIGITAL_VOLUME_2L, ARIZONA_ADC_VCO_CAL_6 + }, + { + ARIZONA_IN3R_ENA, ARIZONA_IN3L_CONTROL, + ARIZONA_ADC_DIGITAL_VOLUME_3R, ARIZONA_ADC_VCO_CAL_9 + }, + { + ARIZONA_IN3L_ENA, ARIZONA_IN3L_CONTROL, + ARIZONA_ADC_DIGITAL_VOLUME_3L, ARIZONA_ADC_VCO_CAL_8 + }, +}; + +static void arizona_florida_mute_analog(struct arizona* arizona, + unsigned int mute) +{ + unsigned int val, chans; + int i; + + regmap_read(arizona->regmap, ARIZONA_INPUT_ENABLES_STATUS, &chans); + + for (i = 0; i < ARRAY_SIZE(arizona_florida_channel_defs); ++i) { + if (!(chans & arizona_florida_channel_defs[i].enable)) + continue; + + /* Check for analogue input */ + regmap_read(arizona->regmap, + arizona_florida_channel_defs[i].conf_reg, + &val); + if (val & 0x0400) + continue; + + regmap_update_bits(arizona->regmap, + arizona_florida_channel_defs[i].vol_reg, + ARIZONA_IN1L_MUTE, + mute); + } +} + +static bool arizona_florida_get_input_state(struct arizona* arizona) +{ + unsigned int val, chans; + int count, i, j; + + regmap_read(arizona->regmap, ARIZONA_INPUT_ENABLES_STATUS, &chans); + + for (i = 0; i < ARRAY_SIZE(arizona_florida_channel_defs); ++i) { + if (!(chans & arizona_florida_channel_defs[i].enable)) + continue; + + /* Check for analogue input */ + regmap_read(arizona->regmap, + arizona_florida_channel_defs[i].conf_reg, + &val); + if (val & 0x0400) + continue; + + count = 0; + + for (j = 0; j < 4; ++j) { + regmap_read(arizona->regmap, + arizona_florida_channel_defs[i].adc_reg, + &val); + val &= ARIZONA_ADC1L_COUNT_RD_MASK; + val >>= ARIZONA_ADC1L_COUNT_RD_SHIFT; + + dev_dbg(arizona->dev, "ADC Count: %d\n", val); + + if (val > 78 || val < 54) + count++; + } + + if (count == j) + return true; + } + + return false; +} + +void arizona_florida_clear_input(struct arizona *arizona) +{ + regmap_write(arizona->regmap, 0x80, 0x3); + + if (arizona_florida_get_input_state(arizona)) { + arizona_florida_mute_analog(arizona, ARIZONA_IN1L_MUTE); + + regmap_write(arizona->regmap, 0x3A6, 0x5555); + regmap_write(arizona->regmap, 0x3A5, 0x3); + msleep(10); + regmap_write(arizona->regmap, 0x3A5, 0x0); + + if (arizona_florida_get_input_state(arizona)) { + regmap_write(arizona->regmap, 0x3A6, 0xAAAA); + regmap_write(arizona->regmap, 0x3A5, 0x5); + msleep(10); + regmap_write(arizona->regmap, 0x3A5, 0x0); + } + + regmap_write(arizona->regmap, 0x3A6, 0x0); + + msleep(5); + + arizona_florida_mute_analog(arizona, 0); + } + + regmap_write(arizona->regmap, 0x80, 0x0); +} +EXPORT_SYMBOL_GPL(arizona_florida_clear_input); + int arizona_dev_init(struct arizona *arizona) { struct device *dev = arizona->dev; diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 9195e512243..6f47c4892ce 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -1651,6 +1651,12 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_IN4R_CONTROL: case ARIZONA_ADC_DIGITAL_VOLUME_4R: case ARIZONA_DMIC4R_CONTROL: + case ARIZONA_ADC_VCO_CAL_4: + case ARIZONA_ADC_VCO_CAL_5: + case ARIZONA_ADC_VCO_CAL_6: + case ARIZONA_ADC_VCO_CAL_7: + case ARIZONA_ADC_VCO_CAL_8: + case ARIZONA_ADC_VCO_CAL_9: case ARIZONA_OUTPUT_ENABLES_1: case ARIZONA_OUTPUT_STATUS_1: case ARIZONA_OUTPUT_STANDBY_1: @@ -2642,6 +2648,12 @@ static bool florida_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_INPUT_ENABLES_STATUS: case ARIZONA_OUTPUT_STATUS_1: case ARIZONA_RAW_OUTPUT_STATUS_1: + case ARIZONA_ADC_VCO_CAL_4: + case ARIZONA_ADC_VCO_CAL_5: + case ARIZONA_ADC_VCO_CAL_6: + case ARIZONA_ADC_VCO_CAL_7: + case ARIZONA_ADC_VCO_CAL_8: + case ARIZONA_ADC_VCO_CAL_9: case ARIZONA_SLIMBUS_RX_PORT_STATUS: case ARIZONA_SLIMBUS_TX_PORT_STATUS: case ARIZONA_INTERRUPT_STATUS_1: diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index aa989937371..529f572a9e0 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -92,6 +92,8 @@ struct arizona_extcon_info { struct delayed_work hpdet_work; struct delayed_work micd_detect_work; struct delayed_work micd_timeout_work; + struct delayed_work micd_clear_work; + bool first_clear; bool hpdet_active; bool hpdet_done; @@ -1136,6 +1138,24 @@ static void arizona_micd_detect(struct work_struct *work) mutex_unlock(&info->lock); } +static void arizona_micd_input_clear(struct work_struct *work) +{ + struct arizona_extcon_info *info = container_of(work, + struct arizona_extcon_info, + micd_clear_work.work); + struct arizona *arizona = info->arizona; + + arizona_florida_clear_input(arizona); + + mutex_lock(&info->lock); + if (info->first_clear) { + schedule_delayed_work(&info->micd_clear_work, + msecs_to_jiffies(900)); + info->first_clear = false; + } + mutex_unlock(&info->lock); +} + static irqreturn_t arizona_micdet(int irq, void *data) { struct arizona_extcon_info *info = data; @@ -1144,10 +1164,23 @@ static irqreturn_t arizona_micdet(int irq, void *data) cancel_delayed_work_sync(&info->micd_detect_work); cancel_delayed_work_sync(&info->micd_timeout_work); + cancel_delayed_work_sync(&info->micd_clear_work); mutex_lock(&info->lock); + if (!info->detecting) debounce = 0; + + switch (arizona->type) { + case WM5110: + info->first_clear = true; + schedule_delayed_work(&info->micd_clear_work, + msecs_to_jiffies(80)); + break; + default: + break; + } + mutex_unlock(&info->lock); if (debounce) @@ -1417,6 +1450,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) info->last_jackdet = ~(ARIZONA_MICD_CLAMP_STS | ARIZONA_JD1_STS); INIT_DELAYED_WORK(&info->hpdet_work, arizona_hpdet_work); INIT_DELAYED_WORK(&info->micd_detect_work, arizona_micd_detect); + INIT_DELAYED_WORK(&info->micd_clear_work, arizona_micd_input_clear); INIT_DELAYED_WORK(&info->micd_timeout_work, arizona_micd_timeout_work); platform_set_drvdata(pdev, info); diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 6c60ba730d1..478280785ae 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -136,4 +136,6 @@ extern int arizona_of_read_u32_array(struct arizona *arizona, const char *prop, extern int arizona_of_read_u32(struct arizona *arizona, const char* prop, bool mandatory, u32 *data); +extern void arizona_florida_clear_input(struct arizona *arizona); + #endif diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 0ed7f6d1f8b..199232faf48 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -171,6 +171,12 @@ #define ARIZONA_IN4R_CONTROL 0x32C #define ARIZONA_ADC_DIGITAL_VOLUME_4R 0x32D #define ARIZONA_DMIC4R_CONTROL 0x32E +#define ARIZONA_ADC_VCO_CAL_4 0x393 +#define ARIZONA_ADC_VCO_CAL_5 0x394 +#define ARIZONA_ADC_VCO_CAL_6 0x395 +#define ARIZONA_ADC_VCO_CAL_7 0x396 +#define ARIZONA_ADC_VCO_CAL_8 0x397 +#define ARIZONA_ADC_VCO_CAL_9 0x398 #define ARIZONA_OUTPUT_ENABLES_1 0x400 #define ARIZONA_OUTPUT_STATUS_1 0x401 #define ARIZONA_OUTPUT_STANDBY_1 0x405 @@ -2731,6 +2737,48 @@ #define ARIZONA_IN4R_DMIC_DLY_SHIFT 0 /* IN4R_DMIC_DLY - [5:0] */ #define ARIZONA_IN4R_DMIC_DLY_WIDTH 6 /* IN4R_DMIC_DLY - [5:0] */ +/* + * R915 (0x393) - ADC VCO Cal 4 + */ +#define ARIZONA_ADC1L_COUNT_RD_MASK 0x1FC0 /* ADC1L_COUNT_RD - [12:6] */ +#define ARIZONA_ADC1L_COUNT_RD_SHIFT 6 /* ADC1L_COUNT_RD - [12:6] */ +#define ARIZONA_ADC1L_COUNT_RD_WIDTH 7 /* ADC1L_COUNT_RD - [12:6] */ + +/* + * R916 (0x394) - ADC VCO Cal 5 + */ +#define ARIZONA_ADC1R_COUNT_RD_MASK 0x1FC0 /* ADC1R_COUNT_RD - [12:6] */ +#define ARIZONA_ADC1R_COUNT_RD_SHIFT 6 /* ADC1R_COUNT_RD - [12:6] */ +#define ARIZONA_ADC1R_COUNT_RD_WIDTH 7 /* ADC1R_COUNT_RD - [12:6] */ + +/* + * R917 (0x395) - ADC VCO Cal 6 + */ +#define ARIZONA_ADC2L_COUNT_RD_MASK 0x1FC0 /* ADC2L_COUNT_RD - [12:6] */ +#define ARIZONA_ADC2L_COUNT_RD_SHIFT 6 /* ADC2L_COUNT_RD - [12:6] */ +#define ARIZONA_ADC2L_COUNT_RD_WIDTH 7 /* ADC2L_COUNT_RD - [12:6] */ + +/* + * R918 (0x396) - ADC VCO Cal 7 + */ +#define ARIZONA_ADC2R_COUNT_RD_MASK 0x1FC0 /* ADC2R_COUNT_RD - [12:6] */ +#define ARIZONA_ADC2R_COUNT_RD_SHIFT 6 /* ADC2R_COUNT_RD - [12:6] */ +#define ARIZONA_ADC2R_COUNT_RD_WIDTH 7 /* ADC2R_COUNT_RD - [12:6] */ + +/* + * R919 (0x397) - ADC VCO Cal 8 + */ +#define ARIZONA_ADC3L_COUNT_RD_MASK 0x1FC0 /* ADC3L_COUNT_RD - [12:6] */ +#define ARIZONA_ADC3L_COUNT_RD_SHIFT 6 /* ADC3L_COUNT_RD - [12:6] */ +#define ARIZONA_ADC3L_COUNT_RD_WIDTH 7 /* ADC3L_COUNT_RD - [12:6] */ + +/* + * R920 (0x398) - ADC VCO Cal 9 + */ +#define ARIZONA_ADC3R_COUNT_RD_MASK 0x1FC0 /* ADC3R_COUNT_RD - [12:6] */ +#define ARIZONA_ADC3R_COUNT_RD_SHIFT 6 /* ADC3R_COUNT_RD - [12:6] */ +#define ARIZONA_ADC3R_COUNT_RD_WIDTH 7 /* ADC3R_COUNT_RD - [12:6] */ + /* * R1024 (0x400) - Output Enables 1 */ From 862039239bacae5f0330bfb6151bdb631ef9de71 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 24 Mar 2014 17:27:18 +0000 Subject: [PATCH 0288/1167] switch: arizona: Add manual debouncing of the microphone detection When we clear the input after button press events we want to do so for even button press events that are very short. This patch sets the hardware debounce to minimum and does software debouncing on the microphone detection. Change-Id: I0f8d45d78153f8411b0a90b0ff78a7087bcf8e47 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 87 ++++++++++++++++++++++++++++++--- 1 file changed, 79 insertions(+), 8 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 529f572a9e0..dc6ae748d33 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -89,6 +89,11 @@ struct arizona_extcon_info { bool micd_reva; bool micd_clamp; + bool micd_manual_debounce; + unsigned int micd_res_old; + unsigned int micd_res[4]; + int micd_current; + struct delayed_work hpdet_work; struct delayed_work micd_detect_work; struct delayed_work micd_timeout_work; @@ -138,6 +143,10 @@ static const int arizona_micd_levels[] = { 1257, 30000, }; +static const int arizona_micd_rates[] = { + 0, 250, 500, 1000, 2000, 4000, 8000, 16000, 32000, 64000, 128000, 256000, +}; + /* These values are copied from Android WiredAccessoryObserver */ enum headset_state { BIT_NO_HEADSET = 0, @@ -1017,6 +1026,45 @@ static void arizona_micd_detect(struct work_struct *work) return; } + if (info->micd_manual_debounce) { + if (info->micd_current > 0) { + if (info->micd_res[info->micd_current - 1] != val) + info->micd_current = 0; + } + + info->micd_res[info->micd_current++] = val; + + dev_dbg(arizona->dev, "Manual debounce: %d, 0x%04x\n", info->micd_current, val); + + if (info->micd_current == 4) { + info->micd_current = 0; + + if (val == info->micd_res_old) + goto handled; + info->micd_res_old = val; + } else { + int delay = arizona_micd_rates[arizona->pdata.micd_rate]; + + if (delay >= 32000) + msleep(delay / 1000); + else if (delay >= 1000) + usleep_range(delay, delay); + else if (delay) + udelay(delay); + + /* Must toggle MICD_ENA to ensure we get a new reading + * even if nothing changes + */ + regmap_update_bits(arizona->regmap, + ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, 0); + regmap_update_bits(arizona->regmap, + ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, ARIZONA_MICD_ENA); + goto handled; + } + } + /* Due to jack detect this should never happen */ if (!(val & ARIZONA_MICD_STS)) { dev_warn(arizona->dev, "Detected open circuit\n"); @@ -1170,6 +1218,8 @@ static irqreturn_t arizona_micdet(int irq, void *data) if (!info->detecting) debounce = 0; + else if (info->micd_current > 0) + debounce = 0; switch (arizona->type) { case WM5110: @@ -1467,11 +1517,22 @@ static int arizona_extcon_probe(struct platform_device *pdev) } break; case WM8280: + switch (arizona->rev) { + case 0 ... 2: + break; + default: + info->micd_clamp = true; + info->hpdet_ip = 2; + break; + } + break; case WM5110: switch (arizona->rev) { case 0 ... 2: + info->micd_manual_debounce = true; break; default: + info->micd_manual_debounce = true; info->micd_clamp = true; info->hpdet_ip = 2; break; @@ -1548,17 +1609,27 @@ static int arizona_extcon_probe(struct platform_device *pdev) arizona->pdata.micd_bias_start_time << ARIZONA_MICD_BIAS_STARTTIME_SHIFT); - if (arizona->pdata.micd_rate) + if (info->micd_manual_debounce) { regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_RATE_MASK, - arizona->pdata.micd_rate - << ARIZONA_MICD_RATE_SHIFT); + ARIZONA_MICD_RATE_MASK, 0); - if (arizona->pdata.micd_dbtime) regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_DBTIME_MASK, - arizona->pdata.micd_dbtime - << ARIZONA_MICD_DBTIME_SHIFT); + ARIZONA_MICD_DBTIME_MASK, 0); + } else { + if (arizona->pdata.micd_rate) + regmap_update_bits(arizona->regmap, + ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_RATE_MASK, + arizona->pdata.micd_rate + << ARIZONA_MICD_RATE_SHIFT); + + if (arizona->pdata.micd_dbtime) + regmap_update_bits(arizona->regmap, + ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_DBTIME_MASK, + arizona->pdata.micd_dbtime + << ARIZONA_MICD_DBTIME_SHIFT); + } BUILD_BUG_ON(ARRAY_SIZE(arizona_micd_levels) < ARIZONA_NUM_MICD_BUTTON_LEVELS); From 7a7376217f850fde958fe91536a652b93e6480e3 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 31 Mar 2014 09:47:19 +0100 Subject: [PATCH 0289/1167] Revert "mfd: arizona: Fix read of device tree GPIOs" This reverts commit 4834796f2a7a43f7254c757a281ea1f8d4c99d5c. We shouldn't be processing the device tree if pdata is present, so revert this patch. Change-Id: I9df6af0e7f56b803e690e2c0ba1252d3dd008f43 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 21b726b1ec3..73bf5182bfb 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -587,22 +587,23 @@ int arizona_of_get_type(struct device *dev) } EXPORT_SYMBOL_GPL(arizona_of_get_type); -int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, - bool mandatory, int *gpio) +int arizona_of_get_named_gpio(struct arizona *arizona, + const char *prop, bool mandatory, + int *gpio) { int ret; ret = of_get_named_gpio(arizona->dev->of_node, prop, 0); - if (ret >= 0) { - *gpio = ret; + *gpio = ret; + if (ret >= 0) return ret; - } - /* Warn if GPIO is mandatory and not specified */ - if (mandatory && *gpio <= 0) + *gpio = 0; + + if (mandatory) dev_err(arizona->dev, - "Mandatory DT gpio %s missing/malformed: %d\n", - prop, ret); + "Mandatory DT gpio %s missing/malformed: %d\n", + prop, ret); return ret; } From 12db5eed6e612c9a8d873beff8a3d043b0b35dc9 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 27 Mar 2014 13:49:26 +0000 Subject: [PATCH 0290/1167] regulator: arizona-ldo1: Only process DT if no pdata In arizona-core we only process the DT if no pdata is present, we should be consistent in this approach. This patch adds similar handling into this driver. Change-Id: Ibde45a2d8d9151a477734b801fce6e8902360eeb Signed-off-by: Charles Keepax --- drivers/regulator/arizona-ldo1.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/regulator/arizona-ldo1.c b/drivers/regulator/arizona-ldo1.c index 7b673d88e0e..8fd260fbdd2 100644 --- a/drivers/regulator/arizona-ldo1.c +++ b/drivers/regulator/arizona-ldo1.c @@ -275,9 +275,11 @@ static int arizona_ldo1_probe(struct platform_device *pdev) config.driver_data = ldo1; config.regmap = arizona->regmap; - ret = arizona_ldo1_of_get_pdata(arizona, &config); - if (ret < 0) - return ret; + if (!dev_get_platdata(arizona->dev)) { + ret = arizona_ldo1_of_get_pdata(arizona, &config); + if (ret < 0) + return ret; + } config.ena_gpio = arizona->pdata.ldoena; @@ -301,7 +303,8 @@ static int arizona_ldo1_probe(struct platform_device *pdev) return ret; } - arizona_ldo1_of_put_pdata(&config); + if (!dev_get_platdata(arizona->dev)) + arizona_ldo1_of_put_pdata(&config); platform_set_drvdata(pdev, ldo1); From a80d4997ed541c9c4d4cadf6f3499b711c709677 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 27 Mar 2014 13:54:08 +0000 Subject: [PATCH 0291/1167] regulator: arizona-micsupp: Only process DT if no pdata In arizona-core we only process the DT if no pdata is present, we should be consistent in this approach. This patch adds similar handling into this driver. Change-Id: Icfd8bc4446007c22588655a1490b468fa31f35aa Signed-off-by: Charles Keepax --- drivers/regulator/arizona-micsupp.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/regulator/arizona-micsupp.c b/drivers/regulator/arizona-micsupp.c index 614787aa260..e5f664650b7 100644 --- a/drivers/regulator/arizona-micsupp.c +++ b/drivers/regulator/arizona-micsupp.c @@ -372,9 +372,11 @@ static int arizona_micsupp_probe(struct platform_device *pdev) config.driver_data = micsupp; config.regmap = arizona->regmap; - ret = arizona_micsupp_of_get_pdata(arizona, &config); - if (ret < 0) - return ret; + if (!dev_get_platdata(arizona->dev)) { + ret = arizona_micsupp_of_get_pdata(arizona, &config); + if (ret < 0) + return ret; + } if (arizona->pdata.micvdd) config.init_data = arizona->pdata.micvdd; @@ -393,7 +395,8 @@ static int arizona_micsupp_probe(struct platform_device *pdev) return ret; } - arizona_micsupp_of_put_pdata(&config); + if (!dev_get_platdata(arizona->dev)) + arizona_micsupp_of_put_pdata(&config); platform_set_drvdata(pdev, micsupp); From a2d959ebc0d244ef837bab71a9ae0f4cab115fe0 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 1 Apr 2014 09:44:10 +0100 Subject: [PATCH 0292/1167] mfd: arizona: Move subnode documentation into its own section Change-Id: I7ed4187dddce18718e05fb433a22f3b873978b35 Signed-off-by: Charles Keepax --- Documentation/devicetree/bindings/mfd/arizona.txt | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 88fa07dfeec..908c61dee82 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -116,15 +116,16 @@ Optional properties: - wlf,fixed-hpdet-imp : Do not perform any headphone detection, just use the fixed value specified here as the headphone impedance. + - DCVDD-supply, MICVDD-supply : Power supplies, only need to be specified if + they are being externally supplied. As covered in + Documentation/devicetree/bindings/regulator/regulator.txt + +Optional subnodes: - ldo1 : Initial data for the LDO1 regulator, as covered in Documentation/devicetree/bindings/regulator/regulator.txt - micvdd : Initial data for the MICVDD regulator, as covered in Documentation/devicetree/bindings/regulator/regulator.txt - - DCVDD-supply, MICVDD-supply : Power supplies, only need to be specified if - they are being externally supplied. As covered in - Documentation/devicetree/bindings/regulator/regulator.txt - Example: codec: wm5102@1a { From 399893caa23346602981307a8305e9fb3823eb5c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 1 Apr 2014 10:52:28 +0100 Subject: [PATCH 0293/1167] mfd: arizona: Correct error message for addition of main IRQ chip Change-Id: Ib0780573fdfbd274b7a78522859e96517932c4be Signed-off-by: Charles Keepax --- drivers/mfd/arizona-irq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index 7d8baaf3f17..a829b2cf770 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -286,7 +286,7 @@ int arizona_irq_init(struct arizona *arizona) IRQF_ONESHOT, -1, irq, &arizona->irq_chip); if (ret != 0) { - dev_err(arizona->dev, "Failed to add AOD IRQs: %d\n", ret); + dev_err(arizona->dev, "Failed to add main IRQs: %d\n", ret); goto err_aod; } From 104b4c7362dd2df5cfadf491dbc6b139e7218ae5 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 1 Apr 2014 13:58:48 +0100 Subject: [PATCH 0294/1167] ASoC: florida: Add in OSR controls for OUT5/6 There are no OSR controls on outputs 1-4 on florida, however when these were removed the ones on output 5 and 6 were also accidentally removed. This patch adds these controls back in. Change-Id: Ic8fdbde0b55d94c5bc177b5fbc9e5dbcf3b8dd2e Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 9328c34c8b8..caefba68501 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -431,6 +431,11 @@ SOC_SINGLE("HPOUT2 SC Protect Switch", ARIZONA_HP2_SHORT_CIRCUIT_CTRL, SOC_SINGLE("HPOUT3 SC Protect Switch", ARIZONA_HP3_SHORT_CIRCUIT_CTRL, ARIZONA_HP3_SC_ENA_SHIFT, 1, 0), +SOC_SINGLE("SPKDAT1 High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_5L, + ARIZONA_OUT5_OSR_SHIFT, 1, 0), +SOC_SINGLE("SPKDAT2 High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_6L, + ARIZONA_OUT6_OSR_SHIFT, 1, 0), + SOC_DOUBLE_R("HPOUT1 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_1L, ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_MUTE_SHIFT, 1, 1), SOC_DOUBLE_R("HPOUT2 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_2L, From 1ca59e8a0d89606f708d65a232de7400a523e3f8 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Sat, 5 Apr 2014 11:05:39 +0100 Subject: [PATCH 0295/1167] ASoC: florida: Update trigger indicator regardless of callback Currently, we only update the triggered flag if we have a machine driver callback to inform of the trigger. This flag is useful for other things so this patch updates it regardless of if a callback is specified. Change-Id: I56b69b4f488f49e75698e4a60ae3408639f6c4ae Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index caefba68501..2b70fb8d5de 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -1761,11 +1761,11 @@ static irqreturn_t adsp2_irq(int irq, void *data) mutex_lock(&florida->compr_info.lock); - if (florida->core.arizona->pdata.ez2ctrl_trigger && - !florida->compr_info.trig && + if (!florida->compr_info.trig && florida->core.adsp[2].fw_id == 0x4000d && florida->core.adsp[2].running) { - florida->core.arizona->pdata.ez2ctrl_trigger(); + if (florida->core.arizona->pdata.ez2ctrl_trigger) + florida->core.arizona->pdata.ez2ctrl_trigger(); florida->compr_info.trig = true; } From f6d760a5b554ad56bf85ccd25dd480283581f799 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 4 Apr 2014 16:20:35 +0100 Subject: [PATCH 0296/1167] ASoC: florida: Keep track of if ez2control is forced on If ez2control is forced on we shouldn't clear the triggered flag when we close the stream as we may get another IRQ after the stream closes. This patch adds a forced flag to keep track of when the DSP is forced on and only clears trig when closing the stream if it is not forced. In the case it is forced the virtual output power event will clear the trigger. Change-Id: I8bd20db100c81bbc29411636d978aa7d75bfbb5c Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 24 +++++++++++++++++++++--- 1 file changed, 21 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 2b70fb8d5de..10e9f5fd255 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -46,6 +46,7 @@ struct florida_compr { size_t total_copied; bool trig; + bool forced; }; struct florida_priv { @@ -220,7 +221,23 @@ static int florida_virt_dsp_power_ev(struct snd_soc_dapm_widget *w, { struct florida_priv *florida = snd_soc_codec_get_drvdata(w->codec); - florida->compr_info.trig = false; + mutex_lock(&florida->compr_info.lock); + + if (!florida->compr_info.stream) + florida->compr_info.trig = false; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + florida->compr_info.forced = true; + break; + case SND_SOC_DAPM_PRE_PMD: + florida->compr_info.forced = false; + break; + default: + break; + } + + mutex_unlock(&florida->compr_info.lock); return 0; } @@ -1110,7 +1127,7 @@ SND_SOC_DAPM_VIRT_MUX("DSP3 Virtual Input", SND_SOC_NOPM, 0, 0, SND_SOC_DAPM_VIRT_MUX_E("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, &florida_dsp_output_mux[0], florida_virt_dsp_power_ev, - SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), ARIZONA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), ARIZONA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"), @@ -1842,7 +1859,8 @@ static int florida_free(struct snd_compr_stream *stream) florida->compr_info.stream = NULL; florida->compr_info.total_copied = 0; - florida->compr_info.trig = false; + if (!florida->compr_info.forced) + florida->compr_info.trig = false; wm_adsp_stream_free(florida->compr_info.adsp); From 5c5cd7a84b8a683d64986ff21c49630d34d2bf14 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 4 Apr 2014 15:26:17 +0100 Subject: [PATCH 0297/1167] ASoC: florida: Add support to sync up to a started ez2control stream Add support in the trigger callback to check if we have already received a trigger event before the stream was opened and manually process the data from this. This will allow streams to be opened in response to the trigger event if required. Change-Id: If2ef7631175c5d0245766b5f33a6840cda5ca13b Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 10e9f5fd255..13dbc37be3d 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -1909,12 +1909,20 @@ static int florida_trigger(struct snd_compr_stream *stream, int cmd) struct snd_soc_pcm_runtime *rtd = stream->private_data; struct florida_priv *florida = snd_soc_codec_get_drvdata(rtd->codec); int ret = 0; + bool pending = false; mutex_lock(&florida->compr_info.lock); switch (cmd) { case SNDRV_PCM_TRIGGER_START: ret = wm_adsp_stream_start(florida->compr_info.adsp); + + /** + * If the stream has already triggered before the stream + * opened better process any outstanding data + */ + if (florida->compr_info.trig) + pending = true; break; case SNDRV_PCM_TRIGGER_STOP: break; @@ -1925,6 +1933,9 @@ static int florida_trigger(struct snd_compr_stream *stream, int cmd) mutex_unlock(&florida->compr_info.lock); + if (pending) + adsp2_irq(0, florida); + return ret; } From 21dd17ead80c8a5bb1d72207a61dc3cf51358368 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 20 Jan 2014 14:11:01 +0000 Subject: [PATCH 0298/1167] Documentation: Add feature list of Wolfson arizona drivers Change-Id: I15eecd93153fc5d9524d251f2902f6249289ce9b Signed-off-by: Richard Fitzgerald --- .../sound/alsa/soc/wolfson-arizona.txt | 85 +++++++++++++++++++ 1 file changed, 85 insertions(+) create mode 100644 Documentation/sound/alsa/soc/wolfson-arizona.txt diff --git a/Documentation/sound/alsa/soc/wolfson-arizona.txt b/Documentation/sound/alsa/soc/wolfson-arizona.txt new file mode 100644 index 00000000000..882f365822d --- /dev/null +++ b/Documentation/sound/alsa/soc/wolfson-arizona.txt @@ -0,0 +1,85 @@ +This document lists the features of the Wolfson 'Arizona' class audio hubs +supported by the kernel drivers (WM8997, WM5102, WM8280, WM8281). Note that +some features are covered by other classes of driver (extcon, regulator, etc.) +and this list below shows the full set of features related to sound: + +'-' means not relevant for that audio hub model + + +Feature WM8997 WM5102 WM8280 WM8281 +--------------------------------------------------------------------------------- +24-bit samples Y Y Y Y +192kHz sample rate Y Y Y Y +Routing controlled via ALSA controls Y Y Y Y +Volume control on all mixer inputs Y Y Y Y +Volume control on all outputs Y Y Y Y +Mute control on all outputs Y Y Y Y +Output DRE control - Y Y Y +Output OSR control Y Y Y Y +Input ramp control Y Y Y Y +Output ramp control Y Y Y Y +Route any audio input to any mixer input Y Y Y Y +Route internal signals to mixer inputs Y Y Y Y +Route audio path through ISRC Y Y Y Y +Route audio path through ASRC - Y Y Y +Route audio path through EQs Y Y Y Y +Route audio path through low/high pass filters Y Y Y Y +Route audio path through DRCs Y Y Y Y +Route audio path through ADSP cores - Y Y Y +Set EQ coefficient through ALSA controls Y Y Y Y +Set low/high pass filter coeffs through ALSA controls Y Y Y Y +Set DRC coefficient through ALSA controls Y Y Y Y +Noise Gates controlled via ALSA controls Y Y Y Y +Configure inputs as analogue or digital mic [note 1] Y Y Y Y +Config analogue inputs as single-ended + or differential [note 1] Y Y Y Y +Host I2S routing to any AIF Y Y Y Y +I2S TDM (multi-channel) [note 2] Y Y Y Y +Configure TDM slot order N N N N +AEC loopback control Y Y Y Y +ANC block control [note 8] - - N N +Configure ADSP firmware for each ADSP core [note 3] - Y Y Y +Runtime-configurable ADSP firmware selection [note 6] - Y Y Y +Auto-load ADSP firmware when ADSP is in audio path - Y Y Y +Load algorithm tuning data with firmware - Y Y Y +Control firmware coefficients via ALSA controls - Y Y Y +Connect Noise Generator to any mixer input Y Y Y Y +Connect Tone Generator 1/2 to any mixer input Y Y Y Y +Configure sample-rate domain frequencies [note 4] Y Y Y Y +Auto sample-rate N N N N +Speaker short-circuit protection - N N N +Use write sequencer N N N N +Codec control over SPI - Y Y Y +Codec control over I2C Y Y Y Y +DAPM-based power up/down Y Y Y Y +Jack insert detection Y Y Y Y +Headset mic detection Y Y Y Y +Headset button detection Y Y Y Y +Headphone speaker impedance detection Y Y Y Y +Codec internal LDOVDD regulator control Y Y Y Y +Support for external LDO regulator Y Y Y Y +Build as loadable module Y Y Y Y +Configure via pdata Y Y Y Y +Configure via device tree [note 7] Y Y Y Y +Configure SYSCLK rate [note 5] Y Y Y Y +Configure ASYNCCLK rate [note 5] Y Y Y Y +Configure analogue mic bias [note 1] Y Y Y Y +Configure mapping of headset button resistance + to key event [note 1] Y Y Y Y +Support Ez2Control - N Y Y +Support trace firmware - - Y Y + +Notes: +1. Integration-time configuration. Not possible to change at runtime +2. TDM is only possible if host I2S controller and driver support TDM +3. Currently limited to set of known firmwares +4. Limited control of domain 2/3 frequency +5. Configured in ASoC machine driver +6. Firmware can be set by host but cannot be changed while ADSP is powered-up, + it must be removed from an active path to power-down and the new + firmware will be loaded when it is next powered-up as part of an + active path +7. Configuration from device tree is work-in-progress so there may be some + pdata settings that have not yet been migrated to device tree +8. The ANC is normally used by ADSP firmwares and there is currently no support + for using it directly from the host From b4fc13dee85c0be72ea5ed409a05b25fafc341f5 Mon Sep 17 00:00:00 2001 From: Liam Girdwood Date: Fri, 13 Sep 2013 17:43:17 +0100 Subject: [PATCH 0299/1167] ALSA: compress: Fix compress device unregister. snd_unregister_device() should return the device type and not stream direction. Signed-off-by: Liam Girdwood Acked-by: Vinod Koul Tested-by: Vinod Koul Cc: Signed-off-by: Takashi Iwai (cherry picked from commit 4028b6c4c03f213260e9290ff3a6b5439aad07ce) Signed-off-by: Charles Keepax --- sound/core/compress_offload.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/core/compress_offload.c b/sound/core/compress_offload.c index 8b88e835a56..c01090c223a 100644 --- a/sound/core/compress_offload.c +++ b/sound/core/compress_offload.c @@ -834,7 +834,8 @@ static int snd_compress_dev_disconnect(struct snd_device *device) struct snd_compr *compr; compr = device->device_data; - snd_unregister_device(compr->direction, compr->card, compr->device); + snd_unregister_device(SNDRV_DEVICE_TYPE_COMPRESS, compr->card, + compr->device); return 0; } From 3af5e5ca65bb3124ac1538db19dea28b3b4f475d Mon Sep 17 00:00:00 2001 From: Liam Girdwood Date: Fri, 13 Sep 2013 17:43:16 +0100 Subject: [PATCH 0300/1167] ALSA: compress: Make sure we trigger STOP before closing the stream. Currently we assume that userspace will shut down the compressed stream correctly. However, if userspcae dies (e.g. cplay & ctrl-C) we dont stop the stream before freeing it. This now checks that the stream is stopped before freeing. Signed-off-by: Liam Girdwood Signed-off-by: Takashi Iwai (cherry picked from commit b26d19e44adfd10b691bf4ffd50ed411c1be9317) Signed-off-by: Charles Keepax --- sound/core/compress_offload.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/sound/core/compress_offload.c b/sound/core/compress_offload.c index c01090c223a..4a8941bdb0e 100644 --- a/sound/core/compress_offload.c +++ b/sound/core/compress_offload.c @@ -139,6 +139,18 @@ static int snd_compr_open(struct inode *inode, struct file *f) static int snd_compr_free(struct inode *inode, struct file *f) { struct snd_compr_file *data = f->private_data; + struct snd_compr_runtime *runtime = data->stream.runtime; + + switch (runtime->state) { + case SNDRV_PCM_STATE_RUNNING: + case SNDRV_PCM_STATE_DRAINING: + case SNDRV_PCM_STATE_PAUSED: + data->stream.ops->trigger(&data->stream, SNDRV_PCM_TRIGGER_STOP); + break; + default: + break; + } + data->stream.ops->free(&data->stream); kfree(data->stream.runtime->buffer); kfree(data->stream.runtime); From 19bfae2f3137d83132e77e01f7d36aa78f81d689 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 16 Apr 2014 08:46:23 +0100 Subject: [PATCH 0301/1167] mfd: florida: Add missing isolation control register The isolation control register is required when DCVDD is externally supplied add this in as a readable register. Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 6f47c4892ce..f3da9913cc7 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -550,6 +550,7 @@ static const struct reg_default florida_reg_default[] = { { 0x000002A9, 0x300A }, /* R681 - Mic Detect Level 4 */ { 0x000002AB, 0x0000 }, /* R683 - Mic Detect 4 */ { 0x000002C3, 0x0000 }, /* R707 - Mic noise mix control 1 */ + { 0x000002CB, 0x0000 }, /* R715 - Isolation control */ { 0x000002D3, 0x0000 }, /* R723 - Jack detect analogue */ { 0x00000300, 0x0000 }, /* R768 - Input Enables */ { 0x00000308, 0x0000 }, /* R776 - Input Rate */ @@ -1621,6 +1622,7 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_MIC_DETECT_LEVEL_3: case ARIZONA_MIC_DETECT_LEVEL_4: case ARIZONA_MIC_NOISE_MIX_CONTROL_1: + case ARIZONA_ISOLATION_CONTROL: case ARIZONA_JACK_DETECT_ANALOGUE: case ARIZONA_INPUT_ENABLES: case ARIZONA_INPUT_ENABLES_STATUS: From beb65de76ce130cf5b8b498260de1ba00e72e951 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 17 Apr 2014 13:16:14 +0100 Subject: [PATCH 0302/1167] ASoC: wm_adsp: Remove uneeded semicolon Reported-by: kbuild test robot Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 2d6ae27322c..f5cd9a21abf 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2055,7 +2055,7 @@ int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, break; default: break; - }; + } return 0; } From ce59ef08e60b8b2dbf7866df337d17f8c082d113 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 18 Apr 2014 11:50:06 +0100 Subject: [PATCH 0303/1167] switch: arizona: Clear manual micd debounce state on jack removal Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index dc6ae748d33..120a43c0eba 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1331,6 +1331,8 @@ static irqreturn_t arizona_jackdet(int irq, void *data) for (i = 0; i < ARRAY_SIZE(info->hpdet_res); i++) info->hpdet_res[i] = 0; info->mic = false; + info->micd_current = 0; + info->micd_res_old = 0; info->hpdet_done = false; info->hpdet_retried = false; arizona->hp_impedance = 0; From fab5ff8bc05de3d9d8957fce84ebe1d49c8263b4 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 18 Apr 2014 10:41:32 +0100 Subject: [PATCH 0304/1167] ASoC: wm5110: Don't fail open if we can't set wake source for IRQ Failing to set the IRQ as a wake source is not necessarily a fatal error. Whilst unlikely it is plausible we might not require the IRQ to wake the AP. Change-Id: I27f85bad6d762f50cc56d1db8dd19ad09a947c0c Reported-by: Vitaly Rodionov Signed-off-by: Charles Keepax Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/florida.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 13dbc37be3d..ff89ce0e57c 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2035,13 +2035,10 @@ static int florida_codec_probe(struct snd_soc_codec *codec) } ret = irq_set_irq_wake(arizona->irq, 1); - if (ret) { + if (ret) dev_err(arizona->dev, "Failed to set DSP IRQ to wake source: %d\n", ret); - arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); - return ret; - } mutex_lock(&codec->card->dapm_mutex); snd_soc_dapm_enable_pin(&codec->dapm, "DRC2 Signal Activity"); From 9cbc8299446c29eca8a3563b99d9513c6eed8f33 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 3 Mar 2014 15:46:53 +0000 Subject: [PATCH 0305/1167] switch: arizona: remove unnecessary WARN_ON() WARN_ON() is an unnecessarily drastic measure to take when we detect a button press level that isn't defined. Change this to a dev_warn(). Change-Id: Ic6838a8e39079005fd95e9821786e2bc475b7c69 Signed-off-by: Richard Fitzgerald --- drivers/switch/switch-arizona.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 120a43c0eba..49988493dc1 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1143,14 +1143,14 @@ static void arizona_micd_detect(struct work_struct *work) input_report_key(info->input, info->micd_ranges[i].key, 0); - WARN_ON(!lvl); - WARN_ON(ffs(lvl) - 1 >= info->num_micd_ranges); if (lvl && ffs(lvl) - 1 < info->num_micd_ranges) { key = info->micd_ranges[ffs(lvl) - 1].key; input_report_key(info->input, key, 1); input_sync(info->input); + } else { + dev_warn(arizona->dev, + "Button level %u out of range\n", lvl); } - } else if (info->detecting) { dev_dbg(arizona->dev, "Headphone detected\n"); info->detecting = false; From 0d35ccc988046a94e33e1cff04de0400612f55df Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 24 Apr 2014 15:52:03 +0100 Subject: [PATCH 0306/1167] ASoC: wm_adsp: Add Ez2Listen speaker and headphone firmwares Change-Id: Icf3c5882d7c4ee16bb4706faeee3b917050371fc Signed-off-by: sunnyyhj Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index f5cd9a21abf..6ed2f8f061c 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -197,7 +197,7 @@ static void wm_adsp_buf_free(struct list_head *list) /* Must remain a power of two */ #define WM_ADSP_CAPTURE_BUFFER_SIZE 1048576 -#define WM_ADSP_NUM_FW 7 +#define WM_ADSP_NUM_FW 9 #define WM_ADSP_FW_MBC_VSS 0 #define WM_ADSP_FW_TX 1 @@ -206,6 +206,8 @@ static void wm_adsp_buf_free(struct list_head *list) #define WM_ADSP_FW_EZ2CONTROL 4 #define WM_ADSP_FW_TRACE 5 #define WM_ADSP_FW_EDAC 6 +#define WM_ADSP_FW_EZ2LISTEN_SP 7 +#define WM_ADSP_FW_EZ2LISTEN_HP 8 static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_MBC_VSS] = "MBC/VSS", @@ -215,6 +217,8 @@ static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_EZ2CONTROL] = "Ez2Control", [WM_ADSP_FW_TRACE] = "Trace", [WM_ADSP_FW_EDAC] = "EDAC", + [WM_ADSP_FW_EZ2LISTEN_SP] = "Ez2Listen SP", + [WM_ADSP_FW_EZ2LISTEN_HP] = "Ez2Listen HP", }; struct wm_adsp_system_config_xm_hdr { @@ -364,6 +368,8 @@ static struct wm_adsp_fw_defs wm_adsp_fw[WM_ADSP_NUM_FW] = { .caps = trace_caps, }, [WM_ADSP_FW_EDAC] = { .file = "edac" }, + [WM_ADSP_FW_EZ2LISTEN_SP] = { .file = "ez2listen-sp" }, + [WM_ADSP_FW_EZ2LISTEN_HP] = { .file = "ez2listen-hp" }, }; struct wm_coeff_ctl_ops { From efa3c631383c7bd5ade859dd1e1e1e595736f681 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 24 Apr 2014 15:54:36 +0100 Subject: [PATCH 0307/1167] ASoC: wm_adsp: Add Ez2Hear firmwares Change-Id: I71d8fadb2f5d046ee53c3e44521820a7f6e875d0 Signed-off-by: sunnyyhj Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 6ed2f8f061c..5acc9718ca7 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -197,7 +197,7 @@ static void wm_adsp_buf_free(struct list_head *list) /* Must remain a power of two */ #define WM_ADSP_CAPTURE_BUFFER_SIZE 1048576 -#define WM_ADSP_NUM_FW 9 +#define WM_ADSP_NUM_FW 12 #define WM_ADSP_FW_MBC_VSS 0 #define WM_ADSP_FW_TX 1 @@ -208,6 +208,9 @@ static void wm_adsp_buf_free(struct list_head *list) #define WM_ADSP_FW_EDAC 6 #define WM_ADSP_FW_EZ2LISTEN_SP 7 #define WM_ADSP_FW_EZ2LISTEN_HP 8 +#define WM_ADSP_FW_EZ2HEAR_SP_TX 9 +#define WM_ADSP_FW_EZ2HEAR_HS_TX 10 +#define WM_ADSP_FW_EZ2HEAR_RX 11 static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_MBC_VSS] = "MBC/VSS", @@ -219,6 +222,9 @@ static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_EDAC] = "EDAC", [WM_ADSP_FW_EZ2LISTEN_SP] = "Ez2Listen SP", [WM_ADSP_FW_EZ2LISTEN_HP] = "Ez2Listen HP", + [WM_ADSP_FW_EZ2HEAR_SP_TX] = "Ez2HearSP Tx", + [WM_ADSP_FW_EZ2HEAR_HS_TX] = "Ez2HearHS Tx", + [WM_ADSP_FW_EZ2HEAR_RX] = "Ez2Hear Rx", }; struct wm_adsp_system_config_xm_hdr { @@ -370,6 +376,9 @@ static struct wm_adsp_fw_defs wm_adsp_fw[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_EDAC] = { .file = "edac" }, [WM_ADSP_FW_EZ2LISTEN_SP] = { .file = "ez2listen-sp" }, [WM_ADSP_FW_EZ2LISTEN_HP] = { .file = "ez2listen-hp" }, + [WM_ADSP_FW_EZ2HEAR_SP_TX] = { .file = "ez2hear-sp-tx" }, + [WM_ADSP_FW_EZ2HEAR_HS_TX] = { .file = "ez2hear-hs-tx" }, + [WM_ADSP_FW_EZ2HEAR_RX] = { .file = "ez2hear-rx" }, }; struct wm_coeff_ctl_ops { From 76b8e0639b6af9f00fc82087479ddd5c1f1dbe41 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 24 Apr 2014 15:56:08 +0100 Subject: [PATCH 0308/1167] ASoC: wm_adsp: Add Ez2FaceTalk Tx and Rx firmwares Change-Id: Ib1461188f399c22e9b034413e20a995ccf7850a9 Signed-off-by: sunnyyhj Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 5acc9718ca7..6ca9024e2d7 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -197,7 +197,7 @@ static void wm_adsp_buf_free(struct list_head *list) /* Must remain a power of two */ #define WM_ADSP_CAPTURE_BUFFER_SIZE 1048576 -#define WM_ADSP_NUM_FW 12 +#define WM_ADSP_NUM_FW 14 #define WM_ADSP_FW_MBC_VSS 0 #define WM_ADSP_FW_TX 1 @@ -211,6 +211,8 @@ static void wm_adsp_buf_free(struct list_head *list) #define WM_ADSP_FW_EZ2HEAR_SP_TX 9 #define WM_ADSP_FW_EZ2HEAR_HS_TX 10 #define WM_ADSP_FW_EZ2HEAR_RX 11 +#define WM_ADSP_FW_EZ2FACETALK_TX 12 +#define WM_ADSP_FW_EZ2FACETALK_RX 13 static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_MBC_VSS] = "MBC/VSS", @@ -225,6 +227,8 @@ static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_EZ2HEAR_SP_TX] = "Ez2HearSP Tx", [WM_ADSP_FW_EZ2HEAR_HS_TX] = "Ez2HearHS Tx", [WM_ADSP_FW_EZ2HEAR_RX] = "Ez2Hear Rx", + [WM_ADSP_FW_EZ2FACETALK_TX] = "Ez2FaceTalk Tx", + [WM_ADSP_FW_EZ2FACETALK_RX] = "Ez2FaceTalk Rx", }; struct wm_adsp_system_config_xm_hdr { @@ -379,6 +383,8 @@ static struct wm_adsp_fw_defs wm_adsp_fw[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_EZ2HEAR_SP_TX] = { .file = "ez2hear-sp-tx" }, [WM_ADSP_FW_EZ2HEAR_HS_TX] = { .file = "ez2hear-hs-tx" }, [WM_ADSP_FW_EZ2HEAR_RX] = { .file = "ez2hear-rx" }, + [WM_ADSP_FW_EZ2FACETALK_TX] = { .file = "ez2facetalk-tx" }, + [WM_ADSP_FW_EZ2FACETALK_RX] = { .file = "ez2facetalk-rx" }, }; struct wm_coeff_ctl_ops { From 7454e348c9df2cad237774d394b64a23b0586845 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 24 Apr 2014 15:57:40 +0100 Subject: [PATCH 0309/1167] ASoC: wm_adsp: Add Ez2GroupTalk Tx and Rx firmwares Change-Id: I1b1325a25d0a5de4839d73dfd297ad4e37b1ba80 Signed-off-by: Huijing Yu Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 6ca9024e2d7..38f74c41843 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -197,7 +197,7 @@ static void wm_adsp_buf_free(struct list_head *list) /* Must remain a power of two */ #define WM_ADSP_CAPTURE_BUFFER_SIZE 1048576 -#define WM_ADSP_NUM_FW 14 +#define WM_ADSP_NUM_FW 16 #define WM_ADSP_FW_MBC_VSS 0 #define WM_ADSP_FW_TX 1 @@ -213,6 +213,8 @@ static void wm_adsp_buf_free(struct list_head *list) #define WM_ADSP_FW_EZ2HEAR_RX 11 #define WM_ADSP_FW_EZ2FACETALK_TX 12 #define WM_ADSP_FW_EZ2FACETALK_RX 13 +#define WM_ADSP_FW_EZ2GROUPTALK_TX 14 +#define WM_ADSP_FW_EZ2GROUPTALK_RX 15 static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_MBC_VSS] = "MBC/VSS", @@ -229,6 +231,8 @@ static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_EZ2HEAR_RX] = "Ez2Hear Rx", [WM_ADSP_FW_EZ2FACETALK_TX] = "Ez2FaceTalk Tx", [WM_ADSP_FW_EZ2FACETALK_RX] = "Ez2FaceTalk Rx", + [WM_ADSP_FW_EZ2GROUPTALK_TX] = "Ez2GroupTalk Tx", + [WM_ADSP_FW_EZ2GROUPTALK_RX] = "Ez2GroupTalk Rx", }; struct wm_adsp_system_config_xm_hdr { @@ -385,6 +389,8 @@ static struct wm_adsp_fw_defs wm_adsp_fw[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_EZ2HEAR_RX] = { .file = "ez2hear-rx" }, [WM_ADSP_FW_EZ2FACETALK_TX] = { .file = "ez2facetalk-tx" }, [WM_ADSP_FW_EZ2FACETALK_RX] = { .file = "ez2facetalk-rx" }, + [WM_ADSP_FW_EZ2GROUPTALK_TX] = { .file = "ez2grouptalk-tx" }, + [WM_ADSP_FW_EZ2GROUPTALK_RX] = { .file = "ez2grouptalk-rx" }, }; struct wm_coeff_ctl_ops { From d5cd5535eaf5fb4904df1c8e5823073159d358ea Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 24 Apr 2014 15:58:58 +0100 Subject: [PATCH 0310/1167] ASoC: wm_adsp: Add firmware option for Ez2Record Change-Id: Ieff59d7665273bc2b6d33bcf3c1a08d0dfb2f947 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 38f74c41843..492f17f6665 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -197,7 +197,7 @@ static void wm_adsp_buf_free(struct list_head *list) /* Must remain a power of two */ #define WM_ADSP_CAPTURE_BUFFER_SIZE 1048576 -#define WM_ADSP_NUM_FW 16 +#define WM_ADSP_NUM_FW 17 #define WM_ADSP_FW_MBC_VSS 0 #define WM_ADSP_FW_TX 1 @@ -215,6 +215,7 @@ static void wm_adsp_buf_free(struct list_head *list) #define WM_ADSP_FW_EZ2FACETALK_RX 13 #define WM_ADSP_FW_EZ2GROUPTALK_TX 14 #define WM_ADSP_FW_EZ2GROUPTALK_RX 15 +#define WM_ADSP_FW_EZ2RECORD 16 static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_MBC_VSS] = "MBC/VSS", @@ -233,6 +234,7 @@ static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_EZ2FACETALK_RX] = "Ez2FaceTalk Rx", [WM_ADSP_FW_EZ2GROUPTALK_TX] = "Ez2GroupTalk Tx", [WM_ADSP_FW_EZ2GROUPTALK_RX] = "Ez2GroupTalk Rx", + [WM_ADSP_FW_EZ2RECORD] = "Ez2Record", }; struct wm_adsp_system_config_xm_hdr { @@ -391,6 +393,7 @@ static struct wm_adsp_fw_defs wm_adsp_fw[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_EZ2FACETALK_RX] = { .file = "ez2facetalk-rx" }, [WM_ADSP_FW_EZ2GROUPTALK_TX] = { .file = "ez2grouptalk-tx" }, [WM_ADSP_FW_EZ2GROUPTALK_RX] = { .file = "ez2grouptalk-rx" }, + [WM_ADSP_FW_EZ2RECORD] = { .file = "ez2record" }, }; struct wm_coeff_ctl_ops { From 9ea2bc91f81ad3cb3992c3c0fb182244bc45da58 Mon Sep 17 00:00:00 2001 From: Takashi Iwai Date: Tue, 18 Feb 2014 12:36:54 +0100 Subject: [PATCH 0311/1167] ASoC: arizona: Fix wrong number of items in enum ctls arizona codec driver has a few places wrongly defining the number of enum items. Use SOC_ENUM_SINGLE_DECL() macro and they are automatically fixed. [ Added in const before the SOC_ENUM_SINGLE_DECL definitions, this has been added to the macro upstream but we need it manually added on this kernel version - Charles ] Change-Id: I06f799e62957eaf221252df08e4cade6bd55b9ad Signed-off-by: Takashi Iwai Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 71 +++++++++++++++++++++----------------- 1 file changed, 40 insertions(+), 31 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 99d48dc0941..7c28d053499 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -595,67 +595,76 @@ static const char *arizona_vol_ramp_text[] = { "15ms/6dB", "30ms/6dB", }; -const struct soc_enum arizona_in_vd_ramp = - SOC_ENUM_SINGLE(ARIZONA_INPUT_VOLUME_RAMP, - ARIZONA_IN_VD_RAMP_SHIFT, 7, arizona_vol_ramp_text); +const SOC_ENUM_SINGLE_DECL(arizona_in_vd_ramp, + ARIZONA_INPUT_VOLUME_RAMP, + ARIZONA_IN_VD_RAMP_SHIFT, + arizona_vol_ramp_text); EXPORT_SYMBOL_GPL(arizona_in_vd_ramp); -const struct soc_enum arizona_in_vi_ramp = - SOC_ENUM_SINGLE(ARIZONA_INPUT_VOLUME_RAMP, - ARIZONA_IN_VI_RAMP_SHIFT, 7, arizona_vol_ramp_text); +const SOC_ENUM_SINGLE_DECL(arizona_in_vi_ramp, + ARIZONA_INPUT_VOLUME_RAMP, + ARIZONA_IN_VI_RAMP_SHIFT, + arizona_vol_ramp_text); EXPORT_SYMBOL_GPL(arizona_in_vi_ramp); -const struct soc_enum arizona_out_vd_ramp = - SOC_ENUM_SINGLE(ARIZONA_OUTPUT_VOLUME_RAMP, - ARIZONA_OUT_VD_RAMP_SHIFT, 7, arizona_vol_ramp_text); +const SOC_ENUM_SINGLE_DECL(arizona_out_vd_ramp, + ARIZONA_OUTPUT_VOLUME_RAMP, + ARIZONA_OUT_VD_RAMP_SHIFT, + arizona_vol_ramp_text); EXPORT_SYMBOL_GPL(arizona_out_vd_ramp); -const struct soc_enum arizona_out_vi_ramp = - SOC_ENUM_SINGLE(ARIZONA_OUTPUT_VOLUME_RAMP, - ARIZONA_OUT_VI_RAMP_SHIFT, 7, arizona_vol_ramp_text); +const SOC_ENUM_SINGLE_DECL(arizona_out_vi_ramp, + ARIZONA_OUTPUT_VOLUME_RAMP, + ARIZONA_OUT_VI_RAMP_SHIFT, + arizona_vol_ramp_text); EXPORT_SYMBOL_GPL(arizona_out_vi_ramp); static const char *arizona_lhpf_mode_text[] = { "Low-pass", "High-pass" }; -const struct soc_enum arizona_lhpf1_mode = - SOC_ENUM_SINGLE(ARIZONA_HPLPF1_1, ARIZONA_LHPF1_MODE_SHIFT, 2, - arizona_lhpf_mode_text); +const SOC_ENUM_SINGLE_DECL(arizona_lhpf1_mode, + ARIZONA_HPLPF1_1, + ARIZONA_LHPF1_MODE_SHIFT, + arizona_lhpf_mode_text); EXPORT_SYMBOL_GPL(arizona_lhpf1_mode); -const struct soc_enum arizona_lhpf2_mode = - SOC_ENUM_SINGLE(ARIZONA_HPLPF2_1, ARIZONA_LHPF2_MODE_SHIFT, 2, - arizona_lhpf_mode_text); +const SOC_ENUM_SINGLE_DECL(arizona_lhpf2_mode, + ARIZONA_HPLPF2_1, + ARIZONA_LHPF2_MODE_SHIFT, + arizona_lhpf_mode_text); EXPORT_SYMBOL_GPL(arizona_lhpf2_mode); -const struct soc_enum arizona_lhpf3_mode = - SOC_ENUM_SINGLE(ARIZONA_HPLPF3_1, ARIZONA_LHPF3_MODE_SHIFT, 2, - arizona_lhpf_mode_text); +const SOC_ENUM_SINGLE_DECL(arizona_lhpf3_mode, + ARIZONA_HPLPF3_1, + ARIZONA_LHPF3_MODE_SHIFT, + arizona_lhpf_mode_text); EXPORT_SYMBOL_GPL(arizona_lhpf3_mode); -const struct soc_enum arizona_lhpf4_mode = - SOC_ENUM_SINGLE(ARIZONA_HPLPF4_1, ARIZONA_LHPF4_MODE_SHIFT, 2, - arizona_lhpf_mode_text); +const SOC_ENUM_SINGLE_DECL(arizona_lhpf4_mode, + ARIZONA_HPLPF4_1, + ARIZONA_LHPF4_MODE_SHIFT, + arizona_lhpf_mode_text); EXPORT_SYMBOL_GPL(arizona_lhpf4_mode); static const char *arizona_ng_hold_text[] = { "30ms", "120ms", "250ms", "500ms", }; -const struct soc_enum arizona_ng_hold = - SOC_ENUM_SINGLE(ARIZONA_NOISE_GATE_CONTROL, ARIZONA_NGATE_HOLD_SHIFT, - 4, arizona_ng_hold_text); +const SOC_ENUM_SINGLE_DECL(arizona_ng_hold, + ARIZONA_NOISE_GATE_CONTROL, + ARIZONA_NGATE_HOLD_SHIFT, + arizona_ng_hold_text); EXPORT_SYMBOL_GPL(arizona_ng_hold); static const char * const arizona_in_hpf_cut_text[] = { "2.5Hz", "5Hz", "10Hz", "20Hz", "40Hz" }; -const struct soc_enum arizona_in_hpf_cut_enum = - SOC_ENUM_SINGLE(ARIZONA_HPF_CONTROL, ARIZONA_IN_HPF_CUT_SHIFT, - ARRAY_SIZE(arizona_in_hpf_cut_text), - arizona_in_hpf_cut_text); +const SOC_ENUM_SINGLE_DECL(arizona_in_hpf_cut_enum, + ARIZONA_HPF_CONTROL, + ARIZONA_IN_HPF_CUT_SHIFT, + arizona_in_hpf_cut_text); EXPORT_SYMBOL_GPL(arizona_in_hpf_cut_enum); static const char * const arizona_in_dmic_osr_text[] = { From 712b7ca30d57a561bdc54ec45275987a8f29d3c5 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Sat, 26 Apr 2014 11:15:17 +0100 Subject: [PATCH 0312/1167] extcon: arizona: Remove compilation errors when no CONFIG_OF Change-Id: Icda66443b30eba17db83fae4f735ccb97d4d021c Signed-off-by: Nikesh Oswal Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 5044acc76a6..adb204bfcd1 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -1192,6 +1192,7 @@ static void arizona_micd_set_level(struct arizona *arizona, int index, regmap_update_bits(arizona->regmap, reg, mask, level); } +#ifdef CONFIG_OF static int arizona_extcon_get_pdata(struct arizona *arizona) { struct arizona_pdata *pdata = &arizona->pdata; @@ -1239,6 +1240,12 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) return 0; } +#else +static inline int arizona_extcon_get_pdata(struct arizona *arizona) +{ + return 0; +} +#endif static ssize_t arizona_extcon_show(struct device *dev, struct device_attribute *attr, From 83b1c8484bdc6744defa83d9536bf71d8b012db4 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Sat, 26 Apr 2014 11:17:03 +0100 Subject: [PATCH 0313/1167] switch: arizona: Remove compilation errors when no CONFIG_OF Change-Id: I3f938ebfa16ec0408de9fa69284dfe2d7d485a2a Signed-off-by: Nikesh Oswal Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 49988493dc1..5c323760d08 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1404,6 +1404,7 @@ static void arizona_micd_set_level(struct arizona *arizona, int index, regmap_update_bits(arizona->regmap, reg, mask, level); } +#ifdef CONFIG_OF static int arizona_extcon_get_pdata(struct arizona *arizona) { struct arizona_pdata *pdata = &arizona->pdata; @@ -1457,6 +1458,12 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) return 0; } +#else +static inline int arizona_extcon_get_pdata(struct arizona *arizona) +{ + return 0; +} +#endif static ssize_t arizona_extcon_show(struct device *dev, struct device_attribute *attr, From b358bbfdcee1724755d4be40ce8f9e72a712660c Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Sat, 26 Apr 2014 11:17:26 +0100 Subject: [PATCH 0314/1167] ASoC: wm_adsp: Remove compilation errors when no CONFIG_OF Change-Id: I87eb1800233317438e5c5efd725a428bbaec8a13 Signed-off-by: Nikesh Oswal Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 492f17f6665..8cfffac8e67 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2212,6 +2212,7 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, } EXPORT_SYMBOL_GPL(wm_adsp2_event); +#ifdef CONFIG_OF static int wm_adsp_of_parse_caps(struct wm_adsp *adsp, struct device_node *np, struct wm_adsp_fw_defs *fw) @@ -2357,6 +2358,12 @@ static int wm_adsp_of_parse_adsp(struct wm_adsp *adsp) return wm_adsp_of_parse_firmware(adsp, core); } +#else +static inline int wm_adsp_of_parse_adsp(struct wm_adsp *adsp) +{ + return 0; +} +#endif int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs) { From 9a67386b8711617cba1121750c5e158b1799bf2c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 15 Apr 2014 16:38:31 +0100 Subject: [PATCH 0315/1167] regulator: arizona-ldo1: Sync with upstream comments Use of IS_ENABLED is preferred for configuration specific code, so use that instead of of ifdef. Change-Id: I1572ffafaf0657a6356d30aeb6f0de13286452e9 Signed-off-by: Charles Keepax --- drivers/regulator/arizona-ldo1.c | 30 +++++++----------------------- 1 file changed, 7 insertions(+), 23 deletions(-) diff --git a/drivers/regulator/arizona-ldo1.c b/drivers/regulator/arizona-ldo1.c index 8fd260fbdd2..c6e175a4f5a 100644 --- a/drivers/regulator/arizona-ldo1.c +++ b/drivers/regulator/arizona-ldo1.c @@ -179,7 +179,6 @@ static const struct regulator_init_data arizona_ldo1_default = { .num_consumer_supplies = 1, }; -#ifdef CONFIG_OF static int arizona_ldo1_of_get_pdata(struct arizona *arizona, struct regulator_config *config) { @@ -216,22 +215,6 @@ static int arizona_ldo1_of_get_pdata(struct arizona *arizona, return 0; } -static void arizona_ldo1_of_put_pdata(struct regulator_config *config) -{ - of_node_put(config->of_node); -} -#else -static inline int arizona_ldo1_of_get_pdata(struct arizona *arizona, - struct regulator_config *config) -{ - return 0; -} - -static inline void arizona_ldo1_of_put_pdata(struct regulator_config *config) -{ -} -#endif - static int arizona_ldo1_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); @@ -275,10 +258,12 @@ static int arizona_ldo1_probe(struct platform_device *pdev) config.driver_data = ldo1; config.regmap = arizona->regmap; - if (!dev_get_platdata(arizona->dev)) { - ret = arizona_ldo1_of_get_pdata(arizona, &config); - if (ret < 0) - return ret; + if (IS_ENABLED(CONFIG_OF)) { + if (!dev_get_platdata(arizona->dev)) { + ret = arizona_ldo1_of_get_pdata(arizona, &config); + if (ret < 0) + return ret; + } } config.ena_gpio = arizona->pdata.ldoena; @@ -303,8 +288,7 @@ static int arizona_ldo1_probe(struct platform_device *pdev) return ret; } - if (!dev_get_platdata(arizona->dev)) - arizona_ldo1_of_put_pdata(&config); + of_node_put(config.of_node); platform_set_drvdata(pdev, ldo1); From eeb445c53ec6be7bed5caab2bd4a6ee4bb021707 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 15 Apr 2014 16:38:56 +0100 Subject: [PATCH 0316/1167] regulator: arizona-micsupp: Sync with upstream comments Use of IS_ENABLED is preferred for configuration specific code, so use that instead of of ifdef. Change-Id: Iae2f7069e7781f3198a58f72392659f791d30eb7 Signed-off-by: Charles Keepax --- drivers/regulator/arizona-micsupp.c | 30 +++++++---------------------- 1 file changed, 7 insertions(+), 23 deletions(-) diff --git a/drivers/regulator/arizona-micsupp.c b/drivers/regulator/arizona-micsupp.c index e5f664650b7..7a22974b94d 100644 --- a/drivers/regulator/arizona-micsupp.c +++ b/drivers/regulator/arizona-micsupp.c @@ -288,7 +288,6 @@ static const struct regulator_init_data arizona_micsupp_ext_default = { .num_consumer_supplies = 1, }; -#ifdef CONFIG_OF static int arizona_micsupp_of_get_pdata(struct arizona *arizona, struct regulator_config *config) { @@ -315,22 +314,6 @@ static int arizona_micsupp_of_get_pdata(struct arizona *arizona, return 0; } -static void arizona_micsupp_of_put_pdata(struct regulator_config *config) -{ - of_node_put(config->of_node); -} -#else -static inline int arizona_micsupp_of_get_pdata(struct arizona *arizona, - struct regulator_config *config) -{ - return 0; -} - -static inline void arizona_micsupp_of_put_pdata(struct regulator_config *config) -{ -} -#endif - static int arizona_micsupp_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); @@ -372,10 +355,12 @@ static int arizona_micsupp_probe(struct platform_device *pdev) config.driver_data = micsupp; config.regmap = arizona->regmap; - if (!dev_get_platdata(arizona->dev)) { - ret = arizona_micsupp_of_get_pdata(arizona, &config); - if (ret < 0) - return ret; + if (IS_ENABLED(CONFIG_OF)) { + if (!dev_get_platdata(arizona->dev)) { + ret = arizona_micsupp_of_get_pdata(arizona, &config); + if (ret < 0) + return ret; + } } if (arizona->pdata.micvdd) @@ -395,8 +380,7 @@ static int arizona_micsupp_probe(struct platform_device *pdev) return ret; } - if (!dev_get_platdata(arizona->dev)) - arizona_micsupp_of_put_pdata(&config); + of_node_put(config.of_node); platform_set_drvdata(pdev, micsupp); From 81fc5e57548cf1735dc59b976b9e1349371c1799 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 21 Apr 2014 09:22:24 +0100 Subject: [PATCH 0317/1167] mfd: arizona: Sync arizona_of_get_named_gpio with upstream Sync up arizona_of_get_named_gpio with the upstream implementation. Note that this patch updates all the callers of this function as well. Change-Id: I6654a1eb0aa70d0941f11cdfd4c9960a642961ee Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 5 +++-- drivers/mfd/arizona-core.c | 29 +++++++++++++---------------- drivers/regulator/arizona-ldo1.c | 2 +- drivers/switch/switch-arizona.c | 5 +++-- include/linux/mfd/arizona/core.h | 2 +- 5 files changed, 21 insertions(+), 22 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index adb204bfcd1..c6b4ba16afe 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -1200,8 +1200,9 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,micd-detect-debounce", false, &pdata->micd_detect_debounce); - arizona_of_get_named_gpio(arizona, "wlf,micd-pol-gpio", false, - &pdata->micd_pol_gpio); + pdata->micd_pol_gpio = arizona_of_get_named_gpio(arizona, + "wlf,micd-pol-gpio", + false); arizona_of_read_u32(arizona, "wlf,micd-bias-start-time", false, &pdata->micd_bias_start_time); diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 73bf5182bfb..76e92a9e383 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -587,25 +587,22 @@ int arizona_of_get_type(struct device *dev) } EXPORT_SYMBOL_GPL(arizona_of_get_type); -int arizona_of_get_named_gpio(struct arizona *arizona, - const char *prop, bool mandatory, - int *gpio) +int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, + bool mandatory) { - int ret; - - ret = of_get_named_gpio(arizona->dev->of_node, prop, 0); - *gpio = ret; - if (ret >= 0) - return ret; + int gpio; - *gpio = 0; + gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0); + if (gpio < 0) { + if (mandatory) + dev_err(arizona->dev, + "Mandatory DT gpio %s missing/malformed: %d\n", + prop, gpio); - if (mandatory) - dev_err(arizona->dev, - "Mandatory DT gpio %s missing/malformed: %d\n", - prop, ret); + gpio = 0; + } - return ret; + return gpio; } EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio); @@ -812,7 +809,7 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) { struct arizona_pdata *pdata = &arizona->pdata; - arizona_of_get_named_gpio(arizona, "wlf,reset", true, &pdata->reset); + pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true); arizona_of_get_micd_ranges(arizona, "wlf,micd-ranges"); arizona_of_get_micd_configs(arizona, "wlf,micd-configs"); diff --git a/drivers/regulator/arizona-ldo1.c b/drivers/regulator/arizona-ldo1.c index c6e175a4f5a..0ecf0d49363 100644 --- a/drivers/regulator/arizona-ldo1.c +++ b/drivers/regulator/arizona-ldo1.c @@ -187,7 +187,7 @@ static int arizona_ldo1_of_get_pdata(struct arizona *arizona, struct device_node *init_node, *dcvdd_node; struct regulator_init_data *init_data; - arizona_of_get_named_gpio(arizona, "wlf,ldoena", true, &pdata->ldoena); + pdata->ldoena = arizona_of_get_named_gpio(arizona, "wlf,ldoena", true); init_node = of_get_child_by_name(arizona->dev->of_node, "ldo1"); dcvdd_node = of_parse_phandle(arizona->dev->of_node, "DCVDD-supply", 0); diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 5c323760d08..4779e5a0f09 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1412,8 +1412,9 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,micd-detect-debounce", false, &pdata->micd_detect_debounce); - arizona_of_get_named_gpio(arizona, "wlf,micd-pol-gpio", false, - &pdata->micd_pol_gpio); + pdata->micd_pol_gpio = arizona_of_get_named_gpio(arizona, + "wlf,micd-pol-gpio", + false); arizona_of_read_u32(arizona, "wlf,micd-bias-start-time", false, &pdata->micd_bias_start_time); diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 478280785ae..864fa20477c 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -130,7 +130,7 @@ int florida_patch(struct arizona *arizona); int wm8997_patch(struct arizona *arizona); extern int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, - bool mandatory, int *gpio); + bool mandatory); extern int arizona_of_read_u32_array(struct arizona *arizona, const char *prop, bool mandatory, u32 *data, size_t num); extern int arizona_of_read_u32(struct arizona *arizona, const char* prop, From 44382fdbe6893bcbb802490d5eaf69e528b457c6 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 21 Apr 2014 09:11:35 +0100 Subject: [PATCH 0318/1167] switch: arizona: Factor out microphone impedance into a function The microphone detection handler is getting very long factor out the actual reading of the impedance value into a seperate function to ease this. Additionally, we also ensure that the microphone timeout will be rescheduled in all error cases. Change-Id: I5dab42e3dda522f825b1b50935d9fde1ee45011a Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 228 ++++++++++++++++++-------------- 1 file changed, 131 insertions(+), 97 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 4779e5a0f09..1789685c0b8 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -295,6 +295,133 @@ static void arizona_extcon_pulse_micbias(struct arizona_extcon_info *info) } } +static int arizona_micd_read(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + unsigned int val = 0; + int ret, i; + + if (info->detecting && arizona->pdata.micd_software_compare) { + bool micd_ena; + unsigned int micd_ena_bit; + + /* Must disable MICD before we read the ADCVAL */ + ret = regmap_update_bits_check(arizona->regmap, + ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, 0, + &micd_ena); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to disable MICD: %d\n", + ret); + return ret; + } + + ret = regmap_read(arizona->regmap, ARIZONA_MIC_DETECT_4, &val); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to read MICDET_ADCVAL: %d\n", + ret); + return ret; + } + + dev_dbg(arizona->dev, "MICDET_ADCVAL: 0x%x\n", val); + + val &= ARIZONA_MICDET_ADCVAL_MASK; + if (val < ARRAY_SIZE(arizona_micd_levels)) + val = arizona_micd_levels[val]; + else + val = INT_MAX; + + if (val <= QUICK_HEADPHONE_MAX_OHM) + val = ARIZONA_MICD_STS | ARIZONA_MICD_LVL_0; + else if (val <= MICROPHONE_MIN_OHM) + val = ARIZONA_MICD_STS | ARIZONA_MICD_LVL_1; + else if (val <= MICROPHONE_MAX_OHM) + val = ARIZONA_MICD_STS | ARIZONA_MICD_LVL_8; + else + val = ARIZONA_MICD_LVL_8; + + if (micd_ena) + micd_ena_bit = ARIZONA_MICD_ENA; + else + micd_ena_bit = 0; + + ret = regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, micd_ena_bit); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to restore MICD: %d\n", + ret); + return ret; + } + + return val; + } + + for (i = 0; i < 10 && !(val & MICD_LVL_0_TO_8); i++) { + ret = regmap_read(arizona->regmap, ARIZONA_MIC_DETECT_3, &val); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to read MICDET: %d\n", + ret); + return ret; + } + + dev_dbg(arizona->dev, "MICDET: 0x%x\n", val); + + if (!(val & ARIZONA_MICD_VALID)) { + dev_warn(arizona->dev, + "Microphone detection state invalid\n"); + return -EINVAL; + } + } + + if (i == 10 && !(val & MICD_LVL_0_TO_8)) { + dev_err(arizona->dev, "Failed to get valid MICDET value\n"); + return -EINVAL; + } + + if (info->micd_manual_debounce) { + if (info->micd_current > 0) { + if (info->micd_res[info->micd_current - 1] != val) + info->micd_current = 0; + } + + info->micd_res[info->micd_current++] = val; + + if (info->micd_current == 4) { + info->micd_current = 0; + + if (val == info->micd_res_old) + return -EAGAIN; + info->micd_res_old = val; + } else { + int delay = arizona_micd_rates[arizona->pdata.micd_rate]; + + if (delay >= 32000) + msleep(delay / 1000); + else if (delay >= 1000) + usleep_range(delay, delay); + else if (delay) + udelay(delay); + + /* Must toggle MICD_ENA to ensure we get a new reading + * even if nothing changes + */ + regmap_update_bits(arizona->regmap, + ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, 0); + regmap_update_bits(arizona->regmap, + ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, ARIZONA_MICD_ENA); + return -EAGAIN; + } + } + + return val; +} + static void arizona_start_mic(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; @@ -972,98 +1099,11 @@ static void arizona_micd_detect(struct work_struct *work) return; } - if (info->detecting && arizona->pdata.micd_software_compare) { - /* Must disable MICD before we read the ADCVAL */ - regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_ENA, 0); - ret = regmap_read(arizona->regmap, ARIZONA_MIC_DETECT_4, &val); - if (ret != 0) { - dev_err(arizona->dev, - "Failed to read MICDET_ADCVAL: %d\n", - ret); - mutex_unlock(&info->lock); - return; - } - - dev_dbg(arizona->dev, "MICDET_ADCVAL: %x\n", val); - - val &= ARIZONA_MICDET_ADCVAL_MASK; - if (val < ARRAY_SIZE(arizona_micd_levels)) - val = arizona_micd_levels[val]; - else - val = INT_MAX; - - if (val <= QUICK_HEADPHONE_MAX_OHM) - val = ARIZONA_MICD_STS | ARIZONA_MICD_LVL_0; - else if (val <= MICROPHONE_MIN_OHM) - val = ARIZONA_MICD_STS | ARIZONA_MICD_LVL_1; - else if (val <= MICROPHONE_MAX_OHM) - val = ARIZONA_MICD_STS | ARIZONA_MICD_LVL_8; - else - val = ARIZONA_MICD_LVL_8; - } - - for (i = 0; i < 10 && !(val & MICD_LVL_0_TO_8); i++) { - ret = regmap_read(arizona->regmap, ARIZONA_MIC_DETECT_3, &val); - if (ret != 0) { - dev_err(arizona->dev, "Failed to read MICDET: %d\n", ret); - mutex_unlock(&info->lock); - return; - } - - dev_dbg(arizona->dev, "MICDET: %x\n", val); - - if (!(val & ARIZONA_MICD_VALID)) { - dev_warn(arizona->dev, "Microphone detection state invalid\n"); - mutex_unlock(&info->lock); - return; - } - } - - if (i == 10 && !(val & MICD_LVL_0_TO_8)) { - dev_err(arizona->dev, "Failed to get valid MICDET value\n"); - mutex_unlock(&info->lock); - return; - } - - if (info->micd_manual_debounce) { - if (info->micd_current > 0) { - if (info->micd_res[info->micd_current - 1] != val) - info->micd_current = 0; - } - - info->micd_res[info->micd_current++] = val; - - dev_dbg(arizona->dev, "Manual debounce: %d, 0x%04x\n", info->micd_current, val); - - if (info->micd_current == 4) { - info->micd_current = 0; - - if (val == info->micd_res_old) - goto handled; - info->micd_res_old = val; - } else { - int delay = arizona_micd_rates[arizona->pdata.micd_rate]; - - if (delay >= 32000) - msleep(delay / 1000); - else if (delay >= 1000) - usleep_range(delay, delay); - else if (delay) - udelay(delay); + ret = arizona_micd_read(info); + if (ret < 0) + goto handled; - /* Must toggle MICD_ENA to ensure we get a new reading - * even if nothing changes - */ - regmap_update_bits(arizona->regmap, - ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_ENA, 0); - regmap_update_bits(arizona->regmap, - ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_ENA, ARIZONA_MICD_ENA); - goto handled; - } - } + val = ret; /* Due to jack detect this should never happen */ if (!(val & ARIZONA_MICD_STS)) { @@ -1172,12 +1212,6 @@ static void arizona_micd_detect(struct work_struct *work) handled: if (info->detecting) { - if (arizona->pdata.micd_software_compare) - regmap_update_bits(arizona->regmap, - ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_ENA, - ARIZONA_MICD_ENA); - schedule_delayed_work(&info->micd_timeout_work, msecs_to_jiffies(info->micd_timeout)); } From 14b5fdcf455b2603f300422565f933e9cf67532f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 23 Apr 2014 14:53:45 +0100 Subject: [PATCH 0319/1167] switch: arizona: Move callback out of arizona_hpdet_read arizona_hpdet_read should only contain the handling for reading the impedance value move the handling for the callback and storing the impedance value out into the IRQ handler. Change-Id: I94a94b1d0597ac77fbc6366420ccf146d79573a2 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 1789685c0b8..2cc8c864a21 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -648,12 +648,8 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) } } - arizona->hp_impedance = val; - - if (arizona->pdata.hpdet_cb) - arizona->pdata.hpdet_cb(arizona->hp_impedance); - dev_dbg(arizona->dev, "HP impedance %d ohms\n", val); + return val; } @@ -878,6 +874,11 @@ static irqreturn_t arizona_hpdet_irq(int irq, void *data) } reading = ret; + arizona->hp_impedance = reading; + + if (arizona->pdata.hpdet_cb) + arizona->pdata.hpdet_cb(arizona->hp_impedance); + /* Reset back to starting range */ regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, From 49d671efb85f758c296cfb72bb392ca6a3f2d67e Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 23 Apr 2014 15:57:10 +0100 Subject: [PATCH 0320/1167] switch: arizona: Add helpers for explicit jack detection state machine The current jack detection code is very complex and has many dependancies between its various parts. This patch add some helpers that will be used to create a far more explicit state machine and thereby seperate the code more cleanly. This should allow for easier updates and less issues. Change-Id: I3f6e2423d0d667994746bf570667e38ec9afa306 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 103 ++++++++++++++++++++++++++++++-- 1 file changed, 98 insertions(+), 5 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 2cc8c864a21..67cc081f07e 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -39,11 +39,12 @@ #define ARIZONA_MAX_MICD_RANGE 8 -#define ARIZONA_ACCDET_MODE_MIC 0 -#define ARIZONA_ACCDET_MODE_HPL 1 -#define ARIZONA_ACCDET_MODE_HPR 2 -#define ARIZONA_ACCDET_MODE_HPM 4 -#define ARIZONA_ACCDET_MODE_ADC 7 +#define ARIZONA_ACCDET_MODE_MIC 0 +#define ARIZONA_ACCDET_MODE_HPL 1 +#define ARIZONA_ACCDET_MODE_HPR 2 +#define ARIZONA_ACCDET_MODE_HPM 4 +#define ARIZONA_ACCDET_MODE_ADC 7 +#define ARIZONA_ACCDET_MODE_INVALID 8 #define ARIZONA_HPDET_MAX 10000 @@ -68,6 +69,8 @@ enum { MICD_LVL_0_TO_8 = MICD_LVL_0_TO_7 | ARIZONA_MICD_LVL_8, }; +struct arizona_jd_state; + struct arizona_extcon_info { struct device *dev; struct arizona *arizona; @@ -116,6 +119,9 @@ struct arizona_extcon_info { int hpdet_ip; struct switch_dev edev; + + const struct arizona_jd_state *state; + struct delayed_work state_timeout_work; }; static const struct arizona_micd_config micd_default_modes[] = { @@ -161,6 +167,93 @@ DEVICE_ATTR(hp_impedance, S_IRUGO, arizona_extcon_show, NULL); static void arizona_start_hpdet_acc_id(struct arizona_extcon_info *info); +struct arizona_jd_state { + int mode; + + int (*start)(struct arizona_extcon_info *); + void (*restart)(struct arizona_extcon_info *); + int (*reading)(struct arizona_extcon_info *, int); + void (*stop)(struct arizona_extcon_info *); + + int (*timeout_ms)(struct arizona_extcon_info *); + void (*timeout)(struct arizona_extcon_info *); +}; + +static int arizona_jds_get_mode(struct arizona_extcon_info *info) +{ + int mode = ARIZONA_ACCDET_MODE_INVALID; + + if (info->state) + mode = info->state->mode; + + return mode; +} + +static int arizona_jds_set_state(struct arizona_extcon_info *info, + const struct arizona_jd_state *new_state) +{ + int ret = 0; + + if (new_state != info->state) { + if (info->state) + info->state->stop(info); + + info->state = new_state; + + if (info->state) { + ret = info->state->start(info); + if (ret < 0) + info->state = NULL; + } + } + + return ret; +} + +static void arizona_jds_reading(struct arizona_extcon_info *info, int val) +{ + int ret; + + ret = info->state->reading(info, val); + + if (ret == -EAGAIN && info->state->restart) + info->state->restart(info); +} + +static inline bool arizona_jds_cancel_timeout(struct arizona_extcon_info *info) +{ + return cancel_delayed_work_sync(&info->state_timeout_work); +} + +static void arizona_jds_start_timeout(struct arizona_extcon_info *info) +{ + const struct arizona_jd_state *state = info->state; + + if (!state) + return; + + if (state->timeout_ms && state->timeout) { + int ms = state->timeout_ms(info); + + schedule_delayed_work(&info->state_timeout_work, + msecs_to_jiffies(ms)); + } +} + +static void arizona_jds_timeout_work(struct work_struct *work) +{ + struct arizona_extcon_info *info = + container_of(work, struct arizona_extcon_info, + state_timeout_work.work); + + mutex_lock(&info->lock); + + info->state->timeout(info); + arizona_jds_start_timeout(info); + + mutex_unlock(&info->lock); +} + static void arizona_extcon_do_magic(struct arizona_extcon_info *info, unsigned int magic) { From 4589d3f9cd024b4cd4aebda2002b298e897a51b3 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 23 Apr 2014 16:53:26 +0100 Subject: [PATCH 0321/1167] switch: arizona: Add new jack detection infrastructure Add infrastructure for the jack detection using the new explicit state machine but don't hook it up yet, for easier review. Change-Id: Ie78fa73ecc5d0a9beb34e56c3325dcd32875a9d8 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 586 ++++++++++++++++++++++++++++++++ 1 file changed, 586 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 67cc081f07e..97420ca839d 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -179,6 +179,11 @@ struct arizona_jd_state { void (*timeout)(struct arizona_extcon_info *); }; +static const struct arizona_jd_state arizona_hpdet_left; +static const struct arizona_jd_state arizona_micd_button; +static const struct arizona_jd_state arizona_micd_microphone; +static const struct arizona_jd_state arizona_hpdet_acc_id; + static int arizona_jds_get_mode(struct arizona_extcon_info *info) { int mode = ARIZONA_ACCDET_MODE_INVALID; @@ -936,6 +941,480 @@ int arizona_wm5110_tune_headphone(struct arizona_extcon_info *info, return 0; } +static int arizona_hpdet_start(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + int ret; + + dev_dbg(arizona->dev, "Starting HPDET\n"); + + /* If we specified to assume a fixed impedance skip HPDET */ + if (info->arizona->pdata.fixed_hpdet_imp) { + int imp = info->arizona->pdata.fixed_hpdet_imp; + + switch (arizona->type) { + case WM5110: + arizona_wm5110_tune_headphone(info, imp); + info->arizona->hp_impedance = imp; + break; + default: + break; + } + + ret = -EEXIST; + goto skip; + } + + /* Make sure we keep the device enabled during the measurement */ + pm_runtime_get(info->dev); + + arizona_extcon_do_magic(info, 0x4000); + + ret = regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_MODE_MASK, + info->state->mode); + if (ret != 0) { + dev_err(arizona->dev, "Failed to set HPDET mode (%d): %d\n", + info->state->mode, ret); + goto err; + } + + ret = regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_POLL, ARIZONA_HP_POLL); + if (ret != 0) { + dev_err(arizona->dev, "Can't start HPDET measurement: %d\n", + ret); + goto err; + } + + return 0; + +err: + arizona_extcon_do_magic(info, 0); + + pm_runtime_put_autosuspend(info->dev); + +skip: + return ret; +} + +static void arizona_hpdet_restart(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + + /* Reset back to starting range */ + regmap_update_bits(arizona->regmap, + ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_IMPEDANCE_RANGE_MASK | + ARIZONA_HP_POLL, 0); + + regmap_update_bits(arizona->regmap, + ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_POLL, ARIZONA_HP_POLL); +} + +static void arizona_hpdet_stop(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + + /* Reset back to starting range */ + regmap_update_bits(arizona->regmap, + ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_IMPEDANCE_RANGE_MASK | + ARIZONA_HP_POLL, 0); + + arizona_extcon_do_magic(info, 0); + + pm_runtime_put_autosuspend(info->dev); +} + +static int arizona_hpdet_reading(struct arizona_extcon_info *info, int val) +{ + struct arizona *arizona = info->arizona; + + arizona->hp_impedance = val; + + if (arizona->pdata.hpdet_cb) + arizona->pdata.hpdet_cb(arizona->hp_impedance); + + switch (arizona->type) { + case WM5110: + arizona_wm5110_tune_headphone(info, arizona->hp_impedance); + break; + default: + break; + } + + if (info->mic) { + switch_set_state(&info->edev, BIT_HEADSET); + arizona_jds_set_state(info, &arizona_micd_button); + } else { + switch_set_state(&info->edev, BIT_HEADSET_NO_MIC); + arizona_jds_set_state(info, NULL); + } + + return 0; +} + +static int arizona_micd_start(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + unsigned int mode; + int ret; + + /* Microphone detection can't use idle mode */ + pm_runtime_get(info->dev); + + ret = regulator_enable(info->micvdd); + if (ret != 0) { + dev_err(arizona->dev, "Failed to enable MICVDD: %d\n", + ret); + } + + if (info->micd_reva) { + regmap_write(arizona->regmap, 0x80, 0x3); + regmap_write(arizona->regmap, 0x294, 0); + regmap_write(arizona->regmap, 0x80, 0x0); + } + + mode = info->state->mode; + if (info->detecting && arizona->pdata.micd_software_compare) + mode = ARIZONA_ACCDET_MODE_ADC; + + regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_MODE_MASK, mode); + + arizona_extcon_pulse_micbias(info); + + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, ARIZONA_MICD_ENA); + + return 0; +} + +static void arizona_micd_stop(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + const char *widget = arizona_extcon_get_micbias(info); + struct snd_soc_dapm_context *dapm = arizona->dapm; + int ret; + + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, 0); + + mutex_lock(&dapm->card->dapm_mutex); + + ret = snd_soc_dapm_disable_pin(dapm, widget); + if (ret != 0) + dev_warn(arizona->dev, + "Failed to disable %s: %d\n", + widget, ret); + + mutex_unlock(&dapm->card->dapm_mutex); + + snd_soc_dapm_sync(dapm); + + if (info->micd_reva) { + regmap_write(arizona->regmap, 0x80, 0x3); + regmap_write(arizona->regmap, 0x294, 2); + regmap_write(arizona->regmap, 0x80, 0x0); + } + + regulator_disable(info->micvdd); + + pm_runtime_mark_last_busy(info->dev); + pm_runtime_put_autosuspend(info->dev); +} + +static int arizona_micd_button_reading(struct arizona_extcon_info *info, + int val) +{ + struct arizona *arizona = info->arizona; + int lvl, i, key; + + if (val & MICD_LVL_0_TO_7) { + dev_dbg(arizona->dev, "Mic button detected\n"); + + lvl = val & ARIZONA_MICD_LVL_MASK; + lvl >>= ARIZONA_MICD_LVL_SHIFT; + + for (i = 0; i < info->num_micd_ranges; i++) + input_report_key(info->input, + info->micd_ranges[i].key, 0); + + if (lvl && ffs(lvl) - 1 < info->num_micd_ranges) { + key = info->micd_ranges[ffs(lvl) - 1].key; + input_report_key(info->input, key, 1); + input_sync(info->input); + } else { + dev_warn(arizona->dev, + "Button level %u out of range\n", lvl); + } + } else { + dev_dbg(arizona->dev, "Mic button released\n"); + for (i = 0; i < info->num_micd_ranges; i++) + input_report_key(info->input, + info->micd_ranges[i].key, 0); + input_sync(info->input); + arizona_extcon_pulse_micbias(info); + } + + return 0; +} + +static int arizona_micd_mic_start(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + int ret; + + info->detecting = true; + + ret = regulator_allow_bypass(info->micvdd, false); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to regulate MICVDD: %d\n", + ret); + } + + return arizona_micd_start(info); +} + +static void arizona_micd_mic_stop(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + int ret; + + arizona_micd_stop(info); + + ret = regulator_allow_bypass(info->micvdd, true); + if (ret != 0) { + dev_err(arizona->dev, "Failed to bypass MICVDD: %d\n", + ret); + } + + info->detecting = false; +} + +static int arizona_micd_mic_reading(struct arizona_extcon_info *info, int val) +{ + struct arizona *arizona = info->arizona; + int ret; + + /* Due to jack detect this should never happen */ + if (!(val & ARIZONA_MICD_STS)) { + dev_warn(arizona->dev, "Detected open circuit\n"); + info->mic = arizona->pdata.micd_open_circuit_declare; + goto done; + } + + /* If we got a high impedence we should have a headset, report it. */ + if (val & ARIZONA_MICD_LVL_8) { + dev_dbg(arizona->dev, "Detected headset\n"); + info->mic = true; + goto done; + } + + /* If we detected a lower impedence during initial startup + * then we probably have the wrong polarity, flip it. Don't + * do this for the lowest impedences to speed up detection of + * plain headphones. If both polarities report a low + * impedence then give up and report headphones. + */ + if (val & MICD_LVL_1_TO_7) { + if (info->jack_flips >= info->micd_num_modes * 10) { + dev_dbg(arizona->dev, "Detected HP/line\n"); + goto done; + } else { + info->micd_mode++; + if (info->micd_mode == info->micd_num_modes) + info->micd_mode = 0; + arizona_extcon_set_mode(info, info->micd_mode); + + info->jack_flips++; + + return 0; + } + } + + /* + * If we're still detecting and we detect a short then we've + * got a headphone. + */ + dev_dbg(arizona->dev, "Headphone detected\n"); + +done: + pm_runtime_mark_last_busy(info->dev); + + ret = arizona_jds_set_state(info, &arizona_hpdet_left); + if (ret < 0) { + if (info->mic) + switch_set_state(&info->edev, BIT_HEADSET); + else + switch_set_state(&info->edev, BIT_HEADSET_NO_MIC); + } + + return 0; +} + +static int arizona_micd_mic_timeout_ms(struct arizona_extcon_info *info) +{ + if (info->arizona->pdata.micd_timeout) + return info->arizona->pdata.micd_timeout; + else + return DEFAULT_MICD_TIMEOUT; +} + +static void arizona_micd_mic_timeout(struct arizona_extcon_info *info) +{ + int ret; + + dev_dbg(info->arizona->dev, "MICD timed out, reporting HP\n"); + + ret = arizona_jds_set_state(info, &arizona_hpdet_left); + if (ret < 0) + switch_set_state(&info->edev, BIT_HEADSET_NO_MIC); +} + +static int arizona_hpdet_acc_id_reading(struct arizona_extcon_info *info, + int reading) +{ + struct arizona *arizona = info->arizona; + int id_gpio = arizona->pdata.hpdet_id_gpio; + + /* + * When we're using HPDET for accessory identification we need + * to take multiple measurements, step through them in sequence. + */ + info->hpdet_res[info->num_hpdet_res++] = reading; + + /* Only check the mic directly if we didn't already ID it */ + if (id_gpio && info->num_hpdet_res == 1) { + dev_dbg(arizona->dev, "Measuring mic\n"); + + regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_SRC | + ARIZONA_ACCDET_MODE_MASK, + info->micd_modes[0].src | + ARIZONA_ACCDET_MODE_HPR); + + gpio_set_value_cansleep(id_gpio, 1); + + return -EAGAIN; + } + + /* OK, got both. Now, compare... */ + dev_dbg(arizona->dev, "HPDET measured %d %d\n", + info->hpdet_res[0], info->hpdet_res[1]); + + /* Take the headphone impedance for the main report */ + reading = info->hpdet_res[0]; + + /* Sometimes we get false readings due to slow insert */ + if (reading >= ARIZONA_HPDET_MAX && !info->hpdet_retried) { + dev_dbg(arizona->dev, "Retrying high impedance\n"); + + info->num_hpdet_res = 0; + info->hpdet_retried = true; + + regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_SRC | + ARIZONA_ACCDET_MODE_MASK, + info->micd_modes[0].src | + ARIZONA_ACCDET_MODE_HPL); + + return -EAGAIN; + } + + if (!id_gpio || info->hpdet_res[1] > 50) { + dev_dbg(arizona->dev, "Detected mic\n"); + + arizona_jds_set_state(info, &arizona_micd_microphone); + } else { + dev_dbg(arizona->dev, "Detected headphone\n"); + + switch_set_state(&info->edev, BIT_HEADSET_NO_MIC); + + arizona_jds_set_state(info, NULL); + } + + return 0; +} + +static int arizona_hpdet_acc_id_start(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + int hp_reading = 32; + int ret; + + dev_dbg(arizona->dev, "Starting identification via HPDET\n"); + + /* Make sure we keep the device enabled during the measurement */ + pm_runtime_get_sync(info->dev); + + arizona_extcon_do_magic(info, 0x4000); + + ret = regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_SRC | ARIZONA_ACCDET_MODE_MASK, + info->micd_modes[0].src | + ARIZONA_ACCDET_MODE_HPL); + if (ret != 0) { + dev_err(arizona->dev, "Failed to set HPDETL mode: %d\n", ret); + goto err; + } + + if (arizona->pdata.hpdet_acc_id_line) { + ret = regmap_update_bits(arizona->regmap, + ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_POLL, ARIZONA_HP_POLL); + if (ret != 0) { + dev_err(arizona->dev, + "Can't start HPDETL measurement: %d\n", + ret); + goto err; + } + } else { + /** + * If we are not identifying line outputs fake the first + * reading at 32 ohms + */ + arizona_hpdet_acc_id_reading(info, hp_reading); + } + + return 0; + +err: + arizona_extcon_do_magic(info, 0x0); + + pm_runtime_put_autosuspend(info->dev); + + /* Just report headphone */ + switch_set_state(&info->edev, BIT_HEADSET_NO_MIC); + + return ret; +} + +static void arizona_hpdet_acc_id_stop(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + int id_gpio = arizona->pdata.hpdet_id_gpio; + + /* Make sure everything is reset back to the real polarity */ + regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_SRC, + info->micd_modes[0].src); + + if (id_gpio) + gpio_set_value_cansleep(id_gpio, 0); + + /* Rest of the clean is identical to standard hpdet */ + arizona_hpdet_stop(info); +} + static irqreturn_t arizona_hpdet_irq(int irq, void *data) { struct arizona_extcon_info *info = data; @@ -1156,6 +1635,80 @@ static void arizona_start_hpdet_acc_id(struct arizona_extcon_info *info) info->hpdet_active = false; } +static irqreturn_t arizona_hpdet_handler(int irq, void *data) +{ + struct arizona_extcon_info *info = data; + struct arizona *arizona = info->arizona; + int ret; + + arizona_jds_cancel_timeout(info); + + mutex_lock(&info->lock); + + switch (arizona_jds_get_mode(info)) { + case ARIZONA_ACCDET_MODE_HPL: + case ARIZONA_ACCDET_MODE_HPR: + case ARIZONA_ACCDET_MODE_HPM: + break; + default: + dev_warn(arizona->dev, "Spurious HPDET IRQ\n"); + mutex_unlock(&info->lock); + return IRQ_NONE; + } + + ret = arizona_hpdet_read(info); + if (ret == -EAGAIN) + goto out; + + arizona_jds_reading(info, ret); + +out: + arizona_jds_start_timeout(info); + + pm_runtime_mark_last_busy(info->dev); + + mutex_unlock(&info->lock); + + return IRQ_HANDLED; +} + +static void arizona_micd_handler(struct work_struct *work) +{ + struct arizona_extcon_info *info = + container_of(work, + struct arizona_extcon_info, + micd_detect_work.work); + struct arizona *arizona = info->arizona; + int ret; + + arizona_jds_cancel_timeout(info); + + mutex_lock(&info->lock); + + switch (arizona_jds_get_mode(info)) { + case ARIZONA_ACCDET_MODE_MIC: + case ARIZONA_ACCDET_MODE_ADC: + break; + default: + dev_warn(arizona->dev, "Spurious MICDET IRQ\n"); + mutex_unlock(&info->lock); + return; + } + + ret = arizona_micd_read(info); + if (ret == -EAGAIN) + goto out; + + arizona_jds_reading(info, ret); + +out: + arizona_jds_start_timeout(info); + + pm_runtime_mark_last_busy(info->dev); + + mutex_unlock(&info->lock); +} + static void arizona_micd_timeout_work(struct work_struct *work) { struct arizona_extcon_info *info = container_of(work, @@ -1370,6 +1923,38 @@ static irqreturn_t arizona_micdet(int irq, void *data) return IRQ_HANDLED; } +static const struct arizona_jd_state arizona_hpdet_left = { + .mode = ARIZONA_ACCDET_MODE_HPL, + .start = arizona_hpdet_start, + .reading = arizona_hpdet_reading, + .stop = arizona_hpdet_stop, +}; + +static const struct arizona_jd_state arizona_micd_button = { + .mode = ARIZONA_ACCDET_MODE_MIC, + .start = arizona_micd_start, + .reading = arizona_micd_button_reading, + .stop = arizona_micd_stop, +}; + +static const struct arizona_jd_state arizona_micd_microphone = { + .mode = ARIZONA_ACCDET_MODE_MIC, + .start = arizona_micd_mic_start, + .reading = arizona_micd_mic_reading, + .stop = arizona_micd_mic_stop, + + .timeout_ms = arizona_micd_mic_timeout_ms, + .timeout = arizona_micd_mic_timeout, +}; + +static const struct arizona_jd_state arizona_hpdet_acc_id = { + .mode = ARIZONA_ACCDET_MODE_HPL, + .start = arizona_hpdet_acc_id_start, + .restart = arizona_hpdet_restart, + .reading = arizona_hpdet_acc_id_reading, + .stop = arizona_hpdet_acc_id_stop, +}; + static void arizona_hpdet_work(struct work_struct *work) { struct arizona_extcon_info *info = container_of(work, @@ -1640,6 +2225,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) INIT_DELAYED_WORK(&info->micd_detect_work, arizona_micd_detect); INIT_DELAYED_WORK(&info->micd_clear_work, arizona_micd_input_clear); INIT_DELAYED_WORK(&info->micd_timeout_work, arizona_micd_timeout_work); + INIT_DELAYED_WORK(&info->state_timeout_work, arizona_jds_timeout_work); platform_set_drvdata(pdev, info); switch (arizona->type) { From 18b4fb17c942312cc323d7a6168b2d3c9c49aab6 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 23 Apr 2014 17:50:51 +0100 Subject: [PATCH 0322/1167] switch: arizona: Switch over to new jack detection code Remove the old jack detection handling and move over to the new infrastructure. Change-Id: Ice39c7a5c0739d89195eaeff16c2e7894cbfa78f Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 583 +------------------------------- 1 file changed, 10 insertions(+), 573 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 97420ca839d..52507878be6 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -87,8 +87,6 @@ struct arizona_extcon_info { const struct arizona_micd_range *micd_ranges; int num_micd_ranges; - int micd_timeout; - bool micd_reva; bool micd_clamp; @@ -99,12 +97,9 @@ struct arizona_extcon_info { struct delayed_work hpdet_work; struct delayed_work micd_detect_work; - struct delayed_work micd_timeout_work; struct delayed_work micd_clear_work; bool first_clear; - bool hpdet_active; - bool hpdet_done; bool hpdet_retried; int hp_imp_level; @@ -114,7 +109,6 @@ struct arizona_extcon_info { bool mic; bool detecting; int jack_flips; - bool cable; int hpdet_ip; @@ -165,8 +159,6 @@ static ssize_t arizona_extcon_show(struct device *dev, char *buf); DEVICE_ATTR(hp_impedance, S_IRUGO, arizona_extcon_show, NULL); -static void arizona_start_hpdet_acc_id(struct arizona_extcon_info *info); - struct arizona_jd_state { int mode; @@ -520,100 +512,6 @@ static int arizona_micd_read(struct arizona_extcon_info *info) return val; } -static void arizona_start_mic(struct arizona_extcon_info *info) -{ - struct arizona *arizona = info->arizona; - bool change; - int ret; - unsigned int mode; - - /* Microphone detection can't use idle mode */ - pm_runtime_get(info->dev); - - if (info->detecting) { - ret = regulator_allow_bypass(info->micvdd, false); - if (ret != 0) { - dev_err(arizona->dev, - "Failed to regulate MICVDD: %d\n", - ret); - } - } - - ret = regulator_enable(info->micvdd); - if (ret != 0) { - dev_err(arizona->dev, "Failed to enable MICVDD: %d\n", - ret); - } - - if (info->micd_reva) { - regmap_write(arizona->regmap, 0x80, 0x3); - regmap_write(arizona->regmap, 0x294, 0); - regmap_write(arizona->regmap, 0x80, 0x0); - } - - if (info->detecting && arizona->pdata.micd_software_compare) - mode = ARIZONA_ACCDET_MODE_ADC; - else - mode = ARIZONA_ACCDET_MODE_MIC; - - regmap_update_bits(arizona->regmap, - ARIZONA_ACCESSORY_DETECT_MODE_1, - ARIZONA_ACCDET_MODE_MASK, mode); - - arizona_extcon_pulse_micbias(info); - - regmap_update_bits_check(arizona->regmap, ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_ENA, ARIZONA_MICD_ENA, - &change); - if (!change) { - regulator_disable(info->micvdd); - pm_runtime_put_autosuspend(info->dev); - } -} - -static void arizona_stop_mic(struct arizona_extcon_info *info) -{ - struct arizona *arizona = info->arizona; - const char *widget = arizona_extcon_get_micbias(info); - struct snd_soc_dapm_context *dapm = arizona->dapm; - bool change; - int ret; - - regmap_update_bits_check(arizona->regmap, ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_ENA, 0, - &change); - - mutex_lock(&dapm->card->dapm_mutex); - - ret = snd_soc_dapm_disable_pin(dapm, widget); - if (ret != 0) - dev_warn(arizona->dev, - "Failed to disable %s: %d\n", - widget, ret); - - mutex_unlock(&dapm->card->dapm_mutex); - - snd_soc_dapm_sync(dapm); - - if (info->micd_reva) { - regmap_write(arizona->regmap, 0x80, 0x3); - regmap_write(arizona->regmap, 0x294, 2); - regmap_write(arizona->regmap, 0x80, 0x0); - } - - ret = regulator_allow_bypass(info->micvdd, true); - if (ret != 0) { - dev_err(arizona->dev, "Failed to bypass MICVDD: %d\n", - ret); - } - - if (change) { - regulator_disable(info->micvdd); - pm_runtime_mark_last_busy(info->dev); - pm_runtime_put_autosuspend(info->dev); - } -} - static struct { unsigned int threshold; unsigned int factor_a; @@ -751,76 +649,6 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) return val; } -static int arizona_hpdet_do_id(struct arizona_extcon_info *info, int *reading, - bool *mic) -{ - struct arizona *arizona = info->arizona; - int id_gpio = arizona->pdata.hpdet_id_gpio; - - /* - * If we're using HPDET for accessory identification we need - * to take multiple measurements, step through them in sequence. - */ - if (arizona->pdata.hpdet_acc_id) { - info->hpdet_res[info->num_hpdet_res++] = *reading; - - /* Only check the mic directly if we didn't already ID it */ - if (id_gpio && info->num_hpdet_res == 1) { - dev_dbg(arizona->dev, "Measuring mic\n"); - - regmap_update_bits(arizona->regmap, - ARIZONA_ACCESSORY_DETECT_MODE_1, - ARIZONA_ACCDET_MODE_MASK | - ARIZONA_ACCDET_SRC, - ARIZONA_ACCDET_MODE_HPR | - info->micd_modes[0].src); - - gpio_set_value_cansleep(id_gpio, 1); - - regmap_update_bits(arizona->regmap, - ARIZONA_HEADPHONE_DETECT_1, - ARIZONA_HP_POLL, ARIZONA_HP_POLL); - return -EAGAIN; - } - - /* OK, got both. Now, compare... */ - dev_dbg(arizona->dev, "HPDET measured %d %d\n", - info->hpdet_res[0], info->hpdet_res[1]); - - /* Take the headphone impedance for the main report */ - *reading = info->hpdet_res[0]; - - /* Sometimes we get false readings due to slow insert */ - if (*reading >= ARIZONA_HPDET_MAX && !info->hpdet_retried) { - dev_dbg(arizona->dev, "Retrying high impedance\n"); - info->num_hpdet_res = 0; - info->hpdet_retried = true; - arizona_start_hpdet_acc_id(info); - pm_runtime_put(info->dev); - return -EAGAIN; - } - - /* - * If we measure the mic as - */ - if (!id_gpio || info->hpdet_res[1] > 50) { - dev_dbg(arizona->dev, "Detected mic\n"); - *mic = true; - info->detecting = true; - } else { - dev_dbg(arizona->dev, "Detected headphone\n"); - } - - /* Make sure everything is reset back to the real polarity */ - regmap_update_bits(arizona->regmap, - ARIZONA_ACCESSORY_DETECT_MODE_1, - ARIZONA_ACCDET_SRC, - info->micd_modes[0].src); - } - - return 0; -} - static const struct reg_default low_impedance_patch[] = { { 0x460, 0x0C21 }, { 0x461, 0xA000 }, @@ -1415,226 +1243,6 @@ static void arizona_hpdet_acc_id_stop(struct arizona_extcon_info *info) arizona_hpdet_stop(info); } -static irqreturn_t arizona_hpdet_irq(int irq, void *data) -{ - struct arizona_extcon_info *info = data; - struct arizona *arizona = info->arizona; - int id_gpio = arizona->pdata.hpdet_id_gpio; - int ret, reading; - bool mic = false; - - mutex_lock(&info->lock); - - /* If we got a spurious IRQ for some reason then ignore it */ - if (!info->hpdet_active) { - dev_warn(arizona->dev, "Spurious HPDET IRQ\n"); - mutex_unlock(&info->lock); - return IRQ_NONE; - } - - /* If the cable was removed while measuring ignore the result */ - if (!info->cable) { - dev_dbg(arizona->dev, "Ignoring HPDET for removed cable\n"); - goto done; - } - - ret = arizona_hpdet_read(info); - if (ret == -EAGAIN) { - goto out; - } else if (ret < 0) { - goto done; - } - reading = ret; - - arizona->hp_impedance = reading; - - if (arizona->pdata.hpdet_cb) - arizona->pdata.hpdet_cb(arizona->hp_impedance); - - /* Reset back to starting range */ - regmap_update_bits(arizona->regmap, - ARIZONA_HEADPHONE_DETECT_1, - ARIZONA_HP_IMPEDANCE_RANGE_MASK | ARIZONA_HP_POLL, - 0); - - ret = arizona_hpdet_do_id(info, &reading, &mic); - if (ret == -EAGAIN) { - goto out; - } else if (ret < 0) { - goto done; - } - - switch (arizona->type) { - case WM5110: - arizona_wm5110_tune_headphone(info, arizona->hp_impedance); - break; - default: - break; - } - - if (mic || info->mic) - switch_set_state(&info->edev, BIT_HEADSET); - else - switch_set_state(&info->edev, BIT_HEADSET_NO_MIC); - -done: - /* Reset back to starting range */ - regmap_update_bits(arizona->regmap, - ARIZONA_HEADPHONE_DETECT_1, - ARIZONA_HP_IMPEDANCE_RANGE_MASK | ARIZONA_HP_POLL, - 0); - - arizona_extcon_do_magic(info, 0); - - if (id_gpio) - gpio_set_value_cansleep(id_gpio, 0); - - /* Revert back to MICDET mode */ - regmap_update_bits(arizona->regmap, - ARIZONA_ACCESSORY_DETECT_MODE_1, - ARIZONA_ACCDET_MODE_MASK, ARIZONA_ACCDET_MODE_MIC); - - /* If we have a mic then reenable MICDET */ - if (mic || info->mic) - arizona_start_mic(info); - - if (info->hpdet_active) { - pm_runtime_put_autosuspend(info->dev); - info->hpdet_active = false; - } - - info->hpdet_done = true; - -out: - mutex_unlock(&info->lock); - - return IRQ_HANDLED; -} - -static void arizona_identify_headphone(struct arizona_extcon_info *info) -{ - struct arizona *arizona = info->arizona; - int ret; - - if (info->hpdet_done) - return; - - if (info->arizona->pdata.fixed_hpdet_imp) { - int imp = info->arizona->pdata.fixed_hpdet_imp; - - switch (arizona->type) { - case WM5110: - arizona_wm5110_tune_headphone(info, imp); - info->arizona->hp_impedance = imp; - break; - default: - break; - } - - goto out; - } - - dev_dbg(arizona->dev, "Starting HPDET\n"); - - /* Make sure we keep the device enabled during the measurement */ - pm_runtime_get(info->dev); - - info->hpdet_active = true; - - if (info->mic) - arizona_stop_mic(info); - - arizona_extcon_do_magic(info, 0x4000); - - ret = regmap_update_bits(arizona->regmap, - ARIZONA_ACCESSORY_DETECT_MODE_1, - ARIZONA_ACCDET_MODE_MASK, - ARIZONA_ACCDET_MODE_HPL); - if (ret != 0) { - dev_err(arizona->dev, "Failed to set HPDETL mode: %d\n", ret); - goto out; - } - - ret = regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, - ARIZONA_HP_POLL, ARIZONA_HP_POLL); - if (ret != 0) { - dev_err(arizona->dev, "Can't start HPDETL measurement: %d\n", - ret); - goto out; - } - - return; - -out: - regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, - ARIZONA_ACCDET_MODE_MASK, ARIZONA_ACCDET_MODE_MIC); - - /* Just report headphone */ - if (info->mic) { - switch_set_state(&info->edev, BIT_HEADSET); - arizona_start_mic(info); - } else { - switch_set_state(&info->edev, BIT_HEADSET_NO_MIC); - } - - info->hpdet_active = false; -} - -static void arizona_start_hpdet_acc_id(struct arizona_extcon_info *info) -{ - struct arizona *arizona = info->arizona; - int hp_reading = 32; - bool mic; - int ret; - - dev_dbg(arizona->dev, "Starting identification via HPDET\n"); - - /* Make sure we keep the device enabled during the measurement */ - pm_runtime_get_sync(info->dev); - - info->hpdet_active = true; - - arizona_extcon_do_magic(info, 0x4000); - - ret = regmap_update_bits(arizona->regmap, - ARIZONA_ACCESSORY_DETECT_MODE_1, - ARIZONA_ACCDET_SRC | ARIZONA_ACCDET_MODE_MASK, - info->micd_modes[0].src | - ARIZONA_ACCDET_MODE_HPL); - if (ret != 0) { - dev_err(arizona->dev, "Failed to set HPDETL mode: %d\n", ret); - goto err; - } - - if (arizona->pdata.hpdet_acc_id_line) { - ret = regmap_update_bits(arizona->regmap, - ARIZONA_HEADPHONE_DETECT_1, - ARIZONA_HP_POLL, ARIZONA_HP_POLL); - if (ret != 0) { - dev_err(arizona->dev, - "Can't start HPDETL measurement: %d\n", - ret); - goto err; - } - } else { - arizona_hpdet_do_id(info, &hp_reading, &mic); - } - - return; - -err: - regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, - ARIZONA_ACCDET_MODE_MASK, ARIZONA_ACCDET_MODE_MIC); - - /* Just report headphone */ - if (info->mic) - switch_set_state(&info->edev, BIT_HEADSET); - else - switch_set_state(&info->edev, BIT_HEADSET_NO_MIC); - - info->hpdet_active = false; -} - static irqreturn_t arizona_hpdet_handler(int irq, void *data) { struct arizona_extcon_info *info = data; @@ -1709,164 +1317,6 @@ static void arizona_micd_handler(struct work_struct *work) mutex_unlock(&info->lock); } -static void arizona_micd_timeout_work(struct work_struct *work) -{ - struct arizona_extcon_info *info = container_of(work, - struct arizona_extcon_info, - micd_timeout_work.work); - - mutex_lock(&info->lock); - - dev_dbg(info->arizona->dev, "MICD timed out, reporting HP\n"); - arizona_identify_headphone(info); - - info->detecting = false; - - arizona_stop_mic(info); - - mutex_unlock(&info->lock); -} - -static void arizona_micd_detect(struct work_struct *work) -{ - struct arizona_extcon_info *info = container_of(work, - struct arizona_extcon_info, - micd_detect_work.work); - struct arizona *arizona = info->arizona; - unsigned int val = 0, lvl; - int ret, i, key; - - cancel_delayed_work_sync(&info->micd_timeout_work); - - mutex_lock(&info->lock); - - if (!info->cable) { - dev_dbg(arizona->dev, "Ignoring MICDET for removed cable\n"); - mutex_unlock(&info->lock); - return; - } - - ret = arizona_micd_read(info); - if (ret < 0) - goto handled; - - val = ret; - - /* Due to jack detect this should never happen */ - if (!(val & ARIZONA_MICD_STS)) { - dev_warn(arizona->dev, "Detected open circuit\n"); - info->mic = arizona->pdata.micd_open_circuit_declare; - if (!info->mic) { - arizona_stop_mic(info); - } else { - /* Don't need to regulate for button detection */ - ret = regulator_allow_bypass(info->micvdd, true); - if (ret != 0) { - dev_err(arizona->dev, - "Failed to bypass MICVDD: %d\n", - ret); - } - } - info->detecting = false; - arizona_identify_headphone(info); - goto handled; - } - - /* If we got a high impedence we should have a headset, report it. */ - if (info->detecting && (val & ARIZONA_MICD_LVL_8)) { - info->mic = true; - info->detecting = false; - arizona_identify_headphone(info); - - /* Don't need to regulate for button detection */ - ret = regulator_allow_bypass(info->micvdd, true); - if (ret != 0) { - dev_err(arizona->dev, "Failed to bypass MICVDD: %d\n", - ret); - } - - goto handled; - } - - /* If we detected a lower impedence during initial startup - * then we probably have the wrong polarity, flip it. Don't - * do this for the lowest impedences to speed up detection of - * plain headphones. If both polarities report a low - * impedence then give up and report headphones. - */ - if (info->detecting && (val & MICD_LVL_1_TO_7)) { - if (info->jack_flips >= info->micd_num_modes * 10) { - dev_dbg(arizona->dev, "Detected HP/line\n"); - - info->detecting = false; - - arizona_identify_headphone(info); - - arizona_stop_mic(info); - } else { - info->micd_mode++; - if (info->micd_mode == info->micd_num_modes) - info->micd_mode = 0; - arizona_extcon_set_mode(info, info->micd_mode); - - info->jack_flips++; - } - - goto handled; - } - - /* - * If we're still detecting and we detect a short then we've - * got a headphone. Otherwise it's a button press. - */ - if (val & MICD_LVL_0_TO_7) { - if (info->mic) { - dev_dbg(arizona->dev, "Mic button detected\n"); - - lvl = val & ARIZONA_MICD_LVL_MASK; - lvl >>= ARIZONA_MICD_LVL_SHIFT; - - for (i = 0; i < info->num_micd_ranges; i++) - input_report_key(info->input, - info->micd_ranges[i].key, 0); - - if (lvl && ffs(lvl) - 1 < info->num_micd_ranges) { - key = info->micd_ranges[ffs(lvl) - 1].key; - input_report_key(info->input, key, 1); - input_sync(info->input); - } else { - dev_warn(arizona->dev, - "Button level %u out of range\n", lvl); - } - } else if (info->detecting) { - dev_dbg(arizona->dev, "Headphone detected\n"); - info->detecting = false; - arizona_stop_mic(info); - - arizona_identify_headphone(info); - } else { - dev_warn(arizona->dev, "Button with no mic: %x\n", - val); - } - } else { - dev_dbg(arizona->dev, "Mic button released\n"); - for (i = 0; i < info->num_micd_ranges; i++) - input_report_key(info->input, - info->micd_ranges[i].key, 0); - input_sync(info->input); - arizona_extcon_pulse_micbias(info); - } - -handled: - if (info->detecting) { - schedule_delayed_work(&info->micd_timeout_work, - msecs_to_jiffies(info->micd_timeout)); - } - - pm_runtime_mark_last_busy(info->dev); - mutex_unlock(&info->lock); -} - static void arizona_micd_input_clear(struct work_struct *work) { struct arizona_extcon_info *info = container_of(work, @@ -1892,7 +1342,6 @@ static irqreturn_t arizona_micdet(int irq, void *data) int debounce = arizona->pdata.micd_detect_debounce; cancel_delayed_work_sync(&info->micd_detect_work); - cancel_delayed_work_sync(&info->micd_timeout_work); cancel_delayed_work_sync(&info->micd_clear_work); mutex_lock(&info->lock); @@ -1918,7 +1367,7 @@ static irqreturn_t arizona_micdet(int irq, void *data) schedule_delayed_work(&info->micd_detect_work, msecs_to_jiffies(debounce)); else - arizona_micd_detect(&info->micd_detect_work.work); + arizona_micd_handler(&info->micd_detect_work.work); return IRQ_HANDLED; } @@ -1962,7 +1411,7 @@ static void arizona_hpdet_work(struct work_struct *work) hpdet_work.work); mutex_lock(&info->lock); - arizona_start_hpdet_acc_id(info); + arizona_jds_set_state(info, &arizona_hpdet_acc_id); mutex_unlock(&info->lock); } @@ -1971,11 +1420,11 @@ static irqreturn_t arizona_jackdet(int irq, void *data) struct arizona_extcon_info *info = data; struct arizona *arizona = info->arizona; unsigned int val, present, mask; - bool cancelled_hp, cancelled_mic; + bool cancelled_hp, cancelled_state; int ret, i; cancelled_hp = cancel_delayed_work_sync(&info->hpdet_work); - cancelled_mic = cancel_delayed_work_sync(&info->micd_timeout_work); + cancelled_state = arizona_jds_cancel_timeout(info); pm_runtime_get_sync(info->dev); @@ -2005,9 +1454,8 @@ static irqreturn_t arizona_jackdet(int irq, void *data) schedule_delayed_work(&info->hpdet_work, msecs_to_jiffies(HPDET_DEBOUNCE)); - if (cancelled_mic) - schedule_delayed_work(&info->micd_timeout_work, - msecs_to_jiffies(info->micd_timeout)); + if (cancelled_state) + arizona_jds_start_timeout(info); goto out; } @@ -2015,17 +1463,15 @@ static irqreturn_t arizona_jackdet(int irq, void *data) if (info->last_jackdet == present) { dev_dbg(arizona->dev, "Detected jack\n"); - info->cable = true; if (!arizona->pdata.hpdet_acc_id) { - info->detecting = true; info->mic = false; info->jack_flips = 0; if (arizona->pdata.init_mic_delay) msleep(arizona->pdata.init_mic_delay); - arizona_start_mic(info); + arizona_jds_set_state(info, &arizona_micd_microphone); } else { schedule_delayed_work(&info->hpdet_work, msecs_to_jiffies(HPDET_DEBOUNCE)); @@ -2037,18 +1483,15 @@ static irqreturn_t arizona_jackdet(int irq, void *data) } else { dev_dbg(arizona->dev, "Detected jack removal\n"); - info->cable = false; - arizona_stop_mic(info); - info->num_hpdet_res = 0; for (i = 0; i < ARRAY_SIZE(info->hpdet_res); i++) info->hpdet_res[i] = 0; info->mic = false; info->micd_current = 0; info->micd_res_old = 0; - info->hpdet_done = false; info->hpdet_retried = false; arizona->hp_impedance = 0; + arizona_jds_set_state(info, NULL); for (i = 0; i < info->num_micd_ranges; i++) input_report_key(info->input, @@ -2076,11 +1519,6 @@ static irqreturn_t arizona_jackdet(int irq, void *data) } } - if (arizona->pdata.micd_timeout) - info->micd_timeout = arizona->pdata.micd_timeout; - else - info->micd_timeout = DEFAULT_MICD_TIMEOUT; - out: /* Clear trig_sts to make sure DCVDD is not forced up */ regmap_write(arizona->regmap, ARIZONA_AOD_WKUP_AND_TRIG, @@ -2222,9 +1660,8 @@ static int arizona_extcon_probe(struct platform_device *pdev) info->dev = &pdev->dev; info->last_jackdet = ~(ARIZONA_MICD_CLAMP_STS | ARIZONA_JD1_STS); INIT_DELAYED_WORK(&info->hpdet_work, arizona_hpdet_work); - INIT_DELAYED_WORK(&info->micd_detect_work, arizona_micd_detect); + INIT_DELAYED_WORK(&info->micd_detect_work, arizona_micd_handler); INIT_DELAYED_WORK(&info->micd_clear_work, arizona_micd_input_clear); - INIT_DELAYED_WORK(&info->micd_timeout_work, arizona_micd_timeout_work); INIT_DELAYED_WORK(&info->state_timeout_work, arizona_jds_timeout_work); platform_set_drvdata(pdev, info); @@ -2496,7 +1933,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) } ret = arizona_request_irq(arizona, ARIZONA_IRQ_HPDET, - "HPDET", arizona_hpdet_irq, info); + "HPDET", arizona_hpdet_handler, info); if (ret != 0) { dev_err(&pdev->dev, "Failed to get HPDET IRQ: %d\n", ret); goto err_micdet; From a5d922d42782ac0d7115192a49c51657c2353552 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 24 Apr 2014 13:12:44 +0100 Subject: [PATCH 0323/1167] switch: arizona: Factor out useful things into header file Change-Id: I072cd4956b8daccd7aef3610eb639b3074b024b5 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 81 ++++++++++++++------------------- include/linux/switch-arizona.h | 78 +++++++++++++++++++++++++++++++ 2 files changed, 113 insertions(+), 46 deletions(-) create mode 100644 include/linux/switch-arizona.h diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 52507878be6..83b6439a624 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -30,6 +30,7 @@ #include #include #include +#include #include @@ -58,19 +59,6 @@ #define HP_NORMAL_IMPEDANCE 0 #define HP_LOW_IMPEDANCE 1 -enum { - MICD_LVL_1_TO_7 = ARIZONA_MICD_LVL_1 | ARIZONA_MICD_LVL_2 | - ARIZONA_MICD_LVL_3 | ARIZONA_MICD_LVL_4 | - ARIZONA_MICD_LVL_5 | ARIZONA_MICD_LVL_6 | - ARIZONA_MICD_LVL_7, - - MICD_LVL_0_TO_7 = ARIZONA_MICD_LVL_0 | MICD_LVL_1_TO_7, - - MICD_LVL_0_TO_8 = MICD_LVL_0_TO_7 | ARIZONA_MICD_LVL_8, -}; - -struct arizona_jd_state; - struct arizona_extcon_info { struct device *dev; struct arizona *arizona; @@ -159,21 +147,6 @@ static ssize_t arizona_extcon_show(struct device *dev, char *buf); DEVICE_ATTR(hp_impedance, S_IRUGO, arizona_extcon_show, NULL); -struct arizona_jd_state { - int mode; - - int (*start)(struct arizona_extcon_info *); - void (*restart)(struct arizona_extcon_info *); - int (*reading)(struct arizona_extcon_info *, int); - void (*stop)(struct arizona_extcon_info *); - - int (*timeout_ms)(struct arizona_extcon_info *); - void (*timeout)(struct arizona_extcon_info *); -}; - -static const struct arizona_jd_state arizona_hpdet_left; -static const struct arizona_jd_state arizona_micd_button; -static const struct arizona_jd_state arizona_micd_microphone; static const struct arizona_jd_state arizona_hpdet_acc_id; static int arizona_jds_get_mode(struct arizona_extcon_info *info) @@ -186,8 +159,8 @@ static int arizona_jds_get_mode(struct arizona_extcon_info *info) return mode; } -static int arizona_jds_set_state(struct arizona_extcon_info *info, - const struct arizona_jd_state *new_state) +int arizona_jds_set_state(struct arizona_extcon_info *info, + const struct arizona_jd_state *new_state) { int ret = 0; @@ -206,6 +179,7 @@ static int arizona_jds_set_state(struct arizona_extcon_info *info, return ret; } +EXPORT_SYMBOL_GPL(arizona_jds_set_state); static void arizona_jds_reading(struct arizona_extcon_info *info, int val) { @@ -769,7 +743,7 @@ int arizona_wm5110_tune_headphone(struct arizona_extcon_info *info, return 0; } -static int arizona_hpdet_start(struct arizona_extcon_info *info) +int arizona_hpdet_start(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; int ret; @@ -826,8 +800,9 @@ static int arizona_hpdet_start(struct arizona_extcon_info *info) skip: return ret; } +EXPORT_SYMBOL_GPL(arizona_hpdet_start); -static void arizona_hpdet_restart(struct arizona_extcon_info *info) +void arizona_hpdet_restart(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; @@ -841,8 +816,9 @@ static void arizona_hpdet_restart(struct arizona_extcon_info *info) ARIZONA_HEADPHONE_DETECT_1, ARIZONA_HP_POLL, ARIZONA_HP_POLL); } +EXPORT_SYMBOL_GPL(arizona_hpdet_restart); -static void arizona_hpdet_stop(struct arizona_extcon_info *info) +void arizona_hpdet_stop(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; @@ -856,8 +832,9 @@ static void arizona_hpdet_stop(struct arizona_extcon_info *info) pm_runtime_put_autosuspend(info->dev); } +EXPORT_SYMBOL_GPL(arizona_hpdet_stop); -static int arizona_hpdet_reading(struct arizona_extcon_info *info, int val) +int arizona_hpdet_reading(struct arizona_extcon_info *info, int val) { struct arizona *arizona = info->arizona; @@ -884,8 +861,9 @@ static int arizona_hpdet_reading(struct arizona_extcon_info *info, int val) return 0; } +EXPORT_SYMBOL_GPL(arizona_hpdet_reading); -static int arizona_micd_start(struct arizona_extcon_info *info) +int arizona_micd_start(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; unsigned int mode; @@ -920,8 +898,9 @@ static int arizona_micd_start(struct arizona_extcon_info *info) return 0; } +EXPORT_SYMBOL_GPL(arizona_micd_start); -static void arizona_micd_stop(struct arizona_extcon_info *info) +void arizona_micd_stop(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; const char *widget = arizona_extcon_get_micbias(info); @@ -954,9 +933,10 @@ static void arizona_micd_stop(struct arizona_extcon_info *info) pm_runtime_mark_last_busy(info->dev); pm_runtime_put_autosuspend(info->dev); } +EXPORT_SYMBOL_GPL(arizona_micd_stop); -static int arizona_micd_button_reading(struct arizona_extcon_info *info, - int val) +int arizona_micd_button_reading(struct arizona_extcon_info *info, + int val) { struct arizona *arizona = info->arizona; int lvl, i, key; @@ -990,8 +970,9 @@ static int arizona_micd_button_reading(struct arizona_extcon_info *info, return 0; } +EXPORT_SYMBOL_GPL(arizona_micd_button_reading); -static int arizona_micd_mic_start(struct arizona_extcon_info *info) +int arizona_micd_mic_start(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; int ret; @@ -1007,8 +988,9 @@ static int arizona_micd_mic_start(struct arizona_extcon_info *info) return arizona_micd_start(info); } +EXPORT_SYMBOL_GPL(arizona_micd_mic_start); -static void arizona_micd_mic_stop(struct arizona_extcon_info *info) +void arizona_micd_mic_stop(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; int ret; @@ -1023,8 +1005,9 @@ static void arizona_micd_mic_stop(struct arizona_extcon_info *info) info->detecting = false; } +EXPORT_SYMBOL_GPL(arizona_micd_mic_stop); -static int arizona_micd_mic_reading(struct arizona_extcon_info *info, int val) +int arizona_micd_mic_reading(struct arizona_extcon_info *info, int val) { struct arizona *arizona = info->arizona; int ret; @@ -1084,16 +1067,18 @@ static int arizona_micd_mic_reading(struct arizona_extcon_info *info, int val) return 0; } +EXPORT_SYMBOL_GPL(arizona_micd_mic_reading); -static int arizona_micd_mic_timeout_ms(struct arizona_extcon_info *info) +int arizona_micd_mic_timeout_ms(struct arizona_extcon_info *info) { if (info->arizona->pdata.micd_timeout) return info->arizona->pdata.micd_timeout; else return DEFAULT_MICD_TIMEOUT; } +EXPORT_SYMBOL_GPL(arizona_micd_mic_timeout_ms); -static void arizona_micd_mic_timeout(struct arizona_extcon_info *info) +void arizona_micd_mic_timeout(struct arizona_extcon_info *info) { int ret; @@ -1103,6 +1088,7 @@ static void arizona_micd_mic_timeout(struct arizona_extcon_info *info) if (ret < 0) switch_set_state(&info->edev, BIT_HEADSET_NO_MIC); } +EXPORT_SYMBOL_GPL(arizona_micd_mic_timeout); static int arizona_hpdet_acc_id_reading(struct arizona_extcon_info *info, int reading) @@ -1372,21 +1358,23 @@ static irqreturn_t arizona_micdet(int irq, void *data) return IRQ_HANDLED; } -static const struct arizona_jd_state arizona_hpdet_left = { +const struct arizona_jd_state arizona_hpdet_left = { .mode = ARIZONA_ACCDET_MODE_HPL, .start = arizona_hpdet_start, .reading = arizona_hpdet_reading, .stop = arizona_hpdet_stop, }; +EXPORT_SYMBOL_GPL(arizona_hpdet_left); -static const struct arizona_jd_state arizona_micd_button = { +const struct arizona_jd_state arizona_micd_button = { .mode = ARIZONA_ACCDET_MODE_MIC, .start = arizona_micd_start, .reading = arizona_micd_button_reading, .stop = arizona_micd_stop, }; +EXPORT_SYMBOL_GPL(arizona_micd_button); -static const struct arizona_jd_state arizona_micd_microphone = { +const struct arizona_jd_state arizona_micd_microphone = { .mode = ARIZONA_ACCDET_MODE_MIC, .start = arizona_micd_mic_start, .reading = arizona_micd_mic_reading, @@ -1395,6 +1383,7 @@ static const struct arizona_jd_state arizona_micd_microphone = { .timeout_ms = arizona_micd_mic_timeout_ms, .timeout = arizona_micd_mic_timeout, }; +EXPORT_SYMBOL_GPL(arizona_micd_microphone); static const struct arizona_jd_state arizona_hpdet_acc_id = { .mode = ARIZONA_ACCDET_MODE_HPL, diff --git a/include/linux/switch-arizona.h b/include/linux/switch-arizona.h new file mode 100644 index 00000000000..adab4453df3 --- /dev/null +++ b/include/linux/switch-arizona.h @@ -0,0 +1,78 @@ +/* + * extcon-arizona.h - Extcon driver Wolfson Arizona devices + * + * Copyright (C) 2014 Wolfson Microelectronics plc + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _SWITCH_ARIZONA_H_ +#define _SWITCH_ARIZONA_H_ + +#include +#include + +#define ARIZONA_ACCDET_MODE_MIC 0 +#define ARIZONA_ACCDET_MODE_HPL 1 +#define ARIZONA_ACCDET_MODE_HPR 2 +#define ARIZONA_ACCDET_MODE_HPM 4 +#define ARIZONA_ACCDET_MODE_ADC 7 +#define ARIZONA_ACCDET_MODE_INVALID 8 + +enum { + MICD_LVL_1_TO_7 = ARIZONA_MICD_LVL_1 | ARIZONA_MICD_LVL_2 | + ARIZONA_MICD_LVL_3 | ARIZONA_MICD_LVL_4 | + ARIZONA_MICD_LVL_5 | ARIZONA_MICD_LVL_6 | + ARIZONA_MICD_LVL_7, + + MICD_LVL_0_TO_7 = ARIZONA_MICD_LVL_0 | MICD_LVL_1_TO_7, + + MICD_LVL_0_TO_8 = MICD_LVL_0_TO_7 | ARIZONA_MICD_LVL_8, +}; + +struct arizona_extcon_info; + +struct arizona_jd_state { + int mode; + + int (*start)(struct arizona_extcon_info *); + void (*restart)(struct arizona_extcon_info *); + int (*reading)(struct arizona_extcon_info *, int); + void (*stop)(struct arizona_extcon_info *); + + int (*timeout_ms)(struct arizona_extcon_info *); + void (*timeout)(struct arizona_extcon_info *); +}; + +int arizona_jds_set_state(struct arizona_extcon_info *info, + const struct arizona_jd_state *new_state); + +extern const struct arizona_jd_state arizona_hpdet_left; +extern const struct arizona_jd_state arizona_micd_button; +extern const struct arizona_jd_state arizona_micd_microphone; + +extern int arizona_hpdet_start(struct arizona_extcon_info *info); +extern void arizona_hpdet_restart(struct arizona_extcon_info *info); +extern void arizona_hpdet_stop(struct arizona_extcon_info *info); +extern int arizona_hpdet_reading(struct arizona_extcon_info *info, int val); + +extern int arizona_micd_start(struct arizona_extcon_info *info); +extern void arizona_micd_stop(struct arizona_extcon_info *info); +extern int arizona_micd_button_reading(struct arizona_extcon_info *info, + int val); + +extern int arizona_micd_mic_start(struct arizona_extcon_info *info); +extern void arizona_micd_mic_stop(struct arizona_extcon_info *info); +extern int arizona_micd_mic_reading(struct arizona_extcon_info *info, int val); +extern int arizona_micd_mic_timeout_ms(struct arizona_extcon_info *info); +extern void arizona_micd_mic_timeout(struct arizona_extcon_info *info); + +#endif From dae90231eb782d89bcc93048df3f1bc1ded0370d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 24 Apr 2014 13:28:53 +0100 Subject: [PATCH 0324/1167] switch: arizona: Add external report function for use in custom jd Change-Id: Ibc6ea3566519110488b9e6b093b34241321c8d81 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 22 ++++++++++++++-------- include/linux/switch-arizona.h | 2 ++ 2 files changed, 16 insertions(+), 8 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 83b6439a624..3c4bc3804a1 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -147,6 +147,12 @@ static ssize_t arizona_extcon_show(struct device *dev, char *buf); DEVICE_ATTR(hp_impedance, S_IRUGO, arizona_extcon_show, NULL); +inline void arizona_extcon_report(struct arizona_extcon_info *info, int state) +{ + switch_set_state(&info->edev, state); +} +EXPORT_SYMBOL_GPL(arizona_extcon_report); + static const struct arizona_jd_state arizona_hpdet_acc_id; static int arizona_jds_get_mode(struct arizona_extcon_info *info) @@ -852,10 +858,10 @@ int arizona_hpdet_reading(struct arizona_extcon_info *info, int val) } if (info->mic) { - switch_set_state(&info->edev, BIT_HEADSET); + arizona_extcon_report(info, BIT_HEADSET); arizona_jds_set_state(info, &arizona_micd_button); } else { - switch_set_state(&info->edev, BIT_HEADSET_NO_MIC); + arizona_extcon_report(info, BIT_HEADSET_NO_MIC); arizona_jds_set_state(info, NULL); } @@ -1060,9 +1066,9 @@ int arizona_micd_mic_reading(struct arizona_extcon_info *info, int val) ret = arizona_jds_set_state(info, &arizona_hpdet_left); if (ret < 0) { if (info->mic) - switch_set_state(&info->edev, BIT_HEADSET); + arizona_extcon_report(info, BIT_HEADSET); else - switch_set_state(&info->edev, BIT_HEADSET_NO_MIC); + arizona_extcon_report(info, BIT_HEADSET_NO_MIC); } return 0; @@ -1086,7 +1092,7 @@ void arizona_micd_mic_timeout(struct arizona_extcon_info *info) ret = arizona_jds_set_state(info, &arizona_hpdet_left); if (ret < 0) - switch_set_state(&info->edev, BIT_HEADSET_NO_MIC); + arizona_extcon_report(info, BIT_HEADSET_NO_MIC); } EXPORT_SYMBOL_GPL(arizona_micd_mic_timeout); @@ -1149,7 +1155,7 @@ static int arizona_hpdet_acc_id_reading(struct arizona_extcon_info *info, } else { dev_dbg(arizona->dev, "Detected headphone\n"); - switch_set_state(&info->edev, BIT_HEADSET_NO_MIC); + arizona_extcon_report(info, BIT_HEADSET_NO_MIC); arizona_jds_set_state(info, NULL); } @@ -1206,7 +1212,7 @@ static int arizona_hpdet_acc_id_start(struct arizona_extcon_info *info) pm_runtime_put_autosuspend(info->dev); /* Just report headphone */ - switch_set_state(&info->edev, BIT_HEADSET_NO_MIC); + arizona_extcon_report(info, BIT_HEADSET_NO_MIC); return ret; } @@ -1487,7 +1493,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) info->micd_ranges[i].key, 0); input_sync(info->input); - switch_set_state(&info->edev, BIT_NO_HEADSET); + arizona_extcon_report(info, BIT_NO_HEADSET); regmap_update_bits(arizona->regmap, ARIZONA_JACK_DETECT_DEBOUNCE, diff --git a/include/linux/switch-arizona.h b/include/linux/switch-arizona.h index adab4453df3..0de61b08fbe 100644 --- a/include/linux/switch-arizona.h +++ b/include/linux/switch-arizona.h @@ -75,4 +75,6 @@ extern int arizona_micd_mic_reading(struct arizona_extcon_info *info, int val); extern int arizona_micd_mic_timeout_ms(struct arizona_extcon_info *info); extern void arizona_micd_mic_timeout(struct arizona_extcon_info *info); +extern void arizona_extcon_report(struct arizona_extcon_info *info, int state); + #endif From 7cf9ff24fd2b6e102091ada82e86944ecea27a48 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 24 Apr 2014 13:24:22 +0100 Subject: [PATCH 0325/1167] switch: arizona: Add means to specify customer jack detection Change-Id: I630a4ccbdf7aa0fff20c7be3a8ed497a7e31e933 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 7 ++++++- include/linux/mfd/arizona/pdata.h | 5 +++++ sound/soc/codecs/arizona.c | 11 +++++++++++ sound/soc/codecs/arizona.h | 3 +++ 4 files changed, 25 insertions(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 3c4bc3804a1..279164c92bd 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1466,7 +1466,12 @@ static irqreturn_t arizona_jackdet(int irq, void *data) if (arizona->pdata.init_mic_delay) msleep(arizona->pdata.init_mic_delay); - arizona_jds_set_state(info, &arizona_micd_microphone); + if (arizona->pdata.custom_jd) + arizona_jds_set_state(info, + arizona->pdata.custom_jd); + else + arizona_jds_set_state(info, + &arizona_micd_microphone); } else { schedule_delayed_work(&info->hpdet_work, msecs_to_jiffies(HPDET_DEBOUNCE)); diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index ba174aaf885..90f7a5ffff1 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -78,6 +78,8 @@ struct regulator_init_data; +struct arizona_jd_state; + struct arizona_micbias { int mV; /** Regulated voltage */ unsigned int ext_cap:1; /** External capacitor fitted */ @@ -223,6 +225,9 @@ struct arizona_pdata { /** wm5102t output power */ unsigned int wm5102t_output_pwr; + + /** Override the normal jack detection */ + const struct arizona_jd_state *custom_jd; }; #endif diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 7c28d053499..02d092fb977 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2226,6 +2226,17 @@ int arizona_set_ez2ctrl_cb(struct snd_soc_codec *codec, } EXPORT_SYMBOL_GPL(arizona_set_ez2ctrl_cb); +int arizona_set_custom_jd(struct snd_soc_codec *codec, + const struct arizona_jd_state *custom_jd) +{ + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + + arizona->pdata.custom_jd = custom_jd; + + return 0; +} +EXPORT_SYMBOL_GPL(arizona_set_custom_jd); + MODULE_DESCRIPTION("ASoC Wolfson Arizona class device support"); MODULE_AUTHOR("Mark Brown "); MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 089c6cf8f06..41eccf219d2 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -62,6 +62,7 @@ struct arizona; struct wm_adsp; +struct arizona_jd_state; struct arizona_dai_priv { int clk; @@ -266,5 +267,7 @@ extern int arizona_set_hpdet_cb(struct snd_soc_codec *codec, void (*hpdet_cb)(unsigned int measurement)); extern int arizona_set_ez2ctrl_cb(struct snd_soc_codec *codec, void (*ez2ctrl_trigger)(void)); +extern int arizona_set_custom_jd(struct snd_soc_codec *codec, + const struct arizona_jd_state *custom_jd); #endif From 79ef8ac63aad78138e2c930e6926f5ce21136c8a Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 9 May 2014 16:45:37 +0100 Subject: [PATCH 0326/1167] switch: arizona: Add support for moisture detection on HPDETL Add support for using the left headphone detection pin for moisture detection rather than headphone impedance measurement. Change-Id: Ie950882c61eb498f97be9fc89902585061a161c9 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 60 +++++++++++++++++++++++++++++-- include/linux/mfd/arizona/pdata.h | 6 ++++ include/linux/switch-arizona.h | 1 + 3 files changed, 65 insertions(+), 2 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 279164c92bd..7dd307ee09b 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -153,6 +153,7 @@ inline void arizona_extcon_report(struct arizona_extcon_info *info, int state) } EXPORT_SYMBOL_GPL(arizona_extcon_report); +static const struct arizona_jd_state arizona_hpdet_moisture; static const struct arizona_jd_state arizona_hpdet_acc_id; static int arizona_jds_get_mode(struct arizona_extcon_info *info) @@ -840,6 +841,33 @@ void arizona_hpdet_stop(struct arizona_extcon_info *info) } EXPORT_SYMBOL_GPL(arizona_hpdet_stop); +static int arizona_hpdet_moisture_start(struct arizona_extcon_info *info) +{ + int ret; + + ret = arizona_hpdet_start(info); + + arizona_extcon_do_magic(info, 0); + + return ret; +} + +static int arizona_hpdet_moisture_reading(struct arizona_extcon_info *info, + int val) +{ + struct arizona *arizona = info->arizona; + + if (val < arizona->pdata.hpdet_moisture_imp) { + arizona_jds_set_state(info, &arizona_micd_microphone); + } else { + dev_warn(arizona->dev, + "Jack detection due to moisture, ignoring\n"); + arizona_jds_set_state(info, NULL); + } + + return 0; +} + int arizona_hpdet_reading(struct arizona_extcon_info *info, int val) { struct arizona *arizona = info->arizona; @@ -1063,7 +1091,10 @@ int arizona_micd_mic_reading(struct arizona_extcon_info *info, int val) done: pm_runtime_mark_last_busy(info->dev); - ret = arizona_jds_set_state(info, &arizona_hpdet_left); + if (arizona->pdata.hpdet_moisture_imp) + ret = arizona_jds_set_state(info, &arizona_hpdet_right); + else + ret = arizona_jds_set_state(info, &arizona_hpdet_left); if (ret < 0) { if (info->mic) arizona_extcon_report(info, BIT_HEADSET); @@ -1086,11 +1117,15 @@ EXPORT_SYMBOL_GPL(arizona_micd_mic_timeout_ms); void arizona_micd_mic_timeout(struct arizona_extcon_info *info) { + struct arizona *arizona = info->arizona; int ret; dev_dbg(info->arizona->dev, "MICD timed out, reporting HP\n"); - ret = arizona_jds_set_state(info, &arizona_hpdet_left); + if (arizona->pdata.hpdet_moisture_imp) + ret = arizona_jds_set_state(info, &arizona_hpdet_right); + else + ret = arizona_jds_set_state(info, &arizona_hpdet_left); if (ret < 0) arizona_extcon_report(info, BIT_HEADSET_NO_MIC); } @@ -1364,6 +1399,13 @@ static irqreturn_t arizona_micdet(int irq, void *data) return IRQ_HANDLED; } +static const struct arizona_jd_state arizona_hpdet_moisture = { + .mode = ARIZONA_ACCDET_MODE_HPL, + .start = arizona_hpdet_moisture_start, + .reading = arizona_hpdet_moisture_reading, + .stop = arizona_hpdet_stop, +}; + const struct arizona_jd_state arizona_hpdet_left = { .mode = ARIZONA_ACCDET_MODE_HPL, .start = arizona_hpdet_start, @@ -1372,6 +1414,14 @@ const struct arizona_jd_state arizona_hpdet_left = { }; EXPORT_SYMBOL_GPL(arizona_hpdet_left); +const struct arizona_jd_state arizona_hpdet_right = { + .mode = ARIZONA_ACCDET_MODE_HPR, + .start = arizona_hpdet_start, + .reading = arizona_hpdet_reading, + .stop = arizona_hpdet_stop, +}; +EXPORT_SYMBOL_GPL(arizona_hpdet_right); + const struct arizona_jd_state arizona_micd_button = { .mode = ARIZONA_ACCDET_MODE_MIC, .start = arizona_micd_start, @@ -1469,6 +1519,9 @@ static irqreturn_t arizona_jackdet(int irq, void *data) if (arizona->pdata.custom_jd) arizona_jds_set_state(info, arizona->pdata.custom_jd); + else if (arizona->pdata.hpdet_moisture_imp) + arizona_jds_set_state(info, + &arizona_hpdet_moisture); else arizona_jds_set_state(info, &arizona_micd_microphone); @@ -1608,6 +1661,9 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,fixed-hpdet-imp", false, &pdata->fixed_hpdet_imp); + arizona_of_read_u32(arizona, "wlf,hpdet-moisture-imp", false, + &pdata->hpdet_moisture_imp); + return 0; } #else diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 90f7a5ffff1..449e9ada72f 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -149,6 +149,12 @@ struct arizona_pdata { /** Callback notifying HPDET result */ void (*hpdet_cb)(unsigned int measurement); + /** Use HPDETL to check for moisture, this value specifies the + * threshold impedance in ohms above which it will be considered + * a false detection + */ + int hpdet_moisture_imp; + /** Use software comparison to determine mic presence */ bool micd_software_compare; diff --git a/include/linux/switch-arizona.h b/include/linux/switch-arizona.h index 0de61b08fbe..927b1373719 100644 --- a/include/linux/switch-arizona.h +++ b/include/linux/switch-arizona.h @@ -56,6 +56,7 @@ int arizona_jds_set_state(struct arizona_extcon_info *info, const struct arizona_jd_state *new_state); extern const struct arizona_jd_state arizona_hpdet_left; +extern const struct arizona_jd_state arizona_hpdet_right; extern const struct arizona_jd_state arizona_micd_button; extern const struct arizona_jd_state arizona_micd_microphone; From 7e31fdd9a225d2a62d9ec28d5cbef6117ee9e506 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 19 May 2014 12:58:34 +0100 Subject: [PATCH 0327/1167] mfd: arizona: Add locking for specific register settings Some operations on the CODEC need to be done under specific register settings, to ensure that instances of this don't interfer with each other add a register settings lock that can be held in situations where this is the case. Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 3 +++ drivers/switch/switch-arizona.c | 4 ++++ include/linux/mfd/arizona/core.h | 2 ++ sound/soc/codecs/arizona.c | 15 +++++++++------ 4 files changed, 18 insertions(+), 6 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 76e92a9e383..23b986201c2 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -982,6 +982,7 @@ static bool arizona_florida_get_input_state(struct arizona* arizona) void arizona_florida_clear_input(struct arizona *arizona) { + mutex_lock(&arizona->reg_setting_lock); regmap_write(arizona->regmap, 0x80, 0x3); if (arizona_florida_get_input_state(arizona)) { @@ -1007,6 +1008,7 @@ void arizona_florida_clear_input(struct arizona *arizona) } regmap_write(arizona->regmap, 0x80, 0x0); + mutex_unlock(&arizona->reg_setting_lock); } EXPORT_SYMBOL_GPL(arizona_florida_clear_input); @@ -1021,6 +1023,7 @@ int arizona_dev_init(struct arizona *arizona) dev_set_drvdata(arizona->dev, arizona); mutex_init(&arizona->clk_lock); + mutex_init(&arizona->reg_setting_lock); if (dev_get_platdata(arizona->dev)) memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 7dd307ee09b..e0ec2fccd86 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -913,9 +913,11 @@ int arizona_micd_start(struct arizona_extcon_info *info) } if (info->micd_reva) { + mutex_lock(&arizona->reg_setting_lock); regmap_write(arizona->regmap, 0x80, 0x3); regmap_write(arizona->regmap, 0x294, 0); regmap_write(arizona->regmap, 0x80, 0x0); + mutex_unlock(&arizona->reg_setting_lock); } mode = info->state->mode; @@ -957,9 +959,11 @@ void arizona_micd_stop(struct arizona_extcon_info *info) snd_soc_dapm_sync(dapm); if (info->micd_reva) { + mutex_lock(&arizona->reg_setting_lock); regmap_write(arizona->regmap, 0x80, 0x3); regmap_write(arizona->regmap, 0x294, 2); regmap_write(arizona->regmap, 0x80, 0x0); + mutex_unlock(&arizona->reg_setting_lock); } regulator_disable(info->micvdd); diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 864fa20477c..800b8243e45 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -115,6 +115,8 @@ struct arizona { int clk32k_ref; struct snd_soc_dapm_context *dapm; + + struct mutex reg_setting_lock; }; int arizona_clk32k_enable(struct arizona *arizona); diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 02d092fb977..bfc608ed3b6 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -715,14 +715,13 @@ static int arizona_update_input(struct arizona* arizona, bool enable) return 0; } + mutex_lock(&arizona->reg_setting_lock); + regmap_write(arizona->regmap, 0x80, 0x3); + if (enable) { - regmap_write(arizona->regmap, 0x80, 0x3); regmap_write(arizona->regmap, 0x3A6, 0x5555); regmap_write(arizona->regmap, 0x3A5, 0x3); - regmap_write(arizona->regmap, 0x80, 0x0); } else { - regmap_write(arizona->regmap, 0x80, 0x3); - regmap_read(arizona->regmap, 0x3A5, &val); if (val) { msleep(10); @@ -730,10 +729,11 @@ static int arizona_update_input(struct arizona* arizona, bool enable) regmap_write(arizona->regmap, 0x3A6, 0x0); msleep(5); } - - regmap_write(arizona->regmap, 0x80, 0x0); } + regmap_write(arizona->regmap, 0x80, 0x0); + mutex_unlock(&arizona->reg_setting_lock); + return 0; } @@ -1457,6 +1457,7 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, { struct snd_soc_codec *codec = dai->codec; struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1]; int base = dai->driver->base; int i, sr_val; @@ -1478,12 +1479,14 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, switch (priv->arizona->type) { case WM5102: if (priv->arizona->pdata.ultrasonic_response) { + mutex_lock(&arizona->reg_setting_lock); snd_soc_write(codec, 0x80, 0x3); if (params_rate(params) >= 176400) snd_soc_write(codec, 0x4dd, 0x1); else snd_soc_write(codec, 0x4dd, 0x0); snd_soc_write(codec, 0x80, 0x0); + mutex_unlock(&arizona->reg_setting_lock); } break; default: From 3d4d080614cc93485c01d29312630e2afc621b7f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 19 May 2014 14:43:43 +0100 Subject: [PATCH 0328/1167] ASoC: arizona: Revert manual speaker enable The OUT4L and OUT4R widgets are not registers for PRE_PMU or POST_PMD events, as such the manual speaker enable on wm5102 does not run even close to correctly. As this has gone unoticed for a long time, seems that the issue this was put into fix is rather a moot point. This patch removes the manual speaker enable sequence for wm5102. Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 40 -------------------------------------- sound/soc/codecs/arizona.h | 3 --- 2 files changed, 43 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index bfc608ed3b6..d6433b4d505 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -81,30 +81,9 @@ static int arizona_spk_ev(struct snd_soc_dapm_widget *w, { struct snd_soc_codec *codec = w->codec; struct arizona *arizona = dev_get_drvdata(codec->dev->parent); - struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); - bool manual_ena = false; int val; - switch (arizona->type) { - case WM5102: - switch (arizona->rev) { - case 0: - break; - default: - manual_ena = true; - break; - } - default: - break; - } - switch (event) { - case SND_SOC_DAPM_PRE_PMU: - if (!priv->spk_ena && manual_ena) { - snd_soc_write(codec, 0x4f5, 0x25a); - priv->spk_ena_pending = true; - } - break; case SND_SOC_DAPM_POST_PMU: val = snd_soc_read(codec, ARIZONA_INTERRUPT_RAW_STATUS_3); if (val & ARIZONA_SPK_SHUTDOWN_STS) { @@ -124,30 +103,11 @@ static int arizona_spk_ev(struct snd_soc_dapm_widget *w, default: break; }; - - if (priv->spk_ena_pending) { - msleep(75); - snd_soc_write(codec, 0x4f5, 0xda); - priv->spk_ena_pending = false; - priv->spk_ena++; - } break; case SND_SOC_DAPM_PRE_PMD: - if (manual_ena) { - priv->spk_ena--; - if (!priv->spk_ena) - snd_soc_write(codec, 0x4f5, 0x25a); - } - snd_soc_update_bits(codec, ARIZONA_OUTPUT_ENABLES_1, 1 << w->shift, 0); break; - case SND_SOC_DAPM_POST_PMD: - if (manual_ena) { - if (!priv->spk_ena) - snd_soc_write(codec, 0x4f5, 0x0da); - } - break; } return 0; diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 41eccf219d2..4148eab597a 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -77,9 +77,6 @@ struct arizona_priv { int num_inputs; unsigned int in_pending; - - unsigned int spk_ena:2; - unsigned int spk_ena_pending:1; }; #define ARIZONA_NUM_MIXER_INPUTS 103 From 3b80cbc319d4d0b812ca5134269ecd590b10269b Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 29 Apr 2014 14:13:06 +0100 Subject: [PATCH 0329/1167] ASoC: wm_adsp: Set compressed capture watermark Sets the firmware buffer watermark to match the compressed stream fragment size. Change-Id: I653989b9a0db49b629abc6439d6d3c1ca5e89458 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 20 ++++++++++++++++++++ sound/soc/codecs/wm_adsp.h | 1 + 2 files changed, 21 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 8cfffac8e67..379bd5cb4ab 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -286,6 +286,8 @@ struct wm_adsp_host_buffer { #define WM_ADSP_MAX_READ_SIZE 256 #define WM_ADSP_ALG_XM_STRUCT_MAGIC 0x49aec7 +#define WM_ADSP_DEFAULT_WATERMARK DIV_ROUND_UP(2048, WM_ADSP_DATA_WORD_SIZE) + #define ADSP2_SYSTEM_CONFIG_XM_PTR \ (offsetof(struct wmfw_adsp2_id_hdr, xm) / sizeof(__be32)) @@ -2748,6 +2750,16 @@ int wm_adsp_stream_alloc(struct wm_adsp *adsp, } } + size = params->buffer.fragment_size; + if (size == 0) { + adsp->capt_watermark = WM_ADSP_DEFAULT_WATERMARK; + adsp_warn(adsp, "No fragment size, assuming %u", + adsp->capt_watermark * WM_ADSP_DATA_WORD_SIZE); + } else { + adsp->capt_watermark = + DIV_ROUND_UP(size, WM_ADSP_DATA_WORD_SIZE); + } + return 0; err_raw_capt_buf: @@ -2822,6 +2834,14 @@ int wm_adsp_stream_start(struct wm_adsp *adsp) if (ret < 0) return ret; + ret = wm_adsp_host_buffer_write(adsp, + HOST_BUFFER_FIELD(high_water_mark), + adsp->capt_watermark); + if (ret < 0) + return ret; + + adsp_dbg(adsp, "Set watermark to %u\n", adsp->capt_watermark); + return 0; } EXPORT_SYMBOL_GPL(wm_adsp_stream_start); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index a05f0995109..6df63a69226 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -101,6 +101,7 @@ struct wm_adsp { u32 *raw_capt_buf; struct circ_buf capt_buf; int capt_buf_size; + u32 capt_watermark; struct wm_adsp_buffer_region *host_regions; bool buffer_drain_pending; From 3937c63dcc1d61d718ba56d63068d62698bb4aa7 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 22 May 2014 10:32:27 +0100 Subject: [PATCH 0330/1167] Revert "switch: arizona: Add manual debouncing of the microphone detection" This reverts commit 862039239bacae5f0330bfb6151bdb631ef9de71 The manual debounce causes problems with excessive amounts of false microphone detection, which will keep the AP awake. Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 87 +++------------------------------ 1 file changed, 8 insertions(+), 79 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index e0ec2fccd86..736298dd7e9 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -78,11 +78,6 @@ struct arizona_extcon_info { bool micd_reva; bool micd_clamp; - bool micd_manual_debounce; - unsigned int micd_res_old; - unsigned int micd_res[4]; - int micd_current; - struct delayed_work hpdet_work; struct delayed_work micd_detect_work; struct delayed_work micd_clear_work; @@ -131,10 +126,6 @@ static const int arizona_micd_levels[] = { 1257, 30000, }; -static const int arizona_micd_rates[] = { - 0, 250, 500, 1000, 2000, 4000, 8000, 16000, 32000, 64000, 128000, 256000, -}; - /* These values are copied from Android WiredAccessoryObserver */ enum headset_state { BIT_NO_HEADSET = 0, @@ -453,43 +444,6 @@ static int arizona_micd_read(struct arizona_extcon_info *info) return -EINVAL; } - if (info->micd_manual_debounce) { - if (info->micd_current > 0) { - if (info->micd_res[info->micd_current - 1] != val) - info->micd_current = 0; - } - - info->micd_res[info->micd_current++] = val; - - if (info->micd_current == 4) { - info->micd_current = 0; - - if (val == info->micd_res_old) - return -EAGAIN; - info->micd_res_old = val; - } else { - int delay = arizona_micd_rates[arizona->pdata.micd_rate]; - - if (delay >= 32000) - msleep(delay / 1000); - else if (delay >= 1000) - usleep_range(delay, delay); - else if (delay) - udelay(delay); - - /* Must toggle MICD_ENA to ensure we get a new reading - * even if nothing changes - */ - regmap_update_bits(arizona->regmap, - ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_ENA, 0); - regmap_update_bits(arizona->regmap, - ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_ENA, ARIZONA_MICD_ENA); - return -EAGAIN; - } - } - return val; } @@ -1379,8 +1333,6 @@ static irqreturn_t arizona_micdet(int irq, void *data) if (!info->detecting) debounce = 0; - else if (info->micd_current > 0) - debounce = 0; switch (arizona->type) { case WM5110: @@ -1544,8 +1496,6 @@ static irqreturn_t arizona_jackdet(int irq, void *data) for (i = 0; i < ARRAY_SIZE(info->hpdet_res); i++) info->hpdet_res[i] = 0; info->mic = false; - info->micd_current = 0; - info->micd_res_old = 0; info->hpdet_retried = false; arizona->hp_impedance = 0; arizona_jds_set_state(info, NULL); @@ -1738,22 +1688,11 @@ static int arizona_extcon_probe(struct platform_device *pdev) } break; case WM8280: - switch (arizona->rev) { - case 0 ... 2: - break; - default: - info->micd_clamp = true; - info->hpdet_ip = 2; - break; - } - break; case WM5110: switch (arizona->rev) { case 0 ... 2: - info->micd_manual_debounce = true; break; default: - info->micd_manual_debounce = true; info->micd_clamp = true; info->hpdet_ip = 2; break; @@ -1830,27 +1769,17 @@ static int arizona_extcon_probe(struct platform_device *pdev) arizona->pdata.micd_bias_start_time << ARIZONA_MICD_BIAS_STARTTIME_SHIFT); - if (info->micd_manual_debounce) { + if (arizona->pdata.micd_rate) regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_RATE_MASK, 0); + ARIZONA_MICD_RATE_MASK, + arizona->pdata.micd_rate + << ARIZONA_MICD_RATE_SHIFT); + if (arizona->pdata.micd_dbtime) regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_DBTIME_MASK, 0); - } else { - if (arizona->pdata.micd_rate) - regmap_update_bits(arizona->regmap, - ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_RATE_MASK, - arizona->pdata.micd_rate - << ARIZONA_MICD_RATE_SHIFT); - - if (arizona->pdata.micd_dbtime) - regmap_update_bits(arizona->regmap, - ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_DBTIME_MASK, - arizona->pdata.micd_dbtime - << ARIZONA_MICD_DBTIME_SHIFT); - } + ARIZONA_MICD_DBTIME_MASK, + arizona->pdata.micd_dbtime + << ARIZONA_MICD_DBTIME_SHIFT); BUILD_BUG_ON(ARRAY_SIZE(arizona_micd_levels) < ARIZONA_NUM_MICD_BUTTON_LEVELS); From 3c34d717b2c1a2146535b98d70b5ca02c3a992bf Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 4 Feb 2014 11:41:29 +0000 Subject: [PATCH 0331/1167] mfd: arizona: correct addresses of always-on trigger registers Update the addresses and names to match current silicon. The WM8997 regmap tables have been adjusted to match the new names. Missing registers have been added to Florida default value table. Change-Id: I31c39624652fefe0c9e85dc4b2983e1cb76617d3 Signed-off-by: Richard Fitzgerald --- drivers/mfd/florida-tables.c | 12 ++++++++---- drivers/mfd/wm5102-tables.c | 2 ++ drivers/mfd/wm8997-tables.c | 12 ++++++------ include/linux/mfd/arizona/registers.h | 14 ++++++++------ 4 files changed, 24 insertions(+), 16 deletions(-) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index f3da9913cc7..1478527bb6d 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -468,10 +468,12 @@ static const struct reg_default florida_reg_default[] = { { 0x00000062, 0x01FF }, /* R98 - Sample Rate Sequence Select 2 */ { 0x00000063, 0x01FF }, /* R99 - Sample Rate Sequence Select 3 */ { 0x00000064, 0x01FF }, /* R100 - Sample Rate Sequence Select 4 */ - { 0x00000068, 0x01FF }, /* R104 - Always On Triggers Sequence Select 1 */ - { 0x00000069, 0x01FF }, /* R105 - Always On Triggers Sequence Select 2 */ - { 0x0000006A, 0x01FF }, /* R106 - Always On Triggers Sequence Select 3 */ - { 0x0000006B, 0x01FF }, /* R107 - Always On Triggers Sequence Select 4 */ + { 0x00000066, 0x01FF }, /* R102 - Always On Triggers Sequence Select 1 */ + { 0x00000067, 0x01FF }, /* R103 - Always On Triggers Sequence Select 2 */ + { 0x00000068, 0x01FF }, /* R104 - Always On Triggers Sequence Select 3 */ + { 0x00000069, 0x01FF }, /* R105 - Always On Triggers Sequence Select 4 */ + { 0x0000006A, 0x01FF }, /* R106 - Always On Triggers Sequence Select 5 */ + { 0x0000006B, 0x01FF }, /* R107 - Always On Triggers Sequence Select 6 */ { 0x00000070, 0x0000 }, /* R112 - Comfort Noise Generator */ { 0x00000090, 0x0000 }, /* R144 - Haptics Control 1 */ { 0x00000091, 0x7FFF }, /* R145 - Haptics Control 2 */ @@ -1533,6 +1535,8 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2: case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3: case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6: case ARIZONA_COMFORT_NOISE_GENERATOR: case ARIZONA_HAPTICS_CONTROL_1: case ARIZONA_HAPTICS_CONTROL_2: diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index 6f33b4b1a66..9885631e776 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -1114,6 +1114,8 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4: case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5: case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_7: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_8: case ARIZONA_COMFORT_NOISE_GENERATOR: case ARIZONA_HAPTICS_CONTROL_1: case ARIZONA_HAPTICS_CONTROL_2: diff --git a/drivers/mfd/wm8997-tables.c b/drivers/mfd/wm8997-tables.c index c9c65197bb6..c7a81da64ee 100644 --- a/drivers/mfd/wm8997-tables.c +++ b/drivers/mfd/wm8997-tables.c @@ -174,10 +174,10 @@ static const struct reg_default wm8997_reg_default[] = { { 0x00000062, 0x01FF }, /* R98 - Sample Rate Sequence Select 2 */ { 0x00000063, 0x01FF }, /* R99 - Sample Rate Sequence Select 3 */ { 0x00000064, 0x01FF }, /* R100 - Sample Rate Sequence Select 4 */ - { 0x00000068, 0x01FF }, /* R104 - Always On Triggers Sequence Select 1 */ - { 0x00000069, 0x01FF }, /* R105 - Always On Triggers Sequence Select 2 */ - { 0x0000006A, 0x01FF }, /* R106 - Always On Triggers Sequence Select 3 */ - { 0x0000006B, 0x01FF }, /* R107 - Always On Triggers Sequence Select 4 */ + { 0x00000068, 0x01FF }, /* R104 - Always On Triggers Sequence Select 3 */ + { 0x00000069, 0x01FF }, /* R105 - Always On Triggers Sequence Select 4 */ + { 0x0000006A, 0x01FF }, /* R106 - Always On Triggers Sequence Select 5 */ + { 0x0000006B, 0x01FF }, /* R107 - Always On Triggers Sequence Select 6 */ { 0x00000070, 0x0000 }, /* R112 - Comfort Noise Generator */ { 0x00000090, 0x0000 }, /* R144 - Haptics Control 1 */ { 0x00000091, 0x7FFF }, /* R145 - Haptics Control 2 */ @@ -814,10 +814,10 @@ static bool wm8997_readable_register(struct device *dev, unsigned int reg) case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2: case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3: case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_4: - case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1: - case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2: case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3: case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6: case ARIZONA_COMFORT_NOISE_GENERATOR: case ARIZONA_HAPTICS_CONTROL_1: case ARIZONA_HAPTICS_CONTROL_2: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 199232faf48..6ec8d55f126 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -42,12 +42,14 @@ #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2 0x62 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3 0x63 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_4 0x64 -#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1 0x68 -#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2 0x69 -#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3 0x6A -#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4 0x6B -#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5 0x6C -#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6 0x6D +#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1 0x66 +#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2 0x67 +#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3 0x68 +#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4 0x69 +#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5 0x6A +#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6 0x6B +#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_7 0x6C +#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_8 0x6D #define ARIZONA_COMFORT_NOISE_GENERATOR 0x70 #define ARIZONA_HAPTICS_CONTROL_1 0x90 #define ARIZONA_HAPTICS_CONTROL_2 0x91 From 7452bba561ff05b211d6d35fc8b3785068043a45 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 24 Apr 2014 16:12:52 +0100 Subject: [PATCH 0332/1167] extcon: arizona: support inverted jack detect switch Add pdata option for inverted jack detect switch that opens when jack is inserted. Change-Id: I997f66b6fdc6ea6ce5336cafdb199d9b7150d186 Signed-off-by: Richard Fitzgerald --- drivers/extcon/extcon-arizona.c | 37 ++++++++++++++++++++++++------- include/linux/mfd/arizona/pdata.h | 3 +++ 2 files changed, 32 insertions(+), 8 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index c6b4ba16afe..0bccf01eee8 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -44,6 +44,11 @@ #define ARIZONA_ACCDET_MODE_HPM 4 #define ARIZONA_ACCDET_MODE_ADC 7 +#define ARIZONA_MICD_CLAMP_MODE_JDL 0x4 +#define ARIZONA_MICD_CLAMP_MODE_JDH 0x5 +#define ARIZONA_MICD_CLAMP_MODE_JDL_GP5H 0x9 +#define ARIZONA_MICD_CLAMP_MODE_JDH_GP5H 0xb + #define ARIZONA_HPDET_MAX 10000 #define HPDET_DEBOUNCE 500 @@ -1063,10 +1068,16 @@ static irqreturn_t arizona_jackdet(int irq, void *data) if (arizona->pdata.jd_gpio5) { mask = ARIZONA_MICD_CLAMP_STS; - present = 0; + if (arizona->pdata.jd_invert) + present = ARIZONA_MICD_CLAMP_STS; + else + present = 0; } else { mask = ARIZONA_JD1_STS; - present = ARIZONA_JD1_STS; + if (arizona->pdata.jd_invert) + present = 0; + else + present = ARIZONA_JD1_STS; } ret = regmap_read(arizona->regmap, ARIZONA_AOD_IRQ_RAW_STATUS, &val); @@ -1234,6 +1245,9 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) pdata->jd_gpio5_nopull = of_property_read_bool(arizona->dev->of_node, "wlf,jd-gpio-nopull"); + pdata->jd_invert = of_property_read_bool(arizona->dev->of_node, + "wlf,jd-invert"); + arizona_of_read_u32(arizona, "wlf,gpsw", false, &pdata->gpsw); arizona_of_read_u32(arizona, "wlf,init-mic-delay", false, @@ -1264,6 +1278,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) struct arizona_pdata *pdata = &arizona->pdata; struct arizona_extcon_info *info; unsigned int val; + unsigned int clamp_mode; int jack_irq_fall, jack_irq_rise; int ret, mode, i, j; @@ -1477,15 +1492,21 @@ static int arizona_extcon_probe(struct platform_device *pdev) regmap_write(arizona->regmap, ARIZONA_GPIO5_CTRL, val); - regmap_update_bits(arizona->regmap, - ARIZONA_MICD_CLAMP_CONTROL, - ARIZONA_MICD_CLAMP_MODE_MASK, 0x9); + if (arizona->pdata.jd_invert) + clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDH_GP5H; + else + clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDL_GP5H; } else { - regmap_update_bits(arizona->regmap, - ARIZONA_MICD_CLAMP_CONTROL, - ARIZONA_MICD_CLAMP_MODE_MASK, 0x4); + if (arizona->pdata.jd_invert) + clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDH; + else + clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDL; } + regmap_update_bits(arizona->regmap, + ARIZONA_MICD_CLAMP_CONTROL, + ARIZONA_MICD_CLAMP_MODE_MASK, clamp_mode); + regmap_update_bits(arizona->regmap, ARIZONA_JACK_DETECT_DEBOUNCE, ARIZONA_MICD_CLAMP_DB, diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 449e9ada72f..981bd0ccb2d 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -134,6 +134,9 @@ struct arizona_pdata { /** Internal pull on GPIO5 is disabled when used for jack detection */ bool jd_gpio5_nopull; + /** set to true if jackdet contact opens on insert */ + bool jd_invert; + /** If non-zero don't run headphone detection, report this value */ int fixed_hpdet_imp; From fb6ac9b4a761e88c5578b218958b87fbe78633d6 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 24 Apr 2014 16:05:47 +0100 Subject: [PATCH 0333/1167] switch: arizona: support inverted jack detect switch Add pdata option for inverted jack detect switch that opens when jack is inserted. Change-Id: If5db11a61659d8a2b87e5c2ef936f723fcb3188d Signed-off-by: Richard Fitzgerald --- drivers/switch/switch-arizona.c | 37 ++++++++++++++++++++++++++------- 1 file changed, 29 insertions(+), 8 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 736298dd7e9..3f143db41e8 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -47,6 +47,11 @@ #define ARIZONA_ACCDET_MODE_ADC 7 #define ARIZONA_ACCDET_MODE_INVALID 8 +#define ARIZONA_MICD_CLAMP_MODE_JDL 0x4 +#define ARIZONA_MICD_CLAMP_MODE_JDH 0x5 +#define ARIZONA_MICD_CLAMP_MODE_JDL_GP5H 0x9 +#define ARIZONA_MICD_CLAMP_MODE_JDH_GP5H 0xb + #define ARIZONA_HPDET_MAX 10000 #define HPDET_DEBOUNCE 500 @@ -1433,10 +1438,16 @@ static irqreturn_t arizona_jackdet(int irq, void *data) if (arizona->pdata.jd_gpio5) { mask = ARIZONA_MICD_CLAMP_STS; - present = 0; + if (arizona->pdata.jd_invert) + present = ARIZONA_MICD_CLAMP_STS; + else + present = 0; } else { mask = ARIZONA_JD1_STS; - present = ARIZONA_JD1_STS; + if (arizona->pdata.jd_invert) + present = 0; + else + present = ARIZONA_JD1_STS; } ret = regmap_read(arizona->regmap, ARIZONA_AOD_IRQ_RAW_STATUS, &val); @@ -1607,6 +1618,9 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) pdata->jd_gpio5_nopull = of_property_read_bool(arizona->dev->of_node, "wlf,jd-gpio-nopull"); + pdata->jd_invert = of_property_read_bool(arizona->dev->of_node, + "wlf,jd-invert"); + arizona_of_read_u32(arizona, "wlf,gpsw", false, &pdata->gpsw); arizona_of_read_u32(arizona, "wlf,init-mic-delay", false, @@ -1643,6 +1657,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) struct arizona_pdata *pdata = &arizona->pdata; struct arizona_extcon_info *info; unsigned int val; + unsigned int clamp_mode; int jack_irq_fall, jack_irq_rise; int ret, mode, i, j; @@ -1856,15 +1871,21 @@ static int arizona_extcon_probe(struct platform_device *pdev) regmap_write(arizona->regmap, ARIZONA_GPIO5_CTRL, val); - regmap_update_bits(arizona->regmap, - ARIZONA_MICD_CLAMP_CONTROL, - ARIZONA_MICD_CLAMP_MODE_MASK, 0x9); + if (arizona->pdata.jd_invert) + clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDH_GP5H; + else + clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDL_GP5H; } else { - regmap_update_bits(arizona->regmap, - ARIZONA_MICD_CLAMP_CONTROL, - ARIZONA_MICD_CLAMP_MODE_MASK, 0x4); + if (arizona->pdata.jd_invert) + clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDH; + else + clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDL; } + regmap_update_bits(arizona->regmap, + ARIZONA_MICD_CLAMP_CONTROL, + ARIZONA_MICD_CLAMP_MODE_MASK, clamp_mode); + regmap_update_bits(arizona->regmap, ARIZONA_JACK_DETECT_DEBOUNCE, ARIZONA_MICD_CLAMP_DB, From 75d76257908f8f761f453c206c49cfbd4ea86c11 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 22 May 2014 17:33:57 +0100 Subject: [PATCH 0334/1167] regulator: arizona: update micsupp enable time for WM5102 and WM8997 Change-Id: I59c82060481d9a065ef449de648a4bbe268f2dd5 Signed-off-by: Richard Fitzgerald --- drivers/regulator/arizona-micsupp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/regulator/arizona-micsupp.c b/drivers/regulator/arizona-micsupp.c index 7a22974b94d..dd73693caac 100644 --- a/drivers/regulator/arizona-micsupp.c +++ b/drivers/regulator/arizona-micsupp.c @@ -240,7 +240,7 @@ static const struct regulator_desc arizona_micsupp = { .bypass_reg = ARIZONA_MIC_CHARGE_PUMP_1, .bypass_mask = ARIZONA_CPMIC_BYPASS, - .enable_time = 3000, + .enable_time = 6000, .owner = THIS_MODULE, }; From 7a579aa7af01ce8e57e0762dc3f662ca5a366511 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 28 Mar 2014 12:38:44 +0000 Subject: [PATCH 0335/1167] ASoC: wm5102: Add DSP virtual output mux Change-Id: I068fd7fc9732fc59f767db2feda9c560979606e4 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm5102.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 29f491a83af..21d0d523e2a 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -965,6 +965,16 @@ ARIZONA_MIXER_ENUMS(DSP1R, ARIZONA_DSP1RMIX_INPUT_1_SOURCE); ARIZONA_DSP_AUX_ENUMS(DSP1, ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE); +static const char * const wm5102_dsp_output_texts[] = { + "None", + "DSP1", +}; + +static const SOC_ENUM_SINGLE_DECL(wm5102_dsp_output_enum, 0, 0, wm5102_dsp_output_texts); + +static const struct snd_kcontrol_new wm5102_dsp_output_mux = + SOC_DAPM_ENUM_VIRT("DSP Virtual Output Mux", wm5102_dsp_output_enum); + static const char *wm5102_aec_loopback_texts[] = { "HPOUT1L", "HPOUT1R", "HPOUT2L", "HPOUT2R", "EPOUT", "SPKOUTL", "SPKOUTR", "SPKDAT1L", "SPKDAT1R", @@ -1216,6 +1226,9 @@ SND_SOC_DAPM_AIF_IN("SLIMRX8", NULL, 0, ARIZONA_DSP_WIDGETS(DSP1, "DSP1"), +SND_SOC_DAPM_VIRT_MUX_E("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, + &wm5102_dsp_output_mux, 0, 0), + SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, &wm5102_aec_loopback_mux), @@ -1314,6 +1327,8 @@ ARIZONA_MUX_WIDGETS(ISRC2INT2, "ISRC2INT2"), WM_ADSP2("DSP1", 0), +SND_SOC_DAPM_OUTPUT("DSP Virtual Output"), + SND_SOC_DAPM_OUTPUT("HPOUT1L"), SND_SOC_DAPM_OUTPUT("HPOUT1R"), SND_SOC_DAPM_OUTPUT("HPOUT2L"), @@ -1585,6 +1600,10 @@ static const struct snd_soc_dapm_route wm5102_dapm_routes[] = { ARIZONA_DSP_ROUTES("DSP1"), + { "DSP Virtual Output", NULL, "DSP Virtual Output Mux" }, + { "DSP Virtual Output Mux", "DSP1", "DSP1" }, + { "DSP Virtual Output", NULL, "SYSCLK" }, + { "AEC Loopback", "HPOUT1L", "OUT1L" }, { "AEC Loopback", "HPOUT1R", "OUT1R" }, { "HPOUT1L", NULL, "OUT1L" }, From d9cc853de80415532a95474fd639bded144fc52c Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 28 Mar 2014 13:01:17 +0000 Subject: [PATCH 0336/1167] ASoC: wm5102: Add ez2control trigger Add support for triggering the ez2ctrl_trigger() callback from WM5102. Change-Id: If31fc7171d59bbf6e21601af73aaeace9382f520 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm5102.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 21d0d523e2a..b2decedfe29 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1786,9 +1786,21 @@ static struct snd_soc_dai_driver wm5102_dai[] = { }, }; +static irqreturn_t adsp2_irq(int irq, void *data) +{ + struct wm5102_priv *wm5102 = data; + + if (wm5102->core.arizona->pdata.ez2ctrl_trigger && + wm5102->core.adsp[0].fw_id == 0x5f003) + wm5102->core.arizona->pdata.ez2ctrl_trigger(); + + return IRQ_HANDLED; +} + static int wm5102_codec_probe(struct snd_soc_codec *codec) { struct wm5102_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->core.arizona; int ret; codec->control_data = priv->core.arizona->regmap; @@ -1808,6 +1820,29 @@ static int wm5102_codec_probe(struct snd_soc_codec *codec) priv->core.arizona->dapm = &codec->dapm; + ret = arizona_request_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, + "ADSP2 interrupt 1", adsp2_irq, priv); + if (ret != 0) { + dev_err(arizona->dev, "Failed to request DSP IRQ: %d\n", ret); + return ret; + } + + ret = irq_set_irq_wake(arizona->irq, 1); + if (ret) + dev_err(arizona->dev, + "Failed to set DSP IRQ to wake source: %d\n", + ret); + + snd_soc_dapm_enable_pin(&codec->dapm, "DRC1 Signal Activity"); + ret = regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, + ARIZONA_IM_DRC1_SIG_DET_EINT2, 0); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to unmask DRC1 IRQ for DSP: %d\n", + ret); + return ret; + } + return 0; } From ef562bb04a81d981c0e6600a7774b22cd9420dd1 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 29 May 2014 10:37:59 +0100 Subject: [PATCH 0337/1167] switch: arizona: Add option to select headphone detection channel Add a pdata/DT option to select whether to use the left or the right channel for headphone detection. Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 7 +++++-- include/linux/mfd/arizona/pdata.h | 6 ++++++ 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 3f143db41e8..7c94d701bb5 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1054,7 +1054,7 @@ int arizona_micd_mic_reading(struct arizona_extcon_info *info, int val) done: pm_runtime_mark_last_busy(info->dev); - if (arizona->pdata.hpdet_moisture_imp) + if (arizona->pdata.hpdet_channel) ret = arizona_jds_set_state(info, &arizona_hpdet_right); else ret = arizona_jds_set_state(info, &arizona_hpdet_left); @@ -1085,7 +1085,7 @@ void arizona_micd_mic_timeout(struct arizona_extcon_info *info) dev_dbg(info->arizona->dev, "MICD timed out, reporting HP\n"); - if (arizona->pdata.hpdet_moisture_imp) + if (arizona->pdata.hpdet_channel) ret = arizona_jds_set_state(info, &arizona_hpdet_right); else ret = arizona_jds_set_state(info, &arizona_hpdet_left); @@ -1632,6 +1632,9 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,hpdet-moisture-imp", false, &pdata->hpdet_moisture_imp); + arizona_of_read_u32(arizona, "wlf,hpdet-channel", false, + &pdata->hpdet_channel); + return 0; } #else diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 981bd0ccb2d..1d99f74bdc7 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -158,6 +158,12 @@ struct arizona_pdata { */ int hpdet_moisture_imp; + /** + * Channel to use for headphone detection, valid values are 0 for + * left and 1 for right + */ + int hpdet_channel; + /** Use software comparison to determine mic presence */ bool micd_software_compare; From 003850e5ee19055d53d716b2843b71ce288b128b Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 30 May 2014 09:54:21 +0100 Subject: [PATCH 0338/1167] switch: arizona: Add handling for errors to detection state handlers We should abort the handler if we got a reading error. It is preferred to keep this error handling in the state handlers such that custom trigger states have the options to respond to read errors in specific ways. Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 7c94d701bb5..dc32609814d 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -816,7 +816,9 @@ static int arizona_hpdet_moisture_reading(struct arizona_extcon_info *info, { struct arizona *arizona = info->arizona; - if (val < arizona->pdata.hpdet_moisture_imp) { + if (val < 0) { + return val; + } else if (val < arizona->pdata.hpdet_moisture_imp) { arizona_jds_set_state(info, &arizona_micd_microphone); } else { dev_warn(arizona->dev, @@ -831,6 +833,9 @@ int arizona_hpdet_reading(struct arizona_extcon_info *info, int val) { struct arizona *arizona = info->arizona; + if (val < 0) + return val; + arizona->hp_impedance = val; if (arizona->pdata.hpdet_cb) @@ -938,6 +943,9 @@ int arizona_micd_button_reading(struct arizona_extcon_info *info, struct arizona *arizona = info->arizona; int lvl, i, key; + if (val < 0) + return val; + if (val & MICD_LVL_0_TO_7) { dev_dbg(arizona->dev, "Mic button detected\n"); @@ -1009,6 +1017,9 @@ int arizona_micd_mic_reading(struct arizona_extcon_info *info, int val) struct arizona *arizona = info->arizona; int ret; + if (val < 0) + return val; + /* Due to jack detect this should never happen */ if (!(val & ARIZONA_MICD_STS)) { dev_warn(arizona->dev, "Detected open circuit\n"); @@ -1100,6 +1111,9 @@ static int arizona_hpdet_acc_id_reading(struct arizona_extcon_info *info, struct arizona *arizona = info->arizona; int id_gpio = arizona->pdata.hpdet_id_gpio; + if (reading < 0) + return reading; + /* * When we're using HPDET for accessory identification we need * to take multiple measurements, step through them in sequence. From 0fb828543b8e196add56cfd958c83c52989cac8a Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 30 May 2014 10:00:24 +0100 Subject: [PATCH 0339/1167] mfd: arizona: Add DT binding for out_mono pdata Change-Id: I1ac77c8976dc6cb94e96e86942652003fefe0c94 Signed-off-by: Charles Keepax --- Documentation/devicetree/bindings/mfd/arizona.txt | 3 +++ drivers/mfd/arizona-core.c | 7 +++++++ 2 files changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 908c61dee82..44c160d77d4 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -104,6 +104,9 @@ Optional properties: specified. 0 indicates Differential, 1 indicates Single Ended and 2 indicates a digital microphone. + - wlf,out-mono : Mono bit for each output, must contain six cells if + specified. A non-zero value indicates the corresponding output is mono. + - wlf,use-jd-gpio : Use GPIO input for jack detection. - wlf,usr-jd-gpio-nopull : Internal pull on GPIO is disabled when used for jack detection. diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 23b986201c2..94f532e8760 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -808,6 +808,8 @@ static int arizona_of_get_micbias(struct arizona *arizona, static int arizona_of_get_core_pdata(struct arizona *arizona) { struct arizona_pdata *pdata = &arizona->pdata; + u32 out_mono[ARRAY_SIZE(pdata->out_mono)]; + int i; pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true); @@ -831,6 +833,11 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) arizona_of_read_u32_array(arizona, "wlf,inmode", false, pdata->inmode, ARRAY_SIZE(pdata->inmode)); + arizona_of_read_u32_array(arizona, "wlf,out-mono", false, + out_mono, ARRAY_SIZE(out_mono)); + for (i = 0; i < ARRAY_SIZE(pdata->out_mono); ++i) + pdata->out_mono[i] = !!out_mono[i]; + arizona_of_read_u32(arizona, "wlf,wm5102t-output-pwr", false, &pdata->wm5102t_output_pwr); return 0; From 7b66abf18ddf5fb2a0c60346b4653ddedf359db9 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 2 Jun 2014 10:36:22 +0100 Subject: [PATCH 0340/1167] mfd: arizona: Add additional dummy IRQ callbacks We use a dummy IRQ chip to dispatch interrupts to the two seperate IRQ domains on the Arizona devices. Currently only the enable and disable callbacks are defined however, there are some situations where additional callbacks will be used from the IRQ core, which currently results in an NULL pointer deference. Add handlers for more of the IRQ callbacks and combine these into a single function since they are all identical. Change-Id: I43e37a22b1987106f7b3f112b6214f614201d28e Signed-off-by: Charles Keepax --- drivers/mfd/arizona-irq.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index a829b2cf770..8fdf6edb065 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -144,18 +144,17 @@ static irqreturn_t arizona_irq_thread(int irq, void *data) return IRQ_HANDLED; } -static void arizona_irq_enable(struct irq_data *data) -{ -} - -static void arizona_irq_disable(struct irq_data *data) +static void arizona_irq_dummy(struct irq_data *data) { } static struct irq_chip arizona_irq_chip = { .name = "arizona", - .irq_disable = arizona_irq_disable, - .irq_enable = arizona_irq_enable, + .irq_disable = arizona_irq_dummy, + .irq_enable = arizona_irq_dummy, + .irq_ack = arizona_irq_dummy, + .irq_mask = arizona_irq_dummy, + .irq_unmask = arizona_irq_dummy, }; static int arizona_irq_map(struct irq_domain *h, unsigned int virq, From 2df64ee62df7f61bb0fc630bedd11758b6344bdf Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 3 Jun 2014 16:18:00 +0100 Subject: [PATCH 0341/1167] ASoC: arizona: Implement TDM support for Arizona devices Change-Id: Ia476af9cdde883dceb835ef9b69fe50dc00c4b28 Signed-off-by: Charles Keepax --- include/linux/mfd/arizona/core.h | 3 ++ sound/soc/codecs/arizona.c | 78 +++++++++++++++++++++++++++++--- 2 files changed, 75 insertions(+), 6 deletions(-) diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 800b8243e45..82973b22357 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -117,6 +117,9 @@ struct arizona { struct snd_soc_dapm_context *dapm; struct mutex reg_setting_lock; + + int tdm_width[ARIZONA_MAX_AIF]; + int tdm_slots[ARIZONA_MAX_AIF]; }; int arizona_clk32k_enable(struct arizona *arizona); diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index d6433b4d505..fba71d08b8d 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1487,7 +1487,10 @@ static int arizona_hw_params(struct snd_pcm_substream *substream, int base = dai->driver->base; const int *rates; int i, ret, val; + int channels = params_channels(params); int chan_limit = arizona->pdata.max_channels_clocked[dai->id - 1]; + int tdm_width = arizona->tdm_width[dai->id - 1]; + int tdm_slots = arizona->tdm_slots[dai->id - 1]; int bclk, lrclk, wl, frame, bclk_target; if (params_rate(params) % 8000) @@ -1495,18 +1498,27 @@ static int arizona_hw_params(struct snd_pcm_substream *substream, else rates = &arizona_48k_bclk_rates[0]; - bclk_target = snd_soc_params_to_bclk(params); - if (chan_limit && chan_limit < params_channels(params)) { + if (tdm_slots) { + arizona_aif_dbg(dai, "Configuring for %d %d bit TDM slots\n", + tdm_slots, tdm_width); + bclk_target = tdm_slots * tdm_width * params_rate(params); + channels = tdm_slots; + } else { + bclk_target = snd_soc_params_to_bclk(params); + } + + if (chan_limit && chan_limit < channels) { arizona_aif_dbg(dai, "Limiting to %d channels\n", chan_limit); - bclk_target /= params_channels(params); + bclk_target /= channels; bclk_target *= chan_limit; } - /* Force stereo for I2S mode */ + /* Force multiple of 2 channels for I2S mode */ val = snd_soc_read(codec, base + ARIZONA_AIF_FORMAT); - if (params_channels(params) == 1 && (val & ARIZONA_AIF1_FMT_MASK)) { + if ((channels & 1) && (val & ARIZONA_AIF1_FMT_MASK)) { arizona_aif_dbg(dai, "Forcing stereo mode\n"); - bclk_target *= 2; + bclk_target /= channels; + bclk_target *= channels + 1; } for (i = 0; i < ARRAY_SIZE(arizona_44k1_bclk_rates); i++) { @@ -1636,9 +1648,63 @@ static int arizona_set_tristate(struct snd_soc_dai *dai, int tristate) ARIZONA_AIF1_TRI, reg); } +static void arizona_set_channels_to_mask(struct snd_soc_dai *dai, + unsigned int base, + int channels, unsigned int mask) +{ + struct snd_soc_codec *codec = dai->codec; + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; + int slot, i; + + for (i = 0; i < channels; ++i) { + slot = ffs(mask) - 1; + if (slot < 0) + return; + + regmap_write(arizona->regmap, base + i, slot); + + mask &= ~(1 << slot); + } + + if (mask) + arizona_aif_warn(dai, "Too many channels in TDM mask\n"); +} + +static int arizona_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, + unsigned int rx_mask, int slots, int slot_width) +{ + struct snd_soc_codec *codec = dai->codec; + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; + int base = dai->driver->base; + int rx_max_chan = dai->driver->playback.channels_max; + int tx_max_chan = dai->driver->capture.channels_max; + + /* Only support TDM for the physical AIFs */ + if (dai->id > ARIZONA_MAX_AIF) + return -ENOTSUPP; + + if (slots == 0) { + tx_mask = (1 << tx_max_chan) - 1; + rx_mask = (1 << rx_max_chan) - 1; + } + + arizona_set_channels_to_mask(dai, base + ARIZONA_AIF_FRAME_CTRL_3, + tx_max_chan, tx_mask); + arizona_set_channels_to_mask(dai, base + ARIZONA_AIF_FRAME_CTRL_11, + rx_max_chan, rx_mask); + + arizona->tdm_width[dai->id - 1] = slot_width; + arizona->tdm_slots[dai->id - 1] = slots; + + return 0; +} + const struct snd_soc_dai_ops arizona_dai_ops = { .startup = arizona_startup, .set_fmt = arizona_set_fmt, + .set_tdm_slot = arizona_set_tdm_slot, .hw_params = arizona_hw_params, .set_sysclk = arizona_dai_set_sysclk, .set_tristate = arizona_set_tristate, From c66b6aa28730fb21e5b8f669e6aa49db7ca9252d Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 5 Jun 2014 15:16:42 +0100 Subject: [PATCH 0342/1167] mfd: arizona: zero-init the out-mono DT array The earlier change to read out_mono pdata from DT wasn't zero-initializing the array so in the event that the DT didn't contain an out-mono setting, the pdata would be filled in from garbage. Change-Id: Ie982d87a0d8eea9cb2cd8513b4331715c06279f0 Signed-off-by: Richard Fitzgerald --- drivers/mfd/arizona-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 94f532e8760..483e9c828f8 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -808,7 +808,7 @@ static int arizona_of_get_micbias(struct arizona *arizona, static int arizona_of_get_core_pdata(struct arizona *arizona) { struct arizona_pdata *pdata = &arizona->pdata; - u32 out_mono[ARRAY_SIZE(pdata->out_mono)]; + u32 out_mono[ARRAY_SIZE(pdata->out_mono)] = {0}; int i; pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true); From 8ecc886497e969f0738b7968432069753f0f47aa Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 6 Jun 2014 10:05:46 +0100 Subject: [PATCH 0343/1167] mfd: wm5102: Mark additional registers as volatile Mark some additional registers as volatile. The write sequencer control registers should not be cached, as we don't ever want their value synchronised, as this might cause a write sequence to be accidentally initiated. Additionally, the DAC_COMP registers require special preconditions to write so there values wouldn't be updated accurately during a register sync. Change-Id: If0c1aa7edb4c22a617b0d4c6a32f1fff730ea340 Signed-off-by: Charles Keepax --- drivers/mfd/wm5102-tables.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index 9885631e776..14ad8d77583 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -322,9 +322,6 @@ const struct regmap_irq_chip wm5102_irq = { static const struct reg_default wm5102_reg_default[] = { { 0x00000008, 0x0019 }, /* R8 - Ctrl IF SPI CFG 1 */ { 0x00000009, 0x0001 }, /* R9 - Ctrl IF I2C1 CFG 1 */ - { 0x00000016, 0x0000 }, /* R22 - Write Sequencer Ctrl 0 */ - { 0x00000017, 0x0000 }, /* R23 - Write Sequencer Ctrl 1 */ - { 0x00000018, 0x0000 }, /* R24 - Write Sequencer Ctrl 2 */ { 0x00000020, 0x0000 }, /* R32 - Tone Generator 1 */ { 0x00000021, 0x1000 }, /* R33 - Tone Generator 2 */ { 0x00000022, 0x0000 }, /* R34 - Tone Generator 3 */ @@ -1957,6 +1954,9 @@ static bool wm5102_volatile_register(struct device *dev, unsigned int reg) switch (reg) { case ARIZONA_SOFTWARE_RESET: case ARIZONA_DEVICE_REVISION: + case ARIZONA_WRITE_SEQUENCER_CTRL_0: + case ARIZONA_WRITE_SEQUENCER_CTRL_1: + case ARIZONA_WRITE_SEQUENCER_CTRL_2: case ARIZONA_OUTPUT_STATUS_1: case ARIZONA_RAW_OUTPUT_STATUS_1: case ARIZONA_SLIMBUS_RX_PORT_STATUS: @@ -1968,6 +1968,10 @@ static bool wm5102_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: case ARIZONA_FLL1_NCO_TEST_0: case ARIZONA_FLL2_NCO_TEST_0: + case ARIZONA_DAC_COMP_1: + case ARIZONA_DAC_COMP_2: + case ARIZONA_DAC_COMP_3: + case ARIZONA_DAC_COMP_4: case ARIZONA_FX_CTRL2: case ARIZONA_INTERRUPT_STATUS_1: case ARIZONA_INTERRUPT_STATUS_2: From 6d41e85b1d57ceeef6e678d070004cb473b29f61 Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Fri, 2 May 2014 10:58:11 +0530 Subject: [PATCH 0344/1167] ASoC: add SND_SOC_BYTES_EXT we need _EXT version for SND_SOC_BYTES so that DSPs can use this to pass data for DSP modules Signed-off-by: Vinod Koul Signed-off-by: Mark Brown (cherry picked from commit d98812082c87732b45c71d63afc6a9ba3cca3f03) Change-Id: Id73f0bb865a03bc8f044e2ff67adcd2d2a5d3c16 Signed-off-by: Charles Keepax --- include/sound/soc.h | 13 +++++++++++++ sound/soc/soc-core.c | 12 ++++++++++++ 2 files changed, 25 insertions(+) diff --git a/include/sound/soc.h b/include/sound/soc.h index 744ae2454e0..6b56453f5eb 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -253,6 +253,13 @@ {.base = xbase, .num_regs = xregs, \ .mask = xmask }) } +#define SND_SOC_BYTES_EXT(xname, xcount, xhandler_get, xhandler_put) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ + .info = snd_soc_bytes_info_ext, \ + .get = xhandler_get, .put = xhandler_put, \ + .private_value = (unsigned long)&(struct soc_bytes_ext) \ + {.max = xcount} } + #define SOC_SINGLE_XR_SX(xname, xregbase, xregcount, xnbits, \ xmin, xmax, xinvert) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ @@ -530,6 +537,8 @@ int snd_soc_bytes_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); int snd_soc_bytes_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); +int snd_soc_bytes_info_ext(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *ucontrol); int snd_soc_info_xr_sx(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo); int snd_soc_get_xr_sx(struct snd_kcontrol *kcontrol, @@ -1096,6 +1105,10 @@ struct soc_bytes { u32 mask; }; +struct soc_bytes_ext { + int max; +}; + /* multi register control */ struct soc_mreg_control { long min, max; diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index 54be9830a14..34b61789925 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -3191,6 +3191,18 @@ int snd_soc_bytes_put(struct snd_kcontrol *kcontrol, } EXPORT_SYMBOL_GPL(snd_soc_bytes_put); +int snd_soc_bytes_info_ext(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *ucontrol) +{ + struct soc_bytes_ext *params = (void *)kcontrol->private_value; + + ucontrol->type = SNDRV_CTL_ELEM_TYPE_BYTES; + ucontrol->count = params->max; + + return 0; +} +EXPORT_SYMBOL_GPL(snd_soc_bytes_info_ext); + /** * snd_soc_info_xr_sx - signed multi register info callback * @kcontrol: mreg control From c4106c03958c509607275ee65ce1adf6c29499b1 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 5 Jun 2014 16:24:17 +0100 Subject: [PATCH 0345/1167] ASoC: wm5102: Add controls to allow shaping of ultrasonic response Add controls to allow custom shaping of the ultrasonic response. This patch also allows this to be turned on/off at runtime rather than through pdata as was previously the case. Although, it should be noted that settings will not affect a currently open audio stream, they will be applied when the next audio stream is started. Change-Id: If423cbe6d16a7683d113e24a5ae37196feed4b40 Signed-off-by: Charles Keepax --- include/linux/mfd/arizona/core.h | 3 ++ include/linux/mfd/arizona/pdata.h | 3 -- sound/soc/codecs/arizona.c | 49 +++++++++++++++--------- sound/soc/codecs/wm5102.c | 62 +++++++++++++++++++++++++++++++ 4 files changed, 96 insertions(+), 21 deletions(-) diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 82973b22357..dd0dacc9eb0 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -120,6 +120,9 @@ struct arizona { int tdm_width[ARIZONA_MAX_AIF]; int tdm_slots[ARIZONA_MAX_AIF]; + + uint16_t out_comp_coeff; + uint8_t out_comp_enabled; }; int arizona_clk32k_enable(struct arizona *arizona); diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 1d99f74bdc7..68890f3f902 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -217,9 +217,6 @@ struct arizona_pdata { /** Mode for outputs */ bool out_mono[ARIZONA_MAX_OUTPUT]; - /** Provide improved ultrasonic frequency response */ - bool ultrasonic_response; - /** PDM speaker mute setting */ unsigned int spk_mute[ARIZONA_MAX_PDM_SPK]; diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index fba71d08b8d..d1654b139d6 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1411,13 +1411,34 @@ static int arizona_startup(struct snd_pcm_substream *substream, constraint); } +static void arizona_wm5102_set_dac_comp(struct snd_soc_codec *codec, + unsigned int rate) +{ + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; + + mutex_lock(&arizona->reg_setting_lock); + snd_soc_write(codec, 0x80, 0x3); + if (rate >= 176400) { + mutex_lock(&codec->mutex); + snd_soc_write(codec, ARIZONA_DAC_COMP_1, + arizona->out_comp_coeff); + snd_soc_write(codec, ARIZONA_DAC_COMP_2, + arizona->out_comp_enabled); + mutex_unlock(&codec->mutex); + } else { + snd_soc_write(codec, ARIZONA_DAC_COMP_2, 0x0); + } + snd_soc_write(codec, 0x80, 0x0); + mutex_unlock(&arizona->reg_setting_lock); +} + static int arizona_hw_params_rate(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) { struct snd_soc_codec *codec = dai->codec; struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); - struct arizona *arizona = priv->arizona; struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1]; int base = dai->driver->base; int i, sr_val; @@ -1436,25 +1457,17 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, } sr_val = i; - switch (priv->arizona->type) { - case WM5102: - if (priv->arizona->pdata.ultrasonic_response) { - mutex_lock(&arizona->reg_setting_lock); - snd_soc_write(codec, 0x80, 0x3); - if (params_rate(params) >= 176400) - snd_soc_write(codec, 0x4dd, 0x1); - else - snd_soc_write(codec, 0x4dd, 0x0); - snd_soc_write(codec, 0x80, 0x0); - mutex_unlock(&arizona->reg_setting_lock); - } - break; - default: - break; - } - switch (dai_priv->clk) { case ARIZONA_CLK_SYSCLK: + switch (priv->arizona->type) { + case WM5102: + arizona_wm5102_set_dac_comp(codec, + params_rate(params)); + break; + default: + break; + } + snd_soc_update_bits(codec, ARIZONA_SAMPLE_RATE_1, ARIZONA_SAMPLE_RATE_1_MASK, sr_val); if (base) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index b2decedfe29..e1701867755 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -624,6 +624,62 @@ static int wm5102_sysclk_ev(struct snd_soc_dapm_widget *w, return 0; } +static int wm5102_out_comp_coeff_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + uint16_t data; + + mutex_lock(&codec->mutex); + data = cpu_to_be16(arizona->out_comp_coeff); + memcpy(ucontrol->value.bytes.data, &data, sizeof(data)); + mutex_unlock(&codec->mutex); + + return 0; +} + +static int wm5102_out_comp_coeff_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + + mutex_lock(&codec->mutex); + memcpy(&arizona->out_comp_coeff, ucontrol->value.bytes.data, + sizeof(arizona->out_comp_coeff)); + arizona->out_comp_coeff = be16_to_cpu(arizona->out_comp_coeff); + mutex_unlock(&codec->mutex); + + return 0; +} + +static int wm5102_out_comp_switch_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + + mutex_lock(&codec->mutex); + ucontrol->value.integer.value[0] = arizona->out_comp_enabled; + mutex_unlock(&codec->mutex); + + return 0; +} + +static int wm5102_out_comp_switch_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + + mutex_lock(&codec->mutex); + arizona->out_comp_enabled = ucontrol->value.integer.value[0]; + mutex_unlock(&codec->mutex); + + return 0; +} + static const char *wm5102_osr_text[] = { "Low power", "Normal", "High performance", }; @@ -855,6 +911,12 @@ SOC_SINGLE_TLV("Noise Gate Threshold Volume", ARIZONA_NOISE_GATE_CONTROL, ARIZONA_NGATE_THR_SHIFT, 7, 1, ng_tlv), SOC_ENUM("Noise Gate Hold", arizona_ng_hold), +SND_SOC_BYTES_EXT("Output Compensation Coefficient", 2, + wm5102_out_comp_coeff_get, wm5102_out_comp_coeff_put), + +SOC_SINGLE_EXT("Output Compensation Switch", 0, 0, 1, 0, + wm5102_out_comp_switch_get, wm5102_out_comp_switch_put), + WM5102_NG_SRC("HPOUT1L", ARIZONA_NOISE_GATE_SELECT_1L), WM5102_NG_SRC("HPOUT1R", ARIZONA_NOISE_GATE_SELECT_1R), WM5102_NG_SRC("HPOUT2L", ARIZONA_NOISE_GATE_SELECT_2L), From 607387e6a85ed5f1962b087efe3b67a7d04ded86 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 9 Jun 2014 13:10:51 +0100 Subject: [PATCH 0346/1167] ASoC: florida: Power both channels for differential mono output On the Florida CODEC both the left and right channel must be powered when an output is being used as a mono output, although no audio is routed to the right output channel. This patch adds additional DAPM routes to link the right channel to the left in the case where an output is marked as mono. Audio must always be brought in on the left channel for mono operation. Change-Id: Iff0021cc7b9b05e985240fbb70aca7b0cad07824 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 25 +++++++++++++++++++++++++ sound/soc/codecs/arizona.h | 1 + sound/soc/codecs/florida.c | 1 + 3 files changed, 27 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index d1654b139d6..433daa27e8d 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -208,6 +208,31 @@ int arizona_init_spk(struct snd_soc_codec *codec) } EXPORT_SYMBOL_GPL(arizona_init_spk); +static const struct snd_soc_dapm_route arizona_mono_routes[] = { + { "OUT1R", NULL, "OUT1L" }, + { "OUT2R", NULL, "OUT2L" }, + { "OUT3R", NULL, "OUT3L" }, + { "OUT4R", NULL, "OUT4L" }, + { "OUT5R", NULL, "OUT5L" }, + { "OUT6R", NULL, "OUT6L" }, +}; + +int arizona_init_mono(struct snd_soc_codec *codec) +{ + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; + int i; + + for (i = 0; i < ARIZONA_MAX_OUTPUT; ++i) { + if (arizona->pdata.out_mono[i]) + snd_soc_dapm_add_routes(&codec->dapm, + &arizona_mono_routes[i], 1); + } + + return 0; +} +EXPORT_SYMBOL_GPL(arizona_init_mono); + int arizona_init_gpio(struct snd_soc_codec *codec) { struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 4148eab597a..0b6b6100ee2 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -254,6 +254,7 @@ extern int arizona_set_fll(struct arizona_fll *fll, int source, extern int arizona_init_spk(struct snd_soc_codec *codec); extern int arizona_init_gpio(struct snd_soc_codec *codec); +extern int arizona_init_mono(struct snd_soc_codec *codec); extern int arizona_init_dai(struct arizona_priv *priv, int dai); diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index ff89ce0e57c..7faf326f94a 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2016,6 +2016,7 @@ static int florida_codec_probe(struct snd_soc_codec *codec) arizona_init_spk(codec); arizona_init_gpio(codec); + arizona_init_mono(codec); ret = snd_soc_add_codec_controls(codec, wm_adsp2_fw_controls, 8); if (ret != 0) From a4e993089a714822ffe7b0e40e7843aef3dbb8fa Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 12 Jun 2014 09:20:47 +0100 Subject: [PATCH 0347/1167] regulator: arizona-ldo1: Increase enable time Recent evaluation of the device suggests that some systems might need an increased enable time, increase this to be safe. Signed-off-by: Charles Keepax --- drivers/regulator/arizona-ldo1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/regulator/arizona-ldo1.c b/drivers/regulator/arizona-ldo1.c index 0ecf0d49363..83752bec3a5 100644 --- a/drivers/regulator/arizona-ldo1.c +++ b/drivers/regulator/arizona-ldo1.c @@ -157,7 +157,7 @@ static const struct regulator_desc arizona_ldo1 = { .min_uV = 900000, .uV_step = 25000, .n_voltages = 13, - .enable_time = 500, + .enable_time = 3000, .owner = THIS_MODULE, }; From 335bda683d81f9fee4cf8813c4b9418361f8b33e Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 12 Jun 2014 09:19:28 +0100 Subject: [PATCH 0348/1167] mfd: arizona: Use memset to clear out_mono array Some compilers seem to generate a warning for the newer style C construct, switch to a memset just to be safe. Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 483e9c828f8..beadd6ccdb7 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -808,9 +808,11 @@ static int arizona_of_get_micbias(struct arizona *arizona, static int arizona_of_get_core_pdata(struct arizona *arizona) { struct arizona_pdata *pdata = &arizona->pdata; - u32 out_mono[ARRAY_SIZE(pdata->out_mono)] = {0}; + u32 out_mono[ARRAY_SIZE(pdata->out_mono)]; int i; + memset(&out_mono, 0, sizeof(out_mono)); + pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true); arizona_of_get_micd_ranges(arizona, "wlf,micd-ranges"); From b6e6384b2f3e22f2561d41fd030bbbeb06ef10e6 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 12 Jun 2014 12:53:06 +0100 Subject: [PATCH 0349/1167] switch: arizona: Restart timeouts on spurious detection events On suprious headphone and microphone detection events we stop the state timeout but never restart it. If a spurious headphone event happens during the microphone detection we might never time out. Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index dc32609814d..3fc0cc8a267 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1264,6 +1264,7 @@ static irqreturn_t arizona_hpdet_handler(int irq, void *data) break; default: dev_warn(arizona->dev, "Spurious HPDET IRQ\n"); + arizona_jds_start_timeout(info); mutex_unlock(&info->lock); return IRQ_NONE; } @@ -1303,6 +1304,7 @@ static void arizona_micd_handler(struct work_struct *work) break; default: dev_warn(arizona->dev, "Spurious MICDET IRQ\n"); + arizona_jds_start_timeout(info); mutex_unlock(&info->lock); return; } From 05aa681d206b468b60d0fc11aba12b4b5c03f204 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 13 Jun 2014 10:30:57 +0100 Subject: [PATCH 0350/1167] switch: arizona: Update hpdet_cb to include mic status It is sometime useful to know whether a microphone is connected in the machine driver. This patch folds this information in the headphone detection callback, as this will already alert the machine driver on each successful jack detection. Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 4 ++-- include/linux/mfd/arizona/pdata.h | 2 +- sound/soc/codecs/arizona.c | 2 +- sound/soc/codecs/arizona.h | 3 ++- 4 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 3fc0cc8a267..19224e3c79f 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -839,7 +839,7 @@ int arizona_hpdet_reading(struct arizona_extcon_info *info, int val) arizona->hp_impedance = val; if (arizona->pdata.hpdet_cb) - arizona->pdata.hpdet_cb(arizona->hp_impedance); + arizona->pdata.hpdet_cb(arizona->hp_impedance, info->mic); switch (arizona->type) { case WM5110: @@ -1549,7 +1549,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) /* Use a sufficiently large number to indicate open circuit */ if (arizona->pdata.hpdet_cb) { - arizona->pdata.hpdet_cb(ARIZONA_HP_Z_OPEN); + arizona->pdata.hpdet_cb(ARIZONA_HP_Z_OPEN, false); } } diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 68890f3f902..23ecc316217 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -150,7 +150,7 @@ struct arizona_pdata { int hpdet_id_gpio; /** Callback notifying HPDET result */ - void (*hpdet_cb)(unsigned int measurement); + void (*hpdet_cb)(unsigned int measurement, bool mic); /** Use HPDETL to check for moisture, this value specifies the * threshold impedance in ohms above which it will be considered diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 433daa27e8d..26755e34224 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2272,7 +2272,7 @@ int arizona_set_output_mode(struct snd_soc_codec *codec, int output, bool diff) EXPORT_SYMBOL_GPL(arizona_set_output_mode); int arizona_set_hpdet_cb(struct snd_soc_codec *codec, - void (*hpdet_cb)(unsigned int measurement)) + void (*hpdet_cb)(unsigned int measurement, bool mic)) { struct arizona *arizona = dev_get_drvdata(codec->dev->parent); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 0b6b6100ee2..d6ef6d48bf9 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -262,7 +262,8 @@ int arizona_set_output_mode(struct snd_soc_codec *codec, int output, bool diff); extern int arizona_set_hpdet_cb(struct snd_soc_codec *codec, - void (*hpdet_cb)(unsigned int measurement)); + void (*hpdet_cb)(unsigned int measurement, + bool mic)); extern int arizona_set_ez2ctrl_cb(struct snd_soc_codec *codec, void (*ez2ctrl_trigger)(void)); extern int arizona_set_custom_jd(struct snd_soc_codec *codec, From d6609ddcb2fffc0e4489b6b58e1db8418660fec4 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 13 Jun 2014 10:32:46 +0100 Subject: [PATCH 0351/1167] switch: arizona: Call hpdet_cb when we skip headphone detection Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 19224e3c79f..69f944680dc 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -720,6 +720,9 @@ int arizona_hpdet_start(struct arizona_extcon_info *info) if (info->arizona->pdata.fixed_hpdet_imp) { int imp = info->arizona->pdata.fixed_hpdet_imp; + if (arizona->pdata.hpdet_cb) + arizona->pdata.hpdet_cb(imp, info->mic); + switch (arizona->type) { case WM5110: arizona_wm5110_tune_headphone(info, imp); From 0e8f86b3e7f02faec3025fbe508dc693355e6cc0 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 13 Jun 2014 16:29:09 +0100 Subject: [PATCH 0352/1167] ASoC: florida: Power DMIC ref for active inputs On the Florida devices the DMIC ref does more than just provide a reference for the DMIC, so much be powered whenever the input is in use. Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 42 ++++++++++++++++++++++++++++++++++++++ sound/soc/codecs/arizona.h | 1 + sound/soc/codecs/florida.c | 1 + 3 files changed, 44 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 26755e34224..57491f928de 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -233,6 +233,48 @@ int arizona_init_mono(struct snd_soc_codec *codec) } EXPORT_SYMBOL_GPL(arizona_init_mono); +static const char * const arizona_dmic_refs[] = { + "MICVDD", + "MICBIAS1", + "MICBIAS2", + "MICBIAS3", +}; + +static const char * const arizona_dmic_inputs[] = { + "IN1L", + "IN1R", + "IN2L", + "IN2R", + "IN3L", + "IN3R", + "IN4L", + "IN4R", +}; + +int arizona_init_input(struct snd_soc_codec *codec) +{ + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; + struct arizona_pdata *pdata = &arizona->pdata; + int i, ret; + struct snd_soc_dapm_route routes[2]; + + memset(&routes, 0, sizeof(routes)); + + for (i = 0; i < ARRAY_SIZE(pdata->dmic_ref); ++i) { + routes[0].source = arizona_dmic_refs[pdata->dmic_ref[i]]; + routes[1].source = arizona_dmic_refs[pdata->dmic_ref[i]]; + + routes[0].sink = arizona_dmic_inputs[i * 2]; + routes[1].sink = arizona_dmic_inputs[(i * 2) + 1]; + + ret = snd_soc_dapm_add_routes(&codec->dapm, routes, 2); + } + + return 0; +} +EXPORT_SYMBOL_GPL(arizona_init_input); + int arizona_init_gpio(struct snd_soc_codec *codec) { struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index d6ef6d48bf9..e2119ac31a9 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -255,6 +255,7 @@ extern int arizona_set_fll(struct arizona_fll *fll, int source, extern int arizona_init_spk(struct snd_soc_codec *codec); extern int arizona_init_gpio(struct snd_soc_codec *codec); extern int arizona_init_mono(struct snd_soc_codec *codec); +extern int arizona_init_input(struct snd_soc_codec *codec); extern int arizona_init_dai(struct arizona_priv *priv, int dai); diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 7faf326f94a..17531d563b3 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2017,6 +2017,7 @@ static int florida_codec_probe(struct snd_soc_codec *codec) arizona_init_spk(codec); arizona_init_gpio(codec); arizona_init_mono(codec); + arizona_init_input(codec); ret = snd_soc_add_codec_controls(codec, wm_adsp2_fw_controls, 8); if (ret != 0) From 751ab8ceedabc766ad573f5b54b65b648fc89003 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 16 Jun 2014 21:47:50 +0100 Subject: [PATCH 0353/1167] switch: arizona: Seperate out mic callback from hpdet callback Change-Id: I4086baa492bd0ab21959fbeca5af70b023d9abca Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 12 +++++++++--- include/linux/mfd/arizona/pdata.h | 5 ++++- sound/soc/codecs/arizona.c | 13 ++++++++++++- sound/soc/codecs/arizona.h | 5 +++-- 4 files changed, 28 insertions(+), 7 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 69f944680dc..5f284fd8a97 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -721,7 +721,7 @@ int arizona_hpdet_start(struct arizona_extcon_info *info) int imp = info->arizona->pdata.fixed_hpdet_imp; if (arizona->pdata.hpdet_cb) - arizona->pdata.hpdet_cb(imp, info->mic); + arizona->pdata.hpdet_cb(imp); switch (arizona->type) { case WM5110: @@ -842,7 +842,7 @@ int arizona_hpdet_reading(struct arizona_extcon_info *info, int val) arizona->hp_impedance = val; if (arizona->pdata.hpdet_cb) - arizona->pdata.hpdet_cb(arizona->hp_impedance, info->mic); + arizona->pdata.hpdet_cb(arizona->hp_impedance); switch (arizona->type) { case WM5110: @@ -1079,6 +1079,9 @@ int arizona_micd_mic_reading(struct arizona_extcon_info *info, int val) arizona_extcon_report(info, BIT_HEADSET_NO_MIC); } + if (arizona->pdata.micd_cb) + arizona->pdata.micd_cb(info->mic); + return 0; } EXPORT_SYMBOL_GPL(arizona_micd_mic_reading); @@ -1552,8 +1555,11 @@ static irqreturn_t arizona_jackdet(int irq, void *data) /* Use a sufficiently large number to indicate open circuit */ if (arizona->pdata.hpdet_cb) { - arizona->pdata.hpdet_cb(ARIZONA_HP_Z_OPEN, false); + arizona->pdata.hpdet_cb(ARIZONA_HP_Z_OPEN); } + + if (arizona->pdata.micd_cb) + arizona->pdata.micd_cb(false); } out: diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 23ecc316217..424fbded8a3 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -150,7 +150,10 @@ struct arizona_pdata { int hpdet_id_gpio; /** Callback notifying HPDET result */ - void (*hpdet_cb)(unsigned int measurement, bool mic); + void (*hpdet_cb)(unsigned int measurement); + + /** Callback notifying mic presence */ + void (*micd_cb)(bool mic); /** Use HPDETL to check for moisture, this value specifies the * threshold impedance in ohms above which it will be considered diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 57491f928de..fd5a8761158 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2314,7 +2314,7 @@ int arizona_set_output_mode(struct snd_soc_codec *codec, int output, bool diff) EXPORT_SYMBOL_GPL(arizona_set_output_mode); int arizona_set_hpdet_cb(struct snd_soc_codec *codec, - void (*hpdet_cb)(unsigned int measurement, bool mic)) + void (*hpdet_cb)(unsigned int measurement)) { struct arizona *arizona = dev_get_drvdata(codec->dev->parent); @@ -2324,6 +2324,17 @@ int arizona_set_hpdet_cb(struct snd_soc_codec *codec, } EXPORT_SYMBOL_GPL(arizona_set_hpdet_cb); +int arizona_set_micd_cb(struct snd_soc_codec *codec, + void (*micd_cb)(bool mic)) +{ + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + + arizona->pdata.micd_cb = micd_cb; + + return 0; +} +EXPORT_SYMBOL_GPL(arizona_set_micd_cb); + int arizona_set_ez2ctrl_cb(struct snd_soc_codec *codec, void (*ez2ctrl_trigger)(void)) { diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index e2119ac31a9..26c25926ecb 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -263,8 +263,9 @@ int arizona_set_output_mode(struct snd_soc_codec *codec, int output, bool diff); extern int arizona_set_hpdet_cb(struct snd_soc_codec *codec, - void (*hpdet_cb)(unsigned int measurement, - bool mic)); + void (*hpdet_cb)(unsigned int measurement)); +extern int arizona_set_micd_cb(struct snd_soc_codec *codec, + void (*micd_cb)(bool mic)); extern int arizona_set_ez2ctrl_cb(struct snd_soc_codec *codec, void (*ez2ctrl_trigger)(void)); extern int arizona_set_custom_jd(struct snd_soc_codec *codec, From 6dcb88b13cd39028b289affa607ddcdd16953e41 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Fri, 20 Jun 2014 13:51:10 +0100 Subject: [PATCH 0354/1167] switch: arizona: Get state timeout ticking when we set initial state Change-Id: I3d52ada41d3c85986c60c1cd812efb429fdabe18 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 5f284fd8a97..a084d809497 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1514,6 +1514,8 @@ static irqreturn_t arizona_jackdet(int irq, void *data) else arizona_jds_set_state(info, &arizona_micd_microphone); + + arizona_jds_start_timeout(info); } else { schedule_delayed_work(&info->hpdet_work, msecs_to_jiffies(HPDET_DEBOUNCE)); From 9bf68ff8fa04c5c1072cc5bdb46ec1493251e649 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 23 Jun 2014 15:13:24 +0100 Subject: [PATCH 0355/1167] drivers: switch: Take wake lock whilst handling jack detection We want jack detection to run to completion and not be delayed by the AP suspending, if the AP were to suspend whilst we are not waiting on an IRQ the jack will not be reported until the AP resumes. This patch adds a wake lock covering the portions of jack detection were we are not waiting for an IRQ. Change-Id: I03b73afa344e69c8c786afa99883754aa92e7e3a Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 17 ++++++++++++++++- include/linux/mfd/arizona/pdata.h | 3 +++ 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index a084d809497..9e4ebc32a26 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -31,6 +31,7 @@ #include #include #include +#include #include @@ -104,6 +105,8 @@ struct arizona_extcon_info { const struct arizona_jd_state *state; struct delayed_work state_timeout_work; + + struct wake_lock detection_wake_lock; }; static const struct arizona_micd_config micd_default_modes[] = { @@ -1498,6 +1501,10 @@ static irqreturn_t arizona_jackdet(int irq, void *data) if (info->last_jackdet == present) { dev_dbg(arizona->dev, "Detected jack\n"); + if (arizona->pdata.jd_wake_time) + wake_lock_timeout(&info->detection_wake_lock, + msecs_to_jiffies(arizona->pdata.jd_wake_time)); + if (!arizona->pdata.hpdet_acc_id) { info->mic = false; info->jack_flips = 0; @@ -1662,6 +1669,9 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,hpdet-channel", false, &pdata->hpdet_channel); + arizona_of_read_u32(arizona, "wlf,jd-wake-time", false, + &pdata->jd_wake_time); + return 0; } #else @@ -1711,6 +1721,8 @@ static int arizona_extcon_probe(struct platform_device *pdev) } mutex_init(&info->lock); + wake_lock_init(&info->detection_wake_lock, WAKE_LOCK_SUSPEND, + "arizona-jack-detection"); info->arizona = arizona; info->dev = &pdev->dev; info->last_jackdet = ~(ARIZONA_MICD_CLAMP_STS | ARIZONA_JD1_STS); @@ -1753,7 +1765,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) if (ret < 0) { dev_err(arizona->dev, "extcon_dev_register() failed: %d\n", ret); - goto err; + goto err_wakelock; } info->input = devm_input_allocate_device(&pdev->dev); @@ -2022,6 +2034,8 @@ static int arizona_extcon_probe(struct platform_device *pdev) err_register: pm_runtime_disable(&pdev->dev); switch_dev_unregister(&info->edev); +err_wakelock: + wake_lock_destroy(&info->detection_wake_lock); err: return ret; } @@ -2059,6 +2073,7 @@ static int arizona_extcon_remove(struct platform_device *pdev) device_remove_file(&pdev->dev, &dev_attr_hp_impedance); switch_dev_unregister(&info->edev); + wake_lock_destroy(&info->detection_wake_lock); return 0; } diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 424fbded8a3..2e543eb43a6 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -128,6 +128,9 @@ struct arizona_pdata { */ int max_channels_clocked[ARIZONA_MAX_AIF]; + /** Time in milliseconds to keep wake lock during jack detection */ + int jd_wake_time; + /** GPIO5 is used for jack detection */ bool jd_gpio5; From 08ff6f182f1570c660ec4f1adb614058e3ccdc5c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 24 Jun 2014 16:56:27 +0100 Subject: [PATCH 0356/1167] ASoC: wm_adsp: Add locking over firmware request There seem to be some race conditions requesting multiple firmwares from the same device in an asynchronous fashion. Fix this by locking over the firmware requests. Change-Id: I9f583d0e8d005476826fd76af10d5aa8a286df85 Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 6 +++++- sound/soc/codecs/wm5102.c | 7 ++++++- sound/soc/codecs/wm_adsp.c | 8 +++++++- sound/soc/codecs/wm_adsp.h | 3 ++- 4 files changed, 20 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 17531d563b3..760d35e5e85 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -53,6 +53,8 @@ struct florida_priv { struct arizona_priv core; struct arizona_fll fll[2]; struct florida_compr compr_info; + + struct mutex fw_lock; }; static const struct wm_adsp_region florida_dsp1_regions[] = { @@ -2144,6 +2146,7 @@ static int florida_probe(struct platform_device *pdev) pdev->dev.of_node = arizona->dev->of_node; mutex_init(&florida->compr_info.lock); + mutex_init(&florida->fw_lock); florida->core.arizona = arizona; florida->core.num_inputs = 8; @@ -2161,7 +2164,8 @@ static int florida_probe(struct platform_device *pdev) florida->core.adsp[i].num_mems = ARRAY_SIZE(florida_dsp1_regions); - ret = wm_adsp2_init(&florida->core.adsp[i], false); + ret = wm_adsp2_init(&florida->core.adsp[i], false, + &florida->fw_lock); if (ret != 0) return ret; } diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index e1701867755..89389edadca 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -36,6 +36,8 @@ struct wm5102_priv { struct arizona_priv core; struct arizona_fll fll[2]; + + struct mutex fw_lock; }; static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); @@ -1965,6 +1967,8 @@ static int wm5102_probe(struct platform_device *pdev) * locate regulator supplies */ pdev->dev.of_node = arizona->dev->of_node; + mutex_init(&wm5102->fw_lock); + wm5102->core.arizona = arizona; wm5102->core.num_inputs = 6; @@ -1977,7 +1981,8 @@ static int wm5102_probe(struct platform_device *pdev) wm5102->core.adsp[0].mem = wm5102_dsp1_regions; wm5102->core.adsp[0].num_mems = ARRAY_SIZE(wm5102_dsp1_regions); - ret = wm_adsp2_init(&wm5102->core.adsp[0], true); + ret = wm_adsp2_init(&wm5102->core.adsp[0], true, + &wm5102->fw_lock); if (ret != 0) return ret; diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 379bd5cb4ab..50baa464f4d 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -841,7 +841,9 @@ static int wm_adsp_load(struct wm_adsp *dsp) dsp->firmwares[dsp->fw].file); file[PAGE_SIZE - 1] = '\0'; + mutex_lock(dsp->fw_lock); ret = request_firmware(&firmware, file, dsp->dev); + mutex_unlock(dsp->fw_lock); if (ret != 0) { adsp_err(dsp, "Failed to request '%s'\n", file); goto out; @@ -1667,7 +1669,9 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) dsp->num, dsp->firmwares[dsp->fw].file); file[PAGE_SIZE - 1] = '\0'; + mutex_lock(dsp->fw_lock); ret = request_firmware(&firmware, file, dsp->dev); + mutex_unlock(dsp->fw_lock); if (ret != 0) { adsp_warn(dsp, "Failed to request '%s'\n", file); ret = 0; @@ -2367,7 +2371,7 @@ static inline int wm_adsp_of_parse_adsp(struct wm_adsp *adsp) } #endif -int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs) +int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs, struct mutex *fw_lock) { int ret; @@ -2387,6 +2391,8 @@ int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs) INIT_WORK(&adsp->boot_work, wm_adsp2_boot_work); mutex_init(&adsp->ctl_lock); + adsp->fw_lock = fw_lock; + if (dvfs) { adsp->dvfs = devm_regulator_get(adsp->dev, "DCVDD"); if (IS_ERR(adsp->dvfs)) { diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 6df63a69226..b4175754a32 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -108,6 +108,7 @@ struct wm_adsp { int num_firmwares; struct wm_adsp_fw_defs *firmwares; + struct mutex *fw_lock; struct work_struct boot_work; }; @@ -128,7 +129,7 @@ extern const struct snd_kcontrol_new wm_adsp1_fw_controls[]; extern const struct snd_kcontrol_new wm_adsp2_fw_controls[]; int wm_adsp1_init(struct wm_adsp *adsp); -int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs); +int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs, struct mutex *fw_lock); int wm_adsp1_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, From 46cab6bc458d60adb1e872537306b23a20928dc7 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 24 Jun 2014 17:27:19 +0100 Subject: [PATCH 0357/1167] ASoC: wm_adsp: Add option to skip bin file load Change-Id: Ib18b2ff47487ba3986481802738d720913107a4d Signed-off-by: JS Park Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 50baa464f4d..a12a2a3a2da 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1657,6 +1657,10 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) struct wm_adsp_buf *buf; int tmp; + if (dsp->firmwares[dsp->fw].binfile && + !(strcmp(dsp->firmwares[dsp->fw].binfile, "None"))) + return 0; + file = kzalloc(PAGE_SIZE, GFP_KERNEL); if (file == NULL) return -ENOMEM; From 7119a6f63615980dfa90cfc0f6d8a8e593f5c647 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 25 Jun 2014 09:25:33 +0100 Subject: [PATCH 0358/1167] switch: arizona: Reset accessory detection mode to default For best performance the accessory detection mode should be left in its default state when no detection is being performed. Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 9e4ebc32a26..975f30789f5 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -800,6 +800,11 @@ void arizona_hpdet_stop(struct arizona_extcon_info *info) ARIZONA_HP_IMPEDANCE_RANGE_MASK | ARIZONA_HP_POLL, 0); + /* Reset to default mode */ + regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_MODE_MASK, 0); + arizona_extcon_do_magic(info, 0); pm_runtime_put_autosuspend(info->dev); @@ -936,6 +941,11 @@ void arizona_micd_stop(struct arizona_extcon_info *info) mutex_unlock(&arizona->reg_setting_lock); } + /* Reset to default mode */ + regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_MODE_MASK, 0); + regulator_disable(info->micvdd); pm_runtime_mark_last_busy(info->dev); From 6709017250042a4ca3c60ffb275ce44a3673eb72 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Tue, 24 Jun 2014 14:59:50 +0100 Subject: [PATCH 0359/1167] ASoC: wm_adsp: Add name as separate from filename for wm_adsp_fw_defs Change-Id: Icd2f72e318b685ad4fb0ab0fd62d2b2df8b6dce6 Signed-off-by: Nariman Poushin --- sound/soc/codecs/wm_adsp.h | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index b4175754a32..8b5e868e566 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -58,6 +58,7 @@ struct wm_adsp_fw_caps { }; struct wm_adsp_fw_defs { + const char *name; const char *file; const char *binfile; int compr_direction; From 0ac911e07a394b4298e63a30b73119b2fd5ac9eb Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Mon, 23 Jun 2014 16:44:32 +0100 Subject: [PATCH 0360/1167] ASoC: wm_adsp: Add firmware/bin file configuration through pdata Change-Id: I48aee2f40739d70b69cb8a683bd15cac5076fbf1 Signed-off-by: Nariman Poushin --- include/linux/mfd/arizona/pdata.h | 6 ++++++ sound/soc/codecs/florida.c | 8 ++++++++ sound/soc/codecs/wm5102.c | 8 ++++++++ sound/soc/codecs/wm_adsp.c | 21 +++++++++++++++++---- 4 files changed, 39 insertions(+), 4 deletions(-) diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 2e543eb43a6..35978f787d2 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -76,6 +76,8 @@ /* Treat INT_MAX impedance as open circuit */ #define ARIZONA_HP_Z_OPEN INT_MAX +#define ARIZONA_MAX_DSP 4 + struct regulator_init_data; struct arizona_jd_state; @@ -246,6 +248,10 @@ struct arizona_pdata { /** Override the normal jack detection */ const struct arizona_jd_state *custom_jd; + + struct wm_adsp_fw_defs *fw_defs[ARIZONA_MAX_DSP]; + int num_fw_defs[ARIZONA_MAX_DSP]; + }; #endif diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 760d35e5e85..22af9885eab 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2164,6 +2164,14 @@ static int florida_probe(struct platform_device *pdev) florida->core.adsp[i].num_mems = ARRAY_SIZE(florida_dsp1_regions); + if (arizona->pdata.num_fw_defs[i]) { + florida->core.adsp[i].firmwares + = arizona->pdata.fw_defs[i]; + + florida->core.adsp[i].num_firmwares + = arizona->pdata.num_fw_defs[i]; + } + ret = wm_adsp2_init(&florida->core.adsp[i], false, &florida->fw_lock); if (ret != 0) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 89389edadca..67c30deceb5 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1981,6 +1981,14 @@ static int wm5102_probe(struct platform_device *pdev) wm5102->core.adsp[0].mem = wm5102_dsp1_regions; wm5102->core.adsp[0].num_mems = ARRAY_SIZE(wm5102_dsp1_regions); + if (arizona->pdata.num_fw_defs[0]) { + wm5102->core.adsp[0].firmwares + = arizona->pdata.fw_defs[0]; + + wm5102->core.adsp[0].num_firmwares + = arizona->pdata.num_fw_defs[0]; + } + ret = wm_adsp2_init(&wm5102->core.adsp[0], true, &wm5102->fw_lock); if (ret != 0) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index a12a2a3a2da..53f5b3f8638 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2377,7 +2377,8 @@ static inline int wm_adsp_of_parse_adsp(struct wm_adsp *adsp) int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs, struct mutex *fw_lock) { - int ret; + int ret, i; + const char **ctl_names; /* * Disable the DSP memory by default when in reset for a small @@ -2427,9 +2428,21 @@ int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs, struct mutex *fw_lock) } } - if (!adsp->dev->of_node || wm_adsp_of_parse_adsp(adsp) <= 0) { - adsp->num_firmwares = WM_ADSP_NUM_FW; - adsp->firmwares = wm_adsp_fw; + if (!adsp->num_firmwares) { + if (!adsp->dev->of_node || wm_adsp_of_parse_adsp(adsp) <= 0) { + adsp->num_firmwares = WM_ADSP_NUM_FW; + adsp->firmwares = wm_adsp_fw; + } + } else { + ctl_names = devm_kzalloc(adsp->dev, + adsp->num_firmwares * sizeof(const char *), + GFP_KERNEL); + + for (i = 0; i < adsp->num_firmwares; i++) + ctl_names[i] = adsp->firmwares[i].name; + + wm_adsp_fw_enum[adsp->num - 1].max = adsp->num_firmwares; + wm_adsp_fw_enum[adsp->num - 1].texts = ctl_names; } return 0; From 13636e917bc89f755c9af7e67b261a46a9fc2ec1 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Sat, 24 May 2014 12:16:26 +0100 Subject: [PATCH 0361/1167] ASoC: wm_adsp: Use adsp_err/warn instead of dev_err/warn We have defines for adsp messages best to consistently use them. Change-Id: I682f4e9dbf930f19f3ba63341bfd126b5c6969b9 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 49 ++++++++++++++++++-------------------- 1 file changed, 23 insertions(+), 26 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 53f5b3f8638..ebb59cfa2ea 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2017,16 +2017,16 @@ static void wm_adsp2_boot_work(struct work_struct *work) ret = regmap_read(dsp->regmap, dsp->base + ADSP2_CLOCKING, &val); if (ret != 0) { - dev_err(dsp->dev, "Failed to read clocking: %d\n", ret); + adsp_err(dsp, "Failed to read clocking: %d\n", ret); return; } if ((val & ADSP2_CLK_SEL_MASK) >= 3) { ret = regulator_enable(dsp->dvfs); if (ret != 0) { - dev_err(dsp->dev, - "Failed to enable supply: %d\n", - ret); + adsp_err(dsp, + "Failed to enable supply: %d\n", + ret); return; } @@ -2034,9 +2034,9 @@ static void wm_adsp2_boot_work(struct work_struct *work) 1800000, 1800000); if (ret != 0) { - dev_err(dsp->dev, - "Failed to raise supply: %d\n", - ret); + adsp_err(dsp, + "Failed to raise supply: %d\n", + ret); return; } } @@ -2185,15 +2185,15 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, ret = regulator_set_voltage(dsp->dvfs, 1200000, 1800000); if (ret != 0) - dev_warn(dsp->dev, - "Failed to lower supply: %d\n", - ret); + adsp_warn(dsp, + "Failed to lower supply: %d\n", + ret); ret = regulator_disable(dsp->dvfs); if (ret != 0) - dev_err(dsp->dev, - "Failed to enable supply: %d\n", - ret); + adsp_err(dsp, + "Failed to enable supply: %d\n", + ret); } list_for_each_entry(ctl, &dsp->ctl_list, list) @@ -2317,9 +2317,9 @@ static int wm_adsp_of_parse_firmware(struct wm_adsp *adsp, ret = of_property_read_string(fw, "wlf,wmfw-file", &adsp->firmwares[i].file); if (ret < 0) { - dev_err(adsp->dev, - "Firmware filename missing/malformed: %d\n", - ret); + adsp_err(adsp, + "Firmware filename missing/malformed: %d\n", + ret); return ret; } @@ -2353,9 +2353,9 @@ static int wm_adsp_of_parse_adsp(struct wm_adsp *adsp) while ((core = of_get_next_child(np, core)) != NULL) { ret = of_property_read_u32(core, "reg", &addr); if (ret < 0) { - dev_err(adsp->dev, - "Failed to get ADSP base address: %d\n", - ret); + adsp_err(adsp, + "Failed to get ADSP base address: %d\n", + ret); return ret; } @@ -2402,28 +2402,25 @@ int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs, struct mutex *fw_lock) adsp->dvfs = devm_regulator_get(adsp->dev, "DCVDD"); if (IS_ERR(adsp->dvfs)) { ret = PTR_ERR(adsp->dvfs); - dev_err(adsp->dev, "Failed to get DCVDD: %d\n", ret); + adsp_err(adsp, "Failed to get DCVDD: %d\n", ret); return ret; } ret = regulator_enable(adsp->dvfs); if (ret != 0) { - dev_err(adsp->dev, "Failed to enable DCVDD: %d\n", - ret); + adsp_err(adsp, "Failed to enable DCVDD: %d\n", ret); return ret; } ret = regulator_set_voltage(adsp->dvfs, 1200000, 1800000); if (ret != 0) { - dev_err(adsp->dev, "Failed to initialise DVFS: %d\n", - ret); + adsp_err(adsp, "Failed to initialise DVFS: %d\n", ret); return ret; } ret = regulator_disable(adsp->dvfs); if (ret != 0) { - dev_err(adsp->dev, "Failed to disable DCVDD: %d\n", - ret); + adsp_err(adsp, "Failed to disable DCVDD: %d\n", ret); return ret; } } From 51eaa42816e43dfb448acc9dedc59f5b8df56799 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 1 Jul 2014 14:50:40 +0100 Subject: [PATCH 0362/1167] mfd: arizona: Set sane headphone impedance default The current default for the headphone impedance field is zero ohms which means that if no extcon driver is built in the headphones will not be enabled due to short. Provide a sane default for this field. Change-Id: I03cebf859807f0b606735af435c15c6923c0dff9 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index beadd6ccdb7..7b00860b9b2 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1406,6 +1406,12 @@ int arizona_dev_init(struct arizona *arizona) arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked", arizona_underclocked, arizona); + /** + * Give us a sane default for the headphone impedance in case the + * extcon driver is not used + */ + arizona->hp_impedance = 32; + switch (arizona->type) { case WM5102: ret = mfd_add_devices(arizona->dev, -1, wm5102_devs, From fc06f4331a4b18efa27b8f9a2b9e6a05d664ee2b Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 1 Jul 2014 15:33:42 +0100 Subject: [PATCH 0363/1167] ASoC: wm_adsp: Use vmalloc for large in driver buffer Change-Id: I8d58e2aa8f6484b2fba623d8c0dd211735c6ff56 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index ebb59cfa2ea..8ef8fa8519e 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -2740,7 +2741,7 @@ int wm_adsp_stream_alloc(struct wm_adsp *adsp, if (!adsp->capt_buf.buf) { adsp->capt_buf_size = WM_ADSP_CAPTURE_BUFFER_SIZE; - adsp->capt_buf.buf = kzalloc(adsp->capt_buf_size, GFP_KERNEL); + adsp->capt_buf.buf = vmalloc(adsp->capt_buf_size); if (!adsp->capt_buf.buf) return -ENOMEM; @@ -2785,7 +2786,7 @@ int wm_adsp_stream_alloc(struct wm_adsp *adsp, err_raw_capt_buf: kfree(adsp->raw_capt_buf); err_capt_buf: - kfree(adsp->capt_buf.buf); + vfree(adsp->capt_buf.buf); return ret; } @@ -2804,7 +2805,7 @@ int wm_adsp_stream_free(struct wm_adsp *adsp) } if (adsp->capt_buf.buf) { - kfree(adsp->capt_buf.buf); + vfree(adsp->capt_buf.buf); adsp->capt_buf.buf = NULL; } From 3fa5fe41f0cfc16666de5c138117fbe72c4aa92e Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Fri, 27 Jun 2014 12:46:38 +0100 Subject: [PATCH 0364/1167] regulator: arizona-ldo1: remove bypass functionality for WM5110/8280 WM5110/8280 devices do not support bypass mode for LDO1 so remove the bypass callbacks registered with regulator core. Change-Id: I635a893f1cbb7c76cc32886e80e0abd87d29e9a8 Signed-off-by: Nikesh Oswal --- drivers/regulator/arizona-ldo1.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/regulator/arizona-ldo1.c b/drivers/regulator/arizona-ldo1.c index 83752bec3a5..37629c1b7ac 100644 --- a/drivers/regulator/arizona-ldo1.c +++ b/drivers/regulator/arizona-ldo1.c @@ -142,8 +142,6 @@ static struct regulator_ops arizona_ldo1_ops = { .map_voltage = regulator_map_voltage_linear, .get_voltage_sel = regulator_get_voltage_sel_regmap, .set_voltage_sel = regulator_set_voltage_sel_regmap, - .get_bypass = regulator_get_bypass_regmap, - .set_bypass = regulator_set_bypass_regmap, }; static const struct regulator_desc arizona_ldo1 = { From 8753a0c141b2a16399ed496448f006eb6e8151a7 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 30 Jun 2014 16:37:14 +0100 Subject: [PATCH 0365/1167] switch: arizona: fix runtime pm calls Use pm_runtime_get_sync instead of pm_runtime_get so that we are sure that the device has resumed and we can access the registers immediately when we return from the call. Use pm_runtime_mark_last_busy just after the last register was accesed and before calling pm_runtime_put_autosuspend Change-Id: Ica6a88ff4685a0c0f32acf798667256b2d9d4c21 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 975f30789f5..c6ee793561d 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -740,7 +740,7 @@ int arizona_hpdet_start(struct arizona_extcon_info *info) } /* Make sure we keep the device enabled during the measurement */ - pm_runtime_get(info->dev); + pm_runtime_get_sync(info->dev); arizona_extcon_do_magic(info, 0x4000); @@ -807,6 +807,7 @@ void arizona_hpdet_stop(struct arizona_extcon_info *info) arizona_extcon_do_magic(info, 0); + pm_runtime_mark_last_busy(info->dev); pm_runtime_put_autosuspend(info->dev); } EXPORT_SYMBOL_GPL(arizona_hpdet_stop); @@ -879,7 +880,7 @@ int arizona_micd_start(struct arizona_extcon_info *info) int ret; /* Microphone detection can't use idle mode */ - pm_runtime_get(info->dev); + pm_runtime_get_sync(info->dev); ret = regulator_enable(info->micvdd); if (ret != 0) { From afc1ced0c592c40c633846bc7b28cddfefb56218 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 23 Jun 2014 13:08:51 +0100 Subject: [PATCH 0366/1167] regulator: arizona-micsupp: Use a core function to map voltage arizona regulator is a linear ascending regulator with 2 step sizes of 25mv and 100mv, regulator core provides a function to map such regulators. So we use a core function here instead of writing custom function. Change-Id: Ia70aa6dec6c494011f77d4583fc34421914d08ce Signed-off-by: Nikesh Oswal --- drivers/regulator/arizona-micsupp.c | 63 +---------------------------- 1 file changed, 1 insertion(+), 62 deletions(-) diff --git a/drivers/regulator/arizona-micsupp.c b/drivers/regulator/arizona-micsupp.c index dd73693caac..b0464e06601 100644 --- a/drivers/regulator/arizona-micsupp.c +++ b/drivers/regulator/arizona-micsupp.c @@ -82,67 +82,6 @@ static int arizona_micsupp_list_voltage(struct regulator_dev *rdev, } } -static int arizona_micsupp_voltage_to_sel(int min_uV, int max_uV) -{ - int selector; - - if (min_uV > 3200000) - selector = ARIZONA_MICSUPP_MAX_SELECTOR; - else - selector = DIV_ROUND_UP(min_uV - 1700000, 50000); - - return selector; -} - -static int arizona_micsupp_ext_voltage_to_sel(int min_uV, int max_uV) -{ - int selector; - - if (min_uV > 3300000) { - selector = ARIZONA_MICSUPP_RANGE2_MAX_SELECTOR; - } else if (min_uV > 1400000) { - selector = DIV_ROUND_UP(min_uV - 1400000, 100000) + - ARIZONA_MICSUPP_RANGE1_MAX_SELECTOR; - } else { - selector = DIV_ROUND_UP(min_uV - 900000, 25000); - } - - return selector; -} - -static int arizona_micsupp_map_voltage(struct regulator_dev *rdev, - int min_uV, int max_uV) -{ - struct arizona_micsupp *micsupp = rdev_get_drvdata(rdev); - unsigned int voltage; - int selector; - - switch (micsupp->arizona->type) { - case WM8280: - case WM5110: - if (min_uV < 900000) - min_uV = 900000; - - selector = arizona_micsupp_ext_voltage_to_sel(min_uV, max_uV); - break; - default: - if (min_uV < 1700000) - min_uV = 1700000; - - selector = arizona_micsupp_voltage_to_sel(min_uV, max_uV); - break; - } - - if (selector < 0) - return -EINVAL; - - voltage = arizona_micsupp_list_voltage(rdev, selector); - if (voltage < min_uV || voltage > max_uV) - return -EINVAL; - - return selector; -} - static void arizona_micsupp_check_cp(struct work_struct *work) { struct arizona_micsupp *micsupp = @@ -217,7 +156,7 @@ static struct regulator_ops arizona_micsupp_ops = { .is_enabled = regulator_is_enabled_regmap, .list_voltage = arizona_micsupp_list_voltage, - .map_voltage = arizona_micsupp_map_voltage, + .map_voltage = regulator_map_voltage_ascend, .get_voltage_sel = regulator_get_voltage_sel_regmap, .set_voltage_sel = regulator_set_voltage_sel_regmap, From 8ac93e5759ad7e8f763f658d135e1b0968b50431 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 1 Apr 2014 15:31:22 +0100 Subject: [PATCH 0367/1167] mfd: arizona: Add register bits to support the ANC block Some Arizona devices have a hardware ANC block present. This patch adds the registers necessary to configure this hardware block. Change-Id: I970dba7ab14f643c8f88e37f9b9942e60536f03b Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 185 ++++++++++++++++++++++++++ include/linux/mfd/arizona/registers.h | 54 ++++++++ 2 files changed, 239 insertions(+) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 1478527bb6d..6ab60311fa5 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -1435,6 +1435,184 @@ static const struct reg_default florida_reg_default[] = { { 0x00000EF8, 0x0000 }, /* R3832 - ISRC 3 CTRL 3 */ { 0x00000F00, 0x0000 }, /* R3840 - Clock Control */ { 0x00000F01, 0x0000 }, /* R3841 - ANC_SRC */ + { 0x00000F08, 0x001c }, /* R3848 - ANC Coefficient */ + { 0x00000F09, 0x0000 }, /* R3849 - ANC Coefficient */ + { 0x00000F0B, 0x0000 }, /* R3851 - ANC Coefficient */ + { 0x00000F0C, 0x0000 }, /* R3852 - ANC Coefficient */ + { 0x00000F0D, 0x0000 }, /* R3853 - ANC Coefficient */ + { 0x00000F0E, 0x0000 }, /* R3854 - ANC Coefficient */ + { 0x00000F0F, 0x0000 }, /* R3855 - ANC Coefficient */ + { 0x00000F10, 0x0000 }, /* R3856 - ANC Coefficient */ + { 0x00000F11, 0x0000 }, /* R3857 - ANC Coefficient */ + { 0x00000F12, 0x0000 }, /* R3858 - ANC Coefficient */ + { 0x00000F15, 0x0000 }, /* R3861 - FCL Filter Control */ + { 0x00000F17, 0x0004 }, /* R3863 - FCL ADC Reformatter Control */ + { 0x00000F18, 0x0004 }, /* R3864 - ANC Coefficient */ + { 0x00000F19, 0x0002 }, /* R3865 - ANC Coefficient */ + { 0x00000F1A, 0x0000 }, /* R3866 - ANC Coefficient */ + { 0x00000F1B, 0x0010 }, /* R3867 - ANC Coefficient */ + { 0x00000F1C, 0x0000 }, /* R3868 - ANC Coefficient */ + { 0x00000F1D, 0x0000 }, /* R3869 - ANC Coefficient */ + { 0x00000F1E, 0x0000 }, /* R3870 - ANC Coefficient */ + { 0x00000F1F, 0x0000 }, /* R3871 - ANC Coefficient */ + { 0x00000F20, 0x0000 }, /* R3872 - ANC Coefficient */ + { 0x00000F21, 0x0000 }, /* R3873 - ANC Coefficient */ + { 0x00000F22, 0x0000 }, /* R3874 - ANC Coefficient */ + { 0x00000F23, 0x0000 }, /* R3875 - ANC Coefficient */ + { 0x00000F24, 0x0000 }, /* R3876 - ANC Coefficient */ + { 0x00000F25, 0x0000 }, /* R3877 - ANC Coefficient */ + { 0x00000F26, 0x0000 }, /* R3878 - ANC Coefficient */ + { 0x00000F27, 0x0000 }, /* R3879 - ANC Coefficient */ + { 0x00000F28, 0x0000 }, /* R3880 - ANC Coefficient */ + { 0x00000F29, 0x0000 }, /* R3881 - ANC Coefficient */ + { 0x00000F2A, 0x0000 }, /* R3882 - ANC Coefficient */ + { 0x00000F2B, 0x0000 }, /* R3883 - ANC Coefficient */ + { 0x00000F2C, 0x0000 }, /* R3884 - ANC Coefficient */ + { 0x00000F2D, 0x0000 }, /* R3885 - ANC Coefficient */ + { 0x00000F2E, 0x0000 }, /* R3886 - ANC Coefficient */ + { 0x00000F2F, 0x0000 }, /* R3887 - ANC Coefficient */ + { 0x00000F30, 0x0000 }, /* R3888 - ANC Coefficient */ + { 0x00000F31, 0x0000 }, /* R3889 - ANC Coefficient */ + { 0x00000F32, 0x0000 }, /* R3890 - ANC Coefficient */ + { 0x00000F33, 0x0000 }, /* R3891 - ANC Coefficient */ + { 0x00000F34, 0x0000 }, /* R3892 - ANC Coefficient */ + { 0x00000F35, 0x0000 }, /* R3893 - ANC Coefficient */ + { 0x00000F36, 0x0000 }, /* R3894 - ANC Coefficient */ + { 0x00000F37, 0x0000 }, /* R3895 - ANC Coefficient */ + { 0x00000F38, 0x0000 }, /* R3896 - ANC Coefficient */ + { 0x00000F39, 0x0000 }, /* R3897 - ANC Coefficient */ + { 0x00000F3A, 0x0000 }, /* R3898 - ANC Coefficient */ + { 0x00000F3B, 0x0000 }, /* R3899 - ANC Coefficient */ + { 0x00000F3C, 0x0000 }, /* R3900 - ANC Coefficient */ + { 0x00000F3D, 0x0000 }, /* R3901 - ANC Coefficient */ + { 0x00000F3E, 0x0000 }, /* R3902 - ANC Coefficient */ + { 0x00000F3F, 0x0000 }, /* R3903 - ANC Coefficient */ + { 0x00000F40, 0x0000 }, /* R3904 - ANC Coefficient */ + { 0x00000F41, 0x0000 }, /* R3905 - ANC Coefficient */ + { 0x00000F42, 0x0000 }, /* R3906 - ANC Coefficient */ + { 0x00000F43, 0x0000 }, /* R3907 - ANC Coefficient */ + { 0x00000F44, 0x0000 }, /* R3908 - ANC Coefficient */ + { 0x00000F45, 0x0000 }, /* R3909 - ANC Coefficient */ + { 0x00000F46, 0x0000 }, /* R3910 - ANC Coefficient */ + { 0x00000F47, 0x0000 }, /* R3911 - ANC Coefficient */ + { 0x00000F48, 0x0000 }, /* R3912 - ANC Coefficient */ + { 0x00000F49, 0x0000 }, /* R3913 - ANC Coefficient */ + { 0x00000F4A, 0x0000 }, /* R3914 - ANC Coefficient */ + { 0x00000F4B, 0x0000 }, /* R3915 - ANC Coefficient */ + { 0x00000F4C, 0x0000 }, /* R3916 - ANC Coefficient */ + { 0x00000F4D, 0x0000 }, /* R3917 - ANC Coefficient */ + { 0x00000F4E, 0x0000 }, /* R3918 - ANC Coefficient */ + { 0x00000F4F, 0x0000 }, /* R3919 - ANC Coefficient */ + { 0x00000F50, 0x0000 }, /* R3920 - ANC Coefficient */ + { 0x00000F51, 0x0000 }, /* R3921 - ANC Coefficient */ + { 0x00000F52, 0x0000 }, /* R3922 - ANC Coefficient */ + { 0x00000F53, 0x0000 }, /* R3923 - ANC Coefficient */ + { 0x00000F54, 0x0000 }, /* R3924 - ANC Coefficient */ + { 0x00000F55, 0x0000 }, /* R3925 - ANC Coefficient */ + { 0x00000F56, 0x0000 }, /* R3926 - ANC Coefficient */ + { 0x00000F57, 0x0000 }, /* R3927 - ANC Coefficient */ + { 0x00000F58, 0x0000 }, /* R3928 - ANC Coefficient */ + { 0x00000F59, 0x0000 }, /* R3929 - ANC Coefficient */ + { 0x00000F5A, 0x0000 }, /* R3930 - ANC Coefficient */ + { 0x00000F5B, 0x0000 }, /* R3931 - ANC Coefficient */ + { 0x00000F5C, 0x0000 }, /* R3932 - ANC Coefficient */ + { 0x00000F5D, 0x0000 }, /* R3933 - ANC Coefficient */ + { 0x00000F5E, 0x0000 }, /* R3934 - ANC Coefficient */ + { 0x00000F5F, 0x0000 }, /* R3935 - ANC Coefficient */ + { 0x00000F60, 0x0000 }, /* R3936 - ANC Coefficient */ + { 0x00000F61, 0x0000 }, /* R3937 - ANC Coefficient */ + { 0x00000F62, 0x0000 }, /* R3938 - ANC Coefficient */ + { 0x00000F63, 0x0000 }, /* R3939 - ANC Coefficient */ + { 0x00000F64, 0x0000 }, /* R3940 - ANC Coefficient */ + { 0x00000F65, 0x0000 }, /* R3941 - ANC Coefficient */ + { 0x00000F66, 0x0000 }, /* R3942 - ANC Coefficient */ + { 0x00000F67, 0x0000 }, /* R3943 - ANC Coefficient */ + { 0x00000F68, 0x0000 }, /* R3944 - ANC Coefficient */ + { 0x00000F69, 0x0000 }, /* R3945 - ANC Coefficient */ + { 0x00000F70, 0x0000 }, /* R3952 - FCR Filter Control */ + { 0x00000F72, 0x0004 }, /* R3954 - FCR ADC Reformatter Control */ + { 0x00000F73, 0x0004 }, /* R3955 - ANC Coefficient */ + { 0x00000F74, 0x0002 }, /* R3956 - ANC Coefficient */ + { 0x00000F75, 0x0000 }, /* R3957 - ANC Coefficient */ + { 0x00000F76, 0x0010 }, /* R3958 - ANC Coefficient */ + { 0x00000F77, 0x0000 }, /* R3959 - ANC Coefficient */ + { 0x00000F78, 0x0000 }, /* R3960 - ANC Coefficient */ + { 0x00000F79, 0x0000 }, /* R3961 - ANC Coefficient */ + { 0x00000F7A, 0x0000 }, /* R3962 - ANC Coefficient */ + { 0x00000F7B, 0x0000 }, /* R3963 - ANC Coefficient */ + { 0x00000F7C, 0x0000 }, /* R3964 - ANC Coefficient */ + { 0x00000F7D, 0x0000 }, /* R3965 - ANC Coefficient */ + { 0x00000F7E, 0x0000 }, /* R3966 - ANC Coefficient */ + { 0x00000F7F, 0x0000 }, /* R3967 - ANC Coefficient */ + { 0x00000F80, 0x0000 }, /* R3968 - ANC Coefficient */ + { 0x00000F81, 0x0000 }, /* R3969 - ANC Coefficient */ + { 0x00000F82, 0x0000 }, /* R3970 - ANC Coefficient */ + { 0x00000F83, 0x0000 }, /* R3971 - ANC Coefficient */ + { 0x00000F84, 0x0000 }, /* R3972 - ANC Coefficient */ + { 0x00000F85, 0x0000 }, /* R3973 - ANC Coefficient */ + { 0x00000F86, 0x0000 }, /* R3974 - ANC Coefficient */ + { 0x00000F87, 0x0000 }, /* R3975 - ANC Coefficient */ + { 0x00000F88, 0x0000 }, /* R3976 - ANC Coefficient */ + { 0x00000F89, 0x0000 }, /* R3977 - ANC Coefficient */ + { 0x00000F8A, 0x0000 }, /* R3978 - ANC Coefficient */ + { 0x00000F8B, 0x0000 }, /* R3979 - ANC Coefficient */ + { 0x00000F8C, 0x0000 }, /* R3980 - ANC Coefficient */ + { 0x00000F8D, 0x0000 }, /* R3981 - ANC Coefficient */ + { 0x00000F8E, 0x0000 }, /* R3982 - ANC Coefficient */ + { 0x00000F8F, 0x0000 }, /* R3983 - ANC Coefficient */ + { 0x00000F90, 0x0000 }, /* R3984 - ANC Coefficient */ + { 0x00000F91, 0x0000 }, /* R3985 - ANC Coefficient */ + { 0x00000F92, 0x0000 }, /* R3986 - ANC Coefficient */ + { 0x00000F93, 0x0000 }, /* R3987 - ANC Coefficient */ + { 0x00000F94, 0x0000 }, /* R3988 - ANC Coefficient */ + { 0x00000F95, 0x0000 }, /* R3989 - ANC Coefficient */ + { 0x00000F96, 0x0000 }, /* R3990 - ANC Coefficient */ + { 0x00000F97, 0x0000 }, /* R3991 - ANC Coefficient */ + { 0x00000F98, 0x0000 }, /* R3992 - ANC Coefficient */ + { 0x00000F99, 0x0000 }, /* R3993 - ANC Coefficient */ + { 0x00000F9A, 0x0000 }, /* R3994 - ANC Coefficient */ + { 0x00000F9B, 0x0000 }, /* R3995 - ANC Coefficient */ + { 0x00000F9C, 0x0000 }, /* R3996 - ANC Coefficient */ + { 0x00000F9D, 0x0000 }, /* R3997 - ANC Coefficient */ + { 0x00000F9E, 0x0000 }, /* R3998 - ANC Coefficient */ + { 0x00000F9F, 0x0000 }, /* R3999 - ANC Coefficient */ + { 0x00000FA0, 0x0000 }, /* R4000 - ANC Coefficient */ + { 0x00000FA1, 0x0000 }, /* R4001 - ANC Coefficient */ + { 0x00000FA2, 0x0000 }, /* R4002 - ANC Coefficient */ + { 0x00000FA3, 0x0000 }, /* R4003 - ANC Coefficient */ + { 0x00000FA4, 0x0000 }, /* R4004 - ANC Coefficient */ + { 0x00000FA5, 0x0000 }, /* R4005 - ANC Coefficient */ + { 0x00000FA6, 0x0000 }, /* R4006 - ANC Coefficient */ + { 0x00000FA7, 0x0000 }, /* R4007 - ANC Coefficient */ + { 0x00000FA8, 0x0000 }, /* R4008 - ANC Coefficient */ + { 0x00000FA9, 0x0000 }, /* R4009 - ANC Coefficient */ + { 0x00000FAA, 0x0000 }, /* R4010 - ANC Coefficient */ + { 0x00000FAB, 0x0000 }, /* R4011 - ANC Coefficient */ + { 0x00000FAC, 0x0000 }, /* R4012 - ANC Coefficient */ + { 0x00000FAD, 0x0000 }, /* R4013 - ANC Coefficient */ + { 0x00000FAE, 0x0000 }, /* R4014 - ANC Coefficient */ + { 0x00000FAF, 0x0000 }, /* R4015 - ANC Coefficient */ + { 0x00000FB0, 0x0000 }, /* R4016 - ANC Coefficient */ + { 0x00000FB1, 0x0000 }, /* R4017 - ANC Coefficient */ + { 0x00000FB2, 0x0000 }, /* R4018 - ANC Coefficient */ + { 0x00000FB3, 0x0000 }, /* R4019 - ANC Coefficient */ + { 0x00000FB4, 0x0000 }, /* R4020 - ANC Coefficient */ + { 0x00000FB5, 0x0000 }, /* R4021 - ANC Coefficient */ + { 0x00000FB6, 0x0000 }, /* R4022 - ANC Coefficient */ + { 0x00000FB7, 0x0000 }, /* R4023 - ANC Coefficient */ + { 0x00000FB8, 0x0000 }, /* R4024 - ANC Coefficient */ + { 0x00000FB9, 0x0000 }, /* R4025 - ANC Coefficient */ + { 0x00000FBA, 0x0000 }, /* R4026 - ANC Coefficient */ + { 0x00000FBB, 0x0000 }, /* R4027 - ANC Coefficient */ + { 0x00000FBC, 0x0000 }, /* R4028 - ANC Coefficient */ + { 0x00000FBD, 0x0000 }, /* R4029 - ANC Coefficient */ + { 0x00000FBE, 0x0000 }, /* R4030 - ANC Coefficient */ + { 0x00000FBF, 0x0000 }, /* R4031 - ANC Coefficient */ + { 0x00000FC0, 0x0000 }, /* R4032 - ANC Coefficient */ + { 0x00000FC1, 0x0000 }, /* R4033 - ANC Coefficient */ + { 0x00000FC2, 0x0000 }, /* R4034 - ANC Coefficient */ + { 0x00000FC3, 0x0000 }, /* R4035 - ANC Coefficient */ + { 0x00000FC4, 0x0000 }, /* R4036 - ANC Coefficient */ { 0x00001100, 0x0010 }, /* R4352 - DSP1 Control 1 */ { 0x00001101, 0x0000 }, /* R4353 - DSP1 Clocking 1 */ { 0x00001200, 0x0010 }, /* R4608 - DSP2 Control 1 */ @@ -2512,6 +2690,13 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_CLOCK_CONTROL: case ARIZONA_ANC_SRC: case ARIZONA_DSP_STATUS: + case ARIZONA_ANC_COEFF_START ... ARIZONA_ANC_COEFF_END: + case ARIZONA_FCL_FILTER_CONTROL: + case ARIZONA_FCL_ADC_REFORMATTER_CONTROL: + case ARIZONA_FCL_COEFF_START ... ARIZONA_FCL_COEFF_END: + case ARIZONA_FCR_FILTER_CONTROL: + case ARIZONA_FCR_ADC_REFORMATTER_CONTROL: + case ARIZONA_FCR_COEFF_START ... ARIZONA_FCR_COEFF_END: case ARIZONA_DSP1_CONTROL_1: case ARIZONA_DSP1_CLOCKING_1: case ARIZONA_DSP1_STATUS_1: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 6ec8d55f126..df37fda4a47 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -1046,6 +1046,16 @@ #define ARIZONA_CLOCK_CONTROL 0xF00 #define ARIZONA_ANC_SRC 0xF01 #define ARIZONA_DSP_STATUS 0xF02 +#define ARIZONA_ANC_COEFF_START 0xF08 +#define ARIZONA_ANC_COEFF_END 0xF12 +#define ARIZONA_FCL_FILTER_CONTROL 0xF15 +#define ARIZONA_FCL_ADC_REFORMATTER_CONTROL 0xF17 +#define ARIZONA_FCL_COEFF_START 0xF18 +#define ARIZONA_FCL_COEFF_END 0xF69 +#define ARIZONA_FCR_FILTER_CONTROL 0xF70 +#define ARIZONA_FCR_ADC_REFORMATTER_CONTROL 0xF72 +#define ARIZONA_FCR_COEFF_START 0xF73 +#define ARIZONA_FCR_COEFF_END 0xFC4 #define ARIZONA_DSP1_CONTROL_1 0x1100 #define ARIZONA_DSP1_CLOCKING_1 0x1101 #define ARIZONA_DSP1_STATUS_1 0x1104 @@ -7078,6 +7088,50 @@ #define ARIZONA_ISRC3_NOTCH_ENA_SHIFT 0 /* ISRC3_NOTCH_ENA */ #define ARIZONA_ISRC3_NOTCH_ENA_WIDTH 1 /* ISRC3_NOTCH_ENA */ +/* + * R3840 (0xF00) - Clock Control + */ +#define ARIZONA_CLK_R_ENA_CLR 0x0020 /* CLK_R_ENA_CLR */ +#define ARIZONA_CLK_R_ENA_CLR_MASK 0x0020 /* CLK_R_ENA_CLR */ +#define ARIZONA_CLK_R_ENA_CLR_SHIFT 5 /* CLK_R_ENA_CLR */ +#define ARIZONA_CLK_R_ENA_CLR_WIDTH 1 /* CLK_R_ENA_CLR */ +#define ARIZONA_CLK_R_ENA_SET 0x0010 /* CLK_R_ENA_SET */ +#define ARIZONA_CLK_R_ENA_SET_MASK 0x0010 /* CLK_R_ENA_SET */ +#define ARIZONA_CLK_R_ENA_SET_SHIFT 4 /* CLK_R_ENA_SET */ +#define ARIZONA_CLK_R_ENA_SET_WIDTH 1 /* CLK_R_ENA_SET */ +#define ARIZONA_CLK_L_ENA_CLR 0x0002 /* CLK_L_ENA_CLR */ +#define ARIZONA_CLK_L_ENA_CLR_MASK 0x0002 /* CLK_L_ENA_CLR */ +#define ARIZONA_CLK_L_ENA_CLR_SHIFT 1 /* CLK_L_ENA_CLR */ +#define ARIZONA_CLK_L_ENA_CLR_WIDTH 1 /* CLK_L_ENA_CLR */ +#define ARIZONA_CLK_L_ENA_SET 0x0001 /* CLK_L_ENA_SET */ +#define ARIZONA_CLK_L_ENA_SET_MASK 0x0001 /* CLK_L_ENA_SET */ +#define ARIZONA_CLK_L_ENA_SET_SHIFT 0 /* CLK_L_ENA_SET */ +#define ARIZONA_CLK_L_ENA_SET_WIDTH 1 /* CLK_L_ENA_SET */ + +/* + * R3841 (0xF01) - ANC SRC + */ +#define ARIZONA_IN_RXANCR_SEL_MASK 0x0070 /* IN_RXANCR_SEL - [4:6] */ +#define ARIZONA_IN_RXANCR_SEL_SHIFT 4 /* IN_RXANCR_SEL - [4:6] */ +#define ARIZONA_IN_RXANCR_SEL_WIDTH 3 /* IN_RXANCR_SEL - [4:6] */ +#define ARIZONA_IN_RXANCL_SEL_MASK 0x0007 /* IN_RXANCL_SEL - [0:2] */ +#define ARIZONA_IN_RXANCL_SEL_SHIFT 0 /* IN_RXANCL_SEL - [0:2] */ +#define ARIZONA_IN_RXANCL_SEL_WIDTH 3 /* IN_RXANCL_SEL - [0:2] */ + +/* + * R3863 (0xF17) - FCL ADC Reformatter Control + */ +#define ARIZONA_FCL_MIC_MODE_SEL 0x000C /* FCL_MIC_MODE_SEL - [2:3] */ +#define ARIZONA_FCL_MIC_MODE_SEL_SHIFT 2 /* FCL_MIC_MODE_SEL - [2:3] */ +#define ARIZONA_FCL_MIC_MODE_SEL_WIDTH 2 /* FCL_MIC_MODE_SEL - [2:3] */ + +/* + * R3954 (0xF72) - FCR ADC Reformatter Control + */ +#define ARIZONA_FCR_MIC_MODE_SEL 0x000C /* FCR_MIC_MODE_SEL - [2:3] */ +#define ARIZONA_FCR_MIC_MODE_SEL_SHIFT 2 /* FCR_MIC_MODE_SEL - [2:3] */ +#define ARIZONA_FCR_MIC_MODE_SEL_WIDTH 2 /* FCR_MIC_MODE_SEL - [2:3] */ + /* * R4352 (0x1100) - DSP1 Control 1 */ From 2a170f510c778ac8c70c7e72ce1b571965345331 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 1 Apr 2014 15:31:44 +0100 Subject: [PATCH 0368/1167] ASoC: florida: Add DAPM/routing hookup for the ANC block The Florida device contains a hardware ANC block, this patch connects up controls and routing for this. Change-Id: I344e3ad76b34620a8834ce1846c17efe66d1072f Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 139 +++++++++++++++++++++++++++++++++++++ sound/soc/codecs/arizona.h | 9 +++ sound/soc/codecs/florida.c | 109 +++++++++++++++++++++++++++++ 3 files changed, 257 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index fd5a8761158..3c326306dde 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -714,6 +714,122 @@ const struct soc_enum arizona_in_dmic_osr[] = { }; EXPORT_SYMBOL_GPL(arizona_in_dmic_osr); +static const char *arizona_anc_input_src_text[] = { + "None", "IN1L", "IN1R", "IN1L + IN1R", "IN2L", "IN2R", "IN2L + IN2R", + "IN3L", "IN3R", "IN3L + IN3R", "IN4L", "IN4R", "IN4L + IN4R", +}; +static const int arizona_anc_input_src_val[] = { + 0x0000, 0x0101, 0x0201, 0x0301, 0x0102, 0x0202, 0x0302, + 0x0103, 0x0203, 0x0303, 0x0104, 0x0204, 0x0304, +}; + +int arizona_put_anc_input(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol); + struct snd_soc_dapm_widget *widget = wlist->widgets[0]; + struct snd_soc_codec *codec = widget->codec; + struct soc_enum *e = + (struct soc_enum *)kcontrol->private_value; + int sel = ucontrol->value.enumerated.item[0]; + unsigned int val, mask, shift; + + if (sel >= e->max) + return -EINVAL; + + switch (e->reg) { + case ARIZONA_FCL_ADC_REFORMATTER_CONTROL: + mask = ARIZONA_IN_RXANCL_SEL_MASK; + shift = ARIZONA_IN_RXANCL_SEL_SHIFT; + break; + case ARIZONA_FCR_ADC_REFORMATTER_CONTROL: + mask = ARIZONA_IN_RXANCR_SEL_MASK; + shift = ARIZONA_IN_RXANCR_SEL_SHIFT; + break; + default: + return -EINVAL; + } + + val = (e->values[sel] & 0xFF00) >> 8; + snd_soc_write(codec, e->reg, val << e->shift_l); + + val = (e->values[sel] & 0xFF); + snd_soc_update_bits(codec, ARIZONA_ANC_SRC, mask, val << shift); + + return snd_soc_dapm_put_enum_virt(kcontrol, ucontrol); +} +EXPORT_SYMBOL_GPL(arizona_put_anc_input); + +const struct soc_enum arizona_anc_input_src[] = { + SOC_VALUE_ENUM_SINGLE(ARIZONA_FCL_ADC_REFORMATTER_CONTROL, + ARIZONA_FCL_MIC_MODE_SEL_SHIFT, 0, + ARRAY_SIZE(arizona_anc_input_src_text), + arizona_anc_input_src_text, + arizona_anc_input_src_val), + SOC_VALUE_ENUM_SINGLE(ARIZONA_FCR_ADC_REFORMATTER_CONTROL, + ARIZONA_FCR_MIC_MODE_SEL_SHIFT, 0, + ARRAY_SIZE(arizona_anc_input_src_text), + arizona_anc_input_src_text, + arizona_anc_input_src_val), +}; +EXPORT_SYMBOL_GPL(arizona_anc_input_src); + +static const char *arizona_output_anc_src_text[] = { + "None", "RXANCL", "RXANCR", +}; + +const struct soc_enum arizona_output_anc_src[] = { + SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_1L, + ARIZONA_OUT1L_ANC_SRC_SHIFT, + ARRAY_SIZE(arizona_output_anc_src_text), + arizona_output_anc_src_text), + SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_1R, + ARIZONA_OUT1R_ANC_SRC_SHIFT, + ARRAY_SIZE(arizona_output_anc_src_text), + arizona_output_anc_src_text), + SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_2L, + ARIZONA_OUT2L_ANC_SRC_SHIFT, + ARRAY_SIZE(arizona_output_anc_src_text), + arizona_output_anc_src_text), + SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_2R, + ARIZONA_OUT2R_ANC_SRC_SHIFT, + ARRAY_SIZE(arizona_output_anc_src_text), + arizona_output_anc_src_text), + SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_3L, + ARIZONA_OUT3L_ANC_SRC_SHIFT, + ARRAY_SIZE(arizona_output_anc_src_text), + arizona_output_anc_src_text), + SOC_ENUM_SINGLE(ARIZONA_DAC_VOLUME_LIMIT_3R, + ARIZONA_OUT3R_ANC_SRC_SHIFT, + ARRAY_SIZE(arizona_output_anc_src_text), + arizona_output_anc_src_text), + SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_4L, + ARIZONA_OUT4L_ANC_SRC_SHIFT, + ARRAY_SIZE(arizona_output_anc_src_text), + arizona_output_anc_src_text), + SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_4R, + ARIZONA_OUT4R_ANC_SRC_SHIFT, + ARRAY_SIZE(arizona_output_anc_src_text), + arizona_output_anc_src_text), + SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_5L, + ARIZONA_OUT5L_ANC_SRC_SHIFT, + ARRAY_SIZE(arizona_output_anc_src_text), + arizona_output_anc_src_text), + SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_5R, + ARIZONA_OUT5R_ANC_SRC_SHIFT, + ARRAY_SIZE(arizona_output_anc_src_text), + arizona_output_anc_src_text), + SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_6L, + ARIZONA_OUT6L_ANC_SRC_SHIFT, + ARRAY_SIZE(arizona_output_anc_src_text), + arizona_output_anc_src_text), + SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_6R, + ARIZONA_OUT6R_ANC_SRC_SHIFT, + ARRAY_SIZE(arizona_output_anc_src_text), + arizona_output_anc_src_text), +}; +EXPORT_SYMBOL_GPL(arizona_output_anc_src); + static void arizona_in_set_vu(struct snd_soc_codec *codec, int ena) { struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); @@ -1116,6 +1232,29 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, } EXPORT_SYMBOL_GPL(arizona_hp_ev); +int arizona_anc_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + unsigned int mask = 0x3 << w->shift; + unsigned int val; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + val = 1 << w->shift; + break; + case SND_SOC_DAPM_PRE_PMD: + val = 1 << (w->shift + 1); + default: + return 0; + } + + snd_soc_update_bits(w->codec, ARIZONA_CLOCK_CONTROL, mask, val); + + return 0; +} +EXPORT_SYMBOL_GPL(arizona_anc_ev); + static unsigned int arizona_sysclk_48k_rates[] = { 6144000, 12288000, diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 26c25926ecb..4bbae32484c 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -210,6 +210,12 @@ extern const struct soc_enum arizona_ng_hold; extern const struct soc_enum arizona_in_hpf_cut_enum; extern const struct soc_enum arizona_in_dmic_osr[]; +extern const struct soc_enum arizona_anc_input_src[]; +extern const struct soc_enum arizona_output_anc_src[]; + +extern int arizona_put_anc_input(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); + extern int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); @@ -219,6 +225,9 @@ extern int arizona_out_ev(struct snd_soc_dapm_widget *w, extern int arizona_hp_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); +extern int arizona_anc_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event); extern int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id, int source, unsigned int freq, int dir); diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 22af9885eab..0e3295325e1 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -264,6 +264,30 @@ static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); SOC_SINGLE(name " NG SPKDAT2L Switch", base, 10, 1, 0), \ SOC_SINGLE(name " NG SPKDAT2R Switch", base, 11, 1, 0) +#define FLORIDA_RXANC_INPUT_ROUTES(widget, name) \ + { widget, NULL, name " Input" }, \ + { name " Input", "IN1L", "IN1L PGA" }, \ + { name " Input", "IN1R", "IN1R PGA" }, \ + { name " Input", "IN1L + IN1R", "IN1L PGA" }, \ + { name " Input", "IN1L + IN1R", "IN1R PGA" }, \ + { name " Input", "IN2L", "IN2L PGA" }, \ + { name " Input", "IN2R", "IN2R PGA" }, \ + { name " Input", "IN2L + IN2R", "IN2L PGA" }, \ + { name " Input", "IN2L + IN2R", "IN2R PGA" }, \ + { name " Input", "IN3L", "IN3L PGA" }, \ + { name " Input", "IN3R", "IN3R PGA" }, \ + { name " Input", "IN3L + IN3R", "IN3L PGA" }, \ + { name " Input", "IN3L + IN3R", "IN3R PGA" }, \ + { name " Input", "IN4L", "IN4L PGA" }, \ + { name " Input", "IN4R", "IN4R PGA" }, \ + { name " Input", "IN4L + IN4R", "IN4L PGA" }, \ + { name " Input", "IN4L + IN4R", "IN4R PGA" } + +#define FLORIDA_RXANC_OUTPUT_ROUTES(widget, name) \ + { widget, NULL, name " ANC Source" }, \ + { name " ANC Source", "RXANCL", "RXANCL" }, \ + { name " ANC Source", "RXANCR", "RXANCR" } + static const struct snd_kcontrol_new florida_snd_controls[] = { SOC_ENUM("IN1 OSR", arizona_in_dmic_osr[0]), SOC_ENUM("IN2 OSR", arizona_in_dmic_osr[1]), @@ -322,6 +346,18 @@ SOC_SINGLE_TLV("IN4R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_4R, SOC_ENUM("Input Ramp Up", arizona_in_vi_ramp), SOC_ENUM("Input Ramp Down", arizona_in_vd_ramp), +SND_SOC_BYTES_MASK("RXANC Config", ARIZONA_CLOCK_CONTROL, 1, + ARIZONA_CLK_R_ENA_CLR | ARIZONA_CLK_R_ENA_SET | + ARIZONA_CLK_L_ENA_CLR | ARIZONA_CLK_L_ENA_SET), +SND_SOC_BYTES("RXANC Coefficients", ARIZONA_ANC_COEFF_START, + ARIZONA_ANC_COEFF_END - ARIZONA_ANC_COEFF_START + 1), +SND_SOC_BYTES("RXANCL Config", ARIZONA_FCL_FILTER_CONTROL, 1), +SND_SOC_BYTES("RXANCL Coefficients", ARIZONA_FCL_COEFF_START, + ARIZONA_FCL_COEFF_END - ARIZONA_FCL_COEFF_START + 1), +SND_SOC_BYTES("RXANCR Config", ARIZONA_FCR_FILTER_CONTROL, 1), +SND_SOC_BYTES("RXANCR Coefficients", ARIZONA_FCR_COEFF_START, + ARIZONA_FCR_COEFF_END - ARIZONA_FCR_COEFF_START + 1), + ARIZONA_MIXER_CONTROLS("EQ1", ARIZONA_EQ1MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), @@ -711,6 +747,28 @@ static const struct soc_enum florida_aec_loopback = static const struct snd_kcontrol_new florida_aec_loopback_mux = SOC_DAPM_VALUE_ENUM("AEC Loopback", florida_aec_loopback); +static const struct snd_kcontrol_new florida_anc_input_mux[] = { + SOC_DAPM_ENUM_EXT("RXANCL Input", arizona_anc_input_src[0], + snd_soc_dapm_get_enum_virt, arizona_put_anc_input), + SOC_DAPM_ENUM_EXT("RXANCR Input", arizona_anc_input_src[1], + snd_soc_dapm_get_enum_virt, arizona_put_anc_input), +}; + +static const struct snd_kcontrol_new florida_output_anc_src[] = { + SOC_DAPM_ENUM("HPOUT1L ANC Source", arizona_output_anc_src[0]), + SOC_DAPM_ENUM("HPOUT1R ANC Source", arizona_output_anc_src[1]), + SOC_DAPM_ENUM("HPOUT2L ANC Source", arizona_output_anc_src[2]), + SOC_DAPM_ENUM("HPOUT2R ANC Source", arizona_output_anc_src[3]), + SOC_DAPM_ENUM("HPOUT3L ANC Source", arizona_output_anc_src[4]), + SOC_DAPM_ENUM("HPOUT3R ANC Source", arizona_output_anc_src[5]), + SOC_DAPM_ENUM("SPKOUTL ANC Source", arizona_output_anc_src[6]), + SOC_DAPM_ENUM("SPKOUTR ANC Source", arizona_output_anc_src[7]), + SOC_DAPM_ENUM("SPKDAT1L ANC Source", arizona_output_anc_src[8]), + SOC_DAPM_ENUM("SPKDAT1R ANC Source", arizona_output_anc_src[9]), + SOC_DAPM_ENUM("SPKDAT2L ANC Source", arizona_output_anc_src[10]), + SOC_DAPM_ENUM("SPKDAT2R ANC Source", arizona_output_anc_src[11]), +}; + static const struct snd_soc_dapm_widget florida_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT, 0, florida_sysclk_ev, SND_SOC_DAPM_POST_PMU), @@ -897,6 +955,41 @@ SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, &florida_aec_loopback_mux), +SND_SOC_DAPM_MUX("RXANCL Input", SND_SOC_NOPM, 0, 0, &florida_anc_input_mux[0]), +SND_SOC_DAPM_MUX("RXANCR Input", SND_SOC_NOPM, 0, 0, &florida_anc_input_mux[1]), + +SND_SOC_DAPM_PGA_E("RXANCL", SND_SOC_NOPM, ARIZONA_CLK_L_ENA_SET_SHIFT, + 0, NULL, 0, arizona_anc_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), +SND_SOC_DAPM_PGA_E("RXANCR", SND_SOC_NOPM, ARIZONA_CLK_R_ENA_SET_SHIFT, + 0, NULL, 0, arizona_anc_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), + +SND_SOC_DAPM_MUX("HPOUT1L ANC Source", SND_SOC_NOPM, 0, 0, + &florida_output_anc_src[0]), +SND_SOC_DAPM_MUX("HPOUT1R ANC Source", SND_SOC_NOPM, 0, 0, + &florida_output_anc_src[1]), +SND_SOC_DAPM_MUX("HPOUT2L ANC Source", SND_SOC_NOPM, 0, 0, + &florida_output_anc_src[2]), +SND_SOC_DAPM_MUX("HPOUT2R ANC Source", SND_SOC_NOPM, 0, 0, + &florida_output_anc_src[3]), +SND_SOC_DAPM_MUX("HPOUT3L ANC Source", SND_SOC_NOPM, 0, 0, + &florida_output_anc_src[4]), +SND_SOC_DAPM_MUX("HPOUT3R ANC Source", SND_SOC_NOPM, 0, 0, + &florida_output_anc_src[5]), +SND_SOC_DAPM_MUX("SPKOUTL ANC Source", SND_SOC_NOPM, 0, 0, + &florida_output_anc_src[6]), +SND_SOC_DAPM_MUX("SPKOUTR ANC Source", SND_SOC_NOPM, 0, 0, + &florida_output_anc_src[7]), +SND_SOC_DAPM_MUX("SPKDAT1L ANC Source", SND_SOC_NOPM, 0, 0, + &florida_output_anc_src[8]), +SND_SOC_DAPM_MUX("SPKDAT1R ANC Source", SND_SOC_NOPM, 0, 0, + &florida_output_anc_src[9]), +SND_SOC_DAPM_MUX("SPKDAT2L ANC Source", SND_SOC_NOPM, 0, 0, + &florida_output_anc_src[10]), +SND_SOC_DAPM_MUX("SPKDAT2R ANC Source", SND_SOC_NOPM, 0, 0, + &florida_output_anc_src[11]), + SND_SOC_DAPM_AIF_OUT("AIF1TX1", NULL, 0, ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX1_ENA_SHIFT, 0), SND_SOC_DAPM_AIF_OUT("AIF1TX2", NULL, 0, @@ -1574,6 +1667,22 @@ static const struct snd_soc_dapm_route florida_dapm_routes[] = { { "SPKDAT2L", NULL, "OUT6L" }, { "SPKDAT2R", NULL, "OUT6R" }, + FLORIDA_RXANC_INPUT_ROUTES("RXANCL", "RXANCL"), + FLORIDA_RXANC_INPUT_ROUTES("RXANCR", "RXANCR"), + + FLORIDA_RXANC_OUTPUT_ROUTES("OUT1L", "HPOUT1L"), + FLORIDA_RXANC_OUTPUT_ROUTES("OUT1R", "HPOUT1R"), + FLORIDA_RXANC_OUTPUT_ROUTES("OUT2L", "HPOUT2L"), + FLORIDA_RXANC_OUTPUT_ROUTES("OUT2R", "HPOUT2R"), + FLORIDA_RXANC_OUTPUT_ROUTES("OUT3L", "HPOUT3L"), + FLORIDA_RXANC_OUTPUT_ROUTES("OUT3R", "HPOUT3R"), + FLORIDA_RXANC_OUTPUT_ROUTES("OUT4L", "SPKOUTL"), + FLORIDA_RXANC_OUTPUT_ROUTES("OUT4R", "SPKOUTR"), + FLORIDA_RXANC_OUTPUT_ROUTES("OUT5L", "SPKDAT1L"), + FLORIDA_RXANC_OUTPUT_ROUTES("OUT5R", "SPKDAT1R"), + FLORIDA_RXANC_OUTPUT_ROUTES("OUT6L", "SPKDAT2L"), + FLORIDA_RXANC_OUTPUT_ROUTES("OUT6R", "SPKDAT2R"), + { "MICSUPP", NULL, "SYSCLK" }, { "DRC1 Signal Activity", NULL, "DRC1L" }, From ac3674a72b3d2c83c2feba905a8d42c256e14e96 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 25 Jun 2014 13:37:45 +0100 Subject: [PATCH 0369/1167] ASoC: arizona: Do not test ratio zero as it is not a valid setting Change-Id: I654a8b5fa07980875138abad07ed1b264ac808a2 Reported-by: Ryo Tsutsui Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 3c326306dde..a83702b69ca 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2083,7 +2083,7 @@ static int arizona_calc_fratio(struct arizona_fll *fll, } } - for (ratio = init_ratio - 1; ratio >= 0; ratio--) { + for (ratio = init_ratio - 1; ratio > 0; ratio--) { if (ARIZONA_FLL_VCO_CORNER / (fll->vco_mult * ratio) < Fref) break; From 71c0d68f584aee8f1ccf37798dd6748b294ff1b7 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 25 Jun 2014 13:31:07 +0100 Subject: [PATCH 0370/1167] ASoC: arizona: Correct checking of FLL ratio limitations The check to ensure the Fref frequency is within the bounds for the current ratio, was placed in the wrong loop. The initial configuration will always be valid and the loop lowering the ratio will only reinforce this validity. The check should be on the loop increasing the ratio. This could on occasion cause an invalid ratio/Fref combination to be selected. Change-Id: Ia7103d06c84ddd54c5a405cc6426ddde4629e739 Reported-by: Ryo Tsutsui Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index a83702b69ca..caf6d28a5de 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2076,6 +2076,10 @@ static int arizona_calc_fratio(struct arizona_fll *fll, while (div <= ARIZONA_FLL_MAX_REFDIV) { for (ratio = init_ratio; ratio <= ARIZONA_FLL_MAX_FRATIO; ratio++) { + if (ARIZONA_FLL_VCO_CORNER / (fll->vco_mult * ratio) < + Fref) + break; + if (target % (ratio * Fref)) { cfg->refdiv = refdiv; cfg->fratio = ratio - 1; @@ -2084,10 +2088,6 @@ static int arizona_calc_fratio(struct arizona_fll *fll, } for (ratio = init_ratio - 1; ratio > 0; ratio--) { - if (ARIZONA_FLL_VCO_CORNER / (fll->vco_mult * ratio) < - Fref) - break; - if (target % (ratio * Fref)) { cfg->refdiv = refdiv; cfg->fratio = ratio - 1; From a0780c3833e6c37d19c75c2207b7aa2131c33121 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 25 Jun 2014 10:39:51 +0100 Subject: [PATCH 0371/1167] ASoC: arizona: Correct relationship between VCO corner and Fref When configuring the FLL we must ensure that the reference clock passed to the FLL is under a certain limit. This limit was specified incorrectly in the current code, this patch corrects this. Although the error will only be encountered in some edge cases. Change-Id: I8fe58e97b9e02dba62416429ce684e54dae56e29 Reported-by: Ryo Tsutsui Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index caf6d28a5de..f65a5631382 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2076,8 +2076,8 @@ static int arizona_calc_fratio(struct arizona_fll *fll, while (div <= ARIZONA_FLL_MAX_REFDIV) { for (ratio = init_ratio; ratio <= ARIZONA_FLL_MAX_FRATIO; ratio++) { - if (ARIZONA_FLL_VCO_CORNER / (fll->vco_mult * ratio) < - Fref) + if ((ARIZONA_FLL_VCO_CORNER / 2) / + (fll->vco_mult * ratio) < Fref) break; if (target % (ratio * Fref)) { From 7c6f6177cd3a634bad6a58bb09e07558db916913 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 7 Jul 2014 14:43:56 +0100 Subject: [PATCH 0372/1167] ASoC: arizona: Coding standards, remove unneeded brackets Change-Id: Id4ecff25cf1ea0a1a8c02872fc452db5c346ad7a Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index f65a5631382..70a24a6d551 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2365,11 +2365,10 @@ int arizona_set_fll(struct arizona_fll *fll, int source, fll->sync_freq = Fref; fll->fout = Fout; - if (Fout) { + if (Fout) arizona_enable_fll(fll); - } else { + else arizona_disable_fll(fll); - } return 0; } From 2d94bc57ac58a2b6e9b02c15961b156b42e718d8 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 8 Jul 2014 09:34:26 +0100 Subject: [PATCH 0373/1167] ASoC: arizona: Correct return value of arizona_is_enabled_fll arizona_is_enabled_fll currently returns a bool, but can throw an error. The error will be basically ignored and we will treat the FLL as already on. This patch changes the return to be an int and adds error code to propagate the error up to the callback. Change-Id: I8680122f602e593e1cfa5e0ad012ba40d514cd58 Reported-by: Anil Kumar Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 26 ++++++++++++++++---------- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 70a24a6d551..d353b76826d 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2214,7 +2214,7 @@ static void arizona_apply_fll(struct arizona *arizona, unsigned int base, ARIZONA_FLL1_CTRL_UPD | cfg->n); } -static bool arizona_is_enabled_fll(struct arizona_fll *fll) +static int arizona_is_enabled_fll(struct arizona_fll *fll) { struct arizona *arizona = fll->arizona; unsigned int reg; @@ -2230,13 +2230,17 @@ static bool arizona_is_enabled_fll(struct arizona_fll *fll) return reg & ARIZONA_FLL1_ENA; } -static void arizona_enable_fll(struct arizona_fll *fll) +static int arizona_enable_fll(struct arizona_fll *fll) { struct arizona *arizona = fll->arizona; int ret; bool use_sync = false; + int already_enabled = arizona_is_enabled_fll(fll); struct arizona_fll_cfg cfg; + if (already_enabled < 0) + return already_enabled; + /* * If we have both REFCLK and SYNCCLK then enable both, * otherwise apply the SYNCCLK settings to REFCLK. @@ -2264,7 +2268,7 @@ static void arizona_enable_fll(struct arizona_fll *fll) ARIZONA_FLL1_SYNC_ENA, 0); } else { arizona_fll_err(fll, "No clocks provided\n"); - return; + return -EINVAL; } /* @@ -2278,7 +2282,7 @@ static void arizona_enable_fll(struct arizona_fll *fll) regmap_update_bits(arizona->regmap, fll->base + 0x17, ARIZONA_FLL1_SYNC_BW, ARIZONA_FLL1_SYNC_BW); - if (!arizona_is_enabled_fll(fll)) + if (!already_enabled) pm_runtime_get(arizona->dev); /* Clear any pending completions */ @@ -2297,6 +2301,8 @@ static void arizona_enable_fll(struct arizona_fll *fll) msecs_to_jiffies(250)); if (ret == 0) arizona_fll_warn(fll, "Timed out waiting for lock\n"); + + return 0; } static void arizona_disable_fll(struct arizona_fll *fll) @@ -2318,7 +2324,7 @@ static void arizona_disable_fll(struct arizona_fll *fll) int arizona_set_fll_refclk(struct arizona_fll *fll, int source, unsigned int Fref, unsigned int Fout) { - int ret; + int ret = 0; if (fll->ref_src == source && fll->ref_freq == Fref) return 0; @@ -2333,17 +2339,17 @@ int arizona_set_fll_refclk(struct arizona_fll *fll, int source, fll->ref_freq = Fref; if (fll->fout && Fref > 0) { - arizona_enable_fll(fll); + ret = arizona_enable_fll(fll); } - return 0; + return ret; } EXPORT_SYMBOL_GPL(arizona_set_fll_refclk); int arizona_set_fll(struct arizona_fll *fll, int source, unsigned int Fref, unsigned int Fout) { - int ret; + int ret = 0; if (fll->sync_src == source && fll->sync_freq == Fref && fll->fout == Fout) @@ -2366,11 +2372,11 @@ int arizona_set_fll(struct arizona_fll *fll, int source, fll->fout = Fout; if (Fout) - arizona_enable_fll(fll); + ret = arizona_enable_fll(fll); else arizona_disable_fll(fll); - return 0; + return ret; } EXPORT_SYMBOL_GPL(arizona_set_fll); From a5a2c763cc2d5b90bded195833ede6930ca04ce5 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 7 Jul 2014 14:40:47 +0100 Subject: [PATCH 0374/1167] ASoC: arizona: FLL freerun only required whilst disabling The FLL freerun is only required whilst we disable the FLL not the entire time the FLL is disabled. This patch moves the FLL freerun disable from the enable sequence to the disable sequence. Change-Id: Id283cd579b5c7ae81abefdf6ff555ebb5b506dd8 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index d353b76826d..0b0a5d955de 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2288,8 +2288,6 @@ static int arizona_enable_fll(struct arizona_fll *fll) /* Clear any pending completions */ try_wait_for_completion(&fll->ok); - regmap_update_bits(arizona->regmap, fll->base + 1, - ARIZONA_FLL1_FREERUN, 0); regmap_update_bits(arizona->regmap, fll->base + 1, ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA); if (use_sync) @@ -2316,6 +2314,8 @@ static void arizona_disable_fll(struct arizona_fll *fll) ARIZONA_FLL1_ENA, 0, &change); regmap_update_bits(arizona->regmap, fll->base + 0x11, ARIZONA_FLL1_SYNC_ENA, 0); + regmap_update_bits(arizona->regmap, fll->base + 1, + ARIZONA_FLL1_FREERUN, 0); if (change) pm_runtime_put_autosuspend(arizona->dev); From c0b8876179fe0c158d6d86a5f82c0d9b1dcfcc66 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 7 Jul 2014 14:37:38 +0100 Subject: [PATCH 0375/1167] ASoC: arizona: Update handling for input change on an active FLL Currently, the driver places no restrictions on changes that can be applied to an active FLL. However, it is only possible to change the input for an active FLL, to change the output the FLL should be stopped and then recofigured. This patch disallows changes in output frequency and adds some additional handling to ensure the output remains consistent across an input transitiion. Change-Id: Ifb6173ba13ebd2e82f373bb94af0d23422778660 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 0b0a5d955de..39f44a9f854 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1997,6 +1997,12 @@ static int arizona_validate_fll(struct arizona_fll *fll, { unsigned int Fvco_min; + if (fll->fout && Fout != fll->fout) { + arizona_fll_err(fll, + "Can't change output on active FLL\n"); + return -EINVAL; + } + if (Fref / ARIZONA_FLL_MAX_REFDIV > ARIZONA_FLL_MAX_FREF) { arizona_fll_err(fll, "Can't scale %dMHz in to <=13.5MHz\n", @@ -2241,6 +2247,14 @@ static int arizona_enable_fll(struct arizona_fll *fll) if (already_enabled < 0) return already_enabled; + if (already_enabled) { + /* Facilitate smooth refclk across the transition */ + regmap_update_bits(fll->arizona->regmap, fll->base + 0x7, + ARIZONA_FLL1_GAIN_MASK, 0); + regmap_update_bits(fll->arizona->regmap, fll->base + 1, + ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN); + } + /* * If we have both REFCLK and SYNCCLK then enable both, * otherwise apply the SYNCCLK settings to REFCLK. @@ -2295,6 +2309,10 @@ static int arizona_enable_fll(struct arizona_fll *fll) ARIZONA_FLL1_SYNC_ENA, ARIZONA_FLL1_SYNC_ENA); + if (already_enabled) + regmap_update_bits(arizona->regmap, fll->base + 1, + ARIZONA_FLL1_FREERUN, 0); + ret = wait_for_completion_timeout(&fll->ok, msecs_to_jiffies(250)); if (ret == 0) From 06f120148a597e7c84eb9c421b93a787b10fc0df Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 9 Jul 2014 13:18:09 +0100 Subject: [PATCH 0376/1167] ASoC: arizona: Move chip type check into arizona_wm5102_set_dac_comp In preparation for more refactoring move the check for the chip type into arizona_wm5102_set_dac_comp. Change-Id: I76d448adde2ac66abbc5b7e2f681e3d77567489e Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 39f44a9f854..b37c9e1acdc 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1623,6 +1623,13 @@ static void arizona_wm5102_set_dac_comp(struct snd_soc_codec *codec, struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->arizona; + switch (arizona->type) { + case WM5102: + break; + default: + return; + } + mutex_lock(&arizona->reg_setting_lock); snd_soc_write(codec, 0x80, 0x3); if (rate >= 176400) { @@ -1665,14 +1672,7 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, switch (dai_priv->clk) { case ARIZONA_CLK_SYSCLK: - switch (priv->arizona->type) { - case WM5102: - arizona_wm5102_set_dac_comp(codec, - params_rate(params)); - break; - default: - break; - } + arizona_wm5102_set_dac_comp(codec, params_rate(params)); snd_soc_update_bits(codec, ARIZONA_SAMPLE_RATE_1, ARIZONA_SAMPLE_RATE_1_MASK, sr_val); From 7156e1352c9f4642f5342b5614924ea75a3b719a Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 9 Jul 2014 13:25:23 +0100 Subject: [PATCH 0377/1167] mfd: arizona: Add ASYNC_SAMPLE_RATE_2 registers Some arizona devices have a second asynchronous sample rate, add the registers necessary to support this. Change-Id: I86ea8f3c7a604629a7d6bca5d32f978a03420dd9 Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 4 ++++ drivers/mfd/wm5102-tables.c | 3 +++ include/linux/mfd/arizona/registers.h | 28 +++++++++++++++++++++------ sound/soc/codecs/arizona.c | 2 +- 4 files changed, 30 insertions(+), 7 deletions(-) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 6ab60311fa5..69713e5a757 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -490,6 +490,7 @@ static const struct reg_default florida_reg_default[] = { { 0x00000104, 0x0011 }, /* R260 - Sample rate 3 */ { 0x00000112, 0x0305 }, /* R274 - Async clock 1 */ { 0x00000113, 0x0011 }, /* R275 - Async sample rate 1 */ + { 0x00000114, 0x0011 }, /* R276 - Async sample rate 2 */ { 0x00000149, 0x0000 }, /* R329 - Output system clock */ { 0x0000014A, 0x0000 }, /* R330 - Output async clock */ { 0x00000152, 0x0000 }, /* R338 - Rate Estimator 1 */ @@ -1736,6 +1737,8 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_ASYNC_CLOCK_1: case ARIZONA_ASYNC_SAMPLE_RATE_1: case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: + case ARIZONA_ASYNC_SAMPLE_RATE_2: + case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: case ARIZONA_OUTPUT_SYSTEM_CLOCK: case ARIZONA_OUTPUT_ASYNC_CLOCK: case ARIZONA_RATE_ESTIMATOR_1: @@ -2833,6 +2836,7 @@ static bool florida_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_SAMPLE_RATE_2_STATUS: case ARIZONA_SAMPLE_RATE_3_STATUS: case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: + case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: case ARIZONA_MIC_DETECT_3: case ARIZONA_MIC_DETECT_4: case ARIZONA_HEADPHONE_DETECT_2: diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index 14ad8d77583..cf0a95d48dc 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -1134,6 +1134,8 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_ASYNC_CLOCK_1: case ARIZONA_ASYNC_SAMPLE_RATE_1: case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: + case ARIZONA_ASYNC_SAMPLE_RATE_2: + case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: case ARIZONA_OUTPUT_SYSTEM_CLOCK: case ARIZONA_OUTPUT_ASYNC_CLOCK: case ARIZONA_RATE_ESTIMATOR_1: @@ -1966,6 +1968,7 @@ static bool wm5102_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_SAMPLE_RATE_3_STATUS: case ARIZONA_HAPTICS_STATUS: case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: + case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: case ARIZONA_FLL1_NCO_TEST_0: case ARIZONA_FLL2_NCO_TEST_0: case ARIZONA_DAC_COMP_1: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index df37fda4a47..3402b5597cf 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -70,7 +70,9 @@ #define ARIZONA_SAMPLE_RATE_3_STATUS 0x10C #define ARIZONA_ASYNC_CLOCK_1 0x112 #define ARIZONA_ASYNC_SAMPLE_RATE_1 0x113 +#define ARIZONA_ASYNC_SAMPLE_RATE_2 0x114 #define ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS 0x11B +#define ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS 0x11C #define ARIZONA_OUTPUT_SYSTEM_CLOCK 0x149 #define ARIZONA_OUTPUT_ASYNC_CLOCK 0x14A #define ARIZONA_RATE_ESTIMATOR_1 0x152 @@ -1684,16 +1686,30 @@ /* * R275 (0x113) - Async sample rate 1 */ -#define ARIZONA_ASYNC_SAMPLE_RATE_MASK 0x001F /* ASYNC_SAMPLE_RATE - [4:0] */ -#define ARIZONA_ASYNC_SAMPLE_RATE_SHIFT 0 /* ASYNC_SAMPLE_RATE - [4:0] */ -#define ARIZONA_ASYNC_SAMPLE_RATE_WIDTH 5 /* ASYNC_SAMPLE_RATE - [4:0] */ +#define ARIZONA_ASYNC_SAMPLE_RATE_1_MASK 0x001F /* ASYNC_SAMPLE_RATE_1 - [4:0] */ +#define ARIZONA_ASYNC_SAMPLE_RATE_1_SHIFT 0 /* ASYNC_SAMPLE_RATE_1 - [4:0] */ +#define ARIZONA_ASYNC_SAMPLE_RATE_1_WIDTH 5 /* ASYNC_SAMPLE_RATE_1 - [4:0] */ + +/* + * R276 (0x114) - Async sample rate 2 + */ +#define ARIZONA_ASYNC_SAMPLE_RATE_2_MASK 0x001F /* ASYNC_SAMPLE_RATE_2 - [4:0] */ +#define ARIZONA_ASYNC_SAMPLE_RATE_2_SHIFT 0 /* ASYNC_SAMPLE_RATE_2 - [4:0] */ +#define ARIZONA_ASYNC_SAMPLE_RATE_2_WIDTH 5 /* ASYNC_SAMPLE_RATE_2 - [4:0] */ /* * R283 (0x11B) - Async sample rate 1 status */ -#define ARIZONA_ASYNC_SAMPLE_RATE_STS_MASK 0x001F /* ASYNC_SAMPLE_RATE_STS - [4:0] */ -#define ARIZONA_ASYNC_SAMPLE_RATE_STS_SHIFT 0 /* ASYNC_SAMPLE_RATE_STS - [4:0] */ -#define ARIZONA_ASYNC_SAMPLE_RATE_STS_WIDTH 5 /* ASYNC_SAMPLE_RATE_STS - [4:0] */ +#define ARIZONA_ASYNC_SAMPLE_RATE_1_STS_MASK 0x001F /* ASYNC_SAMPLE_RATE_1_STS - [4:0] */ +#define ARIZONA_ASYNC_SAMPLE_RATE_1_STS_SHIFT 0 /* ASYNC_SAMPLE_RATE_1_STS - [4:0] */ +#define ARIZONA_ASYNC_SAMPLE_RATE_1_STS_WIDTH 5 /* ASYNC_SAMPLE_RATE_1_STS - [4:0] */ + +/* + * R284 (0x11C) - Async sample rate 2 status + */ +#define ARIZONA_ASYNC_SAMPLE_RATE_2_STS_MASK 0x001F /* ASYNC_SAMPLE_RATE_2_STS - [4:0] */ +#define ARIZONA_ASYNC_SAMPLE_RATE_2_STS_SHIFT 0 /* ASYNC_SAMPLE_RATE_2_STS - [4:0] */ +#define ARIZONA_ASYNC_SAMPLE_RATE_2_STS_WIDTH 5 /* ASYNC_SAMPLE_RATE_2_STS - [4:0] */ /* * R329 (0x149) - Output system clock diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index b37c9e1acdc..4443acc9995 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1682,7 +1682,7 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, break; case ARIZONA_CLK_ASYNCCLK: snd_soc_update_bits(codec, ARIZONA_ASYNC_SAMPLE_RATE_1, - ARIZONA_ASYNC_SAMPLE_RATE_MASK, sr_val); + ARIZONA_ASYNC_SAMPLE_RATE_1_MASK, sr_val); if (base) snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL, ARIZONA_AIF1_RATE_MASK, From 4db85ef4519fbeae355d84bd0a2ecfe7210b2bc8 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 9 Jul 2014 13:19:36 +0100 Subject: [PATCH 0378/1167] ASoC: arizona: Add support for linking an AIF to specific rate domains Until we have better sample rate support in the ASoC core we need to be able to link an AIF to a specific sample rate domain so we can support different sample rates on the sample clock domain. This patch adds support for this. Change-Id: I6870e8b91278a40b9447b710e7faef8716e2ed9b Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 43 +++++++++++++++++++++++++++++++++++++- sound/soc/codecs/arizona.h | 3 +++ 2 files changed, 45 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 4443acc9995..c966707197c 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1595,9 +1595,12 @@ static int arizona_startup(struct snd_pcm_substream *substream, switch (dai_priv->clk) { case ARIZONA_CLK_SYSCLK: + case ARIZONA_CLK_SYSCLK_2: + case ARIZONA_CLK_SYSCLK_3: base_rate = priv->sysclk; break; case ARIZONA_CLK_ASYNCCLK: + case ARIZONA_CLK_ASYNCCLK_2: base_rate = priv->asyncclk; break; default: @@ -1678,7 +1681,28 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, ARIZONA_SAMPLE_RATE_1_MASK, sr_val); if (base) snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL, - ARIZONA_AIF1_RATE_MASK, 0); + ARIZONA_AIF1_RATE_MASK, + 0 << ARIZONA_AIF1_RATE_SHIFT); + break; + case ARIZONA_CLK_SYSCLK_2: + arizona_wm5102_set_dac_comp(codec, params_rate(params)); + + snd_soc_update_bits(codec, ARIZONA_SAMPLE_RATE_2, + ARIZONA_SAMPLE_RATE_2_MASK, sr_val); + if (base) + snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL, + ARIZONA_AIF1_RATE_MASK, + 1 << ARIZONA_AIF1_RATE_SHIFT); + break; + case ARIZONA_CLK_SYSCLK_3: + arizona_wm5102_set_dac_comp(codec, params_rate(params)); + + snd_soc_update_bits(codec, ARIZONA_SAMPLE_RATE_3, + ARIZONA_SAMPLE_RATE_3_MASK, sr_val); + if (base) + snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL, + ARIZONA_AIF1_RATE_MASK, + 2 << ARIZONA_AIF1_RATE_SHIFT); break; case ARIZONA_CLK_ASYNCCLK: snd_soc_update_bits(codec, ARIZONA_ASYNC_SAMPLE_RATE_1, @@ -1688,6 +1712,14 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, ARIZONA_AIF1_RATE_MASK, 8 << ARIZONA_AIF1_RATE_SHIFT); break; + case ARIZONA_CLK_ASYNCCLK_2: + snd_soc_update_bits(codec, ARIZONA_ASYNC_SAMPLE_RATE_2, + ARIZONA_ASYNC_SAMPLE_RATE_2_MASK, sr_val); + if (base) + snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL, + ARIZONA_AIF1_RATE_MASK, + 9 << ARIZONA_AIF1_RATE_SHIFT); + break; default: arizona_aif_err(dai, "Invalid clock %d\n", dai_priv->clk); return -EINVAL; @@ -1785,8 +1817,11 @@ static const char *arizona_dai_clk_str(int clk_id) { switch (clk_id) { case ARIZONA_CLK_SYSCLK: + case ARIZONA_CLK_SYSCLK_2: + case ARIZONA_CLK_SYSCLK_3: return "SYSCLK"; case ARIZONA_CLK_ASYNCCLK: + case ARIZONA_CLK_ASYNCCLK_2: return "ASYNCCLK"; default: return "Unknown clock"; @@ -1803,7 +1838,10 @@ static int arizona_dai_set_sysclk(struct snd_soc_dai *dai, switch (clk_id) { case ARIZONA_CLK_SYSCLK: + case ARIZONA_CLK_SYSCLK_2: + case ARIZONA_CLK_SYSCLK_3: case ARIZONA_CLK_ASYNCCLK: + case ARIZONA_CLK_ASYNCCLK_2: break; default: return -EINVAL; @@ -1827,6 +1865,8 @@ static int arizona_dai_set_sysclk(struct snd_soc_dai *dai, switch (clk_id) { case ARIZONA_CLK_SYSCLK: + case ARIZONA_CLK_SYSCLK_2: + case ARIZONA_CLK_SYSCLK_3: routes[0].source = arizona_dai_clk_str(dai_priv->clk); routes[1].source = arizona_dai_clk_str(dai_priv->clk); snd_soc_dapm_del_routes(&codec->dapm, routes, @@ -1838,6 +1878,7 @@ static int arizona_dai_set_sysclk(struct snd_soc_dai *dai, switch (clk_id) { case ARIZONA_CLK_ASYNCCLK: + case ARIZONA_CLK_ASYNCCLK_2: routes[0].source = arizona_dai_clk_str(clk_id); routes[1].source = arizona_dai_clk_str(clk_id); snd_soc_dapm_add_routes(&codec->dapm, routes, diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 4bbae32484c..9d97f278ece 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -23,6 +23,9 @@ #define ARIZONA_CLK_ASYNCCLK 2 #define ARIZONA_CLK_OPCLK 3 #define ARIZONA_CLK_ASYNC_OPCLK 4 +#define ARIZONA_CLK_SYSCLK_2 5 +#define ARIZONA_CLK_SYSCLK_3 6 +#define ARIZONA_CLK_ASYNCCLK_2 7 #define ARIZONA_CLK_SRC_MCLK1 0x0 #define ARIZONA_CLK_SRC_MCLK2 0x1 From f74e109516f28462edabca9d9af84fc40dfbe3de Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Tue, 26 Mar 2013 12:16:26 +0000 Subject: [PATCH 0379/1167] mfd: arizona: Add missing cleanup on remove We'd forgotten to disable /RESET or the regulators. Practically speaking this code is unlikely to ever be run. Signed-off-by: Mark Brown (cherry picked from commit 1d017b6b36675574ec8a6f7dbcd3fd3bec2dc03f) Change-Id: Ic817d5ad604d3317522de32f9230dc61afb73e70 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 7b00860b9b2..092748959b8 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1464,6 +1464,11 @@ int arizona_dev_exit(struct arizona *arizona) arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); pm_runtime_disable(arizona->dev); arizona_irq_exit(arizona); + if (arizona->pdata.reset) + gpio_set_value_cansleep(arizona->pdata.reset, 0); + regulator_disable(arizona->dcvdd); + regulator_bulk_disable(ARRAY_SIZE(arizona->core_supplies), + arizona->core_supplies); return 0; } EXPORT_SYMBOL_GPL(arizona_dev_exit); From acb583ce065b45069bc4ec5e824354e9c65384ad Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 28 May 2014 13:38:12 +0100 Subject: [PATCH 0380/1167] mfd: arizona: Disable PM runtime at start of driver removal We don't want to trigger any PM runtime operations whilst we are tearing down the driver, as things the suspend and resume callbacks rely on might already have been destroyed. So disable PM runtime for the device as the first step arizona_dev_exit. Change-Id: I9b6b9197125d56180ad2000b0e58ee5f32d791f4 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 092748959b8..65d35d7687c 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1458,11 +1458,12 @@ EXPORT_SYMBOL_GPL(arizona_dev_init); int arizona_dev_exit(struct arizona *arizona) { + pm_runtime_disable(arizona->dev); + mfd_remove_devices(arizona->dev); arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); - pm_runtime_disable(arizona->dev); arizona_irq_exit(arizona); if (arizona->pdata.reset) gpio_set_value_cansleep(arizona->pdata.reset, 0); From 991e78d812a425ae0dbc8a9f4a467cdb3df263a5 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 28 May 2014 11:36:00 +0100 Subject: [PATCH 0381/1167] mfd: arizona: Disable DCVDD before we destroy the MFD As DCVDD is probably supplied by a child of the MFD device move its disable to before we destroy the MFD children as the regulator likely won't exist after that. Change-Id: Ief021333ae0fbddd9258dfe0058a871d0c1c871d Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 65d35d7687c..6b4940f764f 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1460,6 +1460,8 @@ int arizona_dev_exit(struct arizona *arizona) { pm_runtime_disable(arizona->dev); + regulator_disable(arizona->dcvdd); + mfd_remove_devices(arizona->dev); arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); @@ -1467,7 +1469,7 @@ int arizona_dev_exit(struct arizona *arizona) arizona_irq_exit(arizona); if (arizona->pdata.reset) gpio_set_value_cansleep(arizona->pdata.reset, 0); - regulator_disable(arizona->dcvdd); + regulator_bulk_disable(ARRAY_SIZE(arizona->core_supplies), arizona->core_supplies); return 0; From 121f7ea5d9d1c5b22323fb8dbed6984b6d452d07 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Sat, 24 May 2014 12:07:47 +0100 Subject: [PATCH 0382/1167] mfd: arizona: Don't use devres for DCVDD Currently the Arizona core uses a devm_regulator_get against its own device node to obtain DCVDD. The Arizona core is an MFD device and DCVDD is usually supplied by a child node (arizona-ldo1) of the core. As devres destruction for the MFD device will run after all its children have been destroyed, the regulator will be destroyed before devres calls regulator_put. This causes a warning from both the destruction of the child node, as the regulator is still open, and from the put of the regulator as the regulator device has already been destroyed. This patch handles the regulator get and put without devres to avoid this issue. Change-Id: I86b3abc2ce7d9388de49e240f44cc82904607d67 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 6b4940f764f..9480f1a0348 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1076,7 +1076,7 @@ int arizona_dev_init(struct arizona *arizona) goto err_early; } - arizona->dcvdd = devm_regulator_get(arizona->dev, "DCVDD"); + arizona->dcvdd = regulator_get(arizona->dev, "DCVDD"); if (IS_ERR(arizona->dcvdd)) { ret = PTR_ERR(arizona->dcvdd); dev_err(dev, "Failed to request DCVDD: %d\n", ret); @@ -1090,7 +1090,7 @@ int arizona_dev_init(struct arizona *arizona) "arizona /RESET"); if (ret != 0) { dev_err(dev, "Failed to request /RESET: %d\n", ret); - goto err_early; + goto err_dcvdd; } } @@ -1099,7 +1099,7 @@ int arizona_dev_init(struct arizona *arizona) if (ret != 0) { dev_err(dev, "Failed to enable core supplies: %d\n", ret); - goto err_early; + goto err_dcvdd; } ret = regulator_enable(arizona->dcvdd); @@ -1450,6 +1450,8 @@ int arizona_dev_init(struct arizona *arizona) err_enable: regulator_bulk_disable(arizona->num_core_supplies, arizona->core_supplies); +err_dcvdd: + regulator_put(arizona->dcvdd); err_early: mfd_remove_devices(dev); return ret; @@ -1461,6 +1463,7 @@ int arizona_dev_exit(struct arizona *arizona) pm_runtime_disable(arizona->dev); regulator_disable(arizona->dcvdd); + regulator_put(arizona->dcvdd); mfd_remove_devices(arizona->dev); arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); From fe3921be37bc97b3fabb1001fdeb3f1b4d3267cd Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 28 May 2014 11:28:32 +0100 Subject: [PATCH 0383/1167] mfd: arizona: Use num_core_supplies in arizona_dev_exit Currently we call regulator_bulk_disable with ARRAY_SIZE(arizona->core_supplies), however this array may be larger than the number of supplies actually used by the chip we are dealing with. Use the provided num_core_supplies member instead, so that we only disable supplies which actually exist. Change-Id: I0f80240e746a6537468c4292c38af0ea72af8791 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 9480f1a0348..5cbfe9f8542 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1473,7 +1473,7 @@ int arizona_dev_exit(struct arizona *arizona) if (arizona->pdata.reset) gpio_set_value_cansleep(arizona->pdata.reset, 0); - regulator_bulk_disable(ARRAY_SIZE(arizona->core_supplies), + regulator_bulk_disable(arizona->num_core_supplies, arizona->core_supplies); return 0; } From 994ddc65cb630dcdd78610493e4dbe0ce44a0243 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 27 May 2014 14:16:32 +0100 Subject: [PATCH 0384/1167] mfd: arizona: Lower ARIZONA_MAX_CORE_SUPPLIES to 2 There are no Arizona devices with 3 core supplies but we define a fix array with space for 3 core supplies. Lower the ARIZONA_MAX_CORE_SUPPLIES define to 2, to save a few bytes. Change-Id: I9c435bef2276b4134d3b5615b130eea16a871aea Signed-off-by: Charles Keepax --- include/linux/mfd/arizona/core.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index dd0dacc9eb0..eaddfb226d8 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -18,7 +18,7 @@ #include #include -#define ARIZONA_MAX_CORE_SUPPLIES 3 +#define ARIZONA_MAX_CORE_SUPPLIES 2 enum arizona_type { WM5102 = 1, From 1d4f7f294bde04a21c0b08e0ccab81c2462e0c6d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 19 Jun 2014 15:54:50 +0100 Subject: [PATCH 0385/1167] mfd: arizona: Add comment to explain non-devm regulator_get To avoid someone attempting to change this regulator_get back into a devm_regulator_get put a comment in explaining that devres can't be used here as the regulator will be destroyed before devres calls regulator_put. Change-Id: I0e09f37f61b4061ab8ccc736b73ad9f885e90dbd Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 5cbfe9f8542..78e666ecf2c 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1076,6 +1076,12 @@ int arizona_dev_init(struct arizona *arizona) goto err_early; } + /** + * Don't use devres here because the only device we have to get + * against is the MFD device and DCVDD will likely be supplied by + * one of its children. Meaning that the regulator will be + * destroyed by the time devres calls regulator put. + */ arizona->dcvdd = regulator_get(arizona->dev, "DCVDD"); if (IS_ERR(arizona->dcvdd)) { ret = PTR_ERR(arizona->dcvdd); From bf685f04a294771b91a8286106392aa7e6229e45 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 9 Jul 2014 14:21:58 +0100 Subject: [PATCH 0386/1167] ASoC: arizona: Mute all analog channels whilst clearing DAC Mute all analogue channels whilst we are clearing the DAC after a channel enable. This is to prevent pop noises appearing on the other channels as the DAC clear affects all channels. Change-Id: I0cdbc828f12e52d63fbddb592fdeb42eddc93ee3 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 5 +++-- include/linux/mfd/arizona/core.h | 2 ++ sound/soc/codecs/arizona.c | 6 ++++++ 3 files changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 78e666ecf2c..f688235a130 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -923,8 +923,8 @@ static const struct { }, }; -static void arizona_florida_mute_analog(struct arizona* arizona, - unsigned int mute) +void arizona_florida_mute_analog(struct arizona* arizona, + unsigned int mute) { unsigned int val, chans; int i; @@ -948,6 +948,7 @@ static void arizona_florida_mute_analog(struct arizona* arizona, mute); } } +EXPORT_SYMBOL_GPL(arizona_florida_mute_analog); static bool arizona_florida_get_input_state(struct arizona* arizona) { diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index eaddfb226d8..794013bded3 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -144,6 +144,8 @@ extern int arizona_of_read_u32_array(struct arizona *arizona, const char *prop, extern int arizona_of_read_u32(struct arizona *arizona, const char* prop, bool mandatory, u32 *data); +extern void arizona_florida_mute_analog(struct arizona* arizona, + unsigned int mute); extern void arizona_florida_clear_input(struct arizona *arizona); #endif diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index c966707197c..c89fef8d1a8 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -862,6 +862,10 @@ static int arizona_update_input(struct arizona* arizona, bool enable) regmap_write(arizona->regmap, 0x80, 0x3); if (enable) { + arizona_florida_mute_analog(arizona, ARIZONA_IN1L_MUTE); + + msleep(10); + regmap_write(arizona->regmap, 0x3A6, 0x5555); regmap_write(arizona->regmap, 0x3A5, 0x3); } else { @@ -872,6 +876,8 @@ static int arizona_update_input(struct arizona* arizona, bool enable) regmap_write(arizona->regmap, 0x3A6, 0x0); msleep(5); } + + arizona_florida_mute_analog(arizona, 0); } regmap_write(arizona->regmap, 0x80, 0x0); From b36d1bc2a91a23edf88c6e3b8e60a4c8b1124588 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 9 Jun 2014 11:45:36 +0100 Subject: [PATCH 0387/1167] ASoC: add SOC_VALUE_ENUM_EXT Adds an equivalent of SOC_ENUM_EXT for value enums Strictly speaking SOC_ENUM_EXT can also be used to define a value enum since the only difference is the get and set functions. But this doesn't look good in code because it is inconsistent with the normal control definitions. Adding a specific SOC_VALUE_ENUM_EXT is better for code clarity. Change-Id: Ic2e1c0960a49a681339720a0e94c710ca0cf8de5 Signed-off-by: Richard Fitzgerald --- include/sound/soc.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/sound/soc.h b/include/sound/soc.h index 6b56453f5eb..840a614515f 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -237,6 +237,8 @@ .info = snd_soc_info_enum_ext, \ .get = xhandler_get, .put = xhandler_put, \ .private_value = (unsigned long)&xenum } +#define SOC_VALUE_ENUM_EXT(xname, xenum, xhandler_get, xhandler_put) \ + SOC_ENUM_EXT(xname, xenum, xhandler_get, xhandler_put) #define SND_SOC_BYTES(xname, xbase, xregs) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ From ffbb9d0835c70f2222e987294f2e071d6a89ba98 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 29 May 2014 16:26:15 +0100 Subject: [PATCH 0388/1167] mfd: wm5102: Correct default for LDO Control 2 register Update the default value to match the patch. Change-Id: I641371803ab7cadf9bd2e71555bb80b2917b1b95 Signed-off-by: Richard Fitzgerald --- drivers/mfd/wm5102-tables.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index cf0a95d48dc..d392429a15e 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -407,7 +407,7 @@ static const struct reg_default wm5102_reg_default[] = { { 0x000001AA, 0x0004 }, /* R426 - FLL2 GPIO Clock */ { 0x00000200, 0x0006 }, /* R512 - Mic Charge Pump 1 */ { 0x00000210, 0x00D4 }, /* R528 - LDO1 Control 1 */ - { 0x00000212, 0x0001 }, /* R530 - LDO1 Control 2 */ + { 0x00000212, 0x0000 }, /* R530 - LDO1 Control 2 */ { 0x00000213, 0x0344 }, /* R531 - LDO2 Control 1 */ { 0x00000218, 0x01A6 }, /* R536 - Mic Bias Ctrl 1 */ { 0x00000219, 0x01A6 }, /* R537 - Mic Bias Ctrl 2 */ From cc6e64d10aed87a2cc6fe4f5238e914eaac39d49 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Wed, 23 Jul 2014 14:55:55 +0100 Subject: [PATCH 0389/1167] switch: arizona: Add support for external hpdet resistor Some platforms have fixed resistors in series with HPDET to suppress pops. Make sure we can take this in to account when determining playback path impedance. Change-Id: I5fb80b7a430f17981997adac358d7138b3fd0b6a Signed-off-by: Nariman Poushin --- drivers/mfd/arizona-core.c | 3 +++ drivers/switch/switch-arizona.c | 17 +++++++++++++++++ include/linux/mfd/arizona/pdata.h | 2 ++ 3 files changed, 22 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index f688235a130..202542fb380 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -842,6 +842,9 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,wm5102t-output-pwr", false, &pdata->wm5102t_output_pwr); + + arizona_of_read_u32(arizona, "wlf,hpdet-ext-res", false, + &pdata->hpdet_ext_res); return 0; } diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index c6ee793561d..6f4ebb01c3e 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -587,8 +587,25 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) } } + if (info->arizona->pdata.hpdet_ext_res) { + + if (info->arizona->pdata.hpdet_ext_res >= val) { + dev_err(arizona->dev, + "External resistor (%d) >= measurement (%d)\n", + info->arizona->pdata.hpdet_ext_res, + val); + } else { + dev_dbg(arizona->dev, + "Compensating for external %d ohm resistor\n", + info->arizona->pdata.hpdet_ext_res); + + val -= info->arizona->pdata.hpdet_ext_res; + } + } + dev_dbg(arizona->dev, "HP impedance %d ohms\n", val); + return val; } diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 35978f787d2..61cc7ac432a 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -252,6 +252,8 @@ struct arizona_pdata { struct wm_adsp_fw_defs *fw_defs[ARIZONA_MAX_DSP]; int num_fw_defs[ARIZONA_MAX_DSP]; + /** Some platforms add a series resistor for hpdet to suppress pops */ + int hpdet_ext_res; }; #endif From ba72036cc96cde7e4c5b76e7aa3979f6129f95aa Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 9 Jul 2014 15:17:29 +0100 Subject: [PATCH 0390/1167] switch: arizona: Switch from wakelocks to wakeup sources Change-Id: I1e7d49cd2ea10d29283658951dcc247505ea5a49 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 6f4ebb01c3e..d00f974c460 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -31,7 +31,6 @@ #include #include #include -#include #include @@ -106,7 +105,7 @@ struct arizona_extcon_info { const struct arizona_jd_state *state; struct delayed_work state_timeout_work; - struct wake_lock detection_wake_lock; + struct wakeup_source detection_wake_lock; }; static const struct arizona_micd_config micd_default_modes[] = { @@ -1530,8 +1529,8 @@ static irqreturn_t arizona_jackdet(int irq, void *data) dev_dbg(arizona->dev, "Detected jack\n"); if (arizona->pdata.jd_wake_time) - wake_lock_timeout(&info->detection_wake_lock, - msecs_to_jiffies(arizona->pdata.jd_wake_time)); + __pm_wakeup_event(&info->detection_wake_lock, + arizona->pdata.jd_wake_time); if (!arizona->pdata.hpdet_acc_id) { info->mic = false; @@ -1749,8 +1748,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) } mutex_init(&info->lock); - wake_lock_init(&info->detection_wake_lock, WAKE_LOCK_SUSPEND, - "arizona-jack-detection"); + wakeup_source_init(&info->detection_wake_lock, "arizona-jack-detection"); info->arizona = arizona; info->dev = &pdev->dev; info->last_jackdet = ~(ARIZONA_MICD_CLAMP_STS | ARIZONA_JD1_STS); @@ -2063,7 +2061,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) pm_runtime_disable(&pdev->dev); switch_dev_unregister(&info->edev); err_wakelock: - wake_lock_destroy(&info->detection_wake_lock); + wakeup_source_trash(&info->detection_wake_lock); err: return ret; } @@ -2101,7 +2099,7 @@ static int arizona_extcon_remove(struct platform_device *pdev) device_remove_file(&pdev->dev, &dev_attr_hp_impedance); switch_dev_unregister(&info->edev); - wake_lock_destroy(&info->detection_wake_lock); + wakeup_source_trash(&info->detection_wake_lock); return 0; } From 9628d0da9aef10e35406663604200112ad95cb19 Mon Sep 17 00:00:00 2001 From: bsapthagiri Date: Tue, 8 Jul 2014 19:32:16 +0530 Subject: [PATCH 0391/1167] ASoC: arizona: Cache locking mechanism for adsp coeff controls updation There can be a inconsistent behaviour when we try to read and write the adsp coeffs simultaniously. Added locking mechanism on cache to avoid this overwriting. Change-Id: If21f052c6487b53d5da9da4317272a8ee145b007 Signed-off-by: bsapthagiri --- sound/soc/codecs/wm_adsp.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 8ef8fa8519e..3dbed9c2edb 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -420,6 +420,7 @@ struct wm_coeff_ctl { size_t len; unsigned int set:1; struct snd_kcontrol *kcontrol; + struct mutex lock; }; static int wm_adsp_create_grouped_control(struct wm_adsp *dsp, @@ -601,15 +602,20 @@ static int wm_coeff_put(struct snd_kcontrol *kcontrol, { struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; char *p = ucontrol->value.bytes.data; + int ret; + mutex_lock(&ctl->lock); memcpy(ctl->cache, p, ctl->len); if (!ctl->enabled) { ctl->set = 1; + mutex_unlock(&ctl->lock); return 0; } - return wm_coeff_write_control(kcontrol, p, ctl->len); + ret = wm_coeff_write_control(kcontrol, p, ctl->len); + mutex_unlock(&ctl->lock); + return ret; } static int wm_coeff_read_control(struct snd_kcontrol *kcontrol, @@ -659,7 +665,9 @@ static int wm_coeff_get(struct snd_kcontrol *kcontrol, struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; char *p = ucontrol->value.bytes.data; + mutex_lock(&ctl->lock); memcpy(p, ctl->cache, ctl->len); + mutex_unlock(&ctl->lock); return 0; } @@ -1060,9 +1068,11 @@ static int wm_coeff_init_control_caches(struct wm_adsp *adsp) list_for_each_entry(ctl, &adsp->ctl_list, list) { if (!ctl->enabled || ctl->set) continue; + mutex_lock(&ctl->lock); ret = wm_coeff_read_control(ctl->kcontrol, ctl->cache, ctl->len); + mutex_unlock(&ctl->lock); if (ret < 0) return ret; } @@ -1079,9 +1089,11 @@ static int wm_coeff_sync_controls(struct wm_adsp *adsp) if (!ctl->enabled) continue; if (ctl->set) { + mutex_lock(&ctl->lock); ret = wm_coeff_write_control(ctl->kcontrol, ctl->cache, ctl->len); + mutex_unlock(&ctl->lock); if (ret < 0) return ret; } @@ -1171,6 +1183,7 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, ret = -ENOMEM; goto err_ctl_name; } + mutex_init(&ctl->lock); ctl_work = kzalloc(sizeof(*ctl_work), GFP_KERNEL); if (!ctl_work) { From 4d7933cbfc07a6bbc2be0a1e88cd408e0959b074 Mon Sep 17 00:00:00 2001 From: bsapthagiri Date: Wed, 9 Jul 2014 16:19:28 +0530 Subject: [PATCH 0392/1167] ASoC: arizona: Reading coeff controls from DSP memory. Added code to get coeff controls directly from DSP memory instead of from cache when DSP is in running state. Change-Id: I2d315ffc62581c45f983bf9ead9097e92edff1dd Signed-off-by: bsapthagiri --- sound/soc/codecs/wm_adsp.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 3dbed9c2edb..28c97f42445 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -663,9 +663,14 @@ static int wm_coeff_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; + struct wm_adsp *adsp = ctl->adsp; char *p = ucontrol->value.bytes.data; mutex_lock(&ctl->lock); + + if (adsp->running) + wm_coeff_read_control(kcontrol, ctl->cache, ctl->len); + memcpy(p, ctl->cache, ctl->len); mutex_unlock(&ctl->lock); return 0; From 38e64887e9f756fa4854c6e56dedddca3cd125a2 Mon Sep 17 00:00:00 2001 From: Dimitris Papastamos Date: Tue, 11 Feb 2014 17:33:01 +0000 Subject: [PATCH 0393/1167] ASoC: arizona: Disable AIF TX/RX before configuring it Changes to the AIF configuration registers only take effect when the AIF is disabled. If the configuration is being changed from the previous setup, temporarily disable the AIF. Change-Id: I63224b4b59a65c718c2aafe6580c473aa8df1bf3 Signed-off-by: Dimitris Papastamos Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 80 ++++++++++++++++++++++++++++++-------- 1 file changed, 64 insertions(+), 16 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index c89fef8d1a8..cfcb2fcc6e4 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1734,6 +1734,27 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, return 0; } +static bool arizona_aif_cfg_changed(struct snd_soc_codec *codec, + int base, int bclk, int lrclk, int frame) +{ + int val; + + val = snd_soc_read(codec, base + ARIZONA_AIF_BCLK_CTRL); + if (bclk != (val & ARIZONA_AIF1_BCLK_FREQ_MASK)) + return true; + + val = snd_soc_read(codec, base + ARIZONA_AIF_TX_BCLK_RATE); + if (lrclk != (val & ARIZONA_AIF1TX_BCPF_MASK)) + return true; + + val = snd_soc_read(codec, base + ARIZONA_AIF_FRAME_CTRL_1); + if (frame != (val & (ARIZONA_AIF1TX_WL_MASK | + ARIZONA_AIF1TX_SLOT_LEN_MASK))) + return true; + + return false; +} + static int arizona_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) @@ -1749,6 +1770,8 @@ static int arizona_hw_params(struct snd_pcm_substream *substream, int tdm_width = arizona->tdm_width[dai->id - 1]; int tdm_slots = arizona->tdm_slots[dai->id - 1]; int bclk, lrclk, wl, frame, bclk_target; + bool reconfig; + unsigned int aif_tx_state, aif_rx_state; if (params_rate(params) % 8000) rates = &arizona_44k1_bclk_rates[0]; @@ -1799,24 +1822,49 @@ static int arizona_hw_params(struct snd_pcm_substream *substream, wl = snd_pcm_format_width(params_format(params)); frame = wl << ARIZONA_AIF1TX_WL_SHIFT | wl; - ret = arizona_hw_params_rate(substream, params, dai); - if (ret != 0) - return ret; + reconfig = arizona_aif_cfg_changed(codec, base, bclk, lrclk, frame); - snd_soc_update_bits(codec, base + ARIZONA_AIF_BCLK_CTRL, - ARIZONA_AIF1_BCLK_FREQ_MASK, bclk); - snd_soc_update_bits(codec, base + ARIZONA_AIF_TX_BCLK_RATE, - ARIZONA_AIF1TX_BCPF_MASK, lrclk); - snd_soc_update_bits(codec, base + ARIZONA_AIF_RX_BCLK_RATE, - ARIZONA_AIF1RX_BCPF_MASK, lrclk); - snd_soc_update_bits(codec, base + ARIZONA_AIF_FRAME_CTRL_1, - ARIZONA_AIF1TX_WL_MASK | - ARIZONA_AIF1TX_SLOT_LEN_MASK, frame); - snd_soc_update_bits(codec, base + ARIZONA_AIF_FRAME_CTRL_2, - ARIZONA_AIF1RX_WL_MASK | - ARIZONA_AIF1RX_SLOT_LEN_MASK, frame); + if (reconfig) { + /* Save AIF TX/RX state */ + aif_tx_state = snd_soc_read(codec, + base + ARIZONA_AIF_TX_ENABLES); + aif_rx_state = snd_soc_read(codec, + base + ARIZONA_AIF_RX_ENABLES); + /* Disable AIF TX/RX before reconfiguring it */ + snd_soc_update_bits(codec, + base + ARIZONA_AIF_TX_ENABLES, 0xff, 0x0); + snd_soc_update_bits(codec, + base + ARIZONA_AIF_RX_ENABLES, 0xff, 0x0); + } - return 0; + ret = arizona_hw_params_rate(substream, params, dai); + if (ret != 0) + goto restore_aif; + + if (reconfig) { + snd_soc_update_bits(codec, base + ARIZONA_AIF_BCLK_CTRL, + ARIZONA_AIF1_BCLK_FREQ_MASK, bclk); + snd_soc_update_bits(codec, base + ARIZONA_AIF_TX_BCLK_RATE, + ARIZONA_AIF1TX_BCPF_MASK, lrclk); + snd_soc_update_bits(codec, base + ARIZONA_AIF_RX_BCLK_RATE, + ARIZONA_AIF1RX_BCPF_MASK, lrclk); + snd_soc_update_bits(codec, base + ARIZONA_AIF_FRAME_CTRL_1, + ARIZONA_AIF1TX_WL_MASK | + ARIZONA_AIF1TX_SLOT_LEN_MASK, frame); + snd_soc_update_bits(codec, base + ARIZONA_AIF_FRAME_CTRL_2, + ARIZONA_AIF1RX_WL_MASK | + ARIZONA_AIF1RX_SLOT_LEN_MASK, frame); + } + +restore_aif: + if (reconfig) { + /* Restore AIF TX/RX state */ + snd_soc_update_bits(codec, base + ARIZONA_AIF_TX_ENABLES, + 0xff, aif_tx_state); + snd_soc_update_bits(codec, base + ARIZONA_AIF_RX_ENABLES, + 0xff, aif_rx_state); + } + return ret; } static const char *arizona_dai_clk_str(int clk_id) From 7d94864eab55bbea4b9438cda38d2e5d6be10f3e Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 9 Jun 2014 16:02:26 +0100 Subject: [PATCH 0394/1167] mfd: arizona: Export function to control subsystem DVFS Moving this control from being a side-effect of the LDO1 regulator driver to a specific exported function. Change-Id: I387f8d021c65d2d03ca2703a751b02621e45029c Signed-off-by: Richard Fitzgerald Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 89 ++++++++++++++++++++++++++++++++ include/linux/mfd/arizona/core.h | 12 +++++ 2 files changed, 101 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 202542fb380..41163f80a82 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -94,6 +94,94 @@ int arizona_clk32k_disable(struct arizona *arizona) } EXPORT_SYMBOL_GPL(arizona_clk32k_disable); +int arizona_dvfs_up(struct arizona *arizona, unsigned int flags) +{ + unsigned int new_flags; + int ret = 0; + + mutex_lock(&arizona->subsys_max_lock); + + new_flags = arizona->subsys_max_rq | flags; + + if (arizona->subsys_max_rq != new_flags) { + switch (arizona->type) { + case WM5102: + case WM8997: + ret = regulator_set_voltage(arizona->dcvdd, + 1800000, 1800000); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to set DCVDD (DVFS up): %d\n", + ret); + goto err; + } + + ret = regmap_update_bits(arizona->regmap, + ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, + ARIZONA_SUBSYS_MAX_FREQ, 1); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to enable subsys max: %d\n", + ret); + regulator_set_voltage(arizona->dcvdd, + 1200000, 1800000); + goto err; + } + break; + + default: + break; + } + + arizona->subsys_max_rq = new_flags; + } +err: + mutex_unlock(&arizona->subsys_max_lock); + return ret; +} +EXPORT_SYMBOL_GPL(arizona_dvfs_up); + +int arizona_dvfs_down(struct arizona *arizona, unsigned int flags) +{ + int ret = 0; + + mutex_lock(&arizona->subsys_max_lock); + + if ((arizona->subsys_max_rq & flags) != flags) + dev_warn(arizona->dev, "Unbalanced DVFS down: %x\n", flags); + + arizona->subsys_max_rq &= ~flags; + + if (arizona->subsys_max_rq == 0) { + switch (arizona->type) { + case WM5102: + case WM8997: + ret = regmap_update_bits(arizona->regmap, + ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, + ARIZONA_SUBSYS_MAX_FREQ, 0); + if (ret != 0) + dev_err(arizona->dev, + "Failed to disable subsys max: %d\n", + ret); + + ret = regulator_set_voltage(arizona->dcvdd, + 1200000, 1800000); + if (ret != 0) + dev_err(arizona->dev, + "Failed to set DCVDD (DVFS down): %d\n", + ret); + break; + + default: + break; + } + } + + mutex_unlock(&arizona->subsys_max_lock); + return ret; +} +EXPORT_SYMBOL_GPL(arizona_dvfs_down); + static irqreturn_t arizona_clkgen_err(int irq, void *data) { struct arizona *arizona = data; @@ -1036,6 +1124,7 @@ int arizona_dev_init(struct arizona *arizona) dev_set_drvdata(arizona->dev, arizona); mutex_init(&arizona->clk_lock); + mutex_init(&arizona->subsys_max_lock); mutex_init(&arizona->reg_setting_lock); if (dev_get_platdata(arizona->dev)) diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 794013bded3..56291799b85 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -114,6 +114,9 @@ struct arizona { struct mutex clk_lock; int clk32k_ref; + struct mutex subsys_max_lock; + unsigned int subsys_max_rq; + struct snd_soc_dapm_context *dapm; struct mutex reg_setting_lock; @@ -125,8 +128,17 @@ struct arizona { uint8_t out_comp_enabled; }; +#define ARIZONA_DVFS_SR1_RQ 0x00000001 +#define ARIZONA_DVFS_SR2_RQ 0x00000002 +#define ARIZONA_DVFS_SR3_RQ 0x00000004 +#define ARIZONA_DVFS_ASR1_RQ 0x00000010 +#define ARIZONA_DVFS_ASR2_RQ 0x00000020 +#define ARIZONA_DVFS_ADSP1_RQ 0x00010000 + int arizona_clk32k_enable(struct arizona *arizona); int arizona_clk32k_disable(struct arizona *arizona); +int arizona_dvfs_up(struct arizona *arizona, unsigned int mask); +int arizona_dvfs_down(struct arizona *arizona, unsigned int mask); int arizona_request_irq(struct arizona *arizona, int irq, char *name, irq_handler_t handler, void *data); From e48feb19e43676adfbdddb9d5aa5b4da24f436f3 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 9 Jun 2014 16:03:14 +0100 Subject: [PATCH 0395/1167] ASoC: wm_adsp: Move DVFS control into codec driver In theory the ADSP driver should not need to know anything about the codec it is part of. But some codecs need DVFS control based on ADSP clocking speed. This was being handled by bundling part of the knowledge of this into the ADSP driver. This change removes this handling out of the ADSP driver. A new macro WM_ADSP2_E() takes a callback function to be called by the preloader widget in place of the default handler, and this can be used to do codec-specific power control. The WM5102 driver has been updated to implement the DVFS. Change-Id: I3e5df8a0b31e109d0e73e3b686c811a2d26f4b44 Signed-off-by: Richard Fitzgerald Signed-off-by: Charles Keepax --- drivers/regulator/arizona-ldo1.c | 5 --- sound/soc/codecs/florida.c | 3 +- sound/soc/codecs/wm5102.c | 48 +++++++++++++++++++-- sound/soc/codecs/wm_adsp.c | 73 +------------------------------- sound/soc/codecs/wm_adsp.h | 17 ++++---- 5 files changed, 56 insertions(+), 90 deletions(-) diff --git a/drivers/regulator/arizona-ldo1.c b/drivers/regulator/arizona-ldo1.c index 37629c1b7ac..57b47988f75 100644 --- a/drivers/regulator/arizona-ldo1.c +++ b/drivers/regulator/arizona-ldo1.c @@ -77,11 +77,6 @@ static int arizona_ldo1_hc_set_voltage_sel(struct regulator_dev *rdev, if (ret != 0) return ret; - ret = regmap_update_bits(regmap, ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, - ARIZONA_SUBSYS_MAX_FREQ, val); - if (ret != 0) - return ret; - if (val) return 0; diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 0e3295325e1..49efb3454f6 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2281,8 +2281,7 @@ static int florida_probe(struct platform_device *pdev) = arizona->pdata.num_fw_defs[i]; } - ret = wm_adsp2_init(&florida->core.adsp[i], false, - &florida->fw_lock); + ret = wm_adsp2_init(&florida->core.adsp[i], &florida->fw_lock); if (ret != 0) return ret; } diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 67c30deceb5..709f7714f43 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -626,6 +626,49 @@ static int wm5102_sysclk_ev(struct snd_soc_dapm_widget *w, return 0; } +static int wm5102_adsp_power_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + unsigned int v; + int ret; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &v); + if (ret != 0) { + dev_err(codec->dev, + "Failed to read SYSCLK state: %d\n", ret); + return -EIO; + } + + v = (v & ARIZONA_SYSCLK_FREQ_MASK) >> ARIZONA_SYSCLK_FREQ_SHIFT; + + if (v >= 3) { + ret = arizona_dvfs_up(arizona, ARIZONA_DVFS_ADSP1_RQ); + if (ret != 0) { + dev_err(codec->dev, + "Failed to raise DVFS: %d\n", ret); + return ret; + } + } + break; + + case SND_SOC_DAPM_POST_PMD: + ret = arizona_dvfs_down(arizona, ARIZONA_DVFS_ADSP1_RQ); + if (ret != 0) + dev_warn(codec->dev, + "Failed to lower DVFS: %d\n", ret); + break; + + default: + break; + } + + return wm_adsp2_early_event(w, kcontrol, event); +} + static int wm5102_out_comp_coeff_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { @@ -1389,7 +1432,7 @@ ARIZONA_MUX_WIDGETS(ISRC2DEC2, "ISRC2DEC2"), ARIZONA_MUX_WIDGETS(ISRC2INT1, "ISRC2INT1"), ARIZONA_MUX_WIDGETS(ISRC2INT2, "ISRC2INT2"), -WM_ADSP2("DSP1", 0), +WM_ADSP2_E("DSP1", 0, wm5102_adsp_power_ev), SND_SOC_DAPM_OUTPUT("DSP Virtual Output"), @@ -1989,8 +2032,7 @@ static int wm5102_probe(struct platform_device *pdev) = arizona->pdata.num_fw_defs[0]; } - ret = wm_adsp2_init(&wm5102->core.adsp[0], true, - &wm5102->fw_lock); + ret = wm_adsp2_init(&wm5102->core.adsp[0], &wm5102->fw_lock); if (ret != 0) return ret; diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 28c97f42445..e82d3105e00 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2032,35 +2032,6 @@ static void wm_adsp2_boot_work(struct work_struct *work) return; } - if (dsp->dvfs) { - ret = regmap_read(dsp->regmap, - dsp->base + ADSP2_CLOCKING, &val); - if (ret != 0) { - adsp_err(dsp, "Failed to read clocking: %d\n", ret); - return; - } - - if ((val & ADSP2_CLK_SEL_MASK) >= 3) { - ret = regulator_enable(dsp->dvfs); - if (ret != 0) { - adsp_err(dsp, - "Failed to enable supply: %d\n", - ret); - return; - } - - ret = regulator_set_voltage(dsp->dvfs, - 1800000, - 1800000); - if (ret != 0) { - adsp_err(dsp, - "Failed to raise supply: %d\n", - ret); - return; - } - } - } - ret = wm_adsp2_ena(dsp); if (ret != 0) return; @@ -2200,21 +2171,6 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0); regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0); - if (dsp->dvfs) { - ret = regulator_set_voltage(dsp->dvfs, 1200000, - 1800000); - if (ret != 0) - adsp_warn(dsp, - "Failed to lower supply: %d\n", - ret); - - ret = regulator_disable(dsp->dvfs); - if (ret != 0) - adsp_err(dsp, - "Failed to enable supply: %d\n", - ret); - } - list_for_each_entry(ctl, &dsp->ctl_list, list) ctl->enabled = 0; @@ -2394,7 +2350,7 @@ static inline int wm_adsp_of_parse_adsp(struct wm_adsp *adsp) } #endif -int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs, struct mutex *fw_lock) +int wm_adsp2_init(struct wm_adsp *adsp, struct mutex *fw_lock) { int ret, i; const char **ctl_names; @@ -2417,33 +2373,6 @@ int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs, struct mutex *fw_lock) adsp->fw_lock = fw_lock; - if (dvfs) { - adsp->dvfs = devm_regulator_get(adsp->dev, "DCVDD"); - if (IS_ERR(adsp->dvfs)) { - ret = PTR_ERR(adsp->dvfs); - adsp_err(adsp, "Failed to get DCVDD: %d\n", ret); - return ret; - } - - ret = regulator_enable(adsp->dvfs); - if (ret != 0) { - adsp_err(adsp, "Failed to enable DCVDD: %d\n", ret); - return ret; - } - - ret = regulator_set_voltage(adsp->dvfs, 1200000, 1800000); - if (ret != 0) { - adsp_err(adsp, "Failed to initialise DVFS: %d\n", ret); - return ret; - } - - ret = regulator_disable(adsp->dvfs); - if (ret != 0) { - adsp_err(adsp, "Failed to disable DCVDD: %d\n", ret); - return ret; - } - } - if (!adsp->num_firmwares) { if (!adsp->dev->of_node || wm_adsp_of_parse_adsp(adsp) <= 0) { adsp->num_firmwares = WM_ADSP_NUM_FW; diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 8b5e868e566..62833424322 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -90,8 +90,6 @@ struct wm_adsp { bool running; int fw_ver; - struct regulator *dvfs; - struct mutex ctl_lock; struct list_head ctl_list; @@ -118,19 +116,22 @@ struct wm_adsp { .shift = num, .event = wm_adsp1_event, \ .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD } -#define WM_ADSP2(wname, num) \ +#define WM_ADSP2_E(wname, num, event_fn) \ { .id = snd_soc_dapm_dai_link, .name = wname " Preloader", \ - .reg = SND_SOC_NOPM, .shift = num, .event = wm_adsp2_early_event, \ - .event_flags = SND_SOC_DAPM_PRE_PMU }, \ -{ .id = snd_soc_dapm_out_drv, .name = wname, .reg = SND_SOC_NOPM, \ - .shift = num, .event = wm_adsp2_event, \ + .reg = SND_SOC_NOPM, .shift = num, .event = event_fn, \ + .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD }, \ +{ .id = snd_soc_dapm_out_drv, .name = wname, \ + .reg = SND_SOC_NOPM, .shift = num, .event = wm_adsp2_event, \ .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD } +#define WM_ADSP2(wname, num) \ + WM_ADSP2_E(wname, num, wm_adsp2_early_event) + extern const struct snd_kcontrol_new wm_adsp1_fw_controls[]; extern const struct snd_kcontrol_new wm_adsp2_fw_controls[]; int wm_adsp1_init(struct wm_adsp *adsp); -int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs, struct mutex *fw_lock); +int wm_adsp2_init(struct wm_adsp *adsp, struct mutex *fw_lock); int wm_adsp1_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, From 16a266f1571f85516afba5bd09838d7cd1f9221b Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 9 Jun 2014 16:03:56 +0100 Subject: [PATCH 0396/1167] ASoC: arizona: Add DVFS handling for sample rate control Some codecs need to boost DVFS for higher sample rates. Change-Id: If7c77379b1657604808c0703b79d16bd31a2041f Signed-off-by: Richard Fitzgerald Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index cfcb2fcc6e4..c353c23c007 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1663,7 +1663,7 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1]; int base = dai->driver->base; - int i, sr_val; + int i, sr_val, ret; /* * We will need to be more flexible than this in future, @@ -1679,6 +1679,26 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, } sr_val = i; + switch (priv->arizona->type) { + case WM5102: + case WM8997: + if (arizona_sr_vals[sr_val] >= 88200) + ret = arizona_dvfs_up(priv->arizona, + ARIZONA_DVFS_SR1_RQ); + else + ret = arizona_dvfs_down(priv->arizona, + ARIZONA_DVFS_SR1_RQ); + + if (ret != 0) { + arizona_aif_err(dai, "Failed to change DVFS %d\n", ret); + return ret; + } + break; + + default: + break; + } + switch (dai_priv->clk) { case ARIZONA_CLK_SYSCLK: arizona_wm5102_set_dac_comp(codec, params_rate(params)); From 1508acc8436019dbe80a9a7f5943f61bf74e7340 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 30 May 2014 14:02:12 +0100 Subject: [PATCH 0397/1167] ASoC: arizona: Add DVFS handling for sample rates 2 and 3 This change implements DVFS for sample rate domains 2 and 3 Change-Id: I8fc6c2ee00633cc4935168bd04f6e2449f992aeb Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 41 ++++++++++++++++++++++++++++++++++++++ sound/soc/codecs/arizona.h | 11 ++++++++++ sound/soc/codecs/florida.c | 4 ++-- sound/soc/codecs/wm5102.c | 4 ++-- 4 files changed, 56 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index c353c23c007..9303ebc615f 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1590,6 +1590,47 @@ static int arizona_sr_vals[] = { 512000, }; +int arizona_put_sample_rate_enum(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + unsigned int val; + unsigned int flag; + int ret; + + ret = snd_soc_put_value_enum_double(kcontrol, ucontrol); + if (ret == 0) + return 0; /* register value wasn't changed */ + + val = e->values[ucontrol->value.enumerated.item[0]]; + + switch (e->reg) { + case ARIZONA_SAMPLE_RATE_2: + flag = ARIZONA_DVFS_SR2_RQ; + break; + + case ARIZONA_SAMPLE_RATE_3: + flag = ARIZONA_DVFS_SR3_RQ; + break; + + default: + return ret; + } + + if (arizona_sr_vals[val] >= 88200) { + ret = arizona_dvfs_up(arizona, flag); + if (ret != 0) + dev_err(codec->dev, "Failed to raise DVFS %d\n", ret); + } else { + ret = arizona_dvfs_down(arizona, flag); + } + + return ret; +} +EXPORT_SYMBOL_GPL(arizona_put_sample_rate_enum); + static int arizona_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 9d97f278ece..3d59147f3f3 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -183,6 +183,14 @@ extern int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS]; ARIZONA_MIXER_ROUTES(name " Preloader", name "L"), \ ARIZONA_MIXER_ROUTES(name " Preloader", name "R") +#define ARIZONA_SAMPLE_RATE_CONTROL(name, domain) \ + SOC_VALUE_ENUM(name, arizona_sample_rate[(domain) - 2]) + +#define ARIZONA_SAMPLE_RATE_CONTROL_DVFS(name, domain) \ + SOC_VALUE_ENUM_EXT(name, arizona_sample_rate[(domain) - 2], \ + snd_soc_get_value_enum_double, \ + arizona_put_sample_rate_enum) + #define ARIZONA_RATE_ENUM_SIZE 4 #define ARIZONA_SAMPLE_RATE_ENUM_SIZE 14 #define ARIZONA_OUT_RATE_ENUM_SIZE 3 @@ -232,6 +240,9 @@ extern int arizona_anc_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); +extern int arizona_put_sample_rate_enum(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); + extern int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id, int source, unsigned int freq, int dir); diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 49efb3454f6..4d20768d7e2 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -440,8 +440,8 @@ SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode), SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode), SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), -SOC_VALUE_ENUM("Sample Rate 2", arizona_sample_rate[0]), -SOC_VALUE_ENUM("Sample Rate 3", arizona_sample_rate[1]), +ARIZONA_SAMPLE_RATE_CONTROL("Sample Rate 2", 2), +ARIZONA_SAMPLE_RATE_CONTROL("Sample Rate 3", 3), SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 709f7714f43..fee5e9388c3 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -874,8 +874,8 @@ SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode), SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode), SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), -SOC_VALUE_ENUM("Sample Rate 2", arizona_sample_rate[0]), -SOC_VALUE_ENUM("Sample Rate 3", arizona_sample_rate[1]), +ARIZONA_SAMPLE_RATE_CONTROL_DVFS("Sample Rate 2", 2), +ARIZONA_SAMPLE_RATE_CONTROL_DVFS("Sample Rate 3", 3), SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), From 59ef9308f21bec9519977cd8c72c441680f8a381 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 4 Feb 2014 10:01:19 +0000 Subject: [PATCH 0398/1167] mfd: arizona: Split INx_MODE into two fields Later arizona silicon has the single/differential selector in a different register, and IN1_MODE only selects between analogue or digital. Prepare for this by splitting the INx_MODE definition into two fields. Change-Id: I7a60a2a34c5ce4857fdf3e6e95d407f010d0c6ba Signed-off-by: Richard Fitzgerald --- drivers/mfd/arizona-core.c | 8 ++++++-- include/linux/mfd/arizona/pdata.h | 5 ++++- include/linux/mfd/arizona/registers.h | 27 ++++++++++++++++++--------- 3 files changed, 28 insertions(+), 12 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 41163f80a82..eb8acf9d6ba 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1458,12 +1458,16 @@ int arizona_dev_init(struct arizona *arizona) /* Default for both is 0 so noop with defaults */ val = arizona->pdata.dmic_ref[i] << ARIZONA_IN1_DMIC_SUP_SHIFT; - val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT; + val |= (arizona->pdata.inmode[i] & 2) + << (ARIZONA_IN1_MODE_SHIFT - 1); + val |= (arizona->pdata.inmode[i] & 1) + << ARIZONA_IN1_SINGLE_ENDED_SHIFT; regmap_update_bits(arizona->regmap, ARIZONA_IN1L_CONTROL + (i * 8), ARIZONA_IN1_DMIC_SUP_MASK | - ARIZONA_IN1_MODE_MASK, val); + ARIZONA_IN1_MODE_MASK | + ARIZONA_IN1_SINGLE_ENDED_MASK, val); } for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) { diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 61cc7ac432a..bd3a8738af7 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -219,7 +219,10 @@ struct arizona_pdata { /** MICBIAS configurations */ struct arizona_micbias micbias[ARIZONA_MAX_MICBIAS]; - /** Mode of input structures */ + /** + * Mode of input structures + * One of the ARIZONA_INMODE_xxx values + */ int inmode[ARIZONA_MAX_INPUT]; /** Mode for outputs */ diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 3402b5597cf..5c24f327330 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -2494,9 +2494,12 @@ #define ARIZONA_IN1_DMIC_SUP_MASK 0x1800 /* IN1_DMIC_SUP - [12:11] */ #define ARIZONA_IN1_DMIC_SUP_SHIFT 11 /* IN1_DMIC_SUP - [12:11] */ #define ARIZONA_IN1_DMIC_SUP_WIDTH 2 /* IN1_DMIC_SUP - [12:11] */ -#define ARIZONA_IN1_MODE_MASK 0x0600 /* IN1_MODE - [10:9] */ -#define ARIZONA_IN1_MODE_SHIFT 9 /* IN1_MODE - [10:9] */ -#define ARIZONA_IN1_MODE_WIDTH 2 /* IN1_MODE - [10:9] */ +#define ARIZONA_IN1_MODE_MASK 0x0400 /* IN1_MODE - [10] */ +#define ARIZONA_IN1_MODE_SHIFT 10 /* IN1_MODE - [10] */ +#define ARIZONA_IN1_MODE_WIDTH 1 /* IN1_MODE - [10] */ +#define ARIZONA_IN1_SINGLE_ENDED_MASK 0x0200 /* IN1_MODE - [9] */ +#define ARIZONA_IN1_SINGLE_ENDED_SHIFT 9 /* IN1_MODE - [9] */ +#define ARIZONA_IN1_SINGLE_ENDED_WIDTH 1 /* IN1_MODE - [9] */ #define ARIZONA_IN1L_PGA_VOL_MASK 0x00FE /* IN1L_PGA_VOL - [7:1] */ #define ARIZONA_IN1L_PGA_VOL_SHIFT 1 /* IN1L_PGA_VOL - [7:1] */ #define ARIZONA_IN1L_PGA_VOL_WIDTH 7 /* IN1L_PGA_VOL - [7:1] */ @@ -2567,9 +2570,12 @@ #define ARIZONA_IN2_DMIC_SUP_MASK 0x1800 /* IN2_DMIC_SUP - [12:11] */ #define ARIZONA_IN2_DMIC_SUP_SHIFT 11 /* IN2_DMIC_SUP - [12:11] */ #define ARIZONA_IN2_DMIC_SUP_WIDTH 2 /* IN2_DMIC_SUP - [12:11] */ -#define ARIZONA_IN2_MODE_MASK 0x0600 /* IN2_MODE - [10:9] */ -#define ARIZONA_IN2_MODE_SHIFT 9 /* IN2_MODE - [10:9] */ -#define ARIZONA_IN2_MODE_WIDTH 2 /* IN2_MODE - [10:9] */ +#define ARIZONA_IN2_MODE_MASK 0x0400 /* IN2_MODE - [10] */ +#define ARIZONA_IN2_MODE_SHIFT 10 /* IN2_MODE - [10] */ +#define ARIZONA_IN2_MODE_WIDTH 1 /* IN2_MODE - [10] */ +#define ARIZONA_IN2_SINGLE_ENDED_MASK 0x0200 /* IN2_MODE - [9] */ +#define ARIZONA_IN2_SINGLE_ENDED_SHIFT 9 /* IN2_MODE - [9] */ +#define ARIZONA_IN2_SINGLE_ENDED_WIDTH 1 /* IN2_MODE - [9] */ #define ARIZONA_IN2L_PGA_VOL_MASK 0x00FE /* IN2L_PGA_VOL - [7:1] */ #define ARIZONA_IN2L_PGA_VOL_SHIFT 1 /* IN2L_PGA_VOL - [7:1] */ #define ARIZONA_IN2L_PGA_VOL_WIDTH 7 /* IN2L_PGA_VOL - [7:1] */ @@ -2640,9 +2646,12 @@ #define ARIZONA_IN3_DMIC_SUP_MASK 0x1800 /* IN3_DMIC_SUP - [12:11] */ #define ARIZONA_IN3_DMIC_SUP_SHIFT 11 /* IN3_DMIC_SUP - [12:11] */ #define ARIZONA_IN3_DMIC_SUP_WIDTH 2 /* IN3_DMIC_SUP - [12:11] */ -#define ARIZONA_IN3_MODE_MASK 0x0600 /* IN3_MODE - [10:9] */ -#define ARIZONA_IN3_MODE_SHIFT 9 /* IN3_MODE - [10:9] */ -#define ARIZONA_IN3_MODE_WIDTH 2 /* IN3_MODE - [10:9] */ +#define ARIZONA_IN3_MODE_MASK 0x0400 /* IN3_MODE - [10] */ +#define ARIZONA_IN3_MODE_SHIFT 10 /* IN3_MODE - [10] */ +#define ARIZONA_IN3_MODE_WIDTH 1 /* IN3_MODE - [10] */ +#define ARIZONA_IN3_SINGLE_ENDED_MASK 0x0200 /* IN3_MODE - [9] */ +#define ARIZONA_IN3_SINGLE_ENDED_SHIFT 9 /* IN3_MODE - [9] */ +#define ARIZONA_IN3_SINGLE_ENDED_WIDTH 1 /* IN3_MODE - [9] */ #define ARIZONA_IN3L_PGA_VOL_MASK 0x00FE /* IN3L_PGA_VOL - [7:1] */ #define ARIZONA_IN3L_PGA_VOL_SHIFT 1 /* IN3L_PGA_VOL - [7:1] */ #define ARIZONA_IN3L_PGA_VOL_WIDTH 7 /* IN3L_PGA_VOL - [7:1] */ From 157131a981f51840a9b0a7a1a733731e098c0a21 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 4 Jun 2014 11:59:46 +0100 Subject: [PATCH 0399/1167] mfd: arizona: Add support for WM8998 and WM1814 Change-Id: Id4683df0cb1692cbcf45071c1bc0e95f7cb93528 Signed-off-by: Richard Fitzgerald --- drivers/mfd/Kconfig | 9 +- drivers/mfd/Makefile | 3 + drivers/mfd/arizona-core.c | 99 +- drivers/mfd/arizona-i2c.c | 8 + drivers/mfd/arizona-irq.c | 9 + drivers/mfd/arizona.h | 5 + drivers/mfd/wm8998-tables.c | 1583 +++++++++++++++++++++++++ include/linux/mfd/arizona/core.h | 5 +- include/linux/mfd/arizona/registers.h | 138 +++ 9 files changed, 1846 insertions(+), 13 deletions(-) create mode 100644 drivers/mfd/wm8998-tables.c diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index e172411f72e..6127dae4aba 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -786,9 +786,6 @@ config MFD_TPS65217 charger, wled and other features that are often used in portable devices. - This driver can also be built as a module. If so, the module - will be called tps65217. - config MFD_TPS6586X bool "TI TPS6586x Power Management chips" depends on I2C=y && GENERIC_HARDIRQS @@ -1047,6 +1044,12 @@ config MFD_FLORIDA Support for Wolfson Microelectronics Florida class low power audio SoC such as the WM8280 +config MFD_WM8998 + bool "Support Wolfson Microelectronics WM8998" + depends on MFD_ARIZONA + help + Support for Wolfson Microelectronics WM8998 low power audio SoC + config MFD_WM8997 bool "Wolfson Microelectronics WM8997" depends on MFD_ARIZONA diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 7ce876bf52c..8fda1f6aad2 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -46,6 +46,9 @@ endif ifneq ($(CONFIG_MFD_WM8997),n) obj-$(CONFIG_MFD_ARIZONA) += wm8997-tables.o endif +ifneq ($(CONFIG_MFD_WM8998),n) +obj-$(CONFIG_MFD_WM8998) += wm8998-tables.o +endif obj-$(CONFIG_MFD_WM8400) += wm8400-core.o wm831x-objs := wm831x-core.o wm831x-irq.o wm831x-otp.o wm831x-objs += wm831x-auxadc.o diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index eb8acf9d6ba..d0138b68a6d 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -107,6 +107,8 @@ int arizona_dvfs_up(struct arizona *arizona, unsigned int flags) switch (arizona->type) { case WM5102: case WM8997: + case WM8998: + case WM1814: ret = regulator_set_voltage(arizona->dcvdd, 1800000, 1800000); if (ret != 0) { @@ -156,6 +158,8 @@ int arizona_dvfs_down(struct arizona *arizona, unsigned int flags) switch (arizona->type) { case WM5102: case WM8997: + case WM8998: + case WM1814: ret = regmap_update_bits(arizona->regmap, ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, ARIZONA_SUBSYS_MAX_FREQ, 0); @@ -232,17 +236,28 @@ static irqreturn_t arizona_underclocked(int irq, void *data) static irqreturn_t arizona_overclocked(int irq, void *data) { struct arizona *arizona = data; - unsigned int val[2]; + unsigned int val[3]; int ret; ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, - &val[0], 2); + &val[0], 3); if (ret != 0) { dev_err(arizona->dev, "Failed to read overclock status: %d\n", ret); return IRQ_NONE; } + switch (arizona->type) { + case WM8998: + case WM1814: + val[0] = ((val[0] & 0x60e0) >> 1) | + ((val[0] & 0x1e00) >> 2) | + (val[0] & 0x000f); + break; + default: + break; + } + if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS) dev_err(arizona->dev, "PWM overclocked\n"); if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS) @@ -285,6 +300,9 @@ static irqreturn_t arizona_overclocked(int irq, void *data) if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) dev_err(arizona->dev, "ISRC1 overclocked\n"); + if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS) + dev_err(arizona->dev, "SPDIF overclocked\n"); + return IRQ_HANDLED; } @@ -941,6 +959,8 @@ const struct of_device_id arizona_of_match[] = { { .compatible = "wlf,wm8280", .data = (void *)WM8280 }, { .compatible = "wlf,wm5110", .data = (void *)WM5110 }, { .compatible = "wlf,wm8997", .data = (void *)WM8997 }, + { .compatible = "wlf,wm8998", .data = (void *)WM8998 }, + { .compatible = "wlf,wm1814", .data = (void *)WM1814 }, {}, }; EXPORT_SYMBOL_GPL(arizona_of_match); @@ -982,6 +1002,15 @@ static struct mfd_cell wm8997_devs[] = { { .name = "wm8997-codec" }, }; +static struct mfd_cell wm8998_devs[] = { + { .name = "arizona-micsupp" }, + { .name = "arizona-extcon" }, + { .name = "arizona-gpio" }, + { .name = "arizona-haptics" }, + { .name = "arizona-pwm" }, + { .name = "wm8998-codec" }, +}; + static const struct { unsigned int enable; unsigned int conf_reg; @@ -1117,7 +1146,7 @@ int arizona_dev_init(struct arizona *arizona) { struct device *dev = arizona->dev; const char *type_name = "Unknown"; - unsigned int reg, val; + unsigned int reg, val, mask; int (*apply_patch)(struct arizona *) = NULL; int ret, i; char revision_char; @@ -1140,6 +1169,8 @@ int arizona_dev_init(struct arizona *arizona) case WM5110: case WM8280: case WM8997: + case WM8998: + case WM1814: for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) arizona->core_supplies[i].supply = wm5102_core_supplies[i]; @@ -1233,6 +1264,7 @@ int arizona_dev_init(struct arizona *arizona) switch (reg) { case 0x5102: case 0x5110: + case 0x6349: case 0x8997: break; default: @@ -1345,6 +1377,27 @@ int arizona_dev_init(struct arizona *arizona) } apply_patch = wm8997_patch; break; +#endif +#ifdef CONFIG_MFD_WM8998 + case 0x6349: + switch (arizona->type) { + case WM8998: + type_name = "WM8998"; + break; + + case WM1814: + type_name = "WM1814"; + break; + + default: + dev_err(arizona->dev, + "Unknown Vegas codec registered as WM8998\n"); + arizona->type = WM8998; + } + + apply_patch = wm8998_patch; + revision_char = arizona->rev + 'A'; + break; #endif default: dev_err(arizona->dev, "Unknown device ID %x\n", reg); @@ -1460,14 +1513,37 @@ int arizona_dev_init(struct arizona *arizona) << ARIZONA_IN1_DMIC_SUP_SHIFT; val |= (arizona->pdata.inmode[i] & 2) << (ARIZONA_IN1_MODE_SHIFT - 1); - val |= (arizona->pdata.inmode[i] & 1) - << ARIZONA_IN1_SINGLE_ENDED_SHIFT; + + switch (arizona->type) { + case WM8998: + case WM1814: + regmap_update_bits(arizona->regmap, + ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 8), + ARIZONA_IN1L_SRC_SE_MASK, + (arizona->pdata.inmode[i] & 1) + << ARIZONA_IN1L_SRC_SE_SHIFT); + + regmap_update_bits(arizona->regmap, + ARIZONA_ADC_DIGITAL_VOLUME_1R + (i * 8), + ARIZONA_IN1R_SRC_SE_MASK, + (arizona->pdata.inmode[i] & 1) + << ARIZONA_IN1R_SRC_SE_SHIFT); + + mask = ARIZONA_IN1_DMIC_SUP_MASK | + ARIZONA_IN1_MODE_MASK; + break; + default: + val |= (arizona->pdata.inmode[i] & 1) + << ARIZONA_IN1_SINGLE_ENDED_SHIFT; + + mask = ARIZONA_IN1_DMIC_SUP_MASK | + ARIZONA_IN1_MODE_MASK | + ARIZONA_IN1_SINGLE_ENDED_MASK; + break; + } regmap_update_bits(arizona->regmap, - ARIZONA_IN1L_CONTROL + (i * 8), - ARIZONA_IN1_DMIC_SUP_MASK | - ARIZONA_IN1_MODE_MASK | - ARIZONA_IN1_SINGLE_ENDED_MASK, val); + ARIZONA_IN1L_CONTROL + (i * 8), mask, val); } for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) { @@ -1529,6 +1605,11 @@ int arizona_dev_init(struct arizona *arizona) ret = mfd_add_devices(arizona->dev, -1, wm8997_devs, ARRAY_SIZE(wm8997_devs), NULL, 0, NULL); break; + case WM8998: + case WM1814: + ret = mfd_add_devices(arizona->dev, -1, wm8998_devs, + ARRAY_SIZE(wm8998_devs), NULL, 0, NULL); + break; } if (ret != 0) { diff --git a/drivers/mfd/arizona-i2c.c b/drivers/mfd/arizona-i2c.c index 7f684bfb007..7c97cb8eb8a 100644 --- a/drivers/mfd/arizona-i2c.c +++ b/drivers/mfd/arizona-i2c.c @@ -50,6 +50,12 @@ static int arizona_i2c_probe(struct i2c_client *i2c, case WM8997: regmap_config = &wm8997_i2c_regmap; break; +#endif +#ifdef CONFIG_MFD_WM8998 + case WM8998: + case WM1814: + regmap_config = &wm8998_i2c_regmap; + break; #endif default: dev_err(&i2c->dev, "Unknown device type %ld\n", @@ -89,6 +95,8 @@ static const struct i2c_device_id arizona_i2c_id[] = { { "wm8281", WM8280 }, { "wm5110", WM5110 }, { "wm8997", WM8997 }, + { "wm8998", WM8998 }, + { "wm1814", WM1814 }, { } }; MODULE_DEVICE_TABLE(i2c, arizona_i2c_id); diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index 8fdf6edb065..e44c7de7f9e 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -216,6 +216,15 @@ int arizona_irq_init(struct arizona *arizona) ctrlif_error = false; break; #endif +#ifdef CONFIG_MFD_WM8998 + case WM8998: + case WM1814: + aod = &wm8998_aod; + irq = &wm8998_irq; + + ctrlif_error = false; + break; +#endif default: BUG_ON("Unknown Arizona class device" == NULL); return -EINVAL; diff --git a/drivers/mfd/arizona.h b/drivers/mfd/arizona.h index 0443fe92e14..84456f6e004 100644 --- a/drivers/mfd/arizona.h +++ b/drivers/mfd/arizona.h @@ -27,6 +27,8 @@ extern const struct regmap_config florida_spi_regmap; extern const struct regmap_config wm8997_i2c_regmap; +extern const struct regmap_config wm8998_i2c_regmap; + extern const struct dev_pm_ops arizona_pm_ops; extern const struct of_device_id arizona_of_match[]; @@ -40,6 +42,9 @@ extern const struct regmap_irq_chip florida_irq; extern const struct regmap_irq_chip wm8997_aod; extern const struct regmap_irq_chip wm8997_irq; +extern struct regmap_irq_chip wm8998_aod; +extern struct regmap_irq_chip wm8998_irq; + int arizona_dev_init(struct arizona *arizona); int arizona_dev_exit(struct arizona *arizona); int arizona_irq_init(struct arizona *arizona); diff --git a/drivers/mfd/wm8998-tables.c b/drivers/mfd/wm8998-tables.c new file mode 100644 index 00000000000..710deed15ed --- /dev/null +++ b/drivers/mfd/wm8998-tables.c @@ -0,0 +1,1583 @@ +/* + * wm8998-tables.c -- data tables for wm8998-class codecs + * + * Copyright 2014 Wolfson Microelectronics plc + * + * Author: Richard Fitzgerald + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include + +#include +#include +#include + +#include "arizona.h" + +#define WM8998_NUM_AOD_ISR 2 +#define WM8998_NUM_ISR 5 + +static const struct reg_default wm8998_rev_a_patch[] = { + { 0x0212, 0x0000 }, + { 0x0211, 0x0014 }, + { 0x04E4, 0x0E0D }, + { 0x04E5, 0x0E0D }, + { 0x04E6, 0x0E0D }, + { 0x04EB, 0x060E }, + { 0x0441, 0xC759 }, + { 0x0442, 0x2A08 }, + { 0x0443, 0x5CFA }, + { 0x026E, 0x0064 }, + { 0x026F, 0x00EA }, + { 0x0270, 0x1F16 }, + { 0x0410, 0x2080 }, + { 0x0418, 0x2080 }, + { 0x0420, 0x2080 }, + { 0x04B8, 0x1120 }, + { 0x047E, 0x080E }, +}; + +/* We use a function so we can use ARRAY_SIZE() */ +int wm8998_patch(struct arizona *arizona) +{ + return regmap_register_patch(arizona->regmap, + wm8998_rev_a_patch, + ARRAY_SIZE(wm8998_rev_a_patch)); +} +EXPORT_SYMBOL_GPL(wm8998_patch); + +static const struct regmap_irq wm8998_aod_irqs[ARIZONA_NUM_IRQ] = { + [ARIZONA_IRQ_MICD_CLAMP_FALL] = { + .mask = ARIZONA_MICD_CLAMP_FALL_EINT1 + }, + [ARIZONA_IRQ_MICD_CLAMP_RISE] = { + .mask = ARIZONA_MICD_CLAMP_RISE_EINT1 + }, + [ARIZONA_IRQ_GP5_FALL] = { .mask = ARIZONA_GP5_FALL_EINT1 }, + [ARIZONA_IRQ_GP5_RISE] = { .mask = ARIZONA_GP5_RISE_EINT1 }, + [ARIZONA_IRQ_JD_FALL] = { .mask = ARIZONA_JD1_FALL_EINT1 }, + [ARIZONA_IRQ_JD_RISE] = { .mask = ARIZONA_JD1_RISE_EINT1 }, +}; + +struct regmap_irq_chip wm8998_aod = { + .name = "wm8998 AOD", + .status_base = ARIZONA_AOD_IRQ1, + .mask_base = ARIZONA_AOD_IRQ_MASK_IRQ1, + .ack_base = ARIZONA_AOD_IRQ1, + .num_regs = 1, + .irqs = wm8998_aod_irqs, + .num_irqs = ARRAY_SIZE(wm8998_aod_irqs), +}; +EXPORT_SYMBOL_GPL(wm8998_aod); + +static const struct regmap_irq wm8998_irqs[ARIZONA_NUM_IRQ] = { + [ARIZONA_IRQ_GP4] = { .reg_offset = 0, .mask = ARIZONA_GP4_EINT1 }, + [ARIZONA_IRQ_GP3] = { .reg_offset = 0, .mask = ARIZONA_GP3_EINT1 }, + [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 }, + [ARIZONA_IRQ_GP1] = { .reg_offset = 0, .mask = ARIZONA_GP1_EINT1 }, + + [ARIZONA_IRQ_SPK_SHUTDOWN_WARN] = { + .reg_offset = 2, .mask = ARIZONA_SPK_SHUTDOWN_WARN_EINT1 + }, + [ARIZONA_IRQ_SPK_SHUTDOWN] = { + .reg_offset = 2, .mask = ARIZONA_SPK_SHUTDOWN_EINT1 + }, + [ARIZONA_IRQ_HPDET] = { + .reg_offset = 2, .mask = ARIZONA_HPDET_EINT1 + }, + [ARIZONA_IRQ_MICDET] = { + .reg_offset = 2, .mask = ARIZONA_MICDET_EINT1 + }, + [ARIZONA_IRQ_WSEQ_DONE] = { + .reg_offset = 2, .mask = ARIZONA_WSEQ_DONE_EINT1 + }, + [ARIZONA_IRQ_DRC1_SIG_DET] = { + .reg_offset = 2, .mask = ARIZONA_DRC1_SIG_DET_EINT1 + }, + [ARIZONA_IRQ_ASRC2_LOCK] = { + .reg_offset = 2, .mask = ARIZONA_ASRC2_LOCK_EINT1 + }, + [ARIZONA_IRQ_ASRC1_LOCK] = { + .reg_offset = 2, .mask = ARIZONA_ASRC1_LOCK_EINT1 + }, + [ARIZONA_IRQ_UNDERCLOCKED] = { + .reg_offset = 2, .mask = ARIZONA_UNDERCLOCKED_EINT1 + }, + [ARIZONA_IRQ_OVERCLOCKED] = { + .reg_offset = 2, .mask = ARIZONA_OVERCLOCKED_EINT1 + }, + [ARIZONA_IRQ_FLL2_LOCK] = { + .reg_offset = 2, .mask = ARIZONA_FLL2_LOCK_EINT1 + }, + [ARIZONA_IRQ_FLL1_LOCK] = { + .reg_offset = 2, .mask = ARIZONA_FLL1_LOCK_EINT1 + }, + [ARIZONA_IRQ_CLKGEN_ERR] = { + .reg_offset = 2, .mask = ARIZONA_CLKGEN_ERR_EINT1 + }, + [ARIZONA_IRQ_CLKGEN_ERR_ASYNC] = { + .reg_offset = 2, .mask = ARIZONA_CLKGEN_ERR_ASYNC_EINT1 + }, + + [ARIZONA_IRQ_ASRC_CFG_ERR] = { + .reg_offset = 3, .mask = ARIZONA_ASRC_CFG_ERR_EINT1 + }, + [ARIZONA_IRQ_AIF3_ERR] = { + .reg_offset = 3, .mask = ARIZONA_AIF3_ERR_EINT1 + }, + [ARIZONA_IRQ_AIF2_ERR] = { + .reg_offset = 3, .mask = ARIZONA_AIF2_ERR_EINT1 + }, + [ARIZONA_IRQ_AIF1_ERR] = { + .reg_offset = 3, .mask = ARIZONA_AIF1_ERR_EINT1 + }, + [ARIZONA_IRQ_CTRLIF_ERR] = { + .reg_offset = 3, .mask = ARIZONA_CTRLIF_ERR_EINT1 + }, + [ARIZONA_IRQ_MIXER_DROPPED_SAMPLES] = { + .reg_offset = 3, .mask = ARIZONA_MIXER_DROPPED_SAMPLE_EINT1 + }, + [ARIZONA_IRQ_ASYNC_CLK_ENA_LOW] = { + .reg_offset = 3, .mask = ARIZONA_ASYNC_CLK_ENA_LOW_EINT1 + }, + [ARIZONA_IRQ_SYSCLK_ENA_LOW] = { + .reg_offset = 3, .mask = ARIZONA_SYSCLK_ENA_LOW_EINT1 + }, + [ARIZONA_IRQ_ISRC1_CFG_ERR] = { + .reg_offset = 3, .mask = ARIZONA_ISRC1_CFG_ERR_EINT1 + }, + [ARIZONA_IRQ_ISRC2_CFG_ERR] = { + .reg_offset = 3, .mask = ARIZONA_ISRC2_CFG_ERR_EINT1 + }, + + [ARIZONA_IRQ_BOOT_DONE] = { + .reg_offset = 4, .mask = ARIZONA_BOOT_DONE_EINT1 + }, + [ARIZONA_IRQ_FLL2_CLOCK_OK] = { + .reg_offset = 4, .mask = ARIZONA_FLL2_CLOCK_OK_EINT1 + }, + [ARIZONA_IRQ_FLL1_CLOCK_OK] = { + .reg_offset = 4, .mask = ARIZONA_FLL1_CLOCK_OK_EINT1 + }, +}; + +struct regmap_irq_chip wm8998_irq = { + .name = "wm8998 IRQ", + .status_base = ARIZONA_INTERRUPT_STATUS_1, + .mask_base = ARIZONA_INTERRUPT_STATUS_1_MASK, + .ack_base = ARIZONA_INTERRUPT_STATUS_1, + .num_regs = 5, + .irqs = wm8998_irqs, + .num_irqs = ARRAY_SIZE(wm8998_irqs), +}; +EXPORT_SYMBOL_GPL(wm8998_irq); + +static const struct reg_default wm8998_reg_default[] = { + { 0x00000009, 0x0001 }, /* R9 - Ctrl IF I2C1 CFG 1 */ + { 0x0000000B, 0x001A }, /* R11 - Ctrl IF I2C1 CFG 2 */ + { 0x00000016, 0x0000 }, /* R22 - Write Sequencer Ctrl 0 */ + { 0x00000017, 0x0000 }, /* R23 - Write Sequencer Ctrl 1 */ + { 0x00000018, 0x0000 }, /* R24 - Write Sequencer Ctrl 2 */ + { 0x00000020, 0x0000 }, /* R32 - Tone Generator 1 */ + { 0x00000021, 0x1000 }, /* R33 - Tone Generator 2 */ + { 0x00000022, 0x0000 }, /* R34 - Tone Generator 3 */ + { 0x00000023, 0x1000 }, /* R35 - Tone Generator 4 */ + { 0x00000024, 0x0000 }, /* R36 - Tone Generator 5 */ + { 0x00000030, 0x0000 }, /* R48 - PWM Drive 1 */ + { 0x00000031, 0x0100 }, /* R49 - PWM Drive 2 */ + { 0x00000032, 0x0100 }, /* R50 - PWM Drive 3 */ + { 0x00000040, 0x0000 }, /* R64 - Wake control */ + { 0x00000041, 0x0000 }, /* R65 - Sequence control */ + { 0x00000061, 0x01FF }, /* R97 - Sample Rate Sequence Select 1 */ + { 0x00000062, 0x01FF }, /* R98 - Sample Rate Sequence Select 2 */ + { 0x00000063, 0x01FF }, /* R99 - Sample Rate Sequence Select 3 */ + { 0x00000064, 0x01FF }, /* R100 - Sample Rate Sequence Select 4 */ + { 0x00000066, 0x01FF }, /* R102 - Always On Triggers Sequence Select 1 */ + { 0x00000067, 0x01FF }, /* R103 - Always On Triggers Sequence Select 2 */ + { 0x00000068, 0x01FF }, /* R104 - Always On Triggers Sequence Select 3 */ + { 0x00000069, 0x01FF }, /* R105 - Always On Triggers Sequence Select 4 */ + { 0x0000006A, 0x01FF }, /* R106 - Always On Triggers Sequence Select 5 */ + { 0x0000006B, 0x01FF }, /* R107 - Always On Triggers Sequence Select 6 */ + { 0x0000006E, 0x01FF }, /* R110 - Trigger Sequence Select 32 */ + { 0x0000006F, 0x01FF }, /* R111 - Trigger Sequence Select 33 */ + { 0x00000090, 0x0000 }, /* R144 - Haptics Control 1 */ + { 0x00000091, 0x7FFF }, /* R145 - Haptics Control 2 */ + { 0x00000092, 0x0000 }, /* R146 - Haptics phase 1 intensity */ + { 0x00000093, 0x0000 }, /* R147 - Haptics phase 1 duration */ + { 0x00000094, 0x0000 }, /* R148 - Haptics phase 2 intensity */ + { 0x00000095, 0x0000 }, /* R149 - Haptics phase 2 duration */ + { 0x00000096, 0x0000 }, /* R150 - Haptics phase 3 intensity */ + { 0x00000097, 0x0000 }, /* R151 - Haptics phase 3 duration */ + { 0x00000100, 0x0002 }, /* R256 - Clock 32k 1 */ + { 0x00000101, 0x0304 }, /* R257 - System Clock 1 */ + { 0x00000102, 0x0011 }, /* R258 - Sample rate 1 */ + { 0x00000103, 0x0011 }, /* R259 - Sample rate 2 */ + { 0x00000104, 0x0011 }, /* R260 - Sample rate 3 */ + { 0x00000112, 0x0305 }, /* R274 - Async clock 1 */ + { 0x00000113, 0x0011 }, /* R275 - Async sample rate 1 */ + { 0x00000149, 0x0000 }, /* R329 - Output system clock */ + { 0x0000014A, 0x0000 }, /* R330 - Output async clock */ + { 0x00000152, 0x0000 }, /* R338 - Rate Estimator 1 */ + { 0x00000153, 0x0000 }, /* R339 - Rate Estimator 2 */ + { 0x00000154, 0x0000 }, /* R340 - Rate Estimator 3 */ + { 0x00000155, 0x0000 }, /* R341 - Rate Estimator 4 */ + { 0x00000156, 0x0000 }, /* R342 - Rate Estimator 5 */ + { 0x00000161, 0x0000 }, /* R353 - Dynamic Frequency Scaling 1 */ + { 0x00000171, 0x0002 }, /* R369 - FLL1 Control 1 */ + { 0x00000172, 0x0008 }, /* R370 - FLL1 Control 2 */ + { 0x00000173, 0x0018 }, /* R371 - FLL1 Control 3 */ + { 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */ + { 0x00000175, 0x0004 }, /* R373 - FLL1 Control 5 */ + { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */ + { 0x00000177, 0x0181 }, /* R375 - FLL1 Loop Filter Test 1 */ + { 0x00000178, 0x0000 }, /* R376 - FLL1 NCO Test 0 */ + { 0x00000179, 0x0000 }, /* R377 - FLL1 Control 7 */ + { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */ + { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */ + { 0x00000183, 0x0000 }, /* R387 - FLL1 Synchroniser 3 */ + { 0x00000184, 0x0000 }, /* R388 - FLL1 Synchroniser 4 */ + { 0x00000185, 0x0000 }, /* R389 - FLL1 Synchroniser 5 */ + { 0x00000186, 0x0000 }, /* R390 - FLL1 Synchroniser 6 */ + { 0x00000187, 0x0001 }, /* R391 - FLL1 Synchroniser 7 */ + { 0x00000189, 0x0000 }, /* R393 - FLL1 Spread Spectrum */ + { 0x0000018A, 0x0004 }, /* R394 - FLL1 GPIO Clock */ + { 0x00000191, 0x0000 }, /* R401 - FLL2 Control 1 */ + { 0x00000192, 0x0008 }, /* R402 - FLL2 Control 2 */ + { 0x00000193, 0x0018 }, /* R403 - FLL2 Control 3 */ + { 0x00000194, 0x007D }, /* R404 - FLL2 Control 4 */ + { 0x00000195, 0x0004 }, /* R405 - FLL2 Control 5 */ + { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */ + { 0x00000197, 0x0000 }, /* R407 - FLL2 Loop Filter Test 1 */ + { 0x00000198, 0x0000 }, /* R408 - FLL2 NCO Test 0 */ + { 0x00000199, 0x0000 }, /* R409 - FLL2 Control 7 */ + { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */ + { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */ + { 0x000001A3, 0x0000 }, /* R419 - FLL2 Synchroniser 3 */ + { 0x000001A4, 0x0000 }, /* R420 - FLL2 Synchroniser 4 */ + { 0x000001A5, 0x0000 }, /* R421 - FLL2 Synchroniser 5 */ + { 0x000001A6, 0x0000 }, /* R422 - FLL2 Synchroniser 6 */ + { 0x000001A7, 0x0001 }, /* R423 - FLL2 Synchroniser 7 */ + { 0x000001A9, 0x0000 }, /* R425 - FLL2 Spread Spectrum */ + { 0x000001AA, 0x0004 }, /* R426 - FLL2 GPIO Clock */ + { 0x00000200, 0x0006 }, /* R512 - Mic Charge Pump 1 */ + { 0x00000210, 0x00D4 }, /* R528 - LDO1 Control 1 */ + { 0x00000212, 0x0000 }, /* R530 - LDO1 Control 2 */ + { 0x00000213, 0x0344 }, /* R531 - LDO2 Control 1 */ + { 0x00000218, 0x01A6 }, /* R536 - Mic Bias Ctrl 1 */ + { 0x00000219, 0x01A6 }, /* R537 - Mic Bias Ctrl 2 */ + { 0x0000021A, 0x01A6 }, /* R538 - Mic Bias Ctrl 3 */ + { 0x00000293, 0x0080 }, /* R659 - Accessory Detect Mode 1 */ + { 0x0000029B, 0x0000 }, /* R667 - Headphone Detect 1 */ + { 0x0000029C, 0x0000 }, /* R668 - Headphone Detect 2 */ + { 0x000002A2, 0x0000 }, /* R674 - Micd Clamp control */ + { 0x000002A3, 0x1102 }, /* R675 - Mic Detect 1 */ + { 0x000002A4, 0x009F }, /* R676 - Mic Detect 2 */ + { 0x000002A5, 0x0000 }, /* R677 - Mic Detect 3 */ + { 0x000002A6, 0x3737 }, /* R678 - Mic Detect Level 1 */ + { 0x000002A7, 0x2C37 }, /* R679 - Mic Detect Level 2 */ + { 0x000002A8, 0x1422 }, /* R680 - Mic Detect Level 3 */ + { 0x000002A9, 0x030A }, /* R681 - Mic Detect Level 4 */ + { 0x000002AB, 0x0000 }, /* R683 - Mic Detect 4 */ + { 0x000002CB, 0x0000 }, /* R715 - Isolation control */ + { 0x000002D3, 0x0000 }, /* R723 - Jack detect analogue */ + { 0x00000300, 0x0000 }, /* R768 - Input Enables */ + { 0x00000308, 0x0000 }, /* R776 - Input Rate */ + { 0x00000309, 0x0022 }, /* R777 - Input Volume Ramp */ + { 0x0000030C, 0x0002 }, /* R780 - HPF Control */ + { 0x00000310, 0x2080 }, /* R784 - IN1L Control */ + { 0x00000311, 0x0180 }, /* R785 - ADC Digital Volume 1L */ + { 0x00000312, 0x0000 }, /* R786 - DMIC1L Control */ + { 0x00000314, 0x0080 }, /* R788 - IN1R Control */ + { 0x00000315, 0x0180 }, /* R789 - ADC Digital Volume 1R */ + { 0x00000316, 0x0000 }, /* R790 - DMIC1R Control */ + { 0x00000318, 0x2080 }, /* R792 - IN2L Control */ + { 0x00000319, 0x0180 }, /* R793 - ADC Digital Volume 2L */ + { 0x0000031A, 0x0000 }, /* R794 - DMIC2L Control */ + { 0x00000400, 0x0000 }, /* R1024 - Output Enables 1 */ + { 0x00000408, 0x0000 }, /* R1032 - Output Rate 1 */ + { 0x00000409, 0x0022 }, /* R1033 - Output Volume Ramp */ + { 0x00000410, 0x2080 }, /* R1040 - Output Path Config 1L */ + { 0x00000411, 0x0180 }, /* R1041 - DAC Digital Volume 1L */ + { 0x00000413, 0x0001 }, /* R1043 - Noise Gate Select 1L */ + { 0x00000414, 0x0080 }, /* R1044 - Output Path Config 1R */ + { 0x00000415, 0x0180 }, /* R1045 - DAC Digital Volume 1R */ + { 0x00000417, 0x0002 }, /* R1047 - Noise Gate Select 1R */ + { 0x00000418, 0x2080 }, /* R1048 - Output Path Config 2L */ + { 0x00000419, 0x0180 }, /* R1049 - DAC Digital Volume 2L */ + { 0x0000041B, 0x0004 }, /* R1051 - Noise Gate Select 2L */ + { 0x0000041C, 0x0080 }, /* R1052 - Output Path Config 2R */ + { 0x0000041D, 0x0180 }, /* R1053 - DAC Digital Volume 2R */ + { 0x0000041F, 0x0008 }, /* R1055 - Noise Gate Select 2R */ + { 0x00000420, 0x2080 }, /* R1056 - Output Path Config 3L */ + { 0x00000421, 0x0180 }, /* R1057 - DAC Digital Volume 3L */ + { 0x00000423, 0x0010 }, /* R1059 - Noise Gate Select 3L */ + { 0x00000428, 0x0000 }, /* R1064 - Output Path Config 4L */ + { 0x00000429, 0x0180 }, /* R1065 - DAC Digital Volume 4L */ + { 0x0000042B, 0x0040 }, /* R1067 - Noise Gate Select 4L */ + { 0x0000042C, 0x0000 }, /* R1068 - Output Path Config 4R */ + { 0x0000042D, 0x0180 }, /* R1069 - DAC Digital Volume 4R */ + { 0x0000042F, 0x0080 }, /* R1071 - Noise Gate Select 4R */ + { 0x00000430, 0x0000 }, /* R1072 - Output Path Config 5L */ + { 0x00000431, 0x0180 }, /* R1073 - DAC Digital Volume 5L */ + { 0x00000433, 0x0100 }, /* R1075 - Noise Gate Select 5L */ + { 0x00000434, 0x0000 }, /* R1076 - Output Path Config 5R */ + { 0x00000435, 0x0180 }, /* R1077 - DAC Digital Volume 5R */ + { 0x00000437, 0x0200 }, /* R1079 - Noise Gate Select 5R */ + { 0x00000441, 0xC759 }, /* R1089 - DRE Control 1 */ + { 0x00000442, 0x2A08 }, /* R1089 - DRE Control 2 */ + { 0x00000443, 0x5CFA }, /* R1089 - DRE Control 3 */ + { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */ + { 0x00000451, 0x0000 }, /* R1105 - DAC AEC Control 2 */ + { 0x00000458, 0x0000 }, /* R1112 - Noise Gate Control */ + { 0x00000490, 0x0069 }, /* R1168 - PDM SPK1 CTRL 1 */ + { 0x00000491, 0x0000 }, /* R1169 - PDM SPK1 CTRL 2 */ + { 0x0000049A, 0x0000 }, /* R1178 - HP_TEST_CTRL_13 */ + { 0x00000500, 0x000C }, /* R1280 - AIF1 BCLK Ctrl */ + { 0x00000501, 0x0008 }, /* R1281 - AIF1 Tx Pin Ctrl */ + { 0x00000502, 0x0000 }, /* R1282 - AIF1 Rx Pin Ctrl */ + { 0x00000503, 0x0000 }, /* R1283 - AIF1 Rate Ctrl */ + { 0x00000504, 0x0000 }, /* R1284 - AIF1 Format */ + { 0x00000506, 0x0040 }, /* R1286 - AIF1 Rx BCLK Rate */ + { 0x00000507, 0x1818 }, /* R1287 - AIF1 Frame Ctrl 1 */ + { 0x00000508, 0x1818 }, /* R1288 - AIF1 Frame Ctrl 2 */ + { 0x00000509, 0x0000 }, /* R1289 - AIF1 Frame Ctrl 3 */ + { 0x0000050A, 0x0001 }, /* R1290 - AIF1 Frame Ctrl 4 */ + { 0x0000050B, 0x0002 }, /* R1291 - AIF1 Frame Ctrl 5 */ + { 0x0000050C, 0x0003 }, /* R1292 - AIF1 Frame Ctrl 6 */ + { 0x0000050D, 0x0004 }, /* R1293 - AIF1 Frame Ctrl 7 */ + { 0x0000050E, 0x0005 }, /* R1294 - AIF1 Frame Ctrl 8 */ + { 0x00000511, 0x0000 }, /* R1297 - AIF1 Frame Ctrl 11 */ + { 0x00000512, 0x0001 }, /* R1298 - AIF1 Frame Ctrl 12 */ + { 0x00000513, 0x0002 }, /* R1299 - AIF1 Frame Ctrl 13 */ + { 0x00000514, 0x0003 }, /* R1300 - AIF1 Frame Ctrl 14 */ + { 0x00000515, 0x0004 }, /* R1301 - AIF1 Frame Ctrl 15 */ + { 0x00000516, 0x0005 }, /* R1302 - AIF1 Frame Ctrl 16 */ + { 0x00000519, 0x0000 }, /* R1305 - AIF1 Tx Enables */ + { 0x0000051A, 0x0000 }, /* R1306 - AIF1 Rx Enables */ + { 0x00000540, 0x000C }, /* R1344 - AIF2 BCLK Ctrl */ + { 0x00000541, 0x0008 }, /* R1345 - AIF2 Tx Pin Ctrl */ + { 0x00000542, 0x0000 }, /* R1346 - AIF2 Rx Pin Ctrl */ + { 0x00000543, 0x0000 }, /* R1347 - AIF2 Rate Ctrl */ + { 0x00000544, 0x0000 }, /* R1348 - AIF2 Format */ + { 0x00000546, 0x0040 }, /* R1350 - AIF2 Rx BCLK Rate */ + { 0x00000547, 0x1818 }, /* R1351 - AIF2 Frame Ctrl 1 */ + { 0x00000548, 0x1818 }, /* R1352 - AIF2 Frame Ctrl 2 */ + { 0x00000549, 0x0000 }, /* R1353 - AIF2 Frame Ctrl 3 */ + { 0x0000054A, 0x0001 }, /* R1354 - AIF2 Frame Ctrl 4 */ + { 0x0000054B, 0x0002 }, /* R1355 - AIF2 Frame Ctrl 5 */ + { 0x0000054C, 0x0003 }, /* R1356 - AIF2 Frame Ctrl 6 */ + { 0x0000054D, 0x0004 }, /* R1357 - AIF2 Frame Ctrl 7 */ + { 0x0000054E, 0x0005 }, /* R1358 - AIF2 Frame Ctrl 8 */ + { 0x00000551, 0x0000 }, /* R1361 - AIF2 Frame Ctrl 11 */ + { 0x00000552, 0x0001 }, /* R1362 - AIF2 Frame Ctrl 12 */ + { 0x00000553, 0x0002 }, /* R1363 - AIF2 Frame Ctrl 13 */ + { 0x00000554, 0x0003 }, /* R1364 - AIF2 Frame Ctrl 14 */ + { 0x00000555, 0x0004 }, /* R1365 - AIF2 Frame Ctrl 15 */ + { 0x00000556, 0x0005 }, /* R1366 - AIF2 Frame Ctrl 16 */ + { 0x00000559, 0x0000 }, /* R1369 - AIF2 Tx Enables */ + { 0x0000055A, 0x0000 }, /* R1370 - AIF2 Rx Enables */ + { 0x00000580, 0x000C }, /* R1408 - AIF3 BCLK Ctrl */ + { 0x00000581, 0x0008 }, /* R1409 - AIF3 Tx Pin Ctrl */ + { 0x00000582, 0x0000 }, /* R1410 - AIF3 Rx Pin Ctrl */ + { 0x00000583, 0x0000 }, /* R1411 - AIF3 Rate Ctrl */ + { 0x00000584, 0x0000 }, /* R1412 - AIF3 Format */ + { 0x00000586, 0x0040 }, /* R1414 - AIF3 Rx BCLK Rate */ + { 0x00000587, 0x1818 }, /* R1415 - AIF3 Frame Ctrl 1 */ + { 0x00000588, 0x1818 }, /* R1416 - AIF3 Frame Ctrl 2 */ + { 0x00000589, 0x0000 }, /* R1417 - AIF3 Frame Ctrl 3 */ + { 0x0000058A, 0x0001 }, /* R1418 - AIF3 Frame Ctrl 4 */ + { 0x00000591, 0x0000 }, /* R1425 - AIF3 Frame Ctrl 11 */ + { 0x00000592, 0x0001 }, /* R1426 - AIF3 Frame Ctrl 12 */ + { 0x00000599, 0x0000 }, /* R1433 - AIF3 Tx Enables */ + { 0x0000059A, 0x0000 }, /* R1434 - AIF3 Rx Enables */ + { 0x000005C2, 0x0000 }, /* R1474 - SPD1 TX Control */ + { 0x000005C3, 0x0000 }, /* R1475 - SPD1 TX Channel Status 1 */ + { 0x000005C4, 0x0B01 }, /* R1476 - SPD1 TX Channel Status 2 */ + { 0x000005C5, 0x0000 }, /* R1477 - SPD1 TX Channel Status 3 */ + { 0x000005E3, 0x0004 }, /* R1507 - SLIMbus Framer Ref Gear */ + { 0x000005E5, 0x0000 }, /* R1509 - SLIMbus Rates 1 */ + { 0x000005E6, 0x0000 }, /* R1510 - SLIMbus Rates 2 */ + { 0x000005E9, 0x0000 }, /* R1513 - SLIMbus Rates 5 */ + { 0x000005EA, 0x0000 }, /* R1514 - SLIMbus Rates 6 */ + { 0x000005EB, 0x0000 }, /* R1515 - SLIMbus Rates 7 */ + { 0x000005F5, 0x0000 }, /* R1525 - SLIMbus RX Channel Enable */ + { 0x000005F6, 0x0000 }, /* R1526 - SLIMbus TX Channel Enable */ + { 0x00000640, 0x0000 }, /* R1600 - PWM1MIX Input 1 Source */ + { 0x00000641, 0x0080 }, /* R1601 - PWM1MIX Input 1 Volume */ + { 0x00000642, 0x0000 }, /* R1602 - PWM1MIX Input 2 Source */ + { 0x00000643, 0x0080 }, /* R1603 - PWM1MIX Input 2 Volume */ + { 0x00000644, 0x0000 }, /* R1604 - PWM1MIX Input 3 Source */ + { 0x00000645, 0x0080 }, /* R1605 - PWM1MIX Input 3 Volume */ + { 0x00000646, 0x0000 }, /* R1606 - PWM1MIX Input 4 Source */ + { 0x00000647, 0x0080 }, /* R1607 - PWM1MIX Input 4 Volume */ + { 0x00000648, 0x0000 }, /* R1608 - PWM2MIX Input 1 Source */ + { 0x00000649, 0x0080 }, /* R1609 - PWM2MIX Input 1 Volume */ + { 0x0000064A, 0x0000 }, /* R1610 - PWM2MIX Input 2 Source */ + { 0x0000064B, 0x0080 }, /* R1611 - PWM2MIX Input 2 Volume */ + { 0x0000064C, 0x0000 }, /* R1612 - PWM2MIX Input 3 Source */ + { 0x0000064D, 0x0080 }, /* R1613 - PWM2MIX Input 3 Volume */ + { 0x0000064E, 0x0000 }, /* R1614 - PWM2MIX Input 4 Source */ + { 0x0000064F, 0x0080 }, /* R1615 - PWM2MIX Input 4 Volume */ + { 0x00000680, 0x0000 }, /* R1664 - OUT1LMIX Input 1 Source */ + { 0x00000681, 0x0080 }, /* R1665 - OUT1LMIX Input 1 Volume */ + { 0x00000682, 0x0000 }, /* R1666 - OUT1LMIX Input 2 Source */ + { 0x00000683, 0x0080 }, /* R1667 - OUT1LMIX Input 2 Volume */ + { 0x00000684, 0x0000 }, /* R1668 - OUT1LMIX Input 3 Source */ + { 0x00000685, 0x0080 }, /* R1669 - OUT1LMIX Input 3 Volume */ + { 0x00000686, 0x0000 }, /* R1670 - OUT1LMIX Input 4 Source */ + { 0x00000687, 0x0080 }, /* R1671 - OUT1LMIX Input 4 Volume */ + { 0x00000688, 0x0000 }, /* R1672 - OUT1RMIX Input 1 Source */ + { 0x00000689, 0x0080 }, /* R1673 - OUT1RMIX Input 1 Volume */ + { 0x0000068A, 0x0000 }, /* R1674 - OUT1RMIX Input 2 Source */ + { 0x0000068B, 0x0080 }, /* R1675 - OUT1RMIX Input 2 Volume */ + { 0x0000068C, 0x0000 }, /* R1676 - OUT1RMIX Input 3 Source */ + { 0x0000068D, 0x0080 }, /* R1677 - OUT1RMIX Input 3 Volume */ + { 0x0000068E, 0x0000 }, /* R1678 - OUT1RMIX Input 4 Source */ + { 0x0000068F, 0x0080 }, /* R1679 - OUT1RMIX Input 4 Volume */ + { 0x00000690, 0x0000 }, /* R1680 - OUT2LMIX Input 1 Source */ + { 0x00000691, 0x0080 }, /* R1681 - OUT2LMIX Input 1 Volume */ + { 0x00000692, 0x0000 }, /* R1682 - OUT2LMIX Input 2 Source */ + { 0x00000693, 0x0080 }, /* R1683 - OUT2LMIX Input 2 Volume */ + { 0x00000694, 0x0000 }, /* R1684 - OUT2LMIX Input 3 Source */ + { 0x00000695, 0x0080 }, /* R1685 - OUT2LMIX Input 3 Volume */ + { 0x00000696, 0x0000 }, /* R1686 - OUT2LMIX Input 4 Source */ + { 0x00000697, 0x0080 }, /* R1687 - OUT2LMIX Input 4 Volume */ + { 0x00000698, 0x0000 }, /* R1688 - OUT2RMIX Input 1 Source */ + { 0x00000699, 0x0080 }, /* R1689 - OUT2RMIX Input 1 Volume */ + { 0x0000069A, 0x0000 }, /* R1690 - OUT2RMIX Input 2 Source */ + { 0x0000069B, 0x0080 }, /* R1691 - OUT2RMIX Input 2 Volume */ + { 0x0000069C, 0x0000 }, /* R1692 - OUT2RMIX Input 3 Source */ + { 0x0000069D, 0x0080 }, /* R1693 - OUT2RMIX Input 3 Volume */ + { 0x0000069E, 0x0000 }, /* R1694 - OUT2RMIX Input 4 Source */ + { 0x0000069F, 0x0080 }, /* R1695 - OUT2RMIX Input 4 Volume */ + { 0x000006A0, 0x0000 }, /* R1696 - OUT3LMIX Input 1 Source */ + { 0x000006A1, 0x0080 }, /* R1697 - OUT3LMIX Input 1 Volume */ + { 0x000006A2, 0x0000 }, /* R1698 - OUT3LMIX Input 2 Source */ + { 0x000006A3, 0x0080 }, /* R1699 - OUT3LMIX Input 2 Volume */ + { 0x000006A4, 0x0000 }, /* R1700 - OUT3LMIX Input 3 Source */ + { 0x000006A5, 0x0080 }, /* R1701 - OUT3LMIX Input 3 Volume */ + { 0x000006A6, 0x0000 }, /* R1702 - OUT3LMIX Input 4 Source */ + { 0x000006A7, 0x0080 }, /* R1703 - OUT3LMIX Input 4 Volume */ + { 0x000006B0, 0x0000 }, /* R1712 - OUT4LMIX Input 1 Source */ + { 0x000006B1, 0x0080 }, /* R1713 - OUT4LMIX Input 1 Volume */ + { 0x000006B2, 0x0000 }, /* R1714 - OUT4LMIX Input 2 Source */ + { 0x000006B3, 0x0080 }, /* R1715 - OUT4LMIX Input 2 Volume */ + { 0x000006B4, 0x0000 }, /* R1716 - OUT4LMIX Input 3 Source */ + { 0x000006B5, 0x0080 }, /* R1717 - OUT4LMIX Input 3 Volume */ + { 0x000006B6, 0x0000 }, /* R1718 - OUT4LMIX Input 4 Source */ + { 0x000006B7, 0x0080 }, /* R1719 - OUT4LMIX Input 4 Volume */ + { 0x000006B8, 0x0000 }, /* R1720 - OUT4RMIX Input 1 Source */ + { 0x000006B9, 0x0080 }, /* R1721 - OUT4RMIX Input 1 Volume */ + { 0x000006BA, 0x0000 }, /* R1722 - OUT4RMIX Input 2 Source */ + { 0x000006BB, 0x0080 }, /* R1723 - OUT4RMIX Input 2 Volume */ + { 0x000006BC, 0x0000 }, /* R1724 - OUT4RMIX Input 3 Source */ + { 0x000006BD, 0x0080 }, /* R1725 - OUT4RMIX Input 3 Volume */ + { 0x000006BE, 0x0000 }, /* R1726 - OUT4RMIX Input 4 Source */ + { 0x000006BF, 0x0080 }, /* R1727 - OUT4RMIX Input 4 Volume */ + { 0x000006C0, 0x0000 }, /* R1728 - OUT5LMIX Input 1 Source */ + { 0x000006C1, 0x0080 }, /* R1729 - OUT5LMIX Input 1 Volume */ + { 0x000006C2, 0x0000 }, /* R1730 - OUT5LMIX Input 2 Source */ + { 0x000006C3, 0x0080 }, /* R1731 - OUT5LMIX Input 2 Volume */ + { 0x000006C4, 0x0000 }, /* R1732 - OUT5LMIX Input 3 Source */ + { 0x000006C5, 0x0080 }, /* R1733 - OUT5LMIX Input 3 Volume */ + { 0x000006C6, 0x0000 }, /* R1734 - OUT5LMIX Input 4 Source */ + { 0x000006C7, 0x0080 }, /* R1735 - OUT5LMIX Input 4 Volume */ + { 0x000006C8, 0x0000 }, /* R1736 - OUT5RMIX Input 1 Source */ + { 0x000006C9, 0x0080 }, /* R1737 - OUT5RMIX Input 1 Volume */ + { 0x000006CA, 0x0000 }, /* R1738 - OUT5RMIX Input 2 Source */ + { 0x000006CB, 0x0080 }, /* R1739 - OUT5RMIX Input 2 Volume */ + { 0x000006CC, 0x0000 }, /* R1740 - OUT5RMIX Input 3 Source */ + { 0x000006CD, 0x0080 }, /* R1741 - OUT5RMIX Input 3 Volume */ + { 0x000006CE, 0x0000 }, /* R1742 - OUT5RMIX Input 4 Source */ + { 0x000006CF, 0x0080 }, /* R1743 - OUT5RMIX Input 4 Volume */ + { 0x00000700, 0x0000 }, /* R1792 - AIF1TX1MIX Input 1 Source */ + { 0x00000701, 0x0080 }, /* R1793 - AIF1TX1MIX Input 1 Volume */ + { 0x00000702, 0x0000 }, /* R1794 - AIF1TX1MIX Input 2 Source */ + { 0x00000703, 0x0080 }, /* R1795 - AIF1TX1MIX Input 2 Volume */ + { 0x00000704, 0x0000 }, /* R1796 - AIF1TX1MIX Input 3 Source */ + { 0x00000705, 0x0080 }, /* R1797 - AIF1TX1MIX Input 3 Volume */ + { 0x00000706, 0x0000 }, /* R1798 - AIF1TX1MIX Input 4 Source */ + { 0x00000707, 0x0080 }, /* R1799 - AIF1TX1MIX Input 4 Volume */ + { 0x00000708, 0x0000 }, /* R1800 - AIF1TX2MIX Input 1 Source */ + { 0x00000709, 0x0080 }, /* R1801 - AIF1TX2MIX Input 1 Volume */ + { 0x0000070A, 0x0000 }, /* R1802 - AIF1TX2MIX Input 2 Source */ + { 0x0000070B, 0x0080 }, /* R1803 - AIF1TX2MIX Input 2 Volume */ + { 0x0000070C, 0x0000 }, /* R1804 - AIF1TX2MIX Input 3 Source */ + { 0x0000070D, 0x0080 }, /* R1805 - AIF1TX2MIX Input 3 Volume */ + { 0x0000070E, 0x0000 }, /* R1806 - AIF1TX2MIX Input 4 Source */ + { 0x0000070F, 0x0080 }, /* R1807 - AIF1TX2MIX Input 4 Volume */ + { 0x00000710, 0x0000 }, /* R1808 - AIF1TX3MIX Input 1 Source */ + { 0x00000711, 0x0080 }, /* R1809 - AIF1TX3MIX Input 1 Volume */ + { 0x00000712, 0x0000 }, /* R1810 - AIF1TX3MIX Input 2 Source */ + { 0x00000713, 0x0080 }, /* R1811 - AIF1TX3MIX Input 2 Volume */ + { 0x00000714, 0x0000 }, /* R1812 - AIF1TX3MIX Input 3 Source */ + { 0x00000715, 0x0080 }, /* R1813 - AIF1TX3MIX Input 3 Volume */ + { 0x00000716, 0x0000 }, /* R1814 - AIF1TX3MIX Input 4 Source */ + { 0x00000717, 0x0080 }, /* R1815 - AIF1TX3MIX Input 4 Volume */ + { 0x00000718, 0x0000 }, /* R1816 - AIF1TX4MIX Input 1 Source */ + { 0x00000719, 0x0080 }, /* R1817 - AIF1TX4MIX Input 1 Volume */ + { 0x0000071A, 0x0000 }, /* R1818 - AIF1TX4MIX Input 2 Source */ + { 0x0000071B, 0x0080 }, /* R1819 - AIF1TX4MIX Input 2 Volume */ + { 0x0000071C, 0x0000 }, /* R1820 - AIF1TX4MIX Input 3 Source */ + { 0x0000071D, 0x0080 }, /* R1821 - AIF1TX4MIX Input 3 Volume */ + { 0x0000071E, 0x0000 }, /* R1822 - AIF1TX4MIX Input 4 Source */ + { 0x0000071F, 0x0080 }, /* R1823 - AIF1TX4MIX Input 4 Volume */ + { 0x00000720, 0x0000 }, /* R1824 - AIF1TX5MIX Input 1 Source */ + { 0x00000721, 0x0080 }, /* R1825 - AIF1TX5MIX Input 1 Volume */ + { 0x00000722, 0x0000 }, /* R1826 - AIF1TX5MIX Input 2 Source */ + { 0x00000723, 0x0080 }, /* R1827 - AIF1TX5MIX Input 2 Volume */ + { 0x00000724, 0x0000 }, /* R1828 - AIF1TX5MIX Input 3 Source */ + { 0x00000725, 0x0080 }, /* R1829 - AIF1TX5MIX Input 3 Volume */ + { 0x00000726, 0x0000 }, /* R1830 - AIF1TX5MIX Input 4 Source */ + { 0x00000727, 0x0080 }, /* R1831 - AIF1TX5MIX Input 4 Volume */ + { 0x00000728, 0x0000 }, /* R1832 - AIF1TX6MIX Input 1 Source */ + { 0x00000729, 0x0080 }, /* R1833 - AIF1TX6MIX Input 1 Volume */ + { 0x0000072A, 0x0000 }, /* R1834 - AIF1TX6MIX Input 2 Source */ + { 0x0000072B, 0x0080 }, /* R1835 - AIF1TX6MIX Input 2 Volume */ + { 0x0000072C, 0x0000 }, /* R1836 - AIF1TX6MIX Input 3 Source */ + { 0x0000072D, 0x0080 }, /* R1837 - AIF1TX6MIX Input 3 Volume */ + { 0x0000072E, 0x0000 }, /* R1838 - AIF1TX6MIX Input 4 Source */ + { 0x0000072F, 0x0080 }, /* R1839 - AIF1TX6MIX Input 4 Volume */ + { 0x00000740, 0x0000 }, /* R1856 - AIF2TX1MIX Input 1 Source */ + { 0x00000741, 0x0080 }, /* R1857 - AIF2TX1MIX Input 1 Volume */ + { 0x00000742, 0x0000 }, /* R1858 - AIF2TX1MIX Input 2 Source */ + { 0x00000743, 0x0080 }, /* R1859 - AIF2TX1MIX Input 2 Volume */ + { 0x00000744, 0x0000 }, /* R1860 - AIF2TX1MIX Input 3 Source */ + { 0x00000745, 0x0080 }, /* R1861 - AIF2TX1MIX Input 3 Volume */ + { 0x00000746, 0x0000 }, /* R1862 - AIF2TX1MIX Input 4 Source */ + { 0x00000747, 0x0080 }, /* R1863 - AIF2TX1MIX Input 4 Volume */ + { 0x00000748, 0x0000 }, /* R1864 - AIF2TX2MIX Input 1 Source */ + { 0x00000749, 0x0080 }, /* R1865 - AIF2TX2MIX Input 1 Volume */ + { 0x0000074A, 0x0000 }, /* R1866 - AIF2TX2MIX Input 2 Source */ + { 0x0000074B, 0x0080 }, /* R1867 - AIF2TX2MIX Input 2 Volume */ + { 0x0000074C, 0x0000 }, /* R1868 - AIF2TX2MIX Input 3 Source */ + { 0x0000074D, 0x0080 }, /* R1869 - AIF2TX2MIX Input 3 Volume */ + { 0x0000074E, 0x0000 }, /* R1870 - AIF2TX2MIX Input 4 Source */ + { 0x0000074F, 0x0080 }, /* R1871 - AIF2TX2MIX Input 4 Volume */ + { 0x00000750, 0x0000 }, /* R1872 - AIF2TX3MIX Input 1 Source */ + { 0x00000751, 0x0080 }, /* R1873 - AIF2TX3MIX Input 1 Volume */ + { 0x00000752, 0x0000 }, /* R1874 - AIF2TX3MIX Input 2 Source */ + { 0x00000753, 0x0080 }, /* R1875 - AIF2TX3MIX Input 2 Volume */ + { 0x00000754, 0x0000 }, /* R1876 - AIF2TX3MIX Input 3 Source */ + { 0x00000755, 0x0080 }, /* R1877 - AIF2TX3MIX Input 3 Volume */ + { 0x00000756, 0x0000 }, /* R1878 - AIF2TX3MIX Input 4 Source */ + { 0x00000757, 0x0080 }, /* R1879 - AIF2TX3MIX Input 4 Volume */ + { 0x00000758, 0x0000 }, /* R1880 - AIF2TX4MIX Input 1 Source */ + { 0x00000759, 0x0080 }, /* R1881 - AIF2TX4MIX Input 1 Volume */ + { 0x0000075A, 0x0000 }, /* R1882 - AIF2TX4MIX Input 2 Source */ + { 0x0000075B, 0x0080 }, /* R1883 - AIF2TX4MIX Input 2 Volume */ + { 0x0000075C, 0x0000 }, /* R1884 - AIF2TX4MIX Input 3 Source */ + { 0x0000075D, 0x0080 }, /* R1885 - AIF2TX4MIX Input 3 Volume */ + { 0x0000075E, 0x0000 }, /* R1886 - AIF2TX4MIX Input 4 Source */ + { 0x0000075F, 0x0080 }, /* R1887 - AIF2TX4MIX Input 4 Volume */ + { 0x00000760, 0x0000 }, /* R1888 - AIF2TX5MIX Input 1 Source */ + { 0x00000761, 0x0080 }, /* R1889 - AIF2TX5MIX Input 1 Volume */ + { 0x00000762, 0x0000 }, /* R1890 - AIF2TX5MIX Input 2 Source */ + { 0x00000763, 0x0080 }, /* R1891 - AIF2TX5MIX Input 2 Volume */ + { 0x00000764, 0x0000 }, /* R1892 - AIF2TX5MIX Input 3 Source */ + { 0x00000765, 0x0080 }, /* R1893 - AIF2TX5MIX Input 3 Volume */ + { 0x00000766, 0x0000 }, /* R1894 - AIF2TX5MIX Input 4 Source */ + { 0x00000767, 0x0080 }, /* R1895 - AIF2TX5MIX Input 4 Volume */ + { 0x00000768, 0x0000 }, /* R1896 - AIF2TX6MIX Input 1 Source */ + { 0x00000769, 0x0080 }, /* R1897 - AIF2TX6MIX Input 1 Volume */ + { 0x0000076A, 0x0000 }, /* R1898 - AIF2TX6MIX Input 2 Source */ + { 0x0000076B, 0x0080 }, /* R1899 - AIF2TX6MIX Input 2 Volume */ + { 0x0000076C, 0x0000 }, /* R1900 - AIF2TX6MIX Input 3 Source */ + { 0x0000076D, 0x0080 }, /* R1901 - AIF2TX6MIX Input 3 Volume */ + { 0x0000076E, 0x0000 }, /* R1902 - AIF2TX6MIX Input 4 Source */ + { 0x0000076F, 0x0080 }, /* R1903 - AIF2TX6MIX Input 4 Volume */ + { 0x00000780, 0x0000 }, /* R1920 - AIF3TX1MIX Input 1 Source */ + { 0x00000781, 0x0080 }, /* R1921 - AIF3TX1MIX Input 1 Volume */ + { 0x00000782, 0x0000 }, /* R1922 - AIF3TX1MIX Input 2 Source */ + { 0x00000783, 0x0080 }, /* R1923 - AIF3TX1MIX Input 2 Volume */ + { 0x00000784, 0x0000 }, /* R1924 - AIF3TX1MIX Input 3 Source */ + { 0x00000785, 0x0080 }, /* R1925 - AIF3TX1MIX Input 3 Volume */ + { 0x00000786, 0x0000 }, /* R1926 - AIF3TX1MIX Input 4 Source */ + { 0x00000787, 0x0080 }, /* R1927 - AIF3TX1MIX Input 4 Volume */ + { 0x00000788, 0x0000 }, /* R1928 - AIF3TX2MIX Input 1 Source */ + { 0x00000789, 0x0080 }, /* R1929 - AIF3TX2MIX Input 1 Volume */ + { 0x0000078A, 0x0000 }, /* R1930 - AIF3TX2MIX Input 2 Source */ + { 0x0000078B, 0x0080 }, /* R1931 - AIF3TX2MIX Input 2 Volume */ + { 0x0000078C, 0x0000 }, /* R1932 - AIF3TX2MIX Input 3 Source */ + { 0x0000078D, 0x0080 }, /* R1933 - AIF3TX2MIX Input 3 Volume */ + { 0x0000078E, 0x0000 }, /* R1934 - AIF3TX2MIX Input 4 Source */ + { 0x0000078F, 0x0080 }, /* R1935 - AIF3TX2MIX Input 4 Volume */ + { 0x000007C0, 0x0000 }, /* R1984 - SLIMTX1MIX Input 1 Source */ + { 0x000007C1, 0x0080 }, /* R1985 - SLIMTX1MIX Input 1 Volume */ + { 0x000007C8, 0x0000 }, /* R1992 - SLIMTX2MIX Input 1 Source */ + { 0x000007C9, 0x0080 }, /* R1993 - SLIMTX2MIX Input 1 Volume */ + { 0x000007D0, 0x0000 }, /* R2000 - SLIMTX3MIX Input 1 Source */ + { 0x000007D1, 0x0080 }, /* R2001 - SLIMTX3MIX Input 1 Volume */ + { 0x000007D8, 0x0000 }, /* R2008 - SLIMTX4MIX Input 1 Source */ + { 0x000007D9, 0x0080 }, /* R2009 - SLIMTX4MIX Input 1 Volume */ + { 0x000007E0, 0x0000 }, /* R2016 - SLIMTX5MIX Input 1 Source */ + { 0x000007E1, 0x0080 }, /* R2017 - SLIMTX5MIX Input 1 Volume */ + { 0x000007E8, 0x0000 }, /* R2024 - SLIMTX6MIX Input 1 Source */ + { 0x000007E9, 0x0080 }, /* R2025 - SLIMTX6MIX Input 1 Volume */ + { 0x00000800, 0x0000 }, /* R2048 - SPDIF1TX1MIX Input 1 Source */ + { 0x00000801, 0x0080 }, /* R2049 - SPDIF1TX1MIX Input 1 Volume */ + { 0x00000808, 0x0000 }, /* R2056 - SPDIF1TX2MIX Input 1 Source */ + { 0x00000809, 0x0080 }, /* R2057 - SPDIF1TX2MIX Input 1 Volume */ + { 0x00000880, 0x0000 }, /* R2176 - EQ1MIX Input 1 Source */ + { 0x00000881, 0x0080 }, /* R2177 - EQ1MIX Input 1 Volume */ + { 0x00000888, 0x0000 }, /* R2184 - EQ2MIX Input 1 Source */ + { 0x00000889, 0x0080 }, /* R2185 - EQ2MIX Input 1 Volume */ + { 0x00000890, 0x0000 }, /* R2192 - EQ3MIX Input 1 Source */ + { 0x00000891, 0x0080 }, /* R2193 - EQ3MIX Input 1 Volume */ + { 0x00000898, 0x0000 }, /* R2200 - EQ4MIX Input 1 Source */ + { 0x00000899, 0x0080 }, /* R2201 - EQ4MIX Input 1 Volume */ + { 0x000008C0, 0x0000 }, /* R2240 - DRC1LMIX Input 1 Source */ + { 0x000008C1, 0x0080 }, /* R2241 - DRC1LMIX Input 1 Volume */ + { 0x000008C8, 0x0000 }, /* R2248 - DRC1RMIX Input 1 Source */ + { 0x000008C9, 0x0080 }, /* R2249 - DRC1RMIX Input 1 Volume */ + { 0x00000900, 0x0000 }, /* R2304 - HPLP1MIX Input 1 Source */ + { 0x00000901, 0x0080 }, /* R2305 - HPLP1MIX Input 1 Volume */ + { 0x00000902, 0x0000 }, /* R2306 - HPLP1MIX Input 2 Source */ + { 0x00000903, 0x0080 }, /* R2307 - HPLP1MIX Input 2 Volume */ + { 0x00000904, 0x0000 }, /* R2308 - HPLP1MIX Input 3 Source */ + { 0x00000905, 0x0080 }, /* R2309 - HPLP1MIX Input 3 Volume */ + { 0x00000906, 0x0000 }, /* R2310 - HPLP1MIX Input 4 Source */ + { 0x00000907, 0x0080 }, /* R2311 - HPLP1MIX Input 4 Volume */ + { 0x00000908, 0x0000 }, /* R2312 - HPLP2MIX Input 1 Source */ + { 0x00000909, 0x0080 }, /* R2313 - HPLP2MIX Input 1 Volume */ + { 0x0000090A, 0x0000 }, /* R2314 - HPLP2MIX Input 2 Source */ + { 0x0000090B, 0x0080 }, /* R2315 - HPLP2MIX Input 2 Volume */ + { 0x0000090C, 0x0000 }, /* R2316 - HPLP2MIX Input 3 Source */ + { 0x0000090D, 0x0080 }, /* R2317 - HPLP2MIX Input 3 Volume */ + { 0x0000090E, 0x0000 }, /* R2318 - HPLP2MIX Input 4 Source */ + { 0x0000090F, 0x0080 }, /* R2319 - HPLP2MIX Input 4 Volume */ + { 0x00000910, 0x0000 }, /* R2320 - HPLP3MIX Input 1 Source */ + { 0x00000911, 0x0080 }, /* R2321 - HPLP3MIX Input 1 Volume */ + { 0x00000912, 0x0000 }, /* R2322 - HPLP3MIX Input 2 Source */ + { 0x00000913, 0x0080 }, /* R2323 - HPLP3MIX Input 2 Volume */ + { 0x00000914, 0x0000 }, /* R2324 - HPLP3MIX Input 3 Source */ + { 0x00000915, 0x0080 }, /* R2325 - HPLP3MIX Input 3 Volume */ + { 0x00000916, 0x0000 }, /* R2326 - HPLP3MIX Input 4 Source */ + { 0x00000917, 0x0080 }, /* R2327 - HPLP3MIX Input 4 Volume */ + { 0x00000918, 0x0000 }, /* R2328 - HPLP4MIX Input 1 Source */ + { 0x00000919, 0x0080 }, /* R2329 - HPLP4MIX Input 1 Volume */ + { 0x0000091A, 0x0000 }, /* R2330 - HPLP4MIX Input 2 Source */ + { 0x0000091B, 0x0080 }, /* R2331 - HPLP4MIX Input 2 Volume */ + { 0x0000091C, 0x0000 }, /* R2332 - HPLP4MIX Input 3 Source */ + { 0x0000091D, 0x0080 }, /* R2333 - HPLP4MIX Input 3 Volume */ + { 0x0000091E, 0x0000 }, /* R2334 - HPLP4MIX Input 4 Source */ + { 0x0000091F, 0x0080 }, /* R2335 - HPLP4MIX Input 4 Volume */ + { 0x00000A80, 0x0000 }, /* R2688 - ASRC1LMIX Input 1 Source */ + { 0x00000A88, 0x0000 }, /* R2696 - ASRC1RMIX Input 1 Source */ + { 0x00000A90, 0x0000 }, /* R2704 - ASRC2LMIX Input 1 Source */ + { 0x00000A98, 0x0000 }, /* R2712 - ASRC2RMIX Input 1 Source */ + { 0x00000B00, 0x0000 }, /* R2816 - ISRC1DEC1MIX Input 1 Source */ + { 0x00000B08, 0x0000 }, /* R2824 - ISRC1DEC2MIX Input 1 Source */ + { 0x00000B10, 0x0000 }, /* R2832 - ISRC1DEC3MIX Input 1 Source */ + { 0x00000B18, 0x0000 }, /* R2840 - ISRC1DEC4MIX Input 1 Source */ + { 0x00000B20, 0x0000 }, /* R2848 - ISRC1INT1MIX Input 1 Source */ + { 0x00000B28, 0x0000 }, /* R2856 - ISRC1INT2MIX Input 1 Source */ + { 0x00000B30, 0x0000 }, /* R2864 - ISRC1INT3MIX Input 1 Source */ + { 0x00000B38, 0x0000 }, /* R2872 - ISRC1INT4MIX Input 1 Source */ + { 0x00000B40, 0x0000 }, /* R2880 - ISRC2DEC1MIX Input 1 Source */ + { 0x00000B48, 0x0000 }, /* R2888 - ISRC2DEC2MIX Input 1 Source */ + { 0x00000B60, 0x0000 }, /* R2912 - ISRC2INT1MIX Input 1 Source */ + { 0x00000B68, 0x0000 }, /* R2920 - ISRC2INT2MIX Input 1 Source */ + { 0x00000C00, 0xA101 }, /* R3072 - GPIO1 CTRL */ + { 0x00000C01, 0xA101 }, /* R3073 - GPIO2 CTRL */ + { 0x00000C02, 0xA101 }, /* R3074 - GPIO3 CTRL */ + { 0x00000C03, 0xA101 }, /* R3075 - GPIO4 CTRL */ + { 0x00000C04, 0xA101 }, /* R3076 - GPIO5 CTRL */ + { 0x00000C0F, 0x0400 }, /* R3087 - IRQ CTRL 1 */ + { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */ + { 0x00000C18, 0x0000 }, /* R3096 - GP Switch 1 */ + { 0x00000C20, 0x8002 }, /* R3104 - Misc Pad Ctrl 1 */ + { 0x00000C21, 0x8001 }, /* R3105 - Misc Pad Ctrl 2 */ + { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */ + { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */ + { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */ + { 0x00000C25, 0x0000 }, /* R3109 - Misc Pad Ctrl 6 */ + { 0x00000D08, 0xFFFF }, /* R3336 - Interrupt Status 1 Mask */ + { 0x00000D09, 0xFFFF }, /* R3337 - Interrupt Status 2 Mask */ + { 0x00000D0A, 0xFFFF }, /* R3338 - Interrupt Status 3 Mask */ + { 0x00000D0B, 0xFFFF }, /* R3339 - Interrupt Status 4 Mask */ + { 0x00000D0C, 0xFEFF }, /* R3340 - Interrupt Status 5 Mask */ + { 0x00000D0F, 0x0000 }, /* R3343 - Interrupt Control */ + { 0x00000D18, 0xFFFF }, /* R3352 - IRQ2 Status 1 Mask */ + { 0x00000D19, 0xFFFF }, /* R3353 - IRQ2 Status 2 Mask */ + { 0x00000D1A, 0xFFFF }, /* R3354 - IRQ2 Status 3 Mask */ + { 0x00000D1B, 0xFFFF }, /* R3355 - IRQ2 Status 4 Mask */ + { 0x00000D1C, 0xFEFF }, /* R3356 - IRQ2 Status 5 Mask */ + { 0x00000D1D, 0xFFFF }, /* R3357 - IRQ2 Status 6 Mask */ + { 0x00000D1F, 0x0000 }, /* R3359 - IRQ2 Control */ + { 0x00000D53, 0xFFFF }, /* R3411 - AOD IRQ Mask IRQ1 */ + { 0x00000D54, 0xFFFF }, /* R3412 - AOD IRQ Mask IRQ2 */ + { 0x00000D56, 0x0000 }, /* R3414 - Jack detect debounce */ + { 0x00000E00, 0x0000 }, /* R3584 - FX_Ctrl1 */ + { 0x00000E01, 0x0000 }, /* R3585 - FX_Ctrl2 */ + { 0x00000E10, 0x6318 }, /* R3600 - EQ1_1 */ + { 0x00000E11, 0x6300 }, /* R3601 - EQ1_2 */ + { 0x00000E12, 0x0FC8 }, /* R3602 - EQ1_3 */ + { 0x00000E13, 0x03FE }, /* R3603 - EQ1_4 */ + { 0x00000E14, 0x00E0 }, /* R3604 - EQ1_5 */ + { 0x00000E15, 0x1EC4 }, /* R3605 - EQ1_6 */ + { 0x00000E16, 0xF136 }, /* R3606 - EQ1_7 */ + { 0x00000E17, 0x0409 }, /* R3607 - EQ1_8 */ + { 0x00000E18, 0x04CC }, /* R3608 - EQ1_9 */ + { 0x00000E19, 0x1C9B }, /* R3609 - EQ1_10 */ + { 0x00000E1A, 0xF337 }, /* R3610 - EQ1_11 */ + { 0x00000E1B, 0x040B }, /* R3611 - EQ1_12 */ + { 0x00000E1C, 0x0CBB }, /* R3612 - EQ1_13 */ + { 0x00000E1D, 0x16F8 }, /* R3613 - EQ1_14 */ + { 0x00000E1E, 0xF7D9 }, /* R3614 - EQ1_15 */ + { 0x00000E1F, 0x040A }, /* R3615 - EQ1_16 */ + { 0x00000E20, 0x1F14 }, /* R3616 - EQ1_17 */ + { 0x00000E21, 0x058C }, /* R3617 - EQ1_18 */ + { 0x00000E22, 0x0563 }, /* R3618 - EQ1_19 */ + { 0x00000E23, 0x4000 }, /* R3619 - EQ1_20 */ + { 0x00000E24, 0x0B75 }, /* R3620 - EQ1_21 */ + { 0x00000E26, 0x6318 }, /* R3622 - EQ2_1 */ + { 0x00000E27, 0x6300 }, /* R3623 - EQ2_2 */ + { 0x00000E28, 0x0FC8 }, /* R3624 - EQ2_3 */ + { 0x00000E29, 0x03FE }, /* R3625 - EQ2_4 */ + { 0x00000E2A, 0x00E0 }, /* R3626 - EQ2_5 */ + { 0x00000E2B, 0x1EC4 }, /* R3627 - EQ2_6 */ + { 0x00000E2C, 0xF136 }, /* R3628 - EQ2_7 */ + { 0x00000E2D, 0x0409 }, /* R3629 - EQ2_8 */ + { 0x00000E2E, 0x04CC }, /* R3630 - EQ2_9 */ + { 0x00000E2F, 0x1C9B }, /* R3631 - EQ2_10 */ + { 0x00000E30, 0xF337 }, /* R3632 - EQ2_11 */ + { 0x00000E31, 0x040B }, /* R3633 - EQ2_12 */ + { 0x00000E32, 0x0CBB }, /* R3634 - EQ2_13 */ + { 0x00000E33, 0x16F8 }, /* R3635 - EQ2_14 */ + { 0x00000E34, 0xF7D9 }, /* R3636 - EQ2_15 */ + { 0x00000E35, 0x040A }, /* R3637 - EQ2_16 */ + { 0x00000E36, 0x1F14 }, /* R3638 - EQ2_17 */ + { 0x00000E37, 0x058C }, /* R3639 - EQ2_18 */ + { 0x00000E38, 0x0563 }, /* R3640 - EQ2_19 */ + { 0x00000E39, 0x4000 }, /* R3641 - EQ2_20 */ + { 0x00000E3A, 0x0B75 }, /* R3642 - EQ2_21 */ + { 0x00000E3C, 0x6318 }, /* R3644 - EQ3_1 */ + { 0x00000E3D, 0x6300 }, /* R3645 - EQ3_2 */ + { 0x00000E3E, 0x0FC8 }, /* R3646 - EQ3_3 */ + { 0x00000E3F, 0x03FE }, /* R3647 - EQ3_4 */ + { 0x00000E40, 0x00E0 }, /* R3648 - EQ3_5 */ + { 0x00000E41, 0x1EC4 }, /* R3649 - EQ3_6 */ + { 0x00000E42, 0xF136 }, /* R3650 - EQ3_7 */ + { 0x00000E43, 0x0409 }, /* R3651 - EQ3_8 */ + { 0x00000E44, 0x04CC }, /* R3652 - EQ3_9 */ + { 0x00000E45, 0x1C9B }, /* R3653 - EQ3_10 */ + { 0x00000E46, 0xF337 }, /* R3654 - EQ3_11 */ + { 0x00000E47, 0x040B }, /* R3655 - EQ3_12 */ + { 0x00000E48, 0x0CBB }, /* R3656 - EQ3_13 */ + { 0x00000E49, 0x16F8 }, /* R3657 - EQ3_14 */ + { 0x00000E4A, 0xF7D9 }, /* R3658 - EQ3_15 */ + { 0x00000E4B, 0x040A }, /* R3659 - EQ3_16 */ + { 0x00000E4C, 0x1F14 }, /* R3660 - EQ3_17 */ + { 0x00000E4D, 0x058C }, /* R3661 - EQ3_18 */ + { 0x00000E4E, 0x0563 }, /* R3662 - EQ3_19 */ + { 0x00000E4F, 0x4000 }, /* R3663 - EQ3_20 */ + { 0x00000E50, 0x0B75 }, /* R3664 - EQ3_21 */ + { 0x00000E52, 0x6318 }, /* R3666 - EQ4_1 */ + { 0x00000E53, 0x6300 }, /* R3667 - EQ4_2 */ + { 0x00000E54, 0x0FC8 }, /* R3668 - EQ4_3 */ + { 0x00000E55, 0x03FE }, /* R3669 - EQ4_4 */ + { 0x00000E56, 0x00E0 }, /* R3670 - EQ4_5 */ + { 0x00000E57, 0x1EC4 }, /* R3671 - EQ4_6 */ + { 0x00000E58, 0xF136 }, /* R3672 - EQ4_7 */ + { 0x00000E59, 0x0409 }, /* R3673 - EQ4_8 */ + { 0x00000E5A, 0x04CC }, /* R3674 - EQ4_9 */ + { 0x00000E5B, 0x1C9B }, /* R3675 - EQ4_10 */ + { 0x00000E5C, 0xF337 }, /* R3676 - EQ4_11 */ + { 0x00000E5D, 0x040B }, /* R3677 - EQ4_12 */ + { 0x00000E5E, 0x0CBB }, /* R3678 - EQ4_13 */ + { 0x00000E5F, 0x16F8 }, /* R3679 - EQ4_14 */ + { 0x00000E60, 0xF7D9 }, /* R3680 - EQ4_15 */ + { 0x00000E61, 0x040A }, /* R3681 - EQ4_16 */ + { 0x00000E62, 0x1F14 }, /* R3682 - EQ4_17 */ + { 0x00000E63, 0x058C }, /* R3683 - EQ4_18 */ + { 0x00000E64, 0x0563 }, /* R3684 - EQ4_19 */ + { 0x00000E65, 0x4000 }, /* R3685 - EQ4_20 */ + { 0x00000E66, 0x0B75 }, /* R3686 - EQ4_21 */ + { 0x00000E80, 0x0018 }, /* R3712 - DRC1 ctrl1 */ + { 0x00000E81, 0x0933 }, /* R3713 - DRC1 ctrl2 */ + { 0x00000E82, 0x0018 }, /* R3714 - DRC1 ctrl3 */ + { 0x00000E83, 0x0000 }, /* R3715 - DRC1 ctrl4 */ + { 0x00000E84, 0x0000 }, /* R3716 - DRC1 ctrl5 */ + { 0x00000EC0, 0x0000 }, /* R3776 - HPLPF1_1 */ + { 0x00000EC1, 0x0000 }, /* R3777 - HPLPF1_2 */ + { 0x00000EC4, 0x0000 }, /* R3780 - HPLPF2_1 */ + { 0x00000EC5, 0x0000 }, /* R3781 - HPLPF2_2 */ + { 0x00000EC8, 0x0000 }, /* R3784 - HPLPF3_1 */ + { 0x00000EC9, 0x0000 }, /* R3785 - HPLPF3_2 */ + { 0x00000ECC, 0x0000 }, /* R3788 - HPLPF4_1 */ + { 0x00000ECD, 0x0000 }, /* R3789 - HPLPF4_2 */ + { 0x00000EE0, 0x0000 }, /* R3808 - ASRC_ENABLE */ + { 0x00000EE2, 0x0000 }, /* R3810 - ASRC_RATE1 */ + { 0x00000EE3, 0x4000 }, /* R3811 - ASRC_RATE2 */ + { 0x00000EF0, 0x0000 }, /* R3824 - ISRC 1 CTRL 1 */ + { 0x00000EF1, 0x0001 }, /* R3825 - ISRC 1 CTRL 2 */ + { 0x00000EF2, 0x0000 }, /* R3826 - ISRC 1 CTRL 3 */ + { 0x00000EF3, 0x0000 }, /* R3827 - ISRC 2 CTRL 1 */ + { 0x00000EF4, 0x0001 }, /* R3828 - ISRC 2 CTRL 2 */ + { 0x00000EF5, 0x0000 }, /* R3829 - ISRC 2 CTRL 3 */ + { 0x00001700, 0x0000 }, /* R5888 - FRF_COEFF_1 */ + { 0x00001701, 0x0000 }, /* R5889 - FRF_COEFF_2 */ + { 0x00001702, 0x0000 }, /* R5890 - FRF_COEFF_3 */ + { 0x00001703, 0x0000 }, /* R5891 - FRF_COEFF_4 */ + { 0x00001704, 0x0000 }, /* R5892 - DAC_COMP_1 */ + { 0x00001705, 0x0000 }, /* R5893 - DAC_COMP_2 */ +}; + +static bool wm8998_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_SOFTWARE_RESET: + case ARIZONA_DEVICE_REVISION: + case ARIZONA_CTRL_IF_SPI_CFG_1: + case ARIZONA_CTRL_IF_I2C1_CFG_1: + case ARIZONA_CTRL_IF_I2C1_CFG_2: + case ARIZONA_WRITE_SEQUENCER_CTRL_0: + case ARIZONA_WRITE_SEQUENCER_CTRL_1: + case ARIZONA_WRITE_SEQUENCER_CTRL_2: + case ARIZONA_TONE_GENERATOR_1: + case ARIZONA_TONE_GENERATOR_2: + case ARIZONA_TONE_GENERATOR_3: + case ARIZONA_TONE_GENERATOR_4: + case ARIZONA_TONE_GENERATOR_5: + case ARIZONA_PWM_DRIVE_1: + case ARIZONA_PWM_DRIVE_2: + case ARIZONA_PWM_DRIVE_3: + case ARIZONA_WAKE_CONTROL: + case ARIZONA_SEQUENCE_CONTROL: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_1: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_4: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6: + case ARIZONA_HAPTICS_CONTROL_1: + case ARIZONA_HAPTICS_CONTROL_2: + case ARIZONA_HAPTICS_PHASE_1_INTENSITY: + case ARIZONA_HAPTICS_PHASE_1_DURATION: + case ARIZONA_HAPTICS_PHASE_2_INTENSITY: + case ARIZONA_HAPTICS_PHASE_2_DURATION: + case ARIZONA_HAPTICS_PHASE_3_INTENSITY: + case ARIZONA_HAPTICS_PHASE_3_DURATION: + case ARIZONA_HAPTICS_STATUS: + case ARIZONA_CLOCK_32K_1: + case ARIZONA_SYSTEM_CLOCK_1: + case ARIZONA_SAMPLE_RATE_1: + case ARIZONA_SAMPLE_RATE_2: + case ARIZONA_SAMPLE_RATE_3: + case ARIZONA_SAMPLE_RATE_1_STATUS: + case ARIZONA_SAMPLE_RATE_2_STATUS: + case ARIZONA_SAMPLE_RATE_3_STATUS: + case ARIZONA_ASYNC_CLOCK_1: + case ARIZONA_ASYNC_SAMPLE_RATE_1: + case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: + case ARIZONA_OUTPUT_SYSTEM_CLOCK: + case ARIZONA_OUTPUT_ASYNC_CLOCK: + case ARIZONA_RATE_ESTIMATOR_1: + case ARIZONA_RATE_ESTIMATOR_2: + case ARIZONA_RATE_ESTIMATOR_3: + case ARIZONA_RATE_ESTIMATOR_4: + case ARIZONA_RATE_ESTIMATOR_5: + case ARIZONA_DYNAMIC_FREQUENCY_SCALING_1: + case ARIZONA_FLL1_CONTROL_1: + case ARIZONA_FLL1_CONTROL_2: + case ARIZONA_FLL1_CONTROL_3: + case ARIZONA_FLL1_CONTROL_4: + case ARIZONA_FLL1_CONTROL_5: + case ARIZONA_FLL1_CONTROL_6: + case ARIZONA_FLL1_CONTROL_7: + case ARIZONA_FLL1_LOOP_FILTER_TEST_1: + case ARIZONA_FLL1_NCO_TEST_0: + case ARIZONA_FLL1_SYNCHRONISER_1: + case ARIZONA_FLL1_SYNCHRONISER_2: + case ARIZONA_FLL1_SYNCHRONISER_3: + case ARIZONA_FLL1_SYNCHRONISER_4: + case ARIZONA_FLL1_SYNCHRONISER_5: + case ARIZONA_FLL1_SYNCHRONISER_6: + case ARIZONA_FLL1_SYNCHRONISER_7: + case ARIZONA_FLL1_SPREAD_SPECTRUM: + case ARIZONA_FLL1_GPIO_CLOCK: + case ARIZONA_FLL2_CONTROL_1: + case ARIZONA_FLL2_CONTROL_2: + case ARIZONA_FLL2_CONTROL_3: + case ARIZONA_FLL2_CONTROL_4: + case ARIZONA_FLL2_CONTROL_5: + case ARIZONA_FLL2_CONTROL_6: + case ARIZONA_FLL2_CONTROL_7: + case ARIZONA_FLL2_LOOP_FILTER_TEST_1: + case ARIZONA_FLL2_NCO_TEST_0: + case ARIZONA_FLL2_SYNCHRONISER_1: + case ARIZONA_FLL2_SYNCHRONISER_2: + case ARIZONA_FLL2_SYNCHRONISER_3: + case ARIZONA_FLL2_SYNCHRONISER_4: + case ARIZONA_FLL2_SYNCHRONISER_5: + case ARIZONA_FLL2_SYNCHRONISER_6: + case ARIZONA_FLL2_SYNCHRONISER_7: + case ARIZONA_FLL2_SPREAD_SPECTRUM: + case ARIZONA_FLL2_GPIO_CLOCK: + case ARIZONA_MIC_CHARGE_PUMP_1: + case ARIZONA_LDO1_CONTROL_1: + case ARIZONA_LDO1_CONTROL_2: + case ARIZONA_LDO2_CONTROL_1: + case ARIZONA_MIC_BIAS_CTRL_1: + case ARIZONA_MIC_BIAS_CTRL_2: + case ARIZONA_MIC_BIAS_CTRL_3: + case ARIZONA_ACCESSORY_DETECT_MODE_1: + case ARIZONA_HEADPHONE_DETECT_1: + case ARIZONA_HEADPHONE_DETECT_2: + case ARIZONA_MICD_CLAMP_CONTROL: + case ARIZONA_MIC_DETECT_1: + case ARIZONA_MIC_DETECT_2: + case ARIZONA_MIC_DETECT_3: + case ARIZONA_MIC_DETECT_4: + case ARIZONA_MIC_DETECT_LEVEL_1: + case ARIZONA_MIC_DETECT_LEVEL_2: + case ARIZONA_MIC_DETECT_LEVEL_3: + case ARIZONA_MIC_DETECT_LEVEL_4: + case ARIZONA_ISOLATION_CONTROL: + case ARIZONA_JACK_DETECT_ANALOGUE: + case ARIZONA_INPUT_ENABLES: + case ARIZONA_INPUT_ENABLES_STATUS: + case ARIZONA_INPUT_RATE: + case ARIZONA_INPUT_VOLUME_RAMP: + case ARIZONA_HPF_CONTROL: + case ARIZONA_IN1L_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_1L: + case ARIZONA_DMIC1L_CONTROL: + case ARIZONA_IN1R_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_1R: + case ARIZONA_DMIC1R_CONTROL: + case ARIZONA_IN2L_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_2L: + case ARIZONA_DMIC2L_CONTROL: + case ARIZONA_OUTPUT_ENABLES_1: + case ARIZONA_OUTPUT_STATUS_1: + case ARIZONA_RAW_OUTPUT_STATUS_1: + case ARIZONA_OUTPUT_RATE_1: + case ARIZONA_OUTPUT_VOLUME_RAMP: + case ARIZONA_OUTPUT_PATH_CONFIG_1L: + case ARIZONA_DAC_DIGITAL_VOLUME_1L: + case ARIZONA_NOISE_GATE_SELECT_1L: + case ARIZONA_OUTPUT_PATH_CONFIG_1R: + case ARIZONA_DAC_DIGITAL_VOLUME_1R: + case ARIZONA_NOISE_GATE_SELECT_1R: + case ARIZONA_OUTPUT_PATH_CONFIG_2L: + case ARIZONA_DAC_DIGITAL_VOLUME_2L: + case ARIZONA_NOISE_GATE_SELECT_2L: + case ARIZONA_OUTPUT_PATH_CONFIG_2R: + case ARIZONA_DAC_DIGITAL_VOLUME_2R: + case ARIZONA_NOISE_GATE_SELECT_2R: + case ARIZONA_OUTPUT_PATH_CONFIG_3L: + case ARIZONA_DAC_DIGITAL_VOLUME_3L: + case ARIZONA_NOISE_GATE_SELECT_3L: + case ARIZONA_OUTPUT_PATH_CONFIG_4L: + case ARIZONA_DAC_DIGITAL_VOLUME_4L: + case ARIZONA_NOISE_GATE_SELECT_4L: + case ARIZONA_OUTPUT_PATH_CONFIG_4R: + case ARIZONA_DAC_DIGITAL_VOLUME_4R: + case ARIZONA_NOISE_GATE_SELECT_4R: + case ARIZONA_OUTPUT_PATH_CONFIG_5L: + case ARIZONA_DAC_DIGITAL_VOLUME_5L: + case ARIZONA_NOISE_GATE_SELECT_5L: + case ARIZONA_OUTPUT_PATH_CONFIG_5R: + case ARIZONA_DAC_DIGITAL_VOLUME_5R: + case ARIZONA_NOISE_GATE_SELECT_5R: + case ARIZONA_DRE_CONTROL_1: + case ARIZONA_DRE_CONTROL_2: + case ARIZONA_DRE_CONTROL_3: + case ARIZONA_DAC_AEC_CONTROL_1: + case ARIZONA_DAC_AEC_CONTROL_2: + case ARIZONA_NOISE_GATE_CONTROL: + case ARIZONA_PDM_SPK1_CTRL_1: + case ARIZONA_PDM_SPK1_CTRL_2: + case ARIZONA_HP_TEST_CTRL_13: + case ARIZONA_AIF1_BCLK_CTRL: + case ARIZONA_AIF1_TX_PIN_CTRL: + case ARIZONA_AIF1_RX_PIN_CTRL: + case ARIZONA_AIF1_RATE_CTRL: + case ARIZONA_AIF1_FORMAT: + case ARIZONA_AIF1_RX_BCLK_RATE: + case ARIZONA_AIF1_FRAME_CTRL_1: + case ARIZONA_AIF1_FRAME_CTRL_2: + case ARIZONA_AIF1_FRAME_CTRL_3: + case ARIZONA_AIF1_FRAME_CTRL_4: + case ARIZONA_AIF1_FRAME_CTRL_5: + case ARIZONA_AIF1_FRAME_CTRL_6: + case ARIZONA_AIF1_FRAME_CTRL_7: + case ARIZONA_AIF1_FRAME_CTRL_8: + case ARIZONA_AIF1_FRAME_CTRL_11: + case ARIZONA_AIF1_FRAME_CTRL_12: + case ARIZONA_AIF1_FRAME_CTRL_13: + case ARIZONA_AIF1_FRAME_CTRL_14: + case ARIZONA_AIF1_FRAME_CTRL_15: + case ARIZONA_AIF1_FRAME_CTRL_16: + case ARIZONA_AIF1_TX_ENABLES: + case ARIZONA_AIF1_RX_ENABLES: + case ARIZONA_AIF2_BCLK_CTRL: + case ARIZONA_AIF2_TX_PIN_CTRL: + case ARIZONA_AIF2_RX_PIN_CTRL: + case ARIZONA_AIF2_RATE_CTRL: + case ARIZONA_AIF2_FORMAT: + case ARIZONA_AIF2_RX_BCLK_RATE: + case ARIZONA_AIF2_FRAME_CTRL_1: + case ARIZONA_AIF2_FRAME_CTRL_2: + case ARIZONA_AIF2_FRAME_CTRL_3: + case ARIZONA_AIF2_FRAME_CTRL_4: + case ARIZONA_AIF2_FRAME_CTRL_5: + case ARIZONA_AIF2_FRAME_CTRL_6: + case ARIZONA_AIF2_FRAME_CTRL_7: + case ARIZONA_AIF2_FRAME_CTRL_8: + case ARIZONA_AIF2_FRAME_CTRL_11: + case ARIZONA_AIF2_FRAME_CTRL_12: + case ARIZONA_AIF2_FRAME_CTRL_13: + case ARIZONA_AIF2_FRAME_CTRL_14: + case ARIZONA_AIF2_FRAME_CTRL_15: + case ARIZONA_AIF2_FRAME_CTRL_16: + case ARIZONA_AIF2_TX_ENABLES: + case ARIZONA_AIF2_RX_ENABLES: + case ARIZONA_AIF3_BCLK_CTRL: + case ARIZONA_AIF3_TX_PIN_CTRL: + case ARIZONA_AIF3_RX_PIN_CTRL: + case ARIZONA_AIF3_RATE_CTRL: + case ARIZONA_AIF3_FORMAT: + case ARIZONA_AIF3_RX_BCLK_RATE: + case ARIZONA_AIF3_FRAME_CTRL_1: + case ARIZONA_AIF3_FRAME_CTRL_2: + case ARIZONA_AIF3_FRAME_CTRL_3: + case ARIZONA_AIF3_FRAME_CTRL_4: + case ARIZONA_AIF3_FRAME_CTRL_11: + case ARIZONA_AIF3_FRAME_CTRL_12: + case ARIZONA_AIF3_TX_ENABLES: + case ARIZONA_AIF3_RX_ENABLES: + case ARIZONA_SPD1_TX_CONTROL: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_1: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_2: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_3: + case ARIZONA_SLIMBUS_FRAMER_REF_GEAR: + case ARIZONA_SLIMBUS_RATES_1: + case ARIZONA_SLIMBUS_RATES_2: + case ARIZONA_SLIMBUS_RATES_5: + case ARIZONA_SLIMBUS_RATES_6: + case ARIZONA_SLIMBUS_RATES_7: + case ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE: + case ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE: + case ARIZONA_SLIMBUS_RX_PORT_STATUS: + case ARIZONA_SLIMBUS_TX_PORT_STATUS: + case ARIZONA_PWM1MIX_INPUT_1_SOURCE: + case ARIZONA_PWM1MIX_INPUT_1_VOLUME: + case ARIZONA_PWM1MIX_INPUT_2_SOURCE: + case ARIZONA_PWM1MIX_INPUT_2_VOLUME: + case ARIZONA_PWM1MIX_INPUT_3_SOURCE: + case ARIZONA_PWM1MIX_INPUT_3_VOLUME: + case ARIZONA_PWM1MIX_INPUT_4_SOURCE: + case ARIZONA_PWM1MIX_INPUT_4_VOLUME: + case ARIZONA_PWM2MIX_INPUT_1_SOURCE: + case ARIZONA_PWM2MIX_INPUT_1_VOLUME: + case ARIZONA_PWM2MIX_INPUT_2_SOURCE: + case ARIZONA_PWM2MIX_INPUT_2_VOLUME: + case ARIZONA_PWM2MIX_INPUT_3_SOURCE: + case ARIZONA_PWM2MIX_INPUT_3_VOLUME: + case ARIZONA_PWM2MIX_INPUT_4_SOURCE: + case ARIZONA_PWM2MIX_INPUT_4_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_1_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_1_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_2_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_2_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_3_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_3_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_4_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_4_VOLUME: + case ARIZONA_OUT2LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT2LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT2LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT2LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT2LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT2LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT2LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT2LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT2RMIX_INPUT_1_SOURCE: + case ARIZONA_OUT2RMIX_INPUT_1_VOLUME: + case ARIZONA_OUT2RMIX_INPUT_2_SOURCE: + case ARIZONA_OUT2RMIX_INPUT_2_VOLUME: + case ARIZONA_OUT2RMIX_INPUT_3_SOURCE: + case ARIZONA_OUT2RMIX_INPUT_3_VOLUME: + case ARIZONA_OUT2RMIX_INPUT_4_SOURCE: + case ARIZONA_OUT2RMIX_INPUT_4_VOLUME: + case ARIZONA_OUT3LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT3LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT3LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT3LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT3LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT3LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT3LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT3LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT4RMIX_INPUT_1_SOURCE: + case ARIZONA_OUT4RMIX_INPUT_1_VOLUME: + case ARIZONA_OUT4RMIX_INPUT_2_SOURCE: + case ARIZONA_OUT4RMIX_INPUT_2_VOLUME: + case ARIZONA_OUT4RMIX_INPUT_3_SOURCE: + case ARIZONA_OUT4RMIX_INPUT_3_VOLUME: + case ARIZONA_OUT4RMIX_INPUT_4_SOURCE: + case ARIZONA_OUT4RMIX_INPUT_4_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_1_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_1_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_2_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_2_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_3_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_3_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_4_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX5MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX5MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX5MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX5MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX5MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX5MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX5MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX6MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX6MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX6MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX6MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX1MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX2MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX3MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX4MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX5MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX6MIX_INPUT_1_VOLUME: + case ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE: + case ARIZONA_SPDIFTX1MIX_INPUT_1_VOLUME: + case ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE: + case ARIZONA_SPDIFTX2MIX_INPUT_1_VOLUME: + case ARIZONA_EQ1MIX_INPUT_1_SOURCE: + case ARIZONA_EQ1MIX_INPUT_1_VOLUME: + case ARIZONA_EQ2MIX_INPUT_1_SOURCE: + case ARIZONA_EQ2MIX_INPUT_1_VOLUME: + case ARIZONA_EQ3MIX_INPUT_1_SOURCE: + case ARIZONA_EQ3MIX_INPUT_1_VOLUME: + case ARIZONA_EQ4MIX_INPUT_1_SOURCE: + case ARIZONA_EQ4MIX_INPUT_1_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_1_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_1_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_1_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_1_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_4_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_4_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_4_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_4_VOLUME: + case ARIZONA_ASRC1LMIX_INPUT_1_SOURCE: + case ARIZONA_ASRC1RMIX_INPUT_1_SOURCE: + case ARIZONA_ASRC2LMIX_INPUT_1_SOURCE: + case ARIZONA_ASRC2RMIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE: + case ARIZONA_GPIO1_CTRL: + case ARIZONA_GPIO2_CTRL: + case ARIZONA_GPIO3_CTRL: + case ARIZONA_GPIO4_CTRL: + case ARIZONA_GPIO5_CTRL: + case ARIZONA_IRQ_CTRL_1: + case ARIZONA_GPIO_DEBOUNCE_CONFIG: + case ARIZONA_GP_SWITCH_1: + case ARIZONA_MISC_PAD_CTRL_1: + case ARIZONA_MISC_PAD_CTRL_2: + case ARIZONA_MISC_PAD_CTRL_3: + case ARIZONA_MISC_PAD_CTRL_4: + case ARIZONA_MISC_PAD_CTRL_5: + case ARIZONA_MISC_PAD_CTRL_6: + case ARIZONA_INTERRUPT_STATUS_1: + case ARIZONA_INTERRUPT_STATUS_2: + case ARIZONA_INTERRUPT_STATUS_3: + case ARIZONA_INTERRUPT_STATUS_4: + case ARIZONA_INTERRUPT_STATUS_5: + case ARIZONA_INTERRUPT_STATUS_1_MASK: + case ARIZONA_INTERRUPT_STATUS_2_MASK: + case ARIZONA_INTERRUPT_STATUS_3_MASK: + case ARIZONA_INTERRUPT_STATUS_4_MASK: + case ARIZONA_INTERRUPT_STATUS_5_MASK: + case ARIZONA_INTERRUPT_CONTROL: + case ARIZONA_IRQ2_STATUS_1: + case ARIZONA_IRQ2_STATUS_2: + case ARIZONA_IRQ2_STATUS_3: + case ARIZONA_IRQ2_STATUS_4: + case ARIZONA_IRQ2_STATUS_5: + case ARIZONA_IRQ2_STATUS_1_MASK: + case ARIZONA_IRQ2_STATUS_2_MASK: + case ARIZONA_IRQ2_STATUS_3_MASK: + case ARIZONA_IRQ2_STATUS_4_MASK: + case ARIZONA_IRQ2_STATUS_5_MASK: + case ARIZONA_IRQ2_CONTROL: + case ARIZONA_INTERRUPT_RAW_STATUS_2: + case ARIZONA_INTERRUPT_RAW_STATUS_3: + case ARIZONA_INTERRUPT_RAW_STATUS_4: + case ARIZONA_INTERRUPT_RAW_STATUS_5: + case ARIZONA_INTERRUPT_RAW_STATUS_6: + case ARIZONA_INTERRUPT_RAW_STATUS_7: + case ARIZONA_INTERRUPT_RAW_STATUS_8: + case ARIZONA_IRQ_PIN_STATUS: + case ARIZONA_AOD_WKUP_AND_TRIG: + case ARIZONA_AOD_IRQ1: + case ARIZONA_AOD_IRQ2: + case ARIZONA_AOD_IRQ_MASK_IRQ1: + case ARIZONA_AOD_IRQ_MASK_IRQ2: + case ARIZONA_AOD_IRQ_RAW_STATUS: + case ARIZONA_JACK_DETECT_DEBOUNCE: + case ARIZONA_FX_CTRL1: + case ARIZONA_FX_CTRL2: + case ARIZONA_EQ1_1: + case ARIZONA_EQ1_2: + case ARIZONA_EQ1_3: + case ARIZONA_EQ1_4: + case ARIZONA_EQ1_5: + case ARIZONA_EQ1_6: + case ARIZONA_EQ1_7: + case ARIZONA_EQ1_8: + case ARIZONA_EQ1_9: + case ARIZONA_EQ1_10: + case ARIZONA_EQ1_11: + case ARIZONA_EQ1_12: + case ARIZONA_EQ1_13: + case ARIZONA_EQ1_14: + case ARIZONA_EQ1_15: + case ARIZONA_EQ1_16: + case ARIZONA_EQ1_17: + case ARIZONA_EQ1_18: + case ARIZONA_EQ1_19: + case ARIZONA_EQ1_20: + case ARIZONA_EQ1_21: + case ARIZONA_EQ2_1: + case ARIZONA_EQ2_2: + case ARIZONA_EQ2_3: + case ARIZONA_EQ2_4: + case ARIZONA_EQ2_5: + case ARIZONA_EQ2_6: + case ARIZONA_EQ2_7: + case ARIZONA_EQ2_8: + case ARIZONA_EQ2_9: + case ARIZONA_EQ2_10: + case ARIZONA_EQ2_11: + case ARIZONA_EQ2_12: + case ARIZONA_EQ2_13: + case ARIZONA_EQ2_14: + case ARIZONA_EQ2_15: + case ARIZONA_EQ2_16: + case ARIZONA_EQ2_17: + case ARIZONA_EQ2_18: + case ARIZONA_EQ2_19: + case ARIZONA_EQ2_20: + case ARIZONA_EQ2_21: + case ARIZONA_EQ3_1: + case ARIZONA_EQ3_2: + case ARIZONA_EQ3_3: + case ARIZONA_EQ3_4: + case ARIZONA_EQ3_5: + case ARIZONA_EQ3_6: + case ARIZONA_EQ3_7: + case ARIZONA_EQ3_8: + case ARIZONA_EQ3_9: + case ARIZONA_EQ3_10: + case ARIZONA_EQ3_11: + case ARIZONA_EQ3_12: + case ARIZONA_EQ3_13: + case ARIZONA_EQ3_14: + case ARIZONA_EQ3_15: + case ARIZONA_EQ3_16: + case ARIZONA_EQ3_17: + case ARIZONA_EQ3_18: + case ARIZONA_EQ3_19: + case ARIZONA_EQ3_20: + case ARIZONA_EQ3_21: + case ARIZONA_EQ4_1: + case ARIZONA_EQ4_2: + case ARIZONA_EQ4_3: + case ARIZONA_EQ4_4: + case ARIZONA_EQ4_5: + case ARIZONA_EQ4_6: + case ARIZONA_EQ4_7: + case ARIZONA_EQ4_8: + case ARIZONA_EQ4_9: + case ARIZONA_EQ4_10: + case ARIZONA_EQ4_11: + case ARIZONA_EQ4_12: + case ARIZONA_EQ4_13: + case ARIZONA_EQ4_14: + case ARIZONA_EQ4_15: + case ARIZONA_EQ4_16: + case ARIZONA_EQ4_17: + case ARIZONA_EQ4_18: + case ARIZONA_EQ4_19: + case ARIZONA_EQ4_20: + case ARIZONA_EQ4_21: + case ARIZONA_DRC1_CTRL1: + case ARIZONA_DRC1_CTRL2: + case ARIZONA_DRC1_CTRL3: + case ARIZONA_DRC1_CTRL4: + case ARIZONA_DRC1_CTRL5: + case ARIZONA_HPLPF1_1: + case ARIZONA_HPLPF1_2: + case ARIZONA_HPLPF2_1: + case ARIZONA_HPLPF2_2: + case ARIZONA_HPLPF3_1: + case ARIZONA_HPLPF3_2: + case ARIZONA_HPLPF4_1: + case ARIZONA_HPLPF4_2: + case ARIZONA_ASRC_ENABLE: + case ARIZONA_ASRC_STATUS: + case ARIZONA_ASRC_RATE1: + case ARIZONA_ISRC_1_CTRL_1: + case ARIZONA_ISRC_1_CTRL_2: + case ARIZONA_ISRC_1_CTRL_3: + case ARIZONA_ISRC_2_CTRL_1: + case ARIZONA_ISRC_2_CTRL_2: + case ARIZONA_ISRC_2_CTRL_3: + case ARIZONA_FRF_COEFF_1: + case ARIZONA_FRF_COEFF_2: + case ARIZONA_FRF_COEFF_3: + case ARIZONA_FRF_COEFF_4: + case ARIZONA_V2_DAC_COMP_1: + case ARIZONA_V2_DAC_COMP_2: + return true; + default: + return false; + } +} + +static bool wm8998_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_SOFTWARE_RESET: + case ARIZONA_DEVICE_REVISION: + case ARIZONA_HAPTICS_STATUS: + case ARIZONA_SAMPLE_RATE_1_STATUS: + case ARIZONA_SAMPLE_RATE_2_STATUS: + case ARIZONA_SAMPLE_RATE_3_STATUS: + case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: + case ARIZONA_MIC_DETECT_3: + case ARIZONA_MIC_DETECT_4: + case ARIZONA_HEADPHONE_DETECT_2: + case ARIZONA_INPUT_ENABLES_STATUS: + case ARIZONA_OUTPUT_STATUS_1: + case ARIZONA_RAW_OUTPUT_STATUS_1: + case ARIZONA_SLIMBUS_RX_PORT_STATUS: + case ARIZONA_SLIMBUS_TX_PORT_STATUS: + case ARIZONA_INTERRUPT_STATUS_1: + case ARIZONA_INTERRUPT_STATUS_2: + case ARIZONA_INTERRUPT_STATUS_3: + case ARIZONA_INTERRUPT_STATUS_4: + case ARIZONA_INTERRUPT_STATUS_5: + case ARIZONA_IRQ2_STATUS_1: + case ARIZONA_IRQ2_STATUS_2: + case ARIZONA_IRQ2_STATUS_3: + case ARIZONA_IRQ2_STATUS_4: + case ARIZONA_IRQ2_STATUS_5: + case ARIZONA_INTERRUPT_RAW_STATUS_2: + case ARIZONA_INTERRUPT_RAW_STATUS_3: + case ARIZONA_INTERRUPT_RAW_STATUS_4: + case ARIZONA_INTERRUPT_RAW_STATUS_5: + case ARIZONA_INTERRUPT_RAW_STATUS_6: + case ARIZONA_INTERRUPT_RAW_STATUS_7: + case ARIZONA_INTERRUPT_RAW_STATUS_8: + case ARIZONA_IRQ_PIN_STATUS: + case ARIZONA_AOD_WKUP_AND_TRIG: + case ARIZONA_AOD_IRQ1: + case ARIZONA_AOD_IRQ2: + case ARIZONA_AOD_IRQ_RAW_STATUS: + case ARIZONA_FX_CTRL2: + case ARIZONA_ASRC_STATUS: + return true; + default: + return false; + } +} + +#define WM8998_MAX_REGISTER 0x31ff + +const struct regmap_config wm8998_i2c_regmap = { + .reg_bits = 32, + .val_bits = 16, + + .max_register = WM8998_MAX_REGISTER, + .readable_reg = wm8998_readable_register, + .volatile_reg = wm8998_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = wm8998_reg_default, + .num_reg_defaults = ARRAY_SIZE(wm8998_reg_default), +}; +EXPORT_SYMBOL_GPL(wm8998_i2c_regmap); diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 56291799b85..8760034640b 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -24,7 +24,9 @@ enum arizona_type { WM5102 = 1, WM5110 = 2, WM8997 = 3, - WM8280 = 4 + WM8280 = 4, + WM8998 = 5, + WM1814 = 6, }; #define ARIZONA_IRQ_GP1 0 @@ -148,6 +150,7 @@ int arizona_set_irq_wake(struct arizona *arizona, int irq, int on); int wm5102_patch(struct arizona *arizona); int florida_patch(struct arizona *arizona); int wm8997_patch(struct arizona *arizona); +int wm8998_patch(struct arizona *arizona); extern int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, bool mandatory); diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 5c24f327330..9054136a49f 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -236,14 +236,17 @@ #define ARIZONA_DAC_VOLUME_LIMIT_6R 0x43E #define ARIZONA_NOISE_GATE_SELECT_6R 0x43F #define ARIZONA_DRE_ENABLE 0x440 +#define ARIZONA_DRE_CONTROL_1 0x441 #define ARIZONA_DRE_CONTROL_2 0x442 #define ARIZONA_DRE_CONTROL_3 0x443 #define ARIZONA_DAC_AEC_CONTROL_1 0x450 +#define ARIZONA_DAC_AEC_CONTROL_2 0x451 #define ARIZONA_NOISE_GATE_CONTROL 0x458 #define ARIZONA_PDM_SPK1_CTRL_1 0x490 #define ARIZONA_PDM_SPK1_CTRL_2 0x491 #define ARIZONA_PDM_SPK2_CTRL_1 0x492 #define ARIZONA_PDM_SPK2_CTRL_2 0x493 +#define ARIZONA_HP_TEST_CTRL_13 0x49A #define ARIZONA_HP1_SHORT_CIRCUIT_CTRL 0x4A0 #define ARIZONA_HP2_SHORT_CIRCUIT_CTRL 0x4A1 #define ARIZONA_HP3_SHORT_CIRCUIT_CTRL 0x4A2 @@ -292,8 +295,16 @@ #define ARIZONA_AIF2_FRAME_CTRL_2 0x548 #define ARIZONA_AIF2_FRAME_CTRL_3 0x549 #define ARIZONA_AIF2_FRAME_CTRL_4 0x54A +#define ARIZONA_AIF2_FRAME_CTRL_5 0x54B +#define ARIZONA_AIF2_FRAME_CTRL_6 0x54C +#define ARIZONA_AIF2_FRAME_CTRL_7 0x54D +#define ARIZONA_AIF2_FRAME_CTRL_8 0x54E #define ARIZONA_AIF2_FRAME_CTRL_11 0x551 #define ARIZONA_AIF2_FRAME_CTRL_12 0x552 +#define ARIZONA_AIF2_FRAME_CTRL_13 0x553 +#define ARIZONA_AIF2_FRAME_CTRL_14 0x554 +#define ARIZONA_AIF2_FRAME_CTRL_15 0x555 +#define ARIZONA_AIF2_FRAME_CTRL_16 0x556 #define ARIZONA_AIF2_TX_ENABLES 0x559 #define ARIZONA_AIF2_RX_ENABLES 0x55A #define ARIZONA_AIF2_FORCE_WRITE 0x55B @@ -313,6 +324,10 @@ #define ARIZONA_AIF3_TX_ENABLES 0x599 #define ARIZONA_AIF3_RX_ENABLES 0x59A #define ARIZONA_AIF3_FORCE_WRITE 0x59B +#define ARIZONA_SPD1_TX_CONTROL 0x5C2 +#define ARIZONA_SPD1_TX_CHANNEL_STATUS_1 0x5C3 +#define ARIZONA_SPD1_TX_CHANNEL_STATUS_2 0x5C4 +#define ARIZONA_SPD1_TX_CHANNEL_STATUS_3 0x5C5 #define ARIZONA_SLIMBUS_FRAMER_REF_GEAR 0x5E3 #define ARIZONA_SLIMBUS_RATES_1 0x5E5 #define ARIZONA_SLIMBUS_RATES_2 0x5E6 @@ -646,6 +661,10 @@ #define ARIZONA_SLIMTX8MIX_INPUT_3_VOLUME 0x7FD #define ARIZONA_SLIMTX8MIX_INPUT_4_SOURCE 0x7FE #define ARIZONA_SLIMTX8MIX_INPUT_4_VOLUME 0x7FF +#define ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE 0x800 +#define ARIZONA_SPDIFTX1MIX_INPUT_1_VOLUME 0x801 +#define ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE 0x808 +#define ARIZONA_SPDIFTX2MIX_INPUT_1_VOLUME 0x809 #define ARIZONA_EQ1MIX_INPUT_1_SOURCE 0x880 #define ARIZONA_EQ1MIX_INPUT_1_VOLUME 0x881 #define ARIZONA_EQ1MIX_INPUT_2_SOURCE 0x882 @@ -1178,6 +1197,13 @@ #define ARIZONA_DSP4_SCRATCH_1 0x1441 #define ARIZONA_DSP4_SCRATCH_2 0x1442 #define ARIZONA_DSP4_SCRATCH_3 0x1443 +#define ARIZONA_FRF_COEFF_1 0x1700 +#define ARIZONA_FRF_COEFF_2 0x1701 +#define ARIZONA_FRF_COEFF_3 0x1702 +#define ARIZONA_FRF_COEFF_4 0x1703 +#define ARIZONA_V2_DAC_COMP_1 0x1704 +#define ARIZONA_V2_DAC_COMP_2 0x1705 + /* * Field Definitions. @@ -2507,6 +2533,12 @@ /* * R785 (0x311) - ADC Digital Volume 1L */ +#define ARIZONA_IN1L_SRC_MASK 0x4000 /* IN1L_SRC - [14] */ +#define ARIZONA_IN1L_SRC_SHIFT 14 /* IN1L_SRC - [14] */ +#define ARIZONA_IN1L_SRC_WIDTH 1 /* IN1L_SRC - [14] */ +#define ARIZONA_IN1L_SRC_SE_MASK 0x2000 /* IN1L_SRC - [13] */ +#define ARIZONA_IN1L_SRC_SE_SHIFT 13 /* IN1L_SRC - [13] */ +#define ARIZONA_IN1L_SRC_SE_WIDTH 1 /* IN1L_SRC - [13] */ #define ARIZONA_IN_VU 0x0200 /* IN_VU */ #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */ #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */ @@ -2539,6 +2571,12 @@ /* * R789 (0x315) - ADC Digital Volume 1R */ +#define ARIZONA_IN1R_SRC_MASK 0x4000 /* IN1R_SRC - [14] */ +#define ARIZONA_IN1R_SRC_SHIFT 14 /* IN1R_SRC - [14] */ +#define ARIZONA_IN1R_SRC_WIDTH 1 /* IN1R_SRC - [14] */ +#define ARIZONA_IN1R_SRC_SE_MASK 0x2000 /* IN1R_SRC - [13] */ +#define ARIZONA_IN1R_SRC_SE_SHIFT 13 /* IN1R_SRC - [13] */ +#define ARIZONA_IN1R_SRC_SE_WIDTH 1 /* IN1R_SRC - [13] */ #define ARIZONA_IN_VU 0x0200 /* IN_VU */ #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */ #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */ @@ -2583,6 +2621,12 @@ /* * R793 (0x319) - ADC Digital Volume 2L */ +#define ARIZONA_IN2L_SRC_MASK 0x4000 /* IN2L_SRC - [14] */ +#define ARIZONA_IN2L_SRC_SHIFT 14 /* IN2L_SRC - [14] */ +#define ARIZONA_IN2L_SRC_WIDTH 1 /* IN2L_SRC - [14] */ +#define ARIZONA_IN2L_SRC_SE_MASK 0x2000 /* IN2L_SRC - [13] */ +#define ARIZONA_IN2L_SRC_SE_SHIFT 13 /* IN2L_SRC - [13] */ +#define ARIZONA_IN2L_SRC_SE_WIDTH 1 /* IN2L_SRC - [13] */ #define ARIZONA_IN_VU 0x0200 /* IN_VU */ #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */ #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */ @@ -3432,12 +3476,22 @@ #define ARIZONA_DRE1L_ENA_SHIFT 0 /* DRE1L_ENA */ #define ARIZONA_DRE1L_ENA_WIDTH 1 /* DRE1L_ENA */ +/* + * R1089 (0x441) - DRE Control 1 + */ +#define ARIZONA_DRE_ENV_TC_FAST_MASK 0x0F00 /* DRE_ENV_TC_FAST - [11:8] */ +#define ARIZONA_DRE_ENV_TC_FAST_SHIFT 8 /* DRE_ENV_TC_FAST - [11:8] */ +#define ARIZONA_DRE_ENV_TC_FAST_WIDTH 4 /* DRE_ENV_TC_FAST - [11:8] */ + /* * R1090 (0x442) - DRE Control 2 */ #define ARIZONA_DRE_T_LOW_MASK 0x3F00 /* DRE_T_LOW - [13:8] */ #define ARIZONA_DRE_T_LOW_SHIFT 8 /* DRE_T_LOW - [13:8] */ #define ARIZONA_DRE_T_LOW_WIDTH 6 /* DRE_T_LOW - [13:8] */ +#define ARIZONA_DRE_ALOG_VOL_DELAY_MASK 0x000F /* DRE_ALOG_VOL_DELAY - [3:0] */ +#define ARIZONA_DRE_ALOG_VOL_DELAY_SHIFT 0 /* DRE_ALOG_VOL_DELAY - [3:0] */ +#define ARIZONA_DRE_ALOG_VOL_DELAY_WIDTH 4 /* DRE_ALOG_VOL_DELAY - [3:0] */ /* * R1091 (0x443) - DRE Control 3 @@ -4328,6 +4382,86 @@ #define ARIZONA_AIF3_FRC_WR_SHIFT 0 /* AIF3_FRC_WR */ #define ARIZONA_AIF3_FRC_WR_WIDTH 1 /* AIF3_FRC_WR */ +/* + * R1474 (0x5C2) - SPD1 TX Control + */ +#define ARIZONA_SPD1_VAL2 0x2000 /* SPD1_VAL2 */ +#define ARIZONA_SPD1_VAL2_MASK 0x2000 /* SPD1_VAL2 */ +#define ARIZONA_SPD1_VAL2_SHIFT 13 /* SPD1_VAL2 */ +#define ARIZONA_SPD1_VAL2_WIDTH 1 /* SPD1_VAL2 */ +#define ARIZONA_SPD1_VAL1 0x1000 /* SPD1_VAL1 */ +#define ARIZONA_SPD1_VAL1_MASK 0x1000 /* SPD1_VAL1 */ +#define ARIZONA_SPD1_VAL1_SHIFT 12 /* SPD1_VAL1 */ +#define ARIZONA_SPD1_VAL1_WIDTH 1 /* SPD1_VAL1 */ +#define ARIZONA_SPD1_RATE_MASK 0x00F0 /* SPD1_RATE */ +#define ARIZONA_SPD1_RATE_SHIFT 4 /* SPD1_RATE */ +#define ARIZONA_SPD1_RATE_WIDTH 4 /* SPD1_RATE */ +#define ARIZONA_SPD1_ENA 0x0001 /* SPD1_ENA */ +#define ARIZONA_SPD1_ENA_MASK 0x0001 /* SPD1_ENA */ +#define ARIZONA_SPD1_ENA_SHIFT 0 /* SPD1_ENA */ +#define ARIZONA_SPD1_ENA_WIDTH 1 /* SPD1_ENA */ + +/* + * R1475 (0x5C3) - SPD1 TX Channel Status 1 + */ +#define ARIZONA_SPD1_CATCODE_MASK 0xFF00 /* SPD1_CATCODE */ +#define ARIZONA_SPD1_CATCODE_SHIFT 8 /* SPD1_CATCODE */ +#define ARIZONA_SPD1_CATCODE_WIDTH 8 /* SPD1_CATCODE */ +#define ARIZONA_SPD1_CHSTMODE_MASK 0x00C0 /* SPD1_CHSTMODE */ +#define ARIZONA_SPD1_CHSTMODE_SHIFT 6 /* SPD1_CHSTMODE */ +#define ARIZONA_SPD1_CHSTMODE_WIDTH 2 /* SPD1_CHSTMODE */ +#define ARIZONA_SPD1_PREEMPH_MASK 0x0038 /* SPD1_PREEMPH */ +#define ARIZONA_SPD1_PREEMPH_SHIFT 3 /* SPD1_PREEMPH */ +#define ARIZONA_SPD1_PREEMPH_WIDTH 3 /* SPD1_PREEMPH */ +#define ARIZONA_SPD1_NOCOPY 0x0004 /* SPD1_NOCOPY */ +#define ARIZONA_SPD1_NOCOPY_MASK 0x0004 /* SPD1_NOCOPY */ +#define ARIZONA_SPD1_NOCOPY_SHIFT 2 /* SPD1_NOCOPY */ +#define ARIZONA_SPD1_NOCOPY_WIDTH 1 /* SPD1_NOCOPY */ +#define ARIZONA_SPD1_NOAUDIO 0x0002 /* SPD1_NOAUDIO */ +#define ARIZONA_SPD1_NOAUDIO_MASK 0x0002 /* SPD1_NOAUDIO */ +#define ARIZONA_SPD1_NOAUDIO_SHIFT 1 /* SPD1_NOAUDIO */ +#define ARIZONA_SPD1_NOAUDIO_WIDTH 1 /* SPD1_NOAUDIO */ +#define ARIZONA_SPD1_PRO 0x0001 /* SPD1_PRO */ +#define ARIZONA_SPD1_PRO_MASK 0x0001 /* SPD1_PRO */ +#define ARIZONA_SPD1_PRO_SHIFT 0 /* SPD1_PRO */ +#define ARIZONA_SPD1_PRO_WIDTH 1 /* SPD1_PRO */ + +/* + * R1475 (0x5C4) - SPD1 TX Channel Status 2 + */ +#define ARIZONA_SPD1_FREQ_MASK 0xF000 /* SPD1_FREQ */ +#define ARIZONA_SPD1_FREQ_SHIFT 12 /* SPD1_FREQ */ +#define ARIZONA_SPD1_FREQ_WIDTH 4 /* SPD1_FREQ */ +#define ARIZONA_SPD1_CHNUM2_MASK 0x0F00 /* SPD1_CHNUM2 */ +#define ARIZONA_SPD1_CHNUM2_SHIFT 8 /* SPD1_CHNUM2 */ +#define ARIZONA_SPD1_CHNUM2_WIDTH 4 /* SPD1_CHNUM2 */ +#define ARIZONA_SPD1_CHNUM1_MASK 0x00F0 /* SPD1_CHNUM1 */ +#define ARIZONA_SPD1_CHNUM1_SHIFT 4 /* SPD1_CHNUM1 */ +#define ARIZONA_SPD1_CHNUM1_WIDTH 4 /* SPD1_CHNUM1 */ +#define ARIZONA_SPD1_SRCNUM_MASK 0x000F /* SPD1_SRCNUM */ +#define ARIZONA_SPD1_SRCNUM_SHIFT 0 /* SPD1_SRCNUM */ +#define ARIZONA_SPD1_SRCNUM_WIDTH 4 /* SPD1_SRCNUM */ + +/* + * R1475 (0x5C5) - SPD1 TX Channel Status 3 + */ +#define ARIZONA_SPD1_ORGSAMP_MASK 0x0F00 /* SPD1_ORGSAMP */ +#define ARIZONA_SPD1_ORGSAMP_SHIFT 8 /* SPD1_ORGSAMP */ +#define ARIZONA_SPD1_ORGSAMP_WIDTH 4 /* SPD1_ORGSAMP */ +#define ARIZONA_SPD1_TXWL_MASK 0x00E0 /* SPD1_TXWL */ +#define ARIZONA_SPD1_TXWL_SHIFT 5 /* SPD1_TXWL */ +#define ARIZONA_SPD1_TXWL_WIDTH 3 /* SPD1_TXWL */ +#define ARIZONA_SPD1_MAXWL 0x0010 /* SPD1_MAXWL */ +#define ARIZONA_SPD1_MAXWL_MASK 0x0010 /* SPD1_MAXWL */ +#define ARIZONA_SPD1_MAXWL_SHIFT 4 /* SPD1_MAXWL */ +#define ARIZONA_SPD1_MAXWL_WIDTH 1 /* SPD1_MAXWL */ +#define ARIZONA_SPD1_CS31_30_MASK 0x000C /* SPD1_CS31_30 */ +#define ARIZONA_SPD1_CS31_30_SHIFT 2 /* SPD1_CS31_30 */ +#define ARIZONA_SPD1_CS31_30_WIDTH 2 /* SPD1_CS31_30 */ +#define ARIZONA_SPD1_CLKACU_MASK 0x0003 /* SPD1_CLKACU */ +#define ARIZONA_SPD1_CLKACU_SHIFT 2 /* SPD1_CLKACU */ +#define ARIZONA_SPD1_CLKACU_WIDTH 0 /* SPD1_CLKACU */ + /* * R1507 (0x5E3) - SLIMbus Framer Ref Gear */ @@ -5701,6 +5835,10 @@ /* * R3366 (0xD26) - Interrupt Raw Status 8 */ +#define ARIZONA_SPDIF_OVERCLOCKED_STS 0x8000 /* SPDIF_OVERCLOCKED_STS */ +#define ARIZONA_SPDIF_OVERCLOCKED_STS_MASK 0x8000 /* SPDIF_OVERCLOCKED_STS */ +#define ARIZONA_SPDIF_OVERCLOCKED_STS_SHIFT 15 /* SPDIF_OVERCLOCKED_STS */ +#define ARIZONA_SPDIF_OVERCLOCKED_STS_WIDTH 1 /* SPDIF_OVERCLOCKED_STS */ #define ARIZONA_AIF3_UNDERCLOCKED_STS 0x0400 /* AIF3_UNDERCLOCKED_STS */ #define ARIZONA_AIF3_UNDERCLOCKED_STS_MASK 0x0400 /* AIF3_UNDERCLOCKED_STS */ #define ARIZONA_AIF3_UNDERCLOCKED_STS_SHIFT 10 /* AIF3_UNDERCLOCKED_STS */ From 8578b944e775d900028fa434182b92ec44381348 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 10 Feb 2014 16:50:51 +0000 Subject: [PATCH 0400/1167] gpio: arizona: add support for WM8998 and WM1814 Change-Id: I91cf74f8e980f897484479a2be325799345eae0a Signed-off-by: Richard Fitzgerald --- drivers/gpio/gpio-arizona.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpio/gpio-arizona.c b/drivers/gpio/gpio-arizona.c index 94c272c270b..4e3f54d04f3 100644 --- a/drivers/gpio/gpio-arizona.c +++ b/drivers/gpio/gpio-arizona.c @@ -118,6 +118,8 @@ static int arizona_gpio_probe(struct platform_device *pdev) case WM8280: case WM5110: case WM8997: + case WM8998: + case WM1814: arizona_gpio->gpio_chip.ngpio = 5; break; default: From a0ae2a2c4be6725b4b1f8adcffad6ceb19383366 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 19 May 2014 10:53:55 +0100 Subject: [PATCH 0401/1167] regulator: arizona: add support for WM8998 and WM1814 Change-Id: Ia58d685edf1ceb730c84fe3fa14c01a992901d1a Signed-off-by: Richard Fitzgerald --- drivers/regulator/arizona-ldo1.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/regulator/arizona-ldo1.c b/drivers/regulator/arizona-ldo1.c index 57b47988f75..154dbce4c76 100644 --- a/drivers/regulator/arizona-ldo1.c +++ b/drivers/regulator/arizona-ldo1.c @@ -234,6 +234,8 @@ static int arizona_ldo1_probe(struct platform_device *pdev) switch (arizona->type) { case WM5102: case WM8997: + case WM8998: + case WM1814: desc = &arizona_ldo1_hc; ldo1->init_data = arizona_ldo1_dvfs; break; From a3bc7663643e6f00c89c3ccccdd1fe3a7343c415 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 19 May 2014 10:57:13 +0100 Subject: [PATCH 0402/1167] extcon: arizona: Add support for WM8998 and WM1814 Change-Id: I6752b9618282ac235114abc0b8469d7c0f0a19be Signed-off-by: Richard Fitzgerald --- drivers/extcon/extcon-arizona.c | 29 ++++++++++++++++++++--------- 1 file changed, 20 insertions(+), 9 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 0bccf01eee8..6bb05c5624e 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -1,7 +1,7 @@ /* * extcon-arizona.c - Extcon driver Wolfson Arizona devices * - * Copyright (C) 2012 Wolfson Microelectronics plc + * Copyright (C) 2012-2014 Wolfson Microelectronics plc * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -159,10 +159,14 @@ static void arizona_extcon_do_magic(struct arizona_extcon_info *info, unsigned int magic) { struct arizona *arizona = info->arizona; - unsigned int mask = 0, val = 0; + unsigned int mask, val = 0; int ret; switch (arizona->type) { + case WM8998: + case WM1814: + mask = 0; + break; case WM8280: case WM5110: mask = 0x0007; @@ -194,15 +198,17 @@ static void arizona_extcon_do_magic(struct arizona_extcon_info *info, ret); } - ret = regmap_update_bits(arizona->regmap, 0x225, mask, val); - if (ret != 0) - dev_warn(arizona->dev, "Failed to do magic: %d\n", + if (mask) { + ret = regmap_update_bits(arizona->regmap, 0x225, mask, val); + if (ret != 0) + dev_warn(arizona->dev, "Failed to do magic: %d\n", ret); - ret = regmap_update_bits(arizona->regmap, 0x226, mask, val); - if (ret != 0) - dev_warn(arizona->dev, "Failed to do magic: %d\n", - ret); + ret = regmap_update_bits(arizona->regmap, 0x226, mask, val); + if (ret != 0) + dev_warn(arizona->dev, "Failed to do magic: %d\n", + ret); + } /* Restore the desired state while not doing the magic */ if (!magic) { @@ -1333,6 +1339,11 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; } break; + case WM8998: + case WM1814: + info->micd_clamp = true; + info->hpdet_ip = 2; + break; default: break; } From 24084ccd9d9c65a722fea14d395c3eae4e7b594a Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 10 Feb 2014 16:46:35 +0000 Subject: [PATCH 0403/1167] switch: arizona: Add support for WM8998 and WM1814 Change-Id: Ie4666f6af71d8e6113f57b53028b432806b47606 Signed-off-by: Richard Fitzgerald --- drivers/switch/switch-arizona.c | 29 ++++++++++++++++++++--------- 1 file changed, 20 insertions(+), 9 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index d00f974c460..84766b4a69b 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1,7 +1,7 @@ /* * extcon-arizona.c - Extcon driver Wolfson Arizona devices * - * Copyright (C) 2012 Wolfson Microelectronics plc + * Copyright (C) 2012-2014 Wolfson Microelectronics plc * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -234,10 +234,14 @@ static void arizona_extcon_do_magic(struct arizona_extcon_info *info, unsigned int magic) { struct arizona *arizona = info->arizona; - unsigned int mask = 0, val = 0; + unsigned int mask, val = 0; int ret; switch (arizona->type) { + case WM1814: + case WM8998: + mask = 0; + break; case WM8280: case WM5110: mask = 0x0007; @@ -269,15 +273,17 @@ static void arizona_extcon_do_magic(struct arizona_extcon_info *info, ret); } - ret = regmap_update_bits(arizona->regmap, 0x225, mask, val); - if (ret != 0) - dev_warn(arizona->dev, "Failed to do magic: %d\n", + if (mask) { + ret = regmap_update_bits(arizona->regmap, 0x225, mask, val); + if (ret != 0) + dev_warn(arizona->dev, "Failed to do magic: %d\n", ret); - ret = regmap_update_bits(arizona->regmap, 0x226, mask, val); - if (ret != 0) - dev_warn(arizona->dev, "Failed to do magic: %d\n", - ret); + ret = regmap_update_bits(arizona->regmap, 0x226, mask, val); + if (ret != 0) + dev_warn(arizona->dev, "Failed to do magic: %d\n", + ret); + } /* Restore the desired state while not doing the magic */ if (!magic && arizona->hp_impedance > ARIZONA_HP_SHORT_IMPEDANCE) { @@ -1781,6 +1787,11 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; } break; + case WM8998: + case WM1814: + info->micd_clamp = true; + info->hpdet_ip = 2; + break; default: break; } From 5bb5490e5fba84c75d7ed1b8e6a3651352b14f55 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 26 Feb 2014 12:42:48 +0000 Subject: [PATCH 0404/1167] ASoC: arizona: add defines for single-input gain control Adds convenience defines for declaring a gain control that has an input mux. These block are functionally equivalent to the existing mixer blocks but only have a single input. Change-Id: Ide543376d0f505fbeda9cb9711dec0a131ca6389 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 3d59147f3f3..eafdedd0662 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -88,6 +88,11 @@ extern const unsigned int arizona_mixer_tlv[]; extern const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS]; extern int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS]; +#define ARIZONA_GAINMUX_CONTROLS(name, base) \ + SOC_SINGLE_RANGE_TLV(name " Input Volume", base + 1, \ + ARIZONA_MIXER_VOL_SHIFT, 0x20, 0x50, 0, \ + arizona_mixer_tlv) + #define ARIZONA_MIXER_CONTROLS(name, base) \ SOC_SINGLE_RANGE_TLV(name " Input 1 Volume", base + 1, \ ARIZONA_MIXER_VOL_SHIFT, 0x20, 0x50, 0, \ From 2d7925c7fa00571c2612b178d4ff3e7f0a773533 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 4 Jun 2014 12:02:17 +0100 Subject: [PATCH 0405/1167] ASoC: wm8998: Initial WM8998 codec driver Change-Id: If685bcf82d2981431c1fdb5c7156119827429f3c Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/Kconfig | 6 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/arizona.c | 15 + sound/soc/codecs/arizona.h | 3 +- sound/soc/codecs/wm8998.c | 1404 ++++++++++++++++++++++++++++++++++++ sound/soc/codecs/wm8998.h | 23 + 6 files changed, 1452 insertions(+), 1 deletion(-) create mode 100644 sound/soc/codecs/wm8998.c create mode 100644 sound/soc/codecs/wm8998.h diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index c52bac71c0d..ef7bd61a89f 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -121,6 +121,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_WM8995 if SND_SOC_I2C_AND_SPI select SND_SOC_WM8996 if I2C select SND_SOC_WM8997 if MFD_WM8997 + select SND_SOC_WM8998 if MFD_WM8998 select SND_SOC_WM9081 if I2C select SND_SOC_WM9090 if I2C select SND_SOC_WM9705 if SND_SOC_AC97_BUS @@ -145,9 +146,11 @@ config SND_SOC_ARIZONA default y if SND_SOC_WM5102=y default y if SND_SOC_FLORIDA=y default y if SND_SOC_WM8997=y + default y if SND_SOC_WM8998=y default m if SND_SOC_WM5102=m default m if SND_SOC_FLORIDA=m default m if SND_SOC_WM8997=m + default m if SND_SOC_WM8998=m config SND_SOC_WM_HUBS tristate @@ -500,6 +503,9 @@ config SND_SOC_WM8996 config SND_SOC_WM8997 tristate +config SND_SOC_WM8998 + tristate + config SND_SOC_WM9081 tristate diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index e132d85a7eb..817062f04a0 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -113,6 +113,7 @@ snd-soc-wm8993-objs := wm8993.o snd-soc-wm8994-objs := wm8994.o wm8958-dsp2.o snd-soc-wm8995-objs := wm8995.o snd-soc-wm8997-objs := wm8997.o +snd-soc-wm8998-objs := wm8998.o snd-soc-wm9081-objs := wm9081.o snd-soc-wm9090-objs := wm9090.o snd-soc-wm9705-objs := wm9705.o @@ -237,6 +238,7 @@ obj-$(CONFIG_SND_SOC_WM8993) += snd-soc-wm8993.o obj-$(CONFIG_SND_SOC_WM8994) += snd-soc-wm8994.o obj-$(CONFIG_SND_SOC_WM8995) += snd-soc-wm8995.o obj-$(CONFIG_SND_SOC_WM8997) += snd-soc-wm8997.o +obj-$(CONFIG_SND_SOC_WM8998) += snd-soc-wm8998.o obj-$(CONFIG_SND_SOC_WM9081) += snd-soc-wm9081.o obj-$(CONFIG_SND_SOC_WM9090) += snd-soc-wm9090.o obj-$(CONFIG_SND_SOC_WM9705) += snd-soc-wm9705.o diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 9303ebc615f..d681301d11a 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -321,6 +321,7 @@ const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = { "Tone Generator 2", "Haptics", "AEC", + "AEC2", "Mic Mute Mixer", "Noise Generator", "IN1L", @@ -428,6 +429,7 @@ int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = { 0x05, 0x06, /* Haptics */ 0x08, /* AEC */ + 0x09, /* AEC2 */ 0x0c, /* Noise mixer */ 0x0d, /* Comfort noise */ 0x10, /* IN1L */ @@ -573,6 +575,12 @@ const struct soc_enum arizona_output_rate = arizona_sample_rate_val); EXPORT_SYMBOL_GPL(arizona_output_rate); +const SOC_ENUM_SINGLE_DECL(arizona_spdif_rate, + ARIZONA_SPD1_TX_CONTROL, + ARIZONA_SPD1_RATE_SHIFT, + arizona_rate_text); +EXPORT_SYMBOL_GPL(arizona_spdif_rate); + const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE] = { 0, 1, 2, 8, }; @@ -1723,6 +1731,8 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, switch (priv->arizona->type) { case WM5102: case WM8997: + case WM8998: + case WM1814: if (arizona_sr_vals[sr_val] >= 88200) ret = arizona_dvfs_up(priv->arizona, ARIZONA_DVFS_SR1_RQ); @@ -2226,6 +2236,11 @@ static int arizona_calc_fratio(struct arizona_fll *fll, if (fll->arizona->rev < 3 || sync) return init_ratio; break; + case WM8998: + case WM1814: + if (sync) + return init_ratio; + break; default: return init_ratio; } diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index eafdedd0662..f5418d28a1e 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -82,7 +82,7 @@ struct arizona_priv { unsigned int in_pending; }; -#define ARIZONA_NUM_MIXER_INPUTS 103 +#define ARIZONA_NUM_MIXER_INPUTS 104 extern const unsigned int arizona_mixer_tlv[]; extern const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS]; @@ -210,6 +210,7 @@ extern const struct soc_enum arizona_isrc_fsl[]; extern const struct soc_enum arizona_isrc_fsh[]; extern const struct soc_enum arizona_asrc_rate1; extern const struct soc_enum arizona_output_rate; +extern const struct soc_enum arizona_spdif_rate; extern const struct soc_enum arizona_in_vi_ramp; extern const struct soc_enum arizona_in_vd_ramp; diff --git a/sound/soc/codecs/wm8998.c b/sound/soc/codecs/wm8998.c new file mode 100644 index 00000000000..659d32b02f2 --- /dev/null +++ b/sound/soc/codecs/wm8998.c @@ -0,0 +1,1404 @@ +/* + * wm8998.c -- ALSA SoC Audio driver for WM8998 codecs + * + * Copyright 2014 Wolfson Microelectronics plc + * + * Author: Richard Fitzgerald + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "arizona.h" +#include "wm8998.h" + +struct wm8998_priv { + struct arizona_priv core; + struct arizona_fll fll[2]; +}; + +static int wm8998_in1mux_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event); + +static int wm8998_in2mux_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event); + +static const char * const wm8998_in1mux_texts[] = { + "IN1A", + "IN1B", +}; + +static const char * const wm8998_in2mux_texts[] = { + "IN2A", + "IN2B", +}; + +static const SOC_ENUM_SINGLE_DECL(wm8998_in1muxl_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_SRC_SHIFT, + wm8998_in1mux_texts); + +static const SOC_ENUM_SINGLE_DECL(wm8998_in1muxr_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1R, + ARIZONA_IN1R_SRC_SHIFT, + wm8998_in1mux_texts); + +static const SOC_ENUM_SINGLE_DECL(wm8998_in2mux_enum, + ARIZONA_ADC_DIGITAL_VOLUME_2L, + ARIZONA_IN2L_SRC_SHIFT, + wm8998_in2mux_texts); + +static const struct snd_kcontrol_new wm8998_in1mux[2] = { + SOC_DAPM_ENUM("Route", wm8998_in1muxl_enum), + SOC_DAPM_ENUM("Route", wm8998_in1muxr_enum), +}; + +static const struct snd_kcontrol_new wm8998_in2mux = + SOC_DAPM_ENUM("Route", wm8998_in2mux_enum); + +static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); +static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); +static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); +static DECLARE_TLV_DB_SCALE(noise_tlv, 0, 600, 0); +static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); + +#define WM8998_NG_SRC(name, base) \ + SOC_SINGLE(name " NG HPOUTL Switch", base, 0, 1, 0), \ + SOC_SINGLE(name " NG HPOUTR Switch", base, 1, 1, 0), \ + SOC_SINGLE(name " NG LINEOUTL Switch", base, 2, 1, 0), \ + SOC_SINGLE(name " NG LINEOUTR Switch", base, 3, 1, 0), \ + SOC_SINGLE(name " NG EPOUT Switch", base, 4, 1, 0), \ + SOC_SINGLE(name " NG SPKOUTL Switch", base, 6, 1, 0), \ + SOC_SINGLE(name " NG SPKOUTR Switch", base, 7, 1, 0) + +static const struct snd_kcontrol_new wm8998_snd_controls[] = { +SOC_ENUM("IN1 OSR", arizona_in_dmic_osr[0]), +SOC_ENUM("IN2 OSR", arizona_in_dmic_osr[1]), + +SOC_SINGLE_RANGE_TLV("IN1L Volume", ARIZONA_IN1L_CONTROL, + ARIZONA_IN1L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), +SOC_SINGLE_RANGE_TLV("IN1R Volume", ARIZONA_IN1R_CONTROL, + ARIZONA_IN1R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), +SOC_SINGLE_RANGE_TLV("IN2 Volume", ARIZONA_IN2L_CONTROL, + ARIZONA_IN2L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), + +SOC_ENUM("IN HPF Cutoff Frequency", arizona_in_hpf_cut_enum), + +SOC_SINGLE("IN1L HPF Switch", ARIZONA_IN1L_CONTROL, + ARIZONA_IN1L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN1R HPF Switch", ARIZONA_IN1R_CONTROL, + ARIZONA_IN1R_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN2 HPF Switch", ARIZONA_IN2L_CONTROL, + ARIZONA_IN2L_HPF_SHIFT, 1, 0), + +SOC_SINGLE_TLV("IN1L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN1R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1R, + ARIZONA_IN1R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN2 Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_2L, + ARIZONA_IN2L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), + +SOC_ENUM("Input Ramp Up", arizona_in_vi_ramp), +SOC_ENUM("Input Ramp Down", arizona_in_vd_ramp), + +ARIZONA_GAINMUX_CONTROLS("EQ1", ARIZONA_EQ1MIX_INPUT_1_SOURCE), +ARIZONA_GAINMUX_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), +ARIZONA_GAINMUX_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), +ARIZONA_GAINMUX_CONTROLS("EQ4", ARIZONA_EQ4MIX_INPUT_1_SOURCE), + +SND_SOC_BYTES("EQ1 Coefficients", ARIZONA_EQ1_3, 19), +SOC_SINGLE("EQ1 Mode Switch", ARIZONA_EQ1_2, ARIZONA_EQ1_B1_MODE_SHIFT, 1, 0), +SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B2 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B3 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B4 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B5 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +SND_SOC_BYTES("EQ2 Coefficients", ARIZONA_EQ2_3, 19), +SOC_SINGLE("EQ2 Mode Switch", ARIZONA_EQ2_2, ARIZONA_EQ2_B1_MODE_SHIFT, 1, 0), +SOC_SINGLE_TLV("EQ2 B1 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B2 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B3 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B4 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B5 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +SND_SOC_BYTES("EQ3 Coefficients", ARIZONA_EQ3_3, 19), +SOC_SINGLE("EQ3 Mode Switch", ARIZONA_EQ3_2, ARIZONA_EQ3_B1_MODE_SHIFT, 1, 0), +SOC_SINGLE_TLV("EQ3 B1 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B2 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B3 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B4 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B5 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +SND_SOC_BYTES("EQ4 Coefficients", ARIZONA_EQ4_3, 19), +SOC_SINGLE("EQ4 Mode Switch", ARIZONA_EQ4_2, ARIZONA_EQ4_B1_MODE_SHIFT, 1, 0), +SOC_SINGLE_TLV("EQ4 B1 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B2 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B3 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B4 Volume", ARIZONA_EQ4_2, ARIZONA_EQ4_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B5 Volume", ARIZONA_EQ4_2, ARIZONA_EQ4_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +ARIZONA_GAINMUX_CONTROLS("DRC1L", ARIZONA_DRC1LMIX_INPUT_1_SOURCE), +ARIZONA_GAINMUX_CONTROLS("DRC1R", ARIZONA_DRC1RMIX_INPUT_1_SOURCE), + +SND_SOC_BYTES_MASK("DRC1", ARIZONA_DRC1_CTRL1, 5, + ARIZONA_DRC1R_ENA | ARIZONA_DRC1L_ENA), + +ARIZONA_MIXER_CONTROLS("LHPF1", ARIZONA_HPLP1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LHPF2", ARIZONA_HPLP2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LHPF3", ARIZONA_HPLP3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LHPF4", ARIZONA_HPLP4MIX_INPUT_1_SOURCE), + +SND_SOC_BYTES("LHPF1 Coefficients", ARIZONA_HPLPF1_2, 1), +SND_SOC_BYTES("LHPF2 Coefficients", ARIZONA_HPLPF2_2, 1), +SND_SOC_BYTES("LHPF3 Coefficients", ARIZONA_HPLPF3_2, 1), +SND_SOC_BYTES("LHPF4 Coefficients", ARIZONA_HPLPF4_2, 1), + +SOC_ENUM("LHPF1 Mode", arizona_lhpf1_mode), +SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode), +SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode), +SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), + +SOC_VALUE_ENUM("Sample Rate 2", arizona_sample_rate[0]), +SOC_VALUE_ENUM("Sample Rate 3", arizona_sample_rate[1]), + +SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), +SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), +SOC_VALUE_ENUM("ISRC1 FSH", arizona_isrc_fsh[0]), +SOC_VALUE_ENUM("ISRC2 FSH", arizona_isrc_fsh[1]), +SOC_VALUE_ENUM("ASRC RATE 1", arizona_asrc_rate1), + +SOC_SINGLE_TLV("Noise Generator Volume", ARIZONA_COMFORT_NOISE_GENERATOR, + ARIZONA_NOISE_GEN_GAIN_SHIFT, 0x16, 0, noise_tlv), + +ARIZONA_MIXER_CONTROLS("HPOUTL", ARIZONA_OUT1LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("HPOUTR", ARIZONA_OUT1RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LINEOUTL", ARIZONA_OUT2LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LINEOUTR", ARIZONA_OUT2RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("EPOUT", ARIZONA_OUT3LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SPKOUTL", ARIZONA_OUT4LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SPKOUTR", ARIZONA_OUT4RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SPKDATL", ARIZONA_OUT5LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SPKDATR", ARIZONA_OUT5RMIX_INPUT_1_SOURCE), + +SOC_DOUBLE_R("HPOUT Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_1L, + ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_MUTE_SHIFT, 1, 1), +SOC_DOUBLE_R("LINEOUT Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_2L, + ARIZONA_DAC_DIGITAL_VOLUME_2R, ARIZONA_OUT2L_MUTE_SHIFT, 1, 1), +SOC_SINGLE("EPOUT Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_3L, + ARIZONA_OUT3L_MUTE_SHIFT, 1, 1), +SOC_DOUBLE_R("Speaker Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_4L, + ARIZONA_DAC_DIGITAL_VOLUME_4R, ARIZONA_OUT4L_MUTE_SHIFT, 1, 1), +SOC_DOUBLE_R("SPKDAT Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_5L, + ARIZONA_DAC_DIGITAL_VOLUME_5R, ARIZONA_OUT5L_MUTE_SHIFT, 1, 1), + +SOC_DOUBLE_R_TLV("HPOUT Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_1L, + ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_VOL_SHIFT, + 0xbf, 0, digital_tlv), +SOC_DOUBLE_R_TLV("LINEOUT Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_2L, + ARIZONA_DAC_DIGITAL_VOLUME_2R, ARIZONA_OUT2L_VOL_SHIFT, + 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("EPOUT Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_3L, + ARIZONA_OUT3L_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_DOUBLE_R_TLV("Speaker Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_4L, + ARIZONA_DAC_DIGITAL_VOLUME_4R, ARIZONA_OUT4L_VOL_SHIFT, + 0xbf, 0, digital_tlv), +SOC_DOUBLE_R_TLV("SPKDAT Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_5L, + ARIZONA_DAC_DIGITAL_VOLUME_5R, ARIZONA_OUT5L_VOL_SHIFT, + 0xbf, 0, digital_tlv), + +SOC_DOUBLE("SPKDAT Switch", ARIZONA_PDM_SPK1_CTRL_1, ARIZONA_SPK1L_MUTE_SHIFT, + ARIZONA_SPK1R_MUTE_SHIFT, 1, 1), + +SOC_DOUBLE("HPOUT DRE Switch", ARIZONA_DRE_ENABLE, + ARIZONA_DRE1L_ENA_SHIFT, ARIZONA_DRE1R_ENA_SHIFT, 1, 0), +SOC_DOUBLE("LINEOUT DRE Switch", ARIZONA_DRE_ENABLE, + ARIZONA_DRE2L_ENA_SHIFT, ARIZONA_DRE2R_ENA_SHIFT, 1, 0), +SOC_SINGLE("EPOUT DRE Switch", ARIZONA_DRE_ENABLE, + ARIZONA_DRE3L_ENA_SHIFT, 1, 0), + +SOC_SINGLE("DRE Threshold", ARIZONA_DRE_CONTROL_2, + ARIZONA_DRE_T_LOW_SHIFT, 63, 0), + +SOC_SINGLE("DRE Low Level ABS", ARIZONA_DRE_CONTROL_3, + ARIZONA_DRE_LOW_LEVEL_ABS_SHIFT, 15, 0), + +SOC_SINGLE("DRE TC Fast", ARIZONA_DRE_CONTROL_1, + ARIZONA_DRE_ENV_TC_FAST_SHIFT, 15, 0), + +SOC_SINGLE("DRE Analogue Volume Delay", ARIZONA_DRE_CONTROL_2, + ARIZONA_DRE_ALOG_VOL_DELAY_SHIFT, 15, 0), + +SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp), +SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp), + +SOC_ENUM("SPDIF Rate", arizona_spdif_rate), + +SOC_SINGLE("Noise Gate Switch", ARIZONA_NOISE_GATE_CONTROL, + ARIZONA_NGATE_ENA_SHIFT, 1, 0), +SOC_SINGLE_TLV("Noise Gate Threshold Volume", ARIZONA_NOISE_GATE_CONTROL, + ARIZONA_NGATE_THR_SHIFT, 7, 1, ng_tlv), +SOC_ENUM("Noise Gate Hold", arizona_ng_hold), + +WM8998_NG_SRC("HPOUTL", ARIZONA_NOISE_GATE_SELECT_1L), +WM8998_NG_SRC("HPOUTR", ARIZONA_NOISE_GATE_SELECT_1R), +WM8998_NG_SRC("LINEOUTL", ARIZONA_NOISE_GATE_SELECT_2L), +WM8998_NG_SRC("LINEOUTR", ARIZONA_NOISE_GATE_SELECT_2R), +WM8998_NG_SRC("EPOUT", ARIZONA_NOISE_GATE_SELECT_3L), +WM8998_NG_SRC("SPKOUTL", ARIZONA_NOISE_GATE_SELECT_4L), +WM8998_NG_SRC("SPKOUTR", ARIZONA_NOISE_GATE_SELECT_4R), +WM8998_NG_SRC("SPKDATL", ARIZONA_NOISE_GATE_SELECT_5L), +WM8998_NG_SRC("SPKDATR", ARIZONA_NOISE_GATE_SELECT_5R), + +ARIZONA_MIXER_CONTROLS("AIF1TX1", ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX2", ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX3", ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX4", ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX5", ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX6", ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("AIF2TX1", ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX2", ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX3", ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX4", ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX5", ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX6", ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("AIF3TX1", ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF3TX2", ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE), + +ARIZONA_GAINMUX_CONTROLS("SLIMTX1", ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE), +ARIZONA_GAINMUX_CONTROLS("SLIMTX2", ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE), +ARIZONA_GAINMUX_CONTROLS("SLIMTX3", ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE), +ARIZONA_GAINMUX_CONTROLS("SLIMTX4", ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE), +ARIZONA_GAINMUX_CONTROLS("SLIMTX5", ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE), +ARIZONA_GAINMUX_CONTROLS("SLIMTX6", ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE), + +ARIZONA_GAINMUX_CONTROLS("SPDIFTX1", ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE), +ARIZONA_GAINMUX_CONTROLS("SPDIFTX2", ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE), +}; + +static const struct snd_kcontrol_new wm1814_snd_controls[] = { +SND_SOC_BYTES("FRF Coefficients", ARIZONA_FRF_COEFF_1, 4), +SND_SOC_BYTES("DAC Comp", ARIZONA_V2_DAC_COMP_1, 2), +SND_SOC_BYTES_MASK("HP1 Bias", ARIZONA_HP_TEST_CTRL_13, 1, 0x3FFF), +}; + +ARIZONA_MUX_ENUMS(EQ1, ARIZONA_EQ1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(EQ2, ARIZONA_EQ2MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(EQ3, ARIZONA_EQ3MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(EQ4, ARIZONA_EQ4MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(DRC1L, ARIZONA_DRC1LMIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(DRC1R, ARIZONA_DRC1RMIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(LHPF1, ARIZONA_HPLP1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(LHPF2, ARIZONA_HPLP2MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(LHPF3, ARIZONA_HPLP3MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(LHPF4, ARIZONA_HPLP4MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(PWM1, ARIZONA_PWM1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(PWM2, ARIZONA_PWM2MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(OUT1L, ARIZONA_OUT1LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(OUT1R, ARIZONA_OUT1RMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(OUT2L, ARIZONA_OUT2LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(OUT2R, ARIZONA_OUT2RMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(OUT3, ARIZONA_OUT3LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SPKOUTL, ARIZONA_OUT4LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SPKOUTR, ARIZONA_OUT4RMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SPKDATL, ARIZONA_OUT5LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SPKDATR, ARIZONA_OUT5RMIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(AIF1TX1, ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX2, ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX3, ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX4, ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX5, ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX6, ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(AIF2TX1, ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX2, ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX3, ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX4, ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX5, ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX6, ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(AIF3TX1, ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF3TX2, ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(SLIMTX1, ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(SLIMTX2, ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(SLIMTX3, ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(SLIMTX4, ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(SLIMTX5, ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(SLIMTX6, ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(SPD1TX1, ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(SPD1TX2, ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ASRC1L, ARIZONA_ASRC1LMIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ASRC1R, ARIZONA_ASRC1RMIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ASRC2L, ARIZONA_ASRC2LMIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ASRC2R, ARIZONA_ASRC2RMIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC1INT1, ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1INT2, ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1INT3, ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1INT4, ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC1DEC1, ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1DEC2, ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1DEC3, ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1DEC4, ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC2INT1, ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2INT2, ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC2DEC1, ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2DEC2, ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE); + +static const char *wm8998_aec_loopback_texts[] = { + "HPOUTL", "HPOUTR", "LINEOUTL", "LINEOUTR", "EPOUT", + "SPKOUTL", "SPKOUTR", "SPKDATL", "SPKDATR", +}; + +static const unsigned int wm8998_aec_loopback_values[] = { + 0, 1, 2, 3, 4, 6, 7, 8, 9, +}; + +static const SOC_VALUE_ENUM_SINGLE_DECL(wm8998_aec1_loopback, + ARIZONA_DAC_AEC_CONTROL_1, + ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, + wm8998_aec_loopback_texts, + wm8998_aec_loopback_values); + +static const SOC_VALUE_ENUM_SINGLE_DECL(wm8998_aec2_loopback, + ARIZONA_DAC_AEC_CONTROL_2, + ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, + wm8998_aec_loopback_texts, + wm8998_aec_loopback_values); + +static const struct snd_kcontrol_new wm8998_aec_loopback_mux[] = { + SOC_DAPM_VALUE_ENUM("AEC1 Loopback", wm8998_aec1_loopback), + SOC_DAPM_VALUE_ENUM("AEC2 Loopback", wm8998_aec2_loopback), +}; + +static const struct snd_soc_dapm_widget wm8998_dapm_widgets[] = { +SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, + ARIZONA_SYSCLK_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("ASYNCCLK", ARIZONA_ASYNC_CLOCK_1, + ARIZONA_ASYNC_CLK_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK, + ARIZONA_OPCLK_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("ASYNCOPCLK", ARIZONA_OUTPUT_ASYNC_CLOCK, + ARIZONA_OPCLK_ASYNC_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_REGULATOR_SUPPLY("DBVDD2", 0, 0), +SND_SOC_DAPM_REGULATOR_SUPPLY("DBVDD3", 0, 0), +SND_SOC_DAPM_REGULATOR_SUPPLY("CPVDD", 20, 0), +SND_SOC_DAPM_REGULATOR_SUPPLY("MICVDD", 0, SND_SOC_DAPM_REGULATOR_BYPASS), +SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDDL", 0, 0), +SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDDR", 0, 0), + +SND_SOC_DAPM_SIGGEN("TONE"), +SND_SOC_DAPM_SIGGEN("NOISE"), +SND_SOC_DAPM_SIGGEN("HAPTICS"), + +SND_SOC_DAPM_INPUT("IN1AL"), +SND_SOC_DAPM_INPUT("IN1AR"), +SND_SOC_DAPM_INPUT("IN1BL"), +SND_SOC_DAPM_INPUT("IN1BR"), +SND_SOC_DAPM_INPUT("IN2A"), +SND_SOC_DAPM_INPUT("IN2B"), + +SND_SOC_DAPM_MUX_E("IN1MUXL Input", SND_SOC_NOPM, 0, 0, &wm8998_in1mux[0], + wm8998_in1mux_ev, SND_SOC_DAPM_PRE_PMU), +SND_SOC_DAPM_MUX_E("IN1MUXR Input", SND_SOC_NOPM, 0, 0, &wm8998_in1mux[1], + wm8998_in1mux_ev, SND_SOC_DAPM_PRE_PMU), +SND_SOC_DAPM_MUX_E("IN2MUX Input", SND_SOC_NOPM, 0, 0, &wm8998_in2mux, + wm8998_in2mux_ev, SND_SOC_DAPM_PRE_PMU), + +SND_SOC_DAPM_OUTPUT("DRC1 Signal Activity"), + +SND_SOC_DAPM_PGA_E("IN1L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN1L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN1R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN1R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN2 PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN2L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), + +SND_SOC_DAPM_SUPPLY("MICBIAS1", ARIZONA_MIC_BIAS_CTRL_1, + ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS2", ARIZONA_MIC_BIAS_CTRL_2, + ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS3", ARIZONA_MIC_BIAS_CTRL_3, + ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("Noise Generator", ARIZONA_COMFORT_NOISE_GENERATOR, + ARIZONA_NOISE_GEN_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("Tone Generator 1", ARIZONA_TONE_GENERATOR_1, + ARIZONA_TONE1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("Tone Generator 2", ARIZONA_TONE_GENERATOR_1, + ARIZONA_TONE2_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("EQ1", ARIZONA_EQ1_1, ARIZONA_EQ1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ2", ARIZONA_EQ2_1, ARIZONA_EQ2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ3", ARIZONA_EQ3_1, ARIZONA_EQ3_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ4", ARIZONA_EQ4_1, ARIZONA_EQ4_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("DRC1L", ARIZONA_DRC1_CTRL1, ARIZONA_DRC1L_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("DRC1R", ARIZONA_DRC1_CTRL1, ARIZONA_DRC1R_ENA_SHIFT, 0, + NULL, 0), + +SND_SOC_DAPM_PGA("LHPF1", ARIZONA_HPLPF1_1, ARIZONA_LHPF1_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF2", ARIZONA_HPLPF2_1, ARIZONA_LHPF2_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF3", ARIZONA_HPLPF3_1, ARIZONA_LHPF3_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF4", ARIZONA_HPLPF4_1, ARIZONA_LHPF4_ENA_SHIFT, 0, + NULL, 0), + +SND_SOC_DAPM_PGA("PWM1 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM1_ENA_SHIFT, + 0, NULL, 0), +SND_SOC_DAPM_PGA("PWM2 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM2_ENA_SHIFT, + 0, NULL, 0), + +SND_SOC_DAPM_PGA("ASRC1L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC1L_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("ASRC1R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC1R_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("ASRC2L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2L_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0, + NULL, 0), + +SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT2", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT3", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT4", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC1DEC1", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC2", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC3", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC4", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC2INT1", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT2", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC2DEC1", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC2", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_VALUE_MUX("AEC1 Loopback", ARIZONA_DAC_AEC_CONTROL_1, + ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, + &wm8998_aec_loopback_mux[0]), + +SND_SOC_DAPM_VALUE_MUX("AEC2 Loopback", ARIZONA_DAC_AEC_CONTROL_2, + ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, + &wm8998_aec_loopback_mux[1]), + +SND_SOC_DAPM_AIF_OUT("AIF1TX1", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX2", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX3", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX4", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX5", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX6", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX6_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF1RX1", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX2", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX3", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX4", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX5", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX6", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX6_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("AIF2TX1", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX2", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX3", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX4", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX5", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX6", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX6_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX2", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX3", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX4", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX5", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX6", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX6_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("SLIMRX1", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX2", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX3", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX4", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX4_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("SLIMTX1", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX2", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX3", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX4", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX5", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX6", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX6_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("AIF3TX1", NULL, 0, + ARIZONA_AIF3_TX_ENABLES, ARIZONA_AIF3TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF3TX2", NULL, 0, + ARIZONA_AIF3_TX_ENABLES, ARIZONA_AIF3TX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF3RX1", NULL, 0, + ARIZONA_AIF3_RX_ENABLES, ARIZONA_AIF3RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF3RX2", NULL, 0, + ARIZONA_AIF3_RX_ENABLES, ARIZONA_AIF3RX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, + ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, + ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT2L", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT2L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT2R", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT2R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT3", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT3L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT5L", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT5L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT5R", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT5R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + +SND_SOC_DAPM_PGA("SPD1TX1", ARIZONA_SPD1_TX_CONTROL, + ARIZONA_SPD1_VAL1_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("SPD1TX2", ARIZONA_SPD1_TX_CONTROL, + ARIZONA_SPD1_VAL2_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_OUT_DRV("SPD1", ARIZONA_SPD1_TX_CONTROL, + ARIZONA_SPD1_ENA_SHIFT, 0, NULL, 0), + +ARIZONA_MUX_WIDGETS(EQ1, "EQ1"), +ARIZONA_MUX_WIDGETS(EQ2, "EQ2"), +ARIZONA_MUX_WIDGETS(EQ3, "EQ3"), +ARIZONA_MUX_WIDGETS(EQ4, "EQ4"), + +ARIZONA_MUX_WIDGETS(DRC1L, "DRC1L"), +ARIZONA_MUX_WIDGETS(DRC1R, "DRC1R"), + +ARIZONA_MIXER_WIDGETS(LHPF1, "LHPF1"), +ARIZONA_MIXER_WIDGETS(LHPF2, "LHPF2"), +ARIZONA_MIXER_WIDGETS(LHPF3, "LHPF3"), +ARIZONA_MIXER_WIDGETS(LHPF4, "LHPF4"), + +ARIZONA_MIXER_WIDGETS(PWM1, "PWM1"), +ARIZONA_MIXER_WIDGETS(PWM2, "PWM2"), + +ARIZONA_MIXER_WIDGETS(OUT1L, "HPOUTL"), +ARIZONA_MIXER_WIDGETS(OUT1R, "HPOUTR"), +ARIZONA_MIXER_WIDGETS(OUT2L, "LINEOUTL"), +ARIZONA_MIXER_WIDGETS(OUT2R, "LINEOUTR"), +ARIZONA_MIXER_WIDGETS(OUT3, "EPOUT"), +ARIZONA_MIXER_WIDGETS(SPKOUTL, "SPKOUTL"), +ARIZONA_MIXER_WIDGETS(SPKOUTR, "SPKOUTR"), +ARIZONA_MIXER_WIDGETS(SPKDATL, "SPKDATL"), +ARIZONA_MIXER_WIDGETS(SPKDATR, "SPKDATR"), + +ARIZONA_MIXER_WIDGETS(AIF1TX1, "AIF1TX1"), +ARIZONA_MIXER_WIDGETS(AIF1TX2, "AIF1TX2"), +ARIZONA_MIXER_WIDGETS(AIF1TX3, "AIF1TX3"), +ARIZONA_MIXER_WIDGETS(AIF1TX4, "AIF1TX4"), +ARIZONA_MIXER_WIDGETS(AIF1TX5, "AIF1TX5"), +ARIZONA_MIXER_WIDGETS(AIF1TX6, "AIF1TX6"), + +ARIZONA_MIXER_WIDGETS(AIF2TX1, "AIF2TX1"), +ARIZONA_MIXER_WIDGETS(AIF2TX2, "AIF2TX2"), +ARIZONA_MIXER_WIDGETS(AIF2TX3, "AIF2TX3"), +ARIZONA_MIXER_WIDGETS(AIF2TX4, "AIF2TX4"), +ARIZONA_MIXER_WIDGETS(AIF2TX5, "AIF2TX5"), +ARIZONA_MIXER_WIDGETS(AIF2TX6, "AIF2TX6"), + +ARIZONA_MIXER_WIDGETS(AIF3TX1, "AIF3TX1"), +ARIZONA_MIXER_WIDGETS(AIF3TX2, "AIF3TX2"), + +ARIZONA_MUX_WIDGETS(SLIMTX1, "SLIMTX1"), +ARIZONA_MUX_WIDGETS(SLIMTX2, "SLIMTX2"), +ARIZONA_MUX_WIDGETS(SLIMTX3, "SLIMTX3"), +ARIZONA_MUX_WIDGETS(SLIMTX4, "SLIMTX4"), +ARIZONA_MUX_WIDGETS(SLIMTX5, "SLIMTX5"), +ARIZONA_MUX_WIDGETS(SLIMTX6, "SLIMTX6"), + +ARIZONA_MUX_WIDGETS(SPD1TX1, "SPDIFTX1"), +ARIZONA_MUX_WIDGETS(SPD1TX2, "SPDIFTX2"), + +ARIZONA_MUX_WIDGETS(ASRC1L, "ASRC1L"), +ARIZONA_MUX_WIDGETS(ASRC1R, "ASRC1R"), +ARIZONA_MUX_WIDGETS(ASRC2L, "ASRC2L"), +ARIZONA_MUX_WIDGETS(ASRC2R, "ASRC2R"), + +ARIZONA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), +ARIZONA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"), +ARIZONA_MUX_WIDGETS(ISRC1DEC3, "ISRC1DEC3"), +ARIZONA_MUX_WIDGETS(ISRC1DEC4, "ISRC1DEC4"), + +ARIZONA_MUX_WIDGETS(ISRC1INT1, "ISRC1INT1"), +ARIZONA_MUX_WIDGETS(ISRC1INT2, "ISRC1INT2"), +ARIZONA_MUX_WIDGETS(ISRC1INT3, "ISRC1INT3"), +ARIZONA_MUX_WIDGETS(ISRC1INT4, "ISRC1INT4"), + +ARIZONA_MUX_WIDGETS(ISRC2DEC1, "ISRC2DEC1"), +ARIZONA_MUX_WIDGETS(ISRC2DEC2, "ISRC2DEC2"), + +ARIZONA_MUX_WIDGETS(ISRC2INT1, "ISRC2INT1"), +ARIZONA_MUX_WIDGETS(ISRC2INT2, "ISRC2INT2"), + +SND_SOC_DAPM_OUTPUT("HPOUTL"), +SND_SOC_DAPM_OUTPUT("HPOUTR"), +SND_SOC_DAPM_OUTPUT("LINEOUTL"), +SND_SOC_DAPM_OUTPUT("LINEOUTR"), +SND_SOC_DAPM_OUTPUT("EPOUT"), +SND_SOC_DAPM_OUTPUT("SPKOUTLN"), +SND_SOC_DAPM_OUTPUT("SPKOUTLP"), +SND_SOC_DAPM_OUTPUT("SPKOUTRN"), +SND_SOC_DAPM_OUTPUT("SPKOUTRP"), +SND_SOC_DAPM_OUTPUT("SPKDATL"), +SND_SOC_DAPM_OUTPUT("SPKDATR"), +SND_SOC_DAPM_OUTPUT("SPDIF"), + +SND_SOC_DAPM_OUTPUT("MICSUPP"), +}; + +#define ARIZONA_MIXER_INPUT_ROUTES(name) \ + { name, "Noise Generator", "Noise Generator" }, \ + { name, "Tone Generator 1", "Tone Generator 1" }, \ + { name, "Tone Generator 2", "Tone Generator 2" }, \ + { name, "Haptics", "HAPTICS" }, \ + { name, "AEC", "AEC1 Loopback" }, \ + { name, "AEC2", "AEC2 Loopback" }, \ + { name, "IN1L", "IN1L PGA" }, \ + { name, "IN1R", "IN1R PGA" }, \ + { name, "IN2L", "IN2 PGA" }, \ + { name, "AIF1RX1", "AIF1RX1" }, \ + { name, "AIF1RX2", "AIF1RX2" }, \ + { name, "AIF1RX3", "AIF1RX3" }, \ + { name, "AIF1RX4", "AIF1RX4" }, \ + { name, "AIF1RX5", "AIF1RX5" }, \ + { name, "AIF1RX6", "AIF1RX6" }, \ + { name, "AIF2RX1", "AIF2RX1" }, \ + { name, "AIF2RX2", "AIF2RX2" }, \ + { name, "AIF2RX3", "AIF2RX3" }, \ + { name, "AIF2RX4", "AIF2RX4" }, \ + { name, "AIF2RX5", "AIF2RX5" }, \ + { name, "AIF2RX6", "AIF2RX6" }, \ + { name, "AIF3RX1", "AIF3RX1" }, \ + { name, "AIF3RX2", "AIF3RX2" }, \ + { name, "SLIMRX1", "SLIMRX1" }, \ + { name, "SLIMRX2", "SLIMRX2" }, \ + { name, "SLIMRX3", "SLIMRX3" }, \ + { name, "SLIMRX4", "SLIMRX4" }, \ + { name, "EQ1", "EQ1" }, \ + { name, "EQ2", "EQ2" }, \ + { name, "EQ3", "EQ3" }, \ + { name, "EQ4", "EQ4" }, \ + { name, "DRC1L", "DRC1L" }, \ + { name, "DRC1R", "DRC1R" }, \ + { name, "LHPF1", "LHPF1" }, \ + { name, "LHPF2", "LHPF2" }, \ + { name, "LHPF3", "LHPF3" }, \ + { name, "LHPF4", "LHPF4" }, \ + { name, "ASRC1L", "ASRC1L" }, \ + { name, "ASRC1R", "ASRC1R" }, \ + { name, "ASRC2L", "ASRC2L" }, \ + { name, "ASRC2R", "ASRC2R" }, \ + { name, "ISRC1DEC1", "ISRC1DEC1" }, \ + { name, "ISRC1DEC2", "ISRC1DEC2" }, \ + { name, "ISRC1DEC3", "ISRC1DEC3" }, \ + { name, "ISRC1DEC4", "ISRC1DEC4" }, \ + { name, "ISRC1INT1", "ISRC1INT1" }, \ + { name, "ISRC1INT2", "ISRC1INT2" }, \ + { name, "ISRC1INT3", "ISRC1INT3" }, \ + { name, "ISRC1INT4", "ISRC1INT4" }, \ + { name, "ISRC2DEC1", "ISRC2DEC1" }, \ + { name, "ISRC2DEC2", "ISRC2DEC2" }, \ + { name, "ISRC2INT1", "ISRC2INT1" }, \ + { name, "ISRC2INT2", "ISRC2INT2" } + +static const struct snd_soc_dapm_route wm8998_dapm_routes[] = { + { "AIF2 Capture", NULL, "DBVDD2" }, + { "AIF2 Playback", NULL, "DBVDD2" }, + + { "AIF3 Capture", NULL, "DBVDD3" }, + { "AIF3 Playback", NULL, "DBVDD3" }, + + { "OUT1L", NULL, "CPVDD" }, + { "OUT1R", NULL, "CPVDD" }, + { "OUT2L", NULL, "CPVDD" }, + { "OUT2R", NULL, "CPVDD" }, + { "OUT3", NULL, "CPVDD" }, + + { "OUT4L", NULL, "SPKVDDL" }, + { "OUT4R", NULL, "SPKVDDR" }, + + { "OUT1L", NULL, "SYSCLK" }, + { "OUT1R", NULL, "SYSCLK" }, + { "OUT2L", NULL, "SYSCLK" }, + { "OUT2R", NULL, "SYSCLK" }, + { "OUT3", NULL, "SYSCLK" }, + { "OUT4L", NULL, "SYSCLK" }, + { "OUT4R", NULL, "SYSCLK" }, + { "OUT5L", NULL, "SYSCLK" }, + { "OUT5R", NULL, "SYSCLK" }, + + { "SPD1", NULL, "SYSCLK" }, + { "SPD1", NULL, "SPD1TX1" }, + { "SPD1", NULL, "SPD1TX2" }, + + { "MICBIAS1", NULL, "MICVDD" }, + { "MICBIAS2", NULL, "MICVDD" }, + { "MICBIAS3", NULL, "MICVDD" }, + + { "Noise Generator", NULL, "NOISE" }, + { "Tone Generator 1", NULL, "TONE" }, + { "Tone Generator 2", NULL, "TONE" }, + + { "AIF1 Capture", NULL, "AIF1TX1" }, + { "AIF1 Capture", NULL, "AIF1TX2" }, + { "AIF1 Capture", NULL, "AIF1TX3" }, + { "AIF1 Capture", NULL, "AIF1TX4" }, + { "AIF1 Capture", NULL, "AIF1TX5" }, + { "AIF1 Capture", NULL, "AIF1TX6" }, + + { "AIF1RX1", NULL, "AIF1 Playback" }, + { "AIF1RX2", NULL, "AIF1 Playback" }, + { "AIF1RX3", NULL, "AIF1 Playback" }, + { "AIF1RX4", NULL, "AIF1 Playback" }, + { "AIF1RX5", NULL, "AIF1 Playback" }, + { "AIF1RX6", NULL, "AIF1 Playback" }, + + { "AIF2 Capture", NULL, "AIF2TX1" }, + { "AIF2 Capture", NULL, "AIF2TX2" }, + { "AIF2 Capture", NULL, "AIF2TX3" }, + { "AIF2 Capture", NULL, "AIF2TX4" }, + { "AIF2 Capture", NULL, "AIF2TX5" }, + { "AIF2 Capture", NULL, "AIF2TX6" }, + + { "AIF2RX1", NULL, "AIF2 Playback" }, + { "AIF2RX2", NULL, "AIF2 Playback" }, + { "AIF2RX3", NULL, "AIF2 Playback" }, + { "AIF2RX4", NULL, "AIF2 Playback" }, + { "AIF2RX5", NULL, "AIF2 Playback" }, + { "AIF2RX6", NULL, "AIF2 Playback" }, + + { "AIF3 Capture", NULL, "AIF3TX1" }, + { "AIF3 Capture", NULL, "AIF3TX2" }, + + { "AIF3RX1", NULL, "AIF3 Playback" }, + { "AIF3RX2", NULL, "AIF3 Playback" }, + + { "Slim1 Capture", NULL, "SLIMTX1" }, + { "Slim1 Capture", NULL, "SLIMTX2" }, + { "Slim1 Capture", NULL, "SLIMTX3" }, + { "Slim1 Capture", NULL, "SLIMTX4" }, + + { "Slim2 Capture", NULL, "SLIMTX5" }, + { "Slim2 Capture", NULL, "SLIMTX6" }, + + { "SLIMRX1", NULL, "Slim1 Playback" }, + { "SLIMRX2", NULL, "Slim1 Playback" }, + + { "SLIMRX3", NULL, "Slim2 Playback" }, + { "SLIMRX4", NULL, "Slim2 Playback" }, + + { "AIF1 Playback", NULL, "SYSCLK" }, + { "AIF2 Playback", NULL, "SYSCLK" }, + { "AIF3 Playback", NULL, "SYSCLK" }, + { "Slim1 Playback", NULL, "SYSCLK" }, + { "Slim2 Playback", NULL, "SYSCLK" }, + + { "AIF1 Capture", NULL, "SYSCLK" }, + { "AIF2 Capture", NULL, "SYSCLK" }, + { "AIF3 Capture", NULL, "SYSCLK" }, + { "Slim1 Capture", NULL, "SYSCLK" }, + { "Slim2 Capture", NULL, "SYSCLK" }, + + { "IN1MUXL Input", "IN1A", "IN1AL" }, + { "IN1MUXR Input", "IN1A", "IN1AR" }, + { "IN1MUXL Input", "IN1B", "IN1BL" }, + { "IN1MUXR Input", "IN1B", "IN1BR" }, + + { "IN2MUX Input", "IN2A", "IN2A" }, + { "IN2MUX Input", "IN2B", "IN2B" }, + + { "IN1L PGA", NULL, "IN1MUXL Input" }, + { "IN1R PGA", NULL, "IN1MUXR Input" }, + { "IN2 PGA", NULL, "IN2MUX Input" }, + + ARIZONA_MIXER_ROUTES("OUT1L", "HPOUTL"), + ARIZONA_MIXER_ROUTES("OUT1R", "HPOUTR"), + ARIZONA_MIXER_ROUTES("OUT2L", "LINEOUTL"), + ARIZONA_MIXER_ROUTES("OUT2R", "LINEOUTR"), + ARIZONA_MIXER_ROUTES("OUT3", "EPOUT"), + + ARIZONA_MIXER_ROUTES("OUT4L", "SPKOUTL"), + ARIZONA_MIXER_ROUTES("OUT4R", "SPKOUTR"), + ARIZONA_MIXER_ROUTES("OUT5L", "SPKDATL"), + ARIZONA_MIXER_ROUTES("OUT5R", "SPKDATR"), + + ARIZONA_MIXER_ROUTES("PWM1 Driver", "PWM1"), + ARIZONA_MIXER_ROUTES("PWM2 Driver", "PWM2"), + + ARIZONA_MIXER_ROUTES("AIF1TX1", "AIF1TX1"), + ARIZONA_MIXER_ROUTES("AIF1TX2", "AIF1TX2"), + ARIZONA_MIXER_ROUTES("AIF1TX3", "AIF1TX3"), + ARIZONA_MIXER_ROUTES("AIF1TX4", "AIF1TX4"), + ARIZONA_MIXER_ROUTES("AIF1TX5", "AIF1TX5"), + ARIZONA_MIXER_ROUTES("AIF1TX6", "AIF1TX6"), + + ARIZONA_MIXER_ROUTES("AIF2TX1", "AIF2TX1"), + ARIZONA_MIXER_ROUTES("AIF2TX2", "AIF2TX2"), + ARIZONA_MIXER_ROUTES("AIF2TX3", "AIF2TX3"), + ARIZONA_MIXER_ROUTES("AIF2TX4", "AIF2TX4"), + ARIZONA_MIXER_ROUTES("AIF2TX5", "AIF2TX5"), + ARIZONA_MIXER_ROUTES("AIF2TX6", "AIF2TX6"), + + ARIZONA_MIXER_ROUTES("AIF3TX1", "AIF3TX1"), + ARIZONA_MIXER_ROUTES("AIF3TX2", "AIF3TX2"), + + ARIZONA_MUX_ROUTES("SLIMTX1", "SLIMTX1"), + ARIZONA_MUX_ROUTES("SLIMTX2", "SLIMTX2"), + ARIZONA_MUX_ROUTES("SLIMTX3", "SLIMTX3"), + ARIZONA_MUX_ROUTES("SLIMTX4", "SLIMTX4"), + ARIZONA_MUX_ROUTES("SLIMTX5", "SLIMTX5"), + ARIZONA_MUX_ROUTES("SLIMTX6", "SLIMTX6"), + + ARIZONA_MUX_ROUTES("SPD1TX1", "SPDIFTX1"), + ARIZONA_MUX_ROUTES("SPD1TX2", "SPDIFTX2"), + + ARIZONA_MUX_ROUTES("EQ1", "EQ1"), + ARIZONA_MUX_ROUTES("EQ2", "EQ2"), + ARIZONA_MUX_ROUTES("EQ3", "EQ3"), + ARIZONA_MUX_ROUTES("EQ4", "EQ4"), + + ARIZONA_MUX_ROUTES("DRC1L", "DRC1L"), + ARIZONA_MUX_ROUTES("DRC1R", "DRC1R"), + + ARIZONA_MIXER_ROUTES("LHPF1", "LHPF1"), + ARIZONA_MIXER_ROUTES("LHPF2", "LHPF2"), + ARIZONA_MIXER_ROUTES("LHPF3", "LHPF3"), + ARIZONA_MIXER_ROUTES("LHPF4", "LHPF4"), + + ARIZONA_MUX_ROUTES("ASRC1L", "ASRC1L"), + ARIZONA_MUX_ROUTES("ASRC1R", "ASRC1R"), + ARIZONA_MUX_ROUTES("ASRC2L", "ASRC2L"), + ARIZONA_MUX_ROUTES("ASRC2R", "ASRC2R"), + + ARIZONA_MUX_ROUTES("ISRC1INT1", "ISRC1INT1"), + ARIZONA_MUX_ROUTES("ISRC1INT2", "ISRC1INT2"), + ARIZONA_MUX_ROUTES("ISRC1INT3", "ISRC1INT3"), + ARIZONA_MUX_ROUTES("ISRC1INT4", "ISRC1INT4"), + + ARIZONA_MUX_ROUTES("ISRC1DEC1", "ISRC1DEC1"), + ARIZONA_MUX_ROUTES("ISRC1DEC2", "ISRC1DEC2"), + ARIZONA_MUX_ROUTES("ISRC1DEC3", "ISRC1DEC3"), + ARIZONA_MUX_ROUTES("ISRC1DEC4", "ISRC1DEC4"), + + ARIZONA_MUX_ROUTES("ISRC2INT1", "ISRC2INT1"), + ARIZONA_MUX_ROUTES("ISRC2INT2", "ISRC2INT2"), + + ARIZONA_MUX_ROUTES("ISRC2DEC1", "ISRC2DEC1"), + ARIZONA_MUX_ROUTES("ISRC2DEC2", "ISRC2DEC2"), + + { "AEC1 Loopback", "HPOUTL", "OUT1L" }, + { "AEC1 Loopback", "HPOUTR", "OUT1R" }, + { "AEC2 Loopback", "HPOUTL", "OUT1L" }, + { "AEC2 Loopback", "HPOUTR", "OUT1R" }, + { "HPOUTL", NULL, "OUT1L" }, + { "HPOUTR", NULL, "OUT1R" }, + + { "AEC1 Loopback", "LINEOUTL", "OUT2L" }, + { "AEC1 Loopback", "LINEOUTR", "OUT2R" }, + { "AEC2 Loopback", "LINEOUTL", "OUT2L" }, + { "AEC2 Loopback", "LINEOUTR", "OUT2R" }, + { "LINEOUTL", NULL, "OUT2L" }, + { "LINEOUTR", NULL, "OUT2R" }, + + { "AEC1 Loopback", "EPOUT", "OUT3" }, + { "AEC2 Loopback", "EPOUT", "OUT3" }, + { "EPOUT", NULL, "OUT3" }, + + { "AEC1 Loopback", "SPKOUTL", "OUT4L" }, + { "AEC2 Loopback", "SPKOUTL", "OUT4L" }, + { "SPKOUTLN", NULL, "OUT4L" }, + { "SPKOUTLP", NULL, "OUT4L" }, + + { "AEC1 Loopback", "SPKOUTR", "OUT4R" }, + { "AEC2 Loopback", "SPKOUTR", "OUT4R" }, + { "SPKOUTRN", NULL, "OUT4R" }, + { "SPKOUTRP", NULL, "OUT4R" }, + + { "SPDIF", NULL, "SPD1" }, + + { "AEC1 Loopback", "SPKDATL", "OUT5L" }, + { "AEC1 Loopback", "SPKDATR", "OUT5R" }, + { "AEC2 Loopback", "SPKDATL", "OUT5L" }, + { "AEC2 Loopback", "SPKDATR", "OUT5R" }, + { "SPKDATL", NULL, "OUT5L" }, + { "SPKDATR", NULL, "OUT5R" }, + + { "DRC1 Signal Activity", NULL, "DRC1L" }, + { "DRC1 Signal Activity", NULL, "DRC1R" }, +}; + +#define WM8998_RATES SNDRV_PCM_RATE_8000_192000 + +#define WM8998_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_driver wm8998_dai[] = { + { + .name = "wm8998-aif1", + .id = 1, + .base = ARIZONA_AIF1_BCLK_CTRL, + .playback = { + .stream_name = "AIF1 Playback", + .channels_min = 1, + .channels_max = 6, + .rates = WM8998_RATES, + .formats = WM8998_FORMATS, + }, + .capture = { + .stream_name = "AIF1 Capture", + .channels_min = 1, + .channels_max = 6, + .rates = WM8998_RATES, + .formats = WM8998_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "wm8998-aif2", + .id = 2, + .base = ARIZONA_AIF2_BCLK_CTRL, + .playback = { + .stream_name = "AIF2 Playback", + .channels_min = 1, + .channels_max = 6, + .rates = WM8998_RATES, + .formats = WM8998_FORMATS, + }, + .capture = { + .stream_name = "AIF2 Capture", + .channels_min = 1, + .channels_max = 6, + .rates = WM8998_RATES, + .formats = WM8998_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "wm8998-aif3", + .id = 3, + .base = ARIZONA_AIF3_BCLK_CTRL, + .playback = { + .stream_name = "AIF3 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = WM8998_RATES, + .formats = WM8998_FORMATS, + }, + .capture = { + .stream_name = "AIF3 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = WM8998_RATES, + .formats = WM8998_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "wm8998-slim1", + .id = 4, + .playback = { + .stream_name = "Slim1 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = WM8998_RATES, + .formats = WM8998_FORMATS, + }, + .capture = { + .stream_name = "Slim1 Capture", + .channels_min = 1, + .channels_max = 4, + .rates = WM8998_RATES, + .formats = WM8998_FORMATS, + }, + .ops = &arizona_simple_dai_ops, + }, + { + .name = "wm8998-slim2", + .id = 5, + .playback = { + .stream_name = "Slim2 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = WM8998_RATES, + .formats = WM8998_FORMATS, + }, + .capture = { + .stream_name = "Slim2 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = WM8998_RATES, + .formats = WM8998_FORMATS, + }, + .ops = &arizona_simple_dai_ops, + }, +}; + +static int wm8998_in1mux_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_codec *codec = w->codec; + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + unsigned int left_mux, right_mux, in1mode, old; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + left_mux = snd_soc_read(codec, ARIZONA_ADC_DIGITAL_VOLUME_1L) & + ARIZONA_IN1L_SRC_MASK; + right_mux = snd_soc_read(codec, ARIZONA_ADC_DIGITAL_VOLUME_1R) & + ARIZONA_IN1R_SRC_MASK; + + in1mode = (arizona->pdata.inmode[0] & 2) + << (ARIZONA_IN1_MODE_SHIFT - 1); + + if (in1mode != 0) { + /* IN1A is digital, check whether IN1A is selected */ + + if (left_mux != right_mux) { + dev_err(arizona->dev, + "IN1=DMIC and 'IN1MUXL Input'" + " != 'IN1MUXR Input'"); + return -EINVAL; + } + + if (left_mux != 0) + in1mode = 0; /* IN1B selected, set analogue */ + } + + old = snd_soc_read(codec, ARIZONA_IN1L_CONTROL) & + ARIZONA_IN1_MODE_MASK; + + if (old != in1mode) + snd_soc_update_bits(codec, ARIZONA_IN1L_CONTROL, + ARIZONA_IN1_MODE_MASK, in1mode); + return 0; + + default: + return 0; + } +} + +static int wm8998_in2mux_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_codec *codec = w->codec; + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + unsigned int mux, in2mode, old; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + mux = snd_soc_read(codec, ARIZONA_ADC_DIGITAL_VOLUME_2L) & + ARIZONA_IN2L_SRC_MASK; + + if (mux == 0) + in2mode = (arizona->pdata.inmode[1] & 2) + << (ARIZONA_IN2_MODE_SHIFT - 1); + else + in2mode = 0; /* IN2B always analogue */ + + old = snd_soc_read(codec, ARIZONA_IN2L_CONTROL) & + ARIZONA_IN2_MODE_MASK; + + if (old != in2mode) + snd_soc_update_bits(codec, ARIZONA_IN2L_CONTROL, + ARIZONA_IN2_MODE_MASK, in2mode); + return 0; + + default: + return 0; + } +} + +static int wm8998_set_fll(struct snd_soc_codec *codec, int fll_id, int source, + unsigned int Fref, unsigned int Fout) +{ + struct wm8998_priv *wm8998 = snd_soc_codec_get_drvdata(codec); + + switch (fll_id) { + case WM8998_FLL1: + return arizona_set_fll(&wm8998->fll[0], source, Fref, Fout); + case WM8998_FLL2: + return arizona_set_fll(&wm8998->fll[1], source, Fref, Fout); + case WM8998_FLL1_REFCLK: + return arizona_set_fll_refclk(&wm8998->fll[0], source, Fref, + Fout); + case WM8998_FLL2_REFCLK: + return arizona_set_fll_refclk(&wm8998->fll[1], source, Fref, + Fout); + default: + return -EINVAL; + } +} + +static int wm8998_codec_probe(struct snd_soc_codec *codec) +{ + struct wm8998_priv *priv = snd_soc_codec_get_drvdata(codec); + int ret; + + codec->control_data = priv->core.arizona->regmap; + priv->core.arizona->dapm = &codec->dapm; + + ret = snd_soc_codec_set_cache_io(codec, 32, 16, SND_SOC_REGMAP); + if (ret != 0) + return ret; + + arizona_init_spk(codec); + arizona_init_gpio(codec); + + switch (priv->core.arizona->type) { + case WM1814: + ret = snd_soc_add_codec_controls(codec, + wm1814_snd_controls, + ARRAY_SIZE(wm1814_snd_controls)); + if (ret != 0) + return ret; + break; + default: + break; + } + + snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); + + priv->core.arizona->dapm = &codec->dapm; + + return 0; +} + +static int wm8998_codec_remove(struct snd_soc_codec *codec) +{ + struct wm8998_priv *priv = snd_soc_codec_get_drvdata(codec); + + priv->core.arizona->dapm = NULL; + + return 0; +} + +#define WM8998_DIG_VU 0x0200 + +static unsigned int wm8998_digital_vu[] = { + ARIZONA_DAC_DIGITAL_VOLUME_1L, + ARIZONA_DAC_DIGITAL_VOLUME_1R, + ARIZONA_DAC_DIGITAL_VOLUME_2L, + ARIZONA_DAC_DIGITAL_VOLUME_2R, + ARIZONA_DAC_DIGITAL_VOLUME_3L, + ARIZONA_DAC_DIGITAL_VOLUME_4L, + ARIZONA_DAC_DIGITAL_VOLUME_4R, + ARIZONA_DAC_DIGITAL_VOLUME_5L, + ARIZONA_DAC_DIGITAL_VOLUME_5R, +}; + +static struct snd_soc_codec_driver soc_codec_dev_wm8998 = { + .probe = wm8998_codec_probe, + .remove = wm8998_codec_remove, + + .idle_bias_off = true, + + .set_sysclk = arizona_set_sysclk, + .set_pll = wm8998_set_fll, + + .controls = wm8998_snd_controls, + .num_controls = ARRAY_SIZE(wm8998_snd_controls), + .dapm_widgets = wm8998_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(wm8998_dapm_widgets), + .dapm_routes = wm8998_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(wm8998_dapm_routes), +}; + +static int wm8998_probe(struct platform_device *pdev) +{ + struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); + struct wm8998_priv *wm8998; + int i; + + wm8998 = devm_kzalloc(&pdev->dev, sizeof(struct wm8998_priv), + GFP_KERNEL); + if (!wm8998) + return -ENOMEM; + platform_set_drvdata(pdev, wm8998); + + /* Set of_node to parent from the SPI device to allow DAPM to + * locate regulator supplies */ + pdev->dev.of_node = arizona->dev->of_node; + + wm8998->core.arizona = arizona; + wm8998->core.num_inputs = 3; /* IN1L, IN1R, IN2 */ + + for (i = 0; i < ARRAY_SIZE(wm8998->fll); i++) + wm8998->fll[i].vco_mult = 1; + + arizona_init_fll(arizona, 1, ARIZONA_FLL1_CONTROL_1 - 1, + ARIZONA_IRQ_FLL1_LOCK, ARIZONA_IRQ_FLL1_CLOCK_OK, + &wm8998->fll[0]); + arizona_init_fll(arizona, 2, ARIZONA_FLL2_CONTROL_1 - 1, + ARIZONA_IRQ_FLL2_LOCK, ARIZONA_IRQ_FLL2_CLOCK_OK, + &wm8998->fll[1]); + + for (i = 0; i < ARRAY_SIZE(wm8998_dai); i++) + arizona_init_dai(&wm8998->core, i); + + /* Latch volume update bits */ + for (i = 0; i < ARRAY_SIZE(wm8998_digital_vu); i++) + regmap_update_bits(arizona->regmap, wm8998_digital_vu[i], + WM8998_DIG_VU, WM8998_DIG_VU); + + pm_runtime_enable(&pdev->dev); + pm_runtime_idle(&pdev->dev); + + return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_wm8998, + wm8998_dai, ARRAY_SIZE(wm8998_dai)); +} + +static int wm8998_remove(struct platform_device *pdev) +{ + snd_soc_unregister_codec(&pdev->dev); + pm_runtime_disable(&pdev->dev); + + return 0; +} + +static struct platform_driver wm8998_codec_driver = { + .driver = { + .name = "wm8998-codec", + .owner = THIS_MODULE, + }, + .probe = wm8998_probe, + .remove = wm8998_remove, +}; + +module_platform_driver(wm8998_codec_driver); + +MODULE_DESCRIPTION("ASoC WM8998 driver"); +MODULE_AUTHOR("Richard Fitzgerald "); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:wm8998-codec"); diff --git a/sound/soc/codecs/wm8998.h b/sound/soc/codecs/wm8998.h new file mode 100644 index 00000000000..83bc745f159 --- /dev/null +++ b/sound/soc/codecs/wm8998.h @@ -0,0 +1,23 @@ +/* + * wm8998.h -- ALSA SoC Audio driver for WM8998 codecs + * + * Copyright 2012-2014 Wolfson Microelectronics plc + * + * Author: Richard Fitzgerald + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _WM8998_H +#define _WM8998_H + +#include "arizona.h" + +#define WM8998_FLL1 1 +#define WM8998_FLL2 2 +#define WM8998_FLL1_REFCLK 3 +#define WM8998_FLL2_REFCLK 4 + +#endif From fdcb65ffda107533902933df0b17e53df9667031 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 22 May 2014 14:24:51 +0100 Subject: [PATCH 0406/1167] switch: arizona: Add WM1814 headphone tuning Change-Id: I669b03c0358a9522c968949453ab9d3285e6c76e Signed-off-by: Richard Fitzgerald --- drivers/switch/switch-arizona.c | 75 ++++++++++++++++++++++++++++++--- 1 file changed, 69 insertions(+), 6 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 84766b4a69b..7e2daf9a152 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -614,7 +614,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) return val; } -static const struct reg_default low_impedance_patch[] = { +static const struct reg_default wm5110_low_impedance_patch[] = { { 0x460, 0x0C21 }, { 0x461, 0xA000 }, { 0x462, 0x0C41 }, @@ -649,7 +649,7 @@ static const struct reg_default low_impedance_patch[] = { { 0x483, 0x0021 }, }; -static const struct reg_default normal_impedance_patch[] = { +static const struct reg_default wm5110_normal_impedance_patch[] = { { 0x460, 0x0C40 }, { 0x461, 0xA000 }, { 0x462, 0x0C42 }, @@ -684,6 +684,18 @@ static const struct reg_default normal_impedance_patch[] = { { 0x483, 0x0021 }, }; +static const struct reg_default wm1814_low_impedance_patch[] = { + { 0x46C, 0x0C01 }, + { 0x46E, 0x0C01 }, + { 0x470, 0x0C01 }, +}; + +static const struct reg_default wm1814_normal_impedance_patch[] = { + { 0x46C, 0x0801 }, + { 0x46E, 0x0801 }, + { 0x470, 0x0801 }, +}; + int arizona_wm5110_tune_headphone(struct arizona_extcon_info *info, int reading) { @@ -705,8 +717,8 @@ int arizona_wm5110_tune_headphone(struct arizona_extcon_info *info, ARIZONA_HP1_SHORT_CIRCUIT_CTRL, ARIZONA_HP1_SC_ENA_MASK, 0); - patch = low_impedance_patch; - size = ARRAY_SIZE(low_impedance_patch); + patch = wm5110_low_impedance_patch; + size = ARRAY_SIZE(wm5110_low_impedance_patch); } else { if (info->hp_imp_level == HP_NORMAL_IMPEDANCE) return 0; @@ -718,8 +730,49 @@ int arizona_wm5110_tune_headphone(struct arizona_extcon_info *info, ARIZONA_HP1_SC_ENA_MASK, ARIZONA_HP1_SC_ENA_MASK); - patch = normal_impedance_patch; - size = ARRAY_SIZE(normal_impedance_patch); + patch = wm5110_normal_impedance_patch; + size = ARRAY_SIZE(wm5110_normal_impedance_patch); + } + + for (i = 0; i < size; ++i) { + ret = regmap_write(arizona->regmap, + patch[i].reg, patch[i].def); + if (ret != 0) + dev_warn(arizona->dev, + "Failed to write headphone patch: %x <= %x\n", + patch[i].reg, patch[i].def); + } + + return 0; +} + +int arizona_wm1814_tune_headphone(struct arizona_extcon_info *info, + int reading) +{ + struct arizona *arizona = info->arizona; + const struct reg_default *patch; + int i, ret, size; + + if (reading <= ARIZONA_HP_SHORT_IMPEDANCE) { + /* Headphones are always off here so just mark them */ + dev_warn(arizona->dev, "Possible HP short, disabling\n"); + return 0; + } else if (reading < 15) { + if (info->hp_imp_level == HP_LOW_IMPEDANCE) + return 0; + + info->hp_imp_level = HP_LOW_IMPEDANCE; + + patch = wm1814_low_impedance_patch; + size = ARRAY_SIZE(wm1814_low_impedance_patch); + } else { + if (info->hp_imp_level == HP_NORMAL_IMPEDANCE) + return 0; + + info->hp_imp_level = HP_NORMAL_IMPEDANCE; + + patch = wm1814_normal_impedance_patch; + size = ARRAY_SIZE(wm1814_normal_impedance_patch); } for (i = 0; i < size; ++i) { @@ -753,6 +806,10 @@ int arizona_hpdet_start(struct arizona_extcon_info *info) arizona_wm5110_tune_headphone(info, imp); info->arizona->hp_impedance = imp; break; + case WM1814: + arizona_wm1814_tune_headphone(info, imp); + info->arizona->hp_impedance = imp; + break; default: break; } @@ -879,6 +936,9 @@ int arizona_hpdet_reading(struct arizona_extcon_info *info, int val) case WM5110: arizona_wm5110_tune_headphone(info, arizona->hp_impedance); break; + case WM1814: + arizona_wm1814_tune_headphone(info, arizona->hp_impedance); + break; default: break; } @@ -1591,6 +1651,9 @@ static irqreturn_t arizona_jackdet(int irq, void *data) case WM5110: arizona_wm5110_tune_headphone(info, ARIZONA_HP_Z_OPEN); break; + case WM1814: + arizona_wm1814_tune_headphone(info, ARIZONA_HP_Z_OPEN); + break; default: break; } From fb111da87ebb69c9da2e706117635fd2309daad4 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 28 Jul 2014 11:32:53 +0100 Subject: [PATCH 0407/1167] ASoC: arizona: fix tdm slot length tdm slot length was set same as word length, this patch sets the tdm slot length correctly as received in set_tdm_slot dai-callback Change-Id: I3c9c6c4afeb403841ebe3c4588eb370516e5bca6 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index d681301d11a..94586c4e0cb 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1849,6 +1849,8 @@ static int arizona_hw_params(struct snd_pcm_substream *substream, else rates = &arizona_48k_bclk_rates[0]; + wl = snd_pcm_format_width(params_format(params)); + if (tdm_slots) { arizona_aif_dbg(dai, "Configuring for %d %d bit TDM slots\n", tdm_slots, tdm_width); @@ -1856,6 +1858,7 @@ static int arizona_hw_params(struct snd_pcm_substream *substream, channels = tdm_slots; } else { bclk_target = snd_soc_params_to_bclk(params); + tdm_width = wl; } if (chan_limit && chan_limit < channels) { @@ -1890,8 +1893,7 @@ static int arizona_hw_params(struct snd_pcm_substream *substream, arizona_aif_dbg(dai, "BCLK %dHz LRCLK %dHz\n", rates[bclk], rates[bclk] / lrclk); - wl = snd_pcm_format_width(params_format(params)); - frame = wl << ARIZONA_AIF1TX_WL_SHIFT | wl; + frame = wl << ARIZONA_AIF1TX_WL_SHIFT | tdm_width; reconfig = arizona_aif_cfg_changed(codec, base, bclk, lrclk, frame); From 56022c567fef9d8aa00de2d883fbbfc6a882edf6 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Wed, 18 Jun 2014 13:32:33 +0200 Subject: [PATCH 0408/1167] ALSA: control: Don't access controls outside of protected regions commit fd9f26e4eca5d08a27d12c0933fceef76ed9663d upstream. A control that is visible on the card->controls list can be freed at any time. This means we must not access any of its memory while not holding the controls_rw_lock. Otherwise we risk a use after free access. Signed-off-by: Lars-Peter Clausen Acked-by: Jaroslav Kysela Signed-off-by: Takashi Iwai Signed-off-by: Greg Kroah-Hartman (cherry picked from commit 9abd94862196476a80dbfc07d3f8a01418fa36d8) Change-Id: I2fc3805cb51909c6dc540742b267486caac1d655 --- sound/core/control.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/sound/core/control.c b/sound/core/control.c index d8aa206e8bd..6bc15760025 100644 --- a/sound/core/control.c +++ b/sound/core/control.c @@ -331,6 +331,7 @@ int snd_ctl_add(struct snd_card *card, struct snd_kcontrol *kcontrol) { struct snd_ctl_elem_id id; unsigned int idx; + unsigned int count; int err = -EINVAL; if (! kcontrol) @@ -359,8 +360,9 @@ int snd_ctl_add(struct snd_card *card, struct snd_kcontrol *kcontrol) card->controls_count += kcontrol->count; kcontrol->id.numid = card->last_numid + 1; card->last_numid += kcontrol->count; + count = kcontrol->count; up_write(&card->controls_rwsem); - for (idx = 0; idx < kcontrol->count; idx++, id.index++, id.numid++) + for (idx = 0; idx < count; idx++, id.index++, id.numid++) snd_ctl_notify(card, SNDRV_CTL_EVENT_MASK_ADD, &id); return 0; @@ -389,6 +391,7 @@ int snd_ctl_replace(struct snd_card *card, struct snd_kcontrol *kcontrol, bool add_on_replace) { struct snd_ctl_elem_id id; + unsigned int count; unsigned int idx; struct snd_kcontrol *old; int ret; @@ -424,8 +427,9 @@ int snd_ctl_replace(struct snd_card *card, struct snd_kcontrol *kcontrol, card->controls_count += kcontrol->count; kcontrol->id.numid = card->last_numid + 1; card->last_numid += kcontrol->count; + count = kcontrol->count; up_write(&card->controls_rwsem); - for (idx = 0; idx < kcontrol->count; idx++, id.index++, id.numid++) + for (idx = 0; idx < count; idx++, id.index++, id.numid++) snd_ctl_notify(card, SNDRV_CTL_EVENT_MASK_ADD, &id); return 0; @@ -898,9 +902,9 @@ static int snd_ctl_elem_write(struct snd_card *card, struct snd_ctl_file *file, result = kctl->put(kctl, control); } if (result > 0) { + struct snd_ctl_elem_id id = control->id; up_read(&card->controls_rwsem); - snd_ctl_notify(card, SNDRV_CTL_EVENT_MASK_VALUE, - &control->id); + snd_ctl_notify(card, SNDRV_CTL_EVENT_MASK_VALUE, &id); return 0; } } @@ -1322,8 +1326,9 @@ static int snd_ctl_tlv_ioctl(struct snd_ctl_file *file, } err = kctl->tlv.c(kctl, op_flag, tlv.length, _tlv->tlv); if (err > 0) { + struct snd_ctl_elem_id id = kctl->id; up_read(&card->controls_rwsem); - snd_ctl_notify(card, SNDRV_CTL_EVENT_MASK_TLV, &kctl->id); + snd_ctl_notify(card, SNDRV_CTL_EVENT_MASK_TLV, &id); return 0; } } else { From 83b2dcfa8b93396e6ba83da779ea1d90d310146e Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Wed, 18 Jun 2014 13:32:34 +0200 Subject: [PATCH 0409/1167] ALSA: control: Handle numid overflow commit ac902c112d90a89e59916f751c2745f4dbdbb4bd upstream. Each control gets automatically assigned its numids when the control is created. The allocation is done by incrementing the numid by the amount of allocated numids per allocation. This means that excessive creation and destruction of controls (e.g. via SNDRV_CTL_IOCTL_ELEM_ADD/REMOVE) can cause the id to eventually overflow. Currently when this happens for the control that caused the overflow kctl->id.numid + kctl->count will also over flow causing it to be smaller than kctl->id.numid. Most of the code assumes that this is something that can not happen, so we need to make sure that it won't happen Signed-off-by: Lars-Peter Clausen Acked-by: Jaroslav Kysela Signed-off-by: Takashi Iwai Signed-off-by: Greg Kroah-Hartman (cherry picked from commit 0255758b24b94398786df97623849a81a7d5b2ef) Change-Id: I099ea6e74a8b17c6ae0fefcb73534b7273778fa0 --- sound/core/control.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/sound/core/control.c b/sound/core/control.c index 6bc15760025..96a64d95df7 100644 --- a/sound/core/control.c +++ b/sound/core/control.c @@ -289,6 +289,10 @@ static bool snd_ctl_remove_numid_conflict(struct snd_card *card, { struct snd_kcontrol *kctl; + /* Make sure that the ids assigned to the control do not wrap around */ + if (card->last_numid >= UINT_MAX - count) + card->last_numid = 0; + list_for_each_entry(kctl, &card->controls, list) { if (kctl->id.numid < card->last_numid + 1 + count && kctl->id.numid + kctl->count > card->last_numid + 1) { From 083b080cad7c6787502955f0e3d30fac0dbfeb23 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Wed, 18 Jun 2014 13:32:35 +0200 Subject: [PATCH 0410/1167] ALSA: control: Make sure that id->index does not overflow commit 883a1d49f0d77d30012f114b2e19fc141beb3e8e upstream. The ALSA control code expects that the range of assigned indices to a control is continuous and does not overflow. Currently there are no checks to enforce this. If a control with a overflowing index range is created that control becomes effectively inaccessible and unremovable since snd_ctl_find_id() will not be able to find it. This patch adds a check that makes sure that controls with a overflowing index range can not be created. Signed-off-by: Lars-Peter Clausen Acked-by: Jaroslav Kysela Signed-off-by: Takashi Iwai Signed-off-by: Greg Kroah-Hartman (cherry picked from commit 7fba24c6c99b514716fd069094799df035f46054) Change-Id: I00e244caf97d494d157bffa63135fc0d7a7c7410 --- sound/core/control.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/core/control.c b/sound/core/control.c index 96a64d95df7..598c84405e7 100644 --- a/sound/core/control.c +++ b/sound/core/control.c @@ -343,6 +343,9 @@ int snd_ctl_add(struct snd_card *card, struct snd_kcontrol *kcontrol) if (snd_BUG_ON(!card || !kcontrol->info)) goto error; id = kcontrol->id; + if (id.index > UINT_MAX - kcontrol->count) + goto error; + down_write(&card->controls_rwsem); if (snd_ctl_find_id(card, &id)) { up_write(&card->controls_rwsem); From 56e313f0a458e43c4478b8ec3937f841815c086f Mon Sep 17 00:00:00 2001 From: JS Park Date: Tue, 5 Aug 2014 08:42:45 +0900 Subject: [PATCH 0411/1167] mfd: arizona: Disable interrupts while suspending An interrupt during suspend will cause a read of the status register and the bus driver may not be available at this time. Change-Id: I905bc157e9f7bdfe51539c95c8c98cabdc5d7af8 Signed-off-by: JS Park Signed-off-by: Nariman Poushin --- drivers/mfd/arizona-core.c | 29 ++++++++++++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index d0138b68a6d..76fc4a5ea84 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -644,6 +644,32 @@ static int arizona_runtime_suspend(struct device *dev) #endif #ifdef CONFIG_PM_SLEEP +static int arizona_suspend_noirq(struct device *dev) +{ + struct arizona *arizona = dev_get_drvdata(dev); + + dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n"); + + if (arizona->irq_sem) { + enable_irq(arizona->irq); + arizona->irq_sem = 0; + } + + return 0; +} + +static int arizona_suspend(struct device *dev) +{ + struct arizona *arizona = dev_get_drvdata(dev); + + dev_dbg(arizona->dev, "Early suspend, disabling IRQ\n"); + + disable_irq(arizona->irq); + arizona->irq_sem = 1; + + return 0; +} + static int arizona_resume_noirq(struct device *dev) { struct arizona *arizona = dev_get_drvdata(dev); @@ -674,8 +700,9 @@ const struct dev_pm_ops arizona_pm_ops = { SET_RUNTIME_PM_OPS(arizona_runtime_suspend, arizona_runtime_resume, NULL) - SET_SYSTEM_SLEEP_PM_OPS(NULL, arizona_resume) + SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume) #ifdef CONFIG_PM_SLEEP + .suspend_noirq = arizona_suspend_noirq, .resume_noirq = arizona_resume_noirq, #endif }; From 93315625bc112cd5be5e3a9f306097727c5fd31b Mon Sep 17 00:00:00 2001 From: Anil Kumar Date: Tue, 5 Aug 2014 18:44:57 +0900 Subject: [PATCH 0412/1167] ASoC: arizona: Add pdata for HPDET short level impedance Change-Id: I32eda56afe50344a1300463dedb27d8730b65b2e Signed-off-by: Anil Kumar Signed-off-by: Richard Fitzgerald --- Documentation/devicetree/bindings/mfd/arizona.txt | 3 +++ include/linux/mfd/arizona/pdata.h | 5 +++++ sound/soc/codecs/arizona.c | 2 +- 3 files changed, 9 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 44c160d77d4..752524810a3 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -119,6 +119,9 @@ Optional properties: - wlf,fixed-hpdet-imp : Do not perform any headphone detection, just use the fixed value specified here as the headphone impedance. + - wlf,hpdet-short-circuit-imp : Specifies the maximum impedance in ohms + that will be considered as a short circuit + - DCVDD-supply, MICVDD-supply : Power supplies, only need to be specified if they are being externally supplied. As covered in Documentation/devicetree/bindings/regulator/regulator.txt diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index bd3a8738af7..a5be10d682d 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -160,6 +160,11 @@ struct arizona_pdata { /** Callback notifying mic presence */ void (*micd_cb)(bool mic); + /** If non-zero, specifies the maximum impedance in ohms + * that will be considered as a short circuit. + */ + int hpdet_short_circuit_imp; + /** Use HPDETL to check for moisture, this value specifies the * threshold impedance in ohms above which it will be considered * a false detection diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 94586c4e0cb..e126024aa13 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1237,7 +1237,7 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, /* Force off if HPDET magic is active */ if (priv->arizona->hpdet_magic || - priv->arizona->hp_impedance <= ARIZONA_HP_SHORT_IMPEDANCE) + priv->arizona->hp_impedance <= priv->arizona->pdata.hpdet_short_circuit_imp) val = 0; snd_soc_update_bits(w->codec, ARIZONA_OUTPUT_ENABLES_1, mask, val); From 0ead8e3cc596ebcf7987a888ead90d5092e10498 Mon Sep 17 00:00:00 2001 From: Anil Kumar Date: Tue, 5 Aug 2014 18:44:57 +0900 Subject: [PATCH 0413/1167] switch: arizona: Use pdata for HPDET short level impedance Use the pdata/DT configuration of the short-circuit threshold instead of a hardcoded value. Change-Id: If8e53d8a7df42a418c9de0de22d344e0c6e67d14 Signed-off-by: Anil Kumar Signed-off-by: Richard Fitzgerald --- drivers/switch/switch-arizona.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 7e2daf9a152..42dff3d71ee 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -64,6 +64,8 @@ #define HP_NORMAL_IMPEDANCE 0 #define HP_LOW_IMPEDANCE 1 +#define HP_LOW_IMPEDANCE_LIMIT 13 + struct arizona_extcon_info { struct device *dev; struct arizona *arizona; @@ -286,7 +288,7 @@ static void arizona_extcon_do_magic(struct arizona_extcon_info *info, } /* Restore the desired state while not doing the magic */ - if (!magic && arizona->hp_impedance > ARIZONA_HP_SHORT_IMPEDANCE) { + if (!magic && (arizona->hp_impedance > arizona->pdata.hpdet_short_circuit_imp)) { ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT1L_ENA | @@ -703,11 +705,11 @@ int arizona_wm5110_tune_headphone(struct arizona_extcon_info *info, const struct reg_default *patch; int i, ret, size; - if (reading <= ARIZONA_HP_SHORT_IMPEDANCE) { + if (reading <= arizona->pdata.hpdet_short_circuit_imp) { /* Headphones are always off here so just mark them */ dev_warn(arizona->dev, "Possible HP short, disabling\n"); return 0; - } else if (reading <= 13) { + } else if (reading <= HP_LOW_IMPEDANCE_LIMIT) { if (info->hp_imp_level == HP_LOW_IMPEDANCE) return 0; @@ -753,7 +755,7 @@ int arizona_wm1814_tune_headphone(struct arizona_extcon_info *info, const struct reg_default *patch; int i, ret, size; - if (reading <= ARIZONA_HP_SHORT_IMPEDANCE) { + if (reading <= arizona->pdata.hpdet_short_circuit_imp) { /* Headphones are always off here so just mark them */ dev_warn(arizona->dev, "Possible HP short, disabling\n"); return 0; @@ -1762,6 +1764,9 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,hpdet-moisture-imp", false, &pdata->hpdet_moisture_imp); + arizona_of_read_u32(arizona, "wlf,hpdet-short-circuit-imp", false, + &pdata->hpdet_short_circuit_imp); + arizona_of_read_u32(arizona, "wlf,hpdet-channel", false, &pdata->hpdet_channel); @@ -1802,6 +1807,11 @@ static int arizona_extcon_probe(struct platform_device *pdev) arizona_extcon_get_pdata(arizona); + if (pdata->hpdet_short_circuit_imp < 1) + pdata->hpdet_short_circuit_imp = ARIZONA_HP_SHORT_IMPEDANCE; + else if (pdata->hpdet_short_circuit_imp >= HP_LOW_IMPEDANCE_LIMIT) + pdata->hpdet_short_circuit_imp = HP_LOW_IMPEDANCE_LIMIT - 1; + info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); if (!info) { dev_err(&pdev->dev, "Failed to allocate memory\n"); From 9318c5dcaeae100627567b8c566e1a755a9bd28c Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Thu, 19 Jun 2014 14:41:00 +0530 Subject: [PATCH 0414/1167] ALSA: compress: fix the struct alignment to 4 bytes In 64bit systems the compiler can default align to 8bytes causing mis-match with 32bit usermode. Avoid this is future by ensuring all the structures shared with usermode are packed and aligned to 4 bytes irrespective of arch used [coding style fixes by tiwai] Signed-off-by: Vinod Koul Signed-off-by: Takashi Iwai (cherry picked from commit 2da38e0c9465b89518b29328daeb7da0ca1690b7) Change-Id: Ib9e1788d51640a5d4d0f4db96483234d982d08f8 Signed-off-by: Charles Keepax --- include/uapi/sound/compress_offload.h | 14 +++++++------- include/uapi/sound/compress_params.h | 14 +++++++------- 2 files changed, 14 insertions(+), 14 deletions(-) diff --git a/include/uapi/sound/compress_offload.h b/include/uapi/sound/compress_offload.h index d630163b9a2..d7061f85678 100644 --- a/include/uapi/sound/compress_offload.h +++ b/include/uapi/sound/compress_offload.h @@ -39,7 +39,7 @@ struct snd_compressed_buffer { __u32 fragment_size; __u32 fragments; -}; +} __attribute__((packed, aligned(4))); /** * struct snd_compr_params: compressed stream params @@ -51,7 +51,7 @@ struct snd_compr_params { struct snd_compressed_buffer buffer; struct snd_codec codec; __u8 no_wake_mode; -}; +} __attribute__((packed, aligned(4))); /** * struct snd_compr_tstamp: timestamp descriptor @@ -70,7 +70,7 @@ struct snd_compr_tstamp { snd_pcm_uframes_t pcm_frames; snd_pcm_uframes_t pcm_io_frames; __u32 sampling_rate; -}; +} __attribute__((packed, aligned(4))); /** * struct snd_compr_avail: avail descriptor @@ -80,7 +80,7 @@ struct snd_compr_tstamp { struct snd_compr_avail { __u64 avail; struct snd_compr_tstamp tstamp; -}; +} __attribute__((packed, aligned(4))); enum snd_compr_direction { SND_COMPRESS_PLAYBACK = 0, @@ -107,7 +107,7 @@ struct snd_compr_caps { __u32 max_fragments; __u32 codecs[MAX_NUM_CODECS]; __u32 reserved[11]; -}; +} __attribute__((packed, aligned(4))); /** * struct snd_compr_codec_caps: query capability of codec @@ -119,7 +119,7 @@ struct snd_compr_codec_caps { __u32 codec; __u32 num_descriptors; struct snd_codec_desc descriptor[MAX_NUM_CODEC_DESCRIPTORS]; -}; +} __attribute__((packed, aligned(4))); /** * @SNDRV_COMPRESS_ENCODER_PADDING: no of samples appended by the encoder at the @@ -140,7 +140,7 @@ enum { struct snd_compr_metadata { __u32 key; __u32 value[8]; -}; +} __attribute__((packed, aligned(4))); /** * compress path ioctl definitions diff --git a/include/uapi/sound/compress_params.h b/include/uapi/sound/compress_params.h index 165e7059de7..d9bd9ca0d5b 100644 --- a/include/uapi/sound/compress_params.h +++ b/include/uapi/sound/compress_params.h @@ -268,7 +268,7 @@ struct snd_enc_vorbis { __u32 max_bit_rate; __u32 min_bit_rate; __u32 downmix; -}; +} __attribute__((packed, aligned(4))); /** @@ -284,7 +284,7 @@ struct snd_enc_real { __u32 quant_bits; __u32 start_region; __u32 num_regions; -}; +} __attribute__((packed, aligned(4))); /** * struct snd_enc_flac @@ -308,12 +308,12 @@ struct snd_enc_real { struct snd_enc_flac { __u32 num; __u32 gain; -}; +} __attribute__((packed, aligned(4))); struct snd_enc_generic { __u32 bw; /* encoder bandwidth */ __s32 reserved[15]; -}; +} __attribute__((packed, aligned(4))); union snd_codec_options { struct snd_enc_wma wma; @@ -321,7 +321,7 @@ union snd_codec_options { struct snd_enc_real real; struct snd_enc_flac flac; struct snd_enc_generic generic; -}; +} __attribute__((packed, aligned(4))); /** struct snd_codec_desc - description of codec capabilities * @max_ch: Maximum number of audio channels @@ -358,7 +358,7 @@ struct snd_codec_desc { __u32 formats; __u32 min_buffer; __u32 reserved[15]; -}; +} __attribute__((packed, aligned(4))); /** struct snd_codec * @id: Identifies the supported audio encoder/decoder. @@ -399,6 +399,6 @@ struct snd_codec { __u32 align; union snd_codec_options options; __u32 reserved[3]; -}; +} __attribute__((packed, aligned(4))); #endif From 003aa7b2dba200553d58d5c1b77b9cfeaea8852e Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 15 May 2014 17:49:22 +0100 Subject: [PATCH 0415/1167] ASoC: florida: Correct unmasking of DRC interrupt for DSP core We were actually masking the DRC IRQ rather then unmasking it. How this system was working in this case I can't quite explain but we are definitely supposed to be unmasking it. Change-Id: Id724025a89bce27f3e70c0dbdb17378f7859b7e9 Reported-by: Nikesh Oswal Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 4d20768d7e2..b5bcb47a2ee 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2159,7 +2159,7 @@ static int florida_codec_probe(struct snd_soc_codec *codec) ret = regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, ARIZONA_IM_DRC2_SIG_DET_EINT2, - ARIZONA_IM_DRC2_SIG_DET_EINT2); + 0); if (ret != 0) { dev_err(arizona->dev, "Failed to unmask DRC2 IRQ for DSP: %d\n", @@ -2179,7 +2179,7 @@ static int florida_codec_remove(struct snd_soc_codec *codec) arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, ARIZONA_IM_DRC2_SIG_DET_EINT2, - 0); + ARIZONA_IM_DRC2_SIG_DET_EINT2); priv->core.arizona->dapm = NULL; From 2717b543ae755bb1d109c6f84049f15e9b9375a4 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 31 Mar 2014 16:36:27 +0100 Subject: [PATCH 0416/1167] mfd: florida: Remove non-existent interrupts The DCS_DAC_DONE and DCS_HP_DONE interrupts do not exist on the Florida version of the IP. This patch removes them from the regmap IRQ structure. Change-Id: I94a21c06daad62cc687f882264cf8074b35eb86e Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 69713e5a757..249bc7442c7 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -420,12 +420,6 @@ static const struct regmap_irq florida_irqs[ARIZONA_NUM_IRQ] = { [ARIZONA_IRQ_BOOT_DONE] = { .reg_offset = 4, .mask = ARIZONA_BOOT_DONE_EINT1 }, - [ARIZONA_IRQ_DCS_DAC_DONE] = { - .reg_offset = 4, .mask = ARIZONA_DCS_DAC_DONE_EINT1 - }, - [ARIZONA_IRQ_DCS_HP_DONE] = { - .reg_offset = 4, .mask = ARIZONA_DCS_HP_DONE_EINT1 - }, [ARIZONA_IRQ_FLL2_CLOCK_OK] = { .reg_offset = 4, .mask = ARIZONA_FLL2_CLOCK_OK_EINT1 }, From d45b3195280314e978c0441c8a8a0910ecb8ea35 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 31 Mar 2014 16:46:39 +0100 Subject: [PATCH 0417/1167] mfd: florida: Add in the output done interrupts Flordia has interrupts to signal that an output has fully enabled. This patch adds in these interrupts although use is not made of them yet. Change-Id: I135e21307d6ff6fa2c17cf15036f6ba720c1a0aa Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 18 ++++ include/linux/mfd/arizona/core.h | 10 ++- include/linux/mfd/arizona/registers.h | 120 ++++++++++++++++++++++++++ 3 files changed, 146 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 249bc7442c7..0f77cdcc030 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -416,6 +416,24 @@ static const struct regmap_irq florida_irqs[ARIZONA_NUM_IRQ] = { [ARIZONA_IRQ_ISRC2_CFG_ERR] = { .reg_offset = 3, .mask = ARIZONA_ISRC2_CFG_ERR_EINT1 }, + [ARIZONA_IRQ_HP3R_DONE] = { + .reg_offset = 3, .mask = ARIZONA_HP3R_DONE_EINT1 + }, + [ARIZONA_IRQ_HP3L_DONE] = { + .reg_offset = 3, .mask = ARIZONA_HP3L_DONE_EINT1 + }, + [ARIZONA_IRQ_HP2R_DONE] = { + .reg_offset = 3, .mask = ARIZONA_HP2R_DONE_EINT1 + }, + [ARIZONA_IRQ_HP2L_DONE] = { + .reg_offset = 3, .mask = ARIZONA_HP2L_DONE_EINT1 + }, + [ARIZONA_IRQ_HP1R_DONE] = { + .reg_offset = 3, .mask = ARIZONA_HP1R_DONE_EINT1 + }, + [ARIZONA_IRQ_HP1L_DONE] = { + .reg_offset = 3, .mask = ARIZONA_HP1L_DONE_EINT1 + }, [ARIZONA_IRQ_BOOT_DONE] = { .reg_offset = 4, .mask = ARIZONA_BOOT_DONE_EINT1 diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 8760034640b..66b7e10df88 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -81,8 +81,14 @@ enum arizona_type { #define ARIZONA_IRQ_FLL1_CLOCK_OK 49 #define ARIZONA_IRQ_MICD_CLAMP_RISE 50 #define ARIZONA_IRQ_MICD_CLAMP_FALL 51 - -#define ARIZONA_NUM_IRQ 52 +#define ARIZONA_IRQ_HP3R_DONE 52 +#define ARIZONA_IRQ_HP3L_DONE 53 +#define ARIZONA_IRQ_HP2R_DONE 54 +#define ARIZONA_IRQ_HP2L_DONE 55 +#define ARIZONA_IRQ_HP1R_DONE 56 +#define ARIZONA_IRQ_HP1L_DONE 57 + +#define ARIZONA_NUM_IRQ 58 #define ARIZONA_HP_SHORT_IMPEDANCE 4 struct snd_soc_dapm_context; diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 9054136a49f..ca0e76dedd8 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -5038,6 +5038,30 @@ #define ARIZONA_ISRC2_CFG_ERR_EINT1_MASK 0x0040 /* ISRC2_CFG_ERR_EINT1 */ #define ARIZONA_ISRC2_CFG_ERR_EINT1_SHIFT 6 /* ISRC2_CFG_ERR_EINT1 */ #define ARIZONA_ISRC2_CFG_ERR_EINT1_WIDTH 1 /* ISRC2_CFG_ERR_EINT1 */ +#define ARIZONA_HP3R_DONE_EINT1 0x0020 /* HP3R_DONE_EINT1 */ +#define ARIZONA_HP3R_DONE_EINT1_MASK 0x0020 /* HP3R_DONE_EINT1 */ +#define ARIZONA_HP3R_DONE_EINT1_SHIFT 5 /* HP3R_DONE_EINT1 */ +#define ARIZONA_HP3R_DONE_EINT1_WIDTH 1 /* HP3R_DONE_EINT1 */ +#define ARIZONA_HP3L_DONE_EINT1 0x0010 /* HP3L_DONE_EINT1 */ +#define ARIZONA_HP3L_DONE_EINT1_MASK 0x0010 /* HP3L_DONE_EINT1 */ +#define ARIZONA_HP3L_DONE_EINT1_SHIFT 4 /* HP3L_DONE_EINT1 */ +#define ARIZONA_HP3L_DONE_EINT1_WIDTH 1 /* HP3L_DONE_EINT1 */ +#define ARIZONA_HP2R_DONE_EINT1 0x0008 /* HP2R_DONE_EINT1 */ +#define ARIZONA_HP2R_DONE_EINT1_MASK 0x0008 /* HP2R_DONE_EINT1 */ +#define ARIZONA_HP2R_DONE_EINT1_SHIFT 3 /* HP2R_DONE_EINT1 */ +#define ARIZONA_HP2R_DONE_EINT1_WIDTH 1 /* HP2R_DONE_EINT1 */ +#define ARIZONA_HP2L_DONE_EINT1 0x0004 /* HP2L_DONE_EINT1 */ +#define ARIZONA_HP2L_DONE_EINT1_MASK 0x0004 /* HP2L_DONE_EINT1 */ +#define ARIZONA_HP2L_DONE_EINT1_SHIFT 2 /* HP2L_DONE_EINT1 */ +#define ARIZONA_HP2L_DONE_EINT1_WIDTH 1 /* HP2L_DONE_EINT1 */ +#define ARIZONA_HP1R_DONE_EINT1 0x0002 /* HP1R_DONE_EINT1 */ +#define ARIZONA_HP1R_DONE_EINT1_MASK 0x0002 /* HP1R_DONE_EINT1 */ +#define ARIZONA_HP1R_DONE_EINT1_SHIFT 1 /* HP1R_DONE_EINT1 */ +#define ARIZONA_HP1R_DONE_EINT1_WIDTH 1 /* HP1R_DONE_EINT1 */ +#define ARIZONA_HP1L_DONE_EINT1 0x0001 /* HP1L_DONE_EINT1 */ +#define ARIZONA_HP1L_DONE_EINT1_MASK 0x0001 /* HP1L_DONE_EINT1 */ +#define ARIZONA_HP1L_DONE_EINT1_SHIFT 0 /* HP1L_DONE_EINT1 */ +#define ARIZONA_HP1L_DONE_EINT1_WIDTH 1 /* HP1L_DONE_EINT1 */ /* * R3332 (0xD04) - Interrupt Status 5 @@ -5206,6 +5230,30 @@ #define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_MASK 0x0040 /* IM_ISRC2_CFG_ERR_EINT1 */ #define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_SHIFT 6 /* IM_ISRC2_CFG_ERR_EINT1 */ #define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_WIDTH 1 /* IM_ISRC2_CFG_ERR_EINT1 */ +#define ARIZONA_IM_HP3R_DONE_EINT1 0x0020 /* IM_HP3R_DONE_EINT1 */ +#define ARIZONA_IM_HP3R_DONE_EINT1_MASK 0x0020 /* IM_HP3R_DONE_EINT1 */ +#define ARIZONA_IM_HP3R_DONE_EINT1_SHIFT 5 /* IM_HP3R_DONE_EINT1 */ +#define ARIZONA_IM_HP3R_DONE_EINT1_WIDTH 1 /* IM_HP3R_DONE_EINT1 */ +#define ARIZONA_IM_HP3L_DONE_EINT1 0x0010 /* IM_HP3L_DONE_EINT1 */ +#define ARIZONA_IM_HP3L_DONE_EINT1_MASK 0x0010 /* IM_HP3L_DONE_EINT1 */ +#define ARIZONA_IM_HP3L_DONE_EINT1_SHIFT 4 /* IM_HP3L_DONE_EINT1 */ +#define ARIZONA_IM_HP3L_DONE_EINT1_WIDTH 1 /* IM_HP3L_DONE_EINT1 */ +#define ARIZONA_IM_HP2R_DONE_EINT1 0x0008 /* IM_HP2R_DONE_EINT1 */ +#define ARIZONA_IM_HP2R_DONE_EINT1_MASK 0x0008 /* IM_HP2R_DONE_EINT1 */ +#define ARIZONA_IM_HP2R_DONE_EINT1_SHIFT 3 /* IM_HP2R_DONE_EINT1 */ +#define ARIZONA_IM_HP2R_DONE_EINT1_WIDTH 1 /* IM_HP2R_DONE_EINT1 */ +#define ARIZONA_IM_HP2L_DONE_EINT1 0x0004 /* IM_HP2L_DONE_EINT1 */ +#define ARIZONA_IM_HP2L_DONE_EINT1_MASK 0x0004 /* IM_HP2L_DONE_EINT1 */ +#define ARIZONA_IM_HP2L_DONE_EINT1_SHIFT 2 /* IM_HP2L_DONE_EINT1 */ +#define ARIZONA_IM_HP2L_DONE_EINT1_WIDTH 1 /* IM_HP2L_DONE_EINT1 */ +#define ARIZONA_IM_HP1R_DONE_EINT1 0x0002 /* IM_HP1R_DONE_EINT1 */ +#define ARIZONA_IM_HP1R_DONE_EINT1_MASK 0x0002 /* IM_HP1R_DONE_EINT1 */ +#define ARIZONA_IM_HP1R_DONE_EINT1_SHIFT 1 /* IM_HP1R_DONE_EINT1 */ +#define ARIZONA_IM_HP1R_DONE_EINT1_WIDTH 1 /* IM_HP1R_DONE_EINT1 */ +#define ARIZONA_IM_HP1L_DONE_EINT1 0x0001 /* IM_HP1L_DONE_EINT1 */ +#define ARIZONA_IM_HP1L_DONE_EINT1_MASK 0x0001 /* IM_HP1L_DONE_EINT1 */ +#define ARIZONA_IM_HP1L_DONE_EINT1_SHIFT 0 /* IM_HP1L_DONE_EINT1 */ +#define ARIZONA_IM_HP1L_DONE_EINT1_WIDTH 1 /* IM_HP1L_DONE_EINT1 */ /* * R3340 (0xD0C) - Interrupt Status 5 Mask @@ -5382,6 +5430,30 @@ #define ARIZONA_ISRC2_CFG_ERR_EINT2_MASK 0x0040 /* ISRC2_CFG_ERR_EINT2 */ #define ARIZONA_ISRC2_CFG_ERR_EINT2_SHIFT 6 /* ISRC2_CFG_ERR_EINT2 */ #define ARIZONA_ISRC2_CFG_ERR_EINT2_WIDTH 1 /* ISRC2_CFG_ERR_EINT2 */ +#define ARIZONA_HP3R_DONE_EINT2 0x0020 /* HP3R_DONE_EINT2 */ +#define ARIZONA_HP3R_DONE_EINT2_MASK 0x0020 /* HP3R_DONE_EINT2 */ +#define ARIZONA_HP3R_DONE_EINT2_SHIFT 5 /* HP3R_DONE_EINT2 */ +#define ARIZONA_HP3R_DONE_EINT2_WIDTH 1 /* HP3R_DONE_EINT2 */ +#define ARIZONA_HP3L_DONE_EINT2 0x0010 /* HP3L_DONE_EINT2 */ +#define ARIZONA_HP3L_DONE_EINT2_MASK 0x0010 /* HP3L_DONE_EINT2 */ +#define ARIZONA_HP3L_DONE_EINT2_SHIFT 4 /* HP3L_DONE_EINT2 */ +#define ARIZONA_HP3L_DONE_EINT2_WIDTH 1 /* HP3L_DONE_EINT2 */ +#define ARIZONA_HP2R_DONE_EINT2 0x0008 /* HP2R_DONE_EINT2 */ +#define ARIZONA_HP2R_DONE_EINT2_MASK 0x0008 /* HP2R_DONE_EINT2 */ +#define ARIZONA_HP2R_DONE_EINT2_SHIFT 3 /* HP2R_DONE_EINT2 */ +#define ARIZONA_HP2R_DONE_EINT2_WIDTH 1 /* HP2R_DONE_EINT2 */ +#define ARIZONA_HP2L_DONE_EINT2 0x0004 /* HP2L_DONE_EINT2 */ +#define ARIZONA_HP2L_DONE_EINT2_MASK 0x0004 /* HP2L_DONE_EINT2 */ +#define ARIZONA_HP2L_DONE_EINT2_SHIFT 2 /* HP2L_DONE_EINT2 */ +#define ARIZONA_HP2L_DONE_EINT2_WIDTH 1 /* HP2L_DONE_EINT2 */ +#define ARIZONA_HP1R_DONE_EINT2 0x0002 /* HP1R_DONE_EINT2 */ +#define ARIZONA_HP1R_DONE_EINT2_MASK 0x0002 /* HP1R_DONE_EINT2 */ +#define ARIZONA_HP1R_DONE_EINT2_SHIFT 1 /* HP1R_DONE_EINT2 */ +#define ARIZONA_HP1R_DONE_EINT2_WIDTH 1 /* HP1R_DONE_EINT2 */ +#define ARIZONA_HP1L_DONE_EINT2 0x0001 /* HP1L_DONE_EINT2 */ +#define ARIZONA_HP1L_DONE_EINT2_MASK 0x0001 /* HP1L_DONE_EINT2 */ +#define ARIZONA_HP1L_DONE_EINT2_SHIFT 0 /* HP1L_DONE_EINT2 */ +#define ARIZONA_HP1L_DONE_EINT2_WIDTH 1 /* HP1L_DONE_EINT2 */ /* * R3348 (0xD14) - IRQ2 Status 5 @@ -5550,6 +5622,30 @@ #define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_MASK 0x0040 /* IM_ISRC2_CFG_ERR_EINT2 */ #define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_SHIFT 6 /* IM_ISRC2_CFG_ERR_EINT2 */ #define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_WIDTH 1 /* IM_ISRC2_CFG_ERR_EINT2 */ +#define ARIZONA_IM_HP3R_DONE_EINT2 0x0020 /* IM_HP3R_DONE_EINT2 */ +#define ARIZONA_IM_HP3R_DONE_EINT2_MASK 0x0020 /* IM_HP3R_DONE_EINT2 */ +#define ARIZONA_IM_HP3R_DONE_EINT2_SHIFT 5 /* IM_HP3R_DONE_EINT2 */ +#define ARIZONA_IM_HP3R_DONE_EINT2_WIDTH 1 /* IM_HP3R_DONE_EINT2 */ +#define ARIZONA_IM_HP3L_DONE_EINT2 0x0010 /* IM_HP3L_DONE_EINT2 */ +#define ARIZONA_IM_HP3L_DONE_EINT2_MASK 0x0010 /* IM_HP3L_DONE_EINT2 */ +#define ARIZONA_IM_HP3L_DONE_EINT2_SHIFT 4 /* IM_HP3L_DONE_EINT2 */ +#define ARIZONA_IM_HP3L_DONE_EINT2_WIDTH 1 /* IM_HP3L_DONE_EINT2 */ +#define ARIZONA_IM_HP2R_DONE_EINT2 0x0008 /* IM_HP2R_DONE_EINT2 */ +#define ARIZONA_IM_HP2R_DONE_EINT2_MASK 0x0008 /* IM_HP2R_DONE_EINT2 */ +#define ARIZONA_IM_HP2R_DONE_EINT2_SHIFT 3 /* IM_HP2R_DONE_EINT2 */ +#define ARIZONA_IM_HP2R_DONE_EINT2_WIDTH 1 /* IM_HP2R_DONE_EINT2 */ +#define ARIZONA_IM_HP2L_DONE_EINT2 0x0004 /* IM_HP2L_DONE_EINT2 */ +#define ARIZONA_IM_HP2L_DONE_EINT2_MASK 0x0004 /* IM_HP2L_DONE_EINT2 */ +#define ARIZONA_IM_HP2L_DONE_EINT2_SHIFT 2 /* IM_HP2L_DONE_EINT2 */ +#define ARIZONA_IM_HP2L_DONE_EINT2_WIDTH 1 /* IM_HP2L_DONE_EINT2 */ +#define ARIZONA_IM_HP1R_DONE_EINT2 0x0002 /* IM_HP1R_DONE_EINT2 */ +#define ARIZONA_IM_HP1R_DONE_EINT2_MASK 0x0002 /* IM_HP1R_DONE_EINT2 */ +#define ARIZONA_IM_HP1R_DONE_EINT2_SHIFT 1 /* IM_HP1R_DONE_EINT2 */ +#define ARIZONA_IM_HP1R_DONE_EINT2_WIDTH 1 /* IM_HP1R_DONE_EINT2 */ +#define ARIZONA_IM_HP1L_DONE_EINT2 0x0001 /* IM_HP1L_DONE_EINT2 */ +#define ARIZONA_IM_HP1L_DONE_EINT2_MASK 0x0001 /* IM_HP1L_DONE_EINT2 */ +#define ARIZONA_IM_HP1L_DONE_EINT2_SHIFT 0 /* IM_HP1L_DONE_EINT2 */ +#define ARIZONA_IM_HP1L_DONE_EINT2_WIDTH 1 /* IM_HP1L_DONE_EINT2 */ /* * R3356 (0xD1C) - IRQ2 Status 5 Mask @@ -5707,6 +5803,30 @@ #define ARIZONA_ISRC2_CFG_ERR_STS_MASK 0x0040 /* ISRC2_CFG_ERR_STS */ #define ARIZONA_ISRC2_CFG_ERR_STS_SHIFT 6 /* ISRC2_CFG_ERR_STS */ #define ARIZONA_ISRC2_CFG_ERR_STS_WIDTH 1 /* ISRC2_CFG_ERR_STS */ +#define ARIZONA_HP3R_DONE_STS 0x0020 /* HP3R_DONE_STS */ +#define ARIZONA_HP3R_DONE_STS_MASK 0x0020 /* HP3R_DONE_STS */ +#define ARIZONA_HP3R_DONE_STS_SHIFT 5 /* HP3R_DONE_STS */ +#define ARIZONA_HP3R_DONE_STS_WIDTH 1 /* HP3R_DONE_STS */ +#define ARIZONA_HP3L_DONE_STS 0x0010 /* HP3L_DONE_STS */ +#define ARIZONA_HP3L_DONE_STS_MASK 0x0010 /* HP3L_DONE_STS */ +#define ARIZONA_HP3L_DONE_STS_SHIFT 4 /* HP3L_DONE_STS */ +#define ARIZONA_HP3L_DONE_STS_WIDTH 1 /* HP3L_DONE_STS */ +#define ARIZONA_HP2R_DONE_STS 0x0008 /* HP2R_DONE_STS */ +#define ARIZONA_HP2R_DONE_STS_MASK 0x0008 /* HP2R_DONE_STS */ +#define ARIZONA_HP2R_DONE_STS_SHIFT 3 /* HP2R_DONE_STS */ +#define ARIZONA_HP2R_DONE_STS_WIDTH 1 /* HP2R_DONE_STS */ +#define ARIZONA_HP2L_DONE_STS 0x0004 /* HP2L_DONE_STS */ +#define ARIZONA_HP2L_DONE_STS_MASK 0x0004 /* HP2L_DONE_STS */ +#define ARIZONA_HP2L_DONE_STS_SHIFT 2 /* HP2L_DONE_STS */ +#define ARIZONA_HP2L_DONE_STS_WIDTH 1 /* HP2L_DONE_STS */ +#define ARIZONA_HP1R_DONE_STS 0x0002 /* HP1R_DONE_STS */ +#define ARIZONA_HP1R_DONE_STS_MASK 0x0002 /* HP1R_DONE_STS */ +#define ARIZONA_HP1R_DONE_STS_SHIFT 1 /* HP1R_DONE_STS */ +#define ARIZONA_HP1R_DONE_STS_WIDTH 1 /* HP1R_DONE_STS */ +#define ARIZONA_HP1L_DONE_STS 0x0001 /* HP1L_DONE_STS */ +#define ARIZONA_HP1L_DONE_STS_MASK 0x0001 /* HP1L_DONE_STS */ +#define ARIZONA_HP1L_DONE_STS_SHIFT 0 /* HP1L_DONE_STS */ +#define ARIZONA_HP1L_DONE_STS_WIDTH 1 /* HP1L_DONE_STS */ /* * R3363 (0xD23) - Interrupt Raw Status 5 From 7f37008fe6ae2f2712dc444f80521990c72b46d5 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 4 Sep 2013 16:23:17 +0100 Subject: [PATCH 0418/1167] mfd: arizona: Rename thermal shutdown interrupt Newer versions of the IP introduce short circuit protection which will also shutdown the speaker. Rename the interrupt and associated register bits associated with thermal events to better fit the function and avoid conflict with future interrupt additions. Change-Id: I456ca3a0cf05dd87bbfd06973c908e6add6c3101 Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 8 +-- drivers/mfd/wm5102-tables.c | 8 +-- drivers/mfd/wm8997-tables.c | 8 +-- include/linux/mfd/arizona/core.h | 4 +- include/linux/mfd/arizona/registers.h | 80 +++++++++++++-------------- sound/soc/codecs/arizona.c | 10 ++-- 6 files changed, 59 insertions(+), 59 deletions(-) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 0f77cdcc030..50988bd4a7c 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -340,11 +340,11 @@ static const struct regmap_irq florida_irqs[ARIZONA_NUM_IRQ] = { .reg_offset = 1, .mask = ARIZONA_DSP_IRQ1_EINT1 }, - [ARIZONA_IRQ_SPK_SHUTDOWN_WARN] = { - .reg_offset = 2, .mask = ARIZONA_SPK_SHUTDOWN_WARN_EINT1 + [ARIZONA_IRQ_SPK_OVERHEAT_WARN] = { + .reg_offset = 2, .mask = ARIZONA_SPK_OVERHEAT_WARN_EINT1 }, - [ARIZONA_IRQ_SPK_SHUTDOWN] = { - .reg_offset = 2, .mask = ARIZONA_SPK_SHUTDOWN_EINT1 + [ARIZONA_IRQ_SPK_OVERHEAT] = { + .reg_offset = 2, .mask = ARIZONA_SPK_OVERHEAT_EINT1 }, [ARIZONA_IRQ_HPDET] = { .reg_offset = 2, .mask = ARIZONA_HPDET_EINT1 diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index d392429a15e..404722d3225 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -215,11 +215,11 @@ static const struct regmap_irq wm5102_irqs[ARIZONA_NUM_IRQ] = { .reg_offset = 1, .mask = ARIZONA_DSP_IRQ1_EINT1 }, - [ARIZONA_IRQ_SPK_SHUTDOWN_WARN] = { - .reg_offset = 2, .mask = ARIZONA_SPK_SHUTDOWN_WARN_EINT1 + [ARIZONA_IRQ_SPK_OVERHEAT_WARN] = { + .reg_offset = 2, .mask = ARIZONA_SPK_OVERHEAT_WARN_EINT1 }, - [ARIZONA_IRQ_SPK_SHUTDOWN] = { - .reg_offset = 2, .mask = ARIZONA_SPK_SHUTDOWN_EINT1 + [ARIZONA_IRQ_SPK_OVERHEAT] = { + .reg_offset = 2, .mask = ARIZONA_SPK_OVERHEAT_EINT1 }, [ARIZONA_IRQ_HPDET] = { .reg_offset = 2, .mask = ARIZONA_HPDET_EINT1 diff --git a/drivers/mfd/wm8997-tables.c b/drivers/mfd/wm8997-tables.c index c7a81da64ee..d641474a23c 100644 --- a/drivers/mfd/wm8997-tables.c +++ b/drivers/mfd/wm8997-tables.c @@ -65,11 +65,11 @@ static const struct regmap_irq wm8997_irqs[ARIZONA_NUM_IRQ] = { [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 }, [ARIZONA_IRQ_GP1] = { .reg_offset = 0, .mask = ARIZONA_GP1_EINT1 }, - [ARIZONA_IRQ_SPK_SHUTDOWN_WARN] = { - .reg_offset = 2, .mask = ARIZONA_SPK_SHUTDOWN_WARN_EINT1 + [ARIZONA_IRQ_SPK_OVERHEAT_WARN] = { + .reg_offset = 2, .mask = ARIZONA_SPK_OVERHEAT_WARN_EINT1 }, - [ARIZONA_IRQ_SPK_SHUTDOWN] = { - .reg_offset = 2, .mask = ARIZONA_SPK_SHUTDOWN_EINT1 + [ARIZONA_IRQ_SPK_OVERHEAT] = { + .reg_offset = 2, .mask = ARIZONA_SPK_OVERHEAT_EINT1 }, [ARIZONA_IRQ_HPDET] = { .reg_offset = 2, .mask = ARIZONA_HPDET_EINT1 diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 66b7e10df88..f8df97b3481 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -49,8 +49,8 @@ enum arizona_type { #define ARIZONA_IRQ_DSP_IRQ6 17 #define ARIZONA_IRQ_DSP_IRQ7 18 #define ARIZONA_IRQ_DSP_IRQ8 19 -#define ARIZONA_IRQ_SPK_SHUTDOWN_WARN 20 -#define ARIZONA_IRQ_SPK_SHUTDOWN 21 +#define ARIZONA_IRQ_SPK_OVERHEAT_WARN 20 +#define ARIZONA_IRQ_SPK_OVERHEAT 21 #define ARIZONA_IRQ_MICDET 22 #define ARIZONA_IRQ_HPDET 23 #define ARIZONA_IRQ_WSEQ_DONE 24 diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index ca0e76dedd8..8c47878a2e4 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -4934,14 +4934,14 @@ /* * R3330 (0xD02) - Interrupt Status 3 */ -#define ARIZONA_SPK_SHUTDOWN_WARN_EINT1 0x8000 /* SPK_SHUTDOWN_WARN_EINT1 */ -#define ARIZONA_SPK_SHUTDOWN_WARN_EINT1_MASK 0x8000 /* SPK_SHUTDOWN_WARN_EINT1 */ -#define ARIZONA_SPK_SHUTDOWN_WARN_EINT1_SHIFT 15 /* SPK_SHUTDOWN_WARN_EINT1 */ -#define ARIZONA_SPK_SHUTDOWN_WARN_EINT1_WIDTH 1 /* SPK_SHUTDOWN_WARN_EINT1 */ -#define ARIZONA_SPK_SHUTDOWN_EINT1 0x4000 /* SPK_SHUTDOWN_EINT1 */ -#define ARIZONA_SPK_SHUTDOWN_EINT1_MASK 0x4000 /* SPK_SHUTDOWN_EINT1 */ -#define ARIZONA_SPK_SHUTDOWN_EINT1_SHIFT 14 /* SPK_SHUTDOWN_EINT1 */ -#define ARIZONA_SPK_SHUTDOWN_EINT1_WIDTH 1 /* SPK_SHUTDOWN_EINT1 */ +#define ARIZONA_SPK_OVERHEAT_WARN_EINT1 0x8000 /* SPK_OVERHEAT_WARN_EINT1 */ +#define ARIZONA_SPK_OVERHEAT_WARN_EINT1_MASK 0x8000 /* SPK_OVERHEAD_WARN_EINT1 */ +#define ARIZONA_SPK_OVERHEAT_WARN_EINT1_SHIFT 15 /* SPK_OVERHEAT_WARN_EINT1 */ +#define ARIZONA_SPK_OVERHEAT_WARN_EINT1_WIDTH 1 /* SPK_OVERHEAT_WARN_EINT1 */ +#define ARIZONA_SPK_OVERHEAT_EINT1 0x4000 /* SPK_OVERHEAT_EINT1 */ +#define ARIZONA_SPK_OVERHEAT_EINT1_MASK 0x4000 /* SPK_OVERHEAT_EINT1 */ +#define ARIZONA_SPK_OVERHEAT_EINT1_SHIFT 14 /* SPK_OVERHEAT_EINT1 */ +#define ARIZONA_SPK_OVERHEAT_EINT1_WIDTH 1 /* SPK_OVERHEAT_EINT1 */ #define ARIZONA_HPDET_EINT1 0x2000 /* HPDET_EINT1 */ #define ARIZONA_HPDET_EINT1_MASK 0x2000 /* HPDET_EINT1 */ #define ARIZONA_HPDET_EINT1_SHIFT 13 /* HPDET_EINT1 */ @@ -5126,14 +5126,14 @@ /* * R3338 (0xD0A) - Interrupt Status 3 Mask */ -#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1 0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT1 */ -#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1_MASK 0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT1 */ -#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1_SHIFT 15 /* IM_SPK_SHUTDOWN_WARN_EINT1 */ -#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1_WIDTH 1 /* IM_SPK_SHUTDOWN_WARN_EINT1 */ -#define ARIZONA_IM_SPK_SHUTDOWN_EINT1 0x4000 /* IM_SPK_SHUTDOWN_EINT1 */ -#define ARIZONA_IM_SPK_SHUTDOWN_EINT1_MASK 0x4000 /* IM_SPK_SHUTDOWN_EINT1 */ -#define ARIZONA_IM_SPK_SHUTDOWN_EINT1_SHIFT 14 /* IM_SPK_SHUTDOWN_EINT1 */ -#define ARIZONA_IM_SPK_SHUTDOWN_EINT1_WIDTH 1 /* IM_SPK_SHUTDOWN_EINT1 */ +#define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT1 0x8000 /* IM_SPK_OVERHEAT_WARN_EINT1 */ +#define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT1_MASK 0x8000 /* IM_SPK_OVERHEAT_WARN_EINT1 */ +#define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT1_SHIFT 15 /* IM_SPK_OVERHEAT_WARN_EINT1 */ +#define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT1_WIDTH 1 /* IM_SPK_OVERHEAT_WARN_EINT1 */ +#define ARIZONA_IM_SPK_OVERHEAT_EINT1 0x4000 /* IM_SPK_OVERHEAT_EINT1 */ +#define ARIZONA_IM_SPK_OVERHEAT_EINT1_MASK 0x4000 /* IM_SPK_OVERHEAT_EINT1 */ +#define ARIZONA_IM_SPK_OVERHEAT_EINT1_SHIFT 14 /* IM_SPK_OVERHEAT_EINT1 */ +#define ARIZONA_IM_SPK_OVERHEAT_EINT1_WIDTH 1 /* IM_SPK_OVERHEAT_EINT1 */ #define ARIZONA_IM_HPDET_EINT1 0x2000 /* IM_HPDET_EINT1 */ #define ARIZONA_IM_HPDET_EINT1_MASK 0x2000 /* IM_HPDET_EINT1 */ #define ARIZONA_IM_HPDET_EINT1_SHIFT 13 /* IM_HPDET_EINT1 */ @@ -5326,14 +5326,14 @@ /* * R3346 (0xD12) - IRQ2 Status 3 */ -#define ARIZONA_SPK_SHUTDOWN_WARN_EINT2 0x8000 /* SPK_SHUTDOWN_WARN_EINT2 */ -#define ARIZONA_SPK_SHUTDOWN_WARN_EINT2_MASK 0x8000 /* SPK_SHUTDOWN_WARN_EINT2 */ -#define ARIZONA_SPK_SHUTDOWN_WARN_EINT2_SHIFT 15 /* SPK_SHUTDOWN_WARN_EINT2 */ -#define ARIZONA_SPK_SHUTDOWN_WARN_EINT2_WIDTH 1 /* SPK_SHUTDOWN_WARN_EINT2 */ -#define ARIZONA_SPK_SHUTDOWN_EINT2 0x4000 /* SPK_SHUTDOWN_EINT2 */ -#define ARIZONA_SPK_SHUTDOWN_EINT2_MASK 0x4000 /* SPK_SHUTDOWN_EINT2 */ -#define ARIZONA_SPK_SHUTDOWN_EINT2_SHIFT 14 /* SPK_SHUTDOWN_EINT2 */ -#define ARIZONA_SPK_SHUTDOWN_EINT2_WIDTH 1 /* SPK_SHUTDOWN_EINT2 */ +#define ARIZONA_SPK_OVERHEAT_WARN_EINT2 0x8000 /* SPK_OVERHEAT_WARN_EINT2 */ +#define ARIZONA_SPK_OVERHEAT_WARN_EINT2_MASK 0x8000 /* SPK_OVERHEAT_WARN_EINT2 */ +#define ARIZONA_SPK_OVERHEAT_WARN_EINT2_SHIFT 15 /* SPK_OVERHEAT_WARN_EINT2 */ +#define ARIZONA_SPK_OVERHEAT_WARN_EINT2_WIDTH 1 /* SPK_OVERHEAT_WARN_EINT2 */ +#define ARIZONA_SPK_OVERHEAT_EINT2 0x4000 /* SPK_OVERHEAT_EINT2 */ +#define ARIZONA_SPK_OVERHEAT_EINT2_MASK 0x4000 /* SPK_OVERHEAT_EINT2 */ +#define ARIZONA_SPK_OVERHEAT_EINT2_SHIFT 14 /* SPK_OVERHEAT_EINT2 */ +#define ARIZONA_SPK_OVERHEAT_EINT2_WIDTH 1 /* SPK_OVERHEAT_EINT2 */ #define ARIZONA_HPDET_EINT2 0x2000 /* HPDET_EINT2 */ #define ARIZONA_HPDET_EINT2_MASK 0x2000 /* HPDET_EINT2 */ #define ARIZONA_HPDET_EINT2_SHIFT 13 /* HPDET_EINT2 */ @@ -5518,14 +5518,14 @@ /* * R3354 (0xD1A) - IRQ2 Status 3 Mask */ -#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2 0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT2 */ -#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2_MASK 0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT2 */ -#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2_SHIFT 15 /* IM_SPK_SHUTDOWN_WARN_EINT2 */ -#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2_WIDTH 1 /* IM_SPK_SHUTDOWN_WARN_EINT2 */ -#define ARIZONA_IM_SPK_SHUTDOWN_EINT2 0x4000 /* IM_SPK_SHUTDOWN_EINT2 */ -#define ARIZONA_IM_SPK_SHUTDOWN_EINT2_MASK 0x4000 /* IM_SPK_SHUTDOWN_EINT2 */ -#define ARIZONA_IM_SPK_SHUTDOWN_EINT2_SHIFT 14 /* IM_SPK_SHUTDOWN_EINT2 */ -#define ARIZONA_IM_SPK_SHUTDOWN_EINT2_WIDTH 1 /* IM_SPK_SHUTDOWN_EINT2 */ +#define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT2 0x8000 /* IM_SPK_OVERHEAT_WARN_EINT2 */ +#define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT2_MASK 0x8000 /* IM_SPK_OVERHEAT_WARN_EINT2 */ +#define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT2_SHIFT 15 /* IM_SPK_OVERHEAT_WARN_EINT2 */ +#define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT2_WIDTH 1 /* IM_SPK_OVERHEAT_WARN_EINT2 */ +#define ARIZONA_IM_SPK_OVERHEAT_EINT2 0x4000 /* IM_SPK_OVERHEAT_EINT2 */ +#define ARIZONA_IM_SPK_OVERHEAT_EINT2_MASK 0x4000 /* IM_SPK_OVERHEAT_EINT2 */ +#define ARIZONA_IM_SPK_OVERHEAT_EINT2_SHIFT 14 /* IM_SPK_OVERHEAT_EINT2 */ +#define ARIZONA_IM_SPK_OVERHEAT_EINT2_WIDTH 1 /* IM_SPK_OVERHEAT_EINT2 */ #define ARIZONA_IM_HPDET_EINT2 0x2000 /* IM_HPDET_EINT2 */ #define ARIZONA_IM_HPDET_EINT2_MASK 0x2000 /* IM_HPDET_EINT2 */ #define ARIZONA_IM_HPDET_EINT2_SHIFT 13 /* IM_HPDET_EINT2 */ @@ -5699,14 +5699,14 @@ /* * R3361 (0xD21) - Interrupt Raw Status 3 */ -#define ARIZONA_SPK_SHUTDOWN_WARN_STS 0x8000 /* SPK_SHUTDOWN_WARN_STS */ -#define ARIZONA_SPK_SHUTDOWN_WARN_STS_MASK 0x8000 /* SPK_SHUTDOWN_WARN_STS */ -#define ARIZONA_SPK_SHUTDOWN_WARN_STS_SHIFT 15 /* SPK_SHUTDOWN_WARN_STS */ -#define ARIZONA_SPK_SHUTDOWN_WARN_STS_WIDTH 1 /* SPK_SHUTDOWN_WARN_STS */ -#define ARIZONA_SPK_SHUTDOWN_STS 0x4000 /* SPK_SHUTDOWN_STS */ -#define ARIZONA_SPK_SHUTDOWN_STS_MASK 0x4000 /* SPK_SHUTDOWN_STS */ -#define ARIZONA_SPK_SHUTDOWN_STS_SHIFT 14 /* SPK_SHUTDOWN_STS */ -#define ARIZONA_SPK_SHUTDOWN_STS_WIDTH 1 /* SPK_SHUTDOWN_STS */ +#define ARIZONA_SPK_OVERHEAT_WARN_STS 0x8000 /* SPK_OVERHEAT_WARN_STS */ +#define ARIZONA_SPK_OVERHEAT_WARN_STS_MASK 0x8000 /* SPK_OVERHEAT_WARN_STS */ +#define ARIZONA_SPK_OVERHEAT_WARN_STS_SHIFT 15 /* SPK_OVERHEAT_WARN_STS */ +#define ARIZONA_SPK_OVERHEAT_WARN_STS_WIDTH 1 /* SPK_OVERHEAT_WARN_STS */ +#define ARIZONA_SPK_OVERHEAT_STS 0x4000 /* SPK_OVERHEAT_STS */ +#define ARIZONA_SPK_OVERHEAT_STS_MASK 0x4000 /* SPK_OVERHEAT_STS */ +#define ARIZONA_SPK_OVERHEAT_STS_SHIFT 14 /* SPK_OVERHEAT_STS */ +#define ARIZONA_SPK_OVERHEAT_STS_WIDTH 1 /* SPK_OVERHEAT_STS */ #define ARIZONA_HPDET_STS 0x2000 /* HPDET_STS */ #define ARIZONA_HPDET_STS_MASK 0x2000 /* HPDET_STS */ #define ARIZONA_HPDET_STS_SHIFT 13 /* HPDET_STS */ diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index e126024aa13..e928f792df2 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -86,7 +86,7 @@ static int arizona_spk_ev(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_POST_PMU: val = snd_soc_read(codec, ARIZONA_INTERRUPT_RAW_STATUS_3); - if (val & ARIZONA_SPK_SHUTDOWN_STS) { + if (val & ARIZONA_SPK_OVERHEAT_STS) { dev_crit(arizona->dev, "Speaker not enabled due to temperature\n"); return -EBUSY; @@ -124,7 +124,7 @@ static irqreturn_t arizona_thermal_warn(int irq, void *data) if (ret != 0) { dev_err(arizona->dev, "Failed to read thermal status: %d\n", ret); - } else if (val & ARIZONA_SPK_SHUTDOWN_WARN_STS) { + } else if (val & ARIZONA_SPK_OVERHEAT_WARN_STS) { dev_crit(arizona->dev, "Thermal warning\n"); } @@ -142,7 +142,7 @@ static irqreturn_t arizona_thermal_shutdown(int irq, void *data) if (ret != 0) { dev_err(arizona->dev, "Failed to read thermal status: %d\n", ret); - } else if (val & ARIZONA_SPK_SHUTDOWN_STS) { + } else if (val & ARIZONA_SPK_OVERHEAT_STS) { dev_crit(arizona->dev, "Thermal shutdown\n"); ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, @@ -188,7 +188,7 @@ int arizona_init_spk(struct snd_soc_codec *codec) break; } - ret = arizona_request_irq(arizona, ARIZONA_IRQ_SPK_SHUTDOWN_WARN, + ret = arizona_request_irq(arizona, ARIZONA_IRQ_SPK_OVERHEAT_WARN, "Thermal warning", arizona_thermal_warn, arizona); if (ret != 0) @@ -196,7 +196,7 @@ int arizona_init_spk(struct snd_soc_codec *codec) "Failed to get thermal warning IRQ: %d\n", ret); - ret = arizona_request_irq(arizona, ARIZONA_IRQ_SPK_SHUTDOWN, + ret = arizona_request_irq(arizona, ARIZONA_IRQ_SPK_OVERHEAT, "Thermal shutdown", arizona_thermal_shutdown, arizona); if (ret != 0) From 172aee317a8b49803568c384eb5d8a5e10aa9a04 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 31 Mar 2014 16:31:19 +0100 Subject: [PATCH 0419/1167] mfd: florida: Add new interrupt register definitions Newer versions of the IP have a lot of new interrupts and move several existing interrupts. This patch adds the register definitions and regmap hookup for these interrupts. Change-Id: I79cf15f82becaba4e0c49f026b6fc94fce510d12 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-irq.c | 10 +- drivers/mfd/arizona.h | 1 + drivers/mfd/florida-tables.c | 213 ++++++++++ include/linux/mfd/arizona/core.h | 21 +- include/linux/mfd/arizona/registers.h | 585 ++++++++++++++++++++++++++ 5 files changed, 827 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index e44c7de7f9e..2162c44ca89 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -203,7 +203,15 @@ int arizona_irq_init(struct arizona *arizona) case WM8280: case WM5110: aod = &florida_aod; - irq = &florida_irq; + + switch (arizona->rev) { + case 0 ... 2: + irq = &florida_irq; + break; + default: + irq = &florida_revd_irq; + break; + } ctrlif_error = false; break; diff --git a/drivers/mfd/arizona.h b/drivers/mfd/arizona.h index 84456f6e004..4438d6c078f 100644 --- a/drivers/mfd/arizona.h +++ b/drivers/mfd/arizona.h @@ -38,6 +38,7 @@ extern const struct regmap_irq_chip wm5102_irq; extern const struct regmap_irq_chip florida_aod; extern const struct regmap_irq_chip florida_irq; +extern const struct regmap_irq_chip florida_revd_irq; extern const struct regmap_irq_chip wm8997_aod; extern const struct regmap_irq_chip wm8997_irq; diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 50988bd4a7c..23bca485b38 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -457,6 +457,209 @@ const struct regmap_irq_chip florida_irq = { }; EXPORT_SYMBOL_GPL(florida_irq); +static const struct regmap_irq florida_revd_irqs[ARIZONA_NUM_IRQ] = { + [ARIZONA_IRQ_GP4] = { .reg_offset = 0, .mask = ARIZONA_GP4_EINT1 }, + [ARIZONA_IRQ_GP3] = { .reg_offset = 0, .mask = ARIZONA_GP3_EINT1 }, + [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 }, + [ARIZONA_IRQ_GP1] = { .reg_offset = 0, .mask = ARIZONA_GP1_EINT1 }, + + [ARIZONA_IRQ_DSP4_RAM_RDY] = { + .reg_offset = 1, .mask = ARIZONA_DSP4_RAM_RDY_EINT1 + }, + [ARIZONA_IRQ_DSP3_RAM_RDY] = { + .reg_offset = 1, .mask = ARIZONA_DSP3_RAM_RDY_EINT1 + }, + [ARIZONA_IRQ_DSP2_RAM_RDY] = { + .reg_offset = 1, .mask = ARIZONA_DSP2_RAM_RDY_EINT1 + }, + [ARIZONA_IRQ_DSP1_RAM_RDY] = { + .reg_offset = 1, .mask = ARIZONA_DSP1_RAM_RDY_EINT1 + }, + [ARIZONA_IRQ_DSP_IRQ8] = { + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ8_EINT1 + }, + [ARIZONA_IRQ_DSP_IRQ7] = { + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ7_EINT1 + }, + [ARIZONA_IRQ_DSP_IRQ6] = { + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ6_EINT1 + }, + [ARIZONA_IRQ_DSP_IRQ5] = { + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ5_EINT1 + }, + [ARIZONA_IRQ_DSP_IRQ4] = { + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ4_EINT1 + }, + [ARIZONA_IRQ_DSP_IRQ3] = { + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ3_EINT1 + }, + [ARIZONA_IRQ_DSP_IRQ2] = { + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ2_EINT1 + }, + [ARIZONA_IRQ_DSP_IRQ1] = { + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ1_EINT1 + }, + + [ARIZONA_IRQ_SPK_OVERHEAT_WARN] = { + .reg_offset = 2, .mask = ARIZONA_SPK_OVERHEAT_WARN_EINT1 + }, + [ARIZONA_IRQ_SPK_OVERHEAT] = { + .reg_offset = 2, .mask = ARIZONA_SPK_OVERHEAT_EINT1 + }, + [ARIZONA_IRQ_HPDET] = { + .reg_offset = 2, .mask = ARIZONA_HPDET_EINT1 + }, + [ARIZONA_IRQ_MICDET] = { + .reg_offset = 2, .mask = ARIZONA_MICDET_EINT1 + }, + [ARIZONA_IRQ_WSEQ_DONE] = { + .reg_offset = 2, .mask = ARIZONA_WSEQ_DONE_EINT1 + }, + [ARIZONA_IRQ_DRC2_SIG_DET] = { + .reg_offset = 2, .mask = ARIZONA_DRC2_SIG_DET_EINT1 + }, + [ARIZONA_IRQ_DRC1_SIG_DET] = { + .reg_offset = 2, .mask = ARIZONA_DRC1_SIG_DET_EINT1 + }, + [ARIZONA_IRQ_ASRC2_LOCK] = { + .reg_offset = 2, .mask = ARIZONA_ASRC2_LOCK_EINT1 + }, + [ARIZONA_IRQ_ASRC1_LOCK] = { + .reg_offset = 2, .mask = ARIZONA_ASRC1_LOCK_EINT1 + }, + [ARIZONA_IRQ_UNDERCLOCKED] = { + .reg_offset = 2, .mask = ARIZONA_UNDERCLOCKED_EINT1 + }, + [ARIZONA_IRQ_OVERCLOCKED] = { + .reg_offset = 2, .mask = ARIZONA_OVERCLOCKED_EINT1 + }, + [ARIZONA_IRQ_FLL2_LOCK] = { + .reg_offset = 2, .mask = ARIZONA_FLL2_LOCK_EINT1 + }, + [ARIZONA_IRQ_FLL1_LOCK] = { + .reg_offset = 2, .mask = ARIZONA_FLL1_LOCK_EINT1 + }, + [ARIZONA_IRQ_CLKGEN_ERR] = { + .reg_offset = 2, .mask = ARIZONA_CLKGEN_ERR_EINT1 + }, + [ARIZONA_IRQ_CLKGEN_ERR_ASYNC] = { + .reg_offset = 2, .mask = ARIZONA_CLKGEN_ERR_ASYNC_EINT1 + }, + + [ARIZONA_IRQ_CTRLIF_ERR] = { + .reg_offset = 3, .mask = ARIZONA_V2_CTRLIF_ERR_EINT1 + }, + [ARIZONA_IRQ_MIXER_DROPPED_SAMPLES] = { + .reg_offset = 3, .mask = ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT1 + }, + [ARIZONA_IRQ_ASYNC_CLK_ENA_LOW] = { + .reg_offset = 3, .mask = ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT1 + }, + [ARIZONA_IRQ_SYSCLK_ENA_LOW] = { + .reg_offset = 3, .mask = ARIZONA_V2_SYSCLK_ENA_LOW_EINT1 + }, + [ARIZONA_IRQ_ISRC1_CFG_ERR] = { + .reg_offset = 3, .mask = ARIZONA_V2_ISRC1_CFG_ERR_EINT1 + }, + [ARIZONA_IRQ_ISRC2_CFG_ERR] = { + .reg_offset = 3, .mask = ARIZONA_V2_ISRC2_CFG_ERR_EINT1 + }, + [ARIZONA_IRQ_ISRC3_CFG_ERR] = { + .reg_offset = 3, .mask = ARIZONA_V2_ISRC3_CFG_ERR_EINT1 + }, + [ARIZONA_IRQ_HP3R_DONE] = { + .reg_offset = 3, .mask = ARIZONA_HP3R_DONE_EINT1 + }, + [ARIZONA_IRQ_HP3L_DONE] = { + .reg_offset = 3, .mask = ARIZONA_HP3L_DONE_EINT1 + }, + [ARIZONA_IRQ_HP2R_DONE] = { + .reg_offset = 3, .mask = ARIZONA_HP2R_DONE_EINT1 + }, + [ARIZONA_IRQ_HP2L_DONE] = { + .reg_offset = 3, .mask = ARIZONA_HP2L_DONE_EINT1 + }, + [ARIZONA_IRQ_HP1R_DONE] = { + .reg_offset = 3, .mask = ARIZONA_HP1R_DONE_EINT1 + }, + [ARIZONA_IRQ_HP1L_DONE] = { + .reg_offset = 3, .mask = ARIZONA_HP1L_DONE_EINT1 + }, + + [ARIZONA_IRQ_BOOT_DONE] = { + .reg_offset = 4, .mask = ARIZONA_BOOT_DONE_EINT1 + }, + [ARIZONA_IRQ_ASRC_CFG_ERR] = { + .reg_offset = 4, .mask = ARIZONA_V2_ASRC_CFG_ERR_EINT1 + }, + [ARIZONA_IRQ_FLL2_CLOCK_OK] = { + .reg_offset = 4, .mask = ARIZONA_FLL2_CLOCK_OK_EINT1 + }, + [ARIZONA_IRQ_FLL1_CLOCK_OK] = { + .reg_offset = 4, .mask = ARIZONA_FLL1_CLOCK_OK_EINT1 + }, + + [ARIZONA_IRQ_DSP_SHARED_WR_COLL] = { + .reg_offset = 5, .mask = ARIZONA_DSP_SHARED_WR_COLL_EINT1 + }, + [ARIZONA_IRQ_SPK_SHUTDOWN] = { + .reg_offset = 5, .mask = ARIZONA_SPK_SHUTDOWN_EINT1 + }, + [ARIZONA_IRQ_SPK1R_SHORT] = { + .reg_offset = 5, .mask = ARIZONA_SPK1R_SHORT_EINT1 + }, + [ARIZONA_IRQ_SPK1L_SHORT] = { + .reg_offset = 5, .mask = ARIZONA_SPK1L_SHORT_EINT1 + }, + [ARIZONA_IRQ_HP3R_SC_NEG] = { + .reg_offset = 5, .mask = ARIZONA_HP3R_SC_NEG_EINT1 + }, + [ARIZONA_IRQ_HP3R_SC_POS] = { + .reg_offset = 5, .mask = ARIZONA_HP3R_SC_POS_EINT1 + }, + [ARIZONA_IRQ_HP3L_SC_NEG] = { + .reg_offset = 5, .mask = ARIZONA_HP3L_SC_NEG_EINT1 + }, + [ARIZONA_IRQ_HP3L_SC_POS] = { + .reg_offset = 5, .mask = ARIZONA_HP3L_SC_POS_EINT1 + }, + [ARIZONA_IRQ_HP2R_SC_NEG] = { + .reg_offset = 5, .mask = ARIZONA_HP2R_SC_NEG_EINT1 + }, + [ARIZONA_IRQ_HP2R_SC_POS] = { + .reg_offset = 5, .mask = ARIZONA_HP2R_SC_POS_EINT1 + }, + [ARIZONA_IRQ_HP2L_SC_NEG] = { + .reg_offset = 5, .mask = ARIZONA_HP2L_SC_NEG_EINT1 + }, + [ARIZONA_IRQ_HP2L_SC_POS] = { + .reg_offset = 5, .mask = ARIZONA_HP2L_SC_POS_EINT1 + }, + [ARIZONA_IRQ_HP1R_SC_NEG] = { + .reg_offset = 5, .mask = ARIZONA_HP1R_SC_NEG_EINT1 + }, + [ARIZONA_IRQ_HP1R_SC_POS] = { + .reg_offset = 5, .mask = ARIZONA_HP1R_SC_POS_EINT1 + }, + [ARIZONA_IRQ_HP1L_SC_NEG] = { + .reg_offset = 5, .mask = ARIZONA_HP1L_SC_NEG_EINT1 + }, + [ARIZONA_IRQ_HP1L_SC_POS] = { + .reg_offset = 5, .mask = ARIZONA_HP1L_SC_POS_EINT1 + }, +}; + +const struct regmap_irq_chip florida_revd_irq = { + .name = "florida IRQ", + .status_base = ARIZONA_INTERRUPT_STATUS_1, + .mask_base = ARIZONA_INTERRUPT_STATUS_1_MASK, + .ack_base = ARIZONA_INTERRUPT_STATUS_1, + .num_regs = 6, + .irqs = florida_revd_irqs, + .num_irqs = ARRAY_SIZE(florida_revd_irqs), +}; +EXPORT_SYMBOL_GPL(florida_revd_irq); + static const struct reg_default florida_reg_default[] = { { 0x00000008, 0x0019 }, /* R8 - Ctrl IF SPI CFG 1 */ { 0x00000009, 0x0001 }, /* R9 - Ctrl IF I2C1 CFG 1 */ @@ -1321,12 +1524,14 @@ static const struct reg_default florida_reg_default[] = { { 0x00000D0A, 0xFFFF }, /* R3338 - Interrupt Status 3 Mask */ { 0x00000D0B, 0xFFFF }, /* R3339 - Interrupt Status 4 Mask */ { 0x00000D0C, 0xFEFF }, /* R3340 - Interrupt Status 5 Mask */ + { 0x00000D0D, 0xFFFF }, /* R3341 - Interrupt Status 6 Mask */ { 0x00000D0F, 0x0000 }, /* R3343 - Interrupt Control */ { 0x00000D18, 0xFFFF }, /* R3352 - IRQ2 Status 1 Mask */ { 0x00000D19, 0xFFFF }, /* R3353 - IRQ2 Status 2 Mask */ { 0x00000D1A, 0xFFFF }, /* R3354 - IRQ2 Status 3 Mask */ { 0x00000D1B, 0xFFFF }, /* R3355 - IRQ2 Status 4 Mask */ { 0x00000D1C, 0xFFFF }, /* R3356 - IRQ2 Status 5 Mask */ + { 0x00000D1D, 0xFFFF }, /* R3357 - IRQ2 Status 6 Mask */ { 0x00000D1F, 0x0000 }, /* R3359 - IRQ2 Control */ { 0x00000D53, 0xFFFF }, /* R3411 - AOD IRQ Mask IRQ1 */ { 0x00000D54, 0xFFFF }, /* R3412 - AOD IRQ Mask IRQ2 */ @@ -2554,22 +2759,26 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_INTERRUPT_STATUS_3: case ARIZONA_INTERRUPT_STATUS_4: case ARIZONA_INTERRUPT_STATUS_5: + case ARIZONA_INTERRUPT_STATUS_6: case ARIZONA_INTERRUPT_STATUS_1_MASK: case ARIZONA_INTERRUPT_STATUS_2_MASK: case ARIZONA_INTERRUPT_STATUS_3_MASK: case ARIZONA_INTERRUPT_STATUS_4_MASK: case ARIZONA_INTERRUPT_STATUS_5_MASK: + case ARIZONA_INTERRUPT_STATUS_6_MASK: case ARIZONA_INTERRUPT_CONTROL: case ARIZONA_IRQ2_STATUS_1: case ARIZONA_IRQ2_STATUS_2: case ARIZONA_IRQ2_STATUS_3: case ARIZONA_IRQ2_STATUS_4: case ARIZONA_IRQ2_STATUS_5: + case ARIZONA_IRQ2_STATUS_6: case ARIZONA_IRQ2_STATUS_1_MASK: case ARIZONA_IRQ2_STATUS_2_MASK: case ARIZONA_IRQ2_STATUS_3_MASK: case ARIZONA_IRQ2_STATUS_4_MASK: case ARIZONA_IRQ2_STATUS_5_MASK: + case ARIZONA_IRQ2_STATUS_6_MASK: case ARIZONA_IRQ2_CONTROL: case ARIZONA_INTERRUPT_RAW_STATUS_2: case ARIZONA_INTERRUPT_RAW_STATUS_3: @@ -2578,6 +2787,7 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_INTERRUPT_RAW_STATUS_6: case ARIZONA_INTERRUPT_RAW_STATUS_7: case ARIZONA_INTERRUPT_RAW_STATUS_8: + case ARIZONA_INTERRUPT_RAW_STATUS_9: case ARIZONA_IRQ_PIN_STATUS: case ARIZONA_AOD_WKUP_AND_TRIG: case ARIZONA_AOD_IRQ1: @@ -2868,11 +3078,13 @@ static bool florida_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_INTERRUPT_STATUS_3: case ARIZONA_INTERRUPT_STATUS_4: case ARIZONA_INTERRUPT_STATUS_5: + case ARIZONA_INTERRUPT_STATUS_6: case ARIZONA_IRQ2_STATUS_1: case ARIZONA_IRQ2_STATUS_2: case ARIZONA_IRQ2_STATUS_3: case ARIZONA_IRQ2_STATUS_4: case ARIZONA_IRQ2_STATUS_5: + case ARIZONA_IRQ2_STATUS_6: case ARIZONA_INTERRUPT_RAW_STATUS_2: case ARIZONA_INTERRUPT_RAW_STATUS_3: case ARIZONA_INTERRUPT_RAW_STATUS_4: @@ -2880,6 +3092,7 @@ static bool florida_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_INTERRUPT_RAW_STATUS_6: case ARIZONA_INTERRUPT_RAW_STATUS_7: case ARIZONA_INTERRUPT_RAW_STATUS_8: + case ARIZONA_INTERRUPT_RAW_STATUS_9: case ARIZONA_IRQ_PIN_STATUS: case ARIZONA_AOD_WKUP_AND_TRIG: case ARIZONA_AOD_IRQ1: diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index f8df97b3481..086b997c541 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -87,8 +87,25 @@ enum arizona_type { #define ARIZONA_IRQ_HP2L_DONE 55 #define ARIZONA_IRQ_HP1R_DONE 56 #define ARIZONA_IRQ_HP1L_DONE 57 - -#define ARIZONA_NUM_IRQ 58 +#define ARIZONA_IRQ_ISRC3_CFG_ERR 58 +#define ARIZONA_IRQ_DSP_SHARED_WR_COLL 59 +#define ARIZONA_IRQ_SPK_SHUTDOWN 60 +#define ARIZONA_IRQ_SPK1R_SHORT 61 +#define ARIZONA_IRQ_SPK1L_SHORT 62 +#define ARIZONA_IRQ_HP3R_SC_NEG 63 +#define ARIZONA_IRQ_HP3R_SC_POS 64 +#define ARIZONA_IRQ_HP3L_SC_NEG 65 +#define ARIZONA_IRQ_HP3L_SC_POS 66 +#define ARIZONA_IRQ_HP2R_SC_NEG 67 +#define ARIZONA_IRQ_HP2R_SC_POS 68 +#define ARIZONA_IRQ_HP2L_SC_NEG 69 +#define ARIZONA_IRQ_HP2L_SC_POS 70 +#define ARIZONA_IRQ_HP1R_SC_NEG 71 +#define ARIZONA_IRQ_HP1R_SC_POS 72 +#define ARIZONA_IRQ_HP1L_SC_NEG 73 +#define ARIZONA_IRQ_HP1L_SC_POS 74 + +#define ARIZONA_NUM_IRQ 75 #define ARIZONA_HP_SHORT_IMPEDANCE 4 struct snd_soc_dapm_context; diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 8c47878a2e4..e2db2834e13 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -914,22 +914,26 @@ #define ARIZONA_INTERRUPT_STATUS_3 0xD02 #define ARIZONA_INTERRUPT_STATUS_4 0xD03 #define ARIZONA_INTERRUPT_STATUS_5 0xD04 +#define ARIZONA_INTERRUPT_STATUS_6 0xD05 #define ARIZONA_INTERRUPT_STATUS_1_MASK 0xD08 #define ARIZONA_INTERRUPT_STATUS_2_MASK 0xD09 #define ARIZONA_INTERRUPT_STATUS_3_MASK 0xD0A #define ARIZONA_INTERRUPT_STATUS_4_MASK 0xD0B #define ARIZONA_INTERRUPT_STATUS_5_MASK 0xD0C +#define ARIZONA_INTERRUPT_STATUS_6_MASK 0xD0D #define ARIZONA_INTERRUPT_CONTROL 0xD0F #define ARIZONA_IRQ2_STATUS_1 0xD10 #define ARIZONA_IRQ2_STATUS_2 0xD11 #define ARIZONA_IRQ2_STATUS_3 0xD12 #define ARIZONA_IRQ2_STATUS_4 0xD13 #define ARIZONA_IRQ2_STATUS_5 0xD14 +#define ARIZONA_IRQ2_STATUS_6 0xD15 #define ARIZONA_IRQ2_STATUS_1_MASK 0xD18 #define ARIZONA_IRQ2_STATUS_2_MASK 0xD19 #define ARIZONA_IRQ2_STATUS_3_MASK 0xD1A #define ARIZONA_IRQ2_STATUS_4_MASK 0xD1B #define ARIZONA_IRQ2_STATUS_5_MASK 0xD1C +#define ARIZONA_IRQ2_STATUS_6_MASK 0xD1D #define ARIZONA_IRQ2_CONTROL 0xD1F #define ARIZONA_INTERRUPT_RAW_STATUS_2 0xD20 #define ARIZONA_INTERRUPT_RAW_STATUS_3 0xD21 @@ -938,6 +942,7 @@ #define ARIZONA_INTERRUPT_RAW_STATUS_6 0xD24 #define ARIZONA_INTERRUPT_RAW_STATUS_7 0xD25 #define ARIZONA_INTERRUPT_RAW_STATUS_8 0xD26 +#define ARIZONA_INTERRUPT_RAW_STATUS_9 0xD28 #define ARIZONA_IRQ_PIN_STATUS 0xD40 #define ARIZONA_ADSP2_IRQ0 0xD41 #define ARIZONA_AOD_WKUP_AND_TRIG 0xD50 @@ -5063,6 +5068,53 @@ #define ARIZONA_HP1L_DONE_EINT1_SHIFT 0 /* HP1L_DONE_EINT1 */ #define ARIZONA_HP1L_DONE_EINT1_WIDTH 1 /* HP1L_DONE_EINT1 */ +/* + * R3331 (0xD03) - Interrupt Status 4 (Alternate layout) + * + * Alternate layout used on later devices, note only fields that have moved + * are specified + */ +#define ARIZONA_V2_AIF3_ERR_EINT1 0x8000 /* AIF3_ERR_EINT1 */ +#define ARIZONA_V2_AIF3_ERR_EINT1_MASK 0x8000 /* AIF3_ERR_EINT1 */ +#define ARIZONA_V2_AIF3_ERR_EINT1_SHIFT 15 /* AIF3_ERR_EINT1 */ +#define ARIZONA_V2_AIF3_ERR_EINT1_WIDTH 1 /* AIF3_ERR_EINT1 */ +#define ARIZONA_V2_AIF2_ERR_EINT1 0x4000 /* AIF2_ERR_EINT1 */ +#define ARIZONA_V2_AIF2_ERR_EINT1_MASK 0x4000 /* AIF2_ERR_EINT1 */ +#define ARIZONA_V2_AIF2_ERR_EINT1_SHIFT 14 /* AIF2_ERR_EINT1 */ +#define ARIZONA_V2_AIF2_ERR_EINT1_WIDTH 1 /* AIF2_ERR_EINT1 */ +#define ARIZONA_V2_AIF1_ERR_EINT1 0x2000 /* AIF1_ERR_EINT1 */ +#define ARIZONA_V2_AIF1_ERR_EINT1_MASK 0x2000 /* AIF1_ERR_EINT1 */ +#define ARIZONA_V2_AIF1_ERR_EINT1_SHIFT 13 /* AIF1_ERR_EINT1 */ +#define ARIZONA_V2_AIF1_ERR_EINT1_WIDTH 1 /* AIF1_ERR_EINT1 */ +#define ARIZONA_V2_CTRLIF_ERR_EINT1 0x1000 /* CTRLIF_ERR_EINT1 */ +#define ARIZONA_V2_CTRLIF_ERR_EINT1_MASK 0x1000 /* CTRLIF_ERR_EINT1 */ +#define ARIZONA_V2_CTRLIF_ERR_EINT1_SHIFT 12 /* CTRLIF_ERR_EINT1 */ +#define ARIZONA_V2_CTRLIF_ERR_EINT1_WIDTH 1 /* CTRLIF_ERR_EINT1 */ +#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT1 0x0800 /* MIXER_DROPPED_SAMPLE_EINT1 */ +#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT1_MASK 0x0800 /* MIXER_DROPPED_SAMPLE_EINT1 */ +#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT1_SHIFT 11 /* MIXER_DROPPED_SAMPLE_EINT1 */ +#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT1_WIDTH 1 /* MIXER_DROPPED_SAMPLE_EINT1 */ +#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT1 0x0400 /* ASYNC_CLK_ENA_LOW_EINT1 */ +#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT1_MASK 0x0400 /* ASYNC_CLK_ENA_LOW_EINT1 */ +#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT1_SHIFT 10 /* ASYNC_CLK_ENA_LOW_EINT1 */ +#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT1_WIDTH 1 /* ASYNC_CLK_ENA_LOW_EINT1 */ +#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT1 0x0200 /* SYSCLK_ENA_LOW_EINT1 */ +#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT1_MASK 0x0200 /* SYSCLK_ENA_LOW_EINT1 */ +#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT1_SHIFT 9 /* SYSCLK_ENA_LOW_EINT1 */ +#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT1_WIDTH 1 /* SYSCLK_ENA_LOW_EINT1 */ +#define ARIZONA_V2_ISRC1_CFG_ERR_EINT1 0x0100 /* ISRC1_CFG_ERR_EINT1 */ +#define ARIZONA_V2_ISRC1_CFG_ERR_EINT1_MASK 0x0100 /* ISRC1_CFG_ERR_EINT1 */ +#define ARIZONA_V2_ISRC1_CFG_ERR_EINT1_SHIFT 8 /* ISRC1_CFG_ERR_EINT1 */ +#define ARIZONA_V2_ISRC1_CFG_ERR_EINT1_WIDTH 1 /* ISRC1_CFG_ERR_EINT1 */ +#define ARIZONA_V2_ISRC2_CFG_ERR_EINT1 0x0080 /* ISRC2_CFG_ERR_EINT1 */ +#define ARIZONA_V2_ISRC2_CFG_ERR_EINT1_MASK 0x0080 /* ISRC2_CFG_ERR_EINT1 */ +#define ARIZONA_V2_ISRC2_CFG_ERR_EINT1_SHIFT 7 /* ISRC2_CFG_ERR_EINT1 */ +#define ARIZONA_V2_ISRC2_CFG_ERR_EINT1_WIDTH 1 /* ISRC2_CFG_ERR_EINT1 */ +#define ARIZONA_V2_ISRC3_CFG_ERR_EINT1 0x0040 /* ISRC3_CFG_ERR_EINT1 */ +#define ARIZONA_V2_ISRC3_CFG_ERR_EINT1_MASK 0x0040 /* ISRC3_CFG_ERR_EINT1 */ +#define ARIZONA_V2_ISRC3_CFG_ERR_EINT1_SHIFT 6 /* ISRC3_CFG_ERR_EINT1 */ +#define ARIZONA_V2_ISRC3_CFG_ERR_EINT1_WIDTH 1 /* ISRC3_CFG_ERR_EINT1 */ + /* * R3332 (0xD04) - Interrupt Status 5 */ @@ -5087,6 +5139,85 @@ #define ARIZONA_FLL1_CLOCK_OK_EINT1_SHIFT 0 /* FLL1_CLOCK_OK_EINT1 */ #define ARIZONA_FLL1_CLOCK_OK_EINT1_WIDTH 1 /* FLL1_CLOCK_OK_EINT1 */ +/* + * R3332 (0xD05) - Interrupt Status 5 (Alternate layout) + * + * Alternate layout used on later devices, note only fields that have moved + * are specified + */ +#define ARIZONA_V2_ASRC_CFG_ERR_EINT1 0x0008 /* ASRC_CFG_ERR_EINT1 */ +#define ARIZONA_V2_ASRC_CFG_ERR_EINT1_MASK 0x0008 /* ASRC_CFG_ERR_EINT1 */ +#define ARIZONA_V2_ASRC_CFG_ERR_EINT1_SHIFT 3 /* ASRC_CFG_ERR_EINT1 */ +#define ARIZONA_V2_ASRC_CFG_ERR_EINT1_WIDTH 1 /* ASRC_CFG_ERR_EINT1 */ + +/* + * R3333 (0xD05) - Interrupt Status 6 + */ +#define ARIZONA_DSP_SHARED_WR_COLL_EINT1 0x8000 /* DSP_SHARED_WR_COLL_EINT1 */ +#define ARIZONA_DSP_SHARED_WR_COLL_EINT1_MASK 0x8000 /* DSP_SHARED_WR_COLL_EINT1 */ +#define ARIZONA_DSP_SHARED_WR_COLL_EINT1_SHIFT 15 /* DSP_SHARED_WR_COLL_EINT1 */ +#define ARIZONA_DSP_SHARED_WR_COLL_EINT1_WIDTH 1 /* DSP_SHARED_WR_COLL_EINT1 */ +#define ARIZONA_SPK_SHUTDOWN_EINT1 0x4000 /* SPK_SHUTDOWN_EINT1 */ +#define ARIZONA_SPK_SHUTDOWN_EINT1_MASK 0x4000 /* SPK_SHUTDOWN_EINT1 */ +#define ARIZONA_SPK_SHUTDOWN_EINT1_SHIFT 14 /* SPK_SHUTDOWN_EINT1 */ +#define ARIZONA_SPK_SHUTDOWN_EINT1_WIDTH 1 /* SPK_SHUTDOWN_EINT1 */ +#define ARIZONA_SPK1R_SHORT_EINT1 0x2000 /* SPK1R_SHORT_EINT1 */ +#define ARIZONA_SPK1R_SHORT_EINT1_MASK 0x2000 /* SPK1R_SHORT_EINT1 */ +#define ARIZONA_SPK1R_SHORT_EINT1_SHIFT 13 /* SPK1R_SHORT_EINT1 */ +#define ARIZONA_SPK1R_SHORT_EINT1_WIDTH 1 /* SPK1R_SHORT_EINT1 */ +#define ARIZONA_SPK1L_SHORT_EINT1 0x1000 /* SPK1L_SHORT_EINT1 */ +#define ARIZONA_SPK1L_SHORT_EINT1_MASK 0x1000 /* SPK1L_SHORT_EINT1 */ +#define ARIZONA_SPK1L_SHORT_EINT1_SHIFT 12 /* SPK1L_SHORT_EINT1 */ +#define ARIZONA_SPK1L_SHORT_EINT1_WIDTH 1 /* SPK1L_SHORT_EINT1 */ +#define ARIZONA_HP3R_SC_NEG_EINT1 0x0800 /* HP3R_SC_NEG_EINT1 */ +#define ARIZONA_HP3R_SC_NEG_EINT1_MASK 0x0800 /* HP3R_SC_NEG_EINT1 */ +#define ARIZONA_HP3R_SC_NEG_EINT1_SHIFT 11 /* HP3R_SC_NEG_EINT1 */ +#define ARIZONA_HP3R_SC_NEG_EINT1_WIDTH 1 /* HP3R_SC_NEG_EINT1 */ +#define ARIZONA_HP3R_SC_POS_EINT1 0x0400 /* HP3R_SC_POS_EINT1 */ +#define ARIZONA_HP3R_SC_POS_EINT1_MASK 0x0400 /* HP3R_SC_POS_EINT1 */ +#define ARIZONA_HP3R_SC_POS_EINT1_SHIFT 10 /* HP3R_SC_POS_EINT1 */ +#define ARIZONA_HP3R_SC_POS_EINT1_WIDTH 1 /* HP3R_SC_POS_EINT1 */ +#define ARIZONA_HP3L_SC_NEG_EINT1 0x0200 /* HP3L_SC_NEG_EINT1 */ +#define ARIZONA_HP3L_SC_NEG_EINT1_MASK 0x0200 /* HP3L_SC_NEG_EINT1 */ +#define ARIZONA_HP3L_SC_NEG_EINT1_SHIFT 9 /* HP3L_SC_NEG_EINT1 */ +#define ARIZONA_HP3L_SC_NEG_EINT1_WIDTH 1 /* HP3L_SC_NEG_EINT1 */ +#define ARIZONA_HP3L_SC_POS_EINT1 0x0100 /* HP3L_SC_POS_EINT1 */ +#define ARIZONA_HP3L_SC_POS_EINT1_MASK 0x0100 /* HP3L_SC_POS_EINT1 */ +#define ARIZONA_HP3L_SC_POS_EINT1_SHIFT 8 /* HP3L_SC_POS_EINT1 */ +#define ARIZONA_HP3L_SC_POS_EINT1_WIDTH 1 /* HP3L_SC_POS_EINT1 */ +#define ARIZONA_HP2R_SC_NEG_EINT1 0x0080 /* HP2R_SC_NEG_EINT1 */ +#define ARIZONA_HP2R_SC_NEG_EINT1_MASK 0x0080 /* HP2R_SC_NEG_EINT1 */ +#define ARIZONA_HP2R_SC_NEG_EINT1_SHIFT 7 /* HP2R_SC_NEG_EINT1 */ +#define ARIZONA_HP2R_SC_NEG_EINT1_WIDTH 1 /* HP2R_SC_NEG_EINT1 */ +#define ARIZONA_HP2R_SC_POS_EINT1 0x0040 /* HP2R_SC_POS_EINT1 */ +#define ARIZONA_HP2R_SC_POS_EINT1_MASK 0x0040 /* HP2R_SC_POS_EINT1 */ +#define ARIZONA_HP2R_SC_POS_EINT1_SHIFT 6 /* HP2R_SC_POS_EINT1 */ +#define ARIZONA_HP2R_SC_POS_EINT1_WIDTH 1 /* HP2R_SC_POS_EINT1 */ +#define ARIZONA_HP2L_SC_NEG_EINT1 0x0020 /* HP2L_SC_NEG_EINT1 */ +#define ARIZONA_HP2L_SC_NEG_EINT1_MASK 0x0020 /* HP2L_SC_NEG_EINT1 */ +#define ARIZONA_HP2L_SC_NEG_EINT1_SHIFT 5 /* HP2L_SC_NEG_EINT1 */ +#define ARIZONA_HP2L_SC_NEG_EINT1_WIDTH 1 /* HP2L_SC_NEG_EINT1 */ +#define ARIZONA_HP2L_SC_POS_EINT1 0x0010 /* HP2L_SC_POS_EINT1 */ +#define ARIZONA_HP2L_SC_POS_EINT1_MASK 0x0010 /* HP2L_SC_POS_EINT1 */ +#define ARIZONA_HP2L_SC_POS_EINT1_SHIFT 4 /* HP2L_SC_POS_EINT1 */ +#define ARIZONA_HP2L_SC_POS_EINT1_WIDTH 1 /* HP2L_SC_POS_EINT1 */ +#define ARIZONA_HP1R_SC_NEG_EINT1 0x0008 /* HP1R_SC_NEG_EINT1 */ +#define ARIZONA_HP1R_SC_NEG_EINT1_MASK 0x0008 /* HP1R_SC_NEG_EINT1 */ +#define ARIZONA_HP1R_SC_NEG_EINT1_SHIFT 3 /* HP1R_SC_NEG_EINT1 */ +#define ARIZONA_HP1R_SC_NEG_EINT1_WIDTH 1 /* HP1R_SC_NEG_EINT1 */ +#define ARIZONA_HP1R_SC_POS_EINT1 0x0004 /* HP1R_SC_POS_EINT1 */ +#define ARIZONA_HP1R_SC_POS_EINT1_MASK 0x0004 /* HP1R_SC_POS_EINT1 */ +#define ARIZONA_HP1R_SC_POS_EINT1_SHIFT 2 /* HP1R_SC_POS_EINT1 */ +#define ARIZONA_HP1R_SC_POS_EINT1_WIDTH 1 /* HP1R_SC_POS_EINT1 */ +#define ARIZONA_HP1L_SC_NEG_EINT1 0x0002 /* HP1L_SC_NEG_EINT1 */ +#define ARIZONA_HP1L_SC_NEG_EINT1_MASK 0x0002 /* HP1L_SC_NEG_EINT1 */ +#define ARIZONA_HP1L_SC_NEG_EINT1_SHIFT 1 /* HP1L_SC_NEG_EINT1 */ +#define ARIZONA_HP1L_SC_NEG_EINT1_WIDTH 1 /* HP1L_SC_NEG_EINT1 */ +#define ARIZONA_HP1L_SC_POS_EINT1 0x0001 /* HP1L_SC_POS_EINT1 */ +#define ARIZONA_HP1L_SC_POS_EINT1_MASK 0x0001 /* HP1L_SC_POS_EINT1 */ +#define ARIZONA_HP1L_SC_POS_EINT1_SHIFT 0 /* HP1L_SC_POS_EINT1 */ +#define ARIZONA_HP1L_SC_POS_EINT1_WIDTH 1 /* HP1L_SC_POS_EINT1 */ + /* * R3336 (0xD08) - Interrupt Status 1 Mask */ @@ -5255,6 +5386,53 @@ #define ARIZONA_IM_HP1L_DONE_EINT1_SHIFT 0 /* IM_HP1L_DONE_EINT1 */ #define ARIZONA_IM_HP1L_DONE_EINT1_WIDTH 1 /* IM_HP1L_DONE_EINT1 */ +/* + * R3339 (0xD0B) - Interrupt Status 4 Mask (Alternate layout) + * + * Alternate layout used on later devices, note only fields that have moved + * are specified + */ +#define ARIZONA_V2_IM_AIF3_ERR_EINT1 0x8000 /* IM_AIF3_ERR_EINT1 */ +#define ARIZONA_V2_IM_AIF3_ERR_EINT1_MASK 0x8000 /* IM_AIF3_ERR_EINT1 */ +#define ARIZONA_V2_IM_AIF3_ERR_EINT1_SHIFT 15 /* IM_AIF3_ERR_EINT1 */ +#define ARIZONA_V2_IM_AIF3_ERR_EINT1_WIDTH 1 /* IM_AIF3_ERR_EINT1 */ +#define ARIZONA_V2_IM_AIF2_ERR_EINT1 0x4000 /* IM_AIF2_ERR_EINT1 */ +#define ARIZONA_V2_IM_AIF2_ERR_EINT1_MASK 0x4000 /* IM_AIF2_ERR_EINT1 */ +#define ARIZONA_V2_IM_AIF2_ERR_EINT1_SHIFT 14 /* IM_AIF2_ERR_EINT1 */ +#define ARIZONA_V2_IM_AIF2_ERR_EINT1_WIDTH 1 /* IM_AIF2_ERR_EINT1 */ +#define ARIZONA_V2_IM_AIF1_ERR_EINT1 0x2000 /* IM_AIF1_ERR_EINT1 */ +#define ARIZONA_V2_IM_AIF1_ERR_EINT1_MASK 0x2000 /* IM_AIF1_ERR_EINT1 */ +#define ARIZONA_V2_IM_AIF1_ERR_EINT1_SHIFT 13 /* IM_AIF1_ERR_EINT1 */ +#define ARIZONA_V2_IM_AIF1_ERR_EINT1_WIDTH 1 /* IM_AIF1_ERR_EINT1 */ +#define ARIZONA_V2_IM_CTRLIF_ERR_EINT1 0x1000 /* IM_CTRLIF_ERR_EINT1 */ +#define ARIZONA_V2_IM_CTRLIF_ERR_EINT1_MASK 0x1000 /* IM_CTRLIF_ERR_EINT1 */ +#define ARIZONA_V2_IM_CTRLIF_ERR_EINT1_SHIFT 12 /* IM_CTRLIF_ERR_EINT1 */ +#define ARIZONA_V2_IM_CTRLIF_ERR_EINT1_WIDTH 1 /* IM_CTRLIF_ERR_EINT1 */ +#define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT1 0x0800 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */ +#define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT1_MASK 0x0800 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */ +#define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT1_SHIFT 11 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */ +#define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT1_WIDTH 1 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */ +#define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT1 0x0400 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */ +#define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT1_MASK 0x0400 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */ +#define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT1_SHIFT 10 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */ +#define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT1_WIDTH 1 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */ +#define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT1 0x0200 /* IM_SYSCLK_ENA_LOW_EINT1 */ +#define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT1_MASK 0x0200 /* IM_SYSCLK_ENA_LOW_EINT1 */ +#define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT1_SHIFT 9 /* IM_SYSCLK_ENA_LOW_EINT1 */ +#define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT1_WIDTH 1 /* IM_SYSCLK_ENA_LOW_EINT1 */ +#define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT1 0x0100 /* IM_ISRC1_CFG_ERR_EINT1 */ +#define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT1_MASK 0x0100 /* IM_ISRC1_CFG_ERR_EINT1 */ +#define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT1_SHIFT 8 /* IM_ISRC1_CFG_ERR_EINT1 */ +#define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT1_WIDTH 1 /* IM_ISRC1_CFG_ERR_EINT1 */ +#define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT1 0x0080 /* IM_ISRC2_CFG_ERR_EINT1 */ +#define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT1_MASK 0x0080 /* IM_ISRC2_CFG_ERR_EINT1 */ +#define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT1_SHIFT 7 /* IM_ISRC2_CFG_ERR_EINT1 */ +#define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT1_WIDTH 1 /* IM_ISRC2_CFG_ERR_EINT1 */ +#define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT1 0x0040 /* IM_ISRC3_CFG_ERR_EINT1 */ +#define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT1_MASK 0x0040 /* IM_ISRC3_CFG_ERR_EINT1 */ +#define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT1_SHIFT 6 /* IM_ISRC3_CFG_ERR_EINT1 */ +#define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT1_WIDTH 1 /* IM_ISRC3_CFG_ERR_EINT1 */ + /* * R3340 (0xD0C) - Interrupt Status 5 Mask */ @@ -5279,6 +5457,85 @@ #define ARIZONA_IM_FLL1_CLOCK_OK_EINT1_SHIFT 0 /* IM_FLL1_CLOCK_OK_EINT1 */ #define ARIZONA_IM_FLL1_CLOCK_OK_EINT1_WIDTH 1 /* IM_FLL1_CLOCK_OK_EINT1 */ +/* + * R3340 (0xD0C) - Interrupt Status 5 Mask (Alternate layout) + * + * Alternate layout used on later devices, note only fields that have moved + * are specified + */ +#define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT1 0x0008 /* IM_ASRC_CFG_ERR_EINT1 */ +#define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT1_MASK 0x0008 /* IM_ASRC_CFG_ERR_EINT1 */ +#define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT1_SHIFT 3 /* IM_ASRC_CFG_ERR_EINT1 */ +#define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT1_WIDTH 1 /* IM_ASRC_CFG_ERR_EINT1 */ + +/* + * R3341 (0xD0D) - Interrupt Status 6 Mask + */ +#define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT1 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT1 */ +#define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT1_MASK 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT1 */ +#define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT1_SHIFT 15 /* IM_DSP_SHARED_WR_COLL_EINT1 */ +#define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT1_WIDTH 1 /* IM_DSP_SHARED_WR_COLL_EINT1 */ +#define ARIZONA_IM_SPK_SHUTDOWN_EINT1 0x4000 /* IM_SPK_SHUTDOWN_EINT1 */ +#define ARIZONA_IM_SPK_SHUTDOWN_EINT1_MASK 0x4000 /* IM_SPK_SHUTDOWN_EINT1 */ +#define ARIZONA_IM_SPK_SHUTDOWN_EINT1_SHIFT 14 /* IM_SPK_SHUTDOWN_EINT1 */ +#define ARIZONA_IM_SPK_SHUTDOWN_EINT1_WIDTH 1 /* IM_SPK_SHUTDOWN_EINT1 */ +#define ARIZONA_IM_SPK1R_SHORT_EINT1 0x2000 /* IM_SPK1R_SHORT_EINT1 */ +#define ARIZONA_IM_SPK1R_SHORT_EINT1_MASK 0x2000 /* IM_SPK1R_SHORT_EINT1 */ +#define ARIZONA_IM_SPK1R_SHORT_EINT1_SHIFT 13 /* IM_SPK1R_SHORT_EINT1 */ +#define ARIZONA_IM_SPK1R_SHORT_EINT1_WIDTH 1 /* IM_SPK1R_SHORT_EINT1 */ +#define ARIZONA_IM_SPK1L_SHORT_EINT1 0x1000 /* IM_SPK1L_SHORT_EINT1 */ +#define ARIZONA_IM_SPK1L_SHORT_EINT1_MASK 0x1000 /* IM_SPK1L_SHORT_EINT1 */ +#define ARIZONA_IM_SPK1L_SHORT_EINT1_SHIFT 12 /* IM_SPK1L_SHORT_EINT1 */ +#define ARIZONA_IM_SPK1L_SHORT_EINT1_WIDTH 1 /* IM_SPK1L_SHORT_EINT1 */ +#define ARIZONA_IM_HP3R_SC_NEG_EINT1 0x0800 /* IM_HP3R_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP3R_SC_NEG_EINT1_MASK 0x0800 /* IM_HP3R_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP3R_SC_NEG_EINT1_SHIFT 11 /* IM_HP3R_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP3R_SC_NEG_EINT1_WIDTH 1 /* IM_HP3R_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP3R_SC_POS_EINT1 0x0400 /* IM_HP3R_SC_POS_EINT1 */ +#define ARIZONA_IM_HP3R_SC_POS_EINT1_MASK 0x0400 /* IM_HP3R_SC_POS_EINT1 */ +#define ARIZONA_IM_HP3R_SC_POS_EINT1_SHIFT 10 /* IM_HP3R_SC_POS_EINT1 */ +#define ARIZONA_IM_HP3R_SC_POS_EINT1_WIDTH 1 /* IM_HP3R_SC_POS_EINT1 */ +#define ARIZONA_IM_HP3L_SC_NEG_EINT1 0x0200 /* IM_HP3L_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP3L_SC_NEG_EINT1_MASK 0x0200 /* IM_HP3L_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP3L_SC_NEG_EINT1_SHIFT 9 /* IM_HP3L_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP3L_SC_NEG_EINT1_WIDTH 1 /* IM_HP3L_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP3L_SC_POS_EINT1 0x0100 /* IM_HP3L_SC_POS_EINT1 */ +#define ARIZONA_IM_HP3L_SC_POS_EINT1_MASK 0x0100 /* IM_HP3L_SC_POS_EINT1 */ +#define ARIZONA_IM_HP3L_SC_POS_EINT1_SHIFT 8 /* IM_HP3L_SC_POS_EINT1 */ +#define ARIZONA_IM_HP3L_SC_POS_EINT1_WIDTH 1 /* IM_HP3L_SC_POS_EINT1 */ +#define ARIZONA_IM_HP2R_SC_NEG_EINT1 0x0080 /* IM_HP2R_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP2R_SC_NEG_EINT1_MASK 0x0080 /* IM_HP2R_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP2R_SC_NEG_EINT1_SHIFT 7 /* IM_HP2R_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP2R_SC_NEG_EINT1_WIDTH 1 /* IM_HP2R_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP2R_SC_POS_EINT1 0x0040 /* IM_HP2R_SC_POS_EINT1 */ +#define ARIZONA_IM_HP2R_SC_POS_EINT1_MASK 0x0040 /* IM_HP2R_SC_POS_EINT1 */ +#define ARIZONA_IM_HP2R_SC_POS_EINT1_SHIFT 6 /* IM_HP2R_SC_POS_EINT1 */ +#define ARIZONA_IM_HP2R_SC_POS_EINT1_WIDTH 1 /* IM_HP2R_SC_POS_EINT1 */ +#define ARIZONA_IM_HP2L_SC_NEG_EINT1 0x0020 /* IM_HP2L_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP2L_SC_NEG_EINT1_MASK 0x0020 /* IM_HP2L_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP2L_SC_NEG_EINT1_SHIFT 5 /* IM_HP2L_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP2L_SC_NEG_EINT1_WIDTH 1 /* IM_HP2L_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP2L_SC_POS_EINT1 0x0010 /* IM_HP2L_SC_POS_EINT1 */ +#define ARIZONA_IM_HP2L_SC_POS_EINT1_MASK 0x0010 /* IM_HP2L_SC_POS_EINT1 */ +#define ARIZONA_IM_HP2L_SC_POS_EINT1_SHIFT 4 /* IM_HP2L_SC_POS_EINT1 */ +#define ARIZONA_IM_HP2L_SC_POS_EINT1_WIDTH 1 /* IM_HP2L_SC_POS_EINT1 */ +#define ARIZONA_IM_HP1R_SC_NEG_EINT1 0x0008 /* IM_HP1R_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP1R_SC_NEG_EINT1_MASK 0x0008 /* IM_HP1R_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP1R_SC_NEG_EINT1_SHIFT 3 /* IM_HP1R_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP1R_SC_NEG_EINT1_WIDTH 1 /* IM_HP1R_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP1R_SC_POS_EINT1 0x0004 /* IM_HP1R_SC_POS_EINT1 */ +#define ARIZONA_IM_HP1R_SC_POS_EINT1_MASK 0x0004 /* IM_HP1R_SC_POS_EINT1 */ +#define ARIZONA_IM_HP1R_SC_POS_EINT1_SHIFT 2 /* IM_HP1R_SC_POS_EINT1 */ +#define ARIZONA_IM_HP1R_SC_POS_EINT1_WIDTH 1 /* IM_HP1R_SC_POS_EINT1 */ +#define ARIZONA_IM_HP1L_SC_NEG_EINT1 0x0002 /* IM_HP1L_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP1L_SC_NEG_EINT1_MASK 0x0002 /* IM_HP1L_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP1L_SC_NEG_EINT1_SHIFT 1 /* IM_HP1L_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP1L_SC_NEG_EINT1_WIDTH 1 /* IM_HP1L_SC_NEG_EINT1 */ +#define ARIZONA_IM_HP1L_SC_POS_EINT1 0x0001 /* IM_HP1L_SC_POS_EINT1 */ +#define ARIZONA_IM_HP1L_SC_POS_EINT1_MASK 0x0001 /* IM_HP1L_SC_POS_EINT1 */ +#define ARIZONA_IM_HP1L_SC_POS_EINT1_SHIFT 0 /* IM_HP1L_SC_POS_EINT1 */ +#define ARIZONA_IM_HP1L_SC_POS_EINT1_WIDTH 1 /* IM_HP1L_SC_POS_EINT1 */ + /* * R3343 (0xD0F) - Interrupt Control */ @@ -5455,6 +5712,53 @@ #define ARIZONA_HP1L_DONE_EINT2_SHIFT 0 /* HP1L_DONE_EINT2 */ #define ARIZONA_HP1L_DONE_EINT2_WIDTH 1 /* HP1L_DONE_EINT2 */ +/* + * R3347 (0xD13) - IRQ2 Status 4 (Alternate layout) + * + * Alternate layout used on later devices, note only fields that have moved + * are specified + */ +#define ARIZONA_V2_AIF3_ERR_EINT2 0x8000 /* AIF3_ERR_EINT2 */ +#define ARIZONA_V2_AIF3_ERR_EINT2_MASK 0x8000 /* AIF3_ERR_EINT2 */ +#define ARIZONA_V2_AIF3_ERR_EINT2_SHIFT 15 /* AIF3_ERR_EINT2 */ +#define ARIZONA_V2_AIF3_ERR_EINT2_WIDTH 1 /* AIF3_ERR_EINT2 */ +#define ARIZONA_V2_AIF2_ERR_EINT2 0x4000 /* AIF2_ERR_EINT2 */ +#define ARIZONA_V2_AIF2_ERR_EINT2_MASK 0x4000 /* AIF2_ERR_EINT2 */ +#define ARIZONA_V2_AIF2_ERR_EINT2_SHIFT 14 /* AIF2_ERR_EINT2 */ +#define ARIZONA_V2_AIF2_ERR_EINT2_WIDTH 1 /* AIF2_ERR_EINT2 */ +#define ARIZONA_V2_AIF1_ERR_EINT2 0x2000 /* AIF1_ERR_EINT2 */ +#define ARIZONA_V2_AIF1_ERR_EINT2_MASK 0x2000 /* AIF1_ERR_EINT2 */ +#define ARIZONA_V2_AIF1_ERR_EINT2_SHIFT 13 /* AIF1_ERR_EINT2 */ +#define ARIZONA_V2_AIF1_ERR_EINT2_WIDTH 1 /* AIF1_ERR_EINT2 */ +#define ARIZONA_V2_CTRLIF_ERR_EINT2 0x1000 /* CTRLIF_ERR_EINT2 */ +#define ARIZONA_V2_CTRLIF_ERR_EINT2_MASK 0x1000 /* CTRLIF_ERR_EINT2 */ +#define ARIZONA_V2_CTRLIF_ERR_EINT2_SHIFT 12 /* CTRLIF_ERR_EINT2 */ +#define ARIZONA_V2_CTRLIF_ERR_EINT2_WIDTH 1 /* CTRLIF_ERR_EINT2 */ +#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2 0x0800 /* MIXER_DROPPED_SAMPLE_EINT2 */ +#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2_MASK 0x0800 /* MIXER_DROPPED_SAMPLE_EINT2 */ +#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2_SHIFT 11 /* MIXER_DROPPED_SAMPLE_EINT2 */ +#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2_WIDTH 1 /* MIXER_DROPPED_SAMPLE_EINT2 */ +#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2 0x0400 /* ASYNC_CLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2_MASK 0x0400 /* ASYNC_CLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2_SHIFT 10 /* ASYNC_CLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2_WIDTH 1 /* ASYNC_CLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2 0x0200 /* SYSCLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2_MASK 0x0200 /* SYSCLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2_SHIFT 9 /* SYSCLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2_WIDTH 1 /* SYSCLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_ISRC1_CFG_ERR_EINT2 0x0100 /* ISRC1_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC1_CFG_ERR_EINT2_MASK 0x0100 /* ISRC1_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC1_CFG_ERR_EINT2_SHIFT 8 /* ISRC1_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC1_CFG_ERR_EINT2_WIDTH 1 /* ISRC1_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC2_CFG_ERR_EINT2 0x0080 /* ISRC2_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC2_CFG_ERR_EINT2_MASK 0x0080 /* ISRC2_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC2_CFG_ERR_EINT2_SHIFT 7 /* ISRC2_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC2_CFG_ERR_EINT2_WIDTH 1 /* ISRC2_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC3_CFG_ERR_EINT2 0x0040 /* ISRC3_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC3_CFG_ERR_EINT2_MASK 0x0040 /* ISRC3_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC3_CFG_ERR_EINT2_SHIFT 6 /* ISRC3_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC3_CFG_ERR_EINT2_WIDTH 1 /* ISRC3_CFG_ERR_EINT2 */ + /* * R3348 (0xD14) - IRQ2 Status 5 */ @@ -5479,6 +5783,85 @@ #define ARIZONA_FLL1_CLOCK_OK_EINT2_SHIFT 0 /* FLL1_CLOCK_OK_EINT2 */ #define ARIZONA_FLL1_CLOCK_OK_EINT2_WIDTH 1 /* FLL1_CLOCK_OK_EINT2 */ +/* + * R3348 (0xD14) - IRQ2 Status 5 (Alternate layout) + * + * Alternate layout used on later devices, note only fields that have moved + * are specified + */ +#define ARIZONA_V2_ASRC_CFG_ERR_EINT2 0x0008 /* ASRC_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ASRC_CFG_ERR_EINT2_MASK 0x0008 /* ASRC_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ASRC_CFG_ERR_EINT2_SHIFT 3 /* ASRC_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ASRC_CFG_ERR_EINT2_WIDTH 1 /* ASRC_CFG_ERR_EINT2 */ + +/* + * R3349 (0xD15) - IRQ2 Status 6 + */ +#define ARIZONA_DSP_SHARED_WR_COLL_EINT2 0x8000 /* DSP_SHARED_WR_COLL_EINT2 */ +#define ARIZONA_DSP_SHARED_WR_COLL_EINT2_MASK 0x8000 /* DSP_SHARED_WR_COLL_EINT2 */ +#define ARIZONA_DSP_SHARED_WR_COLL_EINT2_SHIFT 15 /* DSP_SHARED_WR_COLL_EINT2 */ +#define ARIZONA_DSP_SHARED_WR_COLL_EINT2_WIDTH 1 /* DSP_SHARED_WR_COLL_EINT2 */ +#define ARIZONA_SPK_SHUTDOWN_EINT2 0x4000 /* SPK_SHUTDOWN_EINT2 */ +#define ARIZONA_SPK_SHUTDOWN_EINT2_MASK 0x4000 /* SPK_SHUTDOWN_EINT2 */ +#define ARIZONA_SPK_SHUTDOWN_EINT2_SHIFT 14 /* SPK_SHUTDOWN_EINT2 */ +#define ARIZONA_SPK_SHUTDOWN_EINT2_WIDTH 1 /* SPK_SHUTDOWN_EINT2 */ +#define ARIZONA_SPK1R_SHORT_EINT2 0x2000 /* SPK1R_SHORT_EINT2 */ +#define ARIZONA_SPK1R_SHORT_EINT2_MASK 0x2000 /* SPK1R_SHORT_EINT2 */ +#define ARIZONA_SPK1R_SHORT_EINT2_SHIFT 13 /* SPK1R_SHORT_EINT2 */ +#define ARIZONA_SPK1R_SHORT_EINT2_WIDTH 1 /* SPK1R_SHORT_EINT2 */ +#define ARIZONA_SPK1L_SHORT_EINT2 0x1000 /* SPK1L_SHORT_EINT2 */ +#define ARIZONA_SPK1L_SHORT_EINT2_MASK 0x1000 /* SPK1L_SHORT_EINT2 */ +#define ARIZONA_SPK1L_SHORT_EINT2_SHIFT 12 /* SPK1L_SHORT_EINT2 */ +#define ARIZONA_SPK1L_SHORT_EINT2_WIDTH 1 /* SPK1L_SHORT_EINT2 */ +#define ARIZONA_HP3R_SC_NEG_EINT2 0x0800 /* HP3R_SC_NEG_EINT2 */ +#define ARIZONA_HP3R_SC_NEG_EINT2_MASK 0x0800 /* HP3R_SC_NEG_EINT2 */ +#define ARIZONA_HP3R_SC_NEG_EINT2_SHIFT 11 /* HP3R_SC_NEG_EINT2 */ +#define ARIZONA_HP3R_SC_NEG_EINT2_WIDTH 1 /* HP3R_SC_NEG_EINT2 */ +#define ARIZONA_HP3R_SC_POS_EINT2 0x0400 /* HP3R_SC_POS_EINT2 */ +#define ARIZONA_HP3R_SC_POS_EINT2_MASK 0x0400 /* HP3R_SC_POS_EINT2 */ +#define ARIZONA_HP3R_SC_POS_EINT2_SHIFT 10 /* HP3R_SC_POS_EINT2 */ +#define ARIZONA_HP3R_SC_POS_EINT2_WIDTH 1 /* HP3R_SC_POS_EINT2 */ +#define ARIZONA_HP3L_SC_NEG_EINT2 0x0200 /* HP3L_SC_NEG_EINT2 */ +#define ARIZONA_HP3L_SC_NEG_EINT2_MASK 0x0200 /* HP3L_SC_NEG_EINT2 */ +#define ARIZONA_HP3L_SC_NEG_EINT2_SHIFT 9 /* HP3L_SC_NEG_EINT2 */ +#define ARIZONA_HP3L_SC_NEG_EINT2_WIDTH 1 /* HP3L_SC_NEG_EINT2 */ +#define ARIZONA_HP3L_SC_POS_EINT2 0x0100 /* HP3L_SC_POS_EINT2 */ +#define ARIZONA_HP3L_SC_POS_EINT2_MASK 0x0100 /* HP3L_SC_POS_EINT2 */ +#define ARIZONA_HP3L_SC_POS_EINT2_SHIFT 8 /* HP3L_SC_POS_EINT2 */ +#define ARIZONA_HP3L_SC_POS_EINT2_WIDTH 1 /* HP3L_SC_POS_EINT2 */ +#define ARIZONA_HP2R_SC_NEG_EINT2 0x0080 /* HP2R_SC_NEG_EINT2 */ +#define ARIZONA_HP2R_SC_NEG_EINT2_MASK 0x0080 /* HP2R_SC_NEG_EINT2 */ +#define ARIZONA_HP2R_SC_NEG_EINT2_SHIFT 7 /* HP2R_SC_NEG_EINT2 */ +#define ARIZONA_HP2R_SC_NEG_EINT2_WIDTH 1 /* HP2R_SC_NEG_EINT2 */ +#define ARIZONA_HP2R_SC_POS_EINT2 0x0040 /* HP2R_SC_POS_EINT2 */ +#define ARIZONA_HP2R_SC_POS_EINT2_MASK 0x0040 /* HP2R_SC_POS_EINT2 */ +#define ARIZONA_HP2R_SC_POS_EINT2_SHIFT 6 /* HP2R_SC_POS_EINT2 */ +#define ARIZONA_HP2R_SC_POS_EINT2_WIDTH 1 /* HP2R_SC_POS_EINT2 */ +#define ARIZONA_HP2L_SC_NEG_EINT2 0x0020 /* HP2L_SC_NEG_EINT2 */ +#define ARIZONA_HP2L_SC_NEG_EINT2_MASK 0x0020 /* HP2L_SC_NEG_EINT2 */ +#define ARIZONA_HP2L_SC_NEG_EINT2_SHIFT 5 /* HP2L_SC_NEG_EINT2 */ +#define ARIZONA_HP2L_SC_NEG_EINT2_WIDTH 1 /* HP2L_SC_NEG_EINT2 */ +#define ARIZONA_HP2L_SC_POS_EINT2 0x0010 /* HP2L_SC_POS_EINT2 */ +#define ARIZONA_HP2L_SC_POS_EINT2_MASK 0x0010 /* HP2L_SC_POS_EINT2 */ +#define ARIZONA_HP2L_SC_POS_EINT2_SHIFT 4 /* HP2L_SC_POS_EINT2 */ +#define ARIZONA_HP2L_SC_POS_EINT2_WIDTH 1 /* HP2L_SC_POS_EINT2 */ +#define ARIZONA_HP1R_SC_NEG_EINT2 0x0008 /* HP1R_SC_NEG_EINT2 */ +#define ARIZONA_HP1R_SC_NEG_EINT2_MASK 0x0008 /* HP1R_SC_NEG_EINT2 */ +#define ARIZONA_HP1R_SC_NEG_EINT2_SHIFT 3 /* HP1R_SC_NEG_EINT2 */ +#define ARIZONA_HP1R_SC_NEG_EINT2_WIDTH 1 /* HP1R_SC_NEG_EINT2 */ +#define ARIZONA_HP1R_SC_POS_EINT2 0x0004 /* HP1R_SC_POS_EINT2 */ +#define ARIZONA_HP1R_SC_POS_EINT2_MASK 0x0004 /* HP1R_SC_POS_EINT2 */ +#define ARIZONA_HP1R_SC_POS_EINT2_SHIFT 2 /* HP1R_SC_POS_EINT2 */ +#define ARIZONA_HP1R_SC_POS_EINT2_WIDTH 1 /* HP1R_SC_POS_EINT2 */ +#define ARIZONA_HP1L_SC_NEG_EINT2 0x0002 /* HP1L_SC_NEG_EINT2 */ +#define ARIZONA_HP1L_SC_NEG_EINT2_MASK 0x0002 /* HP1L_SC_NEG_EINT2 */ +#define ARIZONA_HP1L_SC_NEG_EINT2_SHIFT 1 /* HP1L_SC_NEG_EINT2 */ +#define ARIZONA_HP1L_SC_NEG_EINT2_WIDTH 1 /* HP1L_SC_NEG_EINT2 */ +#define ARIZONA_HP1L_SC_POS_EINT2 0x0001 /* HP1L_SC_POS_EINT2 */ +#define ARIZONA_HP1L_SC_POS_EINT2_MASK 0x0001 /* HP1L_SC_POS_EINT2 */ +#define ARIZONA_HP1L_SC_POS_EINT2_SHIFT 0 /* HP1L_SC_POS_EINT2 */ +#define ARIZONA_HP1L_SC_POS_EINT2_WIDTH 1 /* HP1L_SC_POS_EINT2 */ + /* * R3352 (0xD18) - IRQ2 Status 1 Mask */ @@ -5647,6 +6030,53 @@ #define ARIZONA_IM_HP1L_DONE_EINT2_SHIFT 0 /* IM_HP1L_DONE_EINT2 */ #define ARIZONA_IM_HP1L_DONE_EINT2_WIDTH 1 /* IM_HP1L_DONE_EINT2 */ +/* + * R3355 (0xD1B) - IRQ2 Status 4 Mask (Alternate layout) + * + * Alternate layout used on later devices, note only fields that have moved + * are specified + */ +#define ARIZONA_V2_IM_AIF3_ERR_EINT2 0x8000 /* IM_AIF3_ERR_EINT2 */ +#define ARIZONA_V2_IM_AIF3_ERR_EINT2_MASK 0x8000 /* IM_AIF3_ERR_EINT2 */ +#define ARIZONA_V2_IM_AIF3_ERR_EINT2_SHIFT 15 /* IM_AIF3_ERR_EINT2 */ +#define ARIZONA_V2_IM_AIF3_ERR_EINT2_WIDTH 1 /* IM_AIF3_ERR_EINT2 */ +#define ARIZONA_V2_IM_AIF2_ERR_EINT2 0x4000 /* IM_AIF2_ERR_EINT2 */ +#define ARIZONA_V2_IM_AIF2_ERR_EINT2_MASK 0x4000 /* IM_AIF2_ERR_EINT2 */ +#define ARIZONA_V2_IM_AIF2_ERR_EINT2_SHIFT 14 /* IM_AIF2_ERR_EINT2 */ +#define ARIZONA_V2_IM_AIF2_ERR_EINT2_WIDTH 1 /* IM_AIF2_ERR_EINT2 */ +#define ARIZONA_V2_IM_AIF1_ERR_EINT2 0x2000 /* IM_AIF1_ERR_EINT2 */ +#define ARIZONA_V2_IM_AIF1_ERR_EINT2_MASK 0x2000 /* IM_AIF1_ERR_EINT2 */ +#define ARIZONA_V2_IM_AIF1_ERR_EINT2_SHIFT 13 /* IM_AIF1_ERR_EINT2 */ +#define ARIZONA_V2_IM_AIF1_ERR_EINT2_WIDTH 1 /* IM_AIF1_ERR_EINT2 */ +#define ARIZONA_V2_IM_CTRLIF_ERR_EINT2 0x1000 /* IM_CTRLIF_ERR_EINT2 */ +#define ARIZONA_V2_IM_CTRLIF_ERR_EINT2_MASK 0x1000 /* IM_CTRLIF_ERR_EINT2 */ +#define ARIZONA_V2_IM_CTRLIF_ERR_EINT2_SHIFT 12 /* IM_CTRLIF_ERR_EINT2 */ +#define ARIZONA_V2_IM_CTRLIF_ERR_EINT2_WIDTH 1 /* IM_CTRLIF_ERR_EINT2 */ +#define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT2 0x0800 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */ +#define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT2_MASK 0x0800 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */ +#define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT2_SHIFT 11 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */ +#define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT2_WIDTH 1 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */ +#define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT2 0x0400 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT2_MASK 0x0400 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT2_SHIFT 10 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT2_WIDTH 1 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT2 0x0200 /* IM_SYSCLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT2_MASK 0x0200 /* IM_SYSCLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT2_SHIFT 9 /* IM_SYSCLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT2_WIDTH 1 /* IM_SYSCLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT2 0x0100 /* IM_ISRC1_CFG_ERR_EINT2 */ +#define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT2_MASK 0x0100 /* IM_ISRC1_CFG_ERR_EINT2 */ +#define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT2_SHIFT 8 /* IM_ISRC1_CFG_ERR_EINT2 */ +#define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT2_WIDTH 1 /* IM_ISRC1_CFG_ERR_EINT2 */ +#define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT2 0x0080 /* IM_ISRC2_CFG_ERR_EINT2 */ +#define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT2_MASK 0x0080 /* IM_ISRC2_CFG_ERR_EINT2 */ +#define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT2_SHIFT 7 /* IM_ISRC2_CFG_ERR_EINT2 */ +#define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT2_WIDTH 1 /* IM_ISRC2_CFG_ERR_EINT2 */ +#define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT2 0x0040 /* IM_ISRC3_CFG_ERR_EINT2 */ +#define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT2_MASK 0x0040 /* IM_ISRC3_CFG_ERR_EINT2 */ +#define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT2_SHIFT 6 /* IM_ISRC3_CFG_ERR_EINT2 */ +#define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT2_WIDTH 1 /* IM_ISRC3_CFG_ERR_EINT2 */ + /* * R3356 (0xD1C) - IRQ2 Status 5 Mask */ @@ -5672,6 +6102,85 @@ #define ARIZONA_IM_FLL1_CLOCK_OK_EINT2_SHIFT 0 /* IM_FLL1_CLOCK_OK_EINT2 */ #define ARIZONA_IM_FLL1_CLOCK_OK_EINT2_WIDTH 1 /* IM_FLL1_CLOCK_OK_EINT2 */ +/* + * R3340 (0xD0C) - Interrupt Status 5 Mask (Alternate layout) + * + * Alternate layout used on later devices, note only fields that have moved + * are specified + */ +#define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT2 0x0008 /* IM_ASRC_CFG_ERR_EINT2 */ +#define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT2_MASK 0x0008 /* IM_ASRC_CFG_ERR_EINT2 */ +#define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT2_SHIFT 3 /* IM_ASRC_CFG_ERR_EINT2 */ +#define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT2_WIDTH 1 /* IM_ASRC_CFG_ERR_EINT2 */ + +/* + * R3357 (0xD1D) - IRQ2 Status 6 Mask + */ +#define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT2 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT2 */ +#define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT2_MASK 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT2 */ +#define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT2_SHIFT 15 /* IM_DSP_SHARED_WR_COLL_EINT2 */ +#define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT2_WIDTH 1 /* IM_DSP_SHARED_WR_COLL_EINT2 */ +#define ARIZONA_IM_SPK_SHUTDOWN_EINT2 0x4000 /* IM_SPK_SHUTDOWN_EINT2 */ +#define ARIZONA_IM_SPK_SHUTDOWN_EINT2_MASK 0x4000 /* IM_SPK_SHUTDOWN_EINT2 */ +#define ARIZONA_IM_SPK_SHUTDOWN_EINT2_SHIFT 14 /* IM_SPK_SHUTDOWN_EINT2 */ +#define ARIZONA_IM_SPK_SHUTDOWN_EINT2_WIDTH 1 /* IM_SPK_SHUTDOWN_EINT2 */ +#define ARIZONA_IM_SPK1R_SHORT_EINT2 0x2000 /* IM_SPK1R_SHORT_EINT2 */ +#define ARIZONA_IM_SPK1R_SHORT_EINT2_MASK 0x2000 /* IM_SPK1R_SHORT_EINT2 */ +#define ARIZONA_IM_SPK1R_SHORT_EINT2_SHIFT 13 /* IM_SPK1R_SHORT_EINT2 */ +#define ARIZONA_IM_SPK1R_SHORT_EINT2_WIDTH 1 /* IM_SPK1R_SHORT_EINT2 */ +#define ARIZONA_IM_SPK1L_SHORT_EINT2 0x1000 /* IM_SPK1L_SHORT_EINT2 */ +#define ARIZONA_IM_SPK1L_SHORT_EINT2_MASK 0x1000 /* IM_SPK1L_SHORT_EINT2 */ +#define ARIZONA_IM_SPK1L_SHORT_EINT2_SHIFT 12 /* IM_SPK1L_SHORT_EINT2 */ +#define ARIZONA_IM_SPK1L_SHORT_EINT2_WIDTH 1 /* IM_SPK1L_SHORT_EINT2 */ +#define ARIZONA_IM_HP3R_SC_NEG_EINT2 0x0800 /* IM_HP3R_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP3R_SC_NEG_EINT2_MASK 0x0800 /* IM_HP3R_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP3R_SC_NEG_EINT2_SHIFT 11 /* IM_HP3R_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP3R_SC_NEG_EINT2_WIDTH 1 /* IM_HP3R_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP3R_SC_POS_EINT2 0x0400 /* IM_HP3R_SC_POS_EINT2 */ +#define ARIZONA_IM_HP3R_SC_POS_EINT2_MASK 0x0400 /* IM_HP3R_SC_POS_EINT2 */ +#define ARIZONA_IM_HP3R_SC_POS_EINT2_SHIFT 10 /* IM_HP3R_SC_POS_EINT2 */ +#define ARIZONA_IM_HP3R_SC_POS_EINT2_WIDTH 1 /* IM_HP3R_SC_POS_EINT2 */ +#define ARIZONA_IM_HP3L_SC_NEG_EINT2 0x0200 /* IM_HP3L_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP3L_SC_NEG_EINT2_MASK 0x0200 /* IM_HP3L_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP3L_SC_NEG_EINT2_SHIFT 9 /* IM_HP3L_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP3L_SC_NEG_EINT2_WIDTH 1 /* IM_HP3L_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP3L_SC_POS_EINT2 0x0100 /* IM_HP3L_SC_POS_EINT2 */ +#define ARIZONA_IM_HP3L_SC_POS_EINT2_MASK 0x0100 /* IM_HP3L_SC_POS_EINT2 */ +#define ARIZONA_IM_HP3L_SC_POS_EINT2_SHIFT 8 /* IM_HP3L_SC_POS_EINT2 */ +#define ARIZONA_IM_HP3L_SC_POS_EINT2_WIDTH 1 /* IM_HP3L_SC_POS_EINT2 */ +#define ARIZONA_IM_HP2R_SC_NEG_EINT2 0x0080 /* IM_HP2R_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP2R_SC_NEG_EINT2_MASK 0x0080 /* IM_HP2R_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP2R_SC_NEG_EINT2_SHIFT 7 /* IM_HP2R_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP2R_SC_NEG_EINT2_WIDTH 1 /* IM_HP2R_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP2R_SC_POS_EINT2 0x0040 /* IM_HP2R_SC_POS_EINT2 */ +#define ARIZONA_IM_HP2R_SC_POS_EINT2_MASK 0x0040 /* IM_HP2R_SC_POS_EINT2 */ +#define ARIZONA_IM_HP2R_SC_POS_EINT2_SHIFT 6 /* IM_HP2R_SC_POS_EINT2 */ +#define ARIZONA_IM_HP2R_SC_POS_EINT2_WIDTH 1 /* IM_HP2R_SC_POS_EINT2 */ +#define ARIZONA_IM_HP2L_SC_NEG_EINT2 0x0020 /* IM_HP2L_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP2L_SC_NEG_EINT2_MASK 0x0020 /* IM_HP2L_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP2L_SC_NEG_EINT2_SHIFT 5 /* IM_HP2L_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP2L_SC_NEG_EINT2_WIDTH 1 /* IM_HP2L_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP2L_SC_POS_EINT2 0x0010 /* IM_HP2L_SC_POS_EINT2 */ +#define ARIZONA_IM_HP2L_SC_POS_EINT2_MASK 0x0010 /* IM_HP2L_SC_POS_EINT2 */ +#define ARIZONA_IM_HP2L_SC_POS_EINT2_SHIFT 4 /* IM_HP2L_SC_POS_EINT2 */ +#define ARIZONA_IM_HP2L_SC_POS_EINT2_WIDTH 1 /* IM_HP2L_SC_POS_EINT2 */ +#define ARIZONA_IM_HP1R_SC_NEG_EINT2 0x0008 /* IM_HP1R_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP1R_SC_NEG_EINT2_MASK 0x0008 /* IM_HP1R_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP1R_SC_NEG_EINT2_SHIFT 3 /* IM_HP1R_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP1R_SC_NEG_EINT2_WIDTH 1 /* IM_HP1R_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP1R_SC_POS_EINT2 0x0004 /* IM_HP1R_SC_POS_EINT2 */ +#define ARIZONA_IM_HP1R_SC_POS_EINT2_MASK 0x0004 /* IM_HP1R_SC_POS_EINT2 */ +#define ARIZONA_IM_HP1R_SC_POS_EINT2_SHIFT 2 /* IM_HP1R_SC_POS_EINT2 */ +#define ARIZONA_IM_HP1R_SC_POS_EINT2_WIDTH 1 /* IM_HP1R_SC_POS_EINT2 */ +#define ARIZONA_IM_HP1L_SC_NEG_EINT2 0x0002 /* IM_HP1L_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP1L_SC_NEG_EINT2_MASK 0x0002 /* IM_HP1L_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP1L_SC_NEG_EINT2_SHIFT 1 /* IM_HP1L_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP1L_SC_NEG_EINT2_WIDTH 1 /* IM_HP1L_SC_NEG_EINT2 */ +#define ARIZONA_IM_HP1L_SC_POS_EINT2 0x0001 /* IM_HP1L_SC_POS_EINT2 */ +#define ARIZONA_IM_HP1L_SC_POS_EINT2_MASK 0x0001 /* IM_HP1L_SC_POS_EINT2 */ +#define ARIZONA_IM_HP1L_SC_POS_EINT2_SHIFT 0 /* IM_HP1L_SC_POS_EINT2 */ +#define ARIZONA_IM_HP1L_SC_POS_EINT2_WIDTH 1 /* IM_HP1L_SC_POS_EINT2 */ + /* * R3359 (0xD1F) - IRQ2 Control */ @@ -5943,6 +6452,10 @@ #define ARIZONA_ADSP2_1_OVERCLOCKED_STS_MASK 0x0008 /* ADSP2_1_OVERCLOCKED_STS */ #define ARIZONA_ADSP2_1_OVERCLOCKED_STS_SHIFT 3 /* ADSP2_1_OVERCLOCKED_STS */ #define ARIZONA_ADSP2_1_OVERCLOCKED_STS_WIDTH 1 /* ADSP2_1_OVERCLOCKED_STS */ +#define ARIZONA_ISRC3_OVERCLOCKED_STS 0x0004 /* ISRC3_OVERCLOCKED_STS */ +#define ARIZONA_ISRC3_OVERCLOCKED_STS_MASK 0x0004 /* ISRC3_OVERCLOCKED_STS */ +#define ARIZONA_ISRC3_OVERCLOCKED_STS_SHIFT 2 /* ISRC3_OVERCLOCKED_STS */ +#define ARIZONA_ISRC3_OVERCLOCKED_STS_WIDTH 1 /* ISRC3_OVERCLOCKED_STS */ #define ARIZONA_ISRC2_OVERCLOCKED_STS 0x0002 /* ISRC2_OVERCLOCKED_STS */ #define ARIZONA_ISRC2_OVERCLOCKED_STS_MASK 0x0002 /* ISRC2_OVERCLOCKED_STS */ #define ARIZONA_ISRC2_OVERCLOCKED_STS_SHIFT 1 /* ISRC2_OVERCLOCKED_STS */ @@ -5971,6 +6484,10 @@ #define ARIZONA_AIF1_UNDERCLOCKED_STS_MASK 0x0100 /* AIF1_UNDERCLOCKED_STS */ #define ARIZONA_AIF1_UNDERCLOCKED_STS_SHIFT 8 /* AIF1_UNDERCLOCKED_STS */ #define ARIZONA_AIF1_UNDERCLOCKED_STS_WIDTH 1 /* AIF1_UNDERCLOCKED_STS */ +#define ARIZONA_ISRC3_UNDERCLOCKED_STS 0x0080 /* ISRC3_UNDERCLOCKED_STS */ +#define ARIZONA_ISRC3_UNDERCLOCKED_STS_MASK 0x0080 /* ISRC3_UNDERCLOCKED_STS */ +#define ARIZONA_ISRC3_UNDERCLOCKED_STS_SHIFT 7 /* ISRC3_UNDERCLOCKED_STS */ +#define ARIZONA_ISRC3_UNDERCLOCKED_STS_WIDTH 1 /* ISRC3_UNDERCLOCKED_STS */ #define ARIZONA_ISRC2_UNDERCLOCKED_STS 0x0040 /* ISRC2_UNDERCLOCKED_STS */ #define ARIZONA_ISRC2_UNDERCLOCKED_STS_MASK 0x0040 /* ISRC2_UNDERCLOCKED_STS */ #define ARIZONA_ISRC2_UNDERCLOCKED_STS_SHIFT 6 /* ISRC2_UNDERCLOCKED_STS */ @@ -6000,6 +6517,74 @@ #define ARIZONA_MIXER_UNDERCLOCKED_STS_SHIFT 0 /* MIXER_UNDERCLOCKED_STS */ #define ARIZONA_MIXER_UNDERCLOCKED_STS_WIDTH 1 /* MIXER_UNDERCLOCKED_STS */ +/* + * R3368 (0xD28) - Interrupt Raw Status 9 + */ +#define ARIZONA_DSP_SHARED_WR_COLL_STS 0x8000 /* DSP_SHARED_WR_COLL_STS */ +#define ARIZONA_DSP_SHARED_WR_COLL_STS_MASK 0x8000 /* DSP_SHARED_WR_COLL_STS */ +#define ARIZONA_DSP_SHARED_WR_COLL_STS_SHIFT 15 /* DSP_SHARED_WR_COLL_STS */ +#define ARIZONA_DSP_SHARED_WR_COLL_STS_WIDTH 1 /* DSP_SHARED_WR_COLL_STS */ +#define ARIZONA_SPK_SHUTDOWN_STS 0x4000 /* SPK_SHUTDOWN_STS */ +#define ARIZONA_SPK_SHUTDOWN_STS_MASK 0x4000 /* SPK_SHUTDOWN_STS */ +#define ARIZONA_SPK_SHUTDOWN_STS_SHIFT 14 /* SPK_SHUTDOWN_STS */ +#define ARIZONA_SPK_SHUTDOWN_STS_WIDTH 1 /* SPK_SHUTDOWN_STS */ +#define ARIZONA_SPK1R_SHORT_STS 0x2000 /* SPK1R_SHORT_STS */ +#define ARIZONA_SPK1R_SHORT_STS_MASK 0x2000 /* SPK1R_SHORT_STS */ +#define ARIZONA_SPK1R_SHORT_STS_SHIFT 13 /* SPK1R_SHORT_STS */ +#define ARIZONA_SPK1R_SHORT_STS_WIDTH 1 /* SPK1R_SHORT_STS */ +#define ARIZONA_SPK1L_SHORT_STS 0x1000 /* SPK1L_SHORT_STS */ +#define ARIZONA_SPK1L_SHORT_STS_MASK 0x1000 /* SPK1L_SHORT_STS */ +#define ARIZONA_SPK1L_SHORT_STS_SHIFT 12 /* SPK1L_SHORT_STS */ +#define ARIZONA_SPK1L_SHORT_STS_WIDTH 1 /* SPK1L_SHORT_STS */ +#define ARIZONA_HP3R_SC_NEG_STS 0x0800 /* HP3R_SC_NEG_STS */ +#define ARIZONA_HP3R_SC_NEG_STS_MASK 0x0800 /* HP3R_SC_NEG_STS */ +#define ARIZONA_HP3R_SC_NEG_STS_SHIFT 11 /* HP3R_SC_NEG_STS */ +#define ARIZONA_HP3R_SC_NEG_STS_WIDTH 1 /* HP3R_SC_NEG_STS */ +#define ARIZONA_HP3R_SC_POS_STS 0x0400 /* HP3R_SC_POS_STS */ +#define ARIZONA_HP3R_SC_POS_STS_MASK 0x0400 /* HP3R_SC_POS_STS */ +#define ARIZONA_HP3R_SC_POS_STS_SHIFT 10 /* HP3R_SC_POS_STS */ +#define ARIZONA_HP3R_SC_POS_STS_WIDTH 1 /* HP3R_SC_POS_STS */ +#define ARIZONA_HP3L_SC_NEG_STS 0x0200 /* HP3L_SC_NEG_STS */ +#define ARIZONA_HP3L_SC_NEG_STS_MASK 0x0200 /* HP3L_SC_NEG_STS */ +#define ARIZONA_HP3L_SC_NEG_STS_SHIFT 9 /* HP3L_SC_NEG_STS */ +#define ARIZONA_HP3L_SC_NEG_STS_WIDTH 1 /* HP3L_SC_NEG_STS */ +#define ARIZONA_HP3L_SC_POS_STS 0x0100 /* HP3L_SC_POS_STS */ +#define ARIZONA_HP3L_SC_POS_STS_MASK 0x0100 /* HP3L_SC_POS_STS */ +#define ARIZONA_HP3L_SC_POS_STS_SHIFT 8 /* HP3L_SC_POS_STS */ +#define ARIZONA_HP3L_SC_POS_STS_WIDTH 1 /* HP3L_SC_POS_STS */ +#define ARIZONA_HP2R_SC_NEG_STS 0x0080 /* HP2R_SC_NEG_STS */ +#define ARIZONA_HP2R_SC_NEG_STS_MASK 0x0080 /* HP2R_SC_NEG_STS */ +#define ARIZONA_HP2R_SC_NEG_STS_SHIFT 7 /* HP2R_SC_NEG_STS */ +#define ARIZONA_HP2R_SC_NEG_STS_WIDTH 1 /* HP2R_SC_NEG_STS */ +#define ARIZONA_HP2R_SC_POS_STS 0x0040 /* HP2R_SC_POS_STS */ +#define ARIZONA_HP2R_SC_POS_STS_MASK 0x0040 /* HP2R_SC_POS_STS */ +#define ARIZONA_HP2R_SC_POS_STS_SHIFT 6 /* HP2R_SC_POS_STS */ +#define ARIZONA_HP2R_SC_POS_STS_WIDTH 1 /* HP2R_SC_POS_STS */ +#define ARIZONA_HP2L_SC_NEG_STS 0x0020 /* HP2L_SC_NEG_STS */ +#define ARIZONA_HP2L_SC_NEG_STS_MASK 0x0020 /* HP2L_SC_NEG_STS */ +#define ARIZONA_HP2L_SC_NEG_STS_SHIFT 5 /* HP2L_SC_NEG_STS */ +#define ARIZONA_HP2L_SC_NEG_STS_WIDTH 1 /* HP2L_SC_NEG_STS */ +#define ARIZONA_HP2L_SC_POS_STS 0x0010 /* HP2L_SC_POS_STS */ +#define ARIZONA_HP2L_SC_POS_STS_MASK 0x0010 /* HP2L_SC_POS_STS */ +#define ARIZONA_HP2L_SC_POS_STS_SHIFT 4 /* HP2L_SC_POS_STS */ +#define ARIZONA_HP2L_SC_POS_STS_WIDTH 1 /* HP2L_SC_POS_STS */ +#define ARIZONA_HP1R_SC_NEG_STS 0x0008 /* HP1R_SC_NEG_STS */ +#define ARIZONA_HP1R_SC_NEG_STS_MASK 0x0008 /* HP1R_SC_NEG_STS */ +#define ARIZONA_HP1R_SC_NEG_STS_SHIFT 3 /* HP1R_SC_NEG_STS */ +#define ARIZONA_HP1R_SC_NEG_STS_WIDTH 1 /* HP1R_SC_NEG_STS */ +#define ARIZONA_HP1R_SC_POS_STS 0x0004 /* HP1R_SC_POS_STS */ +#define ARIZONA_HP1R_SC_POS_STS_MASK 0x0004 /* HP1R_SC_POS_STS */ +#define ARIZONA_HP1R_SC_POS_STS_SHIFT 2 /* HP1R_SC_POS_STS */ +#define ARIZONA_HP1R_SC_POS_STS_WIDTH 1 /* HP1R_SC_POS_STS */ +#define ARIZONA_HP1L_SC_NEG_STS 0x0002 /* HP1L_SC_NEG_STS */ +#define ARIZONA_HP1L_SC_NEG_STS_MASK 0x0002 /* HP1L_SC_NEG_STS */ +#define ARIZONA_HP1L_SC_NEG_STS_SHIFT 1 /* HP1L_SC_NEG_STS */ +#define ARIZONA_HP1L_SC_NEG_STS_WIDTH 1 /* HP1L_SC_NEG_STS */ +#define ARIZONA_HP1L_SC_POS_STS 0x0001 /* HP1L_SC_POS_STS */ +#define ARIZONA_HP1L_SC_POS_STS_MASK 0x0001 /* HP1L_SC_POS_STS */ +#define ARIZONA_HP1L_SC_POS_STS_SHIFT 0 /* HP1L_SC_POS_STS */ +#define ARIZONA_HP1L_SC_POS_STS_WIDTH 1 /* HP1L_SC_POS_STS */ + /* * R3392 (0xD40) - IRQ Pin Status */ From db895b2c3ecc2cb8456150ff366816923007a5ad Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 26 Feb 2014 15:54:18 +0000 Subject: [PATCH 0420/1167] mfd: arizona: Add missing handling for ISRC3 under/overclocked Some parts have a third ISRC, this patch adds handling for the under and overclocked interrupts from this ISRC. Change-Id: Id759b5b826bb4b71157d5cbdd89f99f3e8bdbed8 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 76fc4a5ea84..af767c766d7 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -215,6 +215,8 @@ static irqreturn_t arizona_underclocked(int irq, void *data) dev_err(arizona->dev, "AIF2 underclocked\n"); if (val & ARIZONA_AIF1_UNDERCLOCKED_STS) dev_err(arizona->dev, "AIF1 underclocked\n"); + if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS) + dev_err(arizona->dev, "ISRC3 underclocked\n"); if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS) dev_err(arizona->dev, "ISRC2 underclocked\n"); if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS) @@ -295,6 +297,8 @@ static irqreturn_t arizona_overclocked(int irq, void *data) dev_err(arizona->dev, "ASRC sync WARP overclocked\n"); if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS) dev_err(arizona->dev, "DSP1 overclocked\n"); + if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS) + dev_err(arizona->dev, "ISRC3 overclocked\n"); if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS) dev_err(arizona->dev, "ISRC2 overclocked\n"); if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) From b674795dbd8aeac854a0148c220184c327f99f1a Mon Sep 17 00:00:00 2001 From: JS Park Date: Thu, 14 Aug 2014 10:02:52 +0100 Subject: [PATCH 0421/1167] ASoC: florida: add missing mutex_destroy Change-Id: I69a2893a386f97e5c0f44dc7e9fb357b5f8cc095 Signed-off-by: JS Park Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index b5bcb47a2ee..21fe85a5171 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2283,7 +2283,7 @@ static int florida_probe(struct platform_device *pdev) ret = wm_adsp2_init(&florida->core.adsp[i], &florida->fw_lock); if (ret != 0) - return ret; + goto error; } for (i = 0; i < ARRAY_SIZE(florida->fll); i++) @@ -2324,15 +2324,25 @@ static int florida_probe(struct platform_device *pdev) snd_soc_unregister_platform(&pdev->dev); } + return ret; + error: + mutex_destroy(&florida->compr_info.lock); + mutex_destroy(&florida->fw_lock); + return ret; } static int florida_remove(struct platform_device *pdev) { + struct florida_priv *florida = platform_get_drvdata(pdev); + snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); + mutex_destroy(&florida->compr_info.lock); + mutex_destroy(&florida->fw_lock); + return 0; } From 8e320dd6a4011f26bb5e053d4e5edd82612d8201 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 19 Aug 2014 14:47:12 +0100 Subject: [PATCH 0422/1167] mfd: wm8998: Rename speaker overheat interrupt The speaker overheating interupt is now named overheat rather than the older shutdown name. This was introduced by this patch, which wasn't updated to include the wm8998. commit 7f37008fe6ae2f2712dc444f80521990c72b46d5 mfd: arizona: Rename thermal shutdown interrupt Signed-off-by: Charles Keepax --- drivers/mfd/wm8998-tables.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/mfd/wm8998-tables.c b/drivers/mfd/wm8998-tables.c index 710deed15ed..d3e3e931bed 100644 --- a/drivers/mfd/wm8998-tables.c +++ b/drivers/mfd/wm8998-tables.c @@ -80,11 +80,11 @@ static const struct regmap_irq wm8998_irqs[ARIZONA_NUM_IRQ] = { [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 }, [ARIZONA_IRQ_GP1] = { .reg_offset = 0, .mask = ARIZONA_GP1_EINT1 }, - [ARIZONA_IRQ_SPK_SHUTDOWN_WARN] = { - .reg_offset = 2, .mask = ARIZONA_SPK_SHUTDOWN_WARN_EINT1 + [ARIZONA_IRQ_SPK_OVERHEAT_WARN] = { + .reg_offset = 2, .mask = ARIZONA_SPK_OVERHEAT_WARN_EINT1 }, - [ARIZONA_IRQ_SPK_SHUTDOWN] = { - .reg_offset = 2, .mask = ARIZONA_SPK_SHUTDOWN_EINT1 + [ARIZONA_IRQ_SPK_OVERHEAT] = { + .reg_offset = 2, .mask = ARIZONA_SPK_OVERHEAT_EINT1 }, [ARIZONA_IRQ_HPDET] = { .reg_offset = 2, .mask = ARIZONA_HPDET_EINT1 From ddea95dcc82cd8d2cf41c9c2b7b132ddfb939c01 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 11 Jun 2014 16:41:53 +0100 Subject: [PATCH 0423/1167] Documentation: Add WM8998 to Wolfson arizona feature list Change-Id: Ica65d8716f46acd5ca6aa4fcb8d5db5c06aec167 Signed-off-by: Richard Fitzgerald --- .../sound/alsa/soc/wolfson-arizona.txt | 186 ++++++++++++------ 1 file changed, 123 insertions(+), 63 deletions(-) diff --git a/Documentation/sound/alsa/soc/wolfson-arizona.txt b/Documentation/sound/alsa/soc/wolfson-arizona.txt index 882f365822d..f17f3d1782e 100644 --- a/Documentation/sound/alsa/soc/wolfson-arizona.txt +++ b/Documentation/sound/alsa/soc/wolfson-arizona.txt @@ -1,73 +1,75 @@ This document lists the features of the Wolfson 'Arizona' class audio hubs -supported by the kernel drivers (WM8997, WM5102, WM8280, WM8281). Note that -some features are covered by other classes of driver (extcon, regulator, etc.) -and this list below shows the full set of features related to sound: +supported by the kernel drivers (WM8997, WM8998, WM5102, WM8280, WM8281). +Note that some features are covered by other classes of driver (extcon, +regulator, etc.) and this list below shows the full set of features related +to sound: '-' means not relevant for that audio hub model - -Feature WM8997 WM5102 WM8280 WM8281 + WM8280 +Feature WM8997 WM8998 WM5102 WM8281 --------------------------------------------------------------------------------- -24-bit samples Y Y Y Y -192kHz sample rate Y Y Y Y -Routing controlled via ALSA controls Y Y Y Y -Volume control on all mixer inputs Y Y Y Y -Volume control on all outputs Y Y Y Y -Mute control on all outputs Y Y Y Y -Output DRE control - Y Y Y -Output OSR control Y Y Y Y -Input ramp control Y Y Y Y -Output ramp control Y Y Y Y -Route any audio input to any mixer input Y Y Y Y -Route internal signals to mixer inputs Y Y Y Y -Route audio path through ISRC Y Y Y Y -Route audio path through ASRC - Y Y Y -Route audio path through EQs Y Y Y Y -Route audio path through low/high pass filters Y Y Y Y -Route audio path through DRCs Y Y Y Y -Route audio path through ADSP cores - Y Y Y -Set EQ coefficient through ALSA controls Y Y Y Y -Set low/high pass filter coeffs through ALSA controls Y Y Y Y -Set DRC coefficient through ALSA controls Y Y Y Y -Noise Gates controlled via ALSA controls Y Y Y Y -Configure inputs as analogue or digital mic [note 1] Y Y Y Y +24-bit samples Y Y Y Y +192kHz sample rate Y Y Y Y +Routing controlled via ALSA controls Y Y Y Y +Volume control on all mixer inputs Y Y Y Y +Volume control on all outputs Y Y Y Y +Mute control on all outputs Y Y Y Y +Output DRE control - Y Y Y +Output OSR control Y - Y Y +Input ramp control Y Y Y Y +Output ramp control Y Y Y Y +Route any audio input to any mixer input Y Y Y Y +Route internal signals to mixer inputs Y Y Y Y +Route audio path through ISRC Y Y Y Y +Route audio path through ASRC - Y Y Y +Route audio path through EQs Y Y Y Y +Route audio path through low/high pass filters Y Y Y Y +Route audio path through DRCs Y Y Y Y +Route audio path through ADSP cores - - Y Y +Set EQ coefficient through ALSA controls Y Y Y Y +Set low/high pass filter coeffs through ALSA controls Y Y Y Y +Set DRC coefficient through ALSA controls Y Y Y Y +Noise Gates controlled via ALSA controls Y Y Y Y +Configure inputs as analogue or digital mic [note 1] Y Y Y Y +Input mux controls [note 9] - Y - - Config analogue inputs as single-ended - or differential [note 1] Y Y Y Y -Host I2S routing to any AIF Y Y Y Y -I2S TDM (multi-channel) [note 2] Y Y Y Y -Configure TDM slot order N N N N -AEC loopback control Y Y Y Y -ANC block control [note 8] - - N N -Configure ADSP firmware for each ADSP core [note 3] - Y Y Y -Runtime-configurable ADSP firmware selection [note 6] - Y Y Y -Auto-load ADSP firmware when ADSP is in audio path - Y Y Y -Load algorithm tuning data with firmware - Y Y Y -Control firmware coefficients via ALSA controls - Y Y Y -Connect Noise Generator to any mixer input Y Y Y Y -Connect Tone Generator 1/2 to any mixer input Y Y Y Y -Configure sample-rate domain frequencies [note 4] Y Y Y Y -Auto sample-rate N N N N -Speaker short-circuit protection - N N N -Use write sequencer N N N N -Codec control over SPI - Y Y Y -Codec control over I2C Y Y Y Y -DAPM-based power up/down Y Y Y Y -Jack insert detection Y Y Y Y -Headset mic detection Y Y Y Y -Headset button detection Y Y Y Y -Headphone speaker impedance detection Y Y Y Y -Codec internal LDOVDD regulator control Y Y Y Y -Support for external LDO regulator Y Y Y Y -Build as loadable module Y Y Y Y -Configure via pdata Y Y Y Y -Configure via device tree [note 7] Y Y Y Y -Configure SYSCLK rate [note 5] Y Y Y Y -Configure ASYNCCLK rate [note 5] Y Y Y Y -Configure analogue mic bias [note 1] Y Y Y Y + or differential [note 1] Y Y Y Y +Host I2S routing to any AIF Y Y Y Y +I2S TDM (multi-channel) [note 2] Y Y Y Y +Configure TDM slot order N N N N +AEC loopback control Y Y Y Y +ANC block control [note 8] - - - N +Configure ADSP firmware for each ADSP core [note 3] - - Y Y +Runtime-configurable ADSP firmware selection [note 6] - - Y Y +Auto-load ADSP firmware when ADSP is in audio path - - Y Y +Load algorithm tuning data with firmware - - Y Y +Control firmware coefficients via ALSA controls - - Y Y +Connect Noise Generator to any mixer input Y Y Y Y +Connect Tone Generator 1/2 to any mixer input Y Y Y Y +Configure sample-rate domain frequencies [note 4] Y Y Y Y +Auto sample-rate N N N N +Speaker short-circuit protection - N N N +Use write sequencer N N N N +Codec control over SPI - - Y Y +Codec control over I2C Y Y Y Y +DAPM-based power up/down Y Y Y Y +Jack insert detection Y Y Y Y +Headset mic detection Y Y Y Y +Headset button detection Y Y Y Y +Headphone speaker impedance detection Y Y Y Y +Codec internal LDOVDD regulator control Y Y Y Y +Support for external DCVDD regulator Y Y Y Y +Build as loadable module Y Y Y Y +Configure via pdata Y Y Y Y +Configure via device tree [note 7] Y Y Y Y +Configure SYSCLK rate [note 5] Y Y Y Y +Configure ASYNCCLK rate [note 5] Y Y Y Y +Configure analogue mic bias [note 1] Y Y Y Y Configure mapping of headset button resistance - to key event [note 1] Y Y Y Y -Support Ez2Control - N Y Y -Support trace firmware - - Y Y + to key event [note 1] Y Y Y Y +Support Ez2Control - - N Y +Support trace firmware - - - Y Notes: 1. Integration-time configuration. Not possible to change at runtime @@ -83,3 +85,61 @@ Notes: pdata settings that have not yet been migrated to device tree 8. The ANC is normally used by ADSP firmwares and there is currently no support for using it directly from the host +9. See below for a description of the input mux routing on WM8998. The input + mux should be set _before_ connecting it into an audio path. If one + input is configured as digital, that setting will be applied only when + the input is powered up as part of an active audio route - the + digital/analogue setting of the input path cannot be changed while the + input is part of an active audio route. + + +INPUT MUXES ON WM8998 +===================== +The WM8998 has two physical input paths, IN1 and IN2, and both paths have an +input mux to select between two possible external input sources for that +path. + + - The IN1 path can be selected between IN1A or IN1B pins. The left and right + channels have separate mux controls + + - The IN2 path can be selected between IN2A or IN2B and is mono + +A diagram of the route through the input muxes is: + +Input pin ALSA control Internal signal path +------------------------------------------------------- + + +-----------------+ +IN1AL ---> | | + | "IN1MUXL Input" | --> IN1L +IN1BL ---> | | + +-----------------+ + + +-----------------+ +IN1AR ---> | | + | "IN1MUXR Input" | --> IN1R +IN1BR ---> | | + +-----------------+ + + +-----------------+ +IN2A ---> | | + | "IN2MUX Input" | --> IN2L +IN2B ---> | | + +-----------------+ + +IN1A and IN2A can be set as digital. IN1B and IN2B are analogue only. + +It is important to note that although the left and right paths of IN1 have +separate mux controls, these only separate for the analogue path. The setting +of digital/analogue applies jointly to both channels of IN1. Because of this, +if IN1A is digital _both_ the left and right mux must be set to IN1A before +connecting the input to any internal codec blocks. When IN1 is part of an +active path the whole of IN1 will be set to digital or analogue depending on +mux setting and this cannot be changed while IN1 is part of an active path. + +To change from a digital IN1A to an analogue IN1B follow this sequence: + +1) Disconnect IN1 from the input of any codec blocks +2) Change the IN1MUXL and IN1MUXR to IN1B +3) Connect IN1 as an input to codec blocks + From 9b1b02a3d73aa6dfd10aa4d8d3815895e18b0d0b Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 6 Aug 2014 13:47:51 +0100 Subject: [PATCH 0424/1167] Documentation: Updates to Wolfson arizona audio hub information Change-Id: I1607033ab377d6d7351ad77139c88d0670a66ab4 Signed-off-by: Richard Fitzgerald --- .../sound/alsa/soc/wolfson-arizona.txt | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/Documentation/sound/alsa/soc/wolfson-arizona.txt b/Documentation/sound/alsa/soc/wolfson-arizona.txt index f17f3d1782e..da2f6d718fa 100644 --- a/Documentation/sound/alsa/soc/wolfson-arizona.txt +++ b/Documentation/sound/alsa/soc/wolfson-arizona.txt @@ -32,14 +32,15 @@ Set low/high pass filter coeffs through ALSA controls Y Y Y Y Set DRC coefficient through ALSA controls Y Y Y Y Noise Gates controlled via ALSA controls Y Y Y Y Configure inputs as analogue or digital mic [note 1] Y Y Y Y -Input mux controls [note 9] - Y - - +Input mux controls [note 8] - Y - - Config analogue inputs as single-ended or differential [note 1] Y Y Y Y Host I2S routing to any AIF Y Y Y Y I2S TDM (multi-channel) [note 2] Y Y Y Y -Configure TDM slot order N N N N +Configure TDM active slots [note 2] Y Y Y Y +Configure TDM slot size [note 2] Y Y Y Y AEC loopback control Y Y Y Y -ANC block control [note 8] - - - N +ANC block control - - - Y Configure ADSP firmware for each ADSP core [note 3] - - Y Y Runtime-configurable ADSP firmware selection [note 6] - - Y Y Auto-load ADSP firmware when ADSP is in audio path - - Y Y @@ -73,7 +74,12 @@ Support trace firmware - - - Y Notes: 1. Integration-time configuration. Not possible to change at runtime -2. TDM is only possible if host I2S controller and driver support TDM +2. TDM is only possible if host I2S controller and I2S driver support TDM + The set_tdm_slot() function is implemented to enable configuration of the + slot size and which slots the codec will use. Codec channels are mapped in + ascending order to the active slots - for example if the active TX slots in + the I2S frame are 0, 1, and 7 then they will be mapped + 0->AIFTX1 1->AIFTX2 7->AIFTX3 3. Currently limited to set of known firmwares 4. Limited control of domain 2/3 frequency 5. Configured in ASoC machine driver @@ -83,9 +89,7 @@ Notes: active path 7. Configuration from device tree is work-in-progress so there may be some pdata settings that have not yet been migrated to device tree -8. The ANC is normally used by ADSP firmwares and there is currently no support - for using it directly from the host -9. See below for a description of the input mux routing on WM8998. The input +8. See below for a description of the input mux routing on WM8998. The input mux should be set _before_ connecting it into an audio path. If one input is configured as digital, that setting will be applied only when the input is powered up as part of an active audio route - the From de99506ba0f0946ffc5898ea4e5fb68839b30a24 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 27 Nov 2013 11:34:56 +0000 Subject: [PATCH 0425/1167] ASoC: wm_adsp: Remove work around for firmware bug We no longer need to avoid fully emptying the circular buffer on the DSP. Change-Id: I0c6eda75d1920c0c66e9ee9150ddd8771debbec3 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index e82d3105e00..a286015d4e8 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2649,9 +2649,6 @@ static int wm_adsp_capture_block(struct wm_adsp *adsp, int *avail) read_index = sign_extend32(next_read_index, 23); write_index = sign_extend32(next_write_index, 23); - /* Don't empty the buffer as it kills the firmware */ - write_index--; - if (read_index < 0) return -EIO; /* stream has not yet started */ From 28fb5c2c218f321462b72d98a99d54b5d8976f4c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 14 Aug 2014 13:52:34 +0100 Subject: [PATCH 0426/1167] mfd: florida: Remove default for volatile register There is no point in having a default for Mic Detect 4 as it is a volatile register and marked as such. Change-Id: I01efdbd8bab3d165e523b29059ce8237f15b7e97 Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 23bca485b38..abd5517c063 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -766,7 +766,6 @@ static const struct reg_default florida_reg_default[] = { { 0x000002A7, 0x372C }, /* R679 - Mic Detect Level 2 */ { 0x000002A8, 0x1422 }, /* R680 - Mic Detect Level 3 */ { 0x000002A9, 0x300A }, /* R681 - Mic Detect Level 4 */ - { 0x000002AB, 0x0000 }, /* R683 - Mic Detect 4 */ { 0x000002C3, 0x0000 }, /* R707 - Mic noise mix control 1 */ { 0x000002CB, 0x0000 }, /* R715 - Isolation control */ { 0x000002D3, 0x0000 }, /* R723 - Jack detect analogue */ From ff8616b05c82df3863021e08997b2b8aaee957a9 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 14 Jul 2014 16:12:49 +0100 Subject: [PATCH 0427/1167] mfd: arizona: Document HP_CTRL_1L and HP_CTRL_1R registers These registers are documented in the datasheet and used as part of the extcon driver. Expose them properly through regmap as the datasheet notes they should be treated as volatile do so. Change-Id: I42a8390d6ce03bb521177526c7facca539df6eb5 Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 2 ++ drivers/mfd/wm5102-tables.c | 6 ++-- include/linux/mfd/arizona/registers.h | 40 +++++++++++++++++++++++++++ 3 files changed, 46 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index abd5517c063..2bfded22754 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -3060,6 +3060,8 @@ static bool florida_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: case ARIZONA_MIC_DETECT_3: case ARIZONA_MIC_DETECT_4: + case ARIZONA_HP_CTRL_1L: + case ARIZONA_HP_CTRL_1R: case ARIZONA_HEADPHONE_DETECT_2: case ARIZONA_INPUT_ENABLES_STATUS: case ARIZONA_OUTPUT_STATUS_1: diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index 404722d3225..c09bf87d71e 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -412,8 +412,6 @@ static const struct reg_default wm5102_reg_default[] = { { 0x00000218, 0x01A6 }, /* R536 - Mic Bias Ctrl 1 */ { 0x00000219, 0x01A6 }, /* R537 - Mic Bias Ctrl 2 */ { 0x0000021A, 0x01A6 }, /* R538 - Mic Bias Ctrl 3 */ - { 0x00000225, 0x0400 }, /* R549 - HP Ctrl 1L */ - { 0x00000226, 0x0400 }, /* R550 - HP Ctrl 1R */ { 0x00000293, 0x0000 }, /* R659 - Accessory Detect Mode 1 */ { 0x0000029B, 0x0020 }, /* R667 - Headphone Detect 1 */ { 0x0000029C, 0x0000 }, /* R668 - Headphone Detect 2 */ @@ -1187,6 +1185,8 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_MIC_BIAS_CTRL_1: case ARIZONA_MIC_BIAS_CTRL_2: case ARIZONA_MIC_BIAS_CTRL_3: + case ARIZONA_HP_CTRL_1L: + case ARIZONA_HP_CTRL_1R: case ARIZONA_ACCESSORY_DETECT_MODE_1: case ARIZONA_HEADPHONE_DETECT_1: case ARIZONA_HEADPHONE_DETECT_2: @@ -2023,6 +2023,8 @@ static bool wm5102_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_DSP1_SCRATCH_1: case ARIZONA_DSP1_SCRATCH_2: case ARIZONA_DSP1_SCRATCH_3: + case ARIZONA_HP_CTRL_1L: + case ARIZONA_HP_CTRL_1R: case ARIZONA_HEADPHONE_DETECT_2: case ARIZONA_HP_DACVAL: case ARIZONA_MIC_DETECT_3: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index e2db2834e13..c4adb160366 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -2294,6 +2294,46 @@ #define ARIZONA_MICB3_ENA_SHIFT 0 /* MICB3_ENA */ #define ARIZONA_MICB3_ENA_WIDTH 1 /* MICB3_ENA */ +/* + * R549 (0x225) - HP Ctrl 1L + */ +#define ARIZONA_RMV_SHRT_HP1L 0x4000 /* RMV_SHRT_HP1L */ +#define ARIZONA_RMV_SHRT_HP1L_MASK 0x4000 /* RMV_SHRT_HP1L */ +#define ARIZONA_RMV_SHRT_HP1L_SHIFT 14 /* RMV_SHRT_HP1L */ +#define ARIZONA_RMV_SHRT_HP1L_WIDTH 1 /* RMV_SHRT_HP1L */ +#define ARIZONA_HP1L_FLWR 0x0004 /* HP1L_FLWR */ +#define ARIZONA_HP1L_FLWR_MASK 0x0004 /* HP1L_FLWR */ +#define ARIZONA_HP1L_FLWR_SHIFT 2 /* HP1L_FLWR */ +#define ARIZONA_HP1L_FLWR_WIDTH 1 /* HP1L_FLWR */ +#define ARIZONA_HP1L_SHRTI 0x0002 /* HP1L_SHRTI */ +#define ARIZONA_HP1L_SHRTI_MASK 0x0002 /* HP1L_SHRTI */ +#define ARIZONA_HP1L_SHRTI_SHIFT 1 /* HP1L_SHRTI */ +#define ARIZONA_HP1L_SHRTI_WIDTH 1 /* HP1L_SHRTI */ +#define ARIZONA_HP1L_SHRTO 0x0001 /* HP1L_SHRTO */ +#define ARIZONA_HP1L_SHRTO_MASK 0x0001 /* HP1L_SHRTO */ +#define ARIZONA_HP1L_SHRTO_SHIFT 0 /* HP1L_SHRTO */ +#define ARIZONA_HP1L_SHRTO_WIDTH 1 /* HP1L_SHRTO */ + +/* + * R550 (0x226) - HP Ctrl 1R + */ +#define ARIZONA_RMV_SHRT_HP1R 0x4000 /* RMV_SHRT_HP1R */ +#define ARIZONA_RMV_SHRT_HP1R_MASK 0x4000 /* RMV_SHRT_HP1R */ +#define ARIZONA_RMV_SHRT_HP1R_SHIFT 14 /* RMV_SHRT_HP1R */ +#define ARIZONA_RMV_SHRT_HP1R_WIDTH 1 /* RMV_SHRT_HP1R */ +#define ARIZONA_HP1R_FLWR 0x0004 /* HP1R_FLWR */ +#define ARIZONA_HP1R_FLWR_MASK 0x0004 /* HP1R_FLWR */ +#define ARIZONA_HP1R_FLWR_SHIFT 2 /* HP1R_FLWR */ +#define ARIZONA_HP1R_FLWR_WIDTH 1 /* HP1R_FLWR */ +#define ARIZONA_HP1R_SHRTI 0x0002 /* HP1R_SHRTI */ +#define ARIZONA_HP1R_SHRTI_MASK 0x0002 /* HP1R_SHRTI */ +#define ARIZONA_HP1R_SHRTI_SHIFT 1 /* HP1R_SHRTI */ +#define ARIZONA_HP1R_SHRTI_WIDTH 1 /* HP1R_SHRTI */ +#define ARIZONA_HP1R_SHRTO 0x0001 /* HP1R_SHRTO */ +#define ARIZONA_HP1R_SHRTO_MASK 0x0001 /* HP1R_SHRTO */ +#define ARIZONA_HP1R_SHRTO_SHIFT 0 /* HP1R_SHRTO */ +#define ARIZONA_HP1R_SHRTO_WIDTH 1 /* HP1R_SHRTO */ + /* * R659 (0x293) - Accessory Detect Mode 1 */ From e57c531461f9ed1ecc0da5780aa88cfd88090957 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 29 May 2014 16:27:51 +0100 Subject: [PATCH 0428/1167] extcon: arizona: Remove duplicate set of input parent device devm_input_allocate_device already sets the parent device to be that passed to it, we also set this manually in arizona_extcon_probe. This patch removes the redundant set from arizona_extcon_probe. Signed-off-by: Charles Keepax Signed-off-by: Chanwoo Choi (cherry picked from commit 5a8844b596d5a6008b14d2677b426ac7ed7d260b) Change-Id: I77d9a54f313603258f8f2e913684265c7a101952 Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 6bb05c5624e..eac5138f70f 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -1367,7 +1367,6 @@ static int arizona_extcon_probe(struct platform_device *pdev) info->input->name = "Headset"; info->input->phys = "arizona/extcon"; - info->input->dev.parent = &pdev->dev; if (pdata->num_micd_configs) { info->micd_modes = pdata->micd_configs; From 273970dcdaaf0c10f002efb42915b874afd60318 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 18 Jul 2014 12:59:00 +0100 Subject: [PATCH 0429/1167] extcon: arizona: Get MICVDD against extcon device Previously we would do a regulator get against the main Arizona device to obtain the MICVDD regulator. Arizona is an MFD device and normally MICVDD will be supplied by one of its children (the arizona-micsupp regulator). As devres destruction for the MFD device will run after all its children have been destroyed, the regulator will be destroyed before devres calls regulator_put. This causes a warning from both the destruction of the child node, as the regulator is still open, and from the put of the regulator as the regulator device has already been destroyed. A simple fix here is to get the regulator against the extcon device itself such that devres runs when the child is destroyed. This has the additional benefit that if for some reason the extcon driver is unloaded the regulator reference won't hang around until the MFD is unloaded. Signed-off-by: Charles Keepax Signed-off-by: Chanwoo Choi (cherry picked from commit 17271f608bf818a13b2c235d45258311308d5b03) Change-Id: I03c9a16d7aae4de717647e8a25d5f2cbc2fff9ae Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index eac5138f70f..110d66875f1 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -1300,7 +1300,11 @@ static int arizona_extcon_probe(struct platform_device *pdev) goto err; } - info->micvdd = devm_regulator_get(arizona->dev, "MICVDD"); + /* Set of_node to parent from the SPI device to allow + * location regulator supplies */ + pdev->dev.of_node = arizona->dev->of_node; + + info->micvdd = devm_regulator_get(&pdev->dev, "MICVDD"); if (IS_ERR(info->micvdd)) { ret = PTR_ERR(info->micvdd); dev_err(arizona->dev, "Failed to get MICVDD: %d\n", ret); From 6d2b4762a49d03530f4fceba7eb9c327f6bb7d09 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 14 Aug 2014 13:24:33 +0100 Subject: [PATCH 0430/1167] extcon: arizona: Sync trivial formatting etc with upstream Change-Id: If688f42af33adc5751a6d4f81cf5ca9c55f7b8d5 Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 47 ++++++++++++++++++--------------- 1 file changed, 25 insertions(+), 22 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 110d66875f1..627025be7d8 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -58,16 +58,14 @@ #define MICROPHONE_MIN_OHM 1257 #define MICROPHONE_MAX_OHM 30000 -enum { - MICD_LVL_1_TO_7 = ARIZONA_MICD_LVL_1 | ARIZONA_MICD_LVL_2 | - ARIZONA_MICD_LVL_3 | ARIZONA_MICD_LVL_4 | - ARIZONA_MICD_LVL_5 | ARIZONA_MICD_LVL_6 | - ARIZONA_MICD_LVL_7, +#define MICD_LVL_1_TO_7 (ARIZONA_MICD_LVL_1 | ARIZONA_MICD_LVL_2 | \ + ARIZONA_MICD_LVL_3 | ARIZONA_MICD_LVL_4 | \ + ARIZONA_MICD_LVL_5 | ARIZONA_MICD_LVL_6 | \ + ARIZONA_MICD_LVL_7) - MICD_LVL_0_TO_7 = ARIZONA_MICD_LVL_0 | MICD_LVL_1_TO_7, +#define MICD_LVL_0_TO_7 (ARIZONA_MICD_LVL_0 | MICD_LVL_1_TO_7) - MICD_LVL_0_TO_8 = MICD_LVL_0_TO_7 | ARIZONA_MICD_LVL_8, -}; +#define MICD_LVL_0_TO_8 (MICD_LVL_0_TO_7 | ARIZONA_MICD_LVL_8) struct arizona_extcon_info { struct device *dev; @@ -396,6 +394,8 @@ static struct { { 169, 11065, 65460395 }, }; +#define ARIZONA_HPDET_B_RANGE_MAX 0x3fb + static struct { int min; int max; @@ -451,7 +451,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) if (range < ARRAY_SIZE(arizona_hpdet_b_ranges) - 1 && (val < arizona_hpdet_b_ranges[range].threshold || - val >= 0x3fb)) { + val >= ARIZONA_HPDET_B_RANGE_MAX)) { range++; dev_dbg(arizona->dev, "Moving to HPDET range %d\n", range); @@ -465,7 +465,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) /* If we go out of range report top of range */ if (val < arizona_hpdet_b_ranges[range].threshold || - val >= 0x3fb) { + val >= ARIZONA_HPDET_B_RANGE_MAX) { dev_dbg(arizona->dev, "Measurement out of range\n"); return ARIZONA_HPDET_MAX; } @@ -489,6 +489,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) } val &= ARIZONA_HP_LVL_B_MASK; + /* Convert to ohms, the value is in 0.5 ohm increments */ val /= 2; regmap_read(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, @@ -573,7 +574,7 @@ static int arizona_hpdet_do_id(struct arizona_extcon_info *info, int *reading, } /* - * If we measure the mic as + * If we measure the mic as high impedance */ if (!id_gpio || info->hpdet_res[1] > 50) { dev_dbg(arizona->dev, "Detected mic\n"); @@ -1210,7 +1211,7 @@ static void arizona_micd_set_level(struct arizona *arizona, int index, } #ifdef CONFIG_OF -static int arizona_extcon_get_pdata(struct arizona *arizona) +static int arizona_extcon_of_get_pdata(struct arizona *arizona) { struct arizona_pdata *pdata = &arizona->pdata; @@ -1262,7 +1263,7 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) return 0; } #else -static inline int arizona_extcon_get_pdata(struct arizona *arizona) +static inline int arizona_extcon_of_get_pdata(struct arizona *arizona) { return 0; } @@ -1291,13 +1292,16 @@ static int arizona_extcon_probe(struct platform_device *pdev) if (!arizona->dapm || !arizona->dapm->card) return -EPROBE_DEFER; - arizona_extcon_get_pdata(arizona); - info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); - if (!info) { - dev_err(&pdev->dev, "Failed to allocate memory\n"); - ret = -ENOMEM; - goto err; + if (!info) + return -ENOMEM; + + if (IS_ENABLED(CONFIG_OF)) { + if (!dev_get_platdata(arizona->dev)) { + ret = arizona_extcon_of_get_pdata(arizona); + if (ret < 0) + return ret; + } } /* Set of_node to parent from the SPI device to allow @@ -1308,7 +1312,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) if (IS_ERR(info->micvdd)) { ret = PTR_ERR(info->micvdd); dev_err(arizona->dev, "Failed to get MICVDD: %d\n", ret); - goto err; + return ret; } mutex_init(&info->lock); @@ -1359,7 +1363,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) if (ret < 0) { dev_err(arizona->dev, "extcon_dev_register() failed: %d\n", ret); - goto err; + return ret; } info->input = devm_input_allocate_device(&pdev->dev); @@ -1627,7 +1631,6 @@ static int arizona_extcon_probe(struct platform_device *pdev) err_register: pm_runtime_disable(&pdev->dev); extcon_dev_unregister(&info->edev); -err: return ret; } From 3bdb411f4900b077734fc80eef8575c29f097191 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 14 Jul 2014 16:15:23 +0100 Subject: [PATCH 0431/1167] extcon: arizona: Deobfuscate arizona_extcon_do_magic arizona_extcon_do_magic does not lend a lot of clarity to the purpose of the function, and as all the registers used are described in the datasheet there is no need to obfuscate the code. This patch renames the function to arizona_extcon_hp_clamp, as it controls clamping on the headphone output. Change-Id: I9c88c8c7ae0b6447174a05baa1a4dae8c00527fe Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 47 +++++++++++++++++--------------- include/linux/mfd/arizona/core.h | 2 +- sound/soc/codecs/arizona.c | 4 +-- 3 files changed, 28 insertions(+), 25 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 627025be7d8..b7fd4d0ddc6 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -153,8 +153,8 @@ DEVICE_ATTR(hp_impedance, S_IRUGO, arizona_extcon_show, NULL); static void arizona_start_hpdet_acc_id(struct arizona_extcon_info *info); -static void arizona_extcon_do_magic(struct arizona_extcon_info *info, - unsigned int magic) +static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, + bool clamp) { struct arizona *arizona = info->arizona; unsigned int mask, val = 0; @@ -167,25 +167,26 @@ static void arizona_extcon_do_magic(struct arizona_extcon_info *info, break; case WM8280: case WM5110: - mask = 0x0007; - if (magic) - val = 0x0001; + mask = ARIZONA_HP1L_SHRTO | ARIZONA_HP1L_FLWR | + ARIZONA_HP1L_SHRTI; + if (clamp) + val = ARIZONA_HP1L_SHRTO; else - val = 0x0006; + val = ARIZONA_HP1L_FLWR | ARIZONA_HP1L_SHRTI; break; default: - mask = 0x4000; - if (magic) - val = 0x4000; + mask = ARIZONA_RMV_SHRT_HP1L; + if (clamp) + val = ARIZONA_RMV_SHRT_HP1L; break; }; mutex_lock(&arizona->dapm->card->dapm_mutex); - arizona->hpdet_magic = magic; + arizona->hpdet_clamp = clamp; - /* Keep the HP output stages disabled while doing the magic */ - if (magic) { + /* Keep the HP output stages disabled while doing the clamp */ + if (clamp) { ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT1L_ENA | @@ -197,19 +198,21 @@ static void arizona_extcon_do_magic(struct arizona_extcon_info *info, } if (mask) { - ret = regmap_update_bits(arizona->regmap, 0x225, mask, val); + ret = regmap_update_bits(arizona->regmap, ARIZONA_HP_CTRL_1L, + ARIZONA_RMV_SHRT_HP1L, val); if (ret != 0) - dev_warn(arizona->dev, "Failed to do magic: %d\n", - ret); + dev_warn(arizona->dev, "Failed to do clamp: %d\n", + ret); - ret = regmap_update_bits(arizona->regmap, 0x226, mask, val); + ret = regmap_update_bits(arizona->regmap, ARIZONA_HP_CTRL_1R, + ARIZONA_RMV_SHRT_HP1R, val); if (ret != 0) - dev_warn(arizona->dev, "Failed to do magic: %d\n", + dev_warn(arizona->dev, "Failed to do clamp: %d\n", ret); } - /* Restore the desired state while not doing the magic */ - if (!magic) { + /* Restore the desired state while not doing the clamp */ + if (!clamp) { ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT1L_ENA | @@ -660,7 +663,7 @@ static irqreturn_t arizona_hpdet_irq(int irq, void *data) ARIZONA_HP_IMPEDANCE_RANGE_MASK | ARIZONA_HP_POLL, 0); - arizona_extcon_do_magic(info, 0); + arizona_extcon_hp_clamp(info, false); if (id_gpio) gpio_set_value_cansleep(id_gpio, 0); @@ -705,7 +708,7 @@ static void arizona_identify_headphone(struct arizona_extcon_info *info) if (info->mic) arizona_stop_mic(info); - arizona_extcon_do_magic(info, 0x4000); + arizona_extcon_hp_clamp(info, true); ret = regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, @@ -756,7 +759,7 @@ static void arizona_start_hpdet_acc_id(struct arizona_extcon_info *info) info->hpdet_active = true; - arizona_extcon_do_magic(info, 0x4000); + arizona_extcon_hp_clamp(info, true); ret = regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 086b997c541..8060aa49379 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -131,7 +131,7 @@ struct arizona { struct regmap_irq_chip_data *aod_irq_chip; struct regmap_irq_chip_data *irq_chip; - bool hpdet_magic; + bool hpdet_clamp; unsigned int hp_ena; unsigned int hp_impedance; diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index e928f792df2..eb8ca1c6be5 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1235,8 +1235,8 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, priv->arizona->hp_ena &= ~mask; priv->arizona->hp_ena |= val; - /* Force off if HPDET magic is active */ - if (priv->arizona->hpdet_magic || + /* Force off if HPDET clamp is active */ + if (priv->arizona->hpdet_clamp || priv->arizona->hp_impedance <= priv->arizona->pdata.hpdet_short_circuit_imp) val = 0; From 63e2f573a6159d8ee8e030eccfd9bcc415c75b50 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 14 Aug 2014 15:16:29 +0100 Subject: [PATCH 0432/1167] switch: arizona: Get MICVDD against switch device Previously we would do a regulator get against the main Arizona device to obtain the MICVDD regulator. Arizona is an MFD device and normally MICVDD will be supplied by one of its children (the arizona-micsupp regulator). As devres destruction for the MFD device will run after all its children have been destroyed, the regulator will be destroyed before devres calls regulator_put. This causes a warning from both the destruction of the child node, as the regulator is still open, and from the put of the regulator as the regulator device has already been destroyed. A simple fix here is to get the regulator against the switch device itself such that devres runs when the child is destroyed. This has the additional benefit that if for some reason the switch driver is unloaded the regulator reference won't hang around until the MFD is unloaded. Change-Id: Ic38189eea2133a1da4ba5809ce66cf89913242c2 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 42dff3d71ee..4ece52a4ae0 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1819,7 +1819,11 @@ static int arizona_extcon_probe(struct platform_device *pdev) goto err; } - info->micvdd = devm_regulator_get(arizona->dev, "MICVDD"); + /* Set of_node to parent from the SPI device to allow + * location regulator supplies */ + pdev->dev.of_node = arizona->dev->of_node; + + info->micvdd = devm_regulator_get(&pdev->dev, "MICVDD"); if (IS_ERR(info->micvdd)) { ret = PTR_ERR(info->micvdd); dev_err(arizona->dev, "Failed to get MICVDD: %d\n", ret); From 6716e74d37e5202f7a47c686ee7ffe147fb251ea Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 14 Aug 2014 15:27:17 +0100 Subject: [PATCH 0433/1167] switch: arizona: Sync trivial formatting etc with upstream Change-Id: I725cf8461e66cf9cdf0383cb1a8336fa9a34be54 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 29 +++++++++++++++++------------ include/linux/switch-arizona.h | 14 ++++++-------- 2 files changed, 23 insertions(+), 20 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 4ece52a4ae0..abf146a90be 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -472,6 +472,8 @@ static struct { { 169, 11065, 65460395 }, }; +#define ARIZONA_HPDET_B_RANGE_MAX 0x3fb + static struct { int min; int max; @@ -527,7 +529,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) if (range < ARRAY_SIZE(arizona_hpdet_b_ranges) - 1 && (val < arizona_hpdet_b_ranges[range].threshold || - val >= 0x3fb)) { + val >= ARIZONA_HPDET_B_RANGE_MAX)) { range++; dev_dbg(arizona->dev, "Moving to HPDET range %d\n", range); @@ -541,7 +543,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) /* If we go out of range report top of range */ if (val < arizona_hpdet_b_ranges[range].threshold || - val >= 0x3fb) { + val >= ARIZONA_HPDET_B_RANGE_MAX) { dev_dbg(arizona->dev, "Measurement out of range\n"); return ARIZONA_HPDET_MAX; } @@ -565,6 +567,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) } val &= ARIZONA_HP_LVL_B_MASK; + /* Convert to ohms, the value is in 0.5 ohm increments */ val /= 2; regmap_read(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, @@ -1706,7 +1709,7 @@ static void arizona_micd_set_level(struct arizona *arizona, int index, } #ifdef CONFIG_OF -static int arizona_extcon_get_pdata(struct arizona *arizona) +static int arizona_extcon_of_get_pdata(struct arizona *arizona) { struct arizona_pdata *pdata = &arizona->pdata; @@ -1776,7 +1779,7 @@ static int arizona_extcon_get_pdata(struct arizona *arizona) return 0; } #else -static inline int arizona_extcon_get_pdata(struct arizona *arizona) +static inline int arizona_extcon_of_get_pdata(struct arizona *arizona) { return 0; } @@ -1805,18 +1808,21 @@ static int arizona_extcon_probe(struct platform_device *pdev) if (!arizona->dapm || !arizona->dapm->card) return -EPROBE_DEFER; - arizona_extcon_get_pdata(arizona); - if (pdata->hpdet_short_circuit_imp < 1) pdata->hpdet_short_circuit_imp = ARIZONA_HP_SHORT_IMPEDANCE; else if (pdata->hpdet_short_circuit_imp >= HP_LOW_IMPEDANCE_LIMIT) pdata->hpdet_short_circuit_imp = HP_LOW_IMPEDANCE_LIMIT - 1; info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); - if (!info) { - dev_err(&pdev->dev, "Failed to allocate memory\n"); - ret = -ENOMEM; - goto err; + if (!info) + return -ENOMEM; + + if (IS_ENABLED(CONFIG_OF)) { + if (!dev_get_platdata(arizona->dev)) { + ret = arizona_extcon_of_get_pdata(arizona); + if (ret < 0) + return ret; + } } /* Set of_node to parent from the SPI device to allow @@ -1827,7 +1833,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) if (IS_ERR(info->micvdd)) { ret = PTR_ERR(info->micvdd); dev_err(arizona->dev, "Failed to get MICVDD: %d\n", ret); - goto err; + return ret; } mutex_init(&info->lock); @@ -2150,7 +2156,6 @@ static int arizona_extcon_probe(struct platform_device *pdev) switch_dev_unregister(&info->edev); err_wakelock: wakeup_source_trash(&info->detection_wake_lock); -err: return ret; } diff --git a/include/linux/switch-arizona.h b/include/linux/switch-arizona.h index 927b1373719..c277c144683 100644 --- a/include/linux/switch-arizona.h +++ b/include/linux/switch-arizona.h @@ -27,16 +27,14 @@ #define ARIZONA_ACCDET_MODE_ADC 7 #define ARIZONA_ACCDET_MODE_INVALID 8 -enum { - MICD_LVL_1_TO_7 = ARIZONA_MICD_LVL_1 | ARIZONA_MICD_LVL_2 | - ARIZONA_MICD_LVL_3 | ARIZONA_MICD_LVL_4 | - ARIZONA_MICD_LVL_5 | ARIZONA_MICD_LVL_6 | - ARIZONA_MICD_LVL_7, +#define MICD_LVL_1_TO_7 (ARIZONA_MICD_LVL_1 | ARIZONA_MICD_LVL_2 | \ + ARIZONA_MICD_LVL_3 | ARIZONA_MICD_LVL_4 | \ + ARIZONA_MICD_LVL_5 | ARIZONA_MICD_LVL_6 | \ + ARIZONA_MICD_LVL_7) - MICD_LVL_0_TO_7 = ARIZONA_MICD_LVL_0 | MICD_LVL_1_TO_7, +#define MICD_LVL_0_TO_7 (ARIZONA_MICD_LVL_0 | MICD_LVL_1_TO_7) - MICD_LVL_0_TO_8 = MICD_LVL_0_TO_7 | ARIZONA_MICD_LVL_8, -}; +#define MICD_LVL_0_TO_8 (MICD_LVL_0_TO_7 | ARIZONA_MICD_LVL_8) struct arizona_extcon_info; From a8bc8ced043d61f58d825ad77f5f0523459d6773 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 14 Aug 2014 15:35:53 +0100 Subject: [PATCH 0434/1167] switch: arizona: Deobfuscate arizona_extcon_do_magic arizona_extcon_do_magic does not lend a lot of clarity to the purpose of the function, and as all the registers used are described in the datasheet there is no need to obfuscate the code. This patch renames the function to arizona_extcon_hp_clamp, as it controls clamping on the headphone output. Change-Id: Iaf49d1088c43f41c7d2a9e900e0f5708525caf07 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 51 +++++++++++++++++---------------- 1 file changed, 27 insertions(+), 24 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index abf146a90be..28ebff273b2 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -232,8 +232,8 @@ static void arizona_jds_timeout_work(struct work_struct *work) mutex_unlock(&info->lock); } -static void arizona_extcon_do_magic(struct arizona_extcon_info *info, - unsigned int magic) +static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, + bool clamp) { struct arizona *arizona = info->arizona; unsigned int mask, val = 0; @@ -246,25 +246,26 @@ static void arizona_extcon_do_magic(struct arizona_extcon_info *info, break; case WM8280: case WM5110: - mask = 0x0007; - if (magic) - val = 0x0001; + mask = ARIZONA_HP1L_SHRTO | ARIZONA_HP1L_FLWR | + ARIZONA_HP1L_SHRTI; + if (clamp) + val = ARIZONA_HP1L_SHRTO; else - val = 0x0006; + val = ARIZONA_HP1L_FLWR | ARIZONA_HP1L_SHRTI; break; default: - mask = 0x4000; - if (magic) - val = 0x4000; + mask = ARIZONA_RMV_SHRT_HP1L; + if (clamp) + val = ARIZONA_RMV_SHRT_HP1L; break; }; mutex_lock(&arizona->dapm->card->dapm_mutex); - arizona->hpdet_magic = magic; + arizona->hpdet_clamp = clamp; - /* Keep the HP output stages disabled while doing the magic */ - if (magic) { + /* Keep the HP output stages disabled while doing the clamp */ + if (clamp) { ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT1L_ENA | @@ -276,19 +277,21 @@ static void arizona_extcon_do_magic(struct arizona_extcon_info *info, } if (mask) { - ret = regmap_update_bits(arizona->regmap, 0x225, mask, val); + ret = regmap_update_bits(arizona->regmap, ARIZONA_HP_CTRL_1L, + mask, val); if (ret != 0) - dev_warn(arizona->dev, "Failed to do magic: %d\n", + dev_warn(arizona->dev, "Failed to do clamp: %d\n", ret); - ret = regmap_update_bits(arizona->regmap, 0x226, mask, val); + ret = regmap_update_bits(arizona->regmap, ARIZONA_HP_CTRL_1R, + mask, val); if (ret != 0) - dev_warn(arizona->dev, "Failed to do magic: %d\n", + dev_warn(arizona->dev, "Failed to do clamp: %d\n", ret); } - /* Restore the desired state while not doing the magic */ - if (!magic && (arizona->hp_impedance > arizona->pdata.hpdet_short_circuit_imp)) { + /* Restore the desired state while not doing the clamp */ + if (!clamp && (arizona->hp_impedance > arizona->pdata.hpdet_short_circuit_imp)) { ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT1L_ENA | @@ -826,7 +829,7 @@ int arizona_hpdet_start(struct arizona_extcon_info *info) /* Make sure we keep the device enabled during the measurement */ pm_runtime_get_sync(info->dev); - arizona_extcon_do_magic(info, 0x4000); + arizona_extcon_hp_clamp(info, true); ret = regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, @@ -849,7 +852,7 @@ int arizona_hpdet_start(struct arizona_extcon_info *info) return 0; err: - arizona_extcon_do_magic(info, 0); + arizona_extcon_hp_clamp(info, false); pm_runtime_put_autosuspend(info->dev); @@ -889,7 +892,7 @@ void arizona_hpdet_stop(struct arizona_extcon_info *info) ARIZONA_ACCESSORY_DETECT_MODE_1, ARIZONA_ACCDET_MODE_MASK, 0); - arizona_extcon_do_magic(info, 0); + arizona_extcon_hp_clamp(info, false); pm_runtime_mark_last_busy(info->dev); pm_runtime_put_autosuspend(info->dev); @@ -902,7 +905,7 @@ static int arizona_hpdet_moisture_start(struct arizona_extcon_info *info) ret = arizona_hpdet_start(info); - arizona_extcon_do_magic(info, 0); + arizona_extcon_hp_clamp(info, false); return ret; } @@ -1293,7 +1296,7 @@ static int arizona_hpdet_acc_id_start(struct arizona_extcon_info *info) /* Make sure we keep the device enabled during the measurement */ pm_runtime_get_sync(info->dev); - arizona_extcon_do_magic(info, 0x4000); + arizona_extcon_hp_clamp(info, true); ret = regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, @@ -1326,7 +1329,7 @@ static int arizona_hpdet_acc_id_start(struct arizona_extcon_info *info) return 0; err: - arizona_extcon_do_magic(info, 0x0); + arizona_extcon_hp_clamp(info, false); pm_runtime_put_autosuspend(info->dev); From cfa2c490dc8fd8d48daf9149e298714be539bd61 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 22 Aug 2014 16:24:26 +0100 Subject: [PATCH 0435/1167] ASoC: florida: Destroy mutex on error path If we failed snd_soc_register_codec the mutexes were not destroyed. This patch corrects this. Change-Id: I6832ec7df70a1a5e4b963aa1f1f9c7c08bec9e56 Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 21fe85a5171..a95eddd146d 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2322,6 +2322,7 @@ static int florida_probe(struct platform_device *pdev) "Failed to register codec: %d\n", ret); snd_soc_unregister_platform(&pdev->dev); + goto error; } return ret; From 5146b916c1312fc8ab69ca9af717b13d423638df Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 29 Aug 2014 10:40:49 +0100 Subject: [PATCH 0436/1167] ASoC: arizona: Add delay for output disable Give the output disable sequence a chance to fully complete, otherwise there is a danger we may remove the clock before it is finished resulting in a pop noise. Change-Id: I4abf8bafa531c327f56e1bb6897652f34b41df05 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index eb8ca1c6be5..354c91c72ca 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1180,6 +1180,21 @@ int arizona_out_ev(struct snd_soc_dapm_widget *w, break; } break; + + case SND_SOC_DAPM_POST_PMD: + switch (w->shift) { + case ARIZONA_OUT1L_ENA_SHIFT: + case ARIZONA_OUT1R_ENA_SHIFT: + case ARIZONA_OUT2L_ENA_SHIFT: + case ARIZONA_OUT2R_ENA_SHIFT: + case ARIZONA_OUT3L_ENA_SHIFT: + case ARIZONA_OUT3R_ENA_SHIFT: + udelay(750); + break; + default: + break; + } + break; } return 0; @@ -1226,7 +1241,7 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, break; } - return 0; + return arizona_out_ev(w, kcontrol, event); default: return -EINVAL; } From ad49d9af4ddffb90166641e4143bffadaf737f83 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 2 Sep 2014 15:12:13 +0100 Subject: [PATCH 0437/1167] mfd: arizona: Use handle_simple_irq for IRQ dispatch chip We use a dummy IRQ chip to dispatch interrupts to the two seperate IRQ domains on the Arizona devices. This is just a simple software IRQ chip and thus the current handle_edge_irq is unnecessary for its needs. Change-Id: Ie1c4ae885bc8e4b36791fe639c86561a4d84ae72 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-irq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index 2162c44ca89..dc5f9d49b55 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -163,7 +163,7 @@ static int arizona_irq_map(struct irq_domain *h, unsigned int virq, struct regmap_irq_chip_data *data = h->host_data; irq_set_chip_data(virq, data); - irq_set_chip_and_handler(virq, &arizona_irq_chip, handle_edge_irq); + irq_set_chip_and_handler(virq, &arizona_irq_chip, handle_simple_irq); irq_set_nested_thread(virq, 1); /* ARM needs us to explicitly flag the IRQ as valid From bcafbcc7edd69a809be439f39c1f59060940e48a Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 18 Aug 2014 10:06:59 +0100 Subject: [PATCH 0438/1167] ASoC: wm_adsp: Added Support for ASR Assist Added ASR Assist to table of firmwares Change-Id: I9ef0e2a80535f0bcd99ffd283b6defb0eb6a46ad Signed-off-by: Ammar Zahid Ali Syed Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index a286015d4e8..1e8e886ba21 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -198,7 +198,7 @@ static void wm_adsp_buf_free(struct list_head *list) /* Must remain a power of two */ #define WM_ADSP_CAPTURE_BUFFER_SIZE 1048576 -#define WM_ADSP_NUM_FW 17 +#define WM_ADSP_NUM_FW 18 #define WM_ADSP_FW_MBC_VSS 0 #define WM_ADSP_FW_TX 1 @@ -217,6 +217,7 @@ static void wm_adsp_buf_free(struct list_head *list) #define WM_ADSP_FW_EZ2GROUPTALK_TX 14 #define WM_ADSP_FW_EZ2GROUPTALK_RX 15 #define WM_ADSP_FW_EZ2RECORD 16 +#define WM_ADSP_FW_ASR_ASSIST 17 static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_MBC_VSS] = "MBC/VSS", @@ -236,6 +237,7 @@ static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_EZ2GROUPTALK_TX] = "Ez2GroupTalk Tx", [WM_ADSP_FW_EZ2GROUPTALK_RX] = "Ez2GroupTalk Rx", [WM_ADSP_FW_EZ2RECORD] = "Ez2Record", + [WM_ADSP_FW_ASR_ASSIST] = "ASR Assist", }; struct wm_adsp_system_config_xm_hdr { @@ -397,6 +399,7 @@ static struct wm_adsp_fw_defs wm_adsp_fw[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_EZ2GROUPTALK_TX] = { .file = "ez2grouptalk-tx" }, [WM_ADSP_FW_EZ2GROUPTALK_RX] = { .file = "ez2grouptalk-rx" }, [WM_ADSP_FW_EZ2RECORD] = { .file = "ez2record" }, + [WM_ADSP_FW_ASR_ASSIST] = { .file = "asr-assist" }, }; struct wm_coeff_ctl_ops { From 7d63e19c941212df00d2961d6074c69963e1265c Mon Sep 17 00:00:00 2001 From: Ammar Zahid Ali Syed Date: Mon, 7 Jul 2014 15:40:08 +0100 Subject: [PATCH 0439/1167] ASoC: florida: Added Support for Ez2Control 2.5A Added firmware Id of Ez2Control 2.5A to adsp2_irq function to enable ez2control trigger for it as well. Change-Id: Ibf9f11bd8a7aae22efc764823fe8f1ced34ed031 Signed-off-by: Ammar Zahid Ali Syed --- sound/soc/codecs/florida.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index a95eddd146d..0fd5582c463 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -1890,7 +1890,8 @@ static irqreturn_t adsp2_irq(int irq, void *data) mutex_lock(&florida->compr_info.lock); if (!florida->compr_info.trig && - florida->core.adsp[2].fw_id == 0x4000d && + (florida->core.adsp[2].fw_id == 0x4000d || + florida->core.adsp[2].fw_id == 0x40036) && florida->core.adsp[2].running) { if (florida->core.arizona->pdata.ez2ctrl_trigger) florida->core.arizona->pdata.ez2ctrl_trigger(); From 2c30710fdb46c60a69196b86620d3daaf8258f3e Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 8 Sep 2014 09:53:50 +0100 Subject: [PATCH 0440/1167] ASoC: wm_adsp: Add support for MasterHiFi firmware Change-Id: Idcf25be405a91b68b73cfe4a5edfa447eada7296 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 1e8e886ba21..f9698c7f389 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -198,7 +198,7 @@ static void wm_adsp_buf_free(struct list_head *list) /* Must remain a power of two */ #define WM_ADSP_CAPTURE_BUFFER_SIZE 1048576 -#define WM_ADSP_NUM_FW 18 +#define WM_ADSP_NUM_FW 19 #define WM_ADSP_FW_MBC_VSS 0 #define WM_ADSP_FW_TX 1 @@ -218,6 +218,7 @@ static void wm_adsp_buf_free(struct list_head *list) #define WM_ADSP_FW_EZ2GROUPTALK_RX 15 #define WM_ADSP_FW_EZ2RECORD 16 #define WM_ADSP_FW_ASR_ASSIST 17 +#define WM_ADSP_FW_MASTERHIFI 18 static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_MBC_VSS] = "MBC/VSS", @@ -238,6 +239,7 @@ static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_EZ2GROUPTALK_RX] = "Ez2GroupTalk Rx", [WM_ADSP_FW_EZ2RECORD] = "Ez2Record", [WM_ADSP_FW_ASR_ASSIST] = "ASR Assist", + [WM_ADSP_FW_MASTERHIFI] = "MasterHiFi", }; struct wm_adsp_system_config_xm_hdr { @@ -400,6 +402,7 @@ static struct wm_adsp_fw_defs wm_adsp_fw[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_EZ2GROUPTALK_RX] = { .file = "ez2grouptalk-rx" }, [WM_ADSP_FW_EZ2RECORD] = { .file = "ez2record" }, [WM_ADSP_FW_ASR_ASSIST] = { .file = "asr-assist" }, + [WM_ADSP_FW_MASTERHIFI] = { .file = "masterhifi" }, }; struct wm_coeff_ctl_ops { @@ -2159,7 +2162,8 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, break; case SND_SOC_DAPM_PRE_PMD: - if (dsp->fw_id == 0x40019) { + if (dsp->fw_id == 0x40019 || dsp->fw_id == 0x5001f || + dsp->fw_id == 0x4001f) { wm_adsp_edac_shutdown(dsp); } From fc6a7e793705a048f4182edf705ff53816a101cf Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 16 May 2014 10:52:57 +0100 Subject: [PATCH 0441/1167] ASoC: wm5102: disable DRC interrupt when driver is removed Change-Id: I4750cb7a63d7820422cb74c18444142cb31af546 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm5102.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index fee5e9388c3..7f7505f98c5 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1956,6 +1956,13 @@ static int wm5102_codec_probe(struct snd_soc_codec *codec) static int wm5102_codec_remove(struct snd_soc_codec *codec) { struct wm5102_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->core.arizona; + + irq_set_irq_wake(arizona->irq, 0); + arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); + regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, + ARIZONA_IM_DRC1_SIG_DET_EINT2, + ARIZONA_IM_DRC1_SIG_DET_EINT2); priv->core.arizona->dapm = NULL; From 7401f5e8c2d472ee4ea5d1c0cdc1b7ee11d3d889 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 1 Sep 2014 15:52:04 +0100 Subject: [PATCH 0442/1167] mfd: arizona: Remove bogus warning in arizona_dvfs_down The flags are simple booleans per block, not reference counts. Each block that has a DVFS dependency is not itself reference counted, it's a simple either/or case which these flags match. Because the requestors don't reference count themselves we allow them to notify the same state that they are already in. Change-Id: I3ea6dbf3f9e265cfed0d3ca4b27ea4f757c90d6a Signed-off-by: Richard Fitzgerald --- drivers/mfd/arizona-core.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index af767c766d7..992c58b22b7 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -149,9 +149,6 @@ int arizona_dvfs_down(struct arizona *arizona, unsigned int flags) mutex_lock(&arizona->subsys_max_lock); - if ((arizona->subsys_max_rq & flags) != flags) - dev_warn(arizona->dev, "Unbalanced DVFS down: %x\n", flags); - arizona->subsys_max_rq &= ~flags; if (arizona->subsys_max_rq == 0) { From 33fcd6a3a662d904f56e200d115542a8dbd8ffb7 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 1 Sep 2014 14:07:13 +0100 Subject: [PATCH 0443/1167] ASoC: wm8998: Enable DVFS for sample rate 2 and 3 controls Higher sample rates on domains 2 and 3 must enable DVFS boost Change-Id: I8c610cb0b18791ca93f4865918b50bcc341ec59b Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm8998.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/wm8998.c b/sound/soc/codecs/wm8998.c index 659d32b02f2..cdde18260e0 100644 --- a/sound/soc/codecs/wm8998.c +++ b/sound/soc/codecs/wm8998.c @@ -201,8 +201,8 @@ SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode), SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode), SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), -SOC_VALUE_ENUM("Sample Rate 2", arizona_sample_rate[0]), -SOC_VALUE_ENUM("Sample Rate 3", arizona_sample_rate[1]), +ARIZONA_SAMPLE_RATE_CONTROL_DVFS("Sample Rate 2", 2), +ARIZONA_SAMPLE_RATE_CONTROL_DVFS("Sample Rate 3", 3), SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), From 7b3d8439df6273f3e47d9da1a49b0bdaf1df2489 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 10 Sep 2014 10:24:15 +0100 Subject: [PATCH 0444/1167] ASoC: wm_adsp: Add speaker protect firmware option Change-Id: I5a8024ffe3f29a2665ae1ac4a13e5938f70e084a Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index f9698c7f389..7d15dea5759 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -198,8 +198,6 @@ static void wm_adsp_buf_free(struct list_head *list) /* Must remain a power of two */ #define WM_ADSP_CAPTURE_BUFFER_SIZE 1048576 -#define WM_ADSP_NUM_FW 19 - #define WM_ADSP_FW_MBC_VSS 0 #define WM_ADSP_FW_TX 1 #define WM_ADSP_FW_TX_SPK 2 @@ -219,6 +217,9 @@ static void wm_adsp_buf_free(struct list_head *list) #define WM_ADSP_FW_EZ2RECORD 16 #define WM_ADSP_FW_ASR_ASSIST 17 #define WM_ADSP_FW_MASTERHIFI 18 +#define WM_ADSP_FW_SPEAKERPROTECT 19 + +#define WM_ADSP_NUM_FW 20 static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_MBC_VSS] = "MBC/VSS", @@ -240,6 +241,7 @@ static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_EZ2RECORD] = "Ez2Record", [WM_ADSP_FW_ASR_ASSIST] = "ASR Assist", [WM_ADSP_FW_MASTERHIFI] = "MasterHiFi", + [WM_ADSP_FW_SPEAKERPROTECT] = "Speaker Protect", }; struct wm_adsp_system_config_xm_hdr { @@ -403,6 +405,7 @@ static struct wm_adsp_fw_defs wm_adsp_fw[WM_ADSP_NUM_FW] = { [WM_ADSP_FW_EZ2RECORD] = { .file = "ez2record" }, [WM_ADSP_FW_ASR_ASSIST] = { .file = "asr-assist" }, [WM_ADSP_FW_MASTERHIFI] = { .file = "masterhifi" }, + [WM_ADSP_FW_SPEAKERPROTECT] = { .file = "speaker-protect" }, }; struct wm_coeff_ctl_ops { From ea42af2f0bcba5aec23965a57c76b31eff5205fe Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 25 Aug 2014 11:45:39 +0100 Subject: [PATCH 0445/1167] ASoC: arizona: Add DSP_B and LEFT_J mode support Change-Id: I3d04db47ed85cd66d26fd5cd9dcbf5f8680a9d0b Signed-off-by: Nikesh Oswal Signed-off-by: Charles Keepax Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 28 +++++++++++++++++++++++++--- 1 file changed, 25 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 354c91c72ca..a0108a842c7 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -61,6 +61,11 @@ #define ARIZONA_FLL_MIN_OUTDIV 2 #define ARIZONA_FLL_MAX_OUTDIV 7 +#define ARIZONA_FMT_DSP_MODE_A 0 +#define ARIZONA_FMT_DSP_MODE_B 1 +#define ARIZONA_FMT_I2S_MODE 2 +#define ARIZONA_FMT_LEFT_JUSTIFIED_MODE 3 + #define arizona_fll_err(_fll, fmt, ...) \ dev_err(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__) #define arizona_fll_warn(_fll, fmt, ...) \ @@ -1442,10 +1447,26 @@ static int arizona_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { case SND_SOC_DAIFMT_DSP_A: - mode = 0; + mode = ARIZONA_FMT_DSP_MODE_A; + break; + case SND_SOC_DAIFMT_DSP_B: + if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) + != SND_SOC_DAIFMT_CBM_CFM) { + arizona_aif_err(dai, "DSP_B not valid in slave mode\n"); + return -EINVAL; + } + mode = ARIZONA_FMT_DSP_MODE_B; break; case SND_SOC_DAIFMT_I2S: - mode = 2; + mode = ARIZONA_FMT_I2S_MODE; + break; + case SND_SOC_DAIFMT_LEFT_J: + if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) + != SND_SOC_DAIFMT_CBM_CFM) { + arizona_aif_err(dai, "LEFT_J not valid in slave mode\n"); + return -EINVAL; + } + mode = ARIZONA_FMT_LEFT_JUSTIFIED_MODE; break; default: arizona_aif_err(dai, "Unsupported DAI format %d\n", @@ -1884,7 +1905,8 @@ static int arizona_hw_params(struct snd_pcm_substream *substream, /* Force multiple of 2 channels for I2S mode */ val = snd_soc_read(codec, base + ARIZONA_AIF_FORMAT); - if ((channels & 1) && (val & ARIZONA_AIF1_FMT_MASK)) { + val &= ARIZONA_AIF1_FMT_MASK; + if ((channels & 1) && (val == ARIZONA_FMT_I2S_MODE)) { arizona_aif_dbg(dai, "Forcing stereo mode\n"); bclk_target /= channels; bclk_target *= channels + 1; From fe108d2858f147e4a7c57185c3130c182e228ccd Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 25 Aug 2014 15:41:04 +0100 Subject: [PATCH 0446/1167] switch: arizona: Factor out headphone impedance setting This allows custom jack detection code to specify the headphone impedance since it is required by some of the arizona core code. Change-Id: I51812e61c31bdf363566294ccf082ccf1edb4bc1 Signed-off-by: Charles Keepax Signed-off-by: Richard Fitzgerald --- drivers/switch/switch-arizona.c | 54 +++++++++++++++------------------ include/linux/switch-arizona.h | 3 ++ 2 files changed, 27 insertions(+), 30 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 28ebff273b2..e661f8b839e 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -795,6 +795,28 @@ int arizona_wm1814_tune_headphone(struct arizona_extcon_info *info, return 0; } +void arizona_set_headphone_imp(struct arizona_extcon_info *info, int imp) +{ + struct arizona *arizona = info->arizona; + + arizona->hp_impedance = imp; + + if (arizona->pdata.hpdet_cb) + arizona->pdata.hpdet_cb(arizona->hp_impedance); + + switch (arizona->type) { + case WM5110: + arizona_wm5110_tune_headphone(info, arizona->hp_impedance); + break; + case WM1814: + arizona_wm1814_tune_headphone(info, arizona->hp_impedance); + break; + default: + break; + } +} +EXPORT_SYMBOL_GPL(arizona_set_headphone_imp); + int arizona_hpdet_start(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; @@ -806,21 +828,7 @@ int arizona_hpdet_start(struct arizona_extcon_info *info) if (info->arizona->pdata.fixed_hpdet_imp) { int imp = info->arizona->pdata.fixed_hpdet_imp; - if (arizona->pdata.hpdet_cb) - arizona->pdata.hpdet_cb(imp); - - switch (arizona->type) { - case WM5110: - arizona_wm5110_tune_headphone(info, imp); - info->arizona->hp_impedance = imp; - break; - case WM1814: - arizona_wm1814_tune_headphone(info, imp); - info->arizona->hp_impedance = imp; - break; - default: - break; - } + arizona_set_headphone_imp(info, imp); ret = -EEXIST; goto skip; @@ -935,21 +943,7 @@ int arizona_hpdet_reading(struct arizona_extcon_info *info, int val) if (val < 0) return val; - arizona->hp_impedance = val; - - if (arizona->pdata.hpdet_cb) - arizona->pdata.hpdet_cb(arizona->hp_impedance); - - switch (arizona->type) { - case WM5110: - arizona_wm5110_tune_headphone(info, arizona->hp_impedance); - break; - case WM1814: - arizona_wm1814_tune_headphone(info, arizona->hp_impedance); - break; - default: - break; - } + arizona_set_headphone_imp(info, val); if (info->mic) { arizona_extcon_report(info, BIT_HEADSET); diff --git a/include/linux/switch-arizona.h b/include/linux/switch-arizona.h index c277c144683..45f84c4d830 100644 --- a/include/linux/switch-arizona.h +++ b/include/linux/switch-arizona.h @@ -53,6 +53,9 @@ struct arizona_jd_state { int arizona_jds_set_state(struct arizona_extcon_info *info, const struct arizona_jd_state *new_state); +extern void arizona_set_headphone_imp(struct arizona_extcon_info *info, + int imp); + extern const struct arizona_jd_state arizona_hpdet_left; extern const struct arizona_jd_state arizona_hpdet_right; extern const struct arizona_jd_state arizona_micd_button; From f9a912ba296a74afedc6eef87ba8a8b54f45b043 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 22 Sep 2014 13:51:31 +0100 Subject: [PATCH 0447/1167] ASoC: arizona: Fix output sample rate enum The output sample rate enum was referring to the wrong set of values causing it to point to a different rate than that requested. Change-Id: I4980a19039911810dd5c35554f57983d7c2e7001 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index a0108a842c7..053f0843b51 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -577,7 +577,7 @@ const struct soc_enum arizona_output_rate = 0x0f, ARIZONA_OUT_RATE_ENUM_SIZE, arizona_rate_text, - arizona_sample_rate_val); + arizona_rate_val); EXPORT_SYMBOL_GPL(arizona_output_rate); const SOC_ENUM_SINGLE_DECL(arizona_spdif_rate, From 47d970c5f8b603b44592a00fa3185726da531f98 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 23 Sep 2014 16:50:06 +0100 Subject: [PATCH 0448/1167] mfd: arizona: Correct mask to allow setting micbias external cap Currently the mask for the external capacitor bit is missing when writing the MICBIAS config meaning it will never be set this patch fixes this. Change-Id: Id4dc5193a12cdb4c302370f59f6d516e6b091283 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 992c58b22b7..373c89c74cd 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1530,6 +1530,7 @@ int arizona_dev_init(struct arizona *arizona) regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_1 + i, ARIZONA_MICB1_LVL_MASK | + ARIZONA_MICB1_EXT_CAP | ARIZONA_MICB1_DISCH | ARIZONA_MICB1_BYPASS | ARIZONA_MICB1_RATE, val); From e02f2fa15413d5263b5d9d99ee7918afa31d84cd Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 23 Sep 2014 16:16:34 +0100 Subject: [PATCH 0449/1167] switch: arizona: Remove unused variable Change-Id: I158ffbf17ecd0bcaeff67db348507cd95c177cf6 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index e661f8b839e..f323d690221 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -938,8 +938,6 @@ static int arizona_hpdet_moisture_reading(struct arizona_extcon_info *info, int arizona_hpdet_reading(struct arizona_extcon_info *info, int val) { - struct arizona *arizona = info->arizona; - if (val < 0) return val; From be0a83030f6a2bf6d96fbdfe6be0539569809a34 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 19 Sep 2014 04:11:11 +0100 Subject: [PATCH 0450/1167] ASoC: florida: Add control for input rate Change-Id: I0090eb7ddce65ef4dd7d315dbdc31cadb8a358a4 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 12 +++++++++++- sound/soc/codecs/arizona.h | 3 ++- sound/soc/codecs/florida.c | 1 + 3 files changed, 14 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 053f0843b51..e53c93f055a 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -575,11 +575,21 @@ const struct soc_enum arizona_output_rate = SOC_VALUE_ENUM_SINGLE(ARIZONA_OUTPUT_RATE_1, ARIZONA_OUT_RATE_SHIFT, 0x0f, - ARIZONA_OUT_RATE_ENUM_SIZE, + ARIZONA_SYNC_RATE_ENUM_SIZE, arizona_rate_text, arizona_rate_val); EXPORT_SYMBOL_GPL(arizona_output_rate); +const struct soc_enum arizona_input_rate = + SOC_VALUE_ENUM_SINGLE(ARIZONA_INPUT_RATE, + ARIZONA_IN_RATE_SHIFT, + 0x0f, + ARIZONA_SYNC_RATE_ENUM_SIZE, + arizona_rate_text, + arizona_rate_val); +EXPORT_SYMBOL_GPL(arizona_input_rate); + + const SOC_ENUM_SINGLE_DECL(arizona_spdif_rate, ARIZONA_SPD1_TX_CONTROL, ARIZONA_SPD1_RATE_SHIFT, diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index f5418d28a1e..4eb99596e56 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -197,8 +197,8 @@ extern int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS]; arizona_put_sample_rate_enum) #define ARIZONA_RATE_ENUM_SIZE 4 +#define ARIZONA_SYNC_RATE_ENUM_SIZE 3 #define ARIZONA_SAMPLE_RATE_ENUM_SIZE 14 -#define ARIZONA_OUT_RATE_ENUM_SIZE 3 extern const char *arizona_rate_text[ARIZONA_RATE_ENUM_SIZE]; extern const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE]; @@ -209,6 +209,7 @@ extern const struct soc_enum arizona_sample_rate[]; extern const struct soc_enum arizona_isrc_fsl[]; extern const struct soc_enum arizona_isrc_fsh[]; extern const struct soc_enum arizona_asrc_rate1; +extern const struct soc_enum arizona_input_rate; extern const struct soc_enum arizona_output_rate; extern const struct soc_enum arizona_spdif_rate; diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 0fd5582c463..a9fcf1e4d9e 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -545,6 +545,7 @@ SOC_SINGLE_TLV("Noise Gate Threshold Volume", ARIZONA_NOISE_GATE_CONTROL, SOC_ENUM("Noise Gate Hold", arizona_ng_hold), SOC_VALUE_ENUM("Output Rate 1", arizona_output_rate), +SOC_VALUE_ENUM("In Rate", arizona_input_rate), FLORIDA_NG_SRC("HPOUT1L", ARIZONA_NOISE_GATE_SELECT_1L), FLORIDA_NG_SRC("HPOUT1R", ARIZONA_NOISE_GATE_SELECT_1R), From fceb478cba62f72861db7ecfff32502761538549 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 19 Sep 2014 08:30:27 +0100 Subject: [PATCH 0451/1167] regulator: arizona-ldo1: Add additional supported voltage Add support for the 1.175V mode on the LDO1 regulator for some Arizona parts. This is needed as part of the sleep mode operation on WM8280. Change-Id: I5fe1c7d482100a06babfa487587713d39ee16a53 Signed-off-by: Charles Keepax --- drivers/regulator/arizona-ldo1.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/regulator/arizona-ldo1.c b/drivers/regulator/arizona-ldo1.c index 154dbce4c76..f483cc0d04b 100644 --- a/drivers/regulator/arizona-ldo1.c +++ b/drivers/regulator/arizona-ldo1.c @@ -167,7 +167,10 @@ static const struct regulator_init_data arizona_ldo1_dvfs = { static const struct regulator_init_data arizona_ldo1_default = { .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .min_uV = 1175000, + .max_uV = 1200000, + .valid_ops_mask = REGULATOR_CHANGE_STATUS | + REGULATOR_CHANGE_VOLTAGE, }, .num_consumer_supplies = 1, }; From 96e7b9d67fce76a37f4c7880b182b238298ff98a Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 19 Sep 2014 08:31:38 +0100 Subject: [PATCH 0452/1167] mfd: arizona: Set DCVDD voltage to 1.175V before entering sleep mode Change-Id: I5e12dc5b46980afd5d09dc95e96a45a947da80c0 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 373c89c74cd..a6e09ff7453 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -585,6 +585,21 @@ static int arizona_runtime_resume(struct device *dev) break; } + switch (arizona->type) { + case WM5110: + case WM8280: + ret = regulator_set_voltage(arizona->dcvdd, 1200000, 1200000); + if (ret < 0) { + dev_err(arizona->dev, + "Failed to set resume voltage: %d\n", + ret); + goto err; + } + break; + default: + break; + } + ret = regcache_sync(arizona->regmap); if (ret != 0) { dev_err(arizona->dev, "Failed to restore register cache\n"); @@ -621,13 +636,10 @@ static int arizona_runtime_suspend(struct device *dev) switch (arizona->type) { case WM5110: case WM8280: - ret = regmap_update_bits(arizona->regmap, - ARIZONA_LDO1_CONTROL_1, - ARIZONA_LDO1_VSEL_MASK, - 0x0b << ARIZONA_LDO1_VSEL_SHIFT); - if (ret != 0) { + ret = regulator_set_voltage(arizona->dcvdd, 1175000, 1175000); + if (ret < 0) { dev_err(arizona->dev, - "Failed to prepare for sleep %d\n", + "Failed to set suspend voltage: %d\n", ret); return ret; } From fda8a859d096b55e2860eee75cc982abca5a9ad9 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 23 Sep 2014 16:09:00 +0100 Subject: [PATCH 0453/1167] ASoC: arizona: Add ability to force all mic supplies into bypass mode This is useful when suspending the system, with some low power audio still running. Change-Id: I82587b78e26eaf4cd45b219ad4bd184055046ad0 Signed-off-by: Charles Keepax --- include/linux/mfd/arizona/core.h | 2 ++ sound/soc/codecs/arizona.c | 59 ++++++++++++++++++++++++++++++++ sound/soc/codecs/arizona.h | 3 ++ 3 files changed, 64 insertions(+) diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 8060aa49379..e81f70f119a 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -151,6 +151,8 @@ struct arizona { uint16_t out_comp_coeff; uint8_t out_comp_enabled; + + bool bypass_cache; }; #define ARIZONA_DVFS_SR1_RQ 0x00000001 diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index e53c93f055a..717d4f45afa 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2739,6 +2739,65 @@ int arizona_set_custom_jd(struct snd_soc_codec *codec, } EXPORT_SYMBOL_GPL(arizona_set_custom_jd); +int arizona_enable_force_bypass(struct snd_soc_codec *codec) +{ + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + unsigned int val; + + regmap_read(arizona->regmap, ARIZONA_MIC_CHARGE_PUMP_1, &val); + arizona->bypass_cache = !(val & ARIZONA_CPMIC_BYPASS); + if (arizona->bypass_cache) { + mutex_lock(&arizona->dapm->card->dapm_mutex); + snd_soc_dapm_disable_pin(arizona->dapm, "MICSUPP"); + mutex_unlock(&arizona->dapm->card->dapm_mutex); + + snd_soc_dapm_sync(arizona->dapm); + + regmap_update_bits(arizona->regmap, ARIZONA_MIC_CHARGE_PUMP_1, + ARIZONA_CPMIC_BYPASS, ARIZONA_CPMIC_BYPASS); + } + + regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_1, + ARIZONA_MICB1_BYPASS, ARIZONA_MICB1_BYPASS); + regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_2, + ARIZONA_MICB2_BYPASS, ARIZONA_MICB2_BYPASS); + regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_3, + ARIZONA_MICB3_BYPASS, ARIZONA_MICB3_BYPASS); + + return 0; +} +EXPORT_SYMBOL_GPL(arizona_enable_force_bypass); + +int arizona_disable_force_bypass(struct snd_soc_codec *codec) +{ + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + struct arizona_micbias *micbias = arizona->pdata.micbias; + + if (arizona->bypass_cache) { + mutex_lock(&arizona->dapm->card->dapm_mutex); + snd_soc_dapm_force_enable_pin(arizona->dapm, "MICSUPP"); + mutex_unlock(&arizona->dapm->card->dapm_mutex); + + snd_soc_dapm_sync(arizona->dapm); + + regmap_update_bits(arizona->regmap, ARIZONA_MIC_CHARGE_PUMP_1, + ARIZONA_CPMIC_BYPASS, 0); + } + + if (!micbias[0].bypass && micbias[0].mV) + regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_1, + ARIZONA_MICB1_BYPASS, 0); + if (!micbias[1].bypass && micbias[1].mV) + regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_2, + ARIZONA_MICB1_BYPASS, 0); + if (!micbias[2].bypass && micbias[2].mV) + regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_3, + ARIZONA_MICB1_BYPASS, 0); + + return 0; +} +EXPORT_SYMBOL_GPL(arizona_disable_force_bypass); + MODULE_DESCRIPTION("ASoC Wolfson Arizona class device support"); MODULE_AUTHOR("Mark Brown "); MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 4eb99596e56..824bcabbe2a 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -301,4 +301,7 @@ extern int arizona_set_ez2ctrl_cb(struct snd_soc_codec *codec, extern int arizona_set_custom_jd(struct snd_soc_codec *codec, const struct arizona_jd_state *custom_jd); +extern int arizona_enable_force_bypass(struct snd_soc_codec *codec); +extern int arizona_disable_force_bypass(struct snd_soc_codec *codec); + #endif From e87fc0739feadf7f45b3020a855278d5a8cbe3e0 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 24 Sep 2014 15:55:02 +0100 Subject: [PATCH 0454/1167] ASoC: arizona: Update FLL output check to use Fvco Changing the output on an active FLL is only a problem if Fvco changes. The final output divider is free to change. This patch updates the arizona_validate_fll function to use Fvco as a basis for checking if the new rate is acceptable. Change-Id: I1c3dbfa42db8cb791b3bd78e42ba29dbb8005122 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 48 +++++++++++++++++++------------------- sound/soc/codecs/arizona.h | 2 ++ 2 files changed, 26 insertions(+), 24 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 717d4f45afa..599a30d7cfa 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2208,11 +2208,9 @@ struct arizona_fll_cfg { static int arizona_validate_fll(struct arizona_fll *fll, unsigned int Fref, - unsigned int Fout) + unsigned int Fvco) { - unsigned int Fvco_min; - - if (fll->fout && Fout != fll->fout) { + if (fll->fvco && Fvco != fll->fvco) { arizona_fll_err(fll, "Can't change output on active FLL\n"); return -EINVAL; @@ -2225,13 +2223,6 @@ static int arizona_validate_fll(struct arizona_fll *fll, return -EINVAL; } - Fvco_min = ARIZONA_FLL_MIN_FVCO * fll->vco_mult; - if (Fout * ARIZONA_FLL_MAX_OUTDIV < Fvco_min) { - arizona_fll_err(fll, "No FLL_OUTDIV for Fout=%uHz\n", - Fout); - return -EINVAL; - } - return 0; } @@ -2335,20 +2326,13 @@ static int arizona_calc_fll(struct arizona_fll *fll, struct arizona_fll_cfg *cfg, unsigned int Fref, bool sync) { - unsigned int target, div, gcd_fll; + unsigned int target, gcd_fll; int i, ratio; arizona_fll_dbg(fll, "Fref=%u Fout=%u\n", Fref, fll->fout); - /* Fvco should be over the targt; don't check the upper bound */ - div = ARIZONA_FLL_MIN_OUTDIV; - while (fll->fout * div < ARIZONA_FLL_MIN_FVCO * fll->vco_mult) { - div++; - if (div > ARIZONA_FLL_MAX_OUTDIV) - return -EINVAL; - } - target = fll->fout * div / fll->vco_mult; - cfg->outdiv = div; + target = fll->fvco; + cfg->outdiv = fll->outdiv; arizona_fll_dbg(fll, "Fvco=%dHz\n", target); @@ -2568,7 +2552,7 @@ int arizona_set_fll_refclk(struct arizona_fll *fll, int source, return 0; if (fll->fout && Fref > 0) { - ret = arizona_validate_fll(fll, Fref, fll->fout); + ret = arizona_validate_fll(fll, Fref, fll->fvco); if (ret != 0) return ret; } @@ -2587,6 +2571,8 @@ EXPORT_SYMBOL_GPL(arizona_set_fll_refclk); int arizona_set_fll(struct arizona_fll *fll, int source, unsigned int Fref, unsigned int Fout) { + unsigned int Fvco = 0; + int div = 0; int ret = 0; if (fll->sync_src == source && @@ -2594,19 +2580,33 @@ int arizona_set_fll(struct arizona_fll *fll, int source, return 0; if (Fout) { + div = ARIZONA_FLL_MIN_OUTDIV; + while (Fout * div < ARIZONA_FLL_MIN_FVCO * fll->vco_mult) { + div++; + if (div > ARIZONA_FLL_MAX_OUTDIV) { + arizona_fll_err(fll, + "No FLL_OUTDIV for Fout=%uHz\n", + Fout); + return -EINVAL; + } + } + Fvco = Fout * div / fll->vco_mult; + if (fll->ref_src >= 0) { - ret = arizona_validate_fll(fll, fll->ref_freq, Fout); + ret = arizona_validate_fll(fll, fll->ref_freq, Fvco); if (ret != 0) return ret; } - ret = arizona_validate_fll(fll, Fref, Fout); + ret = arizona_validate_fll(fll, Fref, Fvco); if (ret != 0) return ret; } fll->sync_src = source; fll->sync_freq = Fref; + fll->fvco = Fvco; + fll->outdiv = div; fll->fout = Fout; if (Fout) diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 824bcabbe2a..6128399b7c0 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -265,6 +265,8 @@ struct arizona_fll { unsigned int vco_mult; struct completion ok; + unsigned int fvco; + int outdiv; unsigned int fout; int sync_src; unsigned int sync_freq; From e9eab48a19914873d65ce9768855c2c866538282 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 22 Sep 2014 06:10:34 +0100 Subject: [PATCH 0455/1167] ASoC: arizona: Only wait for FLL clock OK IRQ if FLL must relock We only need to wait for the FLL clock OK IRQ if the input settings of the FLL change. Changing the output divider does not require the FLL to relock. Change-Id: Idf3f3d8a428817c72b69d722adbfaffb871f2a51 Signed-off-by: Nikesh Oswal Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 65 +++++++++++++++++++++++++------------- 1 file changed, 43 insertions(+), 22 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 599a30d7cfa..c571633d649 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2389,39 +2389,51 @@ static int arizona_calc_fll(struct arizona_fll *fll, } -static void arizona_apply_fll(struct arizona *arizona, unsigned int base, +static bool arizona_apply_fll(struct arizona *arizona, unsigned int base, struct arizona_fll_cfg *cfg, int source, bool sync) { - regmap_update_bits(arizona->regmap, base + 3, - ARIZONA_FLL1_THETA_MASK, cfg->theta); - regmap_update_bits(arizona->regmap, base + 4, - ARIZONA_FLL1_LAMBDA_MASK, cfg->lambda); - regmap_update_bits(arizona->regmap, base + 5, + bool change, fll_change; + + fll_change = false; + regmap_update_bits_check(arizona->regmap, base + 3, + ARIZONA_FLL1_THETA_MASK, cfg->theta, &change); + fll_change |= change; + regmap_update_bits_check(arizona->regmap, base + 4, + ARIZONA_FLL1_LAMBDA_MASK, cfg->lambda, &change); + fll_change |= change; + regmap_update_bits_check(arizona->regmap, base + 5, ARIZONA_FLL1_FRATIO_MASK, - cfg->fratio << ARIZONA_FLL1_FRATIO_SHIFT); - regmap_update_bits(arizona->regmap, base + 6, + cfg->fratio << ARIZONA_FLL1_FRATIO_SHIFT, &change); + fll_change |= change; + regmap_update_bits_check(arizona->regmap, base + 6, ARIZONA_FLL1_CLK_REF_DIV_MASK | ARIZONA_FLL1_CLK_REF_SRC_MASK, cfg->refdiv << ARIZONA_FLL1_CLK_REF_DIV_SHIFT | - source << ARIZONA_FLL1_CLK_REF_SRC_SHIFT); + source << ARIZONA_FLL1_CLK_REF_SRC_SHIFT, &change); + fll_change |= change; if (sync) { - regmap_update_bits(arizona->regmap, base + 0x7, + regmap_update_bits_check(arizona->regmap, base + 0x7, ARIZONA_FLL1_GAIN_MASK, - cfg->gain << ARIZONA_FLL1_GAIN_SHIFT); + cfg->gain << ARIZONA_FLL1_GAIN_SHIFT, &change); + fll_change |= change; } else { regmap_update_bits(arizona->regmap, base + 0x5, ARIZONA_FLL1_OUTDIV_MASK, cfg->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT); - regmap_update_bits(arizona->regmap, base + 0x9, + regmap_update_bits_check(arizona->regmap, base + 0x9, ARIZONA_FLL1_GAIN_MASK, - cfg->gain << ARIZONA_FLL1_GAIN_SHIFT); + cfg->gain << ARIZONA_FLL1_GAIN_SHIFT, &change); + fll_change |= change; } - regmap_update_bits(arizona->regmap, base + 2, + regmap_update_bits_check(arizona->regmap, base + 2, ARIZONA_FLL1_CTRL_UPD | ARIZONA_FLL1_N_MASK, - ARIZONA_FLL1_CTRL_UPD | cfg->n); + ARIZONA_FLL1_CTRL_UPD | cfg->n, &change); + fll_change |= change; + + return fll_change; } static int arizona_is_enabled_fll(struct arizona_fll *fll) @@ -2447,10 +2459,14 @@ static int arizona_enable_fll(struct arizona_fll *fll) bool use_sync = false; int already_enabled = arizona_is_enabled_fll(fll); struct arizona_fll_cfg cfg; + bool fll_change; if (already_enabled < 0) return already_enabled; + arizona_fll_dbg(fll, "Enabling FLL, initially %s\n", + already_enabled?"enabled":"disabled"); + if (already_enabled) { /* Facilitate smooth refclk across the transition */ regmap_update_bits(fll->arizona->regmap, fll->base + 0x7, @@ -2467,19 +2483,19 @@ static int arizona_enable_fll(struct arizona_fll *fll) fll->ref_src != fll->sync_src) { arizona_calc_fll(fll, &cfg, fll->ref_freq, false); - arizona_apply_fll(arizona, fll->base, &cfg, fll->ref_src, + fll_change = arizona_apply_fll(arizona, fll->base, &cfg, fll->ref_src, false); if (fll->sync_src >= 0) { arizona_calc_fll(fll, &cfg, fll->sync_freq, true); - arizona_apply_fll(arizona, fll->base + 0x10, &cfg, + fll_change |= arizona_apply_fll(arizona, fll->base + 0x10, &cfg, fll->sync_src, true); use_sync = true; } } else if (fll->sync_src >= 0) { arizona_calc_fll(fll, &cfg, fll->sync_freq, false); - arizona_apply_fll(arizona, fll->base, &cfg, + fll_change = arizona_apply_fll(arizona, fll->base, &cfg, fll->sync_src, false); regmap_update_bits(arizona->regmap, fll->base + 0x11, @@ -2517,10 +2533,13 @@ static int arizona_enable_fll(struct arizona_fll *fll) regmap_update_bits(arizona->regmap, fll->base + 1, ARIZONA_FLL1_FREERUN, 0); - ret = wait_for_completion_timeout(&fll->ok, - msecs_to_jiffies(250)); - if (ret == 0) - arizona_fll_warn(fll, "Timed out waiting for lock\n"); + if (fll_change || !already_enabled) { + arizona_fll_dbg(fll, "Waiting for FLL lock...\n"); + ret = wait_for_completion_timeout(&fll->ok, + msecs_to_jiffies(250)); + if (ret == 0) + arizona_fll_warn(fll, "Timed out waiting for lock\n"); + } return 0; } @@ -2530,6 +2549,8 @@ static void arizona_disable_fll(struct arizona_fll *fll) struct arizona *arizona = fll->arizona; bool change; + arizona_fll_dbg(fll, "Disabling FLL\n"); + regmap_update_bits(arizona->regmap, fll->base + 1, ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN); regmap_update_bits_check(arizona->regmap, fll->base + 1, From 254c857d18646fea05c3a2c0f90516584c843842 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 18 Sep 2014 16:32:06 +0100 Subject: [PATCH 0456/1167] ASoC: wm_adsp: Add missing MODULE_LICENSE Since MODULE_LICENSE is missing the module load fails, so add this for module. Change-Id: Ia6e80335bb52a55066f103dcd2819d9aee63544b Signed-off-by: Praveen Diwakar Signed-off-by: Vinod Koul Reviewed-by: Charles Keepax Signed-off-by: Mark Brown Cc: stable@vger.kernel.org --- sound/soc/codecs/wm_adsp.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 7d15dea5759..366b96b72b6 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2955,3 +2955,5 @@ int wm_adsp_stream_avail(const struct wm_adsp *adsp) adsp->capt_buf_size); } EXPORT_SYMBOL_GPL(wm_adsp_stream_avail); + +MODULE_LICENSE("GPL v2"); From 739b3b8e6c7f709531c4fe6bfb38f4d581cfe818 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 8 Sep 2014 12:59:12 +0100 Subject: [PATCH 0457/1167] mfd: arizona: Disable DVFS boost in suspend When going into suspend disable the DVFS boost since it is illegal to have this enabled when DCVDD != 1.8v Change-Id: I2cd83bcae79dfcfefd3aac2502c4ab9807f767da Signed-off-by: Richard Fitzgerald --- drivers/mfd/arizona-core.c | 40 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index a6e09ff7453..421e1fb81bf 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -606,6 +606,32 @@ static int arizona_runtime_resume(struct device *dev) goto err; } + switch(arizona->type) { + case WM5102: + case WM8997: + case WM8998: + case WM1814: + /* Restore DVFS setting */ + ret = 0; + mutex_lock(&arizona->subsys_max_lock); + if (arizona->subsys_max_rq != 0) { + ret = regmap_update_bits(arizona->regmap, + ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, + ARIZONA_SUBSYS_MAX_FREQ, 1); + } + mutex_unlock(&arizona->subsys_max_lock); + + if (ret != 0) { + dev_err(arizona->dev, + "Failed to enable subsys max: %d\n", + ret); + goto err; + } + break; + default: + break; + } + return 0; err: @@ -621,6 +647,20 @@ static int arizona_runtime_suspend(struct device *dev) dev_dbg(arizona->dev, "Entering AoD mode\n"); + switch(arizona->type) { + case WM5102: + case WM8997: + case WM8998: + case WM1814: + /* Must disable DVFS boost before powering down DCVDD */ + regmap_update_bits(arizona->regmap, + ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, + ARIZONA_SUBSYS_MAX_FREQ, 0); + break; + default: + break; + } + if (arizona->external_dcvdd) { ret = regmap_update_bits(arizona->regmap, ARIZONA_ISOLATION_CONTROL, From 3aa2eb92b09644cde12a151128b0c320937e85a0 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Mon, 22 Sep 2014 13:32:04 +0100 Subject: [PATCH 0458/1167] mfd: arizona: Add additional HPDET registers Change-Id: I9217a72c2ff15723edb7bce08d902e4a47a501e4 Signed-off-by: Nariman Poushin Signed-off-by: Richard Fitzgerald Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 8 ++++++++ include/linux/mfd/arizona/registers.h | 18 ++++++++++++++++++ 2 files changed, 26 insertions(+) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 2bfded22754..81d2c4ab676 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -1933,6 +1933,8 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5: case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6: case ARIZONA_COMFORT_NOISE_GENERATOR: + case ARIZONA_HP_DETECT_CALIBRATION_1: + case ARIZONA_HP_DETECT_CALIBRATION_2: case ARIZONA_HAPTICS_CONTROL_1: case ARIZONA_HAPTICS_CONTROL_2: case ARIZONA_HAPTICS_PHASE_1_INTENSITY: @@ -2013,6 +2015,7 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_ACCESSORY_DETECT_MODE_1: case ARIZONA_HEADPHONE_DETECT_1: case ARIZONA_HEADPHONE_DETECT_2: + case ARIZONA_HEADPHONE_DETECT_3: case ARIZONA_MICD_CLAMP_CONTROL: case ARIZONA_MIC_DETECT_1: case ARIZONA_MIC_DETECT_2: @@ -2124,6 +2127,7 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_HP1_SHORT_CIRCUIT_CTRL: case ARIZONA_HP2_SHORT_CIRCUIT_CTRL: case ARIZONA_HP3_SHORT_CIRCUIT_CTRL: + case ARIZONA_HP_TEST_CTRL_1: case ARIZONA_SPK_CTRL_3: case ARIZONA_AIF1_BCLK_CTRL: case ARIZONA_AIF1_TX_PIN_CTRL: @@ -3052,6 +3056,8 @@ static bool florida_volatile_register(struct device *dev, unsigned int reg) switch (reg) { case ARIZONA_SOFTWARE_RESET: case ARIZONA_DEVICE_REVISION: + case ARIZONA_HP_DETECT_CALIBRATION_1: + case ARIZONA_HP_DETECT_CALIBRATION_2: case ARIZONA_HAPTICS_STATUS: case ARIZONA_SAMPLE_RATE_1_STATUS: case ARIZONA_SAMPLE_RATE_2_STATUS: @@ -3063,6 +3069,7 @@ static bool florida_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_HP_CTRL_1L: case ARIZONA_HP_CTRL_1R: case ARIZONA_HEADPHONE_DETECT_2: + case ARIZONA_HEADPHONE_DETECT_3: case ARIZONA_INPUT_ENABLES_STATUS: case ARIZONA_OUTPUT_STATUS_1: case ARIZONA_RAW_OUTPUT_STATUS_1: @@ -3072,6 +3079,7 @@ static bool florida_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_ADC_VCO_CAL_7: case ARIZONA_ADC_VCO_CAL_8: case ARIZONA_ADC_VCO_CAL_9: + case ARIZONA_HP_TEST_CTRL_1: case ARIZONA_SLIMBUS_RX_PORT_STATUS: case ARIZONA_SLIMBUS_TX_PORT_STATUS: case ARIZONA_INTERRUPT_STATUS_1: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index c4adb160366..7e5efe048e7 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -51,6 +51,8 @@ #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_7 0x6C #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_8 0x6D #define ARIZONA_COMFORT_NOISE_GENERATOR 0x70 +#define ARIZONA_HP_DETECT_CALIBRATION_1 0x87 +#define ARIZONA_HP_DETECT_CALIBRATION_2 0x88 #define ARIZONA_HAPTICS_CONTROL_1 0x90 #define ARIZONA_HAPTICS_CONTROL_2 0x91 #define ARIZONA_HAPTICS_PHASE_1_INTENSITY 0x92 @@ -133,6 +135,7 @@ #define ARIZONA_ACCESSORY_DETECT_MODE_1 0x293 #define ARIZONA_HEADPHONE_DETECT_1 0x29B #define ARIZONA_HEADPHONE_DETECT_2 0x29C +#define ARIZONA_HEADPHONE_DETECT_3 0x29D #define ARIZONA_HP_DACVAL 0x29F #define ARIZONA_MICD_CLAMP_CONTROL 0x2A2 #define ARIZONA_MIC_DETECT_1 0x2A3 @@ -250,6 +253,7 @@ #define ARIZONA_HP1_SHORT_CIRCUIT_CTRL 0x4A0 #define ARIZONA_HP2_SHORT_CIRCUIT_CTRL 0x4A1 #define ARIZONA_HP3_SHORT_CIRCUIT_CTRL 0x4A2 +#define ARIZONA_HP_TEST_CTRL_1 0x4A4 #define ARIZONA_SPK_CTRL_2 0x4B5 #define ARIZONA_SPK_CTRL_3 0x4B6 #define ARIZONA_DAC_COMP_1 0x4DC @@ -2393,6 +2397,13 @@ #define ARIZONA_HP_LVL_B_SHIFT 0 /* HP_LVL - [14:0] */ #define ARIZONA_HP_LVL_B_WIDTH 15 /* HP_LVL - [14:0] */ +/* + * R669 (0x29D) - Headphone Detect 3 + */ +#define ARIZONA_HP_DACVAL_MASK 0x03FF /* HP_DACVAL [9:0] */ +#define ARIZONA_HP_DACVAL_SHIFT 0 /* HP_DACVAL [9:0] */ +#define ARIZONA_HP_DACVAL_WIDTH 10 /* HP_DACVAL [9:0] */ + /* * R674 (0x2A2) - MICD clamp control */ @@ -3655,6 +3666,13 @@ #define ARIZONA_HP3_SC_ENA_SHIFT 12 /* HP3_SC_ENA */ #define ARIZONA_HP3_SC_ENA_WIDTH 1 /* HP3_SC_ENA */ +/* + * R1188 (0x4A4) HP Test Ctrl 1 + */ +#define ARIZONA_HP1_TST_CAP_SEL_MASK 0x0003 /* HP1_TST_CAP_SEL - [1:0] */ +#define ARIZONA_HP1_TST_CAP_SEL_SHIFT 0 /* HP1_TST_CAP_SEL - [1:0] */ +#define ARIZONA_HP1_TST_CAP_SEL_WIDTH 2 /* HP1_TST_CAP_SEL - [1:0] */ + /* * R1244 (0x4DC) - DAC comp 1 */ From a3e1141fc8fcd7c6e9fedb2bd61f2071c4be3a06 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 22 Sep 2014 13:34:39 +0100 Subject: [PATCH 0459/1167] switch: arizona: Update HPDET algorithm for Florida Use HPDET calibration trims when available from CODEC for greatly improved accuracy. Change-Id: Ia90b47e905e6c0e7cd29c984159758e7522c34ed Signed-off-by: Richard Fitzgerald Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 209 +++++++++++++++++++++++++++++++- 1 file changed, 208 insertions(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index f323d690221..3eb072e467f 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -31,6 +31,7 @@ #include #include #include +#include #include @@ -66,6 +67,11 @@ #define HP_LOW_IMPEDANCE_LIMIT 13 +struct arizona_hpdet_d_trims { + int off; + int grad_x2; +}; + struct arizona_extcon_info { struct device *dev; struct arizona *arizona; @@ -101,6 +107,7 @@ struct arizona_extcon_info { int jack_flips; int hpdet_ip; + const struct arizona_hpdet_d_trims *hpdet_d_trims; struct switch_dev edev; @@ -487,6 +494,69 @@ static struct { { 1000, 10000 }, }; +static const struct { + int min; + int max; + s64 C0; /* value * 1000000 */ + s64 C1; /* value * 10000 */ + s64 C2; /* not multiplied */ + s64 C3; /* value * 1000000 */ + s64 C4_x_C3; /* value * 1000000 */ + s64 C5; /* value * 1000000 */ +} arizona_hpdet_d_ranges[] = { + { 0, 30, 1007000, -7200, 4003, 69300000, 381150, 250000}, + { 8, 100, 1007000, -7200, 7975, 69600000, 382800, 250000}, + { 100, 1000, 9696000, -79500, 7300, 62900000, 345950, 250000}, + { 1000, 10000, 100684000, -949400, 7300, 63200000, 347600, 250000}, +}; + +#ifdef ARIZONA_HPDET_USE_DEFAULT_TRIMS +static struct arizona_hpdet_d_trims arizona_hpdet_d_trims_default[] = { + { -1, 5}, + { 0, 5 }, + { -2, 12 }, + { -3, 12 }, +}; +#endif + +static int arizona_hpdet_d_calibrate(const struct arizona_extcon_info *info, + int dacval, int range) +{ + int gradx2 = info->hpdet_d_trims[range].grad_x2; + int off = info->hpdet_d_trims[range].off; + s64 val = dacval; + s64 n; + + dev_warn(info->arizona->dev, "hpdet_d calib range %d dac %d\n", range, dacval); + + val = (val * 1000000) + 1500000; + val = div64_s64(val, arizona_hpdet_d_ranges[range].C2); + + n = div_s64(1000000000000, arizona_hpdet_d_ranges[range].C3 + + ((arizona_hpdet_d_ranges[range].C4_x_C3 * gradx2) / 2)); + n = val - n; + if (n == 0) + return ARIZONA_HPDET_MAX; + + val = arizona_hpdet_d_ranges[range].C0 + + (arizona_hpdet_d_ranges[range].C1 * off); + val *= 1000000; + + val = div_s64(val, n); + val -= arizona_hpdet_d_ranges[range].C5; + + /* Round up */ + val += 500000; + val = div_s64(val, 1000000); + + if (val < 0) + return 0; + else if (val > ARIZONA_HPDET_MAX) + return ARIZONA_HPDET_MAX; + + return (int)val; +} + static int arizona_hpdet_read(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; @@ -598,6 +668,50 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) arizona_hpdet_c_ranges[range].min); val = arizona_hpdet_c_ranges[range].min; } + break; + + case 3: + if (!(val & ARIZONA_HP_DONE_B)) { + dev_err(arizona->dev, "HPDET did not complete: %x\n", + val); + return -EAGAIN; + } + + val &= ARIZONA_HP_LVL_B_MASK; + val /= 2; + + regmap_read(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, + &range); + range = (range & ARIZONA_HP_IMPEDANCE_RANGE_MASK) + >> ARIZONA_HP_IMPEDANCE_RANGE_SHIFT; + + /* Skip up a range, or report? */ + if (range < ARRAY_SIZE(arizona_hpdet_d_ranges) - 1 && + (val >= arizona_hpdet_d_ranges[range].max)) { + range++; + dev_dbg(arizona->dev, "Moving to HPDET range %d-%d\n", + arizona_hpdet_d_ranges[range].min, + arizona_hpdet_d_ranges[range].max); + regmap_update_bits(arizona->regmap, + ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_IMPEDANCE_RANGE_MASK, + range << + ARIZONA_HP_IMPEDANCE_RANGE_SHIFT); + return -EAGAIN; + } + + ret = regmap_read(arizona->regmap, + ARIZONA_HEADPHONE_DETECT_3, + &val); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read HP value: %d\n", + ret); + return -EAGAIN; + } + + val = (val >> ARIZONA_HP_DACVAL_SHIFT) & ARIZONA_HP_DACVAL_MASK; + val = arizona_hpdet_d_calibrate(info, val, range); + break; } if (info->arizona->pdata.hpdet_ext_res) { @@ -1790,6 +1904,92 @@ static ssize_t arizona_extcon_show(struct device *dev, return scnprintf(buf, PAGE_SIZE, "%d\n", info->arizona->hp_impedance); } +static int arizona_hp_trim_signify(int raw, int value_mask) +{ + if (raw > value_mask) + return value_mask + 1 - raw; + else + return raw; +} + +static int arizona_hpdet_d_read_calibration(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + struct arizona_hpdet_d_trims *trims; + int off_range1; + int coeff_range0, coeff_range2, coeff_range3; + int grad_range1_0, grad_range3_2; + unsigned int v1, v2; + int ret = -EIO; + +#ifdef ARIZONA_HPDET_USE_DEFAULT_TRIMS + info->hpdet_d_trims = arizona_hpdet_d_trims_default; +#endif + + ret = regmap_read(arizona->regmap, 0x0087, &v1); + if (ret >= 0) { + ret = regmap_read(arizona->regmap, 0x0088, &v2); + } + + if (ret < 0) { + dev_warn(arizona->dev, "Failed to read HP trims %d\n", ret); + return ret; + } + + if ((v1 == 0) || (v2 == 0) || (v1 == 0xFFFF) || (v2 == 0xFFFF)) { + dev_warn(arizona->dev, "No HP trims\n"); + return 0; + } + + trims = devm_kzalloc(info->dev, + 4 * sizeof(struct arizona_hpdet_d_trims), + GFP_KERNEL); + if (!trims) { + dev_err(arizona->dev, "Failed to alloc hpdet trims\n"); + return -ENOMEM; + } + + coeff_range0 = v1 & 0xf; + coeff_range0 = arizona_hp_trim_signify(coeff_range0, 0x7); + + coeff_range2 = (v1 >> 10) & 0xf; + coeff_range2 = arizona_hp_trim_signify(coeff_range2, 0x7); + + coeff_range3 = ((v1 >> 14) & 0x3) | ((v2 >> 12) & 0xc); + coeff_range3 = arizona_hp_trim_signify(coeff_range3, 0x7); + + off_range1 = (v1 >> 4) & 0x3f; + off_range1 = arizona_hp_trim_signify(off_range1, 0x1f); + + grad_range1_0 = v2 & 0x7f; + grad_range1_0 = arizona_hp_trim_signify(grad_range1_0, 0x3f); + + grad_range3_2 = (v2 >> 7) & 0x7f; + grad_range3_2 = arizona_hp_trim_signify(grad_range3_2, 0x3f); + + trims[0].off = coeff_range0 + off_range1; + trims[1].off = off_range1; + trims[2].off = coeff_range2 + off_range1; + trims[3].off = coeff_range3 + off_range1; + trims[0].grad_x2 = grad_range1_0 * 2; + trims[1].grad_x2 = grad_range1_0 * 2; + trims[2].grad_x2 = grad_range3_2 * 2; + trims[3].grad_x2 = grad_range3_2 * 2; + + info->hpdet_d_trims = trims; + + dev_dbg(arizona->dev, "Set trims %d,%d %d,%d %d,%d %d,%d\n", + trims[0].off, + trims[0].grad_x2, + trims[1].off, + trims[1].grad_x2, + trims[2].off, + trims[2].grad_x2, + trims[3].off, + trims[3].grad_x2); + return 0; +} + static int arizona_extcon_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); @@ -1861,7 +2061,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; default: info->micd_clamp = true; - info->hpdet_ip = 2; + info->hpdet_ip = 3; break; } break; @@ -2055,6 +2255,12 @@ static int arizona_extcon_probe(struct platform_device *pdev) pm_runtime_idle(&pdev->dev); pm_runtime_get_sync(&pdev->dev); + if (info->hpdet_ip == 3) { + arizona_hpdet_d_read_calibration(info); + if (!info->hpdet_d_trims) + info->hpdet_ip = 2; + } + if (arizona->pdata.jd_gpio5) { jack_irq_rise = ARIZONA_IRQ_MICD_CLAMP_RISE; jack_irq_fall = ARIZONA_IRQ_MICD_CLAMP_FALL; @@ -2188,6 +2394,7 @@ static int arizona_extcon_remove(struct platform_device *pdev) device_remove_file(&pdev->dev, &dev_attr_hp_impedance); switch_dev_unregister(&info->edev); wakeup_source_trash(&info->detection_wake_lock); + kfree(info->hpdet_d_trims); return 0; } From 481f361a5b16a0c42d0636f3b892a8c13d8f949a Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 30 Sep 2014 17:26:44 +0100 Subject: [PATCH 0460/1167] switch: arizona: Additional settings to improve accuracy of HP detect If the TST_CAP_SEL bits aren't set correctly there will be a 100k load along side the headphones, which will affect the accurary towards the very top of the detection range. Change-Id: I354b2f5c0eed83a05ec81c784a20dbf6a2f64ca4 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 3eb072e467f..10c6687e6d3 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -244,6 +244,7 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, { struct arizona *arizona = info->arizona; unsigned int mask, val = 0; + unsigned int cap_sel = 0; int ret; switch (arizona->type) { @@ -255,10 +256,22 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, case WM5110: mask = ARIZONA_HP1L_SHRTO | ARIZONA_HP1L_FLWR | ARIZONA_HP1L_SHRTI; - if (clamp) + if (clamp) { val = ARIZONA_HP1L_SHRTO; - else + cap_sel = 1; + } else { val = ARIZONA_HP1L_FLWR | ARIZONA_HP1L_SHRTI; + cap_sel = 3; + } + + ret = regmap_update_bits(arizona->regmap, + ARIZONA_HP_TEST_CTRL_1, + ARIZONA_HP1_TST_CAP_SEL_MASK, + cap_sel); + if (ret != 0) + dev_warn(arizona->dev, + "Failed to set TST_CAP_SEL: %d\n", + ret); break; default: mask = ARIZONA_RMV_SHRT_HP1L; From 5799d1aa500085ba92fffb9d3556baa85ffbfbee Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 20 May 2013 11:02:28 +0100 Subject: [PATCH 0461/1167] ASoC: arizona: Add support for FX rate selection Change-Id: I1095e25a6c4c587920bab298a12108b37d40dbee Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 6 ++++++ sound/soc/codecs/arizona.h | 1 + sound/soc/codecs/florida.c | 2 ++ sound/soc/codecs/wm5102.c | 2 ++ 4 files changed, 11 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index c571633d649..300eaf8a7be 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -589,6 +589,12 @@ const struct soc_enum arizona_input_rate = arizona_rate_val); EXPORT_SYMBOL_GPL(arizona_input_rate); +const struct soc_enum arizona_fx_rate = + SOC_VALUE_ENUM_SINGLE(ARIZONA_FX_CTRL1, + ARIZONA_FX_RATE_SHIFT, 0xf, + ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val); +EXPORT_SYMBOL_GPL(arizona_fx_rate); const SOC_ENUM_SINGLE_DECL(arizona_spdif_rate, ARIZONA_SPD1_TX_CONTROL, diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 6128399b7c0..20863dab6b7 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -211,6 +211,7 @@ extern const struct soc_enum arizona_isrc_fsh[]; extern const struct soc_enum arizona_asrc_rate1; extern const struct soc_enum arizona_input_rate; extern const struct soc_enum arizona_output_rate; +extern const struct soc_enum arizona_fx_rate; extern const struct soc_enum arizona_spdif_rate; extern const struct soc_enum arizona_in_vi_ramp; diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index a9fcf1e4d9e..896c3514ca8 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -443,6 +443,8 @@ SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), ARIZONA_SAMPLE_RATE_CONTROL("Sample Rate 2", 2), ARIZONA_SAMPLE_RATE_CONTROL("Sample Rate 3", 3), +SOC_VALUE_ENUM("FX Rate", arizona_fx_rate), + SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), SOC_VALUE_ENUM("ISRC3 FSL", arizona_isrc_fsl[2]), diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 7f7505f98c5..965469f4e83 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -877,6 +877,8 @@ SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), ARIZONA_SAMPLE_RATE_CONTROL_DVFS("Sample Rate 2", 2), ARIZONA_SAMPLE_RATE_CONTROL_DVFS("Sample Rate 3", 3), +SOC_VALUE_ENUM("FX Rate", arizona_fx_rate), + SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), From 232a3906fa583b0785b97d7b0f2c56d4392e72c3 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 2 Oct 2014 14:15:14 +0100 Subject: [PATCH 0462/1167] mfd: florida: HP_CTRL_XX registers should all be marked as volatile Change-Id: I731ecfdfedda7e83e480347fcb0a54dc01478bad Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 81d2c4ab676..2579239b211 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -3068,6 +3068,10 @@ static bool florida_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_MIC_DETECT_4: case ARIZONA_HP_CTRL_1L: case ARIZONA_HP_CTRL_1R: + case ARIZONA_HP_CTRL_2L: + case ARIZONA_HP_CTRL_2R: + case ARIZONA_HP_CTRL_3L: + case ARIZONA_HP_CTRL_3R: case ARIZONA_HEADPHONE_DETECT_2: case ARIZONA_HEADPHONE_DETECT_3: case ARIZONA_INPUT_ENABLES_STATUS: From a37867f72dcfd58b22b2258f49eac6f5e2c02033 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 2 Oct 2014 14:16:43 +0100 Subject: [PATCH 0463/1167] ASoC: florida: Add delay after SYSCLK patch When updating the write sequencer we must ensure there is a small delay before anything uses the write sequencer after the patch has been applied. Change-Id: Ia643033595a07cff3c4a90e526e75180b6e6d67f Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 2 ++ sound/soc/codecs/florida.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 300eaf8a7be..9b74f015616 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1057,6 +1057,7 @@ static int florida_hp_pre_enable(struct snd_soc_dapm_widget *w) florida_no_dre_left_enable, ARRAY_SIZE(florida_no_dre_left_enable)); } + udelay(1000); break; case ARIZONA_OUT1R_ENA_SHIFT: if (val & ARIZONA_DRE1R_ENA_MASK) { @@ -1068,6 +1069,7 @@ static int florida_hp_pre_enable(struct snd_soc_dapm_widget *w) florida_no_dre_right_enable, ARRAY_SIZE(florida_no_dre_right_enable)); } + udelay(1000); break; default: diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 896c3514ca8..21eb4b7c293 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -215,6 +215,8 @@ static int florida_sysclk_ev(struct snd_soc_dapm_widget *w, break; } + msleep(10); + return 0; } From 860a32f4dda1d830d51025107ef4d5cb1f5adcae Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 7 Oct 2014 10:59:41 +0100 Subject: [PATCH 0464/1167] regulator: arizona-micsupp: Add delay after writing bypass Change-Id: I9ec8647e33d9f5abab247a6e7669e88d71c5da27 Signed-off-by: Charles Keepax --- drivers/regulator/arizona-micsupp.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/regulator/arizona-micsupp.c b/drivers/regulator/arizona-micsupp.c index b0464e06601..13cc1d15512 100644 --- a/drivers/regulator/arizona-micsupp.c +++ b/drivers/regulator/arizona-micsupp.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -144,6 +145,7 @@ static int arizona_micsupp_set_bypass(struct regulator_dev *rdev, bool ena) int ret; ret = regulator_set_bypass_regmap(rdev, ena); + udelay(1000); if (ret == 0) schedule_work(&micsupp->check_cp_work); From ef8022de17fa7f296843ecc11334a1f23e2f267d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 8 Oct 2014 13:24:19 +0100 Subject: [PATCH 0465/1167] ASoC: arizona: Poll for FLL clock OK rather than use interrupts As we may change the FLL from within IRQ handler threads and our IRQs are marked as ONE_SHOT we need to poll for the FLL clock OK. Change-Id: I3e30a184311788c453732d2c472c40899b9ab67a Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 48 ++++++++++++++++++++------------------ 1 file changed, 25 insertions(+), 23 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 9b74f015616..36601f6275d 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2170,17 +2170,6 @@ int arizona_init_dai(struct arizona_priv *priv, int id) } EXPORT_SYMBOL_GPL(arizona_init_dai); -static irqreturn_t arizona_fll_clock_ok(int irq, void *data) -{ - struct arizona_fll *fll = data; - - arizona_fll_dbg(fll, "clock OK\n"); - - complete(&fll->ok); - - return IRQ_HANDLED; -} - static struct { unsigned int min; unsigned int max; @@ -2463,7 +2452,6 @@ static int arizona_is_enabled_fll(struct arizona_fll *fll) static int arizona_enable_fll(struct arizona_fll *fll) { struct arizona *arizona = fll->arizona; - int ret; bool use_sync = false; int already_enabled = arizona_is_enabled_fll(fll); struct arizona_fll_cfg cfg; @@ -2542,10 +2530,18 @@ static int arizona_enable_fll(struct arizona_fll *fll) ARIZONA_FLL1_FREERUN, 0); if (fll_change || !already_enabled) { + int i; + unsigned int val = 0; arizona_fll_dbg(fll, "Waiting for FLL lock...\n"); - ret = wait_for_completion_timeout(&fll->ok, - msecs_to_jiffies(250)); - if (ret == 0) + for (i = 0; i < 25; i++) { + regmap_read(arizona->regmap, + ARIZONA_INTERRUPT_RAW_STATUS_5, + &val); + if (val & (ARIZONA_FLL1_CLOCK_OK_STS << (fll->id - 1))) + break; + msleep(10); + } + if (i == 25) arizona_fll_warn(fll, "Timed out waiting for lock\n"); } @@ -2556,6 +2552,8 @@ static void arizona_disable_fll(struct arizona_fll *fll) { struct arizona *arizona = fll->arizona; bool change; + int i; + unsigned int val = 0; arizona_fll_dbg(fll, "Disabling FLL\n"); @@ -2568,6 +2566,18 @@ static void arizona_disable_fll(struct arizona_fll *fll) regmap_update_bits(arizona->regmap, fll->base + 1, ARIZONA_FLL1_FREERUN, 0); + arizona_fll_dbg(fll, "Waiting for FLL disable...\n"); + for (i = 0; i < 25; i++) { + regmap_read(arizona->regmap, + ARIZONA_INTERRUPT_RAW_STATUS_5, + &val); + if (!(val & (ARIZONA_FLL1_CLOCK_OK_STS << (fll->id - 1)))) + break; + msleep(10); + } + if (i == 25) + arizona_fll_warn(fll, "Timed out waiting for disable\n"); + if (change) pm_runtime_put_autosuspend(arizona->dev); } @@ -2650,7 +2660,6 @@ EXPORT_SYMBOL_GPL(arizona_set_fll); int arizona_init_fll(struct arizona *arizona, int id, int base, int lock_irq, int ok_irq, struct arizona_fll *fll) { - int ret; unsigned int val; init_completion(&fll->ok); @@ -2676,13 +2685,6 @@ int arizona_init_fll(struct arizona *arizona, int id, int base, int lock_irq, snprintf(fll->clock_ok_name, sizeof(fll->clock_ok_name), "FLL%d clock OK", id); - ret = arizona_request_irq(arizona, ok_irq, fll->clock_ok_name, - arizona_fll_clock_ok, fll); - if (ret != 0) { - dev_err(arizona->dev, "Failed to get FLL%d clock OK IRQ: %d\n", - id, ret); - } - regmap_update_bits(arizona->regmap, fll->base + 1, ARIZONA_FLL1_FREERUN, 0); From 651f2ddd154a067782cf68a5197c6c1c8b0df014 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Wed, 2 Jul 2014 14:28:46 +0100 Subject: [PATCH 0466/1167] mfd: arizona: Rid data size incompatibility warn when building for 64bit MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Extinguishes: ../drivers/mfd/arizona-core.c: In function ‘arizona_of_get_type’: ../drivers/mfd/arizona-core.c:505:10: warning: cast from pointer to integer of different size Signed-off-by: Lee Jones (cherry picked from commit 942786e6e647cef94cf96dcd836d343be55fc452) Change-Id: I757d41719ad21f03273534861249355a4438be4d Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 4 ++-- drivers/mfd/arizona-i2c.c | 5 +++-- drivers/mfd/arizona-spi.c | 3 ++- drivers/mfd/arizona.h | 4 ++-- 4 files changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 421e1fb81bf..5eba600beaf 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -762,12 +762,12 @@ const struct dev_pm_ops arizona_pm_ops = { EXPORT_SYMBOL_GPL(arizona_pm_ops); #ifdef CONFIG_OF -int arizona_of_get_type(struct device *dev) +unsigned long arizona_of_get_type(struct device *dev) { const struct of_device_id *id = of_match_device(arizona_of_match, dev); if (id) - return (int)id->data; + return (unsigned long)id->data; else return 0; } diff --git a/drivers/mfd/arizona-i2c.c b/drivers/mfd/arizona-i2c.c index 7c97cb8eb8a..3346c0c0a65 100644 --- a/drivers/mfd/arizona-i2c.c +++ b/drivers/mfd/arizona-i2c.c @@ -23,11 +23,12 @@ #include "arizona.h" static int arizona_i2c_probe(struct i2c_client *i2c, - const struct i2c_device_id *id) + const struct i2c_device_id *id) { struct arizona *arizona; const struct regmap_config *regmap_config; - int ret, type; + unsigned long type; + int ret; if (i2c->dev.of_node) type = arizona_of_get_type(&i2c->dev); diff --git a/drivers/mfd/arizona-spi.c b/drivers/mfd/arizona-spi.c index 8d6455d1204..a30ad5df2d6 100644 --- a/drivers/mfd/arizona-spi.c +++ b/drivers/mfd/arizona-spi.c @@ -27,7 +27,8 @@ static int arizona_spi_probe(struct spi_device *spi) const struct spi_device_id *id = spi_get_device_id(spi); struct arizona *arizona; const struct regmap_config *regmap_config; - int ret, type; + unsigned long type; + int ret; if (spi->dev.of_node) type = arizona_of_get_type(&spi->dev); diff --git a/drivers/mfd/arizona.h b/drivers/mfd/arizona.h index 4438d6c078f..fa50af8b5d7 100644 --- a/drivers/mfd/arizona.h +++ b/drivers/mfd/arizona.h @@ -52,9 +52,9 @@ int arizona_irq_init(struct arizona *arizona); int arizona_irq_exit(struct arizona *arizona); #ifdef CONFIG_OF -int arizona_of_get_type(struct device *dev); +unsigned long arizona_of_get_type(struct device *dev); #else -static inline int arizona_of_get_type(struct device *dev) +static inline unsigned long arizona_of_get_type(struct device *dev) { return 0; } From de03519965064667dee91bddcb2a361fd2027f29 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 10 Oct 2014 13:30:39 +0100 Subject: [PATCH 0467/1167] ASoC: wm_adsp: Use correct printf specifier for size_t Change-Id: I4f28f035135e7d1dc0509b8d2a900dd0ce6cb441 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 366b96b72b6..e18b70dd88f 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2913,7 +2913,7 @@ int wm_adsp_stream_read(struct wm_adsp *adsp, char __user *buf, size_t count) if (avail < count) count = avail; - adsp_dbg(adsp, "%s: avail=%d toend=%d count=%d\n", + adsp_dbg(adsp, "%s: avail=%d toend=%d count=%zo\n", __func__, avail, to_end, count); if (count > to_end) { From 60ed6ee7a3790c130b8a265093be1baf43b4b0e8 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 30 Sep 2014 13:33:25 +0100 Subject: [PATCH 0468/1167] mfd: arizona: Correct whitespace error Change-Id: Ifb82b74e1d28748df1968e4e34e12c7364fa48f1 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 5eba600beaf..ff5b4613959 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -237,7 +237,7 @@ static irqreturn_t arizona_overclocked(int irq, void *data) struct arizona *arizona = data; unsigned int val[3]; int ret; - + ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, &val[0], 3); if (ret != 0) { From cadf803b29bada38ace42a420814da77e965f2d9 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 30 Sep 2014 14:16:24 +0100 Subject: [PATCH 0469/1167] mfd: florida: Remove defaults for volatile registers Change-Id: I093c05a0c0c914efe9da9cb2b77bbc26c20f5a9a Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 2579239b211..00a792a9701 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -1831,14 +1831,9 @@ static const struct reg_default florida_reg_default[] = { { 0x00000FC3, 0x0000 }, /* R4035 - ANC Coefficient */ { 0x00000FC4, 0x0000 }, /* R4036 - ANC Coefficient */ { 0x00001100, 0x0010 }, /* R4352 - DSP1 Control 1 */ - { 0x00001101, 0x0000 }, /* R4353 - DSP1 Clocking 1 */ { 0x00001200, 0x0010 }, /* R4608 - DSP2 Control 1 */ - { 0x00001201, 0x0000 }, /* R4609 - DSP2 Clocking 1 */ { 0x00001300, 0x0010 }, /* R4864 - DSP3 Control 1 */ - { 0x00001301, 0x0000 }, /* R4865 - DSP3 Clocking 1 */ { 0x00001400, 0x0010 }, /* R5120 - DSP4 Control 1 */ - { 0x00001401, 0x0000 }, /* R5121 - DSP4 Clocking 1 */ - { 0x00001404, 0x0000 }, /* R5124 - DSP4 Status 1 */ }; static bool florida_is_rev_b_adsp_memory(unsigned int reg) From 2b7655a2a9582e58942243557d503f4525937ccf Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 6 Oct 2014 09:34:07 +0100 Subject: [PATCH 0470/1167] ASoC: florida: Reduce delay after SYSCLK patch is applied The 10mS is significantly more than is required after updating the write sequencer registers. This patch reduces the delay to 1mS. Change-Id: I1482b82eda2ff0b9384706326256febcdc8db706 Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 21eb4b7c293..7c656ca76a9 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -215,7 +215,7 @@ static int florida_sysclk_ev(struct snd_soc_dapm_widget *w, break; } - msleep(10); + udelay(1000); return 0; } From bc8a587697c923b12027f7457fb71528b6ea254c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 30 Sep 2014 10:07:00 +0100 Subject: [PATCH 0471/1167] switch: arizona: Apply input clear for wm8280 as well as wm5110 Change-Id: If99fd8f7a39e7191003af4ff43cd8998491b0de2 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 10c6687e6d3..eff45774d3d 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1585,6 +1585,7 @@ static irqreturn_t arizona_micdet(int irq, void *data) debounce = 0; switch (arizona->type) { + case WM8280: case WM5110: info->first_clear = true; schedule_delayed_work(&info->micd_clear_work, From 1fab700b4e4317c0de3e2d99f2ba295de2def8bb Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 30 Sep 2014 10:08:42 +0100 Subject: [PATCH 0472/1167] switch: arizona: Only apply input clear for florida revs below G Change-Id: Idefd3b2fd7a787b5c8b99a6c550f1610191aa71b Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index eff45774d3d..cfa510791d0 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1587,9 +1587,11 @@ static irqreturn_t arizona_micdet(int irq, void *data) switch (arizona->type) { case WM8280: case WM5110: - info->first_clear = true; - schedule_delayed_work(&info->micd_clear_work, - msecs_to_jiffies(80)); + if (arizona->rev < 6) { + info->first_clear = true; + schedule_delayed_work(&info->micd_clear_work, + msecs_to_jiffies(80)); + } break; default: break; From 425b6595776d66e90090ecb090ed719dcee55c76 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 30 Sep 2014 10:07:27 +0100 Subject: [PATCH 0473/1167] ASoC: florida: Apply input clear for wm8280 as well as wm5110 Change-Id: I653f22b8b4f94b778c51ea4b7b1ea3ea3e109ed5 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 36601f6275d..eddfe71ce57 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -881,6 +881,7 @@ static int arizona_update_input(struct arizona* arizona, bool enable) unsigned int val; switch (arizona->type) { + case WM8280: case WM5110: break; default: From 4625e089d104c7a494a1eaccc412f6bbad68df96 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 30 Sep 2014 10:09:23 +0100 Subject: [PATCH 0474/1167] ASoC: florida: Only apply input clear for revs below G Change-Id: I226525497d2d945400015fa4c714b70ebc3f2293 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index eddfe71ce57..47db5c2864d 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -883,6 +883,8 @@ static int arizona_update_input(struct arizona* arizona, bool enable) switch (arizona->type) { case WM8280: case WM5110: + if (arizona->rev >= 6) + return 0; break; default: return 0; From c71f2a5a1c7625ed5d12d277ee463d18f6c4f243 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 15 Oct 2014 14:25:57 +0100 Subject: [PATCH 0475/1167] Documentation: Add WM8998/WM1814 device tree bindings Change-Id: Ieab1e074eb70bad6818731a10b2ceb5541d1166d Signed-off-by: Richard Fitzgerald --- Documentation/devicetree/bindings/mfd/arizona.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 752524810a3..4b70494bbf3 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -11,6 +11,9 @@ Required properties: "wlf,wm8280" "wlf,wm8281" "wlf,wm8997" + "wlf,WM8998" + "wlf,wm1814" + - reg : I2C slave address when connected using I2C, chip select number when using SPI. From 8aba3a170f0279652fe708c7c4add08093b0b429 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 23 Oct 2014 11:16:48 +0100 Subject: [PATCH 0476/1167] Documentation: wolfson-arizona: WM8998 inmode pdata settings Describe the behaviour of the inmode pdata for the muxed inputs on the WM8998. Change-Id: I6069b4b7d38c04396ec2fc767c257f6f3b4c4321 Signed-off-by: Richard Fitzgerald --- Documentation/sound/alsa/soc/wolfson-arizona.txt | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/sound/alsa/soc/wolfson-arizona.txt b/Documentation/sound/alsa/soc/wolfson-arizona.txt index da2f6d718fa..38b6d06f368 100644 --- a/Documentation/sound/alsa/soc/wolfson-arizona.txt +++ b/Documentation/sound/alsa/soc/wolfson-arizona.txt @@ -147,3 +147,17 @@ To change from a digital IN1A to an analogue IN1B follow this sequence: 2) Change the IN1MUXL and IN1MUXR to IN1B 3) Connect IN1 as an input to codec blocks +The input mode pdata for WM8998 is defined as: + + pdata affects legal values behaviour + inmode[0] IN1 ARIZONA_INMODE_DIFF (0) IN1A and IN1B analogue differential + ARIZONA_INMODE_SE (1) IN1A and IN1B analogue single-ended + ARIZONA_INMODE_DMIC (2) IN1A digital, IN1B analogue differential + ARIZONA_INMODE_DMIC | + ARIZONA_INMODE_SE (3) IN1A digital, IN1B analogue single-ended + + inmode[1] IN2 ARIZONA_INMODE_DIFF (0) IN2A and IN2B analogue differential + ARIZONA_INMODE_SE (1) IN2A and IN2B analogue single-ended + ARIZONA_INMODE_DMIC (2) IN2A digital, IN2B analogue differential + ARIZONA_INMODE_DMIC | + ARIZONA_INMODE_SE (3) IN2A digital, IN2B analogue single-ended From 2c21582902179fa4bb232fa103e6a1c13675422a Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 22 Oct 2014 09:39:35 +0100 Subject: [PATCH 0477/1167] ASoC: arizona: Silence false positive warning on older compilers Change-Id: I430f4077144c073d9961aa04b67b83ae20afaa17 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 47db5c2864d..922227c9add 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1899,7 +1899,7 @@ static int arizona_hw_params(struct snd_pcm_substream *substream, int tdm_slots = arizona->tdm_slots[dai->id - 1]; int bclk, lrclk, wl, frame, bclk_target; bool reconfig; - unsigned int aif_tx_state, aif_rx_state; + unsigned int aif_tx_state = 0, aif_rx_state = 0; if (params_rate(params) % 8000) rates = &arizona_44k1_bclk_rates[0]; From 7361946f0becc9bc1603c068ca129902c009c200 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 21 Oct 2014 13:56:26 +0100 Subject: [PATCH 0478/1167] ASoC: arizona: Use correct mic bypass register constants Change-Id: I5db56d85680620184c0448cfcbe3f374b68cc65e Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 922227c9add..8a7711fbf5e 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2823,10 +2823,10 @@ int arizona_disable_force_bypass(struct snd_soc_codec *codec) ARIZONA_MICB1_BYPASS, 0); if (!micbias[1].bypass && micbias[1].mV) regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_2, - ARIZONA_MICB1_BYPASS, 0); + ARIZONA_MICB2_BYPASS, 0); if (!micbias[2].bypass && micbias[2].mV) regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_3, - ARIZONA_MICB1_BYPASS, 0); + ARIZONA_MICB3_BYPASS, 0); return 0; } From dad56904a304428df89b1cc28b4c8c208b6ccce8 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 23 Oct 2014 11:02:33 +0100 Subject: [PATCH 0479/1167] ASoC: wm8998: comment the IN1 mux control The handling of the IN1MUX could benefit from some comments to explain why it needs to do what it does Change-Id: Iab763ba87986229c793aea9b845ca4c46b9dc585 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm8998.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/wm8998.c b/sound/soc/codecs/wm8998.c index cdde18260e0..444de6a81ba 100644 --- a/sound/soc/codecs/wm8998.c +++ b/sound/soc/codecs/wm8998.c @@ -1173,17 +1173,20 @@ static int wm8998_in1mux_ev(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_PRE_PMU: + /* Validate the mux configuration */ left_mux = snd_soc_read(codec, ARIZONA_ADC_DIGITAL_VOLUME_1L) & ARIZONA_IN1L_SRC_MASK; right_mux = snd_soc_read(codec, ARIZONA_ADC_DIGITAL_VOLUME_1R) & ARIZONA_IN1R_SRC_MASK; + /* Only IN1A can be digital, IN1B is always analogue */ in1mode = (arizona->pdata.inmode[0] & 2) << (ARIZONA_IN1_MODE_SHIFT - 1); if (in1mode != 0) { - /* IN1A is digital, check whether IN1A is selected */ - + /* if IN1A is digital, the only valid mux configs + * are both channels A or both channels B. + */ if (left_mux != right_mux) { dev_err(arizona->dev, "IN1=DMIC and 'IN1MUXL Input'" @@ -1191,8 +1194,11 @@ static int wm8998_in1mux_ev(struct snd_soc_dapm_widget *w, return -EINVAL; } + /* IN1A is digital so need to ensure mode is set back + * to analogue if IN1B is selected + */ if (left_mux != 0) - in1mode = 0; /* IN1B selected, set analogue */ + in1mode = 0; } old = snd_soc_read(codec, ARIZONA_IN1L_CONTROL) & From b6faf7d6f828c505cf005235b1951873d809650c Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 23 Oct 2014 14:55:40 +0100 Subject: [PATCH 0480/1167] mfd: arizona: Add support for CS47L24 Change-Id: I495165d7eb89e9ac943cc8bfd252f24ad7b66ec0 Signed-off-by: Richard Fitzgerald --- drivers/mfd/Kconfig | 6 + drivers/mfd/Makefile | 3 + drivers/mfd/arizona-core.c | 59 +- drivers/mfd/arizona-irq.c | 42 +- drivers/mfd/arizona-spi.c | 9 + drivers/mfd/arizona.h | 5 + drivers/mfd/cs47l24-tables.c | 1636 ++++++++++++++++++++++++++++++ include/linux/mfd/arizona/core.h | 4 + 8 files changed, 1745 insertions(+), 19 deletions(-) create mode 100644 drivers/mfd/cs47l24-tables.c diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 6127dae4aba..fb0e3e53987 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1056,6 +1056,12 @@ config MFD_WM8997 help Support for Wolfson Microelectronics WM8997 low power audio SoC +config MFD_CS47L24 + bool "Cirrus Logic CS47L24" + depends on MFD_ARIZONA + help + Support for Cirrus Logic CS47L24 low power audio SoC + config MFD_WM8400 bool "Wolfson Microelectronics WM8400" select MFD_CORE diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 8fda1f6aad2..99da3b7df06 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -49,6 +49,9 @@ endif ifneq ($(CONFIG_MFD_WM8998),n) obj-$(CONFIG_MFD_WM8998) += wm8998-tables.o endif +ifneq ($(CONFIG_MFD_CS47L24),n) +obj-$(CONFIG_MFD_ARIZONA) += cs47l24-tables.o +endif obj-$(CONFIG_MFD_WM8400) += wm8400-core.o wm831x-objs := wm831x-core.o wm831x-irq.o wm831x-otp.o wm831x-objs += wm831x-auxadc.o diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index ff5b4613959..309d87a757d 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1,6 +1,7 @@ /* * Arizona core driver * + * Copyright 2014 CirrusLogic, Inc. * Copyright 2012 Wolfson Microelectronics plc * * Author: Mark Brown @@ -1041,6 +1042,8 @@ const struct of_device_id arizona_of_match[] = { { .compatible = "wlf,wm8997", .data = (void *)WM8997 }, { .compatible = "wlf,wm8998", .data = (void *)WM8998 }, { .compatible = "wlf,wm1814", .data = (void *)WM1814 }, + { .compatible = "wlf,wm1831", .data = (void *)WM1831 }, + { .compatible = "cirrus,cs47l24", .data = (void *)CS47L24 }, {}, }; EXPORT_SYMBOL_GPL(arizona_of_match); @@ -1073,6 +1076,13 @@ static struct mfd_cell florida_devs[] = { { .name = "florida-codec" }, }; +static struct mfd_cell cs47l24_devs[] = { + { .name = "arizona-gpio" }, + { .name = "arizona-haptics" }, + { .name = "arizona-pwm" }, + { .name = "cs47l24-codec" }, +}; + static struct mfd_cell wm8997_devs[] = { { .name = "arizona-micsupp" }, { .name = "arizona-extcon" }, @@ -1251,6 +1261,8 @@ int arizona_dev_init(struct arizona *arizona) case WM8997: case WM8998: case WM1814: + case WM1831: + case CS47L24: for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) arizona->core_supplies[i].supply = wm5102_core_supplies[i]; @@ -1265,11 +1277,18 @@ int arizona_dev_init(struct arizona *arizona) /* Mark DCVDD as external, LDO1 driver will clear if internal */ arizona->external_dcvdd = true; - ret = mfd_add_devices(arizona->dev, -1, early_devs, - ARRAY_SIZE(early_devs), NULL, 0, NULL); - if (ret != 0) { - dev_err(dev, "Failed to add early children: %d\n", ret); - return ret; + switch (arizona->type) { + case WM1831: + case CS47L24: + break; + default: + ret = mfd_add_devices(arizona->dev, -1, early_devs, + ARRAY_SIZE(early_devs), NULL, 0, NULL); + if (ret != 0) { + dev_err(dev, "Failed to add early children: %d\n", ret); + return ret; + } + break; } ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies, @@ -1345,6 +1364,7 @@ int arizona_dev_init(struct arizona *arizona) case 0x5102: case 0x5110: case 0x6349: + case 0x6363: case 0x8997: break; default: @@ -1446,6 +1466,30 @@ int arizona_dev_init(struct arizona *arizona) apply_patch = florida_patch; break; #endif +#ifdef CONFIG_MFD_CS47L24 + case 0x6363: + switch (arizona->type) { + case CS47L24: + type_name = "CS47L24"; + revision_char = arizona->rev + 'A'; + break; + + case WM1831: + type_name = "WM1831"; + revision_char = arizona->rev + 'A'; + break; + + default: + dev_err(arizona->dev, "CS47L24 codec registered as %d\n", + arizona->type); + arizona->type = CS47L24; + type_name = "CS47L24"; + revision_char = arizona->rev + 'A'; + break; + } + apply_patch = cs47l24_patch; + break; +#endif #ifdef CONFIG_MFD_WM8997 case 0x8997: type_name = "WM8997"; @@ -1682,6 +1726,11 @@ int arizona_dev_init(struct arizona *arizona) ret = mfd_add_devices(arizona->dev, -1, florida_devs, ARRAY_SIZE(florida_devs), NULL, 0, NULL); break; + case WM1831: + case CS47L24: + ret = mfd_add_devices(arizona->dev, -1, cs47l24_devs, + ARRAY_SIZE(cs47l24_devs), NULL, 0, NULL); + break; case WM8997: ret = mfd_add_devices(arizona->dev, -1, wm8997_devs, ARRAY_SIZE(wm8997_devs), NULL, 0, NULL); diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index dc5f9d49b55..5d35c8d9e03 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -1,6 +1,7 @@ /* * Arizona interrupt support * + * Copyright 2014 CirrusLogic, Inc. * Copyright 2012 Wolfson Microelectronics plc * * Author: Mark Brown @@ -30,11 +31,12 @@ static int arizona_map_irq(struct arizona *arizona, int irq) { int ret; - ret = regmap_irq_get_virq(arizona->aod_irq_chip, irq); - if (ret < 0) - ret = regmap_irq_get_virq(arizona->irq_chip, irq); - - return ret; + if (arizona->aod_irq_chip) { + ret = regmap_irq_get_virq(arizona->aod_irq_chip, irq); + if (ret >= 0) + return ret; + } + return regmap_irq_get_virq(arizona->irq_chip, irq); } int arizona_request_irq(struct arizona *arizona, int irq, char *name, @@ -107,8 +109,8 @@ static irqreturn_t arizona_irq_thread(int irq, void *data) do { poll = false; - /* Always handle the AoD domain */ - handle_nested_irq(irq_find_mapping(arizona->virq, 0)); + if (arizona->aod_irq_chip) + handle_nested_irq(irq_find_mapping(arizona->virq, 0)); /* * Check if one of the main interrupts is asserted and only @@ -216,6 +218,15 @@ int arizona_irq_init(struct arizona *arizona) ctrlif_error = false; break; #endif +#ifdef CONFIG_MFD_CS47L24 + case WM1831: + case CS47L24: + aod = NULL; + irq = &cs47l24_irq; + + ctrlif_error = false; + break; +#endif #ifdef CONFIG_MFD_WM8997 case WM8997: aod = &wm8997_aod; @@ -288,13 +299,16 @@ int arizona_irq_init(struct arizona *arizona) goto err; } - ret = regmap_add_irq_chip(arizona->regmap, - irq_create_mapping(arizona->virq, 0), - IRQF_ONESHOT, -1, aod, - &arizona->aod_irq_chip); - if (ret != 0) { - dev_err(arizona->dev, "Failed to add AOD IRQs: %d\n", ret); - goto err_domain; + if (aod) { + ret = regmap_add_irq_chip(arizona->regmap, + irq_create_mapping(arizona->virq, 0), + IRQF_ONESHOT, -1, aod, + &arizona->aod_irq_chip); + if (ret != 0) { + dev_err(arizona->dev, "Failed to add AOD IRQs: %d\n", + ret); + goto err_domain; + } } ret = regmap_add_irq_chip(arizona->regmap, diff --git a/drivers/mfd/arizona-spi.c b/drivers/mfd/arizona-spi.c index a30ad5df2d6..bad75e0de01 100644 --- a/drivers/mfd/arizona-spi.c +++ b/drivers/mfd/arizona-spi.c @@ -1,6 +1,7 @@ /* * arizona-spi.c -- Arizona SPI bus interface * + * Copyright 2014 Cirrus Logic * Copyright 2012 Wolfson Microelectronics plc * * Author: Mark Brown @@ -46,6 +47,12 @@ static int arizona_spi_probe(struct spi_device *spi) case WM5110: regmap_config = &florida_spi_regmap; break; +#endif +#ifdef CONFIG_MFD_CS47L24 + case WM1831: + case CS47L24: + regmap_config = &cs47l24_spi_regmap; + break; #endif default: dev_err(&spi->dev, "Unknown device type %ld\n", @@ -84,6 +91,8 @@ static const struct spi_device_id arizona_spi_ids[] = { { "wm8280", WM8280 }, { "wm8281", WM8280 }, { "wm5110", WM5110 }, + { "wm1831", WM1831 }, + { "cs47l24", CS47L24 }, { }, }; MODULE_DEVICE_TABLE(spi, arizona_spi_ids); diff --git a/drivers/mfd/arizona.h b/drivers/mfd/arizona.h index fa50af8b5d7..5ff910658a5 100644 --- a/drivers/mfd/arizona.h +++ b/drivers/mfd/arizona.h @@ -1,6 +1,7 @@ /* * arizona.h -- WM5102 MFD internals * + * Copyright 2014 Cirrus Logic * Copyright 2012 Wolfson Microelectronics plc * * Author: Mark Brown @@ -29,6 +30,8 @@ extern const struct regmap_config wm8997_i2c_regmap; extern const struct regmap_config wm8998_i2c_regmap; +extern const struct regmap_config cs47l24_spi_regmap; + extern const struct dev_pm_ops arizona_pm_ops; extern const struct of_device_id arizona_of_match[]; @@ -46,6 +49,8 @@ extern const struct regmap_irq_chip wm8997_irq; extern struct regmap_irq_chip wm8998_aod; extern struct regmap_irq_chip wm8998_irq; +extern const struct regmap_irq_chip cs47l24_irq; + int arizona_dev_init(struct arizona *arizona); int arizona_dev_exit(struct arizona *arizona); int arizona_irq_init(struct arizona *arizona); diff --git a/drivers/mfd/cs47l24-tables.c b/drivers/mfd/cs47l24-tables.c new file mode 100644 index 00000000000..19368c04daf --- /dev/null +++ b/drivers/mfd/cs47l24-tables.c @@ -0,0 +1,1636 @@ +/* + * cs47l24-tables.c -- data tables for CS47L24 codec + * + * Copyright 2014 CirrusLogic, Inc. + * + * Author: Richard Fitzgerald + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include + +#include +#include +#include + +#include "arizona.h" + +#define CS47L24_NUM_ISR 5 + +/* We use a function so we can use ARRAY_SIZE() */ +int cs47l24_patch(struct arizona *arizona) +{ + return 0; +} +EXPORT_SYMBOL_GPL(cs47l24_patch); + +static const struct regmap_irq cs47l24_irqs[ARIZONA_NUM_IRQ] = { + [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 }, + [ARIZONA_IRQ_GP1] = { .reg_offset = 0, .mask = ARIZONA_GP1_EINT1 }, + + [ARIZONA_IRQ_DSP3_RAM_RDY] = { + .reg_offset = 1, .mask = ARIZONA_DSP3_RAM_RDY_EINT1 + }, + [ARIZONA_IRQ_DSP2_RAM_RDY] = { + .reg_offset = 1, .mask = ARIZONA_DSP2_RAM_RDY_EINT1 + }, + [ARIZONA_IRQ_DSP_IRQ8] = { + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ8_EINT1 + }, + [ARIZONA_IRQ_DSP_IRQ7] = { + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ7_EINT1 + }, + [ARIZONA_IRQ_DSP_IRQ6] = { + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ6_EINT1 + }, + [ARIZONA_IRQ_DSP_IRQ5] = { + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ5_EINT1 + }, + [ARIZONA_IRQ_DSP_IRQ4] = { + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ4_EINT1 + }, + [ARIZONA_IRQ_DSP_IRQ3] = { + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ3_EINT1 + }, + [ARIZONA_IRQ_DSP_IRQ2] = { + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ2_EINT1 + }, + [ARIZONA_IRQ_DSP_IRQ1] = { + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ1_EINT1 + }, + + [ARIZONA_IRQ_SPK_OVERHEAT_WARN] = { + .reg_offset = 2, .mask = ARIZONA_SPK_OVERHEAT_WARN_EINT1 + }, + [ARIZONA_IRQ_SPK_OVERHEAT] = { + .reg_offset = 2, .mask = ARIZONA_SPK_OVERHEAT_EINT1 + }, + [ARIZONA_IRQ_WSEQ_DONE] = { + .reg_offset = 2, .mask = ARIZONA_WSEQ_DONE_EINT1 + }, + [ARIZONA_IRQ_DRC2_SIG_DET] = { + .reg_offset = 2, .mask = ARIZONA_DRC2_SIG_DET_EINT1 + }, + [ARIZONA_IRQ_DRC1_SIG_DET] = { + .reg_offset = 2, .mask = ARIZONA_DRC1_SIG_DET_EINT1 + }, + [ARIZONA_IRQ_ASRC2_LOCK] = { + .reg_offset = 2, .mask = ARIZONA_ASRC2_LOCK_EINT1 + }, + [ARIZONA_IRQ_ASRC1_LOCK] = { + .reg_offset = 2, .mask = ARIZONA_ASRC1_LOCK_EINT1 + }, + [ARIZONA_IRQ_UNDERCLOCKED] = { + .reg_offset = 2, .mask = ARIZONA_UNDERCLOCKED_EINT1 + }, + [ARIZONA_IRQ_OVERCLOCKED] = { + .reg_offset = 2, .mask = ARIZONA_OVERCLOCKED_EINT1 + }, + [ARIZONA_IRQ_FLL2_LOCK] = { + .reg_offset = 2, .mask = ARIZONA_FLL2_LOCK_EINT1 + }, + [ARIZONA_IRQ_FLL1_LOCK] = { + .reg_offset = 2, .mask = ARIZONA_FLL1_LOCK_EINT1 + }, + [ARIZONA_IRQ_CLKGEN_ERR] = { + .reg_offset = 2, .mask = ARIZONA_CLKGEN_ERR_EINT1 + }, + [ARIZONA_IRQ_CLKGEN_ERR_ASYNC] = { + .reg_offset = 2, .mask = ARIZONA_CLKGEN_ERR_ASYNC_EINT1 + }, + + [ARIZONA_IRQ_CTRLIF_ERR] = { + .reg_offset = 3, .mask = ARIZONA_V2_CTRLIF_ERR_EINT1 + }, + [ARIZONA_IRQ_MIXER_DROPPED_SAMPLES] = { + .reg_offset = 3, .mask = ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT1 + }, + [ARIZONA_IRQ_ASYNC_CLK_ENA_LOW] = { + .reg_offset = 3, .mask = ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT1 + }, + [ARIZONA_IRQ_SYSCLK_ENA_LOW] = { + .reg_offset = 3, .mask = ARIZONA_V2_SYSCLK_ENA_LOW_EINT1 + }, + [ARIZONA_IRQ_ISRC1_CFG_ERR] = { + .reg_offset = 3, .mask = ARIZONA_V2_ISRC1_CFG_ERR_EINT1 + }, + [ARIZONA_IRQ_ISRC2_CFG_ERR] = { + .reg_offset = 3, .mask = ARIZONA_V2_ISRC2_CFG_ERR_EINT1 + }, + [ARIZONA_IRQ_ISRC3_CFG_ERR] = { + .reg_offset = 3, .mask = ARIZONA_V2_ISRC3_CFG_ERR_EINT1 + }, + [ARIZONA_IRQ_HP1R_DONE] = { + .reg_offset = 3, .mask = ARIZONA_HP1R_DONE_EINT1 + }, + [ARIZONA_IRQ_HP1L_DONE] = { + .reg_offset = 3, .mask = ARIZONA_HP1L_DONE_EINT1 + }, + + [ARIZONA_IRQ_BOOT_DONE] = { + .reg_offset = 4, .mask = ARIZONA_BOOT_DONE_EINT1 + }, + [ARIZONA_IRQ_ASRC_CFG_ERR] = { + .reg_offset = 4, .mask = ARIZONA_V2_ASRC_CFG_ERR_EINT1 + }, + [ARIZONA_IRQ_FLL2_CLOCK_OK] = { + .reg_offset = 4, .mask = ARIZONA_FLL2_CLOCK_OK_EINT1 + }, + [ARIZONA_IRQ_FLL1_CLOCK_OK] = { + .reg_offset = 4, .mask = ARIZONA_FLL1_CLOCK_OK_EINT1 + }, + + [ARIZONA_IRQ_DSP_SHARED_WR_COLL] = { + .reg_offset = 5, .mask = ARIZONA_DSP_SHARED_WR_COLL_EINT1 + }, + [ARIZONA_IRQ_SPK_SHUTDOWN] = { + .reg_offset = 5, .mask = ARIZONA_SPK_SHUTDOWN_EINT1 + }, + [ARIZONA_IRQ_SPK1R_SHORT] = { + .reg_offset = 5, .mask = ARIZONA_SPK1R_SHORT_EINT1 + }, + [ARIZONA_IRQ_SPK1L_SHORT] = { + .reg_offset = 5, .mask = ARIZONA_SPK1L_SHORT_EINT1 + }, + [ARIZONA_IRQ_HP1R_SC_NEG] = { + .reg_offset = 5, .mask = ARIZONA_HP1R_SC_NEG_EINT1 + }, + [ARIZONA_IRQ_HP1R_SC_POS] = { + .reg_offset = 5, .mask = ARIZONA_HP1R_SC_POS_EINT1 + }, + [ARIZONA_IRQ_HP1L_SC_NEG] = { + .reg_offset = 5, .mask = ARIZONA_HP1L_SC_NEG_EINT1 + }, + [ARIZONA_IRQ_HP1L_SC_POS] = { + .reg_offset = 5, .mask = ARIZONA_HP1L_SC_POS_EINT1 + }, +}; + +const struct regmap_irq_chip cs47l24_irq = { + .name = "cs47l24 IRQ", + .status_base = ARIZONA_INTERRUPT_STATUS_1, + .mask_base = ARIZONA_INTERRUPT_STATUS_1_MASK, + .ack_base = ARIZONA_INTERRUPT_STATUS_1, + .num_regs = 6, + .irqs = cs47l24_irqs, + .num_irqs = ARRAY_SIZE(cs47l24_irqs), +}; +EXPORT_SYMBOL_GPL(cs47l24_irq); + +static const struct reg_default cs47l24_reg_default[] = { + { 0x00000008, 0x0019 }, /* R8 - Ctrl IF SPI CFG 1 */ + { 0x00000020, 0x0000 }, /* R32 - Tone Generator 1 */ + { 0x00000021, 0x1000 }, /* R33 - Tone Generator 2 */ + { 0x00000022, 0x0000 }, /* R34 - Tone Generator 3 */ + { 0x00000023, 0x1000 }, /* R35 - Tone Generator 4 */ + { 0x00000024, 0x0000 }, /* R36 - Tone Generator 5 */ + { 0x00000030, 0x0000 }, /* R48 - PWM Drive 1 */ + { 0x00000031, 0x0100 }, /* R49 - PWM Drive 2 */ + { 0x00000032, 0x0100 }, /* R50 - PWM Drive 3 */ + { 0x00000041, 0x0000 }, /* R65 - Sequence control */ + { 0x00000061, 0x01FF }, /* R97 - Sample Rate Sequence Select 1 */ + { 0x00000062, 0x01FF }, /* R98 - Sample Rate Sequence Select 2 */ + { 0x00000063, 0x01FF }, /* R99 - Sample Rate Sequence Select 3 */ + { 0x00000064, 0x01FF }, /* R100 - Sample Rate Sequence Select 4 */ + { 0x00000070, 0x0000 }, /* R112 - Comfort Noise Generator */ + { 0x00000090, 0x0000 }, /* R144 - Haptics Control 1 */ + { 0x00000091, 0x7FFF }, /* R145 - Haptics Control 2 */ + { 0x00000092, 0x0000 }, /* R146 - Haptics phase 1 intensity */ + { 0x00000093, 0x0000 }, /* R147 - Haptics phase 1 duration */ + { 0x00000094, 0x0000 }, /* R148 - Haptics phase 2 intensity */ + { 0x00000095, 0x0000 }, /* R149 - Haptics phase 2 duration */ + { 0x00000096, 0x0000 }, /* R150 - Haptics phase 3 intensity */ + { 0x00000097, 0x0000 }, /* R151 - Haptics phase 3 duration */ + { 0x00000100, 0x0002 }, /* R256 - Clock 32k 1 */ + { 0x00000101, 0x0504 }, /* R257 - System Clock 1 */ + { 0x00000102, 0x0011 }, /* R258 - Sample rate 1 */ + { 0x00000103, 0x0011 }, /* R259 - Sample rate 2 */ + { 0x00000104, 0x0011 }, /* R260 - Sample rate 3 */ + { 0x00000112, 0x0305 }, /* R274 - Async clock 1 */ + { 0x00000113, 0x0011 }, /* R275 - Async sample rate 1 */ + { 0x00000114, 0x0011 }, /* R276 - Async sample rate 2 */ + { 0x00000149, 0x0000 }, /* R329 - Output system clock */ + { 0x0000014A, 0x0000 }, /* R330 - Output async clock */ + { 0x00000152, 0x0000 }, /* R338 - Rate Estimator 1 */ + { 0x00000153, 0x0000 }, /* R339 - Rate Estimator 2 */ + { 0x00000154, 0x0000 }, /* R340 - Rate Estimator 3 */ + { 0x00000155, 0x0000 }, /* R341 - Rate Estimator 4 */ + { 0x00000156, 0x0000 }, /* R342 - Rate Estimator 5 */ + { 0x00000171, 0x0002 }, /* R369 - FLL1 Control 1 */ + { 0x00000172, 0x0008 }, /* R370 - FLL1 Control 2 */ + { 0x00000173, 0x0018 }, /* R371 - FLL1 Control 3 */ + { 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */ + { 0x00000175, 0x0006 }, /* R373 - FLL1 Control 5 */ + { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */ + { 0x00000177, 0x0281 }, /* R375 - FLL1 Loop Filter Test 1 */ + { 0x00000178, 0x0000 }, /* R376 - FLL1 NCO Test 0 */ + { 0x00000179, 0x0000 }, /* R376 - FLL1 Control 7 */ + { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */ + { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */ + { 0x00000183, 0x0000 }, /* R387 - FLL1 Synchroniser 3 */ + { 0x00000184, 0x0000 }, /* R388 - FLL1 Synchroniser 4 */ + { 0x00000185, 0x0000 }, /* R389 - FLL1 Synchroniser 5 */ + { 0x00000186, 0x0000 }, /* R390 - FLL1 Synchroniser 6 */ + { 0x00000187, 0x0001 }, /* R390 - FLL1 Synchroniser 7 */ + { 0x00000189, 0x0000 }, /* R393 - FLL1 Spread Spectrum */ + { 0x0000018A, 0x000C }, /* R394 - FLL1 GPIO Clock */ + { 0x00000191, 0x0002 }, /* R401 - FLL2 Control 1 */ + { 0x00000192, 0x0008 }, /* R402 - FLL2 Control 2 */ + { 0x00000193, 0x0018 }, /* R403 - FLL2 Control 3 */ + { 0x00000194, 0x007D }, /* R404 - FLL2 Control 4 */ + { 0x00000195, 0x000C }, /* R405 - FLL2 Control 5 */ + { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */ + { 0x00000197, 0x0000 }, /* R407 - FLL2 Loop Filter Test 1 */ + { 0x00000198, 0x0000 }, /* R408 - FLL2 NCO Test 0 */ + { 0x00000199, 0x0000 }, /* R408 - FLL2 Control 7 */ + { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */ + { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */ + { 0x000001A3, 0x0000 }, /* R419 - FLL2 Synchroniser 3 */ + { 0x000001A4, 0x0000 }, /* R420 - FLL2 Synchroniser 4 */ + { 0x000001A5, 0x0000 }, /* R421 - FLL2 Synchroniser 5 */ + { 0x000001A6, 0x0000 }, /* R422 - FLL2 Synchroniser 6 */ + { 0x000001A7, 0x0001 }, /* R422 - FLL2 Synchroniser 7 */ + { 0x000001A9, 0x0000 }, /* R425 - FLL2 Spread Spectrum */ + { 0x000001AA, 0x000C }, /* R426 - FLL2 GPIO Clock */ + { 0x00000218, 0x00E6 }, /* R536 - Mic Bias Ctrl 1 */ + { 0x00000219, 0x00E6 }, /* R537 - Mic Bias Ctrl 2 */ + { 0x00000300, 0x0000 }, /* R768 - Input Enables */ + { 0x00000308, 0x0000 }, /* R776 - Input Rate */ + { 0x00000309, 0x0022 }, /* R777 - Input Volume Ramp */ + { 0x0000030C, 0x0002 }, /* R780 - HPF Control */ + { 0x00000310, 0x2000 }, /* R784 - IN1L Control */ + { 0x00000311, 0x0180 }, /* R785 - ADC Digital Volume 1L */ + { 0x00000312, 0x0000 }, /* R786 - DMIC1L Control */ + { 0x00000314, 0x0000 }, /* R788 - IN1R Control */ + { 0x00000315, 0x0180 }, /* R789 - ADC Digital Volume 1R */ + { 0x00000316, 0x0000 }, /* R790 - DMIC1R Control */ + { 0x00000318, 0x2000 }, /* R792 - IN2L Control */ + { 0x00000319, 0x0180 }, /* R793 - ADC Digital Volume 2L */ + { 0x0000031A, 0x0000 }, /* R794 - DMIC2L Control */ + { 0x0000031C, 0x0000 }, /* R796 - IN2R Control */ + { 0x0000031D, 0x0180 }, /* R797 - ADC Digital Volume 2R */ + { 0x0000031E, 0x0000 }, /* R798 - DMIC2R Control */ + { 0x00000400, 0x0000 }, /* R1024 - Output Enables 1 */ + { 0x00000408, 0x0000 }, /* R1032 - Output Rate 1 */ + { 0x00000409, 0x0022 }, /* R1033 - Output Volume Ramp */ + { 0x00000410, 0x0080 }, /* R1040 - Output Path Config 1L */ + { 0x00000411, 0x0180 }, /* R1041 - DAC Digital Volume 1L */ + { 0x00000412, 0x0081 }, /* R1042 - DAC Volume Limit 1L */ + { 0x00000413, 0x0001 }, /* R1043 - Noise Gate Select 1L */ + { 0x00000415, 0x0180 }, /* R1045 - DAC Digital Volume 1R */ + { 0x00000416, 0x0081 }, /* R1046 - DAC Volume Limit 1R */ + { 0x00000417, 0x0002 }, /* R1047 - Noise Gate Select 1R */ + { 0x00000429, 0x0180 }, /* R1065 - DAC Digital Volume 4L */ + { 0x0000042A, 0x0081 }, /* R1066 - Out Volume 4L */ + { 0x0000042B, 0x0040 }, /* R1067 - Noise Gate Select 4L */ + { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */ + { 0x00000458, 0x0000 }, /* R1112 - Noise Gate Control */ + { 0x000004A0, 0x3480 }, /* R1184 - HP1 Short Circuit Ctrl */ + { 0x00000500, 0x000C }, /* R1280 - AIF1 BCLK Ctrl */ + { 0x00000501, 0x0008 }, /* R1281 - AIF1 Tx Pin Ctrl */ + { 0x00000502, 0x0000 }, /* R1282 - AIF1 Rx Pin Ctrl */ + { 0x00000503, 0x0000 }, /* R1283 - AIF1 Rate Ctrl */ + { 0x00000504, 0x0000 }, /* R1284 - AIF1 Format */ + { 0x00000506, 0x0040 }, /* R1286 - AIF1 Rx BCLK Rate */ + { 0x00000507, 0x1818 }, /* R1287 - AIF1 Frame Ctrl 1 */ + { 0x00000508, 0x1818 }, /* R1288 - AIF1 Frame Ctrl 2 */ + { 0x00000509, 0x0000 }, /* R1289 - AIF1 Frame Ctrl 3 */ + { 0x0000050A, 0x0001 }, /* R1290 - AIF1 Frame Ctrl 4 */ + { 0x0000050B, 0x0002 }, /* R1291 - AIF1 Frame Ctrl 5 */ + { 0x0000050C, 0x0003 }, /* R1292 - AIF1 Frame Ctrl 6 */ + { 0x0000050D, 0x0004 }, /* R1293 - AIF1 Frame Ctrl 7 */ + { 0x0000050E, 0x0005 }, /* R1294 - AIF1 Frame Ctrl 8 */ + { 0x0000050F, 0x0006 }, /* R1295 - AIF1 Frame Ctrl 9 */ + { 0x00000510, 0x0007 }, /* R1296 - AIF1 Frame Ctrl 10 */ + { 0x00000511, 0x0000 }, /* R1297 - AIF1 Frame Ctrl 11 */ + { 0x00000512, 0x0001 }, /* R1298 - AIF1 Frame Ctrl 12 */ + { 0x00000513, 0x0002 }, /* R1299 - AIF1 Frame Ctrl 13 */ + { 0x00000514, 0x0003 }, /* R1300 - AIF1 Frame Ctrl 14 */ + { 0x00000515, 0x0004 }, /* R1301 - AIF1 Frame Ctrl 15 */ + { 0x00000516, 0x0005 }, /* R1302 - AIF1 Frame Ctrl 16 */ + { 0x00000517, 0x0006 }, /* R1303 - AIF1 Frame Ctrl 17 */ + { 0x00000518, 0x0007 }, /* R1304 - AIF1 Frame Ctrl 18 */ + { 0x00000519, 0x0000 }, /* R1305 - AIF1 Tx Enables */ + { 0x0000051A, 0x0000 }, /* R1306 - AIF1 Rx Enables */ + { 0x00000540, 0x000C }, /* R1344 - AIF2 BCLK Ctrl */ + { 0x00000541, 0x0008 }, /* R1345 - AIF2 Tx Pin Ctrl */ + { 0x00000542, 0x0000 }, /* R1346 - AIF2 Rx Pin Ctrl */ + { 0x00000543, 0x0000 }, /* R1347 - AIF2 Rate Ctrl */ + { 0x00000544, 0x0000 }, /* R1348 - AIF2 Format */ + { 0x00000546, 0x0040 }, /* R1350 - AIF2 Rx BCLK Rate */ + { 0x00000547, 0x1818 }, /* R1351 - AIF2 Frame Ctrl 1 */ + { 0x00000548, 0x1818 }, /* R1352 - AIF2 Frame Ctrl 2 */ + { 0x00000549, 0x0000 }, /* R1353 - AIF2 Frame Ctrl 3 */ + { 0x0000054A, 0x0001 }, /* R1354 - AIF2 Frame Ctrl 4 */ + { 0x0000054B, 0x0002 }, /* R1355 - AIF2 Frame Ctrl 5 */ + { 0x0000054C, 0x0003 }, /* R1356 - AIF2 Frame Ctrl 6 */ + { 0x0000054D, 0x0004 }, /* R1357 - AIF2 Frame Ctrl 7 */ + { 0x0000054E, 0x0005 }, /* R1358 - AIF2 Frame Ctrl 8 */ + { 0x00000551, 0x0000 }, /* R1361 - AIF2 Frame Ctrl 11 */ + { 0x00000552, 0x0001 }, /* R1362 - AIF2 Frame Ctrl 12 */ + { 0x00000553, 0x0002 }, /* R1363 - AIF2 Frame Ctrl 13 */ + { 0x00000554, 0x0003 }, /* R1364 - AIF2 Frame Ctrl 14 */ + { 0x00000555, 0x0004 }, /* R1365 - AIF2 Frame Ctrl 15 */ + { 0x00000556, 0x0005 }, /* R1366 - AIF2 Frame Ctrl 16 */ + { 0x00000559, 0x0000 }, /* R1369 - AIF2 Tx Enables */ + { 0x0000055A, 0x0000 }, /* R1370 - AIF2 Rx Enables */ + { 0x00000580, 0x000C }, /* R1408 - AIF3 BCLK Ctrl */ + { 0x00000581, 0x0008 }, /* R1409 - AIF3 Tx Pin Ctrl */ + { 0x00000582, 0x0000 }, /* R1410 - AIF3 Rx Pin Ctrl */ + { 0x00000583, 0x0000 }, /* R1411 - AIF3 Rate Ctrl */ + { 0x00000584, 0x0000 }, /* R1412 - AIF3 Format */ + { 0x00000586, 0x0040 }, /* R1414 - AIF3 Rx BCLK Rate */ + { 0x00000587, 0x1818 }, /* R1415 - AIF3 Frame Ctrl 1 */ + { 0x00000588, 0x1818 }, /* R1416 - AIF3 Frame Ctrl 2 */ + { 0x00000589, 0x0000 }, /* R1417 - AIF3 Frame Ctrl 3 */ + { 0x0000058A, 0x0001 }, /* R1418 - AIF3 Frame Ctrl 4 */ + { 0x00000591, 0x0000 }, /* R1425 - AIF3 Frame Ctrl 11 */ + { 0x00000592, 0x0001 }, /* R1426 - AIF3 Frame Ctrl 12 */ + { 0x00000599, 0x0000 }, /* R1433 - AIF3 Tx Enables */ + { 0x0000059A, 0x0000 }, /* R1434 - AIF3 Rx Enables */ + { 0x00000640, 0x0000 }, /* R1600 - PWM1MIX Input 1 Source */ + { 0x00000641, 0x0080 }, /* R1601 - PWM1MIX Input 1 Volume */ + { 0x00000642, 0x0000 }, /* R1602 - PWM1MIX Input 2 Source */ + { 0x00000643, 0x0080 }, /* R1603 - PWM1MIX Input 2 Volume */ + { 0x00000644, 0x0000 }, /* R1604 - PWM1MIX Input 3 Source */ + { 0x00000645, 0x0080 }, /* R1605 - PWM1MIX Input 3 Volume */ + { 0x00000646, 0x0000 }, /* R1606 - PWM1MIX Input 4 Source */ + { 0x00000647, 0x0080 }, /* R1607 - PWM1MIX Input 4 Volume */ + { 0x00000648, 0x0000 }, /* R1608 - PWM2MIX Input 1 Source */ + { 0x00000649, 0x0080 }, /* R1609 - PWM2MIX Input 1 Volume */ + { 0x0000064A, 0x0000 }, /* R1610 - PWM2MIX Input 2 Source */ + { 0x0000064B, 0x0080 }, /* R1611 - PWM2MIX Input 2 Volume */ + { 0x0000064C, 0x0000 }, /* R1612 - PWM2MIX Input 3 Source */ + { 0x0000064D, 0x0080 }, /* R1613 - PWM2MIX Input 3 Volume */ + { 0x0000064E, 0x0000 }, /* R1614 - PWM2MIX Input 4 Source */ + { 0x0000064F, 0x0080 }, /* R1615 - PWM2MIX Input 4 Volume */ + { 0x00000680, 0x0000 }, /* R1664 - OUT1LMIX Input 1 Source */ + { 0x00000681, 0x0080 }, /* R1665 - OUT1LMIX Input 1 Volume */ + { 0x00000682, 0x0000 }, /* R1666 - OUT1LMIX Input 2 Source */ + { 0x00000683, 0x0080 }, /* R1667 - OUT1LMIX Input 2 Volume */ + { 0x00000684, 0x0000 }, /* R1668 - OUT1LMIX Input 3 Source */ + { 0x00000685, 0x0080 }, /* R1669 - OUT1LMIX Input 3 Volume */ + { 0x00000686, 0x0000 }, /* R1670 - OUT1LMIX Input 4 Source */ + { 0x00000687, 0x0080 }, /* R1671 - OUT1LMIX Input 4 Volume */ + { 0x00000688, 0x0000 }, /* R1672 - OUT1RMIX Input 1 Source */ + { 0x00000689, 0x0080 }, /* R1673 - OUT1RMIX Input 1 Volume */ + { 0x0000068A, 0x0000 }, /* R1674 - OUT1RMIX Input 2 Source */ + { 0x0000068B, 0x0080 }, /* R1675 - OUT1RMIX Input 2 Volume */ + { 0x0000068C, 0x0000 }, /* R1676 - OUT1RMIX Input 3 Source */ + { 0x0000068D, 0x0080 }, /* R1677 - OUT1RMIX Input 3 Volume */ + { 0x0000068E, 0x0000 }, /* R1678 - OUT1RMIX Input 4 Source */ + { 0x0000068F, 0x0080 }, /* R1679 - OUT1RMIX Input 4 Volume */ + { 0x000006B0, 0x0000 }, /* R1712 - OUT4LMIX Input 1 Source */ + { 0x000006B1, 0x0080 }, /* R1713 - OUT4LMIX Input 1 Volume */ + { 0x000006B2, 0x0000 }, /* R1714 - OUT4LMIX Input 2 Source */ + { 0x000006B3, 0x0080 }, /* R1715 - OUT4LMIX Input 2 Volume */ + { 0x000006B4, 0x0000 }, /* R1716 - OUT4LMIX Input 3 Source */ + { 0x000006B5, 0x0080 }, /* R1717 - OUT4LMIX Input 3 Volume */ + { 0x000006B6, 0x0000 }, /* R1718 - OUT4LMIX Input 4 Source */ + { 0x000006B7, 0x0080 }, /* R1719 - OUT4LMIX Input 4 Volume */ + { 0x00000700, 0x0000 }, /* R1792 - AIF1TX1MIX Input 1 Source */ + { 0x00000701, 0x0080 }, /* R1793 - AIF1TX1MIX Input 1 Volume */ + { 0x00000702, 0x0000 }, /* R1794 - AIF1TX1MIX Input 2 Source */ + { 0x00000703, 0x0080 }, /* R1795 - AIF1TX1MIX Input 2 Volume */ + { 0x00000704, 0x0000 }, /* R1796 - AIF1TX1MIX Input 3 Source */ + { 0x00000705, 0x0080 }, /* R1797 - AIF1TX1MIX Input 3 Volume */ + { 0x00000706, 0x0000 }, /* R1798 - AIF1TX1MIX Input 4 Source */ + { 0x00000707, 0x0080 }, /* R1799 - AIF1TX1MIX Input 4 Volume */ + { 0x00000708, 0x0000 }, /* R1800 - AIF1TX2MIX Input 1 Source */ + { 0x00000709, 0x0080 }, /* R1801 - AIF1TX2MIX Input 1 Volume */ + { 0x0000070A, 0x0000 }, /* R1802 - AIF1TX2MIX Input 2 Source */ + { 0x0000070B, 0x0080 }, /* R1803 - AIF1TX2MIX Input 2 Volume */ + { 0x0000070C, 0x0000 }, /* R1804 - AIF1TX2MIX Input 3 Source */ + { 0x0000070D, 0x0080 }, /* R1805 - AIF1TX2MIX Input 3 Volume */ + { 0x0000070E, 0x0000 }, /* R1806 - AIF1TX2MIX Input 4 Source */ + { 0x0000070F, 0x0080 }, /* R1807 - AIF1TX2MIX Input 4 Volume */ + { 0x00000710, 0x0000 }, /* R1808 - AIF1TX3MIX Input 1 Source */ + { 0x00000711, 0x0080 }, /* R1809 - AIF1TX3MIX Input 1 Volume */ + { 0x00000712, 0x0000 }, /* R1810 - AIF1TX3MIX Input 2 Source */ + { 0x00000713, 0x0080 }, /* R1811 - AIF1TX3MIX Input 2 Volume */ + { 0x00000714, 0x0000 }, /* R1812 - AIF1TX3MIX Input 3 Source */ + { 0x00000715, 0x0080 }, /* R1813 - AIF1TX3MIX Input 3 Volume */ + { 0x00000716, 0x0000 }, /* R1814 - AIF1TX3MIX Input 4 Source */ + { 0x00000717, 0x0080 }, /* R1815 - AIF1TX3MIX Input 4 Volume */ + { 0x00000718, 0x0000 }, /* R1816 - AIF1TX4MIX Input 1 Source */ + { 0x00000719, 0x0080 }, /* R1817 - AIF1TX4MIX Input 1 Volume */ + { 0x0000071A, 0x0000 }, /* R1818 - AIF1TX4MIX Input 2 Source */ + { 0x0000071B, 0x0080 }, /* R1819 - AIF1TX4MIX Input 2 Volume */ + { 0x0000071C, 0x0000 }, /* R1820 - AIF1TX4MIX Input 3 Source */ + { 0x0000071D, 0x0080 }, /* R1821 - AIF1TX4MIX Input 3 Volume */ + { 0x0000071E, 0x0000 }, /* R1822 - AIF1TX4MIX Input 4 Source */ + { 0x0000071F, 0x0080 }, /* R1823 - AIF1TX4MIX Input 4 Volume */ + { 0x00000720, 0x0000 }, /* R1824 - AIF1TX5MIX Input 1 Source */ + { 0x00000721, 0x0080 }, /* R1825 - AIF1TX5MIX Input 1 Volume */ + { 0x00000722, 0x0000 }, /* R1826 - AIF1TX5MIX Input 2 Source */ + { 0x00000723, 0x0080 }, /* R1827 - AIF1TX5MIX Input 2 Volume */ + { 0x00000724, 0x0000 }, /* R1828 - AIF1TX5MIX Input 3 Source */ + { 0x00000725, 0x0080 }, /* R1829 - AIF1TX5MIX Input 3 Volume */ + { 0x00000726, 0x0000 }, /* R1830 - AIF1TX5MIX Input 4 Source */ + { 0x00000727, 0x0080 }, /* R1831 - AIF1TX5MIX Input 4 Volume */ + { 0x00000728, 0x0000 }, /* R1832 - AIF1TX6MIX Input 1 Source */ + { 0x00000729, 0x0080 }, /* R1833 - AIF1TX6MIX Input 1 Volume */ + { 0x0000072A, 0x0000 }, /* R1834 - AIF1TX6MIX Input 2 Source */ + { 0x0000072B, 0x0080 }, /* R1835 - AIF1TX6MIX Input 2 Volume */ + { 0x0000072C, 0x0000 }, /* R1836 - AIF1TX6MIX Input 3 Source */ + { 0x0000072D, 0x0080 }, /* R1837 - AIF1TX6MIX Input 3 Volume */ + { 0x0000072E, 0x0000 }, /* R1838 - AIF1TX6MIX Input 4 Source */ + { 0x0000072F, 0x0080 }, /* R1839 - AIF1TX6MIX Input 4 Volume */ + { 0x00000730, 0x0000 }, /* R1840 - AIF1TX7MIX Input 1 Source */ + { 0x00000731, 0x0080 }, /* R1841 - AIF1TX7MIX Input 1 Volume */ + { 0x00000732, 0x0000 }, /* R1842 - AIF1TX7MIX Input 2 Source */ + { 0x00000733, 0x0080 }, /* R1843 - AIF1TX7MIX Input 2 Volume */ + { 0x00000734, 0x0000 }, /* R1844 - AIF1TX7MIX Input 3 Source */ + { 0x00000735, 0x0080 }, /* R1845 - AIF1TX7MIX Input 3 Volume */ + { 0x00000736, 0x0000 }, /* R1846 - AIF1TX7MIX Input 4 Source */ + { 0x00000737, 0x0080 }, /* R1847 - AIF1TX7MIX Input 4 Volume */ + { 0x00000738, 0x0000 }, /* R1848 - AIF1TX8MIX Input 1 Source */ + { 0x00000739, 0x0080 }, /* R1849 - AIF1TX8MIX Input 1 Volume */ + { 0x0000073A, 0x0000 }, /* R1850 - AIF1TX8MIX Input 2 Source */ + { 0x0000073B, 0x0080 }, /* R1851 - AIF1TX8MIX Input 2 Volume */ + { 0x0000073C, 0x0000 }, /* R1852 - AIF1TX8MIX Input 3 Source */ + { 0x0000073D, 0x0080 }, /* R1853 - AIF1TX8MIX Input 3 Volume */ + { 0x0000073E, 0x0000 }, /* R1854 - AIF1TX8MIX Input 4 Source */ + { 0x0000073F, 0x0080 }, /* R1855 - AIF1TX8MIX Input 4 Volume */ + { 0x00000740, 0x0000 }, /* R1856 - AIF2TX1MIX Input 1 Source */ + { 0x00000741, 0x0080 }, /* R1857 - AIF2TX1MIX Input 1 Volume */ + { 0x00000742, 0x0000 }, /* R1858 - AIF2TX1MIX Input 2 Source */ + { 0x00000743, 0x0080 }, /* R1859 - AIF2TX1MIX Input 2 Volume */ + { 0x00000744, 0x0000 }, /* R1860 - AIF2TX1MIX Input 3 Source */ + { 0x00000745, 0x0080 }, /* R1861 - AIF2TX1MIX Input 3 Volume */ + { 0x00000746, 0x0000 }, /* R1862 - AIF2TX1MIX Input 4 Source */ + { 0x00000747, 0x0080 }, /* R1863 - AIF2TX1MIX Input 4 Volume */ + { 0x00000748, 0x0000 }, /* R1864 - AIF2TX2MIX Input 1 Source */ + { 0x00000749, 0x0080 }, /* R1865 - AIF2TX2MIX Input 1 Volume */ + { 0x0000074A, 0x0000 }, /* R1866 - AIF2TX2MIX Input 2 Source */ + { 0x0000074B, 0x0080 }, /* R1867 - AIF2TX2MIX Input 2 Volume */ + { 0x0000074C, 0x0000 }, /* R1868 - AIF2TX2MIX Input 3 Source */ + { 0x0000074D, 0x0080 }, /* R1869 - AIF2TX2MIX Input 3 Volume */ + { 0x0000074E, 0x0000 }, /* R1870 - AIF2TX2MIX Input 4 Source */ + { 0x0000074F, 0x0080 }, /* R1871 - AIF2TX2MIX Input 4 Volume */ + { 0x00000750, 0x0000 }, /* R1872 - AIF2TX3MIX Input 1 Source */ + { 0x00000751, 0x0080 }, /* R1873 - AIF2TX3MIX Input 1 Volume */ + { 0x00000752, 0x0000 }, /* R1874 - AIF2TX3MIX Input 2 Source */ + { 0x00000753, 0x0080 }, /* R1875 - AIF2TX3MIX Input 2 Volume */ + { 0x00000754, 0x0000 }, /* R1876 - AIF2TX3MIX Input 3 Source */ + { 0x00000755, 0x0080 }, /* R1877 - AIF2TX3MIX Input 3 Volume */ + { 0x00000756, 0x0000 }, /* R1878 - AIF2TX3MIX Input 4 Source */ + { 0x00000757, 0x0080 }, /* R1879 - AIF2TX3MIX Input 4 Volume */ + { 0x00000758, 0x0000 }, /* R1880 - AIF2TX4MIX Input 1 Source */ + { 0x00000759, 0x0080 }, /* R1881 - AIF2TX4MIX Input 1 Volume */ + { 0x0000075A, 0x0000 }, /* R1882 - AIF2TX4MIX Input 2 Source */ + { 0x0000075B, 0x0080 }, /* R1883 - AIF2TX4MIX Input 2 Volume */ + { 0x0000075C, 0x0000 }, /* R1884 - AIF2TX4MIX Input 3 Source */ + { 0x0000075D, 0x0080 }, /* R1885 - AIF2TX4MIX Input 3 Volume */ + { 0x0000075E, 0x0000 }, /* R1886 - AIF2TX4MIX Input 4 Source */ + { 0x0000075F, 0x0080 }, /* R1887 - AIF2TX4MIX Input 4 Volume */ + { 0x00000760, 0x0000 }, /* R1888 - AIF2TX5MIX Input 1 Source */ + { 0x00000761, 0x0080 }, /* R1889 - AIF2TX5MIX Input 1 Volume */ + { 0x00000762, 0x0000 }, /* R1890 - AIF2TX5MIX Input 2 Source */ + { 0x00000763, 0x0080 }, /* R1891 - AIF2TX5MIX Input 2 Volume */ + { 0x00000764, 0x0000 }, /* R1892 - AIF2TX5MIX Input 3 Source */ + { 0x00000765, 0x0080 }, /* R1893 - AIF2TX5MIX Input 3 Volume */ + { 0x00000766, 0x0000 }, /* R1894 - AIF2TX5MIX Input 4 Source */ + { 0x00000767, 0x0080 }, /* R1895 - AIF2TX5MIX Input 4 Volume */ + { 0x00000768, 0x0000 }, /* R1896 - AIF2TX6MIX Input 1 Source */ + { 0x00000769, 0x0080 }, /* R1897 - AIF2TX6MIX Input 1 Volume */ + { 0x0000076A, 0x0000 }, /* R1898 - AIF2TX6MIX Input 2 Source */ + { 0x0000076B, 0x0080 }, /* R1899 - AIF2TX6MIX Input 2 Volume */ + { 0x0000076C, 0x0000 }, /* R1900 - AIF2TX6MIX Input 3 Source */ + { 0x0000076D, 0x0080 }, /* R1901 - AIF2TX6MIX Input 3 Volume */ + { 0x0000076E, 0x0000 }, /* R1902 - AIF2TX6MIX Input 4 Source */ + { 0x0000076F, 0x0080 }, /* R1903 - AIF2TX6MIX Input 4 Volume */ + { 0x00000780, 0x0000 }, /* R1920 - AIF3TX1MIX Input 1 Source */ + { 0x00000781, 0x0080 }, /* R1921 - AIF3TX1MIX Input 1 Volume */ + { 0x00000782, 0x0000 }, /* R1922 - AIF3TX1MIX Input 2 Source */ + { 0x00000783, 0x0080 }, /* R1923 - AIF3TX1MIX Input 2 Volume */ + { 0x00000784, 0x0000 }, /* R1924 - AIF3TX1MIX Input 3 Source */ + { 0x00000785, 0x0080 }, /* R1925 - AIF3TX1MIX Input 3 Volume */ + { 0x00000786, 0x0000 }, /* R1926 - AIF3TX1MIX Input 4 Source */ + { 0x00000787, 0x0080 }, /* R1927 - AIF3TX1MIX Input 4 Volume */ + { 0x00000788, 0x0000 }, /* R1928 - AIF3TX2MIX Input 1 Source */ + { 0x00000789, 0x0080 }, /* R1929 - AIF3TX2MIX Input 1 Volume */ + { 0x0000078A, 0x0000 }, /* R1930 - AIF3TX2MIX Input 2 Source */ + { 0x0000078B, 0x0080 }, /* R1931 - AIF3TX2MIX Input 2 Volume */ + { 0x0000078C, 0x0000 }, /* R1932 - AIF3TX2MIX Input 3 Source */ + { 0x0000078D, 0x0080 }, /* R1933 - AIF3TX2MIX Input 3 Volume */ + { 0x0000078E, 0x0000 }, /* R1934 - AIF3TX2MIX Input 4 Source */ + { 0x0000078F, 0x0080 }, /* R1935 - AIF3TX2MIX Input 4 Volume */ + { 0x00000880, 0x0000 }, /* R2176 - EQ1MIX Input 1 Source */ + { 0x00000881, 0x0080 }, /* R2177 - EQ1MIX Input 1 Volume */ + { 0x00000882, 0x0000 }, /* R2178 - EQ1MIX Input 2 Source */ + { 0x00000883, 0x0080 }, /* R2179 - EQ1MIX Input 2 Volume */ + { 0x00000884, 0x0000 }, /* R2180 - EQ1MIX Input 3 Source */ + { 0x00000885, 0x0080 }, /* R2181 - EQ1MIX Input 3 Volume */ + { 0x00000886, 0x0000 }, /* R2182 - EQ1MIX Input 4 Source */ + { 0x00000887, 0x0080 }, /* R2183 - EQ1MIX Input 4 Volume */ + { 0x00000888, 0x0000 }, /* R2184 - EQ2MIX Input 1 Source */ + { 0x00000889, 0x0080 }, /* R2185 - EQ2MIX Input 1 Volume */ + { 0x0000088A, 0x0000 }, /* R2186 - EQ2MIX Input 2 Source */ + { 0x0000088B, 0x0080 }, /* R2187 - EQ2MIX Input 2 Volume */ + { 0x0000088C, 0x0000 }, /* R2188 - EQ2MIX Input 3 Source */ + { 0x0000088D, 0x0080 }, /* R2189 - EQ2MIX Input 3 Volume */ + { 0x0000088E, 0x0000 }, /* R2190 - EQ2MIX Input 4 Source */ + { 0x0000088F, 0x0080 }, /* R2191 - EQ2MIX Input 4 Volume */ + { 0x000008C0, 0x0000 }, /* R2240 - DRC1LMIX Input 1 Source */ + { 0x000008C1, 0x0080 }, /* R2241 - DRC1LMIX Input 1 Volume */ + { 0x000008C2, 0x0000 }, /* R2242 - DRC1LMIX Input 2 Source */ + { 0x000008C3, 0x0080 }, /* R2243 - DRC1LMIX Input 2 Volume */ + { 0x000008C4, 0x0000 }, /* R2244 - DRC1LMIX Input 3 Source */ + { 0x000008C5, 0x0080 }, /* R2245 - DRC1LMIX Input 3 Volume */ + { 0x000008C6, 0x0000 }, /* R2246 - DRC1LMIX Input 4 Source */ + { 0x000008C7, 0x0080 }, /* R2247 - DRC1LMIX Input 4 Volume */ + { 0x000008C8, 0x0000 }, /* R2248 - DRC1RMIX Input 1 Source */ + { 0x000008C9, 0x0080 }, /* R2249 - DRC1RMIX Input 1 Volume */ + { 0x000008CA, 0x0000 }, /* R2250 - DRC1RMIX Input 2 Source */ + { 0x000008CB, 0x0080 }, /* R2251 - DRC1RMIX Input 2 Volume */ + { 0x000008CC, 0x0000 }, /* R2252 - DRC1RMIX Input 3 Source */ + { 0x000008CD, 0x0080 }, /* R2253 - DRC1RMIX Input 3 Volume */ + { 0x000008CE, 0x0000 }, /* R2254 - DRC1RMIX Input 4 Source */ + { 0x000008CF, 0x0080 }, /* R2255 - DRC1RMIX Input 4 Volume */ + { 0x000008D0, 0x0000 }, /* R2256 - DRC2LMIX Input 1 Source */ + { 0x000008D1, 0x0080 }, /* R2257 - DRC2LMIX Input 1 Volume */ + { 0x000008D2, 0x0000 }, /* R2258 - DRC2LMIX Input 2 Source */ + { 0x000008D3, 0x0080 }, /* R2259 - DRC2LMIX Input 2 Volume */ + { 0x000008D4, 0x0000 }, /* R2260 - DRC2LMIX Input 3 Source */ + { 0x000008D5, 0x0080 }, /* R2261 - DRC2LMIX Input 3 Volume */ + { 0x000008D6, 0x0000 }, /* R2262 - DRC2LMIX Input 4 Source */ + { 0x000008D7, 0x0080 }, /* R2263 - DRC2LMIX Input 4 Volume */ + { 0x000008D8, 0x0000 }, /* R2264 - DRC2RMIX Input 1 Source */ + { 0x000008D9, 0x0080 }, /* R2265 - DRC2RMIX Input 1 Volume */ + { 0x000008DA, 0x0000 }, /* R2266 - DRC2RMIX Input 2 Source */ + { 0x000008DB, 0x0080 }, /* R2267 - DRC2RMIX Input 2 Volume */ + { 0x000008DC, 0x0000 }, /* R2268 - DRC2RMIX Input 3 Source */ + { 0x000008DD, 0x0080 }, /* R2269 - DRC2RMIX Input 3 Volume */ + { 0x000008DE, 0x0000 }, /* R2270 - DRC2RMIX Input 4 Source */ + { 0x000008DF, 0x0080 }, /* R2271 - DRC2RMIX Input 4 Volume */ + { 0x00000900, 0x0000 }, /* R2304 - HPLP1MIX Input 1 Source */ + { 0x00000901, 0x0080 }, /* R2305 - HPLP1MIX Input 1 Volume */ + { 0x00000902, 0x0000 }, /* R2306 - HPLP1MIX Input 2 Source */ + { 0x00000903, 0x0080 }, /* R2307 - HPLP1MIX Input 2 Volume */ + { 0x00000904, 0x0000 }, /* R2308 - HPLP1MIX Input 3 Source */ + { 0x00000905, 0x0080 }, /* R2309 - HPLP1MIX Input 3 Volume */ + { 0x00000906, 0x0000 }, /* R2310 - HPLP1MIX Input 4 Source */ + { 0x00000907, 0x0080 }, /* R2311 - HPLP1MIX Input 4 Volume */ + { 0x00000908, 0x0000 }, /* R2312 - HPLP2MIX Input 1 Source */ + { 0x00000909, 0x0080 }, /* R2313 - HPLP2MIX Input 1 Volume */ + { 0x0000090A, 0x0000 }, /* R2314 - HPLP2MIX Input 2 Source */ + { 0x0000090B, 0x0080 }, /* R2315 - HPLP2MIX Input 2 Volume */ + { 0x0000090C, 0x0000 }, /* R2316 - HPLP2MIX Input 3 Source */ + { 0x0000090D, 0x0080 }, /* R2317 - HPLP2MIX Input 3 Volume */ + { 0x0000090E, 0x0000 }, /* R2318 - HPLP2MIX Input 4 Source */ + { 0x0000090F, 0x0080 }, /* R2319 - HPLP2MIX Input 4 Volume */ + { 0x00000910, 0x0000 }, /* R2320 - HPLP3MIX Input 1 Source */ + { 0x00000911, 0x0080 }, /* R2321 - HPLP3MIX Input 1 Volume */ + { 0x00000912, 0x0000 }, /* R2322 - HPLP3MIX Input 2 Source */ + { 0x00000913, 0x0080 }, /* R2323 - HPLP3MIX Input 2 Volume */ + { 0x00000914, 0x0000 }, /* R2324 - HPLP3MIX Input 3 Source */ + { 0x00000915, 0x0080 }, /* R2325 - HPLP3MIX Input 3 Volume */ + { 0x00000916, 0x0000 }, /* R2326 - HPLP3MIX Input 4 Source */ + { 0x00000917, 0x0080 }, /* R2327 - HPLP3MIX Input 4 Volume */ + { 0x00000918, 0x0000 }, /* R2328 - HPLP4MIX Input 1 Source */ + { 0x00000919, 0x0080 }, /* R2329 - HPLP4MIX Input 1 Volume */ + { 0x0000091A, 0x0000 }, /* R2330 - HPLP4MIX Input 2 Source */ + { 0x0000091B, 0x0080 }, /* R2331 - HPLP4MIX Input 2 Volume */ + { 0x0000091C, 0x0000 }, /* R2332 - HPLP4MIX Input 3 Source */ + { 0x0000091D, 0x0080 }, /* R2333 - HPLP4MIX Input 3 Volume */ + { 0x0000091E, 0x0000 }, /* R2334 - HPLP4MIX Input 4 Source */ + { 0x0000091F, 0x0080 }, /* R2335 - HPLP4MIX Input 4 Volume */ + { 0x00000980, 0x0000 }, /* R2432 - DSP2LMIX Input 1 Source */ + { 0x00000981, 0x0080 }, /* R2433 - DSP2LMIX Input 1 Volume */ + { 0x00000982, 0x0000 }, /* R2434 - DSP2LMIX Input 2 Source */ + { 0x00000983, 0x0080 }, /* R2435 - DSP2LMIX Input 2 Volume */ + { 0x00000984, 0x0000 }, /* R2436 - DSP2LMIX Input 3 Source */ + { 0x00000985, 0x0080 }, /* R2437 - DSP2LMIX Input 3 Volume */ + { 0x00000986, 0x0000 }, /* R2438 - DSP2LMIX Input 4 Source */ + { 0x00000987, 0x0080 }, /* R2439 - DSP2LMIX Input 4 Volume */ + { 0x00000988, 0x0000 }, /* R2440 - DSP2RMIX Input 1 Source */ + { 0x00000989, 0x0080 }, /* R2441 - DSP2RMIX Input 1 Volume */ + { 0x0000098A, 0x0000 }, /* R2442 - DSP2RMIX Input 2 Source */ + { 0x0000098B, 0x0080 }, /* R2443 - DSP2RMIX Input 2 Volume */ + { 0x0000098C, 0x0000 }, /* R2444 - DSP2RMIX Input 3 Source */ + { 0x0000098D, 0x0080 }, /* R2445 - DSP2RMIX Input 3 Volume */ + { 0x0000098E, 0x0000 }, /* R2446 - DSP2RMIX Input 4 Source */ + { 0x0000098F, 0x0080 }, /* R2447 - DSP2RMIX Input 4 Volume */ + { 0x00000990, 0x0000 }, /* R2448 - DSP2AUX1MIX Input 1 Source */ + { 0x00000998, 0x0000 }, /* R2456 - DSP2AUX2MIX Input 1 Source */ + { 0x000009A0, 0x0000 }, /* R2464 - DSP2AUX3MIX Input 1 Source */ + { 0x000009A8, 0x0000 }, /* R2472 - DSP2AUX4MIX Input 1 Source */ + { 0x000009B0, 0x0000 }, /* R2480 - DSP2AUX5MIX Input 1 Source */ + { 0x000009B8, 0x0000 }, /* R2488 - DSP2AUX6MIX Input 1 Source */ + { 0x000009C0, 0x0000 }, /* R2496 - DSP3LMIX Input 1 Source */ + { 0x000009C1, 0x0080 }, /* R2497 - DSP3LMIX Input 1 Volume */ + { 0x000009C2, 0x0000 }, /* R2498 - DSP3LMIX Input 2 Source */ + { 0x000009C3, 0x0080 }, /* R2499 - DSP3LMIX Input 2 Volume */ + { 0x000009C4, 0x0000 }, /* R2500 - DSP3LMIX Input 3 Source */ + { 0x000009C5, 0x0080 }, /* R2501 - DSP3LMIX Input 3 Volume */ + { 0x000009C6, 0x0000 }, /* R2502 - DSP3LMIX Input 4 Source */ + { 0x000009C7, 0x0080 }, /* R2503 - DSP3LMIX Input 4 Volume */ + { 0x000009C8, 0x0000 }, /* R2504 - DSP3RMIX Input 1 Source */ + { 0x000009C9, 0x0080 }, /* R2505 - DSP3RMIX Input 1 Volume */ + { 0x000009CA, 0x0000 }, /* R2506 - DSP3RMIX Input 2 Source */ + { 0x000009CB, 0x0080 }, /* R2507 - DSP3RMIX Input 2 Volume */ + { 0x000009CC, 0x0000 }, /* R2508 - DSP3RMIX Input 3 Source */ + { 0x000009CD, 0x0080 }, /* R2509 - DSP3RMIX Input 3 Volume */ + { 0x000009CE, 0x0000 }, /* R2510 - DSP3RMIX Input 4 Source */ + { 0x000009CF, 0x0080 }, /* R2511 - DSP3RMIX Input 4 Volume */ + { 0x000009D0, 0x0000 }, /* R2512 - DSP3AUX1MIX Input 1 Source */ + { 0x000009D8, 0x0000 }, /* R2520 - DSP3AUX2MIX Input 1 Source */ + { 0x000009E0, 0x0000 }, /* R2528 - DSP3AUX3MIX Input 1 Source */ + { 0x000009E8, 0x0000 }, /* R2536 - DSP3AUX4MIX Input 1 Source */ + { 0x000009F0, 0x0000 }, /* R2544 - DSP3AUX5MIX Input 1 Source */ + { 0x000009F8, 0x0000 }, /* R2552 - DSP3AUX6MIX Input 1 Source */ + { 0x00000A80, 0x0000 }, /* R2688 - ASRC1LMIX Input 1 Source */ + { 0x00000A88, 0x0000 }, /* R2696 - ASRC1RMIX Input 1 Source */ + { 0x00000A90, 0x0000 }, /* R2704 - ASRC2LMIX Input 1 Source */ + { 0x00000A98, 0x0000 }, /* R2712 - ASRC2RMIX Input 1 Source */ + { 0x00000B00, 0x0000 }, /* R2816 - ISRC1DEC1MIX Input 1 Source */ + { 0x00000B08, 0x0000 }, /* R2824 - ISRC1DEC2MIX Input 1 Source */ + { 0x00000B10, 0x0000 }, /* R2832 - ISRC1DEC3MIX Input 1 Source */ + { 0x00000B18, 0x0000 }, /* R2840 - ISRC1DEC4MIX Input 1 Source */ + { 0x00000B20, 0x0000 }, /* R2848 - ISRC1INT1MIX Input 1 Source */ + { 0x00000B28, 0x0000 }, /* R2856 - ISRC1INT2MIX Input 1 Source */ + { 0x00000B30, 0x0000 }, /* R2864 - ISRC1INT3MIX Input 1 Source */ + { 0x00000B38, 0x0000 }, /* R2872 - ISRC1INT4MIX Input 1 Source */ + { 0x00000B40, 0x0000 }, /* R2880 - ISRC2DEC1MIX Input 1 Source */ + { 0x00000B48, 0x0000 }, /* R2888 - ISRC2DEC2MIX Input 1 Source */ + { 0x00000B50, 0x0000 }, /* R2896 - ISRC2DEC3MIX Input 1 Source */ + { 0x00000B58, 0x0000 }, /* R2904 - ISRC2DEC4MIX Input 1 Source */ + { 0x00000B60, 0x0000 }, /* R2912 - ISRC2INT1MIX Input 1 Source */ + { 0x00000B68, 0x0000 }, /* R2920 - ISRC2INT2MIX Input 1 Source */ + { 0x00000B70, 0x0000 }, /* R2928 - ISRC2INT3MIX Input 1 Source */ + { 0x00000B78, 0x0000 }, /* R2936 - ISRC2INT4MIX Input 1 Source */ + { 0x00000B80, 0x0000 }, /* R2944 - ISRC3DEC1MIX Input 1 Source */ + { 0x00000B88, 0x0000 }, /* R2952 - ISRC3DEC2MIX Input 1 Source */ + { 0x00000B90, 0x0000 }, /* R2960 - ISRC3DEC3MIX Input 1 Source */ + { 0x00000B98, 0x0000 }, /* R2968 - ISRC3DEC4MIX Input 1 Source */ + { 0x00000BA0, 0x0000 }, /* R2976 - ISRC3INT1MIX Input 1 Source */ + { 0x00000BA8, 0x0000 }, /* R2984 - ISRC3INT2MIX Input 1 Source */ + { 0x00000BB0, 0x0000 }, /* R2992 - ISRC3INT3MIX Input 1 Source */ + { 0x00000BB8, 0x0000 }, /* R3000 - ISRC3INT4MIX Input 1 Source */ + { 0x00000C00, 0xA101 }, /* R3072 - GPIO1 CTRL */ + { 0x00000C01, 0xA101 }, /* R3073 - GPIO2 CTRL */ + { 0x00000C0F, 0x0400 }, /* R3087 - IRQ CTRL 1 */ + { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */ + { 0x00000C20, 0x0002 }, /* R3104 - Misc Pad Ctrl 1 */ + { 0x00000C21, 0x8001 }, /* R3105 - Misc Pad Ctrl 2 */ + { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */ + { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */ + { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */ + { 0x00000C25, 0x0000 }, /* R3109 - Misc Pad Ctrl 6 */ + { 0x00000C30, 0x0404 }, /* R3120 - Misc Pad Ctrl 7 */ + { 0x00000C32, 0x0404 }, /* R3122 - Misc Pad Ctrl 9 */ + { 0x00000C33, 0x0404 }, /* R3123 - Misc Pad Ctrl 10 */ + { 0x00000C34, 0x0404 }, /* R3124 - Misc Pad Ctrl 11 */ + { 0x00000C35, 0x0404 }, /* R3125 - Misc Pad Ctrl 12 */ + { 0x00000C36, 0x0400 }, /* R3126 - Misc Pad Ctrl 13 */ + { 0x00000C37, 0x0404 }, /* R3127 - Misc Pad Ctrl 14 */ + { 0x00000C39, 0x0400 }, /* R3129 - Misc Pad Ctrl 16 */ + { 0x00000D08, 0x0007 }, /* R3336 - Interrupt Status 1 Mask */ + { 0x00000D09, 0x06FF }, /* R3337 - Interrupt Status 2 Mask */ + { 0x00000D0A, 0xCFEF }, /* R3338 - Interrupt Status 3 Mask */ + { 0x00000D0B, 0xFFC3 }, /* R3339 - Interrupt Status 4 Mask */ + { 0x00000D0C, 0x000B }, /* R3340 - Interrupt Status 5 Mask */ + { 0x00000D0D, 0xD005 }, /* R3341 - Interrupt Status 6 Mask */ + { 0x00000D0F, 0x0000 }, /* R3343 - Interrupt Control */ + { 0x00000D18, 0x0007 }, /* R3352 - IRQ2 Status 1 Mask */ + { 0x00000D19, 0x06FF }, /* R3353 - IRQ2 Status 2 Mask */ + { 0x00000D1A, 0xCFEF }, /* R3354 - IRQ2 Status 3 Mask */ + { 0x00000D1B, 0xFFC3 }, /* R3355 - IRQ2 Status 4 Mask */ + { 0x00000D1C, 0x000B }, /* R3356 - IRQ2 Status 5 Mask */ + { 0x00000D1D, 0xD005 }, /* R3357 - IRQ2 Status 6 Mask */ + { 0x00000D1F, 0x0000 }, /* R3359 - IRQ2 Control */ + { 0x00000E00, 0x0000 }, /* R3584 - FX_Ctrl1 */ + { 0x00000E01, 0x0000 }, /* R3585 - FX_Ctrl2 */ + { 0x00000E10, 0x6318 }, /* R3600 - EQ1_1 */ + { 0x00000E11, 0x6300 }, /* R3601 - EQ1_2 */ + { 0x00000E12, 0x0FC8 }, /* R3602 - EQ1_3 */ + { 0x00000E13, 0x03FE }, /* R3603 - EQ1_4 */ + { 0x00000E14, 0x00E0 }, /* R3604 - EQ1_5 */ + { 0x00000E15, 0x1EC4 }, /* R3605 - EQ1_6 */ + { 0x00000E16, 0xF136 }, /* R3606 - EQ1_7 */ + { 0x00000E17, 0x0409 }, /* R3607 - EQ1_8 */ + { 0x00000E18, 0x04CC }, /* R3608 - EQ1_9 */ + { 0x00000E19, 0x1C9B }, /* R3609 - EQ1_10 */ + { 0x00000E1A, 0xF337 }, /* R3610 - EQ1_11 */ + { 0x00000E1B, 0x040B }, /* R3611 - EQ1_12 */ + { 0x00000E1C, 0x0CBB }, /* R3612 - EQ1_13 */ + { 0x00000E1D, 0x16F8 }, /* R3613 - EQ1_14 */ + { 0x00000E1E, 0xF7D9 }, /* R3614 - EQ1_15 */ + { 0x00000E1F, 0x040A }, /* R3615 - EQ1_16 */ + { 0x00000E20, 0x1F14 }, /* R3616 - EQ1_17 */ + { 0x00000E21, 0x058C }, /* R3617 - EQ1_18 */ + { 0x00000E22, 0x0563 }, /* R3618 - EQ1_19 */ + { 0x00000E23, 0x4000 }, /* R3619 - EQ1_20 */ + { 0x00000E24, 0x0B75 }, /* R3620 - EQ1_21 */ + { 0x00000E26, 0x6318 }, /* R3622 - EQ2_1 */ + { 0x00000E27, 0x6300 }, /* R3623 - EQ2_2 */ + { 0x00000E28, 0x0FC8 }, /* R3624 - EQ2_3 */ + { 0x00000E29, 0x03FE }, /* R3625 - EQ2_4 */ + { 0x00000E2A, 0x00E0 }, /* R3626 - EQ2_5 */ + { 0x00000E2B, 0x1EC4 }, /* R3627 - EQ2_6 */ + { 0x00000E2C, 0xF136 }, /* R3628 - EQ2_7 */ + { 0x00000E2D, 0x0409 }, /* R3629 - EQ2_8 */ + { 0x00000E2E, 0x04CC }, /* R3630 - EQ2_9 */ + { 0x00000E2F, 0x1C9B }, /* R3631 - EQ2_10 */ + { 0x00000E30, 0xF337 }, /* R3632 - EQ2_11 */ + { 0x00000E31, 0x040B }, /* R3633 - EQ2_12 */ + { 0x00000E32, 0x0CBB }, /* R3634 - EQ2_13 */ + { 0x00000E33, 0x16F8 }, /* R3635 - EQ2_14 */ + { 0x00000E34, 0xF7D9 }, /* R3636 - EQ2_15 */ + { 0x00000E35, 0x040A }, /* R3637 - EQ2_16 */ + { 0x00000E36, 0x1F14 }, /* R3638 - EQ2_17 */ + { 0x00000E37, 0x058C }, /* R3639 - EQ2_18 */ + { 0x00000E38, 0x0563 }, /* R3640 - EQ2_19 */ + { 0x00000E39, 0x4000 }, /* R3641 - EQ2_20 */ + { 0x00000E3A, 0x0B75 }, /* R3642 - EQ2_21 */ + { 0x00000E80, 0x0018 }, /* R3712 - DRC1 ctrl1 */ + { 0x00000E81, 0x0933 }, /* R3713 - DRC1 ctrl2 */ + { 0x00000E82, 0x0018 }, /* R3714 - DRC1 ctrl3 */ + { 0x00000E83, 0x0000 }, /* R3715 - DRC1 ctrl4 */ + { 0x00000E84, 0x0000 }, /* R3716 - DRC1 ctrl5 */ + { 0x00000E89, 0x0018 }, /* R3721 - DRC2 ctrl1 */ + { 0x00000E8A, 0x0933 }, /* R3722 - DRC2 ctrl2 */ + { 0x00000E8B, 0x0018 }, /* R3723 - DRC2 ctrl3 */ + { 0x00000E8C, 0x0000 }, /* R3724 - DRC2 ctrl4 */ + { 0x00000E8D, 0x0000 }, /* R3725 - DRC2 ctrl5 */ + { 0x00000EC0, 0x0000 }, /* R3776 - HPLPF1_1 */ + { 0x00000EC1, 0x0000 }, /* R3777 - HPLPF1_2 */ + { 0x00000EC4, 0x0000 }, /* R3780 - HPLPF2_1 */ + { 0x00000EC5, 0x0000 }, /* R3781 - HPLPF2_2 */ + { 0x00000EC8, 0x0000 }, /* R3784 - HPLPF3_1 */ + { 0x00000EC9, 0x0000 }, /* R3785 - HPLPF3_2 */ + { 0x00000ECC, 0x0000 }, /* R3788 - HPLPF4_1 */ + { 0x00000ECD, 0x0000 }, /* R3789 - HPLPF4_2 */ + { 0x00000EE0, 0x0000 }, /* R3808 - ASRC_ENABLE */ + { 0x00000EE2, 0x0000 }, /* R3810 - ASRC_RATE1 */ + { 0x00000EF0, 0x0000 }, /* R3824 - ISRC 1 CTRL 1 */ + { 0x00000EF1, 0x0000 }, /* R3825 - ISRC 1 CTRL 2 */ + { 0x00000EF2, 0x0000 }, /* R3826 - ISRC 1 CTRL 3 */ + { 0x00000EF3, 0x0000 }, /* R3827 - ISRC 2 CTRL 1 */ + { 0x00000EF4, 0x0000 }, /* R3828 - ISRC 2 CTRL 2 */ + { 0x00000EF5, 0x0000 }, /* R3829 - ISRC 2 CTRL 3 */ + { 0x00000EF6, 0x0000 }, /* R3830 - ISRC 3 CTRL 1 */ + { 0x00000EF7, 0x0000 }, /* R3831 - ISRC 3 CTRL 2 */ + { 0x00000EF8, 0x0000 }, /* R3832 - ISRC 3 CTRL 3 */ + { 0x00001200, 0x0010 }, /* R4608 - DSP2 Control 1 */ + { 0x00001300, 0x0010 }, /* R4864 - DSP3 Control 1 */ +}; + +static bool cs47l24_is_adsp_memory(struct device *dev, unsigned int reg) +{ + if ((reg >= 0x200000 && reg < 0x206000) || + (reg >= 0x280000 && reg < 0x282000) || + (reg >= 0x290000 && reg < 0x2a8000) || + (reg >= 0x2a8000 && reg < 0x2b4000) || + (reg >= 0x300000 && reg < 0x309000) || + (reg >= 0x380000 && reg < 0x382000) || + (reg >= 0x390000 && reg < 0x3a8000) || + (reg >= 0x3a8000 && reg < 0x3b4000)) + return true; + else + return false; +} + +static bool cs47l24_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_SOFTWARE_RESET: + case ARIZONA_DEVICE_REVISION: + case ARIZONA_CTRL_IF_SPI_CFG_1: + case ARIZONA_WRITE_SEQUENCER_CTRL_0: + case ARIZONA_WRITE_SEQUENCER_CTRL_1: + case ARIZONA_WRITE_SEQUENCER_CTRL_2: + case ARIZONA_TONE_GENERATOR_1: + case ARIZONA_TONE_GENERATOR_2: + case ARIZONA_TONE_GENERATOR_3: + case ARIZONA_TONE_GENERATOR_4: + case ARIZONA_TONE_GENERATOR_5: + case ARIZONA_PWM_DRIVE_1: + case ARIZONA_PWM_DRIVE_2: + case ARIZONA_PWM_DRIVE_3: + case ARIZONA_SEQUENCE_CONTROL: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_1: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_4: + case ARIZONA_COMFORT_NOISE_GENERATOR: + case ARIZONA_HAPTICS_CONTROL_1: + case ARIZONA_HAPTICS_CONTROL_2: + case ARIZONA_HAPTICS_PHASE_1_INTENSITY: + case ARIZONA_HAPTICS_PHASE_1_DURATION: + case ARIZONA_HAPTICS_PHASE_2_INTENSITY: + case ARIZONA_HAPTICS_PHASE_2_DURATION: + case ARIZONA_HAPTICS_PHASE_3_INTENSITY: + case ARIZONA_HAPTICS_PHASE_3_DURATION: + case ARIZONA_HAPTICS_STATUS: + case ARIZONA_CLOCK_32K_1: + case ARIZONA_SYSTEM_CLOCK_1: + case ARIZONA_SAMPLE_RATE_1: + case ARIZONA_SAMPLE_RATE_2: + case ARIZONA_SAMPLE_RATE_3: + case ARIZONA_SAMPLE_RATE_1_STATUS: + case ARIZONA_SAMPLE_RATE_2_STATUS: + case ARIZONA_SAMPLE_RATE_3_STATUS: + case ARIZONA_ASYNC_CLOCK_1: + case ARIZONA_ASYNC_SAMPLE_RATE_1: + case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: + case ARIZONA_ASYNC_SAMPLE_RATE_2: + case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: + case ARIZONA_OUTPUT_SYSTEM_CLOCK: + case ARIZONA_OUTPUT_ASYNC_CLOCK: + case ARIZONA_RATE_ESTIMATOR_1: + case ARIZONA_RATE_ESTIMATOR_2: + case ARIZONA_RATE_ESTIMATOR_3: + case ARIZONA_RATE_ESTIMATOR_4: + case ARIZONA_RATE_ESTIMATOR_5: + case ARIZONA_FLL1_CONTROL_1: + case ARIZONA_FLL1_CONTROL_2: + case ARIZONA_FLL1_CONTROL_3: + case ARIZONA_FLL1_CONTROL_4: + case ARIZONA_FLL1_CONTROL_5: + case ARIZONA_FLL1_CONTROL_6: + case ARIZONA_FLL1_CONTROL_7: + case ARIZONA_FLL1_LOOP_FILTER_TEST_1: + case ARIZONA_FLL1_NCO_TEST_0: + case ARIZONA_FLL1_SYNCHRONISER_1: + case ARIZONA_FLL1_SYNCHRONISER_2: + case ARIZONA_FLL1_SYNCHRONISER_3: + case ARIZONA_FLL1_SYNCHRONISER_4: + case ARIZONA_FLL1_SYNCHRONISER_5: + case ARIZONA_FLL1_SYNCHRONISER_6: + case ARIZONA_FLL1_SYNCHRONISER_7: + case ARIZONA_FLL1_SPREAD_SPECTRUM: + case ARIZONA_FLL1_GPIO_CLOCK: + case ARIZONA_FLL2_CONTROL_1: + case ARIZONA_FLL2_CONTROL_2: + case ARIZONA_FLL2_CONTROL_3: + case ARIZONA_FLL2_CONTROL_4: + case ARIZONA_FLL2_CONTROL_5: + case ARIZONA_FLL2_CONTROL_6: + case ARIZONA_FLL2_CONTROL_7: + case ARIZONA_FLL2_LOOP_FILTER_TEST_1: + case ARIZONA_FLL2_NCO_TEST_0: + case ARIZONA_FLL2_SYNCHRONISER_1: + case ARIZONA_FLL2_SYNCHRONISER_2: + case ARIZONA_FLL2_SYNCHRONISER_3: + case ARIZONA_FLL2_SYNCHRONISER_4: + case ARIZONA_FLL2_SYNCHRONISER_5: + case ARIZONA_FLL2_SYNCHRONISER_6: + case ARIZONA_FLL2_SYNCHRONISER_7: + case ARIZONA_FLL2_SPREAD_SPECTRUM: + case ARIZONA_FLL2_GPIO_CLOCK: + case ARIZONA_MIC_BIAS_CTRL_1: + case ARIZONA_MIC_BIAS_CTRL_2: + case ARIZONA_HP_CTRL_1L: + case ARIZONA_HP_CTRL_1R: + case ARIZONA_INPUT_ENABLES: + case ARIZONA_INPUT_ENABLES_STATUS: + case ARIZONA_INPUT_RATE: + case ARIZONA_INPUT_VOLUME_RAMP: + case ARIZONA_HPF_CONTROL: + case ARIZONA_IN1L_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_1L: + case ARIZONA_DMIC1L_CONTROL: + case ARIZONA_IN1R_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_1R: + case ARIZONA_DMIC1R_CONTROL: + case ARIZONA_IN2L_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_2L: + case ARIZONA_DMIC2L_CONTROL: + case ARIZONA_IN2R_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_2R: + case ARIZONA_DMIC2R_CONTROL: + case ARIZONA_ADC_VCO_CAL_4: + case ARIZONA_ADC_VCO_CAL_5: + case ARIZONA_ADC_VCO_CAL_6: + case ARIZONA_ADC_VCO_CAL_7: + case ARIZONA_ADC_VCO_CAL_8: + case ARIZONA_ADC_VCO_CAL_9: + case ARIZONA_OUTPUT_ENABLES_1: + case ARIZONA_OUTPUT_STATUS_1: + case ARIZONA_OUTPUT_STANDBY_1: + case ARIZONA_RAW_OUTPUT_STATUS_1: + case ARIZONA_OUTPUT_RATE_1: + case ARIZONA_OUTPUT_VOLUME_RAMP: + case ARIZONA_OUTPUT_PATH_CONFIG_1L: + case ARIZONA_DAC_DIGITAL_VOLUME_1L: + case ARIZONA_DAC_VOLUME_LIMIT_1L: + case ARIZONA_NOISE_GATE_SELECT_1L: + case ARIZONA_DAC_DIGITAL_VOLUME_1R: + case ARIZONA_DAC_VOLUME_LIMIT_1R: + case ARIZONA_NOISE_GATE_SELECT_1R: + case ARIZONA_DAC_DIGITAL_VOLUME_4L: + case ARIZONA_OUT_VOLUME_4L: + case ARIZONA_NOISE_GATE_SELECT_4L: + case ARIZONA_DAC_AEC_CONTROL_1: + case ARIZONA_NOISE_GATE_CONTROL: + case ARIZONA_HP1_SHORT_CIRCUIT_CTRL: + case ARIZONA_SPK_CTRL_3: + case ARIZONA_AIF1_BCLK_CTRL: + case ARIZONA_AIF1_TX_PIN_CTRL: + case ARIZONA_AIF1_RX_PIN_CTRL: + case ARIZONA_AIF1_RATE_CTRL: + case ARIZONA_AIF1_FORMAT: + case ARIZONA_AIF1_RX_BCLK_RATE: + case ARIZONA_AIF1_FRAME_CTRL_1: + case ARIZONA_AIF1_FRAME_CTRL_2: + case ARIZONA_AIF1_FRAME_CTRL_3: + case ARIZONA_AIF1_FRAME_CTRL_4: + case ARIZONA_AIF1_FRAME_CTRL_5: + case ARIZONA_AIF1_FRAME_CTRL_6: + case ARIZONA_AIF1_FRAME_CTRL_7: + case ARIZONA_AIF1_FRAME_CTRL_8: + case ARIZONA_AIF1_FRAME_CTRL_9: + case ARIZONA_AIF1_FRAME_CTRL_10: + case ARIZONA_AIF1_FRAME_CTRL_11: + case ARIZONA_AIF1_FRAME_CTRL_12: + case ARIZONA_AIF1_FRAME_CTRL_13: + case ARIZONA_AIF1_FRAME_CTRL_14: + case ARIZONA_AIF1_FRAME_CTRL_15: + case ARIZONA_AIF1_FRAME_CTRL_16: + case ARIZONA_AIF1_FRAME_CTRL_17: + case ARIZONA_AIF1_FRAME_CTRL_18: + case ARIZONA_AIF1_TX_ENABLES: + case ARIZONA_AIF1_RX_ENABLES: + case ARIZONA_AIF2_BCLK_CTRL: + case ARIZONA_AIF2_TX_PIN_CTRL: + case ARIZONA_AIF2_RX_PIN_CTRL: + case ARIZONA_AIF2_RATE_CTRL: + case ARIZONA_AIF2_FORMAT: + case ARIZONA_AIF2_RX_BCLK_RATE: + case ARIZONA_AIF2_FRAME_CTRL_1: + case ARIZONA_AIF2_FRAME_CTRL_2: + case ARIZONA_AIF2_FRAME_CTRL_3: + case ARIZONA_AIF2_FRAME_CTRL_4: + case ARIZONA_AIF2_FRAME_CTRL_5: + case ARIZONA_AIF2_FRAME_CTRL_6: + case ARIZONA_AIF2_FRAME_CTRL_7: + case ARIZONA_AIF2_FRAME_CTRL_8: + case ARIZONA_AIF2_FRAME_CTRL_11: + case ARIZONA_AIF2_FRAME_CTRL_12: + case ARIZONA_AIF2_FRAME_CTRL_13: + case ARIZONA_AIF2_FRAME_CTRL_14: + case ARIZONA_AIF2_FRAME_CTRL_15: + case ARIZONA_AIF2_FRAME_CTRL_16: + case ARIZONA_AIF2_TX_ENABLES: + case ARIZONA_AIF2_RX_ENABLES: + case ARIZONA_AIF3_BCLK_CTRL: + case ARIZONA_AIF3_TX_PIN_CTRL: + case ARIZONA_AIF3_RX_PIN_CTRL: + case ARIZONA_AIF3_RATE_CTRL: + case ARIZONA_AIF3_FORMAT: + case ARIZONA_AIF3_RX_BCLK_RATE: + case ARIZONA_AIF3_FRAME_CTRL_1: + case ARIZONA_AIF3_FRAME_CTRL_2: + case ARIZONA_AIF3_FRAME_CTRL_3: + case ARIZONA_AIF3_FRAME_CTRL_4: + case ARIZONA_AIF3_FRAME_CTRL_11: + case ARIZONA_AIF3_FRAME_CTRL_12: + case ARIZONA_AIF3_TX_ENABLES: + case ARIZONA_AIF3_RX_ENABLES: + case ARIZONA_PWM1MIX_INPUT_1_SOURCE: + case ARIZONA_PWM1MIX_INPUT_1_VOLUME: + case ARIZONA_PWM1MIX_INPUT_2_SOURCE: + case ARIZONA_PWM1MIX_INPUT_2_VOLUME: + case ARIZONA_PWM1MIX_INPUT_3_SOURCE: + case ARIZONA_PWM1MIX_INPUT_3_VOLUME: + case ARIZONA_PWM1MIX_INPUT_4_SOURCE: + case ARIZONA_PWM1MIX_INPUT_4_VOLUME: + case ARIZONA_PWM2MIX_INPUT_1_SOURCE: + case ARIZONA_PWM2MIX_INPUT_1_VOLUME: + case ARIZONA_PWM2MIX_INPUT_2_SOURCE: + case ARIZONA_PWM2MIX_INPUT_2_VOLUME: + case ARIZONA_PWM2MIX_INPUT_3_SOURCE: + case ARIZONA_PWM2MIX_INPUT_3_VOLUME: + case ARIZONA_PWM2MIX_INPUT_4_SOURCE: + case ARIZONA_PWM2MIX_INPUT_4_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_1_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_1_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_2_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_2_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_3_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_3_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_4_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_4_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX7MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX7MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX7MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX7MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX7MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX7MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX7MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX8MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX8MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX8MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX8MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX8MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX8MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX8MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX5MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX5MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX5MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX5MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX5MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX5MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX5MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX6MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX6MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX6MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX6MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_4_VOLUME: + case ARIZONA_EQ1MIX_INPUT_1_SOURCE: + case ARIZONA_EQ1MIX_INPUT_1_VOLUME: + case ARIZONA_EQ1MIX_INPUT_2_SOURCE: + case ARIZONA_EQ1MIX_INPUT_2_VOLUME: + case ARIZONA_EQ1MIX_INPUT_3_SOURCE: + case ARIZONA_EQ1MIX_INPUT_3_VOLUME: + case ARIZONA_EQ1MIX_INPUT_4_SOURCE: + case ARIZONA_EQ1MIX_INPUT_4_VOLUME: + case ARIZONA_EQ2MIX_INPUT_1_SOURCE: + case ARIZONA_EQ2MIX_INPUT_1_VOLUME: + case ARIZONA_EQ2MIX_INPUT_2_SOURCE: + case ARIZONA_EQ2MIX_INPUT_2_VOLUME: + case ARIZONA_EQ2MIX_INPUT_3_SOURCE: + case ARIZONA_EQ2MIX_INPUT_3_VOLUME: + case ARIZONA_EQ2MIX_INPUT_4_SOURCE: + case ARIZONA_EQ2MIX_INPUT_4_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_1_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_1_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_2_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_2_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_3_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_3_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_4_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_4_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_1_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_1_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_2_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_2_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_3_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_3_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_4_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_4_VOLUME: + case ARIZONA_DRC2LMIX_INPUT_1_SOURCE: + case ARIZONA_DRC2LMIX_INPUT_1_VOLUME: + case ARIZONA_DRC2LMIX_INPUT_2_SOURCE: + case ARIZONA_DRC2LMIX_INPUT_2_VOLUME: + case ARIZONA_DRC2LMIX_INPUT_3_SOURCE: + case ARIZONA_DRC2LMIX_INPUT_3_VOLUME: + case ARIZONA_DRC2LMIX_INPUT_4_SOURCE: + case ARIZONA_DRC2LMIX_INPUT_4_VOLUME: + case ARIZONA_DRC2RMIX_INPUT_1_SOURCE: + case ARIZONA_DRC2RMIX_INPUT_1_VOLUME: + case ARIZONA_DRC2RMIX_INPUT_2_SOURCE: + case ARIZONA_DRC2RMIX_INPUT_2_VOLUME: + case ARIZONA_DRC2RMIX_INPUT_3_SOURCE: + case ARIZONA_DRC2RMIX_INPUT_3_VOLUME: + case ARIZONA_DRC2RMIX_INPUT_4_SOURCE: + case ARIZONA_DRC2RMIX_INPUT_4_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_4_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_4_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_4_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_4_VOLUME: + case ARIZONA_DSP2LMIX_INPUT_1_SOURCE: + case ARIZONA_DSP2LMIX_INPUT_1_VOLUME: + case ARIZONA_DSP2LMIX_INPUT_2_SOURCE: + case ARIZONA_DSP2LMIX_INPUT_2_VOLUME: + case ARIZONA_DSP2LMIX_INPUT_3_SOURCE: + case ARIZONA_DSP2LMIX_INPUT_3_VOLUME: + case ARIZONA_DSP2LMIX_INPUT_4_SOURCE: + case ARIZONA_DSP2LMIX_INPUT_4_VOLUME: + case ARIZONA_DSP2RMIX_INPUT_1_SOURCE: + case ARIZONA_DSP2RMIX_INPUT_1_VOLUME: + case ARIZONA_DSP2RMIX_INPUT_2_SOURCE: + case ARIZONA_DSP2RMIX_INPUT_2_VOLUME: + case ARIZONA_DSP2RMIX_INPUT_3_SOURCE: + case ARIZONA_DSP2RMIX_INPUT_3_VOLUME: + case ARIZONA_DSP2RMIX_INPUT_4_SOURCE: + case ARIZONA_DSP2RMIX_INPUT_4_VOLUME: + case ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2AUX2MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2AUX3MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2AUX4MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2AUX5MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2AUX6MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3LMIX_INPUT_1_SOURCE: + case ARIZONA_DSP3LMIX_INPUT_1_VOLUME: + case ARIZONA_DSP3LMIX_INPUT_2_SOURCE: + case ARIZONA_DSP3LMIX_INPUT_2_VOLUME: + case ARIZONA_DSP3LMIX_INPUT_3_SOURCE: + case ARIZONA_DSP3LMIX_INPUT_3_VOLUME: + case ARIZONA_DSP3LMIX_INPUT_4_SOURCE: + case ARIZONA_DSP3LMIX_INPUT_4_VOLUME: + case ARIZONA_DSP3RMIX_INPUT_1_SOURCE: + case ARIZONA_DSP3RMIX_INPUT_1_VOLUME: + case ARIZONA_DSP3RMIX_INPUT_2_SOURCE: + case ARIZONA_DSP3RMIX_INPUT_2_VOLUME: + case ARIZONA_DSP3RMIX_INPUT_3_SOURCE: + case ARIZONA_DSP3RMIX_INPUT_3_VOLUME: + case ARIZONA_DSP3RMIX_INPUT_4_SOURCE: + case ARIZONA_DSP3RMIX_INPUT_4_VOLUME: + case ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3AUX2MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3AUX3MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3AUX4MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3AUX5MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3AUX6MIX_INPUT_1_SOURCE: + case ARIZONA_ASRC1LMIX_INPUT_1_SOURCE: + case ARIZONA_ASRC1RMIX_INPUT_1_SOURCE: + case ARIZONA_ASRC2LMIX_INPUT_1_SOURCE: + case ARIZONA_ASRC2RMIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC3DEC3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC3DEC4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC3INT3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC3INT4MIX_INPUT_1_SOURCE: + case ARIZONA_GPIO1_CTRL: + case ARIZONA_GPIO2_CTRL: + case ARIZONA_IRQ_CTRL_1: + case ARIZONA_GPIO_DEBOUNCE_CONFIG: + case ARIZONA_MISC_PAD_CTRL_1: + case ARIZONA_MISC_PAD_CTRL_2: + case ARIZONA_MISC_PAD_CTRL_3: + case ARIZONA_MISC_PAD_CTRL_4: + case ARIZONA_MISC_PAD_CTRL_5: + case ARIZONA_MISC_PAD_CTRL_6: + case ARIZONA_MISC_PAD_CTRL_7: + case ARIZONA_MISC_PAD_CTRL_9: + case ARIZONA_MISC_PAD_CTRL_10: + case ARIZONA_MISC_PAD_CTRL_11: + case ARIZONA_MISC_PAD_CTRL_12: + case ARIZONA_MISC_PAD_CTRL_13: + case ARIZONA_MISC_PAD_CTRL_14: + case ARIZONA_MISC_PAD_CTRL_16: + case ARIZONA_INTERRUPT_STATUS_1: + case ARIZONA_INTERRUPT_STATUS_2: + case ARIZONA_INTERRUPT_STATUS_3: + case ARIZONA_INTERRUPT_STATUS_4: + case ARIZONA_INTERRUPT_STATUS_5: + case ARIZONA_INTERRUPT_STATUS_6: + case ARIZONA_INTERRUPT_STATUS_1_MASK: + case ARIZONA_INTERRUPT_STATUS_2_MASK: + case ARIZONA_INTERRUPT_STATUS_3_MASK: + case ARIZONA_INTERRUPT_STATUS_4_MASK: + case ARIZONA_INTERRUPT_STATUS_5_MASK: + case ARIZONA_INTERRUPT_STATUS_6_MASK: + case ARIZONA_INTERRUPT_CONTROL: + case ARIZONA_IRQ2_STATUS_1: + case ARIZONA_IRQ2_STATUS_2: + case ARIZONA_IRQ2_STATUS_3: + case ARIZONA_IRQ2_STATUS_4: + case ARIZONA_IRQ2_STATUS_5: + case ARIZONA_IRQ2_STATUS_6: + case ARIZONA_IRQ2_STATUS_1_MASK: + case ARIZONA_IRQ2_STATUS_2_MASK: + case ARIZONA_IRQ2_STATUS_3_MASK: + case ARIZONA_IRQ2_STATUS_4_MASK: + case ARIZONA_IRQ2_STATUS_5_MASK: + case ARIZONA_IRQ2_STATUS_6_MASK: + case ARIZONA_IRQ2_CONTROL: + case ARIZONA_INTERRUPT_RAW_STATUS_2: + case ARIZONA_INTERRUPT_RAW_STATUS_3: + case ARIZONA_INTERRUPT_RAW_STATUS_4: + case ARIZONA_INTERRUPT_RAW_STATUS_5: + case ARIZONA_INTERRUPT_RAW_STATUS_6: + case ARIZONA_INTERRUPT_RAW_STATUS_7: + case ARIZONA_INTERRUPT_RAW_STATUS_8: + case ARIZONA_INTERRUPT_RAW_STATUS_9: + case ARIZONA_IRQ_PIN_STATUS: + case ARIZONA_FX_CTRL1: + case ARIZONA_FX_CTRL2: + case ARIZONA_EQ1_1: + case ARIZONA_EQ1_2: + case ARIZONA_EQ1_3: + case ARIZONA_EQ1_4: + case ARIZONA_EQ1_5: + case ARIZONA_EQ1_6: + case ARIZONA_EQ1_7: + case ARIZONA_EQ1_8: + case ARIZONA_EQ1_9: + case ARIZONA_EQ1_10: + case ARIZONA_EQ1_11: + case ARIZONA_EQ1_12: + case ARIZONA_EQ1_13: + case ARIZONA_EQ1_14: + case ARIZONA_EQ1_15: + case ARIZONA_EQ1_16: + case ARIZONA_EQ1_17: + case ARIZONA_EQ1_18: + case ARIZONA_EQ1_19: + case ARIZONA_EQ1_20: + case ARIZONA_EQ1_21: + case ARIZONA_EQ2_1: + case ARIZONA_EQ2_2: + case ARIZONA_EQ2_3: + case ARIZONA_EQ2_4: + case ARIZONA_EQ2_5: + case ARIZONA_EQ2_6: + case ARIZONA_EQ2_7: + case ARIZONA_EQ2_8: + case ARIZONA_EQ2_9: + case ARIZONA_EQ2_10: + case ARIZONA_EQ2_11: + case ARIZONA_EQ2_12: + case ARIZONA_EQ2_13: + case ARIZONA_EQ2_14: + case ARIZONA_EQ2_15: + case ARIZONA_EQ2_16: + case ARIZONA_EQ2_17: + case ARIZONA_EQ2_18: + case ARIZONA_EQ2_19: + case ARIZONA_EQ2_20: + case ARIZONA_EQ2_21: + case ARIZONA_DRC1_CTRL1: + case ARIZONA_DRC1_CTRL2: + case ARIZONA_DRC1_CTRL3: + case ARIZONA_DRC1_CTRL4: + case ARIZONA_DRC1_CTRL5: + case ARIZONA_DRC2_CTRL1: + case ARIZONA_DRC2_CTRL2: + case ARIZONA_DRC2_CTRL3: + case ARIZONA_DRC2_CTRL4: + case ARIZONA_DRC2_CTRL5: + case ARIZONA_HPLPF1_1: + case ARIZONA_HPLPF1_2: + case ARIZONA_HPLPF2_1: + case ARIZONA_HPLPF2_2: + case ARIZONA_HPLPF3_1: + case ARIZONA_HPLPF3_2: + case ARIZONA_HPLPF4_1: + case ARIZONA_HPLPF4_2: + case ARIZONA_ASRC_ENABLE: + case ARIZONA_ASRC_STATUS: + case ARIZONA_ASRC_RATE1: + case ARIZONA_ISRC_1_CTRL_1: + case ARIZONA_ISRC_1_CTRL_2: + case ARIZONA_ISRC_1_CTRL_3: + case ARIZONA_ISRC_2_CTRL_1: + case ARIZONA_ISRC_2_CTRL_2: + case ARIZONA_ISRC_2_CTRL_3: + case ARIZONA_ISRC_3_CTRL_1: + case ARIZONA_ISRC_3_CTRL_2: + case ARIZONA_ISRC_3_CTRL_3: + case ARIZONA_DSP2_CONTROL_1: + case ARIZONA_DSP2_CLOCKING_1: + case ARIZONA_DSP2_STATUS_1: + case ARIZONA_DSP2_STATUS_2: + case ARIZONA_DSP2_STATUS_3: + case ARIZONA_DSP2_STATUS_4: + case ARIZONA_DSP2_WDMA_BUFFER_1: + case ARIZONA_DSP2_WDMA_BUFFER_2: + case ARIZONA_DSP2_WDMA_BUFFER_3: + case ARIZONA_DSP2_WDMA_BUFFER_4: + case ARIZONA_DSP2_WDMA_BUFFER_5: + case ARIZONA_DSP2_WDMA_BUFFER_6: + case ARIZONA_DSP2_WDMA_BUFFER_7: + case ARIZONA_DSP2_WDMA_BUFFER_8: + case ARIZONA_DSP2_RDMA_BUFFER_1: + case ARIZONA_DSP2_RDMA_BUFFER_2: + case ARIZONA_DSP2_RDMA_BUFFER_3: + case ARIZONA_DSP2_RDMA_BUFFER_4: + case ARIZONA_DSP2_RDMA_BUFFER_5: + case ARIZONA_DSP2_RDMA_BUFFER_6: + case ARIZONA_DSP2_WDMA_CONFIG_1: + case ARIZONA_DSP2_WDMA_CONFIG_2: + case ARIZONA_DSP2_WDMA_OFFSET_1: + case ARIZONA_DSP2_RDMA_CONFIG_1: + case ARIZONA_DSP2_RDMA_OFFSET_1: + case ARIZONA_DSP2_EXTERNAL_START_SELECT_1: + case ARIZONA_DSP2_SCRATCH_0: + case ARIZONA_DSP2_SCRATCH_1: + case ARIZONA_DSP2_SCRATCH_2: + case ARIZONA_DSP2_SCRATCH_3: + case ARIZONA_DSP3_CONTROL_1: + case ARIZONA_DSP3_CLOCKING_1: + case ARIZONA_DSP3_STATUS_1: + case ARIZONA_DSP3_STATUS_2: + case ARIZONA_DSP3_STATUS_3: + case ARIZONA_DSP3_STATUS_4: + case ARIZONA_DSP3_WDMA_BUFFER_1: + case ARIZONA_DSP3_WDMA_BUFFER_2: + case ARIZONA_DSP3_WDMA_BUFFER_3: + case ARIZONA_DSP3_WDMA_BUFFER_4: + case ARIZONA_DSP3_WDMA_BUFFER_5: + case ARIZONA_DSP3_WDMA_BUFFER_6: + case ARIZONA_DSP3_WDMA_BUFFER_7: + case ARIZONA_DSP3_WDMA_BUFFER_8: + case ARIZONA_DSP3_RDMA_BUFFER_1: + case ARIZONA_DSP3_RDMA_BUFFER_2: + case ARIZONA_DSP3_RDMA_BUFFER_3: + case ARIZONA_DSP3_RDMA_BUFFER_4: + case ARIZONA_DSP3_RDMA_BUFFER_5: + case ARIZONA_DSP3_RDMA_BUFFER_6: + case ARIZONA_DSP3_WDMA_CONFIG_1: + case ARIZONA_DSP3_WDMA_CONFIG_2: + case ARIZONA_DSP3_WDMA_OFFSET_1: + case ARIZONA_DSP3_RDMA_CONFIG_1: + case ARIZONA_DSP3_RDMA_OFFSET_1: + case ARIZONA_DSP3_EXTERNAL_START_SELECT_1: + case ARIZONA_DSP3_SCRATCH_0: + case ARIZONA_DSP3_SCRATCH_1: + case ARIZONA_DSP3_SCRATCH_2: + case ARIZONA_DSP3_SCRATCH_3: + return true; + default: + return cs47l24_is_adsp_memory(dev, reg); + } +} + +static bool cs47l24_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_SOFTWARE_RESET: + case ARIZONA_DEVICE_REVISION: + case ARIZONA_WRITE_SEQUENCER_CTRL_0: + case ARIZONA_WRITE_SEQUENCER_CTRL_1: + case ARIZONA_WRITE_SEQUENCER_CTRL_2: + case ARIZONA_HAPTICS_STATUS: + case ARIZONA_SAMPLE_RATE_1_STATUS: + case ARIZONA_SAMPLE_RATE_2_STATUS: + case ARIZONA_SAMPLE_RATE_3_STATUS: + case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: + case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: + case ARIZONA_HP_CTRL_1L: + case ARIZONA_HP_CTRL_1R: + case ARIZONA_INPUT_ENABLES_STATUS: + case ARIZONA_OUTPUT_STATUS_1: + case ARIZONA_RAW_OUTPUT_STATUS_1: + case ARIZONA_ADC_VCO_CAL_4: + case ARIZONA_ADC_VCO_CAL_5: + case ARIZONA_ADC_VCO_CAL_6: + case ARIZONA_ADC_VCO_CAL_7: + case ARIZONA_ADC_VCO_CAL_8: + case ARIZONA_ADC_VCO_CAL_9: + case ARIZONA_INTERRUPT_STATUS_1: + case ARIZONA_INTERRUPT_STATUS_2: + case ARIZONA_INTERRUPT_STATUS_3: + case ARIZONA_INTERRUPT_STATUS_4: + case ARIZONA_INTERRUPT_STATUS_5: + case ARIZONA_INTERRUPT_STATUS_6: + case ARIZONA_IRQ2_STATUS_1: + case ARIZONA_IRQ2_STATUS_2: + case ARIZONA_IRQ2_STATUS_3: + case ARIZONA_IRQ2_STATUS_4: + case ARIZONA_IRQ2_STATUS_5: + case ARIZONA_IRQ2_STATUS_6: + case ARIZONA_INTERRUPT_RAW_STATUS_2: + case ARIZONA_INTERRUPT_RAW_STATUS_3: + case ARIZONA_INTERRUPT_RAW_STATUS_4: + case ARIZONA_INTERRUPT_RAW_STATUS_5: + case ARIZONA_INTERRUPT_RAW_STATUS_6: + case ARIZONA_INTERRUPT_RAW_STATUS_7: + case ARIZONA_INTERRUPT_RAW_STATUS_8: + case ARIZONA_INTERRUPT_RAW_STATUS_9: + case ARIZONA_IRQ_PIN_STATUS: + case ARIZONA_FX_CTRL2: + case ARIZONA_ASRC_STATUS: + case ARIZONA_DSP2_STATUS_1: + case ARIZONA_DSP2_STATUS_2: + case ARIZONA_DSP2_STATUS_3: + case ARIZONA_DSP2_STATUS_4: + case ARIZONA_DSP2_WDMA_BUFFER_1: + case ARIZONA_DSP2_WDMA_BUFFER_2: + case ARIZONA_DSP2_WDMA_BUFFER_3: + case ARIZONA_DSP2_WDMA_BUFFER_4: + case ARIZONA_DSP2_WDMA_BUFFER_5: + case ARIZONA_DSP2_WDMA_BUFFER_6: + case ARIZONA_DSP2_WDMA_BUFFER_7: + case ARIZONA_DSP2_WDMA_BUFFER_8: + case ARIZONA_DSP2_RDMA_BUFFER_1: + case ARIZONA_DSP2_RDMA_BUFFER_2: + case ARIZONA_DSP2_RDMA_BUFFER_3: + case ARIZONA_DSP2_RDMA_BUFFER_4: + case ARIZONA_DSP2_RDMA_BUFFER_5: + case ARIZONA_DSP2_RDMA_BUFFER_6: + case ARIZONA_DSP2_WDMA_CONFIG_1: + case ARIZONA_DSP2_WDMA_CONFIG_2: + case ARIZONA_DSP2_WDMA_OFFSET_1: + case ARIZONA_DSP2_RDMA_CONFIG_1: + case ARIZONA_DSP2_RDMA_OFFSET_1: + case ARIZONA_DSP2_EXTERNAL_START_SELECT_1: + case ARIZONA_DSP2_SCRATCH_0: + case ARIZONA_DSP2_SCRATCH_1: + case ARIZONA_DSP2_SCRATCH_2: + case ARIZONA_DSP2_SCRATCH_3: + case ARIZONA_DSP2_CLOCKING_1: + case ARIZONA_DSP3_STATUS_1: + case ARIZONA_DSP3_STATUS_2: + case ARIZONA_DSP3_STATUS_3: + case ARIZONA_DSP3_STATUS_4: + case ARIZONA_DSP3_WDMA_BUFFER_1: + case ARIZONA_DSP3_WDMA_BUFFER_2: + case ARIZONA_DSP3_WDMA_BUFFER_3: + case ARIZONA_DSP3_WDMA_BUFFER_4: + case ARIZONA_DSP3_WDMA_BUFFER_5: + case ARIZONA_DSP3_WDMA_BUFFER_6: + case ARIZONA_DSP3_WDMA_BUFFER_7: + case ARIZONA_DSP3_WDMA_BUFFER_8: + case ARIZONA_DSP3_RDMA_BUFFER_1: + case ARIZONA_DSP3_RDMA_BUFFER_2: + case ARIZONA_DSP3_RDMA_BUFFER_3: + case ARIZONA_DSP3_RDMA_BUFFER_4: + case ARIZONA_DSP3_RDMA_BUFFER_5: + case ARIZONA_DSP3_RDMA_BUFFER_6: + case ARIZONA_DSP3_WDMA_CONFIG_1: + case ARIZONA_DSP3_WDMA_CONFIG_2: + case ARIZONA_DSP3_WDMA_OFFSET_1: + case ARIZONA_DSP3_RDMA_CONFIG_1: + case ARIZONA_DSP3_RDMA_OFFSET_1: + case ARIZONA_DSP3_EXTERNAL_START_SELECT_1: + case ARIZONA_DSP3_SCRATCH_0: + case ARIZONA_DSP3_SCRATCH_1: + case ARIZONA_DSP3_SCRATCH_2: + case ARIZONA_DSP3_SCRATCH_3: + case ARIZONA_DSP3_CLOCKING_1: + return true; + default: + return cs47l24_is_adsp_memory(dev, reg); + } +} + +#define CS47L24_MAX_REGISTER 0x3b3fff + +const struct regmap_config cs47l24_spi_regmap = { + .reg_bits = 32, + .pad_bits = 16, + .val_bits = 16, + + .max_register = CS47L24_MAX_REGISTER, + .readable_reg = cs47l24_readable_register, + .volatile_reg = cs47l24_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = cs47l24_reg_default, + .num_reg_defaults = ARRAY_SIZE(cs47l24_reg_default), +}; +EXPORT_SYMBOL_GPL(cs47l24_spi_regmap); + diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index e81f70f119a..c3f8c7265ac 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -1,6 +1,7 @@ /* * Arizona MFD internals * + * Copyright 2014 CirrusLogic, Inc. * Copyright 2012 Wolfson Microelectronics plc * * Author: Mark Brown @@ -27,6 +28,8 @@ enum arizona_type { WM8280 = 4, WM8998 = 5, WM1814 = 6, + WM1831 = 9, + CS47L24 = 10, }; #define ARIZONA_IRQ_GP1 0 @@ -176,6 +179,7 @@ int wm5102_patch(struct arizona *arizona); int florida_patch(struct arizona *arizona); int wm8997_patch(struct arizona *arizona); int wm8998_patch(struct arizona *arizona); +int cs47l24_patch(struct arizona *arizona); extern int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, bool mandatory); From 168e71a39369cc316699e23e1a565738b7b01380 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 23 Oct 2014 15:07:59 +0100 Subject: [PATCH 0481/1167] gpio: arizona: Add support for CS47L24 Change-Id: Idf2f340d8a07e2d42a1c2dd7d094db42b0f09316 Signed-off-by: Richard Fitzgerald --- drivers/gpio/gpio-arizona.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpio/gpio-arizona.c b/drivers/gpio/gpio-arizona.c index 4e3f54d04f3..9ff1b553be7 100644 --- a/drivers/gpio/gpio-arizona.c +++ b/drivers/gpio/gpio-arizona.c @@ -1,6 +1,7 @@ /* * gpiolib support for Wolfson Arizona class devices * + * Copyright 2014 CirrusLogic, Inc. * Copyright 2012 Wolfson Microelectronics PLC. * * Author: Mark Brown @@ -122,6 +123,10 @@ static int arizona_gpio_probe(struct platform_device *pdev) case WM1814: arizona_gpio->gpio_chip.ngpio = 5; break; + case WM1831: + case CS47L24: + arizona_gpio->gpio_chip.ngpio = 2; + break; default: dev_err(&pdev->dev, "Unknown chip variant %d\n", arizona->type); From 310bfdf6c61ce8a2bb0a7cf48f45572ce35b2c03 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 23 Oct 2014 16:04:27 +0100 Subject: [PATCH 0482/1167] ASoC: arizona: Add initial CS47L24 codec driver Change-Id: I9fa717aa274439284f2dc1a037ca443b37a07a95 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/Kconfig | 8 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/arizona.c | 11 +- sound/soc/codecs/cs47l24.c | 1571 ++++++++++++++++++++++++++++++++++++ sound/soc/codecs/cs47l24.h | 23 + sound/soc/codecs/wm_adsp.c | 10 +- 6 files changed, 1622 insertions(+), 3 deletions(-) create mode 100644 sound/soc/codecs/cs47l24.c create mode 100644 sound/soc/codecs/cs47l24.h diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index ef7bd61a89f..8d11bd2d912 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -35,6 +35,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_CS42L73 if I2C select SND_SOC_CS4270 if I2C select SND_SOC_CS4271 if SND_SOC_I2C_AND_SPI + select SND_SOC_CS47L24 if MFD_CS47L24 select SND_SOC_CX20442 if TTY select SND_SOC_DA7210 if I2C select SND_SOC_DA7213 if I2C @@ -147,10 +148,12 @@ config SND_SOC_ARIZONA default y if SND_SOC_FLORIDA=y default y if SND_SOC_WM8997=y default y if SND_SOC_WM8998=y + default y if SND_SOC_CS47L24=y default m if SND_SOC_WM5102=m default m if SND_SOC_FLORIDA=m default m if SND_SOC_WM8997=m default m if SND_SOC_WM8998=m + default m if SND_SOC_CS47L24=m config SND_SOC_WM_HUBS tristate @@ -162,9 +165,11 @@ config SND_SOC_WM_ADSP default y if SND_SOC_WM5102=y default y if SND_SOC_FLORIDA=y default y if SND_SOC_WM2200=y + default y if SND_SOC_CS47L24=y default m if SND_SOC_WM5102=m default m if SND_SOC_FLORIDA=m default m if SND_SOC_WM2200=m + default m if SND_SOC_CS47L24=m config SND_SOC_AB8500_CODEC tristate @@ -248,6 +253,9 @@ config SND_SOC_CS4270_VD33_ERRATA config SND_SOC_CS4271 tristate +config SND_SOC_CS47L24 + tristate + config SND_SOC_CX20442 tristate depends on TTY diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 817062f04a0..8fbb69dab25 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -22,6 +22,7 @@ snd-soc-cs42l52-objs := cs42l52.o snd-soc-cs42l73-objs := cs42l73.o snd-soc-cs4270-objs := cs4270.o snd-soc-cs4271-objs := cs4271.o +snd-soc-cs47l24-objs := cs47l24.o snd-soc-cx20442-objs := cx20442.o snd-soc-da7210-objs := da7210.o snd-soc-da7213-objs := da7213.o @@ -151,6 +152,7 @@ obj-$(CONFIG_SND_SOC_CS42L52) += snd-soc-cs42l52.o obj-$(CONFIG_SND_SOC_CS42L73) += snd-soc-cs42l73.o obj-$(CONFIG_SND_SOC_CS4270) += snd-soc-cs4270.o obj-$(CONFIG_SND_SOC_CS4271) += snd-soc-cs4271.o +obj-$(CONFIG_SND_SOC_CS47L24) += snd-soc-cs47l24.o obj-$(CONFIG_SND_SOC_CX20442) += snd-soc-cx20442.o obj-$(CONFIG_SND_SOC_DA7210) += snd-soc-da7210.o obj-$(CONFIG_SND_SOC_DA7213) += snd-soc-da7213.o diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 47db5c2864d..6e5d6206e2b 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1,6 +1,7 @@ /* * arizona.c - Wolfson Arizona class device shared support * + * Copyright 2014 Cirrus Logic * Copyright 2012 Wolfson Microelectronics plc * * Author: Mark Brown @@ -103,6 +104,8 @@ static int arizona_spk_ev(struct snd_soc_dapm_widget *w, switch (arizona->type) { case WM8280: case WM5110: + case WM1831: + case CS47L24: msleep(10); break; default: @@ -184,6 +187,8 @@ int arizona_init_spk(struct snd_soc_codec *codec) switch (arizona->type) { case WM8997: + case WM1831: + case CS47L24: break; default: ret = snd_soc_dapm_new_controls(&codec->dapm, @@ -266,7 +271,7 @@ int arizona_init_input(struct snd_soc_codec *codec) memset(&routes, 0, sizeof(routes)); - for (i = 0; i < ARRAY_SIZE(pdata->dmic_ref); ++i) { + for (i = 0; i < priv->num_inputs / 2; ++i) { routes[0].source = arizona_dmic_refs[pdata->dmic_ref[i]]; routes[1].source = arizona_dmic_refs[pdata->dmic_ref[i]]; @@ -291,6 +296,8 @@ int arizona_init_gpio(struct snd_soc_codec *codec) switch (arizona->type) { case WM8280: case WM5110: + case WM1831: + case CS47L24: snd_soc_dapm_disable_pin(&codec->dapm, "DRC2 Signal Activity"); break; default: @@ -2278,6 +2285,8 @@ static int arizona_calc_fratio(struct arizona_fll *fll, break; case WM8998: case WM1814: + case WM1831: + case CS47L24: if (sync) return init_ratio; break; diff --git a/sound/soc/codecs/cs47l24.c b/sound/soc/codecs/cs47l24.c new file mode 100644 index 00000000000..955704fbcf0 --- /dev/null +++ b/sound/soc/codecs/cs47l24.c @@ -0,0 +1,1571 @@ +/* + * cs47l24.c -- ALSA SoC Audio driver for CS47L24 codec + * + * Copyright 2014 CirrusLogic, Inc. + * + * Author: Richard Fitzgerald + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "arizona.h" +#include "wm_adsp.h" +#include "cs47l24.h" + +#define CS47L24_DEFAULT_FRAGMENTS 1 +#define CS47L24_DEFAULT_FRAGMENT_SIZE 4096 + +struct cs47l24_compr { + struct mutex lock; + + struct snd_compr_stream *stream; + struct wm_adsp *adsp; + + size_t total_copied; + bool trig; + bool forced; +}; + +struct cs47l24_priv { + struct arizona_priv core; + struct arizona_fll fll[2]; + struct cs47l24_compr compr_info; + + struct mutex fw_lock; +}; + +static const struct wm_adsp_region cs47l24_dsp2_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x200000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x280000 }, + { .type = WMFW_ADSP2_XM, .base = 0x290000 }, + { .type = WMFW_ADSP2_YM, .base = 0x2a8000 }, +}; + +static const struct wm_adsp_region cs47l24_dsp3_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x300000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x380000 }, + { .type = WMFW_ADSP2_XM, .base = 0x390000 }, + { .type = WMFW_ADSP2_YM, .base = 0x3a8000 }, +}; + +static const struct wm_adsp_region *cs47l24_dsp_regions[] = { + cs47l24_dsp2_regions, + cs47l24_dsp3_regions, +}; + +static int cs47l24_virt_dsp_power_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct cs47l24_priv *cs47l24 = snd_soc_codec_get_drvdata(w->codec); + + mutex_lock(&cs47l24->compr_info.lock); + + if (!cs47l24->compr_info.stream) + cs47l24->compr_info.trig = false; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + cs47l24->compr_info.forced = true; + break; + case SND_SOC_DAPM_PRE_PMD: + cs47l24->compr_info.forced = false; + break; + default: + break; + } + + mutex_unlock(&cs47l24->compr_info.lock); + + return 0; +} + +static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); +static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); +static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); +static DECLARE_TLV_DB_SCALE(noise_tlv, 0, 600, 0); +static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); + +#define CS47L24_NG_SRC(name, base) \ + SOC_SINGLE(name " NG HPOUT1L Switch", base, 0, 1, 0), \ + SOC_SINGLE(name " NG HPOUT1R Switch", base, 1, 1, 0), \ + SOC_SINGLE(name " NG SPKOUT Switch", base, 6, 1, 0) + +static const struct snd_kcontrol_new cs47l24_snd_controls[] = { +SOC_ENUM("IN1 OSR", arizona_in_dmic_osr[0]), +SOC_ENUM("IN2 OSR", arizona_in_dmic_osr[1]), + +SOC_ENUM("IN HPF Cutoff Frequency", arizona_in_hpf_cut_enum), + +SOC_SINGLE("IN1L HPF Switch", ARIZONA_IN1L_CONTROL, + ARIZONA_IN1L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN1R HPF Switch", ARIZONA_IN1R_CONTROL, + ARIZONA_IN1R_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN2L HPF Switch", ARIZONA_IN2L_CONTROL, + ARIZONA_IN2L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN2R HPF Switch", ARIZONA_IN2R_CONTROL, + ARIZONA_IN2R_HPF_SHIFT, 1, 0), + +SOC_SINGLE_TLV("IN1L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN1R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1R, + ARIZONA_IN1R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN2L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_2L, + ARIZONA_IN2L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN2R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_2R, + ARIZONA_IN2R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), + +SOC_ENUM("Input Ramp Up", arizona_in_vi_ramp), +SOC_ENUM("Input Ramp Down", arizona_in_vd_ramp), + +ARIZONA_MIXER_CONTROLS("EQ1", ARIZONA_EQ1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), + +SND_SOC_BYTES("EQ1 Coefficients", ARIZONA_EQ1_3, 19), +SOC_SINGLE("EQ1 Mode Switch", ARIZONA_EQ1_2, ARIZONA_EQ1_B1_MODE_SHIFT, 1, 0), +SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B2 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B3 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B4 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B5 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +SND_SOC_BYTES("EQ2 Coefficients", ARIZONA_EQ2_3, 19), +SOC_SINGLE("EQ2 Mode Switch", ARIZONA_EQ2_2, ARIZONA_EQ2_B1_MODE_SHIFT, 1, 0), +SOC_SINGLE_TLV("EQ2 B1 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B2 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B3 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B4 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B5 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +ARIZONA_MIXER_CONTROLS("DRC1L", ARIZONA_DRC1LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DRC1R", ARIZONA_DRC1RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DRC2L", ARIZONA_DRC2LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DRC2R", ARIZONA_DRC2RMIX_INPUT_1_SOURCE), + +SND_SOC_BYTES_MASK("DRC1", ARIZONA_DRC1_CTRL1, 5, + ARIZONA_DRC1R_ENA | ARIZONA_DRC1L_ENA), +SND_SOC_BYTES_MASK("DRC2", ARIZONA_DRC2_CTRL1, 5, + ARIZONA_DRC2R_ENA | ARIZONA_DRC2L_ENA), + +ARIZONA_MIXER_CONTROLS("LHPF1", ARIZONA_HPLP1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LHPF2", ARIZONA_HPLP2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LHPF3", ARIZONA_HPLP3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LHPF4", ARIZONA_HPLP4MIX_INPUT_1_SOURCE), + +SND_SOC_BYTES("LHPF1 Coefficients", ARIZONA_HPLPF1_2, 1), +SND_SOC_BYTES("LHPF2 Coefficients", ARIZONA_HPLPF2_2, 1), +SND_SOC_BYTES("LHPF3 Coefficients", ARIZONA_HPLPF3_2, 1), +SND_SOC_BYTES("LHPF4 Coefficients", ARIZONA_HPLPF4_2, 1), + +SOC_ENUM("LHPF1 Mode", arizona_lhpf1_mode), +SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode), +SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode), +SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), + +ARIZONA_SAMPLE_RATE_CONTROL("Sample Rate 2", 2), +ARIZONA_SAMPLE_RATE_CONTROL("Sample Rate 3", 3), + +SOC_VALUE_ENUM("FX Rate", arizona_fx_rate), + +SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), +SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), +SOC_VALUE_ENUM("ISRC3 FSL", arizona_isrc_fsl[2]), +SOC_VALUE_ENUM("ISRC1 FSH", arizona_isrc_fsh[0]), +SOC_VALUE_ENUM("ISRC2 FSH", arizona_isrc_fsh[1]), +SOC_VALUE_ENUM("ISRC3 FSH", arizona_isrc_fsh[2]), +SOC_VALUE_ENUM("ASRC RATE 1", arizona_asrc_rate1), + +ARIZONA_MIXER_CONTROLS("DSP2L", ARIZONA_DSP2LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP2R", ARIZONA_DSP2RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP3L", ARIZONA_DSP3LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP3R", ARIZONA_DSP3RMIX_INPUT_1_SOURCE), + +SOC_SINGLE_TLV("Noise Generator Volume", ARIZONA_COMFORT_NOISE_GENERATOR, + ARIZONA_NOISE_GEN_GAIN_SHIFT, 0x16, 0, noise_tlv), + +ARIZONA_MIXER_CONTROLS("HPOUT1L", ARIZONA_OUT1LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("HPOUT1R", ARIZONA_OUT1RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SPKOUT", ARIZONA_OUT4LMIX_INPUT_1_SOURCE), + +SOC_SINGLE("HPOUT1 SC Protect Switch", ARIZONA_HP1_SHORT_CIRCUIT_CTRL, + ARIZONA_HP1_SC_ENA_SHIFT, 1, 0), + +SOC_DOUBLE_R("HPOUT1 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_1L, + ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_MUTE_SHIFT, 1, 1), +SOC_SINGLE("Speaker Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_4L, + ARIZONA_OUT4L_MUTE_SHIFT, 1, 1), + +SOC_DOUBLE_R_TLV("HPOUT1 Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_1L, + ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_VOL_SHIFT, + 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("Speaker Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_4L, + ARIZONA_OUT4L_VOL_SHIFT, + 0xbf, 0, digital_tlv), + +SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp), +SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp), + +SOC_SINGLE("Noise Gate Switch", ARIZONA_NOISE_GATE_CONTROL, + ARIZONA_NGATE_ENA_SHIFT, 1, 0), +SOC_SINGLE_TLV("Noise Gate Threshold Volume", ARIZONA_NOISE_GATE_CONTROL, + ARIZONA_NGATE_THR_SHIFT, 7, 1, ng_tlv), +SOC_ENUM("Noise Gate Hold", arizona_ng_hold), + +SOC_VALUE_ENUM("Output Rate 1", arizona_output_rate), +SOC_VALUE_ENUM("In Rate", arizona_input_rate), + +CS47L24_NG_SRC("HPOUT1L", ARIZONA_NOISE_GATE_SELECT_1L), +CS47L24_NG_SRC("HPOUT1R", ARIZONA_NOISE_GATE_SELECT_1R), +CS47L24_NG_SRC("SPKOUT", ARIZONA_NOISE_GATE_SELECT_4L), + +ARIZONA_MIXER_CONTROLS("AIF1TX1", ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX2", ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX3", ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX4", ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX5", ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX6", ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX7", ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX8", ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("AIF2TX1", ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX2", ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX3", ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX4", ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX5", ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX6", ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("AIF3TX1", ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF3TX2", ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE), +}; + +ARIZONA_MIXER_ENUMS(EQ1, ARIZONA_EQ1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(EQ2, ARIZONA_EQ2MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(DRC1L, ARIZONA_DRC1LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(DRC1R, ARIZONA_DRC1RMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(DRC2L, ARIZONA_DRC2LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(DRC2R, ARIZONA_DRC2RMIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(LHPF1, ARIZONA_HPLP1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(LHPF2, ARIZONA_HPLP2MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(LHPF3, ARIZONA_HPLP3MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(LHPF4, ARIZONA_HPLP4MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(DSP2L, ARIZONA_DSP2LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(DSP2R, ARIZONA_DSP2RMIX_INPUT_1_SOURCE); +ARIZONA_DSP_AUX_ENUMS(DSP2, ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(DSP3L, ARIZONA_DSP3LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(DSP3R, ARIZONA_DSP3RMIX_INPUT_1_SOURCE); +ARIZONA_DSP_AUX_ENUMS(DSP3, ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(PWM1, ARIZONA_PWM1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(PWM2, ARIZONA_PWM2MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(OUT1L, ARIZONA_OUT1LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(OUT1R, ARIZONA_OUT1RMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SPKOUT, ARIZONA_OUT4LMIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(AIF1TX1, ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX2, ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX3, ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX4, ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX5, ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX6, ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX7, ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX8, ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(AIF2TX1, ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX2, ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX3, ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX4, ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX5, ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX6, ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(AIF3TX1, ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF3TX2, ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ASRC1L, ARIZONA_ASRC1LMIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ASRC1R, ARIZONA_ASRC1RMIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ASRC2L, ARIZONA_ASRC2LMIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ASRC2R, ARIZONA_ASRC2RMIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC1INT1, ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1INT2, ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1INT3, ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1INT4, ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC1DEC1, ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1DEC2, ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1DEC3, ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1DEC4, ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC2INT1, ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2INT2, ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2INT3, ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2INT4, ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC2DEC1, ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2DEC2, ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2DEC3, ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2DEC4, ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC3INT1, ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC3INT2, ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC3INT3, ARIZONA_ISRC3INT3MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC3INT4, ARIZONA_ISRC3INT4MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC3DEC1, ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC3DEC2, ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC3DEC3, ARIZONA_ISRC3DEC3MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC3DEC4, ARIZONA_ISRC3DEC4MIX_INPUT_1_SOURCE); + +static const char * const cs47l24_dsp_output_texts[] = { + "None", + "DSP3", +}; + +static const struct soc_enum cs47l24_dsp_output_enum = + SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(cs47l24_dsp_output_texts), + cs47l24_dsp_output_texts); + +static const struct snd_kcontrol_new cs47l24_dsp_output_mux[] = { + SOC_DAPM_ENUM_VIRT("DSP Virtual Output Mux", cs47l24_dsp_output_enum), +}; + +static const char * const cs47l24_memory_mux_texts[] = { + "None", + "Shared Memory", +}; + +static const struct soc_enum cs47l24_memory_enum = + SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(cs47l24_memory_mux_texts), + cs47l24_memory_mux_texts); + +static const struct snd_kcontrol_new cs47l24_memory_mux[] = { + SOC_DAPM_ENUM_VIRT("DSP2 Virtual Input", cs47l24_memory_enum), + SOC_DAPM_ENUM_VIRT("DSP3 Virtual Input", cs47l24_memory_enum), +}; + +static const char * const cs47l24_aec_loopback_texts[] = { + "HPOUT1L", "HPOUT1R", "SPKOUT", +}; + +static const unsigned int cs47l24_aec_loopback_values[] = { + 0, 1, 6, +}; + +static const struct soc_enum cs47l24_aec_loopback = + SOC_VALUE_ENUM_SINGLE(ARIZONA_DAC_AEC_CONTROL_1, + ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, + ARRAY_SIZE(cs47l24_aec_loopback_texts), + cs47l24_aec_loopback_texts, + cs47l24_aec_loopback_values); + +static const struct snd_kcontrol_new cs47l24_aec_loopback_mux = + SOC_DAPM_VALUE_ENUM("AEC Loopback", cs47l24_aec_loopback); + +static const struct snd_soc_dapm_widget cs47l24_dapm_widgets[] = { +SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, + ARIZONA_SYSCLK_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("ASYNCCLK", ARIZONA_ASYNC_CLOCK_1, + ARIZONA_ASYNC_CLK_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK, + ARIZONA_OPCLK_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("ASYNCOPCLK", ARIZONA_OUTPUT_ASYNC_CLOCK, + ARIZONA_OPCLK_ASYNC_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_REGULATOR_SUPPLY("CPVDD", 20, 0), +SND_SOC_DAPM_REGULATOR_SUPPLY("MICVDD", 0, SND_SOC_DAPM_REGULATOR_BYPASS), +SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDD", 0, 0), + +SND_SOC_DAPM_SIGGEN("TONE"), +SND_SOC_DAPM_SIGGEN("NOISE"), +SND_SOC_DAPM_SIGGEN("HAPTICS"), + +SND_SOC_DAPM_INPUT("IN1L"), +SND_SOC_DAPM_INPUT("IN1R"), +SND_SOC_DAPM_INPUT("IN2L"), +SND_SOC_DAPM_INPUT("IN2R"), + +SND_SOC_DAPM_OUTPUT("DRC1 Signal Activity"), +SND_SOC_DAPM_OUTPUT("DRC2 Signal Activity"), + +SND_SOC_DAPM_OUTPUT("DSP Virtual Output"), + +SND_SOC_DAPM_PGA_E("IN1L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN1L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN1R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN1R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN2L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN2L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN2R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN2R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), + +SND_SOC_DAPM_SUPPLY("MICBIAS1", ARIZONA_MIC_BIAS_CTRL_1, + ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS2", ARIZONA_MIC_BIAS_CTRL_2, + ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("Noise Generator", ARIZONA_COMFORT_NOISE_GENERATOR, + ARIZONA_NOISE_GEN_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("Tone Generator 1", ARIZONA_TONE_GENERATOR_1, + ARIZONA_TONE1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("Tone Generator 2", ARIZONA_TONE_GENERATOR_1, + ARIZONA_TONE2_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("EQ1", ARIZONA_EQ1_1, ARIZONA_EQ1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ2", ARIZONA_EQ2_1, ARIZONA_EQ2_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("DRC1L", ARIZONA_DRC1_CTRL1, ARIZONA_DRC1L_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("DRC1R", ARIZONA_DRC1_CTRL1, ARIZONA_DRC1R_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("DRC2L", ARIZONA_DRC2_CTRL1, ARIZONA_DRC2L_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("DRC2R", ARIZONA_DRC2_CTRL1, ARIZONA_DRC2R_ENA_SHIFT, 0, + NULL, 0), + +SND_SOC_DAPM_PGA("LHPF1", ARIZONA_HPLPF1_1, ARIZONA_LHPF1_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF2", ARIZONA_HPLPF2_1, ARIZONA_LHPF2_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF3", ARIZONA_HPLPF3_1, ARIZONA_LHPF3_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF4", ARIZONA_HPLPF4_1, ARIZONA_LHPF4_ENA_SHIFT, 0, + NULL, 0), + +SND_SOC_DAPM_PGA("PWM1 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM1_ENA_SHIFT, + 0, NULL, 0), +SND_SOC_DAPM_PGA("PWM2 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM2_ENA_SHIFT, + 0, NULL, 0), + +SND_SOC_DAPM_PGA("ASRC1L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC1L_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("ASRC1R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC1R_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("ASRC2L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2L_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0, + NULL, 0), + +WM_ADSP2("DSP2", 1), +WM_ADSP2("DSP3", 2), + +SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT2", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT3", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT4", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC1DEC1", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC2", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC3", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC4", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC2INT1", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT2", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT3", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT4", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC2DEC1", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC2", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC3", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC4", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC3INT1", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC3INT2", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_INT1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC3INT3", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_INT2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC3INT4", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_INT3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC3DEC1", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC3DEC2", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_DEC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC3DEC3", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_DEC2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC3DEC4", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_DEC3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, + ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, + &cs47l24_aec_loopback_mux), + +SND_SOC_DAPM_AIF_OUT("AIF1TX1", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX2", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX3", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX4", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX5", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX6", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX7", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX8", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF1RX1", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX2", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX3", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX4", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX5", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX6", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX7", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX8", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("AIF2TX1", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX2", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX3", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX4", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX5", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX6", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX6_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX2", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX3", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX4", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX5", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX6", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX6_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("AIF3TX1", NULL, 0, + ARIZONA_AIF3_TX_ENABLES, ARIZONA_AIF3TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF3TX2", NULL, 0, + ARIZONA_AIF3_TX_ENABLES, ARIZONA_AIF3TX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF3RX1", NULL, 0, + ARIZONA_AIF3_RX_ENABLES, ARIZONA_AIF3RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF3RX2", NULL, 0, + ARIZONA_AIF3_RX_ENABLES, ARIZONA_AIF3RX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, + ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, + ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), + +ARIZONA_MIXER_WIDGETS(EQ1, "EQ1"), +ARIZONA_MIXER_WIDGETS(EQ2, "EQ2"), + +ARIZONA_MIXER_WIDGETS(DRC1L, "DRC1L"), +ARIZONA_MIXER_WIDGETS(DRC1R, "DRC1R"), +ARIZONA_MIXER_WIDGETS(DRC2L, "DRC2L"), +ARIZONA_MIXER_WIDGETS(DRC2R, "DRC2R"), + +ARIZONA_MIXER_WIDGETS(LHPF1, "LHPF1"), +ARIZONA_MIXER_WIDGETS(LHPF2, "LHPF2"), +ARIZONA_MIXER_WIDGETS(LHPF3, "LHPF3"), +ARIZONA_MIXER_WIDGETS(LHPF4, "LHPF4"), + +ARIZONA_MIXER_WIDGETS(PWM1, "PWM1"), +ARIZONA_MIXER_WIDGETS(PWM2, "PWM2"), + +ARIZONA_MIXER_WIDGETS(OUT1L, "HPOUT1L"), +ARIZONA_MIXER_WIDGETS(OUT1R, "HPOUT1R"), +ARIZONA_MIXER_WIDGETS(SPKOUT, "SPKOUT"), + +ARIZONA_MIXER_WIDGETS(AIF1TX1, "AIF1TX1"), +ARIZONA_MIXER_WIDGETS(AIF1TX2, "AIF1TX2"), +ARIZONA_MIXER_WIDGETS(AIF1TX3, "AIF1TX3"), +ARIZONA_MIXER_WIDGETS(AIF1TX4, "AIF1TX4"), +ARIZONA_MIXER_WIDGETS(AIF1TX5, "AIF1TX5"), +ARIZONA_MIXER_WIDGETS(AIF1TX6, "AIF1TX6"), +ARIZONA_MIXER_WIDGETS(AIF1TX7, "AIF1TX7"), +ARIZONA_MIXER_WIDGETS(AIF1TX8, "AIF1TX8"), + +ARIZONA_MIXER_WIDGETS(AIF2TX1, "AIF2TX1"), +ARIZONA_MIXER_WIDGETS(AIF2TX2, "AIF2TX2"), +ARIZONA_MIXER_WIDGETS(AIF2TX3, "AIF2TX3"), +ARIZONA_MIXER_WIDGETS(AIF2TX4, "AIF2TX4"), +ARIZONA_MIXER_WIDGETS(AIF2TX5, "AIF2TX5"), +ARIZONA_MIXER_WIDGETS(AIF2TX6, "AIF2TX6"), + +ARIZONA_MIXER_WIDGETS(AIF3TX1, "AIF3TX1"), +ARIZONA_MIXER_WIDGETS(AIF3TX2, "AIF3TX2"), + +ARIZONA_MUX_WIDGETS(ASRC1L, "ASRC1L"), +ARIZONA_MUX_WIDGETS(ASRC1R, "ASRC1R"), +ARIZONA_MUX_WIDGETS(ASRC2L, "ASRC2L"), +ARIZONA_MUX_WIDGETS(ASRC2R, "ASRC2R"), + +ARIZONA_DSP_WIDGETS(DSP2, "DSP2"), +ARIZONA_DSP_WIDGETS(DSP3, "DSP3"), + +SND_SOC_DAPM_VIRT_MUX("DSP2 Virtual Input", SND_SOC_NOPM, 0, 0, + &cs47l24_memory_mux[0]), +SND_SOC_DAPM_VIRT_MUX("DSP3 Virtual Input", SND_SOC_NOPM, 0, 0, + &cs47l24_memory_mux[1]), + +SND_SOC_DAPM_VIRT_MUX_E("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, + &cs47l24_dsp_output_mux[0], cs47l24_virt_dsp_power_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), + +ARIZONA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), +ARIZONA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"), +ARIZONA_MUX_WIDGETS(ISRC1DEC3, "ISRC1DEC3"), +ARIZONA_MUX_WIDGETS(ISRC1DEC4, "ISRC1DEC4"), + +ARIZONA_MUX_WIDGETS(ISRC1INT1, "ISRC1INT1"), +ARIZONA_MUX_WIDGETS(ISRC1INT2, "ISRC1INT2"), +ARIZONA_MUX_WIDGETS(ISRC1INT3, "ISRC1INT3"), +ARIZONA_MUX_WIDGETS(ISRC1INT4, "ISRC1INT4"), + +ARIZONA_MUX_WIDGETS(ISRC2DEC1, "ISRC2DEC1"), +ARIZONA_MUX_WIDGETS(ISRC2DEC2, "ISRC2DEC2"), +ARIZONA_MUX_WIDGETS(ISRC2DEC3, "ISRC2DEC3"), +ARIZONA_MUX_WIDGETS(ISRC2DEC4, "ISRC2DEC4"), + +ARIZONA_MUX_WIDGETS(ISRC2INT1, "ISRC2INT1"), +ARIZONA_MUX_WIDGETS(ISRC2INT2, "ISRC2INT2"), +ARIZONA_MUX_WIDGETS(ISRC2INT3, "ISRC2INT3"), +ARIZONA_MUX_WIDGETS(ISRC2INT4, "ISRC2INT4"), + +ARIZONA_MUX_WIDGETS(ISRC3DEC1, "ISRC3DEC1"), +ARIZONA_MUX_WIDGETS(ISRC3DEC2, "ISRC3DEC2"), +ARIZONA_MUX_WIDGETS(ISRC3DEC3, "ISRC3DEC3"), +ARIZONA_MUX_WIDGETS(ISRC3DEC4, "ISRC3DEC4"), + +ARIZONA_MUX_WIDGETS(ISRC3INT1, "ISRC3INT1"), +ARIZONA_MUX_WIDGETS(ISRC3INT2, "ISRC3INT2"), +ARIZONA_MUX_WIDGETS(ISRC3INT3, "ISRC3INT3"), +ARIZONA_MUX_WIDGETS(ISRC3INT4, "ISRC3INT4"), + +SND_SOC_DAPM_OUTPUT("HPOUT1L"), +SND_SOC_DAPM_OUTPUT("HPOUT1R"), +SND_SOC_DAPM_OUTPUT("SPKOUTN"), +SND_SOC_DAPM_OUTPUT("SPKOUTP"), + +SND_SOC_DAPM_OUTPUT("MICSUPP"), +}; + +#define ARIZONA_MIXER_INPUT_ROUTES(name) \ + { name, "Noise Generator", "Noise Generator" }, \ + { name, "Tone Generator 1", "Tone Generator 1" }, \ + { name, "Tone Generator 2", "Tone Generator 2" }, \ + { name, "Haptics", "HAPTICS" }, \ + { name, "AEC", "AEC Loopback" }, \ + { name, "IN1L", "IN1L PGA" }, \ + { name, "IN1R", "IN1R PGA" }, \ + { name, "IN2L", "IN2L PGA" }, \ + { name, "IN2R", "IN2R PGA" }, \ + { name, "AIF1RX1", "AIF1RX1" }, \ + { name, "AIF1RX2", "AIF1RX2" }, \ + { name, "AIF1RX3", "AIF1RX3" }, \ + { name, "AIF1RX4", "AIF1RX4" }, \ + { name, "AIF1RX5", "AIF1RX5" }, \ + { name, "AIF1RX6", "AIF1RX6" }, \ + { name, "AIF1RX7", "AIF1RX7" }, \ + { name, "AIF1RX8", "AIF1RX8" }, \ + { name, "AIF2RX1", "AIF2RX1" }, \ + { name, "AIF2RX2", "AIF2RX2" }, \ + { name, "AIF2RX3", "AIF2RX3" }, \ + { name, "AIF2RX4", "AIF2RX4" }, \ + { name, "AIF2RX5", "AIF2RX5" }, \ + { name, "AIF2RX6", "AIF2RX6" }, \ + { name, "AIF3RX1", "AIF3RX1" }, \ + { name, "AIF3RX2", "AIF3RX2" }, \ + { name, "EQ1", "EQ1" }, \ + { name, "EQ2", "EQ2" }, \ + { name, "DRC1L", "DRC1L" }, \ + { name, "DRC1R", "DRC1R" }, \ + { name, "DRC2L", "DRC2L" }, \ + { name, "DRC2R", "DRC2R" }, \ + { name, "LHPF1", "LHPF1" }, \ + { name, "LHPF2", "LHPF2" }, \ + { name, "LHPF3", "LHPF3" }, \ + { name, "LHPF4", "LHPF4" }, \ + { name, "ASRC1L", "ASRC1L" }, \ + { name, "ASRC1R", "ASRC1R" }, \ + { name, "ASRC2L", "ASRC2L" }, \ + { name, "ASRC2R", "ASRC2R" }, \ + { name, "ISRC1DEC1", "ISRC1DEC1" }, \ + { name, "ISRC1DEC2", "ISRC1DEC2" }, \ + { name, "ISRC1DEC3", "ISRC1DEC3" }, \ + { name, "ISRC1DEC4", "ISRC1DEC4" }, \ + { name, "ISRC1INT1", "ISRC1INT1" }, \ + { name, "ISRC1INT2", "ISRC1INT2" }, \ + { name, "ISRC1INT3", "ISRC1INT3" }, \ + { name, "ISRC1INT4", "ISRC1INT4" }, \ + { name, "ISRC2DEC1", "ISRC2DEC1" }, \ + { name, "ISRC2DEC2", "ISRC2DEC2" }, \ + { name, "ISRC2DEC3", "ISRC2DEC3" }, \ + { name, "ISRC2DEC4", "ISRC2DEC4" }, \ + { name, "ISRC2INT1", "ISRC2INT1" }, \ + { name, "ISRC2INT2", "ISRC2INT2" }, \ + { name, "ISRC2INT3", "ISRC2INT3" }, \ + { name, "ISRC2INT4", "ISRC2INT4" }, \ + { name, "ISRC3DEC1", "ISRC3DEC1" }, \ + { name, "ISRC3DEC2", "ISRC3DEC2" }, \ + { name, "ISRC3DEC3", "ISRC3DEC3" }, \ + { name, "ISRC3DEC4", "ISRC3DEC4" }, \ + { name, "ISRC3INT1", "ISRC3INT1" }, \ + { name, "ISRC3INT2", "ISRC3INT2" }, \ + { name, "ISRC3INT3", "ISRC3INT3" }, \ + { name, "ISRC3INT4", "ISRC3INT4" }, \ + { name, "DSP2.1", "DSP2" }, \ + { name, "DSP2.2", "DSP2" }, \ + { name, "DSP2.3", "DSP2" }, \ + { name, "DSP2.4", "DSP2" }, \ + { name, "DSP2.5", "DSP2" }, \ + { name, "DSP2.6", "DSP2" }, \ + { name, "DSP3.1", "DSP3" }, \ + { name, "DSP3.2", "DSP3" }, \ + { name, "DSP3.3", "DSP3" }, \ + { name, "DSP3.4", "DSP3" }, \ + { name, "DSP3.5", "DSP3" }, \ + { name, "DSP3.6", "DSP3" } + +static const struct snd_soc_dapm_route cs47l24_dapm_routes[] = { + { "OUT1L", NULL, "CPVDD" }, + { "OUT1R", NULL, "CPVDD" }, + + { "OUT4L", NULL, "SPKVDD" }, + + { "OUT1L", NULL, "SYSCLK" }, + { "OUT1R", NULL, "SYSCLK" }, + { "OUT4L", NULL, "SYSCLK" }, + + { "IN1L", NULL, "SYSCLK" }, + { "IN1R", NULL, "SYSCLK" }, + { "IN2L", NULL, "SYSCLK" }, + { "IN2R", NULL, "SYSCLK" }, + + { "MICBIAS1", NULL, "MICVDD" }, + { "MICBIAS2", NULL, "MICVDD" }, + + { "Noise Generator", NULL, "SYSCLK" }, + { "Tone Generator 1", NULL, "SYSCLK" }, + { "Tone Generator 2", NULL, "SYSCLK" }, + + { "Noise Generator", NULL, "NOISE" }, + { "Tone Generator 1", NULL, "TONE" }, + { "Tone Generator 2", NULL, "TONE" }, + + { "AIF1 Capture", NULL, "AIF1TX1" }, + { "AIF1 Capture", NULL, "AIF1TX2" }, + { "AIF1 Capture", NULL, "AIF1TX3" }, + { "AIF1 Capture", NULL, "AIF1TX4" }, + { "AIF1 Capture", NULL, "AIF1TX5" }, + { "AIF1 Capture", NULL, "AIF1TX6" }, + { "AIF1 Capture", NULL, "AIF1TX7" }, + { "AIF1 Capture", NULL, "AIF1TX8" }, + + { "AIF1RX1", NULL, "AIF1 Playback" }, + { "AIF1RX2", NULL, "AIF1 Playback" }, + { "AIF1RX3", NULL, "AIF1 Playback" }, + { "AIF1RX4", NULL, "AIF1 Playback" }, + { "AIF1RX5", NULL, "AIF1 Playback" }, + { "AIF1RX6", NULL, "AIF1 Playback" }, + { "AIF1RX7", NULL, "AIF1 Playback" }, + { "AIF1RX8", NULL, "AIF1 Playback" }, + + { "AIF2 Capture", NULL, "AIF2TX1" }, + { "AIF2 Capture", NULL, "AIF2TX2" }, + { "AIF2 Capture", NULL, "AIF2TX3" }, + { "AIF2 Capture", NULL, "AIF2TX4" }, + { "AIF2 Capture", NULL, "AIF2TX5" }, + { "AIF2 Capture", NULL, "AIF2TX6" }, + + { "AIF2RX1", NULL, "AIF2 Playback" }, + { "AIF2RX2", NULL, "AIF2 Playback" }, + { "AIF2RX3", NULL, "AIF2 Playback" }, + { "AIF2RX4", NULL, "AIF2 Playback" }, + { "AIF2RX5", NULL, "AIF2 Playback" }, + { "AIF2RX6", NULL, "AIF2 Playback" }, + + { "AIF3 Capture", NULL, "AIF3TX1" }, + { "AIF3 Capture", NULL, "AIF3TX2" }, + + { "AIF3RX1", NULL, "AIF3 Playback" }, + { "AIF3RX2", NULL, "AIF3 Playback" }, + + { "AIF1 Playback", NULL, "SYSCLK" }, + { "AIF2 Playback", NULL, "SYSCLK" }, + { "AIF3 Playback", NULL, "SYSCLK" }, + + { "AIF1 Capture", NULL, "SYSCLK" }, + { "AIF2 Capture", NULL, "SYSCLK" }, + { "AIF3 Capture", NULL, "SYSCLK" }, + + { "Voice Control CPU", NULL, "Voice Control DSP" }, + { "Voice Control DSP", NULL, "DSP3" }, + { "Voice Control CPU", NULL, "SYSCLK" }, + { "Voice Control DSP", NULL, "SYSCLK" }, + + { "IN1L PGA", NULL, "IN1L" }, + { "IN1R PGA", NULL, "IN1R" }, + + { "IN2L PGA", NULL, "IN2L" }, + { "IN2R PGA", NULL, "IN2R" }, + + ARIZONA_MIXER_ROUTES("OUT1L", "HPOUT1L"), + ARIZONA_MIXER_ROUTES("OUT1R", "HPOUT1R"), + + ARIZONA_MIXER_ROUTES("OUT4L", "SPKOUT"), + + ARIZONA_MIXER_ROUTES("PWM1 Driver", "PWM1"), + ARIZONA_MIXER_ROUTES("PWM2 Driver", "PWM2"), + + ARIZONA_MIXER_ROUTES("AIF1TX1", "AIF1TX1"), + ARIZONA_MIXER_ROUTES("AIF1TX2", "AIF1TX2"), + ARIZONA_MIXER_ROUTES("AIF1TX3", "AIF1TX3"), + ARIZONA_MIXER_ROUTES("AIF1TX4", "AIF1TX4"), + ARIZONA_MIXER_ROUTES("AIF1TX5", "AIF1TX5"), + ARIZONA_MIXER_ROUTES("AIF1TX6", "AIF1TX6"), + ARIZONA_MIXER_ROUTES("AIF1TX7", "AIF1TX7"), + ARIZONA_MIXER_ROUTES("AIF1TX8", "AIF1TX8"), + + ARIZONA_MIXER_ROUTES("AIF2TX1", "AIF2TX1"), + ARIZONA_MIXER_ROUTES("AIF2TX2", "AIF2TX2"), + ARIZONA_MIXER_ROUTES("AIF2TX3", "AIF2TX3"), + ARIZONA_MIXER_ROUTES("AIF2TX4", "AIF2TX4"), + ARIZONA_MIXER_ROUTES("AIF2TX5", "AIF2TX5"), + ARIZONA_MIXER_ROUTES("AIF2TX6", "AIF2TX6"), + + ARIZONA_MIXER_ROUTES("AIF3TX1", "AIF3TX1"), + ARIZONA_MIXER_ROUTES("AIF3TX2", "AIF3TX2"), + + ARIZONA_MIXER_ROUTES("EQ1", "EQ1"), + ARIZONA_MIXER_ROUTES("EQ2", "EQ2"), + + ARIZONA_MIXER_ROUTES("DRC1L", "DRC1L"), + ARIZONA_MIXER_ROUTES("DRC1R", "DRC1R"), + ARIZONA_MIXER_ROUTES("DRC2L", "DRC2L"), + ARIZONA_MIXER_ROUTES("DRC2R", "DRC2R"), + + ARIZONA_MIXER_ROUTES("LHPF1", "LHPF1"), + ARIZONA_MIXER_ROUTES("LHPF2", "LHPF2"), + ARIZONA_MIXER_ROUTES("LHPF3", "LHPF3"), + ARIZONA_MIXER_ROUTES("LHPF4", "LHPF4"), + + ARIZONA_MUX_ROUTES("ASRC1L", "ASRC1L"), + ARIZONA_MUX_ROUTES("ASRC1R", "ASRC1R"), + ARIZONA_MUX_ROUTES("ASRC2L", "ASRC2L"), + ARIZONA_MUX_ROUTES("ASRC2R", "ASRC2R"), + + ARIZONA_DSP_ROUTES("DSP2"), + ARIZONA_DSP_ROUTES("DSP3"), + + { "DSP2 Preloader", NULL, "DSP2 Virtual Input" }, + { "DSP2 Virtual Input", "Shared Memory", "DSP3" }, + { "DSP3 Preloader", NULL, "DSP3 Virtual Input" }, + { "DSP3 Virtual Input", "Shared Memory", "DSP2" }, + + { "DSP Virtual Output", NULL, "DSP Virtual Output Mux" }, + { "DSP Virtual Output Mux", "DSP3", "DSP3" }, + { "DSP Virtual Output", NULL, "SYSCLK" }, + + ARIZONA_MUX_ROUTES("ISRC1INT1", "ISRC1INT1"), + ARIZONA_MUX_ROUTES("ISRC1INT2", "ISRC1INT2"), + ARIZONA_MUX_ROUTES("ISRC1INT3", "ISRC1INT3"), + ARIZONA_MUX_ROUTES("ISRC1INT4", "ISRC1INT4"), + + ARIZONA_MUX_ROUTES("ISRC1DEC1", "ISRC1DEC1"), + ARIZONA_MUX_ROUTES("ISRC1DEC2", "ISRC1DEC2"), + ARIZONA_MUX_ROUTES("ISRC1DEC3", "ISRC1DEC3"), + ARIZONA_MUX_ROUTES("ISRC1DEC4", "ISRC1DEC4"), + + ARIZONA_MUX_ROUTES("ISRC2INT1", "ISRC2INT1"), + ARIZONA_MUX_ROUTES("ISRC2INT2", "ISRC2INT2"), + ARIZONA_MUX_ROUTES("ISRC2INT3", "ISRC2INT3"), + ARIZONA_MUX_ROUTES("ISRC2INT4", "ISRC2INT4"), + + ARIZONA_MUX_ROUTES("ISRC2DEC1", "ISRC2DEC1"), + ARIZONA_MUX_ROUTES("ISRC2DEC2", "ISRC2DEC2"), + ARIZONA_MUX_ROUTES("ISRC2DEC3", "ISRC2DEC3"), + ARIZONA_MUX_ROUTES("ISRC2DEC4", "ISRC2DEC4"), + + ARIZONA_MUX_ROUTES("ISRC3INT1", "ISRC3INT1"), + ARIZONA_MUX_ROUTES("ISRC3INT2", "ISRC3INT2"), + ARIZONA_MUX_ROUTES("ISRC3INT3", "ISRC3INT3"), + ARIZONA_MUX_ROUTES("ISRC3INT4", "ISRC3INT4"), + + ARIZONA_MUX_ROUTES("ISRC3DEC1", "ISRC3DEC1"), + ARIZONA_MUX_ROUTES("ISRC3DEC2", "ISRC3DEC2"), + ARIZONA_MUX_ROUTES("ISRC3DEC3", "ISRC3DEC3"), + ARIZONA_MUX_ROUTES("ISRC3DEC4", "ISRC3DEC4"), + + { "AEC Loopback", "HPOUT1L", "OUT1L" }, + { "AEC Loopback", "HPOUT1R", "OUT1R" }, + { "HPOUT1L", NULL, "OUT1L" }, + { "HPOUT1R", NULL, "OUT1R" }, + + { "AEC Loopback", "SPKOUT", "OUT4L" }, + { "SPKOUTN", NULL, "OUT4L" }, + { "SPKOUTP", NULL, "OUT4L" }, + + { "MICSUPP", NULL, "SYSCLK" }, + + { "DRC1 Signal Activity", NULL, "DRC1L" }, + { "DRC1 Signal Activity", NULL, "DRC1R" }, + { "DRC2 Signal Activity", NULL, "DRC2L" }, + { "DRC2 Signal Activity", NULL, "DRC2R" }, +}; + +static int cs47l24_set_fll(struct snd_soc_codec *codec, int fll_id, int source, + unsigned int Fref, unsigned int Fout) +{ + struct cs47l24_priv *cs47l24 = snd_soc_codec_get_drvdata(codec); + + switch (fll_id) { + case CS47L24_FLL1: + return arizona_set_fll(&cs47l24->fll[0], source, Fref, Fout); + case CS47L24_FLL2: + return arizona_set_fll(&cs47l24->fll[1], source, Fref, Fout); + case CS47L24_FLL1_REFCLK: + return arizona_set_fll_refclk(&cs47l24->fll[0], source, Fref, + Fout); + case CS47L24_FLL2_REFCLK: + return arizona_set_fll_refclk(&cs47l24->fll[1], source, Fref, + Fout); + default: + return -EINVAL; + } +} + +#define CS47L24_RATES SNDRV_PCM_RATE_8000_192000 + +#define CS47L24_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_driver cs47l24_dai[] = { + { + .name = "cs47l24-aif1", + .id = 1, + .base = ARIZONA_AIF1_BCLK_CTRL, + .playback = { + .stream_name = "AIF1 Playback", + .channels_min = 1, + .channels_max = 8, + .rates = CS47L24_RATES, + .formats = CS47L24_FORMATS, + }, + .capture = { + .stream_name = "AIF1 Capture", + .channels_min = 1, + .channels_max = 8, + .rates = CS47L24_RATES, + .formats = CS47L24_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "cs47l24-aif2", + .id = 2, + .base = ARIZONA_AIF2_BCLK_CTRL, + .playback = { + .stream_name = "AIF2 Playback", + .channels_min = 1, + .channels_max = 6, + .rates = CS47L24_RATES, + .formats = CS47L24_FORMATS, + }, + .capture = { + .stream_name = "AIF2 Capture", + .channels_min = 1, + .channels_max = 6, + .rates = CS47L24_RATES, + .formats = CS47L24_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "cs47l24-aif3", + .id = 3, + .base = ARIZONA_AIF3_BCLK_CTRL, + .playback = { + .stream_name = "AIF3 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = CS47L24_RATES, + .formats = CS47L24_FORMATS, + }, + .capture = { + .stream_name = "AIF3 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = CS47L24_RATES, + .formats = CS47L24_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "cs47l24-cpu-voicectrl", + .capture = { + .stream_name = "Voice Control CPU", + .channels_min = 1, + .channels_max = 2, + .rates = CS47L24_RATES, + .formats = CS47L24_FORMATS, + }, + .compress_dai = 1, + }, + { + .name = "cs47l24-dsp-voicectrl", + .capture = { + .stream_name = "Voice Control DSP", + .channels_min = 1, + .channels_max = 2, + .rates = CS47L24_RATES, + .formats = CS47L24_FORMATS, + }, + }, +}; + +static irqreturn_t adsp2_irq(int irq, void *data) +{ + struct cs47l24_priv *cs47l24 = data; + int ret, avail; + + mutex_lock(&cs47l24->compr_info.lock); + + if (!cs47l24->compr_info.trig && + (cs47l24->core.adsp[2].fw_id == 0x7000d || + cs47l24->core.adsp[2].fw_id == 0x70036) && + cs47l24->core.adsp[2].running) { + if (cs47l24->core.arizona->pdata.ez2ctrl_trigger) + cs47l24->core.arizona->pdata.ez2ctrl_trigger(); + cs47l24->compr_info.trig = true; + } + + if (!cs47l24->compr_info.stream) + goto out; + + ret = wm_adsp_stream_handle_irq(cs47l24->compr_info.adsp); + if (ret < 0) { + dev_err(cs47l24->core.arizona->dev, + "Failed to capture DSP data: %d\n", + ret); + goto out; + } + + cs47l24->compr_info.total_copied += ret; + + avail = wm_adsp_stream_avail(cs47l24->compr_info.adsp); + if (avail > CS47L24_DEFAULT_FRAGMENT_SIZE) + snd_compr_fragment_elapsed(cs47l24->compr_info.stream); + +out: + mutex_unlock(&cs47l24->compr_info.lock); + + return IRQ_HANDLED; +} + +static int cs47l24_open(struct snd_compr_stream *stream) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct cs47l24_priv *cs47l24 = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = cs47l24->core.arizona; + int n_adsp, ret = 0; + + mutex_lock(&cs47l24->compr_info.lock); + + if (cs47l24->compr_info.stream) { + ret = -EBUSY; + goto out; + } + + if (strcmp(rtd->codec_dai->name, "cs47l24-dsp-voicectrl") == 0) { + n_adsp = 2; + } else { + dev_err(arizona->dev, + "No suitable compressed stream for dai '%s'\n", + rtd->codec_dai->name); + ret = -EINVAL; + goto out; + } + + if (!wm_adsp_compress_supported(&cs47l24->core.adsp[n_adsp], stream)) { + dev_err(arizona->dev, + "No suitable firmware for compressed stream\n"); + ret = -EINVAL; + goto out; + } + + cs47l24->compr_info.adsp = &cs47l24->core.adsp[n_adsp]; + cs47l24->compr_info.stream = stream; +out: + mutex_unlock(&cs47l24->compr_info.lock); + + return ret; +} + +static int cs47l24_free(struct snd_compr_stream *stream) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct cs47l24_priv *cs47l24 = snd_soc_codec_get_drvdata(rtd->codec); + + mutex_lock(&cs47l24->compr_info.lock); + + cs47l24->compr_info.stream = NULL; + cs47l24->compr_info.total_copied = 0; + if (!cs47l24->compr_info.forced) + cs47l24->compr_info.trig = false; + + wm_adsp_stream_free(cs47l24->compr_info.adsp); + + mutex_unlock(&cs47l24->compr_info.lock); + + return 0; +} + +static int cs47l24_set_params(struct snd_compr_stream *stream, + struct snd_compr_params *params) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct cs47l24_priv *cs47l24 = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = cs47l24->core.arizona; + struct cs47l24_compr *compr = &cs47l24->compr_info; + int ret = 0; + + mutex_lock(&compr->lock); + + if (!wm_adsp_format_supported(compr->adsp, stream, params)) { + dev_err(arizona->dev, + "Invalid params: id:%u, chan:%u,%u, rate:%u format:%u\n", + params->codec.id, params->codec.ch_in, + params->codec.ch_out, params->codec.sample_rate, + params->codec.format); + ret = -EINVAL; + goto out; + } + + ret = wm_adsp_stream_alloc(compr->adsp, params); + +out: + mutex_unlock(&compr->lock); + + return ret; +} + +static int cs47l24_get_params(struct snd_compr_stream *stream, + struct snd_codec *params) +{ + return 0; +} + +static int cs47l24_trigger(struct snd_compr_stream *stream, int cmd) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct cs47l24_priv *cs47l24 = snd_soc_codec_get_drvdata(rtd->codec); + int ret = 0; + bool pending = false; + + mutex_lock(&cs47l24->compr_info.lock); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + ret = wm_adsp_stream_start(cs47l24->compr_info.adsp); + + /** + * If the stream has already triggered before the stream + * opened better process any outstanding data + */ + if (cs47l24->compr_info.trig) + pending = true; + break; + case SNDRV_PCM_TRIGGER_STOP: + break; + default: + ret = -EINVAL; + break; + } + + mutex_unlock(&cs47l24->compr_info.lock); + + if (pending) + adsp2_irq(0, cs47l24); + + return ret; +} + +static int cs47l24_pointer(struct snd_compr_stream *stream, + struct snd_compr_tstamp *tstamp) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct cs47l24_priv *cs47l24 = snd_soc_codec_get_drvdata(rtd->codec); + + mutex_lock(&cs47l24->compr_info.lock); + tstamp->byte_offset = 0; + tstamp->copied_total = cs47l24->compr_info.total_copied; + mutex_unlock(&cs47l24->compr_info.lock); + + return 0; +} + +static int cs47l24_copy(struct snd_compr_stream *stream, char __user *buf, + size_t count) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct cs47l24_priv *cs47l24 = snd_soc_codec_get_drvdata(rtd->codec); + int ret; + + mutex_lock(&cs47l24->compr_info.lock); + + if (stream->direction == SND_COMPRESS_PLAYBACK) + ret = -EINVAL; + else + ret = wm_adsp_stream_read(cs47l24->compr_info.adsp, buf, count); + + mutex_unlock(&cs47l24->compr_info.lock); + + return ret; +} + +static int cs47l24_get_caps(struct snd_compr_stream *stream, + struct snd_compr_caps *caps) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct cs47l24_priv *cs47l24 = snd_soc_codec_get_drvdata(rtd->codec); + + mutex_lock(&cs47l24->compr_info.lock); + + memset(caps, 0, sizeof(*caps)); + + caps->direction = stream->direction; + caps->min_fragment_size = CS47L24_DEFAULT_FRAGMENT_SIZE; + caps->max_fragment_size = CS47L24_DEFAULT_FRAGMENT_SIZE; + caps->min_fragments = CS47L24_DEFAULT_FRAGMENTS; + caps->max_fragments = CS47L24_DEFAULT_FRAGMENTS; + + wm_adsp_get_caps(cs47l24->compr_info.adsp, stream, caps); + + mutex_unlock(&cs47l24->compr_info.lock); + + return 0; +} + +static int cs47l24_get_codec_caps(struct snd_compr_stream *stream, + struct snd_compr_codec_caps *codec) +{ + return 0; +} + +static int cs47l24_codec_probe(struct snd_soc_codec *codec) +{ + struct cs47l24_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->core.arizona; + int ret; + + codec->control_data = priv->core.arizona->regmap; + priv->core.arizona->dapm = &codec->dapm; + + ret = snd_soc_codec_set_cache_io(codec, 32, 16, SND_SOC_REGMAP); + if (ret != 0) + return ret; + + arizona_init_spk(codec); + arizona_init_gpio(codec); + arizona_init_mono(codec); + arizona_init_input(codec); + + ret = snd_soc_add_codec_controls(codec, &wm_adsp2_fw_controls[2], 4); + if (ret != 0) + return ret; + + mutex_lock(&codec->card->dapm_mutex); + snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); + mutex_unlock(&codec->card->dapm_mutex); + + priv->core.arizona->dapm = &codec->dapm; + + ret = arizona_request_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, + "ADSP2 interrupt 1", adsp2_irq, priv); + if (ret != 0) { + dev_err(arizona->dev, "Failed to request DSP IRQ: %d\n", ret); + return ret; + } + + ret = irq_set_irq_wake(arizona->irq, 1); + if (ret) + dev_err(arizona->dev, + "Failed to set DSP IRQ to wake source: %d\n", + ret); + + mutex_lock(&codec->card->dapm_mutex); + snd_soc_dapm_enable_pin(&codec->dapm, "DRC2 Signal Activity"); + mutex_unlock(&codec->card->dapm_mutex); + + ret = regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, + ARIZONA_IM_DRC2_SIG_DET_EINT2, + 0); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to unmask DRC2 IRQ for DSP: %d\n", + ret); + return ret; + } + + return 0; +} + +static int cs47l24_codec_remove(struct snd_soc_codec *codec) +{ + struct cs47l24_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->core.arizona; + + irq_set_irq_wake(arizona->irq, 0); + arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); + regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, + ARIZONA_IM_DRC2_SIG_DET_EINT2, + ARIZONA_IM_DRC2_SIG_DET_EINT2); + + priv->core.arizona->dapm = NULL; + + return 0; +} + +#define CS47L24_DIG_VU 0x0200 + +static unsigned int cs47l24_digital_vu[] = { + ARIZONA_DAC_DIGITAL_VOLUME_1L, + ARIZONA_DAC_DIGITAL_VOLUME_1R, + ARIZONA_DAC_DIGITAL_VOLUME_4L, +}; + +static struct snd_soc_codec_driver soc_codec_dev_cs47l24 = { + .probe = cs47l24_codec_probe, + .remove = cs47l24_codec_remove, + + .idle_bias_off = true, + + .set_sysclk = arizona_set_sysclk, + .set_pll = cs47l24_set_fll, + + .controls = cs47l24_snd_controls, + .num_controls = ARRAY_SIZE(cs47l24_snd_controls), + .dapm_widgets = cs47l24_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(cs47l24_dapm_widgets), + .dapm_routes = cs47l24_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(cs47l24_dapm_routes), +}; + +static struct snd_compr_ops cs47l24_compr_ops = { + .open = cs47l24_open, + .free = cs47l24_free, + .set_params = cs47l24_set_params, + .get_params = cs47l24_get_params, + .trigger = cs47l24_trigger, + .pointer = cs47l24_pointer, + .copy = cs47l24_copy, + .get_caps = cs47l24_get_caps, + .get_codec_caps = cs47l24_get_codec_caps, +}; + +static struct snd_soc_platform_driver cs47l24_compr_platform = { + .compr_ops = &cs47l24_compr_ops, +}; + +static int cs47l24_probe(struct platform_device *pdev) +{ + struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); + struct cs47l24_priv *cs47l24; + int i, ret; + + BUILD_BUG_ON(ARRAY_SIZE(cs47l24_dai) > ARIZONA_MAX_DAI); + + cs47l24 = devm_kzalloc(&pdev->dev, sizeof(struct cs47l24_priv), + GFP_KERNEL); + if (cs47l24 == NULL) + return -ENOMEM; + platform_set_drvdata(pdev, cs47l24); + + /* Set of_node to parent from the SPI device to allow DAPM to + * locate regulator supplies */ + pdev->dev.of_node = arizona->dev->of_node; + + mutex_init(&cs47l24->compr_info.lock); + mutex_init(&cs47l24->fw_lock); + + cs47l24->core.arizona = arizona; + cs47l24->core.num_inputs = 4; + + for (i = 1; i <= 2; i++) { + cs47l24->core.adsp[i].part = "cs47l24"; + cs47l24->core.adsp[i].num = i + 1; + cs47l24->core.adsp[i].type = WMFW_ADSP2; + cs47l24->core.adsp[i].dev = arizona->dev; + cs47l24->core.adsp[i].regmap = arizona->regmap; + + cs47l24->core.adsp[i].base = ARIZONA_DSP1_CONTROL_1 + + (0x100 * i); + cs47l24->core.adsp[i].mem = cs47l24_dsp_regions[i - 1]; + cs47l24->core.adsp[i].num_mems + = ARRAY_SIZE(cs47l24_dsp2_regions); + + if (arizona->pdata.num_fw_defs[i]) { + cs47l24->core.adsp[i].firmwares + = arizona->pdata.fw_defs[i]; + + cs47l24->core.adsp[i].num_firmwares + = arizona->pdata.num_fw_defs[i]; + } + + ret = wm_adsp2_init(&cs47l24->core.adsp[i], &cs47l24->fw_lock); + if (ret != 0) + goto error; + } + + for (i = 0; i < ARRAY_SIZE(cs47l24->fll); i++) + cs47l24->fll[i].vco_mult = 3; + + arizona_init_fll(arizona, 1, ARIZONA_FLL1_CONTROL_1 - 1, + ARIZONA_IRQ_FLL1_LOCK, ARIZONA_IRQ_FLL1_CLOCK_OK, + &cs47l24->fll[0]); + arizona_init_fll(arizona, 2, ARIZONA_FLL2_CONTROL_1 - 1, + ARIZONA_IRQ_FLL2_LOCK, ARIZONA_IRQ_FLL2_CLOCK_OK, + &cs47l24->fll[1]); + + for (i = 0; i < ARRAY_SIZE(cs47l24_dai); i++) + arizona_init_dai(&cs47l24->core, i); + + /* Latch volume update bits */ + for (i = 0; i < ARRAY_SIZE(cs47l24_digital_vu); i++) + regmap_update_bits(arizona->regmap, cs47l24_digital_vu[i], + CS47L24_DIG_VU, CS47L24_DIG_VU); + + pm_runtime_enable(&pdev->dev); + pm_runtime_idle(&pdev->dev); + + ret = snd_soc_register_platform(&pdev->dev, &cs47l24_compr_platform); + if (ret < 0) { + dev_err(&pdev->dev, + "Failed to register platform: %d\n", + ret); + goto error; + } + + ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_cs47l24, + cs47l24_dai, ARRAY_SIZE(cs47l24_dai)); + if (ret < 0) { + dev_err(&pdev->dev, + "Failed to register codec: %d\n", + ret); + snd_soc_unregister_platform(&pdev->dev); + goto error; + } + + return ret; + +error: + mutex_destroy(&cs47l24->compr_info.lock); + mutex_destroy(&cs47l24->fw_lock); + + return ret; +} + +static int cs47l24_remove(struct platform_device *pdev) +{ + struct cs47l24_priv *cs47l24 = platform_get_drvdata(pdev); + + snd_soc_unregister_codec(&pdev->dev); + pm_runtime_disable(&pdev->dev); + + mutex_destroy(&cs47l24->compr_info.lock); + mutex_destroy(&cs47l24->fw_lock); + + return 0; +} + +static struct platform_driver cs47l24_codec_driver = { + .driver = { + .name = "cs47l24-codec", + .owner = THIS_MODULE, + }, + .probe = cs47l24_probe, + .remove = cs47l24_remove, +}; + +module_platform_driver(cs47l24_codec_driver); + +MODULE_DESCRIPTION("ASoC CS47L24 driver"); +MODULE_AUTHOR("Richard Fitzgerald "); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:cs47l24-codec"); diff --git a/sound/soc/codecs/cs47l24.h b/sound/soc/codecs/cs47l24.h new file mode 100644 index 00000000000..ce51c6b005e --- /dev/null +++ b/sound/soc/codecs/cs47l24.h @@ -0,0 +1,23 @@ +/* + * cs47l24.h -- ALSA SoC Audio driver for CS47L24 + * + * Copyright 2014 Cirrus Logic + * + * Author: Richard Fitzgerald + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _CS47L24_H +#define _CS47L24_H + +#include "arizona.h" + +#define CS47L24_FLL1 1 +#define CS47L24_FLL2 2 +#define CS47L24_FLL1_REFCLK 3 +#define CS47L24_FLL2_REFCLK 4 + +#endif diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index e18b70dd88f..f84cc9bd877 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2165,9 +2165,15 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, break; case SND_SOC_DAPM_PRE_PMD: - if (dsp->fw_id == 0x40019 || dsp->fw_id == 0x5001f || - dsp->fw_id == 0x4001f) { + switch (dsp->fw_id) { + case 0x40019: + case 0x4001f: + case 0x5001f: + case 0x7001f: wm_adsp_edac_shutdown(dsp); + break; + default: + break; } dsp->running = false; From 30939f60df21223e3d61ab090f2a9485ad199c91 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 28 Oct 2014 11:02:34 +0000 Subject: [PATCH 0483/1167] Documentation: devicetree: arizona: Add CS47L24 bindings Change-Id: I3f3509ee2a6862896da788dfa5730e60af4b33ed Signed-off-by: Richard Fitzgerald --- Documentation/devicetree/bindings/mfd/arizona.txt | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 752524810a3..33b697d155b 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -11,6 +11,9 @@ Required properties: "wlf,wm8280" "wlf,wm8281" "wlf,wm8997" + "wlf,wm1831" + "cirrus,cs47l24" + - reg : I2C slave address when connected using I2C, chip select number when using SPI. @@ -30,8 +33,8 @@ Required properties: - AVDD-supply, DBVDD1-supply, DBVDD2-supply, DBVDD3-supply (wm5102, wm5110), CPVDD-supply, SPKVDDL-supply (wm5102, wm5110), SPKVDDR-supply (wm5102, - wm5110), SPKVDD-supply (wm8997) : Power supplies for the device, as covered - in Documentation/devicetree/bindings/regulator/regulator.txt + wm5110), SPKVDD-supply (wm8997, cs47l24) : Power supplies for the device, + as covered in Documentation/devicetree/bindings/regulator/regulator.txt Optional properties: From 4a69bef1c253d9a1f4454c5eb004862cb9fb9a24 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 6 Nov 2014 09:37:43 +0000 Subject: [PATCH 0484/1167] ASoC: arizona: Implement stability check for EQ coefficients This patchs adds a stability check on the coefficients written to the EQ, for this it is necessary to merge the mode control and the coefficients as some coefficients may only be unstable with a certain mode setting so it is ideal if these are always updated in sync. Change-Id: Idac908d345ad411ad882985205acd4d2996d9dc6 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 61 ++++++++++++++++++++++++++++++++++++++ sound/soc/codecs/arizona.h | 11 +++++++ sound/soc/codecs/cs47l24.c | 6 ++-- sound/soc/codecs/florida.c | 12 +++----- sound/soc/codecs/wm5102.c | 12 +++----- sound/soc/codecs/wm8997.c | 13 +++----- sound/soc/codecs/wm8998.c | 12 +++----- 7 files changed, 90 insertions(+), 37 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index b99b4363379..04237b4be44 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -2841,6 +2842,66 @@ int arizona_disable_force_bypass(struct snd_soc_codec *codec) } EXPORT_SYMBOL_GPL(arizona_disable_force_bypass); +static bool arizona_filter_unstable(bool mode, s16 a, s16 b) +{ + a = be16_to_cpu(a); + b = be16_to_cpu(b); + + if (!mode) { + return abs(a) >= 4096; + } else { + if (abs(b) >= 4096) + return true; + + return (abs((a << 16) / (4096 - b)) >= 4096 << 4); + } +} + +int arizona_eq_coeff_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + struct soc_bytes *params = (void *)kcontrol->private_value; + unsigned int val; + __be16 *data; + int len; + int ret; + + len = params->num_regs * regmap_get_val_bytes(arizona->regmap); + + data = kmemdup(ucontrol->value.bytes.data, len, + GFP_KERNEL | GFP_DMA); + if (!data) + return -ENOMEM; + + data[0] &= cpu_to_be16(ARIZONA_EQ1_B1_MODE); + + if (arizona_filter_unstable(!!data[0], data[1], data[2]) || + arizona_filter_unstable(true, data[4], data[5]) || + arizona_filter_unstable(true, data[8], data[9]) || + arizona_filter_unstable(true, data[12], data[13]) || + arizona_filter_unstable(false, data[16], data[17])) { + dev_err(arizona->dev, "Rejecting unstable EQ coefficients\n"); + ret = -EINVAL; + goto out; + } + + ret = regmap_read(arizona->regmap, params->base, &val); + if (ret != 0) + goto out; + + val &= ~ARIZONA_EQ1_B1_MODE; + data[0] |= cpu_to_be16(val); + + ret = regmap_raw_write(arizona->regmap, params->base, data, len); + +out: + kfree(data); + return ret; +} +EXPORT_SYMBOL_GPL(arizona_eq_coeff_put); + MODULE_DESCRIPTION("ASoC Wolfson Arizona class device support"); MODULE_AUTHOR("Mark Brown "); MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 20863dab6b7..eb0d1922f4b 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -196,6 +196,14 @@ extern int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS]; snd_soc_get_value_enum_double, \ arizona_put_sample_rate_enum) +#define ARIZONA_EQ_CONTROL(xname, xbase) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ + .info = snd_soc_bytes_info, .get = snd_soc_bytes_get, \ + .put = arizona_eq_coeff_put, .private_value = \ + ((unsigned long)&(struct soc_bytes) \ + {.base = xbase, .num_regs = 20, \ + .mask = ~ARIZONA_EQ1_B1_MODE }) } + #define ARIZONA_RATE_ENUM_SIZE 4 #define ARIZONA_SYNC_RATE_ENUM_SIZE 3 #define ARIZONA_SAMPLE_RATE_ENUM_SIZE 14 @@ -251,6 +259,9 @@ extern int arizona_anc_ev(struct snd_soc_dapm_widget *w, extern int arizona_put_sample_rate_enum(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); +extern int arizona_eq_coeff_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); + extern int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id, int source, unsigned int freq, int dir); diff --git a/sound/soc/codecs/cs47l24.c b/sound/soc/codecs/cs47l24.c index 955704fbcf0..d2c844ddd7e 100644 --- a/sound/soc/codecs/cs47l24.c +++ b/sound/soc/codecs/cs47l24.c @@ -141,8 +141,7 @@ SOC_ENUM("Input Ramp Down", arizona_in_vd_ramp), ARIZONA_MIXER_CONTROLS("EQ1", ARIZONA_EQ1MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), -SND_SOC_BYTES("EQ1 Coefficients", ARIZONA_EQ1_3, 19), -SOC_SINGLE("EQ1 Mode Switch", ARIZONA_EQ1_2, ARIZONA_EQ1_B1_MODE_SHIFT, 1, 0), +ARIZONA_EQ_CONTROL("EQ1 Coefficients", ARIZONA_EQ1_2), SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ1 B2 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B2_GAIN_SHIFT, @@ -154,8 +153,7 @@ SOC_SINGLE_TLV("EQ1 B4 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ1 B5 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B5_GAIN_SHIFT, 24, 0, eq_tlv), -SND_SOC_BYTES("EQ2 Coefficients", ARIZONA_EQ2_3, 19), -SOC_SINGLE("EQ2 Mode Switch", ARIZONA_EQ2_2, ARIZONA_EQ2_B1_MODE_SHIFT, 1, 0), +ARIZONA_EQ_CONTROL("EQ2 Coefficients", ARIZONA_EQ2_2), SOC_SINGLE_TLV("EQ2 B1 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ2 B2 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B2_GAIN_SHIFT, diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 7c656ca76a9..193f4d0ee7e 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -365,8 +365,7 @@ ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ4", ARIZONA_EQ4MIX_INPUT_1_SOURCE), -SND_SOC_BYTES("EQ1 Coefficients", ARIZONA_EQ1_3, 19), -SOC_SINGLE("EQ1 Mode Switch", ARIZONA_EQ1_2, ARIZONA_EQ1_B1_MODE_SHIFT, 1, 0), +ARIZONA_EQ_CONTROL("EQ1 Coefficients", ARIZONA_EQ1_2), SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ1 B2 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B2_GAIN_SHIFT, @@ -378,8 +377,7 @@ SOC_SINGLE_TLV("EQ1 B4 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ1 B5 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B5_GAIN_SHIFT, 24, 0, eq_tlv), -SND_SOC_BYTES("EQ2 Coefficients", ARIZONA_EQ2_3, 19), -SOC_SINGLE("EQ2 Mode Switch", ARIZONA_EQ2_2, ARIZONA_EQ2_B1_MODE_SHIFT, 1, 0), +ARIZONA_EQ_CONTROL("EQ2 Coefficients", ARIZONA_EQ2_2), SOC_SINGLE_TLV("EQ2 B1 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ2 B2 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B2_GAIN_SHIFT, @@ -391,8 +389,7 @@ SOC_SINGLE_TLV("EQ2 B4 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ2 B5 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B5_GAIN_SHIFT, 24, 0, eq_tlv), -SND_SOC_BYTES("EQ3 Coefficients", ARIZONA_EQ3_3, 19), -SOC_SINGLE("EQ3 Mode Switch", ARIZONA_EQ3_2, ARIZONA_EQ3_B1_MODE_SHIFT, 1, 0), +ARIZONA_EQ_CONTROL("EQ3 Coefficients", ARIZONA_EQ3_2), SOC_SINGLE_TLV("EQ3 B1 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ3 B2 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B2_GAIN_SHIFT, @@ -404,8 +401,7 @@ SOC_SINGLE_TLV("EQ3 B4 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ3 B5 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B5_GAIN_SHIFT, 24, 0, eq_tlv), -SND_SOC_BYTES("EQ4 Coefficients", ARIZONA_EQ4_3, 19), -SOC_SINGLE("EQ4 Mode Switch", ARIZONA_EQ4_2, ARIZONA_EQ4_B1_MODE_SHIFT, 1, 0), +ARIZONA_EQ_CONTROL("EQ4 Coefficients", ARIZONA_EQ4_2), SOC_SINGLE_TLV("EQ4 B1 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ4 B2 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B2_GAIN_SHIFT, diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 965469f4e83..969b26d9567 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -798,8 +798,7 @@ ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ4", ARIZONA_EQ4MIX_INPUT_1_SOURCE), -SND_SOC_BYTES("EQ1 Coefficients", ARIZONA_EQ1_3, 19), -SOC_SINGLE("EQ1 Mode Switch", ARIZONA_EQ1_2, ARIZONA_EQ1_B1_MODE_SHIFT, 1, 0), +ARIZONA_EQ_CONTROL("EQ1 Coefficients", ARIZONA_EQ1_2), SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ1 B2 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B2_GAIN_SHIFT, @@ -811,8 +810,7 @@ SOC_SINGLE_TLV("EQ1 B4 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ1 B5 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B5_GAIN_SHIFT, 24, 0, eq_tlv), -SND_SOC_BYTES("EQ2 Coefficients", ARIZONA_EQ2_3, 19), -SOC_SINGLE("EQ2 Mode Switch", ARIZONA_EQ2_2, ARIZONA_EQ2_B1_MODE_SHIFT, 1, 0), +ARIZONA_EQ_CONTROL("EQ2 Coefficients", ARIZONA_EQ2_2), SOC_SINGLE_TLV("EQ2 B1 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ2 B2 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B2_GAIN_SHIFT, @@ -824,8 +822,7 @@ SOC_SINGLE_TLV("EQ2 B4 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ2 B5 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B5_GAIN_SHIFT, 24, 0, eq_tlv), -SND_SOC_BYTES("EQ3 Coefficients", ARIZONA_EQ3_3, 19), -SOC_SINGLE("EQ3 Mode Switch", ARIZONA_EQ3_2, ARIZONA_EQ3_B1_MODE_SHIFT, 1, 0), +ARIZONA_EQ_CONTROL("EQ3 Coefficients", ARIZONA_EQ3_2), SOC_SINGLE_TLV("EQ3 B1 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ3 B2 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B2_GAIN_SHIFT, @@ -837,8 +834,7 @@ SOC_SINGLE_TLV("EQ3 B4 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ3 B5 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B5_GAIN_SHIFT, 24, 0, eq_tlv), -SND_SOC_BYTES("EQ4 Coefficients", ARIZONA_EQ4_3, 19), -SOC_SINGLE("EQ4 Mode Switch", ARIZONA_EQ4_2, ARIZONA_EQ4_B1_MODE_SHIFT, 1, 0), +ARIZONA_EQ_CONTROL("EQ4 Coefficients", ARIZONA_EQ4_2), SOC_SINGLE_TLV("EQ4 B1 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ4 B2 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B2_GAIN_SHIFT, diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c index 25dde0b4f6f..6cbbf70ac73 100644 --- a/sound/soc/codecs/wm8997.c +++ b/sound/soc/codecs/wm8997.c @@ -170,15 +170,7 @@ ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ4", ARIZONA_EQ4MIX_INPUT_1_SOURCE), -SND_SOC_BYTES_MASK("EQ1 Coefficeints", ARIZONA_EQ1_1, 21, - ARIZONA_EQ1_ENA_MASK), -SND_SOC_BYTES_MASK("EQ2 Coefficeints", ARIZONA_EQ2_1, 21, - ARIZONA_EQ2_ENA_MASK), -SND_SOC_BYTES_MASK("EQ3 Coefficeints", ARIZONA_EQ3_1, 21, - ARIZONA_EQ3_ENA_MASK), -SND_SOC_BYTES_MASK("EQ4 Coefficeints", ARIZONA_EQ4_1, 21, - ARIZONA_EQ4_ENA_MASK), - +ARIZONA_EQ_CONTROL("EQ1 Coefficients", ARIZONA_EQ1_2), SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ1 B2 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B2_GAIN_SHIFT, @@ -190,6 +182,7 @@ SOC_SINGLE_TLV("EQ1 B4 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ1 B5 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B5_GAIN_SHIFT, 24, 0, eq_tlv), +ARIZONA_EQ_CONTROL("EQ2 Coefficients", ARIZONA_EQ2_2), SOC_SINGLE_TLV("EQ2 B1 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ2 B2 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B2_GAIN_SHIFT, @@ -201,6 +194,7 @@ SOC_SINGLE_TLV("EQ2 B4 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ2 B5 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B5_GAIN_SHIFT, 24, 0, eq_tlv), +ARIZONA_EQ_CONTROL("EQ3 Coefficients", ARIZONA_EQ3_2), SOC_SINGLE_TLV("EQ3 B1 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ3 B2 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B2_GAIN_SHIFT, @@ -212,6 +206,7 @@ SOC_SINGLE_TLV("EQ3 B4 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ3 B5 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B5_GAIN_SHIFT, 24, 0, eq_tlv), +ARIZONA_EQ_CONTROL("EQ4 Coefficients", ARIZONA_EQ4_2), SOC_SINGLE_TLV("EQ4 B1 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ4 B2 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B2_GAIN_SHIFT, diff --git a/sound/soc/codecs/wm8998.c b/sound/soc/codecs/wm8998.c index 444de6a81ba..ec8a344e120 100644 --- a/sound/soc/codecs/wm8998.c +++ b/sound/soc/codecs/wm8998.c @@ -128,8 +128,7 @@ ARIZONA_GAINMUX_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), ARIZONA_GAINMUX_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), ARIZONA_GAINMUX_CONTROLS("EQ4", ARIZONA_EQ4MIX_INPUT_1_SOURCE), -SND_SOC_BYTES("EQ1 Coefficients", ARIZONA_EQ1_3, 19), -SOC_SINGLE("EQ1 Mode Switch", ARIZONA_EQ1_2, ARIZONA_EQ1_B1_MODE_SHIFT, 1, 0), +ARIZONA_EQ_CONTROL("EQ1 Coefficients", ARIZONA_EQ1_2), SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ1 B2 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B2_GAIN_SHIFT, @@ -141,8 +140,7 @@ SOC_SINGLE_TLV("EQ1 B4 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ1 B5 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B5_GAIN_SHIFT, 24, 0, eq_tlv), -SND_SOC_BYTES("EQ2 Coefficients", ARIZONA_EQ2_3, 19), -SOC_SINGLE("EQ2 Mode Switch", ARIZONA_EQ2_2, ARIZONA_EQ2_B1_MODE_SHIFT, 1, 0), +ARIZONA_EQ_CONTROL("EQ2 Coefficients", ARIZONA_EQ2_2), SOC_SINGLE_TLV("EQ2 B1 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ2 B2 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B2_GAIN_SHIFT, @@ -154,8 +152,7 @@ SOC_SINGLE_TLV("EQ2 B4 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ2 B5 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B5_GAIN_SHIFT, 24, 0, eq_tlv), -SND_SOC_BYTES("EQ3 Coefficients", ARIZONA_EQ3_3, 19), -SOC_SINGLE("EQ3 Mode Switch", ARIZONA_EQ3_2, ARIZONA_EQ3_B1_MODE_SHIFT, 1, 0), +ARIZONA_EQ_CONTROL("EQ3 Coefficients", ARIZONA_EQ3_2), SOC_SINGLE_TLV("EQ3 B1 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ3 B2 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B2_GAIN_SHIFT, @@ -167,8 +164,7 @@ SOC_SINGLE_TLV("EQ3 B4 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B4_GAIN_SHIFT, SOC_SINGLE_TLV("EQ3 B5 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B5_GAIN_SHIFT, 24, 0, eq_tlv), -SND_SOC_BYTES("EQ4 Coefficients", ARIZONA_EQ4_3, 19), -SOC_SINGLE("EQ4 Mode Switch", ARIZONA_EQ4_2, ARIZONA_EQ4_B1_MODE_SHIFT, 1, 0), +ARIZONA_EQ_CONTROL("EQ4 Coefficients", ARIZONA_EQ4_2), SOC_SINGLE_TLV("EQ4 B1 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B1_GAIN_SHIFT, 24, 0, eq_tlv), SOC_SINGLE_TLV("EQ4 B2 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B2_GAIN_SHIFT, From 2d8452e42f5c1cbc28204efd3815ab28ae7bdcf7 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 30 Oct 2014 15:07:42 +0000 Subject: [PATCH 0485/1167] mfd: wm8998: fix typo in Makefile command Build of WM8998 was dependant on itself, it should be dependant on the core Arizona driver being built. Change-Id: Id9489bfb75b552be8a380a2f36684a3878edf77f Signed-off-by: Richard Fitzgerald --- drivers/mfd/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 99da3b7df06..bf6322d034e 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -47,7 +47,7 @@ ifneq ($(CONFIG_MFD_WM8997),n) obj-$(CONFIG_MFD_ARIZONA) += wm8997-tables.o endif ifneq ($(CONFIG_MFD_WM8998),n) -obj-$(CONFIG_MFD_WM8998) += wm8998-tables.o +obj-$(CONFIG_MFD_ARIZONA) += wm8998-tables.o endif ifneq ($(CONFIG_MFD_CS47L24),n) obj-$(CONFIG_MFD_ARIZONA) += cs47l24-tables.o From 129a25726b3d9424a0efc861325be19e929201c5 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 6 Nov 2014 10:50:53 +0000 Subject: [PATCH 0486/1167] mfd: cs47l24: Add rev A register patch Change-Id: I4f2c1852e6d8079102efae9e53ede43bc513468f Signed-off-by: Richard Fitzgerald --- drivers/mfd/cs47l24-tables.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/cs47l24-tables.c b/drivers/mfd/cs47l24-tables.c index 19368c04daf..42b28266dc5 100644 --- a/drivers/mfd/cs47l24-tables.c +++ b/drivers/mfd/cs47l24-tables.c @@ -20,10 +20,19 @@ #define CS47L24_NUM_ISR 5 +static const struct reg_default cs47l24_reva_patch[] = { + { 0x80, 0x3 }, + { 0x27C, 0x0010 }, + { 0x221, 0x0070 }, + { 0x80, 0x0 }, +}; + /* We use a function so we can use ARRAY_SIZE() */ int cs47l24_patch(struct arizona *arizona) { - return 0; + return regmap_register_patch(arizona->regmap, + cs47l24_reva_patch, + ARRAY_SIZE(cs47l24_reva_patch)); } EXPORT_SYMBOL_GPL(cs47l24_patch); From 3cb77dccfa0112e0db15bae602a3502d913ee1c4 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 7 Nov 2014 13:39:51 +0000 Subject: [PATCH 0487/1167] ASoC: cs47l24: Remove unused ana_tlv Change-Id: Ic8d1fb728d926baa619637f669ec97f2b200eaf4 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/cs47l24.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/codecs/cs47l24.c b/sound/soc/codecs/cs47l24.c index d2c844ddd7e..9e2bd5dda4a 100644 --- a/sound/soc/codecs/cs47l24.c +++ b/sound/soc/codecs/cs47l24.c @@ -100,7 +100,6 @@ static int cs47l24_virt_dsp_power_ev(struct snd_soc_dapm_widget *w, return 0; } -static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); static DECLARE_TLV_DB_SCALE(noise_tlv, 0, 600, 0); From 84a1be839c516677045bd987d8c14781ec778ec7 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 13 Aug 2014 11:42:46 +0100 Subject: [PATCH 0488/1167] mfd: wm5102: Mark register write sequencer control 3 readable During init the core checks if the wm5102 has finished starting by reading register 0x19 and looking at the value. This read always fails since this is not a readable register, mark it as being one. While we're at it provide a constant for the register name (as supplied by Charles Keepax). Signed-off-by: Mark Brown Signed-off-by: Charles Keepax Signed-off-by: Lee Jones (cherry picked from commit 48018943eb906d81e48f40675c17b92abfeafcf1) Change-Id: I169295196a19ccd20f0f41d9e6ef581946f4ad03 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 3 ++- drivers/mfd/wm5102-tables.c | 1 + include/linux/mfd/arizona/registers.h | 1 + 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 309d87a757d..7564cdad996 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1390,7 +1390,8 @@ int arizona_dev_init(struct arizona *arizona) /* Ensure device startup is complete */ switch (arizona->type) { case WM5102: - ret = regmap_read(arizona->regmap, 0x19, &val); + ret = regmap_read(arizona->regmap, + ARIZONA_WRITE_SEQUENCER_CTRL_3, &val); if (ret != 0) dev_err(dev, "Failed to check write sequencer state: %d\n", diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index c09bf87d71e..4a3acf35944 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -1088,6 +1088,7 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_WRITE_SEQUENCER_CTRL_0: case ARIZONA_WRITE_SEQUENCER_CTRL_1: case ARIZONA_WRITE_SEQUENCER_CTRL_2: + case ARIZONA_WRITE_SEQUENCER_CTRL_3: case ARIZONA_WRITE_SEQUENCER_PROM: case ARIZONA_TONE_GENERATOR_1: case ARIZONA_TONE_GENERATOR_2: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 7e5efe048e7..f99b9f1db9e 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -27,6 +27,7 @@ #define ARIZONA_WRITE_SEQUENCER_CTRL_0 0x16 #define ARIZONA_WRITE_SEQUENCER_CTRL_1 0x17 #define ARIZONA_WRITE_SEQUENCER_CTRL_2 0x18 +#define ARIZONA_WRITE_SEQUENCER_CTRL_3 0x19 #define ARIZONA_WRITE_SEQUENCER_PROM 0x1A #define ARIZONA_TONE_GENERATOR_1 0x20 #define ARIZONA_TONE_GENERATOR_2 0x21 From 61eb419745bb931598808436550f2a043194d37f Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 22 Oct 2014 14:04:14 +0100 Subject: [PATCH 0489/1167] mfd: arizona: Mark write sequencer control registers volatile The write sequencer control registers should not be cached, as we don't ever want their value synchronised as this might cause a write sequence to be accidentally initiated. Change-Id: I89dfcecae2f0ba4a809b6aae0505cb304b8d2353 Signed-off-by: Richard Fitzgerald Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 6 +++--- drivers/mfd/wm8997-tables.c | 6 +++--- drivers/mfd/wm8998-tables.c | 6 +++--- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 00a792a9701..5b6a88ccc84 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -666,9 +666,6 @@ static const struct reg_default florida_reg_default[] = { { 0x0000000A, 0x0001 }, /* R10 - Ctrl IF I2C2 CFG 1 */ { 0x0000000B, 0x0036 }, /* R11 - Ctrl IF I2C1 CFG 2 */ { 0x0000000C, 0x0036 }, /* R12 - Ctrl IF I2C2 CFG 2 */ - { 0x00000016, 0x0000 }, /* R22 - Write Sequencer Ctrl 0 */ - { 0x00000017, 0x0000 }, /* R23 - Write Sequencer Ctrl 1 */ - { 0x00000018, 0x0000 }, /* R24 - Write Sequencer Ctrl 2 */ { 0x00000020, 0x0000 }, /* R32 - Tone Generator 1 */ { 0x00000021, 0x1000 }, /* R33 - Tone Generator 2 */ { 0x00000022, 0x0000 }, /* R34 - Tone Generator 3 */ @@ -3051,6 +3048,9 @@ static bool florida_volatile_register(struct device *dev, unsigned int reg) switch (reg) { case ARIZONA_SOFTWARE_RESET: case ARIZONA_DEVICE_REVISION: + case ARIZONA_WRITE_SEQUENCER_CTRL_0: + case ARIZONA_WRITE_SEQUENCER_CTRL_1: + case ARIZONA_WRITE_SEQUENCER_CTRL_2: case ARIZONA_HP_DETECT_CALIBRATION_1: case ARIZONA_HP_DETECT_CALIBRATION_2: case ARIZONA_HAPTICS_STATUS: diff --git a/drivers/mfd/wm8997-tables.c b/drivers/mfd/wm8997-tables.c index d641474a23c..033b73a9ae2 100644 --- a/drivers/mfd/wm8997-tables.c +++ b/drivers/mfd/wm8997-tables.c @@ -157,9 +157,6 @@ EXPORT_SYMBOL_GPL(wm8997_irq); static const struct reg_default wm8997_reg_default[] = { { 0x00000009, 0x0001 }, /* R9 - Ctrl IF I2C1 CFG 1 */ - { 0x00000016, 0x0000 }, /* R22 - Write Sequencer Ctrl 0 */ - { 0x00000017, 0x0000 }, /* R23 - Write Sequencer Ctrl 1 */ - { 0x00000018, 0x0000 }, /* R24 - Write Sequencer Ctrl 2 */ { 0x00000020, 0x0000 }, /* R32 - Tone Generator 1 */ { 0x00000021, 0x1000 }, /* R33 - Tone Generator 2 */ { 0x00000022, 0x0000 }, /* R34 - Tone Generator 3 */ @@ -1471,6 +1468,9 @@ static bool wm8997_volatile_register(struct device *dev, unsigned int reg) switch (reg) { case ARIZONA_SOFTWARE_RESET: case ARIZONA_DEVICE_REVISION: + case ARIZONA_WRITE_SEQUENCER_CTRL_0: + case ARIZONA_WRITE_SEQUENCER_CTRL_1: + case ARIZONA_WRITE_SEQUENCER_CTRL_2: case ARIZONA_HAPTICS_STATUS: case ARIZONA_SAMPLE_RATE_1_STATUS: case ARIZONA_SAMPLE_RATE_2_STATUS: diff --git a/drivers/mfd/wm8998-tables.c b/drivers/mfd/wm8998-tables.c index d3e3e931bed..dfeabd6d640 100644 --- a/drivers/mfd/wm8998-tables.c +++ b/drivers/mfd/wm8998-tables.c @@ -179,9 +179,6 @@ EXPORT_SYMBOL_GPL(wm8998_irq); static const struct reg_default wm8998_reg_default[] = { { 0x00000009, 0x0001 }, /* R9 - Ctrl IF I2C1 CFG 1 */ { 0x0000000B, 0x001A }, /* R11 - Ctrl IF I2C1 CFG 2 */ - { 0x00000016, 0x0000 }, /* R22 - Write Sequencer Ctrl 0 */ - { 0x00000017, 0x0000 }, /* R23 - Write Sequencer Ctrl 1 */ - { 0x00000018, 0x0000 }, /* R24 - Write Sequencer Ctrl 2 */ { 0x00000020, 0x0000 }, /* R32 - Tone Generator 1 */ { 0x00000021, 0x1000 }, /* R33 - Tone Generator 2 */ { 0x00000022, 0x0000 }, /* R34 - Tone Generator 3 */ @@ -1523,6 +1520,9 @@ static bool wm8998_volatile_register(struct device *dev, unsigned int reg) switch (reg) { case ARIZONA_SOFTWARE_RESET: case ARIZONA_DEVICE_REVISION: + case ARIZONA_WRITE_SEQUENCER_CTRL_0: + case ARIZONA_WRITE_SEQUENCER_CTRL_1: + case ARIZONA_WRITE_SEQUENCER_CTRL_2: case ARIZONA_HAPTICS_STATUS: case ARIZONA_SAMPLE_RATE_1_STATUS: case ARIZONA_SAMPLE_RATE_2_STATUS: From 55992f785a8d1d2b14e815e7f3bab187bc815830 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Tue, 14 May 2013 07:54:23 +0100 Subject: [PATCH 0490/1167] regmap: debugfs: Fix return from regmap_debugfs_get_dump_start regmap_debugfs_get_dump_start should return the offset of the register it should start reading from, However in the current code at one point the code does not return correct register offset. With this patch all the returns from this function takes reg_stride in to consideration to return correct offset. Signed-off-by: Srinivas Kandagatla Signed-off-by: Mark Brown (cherry-picked from commit 213fa5d9685b985e0c61a8db1883a3abf94b18d7) Change-Id: Ic7e7cd0f59646247170de6fe31e2ee4b32d3224c Signed-off-by: Charles Keepax --- drivers/base/regmap/regmap-debugfs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/base/regmap/regmap-debugfs.c b/drivers/base/regmap/regmap-debugfs.c index 975719bc345..3092861f50c 100644 --- a/drivers/base/regmap/regmap-debugfs.c +++ b/drivers/base/regmap/regmap-debugfs.c @@ -145,7 +145,7 @@ static unsigned int regmap_debugfs_get_dump_start(struct regmap *map, reg_offset = fpos_offset / map->debugfs_tot_len; *pos = c->min + (reg_offset * map->debugfs_tot_len); mutex_unlock(&map->cache_lock); - return c->base_reg + reg_offset; + return c->base_reg + (reg_offset * map->reg_stride); } *pos = c->max; From 040805205e18aec987af974fae7fb144afeeb129 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 5 Aug 2013 13:17:28 +0100 Subject: [PATCH 0491/1167] ASoC: core: init delayed_work for codec-codec links We must init the delayed_work for codec-codec links otherwise shutting down the DAI chain will fault when calling flush_delayed_work_sync() on the linked DAI. Signed-off-by: Richard Fitzgerald Signed-off-by: Mark Brown (cherry picked from commit 9d58a077465ff23b935042bf1cbdac64cdb78a2c) Change-Id: I492bb35ad3a4d1536fcddad5e81372aa585997d6 Signed-off-by: Charles Keepax --- sound/soc/soc-core.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index 34b61789925..008c97005b5 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -530,6 +530,15 @@ static int soc_ac97_dev_register(struct snd_soc_codec *codec) } #endif +static void codec2codec_close_delayed_work(struct work_struct *work) +{ + /* Currently nothing to do for c2c links + * Since c2c links are internal nodes in the DAPM graph and + * don't interface with the outside world or application layer + * we don't have to do any special handling on close. + */ +} + #ifdef CONFIG_PM_SLEEP /* powers down audio subsystem for suspend */ int snd_soc_suspend(struct device *dev) @@ -1430,6 +1439,9 @@ static int soc_probe_link_dais(struct snd_soc_card *card, int num, int order) return ret; } } else { + INIT_DELAYED_WORK(&rtd->delayed_work, + codec2codec_close_delayed_work); + /* link the DAI widgets */ play_w = codec_dai->playback_widget; capture_w = cpu_dai->capture_widget; From c8436585658f0e62f5a27e7fe26881dca521d36a Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 28 Oct 2014 14:07:32 +0000 Subject: [PATCH 0492/1167] ASoC: arizona: Correct SPDIF rate control The SPDIF can not be clocked from an ASYNC rate, this patch removes this as an option. Change-Id: I3f2a2c42d13f39e646352e239f18b6f3391fa071 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 04237b4be44..2490695595c 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -604,10 +604,13 @@ const struct soc_enum arizona_fx_rate = arizona_rate_text, arizona_rate_val); EXPORT_SYMBOL_GPL(arizona_fx_rate); -const SOC_ENUM_SINGLE_DECL(arizona_spdif_rate, - ARIZONA_SPD1_TX_CONTROL, - ARIZONA_SPD1_RATE_SHIFT, - arizona_rate_text); +const struct soc_enum arizona_spdif_rate = + SOC_VALUE_ENUM_SINGLE(ARIZONA_SPD1_TX_CONTROL, + ARIZONA_SPD1_RATE_SHIFT, + 0x0f, + ARIZONA_SYNC_RATE_ENUM_SIZE, + arizona_rate_text, + arizona_rate_val); EXPORT_SYMBOL_GPL(arizona_spdif_rate); const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE] = { From 3028f43d5166093ae4dd5c64a3c1382285209baa Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 30 Oct 2014 12:42:09 +0000 Subject: [PATCH 0493/1167] mfd: florida: Add missing registers for extra AIF2 channels Change-Id: I937a07652af670c42ea15c8c34123ef4926ea6e2 Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 5b6a88ccc84..2078f127792 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -927,8 +927,16 @@ static const struct reg_default florida_reg_default[] = { { 0x00000548, 0x1818 }, /* R1352 - AIF2 Frame Ctrl 2 */ { 0x00000549, 0x0000 }, /* R1353 - AIF2 Frame Ctrl 3 */ { 0x0000054A, 0x0001 }, /* R1354 - AIF2 Frame Ctrl 4 */ + { 0x0000054B, 0x0002 }, /* R1355 - AIF2 Frame Ctrl 5 */ + { 0x0000054C, 0x0003 }, /* R1356 - AIF2 Frame Ctrl 6 */ + { 0x0000054D, 0x0004 }, /* R1357 - AIF2 Frame Ctrl 7 */ + { 0x0000054E, 0x0005 }, /* R1358 - AIF2 Frame Ctrl 8 */ { 0x00000551, 0x0000 }, /* R1361 - AIF2 Frame Ctrl 11 */ { 0x00000552, 0x0001 }, /* R1362 - AIF2 Frame Ctrl 12 */ + { 0x00000553, 0x0002 }, /* R1363 - AIF2 Frame Ctrl 13 */ + { 0x00000554, 0x0003 }, /* R1364 - AIF2 Frame Ctrl 14 */ + { 0x00000555, 0x0004 }, /* R1365 - AIF2 Frame Ctrl 15 */ + { 0x00000556, 0x0005 }, /* R1366 - AIF2 Frame Ctrl 16 */ { 0x00000559, 0x0000 }, /* R1369 - AIF2 Tx Enables */ { 0x0000055A, 0x0000 }, /* R1370 - AIF2 Rx Enables */ { 0x00000580, 0x000C }, /* R1408 - AIF3 BCLK Ctrl */ @@ -2159,8 +2167,16 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_AIF2_FRAME_CTRL_2: case ARIZONA_AIF2_FRAME_CTRL_3: case ARIZONA_AIF2_FRAME_CTRL_4: + case ARIZONA_AIF2_FRAME_CTRL_5: + case ARIZONA_AIF2_FRAME_CTRL_6: + case ARIZONA_AIF2_FRAME_CTRL_7: + case ARIZONA_AIF2_FRAME_CTRL_8: case ARIZONA_AIF2_FRAME_CTRL_11: case ARIZONA_AIF2_FRAME_CTRL_12: + case ARIZONA_AIF2_FRAME_CTRL_13: + case ARIZONA_AIF2_FRAME_CTRL_14: + case ARIZONA_AIF2_FRAME_CTRL_15: + case ARIZONA_AIF2_FRAME_CTRL_16: case ARIZONA_AIF2_TX_ENABLES: case ARIZONA_AIF2_RX_ENABLES: case ARIZONA_AIF3_BCLK_CTRL: From c22bcd3cf45a8f3524827f4da7afb60aa60f01d6 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 29 Oct 2014 13:35:10 +0000 Subject: [PATCH 0494/1167] ASoC: arizona: Factor out polling of FLL lock In preparation for new parts factor out the poll waiting for the FLL lock. Change-Id: I41d671d676218555ada4a3f9e2cd17a2e99daa4d Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 53 ++++++++++++++++++-------------------- 1 file changed, 25 insertions(+), 28 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 2490695595c..2e5438e97b7 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2465,6 +2465,28 @@ static int arizona_is_enabled_fll(struct arizona_fll *fll) return reg & ARIZONA_FLL1_ENA; } +static int arizona_wait_for_fll(struct arizona_fll *fll, bool requested) +{ + struct arizona *arizona = fll->arizona; + unsigned int val = 0; + bool status; + int i; + + arizona_fll_dbg(fll, "Waiting for FLL...\n"); + + for (i = 0; i < 25; i++) { + regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_5, &val); + status = val & (ARIZONA_FLL1_CLOCK_OK_STS << (fll->id - 1)); + if (status == requested) + return 0; + msleep(10); + } + + arizona_fll_warn(fll, "Timed out waiting for lock\n"); + + return -ETIMEDOUT; +} + static int arizona_enable_fll(struct arizona_fll *fll) { struct arizona *arizona = fll->arizona; @@ -2545,21 +2567,8 @@ static int arizona_enable_fll(struct arizona_fll *fll) regmap_update_bits(arizona->regmap, fll->base + 1, ARIZONA_FLL1_FREERUN, 0); - if (fll_change || !already_enabled) { - int i; - unsigned int val = 0; - arizona_fll_dbg(fll, "Waiting for FLL lock...\n"); - for (i = 0; i < 25; i++) { - regmap_read(arizona->regmap, - ARIZONA_INTERRUPT_RAW_STATUS_5, - &val); - if (val & (ARIZONA_FLL1_CLOCK_OK_STS << (fll->id - 1))) - break; - msleep(10); - } - if (i == 25) - arizona_fll_warn(fll, "Timed out waiting for lock\n"); - } + if (fll_change || !already_enabled) + arizona_wait_for_fll(fll, true); return 0; } @@ -2568,8 +2577,6 @@ static void arizona_disable_fll(struct arizona_fll *fll) { struct arizona *arizona = fll->arizona; bool change; - int i; - unsigned int val = 0; arizona_fll_dbg(fll, "Disabling FLL\n"); @@ -2582,17 +2589,7 @@ static void arizona_disable_fll(struct arizona_fll *fll) regmap_update_bits(arizona->regmap, fll->base + 1, ARIZONA_FLL1_FREERUN, 0); - arizona_fll_dbg(fll, "Waiting for FLL disable...\n"); - for (i = 0; i < 25; i++) { - regmap_read(arizona->regmap, - ARIZONA_INTERRUPT_RAW_STATUS_5, - &val); - if (!(val & (ARIZONA_FLL1_CLOCK_OK_STS << (fll->id - 1)))) - break; - msleep(10); - } - if (i == 25) - arizona_fll_warn(fll, "Timed out waiting for disable\n"); + arizona_wait_for_fll(fll, false); if (change) pm_runtime_put_autosuspend(arizona->dev); From 42e9365f94e0a44863c034e16a14fd9e81fe8846 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Wed, 29 Oct 2014 17:32:35 +0000 Subject: [PATCH 0495/1167] extcon: arizona: Ignore jd_invert for MICD_CLAMP_STS The output of MICD_CLAMP_STS is not programmable Change-Id: I023bc9a96d1eeb0e1caa49bbee6adb96370607a9 Signed-off-by: Nariman Poushin --- drivers/extcon/extcon-arizona.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index b7fd4d0ddc6..607cc11d04e 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -1078,10 +1078,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) if (arizona->pdata.jd_gpio5) { mask = ARIZONA_MICD_CLAMP_STS; - if (arizona->pdata.jd_invert) - present = ARIZONA_MICD_CLAMP_STS; - else - present = 0; + present = 0; } else { mask = ARIZONA_JD1_STS; if (arizona->pdata.jd_invert) From 7bb1f307f6c92beaf454b358d22c70c94e50052d Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Thu, 30 Oct 2014 10:09:00 +0000 Subject: [PATCH 0496/1167] extcon: arizona: Refactor setting up the micd_clamp In preparation for support of the wm8285. Change-Id: I168e167f80b01bed7e1616cd89665fc3eb8df7f0 Signed-off-by: Nariman Poushin Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 68 +++++++++++++++++---------------- 1 file changed, 36 insertions(+), 32 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 607cc11d04e..420961ae68f 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -1279,13 +1279,45 @@ static ssize_t arizona_extcon_show(struct device *dev, return scnprintf(buf, PAGE_SIZE, "%d\n", info->arizona->hp_impedance); } +static void arizona_extcon_set_micd_clamp_mode(struct arizona *arizona) +{ + unsigned int val, clamp_mode; + + if (arizona->pdata.jd_gpio5) { + /* Put the GPIO into input mode with optional pull */ + val = 0xc101; + if (arizona->pdata.jd_gpio5_nopull) + val &= ~ARIZONA_GPN_PU; + + regmap_write(arizona->regmap, ARIZONA_GPIO5_CTRL, + val); + + if (arizona->pdata.jd_invert) + clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDH_GP5H; + else + clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDL_GP5H; + } else { + if (arizona->pdata.jd_invert) + clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDH; + else + clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDL; + } + + regmap_update_bits(arizona->regmap, + ARIZONA_MICD_CLAMP_CONTROL, + ARIZONA_MICD_CLAMP_MODE_MASK, clamp_mode); + + regmap_update_bits(arizona->regmap, + ARIZONA_JACK_DETECT_DEBOUNCE, + ARIZONA_MICD_CLAMP_DB, + ARIZONA_MICD_CLAMP_DB); +} + static int arizona_extcon_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); struct arizona_pdata *pdata = &arizona->pdata; struct arizona_extcon_info *info; - unsigned int val; - unsigned int clamp_mode; int jack_irq_fall, jack_irq_rise; int ret, mode, i, j; @@ -1500,36 +1532,8 @@ static int arizona_extcon_probe(struct platform_device *pdev) * If we have a clamp use it, activating in conjunction with * GPIO5 if that is connected for jack detect operation. */ - if (info->micd_clamp) { - if (arizona->pdata.jd_gpio5) { - /* Put the GPIO into input mode with optional pull */ - val = 0xc101; - if (arizona->pdata.jd_gpio5_nopull) - val &= ~ARIZONA_GPN_PU; - - regmap_write(arizona->regmap, ARIZONA_GPIO5_CTRL, - val); - - if (arizona->pdata.jd_invert) - clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDH_GP5H; - else - clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDL_GP5H; - } else { - if (arizona->pdata.jd_invert) - clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDH; - else - clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDL; - } - - regmap_update_bits(arizona->regmap, - ARIZONA_MICD_CLAMP_CONTROL, - ARIZONA_MICD_CLAMP_MODE_MASK, clamp_mode); - - regmap_update_bits(arizona->regmap, - ARIZONA_JACK_DETECT_DEBOUNCE, - ARIZONA_MICD_CLAMP_DB, - ARIZONA_MICD_CLAMP_DB); - } + if (info->micd_clamp) + arizona_extcon_set_micd_clamp_mode(arizona); arizona_extcon_set_mode(info, 0); From b81689f373729a51b5a158afafc73e4671a90c20 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Wed, 29 Oct 2014 17:32:35 +0000 Subject: [PATCH 0497/1167] switch: arizona: Ignore jd_invert for MICD_CLAMP_STS The output of MICD_CLAMP_STS is not programmable Change-Id: Ibc4aad3b912f1c01655ee2f0edc22c8366e89974 Signed-off-by: Nariman Poushin --- drivers/switch/switch-arizona.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index cfa510791d0..8ec264e4235 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1686,10 +1686,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) if (arizona->pdata.jd_gpio5) { mask = ARIZONA_MICD_CLAMP_STS; - if (arizona->pdata.jd_invert) - present = ARIZONA_MICD_CLAMP_STS; - else - present = 0; + present = 0; } else { mask = ARIZONA_JD1_STS; if (arizona->pdata.jd_invert) From d57d5aef0d85670d585c3576efc727d63c5bcd81 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Thu, 30 Oct 2014 10:09:00 +0000 Subject: [PATCH 0498/1167] switch: arizona: Refactor setting up the micd_clamp In preparation for support of the wm8285. Change-Id: Ice2a968fa1df9e3e3290512a89cb247d3e6f32bd Signed-off-by: Nariman Poushin Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 68 +++++++++++++++++---------------- 1 file changed, 36 insertions(+), 32 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 8ec264e4235..b970431bf74 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -2003,13 +2003,45 @@ static int arizona_hpdet_d_read_calibration(struct arizona_extcon_info *info) return 0; } +static void arizona_extcon_set_micd_clamp_mode(struct arizona *arizona) +{ + unsigned int val, clamp_mode; + + if (arizona->pdata.jd_gpio5) { + /* Put the GPIO into input mode with optional pull */ + val = 0xc101; + if (arizona->pdata.jd_gpio5_nopull) + val &= ~ARIZONA_GPN_PU; + + regmap_write(arizona->regmap, ARIZONA_GPIO5_CTRL, + val); + + if (arizona->pdata.jd_invert) + clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDH_GP5H; + else + clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDL_GP5H; + } else { + if (arizona->pdata.jd_invert) + clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDH; + else + clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDL; + } + + regmap_update_bits(arizona->regmap, + ARIZONA_MICD_CLAMP_CONTROL, + ARIZONA_MICD_CLAMP_MODE_MASK, clamp_mode); + + regmap_update_bits(arizona->regmap, + ARIZONA_JACK_DETECT_DEBOUNCE, + ARIZONA_MICD_CLAMP_DB, + ARIZONA_MICD_CLAMP_DB); +} + static int arizona_extcon_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); struct arizona_pdata *pdata = &arizona->pdata; struct arizona_extcon_info *info; - unsigned int val; - unsigned int clamp_mode; int jack_irq_fall, jack_irq_rise; int ret, mode, i, j; @@ -2231,36 +2263,8 @@ static int arizona_extcon_probe(struct platform_device *pdev) * If we have a clamp use it, activating in conjunction with * GPIO5 if that is connected for jack detect operation. */ - if (info->micd_clamp) { - if (arizona->pdata.jd_gpio5) { - /* Put the GPIO into input mode with optional pull */ - val = 0xc101; - if (arizona->pdata.jd_gpio5_nopull) - val &= ~ARIZONA_GPN_PU; - - regmap_write(arizona->regmap, ARIZONA_GPIO5_CTRL, - val); - - if (arizona->pdata.jd_invert) - clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDH_GP5H; - else - clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDL_GP5H; - } else { - if (arizona->pdata.jd_invert) - clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDH; - else - clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDL; - } - - regmap_update_bits(arizona->regmap, - ARIZONA_MICD_CLAMP_CONTROL, - ARIZONA_MICD_CLAMP_MODE_MASK, clamp_mode); - - regmap_update_bits(arizona->regmap, - ARIZONA_JACK_DETECT_DEBOUNCE, - ARIZONA_MICD_CLAMP_DB, - ARIZONA_MICD_CLAMP_DB); - } + if (info->micd_clamp) + arizona_extcon_set_micd_clamp_mode(arizona); arizona_extcon_set_mode(info, 0); From 9d9caaa020d962d00636082eab0610d62cc6bb73 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Wed, 9 Jul 2014 17:57:20 +0100 Subject: [PATCH 0499/1167] mfd: arizona: Initial support for WM8285/WM1840 The WM8285 is a highly-integrated low-power audio and sensor hub system for smartphones, tablets and other portable audio devices. Change-Id: Iec57dbbfc3d5b6e0bb367f4f55e32d36d6658363 Signed-off-by: Nariman Poushin Signed-off-by: Charles Keepax --- drivers/mfd/Kconfig | 6 + drivers/mfd/Makefile | 3 + drivers/mfd/arizona-core.c | 123 +- drivers/mfd/arizona-i2c.c | 22 + drivers/mfd/arizona-irq.c | 60 +- drivers/mfd/arizona-spi.c | 22 + drivers/mfd/arizona.h | 7 + drivers/mfd/wm8285-tables.c | 2870 +++++++++++++++++++++ include/linux/mfd/arizona/core.h | 9 +- include/linux/mfd/arizona/pdata.h | 9 +- include/linux/mfd/arizona/registers.h | 3440 ++++++++++++++++++++++++- 11 files changed, 6528 insertions(+), 43 deletions(-) create mode 100644 drivers/mfd/wm8285-tables.c diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index fb0e3e53987..31e6e80574c 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1056,6 +1056,12 @@ config MFD_WM8997 help Support for Wolfson Microelectronics WM8997 low power audio SoC +config MFD_WM8285 + bool "Wolfson Microelectronics WM8285" + depends on MFD_ARIZONA + help + Support for Wolfson Microelectronics WM8285 low power audio SoC + config MFD_CS47L24 bool "Cirrus Logic CS47L24" depends on MFD_ARIZONA diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index bf6322d034e..021d5d2bddd 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -49,6 +49,9 @@ endif ifneq ($(CONFIG_MFD_WM8998),n) obj-$(CONFIG_MFD_ARIZONA) += wm8998-tables.o endif +ifneq ($(CONFIG_MFD_WM8285),n) +obj-$(CONFIG_MFD_ARIZONA) += wm8285-tables.o +endif ifneq ($(CONFIG_MFD_CS47L24),n) obj-$(CONFIG_MFD_ARIZONA) += cs47l24-tables.o endif diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 7564cdad996..967ad433168 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -342,12 +342,34 @@ static int arizona_wait_for_boot(struct arizona *arizona) * we won't race with the interrupt handler as it'll be blocked on * runtime resume. */ - ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5, - ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS); + switch (arizona->type) { + case WM5102: + case WM8997: + case WM1814: + case WM8998: + case WM5110: + case WM8280: + case WM1831: + case CS47L24: + ret = arizona_poll_reg(arizona, 5, + ARIZONA_INTERRUPT_RAW_STATUS_5, + ARIZONA_BOOT_DONE_STS, + ARIZONA_BOOT_DONE_STS); + if (!ret) + regmap_write(arizona->regmap, + ARIZONA_INTERRUPT_STATUS_5, + ARIZONA_BOOT_DONE_STS); + break; + default: + ret = arizona_poll_reg(arizona, 5, WM8285_IRQ1_RAW_STATUS_1, + WM8285_BOOT_DONE_STS1, + WM8285_BOOT_DONE_STS1); - if (!ret) - regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5, - ARIZONA_BOOT_DONE_STS); + if (!ret) + regmap_write(arizona->regmap, WM8285_IRQ1_STATUS_1, + WM8285_BOOT_DONE_EINT1); + break; + } pm_runtime_mark_last_busy(arizona->dev); @@ -834,13 +856,19 @@ static int arizona_of_get_gpio_defaults(struct arizona *arizona, const char *prop) { struct arizona_pdata *pdata = &arizona->pdata; - int i, ret; + struct device_node *np = arizona->dev->of_node; + struct property *tempprop; + const __be32 *cur; + u32 val; + int i; - ret = arizona_of_read_u32_array(arizona, prop, false, - pdata->gpio_defaults, - ARRAY_SIZE(pdata->gpio_defaults)); - if (ret < 0) - return ret; + i = 0; + of_property_for_each_u32(np, prop, tempprop, cur, val) { + if (i == ARRAY_SIZE(pdata->gpio_defaults)) + break; + + pdata->gpio_defaults[i++] = val; + } /* * All values are literal except out of range values @@ -855,7 +883,7 @@ static int arizona_of_get_gpio_defaults(struct arizona *arizona, pdata->gpio_defaults[i] = 0x10000; } - return ret; + return 0; } static int arizona_of_get_u32_num_groups(struct arizona *arizona, @@ -1008,6 +1036,7 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) arizona_of_get_micbias(arizona, "wlf,micbias1", 0); arizona_of_get_micbias(arizona, "wlf,micbias2", 1); arizona_of_get_micbias(arizona, "wlf,micbias3", 2); + arizona_of_get_micbias(arizona, "wlf,micbias4", 3); arizona_of_get_gpio_defaults(arizona, "wlf,gpio-defaults"); @@ -1042,6 +1071,8 @@ const struct of_device_id arizona_of_match[] = { { .compatible = "wlf,wm8997", .data = (void *)WM8997 }, { .compatible = "wlf,wm8998", .data = (void *)WM8998 }, { .compatible = "wlf,wm1814", .data = (void *)WM1814 }, + { .compatible = "wlf,wm8285", .data = (void *)WM8285 }, + { .compatible = "wlf,wm1840", .data = (void *)WM1840 }, { .compatible = "wlf,wm1831", .data = (void *)WM1831 }, { .compatible = "cirrus,cs47l24", .data = (void *)CS47L24 }, {}, @@ -1101,6 +1132,15 @@ static struct mfd_cell wm8998_devs[] = { { .name = "wm8998-codec" }, }; +static struct mfd_cell wm8285_devs[] = { + { .name = "arizona-micsupp" }, + { .name = "arizona-extcon" }, + { .name = "arizona-gpio" }, + { .name = "arizona-haptics" }, + { .name = "arizona-pwm" }, + { .name = "wm8285-codec" }, +}; + static const struct { unsigned int enable; unsigned int conf_reg; @@ -1261,6 +1301,8 @@ int arizona_dev_init(struct arizona *arizona) case WM8997: case WM8998: case WM1814: + case WM8285: + case WM1840: case WM1831: case CS47L24: for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) @@ -1366,6 +1408,7 @@ int arizona_dev_init(struct arizona *arizona) case 0x6349: case 0x6363: case 0x8997: + case 0x6338: break; default: dev_err(arizona->dev, "Unknown device ID: %x\n", reg); @@ -1523,6 +1566,27 @@ int arizona_dev_init(struct arizona *arizona) apply_patch = wm8998_patch; revision_char = arizona->rev + 'A'; break; +#endif +#ifdef CONFIG_MFD_WM8285 + case 0x6338: + switch (arizona->type) { + case WM8285: + type_name = "WM8285"; + break; + + case WM1840: + type_name = "WM1840"; + break; + + default: + dev_err(arizona->dev, + "Unknown Clearwater codec registered as WM8285\n"); + arizona->type = WM8285; + } + + revision_char = arizona->rev + 'A'; + apply_patch = wm8285_patch; + break; #endif default: dev_err(arizona->dev, "Unknown device ID %x\n", reg); @@ -1564,12 +1628,32 @@ int arizona_dev_init(struct arizona *arizona) } } - for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { - if (!arizona->pdata.gpio_defaults[i]) - continue; + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8280: + case WM8997: + case WM8998: + case WM1814: + case WM1831: + case CS47L24: + for (i = 0; i < ARIZONA_MAX_GPIO_REGS; i++) { + if (!arizona->pdata.gpio_defaults[i]) + continue; - regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i, - arizona->pdata.gpio_defaults[i]); + regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i, + arizona->pdata.gpio_defaults[i]); + } + break; + default: + for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { + if (!arizona->pdata.gpio_defaults[i]) + continue; + + regmap_write(arizona->regmap, WM8285_GPIO1_CTRL_1 + i, + arizona->pdata.gpio_defaults[i]); + } + break; } pm_runtime_set_autosuspend_delay(arizona->dev, 100); @@ -1741,6 +1825,11 @@ int arizona_dev_init(struct arizona *arizona) ret = mfd_add_devices(arizona->dev, -1, wm8998_devs, ARRAY_SIZE(wm8998_devs), NULL, 0, NULL); break; + case WM8285: + case WM1840: + ret = mfd_add_devices(arizona->dev, -1, wm8285_devs, + ARRAY_SIZE(wm8285_devs), NULL, 0, NULL); + break; } if (ret != 0) { diff --git a/drivers/mfd/arizona-i2c.c b/drivers/mfd/arizona-i2c.c index 3346c0c0a65..cd93352458e 100644 --- a/drivers/mfd/arizona-i2c.c +++ b/drivers/mfd/arizona-i2c.c @@ -27,6 +27,7 @@ static int arizona_i2c_probe(struct i2c_client *i2c, { struct arizona *arizona; const struct regmap_config *regmap_config; + const struct regmap_config *regmap_32bit_config = NULL; unsigned long type; int ret; @@ -57,6 +58,13 @@ static int arizona_i2c_probe(struct i2c_client *i2c, case WM1814: regmap_config = &wm8998_i2c_regmap; break; +#endif +#ifdef CONFIG_MFD_WM8285 + case WM8285: + case WM1840: + regmap_config = &wm8285_16bit_i2c_regmap; + regmap_32bit_config = &wm8285_32bit_i2c_regmap; + break; #endif default: dev_err(&i2c->dev, "Unknown device type %ld\n", @@ -76,6 +84,18 @@ static int arizona_i2c_probe(struct i2c_client *i2c, return ret; } + if (regmap_32bit_config) { + arizona->regmap_32bit = devm_regmap_init_i2c(i2c, + regmap_32bit_config); + if (IS_ERR(arizona->regmap_32bit)) { + ret = PTR_ERR(arizona->regmap_32bit); + dev_err(&i2c->dev, + "Failed to allocate dsp register map: %d\n", + ret); + return ret; + } + } + arizona->type = id->driver_data; arizona->dev = &i2c->dev; arizona->irq = i2c->irq; @@ -98,6 +118,8 @@ static const struct i2c_device_id arizona_i2c_id[] = { { "wm8997", WM8997 }, { "wm8998", WM8998 }, { "wm1814", WM1814 }, + { "wm8285", WM8285 }, + { "wm1840", WM1840 }, { } }; MODULE_DEVICE_TABLE(i2c, arizona_i2c_id); diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index 5d35c8d9e03..ecdf7a88d4d 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -36,7 +36,11 @@ static int arizona_map_irq(struct arizona *arizona, int irq) if (ret >= 0) return ret; } - return regmap_irq_get_virq(arizona->irq_chip, irq); + + if (arizona->irq_chip) + return regmap_irq_get_virq(arizona->irq_chip, irq); + + return 0; } int arizona_request_irq(struct arizona *arizona, int irq, char *name, @@ -97,7 +101,7 @@ static irqreturn_t arizona_irq_thread(int irq, void *data) { struct arizona *arizona = data; bool poll; - unsigned int val; + unsigned int val, nest_irq; int ret; ret = pm_runtime_get_sync(arizona->dev); @@ -112,17 +116,22 @@ static irqreturn_t arizona_irq_thread(int irq, void *data) if (arizona->aod_irq_chip) handle_nested_irq(irq_find_mapping(arizona->virq, 0)); - /* - * Check if one of the main interrupts is asserted and only - * check that domain if it is. - */ - ret = regmap_read(arizona->regmap, ARIZONA_IRQ_PIN_STATUS, - &val); - if (ret == 0 && val & ARIZONA_IRQ1_STS) { - handle_nested_irq(irq_find_mapping(arizona->virq, 1)); - } else if (ret != 0) { - dev_err(arizona->dev, - "Failed to read main IRQ status: %d\n", ret); + if (arizona->irq_chip) { + /* + * Check if one of the main interrupts is asserted and + * only check that domain if it is. + */ + ret = regmap_read(arizona->regmap, + ARIZONA_IRQ_PIN_STATUS, + &val); + if (ret == 0 && val & ARIZONA_IRQ1_STS) { + nest_irq = irq_find_mapping(arizona->virq, 1); + handle_nested_irq(nest_irq); + } else if (ret != 0) { + dev_err(arizona->dev, + "Failed to read main IRQ status: %d\n", + ret); + } } /* @@ -218,6 +227,15 @@ int arizona_irq_init(struct arizona *arizona) ctrlif_error = false; break; #endif +#ifdef CONFIG_MFD_WM8285 + case WM8285: + case WM1840: + aod = &wm8285_irq; + irq = NULL; + + ctrlif_error = false; + break; +#endif #ifdef CONFIG_MFD_CS47L24 case WM1831: case CS47L24: @@ -311,13 +329,15 @@ int arizona_irq_init(struct arizona *arizona) } } - ret = regmap_add_irq_chip(arizona->regmap, - irq_create_mapping(arizona->virq, 1), - IRQF_ONESHOT, -1, irq, - &arizona->irq_chip); - if (ret != 0) { - dev_err(arizona->dev, "Failed to add main IRQs: %d\n", ret); - goto err_aod; + if (irq) { + ret = regmap_add_irq_chip(arizona->regmap, + irq_create_mapping(arizona->virq, 1), + IRQF_ONESHOT, -1, irq, + &arizona->irq_chip); + if (ret != 0) { + dev_err(arizona->dev, "Failed to add main IRQs: %d\n", ret); + goto err_aod; + } } /* Make sure the boot done IRQ is unmasked for resumes */ diff --git a/drivers/mfd/arizona-spi.c b/drivers/mfd/arizona-spi.c index bad75e0de01..d0b2740a054 100644 --- a/drivers/mfd/arizona-spi.c +++ b/drivers/mfd/arizona-spi.c @@ -28,6 +28,7 @@ static int arizona_spi_probe(struct spi_device *spi) const struct spi_device_id *id = spi_get_device_id(spi); struct arizona *arizona; const struct regmap_config *regmap_config; + const struct regmap_config *regmap_32bit_config = NULL; unsigned long type; int ret; @@ -48,6 +49,13 @@ static int arizona_spi_probe(struct spi_device *spi) regmap_config = &florida_spi_regmap; break; #endif +#ifdef CONFIG_MFD_WM8285 + case WM8285: + case WM1840: + regmap_config = &wm8285_16bit_spi_regmap; + regmap_32bit_config = &wm8285_32bit_spi_regmap; + break; +#endif #ifdef CONFIG_MFD_CS47L24 case WM1831: case CS47L24: @@ -72,6 +80,18 @@ static int arizona_spi_probe(struct spi_device *spi) return ret; } + if (regmap_32bit_config) { + arizona->regmap_32bit = devm_regmap_init_spi(spi, + regmap_32bit_config); + if (IS_ERR(arizona->regmap_32bit)) { + ret = PTR_ERR(arizona->regmap_32bit); + dev_err(&spi->dev, + "Failed to allocate dsp register map: %d\n", + ret); + return ret; + } + } + arizona->type = id->driver_data; arizona->dev = &spi->dev; arizona->irq = spi->irq; @@ -91,6 +111,8 @@ static const struct spi_device_id arizona_spi_ids[] = { { "wm8280", WM8280 }, { "wm8281", WM8280 }, { "wm5110", WM5110 }, + { "wm8285", WM8285 }, + { "wm1840", WM1840 }, { "wm1831", WM1831 }, { "cs47l24", CS47L24 }, { }, diff --git a/drivers/mfd/arizona.h b/drivers/mfd/arizona.h index 5ff910658a5..6efbc3acd6b 100644 --- a/drivers/mfd/arizona.h +++ b/drivers/mfd/arizona.h @@ -26,6 +26,11 @@ extern const struct regmap_config wm5102_spi_regmap; extern const struct regmap_config florida_i2c_regmap; extern const struct regmap_config florida_spi_regmap; +extern const struct regmap_config wm8285_16bit_i2c_regmap; +extern const struct regmap_config wm8285_16bit_spi_regmap; +extern const struct regmap_config wm8285_32bit_spi_regmap; +extern const struct regmap_config wm8285_32bit_i2c_regmap; + extern const struct regmap_config wm8997_i2c_regmap; extern const struct regmap_config wm8998_i2c_regmap; @@ -43,6 +48,8 @@ extern const struct regmap_irq_chip florida_aod; extern const struct regmap_irq_chip florida_irq; extern const struct regmap_irq_chip florida_revd_irq; +extern const struct regmap_irq_chip wm8285_irq; + extern const struct regmap_irq_chip wm8997_aod; extern const struct regmap_irq_chip wm8997_irq; diff --git a/drivers/mfd/wm8285-tables.c b/drivers/mfd/wm8285-tables.c new file mode 100644 index 00000000000..fa52ae4611f --- /dev/null +++ b/drivers/mfd/wm8285-tables.c @@ -0,0 +1,2870 @@ +/* + * wm8285-tables.c -- data tables for WM8285 class codecs + * + * Copyright 2014 Wolfson Microelectronics plc + * + * Author: Nariman Poushin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include + +#include +#include +#include + +#include "arizona.h" + +static const struct reg_default wm8285_reva_patch[] = { + { 0x80, 0x0003 }, + { 0x213, 0x03E4 }, + { 0x177, 0x0281 }, + { 0x197, 0x0281 }, + { 0x1B7, 0x0281 }, + { 0x4B1, 0x010A }, + { 0x4CF, 0x0933 }, + { 0x36C, 0x011B }, + { 0x4B8, 0x1120 }, + { 0x4A0, 0x3280 }, + { 0x4A1, 0x3200 }, + { 0x4A2, 0x3200 }, + { 0x441, 0xC050 }, + { 0x4A4, 0x000B }, + { 0x4A5, 0x000B }, + { 0x4A6, 0x000B }, + { 0x4E2, 0x1E1D }, + { 0x4E3, 0x1E1D }, + { 0x4E4, 0x1E1D }, + { 0x293, 0x0080 }, + { 0x17D, 0x0303 }, + { 0x19D, 0x0303 }, + { 0x80, 0x0000 }, + { 0x80, 0x0000 }, +}; + +/* We use a function so we can use ARRAY_SIZE() */ +int wm8285_patch(struct arizona *arizona) +{ + switch (arizona->rev) { + default: + return regmap_register_patch(arizona->regmap, + wm8285_reva_patch, + ARRAY_SIZE(wm8285_reva_patch)); + } + + return 0; +} +EXPORT_SYMBOL_GPL(wm8285_patch); + +static const struct regmap_irq wm8285_irqs[ARIZONA_NUM_IRQ] = { + [ARIZONA_IRQ_BOOT_DONE] = { .reg_offset = 0, + .mask = WM8285_BOOT_DONE_EINT1 }, + [ARIZONA_IRQ_CTRLIF_ERR] = { .reg_offset = 0, + .mask = WM8285_CTRLIF_ERR_EINT1 }, + + [ARIZONA_IRQ_FLL1_CLOCK_OK] = { .reg_offset = 1, + .mask = WM8285_FLL1_LOCK_EINT1 }, + [ARIZONA_IRQ_FLL2_CLOCK_OK] = { .reg_offset = 1, + .mask = WM8285_FLL2_LOCK_EINT1}, + [ARIZONA_IRQ_FLL3_CLOCK_OK] = { .reg_offset = 1, + .mask = WM8285_FLL3_LOCK_EINT1}, + + [ARIZONA_IRQ_MICDET] = { .reg_offset = 5, + .mask = WM8285_MICDET_EINT1 }, + [ARIZONA_IRQ_HPDET] = { .reg_offset = 5, + .mask = WM8285_HPDET_EINT1}, + + [ARIZONA_IRQ_MICD_CLAMP_RISE] = { .reg_offset = 6, + .mask = WM8285_MICD_CLAMP_RISE_EINT1 }, + [ARIZONA_IRQ_MICD_CLAMP_FALL] = { .reg_offset = 6, + .mask = WM8285_MICD_CLAMP_FALL_EINT1 }, + [ARIZONA_IRQ_JD_FALL] = { .reg_offset = 6, + .mask = WM8285_JD1_FALL_EINT1 }, + [ARIZONA_IRQ_JD_RISE] = { .reg_offset = 6, + .mask = WM8285_JD1_RISE_EINT1 }, + + [ARIZONA_IRQ_ASRC2_LOCK] = { .reg_offset = 8, + .mask = WM8285_ASRC2_IN1_LOCK_EINT1 }, + [ARIZONA_IRQ_ASRC1_LOCK] = { .reg_offset = 8, + .mask = WM8285_ASRC1_IN1_LOCK_EINT1 }, + [ARIZONA_IRQ_DRC2_SIG_DET] = { .reg_offset = 8, + .mask = WM8285_DRC2_SIG_DET_EINT1 }, + [ARIZONA_IRQ_DRC1_SIG_DET] = { .reg_offset = 8, + .mask = WM8285_DRC1_SIG_DET_EINT1 }, + + [ARIZONA_IRQ_DSP_IRQ1] = { .reg_offset = 10, + .mask = WM8285_DSP_IRQ1_EINT1}, + [ARIZONA_IRQ_DSP_IRQ2] = { .reg_offset = 10, + .mask = WM8285_DSP_IRQ2_EINT1}, + [ARIZONA_IRQ_DSP_IRQ3] = { .reg_offset = 10, + .mask = WM8285_DSP_IRQ3_EINT1}, + [ARIZONA_IRQ_DSP_IRQ4] = { .reg_offset = 10, + .mask = WM8285_DSP_IRQ4_EINT1}, + [ARIZONA_IRQ_DSP_IRQ5] = { .reg_offset = 10, + .mask = WM8285_DSP_IRQ5_EINT1}, + [ARIZONA_IRQ_DSP_IRQ6] = { .reg_offset = 10, + .mask = WM8285_DSP_IRQ6_EINT1}, + [ARIZONA_IRQ_DSP_IRQ7] = { .reg_offset = 10, + .mask = WM8285_DSP_IRQ7_EINT1}, + [ARIZONA_IRQ_DSP_IRQ8] = { .reg_offset = 10, + .mask = WM8285_DSP_IRQ8_EINT1}, + + [ARIZONA_IRQ_SPK_OVERHEAT_WARN] = { .reg_offset = 14, + .mask = WM8285_SPK_OVERHEAT_WARN_EINT1}, + [ARIZONA_IRQ_SPK_OVERHEAT] = { .reg_offset = 14, + .mask = WM8285_SPK_SHUTDOWN_EINT1}, +}; + +const struct regmap_irq_chip wm8285_irq = { + .name = "wm8285 IRQ", + .status_base = WM8285_IRQ1_STATUS_1, + .mask_base = WM8285_IRQ1_MASK_1, + .ack_base = WM8285_IRQ1_STATUS_1, + .num_regs = 15, + .irqs = wm8285_irqs, + .num_irqs = ARRAY_SIZE(wm8285_irqs), +}; +EXPORT_SYMBOL_GPL(wm8285_irq); + +static const struct reg_default wm8285_reg_default[] = { + { 0x00000008, 0x0009 }, /* R8 (0x08) - Ctrl IF SPI CFG 1 */ + { 0x00000009, 0x0001 }, /* R9 (0x09) - Ctrl IF I2C1 CFG 1 */ + { 0x0000000a, 0x0009 }, + { 0x00000016, 0x0000 }, /* R22 (0x16) - Write Sequencer Ctrl 0 */ + { 0x00000017, 0x0000 }, /* R23 (0x17) - Write Sequencer Ctrl 1 */ + { 0x00000018, 0x0000 }, /* R24 (0x18) - Write Sequencer Ctrl 2 */ + { 0x0000001a, 0x0000 }, /* R26 (0x1A) - Write Sequencer PROM */ + { 0x00000020, 0x0000 }, /* R32 (0x20) - Tone Generator 1 */ + { 0x00000021, 0x1000 }, /* R33 (0x21) - Tone Generator 2 */ + { 0x00000022, 0x0000 }, /* R34 (0x22) - Tone Generator 3 */ + { 0x00000023, 0x1000 }, /* R35 (0x23) - Tone Generator 4 */ + { 0x00000024, 0x0000 }, /* R36 (0x24) - Tone Generator 5 */ + { 0x00000030, 0x0000 }, /* R48 (0x30) - PWM Drive 1 */ + { 0x00000031, 0x0100 }, /* R49 (0x31) - PWM Drive 2 */ + { 0x00000032, 0x0100 }, /* R50 (0x32) - PWM Drive 3 */ + { 0x00000041, 0x0000 }, /* R65 (0x41) - Sequence control */ + { 0x00000061, 0x01ff }, /* R97 (0x61) - Sample Rate Sequence Select 1 */ + { 0x00000062, 0x01ff }, /* R98 (0x62) - Sample Rate Sequence Select 2 */ + { 0x00000063, 0x01ff }, /* R99 (0x63) - Sample Rate Sequence Select 3 */ + { 0x00000064, 0x01ff }, /* R100 (0x64) - Sample Rate Sequence Select 4 */ + { 0x00000066, 0x01ff }, + { 0x00000067, 0x01ff }, + { 0x00000068, 0x01ff }, /* R104 (0x68) - Always On Triggers Sequence Select 1 */ + { 0x00000069, 0x01ff }, /* R105 (0x69) - Always On Triggers Sequence Select 2 */ + { 0x0000006a, 0x01ff }, /* R106 (0x6A) - Always On Triggers Sequence Select 3 */ + { 0x0000006b, 0x01ff }, /* R107 (0x6B) - Always On Triggers Sequence Select 4 */ + { 0x00000090, 0x0000 }, /* R144 (0x90) - Haptics Control 1 */ + { 0x00000091, 0x7fff }, /* R145 (0x91) - Haptics Control 2 */ + { 0x00000092, 0x0000 }, /* R146 (0x92) - Haptics phase 1 intensity */ + { 0x00000093, 0x0000 }, /* R147 (0x93) - Haptics phase 1 duration */ + { 0x00000094, 0x0000 }, /* R148 (0x94) - Haptics phase 2 intensity */ + { 0x00000095, 0x0000 }, /* R149 (0x95) - Haptics phase 2 duration */ + { 0x00000096, 0x0000 }, /* R150 (0x96) - Haptics phase 3 intensity */ + { 0x00000097, 0x0000 }, /* R151 (0x97) - Haptics phase 3 duration */ + { 0x00000100, 0x0002 }, /* R256 (0x100) - Clock 32k 1 */ + { 0x00000101, 0x0404 }, /* R257 (0x101) - System Clock 1 */ + { 0x00000102, 0x0011 }, /* R258 (0x102) - Sample rate 1 */ + { 0x00000103, 0x0011 }, /* R259 (0x103) - Sample rate 2 */ + { 0x00000104, 0x0011 }, /* R260 (0x104) - Sample rate 3 */ + { 0x00000112, 0x0305 }, /* R274 (0x112) - Async clock 1 */ + { 0x00000113, 0x0011 }, /* R275 (0x113) - Async sample rate 1 */ + { 0x00000114, 0x0011 }, /* R276 (0x114) - Async sample rate 2 */ + { 0x00000120, 0x0305 }, + { 0x00000122, 0x0000 }, + { 0x00000149, 0x0000 }, /* R329 (0x149) - Output system clock */ + { 0x0000014a, 0x0000 }, /* R330 (0x14A) - Output async clock */ + { 0x00000152, 0x0000 }, /* R338 (0x152) - Rate Estimator 1 */ + { 0x00000153, 0x0000 }, /* R339 (0x153) - Rate Estimator 2 */ + { 0x00000154, 0x0000 }, /* R340 (0x154) - Rate Estimator 3 */ + { 0x00000155, 0x0000 }, /* R341 (0x155) - Rate Estimator 4 */ + { 0x00000156, 0x0000 }, /* R342 (0x156) - Rate Estimator 5 */ + { 0x00000171, 0x0002 }, /* R369 (0x171) - FLL1 Control 1 */ + { 0x00000172, 0x0008 }, /* R370 (0x172) - FLL1 Control 2 */ + { 0x00000173, 0x0018 }, /* R371 (0x173) - FLL1 Control 3 */ + { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */ + { 0x00000175, 0x0006 }, /* R373 (0x175) - FLL1 Control 5 */ + { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */ + { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */ + { 0x00000178, 0x0000 }, + { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */ + { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 1 */ + { 0x00000182, 0x0000 }, /* R386 (0x182) - FLL1 Synchroniser 2 */ + { 0x00000183, 0x0000 }, /* R387 (0x183) - FLL1 Synchroniser 3 */ + { 0x00000184, 0x0000 }, /* R388 (0x184) - FLL1 Synchroniser 4 */ + { 0x00000185, 0x0000 }, /* R389 (0x185) - FLL1 Synchroniser 5 */ + { 0x00000186, 0x0000 }, /* R390 (0x186) - FLL1 Synchroniser 6 */ + { 0x00000187, 0x0001 }, /* R391 (0x187) - FLL1 Synchroniser 7 */ + { 0x00000189, 0x0000 }, /* R393 (0x189) - FLL1 Spread Spectrum */ + { 0x0000018a, 0x000c }, /* R394 (0x18A) - FLL1 GPIO Clock */ + { 0x00000191, 0x0002 }, /* R401 (0x191) - FLL2 Control 1 */ + { 0x00000192, 0x0008 }, /* R402 (0x192) - FLL2 Control 2 */ + { 0x00000193, 0x0018 }, /* R403 (0x193) - FLL2 Control 3 */ + { 0x00000194, 0x007d }, /* R404 (0x194) - FLL2 Control 4 */ + { 0x00000195, 0x0006 }, /* R405 (0x195) - FLL2 Control 5 */ + { 0x00000196, 0x0000 }, /* R406 (0x196) - FLL2 Control 6 */ + { 0x00000197, 0x0281 }, /* R407 (0x197) - FLL2 Loop Filter Test 1 */ + { 0x00000198, 0x0000 }, + { 0x00000199, 0x0000 }, /* R409 (0x199) - FLL2 Control 7 */ + { 0x000001a1, 0x0000 }, /* R417 (0x1A1) - FLL2 Synchroniser 1 */ + { 0x000001a2, 0x0000 }, /* R418 (0x1A2) - FLL2 Synchroniser 2 */ + { 0x000001a3, 0x0000 }, /* R419 (0x1A3) - FLL2 Synchroniser 3 */ + { 0x000001a4, 0x0000 }, /* R420 (0x1A4) - FLL2 Synchroniser 4 */ + { 0x000001a5, 0x0000 }, /* R421 (0x1A5) - FLL2 Synchroniser 5 */ + { 0x000001a6, 0x0000 }, /* R422 (0x1A6) - FLL2 Synchroniser 6 */ + { 0x000001a7, 0x0001 }, /* R423 (0x1A7) - FLL2 Synchroniser 7 */ + { 0x000001a9, 0x0000 }, /* R425 (0x1A9) - FLL2 Spread Spectrum */ + { 0x000001aa, 0x000c }, /* R426 (0x1AA) - FLL2 GPIO Clock */ + { 0x000001B1, 0x0002 }, /* R433 - FLL3 Control 1 */ + { 0x000001B2, 0x0008 }, /* R434 - FLL3 Control 2 */ + { 0x000001B3, 0x0018 }, /* R435 - FLL3 Control 3 */ + { 0x000001B4, 0x007D }, /* R436 - FLL3 Control 4 */ + { 0x000001B5, 0x0006 }, /* R437 - FLL3 Control 5 */ + { 0x000001B6, 0x0000 }, /* R438 - FLL3 Control 6 */ + { 0x000001B7, 0x0281 }, /* R439 - FLL3 Loop Filter Test 1 */ + { 0x000001B8, 0x0000 }, /* R440 - FLL3 NCO Test 0 */ + { 0x000001B9, 0x0000 }, /* R441 - FLL3 Control 7 */ + { 0x000001C1, 0x0000 }, /* R449 - FLL3 Synchroniser 1 */ + { 0x000001C2, 0x0000 }, /* R450 - FLL3 Synchroniser 2 */ + { 0x000001C3, 0x0000 }, /* R451 - FLL3 Synchroniser 3 */ + { 0x000001C4, 0x0000 }, /* R452 - FLL3 Synchroniser 4 */ + { 0x000001C5, 0x0000 }, /* R453 - FLL3 Synchroniser 5 */ + { 0x000001C6, 0x0000 }, /* R454 - FLL3 Synchroniser 6 */ + { 0x000001C7, 0x0001 }, /* R455 - FLL3 Synchroniser 7 */ + { 0x000001C9, 0x0000 }, /* R457 - FLL3 Spread Spectrum */ + { 0x000001CA, 0x000C }, /* R458 - FLL3 GPIO Clock */ + { 0x00000200, 0x0006 }, /* R512 (0x200) - Mic Charge Pump 1 */ + { 0x00000210, 0x0184 }, /* R528 (0x210) - LDO1 Control 1 */ + { 0x00000213, 0x03e4 }, /* R531 (0x213) - LDO2 Control 1 */ + { 0x00000218, 0x00e6 }, /* R536 (0x218) - Mic Bias Ctrl 1 */ + { 0x00000219, 0x00e6 }, /* R537 (0x219) - Mic Bias Ctrl 2 */ + { 0x0000021a, 0x00e6 }, /* R538 (0x21A) - Mic Bias Ctrl 3 */ + { 0x0000021B, 0x00e6 }, /* R539 - Mic Bias Ctrl 4 */ + { 0x00000225, 0x1406 }, + { 0x00000226, 0x1406 }, + { 0x00000227, 0x1406 }, + { 0x00000228, 0x1406 }, + { 0x00000229, 0x1406 }, + { 0x0000022a, 0x1406 }, + { 0x00000293, 0x0000 }, /* R659 (0x293) - Accessory Detect Mode 1 */ + { 0x0000029b, 0x0000 }, /* R667 (0x29B) - Headphone Detect 1 */ + { 0x0000029f, 0x0000 }, + { 0x000002a3, 0x1102 }, /* R675 (0x2A3) - Mic Detect 1 */ + { 0x000002a4, 0x009f }, /* R676 (0x2A4) - Mic Detect 2 */ + { 0x000002a6, 0x3737 }, + { 0x000002a7, 0x2c37 }, + { 0x000002a8, 0x1422 }, + { 0x000002a9, 0x030a }, + { 0x000002c3, 0x0000 }, /* R707 (0x2C3) - Mic noise mix control 1 */ + { 0x000002c6, 0x0010 }, + { 0x000002c8, 0x0000 }, /* R712 (0x2C8) - GP switch 1 */ + { 0x000002d3, 0x0000 }, /* R723 (0x2D3) - Jack detect analogue */ + { 0x00000308, 0x0000 }, /* R776 (0x308) - Input Rate */ + { 0x00000309, 0x0022 }, /* R777 (0x309) - Input Volume Ramp */ + { 0x0000030c, 0x0002 }, /* R780 (0x30C) - HPF Control */ + { 0x00000310, 0x0080 }, /* R784 (0x310) - IN1L Control */ + { 0x00000311, 0x0180 }, /* R785 (0x311) - ADC Digital Volume 1L */ + { 0x00000312, 0x0500 }, /* R786 (0x312) - DMIC1L Control */ + { 0x00000314, 0x0080 }, /* R788 (0x314) - IN1R Control */ + { 0x00000315, 0x0180 }, /* R789 (0x315) - ADC Digital Volume 1R */ + { 0x00000316, 0x0000 }, /* R790 (0x316) - DMIC1R Control */ + { 0x00000318, 0x0080 }, /* R792 (0x318) - IN2L Control */ + { 0x00000319, 0x0180 }, /* R793 (0x319) - ADC Digital Volume 2L */ + { 0x0000031a, 0x0500 }, /* R794 (0x31A) - DMIC2L Control */ + { 0x0000031c, 0x0080 }, /* R796 (0x31C) - IN2R Control */ + { 0x0000031d, 0x0180 }, /* R797 (0x31D) - ADC Digital Volume 2R */ + { 0x0000031e, 0x0000 }, /* R798 (0x31E) - DMIC2R Control */ + { 0x00000320, 0x0080 }, /* R800 (0x320) - IN3L Control */ + { 0x00000321, 0x0180 }, /* R801 (0x321) - ADC Digital Volume 3L */ + { 0x00000322, 0x0500 }, /* R802 (0x322) - DMIC3L Control */ + { 0x00000324, 0x0080 }, /* R804 (0x324) - IN3R Control */ + { 0x00000325, 0x0180 }, /* R805 (0x325) - ADC Digital Volume 3R */ + { 0x00000326, 0x0000 }, /* R806 (0x326) - DMIC3R Control */ + { 0x00000328, 0x0000 }, /* R808 (0x328) - IN4 Control */ + { 0x00000329, 0x0180 }, /* R809 (0x329) - ADC Digital Volume 4L */ + { 0x0000032a, 0x0500 }, /* R810 (0x32A) - DMIC4L Control */ + { 0x0000032c, 0x0000 }, /* R812 (0x32C) - IN4R Control */ + { 0x0000032d, 0x0180 }, /* R813 (0x32D) - ADC Digital Volume 4R */ + { 0x0000032e, 0x0000 }, /* R814 (0x32E) - DMIC4R Control */ + { 0x00000330, 0x0000 }, /* R816 - IN5L Control */ + { 0x00000331, 0x0180 }, /* R817 - ADC Digital Volume 5L */ + { 0x00000332, 0x0500 }, /* R818 - DMIC5L Control */ + { 0x00000334, 0x0000 }, /* R820 - IN5R Control */ + { 0x00000335, 0x0180 }, /* R821 - ADC Digital Volume 5R */ + { 0x00000336, 0x0000 }, /* R822 - DMIC5R Control */ + { 0x00000338, 0x0000 }, /* R824 - IN6L Control */ + { 0x00000339, 0x0180 }, /* R825 - ADC Digital Volume 6L */ + { 0x0000033A, 0x0500 }, /* R826 - DMIC6L Control */ + { 0x0000033C, 0x0000 }, /* R828 - IN6R Control */ + { 0x0000033D, 0x0180 }, /* R829 - ADC Digital Volume 6R */ + { 0x0000033E, 0x0000 }, /* R830 - DMIC6R Control */ + { 0x00000400, 0x0000 }, /* R1024 (0x400) - Output Enables 1 */ + { 0x00000408, 0x0000 }, /* R1032 (0x408) - Output Rate 1 */ + { 0x00000409, 0x0022 }, /* R1033 (0x409) - Output Volume Ramp */ + { 0x00000410, 0x0080 }, /* R1040 (0x410) - Output Path Config 1L */ + { 0x00000411, 0x0180 }, /* R1041 (0x411) - DAC Digital Volume 1L */ + { 0x00000413, 0x0001 }, /* R1043 (0x413) - Noise Gate Select 1L */ + { 0x00000414, 0x0080 }, /* R1044 (0x414) - Output Path Config 1R */ + { 0x00000415, 0x0180 }, /* R1045 (0x415) - DAC Digital Volume 1R */ + { 0x00000417, 0x0002 }, /* R1047 (0x417) - Noise Gate Select 1R */ + { 0x00000418, 0x0080 }, /* R1048 (0x418) - Output Path Config 2L */ + { 0x00000419, 0x0180 }, /* R1049 (0x419) - DAC Digital Volume 2L */ + { 0x0000041b, 0x0004 }, /* R1051 (0x41B) - Noise Gate Select 2L */ + { 0x0000041c, 0x0080 }, /* R1052 (0x41C) - Output Path Config 2R */ + { 0x0000041d, 0x0180 }, /* R1053 (0x41D) - DAC Digital Volume 2R */ + { 0x0000041f, 0x0008 }, /* R1055 (0x41F) - Noise Gate Select 2R */ + { 0x00000420, 0x0080 }, /* R1056 (0x420) - Output Path Config 3L */ + { 0x00000421, 0x0180 }, /* R1057 (0x421) - DAC Digital Volume 3L */ + { 0x00000423, 0x0010 }, /* R1059 (0x423) - Noise Gate Select 3L */ + { 0x00000424, 0x0080 }, /* R1060 (0x424) - Output Path Config 3R */ + { 0x00000425, 0x0180 }, /* R1061 (0x425) - DAC Digital Volume 3R */ + { 0x00000427, 0x0020 }, + { 0x00000428, 0x0000 }, /* R1064 (0x428) - Output Path Config 4L */ + { 0x00000429, 0x0180 }, /* R1065 (0x429) - DAC Digital Volume 4L */ + { 0x0000042b, 0x0040 }, /* R1067 (0x42B) - Noise Gate Select 4L */ + { 0x0000042c, 0x0000 }, /* R1068 (0x42C) - Output Path Config 4R */ + { 0x0000042d, 0x0180 }, /* R1069 (0x42D) - DAC Digital Volume 4R */ + { 0x0000042f, 0x0080 }, /* R1071 (0x42F) - Noise Gate Select 4R */ + { 0x00000430, 0x0000 }, /* R1072 (0x430) - Output Path Config 5L */ + { 0x00000431, 0x0180 }, /* R1073 (0x431) - DAC Digital Volume 5L */ + { 0x00000433, 0x0100 }, /* R1075 (0x433) - Noise Gate Select 5L */ + { 0x00000434, 0x0000 }, /* R1076 (0x434) - Output Path Config 5R */ + { 0x00000435, 0x0180 }, /* R1077 (0x435) - DAC Digital Volume 5R */ + { 0x00000437, 0x0200 }, /* R1079 (0x437) - Noise Gate Select 5R */ + { 0x00000438, 0x0000 }, /* R1080 (0x438) - Output Path Config 6L */ + { 0x00000439, 0x0180 }, /* R1081 (0x439) - DAC Digital Volume 6L */ + { 0x0000043b, 0x0400 }, /* R1083 (0x43B) - Noise Gate Select 6L */ + { 0x0000043c, 0x0000 }, /* R1084 (0x43C) - Output Path Config 6R */ + { 0x0000043d, 0x0180 }, /* R1085 (0x43D) - DAC Digital Volume 6R */ + { 0x0000043f, 0x0800 }, /* R1087 (0x43F) - Noise Gate Select 6R */ + { 0x00000440, 0x003f }, /* R1088 (0x440) - DRE Enable */ + { 0x00000441, 0xC050 }, /* R1089 - DRE Control 1 */ + { 0x00000442, 0x0305 }, /* R1090 (0x442) - DRE Control 2 */ + { 0x00000443, 0x5cfa }, /* R1091 (0x443) - DRE Control 3 */ + { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */ + { 0x00000451, 0x0000 }, + { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */ + { 0x00000490, 0x0069 }, /* R1168 (0x490) - PDM SPK1 CTRL 1 */ + { 0x00000491, 0x0000 }, /* R1169 (0x491) - PDM SPK1 CTRL 2 */ + { 0x00000492, 0x0069 }, /* R1170 (0x492) - PDM SPK2 CTRL 1 */ + { 0x00000493, 0x0000 }, /* R1171 (0x493) - PDM SPK2 CTRL 2 */ + { 0x000004A0, 0x3280 }, /* R1184 - HP1 Short Circuit Ctrl */ + { 0x000004A1, 0x3200 }, /* R1185 - HP2 Short Circuit Ctrl */ + { 0x000004A2, 0x3200 }, /* R1186 - HP3 Short Circuit Ctrl */ + { 0x000004b5, 0x0000 }, + { 0x000004b6, 0x8080 }, + { 0x000004dc, 0x6000 }, /* R1244 (0x4DC) - DAC comp 1 */ + { 0x000004de, 0x0000 }, /* R1246 (0x4DE) - DAC comp 3 */ + { 0x000004df, 0x0000 }, /* R1247 (0x4DF) - DAC comp 4 */ + { 0x00000500, 0x000c }, /* R1280 (0x500) - AIF1 BCLK Ctrl */ + { 0x00000501, 0x0000 }, /* R1281 (0x501) - AIF1 Tx Pin Ctrl */ + { 0x00000502, 0x0000 }, /* R1282 (0x502) - AIF1 Rx Pin Ctrl */ + { 0x00000503, 0x0000 }, /* R1283 (0x503) - AIF1 Rate Ctrl */ + { 0x00000504, 0x0000 }, /* R1284 (0x504) - AIF1 Format */ + { 0x00000505, 0x0040 }, /* R1285 (0x505) - AIF1 Tx BCLK Rate */ + { 0x00000506, 0x0040 }, /* R1286 (0x506) - AIF1 Rx BCLK Rate */ + { 0x00000507, 0x1818 }, /* R1287 (0x507) - AIF1 Frame Ctrl 1 */ + { 0x00000508, 0x1818 }, /* R1288 (0x508) - AIF1 Frame Ctrl 2 */ + { 0x00000509, 0x0000 }, /* R1289 (0x509) - AIF1 Frame Ctrl 3 */ + { 0x0000050a, 0x0001 }, /* R1290 (0x50A) - AIF1 Frame Ctrl 4 */ + { 0x0000050b, 0x0002 }, /* R1291 (0x50B) - AIF1 Frame Ctrl 5 */ + { 0x0000050c, 0x0003 }, /* R1292 (0x50C) - AIF1 Frame Ctrl 6 */ + { 0x0000050d, 0x0004 }, /* R1293 (0x50D) - AIF1 Frame Ctrl 7 */ + { 0x0000050e, 0x0005 }, /* R1294 (0x50E) - AIF1 Frame Ctrl 8 */ + { 0x0000050f, 0x0006 }, /* R1295 (0x50F) - AIF1 Frame Ctrl 9 */ + { 0x00000510, 0x0007 }, /* R1296 (0x510) - AIF1 Frame Ctrl 10 */ + { 0x00000511, 0x0000 }, /* R1297 (0x511) - AIF1 Frame Ctrl 11 */ + { 0x00000512, 0x0001 }, /* R1298 (0x512) - AIF1 Frame Ctrl 12 */ + { 0x00000513, 0x0002 }, /* R1299 (0x513) - AIF1 Frame Ctrl 13 */ + { 0x00000514, 0x0003 }, /* R1300 (0x514) - AIF1 Frame Ctrl 14 */ + { 0x00000515, 0x0004 }, /* R1301 (0x515) - AIF1 Frame Ctrl 15 */ + { 0x00000516, 0x0005 }, /* R1302 (0x516) - AIF1 Frame Ctrl 16 */ + { 0x00000517, 0x0006 }, /* R1303 (0x517) - AIF1 Frame Ctrl 17 */ + { 0x00000518, 0x0007 }, /* R1304 (0x518) - AIF1 Frame Ctrl 18 */ + { 0x00000519, 0x0000 }, /* R1305 (0x519) - AIF1 Tx Enables */ + { 0x0000051a, 0x0000 }, /* R1306 (0x51A) - AIF1 Rx Enables */ + { 0x0000051b, 0x0000 }, /* R1307 (0x51B) - AIF1 Force Write */ + { 0x00000540, 0x000c }, /* R1344 (0x540) - AIF2 BCLK Ctrl */ + { 0x00000541, 0x0000 }, /* R1345 (0x541) - AIF2 Tx Pin Ctrl */ + { 0x00000542, 0x0000 }, /* R1346 (0x542) - AIF2 Rx Pin Ctrl */ + { 0x00000543, 0x0000 }, /* R1347 (0x543) - AIF2 Rate Ctrl */ + { 0x00000544, 0x0000 }, /* R1348 (0x544) - AIF2 Format */ + { 0x00000545, 0x0040 }, /* R1349 (0x545) - AIF2 Tx BCLK Rate */ + { 0x00000546, 0x0040 }, /* R1350 (0x546) - AIF2 Rx BCLK Rate */ + { 0x00000547, 0x1818 }, /* R1351 (0x547) - AIF2 Frame Ctrl 1 */ + { 0x00000548, 0x1818 }, /* R1352 (0x548) - AIF2 Frame Ctrl 2 */ + { 0x00000549, 0x0000 }, /* R1353 (0x549) - AIF2 Frame Ctrl 3 */ + { 0x0000054a, 0x0001 }, /* R1354 (0x54A) - AIF2 Frame Ctrl 4 */ + { 0x0000054b, 0x0002 }, /* R1355 (0x54B) - AIF2 Frame Ctrl 5 */ + { 0x0000054c, 0x0003 }, /* R1356 (0x54C) - AIF2 Frame Ctrl 6 */ + { 0x0000054d, 0x0004 }, /* R1357 (0x54D) - AIF2 Frame Ctrl 7 */ + { 0x0000054e, 0x0005 }, /* R1358 (0x54E) - AIF2 Frame Ctrl 8 */ + { 0x0000054F, 0x0006 }, /* R1359 - AIF2 Frame Ctrl 9 */ + { 0x00000550, 0x0007 }, /* R1360 - AIF2 Frame Ctrl 10 */ + { 0x00000551, 0x0000 }, /* R1361 (0x551) - AIF2 Frame Ctrl 11 */ + { 0x00000552, 0x0001 }, /* R1362 (0x552) - AIF2 Frame Ctrl 12 */ + { 0x00000553, 0x0002 }, /* R1363 (0x553) - AIF2 Frame Ctrl 13 */ + { 0x00000554, 0x0003 }, /* R1364 (0x554) - AIF2 Frame Ctrl 14 */ + { 0x00000555, 0x0004 }, /* R1365 (0x555) - AIF2 Frame Ctrl 15 */ + { 0x00000556, 0x0005 }, /* R1366 (0x556) - AIF2 Frame Ctrl 16 */ + { 0x00000557, 0x0006 }, /* R1367 - AIF2 Frame Ctrl 17 */ + { 0x00000558, 0x0007 }, /* R1368 - AIF2 Frame Ctrl 18 */ + { 0x00000559, 0x0000 }, /* R1369 (0x559) - AIF2 Tx Enables */ + { 0x0000055a, 0x0000 }, /* R1370 (0x55A) - AIF2 Rx Enables */ + { 0x0000055b, 0x0000 }, /* R1371 (0x55B) - AIF2 Force Write */ + { 0x00000580, 0x000c }, /* R1408 (0x580) - AIF3 BCLK Ctrl */ + { 0x00000581, 0x0000 }, /* R1409 (0x581) - AIF3 Tx Pin Ctrl */ + { 0x00000582, 0x0000 }, /* R1410 (0x582) - AIF3 Rx Pin Ctrl */ + { 0x00000583, 0x0000 }, /* R1411 (0x583) - AIF3 Rate Ctrl */ + { 0x00000584, 0x0000 }, /* R1412 (0x584) - AIF3 Format */ + { 0x00000585, 0x0040 }, /* R1413 (0x585) - AIF3 Tx BCLK Rate */ + { 0x00000586, 0x0040 }, /* R1414 (0x586) - AIF3 Rx BCLK Rate */ + { 0x00000587, 0x1818 }, /* R1415 (0x587) - AIF3 Frame Ctrl 1 */ + { 0x00000588, 0x1818 }, /* R1416 (0x588) - AIF3 Frame Ctrl 2 */ + { 0x00000589, 0x0000 }, /* R1417 (0x589) - AIF3 Frame Ctrl 3 */ + { 0x0000058a, 0x0001 }, /* R1418 (0x58A) - AIF3 Frame Ctrl 4 */ + { 0x00000591, 0x0000 }, /* R1425 (0x591) - AIF3 Frame Ctrl 11 */ + { 0x00000592, 0x0001 }, /* R1426 (0x592) - AIF3 Frame Ctrl 12 */ + { 0x00000599, 0x0000 }, /* R1433 (0x599) - AIF3 Tx Enables */ + { 0x0000059a, 0x0000 }, /* R1434 (0x59A) - AIF3 Rx Enables */ + { 0x0000059b, 0x0000 }, /* R1435 (0x59B) - AIF3 Force Write */ + { 0x000005a0, 0x000c }, /* R1440 - AIF4 BCLK Ctrl */ + { 0x000005a1, 0x0000 }, /* R1441 - AIF4 Tx Pin Ctrl */ + { 0x000005a2, 0x0000 }, /* R1442 - AIF4 Rx Pin Ctrl */ + { 0x000005a3, 0x0000 }, /* R1443 - AIF4 Rate Ctrl */ + { 0x000005a4, 0x0000 }, /* R1444 - AIF4 Format */ + { 0x000005a5, 0x0040 }, /* R1445 - AIF4 Tx BCLK Rate */ + { 0x000005a6, 0x0040 }, /* R1446 - AIF4 Rx BCLK Rate */ + { 0x000005a7, 0x1818 }, /* R1447 - AIF4 Frame Ctrl 1 */ + { 0x000005a8, 0x1818 }, /* R1448 - AIF4 Frame Ctrl 2 */ + { 0x000005a9, 0x0000 }, /* R1449 - AIF4 Frame Ctrl 3 */ + { 0x000005aa, 0x0001 }, /* R1450 - AIF4 Frame Ctrl 4 */ + { 0x000005b1, 0x0000 }, /* R1457 - AIF4 Frame Ctrl 11 */ + { 0x000005b2, 0x0001 }, /* R1458 - AIF4 Frame Ctrl 12 */ + { 0x000005b9, 0x0000 }, /* R1465 - AIF4 Tx Enables */ + { 0x000005ba, 0x0000 }, /* R1466 - AIF4 Rx Enables */ + { 0x000005bb, 0x0000 }, /* R1467 - AIF4 Force Write */ + { 0x000005C2, 0x0000 }, /* R1474 - SPD1 TX Control */ + { 0x000005e3, 0x0000 }, /* R1507 (0x5E3) - SLIMbus Framer Ref Gear */ + { 0x000005e5, 0x0000 }, /* R1509 (0x5E5) - SLIMbus Rates 1 */ + { 0x000005e6, 0x0000 }, /* R1510 (0x5E6) - SLIMbus Rates 2 */ + { 0x000005e7, 0x0000 }, /* R1511 (0x5E7) - SLIMbus Rates 3 */ + { 0x000005e8, 0x0000 }, /* R1512 (0x5E8) - SLIMbus Rates 4 */ + { 0x000005e9, 0x0000 }, /* R1513 (0x5E9) - SLIMbus Rates 5 */ + { 0x000005ea, 0x0000 }, /* R1514 (0x5EA) - SLIMbus Rates 6 */ + { 0x000005eb, 0x0000 }, /* R1515 (0x5EB) - SLIMbus Rates 7 */ + { 0x000005ec, 0x0000 }, /* R1516 (0x5EC) - SLIMbus Rates 8 */ + { 0x000005f5, 0x0000 }, /* R1525 (0x5F5) - SLIMbus RX Channel Enable */ + { 0x000005f6, 0x0000 }, /* R1526 (0x5F6) - SLIMbus TX Channel Enable */ + { 0x00000640, 0x0000 }, + { 0x00000641, 0x0080 }, + { 0x00000642, 0x0000 }, + { 0x00000643, 0x0080 }, + { 0x00000644, 0x0000 }, + { 0x00000645, 0x0080 }, + { 0x00000646, 0x0000 }, + { 0x00000647, 0x0080 }, + { 0x00000648, 0x0000 }, + { 0x00000649, 0x0080 }, + { 0x0000064a, 0x0000 }, + { 0x0000064b, 0x0080 }, + { 0x0000064c, 0x0000 }, + { 0x0000064d, 0x0080 }, + { 0x0000064e, 0x0000 }, + { 0x0000064f, 0x0080 }, + { 0x00000680, 0x0000 }, + { 0x00000681, 0x0080 }, + { 0x00000682, 0x0000 }, + { 0x00000683, 0x0080 }, + { 0x00000684, 0x0000 }, + { 0x00000685, 0x0080 }, + { 0x00000686, 0x0000 }, + { 0x00000687, 0x0080 }, + { 0x00000688, 0x0000 }, + { 0x00000689, 0x0080 }, + { 0x0000068a, 0x0000 }, + { 0x0000068b, 0x0080 }, + { 0x0000068c, 0x0000 }, + { 0x0000068d, 0x0080 }, + { 0x0000068e, 0x0000 }, + { 0x0000068f, 0x0080 }, + { 0x00000690, 0x0000 }, + { 0x00000691, 0x0080 }, + { 0x00000692, 0x0000 }, + { 0x00000693, 0x0080 }, + { 0x00000694, 0x0000 }, + { 0x00000695, 0x0080 }, + { 0x00000696, 0x0000 }, + { 0x00000697, 0x0080 }, + { 0x00000698, 0x0000 }, + { 0x00000699, 0x0080 }, + { 0x0000069a, 0x0000 }, + { 0x0000069b, 0x0080 }, + { 0x0000069c, 0x0000 }, + { 0x0000069d, 0x0080 }, + { 0x0000069e, 0x0000 }, + { 0x0000069f, 0x0080 }, + { 0x000006a0, 0x0000 }, + { 0x000006a1, 0x0080 }, + { 0x000006a2, 0x0000 }, + { 0x000006a3, 0x0080 }, + { 0x000006a4, 0x0000 }, + { 0x000006a5, 0x0080 }, + { 0x000006a6, 0x0000 }, + { 0x000006a7, 0x0080 }, + { 0x000006a8, 0x0000 }, + { 0x000006a9, 0x0080 }, + { 0x000006aa, 0x0000 }, + { 0x000006ab, 0x0080 }, + { 0x000006ac, 0x0000 }, + { 0x000006ad, 0x0080 }, + { 0x000006ae, 0x0000 }, + { 0x000006af, 0x0080 }, + { 0x000006b0, 0x0000 }, + { 0x000006b1, 0x0080 }, + { 0x000006b2, 0x0000 }, + { 0x000006b3, 0x0080 }, + { 0x000006b4, 0x0000 }, + { 0x000006b5, 0x0080 }, + { 0x000006b6, 0x0000 }, + { 0x000006b7, 0x0080 }, + { 0x000006b8, 0x0000 }, + { 0x000006b9, 0x0080 }, + { 0x000006ba, 0x0000 }, + { 0x000006bb, 0x0080 }, + { 0x000006bc, 0x0000 }, + { 0x000006bd, 0x0080 }, + { 0x000006be, 0x0000 }, + { 0x000006bf, 0x0080 }, + { 0x000006c0, 0x0000 }, + { 0x000006c1, 0x0080 }, + { 0x000006c2, 0x0000 }, + { 0x000006c3, 0x0080 }, + { 0x000006c4, 0x0000 }, + { 0x000006c5, 0x0080 }, + { 0x000006c6, 0x0000 }, + { 0x000006c7, 0x0080 }, + { 0x000006c8, 0x0000 }, + { 0x000006c9, 0x0080 }, + { 0x000006ca, 0x0000 }, + { 0x000006cb, 0x0080 }, + { 0x000006cc, 0x0000 }, + { 0x000006cd, 0x0080 }, + { 0x000006ce, 0x0000 }, + { 0x000006cf, 0x0080 }, + { 0x000006d0, 0x0000 }, + { 0x000006d1, 0x0080 }, + { 0x000006d2, 0x0000 }, + { 0x000006d3, 0x0080 }, + { 0x000006d4, 0x0000 }, + { 0x000006d5, 0x0080 }, + { 0x000006d6, 0x0000 }, + { 0x000006d7, 0x0080 }, + { 0x000006d8, 0x0000 }, + { 0x000006d9, 0x0080 }, + { 0x000006da, 0x0000 }, + { 0x000006db, 0x0080 }, + { 0x000006dc, 0x0000 }, + { 0x000006dd, 0x0080 }, + { 0x000006de, 0x0000 }, + { 0x000006df, 0x0080 }, + { 0x00000700, 0x0000 }, + { 0x00000701, 0x0080 }, + { 0x00000702, 0x0000 }, + { 0x00000703, 0x0080 }, + { 0x00000704, 0x0000 }, + { 0x00000705, 0x0080 }, + { 0x00000706, 0x0000 }, + { 0x00000707, 0x0080 }, + { 0x00000708, 0x0000 }, + { 0x00000709, 0x0080 }, + { 0x0000070a, 0x0000 }, + { 0x0000070b, 0x0080 }, + { 0x0000070c, 0x0000 }, + { 0x0000070d, 0x0080 }, + { 0x0000070e, 0x0000 }, + { 0x0000070f, 0x0080 }, + { 0x00000710, 0x0000 }, + { 0x00000711, 0x0080 }, + { 0x00000712, 0x0000 }, + { 0x00000713, 0x0080 }, + { 0x00000714, 0x0000 }, + { 0x00000715, 0x0080 }, + { 0x00000716, 0x0000 }, + { 0x00000717, 0x0080 }, + { 0x00000718, 0x0000 }, + { 0x00000719, 0x0080 }, + { 0x0000071a, 0x0000 }, + { 0x0000071b, 0x0080 }, + { 0x0000071c, 0x0000 }, + { 0x0000071d, 0x0080 }, + { 0x0000071e, 0x0000 }, + { 0x0000071f, 0x0080 }, + { 0x00000720, 0x0000 }, + { 0x00000721, 0x0080 }, + { 0x00000722, 0x0000 }, + { 0x00000723, 0x0080 }, + { 0x00000724, 0x0000 }, + { 0x00000725, 0x0080 }, + { 0x00000726, 0x0000 }, + { 0x00000727, 0x0080 }, + { 0x00000728, 0x0000 }, + { 0x00000729, 0x0080 }, + { 0x0000072a, 0x0000 }, + { 0x0000072b, 0x0080 }, + { 0x0000072c, 0x0000 }, + { 0x0000072d, 0x0080 }, + { 0x0000072e, 0x0000 }, + { 0x0000072f, 0x0080 }, + { 0x00000730, 0x0000 }, + { 0x00000731, 0x0080 }, + { 0x00000732, 0x0000 }, + { 0x00000733, 0x0080 }, + { 0x00000734, 0x0000 }, + { 0x00000735, 0x0080 }, + { 0x00000736, 0x0000 }, + { 0x00000737, 0x0080 }, + { 0x00000738, 0x0000 }, + { 0x00000739, 0x0080 }, + { 0x0000073a, 0x0000 }, + { 0x0000073b, 0x0080 }, + { 0x0000073c, 0x0000 }, + { 0x0000073d, 0x0080 }, + { 0x0000073e, 0x0000 }, + { 0x0000073f, 0x0080 }, + { 0x00000740, 0x0000 }, + { 0x00000741, 0x0080 }, + { 0x00000742, 0x0000 }, + { 0x00000743, 0x0080 }, + { 0x00000744, 0x0000 }, + { 0x00000745, 0x0080 }, + { 0x00000746, 0x0000 }, + { 0x00000747, 0x0080 }, + { 0x00000748, 0x0000 }, + { 0x00000749, 0x0080 }, + { 0x0000074a, 0x0000 }, + { 0x0000074b, 0x0080 }, + { 0x0000074c, 0x0000 }, + { 0x0000074d, 0x0080 }, + { 0x0000074e, 0x0000 }, + { 0x0000074f, 0x0080 }, + { 0x00000750, 0x0000 }, + { 0x00000751, 0x0080 }, + { 0x00000752, 0x0000 }, + { 0x00000753, 0x0080 }, + { 0x00000754, 0x0000 }, + { 0x00000755, 0x0080 }, + { 0x00000756, 0x0000 }, + { 0x00000757, 0x0080 }, + { 0x00000758, 0x0000 }, + { 0x00000759, 0x0080 }, + { 0x0000075a, 0x0000 }, + { 0x0000075b, 0x0080 }, + { 0x0000075c, 0x0000 }, + { 0x0000075d, 0x0080 }, + { 0x0000075e, 0x0000 }, + { 0x0000075f, 0x0080 }, + { 0x00000760, 0x0000 }, + { 0x00000761, 0x0080 }, + { 0x00000762, 0x0000 }, + { 0x00000763, 0x0080 }, + { 0x00000764, 0x0000 }, + { 0x00000765, 0x0080 }, + { 0x00000766, 0x0000 }, + { 0x00000767, 0x0080 }, + { 0x00000768, 0x0000 }, + { 0x00000769, 0x0080 }, + { 0x0000076a, 0x0000 }, + { 0x0000076b, 0x0080 }, + { 0x0000076c, 0x0000 }, + { 0x0000076d, 0x0080 }, + { 0x0000076e, 0x0000 }, + { 0x0000076f, 0x0080 }, + { 0x00000770, 0x0000 }, /* R1904 - AIF2TX7MIX Input 1 Source */ + { 0x00000771, 0x0080 }, /* R1905 - AIF2TX7MIX Input 1 Volume */ + { 0x00000772, 0x0000 }, /* R1906 - AIF2TX7MIX Input 2 Source */ + { 0x00000773, 0x0080 }, /* R1907 - AIF2TX7MIX Input 2 Volume */ + { 0x00000774, 0x0000 }, /* R1908 - AIF2TX7MIX Input 3 Source */ + { 0x00000775, 0x0080 }, /* R1909 - AIF2TX7MIX Input 3 Volume */ + { 0x00000776, 0x0000 }, /* R1910 - AIF2TX7MIX Input 4 Source */ + { 0x00000777, 0x0080 }, /* R1911 - AIF2TX7MIX Input 4 Volume */ + { 0x00000778, 0x0000 }, /* R1912 - AIF2TX8MIX Input 1 Source */ + { 0x00000779, 0x0080 }, /* R1913 - AIF2TX8MIX Input 1 Volume */ + { 0x0000077a, 0x0000 }, /* R1914 - AIF2TX8MIX Input 2 Source */ + { 0x0000077b, 0x0080 }, /* R1915 - AIF2TX8MIX Input 2 Volume */ + { 0x0000077c, 0x0000 }, /* R1916 - AIF2TX8MIX Input 3 Source */ + { 0x0000077d, 0x0080 }, /* R1917 - AIF2TX8MIX Input 3 Volume */ + { 0x0000077e, 0x0000 }, /* R1918 - AIF2TX8MIX Input 4 Source */ + { 0x0000077f, 0x0080 }, /* R1919 - AIF2TX8MIX Input 4 Volume */ + { 0x00000780, 0x0000 }, + { 0x00000781, 0x0080 }, + { 0x00000782, 0x0000 }, + { 0x00000783, 0x0080 }, + { 0x00000784, 0x0000 }, + { 0x00000785, 0x0080 }, + { 0x00000786, 0x0000 }, + { 0x00000787, 0x0080 }, + { 0x00000788, 0x0000 }, + { 0x00000789, 0x0080 }, + { 0x0000078a, 0x0000 }, + { 0x0000078b, 0x0080 }, + { 0x0000078c, 0x0000 }, + { 0x0000078d, 0x0080 }, + { 0x0000078e, 0x0000 }, + { 0x0000078f, 0x0080 }, + { 0x000007c0, 0x0000 }, + { 0x000007c1, 0x0080 }, + { 0x000007c2, 0x0000 }, + { 0x000007c3, 0x0080 }, + { 0x000007c4, 0x0000 }, + { 0x000007c5, 0x0080 }, + { 0x000007c6, 0x0000 }, + { 0x000007c7, 0x0080 }, + { 0x000007c8, 0x0000 }, + { 0x000007c9, 0x0080 }, + { 0x000007ca, 0x0000 }, + { 0x000007cb, 0x0080 }, + { 0x000007cc, 0x0000 }, + { 0x000007cd, 0x0080 }, + { 0x000007ce, 0x0000 }, + { 0x000007cf, 0x0080 }, + { 0x000007d0, 0x0000 }, + { 0x000007d1, 0x0080 }, + { 0x000007d2, 0x0000 }, + { 0x000007d3, 0x0080 }, + { 0x000007d4, 0x0000 }, + { 0x000007d5, 0x0080 }, + { 0x000007d6, 0x0000 }, + { 0x000007d7, 0x0080 }, + { 0x000007d8, 0x0000 }, + { 0x000007d9, 0x0080 }, + { 0x000007da, 0x0000 }, + { 0x000007db, 0x0080 }, + { 0x000007dc, 0x0000 }, + { 0x000007dd, 0x0080 }, + { 0x000007de, 0x0000 }, + { 0x000007df, 0x0080 }, + { 0x000007e0, 0x0000 }, + { 0x000007e1, 0x0080 }, + { 0x000007e2, 0x0000 }, + { 0x000007e3, 0x0080 }, + { 0x000007e4, 0x0000 }, + { 0x000007e5, 0x0080 }, + { 0x000007e6, 0x0000 }, + { 0x000007e7, 0x0080 }, + { 0x000007e8, 0x0000 }, + { 0x000007e9, 0x0080 }, + { 0x000007ea, 0x0000 }, + { 0x000007eb, 0x0080 }, + { 0x000007ec, 0x0000 }, + { 0x000007ed, 0x0080 }, + { 0x000007ee, 0x0000 }, + { 0x000007ef, 0x0080 }, + { 0x000007f0, 0x0000 }, + { 0x000007f1, 0x0080 }, + { 0x000007f2, 0x0000 }, + { 0x000007f3, 0x0080 }, + { 0x000007f4, 0x0000 }, + { 0x000007f5, 0x0080 }, + { 0x000007f6, 0x0000 }, + { 0x000007f7, 0x0080 }, + { 0x000007f8, 0x0000 }, + { 0x000007f9, 0x0080 }, + { 0x000007fa, 0x0000 }, + { 0x000007fb, 0x0080 }, + { 0x000007fc, 0x0000 }, + { 0x000007fd, 0x0080 }, + { 0x000007fe, 0x0000 }, + { 0x000007ff, 0x0080 }, + { 0x00000800, 0x0000 }, + { 0x00000801, 0x0080 }, + { 0x00000808, 0x0000 }, + { 0x00000809, 0x0080 }, + { 0x00000880, 0x0000 }, + { 0x00000881, 0x0080 }, + { 0x00000882, 0x0000 }, + { 0x00000883, 0x0080 }, + { 0x00000884, 0x0000 }, + { 0x00000885, 0x0080 }, + { 0x00000886, 0x0000 }, + { 0x00000887, 0x0080 }, + { 0x00000888, 0x0000 }, + { 0x00000889, 0x0080 }, + { 0x0000088a, 0x0000 }, + { 0x0000088b, 0x0080 }, + { 0x0000088c, 0x0000 }, + { 0x0000088d, 0x0080 }, + { 0x0000088e, 0x0000 }, + { 0x0000088f, 0x0080 }, + { 0x00000890, 0x0000 }, + { 0x00000891, 0x0080 }, + { 0x00000892, 0x0000 }, + { 0x00000893, 0x0080 }, + { 0x00000894, 0x0000 }, + { 0x00000895, 0x0080 }, + { 0x00000896, 0x0000 }, + { 0x00000897, 0x0080 }, + { 0x00000898, 0x0000 }, + { 0x00000899, 0x0080 }, + { 0x0000089a, 0x0000 }, + { 0x0000089b, 0x0080 }, + { 0x0000089c, 0x0000 }, + { 0x0000089d, 0x0080 }, + { 0x0000089e, 0x0000 }, + { 0x0000089f, 0x0080 }, + { 0x000008c0, 0x0000 }, + { 0x000008c1, 0x0080 }, + { 0x000008c2, 0x0000 }, + { 0x000008c3, 0x0080 }, + { 0x000008c4, 0x0000 }, + { 0x000008c5, 0x0080 }, + { 0x000008c6, 0x0000 }, + { 0x000008c7, 0x0080 }, + { 0x000008c8, 0x0000 }, + { 0x000008c9, 0x0080 }, + { 0x000008ca, 0x0000 }, + { 0x000008cb, 0x0080 }, + { 0x000008cc, 0x0000 }, + { 0x000008cd, 0x0080 }, + { 0x000008ce, 0x0000 }, + { 0x000008cf, 0x0080 }, + { 0x000008d0, 0x0000 }, + { 0x000008d1, 0x0080 }, + { 0x000008d2, 0x0000 }, + { 0x000008d3, 0x0080 }, + { 0x000008d4, 0x0000 }, + { 0x000008d5, 0x0080 }, + { 0x000008d6, 0x0000 }, + { 0x000008d7, 0x0080 }, + { 0x000008d8, 0x0000 }, + { 0x000008d9, 0x0080 }, + { 0x000008da, 0x0000 }, + { 0x000008db, 0x0080 }, + { 0x000008dc, 0x0000 }, + { 0x000008dd, 0x0080 }, + { 0x000008de, 0x0000 }, + { 0x000008df, 0x0080 }, + { 0x00000900, 0x0000 }, + { 0x00000901, 0x0080 }, + { 0x00000902, 0x0000 }, + { 0x00000903, 0x0080 }, + { 0x00000904, 0x0000 }, + { 0x00000905, 0x0080 }, + { 0x00000906, 0x0000 }, + { 0x00000907, 0x0080 }, + { 0x00000908, 0x0000 }, + { 0x00000909, 0x0080 }, + { 0x0000090a, 0x0000 }, + { 0x0000090b, 0x0080 }, + { 0x0000090c, 0x0000 }, + { 0x0000090d, 0x0080 }, + { 0x0000090e, 0x0000 }, + { 0x0000090f, 0x0080 }, + { 0x00000910, 0x0000 }, + { 0x00000911, 0x0080 }, + { 0x00000912, 0x0000 }, + { 0x00000913, 0x0080 }, + { 0x00000914, 0x0000 }, + { 0x00000915, 0x0080 }, + { 0x00000916, 0x0000 }, + { 0x00000917, 0x0080 }, + { 0x00000918, 0x0000 }, + { 0x00000919, 0x0080 }, + { 0x0000091a, 0x0000 }, + { 0x0000091b, 0x0080 }, + { 0x0000091c, 0x0000 }, + { 0x0000091d, 0x0080 }, + { 0x0000091e, 0x0000 }, + { 0x0000091f, 0x0080 }, + { 0x00000940, 0x0000 }, + { 0x00000941, 0x0080 }, + { 0x00000942, 0x0000 }, + { 0x00000943, 0x0080 }, + { 0x00000944, 0x0000 }, + { 0x00000945, 0x0080 }, + { 0x00000946, 0x0000 }, + { 0x00000947, 0x0080 }, + { 0x00000948, 0x0000 }, + { 0x00000949, 0x0080 }, + { 0x0000094a, 0x0000 }, + { 0x0000094b, 0x0080 }, + { 0x0000094c, 0x0000 }, + { 0x0000094d, 0x0080 }, + { 0x0000094e, 0x0000 }, + { 0x0000094f, 0x0080 }, + { 0x00000950, 0x0000 }, + { 0x00000958, 0x0000 }, + { 0x00000960, 0x0000 }, + { 0x00000968, 0x0000 }, + { 0x00000970, 0x0000 }, + { 0x00000978, 0x0000 }, + { 0x00000980, 0x0000 }, + { 0x00000981, 0x0080 }, + { 0x00000982, 0x0000 }, + { 0x00000983, 0x0080 }, + { 0x00000984, 0x0000 }, + { 0x00000985, 0x0080 }, + { 0x00000986, 0x0000 }, + { 0x00000987, 0x0080 }, + { 0x00000988, 0x0000 }, + { 0x00000989, 0x0080 }, + { 0x0000098a, 0x0000 }, + { 0x0000098b, 0x0080 }, + { 0x0000098c, 0x0000 }, + { 0x0000098d, 0x0080 }, + { 0x0000098e, 0x0000 }, + { 0x0000098f, 0x0080 }, + { 0x00000990, 0x0000 }, + { 0x00000998, 0x0000 }, + { 0x000009a0, 0x0000 }, + { 0x000009a8, 0x0000 }, + { 0x000009b0, 0x0000 }, + { 0x000009b8, 0x0000 }, + { 0x000009c0, 0x0000 }, + { 0x000009c1, 0x0080 }, + { 0x000009c2, 0x0000 }, + { 0x000009c3, 0x0080 }, + { 0x000009c4, 0x0000 }, + { 0x000009c5, 0x0080 }, + { 0x000009c6, 0x0000 }, + { 0x000009c7, 0x0080 }, + { 0x000009c8, 0x0000 }, + { 0x000009c9, 0x0080 }, + { 0x000009ca, 0x0000 }, + { 0x000009cb, 0x0080 }, + { 0x000009cc, 0x0000 }, + { 0x000009cd, 0x0080 }, + { 0x000009ce, 0x0000 }, + { 0x000009cf, 0x0080 }, + { 0x000009d0, 0x0000 }, + { 0x000009d8, 0x0000 }, + { 0x000009e0, 0x0000 }, + { 0x000009e8, 0x0000 }, + { 0x000009f0, 0x0000 }, + { 0x000009f8, 0x0000 }, + { 0x00000a00, 0x0000 }, + { 0x00000a01, 0x0080 }, + { 0x00000a02, 0x0000 }, + { 0x00000a03, 0x0080 }, + { 0x00000a04, 0x0000 }, + { 0x00000a05, 0x0080 }, + { 0x00000a06, 0x0000 }, + { 0x00000a07, 0x0080 }, + { 0x00000a08, 0x0000 }, + { 0x00000a09, 0x0080 }, + { 0x00000a0a, 0x0000 }, + { 0x00000a0b, 0x0080 }, + { 0x00000a0c, 0x0000 }, + { 0x00000a0d, 0x0080 }, + { 0x00000a0e, 0x0000 }, + { 0x00000a0f, 0x0080 }, + { 0x00000a10, 0x0000 }, + { 0x00000a18, 0x0000 }, + { 0x00000a20, 0x0000 }, + { 0x00000a28, 0x0000 }, + { 0x00000a30, 0x0000 }, + { 0x00000a38, 0x0000 }, + { 0x00000a40, 0x0000 }, + { 0x00000a41, 0x0080 }, + { 0x00000a42, 0x0000 }, + { 0x00000a43, 0x0080 }, + { 0x00000a44, 0x0000 }, + { 0x00000a45, 0x0080 }, + { 0x00000a46, 0x0000 }, + { 0x00000a47, 0x0080 }, + { 0x00000a48, 0x0000 }, + { 0x00000a49, 0x0080 }, + { 0x00000a4a, 0x0000 }, + { 0x00000a4b, 0x0080 }, + { 0x00000a4c, 0x0000 }, + { 0x00000a4d, 0x0080 }, + { 0x00000a4e, 0x0000 }, + { 0x00000a4f, 0x0080 }, + { 0x00000a50, 0x0000 }, + { 0x00000a58, 0x0000 }, + { 0x00000a60, 0x0000 }, + { 0x00000a68, 0x0000 }, + { 0x00000a70, 0x0000 }, + { 0x00000a78, 0x0000 }, + { 0x00000a80, 0x0000 }, + { 0x00000a88, 0x0000 }, + { 0x00000a90, 0x0000 }, + { 0x00000a98, 0x0000 }, + { 0x00000b00, 0x0000 }, + { 0x00000b08, 0x0000 }, + { 0x00000b10, 0x0000 }, + { 0x00000b18, 0x0000 }, + { 0x00000b20, 0x0000 }, + { 0x00000b28, 0x0000 }, + { 0x00000b30, 0x0000 }, + { 0x00000b38, 0x0000 }, + { 0x00000b40, 0x0000 }, + { 0x00000b48, 0x0000 }, + { 0x00000b50, 0x0000 }, + { 0x00000b58, 0x0000 }, + { 0x00000b60, 0x0000 }, + { 0x00000b68, 0x0000 }, + { 0x00000b70, 0x0000 }, + { 0x00000b78, 0x0000 }, + { 0x00000b80, 0x0000 }, + { 0x00000b88, 0x0000 }, + { 0x00000ba0, 0x0000 }, + { 0x00000ba8, 0x0000 }, + { 0x00000bc0, 0x0000 }, /* R3008 - ISRC4DEC1MIX Input 1 Source */ + { 0x00000bc8, 0x0000 }, /* R3016 - ISRC4DEC2MIX Input 1 Source */ + { 0x00000be0, 0x0000 }, /* R3040 - ISRC4INT1MIX Input 1 Source */ + { 0x00000be8, 0x0000 }, /* R3048 - ISRC4INT2MIX Input 1 Source */ + { 0x00000c00, 0x0000 }, + { 0x00000c01, 0x0080 }, + { 0x00000c02, 0x0000 }, + { 0x00000c03, 0x0080 }, + { 0x00000c04, 0x0000 }, + { 0x00000c05, 0x0080 }, + { 0x00000c06, 0x0000 }, + { 0x00000c07, 0x0080 }, + { 0x00000c08, 0x0000 }, + { 0x00000c09, 0x0080 }, + { 0x00000c0a, 0x0000 }, + { 0x00000c0b, 0x0080 }, + { 0x00000c0c, 0x0000 }, + { 0x00000c0d, 0x0080 }, + { 0x00000c0e, 0x0000 }, + { 0x00000c0f, 0x0080 }, /* R3087 (0xC0F) - IRQ CTRL 1 */ + { 0x00000c10, 0x0000 }, /* R3088 (0xC10) - GPIO Debounce Config */ + { 0x00000c20, 0x0000 }, /* R3104 (0xC20) - Misc Pad Ctrl 1 */ + { 0x00000c28, 0x0000 }, + { 0x00000c30, 0x0000 }, + { 0x00000c38, 0x0000 }, + { 0x00000c40, 0x0000 }, + { 0x00000c41, 0x0080 }, + { 0x00000c42, 0x0000 }, + { 0x00000c43, 0x0080 }, + { 0x00000c44, 0x0000 }, + { 0x00000c45, 0x0080 }, + { 0x00000c46, 0x0000 }, + { 0x00000c47, 0x0080 }, + { 0x00000c48, 0x0000 }, + { 0x00000c49, 0x0080 }, + { 0x00000c4a, 0x0000 }, + { 0x00000c4b, 0x0080 }, + { 0x00000c4c, 0x0000 }, + { 0x00000c4d, 0x0080 }, + { 0x00000c4e, 0x0000 }, + { 0x00000c4f, 0x0080 }, + { 0x00000c50, 0x0000 }, + { 0x00000c58, 0x0000 }, + { 0x00000c60, 0x0000 }, + { 0x00000c68, 0x0000 }, + { 0x00000c70, 0x0000 }, + { 0x00000c78, 0x0000 }, + { 0x00000e00, 0x0000 }, /* R3584 (0xE00) - FX_Ctrl1 */ + { 0x00000e10, 0x6318 }, /* R3600 (0xE10) - EQ1_1 */ + { 0x00000e11, 0x6300 }, /* R3601 (0xE11) - EQ1_2 */ + { 0x00000e12, 0x0fc8 }, /* R3602 (0xE12) - EQ1_3 */ + { 0x00000e13, 0x03fe }, /* R3603 (0xE13) - EQ1_4 */ + { 0x00000e14, 0x00e0 }, /* R3604 (0xE14) - EQ1_5 */ + { 0x00000e15, 0x1ec4 }, /* R3605 (0xE15) - EQ1_6 */ + { 0x00000e16, 0xf136 }, /* R3606 (0xE16) - EQ1_7 */ + { 0x00000e17, 0x0409 }, /* R3607 (0xE17) - EQ1_8 */ + { 0x00000e18, 0x04cc }, /* R3608 (0xE18) - EQ1_9 */ + { 0x00000e19, 0x1c9b }, /* R3609 (0xE19) - EQ1_10 */ + { 0x00000e1a, 0xf337 }, /* R3610 (0xE1A) - EQ1_11 */ + { 0x00000e1b, 0x040b }, /* R3611 (0xE1B) - EQ1_12 */ + { 0x00000e1c, 0x0cbb }, /* R3612 (0xE1C) - EQ1_13 */ + { 0x00000e1d, 0x16f8 }, /* R3613 (0xE1D) - EQ1_14 */ + { 0x00000e1e, 0xf7d9 }, /* R3614 (0xE1E) - EQ1_15 */ + { 0x00000e1f, 0x040a }, /* R3615 (0xE1F) - EQ1_16 */ + { 0x00000e20, 0x1f14 }, /* R3616 (0xE20) - EQ1_17 */ + { 0x00000e21, 0x058c }, /* R3617 (0xE21) - EQ1_18 */ + { 0x00000e22, 0x0563 }, /* R3618 (0xE22) - EQ1_19 */ + { 0x00000e23, 0x4000 }, /* R3619 (0xE23) - EQ1_20 */ + { 0x00000e24, 0x0b75 }, /* R3620 (0xE24) - EQ1_21 */ + { 0x00000e26, 0x6318 }, /* R3622 (0xE26) - EQ2_1 */ + { 0x00000e27, 0x6300 }, /* R3623 (0xE27) - EQ2_2 */ + { 0x00000e28, 0x0fc8 }, /* R3624 (0xE28) - EQ2_3 */ + { 0x00000e29, 0x03fe }, /* R3625 (0xE29) - EQ2_4 */ + { 0x00000e2a, 0x00e0 }, /* R3626 (0xE2A) - EQ2_5 */ + { 0x00000e2b, 0x1ec4 }, /* R3627 (0xE2B) - EQ2_6 */ + { 0x00000e2c, 0xf136 }, /* R3628 (0xE2C) - EQ2_7 */ + { 0x00000e2d, 0x0409 }, /* R3629 (0xE2D) - EQ2_8 */ + { 0x00000e2e, 0x04cc }, /* R3630 (0xE2E) - EQ2_9 */ + { 0x00000e2f, 0x1c9b }, /* R3631 (0xE2F) - EQ2_10 */ + { 0x00000e30, 0xf337 }, /* R3632 (0xE30) - EQ2_11 */ + { 0x00000e31, 0x040b }, /* R3633 (0xE31) - EQ2_12 */ + { 0x00000e32, 0x0cbb }, /* R3634 (0xE32) - EQ2_13 */ + { 0x00000e33, 0x16f8 }, /* R3635 (0xE33) - EQ2_14 */ + { 0x00000e34, 0xf7d9 }, /* R3636 (0xE34) - EQ2_15 */ + { 0x00000e35, 0x040a }, /* R3637 (0xE35) - EQ2_16 */ + { 0x00000e36, 0x1f14 }, /* R3638 (0xE36) - EQ2_17 */ + { 0x00000e37, 0x058c }, /* R3639 (0xE37) - EQ2_18 */ + { 0x00000e38, 0x0563 }, /* R3640 (0xE38) - EQ2_19 */ + { 0x00000e39, 0x4000 }, /* R3641 (0xE39) - EQ2_20 */ + { 0x00000e3a, 0x0b75 }, /* R3642 (0xE3A) - EQ2_21 */ + { 0x00000e3c, 0x6318 }, /* R3644 (0xE3C) - EQ3_1 */ + { 0x00000e3d, 0x6300 }, /* R3645 (0xE3D) - EQ3_2 */ + { 0x00000e3e, 0x0fc8 }, /* R3646 (0xE3E) - EQ3_3 */ + { 0x00000e3f, 0x03fe }, /* R3647 (0xE3F) - EQ3_4 */ + { 0x00000e40, 0x00e0 }, /* R3648 (0xE40) - EQ3_5 */ + { 0x00000e41, 0x1ec4 }, /* R3649 (0xE41) - EQ3_6 */ + { 0x00000e42, 0xf136 }, /* R3650 (0xE42) - EQ3_7 */ + { 0x00000e43, 0x0409 }, /* R3651 (0xE43) - EQ3_8 */ + { 0x00000e44, 0x04cc }, /* R3652 (0xE44) - EQ3_9 */ + { 0x00000e45, 0x1c9b }, /* R3653 (0xE45) - EQ3_10 */ + { 0x00000e46, 0xf337 }, /* R3654 (0xE46) - EQ3_11 */ + { 0x00000e47, 0x040b }, /* R3655 (0xE47) - EQ3_12 */ + { 0x00000e48, 0x0cbb }, /* R3656 (0xE48) - EQ3_13 */ + { 0x00000e49, 0x16f8 }, /* R3657 (0xE49) - EQ3_14 */ + { 0x00000e4a, 0xf7d9 }, /* R3658 (0xE4A) - EQ3_15 */ + { 0x00000e4b, 0x040a }, /* R3659 (0xE4B) - EQ3_16 */ + { 0x00000e4c, 0x1f14 }, /* R3660 (0xE4C) - EQ3_17 */ + { 0x00000e4d, 0x058c }, /* R3661 (0xE4D) - EQ3_18 */ + { 0x00000e4e, 0x0563 }, /* R3662 (0xE4E) - EQ3_19 */ + { 0x00000e4f, 0x4000 }, /* R3663 (0xE4F) - EQ3_20 */ + { 0x00000e50, 0x0b75 }, /* R3664 (0xE50) - EQ3_21 */ + { 0x00000e52, 0x6318 }, /* R3666 (0xE52) - EQ4_1 */ + { 0x00000e53, 0x6300 }, /* R3667 (0xE53) - EQ4_2 */ + { 0x00000e54, 0x0fc8 }, /* R3668 (0xE54) - EQ4_3 */ + { 0x00000e55, 0x03fe }, /* R3669 (0xE55) - EQ4_4 */ + { 0x00000e56, 0x00e0 }, /* R3670 (0xE56) - EQ4_5 */ + { 0x00000e57, 0x1ec4 }, /* R3671 (0xE57) - EQ4_6 */ + { 0x00000e58, 0xf136 }, /* R3672 (0xE58) - EQ4_7 */ + { 0x00000e59, 0x0409 }, /* R3673 (0xE59) - EQ4_8 */ + { 0x00000e5a, 0x04cc }, /* R3674 (0xE5A) - EQ4_9 */ + { 0x00000e5b, 0x1c9b }, /* R3675 (0xE5B) - EQ4_10 */ + { 0x00000e5c, 0xf337 }, /* R3676 (0xE5C) - EQ4_11 */ + { 0x00000e5d, 0x040b }, /* R3677 (0xE5D) - EQ4_12 */ + { 0x00000e5e, 0x0cbb }, /* R3678 (0xE5E) - EQ4_13 */ + { 0x00000e5f, 0x16f8 }, /* R3679 (0xE5F) - EQ4_14 */ + { 0x00000e60, 0xf7d9 }, /* R3680 (0xE60) - EQ4_15 */ + { 0x00000e61, 0x040a }, /* R3681 (0xE61) - EQ4_16 */ + { 0x00000e62, 0x1f14 }, /* R3682 (0xE62) - EQ4_17 */ + { 0x00000e63, 0x058c }, /* R3683 (0xE63) - EQ4_18 */ + { 0x00000e64, 0x0563 }, /* R3684 (0xE64) - EQ4_19 */ + { 0x00000e65, 0x4000 }, /* R3685 (0xE65) - EQ4_20 */ + { 0x00000e66, 0x0b75 }, /* R3686 (0xE66) - EQ4_21 */ + { 0x00000e80, 0x0018 }, /* R3712 (0xE80) - DRC1 ctrl1 */ + { 0x00000e81, 0x0933 }, /* R3713 (0xE81) - DRC1 ctrl2 */ + { 0x00000e82, 0x0018 }, /* R3714 (0xE82) - DRC1 ctrl3 */ + { 0x00000e83, 0x0000 }, /* R3715 (0xE83) - DRC1 ctrl4 */ + { 0x00000e84, 0x0000 }, /* R3716 (0xE84) - DRC1 ctrl5 */ + { 0x00000e88, 0x0933 }, /* R3720 (0xE88) - DRC2 ctrl1 */ + { 0x00000e89, 0x0018 }, /* R3721 (0xE89) - DRC2 ctrl2 */ + { 0x00000e8a, 0x0000 }, /* R3722 (0xE8A) - DRC2 ctrl3 */ + { 0x00000e8b, 0x0000 }, /* R3723 (0xE8B) - DRC2 ctrl4 */ + { 0x00000e8c, 0x0040 }, /* R3724 (0xE8C) - DRC2 ctrl5 */ + { 0x00000ec0, 0x0000 }, /* R3776 (0xEC0) - HPLPF1_1 */ + { 0x00000ec1, 0x0000 }, /* R3777 (0xEC1) - HPLPF1_2 */ + { 0x00000ec4, 0x0000 }, /* R3780 (0xEC4) - HPLPF2_1 */ + { 0x00000ec5, 0x0000 }, /* R3781 (0xEC5) - HPLPF2_2 */ + { 0x00000ec8, 0x0000 }, /* R3784 (0xEC8) - HPLPF3_1 */ + { 0x00000ec9, 0x0000 }, /* R3785 (0xEC9) - HPLPF3_2 */ + { 0x00000ecc, 0x0000 }, /* R3788 (0xECC) - HPLPF4_1 */ + { 0x00000ecd, 0x0000 }, /* R3789 (0xECD) - HPLPF4_2 */ + { 0x00000ee0, 0x0000 }, /* R3808 (0xEE0) - ASRC_ENABLE */ + { 0x00000ee2, 0x0000 }, /* R3810 (0xEE2) - ASRC_RATE1 */ + { 0x00000ee3, 0x4000 }, /* R3811 (0xEE3) - ASRC_RATE2 */ + { 0x00000ef0, 0x0000 }, /* R3824 (0xEF0) - ISRC 1 CTRL 1 */ + { 0x00000ef1, 0x0001 }, /* R3825 (0xEF1) - ISRC 1 CTRL 2 */ + { 0x00000ef2, 0x0000 }, /* R3826 (0xEF2) - ISRC 1 CTRL 3 */ + { 0x00000ef3, 0x0000 }, /* R3827 (0xEF3) - ISRC 2 CTRL 1 */ + { 0x00000ef4, 0x0001 }, /* R3828 (0xEF4) - ISRC 2 CTRL 2 */ + { 0x00000ef5, 0x0000 }, /* R3829 (0xEF5) - ISRC 2 CTRL 3 */ + { 0x00000ef6, 0x0000 }, /* R3830 (0xEF6) - ISRC 3 CTRL 1 */ + { 0x00000ef7, 0x0001 }, /* R3831 (0xEF7) - ISRC 3 CTRL 2 */ + { 0x00000ef8, 0x0000 }, /* R3832 (0xEF8) - ISRC 3 CTRL 3 */ + { 0x00000ef9, 0x0000 }, /* R3833 - ISRC 4 CTRL 1 */ + { 0x00000efa, 0x0001 }, /* R3834 - ISRC 4 CTRL 2 */ + { 0x00000efb, 0x0000 }, /* R3835 - ISRC 4 CTRL 3 */ + { 0x00000f00, 0x0000 }, /* R3840 (0xF00) - Clock Control */ + { 0x00000F01, 0x0000 }, /* R3841 - ANC_SRC */ + { 0x00000F02, 0x0000 }, /* R3842 - Arizona DSP Status */ + { 0x00000F08, 0x001c }, /* R3848 - ANC Coefficient */ + { 0x00000F09, 0x0000 }, /* R3849 - ANC Coefficient */ + { 0x00000F0B, 0x0000 }, /* R3851 - ANC Coefficient */ + { 0x00000F0C, 0x0000 }, /* R3852 - ANC Coefficient */ + { 0x00000F0D, 0x0000 }, /* R3853 - ANC Coefficient */ + { 0x00000F0E, 0x0000 }, /* R3854 - ANC Coefficient */ + { 0x00000F0F, 0x0000 }, /* R3855 - ANC Coefficient */ + { 0x00000F10, 0x0000 }, /* R3856 - ANC Coefficient */ + { 0x00000F11, 0x0000 }, /* R3857 - ANC Coefficient */ + { 0x00000F12, 0x0000 }, /* R3858 - ANC Coefficient */ + { 0x00000F15, 0x0000 }, /* R3861 - FCL Filter Control */ + { 0x00000F17, 0x0004 }, /* R3863 - FCL ADC Reformatter Control */ + { 0x00000F18, 0x0004 }, /* R3864 - ANC Coefficient */ + { 0x00000F19, 0x0002 }, /* R3865 - ANC Coefficient */ + { 0x00000F1A, 0x0000 }, /* R3866 - ANC Coefficient */ + { 0x00000F1B, 0x0010 }, /* R3867 - ANC Coefficient */ + { 0x00000F1C, 0x0000 }, /* R3868 - ANC Coefficient */ + { 0x00000F1D, 0x0000 }, /* R3869 - ANC Coefficient */ + { 0x00000F1E, 0x0000 }, /* R3870 - ANC Coefficient */ + { 0x00000F1F, 0x0000 }, /* R3871 - ANC Coefficient */ + { 0x00000F20, 0x0000 }, /* R3872 - ANC Coefficient */ + { 0x00000F21, 0x0000 }, /* R3873 - ANC Coefficient */ + { 0x00000F22, 0x0000 }, /* R3874 - ANC Coefficient */ + { 0x00000F23, 0x0000 }, /* R3875 - ANC Coefficient */ + { 0x00000F24, 0x0000 }, /* R3876 - ANC Coefficient */ + { 0x00000F25, 0x0000 }, /* R3877 - ANC Coefficient */ + { 0x00000F26, 0x0000 }, /* R3878 - ANC Coefficient */ + { 0x00000F27, 0x0000 }, /* R3879 - ANC Coefficient */ + { 0x00000F28, 0x0000 }, /* R3880 - ANC Coefficient */ + { 0x00000F29, 0x0000 }, /* R3881 - ANC Coefficient */ + { 0x00000F2A, 0x0000 }, /* R3882 - ANC Coefficient */ + { 0x00000F2B, 0x0000 }, /* R3883 - ANC Coefficient */ + { 0x00000F2C, 0x0000 }, /* R3884 - ANC Coefficient */ + { 0x00000F2D, 0x0000 }, /* R3885 - ANC Coefficient */ + { 0x00000F2E, 0x0000 }, /* R3886 - ANC Coefficient */ + { 0x00000F2F, 0x0000 }, /* R3887 - ANC Coefficient */ + { 0x00000F30, 0x0000 }, /* R3888 - ANC Coefficient */ + { 0x00000F31, 0x0000 }, /* R3889 - ANC Coefficient */ + { 0x00000F32, 0x0000 }, /* R3890 - ANC Coefficient */ + { 0x00000F33, 0x0000 }, /* R3891 - ANC Coefficient */ + { 0x00000F34, 0x0000 }, /* R3892 - ANC Coefficient */ + { 0x00000F35, 0x0000 }, /* R3893 - ANC Coefficient */ + { 0x00000F36, 0x0000 }, /* R3894 - ANC Coefficient */ + { 0x00000F37, 0x0000 }, /* R3895 - ANC Coefficient */ + { 0x00000F38, 0x0000 }, /* R3896 - ANC Coefficient */ + { 0x00000F39, 0x0000 }, /* R3897 - ANC Coefficient */ + { 0x00000F3A, 0x0000 }, /* R3898 - ANC Coefficient */ + { 0x00000F3B, 0x0000 }, /* R3899 - ANC Coefficient */ + { 0x00000F3C, 0x0000 }, /* R3900 - ANC Coefficient */ + { 0x00000F3D, 0x0000 }, /* R3901 - ANC Coefficient */ + { 0x00000F3E, 0x0000 }, /* R3902 - ANC Coefficient */ + { 0x00000F3F, 0x0000 }, /* R3903 - ANC Coefficient */ + { 0x00000F40, 0x0000 }, /* R3904 - ANC Coefficient */ + { 0x00000F41, 0x0000 }, /* R3905 - ANC Coefficient */ + { 0x00000F42, 0x0000 }, /* R3906 - ANC Coefficient */ + { 0x00000F43, 0x0000 }, /* R3907 - ANC Coefficient */ + { 0x00000F44, 0x0000 }, /* R3908 - ANC Coefficient */ + { 0x00000F45, 0x0000 }, /* R3909 - ANC Coefficient */ + { 0x00000F46, 0x0000 }, /* R3910 - ANC Coefficient */ + { 0x00000F47, 0x0000 }, /* R3911 - ANC Coefficient */ + { 0x00000F48, 0x0000 }, /* R3912 - ANC Coefficient */ + { 0x00000F49, 0x0000 }, /* R3913 - ANC Coefficient */ + { 0x00000F4A, 0x0000 }, /* R3914 - ANC Coefficient */ + { 0x00000F4B, 0x0000 }, /* R3915 - ANC Coefficient */ + { 0x00000F4C, 0x0000 }, /* R3916 - ANC Coefficient */ + { 0x00000F4D, 0x0000 }, /* R3917 - ANC Coefficient */ + { 0x00000F4E, 0x0000 }, /* R3918 - ANC Coefficient */ + { 0x00000F4F, 0x0000 }, /* R3919 - ANC Coefficient */ + { 0x00000F50, 0x0000 }, /* R3920 - ANC Coefficient */ + { 0x00000F51, 0x0000 }, /* R3921 - ANC Coefficient */ + { 0x00000F52, 0x0000 }, /* R3922 - ANC Coefficient */ + { 0x00000F53, 0x0000 }, /* R3923 - ANC Coefficient */ + { 0x00000F54, 0x0000 }, /* R3924 - ANC Coefficient */ + { 0x00000F55, 0x0000 }, /* R3925 - ANC Coefficient */ + { 0x00000F56, 0x0000 }, /* R3926 - ANC Coefficient */ + { 0x00000F57, 0x0000 }, /* R3927 - ANC Coefficient */ + { 0x00000F58, 0x0000 }, /* R3928 - ANC Coefficient */ + { 0x00000F59, 0x0000 }, /* R3929 - ANC Coefficient */ + { 0x00000F5A, 0x0000 }, /* R3930 - ANC Coefficient */ + { 0x00000F5B, 0x0000 }, /* R3931 - ANC Coefficient */ + { 0x00000F5C, 0x0000 }, /* R3932 - ANC Coefficient */ + { 0x00000F5D, 0x0000 }, /* R3933 - ANC Coefficient */ + { 0x00000F5E, 0x0000 }, /* R3934 - ANC Coefficient */ + { 0x00000F5F, 0x0000 }, /* R3935 - ANC Coefficient */ + { 0x00000F60, 0x0000 }, /* R3936 - ANC Coefficient */ + { 0x00000F61, 0x0000 }, /* R3937 - ANC Coefficient */ + { 0x00000F62, 0x0000 }, /* R3938 - ANC Coefficient */ + { 0x00000F63, 0x0000 }, /* R3939 - ANC Coefficient */ + { 0x00000F64, 0x0000 }, /* R3940 - ANC Coefficient */ + { 0x00000F65, 0x0000 }, /* R3941 - ANC Coefficient */ + { 0x00000F66, 0x0000 }, /* R3942 - ANC Coefficient */ + { 0x00000F67, 0x0000 }, /* R3943 - ANC Coefficient */ + { 0x00000F68, 0x0000 }, /* R3944 - ANC Coefficient */ + { 0x00000F69, 0x0000 }, /* R3945 - ANC Coefficient */ + { 0x00000F71, 0x0000 }, /* R3953 - FCR Filter Control */ + { 0x00000F73, 0x0004 }, /* R3955 - FCR ADC Reformatter Control */ + { 0x00000F74, 0x0004 }, /* R3956 - ANC Coefficient */ + { 0x00000F75, 0x0002 }, /* R3957 - ANC Coefficient */ + { 0x00000F76, 0x0000 }, /* R3958 - ANC Coefficient */ + { 0x00000F77, 0x0010 }, /* R3959 - ANC Coefficient */ + { 0x00000F78, 0x0000 }, /* R3960 - ANC Coefficient */ + { 0x00000F79, 0x0000 }, /* R3961 - ANC Coefficient */ + { 0x00000F7A, 0x0000 }, /* R3962 - ANC Coefficient */ + { 0x00000F7B, 0x0000 }, /* R3963 - ANC Coefficient */ + { 0x00000F7C, 0x0000 }, /* R3964 - ANC Coefficient */ + { 0x00000F7D, 0x0000 }, /* R3965 - ANC Coefficient */ + { 0x00000F7E, 0x0000 }, /* R3966 - ANC Coefficient */ + { 0x00000F7F, 0x0000 }, /* R3967 - ANC Coefficient */ + { 0x00000F80, 0x0000 }, /* R3968 - ANC Coefficient */ + { 0x00000F81, 0x0000 }, /* R3969 - ANC Coefficient */ + { 0x00000F82, 0x0000 }, /* R3970 - ANC Coefficient */ + { 0x00000F83, 0x0000 }, /* R3971 - ANC Coefficient */ + { 0x00000F84, 0x0000 }, /* R3972 - ANC Coefficient */ + { 0x00000F85, 0x0000 }, /* R3973 - ANC Coefficient */ + { 0x00000F86, 0x0000 }, /* R3974 - ANC Coefficient */ + { 0x00000F87, 0x0000 }, /* R3975 - ANC Coefficient */ + { 0x00000F88, 0x0000 }, /* R3976 - ANC Coefficient */ + { 0x00000F89, 0x0000 }, /* R3977 - ANC Coefficient */ + { 0x00000F8A, 0x0000 }, /* R3978 - ANC Coefficient */ + { 0x00000F8B, 0x0000 }, /* R3979 - ANC Coefficient */ + { 0x00000F8C, 0x0000 }, /* R3980 - ANC Coefficient */ + { 0x00000F8D, 0x0000 }, /* R3981 - ANC Coefficient */ + { 0x00000F8E, 0x0000 }, /* R3982 - ANC Coefficient */ + { 0x00000F8F, 0x0000 }, /* R3983 - ANC Coefficient */ + { 0x00000F90, 0x0000 }, /* R3984 - ANC Coefficient */ + { 0x00000F91, 0x0000 }, /* R3985 - ANC Coefficient */ + { 0x00000F92, 0x0000 }, /* R3986 - ANC Coefficient */ + { 0x00000F93, 0x0000 }, /* R3987 - ANC Coefficient */ + { 0x00000F94, 0x0000 }, /* R3988 - ANC Coefficient */ + { 0x00000F95, 0x0000 }, /* R3989 - ANC Coefficient */ + { 0x00000F96, 0x0000 }, /* R3990 - ANC Coefficient */ + { 0x00000F97, 0x0000 }, /* R3991 - ANC Coefficient */ + { 0x00000F98, 0x0000 }, /* R3992 - ANC Coefficient */ + { 0x00000F99, 0x0000 }, /* R3993 - ANC Coefficient */ + { 0x00000F9A, 0x0000 }, /* R3994 - ANC Coefficient */ + { 0x00000F9B, 0x0000 }, /* R3995 - ANC Coefficient */ + { 0x00000F9C, 0x0000 }, /* R3996 - ANC Coefficient */ + { 0x00000F9D, 0x0000 }, /* R3997 - ANC Coefficient */ + { 0x00000F9E, 0x0000 }, /* R3998 - ANC Coefficient */ + { 0x00000F9F, 0x0000 }, /* R3999 - ANC Coefficient */ + { 0x00000FA0, 0x0000 }, /* R4000 - ANC Coefficient */ + { 0x00000FA1, 0x0000 }, /* R4001 - ANC Coefficient */ + { 0x00000FA2, 0x0000 }, /* R4002 - ANC Coefficient */ + { 0x00000FA3, 0x0000 }, /* R4003 - ANC Coefficient */ + { 0x00000FA4, 0x0000 }, /* R4004 - ANC Coefficient */ + { 0x00000FA5, 0x0000 }, /* R4005 - ANC Coefficient */ + { 0x00000FA6, 0x0000 }, /* R4006 - ANC Coefficient */ + { 0x00000FA7, 0x0000 }, /* R4007 - ANC Coefficient */ + { 0x00000FA8, 0x0000 }, /* R4008 - ANC Coefficient */ + { 0x00000FA9, 0x0000 }, /* R4009 - ANC Coefficient */ + { 0x00000FAA, 0x0000 }, /* R4010 - ANC Coefficient */ + { 0x00000FAB, 0x0000 }, /* R4011 - ANC Coefficient */ + { 0x00000FAC, 0x0000 }, /* R4012 - ANC Coefficient */ + { 0x00000FAD, 0x0000 }, /* R4013 - ANC Coefficient */ + { 0x00000FAE, 0x0000 }, /* R4014 - ANC Coefficient */ + { 0x00000FAF, 0x0000 }, /* R4015 - ANC Coefficient */ + { 0x00000FB0, 0x0000 }, /* R4016 - ANC Coefficient */ + { 0x00000FB1, 0x0000 }, /* R4017 - ANC Coefficient */ + { 0x00000FB2, 0x0000 }, /* R4018 - ANC Coefficient */ + { 0x00000FB3, 0x0000 }, /* R4019 - ANC Coefficient */ + { 0x00000FB4, 0x0000 }, /* R4020 - ANC Coefficient */ + { 0x00000FB5, 0x0000 }, /* R4021 - ANC Coefficient */ + { 0x00000FB6, 0x0000 }, /* R4022 - ANC Coefficient */ + { 0x00000FB7, 0x0000 }, /* R4023 - ANC Coefficient */ + { 0x00000FB8, 0x0000 }, /* R4024 - ANC Coefficient */ + { 0x00000FB9, 0x0000 }, /* R4025 - ANC Coefficient */ + { 0x00000FBA, 0x0000 }, /* R4026 - ANC Coefficient */ + { 0x00000FBB, 0x0000 }, /* R4027 - ANC Coefficient */ + { 0x00000FBC, 0x0000 }, /* R4028 - ANC Coefficient */ + { 0x00000FBD, 0x0000 }, /* R4029 - ANC Coefficient */ + { 0x00000FBE, 0x0000 }, /* R4030 - ANC Coefficient */ + { 0x00000FBF, 0x0000 }, /* R4031 - ANC Coefficient */ + { 0x00000FC0, 0x0000 }, /* R4032 - ANC Coefficient */ + { 0x00000FC1, 0x0000 }, /* R4033 - ANC Coefficient */ + { 0x00000FC2, 0x0000 }, /* R4034 - ANC Coefficient */ + { 0x00000FC3, 0x0000 }, /* R4035 - ANC Coefficient */ + { 0x00000FC4, 0x0000 }, /* R4036 - ANC Coefficient */ + { 0x00000FC5, 0x0000 }, /* R4037 - ANC Coefficient */ + { 0x00001200, 0x0000 }, + { 0x00001204, 0x0000 }, + { 0x00001206, 0x0000 }, + { 0x00001210, 0x0000 }, + { 0x00001212, 0x0000 }, + { 0x00001214, 0x0000 }, + { 0x00001216, 0x0000 }, + { 0x00001300, 0x0000 }, + { 0x00001340, 0x0000 }, + { 0x00001341, 0x0000 }, + { 0x00001342, 0x0000 }, + { 0x00001343, 0x0000 }, + { 0x00001400, 0x0000 }, + { 0x00001401, 0x0000 }, + { 0x00001410, 0x0000 }, + { 0x00001411, 0x0000 }, + { 0x00001412, 0x0000 }, + { 0x00001413, 0x0000 }, + { 0x00001420, 0x0000 }, + { 0x00001421, 0x0000 }, + { 0x00001422, 0x0000 }, + { 0x00001423, 0x0000 }, + { 0x00001430, 0x0000 }, + { 0x00001431, 0x0000 }, + { 0x00001432, 0x0000 }, + { 0x00001840, 0xffff }, /* R6208 (0x1840) - IRQ1 Mask 1 */ + { 0x00001841, 0xffff }, /* R6209 (0x1841) - IRQ1 Mask 2 */ + { 0x00001845, 0xffff }, /* R6213 (0x1845) - IRQ1 Mask 6 */ + { 0x00001846, 0xffff }, /* R6214 (0x1846) - IRQ1 Mask 7 */ + { 0x00001848, 0xffff }, /* R6216 (0x1848) - IRQ1 Mask 9 */ + { 0x0000184a, 0xffff }, /* R6218 (0x184A) - IRQ1 Mask 11 */ + { 0x0000184b, 0xffff }, /* R6219 (0x184B) - IRQ1 Mask 12 */ + { 0x0000184c, 0xffff }, /* R6220 (0x184C) - IRQ1 Mask 13 */ + { 0x0000184d, 0xffff }, /* R6221 (0x184D) - IRQ1 Mask 14 */ + { 0x0000184e, 0xffff }, /* R6222 (0x184E) - IRQ1 Mask 15 */ + { 0x00001948, 0xffff }, /* R6472 (0x1948) - IRQ2 Mask 9 */ +}; + +static bool wm8285_is_adsp_memory(struct device *dev, unsigned int reg) +{ + if ((reg >= 0x080000 && reg <= 0x085ffe) || + (reg >= 0x0a0000 && reg <= 0x0a7ffe) || + (reg >= 0x0c0000 && reg <= 0x0c1ffe) || + (reg >= 0x0e0000 && reg <= 0x0e1ffe) || + (reg >= 0x100000 && reg <= 0x10effe) || + (reg >= 0x120000 && reg <= 0x12bffe) || + (reg >= 0x136000 && reg <= 0x137ffe) || + (reg >= 0x140000 && reg <= 0x14bffe) || + (reg >= 0x160000 && reg <= 0x161ffe) || + (reg >= 0x180000 && reg <= 0x18effe) || + (reg >= 0x1a0000 && reg <= 0x1b1ffe) || + (reg >= 0x1b6000 && reg <= 0x1b7ffe) || + (reg >= 0x1c8000 && reg <= 0x1cbffe) || + (reg >= 0x1e0000 && reg <= 0x1e1ffe) || + (reg >= 0x200000 && reg <= 0x208ffe) || + (reg >= 0x220000 && reg <= 0x231ffe) || + (reg >= 0x240000 && reg <= 0x24bffe) || + (reg >= 0x260000 && reg <= 0x261ffe) || + (reg >= 0x280000 && reg <= 0x288ffe) || + (reg >= 0x2a0000 && reg <= 0x2a9ffe) || + (reg >= 0x2c0000 && reg <= 0x2c3ffe) || + (reg >= 0x2e0000 && reg <= 0x2e1ffe) || + (reg >= 0x300000 && reg <= 0x305ffe) || + (reg >= 0x320000 && reg <= 0x333ffe) || + (reg >= 0x340000 && reg <= 0x34bffe) || + (reg >= 0x360000 && reg <= 0x361ffe) || + (reg >= 0x380000 && reg <= 0x388ffe) || + (reg >= 0x3a0000 && reg <= 0x3a7ffe) || + (reg >= 0x3c0000 && reg <= 0x3c1ffe) || + (reg >= 0x3e0000 && reg <= 0x3e1ffe)) + return true; + else + return false; +} + +static bool wm8285_16bit_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_SOFTWARE_RESET: + case ARIZONA_DEVICE_REVISION: + case ARIZONA_CTRL_IF_SPI_CFG_1: + case ARIZONA_CTRL_IF_I2C1_CFG_1: + case ARIZONA_CTRL_IF_I2C2_CFG_1: + case ARIZONA_CTRL_IF_I2C1_CFG_2: + case ARIZONA_CTRL_IF_I2C2_CFG_2: + case ARIZONA_WRITE_SEQUENCER_CTRL_0: + case ARIZONA_WRITE_SEQUENCER_CTRL_1: + case ARIZONA_WRITE_SEQUENCER_CTRL_2: + case ARIZONA_TONE_GENERATOR_1: + case ARIZONA_TONE_GENERATOR_2: + case ARIZONA_TONE_GENERATOR_3: + case ARIZONA_TONE_GENERATOR_4: + case ARIZONA_TONE_GENERATOR_5: + case ARIZONA_PWM_DRIVE_1: + case ARIZONA_PWM_DRIVE_2: + case ARIZONA_PWM_DRIVE_3: + case ARIZONA_WAKE_CONTROL: + case ARIZONA_SEQUENCE_CONTROL: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_1: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_4: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6: + case ARIZONA_COMFORT_NOISE_GENERATOR: + case ARIZONA_HAPTICS_CONTROL_1: + case ARIZONA_HAPTICS_CONTROL_2: + case ARIZONA_HAPTICS_PHASE_1_INTENSITY: + case ARIZONA_HAPTICS_PHASE_1_DURATION: + case ARIZONA_HAPTICS_PHASE_2_INTENSITY: + case ARIZONA_HAPTICS_PHASE_2_DURATION: + case ARIZONA_HAPTICS_PHASE_3_INTENSITY: + case ARIZONA_HAPTICS_PHASE_3_DURATION: + case ARIZONA_HAPTICS_STATUS: + case ARIZONA_CLOCK_32K_1: + case ARIZONA_SYSTEM_CLOCK_1: + case ARIZONA_SAMPLE_RATE_1: + case ARIZONA_SAMPLE_RATE_2: + case ARIZONA_SAMPLE_RATE_3: + case ARIZONA_SAMPLE_RATE_1_STATUS: + case ARIZONA_SAMPLE_RATE_2_STATUS: + case ARIZONA_SAMPLE_RATE_3_STATUS: + case ARIZONA_ASYNC_CLOCK_1: + case ARIZONA_ASYNC_SAMPLE_RATE_1: + case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: + case WM8285_DSP_CLOCK_1: + case WM8285_DSP_CLOCK_2: + case ARIZONA_OUTPUT_SYSTEM_CLOCK: + case ARIZONA_OUTPUT_ASYNC_CLOCK: + case ARIZONA_RATE_ESTIMATOR_1: + case ARIZONA_RATE_ESTIMATOR_2: + case ARIZONA_RATE_ESTIMATOR_3: + case ARIZONA_RATE_ESTIMATOR_4: + case ARIZONA_RATE_ESTIMATOR_5: + case ARIZONA_FLL1_CONTROL_1: + case ARIZONA_FLL1_CONTROL_2: + case ARIZONA_FLL1_CONTROL_3: + case ARIZONA_FLL1_CONTROL_4: + case ARIZONA_FLL1_CONTROL_5: + case ARIZONA_FLL1_CONTROL_6: + case ARIZONA_FLL1_CONTROL_7: + case ARIZONA_FLL1_LOOP_FILTER_TEST_1: + case ARIZONA_FLL1_NCO_TEST_0: + case ARIZONA_FLL1_SYNCHRONISER_1: + case ARIZONA_FLL1_SYNCHRONISER_2: + case ARIZONA_FLL1_SYNCHRONISER_3: + case ARIZONA_FLL1_SYNCHRONISER_4: + case ARIZONA_FLL1_SYNCHRONISER_5: + case ARIZONA_FLL1_SYNCHRONISER_6: + case ARIZONA_FLL1_SYNCHRONISER_7: + case ARIZONA_FLL1_SPREAD_SPECTRUM: + case ARIZONA_FLL1_GPIO_CLOCK: + case ARIZONA_FLL2_CONTROL_1: + case ARIZONA_FLL2_CONTROL_2: + case ARIZONA_FLL2_CONTROL_3: + case ARIZONA_FLL2_CONTROL_4: + case ARIZONA_FLL2_CONTROL_5: + case ARIZONA_FLL2_CONTROL_6: + case ARIZONA_FLL2_CONTROL_7: + case ARIZONA_FLL2_LOOP_FILTER_TEST_1: + case ARIZONA_FLL2_NCO_TEST_0: + case ARIZONA_FLL2_SYNCHRONISER_1: + case ARIZONA_FLL2_SYNCHRONISER_2: + case ARIZONA_FLL2_SYNCHRONISER_3: + case ARIZONA_FLL2_SYNCHRONISER_4: + case ARIZONA_FLL2_SYNCHRONISER_5: + case ARIZONA_FLL2_SYNCHRONISER_6: + case ARIZONA_FLL2_SYNCHRONISER_7: + case ARIZONA_FLL2_SPREAD_SPECTRUM: + case ARIZONA_FLL2_GPIO_CLOCK: + case ARIZONA_FLL3_CONTROL_1: + case ARIZONA_FLL3_CONTROL_2: + case ARIZONA_FLL3_CONTROL_3: + case ARIZONA_FLL3_CONTROL_4: + case ARIZONA_FLL3_CONTROL_5: + case ARIZONA_FLL3_CONTROL_6: + case ARIZONA_FLL3_CONTROL_7: + case ARIZONA_FLL3_LOOP_FILTER_TEST_1: + case ARIZONA_FLL3_NCO_TEST_0: + case ARIZONA_FLL3_SYNCHRONISER_1: + case ARIZONA_FLL3_SYNCHRONISER_2: + case ARIZONA_FLL3_SYNCHRONISER_3: + case ARIZONA_FLL3_SYNCHRONISER_4: + case ARIZONA_FLL3_SYNCHRONISER_5: + case ARIZONA_FLL3_SYNCHRONISER_6: + case ARIZONA_FLL3_SYNCHRONISER_7: + case ARIZONA_FLL3_SPREAD_SPECTRUM: + case ARIZONA_FLL3_GPIO_CLOCK: + case ARIZONA_MIC_CHARGE_PUMP_1: + case ARIZONA_LDO1_CONTROL_1: + case ARIZONA_LDO2_CONTROL_1: + case ARIZONA_MIC_BIAS_CTRL_1: + case ARIZONA_MIC_BIAS_CTRL_2: + case ARIZONA_MIC_BIAS_CTRL_3: + case ARIZONA_MIC_BIAS_CTRL_4: + case ARIZONA_HP_CTRL_1L: + case ARIZONA_HP_CTRL_1R: + case ARIZONA_HP_CTRL_2L: + case ARIZONA_HP_CTRL_2R: + case ARIZONA_HP_CTRL_3L: + case ARIZONA_HP_CTRL_3R: + case ARIZONA_ACCESSORY_DETECT_MODE_1: + case ARIZONA_HEADPHONE_DETECT_1: + case ARIZONA_HEADPHONE_DETECT_2: + case WM8285_MICD_CLAMP_CONTROL: + case ARIZONA_MIC_DETECT_1: + case ARIZONA_MIC_DETECT_2: + case ARIZONA_MIC_DETECT_3: + case ARIZONA_MIC_DETECT_4: + case ARIZONA_MIC_DETECT_LEVEL_1: + case ARIZONA_MIC_DETECT_LEVEL_2: + case ARIZONA_MIC_DETECT_LEVEL_3: + case ARIZONA_MIC_DETECT_LEVEL_4: + case ARIZONA_MIC_NOISE_MIX_CONTROL_1: + case WM8285_GP_SWITCH_1: + case ARIZONA_ISOLATION_CONTROL: + case ARIZONA_JACK_DETECT_ANALOGUE: + case ARIZONA_INPUT_ENABLES: + case ARIZONA_INPUT_ENABLES_STATUS: + case ARIZONA_INPUT_RATE: + case ARIZONA_INPUT_VOLUME_RAMP: + case ARIZONA_HPF_CONTROL: + case ARIZONA_IN1L_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_1L: + case ARIZONA_DMIC1L_CONTROL: + case ARIZONA_IN1R_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_1R: + case ARIZONA_DMIC1R_CONTROL: + case ARIZONA_IN2L_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_2L: + case ARIZONA_DMIC2L_CONTROL: + case ARIZONA_IN2R_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_2R: + case ARIZONA_DMIC2R_CONTROL: + case ARIZONA_IN3L_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_3L: + case ARIZONA_DMIC3L_CONTROL: + case ARIZONA_IN3R_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_3R: + case ARIZONA_DMIC3R_CONTROL: + case ARIZONA_IN4L_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_4L: + case ARIZONA_DMIC4L_CONTROL: + case ARIZONA_IN4R_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_4R: + case ARIZONA_DMIC4R_CONTROL: + case ARIZONA_IN5L_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_5L: + case ARIZONA_DMIC5L_CONTROL: + case ARIZONA_IN5R_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_5R: + case ARIZONA_DMIC5R_CONTROL: + case ARIZONA_IN6L_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_6L: + case ARIZONA_DMIC6L_CONTROL: + case ARIZONA_IN6R_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_6R: + case ARIZONA_DMIC6R_CONTROL: + case ARIZONA_ADC_VCO_CAL_4: + case ARIZONA_ADC_VCO_CAL_5: + case ARIZONA_ADC_VCO_CAL_6: + case ARIZONA_ADC_VCO_CAL_7: + case ARIZONA_ADC_VCO_CAL_8: + case ARIZONA_ADC_VCO_CAL_9: + case ARIZONA_OUTPUT_ENABLES_1: + case ARIZONA_OUTPUT_STATUS_1: + case ARIZONA_OUTPUT_STANDBY_1: + case ARIZONA_RAW_OUTPUT_STATUS_1: + case ARIZONA_OUTPUT_RATE_1: + case ARIZONA_OUTPUT_VOLUME_RAMP: + case ARIZONA_OUTPUT_PATH_CONFIG_1L: + case ARIZONA_DAC_DIGITAL_VOLUME_1L: + case ARIZONA_DAC_VOLUME_LIMIT_1L: + case ARIZONA_NOISE_GATE_SELECT_1L: + case ARIZONA_OUTPUT_PATH_CONFIG_1R: + case ARIZONA_DAC_DIGITAL_VOLUME_1R: + case ARIZONA_DAC_VOLUME_LIMIT_1R: + case ARIZONA_NOISE_GATE_SELECT_1R: + case ARIZONA_OUTPUT_PATH_CONFIG_2L: + case ARIZONA_DAC_DIGITAL_VOLUME_2L: + case ARIZONA_DAC_VOLUME_LIMIT_2L: + case ARIZONA_NOISE_GATE_SELECT_2L: + case ARIZONA_OUTPUT_PATH_CONFIG_2R: + case ARIZONA_DAC_DIGITAL_VOLUME_2R: + case ARIZONA_DAC_VOLUME_LIMIT_2R: + case ARIZONA_NOISE_GATE_SELECT_2R: + case ARIZONA_OUTPUT_PATH_CONFIG_3L: + case ARIZONA_DAC_DIGITAL_VOLUME_3L: + case ARIZONA_DAC_VOLUME_LIMIT_3L: + case ARIZONA_NOISE_GATE_SELECT_3L: + case ARIZONA_OUTPUT_PATH_CONFIG_3R: + case ARIZONA_DAC_DIGITAL_VOLUME_3R: + case ARIZONA_DAC_VOLUME_LIMIT_3R: + case ARIZONA_NOISE_GATE_SELECT_3R: + case ARIZONA_OUTPUT_PATH_CONFIG_4L: + case ARIZONA_DAC_DIGITAL_VOLUME_4L: + case ARIZONA_OUT_VOLUME_4L: + case ARIZONA_NOISE_GATE_SELECT_4L: + case ARIZONA_OUTPUT_PATH_CONFIG_4R: + case ARIZONA_DAC_DIGITAL_VOLUME_4R: + case ARIZONA_OUT_VOLUME_4R: + case ARIZONA_NOISE_GATE_SELECT_4R: + case ARIZONA_OUTPUT_PATH_CONFIG_5L: + case ARIZONA_DAC_DIGITAL_VOLUME_5L: + case ARIZONA_DAC_VOLUME_LIMIT_5L: + case ARIZONA_NOISE_GATE_SELECT_5L: + case ARIZONA_OUTPUT_PATH_CONFIG_5R: + case ARIZONA_DAC_DIGITAL_VOLUME_5R: + case ARIZONA_DAC_VOLUME_LIMIT_5R: + case ARIZONA_NOISE_GATE_SELECT_5R: + case ARIZONA_OUTPUT_PATH_CONFIG_6L: + case ARIZONA_DAC_DIGITAL_VOLUME_6L: + case ARIZONA_DAC_VOLUME_LIMIT_6L: + case ARIZONA_NOISE_GATE_SELECT_6L: + case ARIZONA_OUTPUT_PATH_CONFIG_6R: + case ARIZONA_DAC_DIGITAL_VOLUME_6R: + case ARIZONA_DAC_VOLUME_LIMIT_6R: + case ARIZONA_NOISE_GATE_SELECT_6R: + case ARIZONA_DRE_ENABLE: + case ARIZONA_DAC_AEC_CONTROL_1: + case ARIZONA_NOISE_GATE_CONTROL: + case ARIZONA_PDM_SPK1_CTRL_1: + case ARIZONA_PDM_SPK1_CTRL_2: + case ARIZONA_PDM_SPK2_CTRL_1: + case ARIZONA_PDM_SPK2_CTRL_2: + case ARIZONA_HP1_SHORT_CIRCUIT_CTRL: + case ARIZONA_HP2_SHORT_CIRCUIT_CTRL: + case ARIZONA_HP3_SHORT_CIRCUIT_CTRL: + case ARIZONA_SPK_CTRL_3: + case ARIZONA_AIF1_BCLK_CTRL: + case ARIZONA_AIF1_TX_PIN_CTRL: + case ARIZONA_AIF1_RX_PIN_CTRL: + case ARIZONA_AIF1_RATE_CTRL: + case ARIZONA_AIF1_FORMAT: + case ARIZONA_AIF1_TX_BCLK_RATE: + case ARIZONA_AIF1_RX_BCLK_RATE: + case ARIZONA_AIF1_FRAME_CTRL_1: + case ARIZONA_AIF1_FRAME_CTRL_2: + case ARIZONA_AIF1_FRAME_CTRL_3: + case ARIZONA_AIF1_FRAME_CTRL_4: + case ARIZONA_AIF1_FRAME_CTRL_5: + case ARIZONA_AIF1_FRAME_CTRL_6: + case ARIZONA_AIF1_FRAME_CTRL_7: + case ARIZONA_AIF1_FRAME_CTRL_8: + case ARIZONA_AIF1_FRAME_CTRL_9: + case ARIZONA_AIF1_FRAME_CTRL_10: + case ARIZONA_AIF1_FRAME_CTRL_11: + case ARIZONA_AIF1_FRAME_CTRL_12: + case ARIZONA_AIF1_FRAME_CTRL_13: + case ARIZONA_AIF1_FRAME_CTRL_14: + case ARIZONA_AIF1_FRAME_CTRL_15: + case ARIZONA_AIF1_FRAME_CTRL_16: + case ARIZONA_AIF1_FRAME_CTRL_17: + case ARIZONA_AIF1_FRAME_CTRL_18: + case ARIZONA_AIF1_TX_ENABLES: + case ARIZONA_AIF1_RX_ENABLES: + case ARIZONA_AIF2_BCLK_CTRL: + case ARIZONA_AIF2_TX_PIN_CTRL: + case ARIZONA_AIF2_RX_PIN_CTRL: + case ARIZONA_AIF2_RATE_CTRL: + case ARIZONA_AIF2_FORMAT: + case ARIZONA_AIF2_TX_BCLK_RATE: + case ARIZONA_AIF2_RX_BCLK_RATE: + case ARIZONA_AIF2_FRAME_CTRL_1: + case ARIZONA_AIF2_FRAME_CTRL_2: + case ARIZONA_AIF2_FRAME_CTRL_3: + case ARIZONA_AIF2_FRAME_CTRL_4: + case ARIZONA_AIF2_FRAME_CTRL_5: + case ARIZONA_AIF2_FRAME_CTRL_6: + case ARIZONA_AIF2_FRAME_CTRL_7: + case ARIZONA_AIF2_FRAME_CTRL_8: + case ARIZONA_AIF2_FRAME_CTRL_9: + case ARIZONA_AIF2_FRAME_CTRL_10: + case ARIZONA_AIF2_FRAME_CTRL_11: + case ARIZONA_AIF2_FRAME_CTRL_12: + case ARIZONA_AIF2_FRAME_CTRL_13: + case ARIZONA_AIF2_FRAME_CTRL_14: + case ARIZONA_AIF2_FRAME_CTRL_15: + case ARIZONA_AIF2_FRAME_CTRL_16: + case ARIZONA_AIF2_FRAME_CTRL_17: + case ARIZONA_AIF2_FRAME_CTRL_18: + case ARIZONA_AIF2_TX_ENABLES: + case ARIZONA_AIF2_RX_ENABLES: + case ARIZONA_AIF3_BCLK_CTRL: + case ARIZONA_AIF3_TX_PIN_CTRL: + case ARIZONA_AIF3_RX_PIN_CTRL: + case ARIZONA_AIF3_RATE_CTRL: + case ARIZONA_AIF3_FORMAT: + case ARIZONA_AIF3_TX_BCLK_RATE: + case ARIZONA_AIF3_RX_BCLK_RATE: + case ARIZONA_AIF3_FRAME_CTRL_1: + case ARIZONA_AIF3_FRAME_CTRL_2: + case ARIZONA_AIF3_FRAME_CTRL_3: + case ARIZONA_AIF3_FRAME_CTRL_4: + case ARIZONA_AIF3_FRAME_CTRL_11: + case ARIZONA_AIF3_FRAME_CTRL_12: + case ARIZONA_AIF3_TX_ENABLES: + case ARIZONA_AIF3_RX_ENABLES: + case ARIZONA_AIF4_BCLK_CTRL: + case ARIZONA_AIF4_TX_PIN_CTRL: + case ARIZONA_AIF4_RX_PIN_CTRL: + case ARIZONA_AIF4_RATE_CTRL: + case ARIZONA_AIF4_FORMAT: + case ARIZONA_AIF4_TX_BCLK_RATE: + case ARIZONA_AIF4_RX_BCLK_RATE: + case ARIZONA_AIF4_FRAME_CTRL_1: + case ARIZONA_AIF4_FRAME_CTRL_2: + case ARIZONA_AIF4_FRAME_CTRL_3: + case ARIZONA_AIF4_FRAME_CTRL_4: + case ARIZONA_AIF4_FRAME_CTRL_11: + case ARIZONA_AIF4_FRAME_CTRL_12: + case ARIZONA_AIF4_TX_ENABLES: + case ARIZONA_AIF4_RX_ENABLES: + case ARIZONA_SPD1_TX_CONTROL: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_1: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_2: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_3: + case ARIZONA_SLIMBUS_FRAMER_REF_GEAR: + case ARIZONA_SLIMBUS_RATES_1: + case ARIZONA_SLIMBUS_RATES_2: + case ARIZONA_SLIMBUS_RATES_3: + case ARIZONA_SLIMBUS_RATES_4: + case ARIZONA_SLIMBUS_RATES_5: + case ARIZONA_SLIMBUS_RATES_6: + case ARIZONA_SLIMBUS_RATES_7: + case ARIZONA_SLIMBUS_RATES_8: + case ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE: + case ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE: + case ARIZONA_SLIMBUS_RX_PORT_STATUS: + case ARIZONA_SLIMBUS_TX_PORT_STATUS: + case ARIZONA_PWM1MIX_INPUT_1_SOURCE: + case ARIZONA_PWM1MIX_INPUT_1_VOLUME: + case ARIZONA_PWM1MIX_INPUT_2_SOURCE: + case ARIZONA_PWM1MIX_INPUT_2_VOLUME: + case ARIZONA_PWM1MIX_INPUT_3_SOURCE: + case ARIZONA_PWM1MIX_INPUT_3_VOLUME: + case ARIZONA_PWM1MIX_INPUT_4_SOURCE: + case ARIZONA_PWM1MIX_INPUT_4_VOLUME: + case ARIZONA_PWM2MIX_INPUT_1_SOURCE: + case ARIZONA_PWM2MIX_INPUT_1_VOLUME: + case ARIZONA_PWM2MIX_INPUT_2_SOURCE: + case ARIZONA_PWM2MIX_INPUT_2_VOLUME: + case ARIZONA_PWM2MIX_INPUT_3_SOURCE: + case ARIZONA_PWM2MIX_INPUT_3_VOLUME: + case ARIZONA_PWM2MIX_INPUT_4_SOURCE: + case ARIZONA_PWM2MIX_INPUT_4_VOLUME: + case ARIZONA_MICMIX_INPUT_1_SOURCE: + case ARIZONA_MICMIX_INPUT_1_VOLUME: + case ARIZONA_MICMIX_INPUT_2_SOURCE: + case ARIZONA_MICMIX_INPUT_2_VOLUME: + case ARIZONA_MICMIX_INPUT_3_SOURCE: + case ARIZONA_MICMIX_INPUT_3_VOLUME: + case ARIZONA_MICMIX_INPUT_4_SOURCE: + case ARIZONA_MICMIX_INPUT_4_VOLUME: + case ARIZONA_NOISEMIX_INPUT_1_SOURCE: + case ARIZONA_NOISEMIX_INPUT_1_VOLUME: + case ARIZONA_NOISEMIX_INPUT_2_SOURCE: + case ARIZONA_NOISEMIX_INPUT_2_VOLUME: + case ARIZONA_NOISEMIX_INPUT_3_SOURCE: + case ARIZONA_NOISEMIX_INPUT_3_VOLUME: + case ARIZONA_NOISEMIX_INPUT_4_SOURCE: + case ARIZONA_NOISEMIX_INPUT_4_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_1_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_1_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_2_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_2_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_3_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_3_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_4_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_4_VOLUME: + case ARIZONA_OUT2LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT2LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT2LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT2LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT2LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT2LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT2LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT2LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT2RMIX_INPUT_1_SOURCE: + case ARIZONA_OUT2RMIX_INPUT_1_VOLUME: + case ARIZONA_OUT2RMIX_INPUT_2_SOURCE: + case ARIZONA_OUT2RMIX_INPUT_2_VOLUME: + case ARIZONA_OUT2RMIX_INPUT_3_SOURCE: + case ARIZONA_OUT2RMIX_INPUT_3_VOLUME: + case ARIZONA_OUT2RMIX_INPUT_4_SOURCE: + case ARIZONA_OUT2RMIX_INPUT_4_VOLUME: + case ARIZONA_OUT3LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT3LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT3LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT3LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT3LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT3LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT3LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT3LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT3RMIX_INPUT_1_SOURCE: + case ARIZONA_OUT3RMIX_INPUT_1_VOLUME: + case ARIZONA_OUT3RMIX_INPUT_2_SOURCE: + case ARIZONA_OUT3RMIX_INPUT_2_VOLUME: + case ARIZONA_OUT3RMIX_INPUT_3_SOURCE: + case ARIZONA_OUT3RMIX_INPUT_3_VOLUME: + case ARIZONA_OUT3RMIX_INPUT_4_SOURCE: + case ARIZONA_OUT3RMIX_INPUT_4_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT4RMIX_INPUT_1_SOURCE: + case ARIZONA_OUT4RMIX_INPUT_1_VOLUME: + case ARIZONA_OUT4RMIX_INPUT_2_SOURCE: + case ARIZONA_OUT4RMIX_INPUT_2_VOLUME: + case ARIZONA_OUT4RMIX_INPUT_3_SOURCE: + case ARIZONA_OUT4RMIX_INPUT_3_VOLUME: + case ARIZONA_OUT4RMIX_INPUT_4_SOURCE: + case ARIZONA_OUT4RMIX_INPUT_4_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_1_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_1_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_2_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_2_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_3_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_3_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_4_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_4_VOLUME: + case ARIZONA_OUT6LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT6LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT6LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT6LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT6LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT6LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT6LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT6LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT6RMIX_INPUT_1_SOURCE: + case ARIZONA_OUT6RMIX_INPUT_1_VOLUME: + case ARIZONA_OUT6RMIX_INPUT_2_SOURCE: + case ARIZONA_OUT6RMIX_INPUT_2_VOLUME: + case ARIZONA_OUT6RMIX_INPUT_3_SOURCE: + case ARIZONA_OUT6RMIX_INPUT_3_VOLUME: + case ARIZONA_OUT6RMIX_INPUT_4_SOURCE: + case ARIZONA_OUT6RMIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX7MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX7MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX7MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX7MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX7MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX7MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX7MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX8MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX8MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX8MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX8MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX8MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX8MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX8MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX5MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX5MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX5MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX5MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX5MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX5MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX5MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX6MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX6MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX6MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX6MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_4_VOLUME: + case ARIZONA_AIF4TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF4TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF4TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF4TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF4TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF4TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF4TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF4TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF4TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF4TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF4TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF4TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF4TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF4TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF4TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF4TX2MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX1MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX1MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX1MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX1MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX1MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX1MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX1MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX2MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX2MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX2MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX2MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX2MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX2MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX2MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX3MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX3MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX3MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX3MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX3MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX3MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX3MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX4MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX4MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX4MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX4MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX4MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX4MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX4MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX5MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX5MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX5MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX5MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX5MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX5MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX5MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX6MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX6MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX6MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX6MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX6MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX6MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX6MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX7MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX7MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX7MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX7MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX7MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX7MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX7MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX8MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX8MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX8MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX8MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX8MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX8MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX8MIX_INPUT_4_VOLUME: + case ARIZONA_EQ1MIX_INPUT_1_SOURCE: + case ARIZONA_EQ1MIX_INPUT_1_VOLUME: + case ARIZONA_EQ1MIX_INPUT_2_SOURCE: + case ARIZONA_EQ1MIX_INPUT_2_VOLUME: + case ARIZONA_EQ1MIX_INPUT_3_SOURCE: + case ARIZONA_EQ1MIX_INPUT_3_VOLUME: + case ARIZONA_EQ1MIX_INPUT_4_SOURCE: + case ARIZONA_EQ1MIX_INPUT_4_VOLUME: + case ARIZONA_EQ2MIX_INPUT_1_SOURCE: + case ARIZONA_EQ2MIX_INPUT_1_VOLUME: + case ARIZONA_EQ2MIX_INPUT_2_SOURCE: + case ARIZONA_EQ2MIX_INPUT_2_VOLUME: + case ARIZONA_EQ2MIX_INPUT_3_SOURCE: + case ARIZONA_EQ2MIX_INPUT_3_VOLUME: + case ARIZONA_EQ2MIX_INPUT_4_SOURCE: + case ARIZONA_EQ2MIX_INPUT_4_VOLUME: + case ARIZONA_EQ3MIX_INPUT_1_SOURCE: + case ARIZONA_EQ3MIX_INPUT_1_VOLUME: + case ARIZONA_EQ3MIX_INPUT_2_SOURCE: + case ARIZONA_EQ3MIX_INPUT_2_VOLUME: + case ARIZONA_EQ3MIX_INPUT_3_SOURCE: + case ARIZONA_EQ3MIX_INPUT_3_VOLUME: + case ARIZONA_EQ3MIX_INPUT_4_SOURCE: + case ARIZONA_EQ3MIX_INPUT_4_VOLUME: + case ARIZONA_EQ4MIX_INPUT_1_SOURCE: + case ARIZONA_EQ4MIX_INPUT_1_VOLUME: + case ARIZONA_EQ4MIX_INPUT_2_SOURCE: + case ARIZONA_EQ4MIX_INPUT_2_VOLUME: + case ARIZONA_EQ4MIX_INPUT_3_SOURCE: + case ARIZONA_EQ4MIX_INPUT_3_VOLUME: + case ARIZONA_EQ4MIX_INPUT_4_SOURCE: + case ARIZONA_EQ4MIX_INPUT_4_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_1_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_1_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_2_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_2_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_3_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_3_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_4_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_4_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_1_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_1_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_2_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_2_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_3_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_3_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_4_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_4_VOLUME: + case ARIZONA_DRC2LMIX_INPUT_1_SOURCE: + case ARIZONA_DRC2LMIX_INPUT_1_VOLUME: + case ARIZONA_DRC2LMIX_INPUT_2_SOURCE: + case ARIZONA_DRC2LMIX_INPUT_2_VOLUME: + case ARIZONA_DRC2LMIX_INPUT_3_SOURCE: + case ARIZONA_DRC2LMIX_INPUT_3_VOLUME: + case ARIZONA_DRC2LMIX_INPUT_4_SOURCE: + case ARIZONA_DRC2LMIX_INPUT_4_VOLUME: + case ARIZONA_DRC2RMIX_INPUT_1_SOURCE: + case ARIZONA_DRC2RMIX_INPUT_1_VOLUME: + case ARIZONA_DRC2RMIX_INPUT_2_SOURCE: + case ARIZONA_DRC2RMIX_INPUT_2_VOLUME: + case ARIZONA_DRC2RMIX_INPUT_3_SOURCE: + case ARIZONA_DRC2RMIX_INPUT_3_VOLUME: + case ARIZONA_DRC2RMIX_INPUT_4_SOURCE: + case ARIZONA_DRC2RMIX_INPUT_4_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_4_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_4_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_4_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_4_VOLUME: + case ARIZONA_DSP1LMIX_INPUT_1_SOURCE: + case ARIZONA_DSP1LMIX_INPUT_1_VOLUME: + case ARIZONA_DSP1LMIX_INPUT_2_SOURCE: + case ARIZONA_DSP1LMIX_INPUT_2_VOLUME: + case ARIZONA_DSP1LMIX_INPUT_3_SOURCE: + case ARIZONA_DSP1LMIX_INPUT_3_VOLUME: + case ARIZONA_DSP1LMIX_INPUT_4_SOURCE: + case ARIZONA_DSP1LMIX_INPUT_4_VOLUME: + case ARIZONA_DSP1RMIX_INPUT_1_SOURCE: + case ARIZONA_DSP1RMIX_INPUT_1_VOLUME: + case ARIZONA_DSP1RMIX_INPUT_2_SOURCE: + case ARIZONA_DSP1RMIX_INPUT_2_VOLUME: + case ARIZONA_DSP1RMIX_INPUT_3_SOURCE: + case ARIZONA_DSP1RMIX_INPUT_3_VOLUME: + case ARIZONA_DSP1RMIX_INPUT_4_SOURCE: + case ARIZONA_DSP1RMIX_INPUT_4_VOLUME: + case ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE: + case ARIZONA_DSP1AUX2MIX_INPUT_1_SOURCE: + case ARIZONA_DSP1AUX3MIX_INPUT_1_SOURCE: + case ARIZONA_DSP1AUX4MIX_INPUT_1_SOURCE: + case ARIZONA_DSP1AUX5MIX_INPUT_1_SOURCE: + case ARIZONA_DSP1AUX6MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2LMIX_INPUT_1_SOURCE: + case ARIZONA_DSP2LMIX_INPUT_1_VOLUME: + case ARIZONA_DSP2LMIX_INPUT_2_SOURCE: + case ARIZONA_DSP2LMIX_INPUT_2_VOLUME: + case ARIZONA_DSP2LMIX_INPUT_3_SOURCE: + case ARIZONA_DSP2LMIX_INPUT_3_VOLUME: + case ARIZONA_DSP2LMIX_INPUT_4_SOURCE: + case ARIZONA_DSP2LMIX_INPUT_4_VOLUME: + case ARIZONA_DSP2RMIX_INPUT_1_SOURCE: + case ARIZONA_DSP2RMIX_INPUT_1_VOLUME: + case ARIZONA_DSP2RMIX_INPUT_2_SOURCE: + case ARIZONA_DSP2RMIX_INPUT_2_VOLUME: + case ARIZONA_DSP2RMIX_INPUT_3_SOURCE: + case ARIZONA_DSP2RMIX_INPUT_3_VOLUME: + case ARIZONA_DSP2RMIX_INPUT_4_SOURCE: + case ARIZONA_DSP2RMIX_INPUT_4_VOLUME: + case ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2AUX2MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2AUX3MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2AUX4MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2AUX5MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2AUX6MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3LMIX_INPUT_1_SOURCE: + case ARIZONA_DSP3LMIX_INPUT_1_VOLUME: + case ARIZONA_DSP3LMIX_INPUT_2_SOURCE: + case ARIZONA_DSP3LMIX_INPUT_2_VOLUME: + case ARIZONA_DSP3LMIX_INPUT_3_SOURCE: + case ARIZONA_DSP3LMIX_INPUT_3_VOLUME: + case ARIZONA_DSP3LMIX_INPUT_4_SOURCE: + case ARIZONA_DSP3LMIX_INPUT_4_VOLUME: + case ARIZONA_DSP3RMIX_INPUT_1_SOURCE: + case ARIZONA_DSP3RMIX_INPUT_1_VOLUME: + case ARIZONA_DSP3RMIX_INPUT_2_SOURCE: + case ARIZONA_DSP3RMIX_INPUT_2_VOLUME: + case ARIZONA_DSP3RMIX_INPUT_3_SOURCE: + case ARIZONA_DSP3RMIX_INPUT_3_VOLUME: + case ARIZONA_DSP3RMIX_INPUT_4_SOURCE: + case ARIZONA_DSP3RMIX_INPUT_4_VOLUME: + case ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3AUX2MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3AUX3MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3AUX4MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3AUX5MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3AUX6MIX_INPUT_1_SOURCE: + case ARIZONA_DSP4LMIX_INPUT_1_SOURCE: + case ARIZONA_DSP4LMIX_INPUT_1_VOLUME: + case ARIZONA_DSP4LMIX_INPUT_2_SOURCE: + case ARIZONA_DSP4LMIX_INPUT_2_VOLUME: + case ARIZONA_DSP4LMIX_INPUT_3_SOURCE: + case ARIZONA_DSP4LMIX_INPUT_3_VOLUME: + case ARIZONA_DSP4LMIX_INPUT_4_SOURCE: + case ARIZONA_DSP4LMIX_INPUT_4_VOLUME: + case ARIZONA_DSP4RMIX_INPUT_1_SOURCE: + case ARIZONA_DSP4RMIX_INPUT_1_VOLUME: + case ARIZONA_DSP4RMIX_INPUT_2_SOURCE: + case ARIZONA_DSP4RMIX_INPUT_2_VOLUME: + case ARIZONA_DSP4RMIX_INPUT_3_SOURCE: + case ARIZONA_DSP4RMIX_INPUT_3_VOLUME: + case ARIZONA_DSP4RMIX_INPUT_4_SOURCE: + case ARIZONA_DSP4RMIX_INPUT_4_VOLUME: + case ARIZONA_DSP4AUX1MIX_INPUT_1_SOURCE: + case ARIZONA_DSP4AUX2MIX_INPUT_1_SOURCE: + case ARIZONA_DSP4AUX3MIX_INPUT_1_SOURCE: + case ARIZONA_DSP4AUX4MIX_INPUT_1_SOURCE: + case ARIZONA_DSP4AUX5MIX_INPUT_1_SOURCE: + case ARIZONA_DSP4AUX6MIX_INPUT_1_SOURCE: + case WM8285_DSP5LMIX_INPUT_1_SOURCE: + case WM8285_DSP5LMIX_INPUT_1_VOLUME: + case WM8285_DSP5LMIX_INPUT_2_SOURCE: + case WM8285_DSP5LMIX_INPUT_2_VOLUME: + case WM8285_DSP5LMIX_INPUT_3_SOURCE: + case WM8285_DSP5LMIX_INPUT_3_VOLUME: + case WM8285_DSP5LMIX_INPUT_4_SOURCE: + case WM8285_DSP5LMIX_INPUT_4_VOLUME: + case WM8285_DSP5RMIX_INPUT_1_SOURCE: + case WM8285_DSP5RMIX_INPUT_1_VOLUME: + case WM8285_DSP5RMIX_INPUT_2_SOURCE: + case WM8285_DSP5RMIX_INPUT_2_VOLUME: + case WM8285_DSP5RMIX_INPUT_3_SOURCE: + case WM8285_DSP5RMIX_INPUT_3_VOLUME: + case WM8285_DSP5RMIX_INPUT_4_SOURCE: + case WM8285_DSP5RMIX_INPUT_4_VOLUME: + case WM8285_DSP5AUX1MIX_INPUT_1_SOURCE: + case WM8285_DSP5AUX2MIX_INPUT_1_SOURCE: + case WM8285_DSP5AUX3MIX_INPUT_1_SOURCE: + case WM8285_DSP5AUX4MIX_INPUT_1_SOURCE: + case WM8285_DSP5AUX5MIX_INPUT_1_SOURCE: + case WM8285_DSP5AUX6MIX_INPUT_1_SOURCE: + case ARIZONA_ASRC1LMIX_INPUT_1_SOURCE: + case ARIZONA_ASRC1RMIX_INPUT_1_SOURCE: + case ARIZONA_ASRC2LMIX_INPUT_1_SOURCE: + case ARIZONA_ASRC2RMIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC3DEC3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC3DEC4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC3INT3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC3INT4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC4DEC1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC4DEC2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC4INT1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC4INT2MIX_INPUT_1_SOURCE: + case WM8285_DSP6LMIX_INPUT_1_SOURCE: + case WM8285_DSP6LMIX_INPUT_1_VOLUME: + case WM8285_DSP6LMIX_INPUT_2_SOURCE: + case WM8285_DSP6LMIX_INPUT_2_VOLUME: + case WM8285_DSP6LMIX_INPUT_3_SOURCE: + case WM8285_DSP6LMIX_INPUT_3_VOLUME: + case WM8285_DSP6LMIX_INPUT_4_SOURCE: + case WM8285_DSP6LMIX_INPUT_4_VOLUME: + case WM8285_DSP6RMIX_INPUT_1_SOURCE: + case WM8285_DSP6RMIX_INPUT_1_VOLUME: + case WM8285_DSP6RMIX_INPUT_2_SOURCE: + case WM8285_DSP6RMIX_INPUT_2_VOLUME: + case WM8285_DSP6RMIX_INPUT_3_SOURCE: + case WM8285_DSP6RMIX_INPUT_3_VOLUME: + case WM8285_DSP6RMIX_INPUT_4_SOURCE: + case WM8285_DSP6RMIX_INPUT_4_VOLUME: + case WM8285_DSP6AUX1MIX_INPUT_1_SOURCE: + case WM8285_DSP6AUX2MIX_INPUT_1_SOURCE: + case WM8285_DSP6AUX3MIX_INPUT_1_SOURCE: + case WM8285_DSP6AUX4MIX_INPUT_1_SOURCE: + case WM8285_DSP6AUX5MIX_INPUT_1_SOURCE: + case WM8285_DSP6AUX6MIX_INPUT_1_SOURCE: + case WM8285_DSP7LMIX_INPUT_1_SOURCE: + case WM8285_DSP7LMIX_INPUT_1_VOLUME: + case WM8285_DSP7LMIX_INPUT_2_SOURCE: + case WM8285_DSP7LMIX_INPUT_2_VOLUME: + case WM8285_DSP7LMIX_INPUT_3_SOURCE: + case WM8285_DSP7LMIX_INPUT_3_VOLUME: + case WM8285_DSP7LMIX_INPUT_4_SOURCE: + case WM8285_DSP7LMIX_INPUT_4_VOLUME: + case WM8285_DSP7RMIX_INPUT_1_SOURCE: + case WM8285_DSP7RMIX_INPUT_1_VOLUME: + case WM8285_DSP7RMIX_INPUT_2_SOURCE: + case WM8285_DSP7RMIX_INPUT_2_VOLUME: + case WM8285_DSP7RMIX_INPUT_3_SOURCE: + case WM8285_DSP7RMIX_INPUT_3_VOLUME: + case WM8285_DSP7RMIX_INPUT_4_SOURCE: + case WM8285_DSP7RMIX_INPUT_4_VOLUME: + case WM8285_DSP7AUX1MIX_INPUT_1_SOURCE: + case WM8285_DSP7AUX2MIX_INPUT_1_SOURCE: + case WM8285_DSP7AUX3MIX_INPUT_1_SOURCE: + case WM8285_DSP7AUX4MIX_INPUT_1_SOURCE: + case WM8285_DSP7AUX5MIX_INPUT_1_SOURCE: + case WM8285_DSP7AUX6MIX_INPUT_1_SOURCE: + case ARIZONA_JACK_DETECT_DEBOUNCE: + case ARIZONA_FX_CTRL1: + case ARIZONA_FX_CTRL2: + case ARIZONA_EQ1_1: + case ARIZONA_EQ1_2: + case ARIZONA_EQ1_3: + case ARIZONA_EQ1_4: + case ARIZONA_EQ1_5: + case ARIZONA_EQ1_6: + case ARIZONA_EQ1_7: + case ARIZONA_EQ1_8: + case ARIZONA_EQ1_9: + case ARIZONA_EQ1_10: + case ARIZONA_EQ1_11: + case ARIZONA_EQ1_12: + case ARIZONA_EQ1_13: + case ARIZONA_EQ1_14: + case ARIZONA_EQ1_15: + case ARIZONA_EQ1_16: + case ARIZONA_EQ1_17: + case ARIZONA_EQ1_18: + case ARIZONA_EQ1_19: + case ARIZONA_EQ1_20: + case ARIZONA_EQ1_21: + case ARIZONA_EQ2_1: + case ARIZONA_EQ2_2: + case ARIZONA_EQ2_3: + case ARIZONA_EQ2_4: + case ARIZONA_EQ2_5: + case ARIZONA_EQ2_6: + case ARIZONA_EQ2_7: + case ARIZONA_EQ2_8: + case ARIZONA_EQ2_9: + case ARIZONA_EQ2_10: + case ARIZONA_EQ2_11: + case ARIZONA_EQ2_12: + case ARIZONA_EQ2_13: + case ARIZONA_EQ2_14: + case ARIZONA_EQ2_15: + case ARIZONA_EQ2_16: + case ARIZONA_EQ2_17: + case ARIZONA_EQ2_18: + case ARIZONA_EQ2_19: + case ARIZONA_EQ2_20: + case ARIZONA_EQ2_21: + case ARIZONA_EQ3_1: + case ARIZONA_EQ3_2: + case ARIZONA_EQ3_3: + case ARIZONA_EQ3_4: + case ARIZONA_EQ3_5: + case ARIZONA_EQ3_6: + case ARIZONA_EQ3_7: + case ARIZONA_EQ3_8: + case ARIZONA_EQ3_9: + case ARIZONA_EQ3_10: + case ARIZONA_EQ3_11: + case ARIZONA_EQ3_12: + case ARIZONA_EQ3_13: + case ARIZONA_EQ3_14: + case ARIZONA_EQ3_15: + case ARIZONA_EQ3_16: + case ARIZONA_EQ3_17: + case ARIZONA_EQ3_18: + case ARIZONA_EQ3_19: + case ARIZONA_EQ3_20: + case ARIZONA_EQ3_21: + case ARIZONA_EQ4_1: + case ARIZONA_EQ4_2: + case ARIZONA_EQ4_3: + case ARIZONA_EQ4_4: + case ARIZONA_EQ4_5: + case ARIZONA_EQ4_6: + case ARIZONA_EQ4_7: + case ARIZONA_EQ4_8: + case ARIZONA_EQ4_9: + case ARIZONA_EQ4_10: + case ARIZONA_EQ4_11: + case ARIZONA_EQ4_12: + case ARIZONA_EQ4_13: + case ARIZONA_EQ4_14: + case ARIZONA_EQ4_15: + case ARIZONA_EQ4_16: + case ARIZONA_EQ4_17: + case ARIZONA_EQ4_18: + case ARIZONA_EQ4_19: + case ARIZONA_EQ4_20: + case ARIZONA_EQ4_21: + case ARIZONA_DRC1_CTRL1: + case ARIZONA_DRC1_CTRL2: + case ARIZONA_DRC1_CTRL3: + case ARIZONA_DRC1_CTRL4: + case ARIZONA_DRC1_CTRL5: + case WM8285_DRC2_CTRL1: + case WM8285_DRC2_CTRL2: + case WM8285_DRC2_CTRL3: + case WM8285_DRC2_CTRL4: + case WM8285_DRC2_CTRL5: + case ARIZONA_HPLPF1_1: + case ARIZONA_HPLPF1_2: + case ARIZONA_HPLPF2_1: + case ARIZONA_HPLPF2_2: + case ARIZONA_HPLPF3_1: + case ARIZONA_HPLPF3_2: + case ARIZONA_HPLPF4_1: + case ARIZONA_HPLPF4_2: + case ARIZONA_ASRC_ENABLE: + case ARIZONA_ASRC_STATUS: + case ARIZONA_ASRC_RATE1: + case ARIZONA_ISRC_1_CTRL_1: + case ARIZONA_ISRC_1_CTRL_2: + case ARIZONA_ISRC_1_CTRL_3: + case ARIZONA_ISRC_2_CTRL_1: + case ARIZONA_ISRC_2_CTRL_2: + case ARIZONA_ISRC_2_CTRL_3: + case ARIZONA_ISRC_3_CTRL_1: + case ARIZONA_ISRC_3_CTRL_2: + case ARIZONA_ISRC_3_CTRL_3: + case ARIZONA_ISRC_4_CTRL_1: + case ARIZONA_ISRC_4_CTRL_2: + case ARIZONA_ISRC_4_CTRL_3: + case ARIZONA_CLOCK_CONTROL: + case ARIZONA_ANC_SRC: + case ARIZONA_DSP_STATUS: + case ARIZONA_ANC_COEFF_START ... ARIZONA_ANC_COEFF_END: + case ARIZONA_FCL_FILTER_CONTROL: + case ARIZONA_FCL_ADC_REFORMATTER_CONTROL: + case ARIZONA_FCL_COEFF_START ... ARIZONA_FCL_COEFF_END: + case WM8285_FCR_FILTER_CONTROL: + case WM8285_FCR_ADC_REFORMATTER_CONTROL: + case WM8285_FCR_COEFF_START ... WM8285_FCR_COEFF_END: + case WM8285_GPIO1_CTRL_1: + case WM8285_GPIO1_CTRL_2: + case WM8285_GPIO2_CTRL_1: + case WM8285_GPIO2_CTRL_2: + case WM8285_GPIO3_CTRL_1: + case WM8285_GPIO3_CTRL_2: + case WM8285_GPIO4_CTRL_1: + case WM8285_GPIO4_CTRL_2: + case WM8285_GPIO5_CTRL_1: + case WM8285_GPIO5_CTRL_2: + case WM8285_GPIO6_CTRL_1: + case WM8285_GPIO6_CTRL_2: + case WM8285_GPIO7_CTRL_1: + case WM8285_GPIO7_CTRL_2: + case WM8285_GPIO8_CTRL_1: + case WM8285_GPIO8_CTRL_2: + case WM8285_GPIO9_CTRL_1: + case WM8285_GPIO9_CTRL_2: + case WM8285_GPIO10_CTRL_1: + case WM8285_GPIO10_CTRL_2: + case WM8285_GPIO11_CTRL_1: + case WM8285_GPIO11_CTRL_2: + case WM8285_GPIO12_CTRL_1: + case WM8285_GPIO12_CTRL_2: + case WM8285_GPIO13_CTRL_1: + case WM8285_GPIO13_CTRL_2: + case WM8285_GPIO14_CTRL_1: + case WM8285_GPIO14_CTRL_2: + case WM8285_GPIO15_CTRL_1: + case WM8285_GPIO15_CTRL_2: + case WM8285_GPIO16_CTRL_1: + case WM8285_GPIO16_CTRL_2: + case WM8285_GPIO17_CTRL_1: + case WM8285_GPIO17_CTRL_2: + case WM8285_GPIO18_CTRL_1: + case WM8285_GPIO18_CTRL_2: + case WM8285_GPIO19_CTRL_1: + case WM8285_GPIO19_CTRL_2: + case WM8285_GPIO20_CTRL_1: + case WM8285_GPIO20_CTRL_2: + case WM8285_GPIO21_CTRL_1: + case WM8285_GPIO21_CTRL_2: + case WM8285_GPIO22_CTRL_1: + case WM8285_GPIO22_CTRL_2: + case WM8285_GPIO23_CTRL_1: + case WM8285_GPIO23_CTRL_2: + case WM8285_GPIO24_CTRL_1: + case WM8285_GPIO24_CTRL_2: + case WM8285_GPIO25_CTRL_1: + case WM8285_GPIO25_CTRL_2: + case WM8285_GPIO26_CTRL_1: + case WM8285_GPIO26_CTRL_2: + case WM8285_GPIO27_CTRL_1: + case WM8285_GPIO27_CTRL_2: + case WM8285_GPIO28_CTRL_1: + case WM8285_GPIO28_CTRL_2: + case WM8285_GPIO29_CTRL_1: + case WM8285_GPIO29_CTRL_2: + case WM8285_GPIO30_CTRL_1: + case WM8285_GPIO30_CTRL_2: + case WM8285_GPIO31_CTRL_1: + case WM8285_GPIO31_CTRL_2: + case WM8285_GPIO32_CTRL_1: + case WM8285_GPIO32_CTRL_2: + case WM8285_GPIO33_CTRL_1: + case WM8285_GPIO33_CTRL_2: + case WM8285_GPIO34_CTRL_1: + case WM8285_GPIO34_CTRL_2: + case WM8285_GPIO35_CTRL_1: + case WM8285_GPIO35_CTRL_2: + case WM8285_GPIO36_CTRL_1: + case WM8285_GPIO36_CTRL_2: + case WM8285_GPIO37_CTRL_1: + case WM8285_GPIO37_CTRL_2: + case WM8285_GPIO38_CTRL_1: + case WM8285_GPIO38_CTRL_2: + case WM8285_GPIO39_CTRL_1: + case WM8285_GPIO39_CTRL_2: + case WM8285_GPIO40_CTRL_1: + case WM8285_GPIO40_CTRL_2: + case WM8285_IRQ1_STATUS_1: + case WM8285_IRQ1_STATUS_2: + case WM8285_IRQ1_STATUS_6: + case WM8285_IRQ1_STATUS_7: + case WM8285_IRQ1_STATUS_9: + case WM8285_IRQ1_STATUS_11: + case WM8285_IRQ1_STATUS_12: + case WM8285_IRQ1_STATUS_13: + case WM8285_IRQ1_STATUS_14: + case WM8285_IRQ1_STATUS_15: + case WM8285_IRQ1_STATUS_17: + case WM8285_IRQ1_STATUS_18: + case WM8285_IRQ1_STATUS_19: + case WM8285_IRQ1_STATUS_21: + case WM8285_IRQ1_STATUS_22: + case WM8285_IRQ1_STATUS_23: + case WM8285_IRQ1_STATUS_24: + case WM8285_IRQ1_STATUS_25: + case WM8285_IRQ1_STATUS_27: + case WM8285_IRQ1_STATUS_28: + case WM8285_IRQ1_STATUS_30: + case WM8285_IRQ1_STATUS_31: + case WM8285_IRQ1_STATUS_32: + case WM8285_IRQ1_MASK_1: + case WM8285_IRQ1_MASK_2: + case WM8285_IRQ1_MASK_6: + case WM8285_IRQ1_MASK_7: + case WM8285_IRQ1_MASK_9: + case WM8285_IRQ1_MASK_11: + case WM8285_IRQ1_MASK_12: + case WM8285_IRQ1_MASK_13: + case WM8285_IRQ1_MASK_14: + case WM8285_IRQ1_MASK_15: + case WM8285_IRQ1_MASK_17: + case WM8285_IRQ1_MASK_18: + case WM8285_IRQ1_MASK_19: + case WM8285_IRQ1_MASK_21: + case WM8285_IRQ1_MASK_22: + case WM8285_IRQ1_MASK_23: + case WM8285_IRQ1_MASK_24: + case WM8285_IRQ1_MASK_25: + case WM8285_IRQ1_MASK_27: + case WM8285_IRQ1_MASK_28: + case WM8285_IRQ1_MASK_30: + case WM8285_IRQ1_MASK_31: + case WM8285_IRQ1_MASK_32: + case WM8285_IRQ1_RAW_STATUS_1: + case WM8285_IRQ1_RAW_STATUS_2: + case WM8285_IRQ1_RAW_STATUS_7: + case WM8285_IRQ1_RAW_STATUS_9: + case WM8285_IRQ1_RAW_STATUS_11: + case WM8285_IRQ1_RAW_STATUS_12: + case WM8285_IRQ1_RAW_STATUS_13: + case WM8285_IRQ1_RAW_STATUS_14: + case WM8285_IRQ1_RAW_STATUS_15: + case WM8285_IRQ1_RAW_STATUS_17: + case WM8285_IRQ1_RAW_STATUS_18: + case WM8285_IRQ1_RAW_STATUS_19: + case WM8285_IRQ1_RAW_STATUS_21: + case WM8285_IRQ1_RAW_STATUS_22: + case WM8285_IRQ1_RAW_STATUS_23: + case WM8285_IRQ1_RAW_STATUS_24: + case WM8285_IRQ1_RAW_STATUS_25: + case WM8285_IRQ1_RAW_STATUS_30: + case WM8285_IRQ1_RAW_STATUS_31: + case WM8285_IRQ1_RAW_STATUS_32: + case WM8285_IRQ2_STATUS_9: + case WM8285_IRQ2_MASK_9: + case WM8285_IRQ2_RAW_STATUS_9: + return true; + default: + return false; + } +} + +static bool wm8285_16bit_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_SOFTWARE_RESET: + case ARIZONA_DEVICE_REVISION: + case ARIZONA_HAPTICS_STATUS: + case ARIZONA_SAMPLE_RATE_1_STATUS: + case ARIZONA_SAMPLE_RATE_2_STATUS: + case ARIZONA_SAMPLE_RATE_3_STATUS: + case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: + case ARIZONA_MIC_DETECT_3: + case ARIZONA_MIC_DETECT_4: + case ARIZONA_HEADPHONE_DETECT_2: + case ARIZONA_INPUT_ENABLES_STATUS: + case ARIZONA_OUTPUT_STATUS_1: + case ARIZONA_RAW_OUTPUT_STATUS_1: + case ARIZONA_ADC_VCO_CAL_4: + case ARIZONA_ADC_VCO_CAL_5: + case ARIZONA_ADC_VCO_CAL_6: + case ARIZONA_ADC_VCO_CAL_7: + case ARIZONA_ADC_VCO_CAL_8: + case ARIZONA_ADC_VCO_CAL_9: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_1: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_2: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_3: + case ARIZONA_SLIMBUS_RX_PORT_STATUS: + case ARIZONA_SLIMBUS_TX_PORT_STATUS: + case ARIZONA_FX_CTRL2: + case ARIZONA_ASRC_STATUS: + case WM8285_IRQ1_STATUS_1: + case WM8285_IRQ1_STATUS_2: + case WM8285_IRQ1_STATUS_6: + case WM8285_IRQ1_STATUS_7: + case WM8285_IRQ1_STATUS_9: + case WM8285_IRQ1_STATUS_11: + case WM8285_IRQ1_STATUS_12: + case WM8285_IRQ1_STATUS_13: + case WM8285_IRQ1_STATUS_14: + case WM8285_IRQ1_STATUS_15: + case WM8285_IRQ1_STATUS_17: + case WM8285_IRQ1_STATUS_18: + case WM8285_IRQ1_STATUS_19: + case WM8285_IRQ1_STATUS_21: + case WM8285_IRQ1_STATUS_22: + case WM8285_IRQ1_STATUS_23: + case WM8285_IRQ1_STATUS_24: + case WM8285_IRQ1_STATUS_25: + case WM8285_IRQ1_STATUS_27: + case WM8285_IRQ1_STATUS_28: + case WM8285_IRQ1_STATUS_30: + case WM8285_IRQ1_STATUS_31: + case WM8285_IRQ1_STATUS_32: + case WM8285_IRQ1_RAW_STATUS_1: + case WM8285_IRQ1_RAW_STATUS_2: + case WM8285_IRQ1_RAW_STATUS_7: + case WM8285_IRQ1_RAW_STATUS_9: + case WM8285_IRQ1_RAW_STATUS_11: + case WM8285_IRQ1_RAW_STATUS_12: + case WM8285_IRQ1_RAW_STATUS_13: + case WM8285_IRQ1_RAW_STATUS_14: + case WM8285_IRQ1_RAW_STATUS_15: + case WM8285_IRQ1_RAW_STATUS_17: + case WM8285_IRQ1_RAW_STATUS_18: + case WM8285_IRQ1_RAW_STATUS_19: + case WM8285_IRQ1_RAW_STATUS_21: + case WM8285_IRQ1_RAW_STATUS_22: + case WM8285_IRQ1_RAW_STATUS_23: + case WM8285_IRQ1_RAW_STATUS_24: + case WM8285_IRQ1_RAW_STATUS_25: + case WM8285_IRQ1_RAW_STATUS_30: + case WM8285_IRQ1_RAW_STATUS_31: + case WM8285_IRQ1_RAW_STATUS_32: + case WM8285_IRQ2_STATUS_9: + case WM8285_IRQ2_RAW_STATUS_9: + return true; + default: + return false; + } +} + +static bool wm8285_32bit_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_WSEQ_SEQUENCE_1 ... ARIZONA_WSEQ_SEQUENCE_508: + case WM8285_DSP1_CONFIG ... WM8285_DSP1_SCRATCH_3: + case WM8285_DSP2_CONFIG ... WM8285_DSP2_SCRATCH_3: + case WM8285_DSP3_CONFIG ... WM8285_DSP3_SCRATCH_3: + case WM8285_DSP4_CONFIG ... WM8285_DSP4_SCRATCH_3: + case WM8285_DSP5_CONFIG ... WM8285_DSP5_SCRATCH_3: + case WM8285_DSP6_CONFIG ... WM8285_DSP6_SCRATCH_3: + case WM8285_DSP7_CONFIG ... WM8285_DSP7_SCRATCH_3: + return true; + default: + return wm8285_is_adsp_memory(dev, reg); + } +} + +static bool wm8285_32bit_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_WSEQ_SEQUENCE_1 ... ARIZONA_WSEQ_SEQUENCE_508: + case WM8285_DSP1_CONFIG ... WM8285_DSP1_SCRATCH_3: + case WM8285_DSP2_CONFIG ... WM8285_DSP2_SCRATCH_3: + case WM8285_DSP3_CONFIG ... WM8285_DSP3_SCRATCH_3: + case WM8285_DSP4_CONFIG ... WM8285_DSP4_SCRATCH_3: + case WM8285_DSP5_CONFIG ... WM8285_DSP5_SCRATCH_3: + case WM8285_DSP6_CONFIG ... WM8285_DSP6_SCRATCH_3: + case WM8285_DSP7_CONFIG ... WM8285_DSP7_SCRATCH_3: + return true; + default: + return wm8285_is_adsp_memory(dev, reg); + } +} + +const struct regmap_config wm8285_16bit_spi_regmap = { + .name = "wm8285_16bit", + .reg_bits = 32, + .pad_bits = 16, + .val_bits = 16, + + .max_register = 0x2fff, + .readable_reg = wm8285_16bit_readable_register, + .volatile_reg = wm8285_16bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = wm8285_reg_default, + .num_reg_defaults = ARRAY_SIZE(wm8285_reg_default), +}; +EXPORT_SYMBOL_GPL(wm8285_16bit_spi_regmap); + +const struct regmap_config wm8285_16bit_i2c_regmap = { + .name = "wm8285_16bit", + .reg_bits = 32, + .val_bits = 16, + + .max_register = 0x2fff, + .readable_reg = wm8285_16bit_readable_register, + .volatile_reg = wm8285_16bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = wm8285_reg_default, + .num_reg_defaults = ARRAY_SIZE(wm8285_reg_default), +}; +EXPORT_SYMBOL_GPL(wm8285_16bit_i2c_regmap); + +const struct regmap_config wm8285_32bit_spi_regmap = { + .name = "wm8285_32bit", + .reg_bits = 32, + .reg_stride = 2, + .pad_bits = 16, + .val_bits = 32, + + .max_register = WM8285_DSP7_SCRATCH_3, + .readable_reg = wm8285_32bit_readable_register, + .volatile_reg = wm8285_32bit_volatile_register, + + .cache_type = REGCACHE_NONE, +}; +EXPORT_SYMBOL_GPL(wm8285_32bit_spi_regmap); + +const struct regmap_config wm8285_32bit_i2c_regmap = { + .name = "wm8285_32bit", + .reg_bits = 32, + .reg_stride = 2, + .val_bits = 32, + + .max_register = WM8285_DSP7_SCRATCH_3, + .readable_reg = wm8285_32bit_readable_register, + .volatile_reg = wm8285_32bit_volatile_register, + + .cache_type = REGCACHE_NONE, +}; +EXPORT_SYMBOL_GPL(wm8285_32bit_i2c_regmap); diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index c3f8c7265ac..f01cc3b0762 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -28,6 +28,8 @@ enum arizona_type { WM8280 = 4, WM8998 = 5, WM1814 = 6, + WM8285 = 7, + WM1840 = 8, WM1831 = 9, CS47L24 = 10, }; @@ -107,14 +109,18 @@ enum arizona_type { #define ARIZONA_IRQ_HP1R_SC_POS 72 #define ARIZONA_IRQ_HP1L_SC_NEG 73 #define ARIZONA_IRQ_HP1L_SC_POS 74 +#define ARIZONA_IRQ_FLL3_LOCK 75 +#define ARIZONA_IRQ_FLL3_CLOCK_OK 76 -#define ARIZONA_NUM_IRQ 75 +#define ARIZONA_NUM_IRQ 77 #define ARIZONA_HP_SHORT_IMPEDANCE 4 struct snd_soc_dapm_context; struct arizona { struct regmap *regmap; + struct regmap *regmap_32bit; + struct device *dev; enum arizona_type type; @@ -179,6 +185,7 @@ int wm5102_patch(struct arizona *arizona); int florida_patch(struct arizona *arizona); int wm8997_patch(struct arizona *arizona); int wm8998_patch(struct arizona *arizona); +int wm8285_patch(struct arizona *arizona); int cs47l24_patch(struct arizona *arizona); extern int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index a5be10d682d..980c84ec274 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -45,7 +45,8 @@ #define ARIZONA_GPN_FN_SHIFT 0 /* GPN_FN - [6:0] */ #define ARIZONA_GPN_FN_WIDTH 7 /* GPN_FN - [6:0] */ -#define ARIZONA_MAX_GPIO 5 +#define ARIZONA_MAX_GPIO_REGS 5 +#define WM8285_MAX_GPIO_REGS 80 #define ARIZONA_32KZ_MCLK1 1 #define ARIZONA_32KZ_MCLK2 2 @@ -58,7 +59,7 @@ #define ARIZONA_DMIC_MICBIAS2 2 #define ARIZONA_DMIC_MICBIAS3 3 -#define ARIZONA_MAX_MICBIAS 3 +#define ARIZONA_MAX_MICBIAS 4 #define ARIZONA_INMODE_DIFF 0 #define ARIZONA_INMODE_SE 1 @@ -76,7 +77,7 @@ /* Treat INT_MAX impedance as open circuit */ #define ARIZONA_HP_Z_OPEN INT_MAX -#define ARIZONA_MAX_DSP 4 +#define ARIZONA_MAX_DSP 7 struct regulator_init_data; @@ -121,7 +122,7 @@ struct arizona_pdata { int gpio_base; /** Pin state for GPIO pins */ - int gpio_defaults[ARIZONA_MAX_GPIO]; + unsigned int gpio_defaults[WM8285_MAX_GPIO_REGS]; /** * Maximum number of channels clocks will be generated for, diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index f99b9f1db9e..c76b83e3bd6 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -76,6 +76,8 @@ #define ARIZONA_ASYNC_SAMPLE_RATE_2 0x114 #define ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS 0x11B #define ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS 0x11C +#define WM8285_DSP_CLOCK_1 0x120 +#define WM8285_DSP_CLOCK_2 0x122 #define ARIZONA_OUTPUT_SYSTEM_CLOCK 0x149 #define ARIZONA_OUTPUT_ASYNC_CLOCK 0x14A #define ARIZONA_RATE_ESTIMATOR_1 0x152 @@ -120,6 +122,24 @@ #define ARIZONA_FLL2_SYNCHRONISER_7 0x1A7 #define ARIZONA_FLL2_SPREAD_SPECTRUM 0x1A9 #define ARIZONA_FLL2_GPIO_CLOCK 0x1AA +#define ARIZONA_FLL3_CONTROL_1 0x1B1 +#define ARIZONA_FLL3_CONTROL_2 0x1B2 +#define ARIZONA_FLL3_CONTROL_3 0x1B3 +#define ARIZONA_FLL3_CONTROL_4 0x1B4 +#define ARIZONA_FLL3_CONTROL_5 0x1B5 +#define ARIZONA_FLL3_CONTROL_6 0x1B6 +#define ARIZONA_FLL3_LOOP_FILTER_TEST_1 0x1B7 +#define ARIZONA_FLL3_NCO_TEST_0 0x1B8 +#define ARIZONA_FLL3_CONTROL_7 0x1B9 +#define ARIZONA_FLL3_SYNCHRONISER_1 0x1C1 +#define ARIZONA_FLL3_SYNCHRONISER_2 0x1C2 +#define ARIZONA_FLL3_SYNCHRONISER_3 0x1C3 +#define ARIZONA_FLL3_SYNCHRONISER_4 0x1C4 +#define ARIZONA_FLL3_SYNCHRONISER_5 0x1C5 +#define ARIZONA_FLL3_SYNCHRONISER_6 0x1C6 +#define ARIZONA_FLL3_SYNCHRONISER_7 0x1C7 +#define ARIZONA_FLL3_SPREAD_SPECTRUM 0x1C9 +#define ARIZONA_FLL3_GPIO_CLOCK 0x1CA #define ARIZONA_MIC_CHARGE_PUMP_1 0x200 #define ARIZONA_LDO1_CONTROL_1 0x210 #define ARIZONA_LDO1_CONTROL_2 0x212 @@ -127,6 +147,7 @@ #define ARIZONA_MIC_BIAS_CTRL_1 0x218 #define ARIZONA_MIC_BIAS_CTRL_2 0x219 #define ARIZONA_MIC_BIAS_CTRL_3 0x21A +#define ARIZONA_MIC_BIAS_CTRL_4 0x21B #define ARIZONA_HP_CTRL_1L 0x225 #define ARIZONA_HP_CTRL_1R 0x226 #define ARIZONA_HP_CTRL_2L 0x227 @@ -148,6 +169,7 @@ #define ARIZONA_MIC_DETECT_LEVEL_4 0x2A9 #define ARIZONA_MIC_DETECT_4 0x2AB #define ARIZONA_MIC_NOISE_MIX_CONTROL_1 0x2C3 +#define WM8285_MICD_CLAMP_CONTROL 0x2C6 #define ARIZONA_ISOLATION_CONTROL 0x2CB #define ARIZONA_JACK_DETECT_ANALOGUE 0x2D3 #define ARIZONA_INPUT_ENABLES 0x300 @@ -179,6 +201,18 @@ #define ARIZONA_IN4R_CONTROL 0x32C #define ARIZONA_ADC_DIGITAL_VOLUME_4R 0x32D #define ARIZONA_DMIC4R_CONTROL 0x32E +#define ARIZONA_IN5L_CONTROL 0x330 +#define ARIZONA_ADC_DIGITAL_VOLUME_5L 0x331 +#define ARIZONA_DMIC5L_CONTROL 0x332 +#define ARIZONA_IN5R_CONTROL 0x334 +#define ARIZONA_ADC_DIGITAL_VOLUME_5R 0x335 +#define ARIZONA_DMIC5R_CONTROL 0x336 +#define ARIZONA_IN6L_CONTROL 0x338 +#define ARIZONA_ADC_DIGITAL_VOLUME_6L 0x339 +#define ARIZONA_DMIC6L_CONTROL 0x33A +#define ARIZONA_IN6R_CONTROL 0x33C +#define ARIZONA_ADC_DIGITAL_VOLUME_6R 0x33D +#define ARIZONA_DMIC6R_CONTROL 0x33E #define ARIZONA_ADC_VCO_CAL_4 0x393 #define ARIZONA_ADC_VCO_CAL_5 0x394 #define ARIZONA_ADC_VCO_CAL_6 0x395 @@ -304,12 +338,16 @@ #define ARIZONA_AIF2_FRAME_CTRL_6 0x54C #define ARIZONA_AIF2_FRAME_CTRL_7 0x54D #define ARIZONA_AIF2_FRAME_CTRL_8 0x54E +#define ARIZONA_AIF2_FRAME_CTRL_9 0x54F +#define ARIZONA_AIF2_FRAME_CTRL_10 0x550 #define ARIZONA_AIF2_FRAME_CTRL_11 0x551 #define ARIZONA_AIF2_FRAME_CTRL_12 0x552 #define ARIZONA_AIF2_FRAME_CTRL_13 0x553 #define ARIZONA_AIF2_FRAME_CTRL_14 0x554 #define ARIZONA_AIF2_FRAME_CTRL_15 0x555 #define ARIZONA_AIF2_FRAME_CTRL_16 0x556 +#define ARIZONA_AIF2_FRAME_CTRL_17 0x557 +#define ARIZONA_AIF2_FRAME_CTRL_18 0x558 #define ARIZONA_AIF2_TX_ENABLES 0x559 #define ARIZONA_AIF2_RX_ENABLES 0x55A #define ARIZONA_AIF2_FORCE_WRITE 0x55B @@ -329,6 +367,22 @@ #define ARIZONA_AIF3_TX_ENABLES 0x599 #define ARIZONA_AIF3_RX_ENABLES 0x59A #define ARIZONA_AIF3_FORCE_WRITE 0x59B +#define ARIZONA_AIF4_BCLK_CTRL 0x5A0 +#define ARIZONA_AIF4_TX_PIN_CTRL 0x5A1 +#define ARIZONA_AIF4_RX_PIN_CTRL 0x5A2 +#define ARIZONA_AIF4_RATE_CTRL 0x5A3 +#define ARIZONA_AIF4_FORMAT 0x5A4 +#define ARIZONA_AIF4_TX_BCLK_RATE 0x5A5 +#define ARIZONA_AIF4_RX_BCLK_RATE 0x5A6 +#define ARIZONA_AIF4_FRAME_CTRL_1 0x5A7 +#define ARIZONA_AIF4_FRAME_CTRL_2 0x5A8 +#define ARIZONA_AIF4_FRAME_CTRL_3 0x5A9 +#define ARIZONA_AIF4_FRAME_CTRL_4 0x5AA +#define ARIZONA_AIF4_FRAME_CTRL_11 0x5B1 +#define ARIZONA_AIF4_FRAME_CTRL_12 0x5B2 +#define ARIZONA_AIF4_TX_ENABLES 0x5B9 +#define ARIZONA_AIF4_RX_ENABLES 0x5BA +#define ARIZONA_AIF4_FORCE_WRITE 0x5BB #define ARIZONA_SPD1_TX_CONTROL 0x5C2 #define ARIZONA_SPD1_TX_CHANNEL_STATUS_1 0x5C3 #define ARIZONA_SPD1_TX_CHANNEL_STATUS_2 0x5C4 @@ -586,6 +640,22 @@ #define ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME 0x76D #define ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE 0x76E #define ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME 0x76F +#define ARIZONA_AIF2TX7MIX_INPUT_1_SOURCE 0x770 +#define ARIZONA_AIF2TX7MIX_INPUT_1_VOLUME 0x771 +#define ARIZONA_AIF2TX7MIX_INPUT_2_SOURCE 0x772 +#define ARIZONA_AIF2TX7MIX_INPUT_2_VOLUME 0x773 +#define ARIZONA_AIF2TX7MIX_INPUT_3_SOURCE 0x774 +#define ARIZONA_AIF2TX7MIX_INPUT_3_VOLUME 0x775 +#define ARIZONA_AIF2TX7MIX_INPUT_4_SOURCE 0x776 +#define ARIZONA_AIF2TX7MIX_INPUT_4_VOLUME 0x777 +#define ARIZONA_AIF2TX8MIX_INPUT_1_SOURCE 0x778 +#define ARIZONA_AIF2TX8MIX_INPUT_1_VOLUME 0x779 +#define ARIZONA_AIF2TX8MIX_INPUT_2_SOURCE 0x77A +#define ARIZONA_AIF2TX8MIX_INPUT_2_VOLUME 0x77B +#define ARIZONA_AIF2TX8MIX_INPUT_3_SOURCE 0x77C +#define ARIZONA_AIF2TX8MIX_INPUT_3_VOLUME 0x77D +#define ARIZONA_AIF2TX8MIX_INPUT_4_SOURCE 0x77E +#define ARIZONA_AIF2TX8MIX_INPUT_4_VOLUME 0x77F #define ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE 0x780 #define ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME 0x781 #define ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE 0x782 @@ -602,6 +672,22 @@ #define ARIZONA_AIF3TX2MIX_INPUT_3_VOLUME 0x78D #define ARIZONA_AIF3TX2MIX_INPUT_4_SOURCE 0x78E #define ARIZONA_AIF3TX2MIX_INPUT_4_VOLUME 0x78F +#define ARIZONA_AIF4TX1MIX_INPUT_1_SOURCE 0x7A0 +#define ARIZONA_AIF4TX1MIX_INPUT_1_VOLUME 0x7A1 +#define ARIZONA_AIF4TX1MIX_INPUT_2_SOURCE 0x7A2 +#define ARIZONA_AIF4TX1MIX_INPUT_2_VOLUME 0x7A3 +#define ARIZONA_AIF4TX1MIX_INPUT_3_SOURCE 0x7A4 +#define ARIZONA_AIF4TX1MIX_INPUT_3_VOLUME 0x7A5 +#define ARIZONA_AIF4TX1MIX_INPUT_4_SOURCE 0x7A6 +#define ARIZONA_AIF4TX1MIX_INPUT_4_VOLUME 0x7A7 +#define ARIZONA_AIF4TX2MIX_INPUT_1_SOURCE 0x7A8 +#define ARIZONA_AIF4TX2MIX_INPUT_1_VOLUME 0x7A9 +#define ARIZONA_AIF4TX2MIX_INPUT_2_SOURCE 0x7AA +#define ARIZONA_AIF4TX2MIX_INPUT_2_VOLUME 0x7AB +#define ARIZONA_AIF4TX2MIX_INPUT_3_SOURCE 0x7AC +#define ARIZONA_AIF4TX2MIX_INPUT_3_VOLUME 0x7AD +#define ARIZONA_AIF4TX2MIX_INPUT_4_SOURCE 0x7AE +#define ARIZONA_AIF4TX2MIX_INPUT_4_VOLUME 0x7AF #define ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE 0x7C0 #define ARIZONA_SLIMTX1MIX_INPUT_1_VOLUME 0x7C1 #define ARIZONA_SLIMTX1MIX_INPUT_2_SOURCE 0x7C2 @@ -854,6 +940,28 @@ #define ARIZONA_DSP4AUX4MIX_INPUT_1_SOURCE 0xA28 #define ARIZONA_DSP4AUX5MIX_INPUT_1_SOURCE 0xA30 #define ARIZONA_DSP4AUX6MIX_INPUT_1_SOURCE 0xA38 +#define WM8285_DSP5LMIX_INPUT_1_SOURCE 0xA40 +#define WM8285_DSP5LMIX_INPUT_1_VOLUME 0xA41 +#define WM8285_DSP5LMIX_INPUT_2_SOURCE 0xA42 +#define WM8285_DSP5LMIX_INPUT_2_VOLUME 0xA43 +#define WM8285_DSP5LMIX_INPUT_3_SOURCE 0xA44 +#define WM8285_DSP5LMIX_INPUT_3_VOLUME 0xA45 +#define WM8285_DSP5LMIX_INPUT_4_SOURCE 0xA46 +#define WM8285_DSP5LMIX_INPUT_4_VOLUME 0xA47 +#define WM8285_DSP5RMIX_INPUT_1_SOURCE 0xA48 +#define WM8285_DSP5RMIX_INPUT_1_VOLUME 0xA49 +#define WM8285_DSP5RMIX_INPUT_2_SOURCE 0xA4A +#define WM8285_DSP5RMIX_INPUT_2_VOLUME 0xA4B +#define WM8285_DSP5RMIX_INPUT_3_SOURCE 0xA4C +#define WM8285_DSP5RMIX_INPUT_3_VOLUME 0xA4D +#define WM8285_DSP5RMIX_INPUT_4_SOURCE 0xA4E +#define WM8285_DSP5RMIX_INPUT_4_VOLUME 0xA4F +#define WM8285_DSP5AUX1MIX_INPUT_1_SOURCE 0xA50 +#define WM8285_DSP5AUX2MIX_INPUT_1_SOURCE 0xA58 +#define WM8285_DSP5AUX3MIX_INPUT_1_SOURCE 0xA60 +#define WM8285_DSP5AUX4MIX_INPUT_1_SOURCE 0xA68 +#define WM8285_DSP5AUX5MIX_INPUT_1_SOURCE 0xA70 +#define WM8285_DSP5AUX6MIX_INPUT_1_SOURCE 0xA78 #define ARIZONA_ASRC1LMIX_INPUT_1_SOURCE 0xA80 #define ARIZONA_ASRC1RMIX_INPUT_1_SOURCE 0xA88 #define ARIZONA_ASRC2LMIX_INPUT_1_SOURCE 0xA90 @@ -888,6 +996,54 @@ #define ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE 0xBA8 #define ARIZONA_ISRC3INT3MIX_INPUT_1_SOURCE 0xBB0 #define ARIZONA_ISRC3INT4MIX_INPUT_1_SOURCE 0xBB8 +#define ARIZONA_ISRC4DEC1MIX_INPUT_1_SOURCE 0xBC0 +#define ARIZONA_ISRC4DEC2MIX_INPUT_1_SOURCE 0xBC8 +#define ARIZONA_ISRC4INT1MIX_INPUT_1_SOURCE 0xBE0 +#define ARIZONA_ISRC4INT2MIX_INPUT_1_SOURCE 0xBE8 +#define WM8285_DSP6LMIX_INPUT_1_SOURCE 0xC00 +#define WM8285_DSP6LMIX_INPUT_1_VOLUME 0xC01 +#define WM8285_DSP6LMIX_INPUT_2_SOURCE 0xC02 +#define WM8285_DSP6LMIX_INPUT_2_VOLUME 0xC03 +#define WM8285_DSP6LMIX_INPUT_3_SOURCE 0xC04 +#define WM8285_DSP6LMIX_INPUT_3_VOLUME 0xC05 +#define WM8285_DSP6LMIX_INPUT_4_SOURCE 0xC06 +#define WM8285_DSP6LMIX_INPUT_4_VOLUME 0xC07 +#define WM8285_DSP6RMIX_INPUT_1_SOURCE 0xC08 +#define WM8285_DSP6RMIX_INPUT_1_VOLUME 0xC09 +#define WM8285_DSP6RMIX_INPUT_2_SOURCE 0xC0A +#define WM8285_DSP6RMIX_INPUT_2_VOLUME 0xC0B +#define WM8285_DSP6RMIX_INPUT_3_SOURCE 0xC0C +#define WM8285_DSP6RMIX_INPUT_3_VOLUME 0xC0D +#define WM8285_DSP6RMIX_INPUT_4_SOURCE 0xC0E +#define WM8285_DSP6RMIX_INPUT_4_VOLUME 0xC0F +#define WM8285_DSP6AUX1MIX_INPUT_1_SOURCE 0xC10 +#define WM8285_DSP6AUX2MIX_INPUT_1_SOURCE 0xC18 +#define WM8285_DSP6AUX3MIX_INPUT_1_SOURCE 0xC20 +#define WM8285_DSP6AUX4MIX_INPUT_1_SOURCE 0xC28 +#define WM8285_DSP6AUX5MIX_INPUT_1_SOURCE 0xC30 +#define WM8285_DSP6AUX6MIX_INPUT_1_SOURCE 0xC38 +#define WM8285_DSP7LMIX_INPUT_1_SOURCE 0xC40 +#define WM8285_DSP7LMIX_INPUT_1_VOLUME 0xC41 +#define WM8285_DSP7LMIX_INPUT_2_SOURCE 0xC42 +#define WM8285_DSP7LMIX_INPUT_2_VOLUME 0xC43 +#define WM8285_DSP7LMIX_INPUT_3_SOURCE 0xC44 +#define WM8285_DSP7LMIX_INPUT_3_VOLUME 0xC45 +#define WM8285_DSP7LMIX_INPUT_4_SOURCE 0xC46 +#define WM8285_DSP7LMIX_INPUT_4_VOLUME 0xC47 +#define WM8285_DSP7RMIX_INPUT_1_SOURCE 0xC48 +#define WM8285_DSP7RMIX_INPUT_1_VOLUME 0xC49 +#define WM8285_DSP7RMIX_INPUT_2_SOURCE 0xC4A +#define WM8285_DSP7RMIX_INPUT_2_VOLUME 0xC4B +#define WM8285_DSP7RMIX_INPUT_3_SOURCE 0xC4C +#define WM8285_DSP7RMIX_INPUT_3_VOLUME 0xC4D +#define WM8285_DSP7RMIX_INPUT_4_SOURCE 0xC4E +#define WM8285_DSP7RMIX_INPUT_4_VOLUME 0xC4F +#define WM8285_DSP7AUX1MIX_INPUT_1_SOURCE 0xC50 +#define WM8285_DSP7AUX2MIX_INPUT_1_SOURCE 0xC58 +#define WM8285_DSP7AUX3MIX_INPUT_1_SOURCE 0xC60 +#define WM8285_DSP7AUX4MIX_INPUT_1_SOURCE 0xC68 +#define WM8285_DSP7AUX5MIX_INPUT_1_SOURCE 0xC70 +#define WM8285_DSP7AUX6MIX_INPUT_1_SOURCE 0xC78 #define ARIZONA_GPIO1_CTRL 0xC00 #define ARIZONA_GPIO2_CTRL 0xC01 #define ARIZONA_GPIO3_CTRL 0xC02 @@ -896,6 +1052,7 @@ #define ARIZONA_IRQ_CTRL_1 0xC0F #define ARIZONA_GPIO_DEBOUNCE_CONFIG 0xC10 #define ARIZONA_GP_SWITCH_1 0xC18 +#define WM8285_GP_SWITCH_1 0x2C8 #define ARIZONA_MISC_PAD_CTRL_1 0xC20 #define ARIZONA_MISC_PAD_CTRL_2 0xC21 #define ARIZONA_MISC_PAD_CTRL_3 0xC22 @@ -1053,6 +1210,11 @@ #define ARIZONA_DRC2_CTRL3 0xE8B #define ARIZONA_DRC2_CTRL4 0xE8C #define ARIZONA_DRC2_CTRL5 0xE8D +#define WM8285_DRC2_CTRL1 0xE88 +#define WM8285_DRC2_CTRL2 0xE89 +#define WM8285_DRC2_CTRL3 0xE8A +#define WM8285_DRC2_CTRL4 0xE8B +#define WM8285_DRC2_CTRL5 0xE8C #define ARIZONA_HPLPF1_1 0xEC0 #define ARIZONA_HPLPF1_2 0xEC1 #define ARIZONA_HPLPF2_1 0xEC4 @@ -1074,6 +1236,9 @@ #define ARIZONA_ISRC_3_CTRL_1 0xEF6 #define ARIZONA_ISRC_3_CTRL_2 0xEF7 #define ARIZONA_ISRC_3_CTRL_3 0xEF8 +#define ARIZONA_ISRC_4_CTRL_1 0xEF9 +#define ARIZONA_ISRC_4_CTRL_2 0xEFA +#define ARIZONA_ISRC_4_CTRL_3 0xEFB #define ARIZONA_CLOCK_CONTROL 0xF00 #define ARIZONA_ANC_SRC 0xF01 #define ARIZONA_DSP_STATUS 0xF02 @@ -1084,9 +1249,13 @@ #define ARIZONA_FCL_COEFF_START 0xF18 #define ARIZONA_FCL_COEFF_END 0xF69 #define ARIZONA_FCR_FILTER_CONTROL 0xF70 +#define WM8285_FCR_FILTER_CONTROL 0xF71 #define ARIZONA_FCR_ADC_REFORMATTER_CONTROL 0xF72 +#define WM8285_FCR_ADC_REFORMATTER_CONTROL 0xF73 #define ARIZONA_FCR_COEFF_START 0xF73 #define ARIZONA_FCR_COEFF_END 0xFC4 +#define WM8285_FCR_COEFF_START 0xF74 +#define WM8285_FCR_COEFF_END 0xFC5 #define ARIZONA_DSP1_CONTROL_1 0x1100 #define ARIZONA_DSP1_CLOCKING_1 0x1101 #define ARIZONA_DSP1_STATUS_1 0x1104 @@ -1213,7 +1382,813 @@ #define ARIZONA_FRF_COEFF_4 0x1703 #define ARIZONA_V2_DAC_COMP_1 0x1704 #define ARIZONA_V2_DAC_COMP_2 0x1705 - +#define WM8285_ADSP2_IRQ0 0x1600 +#define WM8285_ADSP2_IRQ1 0x1601 +#define WM8285_ADSP2_IRQ2 0x1602 +#define WM8285_ADSP2_IRQ3 0x1603 +#define WM8285_ADSP2_IRQ4 0x1604 +#define WM8285_ADSP2_IRQ5 0x1605 +#define WM8285_ADSP2_IRQ6 0x1606 +#define WM8285_ADSP2_IRQ7 0x1607 +#define WM8285_GPIO1_CTRL_1 0x1700 +#define WM8285_GPIO1_CTRL_2 0x1701 +#define WM8285_GPIO2_CTRL_1 0x1702 +#define WM8285_GPIO2_CTRL_2 0x1703 +#define WM8285_GPIO3_CTRL_1 0x1704 +#define WM8285_GPIO3_CTRL_2 0x1705 +#define WM8285_GPIO4_CTRL_1 0x1706 +#define WM8285_GPIO4_CTRL_2 0x1707 +#define WM8285_GPIO5_CTRL_1 0x1708 +#define WM8285_GPIO5_CTRL_2 0x1709 +#define WM8285_GPIO6_CTRL_1 0x170A +#define WM8285_GPIO6_CTRL_2 0x170B +#define WM8285_GPIO7_CTRL_1 0x170C +#define WM8285_GPIO7_CTRL_2 0x170D +#define WM8285_GPIO8_CTRL_1 0x170E +#define WM8285_GPIO8_CTRL_2 0x170F +#define WM8285_GPIO9_CTRL_1 0x1710 +#define WM8285_GPIO9_CTRL_2 0x1711 +#define WM8285_GPIO10_CTRL_1 0x1712 +#define WM8285_GPIO10_CTRL_2 0x1713 +#define WM8285_GPIO11_CTRL_1 0x1714 +#define WM8285_GPIO11_CTRL_2 0x1715 +#define WM8285_GPIO12_CTRL_1 0x1716 +#define WM8285_GPIO12_CTRL_2 0x1717 +#define WM8285_GPIO13_CTRL_1 0x1718 +#define WM8285_GPIO13_CTRL_2 0x1719 +#define WM8285_GPIO14_CTRL_1 0x171A +#define WM8285_GPIO14_CTRL_2 0x171B +#define WM8285_GPIO15_CTRL_1 0x171C +#define WM8285_GPIO15_CTRL_2 0x171D +#define WM8285_GPIO16_CTRL_1 0x171E +#define WM8285_GPIO16_CTRL_2 0x171F +#define WM8285_GPIO17_CTRL_1 0x1720 +#define WM8285_GPIO17_CTRL_2 0x1721 +#define WM8285_GPIO18_CTRL_1 0x1722 +#define WM8285_GPIO18_CTRL_2 0x1723 +#define WM8285_GPIO19_CTRL_1 0x1724 +#define WM8285_GPIO19_CTRL_2 0x1725 +#define WM8285_GPIO20_CTRL_1 0x1726 +#define WM8285_GPIO20_CTRL_2 0x1727 +#define WM8285_GPIO21_CTRL_1 0x1728 +#define WM8285_GPIO21_CTRL_2 0x1729 +#define WM8285_GPIO22_CTRL_1 0x172A +#define WM8285_GPIO22_CTRL_2 0x172B +#define WM8285_GPIO23_CTRL_1 0x172C +#define WM8285_GPIO23_CTRL_2 0x172D +#define WM8285_GPIO24_CTRL_1 0x172E +#define WM8285_GPIO24_CTRL_2 0x172F +#define WM8285_GPIO25_CTRL_1 0x1730 +#define WM8285_GPIO25_CTRL_2 0x1731 +#define WM8285_GPIO26_CTRL_1 0x1732 +#define WM8285_GPIO26_CTRL_2 0x1733 +#define WM8285_GPIO27_CTRL_1 0x1734 +#define WM8285_GPIO27_CTRL_2 0x1735 +#define WM8285_GPIO28_CTRL_1 0x1736 +#define WM8285_GPIO28_CTRL_2 0x1737 +#define WM8285_GPIO29_CTRL_1 0x1738 +#define WM8285_GPIO29_CTRL_2 0x1739 +#define WM8285_GPIO30_CTRL_1 0x173A +#define WM8285_GPIO30_CTRL_2 0x173B +#define WM8285_GPIO31_CTRL_1 0x173C +#define WM8285_GPIO31_CTRL_2 0x173D +#define WM8285_GPIO32_CTRL_1 0x173E +#define WM8285_GPIO32_CTRL_2 0x173F +#define WM8285_GPIO33_CTRL_1 0x1740 +#define WM8285_GPIO33_CTRL_2 0x1741 +#define WM8285_GPIO34_CTRL_1 0x1742 +#define WM8285_GPIO34_CTRL_2 0x1743 +#define WM8285_GPIO35_CTRL_1 0x1744 +#define WM8285_GPIO35_CTRL_2 0x1745 +#define WM8285_GPIO36_CTRL_1 0x1746 +#define WM8285_GPIO36_CTRL_2 0x1747 +#define WM8285_GPIO37_CTRL_1 0x1748 +#define WM8285_GPIO37_CTRL_2 0x1749 +#define WM8285_GPIO38_CTRL_1 0x174A +#define WM8285_GPIO38_CTRL_2 0x174B +#define WM8285_GPIO39_CTRL_1 0x174C +#define WM8285_GPIO39_CTRL_2 0x174D +#define WM8285_GPIO40_CTRL_1 0x174E +#define WM8285_GPIO40_CTRL_2 0x174F +#define WM8285_IRQ1_STATUS_1 0x1800 +#define WM8285_IRQ1_STATUS_2 0x1801 +#define WM8285_IRQ1_STATUS_6 0x1805 +#define WM8285_IRQ1_STATUS_7 0x1806 +#define WM8285_IRQ1_STATUS_9 0x1808 +#define WM8285_IRQ1_STATUS_11 0x180A +#define WM8285_IRQ1_STATUS_12 0x180B +#define WM8285_IRQ1_STATUS_13 0x180C +#define WM8285_IRQ1_STATUS_14 0x180D +#define WM8285_IRQ1_STATUS_15 0x180E +#define WM8285_IRQ1_STATUS_17 0x1810 +#define WM8285_IRQ1_STATUS_18 0x1811 +#define WM8285_IRQ1_STATUS_19 0x1812 +#define WM8285_IRQ1_STATUS_21 0x1814 +#define WM8285_IRQ1_STATUS_22 0x1815 +#define WM8285_IRQ1_STATUS_23 0x1816 +#define WM8285_IRQ1_STATUS_24 0x1817 +#define WM8285_IRQ1_STATUS_25 0x1818 +#define WM8285_IRQ1_STATUS_27 0x181A +#define WM8285_IRQ1_STATUS_28 0x181B +#define WM8285_IRQ1_STATUS_30 0x181D +#define WM8285_IRQ1_STATUS_31 0x181E +#define WM8285_IRQ1_STATUS_32 0x181F +#define WM8285_IRQ1_MASK_1 0x1840 +#define WM8285_IRQ1_MASK_2 0x1841 +#define WM8285_IRQ1_MASK_6 0x1845 +#define WM8285_IRQ1_MASK_7 0x1846 +#define WM8285_IRQ1_MASK_9 0x1848 +#define WM8285_IRQ1_MASK_11 0x184A +#define WM8285_IRQ1_MASK_12 0x184B +#define WM8285_IRQ1_MASK_13 0x184C +#define WM8285_IRQ1_MASK_14 0x184D +#define WM8285_IRQ1_MASK_15 0x184E +#define WM8285_IRQ1_MASK_17 0x1850 +#define WM8285_IRQ1_MASK_18 0x1851 +#define WM8285_IRQ1_MASK_19 0x1852 +#define WM8285_IRQ1_MASK_21 0x1854 +#define WM8285_IRQ1_MASK_22 0x1855 +#define WM8285_IRQ1_MASK_23 0x1856 +#define WM8285_IRQ1_MASK_24 0x1857 +#define WM8285_IRQ1_MASK_25 0x1858 +#define WM8285_IRQ1_MASK_27 0x185A +#define WM8285_IRQ1_MASK_28 0x185B +#define WM8285_IRQ1_MASK_30 0x185D +#define WM8285_IRQ1_MASK_31 0x185E +#define WM8285_IRQ1_MASK_32 0x185F +#define WM8285_IRQ1_RAW_STATUS_1 0x1880 +#define WM8285_IRQ1_RAW_STATUS_2 0x1881 +#define WM8285_IRQ1_RAW_STATUS_6 0x1885 +#define WM8285_IRQ1_RAW_STATUS_7 0x1886 +#define WM8285_IRQ1_RAW_STATUS_9 0x1888 +#define WM8285_IRQ1_RAW_STATUS_10 0x1889 +#define WM8285_IRQ1_RAW_STATUS_11 0x188A +#define WM8285_IRQ1_RAW_STATUS_12 0x188B +#define WM8285_IRQ1_RAW_STATUS_13 0x188C +#define WM8285_IRQ1_RAW_STATUS_14 0x188D +#define WM8285_IRQ1_RAW_STATUS_15 0x188E +#define WM8285_IRQ1_RAW_STATUS_17 0x1890 +#define WM8285_IRQ1_RAW_STATUS_18 0x1891 +#define WM8285_IRQ1_RAW_STATUS_19 0x1892 +#define WM8285_IRQ1_RAW_STATUS_21 0x1894 +#define WM8285_IRQ1_RAW_STATUS_22 0x1895 +#define WM8285_IRQ1_RAW_STATUS_23 0x1896 +#define WM8285_IRQ1_RAW_STATUS_24 0x1897 +#define WM8285_IRQ1_RAW_STATUS_25 0x1898 +#define WM8285_IRQ1_RAW_STATUS_30 0x189D +#define WM8285_IRQ1_RAW_STATUS_31 0x189E +#define WM8285_IRQ1_RAW_STATUS_32 0x189F +#define WM8285_IRQ2_STATUS_1 0x1900 +#define WM8285_IRQ2_STATUS_2 0x1901 +#define WM8285_IRQ2_STATUS_6 0x1905 +#define WM8285_IRQ2_STATUS_7 0x1906 +#define WM8285_IRQ2_STATUS_9 0x1908 +#define WM8285_IRQ2_STATUS_11 0x190A +#define WM8285_IRQ2_STATUS_12 0x190B +#define WM8285_IRQ2_STATUS_13 0x190C +#define WM8285_IRQ2_STATUS_14 0x190D +#define WM8285_IRQ2_STATUS_15 0x190E +#define WM8285_IRQ2_STATUS_17 0x1910 +#define WM8285_IRQ2_STATUS_18 0x1911 +#define WM8285_IRQ2_STATUS_19 0x1912 +#define WM8285_IRQ2_STATUS_21 0x1914 +#define WM8285_IRQ2_STATUS_22 0x1915 +#define WM8285_IRQ2_STATUS_23 0x1916 +#define WM8285_IRQ2_STATUS_24 0x1917 +#define WM8285_IRQ2_STATUS_25 0x1918 +#define WM8285_IRQ2_STATUS_27 0x191A +#define WM8285_IRQ2_STATUS_28 0x191B +#define WM8285_IRQ2_STATUS_30 0x191D +#define WM8285_IRQ2_STATUS_31 0x191E +#define WM8285_IRQ2_STATUS_32 0x191F +#define WM8285_IRQ2_MASK_1 0x1940 +#define WM8285_IRQ2_MASK_2 0x1941 +#define WM8285_IRQ2_MASK_6 0x1945 +#define WM8285_IRQ2_MASK_7 0x1946 +#define WM8285_IRQ2_MASK_9 0x1948 +#define WM8285_IRQ2_MASK_11 0x194A +#define WM8285_IRQ2_MASK_12 0x194B +#define WM8285_IRQ2_MASK_13 0x194C +#define WM8285_IRQ2_MASK_14 0x194D +#define WM8285_IRQ2_MASK_15 0x194E +#define WM8285_IRQ2_MASK_17 0x1950 +#define WM8285_IRQ2_MASK_18 0x1951 +#define WM8285_IRQ2_MASK_19 0x1952 +#define WM8285_IRQ2_MASK_21 0x1954 +#define WM8285_IRQ2_MASK_22 0x1955 +#define WM8285_IRQ2_MASK_23 0x1956 +#define WM8285_IRQ2_MASK_24 0x1957 +#define WM8285_IRQ2_MASK_25 0x1958 +#define WM8285_IRQ2_MASK_27 0x195A +#define WM8285_IRQ2_MASK_28 0x195B +#define WM8285_IRQ2_MASK_30 0x195D +#define WM8285_IRQ2_MASK_31 0x195E +#define WM8285_IRQ2_MASK_32 0x195F +#define WM8285_IRQ2_RAW_STATUS_1 0x1980 +#define WM8285_IRQ2_RAW_STATUS_2 0x1981 +#define WM8285_IRQ2_RAW_STATUS_6 0x1985 +#define WM8285_IRQ2_RAW_STATUS_7 0x1986 +#define WM8285_IRQ2_RAW_STATUS_9 0x1988 +#define WM8285_IRQ2_RAW_STATUS_10 0x1989 +#define WM8285_IRQ2_RAW_STATUS_11 0x198A +#define WM8285_IRQ2_RAW_STATUS_12 0x198B +#define WM8285_IRQ2_RAW_STATUS_13 0x198C +#define WM8285_IRQ2_RAW_STATUS_14 0x198D +#define WM8285_IRQ2_RAW_STATUS_15 0x198E +#define WM8285_IRQ2_RAW_STATUS_17 0x1990 +#define WM8285_IRQ2_RAW_STATUS_18 0x1991 +#define WM8285_IRQ2_RAW_STATUS_19 0x1992 +#define WM8285_IRQ2_RAW_STATUS_21 0x1994 +#define WM8285_IRQ2_RAW_STATUS_22 0x1995 +#define WM8285_IRQ2_RAW_STATUS_23 0x1996 +#define WM8285_IRQ2_RAW_STATUS_24 0x1997 +#define WM8285_IRQ2_RAW_STATUS_25 0x1998 +#define WM8285_IRQ2_RAW_STATUS_30 0x199D +#define WM8285_IRQ2_RAW_STATUS_31 0x199E +#define WM8285_IRQ2_RAW_STATUS_32 0x199F +#define WM8285_INTERRUPT_DEBOUNCE_7 0x1A06 +#define WM8285_INTERRUPT_DEBOUNCE_15 0x1A0E +#define WM8285_IRQ1_CTRL 0x1A80 +#define WM8285_IRQ2_CTRL 0x1A82 +#define WM8285_INTERRUPT_RAW_STATUS_1 0x1AA0 +#define ARIZONA_WSEQ_SEQUENCE_1 0x3000 +#define ARIZONA_WSEQ_SEQUENCE_2 0x3002 +#define ARIZONA_WSEQ_SEQUENCE_3 0x3004 +#define ARIZONA_WSEQ_SEQUENCE_4 0x3006 +#define ARIZONA_WSEQ_SEQUENCE_5 0x3008 +#define ARIZONA_WSEQ_SEQUENCE_6 0x300A +#define ARIZONA_WSEQ_SEQUENCE_7 0x300C +#define ARIZONA_WSEQ_SEQUENCE_8 0x300E +#define ARIZONA_WSEQ_SEQUENCE_9 0x3010 +#define ARIZONA_WSEQ_SEQUENCE_10 0x3012 +#define ARIZONA_WSEQ_SEQUENCE_11 0x3014 +#define ARIZONA_WSEQ_SEQUENCE_12 0x3016 +#define ARIZONA_WSEQ_SEQUENCE_13 0x3018 +#define ARIZONA_WSEQ_SEQUENCE_14 0x301A +#define ARIZONA_WSEQ_SEQUENCE_15 0x301C +#define ARIZONA_WSEQ_SEQUENCE_16 0x301E +#define ARIZONA_WSEQ_SEQUENCE_17 0x3020 +#define ARIZONA_WSEQ_SEQUENCE_18 0x3022 +#define ARIZONA_WSEQ_SEQUENCE_19 0x3024 +#define ARIZONA_WSEQ_SEQUENCE_20 0x3026 +#define ARIZONA_WSEQ_SEQUENCE_21 0x3028 +#define ARIZONA_WSEQ_SEQUENCE_22 0x302A +#define ARIZONA_WSEQ_SEQUENCE_23 0x302C +#define ARIZONA_WSEQ_SEQUENCE_24 0x302E +#define ARIZONA_WSEQ_SEQUENCE_25 0x3030 +#define ARIZONA_WSEQ_SEQUENCE_26 0x3032 +#define ARIZONA_WSEQ_SEQUENCE_27 0x3034 +#define ARIZONA_WSEQ_SEQUENCE_28 0x3036 +#define ARIZONA_WSEQ_SEQUENCE_29 0x3038 +#define ARIZONA_WSEQ_SEQUENCE_30 0x303A +#define ARIZONA_WSEQ_SEQUENCE_31 0x303C +#define ARIZONA_WSEQ_SEQUENCE_32 0x303E +#define ARIZONA_WSEQ_SEQUENCE_33 0x3040 +#define ARIZONA_WSEQ_SEQUENCE_34 0x3042 +#define ARIZONA_WSEQ_SEQUENCE_35 0x3044 +#define ARIZONA_WSEQ_SEQUENCE_36 0x3046 +#define ARIZONA_WSEQ_SEQUENCE_37 0x3048 +#define ARIZONA_WSEQ_SEQUENCE_38 0x304A +#define ARIZONA_WSEQ_SEQUENCE_39 0x304C +#define ARIZONA_WSEQ_SEQUENCE_40 0x304E +#define ARIZONA_WSEQ_SEQUENCE_41 0x3050 +#define ARIZONA_WSEQ_SEQUENCE_42 0x3052 +#define ARIZONA_WSEQ_SEQUENCE_43 0x3054 +#define ARIZONA_WSEQ_SEQUENCE_44 0x3056 +#define ARIZONA_WSEQ_SEQUENCE_45 0x3058 +#define ARIZONA_WSEQ_SEQUENCE_46 0x305A +#define ARIZONA_WSEQ_SEQUENCE_47 0x305C +#define ARIZONA_WSEQ_SEQUENCE_48 0x305E +#define ARIZONA_WSEQ_SEQUENCE_49 0x3060 +#define ARIZONA_WSEQ_SEQUENCE_50 0x3062 +#define ARIZONA_WSEQ_SEQUENCE_51 0x3064 +#define ARIZONA_WSEQ_SEQUENCE_52 0x3066 +#define ARIZONA_WSEQ_SEQUENCE_53 0x3068 +#define ARIZONA_WSEQ_SEQUENCE_54 0x306A +#define ARIZONA_WSEQ_SEQUENCE_55 0x306C +#define ARIZONA_WSEQ_SEQUENCE_56 0x306E +#define ARIZONA_WSEQ_SEQUENCE_57 0x3070 +#define ARIZONA_WSEQ_SEQUENCE_58 0x3072 +#define ARIZONA_WSEQ_SEQUENCE_59 0x3074 +#define ARIZONA_WSEQ_SEQUENCE_60 0x3076 +#define ARIZONA_WSEQ_SEQUENCE_61 0x3078 +#define ARIZONA_WSEQ_SEQUENCE_62 0x307A +#define ARIZONA_WSEQ_SEQUENCE_63 0x307C +#define ARIZONA_WSEQ_SEQUENCE_64 0x307E +#define ARIZONA_WSEQ_SEQUENCE_65 0x3080 +#define ARIZONA_WSEQ_SEQUENCE_66 0x3082 +#define ARIZONA_WSEQ_SEQUENCE_67 0x3084 +#define ARIZONA_WSEQ_SEQUENCE_68 0x3086 +#define ARIZONA_WSEQ_SEQUENCE_69 0x3088 +#define ARIZONA_WSEQ_SEQUENCE_70 0x308A +#define ARIZONA_WSEQ_SEQUENCE_71 0x308C +#define ARIZONA_WSEQ_SEQUENCE_72 0x308E +#define ARIZONA_WSEQ_SEQUENCE_73 0x3090 +#define ARIZONA_WSEQ_SEQUENCE_74 0x3092 +#define ARIZONA_WSEQ_SEQUENCE_75 0x3094 +#define ARIZONA_WSEQ_SEQUENCE_76 0x3096 +#define ARIZONA_WSEQ_SEQUENCE_77 0x3098 +#define ARIZONA_WSEQ_SEQUENCE_78 0x309A +#define ARIZONA_WSEQ_SEQUENCE_79 0x309C +#define ARIZONA_WSEQ_SEQUENCE_80 0x309E +#define ARIZONA_WSEQ_SEQUENCE_81 0x30A0 +#define ARIZONA_WSEQ_SEQUENCE_82 0x30A2 +#define ARIZONA_WSEQ_SEQUENCE_83 0x30A4 +#define ARIZONA_WSEQ_SEQUENCE_84 0x30A6 +#define ARIZONA_WSEQ_SEQUENCE_85 0x30A8 +#define ARIZONA_WSEQ_SEQUENCE_86 0x30AA +#define ARIZONA_WSEQ_SEQUENCE_87 0x30AC +#define ARIZONA_WSEQ_SEQUENCE_88 0x30AE +#define ARIZONA_WSEQ_SEQUENCE_89 0x30B0 +#define ARIZONA_WSEQ_SEQUENCE_90 0x30B2 +#define ARIZONA_WSEQ_SEQUENCE_91 0x30B4 +#define ARIZONA_WSEQ_SEQUENCE_92 0x30B6 +#define ARIZONA_WSEQ_SEQUENCE_93 0x30B8 +#define ARIZONA_WSEQ_SEQUENCE_94 0x30BA +#define ARIZONA_WSEQ_SEQUENCE_95 0x30BC +#define ARIZONA_WSEQ_SEQUENCE_96 0x30BE +#define ARIZONA_WSEQ_SEQUENCE_97 0x30C0 +#define ARIZONA_WSEQ_SEQUENCE_98 0x30C2 +#define ARIZONA_WSEQ_SEQUENCE_99 0x30C4 +#define ARIZONA_WSEQ_SEQUENCE_100 0x30C6 +#define ARIZONA_WSEQ_SEQUENCE_101 0x30C8 +#define ARIZONA_WSEQ_SEQUENCE_102 0x30CA +#define ARIZONA_WSEQ_SEQUENCE_103 0x30CC +#define ARIZONA_WSEQ_SEQUENCE_104 0x30CE +#define ARIZONA_WSEQ_SEQUENCE_105 0x30D0 +#define ARIZONA_WSEQ_SEQUENCE_106 0x30D2 +#define ARIZONA_WSEQ_SEQUENCE_107 0x30D4 +#define ARIZONA_WSEQ_SEQUENCE_108 0x30D6 +#define ARIZONA_WSEQ_SEQUENCE_109 0x30D8 +#define ARIZONA_WSEQ_SEQUENCE_110 0x30DA +#define ARIZONA_WSEQ_SEQUENCE_111 0x30DC +#define ARIZONA_WSEQ_SEQUENCE_112 0x30DE +#define ARIZONA_WSEQ_SEQUENCE_113 0x30E0 +#define ARIZONA_WSEQ_SEQUENCE_114 0x30E2 +#define ARIZONA_WSEQ_SEQUENCE_115 0x30E4 +#define ARIZONA_WSEQ_SEQUENCE_116 0x30E6 +#define ARIZONA_WSEQ_SEQUENCE_117 0x30E8 +#define ARIZONA_WSEQ_SEQUENCE_118 0x30EA +#define ARIZONA_WSEQ_SEQUENCE_119 0x30EC +#define ARIZONA_WSEQ_SEQUENCE_120 0x30EE +#define ARIZONA_WSEQ_SEQUENCE_121 0x30F0 +#define ARIZONA_WSEQ_SEQUENCE_122 0x30F2 +#define ARIZONA_WSEQ_SEQUENCE_123 0x30F4 +#define ARIZONA_WSEQ_SEQUENCE_124 0x30F6 +#define ARIZONA_WSEQ_SEQUENCE_125 0x30F8 +#define ARIZONA_WSEQ_SEQUENCE_126 0x30FA +#define ARIZONA_WSEQ_SEQUENCE_127 0x30FC +#define ARIZONA_WSEQ_SEQUENCE_128 0x30FE +#define ARIZONA_WSEQ_SEQUENCE_129 0x3100 +#define ARIZONA_WSEQ_SEQUENCE_130 0x3102 +#define ARIZONA_WSEQ_SEQUENCE_131 0x3104 +#define ARIZONA_WSEQ_SEQUENCE_132 0x3106 +#define ARIZONA_WSEQ_SEQUENCE_133 0x3108 +#define ARIZONA_WSEQ_SEQUENCE_134 0x310A +#define ARIZONA_WSEQ_SEQUENCE_135 0x310C +#define ARIZONA_WSEQ_SEQUENCE_136 0x310E +#define ARIZONA_WSEQ_SEQUENCE_137 0x3110 +#define ARIZONA_WSEQ_SEQUENCE_138 0x3112 +#define ARIZONA_WSEQ_SEQUENCE_139 0x3114 +#define ARIZONA_WSEQ_SEQUENCE_140 0x3116 +#define ARIZONA_WSEQ_SEQUENCE_141 0x3118 +#define ARIZONA_WSEQ_SEQUENCE_142 0x311A +#define ARIZONA_WSEQ_SEQUENCE_143 0x311C +#define ARIZONA_WSEQ_SEQUENCE_144 0x311E +#define ARIZONA_WSEQ_SEQUENCE_145 0x3120 +#define ARIZONA_WSEQ_SEQUENCE_146 0x3122 +#define ARIZONA_WSEQ_SEQUENCE_147 0x3124 +#define ARIZONA_WSEQ_SEQUENCE_148 0x3126 +#define ARIZONA_WSEQ_SEQUENCE_149 0x3128 +#define ARIZONA_WSEQ_SEQUENCE_150 0x312A +#define ARIZONA_WSEQ_SEQUENCE_151 0x312C +#define ARIZONA_WSEQ_SEQUENCE_152 0x312E +#define ARIZONA_WSEQ_SEQUENCE_153 0x3130 +#define ARIZONA_WSEQ_SEQUENCE_154 0x3132 +#define ARIZONA_WSEQ_SEQUENCE_155 0x3134 +#define ARIZONA_WSEQ_SEQUENCE_156 0x3136 +#define ARIZONA_WSEQ_SEQUENCE_157 0x3138 +#define ARIZONA_WSEQ_SEQUENCE_158 0x313A +#define ARIZONA_WSEQ_SEQUENCE_159 0x313C +#define ARIZONA_WSEQ_SEQUENCE_160 0x313E +#define ARIZONA_WSEQ_SEQUENCE_161 0x3140 +#define ARIZONA_WSEQ_SEQUENCE_162 0x3142 +#define ARIZONA_WSEQ_SEQUENCE_163 0x3144 +#define ARIZONA_WSEQ_SEQUENCE_164 0x3146 +#define ARIZONA_WSEQ_SEQUENCE_165 0x3148 +#define ARIZONA_WSEQ_SEQUENCE_166 0x314A +#define ARIZONA_WSEQ_SEQUENCE_167 0x314C +#define ARIZONA_WSEQ_SEQUENCE_168 0x314E +#define ARIZONA_WSEQ_SEQUENCE_169 0x3150 +#define ARIZONA_WSEQ_SEQUENCE_170 0x3152 +#define ARIZONA_WSEQ_SEQUENCE_171 0x3154 +#define ARIZONA_WSEQ_SEQUENCE_172 0x3156 +#define ARIZONA_WSEQ_SEQUENCE_173 0x3158 +#define ARIZONA_WSEQ_SEQUENCE_174 0x315A +#define ARIZONA_WSEQ_SEQUENCE_175 0x315C +#define ARIZONA_WSEQ_SEQUENCE_176 0x315E +#define ARIZONA_WSEQ_SEQUENCE_177 0x3160 +#define ARIZONA_WSEQ_SEQUENCE_178 0x3162 +#define ARIZONA_WSEQ_SEQUENCE_179 0x3164 +#define ARIZONA_WSEQ_SEQUENCE_180 0x3166 +#define ARIZONA_WSEQ_SEQUENCE_181 0x3168 +#define ARIZONA_WSEQ_SEQUENCE_182 0x316A +#define ARIZONA_WSEQ_SEQUENCE_183 0x316C +#define ARIZONA_WSEQ_SEQUENCE_184 0x316E +#define ARIZONA_WSEQ_SEQUENCE_185 0x3170 +#define ARIZONA_WSEQ_SEQUENCE_186 0x3172 +#define ARIZONA_WSEQ_SEQUENCE_187 0x3174 +#define ARIZONA_WSEQ_SEQUENCE_188 0x3176 +#define ARIZONA_WSEQ_SEQUENCE_189 0x3178 +#define ARIZONA_WSEQ_SEQUENCE_190 0x317A +#define ARIZONA_WSEQ_SEQUENCE_191 0x317C +#define ARIZONA_WSEQ_SEQUENCE_192 0x317E +#define ARIZONA_WSEQ_SEQUENCE_193 0x3180 +#define ARIZONA_WSEQ_SEQUENCE_194 0x3182 +#define ARIZONA_WSEQ_SEQUENCE_195 0x3184 +#define ARIZONA_WSEQ_SEQUENCE_196 0x3186 +#define ARIZONA_WSEQ_SEQUENCE_197 0x3188 +#define ARIZONA_WSEQ_SEQUENCE_198 0x318A +#define ARIZONA_WSEQ_SEQUENCE_199 0x318C +#define ARIZONA_WSEQ_SEQUENCE_200 0x318E +#define ARIZONA_WSEQ_SEQUENCE_201 0x3190 +#define ARIZONA_WSEQ_SEQUENCE_202 0x3192 +#define ARIZONA_WSEQ_SEQUENCE_203 0x3194 +#define ARIZONA_WSEQ_SEQUENCE_204 0x3196 +#define ARIZONA_WSEQ_SEQUENCE_205 0x3198 +#define ARIZONA_WSEQ_SEQUENCE_206 0x319A +#define ARIZONA_WSEQ_SEQUENCE_207 0x319C +#define ARIZONA_WSEQ_SEQUENCE_208 0x319E +#define ARIZONA_WSEQ_SEQUENCE_209 0x31A0 +#define ARIZONA_WSEQ_SEQUENCE_210 0x31A2 +#define ARIZONA_WSEQ_SEQUENCE_211 0x31A4 +#define ARIZONA_WSEQ_SEQUENCE_212 0x31A6 +#define ARIZONA_WSEQ_SEQUENCE_213 0x31A8 +#define ARIZONA_WSEQ_SEQUENCE_214 0x31AA +#define ARIZONA_WSEQ_SEQUENCE_215 0x31AC +#define ARIZONA_WSEQ_SEQUENCE_216 0x31AE +#define ARIZONA_WSEQ_SEQUENCE_217 0x31B0 +#define ARIZONA_WSEQ_SEQUENCE_218 0x31B2 +#define ARIZONA_WSEQ_SEQUENCE_219 0x31B4 +#define ARIZONA_WSEQ_SEQUENCE_220 0x31B6 +#define ARIZONA_WSEQ_SEQUENCE_221 0x31B8 +#define ARIZONA_WSEQ_SEQUENCE_222 0x31BA +#define ARIZONA_WSEQ_SEQUENCE_223 0x31BC +#define ARIZONA_WSEQ_SEQUENCE_224 0x31BE +#define ARIZONA_WSEQ_SEQUENCE_225 0x31C0 +#define ARIZONA_WSEQ_SEQUENCE_226 0x31C2 +#define ARIZONA_WSEQ_SEQUENCE_227 0x31C4 +#define ARIZONA_WSEQ_SEQUENCE_228 0x31C6 +#define ARIZONA_WSEQ_SEQUENCE_229 0x31C8 +#define ARIZONA_WSEQ_SEQUENCE_230 0x31CA +#define ARIZONA_WSEQ_SEQUENCE_231 0x31CC +#define ARIZONA_WSEQ_SEQUENCE_232 0x31CE +#define ARIZONA_WSEQ_SEQUENCE_233 0x31D0 +#define ARIZONA_WSEQ_SEQUENCE_234 0x31D2 +#define ARIZONA_WSEQ_SEQUENCE_235 0x31D4 +#define ARIZONA_WSEQ_SEQUENCE_236 0x31D6 +#define ARIZONA_WSEQ_SEQUENCE_237 0x31D8 +#define ARIZONA_WSEQ_SEQUENCE_238 0x31DA +#define ARIZONA_WSEQ_SEQUENCE_239 0x31DC +#define ARIZONA_WSEQ_SEQUENCE_240 0x31DE +#define ARIZONA_WSEQ_SEQUENCE_241 0x31E0 +#define ARIZONA_WSEQ_SEQUENCE_242 0x31E2 +#define ARIZONA_WSEQ_SEQUENCE_243 0x31E4 +#define ARIZONA_WSEQ_SEQUENCE_244 0x31E6 +#define ARIZONA_WSEQ_SEQUENCE_245 0x31E8 +#define ARIZONA_WSEQ_SEQUENCE_246 0x31EA +#define ARIZONA_WSEQ_SEQUENCE_247 0x31EC +#define ARIZONA_WSEQ_SEQUENCE_248 0x31EE +#define ARIZONA_WSEQ_SEQUENCE_249 0x31F0 +#define ARIZONA_WSEQ_SEQUENCE_250 0x31F2 +#define ARIZONA_WSEQ_SEQUENCE_251 0x31F4 +#define ARIZONA_WSEQ_SEQUENCE_252 0x31F6 +#define ARIZONA_WSEQ_SEQUENCE_253 0x31F8 +#define ARIZONA_WSEQ_SEQUENCE_254 0x31FA +#define ARIZONA_WSEQ_SEQUENCE_255 0x31FC +#define ARIZONA_WSEQ_SEQUENCE_256 0x31FE +#define ARIZONA_WSEQ_SEQUENCE_257 0x3200 +#define ARIZONA_WSEQ_SEQUENCE_258 0x3202 +#define ARIZONA_WSEQ_SEQUENCE_259 0x3204 +#define ARIZONA_WSEQ_SEQUENCE_260 0x3206 +#define ARIZONA_WSEQ_SEQUENCE_261 0x3208 +#define ARIZONA_WSEQ_SEQUENCE_262 0x320A +#define ARIZONA_WSEQ_SEQUENCE_263 0x320C +#define ARIZONA_WSEQ_SEQUENCE_264 0x320E +#define ARIZONA_WSEQ_SEQUENCE_265 0x3210 +#define ARIZONA_WSEQ_SEQUENCE_266 0x3212 +#define ARIZONA_WSEQ_SEQUENCE_267 0x3214 +#define ARIZONA_WSEQ_SEQUENCE_268 0x3216 +#define ARIZONA_WSEQ_SEQUENCE_269 0x3218 +#define ARIZONA_WSEQ_SEQUENCE_270 0x321A +#define ARIZONA_WSEQ_SEQUENCE_271 0x321C +#define ARIZONA_WSEQ_SEQUENCE_272 0x321E +#define ARIZONA_WSEQ_SEQUENCE_273 0x3220 +#define ARIZONA_WSEQ_SEQUENCE_274 0x3222 +#define ARIZONA_WSEQ_SEQUENCE_275 0x3224 +#define ARIZONA_WSEQ_SEQUENCE_276 0x3226 +#define ARIZONA_WSEQ_SEQUENCE_277 0x3228 +#define ARIZONA_WSEQ_SEQUENCE_278 0x322A +#define ARIZONA_WSEQ_SEQUENCE_279 0x322C +#define ARIZONA_WSEQ_SEQUENCE_280 0x322E +#define ARIZONA_WSEQ_SEQUENCE_281 0x3230 +#define ARIZONA_WSEQ_SEQUENCE_282 0x3232 +#define ARIZONA_WSEQ_SEQUENCE_283 0x3234 +#define ARIZONA_WSEQ_SEQUENCE_284 0x3236 +#define ARIZONA_WSEQ_SEQUENCE_285 0x3238 +#define ARIZONA_WSEQ_SEQUENCE_286 0x323A +#define ARIZONA_WSEQ_SEQUENCE_287 0x323C +#define ARIZONA_WSEQ_SEQUENCE_288 0x323E +#define ARIZONA_WSEQ_SEQUENCE_289 0x3240 +#define ARIZONA_WSEQ_SEQUENCE_290 0x3242 +#define ARIZONA_WSEQ_SEQUENCE_291 0x3244 +#define ARIZONA_WSEQ_SEQUENCE_292 0x3246 +#define ARIZONA_WSEQ_SEQUENCE_293 0x3248 +#define ARIZONA_WSEQ_SEQUENCE_294 0x324A +#define ARIZONA_WSEQ_SEQUENCE_295 0x324C +#define ARIZONA_WSEQ_SEQUENCE_296 0x324E +#define ARIZONA_WSEQ_SEQUENCE_297 0x3250 +#define ARIZONA_WSEQ_SEQUENCE_298 0x3252 +#define ARIZONA_WSEQ_SEQUENCE_299 0x3254 +#define ARIZONA_WSEQ_SEQUENCE_300 0x3256 +#define ARIZONA_WSEQ_SEQUENCE_301 0x3258 +#define ARIZONA_WSEQ_SEQUENCE_302 0x325A +#define ARIZONA_WSEQ_SEQUENCE_303 0x325C +#define ARIZONA_WSEQ_SEQUENCE_304 0x325E +#define ARIZONA_WSEQ_SEQUENCE_305 0x3260 +#define ARIZONA_WSEQ_SEQUENCE_306 0x3262 +#define ARIZONA_WSEQ_SEQUENCE_307 0x3264 +#define ARIZONA_WSEQ_SEQUENCE_308 0x3266 +#define ARIZONA_WSEQ_SEQUENCE_309 0x3268 +#define ARIZONA_WSEQ_SEQUENCE_310 0x326A +#define ARIZONA_WSEQ_SEQUENCE_311 0x326C +#define ARIZONA_WSEQ_SEQUENCE_312 0x326E +#define ARIZONA_WSEQ_SEQUENCE_313 0x3270 +#define ARIZONA_WSEQ_SEQUENCE_314 0x3272 +#define ARIZONA_WSEQ_SEQUENCE_315 0x3274 +#define ARIZONA_WSEQ_SEQUENCE_316 0x3276 +#define ARIZONA_WSEQ_SEQUENCE_317 0x3278 +#define ARIZONA_WSEQ_SEQUENCE_318 0x327A +#define ARIZONA_WSEQ_SEQUENCE_319 0x327C +#define ARIZONA_WSEQ_SEQUENCE_320 0x327E +#define ARIZONA_WSEQ_SEQUENCE_321 0x3280 +#define ARIZONA_WSEQ_SEQUENCE_322 0x3282 +#define ARIZONA_WSEQ_SEQUENCE_323 0x3284 +#define ARIZONA_WSEQ_SEQUENCE_324 0x3286 +#define ARIZONA_WSEQ_SEQUENCE_325 0x3288 +#define ARIZONA_WSEQ_SEQUENCE_326 0x328A +#define ARIZONA_WSEQ_SEQUENCE_327 0x328C +#define ARIZONA_WSEQ_SEQUENCE_328 0x328E +#define ARIZONA_WSEQ_SEQUENCE_329 0x3290 +#define ARIZONA_WSEQ_SEQUENCE_330 0x3292 +#define ARIZONA_WSEQ_SEQUENCE_331 0x3294 +#define ARIZONA_WSEQ_SEQUENCE_332 0x3296 +#define ARIZONA_WSEQ_SEQUENCE_333 0x3298 +#define ARIZONA_WSEQ_SEQUENCE_334 0x329A +#define ARIZONA_WSEQ_SEQUENCE_335 0x329C +#define ARIZONA_WSEQ_SEQUENCE_336 0x329E +#define ARIZONA_WSEQ_SEQUENCE_337 0x32A0 +#define ARIZONA_WSEQ_SEQUENCE_338 0x32A2 +#define ARIZONA_WSEQ_SEQUENCE_339 0x32A4 +#define ARIZONA_WSEQ_SEQUENCE_340 0x32A6 +#define ARIZONA_WSEQ_SEQUENCE_341 0x32A8 +#define ARIZONA_WSEQ_SEQUENCE_342 0x32AA +#define ARIZONA_WSEQ_SEQUENCE_343 0x32AC +#define ARIZONA_WSEQ_SEQUENCE_344 0x32AE +#define ARIZONA_WSEQ_SEQUENCE_345 0x32B0 +#define ARIZONA_WSEQ_SEQUENCE_346 0x32B2 +#define ARIZONA_WSEQ_SEQUENCE_347 0x32B4 +#define ARIZONA_WSEQ_SEQUENCE_348 0x32B6 +#define ARIZONA_WSEQ_SEQUENCE_349 0x32B8 +#define ARIZONA_WSEQ_SEQUENCE_350 0x32BA +#define ARIZONA_WSEQ_SEQUENCE_351 0x32BC +#define ARIZONA_WSEQ_SEQUENCE_352 0x32BE +#define ARIZONA_WSEQ_SEQUENCE_353 0x32C0 +#define ARIZONA_WSEQ_SEQUENCE_354 0x32C2 +#define ARIZONA_WSEQ_SEQUENCE_355 0x32C4 +#define ARIZONA_WSEQ_SEQUENCE_356 0x32C6 +#define ARIZONA_WSEQ_SEQUENCE_357 0x32C8 +#define ARIZONA_WSEQ_SEQUENCE_358 0x32CA +#define ARIZONA_WSEQ_SEQUENCE_359 0x32CC +#define ARIZONA_WSEQ_SEQUENCE_360 0x32CE +#define ARIZONA_WSEQ_SEQUENCE_361 0x32D0 +#define ARIZONA_WSEQ_SEQUENCE_362 0x32D2 +#define ARIZONA_WSEQ_SEQUENCE_363 0x32D4 +#define ARIZONA_WSEQ_SEQUENCE_364 0x32D6 +#define ARIZONA_WSEQ_SEQUENCE_365 0x32D8 +#define ARIZONA_WSEQ_SEQUENCE_366 0x32DA +#define ARIZONA_WSEQ_SEQUENCE_367 0x32DC +#define ARIZONA_WSEQ_SEQUENCE_368 0x32DE +#define ARIZONA_WSEQ_SEQUENCE_369 0x32E0 +#define ARIZONA_WSEQ_SEQUENCE_370 0x32E2 +#define ARIZONA_WSEQ_SEQUENCE_371 0x32E4 +#define ARIZONA_WSEQ_SEQUENCE_372 0x32E6 +#define ARIZONA_WSEQ_SEQUENCE_373 0x32E8 +#define ARIZONA_WSEQ_SEQUENCE_374 0x32EA +#define ARIZONA_WSEQ_SEQUENCE_375 0x32EC +#define ARIZONA_WSEQ_SEQUENCE_376 0x32EE +#define ARIZONA_WSEQ_SEQUENCE_377 0x32F0 +#define ARIZONA_WSEQ_SEQUENCE_378 0x32F2 +#define ARIZONA_WSEQ_SEQUENCE_379 0x32F4 +#define ARIZONA_WSEQ_SEQUENCE_380 0x32F6 +#define ARIZONA_WSEQ_SEQUENCE_381 0x32F8 +#define ARIZONA_WSEQ_SEQUENCE_382 0x32FA +#define ARIZONA_WSEQ_SEQUENCE_383 0x32FC +#define ARIZONA_WSEQ_SEQUENCE_384 0x32FE +#define ARIZONA_WSEQ_SEQUENCE_385 0x3300 +#define ARIZONA_WSEQ_SEQUENCE_386 0x3302 +#define ARIZONA_WSEQ_SEQUENCE_387 0x3304 +#define ARIZONA_WSEQ_SEQUENCE_388 0x3306 +#define ARIZONA_WSEQ_SEQUENCE_389 0x3308 +#define ARIZONA_WSEQ_SEQUENCE_390 0x330A +#define ARIZONA_WSEQ_SEQUENCE_391 0x330C +#define ARIZONA_WSEQ_SEQUENCE_392 0x330E +#define ARIZONA_WSEQ_SEQUENCE_393 0x3310 +#define ARIZONA_WSEQ_SEQUENCE_394 0x3312 +#define ARIZONA_WSEQ_SEQUENCE_395 0x3314 +#define ARIZONA_WSEQ_SEQUENCE_396 0x3316 +#define ARIZONA_WSEQ_SEQUENCE_397 0x3318 +#define ARIZONA_WSEQ_SEQUENCE_398 0x331A +#define ARIZONA_WSEQ_SEQUENCE_399 0x331C +#define ARIZONA_WSEQ_SEQUENCE_400 0x331E +#define ARIZONA_WSEQ_SEQUENCE_401 0x3320 +#define ARIZONA_WSEQ_SEQUENCE_402 0x3322 +#define ARIZONA_WSEQ_SEQUENCE_403 0x3324 +#define ARIZONA_WSEQ_SEQUENCE_404 0x3326 +#define ARIZONA_WSEQ_SEQUENCE_405 0x3328 +#define ARIZONA_WSEQ_SEQUENCE_406 0x332A +#define ARIZONA_WSEQ_SEQUENCE_407 0x332C +#define ARIZONA_WSEQ_SEQUENCE_408 0x332E +#define ARIZONA_WSEQ_SEQUENCE_409 0x3330 +#define ARIZONA_WSEQ_SEQUENCE_410 0x3332 +#define ARIZONA_WSEQ_SEQUENCE_411 0x3334 +#define ARIZONA_WSEQ_SEQUENCE_412 0x3336 +#define ARIZONA_WSEQ_SEQUENCE_413 0x3338 +#define ARIZONA_WSEQ_SEQUENCE_414 0x333A +#define ARIZONA_WSEQ_SEQUENCE_415 0x333C +#define ARIZONA_WSEQ_SEQUENCE_416 0x333E +#define ARIZONA_WSEQ_SEQUENCE_417 0x3340 +#define ARIZONA_WSEQ_SEQUENCE_418 0x3342 +#define ARIZONA_WSEQ_SEQUENCE_419 0x3344 +#define ARIZONA_WSEQ_SEQUENCE_420 0x3346 +#define ARIZONA_WSEQ_SEQUENCE_421 0x3348 +#define ARIZONA_WSEQ_SEQUENCE_422 0x334A +#define ARIZONA_WSEQ_SEQUENCE_423 0x334C +#define ARIZONA_WSEQ_SEQUENCE_424 0x334E +#define ARIZONA_WSEQ_SEQUENCE_425 0x3350 +#define ARIZONA_WSEQ_SEQUENCE_426 0x3352 +#define ARIZONA_WSEQ_SEQUENCE_427 0x3354 +#define ARIZONA_WSEQ_SEQUENCE_428 0x3356 +#define ARIZONA_WSEQ_SEQUENCE_429 0x3358 +#define ARIZONA_WSEQ_SEQUENCE_430 0x335A +#define ARIZONA_WSEQ_SEQUENCE_431 0x335C +#define ARIZONA_WSEQ_SEQUENCE_432 0x335E +#define ARIZONA_WSEQ_SEQUENCE_433 0x3360 +#define ARIZONA_WSEQ_SEQUENCE_434 0x3362 +#define ARIZONA_WSEQ_SEQUENCE_435 0x3364 +#define ARIZONA_WSEQ_SEQUENCE_436 0x3366 +#define ARIZONA_WSEQ_SEQUENCE_437 0x3368 +#define ARIZONA_WSEQ_SEQUENCE_438 0x336A +#define ARIZONA_WSEQ_SEQUENCE_439 0x336C +#define ARIZONA_WSEQ_SEQUENCE_440 0x336E +#define ARIZONA_WSEQ_SEQUENCE_441 0x3370 +#define ARIZONA_WSEQ_SEQUENCE_442 0x3372 +#define ARIZONA_WSEQ_SEQUENCE_443 0x3374 +#define ARIZONA_WSEQ_SEQUENCE_444 0x3376 +#define ARIZONA_WSEQ_SEQUENCE_445 0x3378 +#define ARIZONA_WSEQ_SEQUENCE_446 0x337A +#define ARIZONA_WSEQ_SEQUENCE_447 0x337C +#define ARIZONA_WSEQ_SEQUENCE_448 0x337E +#define ARIZONA_WSEQ_SEQUENCE_449 0x3380 +#define ARIZONA_WSEQ_SEQUENCE_450 0x3382 +#define ARIZONA_WSEQ_SEQUENCE_451 0x3384 +#define ARIZONA_WSEQ_SEQUENCE_452 0x3386 +#define ARIZONA_WSEQ_SEQUENCE_453 0x3388 +#define ARIZONA_WSEQ_SEQUENCE_454 0x338A +#define ARIZONA_WSEQ_SEQUENCE_455 0x338C +#define ARIZONA_WSEQ_SEQUENCE_456 0x338E +#define ARIZONA_WSEQ_SEQUENCE_457 0x3390 +#define ARIZONA_WSEQ_SEQUENCE_458 0x3392 +#define ARIZONA_WSEQ_SEQUENCE_459 0x3394 +#define ARIZONA_WSEQ_SEQUENCE_460 0x3396 +#define ARIZONA_WSEQ_SEQUENCE_461 0x3398 +#define ARIZONA_WSEQ_SEQUENCE_462 0x339A +#define ARIZONA_WSEQ_SEQUENCE_463 0x339C +#define ARIZONA_WSEQ_SEQUENCE_464 0x339E +#define ARIZONA_WSEQ_SEQUENCE_465 0x33A0 +#define ARIZONA_WSEQ_SEQUENCE_466 0x33A2 +#define ARIZONA_WSEQ_SEQUENCE_467 0x33A4 +#define ARIZONA_WSEQ_SEQUENCE_468 0x33A6 +#define ARIZONA_WSEQ_SEQUENCE_469 0x33A8 +#define ARIZONA_WSEQ_SEQUENCE_470 0x33AA +#define ARIZONA_WSEQ_SEQUENCE_471 0x33AC +#define ARIZONA_WSEQ_SEQUENCE_472 0x33AE +#define ARIZONA_WSEQ_SEQUENCE_473 0x33B0 +#define ARIZONA_WSEQ_SEQUENCE_474 0x33B2 +#define ARIZONA_WSEQ_SEQUENCE_475 0x33B4 +#define ARIZONA_WSEQ_SEQUENCE_476 0x33B6 +#define ARIZONA_WSEQ_SEQUENCE_477 0x33B8 +#define ARIZONA_WSEQ_SEQUENCE_478 0x33BA +#define ARIZONA_WSEQ_SEQUENCE_479 0x33BC +#define ARIZONA_WSEQ_SEQUENCE_480 0x33BE +#define ARIZONA_WSEQ_SEQUENCE_481 0x33C0 +#define ARIZONA_WSEQ_SEQUENCE_482 0x33C2 +#define ARIZONA_WSEQ_SEQUENCE_483 0x33C4 +#define ARIZONA_WSEQ_SEQUENCE_484 0x33C6 +#define ARIZONA_WSEQ_SEQUENCE_485 0x33C8 +#define ARIZONA_WSEQ_SEQUENCE_486 0x33CA +#define ARIZONA_WSEQ_SEQUENCE_487 0x33CC +#define ARIZONA_WSEQ_SEQUENCE_488 0x33CE +#define ARIZONA_WSEQ_SEQUENCE_489 0x33D0 +#define ARIZONA_WSEQ_SEQUENCE_490 0x33D2 +#define ARIZONA_WSEQ_SEQUENCE_491 0x33D4 +#define ARIZONA_WSEQ_SEQUENCE_492 0x33D6 +#define ARIZONA_WSEQ_SEQUENCE_493 0x33D8 +#define ARIZONA_WSEQ_SEQUENCE_494 0x33DA +#define ARIZONA_WSEQ_SEQUENCE_495 0x33DC +#define ARIZONA_WSEQ_SEQUENCE_496 0x33DE +#define ARIZONA_WSEQ_SEQUENCE_497 0x33E0 +#define ARIZONA_WSEQ_SEQUENCE_498 0x33E2 +#define ARIZONA_WSEQ_SEQUENCE_499 0x33E4 +#define ARIZONA_WSEQ_SEQUENCE_500 0x33E6 +#define ARIZONA_WSEQ_SEQUENCE_501 0x33E8 +#define ARIZONA_WSEQ_SEQUENCE_502 0x33EA +#define ARIZONA_WSEQ_SEQUENCE_503 0x33EC +#define ARIZONA_WSEQ_SEQUENCE_504 0x33EE +#define ARIZONA_WSEQ_SEQUENCE_505 0x33F0 +#define ARIZONA_WSEQ_SEQUENCE_506 0x33F2 +#define ARIZONA_WSEQ_SEQUENCE_507 0x33F4 +#define ARIZONA_WSEQ_SEQUENCE_508 0x33F6 +#define WM8285_DSP1_CONFIG 0x0FFE00 +#define WM8285_DSP1_STATUS_1 0x0FFE04 +#define WM8285_DSP1_STATUS_2 0x0FFE05 +#define WM8285_DSP1_WDMA_CONFIG_1 0x0FFE30 +#define WM8285_DSP1_WDMA_CONFIG_2 0x0FFE31 +#define WM8285_DSP1_RDMA_CONFIG_1 0x0FFE34 +#define WM8285_DSP1_SCRATCH_0 0x0FFE40 +#define WM8285_DSP1_SCRATCH_1 0x0FFE41 +#define WM8285_DSP1_SCRATCH_2 0x0FFE42 +#define WM8285_DSP1_SCRATCH_3 0x0FFE43 +#define WM8285_DSP2_CONFIG 0x17FE00 +#define WM8285_DSP2_STATUS_1 0x17FE04 +#define WM8285_DSP2_STATUS_2 0x17FE05 +#define WM8285_DSP2_WDMA_CONFIG_1 0x17FE30 +#define WM8285_DSP2_WDMA_CONFIG_2 0x17FE31 +#define WM8285_DSP2_RDMA_CONFIG_1 0x17FE34 +#define WM8285_DSP2_SCRATCH_0 0x17FE40 +#define WM8285_DSP2_SCRATCH_1 0x17FE41 +#define WM8285_DSP2_SCRATCH_2 0x17FE42 +#define WM8285_DSP2_SCRATCH_3 0x17FE43 +#define WM8285_DSP3_CONFIG 0x1FFE00 +#define WM8285_DSP3_STATUS_1 0x1FFE04 +#define WM8285_DSP3_STATUS_2 0x1FFE05 +#define WM8285_DSP3_WDMA_CONFIG_1 0x1FFE30 +#define WM8285_DSP3_WDMA_CONFIG_2 0x1FFE31 +#define WM8285_DSP3_RDMA_CONFIG_1 0x1FFE34 +#define WM8285_DSP3_SCRATCH_0 0x1FFE40 +#define WM8285_DSP3_SCRATCH_1 0x1FFE41 +#define WM8285_DSP3_SCRATCH_2 0x1FFE42 +#define WM8285_DSP3_SCRATCH_3 0x1FFE43 +#define WM8285_DSP4_CONFIG 0x27FE00 +#define WM8285_DSP4_STATUS_1 0x27FE04 +#define WM8285_DSP4_STATUS_2 0x27FE05 +#define WM8285_DSP4_WDMA_CONFIG_1 0x27FE30 +#define WM8285_DSP4_WDMA_CONFIG_2 0x27FE31 +#define WM8285_DSP4_RDMA_CONFIG_1 0x27FE34 +#define WM8285_DSP4_SCRATCH_0 0x27FE40 +#define WM8285_DSP4_SCRATCH_1 0x27FE41 +#define WM8285_DSP4_SCRATCH_2 0x27FE42 +#define WM8285_DSP4_SCRATCH_3 0x27FE43 +#define WM8285_DSP5_CONFIG 0x2FFE00 +#define WM8285_DSP5_STATUS_1 0x2FFE04 +#define WM8285_DSP5_STATUS_2 0x2FFE05 +#define WM8285_DSP5_WDMA_CONFIG_1 0x2FFE30 +#define WM8285_DSP5_WDMA_CONFIG_2 0x2FFE31 +#define WM8285_DSP5_RDMA_CONFIG_1 0x2FFE34 +#define WM8285_DSP5_SCRATCH_0 0x2FFE40 +#define WM8285_DSP5_SCRATCH_1 0x2FFE41 +#define WM8285_DSP5_SCRATCH_2 0x2FFE42 +#define WM8285_DSP5_SCRATCH_3 0x2FFE43 +#define WM8285_DSP6_CONFIG 0x37FE00 +#define WM8285_DSP6_STATUS_1 0x37FE04 +#define WM8285_DSP6_STATUS_2 0x37FE05 +#define WM8285_DSP6_WDMA_CONFIG_1 0x37FE30 +#define WM8285_DSP6_WDMA_CONFIG_2 0x37FE31 +#define WM8285_DSP6_RDMA_CONFIG_1 0x37FE34 +#define WM8285_DSP6_SCRATCH_0 0x37FE40 +#define WM8285_DSP6_SCRATCH_1 0x37FE41 +#define WM8285_DSP6_SCRATCH_2 0x37FE42 +#define WM8285_DSP6_SCRATCH_3 0x37FE43 +#define WM8285_DSP7_CONFIG 0x3FFE00 +#define WM8285_DSP7_STATUS_1 0x3FFE04 +#define WM8285_DSP7_STATUS_2 0x3FFE05 +#define WM8285_DSP7_WDMA_CONFIG_1 0x3FFE30 +#define WM8285_DSP7_WDMA_CONFIG_2 0x3FFE31 +#define WM8285_DSP7_RDMA_CONFIG_1 0x3FFE34 +#define WM8285_DSP7_SCRATCH_0 0x3FFE40 +#define WM8285_DSP7_SCRATCH_1 0x3FFE41 +#define WM8285_DSP7_SCRATCH_2 0x3FFE42 +#define WM8285_DSP7_SCRATCH_3 0x3FFE43 /* * Field Definitions. @@ -2137,6 +3112,162 @@ #define ARIZONA_FLL2_GPDIV_ENA_SHIFT 0 /* FLL2_GPDIV_ENA */ #define ARIZONA_FLL2_GPDIV_ENA_WIDTH 1 /* FLL2_GPDIV_ENA */ +/* + * R433 (0x1B1) - FLL3 Control 1 + */ +#define ARIZONA_FLL3_FREERUN 0x0002 /* FLL3_FREERUN */ +#define ARIZONA_FLL3_FREERUN_MASK 0x0002 /* FLL3_FREERUN */ +#define ARIZONA_FLL3_FREERUN_SHIFT 1 /* FLL3_FREERUN */ +#define ARIZONA_FLL3_FREERUN_WIDTH 1 /* FLL3_FREERUN */ +#define ARIZONA_FLL3_ENA 0x0001 /* FLL3_ENA */ +#define ARIZONA_FLL3_ENA_MASK 0x0001 /* FLL3_ENA */ +#define ARIZONA_FLL3_ENA_SHIFT 0 /* FLL3_ENA */ +#define ARIZONA_FLL3_ENA_WIDTH 1 /* FLL3_ENA */ + +/* + * R434 (0x1B2) - FLL3 Control 2 + */ +#define ARIZONA_FLL3_CTRL_UPD 0x8000 /* FLL3_CTRL_UPD */ +#define ARIZONA_FLL3_CTRL_UPD_MASK 0x8000 /* FLL3_CTRL_UPD */ +#define ARIZONA_FLL3_CTRL_UPD_SHIFT 15 /* FLL3_CTRL_UPD */ +#define ARIZONA_FLL3_CTRL_UPD_WIDTH 1 /* FLL3_CTRL_UPD */ +#define ARIZONA_FLL3_N_MASK 0x03FF /* FLL3_N - [9:0] */ +#define ARIZONA_FLL3_N_SHIFT 0 /* FLL3_N - [9:0] */ +#define ARIZONA_FLL3_N_WIDTH 10 /* FLL3_N - [9:0] */ + +/* + * R435 (0x1B3) - FLL3 Control 3 + */ +#define ARIZONA_FLL3_THETA_MASK 0xFFFF /* FLL3_THETA - [15:0] */ +#define ARIZONA_FLL3_THETA_SHIFT 0 /* FLL3_THETA - [15:0] */ +#define ARIZONA_FLL3_THETA_WIDTH 16 /* FLL3_THETA - [15:0] */ + +/* + * R436 (0x1B4) - FLL3 Control 4 + */ +#define ARIZONA_FLL3_LAMBDA_MASK 0xFFFF /* FLL3_LAMBDA - [15:0] */ +#define ARIZONA_FLL3_LAMBDA_SHIFT 0 /* FLL3_LAMBDA - [15:0] */ +#define ARIZONA_FLL3_LAMBDA_WIDTH 16 /* FLL3_LAMBDA - [15:0] */ + +/* + * R437 (0x1B5) - FLL3 Control 5 + */ +#define ARIZONA_FLL3_FRATIO_MASK 0x0700 /* FLL3_FRATIO - [10:8] */ +#define ARIZONA_FLL3_FRATIO_SHIFT 8 /* FLL3_FRATIO - [10:8] */ +#define ARIZONA_FLL3_FRATIO_WIDTH 3 /* FLL3_FRATIO - [10:8] */ +#define ARIZONA_FLL3_OUTDIV_MASK 0x000E /* FLL3_OUTDIV - [3:1] */ +#define ARIZONA_FLL3_OUTDIV_SHIFT 1 /* FLL3_OUTDIV - [3:1] */ +#define ARIZONA_FLL3_OUTDIV_WIDTH 3 /* FLL3_OUTDIV - [3:1] */ + +/* + * R438 (0x1B6) - FLL3 Control 6 + */ +#define ARIZONA_FLL3_CLK_REF_DIV_MASK 0x00C0 /* FLL3_CLK_REF_DIV - [7:6] */ +#define ARIZONA_FLL3_CLK_REF_DIV_SHIFT 6 /* FLL3_CLK_REF_DIV - [7:6] */ +#define ARIZONA_FLL3_CLK_REF_DIV_WIDTH 2 /* FLL3_CLK_REF_DIV - [7:6] */ +#define ARIZONA_FLL3_CLK_REF_SRC_MASK 0x000F /* FLL3_CLK_REF_SRC - [3:0] */ +#define ARIZONA_FLL3_CLK_REF_SRC_SHIFT 0 /* FLL3_CLK_REF_SRC - [3:0] */ +#define ARIZONA_FLL3_CLK_REF_SRC_WIDTH 4 /* FLL3_CLK_REF_SRC - [3:0] */ + +/* + * R439 (0x1B7) - FLL3 Loop Filter Test 1 + */ +#define ARIZONA_FLL3_FRC_INTEG_UPD 0x8000 /* FLL3_FRC_INTEG_UPD */ +#define ARIZONA_FLL3_FRC_INTEG_UPD_MASK 0x8000 /* FLL3_FRC_INTEG_UPD */ +#define ARIZONA_FLL3_FRC_INTEG_UPD_SHIFT 15 /* FLL3_FRC_INTEG_UPD */ +#define ARIZONA_FLL3_FRC_INTEG_UPD_WIDTH 1 /* FLL3_FRC_INTEG_UPD */ +#define ARIZONA_FLL3_FRC_INTEG_VAL_MASK 0x0FFF /* FLL3_FRC_INTEG_VAL - [11:0] */ +#define ARIZONA_FLL3_FRC_INTEG_VAL_SHIFT 0 /* FLL3_FRC_INTEG_VAL - [11:0] */ +#define ARIZONA_FLL3_FRC_INTEG_VAL_WIDTH 12 /* FLL3_FRC_INTEG_VAL - [11:0] */ + +/* + * R441 (0x1B9) - FLL3 Control 7 + */ +#define ARIZONA_FLL3_GAIN_MASK 0x003c /* FLL3_GAIN */ +#define ARIZONA_FLL3_GAIN_SHIFT 2 /* FLL3_GAIN */ +#define ARIZONA_FLL3_GAIN_WIDTH 4 /* FLL3_GAIN */ + +/* + * R449 (0x1C1) - FLL3 Synchroniser 1 + */ +#define ARIZONA_FLL3_SYNC_ENA 0x0001 /* FLL3_SYNC_ENA */ +#define ARIZONA_FLL3_SYNC_ENA_MASK 0x0001 /* FLL3_SYNC_ENA */ +#define ARIZONA_FLL3_SYNC_ENA_SHIFT 0 /* FLL3_SYNC_ENA */ +#define ARIZONA_FLL3_SYNC_ENA_WIDTH 1 /* FLL3_SYNC_ENA */ + +/* + * R450 (0x1C2) - FLL3 Synchroniser 2 + */ +#define ARIZONA_FLL3_SYNC_N_MASK 0x03FF /* FLL3_SYNC_N - [9:0] */ +#define ARIZONA_FLL3_SYNC_N_SHIFT 0 /* FLL3_SYNC_N - [9:0] */ +#define ARIZONA_FLL3_SYNC_N_WIDTH 10 /* FLL3_SYNC_N - [9:0] */ + +/* + * R451 (0x1C3) - FLL3 Synchroniser 3 + */ +#define ARIZONA_FLL3_SYNC_THETA_MASK 0xFFFF /* FLL3_SYNC_THETA - [15:0] */ +#define ARIZONA_FLL3_SYNC_THETA_SHIFT 0 /* FLL3_SYNC_THETA - [15:0] */ +#define ARIZONA_FLL3_SYNC_THETA_WIDTH 16 /* FLL3_SYNC_THETA - [15:0] */ + +/* + * R452 (0x1C4) - FLL3 Synchroniser 4 + */ +#define ARIZONA_FLL3_SYNC_LAMBDA_MASK 0xFFFF /* FLL3_SYNC_LAMBDA - [15:0] */ +#define ARIZONA_FLL3_SYNC_LAMBDA_SHIFT 0 /* FLL3_SYNC_LAMBDA - [15:0] */ +#define ARIZONA_FLL3_SYNC_LAMBDA_WIDTH 16 /* FLL3_SYNC_LAMBDA - [15:0] */ + +/* + * R453 (0x1C5) - FLL3 Synchroniser 5 + */ +#define ARIZONA_FLL3_SYNC_FRATIO_MASK 0x0700 /* FLL3_SYNC_FRATIO - [10:8] */ +#define ARIZONA_FLL3_SYNC_FRATIO_SHIFT 8 /* FLL3_SYNC_FRATIO - [10:8] */ +#define ARIZONA_FLL3_SYNC_FRATIO_WIDTH 3 /* FLL3_SYNC_FRATIO - [10:8] */ + +/* + * R454 (0x1C6) - FLL3 Synchroniser 6 + */ +#define ARIZONA_FLL3_CLK_SYNC_DIV_MASK 0x00C0 /* FLL3_CLK_SYNC_DIV - [7:6] */ +#define ARIZONA_FLL3_CLK_SYNC_DIV_SHIFT 6 /* FLL3_CLK_SYNC_DIV - [7:6] */ +#define ARIZONA_FLL3_CLK_SYNC_DIV_WIDTH 2 /* FLL3_CLK_SYNC_DIV - [7:6] */ +#define ARIZONA_FLL3_CLK_SYNC_SRC_MASK 0x000F /* FLL3_CLK_SYNC_SRC - [3:0] */ +#define ARIZONA_FLL3_CLK_SYNC_SRC_SHIFT 0 /* FLL3_CLK_SYNC_SRC - [3:0] */ +#define ARIZONA_FLL3_CLK_SYNC_SRC_WIDTH 4 /* FLL3_CLK_SYNC_SRC - [3:0] */ + +/* + * R455 (0x1C7) - FLL3 Synchroniser 7 + */ +#define ARIZONA_FLL3_SYNC_GAIN_MASK 0x003c /* FLL3_SYNC_GAIN */ +#define ARIZONA_FLL3_SYNC_GAIN_SHIFT 2 /* FLL3_SYNC_GAIN */ +#define ARIZONA_FLL3_SYNC_GAIN_WIDTH 4 /* FLL3_SYNC_GAIN */ +#define ARIZONA_FLL3_SYNC_BW 0x0001 /* FLL3_SYNC_BW */ +#define ARIZONA_FLL3_SYNC_BW_MASK 0x0001 /* FLL3_SYNC_BW */ +#define ARIZONA_FLL3_SYNC_BW_SHIFT 0 /* FLL3_SYNC_BW */ +#define ARIZONA_FLL3_SYNC_BW_WIDTH 1 /* FLL3_SYNC_BW */ + +/* + * R457 (0x1C9) - FLL3 Spread Spectrum + */ +#define ARIZONA_FLL3_SS_AMPL_MASK 0x0030 /* FLL3_SS_AMPL - [5:4] */ +#define ARIZONA_FLL3_SS_AMPL_SHIFT 4 /* FLL3_SS_AMPL - [5:4] */ +#define ARIZONA_FLL3_SS_AMPL_WIDTH 2 /* FLL3_SS_AMPL - [5:4] */ +#define ARIZONA_FLL3_SS_FREQ_MASK 0x000C /* FLL3_SS_FREQ - [3:2] */ +#define ARIZONA_FLL3_SS_FREQ_SHIFT 2 /* FLL3_SS_FREQ - [3:2] */ +#define ARIZONA_FLL3_SS_FREQ_WIDTH 2 /* FLL3_SS_FREQ - [3:2] */ +#define ARIZONA_FLL3_SS_SEL_MASK 0x0003 /* FLL3_SS_SEL - [1:0] */ +#define ARIZONA_FLL3_SS_SEL_SHIFT 0 /* FLL3_SS_SEL - [1:0] */ +#define ARIZONA_FLL3_SS_SEL_WIDTH 2 /* FLL3_SS_SEL - [1:0] */ + +/* + * R458 (0x1CA) - FLL3 GPIO Clock + */ +#define ARIZONA_FLL3_GPDIV_MASK 0x00FE /* FLL3_GPDIV - [7:1] */ +#define ARIZONA_FLL3_GPDIV_SHIFT 1 /* FLL3_GPDIV - [7:1] */ +#define ARIZONA_FLL3_GPDIV_WIDTH 7 /* FLL3_GPDIV - [7:1] */ +#define ARIZONA_FLL3_GPDIV_ENA 0x0001 /* FLL3_GPDIV_ENA */ +#define ARIZONA_FLL3_GPDIV_ENA_MASK 0x0001 /* FLL3_GPDIV_ENA */ +#define ARIZONA_FLL3_GPDIV_ENA_SHIFT 0 /* FLL3_GPDIV_ENA */ +#define ARIZONA_FLL3_GPDIV_ENA_WIDTH 1 /* FLL3_GPDIV_ENA */ + /* * R512 (0x200) - Mic Charge Pump 1 */ @@ -2299,6 +3430,37 @@ #define ARIZONA_MICB3_ENA_SHIFT 0 /* MICB3_ENA */ #define ARIZONA_MICB3_ENA_WIDTH 1 /* MICB3_ENA */ +/* + * R539 (0x21B) - Mic Bias Ctrl 4 + */ +#define ARIZONA_MICB4_EXT_CAP 0x8000 /* MICB4_EXT_CAP */ +#define ARIZONA_MICB4_EXT_CAP_MASK 0x8000 /* MICB4_EXT_CAP */ +#define ARIZONA_MICB4_EXT_CAP_SHIFT 15 /* MICB4_EXT_CAP */ +#define ARIZONA_MICB4_EXT_CAP_WIDTH 1 /* MICB4_EXT_CAP */ +#define ARIZONA_MICB4_LVL_MASK 0x01E0 /* MICB4_LVL - [8:5] */ +#define ARIZONA_MICB4_LVL_SHIFT 5 /* MICB4_LVL - [8:5] */ +#define ARIZONA_MICB4_LVL_WIDTH 4 /* MICB4_LVL - [8:5] */ +#define ARIZONA_MICB4_FAST 0x0010 /* MICB4_FAST */ +#define ARIZONA_MICB4_FAST_MASK 0x0010 /* MICB4_FAST */ +#define ARIZONA_MICB4_FAST_SHIFT 4 /* MICB4_FAST */ +#define ARIZONA_MICB4_FAST_WIDTH 1 /* MICB4_FAST */ +#define ARIZONA_MICB4_RATE 0x0008 /* MICB4_RATE */ +#define ARIZONA_MICB4_RATE_MASK 0x0008 /* MICB4_RATE */ +#define ARIZONA_MICB4_RATE_SHIFT 3 /* MICB4_RATE */ +#define ARIZONA_MICB4_RATE_WIDTH 1 /* MICB4_RATE */ +#define ARIZONA_MICB4_DISCH 0x0004 /* MICB4_DISCH */ +#define ARIZONA_MICB4_DISCH_MASK 0x0004 /* MICB4_DISCH */ +#define ARIZONA_MICB4_DISCH_SHIFT 2 /* MICB4_DISCH */ +#define ARIZONA_MICB4_DISCH_WIDTH 1 /* MICB4_DISCH */ +#define ARIZONA_MICB4_BYPASS 0x0002 /* MICB4_BYPASS */ +#define ARIZONA_MICB4_BYPASS_MASK 0x0002 /* MICB4_BYPASS */ +#define ARIZONA_MICB4_BYPASS_SHIFT 1 /* MICB4_BYPASS */ +#define ARIZONA_MICB4_BYPASS_WIDTH 1 /* MICB4_BYPASS */ +#define ARIZONA_MICB4_ENA 0x0001 /* MICB4_ENA */ +#define ARIZONA_MICB4_ENA_MASK 0x0001 /* MICB4_ENA */ +#define ARIZONA_MICB4_ENA_SHIFT 0 /* MICB4_ENA */ +#define ARIZONA_MICB4_ENA_WIDTH 1 /* MICB4_ENA */ + /* * R549 (0x225) - HP Ctrl 1L */ @@ -2508,6 +3670,22 @@ /* * R768 (0x300) - Input Enables */ +#define ARIZONA_IN6L_ENA 0x0800 /* IN6L_ENA */ +#define ARIZONA_IN6L_ENA_MASK 0x0800 /* IN6L_ENA */ +#define ARIZONA_IN6L_ENA_SHIFT 11 /* IN6L_ENA */ +#define ARIZONA_IN6L_ENA_WIDTH 1 /* IN6L_ENA */ +#define ARIZONA_IN6R_ENA 0x0400 /* IN6R_ENA */ +#define ARIZONA_IN6R_ENA_MASK 0x0400 /* IN6R_ENA */ +#define ARIZONA_IN6R_ENA_SHIFT 10 /* IN6R_ENA */ +#define ARIZONA_IN6R_ENA_WIDTH 1 /* IN6R_ENA */ +#define ARIZONA_IN5L_ENA 0x0200 /* IN5L_ENA */ +#define ARIZONA_IN5L_ENA_MASK 0x0200 /* IN5L_ENA */ +#define ARIZONA_IN5L_ENA_SHIFT 9 /* IN5L_ENA */ +#define ARIZONA_IN5L_ENA_WIDTH 1 /* IN5L_ENA */ +#define ARIZONA_IN5R_ENA 0x0100 /* IN5R_ENA */ +#define ARIZONA_IN5R_ENA_MASK 0x0100 /* IN5R_ENA */ +#define ARIZONA_IN5R_ENA_SHIFT 8 /* IN5R_ENA */ +#define ARIZONA_IN5R_ENA_WIDTH 1 /* IN5R_ENA */ #define ARIZONA_IN4L_ENA 0x0080 /* IN4L_ENA */ #define ARIZONA_IN4L_ENA_MASK 0x0080 /* IN4L_ENA */ #define ARIZONA_IN4L_ENA_SHIFT 7 /* IN4L_ENA */ @@ -2614,6 +3792,9 @@ #define ARIZONA_IN1_DMICL_DLY_MASK 0x003F /* IN1_DMICL_DLY - [5:0] */ #define ARIZONA_IN1_DMICL_DLY_SHIFT 0 /* IN1_DMICL_DLY - [5:0] */ #define ARIZONA_IN1_DMICL_DLY_WIDTH 6 /* IN1_DMICL_DLY - [5:0] */ +#define WM8285_IN1_OSR_MASK 0x0700 /* IN1_OSR - [8:10] */ +#define WM8285_IN1_OSR_SHIFT 8 /* IN1_OSR - [8:10] */ +#define WM8285_IN1_OSR_WIDTH 3 /* IN1_OSR - [8:10] */ /* * R788 (0x314) - IN1R Control @@ -2702,6 +3883,9 @@ #define ARIZONA_IN2_DMICL_DLY_MASK 0x003F /* IN2_DMICL_DLY - [5:0] */ #define ARIZONA_IN2_DMICL_DLY_SHIFT 0 /* IN2_DMICL_DLY - [5:0] */ #define ARIZONA_IN2_DMICL_DLY_WIDTH 6 /* IN2_DMICL_DLY - [5:0] */ +#define WM8285_IN2_OSR_MASK 0x0700 /* IN2_OSR - [8:10] */ +#define WM8285_IN2_OSR_SHIFT 8 /* IN2_OSR - [8:10] */ +#define WM8285_IN2_OSR_WIDTH 3 /* IN2_OSR - [8:10] */ /* * R796 (0x31C) - IN2R Control @@ -2716,6 +3900,12 @@ /* * R797 (0x31D) - ADC Digital Volume 2R */ +#define ARIZONA_IN2R_SRC_MASK 0x4000 /* IN2R_SRC - [14] */ +#define ARIZONA_IN2R_SRC_SHIFT 14 /* IN2R_SRC - [14] */ +#define ARIZONA_IN2R_SRC_WIDTH 1 /* IN2R_SRC - [14] */ +#define ARIZONA_IN2R_SRC_SE_MASK 0x2000 /* IN2R_SRC - [13] */ +#define ARIZONA_IN2R_SRC_SE_SHIFT 13 /* IN2R_SRC - [13] */ +#define ARIZONA_IN2R_SRC_SE_WIDTH 1 /* IN2R_SRC - [13] */ #define ARIZONA_IN_VU 0x0200 /* IN_VU */ #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */ #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */ @@ -2778,6 +3968,9 @@ #define ARIZONA_IN3_DMICL_DLY_MASK 0x003F /* IN3_DMICL_DLY - [5:0] */ #define ARIZONA_IN3_DMICL_DLY_SHIFT 0 /* IN3_DMICL_DLY - [5:0] */ #define ARIZONA_IN3_DMICL_DLY_WIDTH 6 /* IN3_DMICL_DLY - [5:0] */ +#define WM8285_IN3_OSR_MASK 0x0700 /* IN3_OSR - [8:10] */ +#define WM8285_IN3_OSR_SHIFT 8 /* IN3_OSR - [8:10] */ +#define WM8285_IN3_OSR_WIDTH 3 /* IN3_OSR - [8:10] */ /* * R804 (0x324) - IN3R Control @@ -2845,6 +4038,9 @@ #define ARIZONA_IN4L_DMIC_DLY_MASK 0x003F /* IN4L_DMIC_DLY - [5:0] */ #define ARIZONA_IN4L_DMIC_DLY_SHIFT 0 /* IN4L_DMIC_DLY - [5:0] */ #define ARIZONA_IN4L_DMIC_DLY_WIDTH 6 /* IN4L_DMIC_DLY - [5:0] */ +#define WM8285_IN4_OSR_MASK 0x0700 /* IN4_OSR - [8:10] */ +#define WM8285_IN4_OSR_SHIFT 8 /* IN4_OSR - [8:10] */ +#define WM8285_IN4_OSR_WIDTH 3 /* IN4_OSR - [8:10] */ /* * R812 (0x32C) - IN4R Control @@ -2875,6 +4071,140 @@ #define ARIZONA_IN4R_DMIC_DLY_SHIFT 0 /* IN4R_DMIC_DLY - [5:0] */ #define ARIZONA_IN4R_DMIC_DLY_WIDTH 6 /* IN4R_DMIC_DLY - [5:0] */ +/* + * R816 (0x330) - IN5L Control + */ +#define ARIZONA_IN5L_HPF_MASK 0x8000 /* IN5L_HPF - [15] */ +#define ARIZONA_IN5L_HPF_SHIFT 15 /* IN5L_HPF - [15] */ +#define ARIZONA_IN5L_HPF_WIDTH 1 /* IN5L_HPF - [15] */ +#define ARIZONA_IN5_OSR_MASK 0x6000 /* IN5_OSR - [14:13] */ +#define ARIZONA_IN5_OSR_SHIFT 13 /* IN5_OSR - [14:13] */ +#define ARIZONA_IN5_OSR_WIDTH 2 /* IN5_OSR - [14:13] */ +#define ARIZONA_IN5_DMIC_SUP_MASK 0x1800 /* IN5_DMIC_SUP - [12:11] */ +#define ARIZONA_IN5_DMIC_SUP_SHIFT 11 /* IN5_DMIC_SUP - [12:11] */ +#define ARIZONA_IN5_DMIC_SUP_WIDTH 2 /* IN5_DMIC_SUP - [12:11] */ + +/* + * R817 (0x331) - ADC Digital Volume 5L + */ +#define ARIZONA_IN_VU 0x0200 /* IN_VU */ +#define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */ +#define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */ +#define ARIZONA_IN_VU_WIDTH 1 /* IN_VU */ +#define ARIZONA_IN5L_MUTE 0x0100 /* IN5L_MUTE */ +#define ARIZONA_IN5L_MUTE_MASK 0x0100 /* IN5L_MUTE */ +#define ARIZONA_IN5L_MUTE_SHIFT 8 /* IN5L_MUTE */ +#define ARIZONA_IN5L_MUTE_WIDTH 1 /* IN5L_MUTE */ +#define ARIZONA_IN5L_DIG_VOL_MASK 0x00FF /* IN5L_DIG_VOL - [7:0] */ +#define ARIZONA_IN5L_DIG_VOL_SHIFT 0 /* IN5L_DIG_VOL - [7:0] */ +#define ARIZONA_IN5L_DIG_VOL_WIDTH 8 /* IN5L_DIG_VOL - [7:0] */ + +/* + * R818 (0x332) - DMIC5L Control + */ +#define ARIZONA_IN5L_DMIC_DLY_MASK 0x003F /* IN5L_DMIC_DLY - [5:0] */ +#define ARIZONA_IN5L_DMIC_DLY_SHIFT 0 /* IN5L_DMIC_DLY - [5:0] */ +#define ARIZONA_IN5L_DMIC_DLY_WIDTH 6 /* IN5L_DMIC_DLY - [5:0] */ +#define WM8285_IN5_OSR_MASK 0x0700 /* IN5_OSR - [8:10] */ +#define WM8285_IN5_OSR_SHIFT 8 /* IN5_OSR - [8:10] */ +#define WM8285_IN5_OSR_WIDTH 3 /* IN5_OSR - [8:10] */ + +/* + * R820 (0x334) - IN5R Control + */ +#define ARIZONA_IN5R_HPF_MASK 0x8000 /* IN5R_HPF - [15] */ +#define ARIZONA_IN5R_HPF_SHIFT 15 /* IN5R_HPF - [15] */ +#define ARIZONA_IN5R_HPF_WIDTH 1 /* IN5R_HPF - [15] */ + +/* + * R821 (0x335) - ADC Digital Volume 5R + */ +#define ARIZONA_IN_VU 0x0200 /* IN_VU */ +#define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */ +#define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */ +#define ARIZONA_IN_VU_WIDTH 1 /* IN_VU */ +#define ARIZONA_IN5R_MUTE 0x0100 /* IN5R_MUTE */ +#define ARIZONA_IN5R_MUTE_MASK 0x0100 /* IN5R_MUTE */ +#define ARIZONA_IN5R_MUTE_SHIFT 8 /* IN5R_MUTE */ +#define ARIZONA_IN5R_MUTE_WIDTH 1 /* IN5R_MUTE */ +#define ARIZONA_IN5R_DIG_VOL_MASK 0x00FF /* IN5R_DIG_VOL - [7:0] */ +#define ARIZONA_IN5R_DIG_VOL_SHIFT 0 /* IN5R_DIG_VOL - [7:0] */ +#define ARIZONA_IN5R_DIG_VOL_WIDTH 8 /* IN5R_DIG_VOL - [7:0] */ + +/* + * R822 (0x336) - DMIC5R Control + */ +#define ARIZONA_IN5R_DMIC_DLY_MASK 0x003F /* IN5R_DMIC_DLY - [5:0] */ +#define ARIZONA_IN5R_DMIC_DLY_SHIFT 0 /* IN5R_DMIC_DLY - [5:0] */ +#define ARIZONA_IN5R_DMIC_DLY_WIDTH 6 /* IN5R_DMIC_DLY - [5:0] */ + +/* + * R824 (0x338) - IN6L Control + */ +#define ARIZONA_IN6L_HPF_MASK 0x8000 /* IN6L_HPF - [15] */ +#define ARIZONA_IN6L_HPF_SHIFT 15 /* IN6L_HPF - [15] */ +#define ARIZONA_IN6L_HPF_WIDTH 1 /* IN6L_HPF - [15] */ +#define ARIZONA_IN6_OSR_MASK 0x6000 /* IN6_OSR - [14:13] */ +#define ARIZONA_IN6_OSR_SHIFT 13 /* IN6_OSR - [14:13] */ +#define ARIZONA_IN6_OSR_WIDTH 2 /* IN6_OSR - [14:13] */ +#define ARIZONA_IN6_DMIC_SUP_MASK 0x1800 /* IN6_DMIC_SUP - [12:11] */ +#define ARIZONA_IN6_DMIC_SUP_SHIFT 11 /* IN6_DMIC_SUP - [12:11] */ +#define ARIZONA_IN6_DMIC_SUP_WIDTH 2 /* IN6_DMIC_SUP - [12:11] */ + +/* + * R825 (0x339) - ADC Digital Volume 6L + */ +#define ARIZONA_IN_VU 0x0200 /* IN_VU */ +#define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */ +#define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */ +#define ARIZONA_IN_VU_WIDTH 1 /* IN_VU */ +#define ARIZONA_IN6L_MUTE 0x0100 /* IN6L_MUTE */ +#define ARIZONA_IN6L_MUTE_MASK 0x0100 /* IN6L_MUTE */ +#define ARIZONA_IN6L_MUTE_SHIFT 8 /* IN6L_MUTE */ +#define ARIZONA_IN6L_MUTE_WIDTH 1 /* IN6L_MUTE */ +#define ARIZONA_IN6L_DIG_VOL_MASK 0x00FF /* IN6L_DIG_VOL - [7:0] */ +#define ARIZONA_IN6L_DIG_VOL_SHIFT 0 /* IN6L_DIG_VOL - [7:0] */ +#define ARIZONA_IN6L_DIG_VOL_WIDTH 8 /* IN6L_DIG_VOL - [7:0] */ + +/* + * R826 (0x33A) - DMIC6L Control + */ +#define ARIZONA_IN6L_DMIC_DLY_MASK 0x003F /* IN6L_DMIC_DLY - [5:0] */ +#define ARIZONA_IN6L_DMIC_DLY_SHIFT 0 /* IN6L_DMIC_DLY - [5:0] */ +#define ARIZONA_IN6L_DMIC_DLY_WIDTH 6 /* IN6L_DMIC_DLY - [5:0] */ +#define WM8285_IN6_OSR_MASK 0x0700 /* IN6_OSR - [8:10] */ +#define WM8285_IN6_OSR_SHIFT 8 /* IN6_OSR - [8:10] */ +#define WM8285_IN6_OSR_WIDTH 3 /* IN6_OSR - [8:10] */ + +/* + * R828 (0x33C) - IN6R Control + */ +#define ARIZONA_IN6R_HPF_MASK 0x8000 /* IN6R_HPF - [15] */ +#define ARIZONA_IN6R_HPF_SHIFT 15 /* IN6R_HPF - [15] */ +#define ARIZONA_IN6R_HPF_WIDTH 1 /* IN6R_HPF - [15] */ + +/* + * R829 (0x33D) - ADC Digital Volume 6R + */ +#define ARIZONA_IN_VU 0x0200 /* IN_VU */ +#define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */ +#define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */ +#define ARIZONA_IN_VU_WIDTH 1 /* IN_VU */ +#define ARIZONA_IN6R_MUTE 0x0100 /* IN6R_MUTE */ +#define ARIZONA_IN6R_MUTE_MASK 0x0100 /* IN6R_MUTE */ +#define ARIZONA_IN6R_MUTE_SHIFT 8 /* IN6R_MUTE */ +#define ARIZONA_IN6R_MUTE_WIDTH 1 /* IN6R_MUTE */ +#define ARIZONA_IN6R_DIG_VOL_MASK 0x00FF /* IN6R_DIG_VOL - [7:0] */ +#define ARIZONA_IN6R_DIG_VOL_SHIFT 0 /* IN6R_DIG_VOL - [7:0] */ +#define ARIZONA_IN6R_DIG_VOL_WIDTH 8 /* IN6R_DIG_VOL - [7:0] */ + +/* + * R830 (0x33E) - DMIC6R Control + */ +#define ARIZONA_IN6R_DMIC_DLY_MASK 0x003F /* IN6R_DMIC_DLY - [5:0] */ +#define ARIZONA_IN6R_DMIC_DLY_SHIFT 0 /* IN6R_DMIC_DLY - [5:0] */ +#define ARIZONA_IN6R_DMIC_DLY_WIDTH 6 /* IN6R_DMIC_DLY - [5:0] */ + /* * R915 (0x393) - ADC VCO Cal 4 */ @@ -4169,6 +5499,19 @@ #define ARIZONA_AIF2TX6_SLOT_SHIFT 0 /* AIF2TX6_SLOT - [5:0] */ #define ARIZONA_AIF2TX6_SLOT_WIDTH 6 /* AIF2TX6_SLOT - [5:0] */ +/* + * R1359 (0x54F) - AIF2 Frame Ctrl 9 + */ +#define ARIZONA_AIF2TX7_SLOT_MASK 0x003F /* AIF2TX7_SLOT - [5:0] */ +#define ARIZONA_AIF2TX7_SLOT_SHIFT 0 /* AIF2TX7_SLOT - [5:0] */ +#define ARIZONA_AIF2TX7_SLOT_WIDTH 6 /* AIF2TX7_SLOT - [5:0] */ +/* + * R1360 (0x550) - AIF2 Frame Ctrl 10 + */ +#define ARIZONA_AIF2TX8_SLOT_MASK 0x003F /* AIF2TX8_SLOT - [5:0] */ +#define ARIZONA_AIF2TX8_SLOT_SHIFT 0 /* AIF2TX8_SLOT - [5:0] */ +#define ARIZONA_AIF2TX8_SLOT_WIDTH 6 /* AIF2TX8_SLOT - [5:0] */ + /* * R1361 (0x551) - AIF2 Frame Ctrl 11 */ @@ -4211,9 +5554,31 @@ #define ARIZONA_AIF2RX6_SLOT_SHIFT 0 /* AIF2RX6_SLOT - [5:0] */ #define ARIZONA_AIF2RX6_SLOT_WIDTH 6 /* AIF2RX6_SLOT - [5:0] */ +/* + * R1367 (0x557) - AIF2 Frame Ctrl 17 + */ +#define ARIZONA_AIF2RX7_SLOT_MASK 0x003F /* AIF2RX7_SLOT - [5:0] */ +#define ARIZONA_AIF2RX7_SLOT_SHIFT 0 /* AIF2RX7_SLOT - [5:0] */ +#define ARIZONA_AIF2RX7_SLOT_WIDTH 6 /* AIF2RX7_SLOT - [5:0] */ + +/* + * R1368 (0x558) - AIF2 Frame Ctrl 18 + */ +#define ARIZONA_AIF2RX8_SLOT_MASK 0x003F /* AIF2RX8_SLOT - [5:0] */ +#define ARIZONA_AIF2RX8_SLOT_SHIFT 0 /* AIF2RX8_SLOT - [5:0] */ +#define ARIZONA_AIF2RX8_SLOT_WIDTH 6 /* AIF2RX8_SLOT - [5:0] */ + /* * R1369 (0x559) - AIF2 Tx Enables */ +#define ARIZONA_AIF2TX8_ENA 0x0080 /* AIF2TX8_ENA */ +#define ARIZONA_AIF2TX8_ENA_MASK 0x0080 /* AIF2TX8_ENA */ +#define ARIZONA_AIF2TX8_ENA_SHIFT 7 /* AIF2TX8_ENA */ +#define ARIZONA_AIF2TX8_ENA_WIDTH 1 /* AIF2TX8_ENA */ +#define ARIZONA_AIF2TX7_ENA 0x0040 /* AIF2TX7_ENA */ +#define ARIZONA_AIF2TX7_ENA_MASK 0x0040 /* AIF2TX7_ENA */ +#define ARIZONA_AIF2TX7_ENA_SHIFT 6 /* AIF2TX7_ENA */ +#define ARIZONA_AIF2TX7_ENA_WIDTH 1 /* AIF2TX7_ENA */ #define ARIZONA_AIF2TX6_ENA 0x0020 /* AIF2TX6_ENA */ #define ARIZONA_AIF2TX6_ENA_MASK 0x0020 /* AIF2TX6_ENA */ #define ARIZONA_AIF2TX6_ENA_SHIFT 5 /* AIF2TX6_ENA */ @@ -4242,6 +5607,14 @@ /* * R1370 (0x55A) - AIF2 Rx Enables */ +#define ARIZONA_AIF2RX8_ENA 0x0080 /* AIF2RX8_ENA */ +#define ARIZONA_AIF2RX8_ENA_MASK 0x0080 /* AIF2RX8_ENA */ +#define ARIZONA_AIF2RX8_ENA_SHIFT 7 /* AIF2RX8_ENA */ +#define ARIZONA_AIF2RX8_ENA_WIDTH 1 /* AIF2RX8_ENA */ +#define ARIZONA_AIF2RX7_ENA 0x0040 /* AIF2RX7_ENA */ +#define ARIZONA_AIF2RX7_ENA_MASK 0x0040 /* AIF2RX7_ENA */ +#define ARIZONA_AIF2RX7_ENA_SHIFT 6 /* AIF2RX7_ENA */ +#define ARIZONA_AIF2RX7_ENA_WIDTH 1 /* AIF2RX7_ENA */ #define ARIZONA_AIF2RX6_ENA 0x0020 /* AIF2RX6_ENA */ #define ARIZONA_AIF2RX6_ENA_MASK 0x0020 /* AIF2RX6_ENA */ #define ARIZONA_AIF2RX6_ENA_SHIFT 5 /* AIF2RX6_ENA */ @@ -4446,6 +5819,177 @@ #define ARIZONA_AIF3_FRC_WR_SHIFT 0 /* AIF3_FRC_WR */ #define ARIZONA_AIF3_FRC_WR_WIDTH 1 /* AIF3_FRC_WR */ +/* + * R1440 (0x5A0) - AIF4 BCLK Ctrl + */ +#define ARIZONA_AIF4_BCLK_INV 0x0080 /* AIF4_BCLK_INV */ +#define ARIZONA_AIF4_BCLK_INV_MASK 0x0080 /* AIF4_BCLK_INV */ +#define ARIZONA_AIF4_BCLK_INV_SHIFT 7 /* AIF4_BCLK_INV */ +#define ARIZONA_AIF4_BCLK_INV_WIDTH 1 /* AIF4_BCLK_INV */ +#define ARIZONA_AIF4_BCLK_FRC 0x0040 /* AIF4_BCLK_FRC */ +#define ARIZONA_AIF4_BCLK_FRC_MASK 0x0040 /* AIF4_BCLK_FRC */ +#define ARIZONA_AIF4_BCLK_FRC_SHIFT 6 /* AIF4_BCLK_FRC */ +#define ARIZONA_AIF4_BCLK_FRC_WIDTH 1 /* AIF4_BCLK_FRC */ +#define ARIZONA_AIF4_BCLK_MSTR 0x0020 /* AIF4_BCLK_MSTR */ +#define ARIZONA_AIF4_BCLK_MSTR_MASK 0x0020 /* AIF4_BCLK_MSTR */ +#define ARIZONA_AIF4_BCLK_MSTR_SHIFT 5 /* AIF4_BCLK_MSTR */ +#define ARIZONA_AIF4_BCLK_MSTR_WIDTH 1 /* AIF4_BCLK_MSTR */ +#define ARIZONA_AIF4_BCLK_FREQ_MASK 0x001F /* AIF4_BCLK_FREQ - [4:0] */ +#define ARIZONA_AIF4_BCLK_FREQ_SHIFT 0 /* AIF4_BCLK_FREQ - [4:0] */ +#define ARIZONA_AIF4_BCLK_FREQ_WIDTH 5 /* AIF4_BCLK_FREQ - [4:0] */ + +/* + * R1441 (0x5A1) - AIF4 Tx Pin Ctrl + */ +#define ARIZONA_AIF4TX_DAT_TRI 0x0020 /* AIF4TX_DAT_TRI */ +#define ARIZONA_AIF4TX_DAT_TRI_MASK 0x0020 /* AIF4TX_DAT_TRI */ +#define ARIZONA_AIF4TX_DAT_TRI_SHIFT 5 /* AIF4TX_DAT_TRI */ +#define ARIZONA_AIF4TX_DAT_TRI_WIDTH 1 /* AIF4TX_DAT_TRI */ +#define ARIZONA_AIF4TX_LRCLK_SRC 0x0008 /* AIF4TX_LRCLK_SRC */ +#define ARIZONA_AIF4TX_LRCLK_SRC_MASK 0x0008 /* AIF4TX_LRCLK_SRC */ +#define ARIZONA_AIF4TX_LRCLK_SRC_SHIFT 3 /* AIF4TX_LRCLK_SRC */ +#define ARIZONA_AIF4TX_LRCLK_SRC_WIDTH 1 /* AIF4TX_LRCLK_SRC */ +#define ARIZONA_AIF4TX_LRCLK_INV 0x0004 /* AIF4TX_LRCLK_INV */ +#define ARIZONA_AIF4TX_LRCLK_INV_MASK 0x0004 /* AIF4TX_LRCLK_INV */ +#define ARIZONA_AIF4TX_LRCLK_INV_SHIFT 2 /* AIF4TX_LRCLK_INV */ +#define ARIZONA_AIF4TX_LRCLK_INV_WIDTH 1 /* AIF4TX_LRCLK_INV */ +#define ARIZONA_AIF4TX_LRCLK_FRC 0x0002 /* AIF4TX_LRCLK_FRC */ +#define ARIZONA_AIF4TX_LRCLK_FRC_MASK 0x0002 /* AIF4TX_LRCLK_FRC */ +#define ARIZONA_AIF4TX_LRCLK_FRC_SHIFT 1 /* AIF4TX_LRCLK_FRC */ +#define ARIZONA_AIF4TX_LRCLK_FRC_WIDTH 1 /* AIF4TX_LRCLK_FRC */ +#define ARIZONA_AIF4TX_LRCLK_MSTR 0x0001 /* AIF4TX_LRCLK_MSTR */ +#define ARIZONA_AIF4TX_LRCLK_MSTR_MASK 0x0001 /* AIF4TX_LRCLK_MSTR */ +#define ARIZONA_AIF4TX_LRCLK_MSTR_SHIFT 0 /* AIF4TX_LRCLK_MSTR */ +#define ARIZONA_AIF4TX_LRCLK_MSTR_WIDTH 1 /* AIF4TX_LRCLK_MSTR */ + +/* + * R1442 (0x5A2) - AIF4 Rx Pin Ctrl + */ +#define ARIZONA_AIF4RX_LRCLK_INV 0x0004 /* AIF4RX_LRCLK_INV */ +#define ARIZONA_AIF4RX_LRCLK_INV_MASK 0x0004 /* AIF4RX_LRCLK_INV */ +#define ARIZONA_AIF4RX_LRCLK_INV_SHIFT 2 /* AIF4RX_LRCLK_INV */ +#define ARIZONA_AIF4RX_LRCLK_INV_WIDTH 1 /* AIF4RX_LRCLK_INV */ +#define ARIZONA_AIF4RX_LRCLK_FRC 0x0002 /* AIF4RX_LRCLK_FRC */ +#define ARIZONA_AIF4RX_LRCLK_FRC_MASK 0x0002 /* AIF4RX_LRCLK_FRC */ +#define ARIZONA_AIF4RX_LRCLK_FRC_SHIFT 1 /* AIF4RX_LRCLK_FRC */ +#define ARIZONA_AIF4RX_LRCLK_FRC_WIDTH 1 /* AIF4RX_LRCLK_FRC */ +#define ARIZONA_AIF4RX_LRCLK_MSTR 0x0001 /* AIF4RX_LRCLK_MSTR */ +#define ARIZONA_AIF4RX_LRCLK_MSTR_MASK 0x0001 /* AIF4RX_LRCLK_MSTR */ +#define ARIZONA_AIF4RX_LRCLK_MSTR_SHIFT 0 /* AIF4RX_LRCLK_MSTR */ +#define ARIZONA_AIF4RX_LRCLK_MSTR_WIDTH 1 /* AIF4RX_LRCLK_MSTR */ + +/* + * R1443 (0x5A3) - AIF4 Rate Ctrl + */ +#define ARIZONA_AIF4_RATE_MASK 0x7800 /* AIF4_RATE - [14:11] */ +#define ARIZONA_AIF4_RATE_SHIFT 11 /* AIF4_RATE - [14:11] */ +#define ARIZONA_AIF4_RATE_WIDTH 4 /* AIF4_RATE - [14:11] */ +#define ARIZONA_AIF4_TRI 0x0040 /* AIF4_TRI */ +#define ARIZONA_AIF4_TRI_MASK 0x0040 /* AIF4_TRI */ +#define ARIZONA_AIF4_TRI_SHIFT 6 /* AIF4_TRI */ +#define ARIZONA_AIF4_TRI_WIDTH 1 /* AIF4_TRI */ + +/* + * R1444 (0x5A4) - AIF4 Format + */ +#define ARIZONA_AIF4_FMT_MASK 0x0007 /* AIF4_FMT - [2:0] */ +#define ARIZONA_AIF4_FMT_SHIFT 0 /* AIF4_FMT - [2:0] */ +#define ARIZONA_AIF4_FMT_WIDTH 3 /* AIF4_FMT - [2:0] */ + +/* + * R1445 (0x5A5) - AIF4 Tx BCLK Rate + */ +#define ARIZONA_AIF4TX_BCPF_MASK 0x1FFF /* AIF4TX_BCPF - [12:0] */ +#define ARIZONA_AIF4TX_BCPF_SHIFT 0 /* AIF4TX_BCPF - [12:0] */ +#define ARIZONA_AIF4TX_BCPF_WIDTH 13 /* AIF4TX_BCPF - [12:0] */ + +/* + * R1446 (0x5A6) - AIF4 Rx BCLK Rate + */ +#define ARIZONA_AIF4RX_BCPF_MASK 0x1FFF /* AIF4RX_BCPF - [12:0] */ +#define ARIZONA_AIF4RX_BCPF_SHIFT 0 /* AIF4RX_BCPF - [12:0] */ +#define ARIZONA_AIF4RX_BCPF_WIDTH 13 /* AIF4RX_BCPF - [12:0] */ + +/* + * R1447 (0x5A7) - AIF4 Frame Ctrl 1 + */ +#define ARIZONA_AIF4TX_WL_MASK 0x3F00 /* AIF4TX_WL - [13:8] */ +#define ARIZONA_AIF4TX_WL_SHIFT 8 /* AIF4TX_WL - [13:8] */ +#define ARIZONA_AIF4TX_WL_WIDTH 6 /* AIF4TX_WL - [13:8] */ +#define ARIZONA_AIF4TX_SLOT_LEN_MASK 0x00FF /* AIF4TX_SLOT_LEN - [7:0] */ +#define ARIZONA_AIF4TX_SLOT_LEN_SHIFT 0 /* AIF4TX_SLOT_LEN - [7:0] */ +#define ARIZONA_AIF4TX_SLOT_LEN_WIDTH 8 /* AIF4TX_SLOT_LEN - [7:0] */ + +/* + * R1448 (0x5A8) - AIF4 Frame Ctrl 2 + */ +#define ARIZONA_AIF4RX_WL_MASK 0x3F00 /* AIF4RX_WL - [13:8] */ +#define ARIZONA_AIF4RX_WL_SHIFT 8 /* AIF4RX_WL - [13:8] */ +#define ARIZONA_AIF4RX_WL_WIDTH 6 /* AIF4RX_WL - [13:8] */ +#define ARIZONA_AIF4RX_SLOT_LEN_MASK 0x00FF /* AIF4RX_SLOT_LEN - [7:0] */ +#define ARIZONA_AIF4RX_SLOT_LEN_SHIFT 0 /* AIF4RX_SLOT_LEN - [7:0] */ +#define ARIZONA_AIF4RX_SLOT_LEN_WIDTH 8 /* AIF4RX_SLOT_LEN - [7:0] */ + +/* + * R1449 (0x5A9) - AIF4 Frame Ctrl 3 + */ +#define ARIZONA_AIF4TX1_SLOT_MASK 0x003F /* AIF4TX1_SLOT - [5:0] */ +#define ARIZONA_AIF4TX1_SLOT_SHIFT 0 /* AIF4TX1_SLOT - [5:0] */ +#define ARIZONA_AIF4TX1_SLOT_WIDTH 6 /* AIF4TX1_SLOT - [5:0] */ + +/* + * R1450 (0x5AA) - AIF4 Frame Ctrl 4 + */ +#define ARIZONA_AIF4TX2_SLOT_MASK 0x003F /* AIF4TX2_SLOT - [5:0] */ +#define ARIZONA_AIF4TX2_SLOT_SHIFT 0 /* AIF4TX2_SLOT - [5:0] */ +#define ARIZONA_AIF4TX2_SLOT_WIDTH 6 /* AIF4TX2_SLOT - [5:0] */ + +/* + * R1457 (0x5B1) - AIF4 Frame Ctrl 11 + */ +#define ARIZONA_AIF4RX1_SLOT_MASK 0x003F /* AIF4RX1_SLOT - [5:0] */ +#define ARIZONA_AIF4RX1_SLOT_SHIFT 0 /* AIF4RX1_SLOT - [5:0] */ +#define ARIZONA_AIF4RX1_SLOT_WIDTH 6 /* AIF4RX1_SLOT - [5:0] */ + +/* + * R1458 (0x5B2) - AIF4 Frame Ctrl 12 + */ +#define ARIZONA_AIF4RX2_SLOT_MASK 0x003F /* AIF4RX2_SLOT - [5:0] */ +#define ARIZONA_AIF4RX2_SLOT_SHIFT 0 /* AIF4RX2_SLOT - [5:0] */ +#define ARIZONA_AIF4RX2_SLOT_WIDTH 6 /* AIF4RX2_SLOT - [5:0] */ + +/* + * R1465 (0x5B9) - AIF4 Tx Enables + */ +#define ARIZONA_AIF4TX2_ENA 0x0002 /* AIF4TX2_ENA */ +#define ARIZONA_AIF4TX2_ENA_MASK 0x0002 /* AIF4TX2_ENA */ +#define ARIZONA_AIF4TX2_ENA_SHIFT 1 /* AIF4TX2_ENA */ +#define ARIZONA_AIF4TX2_ENA_WIDTH 1 /* AIF4TX2_ENA */ +#define ARIZONA_AIF4TX1_ENA 0x0001 /* AIF4TX1_ENA */ +#define ARIZONA_AIF4TX1_ENA_MASK 0x0001 /* AIF4TX1_ENA */ +#define ARIZONA_AIF4TX1_ENA_SHIFT 0 /* AIF4TX1_ENA */ +#define ARIZONA_AIF4TX1_ENA_WIDTH 1 /* AIF4TX1_ENA */ + +/* + * R1466 (0x5BA) - AIF4 Rx Enables + */ +#define ARIZONA_AIF4RX2_ENA 0x0002 /* AIF4RX2_ENA */ +#define ARIZONA_AIF4RX2_ENA_MASK 0x0002 /* AIF4RX2_ENA */ +#define ARIZONA_AIF4RX2_ENA_SHIFT 1 /* AIF4RX2_ENA */ +#define ARIZONA_AIF4RX2_ENA_WIDTH 1 /* AIF4RX2_ENA */ +#define ARIZONA_AIF4RX1_ENA 0x0001 /* AIF4RX1_ENA */ +#define ARIZONA_AIF4RX1_ENA_MASK 0x0001 /* AIF4RX1_ENA */ +#define ARIZONA_AIF4RX1_ENA_SHIFT 0 /* AIF4RX1_ENA */ +#define ARIZONA_AIF4RX1_ENA_WIDTH 1 /* AIF4RX1_ENA */ + +/* + * R1467 (0x5BB) - AIF4 Force Write + */ +#define ARIZONA_AIF4_FRC_WR 0x0001 /* AIF4_FRC_WR */ +#define ARIZONA_AIF4_FRC_WR_MASK 0x0001 /* AIF4_FRC_WR */ +#define ARIZONA_AIF4_FRC_WR_SHIFT 0 /* AIF4_FRC_WR */ +#define ARIZONA_AIF4_FRC_WR_WIDTH 1 /* AIF4_FRC_WR */ + /* * R1474 (0x5C2) - SPD1 TX Control */ @@ -8015,6 +9559,63 @@ #define ARIZONA_ISRC3_NOTCH_ENA_SHIFT 0 /* ISRC3_NOTCH_ENA */ #define ARIZONA_ISRC3_NOTCH_ENA_WIDTH 1 /* ISRC3_NOTCH_ENA */ +/* + * R3833 (0xEF9) - ISRC 4 CTRL 1 + */ +#define ARIZONA_ISRC4_FSH_MASK 0x7800 /* ISRC4_FSH - [14:11] */ +#define ARIZONA_ISRC4_FSH_SHIFT 11 /* ISRC4_FSH - [14:11] */ +#define ARIZONA_ISRC4_FSH_WIDTH 4 /* ISRC4_FSH - [14:11] */ +#define ARIZONA_ISRC4_CLK_SEL_MASK 0x0700 /* ISRC4_CLK_SEL - [10:8] */ +#define ARIZONA_ISRC4_CLK_SEL_SHIFT 8 /* ISRC4_CLK_SEL - [10:8] */ +#define ARIZONA_ISRC4_CLK_SEL_WIDTH 3 /* ISRC4_CLK_SEL - [10:8] */ + +/* + * R3834 (0xEFA) - ISRC 4 CTRL 2 + */ +#define ARIZONA_ISRC4_FSL_MASK 0x7800 /* ISRC4_FSL - [14:11] */ +#define ARIZONA_ISRC4_FSL_SHIFT 11 /* ISRC4_FSL - [14:11] */ +#define ARIZONA_ISRC4_FSL_WIDTH 4 /* ISRC4_FSL - [14:11] */ + +/* + * R3835 (0xEFB) - ISRC 4 CTRL 3 + */ +#define ARIZONA_ISRC4_INT0_ENA 0x8000 /* ISRC4_INT0_ENA */ +#define ARIZONA_ISRC4_INT0_ENA_MASK 0x8000 /* ISRC4_INT0_ENA */ +#define ARIZONA_ISRC4_INT0_ENA_SHIFT 15 /* ISRC4_INT0_ENA */ +#define ARIZONA_ISRC4_INT0_ENA_WIDTH 1 /* ISRC4_INT0_ENA */ +#define ARIZONA_ISRC4_INT1_ENA 0x4000 /* ISRC4_INT1_ENA */ +#define ARIZONA_ISRC4_INT1_ENA_MASK 0x4000 /* ISRC4_INT1_ENA */ +#define ARIZONA_ISRC4_INT1_ENA_SHIFT 14 /* ISRC4_INT1_ENA */ +#define ARIZONA_ISRC4_INT1_ENA_WIDTH 1 /* ISRC4_INT1_ENA */ +#define ARIZONA_ISRC4_INT2_ENA 0x2000 /* ISRC4_INT2_ENA */ +#define ARIZONA_ISRC4_INT2_ENA_MASK 0x2000 /* ISRC4_INT2_ENA */ +#define ARIZONA_ISRC4_INT2_ENA_SHIFT 13 /* ISRC4_INT2_ENA */ +#define ARIZONA_ISRC4_INT2_ENA_WIDTH 1 /* ISRC4_INT2_ENA */ +#define ARIZONA_ISRC4_INT3_ENA 0x1000 /* ISRC4_INT3_ENA */ +#define ARIZONA_ISRC4_INT3_ENA_MASK 0x1000 /* ISRC4_INT3_ENA */ +#define ARIZONA_ISRC4_INT3_ENA_SHIFT 12 /* ISRC4_INT3_ENA */ +#define ARIZONA_ISRC4_INT3_ENA_WIDTH 1 /* ISRC4_INT3_ENA */ +#define ARIZONA_ISRC4_DEC0_ENA 0x0200 /* ISRC4_DEC0_ENA */ +#define ARIZONA_ISRC4_DEC0_ENA_MASK 0x0200 /* ISRC4_DEC0_ENA */ +#define ARIZONA_ISRC4_DEC0_ENA_SHIFT 9 /* ISRC4_DEC0_ENA */ +#define ARIZONA_ISRC4_DEC0_ENA_WIDTH 1 /* ISRC4_DEC0_ENA */ +#define ARIZONA_ISRC4_DEC1_ENA 0x0100 /* ISRC4_DEC1_ENA */ +#define ARIZONA_ISRC4_DEC1_ENA_MASK 0x0100 /* ISRC4_DEC1_ENA */ +#define ARIZONA_ISRC4_DEC1_ENA_SHIFT 8 /* ISRC4_DEC1_ENA */ +#define ARIZONA_ISRC4_DEC1_ENA_WIDTH 1 /* ISRC4_DEC1_ENA */ +#define ARIZONA_ISRC4_DEC2_ENA 0x0080 /* ISRC4_DEC2_ENA */ +#define ARIZONA_ISRC4_DEC2_ENA_MASK 0x0080 /* ISRC4_DEC2_ENA */ +#define ARIZONA_ISRC4_DEC2_ENA_SHIFT 7 /* ISRC4_DEC2_ENA */ +#define ARIZONA_ISRC4_DEC2_ENA_WIDTH 1 /* ISRC4_DEC2_ENA */ +#define ARIZONA_ISRC4_DEC3_ENA 0x0040 /* ISRC4_DEC3_ENA */ +#define ARIZONA_ISRC4_DEC3_ENA_MASK 0x0040 /* ISRC4_DEC3_ENA */ +#define ARIZONA_ISRC4_DEC3_ENA_SHIFT 6 /* ISRC4_DEC3_ENA */ +#define ARIZONA_ISRC4_DEC3_ENA_WIDTH 1 /* ISRC4_DEC3_ENA */ +#define ARIZONA_ISRC4_NOTCH_ENA 0x0001 /* ISRC4_NOTCH_ENA */ +#define ARIZONA_ISRC4_NOTCH_ENA_MASK 0x0001 /* ISRC4_NOTCH_ENA */ +#define ARIZONA_ISRC4_NOTCH_ENA_SHIFT 0 /* ISRC4_NOTCH_ENA */ +#define ARIZONA_ISRC4_NOTCH_ENA_WIDTH 1 /* ISRC4_NOTCH_ENA */ + /* * R3840 (0xF00) - Clock Control */ @@ -8112,4 +9713,1841 @@ #define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_SHIFT 0 /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */ #define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_WIDTH 8 /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */ +/* + * R6144 (0x1800) - IRQ1 Status 1 + */ +#define WM8285_DSP_SHARED_WR_COLL_EINT1 0x8000 /* DSP_SHARED_WR_COLL_EINT1 */ +#define WM8285_DSP_SHARED_WR_COLL_EINT1_MASK 0x8000 /* DSP_SHARED_WR_COLL_EINT1 */ +#define WM8285_DSP_SHARED_WR_COLL_EINT1_SHIFT 15 /* DSP_SHARED_WR_COLL_EINT1 */ +#define WM8285_DSP_SHARED_WR_COLL_EINT1_WIDTH 1 /* DSP_SHARED_WR_COLL_EINT1 */ +#define WM8285_CTRLIF_ERR_EINT1 0x1000 /* CTRLIF_ERR_EINT1 */ +#define WM8285_CTRLIF_ERR_EINT1_MASK 0x1000 /* CTRLIF_ERR_EINT1 */ +#define WM8285_CTRLIF_ERR_EINT1_SHIFT 12 /* CTRLIF_ERR_EINT1 */ +#define WM8285_CTRLIF_ERR_EINT1_WIDTH 1 /* CTRLIF_ERR_EINT1 */ +#define WM8285_IRQ_NO_CLOCK_EINT1 0x0200 /* IRQ_NO_CLOCK_EINT1 */ +#define WM8285_IRQ_NO_CLOCK_EINT1_MASK 0x0200 /* IRQ_NO_CLOCK_EINT1 */ +#define WM8285_IRQ_NO_CLOCK_EINT1_SHIFT 9 /* IRQ_NO_CLOCK_EINT1 */ +#define WM8285_IRQ_NO_CLOCK_EINT1_WIDTH 1 /* IRQ_NO_CLOCK_EINT1 */ +#define WM8285_CLOCK_DETECT_EINT1 0x0100 /* CLOCK_DETECT_EINT1 */ +#define WM8285_CLOCK_DETECT_EINT1_MASK 0x0100 /* CLOCK_DETECT_EINT1 */ +#define WM8285_CLOCK_DETECT_EINT1_SHIFT 8 /* CLOCK_DETECT_EINT1 */ +#define WM8285_CLOCK_DETECT_EINT1_WIDTH 1 /* CLOCK_DETECT_EINT1 */ +#define WM8285_BOOT_DONE_EINT1 0x0080 /* BOOT_DONE_EINT1 */ +#define WM8285_BOOT_DONE_EINT1_MASK 0x0080 /* BOOT_DONE_EINT1 */ +#define WM8285_BOOT_DONE_EINT1_SHIFT 7 /* BOOT_DONE_EINT1 */ +#define WM8285_BOOT_DONE_EINT1_WIDTH 1 /* BOOT_DONE_EINT1 */ + +/* + * R6145 (0x1801) - IRQ1 Status 2 + */ +#define WM8285_FLL3_LOCK_EINT1 0x0400 /* FLL3_LOCK_EINT1 */ +#define WM8285_FLL3_LOCK_EINT1_MASK 0x0400 /* FLL3_LOCK_EINT1 */ +#define WM8285_FLL3_LOCK_EINT1_SHIFT 10 /* FLL3_LOCK_EINT1 */ +#define WM8285_FLL3_LOCK_EINT1_WIDTH 1 /* FLL3_LOCK_EINT1 */ +#define WM8285_FLL2_LOCK_EINT1 0x0200 /* FLL2_LOCK_EINT1 */ +#define WM8285_FLL2_LOCK_EINT1_MASK 0x0200 /* FLL2_LOCK_EINT1 */ +#define WM8285_FLL2_LOCK_EINT1_SHIFT 9 /* FLL2_LOCK_EINT1 */ +#define WM8285_FLL2_LOCK_EINT1_WIDTH 1 /* FLL2_LOCK_EINT1 */ +#define WM8285_FLL1_LOCK_EINT1 0x0100 /* FLL1_LOCK_EINT1 */ +#define WM8285_FLL1_LOCK_EINT1_MASK 0x0100 /* FLL1_LOCK_EINT1 */ +#define WM8285_FLL1_LOCK_EINT1_SHIFT 8 /* FLL1_LOCK_EINT1 */ +#define WM8285_FLL1_LOCK_EINT1_WIDTH 1 /* FLL1_LOCK_EINT1 */ + +/* + * R6149 (0x1805) - IRQ1 Status 6 + */ +#define WM8285_MICDET_EINT1 0x0100 /* MICDET_EINT1 */ +#define WM8285_MICDET_EINT1_MASK 0x0100 /* MICDET_EINT1 */ +#define WM8285_MICDET_EINT1_SHIFT 8 /* MICDET_EINT1 */ +#define WM8285_MICDET_EINT1_WIDTH 1 /* MICDET_EINT1 */ +#define WM8285_HPDET_EINT1 0x0001 /* HPDET_EINT1 */ +#define WM8285_HPDET_EINT1_MASK 0x0001 /* HPDET_EINT1 */ +#define WM8285_HPDET_EINT1_SHIFT 0 /* HPDET_EINT1 */ +#define WM8285_HPDET_EINT1_WIDTH 1 /* HPDET_EINT1 */ + +/* + * R6150 (0x1806) - IRQ1 Status 7 + */ +#define WM8285_MICD_CLAMP_FALL_EINT1 0x0020 /* MICD_CLAMP_FALL_EINT1 */ +#define WM8285_MICD_CLAMP_FALL_EINT1_MASK 0x0020 /* MICD_CLAMP_FALL_EINT1 */ +#define WM8285_MICD_CLAMP_FALL_EINT1_SHIFT 5 /* MICD_CLAMP_FALL_EINT1 */ +#define WM8285_MICD_CLAMP_FALL_EINT1_WIDTH 1 /* MICD_CLAMP_FALL_EINT1 */ +#define WM8285_MICD_CLAMP_RISE_EINT1 0x0010 /* MICD_CLAMP_RISE_EINT1 */ +#define WM8285_MICD_CLAMP_RISE_EINT1_MASK 0x0010 /* MICD_CLAMP_RISE_EINT1 */ +#define WM8285_MICD_CLAMP_RISE_EINT1_SHIFT 4 /* MICD_CLAMP_RISE_EINT1 */ +#define WM8285_MICD_CLAMP_RISE_EINT1_WIDTH 1 /* MICD_CLAMP_RISE_EINT1 */ +#define WM8285_JD2_FALL_EINT1 0x0008 /* JD2_FALL_EINT1 */ +#define WM8285_JD2_FALL_EINT1_MASK 0x0008 /* JD2_FALL_EINT1 */ +#define WM8285_JD2_FALL_EINT1_SHIFT 3 /* JD2_FALL_EINT1 */ +#define WM8285_JD2_FALL_EINT1_WIDTH 1 /* JD2_FALL_EINT1 */ +#define WM8285_JD2_RISE_EINT1 0x0004 /* JD2_RISE_EINT1 */ +#define WM8285_JD2_RISE_EINT1_MASK 0x0004 /* JD2_RISE_EINT1 */ +#define WM8285_JD2_RISE_EINT1_SHIFT 2 /* JD2_RISE_EINT1 */ +#define WM8285_JD2_RISE_EINT1_WIDTH 1 /* JD2_RISE_EINT1 */ +#define WM8285_JD1_FALL_EINT1 0x0002 /* JD1_FALL_EINT1 */ +#define WM8285_JD1_FALL_EINT1_MASK 0x0002 /* JD1_FALL_EINT1 */ +#define WM8285_JD1_FALL_EINT1_SHIFT 1 /* JD1_FALL_EINT1 */ +#define WM8285_JD1_FALL_EINT1_WIDTH 1 /* JD1_FALL_EINT1 */ +#define WM8285_JD1_RISE_EINT1 0x0001 /* JD1_RISE_EINT1 */ +#define WM8285_JD1_RISE_EINT1_MASK 0x0001 /* JD1_RISE_EINT1 */ +#define WM8285_JD1_RISE_EINT1_SHIFT 0 /* JD1_RISE_EINT1 */ +#define WM8285_JD1_RISE_EINT1_WIDTH 1 /* JD1_RISE_EINT1 */ + +/* + * R6152 (0x1808) - IRQ1 Status 9 + */ +#define WM8285_ASRC2_IN2_LOCK_EINT1 0x0800 /* ASRC2_IN2_LOCK_EINT1 */ +#define WM8285_ASRC2_IN2_LOCK_EINT1_MASK 0x0800 /* ASRC2_IN2_LOCK_EINT1 */ +#define WM8285_ASRC2_IN2_LOCK_EINT1_SHIFT 11 /* ASRC2_IN2_LOCK_EINT1 */ +#define WM8285_ASRC2_IN2_LOCK_EINT1_WIDTH 1 /* ASRC2_IN2_LOCK_EINT1 */ +#define WM8285_ASRC2_IN1_LOCK_EINT1 0x0400 /* ASRC2_IN1_LOCK_EINT1 */ +#define WM8285_ASRC2_IN1_LOCK_EINT1_MASK 0x0400 /* ASRC2_IN1_LOCK_EINT1 */ +#define WM8285_ASRC2_IN1_LOCK_EINT1_SHIFT 10 /* ASRC2_IN1_LOCK_EINT1 */ +#define WM8285_ASRC2_IN1_LOCK_EINT1_WIDTH 1 /* ASRC2_IN1_LOCK_EINT1 */ +#define WM8285_ASRC1_IN2_LOCK_EINT1 0x0200 /* ASRC1_IN2_LOCK_EINT1 */ +#define WM8285_ASRC1_IN2_LOCK_EINT1_MASK 0x0200 /* ASRC1_IN2_LOCK_EINT1 */ +#define WM8285_ASRC1_IN2_LOCK_EINT1_SHIFT 9 /* ASRC1_IN2_LOCK_EINT1 */ +#define WM8285_ASRC1_IN2_LOCK_EINT1_WIDTH 1 /* ASRC1_IN2_LOCK_EINT1 */ +#define WM8285_ASRC1_IN1_LOCK_EINT1 0x0100 /* ASRC1_IN1_LOCK_EINT1 */ +#define WM8285_ASRC1_IN1_LOCK_EINT1_MASK 0x0100 /* ASRC1_IN1_LOCK_EINT1 */ +#define WM8285_ASRC1_IN1_LOCK_EINT1_SHIFT 8 /* ASRC1_IN1_LOCK_EINT1 */ +#define WM8285_ASRC1_IN1_LOCK_EINT1_WIDTH 1 /* ASRC1_IN1_LOCK_EINT1 */ +#define WM8285_DRC2_SIG_DET_EINT1 0x0002 /* DRC2_SIG_DET_EINT1 */ +#define WM8285_DRC2_SIG_DET_EINT1_MASK 0x0002 /* DRC2_SIG_DET_EINT1 */ +#define WM8285_DRC2_SIG_DET_EINT1_SHIFT 1 /* DRC2_SIG_DET_EINT1 */ +#define WM8285_DRC2_SIG_DET_EINT1_WIDTH 1 /* DRC2_SIG_DET_EINT1 */ +#define WM8285_DRC1_SIG_DET_EINT1 0x0001 /* DRC1_SIG_DET_EINT1 */ +#define WM8285_DRC1_SIG_DET_EINT1_MASK 0x0001 /* DRC1_SIG_DET_EINT1 */ +#define WM8285_DRC1_SIG_DET_EINT1_SHIFT 0 /* DRC1_SIG_DET_EINT1 */ +#define WM8285_DRC1_SIG_DET_EINT1_WIDTH 1 /* DRC1_SIG_DET_EINT1 */ + +/* + * R6154 (0x180A) - IRQ1 Status 11 + */ +#define WM8285_DSP_IRQ16_EINT1 0x8000 /* DSP_IRQ16_EINT1 */ +#define WM8285_DSP_IRQ16_EINT1_MASK 0x8000 /* DSP_IRQ16_EINT1 */ +#define WM8285_DSP_IRQ16_EINT1_SHIFT 15 /* DSP_IRQ16_EINT1 */ +#define WM8285_DSP_IRQ16_EINT1_WIDTH 1 /* DSP_IRQ16_EINT1 */ +#define WM8285_DSP_IRQ15_EINT1 0x4000 /* DSP_IRQ15_EINT1 */ +#define WM8285_DSP_IRQ15_EINT1_MASK 0x4000 /* DSP_IRQ15_EINT1 */ +#define WM8285_DSP_IRQ15_EINT1_SHIFT 14 /* DSP_IRQ15_EINT1 */ +#define WM8285_DSP_IRQ15_EINT1_WIDTH 1 /* DSP_IRQ15_EINT1 */ +#define WM8285_DSP_IRQ14_EINT1 0x2000 /* DSP_IRQ14_EINT1 */ +#define WM8285_DSP_IRQ14_EINT1_MASK 0x2000 /* DSP_IRQ14_EINT1 */ +#define WM8285_DSP_IRQ14_EINT1_SHIFT 13 /* DSP_IRQ14_EINT1 */ +#define WM8285_DSP_IRQ14_EINT1_WIDTH 1 /* DSP_IRQ14_EINT1 */ +#define WM8285_DSP_IRQ13_EINT1 0x1000 /* DSP_IRQ13_EINT1 */ +#define WM8285_DSP_IRQ13_EINT1_MASK 0x1000 /* DSP_IRQ13_EINT1 */ +#define WM8285_DSP_IRQ13_EINT1_SHIFT 12 /* DSP_IRQ13_EINT1 */ +#define WM8285_DSP_IRQ13_EINT1_WIDTH 1 /* DSP_IRQ13_EINT1 */ +#define WM8285_DSP_IRQ12_EINT1 0x0800 /* DSP_IRQ12_EINT1 */ +#define WM8285_DSP_IRQ12_EINT1_MASK 0x0800 /* DSP_IRQ12_EINT1 */ +#define WM8285_DSP_IRQ12_EINT1_SHIFT 11 /* DSP_IRQ12_EINT1 */ +#define WM8285_DSP_IRQ12_EINT1_WIDTH 1 /* DSP_IRQ12_EINT1 */ +#define WM8285_DSP_IRQ11_EINT1 0x0400 /* DSP_IRQ11_EINT1 */ +#define WM8285_DSP_IRQ11_EINT1_MASK 0x0400 /* DSP_IRQ11_EINT1 */ +#define WM8285_DSP_IRQ11_EINT1_SHIFT 10 /* DSP_IRQ11_EINT1 */ +#define WM8285_DSP_IRQ11_EINT1_WIDTH 1 /* DSP_IRQ11_EINT1 */ +#define WM8285_DSP_IRQ10_EINT1 0x0200 /* DSP_IRQ10_EINT1 */ +#define WM8285_DSP_IRQ10_EINT1_MASK 0x0200 /* DSP_IRQ10_EINT1 */ +#define WM8285_DSP_IRQ10_EINT1_SHIFT 9 /* DSP_IRQ10_EINT1 */ +#define WM8285_DSP_IRQ10_EINT1_WIDTH 1 /* DSP_IRQ10_EINT1 */ +#define WM8285_DSP_IRQ9_EINT1 0x0100 /* DSP_IRQ9_EINT1 */ +#define WM8285_DSP_IRQ9_EINT1_MASK 0x0100 /* DSP_IRQ9_EINT1 */ +#define WM8285_DSP_IRQ9_EINT1_SHIFT 8 /* DSP_IRQ9_EINT1 */ +#define WM8285_DSP_IRQ9_EINT1_WIDTH 1 /* DSP_IRQ9_EINT1 */ +#define WM8285_DSP_IRQ8_EINT1 0x0080 /* DSP_IRQ8_EINT1 */ +#define WM8285_DSP_IRQ8_EINT1_MASK 0x0080 /* DSP_IRQ8_EINT1 */ +#define WM8285_DSP_IRQ8_EINT1_SHIFT 7 /* DSP_IRQ8_EINT1 */ +#define WM8285_DSP_IRQ8_EINT1_WIDTH 1 /* DSP_IRQ8_EINT1 */ +#define WM8285_DSP_IRQ7_EINT1 0x0040 /* DSP_IRQ7_EINT1 */ +#define WM8285_DSP_IRQ7_EINT1_MASK 0x0040 /* DSP_IRQ7_EINT1 */ +#define WM8285_DSP_IRQ7_EINT1_SHIFT 6 /* DSP_IRQ7_EINT1 */ +#define WM8285_DSP_IRQ7_EINT1_WIDTH 1 /* DSP_IRQ7_EINT1 */ +#define WM8285_DSP_IRQ6_EINT1 0x0020 /* DSP_IRQ6_EINT1 */ +#define WM8285_DSP_IRQ6_EINT1_MASK 0x0020 /* DSP_IRQ6_EINT1 */ +#define WM8285_DSP_IRQ6_EINT1_SHIFT 5 /* DSP_IRQ6_EINT1 */ +#define WM8285_DSP_IRQ6_EINT1_WIDTH 1 /* DSP_IRQ6_EINT1 */ +#define WM8285_DSP_IRQ5_EINT1 0x0010 /* DSP_IRQ5_EINT1 */ +#define WM8285_DSP_IRQ5_EINT1_MASK 0x0010 /* DSP_IRQ5_EINT1 */ +#define WM8285_DSP_IRQ5_EINT1_SHIFT 4 /* DSP_IRQ5_EINT1 */ +#define WM8285_DSP_IRQ5_EINT1_WIDTH 1 /* DSP_IRQ5_EINT1 */ +#define WM8285_DSP_IRQ4_EINT1 0x0008 /* DSP_IRQ4_EINT1 */ +#define WM8285_DSP_IRQ4_EINT1_MASK 0x0008 /* DSP_IRQ4_EINT1 */ +#define WM8285_DSP_IRQ4_EINT1_SHIFT 3 /* DSP_IRQ4_EINT1 */ +#define WM8285_DSP_IRQ4_EINT1_WIDTH 1 /* DSP_IRQ4_EINT1 */ +#define WM8285_DSP_IRQ3_EINT1 0x0004 /* DSP_IRQ3_EINT1 */ +#define WM8285_DSP_IRQ3_EINT1_MASK 0x0004 /* DSP_IRQ3_EINT1 */ +#define WM8285_DSP_IRQ3_EINT1_SHIFT 2 /* DSP_IRQ3_EINT1 */ +#define WM8285_DSP_IRQ3_EINT1_WIDTH 1 /* DSP_IRQ3_EINT1 */ +#define WM8285_DSP_IRQ2_EINT1 0x0002 /* DSP_IRQ2_EINT1 */ +#define WM8285_DSP_IRQ2_EINT1_MASK 0x0002 /* DSP_IRQ2_EINT1 */ +#define WM8285_DSP_IRQ2_EINT1_SHIFT 1 /* DSP_IRQ2_EINT1 */ +#define WM8285_DSP_IRQ2_EINT1_WIDTH 1 /* DSP_IRQ2_EINT1 */ +#define WM8285_DSP_IRQ1_EINT1 0x0001 /* DSP_IRQ1_EINT1 */ +#define WM8285_DSP_IRQ1_EINT1_MASK 0x0001 /* DSP_IRQ1_EINT1 */ +#define WM8285_DSP_IRQ1_EINT1_SHIFT 0 /* DSP_IRQ1_EINT1 */ +#define WM8285_DSP_IRQ1_EINT1_WIDTH 1 /* DSP_IRQ1_EINT1 */ + +/* + * R6155 (0x180B) - IRQ1 Status 12 + */ +#define WM8285_SPKOUTR_SC_EINT1 0x0080 /* SPKOUTR_SC_EINT1 */ +#define WM8285_SPKOUTR_SC_EINT1_MASK 0x0080 /* SPKOUTR_SC_EINT1 */ +#define WM8285_SPKOUTR_SC_EINT1_SHIFT 7 /* SPKOUTR_SC_EINT1 */ +#define WM8285_SPKOUTR_SC_EINT1_WIDTH 1 /* SPKOUTR_SC_EINT1 */ +#define WM8285_SPKOUTL_SC_EINT1 0x0040 /* SPKOUTL_SC_EINT1 */ +#define WM8285_SPKOUTL_SC_EINT1_MASK 0x0040 /* SPKOUTL_SC_EINT1 */ +#define WM8285_SPKOUTL_SC_EINT1_SHIFT 6 /* SPKOUTL_SC_EINT1 */ +#define WM8285_SPKOUTL_SC_EINT1_WIDTH 1 /* SPKOUTL_SC_EINT1 */ +#define WM8285_HP3R_SC_EINT1 0x0020 /* HP3R_SC_EINT1 */ +#define WM8285_HP3R_SC_EINT1_MASK 0x0020 /* HP3R_SC_EINT1 */ +#define WM8285_HP3R_SC_EINT1_SHIFT 5 /* HP3R_SC_EINT1 */ +#define WM8285_HP3R_SC_EINT1_WIDTH 1 /* HP3R_SC_EINT1 */ +#define WM8285_HP3L_SC_EINT1 0x0010 /* HP3L_SC_EINT1 */ +#define WM8285_HP3L_SC_EINT1_MASK 0x0010 /* HP3L_SC_EINT1 */ +#define WM8285_HP3L_SC_EINT1_SHIFT 4 /* HP3L_SC_EINT1 */ +#define WM8285_HP3L_SC_EINT1_WIDTH 1 /* HP3L_SC_EINT1 */ +#define WM8285_HP2R_SC_EINT1 0x0008 /* HP2R_SC_EINT1 */ +#define WM8285_HP2R_SC_EINT1_MASK 0x0008 /* HP2R_SC_EINT1 */ +#define WM8285_HP2R_SC_EINT1_SHIFT 3 /* HP2R_SC_EINT1 */ +#define WM8285_HP2R_SC_EINT1_WIDTH 1 /* HP2R_SC_EINT1 */ +#define WM8285_HP2L_SC_EINT1 0x0004 /* HP2L_SC_EINT1 */ +#define WM8285_HP2L_SC_EINT1_MASK 0x0004 /* HP2L_SC_EINT1 */ +#define WM8285_HP2L_SC_EINT1_SHIFT 2 /* HP2L_SC_EINT1 */ +#define WM8285_HP2L_SC_EINT1_WIDTH 1 /* HP2L_SC_EINT1 */ +#define WM8285_HP1R_SC_EINT1 0x0002 /* HP1R_SC_EINT1 */ +#define WM8285_HP1R_SC_EINT1_MASK 0x0002 /* HP1R_SC_EINT1 */ +#define WM8285_HP1R_SC_EINT1_SHIFT 1 /* HP1R_SC_EINT1 */ +#define WM8285_HP1R_SC_EINT1_WIDTH 1 /* HP1R_SC_EINT1 */ +#define WM8285_HP1L_SC_EINT1 0x0001 /* HP1L_SC_EINT1 */ +#define WM8285_HP1L_SC_EINT1_MASK 0x0001 /* HP1L_SC_EINT1 */ +#define WM8285_HP1L_SC_EINT1_SHIFT 0 /* HP1L_SC_EINT1 */ +#define WM8285_HP1L_SC_EINT1_WIDTH 1 /* HP1L_SC_EINT1 */ + +/* + * R6156 (0x180C) - IRQ1 Status 13 + */ +#define WM8285_SPKOUTR_ENABLE_DONE_EINT1 0x0080 /* SPKOUTR_ENABLE_DONE_EINT1 */ +#define WM8285_SPKOUTR_ENABLE_DONE_EINT1_MASK 0x0080 /* SPKOUTR_ENABLE_DONE_EINT1 */ +#define WM8285_SPKOUTR_ENABLE_DONE_EINT1_SHIFT 7 /* SPKOUTR_ENABLE_DONE_EINT1 */ +#define WM8285_SPKOUTR_ENABLE_DONE_EINT1_WIDTH 1 /* SPKOUTR_ENABLE_DONE_EINT1 */ +#define WM8285_SPKOUTL_ENABLE_DONE_EINT1 0x0040 /* SPKOUTL_ENABLE_DONE_EINT1 */ +#define WM8285_SPKOUTL_ENABLE_DONE_EINT1_MASK 0x0040 /* SPKOUTL_ENABLE_DONE_EINT1 */ +#define WM8285_SPKOUTL_ENABLE_DONE_EINT1_SHIFT 6 /* SPKOUTL_ENABLE_DONE_EINT1 */ +#define WM8285_SPKOUTL_ENABLE_DONE_EINT1_WIDTH 1 /* SPKOUTL_ENABLE_DONE_EINT1 */ +#define WM8285_HP3R_ENABLE_DONE_EINT1 0x0020 /* HP3R_ENABLE_DONE_EINT1 */ +#define WM8285_HP3R_ENABLE_DONE_EINT1_MASK 0x0020 /* HP3R_ENABLE_DONE_EINT1 */ +#define WM8285_HP3R_ENABLE_DONE_EINT1_SHIFT 5 /* HP3R_ENABLE_DONE_EINT1 */ +#define WM8285_HP3R_ENABLE_DONE_EINT1_WIDTH 1 /* HP3R_ENABLE_DONE_EINT1 */ +#define WM8285_HP3L_ENABLE_DONE_EINT1 0x0010 /* HP3L_ENABLE_DONE_EINT1 */ +#define WM8285_HP3L_ENABLE_DONE_EINT1_MASK 0x0010 /* HP3L_ENABLE_DONE_EINT1 */ +#define WM8285_HP3L_ENABLE_DONE_EINT1_SHIFT 4 /* HP3L_ENABLE_DONE_EINT1 */ +#define WM8285_HP3L_ENABLE_DONE_EINT1_WIDTH 1 /* HP3L_ENABLE_DONE_EINT1 */ +#define WM8285_HP2R_ENABLE_DONE_EINT1 0x0008 /* HP2R_ENABLE_DONE_EINT1 */ +#define WM8285_HP2R_ENABLE_DONE_EINT1_MASK 0x0008 /* HP2R_ENABLE_DONE_EINT1 */ +#define WM8285_HP2R_ENABLE_DONE_EINT1_SHIFT 3 /* HP2R_ENABLE_DONE_EINT1 */ +#define WM8285_HP2R_ENABLE_DONE_EINT1_WIDTH 1 /* HP2R_ENABLE_DONE_EINT1 */ +#define WM8285_HP2L_ENABLE_DONE_EINT1 0x0004 /* HP2L_ENABLE_DONE_EINT1 */ +#define WM8285_HP2L_ENABLE_DONE_EINT1_MASK 0x0004 /* HP2L_ENABLE_DONE_EINT1 */ +#define WM8285_HP2L_ENABLE_DONE_EINT1_SHIFT 2 /* HP2L_ENABLE_DONE_EINT1 */ +#define WM8285_HP2L_ENABLE_DONE_EINT1_WIDTH 1 /* HP2L_ENABLE_DONE_EINT1 */ +#define WM8285_HP1R_ENABLE_DONE_EINT1 0x0002 /* HP1R_ENABLE_DONE_EINT1 */ +#define WM8285_HP1R_ENABLE_DONE_EINT1_MASK 0x0002 /* HP1R_ENABLE_DONE_EINT1 */ +#define WM8285_HP1R_ENABLE_DONE_EINT1_SHIFT 1 /* HP1R_ENABLE_DONE_EINT1 */ +#define WM8285_HP1R_ENABLE_DONE_EINT1_WIDTH 1 /* HP1R_ENABLE_DONE_EINT1 */ +#define WM8285_HP1L_ENABLE_DONE_EINT1 0x0001 /* HP1L_ENABLE_DONE_EINT1 */ +#define WM8285_HP1L_ENABLE_DONE_EINT1_MASK 0x0001 /* HP1L_ENABLE_DONE_EINT1 */ +#define WM8285_HP1L_ENABLE_DONE_EINT1_SHIFT 0 /* HP1L_ENABLE_DONE_EINT1 */ +#define WM8285_HP1L_ENABLE_DONE_EINT1_WIDTH 1 /* HP1L_ENABLE_DONE_EINT1 */ + +/* + * R6157 (0x180D) - IRQ1 Status 14 + */ +#define WM8285_SPKOUTR_DISABLE_DONE_EINT1 0x0080 /* SPKOUTR_DISABLE_DONE_EINT1 */ +#define WM8285_SPKOUTR_DISABLE_DONE_EINT1_MASK 0x0080 /* SPKOUTR_DISABLE_DONE_EINT1 */ +#define WM8285_SPKOUTR_DISABLE_DONE_EINT1_SHIFT 7 /* SPKOUTR_DISABLE_DONE_EINT1 */ +#define WM8285_SPKOUTR_DISABLE_DONE_EINT1_WIDTH 1 /* SPKOUTR_DISABLE_DONE_EINT1 */ +#define WM8285_SPKOUTL_DISABLE_DONE_EINT1 0x0040 /* SPKOUTL_DISABLE_DONE_EINT1 */ +#define WM8285_SPKOUTL_DISABLE_DONE_EINT1_MASK 0x0040 /* SPKOUTL_DISABLE_DONE_EINT1 */ +#define WM8285_SPKOUTL_DISABLE_DONE_EINT1_SHIFT 6 /* SPKOUTL_DISABLE_DONE_EINT1 */ +#define WM8285_SPKOUTL_DISABLE_DONE_EINT1_WIDTH 1 /* SPKOUTL_DISABLE_DONE_EINT1 */ +#define WM8285_HP3R_DISABLE_DONE_EINT1 0x0020 /* HP3R_DISABLE_DONE_EINT1 */ +#define WM8285_HP3R_DISABLE_DONE_EINT1_MASK 0x0020 /* HP3R_DISABLE_DONE_EINT1 */ +#define WM8285_HP3R_DISABLE_DONE_EINT1_SHIFT 5 /* HP3R_DISABLE_DONE_EINT1 */ +#define WM8285_HP3R_DISABLE_DONE_EINT1_WIDTH 1 /* HP3R_DISABLE_DONE_EINT1 */ +#define WM8285_HP3L_DISABLE_DONE_EINT1 0x0010 /* HP3L_DISABLE_DONE_EINT1 */ +#define WM8285_HP3L_DISABLE_DONE_EINT1_MASK 0x0010 /* HP3L_DISABLE_DONE_EINT1 */ +#define WM8285_HP3L_DISABLE_DONE_EINT1_SHIFT 4 /* HP3L_DISABLE_DONE_EINT1 */ +#define WM8285_HP3L_DISABLE_DONE_EINT1_WIDTH 1 /* HP3L_DISABLE_DONE_EINT1 */ +#define WM8285_HP2R_DISABLE_DONE_EINT1 0x0008 /* HP2R_DISABLE_DONE_EINT1 */ +#define WM8285_HP2R_DISABLE_DONE_EINT1_MASK 0x0008 /* HP2R_DISABLE_DONE_EINT1 */ +#define WM8285_HP2R_DISABLE_DONE_EINT1_SHIFT 3 /* HP2R_DISABLE_DONE_EINT1 */ +#define WM8285_HP2R_DISABLE_DONE_EINT1_WIDTH 1 /* HP2R_DISABLE_DONE_EINT1 */ +#define WM8285_HP2L_DISABLE_DONE_EINT1 0x0004 /* HP2L_DISABLE_DONE_EINT1 */ +#define WM8285_HP2L_DISABLE_DONE_EINT1_MASK 0x0004 /* HP2L_DISABLE_DONE_EINT1 */ +#define WM8285_HP2L_DISABLE_DONE_EINT1_SHIFT 2 /* HP2L_DISABLE_DONE_EINT1 */ +#define WM8285_HP2L_DISABLE_DONE_EINT1_WIDTH 1 /* HP2L_DISABLE_DONE_EINT1 */ +#define WM8285_HP1R_DISABLE_DONE_EINT1 0x0002 /* HP1R_DISABLE_DONE_EINT1 */ +#define WM8285_HP1R_DISABLE_DONE_EINT1_MASK 0x0002 /* HP1R_DISABLE_DONE_EINT1 */ +#define WM8285_HP1R_DISABLE_DONE_EINT1_SHIFT 1 /* HP1R_DISABLE_DONE_EINT1 */ +#define WM8285_HP1R_DISABLE_DONE_EINT1_WIDTH 1 /* HP1R_DISABLE_DONE_EINT1 */ +#define WM8285_HP1L_DISABLE_DONE_EINT1 0x0001 /* HP1L_DISABLE_DONE_EINT1 */ +#define WM8285_HP1L_DISABLE_DONE_EINT1_MASK 0x0001 /* HP1L_DISABLE_DONE_EINT1 */ +#define WM8285_HP1L_DISABLE_DONE_EINT1_SHIFT 0 /* HP1L_DISABLE_DONE_EINT1 */ +#define WM8285_HP1L_DISABLE_DONE_EINT1_WIDTH 1 /* HP1L_DISABLE_DONE_EINT1 */ + +/* + * R6158 (0x180E) - IRQ1 Status 15 + */ +#define WM8285_SPK_OVERHEAT_WARN_EINT1 0x0004 /* SPK_OVERHEAT_WARN_EINT1 */ +#define WM8285_SPK_OVERHEAT_WARN_EINT1_MASK 0x0004 /* SPK_OVERHEAT_WARN_EINT1 */ +#define WM8285_SPK_OVERHEAT_WARN_EINT1_SHIFT 2 /* SPK_OVERHEAT_WARN_EINT1 */ +#define WM8285_SPK_OVERHEAT_WARN_EINT1_WIDTH 1 /* SPK_OVERHEAT_WARN_EINT1 */ +#define WM8285_SPK_OVERHEAT_EINT1 0x0002 /* SPK_OVERHEAT_EINT1 */ +#define WM8285_SPK_OVERHEAT_EINT1_MASK 0x0002 /* SPK_OVERHEAT_EINT1 */ +#define WM8285_SPK_OVERHEAT_EINT1_SHIFT 1 /* SPK_OVERHEAT_EINT1 */ +#define WM8285_SPK_OVERHEAT_EINT1_WIDTH 1 /* SPK_OVERHEAT_EINT1 */ +#define WM8285_SPK_SHUTDOWN_EINT1 0x0001 /* SPK_SHUTDOWN_EINT1 */ +#define WM8285_SPK_SHUTDOWN_EINT1_MASK 0x0001 /* SPK_SHUTDOWN_EINT1 */ +#define WM8285_SPK_SHUTDOWN_EINT1_SHIFT 0 /* SPK_SHUTDOWN_EINT1 */ +#define WM8285_SPK_SHUTDOWN_EINT1_WIDTH 1 /* SPK_SHUTDOWN_EINT1 */ + +/* + * R6208 (0x1840) - IRQ1 Mask 1 + */ +#define WM8285_IM_DSP_SHARED_WR_COLL_EINT1 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT1 */ +#define WM8285_IM_DSP_SHARED_WR_COLL_EINT1_MASK 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT1 */ +#define WM8285_IM_DSP_SHARED_WR_COLL_EINT1_SHIFT 15 /* IM_DSP_SHARED_WR_COLL_EINT1 */ +#define WM8285_IM_DSP_SHARED_WR_COLL_EINT1_WIDTH 1 /* IM_DSP_SHARED_WR_COLL_EINT1 */ +#define WM8285_IM_CTRLIF_ERR_EINT1 0x1000 /* IM_CTRLIF_ERR_EINT1 */ +#define WM8285_IM_CTRLIF_ERR_EINT1_MASK 0x1000 /* IM_CTRLIF_ERR_EINT1 */ +#define WM8285_IM_CTRLIF_ERR_EINT1_SHIFT 12 /* IM_CTRLIF_ERR_EINT1 */ +#define WM8285_IM_CTRLIF_ERR_EINT1_WIDTH 1 /* IM_CTRLIF_ERR_EINT1 */ +#define WM8285_IM_IRQ_NO_CLOCK_EINT1 0x0200 /* IM_IRQ_NO_CLOCK_EINT1 */ +#define WM8285_IM_IRQ_NO_CLOCK_EINT1_MASK 0x0200 /* IM_IRQ_NO_CLOCK_EINT1 */ +#define WM8285_IM_IRQ_NO_CLOCK_EINT1_SHIFT 9 /* IM_IRQ_NO_CLOCK_EINT1 */ +#define WM8285_IM_IRQ_NO_CLOCK_EINT1_WIDTH 1 /* IM_IRQ_NO_CLOCK_EINT1 */ +#define WM8285_IM_CLOCK_DETECT_EINT1 0x0100 /* IM_CLOCK_DETECT_EINT1 */ +#define WM8285_IM_CLOCK_DETECT_EINT1_MASK 0x0100 /* IM_CLOCK_DETECT_EINT1 */ +#define WM8285_IM_CLOCK_DETECT_EINT1_SHIFT 8 /* IM_CLOCK_DETECT_EINT1 */ +#define WM8285_IM_CLOCK_DETECT_EINT1_WIDTH 1 /* IM_CLOCK_DETECT_EINT1 */ +#define WM8285_IM_BOOT_DONE_EINT1 0x0080 /* IM_BOOT_DONE_EINT1 */ +#define WM8285_IM_BOOT_DONE_EINT1_MASK 0x0080 /* IM_BOOT_DONE_EINT1 */ +#define WM8285_IM_BOOT_DONE_EINT1_SHIFT 7 /* IM_BOOT_DONE_EINT1 */ +#define WM8285_IM_BOOT_DONE_EINT1_WIDTH 1 /* IM_BOOT_DONE_EINT1 */ + +/* + * R6209 (0x1841) - IRQ1 Mask 2 + */ +#define WM8285_IM_FLL3_LOCK_EINT1 0x0400 /* IM_FLL3_LOCK_EINT1 */ +#define WM8285_IM_FLL3_LOCK_EINT1_MASK 0x0400 /* IM_FLL3_LOCK_EINT1 */ +#define WM8285_IM_FLL3_LOCK_EINT1_SHIFT 10 /* IM_FLL3_LOCK_EINT1 */ +#define WM8285_IM_FLL3_LOCK_EINT1_WIDTH 1 /* IM_FLL3_LOCK_EINT1 */ +#define WM8285_IM_FLL2_LOCK_EINT1 0x0200 /* IM_FLL2_LOCK_EINT1 */ +#define WM8285_IM_FLL2_LOCK_EINT1_MASK 0x0200 /* IM_FLL2_LOCK_EINT1 */ +#define WM8285_IM_FLL2_LOCK_EINT1_SHIFT 9 /* IM_FLL2_LOCK_EINT1 */ +#define WM8285_IM_FLL2_LOCK_EINT1_WIDTH 1 /* IM_FLL2_LOCK_EINT1 */ +#define WM8285_IM_FLL1_LOCK_EINT1 0x0100 /* IM_FLL1_LOCK_EINT1 */ +#define WM8285_IM_FLL1_LOCK_EINT1_MASK 0x0100 /* IM_FLL1_LOCK_EINT1 */ +#define WM8285_IM_FLL1_LOCK_EINT1_SHIFT 8 /* IM_FLL1_LOCK_EINT1 */ +#define WM8285_IM_FLL1_LOCK_EINT1_WIDTH 1 /* IM_FLL1_LOCK_EINT1 */ + +/* + * R6213 (0x1845) - IRQ1 Mask 6 + */ +#define WM8285_IM_MICDET_EINT1 0x0100 /* IM_MICDET_EINT1 */ +#define WM8285_IM_MICDET_EINT1_MASK 0x0100 /* IM_MICDET_EINT1 */ +#define WM8285_IM_MICDET_EINT1_SHIFT 8 /* IM_MICDET_EINT1 */ +#define WM8285_IM_MICDET_EINT1_WIDTH 1 /* IM_MICDET_EINT1 */ +#define WM8285_IM_HPDET_EINT1 0x0001 /* IM_HPDET_EINT1 */ +#define WM8285_IM_HPDET_EINT1_MASK 0x0001 /* IM_HPDET_EINT1 */ +#define WM8285_IM_HPDET_EINT1_SHIFT 0 /* IM_HPDET_EINT1 */ +#define WM8285_IM_HPDET_EINT1_WIDTH 1 /* IM_HPDET_EINT1 */ + +/* + * R6214 (0x1846) - IRQ1 Mask 7 + */ +#define WM8285_IM_MICD_CLAMP_FALL_EINT1 0x0020 /* IM_MICD_CLAMP_FALL_EINT1 */ +#define WM8285_IM_MICD_CLAMP_FALL_EINT1_MASK 0x0020 /* IM_MICD_CLAMP_FALL_EINT1 */ +#define WM8285_IM_MICD_CLAMP_FALL_EINT1_SHIFT 5 /* IM_MICD_CLAMP_FALL_EINT1 */ +#define WM8285_IM_MICD_CLAMP_FALL_EINT1_WIDTH 1 /* IM_MICD_CLAMP_FALL_EINT1 */ +#define WM8285_IM_MICD_CLAMP_RISE_EINT1 0x0010 /* IM_MICD_CLAMP_RISE_EINT1 */ +#define WM8285_IM_MICD_CLAMP_RISE_EINT1_MASK 0x0010 /* IM_MICD_CLAMP_RISE_EINT1 */ +#define WM8285_IM_MICD_CLAMP_RISE_EINT1_SHIFT 4 /* IM_MICD_CLAMP_RISE_EINT1 */ +#define WM8285_IM_MICD_CLAMP_RISE_EINT1_WIDTH 1 /* IM_MICD_CLAMP_RISE_EINT1 */ +#define WM8285_IM_JD2_FALL_EINT1 0x0008 /* IM_JD2_FALL_EINT1 */ +#define WM8285_IM_JD2_FALL_EINT1_MASK 0x0008 /* IM_JD2_FALL_EINT1 */ +#define WM8285_IM_JD2_FALL_EINT1_SHIFT 3 /* IM_JD2_FALL_EINT1 */ +#define WM8285_IM_JD2_FALL_EINT1_WIDTH 1 /* IM_JD2_FALL_EINT1 */ +#define WM8285_IM_JD2_RISE_EINT1 0x0004 /* IM_JD2_RISE_EINT1 */ +#define WM8285_IM_JD2_RISE_EINT1_MASK 0x0004 /* IM_JD2_RISE_EINT1 */ +#define WM8285_IM_JD2_RISE_EINT1_SHIFT 2 /* IM_JD2_RISE_EINT1 */ +#define WM8285_IM_JD2_RISE_EINT1_WIDTH 1 /* IM_JD2_RISE_EINT1 */ +#define WM8285_IM_JD1_FALL_EINT1 0x0002 /* IM_JD1_FALL_EINT1 */ +#define WM8285_IM_JD1_FALL_EINT1_MASK 0x0002 /* IM_JD1_FALL_EINT1 */ +#define WM8285_IM_JD1_FALL_EINT1_SHIFT 1 /* IM_JD1_FALL_EINT1 */ +#define WM8285_IM_JD1_FALL_EINT1_WIDTH 1 /* IM_JD1_FALL_EINT1 */ +#define WM8285_IM_JD1_RISE_EINT1 0x0001 /* IM_JD1_RISE_EINT1 */ +#define WM8285_IM_JD1_RISE_EINT1_MASK 0x0001 /* IM_JD1_RISE_EINT1 */ +#define WM8285_IM_JD1_RISE_EINT1_SHIFT 0 /* IM_JD1_RISE_EINT1 */ +#define WM8285_IM_JD1_RISE_EINT1_WIDTH 1 /* IM_JD1_RISE_EINT1 */ + +/* + * R6216 (0x1848) - IRQ1 Mask 9 + */ +#define WM8285_IM_ASRC2_IN2_LOCK_EINT1 0x0800 /* IM_ASRC2_IN2_LOCK_EINT1 */ +#define WM8285_IM_ASRC2_IN2_LOCK_EINT1_MASK 0x0800 /* IM_ASRC2_IN2_LOCK_EINT1 */ +#define WM8285_IM_ASRC2_IN2_LOCK_EINT1_SHIFT 11 /* IM_ASRC2_IN2_LOCK_EINT1 */ +#define WM8285_IM_ASRC2_IN2_LOCK_EINT1_WIDTH 1 /* IM_ASRC2_IN2_LOCK_EINT1 */ +#define WM8285_IM_ASRC2_IN1_LOCK_EINT1 0x0400 /* IM_ASRC2_IN1_LOCK_EINT1 */ +#define WM8285_IM_ASRC2_IN1_LOCK_EINT1_MASK 0x0400 /* IM_ASRC2_IN1_LOCK_EINT1 */ +#define WM8285_IM_ASRC2_IN1_LOCK_EINT1_SHIFT 10 /* IM_ASRC2_IN1_LOCK_EINT1 */ +#define WM8285_IM_ASRC2_IN1_LOCK_EINT1_WIDTH 1 /* IM_ASRC2_IN1_LOCK_EINT1 */ +#define WM8285_IM_ASRC1_IN2_LOCK_EINT1 0x0200 /* IM_ASRC1_IN2_LOCK_EINT1 */ +#define WM8285_IM_ASRC1_IN2_LOCK_EINT1_MASK 0x0200 /* IM_ASRC1_IN2_LOCK_EINT1 */ +#define WM8285_IM_ASRC1_IN2_LOCK_EINT1_SHIFT 9 /* IM_ASRC1_IN2_LOCK_EINT1 */ +#define WM8285_IM_ASRC1_IN2_LOCK_EINT1_WIDTH 1 /* IM_ASRC1_IN2_LOCK_EINT1 */ +#define WM8285_IM_ASRC1_IN1_LOCK_EINT1 0x0100 /* IM_ASRC1_IN1_LOCK_EINT1 */ +#define WM8285_IM_ASRC1_IN1_LOCK_EINT1_MASK 0x0100 /* IM_ASRC1_IN1_LOCK_EINT1 */ +#define WM8285_IM_ASRC1_IN1_LOCK_EINT1_SHIFT 8 /* IM_ASRC1_IN1_LOCK_EINT1 */ +#define WM8285_IM_ASRC1_IN1_LOCK_EINT1_WIDTH 1 /* IM_ASRC1_IN1_LOCK_EINT1 */ +#define WM8285_IM_DRC2_SIG_DET_EINT1 0x0002 /* IM_DRC2_SIG_DET_EINT1 */ +#define WM8285_IM_DRC2_SIG_DET_EINT1_MASK 0x0002 /* IM_DRC2_SIG_DET_EINT1 */ +#define WM8285_IM_DRC2_SIG_DET_EINT1_SHIFT 1 /* IM_DRC2_SIG_DET_EINT1 */ +#define WM8285_IM_DRC2_SIG_DET_EINT1_WIDTH 1 /* IM_DRC2_SIG_DET_EINT1 */ +#define WM8285_IM_DRC1_SIG_DET_EINT1 0x0001 /* IM_DRC1_SIG_DET_EINT1 */ +#define WM8285_IM_DRC1_SIG_DET_EINT1_MASK 0x0001 /* IM_DRC1_SIG_DET_EINT1 */ +#define WM8285_IM_DRC1_SIG_DET_EINT1_SHIFT 0 /* IM_DRC1_SIG_DET_EINT1 */ +#define WM8285_IM_DRC1_SIG_DET_EINT1_WIDTH 1 /* IM_DRC1_SIG_DET_EINT1 */ + +/* + * R6218 (0x184A) - IRQ1 Mask 11 + */ +#define WM8285_IM_DSP_IRQ16_EINT1 0x8000 /* IM_DSP_IRQ16_EINT1 */ +#define WM8285_IM_DSP_IRQ16_EINT1_MASK 0x8000 /* IM_DSP_IRQ16_EINT1 */ +#define WM8285_IM_DSP_IRQ16_EINT1_SHIFT 15 /* IM_DSP_IRQ16_EINT1 */ +#define WM8285_IM_DSP_IRQ16_EINT1_WIDTH 1 /* IM_DSP_IRQ16_EINT1 */ +#define WM8285_IM_DSP_IRQ15_EINT1 0x4000 /* IM_DSP_IRQ15_EINT1 */ +#define WM8285_IM_DSP_IRQ15_EINT1_MASK 0x4000 /* IM_DSP_IRQ15_EINT1 */ +#define WM8285_IM_DSP_IRQ15_EINT1_SHIFT 14 /* IM_DSP_IRQ15_EINT1 */ +#define WM8285_IM_DSP_IRQ15_EINT1_WIDTH 1 /* IM_DSP_IRQ15_EINT1 */ +#define WM8285_IM_DSP_IRQ14_EINT1 0x2000 /* IM_DSP_IRQ14_EINT1 */ +#define WM8285_IM_DSP_IRQ14_EINT1_MASK 0x2000 /* IM_DSP_IRQ14_EINT1 */ +#define WM8285_IM_DSP_IRQ14_EINT1_SHIFT 13 /* IM_DSP_IRQ14_EINT1 */ +#define WM8285_IM_DSP_IRQ14_EINT1_WIDTH 1 /* IM_DSP_IRQ14_EINT1 */ +#define WM8285_IM_DSP_IRQ13_EINT1 0x1000 /* IM_DSP_IRQ13_EINT1 */ +#define WM8285_IM_DSP_IRQ13_EINT1_MASK 0x1000 /* IM_DSP_IRQ13_EINT1 */ +#define WM8285_IM_DSP_IRQ13_EINT1_SHIFT 12 /* IM_DSP_IRQ13_EINT1 */ +#define WM8285_IM_DSP_IRQ13_EINT1_WIDTH 1 /* IM_DSP_IRQ13_EINT1 */ +#define WM8285_IM_DSP_IRQ12_EINT1 0x0800 /* IM_DSP_IRQ12_EINT1 */ +#define WM8285_IM_DSP_IRQ12_EINT1_MASK 0x0800 /* IM_DSP_IRQ12_EINT1 */ +#define WM8285_IM_DSP_IRQ12_EINT1_SHIFT 11 /* IM_DSP_IRQ12_EINT1 */ +#define WM8285_IM_DSP_IRQ12_EINT1_WIDTH 1 /* IM_DSP_IRQ12_EINT1 */ +#define WM8285_IM_DSP_IRQ11_EINT1 0x0400 /* IM_DSP_IRQ11_EINT1 */ +#define WM8285_IM_DSP_IRQ11_EINT1_MASK 0x0400 /* IM_DSP_IRQ11_EINT1 */ +#define WM8285_IM_DSP_IRQ11_EINT1_SHIFT 10 /* IM_DSP_IRQ11_EINT1 */ +#define WM8285_IM_DSP_IRQ11_EINT1_WIDTH 1 /* IM_DSP_IRQ11_EINT1 */ +#define WM8285_IM_DSP_IRQ10_EINT1 0x0200 /* IM_DSP_IRQ10_EINT1 */ +#define WM8285_IM_DSP_IRQ10_EINT1_MASK 0x0200 /* IM_DSP_IRQ10_EINT1 */ +#define WM8285_IM_DSP_IRQ10_EINT1_SHIFT 9 /* IM_DSP_IRQ10_EINT1 */ +#define WM8285_IM_DSP_IRQ10_EINT1_WIDTH 1 /* IM_DSP_IRQ10_EINT1 */ +#define WM8285_IM_DSP_IRQ9_EINT1 0x0100 /* IM_DSP_IRQ9_EINT1 */ +#define WM8285_IM_DSP_IRQ9_EINT1_MASK 0x0100 /* IM_DSP_IRQ9_EINT1 */ +#define WM8285_IM_DSP_IRQ9_EINT1_SHIFT 8 /* IM_DSP_IRQ9_EINT1 */ +#define WM8285_IM_DSP_IRQ9_EINT1_WIDTH 1 /* IM_DSP_IRQ9_EINT1 */ +#define WM8285_IM_DSP_IRQ8_EINT1 0x0080 /* IM_DSP_IRQ8_EINT1 */ +#define WM8285_IM_DSP_IRQ8_EINT1_MASK 0x0080 /* IM_DSP_IRQ8_EINT1 */ +#define WM8285_IM_DSP_IRQ8_EINT1_SHIFT 7 /* IM_DSP_IRQ8_EINT1 */ +#define WM8285_IM_DSP_IRQ8_EINT1_WIDTH 1 /* IM_DSP_IRQ8_EINT1 */ +#define WM8285_IM_DSP_IRQ7_EINT1 0x0040 /* IM_DSP_IRQ7_EINT1 */ +#define WM8285_IM_DSP_IRQ7_EINT1_MASK 0x0040 /* IM_DSP_IRQ7_EINT1 */ +#define WM8285_IM_DSP_IRQ7_EINT1_SHIFT 6 /* IM_DSP_IRQ7_EINT1 */ +#define WM8285_IM_DSP_IRQ7_EINT1_WIDTH 1 /* IM_DSP_IRQ7_EINT1 */ +#define WM8285_IM_DSP_IRQ6_EINT1 0x0020 /* IM_DSP_IRQ6_EINT1 */ +#define WM8285_IM_DSP_IRQ6_EINT1_MASK 0x0020 /* IM_DSP_IRQ6_EINT1 */ +#define WM8285_IM_DSP_IRQ6_EINT1_SHIFT 5 /* IM_DSP_IRQ6_EINT1 */ +#define WM8285_IM_DSP_IRQ6_EINT1_WIDTH 1 /* IM_DSP_IRQ6_EINT1 */ +#define WM8285_IM_DSP_IRQ5_EINT1 0x0010 /* IM_DSP_IRQ5_EINT1 */ +#define WM8285_IM_DSP_IRQ5_EINT1_MASK 0x0010 /* IM_DSP_IRQ5_EINT1 */ +#define WM8285_IM_DSP_IRQ5_EINT1_SHIFT 4 /* IM_DSP_IRQ5_EINT1 */ +#define WM8285_IM_DSP_IRQ5_EINT1_WIDTH 1 /* IM_DSP_IRQ5_EINT1 */ +#define WM8285_IM_DSP_IRQ4_EINT1 0x0008 /* IM_DSP_IRQ4_EINT1 */ +#define WM8285_IM_DSP_IRQ4_EINT1_MASK 0x0008 /* IM_DSP_IRQ4_EINT1 */ +#define WM8285_IM_DSP_IRQ4_EINT1_SHIFT 3 /* IM_DSP_IRQ4_EINT1 */ +#define WM8285_IM_DSP_IRQ4_EINT1_WIDTH 1 /* IM_DSP_IRQ4_EINT1 */ +#define WM8285_IM_DSP_IRQ3_EINT1 0x0004 /* IM_DSP_IRQ3_EINT1 */ +#define WM8285_IM_DSP_IRQ3_EINT1_MASK 0x0004 /* IM_DSP_IRQ3_EINT1 */ +#define WM8285_IM_DSP_IRQ3_EINT1_SHIFT 2 /* IM_DSP_IRQ3_EINT1 */ +#define WM8285_IM_DSP_IRQ3_EINT1_WIDTH 1 /* IM_DSP_IRQ3_EINT1 */ +#define WM8285_IM_DSP_IRQ2_EINT1 0x0002 /* IM_DSP_IRQ2_EINT1 */ +#define WM8285_IM_DSP_IRQ2_EINT1_MASK 0x0002 /* IM_DSP_IRQ2_EINT1 */ +#define WM8285_IM_DSP_IRQ2_EINT1_SHIFT 1 /* IM_DSP_IRQ2_EINT1 */ +#define WM8285_IM_DSP_IRQ2_EINT1_WIDTH 1 /* IM_DSP_IRQ2_EINT1 */ +#define WM8285_IM_DSP_IRQ1_EINT1 0x0001 /* IM_DSP_IRQ1_EINT1 */ +#define WM8285_IM_DSP_IRQ1_EINT1_MASK 0x0001 /* IM_DSP_IRQ1_EINT1 */ +#define WM8285_IM_DSP_IRQ1_EINT1_SHIFT 0 /* IM_DSP_IRQ1_EINT1 */ +#define WM8285_IM_DSP_IRQ1_EINT1_WIDTH 1 /* IM_DSP_IRQ1_EINT1 */ + +/* + * R6219 (0x184B) - IRQ1 Mask 12 + */ +#define WM8285_IM_SPKOUTR_SC_EINT1 0x0080 /* IM_SPKOUTR_SC_EINT1 */ +#define WM8285_IM_SPKOUTR_SC_EINT1_MASK 0x0080 /* IM_SPKOUTR_SC_EINT1 */ +#define WM8285_IM_SPKOUTR_SC_EINT1_SHIFT 7 /* IM_SPKOUTR_SC_EINT1 */ +#define WM8285_IM_SPKOUTR_SC_EINT1_WIDTH 1 /* IM_SPKOUTR_SC_EINT1 */ +#define WM8285_IM_SPKOUTL_SC_EINT1 0x0040 /* IM_SPKOUTL_SC_EINT1 */ +#define WM8285_IM_SPKOUTL_SC_EINT1_MASK 0x0040 /* IM_SPKOUTL_SC_EINT1 */ +#define WM8285_IM_SPKOUTL_SC_EINT1_SHIFT 6 /* IM_SPKOUTL_SC_EINT1 */ +#define WM8285_IM_SPKOUTL_SC_EINT1_WIDTH 1 /* IM_SPKOUTL_SC_EINT1 */ +#define WM8285_IM_HP3R_SC_EINT1 0x0020 /* IM_HP3R_SC_EINT1 */ +#define WM8285_IM_HP3R_SC_EINT1_MASK 0x0020 /* IM_HP3R_SC_EINT1 */ +#define WM8285_IM_HP3R_SC_EINT1_SHIFT 5 /* IM_HP3R_SC_EINT1 */ +#define WM8285_IM_HP3R_SC_EINT1_WIDTH 1 /* IM_HP3R_SC_EINT1 */ +#define WM8285_IM_HP3L_SC_EINT1 0x0010 /* IM_HP3L_SC_EINT1 */ +#define WM8285_IM_HP3L_SC_EINT1_MASK 0x0010 /* IM_HP3L_SC_EINT1 */ +#define WM8285_IM_HP3L_SC_EINT1_SHIFT 4 /* IM_HP3L_SC_EINT1 */ +#define WM8285_IM_HP3L_SC_EINT1_WIDTH 1 /* IM_HP3L_SC_EINT1 */ +#define WM8285_IM_HP2R_SC_EINT1 0x0008 /* IM_HP2R_SC_EINT1 */ +#define WM8285_IM_HP2R_SC_EINT1_MASK 0x0008 /* IM_HP2R_SC_EINT1 */ +#define WM8285_IM_HP2R_SC_EINT1_SHIFT 3 /* IM_HP2R_SC_EINT1 */ +#define WM8285_IM_HP2R_SC_EINT1_WIDTH 1 /* IM_HP2R_SC_EINT1 */ +#define WM8285_IM_HP2L_SC_EINT1 0x0004 /* IM_HP2L_SC_EINT1 */ +#define WM8285_IM_HP2L_SC_EINT1_MASK 0x0004 /* IM_HP2L_SC_EINT1 */ +#define WM8285_IM_HP2L_SC_EINT1_SHIFT 2 /* IM_HP2L_SC_EINT1 */ +#define WM8285_IM_HP2L_SC_EINT1_WIDTH 1 /* IM_HP2L_SC_EINT1 */ +#define WM8285_IM_HP1R_SC_EINT1 0x0002 /* IM_HP1R_SC_EINT1 */ +#define WM8285_IM_HP1R_SC_EINT1_MASK 0x0002 /* IM_HP1R_SC_EINT1 */ +#define WM8285_IM_HP1R_SC_EINT1_SHIFT 1 /* IM_HP1R_SC_EINT1 */ +#define WM8285_IM_HP1R_SC_EINT1_WIDTH 1 /* IM_HP1R_SC_EINT1 */ +#define WM8285_IM_HP1L_SC_EINT1 0x0001 /* IM_HP1L_SC_EINT1 */ +#define WM8285_IM_HP1L_SC_EINT1_MASK 0x0001 /* IM_HP1L_SC_EINT1 */ +#define WM8285_IM_HP1L_SC_EINT1_SHIFT 0 /* IM_HP1L_SC_EINT1 */ +#define WM8285_IM_HP1L_SC_EINT1_WIDTH 1 /* IM_HP1L_SC_EINT1 */ + +/* + * R6220 (0x184C) - IRQ1 Mask 13 + */ +#define WM8285_IM_SPKOUTR_ENABLE_DONE_EINT1 0x0080 /* IM_SPKOUTR_ENABLE_DONE_EINT1 */ +#define WM8285_IM_SPKOUTR_ENABLE_DONE_EINT1_MASK 0x0080 /* IM_SPKOUTR_ENABLE_DONE_EINT1 */ +#define WM8285_IM_SPKOUTR_ENABLE_DONE_EINT1_SHIFT 7 /* IM_SPKOUTR_ENABLE_DONE_EINT1 */ +#define WM8285_IM_SPKOUTR_ENABLE_DONE_EINT1_WIDTH 1 /* IM_SPKOUTR_ENABLE_DONE_EINT1 */ +#define WM8285_IM_SPKOUTL_ENABLE_DONE_EINT1 0x0040 /* IM_SPKOUTL_ENABLE_DONE_EINT1 */ +#define WM8285_IM_SPKOUTL_ENABLE_DONE_EINT1_MASK 0x0040 /* IM_SPKOUTL_ENABLE_DONE_EINT1 */ +#define WM8285_IM_SPKOUTL_ENABLE_DONE_EINT1_SHIFT 6 /* IM_SPKOUTL_ENABLE_DONE_EINT1 */ +#define WM8285_IM_SPKOUTL_ENABLE_DONE_EINT1_WIDTH 1 /* IM_SPKOUTL_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP3R_ENABLE_DONE_EINT1 0x0020 /* IM_HP3R_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP3R_ENABLE_DONE_EINT1_MASK 0x0020 /* IM_HP3R_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP3R_ENABLE_DONE_EINT1_SHIFT 5 /* IM_HP3R_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP3R_ENABLE_DONE_EINT1_WIDTH 1 /* IM_HP3R_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP3L_ENABLE_DONE_EINT1 0x0010 /* IM_HP3L_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP3L_ENABLE_DONE_EINT1_MASK 0x0010 /* IM_HP3L_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP3L_ENABLE_DONE_EINT1_SHIFT 4 /* IM_HP3L_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP3L_ENABLE_DONE_EINT1_WIDTH 1 /* IM_HP3L_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP2R_ENABLE_DONE_EINT1 0x0008 /* IM_HP2R_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP2R_ENABLE_DONE_EINT1_MASK 0x0008 /* IM_HP2R_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP2R_ENABLE_DONE_EINT1_SHIFT 3 /* IM_HP2R_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP2R_ENABLE_DONE_EINT1_WIDTH 1 /* IM_HP2R_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP2L_ENABLE_DONE_EINT1 0x0004 /* IM_HP2L_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP2L_ENABLE_DONE_EINT1_MASK 0x0004 /* IM_HP2L_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP2L_ENABLE_DONE_EINT1_SHIFT 2 /* IM_HP2L_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP2L_ENABLE_DONE_EINT1_WIDTH 1 /* IM_HP2L_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP1R_ENABLE_DONE_EINT1 0x0002 /* IM_HP1R_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP1R_ENABLE_DONE_EINT1_MASK 0x0002 /* IM_HP1R_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP1R_ENABLE_DONE_EINT1_SHIFT 1 /* IM_HP1R_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP1R_ENABLE_DONE_EINT1_WIDTH 1 /* IM_HP1R_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP1L_ENABLE_DONE_EINT1 0x0001 /* IM_HP1L_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP1L_ENABLE_DONE_EINT1_MASK 0x0001 /* IM_HP1L_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP1L_ENABLE_DONE_EINT1_SHIFT 0 /* IM_HP1L_ENABLE_DONE_EINT1 */ +#define WM8285_IM_HP1L_ENABLE_DONE_EINT1_WIDTH 1 /* IM_HP1L_ENABLE_DONE_EINT1 */ + +/* + * R6221 (0x184D) - IRQ1 Mask 14 + */ +#define WM8285_IM_SPKOUTR_DISABLE_DONE_EINT1 0x0080 /* IM_SPKOUTR_DISABLE_DONE_EINT1 */ +#define WM8285_IM_SPKOUTR_DISABLE_DONE_EINT1_MASK 0x0080 /* IM_SPKOUTR_DISABLE_DONE_EINT1 */ +#define WM8285_IM_SPKOUTR_DISABLE_DONE_EINT1_SHIFT 7 /* IM_SPKOUTR_DISABLE_DONE_EINT1 */ +#define WM8285_IM_SPKOUTR_DISABLE_DONE_EINT1_WIDTH 1 /* IM_SPKOUTR_DISABLE_DONE_EINT1 */ +#define WM8285_IM_SPKOUTL_DISABLE_DONE_EINT1 0x0040 /* IM_SPKOUTL_DISABLE_DONE_EINT1 */ +#define WM8285_IM_SPKOUTL_DISABLE_DONE_EINT1_MASK 0x0040 /* IM_SPKOUTL_DISABLE_DONE_EINT1 */ +#define WM8285_IM_SPKOUTL_DISABLE_DONE_EINT1_SHIFT 6 /* IM_SPKOUTL_DISABLE_DONE_EINT1 */ +#define WM8285_IM_SPKOUTL_DISABLE_DONE_EINT1_WIDTH 1 /* IM_SPKOUTL_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP3R_DISABLE_DONE_EINT1 0x0020 /* IM_HP3R_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP3R_DISABLE_DONE_EINT1_MASK 0x0020 /* IM_HP3R_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP3R_DISABLE_DONE_EINT1_SHIFT 5 /* IM_HP3R_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP3R_DISABLE_DONE_EINT1_WIDTH 1 /* IM_HP3R_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP3L_DISABLE_DONE_EINT1 0x0010 /* IM_HP3L_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP3L_DISABLE_DONE_EINT1_MASK 0x0010 /* IM_HP3L_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP3L_DISABLE_DONE_EINT1_SHIFT 4 /* IM_HP3L_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP3L_DISABLE_DONE_EINT1_WIDTH 1 /* IM_HP3L_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP2R_DISABLE_DONE_EINT1 0x0008 /* IM_HP2R_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP2R_DISABLE_DONE_EINT1_MASK 0x0008 /* IM_HP2R_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP2R_DISABLE_DONE_EINT1_SHIFT 3 /* IM_HP2R_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP2R_DISABLE_DONE_EINT1_WIDTH 1 /* IM_HP2R_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP2L_DISABLE_DONE_EINT1 0x0004 /* IM_HP2L_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP2L_DISABLE_DONE_EINT1_MASK 0x0004 /* IM_HP2L_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP2L_DISABLE_DONE_EINT1_SHIFT 2 /* IM_HP2L_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP2L_DISABLE_DONE_EINT1_WIDTH 1 /* IM_HP2L_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP1R_DISABLE_DONE_EINT1 0x0002 /* IM_HP1R_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP1R_DISABLE_DONE_EINT1_MASK 0x0002 /* IM_HP1R_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP1R_DISABLE_DONE_EINT1_SHIFT 1 /* IM_HP1R_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP1R_DISABLE_DONE_EINT1_WIDTH 1 /* IM_HP1R_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP1L_DISABLE_DONE_EINT1 0x0001 /* IM_HP1L_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP1L_DISABLE_DONE_EINT1_MASK 0x0001 /* IM_HP1L_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP1L_DISABLE_DONE_EINT1_SHIFT 0 /* IM_HP1L_DISABLE_DONE_EINT1 */ +#define WM8285_IM_HP1L_DISABLE_DONE_EINT1_WIDTH 1 /* IM_HP1L_DISABLE_DONE_EINT1 */ + +/* + * R6222 (0x184E) - IRQ1 Mask 15 + */ +#define WM8285_IM_SPK_OVERHEAT_WARN_EINT1 0x0004 /* IM_SPK_OVERHEAT_WARN_EINT1 */ +#define WM8285_IM_SPK_OVERHEAT_WARN_EINT1_MASK 0x0004 /* IM_SPK_OVERHEAT_WARN_EINT1 */ +#define WM8285_IM_SPK_OVERHEAT_WARN_EINT1_SHIFT 2 /* IM_SPK_OVERHEAT_WARN_EINT1 */ +#define WM8285_IM_SPK_OVERHEAT_WARN_EINT1_WIDTH 1 /* IM_SPK_OVERHEAT_WARN_EINT1 */ +#define WM8285_IM_SPK_OVERHEAT_EINT1 0x0002 /* IM_SPK_OVERHEAT_EINT1 */ +#define WM8285_IM_SPK_OVERHEAT_EINT1_MASK 0x0002 /* IM_SPK_OVERHEAT_EINT1 */ +#define WM8285_IM_SPK_OVERHEAT_EINT1_SHIFT 1 /* IM_SPK_OVERHEAT_EINT1 */ +#define WM8285_IM_SPK_OVERHEAT_EINT1_WIDTH 1 /* IM_SPK_OVERHEAT_EINT1 */ +#define WM8285_IM_SPK_SHUTDOWN_EINT1 0x0001 /* IM_SPK_SHUTDOWN_EINT1 */ +#define WM8285_IM_SPK_SHUTDOWN_EINT1_MASK 0x0001 /* IM_SPK_SHUTDOWN_EINT1 */ +#define WM8285_IM_SPK_SHUTDOWN_EINT1_SHIFT 0 /* IM_SPK_SHUTDOWN_EINT1 */ +#define WM8285_IM_SPK_SHUTDOWN_EINT1_WIDTH 1 /* IM_SPK_SHUTDOWN_EINT1 */ + +/* + * R6400 (0x1900) - IRQ2 Status 1 + */ +#define WM8285_DSP_SHARED_WR_COLL_EINT2 0x8000 /* DSP_SHARED_WR_COLL_EINT2 */ +#define WM8285_DSP_SHARED_WR_COLL_EINT2_MASK 0x8000 /* DSP_SHARED_WR_COLL_EINT2 */ +#define WM8285_DSP_SHARED_WR_COLL_EINT2_SHIFT 15 /* DSP_SHARED_WR_COLL_EINT2 */ +#define WM8285_DSP_SHARED_WR_COLL_EINT2_WIDTH 1 /* DSP_SHARED_WR_COLL_EINT2 */ +#define WM8285_CTRLIF_ERR_EINT2 0x1000 /* CTRLIF_ERR_EINT2 */ +#define WM8285_CTRLIF_ERR_EINT2_MASK 0x1000 /* CTRLIF_ERR_EINT2 */ +#define WM8285_CTRLIF_ERR_EINT2_SHIFT 12 /* CTRLIF_ERR_EINT2 */ +#define WM8285_CTRLIF_ERR_EINT2_WIDTH 1 /* CTRLIF_ERR_EINT2 */ +#define WM8285_IRQ_NO_CLOCK_EINT2 0x0200 /* IRQ_NO_CLOCK_EINT2 */ +#define WM8285_IRQ_NO_CLOCK_EINT2_MASK 0x0200 /* IRQ_NO_CLOCK_EINT2 */ +#define WM8285_IRQ_NO_CLOCK_EINT2_SHIFT 9 /* IRQ_NO_CLOCK_EINT2 */ +#define WM8285_IRQ_NO_CLOCK_EINT2_WIDTH 1 /* IRQ_NO_CLOCK_EINT2 */ +#define WM8285_CLOCK_DETECT_EINT2 0x0100 /* CLOCK_DETECT_EINT2 */ +#define WM8285_CLOCK_DETECT_EINT2_MASK 0x0100 /* CLOCK_DETECT_EINT2 */ +#define WM8285_CLOCK_DETECT_EINT2_SHIFT 8 /* CLOCK_DETECT_EINT2 */ +#define WM8285_CLOCK_DETECT_EINT2_WIDTH 1 /* CLOCK_DETECT_EINT2 */ +#define WM8285_BOOT_DONE_EINT2 0x0080 /* BOOT_DONE_EINT2 */ +#define WM8285_BOOT_DONE_EINT2_MASK 0x0080 /* BOOT_DONE_EINT2 */ +#define WM8285_BOOT_DONE_EINT2_SHIFT 7 /* BOOT_DONE_EINT2 */ +#define WM8285_BOOT_DONE_EINT2_WIDTH 1 /* BOOT_DONE_EINT2 */ + +/* + * R6401 (0x1901) - IRQ2 Status 2 + */ +#define WM8285_FLL3_LOCK_EINT2 0x0400 /* FLL3_LOCK_EINT2 */ +#define WM8285_FLL3_LOCK_EINT2_MASK 0x0400 /* FLL3_LOCK_EINT2 */ +#define WM8285_FLL3_LOCK_EINT2_SHIFT 10 /* FLL3_LOCK_EINT2 */ +#define WM8285_FLL3_LOCK_EINT2_WIDTH 1 /* FLL3_LOCK_EINT2 */ +#define WM8285_FLL2_LOCK_EINT2 0x0200 /* FLL2_LOCK_EINT2 */ +#define WM8285_FLL2_LOCK_EINT2_MASK 0x0200 /* FLL2_LOCK_EINT2 */ +#define WM8285_FLL2_LOCK_EINT2_SHIFT 9 /* FLL2_LOCK_EINT2 */ +#define WM8285_FLL2_LOCK_EINT2_WIDTH 1 /* FLL2_LOCK_EINT2 */ +#define WM8285_FLL1_LOCK_EINT2 0x0100 /* FLL1_LOCK_EINT2 */ +#define WM8285_FLL1_LOCK_EINT2_MASK 0x0100 /* FLL1_LOCK_EINT2 */ +#define WM8285_FLL1_LOCK_EINT2_SHIFT 8 /* FLL1_LOCK_EINT2 */ +#define WM8285_FLL1_LOCK_EINT2_WIDTH 1 /* FLL1_LOCK_EINT2 */ + +/* + * R6405 (0x1905) - IRQ2 Status 6 + */ +#define WM8285_MICDET_EINT2 0x0100 /* MICDET_EINT2 */ +#define WM8285_MICDET_EINT2_MASK 0x0100 /* MICDET_EINT2 */ +#define WM8285_MICDET_EINT2_SHIFT 8 /* MICDET_EINT2 */ +#define WM8285_MICDET_EINT2_WIDTH 1 /* MICDET_EINT2 */ +#define WM8285_HPDET_EINT2 0x0001 /* HPDET_EINT2 */ +#define WM8285_HPDET_EINT2_MASK 0x0001 /* HPDET_EINT2 */ +#define WM8285_HPDET_EINT2_SHIFT 0 /* HPDET_EINT2 */ +#define WM8285_HPDET_EINT2_WIDTH 1 /* HPDET_EINT2 */ + +/* + * R6406 (0x1906) - IRQ2 Status 7 + */ +#define WM8285_MICD_CLAMP_FALL_EINT2 0x0020 /* MICD_CLAMP_FALL_EINT2 */ +#define WM8285_MICD_CLAMP_FALL_EINT2_MASK 0x0020 /* MICD_CLAMP_FALL_EINT2 */ +#define WM8285_MICD_CLAMP_FALL_EINT2_SHIFT 5 /* MICD_CLAMP_FALL_EINT2 */ +#define WM8285_MICD_CLAMP_FALL_EINT2_WIDTH 1 /* MICD_CLAMP_FALL_EINT2 */ +#define WM8285_MICD_CLAMP_RISE_EINT2 0x0010 /* MICD_CLAMP_RISE_EINT2 */ +#define WM8285_MICD_CLAMP_RISE_EINT2_MASK 0x0010 /* MICD_CLAMP_RISE_EINT2 */ +#define WM8285_MICD_CLAMP_RISE_EINT2_SHIFT 4 /* MICD_CLAMP_RISE_EINT2 */ +#define WM8285_MICD_CLAMP_RISE_EINT2_WIDTH 1 /* MICD_CLAMP_RISE_EINT2 */ +#define WM8285_JD2_FALL_EINT2 0x0008 /* JD2_FALL_EINT2 */ +#define WM8285_JD2_FALL_EINT2_MASK 0x0008 /* JD2_FALL_EINT2 */ +#define WM8285_JD2_FALL_EINT2_SHIFT 3 /* JD2_FALL_EINT2 */ +#define WM8285_JD2_FALL_EINT2_WIDTH 1 /* JD2_FALL_EINT2 */ +#define WM8285_JD2_RISE_EINT2 0x0004 /* JD2_RISE_EINT2 */ +#define WM8285_JD2_RISE_EINT2_MASK 0x0004 /* JD2_RISE_EINT2 */ +#define WM8285_JD2_RISE_EINT2_SHIFT 2 /* JD2_RISE_EINT2 */ +#define WM8285_JD2_RISE_EINT2_WIDTH 1 /* JD2_RISE_EINT2 */ +#define WM8285_JD1_FALL_EINT2 0x0002 /* JD1_FALL_EINT2 */ +#define WM8285_JD1_FALL_EINT2_MASK 0x0002 /* JD1_FALL_EINT2 */ +#define WM8285_JD1_FALL_EINT2_SHIFT 1 /* JD1_FALL_EINT2 */ +#define WM8285_JD1_FALL_EINT2_WIDTH 1 /* JD1_FALL_EINT2 */ +#define WM8285_JD1_RISE_EINT2 0x0001 /* JD1_RISE_EINT2 */ +#define WM8285_JD1_RISE_EINT2_MASK 0x0001 /* JD1_RISE_EINT2 */ +#define WM8285_JD1_RISE_EINT2_SHIFT 0 /* JD1_RISE_EINT2 */ +#define WM8285_JD1_RISE_EINT2_WIDTH 1 /* JD1_RISE_EINT2 */ + +/* + * R6408 (0x1908) - IRQ2 Status 9 + */ +#define WM8285_ASRC2_IN2_LOCK_EINT2 0x0800 /* ASRC2_IN2_LOCK_EINT2 */ +#define WM8285_ASRC2_IN2_LOCK_EINT2_MASK 0x0800 /* ASRC2_IN2_LOCK_EINT2 */ +#define WM8285_ASRC2_IN2_LOCK_EINT2_SHIFT 11 /* ASRC2_IN2_LOCK_EINT2 */ +#define WM8285_ASRC2_IN2_LOCK_EINT2_WIDTH 1 /* ASRC2_IN2_LOCK_EINT2 */ +#define WM8285_ASRC2_IN1_LOCK_EINT2 0x0400 /* ASRC2_IN1_LOCK_EINT2 */ +#define WM8285_ASRC2_IN1_LOCK_EINT2_MASK 0x0400 /* ASRC2_IN1_LOCK_EINT2 */ +#define WM8285_ASRC2_IN1_LOCK_EINT2_SHIFT 10 /* ASRC2_IN1_LOCK_EINT2 */ +#define WM8285_ASRC2_IN1_LOCK_EINT2_WIDTH 1 /* ASRC2_IN1_LOCK_EINT2 */ +#define WM8285_ASRC1_IN2_LOCK_EINT2 0x0200 /* ASRC1_IN2_LOCK_EINT2 */ +#define WM8285_ASRC1_IN2_LOCK_EINT2_MASK 0x0200 /* ASRC1_IN2_LOCK_EINT2 */ +#define WM8285_ASRC1_IN2_LOCK_EINT2_SHIFT 9 /* ASRC1_IN2_LOCK_EINT2 */ +#define WM8285_ASRC1_IN2_LOCK_EINT2_WIDTH 1 /* ASRC1_IN2_LOCK_EINT2 */ +#define WM8285_ASRC1_IN1_LOCK_EINT2 0x0100 /* ASRC1_IN1_LOCK_EINT2 */ +#define WM8285_ASRC1_IN1_LOCK_EINT2_MASK 0x0100 /* ASRC1_IN1_LOCK_EINT2 */ +#define WM8285_ASRC1_IN1_LOCK_EINT2_SHIFT 8 /* ASRC1_IN1_LOCK_EINT2 */ +#define WM8285_ASRC1_IN1_LOCK_EINT2_WIDTH 1 /* ASRC1_IN1_LOCK_EINT2 */ +#define WM8285_DRC2_SIG_DET_EINT2 0x0002 /* DRC2_SIG_DET_EINT2 */ +#define WM8285_DRC2_SIG_DET_EINT2_MASK 0x0002 /* DRC2_SIG_DET_EINT2 */ +#define WM8285_DRC2_SIG_DET_EINT2_SHIFT 1 /* DRC2_SIG_DET_EINT2 */ +#define WM8285_DRC2_SIG_DET_EINT2_WIDTH 1 /* DRC2_SIG_DET_EINT2 */ +#define WM8285_DRC1_SIG_DET_EINT2 0x0001 /* DRC1_SIG_DET_EINT2 */ +#define WM8285_DRC1_SIG_DET_EINT2_MASK 0x0001 /* DRC1_SIG_DET_EINT2 */ +#define WM8285_DRC1_SIG_DET_EINT2_SHIFT 0 /* DRC1_SIG_DET_EINT2 */ +#define WM8285_DRC1_SIG_DET_EINT2_WIDTH 1 /* DRC1_SIG_DET_EINT2 */ + +/* + * R6410 (0x190A) - IRQ2 Status 11 + */ +#define WM8285_DSP_IRQ16_EINT2 0x8000 /* DSP_IRQ16_EINT2 */ +#define WM8285_DSP_IRQ16_EINT2_MASK 0x8000 /* DSP_IRQ16_EINT2 */ +#define WM8285_DSP_IRQ16_EINT2_SHIFT 15 /* DSP_IRQ16_EINT2 */ +#define WM8285_DSP_IRQ16_EINT2_WIDTH 1 /* DSP_IRQ16_EINT2 */ +#define WM8285_DSP_IRQ15_EINT2 0x4000 /* DSP_IRQ15_EINT2 */ +#define WM8285_DSP_IRQ15_EINT2_MASK 0x4000 /* DSP_IRQ15_EINT2 */ +#define WM8285_DSP_IRQ15_EINT2_SHIFT 14 /* DSP_IRQ15_EINT2 */ +#define WM8285_DSP_IRQ15_EINT2_WIDTH 1 /* DSP_IRQ15_EINT2 */ +#define WM8285_DSP_IRQ14_EINT2 0x2000 /* DSP_IRQ14_EINT2 */ +#define WM8285_DSP_IRQ14_EINT2_MASK 0x2000 /* DSP_IRQ14_EINT2 */ +#define WM8285_DSP_IRQ14_EINT2_SHIFT 13 /* DSP_IRQ14_EINT2 */ +#define WM8285_DSP_IRQ14_EINT2_WIDTH 1 /* DSP_IRQ14_EINT2 */ +#define WM8285_DSP_IRQ13_EINT2 0x1000 /* DSP_IRQ13_EINT2 */ +#define WM8285_DSP_IRQ13_EINT2_MASK 0x1000 /* DSP_IRQ13_EINT2 */ +#define WM8285_DSP_IRQ13_EINT2_SHIFT 12 /* DSP_IRQ13_EINT2 */ +#define WM8285_DSP_IRQ13_EINT2_WIDTH 1 /* DSP_IRQ13_EINT2 */ +#define WM8285_DSP_IRQ12_EINT2 0x0800 /* DSP_IRQ12_EINT2 */ +#define WM8285_DSP_IRQ12_EINT2_MASK 0x0800 /* DSP_IRQ12_EINT2 */ +#define WM8285_DSP_IRQ12_EINT2_SHIFT 11 /* DSP_IRQ12_EINT2 */ +#define WM8285_DSP_IRQ12_EINT2_WIDTH 1 /* DSP_IRQ12_EINT2 */ +#define WM8285_DSP_IRQ11_EINT2 0x0400 /* DSP_IRQ11_EINT2 */ +#define WM8285_DSP_IRQ11_EINT2_MASK 0x0400 /* DSP_IRQ11_EINT2 */ +#define WM8285_DSP_IRQ11_EINT2_SHIFT 10 /* DSP_IRQ11_EINT2 */ +#define WM8285_DSP_IRQ11_EINT2_WIDTH 1 /* DSP_IRQ11_EINT2 */ +#define WM8285_DSP_IRQ10_EINT2 0x0200 /* DSP_IRQ10_EINT2 */ +#define WM8285_DSP_IRQ10_EINT2_MASK 0x0200 /* DSP_IRQ10_EINT2 */ +#define WM8285_DSP_IRQ10_EINT2_SHIFT 9 /* DSP_IRQ10_EINT2 */ +#define WM8285_DSP_IRQ10_EINT2_WIDTH 1 /* DSP_IRQ10_EINT2 */ +#define WM8285_DSP_IRQ9_EINT2 0x0100 /* DSP_IRQ9_EINT2 */ +#define WM8285_DSP_IRQ9_EINT2_MASK 0x0100 /* DSP_IRQ9_EINT2 */ +#define WM8285_DSP_IRQ9_EINT2_SHIFT 8 /* DSP_IRQ9_EINT2 */ +#define WM8285_DSP_IRQ9_EINT2_WIDTH 1 /* DSP_IRQ9_EINT2 */ +#define WM8285_DSP_IRQ8_EINT2 0x0080 /* DSP_IRQ8_EINT2 */ +#define WM8285_DSP_IRQ8_EINT2_MASK 0x0080 /* DSP_IRQ8_EINT2 */ +#define WM8285_DSP_IRQ8_EINT2_SHIFT 7 /* DSP_IRQ8_EINT2 */ +#define WM8285_DSP_IRQ8_EINT2_WIDTH 1 /* DSP_IRQ8_EINT2 */ +#define WM8285_DSP_IRQ7_EINT2 0x0040 /* DSP_IRQ7_EINT2 */ +#define WM8285_DSP_IRQ7_EINT2_MASK 0x0040 /* DSP_IRQ7_EINT2 */ +#define WM8285_DSP_IRQ7_EINT2_SHIFT 6 /* DSP_IRQ7_EINT2 */ +#define WM8285_DSP_IRQ7_EINT2_WIDTH 1 /* DSP_IRQ7_EINT2 */ +#define WM8285_DSP_IRQ6_EINT2 0x0020 /* DSP_IRQ6_EINT2 */ +#define WM8285_DSP_IRQ6_EINT2_MASK 0x0020 /* DSP_IRQ6_EINT2 */ +#define WM8285_DSP_IRQ6_EINT2_SHIFT 5 /* DSP_IRQ6_EINT2 */ +#define WM8285_DSP_IRQ6_EINT2_WIDTH 1 /* DSP_IRQ6_EINT2 */ +#define WM8285_DSP_IRQ5_EINT2 0x0010 /* DSP_IRQ5_EINT2 */ +#define WM8285_DSP_IRQ5_EINT2_MASK 0x0010 /* DSP_IRQ5_EINT2 */ +#define WM8285_DSP_IRQ5_EINT2_SHIFT 4 /* DSP_IRQ5_EINT2 */ +#define WM8285_DSP_IRQ5_EINT2_WIDTH 1 /* DSP_IRQ5_EINT2 */ +#define WM8285_DSP_IRQ4_EINT2 0x0008 /* DSP_IRQ4_EINT2 */ +#define WM8285_DSP_IRQ4_EINT2_MASK 0x0008 /* DSP_IRQ4_EINT2 */ +#define WM8285_DSP_IRQ4_EINT2_SHIFT 3 /* DSP_IRQ4_EINT2 */ +#define WM8285_DSP_IRQ4_EINT2_WIDTH 1 /* DSP_IRQ4_EINT2 */ +#define WM8285_DSP_IRQ3_EINT2 0x0004 /* DSP_IRQ3_EINT2 */ +#define WM8285_DSP_IRQ3_EINT2_MASK 0x0004 /* DSP_IRQ3_EINT2 */ +#define WM8285_DSP_IRQ3_EINT2_SHIFT 2 /* DSP_IRQ3_EINT2 */ +#define WM8285_DSP_IRQ3_EINT2_WIDTH 1 /* DSP_IRQ3_EINT2 */ +#define WM8285_DSP_IRQ2_EINT2 0x0002 /* DSP_IRQ2_EINT2 */ +#define WM8285_DSP_IRQ2_EINT2_MASK 0x0002 /* DSP_IRQ2_EINT2 */ +#define WM8285_DSP_IRQ2_EINT2_SHIFT 1 /* DSP_IRQ2_EINT2 */ +#define WM8285_DSP_IRQ2_EINT2_WIDTH 1 /* DSP_IRQ2_EINT2 */ +#define WM8285_DSP_IRQ1_EINT2 0x0001 /* DSP_IRQ1_EINT2 */ +#define WM8285_DSP_IRQ1_EINT2_MASK 0x0001 /* DSP_IRQ1_EINT2 */ +#define WM8285_DSP_IRQ1_EINT2_SHIFT 0 /* DSP_IRQ1_EINT2 */ +#define WM8285_DSP_IRQ1_EINT2_WIDTH 1 /* DSP_IRQ1_EINT2 */ + +/* + * R6411 (0x190B) - IRQ2 Status 12 + */ +#define WM8285_SPKOUTR_SC_EINT2 0x0080 /* SPKOUTR_SC_EINT2 */ +#define WM8285_SPKOUTR_SC_EINT2_MASK 0x0080 /* SPKOUTR_SC_EINT2 */ +#define WM8285_SPKOUTR_SC_EINT2_SHIFT 7 /* SPKOUTR_SC_EINT2 */ +#define WM8285_SPKOUTR_SC_EINT2_WIDTH 1 /* SPKOUTR_SC_EINT2 */ +#define WM8285_SPKOUTL_SC_EINT2 0x0040 /* SPKOUTL_SC_EINT2 */ +#define WM8285_SPKOUTL_SC_EINT2_MASK 0x0040 /* SPKOUTL_SC_EINT2 */ +#define WM8285_SPKOUTL_SC_EINT2_SHIFT 6 /* SPKOUTL_SC_EINT2 */ +#define WM8285_SPKOUTL_SC_EINT2_WIDTH 1 /* SPKOUTL_SC_EINT2 */ +#define WM8285_HP3R_SC_EINT2 0x0020 /* HP3R_SC_EINT2 */ +#define WM8285_HP3R_SC_EINT2_MASK 0x0020 /* HP3R_SC_EINT2 */ +#define WM8285_HP3R_SC_EINT2_SHIFT 5 /* HP3R_SC_EINT2 */ +#define WM8285_HP3R_SC_EINT2_WIDTH 1 /* HP3R_SC_EINT2 */ +#define WM8285_HP3L_SC_EINT2 0x0010 /* HP3L_SC_EINT2 */ +#define WM8285_HP3L_SC_EINT2_MASK 0x0010 /* HP3L_SC_EINT2 */ +#define WM8285_HP3L_SC_EINT2_SHIFT 4 /* HP3L_SC_EINT2 */ +#define WM8285_HP3L_SC_EINT2_WIDTH 1 /* HP3L_SC_EINT2 */ +#define WM8285_HP2R_SC_EINT2 0x0008 /* HP2R_SC_EINT2 */ +#define WM8285_HP2R_SC_EINT2_MASK 0x0008 /* HP2R_SC_EINT2 */ +#define WM8285_HP2R_SC_EINT2_SHIFT 3 /* HP2R_SC_EINT2 */ +#define WM8285_HP2R_SC_EINT2_WIDTH 1 /* HP2R_SC_EINT2 */ +#define WM8285_HP2L_SC_EINT2 0x0004 /* HP2L_SC_EINT2 */ +#define WM8285_HP2L_SC_EINT2_MASK 0x0004 /* HP2L_SC_EINT2 */ +#define WM8285_HP2L_SC_EINT2_SHIFT 2 /* HP2L_SC_EINT2 */ +#define WM8285_HP2L_SC_EINT2_WIDTH 1 /* HP2L_SC_EINT2 */ +#define WM8285_HP1R_SC_EINT2 0x0002 /* HP1R_SC_EINT2 */ +#define WM8285_HP1R_SC_EINT2_MASK 0x0002 /* HP1R_SC_EINT2 */ +#define WM8285_HP1R_SC_EINT2_SHIFT 1 /* HP1R_SC_EINT2 */ +#define WM8285_HP1R_SC_EINT2_WIDTH 1 /* HP1R_SC_EINT2 */ +#define WM8285_HP1L_SC_EINT2 0x0001 /* HP1L_SC_EINT2 */ +#define WM8285_HP1L_SC_EINT2_MASK 0x0001 /* HP1L_SC_EINT2 */ +#define WM8285_HP1L_SC_EINT2_SHIFT 0 /* HP1L_SC_EINT2 */ +#define WM8285_HP1L_SC_EINT2_WIDTH 1 /* HP1L_SC_EINT2 */ + +/* + * R6412 (0x190C) - IRQ2 Status 13 + */ +#define WM8285_SPKOUTR_ENABLE_DONE_EINT2 0x0080 /* SPKOUTR_ENABLE_DONE_EINT2 */ +#define WM8285_SPKOUTR_ENABLE_DONE_EINT2_MASK 0x0080 /* SPKOUTR_ENABLE_DONE_EINT2 */ +#define WM8285_SPKOUTR_ENABLE_DONE_EINT2_SHIFT 7 /* SPKOUTR_ENABLE_DONE_EINT2 */ +#define WM8285_SPKOUTR_ENABLE_DONE_EINT2_WIDTH 1 /* SPKOUTR_ENABLE_DONE_EINT2 */ +#define WM8285_SPKOUTL_ENABLE_DONE_EINT2 0x0040 /* SPKOUTL_ENABLE_DONE_EINT2 */ +#define WM8285_SPKOUTL_ENABLE_DONE_EINT2_MASK 0x0040 /* SPKOUTL_ENABLE_DONE_EINT2 */ +#define WM8285_SPKOUTL_ENABLE_DONE_EINT2_SHIFT 6 /* SPKOUTL_ENABLE_DONE_EINT2 */ +#define WM8285_SPKOUTL_ENABLE_DONE_EINT2_WIDTH 1 /* SPKOUTL_ENABLE_DONE_EINT2 */ +#define WM8285_HP3R_ENABLE_DONE_EINT2 0x0020 /* HP3R_ENABLE_DONE_EINT2 */ +#define WM8285_HP3R_ENABLE_DONE_EINT2_MASK 0x0020 /* HP3R_ENABLE_DONE_EINT2 */ +#define WM8285_HP3R_ENABLE_DONE_EINT2_SHIFT 5 /* HP3R_ENABLE_DONE_EINT2 */ +#define WM8285_HP3R_ENABLE_DONE_EINT2_WIDTH 1 /* HP3R_ENABLE_DONE_EINT2 */ +#define WM8285_HP3L_ENABLE_DONE_EINT2 0x0010 /* HP3L_ENABLE_DONE_EINT2 */ +#define WM8285_HP3L_ENABLE_DONE_EINT2_MASK 0x0010 /* HP3L_ENABLE_DONE_EINT2 */ +#define WM8285_HP3L_ENABLE_DONE_EINT2_SHIFT 4 /* HP3L_ENABLE_DONE_EINT2 */ +#define WM8285_HP3L_ENABLE_DONE_EINT2_WIDTH 1 /* HP3L_ENABLE_DONE_EINT2 */ +#define WM8285_HP2R_ENABLE_DONE_EINT2 0x0008 /* HP2R_ENABLE_DONE_EINT2 */ +#define WM8285_HP2R_ENABLE_DONE_EINT2_MASK 0x0008 /* HP2R_ENABLE_DONE_EINT2 */ +#define WM8285_HP2R_ENABLE_DONE_EINT2_SHIFT 3 /* HP2R_ENABLE_DONE_EINT2 */ +#define WM8285_HP2R_ENABLE_DONE_EINT2_WIDTH 1 /* HP2R_ENABLE_DONE_EINT2 */ +#define WM8285_HP2L_ENABLE_DONE_EINT2 0x0004 /* HP2L_ENABLE_DONE_EINT2 */ +#define WM8285_HP2L_ENABLE_DONE_EINT2_MASK 0x0004 /* HP2L_ENABLE_DONE_EINT2 */ +#define WM8285_HP2L_ENABLE_DONE_EINT2_SHIFT 2 /* HP2L_ENABLE_DONE_EINT2 */ +#define WM8285_HP2L_ENABLE_DONE_EINT2_WIDTH 1 /* HP2L_ENABLE_DONE_EINT2 */ +#define WM8285_HP1R_ENABLE_DONE_EINT2 0x0002 /* HP1R_ENABLE_DONE_EINT2 */ +#define WM8285_HP1R_ENABLE_DONE_EINT2_MASK 0x0002 /* HP1R_ENABLE_DONE_EINT2 */ +#define WM8285_HP1R_ENABLE_DONE_EINT2_SHIFT 1 /* HP1R_ENABLE_DONE_EINT2 */ +#define WM8285_HP1R_ENABLE_DONE_EINT2_WIDTH 1 /* HP1R_ENABLE_DONE_EINT2 */ +#define WM8285_HP1L_ENABLE_DONE_EINT2 0x0001 /* HP1L_ENABLE_DONE_EINT2 */ +#define WM8285_HP1L_ENABLE_DONE_EINT2_MASK 0x0001 /* HP1L_ENABLE_DONE_EINT2 */ +#define WM8285_HP1L_ENABLE_DONE_EINT2_SHIFT 0 /* HP1L_ENABLE_DONE_EINT2 */ +#define WM8285_HP1L_ENABLE_DONE_EINT2_WIDTH 1 /* HP1L_ENABLE_DONE_EINT2 */ + +/* + * R6413 (0x190D) - IRQ2 Status 14 + */ +#define WM8285_SPKOUTR_DISABLE_DONE_EINT2 0x0080 /* SPKOUTR_DISABLE_DONE_EINT2 */ +#define WM8285_SPKOUTR_DISABLE_DONE_EINT2_MASK 0x0080 /* SPKOUTR_DISABLE_DONE_EINT2 */ +#define WM8285_SPKOUTR_DISABLE_DONE_EINT2_SHIFT 7 /* SPKOUTR_DISABLE_DONE_EINT2 */ +#define WM8285_SPKOUTR_DISABLE_DONE_EINT2_WIDTH 1 /* SPKOUTR_DISABLE_DONE_EINT2 */ +#define WM8285_SPKOUTL_DISABLE_DONE_EINT2 0x0040 /* SPKOUTL_DISABLE_DONE_EINT2 */ +#define WM8285_SPKOUTL_DISABLE_DONE_EINT2_MASK 0x0040 /* SPKOUTL_DISABLE_DONE_EINT2 */ +#define WM8285_SPKOUTL_DISABLE_DONE_EINT2_SHIFT 6 /* SPKOUTL_DISABLE_DONE_EINT2 */ +#define WM8285_SPKOUTL_DISABLE_DONE_EINT2_WIDTH 1 /* SPKOUTL_DISABLE_DONE_EINT2 */ +#define WM8285_HP3R_DISABLE_DONE_EINT2 0x0020 /* HP3R_DISABLE_DONE_EINT2 */ +#define WM8285_HP3R_DISABLE_DONE_EINT2_MASK 0x0020 /* HP3R_DISABLE_DONE_EINT2 */ +#define WM8285_HP3R_DISABLE_DONE_EINT2_SHIFT 5 /* HP3R_DISABLE_DONE_EINT2 */ +#define WM8285_HP3R_DISABLE_DONE_EINT2_WIDTH 1 /* HP3R_DISABLE_DONE_EINT2 */ +#define WM8285_HP3L_DISABLE_DONE_EINT2 0x0010 /* HP3L_DISABLE_DONE_EINT2 */ +#define WM8285_HP3L_DISABLE_DONE_EINT2_MASK 0x0010 /* HP3L_DISABLE_DONE_EINT2 */ +#define WM8285_HP3L_DISABLE_DONE_EINT2_SHIFT 4 /* HP3L_DISABLE_DONE_EINT2 */ +#define WM8285_HP3L_DISABLE_DONE_EINT2_WIDTH 1 /* HP3L_DISABLE_DONE_EINT2 */ +#define WM8285_HP2R_DISABLE_DONE_EINT2 0x0008 /* HP2R_DISABLE_DONE_EINT2 */ +#define WM8285_HP2R_DISABLE_DONE_EINT2_MASK 0x0008 /* HP2R_DISABLE_DONE_EINT2 */ +#define WM8285_HP2R_DISABLE_DONE_EINT2_SHIFT 3 /* HP2R_DISABLE_DONE_EINT2 */ +#define WM8285_HP2R_DISABLE_DONE_EINT2_WIDTH 1 /* HP2R_DISABLE_DONE_EINT2 */ +#define WM8285_HP2L_DISABLE_DONE_EINT2 0x0004 /* HP2L_DISABLE_DONE_EINT2 */ +#define WM8285_HP2L_DISABLE_DONE_EINT2_MASK 0x0004 /* HP2L_DISABLE_DONE_EINT2 */ +#define WM8285_HP2L_DISABLE_DONE_EINT2_SHIFT 2 /* HP2L_DISABLE_DONE_EINT2 */ +#define WM8285_HP2L_DISABLE_DONE_EINT2_WIDTH 1 /* HP2L_DISABLE_DONE_EINT2 */ +#define WM8285_HP1R_DISABLE_DONE_EINT2 0x0002 /* HP1R_DISABLE_DONE_EINT2 */ +#define WM8285_HP1R_DISABLE_DONE_EINT2_MASK 0x0002 /* HP1R_DISABLE_DONE_EINT2 */ +#define WM8285_HP1R_DISABLE_DONE_EINT2_SHIFT 1 /* HP1R_DISABLE_DONE_EINT2 */ +#define WM8285_HP1R_DISABLE_DONE_EINT2_WIDTH 1 /* HP1R_DISABLE_DONE_EINT2 */ +#define WM8285_HP1L_DISABLE_DONE_EINT2 0x0001 /* HP1L_DISABLE_DONE_EINT2 */ +#define WM8285_HP1L_DISABLE_DONE_EINT2_MASK 0x0001 /* HP1L_DISABLE_DONE_EINT2 */ +#define WM8285_HP1L_DISABLE_DONE_EINT2_SHIFT 0 /* HP1L_DISABLE_DONE_EINT2 */ +#define WM8285_HP1L_DISABLE_DONE_EINT2_WIDTH 1 /* HP1L_DISABLE_DONE_EINT2 */ + +/* + * R6414 (0x190E) - IRQ2 Status 15 + */ +#define WM8285_SPK_OVERHEAT_WARN_EINT2 0x0004 /* SPK_OVERHEAT_WARN_EINT2 */ +#define WM8285_SPK_OVERHEAT_WARN_EINT2_MASK 0x0004 /* SPK_OVERHEAT_WARN_EINT2 */ +#define WM8285_SPK_OVERHEAT_WARN_EINT2_SHIFT 2 /* SPK_OVERHEAT_WARN_EINT2 */ +#define WM8285_SPK_OVERHEAT_WARN_EINT2_WIDTH 1 /* SPK_OVERHEAT_WARN_EINT2 */ +#define WM8285_SPK_OVERHEAT_EINT2 0x0002 /* SPK_OVERHEAT_EINT2 */ +#define WM8285_SPK_OVERHEAT_EINT2_MASK 0x0002 /* SPK_OVERHEAT_EINT2 */ +#define WM8285_SPK_OVERHEAT_EINT2_SHIFT 1 /* SPK_OVERHEAT_EINT2 */ +#define WM8285_SPK_OVERHEAT_EINT2_WIDTH 1 /* SPK_OVERHEAT_EINT2 */ +#define WM8285_SPK_SHUTDOWN_EINT2 0x0001 /* SPK_SHUTDOWN_EINT2 */ +#define WM8285_SPK_SHUTDOWN_EINT2_MASK 0x0001 /* SPK_SHUTDOWN_EINT2 */ +#define WM8285_SPK_SHUTDOWN_EINT2_SHIFT 0 /* SPK_SHUTDOWN_EINT2 */ +#define WM8285_SPK_SHUTDOWN_EINT2_WIDTH 1 /* SPK_SHUTDOWN_EINT2 */ + +/* + * R6464 (0x1940) - IRQ2 Mask 1 + */ +#define WM8285_IM_DSP_SHARED_WR_COLL_EINT2 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT2 */ +#define WM8285_IM_DSP_SHARED_WR_COLL_EINT2_MASK 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT2 */ +#define WM8285_IM_DSP_SHARED_WR_COLL_EINT2_SHIFT 15 /* IM_DSP_SHARED_WR_COLL_EINT2 */ +#define WM8285_IM_DSP_SHARED_WR_COLL_EINT2_WIDTH 1 /* IM_DSP_SHARED_WR_COLL_EINT2 */ +#define WM8285_IM_CTRLIF_ERR_EINT2 0x1000 /* IM_CTRLIF_ERR_EINT2 */ +#define WM8285_IM_CTRLIF_ERR_EINT2_MASK 0x1000 /* IM_CTRLIF_ERR_EINT2 */ +#define WM8285_IM_CTRLIF_ERR_EINT2_SHIFT 12 /* IM_CTRLIF_ERR_EINT2 */ +#define WM8285_IM_CTRLIF_ERR_EINT2_WIDTH 1 /* IM_CTRLIF_ERR_EINT2 */ +#define WM8285_IM_IRQ_NO_CLOCK_EINT2 0x0200 /* IM_IRQ_NO_CLOCK_EINT2 */ +#define WM8285_IM_IRQ_NO_CLOCK_EINT2_MASK 0x0200 /* IM_IRQ_NO_CLOCK_EINT2 */ +#define WM8285_IM_IRQ_NO_CLOCK_EINT2_SHIFT 9 /* IM_IRQ_NO_CLOCK_EINT2 */ +#define WM8285_IM_IRQ_NO_CLOCK_EINT2_WIDTH 1 /* IM_IRQ_NO_CLOCK_EINT2 */ +#define WM8285_IM_CLOCK_DETECT_EINT2 0x0100 /* IM_CLOCK_DETECT_EINT2 */ +#define WM8285_IM_CLOCK_DETECT_EINT2_MASK 0x0100 /* IM_CLOCK_DETECT_EINT2 */ +#define WM8285_IM_CLOCK_DETECT_EINT2_SHIFT 8 /* IM_CLOCK_DETECT_EINT2 */ +#define WM8285_IM_CLOCK_DETECT_EINT2_WIDTH 1 /* IM_CLOCK_DETECT_EINT2 */ +#define WM8285_IM_BOOT_DONE_EINT2 0x0080 /* IM_BOOT_DONE_EINT2 */ +#define WM8285_IM_BOOT_DONE_EINT2_MASK 0x0080 /* IM_BOOT_DONE_EINT2 */ +#define WM8285_IM_BOOT_DONE_EINT2_SHIFT 7 /* IM_BOOT_DONE_EINT2 */ +#define WM8285_IM_BOOT_DONE_EINT2_WIDTH 1 /* IM_BOOT_DONE_EINT2 */ + +/* + * R6465 (0x1941) - IRQ2 Mask 2 + */ +#define WM8285_IM_FLL3_LOCK_EINT2 0x0400 /* IM_FLL3_LOCK_EINT2 */ +#define WM8285_IM_FLL3_LOCK_EINT2_MASK 0x0400 /* IM_FLL3_LOCK_EINT2 */ +#define WM8285_IM_FLL3_LOCK_EINT2_SHIFT 10 /* IM_FLL3_LOCK_EINT2 */ +#define WM8285_IM_FLL3_LOCK_EINT2_WIDTH 1 /* IM_FLL3_LOCK_EINT2 */ +#define WM8285_IM_FLL2_LOCK_EINT2 0x0200 /* IM_FLL2_LOCK_EINT2 */ +#define WM8285_IM_FLL2_LOCK_EINT2_MASK 0x0200 /* IM_FLL2_LOCK_EINT2 */ +#define WM8285_IM_FLL2_LOCK_EINT2_SHIFT 9 /* IM_FLL2_LOCK_EINT2 */ +#define WM8285_IM_FLL2_LOCK_EINT2_WIDTH 1 /* IM_FLL2_LOCK_EINT2 */ +#define WM8285_IM_FLL1_LOCK_EINT2 0x0100 /* IM_FLL1_LOCK_EINT2 */ +#define WM8285_IM_FLL1_LOCK_EINT2_MASK 0x0100 /* IM_FLL1_LOCK_EINT2 */ +#define WM8285_IM_FLL1_LOCK_EINT2_SHIFT 8 /* IM_FLL1_LOCK_EINT2 */ +#define WM8285_IM_FLL1_LOCK_EINT2_WIDTH 1 /* IM_FLL1_LOCK_EINT2 */ + +/* + * R6469 (0x1945) - IRQ2 Mask 6 + */ +#define WM8285_IM_MICDET_EINT2 0x0100 /* IM_MICDET_EINT2 */ +#define WM8285_IM_MICDET_EINT2_MASK 0x0100 /* IM_MICDET_EINT2 */ +#define WM8285_IM_MICDET_EINT2_SHIFT 8 /* IM_MICDET_EINT2 */ +#define WM8285_IM_MICDET_EINT2_WIDTH 1 /* IM_MICDET_EINT2 */ +#define WM8285_IM_HPDET_EINT2 0x0001 /* IM_HPDET_EINT2 */ +#define WM8285_IM_HPDET_EINT2_MASK 0x0001 /* IM_HPDET_EINT2 */ +#define WM8285_IM_HPDET_EINT2_SHIFT 0 /* IM_HPDET_EINT2 */ +#define WM8285_IM_HPDET_EINT2_WIDTH 1 /* IM_HPDET_EINT2 */ + +/* + * R6470 (0x1946) - IRQ2 Mask 7 + */ +#define WM8285_IM_MICD_CLAMP_FALL_EINT2 0x0020 /* IM_MICD_CLAMP_FALL_EINT2 */ +#define WM8285_IM_MICD_CLAMP_FALL_EINT2_MASK 0x0020 /* IM_MICD_CLAMP_FALL_EINT2 */ +#define WM8285_IM_MICD_CLAMP_FALL_EINT2_SHIFT 5 /* IM_MICD_CLAMP_FALL_EINT2 */ +#define WM8285_IM_MICD_CLAMP_FALL_EINT2_WIDTH 1 /* IM_MICD_CLAMP_FALL_EINT2 */ +#define WM8285_IM_MICD_CLAMP_RISE_EINT2 0x0010 /* IM_MICD_CLAMP_RISE_EINT2 */ +#define WM8285_IM_MICD_CLAMP_RISE_EINT2_MASK 0x0010 /* IM_MICD_CLAMP_RISE_EINT2 */ +#define WM8285_IM_MICD_CLAMP_RISE_EINT2_SHIFT 4 /* IM_MICD_CLAMP_RISE_EINT2 */ +#define WM8285_IM_MICD_CLAMP_RISE_EINT2_WIDTH 1 /* IM_MICD_CLAMP_RISE_EINT2 */ +#define WM8285_IM_JD2_FALL_EINT2 0x0008 /* IM_JD2_FALL_EINT2 */ +#define WM8285_IM_JD2_FALL_EINT2_MASK 0x0008 /* IM_JD2_FALL_EINT2 */ +#define WM8285_IM_JD2_FALL_EINT2_SHIFT 3 /* IM_JD2_FALL_EINT2 */ +#define WM8285_IM_JD2_FALL_EINT2_WIDTH 1 /* IM_JD2_FALL_EINT2 */ +#define WM8285_IM_JD2_RISE_EINT2 0x0004 /* IM_JD2_RISE_EINT2 */ +#define WM8285_IM_JD2_RISE_EINT2_MASK 0x0004 /* IM_JD2_RISE_EINT2 */ +#define WM8285_IM_JD2_RISE_EINT2_SHIFT 2 /* IM_JD2_RISE_EINT2 */ +#define WM8285_IM_JD2_RISE_EINT2_WIDTH 1 /* IM_JD2_RISE_EINT2 */ +#define WM8285_IM_JD1_FALL_EINT2 0x0002 /* IM_JD1_FALL_EINT2 */ +#define WM8285_IM_JD1_FALL_EINT2_MASK 0x0002 /* IM_JD1_FALL_EINT2 */ +#define WM8285_IM_JD1_FALL_EINT2_SHIFT 1 /* IM_JD1_FALL_EINT2 */ +#define WM8285_IM_JD1_FALL_EINT2_WIDTH 1 /* IM_JD1_FALL_EINT2 */ +#define WM8285_IM_JD1_RISE_EINT2 0x0001 /* IM_JD1_RISE_EINT2 */ +#define WM8285_IM_JD1_RISE_EINT2_MASK 0x0001 /* IM_JD1_RISE_EINT2 */ +#define WM8285_IM_JD1_RISE_EINT2_SHIFT 0 /* IM_JD1_RISE_EINT2 */ +#define WM8285_IM_JD1_RISE_EINT2_WIDTH 1 /* IM_JD1_RISE_EINT2 */ + +/* + * R6472 (0x1948) - IRQ2 Mask 9 + */ +#define WM8285_IM_ASRC2_IN2_LOCK_EINT2 0x0800 /* IM_ASRC2_IN2_LOCK_EINT2 */ +#define WM8285_IM_ASRC2_IN2_LOCK_EINT2_MASK 0x0800 /* IM_ASRC2_IN2_LOCK_EINT2 */ +#define WM8285_IM_ASRC2_IN2_LOCK_EINT2_SHIFT 11 /* IM_ASRC2_IN2_LOCK_EINT2 */ +#define WM8285_IM_ASRC2_IN2_LOCK_EINT2_WIDTH 1 /* IM_ASRC2_IN2_LOCK_EINT2 */ +#define WM8285_IM_ASRC2_IN1_LOCK_EINT2 0x0400 /* IM_ASRC2_IN1_LOCK_EINT2 */ +#define WM8285_IM_ASRC2_IN1_LOCK_EINT2_MASK 0x0400 /* IM_ASRC2_IN1_LOCK_EINT2 */ +#define WM8285_IM_ASRC2_IN1_LOCK_EINT2_SHIFT 10 /* IM_ASRC2_IN1_LOCK_EINT2 */ +#define WM8285_IM_ASRC2_IN1_LOCK_EINT2_WIDTH 1 /* IM_ASRC2_IN1_LOCK_EINT2 */ +#define WM8285_IM_ASRC1_IN2_LOCK_EINT2 0x0200 /* IM_ASRC1_IN2_LOCK_EINT2 */ +#define WM8285_IM_ASRC1_IN2_LOCK_EINT2_MASK 0x0200 /* IM_ASRC1_IN2_LOCK_EINT2 */ +#define WM8285_IM_ASRC1_IN2_LOCK_EINT2_SHIFT 9 /* IM_ASRC1_IN2_LOCK_EINT2 */ +#define WM8285_IM_ASRC1_IN2_LOCK_EINT2_WIDTH 1 /* IM_ASRC1_IN2_LOCK_EINT2 */ +#define WM8285_IM_ASRC1_IN1_LOCK_EINT2 0x0100 /* IM_ASRC1_IN1_LOCK_EINT2 */ +#define WM8285_IM_ASRC1_IN1_LOCK_EINT2_MASK 0x0100 /* IM_ASRC1_IN1_LOCK_EINT2 */ +#define WM8285_IM_ASRC1_IN1_LOCK_EINT2_SHIFT 8 /* IM_ASRC1_IN1_LOCK_EINT2 */ +#define WM8285_IM_ASRC1_IN1_LOCK_EINT2_WIDTH 1 /* IM_ASRC1_IN1_LOCK_EINT2 */ +#define WM8285_IM_DRC2_SIG_DET_EINT2 0x0002 /* IM_DRC2_SIG_DET_EINT2 */ +#define WM8285_IM_DRC2_SIG_DET_EINT2_MASK 0x0002 /* IM_DRC2_SIG_DET_EINT2 */ +#define WM8285_IM_DRC2_SIG_DET_EINT2_SHIFT 1 /* IM_DRC2_SIG_DET_EINT2 */ +#define WM8285_IM_DRC2_SIG_DET_EINT2_WIDTH 1 /* IM_DRC2_SIG_DET_EINT2 */ +#define WM8285_IM_DRC1_SIG_DET_EINT2 0x0001 /* IM_DRC1_SIG_DET_EINT2 */ +#define WM8285_IM_DRC1_SIG_DET_EINT2_MASK 0x0001 /* IM_DRC1_SIG_DET_EINT2 */ +#define WM8285_IM_DRC1_SIG_DET_EINT2_SHIFT 0 /* IM_DRC1_SIG_DET_EINT2 */ +#define WM8285_IM_DRC1_SIG_DET_EINT2_WIDTH 1 /* IM_DRC1_SIG_DET_EINT2 */ + +/* + * R6474 (0x194A) - IRQ2 Mask 11 + */ +#define WM8285_IM_DSP_IRQ16_EINT2 0x8000 /* IM_DSP_IRQ16_EINT2 */ +#define WM8285_IM_DSP_IRQ16_EINT2_MASK 0x8000 /* IM_DSP_IRQ16_EINT2 */ +#define WM8285_IM_DSP_IRQ16_EINT2_SHIFT 15 /* IM_DSP_IRQ16_EINT2 */ +#define WM8285_IM_DSP_IRQ16_EINT2_WIDTH 1 /* IM_DSP_IRQ16_EINT2 */ +#define WM8285_IM_DSP_IRQ15_EINT2 0x4000 /* IM_DSP_IRQ15_EINT2 */ +#define WM8285_IM_DSP_IRQ15_EINT2_MASK 0x4000 /* IM_DSP_IRQ15_EINT2 */ +#define WM8285_IM_DSP_IRQ15_EINT2_SHIFT 14 /* IM_DSP_IRQ15_EINT2 */ +#define WM8285_IM_DSP_IRQ15_EINT2_WIDTH 1 /* IM_DSP_IRQ15_EINT2 */ +#define WM8285_IM_DSP_IRQ14_EINT2 0x2000 /* IM_DSP_IRQ14_EINT2 */ +#define WM8285_IM_DSP_IRQ14_EINT2_MASK 0x2000 /* IM_DSP_IRQ14_EINT2 */ +#define WM8285_IM_DSP_IRQ14_EINT2_SHIFT 13 /* IM_DSP_IRQ14_EINT2 */ +#define WM8285_IM_DSP_IRQ14_EINT2_WIDTH 1 /* IM_DSP_IRQ14_EINT2 */ +#define WM8285_IM_DSP_IRQ13_EINT2 0x1000 /* IM_DSP_IRQ13_EINT2 */ +#define WM8285_IM_DSP_IRQ13_EINT2_MASK 0x1000 /* IM_DSP_IRQ13_EINT2 */ +#define WM8285_IM_DSP_IRQ13_EINT2_SHIFT 12 /* IM_DSP_IRQ13_EINT2 */ +#define WM8285_IM_DSP_IRQ13_EINT2_WIDTH 1 /* IM_DSP_IRQ13_EINT2 */ +#define WM8285_IM_DSP_IRQ12_EINT2 0x0800 /* IM_DSP_IRQ12_EINT2 */ +#define WM8285_IM_DSP_IRQ12_EINT2_MASK 0x0800 /* IM_DSP_IRQ12_EINT2 */ +#define WM8285_IM_DSP_IRQ12_EINT2_SHIFT 11 /* IM_DSP_IRQ12_EINT2 */ +#define WM8285_IM_DSP_IRQ12_EINT2_WIDTH 1 /* IM_DSP_IRQ12_EINT2 */ +#define WM8285_IM_DSP_IRQ11_EINT2 0x0400 /* IM_DSP_IRQ11_EINT2 */ +#define WM8285_IM_DSP_IRQ11_EINT2_MASK 0x0400 /* IM_DSP_IRQ11_EINT2 */ +#define WM8285_IM_DSP_IRQ11_EINT2_SHIFT 10 /* IM_DSP_IRQ11_EINT2 */ +#define WM8285_IM_DSP_IRQ11_EINT2_WIDTH 1 /* IM_DSP_IRQ11_EINT2 */ +#define WM8285_IM_DSP_IRQ10_EINT2 0x0200 /* IM_DSP_IRQ10_EINT2 */ +#define WM8285_IM_DSP_IRQ10_EINT2_MASK 0x0200 /* IM_DSP_IRQ10_EINT2 */ +#define WM8285_IM_DSP_IRQ10_EINT2_SHIFT 9 /* IM_DSP_IRQ10_EINT2 */ +#define WM8285_IM_DSP_IRQ10_EINT2_WIDTH 1 /* IM_DSP_IRQ10_EINT2 */ +#define WM8285_IM_DSP_IRQ9_EINT2 0x0100 /* IM_DSP_IRQ9_EINT2 */ +#define WM8285_IM_DSP_IRQ9_EINT2_MASK 0x0100 /* IM_DSP_IRQ9_EINT2 */ +#define WM8285_IM_DSP_IRQ9_EINT2_SHIFT 8 /* IM_DSP_IRQ9_EINT2 */ +#define WM8285_IM_DSP_IRQ9_EINT2_WIDTH 1 /* IM_DSP_IRQ9_EINT2 */ +#define WM8285_IM_DSP_IRQ8_EINT2 0x0080 /* IM_DSP_IRQ8_EINT2 */ +#define WM8285_IM_DSP_IRQ8_EINT2_MASK 0x0080 /* IM_DSP_IRQ8_EINT2 */ +#define WM8285_IM_DSP_IRQ8_EINT2_SHIFT 7 /* IM_DSP_IRQ8_EINT2 */ +#define WM8285_IM_DSP_IRQ8_EINT2_WIDTH 1 /* IM_DSP_IRQ8_EINT2 */ +#define WM8285_IM_DSP_IRQ7_EINT2 0x0040 /* IM_DSP_IRQ7_EINT2 */ +#define WM8285_IM_DSP_IRQ7_EINT2_MASK 0x0040 /* IM_DSP_IRQ7_EINT2 */ +#define WM8285_IM_DSP_IRQ7_EINT2_SHIFT 6 /* IM_DSP_IRQ7_EINT2 */ +#define WM8285_IM_DSP_IRQ7_EINT2_WIDTH 1 /* IM_DSP_IRQ7_EINT2 */ +#define WM8285_IM_DSP_IRQ6_EINT2 0x0020 /* IM_DSP_IRQ6_EINT2 */ +#define WM8285_IM_DSP_IRQ6_EINT2_MASK 0x0020 /* IM_DSP_IRQ6_EINT2 */ +#define WM8285_IM_DSP_IRQ6_EINT2_SHIFT 5 /* IM_DSP_IRQ6_EINT2 */ +#define WM8285_IM_DSP_IRQ6_EINT2_WIDTH 1 /* IM_DSP_IRQ6_EINT2 */ +#define WM8285_IM_DSP_IRQ5_EINT2 0x0010 /* IM_DSP_IRQ5_EINT2 */ +#define WM8285_IM_DSP_IRQ5_EINT2_MASK 0x0010 /* IM_DSP_IRQ5_EINT2 */ +#define WM8285_IM_DSP_IRQ5_EINT2_SHIFT 4 /* IM_DSP_IRQ5_EINT2 */ +#define WM8285_IM_DSP_IRQ5_EINT2_WIDTH 1 /* IM_DSP_IRQ5_EINT2 */ +#define WM8285_IM_DSP_IRQ4_EINT2 0x0008 /* IM_DSP_IRQ4_EINT2 */ +#define WM8285_IM_DSP_IRQ4_EINT2_MASK 0x0008 /* IM_DSP_IRQ4_EINT2 */ +#define WM8285_IM_DSP_IRQ4_EINT2_SHIFT 3 /* IM_DSP_IRQ4_EINT2 */ +#define WM8285_IM_DSP_IRQ4_EINT2_WIDTH 1 /* IM_DSP_IRQ4_EINT2 */ +#define WM8285_IM_DSP_IRQ3_EINT2 0x0004 /* IM_DSP_IRQ3_EINT2 */ +#define WM8285_IM_DSP_IRQ3_EINT2_MASK 0x0004 /* IM_DSP_IRQ3_EINT2 */ +#define WM8285_IM_DSP_IRQ3_EINT2_SHIFT 2 /* IM_DSP_IRQ3_EINT2 */ +#define WM8285_IM_DSP_IRQ3_EINT2_WIDTH 1 /* IM_DSP_IRQ3_EINT2 */ +#define WM8285_IM_DSP_IRQ2_EINT2 0x0002 /* IM_DSP_IRQ2_EINT2 */ +#define WM8285_IM_DSP_IRQ2_EINT2_MASK 0x0002 /* IM_DSP_IRQ2_EINT2 */ +#define WM8285_IM_DSP_IRQ2_EINT2_SHIFT 1 /* IM_DSP_IRQ2_EINT2 */ +#define WM8285_IM_DSP_IRQ2_EINT2_WIDTH 1 /* IM_DSP_IRQ2_EINT2 */ +#define WM8285_IM_DSP_IRQ1_EINT2 0x0001 /* IM_DSP_IRQ1_EINT2 */ +#define WM8285_IM_DSP_IRQ1_EINT2_MASK 0x0001 /* IM_DSP_IRQ1_EINT2 */ +#define WM8285_IM_DSP_IRQ1_EINT2_SHIFT 0 /* IM_DSP_IRQ1_EINT2 */ +#define WM8285_IM_DSP_IRQ1_EINT2_WIDTH 1 /* IM_DSP_IRQ1_EINT2 */ + +/* + * R6272 (0x1880) - IRQ1 Raw Status 1 + */ +#define WM8285_DSP_SHARED_WR_COLL_STS1 0x8000 /* DSP_SHARED_WR_COLL_STS1 */ +#define WM8285_DSP_SHARED_WR_COLL_STS1_MASK 0x8000 /* DSP_SHARED_WR_COLL_STS1 */ +#define WM8285_DSP_SHARED_WR_COLL_STS1_SHIFT 15 /* DSP_SHARED_WR_COLL_STS1 */ +#define WM8285_DSP_SHARED_WR_COLL_STS1_WIDTH 1 /* DSP_SHARED_WR_COLL_STS1 */ +#define WM8285_CTRLIF_ERR_STS1 0x1000 /* CTRLIF_ERR_STS1 */ +#define WM8285_CTRLIF_ERR_STS1_MASK 0x1000 /* CTRLIF_ERR_STS1 */ +#define WM8285_CTRLIF_ERR_STS1_SHIFT 12 /* CTRLIF_ERR_STS1 */ +#define WM8285_CTRLIF_ERR_STS1_WIDTH 1 /* CTRLIF_ERR_STS1 */ +#define WM8285_IRQ_NO_CLOCK_STS1 0x0200 /* IRQ_NO_CLOCK_STS1 */ +#define WM8285_IRQ_NO_CLOCK_STS1_MASK 0x0200 /* IRQ_NO_CLOCK_STS1 */ +#define WM8285_IRQ_NO_CLOCK_STS1_SHIFT 9 /* IRQ_NO_CLOCK_STS1 */ +#define WM8285_IRQ_NO_CLOCK_STS1_WIDTH 1 /* IRQ_NO_CLOCK_STS1 */ +#define WM8285_CLOCK_DETECT_STS1 0x0100 /* CLOCK_DETECT_STS1 */ +#define WM8285_CLOCK_DETECT_STS1_MASK 0x0100 /* CLOCK_DETECT_STS1 */ +#define WM8285_CLOCK_DETECT_STS1_SHIFT 8 /* CLOCK_DETECT_STS1 */ +#define WM8285_CLOCK_DETECT_STS1_WIDTH 1 /* CLOCK_DETECT_STS1 */ +#define WM8285_BOOT_DONE_STS1 0x0080 /* BOOT_DONE_STS1 */ +#define WM8285_BOOT_DONE_STS1_MASK 0x0080 /* BOOT_DONE_STS1 */ +#define WM8285_BOOT_DONE_STS1_SHIFT 7 /* BOOT_DONE_STS1 */ +#define WM8285_BOOT_DONE_STS1_WIDTH 1 /* BOOT_DONE_STS1 */ + +/* + * R6273 (0x1881) - IRQ1 Raw Status 2 + */ +#define WM8285_FLL3_LOCK_STS1 0x0400 /* FLL3_LOCK_STS1 */ +#define WM8285_FLL3_LOCK_STS1_MASK 0x0400 /* FLL3_LOCK_STS1 */ +#define WM8285_FLL3_LOCK_STS1_SHIFT 10 /* FLL3_LOCK_STS1 */ +#define WM8285_FLL3_LOCK_STS1_WIDTH 1 /* FLL3_LOCK_STS1 */ +#define WM8285_FLL2_LOCK_STS1 0x0200 /* FLL2_LOCK_STS1 */ +#define WM8285_FLL2_LOCK_STS1_MASK 0x0200 /* FLL2_LOCK_STS1 */ +#define WM8285_FLL2_LOCK_STS1_SHIFT 9 /* FLL2_LOCK_STS1 */ +#define WM8285_FLL2_LOCK_STS1_WIDTH 1 /* FLL2_LOCK_STS1 */ +#define WM8285_FLL1_LOCK_STS1 0x0100 /* FLL1_LOCK_STS1 */ +#define WM8285_FLL1_LOCK_STS1_MASK 0x0100 /* FLL1_LOCK_STS1 */ +#define WM8285_FLL1_LOCK_STS1_SHIFT 8 /* FLL1_LOCK_STS1 */ +#define WM8285_FLL1_LOCK_STS1_WIDTH 1 /* FLL1_LOCK_STS1 */ + +/* + * R6277 (0x1885) - IRQ1 Raw Status 6 + */ +#define WM8285_MICDET_STS1 0x0100 /* MICDET_STS1 */ +#define WM8285_MICDET_STS1_MASK 0x0100 /* MICDET_STS1 */ +#define WM8285_MICDET_STS1_SHIFT 8 /* MICDET_STS1 */ +#define WM8285_MICDET_STS1_WIDTH 1 /* MICDET_STS1 */ +#define WM8285_HPDET_STS1 0x0001 /* HPDET_STS1 */ +#define WM8285_HPDET_STS1_MASK 0x0001 /* HPDET_STS1 */ +#define WM8285_HPDET_STS1_SHIFT 0 /* HPDET_STS1 */ +#define WM8285_HPDET_STS1_WIDTH 1 /* HPDET_STS1 */ + +/* + * R6278 (0x1886) - IRQ1 Raw Status 7 + */ +#define WM8285_MICD_CLAMP_FALL_STS1 0x0020 /* MICD_CLAMP_FALL_STS1 */ +#define WM8285_MICD_CLAMP_FALL_STS1_MASK 0x0020 /* MICD_CLAMP_FALL_STS1 */ +#define WM8285_MICD_CLAMP_FALL_STS1_SHIFT 5 /* MICD_CLAMP_FALL_STS1 */ +#define WM8285_MICD_CLAMP_FALL_STS1_WIDTH 1 /* MICD_CLAMP_FALL_STS1 */ +#define WM8285_MICD_CLAMP_RISE_STS1 0x0010 /* MICD_CLAMP_RISE_STS1 */ +#define WM8285_MICD_CLAMP_RISE_STS1_MASK 0x0010 /* MICD_CLAMP_RISE_STS1 */ +#define WM8285_MICD_CLAMP_RISE_STS1_SHIFT 4 /* MICD_CLAMP_RISE_STS1 */ +#define WM8285_MICD_CLAMP_RISE_STS1_WIDTH 1 /* MICD_CLAMP_RISE_STS1 */ +#define WM8285_JD2_FALL_STS1 0x0008 /* JD2_FALL_STS1 */ +#define WM8285_JD2_FALL_STS1_MASK 0x0008 /* JD2_FALL_STS1 */ +#define WM8285_JD2_FALL_STS1_SHIFT 3 /* JD2_FALL_STS1 */ +#define WM8285_JD2_FALL_STS1_WIDTH 1 /* JD2_FALL_STS1 */ +#define WM8285_JD2_RISE_STS1 0x0004 /* JD2_RISE_STS1 */ +#define WM8285_JD2_RISE_STS1_MASK 0x0004 /* JD2_RISE_STS1 */ +#define WM8285_JD2_RISE_STS1_SHIFT 2 /* JD2_RISE_STS1 */ +#define WM8285_JD2_RISE_STS1_WIDTH 1 /* JD2_RISE_STS1 */ +#define WM8285_JD1_FALL_STS1 0x0002 /* JD1_FALL_STS1 */ +#define WM8285_JD1_FALL_STS1_MASK 0x0002 /* JD1_FALL_STS1 */ +#define WM8285_JD1_FALL_STS1_SHIFT 1 /* JD1_FALL_STS1 */ +#define WM8285_JD1_FALL_STS1_WIDTH 1 /* JD1_FALL_STS1 */ +#define WM8285_JD1_RISE_STS1 0x0001 /* JD1_RISE_STS1 */ +#define WM8285_JD1_RISE_STS1_MASK 0x0001 /* JD1_RISE_STS1 */ +#define WM8285_JD1_RISE_STS1_SHIFT 0 /* JD1_RISE_STS1 */ +#define WM8285_JD1_RISE_STS1_WIDTH 1 /* JD1_RISE_STS1 */ + +/* + * R6280 (0x1888) - IRQ1 Raw Status 9 + */ +#define WM8285_ASRC2_IN2_LOCK_STS1 0x0800 /* ASRC2_IN2_LOCK_STS1 */ +#define WM8285_ASRC2_IN2_LOCK_STS1_MASK 0x0800 /* ASRC2_IN2_LOCK_STS1 */ +#define WM8285_ASRC2_IN2_LOCK_STS1_SHIFT 11 /* ASRC2_IN2_LOCK_STS1 */ +#define WM8285_ASRC2_IN2_LOCK_STS1_WIDTH 1 /* ASRC2_IN2_LOCK_STS1 */ +#define WM8285_ASRC2_IN1_LOCK_STS1 0x0400 /* ASRC2_IN1_LOCK_STS1 */ +#define WM8285_ASRC2_IN1_LOCK_STS1_MASK 0x0400 /* ASRC2_IN1_LOCK_STS1 */ +#define WM8285_ASRC2_IN1_LOCK_STS1_SHIFT 10 /* ASRC2_IN1_LOCK_STS1 */ +#define WM8285_ASRC2_IN1_LOCK_STS1_WIDTH 1 /* ASRC2_IN1_LOCK_STS1 */ +#define WM8285_ASRC1_IN2_LOCK_STS1 0x0200 /* ASRC1_IN2_LOCK_STS1 */ +#define WM8285_ASRC1_IN2_LOCK_STS1_MASK 0x0200 /* ASRC1_IN2_LOCK_STS1 */ +#define WM8285_ASRC1_IN2_LOCK_STS1_SHIFT 9 /* ASRC1_IN2_LOCK_STS1 */ +#define WM8285_ASRC1_IN2_LOCK_STS1_WIDTH 1 /* ASRC1_IN2_LOCK_STS1 */ +#define WM8285_ASRC1_IN1_LOCK_STS1 0x0100 /* ASRC1_IN1_LOCK_STS1 */ +#define WM8285_ASRC1_IN1_LOCK_STS1_MASK 0x0100 /* ASRC1_IN1_LOCK_STS1 */ +#define WM8285_ASRC1_IN1_LOCK_STS1_SHIFT 8 /* ASRC1_IN1_LOCK_STS1 */ +#define WM8285_ASRC1_IN1_LOCK_STS1_WIDTH 1 /* ASRC1_IN1_LOCK_STS1 */ +#define WM8285_DRC2_SIG_DET_STS1 0x0002 /* DRC2_SIG_DET_STS1 */ +#define WM8285_DRC2_SIG_DET_STS1_MASK 0x0002 /* DRC2_SIG_DET_STS1 */ +#define WM8285_DRC2_SIG_DET_STS1_SHIFT 1 /* DRC2_SIG_DET_STS1 */ +#define WM8285_DRC2_SIG_DET_STS1_WIDTH 1 /* DRC2_SIG_DET_STS1 */ +#define WM8285_DRC1_SIG_DET_STS1 0x0001 /* DRC1_SIG_DET_STS1 */ +#define WM8285_DRC1_SIG_DET_STS1_MASK 0x0001 /* DRC1_SIG_DET_STS1 */ +#define WM8285_DRC1_SIG_DET_STS1_SHIFT 0 /* DRC1_SIG_DET_STS1 */ +#define WM8285_DRC1_SIG_DET_STS1_WIDTH 1 /* DRC1_SIG_DET_STS1 */ + +/* + * R6282 (0x188A) - IRQ1 Raw Status 11 + */ +#define WM8285_DSP_IRQ16_STS1 0x8000 /* DSP_IRQ16_STS1 */ +#define WM8285_DSP_IRQ16_STS1_MASK 0x8000 /* DSP_IRQ16_STS1 */ +#define WM8285_DSP_IRQ16_STS1_SHIFT 15 /* DSP_IRQ16_STS1 */ +#define WM8285_DSP_IRQ16_STS1_WIDTH 1 /* DSP_IRQ16_STS1 */ +#define WM8285_DSP_IRQ15_STS1 0x4000 /* DSP_IRQ15_STS1 */ +#define WM8285_DSP_IRQ15_STS1_MASK 0x4000 /* DSP_IRQ15_STS1 */ +#define WM8285_DSP_IRQ15_STS1_SHIFT 14 /* DSP_IRQ15_STS1 */ +#define WM8285_DSP_IRQ15_STS1_WIDTH 1 /* DSP_IRQ15_STS1 */ +#define WM8285_DSP_IRQ14_STS1 0x2000 /* DSP_IRQ14_STS1 */ +#define WM8285_DSP_IRQ14_STS1_MASK 0x2000 /* DSP_IRQ14_STS1 */ +#define WM8285_DSP_IRQ14_STS1_SHIFT 13 /* DSP_IRQ14_STS1 */ +#define WM8285_DSP_IRQ14_STS1_WIDTH 1 /* DSP_IRQ14_STS1 */ +#define WM8285_DSP_IRQ13_STS1 0x1000 /* DSP_IRQ13_STS1 */ +#define WM8285_DSP_IRQ13_STS1_MASK 0x1000 /* DSP_IRQ13_STS1 */ +#define WM8285_DSP_IRQ13_STS1_SHIFT 12 /* DSP_IRQ13_STS1 */ +#define WM8285_DSP_IRQ13_STS1_WIDTH 1 /* DSP_IRQ13_STS1 */ +#define WM8285_DSP_IRQ12_STS1 0x0800 /* DSP_IRQ12_STS1 */ +#define WM8285_DSP_IRQ12_STS1_MASK 0x0800 /* DSP_IRQ12_STS1 */ +#define WM8285_DSP_IRQ12_STS1_SHIFT 11 /* DSP_IRQ12_STS1 */ +#define WM8285_DSP_IRQ12_STS1_WIDTH 1 /* DSP_IRQ12_STS1 */ +#define WM8285_DSP_IRQ11_STS1 0x0400 /* DSP_IRQ11_STS1 */ +#define WM8285_DSP_IRQ11_STS1_MASK 0x0400 /* DSP_IRQ11_STS1 */ +#define WM8285_DSP_IRQ11_STS1_SHIFT 10 /* DSP_IRQ11_STS1 */ +#define WM8285_DSP_IRQ11_STS1_WIDTH 1 /* DSP_IRQ11_STS1 */ +#define WM8285_DSP_IRQ10_STS1 0x0200 /* DSP_IRQ10_STS1 */ +#define WM8285_DSP_IRQ10_STS1_MASK 0x0200 /* DSP_IRQ10_STS1 */ +#define WM8285_DSP_IRQ10_STS1_SHIFT 9 /* DSP_IRQ10_STS1 */ +#define WM8285_DSP_IRQ10_STS1_WIDTH 1 /* DSP_IRQ10_STS1 */ +#define WM8285_DSP_IRQ9_STS1 0x0100 /* DSP_IRQ9_STS1 */ +#define WM8285_DSP_IRQ9_STS1_MASK 0x0100 /* DSP_IRQ9_STS1 */ +#define WM8285_DSP_IRQ9_STS1_SHIFT 8 /* DSP_IRQ9_STS1 */ +#define WM8285_DSP_IRQ9_STS1_WIDTH 1 /* DSP_IRQ9_STS1 */ +#define WM8285_DSP_IRQ8_STS1 0x0080 /* DSP_IRQ8_STS1 */ +#define WM8285_DSP_IRQ8_STS1_MASK 0x0080 /* DSP_IRQ8_STS1 */ +#define WM8285_DSP_IRQ8_STS1_SHIFT 7 /* DSP_IRQ8_STS1 */ +#define WM8285_DSP_IRQ8_STS1_WIDTH 1 /* DSP_IRQ8_STS1 */ +#define WM8285_DSP_IRQ7_STS1 0x0040 /* DSP_IRQ7_STS1 */ +#define WM8285_DSP_IRQ7_STS1_MASK 0x0040 /* DSP_IRQ7_STS1 */ +#define WM8285_DSP_IRQ7_STS1_SHIFT 6 /* DSP_IRQ7_STS1 */ +#define WM8285_DSP_IRQ7_STS1_WIDTH 1 /* DSP_IRQ7_STS1 */ +#define WM8285_DSP_IRQ6_STS1 0x0020 /* DSP_IRQ6_STS1 */ +#define WM8285_DSP_IRQ6_STS1_MASK 0x0020 /* DSP_IRQ6_STS1 */ +#define WM8285_DSP_IRQ6_STS1_SHIFT 5 /* DSP_IRQ6_STS1 */ +#define WM8285_DSP_IRQ6_STS1_WIDTH 1 /* DSP_IRQ6_STS1 */ +#define WM8285_DSP_IRQ5_STS1 0x0010 /* DSP_IRQ5_STS1 */ +#define WM8285_DSP_IRQ5_STS1_MASK 0x0010 /* DSP_IRQ5_STS1 */ +#define WM8285_DSP_IRQ5_STS1_SHIFT 4 /* DSP_IRQ5_STS1 */ +#define WM8285_DSP_IRQ5_STS1_WIDTH 1 /* DSP_IRQ5_STS1 */ +#define WM8285_DSP_IRQ4_STS1 0x0008 /* DSP_IRQ4_STS1 */ +#define WM8285_DSP_IRQ4_STS1_MASK 0x0008 /* DSP_IRQ4_STS1 */ +#define WM8285_DSP_IRQ4_STS1_SHIFT 3 /* DSP_IRQ4_STS1 */ +#define WM8285_DSP_IRQ4_STS1_WIDTH 1 /* DSP_IRQ4_STS1 */ +#define WM8285_DSP_IRQ3_STS1 0x0004 /* DSP_IRQ3_STS1 */ +#define WM8285_DSP_IRQ3_STS1_MASK 0x0004 /* DSP_IRQ3_STS1 */ +#define WM8285_DSP_IRQ3_STS1_SHIFT 2 /* DSP_IRQ3_STS1 */ +#define WM8285_DSP_IRQ3_STS1_WIDTH 1 /* DSP_IRQ3_STS1 */ +#define WM8285_DSP_IRQ2_STS1 0x0002 /* DSP_IRQ2_STS1 */ +#define WM8285_DSP_IRQ2_STS1_MASK 0x0002 /* DSP_IRQ2_STS1 */ +#define WM8285_DSP_IRQ2_STS1_SHIFT 1 /* DSP_IRQ2_STS1 */ +#define WM8285_DSP_IRQ2_STS1_WIDTH 1 /* DSP_IRQ2_STS1 */ +#define WM8285_DSP_IRQ1_STS1 0x0001 /* DSP_IRQ1_STS1 */ +#define WM8285_DSP_IRQ1_STS1_MASK 0x0001 /* DSP_IRQ1_STS1 */ +#define WM8285_DSP_IRQ1_STS1_SHIFT 0 /* DSP_IRQ1_STS1 */ +#define WM8285_DSP_IRQ1_STS1_WIDTH 1 /* DSP_IRQ1_STS1 */ + + +/* + * R6283 (0x188B) - IRQ1 Raw Status 12 + */ +#define WM8285_SPKOUTR_SC_STS1 0x0080 /* SPKOUTR_SC_STS1 */ +#define WM8285_SPKOUTR_SC_STS1_MASK 0x0080 /* SPKOUTR_SC_STS1 */ +#define WM8285_SPKOUTR_SC_STS1_SHIFT 7 /* SPKOUTR_SC_STS1 */ +#define WM8285_SPKOUTR_SC_STS1_WIDTH 1 /* SPKOUTR_SC_STS1 */ +#define WM8285_SPKOUTL_SC_STS1 0x0040 /* SPKOUTL_SC_STS1 */ +#define WM8285_SPKOUTL_SC_STS1_MASK 0x0040 /* SPKOUTL_SC_STS1 */ +#define WM8285_SPKOUTL_SC_STS1_SHIFT 6 /* SPKOUTL_SC_STS1 */ +#define WM8285_SPKOUTL_SC_STS1_WIDTH 1 /* SPKOUTL_SC_STS1 */ +#define WM8285_HP3R_SC_STS1 0x0020 /* HP3R_SC_STS1 */ +#define WM8285_HP3R_SC_STS1_MASK 0x0020 /* HP3R_SC_STS1 */ +#define WM8285_HP3R_SC_STS1_SHIFT 5 /* HP3R_SC_STS1 */ +#define WM8285_HP3R_SC_STS1_WIDTH 1 /* HP3R_SC_STS1 */ +#define WM8285_HP3L_SC_STS1 0x0010 /* HP3L_SC_STS1 */ +#define WM8285_HP3L_SC_STS1_MASK 0x0010 /* HP3L_SC_STS1 */ +#define WM8285_HP3L_SC_STS1_SHIFT 4 /* HP3L_SC_STS1 */ +#define WM8285_HP3L_SC_STS1_WIDTH 1 /* HP3L_SC_STS1 */ +#define WM8285_HP2R_SC_STS1 0x0008 /* HP2R_SC_STS1 */ +#define WM8285_HP2R_SC_STS1_MASK 0x0008 /* HP2R_SC_STS1 */ +#define WM8285_HP2R_SC_STS1_SHIFT 3 /* HP2R_SC_STS1 */ +#define WM8285_HP2R_SC_STS1_WIDTH 1 /* HP2R_SC_STS1 */ +#define WM8285_HP2L_SC_STS1 0x0004 /* HP2L_SC_STS1 */ +#define WM8285_HP2L_SC_STS1_MASK 0x0004 /* HP2L_SC_STS1 */ +#define WM8285_HP2L_SC_STS1_SHIFT 2 /* HP2L_SC_STS1 */ +#define WM8285_HP2L_SC_STS1_WIDTH 1 /* HP2L_SC_STS1 */ +#define WM8285_HP1R_SC_STS1 0x0002 /* HP1R_SC_STS1 */ +#define WM8285_HP1R_SC_STS1_MASK 0x0002 /* HP1R_SC_STS1 */ +#define WM8285_HP1R_SC_STS1_SHIFT 1 /* HP1R_SC_STS1 */ +#define WM8285_HP1R_SC_STS1_WIDTH 1 /* HP1R_SC_STS1 */ +#define WM8285_HP1L_SC_STS1 0x0001 /* HP1L_SC_STS1 */ +#define WM8285_HP1L_SC_STS1_MASK 0x0001 /* HP1L_SC_STS1 */ +#define WM8285_HP1L_SC_STS1_SHIFT 0 /* HP1L_SC_STS1 */ +#define WM8285_HP1L_SC_STS1_WIDTH 1 /* HP1L_SC_STS1 */ + +/* + * R6284 (0x188C) - IRQ1 Raw Status 13 + */ +#define WM8285_SPKOUTR_ENABLE_DONE_STS1 0x0080 /* SPKOUTR_ENABLE_DONE_STS1 */ +#define WM8285_SPKOUTR_ENABLE_DONE_STS1_MASK 0x0080 /* SPKOUTR_ENABLE_DONE_STS1 */ +#define WM8285_SPKOUTR_ENABLE_DONE_STS1_SHIFT 7 /* SPKOUTR_ENABLE_DONE_STS1 */ +#define WM8285_SPKOUTR_ENABLE_DONE_STS1_WIDTH 1 /* SPKOUTR_ENABLE_DONE_STS1 */ +#define WM8285_SPKOUTL_ENABLE_DONE_STS1 0x0040 /* SPKOUTL_ENABLE_DONE_STS1 */ +#define WM8285_SPKOUTL_ENABLE_DONE_STS1_MASK 0x0040 /* SPKOUTL_ENABLE_DONE_STS1 */ +#define WM8285_SPKOUTL_ENABLE_DONE_STS1_SHIFT 6 /* SPKOUTL_ENABLE_DONE_STS1 */ +#define WM8285_SPKOUTL_ENABLE_DONE_STS1_WIDTH 1 /* SPKOUTL_ENABLE_DONE_STS1 */ +#define WM8285_HP3R_ENABLE_DONE_STS1 0x0020 /* HP3R_ENABLE_DONE_STS1 */ +#define WM8285_HP3R_ENABLE_DONE_STS1_MASK 0x0020 /* HP3R_ENABLE_DONE_STS1 */ +#define WM8285_HP3R_ENABLE_DONE_STS1_SHIFT 5 /* HP3R_ENABLE_DONE_STS1 */ +#define WM8285_HP3R_ENABLE_DONE_STS1_WIDTH 1 /* HP3R_ENABLE_DONE_STS1 */ +#define WM8285_HP3L_ENABLE_DONE_STS1 0x0010 /* HP3L_ENABLE_DONE_STS1 */ +#define WM8285_HP3L_ENABLE_DONE_STS1_MASK 0x0010 /* HP3L_ENABLE_DONE_STS1 */ +#define WM8285_HP3L_ENABLE_DONE_STS1_SHIFT 4 /* HP3L_ENABLE_DONE_STS1 */ +#define WM8285_HP3L_ENABLE_DONE_STS1_WIDTH 1 /* HP3L_ENABLE_DONE_STS1 */ +#define WM8285_HP2R_ENABLE_DONE_STS1 0x0008 /* HP2R_ENABLE_DONE_STS1 */ +#define WM8285_HP2R_ENABLE_DONE_STS1_MASK 0x0008 /* HP2R_ENABLE_DONE_STS1 */ +#define WM8285_HP2R_ENABLE_DONE_STS1_SHIFT 3 /* HP2R_ENABLE_DONE_STS1 */ +#define WM8285_HP2R_ENABLE_DONE_STS1_WIDTH 1 /* HP2R_ENABLE_DONE_STS1 */ +#define WM8285_HP2L_ENABLE_DONE_STS1 0x0004 /* HP2L_ENABLE_DONE_STS1 */ +#define WM8285_HP2L_ENABLE_DONE_STS1_MASK 0x0004 /* HP2L_ENABLE_DONE_STS1 */ +#define WM8285_HP2L_ENABLE_DONE_STS1_SHIFT 2 /* HP2L_ENABLE_DONE_STS1 */ +#define WM8285_HP2L_ENABLE_DONE_STS1_WIDTH 1 /* HP2L_ENABLE_DONE_STS1 */ +#define WM8285_HP1R_ENABLE_DONE_STS1 0x0002 /* HP1R_ENABLE_DONE_STS1 */ +#define WM8285_HP1R_ENABLE_DONE_STS1_MASK 0x0002 /* HP1R_ENABLE_DONE_STS1 */ +#define WM8285_HP1R_ENABLE_DONE_STS1_SHIFT 1 /* HP1R_ENABLE_DONE_STS1 */ +#define WM8285_HP1R_ENABLE_DONE_STS1_WIDTH 1 /* HP1R_ENABLE_DONE_STS1 */ +#define WM8285_HP1L_ENABLE_DONE_STS1 0x0001 /* HP1L_ENABLE_DONE_STS1 */ +#define WM8285_HP1L_ENABLE_DONE_STS1_MASK 0x0001 /* HP1L_ENABLE_DONE_STS1 */ +#define WM8285_HP1L_ENABLE_DONE_STS1_SHIFT 0 /* HP1L_ENABLE_DONE_STS1 */ +#define WM8285_HP1L_ENABLE_DONE_STS1_WIDTH 1 /* HP1L_ENABLE_DONE_STS1 */ + +/* + * R6285 (0x188D) - IRQ1 Raw Status 14 + */ +#define WM8285_SPKOUTR_DISABLE_DONE_STS1 0x0080 /* SPKOUTR_DISABLE_DONE_STS1 */ +#define WM8285_SPKOUTR_DISABLE_DONE_STS1_MASK 0x0080 /* SPKOUTR_DISABLE_DONE_STS1 */ +#define WM8285_SPKOUTR_DISABLE_DONE_STS1_SHIFT 7 /* SPKOUTR_DISABLE_DONE_STS1 */ +#define WM8285_SPKOUTR_DISABLE_DONE_STS1_WIDTH 1 /* SPKOUTR_DISABLE_DONE_STS1 */ +#define WM8285_SPKOUTL_DISABLE_DONE_STS1 0x0040 /* SPKOUTL_DISABLE_DONE_STS1 */ +#define WM8285_SPKOUTL_DISABLE_DONE_STS1_MASK 0x0040 /* SPKOUTL_DISABLE_DONE_STS1 */ +#define WM8285_SPKOUTL_DISABLE_DONE_STS1_SHIFT 6 /* SPKOUTL_DISABLE_DONE_STS1 */ +#define WM8285_SPKOUTL_DISABLE_DONE_STS1_WIDTH 1 /* SPKOUTL_DISABLE_DONE_STS1 */ +#define WM8285_HP3R_DISABLE_DONE_STS1 0x0020 /* HP3R_DISABLE_DONE_STS1 */ +#define WM8285_HP3R_DISABLE_DONE_STS1_MASK 0x0020 /* HP3R_DISABLE_DONE_STS1 */ +#define WM8285_HP3R_DISABLE_DONE_STS1_SHIFT 5 /* HP3R_DISABLE_DONE_STS1 */ +#define WM8285_HP3R_DISABLE_DONE_STS1_WIDTH 1 /* HP3R_DISABLE_DONE_STS1 */ +#define WM8285_HP3L_DISABLE_DONE_STS1 0x0010 /* HP3L_DISABLE_DONE_STS1 */ +#define WM8285_HP3L_DISABLE_DONE_STS1_MASK 0x0010 /* HP3L_DISABLE_DONE_STS1 */ +#define WM8285_HP3L_DISABLE_DONE_STS1_SHIFT 4 /* HP3L_DISABLE_DONE_STS1 */ +#define WM8285_HP3L_DISABLE_DONE_STS1_WIDTH 1 /* HP3L_DISABLE_DONE_STS1 */ +#define WM8285_HP2R_DISABLE_DONE_STS1 0x0008 /* HP2R_DISABLE_DONE_STS1 */ +#define WM8285_HP2R_DISABLE_DONE_STS1_MASK 0x0008 /* HP2R_DISABLE_DONE_STS1 */ +#define WM8285_HP2R_DISABLE_DONE_STS1_SHIFT 3 /* HP2R_DISABLE_DONE_STS1 */ +#define WM8285_HP2R_DISABLE_DONE_STS1_WIDTH 1 /* HP2R_DISABLE_DONE_STS1 */ +#define WM8285_HP2L_DISABLE_DONE_STS1 0x0004 /* HP2L_DISABLE_DONE_STS1 */ +#define WM8285_HP2L_DISABLE_DONE_STS1_MASK 0x0004 /* HP2L_DISABLE_DONE_STS1 */ +#define WM8285_HP2L_DISABLE_DONE_STS1_SHIFT 2 /* HP2L_DISABLE_DONE_STS1 */ +#define WM8285_HP2L_DISABLE_DONE_STS1_WIDTH 1 /* HP2L_DISABLE_DONE_STS1 */ +#define WM8285_HP1R_DISABLE_DONE_STS1 0x0002 /* HP1R_DISABLE_DONE_STS1 */ +#define WM8285_HP1R_DISABLE_DONE_STS1_MASK 0x0002 /* HP1R_DISABLE_DONE_STS1 */ +#define WM8285_HP1R_DISABLE_DONE_STS1_SHIFT 1 /* HP1R_DISABLE_DONE_STS1 */ +#define WM8285_HP1R_DISABLE_DONE_STS1_WIDTH 1 /* HP1R_DISABLE_DONE_STS1 */ +#define WM8285_HP1L_DISABLE_DONE_STS1 0x0001 /* HP1L_DISABLE_DONE_STS1 */ +#define WM8285_HP1L_DISABLE_DONE_STS1_MASK 0x0001 /* HP1L_DISABLE_DONE_STS1 */ +#define WM8285_HP1L_DISABLE_DONE_STS1_SHIFT 0 /* HP1L_DISABLE_DONE_STS1 */ +#define WM8285_HP1L_DISABLE_DONE_STS1_WIDTH 1 /* HP1L_DISABLE_DONE_STS1 */ + +/* + * R6286 (0x188E) - IRQ1 Raw Status 15 + */ +#define WM8285_SPK_OVERHEAT_WARN_STS1 0x0004 /* SPK_OVERHEAT_WARN_STS1 */ +#define WM8285_SPK_OVERHEAT_WARN_STS1_MASK 0x0004 /* SPK_OVERHEAT_WARN_STS1 */ +#define WM8285_SPK_OVERHEAT_WARN_STS1_SHIFT 2 /* SPK_OVERHEAT_WARN_STS1 */ +#define WM8285_SPK_OVERHEAT_WARN_STS1_WIDTH 1 /* SPK_OVERHEAT_WARN_STS1 */ +#define WM8285_SPK_OVERHEAT_STS1 0x0002 /* SPK_OVERHEAT_STS1 */ +#define WM8285_SPK_OVERHEAT_STS1_MASK 0x0002 /* SPK_OVERHEAT_STS1 */ +#define WM8285_SPK_OVERHEAT_STS1_SHIFT 1 /* SPK_OVERHEAT_STS1 */ +#define WM8285_SPK_OVERHEAT_STS1_WIDTH 1 /* SPK_OVERHEAT_STS1 */ +#define WM8285_SPK_SHUTDOWN_STS1 0x0001 /* SPK_SHUTDOWN_STS1 */ +#define WM8285_SPK_SHUTDOWN_STS1_MASK 0x0001 /* SPK_SHUTDOWN_STS1 */ +#define WM8285_SPK_SHUTDOWN_STS1_SHIFT 0 /* SPK_SHUTDOWN_STS1 */ +#define WM8285_SPK_SHUTDOWN_STS1_WIDTH 1 /* SPK_SHUTDOWN_STS1 */ + +/* + * R6475 (0x194B) - IRQ2 Mask 12 + */ +#define WM8285_IM_SPKOUTR_SC_EINT2 0x0080 /* IM_SPKOUTR_SC_EINT2 */ +#define WM8285_IM_SPKOUTR_SC_EINT2_MASK 0x0080 /* IM_SPKOUTR_SC_EINT2 */ +#define WM8285_IM_SPKOUTR_SC_EINT2_SHIFT 7 /* IM_SPKOUTR_SC_EINT2 */ +#define WM8285_IM_SPKOUTR_SC_EINT2_WIDTH 1 /* IM_SPKOUTR_SC_EINT2 */ +#define WM8285_IM_SPKOUTL_SC_EINT2 0x0040 /* IM_SPKOUTL_SC_EINT2 */ +#define WM8285_IM_SPKOUTL_SC_EINT2_MASK 0x0040 /* IM_SPKOUTL_SC_EINT2 */ +#define WM8285_IM_SPKOUTL_SC_EINT2_SHIFT 6 /* IM_SPKOUTL_SC_EINT2 */ +#define WM8285_IM_SPKOUTL_SC_EINT2_WIDTH 1 /* IM_SPKOUTL_SC_EINT2 */ +#define WM8285_IM_HP3R_SC_EINT2 0x0020 /* IM_HP3R_SC_EINT2 */ +#define WM8285_IM_HP3R_SC_EINT2_MASK 0x0020 /* IM_HP3R_SC_EINT2 */ +#define WM8285_IM_HP3R_SC_EINT2_SHIFT 5 /* IM_HP3R_SC_EINT2 */ +#define WM8285_IM_HP3R_SC_EINT2_WIDTH 1 /* IM_HP3R_SC_EINT2 */ +#define WM8285_IM_HP3L_SC_EINT2 0x0010 /* IM_HP3L_SC_EINT2 */ +#define WM8285_IM_HP3L_SC_EINT2_MASK 0x0010 /* IM_HP3L_SC_EINT2 */ +#define WM8285_IM_HP3L_SC_EINT2_SHIFT 4 /* IM_HP3L_SC_EINT2 */ +#define WM8285_IM_HP3L_SC_EINT2_WIDTH 1 /* IM_HP3L_SC_EINT2 */ +#define WM8285_IM_HP2R_SC_EINT2 0x0008 /* IM_HP2R_SC_EINT2 */ +#define WM8285_IM_HP2R_SC_EINT2_MASK 0x0008 /* IM_HP2R_SC_EINT2 */ +#define WM8285_IM_HP2R_SC_EINT2_SHIFT 3 /* IM_HP2R_SC_EINT2 */ +#define WM8285_IM_HP2R_SC_EINT2_WIDTH 1 /* IM_HP2R_SC_EINT2 */ +#define WM8285_IM_HP2L_SC_EINT2 0x0004 /* IM_HP2L_SC_EINT2 */ +#define WM8285_IM_HP2L_SC_EINT2_MASK 0x0004 /* IM_HP2L_SC_EINT2 */ +#define WM8285_IM_HP2L_SC_EINT2_SHIFT 2 /* IM_HP2L_SC_EINT2 */ +#define WM8285_IM_HP2L_SC_EINT2_WIDTH 1 /* IM_HP2L_SC_EINT2 */ +#define WM8285_IM_HP1R_SC_EINT2 0x0002 /* IM_HP1R_SC_EINT2 */ +#define WM8285_IM_HP1R_SC_EINT2_MASK 0x0002 /* IM_HP1R_SC_EINT2 */ +#define WM8285_IM_HP1R_SC_EINT2_SHIFT 1 /* IM_HP1R_SC_EINT2 */ +#define WM8285_IM_HP1R_SC_EINT2_WIDTH 1 /* IM_HP1R_SC_EINT2 */ +#define WM8285_IM_HP1L_SC_EINT2 0x0001 /* IM_HP1L_SC_EINT2 */ +#define WM8285_IM_HP1L_SC_EINT2_MASK 0x0001 /* IM_HP1L_SC_EINT2 */ +#define WM8285_IM_HP1L_SC_EINT2_SHIFT 0 /* IM_HP1L_SC_EINT2 */ +#define WM8285_IM_HP1L_SC_EINT2_WIDTH 1 /* IM_HP1L_SC_EINT2 */ + +/* + * R6476 (0x194C) - IRQ2 Mask 13 + */ +#define WM8285_IM_SPKOUTR_ENABLE_DONE_EINT2 0x0080 /* IM_SPKOUTR_ENABLE_DONE_EINT2 */ +#define WM8285_IM_SPKOUTR_ENABLE_DONE_EINT2_MASK 0x0080 /* IM_SPKOUTR_ENABLE_DONE_EINT2 */ +#define WM8285_IM_SPKOUTR_ENABLE_DONE_EINT2_SHIFT 7 /* IM_SPKOUTR_ENABLE_DONE_EINT2 */ +#define WM8285_IM_SPKOUTR_ENABLE_DONE_EINT2_WIDTH 1 /* IM_SPKOUTR_ENABLE_DONE_EINT2 */ +#define WM8285_IM_SPKOUTL_ENABLE_DONE_EINT2 0x0040 /* IM_SPKOUTL_ENABLE_DONE_EINT2 */ +#define WM8285_IM_SPKOUTL_ENABLE_DONE_EINT2_MASK 0x0040 /* IM_SPKOUTL_ENABLE_DONE_EINT2 */ +#define WM8285_IM_SPKOUTL_ENABLE_DONE_EINT2_SHIFT 6 /* IM_SPKOUTL_ENABLE_DONE_EINT2 */ +#define WM8285_IM_SPKOUTL_ENABLE_DONE_EINT2_WIDTH 1 /* IM_SPKOUTL_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP3R_ENABLE_DONE_EINT2 0x0020 /* IM_HP3R_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP3R_ENABLE_DONE_EINT2_MASK 0x0020 /* IM_HP3R_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP3R_ENABLE_DONE_EINT2_SHIFT 5 /* IM_HP3R_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP3R_ENABLE_DONE_EINT2_WIDTH 1 /* IM_HP3R_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP3L_ENABLE_DONE_EINT2 0x0010 /* IM_HP3L_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP3L_ENABLE_DONE_EINT2_MASK 0x0010 /* IM_HP3L_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP3L_ENABLE_DONE_EINT2_SHIFT 4 /* IM_HP3L_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP3L_ENABLE_DONE_EINT2_WIDTH 1 /* IM_HP3L_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP2R_ENABLE_DONE_EINT2 0x0008 /* IM_HP2R_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP2R_ENABLE_DONE_EINT2_MASK 0x0008 /* IM_HP2R_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP2R_ENABLE_DONE_EINT2_SHIFT 3 /* IM_HP2R_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP2R_ENABLE_DONE_EINT2_WIDTH 1 /* IM_HP2R_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP2L_ENABLE_DONE_EINT2 0x0004 /* IM_HP2L_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP2L_ENABLE_DONE_EINT2_MASK 0x0004 /* IM_HP2L_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP2L_ENABLE_DONE_EINT2_SHIFT 2 /* IM_HP2L_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP2L_ENABLE_DONE_EINT2_WIDTH 1 /* IM_HP2L_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP1R_ENABLE_DONE_EINT2 0x0002 /* IM_HP1R_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP1R_ENABLE_DONE_EINT2_MASK 0x0002 /* IM_HP1R_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP1R_ENABLE_DONE_EINT2_SHIFT 1 /* IM_HP1R_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP1R_ENABLE_DONE_EINT2_WIDTH 1 /* IM_HP1R_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP1L_ENABLE_DONE_EINT2 0x0001 /* IM_HP1L_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP1L_ENABLE_DONE_EINT2_MASK 0x0001 /* IM_HP1L_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP1L_ENABLE_DONE_EINT2_SHIFT 0 /* IM_HP1L_ENABLE_DONE_EINT2 */ +#define WM8285_IM_HP1L_ENABLE_DONE_EINT2_WIDTH 1 /* IM_HP1L_ENABLE_DONE_EINT2 */ + +/* + * R6477 (0x194D) - IRQ2 Mask 14 + */ +#define WM8285_IM_SPKOUTR_DISABLE_DONE_EINT2 0x0080 /* IM_SPKOUTR_DISABLE_DONE_EINT2 */ +#define WM8285_IM_SPKOUTR_DISABLE_DONE_EINT2_MASK 0x0080 /* IM_SPKOUTR_DISABLE_DONE_EINT2 */ +#define WM8285_IM_SPKOUTR_DISABLE_DONE_EINT2_SHIFT 7 /* IM_SPKOUTR_DISABLE_DONE_EINT2 */ +#define WM8285_IM_SPKOUTR_DISABLE_DONE_EINT2_WIDTH 1 /* IM_SPKOUTR_DISABLE_DONE_EINT2 */ +#define WM8285_IM_SPKOUTL_DISABLE_DONE_EINT2 0x0040 /* IM_SPKOUTL_DISABLE_DONE_EINT2 */ +#define WM8285_IM_SPKOUTL_DISABLE_DONE_EINT2_MASK 0x0040 /* IM_SPKOUTL_DISABLE_DONE_EINT2 */ +#define WM8285_IM_SPKOUTL_DISABLE_DONE_EINT2_SHIFT 6 /* IM_SPKOUTL_DISABLE_DONE_EINT2 */ +#define WM8285_IM_SPKOUTL_DISABLE_DONE_EINT2_WIDTH 1 /* IM_SPKOUTL_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP3R_DISABLE_DONE_EINT2 0x0020 /* IM_HP3R_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP3R_DISABLE_DONE_EINT2_MASK 0x0020 /* IM_HP3R_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP3R_DISABLE_DONE_EINT2_SHIFT 5 /* IM_HP3R_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP3R_DISABLE_DONE_EINT2_WIDTH 1 /* IM_HP3R_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP3L_DISABLE_DONE_EINT2 0x0010 /* IM_HP3L_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP3L_DISABLE_DONE_EINT2_MASK 0x0010 /* IM_HP3L_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP3L_DISABLE_DONE_EINT2_SHIFT 4 /* IM_HP3L_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP3L_DISABLE_DONE_EINT2_WIDTH 1 /* IM_HP3L_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP2R_DISABLE_DONE_EINT2 0x0008 /* IM_HP2R_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP2R_DISABLE_DONE_EINT2_MASK 0x0008 /* IM_HP2R_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP2R_DISABLE_DONE_EINT2_SHIFT 3 /* IM_HP2R_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP2R_DISABLE_DONE_EINT2_WIDTH 1 /* IM_HP2R_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP2L_DISABLE_DONE_EINT2 0x0004 /* IM_HP2L_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP2L_DISABLE_DONE_EINT2_MASK 0x0004 /* IM_HP2L_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP2L_DISABLE_DONE_EINT2_SHIFT 2 /* IM_HP2L_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP2L_DISABLE_DONE_EINT2_WIDTH 1 /* IM_HP2L_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP1R_DISABLE_DONE_EINT2 0x0002 /* IM_HP1R_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP1R_DISABLE_DONE_EINT2_MASK 0x0002 /* IM_HP1R_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP1R_DISABLE_DONE_EINT2_SHIFT 1 /* IM_HP1R_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP1R_DISABLE_DONE_EINT2_WIDTH 1 /* IM_HP1R_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP1L_DISABLE_DONE_EINT2 0x0001 /* IM_HP1L_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP1L_DISABLE_DONE_EINT2_MASK 0x0001 /* IM_HP1L_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP1L_DISABLE_DONE_EINT2_SHIFT 0 /* IM_HP1L_DISABLE_DONE_EINT2 */ +#define WM8285_IM_HP1L_DISABLE_DONE_EINT2_WIDTH 1 /* IM_HP1L_DISABLE_DONE_EINT2 */ + +/* + * R6478 (0x194E) - IRQ2 Mask 15 + */ +#define WM8285_IM_SPK_OVERHEAT_WARN_EINT2 0x0004 /* IM_SPK_OVERHEAT_WARN_EINT2 */ +#define WM8285_IM_SPK_OVERHEAT_WARN_EINT2_MASK 0x0004 /* IM_SPK_OVERHEAT_WARN_EINT2 */ +#define WM8285_IM_SPK_OVERHEAT_WARN_EINT2_SHIFT 2 /* IM_SPK_OVERHEAT_WARN_EINT2 */ +#define WM8285_IM_SPK_OVERHEAT_WARN_EINT2_WIDTH 1 /* IM_SPK_OVERHEAT_WARN_EINT2 */ +#define WM8285_IM_SPK_OVERHEAT_EINT2 0x0002 /* IM_SPK_OVERHEAT_EINT2 */ +#define WM8285_IM_SPK_OVERHEAT_EINT2_MASK 0x0002 /* IM_SPK_OVERHEAT_EINT2 */ +#define WM8285_IM_SPK_OVERHEAT_EINT2_SHIFT 1 /* IM_SPK_OVERHEAT_EINT2 */ +#define WM8285_IM_SPK_OVERHEAT_EINT2_WIDTH 1 /* IM_SPK_OVERHEAT_EINT2 */ +#define WM8285_IM_SPK_SHUTDOWN_EINT2 0x0001 /* IM_SPK_SHUTDOWN_EINT2 */ +#define WM8285_IM_SPK_SHUTDOWN_EINT2_MASK 0x0001 /* IM_SPK_SHUTDOWN_EINT2 */ +#define WM8285_IM_SPK_SHUTDOWN_EINT2_SHIFT 0 /* IM_SPK_SHUTDOWN_EINT2 */ +#define WM8285_IM_SPK_SHUTDOWN_EINT2_WIDTH 1 /* IM_SPK_SHUTDOWN_EINT2 */ + +/* + * R6528 (0x1980) - IRQ2 Raw Status 1 + */ +#define WM8285_DSP_SHARED_WR_COLL_STS2 0x8000 /* DSP_SHARED_WR_COLL_STS2 */ +#define WM8285_DSP_SHARED_WR_COLL_STS2_MASK 0x8000 /* DSP_SHARED_WR_COLL_STS2 */ +#define WM8285_DSP_SHARED_WR_COLL_STS2_SHIFT 15 /* DSP_SHARED_WR_COLL_STS2 */ +#define WM8285_DSP_SHARED_WR_COLL_STS2_WIDTH 1 /* DSP_SHARED_WR_COLL_STS2 */ +#define WM8285_CTRLIF_ERR_STS2 0x1000 /* CTRLIF_ERR_STS2 */ +#define WM8285_CTRLIF_ERR_STS2_MASK 0x1000 /* CTRLIF_ERR_STS2 */ +#define WM8285_CTRLIF_ERR_STS2_SHIFT 12 /* CTRLIF_ERR_STS2 */ +#define WM8285_CTRLIF_ERR_STS2_WIDTH 1 /* CTRLIF_ERR_STS2 */ +#define WM8285_IRQ_NO_CLOCK_STS2 0x0200 /* IRQ_NO_CLOCK_STS2 */ +#define WM8285_IRQ_NO_CLOCK_STS2_MASK 0x0200 /* IRQ_NO_CLOCK_STS2 */ +#define WM8285_IRQ_NO_CLOCK_STS2_SHIFT 9 /* IRQ_NO_CLOCK_STS2 */ +#define WM8285_IRQ_NO_CLOCK_STS2_WIDTH 1 /* IRQ_NO_CLOCK_STS2 */ +#define WM8285_CLOCK_DETECT_STS2 0x0100 /* CLOCK_DETECT_STS2 */ +#define WM8285_CLOCK_DETECT_STS2_MASK 0x0100 /* CLOCK_DETECT_STS2 */ +#define WM8285_CLOCK_DETECT_STS2_SHIFT 8 /* CLOCK_DETECT_STS2 */ +#define WM8285_CLOCK_DETECT_STS2_WIDTH 1 /* CLOCK_DETECT_STS2 */ +#define WM8285_BOOT_DONE_STS2 0x0080 /* BOOT_DONE_STS2 */ +#define WM8285_BOOT_DONE_STS2_MASK 0x0080 /* BOOT_DONE_STS2 */ +#define WM8285_BOOT_DONE_STS2_SHIFT 7 /* BOOT_DONE_STS2 */ +#define WM8285_BOOT_DONE_STS2_WIDTH 1 /* BOOT_DONE_STS2 */ + +/* + * R6529 (0x1981) - IRQ2 Raw Status 2 + */ +#define WM8285_FLL3_LOCK_STS2 0x0400 /* FLL3_LOCK_STS2 */ +#define WM8285_FLL3_LOCK_STS2_MASK 0x0400 /* FLL3_LOCK_STS2 */ +#define WM8285_FLL3_LOCK_STS2_SHIFT 10 /* FLL3_LOCK_STS2 */ +#define WM8285_FLL3_LOCK_STS2_WIDTH 1 /* FLL3_LOCK_STS2 */ +#define WM8285_FLL2_LOCK_STS2 0x0200 /* FLL2_LOCK_STS2 */ +#define WM8285_FLL2_LOCK_STS2_MASK 0x0200 /* FLL2_LOCK_STS2 */ +#define WM8285_FLL2_LOCK_STS2_SHIFT 9 /* FLL2_LOCK_STS2 */ +#define WM8285_FLL2_LOCK_STS2_WIDTH 1 /* FLL2_LOCK_STS2 */ +#define WM8285_FLL1_LOCK_STS2 0x0100 /* FLL1_LOCK_STS2 */ +#define WM8285_FLL1_LOCK_STS2_MASK 0x0100 /* FLL1_LOCK_STS2 */ +#define WM8285_FLL1_LOCK_STS2_SHIFT 8 /* FLL1_LOCK_STS2 */ +#define WM8285_FLL1_LOCK_STS2_WIDTH 1 /* FLL1_LOCK_STS2 */ + +/* + * R6533 (0x1985) - IRQ2 Raw Status 6 + */ +#define WM8285_MICDET_STS2 0x0100 /* MICDET_STS2 */ +#define WM8285_MICDET_STS2_MASK 0x0100 /* MICDET_STS2 */ +#define WM8285_MICDET_STS2_SHIFT 8 /* MICDET_STS2 */ +#define WM8285_MICDET_STS2_WIDTH 1 /* MICDET_STS2 */ +#define WM8285_HPDET_STS2 0x0001 /* HPDET_STS2 */ +#define WM8285_HPDET_STS2_MASK 0x0001 /* HPDET_STS2 */ +#define WM8285_HPDET_STS2_SHIFT 0 /* HPDET_STS2 */ +#define WM8285_HPDET_STS2_WIDTH 1 /* HPDET_STS2 */ + +/* + * R6534 (0x1986) - IRQ2 Raw Status 7 + */ +#define WM8285_MICD_CLAMP_FALL_STS2 0x0020 /* MICD_CLAMP_FALL_STS2 */ +#define WM8285_MICD_CLAMP_FALL_STS2_MASK 0x0020 /* MICD_CLAMP_FALL_STS2 */ +#define WM8285_MICD_CLAMP_FALL_STS2_SHIFT 5 /* MICD_CLAMP_FALL_STS2 */ +#define WM8285_MICD_CLAMP_FALL_STS2_WIDTH 1 /* MICD_CLAMP_FALL_STS2 */ +#define WM8285_MICD_CLAMP_RISE_STS2 0x0010 /* MICD_CLAMP_RISE_STS2 */ +#define WM8285_MICD_CLAMP_RISE_STS2_MASK 0x0010 /* MICD_CLAMP_RISE_STS2 */ +#define WM8285_MICD_CLAMP_RISE_STS2_SHIFT 4 /* MICD_CLAMP_RISE_STS2 */ +#define WM8285_MICD_CLAMP_RISE_STS2_WIDTH 1 /* MICD_CLAMP_RISE_STS2 */ +#define WM8285_JD2_FALL_STS2 0x0008 /* JD2_FALL_STS2 */ +#define WM8285_JD2_FALL_STS2_MASK 0x0008 /* JD2_FALL_STS2 */ +#define WM8285_JD2_FALL_STS2_SHIFT 3 /* JD2_FALL_STS2 */ +#define WM8285_JD2_FALL_STS2_WIDTH 1 /* JD2_FALL_STS2 */ +#define WM8285_JD2_RISE_STS2 0x0004 /* JD2_RISE_STS2 */ +#define WM8285_JD2_RISE_STS2_MASK 0x0004 /* JD2_RISE_STS2 */ +#define WM8285_JD2_RISE_STS2_SHIFT 2 /* JD2_RISE_STS2 */ +#define WM8285_JD2_RISE_STS2_WIDTH 1 /* JD2_RISE_STS2 */ +#define WM8285_JD1_FALL_STS2 0x0002 /* JD1_FALL_STS2 */ +#define WM8285_JD1_FALL_STS2_MASK 0x0002 /* JD1_FALL_STS2 */ +#define WM8285_JD1_FALL_STS2_SHIFT 1 /* JD1_FALL_STS2 */ +#define WM8285_JD1_FALL_STS2_WIDTH 1 /* JD1_FALL_STS2 */ +#define WM8285_JD1_RISE_STS2 0x0001 /* JD1_RISE_STS2 */ +#define WM8285_JD1_RISE_STS2_MASK 0x0001 /* JD1_RISE_STS2 */ +#define WM8285_JD1_RISE_STS2_SHIFT 0 /* JD1_RISE_STS2 */ +#define WM8285_JD1_RISE_STS2_WIDTH 1 /* JD1_RISE_STS2 */ + +/* + * R6536 (0x1988) - IRQ2 Raw Status 9 + */ +#define WM8285_ASRC2_IN2_LOCK_STS2 0x0800 /* ASRC2_IN2_LOCK_STS2 */ +#define WM8285_ASRC2_IN2_LOCK_STS2_MASK 0x0800 /* ASRC2_IN2_LOCK_STS2 */ +#define WM8285_ASRC2_IN2_LOCK_STS2_SHIFT 11 /* ASRC2_IN2_LOCK_STS2 */ +#define WM8285_ASRC2_IN2_LOCK_STS2_WIDTH 1 /* ASRC2_IN2_LOCK_STS2 */ +#define WM8285_ASRC2_IN1_LOCK_STS2 0x0400 /* ASRC2_IN1_LOCK_STS2 */ +#define WM8285_ASRC2_IN1_LOCK_STS2_MASK 0x0400 /* ASRC2_IN1_LOCK_STS2 */ +#define WM8285_ASRC2_IN1_LOCK_STS2_SHIFT 10 /* ASRC2_IN1_LOCK_STS2 */ +#define WM8285_ASRC2_IN1_LOCK_STS2_WIDTH 1 /* ASRC2_IN1_LOCK_STS2 */ +#define WM8285_ASRC1_IN2_LOCK_STS2 0x0200 /* ASRC1_IN2_LOCK_STS2 */ +#define WM8285_ASRC1_IN2_LOCK_STS2_MASK 0x0200 /* ASRC1_IN2_LOCK_STS2 */ +#define WM8285_ASRC1_IN2_LOCK_STS2_SHIFT 9 /* ASRC1_IN2_LOCK_STS2 */ +#define WM8285_ASRC1_IN2_LOCK_STS2_WIDTH 1 /* ASRC1_IN2_LOCK_STS2 */ +#define WM8285_ASRC1_IN1_LOCK_STS2 0x0100 /* ASRC1_IN1_LOCK_STS2 */ +#define WM8285_ASRC1_IN1_LOCK_STS2_MASK 0x0100 /* ASRC1_IN1_LOCK_STS2 */ +#define WM8285_ASRC1_IN1_LOCK_STS2_SHIFT 8 /* ASRC1_IN1_LOCK_STS2 */ +#define WM8285_ASRC1_IN1_LOCK_STS2_WIDTH 1 /* ASRC1_IN1_LOCK_STS2 */ +#define WM8285_DRC2_SIG_DET_STS2 0x0002 /* DRC2_SIG_DET_STS2 */ +#define WM8285_DRC2_SIG_DET_STS2_MASK 0x0002 /* DRC2_SIG_DET_STS2 */ +#define WM8285_DRC2_SIG_DET_STS2_SHIFT 1 /* DRC2_SIG_DET_STS2 */ +#define WM8285_DRC2_SIG_DET_STS2_WIDTH 1 /* DRC2_SIG_DET_STS2 */ +#define WM8285_DRC1_SIG_DET_STS2 0x0001 /* DRC1_SIG_DET_STS2 */ +#define WM8285_DRC1_SIG_DET_STS2_MASK 0x0001 /* DRC1_SIG_DET_STS2 */ +#define WM8285_DRC1_SIG_DET_STS2_SHIFT 0 /* DRC1_SIG_DET_STS2 */ +#define WM8285_DRC1_SIG_DET_STS2_WIDTH 1 /* DRC1_SIG_DET_STS2 */ + +/* + * R6538 (0x198A) - IRQ2 Raw Status 11 + */ +#define WM8285_DSP_IRQ26_STS2 0x8000 /* DSP_IRQ26_STS2 */ +#define WM8285_DSP_IRQ26_STS2_MASK 0x8000 /* DSP_IRQ26_STS2 */ +#define WM8285_DSP_IRQ26_STS2_SHIFT 15 /* DSP_IRQ26_STS2 */ +#define WM8285_DSP_IRQ26_STS2_WIDTH 1 /* DSP_IRQ26_STS2 */ +#define WM8285_DSP_IRQ25_STS2 0x4000 /* DSP_IRQ25_STS2 */ +#define WM8285_DSP_IRQ25_STS2_MASK 0x4000 /* DSP_IRQ25_STS2 */ +#define WM8285_DSP_IRQ25_STS2_SHIFT 14 /* DSP_IRQ25_STS2 */ +#define WM8285_DSP_IRQ25_STS2_WIDTH 1 /* DSP_IRQ25_STS2 */ +#define WM8285_DSP_IRQ24_STS2 0x2000 /* DSP_IRQ24_STS2 */ +#define WM8285_DSP_IRQ24_STS2_MASK 0x2000 /* DSP_IRQ24_STS2 */ +#define WM8285_DSP_IRQ24_STS2_SHIFT 13 /* DSP_IRQ24_STS2 */ +#define WM8285_DSP_IRQ24_STS2_WIDTH 1 /* DSP_IRQ24_STS2 */ +#define WM8285_DSP_IRQ23_STS2 0x1000 /* DSP_IRQ23_STS2 */ +#define WM8285_DSP_IRQ23_STS2_MASK 0x1000 /* DSP_IRQ23_STS2 */ +#define WM8285_DSP_IRQ23_STS2_SHIFT 12 /* DSP_IRQ23_STS2 */ +#define WM8285_DSP_IRQ23_STS2_WIDTH 1 /* DSP_IRQ23_STS2 */ +#define WM8285_DSP_IRQ22_STS2 0x0800 /* DSP_IRQ22_STS2 */ +#define WM8285_DSP_IRQ22_STS2_MASK 0x0800 /* DSP_IRQ22_STS2 */ +#define WM8285_DSP_IRQ22_STS2_SHIFT 11 /* DSP_IRQ22_STS2 */ +#define WM8285_DSP_IRQ22_STS2_WIDTH 1 /* DSP_IRQ22_STS2 */ +#define WM8285_DSP_IRQ21_STS2 0x0400 /* DSP_IRQ21_STS2 */ +#define WM8285_DSP_IRQ21_STS2_MASK 0x0400 /* DSP_IRQ21_STS2 */ +#define WM8285_DSP_IRQ21_STS2_SHIFT 10 /* DSP_IRQ21_STS2 */ +#define WM8285_DSP_IRQ21_STS2_WIDTH 1 /* DSP_IRQ21_STS2 */ +#define WM8285_DSP_IRQ20_STS2 0x0200 /* DSP_IRQ20_STS2 */ +#define WM8285_DSP_IRQ20_STS2_MASK 0x0200 /* DSP_IRQ20_STS2 */ +#define WM8285_DSP_IRQ20_STS2_SHIFT 9 /* DSP_IRQ20_STS2 */ +#define WM8285_DSP_IRQ20_STS2_WIDTH 1 /* DSP_IRQ20_STS2 */ +#define WM8285_DSP_IRQ9_STS2 0x0100 /* DSP_IRQ9_STS2 */ +#define WM8285_DSP_IRQ9_STS2_MASK 0x0100 /* DSP_IRQ9_STS2 */ +#define WM8285_DSP_IRQ9_STS2_SHIFT 8 /* DSP_IRQ9_STS2 */ +#define WM8285_DSP_IRQ9_STS2_WIDTH 1 /* DSP_IRQ9_STS2 */ +#define WM8285_DSP_IRQ8_STS2 0x0080 /* DSP_IRQ8_STS2 */ +#define WM8285_DSP_IRQ8_STS2_MASK 0x0080 /* DSP_IRQ8_STS2 */ +#define WM8285_DSP_IRQ8_STS2_SHIFT 7 /* DSP_IRQ8_STS2 */ +#define WM8285_DSP_IRQ8_STS2_WIDTH 1 /* DSP_IRQ8_STS2 */ +#define WM8285_DSP_IRQ7_STS2 0x0040 /* DSP_IRQ7_STS2 */ +#define WM8285_DSP_IRQ7_STS2_MASK 0x0040 /* DSP_IRQ7_STS2 */ +#define WM8285_DSP_IRQ7_STS2_SHIFT 6 /* DSP_IRQ7_STS2 */ +#define WM8285_DSP_IRQ7_STS2_WIDTH 1 /* DSP_IRQ7_STS2 */ +#define WM8285_DSP_IRQ6_STS2 0x0020 /* DSP_IRQ6_STS2 */ +#define WM8285_DSP_IRQ6_STS2_MASK 0x0020 /* DSP_IRQ6_STS2 */ +#define WM8285_DSP_IRQ6_STS2_SHIFT 5 /* DSP_IRQ6_STS2 */ +#define WM8285_DSP_IRQ6_STS2_WIDTH 1 /* DSP_IRQ6_STS2 */ +#define WM8285_DSP_IRQ5_STS2 0x0010 /* DSP_IRQ5_STS2 */ +#define WM8285_DSP_IRQ5_STS2_MASK 0x0010 /* DSP_IRQ5_STS2 */ +#define WM8285_DSP_IRQ5_STS2_SHIFT 4 /* DSP_IRQ5_STS2 */ +#define WM8285_DSP_IRQ5_STS2_WIDTH 1 /* DSP_IRQ5_STS2 */ +#define WM8285_DSP_IRQ4_STS2 0x0008 /* DSP_IRQ4_STS2 */ +#define WM8285_DSP_IRQ4_STS2_MASK 0x0008 /* DSP_IRQ4_STS2 */ +#define WM8285_DSP_IRQ4_STS2_SHIFT 3 /* DSP_IRQ4_STS2 */ +#define WM8285_DSP_IRQ4_STS2_WIDTH 1 /* DSP_IRQ4_STS2 */ +#define WM8285_DSP_IRQ3_STS2 0x0004 /* DSP_IRQ3_STS2 */ +#define WM8285_DSP_IRQ3_STS2_MASK 0x0004 /* DSP_IRQ3_STS2 */ +#define WM8285_DSP_IRQ3_STS2_SHIFT 2 /* DSP_IRQ3_STS2 */ +#define WM8285_DSP_IRQ3_STS2_WIDTH 1 /* DSP_IRQ3_STS2 */ +#define WM8285_DSP_IRQ2_STS2 0x0002 /* DSP_IRQ2_STS2 */ +#define WM8285_DSP_IRQ2_STS2_MASK 0x0002 /* DSP_IRQ2_STS2 */ +#define WM8285_DSP_IRQ2_STS2_SHIFT 1 /* DSP_IRQ2_STS2 */ +#define WM8285_DSP_IRQ2_STS2_WIDTH 1 /* DSP_IRQ2_STS2 */ +#define WM8285_DSP_IRQ1_STS2 0x0001 /* DSP_IRQ1_STS2 */ +#define WM8285_DSP_IRQ1_STS2_MASK 0x0001 /* DSP_IRQ1_STS2 */ +#define WM8285_DSP_IRQ1_STS2_SHIFT 0 /* DSP_IRQ1_STS2 */ +#define WM8285_DSP_IRQ1_STS2_WIDTH 1 /* DSP_IRQ1_STS2 */ + + +/* + * R6539 (0x198B) - IRQ2 Raw Status 12 + */ +#define WM8285_SPKOUTR_SC_STS2 0x0080 /* SPKOUTR_SC_STS2 */ +#define WM8285_SPKOUTR_SC_STS2_MASK 0x0080 /* SPKOUTR_SC_STS2 */ +#define WM8285_SPKOUTR_SC_STS2_SHIFT 7 /* SPKOUTR_SC_STS2 */ +#define WM8285_SPKOUTR_SC_STS2_WIDTH 1 /* SPKOUTR_SC_STS2 */ +#define WM8285_SPKOUTL_SC_STS2 0x0040 /* SPKOUTL_SC_STS2 */ +#define WM8285_SPKOUTL_SC_STS2_MASK 0x0040 /* SPKOUTL_SC_STS2 */ +#define WM8285_SPKOUTL_SC_STS2_SHIFT 6 /* SPKOUTL_SC_STS2 */ +#define WM8285_SPKOUTL_SC_STS2_WIDTH 1 /* SPKOUTL_SC_STS2 */ +#define WM8285_HP3R_SC_STS2 0x0020 /* HP3R_SC_STS2 */ +#define WM8285_HP3R_SC_STS2_MASK 0x0020 /* HP3R_SC_STS2 */ +#define WM8285_HP3R_SC_STS2_SHIFT 5 /* HP3R_SC_STS2 */ +#define WM8285_HP3R_SC_STS2_WIDTH 1 /* HP3R_SC_STS2 */ +#define WM8285_HP3L_SC_STS2 0x0010 /* HP3L_SC_STS2 */ +#define WM8285_HP3L_SC_STS2_MASK 0x0010 /* HP3L_SC_STS2 */ +#define WM8285_HP3L_SC_STS2_SHIFT 4 /* HP3L_SC_STS2 */ +#define WM8285_HP3L_SC_STS2_WIDTH 1 /* HP3L_SC_STS2 */ +#define WM8285_HP2R_SC_STS2 0x0008 /* HP2R_SC_STS2 */ +#define WM8285_HP2R_SC_STS2_MASK 0x0008 /* HP2R_SC_STS2 */ +#define WM8285_HP2R_SC_STS2_SHIFT 3 /* HP2R_SC_STS2 */ +#define WM8285_HP2R_SC_STS2_WIDTH 1 /* HP2R_SC_STS2 */ +#define WM8285_HP2L_SC_STS2 0x0004 /* HP2L_SC_STS2 */ +#define WM8285_HP2L_SC_STS2_MASK 0x0004 /* HP2L_SC_STS2 */ +#define WM8285_HP2L_SC_STS2_SHIFT 2 /* HP2L_SC_STS2 */ +#define WM8285_HP2L_SC_STS2_WIDTH 1 /* HP2L_SC_STS2 */ +#define WM8285_HP1R_SC_STS2 0x0002 /* HP1R_SC_STS2 */ +#define WM8285_HP1R_SC_STS2_MASK 0x0002 /* HP1R_SC_STS2 */ +#define WM8285_HP1R_SC_STS2_SHIFT 1 /* HP1R_SC_STS2 */ +#define WM8285_HP1R_SC_STS2_WIDTH 1 /* HP1R_SC_STS2 */ +#define WM8285_HP1L_SC_STS2 0x0001 /* HP1L_SC_STS2 */ +#define WM8285_HP1L_SC_STS2_MASK 0x0001 /* HP1L_SC_STS2 */ +#define WM8285_HP1L_SC_STS2_SHIFT 0 /* HP1L_SC_STS2 */ +#define WM8285_HP1L_SC_STS2_WIDTH 1 /* HP1L_SC_STS2 */ + +/* + * R6540 (0x198C) - IRQ2 Raw Status 13 + */ +#define WM8285_SPKOUTR_ENABLE_DONE_STS2 0x0080 /* SPKOUTR_ENABLE_DONE_STS2 */ +#define WM8285_SPKOUTR_ENABLE_DONE_STS2_MASK 0x0080 /* SPKOUTR_ENABLE_DONE_STS2 */ +#define WM8285_SPKOUTR_ENABLE_DONE_STS2_SHIFT 7 /* SPKOUTR_ENABLE_DONE_STS2 */ +#define WM8285_SPKOUTR_ENABLE_DONE_STS2_WIDTH 1 /* SPKOUTR_ENABLE_DONE_STS2 */ +#define WM8285_SPKOUTL_ENABLE_DONE_STS2 0x0040 /* SPKOUTL_ENABLE_DONE_STS2 */ +#define WM8285_SPKOUTL_ENABLE_DONE_STS2_MASK 0x0040 /* SPKOUTL_ENABLE_DONE_STS2 */ +#define WM8285_SPKOUTL_ENABLE_DONE_STS2_SHIFT 6 /* SPKOUTL_ENABLE_DONE_STS2 */ +#define WM8285_SPKOUTL_ENABLE_DONE_STS2_WIDTH 1 /* SPKOUTL_ENABLE_DONE_STS2 */ +#define WM8285_HP3R_ENABLE_DONE_STS2 0x0020 /* HP3R_ENABLE_DONE_STS2 */ +#define WM8285_HP3R_ENABLE_DONE_STS2_MASK 0x0020 /* HP3R_ENABLE_DONE_STS2 */ +#define WM8285_HP3R_ENABLE_DONE_STS2_SHIFT 5 /* HP3R_ENABLE_DONE_STS2 */ +#define WM8285_HP3R_ENABLE_DONE_STS2_WIDTH 1 /* HP3R_ENABLE_DONE_STS2 */ +#define WM8285_HP3L_ENABLE_DONE_STS2 0x0010 /* HP3L_ENABLE_DONE_STS2 */ +#define WM8285_HP3L_ENABLE_DONE_STS2_MASK 0x0010 /* HP3L_ENABLE_DONE_STS2 */ +#define WM8285_HP3L_ENABLE_DONE_STS2_SHIFT 4 /* HP3L_ENABLE_DONE_STS2 */ +#define WM8285_HP3L_ENABLE_DONE_STS2_WIDTH 1 /* HP3L_ENABLE_DONE_STS2 */ +#define WM8285_HP2R_ENABLE_DONE_STS2 0x0008 /* HP2R_ENABLE_DONE_STS2 */ +#define WM8285_HP2R_ENABLE_DONE_STS2_MASK 0x0008 /* HP2R_ENABLE_DONE_STS2 */ +#define WM8285_HP2R_ENABLE_DONE_STS2_SHIFT 3 /* HP2R_ENABLE_DONE_STS2 */ +#define WM8285_HP2R_ENABLE_DONE_STS2_WIDTH 1 /* HP2R_ENABLE_DONE_STS2 */ +#define WM8285_HP2L_ENABLE_DONE_STS2 0x0004 /* HP2L_ENABLE_DONE_STS2 */ +#define WM8285_HP2L_ENABLE_DONE_STS2_MASK 0x0004 /* HP2L_ENABLE_DONE_STS2 */ +#define WM8285_HP2L_ENABLE_DONE_STS2_SHIFT 2 /* HP2L_ENABLE_DONE_STS2 */ +#define WM8285_HP2L_ENABLE_DONE_STS2_WIDTH 1 /* HP2L_ENABLE_DONE_STS2 */ +#define WM8285_HP1R_ENABLE_DONE_STS2 0x0002 /* HP1R_ENABLE_DONE_STS2 */ +#define WM8285_HP1R_ENABLE_DONE_STS2_MASK 0x0002 /* HP1R_ENABLE_DONE_STS2 */ +#define WM8285_HP1R_ENABLE_DONE_STS2_SHIFT 1 /* HP1R_ENABLE_DONE_STS2 */ +#define WM8285_HP1R_ENABLE_DONE_STS2_WIDTH 1 /* HP1R_ENABLE_DONE_STS2 */ +#define WM8285_HP1L_ENABLE_DONE_STS2 0x0001 /* HP1L_ENABLE_DONE_STS2 */ +#define WM8285_HP1L_ENABLE_DONE_STS2_MASK 0x0001 /* HP1L_ENABLE_DONE_STS2 */ +#define WM8285_HP1L_ENABLE_DONE_STS2_SHIFT 0 /* HP1L_ENABLE_DONE_STS2 */ +#define WM8285_HP1L_ENABLE_DONE_STS2_WIDTH 1 /* HP1L_ENABLE_DONE_STS2 */ + +/* + * R6541 (0x198D) - IRQ2 Raw Status 14 + */ +#define WM8285_SPKOUTR_DISABLE_DONE_STS2 0x0080 /* SPKOUTR_DISABLE_DONE_STS2 */ +#define WM8285_SPKOUTR_DISABLE_DONE_STS2_MASK 0x0080 /* SPKOUTR_DISABLE_DONE_STS2 */ +#define WM8285_SPKOUTR_DISABLE_DONE_STS2_SHIFT 7 /* SPKOUTR_DISABLE_DONE_STS2 */ +#define WM8285_SPKOUTR_DISABLE_DONE_STS2_WIDTH 1 /* SPKOUTR_DISABLE_DONE_STS2 */ +#define WM8285_SPKOUTL_DISABLE_DONE_STS2 0x0040 /* SPKOUTL_DISABLE_DONE_STS2 */ +#define WM8285_SPKOUTL_DISABLE_DONE_STS2_MASK 0x0040 /* SPKOUTL_DISABLE_DONE_STS2 */ +#define WM8285_SPKOUTL_DISABLE_DONE_STS2_SHIFT 6 /* SPKOUTL_DISABLE_DONE_STS2 */ +#define WM8285_SPKOUTL_DISABLE_DONE_STS2_WIDTH 1 /* SPKOUTL_DISABLE_DONE_STS2 */ +#define WM8285_HP3R_DISABLE_DONE_STS2 0x0020 /* HP3R_DISABLE_DONE_STS2 */ +#define WM8285_HP3R_DISABLE_DONE_STS2_MASK 0x0020 /* HP3R_DISABLE_DONE_STS2 */ +#define WM8285_HP3R_DISABLE_DONE_STS2_SHIFT 5 /* HP3R_DISABLE_DONE_STS2 */ +#define WM8285_HP3R_DISABLE_DONE_STS2_WIDTH 1 /* HP3R_DISABLE_DONE_STS2 */ +#define WM8285_HP3L_DISABLE_DONE_STS2 0x0010 /* HP3L_DISABLE_DONE_STS2 */ +#define WM8285_HP3L_DISABLE_DONE_STS2_MASK 0x0010 /* HP3L_DISABLE_DONE_STS2 */ +#define WM8285_HP3L_DISABLE_DONE_STS2_SHIFT 4 /* HP3L_DISABLE_DONE_STS2 */ +#define WM8285_HP3L_DISABLE_DONE_STS2_WIDTH 1 /* HP3L_DISABLE_DONE_STS2 */ +#define WM8285_HP2R_DISABLE_DONE_STS2 0x0008 /* HP2R_DISABLE_DONE_STS2 */ +#define WM8285_HP2R_DISABLE_DONE_STS2_MASK 0x0008 /* HP2R_DISABLE_DONE_STS2 */ +#define WM8285_HP2R_DISABLE_DONE_STS2_SHIFT 3 /* HP2R_DISABLE_DONE_STS2 */ +#define WM8285_HP2R_DISABLE_DONE_STS2_WIDTH 1 /* HP2R_DISABLE_DONE_STS2 */ +#define WM8285_HP2L_DISABLE_DONE_STS2 0x0004 /* HP2L_DISABLE_DONE_STS2 */ +#define WM8285_HP2L_DISABLE_DONE_STS2_MASK 0x0004 /* HP2L_DISABLE_DONE_STS2 */ +#define WM8285_HP2L_DISABLE_DONE_STS2_SHIFT 2 /* HP2L_DISABLE_DONE_STS2 */ +#define WM8285_HP2L_DISABLE_DONE_STS2_WIDTH 1 /* HP2L_DISABLE_DONE_STS2 */ +#define WM8285_HP1R_DISABLE_DONE_STS2 0x0002 /* HP1R_DISABLE_DONE_STS2 */ +#define WM8285_HP1R_DISABLE_DONE_STS2_MASK 0x0002 /* HP1R_DISABLE_DONE_STS2 */ +#define WM8285_HP1R_DISABLE_DONE_STS2_SHIFT 1 /* HP1R_DISABLE_DONE_STS2 */ +#define WM8285_HP1R_DISABLE_DONE_STS2_WIDTH 1 /* HP1R_DISABLE_DONE_STS2 */ +#define WM8285_HP1L_DISABLE_DONE_STS2 0x0001 /* HP1L_DISABLE_DONE_STS2 */ +#define WM8285_HP1L_DISABLE_DONE_STS2_MASK 0x0001 /* HP1L_DISABLE_DONE_STS2 */ +#define WM8285_HP1L_DISABLE_DONE_STS2_SHIFT 0 /* HP1L_DISABLE_DONE_STS2 */ +#define WM8285_HP1L_DISABLE_DONE_STS2_WIDTH 1 /* HP1L_DISABLE_DONE_STS2 */ + +/* + * R6542 (0x198E) - IRQ2 Raw Status 15 + */ +#define WM8285_SPK_OVERHEAT_WARN_STS2 0x0004 /* SPK_OVERHEAT_WARN_STS2 */ +#define WM8285_SPK_OVERHEAT_WARN_STS2_MASK 0x0004 /* SPK_OVERHEAT_WARN_STS2 */ +#define WM8285_SPK_OVERHEAT_WARN_STS2_SHIFT 2 /* SPK_OVERHEAT_WARN_STS2 */ +#define WM8285_SPK_OVERHEAT_WARN_STS2_WIDTH 1 /* SPK_OVERHEAT_WARN_STS2 */ +#define WM8285_SPK_OVERHEAT_STS2 0x0002 /* SPK_OVERHEAT_STS2 */ +#define WM8285_SPK_OVERHEAT_STS2_MASK 0x0002 /* SPK_OVERHEAT_STS2 */ +#define WM8285_SPK_OVERHEAT_STS2_SHIFT 1 /* SPK_OVERHEAT_STS2 */ +#define WM8285_SPK_OVERHEAT_STS2_WIDTH 1 /* SPK_OVERHEAT_STS2 */ +#define WM8285_SPK_SHUTDOWN_STS2 0x0001 /* SPK_SHUTDOWN_STS2 */ +#define WM8285_SPK_SHUTDOWN_STS2_MASK 0x0001 /* SPK_SHUTDOWN_STS2 */ +#define WM8285_SPK_SHUTDOWN_STS2_SHIFT 0 /* SPK_SHUTDOWN_STS2 */ +#define WM8285_SPK_SHUTDOWN_STS2_WIDTH 1 /* SPK_SHUTDOWN_STS2 */ + +/* + * R6662 (0x1A06) - Interrupt Debounce 7 + */ +#define WM8285_MICD_CLAMP_DB 0x0010 /* MICD_CLAMP_DB */ +#define WM8285_MICD_CLAMP_DB_MASK 0x0010 /* MICD_CLAMP_DB */ +#define WM8285_MICD_CLAMP_DB_SHIFT 4 /* MICD_CLAMP_DB */ +#define WM8285_MICD_CLAMP_DB_WIDTH 1 /* MICD_CLAMP_DB */ +#define WM8285_JD2_DB 0x0004 /* JD2_DB */ +#define WM8285_JD2_DB_MASK 0x0004 /* JD2_DB */ +#define WM8285_JD2_DB_SHIFT 2 /* JD2_DB */ +#define WM8285_JD2_DB_WIDTH 1 /* JD2_DB */ +#define WM8285_JD1_DB 0x0001 /* JD1_DB */ +#define WM8285_JD1_DB_MASK 0x0001 /* JD1_DB */ +#define WM8285_JD1_DB_SHIFT 0 /* JD1_DB */ +#define WM8285_JD1_DB_WIDTH 1 /* JD1_DB */ + +/* + * R6670 (0x1A0E) - Interrupt Debounce 15 + */ +#define WM8285_SPK_OVERHEAT_WARN_DB 0x0004 /* SPK_OVERHEAT_WARN_DB */ +#define WM8285_SPK_OVERHEAT_WARN_DB_MASK 0x0004 /* SPK_OVERHEAT_WARN_DB */ +#define WM8285_SPK_OVERHEAT_WARN_DB_SHIFT 2 /* SPK_OVERHEAT_WARN_DB */ +#define WM8285_SPK_OVERHEAT_WARN_DB_WIDTH 1 /* SPK_OVERHEAT_WARN_DB */ +#define WM8285_SPK_OVERHEAT_DB 0x0002 /* SPK_OVERHEAT_DB */ +#define WM8285_SPK_OVERHEAT_DB_MASK 0x0002 /* SPK_OVERHEAT_DB */ +#define WM8285_SPK_OVERHEAT_DB_SHIFT 1 /* SPK_OVERHEAT_DB */ +#define WM8285_SPK_OVERHEAT_DB_WIDTH 1 /* SPK_OVERHEAT_DB */ + +/* + * R6848 (0x1AC0) - GPIO Debounce Config + */ +#define WM8285_GP_DBTIME_MASK 0x000F /* GP_DBTIME - [3:0] */ +#define WM8285_GP_DBTIME_SHIFT 0 /* GP_DBTIME - [3:0] */ +#define WM8285_GP_DBTIME_WIDTH 4 /* GP_DBTIME - [3:0] */ + #endif From 93bcdb1a4d4114452e6250f7d7abb7ad8b7be6ec Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Thu, 10 Jul 2014 14:01:19 +0100 Subject: [PATCH 0500/1167] ASoC: wm8285: Initial driver for WM8285/WM1840 The WM8285 is a highly-integrated low-power audio and sensor hub system for smartphones, tablets and other portable audio devices. IN1L and IN2 are multiplexed on wm8285, this patch only adds basic support for this. Support for having and analogue and a digital input connected to the same muxed input is still missing. But this enables the common use-cases of a digital input or two analogue inputs. Change-Id: I2a0b00f1bb7d92aaea26191d5910790c6461274b Signed-off-by: Nariman Poushin Signed-off-by: Charles Keepax --- sound/soc/codecs/Kconfig | 8 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/arizona.c | 374 +++++- sound/soc/codecs/arizona.h | 25 +- sound/soc/codecs/wm8285.c | 2565 ++++++++++++++++++++++++++++++++++++ sound/soc/codecs/wm8285.h | 25 + sound/soc/codecs/wm_adsp.c | 254 +++- sound/soc/codecs/wm_adsp.h | 5 + 8 files changed, 3149 insertions(+), 109 deletions(-) create mode 100644 sound/soc/codecs/wm8285.c create mode 100644 sound/soc/codecs/wm8285.h diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 8d11bd2d912..aa531e6c79a 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -84,6 +84,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_WM5100 if I2C select SND_SOC_WM5102 if MFD_WM5102 select SND_SOC_FLORIDA if MFD_FLORIDA + select SND_SOC_WM8285 if MFD_WM8285 select SND_SOC_WM8350 if MFD_WM8350 select SND_SOC_WM8400 if MFD_WM8400 select SND_SOC_WM8510 if SND_SOC_I2C_AND_SPI @@ -146,11 +147,13 @@ config SND_SOC_ARIZONA tristate default y if SND_SOC_WM5102=y default y if SND_SOC_FLORIDA=y + default y if SND_SOC_WM8285=y default y if SND_SOC_WM8997=y default y if SND_SOC_WM8998=y default y if SND_SOC_CS47L24=y default m if SND_SOC_WM5102=m default m if SND_SOC_FLORIDA=m + default m if SND_SOC_WM8285=m default m if SND_SOC_WM8997=m default m if SND_SOC_WM8998=m default m if SND_SOC_CS47L24=m @@ -164,10 +167,12 @@ config SND_SOC_WM_ADSP tristate default y if SND_SOC_WM5102=y default y if SND_SOC_FLORIDA=y + default y if SND_SOC_WM8285=y default y if SND_SOC_WM2200=y default y if SND_SOC_CS47L24=y default m if SND_SOC_WM5102=m default m if SND_SOC_FLORIDA=m + default m if SND_SOC_WM8285=m default m if SND_SOC_WM2200=m default m if SND_SOC_CS47L24=m @@ -397,6 +402,9 @@ config SND_SOC_WM5102 config SND_SOC_FLORIDA tristate +config SND_SOC_WM8285 + tristate + config SND_SOC_WM8350 tristate diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 8fbb69dab25..deecadc6fd0 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -76,6 +76,7 @@ snd-soc-wm2200-objs := wm2200.o snd-soc-wm5100-objs := wm5100.o wm5100-tables.o snd-soc-wm5102-objs := wm5102.o snd-soc-florida-objs := florida.o +snd-soc-wm8285-objs := wm8285.o snd-soc-wm8350-objs := wm8350.o snd-soc-wm8400-objs := wm8400.o snd-soc-wm8510-objs := wm8510.o @@ -202,6 +203,7 @@ obj-$(CONFIG_SND_SOC_WM2200) += snd-soc-wm2200.o obj-$(CONFIG_SND_SOC_WM5100) += snd-soc-wm5100.o obj-$(CONFIG_SND_SOC_WM5102) += snd-soc-wm5102.o obj-$(CONFIG_SND_SOC_FLORIDA) += snd-soc-florida.o +obj-$(CONFIG_SND_SOC_WM8285) += snd-soc-wm8285.o obj-$(CONFIG_SND_SOC_WM8350) += snd-soc-wm8350.o obj-$(CONFIG_SND_SOC_WM8400) += snd-soc-wm8400.o obj-$(CONFIG_SND_SOC_WM8510) += snd-soc-wm8510.o diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 2e5438e97b7..0da3abd0d47 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -262,6 +262,21 @@ static const char * const arizona_dmic_inputs[] = { "IN4R", }; +static const char * const wm8285_dmic_inputs[] = { + "IN1L Mux", + "IN1R", + "IN2L Mux", + "IN2R Mux", + "IN3L", + "IN3R", + "IN4L", + "IN4R", + "IN5L", + "IN5R", + "IN6L", + "IN6R", +}; + int arizona_init_input(struct snd_soc_codec *codec) { struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); @@ -276,8 +291,17 @@ int arizona_init_input(struct snd_soc_codec *codec) routes[0].source = arizona_dmic_refs[pdata->dmic_ref[i]]; routes[1].source = arizona_dmic_refs[pdata->dmic_ref[i]]; - routes[0].sink = arizona_dmic_inputs[i * 2]; - routes[1].sink = arizona_dmic_inputs[(i * 2) + 1]; + switch (arizona->type) { + case WM8285: + case WM1840: + routes[0].sink = wm8285_dmic_inputs[i * 2]; + routes[1].sink = wm8285_dmic_inputs[(i * 2) + 1]; + break; + default: + routes[0].sink = arizona_dmic_inputs[i * 2]; + routes[1].sink = arizona_dmic_inputs[(i * 2) + 1]; + break; + } ret = snd_soc_dapm_add_routes(&codec->dapm, routes, 2); } @@ -345,6 +369,10 @@ const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = { "IN3R", "IN4L", "IN4R", + "IN5L", + "IN5R", + "IN6L", + "IN6R", "AIF1RX1", "AIF1RX2", "AIF1RX3", @@ -359,8 +387,12 @@ const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = { "AIF2RX4", "AIF2RX5", "AIF2RX6", + "AIF2RX7", + "AIF2RX8", "AIF3RX1", "AIF3RX2", + "AIF4RX1", + "AIF4RX2", "SLIMRX1", "SLIMRX2", "SLIMRX3", @@ -405,6 +437,24 @@ const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = { "DSP4.4", "DSP4.5", "DSP4.6", + "DSP5.1", + "DSP5.2", + "DSP5.3", + "DSP5.4", + "DSP5.5", + "DSP5.6", + "DSP6.1", + "DSP6.2", + "DSP6.3", + "DSP6.4", + "DSP6.5", + "DSP6.6", + "DSP7.1", + "DSP7.2", + "DSP7.3", + "DSP7.4", + "DSP7.5", + "DSP7.6", "ASRC1L", "ASRC1R", "ASRC2L", @@ -433,6 +483,10 @@ const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = { "ISRC3DEC2", "ISRC3DEC3", "ISRC3DEC4", + "ISRC4INT1", + "ISRC4INT2", + "ISRC4DEC1", + "ISRC4DEC2", }; EXPORT_SYMBOL_GPL(arizona_mixer_texts); @@ -453,6 +507,10 @@ int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = { 0x15, 0x16, 0x17, + 0x18, + 0x19, + 0x1A, + 0x1B, 0x20, /* AIF1RX1 */ 0x21, 0x22, @@ -467,8 +525,12 @@ int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = { 0x2b, 0x2c, 0x2d, + 0x2e, + 0x2f, 0x30, /* AIF3RX1 */ 0x31, + 0x34, /* AIF4RX1 */ + 0x35, 0x38, /* SLIMRX1 */ 0x39, 0x3a, @@ -513,6 +575,24 @@ int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = { 0x83, 0x84, 0x85, + 0x88, /* DSP5.1 */ + 0x89, + 0x8a, + 0x8b, + 0x8c, + 0x8d, + 0xc0, /* DSP6.1 */ + 0xc1, + 0xc2, + 0xc3, + 0xc4, + 0xc5, + 0xc8, /* DSP7.1 */ + 0xc9, + 0xca, + 0xcb, + 0xcc, + 0xcd, 0x90, /* ASRC1L */ 0x91, 0x92, @@ -541,6 +621,10 @@ int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = { 0xb5, 0xb6, 0xb7, + 0xb8, /* ISRC4INT1 */ + 0xb9, + 0xbc, /* ISRC4DEC1 */ + 0xbd, }; EXPORT_SYMBOL_GPL(arizona_mixer_values); @@ -631,6 +715,11 @@ const struct soc_enum arizona_isrc_fsh[] = { ARIZONA_ISRC3_FSH_SHIFT, 0xf, ARIZONA_RATE_ENUM_SIZE, arizona_rate_text, arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_4_CTRL_1, + ARIZONA_ISRC4_FSH_SHIFT, 0xf, + ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), + }; EXPORT_SYMBOL_GPL(arizona_isrc_fsh); @@ -647,6 +736,11 @@ const struct soc_enum arizona_isrc_fsl[] = { ARIZONA_ISRC3_FSL_SHIFT, 0xf, ARIZONA_RATE_ENUM_SIZE, arizona_rate_text, arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_4_CTRL_2, + ARIZONA_ISRC4_FSL_SHIFT, 0xf, + ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), + }; EXPORT_SYMBOL_GPL(arizona_isrc_fsl); @@ -754,13 +848,46 @@ const struct soc_enum arizona_in_dmic_osr[] = { }; EXPORT_SYMBOL_GPL(arizona_in_dmic_osr); -static const char *arizona_anc_input_src_text[] = { +static const char * const wm8285_in_dmic_osr_text[WM8285_OSR_ENUM_SIZE] = { + "384kHz", "768kHz", "1.536MHz", "3.072MHz", "6.144MHz", +}; + +static const int wm8285_in_dmic_osr_val[WM8285_OSR_ENUM_SIZE] = { + 2, 3, 4, 5, 6, +}; + +const struct soc_enum wm8285_in_dmic_osr[] = { + SOC_VALUE_ENUM_SINGLE(ARIZONA_DMIC1L_CONTROL, WM8285_IN1_OSR_SHIFT, + 0x7, WM8285_OSR_ENUM_SIZE, + wm8285_in_dmic_osr_text, wm8285_in_dmic_osr_val), + SOC_VALUE_ENUM_SINGLE(ARIZONA_DMIC2L_CONTROL, WM8285_IN2_OSR_SHIFT, + 0x7, WM8285_OSR_ENUM_SIZE, + wm8285_in_dmic_osr_text, wm8285_in_dmic_osr_val), + SOC_VALUE_ENUM_SINGLE(ARIZONA_DMIC3L_CONTROL, WM8285_IN3_OSR_SHIFT, + 0x7, WM8285_OSR_ENUM_SIZE, + wm8285_in_dmic_osr_text, wm8285_in_dmic_osr_val), + SOC_VALUE_ENUM_SINGLE(ARIZONA_DMIC4L_CONTROL, WM8285_IN4_OSR_SHIFT, + 0x7, WM8285_OSR_ENUM_SIZE, + wm8285_in_dmic_osr_text, wm8285_in_dmic_osr_val), + SOC_VALUE_ENUM_SINGLE(ARIZONA_DMIC5L_CONTROL, WM8285_IN5_OSR_SHIFT, + 0x7, WM8285_OSR_ENUM_SIZE, + wm8285_in_dmic_osr_text, wm8285_in_dmic_osr_val), + SOC_VALUE_ENUM_SINGLE(ARIZONA_DMIC6L_CONTROL, WM8285_IN6_OSR_SHIFT, + 0x7, WM8285_OSR_ENUM_SIZE, + wm8285_in_dmic_osr_text, wm8285_in_dmic_osr_val), +}; +EXPORT_SYMBOL_GPL(wm8285_in_dmic_osr); + +static const char *arizona_anc_input_src_text[ARIZONA_ANC_INPUT_ENUM_SIZE] = { "None", "IN1L", "IN1R", "IN1L + IN1R", "IN2L", "IN2R", "IN2L + IN2R", - "IN3L", "IN3R", "IN3L + IN3R", "IN4L", "IN4R", "IN4L + IN4R", + "IN3L", "IN3R", "IN3L + IN3R", "IN4L", "IN4R", "IN4L + IN4R", "IN5L", + "IN5R", "IN5L + IN5R", "IN6L", "IN6R", "IN6L + IN6R", }; -static const int arizona_anc_input_src_val[] = { + +static const int arizona_anc_input_src_val[ARIZONA_ANC_INPUT_ENUM_SIZE] = { 0x0000, 0x0101, 0x0201, 0x0301, 0x0102, 0x0202, 0x0302, - 0x0103, 0x0203, 0x0303, 0x0104, 0x0204, 0x0304, + 0x0103, 0x0203, 0x0303, 0x0104, 0x0204, 0x0304, 0x0105, + 0x0205, 0x0305, 0x0106, 0x0206, 0x0306, }; int arizona_put_anc_input(struct snd_kcontrol *kcontrol, @@ -783,6 +910,7 @@ int arizona_put_anc_input(struct snd_kcontrol *kcontrol, shift = ARIZONA_IN_RXANCL_SEL_SHIFT; break; case ARIZONA_FCR_ADC_REFORMATTER_CONTROL: + case WM8285_FCR_ADC_REFORMATTER_CONTROL: mask = ARIZONA_IN_RXANCR_SEL_MASK; shift = ARIZONA_IN_RXANCR_SEL_SHIFT; break; @@ -803,17 +931,31 @@ EXPORT_SYMBOL_GPL(arizona_put_anc_input); const struct soc_enum arizona_anc_input_src[] = { SOC_VALUE_ENUM_SINGLE(ARIZONA_FCL_ADC_REFORMATTER_CONTROL, ARIZONA_FCL_MIC_MODE_SEL_SHIFT, 0, - ARRAY_SIZE(arizona_anc_input_src_text), + WM8280_ANC_INPUT_ENUM_SIZE, arizona_anc_input_src_text, arizona_anc_input_src_val), SOC_VALUE_ENUM_SINGLE(ARIZONA_FCR_ADC_REFORMATTER_CONTROL, ARIZONA_FCR_MIC_MODE_SEL_SHIFT, 0, - ARRAY_SIZE(arizona_anc_input_src_text), + WM8280_ANC_INPUT_ENUM_SIZE, arizona_anc_input_src_text, arizona_anc_input_src_val), }; EXPORT_SYMBOL_GPL(arizona_anc_input_src); +const struct soc_enum wm8285_anc_input_src[] = { + SOC_VALUE_ENUM_SINGLE(ARIZONA_FCL_ADC_REFORMATTER_CONTROL, + ARIZONA_FCL_MIC_MODE_SEL_SHIFT, 0, + WM8285_ANC_INPUT_ENUM_SIZE, + arizona_anc_input_src_text, + arizona_anc_input_src_val), + SOC_VALUE_ENUM_SINGLE(WM8285_FCR_ADC_REFORMATTER_CONTROL, + ARIZONA_FCR_MIC_MODE_SEL_SHIFT, 0, + WM8285_ANC_INPUT_ENUM_SIZE, + arizona_anc_input_src_text, + arizona_anc_input_src_val), +}; +EXPORT_SYMBOL_GPL(wm8285_anc_input_src); + static const char *arizona_output_anc_src_text[] = { "None", "RXANCL", "RXANCR", }; @@ -1390,70 +1532,159 @@ static int arizona_set_opclk(struct snd_soc_codec *codec, unsigned int clk, return -EINVAL; } -int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id, - int source, unsigned int freq, int dir) +static int arizona_get_sysclk_setting(unsigned int freq) { - struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); - struct arizona *arizona = priv->arizona; - char *name; - unsigned int reg; - unsigned int mask = ARIZONA_SYSCLK_FREQ_MASK | ARIZONA_SYSCLK_SRC_MASK; - unsigned int val = source << ARIZONA_SYSCLK_SRC_SHIFT; - unsigned int *clk; - - switch (clk_id) { - case ARIZONA_CLK_SYSCLK: - name = "SYSCLK"; - reg = ARIZONA_SYSTEM_CLOCK_1; - clk = &priv->sysclk; - mask |= ARIZONA_SYSCLK_FRAC; - break; - case ARIZONA_CLK_ASYNCCLK: - name = "ASYNCCLK"; - reg = ARIZONA_ASYNC_CLOCK_1; - clk = &priv->asyncclk; - break; - case ARIZONA_CLK_OPCLK: - case ARIZONA_CLK_ASYNC_OPCLK: - return arizona_set_opclk(codec, clk_id, freq); + switch (freq) { + case 0: + case 5644800: + case 6144000: + return 0; + case 11289600: + case 12288000: + return ARIZONA_CLK_12MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; + case 22579200: + case 24576000: + return ARIZONA_CLK_24MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; + case 45158400: + case 49152000: + return ARIZONA_CLK_49MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; + case 67737600: + case 73728000: + return ARIZONA_CLK_73MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; + case 90316800: + case 98304000: + return ARIZONA_CLK_98MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; + case 135475200: + case 147456000: + return ARIZONA_CLK_147MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; default: return -EINVAL; } +} +static int wm8285_get_sysclk_setting(unsigned int freq) +{ switch (freq) { - case 5644800: - case 6144000: - break; + case 0: + case 5644800: + case 6144000: + return 0; case 11289600: case 12288000: - val |= ARIZONA_CLK_12MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; - break; + return ARIZONA_CLK_12MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; case 22579200: case 24576000: - val |= ARIZONA_CLK_24MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; - break; + return ARIZONA_CLK_24MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; case 45158400: case 49152000: - val |= ARIZONA_CLK_49MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; - break; - case 67737600: - case 73728000: - val |= ARIZONA_CLK_73MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; - break; + return ARIZONA_CLK_49MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; case 90316800: case 98304000: - val |= ARIZONA_CLK_98MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; - break; + return WM8285_CLK_98MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; + default: + return -EINVAL; + } +} + +static int wm8285_get_dspclk_setting(unsigned int freq) +{ + switch (freq) { + case 0: + return 0; + /* For now we only support top speed for the DSP */ case 135475200: case 147456000: - val |= ARIZONA_CLK_147MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; + return WM8285_DSP_CLK_147MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; + default: + return -EINVAL; + } +} + +int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id, + int source, unsigned int freq, int dir) +{ + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; + int ret = 0; + char *name; + unsigned int reg; + unsigned int mask = ARIZONA_SYSCLK_FREQ_MASK | ARIZONA_SYSCLK_SRC_MASK; + unsigned int val = source << ARIZONA_SYSCLK_SRC_SHIFT; + int clk_freq; + unsigned int *clk; + + switch (arizona->type) { + case WM8997: + case WM8998: + case WM1814: + case WM5102: + case WM8280: + case WM5110: + case WM1831: + case CS47L24: + switch (clk_id) { + case ARIZONA_CLK_SYSCLK: + name = "SYSCLK"; + reg = ARIZONA_SYSTEM_CLOCK_1; + clk = &priv->sysclk; + mask |= ARIZONA_SYSCLK_FRAC; + clk_freq = arizona_get_sysclk_setting(freq); + break; + case ARIZONA_CLK_ASYNCCLK: + name = "ASYNCCLK"; + reg = ARIZONA_ASYNC_CLOCK_1; + clk = &priv->asyncclk; + clk_freq = arizona_get_sysclk_setting(freq); + break; + case ARIZONA_CLK_OPCLK: + case ARIZONA_CLK_ASYNC_OPCLK: + return arizona_set_opclk(codec, clk_id, freq); + default: + return -EINVAL; + } break; - case 0: + default: + switch (clk_id) { + case ARIZONA_CLK_SYSCLK: + name = "SYSCLK"; + reg = ARIZONA_SYSTEM_CLOCK_1; + clk = &priv->sysclk; + clk_freq = wm8285_get_sysclk_setting(freq); + mask |= ARIZONA_SYSCLK_FRAC; + break; + case ARIZONA_CLK_ASYNCCLK: + name = "ASYNCCLK"; + reg = ARIZONA_ASYNC_CLOCK_1; + clk = &priv->asyncclk; + clk_freq = wm8285_get_sysclk_setting(freq); + break; + case ARIZONA_CLK_OPCLK: + case ARIZONA_CLK_ASYNC_OPCLK: + return arizona_set_opclk(codec, clk_id, freq); + case ARIZONA_CLK_DSPCLK: + name = "DSPCLK"; + reg = WM8285_DSP_CLOCK_1; + clk = &priv->dspclk; + clk_freq = wm8285_get_dspclk_setting(freq); + break; + default: + return -EINVAL; + } + break; + } + + if (clk_freq < 0) { + dev_err(arizona->dev, "Failed to get clk setting for %dHZ\n", + freq); + return ret; + } + + val |= clk_freq; + + if (freq == 0) { dev_dbg(arizona->dev, "%s cleared\n", name); *clk = freq; return 0; - default: - return -EINVAL; } *clk = freq; @@ -2282,20 +2513,17 @@ static int arizona_calc_fratio(struct arizona_fll *fll, } switch (fll->arizona->type) { + case WM5102: + case WM8997: + return init_ratio; case WM8280: case WM5110: if (fll->arizona->rev < 3 || sync) return init_ratio; break; - case WM8998: - case WM1814: - case WM1831: - case CS47L24: + default: if (sync) return init_ratio; - break; - default: - return init_ratio; } cfg->fratio = init_ratio - 1; @@ -2468,15 +2696,34 @@ static int arizona_is_enabled_fll(struct arizona_fll *fll) static int arizona_wait_for_fll(struct arizona_fll *fll, bool requested) { struct arizona *arizona = fll->arizona; + unsigned int reg, mask; unsigned int val = 0; bool status; int i; arizona_fll_dbg(fll, "Waiting for FLL...\n"); + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8280: + case WM8998: + case WM1814: + case WM1831: + case CS47L24: + reg = ARIZONA_INTERRUPT_RAW_STATUS_5; + mask = ARIZONA_FLL1_CLOCK_OK_STS; + break; + default: + reg = WM8285_IRQ1_RAW_STATUS_2; + mask = WM8285_FLL1_LOCK_STS1; + break; + } + for (i = 0; i < 25; i++) { - regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_5, &val); - status = val & (ARIZONA_FLL1_CLOCK_OK_STS << (fll->id - 1)); + regmap_read(arizona->regmap, reg, &val); + status = val & (mask << (fll->id - 1)); if (status == requested) return 0; msleep(10); @@ -2807,6 +3054,8 @@ int arizona_enable_force_bypass(struct snd_soc_codec *codec) ARIZONA_MICB2_BYPASS, ARIZONA_MICB2_BYPASS); regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_3, ARIZONA_MICB3_BYPASS, ARIZONA_MICB3_BYPASS); + regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_4, + ARIZONA_MICB4_BYPASS, ARIZONA_MICB4_BYPASS); return 0; } @@ -2837,6 +3086,9 @@ int arizona_disable_force_bypass(struct snd_soc_codec *codec) if (!micbias[2].bypass && micbias[2].mV) regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_3, ARIZONA_MICB3_BYPASS, 0); + if (!micbias[3].bypass && micbias[3].mV) + regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_4, + ARIZONA_MICB4_BYPASS, 0); return 0; } diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index eb0d1922f4b..d51fe2bdaf7 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -26,14 +26,17 @@ #define ARIZONA_CLK_SYSCLK_2 5 #define ARIZONA_CLK_SYSCLK_3 6 #define ARIZONA_CLK_ASYNCCLK_2 7 +#define ARIZONA_CLK_DSPCLK 8 #define ARIZONA_CLK_SRC_MCLK1 0x0 #define ARIZONA_CLK_SRC_MCLK2 0x1 #define ARIZONA_CLK_SRC_FLL1 0x4 #define ARIZONA_CLK_SRC_FLL2 0x5 +#define ARIZONA_CLK_SRC_FLL3 0x6 #define ARIZONA_CLK_SRC_AIF1BCLK 0x8 #define ARIZONA_CLK_SRC_AIF2BCLK 0x9 #define ARIZONA_CLK_SRC_AIF3BCLK 0xa +#define ARIZONA_CLK_SRC_AIF4BCLK 0xb #define ARIZONA_FLL_SRC_NONE -1 #define ARIZONA_FLL_SRC_MCLK1 0 @@ -44,9 +47,11 @@ #define ARIZONA_FLL_SRC_AIF1BCLK 8 #define ARIZONA_FLL_SRC_AIF2BCLK 9 #define ARIZONA_FLL_SRC_AIF3BCLK 10 +#define ARIZONA_FLL_SRC_AIF4BCLK 11 #define ARIZONA_FLL_SRC_AIF1LRCLK 12 #define ARIZONA_FLL_SRC_AIF2LRCLK 13 #define ARIZONA_FLL_SRC_AIF3LRCLK 14 +#define ARIZONA_FLL_SRC_AIF4LRCLK 15 #define ARIZONA_MIXER_VOL_MASK 0x00FE #define ARIZONA_MIXER_VOL_SHIFT 1 @@ -57,11 +62,18 @@ #define ARIZONA_CLK_24MHZ 2 #define ARIZONA_CLK_49MHZ 3 #define ARIZONA_CLK_73MHZ 4 +#define WM8285_CLK_98MHZ 4 #define ARIZONA_CLK_98MHZ 5 #define ARIZONA_CLK_147MHZ 6 -#define ARIZONA_MAX_DAI 10 -#define ARIZONA_MAX_ADSP 4 +#define WM8285_DSP_CLK_9MHZ 0 +#define WM8285_DSP_CLK_18MHZ 1 +#define WM8285_DSP_CLK_36MHZ 2 +#define WM8285_DSP_CLK_73MHZ 3 +#define WM8285_DSP_CLK_147MHZ 4 + +#define ARIZONA_MAX_DAI 11 +#define ARIZONA_MAX_ADSP 7 struct arizona; struct wm_adsp; @@ -76,13 +88,14 @@ struct arizona_priv { struct arizona *arizona; int sysclk; int asyncclk; + int dspclk; struct arizona_dai_priv dai[ARIZONA_MAX_DAI]; int num_inputs; unsigned int in_pending; }; -#define ARIZONA_NUM_MIXER_INPUTS 104 +#define ARIZONA_NUM_MIXER_INPUTS 134 extern const unsigned int arizona_mixer_tlv[]; extern const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS]; @@ -204,9 +217,13 @@ extern int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS]; {.base = xbase, .num_regs = 20, \ .mask = ~ARIZONA_EQ1_B1_MODE }) } +#define WM8285_OSR_ENUM_SIZE 5 #define ARIZONA_RATE_ENUM_SIZE 4 #define ARIZONA_SYNC_RATE_ENUM_SIZE 3 #define ARIZONA_SAMPLE_RATE_ENUM_SIZE 14 +#define ARIZONA_ANC_INPUT_ENUM_SIZE 19 +#define WM8280_ANC_INPUT_ENUM_SIZE 13 +#define WM8285_ANC_INPUT_ENUM_SIZE 19 extern const char *arizona_rate_text[ARIZONA_RATE_ENUM_SIZE]; extern const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE]; @@ -236,8 +253,10 @@ extern const struct soc_enum arizona_lhpf4_mode; extern const struct soc_enum arizona_ng_hold; extern const struct soc_enum arizona_in_hpf_cut_enum; extern const struct soc_enum arizona_in_dmic_osr[]; +extern const struct soc_enum wm8285_in_dmic_osr[]; extern const struct soc_enum arizona_anc_input_src[]; +extern const struct soc_enum wm8285_anc_input_src[]; extern const struct soc_enum arizona_output_anc_src[]; extern int arizona_put_anc_input(struct snd_kcontrol *kcontrol, diff --git a/sound/soc/codecs/wm8285.c b/sound/soc/codecs/wm8285.c new file mode 100644 index 00000000000..560ece0df50 --- /dev/null +++ b/sound/soc/codecs/wm8285.c @@ -0,0 +1,2565 @@ +/* + * wm8285.c -- ALSA SoC Audio driver for WM8285-class devices + * + * Copyright 2014 Cirrus Logic + * + * Author: Nariman Poushin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "arizona.h" +#include "wm_adsp.h" +#include "wm8285.h" + +#define WM8285_NUM_ADSP 7 + +#define WM8285_DEFAULT_FRAGMENTS 1 +#define WM8285_DEFAULT_FRAGMENT_SIZE 4096 + +struct wm8285_compr { + struct mutex lock; + + struct snd_compr_stream *stream; + struct wm_adsp *adsp; + + size_t total_copied; + bool trig; + bool forced; +}; + +struct wm8285_priv { + struct arizona_priv core; + struct arizona_fll fll[3]; + struct wm8285_compr compr_info; + + struct mutex fw_lock; +}; + +static const struct wm_adsp_region wm8285_dsp1_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x080000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x0e0000 }, + { .type = WMFW_ADSP2_XM, .base = 0x0c0000 }, + { .type = WMFW_ADSP2_YM, .base = 0x0a0000 }, +}; + +static const struct wm_adsp_region wm8285_dsp2_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x100000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x160000 }, + { .type = WMFW_ADSP2_XM, .base = 0x120000 }, + { .type = WMFW_ADSP2_YM, .base = 0x140000 }, +}; + +static const struct wm_adsp_region wm8285_dsp3_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x180000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x1e0000 }, + { .type = WMFW_ADSP2_XM, .base = 0x1a0000 }, + { .type = WMFW_ADSP2_YM, .base = 0x1c8000 }, +}; + +static const struct wm_adsp_region wm8285_dsp4_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x200000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x260000 }, + { .type = WMFW_ADSP2_XM, .base = 0x220000 }, + { .type = WMFW_ADSP2_YM, .base = 0x240000 }, +}; + +static const struct wm_adsp_region wm8285_dsp5_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x280000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x2e0000 }, + { .type = WMFW_ADSP2_XM, .base = 0x2a0000 }, + { .type = WMFW_ADSP2_YM, .base = 0x2c0000 }, +}; + +static const struct wm_adsp_region wm8285_dsp6_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x300000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x360000 }, + { .type = WMFW_ADSP2_XM, .base = 0x320000 }, + { .type = WMFW_ADSP2_YM, .base = 0x340000 }, +}; + +static const struct wm_adsp_region wm8285_dsp7_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x380000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x3e0000 }, + { .type = WMFW_ADSP2_XM, .base = 0x3a0000 }, + { .type = WMFW_ADSP2_YM, .base = 0x3c0000 }, +}; + +static const struct wm_adsp_region *wm8285_dsp_regions[] = { + wm8285_dsp1_regions, + wm8285_dsp2_regions, + wm8285_dsp3_regions, + wm8285_dsp4_regions, + wm8285_dsp5_regions, + wm8285_dsp6_regions, + wm8285_dsp7_regions, +}; + +static const int wm_adsp2_control_bases[] = { + WM8285_DSP1_CONFIG, + WM8285_DSP2_CONFIG, + WM8285_DSP3_CONFIG, + WM8285_DSP4_CONFIG, + WM8285_DSP5_CONFIG, + WM8285_DSP6_CONFIG, + WM8285_DSP7_CONFIG, +}; + +static const char * const wm8285_inmux_texts[] = { + "A", + "B", +}; + +static const SOC_ENUM_SINGLE_DECL(wm8285_in1mux_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_SRC_SHIFT, + wm8285_inmux_texts); + +static const SOC_ENUM_SINGLE_DECL(wm8285_in2muxl_enum, + ARIZONA_ADC_DIGITAL_VOLUME_2L, + ARIZONA_IN2L_SRC_SHIFT, + wm8285_inmux_texts); +static const SOC_ENUM_SINGLE_DECL(wm8285_in2muxr_enum, + ARIZONA_ADC_DIGITAL_VOLUME_2R, + ARIZONA_IN2R_SRC_SHIFT, + wm8285_inmux_texts); + +static const struct snd_kcontrol_new wm8285_in1mux = + SOC_DAPM_ENUM("IN1L Mux", wm8285_in1mux_enum); + +static const struct snd_kcontrol_new wm8285_in2mux[2] = { + SOC_DAPM_ENUM("IN2L Mux", wm8285_in2muxl_enum), + SOC_DAPM_ENUM("IN2R Mux", wm8285_in2muxr_enum), +}; + +static int wm8285_virt_dsp_power_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct wm8285_priv *wm8285 = snd_soc_codec_get_drvdata(w->codec); + + mutex_lock(&wm8285->compr_info.lock); + + if (!wm8285->compr_info.stream) + wm8285->compr_info.trig = false; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + wm8285->compr_info.forced = true; + break; + case SND_SOC_DAPM_PRE_PMD: + wm8285->compr_info.forced = false; + break; + default: + break; + } + + mutex_unlock(&wm8285->compr_info.lock); + + return 0; +} + +static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); +static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); +static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); +static DECLARE_TLV_DB_SCALE(noise_tlv, 0, 600, 0); +static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); + +#define WM8285_NG_SRC(name, base) \ + SOC_SINGLE(name " NG HPOUT1L Switch", base, 0, 1, 0), \ + SOC_SINGLE(name " NG HPOUT1R Switch", base, 1, 1, 0), \ + SOC_SINGLE(name " NG HPOUT2L Switch", base, 2, 1, 0), \ + SOC_SINGLE(name " NG HPOUT2R Switch", base, 3, 1, 0), \ + SOC_SINGLE(name " NG HPOUT3L Switch", base, 4, 1, 0), \ + SOC_SINGLE(name " NG HPOUT3R Switch", base, 5, 1, 0), \ + SOC_SINGLE(name " NG SPKOUTL Switch", base, 6, 1, 0), \ + SOC_SINGLE(name " NG SPKOUTR Switch", base, 7, 1, 0), \ + SOC_SINGLE(name " NG SPKDAT1L Switch", base, 8, 1, 0), \ + SOC_SINGLE(name " NG SPKDAT1R Switch", base, 9, 1, 0), \ + SOC_SINGLE(name " NG SPKDAT2L Switch", base, 10, 1, 0), \ + SOC_SINGLE(name " NG SPKDAT2R Switch", base, 11, 1, 0) + +#define WM8285_RXANC_INPUT_ROUTES(widget, name) \ + { widget, NULL, name " Input" }, \ + { name " Input", "IN1L", "IN1L PGA" }, \ + { name " Input", "IN1R", "IN1R PGA" }, \ + { name " Input", "IN1L + IN1R", "IN1L PGA" }, \ + { name " Input", "IN1L + IN1R", "IN1R PGA" }, \ + { name " Input", "IN2L", "IN2L PGA" }, \ + { name " Input", "IN2R", "IN2R PGA" }, \ + { name " Input", "IN2L + IN2R", "IN2L PGA" }, \ + { name " Input", "IN2L + IN2R", "IN2R PGA" }, \ + { name " Input", "IN3L", "IN3L PGA" }, \ + { name " Input", "IN3R", "IN3R PGA" }, \ + { name " Input", "IN3L + IN3R", "IN3L PGA" }, \ + { name " Input", "IN3L + IN3R", "IN3R PGA" }, \ + { name " Input", "IN4L", "IN4L PGA" }, \ + { name " Input", "IN4R", "IN4R PGA" }, \ + { name " Input", "IN4L + IN4R", "IN4L PGA" }, \ + { name " Input", "IN4L + IN4R", "IN4R PGA" }, \ + { name " Input", "IN5L", "IN5L PGA" }, \ + { name " Input", "IN5R", "IN5R PGA" }, \ + { name " Input", "IN5L + IN5R", "IN5L PGA" }, \ + { name " Input", "IN5L + IN5R", "IN5R PGA" }, \ + { name " Input", "IN6L", "IN6L PGA" }, \ + { name " Input", "IN6R", "IN6R PGA" }, \ + { name " Input", "IN6L + IN6R", "IN6L PGA" }, \ + { name " Input", "IN6L + IN6R", "IN6R PGA" } + +#define WM8285_RXANC_OUTPUT_ROUTES(widget, name) \ + { widget, NULL, name " ANC Source" }, \ + { name " ANC Source", "RXANCL", "RXANCL" }, \ + { name " ANC Source", "RXANCR", "RXANCR" } + +static const struct snd_kcontrol_new wm8285_snd_controls[] = { +SOC_VALUE_ENUM("IN1 OSR", wm8285_in_dmic_osr[0]), +SOC_VALUE_ENUM("IN2 OSR", wm8285_in_dmic_osr[1]), +SOC_VALUE_ENUM("IN3 OSR", wm8285_in_dmic_osr[2]), +SOC_VALUE_ENUM("IN4 OSR", wm8285_in_dmic_osr[3]), +SOC_VALUE_ENUM("IN5 OSR", wm8285_in_dmic_osr[4]), +SOC_VALUE_ENUM("IN6 OSR", wm8285_in_dmic_osr[5]), + +SOC_SINGLE_RANGE_TLV("IN1L Volume", ARIZONA_IN1L_CONTROL, + ARIZONA_IN1L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), +SOC_SINGLE_RANGE_TLV("IN1R Volume", ARIZONA_IN1R_CONTROL, + ARIZONA_IN1R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), +SOC_SINGLE_RANGE_TLV("IN2L Volume", ARIZONA_IN2L_CONTROL, + ARIZONA_IN2L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), +SOC_SINGLE_RANGE_TLV("IN2R Volume", ARIZONA_IN2R_CONTROL, + ARIZONA_IN2R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), +SOC_SINGLE_RANGE_TLV("IN3L Volume", ARIZONA_IN3L_CONTROL, + ARIZONA_IN3L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), +SOC_SINGLE_RANGE_TLV("IN3R Volume", ARIZONA_IN3R_CONTROL, + ARIZONA_IN3R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), + +SOC_ENUM("IN HPF Cutoff Frequency", arizona_in_hpf_cut_enum), + +SOC_SINGLE("IN1L HPF Switch", ARIZONA_IN1L_CONTROL, + ARIZONA_IN1L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN1R HPF Switch", ARIZONA_IN1R_CONTROL, + ARIZONA_IN1R_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN2L HPF Switch", ARIZONA_IN2L_CONTROL, + ARIZONA_IN2L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN2R HPF Switch", ARIZONA_IN2R_CONTROL, + ARIZONA_IN2R_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN3L HPF Switch", ARIZONA_IN3L_CONTROL, + ARIZONA_IN3L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN3R HPF Switch", ARIZONA_IN3R_CONTROL, + ARIZONA_IN3R_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN4L HPF Switch", ARIZONA_IN4L_CONTROL, + ARIZONA_IN4L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN4R HPF Switch", ARIZONA_IN4R_CONTROL, + ARIZONA_IN4R_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN5L HPF Switch", ARIZONA_IN5L_CONTROL, + ARIZONA_IN5L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN5R HPF Switch", ARIZONA_IN5R_CONTROL, + ARIZONA_IN5R_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN6L HPF Switch", ARIZONA_IN6L_CONTROL, + ARIZONA_IN6L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN6R HPF Switch", ARIZONA_IN6R_CONTROL, + ARIZONA_IN6R_HPF_SHIFT, 1, 0), + +SOC_SINGLE_TLV("IN1L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN1R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1R, + ARIZONA_IN1R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN2L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_2L, + ARIZONA_IN2L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN2R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_2R, + ARIZONA_IN2R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN3L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_3L, + ARIZONA_IN3L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN3R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_3R, + ARIZONA_IN3R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN4L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_4L, + ARIZONA_IN4L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN4R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_4R, + ARIZONA_IN4R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN5L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_5L, + ARIZONA_IN5L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN5R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_5R, + ARIZONA_IN5R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN6L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_6L, + ARIZONA_IN6L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN6R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_6R, + ARIZONA_IN6R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), + +SOC_ENUM("Input Ramp Up", arizona_in_vi_ramp), +SOC_ENUM("Input Ramp Down", arizona_in_vd_ramp), + +SND_SOC_BYTES_MASK("RXANC Config", ARIZONA_CLOCK_CONTROL, 1, + ARIZONA_CLK_R_ENA_CLR | ARIZONA_CLK_R_ENA_SET | + ARIZONA_CLK_L_ENA_CLR | ARIZONA_CLK_L_ENA_SET), +SND_SOC_BYTES("RXANC Coefficients", ARIZONA_ANC_COEFF_START, + ARIZONA_ANC_COEFF_END - ARIZONA_ANC_COEFF_START + 1), +SND_SOC_BYTES("RXANCL Config", ARIZONA_FCL_FILTER_CONTROL, 1), +SND_SOC_BYTES("RXANCL Coefficients", ARIZONA_FCL_COEFF_START, + ARIZONA_FCL_COEFF_END - ARIZONA_FCL_COEFF_START + 1), +SND_SOC_BYTES("RXANCR Config", WM8285_FCR_FILTER_CONTROL, 1), +SND_SOC_BYTES("RXANCR Coefficients", WM8285_FCR_COEFF_START, + WM8285_FCR_COEFF_END - WM8285_FCR_COEFF_START + 1), + +ARIZONA_MIXER_CONTROLS("EQ1", ARIZONA_EQ1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("EQ4", ARIZONA_EQ4MIX_INPUT_1_SOURCE), + +ARIZONA_EQ_CONTROL("EQ1 Coefficients", ARIZONA_EQ1_2), +SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B2 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B3 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B4 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B5 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +ARIZONA_EQ_CONTROL("EQ2 Coefficients", ARIZONA_EQ2_2), +SOC_SINGLE_TLV("EQ2 B1 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B2 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B3 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B4 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B5 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +ARIZONA_EQ_CONTROL("EQ3 Coefficients", ARIZONA_EQ3_2), +SOC_SINGLE_TLV("EQ3 B1 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B2 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B3 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B4 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B5 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +ARIZONA_EQ_CONTROL("EQ4 Coefficients", ARIZONA_EQ4_2), +SOC_SINGLE_TLV("EQ4 B1 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B2 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B3 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B4 Volume", ARIZONA_EQ4_2, ARIZONA_EQ4_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B5 Volume", ARIZONA_EQ4_2, ARIZONA_EQ4_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +ARIZONA_MIXER_CONTROLS("DRC1L", ARIZONA_DRC1LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DRC1R", ARIZONA_DRC1RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DRC2L", ARIZONA_DRC2LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DRC2R", ARIZONA_DRC2RMIX_INPUT_1_SOURCE), + +SND_SOC_BYTES_MASK("DRC1", ARIZONA_DRC1_CTRL1, 5, + ARIZONA_DRC1R_ENA | ARIZONA_DRC1L_ENA), +SND_SOC_BYTES_MASK("DRC2", WM8285_DRC2_CTRL1, 5, + ARIZONA_DRC2R_ENA | ARIZONA_DRC2L_ENA), + +ARIZONA_MIXER_CONTROLS("LHPF1", ARIZONA_HPLP1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LHPF2", ARIZONA_HPLP2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LHPF3", ARIZONA_HPLP3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LHPF4", ARIZONA_HPLP4MIX_INPUT_1_SOURCE), + +SND_SOC_BYTES("LHPF1 Coefficients", ARIZONA_HPLPF1_2, 1), +SND_SOC_BYTES("LHPF2 Coefficients", ARIZONA_HPLPF2_2, 1), +SND_SOC_BYTES("LHPF3 Coefficients", ARIZONA_HPLPF3_2, 1), +SND_SOC_BYTES("LHPF4 Coefficients", ARIZONA_HPLPF4_2, 1), + +SOC_ENUM("LHPF1 Mode", arizona_lhpf1_mode), +SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode), +SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode), +SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), + +SOC_VALUE_ENUM("Sample Rate 2", arizona_sample_rate[0]), +SOC_VALUE_ENUM("Sample Rate 3", arizona_sample_rate[1]), + +SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), +SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), +SOC_VALUE_ENUM("ISRC3 FSL", arizona_isrc_fsl[2]), +SOC_VALUE_ENUM("ISRC4 FSL", arizona_isrc_fsl[3]), +SOC_VALUE_ENUM("ISRC1 FSH", arizona_isrc_fsh[0]), +SOC_VALUE_ENUM("ISRC2 FSH", arizona_isrc_fsh[1]), +SOC_VALUE_ENUM("ISRC3 FSH", arizona_isrc_fsh[2]), +SOC_VALUE_ENUM("ISRC4 FSH", arizona_isrc_fsh[3]), +SOC_VALUE_ENUM("ASRC RATE 1", arizona_asrc_rate1), + +ARIZONA_MIXER_CONTROLS("DSP1L", ARIZONA_DSP1LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP1R", ARIZONA_DSP1RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP2L", ARIZONA_DSP2LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP2R", ARIZONA_DSP2RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP3L", ARIZONA_DSP3LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP3R", ARIZONA_DSP3RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP4L", ARIZONA_DSP4LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP4R", ARIZONA_DSP4RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP5L", WM8285_DSP5LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP5R", WM8285_DSP5RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP6L", WM8285_DSP6LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP6R", WM8285_DSP6RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP7L", WM8285_DSP7LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP7R", WM8285_DSP7RMIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("Mic", ARIZONA_MICMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("Noise", ARIZONA_NOISEMIX_INPUT_1_SOURCE), + +SOC_SINGLE_TLV("Noise Generator Volume", ARIZONA_COMFORT_NOISE_GENERATOR, + ARIZONA_NOISE_GEN_GAIN_SHIFT, 0x16, 0, noise_tlv), + +ARIZONA_MIXER_CONTROLS("HPOUT1L", ARIZONA_OUT1LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("HPOUT1R", ARIZONA_OUT1RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("HPOUT2L", ARIZONA_OUT2LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("HPOUT2R", ARIZONA_OUT2RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("HPOUT3L", ARIZONA_OUT3LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("HPOUT3R", ARIZONA_OUT3RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SPKOUTL", ARIZONA_OUT4LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SPKOUTR", ARIZONA_OUT4RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SPKDAT1L", ARIZONA_OUT5LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SPKDAT1R", ARIZONA_OUT5RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SPKDAT2L", ARIZONA_OUT6LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SPKDAT2R", ARIZONA_OUT6RMIX_INPUT_1_SOURCE), + +SOC_SINGLE("HPOUT1 SC Protect Switch", ARIZONA_HP1_SHORT_CIRCUIT_CTRL, + ARIZONA_HP1_SC_ENA_SHIFT, 1, 0), +SOC_SINGLE("HPOUT2 SC Protect Switch", ARIZONA_HP2_SHORT_CIRCUIT_CTRL, + ARIZONA_HP2_SC_ENA_SHIFT, 1, 0), +SOC_SINGLE("HPOUT3 SC Protect Switch", ARIZONA_HP3_SHORT_CIRCUIT_CTRL, + ARIZONA_HP3_SC_ENA_SHIFT, 1, 0), + +SOC_SINGLE("SPKDAT1 High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_5L, + ARIZONA_OUT5_OSR_SHIFT, 1, 0), +SOC_SINGLE("SPKDAT2 High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_6L, + ARIZONA_OUT6_OSR_SHIFT, 1, 0), + +SOC_DOUBLE_R("HPOUT1 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_1L, + ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_MUTE_SHIFT, 1, 1), +SOC_DOUBLE_R("HPOUT2 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_2L, + ARIZONA_DAC_DIGITAL_VOLUME_2R, ARIZONA_OUT2L_MUTE_SHIFT, 1, 1), +SOC_DOUBLE_R("HPOUT3 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_3L, + ARIZONA_DAC_DIGITAL_VOLUME_3R, ARIZONA_OUT3L_MUTE_SHIFT, 1, 1), +SOC_DOUBLE_R("Speaker Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_4L, + ARIZONA_DAC_DIGITAL_VOLUME_4R, ARIZONA_OUT4L_MUTE_SHIFT, 1, 1), +SOC_DOUBLE_R("SPKDAT1 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_5L, + ARIZONA_DAC_DIGITAL_VOLUME_5R, ARIZONA_OUT5L_MUTE_SHIFT, 1, 1), +SOC_DOUBLE_R("SPKDAT2 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_6L, + ARIZONA_DAC_DIGITAL_VOLUME_6R, ARIZONA_OUT6L_MUTE_SHIFT, 1, 1), + +SOC_DOUBLE_R_TLV("HPOUT1 Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_1L, + ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_VOL_SHIFT, + 0xbf, 0, digital_tlv), +SOC_DOUBLE_R_TLV("HPOUT2 Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_2L, + ARIZONA_DAC_DIGITAL_VOLUME_2R, ARIZONA_OUT2L_VOL_SHIFT, + 0xbf, 0, digital_tlv), +SOC_DOUBLE_R_TLV("HPOUT3 Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_3L, + ARIZONA_DAC_DIGITAL_VOLUME_3R, ARIZONA_OUT3L_VOL_SHIFT, + 0xbf, 0, digital_tlv), +SOC_DOUBLE_R_TLV("Speaker Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_4L, + ARIZONA_DAC_DIGITAL_VOLUME_4R, ARIZONA_OUT4L_VOL_SHIFT, + 0xbf, 0, digital_tlv), +SOC_DOUBLE_R_TLV("SPKDAT1 Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_5L, + ARIZONA_DAC_DIGITAL_VOLUME_5R, ARIZONA_OUT5L_VOL_SHIFT, + 0xbf, 0, digital_tlv), +SOC_DOUBLE_R_TLV("SPKDAT2 Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_6L, + ARIZONA_DAC_DIGITAL_VOLUME_6R, ARIZONA_OUT6L_VOL_SHIFT, + 0xbf, 0, digital_tlv), + +SOC_DOUBLE("SPKDAT1 Switch", ARIZONA_PDM_SPK1_CTRL_1, ARIZONA_SPK1L_MUTE_SHIFT, + ARIZONA_SPK1R_MUTE_SHIFT, 1, 1), +SOC_DOUBLE("SPKDAT2 Switch", ARIZONA_PDM_SPK2_CTRL_1, ARIZONA_SPK2L_MUTE_SHIFT, + ARIZONA_SPK2R_MUTE_SHIFT, 1, 1), + +SOC_DOUBLE("HPOUT1 DRE Switch", ARIZONA_DRE_ENABLE, + ARIZONA_DRE1L_ENA_SHIFT, ARIZONA_DRE1R_ENA_SHIFT, 1, 0), +SOC_DOUBLE("HPOUT2 DRE Switch", ARIZONA_DRE_ENABLE, + ARIZONA_DRE2L_ENA_SHIFT, ARIZONA_DRE2R_ENA_SHIFT, 1, 0), +SOC_DOUBLE("HPOUT3 DRE Switch", ARIZONA_DRE_ENABLE, + ARIZONA_DRE3L_ENA_SHIFT, ARIZONA_DRE3R_ENA_SHIFT, 1, 0), + +SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp), +SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp), + +SOC_ENUM("SPDIF Rate", arizona_spdif_rate), + +SOC_SINGLE("Noise Gate Switch", ARIZONA_NOISE_GATE_CONTROL, + ARIZONA_NGATE_ENA_SHIFT, 1, 0), +SOC_SINGLE_TLV("Noise Gate Threshold Volume", ARIZONA_NOISE_GATE_CONTROL, + ARIZONA_NGATE_THR_SHIFT, 7, 1, ng_tlv), +SOC_ENUM("Noise Gate Hold", arizona_ng_hold), + +SOC_VALUE_ENUM("Output Rate 1", arizona_output_rate), +SOC_VALUE_ENUM("In Rate", arizona_input_rate), + +WM8285_NG_SRC("HPOUT1L", ARIZONA_NOISE_GATE_SELECT_1L), +WM8285_NG_SRC("HPOUT1R", ARIZONA_NOISE_GATE_SELECT_1R), +WM8285_NG_SRC("HPOUT2L", ARIZONA_NOISE_GATE_SELECT_2L), +WM8285_NG_SRC("HPOUT2R", ARIZONA_NOISE_GATE_SELECT_2R), +WM8285_NG_SRC("HPOUT3L", ARIZONA_NOISE_GATE_SELECT_3L), +WM8285_NG_SRC("HPOUT3R", ARIZONA_NOISE_GATE_SELECT_3R), +WM8285_NG_SRC("SPKOUTL", ARIZONA_NOISE_GATE_SELECT_4L), +WM8285_NG_SRC("SPKOUTR", ARIZONA_NOISE_GATE_SELECT_4R), +WM8285_NG_SRC("SPKDAT1L", ARIZONA_NOISE_GATE_SELECT_5L), +WM8285_NG_SRC("SPKDAT1R", ARIZONA_NOISE_GATE_SELECT_5R), +WM8285_NG_SRC("SPKDAT2L", ARIZONA_NOISE_GATE_SELECT_6L), +WM8285_NG_SRC("SPKDAT2R", ARIZONA_NOISE_GATE_SELECT_6R), + +ARIZONA_MIXER_CONTROLS("AIF1TX1", ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX2", ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX3", ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX4", ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX5", ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX6", ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX7", ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX8", ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("AIF2TX1", ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX2", ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX3", ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX4", ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX5", ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX6", ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX7", ARIZONA_AIF2TX7MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX8", ARIZONA_AIF2TX8MIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("AIF3TX1", ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF3TX2", ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("AIF4TX1", ARIZONA_AIF4TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF4TX2", ARIZONA_AIF4TX2MIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("SLIMTX1", ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX2", ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX3", ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX4", ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX5", ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX6", ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX7", ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX8", ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE), + +ARIZONA_GAINMUX_CONTROLS("SPDIFTX1", ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE), +ARIZONA_GAINMUX_CONTROLS("SPDIFTX2", ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE), +}; + +ARIZONA_MIXER_ENUMS(EQ1, ARIZONA_EQ1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(EQ2, ARIZONA_EQ2MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(EQ3, ARIZONA_EQ3MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(EQ4, ARIZONA_EQ4MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(DRC1L, ARIZONA_DRC1LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(DRC1R, ARIZONA_DRC1RMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(DRC2L, ARIZONA_DRC2LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(DRC2R, ARIZONA_DRC2RMIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(LHPF1, ARIZONA_HPLP1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(LHPF2, ARIZONA_HPLP2MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(LHPF3, ARIZONA_HPLP3MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(LHPF4, ARIZONA_HPLP4MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(DSP1L, ARIZONA_DSP1LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(DSP1R, ARIZONA_DSP1RMIX_INPUT_1_SOURCE); +ARIZONA_DSP_AUX_ENUMS(DSP1, ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(DSP2L, ARIZONA_DSP2LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(DSP2R, ARIZONA_DSP2RMIX_INPUT_1_SOURCE); +ARIZONA_DSP_AUX_ENUMS(DSP2, ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(DSP3L, ARIZONA_DSP3LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(DSP3R, ARIZONA_DSP3RMIX_INPUT_1_SOURCE); +ARIZONA_DSP_AUX_ENUMS(DSP3, ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(DSP4L, ARIZONA_DSP4LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(DSP4R, ARIZONA_DSP4RMIX_INPUT_1_SOURCE); +ARIZONA_DSP_AUX_ENUMS(DSP4, ARIZONA_DSP4AUX1MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(DSP5L, WM8285_DSP5LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(DSP5R, WM8285_DSP5RMIX_INPUT_1_SOURCE); +ARIZONA_DSP_AUX_ENUMS(DSP5, WM8285_DSP5AUX1MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(DSP6L, WM8285_DSP6LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(DSP6R, WM8285_DSP6RMIX_INPUT_1_SOURCE); +ARIZONA_DSP_AUX_ENUMS(DSP6, WM8285_DSP6AUX1MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(DSP7L, WM8285_DSP7LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(DSP7R, WM8285_DSP7RMIX_INPUT_1_SOURCE); +ARIZONA_DSP_AUX_ENUMS(DSP7, WM8285_DSP7AUX1MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(Mic, ARIZONA_MICMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(Noise, ARIZONA_NOISEMIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(PWM1, ARIZONA_PWM1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(PWM2, ARIZONA_PWM2MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(OUT1L, ARIZONA_OUT1LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(OUT1R, ARIZONA_OUT1RMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(OUT2L, ARIZONA_OUT2LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(OUT2R, ARIZONA_OUT2RMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(OUT3L, ARIZONA_OUT3LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(OUT3R, ARIZONA_OUT3RMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SPKOUTL, ARIZONA_OUT4LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SPKOUTR, ARIZONA_OUT4RMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SPKDAT1L, ARIZONA_OUT5LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SPKDAT1R, ARIZONA_OUT5RMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SPKDAT2L, ARIZONA_OUT6LMIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SPKDAT2R, ARIZONA_OUT6RMIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(AIF1TX1, ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX2, ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX3, ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX4, ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX5, ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX6, ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX7, ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF1TX8, ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(AIF2TX1, ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX2, ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX3, ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX4, ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX5, ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX6, ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX7, ARIZONA_AIF2TX7MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX8, ARIZONA_AIF2TX8MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(AIF3TX1, ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF3TX2, ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(AIF4TX1, ARIZONA_AIF4TX1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF4TX2, ARIZONA_AIF4TX2MIX_INPUT_1_SOURCE); + +ARIZONA_MIXER_ENUMS(SLIMTX1, ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX2, ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX3, ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX4, ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX5, ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX6, ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX7, ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(SLIMTX8, ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(SPD1TX1, ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(SPD1TX2, ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ASRC1L, ARIZONA_ASRC1LMIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ASRC1R, ARIZONA_ASRC1RMIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ASRC2L, ARIZONA_ASRC2LMIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ASRC2R, ARIZONA_ASRC2RMIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC1INT1, ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1INT2, ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1INT3, ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1INT4, ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC1DEC1, ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1DEC2, ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1DEC3, ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC1DEC4, ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC2INT1, ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2INT2, ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2INT3, ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2INT4, ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC2DEC1, ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2DEC2, ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2DEC3, ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC2DEC4, ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC3INT1, ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC3INT2, ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC3DEC1, ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC3DEC2, ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC4INT1, ARIZONA_ISRC4INT1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC4INT2, ARIZONA_ISRC4INT2MIX_INPUT_1_SOURCE); + +ARIZONA_MUX_ENUMS(ISRC4DEC1, ARIZONA_ISRC4DEC1MIX_INPUT_1_SOURCE); +ARIZONA_MUX_ENUMS(ISRC4DEC2, ARIZONA_ISRC4DEC2MIX_INPUT_1_SOURCE); + +static const char * const wm8285_dsp_output_texts[] = { + "None", + "DSP6", +}; + +static const struct soc_enum wm8285_dsp_output_enum = + SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm8285_dsp_output_texts), + wm8285_dsp_output_texts); + +static const struct snd_kcontrol_new wm8285_dsp_output_mux[] = { + SOC_DAPM_ENUM_VIRT("DSP Virtual Output Mux", wm8285_dsp_output_enum), +}; + +static const char * const wm8285_memory_mux_texts[] = { + "None", + "Shared Memory", +}; + +static const struct soc_enum wm8285_memory_enum = + SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm8285_memory_mux_texts), + wm8285_memory_mux_texts); + +static const struct snd_kcontrol_new wm8285_memory_mux[] = { + SOC_DAPM_ENUM_VIRT("DSP2 Virtual Input", wm8285_memory_enum), + SOC_DAPM_ENUM_VIRT("DSP3 Virtual Input", wm8285_memory_enum), +}; + +static const char * const wm8285_aec_loopback_texts[] = { + "HPOUT1L", "HPOUT1R", "HPOUT2L", "HPOUT2R", "HPOUT3L", "HPOUT3R", + "SPKOUTL", "SPKOUTR", "SPKDAT1L", "SPKDAT1R", "SPKDAT2L", "SPKDAT2R", +}; + +static const unsigned int wm8285_aec_loopback_values[] = { + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, +}; + +static const struct soc_enum wm8285_aec_loopback = + SOC_VALUE_ENUM_SINGLE(ARIZONA_DAC_AEC_CONTROL_1, + ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, + ARRAY_SIZE(wm8285_aec_loopback_texts), + wm8285_aec_loopback_texts, + wm8285_aec_loopback_values); + +static const struct snd_kcontrol_new wm8285_aec_loopback_mux = + SOC_DAPM_VALUE_ENUM("AEC Loopback", wm8285_aec_loopback); + +static const struct snd_kcontrol_new wm8285_anc_input_mux[] = { + SOC_DAPM_ENUM_EXT("RXANCL Input", wm8285_anc_input_src[0], + snd_soc_dapm_get_enum_virt, arizona_put_anc_input), + SOC_DAPM_ENUM_EXT("RXANCR Input", wm8285_anc_input_src[1], + snd_soc_dapm_get_enum_virt, arizona_put_anc_input), +}; + +static const struct snd_kcontrol_new wm8285_output_anc_src[] = { + SOC_DAPM_ENUM("HPOUT1L ANC Source", arizona_output_anc_src[0]), + SOC_DAPM_ENUM("HPOUT1R ANC Source", arizona_output_anc_src[1]), + SOC_DAPM_ENUM("HPOUT2L ANC Source", arizona_output_anc_src[2]), + SOC_DAPM_ENUM("HPOUT2R ANC Source", arizona_output_anc_src[3]), + SOC_DAPM_ENUM("HPOUT3L ANC Source", arizona_output_anc_src[4]), + SOC_DAPM_ENUM("HPOUT3R ANC Source", arizona_output_anc_src[5]), + SOC_DAPM_ENUM("SPKOUTL ANC Source", arizona_output_anc_src[6]), + SOC_DAPM_ENUM("SPKOUTR ANC Source", arizona_output_anc_src[7]), + SOC_DAPM_ENUM("SPKDAT1L ANC Source", arizona_output_anc_src[8]), + SOC_DAPM_ENUM("SPKDAT1R ANC Source", arizona_output_anc_src[9]), + SOC_DAPM_ENUM("SPKDAT2L ANC Source", arizona_output_anc_src[10]), + SOC_DAPM_ENUM("SPKDAT2R ANC Source", arizona_output_anc_src[11]), +}; + +static const struct snd_soc_dapm_widget wm8285_dapm_widgets[] = { +SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT, + 0, NULL, SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_SUPPLY("ASYNCCLK", ARIZONA_ASYNC_CLOCK_1, + ARIZONA_ASYNC_CLK_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK, + ARIZONA_OPCLK_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("ASYNCOPCLK", ARIZONA_OUTPUT_ASYNC_CLOCK, + ARIZONA_OPCLK_ASYNC_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("DSPCLK", WM8285_DSP_CLOCK_1, 6, + 0, NULL, 0), + + +SND_SOC_DAPM_REGULATOR_SUPPLY("DBVDD2", 0, 0), +SND_SOC_DAPM_REGULATOR_SUPPLY("DBVDD3", 0, 0), +SND_SOC_DAPM_REGULATOR_SUPPLY("DBVDD4", 0, 0), +SND_SOC_DAPM_REGULATOR_SUPPLY("CPVDD", 20, 0), +SND_SOC_DAPM_REGULATOR_SUPPLY("MICVDD", 0, SND_SOC_DAPM_REGULATOR_BYPASS), +SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDDL", 0, 0), +SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDDR", 0, 0), + +SND_SOC_DAPM_SIGGEN("TONE"), +SND_SOC_DAPM_SIGGEN("NOISE"), +SND_SOC_DAPM_SIGGEN("HAPTICS"), + +SND_SOC_DAPM_INPUT("IN1AL"), +SND_SOC_DAPM_INPUT("IN1B"), +SND_SOC_DAPM_INPUT("IN1R"), +SND_SOC_DAPM_INPUT("IN2AL"), +SND_SOC_DAPM_INPUT("IN2AR"), +SND_SOC_DAPM_INPUT("IN2BL"), +SND_SOC_DAPM_INPUT("IN2BR"), +SND_SOC_DAPM_INPUT("IN3L"), +SND_SOC_DAPM_INPUT("IN3R"), +SND_SOC_DAPM_INPUT("IN4L"), +SND_SOC_DAPM_INPUT("IN4R"), +SND_SOC_DAPM_INPUT("IN5L"), +SND_SOC_DAPM_INPUT("IN5R"), +SND_SOC_DAPM_INPUT("IN6L"), +SND_SOC_DAPM_INPUT("IN6R"), + +SND_SOC_DAPM_MUX("IN1L Mux", SND_SOC_NOPM, 0, 0, &wm8285_in1mux), +SND_SOC_DAPM_MUX("IN2L Mux", SND_SOC_NOPM, 0, 0, &wm8285_in2mux[0]), +SND_SOC_DAPM_MUX("IN2R Mux", SND_SOC_NOPM, 0, 0, &wm8285_in2mux[1]), + +SND_SOC_DAPM_OUTPUT("DRC1 Signal Activity"), +SND_SOC_DAPM_OUTPUT("DRC2 Signal Activity"), + +SND_SOC_DAPM_OUTPUT("DSP Virtual Output"), + +SND_SOC_DAPM_PGA_E("IN1L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN1L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN1R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN1R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN2L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN2L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN2R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN2R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN3L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN3L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN3R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN3R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN4L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN4L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN4R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN4R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN5L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN5L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN5R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN5R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN6L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN6L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN6R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN6R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), + +SND_SOC_DAPM_SUPPLY("MICBIAS1", ARIZONA_MIC_BIAS_CTRL_1, + ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS2", ARIZONA_MIC_BIAS_CTRL_2, + ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS3", ARIZONA_MIC_BIAS_CTRL_3, + ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS4", ARIZONA_MIC_BIAS_CTRL_4, + ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("Noise Generator", ARIZONA_COMFORT_NOISE_GENERATOR, + ARIZONA_NOISE_GEN_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("Tone Generator 1", ARIZONA_TONE_GENERATOR_1, + ARIZONA_TONE1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("Tone Generator 2", ARIZONA_TONE_GENERATOR_1, + ARIZONA_TONE2_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("Mic Mute Mixer", ARIZONA_MIC_NOISE_MIX_CONTROL_1, + ARIZONA_MICMUTE_MIX_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("EQ1", ARIZONA_EQ1_1, ARIZONA_EQ1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ2", ARIZONA_EQ2_1, ARIZONA_EQ2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ3", ARIZONA_EQ3_1, ARIZONA_EQ3_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ4", ARIZONA_EQ4_1, ARIZONA_EQ4_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("DRC1L", ARIZONA_DRC1_CTRL1, ARIZONA_DRC1L_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("DRC1R", ARIZONA_DRC1_CTRL1, ARIZONA_DRC1R_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("DRC2L", WM8285_DRC2_CTRL1, ARIZONA_DRC2L_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("DRC2R", WM8285_DRC2_CTRL1, ARIZONA_DRC2R_ENA_SHIFT, 0, + NULL, 0), + +SND_SOC_DAPM_PGA("LHPF1", ARIZONA_HPLPF1_1, ARIZONA_LHPF1_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF2", ARIZONA_HPLPF2_1, ARIZONA_LHPF2_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF3", ARIZONA_HPLPF3_1, ARIZONA_LHPF3_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF4", ARIZONA_HPLPF4_1, ARIZONA_LHPF4_ENA_SHIFT, 0, + NULL, 0), + +SND_SOC_DAPM_PGA("PWM1 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM1_ENA_SHIFT, + 0, NULL, 0), +SND_SOC_DAPM_PGA("PWM2 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM2_ENA_SHIFT, + 0, NULL, 0), + +SND_SOC_DAPM_PGA("ASRC1L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC1L_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("ASRC1R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC1R_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("ASRC2L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2L_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0, + NULL, 0), + +WM_ADSP2("DSP1", 0), +WM_ADSP2("DSP2", 1), +WM_ADSP2("DSP3", 2), +WM_ADSP2("DSP4", 3), +WM_ADSP2("DSP5", 4), +WM_ADSP2("DSP6", 5), +WM_ADSP2("DSP7", 6), + +SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT2", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT3", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT4", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC1DEC1", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC2", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC3", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC4", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC2INT1", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT2", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT3", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT4", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC2DEC1", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC2", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC3", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC4", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC3INT1", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC3INT2", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_INT1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC3DEC1", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC3DEC2", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_DEC1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC4INT1", ARIZONA_ISRC_4_CTRL_3, + ARIZONA_ISRC4_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC4INT2", ARIZONA_ISRC_4_CTRL_3, + ARIZONA_ISRC4_INT1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC4DEC1", ARIZONA_ISRC_4_CTRL_3, + ARIZONA_ISRC4_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC4DEC2", ARIZONA_ISRC_4_CTRL_3, + ARIZONA_ISRC4_DEC1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, + ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, + &wm8285_aec_loopback_mux), + +SND_SOC_DAPM_MUX("RXANCL Input", SND_SOC_NOPM, 0, 0, &wm8285_anc_input_mux[0]), +SND_SOC_DAPM_MUX("RXANCR Input", SND_SOC_NOPM, 0, 0, &wm8285_anc_input_mux[1]), + +SND_SOC_DAPM_PGA_E("RXANCL", SND_SOC_NOPM, ARIZONA_CLK_L_ENA_SET_SHIFT, + 0, NULL, 0, arizona_anc_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), +SND_SOC_DAPM_PGA_E("RXANCR", SND_SOC_NOPM, ARIZONA_CLK_R_ENA_SET_SHIFT, + 0, NULL, 0, arizona_anc_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), + +SND_SOC_DAPM_MUX("HPOUT1L ANC Source", SND_SOC_NOPM, 0, 0, + &wm8285_output_anc_src[0]), +SND_SOC_DAPM_MUX("HPOUT1R ANC Source", SND_SOC_NOPM, 0, 0, + &wm8285_output_anc_src[1]), +SND_SOC_DAPM_MUX("HPOUT2L ANC Source", SND_SOC_NOPM, 0, 0, + &wm8285_output_anc_src[2]), +SND_SOC_DAPM_MUX("HPOUT2R ANC Source", SND_SOC_NOPM, 0, 0, + &wm8285_output_anc_src[3]), +SND_SOC_DAPM_MUX("HPOUT3L ANC Source", SND_SOC_NOPM, 0, 0, + &wm8285_output_anc_src[4]), +SND_SOC_DAPM_MUX("HPOUT3R ANC Source", SND_SOC_NOPM, 0, 0, + &wm8285_output_anc_src[5]), +SND_SOC_DAPM_MUX("SPKOUTL ANC Source", SND_SOC_NOPM, 0, 0, + &wm8285_output_anc_src[6]), +SND_SOC_DAPM_MUX("SPKOUTR ANC Source", SND_SOC_NOPM, 0, 0, + &wm8285_output_anc_src[7]), +SND_SOC_DAPM_MUX("SPKDAT1L ANC Source", SND_SOC_NOPM, 0, 0, + &wm8285_output_anc_src[8]), +SND_SOC_DAPM_MUX("SPKDAT1R ANC Source", SND_SOC_NOPM, 0, 0, + &wm8285_output_anc_src[9]), +SND_SOC_DAPM_MUX("SPKDAT2L ANC Source", SND_SOC_NOPM, 0, 0, + &wm8285_output_anc_src[10]), +SND_SOC_DAPM_MUX("SPKDAT2R ANC Source", SND_SOC_NOPM, 0, 0, + &wm8285_output_anc_src[11]), + +SND_SOC_DAPM_AIF_OUT("AIF1TX1", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX2", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX3", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX4", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX5", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX6", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX7", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX8", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF1RX1", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX2", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX3", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX4", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX5", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX6", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX7", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX8", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("AIF2TX1", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX2", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX3", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX4", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX5", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX6", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX7", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX8", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX2", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX3", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX4", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX5", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX6", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX7", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX8", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("SLIMRX1", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX2", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX3", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX4", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX5", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX6", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX7", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX8", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("SLIMTX1", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX2", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX3", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX4", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX5", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX6", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX7", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX8", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("AIF3TX1", NULL, 0, + ARIZONA_AIF3_TX_ENABLES, ARIZONA_AIF3TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF3TX2", NULL, 0, + ARIZONA_AIF3_TX_ENABLES, ARIZONA_AIF3TX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF3RX1", NULL, 0, + ARIZONA_AIF3_RX_ENABLES, ARIZONA_AIF3RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF3RX2", NULL, 0, + ARIZONA_AIF3_RX_ENABLES, ARIZONA_AIF3RX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("AIF4TX1", NULL, 0, + ARIZONA_AIF4_TX_ENABLES, ARIZONA_AIF4TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF4TX2", NULL, 0, + ARIZONA_AIF4_TX_ENABLES, ARIZONA_AIF4TX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF4RX1", NULL, 0, + ARIZONA_AIF4_RX_ENABLES, ARIZONA_AIF4RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF4RX2", NULL, 0, + ARIZONA_AIF4_RX_ENABLES, ARIZONA_AIF4RX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, + ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, + ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT2L", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT2L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT2R", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT2R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT3L", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT3L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT3R", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT3R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT5L", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT5L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT5R", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT5R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT6L", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT6L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT6R", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT6R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + +SND_SOC_DAPM_PGA("SPD1TX1", ARIZONA_SPD1_TX_CONTROL, + ARIZONA_SPD1_VAL1_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("SPD1TX2", ARIZONA_SPD1_TX_CONTROL, + ARIZONA_SPD1_VAL2_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_OUT_DRV("SPD1", ARIZONA_SPD1_TX_CONTROL, + ARIZONA_SPD1_ENA_SHIFT, 0, NULL, 0), + +ARIZONA_MIXER_WIDGETS(EQ1, "EQ1"), +ARIZONA_MIXER_WIDGETS(EQ2, "EQ2"), +ARIZONA_MIXER_WIDGETS(EQ3, "EQ3"), +ARIZONA_MIXER_WIDGETS(EQ4, "EQ4"), + +ARIZONA_MIXER_WIDGETS(DRC1L, "DRC1L"), +ARIZONA_MIXER_WIDGETS(DRC1R, "DRC1R"), +ARIZONA_MIXER_WIDGETS(DRC2L, "DRC2L"), +ARIZONA_MIXER_WIDGETS(DRC2R, "DRC2R"), + +ARIZONA_MIXER_WIDGETS(LHPF1, "LHPF1"), +ARIZONA_MIXER_WIDGETS(LHPF2, "LHPF2"), +ARIZONA_MIXER_WIDGETS(LHPF3, "LHPF3"), +ARIZONA_MIXER_WIDGETS(LHPF4, "LHPF4"), + +ARIZONA_MIXER_WIDGETS(Mic, "Mic"), +ARIZONA_MIXER_WIDGETS(Noise, "Noise"), + +ARIZONA_MIXER_WIDGETS(PWM1, "PWM1"), +ARIZONA_MIXER_WIDGETS(PWM2, "PWM2"), + +ARIZONA_MIXER_WIDGETS(OUT1L, "HPOUT1L"), +ARIZONA_MIXER_WIDGETS(OUT1R, "HPOUT1R"), +ARIZONA_MIXER_WIDGETS(OUT2L, "HPOUT2L"), +ARIZONA_MIXER_WIDGETS(OUT2R, "HPOUT2R"), +ARIZONA_MIXER_WIDGETS(OUT3L, "HPOUT3L"), +ARIZONA_MIXER_WIDGETS(OUT3R, "HPOUT3R"), +ARIZONA_MIXER_WIDGETS(SPKOUTL, "SPKOUTL"), +ARIZONA_MIXER_WIDGETS(SPKOUTR, "SPKOUTR"), +ARIZONA_MIXER_WIDGETS(SPKDAT1L, "SPKDAT1L"), +ARIZONA_MIXER_WIDGETS(SPKDAT1R, "SPKDAT1R"), +ARIZONA_MIXER_WIDGETS(SPKDAT2L, "SPKDAT2L"), +ARIZONA_MIXER_WIDGETS(SPKDAT2R, "SPKDAT2R"), + +ARIZONA_MIXER_WIDGETS(AIF1TX1, "AIF1TX1"), +ARIZONA_MIXER_WIDGETS(AIF1TX2, "AIF1TX2"), +ARIZONA_MIXER_WIDGETS(AIF1TX3, "AIF1TX3"), +ARIZONA_MIXER_WIDGETS(AIF1TX4, "AIF1TX4"), +ARIZONA_MIXER_WIDGETS(AIF1TX5, "AIF1TX5"), +ARIZONA_MIXER_WIDGETS(AIF1TX6, "AIF1TX6"), +ARIZONA_MIXER_WIDGETS(AIF1TX7, "AIF1TX7"), +ARIZONA_MIXER_WIDGETS(AIF1TX8, "AIF1TX8"), + +ARIZONA_MIXER_WIDGETS(AIF2TX1, "AIF2TX1"), +ARIZONA_MIXER_WIDGETS(AIF2TX2, "AIF2TX2"), +ARIZONA_MIXER_WIDGETS(AIF2TX3, "AIF2TX3"), +ARIZONA_MIXER_WIDGETS(AIF2TX4, "AIF2TX4"), +ARIZONA_MIXER_WIDGETS(AIF2TX5, "AIF2TX5"), +ARIZONA_MIXER_WIDGETS(AIF2TX6, "AIF2TX6"), +ARIZONA_MIXER_WIDGETS(AIF2TX7, "AIF2TX7"), +ARIZONA_MIXER_WIDGETS(AIF2TX8, "AIF2TX8"), + +ARIZONA_MIXER_WIDGETS(AIF3TX1, "AIF3TX1"), +ARIZONA_MIXER_WIDGETS(AIF3TX2, "AIF3TX2"), + +ARIZONA_MIXER_WIDGETS(AIF4TX1, "AIF4TX1"), +ARIZONA_MIXER_WIDGETS(AIF4TX2, "AIF4TX2"), + +ARIZONA_MIXER_WIDGETS(SLIMTX1, "SLIMTX1"), +ARIZONA_MIXER_WIDGETS(SLIMTX2, "SLIMTX2"), +ARIZONA_MIXER_WIDGETS(SLIMTX3, "SLIMTX3"), +ARIZONA_MIXER_WIDGETS(SLIMTX4, "SLIMTX4"), +ARIZONA_MIXER_WIDGETS(SLIMTX5, "SLIMTX5"), +ARIZONA_MIXER_WIDGETS(SLIMTX6, "SLIMTX6"), +ARIZONA_MIXER_WIDGETS(SLIMTX7, "SLIMTX7"), +ARIZONA_MIXER_WIDGETS(SLIMTX8, "SLIMTX8"), + +ARIZONA_MUX_WIDGETS(SPD1TX1, "SPDIFTX1"), +ARIZONA_MUX_WIDGETS(SPD1TX2, "SPDIFTX2"), + +ARIZONA_MUX_WIDGETS(ASRC1L, "ASRC1L"), +ARIZONA_MUX_WIDGETS(ASRC1R, "ASRC1R"), +ARIZONA_MUX_WIDGETS(ASRC2L, "ASRC2L"), +ARIZONA_MUX_WIDGETS(ASRC2R, "ASRC2R"), + +ARIZONA_DSP_WIDGETS(DSP1, "DSP1"), +ARIZONA_DSP_WIDGETS(DSP2, "DSP2"), +ARIZONA_DSP_WIDGETS(DSP3, "DSP3"), +ARIZONA_DSP_WIDGETS(DSP4, "DSP4"), +ARIZONA_DSP_WIDGETS(DSP5, "DSP5"), +ARIZONA_DSP_WIDGETS(DSP6, "DSP6"), +ARIZONA_DSP_WIDGETS(DSP7, "DSP7"), + +SND_SOC_DAPM_VIRT_MUX("DSP2 Virtual Input", SND_SOC_NOPM, 0, 0, + &wm8285_memory_mux[0]), +SND_SOC_DAPM_VIRT_MUX("DSP3 Virtual Input", SND_SOC_NOPM, 0, 0, + &wm8285_memory_mux[1]), + +SND_SOC_DAPM_VIRT_MUX_E("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, + &wm8285_dsp_output_mux[0], wm8285_virt_dsp_power_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), + +ARIZONA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), +ARIZONA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"), +ARIZONA_MUX_WIDGETS(ISRC1DEC3, "ISRC1DEC3"), +ARIZONA_MUX_WIDGETS(ISRC1DEC4, "ISRC1DEC4"), + +ARIZONA_MUX_WIDGETS(ISRC1INT1, "ISRC1INT1"), +ARIZONA_MUX_WIDGETS(ISRC1INT2, "ISRC1INT2"), +ARIZONA_MUX_WIDGETS(ISRC1INT3, "ISRC1INT3"), +ARIZONA_MUX_WIDGETS(ISRC1INT4, "ISRC1INT4"), + +ARIZONA_MUX_WIDGETS(ISRC2DEC1, "ISRC2DEC1"), +ARIZONA_MUX_WIDGETS(ISRC2DEC2, "ISRC2DEC2"), +ARIZONA_MUX_WIDGETS(ISRC2DEC3, "ISRC2DEC3"), +ARIZONA_MUX_WIDGETS(ISRC2DEC4, "ISRC2DEC4"), + +ARIZONA_MUX_WIDGETS(ISRC2INT1, "ISRC2INT1"), +ARIZONA_MUX_WIDGETS(ISRC2INT2, "ISRC2INT2"), +ARIZONA_MUX_WIDGETS(ISRC2INT3, "ISRC2INT3"), +ARIZONA_MUX_WIDGETS(ISRC2INT4, "ISRC2INT4"), + +ARIZONA_MUX_WIDGETS(ISRC3DEC1, "ISRC3DEC1"), +ARIZONA_MUX_WIDGETS(ISRC3DEC2, "ISRC3DEC2"), + +ARIZONA_MUX_WIDGETS(ISRC3INT1, "ISRC3INT1"), +ARIZONA_MUX_WIDGETS(ISRC3INT2, "ISRC3INT2"), + +ARIZONA_MUX_WIDGETS(ISRC4DEC1, "ISRC4DEC1"), +ARIZONA_MUX_WIDGETS(ISRC4DEC2, "ISRC4DEC2"), + +ARIZONA_MUX_WIDGETS(ISRC4INT1, "ISRC4INT1"), +ARIZONA_MUX_WIDGETS(ISRC4INT2, "ISRC4INT2"), + +SND_SOC_DAPM_OUTPUT("HPOUT1L"), +SND_SOC_DAPM_OUTPUT("HPOUT1R"), +SND_SOC_DAPM_OUTPUT("HPOUT2L"), +SND_SOC_DAPM_OUTPUT("HPOUT2R"), +SND_SOC_DAPM_OUTPUT("HPOUT3L"), +SND_SOC_DAPM_OUTPUT("HPOUT3R"), +SND_SOC_DAPM_OUTPUT("SPKOUTLN"), +SND_SOC_DAPM_OUTPUT("SPKOUTLP"), +SND_SOC_DAPM_OUTPUT("SPKOUTRN"), +SND_SOC_DAPM_OUTPUT("SPKOUTRP"), +SND_SOC_DAPM_OUTPUT("SPKDAT1L"), +SND_SOC_DAPM_OUTPUT("SPKDAT1R"), +SND_SOC_DAPM_OUTPUT("SPKDAT2L"), +SND_SOC_DAPM_OUTPUT("SPKDAT2R"), +SND_SOC_DAPM_OUTPUT("SPDIF"), + +SND_SOC_DAPM_OUTPUT("MICSUPP"), +}; + +#define ARIZONA_MIXER_INPUT_ROUTES(name) \ + { name, "Noise Generator", "Noise Generator" }, \ + { name, "Tone Generator 1", "Tone Generator 1" }, \ + { name, "Tone Generator 2", "Tone Generator 2" }, \ + { name, "Haptics", "HAPTICS" }, \ + { name, "AEC", "AEC Loopback" }, \ + { name, "IN1L", "IN1L PGA" }, \ + { name, "IN1R", "IN1R PGA" }, \ + { name, "IN2L", "IN2L PGA" }, \ + { name, "IN2R", "IN2R PGA" }, \ + { name, "IN3L", "IN3L PGA" }, \ + { name, "IN3R", "IN3R PGA" }, \ + { name, "IN4L", "IN4L PGA" }, \ + { name, "IN4R", "IN4R PGA" }, \ + { name, "IN5L", "IN5L PGA" }, \ + { name, "IN5R", "IN5R PGA" }, \ + { name, "IN6L", "IN6L PGA" }, \ + { name, "IN6R", "IN6R PGA" }, \ + { name, "Mic Mute Mixer", "Mic Mute Mixer" }, \ + { name, "AIF1RX1", "AIF1RX1" }, \ + { name, "AIF1RX2", "AIF1RX2" }, \ + { name, "AIF1RX3", "AIF1RX3" }, \ + { name, "AIF1RX4", "AIF1RX4" }, \ + { name, "AIF1RX5", "AIF1RX5" }, \ + { name, "AIF1RX6", "AIF1RX6" }, \ + { name, "AIF1RX7", "AIF1RX7" }, \ + { name, "AIF1RX8", "AIF1RX8" }, \ + { name, "AIF2RX1", "AIF2RX1" }, \ + { name, "AIF2RX2", "AIF2RX2" }, \ + { name, "AIF2RX3", "AIF2RX3" }, \ + { name, "AIF2RX4", "AIF2RX4" }, \ + { name, "AIF2RX5", "AIF2RX5" }, \ + { name, "AIF2RX6", "AIF2RX6" }, \ + { name, "AIF2RX7", "AIF2RX7" }, \ + { name, "AIF2RX8", "AIF2RX8" }, \ + { name, "AIF3RX1", "AIF3RX1" }, \ + { name, "AIF3RX2", "AIF3RX2" }, \ + { name, "AIF4RX1", "AIF4RX1" }, \ + { name, "AIF4RX2", "AIF4RX2" }, \ + { name, "SLIMRX1", "SLIMRX1" }, \ + { name, "SLIMRX2", "SLIMRX2" }, \ + { name, "SLIMRX3", "SLIMRX3" }, \ + { name, "SLIMRX4", "SLIMRX4" }, \ + { name, "SLIMRX5", "SLIMRX5" }, \ + { name, "SLIMRX6", "SLIMRX6" }, \ + { name, "SLIMRX7", "SLIMRX7" }, \ + { name, "SLIMRX8", "SLIMRX8" }, \ + { name, "EQ1", "EQ1" }, \ + { name, "EQ2", "EQ2" }, \ + { name, "EQ3", "EQ3" }, \ + { name, "EQ4", "EQ4" }, \ + { name, "DRC1L", "DRC1L" }, \ + { name, "DRC1R", "DRC1R" }, \ + { name, "DRC2L", "DRC2L" }, \ + { name, "DRC2R", "DRC2R" }, \ + { name, "LHPF1", "LHPF1" }, \ + { name, "LHPF2", "LHPF2" }, \ + { name, "LHPF3", "LHPF3" }, \ + { name, "LHPF4", "LHPF4" }, \ + { name, "ASRC1L", "ASRC1L" }, \ + { name, "ASRC1R", "ASRC1R" }, \ + { name, "ASRC2L", "ASRC2L" }, \ + { name, "ASRC2R", "ASRC2R" }, \ + { name, "ISRC1DEC1", "ISRC1DEC1" }, \ + { name, "ISRC1DEC2", "ISRC1DEC2" }, \ + { name, "ISRC1DEC3", "ISRC1DEC3" }, \ + { name, "ISRC1DEC4", "ISRC1DEC4" }, \ + { name, "ISRC1INT1", "ISRC1INT1" }, \ + { name, "ISRC1INT2", "ISRC1INT2" }, \ + { name, "ISRC1INT3", "ISRC1INT3" }, \ + { name, "ISRC1INT4", "ISRC1INT4" }, \ + { name, "ISRC2DEC1", "ISRC2DEC1" }, \ + { name, "ISRC2DEC2", "ISRC2DEC2" }, \ + { name, "ISRC2DEC3", "ISRC2DEC3" }, \ + { name, "ISRC2DEC4", "ISRC2DEC4" }, \ + { name, "ISRC2INT1", "ISRC2INT1" }, \ + { name, "ISRC2INT2", "ISRC2INT2" }, \ + { name, "ISRC2INT3", "ISRC2INT3" }, \ + { name, "ISRC2INT4", "ISRC2INT4" }, \ + { name, "ISRC3DEC1", "ISRC3DEC1" }, \ + { name, "ISRC3DEC2", "ISRC3DEC2" }, \ + { name, "ISRC3INT1", "ISRC3INT1" }, \ + { name, "ISRC3INT2", "ISRC3INT2" }, \ + { name, "ISRC4DEC1", "ISRC4DEC1" }, \ + { name, "ISRC4DEC2", "ISRC4DEC2" }, \ + { name, "ISRC4INT1", "ISRC4INT1" }, \ + { name, "ISRC4INT2", "ISRC4INT2" }, \ + { name, "DSP1.1", "DSP1" }, \ + { name, "DSP1.2", "DSP1" }, \ + { name, "DSP1.3", "DSP1" }, \ + { name, "DSP1.4", "DSP1" }, \ + { name, "DSP1.5", "DSP1" }, \ + { name, "DSP1.6", "DSP1" }, \ + { name, "DSP2.1", "DSP2" }, \ + { name, "DSP2.2", "DSP2" }, \ + { name, "DSP2.3", "DSP2" }, \ + { name, "DSP2.4", "DSP2" }, \ + { name, "DSP2.5", "DSP2" }, \ + { name, "DSP2.6", "DSP2" }, \ + { name, "DSP3.1", "DSP3" }, \ + { name, "DSP3.2", "DSP3" }, \ + { name, "DSP3.3", "DSP3" }, \ + { name, "DSP3.4", "DSP3" }, \ + { name, "DSP3.5", "DSP3" }, \ + { name, "DSP3.6", "DSP3" }, \ + { name, "DSP4.1", "DSP4" }, \ + { name, "DSP4.2", "DSP4" }, \ + { name, "DSP4.3", "DSP4" }, \ + { name, "DSP4.4", "DSP4" }, \ + { name, "DSP4.5", "DSP4" }, \ + { name, "DSP4.6", "DSP4" }, \ + { name, "DSP5.1", "DSP5" }, \ + { name, "DSP5.2", "DSP5" }, \ + { name, "DSP5.3", "DSP5" }, \ + { name, "DSP5.4", "DSP5" }, \ + { name, "DSP5.5", "DSP5" }, \ + { name, "DSP5.6", "DSP5" }, \ + { name, "DSP6.1", "DSP6" }, \ + { name, "DSP6.2", "DSP6" }, \ + { name, "DSP6.3", "DSP6" }, \ + { name, "DSP6.4", "DSP6" }, \ + { name, "DSP6.5", "DSP6" }, \ + { name, "DSP6.6", "DSP6" }, \ + { name, "DSP7.1", "DSP7" }, \ + { name, "DSP7.2", "DSP7" }, \ + { name, "DSP7.3", "DSP7" }, \ + { name, "DSP7.4", "DSP7" }, \ + { name, "DSP7.5", "DSP7" }, \ + { name, "DSP7.6", "DSP7" } + +static const struct snd_soc_dapm_route wm8285_dapm_routes[] = { + { "AIF2 Capture", NULL, "DBVDD2" }, + { "AIF2 Playback", NULL, "DBVDD2" }, + + { "AIF3 Capture", NULL, "DBVDD3" }, + { "AIF3 Playback", NULL, "DBVDD3" }, + + { "AIF4 Capture", NULL, "DBVDD3" }, + { "AIF4 Playback", NULL, "DBVDD3" }, + + { "OUT1L", NULL, "CPVDD" }, + { "OUT1R", NULL, "CPVDD" }, + { "OUT2L", NULL, "CPVDD" }, + { "OUT2R", NULL, "CPVDD" }, + { "OUT3L", NULL, "CPVDD" }, + { "OUT3R", NULL, "CPVDD" }, + + { "OUT4L", NULL, "SPKVDDL" }, + { "OUT4R", NULL, "SPKVDDR" }, + + { "OUT1L", NULL, "SYSCLK" }, + { "OUT1R", NULL, "SYSCLK" }, + { "OUT2L", NULL, "SYSCLK" }, + { "OUT2R", NULL, "SYSCLK" }, + { "OUT3L", NULL, "SYSCLK" }, + { "OUT4L", NULL, "SYSCLK" }, + { "OUT4R", NULL, "SYSCLK" }, + { "OUT5L", NULL, "SYSCLK" }, + { "OUT5R", NULL, "SYSCLK" }, + { "OUT6L", NULL, "SYSCLK" }, + { "OUT6R", NULL, "SYSCLK" }, + + { "SPD1", NULL, "SYSCLK" }, + { "SPD1", NULL, "SPD1TX1" }, + { "SPD1", NULL, "SPD1TX2" }, + + { "IN1AL", NULL, "SYSCLK" }, + { "IN1B", NULL, "SYSCLK" }, + { "IN1R", NULL, "SYSCLK" }, + { "IN2AL", NULL, "SYSCLK" }, + { "IN2AR", NULL, "SYSCLK" }, + { "IN2BL", NULL, "SYSCLK" }, + { "IN2BR", NULL, "SYSCLK" }, + { "IN3L", NULL, "SYSCLK" }, + { "IN3R", NULL, "SYSCLK" }, + { "IN4L", NULL, "SYSCLK" }, + { "IN4R", NULL, "SYSCLK" }, + { "IN5L", NULL, "SYSCLK" }, + { "IN5R", NULL, "SYSCLK" }, + { "IN6L", NULL, "SYSCLK" }, + { "IN6R", NULL, "SYSCLK" }, + + { "IN4L", NULL, "DBVDD4" }, + { "IN4R", NULL, "DBVDD4" }, + { "IN5L", NULL, "DBVDD4" }, + { "IN5R", NULL, "DBVDD4" }, + { "IN6L", NULL, "DBVDD4" }, + { "IN6R", NULL, "DBVDD4" }, + + { "DSP1", NULL, "DSPCLK"}, + { "DSP2", NULL, "DSPCLK"}, + { "DSP3", NULL, "DSPCLK"}, + { "DSP4", NULL, "DSPCLK"}, + { "DSP5", NULL, "DSPCLK"}, + { "DSP6", NULL, "DSPCLK"}, + { "DSP7", NULL, "DSPCLK"}, + + { "MICBIAS1", NULL, "MICVDD" }, + { "MICBIAS2", NULL, "MICVDD" }, + { "MICBIAS3", NULL, "MICVDD" }, + { "MICBIAS4", NULL, "MICVDD" }, + + { "Noise Generator", NULL, "SYSCLK" }, + { "Tone Generator 1", NULL, "SYSCLK" }, + { "Tone Generator 2", NULL, "SYSCLK" }, + + { "Noise Generator", NULL, "NOISE" }, + { "Tone Generator 1", NULL, "TONE" }, + { "Tone Generator 2", NULL, "TONE" }, + + { "AIF1 Capture", NULL, "AIF1TX1" }, + { "AIF1 Capture", NULL, "AIF1TX2" }, + { "AIF1 Capture", NULL, "AIF1TX3" }, + { "AIF1 Capture", NULL, "AIF1TX4" }, + { "AIF1 Capture", NULL, "AIF1TX5" }, + { "AIF1 Capture", NULL, "AIF1TX6" }, + { "AIF1 Capture", NULL, "AIF1TX7" }, + { "AIF1 Capture", NULL, "AIF1TX8" }, + + { "AIF1RX1", NULL, "AIF1 Playback" }, + { "AIF1RX2", NULL, "AIF1 Playback" }, + { "AIF1RX3", NULL, "AIF1 Playback" }, + { "AIF1RX4", NULL, "AIF1 Playback" }, + { "AIF1RX5", NULL, "AIF1 Playback" }, + { "AIF1RX6", NULL, "AIF1 Playback" }, + { "AIF1RX7", NULL, "AIF1 Playback" }, + { "AIF1RX8", NULL, "AIF1 Playback" }, + + { "AIF2 Capture", NULL, "AIF2TX1" }, + { "AIF2 Capture", NULL, "AIF2TX2" }, + { "AIF2 Capture", NULL, "AIF2TX3" }, + { "AIF2 Capture", NULL, "AIF2TX4" }, + { "AIF2 Capture", NULL, "AIF2TX5" }, + { "AIF2 Capture", NULL, "AIF2TX6" }, + { "AIF2 Capture", NULL, "AIF2TX7" }, + { "AIF2 Capture", NULL, "AIF2TX8" }, + + { "AIF2RX1", NULL, "AIF2 Playback" }, + { "AIF2RX2", NULL, "AIF2 Playback" }, + { "AIF2RX3", NULL, "AIF2 Playback" }, + { "AIF2RX4", NULL, "AIF2 Playback" }, + { "AIF2RX5", NULL, "AIF2 Playback" }, + { "AIF2RX6", NULL, "AIF2 Playback" }, + { "AIF2RX7", NULL, "AIF2 Playback" }, + { "AIF2RX8", NULL, "AIF2 Playback" }, + + { "AIF3 Capture", NULL, "AIF3TX1" }, + { "AIF3 Capture", NULL, "AIF3TX2" }, + + { "AIF3RX1", NULL, "AIF3 Playback" }, + { "AIF3RX2", NULL, "AIF3 Playback" }, + + { "AIF4 Capture", NULL, "AIF4TX1" }, + { "AIF4 Capture", NULL, "AIF4TX2" }, + + { "AIF4RX1", NULL, "AIF4 Playback" }, + { "AIF4RX2", NULL, "AIF4 Playback" }, + + { "Slim1 Capture", NULL, "SLIMTX1" }, + { "Slim1 Capture", NULL, "SLIMTX2" }, + { "Slim1 Capture", NULL, "SLIMTX3" }, + { "Slim1 Capture", NULL, "SLIMTX4" }, + + { "SLIMRX1", NULL, "Slim1 Playback" }, + { "SLIMRX2", NULL, "Slim1 Playback" }, + { "SLIMRX3", NULL, "Slim1 Playback" }, + { "SLIMRX4", NULL, "Slim1 Playback" }, + + { "Slim2 Capture", NULL, "SLIMTX5" }, + { "Slim2 Capture", NULL, "SLIMTX6" }, + + { "SLIMRX5", NULL, "Slim2 Playback" }, + { "SLIMRX6", NULL, "Slim2 Playback" }, + + { "Slim3 Capture", NULL, "SLIMTX7" }, + { "Slim3 Capture", NULL, "SLIMTX8" }, + + { "SLIMRX7", NULL, "Slim3 Playback" }, + { "SLIMRX8", NULL, "Slim3 Playback" }, + + { "AIF1 Playback", NULL, "SYSCLK" }, + { "AIF2 Playback", NULL, "SYSCLK" }, + { "AIF3 Playback", NULL, "SYSCLK" }, + { "AIF4 Playback", NULL, "SYSCLK" }, + { "Slim1 Playback", NULL, "SYSCLK" }, + { "Slim2 Playback", NULL, "SYSCLK" }, + { "Slim3 Playback", NULL, "SYSCLK" }, + + { "AIF1 Capture", NULL, "SYSCLK" }, + { "AIF2 Capture", NULL, "SYSCLK" }, + { "AIF3 Capture", NULL, "SYSCLK" }, + { "AIF4 Capture", NULL, "SYSCLK" }, + { "Slim1 Capture", NULL, "SYSCLK" }, + { "Slim2 Capture", NULL, "SYSCLK" }, + { "Slim3 Capture", NULL, "SYSCLK" }, + + { "Voice Control CPU", NULL, "Voice Control DSP" }, + { "Voice Control DSP", NULL, "DSP6" }, + { "Voice Control CPU", NULL, "SYSCLK" }, + { "Voice Control DSP", NULL, "SYSCLK" }, + + { "Trace CPU", NULL, "Trace DSP" }, + { "Trace DSP", NULL, "DSP1" }, + { "Trace CPU", NULL, "SYSCLK" }, + { "Trace DSP", NULL, "SYSCLK" }, + + { "IN1L Mux", "A", "IN1AL" }, + { "IN1L Mux", "B", "IN1B" }, + + { "IN2L Mux", "A", "IN2AL" }, + { "IN2L Mux", "B", "IN2BL" }, + { "IN2R Mux", "A", "IN2AR" }, + { "IN2R Mux", "B", "IN2BR" }, + + { "IN1L PGA", NULL, "IN1L Mux" }, + { "IN1R PGA", NULL, "IN1R" }, + + { "IN2L PGA", NULL, "IN2L Mux" }, + { "IN2R PGA", NULL, "IN2R Mux" }, + + { "IN3L PGA", NULL, "IN3L" }, + { "IN3R PGA", NULL, "IN3R" }, + + { "IN4L PGA", NULL, "IN4L" }, + { "IN4R PGA", NULL, "IN4R" }, + + { "IN5L PGA", NULL, "IN5L" }, + { "IN5R PGA", NULL, "IN5R" }, + + { "IN6L PGA", NULL, "IN6L" }, + { "IN6R PGA", NULL, "IN6R" }, + + ARIZONA_MIXER_ROUTES("OUT1L", "HPOUT1L"), + ARIZONA_MIXER_ROUTES("OUT1R", "HPOUT1R"), + ARIZONA_MIXER_ROUTES("OUT2L", "HPOUT2L"), + ARIZONA_MIXER_ROUTES("OUT2R", "HPOUT2R"), + ARIZONA_MIXER_ROUTES("OUT3L", "HPOUT3L"), + ARIZONA_MIXER_ROUTES("OUT3R", "HPOUT3R"), + + ARIZONA_MIXER_ROUTES("OUT4L", "SPKOUTL"), + ARIZONA_MIXER_ROUTES("OUT4R", "SPKOUTR"), + ARIZONA_MIXER_ROUTES("OUT5L", "SPKDAT1L"), + ARIZONA_MIXER_ROUTES("OUT5R", "SPKDAT1R"), + ARIZONA_MIXER_ROUTES("OUT6L", "SPKDAT2L"), + ARIZONA_MIXER_ROUTES("OUT6R", "SPKDAT2R"), + + ARIZONA_MIXER_ROUTES("PWM1 Driver", "PWM1"), + ARIZONA_MIXER_ROUTES("PWM2 Driver", "PWM2"), + + ARIZONA_MIXER_ROUTES("AIF1TX1", "AIF1TX1"), + ARIZONA_MIXER_ROUTES("AIF1TX2", "AIF1TX2"), + ARIZONA_MIXER_ROUTES("AIF1TX3", "AIF1TX3"), + ARIZONA_MIXER_ROUTES("AIF1TX4", "AIF1TX4"), + ARIZONA_MIXER_ROUTES("AIF1TX5", "AIF1TX5"), + ARIZONA_MIXER_ROUTES("AIF1TX6", "AIF1TX6"), + ARIZONA_MIXER_ROUTES("AIF1TX7", "AIF1TX7"), + ARIZONA_MIXER_ROUTES("AIF1TX8", "AIF1TX8"), + + ARIZONA_MIXER_ROUTES("AIF2TX1", "AIF2TX1"), + ARIZONA_MIXER_ROUTES("AIF2TX2", "AIF2TX2"), + ARIZONA_MIXER_ROUTES("AIF2TX3", "AIF2TX3"), + ARIZONA_MIXER_ROUTES("AIF2TX4", "AIF2TX4"), + ARIZONA_MIXER_ROUTES("AIF2TX5", "AIF2TX5"), + ARIZONA_MIXER_ROUTES("AIF2TX6", "AIF2TX6"), + ARIZONA_MIXER_ROUTES("AIF2TX7", "AIF2TX7"), + ARIZONA_MIXER_ROUTES("AIF2TX8", "AIF2TX8"), + + ARIZONA_MIXER_ROUTES("AIF3TX1", "AIF3TX1"), + ARIZONA_MIXER_ROUTES("AIF3TX2", "AIF3TX2"), + + ARIZONA_MIXER_ROUTES("AIF4TX1", "AIF4TX1"), + ARIZONA_MIXER_ROUTES("AIF4TX2", "AIF4TX2"), + + ARIZONA_MIXER_ROUTES("SLIMTX1", "SLIMTX1"), + ARIZONA_MIXER_ROUTES("SLIMTX2", "SLIMTX2"), + ARIZONA_MIXER_ROUTES("SLIMTX3", "SLIMTX3"), + ARIZONA_MIXER_ROUTES("SLIMTX4", "SLIMTX4"), + ARIZONA_MIXER_ROUTES("SLIMTX5", "SLIMTX5"), + ARIZONA_MIXER_ROUTES("SLIMTX6", "SLIMTX6"), + ARIZONA_MIXER_ROUTES("SLIMTX7", "SLIMTX7"), + ARIZONA_MIXER_ROUTES("SLIMTX8", "SLIMTX8"), + + ARIZONA_MUX_ROUTES("SPD1TX1", "SPDIFTX1"), + ARIZONA_MUX_ROUTES("SPD1TX2", "SPDIFTX2"), + + ARIZONA_MIXER_ROUTES("EQ1", "EQ1"), + ARIZONA_MIXER_ROUTES("EQ2", "EQ2"), + ARIZONA_MIXER_ROUTES("EQ3", "EQ3"), + ARIZONA_MIXER_ROUTES("EQ4", "EQ4"), + + ARIZONA_MIXER_ROUTES("DRC1L", "DRC1L"), + ARIZONA_MIXER_ROUTES("DRC1R", "DRC1R"), + ARIZONA_MIXER_ROUTES("DRC2L", "DRC2L"), + ARIZONA_MIXER_ROUTES("DRC2R", "DRC2R"), + + ARIZONA_MIXER_ROUTES("LHPF1", "LHPF1"), + ARIZONA_MIXER_ROUTES("LHPF2", "LHPF2"), + ARIZONA_MIXER_ROUTES("LHPF3", "LHPF3"), + ARIZONA_MIXER_ROUTES("LHPF4", "LHPF4"), + + ARIZONA_MIXER_ROUTES("Mic Mute Mixer", "Noise"), + ARIZONA_MIXER_ROUTES("Mic Mute Mixer", "Mic"), + + ARIZONA_MUX_ROUTES("ASRC1L", "ASRC1L"), + ARIZONA_MUX_ROUTES("ASRC1R", "ASRC1R"), + ARIZONA_MUX_ROUTES("ASRC2L", "ASRC2L"), + ARIZONA_MUX_ROUTES("ASRC2R", "ASRC2R"), + + ARIZONA_DSP_ROUTES("DSP1"), + ARIZONA_DSP_ROUTES("DSP2"), + ARIZONA_DSP_ROUTES("DSP3"), + ARIZONA_DSP_ROUTES("DSP4"), + ARIZONA_DSP_ROUTES("DSP5"), + ARIZONA_DSP_ROUTES("DSP6"), + ARIZONA_DSP_ROUTES("DSP7"), + + { "DSP2 Preloader", NULL, "DSP2 Virtual Input" }, + { "DSP2 Virtual Input", "Shared Memory", "DSP3" }, + { "DSP3 Preloader", NULL, "DSP3 Virtual Input" }, + { "DSP3 Virtual Input", "Shared Memory", "DSP2" }, + + { "DSP Virtual Output", NULL, "DSP Virtual Output Mux" }, + { "DSP Virtual Output Mux", "DSP6", "DSP6" }, + { "DSP Virtual Output", NULL, "SYSCLK" }, + + ARIZONA_MUX_ROUTES("ISRC1INT1", "ISRC1INT1"), + ARIZONA_MUX_ROUTES("ISRC1INT2", "ISRC1INT2"), + ARIZONA_MUX_ROUTES("ISRC1INT3", "ISRC1INT3"), + ARIZONA_MUX_ROUTES("ISRC1INT4", "ISRC1INT4"), + + ARIZONA_MUX_ROUTES("ISRC1DEC1", "ISRC1DEC1"), + ARIZONA_MUX_ROUTES("ISRC1DEC2", "ISRC1DEC2"), + ARIZONA_MUX_ROUTES("ISRC1DEC3", "ISRC1DEC3"), + ARIZONA_MUX_ROUTES("ISRC1DEC4", "ISRC1DEC4"), + + ARIZONA_MUX_ROUTES("ISRC2INT1", "ISRC2INT1"), + ARIZONA_MUX_ROUTES("ISRC2INT2", "ISRC2INT2"), + ARIZONA_MUX_ROUTES("ISRC2INT3", "ISRC2INT3"), + ARIZONA_MUX_ROUTES("ISRC2INT4", "ISRC2INT4"), + + ARIZONA_MUX_ROUTES("ISRC2DEC1", "ISRC2DEC1"), + ARIZONA_MUX_ROUTES("ISRC2DEC2", "ISRC2DEC2"), + ARIZONA_MUX_ROUTES("ISRC2DEC3", "ISRC2DEC3"), + ARIZONA_MUX_ROUTES("ISRC2DEC4", "ISRC2DEC4"), + + ARIZONA_MUX_ROUTES("ISRC3INT1", "ISRC3INT1"), + ARIZONA_MUX_ROUTES("ISRC3INT2", "ISRC3INT2"), + + ARIZONA_MUX_ROUTES("ISRC3DEC1", "ISRC3DEC1"), + ARIZONA_MUX_ROUTES("ISRC3DEC2", "ISRC3DEC2"), + + ARIZONA_MUX_ROUTES("ISRC4INT1", "ISRC4INT1"), + ARIZONA_MUX_ROUTES("ISRC4INT2", "ISRC4INT2"), + + ARIZONA_MUX_ROUTES("ISRC4DEC1", "ISRC4DEC1"), + ARIZONA_MUX_ROUTES("ISRC4DEC2", "ISRC4DEC2"), + + { "AEC Loopback", "HPOUT1L", "OUT1L" }, + { "AEC Loopback", "HPOUT1R", "OUT1R" }, + { "HPOUT1L", NULL, "OUT1L" }, + { "HPOUT1R", NULL, "OUT1R" }, + + { "AEC Loopback", "HPOUT2L", "OUT2L" }, + { "AEC Loopback", "HPOUT2R", "OUT2R" }, + { "HPOUT2L", NULL, "OUT2L" }, + { "HPOUT2R", NULL, "OUT2R" }, + + { "AEC Loopback", "HPOUT3L", "OUT3L" }, + { "AEC Loopback", "HPOUT3R", "OUT3R" }, + { "HPOUT3L", NULL, "OUT3L" }, + { "HPOUT3R", NULL, "OUT3R" }, + + { "AEC Loopback", "SPKOUTL", "OUT4L" }, + { "SPKOUTLN", NULL, "OUT4L" }, + { "SPKOUTLP", NULL, "OUT4L" }, + + { "AEC Loopback", "SPKOUTR", "OUT4R" }, + { "SPKOUTRN", NULL, "OUT4R" }, + { "SPKOUTRP", NULL, "OUT4R" }, + + { "AEC Loopback", "SPKDAT1L", "OUT5L" }, + { "AEC Loopback", "SPKDAT1R", "OUT5R" }, + { "SPKDAT1L", NULL, "OUT5L" }, + { "SPKDAT1R", NULL, "OUT5R" }, + + { "AEC Loopback", "SPKDAT2L", "OUT6L" }, + { "AEC Loopback", "SPKDAT2R", "OUT6R" }, + { "SPKDAT2L", NULL, "OUT6L" }, + { "SPKDAT2R", NULL, "OUT6R" }, + + WM8285_RXANC_INPUT_ROUTES("RXANCL", "RXANCL"), + WM8285_RXANC_INPUT_ROUTES("RXANCR", "RXANCR"), + + WM8285_RXANC_OUTPUT_ROUTES("OUT1L", "HPOUT1L"), + WM8285_RXANC_OUTPUT_ROUTES("OUT1R", "HPOUT1R"), + WM8285_RXANC_OUTPUT_ROUTES("OUT2L", "HPOUT2L"), + WM8285_RXANC_OUTPUT_ROUTES("OUT2R", "HPOUT2R"), + WM8285_RXANC_OUTPUT_ROUTES("OUT3L", "HPOUT3L"), + WM8285_RXANC_OUTPUT_ROUTES("OUT3R", "HPOUT3R"), + WM8285_RXANC_OUTPUT_ROUTES("OUT4L", "SPKOUTL"), + WM8285_RXANC_OUTPUT_ROUTES("OUT4R", "SPKOUTR"), + WM8285_RXANC_OUTPUT_ROUTES("OUT5L", "SPKDAT1L"), + WM8285_RXANC_OUTPUT_ROUTES("OUT5R", "SPKDAT1R"), + WM8285_RXANC_OUTPUT_ROUTES("OUT6L", "SPKDAT2L"), + WM8285_RXANC_OUTPUT_ROUTES("OUT6R", "SPKDAT2R"), + + { "SPDIF", NULL, "SPD1" }, + + { "MICSUPP", NULL, "SYSCLK" }, + + { "DRC1 Signal Activity", NULL, "DRC1L" }, + { "DRC1 Signal Activity", NULL, "DRC1R" }, + { "DRC2 Signal Activity", NULL, "DRC2L" }, + { "DRC2 Signal Activity", NULL, "DRC2R" }, +}; + +static int wm8285_set_fll(struct snd_soc_codec *codec, int fll_id, int source, + unsigned int Fref, unsigned int Fout) +{ + struct wm8285_priv *wm8285 = snd_soc_codec_get_drvdata(codec); + + switch (fll_id) { + case WM8285_FLL1: + return arizona_set_fll(&wm8285->fll[0], source, Fref, Fout); + case WM8285_FLL2: + return arizona_set_fll(&wm8285->fll[1], source, Fref, Fout); + case WM8285_FLL3: + return arizona_set_fll(&wm8285->fll[2], source, Fref, Fout); + case WM8285_FLL1_REFCLK: + return arizona_set_fll_refclk(&wm8285->fll[0], source, Fref, + Fout); + case WM8285_FLL2_REFCLK: + return arizona_set_fll_refclk(&wm8285->fll[1], source, Fref, + Fout); + case WM8285_FLL3_REFCLK: + return arizona_set_fll_refclk(&wm8285->fll[2], source, Fref, + Fout); + default: + return -EINVAL; + } +} + +#define WM8285_RATES SNDRV_PCM_RATE_8000_192000 + +#define WM8285_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_driver wm8285_dai[] = { + { + .name = "wm8285-aif1", + .id = 1, + .base = ARIZONA_AIF1_BCLK_CTRL, + .playback = { + .stream_name = "AIF1 Playback", + .channels_min = 1, + .channels_max = 8, + .rates = WM8285_RATES, + .formats = WM8285_FORMATS, + }, + .capture = { + .stream_name = "AIF1 Capture", + .channels_min = 1, + .channels_max = 8, + .rates = WM8285_RATES, + .formats = WM8285_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "wm8285-aif2", + .id = 2, + .base = ARIZONA_AIF2_BCLK_CTRL, + .playback = { + .stream_name = "AIF2 Playback", + .channels_min = 1, + .channels_max = 8, + .rates = WM8285_RATES, + .formats = WM8285_FORMATS, + }, + .capture = { + .stream_name = "AIF2 Capture", + .channels_min = 1, + .channels_max = 8, + .rates = WM8285_RATES, + .formats = WM8285_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "wm8285-aif3", + .id = 3, + .base = ARIZONA_AIF3_BCLK_CTRL, + .playback = { + .stream_name = "AIF3 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = WM8285_RATES, + .formats = WM8285_FORMATS, + }, + .capture = { + .stream_name = "AIF3 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = WM8285_RATES, + .formats = WM8285_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "wm8285-aif4", + .id = 4, + .base = ARIZONA_AIF4_BCLK_CTRL, + .playback = { + .stream_name = "AIF4 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = WM8285_RATES, + .formats = WM8285_FORMATS, + }, + .capture = { + .stream_name = "AIF4 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = WM8285_RATES, + .formats = WM8285_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "wm8285-slim1", + .id = 5, + .playback = { + .stream_name = "Slim1 Playback", + .channels_min = 1, + .channels_max = 4, + .rates = WM8285_RATES, + .formats = WM8285_FORMATS, + }, + .capture = { + .stream_name = "Slim1 Capture", + .channels_min = 1, + .channels_max = 4, + .rates = WM8285_RATES, + .formats = WM8285_FORMATS, + }, + .ops = &arizona_simple_dai_ops, + }, + { + .name = "wm8285-slim2", + .id = 6, + .playback = { + .stream_name = "Slim2 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = WM8285_RATES, + .formats = WM8285_FORMATS, + }, + .capture = { + .stream_name = "Slim2 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = WM8285_RATES, + .formats = WM8285_FORMATS, + }, + .ops = &arizona_simple_dai_ops, + }, + { + .name = "wm8285-slim3", + .id = 7, + .playback = { + .stream_name = "Slim3 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = WM8285_RATES, + .formats = WM8285_FORMATS, + }, + .capture = { + .stream_name = "Slim3 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = WM8285_RATES, + .formats = WM8285_FORMATS, + }, + .ops = &arizona_simple_dai_ops, + }, + { + .name = "wm8285-cpu-voicectrl", + .capture = { + .stream_name = "Voice Control CPU", + .channels_min = 1, + .channels_max = 1, + .rates = WM8285_RATES, + .formats = WM8285_FORMATS, + }, + .compress_dai = 1, + }, + { + .name = "wm8285-dsp-voicectrl", + .capture = { + .stream_name = "Voice Control DSP", + .channels_min = 1, + .channels_max = 1, + .rates = WM8285_RATES, + .formats = WM8285_FORMATS, + }, + }, + { + .name = "wm8285-cpu-trace", + .capture = { + .stream_name = "Trace CPU", + .channels_min = 2, + .channels_max = 8, + .rates = WM8285_RATES, + .formats = WM8285_FORMATS, + }, + .compress_dai = 1, + }, + { + .name = "wm8285-dsp-trace", + .capture = { + .stream_name = "Trace DSP", + .channels_min = 2, + .channels_max = 8, + .rates = WM8285_RATES, + .formats = WM8285_FORMATS, + }, + }, +}; + +static irqreturn_t adsp2_irq(int irq, void *data) +{ + struct wm8285_priv *wm8285 = data; + int ret, avail; + + mutex_lock(&wm8285->compr_info.lock); + + if (!wm8285->compr_info.trig && + wm8285->core.adsp[5].fw_id == 0x6000d && + wm8285->core.adsp[5].running) { + if (wm8285->core.arizona->pdata.ez2ctrl_trigger) + wm8285->core.arizona->pdata.ez2ctrl_trigger(); + wm8285->compr_info.trig = true; + } + + if (!wm8285->compr_info.stream) + goto out; + + ret = wm_adsp_stream_handle_irq(wm8285->compr_info.adsp); + if (ret < 0) { + dev_err(wm8285->core.arizona->dev, + "Failed to capture DSP data: %d\n", + ret); + goto out; + } + + wm8285->compr_info.total_copied += ret; + + avail = wm_adsp_stream_avail(wm8285->compr_info.adsp); + if (avail > WM8285_DEFAULT_FRAGMENT_SIZE) + snd_compr_fragment_elapsed(wm8285->compr_info.stream); + +out: + mutex_unlock(&wm8285->compr_info.lock); + + return IRQ_HANDLED; +} + +static int wm8285_open(struct snd_compr_stream *stream) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm8285_priv *wm8285 = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = wm8285->core.arizona; + int n_adsp, ret = 0; + + mutex_lock(&wm8285->compr_info.lock); + + if (wm8285->compr_info.stream) { + ret = -EBUSY; + goto out; + } + + if (strcmp(rtd->codec_dai->name, "wm8285-dsp-voicectrl") == 0) { + n_adsp = 5; + } else if (strcmp(rtd->codec_dai->name, "wm8285-dsp-trace") == 0) { + n_adsp = 0; + } else { + dev_err(arizona->dev, + "No suitable compressed stream for dai '%s'\n", + rtd->codec_dai->name); + ret = -EINVAL; + goto out; + } + + if (!wm_adsp_compress_supported(&wm8285->core.adsp[n_adsp], stream)) { + dev_err(arizona->dev, + "No suitable firmware for compressed stream\n"); + ret = -EINVAL; + goto out; + } + + wm8285->compr_info.adsp = &wm8285->core.adsp[n_adsp]; + wm8285->compr_info.stream = stream; +out: + mutex_unlock(&wm8285->compr_info.lock); + + return ret; +} + +static int wm8285_free(struct snd_compr_stream *stream) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm8285_priv *wm8285 = snd_soc_codec_get_drvdata(rtd->codec); + + mutex_lock(&wm8285->compr_info.lock); + + wm8285->compr_info.stream = NULL; + wm8285->compr_info.total_copied = 0; + if (!wm8285->compr_info.forced) + wm8285->compr_info.trig = false; + + wm_adsp_stream_free(wm8285->compr_info.adsp); + + mutex_unlock(&wm8285->compr_info.lock); + + return 0; +} + +static int wm8285_set_params(struct snd_compr_stream *stream, + struct snd_compr_params *params) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm8285_priv *wm8285 = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = wm8285->core.arizona; + struct wm8285_compr *compr = &wm8285->compr_info; + int ret = 0; + + mutex_lock(&compr->lock); + + if (!wm_adsp_format_supported(compr->adsp, stream, params)) { + dev_err(arizona->dev, + "Invalid params: id:%u, chan:%u,%u, rate:%u format:%u\n", + params->codec.id, params->codec.ch_in, + params->codec.ch_out, params->codec.sample_rate, + params->codec.format); + ret = -EINVAL; + goto out; + } + + ret = wm_adsp_stream_alloc(compr->adsp, params); + +out: + mutex_unlock(&compr->lock); + + return ret; +} + +static int wm8285_get_params(struct snd_compr_stream *stream, + struct snd_codec *params) +{ + return 0; +} + +static int wm8285_trigger(struct snd_compr_stream *stream, int cmd) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm8285_priv *wm8285 = snd_soc_codec_get_drvdata(rtd->codec); + int ret = 0; + bool pending = false; + + mutex_lock(&wm8285->compr_info.lock); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + ret = wm_adsp_stream_start(wm8285->compr_info.adsp); + + /** + * If the stream has already triggered before the stream + * opened better process any outstanding data + */ + if (wm8285->compr_info.trig) + pending = true; + break; + case SNDRV_PCM_TRIGGER_STOP: + break; + default: + ret = -EINVAL; + break; + } + + mutex_unlock(&wm8285->compr_info.lock); + + if (pending) + adsp2_irq(0, wm8285); + + return ret; +} + +static int wm8285_pointer(struct snd_compr_stream *stream, + struct snd_compr_tstamp *tstamp) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm8285_priv *wm8285 = snd_soc_codec_get_drvdata(rtd->codec); + + mutex_lock(&wm8285->compr_info.lock); + tstamp->byte_offset = 0; + tstamp->copied_total = wm8285->compr_info.total_copied; + mutex_unlock(&wm8285->compr_info.lock); + + return 0; +} + +static int wm8285_copy(struct snd_compr_stream *stream, char __user *buf, + size_t count) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm8285_priv *wm8285 = snd_soc_codec_get_drvdata(rtd->codec); + int ret; + + mutex_lock(&wm8285->compr_info.lock); + + if (stream->direction == SND_COMPRESS_PLAYBACK) + ret = -EINVAL; + else + ret = wm_adsp_stream_read(wm8285->compr_info.adsp, buf, count); + + mutex_unlock(&wm8285->compr_info.lock); + + return ret; +} + +static int wm8285_get_caps(struct snd_compr_stream *stream, + struct snd_compr_caps *caps) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm8285_priv *wm8285 = snd_soc_codec_get_drvdata(rtd->codec); + + mutex_lock(&wm8285->compr_info.lock); + + memset(caps, 0, sizeof(*caps)); + + caps->direction = stream->direction; + caps->min_fragment_size = WM8285_DEFAULT_FRAGMENT_SIZE; + caps->max_fragment_size = WM8285_DEFAULT_FRAGMENT_SIZE; + caps->min_fragments = WM8285_DEFAULT_FRAGMENTS; + caps->max_fragments = WM8285_DEFAULT_FRAGMENTS; + + wm_adsp_get_caps(wm8285->compr_info.adsp, stream, caps); + + mutex_unlock(&wm8285->compr_info.lock); + + return 0; +} + +static int wm8285_get_codec_caps(struct snd_compr_stream *stream, + struct snd_compr_codec_caps *codec) +{ + return 0; +} + +static int wm8285_codec_probe(struct snd_soc_codec *codec) +{ + struct wm8285_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->core.arizona; + int ret; + + codec->control_data = priv->core.arizona->regmap; + priv->core.arizona->dapm = &codec->dapm; + + ret = snd_soc_codec_set_cache_io(codec, 32, 16, SND_SOC_REGMAP); + if (ret != 0) + return ret; + + arizona_init_spk(codec); + arizona_init_gpio(codec); + arizona_init_mono(codec); + arizona_init_input(codec); + + ret = snd_soc_add_codec_controls(codec, wm_adsp2v2_fw_controls, 14); + if (ret != 0) + return ret; + + mutex_lock(&codec->card->dapm_mutex); + snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); + mutex_unlock(&codec->card->dapm_mutex); + + priv->core.arizona->dapm = &codec->dapm; + + ret = arizona_request_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, + "ADSP2 interrupt 1", adsp2_irq, priv); + if (ret != 0) { + dev_err(arizona->dev, "Failed to request DSP IRQ: %d\n", ret); + return ret; + } + + ret = irq_set_irq_wake(arizona->irq, 1); + if (ret) + dev_err(arizona->dev, + "Failed to set DSP IRQ to wake source: %d\n", + ret); + + mutex_lock(&codec->card->dapm_mutex); + snd_soc_dapm_enable_pin(&codec->dapm, "DRC2 Signal Activity"); + mutex_unlock(&codec->card->dapm_mutex); + + ret = regmap_update_bits(arizona->regmap, WM8285_IRQ2_MASK_9, + WM8285_DRC2_SIG_DET_EINT2, + WM8285_DRC2_SIG_DET_EINT2); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to unmask DRC2 IRQ for DSP: %d\n", + ret); + return ret; + } + + return 0; +} + +static int wm8285_codec_remove(struct snd_soc_codec *codec) +{ + struct wm8285_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->core.arizona; + + irq_set_irq_wake(arizona->irq, 0); + arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); + regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, + ARIZONA_IM_DRC2_SIG_DET_EINT2, + 0); + + priv->core.arizona->dapm = NULL; + + return 0; +} + +#define WM8285_DIG_VU 0x0200 + +static unsigned int wm8285_digital_vu[] = { + ARIZONA_DAC_DIGITAL_VOLUME_1L, + ARIZONA_DAC_DIGITAL_VOLUME_1R, + ARIZONA_DAC_DIGITAL_VOLUME_2L, + ARIZONA_DAC_DIGITAL_VOLUME_2R, + ARIZONA_DAC_DIGITAL_VOLUME_3L, + ARIZONA_DAC_DIGITAL_VOLUME_3R, + ARIZONA_DAC_DIGITAL_VOLUME_4L, + ARIZONA_DAC_DIGITAL_VOLUME_4R, + ARIZONA_DAC_DIGITAL_VOLUME_5L, + ARIZONA_DAC_DIGITAL_VOLUME_5R, + ARIZONA_DAC_DIGITAL_VOLUME_6L, + ARIZONA_DAC_DIGITAL_VOLUME_6R, +}; + +static struct snd_soc_codec_driver soc_codec_dev_wm8285 = { + .probe = wm8285_codec_probe, + .remove = wm8285_codec_remove, + + .idle_bias_off = true, + + .set_sysclk = arizona_set_sysclk, + .set_pll = wm8285_set_fll, + + .controls = wm8285_snd_controls, + .num_controls = ARRAY_SIZE(wm8285_snd_controls), + .dapm_widgets = wm8285_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(wm8285_dapm_widgets), + .dapm_routes = wm8285_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(wm8285_dapm_routes), +}; + +static struct snd_compr_ops wm8285_compr_ops = { + .open = wm8285_open, + .free = wm8285_free, + .set_params = wm8285_set_params, + .get_params = wm8285_get_params, + .trigger = wm8285_trigger, + .pointer = wm8285_pointer, + .copy = wm8285_copy, + .get_caps = wm8285_get_caps, + .get_codec_caps = wm8285_get_codec_caps, +}; + +static struct snd_soc_platform_driver wm8285_compr_platform = { + .compr_ops = &wm8285_compr_ops, +}; + +static int wm8285_probe(struct platform_device *pdev) +{ + struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); + struct wm8285_priv *wm8285; + int i, ret; + + BUILD_BUG_ON(ARRAY_SIZE(wm8285_dai) > ARIZONA_MAX_DAI); + + wm8285 = devm_kzalloc(&pdev->dev, sizeof(struct wm8285_priv), + GFP_KERNEL); + if (wm8285 == NULL) + return -ENOMEM; + platform_set_drvdata(pdev, wm8285); + + /* Set of_node to parent from the SPI device to allow DAPM to + * locate regulator supplies */ + pdev->dev.of_node = arizona->dev->of_node; + + mutex_init(&wm8285->compr_info.lock); + mutex_init(&wm8285->fw_lock); + + wm8285->core.arizona = arizona; + wm8285->core.num_inputs = 8; + + for (i = 0; i < WM8285_NUM_ADSP; i++) { + wm8285->core.adsp[i].part = "wm8285"; + wm8285->core.adsp[i].num = i + 1; + wm8285->core.adsp[i].type = WMFW_ADSP2; + wm8285->core.adsp[i].rev = 1; + wm8285->core.adsp[i].dev = arizona->dev; + wm8285->core.adsp[i].regmap = arizona->regmap_32bit; + + wm8285->core.adsp[i].base = wm_adsp2_control_bases[i]; + wm8285->core.adsp[i].mem = wm8285_dsp_regions[i]; + wm8285->core.adsp[i].num_mems + = ARRAY_SIZE(wm8285_dsp1_regions); + + if (arizona->pdata.num_fw_defs[i]) { + wm8285->core.adsp[i].firmwares + = arizona->pdata.fw_defs[i]; + + wm8285->core.adsp[i].num_firmwares + = arizona->pdata.num_fw_defs[i]; + } + + ret = wm_adsp2_init(&wm8285->core.adsp[i], &wm8285->fw_lock); + if (ret != 0) + return ret; + } + + for (i = 0; i < ARRAY_SIZE(wm8285->fll); i++) + wm8285->fll[i].vco_mult = 3; + + arizona_init_fll(arizona, 1, ARIZONA_FLL1_CONTROL_1 - 1, + ARIZONA_IRQ_FLL1_LOCK, ARIZONA_IRQ_FLL1_CLOCK_OK, + &wm8285->fll[0]); + arizona_init_fll(arizona, 2, ARIZONA_FLL2_CONTROL_1 - 1, + ARIZONA_IRQ_FLL2_LOCK, ARIZONA_IRQ_FLL2_CLOCK_OK, + &wm8285->fll[1]); + arizona_init_fll(arizona, 3, ARIZONA_FLL3_CONTROL_1 - 1, + ARIZONA_IRQ_FLL3_LOCK, ARIZONA_IRQ_FLL3_CLOCK_OK, + &wm8285->fll[2]); + + for (i = 0; i < ARRAY_SIZE(wm8285_dai); i++) + arizona_init_dai(&wm8285->core, i); + + /* Latch volume update bits */ + for (i = 0; i < ARRAY_SIZE(wm8285_digital_vu); i++) + regmap_update_bits(arizona->regmap, wm8285_digital_vu[i], + WM8285_DIG_VU, WM8285_DIG_VU); + + pm_runtime_enable(&pdev->dev); + pm_runtime_idle(&pdev->dev); + + ret = snd_soc_register_platform(&pdev->dev, &wm8285_compr_platform); + if (ret < 0) { + dev_err(&pdev->dev, + "Failed to register platform: %d\n", + ret); + goto error; + } + + ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_wm8285, + wm8285_dai, ARRAY_SIZE(wm8285_dai)); + if (ret < 0) { + dev_err(&pdev->dev, + "Failed to register codec: %d\n", + ret); + snd_soc_unregister_platform(&pdev->dev); + goto error; + } + + return ret; + +error: + mutex_destroy(&wm8285->compr_info.lock); + mutex_destroy(&wm8285->fw_lock); + + return ret; +} + +static int wm8285_remove(struct platform_device *pdev) +{ + struct wm8285_priv *wm8285 = platform_get_drvdata(pdev); + + snd_soc_unregister_codec(&pdev->dev); + pm_runtime_disable(&pdev->dev); + + mutex_destroy(&wm8285->compr_info.lock); + mutex_destroy(&wm8285->fw_lock); + + return 0; +} + +static struct platform_driver wm8285_codec_driver = { + .driver = { + .name = "wm8285-codec", + .owner = THIS_MODULE, + }, + .probe = wm8285_probe, + .remove = wm8285_remove, +}; + +module_platform_driver(wm8285_codec_driver); + +MODULE_DESCRIPTION("ASoC WM8285 driver"); +MODULE_AUTHOR("Nariman Poushin "); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:wm8285-codec"); diff --git a/sound/soc/codecs/wm8285.h b/sound/soc/codecs/wm8285.h new file mode 100644 index 00000000000..a418ed90092 --- /dev/null +++ b/sound/soc/codecs/wm8285.h @@ -0,0 +1,25 @@ +/* + * florida.h -- ALSA SoC Audio driver for Florida-class codecs + * + * Copyright 2012 Wolfson Microelectronics plc + * + * Author: Mark Brown + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _WM8285_H +#define _WM8285_H + +#include "arizona.h" + +#define WM8285_FLL1 1 +#define WM8285_FLL2 2 +#define WM8285_FLL1_REFCLK 3 +#define WM8285_FLL2_REFCLK 4 +#define WM8285_FLL3 5 +#define WM8285_FLL3_REFCLK 6 + +#endif diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index f84cc9bd877..8a369704652 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -150,6 +150,17 @@ #define ADSP2_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */ #define ADSP2_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */ +/* + * ADSP2V2 clocking + */ +#define ADSP2V2_CLK_SEL_MASK 0x70000 /* CLK_SEL_ENA */ +#define ADSP2V2_CLK_SEL_SHIFT 16 /* CLK_SEL_ENA */ +#define ADSP2V2_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */ + +#define ADSP2V2_RATE_MASK 0x7800 /* DSP_RATE */ +#define ADSP2V2_RATE_SHIFT 11 /* DSP_RATE */ +#define ADSP2V2_RATE_WIDTH 4 /* DSP_RATE */ + /* * ADSP2 Status 1 */ @@ -469,11 +480,71 @@ static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol, return 0; } +static int wm_adsp2v2_rate_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + struct wm_adsp *adsps = snd_soc_codec_get_drvdata(codec); + struct wm_adsp *adsp = &adsps[e->shift_l]; + unsigned int item; + + mutex_lock(&adsp->rate_lock); + + for (item = 0; item < e->max; item++) { + if (e->values[item] == adsp->rate_cache) { + ucontrol->value.enumerated.item[0] = item; + mutex_unlock(&adsp->rate_lock); + return 0; + } + } + + mutex_unlock(&adsp->rate_lock); + + return -EINVAL; +} + +static int wm_adsp2v2_rate_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + struct wm_adsp *adsps = snd_soc_codec_get_drvdata(codec); + struct wm_adsp *adsp = &adsps[e->shift_l]; + unsigned int item = ucontrol->value.enumerated.item[0]; + unsigned int val; + int ret = 0; + + if (item >= e->max) + return -EINVAL; + + mutex_lock(&adsp->rate_lock); + + if (item != adsp->rate_cache) { + val = e->values[item]; + adsp->rate_cache = val; + + if (adsp->running) { + ret = regmap_update_bits(adsp->regmap, + adsp->base, + ADSP2V2_RATE_MASK, + val << ADSP2V2_RATE_SHIFT); + } + } + + mutex_unlock(&adsp->rate_lock); + + return ret; +} + static struct soc_enum wm_adsp_fw_enum[] = { SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), + SOC_ENUM_SINGLE(0, 4, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), + SOC_ENUM_SINGLE(0, 5, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), + SOC_ENUM_SINGLE(0, 6, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), }; const struct snd_kcontrol_new wm_adsp1_fw_controls[] = { @@ -521,6 +592,55 @@ const struct snd_kcontrol_new wm_adsp2_fw_controls[] = { SOC_ENUM("DSP4 Rate", wm_adsp2_rate_enum[3]), }; EXPORT_SYMBOL_GPL(wm_adsp2_fw_controls); + +static const struct soc_enum wm_adsp2v2_rate_enum[] = { + SOC_VALUE_ENUM_SINGLE(0, 0, 0xf, ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(0, 1, 0xf, ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(0, 2, 0xf, ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(0, 3, 0xf, ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(0, 4, 0xf, ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(0, 5, 0xf, ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(0, 6, 0xf, ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), +}; + +const struct snd_kcontrol_new wm_adsp2v2_fw_controls[] = { + SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0], + wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM_EXT("DSP1 Rate", wm_adsp2v2_rate_enum[0], + wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), + SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1], + wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM_EXT("DSP2 Rate", wm_adsp2v2_rate_enum[1], + wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), + SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2], + wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM_EXT("DSP3 Rate", wm_adsp2v2_rate_enum[2], + wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), + SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3], + wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM_EXT("DSP4 Rate", wm_adsp2v2_rate_enum[3], + wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), + SOC_ENUM_EXT("DSP5 Firmware", wm_adsp_fw_enum[4], + wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM_EXT("DSP5 Rate", wm_adsp2v2_rate_enum[4], + wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), + SOC_ENUM_EXT("DSP6 Firmware", wm_adsp_fw_enum[5], + wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM_EXT("DSP6 Rate", wm_adsp2v2_rate_enum[5], + wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), + SOC_ENUM_EXT("DSP7 Firmware", wm_adsp_fw_enum[6], + wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM_EXT("DSP7 Rate", wm_adsp2v2_rate_enum[6], + wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), +}; +EXPORT_SYMBOL_GPL(wm_adsp2v2_fw_controls); #endif static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp, @@ -1985,30 +2105,42 @@ static int wm_adsp2_ena(struct wm_adsp *dsp) unsigned int val; int ret, count; - ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, + switch (dsp->rev) { + case 0: + ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, ADSP2_SYS_ENA, ADSP2_SYS_ENA); - if (ret != 0) - return ret; - /* Wait for the RAM to start, should be near instantaneous */ - for (count = 0; count < 10; ++count) { - ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1, - &val); if (ret != 0) return ret; - if (val & ADSP2_RAM_RDY) - break; + /* Wait for the RAM to start, should be near instantaneous */ + for (count = 0; count < 10; ++count) { + ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1, + &val); + if (ret != 0) + return ret; - msleep(1); - } + if (val & ADSP2_RAM_RDY) + break; - if (!(val & ADSP2_RAM_RDY)) { - adsp_err(dsp, "Failed to start DSP RAM\n"); - return -EBUSY; - } + msleep(1); + } - adsp_dbg(dsp, "RAM ready after %d polls\n", count); + if (!(val & ADSP2_RAM_RDY)) { + adsp_err(dsp, "Failed to start DSP RAM\n"); + return -EBUSY; + } + adsp_dbg(dsp, "RAM ready after %d polls\n", count); + break; + default: + ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, + ADSP2_MEM_ENA, ADSP2_MEM_ENA); + + if (ret != 0) + return ret; + + break; + } return 0; } @@ -2019,26 +2151,46 @@ static void wm_adsp2_boot_work(struct work_struct *work) struct wm_adsp, boot_work); int ret; - unsigned int val; + unsigned int val, mask; - /* - * For simplicity set the DSP clock rate to be the - * SYSCLK rate rather than making it configurable. - */ - ret = regmap_read(dsp->regmap, ARIZONA_SYSTEM_CLOCK_1, &val); - if (ret != 0) { - adsp_err(dsp, "Failed to read SYSCLK state: %d\n", ret); - return; - } - val = (val & ARIZONA_SYSCLK_FREQ_MASK) - >> ARIZONA_SYSCLK_FREQ_SHIFT; + switch (dsp->rev) { + case 0: + /* + * For simplicity set the DSP clock rate to be the + * SYSCLK rate rather than making it configurable. + */ + ret = regmap_read(dsp->regmap, ARIZONA_SYSTEM_CLOCK_1, &val); + if (ret != 0) { + adsp_err(dsp, "Failed to read SYSCLK state: %d\n", ret); + return; + } + val = (val & ARIZONA_SYSCLK_FREQ_MASK) + >> ARIZONA_SYSCLK_FREQ_SHIFT; - ret = regmap_update_bits(dsp->regmap, - dsp->base + ADSP2_CLOCKING, - ADSP2_CLK_SEL_MASK, val); - if (ret != 0) { - adsp_err(dsp, "Failed to set clock rate: %d\n", ret); - return; + ret = regmap_update_bits(dsp->regmap, + dsp->base + ADSP2_CLOCKING, + ADSP2_CLK_SEL_MASK, val); + if (ret != 0) { + adsp_err(dsp, "Failed to set clock rate: %d\n", ret); + return; + } + break; + default: + mutex_lock(&dsp->rate_lock); + + mask = ADSP2V2_CLK_SEL_MASK | ADSP2V2_RATE_MASK; + val = WM8285_DSP_CLK_147MHZ << ADSP2V2_CLK_SEL_SHIFT; + val |= dsp->rate_cache << ADSP2V2_RATE_SHIFT; + + ret = regmap_update_bits(dsp->regmap, dsp->base, mask, val); + if (ret != 0) { + adsp_err(dsp, "Failed to set DSP_CLK rate: %d\n", ret); + mutex_unlock(&dsp->rate_lock); + return; + } + + mutex_unlock(&dsp->rate_lock); + break; } ret = wm_adsp2_ena(dsp); @@ -2157,9 +2309,10 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, return -EIO; ret = regmap_update_bits(dsp->regmap, - dsp->base + ADSP2_CONTROL, - ADSP2_CORE_ENA | ADSP2_START, - ADSP2_CORE_ENA | ADSP2_START); + dsp->base + ADSP2_CONTROL, + ADSP2_CORE_ENA | ADSP2_START, + ADSP2_CORE_ENA | ADSP2_START); + if (ret != 0) goto err; break; @@ -2178,14 +2331,24 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, dsp->running = false; - regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, - ADSP2_SYS_ENA | ADSP2_CORE_ENA | - ADSP2_START, 0); - - /* Make sure DMAs are quiesced */ - regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0); - regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0); - regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0); + switch (dsp->rev) { + case 1: + regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, + ADSP2_MEM_ENA, 0); + /* Fall through + * MEM_ENA is cleared to disable the RAM on WM8285 + */ + default: + regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, + ADSP2_SYS_ENA | ADSP2_CORE_ENA | + ADSP2_START, 0); + + /* Make sure DMAs are quiesced */ + regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0); + regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0); + regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0); + break; + } list_for_each_entry(ctl, &dsp->ctl_list, list) ctl->enabled = 0; @@ -2386,6 +2549,7 @@ int wm_adsp2_init(struct wm_adsp *adsp, struct mutex *fw_lock) INIT_LIST_HEAD(&adsp->ctl_list); INIT_WORK(&adsp->boot_work, wm_adsp2_boot_work); mutex_init(&adsp->ctl_lock); + mutex_init(&adsp->rate_lock); adsp->fw_lock = fw_lock; diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 62833424322..bff9fceafe4 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -70,6 +70,7 @@ struct wm_adsp { const char *part; int num; int type; + int rev; struct device *dev; struct regmap *regmap; struct snd_soc_card *card; @@ -79,6 +80,9 @@ struct wm_adsp { int sysclk_mask; int sysclk_shift; + unsigned int rate_cache; + struct mutex rate_lock; + struct list_head alg_regions; int fw_id; @@ -129,6 +133,7 @@ struct wm_adsp { extern const struct snd_kcontrol_new wm_adsp1_fw_controls[]; extern const struct snd_kcontrol_new wm_adsp2_fw_controls[]; +extern const struct snd_kcontrol_new wm_adsp2v2_fw_controls[]; int wm_adsp1_init(struct wm_adsp *adsp); int wm_adsp2_init(struct wm_adsp *adsp, struct mutex *fw_lock); From 596a600ce3c62366abd603ecba77213201eeae8e Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 20 Aug 2014 17:28:58 +0100 Subject: [PATCH 0501/1167] gpio: arizona: Add support for WM8285/WM1840 Change-Id: I22d443b99e9a0e74cc0be91d519e01b2b8765e54 Signed-off-by: Charles Keepax Signed-off-by: Nariman Poushin --- drivers/gpio/gpio-arizona.c | 76 +++++++++++++++++++++++++++++++ include/linux/mfd/arizona/pdata.h | 5 ++ 2 files changed, 81 insertions(+) diff --git a/drivers/gpio/gpio-arizona.c b/drivers/gpio/gpio-arizona.c index 9ff1b553be7..9d5ea3310c8 100644 --- a/drivers/gpio/gpio-arizona.c +++ b/drivers/gpio/gpio-arizona.c @@ -85,6 +85,71 @@ static void arizona_gpio_set(struct gpio_chip *chip, unsigned offset, int value) ARIZONA_GPN_LVL, value); } +static int wm8285_gpio_direction_in(struct gpio_chip *chip, unsigned offset) +{ + struct arizona_gpio *arizona_gpio = to_arizona_gpio(chip); + struct arizona *arizona = arizona_gpio->arizona; + + offset *= 2; + + return regmap_update_bits(arizona->regmap, WM8285_GPIO1_CTRL_2 + offset, + ARIZONA_GPN_DIR, ARIZONA_GPN_DIR); +} + +static int wm8285_gpio_get(struct gpio_chip *chip, unsigned offset) +{ + struct arizona_gpio *arizona_gpio = to_arizona_gpio(chip); + struct arizona *arizona = arizona_gpio->arizona; + unsigned int val; + int ret; + + offset *= 2; + + ret = regmap_read(arizona->regmap, WM8285_GPIO1_CTRL_1 + offset, &val); + if (ret < 0) + return ret; + + if (val & WM8285_GPN_LVL) + return 1; + else + return 0; +} + +static int wm8285_gpio_direction_out(struct gpio_chip *chip, + unsigned offset, int value) +{ + struct arizona_gpio *arizona_gpio = to_arizona_gpio(chip); + struct arizona *arizona = arizona_gpio->arizona; + int ret; + + offset *= 2; + + if (value) + value = WM8285_GPN_LVL; + + ret = regmap_update_bits(arizona->regmap, WM8285_GPIO1_CTRL_2 + offset, + ARIZONA_GPN_DIR, 0); + if (ret < 0) + return ret; + + return regmap_update_bits(arizona->regmap, WM8285_GPIO1_CTRL_1 + offset, + WM8285_GPN_LVL, value); +} + +static void wm8285_gpio_set(struct gpio_chip *chip, unsigned offset, int value) +{ + struct arizona_gpio *arizona_gpio = to_arizona_gpio(chip); + struct arizona *arizona = arizona_gpio->arizona; + + offset *= 2; + + if (value) + value = WM8285_GPN_LVL; + + regmap_update_bits(arizona->regmap, WM8285_GPIO1_CTRL_1 + offset, + WM8285_GPN_LVL, value); +} + static struct gpio_chip template_chip = { .label = "arizona", .owner = THIS_MODULE, @@ -123,6 +188,17 @@ static int arizona_gpio_probe(struct platform_device *pdev) case WM1814: arizona_gpio->gpio_chip.ngpio = 5; break; + case WM8285: + case WM1840: + arizona_gpio->gpio_chip.direction_input = + wm8285_gpio_direction_in; + arizona_gpio->gpio_chip.get = wm8285_gpio_get; + arizona_gpio->gpio_chip.direction_output = + wm8285_gpio_direction_out; + arizona_gpio->gpio_chip.set = wm8285_gpio_set; + + arizona_gpio->gpio_chip.ngpio = 40; + break; case WM1831: case CS47L24: arizona_gpio->gpio_chip.ngpio = 2; diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 980c84ec274..08fbf9a132e 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -45,6 +45,11 @@ #define ARIZONA_GPN_FN_SHIFT 0 /* GPN_FN - [6:0] */ #define ARIZONA_GPN_FN_WIDTH 7 /* GPN_FN - [6:0] */ +#define WM8285_GPN_LVL 0x8000 /* GPN_LVL */ +#define WM8285_GPN_LVL_MASK 0x8000 /* GPN_LVL */ +#define WM8285_GPN_LVL_SHIFT 15 /* GPN_LVL */ +#define WM8285_GPN_LVL_WIDTH 1 /* GPN_LVL */ + #define ARIZONA_MAX_GPIO_REGS 5 #define WM8285_MAX_GPIO_REGS 80 From 7a1adb92d78c52923560b00adae732930ea132d4 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 19 Aug 2014 10:41:07 +0100 Subject: [PATCH 0502/1167] extcon: arizona: Add support for wm8285/WM1840 Change-Id: Ibd7c072382efa473087e76dfabe2d4125d29d3bc Signed-off-by: Charles Keepax Signed-off-by: Nariman Poushin --- drivers/extcon/extcon-arizona.c | 252 ++++++++++++++++++++++++-------- 1 file changed, 192 insertions(+), 60 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 420961ae68f..90225ec6d6d 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -46,6 +46,9 @@ #define ARIZONA_MICD_CLAMP_MODE_JDL 0x4 #define ARIZONA_MICD_CLAMP_MODE_JDH 0x5 + +/* GP5 is analogous to JD2 (for systems without a dedicated second JD pin) */ +#define ARIZONA_MICD_CLAMP_MODE_JDL_GP5L 0x8 #define ARIZONA_MICD_CLAMP_MODE_JDL_GP5H 0x9 #define ARIZONA_MICD_CLAMP_MODE_JDH_GP5H 0xb @@ -161,9 +164,11 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, int ret; switch (arizona->type) { - case WM8998: - case WM1814: - mask = 0; + case WM5102: + case WM8997: + mask = ARIZONA_RMV_SHRT_HP1L; + if (clamp) + val = ARIZONA_RMV_SHRT_HP1L; break; case WM8280: case WM5110: @@ -175,9 +180,7 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, val = ARIZONA_HP1L_FLWR | ARIZONA_HP1L_SHRTI; break; default: - mask = ARIZONA_RMV_SHRT_HP1L; - if (clamp) - val = ARIZONA_RMV_SHRT_HP1L; + mask = 0; break; }; @@ -256,6 +259,8 @@ static const char *arizona_extcon_get_micbias(struct arizona_extcon_info *info) return "MICBIAS2"; case 3: return "MICBIAS3"; + case 4: + return "MICBIAS4"; default: return "MICVDD"; } @@ -1065,7 +1070,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) { struct arizona_extcon_info *info = data; struct arizona *arizona = info->arizona; - unsigned int val, present, mask; + unsigned int reg, val, present, mask; bool cancelled_hp, cancelled_mic; int ret, i; @@ -1076,18 +1081,43 @@ static irqreturn_t arizona_jackdet(int irq, void *data) mutex_lock(&info->lock); - if (arizona->pdata.jd_gpio5) { - mask = ARIZONA_MICD_CLAMP_STS; - present = 0; - } else { - mask = ARIZONA_JD1_STS; - if (arizona->pdata.jd_invert) + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8998: + case WM1814: + case WM8280: + if (arizona->pdata.jd_gpio5) { + mask = ARIZONA_MICD_CLAMP_STS; present = 0; - else - present = ARIZONA_JD1_STS; + } else { + mask = ARIZONA_JD1_STS; + if (arizona->pdata.jd_invert) + present = 0; + else + present = ARIZONA_JD1_STS; + } + + reg = ARIZONA_AOD_IRQ_RAW_STATUS; + break; + default: + if (arizona->pdata.jd_gpio5) { + mask = WM8285_MICD_CLAMP_RISE_STS1; + present = 0; + } else { + mask = ARIZONA_JD1_STS; + if (arizona->pdata.jd_invert) + present = 0; + else + present = ARIZONA_JD1_STS; + } + + reg = WM8285_IRQ1_RAW_STATUS_7; + break; } - ret = regmap_read(arizona->regmap, ARIZONA_AOD_IRQ_RAW_STATUS, &val); + ret = regmap_read(arizona->regmap, reg, &val); if (ret != 0) { dev_err(arizona->dev, "Failed to read jackdet status: %d\n", ret); @@ -1114,6 +1144,22 @@ static irqreturn_t arizona_jackdet(int irq, void *data) } info->last_jackdet = val; + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8998: + case WM1814: + case WM8280: + reg = ARIZONA_JACK_DETECT_DEBOUNCE; + mask = ARIZONA_MICD_CLAMP_DB | ARIZONA_JD1_DB; + break; + default: + reg = WM8285_INTERRUPT_DEBOUNCE_7; + mask = WM8285_MICD_CLAMP_DB | WM8285_JD1_DB; + break; + } + if (info->last_jackdet == present) { dev_dbg(arizona->dev, "Detected jack\n"); ret = extcon_set_cable_state_(&info->edev, @@ -1137,9 +1183,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) msecs_to_jiffies(HPDET_DEBOUNCE)); } - regmap_update_bits(arizona->regmap, - ARIZONA_JACK_DETECT_DEBOUNCE, - ARIZONA_MICD_CLAMP_DB | ARIZONA_JD1_DB, 0); + regmap_update_bits(arizona->regmap, reg, mask, 0); } else { dev_dbg(arizona->dev, "Detected jack removal\n"); @@ -1163,10 +1207,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) dev_err(arizona->dev, "Removal report failed: %d\n", ret); - regmap_update_bits(arizona->regmap, - ARIZONA_JACK_DETECT_DEBOUNCE, - ARIZONA_MICD_CLAMP_DB | ARIZONA_JD1_DB, - ARIZONA_MICD_CLAMP_DB | ARIZONA_JD1_DB); + regmap_update_bits(arizona->regmap, reg, mask, mask); } if (arizona->pdata.micd_timeout) @@ -1175,12 +1216,23 @@ static irqreturn_t arizona_jackdet(int irq, void *data) info->micd_timeout = DEFAULT_MICD_TIMEOUT; out: - /* Clear trig_sts to make sure DCVDD is not forced up */ - regmap_write(arizona->regmap, ARIZONA_AOD_WKUP_AND_TRIG, - ARIZONA_MICD_CLAMP_FALL_TRIG_STS | - ARIZONA_MICD_CLAMP_RISE_TRIG_STS | - ARIZONA_JD1_FALL_TRIG_STS | - ARIZONA_JD1_RISE_TRIG_STS); + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8998: + case WM1814: + case WM8280: + /* Clear trig_sts to make sure DCVDD is not forced up */ + regmap_write(arizona->regmap, ARIZONA_AOD_WKUP_AND_TRIG, + ARIZONA_MICD_CLAMP_FALL_TRIG_STS | + ARIZONA_MICD_CLAMP_RISE_TRIG_STS | + ARIZONA_JD1_FALL_TRIG_STS | + ARIZONA_JD1_RISE_TRIG_STS); + break; + default: + break; + } mutex_unlock(&info->lock); @@ -1281,36 +1333,90 @@ static ssize_t arizona_extcon_show(struct device *dev, static void arizona_extcon_set_micd_clamp_mode(struct arizona *arizona) { - unsigned int val, clamp_mode; + unsigned int clamp_ctrl_reg, clamp_ctrl_mask, clamp_ctrl_val; + unsigned int clamp_db_reg, clamp_db_mask, clamp_db_val; + int val; - if (arizona->pdata.jd_gpio5) { - /* Put the GPIO into input mode with optional pull */ - val = 0xc101; - if (arizona->pdata.jd_gpio5_nopull) - val &= ~ARIZONA_GPN_PU; + /* Set up the regs */ + switch (arizona->type) { + case WM5102: + case WM8997: + case WM8998: + case WM1814: + case WM8280: + case WM5110: + clamp_ctrl_reg = ARIZONA_MICD_CLAMP_CONTROL; + clamp_ctrl_mask = ARIZONA_MICD_CLAMP_MODE_MASK; + + clamp_db_reg = ARIZONA_JACK_DETECT_DEBOUNCE; + clamp_db_mask = ARIZONA_MICD_CLAMP_DB; + clamp_db_val = ARIZONA_MICD_CLAMP_DB; + break; + default: + clamp_ctrl_reg = WM8285_MICD_CLAMP_CONTROL; + clamp_ctrl_mask = ARIZONA_MICD_CLAMP_MODE_MASK; - regmap_write(arizona->regmap, ARIZONA_GPIO5_CTRL, - val); + clamp_db_reg = WM8285_INTERRUPT_DEBOUNCE_7; + clamp_db_mask = WM8285_MICD_CLAMP_DB; + clamp_db_val = WM8285_MICD_CLAMP_DB; + break; + } - if (arizona->pdata.jd_invert) - clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDH_GP5H; - else - clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDL_GP5H; - } else { - if (arizona->pdata.jd_invert) - clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDH; - else - clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDL; + switch (arizona->type) { + case WM5102: + case WM8997: + case WM8998: + case WM1814: + case WM8280: + case WM5110: + if (arizona->pdata.jd_gpio5) { + /* Put the GPIO into input mode with optional pull */ + val = 0xc101; + if (arizona->pdata.jd_gpio5_nopull) + val &= ~ARIZONA_GPN_PU; + + regmap_write(arizona->regmap, ARIZONA_GPIO5_CTRL, + val); + + if (arizona->pdata.jd_invert) + clamp_ctrl_val = + ARIZONA_MICD_CLAMP_MODE_JDH_GP5H; + else + clamp_ctrl_val = + ARIZONA_MICD_CLAMP_MODE_JDL_GP5H; + } else { + if (arizona->pdata.jd_invert) + clamp_ctrl_val = ARIZONA_MICD_CLAMP_MODE_JDH; + else + clamp_ctrl_val = ARIZONA_MICD_CLAMP_MODE_JDL; + } + break; + default: + if (arizona->pdata.jd_gpio5) { + if (arizona->pdata.jd_invert) + clamp_ctrl_val = + ARIZONA_MICD_CLAMP_MODE_JDH_GP5H; + else + clamp_ctrl_val = + ARIZONA_MICD_CLAMP_MODE_JDL_GP5L; + } else { + if (arizona->pdata.jd_invert) + clamp_ctrl_val = ARIZONA_MICD_CLAMP_MODE_JDH; + else + clamp_ctrl_val = ARIZONA_MICD_CLAMP_MODE_JDL; + } + break; } regmap_update_bits(arizona->regmap, - ARIZONA_MICD_CLAMP_CONTROL, - ARIZONA_MICD_CLAMP_MODE_MASK, clamp_mode); + clamp_ctrl_reg, + clamp_ctrl_mask, + clamp_ctrl_val); regmap_update_bits(arizona->regmap, - ARIZONA_JACK_DETECT_DEBOUNCE, - ARIZONA_MICD_CLAMP_DB, - ARIZONA_MICD_CLAMP_DB); + clamp_db_reg, + clamp_db_mask, + clamp_db_val); } static int arizona_extcon_probe(struct platform_device *pdev) @@ -1318,6 +1424,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); struct arizona_pdata *pdata = &arizona->pdata; struct arizona_extcon_info *info; + unsigned int reg; int jack_irq_fall, jack_irq_rise; int ret, mode, i, j; @@ -1379,13 +1486,10 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; } break; - case WM8998: - case WM1814: + default: info->micd_clamp = true; info->hpdet_ip = 2; break; - default: - break; } info->edev.name = "Headset Jack"; @@ -1416,9 +1520,25 @@ static int arizona_extcon_probe(struct platform_device *pdev) info->micd_num_modes = ARRAY_SIZE(micd_default_modes); } + switch (arizona->type) { + case WM8997: + case WM5102: + case WM1814: + case WM8998: + case WM8280: + case WM5110: + reg = ARIZONA_GP_SWITCH_1; + break; + default: + reg = WM8285_GP_SWITCH_1; + break; + } + if (arizona->pdata.gpsw > 0) - regmap_update_bits(arizona->regmap, ARIZONA_GP_SWITCH_1, - ARIZONA_SW1_MODE_MASK, arizona->pdata.gpsw); + regmap_update_bits(arizona->regmap, + reg, + ARIZONA_SW1_MODE_MASK, + arizona->pdata.gpsw); if (arizona->pdata.micd_pol_gpio > 0) { if (info->micd_modes[0].gpio) @@ -1646,9 +1766,21 @@ static int arizona_extcon_remove(struct platform_device *pdev) pm_runtime_disable(&pdev->dev); - regmap_update_bits(arizona->regmap, - ARIZONA_MICD_CLAMP_CONTROL, - ARIZONA_MICD_CLAMP_MODE_MASK, 0); + switch (arizona->type) { + case WM5102: + case WM8997: + case WM8998: + case WM1814: + case WM8280: + case WM5110: + regmap_update_bits(arizona->regmap, ARIZONA_MICD_CLAMP_CONTROL, + ARIZONA_MICD_CLAMP_MODE_MASK, 0); + break; + default: + regmap_update_bits(arizona->regmap, WM8285_MICD_CLAMP_CONTROL, + ARIZONA_MICD_CLAMP_MODE_MASK, 0); + break; + } if (arizona->pdata.jd_gpio5) { jack_irq_rise = ARIZONA_IRQ_MICD_CLAMP_RISE; From 638c9230843d3062eca7f817e2a2443cb8ff629a Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Thu, 9 Oct 2014 17:05:35 +0100 Subject: [PATCH 0503/1167] extcon: arizona: Disable MIC_CLAMPD_OVD for WM8285/WM1840 Change-Id: Ibc39b37315645a50d41f6f67d3919df24d754fbd Signed-off-by: Nariman Poushin Signed-off-by: Richard Fitzgerald Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 90225ec6d6d..b0adf65f779 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -1359,6 +1359,10 @@ static void arizona_extcon_set_micd_clamp_mode(struct arizona *arizona) clamp_db_reg = WM8285_INTERRUPT_DEBOUNCE_7; clamp_db_mask = WM8285_MICD_CLAMP_DB; clamp_db_val = WM8285_MICD_CLAMP_DB; + + regmap_update_bits(arizona->regmap, + WM8285_MICD_CLAMP_CONTROL, + 0x10, 0); break; } From 0545d40f31f7e94508128fcef7334b43d667acfb Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 19 Aug 2014 10:41:07 +0100 Subject: [PATCH 0504/1167] switch: arizona: Add support for WM8285/WM1840 Change-Id: Ia2a1099a71acffb0d2485694008e79c3e4ab5dd2 Signed-off-by: Nariman Poushin Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 252 ++++++++++++++++++++++++-------- 1 file changed, 192 insertions(+), 60 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index b970431bf74..76ee5624cb8 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -50,6 +50,9 @@ #define ARIZONA_MICD_CLAMP_MODE_JDL 0x4 #define ARIZONA_MICD_CLAMP_MODE_JDH 0x5 + +/* GP5 is analogous to JD2 (for systems without a dedicated second JD pin) */ +#define ARIZONA_MICD_CLAMP_MODE_JDL_GP5L 0x8 #define ARIZONA_MICD_CLAMP_MODE_JDL_GP5H 0x9 #define ARIZONA_MICD_CLAMP_MODE_JDH_GP5H 0xb @@ -248,9 +251,11 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, int ret; switch (arizona->type) { - case WM1814: - case WM8998: - mask = 0; + case WM5102: + case WM8997: + mask = ARIZONA_RMV_SHRT_HP1L; + if (clamp) + val = ARIZONA_RMV_SHRT_HP1L; break; case WM8280: case WM5110: @@ -274,9 +279,7 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, ret); break; default: - mask = ARIZONA_RMV_SHRT_HP1L; - if (clamp) - val = ARIZONA_RMV_SHRT_HP1L; + mask = 0; break; }; @@ -355,6 +358,8 @@ static const char *arizona_extcon_get_micbias(struct arizona_extcon_info *info) return "MICBIAS2"; case 3: return "MICBIAS3"; + case 4: + return "MICBIAS4"; default: return "MICVDD"; } @@ -1673,7 +1678,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) { struct arizona_extcon_info *info = data; struct arizona *arizona = info->arizona; - unsigned int val, present, mask; + unsigned int reg, val, present, mask; bool cancelled_hp, cancelled_state; int ret, i; @@ -1684,18 +1689,43 @@ static irqreturn_t arizona_jackdet(int irq, void *data) mutex_lock(&info->lock); - if (arizona->pdata.jd_gpio5) { - mask = ARIZONA_MICD_CLAMP_STS; - present = 0; - } else { - mask = ARIZONA_JD1_STS; - if (arizona->pdata.jd_invert) + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8998: + case WM1814: + case WM8280: + if (arizona->pdata.jd_gpio5) { + mask = ARIZONA_MICD_CLAMP_STS; present = 0; - else - present = ARIZONA_JD1_STS; + } else { + mask = ARIZONA_JD1_STS; + if (arizona->pdata.jd_invert) + present = 0; + else + present = ARIZONA_JD1_STS; + } + + reg = ARIZONA_AOD_IRQ_RAW_STATUS; + break; + default: + if (arizona->pdata.jd_gpio5) { + mask = WM8285_MICD_CLAMP_RISE_STS1; + present = 0; + } else { + mask = ARIZONA_JD1_STS; + if (arizona->pdata.jd_invert) + present = 0; + else + present = ARIZONA_JD1_STS; + } + + reg = WM8285_IRQ1_RAW_STATUS_7; + break; } - ret = regmap_read(arizona->regmap, ARIZONA_AOD_IRQ_RAW_STATUS, &val); + ret = regmap_read(arizona->regmap, reg, &val); if (ret != 0) { dev_err(arizona->dev, "Failed to read jackdet status: %d\n", ret); @@ -1718,6 +1748,22 @@ static irqreturn_t arizona_jackdet(int irq, void *data) } info->last_jackdet = val; + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8998: + case WM1814: + case WM8280: + reg = ARIZONA_JACK_DETECT_DEBOUNCE; + mask = ARIZONA_MICD_CLAMP_DB | ARIZONA_JD1_DB; + break; + default: + reg = WM8285_INTERRUPT_DEBOUNCE_7; + mask = WM8285_MICD_CLAMP_DB | WM8285_JD1_DB; + break; + } + if (info->last_jackdet == present) { dev_dbg(arizona->dev, "Detected jack\n"); @@ -1748,9 +1794,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) msecs_to_jiffies(HPDET_DEBOUNCE)); } - regmap_update_bits(arizona->regmap, - ARIZONA_JACK_DETECT_DEBOUNCE, - ARIZONA_MICD_CLAMP_DB | ARIZONA_JD1_DB, 0); + regmap_update_bits(arizona->regmap, reg, mask, 0); } else { dev_dbg(arizona->dev, "Detected jack removal\n"); @@ -1769,10 +1813,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) arizona_extcon_report(info, BIT_NO_HEADSET); - regmap_update_bits(arizona->regmap, - ARIZONA_JACK_DETECT_DEBOUNCE, - ARIZONA_MICD_CLAMP_DB | ARIZONA_JD1_DB, - ARIZONA_MICD_CLAMP_DB | ARIZONA_JD1_DB); + regmap_update_bits(arizona->regmap, reg, mask, mask); switch (arizona->type) { case WM5110: @@ -1795,12 +1836,23 @@ static irqreturn_t arizona_jackdet(int irq, void *data) } out: - /* Clear trig_sts to make sure DCVDD is not forced up */ - regmap_write(arizona->regmap, ARIZONA_AOD_WKUP_AND_TRIG, - ARIZONA_MICD_CLAMP_FALL_TRIG_STS | - ARIZONA_MICD_CLAMP_RISE_TRIG_STS | - ARIZONA_JD1_FALL_TRIG_STS | - ARIZONA_JD1_RISE_TRIG_STS); + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8998: + case WM1814: + case WM8280: + /* Clear trig_sts to make sure DCVDD is not forced up */ + regmap_write(arizona->regmap, ARIZONA_AOD_WKUP_AND_TRIG, + ARIZONA_MICD_CLAMP_FALL_TRIG_STS | + ARIZONA_MICD_CLAMP_RISE_TRIG_STS | + ARIZONA_JD1_FALL_TRIG_STS | + ARIZONA_JD1_RISE_TRIG_STS); + break; + default: + break; + } mutex_unlock(&info->lock); @@ -2005,36 +2057,90 @@ static int arizona_hpdet_d_read_calibration(struct arizona_extcon_info *info) static void arizona_extcon_set_micd_clamp_mode(struct arizona *arizona) { - unsigned int val, clamp_mode; + unsigned int clamp_ctrl_reg, clamp_ctrl_mask, clamp_ctrl_val; + unsigned int clamp_db_reg, clamp_db_mask, clamp_db_val; + int val; - if (arizona->pdata.jd_gpio5) { - /* Put the GPIO into input mode with optional pull */ - val = 0xc101; - if (arizona->pdata.jd_gpio5_nopull) - val &= ~ARIZONA_GPN_PU; + /* Set up the regs */ + switch (arizona->type) { + case WM5102: + case WM8997: + case WM8998: + case WM1814: + case WM8280: + case WM5110: + clamp_ctrl_reg = ARIZONA_MICD_CLAMP_CONTROL; + clamp_ctrl_mask = ARIZONA_MICD_CLAMP_MODE_MASK; - regmap_write(arizona->regmap, ARIZONA_GPIO5_CTRL, - val); + clamp_db_reg = ARIZONA_JACK_DETECT_DEBOUNCE; + clamp_db_mask = ARIZONA_MICD_CLAMP_DB; + clamp_db_val = ARIZONA_MICD_CLAMP_DB; + break; + default: + clamp_ctrl_reg = WM8285_MICD_CLAMP_CONTROL; + clamp_ctrl_mask = ARIZONA_MICD_CLAMP_MODE_MASK; - if (arizona->pdata.jd_invert) - clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDH_GP5H; - else - clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDL_GP5H; - } else { - if (arizona->pdata.jd_invert) - clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDH; - else - clamp_mode = ARIZONA_MICD_CLAMP_MODE_JDL; + clamp_db_reg = WM8285_INTERRUPT_DEBOUNCE_7; + clamp_db_mask = WM8285_MICD_CLAMP_DB; + clamp_db_val = WM8285_MICD_CLAMP_DB; + break; + } + + switch (arizona->type) { + case WM5102: + case WM8997: + case WM8998: + case WM1814: + case WM8280: + case WM5110: + if (arizona->pdata.jd_gpio5) { + /* Put the GPIO into input mode with optional pull */ + val = 0xc101; + if (arizona->pdata.jd_gpio5_nopull) + val &= ~ARIZONA_GPN_PU; + + regmap_write(arizona->regmap, ARIZONA_GPIO5_CTRL, + val); + + if (arizona->pdata.jd_invert) + clamp_ctrl_val = + ARIZONA_MICD_CLAMP_MODE_JDH_GP5H; + else + clamp_ctrl_val = + ARIZONA_MICD_CLAMP_MODE_JDL_GP5H; + } else { + if (arizona->pdata.jd_invert) + clamp_ctrl_val = ARIZONA_MICD_CLAMP_MODE_JDH; + else + clamp_ctrl_val = ARIZONA_MICD_CLAMP_MODE_JDL; + } + break; + default: + if (arizona->pdata.jd_gpio5) { + if (arizona->pdata.jd_invert) + clamp_ctrl_val = + ARIZONA_MICD_CLAMP_MODE_JDH_GP5H; + else + clamp_ctrl_val = + ARIZONA_MICD_CLAMP_MODE_JDL_GP5L; + } else { + if (arizona->pdata.jd_invert) + clamp_ctrl_val = ARIZONA_MICD_CLAMP_MODE_JDH; + else + clamp_ctrl_val = ARIZONA_MICD_CLAMP_MODE_JDL; + } + break; } regmap_update_bits(arizona->regmap, - ARIZONA_MICD_CLAMP_CONTROL, - ARIZONA_MICD_CLAMP_MODE_MASK, clamp_mode); + clamp_ctrl_reg, + clamp_ctrl_mask, + clamp_ctrl_val); regmap_update_bits(arizona->regmap, - ARIZONA_JACK_DETECT_DEBOUNCE, - ARIZONA_MICD_CLAMP_DB, - ARIZONA_MICD_CLAMP_DB); + clamp_db_reg, + clamp_db_mask, + clamp_db_val); } static int arizona_extcon_probe(struct platform_device *pdev) @@ -2042,6 +2148,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); struct arizona_pdata *pdata = &arizona->pdata; struct arizona_extcon_info *info; + unsigned int reg; int jack_irq_fall, jack_irq_rise; int ret, mode, i, j; @@ -2110,13 +2217,10 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; } break; - case WM8998: - case WM1814: + default: info->micd_clamp = true; info->hpdet_ip = 2; break; - default: - break; } info->edev.name = "h2w"; @@ -2147,9 +2251,25 @@ static int arizona_extcon_probe(struct platform_device *pdev) info->micd_num_modes = ARRAY_SIZE(micd_default_modes); } + switch (arizona->type) { + case WM8997: + case WM5102: + case WM1814: + case WM8998: + case WM8280: + case WM5110: + reg = ARIZONA_GP_SWITCH_1; + break; + default: + reg = WM8285_GP_SWITCH_1; + break; + } + if (arizona->pdata.gpsw > 0) - regmap_update_bits(arizona->regmap, ARIZONA_GP_SWITCH_1, - ARIZONA_SW1_MODE_MASK, arizona->pdata.gpsw); + regmap_update_bits(arizona->regmap, + reg, + ARIZONA_SW1_MODE_MASK, + arizona->pdata.gpsw); if (arizona->pdata.micd_pol_gpio > 0) { if (info->micd_modes[0].gpio) @@ -2385,9 +2505,21 @@ static int arizona_extcon_remove(struct platform_device *pdev) pm_runtime_disable(&pdev->dev); - regmap_update_bits(arizona->regmap, - ARIZONA_MICD_CLAMP_CONTROL, - ARIZONA_MICD_CLAMP_MODE_MASK, 0); + switch (arizona->type) { + case WM5102: + case WM8997: + case WM8998: + case WM1814: + case WM8280: + case WM5110: + regmap_update_bits(arizona->regmap, ARIZONA_MICD_CLAMP_CONTROL, + ARIZONA_MICD_CLAMP_MODE_MASK, 0); + break; + default: + regmap_update_bits(arizona->regmap, WM8285_MICD_CLAMP_CONTROL, + ARIZONA_MICD_CLAMP_MODE_MASK, 0); + break; + } if (arizona->pdata.jd_gpio5) { jack_irq_rise = ARIZONA_IRQ_MICD_CLAMP_RISE; From c34f8436e0a010d27fae8431a7a08f0a4e1fef78 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Thu, 9 Oct 2014 17:05:35 +0100 Subject: [PATCH 0505/1167] switch: arizona: Disable MIC_CLAMPD_OVD for WM8285/WM1840 Change-Id: I056139d78ebaaf40d2da8c3ed3ffe1eab241ffe8 Signed-off-by: Nariman Poushin Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 76ee5624cb8..a0d3c886545 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -2083,6 +2083,10 @@ static void arizona_extcon_set_micd_clamp_mode(struct arizona *arizona) clamp_db_reg = WM8285_INTERRUPT_DEBOUNCE_7; clamp_db_mask = WM8285_MICD_CLAMP_DB; clamp_db_val = WM8285_MICD_CLAMP_DB; + + regmap_update_bits(arizona->regmap, + WM8285_MICD_CLAMP_CONTROL, + 0x10, 0); break; } From 69174702605d7f04fed07d1c8c71f3bdbee9fddb Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 21 Oct 2014 17:21:28 +0100 Subject: [PATCH 0506/1167] mfd: wm8285: Update DT binding documentation for WM8285/WM1840 Add support for WM8285 in the binding, note that there is a small change to the gpio_defaults binding in that all entries in the array are no longer required. However, this is a change will not break any possible existing bindings. Change-Id: I7a5adb42ccaa8fbdbb5ad91b1dd248e3c2879cc1 Signed-off-by: Charles Keepax --- Documentation/devicetree/bindings/mfd/arizona.txt | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 5ba864d8e38..424791b7ba3 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -13,6 +13,8 @@ Required properties: "wlf,wm8997" "wlf,WM8998" "wlf,wm1814" + "wlf,wm8285" + "wlf,wm1840" "wlf,wm1831" "cirrus,cs47l24" @@ -34,9 +36,10 @@ Required properties: second cell is used to specify optional parameters (currently unused). - AVDD-supply, DBVDD1-supply, DBVDD2-supply, DBVDD3-supply (wm5102, wm5110), - CPVDD-supply, SPKVDDL-supply (wm5102, wm5110), SPKVDDR-supply (wm5102, - wm5110), SPKVDD-supply (wm8997, cs47l24) : Power supplies for the device, - as covered in Documentation/devicetree/bindings/regulator/regulator.txt + DBVDD4-supply (wm8285), CPVDD-supply, SPKVDDL-supply (wm5102, wm5110), + SPKVDDR-supply (wm5102, wm5110), SPKVDD-supply (wm8997, cs47l24) : Power + supplies for the device, as covered in + Documentation/devicetree/bindings/regulator/regulator.txt Optional properties: @@ -89,12 +92,12 @@ Optional properties: and simply output MICVDD - wlf,micbias2 : See wlf,micbias1 - wlf,micbias3 : See wlf,micbias1 + - wlf,micbias4 : See wlf,micbias1 - wlf,gpio-defaults : A list of GPIO configuration register values. If absent, no configuration of these registers is performed. If any entry has a value that is out of range for a 16 bit register then - the chip default will be used. If present exactly five values must - be specified. + the chip default will be used. - wlf,max-channels-clocked : The maximum number of channels to be clocked on each AIF, useful for I2S systems with multiple data lines being mastered. From f05957b1276912d3ad1914107f6f19c61dffe8e3 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Wed, 29 Oct 2014 15:52:14 +0000 Subject: [PATCH 0507/1167] extcon: arizona: Add support for user specified micd_clamp_mode Change-Id: I052fb1cd10b7a4af0ae309ac7a8c1bf2600f9098 Signed-off-by: Nariman Poushin --- drivers/extcon/extcon-arizona.c | 12 ++++++++++++ include/linux/mfd/arizona/pdata.h | 3 +++ 2 files changed, 15 insertions(+) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index b0adf65f779..b2aeb7e4ee7 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -1312,6 +1312,9 @@ static int arizona_extcon_of_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,init-mic-delay", false, &pdata->init_mic_delay); + arizona_of_read_u32(arizona, "wlf,micd-clamp-mode", false, + &pdata->micd_clamp_mode); + return 0; } #else @@ -1366,6 +1369,14 @@ static void arizona_extcon_set_micd_clamp_mode(struct arizona *arizona) break; } + /* If the user has supplied a micd_clamp_mode, assume they know + * what they are doing and just write it out + */ + if (arizona->pdata.micd_clamp_mode) { + clamp_ctrl_val = arizona->pdata.micd_clamp_mode; + goto out; + } + switch (arizona->type) { case WM5102: case WM8997: @@ -1412,6 +1423,7 @@ static void arizona_extcon_set_micd_clamp_mode(struct arizona *arizona) break; } +out: regmap_update_bits(arizona->regmap, clamp_ctrl_reg, clamp_ctrl_mask, diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 08fbf9a132e..3fc650c5632 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -220,6 +220,9 @@ struct arizona_pdata { const struct arizona_micd_range *micd_ranges; int num_micd_ranges; + /** Mic detect clamp function */ + int micd_clamp_mode; + /** Headset polarity configurations */ struct arizona_micd_config *micd_configs; int num_micd_configs; From 5863e477ed9b50ffadd92b3cc28ce510a345b3c7 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Thu, 30 Oct 2014 10:56:58 +0000 Subject: [PATCH 0508/1167] extcon: arizona: Add DT bindings for micd_clamp_mode Change-Id: Iccba0e0a3c045d1a686b555a3a4bf7142c979eec Signed-off-by: Nariman Poushin --- Documentation/devicetree/bindings/mfd/arizona.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 424791b7ba3..2a6cd13ad51 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -79,6 +79,7 @@ Optional properties: value indicates this should be on - wlf,init-mic-delay : Adds a delay in milliseconds between jack detection and beginning ramp of MICBIAS. + - wlf,micd-clamp-mode: Specifies the logic of the micdetect clamp block - wlf,micbias1 : Configuration for the micbias regulator, should include 5 cells. @@ -175,6 +176,7 @@ codec: wm5102@1a { wlf,micbias2 = <2600 0 1 1 0>; wlf,init-mic-delay = <10>; + wlf,micd-clamp-mode = <0xb>; wlf,dmic-ref = <0 0 1 0>; wlf,inmode = <0 0 2 0>; From 6be428f01a72c0d9b775bba877ea8ebd47d43618 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Wed, 29 Oct 2014 15:52:14 +0000 Subject: [PATCH 0509/1167] switch: arizona: Add support for user specified micd_clamp_mode Change-Id: Ibf7f2737da38fda820dbd67d04837f267f690897 Signed-off-by: Nariman Poushin --- drivers/switch/switch-arizona.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index a0d3c886545..eb411627ed2 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1950,6 +1950,9 @@ static int arizona_extcon_of_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,jd-wake-time", false, &pdata->jd_wake_time); + arizona_of_read_u32(arizona, "wlf,micd-clamp-mode", false, + &pdata->micd_clamp_mode); + return 0; } #else @@ -2090,6 +2093,14 @@ static void arizona_extcon_set_micd_clamp_mode(struct arizona *arizona) break; } + /* If the user has supplied a micd_clamp_mode, assume they know + * what they are doing and just write it out + */ + if (arizona->pdata.micd_clamp_mode) { + clamp_ctrl_val = arizona->pdata.micd_clamp_mode; + goto out; + } + switch (arizona->type) { case WM5102: case WM8997: @@ -2136,6 +2147,7 @@ static void arizona_extcon_set_micd_clamp_mode(struct arizona *arizona) break; } +out: regmap_update_bits(arizona->regmap, clamp_ctrl_reg, clamp_ctrl_mask, From 0bc81a65d2834db320238c0f5c01c8c17fbb587a Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Mon, 3 Nov 2014 16:22:01 +0000 Subject: [PATCH 0510/1167] mfd: wm8285: Add EDRE_ENA Change-Id: I49eb3e3aa0e6c74ca151a1e9c03502fa272f8458 Signed-off-by: Nariman Poushin --- drivers/mfd/wm8285-tables.c | 2 ++ include/linux/mfd/arizona/registers.h | 52 +++++++++++++++++++++++++++ 2 files changed, 54 insertions(+) diff --git a/drivers/mfd/wm8285-tables.c b/drivers/mfd/wm8285-tables.c index fa52ae4611f..2d053034445 100644 --- a/drivers/mfd/wm8285-tables.c +++ b/drivers/mfd/wm8285-tables.c @@ -343,6 +343,7 @@ static const struct reg_default wm8285_reg_default[] = { { 0x00000441, 0xC050 }, /* R1089 - DRE Control 1 */ { 0x00000442, 0x0305 }, /* R1090 (0x442) - DRE Control 2 */ { 0x00000443, 0x5cfa }, /* R1091 (0x443) - DRE Control 3 */ + { 0x00000448, 0x0fff }, /* R1096 (0x448) - eDRE Enable */ { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */ { 0x00000451, 0x0000 }, { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */ @@ -1681,6 +1682,7 @@ static bool wm8285_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DAC_VOLUME_LIMIT_6R: case ARIZONA_NOISE_GATE_SELECT_6R: case ARIZONA_DRE_ENABLE: + case WM8285_EDRE_ENABLE: case ARIZONA_DAC_AEC_CONTROL_1: case ARIZONA_NOISE_GATE_CONTROL: case ARIZONA_PDM_SPK1_CTRL_1: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index c76b83e3bd6..a0a64860748 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -277,6 +277,7 @@ #define ARIZONA_DRE_CONTROL_1 0x441 #define ARIZONA_DRE_CONTROL_2 0x442 #define ARIZONA_DRE_CONTROL_3 0x443 +#define WM8285_EDRE_ENABLE 0x448 #define ARIZONA_DAC_AEC_CONTROL_1 0x450 #define ARIZONA_DAC_AEC_CONTROL_2 0x451 #define ARIZONA_NOISE_GATE_CONTROL 0x458 @@ -4890,6 +4891,57 @@ #define ARIZONA_DRE_LOW_LEVEL_ABS_SHIFT 0 /* LOW_LEVEL_ABS - [3:0] */ #define ARIZONA_DRE_LOW_LEVEL_ABS_WIDTH 4 /* LOW_LEVEL_ABS - [3:0] */ +/* R486 (0x448) - EDRE_Enable + */ +#define WM8285_EDRE_OUT4L_THR3_ENA 0x0800 /* EDRE_OUT4L_THR3_ENA */ +#define WM8285_EDRE_OUT4L_THR3_ENA_MASK 0x0800 /* EDRE_OUT4L_THR3_ENA */ +#define WM8285_EDRE_OUT4L_THR3_ENA_SHIFT 11 /* EDRE_OUT4L_THR3_ENA */ +#define WM8285_EDRE_OUT4L_THR3_ENA_WIDTH 1 /* EDRE_OUT4L_THR3_ENA */ +#define WM8285_EDRE_OUT4R_THR3_ENA 0x0400 /* EDRE_OUT4R_THR3_ENA */ +#define WM8285_EDRE_OUT4R_THR3_ENA_MASK 0x0400 /* EDRE_OUT4R_THR3_ENA */ +#define WM8285_EDRE_OUT4R_THR3_ENA_SHIFT 10 /* EDRE_OUT4R_THR3_ENA */ +#define WM8285_EDRE_OUT4R_THR3_ENA_WIDTH 1 /* EDRE_OUT4R_THR3_ENA */ +#define WM8285_EDRE_OUT4L_THR2_ENA 0x0200 /* EDRE_OUT4L_THR2_ENA */ +#define WM8285_EDRE_OUT4L_THR2_ENA_MASK 0x0200 /* EDRE_OUT4L_THR2_ENA */ +#define WM8285_EDRE_OUT4L_THR2_ENA_SHIFT 9 /* EDRE_OUT4L_THR2_ENA */ +#define WM8285_EDRE_OUT4L_THR2_ENA_WIDTH 1 /* EDRE_OUT4L_THR2_ENA */ +#define WM8285_EDRE_OUT4R_THR2_ENA 0x0100 /* EDRE_OUT4R_THR2_ENA */ +#define WM8285_EDRE_OUT4R_THR2_ENA_MASK 0x0100 /* EDRE_OUT4R_THR2_ENA */ +#define WM8285_EDRE_OUT4R_THR2_ENA_SHIFT 8 /* EDRE_OUT4R_THR2_ENA */ +#define WM8285_EDRE_OUT4R_THR2_ENA_WIDTH 1 /* EDRE_OUT4R_THR2_ENA */ +#define WM8285_EDRE_OUT4L_THR1_ENA 0x0080 /* EDRE_OUT4L_THR1_ENA */ +#define WM8285_EDRE_OUT4L_THR1_ENA_MASK 0x0080 /* EDRE_OUT4L_THR1_ENA */ +#define WM8285_EDRE_OUT4L_THR1_ENA_SHIFT 7 /* EDRE_OUT4L_THR1_ENA */ +#define WM8285_EDRE_OUT4L_THR1_ENA_WIDTH 1 /* EDRE_OUT4L_THR1_ENA */ +#define WM8285_EDRE_OUT4R_THR1_ENA 0x0040 /* EDRE_OUT4R_THR1_ENA */ +#define WM8285_EDRE_OUT4R_THR1_ENA_MASK 0x0040 /* EDRE_OUT4R_THR1_ENA */ +#define WM8285_EDRE_OUT4R_THR1_ENA_SHIFT 6 /* EDRE_OUT4R_THR1_ENA */ +#define WM8285_EDRE_OUT4R_THR1_ENA_WIDTH 1 /* EDRE_OUT4R_THR1_ENA */ +#define WM8285_EDRE_OUT3L_THR1_ENA 0x0020 /* EDRE_OUT3L_THR1_ENA */ +#define WM8285_EDRE_OUT3L_THR1_ENA_MASK 0x0020 /* EDRE_OUT3L_THR1_ENA */ +#define WM8285_EDRE_OUT3L_THR1_ENA_SHIFT 5 /* EDRE_OUT3L_THR1_ENA */ +#define WM8285_EDRE_OUT3L_THR1_ENA_WIDTH 1 /* EDRE_OUT3L_THR1_ENA */ +#define WM8285_EDRE_OUT3R_THR1_ENA 0x0010 /* EDRE_OUT3R_THR1_ENA */ +#define WM8285_EDRE_OUT3R_THR1_ENA_MASK 0x0010 /* EDRE_OUT3R_THR1_ENA */ +#define WM8285_EDRE_OUT3R_THR1_ENA_SHIFT 4 /* EDRE_OUT3R_THR1_ENA */ +#define WM8285_EDRE_OUT3R_THR1_ENA_WIDTH 1 /* EDRE_OUT3R_THR1_ENA */ +#define WM8285_EDRE_OUT2L_THR1_ENA 0x0008 /* EDRE_OUT2L_THR1_ENA */ +#define WM8285_EDRE_OUT2L_THR1_ENA_MASK 0x0008 /* EDRE_OUT2L_THR1_ENA */ +#define WM8285_EDRE_OUT2L_THR1_ENA_SHIFT 3 /* EDRE_OUT2L_THR1_ENA */ +#define WM8285_EDRE_OUT2L_THR1_ENA_WIDTH 1 /* EDRE_OUT2L_THR1_ENA */ +#define WM8285_EDRE_OUT2R_THR1_ENA 0x0004 /* EDRE_OUT2R_THR1_ENA */ +#define WM8285_EDRE_OUT2R_THR1_ENA_MASK 0x0004 /* EDRE_OUT2R_THR1_ENA */ +#define WM8285_EDRE_OUT2R_THR1_ENA_SHIFT 2 /* EDRE_OUT2R_THR1_ENA */ +#define WM8285_EDRE_OUT2R_THR1_ENA_WIDTH 1 /* EDRE_OUT2R_THR1_ENA */ +#define WM8285_EDRE_OUT1L_THR1_ENA 0x0002 /* EDRE_OUT1L_THR1_ENA */ +#define WM8285_EDRE_OUT1L_THR1_ENA_MASK 0x0002 /* EDRE_OUT1L_THR1_ENA */ +#define WM8285_EDRE_OUT1L_THR1_ENA_SHIFT 1 /* EDRE_OUT1L_THR1_ENA */ +#define WM8285_EDRE_OUT1L_THR1_ENA_WIDTH 1 /* EDRE_OUT1L_THR1_ENA */ +#define WM8285_EDRE_OUT1R_THR1_ENA 0x0001 /* EDRE_OUT1R_THR1_ENA */ +#define WM8285_EDRE_OUT1R_THR1_ENA_MASK 0x0001 /* EDRE_OUT1R_THR1_ENA */ +#define WM8285_EDRE_OUT1R_THR1_ENA_SHIFT 0 /* EDRE_OUT1R_THR1_ENA */ +#define WM8285_EDRE_OUT1R_THR1_ENA_WIDTH 1 /* EDRE_OUT1R_THR1_ENA */ + /* * R1104 (0x450) - DAC AEC Control 1 */ From 0c01d1047167f708aaf66e644248acc33180ed73 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Tue, 4 Nov 2014 11:38:33 +0000 Subject: [PATCH 0511/1167] mfd: wm8285: Add FRF Coefficients Change-Id: I8e65e7bb2e5188f2f5c8c297070e30436f9c4931 Signed-off-by: Nariman Poushin --- drivers/mfd/wm8285-tables.c | 83 ++++++ include/linux/mfd/arizona/registers.h | 384 ++++++++++++++++++++++++++ 2 files changed, 467 insertions(+) diff --git a/drivers/mfd/wm8285-tables.c b/drivers/mfd/wm8285-tables.c index 2d053034445..eb054049d7d 100644 --- a/drivers/mfd/wm8285-tables.c +++ b/drivers/mfd/wm8285-tables.c @@ -1371,8 +1371,42 @@ static const struct reg_default wm8285_reg_default[] = { { 0x00001341, 0x0000 }, { 0x00001342, 0x0000 }, { 0x00001343, 0x0000 }, + { 0x00001380, 0x0000 }, + { 0x00001381, 0x0000 }, + { 0x00001382, 0x0000 }, + { 0x00001383, 0x0000 }, + { 0x00001390, 0x0000 }, + { 0x00001391, 0x0000 }, + { 0x00001392, 0x0000 }, + { 0x00001393, 0x0000 }, + { 0x000013a0, 0x0000 }, + { 0x000013a1, 0x0000 }, + { 0x000013a2, 0x0000 }, + { 0x000013a3, 0x0000 }, + { 0x000013b0, 0x0000 }, + { 0x000013b1, 0x0000 }, + { 0x000013b2, 0x0000 }, + { 0x000013b3, 0x0000 }, + { 0x000013c0, 0x0000 }, + { 0x000013c1, 0x0000 }, + { 0x000013c2, 0x0000 }, + { 0x000013c3, 0x0000 }, + { 0x000013d0, 0x0000 }, + { 0x000013d1, 0x0000 }, + { 0x000013d2, 0x0000 }, + { 0x000013d3, 0x0000 }, + { 0x000013e0, 0x0000 }, + { 0x000013e1, 0x0000 }, + { 0x000013e2, 0x0000 }, + { 0x000013e3, 0x0000 }, + { 0x000013f0, 0x0000 }, + { 0x000013f1, 0x0000 }, + { 0x000013f2, 0x0000 }, + { 0x000013f3, 0x0000 }, { 0x00001400, 0x0000 }, { 0x00001401, 0x0000 }, + { 0x00001402, 0x0000 }, + { 0x00001403, 0x0000 }, { 0x00001410, 0x0000 }, { 0x00001411, 0x0000 }, { 0x00001412, 0x0000 }, @@ -1384,6 +1418,7 @@ static const struct reg_default wm8285_reg_default[] = { { 0x00001430, 0x0000 }, { 0x00001431, 0x0000 }, { 0x00001432, 0x0000 }, + { 0x00001433, 0x0000 }, { 0x00001840, 0xffff }, /* R6208 (0x1840) - IRQ1 Mask 1 */ { 0x00001841, 0xffff }, /* R6209 (0x1841) - IRQ1 Mask 2 */ { 0x00001845, 0xffff }, /* R6213 (0x1845) - IRQ1 Mask 6 */ @@ -2542,6 +2577,54 @@ static bool wm8285_16bit_readable_register(struct device *dev, unsigned int reg) case WM8285_FCR_FILTER_CONTROL: case WM8285_FCR_ADC_REFORMATTER_CONTROL: case WM8285_FCR_COEFF_START ... WM8285_FCR_COEFF_END: + case WM8285_FRF_COEFFICIENT_1L_1: + case WM8285_FRF_COEFFICIENT_1L_2: + case WM8285_FRF_COEFFICIENT_1L_3: + case WM8285_FRF_COEFFICIENT_1L_4: + case WM8285_FRF_COEFFICIENT_1R_1: + case WM8285_FRF_COEFFICIENT_1R_2: + case WM8285_FRF_COEFFICIENT_1R_3: + case WM8285_FRF_COEFFICIENT_1R_4: + case WM8285_FRF_COEFFICIENT_2L_1: + case WM8285_FRF_COEFFICIENT_2L_2: + case WM8285_FRF_COEFFICIENT_2L_3: + case WM8285_FRF_COEFFICIENT_2L_4: + case WM8285_FRF_COEFFICIENT_2R_1: + case WM8285_FRF_COEFFICIENT_2R_2: + case WM8285_FRF_COEFFICIENT_2R_3: + case WM8285_FRF_COEFFICIENT_2R_4: + case WM8285_FRF_COEFFICIENT_3L_1: + case WM8285_FRF_COEFFICIENT_3L_2: + case WM8285_FRF_COEFFICIENT_3L_3: + case WM8285_FRF_COEFFICIENT_3L_4: + case WM8285_FRF_COEFFICIENT_3R_1: + case WM8285_FRF_COEFFICIENT_3R_2: + case WM8285_FRF_COEFFICIENT_3R_3: + case WM8285_FRF_COEFFICIENT_3R_4: + case WM8285_FRF_COEFFICIENT_4L_1: + case WM8285_FRF_COEFFICIENT_4L_2: + case WM8285_FRF_COEFFICIENT_4L_3: + case WM8285_FRF_COEFFICIENT_4L_4: + case WM8285_FRF_COEFFICIENT_4R_1: + case WM8285_FRF_COEFFICIENT_4R_2: + case WM8285_FRF_COEFFICIENT_4R_3: + case WM8285_FRF_COEFFICIENT_4R_4: + case WM8285_FRF_COEFFICIENT_5L_1: + case WM8285_FRF_COEFFICIENT_5L_2: + case WM8285_FRF_COEFFICIENT_5L_3: + case WM8285_FRF_COEFFICIENT_5L_4: + case WM8285_FRF_COEFFICIENT_5R_1: + case WM8285_FRF_COEFFICIENT_5R_2: + case WM8285_FRF_COEFFICIENT_5R_3: + case WM8285_FRF_COEFFICIENT_5R_4: + case WM8285_FRF_COEFFICIENT_6L_1: + case WM8285_FRF_COEFFICIENT_6L_2: + case WM8285_FRF_COEFFICIENT_6L_3: + case WM8285_FRF_COEFFICIENT_6L_4: + case WM8285_FRF_COEFFICIENT_6R_1: + case WM8285_FRF_COEFFICIENT_6R_2: + case WM8285_FRF_COEFFICIENT_6R_3: + case WM8285_FRF_COEFFICIENT_6R_4: case WM8285_GPIO1_CTRL_1: case WM8285_GPIO1_CTRL_2: case WM8285_GPIO2_CTRL_1: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index a0a64860748..b6258ebca56 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -1347,6 +1347,54 @@ #define ARIZONA_DSP3_SCRATCH_1 0x1341 #define ARIZONA_DSP3_SCRATCH_2 0x1342 #define ARIZONA_DSP3_SCRATCH_3 0x1343 +#define WM8285_FRF_COEFFICIENT_1L_1 0x1380 +#define WM8285_FRF_COEFFICIENT_1L_2 0x1381 +#define WM8285_FRF_COEFFICIENT_1L_3 0x1382 +#define WM8285_FRF_COEFFICIENT_1L_4 0x1383 +#define WM8285_FRF_COEFFICIENT_1R_1 0x1390 +#define WM8285_FRF_COEFFICIENT_1R_2 0x1391 +#define WM8285_FRF_COEFFICIENT_1R_3 0x1392 +#define WM8285_FRF_COEFFICIENT_1R_4 0x1393 +#define WM8285_FRF_COEFFICIENT_2L_1 0x13A0 +#define WM8285_FRF_COEFFICIENT_2L_2 0x13A1 +#define WM8285_FRF_COEFFICIENT_2L_3 0x13A2 +#define WM8285_FRF_COEFFICIENT_2L_4 0x13A3 +#define WM8285_FRF_COEFFICIENT_2R_1 0x13B0 +#define WM8285_FRF_COEFFICIENT_2R_2 0x13B1 +#define WM8285_FRF_COEFFICIENT_2R_3 0x13B2 +#define WM8285_FRF_COEFFICIENT_2R_4 0x13B3 +#define WM8285_FRF_COEFFICIENT_3L_1 0x13C0 +#define WM8285_FRF_COEFFICIENT_3L_2 0x13C1 +#define WM8285_FRF_COEFFICIENT_3L_3 0x13C2 +#define WM8285_FRF_COEFFICIENT_3L_4 0x13C3 +#define WM8285_FRF_COEFFICIENT_3R_1 0x13D0 +#define WM8285_FRF_COEFFICIENT_3R_2 0x13D1 +#define WM8285_FRF_COEFFICIENT_3R_3 0x13D2 +#define WM8285_FRF_COEFFICIENT_3R_4 0x13D3 +#define WM8285_FRF_COEFFICIENT_4L_1 0x13E0 +#define WM8285_FRF_COEFFICIENT_4L_2 0x13E1 +#define WM8285_FRF_COEFFICIENT_4L_3 0x13E2 +#define WM8285_FRF_COEFFICIENT_4L_4 0x13E3 +#define WM8285_FRF_COEFFICIENT_4R_1 0x13F0 +#define WM8285_FRF_COEFFICIENT_4R_2 0x13F1 +#define WM8285_FRF_COEFFICIENT_4R_3 0x13F2 +#define WM8285_FRF_COEFFICIENT_4R_4 0x13F3 +#define WM8285_FRF_COEFFICIENT_5L_1 0x1400 +#define WM8285_FRF_COEFFICIENT_5L_2 0x1401 +#define WM8285_FRF_COEFFICIENT_5L_3 0x1402 +#define WM8285_FRF_COEFFICIENT_5L_4 0x1403 +#define WM8285_FRF_COEFFICIENT_5R_1 0x1410 +#define WM8285_FRF_COEFFICIENT_5R_2 0x1411 +#define WM8285_FRF_COEFFICIENT_5R_3 0x1412 +#define WM8285_FRF_COEFFICIENT_5R_4 0x1413 +#define WM8285_FRF_COEFFICIENT_6L_1 0x1420 +#define WM8285_FRF_COEFFICIENT_6L_2 0x1421 +#define WM8285_FRF_COEFFICIENT_6L_3 0x1422 +#define WM8285_FRF_COEFFICIENT_6L_4 0x1423 +#define WM8285_FRF_COEFFICIENT_6R_1 0x1430 +#define WM8285_FRF_COEFFICIENT_6R_2 0x1431 +#define WM8285_FRF_COEFFICIENT_6R_3 0x1432 +#define WM8285_FRF_COEFFICIENT_6R_4 0x1433 #define ARIZONA_DSP4_CONTROL_1 0x1400 #define ARIZONA_DSP4_CLOCKING_1 0x1401 #define ARIZONA_DSP4_STATUS_1 0x1404 @@ -9765,6 +9813,342 @@ #define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_SHIFT 0 /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */ #define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_WIDTH 8 /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */ +/* +* R1718 (0x1380) - FRF_Coefficient_1L_1 +*/ +#define WM8285_FRF_COEFF_1L_1_MASK 0xFFFF /* FRF_COEFF_1L_1 - [15:0] */ +#define WM8285_FRF_COEFF_1L_1_SHIFT 0 /* FRF_COEFF_1L_1 - [15:0] */ +#define WM8285_FRF_COEFF_1L_1_WIDTH 16 /* FRF_COEFF_1L_1 - [15:0] */ + +/* + * R1719 (0x1381) - FRF_Coefficient_1L_2 + */ +#define WM8285_FRF_COEFF_1L_2_MASK 0xFFFF /* FRF_COEFF_1L_2 - [15:0] */ +#define WM8285_FRF_COEFF_1L_2_SHIFT 0 /* FRF_COEFF_1L_2 - [15:0] */ +#define WM8285_FRF_COEFF_1L_2_WIDTH 16 /* FRF_COEFF_1L_2 - [15:0] */ + +/* + * R1720 (0x1382) - FRF_Coefficient_1L_3 + */ +#define WM8285_FRF_COEFF_1L_3_MASK 0xFFFF /* FRF_COEFF_1L_3 - [15:0] */ +#define WM8285_FRF_COEFF_1L_3_SHIFT 0 /* FRF_COEFF_1L_3 - [15:0] */ +#define WM8285_FRF_COEFF_1L_3_WIDTH 16 /* FRF_COEFF_1L_3 - [15:0] */ + +/* + * R1721 (0x1383) - FRF_Coefficient_1L_4 + */ +#define WM8285_FRF_COEFF_1L_4_MASK 0xFFFF /* FRF_COEFF_1L_4 - [15:0] */ +#define WM8285_FRF_COEFF_1L_4_SHIFT 0 /* FRF_COEFF_1L_4 - [15:0] */ +#define WM8285_FRF_COEFF_1L_4_WIDTH 16 /* FRF_COEFF_1L_4 - [15:0] */ + +/* + * R1722 (0x1390) - FRF_Coefficient_1R_1 + */ +#define WM8285_FRF_COEFF_1R_1_MASK 0xFFFF /* FRF_COEFF_1R_1 - [15:0] */ +#define WM8285_FRF_COEFF_1R_1_SHIFT 0 /* FRF_COEFF_1R_1 - [15:0] */ +#define WM8285_FRF_COEFF_1R_1_WIDTH 16 /* FRF_COEFF_1R_1 - [15:0] */ + +/* + * R1723 (0x1391) - FRF_Coefficient_1R_2 + */ +#define WM8285_FRF_COEFF_1R_2_MASK 0xFFFF /* FRF_COEFF_1R_2 - [15:0] */ +#define WM8285_FRF_COEFF_1R_2_SHIFT 0 /* FRF_COEFF_1R_2 - [15:0] */ +#define WM8285_FRF_COEFF_1R_2_WIDTH 16 /* FRF_COEFF_1R_2 - [15:0] */ + +/* + * R1724 (0x1392) - FRF_Coefficient_1R_3 + */ +#define WM8285_FRF_COEFF_1R_3_MASK 0xFFFF /* FRF_COEFF_1R_3 - [15:0] */ +#define WM8285_FRF_COEFF_1R_3_SHIFT 0 /* FRF_COEFF_1R_3 - [15:0] */ +#define WM8285_FRF_COEFF_1R_3_WIDTH 16 /* FRF_COEFF_1R_3 - [15:0] */ + +/* + * R1725 (0x1393) - FRF_Coefficient_1R_4 + */ +#define WM8285_FRF_COEFF_1R_4_MASK 0xFFFF /* FRF_COEFF_1R_4 - [15:0] */ +#define WM8285_FRF_COEFF_1R_4_SHIFT 0 /* FRF_COEFF_1R_4 - [15:0] */ +#define WM8285_FRF_COEFF_1R_4_WIDTH 16 /* FRF_COEFF_1R_4 - [15:0] */ + +/* + * R1726 (0x13A0) - FRF_Coefficient_2L_1 + */ +#define WM8285_FRF_COEFF_2L_1_MASK 0xFFFF /* FRF_COEFF_2L_1 - [15:0] */ +#define WM8285_FRF_COEFF_2L_1_SHIFT 0 /* FRF_COEFF_2L_1 - [15:0] */ +#define WM8285_FRF_COEFF_2L_1_WIDTH 16 /* FRF_COEFF_2L_1 - [15:0] */ + +/* + * R1727 (0x13A1) - FRF_Coefficient_2L_2 + */ +#define WM8285_FRF_COEFF_2L_2_MASK 0xFFFF /* FRF_COEFF_2L_2 - [15:0] */ +#define WM8285_FRF_COEFF_2L_2_SHIFT 0 /* FRF_COEFF_2L_2 - [15:0] */ +#define WM8285_FRF_COEFF_2L_2_WIDTH 16 /* FRF_COEFF_2L_2 - [15:0] */ + +/* + * R1728 (0x13A2) - FRF_Coefficient_2L_3 + */ +#define WM8285_FRF_COEFF_2L_3_MASK 0xFFFF /* FRF_COEFF_2L_3 - [15:0] */ +#define WM8285_FRF_COEFF_2L_3_SHIFT 0 /* FRF_COEFF_2L_3 - [15:0] */ +#define WM8285_FRF_COEFF_2L_3_WIDTH 16 /* FRF_COEFF_2L_3 - [15:0] */ + +/* + * R1729 (0x13A3) - FRF_Coefficient_2L_4 + */ +#define WM8285_FRF_COEFF_2L_4_MASK 0xFFFF /* FRF_COEFF_2L_4 - [15:0] */ +#define WM8285_FRF_COEFF_2L_4_SHIFT 0 /* FRF_COEFF_2L_4 - [15:0] */ +#define WM8285_FRF_COEFF_2L_4_WIDTH 16 /* FRF_COEFF_2L_4 - [15:0] */ + +/* + * R1730 (0x13B0) - FRF_Coefficient_2R_1 + */ +#define WM8285_FRF_COEFF_2R_1_MASK 0xFFFF /* FRF_COEFF_2R_1 - [15:0] */ +#define WM8285_FRF_COEFF_2R_1_SHIFT 0 /* FRF_COEFF_2R_1 - [15:0] */ +#define WM8285_FRF_COEFF_2R_1_WIDTH 16 /* FRF_COEFF_2R_1 - [15:0] */ + +/* + * R1731 (0x13B1) - FRF_Coefficient_2R_2 + */ +#define WM8285_FRF_COEFF_2R_2_MASK 0xFFFF /* FRF_COEFF_2R_2 - [15:0] */ +#define WM8285_FRF_COEFF_2R_2_SHIFT 0 /* FRF_COEFF_2R_2 - [15:0] */ +#define WM8285_FRF_COEFF_2R_2_WIDTH 16 /* FRF_COEFF_2R_2 - [15:0] */ + +/* + * R1732 (0x13B2) - FRF_Coefficient_2R_3 + */ +#define WM8285_FRF_COEFF_2R_3_MASK 0xFFFF /* FRF_COEFF_2R_3 - [15:0] */ +#define WM8285_FRF_COEFF_2R_3_SHIFT 0 /* FRF_COEFF_2R_3 - [15:0] */ +#define WM8285_FRF_COEFF_2R_3_WIDTH 16 /* FRF_COEFF_2R_3 - [15:0] */ + +/* + * R1733 (0x13B3) - FRF_Coefficient_2R_4 + */ +#define WM8285_FRF_COEFF_2R_4_MASK 0xFFFF /* FRF_COEFF_2R_4 - [15:0] */ +#define WM8285_FRF_COEFF_2R_4_SHIFT 0 /* FRF_COEFF_2R_4 - [15:0] */ +#define WM8285_FRF_COEFF_2R_4_WIDTH 16 /* FRF_COEFF_2R_4 - [15:0] */ + +/* + * R1734 (0x13C0) - FRF_Coefficient_3L_1 + */ +#define WM8285_FRF_COEFF_3L_1_MASK 0xFFFF /* FRF_COEFF_3L_1 - [15:0] */ +#define WM8285_FRF_COEFF_3L_1_SHIFT 0 /* FRF_COEFF_3L_1 - [15:0] */ +#define WM8285_FRF_COEFF_3L_1_WIDTH 16 /* FRF_COEFF_3L_1 - [15:0] */ + +/* + * R1735 (0x13C1) - FRF_Coefficient_3L_2 + */ +#define WM8285_FRF_COEFF_3L_2_MASK 0xFFFF /* FRF_COEFF_3L_2 - [15:0] */ +#define WM8285_FRF_COEFF_3L_2_SHIFT 0 /* FRF_COEFF_3L_2 - [15:0] */ +#define WM8285_FRF_COEFF_3L_2_WIDTH 16 /* FRF_COEFF_3L_2 - [15:0] */ + +/* + * R1736 (0x13C2) - FRF_Coefficient_3L_3 + */ +#define WM8285_FRF_COEFF_3L_3_MASK 0xFFFF /* FRF_COEFF_3L_3 - [15:0] */ +#define WM8285_FRF_COEFF_3L_3_SHIFT 0 /* FRF_COEFF_3L_3 - [15:0] */ +#define WM8285_FRF_COEFF_3L_3_WIDTH 16 /* FRF_COEFF_3L_3 - [15:0] */ + +/* + * R1737 (0x13C3) - FRF_Coefficient_3L_4 + */ +#define WM8285_FRF_COEFF_3L_4_MASK 0xFFFF /* FRF_COEFF_3L_4 - [15:0] */ +#define WM8285_FRF_COEFF_3L_4_SHIFT 0 /* FRF_COEFF_3L_4 - [15:0] */ +#define WM8285_FRF_COEFF_3L_4_WIDTH 16 /* FRF_COEFF_3L_4 - [15:0] */ + +/* + * R1738 (0x13D0) - FRF_Coefficient_3R_1 + */ +#define WM8285_FRF_COEFF_3R_1_MASK 0xFFFF /* FRF_COEFF_3R_1 - [15:0] */ +#define WM8285_FRF_COEFF_3R_1_SHIFT 0 /* FRF_COEFF_3R_1 - [15:0] */ +#define WM8285_FRF_COEFF_3R_1_WIDTH 16 /* FRF_COEFF_3R_1 - [15:0] */ + +/* + * R1739 (0x13D1) - FRF_Coefficient_3R_2 + */ +#define WM8285_FRF_COEFF_3R_2_MASK 0xFFFF /* FRF_COEFF_3R_2 - [15:0] */ +#define WM8285_FRF_COEFF_3R_2_SHIFT 0 /* FRF_COEFF_3R_2 - [15:0] */ +#define WM8285_FRF_COEFF_3R_2_WIDTH 16 /* FRF_COEFF_3R_2 - [15:0] */ + +/* + * R1740 (0x13D2) - FRF_Coefficient_3R_3 + */ +#define WM8285_FRF_COEFF_3R_3_MASK 0xFFFF /* FRF_COEFF_3R_3 - [15:0] */ +#define WM8285_FRF_COEFF_3R_3_SHIFT 0 /* FRF_COEFF_3R_3 - [15:0] */ +#define WM8285_FRF_COEFF_3R_3_WIDTH 16 /* FRF_COEFF_3R_3 - [15:0] */ + +/* + * R1741 (0x13D3) - FRF_Coefficient_3R_4 + */ +#define WM8285_FRF_COEFF_3R_4_MASK 0xFFFF /* FRF_COEFF_3R_4 - [15:0] */ +#define WM8285_FRF_COEFF_3R_4_SHIFT 0 /* FRF_COEFF_3R_4 - [15:0] */ +#define WM8285_FRF_COEFF_3R_4_WIDTH 16 /* FRF_COEFF_3R_4 - [15:0] */ + +/* + * R1742 (0x13E0) - FRF_Coefficient_4L_1 + */ +#define WM8285_FRF_COEFF_4L_1_MASK 0xFFFF /* FRF_COEFF_4L_1 - [15:0] */ +#define WM8285_FRF_COEFF_4L_1_SHIFT 0 /* FRF_COEFF_4L_1 - [15:0] */ +#define WM8285_FRF_COEFF_4L_1_WIDTH 16 /* FRF_COEFF_4L_1 - [15:0] */ + +/* + * R1743 (0x13E1) - FRF_Coefficient_4L_2 + */ +#define WM8285_FRF_COEFF_4L_2_MASK 0xFFFF /* FRF_COEFF_4L_2 - [15:0] */ +#define WM8285_FRF_COEFF_4L_2_SHIFT 0 /* FRF_COEFF_4L_2 - [15:0] */ +#define WM8285_FRF_COEFF_4L_2_WIDTH 16 /* FRF_COEFF_4L_2 - [15:0] */ + +/* + * R1744 (0x13E2) - FRF_Coefficient_4L_3 + */ +#define WM8285_FRF_COEFF_4L_3_MASK 0xFFFF /* FRF_COEFF_4L_3 - [15:0] */ +#define WM8285_FRF_COEFF_4L_3_SHIFT 0 /* FRF_COEFF_4L_3 - [15:0] */ +#define WM8285_FRF_COEFF_4L_3_WIDTH 16 /* FRF_COEFF_4L_3 - [15:0] */ + +/* + * R1745 (0x13E3) - FRF_Coefficient_4L_4 + */ +#define WM8285_FRF_COEFF_4L_4_MASK 0xFFFF /* FRF_COEFF_4L_4 - [15:0] */ +#define WM8285_FRF_COEFF_4L_4_SHIFT 0 /* FRF_COEFF_4L_4 - [15:0] */ +#define WM8285_FRF_COEFF_4L_4_WIDTH 16 /* FRF_COEFF_4L_4 - [15:0] */ + +/* + * R1746 (0x13F0) - FRF_Coefficient_4R_1 + */ +#define WM8285_FRF_COEFF_4R_1_MASK 0xFFFF /* FRF_COEFF_4R_1 - [15:0] */ +#define WM8285_FRF_COEFF_4R_1_SHIFT 0 /* FRF_COEFF_4R_1 - [15:0] */ +#define WM8285_FRF_COEFF_4R_1_WIDTH 16 /* FRF_COEFF_4R_1 - [15:0] */ + +/* + * R1747 (0x13F1) - FRF_Coefficient_4R_2 + */ +#define WM8285_FRF_COEFF_4R_2_MASK 0xFFFF /* FRF_COEFF_4R_2 - [15:0] */ +#define WM8285_FRF_COEFF_4R_2_SHIFT 0 /* FRF_COEFF_4R_2 - [15:0] */ +#define WM8285_FRF_COEFF_4R_2_WIDTH 16 /* FRF_COEFF_4R_2 - [15:0] */ + +/* + * R1748 (0x13F2) - FRF_Coefficient_4R_3 + */ +#define WM8285_FRF_COEFF_4R_3_MASK 0xFFFF /* FRF_COEFF_4R_3 - [15:0] */ +#define WM8285_FRF_COEFF_4R_3_SHIFT 0 /* FRF_COEFF_4R_3 - [15:0] */ +#define WM8285_FRF_COEFF_4R_3_WIDTH 16 /* FRF_COEFF_4R_3 - [15:0] */ + +/* + * R1749 (0x13F3) - FRF_Coefficient_4R_4 + */ +#define WM8285_FRF_COEFF_4R_4_MASK 0xFFFF /* FRF_COEFF_4R_4 - [15:0] */ +#define WM8285_FRF_COEFF_4R_4_SHIFT 0 /* FRF_COEFF_4R_4 - [15:0] */ +#define WM8285_FRF_COEFF_4R_4_WIDTH 16 /* FRF_COEFF_4R_4 - [15:0] */ + +/* + * R1750 (0x1400) - FRF_Coefficient_5L_1 + */ +#define WM8285_FRF_COEFF_5L_1_MASK 0xFFFF /* FRF_COEFF_5L_1 - [15:0] */ +#define WM8285_FRF_COEFF_5L_1_SHIFT 0 /* FRF_COEFF_5L_1 - [15:0] */ +#define WM8285_FRF_COEFF_5L_1_WIDTH 16 /* FRF_COEFF_5L_1 - [15:0] */ + +/* + * R1751 (0x1401) - FRF_Coefficient_5L_2 + */ +#define WM8285_FRF_COEFF_5L_2_MASK 0xFFFF /* FRF_COEFF_5L_2 - [15:0] */ +#define WM8285_FRF_COEFF_5L_2_SHIFT 0 /* FRF_COEFF_5L_2 - [15:0] */ +#define WM8285_FRF_COEFF_5L_2_WIDTH 16 /* FRF_COEFF_5L_2 - [15:0] */ + +/* + * R1752 (0x1402) - FRF_Coefficient_5L_3 + */ +#define WM8285_FRF_COEFF_5L_3_MASK 0xFFFF /* FRF_COEFF_5L_3 - [15:0] */ +#define WM8285_FRF_COEFF_5L_3_SHIFT 0 /* FRF_COEFF_5L_3 - [15:0] */ +#define WM8285_FRF_COEFF_5L_3_WIDTH 16 /* FRF_COEFF_5L_3 - [15:0] */ + +/* + * R1753 (0x1403) - FRF_Coefficient_5L_4 + */ +#define WM8285_FRF_COEFF_5L_4_MASK 0xFFFF /* FRF_COEFF_5L_4 - [15:0] */ +#define WM8285_FRF_COEFF_5L_4_SHIFT 0 /* FRF_COEFF_5L_4 - [15:0] */ +#define WM8285_FRF_COEFF_5L_4_WIDTH 16 /* FRF_COEFF_5L_4 - [15:0] */ + +/* + * R1754 (0x1410) - FRF_Coefficient_5R_1 + */ +#define WM8285_FRF_COEFF_5R_1_MASK 0xFFFF /* FRF_COEFF_5R_1 - [15:0] */ +#define WM8285_FRF_COEFF_5R_1_SHIFT 0 /* FRF_COEFF_5R_1 - [15:0] */ +#define WM8285_FRF_COEFF_5R_1_WIDTH 16 /* FRF_COEFF_5R_1 - [15:0] */ + +/* + * R1755 (0x1411) - FRF_Coefficient_5R_2 + */ +#define WM8285_FRF_COEFF_5R_2_MASK 0xFFFF /* FRF_COEFF_5R_2 - [15:0] */ +#define WM8285_FRF_COEFF_5R_2_SHIFT 0 /* FRF_COEFF_5R_2 - [15:0] */ +#define WM8285_FRF_COEFF_5R_2_WIDTH 16 /* FRF_COEFF_5R_2 - [15:0] */ + +/* + * R1756 (0x1412) - FRF_Coefficient_5R_3 + */ +#define WM8285_FRF_COEFF_5R_3_MASK 0xFFFF /* FRF_COEFF_5R_3 - [15:0] */ +#define WM8285_FRF_COEFF_5R_3_SHIFT 0 /* FRF_COEFF_5R_3 - [15:0] */ +#define WM8285_FRF_COEFF_5R_3_WIDTH 16 /* FRF_COEFF_5R_3 - [15:0] */ + +/* + * R1757 (0x1413) - FRF_Coefficient_5R_4 + */ +#define WM8285_FRF_COEFF_5R_4_MASK 0xFFFF /* FRF_COEFF_5R_4 - [15:0] */ +#define WM8285_FRF_COEFF_5R_4_SHIFT 0 /* FRF_COEFF_5R_4 - [15:0] */ +#define WM8285_FRF_COEFF_5R_4_WIDTH 16 /* FRF_COEFF_5R_4 - [15:0] */ + +/* + * R1758 (0x1420) - FRF_Coefficient_6L_1 + */ +#define WM8285_FRF_COEFF_6L_1_MASK 0xFFFF /* FRF_COEFF_6L_1 - [15:0] */ +#define WM8285_FRF_COEFF_6L_1_SHIFT 0 /* FRF_COEFF_6L_1 - [15:0] */ +#define WM8285_FRF_COEFF_6L_1_WIDTH 16 /* FRF_COEFF_6L_1 - [15:0] */ + +/* + * R1759 (0x1421) - FRF_Coefficient_6L_2 + */ +#define WM8285_FRF_COEFF_6L_2_MASK 0xFFFF /* FRF_COEFF_6L_2 - [15:0] */ +#define WM8285_FRF_COEFF_6L_2_SHIFT 0 /* FRF_COEFF_6L_2 - [15:0] */ +#define WM8285_FRF_COEFF_6L_2_WIDTH 16 /* FRF_COEFF_6L_2 - [15:0] */ + +/* + * R1760 (0x1422) - FRF_Coefficient_6L_3 + */ +#define WM8285_FRF_COEFF_6L_3_MASK 0xFFFF /* FRF_COEFF_6L_3 - [15:0] */ +#define WM8285_FRF_COEFF_6L_3_SHIFT 0 /* FRF_COEFF_6L_3 - [15:0] */ +#define WM8285_FRF_COEFF_6L_3_WIDTH 16 /* FRF_COEFF_6L_3 - [15:0] */ + +/* + * R1761 (0x1423) - FRF_Coefficient_6L_4 + */ +#define WM8285_FRF_COEFF_6L_4_MASK 0xFFFF /* FRF_COEFF_6L_4 - [15:0] */ +#define WM8285_FRF_COEFF_6L_4_SHIFT 0 /* FRF_COEFF_6L_4 - [15:0] */ +#define WM8285_FRF_COEFF_6L_4_WIDTH 16 /* FRF_COEFF_6L_4 - [15:0] */ + +/* + * R1762 (0x1430) - FRF_Coefficient_6R_1 + */ +#define WM8285_FRF_COEFF_6R_1_MASK 0xFFFF /* FRF_COEFF_6R_1 - [15:0] */ +#define WM8285_FRF_COEFF_6R_1_SHIFT 0 /* FRF_COEFF_6R_1 - [15:0] */ +#define WM8285_FRF_COEFF_6R_1_WIDTH 16 /* FRF_COEFF_6R_1 - [15:0] */ + +/* + * R1763 (0x1431) - FRF_Coefficient_6R_2 + */ +#define WM8285_FRF_COEFF_6R_2_MASK 0xFFFF /* FRF_COEFF_6R_2 - [15:0] */ +#define WM8285_FRF_COEFF_6R_2_SHIFT 0 /* FRF_COEFF_6R_2 - [15:0] */ +#define WM8285_FRF_COEFF_6R_2_WIDTH 16 /* FRF_COEFF_6R_2 - [15:0] */ + +/* + * R1764 (0x1432) - FRF_Coefficient_6R_3 + */ +#define WM8285_FRF_COEFF_6R_3_MASK 0xFFFF /* FRF_COEFF_6R_3 - [15:0] */ +#define WM8285_FRF_COEFF_6R_3_SHIFT 0 /* FRF_COEFF_6R_3 - [15:0] */ +#define WM8285_FRF_COEFF_6R_3_WIDTH 16 /* FRF_COEFF_6R_3 - [15:0] */ + +/* + * R1765 (0x1433) - FRF_Coefficient_6R_4 + */ +#define WM8285_FRF_COEFF_6R_4_MASK 0xFFFF /* FRF_COEFF_6R_4 - [15:0] */ +#define WM8285_FRF_COEFF_6R_4_SHIFT 0 /* FRF_COEFF_6R_4 - [15:0] */ +#define WM8285_FRF_COEFF_6R_4_WIDTH 16 /* FRF_COEFF_6R_4 - [15:0] */ + /* * R6144 (0x1800) - IRQ1 Status 1 */ From 596506bb4e9cad2efe8e3deecbec448ec2f296b3 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Tue, 4 Nov 2014 13:11:52 +0000 Subject: [PATCH 0512/1167] ASoC: wm8285: Add FRF Coefficients Change-Id: Ie55adc6d2440e006e8c668e469974f529a1fb298 Signed-off-by: Nariman Poushin --- sound/soc/codecs/wm8285.c | 69 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/sound/soc/codecs/wm8285.c b/sound/soc/codecs/wm8285.c index 560ece0df50..2538343250b 100644 --- a/sound/soc/codecs/wm8285.c +++ b/sound/soc/codecs/wm8285.c @@ -38,6 +38,18 @@ #define WM8285_DEFAULT_FRAGMENTS 1 #define WM8285_DEFAULT_FRAGMENT_SIZE 4096 +#define WM8285_FRF_COEFFICIENT_LEN 4 + +static int wm8285_frf_bytes_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); + +#define WM8285_FRF_BYTES(xname, xbase, xregs) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ + .info = snd_soc_bytes_info, .get = snd_soc_bytes_get, \ + .put = wm8285_frf_bytes_put, .private_value = \ + ((unsigned long)&(struct soc_bytes) \ + {.base = xbase, .num_regs = xregs }) } + struct wm8285_compr { struct mutex lock; @@ -179,6 +191,38 @@ static int wm8285_virt_dsp_power_ev(struct snd_soc_dapm_widget *w, return 0; } +static int wm8285_frf_bytes_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_bytes *params = (void *)kcontrol->private_value; + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; + int ret, len; + void *data; + + len = params->num_regs * codec->val_bytes; + + data = kmemdup(ucontrol->value.bytes.data, len, GFP_KERNEL | GFP_DMA); + if (!data) { + ret = -ENOMEM; + goto out; + } + + mutex_lock(&arizona->reg_setting_lock); + regmap_write(arizona->regmap, 0x80, 0x3); + + ret = regmap_raw_write(codec->control_data, params->base, + data, len); + + regmap_write(arizona->regmap, 0x80, 0x0); + mutex_unlock(&arizona->reg_setting_lock); + +out: + kfree(data); + return ret; +} + static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); @@ -319,6 +363,31 @@ SND_SOC_BYTES("RXANCR Config", WM8285_FCR_FILTER_CONTROL, 1), SND_SOC_BYTES("RXANCR Coefficients", WM8285_FCR_COEFF_START, WM8285_FCR_COEFF_END - WM8285_FCR_COEFF_START + 1), +WM8285_FRF_BYTES("FRF COEFF 1L", WM8285_FRF_COEFFICIENT_1L_1, + WM8285_FRF_COEFFICIENT_LEN), +WM8285_FRF_BYTES("FRF COEFF 1R", WM8285_FRF_COEFFICIENT_1R_1, + WM8285_FRF_COEFFICIENT_LEN), +WM8285_FRF_BYTES("FRF COEFF 2L", WM8285_FRF_COEFFICIENT_2L_1, + WM8285_FRF_COEFFICIENT_LEN), +WM8285_FRF_BYTES("FRF COEFF 2R", WM8285_FRF_COEFFICIENT_2R_1, + WM8285_FRF_COEFFICIENT_LEN), +WM8285_FRF_BYTES("FRF COEFF 3L", WM8285_FRF_COEFFICIENT_3L_1, + WM8285_FRF_COEFFICIENT_LEN), +WM8285_FRF_BYTES("FRF COEFF 3R", WM8285_FRF_COEFFICIENT_3R_1, + WM8285_FRF_COEFFICIENT_LEN), +WM8285_FRF_BYTES("FRF COEFF 4L", WM8285_FRF_COEFFICIENT_4L_1, + WM8285_FRF_COEFFICIENT_LEN), +WM8285_FRF_BYTES("FRF COEFF 4R", WM8285_FRF_COEFFICIENT_4R_1, + WM8285_FRF_COEFFICIENT_LEN), +WM8285_FRF_BYTES("FRF COEFF 5L", WM8285_FRF_COEFFICIENT_5L_1, + WM8285_FRF_COEFFICIENT_LEN), +WM8285_FRF_BYTES("FRF COEFF 5R", WM8285_FRF_COEFFICIENT_5R_1, + WM8285_FRF_COEFFICIENT_LEN), +WM8285_FRF_BYTES("FRF COEFF 6L", WM8285_FRF_COEFFICIENT_6L_1, + WM8285_FRF_COEFFICIENT_LEN), +WM8285_FRF_BYTES("FRF COEFF 6R", WM8285_FRF_COEFFICIENT_6R_1, + WM8285_FRF_COEFFICIENT_LEN), + ARIZONA_MIXER_CONTROLS("EQ1", ARIZONA_EQ1MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), From 4b2f195014333c495456f090ec0a34c989f55efc Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Tue, 4 Nov 2014 15:13:47 +0000 Subject: [PATCH 0513/1167] mfd: wm8285: Add HP_TEST_CTRL_{5,6} Change-Id: I22044a579f78e1037838cfd6447d6a91738c73ce Signed-off-by: Nariman Poushin --- drivers/mfd/wm8285-tables.c | 4 ++ include/linux/mfd/arizona/registers.h | 90 +++++++++++++++++++++++++++ 2 files changed, 94 insertions(+) diff --git a/drivers/mfd/wm8285-tables.c b/drivers/mfd/wm8285-tables.c index eb054049d7d..8c8732dd7ee 100644 --- a/drivers/mfd/wm8285-tables.c +++ b/drivers/mfd/wm8285-tables.c @@ -354,6 +354,8 @@ static const struct reg_default wm8285_reg_default[] = { { 0x000004A0, 0x3280 }, /* R1184 - HP1 Short Circuit Ctrl */ { 0x000004A1, 0x3200 }, /* R1185 - HP2 Short Circuit Ctrl */ { 0x000004A2, 0x3200 }, /* R1186 - HP3 Short Circuit Ctrl */ + { 0x000004A8, 0x7020 }, /* R1192 - HP Test Ctrl 5 */ + { 0x000004A9, 0x7020 }, /* R1193 - HP Test Ctrl 6 */ { 0x000004b5, 0x0000 }, { 0x000004b6, 0x8080 }, { 0x000004dc, 0x6000 }, /* R1244 (0x4DC) - DAC comp 1 */ @@ -1727,6 +1729,8 @@ static bool wm8285_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_HP1_SHORT_CIRCUIT_CTRL: case ARIZONA_HP2_SHORT_CIRCUIT_CTRL: case ARIZONA_HP3_SHORT_CIRCUIT_CTRL: + case ARIZONA_HP_TEST_CTRL_5: + case ARIZONA_HP_TEST_CTRL_6: case ARIZONA_SPK_CTRL_3: case ARIZONA_AIF1_BCLK_CTRL: case ARIZONA_AIF1_TX_PIN_CTRL: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index b6258ebca56..e67a82fa1a3 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -290,6 +290,8 @@ #define ARIZONA_HP2_SHORT_CIRCUIT_CTRL 0x4A1 #define ARIZONA_HP3_SHORT_CIRCUIT_CTRL 0x4A2 #define ARIZONA_HP_TEST_CTRL_1 0x4A4 +#define ARIZONA_HP_TEST_CTRL_5 0x4A8 +#define ARIZONA_HP_TEST_CTRL_6 0x4A9 #define ARIZONA_SPK_CTRL_2 0x4B5 #define ARIZONA_SPK_CTRL_3 0x4B6 #define ARIZONA_DAC_COMP_1 0x4DC @@ -5104,6 +5106,94 @@ #define ARIZONA_HP1_TST_CAP_SEL_SHIFT 0 /* HP1_TST_CAP_SEL - [1:0] */ #define ARIZONA_HP1_TST_CAP_SEL_WIDTH 2 /* HP1_TST_CAP_SEL - [1:0] */ +/* + * R539 (0x4A8) - HP_Test_Ctrl_5 + */ +#define ARIZONA_HP1L_TST_CINT 0x4000 /* HP1L_TST_CINT */ +#define ARIZONA_HP1L_TST_CINT_MASK 0x4000 /* HP1L_TST_CINT */ +#define ARIZONA_HP1L_TST_CINT_SHIFT 14 /* HP1L_TST_CINT */ +#define ARIZONA_HP1L_TST_CINT_WIDTH 1 /* HP1L_TST_CINT */ +#define ARIZONA_HP1L_TST_GBW 0x3000 /* HP1L_TST_GBW - [13:12] */ +#define ARIZONA_HP1L_TST_GBW_MASK 0x3000 /* HP1L_TST_GBW - [13:12] */ +#define ARIZONA_HP1L_TST_GBW_SHIFT 12 /* HP1L_TST_GBW - [13:12] */ +#define ARIZONA_HP1L_TST_GBW_WIDTH 2 /* HP1L_TST_GBW - [13:12] */ +#define ARIZONA_HP1L_TST_PGAS 0x0800 /* HP1L_TST_PGAS */ +#define ARIZONA_HP1L_TST_PGAS_MASK 0x0800 /* HP1L_TST_PGAS */ +#define ARIZONA_HP1L_TST_PGAS_SHIFT 11 /* HP1L_TST_PGAS */ +#define ARIZONA_HP1L_TST_PGAS_WIDTH 1 /* HP1L_TST_PGAS */ +#define ARIZONA_HP1L_TST_DUMP 0x0400 /* HP1L_TST_DUMP */ +#define ARIZONA_HP1L_TST_DUMP_MASK 0x0400 /* HP1L_TST_DUMP */ +#define ARIZONA_HP1L_TST_DUMP_SHIFT 10 /* HP1L_TST_DUMP */ +#define ARIZONA_HP1L_TST_DUMP_WIDTH 1 /* HP1L_TST_DUMP */ +#define ARIZONA_HP1L_TST_RST 0x0200 /* HP1L_TST_RST */ +#define ARIZONA_HP1L_TST_RST_MASK 0x0200 /* HP1L_TST_RST */ +#define ARIZONA_HP1L_TST_RST_SHIFT 9 /* HP1L_TST_RST */ +#define ARIZONA_HP1L_TST_RST_WIDTH 1 /* HP1L_TST_RST */ +#define ARIZONA_HP1L_ONEFLT 0x0100 /* HP1L_ONEFLT */ +#define ARIZONA_HP1L_ONEFLT_MASK 0x0100 /* HP1L_ONEFLT */ +#define ARIZONA_HP1L_ONEFLT_SHIFT 8 /* HP1L_ONEFLT */ +#define ARIZONA_HP1L_ONEFLT_WIDTH 1 /* HP1L_ONEFLT */ +#define ARIZONA_HP1L_TST_THDOFF 0x00C0 /* HP1L_TST_THDOFF - [7:6] */ +#define ARIZONA_HP1L_TST_THDOFF_MASK 0x00C0 /* HP1L_TST_THDOFF - [7:6] */ +#define ARIZONA_HP1L_TST_THDOFF_SHIFT 6 /* HP1L_TST_THDOFF - [7:6] */ +#define ARIZONA_HP1L_TST_THDOFF_WIDTH 2 /* HP1L_TST_THDOFF - [7:6] */ +#define ARIZONA_HP1L_CTRL_IOUT 0x0030 /* HP1L_CTRL_IOUT - [5:4] */ +#define ARIZONA_HP1L_CTRL_IOUT_MASK 0x0030 /* HP1L_CTRL_IOUT - [5:4] */ +#define ARIZONA_HP1L_CTRL_IOUT_SHIFT 4 /* HP1L_CTRL_IOUT - [5:4] */ +#define ARIZONA_HP1L_CTRL_IOUT_WIDTH 2 /* HP1L_CTRL_IOUT - [5:4] */ +#define ARIZONA_HP1L_TST_ILG 0x0008 /* HP1L_TST_ILG */ +#define ARIZONA_HP1L_TST_ILG_MASK 0x0008 /* HP1L_TST_ILG */ +#define ARIZONA_HP1L_TST_ILG_SHIFT 3 /* HP1L_TST_ILG */ +#define ARIZONA_HP1L_TST_ILG_WIDTH 1 /* HP1L_TST_ILG */ +#define ARIZONA_HP1L_TST_IBIAS 0x0003 /* HP1L_TST_IBIAS - [1:0] */ +#define ARIZONA_HP1L_TST_IBIAS_MASK 0x0003 /* HP1L_TST_IBIAS - [1:0] */ +#define ARIZONA_HP1L_TST_IBIAS_SHIFT 0 /* HP1L_TST_IBIAS - [1:0] */ +#define ARIZONA_HP1L_TST_IBIAS_WIDTH 2 /* HP1L_TST_IBIAS - [1:0] */ + +/* + * R540 (0x4A9) - HP_Test_Ctrl_6 + */ +#define ARIZONA_HP1R_TST_CINT 0x4000 /* HP1R_TST_CINT */ +#define ARIZONA_HP1R_TST_CINT_MASK 0x4000 /* HP1R_TST_CINT */ +#define ARIZONA_HP1R_TST_CINT_SHIFT 14 /* HP1R_TST_CINT */ +#define ARIZONA_HP1R_TST_CINT_WIDTH 1 /* HP1R_TST_CINT */ +#define ARIZONA_HP1R_TST_GBW 0x3000 /* HP1R_TST_GBW - [13:12] */ +#define ARIZONA_HP1R_TST_GBW_MASK 0x3000 /* HP1R_TST_GBW - [13:12] */ +#define ARIZONA_HP1R_TST_GBW_SHIFT 12 /* HP1R_TST_GBW - [13:12] */ +#define ARIZONA_HP1R_TST_GBW_WIDTH 2 /* HP1R_TST_GBW - [13:12] */ +#define ARIZONA_HP1R_TST_PGAS 0x0800 /* HP1R_TST_PGAS */ +#define ARIZONA_HP1R_TST_PGAS_MASK 0x0800 /* HP1R_TST_PGAS */ +#define ARIZONA_HP1R_TST_PGAS_SHIFT 11 /* HP1R_TST_PGAS */ +#define ARIZONA_HP1R_TST_PGAS_WIDTH 1 /* HP1R_TST_PGAS */ +#define ARIZONA_HP1R_TST_DUMP 0x0400 /* HP1R_TST_DUMP */ +#define ARIZONA_HP1R_TST_DUMP_MASK 0x0400 /* HP1R_TST_DUMP */ +#define ARIZONA_HP1R_TST_DUMP_SHIFT 10 /* HP1R_TST_DUMP */ +#define ARIZONA_HP1R_TST_DUMP_WIDTH 1 /* HP1R_TST_DUMP */ +#define ARIZONA_HP1R_TST_RST 0x0200 /* HP1R_TST_RST */ +#define ARIZONA_HP1R_TST_RST_MASK 0x0200 /* HP1R_TST_RST */ +#define ARIZONA_HP1R_TST_RST_SHIFT 9 /* HP1R_TST_RST */ +#define ARIZONA_HP1R_TST_RST_WIDTH 1 /* HP1R_TST_RST */ +#define ARIZONA_HP1R_ONEFLT 0x0100 /* HP1R_ONEFLT */ +#define ARIZONA_HP1R_ONEFLT_MASK 0x0100 /* HP1R_ONEFLT */ +#define ARIZONA_HP1R_ONEFLT_SHIFT 8 /* HP1R_ONEFLT */ +#define ARIZONA_HP1R_ONEFLT_WIDTH 1 /* HP1R_ONEFLT */ +#define ARIZONA_HP1R_TST_THDOFF 0x00C0 /* HP1R_TST_THDOFF - [7:6] */ +#define ARIZONA_HP1R_TST_THDOFF_MASK 0x00C0 /* HP1R_TST_THDOFF - [7:6] */ +#define ARIZONA_HP1R_TST_THDOFF_SHIFT 6 /* HP1R_TST_THDOFF - [7:6] */ +#define ARIZONA_HP1R_TST_THDOFF_WIDTH 2 /* HP1R_TST_THDOFF - [7:6] */ +#define ARIZONA_HP1R_CTRL_IOUT 0x0030 /* HP1R_CTRL_IOUT - [5:4] */ +#define ARIZONA_HP1R_CTRL_IOUT_MASK 0x0030 /* HP1R_CTRL_IOUT - [5:4] */ +#define ARIZONA_HP1R_CTRL_IOUT_SHIFT 4 /* HP1R_CTRL_IOUT - [5:4] */ +#define ARIZONA_HP1R_CTRL_IOUT_WIDTH 2 /* HP1R_CTRL_IOUT - [5:4] */ +#define ARIZONA_HP1R_TST_ILG 0x0008 /* HP1R_TST_ILG */ +#define ARIZONA_HP1R_TST_ILG_MASK 0x0008 /* HP1R_TST_ILG */ +#define ARIZONA_HP1R_TST_ILG_SHIFT 3 /* HP1R_TST_ILG */ +#define ARIZONA_HP1R_TST_ILG_WIDTH 1 /* HP1R_TST_ILG */ +#define ARIZONA_HP1R_TST_IBIAS 0x0003 /* HP1R_TST_IBIAS - [1:0] */ +#define ARIZONA_HP1R_TST_IBIAS_MASK 0x0003 /* HP1R_TST_IBIAS - [1:0] */ +#define ARIZONA_HP1R_TST_IBIAS_SHIFT 0 /* HP1R_TST_IBIAS - [1:0] */ +#define ARIZONA_HP1R_TST_IBIAS_WIDTH 2 /* HP1R_TST_IBIAS - [1:0] */ + /* * R1244 (0x4DC) - DAC comp 1 */ From 80bbdc7af4dcace09c5268934e778250afda4241 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Tue, 4 Nov 2014 15:30:36 +0000 Subject: [PATCH 0514/1167] ASoC: wm8285: Add HP1{L,R} ONEFLT Switch widgets Change-Id: Ic944a67e9d7298172b883b72b61c771706c3b0fa Signed-off-by: Nariman Poushin --- sound/soc/codecs/wm8285.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/sound/soc/codecs/wm8285.c b/sound/soc/codecs/wm8285.c index 2538343250b..a512710585d 100644 --- a/sound/soc/codecs/wm8285.c +++ b/sound/soc/codecs/wm8285.c @@ -520,6 +520,11 @@ SOC_SINGLE("HPOUT2 SC Protect Switch", ARIZONA_HP2_SHORT_CIRCUIT_CTRL, SOC_SINGLE("HPOUT3 SC Protect Switch", ARIZONA_HP3_SHORT_CIRCUIT_CTRL, ARIZONA_HP3_SC_ENA_SHIFT, 1, 0), +SOC_SINGLE("HPOUT1L ONEFLT Switch", ARIZONA_HP_TEST_CTRL_5, + ARIZONA_HP1L_ONEFLT_SHIFT, 1, 0), +SOC_SINGLE("HPOUT1R ONEFLT Switch", ARIZONA_HP_TEST_CTRL_6, + ARIZONA_HP1R_ONEFLT_SHIFT, 1, 0), + SOC_SINGLE("SPKDAT1 High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_5L, ARIZONA_OUT5_OSR_SHIFT, 1, 0), SOC_SINGLE("SPKDAT2 High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_6L, From 4677a998cd1f41992c932b380d5352bf6f346221 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Tue, 4 Nov 2014 15:46:51 +0000 Subject: [PATCH 0515/1167] mfd: wm8285: Add DAC_COMP_{1,2} Change-Id: I72db9188fa770bba21f51cb8d5c59238ee4bf0b6 Signed-off-by: Nariman Poushin --- drivers/mfd/wm8285-tables.c | 5 ++++- include/linux/mfd/arizona/registers.h | 2 ++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/wm8285-tables.c b/drivers/mfd/wm8285-tables.c index 8c8732dd7ee..58f8cd84d9a 100644 --- a/drivers/mfd/wm8285-tables.c +++ b/drivers/mfd/wm8285-tables.c @@ -1368,7 +1368,8 @@ static const struct reg_default wm8285_reg_default[] = { { 0x00001212, 0x0000 }, { 0x00001214, 0x0000 }, { 0x00001216, 0x0000 }, - { 0x00001300, 0x0000 }, + { 0x00001300, 0x0000 }, /* R4864 - DAC Comp 1 */ + { 0x00001302, 0x0000 }, /* R4866 - DAC Comp 2 */ { 0x00001340, 0x0000 }, { 0x00001341, 0x0000 }, { 0x00001342, 0x0000 }, @@ -2581,6 +2582,8 @@ static bool wm8285_16bit_readable_register(struct device *dev, unsigned int reg) case WM8285_FCR_FILTER_CONTROL: case WM8285_FCR_ADC_REFORMATTER_CONTROL: case WM8285_FCR_COEFF_START ... WM8285_FCR_COEFF_END: + case WM8285_DAC_COMP_1: + case WM8285_DAC_COMP_2: case WM8285_FRF_COEFFICIENT_1L_1: case WM8285_FRF_COEFFICIENT_1L_2: case WM8285_FRF_COEFFICIENT_1L_3: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index e67a82fa1a3..a90cf73d7f7 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -1320,7 +1320,9 @@ #define ARIZONA_DSP2_SCRATCH_2 0x1242 #define ARIZONA_DSP2_SCRATCH_3 0x1243 #define ARIZONA_DSP3_CONTROL_1 0x1300 +#define WM8285_DAC_COMP_1 0x1300 #define ARIZONA_DSP3_CLOCKING_1 0x1301 +#define WM8285_DAC_COMP_2 0x1302 #define ARIZONA_DSP3_STATUS_1 0x1304 #define ARIZONA_DSP3_STATUS_2 0x1305 #define ARIZONA_DSP3_STATUS_3 0x1306 From 76595d9aee5ed3fc22cd543a2ae0f40dad9717a5 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Tue, 4 Nov 2014 15:51:15 +0000 Subject: [PATCH 0516/1167] ASoC: wm8285: Add DAC_COMP_{1,2} widgets Change-Id: I164ad7d43379b4171878e8c920113605dde55886 Signed-off-by: Nariman Poushin --- sound/soc/codecs/wm8285.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/soc/codecs/wm8285.c b/sound/soc/codecs/wm8285.c index a512710585d..75d13b578ce 100644 --- a/sound/soc/codecs/wm8285.c +++ b/sound/soc/codecs/wm8285.c @@ -388,6 +388,9 @@ WM8285_FRF_BYTES("FRF COEFF 6L", WM8285_FRF_COEFFICIENT_6L_1, WM8285_FRF_BYTES("FRF COEFF 6R", WM8285_FRF_COEFFICIENT_6R_1, WM8285_FRF_COEFFICIENT_LEN), +SND_SOC_BYTES("DAC COMP 1", WM8285_DAC_COMP_1, 1), +SND_SOC_BYTES("DAC COMP 2", WM8285_DAC_COMP_2, 1), + ARIZONA_MIXER_CONTROLS("EQ1", ARIZONA_EQ1MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), From a7897c45238805a5b139006d02010540680ac0d8 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Fri, 14 Nov 2014 15:47:09 +0000 Subject: [PATCH 0517/1167] mfd: wm8285: Set EDRE_HP_Stereo control in Rev A patch Change-Id: I5b2690bf479ff415dfeb8bfdd2f15a1284d2b4bf Signed-off-by: Nariman Poushin --- drivers/mfd/wm8285-tables.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/wm8285-tables.c b/drivers/mfd/wm8285-tables.c index 58f8cd84d9a..0374ea6817e 100644 --- a/drivers/mfd/wm8285-tables.c +++ b/drivers/mfd/wm8285-tables.c @@ -41,6 +41,7 @@ static const struct reg_default wm8285_reva_patch[] = { { 0x293, 0x0080 }, { 0x17D, 0x0303 }, { 0x19D, 0x0303 }, + { 0x27E, 0x0001 }, { 0x80, 0x0000 }, { 0x80, 0x0000 }, }; From 0b15468689f3727177506e4c9ba448a8f47ef355 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Fri, 31 Oct 2014 16:21:25 +0000 Subject: [PATCH 0518/1167] ASoC: wm8285: Add support for ASRC2 Change-Id: Id5257fb3dc185710e8687cf39f0af1df06fb8969 Signed-off-by: Nariman Poushin Signed-off-by: bsapthagiri --- drivers/mfd/wm8285-tables.c | 35 ++- include/linux/mfd/arizona/registers.h | 84 +++++++ sound/soc/codecs/arizona.c | 300 ++++++++++++++++++++++- sound/soc/codecs/arizona.h | 27 +++ sound/soc/codecs/wm8285.c | 337 ++++++++++++++------------ 5 files changed, 616 insertions(+), 167 deletions(-) diff --git a/drivers/mfd/wm8285-tables.c b/drivers/mfd/wm8285-tables.c index 0374ea6817e..5831ea80865 100644 --- a/drivers/mfd/wm8285-tables.c +++ b/drivers/mfd/wm8285-tables.c @@ -1166,9 +1166,12 @@ static const struct reg_default wm8285_reg_default[] = { { 0x00000ec9, 0x0000 }, /* R3785 (0xEC9) - HPLPF3_2 */ { 0x00000ecc, 0x0000 }, /* R3788 (0xECC) - HPLPF4_1 */ { 0x00000ecd, 0x0000 }, /* R3789 (0xECD) - HPLPF4_2 */ - { 0x00000ee0, 0x0000 }, /* R3808 (0xEE0) - ASRC_ENABLE */ - { 0x00000ee2, 0x0000 }, /* R3810 (0xEE2) - ASRC_RATE1 */ - { 0x00000ee3, 0x4000 }, /* R3811 (0xEE3) - ASRC_RATE2 */ + { 0x00000ed0, 0x0000 }, /* R3792 (0xED0) - ASRC2_ENABLE */ + { 0x00000ed2, 0x0000 }, /* R3794 (0xED2) - ASRC2_RATE1 */ + { 0x00000ed3, 0x4000 }, /* R3795 (0xED3) - ASRC2_RATE2 */ + { 0x00000ee0, 0x0000 }, /* R3808 (0xEE0) - ASRC1_ENABLE */ + { 0x00000ee2, 0x0000 }, /* R3810 (0xEE2) - ASRC1_RATE1 */ + { 0x00000ee3, 0x4000 }, /* R3811 (0xEE3) - ASRC1_RATE2 */ { 0x00000ef0, 0x0000 }, /* R3824 (0xEF0) - ISRC 1 CTRL 1 */ { 0x00000ef1, 0x0001 }, /* R3825 (0xEF1) - ISRC 1 CTRL 2 */ { 0x00000ef2, 0x0000 }, /* R3826 (0xEF2) - ISRC 1 CTRL 3 */ @@ -1527,6 +1530,8 @@ static bool wm8285_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_ASYNC_CLOCK_1: case ARIZONA_ASYNC_SAMPLE_RATE_1: case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: + case ARIZONA_ASYNC_SAMPLE_RATE_2: + case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: case WM8285_DSP_CLOCK_1: case WM8285_DSP_CLOCK_2: case ARIZONA_OUTPUT_SYSTEM_CLOCK: @@ -2377,10 +2382,14 @@ static bool wm8285_16bit_readable_register(struct device *dev, unsigned int reg) case WM8285_DSP5AUX4MIX_INPUT_1_SOURCE: case WM8285_DSP5AUX5MIX_INPUT_1_SOURCE: case WM8285_DSP5AUX6MIX_INPUT_1_SOURCE: - case ARIZONA_ASRC1LMIX_INPUT_1_SOURCE: - case ARIZONA_ASRC1RMIX_INPUT_1_SOURCE: - case ARIZONA_ASRC2LMIX_INPUT_1_SOURCE: - case ARIZONA_ASRC2RMIX_INPUT_1_SOURCE: + case WM8285_ASRC1_1LMIX_INPUT_1_SOURCE: + case WM8285_ASRC1_1RMIX_INPUT_1_SOURCE: + case WM8285_ASRC1_2LMIX_INPUT_1_SOURCE: + case WM8285_ASRC1_2RMIX_INPUT_1_SOURCE: + case WM8285_ASRC2_1LMIX_INPUT_1_SOURCE: + case WM8285_ASRC2_1RMIX_INPUT_1_SOURCE: + case WM8285_ASRC2_2LMIX_INPUT_1_SOURCE: + case WM8285_ASRC2_2RMIX_INPUT_1_SOURCE: case ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE: case ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE: case ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE: @@ -2558,9 +2567,12 @@ static bool wm8285_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_HPLPF3_2: case ARIZONA_HPLPF4_1: case ARIZONA_HPLPF4_2: - case ARIZONA_ASRC_ENABLE: - case ARIZONA_ASRC_STATUS: - case ARIZONA_ASRC_RATE1: + case WM8285_ASRC1_ENABLE: + case WM8285_ASRC1_STATUS: + case WM8285_ASRC1_RATE1: + case WM8285_ASRC2_ENABLE: + case WM8285_ASRC2_STATUS: + case WM8285_ASRC2_RATE1: case ARIZONA_ISRC_1_CTRL_1: case ARIZONA_ISRC_1_CTRL_2: case ARIZONA_ISRC_1_CTRL_3: @@ -2816,7 +2828,8 @@ static bool wm8285_16bit_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_SLIMBUS_RX_PORT_STATUS: case ARIZONA_SLIMBUS_TX_PORT_STATUS: case ARIZONA_FX_CTRL2: - case ARIZONA_ASRC_STATUS: + case WM8285_ASRC2_STATUS: + case WM8285_ASRC1_STATUS: case WM8285_IRQ1_STATUS_1: case WM8285_IRQ1_STATUS_2: case WM8285_IRQ1_STATUS_6: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index a90cf73d7f7..fe1415b1be6 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -969,6 +969,14 @@ #define ARIZONA_ASRC1RMIX_INPUT_1_SOURCE 0xA88 #define ARIZONA_ASRC2LMIX_INPUT_1_SOURCE 0xA90 #define ARIZONA_ASRC2RMIX_INPUT_1_SOURCE 0xA98 +#define WM8285_ASRC1_1LMIX_INPUT_1_SOURCE 0xA80 +#define WM8285_ASRC1_1RMIX_INPUT_1_SOURCE 0xA88 +#define WM8285_ASRC1_2LMIX_INPUT_1_SOURCE 0xA90 +#define WM8285_ASRC1_2RMIX_INPUT_1_SOURCE 0xA98 +#define WM8285_ASRC2_1LMIX_INPUT_1_SOURCE 0xAA0 +#define WM8285_ASRC2_1RMIX_INPUT_1_SOURCE 0xAA8 +#define WM8285_ASRC2_2LMIX_INPUT_1_SOURCE 0xAB0 +#define WM8285_ASRC2_2RMIX_INPUT_1_SOURCE 0xAB8 #define ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE 0xB00 #define ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE 0xB08 #define ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE 0xB10 @@ -1226,6 +1234,14 @@ #define ARIZONA_HPLPF3_2 0xEC9 #define ARIZONA_HPLPF4_1 0xECC #define ARIZONA_HPLPF4_2 0xECD +#define WM8285_ASRC2_ENABLE 0xED0 +#define WM8285_ASRC2_STATUS 0xED1 +#define WM8285_ASRC2_RATE1 0xED2 +#define WM8285_ASRC2_RATE2 0xED3 +#define WM8285_ASRC1_ENABLE 0xEE0 +#define WM8285_ASRC1_STATUS 0xEE1 +#define WM8285_ASRC1_RATE1 0xEE2 +#define WM8285_ASRC1_RATE2 0xEE3 #define ARIZONA_ASRC_ENABLE 0xEE0 #define ARIZONA_ASRC_STATUS 0xEE1 #define ARIZONA_ASRC_RATE1 0xEE2 @@ -9546,6 +9562,74 @@ #define ARIZONA_LHPF4_COEFF_SHIFT 0 /* LHPF4_COEFF - [15:0] */ #define ARIZONA_LHPF4_COEFF_WIDTH 16 /* LHPF4_COEFF - [15:0] */ +/* + * R3808 (0xED0) - ASRC2_ENABLE + */ +#define WM8285_ASRC2_IN2L_ENA 0x0008 /* ASRC2L_ENA */ +#define WM8285_ASRC2_IN2L_ENA_MASK 0x0008 /* ASRC2L_ENA */ +#define WM8285_ASRC2_IN2L_ENA_SHIFT 3 /* ASRC2L_ENA */ +#define WM8285_ASRC2_IN2L_ENA_WIDTH 1 /* ASRC2L_ENA */ +#define WM8285_ASRC2_IN2R_ENA 0x0004 /* ASRC2R_ENA */ +#define WM8285_ASRC2_IN2R_ENA_MASK 0x0004 /* ASRC2R_ENA */ +#define WM8285_ASRC2_IN2R_ENA_SHIFT 2 /* ASRC2R_ENA */ +#define WM8285_ASRC2_IN2R_ENA_WIDTH 1 /* ASRC2R_ENA */ +#define WM8285_ASRC2_IN1L_ENA 0x0002 /* ASRC1L_ENA */ +#define WM8285_ASRC2_IN1L_ENA_MASK 0x0002 /* ASRC1L_ENA */ +#define WM8285_ASRC2_IN1L_ENA_SHIFT 1 /* ASRC1L_ENA */ +#define WM8285_ASRC2_IN1L_ENA_WIDTH 1 /* ASRC1L_ENA */ +#define WM8285_ASRC2_IN1R_ENA 0x0001 /* ASRC1R_ENA */ +#define WM8285_ASRC2_IN1R_ENA_MASK 0x0001 /* ASRC1R_ENA */ +#define WM8285_ASRC2_IN1R_ENA_SHIFT 0 /* ASRC1R_ENA */ +#define WM8285_ASRC2_IN1R_ENA_WIDTH 1 /* ASRC1R_ENA */ + +/* + * R3810 (0xED2) - ASRC2_RATE1 + */ +#define WM8285_ASRC2_RATE1_MASK 0x7800 /* ASRC_RATE1 - [14:11] */ +#define WM8285_ASRC2_RATE1_SHIFT 11 /* ASRC_RATE1 - [14:11] */ +#define WM8285_ASRC2_RATE1_WIDTH 4 /* ASRC_RATE1 - [14:11] */ + +/* + * R3811 (0xED3) - ASRC2_RATE2 + */ +#define WM8285_ASRC2_RATE2_MASK 0x7800 /* ASRC_RATE2 - [14:11] */ +#define WM8285_ASRC2_RATE2_SHIFT 11 /* ASRC_RATE2 - [14:11] */ +#define WM8285_ASRC2_RATE2_WIDTH 4 /* ASRC_RATE2 - [14:11] */ + +/* + * R3808 (0xEE0) - ASRC1_ENABLE + */ +#define WM8285_ASRC1_IN2L_ENA 0x0008 /* ASRC2L_ENA */ +#define WM8285_ASRC1_IN2L_ENA_MASK 0x0008 /* ASRC2L_ENA */ +#define WM8285_ASRC1_IN2L_ENA_SHIFT 3 /* ASRC2L_ENA */ +#define WM8285_ASRC1_IN2L_ENA_WIDTH 1 /* ASRC2L_ENA */ +#define WM8285_ASRC1_IN2R_ENA 0x0004 /* ASRC2R_ENA */ +#define WM8285_ASRC1_IN2R_ENA_MASK 0x0004 /* ASRC2R_ENA */ +#define WM8285_ASRC1_IN2R_ENA_SHIFT 2 /* ASRC2R_ENA */ +#define WM8285_ASRC1_IN2R_ENA_WIDTH 1 /* ASRC2R_ENA */ +#define WM8285_ASRC1_IN1L_ENA 0x0002 /* ASRC1L_ENA */ +#define WM8285_ASRC1_IN1L_ENA_MASK 0x0002 /* ASRC1L_ENA */ +#define WM8285_ASRC1_IN1L_ENA_SHIFT 1 /* ASRC1L_ENA */ +#define WM8285_ASRC1_IN1L_ENA_WIDTH 1 /* ASRC1L_ENA */ +#define WM8285_ASRC1_IN1R_ENA 0x0001 /* ASRC1R_ENA */ +#define WM8285_ASRC1_IN1R_ENA_MASK 0x0001 /* ASRC1R_ENA */ +#define WM8285_ASRC1_IN1R_ENA_SHIFT 0 /* ASRC1R_ENA */ +#define WM8285_ASRC1_IN1R_ENA_WIDTH 1 /* ASRC1R_ENA */ + +/* + * R3810 (0xEE2) - ASRC1_RATE1 + */ +#define WM8285_ASRC1_RATE1_MASK 0x7800 /* ASRC_RATE1 - [14:11] */ +#define WM8285_ASRC1_RATE1_SHIFT 11 /* ASRC_RATE1 - [14:11] */ +#define WM8285_ASRC1_RATE1_WIDTH 4 /* ASRC_RATE1 - [14:11] */ + +/* + * R3811 (0xEE3) - ASRC1_RATE2 + */ +#define WM8285_ASRC1_RATE2_MASK 0x7800 /* ASRC_RATE2 - [14:11] */ +#define WM8285_ASRC1_RATE2_SHIFT 11 /* ASRC_RATE2 - [14:11] */ +#define WM8285_ASRC1_RATE2_WIDTH 4 /* ASRC_RATE2 - [14:11] */ + /* * R3808 (0xEE0) - ASRC_ENABLE */ diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 0da3abd0d47..a61bfe7c856 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -628,6 +628,290 @@ int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = { }; EXPORT_SYMBOL_GPL(arizona_mixer_values); +const char *arizona_v2_mixer_texts[ARIZONA_V2_NUM_MIXER_INPUTS] = { + "None", + "Tone Generator 1", + "Tone Generator 2", + "Haptics", + "AEC", + "AEC2", + "Mic Mute Mixer", + "Noise Generator", + "IN1L", + "IN1R", + "IN2L", + "IN2R", + "IN3L", + "IN3R", + "IN4L", + "IN4R", + "IN5L", + "IN5R", + "IN6L", + "IN6R", + "AIF1RX1", + "AIF1RX2", + "AIF1RX3", + "AIF1RX4", + "AIF1RX5", + "AIF1RX6", + "AIF1RX7", + "AIF1RX8", + "AIF2RX1", + "AIF2RX2", + "AIF2RX3", + "AIF2RX4", + "AIF2RX5", + "AIF2RX6", + "AIF2RX7", + "AIF2RX8", + "AIF3RX1", + "AIF3RX2", + "AIF4RX1", + "AIF4RX2", + "SLIMRX1", + "SLIMRX2", + "SLIMRX3", + "SLIMRX4", + "SLIMRX5", + "SLIMRX6", + "SLIMRX7", + "SLIMRX8", + "EQ1", + "EQ2", + "EQ3", + "EQ4", + "DRC1L", + "DRC1R", + "DRC2L", + "DRC2R", + "LHPF1", + "LHPF2", + "LHPF3", + "LHPF4", + "DSP1.1", + "DSP1.2", + "DSP1.3", + "DSP1.4", + "DSP1.5", + "DSP1.6", + "DSP2.1", + "DSP2.2", + "DSP2.3", + "DSP2.4", + "DSP2.5", + "DSP2.6", + "DSP3.1", + "DSP3.2", + "DSP3.3", + "DSP3.4", + "DSP3.5", + "DSP3.6", + "DSP4.1", + "DSP4.2", + "DSP4.3", + "DSP4.4", + "DSP4.5", + "DSP4.6", + "DSP5.1", + "DSP5.2", + "DSP5.3", + "DSP5.4", + "DSP5.5", + "DSP5.6", + "DSP6.1", + "DSP6.2", + "DSP6.3", + "DSP6.4", + "DSP6.5", + "DSP6.6", + "DSP7.1", + "DSP7.2", + "DSP7.3", + "DSP7.4", + "DSP7.5", + "DSP7.6", + "ASRC1IN1L", + "ASRC1IN1R", + "ASRC1IN2L", + "ASRC1IN2R", + "ASRC2IN1L", + "ASRC2IN1R", + "ASRC2IN2L", + "ASRC2IN2R", + "ISRC1INT1", + "ISRC1INT2", + "ISRC1INT3", + "ISRC1INT4", + "ISRC1DEC1", + "ISRC1DEC2", + "ISRC1DEC3", + "ISRC1DEC4", + "ISRC2INT1", + "ISRC2INT2", + "ISRC2INT3", + "ISRC2INT4", + "ISRC2DEC1", + "ISRC2DEC2", + "ISRC2DEC3", + "ISRC2DEC4", + "ISRC3INT1", + "ISRC3INT2", + "ISRC3INT3", + "ISRC3INT4", + "ISRC3DEC1", + "ISRC3DEC2", + "ISRC3DEC3", + "ISRC3DEC4", + "ISRC4INT1", + "ISRC4INT2", + "ISRC4DEC1", + "ISRC4DEC2", +}; +EXPORT_SYMBOL_GPL(arizona_v2_mixer_texts); + +int arizona_v2_mixer_values[ARIZONA_V2_NUM_MIXER_INPUTS] = { + 0x00, /* None */ + 0x04, /* Tone */ + 0x05, + 0x06, /* Haptics */ + 0x08, /* AEC */ + 0x09, /* AEC2 */ + 0x0c, /* Noise mixer */ + 0x0d, /* Comfort noise */ + 0x10, /* IN1L */ + 0x11, + 0x12, + 0x13, + 0x14, + 0x15, + 0x16, + 0x17, + 0x18, + 0x19, + 0x1A, + 0x1B, + 0x20, /* AIF1RX1 */ + 0x21, + 0x22, + 0x23, + 0x24, + 0x25, + 0x26, + 0x27, + 0x28, /* AIF2RX1 */ + 0x29, + 0x2a, + 0x2b, + 0x2c, + 0x2d, + 0x2e, + 0x2f, + 0x30, /* AIF3RX1 */ + 0x31, + 0x34, /* AIF4RX1 */ + 0x35, + 0x38, /* SLIMRX1 */ + 0x39, + 0x3a, + 0x3b, + 0x3c, + 0x3d, + 0x3e, + 0x3f, + 0x50, /* EQ1 */ + 0x51, + 0x52, + 0x53, + 0x58, /* DRC1L */ + 0x59, + 0x5a, + 0x5b, + 0x60, /* LHPF1 */ + 0x61, + 0x62, + 0x63, + 0x68, /* DSP1.1 */ + 0x69, + 0x6a, + 0x6b, + 0x6c, + 0x6d, + 0x70, /* DSP2.1 */ + 0x71, + 0x72, + 0x73, + 0x74, + 0x75, + 0x78, /* DSP3.1 */ + 0x79, + 0x7a, + 0x7b, + 0x7c, + 0x7d, + 0x80, /* DSP4.1 */ + 0x81, + 0x82, + 0x83, + 0x84, + 0x85, + 0x88, /* DSP5.1 */ + 0x89, + 0x8a, + 0x8b, + 0x8c, + 0x8d, + 0xc0, /* DSP6.1 */ + 0xc1, + 0xc2, + 0xc3, + 0xc4, + 0xc5, + 0xc8, /* DSP7.1 */ + 0xc9, + 0xca, + 0xcb, + 0xcc, + 0xcd, + 0x90, /* ASRC1IN1L */ + 0x91, + 0x92, + 0x93, + 0x94, /* ASRC2IN1L */ + 0x95, + 0x96, + 0x97, + 0xa0, /* ISRC1INT1 */ + 0xa1, + 0xa2, + 0xa3, + 0xa4, /* ISRC1DEC1 */ + 0xa5, + 0xa6, + 0xa7, + 0xa8, /* ISRC2DEC1 */ + 0xa9, + 0xaa, + 0xab, + 0xac, /* ISRC2INT1 */ + 0xad, + 0xae, + 0xaf, + 0xb0, /* ISRC3DEC1 */ + 0xb1, + 0xb2, + 0xb3, + 0xb4, /* ISRC3INT1 */ + 0xb5, + 0xb6, + 0xb7, + 0xb8, /* ISRC4INT1 */ + 0xb9, + 0xbc, /* ISRC4DEC1 */ + 0xbd, +}; +EXPORT_SYMBOL_GPL(arizona_v2_mixer_values); + const DECLARE_TLV_DB_SCALE(arizona_mixer_tlv, -3200, 100, 0); EXPORT_SYMBOL_GPL(arizona_mixer_tlv); @@ -747,10 +1031,24 @@ EXPORT_SYMBOL_GPL(arizona_isrc_fsl); const struct soc_enum arizona_asrc_rate1 = SOC_VALUE_ENUM_SINGLE(ARIZONA_ASRC_RATE1, ARIZONA_ASRC_RATE1_SHIFT, 0xf, - ARIZONA_RATE_ENUM_SIZE - 1, + ARIZONA_SYNC_RATE_ENUM_SIZE, arizona_rate_text, arizona_rate_val); EXPORT_SYMBOL_GPL(arizona_asrc_rate1); +const struct soc_enum wm8285_asrc1_rate1 = + SOC_VALUE_ENUM_SINGLE(WM8285_ASRC1_RATE1, + WM8285_ASRC1_RATE1_SHIFT, 0xf, + ARIZONA_SYNC_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val); +EXPORT_SYMBOL_GPL(wm8285_asrc1_rate1); + +const struct soc_enum wm8285_asrc2_rate1 = + SOC_VALUE_ENUM_SINGLE(WM8285_ASRC2_RATE1, + WM8285_ASRC2_RATE1_SHIFT, 0xf, + ARIZONA_SYNC_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val); +EXPORT_SYMBOL_GPL(wm8285_asrc2_rate1); + static const char *arizona_vol_ramp_text[] = { "0ms/6dB", "0.5ms/6dB", "1ms/6dB", "2ms/6dB", "4ms/6dB", "8ms/6dB", "15ms/6dB", "30ms/6dB", diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index d51fe2bdaf7..fca5d9ee176 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -96,10 +96,13 @@ struct arizona_priv { }; #define ARIZONA_NUM_MIXER_INPUTS 134 +#define ARIZONA_V2_NUM_MIXER_INPUTS 138 extern const unsigned int arizona_mixer_tlv[]; extern const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS]; extern int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS]; +extern const char *arizona_v2_mixer_texts[ARIZONA_V2_NUM_MIXER_INPUTS]; +extern int arizona_v2_mixer_values[ARIZONA_V2_NUM_MIXER_INPUTS]; #define ARIZONA_GAINMUX_CONTROLS(name, base) \ SOC_SINGLE_RANGE_TLV(name " Input Volume", base + 1, \ @@ -146,6 +149,28 @@ extern int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS]; ARIZONA_MUX_ENUMS(name##_aux5, base_reg + 32); \ ARIZONA_MUX_ENUMS(name##_aux6, base_reg + 40) +#define WM8285_MUX_ENUM_DECL(name, reg) \ + SOC_VALUE_ENUM_SINGLE_DECL(name, reg, 0, 0xff, \ + arizona_v2_mixer_texts, arizona_v2_mixer_values) + +#define WM8285_MUX_ENUMS(name, base_reg) \ + static WM8285_MUX_ENUM_DECL(name##_enum, base_reg); \ + static ARIZONA_MUX_CTL_DECL(name) + +#define WM8285_MIXER_ENUMS(name, base_reg) \ + WM8285_MUX_ENUMS(name##_in1, base_reg); \ + WM8285_MUX_ENUMS(name##_in2, base_reg + 2); \ + WM8285_MUX_ENUMS(name##_in3, base_reg + 4); \ + WM8285_MUX_ENUMS(name##_in4, base_reg + 6) + +#define WM8285_DSP_AUX_ENUMS(name, base_reg) \ + WM8285_MUX_ENUMS(name##_aux1, base_reg); \ + WM8285_MUX_ENUMS(name##_aux2, base_reg + 8); \ + WM8285_MUX_ENUMS(name##_aux3, base_reg + 16); \ + WM8285_MUX_ENUMS(name##_aux4, base_reg + 24); \ + WM8285_MUX_ENUMS(name##_aux5, base_reg + 32); \ + WM8285_MUX_ENUMS(name##_aux6, base_reg + 40) + #define ARIZONA_MUX(name, ctrl) \ SND_SOC_DAPM_VALUE_MUX(name, SND_SOC_NOPM, 0, 0, ctrl) @@ -234,6 +259,8 @@ extern const struct soc_enum arizona_sample_rate[]; extern const struct soc_enum arizona_isrc_fsl[]; extern const struct soc_enum arizona_isrc_fsh[]; extern const struct soc_enum arizona_asrc_rate1; +extern const struct soc_enum wm8285_asrc1_rate1; +extern const struct soc_enum wm8285_asrc2_rate1; extern const struct soc_enum arizona_input_rate; extern const struct soc_enum arizona_output_rate; extern const struct soc_enum arizona_fx_rate; diff --git a/sound/soc/codecs/wm8285.c b/sound/soc/codecs/wm8285.c index 75d13b578ce..4b15f706f95 100644 --- a/sound/soc/codecs/wm8285.c +++ b/sound/soc/codecs/wm8285.c @@ -480,7 +480,8 @@ SOC_VALUE_ENUM("ISRC1 FSH", arizona_isrc_fsh[0]), SOC_VALUE_ENUM("ISRC2 FSH", arizona_isrc_fsh[1]), SOC_VALUE_ENUM("ISRC3 FSH", arizona_isrc_fsh[2]), SOC_VALUE_ENUM("ISRC4 FSH", arizona_isrc_fsh[3]), -SOC_VALUE_ENUM("ASRC RATE 1", arizona_asrc_rate1), +SOC_VALUE_ENUM("ASRC1 Rate 1", wm8285_asrc1_rate1), +SOC_VALUE_ENUM("ASRC2 Rate 1", wm8285_asrc2_rate1), ARIZONA_MIXER_CONTROLS("DSP1L", ARIZONA_DSP1LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("DSP1R", ARIZONA_DSP1RMIX_INPUT_1_SOURCE), @@ -641,140 +642,144 @@ ARIZONA_GAINMUX_CONTROLS("SPDIFTX1", ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE), ARIZONA_GAINMUX_CONTROLS("SPDIFTX2", ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE), }; -ARIZONA_MIXER_ENUMS(EQ1, ARIZONA_EQ1MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(EQ2, ARIZONA_EQ2MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(EQ3, ARIZONA_EQ3MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(EQ4, ARIZONA_EQ4MIX_INPUT_1_SOURCE); - -ARIZONA_MIXER_ENUMS(DRC1L, ARIZONA_DRC1LMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(DRC1R, ARIZONA_DRC1RMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(DRC2L, ARIZONA_DRC2LMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(DRC2R, ARIZONA_DRC2RMIX_INPUT_1_SOURCE); - -ARIZONA_MIXER_ENUMS(LHPF1, ARIZONA_HPLP1MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(LHPF2, ARIZONA_HPLP2MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(LHPF3, ARIZONA_HPLP3MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(LHPF4, ARIZONA_HPLP4MIX_INPUT_1_SOURCE); - -ARIZONA_MIXER_ENUMS(DSP1L, ARIZONA_DSP1LMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(DSP1R, ARIZONA_DSP1RMIX_INPUT_1_SOURCE); -ARIZONA_DSP_AUX_ENUMS(DSP1, ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE); - -ARIZONA_MIXER_ENUMS(DSP2L, ARIZONA_DSP2LMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(DSP2R, ARIZONA_DSP2RMIX_INPUT_1_SOURCE); -ARIZONA_DSP_AUX_ENUMS(DSP2, ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE); - -ARIZONA_MIXER_ENUMS(DSP3L, ARIZONA_DSP3LMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(DSP3R, ARIZONA_DSP3RMIX_INPUT_1_SOURCE); -ARIZONA_DSP_AUX_ENUMS(DSP3, ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE); - -ARIZONA_MIXER_ENUMS(DSP4L, ARIZONA_DSP4LMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(DSP4R, ARIZONA_DSP4RMIX_INPUT_1_SOURCE); -ARIZONA_DSP_AUX_ENUMS(DSP4, ARIZONA_DSP4AUX1MIX_INPUT_1_SOURCE); - -ARIZONA_MIXER_ENUMS(DSP5L, WM8285_DSP5LMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(DSP5R, WM8285_DSP5RMIX_INPUT_1_SOURCE); -ARIZONA_DSP_AUX_ENUMS(DSP5, WM8285_DSP5AUX1MIX_INPUT_1_SOURCE); - -ARIZONA_MIXER_ENUMS(DSP6L, WM8285_DSP6LMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(DSP6R, WM8285_DSP6RMIX_INPUT_1_SOURCE); -ARIZONA_DSP_AUX_ENUMS(DSP6, WM8285_DSP6AUX1MIX_INPUT_1_SOURCE); - -ARIZONA_MIXER_ENUMS(DSP7L, WM8285_DSP7LMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(DSP7R, WM8285_DSP7RMIX_INPUT_1_SOURCE); -ARIZONA_DSP_AUX_ENUMS(DSP7, WM8285_DSP7AUX1MIX_INPUT_1_SOURCE); - -ARIZONA_MIXER_ENUMS(Mic, ARIZONA_MICMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(Noise, ARIZONA_NOISEMIX_INPUT_1_SOURCE); - -ARIZONA_MIXER_ENUMS(PWM1, ARIZONA_PWM1MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(PWM2, ARIZONA_PWM2MIX_INPUT_1_SOURCE); - -ARIZONA_MIXER_ENUMS(OUT1L, ARIZONA_OUT1LMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(OUT1R, ARIZONA_OUT1RMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(OUT2L, ARIZONA_OUT2LMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(OUT2R, ARIZONA_OUT2RMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(OUT3L, ARIZONA_OUT3LMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(OUT3R, ARIZONA_OUT3RMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(SPKOUTL, ARIZONA_OUT4LMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(SPKOUTR, ARIZONA_OUT4RMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(SPKDAT1L, ARIZONA_OUT5LMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(SPKDAT1R, ARIZONA_OUT5RMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(SPKDAT2L, ARIZONA_OUT6LMIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(SPKDAT2R, ARIZONA_OUT6RMIX_INPUT_1_SOURCE); - -ARIZONA_MIXER_ENUMS(AIF1TX1, ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(AIF1TX2, ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(AIF1TX3, ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(AIF1TX4, ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(AIF1TX5, ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(AIF1TX6, ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(AIF1TX7, ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(AIF1TX8, ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE); - -ARIZONA_MIXER_ENUMS(AIF2TX1, ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(AIF2TX2, ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(AIF2TX3, ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(AIF2TX4, ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(AIF2TX5, ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(AIF2TX6, ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(AIF2TX7, ARIZONA_AIF2TX7MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(AIF2TX8, ARIZONA_AIF2TX8MIX_INPUT_1_SOURCE); - -ARIZONA_MIXER_ENUMS(AIF3TX1, ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(AIF3TX2, ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE); - -ARIZONA_MIXER_ENUMS(AIF4TX1, ARIZONA_AIF4TX1MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(AIF4TX2, ARIZONA_AIF4TX2MIX_INPUT_1_SOURCE); - -ARIZONA_MIXER_ENUMS(SLIMTX1, ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(SLIMTX2, ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(SLIMTX3, ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(SLIMTX4, ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(SLIMTX5, ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(SLIMTX6, ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(SLIMTX7, ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE); -ARIZONA_MIXER_ENUMS(SLIMTX8, ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE); - -ARIZONA_MUX_ENUMS(SPD1TX1, ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE); -ARIZONA_MUX_ENUMS(SPD1TX2, ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE); - -ARIZONA_MUX_ENUMS(ASRC1L, ARIZONA_ASRC1LMIX_INPUT_1_SOURCE); -ARIZONA_MUX_ENUMS(ASRC1R, ARIZONA_ASRC1RMIX_INPUT_1_SOURCE); -ARIZONA_MUX_ENUMS(ASRC2L, ARIZONA_ASRC2LMIX_INPUT_1_SOURCE); -ARIZONA_MUX_ENUMS(ASRC2R, ARIZONA_ASRC2RMIX_INPUT_1_SOURCE); - -ARIZONA_MUX_ENUMS(ISRC1INT1, ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE); -ARIZONA_MUX_ENUMS(ISRC1INT2, ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE); -ARIZONA_MUX_ENUMS(ISRC1INT3, ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE); -ARIZONA_MUX_ENUMS(ISRC1INT4, ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE); - -ARIZONA_MUX_ENUMS(ISRC1DEC1, ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE); -ARIZONA_MUX_ENUMS(ISRC1DEC2, ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE); -ARIZONA_MUX_ENUMS(ISRC1DEC3, ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE); -ARIZONA_MUX_ENUMS(ISRC1DEC4, ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE); - -ARIZONA_MUX_ENUMS(ISRC2INT1, ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE); -ARIZONA_MUX_ENUMS(ISRC2INT2, ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE); -ARIZONA_MUX_ENUMS(ISRC2INT3, ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE); -ARIZONA_MUX_ENUMS(ISRC2INT4, ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE); - -ARIZONA_MUX_ENUMS(ISRC2DEC1, ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE); -ARIZONA_MUX_ENUMS(ISRC2DEC2, ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE); -ARIZONA_MUX_ENUMS(ISRC2DEC3, ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE); -ARIZONA_MUX_ENUMS(ISRC2DEC4, ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE); - -ARIZONA_MUX_ENUMS(ISRC3INT1, ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE); -ARIZONA_MUX_ENUMS(ISRC3INT2, ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE); - -ARIZONA_MUX_ENUMS(ISRC3DEC1, ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE); -ARIZONA_MUX_ENUMS(ISRC3DEC2, ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE); - -ARIZONA_MUX_ENUMS(ISRC4INT1, ARIZONA_ISRC4INT1MIX_INPUT_1_SOURCE); -ARIZONA_MUX_ENUMS(ISRC4INT2, ARIZONA_ISRC4INT2MIX_INPUT_1_SOURCE); - -ARIZONA_MUX_ENUMS(ISRC4DEC1, ARIZONA_ISRC4DEC1MIX_INPUT_1_SOURCE); -ARIZONA_MUX_ENUMS(ISRC4DEC2, ARIZONA_ISRC4DEC2MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(EQ1, ARIZONA_EQ1MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(EQ2, ARIZONA_EQ2MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(EQ3, ARIZONA_EQ3MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(EQ4, ARIZONA_EQ4MIX_INPUT_1_SOURCE); + +WM8285_MIXER_ENUMS(DRC1L, ARIZONA_DRC1LMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(DRC1R, ARIZONA_DRC1RMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(DRC2L, ARIZONA_DRC2LMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(DRC2R, ARIZONA_DRC2RMIX_INPUT_1_SOURCE); + +WM8285_MIXER_ENUMS(LHPF1, ARIZONA_HPLP1MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(LHPF2, ARIZONA_HPLP2MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(LHPF3, ARIZONA_HPLP3MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(LHPF4, ARIZONA_HPLP4MIX_INPUT_1_SOURCE); + +WM8285_MIXER_ENUMS(DSP1L, ARIZONA_DSP1LMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(DSP1R, ARIZONA_DSP1RMIX_INPUT_1_SOURCE); +WM8285_DSP_AUX_ENUMS(DSP1, ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE); + +WM8285_MIXER_ENUMS(DSP2L, ARIZONA_DSP2LMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(DSP2R, ARIZONA_DSP2RMIX_INPUT_1_SOURCE); +WM8285_DSP_AUX_ENUMS(DSP2, ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE); + +WM8285_MIXER_ENUMS(DSP3L, ARIZONA_DSP3LMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(DSP3R, ARIZONA_DSP3RMIX_INPUT_1_SOURCE); +WM8285_DSP_AUX_ENUMS(DSP3, ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE); + +WM8285_MIXER_ENUMS(DSP4L, ARIZONA_DSP4LMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(DSP4R, ARIZONA_DSP4RMIX_INPUT_1_SOURCE); +WM8285_DSP_AUX_ENUMS(DSP4, ARIZONA_DSP4AUX1MIX_INPUT_1_SOURCE); + +WM8285_MIXER_ENUMS(DSP5L, WM8285_DSP5LMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(DSP5R, WM8285_DSP5RMIX_INPUT_1_SOURCE); +WM8285_DSP_AUX_ENUMS(DSP5, WM8285_DSP5AUX1MIX_INPUT_1_SOURCE); + +WM8285_MIXER_ENUMS(DSP6L, WM8285_DSP6LMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(DSP6R, WM8285_DSP6RMIX_INPUT_1_SOURCE); +WM8285_DSP_AUX_ENUMS(DSP6, WM8285_DSP6AUX1MIX_INPUT_1_SOURCE); + +WM8285_MIXER_ENUMS(DSP7L, WM8285_DSP7LMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(DSP7R, WM8285_DSP7RMIX_INPUT_1_SOURCE); +WM8285_DSP_AUX_ENUMS(DSP7, WM8285_DSP7AUX1MIX_INPUT_1_SOURCE); + +WM8285_MIXER_ENUMS(Mic, ARIZONA_MICMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(Noise, ARIZONA_NOISEMIX_INPUT_1_SOURCE); + +WM8285_MIXER_ENUMS(PWM1, ARIZONA_PWM1MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(PWM2, ARIZONA_PWM2MIX_INPUT_1_SOURCE); + +WM8285_MIXER_ENUMS(OUT1L, ARIZONA_OUT1LMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(OUT1R, ARIZONA_OUT1RMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(OUT2L, ARIZONA_OUT2LMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(OUT2R, ARIZONA_OUT2RMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(OUT3L, ARIZONA_OUT3LMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(OUT3R, ARIZONA_OUT3RMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(SPKOUTL, ARIZONA_OUT4LMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(SPKOUTR, ARIZONA_OUT4RMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(SPKDAT1L, ARIZONA_OUT5LMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(SPKDAT1R, ARIZONA_OUT5RMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(SPKDAT2L, ARIZONA_OUT6LMIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(SPKDAT2R, ARIZONA_OUT6RMIX_INPUT_1_SOURCE); + +WM8285_MIXER_ENUMS(AIF1TX1, ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(AIF1TX2, ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(AIF1TX3, ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(AIF1TX4, ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(AIF1TX5, ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(AIF1TX6, ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(AIF1TX7, ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(AIF1TX8, ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE); + +WM8285_MIXER_ENUMS(AIF2TX1, ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(AIF2TX2, ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(AIF2TX3, ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(AIF2TX4, ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(AIF2TX5, ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(AIF2TX6, ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(AIF2TX7, ARIZONA_AIF2TX7MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(AIF2TX8, ARIZONA_AIF2TX8MIX_INPUT_1_SOURCE); + +WM8285_MIXER_ENUMS(AIF3TX1, ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(AIF3TX2, ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE); + +WM8285_MIXER_ENUMS(AIF4TX1, ARIZONA_AIF4TX1MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(AIF4TX2, ARIZONA_AIF4TX2MIX_INPUT_1_SOURCE); + +WM8285_MIXER_ENUMS(SLIMTX1, ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(SLIMTX2, ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(SLIMTX3, ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(SLIMTX4, ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(SLIMTX5, ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(SLIMTX6, ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(SLIMTX7, ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE); +WM8285_MIXER_ENUMS(SLIMTX8, ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE); + +WM8285_MUX_ENUMS(SPD1TX1, ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(SPD1TX2, ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE); + +WM8285_MUX_ENUMS(ASRC1IN1L, WM8285_ASRC1_1LMIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ASRC1IN1R, WM8285_ASRC1_1RMIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ASRC1IN2L, WM8285_ASRC1_2LMIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ASRC1IN2R, WM8285_ASRC1_2RMIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ASRC2IN1L, WM8285_ASRC2_1LMIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ASRC2IN1R, WM8285_ASRC2_1RMIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ASRC2IN2L, WM8285_ASRC2_2LMIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ASRC2IN2R, WM8285_ASRC2_2RMIX_INPUT_1_SOURCE); + +WM8285_MUX_ENUMS(ISRC1INT1, ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ISRC1INT2, ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ISRC1INT3, ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ISRC1INT4, ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE); + +WM8285_MUX_ENUMS(ISRC1DEC1, ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ISRC1DEC2, ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ISRC1DEC3, ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ISRC1DEC4, ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE); + +WM8285_MUX_ENUMS(ISRC2INT1, ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ISRC2INT2, ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ISRC2INT3, ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ISRC2INT4, ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE); + +WM8285_MUX_ENUMS(ISRC2DEC1, ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ISRC2DEC2, ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ISRC2DEC3, ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ISRC2DEC4, ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE); + +WM8285_MUX_ENUMS(ISRC3INT1, ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ISRC3INT2, ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE); + +WM8285_MUX_ENUMS(ISRC3DEC1, ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ISRC3DEC2, ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE); + +WM8285_MUX_ENUMS(ISRC4INT1, ARIZONA_ISRC4INT1MIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ISRC4INT2, ARIZONA_ISRC4INT2MIX_INPUT_1_SOURCE); + +WM8285_MUX_ENUMS(ISRC4DEC1, ARIZONA_ISRC4DEC1MIX_INPUT_1_SOURCE); +WM8285_MUX_ENUMS(ISRC4DEC2, ARIZONA_ISRC4DEC2MIX_INPUT_1_SOURCE); static const char * const wm8285_dsp_output_texts[] = { "None", @@ -991,14 +996,23 @@ SND_SOC_DAPM_PGA("PWM1 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM1_ENA_SHIFT, SND_SOC_DAPM_PGA("PWM2 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM2_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC1L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC1L_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("ASRC1R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC1R_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("ASRC2L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2L_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0, - NULL, 0), +SND_SOC_DAPM_PGA("ASRC1IN1L", WM8285_ASRC1_ENABLE, WM8285_ASRC1_IN1L_ENA_SHIFT, + 0, NULL, 0), +SND_SOC_DAPM_PGA("ASRC1IN1R", WM8285_ASRC1_ENABLE, WM8285_ASRC1_IN1R_ENA_SHIFT, + 0, NULL, 0), +SND_SOC_DAPM_PGA("ASRC1IN2L", WM8285_ASRC1_ENABLE, WM8285_ASRC1_IN2L_ENA_SHIFT, + 0, NULL, 0), +SND_SOC_DAPM_PGA("ASRC1IN2R", WM8285_ASRC1_ENABLE, WM8285_ASRC1_IN2R_ENA_SHIFT, + 0, NULL, 0), + +SND_SOC_DAPM_PGA("ASRC2IN1L", WM8285_ASRC2_ENABLE, WM8285_ASRC2_IN1L_ENA_SHIFT, + 0, NULL, 0), +SND_SOC_DAPM_PGA("ASRC2IN1R", WM8285_ASRC2_ENABLE, WM8285_ASRC2_IN1R_ENA_SHIFT, + 0, NULL, 0), +SND_SOC_DAPM_PGA("ASRC2IN2L", WM8285_ASRC2_ENABLE, WM8285_ASRC2_IN2L_ENA_SHIFT, + 0, NULL, 0), +SND_SOC_DAPM_PGA("ASRC2IN2R", WM8285_ASRC2_ENABLE, WM8285_ASRC2_IN2R_ENA_SHIFT, + 0, NULL, 0), WM_ADSP2("DSP1", 0), WM_ADSP2("DSP2", 1), @@ -1351,10 +1365,15 @@ ARIZONA_MIXER_WIDGETS(SLIMTX8, "SLIMTX8"), ARIZONA_MUX_WIDGETS(SPD1TX1, "SPDIFTX1"), ARIZONA_MUX_WIDGETS(SPD1TX2, "SPDIFTX2"), -ARIZONA_MUX_WIDGETS(ASRC1L, "ASRC1L"), -ARIZONA_MUX_WIDGETS(ASRC1R, "ASRC1R"), -ARIZONA_MUX_WIDGETS(ASRC2L, "ASRC2L"), -ARIZONA_MUX_WIDGETS(ASRC2R, "ASRC2R"), +ARIZONA_MUX_WIDGETS(ASRC1IN1L, "ASRC1IN1L"), +ARIZONA_MUX_WIDGETS(ASRC1IN1R, "ASRC1IN1R"), +ARIZONA_MUX_WIDGETS(ASRC1IN2L, "ASRC1IN2L"), +ARIZONA_MUX_WIDGETS(ASRC1IN2R, "ASRC1IN2R"), +ARIZONA_MUX_WIDGETS(ASRC2IN1L, "ASRC2IN1L"), +ARIZONA_MUX_WIDGETS(ASRC2IN1R, "ASRC2IN1R"), +ARIZONA_MUX_WIDGETS(ASRC2IN2L, "ASRC2IN2L"), +ARIZONA_MUX_WIDGETS(ASRC2IN2R, "ASRC2IN2R"), + ARIZONA_DSP_WIDGETS(DSP1, "DSP1"), ARIZONA_DSP_WIDGETS(DSP2, "DSP2"), @@ -1483,10 +1502,14 @@ SND_SOC_DAPM_OUTPUT("MICSUPP"), { name, "LHPF2", "LHPF2" }, \ { name, "LHPF3", "LHPF3" }, \ { name, "LHPF4", "LHPF4" }, \ - { name, "ASRC1L", "ASRC1L" }, \ - { name, "ASRC1R", "ASRC1R" }, \ - { name, "ASRC2L", "ASRC2L" }, \ - { name, "ASRC2R", "ASRC2R" }, \ + { name, "ASRC1IN1L", "ASRC1IN1L" }, \ + { name, "ASRC1IN1R", "ASRC1IN1R" }, \ + { name, "ASRC1IN2L", "ASRC1IN2L" }, \ + { name, "ASRC1IN2R", "ASRC1IN2R" }, \ + { name, "ASRC2IN1L", "ASRC2IN1L" }, \ + { name, "ASRC2IN1R", "ASRC2IN1R" }, \ + { name, "ASRC2IN2L", "ASRC2IN2L" }, \ + { name, "ASRC2IN2R", "ASRC2IN2R" }, \ { name, "ISRC1DEC1", "ISRC1DEC1" }, \ { name, "ISRC1DEC2", "ISRC1DEC2" }, \ { name, "ISRC1DEC3", "ISRC1DEC3" }, \ @@ -1827,10 +1850,14 @@ static const struct snd_soc_dapm_route wm8285_dapm_routes[] = { ARIZONA_MIXER_ROUTES("Mic Mute Mixer", "Noise"), ARIZONA_MIXER_ROUTES("Mic Mute Mixer", "Mic"), - ARIZONA_MUX_ROUTES("ASRC1L", "ASRC1L"), - ARIZONA_MUX_ROUTES("ASRC1R", "ASRC1R"), - ARIZONA_MUX_ROUTES("ASRC2L", "ASRC2L"), - ARIZONA_MUX_ROUTES("ASRC2R", "ASRC2R"), + ARIZONA_MUX_ROUTES("ASRC1IN1L", "ASRC1IN1L"), + ARIZONA_MUX_ROUTES("ASRC1IN1R", "ASRC1IN1R"), + ARIZONA_MUX_ROUTES("ASRC1IN2L", "ASRC1IN2L"), + ARIZONA_MUX_ROUTES("ASRC1IN2R", "ASRC1IN2R"), + ARIZONA_MUX_ROUTES("ASRC2IN1L", "ASRC2IN1L"), + ARIZONA_MUX_ROUTES("ASRC2IN1R", "ASRC2IN1R"), + ARIZONA_MUX_ROUTES("ASRC2IN2L", "ASRC2IN2L"), + ARIZONA_MUX_ROUTES("ASRC2IN2R", "ASRC2IN2R"), ARIZONA_DSP_ROUTES("DSP1"), ARIZONA_DSP_ROUTES("DSP2"), From 4a0c81b5044a6df94e7a38747247bfd0680924e4 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 13 Aug 2014 11:42:47 +0100 Subject: [PATCH 0519/1167] mfd: arizona: Mark additional registers as volatile Mark some additional registers as volatile. The write sequencer control registers should not be cached, as we don't ever want their value synchronised as this might cause a write sequence to be accidentally initiated. Additionally, the DAC_COMP registers require special preconditions to write so there values wouldn't be updated accurately during a register sync. Signed-off-by: Charles Keepax Signed-off-by: Lee Jones (cherry picked from commit git e569d937af96bc1ec00e33285fff33ae9c1e42d6) Change-Id: I8b6438e10a1c3db32c726bde2fc9fd499ffa084a Signed-off-by: Charles Keepax --- drivers/mfd/wm5102-tables.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index 4a3acf35944..11767cb7583 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -1960,6 +1960,7 @@ static bool wm5102_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_WRITE_SEQUENCER_CTRL_0: case ARIZONA_WRITE_SEQUENCER_CTRL_1: case ARIZONA_WRITE_SEQUENCER_CTRL_2: + case ARIZONA_WRITE_SEQUENCER_CTRL_3: case ARIZONA_OUTPUT_STATUS_1: case ARIZONA_RAW_OUTPUT_STATUS_1: case ARIZONA_SLIMBUS_RX_PORT_STATUS: From d2ebf729b17c3b0e7ca8949e20a6b1bb37330b94 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 18 Nov 2014 13:55:36 +0000 Subject: [PATCH 0520/1167] mfd: arizona: Only lower DCVDD for suspend if we are using the LDO We only need to lower the suspend DCVDD voltage if we are using the internal LDO. Change-Id: Ib4a2508d92d1347007f3bebabff76d9cff25cbc2 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 96 ++++++++++++++++++++------------------ 1 file changed, 51 insertions(+), 45 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 967ad433168..2b13a6c0097 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -543,24 +543,6 @@ static int arizona_runtime_resume(struct device *dev) regcache_cache_only(arizona->regmap, false); - switch (arizona->type) { - case WM5110: - case WM8280: - if (arizona->rev == 3) { - if (!arizona->pdata.reset) { - ret = arizona_soft_reset(arizona); - if (ret != 0) - goto err; - } else { - gpio_set_value_cansleep(arizona->pdata.reset, 1); - msleep(1); - } - } - break; - default: - break; - } - switch (arizona->type) { case WM5102: if (arizona->external_dcvdd) { @@ -589,7 +571,19 @@ static int arizona_runtime_resume(struct device *dev) goto err; } break; - default: + case WM5110: + case WM8280: + if (arizona->rev == 3) { + if (!arizona->pdata.reset) { + ret = arizona_soft_reset(arizona); + if (ret != 0) + goto err; + } else { + gpio_set_value_cansleep(arizona->pdata.reset, 1); + msleep(1); + } + } + ret = arizona_wait_for_boot(arizona); if (ret != 0) { goto err; @@ -604,22 +598,33 @@ static int arizona_runtime_resume(struct device *dev) "Failed to connect DCVDD: %d\n", ret); goto err; } + } else { + ret = regulator_set_voltage(arizona->dcvdd, + 1200000, 1200000); + if (ret < 0) { + dev_err(arizona->dev, + "Failed to set resume voltage: %d\n", + ret); + goto err; + } } break; - } - - switch (arizona->type) { - case WM5110: - case WM8280: - ret = regulator_set_voltage(arizona->dcvdd, 1200000, 1200000); - if (ret < 0) { - dev_err(arizona->dev, - "Failed to set resume voltage: %d\n", - ret); + default: + ret = arizona_wait_for_boot(arizona); + if (ret != 0) { goto err; } - break; - default: + + if (arizona->external_dcvdd) { + ret = regmap_update_bits(arizona->regmap, + ARIZONA_ISOLATION_CONTROL, + ARIZONA_ISOLATE_DCVDD1, 0); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to connect DCVDD: %d\n", ret); + goto err; + } + } break; } @@ -694,21 +699,22 @@ static int arizona_runtime_suspend(struct device *dev) ret); return ret; } - } - - switch (arizona->type) { - case WM5110: - case WM8280: - ret = regulator_set_voltage(arizona->dcvdd, 1175000, 1175000); - if (ret < 0) { - dev_err(arizona->dev, - "Failed to set suspend voltage: %d\n", - ret); - return ret; + } else { + switch (arizona->type) { + case WM5110: + case WM8280: + ret = regulator_set_voltage(arizona->dcvdd, + 1175000, 1175000); + if (ret < 0) { + dev_err(arizona->dev, + "Failed to set suspend voltage: %d\n", + ret); + return ret; + } + break; + default: + break; } - break; - default: - break; } regcache_cache_only(arizona->regmap, true); From 636bdbf4ab52fc668b24694cd40ee8b736eabc2b Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 17 Oct 2014 14:51:02 +0100 Subject: [PATCH 0521/1167] mfd: arizona: improve handling of DVFS in suspend Improvements to the handling of DVFS in runtime suspend - error hanlding: restore DVFS setting if fail to suspend - cache changes to DVFS state while in suspend and apply them when resuming - factor out DVFS code used in multiple places - restore normal 1.2v DCVDD requirement when entering suspend to allow external regulators to reduce power consumption Change-Id: I05d8e0cbad6a3c0b5883364d5cf6d876f7a07740 Signed-off-by: Richard Fitzgerald --- drivers/mfd/arizona-core.c | 179 +++++++++++++++++++------------ include/linux/mfd/arizona/core.h | 1 + 2 files changed, 110 insertions(+), 70 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 2b13a6c0097..1b3b63c559c 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -95,50 +95,85 @@ int arizona_clk32k_disable(struct arizona *arizona) } EXPORT_SYMBOL_GPL(arizona_clk32k_disable); +static int arizona_dvfs_apply_boost(struct arizona *arizona) +{ + int ret; + + ret = regulator_set_voltage(arizona->dcvdd, 1800000, 1800000); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to boost DCVDD: %d\n", ret); + return ret; + } + + ret = regmap_update_bits(arizona->regmap, + ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, + ARIZONA_SUBSYS_MAX_FREQ, 1); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to enable subsys max: %d\n", ret); + + regulator_set_voltage(arizona->dcvdd, 1200000, 1800000); + return ret; + } + + return 0; +} + +static int arizona_dvfs_remove_boost(struct arizona *arizona) +{ + int ret; + + ret = regmap_update_bits(arizona->regmap, + ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, + ARIZONA_SUBSYS_MAX_FREQ, 0); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to disable subsys max: %d\n", ret); + return ret; + } + + ret = regulator_set_voltage(arizona->dcvdd, 1200000, 1800000); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to unboost DCVDD : %d\n", ret); + return ret; + } + + return 0; +} + int arizona_dvfs_up(struct arizona *arizona, unsigned int flags) { - unsigned int new_flags; + unsigned int old_flags; int ret = 0; mutex_lock(&arizona->subsys_max_lock); - new_flags = arizona->subsys_max_rq | flags; + old_flags = arizona->subsys_max_rq; + arizona->subsys_max_rq |= flags; - if (arizona->subsys_max_rq != new_flags) { + /* If currently caching the change will be applied in runtime resume */ + if (arizona->subsys_max_cached) { + dev_dbg(arizona->dev, "subsys_max_cached (dvfs up)\n"); + goto out; + } + + if (arizona->subsys_max_rq != old_flags) { switch (arizona->type) { case WM5102: case WM8997: case WM8998: case WM1814: - ret = regulator_set_voltage(arizona->dcvdd, - 1800000, 1800000); - if (ret != 0) { - dev_err(arizona->dev, - "Failed to set DCVDD (DVFS up): %d\n", - ret); - goto err; - } - - ret = regmap_update_bits(arizona->regmap, - ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, - ARIZONA_SUBSYS_MAX_FREQ, 1); - if (ret != 0) { - dev_err(arizona->dev, - "Failed to enable subsys max: %d\n", - ret); - regulator_set_voltage(arizona->dcvdd, - 1200000, 1800000); - goto err; - } + ret = arizona_dvfs_apply_boost(arizona); break; default: break; } - arizona->subsys_max_rq = new_flags; } -err: +out: mutex_unlock(&arizona->subsys_max_lock); return ret; } @@ -146,39 +181,34 @@ EXPORT_SYMBOL_GPL(arizona_dvfs_up); int arizona_dvfs_down(struct arizona *arizona, unsigned int flags) { + unsigned int old_flags; int ret = 0; mutex_lock(&arizona->subsys_max_lock); + old_flags = arizona->subsys_max_rq; arizona->subsys_max_rq &= ~flags; - if (arizona->subsys_max_rq == 0) { + /* If currently caching the change will be applied in runtime resume */ + if (arizona->subsys_max_cached) { + dev_dbg(arizona->dev, "subsys_max_cached (dvfs down)\n"); + goto out; + } + + if ((old_flags != 0) && (arizona->subsys_max_rq == 0)) { switch (arizona->type) { case WM5102: case WM8997: case WM8998: case WM1814: - ret = regmap_update_bits(arizona->regmap, - ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, - ARIZONA_SUBSYS_MAX_FREQ, 0); - if (ret != 0) - dev_err(arizona->dev, - "Failed to disable subsys max: %d\n", - ret); - - ret = regulator_set_voltage(arizona->dcvdd, - 1200000, 1800000); - if (ret != 0) - dev_err(arizona->dev, - "Failed to set DCVDD (DVFS down): %d\n", - ret); + ret = arizona_dvfs_remove_boost(arizona); break; default: break; } } - +out: mutex_unlock(&arizona->subsys_max_lock); return ret; } @@ -518,6 +548,33 @@ static int arizona_soft_reset(struct arizona *arizona) } #ifdef CONFIG_PM_RUNTIME +static int arizona_restore_dvfs(struct arizona *arizona) +{ + int ret; + + switch (arizona->type) { + default: + return 0; /* no DVFS */ + + case WM5102: + case WM8997: + case WM8998: + case WM1814: + break; + } + + ret = 0; + mutex_lock(&arizona->subsys_max_lock); + if (arizona->subsys_max_rq != 0) { + dev_dbg(arizona->dev, "Restore subsys_max boost\n"); + ret = arizona_dvfs_apply_boost(arizona); + } + + arizona->subsys_max_cached = false; + mutex_unlock(&arizona->subsys_max_lock); + return ret; +} + static int arizona_runtime_resume(struct device *dev) { struct arizona *arizona = dev_get_drvdata(dev); @@ -634,31 +691,9 @@ static int arizona_runtime_resume(struct device *dev) goto err; } - switch(arizona->type) { - case WM5102: - case WM8997: - case WM8998: - case WM1814: - /* Restore DVFS setting */ - ret = 0; - mutex_lock(&arizona->subsys_max_lock); - if (arizona->subsys_max_rq != 0) { - ret = regmap_update_bits(arizona->regmap, - ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, - ARIZONA_SUBSYS_MAX_FREQ, 1); - } - mutex_unlock(&arizona->subsys_max_lock); - - if (ret != 0) { - dev_err(arizona->dev, - "Failed to enable subsys max: %d\n", - ret); - goto err; - } - break; - default: - break; - } + ret = arizona_restore_dvfs(arizona); + if (ret < 0) + goto err; return 0; @@ -681,9 +716,10 @@ static int arizona_runtime_suspend(struct device *dev) case WM8998: case WM1814: /* Must disable DVFS boost before powering down DCVDD */ - regmap_update_bits(arizona->regmap, - ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, - ARIZONA_SUBSYS_MAX_FREQ, 0); + mutex_lock(&arizona->subsys_max_lock); + arizona->subsys_max_cached = true; + arizona_dvfs_remove_boost(arizona); + mutex_unlock(&arizona->subsys_max_lock); break; default: break; @@ -697,7 +733,7 @@ static int arizona_runtime_suspend(struct device *dev) if (ret != 0) { dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", ret); - return ret; + goto err; } } else { switch (arizona->type) { @@ -722,6 +758,9 @@ static int arizona_runtime_suspend(struct device *dev) regulator_disable(arizona->dcvdd); return 0; +err: + arizona_restore_dvfs(arizona); + return ret; } #endif diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index f01cc3b0762..6848c405108 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -150,6 +150,7 @@ struct arizona { struct mutex subsys_max_lock; unsigned int subsys_max_rq; + bool subsys_max_cached; struct snd_soc_dapm_context *dapm; From 56818ebfcb1581f4b1dbf94d4e52ed2c5b0e433f Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Mon, 24 Nov 2014 10:26:38 +0000 Subject: [PATCH 0522/1167] mfd: wm8285: Fixup register defaults Add AIF4TX{1,2}MIX and DSP6AUX2MIX defaults Change-Id: Ife207485405af2ef75ee485a40b3fa72def13cb3 Signed-off-by: Nariman Poushin --- drivers/mfd/wm8285-tables.c | 29 +++++++++++++++++++++++------ 1 file changed, 23 insertions(+), 6 deletions(-) diff --git a/drivers/mfd/wm8285-tables.c b/drivers/mfd/wm8285-tables.c index 5831ea80865..b4a6318392e 100644 --- a/drivers/mfd/wm8285-tables.c +++ b/drivers/mfd/wm8285-tables.c @@ -718,6 +718,22 @@ static const struct reg_default wm8285_reg_default[] = { { 0x0000078d, 0x0080 }, { 0x0000078e, 0x0000 }, { 0x0000078f, 0x0080 }, + { 0x000007a0, 0x0000 }, /* R1952 - AIF4TX1MIX Input 1 Source */ + { 0x000007a1, 0x0080 }, /* R1953 - AIF4TX1MIX Input 1 Volume */ + { 0x000007a2, 0x0000 }, /* R1954 - AIF4TX1MIX Input 2 Source */ + { 0x000007a3, 0x0080 }, /* R1955 - AIF4TX1MIX Input 2 Volume */ + { 0x000007a4, 0x0000 }, /* R1956 - AIF4TX1MIX Input 3 Source */ + { 0x000007a5, 0x0080 }, /* R1957 - AIF4TX1MIX Input 3 Volume */ + { 0x000007a6, 0x0000 }, /* R1958 - AIF4TX1MIX Input 4 Source */ + { 0x000007a7, 0x0080 }, /* R1959 - AIF4TX1MIX Input 4 Volume */ + { 0x000007a8, 0x0000 }, /* R1960 - AIF4TX2MIX Input 1 Source */ + { 0x000007a9, 0x0080 }, /* R1961 - AIF4TX2MIX Input 1 Volume */ + { 0x000007aa, 0x0000 }, /* R1962 - AIF4TX2MIX Input 2 Source */ + { 0x000007ab, 0x0080 }, /* R1963 - AIF4TX2MIX Input 2 Volume */ + { 0x000007ac, 0x0000 }, /* R1964 - AIF4TX2MIX Input 3 Source */ + { 0x000007ad, 0x0080 }, /* R1965 - AIF4TX2MIX Input 3 Volume */ + { 0x000007ae, 0x0000 }, /* R1966 - AIF4TX2MIX Input 4 Source */ + { 0x000007af, 0x0080 }, /* R1967 - AIF4TX2MIX Input 4 Volume */ { 0x000007c0, 0x0000 }, { 0x000007c1, 0x0080 }, { 0x000007c2, 0x0000 }, @@ -1035,12 +1051,13 @@ static const struct reg_default wm8285_reg_default[] = { { 0x00000c0c, 0x0000 }, { 0x00000c0d, 0x0080 }, { 0x00000c0e, 0x0000 }, - { 0x00000c0f, 0x0080 }, /* R3087 (0xC0F) - IRQ CTRL 1 */ - { 0x00000c10, 0x0000 }, /* R3088 (0xC10) - GPIO Debounce Config */ - { 0x00000c20, 0x0000 }, /* R3104 (0xC20) - Misc Pad Ctrl 1 */ - { 0x00000c28, 0x0000 }, - { 0x00000c30, 0x0000 }, - { 0x00000c38, 0x0000 }, + { 0x00000c0f, 0x0080 }, + { 0x00000c10, 0x0000 }, /* R3088 (0xC10) - DSP6AUX1MIX Input 1 */ + { 0x00000c18, 0x0000 }, /* R3088 (0xC18) - DSP6AUX2MIX Input 1 */ + { 0x00000c20, 0x0000 }, /* R3088 (0xC20) - DSP6AUX3MIX Input 1 */ + { 0x00000c28, 0x0000 }, /* R3088 (0xC28) - DSP6AUX4MIX Input 1 */ + { 0x00000c30, 0x0000 }, /* R3088 (0xC30) - DSP6AUX5MIX Input 1 */ + { 0x00000c38, 0x0000 }, /* R3088 (0xC38) - DSP6AUX6MIX Input 1 */ { 0x00000c40, 0x0000 }, { 0x00000c41, 0x0080 }, { 0x00000c42, 0x0000 }, From 7fcffef1ae23fdff28f65478296a45e1c4fc2e9c Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Tue, 25 Nov 2014 11:35:52 +0000 Subject: [PATCH 0523/1167] ASoC: wm8285: Remove NOISE and MIX mixers Change-Id: I2a38a22988bc79200413bbcf6a8041388cc672f9 Signed-off-by: Nariman Poushin --- sound/soc/codecs/wm8285.c | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/sound/soc/codecs/wm8285.c b/sound/soc/codecs/wm8285.c index 4b15f706f95..5d1f02450fb 100644 --- a/sound/soc/codecs/wm8285.c +++ b/sound/soc/codecs/wm8285.c @@ -498,9 +498,6 @@ ARIZONA_MIXER_CONTROLS("DSP6R", WM8285_DSP6RMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("DSP7L", WM8285_DSP7LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("DSP7R", WM8285_DSP7RMIX_INPUT_1_SOURCE), -ARIZONA_MIXER_CONTROLS("Mic", ARIZONA_MICMIX_INPUT_1_SOURCE), -ARIZONA_MIXER_CONTROLS("Noise", ARIZONA_NOISEMIX_INPUT_1_SOURCE), - SOC_SINGLE_TLV("Noise Generator Volume", ARIZONA_COMFORT_NOISE_GENERATOR, ARIZONA_NOISE_GEN_GAIN_SHIFT, 0x16, 0, noise_tlv), @@ -685,9 +682,6 @@ WM8285_MIXER_ENUMS(DSP7L, WM8285_DSP7LMIX_INPUT_1_SOURCE); WM8285_MIXER_ENUMS(DSP7R, WM8285_DSP7RMIX_INPUT_1_SOURCE); WM8285_DSP_AUX_ENUMS(DSP7, WM8285_DSP7AUX1MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(Mic, ARIZONA_MICMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(Noise, ARIZONA_NOISEMIX_INPUT_1_SOURCE); - WM8285_MIXER_ENUMS(PWM1, ARIZONA_PWM1MIX_INPUT_1_SOURCE); WM8285_MIXER_ENUMS(PWM2, ARIZONA_PWM2MIX_INPUT_1_SOURCE); @@ -965,9 +959,6 @@ SND_SOC_DAPM_PGA("Tone Generator 1", ARIZONA_TONE_GENERATOR_1, SND_SOC_DAPM_PGA("Tone Generator 2", ARIZONA_TONE_GENERATOR_1, ARIZONA_TONE2_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("Mic Mute Mixer", ARIZONA_MIC_NOISE_MIX_CONTROL_1, - ARIZONA_MICMUTE_MIX_ENA_SHIFT, 0, NULL, 0), - SND_SOC_DAPM_PGA("EQ1", ARIZONA_EQ1_1, ARIZONA_EQ1_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_PGA("EQ2", ARIZONA_EQ2_1, ARIZONA_EQ2_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_PGA("EQ3", ARIZONA_EQ3_1, ARIZONA_EQ3_ENA_SHIFT, 0, NULL, 0), @@ -1310,9 +1301,6 @@ ARIZONA_MIXER_WIDGETS(LHPF2, "LHPF2"), ARIZONA_MIXER_WIDGETS(LHPF3, "LHPF3"), ARIZONA_MIXER_WIDGETS(LHPF4, "LHPF4"), -ARIZONA_MIXER_WIDGETS(Mic, "Mic"), -ARIZONA_MIXER_WIDGETS(Noise, "Noise"), - ARIZONA_MIXER_WIDGETS(PWM1, "PWM1"), ARIZONA_MIXER_WIDGETS(PWM2, "PWM2"), @@ -1461,7 +1449,6 @@ SND_SOC_DAPM_OUTPUT("MICSUPP"), { name, "IN5R", "IN5R PGA" }, \ { name, "IN6L", "IN6L PGA" }, \ { name, "IN6R", "IN6R PGA" }, \ - { name, "Mic Mute Mixer", "Mic Mute Mixer" }, \ { name, "AIF1RX1", "AIF1RX1" }, \ { name, "AIF1RX2", "AIF1RX2" }, \ { name, "AIF1RX3", "AIF1RX3" }, \ @@ -1847,9 +1834,6 @@ static const struct snd_soc_dapm_route wm8285_dapm_routes[] = { ARIZONA_MIXER_ROUTES("LHPF3", "LHPF3"), ARIZONA_MIXER_ROUTES("LHPF4", "LHPF4"), - ARIZONA_MIXER_ROUTES("Mic Mute Mixer", "Noise"), - ARIZONA_MIXER_ROUTES("Mic Mute Mixer", "Mic"), - ARIZONA_MUX_ROUTES("ASRC1IN1L", "ASRC1IN1L"), ARIZONA_MUX_ROUTES("ASRC1IN1R", "ASRC1IN1R"), ARIZONA_MUX_ROUTES("ASRC1IN2L", "ASRC1IN2L"), From e8dc1341cd03adae5d28d905f4b73d6555b42ed8 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Tue, 25 Nov 2014 13:32:43 +0000 Subject: [PATCH 0524/1167] ASoC: wm8285: Correct output ANC source for OUT3R Change-Id: I6873edf52e34585337b4f340b3f1af909543a56f Signed-off-by: Nariman Poushin --- sound/soc/codecs/arizona.c | 8 ++++++++ sound/soc/codecs/arizona.h | 1 + sound/soc/codecs/wm8285.c | 2 +- 3 files changed, 10 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index a61bfe7c856..879df4f3e96 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1310,6 +1310,14 @@ const struct soc_enum arizona_output_anc_src[] = { }; EXPORT_SYMBOL_GPL(arizona_output_anc_src); +const struct soc_enum wm8285_output_anc_src_defs[] = { + SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_3R, + ARIZONA_OUT3R_ANC_SRC_SHIFT, + ARRAY_SIZE(arizona_output_anc_src_text), + arizona_output_anc_src_text), +}; +EXPORT_SYMBOL_GPL(wm8285_output_anc_src_defs); + static void arizona_in_set_vu(struct snd_soc_codec *codec, int ena) { struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index fca5d9ee176..23c3ca3ed98 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -285,6 +285,7 @@ extern const struct soc_enum wm8285_in_dmic_osr[]; extern const struct soc_enum arizona_anc_input_src[]; extern const struct soc_enum wm8285_anc_input_src[]; extern const struct soc_enum arizona_output_anc_src[]; +extern const struct soc_enum wm8285_output_anc_src_defs[]; extern int arizona_put_anc_input(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); diff --git a/sound/soc/codecs/wm8285.c b/sound/soc/codecs/wm8285.c index 5d1f02450fb..9e0069cf840 100644 --- a/sound/soc/codecs/wm8285.c +++ b/sound/soc/codecs/wm8285.c @@ -834,7 +834,7 @@ static const struct snd_kcontrol_new wm8285_output_anc_src[] = { SOC_DAPM_ENUM("HPOUT2L ANC Source", arizona_output_anc_src[2]), SOC_DAPM_ENUM("HPOUT2R ANC Source", arizona_output_anc_src[3]), SOC_DAPM_ENUM("HPOUT3L ANC Source", arizona_output_anc_src[4]), - SOC_DAPM_ENUM("HPOUT3R ANC Source", arizona_output_anc_src[5]), + SOC_DAPM_ENUM("HPOUT3R ANC Source", wm8285_output_anc_src_defs[0]), SOC_DAPM_ENUM("SPKOUTL ANC Source", arizona_output_anc_src[6]), SOC_DAPM_ENUM("SPKOUTR ANC Source", arizona_output_anc_src[7]), SOC_DAPM_ENUM("SPKDAT1L ANC Source", arizona_output_anc_src[8]), From 6413ab837582c244578711975a5da7f6e7d0684b Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 22 Oct 2014 17:16:35 +0100 Subject: [PATCH 0525/1167] mfd: florida: update register defaults Update default register values to match datasheet Change-Id: I46ebe833ad6a343827748142d132e62d7a1c4ec3 Signed-off-by: Richard Fitzgerald --- drivers/mfd/florida-tables.c | 52 ++++++++++++++++++------------------ 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 2078f127792..866e5687b4c 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -727,7 +727,7 @@ static const struct reg_default florida_reg_default[] = { { 0x00000186, 0x0000 }, /* R390 - FLL1 Synchroniser 6 */ { 0x00000187, 0x0001 }, /* R390 - FLL1 Synchroniser 7 */ { 0x00000189, 0x0000 }, /* R393 - FLL1 Spread Spectrum */ - { 0x0000018A, 0x0004 }, /* R394 - FLL1 GPIO Clock */ + { 0x0000018A, 0x000C }, /* R394 - FLL1 GPIO Clock */ { 0x00000191, 0x0000 }, /* R401 - FLL2 Control 1 */ { 0x00000192, 0x0008 }, /* R402 - FLL2 Control 2 */ { 0x00000193, 0x0018 }, /* R403 - FLL2 Control 3 */ @@ -745,7 +745,7 @@ static const struct reg_default florida_reg_default[] = { { 0x000001A6, 0x0000 }, /* R422 - FLL2 Synchroniser 6 */ { 0x000001A7, 0x0001 }, /* R422 - FLL2 Synchroniser 7 */ { 0x000001A9, 0x0000 }, /* R425 - FLL2 Spread Spectrum */ - { 0x000001AA, 0x0004 }, /* R426 - FLL2 GPIO Clock */ + { 0x000001AA, 0x000C }, /* R426 - FLL2 GPIO Clock */ { 0x00000200, 0x0006 }, /* R512 - Mic Charge Pump 1 */ { 0x00000210, 0x0184 }, /* R528 - LDO1 Control 1 */ { 0x00000213, 0x03E4 }, /* R531 - LDO2 Control 1 */ @@ -801,7 +801,7 @@ static const struct reg_default florida_reg_default[] = { { 0x00000411, 0x0180 }, /* R1041 - DAC Digital Volume 1L */ { 0x00000412, 0x0080 }, /* R1042 - DAC Volume Limit 1L */ { 0x00000413, 0x0001 }, /* R1043 - Noise Gate Select 1L */ - { 0x00000414, 0x0080 }, /* R1044 - Output Path Config 1R */ + { 0x00000414, 0x0000 }, /* R1044 - Output Path Config 1R */ { 0x00000415, 0x0180 }, /* R1045 - DAC Digital Volume 1R */ { 0x00000416, 0x0080 }, /* R1046 - DAC Volume Limit 1R */ { 0x00000417, 0x0002 }, /* R1047 - Noise Gate Select 1R */ @@ -1506,39 +1506,39 @@ static const struct reg_default florida_reg_default[] = { { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */ { 0x00000C18, 0x0000 }, /* R3096 - GP Switch 1 */ { 0x00000C20, 0x8002 }, /* R3104 - Misc Pad Ctrl 1 */ - { 0x00000C21, 0x8001 }, /* R3105 - Misc Pad Ctrl 2 */ + { 0x00000C21, 0x0001 }, /* R3105 - Misc Pad Ctrl 2 */ { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */ { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */ { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */ { 0x00000C25, 0x0000 }, /* R3109 - Misc Pad Ctrl 6 */ - { 0x00000C30, 0x8282 }, /* R3120 - Misc Pad Ctrl 7 */ - { 0x00000C31, 0x0082 }, /* R3121 - Misc Pad Ctrl 8 */ - { 0x00000C32, 0x8282 }, /* R3122 - Misc Pad Ctrl 9 */ - { 0x00000C33, 0x8282 }, /* R3123 - Misc Pad Ctrl 10 */ - { 0x00000C34, 0x8282 }, /* R3124 - Misc Pad Ctrl 11 */ - { 0x00000C35, 0x8282 }, /* R3125 - Misc Pad Ctrl 12 */ - { 0x00000C36, 0x8282 }, /* R3126 - Misc Pad Ctrl 13 */ - { 0x00000C37, 0x8282 }, /* R3127 - Misc Pad Ctrl 14 */ - { 0x00000C38, 0x8282 }, /* R3128 - Misc Pad Ctrl 15 */ - { 0x00000C39, 0x8282 }, /* R3129 - Misc Pad Ctrl 16 */ - { 0x00000C3A, 0x8282 }, /* R3130 - Misc Pad Ctrl 17 */ - { 0x00000C3B, 0x8282 }, /* R3131 - Misc Pad Ctrl 18 */ - { 0x00000D08, 0xFFFF }, /* R3336 - Interrupt Status 1 Mask */ - { 0x00000D09, 0xFFFF }, /* R3337 - Interrupt Status 2 Mask */ - { 0x00000D0A, 0xFFFF }, /* R3338 - Interrupt Status 3 Mask */ + { 0x00000C30, 0x0404 }, /* R3120 - Misc Pad Ctrl 7 */ + { 0x00000C31, 0x0004 }, /* R3121 - Misc Pad Ctrl 8 */ + { 0x00000C32, 0x0404 }, /* R3122 - Misc Pad Ctrl 9 */ + { 0x00000C33, 0x0404 }, /* R3123 - Misc Pad Ctrl 10 */ + { 0x00000C34, 0x0404 }, /* R3124 - Misc Pad Ctrl 11 */ + { 0x00000C35, 0x0404 }, /* R3125 - Misc Pad Ctrl 12 */ + { 0x00000C36, 0x0404 }, /* R3126 - Misc Pad Ctrl 13 */ + { 0x00000C37, 0x0404 }, /* R3127 - Misc Pad Ctrl 14 */ + { 0x00000C38, 0x0004 }, /* R3128 - Misc Pad Ctrl 15 */ + { 0x00000C39, 0x0404 }, /* R3129 - Misc Pad Ctrl 16 */ + { 0x00000C3A, 0x0404 }, /* R3130 - Misc Pad Ctrl 17 */ + { 0x00000C3B, 0x0404 }, /* R3131 - Misc Pad Ctrl 18 */ + { 0x00000D08, 0x000F }, /* R3336 - Interrupt Status 1 Mask */ + { 0x00000D09, 0x0FFF }, /* R3337 - Interrupt Status 2 Mask */ + { 0x00000D0A, 0xFFEF }, /* R3338 - Interrupt Status 3 Mask */ { 0x00000D0B, 0xFFFF }, /* R3339 - Interrupt Status 4 Mask */ - { 0x00000D0C, 0xFEFF }, /* R3340 - Interrupt Status 5 Mask */ + { 0x00000D0C, 0xFE3B }, /* R3340 - Interrupt Status 5 Mask */ { 0x00000D0D, 0xFFFF }, /* R3341 - Interrupt Status 6 Mask */ { 0x00000D0F, 0x0000 }, /* R3343 - Interrupt Control */ - { 0x00000D18, 0xFFFF }, /* R3352 - IRQ2 Status 1 Mask */ - { 0x00000D19, 0xFFFF }, /* R3353 - IRQ2 Status 2 Mask */ - { 0x00000D1A, 0xFFFF }, /* R3354 - IRQ2 Status 3 Mask */ + { 0x00000D18, 0x000F }, /* R3352 - IRQ2 Status 1 Mask */ + { 0x00000D19, 0x0FFF }, /* R3353 - IRQ2 Status 2 Mask */ + { 0x00000D1A, 0xFFEF }, /* R3354 - IRQ2 Status 3 Mask */ { 0x00000D1B, 0xFFFF }, /* R3355 - IRQ2 Status 4 Mask */ - { 0x00000D1C, 0xFFFF }, /* R3356 - IRQ2 Status 5 Mask */ + { 0x00000D1C, 0xFE3B }, /* R3356 - IRQ2 Status 5 Mask */ { 0x00000D1D, 0xFFFF }, /* R3357 - IRQ2 Status 6 Mask */ { 0x00000D1F, 0x0000 }, /* R3359 - IRQ2 Control */ - { 0x00000D53, 0xFFFF }, /* R3411 - AOD IRQ Mask IRQ1 */ - { 0x00000D54, 0xFFFF }, /* R3412 - AOD IRQ Mask IRQ2 */ + { 0x00000D53, 0x00FC }, /* R3411 - AOD IRQ Mask IRQ1 */ + { 0x00000D54, 0x00FC }, /* R3412 - AOD IRQ Mask IRQ2 */ { 0x00000D56, 0x0000 }, /* R3414 - Jack detect debounce */ { 0x00000E00, 0x0000 }, /* R3584 - FX_Ctrl1 */ { 0x00000E01, 0x0000 }, /* R3585 - FX_Ctrl2 */ From caa419acc747955ee70f90f202cc468de861b391 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 4 Nov 2014 15:38:28 +0000 Subject: [PATCH 0526/1167] ASoC: wm8998: update to new input mux control naming Minor update to the mux control naming to be consistent across inputs and codecs. The options for any mux are now simply 'A' or 'B', and the mux controls are called 'IN1L Mux', 'IN1R Mux' and 'IN2 Mux' Change-Id: I1d79ddfb99254acefb993188719aa786ee88da0f Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm8998.c | 41 +++++++++++++++++---------------------- 1 file changed, 18 insertions(+), 23 deletions(-) diff --git a/sound/soc/codecs/wm8998.c b/sound/soc/codecs/wm8998.c index ec8a344e120..a3c459c3684 100644 --- a/sound/soc/codecs/wm8998.c +++ b/sound/soc/codecs/wm8998.c @@ -45,38 +45,33 @@ static int wm8998_in2mux_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); -static const char * const wm8998_in1mux_texts[] = { - "IN1A", - "IN1B", -}; - -static const char * const wm8998_in2mux_texts[] = { - "IN2A", - "IN2B", +static const char * const wm8998_inmux_texts[] = { + "A", + "B", }; static const SOC_ENUM_SINGLE_DECL(wm8998_in1muxl_enum, ARIZONA_ADC_DIGITAL_VOLUME_1L, ARIZONA_IN1L_SRC_SHIFT, - wm8998_in1mux_texts); + wm8998_inmux_texts); static const SOC_ENUM_SINGLE_DECL(wm8998_in1muxr_enum, ARIZONA_ADC_DIGITAL_VOLUME_1R, ARIZONA_IN1R_SRC_SHIFT, - wm8998_in1mux_texts); + wm8998_inmux_texts); static const SOC_ENUM_SINGLE_DECL(wm8998_in2mux_enum, ARIZONA_ADC_DIGITAL_VOLUME_2L, ARIZONA_IN2L_SRC_SHIFT, - wm8998_in2mux_texts); + wm8998_inmux_texts); static const struct snd_kcontrol_new wm8998_in1mux[2] = { - SOC_DAPM_ENUM("Route", wm8998_in1muxl_enum), - SOC_DAPM_ENUM("Route", wm8998_in1muxr_enum), + SOC_DAPM_ENUM("IN1L Mux", wm8998_in1muxl_enum), + SOC_DAPM_ENUM("IN1R Mux", wm8998_in1muxr_enum), }; static const struct snd_kcontrol_new wm8998_in2mux = - SOC_DAPM_ENUM("Route", wm8998_in2mux_enum); + SOC_DAPM_ENUM("IN2 Mux", wm8998_in2mux_enum); static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); @@ -450,11 +445,11 @@ SND_SOC_DAPM_INPUT("IN1BR"), SND_SOC_DAPM_INPUT("IN2A"), SND_SOC_DAPM_INPUT("IN2B"), -SND_SOC_DAPM_MUX_E("IN1MUXL Input", SND_SOC_NOPM, 0, 0, &wm8998_in1mux[0], +SND_SOC_DAPM_MUX_E("IN1L Mux", SND_SOC_NOPM, 0, 0, &wm8998_in1mux[0], wm8998_in1mux_ev, SND_SOC_DAPM_PRE_PMU), -SND_SOC_DAPM_MUX_E("IN1MUXR Input", SND_SOC_NOPM, 0, 0, &wm8998_in1mux[1], +SND_SOC_DAPM_MUX_E("IN1R Mux", SND_SOC_NOPM, 0, 0, &wm8998_in1mux[1], wm8998_in1mux_ev, SND_SOC_DAPM_PRE_PMU), -SND_SOC_DAPM_MUX_E("IN2MUX Input", SND_SOC_NOPM, 0, 0, &wm8998_in2mux, +SND_SOC_DAPM_MUX_E("IN2 Mux", SND_SOC_NOPM, 0, 0, &wm8998_in2mux, wm8998_in2mux_ev, SND_SOC_DAPM_PRE_PMU), SND_SOC_DAPM_OUTPUT("DRC1 Signal Activity"), @@ -922,13 +917,13 @@ static const struct snd_soc_dapm_route wm8998_dapm_routes[] = { { "Slim1 Capture", NULL, "SYSCLK" }, { "Slim2 Capture", NULL, "SYSCLK" }, - { "IN1MUXL Input", "IN1A", "IN1AL" }, - { "IN1MUXR Input", "IN1A", "IN1AR" }, - { "IN1MUXL Input", "IN1B", "IN1BL" }, - { "IN1MUXR Input", "IN1B", "IN1BR" }, + { "IN1L Mux", "A", "IN1AL" }, + { "IN1R Mux", "A", "IN1AR" }, + { "IN1L Mux", "B", "IN1BL" }, + { "IN1R Mux", "B", "IN1BR" }, - { "IN2MUX Input", "IN2A", "IN2A" }, - { "IN2MUX Input", "IN2B", "IN2B" }, + { "IN2 Mux", "A", "IN2A" }, + { "IN2 Mux", "B", "IN2B" }, { "IN1L PGA", NULL, "IN1MUXL Input" }, { "IN1R PGA", NULL, "IN1MUXR Input" }, From 01860cf037151dda77f3f453a60447e1bb9cb921 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 18 Nov 2014 16:04:37 +0000 Subject: [PATCH 0527/1167] ASoC: arizona: fix compressed stream IRQ race The codec IRQ handlers were using the existence of the compressed stream to decide whether to call the ADSP buffer code. But this isn't correct, since we also have to allocate the ADSP buffers. This gave a race condition that could cause a NULL pointer deref if an IRQ happened between opening the compressed stream and calling _set_params() to allocate the buffer. Change-Id: I62a9d0bf50c029214f0e6dfa26074edc925e66a4 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/cs47l24.c | 6 +++++- sound/soc/codecs/florida.c | 6 +++++- sound/soc/codecs/wm8285.c | 6 +++++- 3 files changed, 15 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/cs47l24.c b/sound/soc/codecs/cs47l24.c index 9e2bd5dda4a..b26553356b1 100644 --- a/sound/soc/codecs/cs47l24.c +++ b/sound/soc/codecs/cs47l24.c @@ -43,6 +43,7 @@ struct cs47l24_compr { struct wm_adsp *adsp; size_t total_copied; + bool allocated; bool trig; bool forced; }; @@ -1112,7 +1113,7 @@ static irqreturn_t adsp2_irq(int irq, void *data) cs47l24->compr_info.trig = true; } - if (!cs47l24->compr_info.stream) + if (!cs47l24->compr_info.allocated) goto out; ret = wm_adsp_stream_handle_irq(cs47l24->compr_info.adsp); @@ -1181,6 +1182,7 @@ static int cs47l24_free(struct snd_compr_stream *stream) mutex_lock(&cs47l24->compr_info.lock); + cs47l24->compr_info.allocated = false; cs47l24->compr_info.stream = NULL; cs47l24->compr_info.total_copied = 0; if (!cs47l24->compr_info.forced) @@ -1215,6 +1217,8 @@ static int cs47l24_set_params(struct snd_compr_stream *stream, } ret = wm_adsp_stream_alloc(compr->adsp, params); + if (ret == 0) + compr->allocated = true; out: mutex_unlock(&compr->lock); diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 193f4d0ee7e..2c30a67d932 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -45,6 +45,7 @@ struct florida_compr { struct wm_adsp *adsp; size_t total_copied; + bool allocated; bool trig; bool forced; }; @@ -1899,7 +1900,7 @@ static irqreturn_t adsp2_irq(int irq, void *data) florida->compr_info.trig = true; } - if (!florida->compr_info.stream) + if (!florida->compr_info.allocated) goto out; ret = wm_adsp_stream_handle_irq(florida->compr_info.adsp); @@ -1970,6 +1971,7 @@ static int florida_free(struct snd_compr_stream *stream) mutex_lock(&florida->compr_info.lock); + florida->compr_info.allocated = false; florida->compr_info.stream = NULL; florida->compr_info.total_copied = 0; if (!florida->compr_info.forced) @@ -2004,6 +2006,8 @@ static int florida_set_params(struct snd_compr_stream *stream, } ret = wm_adsp_stream_alloc(compr->adsp, params); + if (ret == 0) + compr->allocated = true; out: mutex_unlock(&compr->lock); diff --git a/sound/soc/codecs/wm8285.c b/sound/soc/codecs/wm8285.c index 9e0069cf840..c621073f94a 100644 --- a/sound/soc/codecs/wm8285.c +++ b/sound/soc/codecs/wm8285.c @@ -57,6 +57,7 @@ struct wm8285_compr { struct wm_adsp *adsp; size_t total_copied; + bool allocated; bool trig; bool forced; }; @@ -2183,7 +2184,7 @@ static irqreturn_t adsp2_irq(int irq, void *data) wm8285->compr_info.trig = true; } - if (!wm8285->compr_info.stream) + if (!wm8285->compr_info.allocated) goto out; ret = wm_adsp_stream_handle_irq(wm8285->compr_info.adsp); @@ -2254,6 +2255,7 @@ static int wm8285_free(struct snd_compr_stream *stream) mutex_lock(&wm8285->compr_info.lock); + wm8285->compr_info.allocated = false; wm8285->compr_info.stream = NULL; wm8285->compr_info.total_copied = 0; if (!wm8285->compr_info.forced) @@ -2288,6 +2290,8 @@ static int wm8285_set_params(struct snd_compr_stream *stream, } ret = wm_adsp_stream_alloc(compr->adsp, params); + if (ret == 0) + compr->allocated = true; out: mutex_unlock(&compr->lock); From 432c92f421f9c588c363b21c2e35dd0a12939c01 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 8 Sep 2014 10:00:17 +0100 Subject: [PATCH 0528/1167] ASoC: arizona: Factor out firmware feature checks Create a new set of firmware feature flags that are initialized when the firmware is powered up and check these where appropriate instead of directly checking the firmware id. The flags are currently still initialized based on firmware id but this does at least abstract the checking of the feature from how it is determined. Change-Id: I208b62c6f29de22976278e17e5377aebc6335e59 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/cs47l24.c | 3 +-- sound/soc/codecs/florida.c | 3 +-- sound/soc/codecs/wm5102.c | 2 +- sound/soc/codecs/wm_adsp.c | 40 +++++++++++++++++++++++++++++--------- sound/soc/codecs/wm_adsp.h | 7 +++++++ 5 files changed, 41 insertions(+), 14 deletions(-) diff --git a/sound/soc/codecs/cs47l24.c b/sound/soc/codecs/cs47l24.c index b26553356b1..1ae80b70709 100644 --- a/sound/soc/codecs/cs47l24.c +++ b/sound/soc/codecs/cs47l24.c @@ -1105,8 +1105,7 @@ static irqreturn_t adsp2_irq(int irq, void *data) mutex_lock(&cs47l24->compr_info.lock); if (!cs47l24->compr_info.trig && - (cs47l24->core.adsp[2].fw_id == 0x7000d || - cs47l24->core.adsp[2].fw_id == 0x70036) && + cs47l24->core.adsp[2].fw_features.ez2control_trigger && cs47l24->core.adsp[2].running) { if (cs47l24->core.arizona->pdata.ez2ctrl_trigger) cs47l24->core.arizona->pdata.ez2ctrl_trigger(); diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 2c30a67d932..0d5a4828b2c 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -1892,8 +1892,7 @@ static irqreturn_t adsp2_irq(int irq, void *data) mutex_lock(&florida->compr_info.lock); if (!florida->compr_info.trig && - (florida->core.adsp[2].fw_id == 0x4000d || - florida->core.adsp[2].fw_id == 0x40036) && + florida->core.adsp[2].fw_features.ez2control_trigger && florida->core.adsp[2].running) { if (florida->core.arizona->pdata.ez2ctrl_trigger) florida->core.arizona->pdata.ez2ctrl_trigger(); diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 969b26d9567..af982cce48a 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1896,7 +1896,7 @@ static irqreturn_t adsp2_irq(int irq, void *data) struct wm5102_priv *wm5102 = data; if (wm5102->core.arizona->pdata.ez2ctrl_trigger && - wm5102->core.adsp[0].fw_id == 0x5f003) + wm5102->core.adsp[0].fw_features.ez2control_trigger) wm5102->core.arizona->pdata.ez2ctrl_trigger(); return IRQ_HANDLED; diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 8a369704652..f3d07c7b3d7 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2000,6 +2000,31 @@ int wm_adsp1_init(struct wm_adsp *adsp) } EXPORT_SYMBOL_GPL(wm_adsp1_init); +static int wm_adsp_get_features(struct wm_adsp *dsp) +{ + memset(&dsp->fw_features, 0, sizeof(dsp->fw_features)); + + switch (dsp->fw_id) { + case 0x4000d: + case 0x40036: + case 0x5f003: + case 0x7000d: + case 0x70036: + dsp->fw_features.ez2control_trigger = true; + break; + case 0x40019: + case 0x4001f: + case 0x5001f: + case 0x7001f: + dsp->fw_features.shutdown = true; + default: + break; + } + + return 0; +} + + int wm_adsp1_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) @@ -2219,6 +2244,11 @@ static void wm_adsp2_boot_work(struct work_struct *work) if (ret != 0) goto err; + /* Check firmware features */ + ret = wm_adsp_get_features(dsp); + if (ret != 0) + goto err; + dsp->running = true; return; @@ -2318,16 +2348,8 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, break; case SND_SOC_DAPM_PRE_PMD: - switch (dsp->fw_id) { - case 0x40019: - case 0x4001f: - case 0x5001f: - case 0x7001f: + if (dsp->fw_features.shutdown) wm_adsp_edac_shutdown(dsp); - break; - default: - break; - } dsp->running = false; diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index bff9fceafe4..5b15029355b 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -66,6 +66,11 @@ struct wm_adsp_fw_defs { struct wm_adsp_fw_caps *caps; }; +struct wm_adsp_fw_features { + bool shutdown:1; + bool ez2control_trigger:1; +}; + struct wm_adsp { const char *part; int num; @@ -111,6 +116,8 @@ struct wm_adsp { int num_firmwares; struct wm_adsp_fw_defs *firmwares; + struct wm_adsp_fw_features fw_features; + struct mutex *fw_lock; struct work_struct boot_work; }; From d354c4df77bc9208502338c1870fc8329351ecec Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 25 Nov 2014 10:42:47 +0000 Subject: [PATCH 0529/1167] Documentation: ASoC: arizona: Update WM8998 mux control names Change-Id: I24c42673c67e4adc2b1f87fa7152902cf9aebe58 Signed-off-by: Richard Fitzgerald --- .../sound/alsa/soc/wolfson-arizona.txt | 38 +++++++++---------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/Documentation/sound/alsa/soc/wolfson-arizona.txt b/Documentation/sound/alsa/soc/wolfson-arizona.txt index 38b6d06f368..8107f60cab9 100644 --- a/Documentation/sound/alsa/soc/wolfson-arizona.txt +++ b/Documentation/sound/alsa/soc/wolfson-arizona.txt @@ -110,33 +110,33 @@ path. A diagram of the route through the input muxes is: -Input pin ALSA control Internal signal path +Input pin ALSA control Internal signal path ------------------------------------------------------- - +-----------------+ -IN1AL ---> | | - | "IN1MUXL Input" | --> IN1L -IN1BL ---> | | - +-----------------+ + +-----------+ +IN1AL ---> "A" | | + | "IN1LMUX" | --> IN1L +IN1BL ---> "B" | | + +-----------+ - +-----------------+ -IN1AR ---> | | - | "IN1MUXR Input" | --> IN1R -IN1BR ---> | | - +-----------------+ + +-----------+ +IN1AR ---> "A" | | + | "IN1RMUX" | --> IN1R +IN1BR ---> "B" | | + +-----------+ - +-----------------+ -IN2A ---> | | - | "IN2MUX Input" | --> IN2L -IN2B ---> | | - +-----------------+ + +-----------+ +IN2A ---> "A" | | + | "IN2MUX" | --> IN2L +IN2B ---> "B" | | + +-----------+ IN1A and IN2A can be set as digital. IN1B and IN2B are analogue only. It is important to note that although the left and right paths of IN1 have -separate mux controls, these only separate for the analogue path. The setting +separate mux controls, these are only separate for analogue paths. The setting of digital/analogue applies jointly to both channels of IN1. Because of this, -if IN1A is digital _both_ the left and right mux must be set to IN1A before +if IN1A is digital _both_ the left and right mux must be set to "A" before connecting the input to any internal codec blocks. When IN1 is part of an active path the whole of IN1 will be set to digital or analogue depending on mux setting and this cannot be changed while IN1 is part of an active path. @@ -144,7 +144,7 @@ mux setting and this cannot be changed while IN1 is part of an active path. To change from a digital IN1A to an analogue IN1B follow this sequence: 1) Disconnect IN1 from the input of any codec blocks -2) Change the IN1MUXL and IN1MUXR to IN1B +2) Change the IN1MUXL and IN1MUXR to "B" 3) Connect IN1 as an input to codec blocks The input mode pdata for WM8998 is defined as: From 88377a4e827d7ad2c2dec1f9910f28600323cb8d Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 28 Oct 2014 10:59:07 +0000 Subject: [PATCH 0530/1167] Documentation: ASoC: arizona: add CS47L24 to feature list Change-Id: I5cf9c88e442320fb67c1faf93e77880c49fed226 Signed-off-by: Richard Fitzgerald --- .../sound/alsa/soc/wolfson-arizona.txt | 131 +++++++++--------- 1 file changed, 65 insertions(+), 66 deletions(-) diff --git a/Documentation/sound/alsa/soc/wolfson-arizona.txt b/Documentation/sound/alsa/soc/wolfson-arizona.txt index 8107f60cab9..685bb56ae7c 100644 --- a/Documentation/sound/alsa/soc/wolfson-arizona.txt +++ b/Documentation/sound/alsa/soc/wolfson-arizona.txt @@ -1,76 +1,75 @@ This document lists the features of the Wolfson 'Arizona' class audio hubs -supported by the kernel drivers (WM8997, WM8998, WM5102, WM8280, WM8281). +supported by the kernel drivers. Note that some features are covered by other classes of driver (extcon, regulator, etc.) and this list below shows the full set of features related to sound: '-' means not relevant for that audio hub model - WM8280 -Feature WM8997 WM8998 WM5102 WM8281 ---------------------------------------------------------------------------------- -24-bit samples Y Y Y Y -192kHz sample rate Y Y Y Y -Routing controlled via ALSA controls Y Y Y Y -Volume control on all mixer inputs Y Y Y Y -Volume control on all outputs Y Y Y Y -Mute control on all outputs Y Y Y Y -Output DRE control - Y Y Y -Output OSR control Y - Y Y -Input ramp control Y Y Y Y -Output ramp control Y Y Y Y -Route any audio input to any mixer input Y Y Y Y -Route internal signals to mixer inputs Y Y Y Y -Route audio path through ISRC Y Y Y Y -Route audio path through ASRC - Y Y Y -Route audio path through EQs Y Y Y Y -Route audio path through low/high pass filters Y Y Y Y -Route audio path through DRCs Y Y Y Y -Route audio path through ADSP cores - - Y Y -Set EQ coefficient through ALSA controls Y Y Y Y -Set low/high pass filter coeffs through ALSA controls Y Y Y Y -Set DRC coefficient through ALSA controls Y Y Y Y -Noise Gates controlled via ALSA controls Y Y Y Y -Configure inputs as analogue or digital mic [note 1] Y Y Y Y -Input mux controls [note 8] - Y - - + WM8280 +Feature WM8997 WM8998 WM5102 WM8281 CS47L24 +------------------------------------------------------------------------------ +24-bit samples Y Y Y Y Y +192kHz sample rate Y Y Y Y Y +Routing controlled via ALSA controls Y Y Y Y Y +Volume control on all mixer inputs Y Y Y Y Y +Volume control on all outputs Y Y Y Y Y +Mute control on all outputs Y Y Y Y Y +Output DRE control - Y Y Y - +Output OSR control Y - Y Y Y +Input ramp control Y Y Y Y Y +Output ramp control Y Y Y Y Y +Route any audio input to any mixer input Y Y Y Y Y +Route internal signals to mixer inputs Y Y Y Y Y +Route audio path through ISRC Y Y Y Y Y +Route audio path through ASRC - Y Y Y Y +Route audio path through EQs Y Y Y Y Y +Route audio path through LHPFs Y Y Y Y Y +Route audio path through DRCs Y Y Y Y Y +Route audio path through ADSP cores - - Y Y Y +Set EQ coefficient through ALSA controls Y Y Y Y Y +Set LHPF coeffs through ALSA controls Y Y Y Y Y +Set DRC coefficient through ALSA controls Y Y Y Y Y +Set Noise Gates through ALSA controls Y Y Y Y Y +Config inputs analogue/digital mode [note 1] Y Y Y Y - +Input HPF control - Y - Y Y +Input mux controls [note 8] - Y - - - Config analogue inputs as single-ended - or differential [note 1] Y Y Y Y -Host I2S routing to any AIF Y Y Y Y -I2S TDM (multi-channel) [note 2] Y Y Y Y -Configure TDM active slots [note 2] Y Y Y Y -Configure TDM slot size [note 2] Y Y Y Y -AEC loopback control Y Y Y Y -ANC block control - - - Y -Configure ADSP firmware for each ADSP core [note 3] - - Y Y -Runtime-configurable ADSP firmware selection [note 6] - - Y Y -Auto-load ADSP firmware when ADSP is in audio path - - Y Y -Load algorithm tuning data with firmware - - Y Y -Control firmware coefficients via ALSA controls - - Y Y -Connect Noise Generator to any mixer input Y Y Y Y -Connect Tone Generator 1/2 to any mixer input Y Y Y Y -Configure sample-rate domain frequencies [note 4] Y Y Y Y -Auto sample-rate N N N N -Speaker short-circuit protection - N N N -Use write sequencer N N N N -Codec control over SPI - - Y Y -Codec control over I2C Y Y Y Y -DAPM-based power up/down Y Y Y Y -Jack insert detection Y Y Y Y -Headset mic detection Y Y Y Y -Headset button detection Y Y Y Y -Headphone speaker impedance detection Y Y Y Y -Codec internal LDOVDD regulator control Y Y Y Y -Support for external DCVDD regulator Y Y Y Y -Build as loadable module Y Y Y Y -Configure via pdata Y Y Y Y -Configure via device tree [note 7] Y Y Y Y -Configure SYSCLK rate [note 5] Y Y Y Y -Configure ASYNCCLK rate [note 5] Y Y Y Y -Configure analogue mic bias [note 1] Y Y Y Y -Configure mapping of headset button resistance - to key event [note 1] Y Y Y Y -Support Ez2Control - - N Y -Support trace firmware - - - Y + or differential [note 1] Y Y Y Y - +Host I2S routing to any AIF Y Y Y Y Y +I2S TDM (multi-channel) [note 2] Y Y Y Y Y +Configure TDM active slots [note 2] Y Y Y Y Y +Configure TDM slot size [note 2] Y Y Y Y Y +AEC loopback control Y Y Y Y Y +ANC block control - - - Y - +Select firmware by ALSA control [note 6] - - Y Y Y +Load ADSP firmware via DAPM power-up - - Y Y Y +Load tuning data (.bin) with firmware - - Y Y Y +Expose firmware controls via ALSA - - Y Y Y +Set sample-rate domain frequencies [note 4] Y Y Y Y Y +Auto sample-rate N N N N N +Speaker short-circuit protection - N N N N +Use write sequencer N N N N N +Codec control over SPI - - Y Y Y +Codec control over I2C Y Y Y Y - +DAPM-based power up/down Y Y Y Y Y +Jack insert detection Y Y Y Y - +Headset mic detection Y Y Y Y - +Headset button detection Y Y Y Y - +Headphone speaker impedance detection Y Y Y Y - +Codec internal LDOVDD regulator control Y Y Y Y - +Support for external DCVDD regulator Y Y Y Y Y +Build as loadable module Y Y Y Y Y +Configure via pdata Y Y Y Y Y +Configure via device tree [note 7] Y Y Y Y Y +Configure SYSCLK rate [note 5] Y Y Y Y Y +Configure ASYNCCLK rate [note 5] Y Y Y Y Y +Configure analogue mic bias [note 1] Y Y Y Y - +Configure mapping of headset button + resistance to key event [note 1] Y Y Y Y - +Configure available firmwares [note 3] - - Y Y Y +Support Ez2Control - - N Y Y +Support trace firmware - - - Y N Notes: 1. Integration-time configuration. Not possible to change at runtime @@ -80,7 +79,7 @@ Notes: ascending order to the active slots - for example if the active TX slots in the I2S frame are 0, 1, and 7 then they will be mapped 0->AIFTX1 1->AIFTX2 7->AIFTX3 -3. Currently limited to set of known firmwares +3. Default firmware list can be overidden by device tree 4. Limited control of domain 2/3 frequency 5. Configured in ASoC machine driver 6. Firmware can be set by host but cannot be changed while ADSP is powered-up, From e75bf7ca38df9e849add20810511fa4fc781b110 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Tue, 11 Nov 2014 13:54:40 +0000 Subject: [PATCH 0531/1167] mfd: arizona: Add bitfields for WM8285_DSP_CLOCK1/2 Change-Id: Iaa088edf18ffaf0083c071597a5823b47028cc5c Signed-off-by: Nariman Poushin --- include/linux/mfd/arizona/registers.h | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index fe1415b1be6..23498965232 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -2791,6 +2791,29 @@ #define ARIZONA_ASYNC_SAMPLE_RATE_2_STS_SHIFT 0 /* ASYNC_SAMPLE_RATE_2_STS - [4:0] */ #define ARIZONA_ASYNC_SAMPLE_RATE_2_STS_WIDTH 5 /* ASYNC_SAMPLE_RATE_2_STS - [4:0] */ +/* + * R109 (0x120) - DSP_Clock_1 + */ +#define WM8285_DSP_CLK_FREQ_LEGACY 0x0700 /* DSP_CLK_FREQ_LEGACY - [10:8] */ +#define WM8285_DSP_CLK_FREQ_LEGACY_MASK 0x0700 /* DSP_CLK_FREQ_LEGACY - [10:8] */ +#define WM8285_DSP_CLK_FREQ_LEGACY_SHIFT 8 /* DSP_CLK_FREQ_LEGACY - [10:8] */ +#define WM8285_DSP_CLK_FREQ_LEGACY_WIDTH 3 /* DSP_CLK_FREQ_LEGACY - [10:8] */ +#define WM8285_DSP_CLK_ENA 0x0040 /* DSP_CLK_ENA */ +#define WM8285_DSP_CLK_ENA_MASK 0x0040 /* DSP_CLK_ENA */ +#define WM8285_DSP_CLK_ENA_SHIFT 6 /* DSP_CLK_ENA */ +#define WM8285_DSP_CLK_ENA_WIDTH 1 /* DSP_CLK_ENA */ +#define WM8285_DSP_CLK_SRC 0x000F /* DSP_CLK_SRC - [3:0] */ +#define WM8285_DSP_CLK_SRC_MASK 0x000F /* DSP_CLK_SRC - [3:0] */ +#define WM8285_DSP_CLK_SRC_SHIFT 0 /* DSP_CLK_SRC - [3:0] */ +#define WM8285_DSP_CLK_SRC_WIDTH 4 /* DSP_CLK_SRC - [3:0] */ + +/* + * R110 (0x122) - DSP_Clock_2 + */ +#define WM8285_DSP_CLK_FREQ_MASK 0x03FF /* DSP_CLK_FREQ - [9:0] */ +#define WM8285_DSP_CLK_FREQ_SHIFT 0 /* DSP_CLK_FREQ - [9:0] */ +#define WM8285_DSP_CLK_FREQ_WIDTH 10 /* DSP_CLK_FREQ - [9:0] */ + /* * R329 (0x149) - Output system clock */ From 5acd52c1e3018c25ee88508dfa1dce0efd87ed9e Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Fri, 14 Nov 2014 14:20:35 +0000 Subject: [PATCH 0532/1167] ASoC: wm_adsp: Remove dependencies on arizona for DSP clocking Remove the need to read the sysclk/dspclk codec registers for the adsp2 boot. Change-Id: Ia2fd9681309f442afc66f68a395c0fbb3adc0d9a Signed-off-by: Nariman Poushin --- sound/soc/codecs/arizona.c | 21 ++++++++++ sound/soc/codecs/arizona.h | 4 ++ sound/soc/codecs/cs47l24.c | 4 +- sound/soc/codecs/florida.c | 8 ++-- sound/soc/codecs/wm5102.c | 22 +++++------ sound/soc/codecs/wm8285.c | 36 +++++++++++++---- sound/soc/codecs/wm_adsp.c | 80 ++++++++++++++++++-------------------- sound/soc/codecs/wm_adsp.h | 8 ++-- 8 files changed, 112 insertions(+), 71 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 879df4f3e96..ea6ecc66ae3 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -219,6 +219,27 @@ int arizona_init_spk(struct snd_soc_codec *codec) } EXPORT_SYMBOL_GPL(arizona_init_spk); +int arizona_adsp_power_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + unsigned int v ; + int ret; + + ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &v); + if (ret != 0) { + dev_err(codec->dev, + "Failed to read SYSCLK state: %d\n", ret); + return -EIO; + } + + v = (v & ARIZONA_SYSCLK_FREQ_MASK) >> ARIZONA_SYSCLK_FREQ_SHIFT; + + return wm_adsp2_early_event(w, kcontrol, event, v); +} +EXPORT_SYMBOL_GPL(arizona_adsp_power_ev); + static const struct snd_soc_dapm_route arizona_mono_routes[] = { { "OUT1R", NULL, "OUT1L" }, { "OUT2R", NULL, "OUT2L" }, diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 23c3ca3ed98..24610bab7e3 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -348,6 +348,10 @@ extern int arizona_init_gpio(struct snd_soc_codec *codec); extern int arizona_init_mono(struct snd_soc_codec *codec); extern int arizona_init_input(struct snd_soc_codec *codec); +extern int arizona_adsp_power_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event); + extern int arizona_init_dai(struct arizona_priv *priv, int dai); int arizona_set_output_mode(struct snd_soc_codec *codec, int output, diff --git a/sound/soc/codecs/cs47l24.c b/sound/soc/codecs/cs47l24.c index 1ae80b70709..616693e1432 100644 --- a/sound/soc/codecs/cs47l24.c +++ b/sound/soc/codecs/cs47l24.c @@ -486,8 +486,8 @@ SND_SOC_DAPM_PGA("ASRC2L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2L_ENA_SHIFT, 0, SND_SOC_DAPM_PGA("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0, NULL, 0), -WM_ADSP2("DSP2", 1), -WM_ADSP2("DSP3", 2), +WM_ADSP2("DSP2", 1, arizona_adsp_power_ev), +WM_ADSP2("DSP3", 2, arizona_adsp_power_ev), SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 0d5a4828b2c..1ca2dbb5a92 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -894,10 +894,10 @@ SND_SOC_DAPM_PGA("ASRC2L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2L_ENA_SHIFT, 0, SND_SOC_DAPM_PGA("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0, NULL, 0), -WM_ADSP2("DSP1", 0), -WM_ADSP2("DSP2", 1), -WM_ADSP2("DSP3", 2), -WM_ADSP2("DSP4", 3), +WM_ADSP2("DSP1", 0, arizona_adsp_power_ev), +WM_ADSP2("DSP2", 1, arizona_adsp_power_ev), +WM_ADSP2("DSP3", 2, arizona_adsp_power_ev), +WM_ADSP2("DSP4", 3, arizona_adsp_power_ev), SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index af982cce48a..80ecddb7697 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -634,17 +634,17 @@ static int wm5102_adsp_power_ev(struct snd_soc_dapm_widget *w, unsigned int v; int ret; - switch (event) { - case SND_SOC_DAPM_PRE_PMU: - ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &v); - if (ret != 0) { - dev_err(codec->dev, - "Failed to read SYSCLK state: %d\n", ret); - return -EIO; - } + ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &v); + if (ret != 0) { + dev_err(codec->dev, + "Failed to read SYSCLK state: %d\n", ret); + return -EIO; + } - v = (v & ARIZONA_SYSCLK_FREQ_MASK) >> ARIZONA_SYSCLK_FREQ_SHIFT; + v = (v & ARIZONA_SYSCLK_FREQ_MASK) >> ARIZONA_SYSCLK_FREQ_SHIFT; + switch (event) { + case SND_SOC_DAPM_PRE_PMU: if (v >= 3) { ret = arizona_dvfs_up(arizona, ARIZONA_DVFS_ADSP1_RQ); if (ret != 0) { @@ -666,7 +666,7 @@ static int wm5102_adsp_power_ev(struct snd_soc_dapm_widget *w, break; } - return wm_adsp2_early_event(w, kcontrol, event); + return arizona_adsp_power_ev(w, kcontrol, event); } static int wm5102_out_comp_coeff_get(struct snd_kcontrol *kcontrol, @@ -1430,7 +1430,7 @@ ARIZONA_MUX_WIDGETS(ISRC2DEC2, "ISRC2DEC2"), ARIZONA_MUX_WIDGETS(ISRC2INT1, "ISRC2INT1"), ARIZONA_MUX_WIDGETS(ISRC2INT2, "ISRC2INT2"), -WM_ADSP2_E("DSP1", 0, wm5102_adsp_power_ev), +WM_ADSP2("DSP1", 0, wm5102_adsp_power_ev), SND_SOC_DAPM_OUTPUT("DSP Virtual Output"), diff --git a/sound/soc/codecs/wm8285.c b/sound/soc/codecs/wm8285.c index c621073f94a..2ded8585382 100644 --- a/sound/soc/codecs/wm8285.c +++ b/sound/soc/codecs/wm8285.c @@ -224,6 +224,28 @@ static int wm8285_frf_bytes_put(struct snd_kcontrol *kcontrol, return ret; } +static int wm8285_adsp_power_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_codec *codec = w->codec; + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; + unsigned int freq; + int ret; + + ret = regmap_read(arizona->regmap, WM8285_DSP_CLOCK_1, &freq); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read WM8285_DSP_CLOCK_1: %d\n", ret); + return ret; + } + + freq &= WM8285_DSP_CLK_FREQ_LEGACY_MASK; + freq >>= WM8285_DSP_CLK_FREQ_LEGACY_SHIFT; + + return wm_adsp2_early_event(w, kcontrol, event, freq); +} + static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); @@ -1006,13 +1028,13 @@ SND_SOC_DAPM_PGA("ASRC2IN2L", WM8285_ASRC2_ENABLE, WM8285_ASRC2_IN2L_ENA_SHIFT, SND_SOC_DAPM_PGA("ASRC2IN2R", WM8285_ASRC2_ENABLE, WM8285_ASRC2_IN2R_ENA_SHIFT, 0, NULL, 0), -WM_ADSP2("DSP1", 0), -WM_ADSP2("DSP2", 1), -WM_ADSP2("DSP3", 2), -WM_ADSP2("DSP4", 3), -WM_ADSP2("DSP5", 4), -WM_ADSP2("DSP6", 5), -WM_ADSP2("DSP7", 6), +WM_ADSP2("DSP1", 0, wm8285_adsp_power_ev), +WM_ADSP2("DSP2", 1, wm8285_adsp_power_ev), +WM_ADSP2("DSP3", 2, wm8285_adsp_power_ev), +WM_ADSP2("DSP4", 3, wm8285_adsp_power_ev), +WM_ADSP2("DSP5", 4, wm8285_adsp_power_ev), +WM_ADSP2("DSP6", 5, wm8285_adsp_power_ev), +WM_ADSP2("DSP7", 6, wm8285_adsp_power_ev), SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index f3d07c7b3d7..70e5ff32d6a 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2176,47 +2176,6 @@ static void wm_adsp2_boot_work(struct work_struct *work) struct wm_adsp, boot_work); int ret; - unsigned int val, mask; - - switch (dsp->rev) { - case 0: - /* - * For simplicity set the DSP clock rate to be the - * SYSCLK rate rather than making it configurable. - */ - ret = regmap_read(dsp->regmap, ARIZONA_SYSTEM_CLOCK_1, &val); - if (ret != 0) { - adsp_err(dsp, "Failed to read SYSCLK state: %d\n", ret); - return; - } - val = (val & ARIZONA_SYSCLK_FREQ_MASK) - >> ARIZONA_SYSCLK_FREQ_SHIFT; - - ret = regmap_update_bits(dsp->regmap, - dsp->base + ADSP2_CLOCKING, - ADSP2_CLK_SEL_MASK, val); - if (ret != 0) { - adsp_err(dsp, "Failed to set clock rate: %d\n", ret); - return; - } - break; - default: - mutex_lock(&dsp->rate_lock); - - mask = ADSP2V2_CLK_SEL_MASK | ADSP2V2_RATE_MASK; - val = WM8285_DSP_CLK_147MHZ << ADSP2V2_CLK_SEL_SHIFT; - val |= dsp->rate_cache << ADSP2V2_RATE_SHIFT; - - ret = regmap_update_bits(dsp->regmap, dsp->base, mask, val); - if (ret != 0) { - adsp_err(dsp, "Failed to set DSP_CLK rate: %d\n", ret); - mutex_unlock(&dsp->rate_lock); - return; - } - - mutex_unlock(&dsp->rate_lock); - break; - } ret = wm_adsp2_ena(dsp); if (ret != 0) @@ -2258,8 +2217,44 @@ static void wm_adsp2_boot_work(struct work_struct *work) ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0); } +void wm_adsp2_set_dspclk(struct wm_adsp *dsp, unsigned int freq) +{ + int ret; + int mask; + + switch (dsp->rev) { + case 0: + ret = regmap_update_bits(dsp->regmap, + dsp->base + ADSP2_CLOCKING, + ADSP2_CLK_SEL_MASK, + freq << ADSP2_CLK_SEL_SHIFT); + if (ret != 0) { + adsp_err(dsp, "Failed to set clock rate: %d\n", ret); + return; + } + break; + default: + mutex_lock(&dsp->rate_lock); + + mask = ADSP2V2_CLK_SEL_MASK | ADSP2V2_RATE_MASK; + freq <<= ADSP2V2_CLK_SEL_SHIFT; + freq |= dsp->rate_cache << ADSP2V2_RATE_SHIFT; + + ret = regmap_update_bits(dsp->regmap, dsp->base, mask, freq); + if (ret != 0) { + adsp_err(dsp, "Failed to set DSP_CLK rate: %d\n", ret); + mutex_unlock(&dsp->rate_lock); + return; + } + + mutex_unlock(&dsp->rate_lock); + break; + } +} + int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) + struct snd_kcontrol *kcontrol, int event, + unsigned int freq) { struct snd_soc_codec *codec = w->codec; struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); @@ -2272,6 +2267,7 @@ int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_PRE_PMU: + wm_adsp2_set_dspclk(dsp, freq); queue_work(system_unbound_wq, &dsp->boot_work); break; default: diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 5b15029355b..03c91b47a49 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -127,7 +127,7 @@ struct wm_adsp { .shift = num, .event = wm_adsp1_event, \ .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD } -#define WM_ADSP2_E(wname, num, event_fn) \ +#define WM_ADSP2(wname, num, event_fn) \ { .id = snd_soc_dapm_dai_link, .name = wname " Preloader", \ .reg = SND_SOC_NOPM, .shift = num, .event = event_fn, \ .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD }, \ @@ -135,9 +135,6 @@ struct wm_adsp { .reg = SND_SOC_NOPM, .shift = num, .event = wm_adsp2_event, \ .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD } -#define WM_ADSP2(wname, num) \ - WM_ADSP2_E(wname, num, wm_adsp2_early_event) - extern const struct snd_kcontrol_new wm_adsp1_fw_controls[]; extern const struct snd_kcontrol_new wm_adsp2_fw_controls[]; extern const struct snd_kcontrol_new wm_adsp2v2_fw_controls[]; @@ -147,7 +144,8 @@ int wm_adsp2_init(struct wm_adsp *adsp, struct mutex *fw_lock); int wm_adsp1_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event); + struct snd_kcontrol *kcontrol, int event, + unsigned int freq); int wm_adsp2_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); From 885ac583ad32be9d8b1182d1092f253bacfe9983 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 25 Nov 2014 16:32:59 +0000 Subject: [PATCH 0533/1167] ASoC: wm_adsp: Change DSP Rate if it differs from current value Current rate was being compared with the index pointing into a list of enumerations, this patch fixes it by comparing it with actual value instead of the index Change-Id: I99cf3b94d5b5363fb7e4dcaf8aa35da75c2bd936 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/wm_adsp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 70e5ff32d6a..41735192ff8 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -520,7 +520,7 @@ static int wm_adsp2v2_rate_put(struct snd_kcontrol *kcontrol, mutex_lock(&adsp->rate_lock); - if (item != adsp->rate_cache) { + if (e->values[item] != adsp->rate_cache) { val = e->values[item]; adsp->rate_cache = val; From 7969777604c798cda1419a651d5cc6979b9aec3b Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Thu, 27 Nov 2014 11:04:45 +0000 Subject: [PATCH 0534/1167] mfd: wm8285: Fixup register defaults for ASRC2 mixers Change-Id: Ide0e2dc82044cd2a1fbd19741b410be6bd93c6b2 Signed-off-by: Nariman Poushin --- drivers/mfd/wm8285-tables.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mfd/wm8285-tables.c b/drivers/mfd/wm8285-tables.c index b4a6318392e..d3b9858cb54 100644 --- a/drivers/mfd/wm8285-tables.c +++ b/drivers/mfd/wm8285-tables.c @@ -1012,6 +1012,10 @@ static const struct reg_default wm8285_reg_default[] = { { 0x00000a88, 0x0000 }, { 0x00000a90, 0x0000 }, { 0x00000a98, 0x0000 }, + { 0x00000aa0, 0x0000 }, + { 0x00000aa8, 0x0000 }, + { 0x00000ab0, 0x0000 }, + { 0x00000ab8, 0x0000 }, { 0x00000b00, 0x0000 }, { 0x00000b08, 0x0000 }, { 0x00000b10, 0x0000 }, From f57c55741b641f5075938788f84c65bbfc521067 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 25 Nov 2014 16:24:53 +0000 Subject: [PATCH 0535/1167] mfd: arizona: fix irq polarity for wm8285 The register having irq polarity settings is different for wm8285, this patch fixes the register for wm8285. Change-Id: Iea456deb7315b7ec038f477cd41e64759d104151 Signed-off-by: Nikesh Oswal --- drivers/mfd/arizona-irq.c | 4 +++- drivers/mfd/wm8285-tables.c | 2 ++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index ecdf7a88d4d..3b715d70b0c 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -200,6 +200,7 @@ int arizona_irq_init(struct arizona *arizona) const struct regmap_irq_chip *aod, *irq; bool ctrlif_error = true; struct irq_data *irq_data; + unsigned int irq_ctrl_reg = ARIZONA_IRQ_CTRL_1; switch (arizona->type) { #ifdef CONFIG_MFD_WM5102 @@ -234,6 +235,7 @@ int arizona_irq_init(struct arizona *arizona) irq = NULL; ctrlif_error = false; + irq_ctrl_reg = WM8285_IRQ1_CTRL; break; #endif #ifdef CONFIG_MFD_CS47L24 @@ -297,7 +299,7 @@ int arizona_irq_init(struct arizona *arizona) if (arizona->pdata.irq_flags & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_RISING)) { - ret = regmap_update_bits(arizona->regmap, ARIZONA_IRQ_CTRL_1, + ret = regmap_update_bits(arizona->regmap, irq_ctrl_reg, ARIZONA_IRQ_POL, 0); if (ret != 0) { dev_err(arizona->dev, "Couldn't set IRQ polarity: %d\n", diff --git a/drivers/mfd/wm8285-tables.c b/drivers/mfd/wm8285-tables.c index d3b9858cb54..c34eac30139 100644 --- a/drivers/mfd/wm8285-tables.c +++ b/drivers/mfd/wm8285-tables.c @@ -1458,6 +1458,7 @@ static const struct reg_default wm8285_reg_default[] = { { 0x0000184d, 0xffff }, /* R6221 (0x184D) - IRQ1 Mask 14 */ { 0x0000184e, 0xffff }, /* R6222 (0x184E) - IRQ1 Mask 15 */ { 0x00001948, 0xffff }, /* R6472 (0x1948) - IRQ2 Mask 9 */ + { 0x00001a80, 0x0400 }, /* R6784 (0x1A80) - IRQ1 CTRL */ }; static bool wm8285_is_adsp_memory(struct device *dev, unsigned int reg) @@ -2815,6 +2816,7 @@ static bool wm8285_16bit_readable_register(struct device *dev, unsigned int reg) case WM8285_IRQ2_STATUS_9: case WM8285_IRQ2_MASK_9: case WM8285_IRQ2_RAW_STATUS_9: + case WM8285_IRQ1_CTRL: return true; default: return false; From 6fc9476d62377343e20476d76eb00909fd4fed18 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 25 Nov 2014 16:45:55 +0000 Subject: [PATCH 0536/1167] mfd: arizona: Clear wakeup sources only for chips that supports it Change-Id: I6e56ff966af0a5df7f9f2e96929aec697dc42e29 Signed-off-by: Nikesh Oswal --- drivers/mfd/arizona-irq.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index 3b715d70b0c..9b19906d7e1 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -269,8 +269,19 @@ int arizona_irq_init(struct arizona *arizona) return -EINVAL; } - /* Disable all wake sources by default */ - regmap_write(arizona->regmap, ARIZONA_WAKE_CONTROL, 0); + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8998: + case WM1814: + case WM8280: + /* Disable all wake sources by default */ + regmap_write(arizona->regmap, ARIZONA_WAKE_CONTROL, 0); + break; + default: + break; + } /* Read the flags from the interrupt controller if not specified */ if (!arizona->pdata.irq_flags) { From 4947ab49d05ef81d677901f7f48bd1ce06ab770a Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Thu, 27 Nov 2014 15:00:06 +0000 Subject: [PATCH 0537/1167] mfd: wm8285: Add WM8285_ASRC{1,2}_RATE2 as readable Change-Id: I303549d536fb2a11a0f3fc4228eb189c638f30ad Signed-off-by: Nariman Poushin --- drivers/mfd/wm8285-tables.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mfd/wm8285-tables.c b/drivers/mfd/wm8285-tables.c index c34eac30139..4a7b033fe9d 100644 --- a/drivers/mfd/wm8285-tables.c +++ b/drivers/mfd/wm8285-tables.c @@ -2592,9 +2592,11 @@ static bool wm8285_16bit_readable_register(struct device *dev, unsigned int reg) case WM8285_ASRC1_ENABLE: case WM8285_ASRC1_STATUS: case WM8285_ASRC1_RATE1: + case WM8285_ASRC1_RATE2: case WM8285_ASRC2_ENABLE: case WM8285_ASRC2_STATUS: case WM8285_ASRC2_RATE1: + case WM8285_ASRC2_RATE2: case ARIZONA_ISRC_1_CTRL_1: case ARIZONA_ISRC_1_CTRL_2: case ARIZONA_ISRC_1_CTRL_3: From 444dced4734eb9de08a0527a40a11251199746f2 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Thu, 27 Nov 2014 16:45:52 +0000 Subject: [PATCH 0538/1167] ASoC: wm8285: Add ASRC{1,2}_RATE2 controls Change-Id: Id582de6d7698f5588fa31c46d4859d713d62509a Signed-off-by: Nariman Poushin --- sound/soc/codecs/arizona.c | 37 +++++++++++++++++++++++++++++-------- sound/soc/codecs/arizona.h | 7 ++++--- sound/soc/codecs/wm8285.c | 7 +++++-- 3 files changed, 38 insertions(+), 13 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index ea6ecc66ae3..c2fbdb93eae 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -960,11 +960,18 @@ const struct soc_enum arizona_sample_rate[] = { ARIZONA_SAMPLE_RATE_ENUM_SIZE, arizona_sample_rate_text, arizona_sample_rate_val), + SOC_VALUE_ENUM_SINGLE(ARIZONA_ASYNC_SAMPLE_RATE_2, + ARIZONA_ASYNC_SAMPLE_RATE_2_SHIFT, 0x1f, + ARIZONA_SAMPLE_RATE_ENUM_SIZE, + arizona_sample_rate_text, + arizona_sample_rate_val), + }; EXPORT_SYMBOL_GPL(arizona_sample_rate); const char *arizona_rate_text[ARIZONA_RATE_ENUM_SIZE] = { - "SYNCCLK rate 1", "SYNCCLK rate 2", "SYNCCLK rate 3", "ASYNCCLK rate", + "SYNCCLK rate 1", "SYNCCLK rate 2", "SYNCCLK rate 3", + "ASYNCCLK rate", "ASYNCCLK rate 2", }; EXPORT_SYMBOL_GPL(arizona_rate_text); @@ -1003,7 +1010,7 @@ const struct soc_enum arizona_spdif_rate = EXPORT_SYMBOL_GPL(arizona_spdif_rate); const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE] = { - 0, 1, 2, 8, + 0x0, 0x1, 0x2, 0x8, 0x9, }; EXPORT_SYMBOL_GPL(arizona_rate_val); @@ -1056,19 +1063,33 @@ const struct soc_enum arizona_asrc_rate1 = arizona_rate_text, arizona_rate_val); EXPORT_SYMBOL_GPL(arizona_asrc_rate1); -const struct soc_enum wm8285_asrc1_rate1 = +const struct soc_enum wm8285_asrc1_rate[] = { SOC_VALUE_ENUM_SINGLE(WM8285_ASRC1_RATE1, WM8285_ASRC1_RATE1_SHIFT, 0xf, ARIZONA_SYNC_RATE_ENUM_SIZE, - arizona_rate_text, arizona_rate_val); -EXPORT_SYMBOL_GPL(wm8285_asrc1_rate1); + arizona_rate_text, arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(WM8285_ASRC1_RATE2, + WM8285_ASRC1_RATE1_SHIFT, 0xf, + ARIZONA_ASYNC_RATE_ENUM_SIZE, + arizona_rate_text + ARIZONA_SYNC_RATE_ENUM_SIZE, + arizona_rate_val + ARIZONA_SYNC_RATE_ENUM_SIZE), -const struct soc_enum wm8285_asrc2_rate1 = +}; +EXPORT_SYMBOL_GPL(wm8285_asrc1_rate); + +const struct soc_enum wm8285_asrc2_rate[] = { SOC_VALUE_ENUM_SINGLE(WM8285_ASRC2_RATE1, WM8285_ASRC2_RATE1_SHIFT, 0xf, ARIZONA_SYNC_RATE_ENUM_SIZE, - arizona_rate_text, arizona_rate_val); -EXPORT_SYMBOL_GPL(wm8285_asrc2_rate1); + arizona_rate_text, arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(WM8285_ASRC2_RATE2, + WM8285_ASRC2_RATE2_SHIFT, 0xf, + ARIZONA_ASYNC_RATE_ENUM_SIZE, + arizona_rate_text + ARIZONA_SYNC_RATE_ENUM_SIZE, + arizona_rate_val + ARIZONA_SYNC_RATE_ENUM_SIZE), + +}; +EXPORT_SYMBOL_GPL(wm8285_asrc2_rate); static const char *arizona_vol_ramp_text[] = { "0ms/6dB", "0.5ms/6dB", "1ms/6dB", "2ms/6dB", "4ms/6dB", "8ms/6dB", diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 24610bab7e3..6d7dfa68555 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -243,8 +243,9 @@ extern int arizona_v2_mixer_values[ARIZONA_V2_NUM_MIXER_INPUTS]; .mask = ~ARIZONA_EQ1_B1_MODE }) } #define WM8285_OSR_ENUM_SIZE 5 -#define ARIZONA_RATE_ENUM_SIZE 4 +#define ARIZONA_RATE_ENUM_SIZE 5 #define ARIZONA_SYNC_RATE_ENUM_SIZE 3 +#define ARIZONA_ASYNC_RATE_ENUM_SIZE 2 #define ARIZONA_SAMPLE_RATE_ENUM_SIZE 14 #define ARIZONA_ANC_INPUT_ENUM_SIZE 19 #define WM8280_ANC_INPUT_ENUM_SIZE 13 @@ -259,8 +260,8 @@ extern const struct soc_enum arizona_sample_rate[]; extern const struct soc_enum arizona_isrc_fsl[]; extern const struct soc_enum arizona_isrc_fsh[]; extern const struct soc_enum arizona_asrc_rate1; -extern const struct soc_enum wm8285_asrc1_rate1; -extern const struct soc_enum wm8285_asrc2_rate1; +extern const struct soc_enum wm8285_asrc1_rate[]; +extern const struct soc_enum wm8285_asrc2_rate[]; extern const struct soc_enum arizona_input_rate; extern const struct soc_enum arizona_output_rate; extern const struct soc_enum arizona_fx_rate; diff --git a/sound/soc/codecs/wm8285.c b/sound/soc/codecs/wm8285.c index 2ded8585382..fd93324937b 100644 --- a/sound/soc/codecs/wm8285.c +++ b/sound/soc/codecs/wm8285.c @@ -494,6 +494,7 @@ SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), SOC_VALUE_ENUM("Sample Rate 2", arizona_sample_rate[0]), SOC_VALUE_ENUM("Sample Rate 3", arizona_sample_rate[1]), +SOC_VALUE_ENUM("ASYNC Sample Rate 2", arizona_sample_rate[2]), SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), @@ -503,8 +504,10 @@ SOC_VALUE_ENUM("ISRC1 FSH", arizona_isrc_fsh[0]), SOC_VALUE_ENUM("ISRC2 FSH", arizona_isrc_fsh[1]), SOC_VALUE_ENUM("ISRC3 FSH", arizona_isrc_fsh[2]), SOC_VALUE_ENUM("ISRC4 FSH", arizona_isrc_fsh[3]), -SOC_VALUE_ENUM("ASRC1 Rate 1", wm8285_asrc1_rate1), -SOC_VALUE_ENUM("ASRC2 Rate 1", wm8285_asrc2_rate1), +SOC_VALUE_ENUM("ASRC1 Rate 1", wm8285_asrc1_rate[0]), +SOC_VALUE_ENUM("ASRC1 Rate 2", wm8285_asrc1_rate[1]), +SOC_VALUE_ENUM("ASRC2 Rate 1", wm8285_asrc2_rate[0]), +SOC_VALUE_ENUM("ASRC2 Rate 2", wm8285_asrc2_rate[1]), ARIZONA_MIXER_CONTROLS("DSP1L", ARIZONA_DSP1LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("DSP1R", ARIZONA_DSP1RMIX_INPUT_1_SOURCE), From e1699edb6d303870d0a3a25c2e303501a789c5c6 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 3 Dec 2014 13:59:08 +0000 Subject: [PATCH 0539/1167] ASoC: wm8285: Fix transposed XM and YM on DSP1 The addresses for XM and YM were transposed on DSP1, put them the correct way around. Change-Id: I99dae61769c495e116a4ca36fe8c9d14f6c79e78 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm8285.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/wm8285.c b/sound/soc/codecs/wm8285.c index fd93324937b..e613f1bfa67 100644 --- a/sound/soc/codecs/wm8285.c +++ b/sound/soc/codecs/wm8285.c @@ -73,8 +73,8 @@ struct wm8285_priv { static const struct wm_adsp_region wm8285_dsp1_regions[] = { { .type = WMFW_ADSP2_PM, .base = 0x080000 }, { .type = WMFW_ADSP2_ZM, .base = 0x0e0000 }, - { .type = WMFW_ADSP2_XM, .base = 0x0c0000 }, - { .type = WMFW_ADSP2_YM, .base = 0x0a0000 }, + { .type = WMFW_ADSP2_XM, .base = 0x0a0000 }, + { .type = WMFW_ADSP2_YM, .base = 0x0c0000 }, }; static const struct wm_adsp_region wm8285_dsp2_regions[] = { From be668ebc653eb75bde8b866d69679c6e87b620dd Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 25 Nov 2014 17:46:41 +0000 Subject: [PATCH 0540/1167] ASoC: arizona: Set outdiv to 3 for FLL of WM8285 Change-Id: Ib9b6470a4acf1f0113c8cbddc65927763a8554c3 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 9 +++++++-- sound/soc/codecs/arizona.h | 2 ++ sound/soc/codecs/wm8285.c | 5 ++++- 3 files changed, 13 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index c2fbdb93eae..4c2ee9ff677 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -3227,10 +3227,10 @@ int arizona_set_fll(struct arizona_fll *fll, int source, return 0; if (Fout) { - div = ARIZONA_FLL_MIN_OUTDIV; + div = fll->min_outdiv; while (Fout * div < ARIZONA_FLL_MIN_FVCO * fll->vco_mult) { div++; - if (div > ARIZONA_FLL_MAX_OUTDIV) { + if (div > fll->max_outdiv) { arizona_fll_err(fll, "No FLL_OUTDIV for Fout=%uHz\n", Fout); @@ -3277,6 +3277,11 @@ int arizona_init_fll(struct arizona *arizona, int id, int base, int lock_irq, fll->arizona = arizona; fll->sync_src = ARIZONA_FLL_SRC_NONE; + if (!fll->min_outdiv) + fll->min_outdiv = ARIZONA_FLL_MIN_OUTDIV; + if (!fll->max_outdiv) + fll->max_outdiv = ARIZONA_FLL_MAX_OUTDIV; + /* Configure default refclk to 32kHz if we have one */ regmap_read(arizona->regmap, ARIZONA_CLOCK_32K_1, &val); switch (val & ARIZONA_CLK_32K_SRC_MASK) { diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 6d7dfa68555..7a6f6e646a3 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -326,6 +326,8 @@ struct arizona_fll { struct completion ok; unsigned int fvco; + int min_outdiv; + int max_outdiv; int outdiv; unsigned int fout; int sync_src; diff --git a/sound/soc/codecs/wm8285.c b/sound/soc/codecs/wm8285.c index e613f1bfa67..8739cbb72ef 100644 --- a/sound/soc/codecs/wm8285.c +++ b/sound/soc/codecs/wm8285.c @@ -2601,8 +2601,11 @@ static int wm8285_probe(struct platform_device *pdev) return ret; } - for (i = 0; i < ARRAY_SIZE(wm8285->fll); i++) + for (i = 0; i < ARRAY_SIZE(wm8285->fll); i++) { wm8285->fll[i].vco_mult = 3; + wm8285->fll[i].min_outdiv = 3; + wm8285->fll[i].max_outdiv = 3; + } arizona_init_fll(arizona, 1, ARIZONA_FLL1_CONTROL_1 - 1, ARIZONA_IRQ_FLL1_LOCK, ARIZONA_IRQ_FLL1_CLOCK_OK, From e2abd4cd1cf1c1cba191ce2bc81333a73b7a6224 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 2 Dec 2014 16:17:10 +0000 Subject: [PATCH 0541/1167] input: arizona-haptics: Fix potential NULL-dereferences In a couple of places the code was checking the dapm pointer for NULL after it had already been dereferenced. Change-Id: If6bf91cbd57aca9f737dd03f3edd806d76200c6b Signed-off-by: Richard Fitzgerald --- drivers/input/misc/arizona-haptics.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/input/misc/arizona-haptics.c b/drivers/input/misc/arizona-haptics.c index 7a04f54ef96..c3292522437 100644 --- a/drivers/input/misc/arizona-haptics.c +++ b/drivers/input/misc/arizona-haptics.c @@ -37,7 +37,7 @@ static void arizona_haptics_work(struct work_struct *work) struct arizona_haptics, work); struct arizona *arizona = haptics->arizona; - struct mutex *dapm_mutex = &arizona->dapm->card->dapm_mutex; + struct mutex *dapm_mutex; int ret; if (!haptics->arizona->dapm) { @@ -45,6 +45,8 @@ static void arizona_haptics_work(struct work_struct *work) return; } + dapm_mutex = &arizona->dapm->card->dapm_mutex; + if (haptics->intensity) { ret = regmap_update_bits(arizona->regmap, ARIZONA_HAPTICS_PHASE_2_INTENSITY, @@ -155,16 +157,16 @@ static int arizona_haptics_play(struct input_dev *input, void *data, static void arizona_haptics_close(struct input_dev *input) { struct arizona_haptics *haptics = input_get_drvdata(input); - struct mutex *dapm_mutex = &haptics->arizona->dapm->card->dapm_mutex; + struct mutex *dapm_mutex; cancel_work_sync(&haptics->work); - mutex_lock_nested(dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); - - if (haptics->arizona->dapm) + if (haptics->arizona->dapm) { + dapm_mutex = &haptics->arizona->dapm->card->dapm_mutex; + mutex_lock_nested(dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); snd_soc_dapm_disable_pin(haptics->arizona->dapm, "HAPTICS"); - - mutex_unlock(dapm_mutex); + mutex_unlock(dapm_mutex); + } } static int arizona_haptics_probe(struct platform_device *pdev) From 75012c668f326c1aa97d96351d39862ea6834b87 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 3 Dec 2014 15:49:41 +0000 Subject: [PATCH 0542/1167] Documentation: ASoC: arizona: Add description of firmware loading Change-Id: I61bb254e7993f4d6e8d8d5186a6fd7c6cb76f375 Signed-off-by: Richard Fitzgerald --- .../sound/alsa/soc/wolfson-arizona.txt | 44 +++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/Documentation/sound/alsa/soc/wolfson-arizona.txt b/Documentation/sound/alsa/soc/wolfson-arizona.txt index 685bb56ae7c..55fb4200ce6 100644 --- a/Documentation/sound/alsa/soc/wolfson-arizona.txt +++ b/Documentation/sound/alsa/soc/wolfson-arizona.txt @@ -160,3 +160,47 @@ The input mode pdata for WM8998 is defined as: ARIZONA_INMODE_DMIC (2) IN2A digital, IN2B analogue differential ARIZONA_INMODE_DMIC | ARIZONA_INMODE_SE (3) IN2A digital, IN2B analogue single-ended + +How firmwares are loaded +======================== +The driver exposes an ALSA control to set the firmware for each ADSP on the +codec. These are named: + + DSP1 Firmware + DSP2 Firmware + ... etc. + +The control is an enumeration of the available firmwares by function. It does +not directly set the actual filename of the firmware to be loaded. The mapping +between control values and actual firmware filename can be found in the file +sound/soc/codecs/wm_adsp.c + +Setting this control tells the driver what firmware to load WHEN THE ADSP IS +NEXT POWERED UP. Setting the control does not force the firmware to be loaded +immediately, nor does it reboot the ADSP if it is currently running a different +firmware. + +To load a firmware, or to reboot the ADSP with different firmware you must: + - Disconnect the ADSP from any active audio path so that it will be powered-down + - Set the firmware control to the firmware you want to load + - Connect the ADSP to an active audio path so it will be powered-up + +Firmware files can have an associated file called a "bin file". This has the +same name as the firmware file, but with the extension .bin, and goes in the +same directory as the firmware file. The bin file contains settings to be +patched in the ADSP memory after the firmware has been loaded. When the driver +loads a firmware it will look for a bin file and if found will apply the patches +from that bin file. + +The purpose of the bin file is to allow tuning data to be applied to the firmware +without the need to rebuild the firmware to include this data. For example, +some audio algorithms must be tuned to the acoustic properties of the enclosure +the microphones or speakers are in - it would be impractical to build a new +firmware for each device with its unique parameters; instead the device is tuned +and the tuning data is put into the bin file. + +The bin file is not intended for setting parameters that are runtime-modifiable, +such as volume controls, since the bin file is a one-shot set of parameters +that are patched when the firmware is loaded. Runtime modifiable controls should +be exposed by the firmware as such and the driver will create ALSA controls for +them. From 076eb28dec0bbdf66c12a919fb644acb58fa7a53 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 28 Nov 2014 10:44:28 +0000 Subject: [PATCH 0543/1167] ASoC: wm5102: Add input and output rate controls Change-Id: I1f719234a7e9324f0a0eaf4730826f88a8d19dd6 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm5102.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 80ecddb7697..3f42af3b4a0 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -960,6 +960,9 @@ SND_SOC_BYTES_EXT("Output Compensation Coefficient", 2, SOC_SINGLE_EXT("Output Compensation Switch", 0, 0, 1, 0, wm5102_out_comp_switch_get, wm5102_out_comp_switch_put), +SOC_VALUE_ENUM("Output Rate 1", arizona_output_rate), +SOC_VALUE_ENUM("In Rate", arizona_input_rate), + WM5102_NG_SRC("HPOUT1L", ARIZONA_NOISE_GATE_SELECT_1L), WM5102_NG_SRC("HPOUT1R", ARIZONA_NOISE_GATE_SELECT_1R), WM5102_NG_SRC("HPOUT2L", ARIZONA_NOISE_GATE_SELECT_2L), From 5d1fca040d15c43c918fcb5135b86f3e01c7c52f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 8 Dec 2014 09:48:18 +0000 Subject: [PATCH 0544/1167] mfd: wm8285: Correct base address for YM on DSP3 Change-Id: Id5553b2db8ddcde21b723bb4eb9c39c142b8bdcb Signed-off-by: Charles Keepax --- drivers/mfd/wm8285-tables.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/wm8285-tables.c b/drivers/mfd/wm8285-tables.c index 4a7b033fe9d..ad49b2dc26e 100644 --- a/drivers/mfd/wm8285-tables.c +++ b/drivers/mfd/wm8285-tables.c @@ -1475,7 +1475,7 @@ static bool wm8285_is_adsp_memory(struct device *dev, unsigned int reg) (reg >= 0x180000 && reg <= 0x18effe) || (reg >= 0x1a0000 && reg <= 0x1b1ffe) || (reg >= 0x1b6000 && reg <= 0x1b7ffe) || - (reg >= 0x1c8000 && reg <= 0x1cbffe) || + (reg >= 0x1c0000 && reg <= 0x1cbffe) || (reg >= 0x1e0000 && reg <= 0x1e1ffe) || (reg >= 0x200000 && reg <= 0x208ffe) || (reg >= 0x220000 && reg <= 0x231ffe) || From cbeaa5320795d9db87fc4918a3ef0431665f9dc1 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 8 Dec 2014 09:48:43 +0000 Subject: [PATCH 0545/1167] ASoC: wm8285: Correct base address for YM on DSP3 Change-Id: I4505847c78cddc199565b91724476870ae7c158a Signed-off-by: Charles Keepax --- sound/soc/codecs/wm8285.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm8285.c b/sound/soc/codecs/wm8285.c index 8739cbb72ef..2e10a6e42a2 100644 --- a/sound/soc/codecs/wm8285.c +++ b/sound/soc/codecs/wm8285.c @@ -88,7 +88,7 @@ static const struct wm_adsp_region wm8285_dsp3_regions[] = { { .type = WMFW_ADSP2_PM, .base = 0x180000 }, { .type = WMFW_ADSP2_ZM, .base = 0x1e0000 }, { .type = WMFW_ADSP2_XM, .base = 0x1a0000 }, - { .type = WMFW_ADSP2_YM, .base = 0x1c8000 }, + { .type = WMFW_ADSP2_YM, .base = 0x1c0000 }, }; static const struct wm_adsp_region wm8285_dsp4_regions[] = { From 4e3bc78001aef4315fcb7ce6c70882d889f6438c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 8 Dec 2014 17:27:11 +0000 Subject: [PATCH 0546/1167] switch: arizona: Set jack detect enables and debounces for wm8285 Change-Id: I58e242916b83191c88db84f22e7d98bb7218a654 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 38 +++++++++++++++++++++++++++++---- 1 file changed, 34 insertions(+), 4 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index eb411627ed2..317422d2042 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1761,6 +1761,8 @@ static irqreturn_t arizona_jackdet(int irq, void *data) default: reg = WM8285_INTERRUPT_DEBOUNCE_7; mask = WM8285_MICD_CLAMP_DB | WM8285_JD1_DB; + if (arizona->pdata.jd_gpio5) + mask |= WM8285_JD2_DB; break; } @@ -2167,6 +2169,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) unsigned int reg; int jack_irq_fall, jack_irq_rise; int ret, mode, i, j; + int debounce_reg, debounce_val, analog_val; if (!arizona->dapm || !arizona->dapm->card) return -EPROBE_DEFER; @@ -2466,10 +2469,37 @@ static int arizona_extcon_probe(struct platform_device *pdev) } arizona_clk32k_enable(arizona); - regmap_update_bits(arizona->regmap, ARIZONA_JACK_DETECT_DEBOUNCE, - ARIZONA_JD1_DB, ARIZONA_JD1_DB); + + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8280: + case WM8998: + case WM1814: + case WM1831: + case CS47L24: + debounce_reg = ARIZONA_JACK_DETECT_DEBOUNCE; + debounce_val = ARIZONA_JD1_DB; + analog_val = ARIZONA_JD1_ENA; + break; + default: + debounce_reg = WM8285_INTERRUPT_DEBOUNCE_7; + + if (arizona->pdata.jd_gpio5) { + debounce_val = WM8285_JD1_DB | WM8285_JD2_DB; + analog_val = ARIZONA_JD1_ENA | ARIZONA_JD2_ENA; + } else { + debounce_val = WM8285_JD1_DB; + analog_val = ARIZONA_JD1_ENA; + } + break; + }; + + regmap_update_bits(arizona->regmap, debounce_reg, + debounce_val, debounce_val); regmap_update_bits(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, - ARIZONA_JD1_ENA, ARIZONA_JD1_ENA); + analog_val, analog_val); ret = regulator_allow_bypass(info->micvdd, true); if (ret != 0) @@ -2553,7 +2583,7 @@ static int arizona_extcon_remove(struct platform_device *pdev) arizona_free_irq(arizona, jack_irq_fall, info); cancel_delayed_work_sync(&info->hpdet_work); regmap_update_bits(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, - ARIZONA_JD1_ENA, 0); + ARIZONA_JD1_ENA | ARIZONA_JD2_ENA, 0); arizona_clk32k_disable(arizona); device_remove_file(&pdev->dev, &dev_attr_hp_impedance); From d0135df07ac1c02470f7850c36a041b7dd46a4c7 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 8 Dec 2014 18:38:16 +0000 Subject: [PATCH 0547/1167] ASoC: arizona: Add function to get DSP regmap Change-Id: I1fcdc3864ff3f3cc1c4a61f64086f2668f042140 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 20 ++++++++++++++++++++ sound/soc/codecs/arizona.h | 2 ++ 2 files changed, 22 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 4c2ee9ff677..53763831814 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -3383,6 +3383,26 @@ int arizona_set_custom_jd(struct snd_soc_codec *codec, } EXPORT_SYMBOL_GPL(arizona_set_custom_jd); +struct regmap *arizona_get_regmap_dsp(struct snd_soc_codec *codec) +{ + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8280: + case WM8998: + case WM1814: + case WM1831: + case CS47L24: + return arizona->regmap; + default: + return arizona->regmap_32bit; + } +} +EXPORT_SYMBOL_GPL(arizona_get_regmap_dsp); + int arizona_enable_force_bypass(struct snd_soc_codec *codec) { struct arizona *arizona = dev_get_drvdata(codec->dev->parent); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 7a6f6e646a3..0464ff51d2d 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -369,6 +369,8 @@ extern int arizona_set_ez2ctrl_cb(struct snd_soc_codec *codec, extern int arizona_set_custom_jd(struct snd_soc_codec *codec, const struct arizona_jd_state *custom_jd); +extern struct regmap *arizona_get_regmap_dsp(struct snd_soc_codec *codec); + extern int arizona_enable_force_bypass(struct snd_soc_codec *codec); extern int arizona_disable_force_bypass(struct snd_soc_codec *codec); From 35c31fc734315b657b76db90259d20f1878799bd Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 9 Dec 2014 19:25:05 +0000 Subject: [PATCH 0548/1167] mfd: wm8285: Make IRQ masks a continuous range Regmap expects the IRQ registers to all be a continuous range, pad the missing mask registers in as they will be harmless unused registers. Change-Id: I5ddebc1cd06d96caa39af06f7b5e1d92084b2ef6 Signed-off-by: Charles Keepax --- drivers/mfd/wm8285-tables.c | 34 +++++++++++++++++---------- include/linux/mfd/arizona/registers.h | 5 ++++ 2 files changed, 27 insertions(+), 12 deletions(-) diff --git a/drivers/mfd/wm8285-tables.c b/drivers/mfd/wm8285-tables.c index ad49b2dc26e..754c083f413 100644 --- a/drivers/mfd/wm8285-tables.c +++ b/drivers/mfd/wm8285-tables.c @@ -1447,18 +1447,23 @@ static const struct reg_default wm8285_reg_default[] = { { 0x00001431, 0x0000 }, { 0x00001432, 0x0000 }, { 0x00001433, 0x0000 }, - { 0x00001840, 0xffff }, /* R6208 (0x1840) - IRQ1 Mask 1 */ - { 0x00001841, 0xffff }, /* R6209 (0x1841) - IRQ1 Mask 2 */ - { 0x00001845, 0xffff }, /* R6213 (0x1845) - IRQ1 Mask 6 */ - { 0x00001846, 0xffff }, /* R6214 (0x1846) - IRQ1 Mask 7 */ - { 0x00001848, 0xffff }, /* R6216 (0x1848) - IRQ1 Mask 9 */ - { 0x0000184a, 0xffff }, /* R6218 (0x184A) - IRQ1 Mask 11 */ - { 0x0000184b, 0xffff }, /* R6219 (0x184B) - IRQ1 Mask 12 */ - { 0x0000184c, 0xffff }, /* R6220 (0x184C) - IRQ1 Mask 13 */ - { 0x0000184d, 0xffff }, /* R6221 (0x184D) - IRQ1 Mask 14 */ - { 0x0000184e, 0xffff }, /* R6222 (0x184E) - IRQ1 Mask 15 */ - { 0x00001948, 0xffff }, /* R6472 (0x1948) - IRQ2 Mask 9 */ - { 0x00001a80, 0x0400 }, /* R6784 (0x1A80) - IRQ1 CTRL */ + { 0x00001840, 0xFFFF }, /* R6208 - IRQ1 Mask 1 */ + { 0x00001841, 0xFFFF }, /* R6209 - IRQ1 Mask 2 */ + { 0x00001842, 0xFFFF }, /* R6210 - IRQ1 Mask 3 */ + { 0x00001843, 0xFFFF }, /* R6211 - IRQ1 Mask 4 */ + { 0x00001844, 0xFFFF }, /* R6212 - IRQ1 Mask 5 */ + { 0x00001845, 0xFFFF }, /* R6213 - IRQ1 Mask 6 */ + { 0x00001846, 0xFFFF }, /* R6214 - IRQ1 Mask 7 */ + { 0x00001847, 0xFFFF }, /* R6215 - IRQ1 Mask 8 */ + { 0x00001848, 0xFFFF }, /* R6216 - IRQ1 Mask 9 */ + { 0x00001849, 0xFFFF }, /* R6217 - IRQ1 Mask 10 */ + { 0x0000184A, 0xFFFF }, /* R6218 - IRQ1 Mask 11 */ + { 0x0000184B, 0xFFFF }, /* R6219 - IRQ1 Mask 12 */ + { 0x0000184C, 0xFFFF }, /* R6220 - IRQ1 Mask 13 */ + { 0x0000184D, 0xFFFF }, /* R6221 - IRQ1 Mask 14 */ + { 0x0000184E, 0xFFFF }, /* R6222 - IRQ1 Mask 15 */ + { 0x00001948, 0xFFFF }, /* R6472 - IRQ2 Mask 9 */ + { 0x00001A80, 0x4400 }, /* R6784 - IRQ1 CTRL */ }; static bool wm8285_is_adsp_memory(struct device *dev, unsigned int reg) @@ -2774,9 +2779,14 @@ static bool wm8285_16bit_readable_register(struct device *dev, unsigned int reg) case WM8285_IRQ1_STATUS_32: case WM8285_IRQ1_MASK_1: case WM8285_IRQ1_MASK_2: + case WM8285_IRQ1_MASK_3: + case WM8285_IRQ1_MASK_4: + case WM8285_IRQ1_MASK_5: case WM8285_IRQ1_MASK_6: case WM8285_IRQ1_MASK_7: + case WM8285_IRQ1_MASK_8: case WM8285_IRQ1_MASK_9: + case WM8285_IRQ1_MASK_10: case WM8285_IRQ1_MASK_11: case WM8285_IRQ1_MASK_12: case WM8285_IRQ1_MASK_13: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 23498965232..d4f222c6d95 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -1564,9 +1564,14 @@ #define WM8285_IRQ1_STATUS_32 0x181F #define WM8285_IRQ1_MASK_1 0x1840 #define WM8285_IRQ1_MASK_2 0x1841 +#define WM8285_IRQ1_MASK_3 0x1842 +#define WM8285_IRQ1_MASK_4 0x1843 +#define WM8285_IRQ1_MASK_5 0x1844 #define WM8285_IRQ1_MASK_6 0x1845 #define WM8285_IRQ1_MASK_7 0x1846 +#define WM8285_IRQ1_MASK_8 0x1847 #define WM8285_IRQ1_MASK_9 0x1848 +#define WM8285_IRQ1_MASK_10 0x1849 #define WM8285_IRQ1_MASK_11 0x184A #define WM8285_IRQ1_MASK_12 0x184B #define WM8285_IRQ1_MASK_13 0x184C From fd8769e1dfff06dd95220450f9cea9db66a04e9f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 9 Dec 2014 19:53:47 +0000 Subject: [PATCH 0549/1167] mfd: wm8285: Add missing defaults for GPIO control registers Change-Id: Ie2619ffd781315d1b3e9e0080edb2968dbf8c4be Signed-off-by: Charles Keepax --- drivers/mfd/wm8285-tables.c | 80 +++++++++++++++++++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/drivers/mfd/wm8285-tables.c b/drivers/mfd/wm8285-tables.c index 754c083f413..945c3e266a6 100644 --- a/drivers/mfd/wm8285-tables.c +++ b/drivers/mfd/wm8285-tables.c @@ -1447,6 +1447,86 @@ static const struct reg_default wm8285_reg_default[] = { { 0x00001431, 0x0000 }, { 0x00001432, 0x0000 }, { 0x00001433, 0x0000 }, + { 0x00001700, 0x2001 }, /* R5888 - GPIO1 Control 1 */ + { 0x00001701, 0xE000 }, /* R5889 - GPIO1 Control 2 */ + { 0x00001702, 0x2001 }, /* R5890 - GPIO2 Control 1 */ + { 0x00001703, 0xE000 }, /* R5891 - GPIO2 Control 2 */ + { 0x00001704, 0x2001 }, /* R5892 - GPIO3 Control 1 */ + { 0x00001705, 0xE000 }, /* R5893 - GPIO3 Control 2 */ + { 0x00001706, 0x2001 }, /* R5894 - GPIO4 Control 1 */ + { 0x00001707, 0xE000 }, /* R5895 - GPIO4 Control 2 */ + { 0x00001708, 0x2001 }, /* R5896 - GPIO5 Control 1 */ + { 0x00001709, 0xE000 }, /* R5897 - GPIO5 Control 2 */ + { 0x0000170A, 0x2001 }, /* R5898 - GPIO6 Control 1 */ + { 0x0000170B, 0xE000 }, /* R5899 - GPIO6 Control 2 */ + { 0x0000170C, 0x2001 }, /* R5900 - GPIO7 Control 1 */ + { 0x0000170D, 0xE000 }, /* R5901 - GPIO7 Control 2 */ + { 0x0000170E, 0x2001 }, /* R5902 - GPIO8 Control 1 */ + { 0x0000170F, 0xE000 }, /* R5903 - GPIO8 Control 2 */ + { 0x00001710, 0x2001 }, /* R5904 - GPIO9 Control 1 */ + { 0x00001711, 0xE000 }, /* R5905 - GPIO9 Control 2 */ + { 0x00001712, 0x2001 }, /* R5906 - GPIO10 Control 1 */ + { 0x00001713, 0xE000 }, /* R5907 - GPIO10 Control 2 */ + { 0x00001714, 0x2001 }, /* R5908 - GPIO11 Control 1 */ + { 0x00001715, 0xE000 }, /* R5909 - GPIO11 Control 2 */ + { 0x00001716, 0x2001 }, /* R5910 - GPIO12 Control 1 */ + { 0x00001717, 0xE000 }, /* R5911 - GPIO12 Control 2 */ + { 0x00001718, 0x2001 }, /* R5912 - GPIO13 Control 1 */ + { 0x00001719, 0xE000 }, /* R5913 - GPIO13 Control 2 */ + { 0x0000171A, 0x2001 }, /* R5914 - GPIO14 Control 1 */ + { 0x0000171B, 0xE000 }, /* R5915 - GPIO14 Control 2 */ + { 0x0000171C, 0x2001 }, /* R5916 - GPIO15 Control 1 */ + { 0x0000171D, 0xE000 }, /* R5917 - GPIO15 Control 2 */ + { 0x0000171E, 0x2001 }, /* R5918 - GPIO16 Control 1 */ + { 0x0000171F, 0xE000 }, /* R5919 - GPIO16 Control 2 */ + { 0x00001720, 0x2001 }, /* R5920 - GPIO17 Control 1 */ + { 0x00001721, 0xE000 }, /* R5921 - GPIO17 Control 2 */ + { 0x00001722, 0x2001 }, /* R5922 - GPIO18 Control 1 */ + { 0x00001723, 0xE000 }, /* R5923 - GPIO18 Control 2 */ + { 0x00001724, 0x2001 }, /* R5924 - GPIO19 Control 1 */ + { 0x00001725, 0xE000 }, /* R5925 - GPIO19 Control 2 */ + { 0x00001726, 0x2001 }, /* R5926 - GPIO20 Control 1 */ + { 0x00001727, 0xE000 }, /* R5927 - GPIO20 Control 2 */ + { 0x00001728, 0x2001 }, /* R5928 - GPIO21 Control 1 */ + { 0x00001729, 0xE000 }, /* R5929 - GPIO21 Control 2 */ + { 0x0000172A, 0x2001 }, /* R5930 - GPIO22 Control 1 */ + { 0x0000172B, 0xE000 }, /* R5931 - GPIO22 Control 2 */ + { 0x0000172C, 0x2001 }, /* R5932 - GPIO23 Control 1 */ + { 0x0000172D, 0xE000 }, /* R5933 - GPIO23 Control 2 */ + { 0x0000172E, 0x2001 }, /* R5934 - GPIO24 Control 1 */ + { 0x0000172F, 0xE000 }, /* R5935 - GPIO24 Control 2 */ + { 0x00001730, 0x2001 }, /* R5936 - GPIO25 Control 1 */ + { 0x00001731, 0xE000 }, /* R5937 - GPIO25 Control 2 */ + { 0x00001732, 0x2001 }, /* R5938 - GPIO26 Control 1 */ + { 0x00001733, 0xE000 }, /* R5939 - GPIO26 Control 2 */ + { 0x00001734, 0x2001 }, /* R5940 - GPIO27 Control 1 */ + { 0x00001735, 0xE000 }, /* R5941 - GPIO27 Control 2 */ + { 0x00001736, 0x2001 }, /* R5942 - GPIO28 Control 1 */ + { 0x00001737, 0xE000 }, /* R5943 - GPIO28 Control 2 */ + { 0x00001738, 0x2001 }, /* R5944 - GPIO29 Control 1 */ + { 0x00001739, 0xE000 }, /* R5945 - GPIO29 Control 2 */ + { 0x0000173A, 0x2001 }, /* R5946 - GPIO30 Control 1 */ + { 0x0000173B, 0xE000 }, /* R5947 - GPIO30 Control 2 */ + { 0x0000173C, 0x2001 }, /* R5948 - GPIO31 Control 1 */ + { 0x0000173D, 0xE000 }, /* R5949 - GPIO31 Control 2 */ + { 0x0000173E, 0x2001 }, /* R5950 - GPIO32 Control 1 */ + { 0x0000173F, 0xE000 }, /* R5951 - GPIO32 Control 2 */ + { 0x00001740, 0x2001 }, /* R5952 - GPIO33 Control 1 */ + { 0x00001741, 0xE000 }, /* R5953 - GPIO33 Control 2 */ + { 0x00001742, 0x2001 }, /* R5954 - GPIO34 Control 1 */ + { 0x00001743, 0xE000 }, /* R5955 - GPIO34 Control 2 */ + { 0x00001744, 0x2001 }, /* R5956 - GPIO35 Control 1 */ + { 0x00001745, 0xE000 }, /* R5957 - GPIO35 Control 2 */ + { 0x00001746, 0x2001 }, /* R5958 - GPIO36 Control 1 */ + { 0x00001747, 0xE000 }, /* R5959 - GPIO36 Control 2 */ + { 0x00001748, 0x2001 }, /* R5960 - GPIO37 Control 1 */ + { 0x00001749, 0xE000 }, /* R5961 - GPIO37 Control 2 */ + { 0x0000174A, 0x2001 }, /* R5962 - GPIO38 Control 1 */ + { 0x0000174B, 0xE000 }, /* R5963 - GPIO38 Control 2 */ + { 0x0000174C, 0x2001 }, /* R5964 - GPIO39 Control 1 */ + { 0x0000174D, 0xE000 }, /* R5965 - GPIO39 Control 2 */ + { 0x0000174E, 0x2001 }, /* R5966 - GPIO40 Control 1 */ + { 0x0000174F, 0xE000 }, /* R5967 - GPIO40 Control 2 */ { 0x00001840, 0xFFFF }, /* R6208 - IRQ1 Mask 1 */ { 0x00001841, 0xFFFF }, /* R6209 - IRQ1 Mask 2 */ { 0x00001842, 0xFFFF }, /* R6210 - IRQ1 Mask 3 */ From 6331c948d90244d59ca7dff81e4b5d7d12f24754 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 9 Dec 2014 20:12:53 +0000 Subject: [PATCH 0550/1167] mfd: arizona: Reorder initialisation of pm_runtime The regulator enable in arizona_dev_init needs to be balanced with a disable. This is currently done at the end of arizona_dev_init, with a call to regulator_disable. However, if nothing has claimed a runtime reference by that point this will actually disable DCVDD putting the CODEC into suspend. However, the additional operations required to put the CODEC into suspend are not honoured in this case. As the PM runtime expects the device to be in a suspended state when it takes charge, fix this issue by calling arizona_runtime_suspend before we enable the PM runtime which will disable the regulator in a safe manor. Change-Id: Ia66655b3780cf4dfea053ef1fd0e02b29aa8c0b5 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 1b3b63c559c..d0a813e74c5 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1701,10 +1701,6 @@ int arizona_dev_init(struct arizona *arizona) break; } - pm_runtime_set_autosuspend_delay(arizona->dev, 100); - pm_runtime_use_autosuspend(arizona->dev); - pm_runtime_enable(arizona->dev); - /* Chip default */ if (!arizona->pdata.clk32k_src) arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; @@ -1728,6 +1724,14 @@ int arizona_dev_init(struct arizona *arizona) goto err_reset; } +#ifdef CONFIG_PM_RUNTIME + arizona_runtime_suspend(arizona->dev); +#endif + + pm_runtime_set_autosuspend_delay(arizona->dev, 100); + pm_runtime_use_autosuspend(arizona->dev); + pm_runtime_enable(arizona->dev); + for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { if (!arizona->pdata.micbias[i].mV && !arizona->pdata.micbias[i].bypass) @@ -1882,10 +1886,6 @@ int arizona_dev_init(struct arizona *arizona) goto err_irq; } -#ifdef CONFIG_PM_RUNTIME - regulator_disable(arizona->dcvdd); -#endif - return 0; err_irq: From 1de1b00da2209b9353767246153a106ccc71c3b1 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Thu, 11 Dec 2014 10:34:53 +0000 Subject: [PATCH 0551/1167] mfd: arizona: Add bit fields for WM8285_MICD_OVD Change-Id: I07c5f4db6dc588ada2be70067b6cf6c5243b46f0 Signed-off-by: Nariman Poushin --- include/linux/mfd/arizona/registers.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index d4f222c6d95..3c68944c2be 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -3744,6 +3744,14 @@ #define ARIZONA_MICMUTE_MIX_ENA_SHIFT 6 /* MICMUTE_MIX_ENA */ #define ARIZONA_MICMUTE_MIX_ENA_WIDTH 1 /* MICMUTE_MIX_ENA */ +/* + * R710 (0x2C6) - Micd Clamp control + */ +#define WM8285_MICD_CLAMP_OVD_MASK 0x0010 /* MICD_CLAMP_OVD */ +#define WM8285_MICD_CLAMP_OVD_SHIFT 4 /* MICD_CLAMP_OVD */ +#define WM8285_MICD_CLAMP_OVD_WIDTH 1 /* MICD_CLAMP_OVD */ +#define WM8285_MICD_CLAMP_OVD 0x10 /* MICD_CLAMP_OVD */ + /* * R715 (0x2CB) - Isolation control */ From 8f96dfde56123c5e2a7964e39da20fb30fc65da1 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Wed, 10 Dec 2014 18:04:09 +0000 Subject: [PATCH 0552/1167] switch: arizona: Enable/Disable MICD_OVD based on micd status Change-Id: Iaef9b5b24dff48f6f7a4894941bf97d627af74c2 Signed-off-by: Nariman Poushin --- drivers/switch/switch-arizona.c | 39 ++++++++++++++++++++++++++++++--- 1 file changed, 36 insertions(+), 3 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 317422d2042..995e71ea5e2 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1096,6 +1096,23 @@ int arizona_micd_start(struct arizona_extcon_info *info) /* Microphone detection can't use idle mode */ pm_runtime_get_sync(info->dev); + if (info->micd_clamp) { + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8998: + case WM1814: + case WM8280: + default: + dev_dbg(arizona->dev, "Disabling MICD_OVD\n"); + regmap_update_bits(arizona->regmap, + WM8285_MICD_CLAMP_CONTROL, + WM8285_MICD_CLAMP_OVD_MASK, 0); + break; + } + } + ret = regulator_enable(info->micvdd); if (ret != 0) { dev_err(arizona->dev, "Failed to enable MICVDD: %d\n", @@ -1163,6 +1180,25 @@ void arizona_micd_stop(struct arizona_extcon_info *info) regulator_disable(info->micvdd); + if (info->micd_clamp) { + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8998: + case WM1814: + case WM8280: + default: + dev_dbg(arizona->dev, "Enabling MICD_OVD\n"); + regmap_update_bits(arizona->regmap, + WM8285_MICD_CLAMP_CONTROL, + WM8285_MICD_CLAMP_OVD_MASK, + WM8285_MICD_CLAMP_OVD); + break; + } + } + + pm_runtime_mark_last_busy(info->dev); pm_runtime_put_autosuspend(info->dev); } @@ -2089,9 +2125,6 @@ static void arizona_extcon_set_micd_clamp_mode(struct arizona *arizona) clamp_db_mask = WM8285_MICD_CLAMP_DB; clamp_db_val = WM8285_MICD_CLAMP_DB; - regmap_update_bits(arizona->regmap, - WM8285_MICD_CLAMP_CONTROL, - 0x10, 0); break; } From 47fd90fb8dedc1c6111b566bded549c426a59361 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 11 Dec 2014 09:10:29 +0000 Subject: [PATCH 0553/1167] mfd: arizona: Update MAX_AIF to 4 as wm8285 has 4 AIFs Change-Id: I9fb75023a98e249cbcbcdd1994b88a538774726a Signed-off-by: Charles Keepax --- include/linux/mfd/arizona/pdata.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 3fc650c5632..9091a763ad8 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -72,7 +72,7 @@ #define ARIZONA_MAX_OUTPUT 6 -#define ARIZONA_MAX_AIF 3 +#define ARIZONA_MAX_AIF 4 #define ARIZONA_HAP_ACT_ERM 0 #define ARIZONA_HAP_ACT_LRA 2 From 7c0e4bdec6f4188659432a08d3ba9374dac4ed18 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 11 Dec 2014 11:40:21 +0000 Subject: [PATCH 0554/1167] regulator: arizona-micsupp: Correct setup for wm8285/1840 wm8285/1840 where being setup for the incorrect type of micsupp regulator, this patch corrects this. Change-Id: I9860cbddc5bbb2f70fd77f85f998c387ef944362 Signed-off-by: Charles Keepax --- drivers/regulator/arizona-micsupp.c | 24 ++++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/drivers/regulator/arizona-micsupp.c b/drivers/regulator/arizona-micsupp.c index 13cc1d15512..699e230a732 100644 --- a/drivers/regulator/arizona-micsupp.c +++ b/drivers/regulator/arizona-micsupp.c @@ -75,11 +75,13 @@ static int arizona_micsupp_list_voltage(struct regulator_dev *rdev, struct arizona_micsupp *micsupp = rdev_get_drvdata(rdev); switch (micsupp->arizona->type) { - case WM8280: - case WM5110: - return arizona_micsupp_ext_sel_to_voltage(selector); - default: + case WM5102: + case WM8997: + case WM8998: + case WM1814: return arizona_micsupp_sel_to_voltage(selector); + default: + return arizona_micsupp_ext_sel_to_voltage(selector); } } @@ -278,15 +280,17 @@ static int arizona_micsupp_probe(struct platform_device *pdev) * platform data if provided. */ switch (arizona->type) { - case WM8280: - case WM5110: - desc = &arizona_micsupp_ext; - micsupp->init_data = arizona_micsupp_ext_default; - break; - default: + case WM5102: + case WM8997: + case WM8998: + case WM1814: desc = &arizona_micsupp; micsupp->init_data = arizona_micsupp_default; break; + default: + desc = &arizona_micsupp_ext; + micsupp->init_data = arizona_micsupp_ext_default; + break; } micsupp->init_data.consumer_supplies = &micsupp->supply; micsupp->supply.supply = "MICVDD"; From a109433c8371909e1fe0b6f60beeafbe15b191f2 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 12 Dec 2014 10:22:32 +0000 Subject: [PATCH 0555/1167] mfd: arizona: Allow variable number of DT max channel entries As the old binding has 3 entries in the wlf,max-channel-clocked property we still need to support that, but wm8285 now has 4 AIFs so requires 4 entries. To support this allow a variable number of entries in the property. Change-Id: Ia2df5d09fc465a720af4f06c79d7cebbfb780c80 Signed-off-by: Charles Keepax --- .../devicetree/bindings/mfd/arizona.txt | 4 +-- drivers/mfd/arizona-core.c | 26 ++++++++++++++++--- 2 files changed, 24 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 2a6cd13ad51..abe0781c31b 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -102,8 +102,8 @@ Optional properties: - wlf,max-channels-clocked : The maximum number of channels to be clocked on each AIF, useful for I2S systems with multiple data lines being mastered. - If specified three cells must supplied one for each AIF, specify zero for - AIFs that should be handled normally. + Specify one cell for each AIF, specify zero for AIFs that should be handled + normally. - wlf,dmic-ref : DMIC reference for each input, must contain four cells if specified. 0 indicates MICVDD and is the default, 1,2,3 indicate the diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index d0a813e74c5..44b698bbac7 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -897,6 +897,27 @@ int arizona_of_read_u32(struct arizona *arizona, } EXPORT_SYMBOL_GPL(arizona_of_read_u32); +static int arizona_of_get_max_channels(struct arizona *arizona, + const char *prop) +{ + struct arizona_pdata *pdata = &arizona->pdata; + struct device_node *np = arizona->dev->of_node; + struct property *tempprop; + const __be32 *cur; + u32 val; + int i; + + i = 0; + of_property_for_each_u32(np, prop, tempprop, cur, val) { + if (i == ARRAY_SIZE(pdata->max_channels_clocked)) + break; + + pdata->max_channels_clocked[i++] = val; + } + + return 0; +} + static int arizona_of_get_gpio_defaults(struct arizona *arizona, const char *prop) { @@ -1085,10 +1106,7 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) arizona_of_get_gpio_defaults(arizona, "wlf,gpio-defaults"); - arizona_of_read_u32_array(arizona, "wlf,max-channels-clocked", - false, - pdata->max_channels_clocked, - ARRAY_SIZE(pdata->max_channels_clocked)); + arizona_of_get_max_channels(arizona, "wlf,max-channels-clocked"); arizona_of_read_u32_array(arizona, "wlf,dmic-ref", false, pdata->dmic_ref, ARRAY_SIZE(pdata->dmic_ref)); From 19a6dc77cf8dc710acedc642952b53aee18db60e Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Tue, 16 Dec 2014 05:53:11 +0000 Subject: [PATCH 0556/1167] mfd: arizona: Add pdata for micd_button_report_delay Change-Id: I80f0ed227410d6481d538ce5227e78d205f76b17 Signed-off-by: Nariman Poushin --- Documentation/devicetree/bindings/mfd/arizona.txt | 5 +++++ drivers/switch/switch-arizona.c | 2 ++ include/linux/mfd/arizona/pdata.h | 6 ++++++ 3 files changed, 13 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index abe0781c31b..d896d0e851f 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -131,6 +131,11 @@ Optional properties: - wlf,hpdet-short-circuit-imp : Specifies the maximum impedance in ohms that will be considered as a short circuit + - wlf,micd-button-report-delay : Specifies the delay before reporting a + button detect. This is desireable on some platforms where micbias is + forced high, such that the chip cannot control the pulsing of micbias + to coincide with the measurement interval rate specified by micd-rate + - DCVDD-supply, MICVDD-supply : Power supplies, only need to be specified if they are being externally supplied. As covered in Documentation/devicetree/bindings/regulator/regulator.txt diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 995e71ea5e2..d749f71781a 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1991,6 +1991,8 @@ static int arizona_extcon_of_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,micd-clamp-mode", false, &pdata->micd_clamp_mode); + arizona_of_read_u32(arizona, "wlf,micd-button-report-delay", false, + &pdata->micd_button_report_delay); return 0; } #else diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 9091a763ad8..b3d38834ef5 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -271,6 +271,12 @@ struct arizona_pdata { /** Some platforms add a series resistor for hpdet to suppress pops */ int hpdet_ext_res; + + /** For platforms with micbias forced we cannot rely on hardware only + * measurements being within the sample period so delay reporting + by n ms to meet upper and lower bound specs for button reporting + */ + int micd_button_report_delay; }; #endif From 64fd5631082c4041f79ade9b0142bcd996d00d7d Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Tue, 16 Dec 2014 05:55:26 +0000 Subject: [PATCH 0557/1167] switch: arizona: Handle micd_button_report_delay Change-Id: I88735015dee542c00ba97ee35a315e5cd519957f Signed-off-by: Nariman Poushin Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index d749f71781a..ff71fd88c6d 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1225,6 +1225,13 @@ int arizona_micd_button_reading(struct arizona_extcon_info *info, if (lvl && ffs(lvl) - 1 < info->num_micd_ranges) { key = info->micd_ranges[ffs(lvl) - 1].key; + + if (arizona->pdata.micd_button_report_delay) { + dev_dbg(arizona->dev, "delaying button by %dms\n", + arizona->pdata.micd_button_report_delay); + msleep(arizona->pdata.micd_button_report_delay); + } + input_report_key(info->input, key, 1); input_sync(info->input); } else { From e5167f90255caa5ad53655a74321f2270cd4efba Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 15 Dec 2014 12:48:45 +0000 Subject: [PATCH 0558/1167] switch: arizona: Speed up moisture detection As the moisture detection does not measure across either of the headphones it introduces signicantly less noise then the normal headphone detect, this means we can run a much more agressive measurement such that the moisture detect takes significantly less time to run. Change-Id: I372a8a7d94ff5e968c8e2c5e29f283a71a0762bc Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 47 ++++++++++++++++++++++++++- include/linux/mfd/arizona/registers.h | 3 ++ 2 files changed, 49 insertions(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index ff71fd88c6d..019928e1a2b 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1041,8 +1041,28 @@ EXPORT_SYMBOL_GPL(arizona_hpdet_stop); static int arizona_hpdet_moisture_start(struct arizona_extcon_info *info) { + struct arizona *arizona = info->arizona; int ret; + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8280: + case WM8998: + case WM1814: + case WM1831: + case CS47L24: + regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_RATE, ARIZONA_HP_RATE); + break; + default: + regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, + WM8285_HP_RATE_MASK, + 0x2 << WM8285_HP_RATE_SHIFT); + break; + } + ret = arizona_hpdet_start(info); arizona_extcon_hp_clamp(info, false); @@ -1050,6 +1070,31 @@ static int arizona_hpdet_moisture_start(struct arizona_extcon_info *info) return ret; } +static void arizona_hpdet_moisture_stop(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + + arizona_hpdet_stop(info); + + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8280: + case WM8998: + case WM1814: + case WM1831: + case CS47L24: + regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_RATE, 0); + break; + default: + regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, + WM8285_HP_RATE_MASK, 0); + break; + } +} + static int arizona_hpdet_moisture_reading(struct arizona_extcon_info *info, int val) { @@ -1660,7 +1705,7 @@ static const struct arizona_jd_state arizona_hpdet_moisture = { .mode = ARIZONA_ACCDET_MODE_HPL, .start = arizona_hpdet_moisture_start, .reading = arizona_hpdet_moisture_reading, - .stop = arizona_hpdet_stop, + .stop = arizona_hpdet_moisture_stop, }; const struct arizona_jd_state arizona_hpdet_left = { diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 3c68944c2be..2c52c4190e9 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -3629,6 +3629,9 @@ #define ARIZONA_HP_IDAC_STEER_MASK 0x0004 /* HP_IDAC_STEER */ #define ARIZONA_HP_IDAC_STEER_SHIFT 2 /* HP_IDAC_STEER */ #define ARIZONA_HP_IDAC_STEER_WIDTH 1 /* HP_IDAC_STEER */ +#define WM8285_HP_RATE_MASK 0x0006 /* HP_RATE - [2:1] */ +#define WM8285_HP_RATE_SHIFT 1 /* HP_RATE - [2:1] */ +#define WM8285_HP_RATE_WIDTH 2 /* HP_RATE - [2:1] */ #define ARIZONA_HP_RATE 0x0002 /* HP_RATE */ #define ARIZONA_HP_RATE_MASK 0x0002 /* HP_RATE */ #define ARIZONA_HP_RATE_SHIFT 1 /* HP_RATE */ From 9baea28490c2592a61490a01c620c78faf9e01a1 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 15 Dec 2014 14:10:43 +0000 Subject: [PATCH 0559/1167] ASoC: wm_adsp: Correct clearing of DMA masks on WM8285 Change-Id: I6cdc53e76018c162baad78ae5f780dd4b9ed24e8 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 41 +++++++++++++++++++++++++------------- 1 file changed, 27 insertions(+), 14 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 41735192ff8..40319a70fdb 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -118,9 +118,10 @@ #define ADSP2_CONTROL 0x0 #define ADSP2_CLOCKING 0x1 #define ADSP2_STATUS1 0x4 -#define ADSP2_WDMA_CONFIG_1 0x30 -#define ADSP2_WDMA_CONFIG_2 0x31 -#define ADSP2_RDMA_CONFIG_1 0x34 +#define ADSP2_WDMA_CONFIG_1 0x30 +#define ADSP2_WDMA_CONFIG_2 0x31 +#define ADSP2V2_WDMA_CONFIG_2 0x32 +#define ADSP2_RDMA_CONFIG_1 0x34 /* * ADSP2 Control @@ -2350,21 +2351,33 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, dsp->running = false; switch (dsp->rev) { - case 1: - regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, - ADSP2_MEM_ENA, 0); - /* Fall through - * MEM_ENA is cleared to disable the RAM on WM8285 - */ - default: - regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, + case 0: + regmap_update_bits(dsp->regmap, + dsp->base + ADSP2_CONTROL, ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0); /* Make sure DMAs are quiesced */ - regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0); - regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0); - regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0); + regmap_write(dsp->regmap, + dsp->base + ADSP2_WDMA_CONFIG_1, 0); + regmap_write(dsp->regmap, + dsp->base + ADSP2_WDMA_CONFIG_2, 0); + regmap_write(dsp->regmap, + dsp->base + ADSP2_RDMA_CONFIG_1, 0); + break; + default: + regmap_update_bits(dsp->regmap, + dsp->base + ADSP2_CONTROL, + ADSP2_MEM_ENA | ADSP2_SYS_ENA | + ADSP2_CORE_ENA | ADSP2_START, 0); + + /* Make sure DMAs are quiesced */ + regmap_write(dsp->regmap, + dsp->base + ADSP2_WDMA_CONFIG_1, 0); + regmap_write(dsp->regmap, + dsp->base + ADSP2V2_WDMA_CONFIG_2, 0); + regmap_write(dsp->regmap, + dsp->base + ADSP2_RDMA_CONFIG_1, 0); break; } From 23ed0ee120f2e0b82676fd35011279d22316e59e Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Mon, 1 Dec 2014 17:10:03 +0000 Subject: [PATCH 0560/1167] mfd: wm8285: Update register defaults for Rev B Change-Id: I669fb8d37ea1d217639509593368a5b4ee04c852 Signed-off-by: Nariman Poushin Signed-off-by: Charles Keepax --- drivers/mfd/wm8285-tables.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/mfd/wm8285-tables.c b/drivers/mfd/wm8285-tables.c index 945c3e266a6..a10dc1ac334 100644 --- a/drivers/mfd/wm8285-tables.c +++ b/drivers/mfd/wm8285-tables.c @@ -131,9 +131,9 @@ const struct regmap_irq_chip wm8285_irq = { EXPORT_SYMBOL_GPL(wm8285_irq); static const struct reg_default wm8285_reg_default[] = { - { 0x00000008, 0x0009 }, /* R8 (0x08) - Ctrl IF SPI CFG 1 */ - { 0x00000009, 0x0001 }, /* R9 (0x09) - Ctrl IF I2C1 CFG 1 */ - { 0x0000000a, 0x0009 }, + { 0x00000008, 0x0309 }, /* R8 - Ctrl IF CFG 1 */ + { 0x00000009, 0x0200 }, /* R9 - Ctrl IF CFG 2 */ + { 0x0000000A, 0x0309 }, /* R10 - Ctrl IF CFG 3 */ { 0x00000016, 0x0000 }, /* R22 (0x16) - Write Sequencer Ctrl 0 */ { 0x00000017, 0x0000 }, /* R23 (0x17) - Write Sequencer Ctrl 1 */ { 0x00000018, 0x0000 }, /* R24 (0x18) - Write Sequencer Ctrl 2 */ @@ -186,7 +186,7 @@ static const struct reg_default wm8285_reg_default[] = { { 0x00000172, 0x0008 }, /* R370 (0x172) - FLL1 Control 2 */ { 0x00000173, 0x0018 }, /* R371 (0x173) - FLL1 Control 3 */ { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */ - { 0x00000175, 0x0006 }, /* R373 (0x175) - FLL1 Control 5 */ + { 0x00000175, 0x0000 }, /* R373 - FLL1 Control 5 */ { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */ { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */ { 0x00000178, 0x0000 }, @@ -204,7 +204,7 @@ static const struct reg_default wm8285_reg_default[] = { { 0x00000192, 0x0008 }, /* R402 (0x192) - FLL2 Control 2 */ { 0x00000193, 0x0018 }, /* R403 (0x193) - FLL2 Control 3 */ { 0x00000194, 0x007d }, /* R404 (0x194) - FLL2 Control 4 */ - { 0x00000195, 0x0006 }, /* R405 (0x195) - FLL2 Control 5 */ + { 0x00000195, 0x0000 }, /* R405 - FLL2 Control 5 */ { 0x00000196, 0x0000 }, /* R406 (0x196) - FLL2 Control 6 */ { 0x00000197, 0x0281 }, /* R407 (0x197) - FLL2 Loop Filter Test 1 */ { 0x00000198, 0x0000 }, @@ -222,7 +222,7 @@ static const struct reg_default wm8285_reg_default[] = { { 0x000001B2, 0x0008 }, /* R434 - FLL3 Control 2 */ { 0x000001B3, 0x0018 }, /* R435 - FLL3 Control 3 */ { 0x000001B4, 0x007D }, /* R436 - FLL3 Control 4 */ - { 0x000001B5, 0x0006 }, /* R437 - FLL3 Control 5 */ + { 0x000001B5, 0x0000 }, /* R437 - FLL3 Control 5 */ { 0x000001B6, 0x0000 }, /* R438 - FLL3 Control 6 */ { 0x000001B7, 0x0281 }, /* R439 - FLL3 Loop Filter Test 1 */ { 0x000001B8, 0x0000 }, /* R440 - FLL3 NCO Test 0 */ @@ -352,7 +352,7 @@ static const struct reg_default wm8285_reg_default[] = { { 0x00000491, 0x0000 }, /* R1169 (0x491) - PDM SPK1 CTRL 2 */ { 0x00000492, 0x0069 }, /* R1170 (0x492) - PDM SPK2 CTRL 1 */ { 0x00000493, 0x0000 }, /* R1171 (0x493) - PDM SPK2 CTRL 2 */ - { 0x000004A0, 0x3280 }, /* R1184 - HP1 Short Circuit Ctrl */ + { 0x000004A0, 0x3210 }, /* R1184 - HP1 Short Circuit Ctrl */ { 0x000004A1, 0x3200 }, /* R1185 - HP2 Short Circuit Ctrl */ { 0x000004A2, 0x3200 }, /* R1186 - HP3 Short Circuit Ctrl */ { 0x000004A8, 0x7020 }, /* R1192 - HP Test Ctrl 5 */ From 2043f6b2c5604671ae791986b42fd9bfde603e30 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 16 Dec 2014 18:54:17 +0000 Subject: [PATCH 0561/1167] switch: arizona: Add missing breaks Change-Id: Ib7f9b861fd21c41aa123b93acc98a46cb2924d1e Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 019928e1a2b..f7cfb23e180 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1149,6 +1149,7 @@ int arizona_micd_start(struct arizona_extcon_info *info) case WM8998: case WM1814: case WM8280: + break; default: dev_dbg(arizona->dev, "Disabling MICD_OVD\n"); regmap_update_bits(arizona->regmap, @@ -1233,6 +1234,7 @@ void arizona_micd_stop(struct arizona_extcon_info *info) case WM8998: case WM1814: case WM8280: + break; default: dev_dbg(arizona->dev, "Enabling MICD_OVD\n"); regmap_update_bits(arizona->regmap, From 195e6f466704cd0f6fc1eee92cc9beb4def5802f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 9 Dec 2014 10:42:46 +0000 Subject: [PATCH 0562/1167] ASoC: wm_adsp: Add ability to load revision specific firmware Revision specific firmware will only be loaded if there is no general purpose firmware available. Change-Id: Ieaa43023a969001eb9ee363d8106806e5fd34791 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm8285.c | 1 + sound/soc/codecs/wm_adsp.c | 16 +++++++++++++++- sound/soc/codecs/wm_adsp.h | 1 + 3 files changed, 17 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm8285.c b/sound/soc/codecs/wm8285.c index 2e10a6e42a2..27e0aaba0d1 100644 --- a/sound/soc/codecs/wm8285.c +++ b/sound/soc/codecs/wm8285.c @@ -2577,6 +2577,7 @@ static int wm8285_probe(struct platform_device *pdev) for (i = 0; i < WM8285_NUM_ADSP; i++) { wm8285->core.adsp[i].part = "wm8285"; + wm8285->core.adsp[i].part_rev = 'a' + arizona->rev; wm8285->core.adsp[i].num = i + 1; wm8285->core.adsp[i].type = WMFW_ADSP2; wm8285->core.adsp[i].rev = 1; diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 40319a70fdb..c4fcaafda07 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -988,8 +988,22 @@ static int wm_adsp_load(struct wm_adsp *dsp) mutex_lock(dsp->fw_lock); ret = request_firmware(&firmware, file, dsp->dev); mutex_unlock(dsp->fw_lock); - if (ret != 0) { + + if (dsp->part_rev && ret != 0) { adsp_err(dsp, "Failed to request '%s'\n", file); + adsp_info(dsp, "Trying rev specific firmware...\n"); + + snprintf(file, PAGE_SIZE, "%s%c-dsp%d-%s.wmfw", + dsp->part, dsp->part_rev, dsp->num, + dsp->firmwares[dsp->fw].file); + file[PAGE_SIZE - 1] = '\0'; + + mutex_lock(dsp->fw_lock); + ret = request_firmware(&firmware, file, dsp->dev); + mutex_unlock(dsp->fw_lock); + } + if (ret != 0) { + adsp_err(dsp, "Failed to request: '%s'\n", file); goto out; } ret = -EINVAL; diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 03c91b47a49..5d6ad4ff005 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -73,6 +73,7 @@ struct wm_adsp_fw_features { struct wm_adsp { const char *part; + char part_rev; int num; int type; int rev; From c52d5e91d81470565c18fde264d0437dc31b189b Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 17 Dec 2014 14:51:11 +0000 Subject: [PATCH 0563/1167] Revert "switch: arizona: Handle micd_button_report_delay" This reverts commit 64fd5631082c4041f79ade9b0142bcd996d00d7d. This feature is not actually required. Change-Id: Id6f21813f9bdcbe988074bc1c546332d934ac753 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index f7cfb23e180..e158dc6a03d 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1272,13 +1272,6 @@ int arizona_micd_button_reading(struct arizona_extcon_info *info, if (lvl && ffs(lvl) - 1 < info->num_micd_ranges) { key = info->micd_ranges[ffs(lvl) - 1].key; - - if (arizona->pdata.micd_button_report_delay) { - dev_dbg(arizona->dev, "delaying button by %dms\n", - arizona->pdata.micd_button_report_delay); - msleep(arizona->pdata.micd_button_report_delay); - } - input_report_key(info->input, key, 1); input_sync(info->input); } else { From 646d7c9357d3cd5a7ff72ebfe256a5e27c0ed7d0 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 17 Dec 2014 14:51:35 +0000 Subject: [PATCH 0564/1167] Revert "mfd: arizona: Add pdata for micd_button_report_delay" This reverts commit 19a6dc77cf8dc710acedc642952b53aee18db60e. This feature is not actually required. Change-Id: Ia68b66aa6e454d2824706a306494af8b0c58627c Signed-off-by: Charles Keepax --- Documentation/devicetree/bindings/mfd/arizona.txt | 5 ----- drivers/switch/switch-arizona.c | 2 -- include/linux/mfd/arizona/pdata.h | 6 ------ 3 files changed, 13 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index d896d0e851f..abe0781c31b 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -131,11 +131,6 @@ Optional properties: - wlf,hpdet-short-circuit-imp : Specifies the maximum impedance in ohms that will be considered as a short circuit - - wlf,micd-button-report-delay : Specifies the delay before reporting a - button detect. This is desireable on some platforms where micbias is - forced high, such that the chip cannot control the pulsing of micbias - to coincide with the measurement interval rate specified by micd-rate - - DCVDD-supply, MICVDD-supply : Power supplies, only need to be specified if they are being externally supplied. As covered in Documentation/devicetree/bindings/regulator/regulator.txt diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index e158dc6a03d..1a999d9e8e2 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -2038,8 +2038,6 @@ static int arizona_extcon_of_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,micd-clamp-mode", false, &pdata->micd_clamp_mode); - arizona_of_read_u32(arizona, "wlf,micd-button-report-delay", false, - &pdata->micd_button_report_delay); return 0; } #else diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index b3d38834ef5..9091a763ad8 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -271,12 +271,6 @@ struct arizona_pdata { /** Some platforms add a series resistor for hpdet to suppress pops */ int hpdet_ext_res; - - /** For platforms with micbias forced we cannot rely on hardware only - * measurements being within the sample period so delay reporting - by n ms to meet upper and lower bound specs for button reporting - */ - int micd_button_report_delay; }; #endif From 1ac55d7f359d388ca8a50bcd8048686b5eaee413 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 18 Dec 2014 15:35:16 +0000 Subject: [PATCH 0565/1167] mfd: arizona: Only process GPIO defaults from DT if they exist Change-Id: I22df028ddfdbcd9de3711825666fb067606d9e46 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 44b698bbac7..20a82a8341f 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -935,6 +935,8 @@ static int arizona_of_get_gpio_defaults(struct arizona *arizona, pdata->gpio_defaults[i++] = val; } + if (!i) + return 0; /* * All values are literal except out of range values From e8d2a928b37c8685197bee9ec753f25ece49f794 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 19 Dec 2014 09:39:14 +0000 Subject: [PATCH 0566/1167] mfd: arizona: Add pdata to directly load rev specific firmware Change-Id: I44daefff6913dfa4cf4c5ac1f9064935bd134392 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 3 +++ include/linux/mfd/arizona/pdata.h | 3 +++ sound/soc/codecs/wm8285.c | 3 ++- sound/soc/codecs/wm_adsp.c | 21 +++++++++------------ 4 files changed, 17 insertions(+), 13 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 20a82a8341f..3e30450874b 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1126,6 +1126,9 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,hpdet-ext-res", false, &pdata->hpdet_ext_res); + + pdata->rev_specific_fw = of_property_read_bool(arizona->dev->of_node, + "wlf,rev-specific-fw"); return 0; } diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 9091a763ad8..a670933ac77 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -271,6 +271,9 @@ struct arizona_pdata { /** Some platforms add a series resistor for hpdet to suppress pops */ int hpdet_ext_res; + + /** Load firmwares for specific chip revisions */ + bool rev_specific_fw; }; #endif diff --git a/sound/soc/codecs/wm8285.c b/sound/soc/codecs/wm8285.c index 27e0aaba0d1..82fe2fd657d 100644 --- a/sound/soc/codecs/wm8285.c +++ b/sound/soc/codecs/wm8285.c @@ -2577,7 +2577,8 @@ static int wm8285_probe(struct platform_device *pdev) for (i = 0; i < WM8285_NUM_ADSP; i++) { wm8285->core.adsp[i].part = "wm8285"; - wm8285->core.adsp[i].part_rev = 'a' + arizona->rev; + if (arizona->pdata.rev_specific_fw) + wm8285->core.adsp[i].part_rev = 'a' + arizona->rev; wm8285->core.adsp[i].num = i + 1; wm8285->core.adsp[i].type = WMFW_ADSP2; wm8285->core.adsp[i].rev = 1; diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index c4fcaafda07..26970f85aed 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -981,23 +981,20 @@ static int wm_adsp_load(struct wm_adsp *dsp) if (file == NULL) return -ENOMEM; - snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.wmfw", dsp->part, dsp->num, - dsp->firmwares[dsp->fw].file); - file[PAGE_SIZE - 1] = '\0'; - - mutex_lock(dsp->fw_lock); - ret = request_firmware(&firmware, file, dsp->dev); - mutex_unlock(dsp->fw_lock); - - if (dsp->part_rev && ret != 0) { - adsp_err(dsp, "Failed to request '%s'\n", file); - adsp_info(dsp, "Trying rev specific firmware...\n"); - + if (dsp->part_rev) { snprintf(file, PAGE_SIZE, "%s%c-dsp%d-%s.wmfw", dsp->part, dsp->part_rev, dsp->num, dsp->firmwares[dsp->fw].file); file[PAGE_SIZE - 1] = '\0'; + mutex_lock(dsp->fw_lock); + ret = request_firmware(&firmware, file, dsp->dev); + mutex_unlock(dsp->fw_lock); + } else { + snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.wmfw", dsp->part, + dsp->num, dsp->firmwares[dsp->fw].file); + file[PAGE_SIZE - 1] = '\0'; + mutex_lock(dsp->fw_lock); ret = request_firmware(&firmware, file, dsp->dev); mutex_unlock(dsp->fw_lock); From a7dd89f3b26c9f1af7128a586f7da0b130f954d3 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Tue, 9 Dec 2014 13:44:24 +0000 Subject: [PATCH 0567/1167] mfd: arizona: Hold WM8285 in reset during resume with external dcvdd Change-Id: If9b24530cd957bdf43532675f5336ed1957d2f61 Signed-off-by: Nariman Poushin --- drivers/mfd/arizona-core.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 3e30450874b..ab3682191ba 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -589,6 +589,9 @@ static int arizona_runtime_resume(struct device *dev) gpio_set_value_cansleep(arizona->pdata.reset, 0); break; default: + if (arizona->pdata.reset && arizona->external_dcvdd) { + gpio_set_value_cansleep(arizona->pdata.reset, 0); + } break; }; @@ -667,6 +670,11 @@ static int arizona_runtime_resume(struct device *dev) } break; default: + if (arizona->pdata.reset && arizona->external_dcvdd) { + gpio_set_value_cansleep(arizona->pdata.reset, 1); + msleep(1); + } + ret = arizona_wait_for_boot(arizona); if (ret != 0) { goto err; From 5923b2a881284a8f220232ff99abe3f9a0c36cd0 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 22 Dec 2014 18:13:38 +0000 Subject: [PATCH 0568/1167] mfd: clearwater: rename wm8285 to clearwater Change-Id: I4b6913bee7edb2a988092c8b73c1b3b843ead496 Signed-off-by: Nikesh Oswal --- drivers/mfd/Kconfig | 7 +- drivers/mfd/Makefile | 4 +- drivers/mfd/arizona-core.c | 24 +- drivers/mfd/arizona-i2c.c | 6 +- drivers/mfd/arizona-irq.c | 6 +- drivers/mfd/arizona-spi.c | 6 +- drivers/mfd/arizona.h | 10 +- .../{wm8285-tables.c => clearwater-tables.c} | 870 ++-- include/linux/mfd/arizona/core.h | 2 +- include/linux/mfd/arizona/pdata.h | 12 +- include/linux/mfd/arizona/registers.h | 4618 ++++++++--------- 11 files changed, 2783 insertions(+), 2782 deletions(-) rename drivers/mfd/{wm8285-tables.c => clearwater-tables.c} (85%) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 31e6e80574c..faddc82be7a 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1056,11 +1056,12 @@ config MFD_WM8997 help Support for Wolfson Microelectronics WM8997 low power audio SoC -config MFD_WM8285 - bool "Wolfson Microelectronics WM8285" +config MFD_CLEARWATER + bool "Wolfson Microelectronics ClearWater class codecs" depends on MFD_ARIZONA help - Support for Wolfson Microelectronics WM8285 low power audio SoC + Support for Wolfson Microelectronics ClearWater class low power audio SoC + such as the WM8285 config MFD_CS47L24 bool "Cirrus Logic CS47L24" diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 021d5d2bddd..3c8f6592971 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -49,8 +49,8 @@ endif ifneq ($(CONFIG_MFD_WM8998),n) obj-$(CONFIG_MFD_ARIZONA) += wm8998-tables.o endif -ifneq ($(CONFIG_MFD_WM8285),n) -obj-$(CONFIG_MFD_ARIZONA) += wm8285-tables.o +ifneq ($(CONFIG_MFD_CLEARWATER),n) +obj-$(CONFIG_MFD_ARIZONA) += clearwater-tables.o endif ifneq ($(CONFIG_MFD_CS47L24),n) obj-$(CONFIG_MFD_ARIZONA) += cs47l24-tables.o diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index ab3682191ba..146ba0f982b 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -391,13 +391,13 @@ static int arizona_wait_for_boot(struct arizona *arizona) ARIZONA_BOOT_DONE_STS); break; default: - ret = arizona_poll_reg(arizona, 5, WM8285_IRQ1_RAW_STATUS_1, - WM8285_BOOT_DONE_STS1, - WM8285_BOOT_DONE_STS1); + ret = arizona_poll_reg(arizona, 5, CLEARWATER_IRQ1_RAW_STATUS_1, + CLEARWATER_BOOT_DONE_STS1, + CLEARWATER_BOOT_DONE_STS1); if (!ret) - regmap_write(arizona->regmap, WM8285_IRQ1_STATUS_1, - WM8285_BOOT_DONE_EINT1); + regmap_write(arizona->regmap, CLEARWATER_IRQ1_STATUS_1, + CLEARWATER_BOOT_DONE_EINT1); break; } @@ -1208,13 +1208,13 @@ static struct mfd_cell wm8998_devs[] = { { .name = "wm8998-codec" }, }; -static struct mfd_cell wm8285_devs[] = { +static struct mfd_cell clearwater_devs[] = { { .name = "arizona-micsupp" }, { .name = "arizona-extcon" }, { .name = "arizona-gpio" }, { .name = "arizona-haptics" }, { .name = "arizona-pwm" }, - { .name = "wm8285-codec" }, + { .name = "clearwater-codec" }, }; static const struct { @@ -1643,7 +1643,7 @@ int arizona_dev_init(struct arizona *arizona) revision_char = arizona->rev + 'A'; break; #endif -#ifdef CONFIG_MFD_WM8285 +#ifdef CONFIG_MFD_CLEARWATER case 0x6338: switch (arizona->type) { case WM8285: @@ -1661,7 +1661,7 @@ int arizona_dev_init(struct arizona *arizona) } revision_char = arizona->rev + 'A'; - apply_patch = wm8285_patch; + apply_patch = clearwater_patch; break; #endif default: @@ -1726,7 +1726,7 @@ int arizona_dev_init(struct arizona *arizona) if (!arizona->pdata.gpio_defaults[i]) continue; - regmap_write(arizona->regmap, WM8285_GPIO1_CTRL_1 + i, + regmap_write(arizona->regmap, CLEARWATER_GPIO1_CTRL_1 + i, arizona->pdata.gpio_defaults[i]); } break; @@ -1907,8 +1907,8 @@ int arizona_dev_init(struct arizona *arizona) break; case WM8285: case WM1840: - ret = mfd_add_devices(arizona->dev, -1, wm8285_devs, - ARRAY_SIZE(wm8285_devs), NULL, 0, NULL); + ret = mfd_add_devices(arizona->dev, -1, clearwater_devs, + ARRAY_SIZE(clearwater_devs), NULL, 0, NULL); break; } diff --git a/drivers/mfd/arizona-i2c.c b/drivers/mfd/arizona-i2c.c index cd93352458e..c5440d44514 100644 --- a/drivers/mfd/arizona-i2c.c +++ b/drivers/mfd/arizona-i2c.c @@ -59,11 +59,11 @@ static int arizona_i2c_probe(struct i2c_client *i2c, regmap_config = &wm8998_i2c_regmap; break; #endif -#ifdef CONFIG_MFD_WM8285 +#ifdef CONFIG_MFD_CLEARWATER case WM8285: case WM1840: - regmap_config = &wm8285_16bit_i2c_regmap; - regmap_32bit_config = &wm8285_32bit_i2c_regmap; + regmap_config = &clearwater_16bit_i2c_regmap; + regmap_32bit_config = &clearwater_32bit_i2c_regmap; break; #endif default: diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index 9b19906d7e1..d45bcfd359e 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -228,14 +228,14 @@ int arizona_irq_init(struct arizona *arizona) ctrlif_error = false; break; #endif -#ifdef CONFIG_MFD_WM8285 +#ifdef CONFIG_MFD_CLEARWATER case WM8285: case WM1840: - aod = &wm8285_irq; + aod = &clearwater_irq; irq = NULL; ctrlif_error = false; - irq_ctrl_reg = WM8285_IRQ1_CTRL; + irq_ctrl_reg = CLEARWATER_IRQ1_CTRL; break; #endif #ifdef CONFIG_MFD_CS47L24 diff --git a/drivers/mfd/arizona-spi.c b/drivers/mfd/arizona-spi.c index d0b2740a054..1dddc6c456a 100644 --- a/drivers/mfd/arizona-spi.c +++ b/drivers/mfd/arizona-spi.c @@ -49,11 +49,11 @@ static int arizona_spi_probe(struct spi_device *spi) regmap_config = &florida_spi_regmap; break; #endif -#ifdef CONFIG_MFD_WM8285 +#ifdef CONFIG_MFD_CLEARWATER case WM8285: case WM1840: - regmap_config = &wm8285_16bit_spi_regmap; - regmap_32bit_config = &wm8285_32bit_spi_regmap; + regmap_config = &clearwater_16bit_spi_regmap; + regmap_32bit_config = &clearwater_32bit_spi_regmap; break; #endif #ifdef CONFIG_MFD_CS47L24 diff --git a/drivers/mfd/arizona.h b/drivers/mfd/arizona.h index 6efbc3acd6b..ec54352c8ef 100644 --- a/drivers/mfd/arizona.h +++ b/drivers/mfd/arizona.h @@ -26,10 +26,10 @@ extern const struct regmap_config wm5102_spi_regmap; extern const struct regmap_config florida_i2c_regmap; extern const struct regmap_config florida_spi_regmap; -extern const struct regmap_config wm8285_16bit_i2c_regmap; -extern const struct regmap_config wm8285_16bit_spi_regmap; -extern const struct regmap_config wm8285_32bit_spi_regmap; -extern const struct regmap_config wm8285_32bit_i2c_regmap; +extern const struct regmap_config clearwater_16bit_i2c_regmap; +extern const struct regmap_config clearwater_16bit_spi_regmap; +extern const struct regmap_config clearwater_32bit_spi_regmap; +extern const struct regmap_config clearwater_32bit_i2c_regmap; extern const struct regmap_config wm8997_i2c_regmap; @@ -48,7 +48,7 @@ extern const struct regmap_irq_chip florida_aod; extern const struct regmap_irq_chip florida_irq; extern const struct regmap_irq_chip florida_revd_irq; -extern const struct regmap_irq_chip wm8285_irq; +extern const struct regmap_irq_chip clearwater_irq; extern const struct regmap_irq_chip wm8997_aod; extern const struct regmap_irq_chip wm8997_irq; diff --git a/drivers/mfd/wm8285-tables.c b/drivers/mfd/clearwater-tables.c similarity index 85% rename from drivers/mfd/wm8285-tables.c rename to drivers/mfd/clearwater-tables.c index a10dc1ac334..21049f71439 100644 --- a/drivers/mfd/wm8285-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -1,5 +1,5 @@ /* - * wm8285-tables.c -- data tables for WM8285 class codecs + * clearwater-tables.c -- data tables for CLEARWATER class codecs * * Copyright 2014 Wolfson Microelectronics plc * @@ -18,7 +18,7 @@ #include "arizona.h" -static const struct reg_default wm8285_reva_patch[] = { +static const struct reg_default clearwater_reva_patch[] = { { 0x80, 0x0003 }, { 0x213, 0x03E4 }, { 0x177, 0x0281 }, @@ -47,90 +47,90 @@ static const struct reg_default wm8285_reva_patch[] = { }; /* We use a function so we can use ARRAY_SIZE() */ -int wm8285_patch(struct arizona *arizona) +int clearwater_patch(struct arizona *arizona) { switch (arizona->rev) { default: return regmap_register_patch(arizona->regmap, - wm8285_reva_patch, - ARRAY_SIZE(wm8285_reva_patch)); + clearwater_reva_patch, + ARRAY_SIZE(clearwater_reva_patch)); } return 0; } -EXPORT_SYMBOL_GPL(wm8285_patch); +EXPORT_SYMBOL_GPL(clearwater_patch); -static const struct regmap_irq wm8285_irqs[ARIZONA_NUM_IRQ] = { +static const struct regmap_irq clearwater_irqs[ARIZONA_NUM_IRQ] = { [ARIZONA_IRQ_BOOT_DONE] = { .reg_offset = 0, - .mask = WM8285_BOOT_DONE_EINT1 }, + .mask = CLEARWATER_BOOT_DONE_EINT1 }, [ARIZONA_IRQ_CTRLIF_ERR] = { .reg_offset = 0, - .mask = WM8285_CTRLIF_ERR_EINT1 }, + .mask = CLEARWATER_CTRLIF_ERR_EINT1 }, [ARIZONA_IRQ_FLL1_CLOCK_OK] = { .reg_offset = 1, - .mask = WM8285_FLL1_LOCK_EINT1 }, + .mask = CLEARWATER_FLL1_LOCK_EINT1 }, [ARIZONA_IRQ_FLL2_CLOCK_OK] = { .reg_offset = 1, - .mask = WM8285_FLL2_LOCK_EINT1}, + .mask = CLEARWATER_FLL2_LOCK_EINT1}, [ARIZONA_IRQ_FLL3_CLOCK_OK] = { .reg_offset = 1, - .mask = WM8285_FLL3_LOCK_EINT1}, + .mask = CLEARWATER_FLL3_LOCK_EINT1}, [ARIZONA_IRQ_MICDET] = { .reg_offset = 5, - .mask = WM8285_MICDET_EINT1 }, + .mask = CLEARWATER_MICDET_EINT1 }, [ARIZONA_IRQ_HPDET] = { .reg_offset = 5, - .mask = WM8285_HPDET_EINT1}, + .mask = CLEARWATER_HPDET_EINT1}, [ARIZONA_IRQ_MICD_CLAMP_RISE] = { .reg_offset = 6, - .mask = WM8285_MICD_CLAMP_RISE_EINT1 }, + .mask = CLEARWATER_MICD_CLAMP_RISE_EINT1 }, [ARIZONA_IRQ_MICD_CLAMP_FALL] = { .reg_offset = 6, - .mask = WM8285_MICD_CLAMP_FALL_EINT1 }, + .mask = CLEARWATER_MICD_CLAMP_FALL_EINT1 }, [ARIZONA_IRQ_JD_FALL] = { .reg_offset = 6, - .mask = WM8285_JD1_FALL_EINT1 }, + .mask = CLEARWATER_JD1_FALL_EINT1 }, [ARIZONA_IRQ_JD_RISE] = { .reg_offset = 6, - .mask = WM8285_JD1_RISE_EINT1 }, + .mask = CLEARWATER_JD1_RISE_EINT1 }, [ARIZONA_IRQ_ASRC2_LOCK] = { .reg_offset = 8, - .mask = WM8285_ASRC2_IN1_LOCK_EINT1 }, + .mask = CLEARWATER_ASRC2_IN1_LOCK_EINT1 }, [ARIZONA_IRQ_ASRC1_LOCK] = { .reg_offset = 8, - .mask = WM8285_ASRC1_IN1_LOCK_EINT1 }, + .mask = CLEARWATER_ASRC1_IN1_LOCK_EINT1 }, [ARIZONA_IRQ_DRC2_SIG_DET] = { .reg_offset = 8, - .mask = WM8285_DRC2_SIG_DET_EINT1 }, + .mask = CLEARWATER_DRC2_SIG_DET_EINT1 }, [ARIZONA_IRQ_DRC1_SIG_DET] = { .reg_offset = 8, - .mask = WM8285_DRC1_SIG_DET_EINT1 }, + .mask = CLEARWATER_DRC1_SIG_DET_EINT1 }, [ARIZONA_IRQ_DSP_IRQ1] = { .reg_offset = 10, - .mask = WM8285_DSP_IRQ1_EINT1}, + .mask = CLEARWATER_DSP_IRQ1_EINT1}, [ARIZONA_IRQ_DSP_IRQ2] = { .reg_offset = 10, - .mask = WM8285_DSP_IRQ2_EINT1}, + .mask = CLEARWATER_DSP_IRQ2_EINT1}, [ARIZONA_IRQ_DSP_IRQ3] = { .reg_offset = 10, - .mask = WM8285_DSP_IRQ3_EINT1}, + .mask = CLEARWATER_DSP_IRQ3_EINT1}, [ARIZONA_IRQ_DSP_IRQ4] = { .reg_offset = 10, - .mask = WM8285_DSP_IRQ4_EINT1}, + .mask = CLEARWATER_DSP_IRQ4_EINT1}, [ARIZONA_IRQ_DSP_IRQ5] = { .reg_offset = 10, - .mask = WM8285_DSP_IRQ5_EINT1}, + .mask = CLEARWATER_DSP_IRQ5_EINT1}, [ARIZONA_IRQ_DSP_IRQ6] = { .reg_offset = 10, - .mask = WM8285_DSP_IRQ6_EINT1}, + .mask = CLEARWATER_DSP_IRQ6_EINT1}, [ARIZONA_IRQ_DSP_IRQ7] = { .reg_offset = 10, - .mask = WM8285_DSP_IRQ7_EINT1}, + .mask = CLEARWATER_DSP_IRQ7_EINT1}, [ARIZONA_IRQ_DSP_IRQ8] = { .reg_offset = 10, - .mask = WM8285_DSP_IRQ8_EINT1}, + .mask = CLEARWATER_DSP_IRQ8_EINT1}, [ARIZONA_IRQ_SPK_OVERHEAT_WARN] = { .reg_offset = 14, - .mask = WM8285_SPK_OVERHEAT_WARN_EINT1}, + .mask = CLEARWATER_SPK_OVERHEAT_WARN_EINT1}, [ARIZONA_IRQ_SPK_OVERHEAT] = { .reg_offset = 14, - .mask = WM8285_SPK_SHUTDOWN_EINT1}, + .mask = CLEARWATER_SPK_SHUTDOWN_EINT1}, }; -const struct regmap_irq_chip wm8285_irq = { - .name = "wm8285 IRQ", - .status_base = WM8285_IRQ1_STATUS_1, - .mask_base = WM8285_IRQ1_MASK_1, - .ack_base = WM8285_IRQ1_STATUS_1, +const struct regmap_irq_chip clearwater_irq = { + .name = "clearwater IRQ", + .status_base = CLEARWATER_IRQ1_STATUS_1, + .mask_base = CLEARWATER_IRQ1_MASK_1, + .ack_base = CLEARWATER_IRQ1_STATUS_1, .num_regs = 15, - .irqs = wm8285_irqs, - .num_irqs = ARRAY_SIZE(wm8285_irqs), + .irqs = clearwater_irqs, + .num_irqs = ARRAY_SIZE(clearwater_irqs), }; -EXPORT_SYMBOL_GPL(wm8285_irq); +EXPORT_SYMBOL_GPL(clearwater_irq); -static const struct reg_default wm8285_reg_default[] = { +static const struct reg_default clearwater_reg_default[] = { { 0x00000008, 0x0309 }, /* R8 - Ctrl IF CFG 1 */ { 0x00000009, 0x0200 }, /* R9 - Ctrl IF CFG 2 */ { 0x0000000A, 0x0309 }, /* R10 - Ctrl IF CFG 3 */ @@ -1546,7 +1546,7 @@ static const struct reg_default wm8285_reg_default[] = { { 0x00001A80, 0x4400 }, /* R6784 - IRQ1 CTRL */ }; -static bool wm8285_is_adsp_memory(struct device *dev, unsigned int reg) +static bool clearwater_is_adsp_memory(struct device *dev, unsigned int reg) { if ((reg >= 0x080000 && reg <= 0x085ffe) || (reg >= 0x0a0000 && reg <= 0x0a7ffe) || @@ -1583,7 +1583,7 @@ static bool wm8285_is_adsp_memory(struct device *dev, unsigned int reg) return false; } -static bool wm8285_16bit_readable_register(struct device *dev, unsigned int reg) +static bool clearwater_16bit_readable_register(struct device *dev, unsigned int reg) { switch (reg) { case ARIZONA_SOFTWARE_RESET: @@ -1639,8 +1639,8 @@ static bool wm8285_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: case ARIZONA_ASYNC_SAMPLE_RATE_2: case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: - case WM8285_DSP_CLOCK_1: - case WM8285_DSP_CLOCK_2: + case CLEARWATER_DSP_CLOCK_1: + case CLEARWATER_DSP_CLOCK_2: case ARIZONA_OUTPUT_SYSTEM_CLOCK: case ARIZONA_OUTPUT_ASYNC_CLOCK: case ARIZONA_RATE_ESTIMATOR_1: @@ -1718,7 +1718,7 @@ static bool wm8285_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_ACCESSORY_DETECT_MODE_1: case ARIZONA_HEADPHONE_DETECT_1: case ARIZONA_HEADPHONE_DETECT_2: - case WM8285_MICD_CLAMP_CONTROL: + case CLEARWATER_MICD_CLAMP_CONTROL: case ARIZONA_MIC_DETECT_1: case ARIZONA_MIC_DETECT_2: case ARIZONA_MIC_DETECT_3: @@ -1728,7 +1728,7 @@ static bool wm8285_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_MIC_DETECT_LEVEL_3: case ARIZONA_MIC_DETECT_LEVEL_4: case ARIZONA_MIC_NOISE_MIX_CONTROL_1: - case WM8285_GP_SWITCH_1: + case CLEARWATER_GP_SWITCH_1: case ARIZONA_ISOLATION_CONTROL: case ARIZONA_JACK_DETECT_ANALOGUE: case ARIZONA_INPUT_ENABLES: @@ -1833,7 +1833,7 @@ static bool wm8285_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DAC_VOLUME_LIMIT_6R: case ARIZONA_NOISE_GATE_SELECT_6R: case ARIZONA_DRE_ENABLE: - case WM8285_EDRE_ENABLE: + case CLEARWATER_EDRE_ENABLE: case ARIZONA_DAC_AEC_CONTROL_1: case ARIZONA_NOISE_GATE_CONTROL: case ARIZONA_PDM_SPK1_CTRL_1: @@ -2467,36 +2467,36 @@ static bool wm8285_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DSP4AUX4MIX_INPUT_1_SOURCE: case ARIZONA_DSP4AUX5MIX_INPUT_1_SOURCE: case ARIZONA_DSP4AUX6MIX_INPUT_1_SOURCE: - case WM8285_DSP5LMIX_INPUT_1_SOURCE: - case WM8285_DSP5LMIX_INPUT_1_VOLUME: - case WM8285_DSP5LMIX_INPUT_2_SOURCE: - case WM8285_DSP5LMIX_INPUT_2_VOLUME: - case WM8285_DSP5LMIX_INPUT_3_SOURCE: - case WM8285_DSP5LMIX_INPUT_3_VOLUME: - case WM8285_DSP5LMIX_INPUT_4_SOURCE: - case WM8285_DSP5LMIX_INPUT_4_VOLUME: - case WM8285_DSP5RMIX_INPUT_1_SOURCE: - case WM8285_DSP5RMIX_INPUT_1_VOLUME: - case WM8285_DSP5RMIX_INPUT_2_SOURCE: - case WM8285_DSP5RMIX_INPUT_2_VOLUME: - case WM8285_DSP5RMIX_INPUT_3_SOURCE: - case WM8285_DSP5RMIX_INPUT_3_VOLUME: - case WM8285_DSP5RMIX_INPUT_4_SOURCE: - case WM8285_DSP5RMIX_INPUT_4_VOLUME: - case WM8285_DSP5AUX1MIX_INPUT_1_SOURCE: - case WM8285_DSP5AUX2MIX_INPUT_1_SOURCE: - case WM8285_DSP5AUX3MIX_INPUT_1_SOURCE: - case WM8285_DSP5AUX4MIX_INPUT_1_SOURCE: - case WM8285_DSP5AUX5MIX_INPUT_1_SOURCE: - case WM8285_DSP5AUX6MIX_INPUT_1_SOURCE: - case WM8285_ASRC1_1LMIX_INPUT_1_SOURCE: - case WM8285_ASRC1_1RMIX_INPUT_1_SOURCE: - case WM8285_ASRC1_2LMIX_INPUT_1_SOURCE: - case WM8285_ASRC1_2RMIX_INPUT_1_SOURCE: - case WM8285_ASRC2_1LMIX_INPUT_1_SOURCE: - case WM8285_ASRC2_1RMIX_INPUT_1_SOURCE: - case WM8285_ASRC2_2LMIX_INPUT_1_SOURCE: - case WM8285_ASRC2_2RMIX_INPUT_1_SOURCE: + case CLEARWATER_DSP5LMIX_INPUT_1_SOURCE: + case CLEARWATER_DSP5LMIX_INPUT_1_VOLUME: + case CLEARWATER_DSP5LMIX_INPUT_2_SOURCE: + case CLEARWATER_DSP5LMIX_INPUT_2_VOLUME: + case CLEARWATER_DSP5LMIX_INPUT_3_SOURCE: + case CLEARWATER_DSP5LMIX_INPUT_3_VOLUME: + case CLEARWATER_DSP5LMIX_INPUT_4_SOURCE: + case CLEARWATER_DSP5LMIX_INPUT_4_VOLUME: + case CLEARWATER_DSP5RMIX_INPUT_1_SOURCE: + case CLEARWATER_DSP5RMIX_INPUT_1_VOLUME: + case CLEARWATER_DSP5RMIX_INPUT_2_SOURCE: + case CLEARWATER_DSP5RMIX_INPUT_2_VOLUME: + case CLEARWATER_DSP5RMIX_INPUT_3_SOURCE: + case CLEARWATER_DSP5RMIX_INPUT_3_VOLUME: + case CLEARWATER_DSP5RMIX_INPUT_4_SOURCE: + case CLEARWATER_DSP5RMIX_INPUT_4_VOLUME: + case CLEARWATER_DSP5AUX1MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP5AUX2MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP5AUX3MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP5AUX4MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP5AUX5MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP5AUX6MIX_INPUT_1_SOURCE: + case CLEARWATER_ASRC1_1LMIX_INPUT_1_SOURCE: + case CLEARWATER_ASRC1_1RMIX_INPUT_1_SOURCE: + case CLEARWATER_ASRC1_2LMIX_INPUT_1_SOURCE: + case CLEARWATER_ASRC1_2RMIX_INPUT_1_SOURCE: + case CLEARWATER_ASRC2_1LMIX_INPUT_1_SOURCE: + case CLEARWATER_ASRC2_1RMIX_INPUT_1_SOURCE: + case CLEARWATER_ASRC2_2LMIX_INPUT_1_SOURCE: + case CLEARWATER_ASRC2_2RMIX_INPUT_1_SOURCE: case ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE: case ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE: case ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE: @@ -2525,50 +2525,50 @@ static bool wm8285_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_ISRC4DEC2MIX_INPUT_1_SOURCE: case ARIZONA_ISRC4INT1MIX_INPUT_1_SOURCE: case ARIZONA_ISRC4INT2MIX_INPUT_1_SOURCE: - case WM8285_DSP6LMIX_INPUT_1_SOURCE: - case WM8285_DSP6LMIX_INPUT_1_VOLUME: - case WM8285_DSP6LMIX_INPUT_2_SOURCE: - case WM8285_DSP6LMIX_INPUT_2_VOLUME: - case WM8285_DSP6LMIX_INPUT_3_SOURCE: - case WM8285_DSP6LMIX_INPUT_3_VOLUME: - case WM8285_DSP6LMIX_INPUT_4_SOURCE: - case WM8285_DSP6LMIX_INPUT_4_VOLUME: - case WM8285_DSP6RMIX_INPUT_1_SOURCE: - case WM8285_DSP6RMIX_INPUT_1_VOLUME: - case WM8285_DSP6RMIX_INPUT_2_SOURCE: - case WM8285_DSP6RMIX_INPUT_2_VOLUME: - case WM8285_DSP6RMIX_INPUT_3_SOURCE: - case WM8285_DSP6RMIX_INPUT_3_VOLUME: - case WM8285_DSP6RMIX_INPUT_4_SOURCE: - case WM8285_DSP6RMIX_INPUT_4_VOLUME: - case WM8285_DSP6AUX1MIX_INPUT_1_SOURCE: - case WM8285_DSP6AUX2MIX_INPUT_1_SOURCE: - case WM8285_DSP6AUX3MIX_INPUT_1_SOURCE: - case WM8285_DSP6AUX4MIX_INPUT_1_SOURCE: - case WM8285_DSP6AUX5MIX_INPUT_1_SOURCE: - case WM8285_DSP6AUX6MIX_INPUT_1_SOURCE: - case WM8285_DSP7LMIX_INPUT_1_SOURCE: - case WM8285_DSP7LMIX_INPUT_1_VOLUME: - case WM8285_DSP7LMIX_INPUT_2_SOURCE: - case WM8285_DSP7LMIX_INPUT_2_VOLUME: - case WM8285_DSP7LMIX_INPUT_3_SOURCE: - case WM8285_DSP7LMIX_INPUT_3_VOLUME: - case WM8285_DSP7LMIX_INPUT_4_SOURCE: - case WM8285_DSP7LMIX_INPUT_4_VOLUME: - case WM8285_DSP7RMIX_INPUT_1_SOURCE: - case WM8285_DSP7RMIX_INPUT_1_VOLUME: - case WM8285_DSP7RMIX_INPUT_2_SOURCE: - case WM8285_DSP7RMIX_INPUT_2_VOLUME: - case WM8285_DSP7RMIX_INPUT_3_SOURCE: - case WM8285_DSP7RMIX_INPUT_3_VOLUME: - case WM8285_DSP7RMIX_INPUT_4_SOURCE: - case WM8285_DSP7RMIX_INPUT_4_VOLUME: - case WM8285_DSP7AUX1MIX_INPUT_1_SOURCE: - case WM8285_DSP7AUX2MIX_INPUT_1_SOURCE: - case WM8285_DSP7AUX3MIX_INPUT_1_SOURCE: - case WM8285_DSP7AUX4MIX_INPUT_1_SOURCE: - case WM8285_DSP7AUX5MIX_INPUT_1_SOURCE: - case WM8285_DSP7AUX6MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP6LMIX_INPUT_1_SOURCE: + case CLEARWATER_DSP6LMIX_INPUT_1_VOLUME: + case CLEARWATER_DSP6LMIX_INPUT_2_SOURCE: + case CLEARWATER_DSP6LMIX_INPUT_2_VOLUME: + case CLEARWATER_DSP6LMIX_INPUT_3_SOURCE: + case CLEARWATER_DSP6LMIX_INPUT_3_VOLUME: + case CLEARWATER_DSP6LMIX_INPUT_4_SOURCE: + case CLEARWATER_DSP6LMIX_INPUT_4_VOLUME: + case CLEARWATER_DSP6RMIX_INPUT_1_SOURCE: + case CLEARWATER_DSP6RMIX_INPUT_1_VOLUME: + case CLEARWATER_DSP6RMIX_INPUT_2_SOURCE: + case CLEARWATER_DSP6RMIX_INPUT_2_VOLUME: + case CLEARWATER_DSP6RMIX_INPUT_3_SOURCE: + case CLEARWATER_DSP6RMIX_INPUT_3_VOLUME: + case CLEARWATER_DSP6RMIX_INPUT_4_SOURCE: + case CLEARWATER_DSP6RMIX_INPUT_4_VOLUME: + case CLEARWATER_DSP6AUX1MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP6AUX2MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP6AUX3MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP6AUX4MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP6AUX5MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP6AUX6MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP7LMIX_INPUT_1_SOURCE: + case CLEARWATER_DSP7LMIX_INPUT_1_VOLUME: + case CLEARWATER_DSP7LMIX_INPUT_2_SOURCE: + case CLEARWATER_DSP7LMIX_INPUT_2_VOLUME: + case CLEARWATER_DSP7LMIX_INPUT_3_SOURCE: + case CLEARWATER_DSP7LMIX_INPUT_3_VOLUME: + case CLEARWATER_DSP7LMIX_INPUT_4_SOURCE: + case CLEARWATER_DSP7LMIX_INPUT_4_VOLUME: + case CLEARWATER_DSP7RMIX_INPUT_1_SOURCE: + case CLEARWATER_DSP7RMIX_INPUT_1_VOLUME: + case CLEARWATER_DSP7RMIX_INPUT_2_SOURCE: + case CLEARWATER_DSP7RMIX_INPUT_2_VOLUME: + case CLEARWATER_DSP7RMIX_INPUT_3_SOURCE: + case CLEARWATER_DSP7RMIX_INPUT_3_VOLUME: + case CLEARWATER_DSP7RMIX_INPUT_4_SOURCE: + case CLEARWATER_DSP7RMIX_INPUT_4_VOLUME: + case CLEARWATER_DSP7AUX1MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP7AUX2MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP7AUX3MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP7AUX4MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP7AUX5MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP7AUX6MIX_INPUT_1_SOURCE: case ARIZONA_JACK_DETECT_DEBOUNCE: case ARIZONA_FX_CTRL1: case ARIZONA_FX_CTRL2: @@ -2661,11 +2661,11 @@ static bool wm8285_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DRC1_CTRL3: case ARIZONA_DRC1_CTRL4: case ARIZONA_DRC1_CTRL5: - case WM8285_DRC2_CTRL1: - case WM8285_DRC2_CTRL2: - case WM8285_DRC2_CTRL3: - case WM8285_DRC2_CTRL4: - case WM8285_DRC2_CTRL5: + case CLEARWATER_DRC2_CTRL1: + case CLEARWATER_DRC2_CTRL2: + case CLEARWATER_DRC2_CTRL3: + case CLEARWATER_DRC2_CTRL4: + case CLEARWATER_DRC2_CTRL5: case ARIZONA_HPLPF1_1: case ARIZONA_HPLPF1_2: case ARIZONA_HPLPF2_1: @@ -2674,14 +2674,14 @@ static bool wm8285_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_HPLPF3_2: case ARIZONA_HPLPF4_1: case ARIZONA_HPLPF4_2: - case WM8285_ASRC1_ENABLE: - case WM8285_ASRC1_STATUS: - case WM8285_ASRC1_RATE1: - case WM8285_ASRC1_RATE2: - case WM8285_ASRC2_ENABLE: - case WM8285_ASRC2_STATUS: - case WM8285_ASRC2_RATE1: - case WM8285_ASRC2_RATE2: + case CLEARWATER_ASRC1_ENABLE: + case CLEARWATER_ASRC1_STATUS: + case CLEARWATER_ASRC1_RATE1: + case CLEARWATER_ASRC1_RATE2: + case CLEARWATER_ASRC2_ENABLE: + case CLEARWATER_ASRC2_STATUS: + case CLEARWATER_ASRC2_RATE1: + case CLEARWATER_ASRC2_RATE2: case ARIZONA_ISRC_1_CTRL_1: case ARIZONA_ISRC_1_CTRL_2: case ARIZONA_ISRC_1_CTRL_3: @@ -2701,221 +2701,221 @@ static bool wm8285_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_FCL_FILTER_CONTROL: case ARIZONA_FCL_ADC_REFORMATTER_CONTROL: case ARIZONA_FCL_COEFF_START ... ARIZONA_FCL_COEFF_END: - case WM8285_FCR_FILTER_CONTROL: - case WM8285_FCR_ADC_REFORMATTER_CONTROL: - case WM8285_FCR_COEFF_START ... WM8285_FCR_COEFF_END: - case WM8285_DAC_COMP_1: - case WM8285_DAC_COMP_2: - case WM8285_FRF_COEFFICIENT_1L_1: - case WM8285_FRF_COEFFICIENT_1L_2: - case WM8285_FRF_COEFFICIENT_1L_3: - case WM8285_FRF_COEFFICIENT_1L_4: - case WM8285_FRF_COEFFICIENT_1R_1: - case WM8285_FRF_COEFFICIENT_1R_2: - case WM8285_FRF_COEFFICIENT_1R_3: - case WM8285_FRF_COEFFICIENT_1R_4: - case WM8285_FRF_COEFFICIENT_2L_1: - case WM8285_FRF_COEFFICIENT_2L_2: - case WM8285_FRF_COEFFICIENT_2L_3: - case WM8285_FRF_COEFFICIENT_2L_4: - case WM8285_FRF_COEFFICIENT_2R_1: - case WM8285_FRF_COEFFICIENT_2R_2: - case WM8285_FRF_COEFFICIENT_2R_3: - case WM8285_FRF_COEFFICIENT_2R_4: - case WM8285_FRF_COEFFICIENT_3L_1: - case WM8285_FRF_COEFFICIENT_3L_2: - case WM8285_FRF_COEFFICIENT_3L_3: - case WM8285_FRF_COEFFICIENT_3L_4: - case WM8285_FRF_COEFFICIENT_3R_1: - case WM8285_FRF_COEFFICIENT_3R_2: - case WM8285_FRF_COEFFICIENT_3R_3: - case WM8285_FRF_COEFFICIENT_3R_4: - case WM8285_FRF_COEFFICIENT_4L_1: - case WM8285_FRF_COEFFICIENT_4L_2: - case WM8285_FRF_COEFFICIENT_4L_3: - case WM8285_FRF_COEFFICIENT_4L_4: - case WM8285_FRF_COEFFICIENT_4R_1: - case WM8285_FRF_COEFFICIENT_4R_2: - case WM8285_FRF_COEFFICIENT_4R_3: - case WM8285_FRF_COEFFICIENT_4R_4: - case WM8285_FRF_COEFFICIENT_5L_1: - case WM8285_FRF_COEFFICIENT_5L_2: - case WM8285_FRF_COEFFICIENT_5L_3: - case WM8285_FRF_COEFFICIENT_5L_4: - case WM8285_FRF_COEFFICIENT_5R_1: - case WM8285_FRF_COEFFICIENT_5R_2: - case WM8285_FRF_COEFFICIENT_5R_3: - case WM8285_FRF_COEFFICIENT_5R_4: - case WM8285_FRF_COEFFICIENT_6L_1: - case WM8285_FRF_COEFFICIENT_6L_2: - case WM8285_FRF_COEFFICIENT_6L_3: - case WM8285_FRF_COEFFICIENT_6L_4: - case WM8285_FRF_COEFFICIENT_6R_1: - case WM8285_FRF_COEFFICIENT_6R_2: - case WM8285_FRF_COEFFICIENT_6R_3: - case WM8285_FRF_COEFFICIENT_6R_4: - case WM8285_GPIO1_CTRL_1: - case WM8285_GPIO1_CTRL_2: - case WM8285_GPIO2_CTRL_1: - case WM8285_GPIO2_CTRL_2: - case WM8285_GPIO3_CTRL_1: - case WM8285_GPIO3_CTRL_2: - case WM8285_GPIO4_CTRL_1: - case WM8285_GPIO4_CTRL_2: - case WM8285_GPIO5_CTRL_1: - case WM8285_GPIO5_CTRL_2: - case WM8285_GPIO6_CTRL_1: - case WM8285_GPIO6_CTRL_2: - case WM8285_GPIO7_CTRL_1: - case WM8285_GPIO7_CTRL_2: - case WM8285_GPIO8_CTRL_1: - case WM8285_GPIO8_CTRL_2: - case WM8285_GPIO9_CTRL_1: - case WM8285_GPIO9_CTRL_2: - case WM8285_GPIO10_CTRL_1: - case WM8285_GPIO10_CTRL_2: - case WM8285_GPIO11_CTRL_1: - case WM8285_GPIO11_CTRL_2: - case WM8285_GPIO12_CTRL_1: - case WM8285_GPIO12_CTRL_2: - case WM8285_GPIO13_CTRL_1: - case WM8285_GPIO13_CTRL_2: - case WM8285_GPIO14_CTRL_1: - case WM8285_GPIO14_CTRL_2: - case WM8285_GPIO15_CTRL_1: - case WM8285_GPIO15_CTRL_2: - case WM8285_GPIO16_CTRL_1: - case WM8285_GPIO16_CTRL_2: - case WM8285_GPIO17_CTRL_1: - case WM8285_GPIO17_CTRL_2: - case WM8285_GPIO18_CTRL_1: - case WM8285_GPIO18_CTRL_2: - case WM8285_GPIO19_CTRL_1: - case WM8285_GPIO19_CTRL_2: - case WM8285_GPIO20_CTRL_1: - case WM8285_GPIO20_CTRL_2: - case WM8285_GPIO21_CTRL_1: - case WM8285_GPIO21_CTRL_2: - case WM8285_GPIO22_CTRL_1: - case WM8285_GPIO22_CTRL_2: - case WM8285_GPIO23_CTRL_1: - case WM8285_GPIO23_CTRL_2: - case WM8285_GPIO24_CTRL_1: - case WM8285_GPIO24_CTRL_2: - case WM8285_GPIO25_CTRL_1: - case WM8285_GPIO25_CTRL_2: - case WM8285_GPIO26_CTRL_1: - case WM8285_GPIO26_CTRL_2: - case WM8285_GPIO27_CTRL_1: - case WM8285_GPIO27_CTRL_2: - case WM8285_GPIO28_CTRL_1: - case WM8285_GPIO28_CTRL_2: - case WM8285_GPIO29_CTRL_1: - case WM8285_GPIO29_CTRL_2: - case WM8285_GPIO30_CTRL_1: - case WM8285_GPIO30_CTRL_2: - case WM8285_GPIO31_CTRL_1: - case WM8285_GPIO31_CTRL_2: - case WM8285_GPIO32_CTRL_1: - case WM8285_GPIO32_CTRL_2: - case WM8285_GPIO33_CTRL_1: - case WM8285_GPIO33_CTRL_2: - case WM8285_GPIO34_CTRL_1: - case WM8285_GPIO34_CTRL_2: - case WM8285_GPIO35_CTRL_1: - case WM8285_GPIO35_CTRL_2: - case WM8285_GPIO36_CTRL_1: - case WM8285_GPIO36_CTRL_2: - case WM8285_GPIO37_CTRL_1: - case WM8285_GPIO37_CTRL_2: - case WM8285_GPIO38_CTRL_1: - case WM8285_GPIO38_CTRL_2: - case WM8285_GPIO39_CTRL_1: - case WM8285_GPIO39_CTRL_2: - case WM8285_GPIO40_CTRL_1: - case WM8285_GPIO40_CTRL_2: - case WM8285_IRQ1_STATUS_1: - case WM8285_IRQ1_STATUS_2: - case WM8285_IRQ1_STATUS_6: - case WM8285_IRQ1_STATUS_7: - case WM8285_IRQ1_STATUS_9: - case WM8285_IRQ1_STATUS_11: - case WM8285_IRQ1_STATUS_12: - case WM8285_IRQ1_STATUS_13: - case WM8285_IRQ1_STATUS_14: - case WM8285_IRQ1_STATUS_15: - case WM8285_IRQ1_STATUS_17: - case WM8285_IRQ1_STATUS_18: - case WM8285_IRQ1_STATUS_19: - case WM8285_IRQ1_STATUS_21: - case WM8285_IRQ1_STATUS_22: - case WM8285_IRQ1_STATUS_23: - case WM8285_IRQ1_STATUS_24: - case WM8285_IRQ1_STATUS_25: - case WM8285_IRQ1_STATUS_27: - case WM8285_IRQ1_STATUS_28: - case WM8285_IRQ1_STATUS_30: - case WM8285_IRQ1_STATUS_31: - case WM8285_IRQ1_STATUS_32: - case WM8285_IRQ1_MASK_1: - case WM8285_IRQ1_MASK_2: - case WM8285_IRQ1_MASK_3: - case WM8285_IRQ1_MASK_4: - case WM8285_IRQ1_MASK_5: - case WM8285_IRQ1_MASK_6: - case WM8285_IRQ1_MASK_7: - case WM8285_IRQ1_MASK_8: - case WM8285_IRQ1_MASK_9: - case WM8285_IRQ1_MASK_10: - case WM8285_IRQ1_MASK_11: - case WM8285_IRQ1_MASK_12: - case WM8285_IRQ1_MASK_13: - case WM8285_IRQ1_MASK_14: - case WM8285_IRQ1_MASK_15: - case WM8285_IRQ1_MASK_17: - case WM8285_IRQ1_MASK_18: - case WM8285_IRQ1_MASK_19: - case WM8285_IRQ1_MASK_21: - case WM8285_IRQ1_MASK_22: - case WM8285_IRQ1_MASK_23: - case WM8285_IRQ1_MASK_24: - case WM8285_IRQ1_MASK_25: - case WM8285_IRQ1_MASK_27: - case WM8285_IRQ1_MASK_28: - case WM8285_IRQ1_MASK_30: - case WM8285_IRQ1_MASK_31: - case WM8285_IRQ1_MASK_32: - case WM8285_IRQ1_RAW_STATUS_1: - case WM8285_IRQ1_RAW_STATUS_2: - case WM8285_IRQ1_RAW_STATUS_7: - case WM8285_IRQ1_RAW_STATUS_9: - case WM8285_IRQ1_RAW_STATUS_11: - case WM8285_IRQ1_RAW_STATUS_12: - case WM8285_IRQ1_RAW_STATUS_13: - case WM8285_IRQ1_RAW_STATUS_14: - case WM8285_IRQ1_RAW_STATUS_15: - case WM8285_IRQ1_RAW_STATUS_17: - case WM8285_IRQ1_RAW_STATUS_18: - case WM8285_IRQ1_RAW_STATUS_19: - case WM8285_IRQ1_RAW_STATUS_21: - case WM8285_IRQ1_RAW_STATUS_22: - case WM8285_IRQ1_RAW_STATUS_23: - case WM8285_IRQ1_RAW_STATUS_24: - case WM8285_IRQ1_RAW_STATUS_25: - case WM8285_IRQ1_RAW_STATUS_30: - case WM8285_IRQ1_RAW_STATUS_31: - case WM8285_IRQ1_RAW_STATUS_32: - case WM8285_IRQ2_STATUS_9: - case WM8285_IRQ2_MASK_9: - case WM8285_IRQ2_RAW_STATUS_9: - case WM8285_IRQ1_CTRL: + case CLEARWATER_FCR_FILTER_CONTROL: + case CLEARWATER_FCR_ADC_REFORMATTER_CONTROL: + case CLEARWATER_FCR_COEFF_START ... CLEARWATER_FCR_COEFF_END: + case CLEARWATER_DAC_COMP_1: + case CLEARWATER_DAC_COMP_2: + case CLEARWATER_FRF_COEFFICIENT_1L_1: + case CLEARWATER_FRF_COEFFICIENT_1L_2: + case CLEARWATER_FRF_COEFFICIENT_1L_3: + case CLEARWATER_FRF_COEFFICIENT_1L_4: + case CLEARWATER_FRF_COEFFICIENT_1R_1: + case CLEARWATER_FRF_COEFFICIENT_1R_2: + case CLEARWATER_FRF_COEFFICIENT_1R_3: + case CLEARWATER_FRF_COEFFICIENT_1R_4: + case CLEARWATER_FRF_COEFFICIENT_2L_1: + case CLEARWATER_FRF_COEFFICIENT_2L_2: + case CLEARWATER_FRF_COEFFICIENT_2L_3: + case CLEARWATER_FRF_COEFFICIENT_2L_4: + case CLEARWATER_FRF_COEFFICIENT_2R_1: + case CLEARWATER_FRF_COEFFICIENT_2R_2: + case CLEARWATER_FRF_COEFFICIENT_2R_3: + case CLEARWATER_FRF_COEFFICIENT_2R_4: + case CLEARWATER_FRF_COEFFICIENT_3L_1: + case CLEARWATER_FRF_COEFFICIENT_3L_2: + case CLEARWATER_FRF_COEFFICIENT_3L_3: + case CLEARWATER_FRF_COEFFICIENT_3L_4: + case CLEARWATER_FRF_COEFFICIENT_3R_1: + case CLEARWATER_FRF_COEFFICIENT_3R_2: + case CLEARWATER_FRF_COEFFICIENT_3R_3: + case CLEARWATER_FRF_COEFFICIENT_3R_4: + case CLEARWATER_FRF_COEFFICIENT_4L_1: + case CLEARWATER_FRF_COEFFICIENT_4L_2: + case CLEARWATER_FRF_COEFFICIENT_4L_3: + case CLEARWATER_FRF_COEFFICIENT_4L_4: + case CLEARWATER_FRF_COEFFICIENT_4R_1: + case CLEARWATER_FRF_COEFFICIENT_4R_2: + case CLEARWATER_FRF_COEFFICIENT_4R_3: + case CLEARWATER_FRF_COEFFICIENT_4R_4: + case CLEARWATER_FRF_COEFFICIENT_5L_1: + case CLEARWATER_FRF_COEFFICIENT_5L_2: + case CLEARWATER_FRF_COEFFICIENT_5L_3: + case CLEARWATER_FRF_COEFFICIENT_5L_4: + case CLEARWATER_FRF_COEFFICIENT_5R_1: + case CLEARWATER_FRF_COEFFICIENT_5R_2: + case CLEARWATER_FRF_COEFFICIENT_5R_3: + case CLEARWATER_FRF_COEFFICIENT_5R_4: + case CLEARWATER_FRF_COEFFICIENT_6L_1: + case CLEARWATER_FRF_COEFFICIENT_6L_2: + case CLEARWATER_FRF_COEFFICIENT_6L_3: + case CLEARWATER_FRF_COEFFICIENT_6L_4: + case CLEARWATER_FRF_COEFFICIENT_6R_1: + case CLEARWATER_FRF_COEFFICIENT_6R_2: + case CLEARWATER_FRF_COEFFICIENT_6R_3: + case CLEARWATER_FRF_COEFFICIENT_6R_4: + case CLEARWATER_GPIO1_CTRL_1: + case CLEARWATER_GPIO1_CTRL_2: + case CLEARWATER_GPIO2_CTRL_1: + case CLEARWATER_GPIO2_CTRL_2: + case CLEARWATER_GPIO3_CTRL_1: + case CLEARWATER_GPIO3_CTRL_2: + case CLEARWATER_GPIO4_CTRL_1: + case CLEARWATER_GPIO4_CTRL_2: + case CLEARWATER_GPIO5_CTRL_1: + case CLEARWATER_GPIO5_CTRL_2: + case CLEARWATER_GPIO6_CTRL_1: + case CLEARWATER_GPIO6_CTRL_2: + case CLEARWATER_GPIO7_CTRL_1: + case CLEARWATER_GPIO7_CTRL_2: + case CLEARWATER_GPIO8_CTRL_1: + case CLEARWATER_GPIO8_CTRL_2: + case CLEARWATER_GPIO9_CTRL_1: + case CLEARWATER_GPIO9_CTRL_2: + case CLEARWATER_GPIO10_CTRL_1: + case CLEARWATER_GPIO10_CTRL_2: + case CLEARWATER_GPIO11_CTRL_1: + case CLEARWATER_GPIO11_CTRL_2: + case CLEARWATER_GPIO12_CTRL_1: + case CLEARWATER_GPIO12_CTRL_2: + case CLEARWATER_GPIO13_CTRL_1: + case CLEARWATER_GPIO13_CTRL_2: + case CLEARWATER_GPIO14_CTRL_1: + case CLEARWATER_GPIO14_CTRL_2: + case CLEARWATER_GPIO15_CTRL_1: + case CLEARWATER_GPIO15_CTRL_2: + case CLEARWATER_GPIO16_CTRL_1: + case CLEARWATER_GPIO16_CTRL_2: + case CLEARWATER_GPIO17_CTRL_1: + case CLEARWATER_GPIO17_CTRL_2: + case CLEARWATER_GPIO18_CTRL_1: + case CLEARWATER_GPIO18_CTRL_2: + case CLEARWATER_GPIO19_CTRL_1: + case CLEARWATER_GPIO19_CTRL_2: + case CLEARWATER_GPIO20_CTRL_1: + case CLEARWATER_GPIO20_CTRL_2: + case CLEARWATER_GPIO21_CTRL_1: + case CLEARWATER_GPIO21_CTRL_2: + case CLEARWATER_GPIO22_CTRL_1: + case CLEARWATER_GPIO22_CTRL_2: + case CLEARWATER_GPIO23_CTRL_1: + case CLEARWATER_GPIO23_CTRL_2: + case CLEARWATER_GPIO24_CTRL_1: + case CLEARWATER_GPIO24_CTRL_2: + case CLEARWATER_GPIO25_CTRL_1: + case CLEARWATER_GPIO25_CTRL_2: + case CLEARWATER_GPIO26_CTRL_1: + case CLEARWATER_GPIO26_CTRL_2: + case CLEARWATER_GPIO27_CTRL_1: + case CLEARWATER_GPIO27_CTRL_2: + case CLEARWATER_GPIO28_CTRL_1: + case CLEARWATER_GPIO28_CTRL_2: + case CLEARWATER_GPIO29_CTRL_1: + case CLEARWATER_GPIO29_CTRL_2: + case CLEARWATER_GPIO30_CTRL_1: + case CLEARWATER_GPIO30_CTRL_2: + case CLEARWATER_GPIO31_CTRL_1: + case CLEARWATER_GPIO31_CTRL_2: + case CLEARWATER_GPIO32_CTRL_1: + case CLEARWATER_GPIO32_CTRL_2: + case CLEARWATER_GPIO33_CTRL_1: + case CLEARWATER_GPIO33_CTRL_2: + case CLEARWATER_GPIO34_CTRL_1: + case CLEARWATER_GPIO34_CTRL_2: + case CLEARWATER_GPIO35_CTRL_1: + case CLEARWATER_GPIO35_CTRL_2: + case CLEARWATER_GPIO36_CTRL_1: + case CLEARWATER_GPIO36_CTRL_2: + case CLEARWATER_GPIO37_CTRL_1: + case CLEARWATER_GPIO37_CTRL_2: + case CLEARWATER_GPIO38_CTRL_1: + case CLEARWATER_GPIO38_CTRL_2: + case CLEARWATER_GPIO39_CTRL_1: + case CLEARWATER_GPIO39_CTRL_2: + case CLEARWATER_GPIO40_CTRL_1: + case CLEARWATER_GPIO40_CTRL_2: + case CLEARWATER_IRQ1_STATUS_1: + case CLEARWATER_IRQ1_STATUS_2: + case CLEARWATER_IRQ1_STATUS_6: + case CLEARWATER_IRQ1_STATUS_7: + case CLEARWATER_IRQ1_STATUS_9: + case CLEARWATER_IRQ1_STATUS_11: + case CLEARWATER_IRQ1_STATUS_12: + case CLEARWATER_IRQ1_STATUS_13: + case CLEARWATER_IRQ1_STATUS_14: + case CLEARWATER_IRQ1_STATUS_15: + case CLEARWATER_IRQ1_STATUS_17: + case CLEARWATER_IRQ1_STATUS_18: + case CLEARWATER_IRQ1_STATUS_19: + case CLEARWATER_IRQ1_STATUS_21: + case CLEARWATER_IRQ1_STATUS_22: + case CLEARWATER_IRQ1_STATUS_23: + case CLEARWATER_IRQ1_STATUS_24: + case CLEARWATER_IRQ1_STATUS_25: + case CLEARWATER_IRQ1_STATUS_27: + case CLEARWATER_IRQ1_STATUS_28: + case CLEARWATER_IRQ1_STATUS_30: + case CLEARWATER_IRQ1_STATUS_31: + case CLEARWATER_IRQ1_STATUS_32: + case CLEARWATER_IRQ1_MASK_1: + case CLEARWATER_IRQ1_MASK_2: + case CLEARWATER_IRQ1_MASK_3: + case CLEARWATER_IRQ1_MASK_4: + case CLEARWATER_IRQ1_MASK_5: + case CLEARWATER_IRQ1_MASK_6: + case CLEARWATER_IRQ1_MASK_7: + case CLEARWATER_IRQ1_MASK_8: + case CLEARWATER_IRQ1_MASK_9: + case CLEARWATER_IRQ1_MASK_10: + case CLEARWATER_IRQ1_MASK_11: + case CLEARWATER_IRQ1_MASK_12: + case CLEARWATER_IRQ1_MASK_13: + case CLEARWATER_IRQ1_MASK_14: + case CLEARWATER_IRQ1_MASK_15: + case CLEARWATER_IRQ1_MASK_17: + case CLEARWATER_IRQ1_MASK_18: + case CLEARWATER_IRQ1_MASK_19: + case CLEARWATER_IRQ1_MASK_21: + case CLEARWATER_IRQ1_MASK_22: + case CLEARWATER_IRQ1_MASK_23: + case CLEARWATER_IRQ1_MASK_24: + case CLEARWATER_IRQ1_MASK_25: + case CLEARWATER_IRQ1_MASK_27: + case CLEARWATER_IRQ1_MASK_28: + case CLEARWATER_IRQ1_MASK_30: + case CLEARWATER_IRQ1_MASK_31: + case CLEARWATER_IRQ1_MASK_32: + case CLEARWATER_IRQ1_RAW_STATUS_1: + case CLEARWATER_IRQ1_RAW_STATUS_2: + case CLEARWATER_IRQ1_RAW_STATUS_7: + case CLEARWATER_IRQ1_RAW_STATUS_9: + case CLEARWATER_IRQ1_RAW_STATUS_11: + case CLEARWATER_IRQ1_RAW_STATUS_12: + case CLEARWATER_IRQ1_RAW_STATUS_13: + case CLEARWATER_IRQ1_RAW_STATUS_14: + case CLEARWATER_IRQ1_RAW_STATUS_15: + case CLEARWATER_IRQ1_RAW_STATUS_17: + case CLEARWATER_IRQ1_RAW_STATUS_18: + case CLEARWATER_IRQ1_RAW_STATUS_19: + case CLEARWATER_IRQ1_RAW_STATUS_21: + case CLEARWATER_IRQ1_RAW_STATUS_22: + case CLEARWATER_IRQ1_RAW_STATUS_23: + case CLEARWATER_IRQ1_RAW_STATUS_24: + case CLEARWATER_IRQ1_RAW_STATUS_25: + case CLEARWATER_IRQ1_RAW_STATUS_30: + case CLEARWATER_IRQ1_RAW_STATUS_31: + case CLEARWATER_IRQ1_RAW_STATUS_32: + case CLEARWATER_IRQ2_STATUS_9: + case CLEARWATER_IRQ2_MASK_9: + case CLEARWATER_IRQ2_RAW_STATUS_9: + case CLEARWATER_IRQ1_CTRL: return true; default: return false; } } -static bool wm8285_16bit_volatile_register(struct device *dev, unsigned int reg) +static bool clearwater_16bit_volatile_register(struct device *dev, unsigned int reg) { switch (reg) { case ARIZONA_SOFTWARE_RESET: @@ -2943,149 +2943,149 @@ static bool wm8285_16bit_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_SLIMBUS_RX_PORT_STATUS: case ARIZONA_SLIMBUS_TX_PORT_STATUS: case ARIZONA_FX_CTRL2: - case WM8285_ASRC2_STATUS: - case WM8285_ASRC1_STATUS: - case WM8285_IRQ1_STATUS_1: - case WM8285_IRQ1_STATUS_2: - case WM8285_IRQ1_STATUS_6: - case WM8285_IRQ1_STATUS_7: - case WM8285_IRQ1_STATUS_9: - case WM8285_IRQ1_STATUS_11: - case WM8285_IRQ1_STATUS_12: - case WM8285_IRQ1_STATUS_13: - case WM8285_IRQ1_STATUS_14: - case WM8285_IRQ1_STATUS_15: - case WM8285_IRQ1_STATUS_17: - case WM8285_IRQ1_STATUS_18: - case WM8285_IRQ1_STATUS_19: - case WM8285_IRQ1_STATUS_21: - case WM8285_IRQ1_STATUS_22: - case WM8285_IRQ1_STATUS_23: - case WM8285_IRQ1_STATUS_24: - case WM8285_IRQ1_STATUS_25: - case WM8285_IRQ1_STATUS_27: - case WM8285_IRQ1_STATUS_28: - case WM8285_IRQ1_STATUS_30: - case WM8285_IRQ1_STATUS_31: - case WM8285_IRQ1_STATUS_32: - case WM8285_IRQ1_RAW_STATUS_1: - case WM8285_IRQ1_RAW_STATUS_2: - case WM8285_IRQ1_RAW_STATUS_7: - case WM8285_IRQ1_RAW_STATUS_9: - case WM8285_IRQ1_RAW_STATUS_11: - case WM8285_IRQ1_RAW_STATUS_12: - case WM8285_IRQ1_RAW_STATUS_13: - case WM8285_IRQ1_RAW_STATUS_14: - case WM8285_IRQ1_RAW_STATUS_15: - case WM8285_IRQ1_RAW_STATUS_17: - case WM8285_IRQ1_RAW_STATUS_18: - case WM8285_IRQ1_RAW_STATUS_19: - case WM8285_IRQ1_RAW_STATUS_21: - case WM8285_IRQ1_RAW_STATUS_22: - case WM8285_IRQ1_RAW_STATUS_23: - case WM8285_IRQ1_RAW_STATUS_24: - case WM8285_IRQ1_RAW_STATUS_25: - case WM8285_IRQ1_RAW_STATUS_30: - case WM8285_IRQ1_RAW_STATUS_31: - case WM8285_IRQ1_RAW_STATUS_32: - case WM8285_IRQ2_STATUS_9: - case WM8285_IRQ2_RAW_STATUS_9: + case CLEARWATER_ASRC2_STATUS: + case CLEARWATER_ASRC1_STATUS: + case CLEARWATER_IRQ1_STATUS_1: + case CLEARWATER_IRQ1_STATUS_2: + case CLEARWATER_IRQ1_STATUS_6: + case CLEARWATER_IRQ1_STATUS_7: + case CLEARWATER_IRQ1_STATUS_9: + case CLEARWATER_IRQ1_STATUS_11: + case CLEARWATER_IRQ1_STATUS_12: + case CLEARWATER_IRQ1_STATUS_13: + case CLEARWATER_IRQ1_STATUS_14: + case CLEARWATER_IRQ1_STATUS_15: + case CLEARWATER_IRQ1_STATUS_17: + case CLEARWATER_IRQ1_STATUS_18: + case CLEARWATER_IRQ1_STATUS_19: + case CLEARWATER_IRQ1_STATUS_21: + case CLEARWATER_IRQ1_STATUS_22: + case CLEARWATER_IRQ1_STATUS_23: + case CLEARWATER_IRQ1_STATUS_24: + case CLEARWATER_IRQ1_STATUS_25: + case CLEARWATER_IRQ1_STATUS_27: + case CLEARWATER_IRQ1_STATUS_28: + case CLEARWATER_IRQ1_STATUS_30: + case CLEARWATER_IRQ1_STATUS_31: + case CLEARWATER_IRQ1_STATUS_32: + case CLEARWATER_IRQ1_RAW_STATUS_1: + case CLEARWATER_IRQ1_RAW_STATUS_2: + case CLEARWATER_IRQ1_RAW_STATUS_7: + case CLEARWATER_IRQ1_RAW_STATUS_9: + case CLEARWATER_IRQ1_RAW_STATUS_11: + case CLEARWATER_IRQ1_RAW_STATUS_12: + case CLEARWATER_IRQ1_RAW_STATUS_13: + case CLEARWATER_IRQ1_RAW_STATUS_14: + case CLEARWATER_IRQ1_RAW_STATUS_15: + case CLEARWATER_IRQ1_RAW_STATUS_17: + case CLEARWATER_IRQ1_RAW_STATUS_18: + case CLEARWATER_IRQ1_RAW_STATUS_19: + case CLEARWATER_IRQ1_RAW_STATUS_21: + case CLEARWATER_IRQ1_RAW_STATUS_22: + case CLEARWATER_IRQ1_RAW_STATUS_23: + case CLEARWATER_IRQ1_RAW_STATUS_24: + case CLEARWATER_IRQ1_RAW_STATUS_25: + case CLEARWATER_IRQ1_RAW_STATUS_30: + case CLEARWATER_IRQ1_RAW_STATUS_31: + case CLEARWATER_IRQ1_RAW_STATUS_32: + case CLEARWATER_IRQ2_STATUS_9: + case CLEARWATER_IRQ2_RAW_STATUS_9: return true; default: return false; } } -static bool wm8285_32bit_readable_register(struct device *dev, unsigned int reg) +static bool clearwater_32bit_readable_register(struct device *dev, unsigned int reg) { switch (reg) { case ARIZONA_WSEQ_SEQUENCE_1 ... ARIZONA_WSEQ_SEQUENCE_508: - case WM8285_DSP1_CONFIG ... WM8285_DSP1_SCRATCH_3: - case WM8285_DSP2_CONFIG ... WM8285_DSP2_SCRATCH_3: - case WM8285_DSP3_CONFIG ... WM8285_DSP3_SCRATCH_3: - case WM8285_DSP4_CONFIG ... WM8285_DSP4_SCRATCH_3: - case WM8285_DSP5_CONFIG ... WM8285_DSP5_SCRATCH_3: - case WM8285_DSP6_CONFIG ... WM8285_DSP6_SCRATCH_3: - case WM8285_DSP7_CONFIG ... WM8285_DSP7_SCRATCH_3: + case CLEARWATER_DSP1_CONFIG ... CLEARWATER_DSP1_SCRATCH_3: + case CLEARWATER_DSP2_CONFIG ... CLEARWATER_DSP2_SCRATCH_3: + case CLEARWATER_DSP3_CONFIG ... CLEARWATER_DSP3_SCRATCH_3: + case CLEARWATER_DSP4_CONFIG ... CLEARWATER_DSP4_SCRATCH_3: + case CLEARWATER_DSP5_CONFIG ... CLEARWATER_DSP5_SCRATCH_3: + case CLEARWATER_DSP6_CONFIG ... CLEARWATER_DSP6_SCRATCH_3: + case CLEARWATER_DSP7_CONFIG ... CLEARWATER_DSP7_SCRATCH_3: return true; default: - return wm8285_is_adsp_memory(dev, reg); + return clearwater_is_adsp_memory(dev, reg); } } -static bool wm8285_32bit_volatile_register(struct device *dev, unsigned int reg) +static bool clearwater_32bit_volatile_register(struct device *dev, unsigned int reg) { switch (reg) { case ARIZONA_WSEQ_SEQUENCE_1 ... ARIZONA_WSEQ_SEQUENCE_508: - case WM8285_DSP1_CONFIG ... WM8285_DSP1_SCRATCH_3: - case WM8285_DSP2_CONFIG ... WM8285_DSP2_SCRATCH_3: - case WM8285_DSP3_CONFIG ... WM8285_DSP3_SCRATCH_3: - case WM8285_DSP4_CONFIG ... WM8285_DSP4_SCRATCH_3: - case WM8285_DSP5_CONFIG ... WM8285_DSP5_SCRATCH_3: - case WM8285_DSP6_CONFIG ... WM8285_DSP6_SCRATCH_3: - case WM8285_DSP7_CONFIG ... WM8285_DSP7_SCRATCH_3: + case CLEARWATER_DSP1_CONFIG ... CLEARWATER_DSP1_SCRATCH_3: + case CLEARWATER_DSP2_CONFIG ... CLEARWATER_DSP2_SCRATCH_3: + case CLEARWATER_DSP3_CONFIG ... CLEARWATER_DSP3_SCRATCH_3: + case CLEARWATER_DSP4_CONFIG ... CLEARWATER_DSP4_SCRATCH_3: + case CLEARWATER_DSP5_CONFIG ... CLEARWATER_DSP5_SCRATCH_3: + case CLEARWATER_DSP6_CONFIG ... CLEARWATER_DSP6_SCRATCH_3: + case CLEARWATER_DSP7_CONFIG ... CLEARWATER_DSP7_SCRATCH_3: return true; default: - return wm8285_is_adsp_memory(dev, reg); + return clearwater_is_adsp_memory(dev, reg); } } -const struct regmap_config wm8285_16bit_spi_regmap = { - .name = "wm8285_16bit", +const struct regmap_config clearwater_16bit_spi_regmap = { + .name = "clearwater_16bit", .reg_bits = 32, .pad_bits = 16, .val_bits = 16, .max_register = 0x2fff, - .readable_reg = wm8285_16bit_readable_register, - .volatile_reg = wm8285_16bit_volatile_register, + .readable_reg = clearwater_16bit_readable_register, + .volatile_reg = clearwater_16bit_volatile_register, .cache_type = REGCACHE_RBTREE, - .reg_defaults = wm8285_reg_default, - .num_reg_defaults = ARRAY_SIZE(wm8285_reg_default), + .reg_defaults = clearwater_reg_default, + .num_reg_defaults = ARRAY_SIZE(clearwater_reg_default), }; -EXPORT_SYMBOL_GPL(wm8285_16bit_spi_regmap); +EXPORT_SYMBOL_GPL(clearwater_16bit_spi_regmap); -const struct regmap_config wm8285_16bit_i2c_regmap = { - .name = "wm8285_16bit", +const struct regmap_config clearwater_16bit_i2c_regmap = { + .name = "clearwater_16bit", .reg_bits = 32, .val_bits = 16, .max_register = 0x2fff, - .readable_reg = wm8285_16bit_readable_register, - .volatile_reg = wm8285_16bit_volatile_register, + .readable_reg = clearwater_16bit_readable_register, + .volatile_reg = clearwater_16bit_volatile_register, .cache_type = REGCACHE_RBTREE, - .reg_defaults = wm8285_reg_default, - .num_reg_defaults = ARRAY_SIZE(wm8285_reg_default), + .reg_defaults = clearwater_reg_default, + .num_reg_defaults = ARRAY_SIZE(clearwater_reg_default), }; -EXPORT_SYMBOL_GPL(wm8285_16bit_i2c_regmap); +EXPORT_SYMBOL_GPL(clearwater_16bit_i2c_regmap); -const struct regmap_config wm8285_32bit_spi_regmap = { - .name = "wm8285_32bit", +const struct regmap_config clearwater_32bit_spi_regmap = { + .name = "clearwater_32bit", .reg_bits = 32, .reg_stride = 2, .pad_bits = 16, .val_bits = 32, - .max_register = WM8285_DSP7_SCRATCH_3, - .readable_reg = wm8285_32bit_readable_register, - .volatile_reg = wm8285_32bit_volatile_register, + .max_register = CLEARWATER_DSP7_SCRATCH_3, + .readable_reg = clearwater_32bit_readable_register, + .volatile_reg = clearwater_32bit_volatile_register, .cache_type = REGCACHE_NONE, }; -EXPORT_SYMBOL_GPL(wm8285_32bit_spi_regmap); +EXPORT_SYMBOL_GPL(clearwater_32bit_spi_regmap); -const struct regmap_config wm8285_32bit_i2c_regmap = { - .name = "wm8285_32bit", +const struct regmap_config clearwater_32bit_i2c_regmap = { + .name = "clearwater_32bit", .reg_bits = 32, .reg_stride = 2, .val_bits = 32, - .max_register = WM8285_DSP7_SCRATCH_3, - .readable_reg = wm8285_32bit_readable_register, - .volatile_reg = wm8285_32bit_volatile_register, + .max_register = CLEARWATER_DSP7_SCRATCH_3, + .readable_reg = clearwater_32bit_readable_register, + .volatile_reg = clearwater_32bit_volatile_register, .cache_type = REGCACHE_NONE, }; -EXPORT_SYMBOL_GPL(wm8285_32bit_i2c_regmap); +EXPORT_SYMBOL_GPL(clearwater_32bit_i2c_regmap); diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 6848c405108..0bdaa1b36e8 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -186,7 +186,7 @@ int wm5102_patch(struct arizona *arizona); int florida_patch(struct arizona *arizona); int wm8997_patch(struct arizona *arizona); int wm8998_patch(struct arizona *arizona); -int wm8285_patch(struct arizona *arizona); +int clearwater_patch(struct arizona *arizona); int cs47l24_patch(struct arizona *arizona); extern int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index a670933ac77..43462bc54c7 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -45,13 +45,13 @@ #define ARIZONA_GPN_FN_SHIFT 0 /* GPN_FN - [6:0] */ #define ARIZONA_GPN_FN_WIDTH 7 /* GPN_FN - [6:0] */ -#define WM8285_GPN_LVL 0x8000 /* GPN_LVL */ -#define WM8285_GPN_LVL_MASK 0x8000 /* GPN_LVL */ -#define WM8285_GPN_LVL_SHIFT 15 /* GPN_LVL */ -#define WM8285_GPN_LVL_WIDTH 1 /* GPN_LVL */ +#define CLEARWATER_GPN_LVL 0x8000 /* GPN_LVL */ +#define CLEARWATER_GPN_LVL_MASK 0x8000 /* GPN_LVL */ +#define CLEARWATER_GPN_LVL_SHIFT 15 /* GPN_LVL */ +#define CLEARWATER_GPN_LVL_WIDTH 1 /* GPN_LVL */ #define ARIZONA_MAX_GPIO_REGS 5 -#define WM8285_MAX_GPIO_REGS 80 +#define CLEARWATER_MAX_GPIO_REGS 80 #define ARIZONA_32KZ_MCLK1 1 #define ARIZONA_32KZ_MCLK2 2 @@ -127,7 +127,7 @@ struct arizona_pdata { int gpio_base; /** Pin state for GPIO pins */ - unsigned int gpio_defaults[WM8285_MAX_GPIO_REGS]; + unsigned int gpio_defaults[CLEARWATER_MAX_GPIO_REGS]; /** * Maximum number of channels clocks will be generated for, diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 2c52c4190e9..810ff681e4c 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -76,8 +76,8 @@ #define ARIZONA_ASYNC_SAMPLE_RATE_2 0x114 #define ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS 0x11B #define ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS 0x11C -#define WM8285_DSP_CLOCK_1 0x120 -#define WM8285_DSP_CLOCK_2 0x122 +#define CLEARWATER_DSP_CLOCK_1 0x120 +#define CLEARWATER_DSP_CLOCK_2 0x122 #define ARIZONA_OUTPUT_SYSTEM_CLOCK 0x149 #define ARIZONA_OUTPUT_ASYNC_CLOCK 0x14A #define ARIZONA_RATE_ESTIMATOR_1 0x152 @@ -169,7 +169,7 @@ #define ARIZONA_MIC_DETECT_LEVEL_4 0x2A9 #define ARIZONA_MIC_DETECT_4 0x2AB #define ARIZONA_MIC_NOISE_MIX_CONTROL_1 0x2C3 -#define WM8285_MICD_CLAMP_CONTROL 0x2C6 +#define CLEARWATER_MICD_CLAMP_CONTROL 0x2C6 #define ARIZONA_ISOLATION_CONTROL 0x2CB #define ARIZONA_JACK_DETECT_ANALOGUE 0x2D3 #define ARIZONA_INPUT_ENABLES 0x300 @@ -277,7 +277,7 @@ #define ARIZONA_DRE_CONTROL_1 0x441 #define ARIZONA_DRE_CONTROL_2 0x442 #define ARIZONA_DRE_CONTROL_3 0x443 -#define WM8285_EDRE_ENABLE 0x448 +#define CLEARWATER_EDRE_ENABLE 0x448 #define ARIZONA_DAC_AEC_CONTROL_1 0x450 #define ARIZONA_DAC_AEC_CONTROL_2 0x451 #define ARIZONA_NOISE_GATE_CONTROL 0x458 @@ -943,40 +943,40 @@ #define ARIZONA_DSP4AUX4MIX_INPUT_1_SOURCE 0xA28 #define ARIZONA_DSP4AUX5MIX_INPUT_1_SOURCE 0xA30 #define ARIZONA_DSP4AUX6MIX_INPUT_1_SOURCE 0xA38 -#define WM8285_DSP5LMIX_INPUT_1_SOURCE 0xA40 -#define WM8285_DSP5LMIX_INPUT_1_VOLUME 0xA41 -#define WM8285_DSP5LMIX_INPUT_2_SOURCE 0xA42 -#define WM8285_DSP5LMIX_INPUT_2_VOLUME 0xA43 -#define WM8285_DSP5LMIX_INPUT_3_SOURCE 0xA44 -#define WM8285_DSP5LMIX_INPUT_3_VOLUME 0xA45 -#define WM8285_DSP5LMIX_INPUT_4_SOURCE 0xA46 -#define WM8285_DSP5LMIX_INPUT_4_VOLUME 0xA47 -#define WM8285_DSP5RMIX_INPUT_1_SOURCE 0xA48 -#define WM8285_DSP5RMIX_INPUT_1_VOLUME 0xA49 -#define WM8285_DSP5RMIX_INPUT_2_SOURCE 0xA4A -#define WM8285_DSP5RMIX_INPUT_2_VOLUME 0xA4B -#define WM8285_DSP5RMIX_INPUT_3_SOURCE 0xA4C -#define WM8285_DSP5RMIX_INPUT_3_VOLUME 0xA4D -#define WM8285_DSP5RMIX_INPUT_4_SOURCE 0xA4E -#define WM8285_DSP5RMIX_INPUT_4_VOLUME 0xA4F -#define WM8285_DSP5AUX1MIX_INPUT_1_SOURCE 0xA50 -#define WM8285_DSP5AUX2MIX_INPUT_1_SOURCE 0xA58 -#define WM8285_DSP5AUX3MIX_INPUT_1_SOURCE 0xA60 -#define WM8285_DSP5AUX4MIX_INPUT_1_SOURCE 0xA68 -#define WM8285_DSP5AUX5MIX_INPUT_1_SOURCE 0xA70 -#define WM8285_DSP5AUX6MIX_INPUT_1_SOURCE 0xA78 +#define CLEARWATER_DSP5LMIX_INPUT_1_SOURCE 0xA40 +#define CLEARWATER_DSP5LMIX_INPUT_1_VOLUME 0xA41 +#define CLEARWATER_DSP5LMIX_INPUT_2_SOURCE 0xA42 +#define CLEARWATER_DSP5LMIX_INPUT_2_VOLUME 0xA43 +#define CLEARWATER_DSP5LMIX_INPUT_3_SOURCE 0xA44 +#define CLEARWATER_DSP5LMIX_INPUT_3_VOLUME 0xA45 +#define CLEARWATER_DSP5LMIX_INPUT_4_SOURCE 0xA46 +#define CLEARWATER_DSP5LMIX_INPUT_4_VOLUME 0xA47 +#define CLEARWATER_DSP5RMIX_INPUT_1_SOURCE 0xA48 +#define CLEARWATER_DSP5RMIX_INPUT_1_VOLUME 0xA49 +#define CLEARWATER_DSP5RMIX_INPUT_2_SOURCE 0xA4A +#define CLEARWATER_DSP5RMIX_INPUT_2_VOLUME 0xA4B +#define CLEARWATER_DSP5RMIX_INPUT_3_SOURCE 0xA4C +#define CLEARWATER_DSP5RMIX_INPUT_3_VOLUME 0xA4D +#define CLEARWATER_DSP5RMIX_INPUT_4_SOURCE 0xA4E +#define CLEARWATER_DSP5RMIX_INPUT_4_VOLUME 0xA4F +#define CLEARWATER_DSP5AUX1MIX_INPUT_1_SOURCE 0xA50 +#define CLEARWATER_DSP5AUX2MIX_INPUT_1_SOURCE 0xA58 +#define CLEARWATER_DSP5AUX3MIX_INPUT_1_SOURCE 0xA60 +#define CLEARWATER_DSP5AUX4MIX_INPUT_1_SOURCE 0xA68 +#define CLEARWATER_DSP5AUX5MIX_INPUT_1_SOURCE 0xA70 +#define CLEARWATER_DSP5AUX6MIX_INPUT_1_SOURCE 0xA78 #define ARIZONA_ASRC1LMIX_INPUT_1_SOURCE 0xA80 #define ARIZONA_ASRC1RMIX_INPUT_1_SOURCE 0xA88 #define ARIZONA_ASRC2LMIX_INPUT_1_SOURCE 0xA90 #define ARIZONA_ASRC2RMIX_INPUT_1_SOURCE 0xA98 -#define WM8285_ASRC1_1LMIX_INPUT_1_SOURCE 0xA80 -#define WM8285_ASRC1_1RMIX_INPUT_1_SOURCE 0xA88 -#define WM8285_ASRC1_2LMIX_INPUT_1_SOURCE 0xA90 -#define WM8285_ASRC1_2RMIX_INPUT_1_SOURCE 0xA98 -#define WM8285_ASRC2_1LMIX_INPUT_1_SOURCE 0xAA0 -#define WM8285_ASRC2_1RMIX_INPUT_1_SOURCE 0xAA8 -#define WM8285_ASRC2_2LMIX_INPUT_1_SOURCE 0xAB0 -#define WM8285_ASRC2_2RMIX_INPUT_1_SOURCE 0xAB8 +#define CLEARWATER_ASRC1_1LMIX_INPUT_1_SOURCE 0xA80 +#define CLEARWATER_ASRC1_1RMIX_INPUT_1_SOURCE 0xA88 +#define CLEARWATER_ASRC1_2LMIX_INPUT_1_SOURCE 0xA90 +#define CLEARWATER_ASRC1_2RMIX_INPUT_1_SOURCE 0xA98 +#define CLEARWATER_ASRC2_1LMIX_INPUT_1_SOURCE 0xAA0 +#define CLEARWATER_ASRC2_1RMIX_INPUT_1_SOURCE 0xAA8 +#define CLEARWATER_ASRC2_2LMIX_INPUT_1_SOURCE 0xAB0 +#define CLEARWATER_ASRC2_2RMIX_INPUT_1_SOURCE 0xAB8 #define ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE 0xB00 #define ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE 0xB08 #define ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE 0xB10 @@ -1011,50 +1011,50 @@ #define ARIZONA_ISRC4DEC2MIX_INPUT_1_SOURCE 0xBC8 #define ARIZONA_ISRC4INT1MIX_INPUT_1_SOURCE 0xBE0 #define ARIZONA_ISRC4INT2MIX_INPUT_1_SOURCE 0xBE8 -#define WM8285_DSP6LMIX_INPUT_1_SOURCE 0xC00 -#define WM8285_DSP6LMIX_INPUT_1_VOLUME 0xC01 -#define WM8285_DSP6LMIX_INPUT_2_SOURCE 0xC02 -#define WM8285_DSP6LMIX_INPUT_2_VOLUME 0xC03 -#define WM8285_DSP6LMIX_INPUT_3_SOURCE 0xC04 -#define WM8285_DSP6LMIX_INPUT_3_VOLUME 0xC05 -#define WM8285_DSP6LMIX_INPUT_4_SOURCE 0xC06 -#define WM8285_DSP6LMIX_INPUT_4_VOLUME 0xC07 -#define WM8285_DSP6RMIX_INPUT_1_SOURCE 0xC08 -#define WM8285_DSP6RMIX_INPUT_1_VOLUME 0xC09 -#define WM8285_DSP6RMIX_INPUT_2_SOURCE 0xC0A -#define WM8285_DSP6RMIX_INPUT_2_VOLUME 0xC0B -#define WM8285_DSP6RMIX_INPUT_3_SOURCE 0xC0C -#define WM8285_DSP6RMIX_INPUT_3_VOLUME 0xC0D -#define WM8285_DSP6RMIX_INPUT_4_SOURCE 0xC0E -#define WM8285_DSP6RMIX_INPUT_4_VOLUME 0xC0F -#define WM8285_DSP6AUX1MIX_INPUT_1_SOURCE 0xC10 -#define WM8285_DSP6AUX2MIX_INPUT_1_SOURCE 0xC18 -#define WM8285_DSP6AUX3MIX_INPUT_1_SOURCE 0xC20 -#define WM8285_DSP6AUX4MIX_INPUT_1_SOURCE 0xC28 -#define WM8285_DSP6AUX5MIX_INPUT_1_SOURCE 0xC30 -#define WM8285_DSP6AUX6MIX_INPUT_1_SOURCE 0xC38 -#define WM8285_DSP7LMIX_INPUT_1_SOURCE 0xC40 -#define WM8285_DSP7LMIX_INPUT_1_VOLUME 0xC41 -#define WM8285_DSP7LMIX_INPUT_2_SOURCE 0xC42 -#define WM8285_DSP7LMIX_INPUT_2_VOLUME 0xC43 -#define WM8285_DSP7LMIX_INPUT_3_SOURCE 0xC44 -#define WM8285_DSP7LMIX_INPUT_3_VOLUME 0xC45 -#define WM8285_DSP7LMIX_INPUT_4_SOURCE 0xC46 -#define WM8285_DSP7LMIX_INPUT_4_VOLUME 0xC47 -#define WM8285_DSP7RMIX_INPUT_1_SOURCE 0xC48 -#define WM8285_DSP7RMIX_INPUT_1_VOLUME 0xC49 -#define WM8285_DSP7RMIX_INPUT_2_SOURCE 0xC4A -#define WM8285_DSP7RMIX_INPUT_2_VOLUME 0xC4B -#define WM8285_DSP7RMIX_INPUT_3_SOURCE 0xC4C -#define WM8285_DSP7RMIX_INPUT_3_VOLUME 0xC4D -#define WM8285_DSP7RMIX_INPUT_4_SOURCE 0xC4E -#define WM8285_DSP7RMIX_INPUT_4_VOLUME 0xC4F -#define WM8285_DSP7AUX1MIX_INPUT_1_SOURCE 0xC50 -#define WM8285_DSP7AUX2MIX_INPUT_1_SOURCE 0xC58 -#define WM8285_DSP7AUX3MIX_INPUT_1_SOURCE 0xC60 -#define WM8285_DSP7AUX4MIX_INPUT_1_SOURCE 0xC68 -#define WM8285_DSP7AUX5MIX_INPUT_1_SOURCE 0xC70 -#define WM8285_DSP7AUX6MIX_INPUT_1_SOURCE 0xC78 +#define CLEARWATER_DSP6LMIX_INPUT_1_SOURCE 0xC00 +#define CLEARWATER_DSP6LMIX_INPUT_1_VOLUME 0xC01 +#define CLEARWATER_DSP6LMIX_INPUT_2_SOURCE 0xC02 +#define CLEARWATER_DSP6LMIX_INPUT_2_VOLUME 0xC03 +#define CLEARWATER_DSP6LMIX_INPUT_3_SOURCE 0xC04 +#define CLEARWATER_DSP6LMIX_INPUT_3_VOLUME 0xC05 +#define CLEARWATER_DSP6LMIX_INPUT_4_SOURCE 0xC06 +#define CLEARWATER_DSP6LMIX_INPUT_4_VOLUME 0xC07 +#define CLEARWATER_DSP6RMIX_INPUT_1_SOURCE 0xC08 +#define CLEARWATER_DSP6RMIX_INPUT_1_VOLUME 0xC09 +#define CLEARWATER_DSP6RMIX_INPUT_2_SOURCE 0xC0A +#define CLEARWATER_DSP6RMIX_INPUT_2_VOLUME 0xC0B +#define CLEARWATER_DSP6RMIX_INPUT_3_SOURCE 0xC0C +#define CLEARWATER_DSP6RMIX_INPUT_3_VOLUME 0xC0D +#define CLEARWATER_DSP6RMIX_INPUT_4_SOURCE 0xC0E +#define CLEARWATER_DSP6RMIX_INPUT_4_VOLUME 0xC0F +#define CLEARWATER_DSP6AUX1MIX_INPUT_1_SOURCE 0xC10 +#define CLEARWATER_DSP6AUX2MIX_INPUT_1_SOURCE 0xC18 +#define CLEARWATER_DSP6AUX3MIX_INPUT_1_SOURCE 0xC20 +#define CLEARWATER_DSP6AUX4MIX_INPUT_1_SOURCE 0xC28 +#define CLEARWATER_DSP6AUX5MIX_INPUT_1_SOURCE 0xC30 +#define CLEARWATER_DSP6AUX6MIX_INPUT_1_SOURCE 0xC38 +#define CLEARWATER_DSP7LMIX_INPUT_1_SOURCE 0xC40 +#define CLEARWATER_DSP7LMIX_INPUT_1_VOLUME 0xC41 +#define CLEARWATER_DSP7LMIX_INPUT_2_SOURCE 0xC42 +#define CLEARWATER_DSP7LMIX_INPUT_2_VOLUME 0xC43 +#define CLEARWATER_DSP7LMIX_INPUT_3_SOURCE 0xC44 +#define CLEARWATER_DSP7LMIX_INPUT_3_VOLUME 0xC45 +#define CLEARWATER_DSP7LMIX_INPUT_4_SOURCE 0xC46 +#define CLEARWATER_DSP7LMIX_INPUT_4_VOLUME 0xC47 +#define CLEARWATER_DSP7RMIX_INPUT_1_SOURCE 0xC48 +#define CLEARWATER_DSP7RMIX_INPUT_1_VOLUME 0xC49 +#define CLEARWATER_DSP7RMIX_INPUT_2_SOURCE 0xC4A +#define CLEARWATER_DSP7RMIX_INPUT_2_VOLUME 0xC4B +#define CLEARWATER_DSP7RMIX_INPUT_3_SOURCE 0xC4C +#define CLEARWATER_DSP7RMIX_INPUT_3_VOLUME 0xC4D +#define CLEARWATER_DSP7RMIX_INPUT_4_SOURCE 0xC4E +#define CLEARWATER_DSP7RMIX_INPUT_4_VOLUME 0xC4F +#define CLEARWATER_DSP7AUX1MIX_INPUT_1_SOURCE 0xC50 +#define CLEARWATER_DSP7AUX2MIX_INPUT_1_SOURCE 0xC58 +#define CLEARWATER_DSP7AUX3MIX_INPUT_1_SOURCE 0xC60 +#define CLEARWATER_DSP7AUX4MIX_INPUT_1_SOURCE 0xC68 +#define CLEARWATER_DSP7AUX5MIX_INPUT_1_SOURCE 0xC70 +#define CLEARWATER_DSP7AUX6MIX_INPUT_1_SOURCE 0xC78 #define ARIZONA_GPIO1_CTRL 0xC00 #define ARIZONA_GPIO2_CTRL 0xC01 #define ARIZONA_GPIO3_CTRL 0xC02 @@ -1063,7 +1063,7 @@ #define ARIZONA_IRQ_CTRL_1 0xC0F #define ARIZONA_GPIO_DEBOUNCE_CONFIG 0xC10 #define ARIZONA_GP_SWITCH_1 0xC18 -#define WM8285_GP_SWITCH_1 0x2C8 +#define CLEARWATER_GP_SWITCH_1 0x2C8 #define ARIZONA_MISC_PAD_CTRL_1 0xC20 #define ARIZONA_MISC_PAD_CTRL_2 0xC21 #define ARIZONA_MISC_PAD_CTRL_3 0xC22 @@ -1221,11 +1221,11 @@ #define ARIZONA_DRC2_CTRL3 0xE8B #define ARIZONA_DRC2_CTRL4 0xE8C #define ARIZONA_DRC2_CTRL5 0xE8D -#define WM8285_DRC2_CTRL1 0xE88 -#define WM8285_DRC2_CTRL2 0xE89 -#define WM8285_DRC2_CTRL3 0xE8A -#define WM8285_DRC2_CTRL4 0xE8B -#define WM8285_DRC2_CTRL5 0xE8C +#define CLEARWATER_DRC2_CTRL1 0xE88 +#define CLEARWATER_DRC2_CTRL2 0xE89 +#define CLEARWATER_DRC2_CTRL3 0xE8A +#define CLEARWATER_DRC2_CTRL4 0xE8B +#define CLEARWATER_DRC2_CTRL5 0xE8C #define ARIZONA_HPLPF1_1 0xEC0 #define ARIZONA_HPLPF1_2 0xEC1 #define ARIZONA_HPLPF2_1 0xEC4 @@ -1234,14 +1234,14 @@ #define ARIZONA_HPLPF3_2 0xEC9 #define ARIZONA_HPLPF4_1 0xECC #define ARIZONA_HPLPF4_2 0xECD -#define WM8285_ASRC2_ENABLE 0xED0 -#define WM8285_ASRC2_STATUS 0xED1 -#define WM8285_ASRC2_RATE1 0xED2 -#define WM8285_ASRC2_RATE2 0xED3 -#define WM8285_ASRC1_ENABLE 0xEE0 -#define WM8285_ASRC1_STATUS 0xEE1 -#define WM8285_ASRC1_RATE1 0xEE2 -#define WM8285_ASRC1_RATE2 0xEE3 +#define CLEARWATER_ASRC2_ENABLE 0xED0 +#define CLEARWATER_ASRC2_STATUS 0xED1 +#define CLEARWATER_ASRC2_RATE1 0xED2 +#define CLEARWATER_ASRC2_RATE2 0xED3 +#define CLEARWATER_ASRC1_ENABLE 0xEE0 +#define CLEARWATER_ASRC1_STATUS 0xEE1 +#define CLEARWATER_ASRC1_RATE1 0xEE2 +#define CLEARWATER_ASRC1_RATE2 0xEE3 #define ARIZONA_ASRC_ENABLE 0xEE0 #define ARIZONA_ASRC_STATUS 0xEE1 #define ARIZONA_ASRC_RATE1 0xEE2 @@ -1268,13 +1268,13 @@ #define ARIZONA_FCL_COEFF_START 0xF18 #define ARIZONA_FCL_COEFF_END 0xF69 #define ARIZONA_FCR_FILTER_CONTROL 0xF70 -#define WM8285_FCR_FILTER_CONTROL 0xF71 +#define CLEARWATER_FCR_FILTER_CONTROL 0xF71 #define ARIZONA_FCR_ADC_REFORMATTER_CONTROL 0xF72 -#define WM8285_FCR_ADC_REFORMATTER_CONTROL 0xF73 +#define CLEARWATER_FCR_ADC_REFORMATTER_CONTROL 0xF73 #define ARIZONA_FCR_COEFF_START 0xF73 #define ARIZONA_FCR_COEFF_END 0xFC4 -#define WM8285_FCR_COEFF_START 0xF74 -#define WM8285_FCR_COEFF_END 0xFC5 +#define CLEARWATER_FCR_COEFF_START 0xF74 +#define CLEARWATER_FCR_COEFF_END 0xFC5 #define ARIZONA_DSP1_CONTROL_1 0x1100 #define ARIZONA_DSP1_CLOCKING_1 0x1101 #define ARIZONA_DSP1_STATUS_1 0x1104 @@ -1336,9 +1336,9 @@ #define ARIZONA_DSP2_SCRATCH_2 0x1242 #define ARIZONA_DSP2_SCRATCH_3 0x1243 #define ARIZONA_DSP3_CONTROL_1 0x1300 -#define WM8285_DAC_COMP_1 0x1300 +#define CLEARWATER_DAC_COMP_1 0x1300 #define ARIZONA_DSP3_CLOCKING_1 0x1301 -#define WM8285_DAC_COMP_2 0x1302 +#define CLEARWATER_DAC_COMP_2 0x1302 #define ARIZONA_DSP3_STATUS_1 0x1304 #define ARIZONA_DSP3_STATUS_2 0x1305 #define ARIZONA_DSP3_STATUS_3 0x1306 @@ -1367,54 +1367,54 @@ #define ARIZONA_DSP3_SCRATCH_1 0x1341 #define ARIZONA_DSP3_SCRATCH_2 0x1342 #define ARIZONA_DSP3_SCRATCH_3 0x1343 -#define WM8285_FRF_COEFFICIENT_1L_1 0x1380 -#define WM8285_FRF_COEFFICIENT_1L_2 0x1381 -#define WM8285_FRF_COEFFICIENT_1L_3 0x1382 -#define WM8285_FRF_COEFFICIENT_1L_4 0x1383 -#define WM8285_FRF_COEFFICIENT_1R_1 0x1390 -#define WM8285_FRF_COEFFICIENT_1R_2 0x1391 -#define WM8285_FRF_COEFFICIENT_1R_3 0x1392 -#define WM8285_FRF_COEFFICIENT_1R_4 0x1393 -#define WM8285_FRF_COEFFICIENT_2L_1 0x13A0 -#define WM8285_FRF_COEFFICIENT_2L_2 0x13A1 -#define WM8285_FRF_COEFFICIENT_2L_3 0x13A2 -#define WM8285_FRF_COEFFICIENT_2L_4 0x13A3 -#define WM8285_FRF_COEFFICIENT_2R_1 0x13B0 -#define WM8285_FRF_COEFFICIENT_2R_2 0x13B1 -#define WM8285_FRF_COEFFICIENT_2R_3 0x13B2 -#define WM8285_FRF_COEFFICIENT_2R_4 0x13B3 -#define WM8285_FRF_COEFFICIENT_3L_1 0x13C0 -#define WM8285_FRF_COEFFICIENT_3L_2 0x13C1 -#define WM8285_FRF_COEFFICIENT_3L_3 0x13C2 -#define WM8285_FRF_COEFFICIENT_3L_4 0x13C3 -#define WM8285_FRF_COEFFICIENT_3R_1 0x13D0 -#define WM8285_FRF_COEFFICIENT_3R_2 0x13D1 -#define WM8285_FRF_COEFFICIENT_3R_3 0x13D2 -#define WM8285_FRF_COEFFICIENT_3R_4 0x13D3 -#define WM8285_FRF_COEFFICIENT_4L_1 0x13E0 -#define WM8285_FRF_COEFFICIENT_4L_2 0x13E1 -#define WM8285_FRF_COEFFICIENT_4L_3 0x13E2 -#define WM8285_FRF_COEFFICIENT_4L_4 0x13E3 -#define WM8285_FRF_COEFFICIENT_4R_1 0x13F0 -#define WM8285_FRF_COEFFICIENT_4R_2 0x13F1 -#define WM8285_FRF_COEFFICIENT_4R_3 0x13F2 -#define WM8285_FRF_COEFFICIENT_4R_4 0x13F3 -#define WM8285_FRF_COEFFICIENT_5L_1 0x1400 -#define WM8285_FRF_COEFFICIENT_5L_2 0x1401 -#define WM8285_FRF_COEFFICIENT_5L_3 0x1402 -#define WM8285_FRF_COEFFICIENT_5L_4 0x1403 -#define WM8285_FRF_COEFFICIENT_5R_1 0x1410 -#define WM8285_FRF_COEFFICIENT_5R_2 0x1411 -#define WM8285_FRF_COEFFICIENT_5R_3 0x1412 -#define WM8285_FRF_COEFFICIENT_5R_4 0x1413 -#define WM8285_FRF_COEFFICIENT_6L_1 0x1420 -#define WM8285_FRF_COEFFICIENT_6L_2 0x1421 -#define WM8285_FRF_COEFFICIENT_6L_3 0x1422 -#define WM8285_FRF_COEFFICIENT_6L_4 0x1423 -#define WM8285_FRF_COEFFICIENT_6R_1 0x1430 -#define WM8285_FRF_COEFFICIENT_6R_2 0x1431 -#define WM8285_FRF_COEFFICIENT_6R_3 0x1432 -#define WM8285_FRF_COEFFICIENT_6R_4 0x1433 +#define CLEARWATER_FRF_COEFFICIENT_1L_1 0x1380 +#define CLEARWATER_FRF_COEFFICIENT_1L_2 0x1381 +#define CLEARWATER_FRF_COEFFICIENT_1L_3 0x1382 +#define CLEARWATER_FRF_COEFFICIENT_1L_4 0x1383 +#define CLEARWATER_FRF_COEFFICIENT_1R_1 0x1390 +#define CLEARWATER_FRF_COEFFICIENT_1R_2 0x1391 +#define CLEARWATER_FRF_COEFFICIENT_1R_3 0x1392 +#define CLEARWATER_FRF_COEFFICIENT_1R_4 0x1393 +#define CLEARWATER_FRF_COEFFICIENT_2L_1 0x13A0 +#define CLEARWATER_FRF_COEFFICIENT_2L_2 0x13A1 +#define CLEARWATER_FRF_COEFFICIENT_2L_3 0x13A2 +#define CLEARWATER_FRF_COEFFICIENT_2L_4 0x13A3 +#define CLEARWATER_FRF_COEFFICIENT_2R_1 0x13B0 +#define CLEARWATER_FRF_COEFFICIENT_2R_2 0x13B1 +#define CLEARWATER_FRF_COEFFICIENT_2R_3 0x13B2 +#define CLEARWATER_FRF_COEFFICIENT_2R_4 0x13B3 +#define CLEARWATER_FRF_COEFFICIENT_3L_1 0x13C0 +#define CLEARWATER_FRF_COEFFICIENT_3L_2 0x13C1 +#define CLEARWATER_FRF_COEFFICIENT_3L_3 0x13C2 +#define CLEARWATER_FRF_COEFFICIENT_3L_4 0x13C3 +#define CLEARWATER_FRF_COEFFICIENT_3R_1 0x13D0 +#define CLEARWATER_FRF_COEFFICIENT_3R_2 0x13D1 +#define CLEARWATER_FRF_COEFFICIENT_3R_3 0x13D2 +#define CLEARWATER_FRF_COEFFICIENT_3R_4 0x13D3 +#define CLEARWATER_FRF_COEFFICIENT_4L_1 0x13E0 +#define CLEARWATER_FRF_COEFFICIENT_4L_2 0x13E1 +#define CLEARWATER_FRF_COEFFICIENT_4L_3 0x13E2 +#define CLEARWATER_FRF_COEFFICIENT_4L_4 0x13E3 +#define CLEARWATER_FRF_COEFFICIENT_4R_1 0x13F0 +#define CLEARWATER_FRF_COEFFICIENT_4R_2 0x13F1 +#define CLEARWATER_FRF_COEFFICIENT_4R_3 0x13F2 +#define CLEARWATER_FRF_COEFFICIENT_4R_4 0x13F3 +#define CLEARWATER_FRF_COEFFICIENT_5L_1 0x1400 +#define CLEARWATER_FRF_COEFFICIENT_5L_2 0x1401 +#define CLEARWATER_FRF_COEFFICIENT_5L_3 0x1402 +#define CLEARWATER_FRF_COEFFICIENT_5L_4 0x1403 +#define CLEARWATER_FRF_COEFFICIENT_5R_1 0x1410 +#define CLEARWATER_FRF_COEFFICIENT_5R_2 0x1411 +#define CLEARWATER_FRF_COEFFICIENT_5R_3 0x1412 +#define CLEARWATER_FRF_COEFFICIENT_5R_4 0x1413 +#define CLEARWATER_FRF_COEFFICIENT_6L_1 0x1420 +#define CLEARWATER_FRF_COEFFICIENT_6L_2 0x1421 +#define CLEARWATER_FRF_COEFFICIENT_6L_3 0x1422 +#define CLEARWATER_FRF_COEFFICIENT_6L_4 0x1423 +#define CLEARWATER_FRF_COEFFICIENT_6R_1 0x1430 +#define CLEARWATER_FRF_COEFFICIENT_6R_2 0x1431 +#define CLEARWATER_FRF_COEFFICIENT_6R_3 0x1432 +#define CLEARWATER_FRF_COEFFICIENT_6R_4 0x1433 #define ARIZONA_DSP4_CONTROL_1 0x1400 #define ARIZONA_DSP4_CLOCKING_1 0x1401 #define ARIZONA_DSP4_STATUS_1 0x1404 @@ -1451,240 +1451,240 @@ #define ARIZONA_FRF_COEFF_4 0x1703 #define ARIZONA_V2_DAC_COMP_1 0x1704 #define ARIZONA_V2_DAC_COMP_2 0x1705 -#define WM8285_ADSP2_IRQ0 0x1600 -#define WM8285_ADSP2_IRQ1 0x1601 -#define WM8285_ADSP2_IRQ2 0x1602 -#define WM8285_ADSP2_IRQ3 0x1603 -#define WM8285_ADSP2_IRQ4 0x1604 -#define WM8285_ADSP2_IRQ5 0x1605 -#define WM8285_ADSP2_IRQ6 0x1606 -#define WM8285_ADSP2_IRQ7 0x1607 -#define WM8285_GPIO1_CTRL_1 0x1700 -#define WM8285_GPIO1_CTRL_2 0x1701 -#define WM8285_GPIO2_CTRL_1 0x1702 -#define WM8285_GPIO2_CTRL_2 0x1703 -#define WM8285_GPIO3_CTRL_1 0x1704 -#define WM8285_GPIO3_CTRL_2 0x1705 -#define WM8285_GPIO4_CTRL_1 0x1706 -#define WM8285_GPIO4_CTRL_2 0x1707 -#define WM8285_GPIO5_CTRL_1 0x1708 -#define WM8285_GPIO5_CTRL_2 0x1709 -#define WM8285_GPIO6_CTRL_1 0x170A -#define WM8285_GPIO6_CTRL_2 0x170B -#define WM8285_GPIO7_CTRL_1 0x170C -#define WM8285_GPIO7_CTRL_2 0x170D -#define WM8285_GPIO8_CTRL_1 0x170E -#define WM8285_GPIO8_CTRL_2 0x170F -#define WM8285_GPIO9_CTRL_1 0x1710 -#define WM8285_GPIO9_CTRL_2 0x1711 -#define WM8285_GPIO10_CTRL_1 0x1712 -#define WM8285_GPIO10_CTRL_2 0x1713 -#define WM8285_GPIO11_CTRL_1 0x1714 -#define WM8285_GPIO11_CTRL_2 0x1715 -#define WM8285_GPIO12_CTRL_1 0x1716 -#define WM8285_GPIO12_CTRL_2 0x1717 -#define WM8285_GPIO13_CTRL_1 0x1718 -#define WM8285_GPIO13_CTRL_2 0x1719 -#define WM8285_GPIO14_CTRL_1 0x171A -#define WM8285_GPIO14_CTRL_2 0x171B -#define WM8285_GPIO15_CTRL_1 0x171C -#define WM8285_GPIO15_CTRL_2 0x171D -#define WM8285_GPIO16_CTRL_1 0x171E -#define WM8285_GPIO16_CTRL_2 0x171F -#define WM8285_GPIO17_CTRL_1 0x1720 -#define WM8285_GPIO17_CTRL_2 0x1721 -#define WM8285_GPIO18_CTRL_1 0x1722 -#define WM8285_GPIO18_CTRL_2 0x1723 -#define WM8285_GPIO19_CTRL_1 0x1724 -#define WM8285_GPIO19_CTRL_2 0x1725 -#define WM8285_GPIO20_CTRL_1 0x1726 -#define WM8285_GPIO20_CTRL_2 0x1727 -#define WM8285_GPIO21_CTRL_1 0x1728 -#define WM8285_GPIO21_CTRL_2 0x1729 -#define WM8285_GPIO22_CTRL_1 0x172A -#define WM8285_GPIO22_CTRL_2 0x172B -#define WM8285_GPIO23_CTRL_1 0x172C -#define WM8285_GPIO23_CTRL_2 0x172D -#define WM8285_GPIO24_CTRL_1 0x172E -#define WM8285_GPIO24_CTRL_2 0x172F -#define WM8285_GPIO25_CTRL_1 0x1730 -#define WM8285_GPIO25_CTRL_2 0x1731 -#define WM8285_GPIO26_CTRL_1 0x1732 -#define WM8285_GPIO26_CTRL_2 0x1733 -#define WM8285_GPIO27_CTRL_1 0x1734 -#define WM8285_GPIO27_CTRL_2 0x1735 -#define WM8285_GPIO28_CTRL_1 0x1736 -#define WM8285_GPIO28_CTRL_2 0x1737 -#define WM8285_GPIO29_CTRL_1 0x1738 -#define WM8285_GPIO29_CTRL_2 0x1739 -#define WM8285_GPIO30_CTRL_1 0x173A -#define WM8285_GPIO30_CTRL_2 0x173B -#define WM8285_GPIO31_CTRL_1 0x173C -#define WM8285_GPIO31_CTRL_2 0x173D -#define WM8285_GPIO32_CTRL_1 0x173E -#define WM8285_GPIO32_CTRL_2 0x173F -#define WM8285_GPIO33_CTRL_1 0x1740 -#define WM8285_GPIO33_CTRL_2 0x1741 -#define WM8285_GPIO34_CTRL_1 0x1742 -#define WM8285_GPIO34_CTRL_2 0x1743 -#define WM8285_GPIO35_CTRL_1 0x1744 -#define WM8285_GPIO35_CTRL_2 0x1745 -#define WM8285_GPIO36_CTRL_1 0x1746 -#define WM8285_GPIO36_CTRL_2 0x1747 -#define WM8285_GPIO37_CTRL_1 0x1748 -#define WM8285_GPIO37_CTRL_2 0x1749 -#define WM8285_GPIO38_CTRL_1 0x174A -#define WM8285_GPIO38_CTRL_2 0x174B -#define WM8285_GPIO39_CTRL_1 0x174C -#define WM8285_GPIO39_CTRL_2 0x174D -#define WM8285_GPIO40_CTRL_1 0x174E -#define WM8285_GPIO40_CTRL_2 0x174F -#define WM8285_IRQ1_STATUS_1 0x1800 -#define WM8285_IRQ1_STATUS_2 0x1801 -#define WM8285_IRQ1_STATUS_6 0x1805 -#define WM8285_IRQ1_STATUS_7 0x1806 -#define WM8285_IRQ1_STATUS_9 0x1808 -#define WM8285_IRQ1_STATUS_11 0x180A -#define WM8285_IRQ1_STATUS_12 0x180B -#define WM8285_IRQ1_STATUS_13 0x180C -#define WM8285_IRQ1_STATUS_14 0x180D -#define WM8285_IRQ1_STATUS_15 0x180E -#define WM8285_IRQ1_STATUS_17 0x1810 -#define WM8285_IRQ1_STATUS_18 0x1811 -#define WM8285_IRQ1_STATUS_19 0x1812 -#define WM8285_IRQ1_STATUS_21 0x1814 -#define WM8285_IRQ1_STATUS_22 0x1815 -#define WM8285_IRQ1_STATUS_23 0x1816 -#define WM8285_IRQ1_STATUS_24 0x1817 -#define WM8285_IRQ1_STATUS_25 0x1818 -#define WM8285_IRQ1_STATUS_27 0x181A -#define WM8285_IRQ1_STATUS_28 0x181B -#define WM8285_IRQ1_STATUS_30 0x181D -#define WM8285_IRQ1_STATUS_31 0x181E -#define WM8285_IRQ1_STATUS_32 0x181F -#define WM8285_IRQ1_MASK_1 0x1840 -#define WM8285_IRQ1_MASK_2 0x1841 -#define WM8285_IRQ1_MASK_3 0x1842 -#define WM8285_IRQ1_MASK_4 0x1843 -#define WM8285_IRQ1_MASK_5 0x1844 -#define WM8285_IRQ1_MASK_6 0x1845 -#define WM8285_IRQ1_MASK_7 0x1846 -#define WM8285_IRQ1_MASK_8 0x1847 -#define WM8285_IRQ1_MASK_9 0x1848 -#define WM8285_IRQ1_MASK_10 0x1849 -#define WM8285_IRQ1_MASK_11 0x184A -#define WM8285_IRQ1_MASK_12 0x184B -#define WM8285_IRQ1_MASK_13 0x184C -#define WM8285_IRQ1_MASK_14 0x184D -#define WM8285_IRQ1_MASK_15 0x184E -#define WM8285_IRQ1_MASK_17 0x1850 -#define WM8285_IRQ1_MASK_18 0x1851 -#define WM8285_IRQ1_MASK_19 0x1852 -#define WM8285_IRQ1_MASK_21 0x1854 -#define WM8285_IRQ1_MASK_22 0x1855 -#define WM8285_IRQ1_MASK_23 0x1856 -#define WM8285_IRQ1_MASK_24 0x1857 -#define WM8285_IRQ1_MASK_25 0x1858 -#define WM8285_IRQ1_MASK_27 0x185A -#define WM8285_IRQ1_MASK_28 0x185B -#define WM8285_IRQ1_MASK_30 0x185D -#define WM8285_IRQ1_MASK_31 0x185E -#define WM8285_IRQ1_MASK_32 0x185F -#define WM8285_IRQ1_RAW_STATUS_1 0x1880 -#define WM8285_IRQ1_RAW_STATUS_2 0x1881 -#define WM8285_IRQ1_RAW_STATUS_6 0x1885 -#define WM8285_IRQ1_RAW_STATUS_7 0x1886 -#define WM8285_IRQ1_RAW_STATUS_9 0x1888 -#define WM8285_IRQ1_RAW_STATUS_10 0x1889 -#define WM8285_IRQ1_RAW_STATUS_11 0x188A -#define WM8285_IRQ1_RAW_STATUS_12 0x188B -#define WM8285_IRQ1_RAW_STATUS_13 0x188C -#define WM8285_IRQ1_RAW_STATUS_14 0x188D -#define WM8285_IRQ1_RAW_STATUS_15 0x188E -#define WM8285_IRQ1_RAW_STATUS_17 0x1890 -#define WM8285_IRQ1_RAW_STATUS_18 0x1891 -#define WM8285_IRQ1_RAW_STATUS_19 0x1892 -#define WM8285_IRQ1_RAW_STATUS_21 0x1894 -#define WM8285_IRQ1_RAW_STATUS_22 0x1895 -#define WM8285_IRQ1_RAW_STATUS_23 0x1896 -#define WM8285_IRQ1_RAW_STATUS_24 0x1897 -#define WM8285_IRQ1_RAW_STATUS_25 0x1898 -#define WM8285_IRQ1_RAW_STATUS_30 0x189D -#define WM8285_IRQ1_RAW_STATUS_31 0x189E -#define WM8285_IRQ1_RAW_STATUS_32 0x189F -#define WM8285_IRQ2_STATUS_1 0x1900 -#define WM8285_IRQ2_STATUS_2 0x1901 -#define WM8285_IRQ2_STATUS_6 0x1905 -#define WM8285_IRQ2_STATUS_7 0x1906 -#define WM8285_IRQ2_STATUS_9 0x1908 -#define WM8285_IRQ2_STATUS_11 0x190A -#define WM8285_IRQ2_STATUS_12 0x190B -#define WM8285_IRQ2_STATUS_13 0x190C -#define WM8285_IRQ2_STATUS_14 0x190D -#define WM8285_IRQ2_STATUS_15 0x190E -#define WM8285_IRQ2_STATUS_17 0x1910 -#define WM8285_IRQ2_STATUS_18 0x1911 -#define WM8285_IRQ2_STATUS_19 0x1912 -#define WM8285_IRQ2_STATUS_21 0x1914 -#define WM8285_IRQ2_STATUS_22 0x1915 -#define WM8285_IRQ2_STATUS_23 0x1916 -#define WM8285_IRQ2_STATUS_24 0x1917 -#define WM8285_IRQ2_STATUS_25 0x1918 -#define WM8285_IRQ2_STATUS_27 0x191A -#define WM8285_IRQ2_STATUS_28 0x191B -#define WM8285_IRQ2_STATUS_30 0x191D -#define WM8285_IRQ2_STATUS_31 0x191E -#define WM8285_IRQ2_STATUS_32 0x191F -#define WM8285_IRQ2_MASK_1 0x1940 -#define WM8285_IRQ2_MASK_2 0x1941 -#define WM8285_IRQ2_MASK_6 0x1945 -#define WM8285_IRQ2_MASK_7 0x1946 -#define WM8285_IRQ2_MASK_9 0x1948 -#define WM8285_IRQ2_MASK_11 0x194A -#define WM8285_IRQ2_MASK_12 0x194B -#define WM8285_IRQ2_MASK_13 0x194C -#define WM8285_IRQ2_MASK_14 0x194D -#define WM8285_IRQ2_MASK_15 0x194E -#define WM8285_IRQ2_MASK_17 0x1950 -#define WM8285_IRQ2_MASK_18 0x1951 -#define WM8285_IRQ2_MASK_19 0x1952 -#define WM8285_IRQ2_MASK_21 0x1954 -#define WM8285_IRQ2_MASK_22 0x1955 -#define WM8285_IRQ2_MASK_23 0x1956 -#define WM8285_IRQ2_MASK_24 0x1957 -#define WM8285_IRQ2_MASK_25 0x1958 -#define WM8285_IRQ2_MASK_27 0x195A -#define WM8285_IRQ2_MASK_28 0x195B -#define WM8285_IRQ2_MASK_30 0x195D -#define WM8285_IRQ2_MASK_31 0x195E -#define WM8285_IRQ2_MASK_32 0x195F -#define WM8285_IRQ2_RAW_STATUS_1 0x1980 -#define WM8285_IRQ2_RAW_STATUS_2 0x1981 -#define WM8285_IRQ2_RAW_STATUS_6 0x1985 -#define WM8285_IRQ2_RAW_STATUS_7 0x1986 -#define WM8285_IRQ2_RAW_STATUS_9 0x1988 -#define WM8285_IRQ2_RAW_STATUS_10 0x1989 -#define WM8285_IRQ2_RAW_STATUS_11 0x198A -#define WM8285_IRQ2_RAW_STATUS_12 0x198B -#define WM8285_IRQ2_RAW_STATUS_13 0x198C -#define WM8285_IRQ2_RAW_STATUS_14 0x198D -#define WM8285_IRQ2_RAW_STATUS_15 0x198E -#define WM8285_IRQ2_RAW_STATUS_17 0x1990 -#define WM8285_IRQ2_RAW_STATUS_18 0x1991 -#define WM8285_IRQ2_RAW_STATUS_19 0x1992 -#define WM8285_IRQ2_RAW_STATUS_21 0x1994 -#define WM8285_IRQ2_RAW_STATUS_22 0x1995 -#define WM8285_IRQ2_RAW_STATUS_23 0x1996 -#define WM8285_IRQ2_RAW_STATUS_24 0x1997 -#define WM8285_IRQ2_RAW_STATUS_25 0x1998 -#define WM8285_IRQ2_RAW_STATUS_30 0x199D -#define WM8285_IRQ2_RAW_STATUS_31 0x199E -#define WM8285_IRQ2_RAW_STATUS_32 0x199F -#define WM8285_INTERRUPT_DEBOUNCE_7 0x1A06 -#define WM8285_INTERRUPT_DEBOUNCE_15 0x1A0E -#define WM8285_IRQ1_CTRL 0x1A80 -#define WM8285_IRQ2_CTRL 0x1A82 -#define WM8285_INTERRUPT_RAW_STATUS_1 0x1AA0 +#define CLEARWATER_ADSP2_IRQ0 0x1600 +#define CLEARWATER_ADSP2_IRQ1 0x1601 +#define CLEARWATER_ADSP2_IRQ2 0x1602 +#define CLEARWATER_ADSP2_IRQ3 0x1603 +#define CLEARWATER_ADSP2_IRQ4 0x1604 +#define CLEARWATER_ADSP2_IRQ5 0x1605 +#define CLEARWATER_ADSP2_IRQ6 0x1606 +#define CLEARWATER_ADSP2_IRQ7 0x1607 +#define CLEARWATER_GPIO1_CTRL_1 0x1700 +#define CLEARWATER_GPIO1_CTRL_2 0x1701 +#define CLEARWATER_GPIO2_CTRL_1 0x1702 +#define CLEARWATER_GPIO2_CTRL_2 0x1703 +#define CLEARWATER_GPIO3_CTRL_1 0x1704 +#define CLEARWATER_GPIO3_CTRL_2 0x1705 +#define CLEARWATER_GPIO4_CTRL_1 0x1706 +#define CLEARWATER_GPIO4_CTRL_2 0x1707 +#define CLEARWATER_GPIO5_CTRL_1 0x1708 +#define CLEARWATER_GPIO5_CTRL_2 0x1709 +#define CLEARWATER_GPIO6_CTRL_1 0x170A +#define CLEARWATER_GPIO6_CTRL_2 0x170B +#define CLEARWATER_GPIO7_CTRL_1 0x170C +#define CLEARWATER_GPIO7_CTRL_2 0x170D +#define CLEARWATER_GPIO8_CTRL_1 0x170E +#define CLEARWATER_GPIO8_CTRL_2 0x170F +#define CLEARWATER_GPIO9_CTRL_1 0x1710 +#define CLEARWATER_GPIO9_CTRL_2 0x1711 +#define CLEARWATER_GPIO10_CTRL_1 0x1712 +#define CLEARWATER_GPIO10_CTRL_2 0x1713 +#define CLEARWATER_GPIO11_CTRL_1 0x1714 +#define CLEARWATER_GPIO11_CTRL_2 0x1715 +#define CLEARWATER_GPIO12_CTRL_1 0x1716 +#define CLEARWATER_GPIO12_CTRL_2 0x1717 +#define CLEARWATER_GPIO13_CTRL_1 0x1718 +#define CLEARWATER_GPIO13_CTRL_2 0x1719 +#define CLEARWATER_GPIO14_CTRL_1 0x171A +#define CLEARWATER_GPIO14_CTRL_2 0x171B +#define CLEARWATER_GPIO15_CTRL_1 0x171C +#define CLEARWATER_GPIO15_CTRL_2 0x171D +#define CLEARWATER_GPIO16_CTRL_1 0x171E +#define CLEARWATER_GPIO16_CTRL_2 0x171F +#define CLEARWATER_GPIO17_CTRL_1 0x1720 +#define CLEARWATER_GPIO17_CTRL_2 0x1721 +#define CLEARWATER_GPIO18_CTRL_1 0x1722 +#define CLEARWATER_GPIO18_CTRL_2 0x1723 +#define CLEARWATER_GPIO19_CTRL_1 0x1724 +#define CLEARWATER_GPIO19_CTRL_2 0x1725 +#define CLEARWATER_GPIO20_CTRL_1 0x1726 +#define CLEARWATER_GPIO20_CTRL_2 0x1727 +#define CLEARWATER_GPIO21_CTRL_1 0x1728 +#define CLEARWATER_GPIO21_CTRL_2 0x1729 +#define CLEARWATER_GPIO22_CTRL_1 0x172A +#define CLEARWATER_GPIO22_CTRL_2 0x172B +#define CLEARWATER_GPIO23_CTRL_1 0x172C +#define CLEARWATER_GPIO23_CTRL_2 0x172D +#define CLEARWATER_GPIO24_CTRL_1 0x172E +#define CLEARWATER_GPIO24_CTRL_2 0x172F +#define CLEARWATER_GPIO25_CTRL_1 0x1730 +#define CLEARWATER_GPIO25_CTRL_2 0x1731 +#define CLEARWATER_GPIO26_CTRL_1 0x1732 +#define CLEARWATER_GPIO26_CTRL_2 0x1733 +#define CLEARWATER_GPIO27_CTRL_1 0x1734 +#define CLEARWATER_GPIO27_CTRL_2 0x1735 +#define CLEARWATER_GPIO28_CTRL_1 0x1736 +#define CLEARWATER_GPIO28_CTRL_2 0x1737 +#define CLEARWATER_GPIO29_CTRL_1 0x1738 +#define CLEARWATER_GPIO29_CTRL_2 0x1739 +#define CLEARWATER_GPIO30_CTRL_1 0x173A +#define CLEARWATER_GPIO30_CTRL_2 0x173B +#define CLEARWATER_GPIO31_CTRL_1 0x173C +#define CLEARWATER_GPIO31_CTRL_2 0x173D +#define CLEARWATER_GPIO32_CTRL_1 0x173E +#define CLEARWATER_GPIO32_CTRL_2 0x173F +#define CLEARWATER_GPIO33_CTRL_1 0x1740 +#define CLEARWATER_GPIO33_CTRL_2 0x1741 +#define CLEARWATER_GPIO34_CTRL_1 0x1742 +#define CLEARWATER_GPIO34_CTRL_2 0x1743 +#define CLEARWATER_GPIO35_CTRL_1 0x1744 +#define CLEARWATER_GPIO35_CTRL_2 0x1745 +#define CLEARWATER_GPIO36_CTRL_1 0x1746 +#define CLEARWATER_GPIO36_CTRL_2 0x1747 +#define CLEARWATER_GPIO37_CTRL_1 0x1748 +#define CLEARWATER_GPIO37_CTRL_2 0x1749 +#define CLEARWATER_GPIO38_CTRL_1 0x174A +#define CLEARWATER_GPIO38_CTRL_2 0x174B +#define CLEARWATER_GPIO39_CTRL_1 0x174C +#define CLEARWATER_GPIO39_CTRL_2 0x174D +#define CLEARWATER_GPIO40_CTRL_1 0x174E +#define CLEARWATER_GPIO40_CTRL_2 0x174F +#define CLEARWATER_IRQ1_STATUS_1 0x1800 +#define CLEARWATER_IRQ1_STATUS_2 0x1801 +#define CLEARWATER_IRQ1_STATUS_6 0x1805 +#define CLEARWATER_IRQ1_STATUS_7 0x1806 +#define CLEARWATER_IRQ1_STATUS_9 0x1808 +#define CLEARWATER_IRQ1_STATUS_11 0x180A +#define CLEARWATER_IRQ1_STATUS_12 0x180B +#define CLEARWATER_IRQ1_STATUS_13 0x180C +#define CLEARWATER_IRQ1_STATUS_14 0x180D +#define CLEARWATER_IRQ1_STATUS_15 0x180E +#define CLEARWATER_IRQ1_STATUS_17 0x1810 +#define CLEARWATER_IRQ1_STATUS_18 0x1811 +#define CLEARWATER_IRQ1_STATUS_19 0x1812 +#define CLEARWATER_IRQ1_STATUS_21 0x1814 +#define CLEARWATER_IRQ1_STATUS_22 0x1815 +#define CLEARWATER_IRQ1_STATUS_23 0x1816 +#define CLEARWATER_IRQ1_STATUS_24 0x1817 +#define CLEARWATER_IRQ1_STATUS_25 0x1818 +#define CLEARWATER_IRQ1_STATUS_27 0x181A +#define CLEARWATER_IRQ1_STATUS_28 0x181B +#define CLEARWATER_IRQ1_STATUS_30 0x181D +#define CLEARWATER_IRQ1_STATUS_31 0x181E +#define CLEARWATER_IRQ1_STATUS_32 0x181F +#define CLEARWATER_IRQ1_MASK_1 0x1840 +#define CLEARWATER_IRQ1_MASK_2 0x1841 +#define CLEARWATER_IRQ1_MASK_3 0x1842 +#define CLEARWATER_IRQ1_MASK_4 0x1843 +#define CLEARWATER_IRQ1_MASK_5 0x1844 +#define CLEARWATER_IRQ1_MASK_6 0x1845 +#define CLEARWATER_IRQ1_MASK_7 0x1846 +#define CLEARWATER_IRQ1_MASK_8 0x1847 +#define CLEARWATER_IRQ1_MASK_9 0x1848 +#define CLEARWATER_IRQ1_MASK_10 0x1849 +#define CLEARWATER_IRQ1_MASK_11 0x184A +#define CLEARWATER_IRQ1_MASK_12 0x184B +#define CLEARWATER_IRQ1_MASK_13 0x184C +#define CLEARWATER_IRQ1_MASK_14 0x184D +#define CLEARWATER_IRQ1_MASK_15 0x184E +#define CLEARWATER_IRQ1_MASK_17 0x1850 +#define CLEARWATER_IRQ1_MASK_18 0x1851 +#define CLEARWATER_IRQ1_MASK_19 0x1852 +#define CLEARWATER_IRQ1_MASK_21 0x1854 +#define CLEARWATER_IRQ1_MASK_22 0x1855 +#define CLEARWATER_IRQ1_MASK_23 0x1856 +#define CLEARWATER_IRQ1_MASK_24 0x1857 +#define CLEARWATER_IRQ1_MASK_25 0x1858 +#define CLEARWATER_IRQ1_MASK_27 0x185A +#define CLEARWATER_IRQ1_MASK_28 0x185B +#define CLEARWATER_IRQ1_MASK_30 0x185D +#define CLEARWATER_IRQ1_MASK_31 0x185E +#define CLEARWATER_IRQ1_MASK_32 0x185F +#define CLEARWATER_IRQ1_RAW_STATUS_1 0x1880 +#define CLEARWATER_IRQ1_RAW_STATUS_2 0x1881 +#define CLEARWATER_IRQ1_RAW_STATUS_6 0x1885 +#define CLEARWATER_IRQ1_RAW_STATUS_7 0x1886 +#define CLEARWATER_IRQ1_RAW_STATUS_9 0x1888 +#define CLEARWATER_IRQ1_RAW_STATUS_10 0x1889 +#define CLEARWATER_IRQ1_RAW_STATUS_11 0x188A +#define CLEARWATER_IRQ1_RAW_STATUS_12 0x188B +#define CLEARWATER_IRQ1_RAW_STATUS_13 0x188C +#define CLEARWATER_IRQ1_RAW_STATUS_14 0x188D +#define CLEARWATER_IRQ1_RAW_STATUS_15 0x188E +#define CLEARWATER_IRQ1_RAW_STATUS_17 0x1890 +#define CLEARWATER_IRQ1_RAW_STATUS_18 0x1891 +#define CLEARWATER_IRQ1_RAW_STATUS_19 0x1892 +#define CLEARWATER_IRQ1_RAW_STATUS_21 0x1894 +#define CLEARWATER_IRQ1_RAW_STATUS_22 0x1895 +#define CLEARWATER_IRQ1_RAW_STATUS_23 0x1896 +#define CLEARWATER_IRQ1_RAW_STATUS_24 0x1897 +#define CLEARWATER_IRQ1_RAW_STATUS_25 0x1898 +#define CLEARWATER_IRQ1_RAW_STATUS_30 0x189D +#define CLEARWATER_IRQ1_RAW_STATUS_31 0x189E +#define CLEARWATER_IRQ1_RAW_STATUS_32 0x189F +#define CLEARWATER_IRQ2_STATUS_1 0x1900 +#define CLEARWATER_IRQ2_STATUS_2 0x1901 +#define CLEARWATER_IRQ2_STATUS_6 0x1905 +#define CLEARWATER_IRQ2_STATUS_7 0x1906 +#define CLEARWATER_IRQ2_STATUS_9 0x1908 +#define CLEARWATER_IRQ2_STATUS_11 0x190A +#define CLEARWATER_IRQ2_STATUS_12 0x190B +#define CLEARWATER_IRQ2_STATUS_13 0x190C +#define CLEARWATER_IRQ2_STATUS_14 0x190D +#define CLEARWATER_IRQ2_STATUS_15 0x190E +#define CLEARWATER_IRQ2_STATUS_17 0x1910 +#define CLEARWATER_IRQ2_STATUS_18 0x1911 +#define CLEARWATER_IRQ2_STATUS_19 0x1912 +#define CLEARWATER_IRQ2_STATUS_21 0x1914 +#define CLEARWATER_IRQ2_STATUS_22 0x1915 +#define CLEARWATER_IRQ2_STATUS_23 0x1916 +#define CLEARWATER_IRQ2_STATUS_24 0x1917 +#define CLEARWATER_IRQ2_STATUS_25 0x1918 +#define CLEARWATER_IRQ2_STATUS_27 0x191A +#define CLEARWATER_IRQ2_STATUS_28 0x191B +#define CLEARWATER_IRQ2_STATUS_30 0x191D +#define CLEARWATER_IRQ2_STATUS_31 0x191E +#define CLEARWATER_IRQ2_STATUS_32 0x191F +#define CLEARWATER_IRQ2_MASK_1 0x1940 +#define CLEARWATER_IRQ2_MASK_2 0x1941 +#define CLEARWATER_IRQ2_MASK_6 0x1945 +#define CLEARWATER_IRQ2_MASK_7 0x1946 +#define CLEARWATER_IRQ2_MASK_9 0x1948 +#define CLEARWATER_IRQ2_MASK_11 0x194A +#define CLEARWATER_IRQ2_MASK_12 0x194B +#define CLEARWATER_IRQ2_MASK_13 0x194C +#define CLEARWATER_IRQ2_MASK_14 0x194D +#define CLEARWATER_IRQ2_MASK_15 0x194E +#define CLEARWATER_IRQ2_MASK_17 0x1950 +#define CLEARWATER_IRQ2_MASK_18 0x1951 +#define CLEARWATER_IRQ2_MASK_19 0x1952 +#define CLEARWATER_IRQ2_MASK_21 0x1954 +#define CLEARWATER_IRQ2_MASK_22 0x1955 +#define CLEARWATER_IRQ2_MASK_23 0x1956 +#define CLEARWATER_IRQ2_MASK_24 0x1957 +#define CLEARWATER_IRQ2_MASK_25 0x1958 +#define CLEARWATER_IRQ2_MASK_27 0x195A +#define CLEARWATER_IRQ2_MASK_28 0x195B +#define CLEARWATER_IRQ2_MASK_30 0x195D +#define CLEARWATER_IRQ2_MASK_31 0x195E +#define CLEARWATER_IRQ2_MASK_32 0x195F +#define CLEARWATER_IRQ2_RAW_STATUS_1 0x1980 +#define CLEARWATER_IRQ2_RAW_STATUS_2 0x1981 +#define CLEARWATER_IRQ2_RAW_STATUS_6 0x1985 +#define CLEARWATER_IRQ2_RAW_STATUS_7 0x1986 +#define CLEARWATER_IRQ2_RAW_STATUS_9 0x1988 +#define CLEARWATER_IRQ2_RAW_STATUS_10 0x1989 +#define CLEARWATER_IRQ2_RAW_STATUS_11 0x198A +#define CLEARWATER_IRQ2_RAW_STATUS_12 0x198B +#define CLEARWATER_IRQ2_RAW_STATUS_13 0x198C +#define CLEARWATER_IRQ2_RAW_STATUS_14 0x198D +#define CLEARWATER_IRQ2_RAW_STATUS_15 0x198E +#define CLEARWATER_IRQ2_RAW_STATUS_17 0x1990 +#define CLEARWATER_IRQ2_RAW_STATUS_18 0x1991 +#define CLEARWATER_IRQ2_RAW_STATUS_19 0x1992 +#define CLEARWATER_IRQ2_RAW_STATUS_21 0x1994 +#define CLEARWATER_IRQ2_RAW_STATUS_22 0x1995 +#define CLEARWATER_IRQ2_RAW_STATUS_23 0x1996 +#define CLEARWATER_IRQ2_RAW_STATUS_24 0x1997 +#define CLEARWATER_IRQ2_RAW_STATUS_25 0x1998 +#define CLEARWATER_IRQ2_RAW_STATUS_30 0x199D +#define CLEARWATER_IRQ2_RAW_STATUS_31 0x199E +#define CLEARWATER_IRQ2_RAW_STATUS_32 0x199F +#define CLEARWATER_INTERRUPT_DEBOUNCE_7 0x1A06 +#define CLEARWATER_INTERRUPT_DEBOUNCE_15 0x1A0E +#define CLEARWATER_IRQ1_CTRL 0x1A80 +#define CLEARWATER_IRQ2_CTRL 0x1A82 +#define CLEARWATER_INTERRUPT_RAW_STATUS_1 0x1AA0 #define ARIZONA_WSEQ_SEQUENCE_1 0x3000 #define ARIZONA_WSEQ_SEQUENCE_2 0x3002 #define ARIZONA_WSEQ_SEQUENCE_3 0x3004 @@ -2193,76 +2193,76 @@ #define ARIZONA_WSEQ_SEQUENCE_506 0x33F2 #define ARIZONA_WSEQ_SEQUENCE_507 0x33F4 #define ARIZONA_WSEQ_SEQUENCE_508 0x33F6 -#define WM8285_DSP1_CONFIG 0x0FFE00 -#define WM8285_DSP1_STATUS_1 0x0FFE04 -#define WM8285_DSP1_STATUS_2 0x0FFE05 -#define WM8285_DSP1_WDMA_CONFIG_1 0x0FFE30 -#define WM8285_DSP1_WDMA_CONFIG_2 0x0FFE31 -#define WM8285_DSP1_RDMA_CONFIG_1 0x0FFE34 -#define WM8285_DSP1_SCRATCH_0 0x0FFE40 -#define WM8285_DSP1_SCRATCH_1 0x0FFE41 -#define WM8285_DSP1_SCRATCH_2 0x0FFE42 -#define WM8285_DSP1_SCRATCH_3 0x0FFE43 -#define WM8285_DSP2_CONFIG 0x17FE00 -#define WM8285_DSP2_STATUS_1 0x17FE04 -#define WM8285_DSP2_STATUS_2 0x17FE05 -#define WM8285_DSP2_WDMA_CONFIG_1 0x17FE30 -#define WM8285_DSP2_WDMA_CONFIG_2 0x17FE31 -#define WM8285_DSP2_RDMA_CONFIG_1 0x17FE34 -#define WM8285_DSP2_SCRATCH_0 0x17FE40 -#define WM8285_DSP2_SCRATCH_1 0x17FE41 -#define WM8285_DSP2_SCRATCH_2 0x17FE42 -#define WM8285_DSP2_SCRATCH_3 0x17FE43 -#define WM8285_DSP3_CONFIG 0x1FFE00 -#define WM8285_DSP3_STATUS_1 0x1FFE04 -#define WM8285_DSP3_STATUS_2 0x1FFE05 -#define WM8285_DSP3_WDMA_CONFIG_1 0x1FFE30 -#define WM8285_DSP3_WDMA_CONFIG_2 0x1FFE31 -#define WM8285_DSP3_RDMA_CONFIG_1 0x1FFE34 -#define WM8285_DSP3_SCRATCH_0 0x1FFE40 -#define WM8285_DSP3_SCRATCH_1 0x1FFE41 -#define WM8285_DSP3_SCRATCH_2 0x1FFE42 -#define WM8285_DSP3_SCRATCH_3 0x1FFE43 -#define WM8285_DSP4_CONFIG 0x27FE00 -#define WM8285_DSP4_STATUS_1 0x27FE04 -#define WM8285_DSP4_STATUS_2 0x27FE05 -#define WM8285_DSP4_WDMA_CONFIG_1 0x27FE30 -#define WM8285_DSP4_WDMA_CONFIG_2 0x27FE31 -#define WM8285_DSP4_RDMA_CONFIG_1 0x27FE34 -#define WM8285_DSP4_SCRATCH_0 0x27FE40 -#define WM8285_DSP4_SCRATCH_1 0x27FE41 -#define WM8285_DSP4_SCRATCH_2 0x27FE42 -#define WM8285_DSP4_SCRATCH_3 0x27FE43 -#define WM8285_DSP5_CONFIG 0x2FFE00 -#define WM8285_DSP5_STATUS_1 0x2FFE04 -#define WM8285_DSP5_STATUS_2 0x2FFE05 -#define WM8285_DSP5_WDMA_CONFIG_1 0x2FFE30 -#define WM8285_DSP5_WDMA_CONFIG_2 0x2FFE31 -#define WM8285_DSP5_RDMA_CONFIG_1 0x2FFE34 -#define WM8285_DSP5_SCRATCH_0 0x2FFE40 -#define WM8285_DSP5_SCRATCH_1 0x2FFE41 -#define WM8285_DSP5_SCRATCH_2 0x2FFE42 -#define WM8285_DSP5_SCRATCH_3 0x2FFE43 -#define WM8285_DSP6_CONFIG 0x37FE00 -#define WM8285_DSP6_STATUS_1 0x37FE04 -#define WM8285_DSP6_STATUS_2 0x37FE05 -#define WM8285_DSP6_WDMA_CONFIG_1 0x37FE30 -#define WM8285_DSP6_WDMA_CONFIG_2 0x37FE31 -#define WM8285_DSP6_RDMA_CONFIG_1 0x37FE34 -#define WM8285_DSP6_SCRATCH_0 0x37FE40 -#define WM8285_DSP6_SCRATCH_1 0x37FE41 -#define WM8285_DSP6_SCRATCH_2 0x37FE42 -#define WM8285_DSP6_SCRATCH_3 0x37FE43 -#define WM8285_DSP7_CONFIG 0x3FFE00 -#define WM8285_DSP7_STATUS_1 0x3FFE04 -#define WM8285_DSP7_STATUS_2 0x3FFE05 -#define WM8285_DSP7_WDMA_CONFIG_1 0x3FFE30 -#define WM8285_DSP7_WDMA_CONFIG_2 0x3FFE31 -#define WM8285_DSP7_RDMA_CONFIG_1 0x3FFE34 -#define WM8285_DSP7_SCRATCH_0 0x3FFE40 -#define WM8285_DSP7_SCRATCH_1 0x3FFE41 -#define WM8285_DSP7_SCRATCH_2 0x3FFE42 -#define WM8285_DSP7_SCRATCH_3 0x3FFE43 +#define CLEARWATER_DSP1_CONFIG 0x0FFE00 +#define CLEARWATER_DSP1_STATUS_1 0x0FFE04 +#define CLEARWATER_DSP1_STATUS_2 0x0FFE05 +#define CLEARWATER_DSP1_WDMA_CONFIG_1 0x0FFE30 +#define CLEARWATER_DSP1_WDMA_CONFIG_2 0x0FFE31 +#define CLEARWATER_DSP1_RDMA_CONFIG_1 0x0FFE34 +#define CLEARWATER_DSP1_SCRATCH_0 0x0FFE40 +#define CLEARWATER_DSP1_SCRATCH_1 0x0FFE41 +#define CLEARWATER_DSP1_SCRATCH_2 0x0FFE42 +#define CLEARWATER_DSP1_SCRATCH_3 0x0FFE43 +#define CLEARWATER_DSP2_CONFIG 0x17FE00 +#define CLEARWATER_DSP2_STATUS_1 0x17FE04 +#define CLEARWATER_DSP2_STATUS_2 0x17FE05 +#define CLEARWATER_DSP2_WDMA_CONFIG_1 0x17FE30 +#define CLEARWATER_DSP2_WDMA_CONFIG_2 0x17FE31 +#define CLEARWATER_DSP2_RDMA_CONFIG_1 0x17FE34 +#define CLEARWATER_DSP2_SCRATCH_0 0x17FE40 +#define CLEARWATER_DSP2_SCRATCH_1 0x17FE41 +#define CLEARWATER_DSP2_SCRATCH_2 0x17FE42 +#define CLEARWATER_DSP2_SCRATCH_3 0x17FE43 +#define CLEARWATER_DSP3_CONFIG 0x1FFE00 +#define CLEARWATER_DSP3_STATUS_1 0x1FFE04 +#define CLEARWATER_DSP3_STATUS_2 0x1FFE05 +#define CLEARWATER_DSP3_WDMA_CONFIG_1 0x1FFE30 +#define CLEARWATER_DSP3_WDMA_CONFIG_2 0x1FFE31 +#define CLEARWATER_DSP3_RDMA_CONFIG_1 0x1FFE34 +#define CLEARWATER_DSP3_SCRATCH_0 0x1FFE40 +#define CLEARWATER_DSP3_SCRATCH_1 0x1FFE41 +#define CLEARWATER_DSP3_SCRATCH_2 0x1FFE42 +#define CLEARWATER_DSP3_SCRATCH_3 0x1FFE43 +#define CLEARWATER_DSP4_CONFIG 0x27FE00 +#define CLEARWATER_DSP4_STATUS_1 0x27FE04 +#define CLEARWATER_DSP4_STATUS_2 0x27FE05 +#define CLEARWATER_DSP4_WDMA_CONFIG_1 0x27FE30 +#define CLEARWATER_DSP4_WDMA_CONFIG_2 0x27FE31 +#define CLEARWATER_DSP4_RDMA_CONFIG_1 0x27FE34 +#define CLEARWATER_DSP4_SCRATCH_0 0x27FE40 +#define CLEARWATER_DSP4_SCRATCH_1 0x27FE41 +#define CLEARWATER_DSP4_SCRATCH_2 0x27FE42 +#define CLEARWATER_DSP4_SCRATCH_3 0x27FE43 +#define CLEARWATER_DSP5_CONFIG 0x2FFE00 +#define CLEARWATER_DSP5_STATUS_1 0x2FFE04 +#define CLEARWATER_DSP5_STATUS_2 0x2FFE05 +#define CLEARWATER_DSP5_WDMA_CONFIG_1 0x2FFE30 +#define CLEARWATER_DSP5_WDMA_CONFIG_2 0x2FFE31 +#define CLEARWATER_DSP5_RDMA_CONFIG_1 0x2FFE34 +#define CLEARWATER_DSP5_SCRATCH_0 0x2FFE40 +#define CLEARWATER_DSP5_SCRATCH_1 0x2FFE41 +#define CLEARWATER_DSP5_SCRATCH_2 0x2FFE42 +#define CLEARWATER_DSP5_SCRATCH_3 0x2FFE43 +#define CLEARWATER_DSP6_CONFIG 0x37FE00 +#define CLEARWATER_DSP6_STATUS_1 0x37FE04 +#define CLEARWATER_DSP6_STATUS_2 0x37FE05 +#define CLEARWATER_DSP6_WDMA_CONFIG_1 0x37FE30 +#define CLEARWATER_DSP6_WDMA_CONFIG_2 0x37FE31 +#define CLEARWATER_DSP6_RDMA_CONFIG_1 0x37FE34 +#define CLEARWATER_DSP6_SCRATCH_0 0x37FE40 +#define CLEARWATER_DSP6_SCRATCH_1 0x37FE41 +#define CLEARWATER_DSP6_SCRATCH_2 0x37FE42 +#define CLEARWATER_DSP6_SCRATCH_3 0x37FE43 +#define CLEARWATER_DSP7_CONFIG 0x3FFE00 +#define CLEARWATER_DSP7_STATUS_1 0x3FFE04 +#define CLEARWATER_DSP7_STATUS_2 0x3FFE05 +#define CLEARWATER_DSP7_WDMA_CONFIG_1 0x3FFE30 +#define CLEARWATER_DSP7_WDMA_CONFIG_2 0x3FFE31 +#define CLEARWATER_DSP7_RDMA_CONFIG_1 0x3FFE34 +#define CLEARWATER_DSP7_SCRATCH_0 0x3FFE40 +#define CLEARWATER_DSP7_SCRATCH_1 0x3FFE41 +#define CLEARWATER_DSP7_SCRATCH_2 0x3FFE42 +#define CLEARWATER_DSP7_SCRATCH_3 0x3FFE43 /* * Field Definitions. @@ -2799,25 +2799,25 @@ /* * R109 (0x120) - DSP_Clock_1 */ -#define WM8285_DSP_CLK_FREQ_LEGACY 0x0700 /* DSP_CLK_FREQ_LEGACY - [10:8] */ -#define WM8285_DSP_CLK_FREQ_LEGACY_MASK 0x0700 /* DSP_CLK_FREQ_LEGACY - [10:8] */ -#define WM8285_DSP_CLK_FREQ_LEGACY_SHIFT 8 /* DSP_CLK_FREQ_LEGACY - [10:8] */ -#define WM8285_DSP_CLK_FREQ_LEGACY_WIDTH 3 /* DSP_CLK_FREQ_LEGACY - [10:8] */ -#define WM8285_DSP_CLK_ENA 0x0040 /* DSP_CLK_ENA */ -#define WM8285_DSP_CLK_ENA_MASK 0x0040 /* DSP_CLK_ENA */ -#define WM8285_DSP_CLK_ENA_SHIFT 6 /* DSP_CLK_ENA */ -#define WM8285_DSP_CLK_ENA_WIDTH 1 /* DSP_CLK_ENA */ -#define WM8285_DSP_CLK_SRC 0x000F /* DSP_CLK_SRC - [3:0] */ -#define WM8285_DSP_CLK_SRC_MASK 0x000F /* DSP_CLK_SRC - [3:0] */ -#define WM8285_DSP_CLK_SRC_SHIFT 0 /* DSP_CLK_SRC - [3:0] */ -#define WM8285_DSP_CLK_SRC_WIDTH 4 /* DSP_CLK_SRC - [3:0] */ +#define CLEARWATER_DSP_CLK_FREQ_LEGACY 0x0700 /* DSP_CLK_FREQ_LEGACY - [10:8] */ +#define CLEARWATER_DSP_CLK_FREQ_LEGACY_MASK 0x0700 /* DSP_CLK_FREQ_LEGACY - [10:8] */ +#define CLEARWATER_DSP_CLK_FREQ_LEGACY_SHIFT 8 /* DSP_CLK_FREQ_LEGACY - [10:8] */ +#define CLEARWATER_DSP_CLK_FREQ_LEGACY_WIDTH 3 /* DSP_CLK_FREQ_LEGACY - [10:8] */ +#define CLEARWATER_DSP_CLK_ENA 0x0040 /* DSP_CLK_ENA */ +#define CLEARWATER_DSP_CLK_ENA_MASK 0x0040 /* DSP_CLK_ENA */ +#define CLEARWATER_DSP_CLK_ENA_SHIFT 6 /* DSP_CLK_ENA */ +#define CLEARWATER_DSP_CLK_ENA_WIDTH 1 /* DSP_CLK_ENA */ +#define CLEARWATER_DSP_CLK_SRC 0x000F /* DSP_CLK_SRC - [3:0] */ +#define CLEARWATER_DSP_CLK_SRC_MASK 0x000F /* DSP_CLK_SRC - [3:0] */ +#define CLEARWATER_DSP_CLK_SRC_SHIFT 0 /* DSP_CLK_SRC - [3:0] */ +#define CLEARWATER_DSP_CLK_SRC_WIDTH 4 /* DSP_CLK_SRC - [3:0] */ /* * R110 (0x122) - DSP_Clock_2 */ -#define WM8285_DSP_CLK_FREQ_MASK 0x03FF /* DSP_CLK_FREQ - [9:0] */ -#define WM8285_DSP_CLK_FREQ_SHIFT 0 /* DSP_CLK_FREQ - [9:0] */ -#define WM8285_DSP_CLK_FREQ_WIDTH 10 /* DSP_CLK_FREQ - [9:0] */ +#define CLEARWATER_DSP_CLK_FREQ_MASK 0x03FF /* DSP_CLK_FREQ - [9:0] */ +#define CLEARWATER_DSP_CLK_FREQ_SHIFT 0 /* DSP_CLK_FREQ - [9:0] */ +#define CLEARWATER_DSP_CLK_FREQ_WIDTH 10 /* DSP_CLK_FREQ - [9:0] */ /* * R329 (0x149) - Output system clock @@ -3629,9 +3629,9 @@ #define ARIZONA_HP_IDAC_STEER_MASK 0x0004 /* HP_IDAC_STEER */ #define ARIZONA_HP_IDAC_STEER_SHIFT 2 /* HP_IDAC_STEER */ #define ARIZONA_HP_IDAC_STEER_WIDTH 1 /* HP_IDAC_STEER */ -#define WM8285_HP_RATE_MASK 0x0006 /* HP_RATE - [2:1] */ -#define WM8285_HP_RATE_SHIFT 1 /* HP_RATE - [2:1] */ -#define WM8285_HP_RATE_WIDTH 2 /* HP_RATE - [2:1] */ +#define CLEARWATER_HP_RATE_MASK 0x0006 /* HP_RATE - [2:1] */ +#define CLEARWATER_HP_RATE_SHIFT 1 /* HP_RATE - [2:1] */ +#define CLEARWATER_HP_RATE_WIDTH 2 /* HP_RATE - [2:1] */ #define ARIZONA_HP_RATE 0x0002 /* HP_RATE */ #define ARIZONA_HP_RATE_MASK 0x0002 /* HP_RATE */ #define ARIZONA_HP_RATE_SHIFT 1 /* HP_RATE */ @@ -3750,10 +3750,10 @@ /* * R710 (0x2C6) - Micd Clamp control */ -#define WM8285_MICD_CLAMP_OVD_MASK 0x0010 /* MICD_CLAMP_OVD */ -#define WM8285_MICD_CLAMP_OVD_SHIFT 4 /* MICD_CLAMP_OVD */ -#define WM8285_MICD_CLAMP_OVD_WIDTH 1 /* MICD_CLAMP_OVD */ -#define WM8285_MICD_CLAMP_OVD 0x10 /* MICD_CLAMP_OVD */ +#define CLEARWATER_MICD_CLAMP_OVD_MASK 0x0010 /* MICD_CLAMP_OVD */ +#define CLEARWATER_MICD_CLAMP_OVD_SHIFT 4 /* MICD_CLAMP_OVD */ +#define CLEARWATER_MICD_CLAMP_OVD_WIDTH 1 /* MICD_CLAMP_OVD */ +#define CLEARWATER_MICD_CLAMP_OVD 0x10 /* MICD_CLAMP_OVD */ /* * R715 (0x2CB) - Isolation control @@ -3900,9 +3900,9 @@ #define ARIZONA_IN1_DMICL_DLY_MASK 0x003F /* IN1_DMICL_DLY - [5:0] */ #define ARIZONA_IN1_DMICL_DLY_SHIFT 0 /* IN1_DMICL_DLY - [5:0] */ #define ARIZONA_IN1_DMICL_DLY_WIDTH 6 /* IN1_DMICL_DLY - [5:0] */ -#define WM8285_IN1_OSR_MASK 0x0700 /* IN1_OSR - [8:10] */ -#define WM8285_IN1_OSR_SHIFT 8 /* IN1_OSR - [8:10] */ -#define WM8285_IN1_OSR_WIDTH 3 /* IN1_OSR - [8:10] */ +#define CLEARWATER_IN1_OSR_MASK 0x0700 /* IN1_OSR - [8:10] */ +#define CLEARWATER_IN1_OSR_SHIFT 8 /* IN1_OSR - [8:10] */ +#define CLEARWATER_IN1_OSR_WIDTH 3 /* IN1_OSR - [8:10] */ /* * R788 (0x314) - IN1R Control @@ -3991,9 +3991,9 @@ #define ARIZONA_IN2_DMICL_DLY_MASK 0x003F /* IN2_DMICL_DLY - [5:0] */ #define ARIZONA_IN2_DMICL_DLY_SHIFT 0 /* IN2_DMICL_DLY - [5:0] */ #define ARIZONA_IN2_DMICL_DLY_WIDTH 6 /* IN2_DMICL_DLY - [5:0] */ -#define WM8285_IN2_OSR_MASK 0x0700 /* IN2_OSR - [8:10] */ -#define WM8285_IN2_OSR_SHIFT 8 /* IN2_OSR - [8:10] */ -#define WM8285_IN2_OSR_WIDTH 3 /* IN2_OSR - [8:10] */ +#define CLEARWATER_IN2_OSR_MASK 0x0700 /* IN2_OSR - [8:10] */ +#define CLEARWATER_IN2_OSR_SHIFT 8 /* IN2_OSR - [8:10] */ +#define CLEARWATER_IN2_OSR_WIDTH 3 /* IN2_OSR - [8:10] */ /* * R796 (0x31C) - IN2R Control @@ -4076,9 +4076,9 @@ #define ARIZONA_IN3_DMICL_DLY_MASK 0x003F /* IN3_DMICL_DLY - [5:0] */ #define ARIZONA_IN3_DMICL_DLY_SHIFT 0 /* IN3_DMICL_DLY - [5:0] */ #define ARIZONA_IN3_DMICL_DLY_WIDTH 6 /* IN3_DMICL_DLY - [5:0] */ -#define WM8285_IN3_OSR_MASK 0x0700 /* IN3_OSR - [8:10] */ -#define WM8285_IN3_OSR_SHIFT 8 /* IN3_OSR - [8:10] */ -#define WM8285_IN3_OSR_WIDTH 3 /* IN3_OSR - [8:10] */ +#define CLEARWATER_IN3_OSR_MASK 0x0700 /* IN3_OSR - [8:10] */ +#define CLEARWATER_IN3_OSR_SHIFT 8 /* IN3_OSR - [8:10] */ +#define CLEARWATER_IN3_OSR_WIDTH 3 /* IN3_OSR - [8:10] */ /* * R804 (0x324) - IN3R Control @@ -4146,9 +4146,9 @@ #define ARIZONA_IN4L_DMIC_DLY_MASK 0x003F /* IN4L_DMIC_DLY - [5:0] */ #define ARIZONA_IN4L_DMIC_DLY_SHIFT 0 /* IN4L_DMIC_DLY - [5:0] */ #define ARIZONA_IN4L_DMIC_DLY_WIDTH 6 /* IN4L_DMIC_DLY - [5:0] */ -#define WM8285_IN4_OSR_MASK 0x0700 /* IN4_OSR - [8:10] */ -#define WM8285_IN4_OSR_SHIFT 8 /* IN4_OSR - [8:10] */ -#define WM8285_IN4_OSR_WIDTH 3 /* IN4_OSR - [8:10] */ +#define CLEARWATER_IN4_OSR_MASK 0x0700 /* IN4_OSR - [8:10] */ +#define CLEARWATER_IN4_OSR_SHIFT 8 /* IN4_OSR - [8:10] */ +#define CLEARWATER_IN4_OSR_WIDTH 3 /* IN4_OSR - [8:10] */ /* * R812 (0x32C) - IN4R Control @@ -4213,9 +4213,9 @@ #define ARIZONA_IN5L_DMIC_DLY_MASK 0x003F /* IN5L_DMIC_DLY - [5:0] */ #define ARIZONA_IN5L_DMIC_DLY_SHIFT 0 /* IN5L_DMIC_DLY - [5:0] */ #define ARIZONA_IN5L_DMIC_DLY_WIDTH 6 /* IN5L_DMIC_DLY - [5:0] */ -#define WM8285_IN5_OSR_MASK 0x0700 /* IN5_OSR - [8:10] */ -#define WM8285_IN5_OSR_SHIFT 8 /* IN5_OSR - [8:10] */ -#define WM8285_IN5_OSR_WIDTH 3 /* IN5_OSR - [8:10] */ +#define CLEARWATER_IN5_OSR_MASK 0x0700 /* IN5_OSR - [8:10] */ +#define CLEARWATER_IN5_OSR_SHIFT 8 /* IN5_OSR - [8:10] */ +#define CLEARWATER_IN5_OSR_WIDTH 3 /* IN5_OSR - [8:10] */ /* * R820 (0x334) - IN5R Control @@ -4280,9 +4280,9 @@ #define ARIZONA_IN6L_DMIC_DLY_MASK 0x003F /* IN6L_DMIC_DLY - [5:0] */ #define ARIZONA_IN6L_DMIC_DLY_SHIFT 0 /* IN6L_DMIC_DLY - [5:0] */ #define ARIZONA_IN6L_DMIC_DLY_WIDTH 6 /* IN6L_DMIC_DLY - [5:0] */ -#define WM8285_IN6_OSR_MASK 0x0700 /* IN6_OSR - [8:10] */ -#define WM8285_IN6_OSR_SHIFT 8 /* IN6_OSR - [8:10] */ -#define WM8285_IN6_OSR_WIDTH 3 /* IN6_OSR - [8:10] */ +#define CLEARWATER_IN6_OSR_MASK 0x0700 /* IN6_OSR - [8:10] */ +#define CLEARWATER_IN6_OSR_SHIFT 8 /* IN6_OSR - [8:10] */ +#define CLEARWATER_IN6_OSR_WIDTH 3 /* IN6_OSR - [8:10] */ /* * R828 (0x33C) - IN6R Control @@ -5000,54 +5000,54 @@ /* R486 (0x448) - EDRE_Enable */ -#define WM8285_EDRE_OUT4L_THR3_ENA 0x0800 /* EDRE_OUT4L_THR3_ENA */ -#define WM8285_EDRE_OUT4L_THR3_ENA_MASK 0x0800 /* EDRE_OUT4L_THR3_ENA */ -#define WM8285_EDRE_OUT4L_THR3_ENA_SHIFT 11 /* EDRE_OUT4L_THR3_ENA */ -#define WM8285_EDRE_OUT4L_THR3_ENA_WIDTH 1 /* EDRE_OUT4L_THR3_ENA */ -#define WM8285_EDRE_OUT4R_THR3_ENA 0x0400 /* EDRE_OUT4R_THR3_ENA */ -#define WM8285_EDRE_OUT4R_THR3_ENA_MASK 0x0400 /* EDRE_OUT4R_THR3_ENA */ -#define WM8285_EDRE_OUT4R_THR3_ENA_SHIFT 10 /* EDRE_OUT4R_THR3_ENA */ -#define WM8285_EDRE_OUT4R_THR3_ENA_WIDTH 1 /* EDRE_OUT4R_THR3_ENA */ -#define WM8285_EDRE_OUT4L_THR2_ENA 0x0200 /* EDRE_OUT4L_THR2_ENA */ -#define WM8285_EDRE_OUT4L_THR2_ENA_MASK 0x0200 /* EDRE_OUT4L_THR2_ENA */ -#define WM8285_EDRE_OUT4L_THR2_ENA_SHIFT 9 /* EDRE_OUT4L_THR2_ENA */ -#define WM8285_EDRE_OUT4L_THR2_ENA_WIDTH 1 /* EDRE_OUT4L_THR2_ENA */ -#define WM8285_EDRE_OUT4R_THR2_ENA 0x0100 /* EDRE_OUT4R_THR2_ENA */ -#define WM8285_EDRE_OUT4R_THR2_ENA_MASK 0x0100 /* EDRE_OUT4R_THR2_ENA */ -#define WM8285_EDRE_OUT4R_THR2_ENA_SHIFT 8 /* EDRE_OUT4R_THR2_ENA */ -#define WM8285_EDRE_OUT4R_THR2_ENA_WIDTH 1 /* EDRE_OUT4R_THR2_ENA */ -#define WM8285_EDRE_OUT4L_THR1_ENA 0x0080 /* EDRE_OUT4L_THR1_ENA */ -#define WM8285_EDRE_OUT4L_THR1_ENA_MASK 0x0080 /* EDRE_OUT4L_THR1_ENA */ -#define WM8285_EDRE_OUT4L_THR1_ENA_SHIFT 7 /* EDRE_OUT4L_THR1_ENA */ -#define WM8285_EDRE_OUT4L_THR1_ENA_WIDTH 1 /* EDRE_OUT4L_THR1_ENA */ -#define WM8285_EDRE_OUT4R_THR1_ENA 0x0040 /* EDRE_OUT4R_THR1_ENA */ -#define WM8285_EDRE_OUT4R_THR1_ENA_MASK 0x0040 /* EDRE_OUT4R_THR1_ENA */ -#define WM8285_EDRE_OUT4R_THR1_ENA_SHIFT 6 /* EDRE_OUT4R_THR1_ENA */ -#define WM8285_EDRE_OUT4R_THR1_ENA_WIDTH 1 /* EDRE_OUT4R_THR1_ENA */ -#define WM8285_EDRE_OUT3L_THR1_ENA 0x0020 /* EDRE_OUT3L_THR1_ENA */ -#define WM8285_EDRE_OUT3L_THR1_ENA_MASK 0x0020 /* EDRE_OUT3L_THR1_ENA */ -#define WM8285_EDRE_OUT3L_THR1_ENA_SHIFT 5 /* EDRE_OUT3L_THR1_ENA */ -#define WM8285_EDRE_OUT3L_THR1_ENA_WIDTH 1 /* EDRE_OUT3L_THR1_ENA */ -#define WM8285_EDRE_OUT3R_THR1_ENA 0x0010 /* EDRE_OUT3R_THR1_ENA */ -#define WM8285_EDRE_OUT3R_THR1_ENA_MASK 0x0010 /* EDRE_OUT3R_THR1_ENA */ -#define WM8285_EDRE_OUT3R_THR1_ENA_SHIFT 4 /* EDRE_OUT3R_THR1_ENA */ -#define WM8285_EDRE_OUT3R_THR1_ENA_WIDTH 1 /* EDRE_OUT3R_THR1_ENA */ -#define WM8285_EDRE_OUT2L_THR1_ENA 0x0008 /* EDRE_OUT2L_THR1_ENA */ -#define WM8285_EDRE_OUT2L_THR1_ENA_MASK 0x0008 /* EDRE_OUT2L_THR1_ENA */ -#define WM8285_EDRE_OUT2L_THR1_ENA_SHIFT 3 /* EDRE_OUT2L_THR1_ENA */ -#define WM8285_EDRE_OUT2L_THR1_ENA_WIDTH 1 /* EDRE_OUT2L_THR1_ENA */ -#define WM8285_EDRE_OUT2R_THR1_ENA 0x0004 /* EDRE_OUT2R_THR1_ENA */ -#define WM8285_EDRE_OUT2R_THR1_ENA_MASK 0x0004 /* EDRE_OUT2R_THR1_ENA */ -#define WM8285_EDRE_OUT2R_THR1_ENA_SHIFT 2 /* EDRE_OUT2R_THR1_ENA */ -#define WM8285_EDRE_OUT2R_THR1_ENA_WIDTH 1 /* EDRE_OUT2R_THR1_ENA */ -#define WM8285_EDRE_OUT1L_THR1_ENA 0x0002 /* EDRE_OUT1L_THR1_ENA */ -#define WM8285_EDRE_OUT1L_THR1_ENA_MASK 0x0002 /* EDRE_OUT1L_THR1_ENA */ -#define WM8285_EDRE_OUT1L_THR1_ENA_SHIFT 1 /* EDRE_OUT1L_THR1_ENA */ -#define WM8285_EDRE_OUT1L_THR1_ENA_WIDTH 1 /* EDRE_OUT1L_THR1_ENA */ -#define WM8285_EDRE_OUT1R_THR1_ENA 0x0001 /* EDRE_OUT1R_THR1_ENA */ -#define WM8285_EDRE_OUT1R_THR1_ENA_MASK 0x0001 /* EDRE_OUT1R_THR1_ENA */ -#define WM8285_EDRE_OUT1R_THR1_ENA_SHIFT 0 /* EDRE_OUT1R_THR1_ENA */ -#define WM8285_EDRE_OUT1R_THR1_ENA_WIDTH 1 /* EDRE_OUT1R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR3_ENA 0x0800 /* EDRE_OUT4L_THR3_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR3_ENA_MASK 0x0800 /* EDRE_OUT4L_THR3_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR3_ENA_SHIFT 11 /* EDRE_OUT4L_THR3_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR3_ENA_WIDTH 1 /* EDRE_OUT4L_THR3_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR3_ENA 0x0400 /* EDRE_OUT4R_THR3_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR3_ENA_MASK 0x0400 /* EDRE_OUT4R_THR3_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR3_ENA_SHIFT 10 /* EDRE_OUT4R_THR3_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR3_ENA_WIDTH 1 /* EDRE_OUT4R_THR3_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR2_ENA 0x0200 /* EDRE_OUT4L_THR2_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR2_ENA_MASK 0x0200 /* EDRE_OUT4L_THR2_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR2_ENA_SHIFT 9 /* EDRE_OUT4L_THR2_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR2_ENA_WIDTH 1 /* EDRE_OUT4L_THR2_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR2_ENA 0x0100 /* EDRE_OUT4R_THR2_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR2_ENA_MASK 0x0100 /* EDRE_OUT4R_THR2_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR2_ENA_SHIFT 8 /* EDRE_OUT4R_THR2_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR2_ENA_WIDTH 1 /* EDRE_OUT4R_THR2_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR1_ENA 0x0080 /* EDRE_OUT4L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR1_ENA_MASK 0x0080 /* EDRE_OUT4L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR1_ENA_SHIFT 7 /* EDRE_OUT4L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR1_ENA_WIDTH 1 /* EDRE_OUT4L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR1_ENA 0x0040 /* EDRE_OUT4R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR1_ENA_MASK 0x0040 /* EDRE_OUT4R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR1_ENA_SHIFT 6 /* EDRE_OUT4R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR1_ENA_WIDTH 1 /* EDRE_OUT4R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT3L_THR1_ENA 0x0020 /* EDRE_OUT3L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT3L_THR1_ENA_MASK 0x0020 /* EDRE_OUT3L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT3L_THR1_ENA_SHIFT 5 /* EDRE_OUT3L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT3L_THR1_ENA_WIDTH 1 /* EDRE_OUT3L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT3R_THR1_ENA 0x0010 /* EDRE_OUT3R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT3R_THR1_ENA_MASK 0x0010 /* EDRE_OUT3R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT3R_THR1_ENA_SHIFT 4 /* EDRE_OUT3R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT3R_THR1_ENA_WIDTH 1 /* EDRE_OUT3R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT2L_THR1_ENA 0x0008 /* EDRE_OUT2L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT2L_THR1_ENA_MASK 0x0008 /* EDRE_OUT2L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT2L_THR1_ENA_SHIFT 3 /* EDRE_OUT2L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT2L_THR1_ENA_WIDTH 1 /* EDRE_OUT2L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT2R_THR1_ENA 0x0004 /* EDRE_OUT2R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT2R_THR1_ENA_MASK 0x0004 /* EDRE_OUT2R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT2R_THR1_ENA_SHIFT 2 /* EDRE_OUT2R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT2R_THR1_ENA_WIDTH 1 /* EDRE_OUT2R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT1L_THR1_ENA 0x0002 /* EDRE_OUT1L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT1L_THR1_ENA_MASK 0x0002 /* EDRE_OUT1L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT1L_THR1_ENA_SHIFT 1 /* EDRE_OUT1L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT1L_THR1_ENA_WIDTH 1 /* EDRE_OUT1L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT1R_THR1_ENA 0x0001 /* EDRE_OUT1R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT1R_THR1_ENA_MASK 0x0001 /* EDRE_OUT1R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT1R_THR1_ENA_SHIFT 0 /* EDRE_OUT1R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT1R_THR1_ENA_WIDTH 1 /* EDRE_OUT1R_THR1_ENA */ /* * R1104 (0x450) - DAC AEC Control 1 @@ -9604,70 +9604,70 @@ /* * R3808 (0xED0) - ASRC2_ENABLE */ -#define WM8285_ASRC2_IN2L_ENA 0x0008 /* ASRC2L_ENA */ -#define WM8285_ASRC2_IN2L_ENA_MASK 0x0008 /* ASRC2L_ENA */ -#define WM8285_ASRC2_IN2L_ENA_SHIFT 3 /* ASRC2L_ENA */ -#define WM8285_ASRC2_IN2L_ENA_WIDTH 1 /* ASRC2L_ENA */ -#define WM8285_ASRC2_IN2R_ENA 0x0004 /* ASRC2R_ENA */ -#define WM8285_ASRC2_IN2R_ENA_MASK 0x0004 /* ASRC2R_ENA */ -#define WM8285_ASRC2_IN2R_ENA_SHIFT 2 /* ASRC2R_ENA */ -#define WM8285_ASRC2_IN2R_ENA_WIDTH 1 /* ASRC2R_ENA */ -#define WM8285_ASRC2_IN1L_ENA 0x0002 /* ASRC1L_ENA */ -#define WM8285_ASRC2_IN1L_ENA_MASK 0x0002 /* ASRC1L_ENA */ -#define WM8285_ASRC2_IN1L_ENA_SHIFT 1 /* ASRC1L_ENA */ -#define WM8285_ASRC2_IN1L_ENA_WIDTH 1 /* ASRC1L_ENA */ -#define WM8285_ASRC2_IN1R_ENA 0x0001 /* ASRC1R_ENA */ -#define WM8285_ASRC2_IN1R_ENA_MASK 0x0001 /* ASRC1R_ENA */ -#define WM8285_ASRC2_IN1R_ENA_SHIFT 0 /* ASRC1R_ENA */ -#define WM8285_ASRC2_IN1R_ENA_WIDTH 1 /* ASRC1R_ENA */ +#define CLEARWATER_ASRC2_IN2L_ENA 0x0008 /* ASRC2L_ENA */ +#define CLEARWATER_ASRC2_IN2L_ENA_MASK 0x0008 /* ASRC2L_ENA */ +#define CLEARWATER_ASRC2_IN2L_ENA_SHIFT 3 /* ASRC2L_ENA */ +#define CLEARWATER_ASRC2_IN2L_ENA_WIDTH 1 /* ASRC2L_ENA */ +#define CLEARWATER_ASRC2_IN2R_ENA 0x0004 /* ASRC2R_ENA */ +#define CLEARWATER_ASRC2_IN2R_ENA_MASK 0x0004 /* ASRC2R_ENA */ +#define CLEARWATER_ASRC2_IN2R_ENA_SHIFT 2 /* ASRC2R_ENA */ +#define CLEARWATER_ASRC2_IN2R_ENA_WIDTH 1 /* ASRC2R_ENA */ +#define CLEARWATER_ASRC2_IN1L_ENA 0x0002 /* ASRC1L_ENA */ +#define CLEARWATER_ASRC2_IN1L_ENA_MASK 0x0002 /* ASRC1L_ENA */ +#define CLEARWATER_ASRC2_IN1L_ENA_SHIFT 1 /* ASRC1L_ENA */ +#define CLEARWATER_ASRC2_IN1L_ENA_WIDTH 1 /* ASRC1L_ENA */ +#define CLEARWATER_ASRC2_IN1R_ENA 0x0001 /* ASRC1R_ENA */ +#define CLEARWATER_ASRC2_IN1R_ENA_MASK 0x0001 /* ASRC1R_ENA */ +#define CLEARWATER_ASRC2_IN1R_ENA_SHIFT 0 /* ASRC1R_ENA */ +#define CLEARWATER_ASRC2_IN1R_ENA_WIDTH 1 /* ASRC1R_ENA */ /* * R3810 (0xED2) - ASRC2_RATE1 */ -#define WM8285_ASRC2_RATE1_MASK 0x7800 /* ASRC_RATE1 - [14:11] */ -#define WM8285_ASRC2_RATE1_SHIFT 11 /* ASRC_RATE1 - [14:11] */ -#define WM8285_ASRC2_RATE1_WIDTH 4 /* ASRC_RATE1 - [14:11] */ +#define CLEARWATER_ASRC2_RATE1_MASK 0x7800 /* ASRC_RATE1 - [14:11] */ +#define CLEARWATER_ASRC2_RATE1_SHIFT 11 /* ASRC_RATE1 - [14:11] */ +#define CLEARWATER_ASRC2_RATE1_WIDTH 4 /* ASRC_RATE1 - [14:11] */ /* * R3811 (0xED3) - ASRC2_RATE2 */ -#define WM8285_ASRC2_RATE2_MASK 0x7800 /* ASRC_RATE2 - [14:11] */ -#define WM8285_ASRC2_RATE2_SHIFT 11 /* ASRC_RATE2 - [14:11] */ -#define WM8285_ASRC2_RATE2_WIDTH 4 /* ASRC_RATE2 - [14:11] */ +#define CLEARWATER_ASRC2_RATE2_MASK 0x7800 /* ASRC_RATE2 - [14:11] */ +#define CLEARWATER_ASRC2_RATE2_SHIFT 11 /* ASRC_RATE2 - [14:11] */ +#define CLEARWATER_ASRC2_RATE2_WIDTH 4 /* ASRC_RATE2 - [14:11] */ /* * R3808 (0xEE0) - ASRC1_ENABLE */ -#define WM8285_ASRC1_IN2L_ENA 0x0008 /* ASRC2L_ENA */ -#define WM8285_ASRC1_IN2L_ENA_MASK 0x0008 /* ASRC2L_ENA */ -#define WM8285_ASRC1_IN2L_ENA_SHIFT 3 /* ASRC2L_ENA */ -#define WM8285_ASRC1_IN2L_ENA_WIDTH 1 /* ASRC2L_ENA */ -#define WM8285_ASRC1_IN2R_ENA 0x0004 /* ASRC2R_ENA */ -#define WM8285_ASRC1_IN2R_ENA_MASK 0x0004 /* ASRC2R_ENA */ -#define WM8285_ASRC1_IN2R_ENA_SHIFT 2 /* ASRC2R_ENA */ -#define WM8285_ASRC1_IN2R_ENA_WIDTH 1 /* ASRC2R_ENA */ -#define WM8285_ASRC1_IN1L_ENA 0x0002 /* ASRC1L_ENA */ -#define WM8285_ASRC1_IN1L_ENA_MASK 0x0002 /* ASRC1L_ENA */ -#define WM8285_ASRC1_IN1L_ENA_SHIFT 1 /* ASRC1L_ENA */ -#define WM8285_ASRC1_IN1L_ENA_WIDTH 1 /* ASRC1L_ENA */ -#define WM8285_ASRC1_IN1R_ENA 0x0001 /* ASRC1R_ENA */ -#define WM8285_ASRC1_IN1R_ENA_MASK 0x0001 /* ASRC1R_ENA */ -#define WM8285_ASRC1_IN1R_ENA_SHIFT 0 /* ASRC1R_ENA */ -#define WM8285_ASRC1_IN1R_ENA_WIDTH 1 /* ASRC1R_ENA */ +#define CLEARWATER_ASRC1_IN2L_ENA 0x0008 /* ASRC2L_ENA */ +#define CLEARWATER_ASRC1_IN2L_ENA_MASK 0x0008 /* ASRC2L_ENA */ +#define CLEARWATER_ASRC1_IN2L_ENA_SHIFT 3 /* ASRC2L_ENA */ +#define CLEARWATER_ASRC1_IN2L_ENA_WIDTH 1 /* ASRC2L_ENA */ +#define CLEARWATER_ASRC1_IN2R_ENA 0x0004 /* ASRC2R_ENA */ +#define CLEARWATER_ASRC1_IN2R_ENA_MASK 0x0004 /* ASRC2R_ENA */ +#define CLEARWATER_ASRC1_IN2R_ENA_SHIFT 2 /* ASRC2R_ENA */ +#define CLEARWATER_ASRC1_IN2R_ENA_WIDTH 1 /* ASRC2R_ENA */ +#define CLEARWATER_ASRC1_IN1L_ENA 0x0002 /* ASRC1L_ENA */ +#define CLEARWATER_ASRC1_IN1L_ENA_MASK 0x0002 /* ASRC1L_ENA */ +#define CLEARWATER_ASRC1_IN1L_ENA_SHIFT 1 /* ASRC1L_ENA */ +#define CLEARWATER_ASRC1_IN1L_ENA_WIDTH 1 /* ASRC1L_ENA */ +#define CLEARWATER_ASRC1_IN1R_ENA 0x0001 /* ASRC1R_ENA */ +#define CLEARWATER_ASRC1_IN1R_ENA_MASK 0x0001 /* ASRC1R_ENA */ +#define CLEARWATER_ASRC1_IN1R_ENA_SHIFT 0 /* ASRC1R_ENA */ +#define CLEARWATER_ASRC1_IN1R_ENA_WIDTH 1 /* ASRC1R_ENA */ /* * R3810 (0xEE2) - ASRC1_RATE1 */ -#define WM8285_ASRC1_RATE1_MASK 0x7800 /* ASRC_RATE1 - [14:11] */ -#define WM8285_ASRC1_RATE1_SHIFT 11 /* ASRC_RATE1 - [14:11] */ -#define WM8285_ASRC1_RATE1_WIDTH 4 /* ASRC_RATE1 - [14:11] */ +#define CLEARWATER_ASRC1_RATE1_MASK 0x7800 /* ASRC_RATE1 - [14:11] */ +#define CLEARWATER_ASRC1_RATE1_SHIFT 11 /* ASRC_RATE1 - [14:11] */ +#define CLEARWATER_ASRC1_RATE1_WIDTH 4 /* ASRC_RATE1 - [14:11] */ /* * R3811 (0xEE3) - ASRC1_RATE2 */ -#define WM8285_ASRC1_RATE2_MASK 0x7800 /* ASRC_RATE2 - [14:11] */ -#define WM8285_ASRC1_RATE2_SHIFT 11 /* ASRC_RATE2 - [14:11] */ -#define WM8285_ASRC1_RATE2_WIDTH 4 /* ASRC_RATE2 - [14:11] */ +#define CLEARWATER_ASRC1_RATE2_MASK 0x7800 /* ASRC_RATE2 - [14:11] */ +#define CLEARWATER_ASRC1_RATE2_SHIFT 11 /* ASRC_RATE2 - [14:11] */ +#define CLEARWATER_ASRC1_RATE2_WIDTH 4 /* ASRC_RATE2 - [14:11] */ /* * R3808 (0xEE0) - ASRC_ENABLE @@ -10031,2174 +10031,2174 @@ /* * R1718 (0x1380) - FRF_Coefficient_1L_1 */ -#define WM8285_FRF_COEFF_1L_1_MASK 0xFFFF /* FRF_COEFF_1L_1 - [15:0] */ -#define WM8285_FRF_COEFF_1L_1_SHIFT 0 /* FRF_COEFF_1L_1 - [15:0] */ -#define WM8285_FRF_COEFF_1L_1_WIDTH 16 /* FRF_COEFF_1L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_1_MASK 0xFFFF /* FRF_COEFF_1L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_1_SHIFT 0 /* FRF_COEFF_1L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_1_WIDTH 16 /* FRF_COEFF_1L_1 - [15:0] */ /* * R1719 (0x1381) - FRF_Coefficient_1L_2 */ -#define WM8285_FRF_COEFF_1L_2_MASK 0xFFFF /* FRF_COEFF_1L_2 - [15:0] */ -#define WM8285_FRF_COEFF_1L_2_SHIFT 0 /* FRF_COEFF_1L_2 - [15:0] */ -#define WM8285_FRF_COEFF_1L_2_WIDTH 16 /* FRF_COEFF_1L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_2_MASK 0xFFFF /* FRF_COEFF_1L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_2_SHIFT 0 /* FRF_COEFF_1L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_2_WIDTH 16 /* FRF_COEFF_1L_2 - [15:0] */ /* * R1720 (0x1382) - FRF_Coefficient_1L_3 */ -#define WM8285_FRF_COEFF_1L_3_MASK 0xFFFF /* FRF_COEFF_1L_3 - [15:0] */ -#define WM8285_FRF_COEFF_1L_3_SHIFT 0 /* FRF_COEFF_1L_3 - [15:0] */ -#define WM8285_FRF_COEFF_1L_3_WIDTH 16 /* FRF_COEFF_1L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_3_MASK 0xFFFF /* FRF_COEFF_1L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_3_SHIFT 0 /* FRF_COEFF_1L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_3_WIDTH 16 /* FRF_COEFF_1L_3 - [15:0] */ /* * R1721 (0x1383) - FRF_Coefficient_1L_4 */ -#define WM8285_FRF_COEFF_1L_4_MASK 0xFFFF /* FRF_COEFF_1L_4 - [15:0] */ -#define WM8285_FRF_COEFF_1L_4_SHIFT 0 /* FRF_COEFF_1L_4 - [15:0] */ -#define WM8285_FRF_COEFF_1L_4_WIDTH 16 /* FRF_COEFF_1L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_4_MASK 0xFFFF /* FRF_COEFF_1L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_4_SHIFT 0 /* FRF_COEFF_1L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_4_WIDTH 16 /* FRF_COEFF_1L_4 - [15:0] */ /* * R1722 (0x1390) - FRF_Coefficient_1R_1 */ -#define WM8285_FRF_COEFF_1R_1_MASK 0xFFFF /* FRF_COEFF_1R_1 - [15:0] */ -#define WM8285_FRF_COEFF_1R_1_SHIFT 0 /* FRF_COEFF_1R_1 - [15:0] */ -#define WM8285_FRF_COEFF_1R_1_WIDTH 16 /* FRF_COEFF_1R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_1_MASK 0xFFFF /* FRF_COEFF_1R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_1_SHIFT 0 /* FRF_COEFF_1R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_1_WIDTH 16 /* FRF_COEFF_1R_1 - [15:0] */ /* * R1723 (0x1391) - FRF_Coefficient_1R_2 */ -#define WM8285_FRF_COEFF_1R_2_MASK 0xFFFF /* FRF_COEFF_1R_2 - [15:0] */ -#define WM8285_FRF_COEFF_1R_2_SHIFT 0 /* FRF_COEFF_1R_2 - [15:0] */ -#define WM8285_FRF_COEFF_1R_2_WIDTH 16 /* FRF_COEFF_1R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_2_MASK 0xFFFF /* FRF_COEFF_1R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_2_SHIFT 0 /* FRF_COEFF_1R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_2_WIDTH 16 /* FRF_COEFF_1R_2 - [15:0] */ /* * R1724 (0x1392) - FRF_Coefficient_1R_3 */ -#define WM8285_FRF_COEFF_1R_3_MASK 0xFFFF /* FRF_COEFF_1R_3 - [15:0] */ -#define WM8285_FRF_COEFF_1R_3_SHIFT 0 /* FRF_COEFF_1R_3 - [15:0] */ -#define WM8285_FRF_COEFF_1R_3_WIDTH 16 /* FRF_COEFF_1R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_3_MASK 0xFFFF /* FRF_COEFF_1R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_3_SHIFT 0 /* FRF_COEFF_1R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_3_WIDTH 16 /* FRF_COEFF_1R_3 - [15:0] */ /* * R1725 (0x1393) - FRF_Coefficient_1R_4 */ -#define WM8285_FRF_COEFF_1R_4_MASK 0xFFFF /* FRF_COEFF_1R_4 - [15:0] */ -#define WM8285_FRF_COEFF_1R_4_SHIFT 0 /* FRF_COEFF_1R_4 - [15:0] */ -#define WM8285_FRF_COEFF_1R_4_WIDTH 16 /* FRF_COEFF_1R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_4_MASK 0xFFFF /* FRF_COEFF_1R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_4_SHIFT 0 /* FRF_COEFF_1R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_4_WIDTH 16 /* FRF_COEFF_1R_4 - [15:0] */ /* * R1726 (0x13A0) - FRF_Coefficient_2L_1 */ -#define WM8285_FRF_COEFF_2L_1_MASK 0xFFFF /* FRF_COEFF_2L_1 - [15:0] */ -#define WM8285_FRF_COEFF_2L_1_SHIFT 0 /* FRF_COEFF_2L_1 - [15:0] */ -#define WM8285_FRF_COEFF_2L_1_WIDTH 16 /* FRF_COEFF_2L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_1_MASK 0xFFFF /* FRF_COEFF_2L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_1_SHIFT 0 /* FRF_COEFF_2L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_1_WIDTH 16 /* FRF_COEFF_2L_1 - [15:0] */ /* * R1727 (0x13A1) - FRF_Coefficient_2L_2 */ -#define WM8285_FRF_COEFF_2L_2_MASK 0xFFFF /* FRF_COEFF_2L_2 - [15:0] */ -#define WM8285_FRF_COEFF_2L_2_SHIFT 0 /* FRF_COEFF_2L_2 - [15:0] */ -#define WM8285_FRF_COEFF_2L_2_WIDTH 16 /* FRF_COEFF_2L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_2_MASK 0xFFFF /* FRF_COEFF_2L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_2_SHIFT 0 /* FRF_COEFF_2L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_2_WIDTH 16 /* FRF_COEFF_2L_2 - [15:0] */ /* * R1728 (0x13A2) - FRF_Coefficient_2L_3 */ -#define WM8285_FRF_COEFF_2L_3_MASK 0xFFFF /* FRF_COEFF_2L_3 - [15:0] */ -#define WM8285_FRF_COEFF_2L_3_SHIFT 0 /* FRF_COEFF_2L_3 - [15:0] */ -#define WM8285_FRF_COEFF_2L_3_WIDTH 16 /* FRF_COEFF_2L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_3_MASK 0xFFFF /* FRF_COEFF_2L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_3_SHIFT 0 /* FRF_COEFF_2L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_3_WIDTH 16 /* FRF_COEFF_2L_3 - [15:0] */ /* * R1729 (0x13A3) - FRF_Coefficient_2L_4 */ -#define WM8285_FRF_COEFF_2L_4_MASK 0xFFFF /* FRF_COEFF_2L_4 - [15:0] */ -#define WM8285_FRF_COEFF_2L_4_SHIFT 0 /* FRF_COEFF_2L_4 - [15:0] */ -#define WM8285_FRF_COEFF_2L_4_WIDTH 16 /* FRF_COEFF_2L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_4_MASK 0xFFFF /* FRF_COEFF_2L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_4_SHIFT 0 /* FRF_COEFF_2L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_4_WIDTH 16 /* FRF_COEFF_2L_4 - [15:0] */ /* * R1730 (0x13B0) - FRF_Coefficient_2R_1 */ -#define WM8285_FRF_COEFF_2R_1_MASK 0xFFFF /* FRF_COEFF_2R_1 - [15:0] */ -#define WM8285_FRF_COEFF_2R_1_SHIFT 0 /* FRF_COEFF_2R_1 - [15:0] */ -#define WM8285_FRF_COEFF_2R_1_WIDTH 16 /* FRF_COEFF_2R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_1_MASK 0xFFFF /* FRF_COEFF_2R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_1_SHIFT 0 /* FRF_COEFF_2R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_1_WIDTH 16 /* FRF_COEFF_2R_1 - [15:0] */ /* * R1731 (0x13B1) - FRF_Coefficient_2R_2 */ -#define WM8285_FRF_COEFF_2R_2_MASK 0xFFFF /* FRF_COEFF_2R_2 - [15:0] */ -#define WM8285_FRF_COEFF_2R_2_SHIFT 0 /* FRF_COEFF_2R_2 - [15:0] */ -#define WM8285_FRF_COEFF_2R_2_WIDTH 16 /* FRF_COEFF_2R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_2_MASK 0xFFFF /* FRF_COEFF_2R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_2_SHIFT 0 /* FRF_COEFF_2R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_2_WIDTH 16 /* FRF_COEFF_2R_2 - [15:0] */ /* * R1732 (0x13B2) - FRF_Coefficient_2R_3 */ -#define WM8285_FRF_COEFF_2R_3_MASK 0xFFFF /* FRF_COEFF_2R_3 - [15:0] */ -#define WM8285_FRF_COEFF_2R_3_SHIFT 0 /* FRF_COEFF_2R_3 - [15:0] */ -#define WM8285_FRF_COEFF_2R_3_WIDTH 16 /* FRF_COEFF_2R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_3_MASK 0xFFFF /* FRF_COEFF_2R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_3_SHIFT 0 /* FRF_COEFF_2R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_3_WIDTH 16 /* FRF_COEFF_2R_3 - [15:0] */ /* * R1733 (0x13B3) - FRF_Coefficient_2R_4 */ -#define WM8285_FRF_COEFF_2R_4_MASK 0xFFFF /* FRF_COEFF_2R_4 - [15:0] */ -#define WM8285_FRF_COEFF_2R_4_SHIFT 0 /* FRF_COEFF_2R_4 - [15:0] */ -#define WM8285_FRF_COEFF_2R_4_WIDTH 16 /* FRF_COEFF_2R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_4_MASK 0xFFFF /* FRF_COEFF_2R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_4_SHIFT 0 /* FRF_COEFF_2R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_4_WIDTH 16 /* FRF_COEFF_2R_4 - [15:0] */ /* * R1734 (0x13C0) - FRF_Coefficient_3L_1 */ -#define WM8285_FRF_COEFF_3L_1_MASK 0xFFFF /* FRF_COEFF_3L_1 - [15:0] */ -#define WM8285_FRF_COEFF_3L_1_SHIFT 0 /* FRF_COEFF_3L_1 - [15:0] */ -#define WM8285_FRF_COEFF_3L_1_WIDTH 16 /* FRF_COEFF_3L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_1_MASK 0xFFFF /* FRF_COEFF_3L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_1_SHIFT 0 /* FRF_COEFF_3L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_1_WIDTH 16 /* FRF_COEFF_3L_1 - [15:0] */ /* * R1735 (0x13C1) - FRF_Coefficient_3L_2 */ -#define WM8285_FRF_COEFF_3L_2_MASK 0xFFFF /* FRF_COEFF_3L_2 - [15:0] */ -#define WM8285_FRF_COEFF_3L_2_SHIFT 0 /* FRF_COEFF_3L_2 - [15:0] */ -#define WM8285_FRF_COEFF_3L_2_WIDTH 16 /* FRF_COEFF_3L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_2_MASK 0xFFFF /* FRF_COEFF_3L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_2_SHIFT 0 /* FRF_COEFF_3L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_2_WIDTH 16 /* FRF_COEFF_3L_2 - [15:0] */ /* * R1736 (0x13C2) - FRF_Coefficient_3L_3 */ -#define WM8285_FRF_COEFF_3L_3_MASK 0xFFFF /* FRF_COEFF_3L_3 - [15:0] */ -#define WM8285_FRF_COEFF_3L_3_SHIFT 0 /* FRF_COEFF_3L_3 - [15:0] */ -#define WM8285_FRF_COEFF_3L_3_WIDTH 16 /* FRF_COEFF_3L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_3_MASK 0xFFFF /* FRF_COEFF_3L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_3_SHIFT 0 /* FRF_COEFF_3L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_3_WIDTH 16 /* FRF_COEFF_3L_3 - [15:0] */ /* * R1737 (0x13C3) - FRF_Coefficient_3L_4 */ -#define WM8285_FRF_COEFF_3L_4_MASK 0xFFFF /* FRF_COEFF_3L_4 - [15:0] */ -#define WM8285_FRF_COEFF_3L_4_SHIFT 0 /* FRF_COEFF_3L_4 - [15:0] */ -#define WM8285_FRF_COEFF_3L_4_WIDTH 16 /* FRF_COEFF_3L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_4_MASK 0xFFFF /* FRF_COEFF_3L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_4_SHIFT 0 /* FRF_COEFF_3L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_4_WIDTH 16 /* FRF_COEFF_3L_4 - [15:0] */ /* * R1738 (0x13D0) - FRF_Coefficient_3R_1 */ -#define WM8285_FRF_COEFF_3R_1_MASK 0xFFFF /* FRF_COEFF_3R_1 - [15:0] */ -#define WM8285_FRF_COEFF_3R_1_SHIFT 0 /* FRF_COEFF_3R_1 - [15:0] */ -#define WM8285_FRF_COEFF_3R_1_WIDTH 16 /* FRF_COEFF_3R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_1_MASK 0xFFFF /* FRF_COEFF_3R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_1_SHIFT 0 /* FRF_COEFF_3R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_1_WIDTH 16 /* FRF_COEFF_3R_1 - [15:0] */ /* * R1739 (0x13D1) - FRF_Coefficient_3R_2 */ -#define WM8285_FRF_COEFF_3R_2_MASK 0xFFFF /* FRF_COEFF_3R_2 - [15:0] */ -#define WM8285_FRF_COEFF_3R_2_SHIFT 0 /* FRF_COEFF_3R_2 - [15:0] */ -#define WM8285_FRF_COEFF_3R_2_WIDTH 16 /* FRF_COEFF_3R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_2_MASK 0xFFFF /* FRF_COEFF_3R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_2_SHIFT 0 /* FRF_COEFF_3R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_2_WIDTH 16 /* FRF_COEFF_3R_2 - [15:0] */ /* * R1740 (0x13D2) - FRF_Coefficient_3R_3 */ -#define WM8285_FRF_COEFF_3R_3_MASK 0xFFFF /* FRF_COEFF_3R_3 - [15:0] */ -#define WM8285_FRF_COEFF_3R_3_SHIFT 0 /* FRF_COEFF_3R_3 - [15:0] */ -#define WM8285_FRF_COEFF_3R_3_WIDTH 16 /* FRF_COEFF_3R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_3_MASK 0xFFFF /* FRF_COEFF_3R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_3_SHIFT 0 /* FRF_COEFF_3R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_3_WIDTH 16 /* FRF_COEFF_3R_3 - [15:0] */ /* * R1741 (0x13D3) - FRF_Coefficient_3R_4 */ -#define WM8285_FRF_COEFF_3R_4_MASK 0xFFFF /* FRF_COEFF_3R_4 - [15:0] */ -#define WM8285_FRF_COEFF_3R_4_SHIFT 0 /* FRF_COEFF_3R_4 - [15:0] */ -#define WM8285_FRF_COEFF_3R_4_WIDTH 16 /* FRF_COEFF_3R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_4_MASK 0xFFFF /* FRF_COEFF_3R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_4_SHIFT 0 /* FRF_COEFF_3R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_4_WIDTH 16 /* FRF_COEFF_3R_4 - [15:0] */ /* * R1742 (0x13E0) - FRF_Coefficient_4L_1 */ -#define WM8285_FRF_COEFF_4L_1_MASK 0xFFFF /* FRF_COEFF_4L_1 - [15:0] */ -#define WM8285_FRF_COEFF_4L_1_SHIFT 0 /* FRF_COEFF_4L_1 - [15:0] */ -#define WM8285_FRF_COEFF_4L_1_WIDTH 16 /* FRF_COEFF_4L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_1_MASK 0xFFFF /* FRF_COEFF_4L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_1_SHIFT 0 /* FRF_COEFF_4L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_1_WIDTH 16 /* FRF_COEFF_4L_1 - [15:0] */ /* * R1743 (0x13E1) - FRF_Coefficient_4L_2 */ -#define WM8285_FRF_COEFF_4L_2_MASK 0xFFFF /* FRF_COEFF_4L_2 - [15:0] */ -#define WM8285_FRF_COEFF_4L_2_SHIFT 0 /* FRF_COEFF_4L_2 - [15:0] */ -#define WM8285_FRF_COEFF_4L_2_WIDTH 16 /* FRF_COEFF_4L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_2_MASK 0xFFFF /* FRF_COEFF_4L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_2_SHIFT 0 /* FRF_COEFF_4L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_2_WIDTH 16 /* FRF_COEFF_4L_2 - [15:0] */ /* * R1744 (0x13E2) - FRF_Coefficient_4L_3 */ -#define WM8285_FRF_COEFF_4L_3_MASK 0xFFFF /* FRF_COEFF_4L_3 - [15:0] */ -#define WM8285_FRF_COEFF_4L_3_SHIFT 0 /* FRF_COEFF_4L_3 - [15:0] */ -#define WM8285_FRF_COEFF_4L_3_WIDTH 16 /* FRF_COEFF_4L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_3_MASK 0xFFFF /* FRF_COEFF_4L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_3_SHIFT 0 /* FRF_COEFF_4L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_3_WIDTH 16 /* FRF_COEFF_4L_3 - [15:0] */ /* * R1745 (0x13E3) - FRF_Coefficient_4L_4 */ -#define WM8285_FRF_COEFF_4L_4_MASK 0xFFFF /* FRF_COEFF_4L_4 - [15:0] */ -#define WM8285_FRF_COEFF_4L_4_SHIFT 0 /* FRF_COEFF_4L_4 - [15:0] */ -#define WM8285_FRF_COEFF_4L_4_WIDTH 16 /* FRF_COEFF_4L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_4_MASK 0xFFFF /* FRF_COEFF_4L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_4_SHIFT 0 /* FRF_COEFF_4L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_4_WIDTH 16 /* FRF_COEFF_4L_4 - [15:0] */ /* * R1746 (0x13F0) - FRF_Coefficient_4R_1 */ -#define WM8285_FRF_COEFF_4R_1_MASK 0xFFFF /* FRF_COEFF_4R_1 - [15:0] */ -#define WM8285_FRF_COEFF_4R_1_SHIFT 0 /* FRF_COEFF_4R_1 - [15:0] */ -#define WM8285_FRF_COEFF_4R_1_WIDTH 16 /* FRF_COEFF_4R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_1_MASK 0xFFFF /* FRF_COEFF_4R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_1_SHIFT 0 /* FRF_COEFF_4R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_1_WIDTH 16 /* FRF_COEFF_4R_1 - [15:0] */ /* * R1747 (0x13F1) - FRF_Coefficient_4R_2 */ -#define WM8285_FRF_COEFF_4R_2_MASK 0xFFFF /* FRF_COEFF_4R_2 - [15:0] */ -#define WM8285_FRF_COEFF_4R_2_SHIFT 0 /* FRF_COEFF_4R_2 - [15:0] */ -#define WM8285_FRF_COEFF_4R_2_WIDTH 16 /* FRF_COEFF_4R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_2_MASK 0xFFFF /* FRF_COEFF_4R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_2_SHIFT 0 /* FRF_COEFF_4R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_2_WIDTH 16 /* FRF_COEFF_4R_2 - [15:0] */ /* * R1748 (0x13F2) - FRF_Coefficient_4R_3 */ -#define WM8285_FRF_COEFF_4R_3_MASK 0xFFFF /* FRF_COEFF_4R_3 - [15:0] */ -#define WM8285_FRF_COEFF_4R_3_SHIFT 0 /* FRF_COEFF_4R_3 - [15:0] */ -#define WM8285_FRF_COEFF_4R_3_WIDTH 16 /* FRF_COEFF_4R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_3_MASK 0xFFFF /* FRF_COEFF_4R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_3_SHIFT 0 /* FRF_COEFF_4R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_3_WIDTH 16 /* FRF_COEFF_4R_3 - [15:0] */ /* * R1749 (0x13F3) - FRF_Coefficient_4R_4 */ -#define WM8285_FRF_COEFF_4R_4_MASK 0xFFFF /* FRF_COEFF_4R_4 - [15:0] */ -#define WM8285_FRF_COEFF_4R_4_SHIFT 0 /* FRF_COEFF_4R_4 - [15:0] */ -#define WM8285_FRF_COEFF_4R_4_WIDTH 16 /* FRF_COEFF_4R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_4_MASK 0xFFFF /* FRF_COEFF_4R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_4_SHIFT 0 /* FRF_COEFF_4R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_4_WIDTH 16 /* FRF_COEFF_4R_4 - [15:0] */ /* * R1750 (0x1400) - FRF_Coefficient_5L_1 */ -#define WM8285_FRF_COEFF_5L_1_MASK 0xFFFF /* FRF_COEFF_5L_1 - [15:0] */ -#define WM8285_FRF_COEFF_5L_1_SHIFT 0 /* FRF_COEFF_5L_1 - [15:0] */ -#define WM8285_FRF_COEFF_5L_1_WIDTH 16 /* FRF_COEFF_5L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_1_MASK 0xFFFF /* FRF_COEFF_5L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_1_SHIFT 0 /* FRF_COEFF_5L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_1_WIDTH 16 /* FRF_COEFF_5L_1 - [15:0] */ /* * R1751 (0x1401) - FRF_Coefficient_5L_2 */ -#define WM8285_FRF_COEFF_5L_2_MASK 0xFFFF /* FRF_COEFF_5L_2 - [15:0] */ -#define WM8285_FRF_COEFF_5L_2_SHIFT 0 /* FRF_COEFF_5L_2 - [15:0] */ -#define WM8285_FRF_COEFF_5L_2_WIDTH 16 /* FRF_COEFF_5L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_2_MASK 0xFFFF /* FRF_COEFF_5L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_2_SHIFT 0 /* FRF_COEFF_5L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_2_WIDTH 16 /* FRF_COEFF_5L_2 - [15:0] */ /* * R1752 (0x1402) - FRF_Coefficient_5L_3 */ -#define WM8285_FRF_COEFF_5L_3_MASK 0xFFFF /* FRF_COEFF_5L_3 - [15:0] */ -#define WM8285_FRF_COEFF_5L_3_SHIFT 0 /* FRF_COEFF_5L_3 - [15:0] */ -#define WM8285_FRF_COEFF_5L_3_WIDTH 16 /* FRF_COEFF_5L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_3_MASK 0xFFFF /* FRF_COEFF_5L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_3_SHIFT 0 /* FRF_COEFF_5L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_3_WIDTH 16 /* FRF_COEFF_5L_3 - [15:0] */ /* * R1753 (0x1403) - FRF_Coefficient_5L_4 */ -#define WM8285_FRF_COEFF_5L_4_MASK 0xFFFF /* FRF_COEFF_5L_4 - [15:0] */ -#define WM8285_FRF_COEFF_5L_4_SHIFT 0 /* FRF_COEFF_5L_4 - [15:0] */ -#define WM8285_FRF_COEFF_5L_4_WIDTH 16 /* FRF_COEFF_5L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_4_MASK 0xFFFF /* FRF_COEFF_5L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_4_SHIFT 0 /* FRF_COEFF_5L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_4_WIDTH 16 /* FRF_COEFF_5L_4 - [15:0] */ /* * R1754 (0x1410) - FRF_Coefficient_5R_1 */ -#define WM8285_FRF_COEFF_5R_1_MASK 0xFFFF /* FRF_COEFF_5R_1 - [15:0] */ -#define WM8285_FRF_COEFF_5R_1_SHIFT 0 /* FRF_COEFF_5R_1 - [15:0] */ -#define WM8285_FRF_COEFF_5R_1_WIDTH 16 /* FRF_COEFF_5R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_1_MASK 0xFFFF /* FRF_COEFF_5R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_1_SHIFT 0 /* FRF_COEFF_5R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_1_WIDTH 16 /* FRF_COEFF_5R_1 - [15:0] */ /* * R1755 (0x1411) - FRF_Coefficient_5R_2 */ -#define WM8285_FRF_COEFF_5R_2_MASK 0xFFFF /* FRF_COEFF_5R_2 - [15:0] */ -#define WM8285_FRF_COEFF_5R_2_SHIFT 0 /* FRF_COEFF_5R_2 - [15:0] */ -#define WM8285_FRF_COEFF_5R_2_WIDTH 16 /* FRF_COEFF_5R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_2_MASK 0xFFFF /* FRF_COEFF_5R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_2_SHIFT 0 /* FRF_COEFF_5R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_2_WIDTH 16 /* FRF_COEFF_5R_2 - [15:0] */ /* * R1756 (0x1412) - FRF_Coefficient_5R_3 */ -#define WM8285_FRF_COEFF_5R_3_MASK 0xFFFF /* FRF_COEFF_5R_3 - [15:0] */ -#define WM8285_FRF_COEFF_5R_3_SHIFT 0 /* FRF_COEFF_5R_3 - [15:0] */ -#define WM8285_FRF_COEFF_5R_3_WIDTH 16 /* FRF_COEFF_5R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_3_MASK 0xFFFF /* FRF_COEFF_5R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_3_SHIFT 0 /* FRF_COEFF_5R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_3_WIDTH 16 /* FRF_COEFF_5R_3 - [15:0] */ /* * R1757 (0x1413) - FRF_Coefficient_5R_4 */ -#define WM8285_FRF_COEFF_5R_4_MASK 0xFFFF /* FRF_COEFF_5R_4 - [15:0] */ -#define WM8285_FRF_COEFF_5R_4_SHIFT 0 /* FRF_COEFF_5R_4 - [15:0] */ -#define WM8285_FRF_COEFF_5R_4_WIDTH 16 /* FRF_COEFF_5R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_4_MASK 0xFFFF /* FRF_COEFF_5R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_4_SHIFT 0 /* FRF_COEFF_5R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_4_WIDTH 16 /* FRF_COEFF_5R_4 - [15:0] */ /* * R1758 (0x1420) - FRF_Coefficient_6L_1 */ -#define WM8285_FRF_COEFF_6L_1_MASK 0xFFFF /* FRF_COEFF_6L_1 - [15:0] */ -#define WM8285_FRF_COEFF_6L_1_SHIFT 0 /* FRF_COEFF_6L_1 - [15:0] */ -#define WM8285_FRF_COEFF_6L_1_WIDTH 16 /* FRF_COEFF_6L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_1_MASK 0xFFFF /* FRF_COEFF_6L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_1_SHIFT 0 /* FRF_COEFF_6L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_1_WIDTH 16 /* FRF_COEFF_6L_1 - [15:0] */ /* * R1759 (0x1421) - FRF_Coefficient_6L_2 */ -#define WM8285_FRF_COEFF_6L_2_MASK 0xFFFF /* FRF_COEFF_6L_2 - [15:0] */ -#define WM8285_FRF_COEFF_6L_2_SHIFT 0 /* FRF_COEFF_6L_2 - [15:0] */ -#define WM8285_FRF_COEFF_6L_2_WIDTH 16 /* FRF_COEFF_6L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_2_MASK 0xFFFF /* FRF_COEFF_6L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_2_SHIFT 0 /* FRF_COEFF_6L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_2_WIDTH 16 /* FRF_COEFF_6L_2 - [15:0] */ /* * R1760 (0x1422) - FRF_Coefficient_6L_3 */ -#define WM8285_FRF_COEFF_6L_3_MASK 0xFFFF /* FRF_COEFF_6L_3 - [15:0] */ -#define WM8285_FRF_COEFF_6L_3_SHIFT 0 /* FRF_COEFF_6L_3 - [15:0] */ -#define WM8285_FRF_COEFF_6L_3_WIDTH 16 /* FRF_COEFF_6L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_3_MASK 0xFFFF /* FRF_COEFF_6L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_3_SHIFT 0 /* FRF_COEFF_6L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_3_WIDTH 16 /* FRF_COEFF_6L_3 - [15:0] */ /* * R1761 (0x1423) - FRF_Coefficient_6L_4 */ -#define WM8285_FRF_COEFF_6L_4_MASK 0xFFFF /* FRF_COEFF_6L_4 - [15:0] */ -#define WM8285_FRF_COEFF_6L_4_SHIFT 0 /* FRF_COEFF_6L_4 - [15:0] */ -#define WM8285_FRF_COEFF_6L_4_WIDTH 16 /* FRF_COEFF_6L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_4_MASK 0xFFFF /* FRF_COEFF_6L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_4_SHIFT 0 /* FRF_COEFF_6L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_4_WIDTH 16 /* FRF_COEFF_6L_4 - [15:0] */ /* * R1762 (0x1430) - FRF_Coefficient_6R_1 */ -#define WM8285_FRF_COEFF_6R_1_MASK 0xFFFF /* FRF_COEFF_6R_1 - [15:0] */ -#define WM8285_FRF_COEFF_6R_1_SHIFT 0 /* FRF_COEFF_6R_1 - [15:0] */ -#define WM8285_FRF_COEFF_6R_1_WIDTH 16 /* FRF_COEFF_6R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_1_MASK 0xFFFF /* FRF_COEFF_6R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_1_SHIFT 0 /* FRF_COEFF_6R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_1_WIDTH 16 /* FRF_COEFF_6R_1 - [15:0] */ /* * R1763 (0x1431) - FRF_Coefficient_6R_2 */ -#define WM8285_FRF_COEFF_6R_2_MASK 0xFFFF /* FRF_COEFF_6R_2 - [15:0] */ -#define WM8285_FRF_COEFF_6R_2_SHIFT 0 /* FRF_COEFF_6R_2 - [15:0] */ -#define WM8285_FRF_COEFF_6R_2_WIDTH 16 /* FRF_COEFF_6R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_2_MASK 0xFFFF /* FRF_COEFF_6R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_2_SHIFT 0 /* FRF_COEFF_6R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_2_WIDTH 16 /* FRF_COEFF_6R_2 - [15:0] */ /* * R1764 (0x1432) - FRF_Coefficient_6R_3 */ -#define WM8285_FRF_COEFF_6R_3_MASK 0xFFFF /* FRF_COEFF_6R_3 - [15:0] */ -#define WM8285_FRF_COEFF_6R_3_SHIFT 0 /* FRF_COEFF_6R_3 - [15:0] */ -#define WM8285_FRF_COEFF_6R_3_WIDTH 16 /* FRF_COEFF_6R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_3_MASK 0xFFFF /* FRF_COEFF_6R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_3_SHIFT 0 /* FRF_COEFF_6R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_3_WIDTH 16 /* FRF_COEFF_6R_3 - [15:0] */ /* * R1765 (0x1433) - FRF_Coefficient_6R_4 */ -#define WM8285_FRF_COEFF_6R_4_MASK 0xFFFF /* FRF_COEFF_6R_4 - [15:0] */ -#define WM8285_FRF_COEFF_6R_4_SHIFT 0 /* FRF_COEFF_6R_4 - [15:0] */ -#define WM8285_FRF_COEFF_6R_4_WIDTH 16 /* FRF_COEFF_6R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_4_MASK 0xFFFF /* FRF_COEFF_6R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_4_SHIFT 0 /* FRF_COEFF_6R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_4_WIDTH 16 /* FRF_COEFF_6R_4 - [15:0] */ /* * R6144 (0x1800) - IRQ1 Status 1 */ -#define WM8285_DSP_SHARED_WR_COLL_EINT1 0x8000 /* DSP_SHARED_WR_COLL_EINT1 */ -#define WM8285_DSP_SHARED_WR_COLL_EINT1_MASK 0x8000 /* DSP_SHARED_WR_COLL_EINT1 */ -#define WM8285_DSP_SHARED_WR_COLL_EINT1_SHIFT 15 /* DSP_SHARED_WR_COLL_EINT1 */ -#define WM8285_DSP_SHARED_WR_COLL_EINT1_WIDTH 1 /* DSP_SHARED_WR_COLL_EINT1 */ -#define WM8285_CTRLIF_ERR_EINT1 0x1000 /* CTRLIF_ERR_EINT1 */ -#define WM8285_CTRLIF_ERR_EINT1_MASK 0x1000 /* CTRLIF_ERR_EINT1 */ -#define WM8285_CTRLIF_ERR_EINT1_SHIFT 12 /* CTRLIF_ERR_EINT1 */ -#define WM8285_CTRLIF_ERR_EINT1_WIDTH 1 /* CTRLIF_ERR_EINT1 */ -#define WM8285_IRQ_NO_CLOCK_EINT1 0x0200 /* IRQ_NO_CLOCK_EINT1 */ -#define WM8285_IRQ_NO_CLOCK_EINT1_MASK 0x0200 /* IRQ_NO_CLOCK_EINT1 */ -#define WM8285_IRQ_NO_CLOCK_EINT1_SHIFT 9 /* IRQ_NO_CLOCK_EINT1 */ -#define WM8285_IRQ_NO_CLOCK_EINT1_WIDTH 1 /* IRQ_NO_CLOCK_EINT1 */ -#define WM8285_CLOCK_DETECT_EINT1 0x0100 /* CLOCK_DETECT_EINT1 */ -#define WM8285_CLOCK_DETECT_EINT1_MASK 0x0100 /* CLOCK_DETECT_EINT1 */ -#define WM8285_CLOCK_DETECT_EINT1_SHIFT 8 /* CLOCK_DETECT_EINT1 */ -#define WM8285_CLOCK_DETECT_EINT1_WIDTH 1 /* CLOCK_DETECT_EINT1 */ -#define WM8285_BOOT_DONE_EINT1 0x0080 /* BOOT_DONE_EINT1 */ -#define WM8285_BOOT_DONE_EINT1_MASK 0x0080 /* BOOT_DONE_EINT1 */ -#define WM8285_BOOT_DONE_EINT1_SHIFT 7 /* BOOT_DONE_EINT1 */ -#define WM8285_BOOT_DONE_EINT1_WIDTH 1 /* BOOT_DONE_EINT1 */ +#define CLEARWATER_DSP_SHARED_WR_COLL_EINT1 0x8000 /* DSP_SHARED_WR_COLL_EINT1 */ +#define CLEARWATER_DSP_SHARED_WR_COLL_EINT1_MASK 0x8000 /* DSP_SHARED_WR_COLL_EINT1 */ +#define CLEARWATER_DSP_SHARED_WR_COLL_EINT1_SHIFT 15 /* DSP_SHARED_WR_COLL_EINT1 */ +#define CLEARWATER_DSP_SHARED_WR_COLL_EINT1_WIDTH 1 /* DSP_SHARED_WR_COLL_EINT1 */ +#define CLEARWATER_CTRLIF_ERR_EINT1 0x1000 /* CTRLIF_ERR_EINT1 */ +#define CLEARWATER_CTRLIF_ERR_EINT1_MASK 0x1000 /* CTRLIF_ERR_EINT1 */ +#define CLEARWATER_CTRLIF_ERR_EINT1_SHIFT 12 /* CTRLIF_ERR_EINT1 */ +#define CLEARWATER_CTRLIF_ERR_EINT1_WIDTH 1 /* CTRLIF_ERR_EINT1 */ +#define CLEARWATER_IRQ_NO_CLOCK_EINT1 0x0200 /* IRQ_NO_CLOCK_EINT1 */ +#define CLEARWATER_IRQ_NO_CLOCK_EINT1_MASK 0x0200 /* IRQ_NO_CLOCK_EINT1 */ +#define CLEARWATER_IRQ_NO_CLOCK_EINT1_SHIFT 9 /* IRQ_NO_CLOCK_EINT1 */ +#define CLEARWATER_IRQ_NO_CLOCK_EINT1_WIDTH 1 /* IRQ_NO_CLOCK_EINT1 */ +#define CLEARWATER_CLOCK_DETECT_EINT1 0x0100 /* CLOCK_DETECT_EINT1 */ +#define CLEARWATER_CLOCK_DETECT_EINT1_MASK 0x0100 /* CLOCK_DETECT_EINT1 */ +#define CLEARWATER_CLOCK_DETECT_EINT1_SHIFT 8 /* CLOCK_DETECT_EINT1 */ +#define CLEARWATER_CLOCK_DETECT_EINT1_WIDTH 1 /* CLOCK_DETECT_EINT1 */ +#define CLEARWATER_BOOT_DONE_EINT1 0x0080 /* BOOT_DONE_EINT1 */ +#define CLEARWATER_BOOT_DONE_EINT1_MASK 0x0080 /* BOOT_DONE_EINT1 */ +#define CLEARWATER_BOOT_DONE_EINT1_SHIFT 7 /* BOOT_DONE_EINT1 */ +#define CLEARWATER_BOOT_DONE_EINT1_WIDTH 1 /* BOOT_DONE_EINT1 */ /* * R6145 (0x1801) - IRQ1 Status 2 */ -#define WM8285_FLL3_LOCK_EINT1 0x0400 /* FLL3_LOCK_EINT1 */ -#define WM8285_FLL3_LOCK_EINT1_MASK 0x0400 /* FLL3_LOCK_EINT1 */ -#define WM8285_FLL3_LOCK_EINT1_SHIFT 10 /* FLL3_LOCK_EINT1 */ -#define WM8285_FLL3_LOCK_EINT1_WIDTH 1 /* FLL3_LOCK_EINT1 */ -#define WM8285_FLL2_LOCK_EINT1 0x0200 /* FLL2_LOCK_EINT1 */ -#define WM8285_FLL2_LOCK_EINT1_MASK 0x0200 /* FLL2_LOCK_EINT1 */ -#define WM8285_FLL2_LOCK_EINT1_SHIFT 9 /* FLL2_LOCK_EINT1 */ -#define WM8285_FLL2_LOCK_EINT1_WIDTH 1 /* FLL2_LOCK_EINT1 */ -#define WM8285_FLL1_LOCK_EINT1 0x0100 /* FLL1_LOCK_EINT1 */ -#define WM8285_FLL1_LOCK_EINT1_MASK 0x0100 /* FLL1_LOCK_EINT1 */ -#define WM8285_FLL1_LOCK_EINT1_SHIFT 8 /* FLL1_LOCK_EINT1 */ -#define WM8285_FLL1_LOCK_EINT1_WIDTH 1 /* FLL1_LOCK_EINT1 */ +#define CLEARWATER_FLL3_LOCK_EINT1 0x0400 /* FLL3_LOCK_EINT1 */ +#define CLEARWATER_FLL3_LOCK_EINT1_MASK 0x0400 /* FLL3_LOCK_EINT1 */ +#define CLEARWATER_FLL3_LOCK_EINT1_SHIFT 10 /* FLL3_LOCK_EINT1 */ +#define CLEARWATER_FLL3_LOCK_EINT1_WIDTH 1 /* FLL3_LOCK_EINT1 */ +#define CLEARWATER_FLL2_LOCK_EINT1 0x0200 /* FLL2_LOCK_EINT1 */ +#define CLEARWATER_FLL2_LOCK_EINT1_MASK 0x0200 /* FLL2_LOCK_EINT1 */ +#define CLEARWATER_FLL2_LOCK_EINT1_SHIFT 9 /* FLL2_LOCK_EINT1 */ +#define CLEARWATER_FLL2_LOCK_EINT1_WIDTH 1 /* FLL2_LOCK_EINT1 */ +#define CLEARWATER_FLL1_LOCK_EINT1 0x0100 /* FLL1_LOCK_EINT1 */ +#define CLEARWATER_FLL1_LOCK_EINT1_MASK 0x0100 /* FLL1_LOCK_EINT1 */ +#define CLEARWATER_FLL1_LOCK_EINT1_SHIFT 8 /* FLL1_LOCK_EINT1 */ +#define CLEARWATER_FLL1_LOCK_EINT1_WIDTH 1 /* FLL1_LOCK_EINT1 */ /* * R6149 (0x1805) - IRQ1 Status 6 */ -#define WM8285_MICDET_EINT1 0x0100 /* MICDET_EINT1 */ -#define WM8285_MICDET_EINT1_MASK 0x0100 /* MICDET_EINT1 */ -#define WM8285_MICDET_EINT1_SHIFT 8 /* MICDET_EINT1 */ -#define WM8285_MICDET_EINT1_WIDTH 1 /* MICDET_EINT1 */ -#define WM8285_HPDET_EINT1 0x0001 /* HPDET_EINT1 */ -#define WM8285_HPDET_EINT1_MASK 0x0001 /* HPDET_EINT1 */ -#define WM8285_HPDET_EINT1_SHIFT 0 /* HPDET_EINT1 */ -#define WM8285_HPDET_EINT1_WIDTH 1 /* HPDET_EINT1 */ +#define CLEARWATER_MICDET_EINT1 0x0100 /* MICDET_EINT1 */ +#define CLEARWATER_MICDET_EINT1_MASK 0x0100 /* MICDET_EINT1 */ +#define CLEARWATER_MICDET_EINT1_SHIFT 8 /* MICDET_EINT1 */ +#define CLEARWATER_MICDET_EINT1_WIDTH 1 /* MICDET_EINT1 */ +#define CLEARWATER_HPDET_EINT1 0x0001 /* HPDET_EINT1 */ +#define CLEARWATER_HPDET_EINT1_MASK 0x0001 /* HPDET_EINT1 */ +#define CLEARWATER_HPDET_EINT1_SHIFT 0 /* HPDET_EINT1 */ +#define CLEARWATER_HPDET_EINT1_WIDTH 1 /* HPDET_EINT1 */ /* * R6150 (0x1806) - IRQ1 Status 7 */ -#define WM8285_MICD_CLAMP_FALL_EINT1 0x0020 /* MICD_CLAMP_FALL_EINT1 */ -#define WM8285_MICD_CLAMP_FALL_EINT1_MASK 0x0020 /* MICD_CLAMP_FALL_EINT1 */ -#define WM8285_MICD_CLAMP_FALL_EINT1_SHIFT 5 /* MICD_CLAMP_FALL_EINT1 */ -#define WM8285_MICD_CLAMP_FALL_EINT1_WIDTH 1 /* MICD_CLAMP_FALL_EINT1 */ -#define WM8285_MICD_CLAMP_RISE_EINT1 0x0010 /* MICD_CLAMP_RISE_EINT1 */ -#define WM8285_MICD_CLAMP_RISE_EINT1_MASK 0x0010 /* MICD_CLAMP_RISE_EINT1 */ -#define WM8285_MICD_CLAMP_RISE_EINT1_SHIFT 4 /* MICD_CLAMP_RISE_EINT1 */ -#define WM8285_MICD_CLAMP_RISE_EINT1_WIDTH 1 /* MICD_CLAMP_RISE_EINT1 */ -#define WM8285_JD2_FALL_EINT1 0x0008 /* JD2_FALL_EINT1 */ -#define WM8285_JD2_FALL_EINT1_MASK 0x0008 /* JD2_FALL_EINT1 */ -#define WM8285_JD2_FALL_EINT1_SHIFT 3 /* JD2_FALL_EINT1 */ -#define WM8285_JD2_FALL_EINT1_WIDTH 1 /* JD2_FALL_EINT1 */ -#define WM8285_JD2_RISE_EINT1 0x0004 /* JD2_RISE_EINT1 */ -#define WM8285_JD2_RISE_EINT1_MASK 0x0004 /* JD2_RISE_EINT1 */ -#define WM8285_JD2_RISE_EINT1_SHIFT 2 /* JD2_RISE_EINT1 */ -#define WM8285_JD2_RISE_EINT1_WIDTH 1 /* JD2_RISE_EINT1 */ -#define WM8285_JD1_FALL_EINT1 0x0002 /* JD1_FALL_EINT1 */ -#define WM8285_JD1_FALL_EINT1_MASK 0x0002 /* JD1_FALL_EINT1 */ -#define WM8285_JD1_FALL_EINT1_SHIFT 1 /* JD1_FALL_EINT1 */ -#define WM8285_JD1_FALL_EINT1_WIDTH 1 /* JD1_FALL_EINT1 */ -#define WM8285_JD1_RISE_EINT1 0x0001 /* JD1_RISE_EINT1 */ -#define WM8285_JD1_RISE_EINT1_MASK 0x0001 /* JD1_RISE_EINT1 */ -#define WM8285_JD1_RISE_EINT1_SHIFT 0 /* JD1_RISE_EINT1 */ -#define WM8285_JD1_RISE_EINT1_WIDTH 1 /* JD1_RISE_EINT1 */ +#define CLEARWATER_MICD_CLAMP_FALL_EINT1 0x0020 /* MICD_CLAMP_FALL_EINT1 */ +#define CLEARWATER_MICD_CLAMP_FALL_EINT1_MASK 0x0020 /* MICD_CLAMP_FALL_EINT1 */ +#define CLEARWATER_MICD_CLAMP_FALL_EINT1_SHIFT 5 /* MICD_CLAMP_FALL_EINT1 */ +#define CLEARWATER_MICD_CLAMP_FALL_EINT1_WIDTH 1 /* MICD_CLAMP_FALL_EINT1 */ +#define CLEARWATER_MICD_CLAMP_RISE_EINT1 0x0010 /* MICD_CLAMP_RISE_EINT1 */ +#define CLEARWATER_MICD_CLAMP_RISE_EINT1_MASK 0x0010 /* MICD_CLAMP_RISE_EINT1 */ +#define CLEARWATER_MICD_CLAMP_RISE_EINT1_SHIFT 4 /* MICD_CLAMP_RISE_EINT1 */ +#define CLEARWATER_MICD_CLAMP_RISE_EINT1_WIDTH 1 /* MICD_CLAMP_RISE_EINT1 */ +#define CLEARWATER_JD2_FALL_EINT1 0x0008 /* JD2_FALL_EINT1 */ +#define CLEARWATER_JD2_FALL_EINT1_MASK 0x0008 /* JD2_FALL_EINT1 */ +#define CLEARWATER_JD2_FALL_EINT1_SHIFT 3 /* JD2_FALL_EINT1 */ +#define CLEARWATER_JD2_FALL_EINT1_WIDTH 1 /* JD2_FALL_EINT1 */ +#define CLEARWATER_JD2_RISE_EINT1 0x0004 /* JD2_RISE_EINT1 */ +#define CLEARWATER_JD2_RISE_EINT1_MASK 0x0004 /* JD2_RISE_EINT1 */ +#define CLEARWATER_JD2_RISE_EINT1_SHIFT 2 /* JD2_RISE_EINT1 */ +#define CLEARWATER_JD2_RISE_EINT1_WIDTH 1 /* JD2_RISE_EINT1 */ +#define CLEARWATER_JD1_FALL_EINT1 0x0002 /* JD1_FALL_EINT1 */ +#define CLEARWATER_JD1_FALL_EINT1_MASK 0x0002 /* JD1_FALL_EINT1 */ +#define CLEARWATER_JD1_FALL_EINT1_SHIFT 1 /* JD1_FALL_EINT1 */ +#define CLEARWATER_JD1_FALL_EINT1_WIDTH 1 /* JD1_FALL_EINT1 */ +#define CLEARWATER_JD1_RISE_EINT1 0x0001 /* JD1_RISE_EINT1 */ +#define CLEARWATER_JD1_RISE_EINT1_MASK 0x0001 /* JD1_RISE_EINT1 */ +#define CLEARWATER_JD1_RISE_EINT1_SHIFT 0 /* JD1_RISE_EINT1 */ +#define CLEARWATER_JD1_RISE_EINT1_WIDTH 1 /* JD1_RISE_EINT1 */ /* * R6152 (0x1808) - IRQ1 Status 9 */ -#define WM8285_ASRC2_IN2_LOCK_EINT1 0x0800 /* ASRC2_IN2_LOCK_EINT1 */ -#define WM8285_ASRC2_IN2_LOCK_EINT1_MASK 0x0800 /* ASRC2_IN2_LOCK_EINT1 */ -#define WM8285_ASRC2_IN2_LOCK_EINT1_SHIFT 11 /* ASRC2_IN2_LOCK_EINT1 */ -#define WM8285_ASRC2_IN2_LOCK_EINT1_WIDTH 1 /* ASRC2_IN2_LOCK_EINT1 */ -#define WM8285_ASRC2_IN1_LOCK_EINT1 0x0400 /* ASRC2_IN1_LOCK_EINT1 */ -#define WM8285_ASRC2_IN1_LOCK_EINT1_MASK 0x0400 /* ASRC2_IN1_LOCK_EINT1 */ -#define WM8285_ASRC2_IN1_LOCK_EINT1_SHIFT 10 /* ASRC2_IN1_LOCK_EINT1 */ -#define WM8285_ASRC2_IN1_LOCK_EINT1_WIDTH 1 /* ASRC2_IN1_LOCK_EINT1 */ -#define WM8285_ASRC1_IN2_LOCK_EINT1 0x0200 /* ASRC1_IN2_LOCK_EINT1 */ -#define WM8285_ASRC1_IN2_LOCK_EINT1_MASK 0x0200 /* ASRC1_IN2_LOCK_EINT1 */ -#define WM8285_ASRC1_IN2_LOCK_EINT1_SHIFT 9 /* ASRC1_IN2_LOCK_EINT1 */ -#define WM8285_ASRC1_IN2_LOCK_EINT1_WIDTH 1 /* ASRC1_IN2_LOCK_EINT1 */ -#define WM8285_ASRC1_IN1_LOCK_EINT1 0x0100 /* ASRC1_IN1_LOCK_EINT1 */ -#define WM8285_ASRC1_IN1_LOCK_EINT1_MASK 0x0100 /* ASRC1_IN1_LOCK_EINT1 */ -#define WM8285_ASRC1_IN1_LOCK_EINT1_SHIFT 8 /* ASRC1_IN1_LOCK_EINT1 */ -#define WM8285_ASRC1_IN1_LOCK_EINT1_WIDTH 1 /* ASRC1_IN1_LOCK_EINT1 */ -#define WM8285_DRC2_SIG_DET_EINT1 0x0002 /* DRC2_SIG_DET_EINT1 */ -#define WM8285_DRC2_SIG_DET_EINT1_MASK 0x0002 /* DRC2_SIG_DET_EINT1 */ -#define WM8285_DRC2_SIG_DET_EINT1_SHIFT 1 /* DRC2_SIG_DET_EINT1 */ -#define WM8285_DRC2_SIG_DET_EINT1_WIDTH 1 /* DRC2_SIG_DET_EINT1 */ -#define WM8285_DRC1_SIG_DET_EINT1 0x0001 /* DRC1_SIG_DET_EINT1 */ -#define WM8285_DRC1_SIG_DET_EINT1_MASK 0x0001 /* DRC1_SIG_DET_EINT1 */ -#define WM8285_DRC1_SIG_DET_EINT1_SHIFT 0 /* DRC1_SIG_DET_EINT1 */ -#define WM8285_DRC1_SIG_DET_EINT1_WIDTH 1 /* DRC1_SIG_DET_EINT1 */ +#define CLEARWATER_ASRC2_IN2_LOCK_EINT1 0x0800 /* ASRC2_IN2_LOCK_EINT1 */ +#define CLEARWATER_ASRC2_IN2_LOCK_EINT1_MASK 0x0800 /* ASRC2_IN2_LOCK_EINT1 */ +#define CLEARWATER_ASRC2_IN2_LOCK_EINT1_SHIFT 11 /* ASRC2_IN2_LOCK_EINT1 */ +#define CLEARWATER_ASRC2_IN2_LOCK_EINT1_WIDTH 1 /* ASRC2_IN2_LOCK_EINT1 */ +#define CLEARWATER_ASRC2_IN1_LOCK_EINT1 0x0400 /* ASRC2_IN1_LOCK_EINT1 */ +#define CLEARWATER_ASRC2_IN1_LOCK_EINT1_MASK 0x0400 /* ASRC2_IN1_LOCK_EINT1 */ +#define CLEARWATER_ASRC2_IN1_LOCK_EINT1_SHIFT 10 /* ASRC2_IN1_LOCK_EINT1 */ +#define CLEARWATER_ASRC2_IN1_LOCK_EINT1_WIDTH 1 /* ASRC2_IN1_LOCK_EINT1 */ +#define CLEARWATER_ASRC1_IN2_LOCK_EINT1 0x0200 /* ASRC1_IN2_LOCK_EINT1 */ +#define CLEARWATER_ASRC1_IN2_LOCK_EINT1_MASK 0x0200 /* ASRC1_IN2_LOCK_EINT1 */ +#define CLEARWATER_ASRC1_IN2_LOCK_EINT1_SHIFT 9 /* ASRC1_IN2_LOCK_EINT1 */ +#define CLEARWATER_ASRC1_IN2_LOCK_EINT1_WIDTH 1 /* ASRC1_IN2_LOCK_EINT1 */ +#define CLEARWATER_ASRC1_IN1_LOCK_EINT1 0x0100 /* ASRC1_IN1_LOCK_EINT1 */ +#define CLEARWATER_ASRC1_IN1_LOCK_EINT1_MASK 0x0100 /* ASRC1_IN1_LOCK_EINT1 */ +#define CLEARWATER_ASRC1_IN1_LOCK_EINT1_SHIFT 8 /* ASRC1_IN1_LOCK_EINT1 */ +#define CLEARWATER_ASRC1_IN1_LOCK_EINT1_WIDTH 1 /* ASRC1_IN1_LOCK_EINT1 */ +#define CLEARWATER_DRC2_SIG_DET_EINT1 0x0002 /* DRC2_SIG_DET_EINT1 */ +#define CLEARWATER_DRC2_SIG_DET_EINT1_MASK 0x0002 /* DRC2_SIG_DET_EINT1 */ +#define CLEARWATER_DRC2_SIG_DET_EINT1_SHIFT 1 /* DRC2_SIG_DET_EINT1 */ +#define CLEARWATER_DRC2_SIG_DET_EINT1_WIDTH 1 /* DRC2_SIG_DET_EINT1 */ +#define CLEARWATER_DRC1_SIG_DET_EINT1 0x0001 /* DRC1_SIG_DET_EINT1 */ +#define CLEARWATER_DRC1_SIG_DET_EINT1_MASK 0x0001 /* DRC1_SIG_DET_EINT1 */ +#define CLEARWATER_DRC1_SIG_DET_EINT1_SHIFT 0 /* DRC1_SIG_DET_EINT1 */ +#define CLEARWATER_DRC1_SIG_DET_EINT1_WIDTH 1 /* DRC1_SIG_DET_EINT1 */ /* * R6154 (0x180A) - IRQ1 Status 11 */ -#define WM8285_DSP_IRQ16_EINT1 0x8000 /* DSP_IRQ16_EINT1 */ -#define WM8285_DSP_IRQ16_EINT1_MASK 0x8000 /* DSP_IRQ16_EINT1 */ -#define WM8285_DSP_IRQ16_EINT1_SHIFT 15 /* DSP_IRQ16_EINT1 */ -#define WM8285_DSP_IRQ16_EINT1_WIDTH 1 /* DSP_IRQ16_EINT1 */ -#define WM8285_DSP_IRQ15_EINT1 0x4000 /* DSP_IRQ15_EINT1 */ -#define WM8285_DSP_IRQ15_EINT1_MASK 0x4000 /* DSP_IRQ15_EINT1 */ -#define WM8285_DSP_IRQ15_EINT1_SHIFT 14 /* DSP_IRQ15_EINT1 */ -#define WM8285_DSP_IRQ15_EINT1_WIDTH 1 /* DSP_IRQ15_EINT1 */ -#define WM8285_DSP_IRQ14_EINT1 0x2000 /* DSP_IRQ14_EINT1 */ -#define WM8285_DSP_IRQ14_EINT1_MASK 0x2000 /* DSP_IRQ14_EINT1 */ -#define WM8285_DSP_IRQ14_EINT1_SHIFT 13 /* DSP_IRQ14_EINT1 */ -#define WM8285_DSP_IRQ14_EINT1_WIDTH 1 /* DSP_IRQ14_EINT1 */ -#define WM8285_DSP_IRQ13_EINT1 0x1000 /* DSP_IRQ13_EINT1 */ -#define WM8285_DSP_IRQ13_EINT1_MASK 0x1000 /* DSP_IRQ13_EINT1 */ -#define WM8285_DSP_IRQ13_EINT1_SHIFT 12 /* DSP_IRQ13_EINT1 */ -#define WM8285_DSP_IRQ13_EINT1_WIDTH 1 /* DSP_IRQ13_EINT1 */ -#define WM8285_DSP_IRQ12_EINT1 0x0800 /* DSP_IRQ12_EINT1 */ -#define WM8285_DSP_IRQ12_EINT1_MASK 0x0800 /* DSP_IRQ12_EINT1 */ -#define WM8285_DSP_IRQ12_EINT1_SHIFT 11 /* DSP_IRQ12_EINT1 */ -#define WM8285_DSP_IRQ12_EINT1_WIDTH 1 /* DSP_IRQ12_EINT1 */ -#define WM8285_DSP_IRQ11_EINT1 0x0400 /* DSP_IRQ11_EINT1 */ -#define WM8285_DSP_IRQ11_EINT1_MASK 0x0400 /* DSP_IRQ11_EINT1 */ -#define WM8285_DSP_IRQ11_EINT1_SHIFT 10 /* DSP_IRQ11_EINT1 */ -#define WM8285_DSP_IRQ11_EINT1_WIDTH 1 /* DSP_IRQ11_EINT1 */ -#define WM8285_DSP_IRQ10_EINT1 0x0200 /* DSP_IRQ10_EINT1 */ -#define WM8285_DSP_IRQ10_EINT1_MASK 0x0200 /* DSP_IRQ10_EINT1 */ -#define WM8285_DSP_IRQ10_EINT1_SHIFT 9 /* DSP_IRQ10_EINT1 */ -#define WM8285_DSP_IRQ10_EINT1_WIDTH 1 /* DSP_IRQ10_EINT1 */ -#define WM8285_DSP_IRQ9_EINT1 0x0100 /* DSP_IRQ9_EINT1 */ -#define WM8285_DSP_IRQ9_EINT1_MASK 0x0100 /* DSP_IRQ9_EINT1 */ -#define WM8285_DSP_IRQ9_EINT1_SHIFT 8 /* DSP_IRQ9_EINT1 */ -#define WM8285_DSP_IRQ9_EINT1_WIDTH 1 /* DSP_IRQ9_EINT1 */ -#define WM8285_DSP_IRQ8_EINT1 0x0080 /* DSP_IRQ8_EINT1 */ -#define WM8285_DSP_IRQ8_EINT1_MASK 0x0080 /* DSP_IRQ8_EINT1 */ -#define WM8285_DSP_IRQ8_EINT1_SHIFT 7 /* DSP_IRQ8_EINT1 */ -#define WM8285_DSP_IRQ8_EINT1_WIDTH 1 /* DSP_IRQ8_EINT1 */ -#define WM8285_DSP_IRQ7_EINT1 0x0040 /* DSP_IRQ7_EINT1 */ -#define WM8285_DSP_IRQ7_EINT1_MASK 0x0040 /* DSP_IRQ7_EINT1 */ -#define WM8285_DSP_IRQ7_EINT1_SHIFT 6 /* DSP_IRQ7_EINT1 */ -#define WM8285_DSP_IRQ7_EINT1_WIDTH 1 /* DSP_IRQ7_EINT1 */ -#define WM8285_DSP_IRQ6_EINT1 0x0020 /* DSP_IRQ6_EINT1 */ -#define WM8285_DSP_IRQ6_EINT1_MASK 0x0020 /* DSP_IRQ6_EINT1 */ -#define WM8285_DSP_IRQ6_EINT1_SHIFT 5 /* DSP_IRQ6_EINT1 */ -#define WM8285_DSP_IRQ6_EINT1_WIDTH 1 /* DSP_IRQ6_EINT1 */ -#define WM8285_DSP_IRQ5_EINT1 0x0010 /* DSP_IRQ5_EINT1 */ -#define WM8285_DSP_IRQ5_EINT1_MASK 0x0010 /* DSP_IRQ5_EINT1 */ -#define WM8285_DSP_IRQ5_EINT1_SHIFT 4 /* DSP_IRQ5_EINT1 */ -#define WM8285_DSP_IRQ5_EINT1_WIDTH 1 /* DSP_IRQ5_EINT1 */ -#define WM8285_DSP_IRQ4_EINT1 0x0008 /* DSP_IRQ4_EINT1 */ -#define WM8285_DSP_IRQ4_EINT1_MASK 0x0008 /* DSP_IRQ4_EINT1 */ -#define WM8285_DSP_IRQ4_EINT1_SHIFT 3 /* DSP_IRQ4_EINT1 */ -#define WM8285_DSP_IRQ4_EINT1_WIDTH 1 /* DSP_IRQ4_EINT1 */ -#define WM8285_DSP_IRQ3_EINT1 0x0004 /* DSP_IRQ3_EINT1 */ -#define WM8285_DSP_IRQ3_EINT1_MASK 0x0004 /* DSP_IRQ3_EINT1 */ -#define WM8285_DSP_IRQ3_EINT1_SHIFT 2 /* DSP_IRQ3_EINT1 */ -#define WM8285_DSP_IRQ3_EINT1_WIDTH 1 /* DSP_IRQ3_EINT1 */ -#define WM8285_DSP_IRQ2_EINT1 0x0002 /* DSP_IRQ2_EINT1 */ -#define WM8285_DSP_IRQ2_EINT1_MASK 0x0002 /* DSP_IRQ2_EINT1 */ -#define WM8285_DSP_IRQ2_EINT1_SHIFT 1 /* DSP_IRQ2_EINT1 */ -#define WM8285_DSP_IRQ2_EINT1_WIDTH 1 /* DSP_IRQ2_EINT1 */ -#define WM8285_DSP_IRQ1_EINT1 0x0001 /* DSP_IRQ1_EINT1 */ -#define WM8285_DSP_IRQ1_EINT1_MASK 0x0001 /* DSP_IRQ1_EINT1 */ -#define WM8285_DSP_IRQ1_EINT1_SHIFT 0 /* DSP_IRQ1_EINT1 */ -#define WM8285_DSP_IRQ1_EINT1_WIDTH 1 /* DSP_IRQ1_EINT1 */ +#define CLEARWATER_DSP_IRQ16_EINT1 0x8000 /* DSP_IRQ16_EINT1 */ +#define CLEARWATER_DSP_IRQ16_EINT1_MASK 0x8000 /* DSP_IRQ16_EINT1 */ +#define CLEARWATER_DSP_IRQ16_EINT1_SHIFT 15 /* DSP_IRQ16_EINT1 */ +#define CLEARWATER_DSP_IRQ16_EINT1_WIDTH 1 /* DSP_IRQ16_EINT1 */ +#define CLEARWATER_DSP_IRQ15_EINT1 0x4000 /* DSP_IRQ15_EINT1 */ +#define CLEARWATER_DSP_IRQ15_EINT1_MASK 0x4000 /* DSP_IRQ15_EINT1 */ +#define CLEARWATER_DSP_IRQ15_EINT1_SHIFT 14 /* DSP_IRQ15_EINT1 */ +#define CLEARWATER_DSP_IRQ15_EINT1_WIDTH 1 /* DSP_IRQ15_EINT1 */ +#define CLEARWATER_DSP_IRQ14_EINT1 0x2000 /* DSP_IRQ14_EINT1 */ +#define CLEARWATER_DSP_IRQ14_EINT1_MASK 0x2000 /* DSP_IRQ14_EINT1 */ +#define CLEARWATER_DSP_IRQ14_EINT1_SHIFT 13 /* DSP_IRQ14_EINT1 */ +#define CLEARWATER_DSP_IRQ14_EINT1_WIDTH 1 /* DSP_IRQ14_EINT1 */ +#define CLEARWATER_DSP_IRQ13_EINT1 0x1000 /* DSP_IRQ13_EINT1 */ +#define CLEARWATER_DSP_IRQ13_EINT1_MASK 0x1000 /* DSP_IRQ13_EINT1 */ +#define CLEARWATER_DSP_IRQ13_EINT1_SHIFT 12 /* DSP_IRQ13_EINT1 */ +#define CLEARWATER_DSP_IRQ13_EINT1_WIDTH 1 /* DSP_IRQ13_EINT1 */ +#define CLEARWATER_DSP_IRQ12_EINT1 0x0800 /* DSP_IRQ12_EINT1 */ +#define CLEARWATER_DSP_IRQ12_EINT1_MASK 0x0800 /* DSP_IRQ12_EINT1 */ +#define CLEARWATER_DSP_IRQ12_EINT1_SHIFT 11 /* DSP_IRQ12_EINT1 */ +#define CLEARWATER_DSP_IRQ12_EINT1_WIDTH 1 /* DSP_IRQ12_EINT1 */ +#define CLEARWATER_DSP_IRQ11_EINT1 0x0400 /* DSP_IRQ11_EINT1 */ +#define CLEARWATER_DSP_IRQ11_EINT1_MASK 0x0400 /* DSP_IRQ11_EINT1 */ +#define CLEARWATER_DSP_IRQ11_EINT1_SHIFT 10 /* DSP_IRQ11_EINT1 */ +#define CLEARWATER_DSP_IRQ11_EINT1_WIDTH 1 /* DSP_IRQ11_EINT1 */ +#define CLEARWATER_DSP_IRQ10_EINT1 0x0200 /* DSP_IRQ10_EINT1 */ +#define CLEARWATER_DSP_IRQ10_EINT1_MASK 0x0200 /* DSP_IRQ10_EINT1 */ +#define CLEARWATER_DSP_IRQ10_EINT1_SHIFT 9 /* DSP_IRQ10_EINT1 */ +#define CLEARWATER_DSP_IRQ10_EINT1_WIDTH 1 /* DSP_IRQ10_EINT1 */ +#define CLEARWATER_DSP_IRQ9_EINT1 0x0100 /* DSP_IRQ9_EINT1 */ +#define CLEARWATER_DSP_IRQ9_EINT1_MASK 0x0100 /* DSP_IRQ9_EINT1 */ +#define CLEARWATER_DSP_IRQ9_EINT1_SHIFT 8 /* DSP_IRQ9_EINT1 */ +#define CLEARWATER_DSP_IRQ9_EINT1_WIDTH 1 /* DSP_IRQ9_EINT1 */ +#define CLEARWATER_DSP_IRQ8_EINT1 0x0080 /* DSP_IRQ8_EINT1 */ +#define CLEARWATER_DSP_IRQ8_EINT1_MASK 0x0080 /* DSP_IRQ8_EINT1 */ +#define CLEARWATER_DSP_IRQ8_EINT1_SHIFT 7 /* DSP_IRQ8_EINT1 */ +#define CLEARWATER_DSP_IRQ8_EINT1_WIDTH 1 /* DSP_IRQ8_EINT1 */ +#define CLEARWATER_DSP_IRQ7_EINT1 0x0040 /* DSP_IRQ7_EINT1 */ +#define CLEARWATER_DSP_IRQ7_EINT1_MASK 0x0040 /* DSP_IRQ7_EINT1 */ +#define CLEARWATER_DSP_IRQ7_EINT1_SHIFT 6 /* DSP_IRQ7_EINT1 */ +#define CLEARWATER_DSP_IRQ7_EINT1_WIDTH 1 /* DSP_IRQ7_EINT1 */ +#define CLEARWATER_DSP_IRQ6_EINT1 0x0020 /* DSP_IRQ6_EINT1 */ +#define CLEARWATER_DSP_IRQ6_EINT1_MASK 0x0020 /* DSP_IRQ6_EINT1 */ +#define CLEARWATER_DSP_IRQ6_EINT1_SHIFT 5 /* DSP_IRQ6_EINT1 */ +#define CLEARWATER_DSP_IRQ6_EINT1_WIDTH 1 /* DSP_IRQ6_EINT1 */ +#define CLEARWATER_DSP_IRQ5_EINT1 0x0010 /* DSP_IRQ5_EINT1 */ +#define CLEARWATER_DSP_IRQ5_EINT1_MASK 0x0010 /* DSP_IRQ5_EINT1 */ +#define CLEARWATER_DSP_IRQ5_EINT1_SHIFT 4 /* DSP_IRQ5_EINT1 */ +#define CLEARWATER_DSP_IRQ5_EINT1_WIDTH 1 /* DSP_IRQ5_EINT1 */ +#define CLEARWATER_DSP_IRQ4_EINT1 0x0008 /* DSP_IRQ4_EINT1 */ +#define CLEARWATER_DSP_IRQ4_EINT1_MASK 0x0008 /* DSP_IRQ4_EINT1 */ +#define CLEARWATER_DSP_IRQ4_EINT1_SHIFT 3 /* DSP_IRQ4_EINT1 */ +#define CLEARWATER_DSP_IRQ4_EINT1_WIDTH 1 /* DSP_IRQ4_EINT1 */ +#define CLEARWATER_DSP_IRQ3_EINT1 0x0004 /* DSP_IRQ3_EINT1 */ +#define CLEARWATER_DSP_IRQ3_EINT1_MASK 0x0004 /* DSP_IRQ3_EINT1 */ +#define CLEARWATER_DSP_IRQ3_EINT1_SHIFT 2 /* DSP_IRQ3_EINT1 */ +#define CLEARWATER_DSP_IRQ3_EINT1_WIDTH 1 /* DSP_IRQ3_EINT1 */ +#define CLEARWATER_DSP_IRQ2_EINT1 0x0002 /* DSP_IRQ2_EINT1 */ +#define CLEARWATER_DSP_IRQ2_EINT1_MASK 0x0002 /* DSP_IRQ2_EINT1 */ +#define CLEARWATER_DSP_IRQ2_EINT1_SHIFT 1 /* DSP_IRQ2_EINT1 */ +#define CLEARWATER_DSP_IRQ2_EINT1_WIDTH 1 /* DSP_IRQ2_EINT1 */ +#define CLEARWATER_DSP_IRQ1_EINT1 0x0001 /* DSP_IRQ1_EINT1 */ +#define CLEARWATER_DSP_IRQ1_EINT1_MASK 0x0001 /* DSP_IRQ1_EINT1 */ +#define CLEARWATER_DSP_IRQ1_EINT1_SHIFT 0 /* DSP_IRQ1_EINT1 */ +#define CLEARWATER_DSP_IRQ1_EINT1_WIDTH 1 /* DSP_IRQ1_EINT1 */ /* * R6155 (0x180B) - IRQ1 Status 12 */ -#define WM8285_SPKOUTR_SC_EINT1 0x0080 /* SPKOUTR_SC_EINT1 */ -#define WM8285_SPKOUTR_SC_EINT1_MASK 0x0080 /* SPKOUTR_SC_EINT1 */ -#define WM8285_SPKOUTR_SC_EINT1_SHIFT 7 /* SPKOUTR_SC_EINT1 */ -#define WM8285_SPKOUTR_SC_EINT1_WIDTH 1 /* SPKOUTR_SC_EINT1 */ -#define WM8285_SPKOUTL_SC_EINT1 0x0040 /* SPKOUTL_SC_EINT1 */ -#define WM8285_SPKOUTL_SC_EINT1_MASK 0x0040 /* SPKOUTL_SC_EINT1 */ -#define WM8285_SPKOUTL_SC_EINT1_SHIFT 6 /* SPKOUTL_SC_EINT1 */ -#define WM8285_SPKOUTL_SC_EINT1_WIDTH 1 /* SPKOUTL_SC_EINT1 */ -#define WM8285_HP3R_SC_EINT1 0x0020 /* HP3R_SC_EINT1 */ -#define WM8285_HP3R_SC_EINT1_MASK 0x0020 /* HP3R_SC_EINT1 */ -#define WM8285_HP3R_SC_EINT1_SHIFT 5 /* HP3R_SC_EINT1 */ -#define WM8285_HP3R_SC_EINT1_WIDTH 1 /* HP3R_SC_EINT1 */ -#define WM8285_HP3L_SC_EINT1 0x0010 /* HP3L_SC_EINT1 */ -#define WM8285_HP3L_SC_EINT1_MASK 0x0010 /* HP3L_SC_EINT1 */ -#define WM8285_HP3L_SC_EINT1_SHIFT 4 /* HP3L_SC_EINT1 */ -#define WM8285_HP3L_SC_EINT1_WIDTH 1 /* HP3L_SC_EINT1 */ -#define WM8285_HP2R_SC_EINT1 0x0008 /* HP2R_SC_EINT1 */ -#define WM8285_HP2R_SC_EINT1_MASK 0x0008 /* HP2R_SC_EINT1 */ -#define WM8285_HP2R_SC_EINT1_SHIFT 3 /* HP2R_SC_EINT1 */ -#define WM8285_HP2R_SC_EINT1_WIDTH 1 /* HP2R_SC_EINT1 */ -#define WM8285_HP2L_SC_EINT1 0x0004 /* HP2L_SC_EINT1 */ -#define WM8285_HP2L_SC_EINT1_MASK 0x0004 /* HP2L_SC_EINT1 */ -#define WM8285_HP2L_SC_EINT1_SHIFT 2 /* HP2L_SC_EINT1 */ -#define WM8285_HP2L_SC_EINT1_WIDTH 1 /* HP2L_SC_EINT1 */ -#define WM8285_HP1R_SC_EINT1 0x0002 /* HP1R_SC_EINT1 */ -#define WM8285_HP1R_SC_EINT1_MASK 0x0002 /* HP1R_SC_EINT1 */ -#define WM8285_HP1R_SC_EINT1_SHIFT 1 /* HP1R_SC_EINT1 */ -#define WM8285_HP1R_SC_EINT1_WIDTH 1 /* HP1R_SC_EINT1 */ -#define WM8285_HP1L_SC_EINT1 0x0001 /* HP1L_SC_EINT1 */ -#define WM8285_HP1L_SC_EINT1_MASK 0x0001 /* HP1L_SC_EINT1 */ -#define WM8285_HP1L_SC_EINT1_SHIFT 0 /* HP1L_SC_EINT1 */ -#define WM8285_HP1L_SC_EINT1_WIDTH 1 /* HP1L_SC_EINT1 */ +#define CLEARWATER_SPKOUTR_SC_EINT1 0x0080 /* SPKOUTR_SC_EINT1 */ +#define CLEARWATER_SPKOUTR_SC_EINT1_MASK 0x0080 /* SPKOUTR_SC_EINT1 */ +#define CLEARWATER_SPKOUTR_SC_EINT1_SHIFT 7 /* SPKOUTR_SC_EINT1 */ +#define CLEARWATER_SPKOUTR_SC_EINT1_WIDTH 1 /* SPKOUTR_SC_EINT1 */ +#define CLEARWATER_SPKOUTL_SC_EINT1 0x0040 /* SPKOUTL_SC_EINT1 */ +#define CLEARWATER_SPKOUTL_SC_EINT1_MASK 0x0040 /* SPKOUTL_SC_EINT1 */ +#define CLEARWATER_SPKOUTL_SC_EINT1_SHIFT 6 /* SPKOUTL_SC_EINT1 */ +#define CLEARWATER_SPKOUTL_SC_EINT1_WIDTH 1 /* SPKOUTL_SC_EINT1 */ +#define CLEARWATER_HP3R_SC_EINT1 0x0020 /* HP3R_SC_EINT1 */ +#define CLEARWATER_HP3R_SC_EINT1_MASK 0x0020 /* HP3R_SC_EINT1 */ +#define CLEARWATER_HP3R_SC_EINT1_SHIFT 5 /* HP3R_SC_EINT1 */ +#define CLEARWATER_HP3R_SC_EINT1_WIDTH 1 /* HP3R_SC_EINT1 */ +#define CLEARWATER_HP3L_SC_EINT1 0x0010 /* HP3L_SC_EINT1 */ +#define CLEARWATER_HP3L_SC_EINT1_MASK 0x0010 /* HP3L_SC_EINT1 */ +#define CLEARWATER_HP3L_SC_EINT1_SHIFT 4 /* HP3L_SC_EINT1 */ +#define CLEARWATER_HP3L_SC_EINT1_WIDTH 1 /* HP3L_SC_EINT1 */ +#define CLEARWATER_HP2R_SC_EINT1 0x0008 /* HP2R_SC_EINT1 */ +#define CLEARWATER_HP2R_SC_EINT1_MASK 0x0008 /* HP2R_SC_EINT1 */ +#define CLEARWATER_HP2R_SC_EINT1_SHIFT 3 /* HP2R_SC_EINT1 */ +#define CLEARWATER_HP2R_SC_EINT1_WIDTH 1 /* HP2R_SC_EINT1 */ +#define CLEARWATER_HP2L_SC_EINT1 0x0004 /* HP2L_SC_EINT1 */ +#define CLEARWATER_HP2L_SC_EINT1_MASK 0x0004 /* HP2L_SC_EINT1 */ +#define CLEARWATER_HP2L_SC_EINT1_SHIFT 2 /* HP2L_SC_EINT1 */ +#define CLEARWATER_HP2L_SC_EINT1_WIDTH 1 /* HP2L_SC_EINT1 */ +#define CLEARWATER_HP1R_SC_EINT1 0x0002 /* HP1R_SC_EINT1 */ +#define CLEARWATER_HP1R_SC_EINT1_MASK 0x0002 /* HP1R_SC_EINT1 */ +#define CLEARWATER_HP1R_SC_EINT1_SHIFT 1 /* HP1R_SC_EINT1 */ +#define CLEARWATER_HP1R_SC_EINT1_WIDTH 1 /* HP1R_SC_EINT1 */ +#define CLEARWATER_HP1L_SC_EINT1 0x0001 /* HP1L_SC_EINT1 */ +#define CLEARWATER_HP1L_SC_EINT1_MASK 0x0001 /* HP1L_SC_EINT1 */ +#define CLEARWATER_HP1L_SC_EINT1_SHIFT 0 /* HP1L_SC_EINT1 */ +#define CLEARWATER_HP1L_SC_EINT1_WIDTH 1 /* HP1L_SC_EINT1 */ /* * R6156 (0x180C) - IRQ1 Status 13 */ -#define WM8285_SPKOUTR_ENABLE_DONE_EINT1 0x0080 /* SPKOUTR_ENABLE_DONE_EINT1 */ -#define WM8285_SPKOUTR_ENABLE_DONE_EINT1_MASK 0x0080 /* SPKOUTR_ENABLE_DONE_EINT1 */ -#define WM8285_SPKOUTR_ENABLE_DONE_EINT1_SHIFT 7 /* SPKOUTR_ENABLE_DONE_EINT1 */ -#define WM8285_SPKOUTR_ENABLE_DONE_EINT1_WIDTH 1 /* SPKOUTR_ENABLE_DONE_EINT1 */ -#define WM8285_SPKOUTL_ENABLE_DONE_EINT1 0x0040 /* SPKOUTL_ENABLE_DONE_EINT1 */ -#define WM8285_SPKOUTL_ENABLE_DONE_EINT1_MASK 0x0040 /* SPKOUTL_ENABLE_DONE_EINT1 */ -#define WM8285_SPKOUTL_ENABLE_DONE_EINT1_SHIFT 6 /* SPKOUTL_ENABLE_DONE_EINT1 */ -#define WM8285_SPKOUTL_ENABLE_DONE_EINT1_WIDTH 1 /* SPKOUTL_ENABLE_DONE_EINT1 */ -#define WM8285_HP3R_ENABLE_DONE_EINT1 0x0020 /* HP3R_ENABLE_DONE_EINT1 */ -#define WM8285_HP3R_ENABLE_DONE_EINT1_MASK 0x0020 /* HP3R_ENABLE_DONE_EINT1 */ -#define WM8285_HP3R_ENABLE_DONE_EINT1_SHIFT 5 /* HP3R_ENABLE_DONE_EINT1 */ -#define WM8285_HP3R_ENABLE_DONE_EINT1_WIDTH 1 /* HP3R_ENABLE_DONE_EINT1 */ -#define WM8285_HP3L_ENABLE_DONE_EINT1 0x0010 /* HP3L_ENABLE_DONE_EINT1 */ -#define WM8285_HP3L_ENABLE_DONE_EINT1_MASK 0x0010 /* HP3L_ENABLE_DONE_EINT1 */ -#define WM8285_HP3L_ENABLE_DONE_EINT1_SHIFT 4 /* HP3L_ENABLE_DONE_EINT1 */ -#define WM8285_HP3L_ENABLE_DONE_EINT1_WIDTH 1 /* HP3L_ENABLE_DONE_EINT1 */ -#define WM8285_HP2R_ENABLE_DONE_EINT1 0x0008 /* HP2R_ENABLE_DONE_EINT1 */ -#define WM8285_HP2R_ENABLE_DONE_EINT1_MASK 0x0008 /* HP2R_ENABLE_DONE_EINT1 */ -#define WM8285_HP2R_ENABLE_DONE_EINT1_SHIFT 3 /* HP2R_ENABLE_DONE_EINT1 */ -#define WM8285_HP2R_ENABLE_DONE_EINT1_WIDTH 1 /* HP2R_ENABLE_DONE_EINT1 */ -#define WM8285_HP2L_ENABLE_DONE_EINT1 0x0004 /* HP2L_ENABLE_DONE_EINT1 */ -#define WM8285_HP2L_ENABLE_DONE_EINT1_MASK 0x0004 /* HP2L_ENABLE_DONE_EINT1 */ -#define WM8285_HP2L_ENABLE_DONE_EINT1_SHIFT 2 /* HP2L_ENABLE_DONE_EINT1 */ -#define WM8285_HP2L_ENABLE_DONE_EINT1_WIDTH 1 /* HP2L_ENABLE_DONE_EINT1 */ -#define WM8285_HP1R_ENABLE_DONE_EINT1 0x0002 /* HP1R_ENABLE_DONE_EINT1 */ -#define WM8285_HP1R_ENABLE_DONE_EINT1_MASK 0x0002 /* HP1R_ENABLE_DONE_EINT1 */ -#define WM8285_HP1R_ENABLE_DONE_EINT1_SHIFT 1 /* HP1R_ENABLE_DONE_EINT1 */ -#define WM8285_HP1R_ENABLE_DONE_EINT1_WIDTH 1 /* HP1R_ENABLE_DONE_EINT1 */ -#define WM8285_HP1L_ENABLE_DONE_EINT1 0x0001 /* HP1L_ENABLE_DONE_EINT1 */ -#define WM8285_HP1L_ENABLE_DONE_EINT1_MASK 0x0001 /* HP1L_ENABLE_DONE_EINT1 */ -#define WM8285_HP1L_ENABLE_DONE_EINT1_SHIFT 0 /* HP1L_ENABLE_DONE_EINT1 */ -#define WM8285_HP1L_ENABLE_DONE_EINT1_WIDTH 1 /* HP1L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_SPKOUTR_ENABLE_DONE_EINT1 0x0080 /* SPKOUTR_ENABLE_DONE_EINT1 */ +#define CLEARWATER_SPKOUTR_ENABLE_DONE_EINT1_MASK 0x0080 /* SPKOUTR_ENABLE_DONE_EINT1 */ +#define CLEARWATER_SPKOUTR_ENABLE_DONE_EINT1_SHIFT 7 /* SPKOUTR_ENABLE_DONE_EINT1 */ +#define CLEARWATER_SPKOUTR_ENABLE_DONE_EINT1_WIDTH 1 /* SPKOUTR_ENABLE_DONE_EINT1 */ +#define CLEARWATER_SPKOUTL_ENABLE_DONE_EINT1 0x0040 /* SPKOUTL_ENABLE_DONE_EINT1 */ +#define CLEARWATER_SPKOUTL_ENABLE_DONE_EINT1_MASK 0x0040 /* SPKOUTL_ENABLE_DONE_EINT1 */ +#define CLEARWATER_SPKOUTL_ENABLE_DONE_EINT1_SHIFT 6 /* SPKOUTL_ENABLE_DONE_EINT1 */ +#define CLEARWATER_SPKOUTL_ENABLE_DONE_EINT1_WIDTH 1 /* SPKOUTL_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP3R_ENABLE_DONE_EINT1 0x0020 /* HP3R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP3R_ENABLE_DONE_EINT1_MASK 0x0020 /* HP3R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP3R_ENABLE_DONE_EINT1_SHIFT 5 /* HP3R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP3R_ENABLE_DONE_EINT1_WIDTH 1 /* HP3R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP3L_ENABLE_DONE_EINT1 0x0010 /* HP3L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP3L_ENABLE_DONE_EINT1_MASK 0x0010 /* HP3L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP3L_ENABLE_DONE_EINT1_SHIFT 4 /* HP3L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP3L_ENABLE_DONE_EINT1_WIDTH 1 /* HP3L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP2R_ENABLE_DONE_EINT1 0x0008 /* HP2R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP2R_ENABLE_DONE_EINT1_MASK 0x0008 /* HP2R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP2R_ENABLE_DONE_EINT1_SHIFT 3 /* HP2R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP2R_ENABLE_DONE_EINT1_WIDTH 1 /* HP2R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP2L_ENABLE_DONE_EINT1 0x0004 /* HP2L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP2L_ENABLE_DONE_EINT1_MASK 0x0004 /* HP2L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP2L_ENABLE_DONE_EINT1_SHIFT 2 /* HP2L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP2L_ENABLE_DONE_EINT1_WIDTH 1 /* HP2L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP1R_ENABLE_DONE_EINT1 0x0002 /* HP1R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP1R_ENABLE_DONE_EINT1_MASK 0x0002 /* HP1R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP1R_ENABLE_DONE_EINT1_SHIFT 1 /* HP1R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP1R_ENABLE_DONE_EINT1_WIDTH 1 /* HP1R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP1L_ENABLE_DONE_EINT1 0x0001 /* HP1L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP1L_ENABLE_DONE_EINT1_MASK 0x0001 /* HP1L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP1L_ENABLE_DONE_EINT1_SHIFT 0 /* HP1L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_HP1L_ENABLE_DONE_EINT1_WIDTH 1 /* HP1L_ENABLE_DONE_EINT1 */ /* * R6157 (0x180D) - IRQ1 Status 14 */ -#define WM8285_SPKOUTR_DISABLE_DONE_EINT1 0x0080 /* SPKOUTR_DISABLE_DONE_EINT1 */ -#define WM8285_SPKOUTR_DISABLE_DONE_EINT1_MASK 0x0080 /* SPKOUTR_DISABLE_DONE_EINT1 */ -#define WM8285_SPKOUTR_DISABLE_DONE_EINT1_SHIFT 7 /* SPKOUTR_DISABLE_DONE_EINT1 */ -#define WM8285_SPKOUTR_DISABLE_DONE_EINT1_WIDTH 1 /* SPKOUTR_DISABLE_DONE_EINT1 */ -#define WM8285_SPKOUTL_DISABLE_DONE_EINT1 0x0040 /* SPKOUTL_DISABLE_DONE_EINT1 */ -#define WM8285_SPKOUTL_DISABLE_DONE_EINT1_MASK 0x0040 /* SPKOUTL_DISABLE_DONE_EINT1 */ -#define WM8285_SPKOUTL_DISABLE_DONE_EINT1_SHIFT 6 /* SPKOUTL_DISABLE_DONE_EINT1 */ -#define WM8285_SPKOUTL_DISABLE_DONE_EINT1_WIDTH 1 /* SPKOUTL_DISABLE_DONE_EINT1 */ -#define WM8285_HP3R_DISABLE_DONE_EINT1 0x0020 /* HP3R_DISABLE_DONE_EINT1 */ -#define WM8285_HP3R_DISABLE_DONE_EINT1_MASK 0x0020 /* HP3R_DISABLE_DONE_EINT1 */ -#define WM8285_HP3R_DISABLE_DONE_EINT1_SHIFT 5 /* HP3R_DISABLE_DONE_EINT1 */ -#define WM8285_HP3R_DISABLE_DONE_EINT1_WIDTH 1 /* HP3R_DISABLE_DONE_EINT1 */ -#define WM8285_HP3L_DISABLE_DONE_EINT1 0x0010 /* HP3L_DISABLE_DONE_EINT1 */ -#define WM8285_HP3L_DISABLE_DONE_EINT1_MASK 0x0010 /* HP3L_DISABLE_DONE_EINT1 */ -#define WM8285_HP3L_DISABLE_DONE_EINT1_SHIFT 4 /* HP3L_DISABLE_DONE_EINT1 */ -#define WM8285_HP3L_DISABLE_DONE_EINT1_WIDTH 1 /* HP3L_DISABLE_DONE_EINT1 */ -#define WM8285_HP2R_DISABLE_DONE_EINT1 0x0008 /* HP2R_DISABLE_DONE_EINT1 */ -#define WM8285_HP2R_DISABLE_DONE_EINT1_MASK 0x0008 /* HP2R_DISABLE_DONE_EINT1 */ -#define WM8285_HP2R_DISABLE_DONE_EINT1_SHIFT 3 /* HP2R_DISABLE_DONE_EINT1 */ -#define WM8285_HP2R_DISABLE_DONE_EINT1_WIDTH 1 /* HP2R_DISABLE_DONE_EINT1 */ -#define WM8285_HP2L_DISABLE_DONE_EINT1 0x0004 /* HP2L_DISABLE_DONE_EINT1 */ -#define WM8285_HP2L_DISABLE_DONE_EINT1_MASK 0x0004 /* HP2L_DISABLE_DONE_EINT1 */ -#define WM8285_HP2L_DISABLE_DONE_EINT1_SHIFT 2 /* HP2L_DISABLE_DONE_EINT1 */ -#define WM8285_HP2L_DISABLE_DONE_EINT1_WIDTH 1 /* HP2L_DISABLE_DONE_EINT1 */ -#define WM8285_HP1R_DISABLE_DONE_EINT1 0x0002 /* HP1R_DISABLE_DONE_EINT1 */ -#define WM8285_HP1R_DISABLE_DONE_EINT1_MASK 0x0002 /* HP1R_DISABLE_DONE_EINT1 */ -#define WM8285_HP1R_DISABLE_DONE_EINT1_SHIFT 1 /* HP1R_DISABLE_DONE_EINT1 */ -#define WM8285_HP1R_DISABLE_DONE_EINT1_WIDTH 1 /* HP1R_DISABLE_DONE_EINT1 */ -#define WM8285_HP1L_DISABLE_DONE_EINT1 0x0001 /* HP1L_DISABLE_DONE_EINT1 */ -#define WM8285_HP1L_DISABLE_DONE_EINT1_MASK 0x0001 /* HP1L_DISABLE_DONE_EINT1 */ -#define WM8285_HP1L_DISABLE_DONE_EINT1_SHIFT 0 /* HP1L_DISABLE_DONE_EINT1 */ -#define WM8285_HP1L_DISABLE_DONE_EINT1_WIDTH 1 /* HP1L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_SPKOUTR_DISABLE_DONE_EINT1 0x0080 /* SPKOUTR_DISABLE_DONE_EINT1 */ +#define CLEARWATER_SPKOUTR_DISABLE_DONE_EINT1_MASK 0x0080 /* SPKOUTR_DISABLE_DONE_EINT1 */ +#define CLEARWATER_SPKOUTR_DISABLE_DONE_EINT1_SHIFT 7 /* SPKOUTR_DISABLE_DONE_EINT1 */ +#define CLEARWATER_SPKOUTR_DISABLE_DONE_EINT1_WIDTH 1 /* SPKOUTR_DISABLE_DONE_EINT1 */ +#define CLEARWATER_SPKOUTL_DISABLE_DONE_EINT1 0x0040 /* SPKOUTL_DISABLE_DONE_EINT1 */ +#define CLEARWATER_SPKOUTL_DISABLE_DONE_EINT1_MASK 0x0040 /* SPKOUTL_DISABLE_DONE_EINT1 */ +#define CLEARWATER_SPKOUTL_DISABLE_DONE_EINT1_SHIFT 6 /* SPKOUTL_DISABLE_DONE_EINT1 */ +#define CLEARWATER_SPKOUTL_DISABLE_DONE_EINT1_WIDTH 1 /* SPKOUTL_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP3R_DISABLE_DONE_EINT1 0x0020 /* HP3R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP3R_DISABLE_DONE_EINT1_MASK 0x0020 /* HP3R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP3R_DISABLE_DONE_EINT1_SHIFT 5 /* HP3R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP3R_DISABLE_DONE_EINT1_WIDTH 1 /* HP3R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP3L_DISABLE_DONE_EINT1 0x0010 /* HP3L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP3L_DISABLE_DONE_EINT1_MASK 0x0010 /* HP3L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP3L_DISABLE_DONE_EINT1_SHIFT 4 /* HP3L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP3L_DISABLE_DONE_EINT1_WIDTH 1 /* HP3L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP2R_DISABLE_DONE_EINT1 0x0008 /* HP2R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP2R_DISABLE_DONE_EINT1_MASK 0x0008 /* HP2R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP2R_DISABLE_DONE_EINT1_SHIFT 3 /* HP2R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP2R_DISABLE_DONE_EINT1_WIDTH 1 /* HP2R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP2L_DISABLE_DONE_EINT1 0x0004 /* HP2L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP2L_DISABLE_DONE_EINT1_MASK 0x0004 /* HP2L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP2L_DISABLE_DONE_EINT1_SHIFT 2 /* HP2L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP2L_DISABLE_DONE_EINT1_WIDTH 1 /* HP2L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP1R_DISABLE_DONE_EINT1 0x0002 /* HP1R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP1R_DISABLE_DONE_EINT1_MASK 0x0002 /* HP1R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP1R_DISABLE_DONE_EINT1_SHIFT 1 /* HP1R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP1R_DISABLE_DONE_EINT1_WIDTH 1 /* HP1R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP1L_DISABLE_DONE_EINT1 0x0001 /* HP1L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP1L_DISABLE_DONE_EINT1_MASK 0x0001 /* HP1L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP1L_DISABLE_DONE_EINT1_SHIFT 0 /* HP1L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_HP1L_DISABLE_DONE_EINT1_WIDTH 1 /* HP1L_DISABLE_DONE_EINT1 */ /* * R6158 (0x180E) - IRQ1 Status 15 */ -#define WM8285_SPK_OVERHEAT_WARN_EINT1 0x0004 /* SPK_OVERHEAT_WARN_EINT1 */ -#define WM8285_SPK_OVERHEAT_WARN_EINT1_MASK 0x0004 /* SPK_OVERHEAT_WARN_EINT1 */ -#define WM8285_SPK_OVERHEAT_WARN_EINT1_SHIFT 2 /* SPK_OVERHEAT_WARN_EINT1 */ -#define WM8285_SPK_OVERHEAT_WARN_EINT1_WIDTH 1 /* SPK_OVERHEAT_WARN_EINT1 */ -#define WM8285_SPK_OVERHEAT_EINT1 0x0002 /* SPK_OVERHEAT_EINT1 */ -#define WM8285_SPK_OVERHEAT_EINT1_MASK 0x0002 /* SPK_OVERHEAT_EINT1 */ -#define WM8285_SPK_OVERHEAT_EINT1_SHIFT 1 /* SPK_OVERHEAT_EINT1 */ -#define WM8285_SPK_OVERHEAT_EINT1_WIDTH 1 /* SPK_OVERHEAT_EINT1 */ -#define WM8285_SPK_SHUTDOWN_EINT1 0x0001 /* SPK_SHUTDOWN_EINT1 */ -#define WM8285_SPK_SHUTDOWN_EINT1_MASK 0x0001 /* SPK_SHUTDOWN_EINT1 */ -#define WM8285_SPK_SHUTDOWN_EINT1_SHIFT 0 /* SPK_SHUTDOWN_EINT1 */ -#define WM8285_SPK_SHUTDOWN_EINT1_WIDTH 1 /* SPK_SHUTDOWN_EINT1 */ +#define CLEARWATER_SPK_OVERHEAT_WARN_EINT1 0x0004 /* SPK_OVERHEAT_WARN_EINT1 */ +#define CLEARWATER_SPK_OVERHEAT_WARN_EINT1_MASK 0x0004 /* SPK_OVERHEAT_WARN_EINT1 */ +#define CLEARWATER_SPK_OVERHEAT_WARN_EINT1_SHIFT 2 /* SPK_OVERHEAT_WARN_EINT1 */ +#define CLEARWATER_SPK_OVERHEAT_WARN_EINT1_WIDTH 1 /* SPK_OVERHEAT_WARN_EINT1 */ +#define CLEARWATER_SPK_OVERHEAT_EINT1 0x0002 /* SPK_OVERHEAT_EINT1 */ +#define CLEARWATER_SPK_OVERHEAT_EINT1_MASK 0x0002 /* SPK_OVERHEAT_EINT1 */ +#define CLEARWATER_SPK_OVERHEAT_EINT1_SHIFT 1 /* SPK_OVERHEAT_EINT1 */ +#define CLEARWATER_SPK_OVERHEAT_EINT1_WIDTH 1 /* SPK_OVERHEAT_EINT1 */ +#define CLEARWATER_SPK_SHUTDOWN_EINT1 0x0001 /* SPK_SHUTDOWN_EINT1 */ +#define CLEARWATER_SPK_SHUTDOWN_EINT1_MASK 0x0001 /* SPK_SHUTDOWN_EINT1 */ +#define CLEARWATER_SPK_SHUTDOWN_EINT1_SHIFT 0 /* SPK_SHUTDOWN_EINT1 */ +#define CLEARWATER_SPK_SHUTDOWN_EINT1_WIDTH 1 /* SPK_SHUTDOWN_EINT1 */ /* * R6208 (0x1840) - IRQ1 Mask 1 */ -#define WM8285_IM_DSP_SHARED_WR_COLL_EINT1 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT1 */ -#define WM8285_IM_DSP_SHARED_WR_COLL_EINT1_MASK 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT1 */ -#define WM8285_IM_DSP_SHARED_WR_COLL_EINT1_SHIFT 15 /* IM_DSP_SHARED_WR_COLL_EINT1 */ -#define WM8285_IM_DSP_SHARED_WR_COLL_EINT1_WIDTH 1 /* IM_DSP_SHARED_WR_COLL_EINT1 */ -#define WM8285_IM_CTRLIF_ERR_EINT1 0x1000 /* IM_CTRLIF_ERR_EINT1 */ -#define WM8285_IM_CTRLIF_ERR_EINT1_MASK 0x1000 /* IM_CTRLIF_ERR_EINT1 */ -#define WM8285_IM_CTRLIF_ERR_EINT1_SHIFT 12 /* IM_CTRLIF_ERR_EINT1 */ -#define WM8285_IM_CTRLIF_ERR_EINT1_WIDTH 1 /* IM_CTRLIF_ERR_EINT1 */ -#define WM8285_IM_IRQ_NO_CLOCK_EINT1 0x0200 /* IM_IRQ_NO_CLOCK_EINT1 */ -#define WM8285_IM_IRQ_NO_CLOCK_EINT1_MASK 0x0200 /* IM_IRQ_NO_CLOCK_EINT1 */ -#define WM8285_IM_IRQ_NO_CLOCK_EINT1_SHIFT 9 /* IM_IRQ_NO_CLOCK_EINT1 */ -#define WM8285_IM_IRQ_NO_CLOCK_EINT1_WIDTH 1 /* IM_IRQ_NO_CLOCK_EINT1 */ -#define WM8285_IM_CLOCK_DETECT_EINT1 0x0100 /* IM_CLOCK_DETECT_EINT1 */ -#define WM8285_IM_CLOCK_DETECT_EINT1_MASK 0x0100 /* IM_CLOCK_DETECT_EINT1 */ -#define WM8285_IM_CLOCK_DETECT_EINT1_SHIFT 8 /* IM_CLOCK_DETECT_EINT1 */ -#define WM8285_IM_CLOCK_DETECT_EINT1_WIDTH 1 /* IM_CLOCK_DETECT_EINT1 */ -#define WM8285_IM_BOOT_DONE_EINT1 0x0080 /* IM_BOOT_DONE_EINT1 */ -#define WM8285_IM_BOOT_DONE_EINT1_MASK 0x0080 /* IM_BOOT_DONE_EINT1 */ -#define WM8285_IM_BOOT_DONE_EINT1_SHIFT 7 /* IM_BOOT_DONE_EINT1 */ -#define WM8285_IM_BOOT_DONE_EINT1_WIDTH 1 /* IM_BOOT_DONE_EINT1 */ +#define CLEARWATER_IM_DSP_SHARED_WR_COLL_EINT1 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT1 */ +#define CLEARWATER_IM_DSP_SHARED_WR_COLL_EINT1_MASK 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT1 */ +#define CLEARWATER_IM_DSP_SHARED_WR_COLL_EINT1_SHIFT 15 /* IM_DSP_SHARED_WR_COLL_EINT1 */ +#define CLEARWATER_IM_DSP_SHARED_WR_COLL_EINT1_WIDTH 1 /* IM_DSP_SHARED_WR_COLL_EINT1 */ +#define CLEARWATER_IM_CTRLIF_ERR_EINT1 0x1000 /* IM_CTRLIF_ERR_EINT1 */ +#define CLEARWATER_IM_CTRLIF_ERR_EINT1_MASK 0x1000 /* IM_CTRLIF_ERR_EINT1 */ +#define CLEARWATER_IM_CTRLIF_ERR_EINT1_SHIFT 12 /* IM_CTRLIF_ERR_EINT1 */ +#define CLEARWATER_IM_CTRLIF_ERR_EINT1_WIDTH 1 /* IM_CTRLIF_ERR_EINT1 */ +#define CLEARWATER_IM_IRQ_NO_CLOCK_EINT1 0x0200 /* IM_IRQ_NO_CLOCK_EINT1 */ +#define CLEARWATER_IM_IRQ_NO_CLOCK_EINT1_MASK 0x0200 /* IM_IRQ_NO_CLOCK_EINT1 */ +#define CLEARWATER_IM_IRQ_NO_CLOCK_EINT1_SHIFT 9 /* IM_IRQ_NO_CLOCK_EINT1 */ +#define CLEARWATER_IM_IRQ_NO_CLOCK_EINT1_WIDTH 1 /* IM_IRQ_NO_CLOCK_EINT1 */ +#define CLEARWATER_IM_CLOCK_DETECT_EINT1 0x0100 /* IM_CLOCK_DETECT_EINT1 */ +#define CLEARWATER_IM_CLOCK_DETECT_EINT1_MASK 0x0100 /* IM_CLOCK_DETECT_EINT1 */ +#define CLEARWATER_IM_CLOCK_DETECT_EINT1_SHIFT 8 /* IM_CLOCK_DETECT_EINT1 */ +#define CLEARWATER_IM_CLOCK_DETECT_EINT1_WIDTH 1 /* IM_CLOCK_DETECT_EINT1 */ +#define CLEARWATER_IM_BOOT_DONE_EINT1 0x0080 /* IM_BOOT_DONE_EINT1 */ +#define CLEARWATER_IM_BOOT_DONE_EINT1_MASK 0x0080 /* IM_BOOT_DONE_EINT1 */ +#define CLEARWATER_IM_BOOT_DONE_EINT1_SHIFT 7 /* IM_BOOT_DONE_EINT1 */ +#define CLEARWATER_IM_BOOT_DONE_EINT1_WIDTH 1 /* IM_BOOT_DONE_EINT1 */ /* * R6209 (0x1841) - IRQ1 Mask 2 */ -#define WM8285_IM_FLL3_LOCK_EINT1 0x0400 /* IM_FLL3_LOCK_EINT1 */ -#define WM8285_IM_FLL3_LOCK_EINT1_MASK 0x0400 /* IM_FLL3_LOCK_EINT1 */ -#define WM8285_IM_FLL3_LOCK_EINT1_SHIFT 10 /* IM_FLL3_LOCK_EINT1 */ -#define WM8285_IM_FLL3_LOCK_EINT1_WIDTH 1 /* IM_FLL3_LOCK_EINT1 */ -#define WM8285_IM_FLL2_LOCK_EINT1 0x0200 /* IM_FLL2_LOCK_EINT1 */ -#define WM8285_IM_FLL2_LOCK_EINT1_MASK 0x0200 /* IM_FLL2_LOCK_EINT1 */ -#define WM8285_IM_FLL2_LOCK_EINT1_SHIFT 9 /* IM_FLL2_LOCK_EINT1 */ -#define WM8285_IM_FLL2_LOCK_EINT1_WIDTH 1 /* IM_FLL2_LOCK_EINT1 */ -#define WM8285_IM_FLL1_LOCK_EINT1 0x0100 /* IM_FLL1_LOCK_EINT1 */ -#define WM8285_IM_FLL1_LOCK_EINT1_MASK 0x0100 /* IM_FLL1_LOCK_EINT1 */ -#define WM8285_IM_FLL1_LOCK_EINT1_SHIFT 8 /* IM_FLL1_LOCK_EINT1 */ -#define WM8285_IM_FLL1_LOCK_EINT1_WIDTH 1 /* IM_FLL1_LOCK_EINT1 */ +#define CLEARWATER_IM_FLL3_LOCK_EINT1 0x0400 /* IM_FLL3_LOCK_EINT1 */ +#define CLEARWATER_IM_FLL3_LOCK_EINT1_MASK 0x0400 /* IM_FLL3_LOCK_EINT1 */ +#define CLEARWATER_IM_FLL3_LOCK_EINT1_SHIFT 10 /* IM_FLL3_LOCK_EINT1 */ +#define CLEARWATER_IM_FLL3_LOCK_EINT1_WIDTH 1 /* IM_FLL3_LOCK_EINT1 */ +#define CLEARWATER_IM_FLL2_LOCK_EINT1 0x0200 /* IM_FLL2_LOCK_EINT1 */ +#define CLEARWATER_IM_FLL2_LOCK_EINT1_MASK 0x0200 /* IM_FLL2_LOCK_EINT1 */ +#define CLEARWATER_IM_FLL2_LOCK_EINT1_SHIFT 9 /* IM_FLL2_LOCK_EINT1 */ +#define CLEARWATER_IM_FLL2_LOCK_EINT1_WIDTH 1 /* IM_FLL2_LOCK_EINT1 */ +#define CLEARWATER_IM_FLL1_LOCK_EINT1 0x0100 /* IM_FLL1_LOCK_EINT1 */ +#define CLEARWATER_IM_FLL1_LOCK_EINT1_MASK 0x0100 /* IM_FLL1_LOCK_EINT1 */ +#define CLEARWATER_IM_FLL1_LOCK_EINT1_SHIFT 8 /* IM_FLL1_LOCK_EINT1 */ +#define CLEARWATER_IM_FLL1_LOCK_EINT1_WIDTH 1 /* IM_FLL1_LOCK_EINT1 */ /* * R6213 (0x1845) - IRQ1 Mask 6 */ -#define WM8285_IM_MICDET_EINT1 0x0100 /* IM_MICDET_EINT1 */ -#define WM8285_IM_MICDET_EINT1_MASK 0x0100 /* IM_MICDET_EINT1 */ -#define WM8285_IM_MICDET_EINT1_SHIFT 8 /* IM_MICDET_EINT1 */ -#define WM8285_IM_MICDET_EINT1_WIDTH 1 /* IM_MICDET_EINT1 */ -#define WM8285_IM_HPDET_EINT1 0x0001 /* IM_HPDET_EINT1 */ -#define WM8285_IM_HPDET_EINT1_MASK 0x0001 /* IM_HPDET_EINT1 */ -#define WM8285_IM_HPDET_EINT1_SHIFT 0 /* IM_HPDET_EINT1 */ -#define WM8285_IM_HPDET_EINT1_WIDTH 1 /* IM_HPDET_EINT1 */ +#define CLEARWATER_IM_MICDET_EINT1 0x0100 /* IM_MICDET_EINT1 */ +#define CLEARWATER_IM_MICDET_EINT1_MASK 0x0100 /* IM_MICDET_EINT1 */ +#define CLEARWATER_IM_MICDET_EINT1_SHIFT 8 /* IM_MICDET_EINT1 */ +#define CLEARWATER_IM_MICDET_EINT1_WIDTH 1 /* IM_MICDET_EINT1 */ +#define CLEARWATER_IM_HPDET_EINT1 0x0001 /* IM_HPDET_EINT1 */ +#define CLEARWATER_IM_HPDET_EINT1_MASK 0x0001 /* IM_HPDET_EINT1 */ +#define CLEARWATER_IM_HPDET_EINT1_SHIFT 0 /* IM_HPDET_EINT1 */ +#define CLEARWATER_IM_HPDET_EINT1_WIDTH 1 /* IM_HPDET_EINT1 */ /* * R6214 (0x1846) - IRQ1 Mask 7 */ -#define WM8285_IM_MICD_CLAMP_FALL_EINT1 0x0020 /* IM_MICD_CLAMP_FALL_EINT1 */ -#define WM8285_IM_MICD_CLAMP_FALL_EINT1_MASK 0x0020 /* IM_MICD_CLAMP_FALL_EINT1 */ -#define WM8285_IM_MICD_CLAMP_FALL_EINT1_SHIFT 5 /* IM_MICD_CLAMP_FALL_EINT1 */ -#define WM8285_IM_MICD_CLAMP_FALL_EINT1_WIDTH 1 /* IM_MICD_CLAMP_FALL_EINT1 */ -#define WM8285_IM_MICD_CLAMP_RISE_EINT1 0x0010 /* IM_MICD_CLAMP_RISE_EINT1 */ -#define WM8285_IM_MICD_CLAMP_RISE_EINT1_MASK 0x0010 /* IM_MICD_CLAMP_RISE_EINT1 */ -#define WM8285_IM_MICD_CLAMP_RISE_EINT1_SHIFT 4 /* IM_MICD_CLAMP_RISE_EINT1 */ -#define WM8285_IM_MICD_CLAMP_RISE_EINT1_WIDTH 1 /* IM_MICD_CLAMP_RISE_EINT1 */ -#define WM8285_IM_JD2_FALL_EINT1 0x0008 /* IM_JD2_FALL_EINT1 */ -#define WM8285_IM_JD2_FALL_EINT1_MASK 0x0008 /* IM_JD2_FALL_EINT1 */ -#define WM8285_IM_JD2_FALL_EINT1_SHIFT 3 /* IM_JD2_FALL_EINT1 */ -#define WM8285_IM_JD2_FALL_EINT1_WIDTH 1 /* IM_JD2_FALL_EINT1 */ -#define WM8285_IM_JD2_RISE_EINT1 0x0004 /* IM_JD2_RISE_EINT1 */ -#define WM8285_IM_JD2_RISE_EINT1_MASK 0x0004 /* IM_JD2_RISE_EINT1 */ -#define WM8285_IM_JD2_RISE_EINT1_SHIFT 2 /* IM_JD2_RISE_EINT1 */ -#define WM8285_IM_JD2_RISE_EINT1_WIDTH 1 /* IM_JD2_RISE_EINT1 */ -#define WM8285_IM_JD1_FALL_EINT1 0x0002 /* IM_JD1_FALL_EINT1 */ -#define WM8285_IM_JD1_FALL_EINT1_MASK 0x0002 /* IM_JD1_FALL_EINT1 */ -#define WM8285_IM_JD1_FALL_EINT1_SHIFT 1 /* IM_JD1_FALL_EINT1 */ -#define WM8285_IM_JD1_FALL_EINT1_WIDTH 1 /* IM_JD1_FALL_EINT1 */ -#define WM8285_IM_JD1_RISE_EINT1 0x0001 /* IM_JD1_RISE_EINT1 */ -#define WM8285_IM_JD1_RISE_EINT1_MASK 0x0001 /* IM_JD1_RISE_EINT1 */ -#define WM8285_IM_JD1_RISE_EINT1_SHIFT 0 /* IM_JD1_RISE_EINT1 */ -#define WM8285_IM_JD1_RISE_EINT1_WIDTH 1 /* IM_JD1_RISE_EINT1 */ +#define CLEARWATER_IM_MICD_CLAMP_FALL_EINT1 0x0020 /* IM_MICD_CLAMP_FALL_EINT1 */ +#define CLEARWATER_IM_MICD_CLAMP_FALL_EINT1_MASK 0x0020 /* IM_MICD_CLAMP_FALL_EINT1 */ +#define CLEARWATER_IM_MICD_CLAMP_FALL_EINT1_SHIFT 5 /* IM_MICD_CLAMP_FALL_EINT1 */ +#define CLEARWATER_IM_MICD_CLAMP_FALL_EINT1_WIDTH 1 /* IM_MICD_CLAMP_FALL_EINT1 */ +#define CLEARWATER_IM_MICD_CLAMP_RISE_EINT1 0x0010 /* IM_MICD_CLAMP_RISE_EINT1 */ +#define CLEARWATER_IM_MICD_CLAMP_RISE_EINT1_MASK 0x0010 /* IM_MICD_CLAMP_RISE_EINT1 */ +#define CLEARWATER_IM_MICD_CLAMP_RISE_EINT1_SHIFT 4 /* IM_MICD_CLAMP_RISE_EINT1 */ +#define CLEARWATER_IM_MICD_CLAMP_RISE_EINT1_WIDTH 1 /* IM_MICD_CLAMP_RISE_EINT1 */ +#define CLEARWATER_IM_JD2_FALL_EINT1 0x0008 /* IM_JD2_FALL_EINT1 */ +#define CLEARWATER_IM_JD2_FALL_EINT1_MASK 0x0008 /* IM_JD2_FALL_EINT1 */ +#define CLEARWATER_IM_JD2_FALL_EINT1_SHIFT 3 /* IM_JD2_FALL_EINT1 */ +#define CLEARWATER_IM_JD2_FALL_EINT1_WIDTH 1 /* IM_JD2_FALL_EINT1 */ +#define CLEARWATER_IM_JD2_RISE_EINT1 0x0004 /* IM_JD2_RISE_EINT1 */ +#define CLEARWATER_IM_JD2_RISE_EINT1_MASK 0x0004 /* IM_JD2_RISE_EINT1 */ +#define CLEARWATER_IM_JD2_RISE_EINT1_SHIFT 2 /* IM_JD2_RISE_EINT1 */ +#define CLEARWATER_IM_JD2_RISE_EINT1_WIDTH 1 /* IM_JD2_RISE_EINT1 */ +#define CLEARWATER_IM_JD1_FALL_EINT1 0x0002 /* IM_JD1_FALL_EINT1 */ +#define CLEARWATER_IM_JD1_FALL_EINT1_MASK 0x0002 /* IM_JD1_FALL_EINT1 */ +#define CLEARWATER_IM_JD1_FALL_EINT1_SHIFT 1 /* IM_JD1_FALL_EINT1 */ +#define CLEARWATER_IM_JD1_FALL_EINT1_WIDTH 1 /* IM_JD1_FALL_EINT1 */ +#define CLEARWATER_IM_JD1_RISE_EINT1 0x0001 /* IM_JD1_RISE_EINT1 */ +#define CLEARWATER_IM_JD1_RISE_EINT1_MASK 0x0001 /* IM_JD1_RISE_EINT1 */ +#define CLEARWATER_IM_JD1_RISE_EINT1_SHIFT 0 /* IM_JD1_RISE_EINT1 */ +#define CLEARWATER_IM_JD1_RISE_EINT1_WIDTH 1 /* IM_JD1_RISE_EINT1 */ /* * R6216 (0x1848) - IRQ1 Mask 9 */ -#define WM8285_IM_ASRC2_IN2_LOCK_EINT1 0x0800 /* IM_ASRC2_IN2_LOCK_EINT1 */ -#define WM8285_IM_ASRC2_IN2_LOCK_EINT1_MASK 0x0800 /* IM_ASRC2_IN2_LOCK_EINT1 */ -#define WM8285_IM_ASRC2_IN2_LOCK_EINT1_SHIFT 11 /* IM_ASRC2_IN2_LOCK_EINT1 */ -#define WM8285_IM_ASRC2_IN2_LOCK_EINT1_WIDTH 1 /* IM_ASRC2_IN2_LOCK_EINT1 */ -#define WM8285_IM_ASRC2_IN1_LOCK_EINT1 0x0400 /* IM_ASRC2_IN1_LOCK_EINT1 */ -#define WM8285_IM_ASRC2_IN1_LOCK_EINT1_MASK 0x0400 /* IM_ASRC2_IN1_LOCK_EINT1 */ -#define WM8285_IM_ASRC2_IN1_LOCK_EINT1_SHIFT 10 /* IM_ASRC2_IN1_LOCK_EINT1 */ -#define WM8285_IM_ASRC2_IN1_LOCK_EINT1_WIDTH 1 /* IM_ASRC2_IN1_LOCK_EINT1 */ -#define WM8285_IM_ASRC1_IN2_LOCK_EINT1 0x0200 /* IM_ASRC1_IN2_LOCK_EINT1 */ -#define WM8285_IM_ASRC1_IN2_LOCK_EINT1_MASK 0x0200 /* IM_ASRC1_IN2_LOCK_EINT1 */ -#define WM8285_IM_ASRC1_IN2_LOCK_EINT1_SHIFT 9 /* IM_ASRC1_IN2_LOCK_EINT1 */ -#define WM8285_IM_ASRC1_IN2_LOCK_EINT1_WIDTH 1 /* IM_ASRC1_IN2_LOCK_EINT1 */ -#define WM8285_IM_ASRC1_IN1_LOCK_EINT1 0x0100 /* IM_ASRC1_IN1_LOCK_EINT1 */ -#define WM8285_IM_ASRC1_IN1_LOCK_EINT1_MASK 0x0100 /* IM_ASRC1_IN1_LOCK_EINT1 */ -#define WM8285_IM_ASRC1_IN1_LOCK_EINT1_SHIFT 8 /* IM_ASRC1_IN1_LOCK_EINT1 */ -#define WM8285_IM_ASRC1_IN1_LOCK_EINT1_WIDTH 1 /* IM_ASRC1_IN1_LOCK_EINT1 */ -#define WM8285_IM_DRC2_SIG_DET_EINT1 0x0002 /* IM_DRC2_SIG_DET_EINT1 */ -#define WM8285_IM_DRC2_SIG_DET_EINT1_MASK 0x0002 /* IM_DRC2_SIG_DET_EINT1 */ -#define WM8285_IM_DRC2_SIG_DET_EINT1_SHIFT 1 /* IM_DRC2_SIG_DET_EINT1 */ -#define WM8285_IM_DRC2_SIG_DET_EINT1_WIDTH 1 /* IM_DRC2_SIG_DET_EINT1 */ -#define WM8285_IM_DRC1_SIG_DET_EINT1 0x0001 /* IM_DRC1_SIG_DET_EINT1 */ -#define WM8285_IM_DRC1_SIG_DET_EINT1_MASK 0x0001 /* IM_DRC1_SIG_DET_EINT1 */ -#define WM8285_IM_DRC1_SIG_DET_EINT1_SHIFT 0 /* IM_DRC1_SIG_DET_EINT1 */ -#define WM8285_IM_DRC1_SIG_DET_EINT1_WIDTH 1 /* IM_DRC1_SIG_DET_EINT1 */ +#define CLEARWATER_IM_ASRC2_IN2_LOCK_EINT1 0x0800 /* IM_ASRC2_IN2_LOCK_EINT1 */ +#define CLEARWATER_IM_ASRC2_IN2_LOCK_EINT1_MASK 0x0800 /* IM_ASRC2_IN2_LOCK_EINT1 */ +#define CLEARWATER_IM_ASRC2_IN2_LOCK_EINT1_SHIFT 11 /* IM_ASRC2_IN2_LOCK_EINT1 */ +#define CLEARWATER_IM_ASRC2_IN2_LOCK_EINT1_WIDTH 1 /* IM_ASRC2_IN2_LOCK_EINT1 */ +#define CLEARWATER_IM_ASRC2_IN1_LOCK_EINT1 0x0400 /* IM_ASRC2_IN1_LOCK_EINT1 */ +#define CLEARWATER_IM_ASRC2_IN1_LOCK_EINT1_MASK 0x0400 /* IM_ASRC2_IN1_LOCK_EINT1 */ +#define CLEARWATER_IM_ASRC2_IN1_LOCK_EINT1_SHIFT 10 /* IM_ASRC2_IN1_LOCK_EINT1 */ +#define CLEARWATER_IM_ASRC2_IN1_LOCK_EINT1_WIDTH 1 /* IM_ASRC2_IN1_LOCK_EINT1 */ +#define CLEARWATER_IM_ASRC1_IN2_LOCK_EINT1 0x0200 /* IM_ASRC1_IN2_LOCK_EINT1 */ +#define CLEARWATER_IM_ASRC1_IN2_LOCK_EINT1_MASK 0x0200 /* IM_ASRC1_IN2_LOCK_EINT1 */ +#define CLEARWATER_IM_ASRC1_IN2_LOCK_EINT1_SHIFT 9 /* IM_ASRC1_IN2_LOCK_EINT1 */ +#define CLEARWATER_IM_ASRC1_IN2_LOCK_EINT1_WIDTH 1 /* IM_ASRC1_IN2_LOCK_EINT1 */ +#define CLEARWATER_IM_ASRC1_IN1_LOCK_EINT1 0x0100 /* IM_ASRC1_IN1_LOCK_EINT1 */ +#define CLEARWATER_IM_ASRC1_IN1_LOCK_EINT1_MASK 0x0100 /* IM_ASRC1_IN1_LOCK_EINT1 */ +#define CLEARWATER_IM_ASRC1_IN1_LOCK_EINT1_SHIFT 8 /* IM_ASRC1_IN1_LOCK_EINT1 */ +#define CLEARWATER_IM_ASRC1_IN1_LOCK_EINT1_WIDTH 1 /* IM_ASRC1_IN1_LOCK_EINT1 */ +#define CLEARWATER_IM_DRC2_SIG_DET_EINT1 0x0002 /* IM_DRC2_SIG_DET_EINT1 */ +#define CLEARWATER_IM_DRC2_SIG_DET_EINT1_MASK 0x0002 /* IM_DRC2_SIG_DET_EINT1 */ +#define CLEARWATER_IM_DRC2_SIG_DET_EINT1_SHIFT 1 /* IM_DRC2_SIG_DET_EINT1 */ +#define CLEARWATER_IM_DRC2_SIG_DET_EINT1_WIDTH 1 /* IM_DRC2_SIG_DET_EINT1 */ +#define CLEARWATER_IM_DRC1_SIG_DET_EINT1 0x0001 /* IM_DRC1_SIG_DET_EINT1 */ +#define CLEARWATER_IM_DRC1_SIG_DET_EINT1_MASK 0x0001 /* IM_DRC1_SIG_DET_EINT1 */ +#define CLEARWATER_IM_DRC1_SIG_DET_EINT1_SHIFT 0 /* IM_DRC1_SIG_DET_EINT1 */ +#define CLEARWATER_IM_DRC1_SIG_DET_EINT1_WIDTH 1 /* IM_DRC1_SIG_DET_EINT1 */ /* * R6218 (0x184A) - IRQ1 Mask 11 */ -#define WM8285_IM_DSP_IRQ16_EINT1 0x8000 /* IM_DSP_IRQ16_EINT1 */ -#define WM8285_IM_DSP_IRQ16_EINT1_MASK 0x8000 /* IM_DSP_IRQ16_EINT1 */ -#define WM8285_IM_DSP_IRQ16_EINT1_SHIFT 15 /* IM_DSP_IRQ16_EINT1 */ -#define WM8285_IM_DSP_IRQ16_EINT1_WIDTH 1 /* IM_DSP_IRQ16_EINT1 */ -#define WM8285_IM_DSP_IRQ15_EINT1 0x4000 /* IM_DSP_IRQ15_EINT1 */ -#define WM8285_IM_DSP_IRQ15_EINT1_MASK 0x4000 /* IM_DSP_IRQ15_EINT1 */ -#define WM8285_IM_DSP_IRQ15_EINT1_SHIFT 14 /* IM_DSP_IRQ15_EINT1 */ -#define WM8285_IM_DSP_IRQ15_EINT1_WIDTH 1 /* IM_DSP_IRQ15_EINT1 */ -#define WM8285_IM_DSP_IRQ14_EINT1 0x2000 /* IM_DSP_IRQ14_EINT1 */ -#define WM8285_IM_DSP_IRQ14_EINT1_MASK 0x2000 /* IM_DSP_IRQ14_EINT1 */ -#define WM8285_IM_DSP_IRQ14_EINT1_SHIFT 13 /* IM_DSP_IRQ14_EINT1 */ -#define WM8285_IM_DSP_IRQ14_EINT1_WIDTH 1 /* IM_DSP_IRQ14_EINT1 */ -#define WM8285_IM_DSP_IRQ13_EINT1 0x1000 /* IM_DSP_IRQ13_EINT1 */ -#define WM8285_IM_DSP_IRQ13_EINT1_MASK 0x1000 /* IM_DSP_IRQ13_EINT1 */ -#define WM8285_IM_DSP_IRQ13_EINT1_SHIFT 12 /* IM_DSP_IRQ13_EINT1 */ -#define WM8285_IM_DSP_IRQ13_EINT1_WIDTH 1 /* IM_DSP_IRQ13_EINT1 */ -#define WM8285_IM_DSP_IRQ12_EINT1 0x0800 /* IM_DSP_IRQ12_EINT1 */ -#define WM8285_IM_DSP_IRQ12_EINT1_MASK 0x0800 /* IM_DSP_IRQ12_EINT1 */ -#define WM8285_IM_DSP_IRQ12_EINT1_SHIFT 11 /* IM_DSP_IRQ12_EINT1 */ -#define WM8285_IM_DSP_IRQ12_EINT1_WIDTH 1 /* IM_DSP_IRQ12_EINT1 */ -#define WM8285_IM_DSP_IRQ11_EINT1 0x0400 /* IM_DSP_IRQ11_EINT1 */ -#define WM8285_IM_DSP_IRQ11_EINT1_MASK 0x0400 /* IM_DSP_IRQ11_EINT1 */ -#define WM8285_IM_DSP_IRQ11_EINT1_SHIFT 10 /* IM_DSP_IRQ11_EINT1 */ -#define WM8285_IM_DSP_IRQ11_EINT1_WIDTH 1 /* IM_DSP_IRQ11_EINT1 */ -#define WM8285_IM_DSP_IRQ10_EINT1 0x0200 /* IM_DSP_IRQ10_EINT1 */ -#define WM8285_IM_DSP_IRQ10_EINT1_MASK 0x0200 /* IM_DSP_IRQ10_EINT1 */ -#define WM8285_IM_DSP_IRQ10_EINT1_SHIFT 9 /* IM_DSP_IRQ10_EINT1 */ -#define WM8285_IM_DSP_IRQ10_EINT1_WIDTH 1 /* IM_DSP_IRQ10_EINT1 */ -#define WM8285_IM_DSP_IRQ9_EINT1 0x0100 /* IM_DSP_IRQ9_EINT1 */ -#define WM8285_IM_DSP_IRQ9_EINT1_MASK 0x0100 /* IM_DSP_IRQ9_EINT1 */ -#define WM8285_IM_DSP_IRQ9_EINT1_SHIFT 8 /* IM_DSP_IRQ9_EINT1 */ -#define WM8285_IM_DSP_IRQ9_EINT1_WIDTH 1 /* IM_DSP_IRQ9_EINT1 */ -#define WM8285_IM_DSP_IRQ8_EINT1 0x0080 /* IM_DSP_IRQ8_EINT1 */ -#define WM8285_IM_DSP_IRQ8_EINT1_MASK 0x0080 /* IM_DSP_IRQ8_EINT1 */ -#define WM8285_IM_DSP_IRQ8_EINT1_SHIFT 7 /* IM_DSP_IRQ8_EINT1 */ -#define WM8285_IM_DSP_IRQ8_EINT1_WIDTH 1 /* IM_DSP_IRQ8_EINT1 */ -#define WM8285_IM_DSP_IRQ7_EINT1 0x0040 /* IM_DSP_IRQ7_EINT1 */ -#define WM8285_IM_DSP_IRQ7_EINT1_MASK 0x0040 /* IM_DSP_IRQ7_EINT1 */ -#define WM8285_IM_DSP_IRQ7_EINT1_SHIFT 6 /* IM_DSP_IRQ7_EINT1 */ -#define WM8285_IM_DSP_IRQ7_EINT1_WIDTH 1 /* IM_DSP_IRQ7_EINT1 */ -#define WM8285_IM_DSP_IRQ6_EINT1 0x0020 /* IM_DSP_IRQ6_EINT1 */ -#define WM8285_IM_DSP_IRQ6_EINT1_MASK 0x0020 /* IM_DSP_IRQ6_EINT1 */ -#define WM8285_IM_DSP_IRQ6_EINT1_SHIFT 5 /* IM_DSP_IRQ6_EINT1 */ -#define WM8285_IM_DSP_IRQ6_EINT1_WIDTH 1 /* IM_DSP_IRQ6_EINT1 */ -#define WM8285_IM_DSP_IRQ5_EINT1 0x0010 /* IM_DSP_IRQ5_EINT1 */ -#define WM8285_IM_DSP_IRQ5_EINT1_MASK 0x0010 /* IM_DSP_IRQ5_EINT1 */ -#define WM8285_IM_DSP_IRQ5_EINT1_SHIFT 4 /* IM_DSP_IRQ5_EINT1 */ -#define WM8285_IM_DSP_IRQ5_EINT1_WIDTH 1 /* IM_DSP_IRQ5_EINT1 */ -#define WM8285_IM_DSP_IRQ4_EINT1 0x0008 /* IM_DSP_IRQ4_EINT1 */ -#define WM8285_IM_DSP_IRQ4_EINT1_MASK 0x0008 /* IM_DSP_IRQ4_EINT1 */ -#define WM8285_IM_DSP_IRQ4_EINT1_SHIFT 3 /* IM_DSP_IRQ4_EINT1 */ -#define WM8285_IM_DSP_IRQ4_EINT1_WIDTH 1 /* IM_DSP_IRQ4_EINT1 */ -#define WM8285_IM_DSP_IRQ3_EINT1 0x0004 /* IM_DSP_IRQ3_EINT1 */ -#define WM8285_IM_DSP_IRQ3_EINT1_MASK 0x0004 /* IM_DSP_IRQ3_EINT1 */ -#define WM8285_IM_DSP_IRQ3_EINT1_SHIFT 2 /* IM_DSP_IRQ3_EINT1 */ -#define WM8285_IM_DSP_IRQ3_EINT1_WIDTH 1 /* IM_DSP_IRQ3_EINT1 */ -#define WM8285_IM_DSP_IRQ2_EINT1 0x0002 /* IM_DSP_IRQ2_EINT1 */ -#define WM8285_IM_DSP_IRQ2_EINT1_MASK 0x0002 /* IM_DSP_IRQ2_EINT1 */ -#define WM8285_IM_DSP_IRQ2_EINT1_SHIFT 1 /* IM_DSP_IRQ2_EINT1 */ -#define WM8285_IM_DSP_IRQ2_EINT1_WIDTH 1 /* IM_DSP_IRQ2_EINT1 */ -#define WM8285_IM_DSP_IRQ1_EINT1 0x0001 /* IM_DSP_IRQ1_EINT1 */ -#define WM8285_IM_DSP_IRQ1_EINT1_MASK 0x0001 /* IM_DSP_IRQ1_EINT1 */ -#define WM8285_IM_DSP_IRQ1_EINT1_SHIFT 0 /* IM_DSP_IRQ1_EINT1 */ -#define WM8285_IM_DSP_IRQ1_EINT1_WIDTH 1 /* IM_DSP_IRQ1_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ16_EINT1 0x8000 /* IM_DSP_IRQ16_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ16_EINT1_MASK 0x8000 /* IM_DSP_IRQ16_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ16_EINT1_SHIFT 15 /* IM_DSP_IRQ16_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ16_EINT1_WIDTH 1 /* IM_DSP_IRQ16_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ15_EINT1 0x4000 /* IM_DSP_IRQ15_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ15_EINT1_MASK 0x4000 /* IM_DSP_IRQ15_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ15_EINT1_SHIFT 14 /* IM_DSP_IRQ15_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ15_EINT1_WIDTH 1 /* IM_DSP_IRQ15_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ14_EINT1 0x2000 /* IM_DSP_IRQ14_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ14_EINT1_MASK 0x2000 /* IM_DSP_IRQ14_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ14_EINT1_SHIFT 13 /* IM_DSP_IRQ14_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ14_EINT1_WIDTH 1 /* IM_DSP_IRQ14_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ13_EINT1 0x1000 /* IM_DSP_IRQ13_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ13_EINT1_MASK 0x1000 /* IM_DSP_IRQ13_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ13_EINT1_SHIFT 12 /* IM_DSP_IRQ13_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ13_EINT1_WIDTH 1 /* IM_DSP_IRQ13_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ12_EINT1 0x0800 /* IM_DSP_IRQ12_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ12_EINT1_MASK 0x0800 /* IM_DSP_IRQ12_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ12_EINT1_SHIFT 11 /* IM_DSP_IRQ12_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ12_EINT1_WIDTH 1 /* IM_DSP_IRQ12_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ11_EINT1 0x0400 /* IM_DSP_IRQ11_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ11_EINT1_MASK 0x0400 /* IM_DSP_IRQ11_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ11_EINT1_SHIFT 10 /* IM_DSP_IRQ11_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ11_EINT1_WIDTH 1 /* IM_DSP_IRQ11_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ10_EINT1 0x0200 /* IM_DSP_IRQ10_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ10_EINT1_MASK 0x0200 /* IM_DSP_IRQ10_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ10_EINT1_SHIFT 9 /* IM_DSP_IRQ10_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ10_EINT1_WIDTH 1 /* IM_DSP_IRQ10_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ9_EINT1 0x0100 /* IM_DSP_IRQ9_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ9_EINT1_MASK 0x0100 /* IM_DSP_IRQ9_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ9_EINT1_SHIFT 8 /* IM_DSP_IRQ9_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ9_EINT1_WIDTH 1 /* IM_DSP_IRQ9_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ8_EINT1 0x0080 /* IM_DSP_IRQ8_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ8_EINT1_MASK 0x0080 /* IM_DSP_IRQ8_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ8_EINT1_SHIFT 7 /* IM_DSP_IRQ8_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ8_EINT1_WIDTH 1 /* IM_DSP_IRQ8_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ7_EINT1 0x0040 /* IM_DSP_IRQ7_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ7_EINT1_MASK 0x0040 /* IM_DSP_IRQ7_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ7_EINT1_SHIFT 6 /* IM_DSP_IRQ7_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ7_EINT1_WIDTH 1 /* IM_DSP_IRQ7_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ6_EINT1 0x0020 /* IM_DSP_IRQ6_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ6_EINT1_MASK 0x0020 /* IM_DSP_IRQ6_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ6_EINT1_SHIFT 5 /* IM_DSP_IRQ6_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ6_EINT1_WIDTH 1 /* IM_DSP_IRQ6_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ5_EINT1 0x0010 /* IM_DSP_IRQ5_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ5_EINT1_MASK 0x0010 /* IM_DSP_IRQ5_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ5_EINT1_SHIFT 4 /* IM_DSP_IRQ5_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ5_EINT1_WIDTH 1 /* IM_DSP_IRQ5_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ4_EINT1 0x0008 /* IM_DSP_IRQ4_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ4_EINT1_MASK 0x0008 /* IM_DSP_IRQ4_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ4_EINT1_SHIFT 3 /* IM_DSP_IRQ4_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ4_EINT1_WIDTH 1 /* IM_DSP_IRQ4_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ3_EINT1 0x0004 /* IM_DSP_IRQ3_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ3_EINT1_MASK 0x0004 /* IM_DSP_IRQ3_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ3_EINT1_SHIFT 2 /* IM_DSP_IRQ3_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ3_EINT1_WIDTH 1 /* IM_DSP_IRQ3_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ2_EINT1 0x0002 /* IM_DSP_IRQ2_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ2_EINT1_MASK 0x0002 /* IM_DSP_IRQ2_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ2_EINT1_SHIFT 1 /* IM_DSP_IRQ2_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ2_EINT1_WIDTH 1 /* IM_DSP_IRQ2_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ1_EINT1 0x0001 /* IM_DSP_IRQ1_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ1_EINT1_MASK 0x0001 /* IM_DSP_IRQ1_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ1_EINT1_SHIFT 0 /* IM_DSP_IRQ1_EINT1 */ +#define CLEARWATER_IM_DSP_IRQ1_EINT1_WIDTH 1 /* IM_DSP_IRQ1_EINT1 */ /* * R6219 (0x184B) - IRQ1 Mask 12 */ -#define WM8285_IM_SPKOUTR_SC_EINT1 0x0080 /* IM_SPKOUTR_SC_EINT1 */ -#define WM8285_IM_SPKOUTR_SC_EINT1_MASK 0x0080 /* IM_SPKOUTR_SC_EINT1 */ -#define WM8285_IM_SPKOUTR_SC_EINT1_SHIFT 7 /* IM_SPKOUTR_SC_EINT1 */ -#define WM8285_IM_SPKOUTR_SC_EINT1_WIDTH 1 /* IM_SPKOUTR_SC_EINT1 */ -#define WM8285_IM_SPKOUTL_SC_EINT1 0x0040 /* IM_SPKOUTL_SC_EINT1 */ -#define WM8285_IM_SPKOUTL_SC_EINT1_MASK 0x0040 /* IM_SPKOUTL_SC_EINT1 */ -#define WM8285_IM_SPKOUTL_SC_EINT1_SHIFT 6 /* IM_SPKOUTL_SC_EINT1 */ -#define WM8285_IM_SPKOUTL_SC_EINT1_WIDTH 1 /* IM_SPKOUTL_SC_EINT1 */ -#define WM8285_IM_HP3R_SC_EINT1 0x0020 /* IM_HP3R_SC_EINT1 */ -#define WM8285_IM_HP3R_SC_EINT1_MASK 0x0020 /* IM_HP3R_SC_EINT1 */ -#define WM8285_IM_HP3R_SC_EINT1_SHIFT 5 /* IM_HP3R_SC_EINT1 */ -#define WM8285_IM_HP3R_SC_EINT1_WIDTH 1 /* IM_HP3R_SC_EINT1 */ -#define WM8285_IM_HP3L_SC_EINT1 0x0010 /* IM_HP3L_SC_EINT1 */ -#define WM8285_IM_HP3L_SC_EINT1_MASK 0x0010 /* IM_HP3L_SC_EINT1 */ -#define WM8285_IM_HP3L_SC_EINT1_SHIFT 4 /* IM_HP3L_SC_EINT1 */ -#define WM8285_IM_HP3L_SC_EINT1_WIDTH 1 /* IM_HP3L_SC_EINT1 */ -#define WM8285_IM_HP2R_SC_EINT1 0x0008 /* IM_HP2R_SC_EINT1 */ -#define WM8285_IM_HP2R_SC_EINT1_MASK 0x0008 /* IM_HP2R_SC_EINT1 */ -#define WM8285_IM_HP2R_SC_EINT1_SHIFT 3 /* IM_HP2R_SC_EINT1 */ -#define WM8285_IM_HP2R_SC_EINT1_WIDTH 1 /* IM_HP2R_SC_EINT1 */ -#define WM8285_IM_HP2L_SC_EINT1 0x0004 /* IM_HP2L_SC_EINT1 */ -#define WM8285_IM_HP2L_SC_EINT1_MASK 0x0004 /* IM_HP2L_SC_EINT1 */ -#define WM8285_IM_HP2L_SC_EINT1_SHIFT 2 /* IM_HP2L_SC_EINT1 */ -#define WM8285_IM_HP2L_SC_EINT1_WIDTH 1 /* IM_HP2L_SC_EINT1 */ -#define WM8285_IM_HP1R_SC_EINT1 0x0002 /* IM_HP1R_SC_EINT1 */ -#define WM8285_IM_HP1R_SC_EINT1_MASK 0x0002 /* IM_HP1R_SC_EINT1 */ -#define WM8285_IM_HP1R_SC_EINT1_SHIFT 1 /* IM_HP1R_SC_EINT1 */ -#define WM8285_IM_HP1R_SC_EINT1_WIDTH 1 /* IM_HP1R_SC_EINT1 */ -#define WM8285_IM_HP1L_SC_EINT1 0x0001 /* IM_HP1L_SC_EINT1 */ -#define WM8285_IM_HP1L_SC_EINT1_MASK 0x0001 /* IM_HP1L_SC_EINT1 */ -#define WM8285_IM_HP1L_SC_EINT1_SHIFT 0 /* IM_HP1L_SC_EINT1 */ -#define WM8285_IM_HP1L_SC_EINT1_WIDTH 1 /* IM_HP1L_SC_EINT1 */ +#define CLEARWATER_IM_SPKOUTR_SC_EINT1 0x0080 /* IM_SPKOUTR_SC_EINT1 */ +#define CLEARWATER_IM_SPKOUTR_SC_EINT1_MASK 0x0080 /* IM_SPKOUTR_SC_EINT1 */ +#define CLEARWATER_IM_SPKOUTR_SC_EINT1_SHIFT 7 /* IM_SPKOUTR_SC_EINT1 */ +#define CLEARWATER_IM_SPKOUTR_SC_EINT1_WIDTH 1 /* IM_SPKOUTR_SC_EINT1 */ +#define CLEARWATER_IM_SPKOUTL_SC_EINT1 0x0040 /* IM_SPKOUTL_SC_EINT1 */ +#define CLEARWATER_IM_SPKOUTL_SC_EINT1_MASK 0x0040 /* IM_SPKOUTL_SC_EINT1 */ +#define CLEARWATER_IM_SPKOUTL_SC_EINT1_SHIFT 6 /* IM_SPKOUTL_SC_EINT1 */ +#define CLEARWATER_IM_SPKOUTL_SC_EINT1_WIDTH 1 /* IM_SPKOUTL_SC_EINT1 */ +#define CLEARWATER_IM_HP3R_SC_EINT1 0x0020 /* IM_HP3R_SC_EINT1 */ +#define CLEARWATER_IM_HP3R_SC_EINT1_MASK 0x0020 /* IM_HP3R_SC_EINT1 */ +#define CLEARWATER_IM_HP3R_SC_EINT1_SHIFT 5 /* IM_HP3R_SC_EINT1 */ +#define CLEARWATER_IM_HP3R_SC_EINT1_WIDTH 1 /* IM_HP3R_SC_EINT1 */ +#define CLEARWATER_IM_HP3L_SC_EINT1 0x0010 /* IM_HP3L_SC_EINT1 */ +#define CLEARWATER_IM_HP3L_SC_EINT1_MASK 0x0010 /* IM_HP3L_SC_EINT1 */ +#define CLEARWATER_IM_HP3L_SC_EINT1_SHIFT 4 /* IM_HP3L_SC_EINT1 */ +#define CLEARWATER_IM_HP3L_SC_EINT1_WIDTH 1 /* IM_HP3L_SC_EINT1 */ +#define CLEARWATER_IM_HP2R_SC_EINT1 0x0008 /* IM_HP2R_SC_EINT1 */ +#define CLEARWATER_IM_HP2R_SC_EINT1_MASK 0x0008 /* IM_HP2R_SC_EINT1 */ +#define CLEARWATER_IM_HP2R_SC_EINT1_SHIFT 3 /* IM_HP2R_SC_EINT1 */ +#define CLEARWATER_IM_HP2R_SC_EINT1_WIDTH 1 /* IM_HP2R_SC_EINT1 */ +#define CLEARWATER_IM_HP2L_SC_EINT1 0x0004 /* IM_HP2L_SC_EINT1 */ +#define CLEARWATER_IM_HP2L_SC_EINT1_MASK 0x0004 /* IM_HP2L_SC_EINT1 */ +#define CLEARWATER_IM_HP2L_SC_EINT1_SHIFT 2 /* IM_HP2L_SC_EINT1 */ +#define CLEARWATER_IM_HP2L_SC_EINT1_WIDTH 1 /* IM_HP2L_SC_EINT1 */ +#define CLEARWATER_IM_HP1R_SC_EINT1 0x0002 /* IM_HP1R_SC_EINT1 */ +#define CLEARWATER_IM_HP1R_SC_EINT1_MASK 0x0002 /* IM_HP1R_SC_EINT1 */ +#define CLEARWATER_IM_HP1R_SC_EINT1_SHIFT 1 /* IM_HP1R_SC_EINT1 */ +#define CLEARWATER_IM_HP1R_SC_EINT1_WIDTH 1 /* IM_HP1R_SC_EINT1 */ +#define CLEARWATER_IM_HP1L_SC_EINT1 0x0001 /* IM_HP1L_SC_EINT1 */ +#define CLEARWATER_IM_HP1L_SC_EINT1_MASK 0x0001 /* IM_HP1L_SC_EINT1 */ +#define CLEARWATER_IM_HP1L_SC_EINT1_SHIFT 0 /* IM_HP1L_SC_EINT1 */ +#define CLEARWATER_IM_HP1L_SC_EINT1_WIDTH 1 /* IM_HP1L_SC_EINT1 */ /* * R6220 (0x184C) - IRQ1 Mask 13 */ -#define WM8285_IM_SPKOUTR_ENABLE_DONE_EINT1 0x0080 /* IM_SPKOUTR_ENABLE_DONE_EINT1 */ -#define WM8285_IM_SPKOUTR_ENABLE_DONE_EINT1_MASK 0x0080 /* IM_SPKOUTR_ENABLE_DONE_EINT1 */ -#define WM8285_IM_SPKOUTR_ENABLE_DONE_EINT1_SHIFT 7 /* IM_SPKOUTR_ENABLE_DONE_EINT1 */ -#define WM8285_IM_SPKOUTR_ENABLE_DONE_EINT1_WIDTH 1 /* IM_SPKOUTR_ENABLE_DONE_EINT1 */ -#define WM8285_IM_SPKOUTL_ENABLE_DONE_EINT1 0x0040 /* IM_SPKOUTL_ENABLE_DONE_EINT1 */ -#define WM8285_IM_SPKOUTL_ENABLE_DONE_EINT1_MASK 0x0040 /* IM_SPKOUTL_ENABLE_DONE_EINT1 */ -#define WM8285_IM_SPKOUTL_ENABLE_DONE_EINT1_SHIFT 6 /* IM_SPKOUTL_ENABLE_DONE_EINT1 */ -#define WM8285_IM_SPKOUTL_ENABLE_DONE_EINT1_WIDTH 1 /* IM_SPKOUTL_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP3R_ENABLE_DONE_EINT1 0x0020 /* IM_HP3R_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP3R_ENABLE_DONE_EINT1_MASK 0x0020 /* IM_HP3R_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP3R_ENABLE_DONE_EINT1_SHIFT 5 /* IM_HP3R_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP3R_ENABLE_DONE_EINT1_WIDTH 1 /* IM_HP3R_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP3L_ENABLE_DONE_EINT1 0x0010 /* IM_HP3L_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP3L_ENABLE_DONE_EINT1_MASK 0x0010 /* IM_HP3L_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP3L_ENABLE_DONE_EINT1_SHIFT 4 /* IM_HP3L_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP3L_ENABLE_DONE_EINT1_WIDTH 1 /* IM_HP3L_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP2R_ENABLE_DONE_EINT1 0x0008 /* IM_HP2R_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP2R_ENABLE_DONE_EINT1_MASK 0x0008 /* IM_HP2R_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP2R_ENABLE_DONE_EINT1_SHIFT 3 /* IM_HP2R_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP2R_ENABLE_DONE_EINT1_WIDTH 1 /* IM_HP2R_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP2L_ENABLE_DONE_EINT1 0x0004 /* IM_HP2L_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP2L_ENABLE_DONE_EINT1_MASK 0x0004 /* IM_HP2L_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP2L_ENABLE_DONE_EINT1_SHIFT 2 /* IM_HP2L_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP2L_ENABLE_DONE_EINT1_WIDTH 1 /* IM_HP2L_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP1R_ENABLE_DONE_EINT1 0x0002 /* IM_HP1R_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP1R_ENABLE_DONE_EINT1_MASK 0x0002 /* IM_HP1R_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP1R_ENABLE_DONE_EINT1_SHIFT 1 /* IM_HP1R_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP1R_ENABLE_DONE_EINT1_WIDTH 1 /* IM_HP1R_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP1L_ENABLE_DONE_EINT1 0x0001 /* IM_HP1L_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP1L_ENABLE_DONE_EINT1_MASK 0x0001 /* IM_HP1L_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP1L_ENABLE_DONE_EINT1_SHIFT 0 /* IM_HP1L_ENABLE_DONE_EINT1 */ -#define WM8285_IM_HP1L_ENABLE_DONE_EINT1_WIDTH 1 /* IM_HP1L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_SPKOUTR_ENABLE_DONE_EINT1 0x0080 /* IM_SPKOUTR_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_SPKOUTR_ENABLE_DONE_EINT1_MASK 0x0080 /* IM_SPKOUTR_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_SPKOUTR_ENABLE_DONE_EINT1_SHIFT 7 /* IM_SPKOUTR_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_SPKOUTR_ENABLE_DONE_EINT1_WIDTH 1 /* IM_SPKOUTR_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_SPKOUTL_ENABLE_DONE_EINT1 0x0040 /* IM_SPKOUTL_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_SPKOUTL_ENABLE_DONE_EINT1_MASK 0x0040 /* IM_SPKOUTL_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_SPKOUTL_ENABLE_DONE_EINT1_SHIFT 6 /* IM_SPKOUTL_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_SPKOUTL_ENABLE_DONE_EINT1_WIDTH 1 /* IM_SPKOUTL_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP3R_ENABLE_DONE_EINT1 0x0020 /* IM_HP3R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP3R_ENABLE_DONE_EINT1_MASK 0x0020 /* IM_HP3R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP3R_ENABLE_DONE_EINT1_SHIFT 5 /* IM_HP3R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP3R_ENABLE_DONE_EINT1_WIDTH 1 /* IM_HP3R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP3L_ENABLE_DONE_EINT1 0x0010 /* IM_HP3L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP3L_ENABLE_DONE_EINT1_MASK 0x0010 /* IM_HP3L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP3L_ENABLE_DONE_EINT1_SHIFT 4 /* IM_HP3L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP3L_ENABLE_DONE_EINT1_WIDTH 1 /* IM_HP3L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP2R_ENABLE_DONE_EINT1 0x0008 /* IM_HP2R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP2R_ENABLE_DONE_EINT1_MASK 0x0008 /* IM_HP2R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP2R_ENABLE_DONE_EINT1_SHIFT 3 /* IM_HP2R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP2R_ENABLE_DONE_EINT1_WIDTH 1 /* IM_HP2R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP2L_ENABLE_DONE_EINT1 0x0004 /* IM_HP2L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP2L_ENABLE_DONE_EINT1_MASK 0x0004 /* IM_HP2L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP2L_ENABLE_DONE_EINT1_SHIFT 2 /* IM_HP2L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP2L_ENABLE_DONE_EINT1_WIDTH 1 /* IM_HP2L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP1R_ENABLE_DONE_EINT1 0x0002 /* IM_HP1R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP1R_ENABLE_DONE_EINT1_MASK 0x0002 /* IM_HP1R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP1R_ENABLE_DONE_EINT1_SHIFT 1 /* IM_HP1R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP1R_ENABLE_DONE_EINT1_WIDTH 1 /* IM_HP1R_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP1L_ENABLE_DONE_EINT1 0x0001 /* IM_HP1L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP1L_ENABLE_DONE_EINT1_MASK 0x0001 /* IM_HP1L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP1L_ENABLE_DONE_EINT1_SHIFT 0 /* IM_HP1L_ENABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP1L_ENABLE_DONE_EINT1_WIDTH 1 /* IM_HP1L_ENABLE_DONE_EINT1 */ /* * R6221 (0x184D) - IRQ1 Mask 14 */ -#define WM8285_IM_SPKOUTR_DISABLE_DONE_EINT1 0x0080 /* IM_SPKOUTR_DISABLE_DONE_EINT1 */ -#define WM8285_IM_SPKOUTR_DISABLE_DONE_EINT1_MASK 0x0080 /* IM_SPKOUTR_DISABLE_DONE_EINT1 */ -#define WM8285_IM_SPKOUTR_DISABLE_DONE_EINT1_SHIFT 7 /* IM_SPKOUTR_DISABLE_DONE_EINT1 */ -#define WM8285_IM_SPKOUTR_DISABLE_DONE_EINT1_WIDTH 1 /* IM_SPKOUTR_DISABLE_DONE_EINT1 */ -#define WM8285_IM_SPKOUTL_DISABLE_DONE_EINT1 0x0040 /* IM_SPKOUTL_DISABLE_DONE_EINT1 */ -#define WM8285_IM_SPKOUTL_DISABLE_DONE_EINT1_MASK 0x0040 /* IM_SPKOUTL_DISABLE_DONE_EINT1 */ -#define WM8285_IM_SPKOUTL_DISABLE_DONE_EINT1_SHIFT 6 /* IM_SPKOUTL_DISABLE_DONE_EINT1 */ -#define WM8285_IM_SPKOUTL_DISABLE_DONE_EINT1_WIDTH 1 /* IM_SPKOUTL_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP3R_DISABLE_DONE_EINT1 0x0020 /* IM_HP3R_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP3R_DISABLE_DONE_EINT1_MASK 0x0020 /* IM_HP3R_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP3R_DISABLE_DONE_EINT1_SHIFT 5 /* IM_HP3R_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP3R_DISABLE_DONE_EINT1_WIDTH 1 /* IM_HP3R_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP3L_DISABLE_DONE_EINT1 0x0010 /* IM_HP3L_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP3L_DISABLE_DONE_EINT1_MASK 0x0010 /* IM_HP3L_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP3L_DISABLE_DONE_EINT1_SHIFT 4 /* IM_HP3L_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP3L_DISABLE_DONE_EINT1_WIDTH 1 /* IM_HP3L_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP2R_DISABLE_DONE_EINT1 0x0008 /* IM_HP2R_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP2R_DISABLE_DONE_EINT1_MASK 0x0008 /* IM_HP2R_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP2R_DISABLE_DONE_EINT1_SHIFT 3 /* IM_HP2R_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP2R_DISABLE_DONE_EINT1_WIDTH 1 /* IM_HP2R_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP2L_DISABLE_DONE_EINT1 0x0004 /* IM_HP2L_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP2L_DISABLE_DONE_EINT1_MASK 0x0004 /* IM_HP2L_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP2L_DISABLE_DONE_EINT1_SHIFT 2 /* IM_HP2L_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP2L_DISABLE_DONE_EINT1_WIDTH 1 /* IM_HP2L_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP1R_DISABLE_DONE_EINT1 0x0002 /* IM_HP1R_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP1R_DISABLE_DONE_EINT1_MASK 0x0002 /* IM_HP1R_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP1R_DISABLE_DONE_EINT1_SHIFT 1 /* IM_HP1R_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP1R_DISABLE_DONE_EINT1_WIDTH 1 /* IM_HP1R_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP1L_DISABLE_DONE_EINT1 0x0001 /* IM_HP1L_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP1L_DISABLE_DONE_EINT1_MASK 0x0001 /* IM_HP1L_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP1L_DISABLE_DONE_EINT1_SHIFT 0 /* IM_HP1L_DISABLE_DONE_EINT1 */ -#define WM8285_IM_HP1L_DISABLE_DONE_EINT1_WIDTH 1 /* IM_HP1L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_SPKOUTR_DISABLE_DONE_EINT1 0x0080 /* IM_SPKOUTR_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_SPKOUTR_DISABLE_DONE_EINT1_MASK 0x0080 /* IM_SPKOUTR_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_SPKOUTR_DISABLE_DONE_EINT1_SHIFT 7 /* IM_SPKOUTR_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_SPKOUTR_DISABLE_DONE_EINT1_WIDTH 1 /* IM_SPKOUTR_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_SPKOUTL_DISABLE_DONE_EINT1 0x0040 /* IM_SPKOUTL_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_SPKOUTL_DISABLE_DONE_EINT1_MASK 0x0040 /* IM_SPKOUTL_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_SPKOUTL_DISABLE_DONE_EINT1_SHIFT 6 /* IM_SPKOUTL_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_SPKOUTL_DISABLE_DONE_EINT1_WIDTH 1 /* IM_SPKOUTL_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP3R_DISABLE_DONE_EINT1 0x0020 /* IM_HP3R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP3R_DISABLE_DONE_EINT1_MASK 0x0020 /* IM_HP3R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP3R_DISABLE_DONE_EINT1_SHIFT 5 /* IM_HP3R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP3R_DISABLE_DONE_EINT1_WIDTH 1 /* IM_HP3R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP3L_DISABLE_DONE_EINT1 0x0010 /* IM_HP3L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP3L_DISABLE_DONE_EINT1_MASK 0x0010 /* IM_HP3L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP3L_DISABLE_DONE_EINT1_SHIFT 4 /* IM_HP3L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP3L_DISABLE_DONE_EINT1_WIDTH 1 /* IM_HP3L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP2R_DISABLE_DONE_EINT1 0x0008 /* IM_HP2R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP2R_DISABLE_DONE_EINT1_MASK 0x0008 /* IM_HP2R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP2R_DISABLE_DONE_EINT1_SHIFT 3 /* IM_HP2R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP2R_DISABLE_DONE_EINT1_WIDTH 1 /* IM_HP2R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP2L_DISABLE_DONE_EINT1 0x0004 /* IM_HP2L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP2L_DISABLE_DONE_EINT1_MASK 0x0004 /* IM_HP2L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP2L_DISABLE_DONE_EINT1_SHIFT 2 /* IM_HP2L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP2L_DISABLE_DONE_EINT1_WIDTH 1 /* IM_HP2L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP1R_DISABLE_DONE_EINT1 0x0002 /* IM_HP1R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP1R_DISABLE_DONE_EINT1_MASK 0x0002 /* IM_HP1R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP1R_DISABLE_DONE_EINT1_SHIFT 1 /* IM_HP1R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP1R_DISABLE_DONE_EINT1_WIDTH 1 /* IM_HP1R_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP1L_DISABLE_DONE_EINT1 0x0001 /* IM_HP1L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP1L_DISABLE_DONE_EINT1_MASK 0x0001 /* IM_HP1L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP1L_DISABLE_DONE_EINT1_SHIFT 0 /* IM_HP1L_DISABLE_DONE_EINT1 */ +#define CLEARWATER_IM_HP1L_DISABLE_DONE_EINT1_WIDTH 1 /* IM_HP1L_DISABLE_DONE_EINT1 */ /* * R6222 (0x184E) - IRQ1 Mask 15 */ -#define WM8285_IM_SPK_OVERHEAT_WARN_EINT1 0x0004 /* IM_SPK_OVERHEAT_WARN_EINT1 */ -#define WM8285_IM_SPK_OVERHEAT_WARN_EINT1_MASK 0x0004 /* IM_SPK_OVERHEAT_WARN_EINT1 */ -#define WM8285_IM_SPK_OVERHEAT_WARN_EINT1_SHIFT 2 /* IM_SPK_OVERHEAT_WARN_EINT1 */ -#define WM8285_IM_SPK_OVERHEAT_WARN_EINT1_WIDTH 1 /* IM_SPK_OVERHEAT_WARN_EINT1 */ -#define WM8285_IM_SPK_OVERHEAT_EINT1 0x0002 /* IM_SPK_OVERHEAT_EINT1 */ -#define WM8285_IM_SPK_OVERHEAT_EINT1_MASK 0x0002 /* IM_SPK_OVERHEAT_EINT1 */ -#define WM8285_IM_SPK_OVERHEAT_EINT1_SHIFT 1 /* IM_SPK_OVERHEAT_EINT1 */ -#define WM8285_IM_SPK_OVERHEAT_EINT1_WIDTH 1 /* IM_SPK_OVERHEAT_EINT1 */ -#define WM8285_IM_SPK_SHUTDOWN_EINT1 0x0001 /* IM_SPK_SHUTDOWN_EINT1 */ -#define WM8285_IM_SPK_SHUTDOWN_EINT1_MASK 0x0001 /* IM_SPK_SHUTDOWN_EINT1 */ -#define WM8285_IM_SPK_SHUTDOWN_EINT1_SHIFT 0 /* IM_SPK_SHUTDOWN_EINT1 */ -#define WM8285_IM_SPK_SHUTDOWN_EINT1_WIDTH 1 /* IM_SPK_SHUTDOWN_EINT1 */ +#define CLEARWATER_IM_SPK_OVERHEAT_WARN_EINT1 0x0004 /* IM_SPK_OVERHEAT_WARN_EINT1 */ +#define CLEARWATER_IM_SPK_OVERHEAT_WARN_EINT1_MASK 0x0004 /* IM_SPK_OVERHEAT_WARN_EINT1 */ +#define CLEARWATER_IM_SPK_OVERHEAT_WARN_EINT1_SHIFT 2 /* IM_SPK_OVERHEAT_WARN_EINT1 */ +#define CLEARWATER_IM_SPK_OVERHEAT_WARN_EINT1_WIDTH 1 /* IM_SPK_OVERHEAT_WARN_EINT1 */ +#define CLEARWATER_IM_SPK_OVERHEAT_EINT1 0x0002 /* IM_SPK_OVERHEAT_EINT1 */ +#define CLEARWATER_IM_SPK_OVERHEAT_EINT1_MASK 0x0002 /* IM_SPK_OVERHEAT_EINT1 */ +#define CLEARWATER_IM_SPK_OVERHEAT_EINT1_SHIFT 1 /* IM_SPK_OVERHEAT_EINT1 */ +#define CLEARWATER_IM_SPK_OVERHEAT_EINT1_WIDTH 1 /* IM_SPK_OVERHEAT_EINT1 */ +#define CLEARWATER_IM_SPK_SHUTDOWN_EINT1 0x0001 /* IM_SPK_SHUTDOWN_EINT1 */ +#define CLEARWATER_IM_SPK_SHUTDOWN_EINT1_MASK 0x0001 /* IM_SPK_SHUTDOWN_EINT1 */ +#define CLEARWATER_IM_SPK_SHUTDOWN_EINT1_SHIFT 0 /* IM_SPK_SHUTDOWN_EINT1 */ +#define CLEARWATER_IM_SPK_SHUTDOWN_EINT1_WIDTH 1 /* IM_SPK_SHUTDOWN_EINT1 */ /* * R6400 (0x1900) - IRQ2 Status 1 */ -#define WM8285_DSP_SHARED_WR_COLL_EINT2 0x8000 /* DSP_SHARED_WR_COLL_EINT2 */ -#define WM8285_DSP_SHARED_WR_COLL_EINT2_MASK 0x8000 /* DSP_SHARED_WR_COLL_EINT2 */ -#define WM8285_DSP_SHARED_WR_COLL_EINT2_SHIFT 15 /* DSP_SHARED_WR_COLL_EINT2 */ -#define WM8285_DSP_SHARED_WR_COLL_EINT2_WIDTH 1 /* DSP_SHARED_WR_COLL_EINT2 */ -#define WM8285_CTRLIF_ERR_EINT2 0x1000 /* CTRLIF_ERR_EINT2 */ -#define WM8285_CTRLIF_ERR_EINT2_MASK 0x1000 /* CTRLIF_ERR_EINT2 */ -#define WM8285_CTRLIF_ERR_EINT2_SHIFT 12 /* CTRLIF_ERR_EINT2 */ -#define WM8285_CTRLIF_ERR_EINT2_WIDTH 1 /* CTRLIF_ERR_EINT2 */ -#define WM8285_IRQ_NO_CLOCK_EINT2 0x0200 /* IRQ_NO_CLOCK_EINT2 */ -#define WM8285_IRQ_NO_CLOCK_EINT2_MASK 0x0200 /* IRQ_NO_CLOCK_EINT2 */ -#define WM8285_IRQ_NO_CLOCK_EINT2_SHIFT 9 /* IRQ_NO_CLOCK_EINT2 */ -#define WM8285_IRQ_NO_CLOCK_EINT2_WIDTH 1 /* IRQ_NO_CLOCK_EINT2 */ -#define WM8285_CLOCK_DETECT_EINT2 0x0100 /* CLOCK_DETECT_EINT2 */ -#define WM8285_CLOCK_DETECT_EINT2_MASK 0x0100 /* CLOCK_DETECT_EINT2 */ -#define WM8285_CLOCK_DETECT_EINT2_SHIFT 8 /* CLOCK_DETECT_EINT2 */ -#define WM8285_CLOCK_DETECT_EINT2_WIDTH 1 /* CLOCK_DETECT_EINT2 */ -#define WM8285_BOOT_DONE_EINT2 0x0080 /* BOOT_DONE_EINT2 */ -#define WM8285_BOOT_DONE_EINT2_MASK 0x0080 /* BOOT_DONE_EINT2 */ -#define WM8285_BOOT_DONE_EINT2_SHIFT 7 /* BOOT_DONE_EINT2 */ -#define WM8285_BOOT_DONE_EINT2_WIDTH 1 /* BOOT_DONE_EINT2 */ +#define CLEARWATER_DSP_SHARED_WR_COLL_EINT2 0x8000 /* DSP_SHARED_WR_COLL_EINT2 */ +#define CLEARWATER_DSP_SHARED_WR_COLL_EINT2_MASK 0x8000 /* DSP_SHARED_WR_COLL_EINT2 */ +#define CLEARWATER_DSP_SHARED_WR_COLL_EINT2_SHIFT 15 /* DSP_SHARED_WR_COLL_EINT2 */ +#define CLEARWATER_DSP_SHARED_WR_COLL_EINT2_WIDTH 1 /* DSP_SHARED_WR_COLL_EINT2 */ +#define CLEARWATER_CTRLIF_ERR_EINT2 0x1000 /* CTRLIF_ERR_EINT2 */ +#define CLEARWATER_CTRLIF_ERR_EINT2_MASK 0x1000 /* CTRLIF_ERR_EINT2 */ +#define CLEARWATER_CTRLIF_ERR_EINT2_SHIFT 12 /* CTRLIF_ERR_EINT2 */ +#define CLEARWATER_CTRLIF_ERR_EINT2_WIDTH 1 /* CTRLIF_ERR_EINT2 */ +#define CLEARWATER_IRQ_NO_CLOCK_EINT2 0x0200 /* IRQ_NO_CLOCK_EINT2 */ +#define CLEARWATER_IRQ_NO_CLOCK_EINT2_MASK 0x0200 /* IRQ_NO_CLOCK_EINT2 */ +#define CLEARWATER_IRQ_NO_CLOCK_EINT2_SHIFT 9 /* IRQ_NO_CLOCK_EINT2 */ +#define CLEARWATER_IRQ_NO_CLOCK_EINT2_WIDTH 1 /* IRQ_NO_CLOCK_EINT2 */ +#define CLEARWATER_CLOCK_DETECT_EINT2 0x0100 /* CLOCK_DETECT_EINT2 */ +#define CLEARWATER_CLOCK_DETECT_EINT2_MASK 0x0100 /* CLOCK_DETECT_EINT2 */ +#define CLEARWATER_CLOCK_DETECT_EINT2_SHIFT 8 /* CLOCK_DETECT_EINT2 */ +#define CLEARWATER_CLOCK_DETECT_EINT2_WIDTH 1 /* CLOCK_DETECT_EINT2 */ +#define CLEARWATER_BOOT_DONE_EINT2 0x0080 /* BOOT_DONE_EINT2 */ +#define CLEARWATER_BOOT_DONE_EINT2_MASK 0x0080 /* BOOT_DONE_EINT2 */ +#define CLEARWATER_BOOT_DONE_EINT2_SHIFT 7 /* BOOT_DONE_EINT2 */ +#define CLEARWATER_BOOT_DONE_EINT2_WIDTH 1 /* BOOT_DONE_EINT2 */ /* * R6401 (0x1901) - IRQ2 Status 2 */ -#define WM8285_FLL3_LOCK_EINT2 0x0400 /* FLL3_LOCK_EINT2 */ -#define WM8285_FLL3_LOCK_EINT2_MASK 0x0400 /* FLL3_LOCK_EINT2 */ -#define WM8285_FLL3_LOCK_EINT2_SHIFT 10 /* FLL3_LOCK_EINT2 */ -#define WM8285_FLL3_LOCK_EINT2_WIDTH 1 /* FLL3_LOCK_EINT2 */ -#define WM8285_FLL2_LOCK_EINT2 0x0200 /* FLL2_LOCK_EINT2 */ -#define WM8285_FLL2_LOCK_EINT2_MASK 0x0200 /* FLL2_LOCK_EINT2 */ -#define WM8285_FLL2_LOCK_EINT2_SHIFT 9 /* FLL2_LOCK_EINT2 */ -#define WM8285_FLL2_LOCK_EINT2_WIDTH 1 /* FLL2_LOCK_EINT2 */ -#define WM8285_FLL1_LOCK_EINT2 0x0100 /* FLL1_LOCK_EINT2 */ -#define WM8285_FLL1_LOCK_EINT2_MASK 0x0100 /* FLL1_LOCK_EINT2 */ -#define WM8285_FLL1_LOCK_EINT2_SHIFT 8 /* FLL1_LOCK_EINT2 */ -#define WM8285_FLL1_LOCK_EINT2_WIDTH 1 /* FLL1_LOCK_EINT2 */ +#define CLEARWATER_FLL3_LOCK_EINT2 0x0400 /* FLL3_LOCK_EINT2 */ +#define CLEARWATER_FLL3_LOCK_EINT2_MASK 0x0400 /* FLL3_LOCK_EINT2 */ +#define CLEARWATER_FLL3_LOCK_EINT2_SHIFT 10 /* FLL3_LOCK_EINT2 */ +#define CLEARWATER_FLL3_LOCK_EINT2_WIDTH 1 /* FLL3_LOCK_EINT2 */ +#define CLEARWATER_FLL2_LOCK_EINT2 0x0200 /* FLL2_LOCK_EINT2 */ +#define CLEARWATER_FLL2_LOCK_EINT2_MASK 0x0200 /* FLL2_LOCK_EINT2 */ +#define CLEARWATER_FLL2_LOCK_EINT2_SHIFT 9 /* FLL2_LOCK_EINT2 */ +#define CLEARWATER_FLL2_LOCK_EINT2_WIDTH 1 /* FLL2_LOCK_EINT2 */ +#define CLEARWATER_FLL1_LOCK_EINT2 0x0100 /* FLL1_LOCK_EINT2 */ +#define CLEARWATER_FLL1_LOCK_EINT2_MASK 0x0100 /* FLL1_LOCK_EINT2 */ +#define CLEARWATER_FLL1_LOCK_EINT2_SHIFT 8 /* FLL1_LOCK_EINT2 */ +#define CLEARWATER_FLL1_LOCK_EINT2_WIDTH 1 /* FLL1_LOCK_EINT2 */ /* * R6405 (0x1905) - IRQ2 Status 6 */ -#define WM8285_MICDET_EINT2 0x0100 /* MICDET_EINT2 */ -#define WM8285_MICDET_EINT2_MASK 0x0100 /* MICDET_EINT2 */ -#define WM8285_MICDET_EINT2_SHIFT 8 /* MICDET_EINT2 */ -#define WM8285_MICDET_EINT2_WIDTH 1 /* MICDET_EINT2 */ -#define WM8285_HPDET_EINT2 0x0001 /* HPDET_EINT2 */ -#define WM8285_HPDET_EINT2_MASK 0x0001 /* HPDET_EINT2 */ -#define WM8285_HPDET_EINT2_SHIFT 0 /* HPDET_EINT2 */ -#define WM8285_HPDET_EINT2_WIDTH 1 /* HPDET_EINT2 */ +#define CLEARWATER_MICDET_EINT2 0x0100 /* MICDET_EINT2 */ +#define CLEARWATER_MICDET_EINT2_MASK 0x0100 /* MICDET_EINT2 */ +#define CLEARWATER_MICDET_EINT2_SHIFT 8 /* MICDET_EINT2 */ +#define CLEARWATER_MICDET_EINT2_WIDTH 1 /* MICDET_EINT2 */ +#define CLEARWATER_HPDET_EINT2 0x0001 /* HPDET_EINT2 */ +#define CLEARWATER_HPDET_EINT2_MASK 0x0001 /* HPDET_EINT2 */ +#define CLEARWATER_HPDET_EINT2_SHIFT 0 /* HPDET_EINT2 */ +#define CLEARWATER_HPDET_EINT2_WIDTH 1 /* HPDET_EINT2 */ /* * R6406 (0x1906) - IRQ2 Status 7 */ -#define WM8285_MICD_CLAMP_FALL_EINT2 0x0020 /* MICD_CLAMP_FALL_EINT2 */ -#define WM8285_MICD_CLAMP_FALL_EINT2_MASK 0x0020 /* MICD_CLAMP_FALL_EINT2 */ -#define WM8285_MICD_CLAMP_FALL_EINT2_SHIFT 5 /* MICD_CLAMP_FALL_EINT2 */ -#define WM8285_MICD_CLAMP_FALL_EINT2_WIDTH 1 /* MICD_CLAMP_FALL_EINT2 */ -#define WM8285_MICD_CLAMP_RISE_EINT2 0x0010 /* MICD_CLAMP_RISE_EINT2 */ -#define WM8285_MICD_CLAMP_RISE_EINT2_MASK 0x0010 /* MICD_CLAMP_RISE_EINT2 */ -#define WM8285_MICD_CLAMP_RISE_EINT2_SHIFT 4 /* MICD_CLAMP_RISE_EINT2 */ -#define WM8285_MICD_CLAMP_RISE_EINT2_WIDTH 1 /* MICD_CLAMP_RISE_EINT2 */ -#define WM8285_JD2_FALL_EINT2 0x0008 /* JD2_FALL_EINT2 */ -#define WM8285_JD2_FALL_EINT2_MASK 0x0008 /* JD2_FALL_EINT2 */ -#define WM8285_JD2_FALL_EINT2_SHIFT 3 /* JD2_FALL_EINT2 */ -#define WM8285_JD2_FALL_EINT2_WIDTH 1 /* JD2_FALL_EINT2 */ -#define WM8285_JD2_RISE_EINT2 0x0004 /* JD2_RISE_EINT2 */ -#define WM8285_JD2_RISE_EINT2_MASK 0x0004 /* JD2_RISE_EINT2 */ -#define WM8285_JD2_RISE_EINT2_SHIFT 2 /* JD2_RISE_EINT2 */ -#define WM8285_JD2_RISE_EINT2_WIDTH 1 /* JD2_RISE_EINT2 */ -#define WM8285_JD1_FALL_EINT2 0x0002 /* JD1_FALL_EINT2 */ -#define WM8285_JD1_FALL_EINT2_MASK 0x0002 /* JD1_FALL_EINT2 */ -#define WM8285_JD1_FALL_EINT2_SHIFT 1 /* JD1_FALL_EINT2 */ -#define WM8285_JD1_FALL_EINT2_WIDTH 1 /* JD1_FALL_EINT2 */ -#define WM8285_JD1_RISE_EINT2 0x0001 /* JD1_RISE_EINT2 */ -#define WM8285_JD1_RISE_EINT2_MASK 0x0001 /* JD1_RISE_EINT2 */ -#define WM8285_JD1_RISE_EINT2_SHIFT 0 /* JD1_RISE_EINT2 */ -#define WM8285_JD1_RISE_EINT2_WIDTH 1 /* JD1_RISE_EINT2 */ +#define CLEARWATER_MICD_CLAMP_FALL_EINT2 0x0020 /* MICD_CLAMP_FALL_EINT2 */ +#define CLEARWATER_MICD_CLAMP_FALL_EINT2_MASK 0x0020 /* MICD_CLAMP_FALL_EINT2 */ +#define CLEARWATER_MICD_CLAMP_FALL_EINT2_SHIFT 5 /* MICD_CLAMP_FALL_EINT2 */ +#define CLEARWATER_MICD_CLAMP_FALL_EINT2_WIDTH 1 /* MICD_CLAMP_FALL_EINT2 */ +#define CLEARWATER_MICD_CLAMP_RISE_EINT2 0x0010 /* MICD_CLAMP_RISE_EINT2 */ +#define CLEARWATER_MICD_CLAMP_RISE_EINT2_MASK 0x0010 /* MICD_CLAMP_RISE_EINT2 */ +#define CLEARWATER_MICD_CLAMP_RISE_EINT2_SHIFT 4 /* MICD_CLAMP_RISE_EINT2 */ +#define CLEARWATER_MICD_CLAMP_RISE_EINT2_WIDTH 1 /* MICD_CLAMP_RISE_EINT2 */ +#define CLEARWATER_JD2_FALL_EINT2 0x0008 /* JD2_FALL_EINT2 */ +#define CLEARWATER_JD2_FALL_EINT2_MASK 0x0008 /* JD2_FALL_EINT2 */ +#define CLEARWATER_JD2_FALL_EINT2_SHIFT 3 /* JD2_FALL_EINT2 */ +#define CLEARWATER_JD2_FALL_EINT2_WIDTH 1 /* JD2_FALL_EINT2 */ +#define CLEARWATER_JD2_RISE_EINT2 0x0004 /* JD2_RISE_EINT2 */ +#define CLEARWATER_JD2_RISE_EINT2_MASK 0x0004 /* JD2_RISE_EINT2 */ +#define CLEARWATER_JD2_RISE_EINT2_SHIFT 2 /* JD2_RISE_EINT2 */ +#define CLEARWATER_JD2_RISE_EINT2_WIDTH 1 /* JD2_RISE_EINT2 */ +#define CLEARWATER_JD1_FALL_EINT2 0x0002 /* JD1_FALL_EINT2 */ +#define CLEARWATER_JD1_FALL_EINT2_MASK 0x0002 /* JD1_FALL_EINT2 */ +#define CLEARWATER_JD1_FALL_EINT2_SHIFT 1 /* JD1_FALL_EINT2 */ +#define CLEARWATER_JD1_FALL_EINT2_WIDTH 1 /* JD1_FALL_EINT2 */ +#define CLEARWATER_JD1_RISE_EINT2 0x0001 /* JD1_RISE_EINT2 */ +#define CLEARWATER_JD1_RISE_EINT2_MASK 0x0001 /* JD1_RISE_EINT2 */ +#define CLEARWATER_JD1_RISE_EINT2_SHIFT 0 /* JD1_RISE_EINT2 */ +#define CLEARWATER_JD1_RISE_EINT2_WIDTH 1 /* JD1_RISE_EINT2 */ /* * R6408 (0x1908) - IRQ2 Status 9 */ -#define WM8285_ASRC2_IN2_LOCK_EINT2 0x0800 /* ASRC2_IN2_LOCK_EINT2 */ -#define WM8285_ASRC2_IN2_LOCK_EINT2_MASK 0x0800 /* ASRC2_IN2_LOCK_EINT2 */ -#define WM8285_ASRC2_IN2_LOCK_EINT2_SHIFT 11 /* ASRC2_IN2_LOCK_EINT2 */ -#define WM8285_ASRC2_IN2_LOCK_EINT2_WIDTH 1 /* ASRC2_IN2_LOCK_EINT2 */ -#define WM8285_ASRC2_IN1_LOCK_EINT2 0x0400 /* ASRC2_IN1_LOCK_EINT2 */ -#define WM8285_ASRC2_IN1_LOCK_EINT2_MASK 0x0400 /* ASRC2_IN1_LOCK_EINT2 */ -#define WM8285_ASRC2_IN1_LOCK_EINT2_SHIFT 10 /* ASRC2_IN1_LOCK_EINT2 */ -#define WM8285_ASRC2_IN1_LOCK_EINT2_WIDTH 1 /* ASRC2_IN1_LOCK_EINT2 */ -#define WM8285_ASRC1_IN2_LOCK_EINT2 0x0200 /* ASRC1_IN2_LOCK_EINT2 */ -#define WM8285_ASRC1_IN2_LOCK_EINT2_MASK 0x0200 /* ASRC1_IN2_LOCK_EINT2 */ -#define WM8285_ASRC1_IN2_LOCK_EINT2_SHIFT 9 /* ASRC1_IN2_LOCK_EINT2 */ -#define WM8285_ASRC1_IN2_LOCK_EINT2_WIDTH 1 /* ASRC1_IN2_LOCK_EINT2 */ -#define WM8285_ASRC1_IN1_LOCK_EINT2 0x0100 /* ASRC1_IN1_LOCK_EINT2 */ -#define WM8285_ASRC1_IN1_LOCK_EINT2_MASK 0x0100 /* ASRC1_IN1_LOCK_EINT2 */ -#define WM8285_ASRC1_IN1_LOCK_EINT2_SHIFT 8 /* ASRC1_IN1_LOCK_EINT2 */ -#define WM8285_ASRC1_IN1_LOCK_EINT2_WIDTH 1 /* ASRC1_IN1_LOCK_EINT2 */ -#define WM8285_DRC2_SIG_DET_EINT2 0x0002 /* DRC2_SIG_DET_EINT2 */ -#define WM8285_DRC2_SIG_DET_EINT2_MASK 0x0002 /* DRC2_SIG_DET_EINT2 */ -#define WM8285_DRC2_SIG_DET_EINT2_SHIFT 1 /* DRC2_SIG_DET_EINT2 */ -#define WM8285_DRC2_SIG_DET_EINT2_WIDTH 1 /* DRC2_SIG_DET_EINT2 */ -#define WM8285_DRC1_SIG_DET_EINT2 0x0001 /* DRC1_SIG_DET_EINT2 */ -#define WM8285_DRC1_SIG_DET_EINT2_MASK 0x0001 /* DRC1_SIG_DET_EINT2 */ -#define WM8285_DRC1_SIG_DET_EINT2_SHIFT 0 /* DRC1_SIG_DET_EINT2 */ -#define WM8285_DRC1_SIG_DET_EINT2_WIDTH 1 /* DRC1_SIG_DET_EINT2 */ +#define CLEARWATER_ASRC2_IN2_LOCK_EINT2 0x0800 /* ASRC2_IN2_LOCK_EINT2 */ +#define CLEARWATER_ASRC2_IN2_LOCK_EINT2_MASK 0x0800 /* ASRC2_IN2_LOCK_EINT2 */ +#define CLEARWATER_ASRC2_IN2_LOCK_EINT2_SHIFT 11 /* ASRC2_IN2_LOCK_EINT2 */ +#define CLEARWATER_ASRC2_IN2_LOCK_EINT2_WIDTH 1 /* ASRC2_IN2_LOCK_EINT2 */ +#define CLEARWATER_ASRC2_IN1_LOCK_EINT2 0x0400 /* ASRC2_IN1_LOCK_EINT2 */ +#define CLEARWATER_ASRC2_IN1_LOCK_EINT2_MASK 0x0400 /* ASRC2_IN1_LOCK_EINT2 */ +#define CLEARWATER_ASRC2_IN1_LOCK_EINT2_SHIFT 10 /* ASRC2_IN1_LOCK_EINT2 */ +#define CLEARWATER_ASRC2_IN1_LOCK_EINT2_WIDTH 1 /* ASRC2_IN1_LOCK_EINT2 */ +#define CLEARWATER_ASRC1_IN2_LOCK_EINT2 0x0200 /* ASRC1_IN2_LOCK_EINT2 */ +#define CLEARWATER_ASRC1_IN2_LOCK_EINT2_MASK 0x0200 /* ASRC1_IN2_LOCK_EINT2 */ +#define CLEARWATER_ASRC1_IN2_LOCK_EINT2_SHIFT 9 /* ASRC1_IN2_LOCK_EINT2 */ +#define CLEARWATER_ASRC1_IN2_LOCK_EINT2_WIDTH 1 /* ASRC1_IN2_LOCK_EINT2 */ +#define CLEARWATER_ASRC1_IN1_LOCK_EINT2 0x0100 /* ASRC1_IN1_LOCK_EINT2 */ +#define CLEARWATER_ASRC1_IN1_LOCK_EINT2_MASK 0x0100 /* ASRC1_IN1_LOCK_EINT2 */ +#define CLEARWATER_ASRC1_IN1_LOCK_EINT2_SHIFT 8 /* ASRC1_IN1_LOCK_EINT2 */ +#define CLEARWATER_ASRC1_IN1_LOCK_EINT2_WIDTH 1 /* ASRC1_IN1_LOCK_EINT2 */ +#define CLEARWATER_DRC2_SIG_DET_EINT2 0x0002 /* DRC2_SIG_DET_EINT2 */ +#define CLEARWATER_DRC2_SIG_DET_EINT2_MASK 0x0002 /* DRC2_SIG_DET_EINT2 */ +#define CLEARWATER_DRC2_SIG_DET_EINT2_SHIFT 1 /* DRC2_SIG_DET_EINT2 */ +#define CLEARWATER_DRC2_SIG_DET_EINT2_WIDTH 1 /* DRC2_SIG_DET_EINT2 */ +#define CLEARWATER_DRC1_SIG_DET_EINT2 0x0001 /* DRC1_SIG_DET_EINT2 */ +#define CLEARWATER_DRC1_SIG_DET_EINT2_MASK 0x0001 /* DRC1_SIG_DET_EINT2 */ +#define CLEARWATER_DRC1_SIG_DET_EINT2_SHIFT 0 /* DRC1_SIG_DET_EINT2 */ +#define CLEARWATER_DRC1_SIG_DET_EINT2_WIDTH 1 /* DRC1_SIG_DET_EINT2 */ /* * R6410 (0x190A) - IRQ2 Status 11 */ -#define WM8285_DSP_IRQ16_EINT2 0x8000 /* DSP_IRQ16_EINT2 */ -#define WM8285_DSP_IRQ16_EINT2_MASK 0x8000 /* DSP_IRQ16_EINT2 */ -#define WM8285_DSP_IRQ16_EINT2_SHIFT 15 /* DSP_IRQ16_EINT2 */ -#define WM8285_DSP_IRQ16_EINT2_WIDTH 1 /* DSP_IRQ16_EINT2 */ -#define WM8285_DSP_IRQ15_EINT2 0x4000 /* DSP_IRQ15_EINT2 */ -#define WM8285_DSP_IRQ15_EINT2_MASK 0x4000 /* DSP_IRQ15_EINT2 */ -#define WM8285_DSP_IRQ15_EINT2_SHIFT 14 /* DSP_IRQ15_EINT2 */ -#define WM8285_DSP_IRQ15_EINT2_WIDTH 1 /* DSP_IRQ15_EINT2 */ -#define WM8285_DSP_IRQ14_EINT2 0x2000 /* DSP_IRQ14_EINT2 */ -#define WM8285_DSP_IRQ14_EINT2_MASK 0x2000 /* DSP_IRQ14_EINT2 */ -#define WM8285_DSP_IRQ14_EINT2_SHIFT 13 /* DSP_IRQ14_EINT2 */ -#define WM8285_DSP_IRQ14_EINT2_WIDTH 1 /* DSP_IRQ14_EINT2 */ -#define WM8285_DSP_IRQ13_EINT2 0x1000 /* DSP_IRQ13_EINT2 */ -#define WM8285_DSP_IRQ13_EINT2_MASK 0x1000 /* DSP_IRQ13_EINT2 */ -#define WM8285_DSP_IRQ13_EINT2_SHIFT 12 /* DSP_IRQ13_EINT2 */ -#define WM8285_DSP_IRQ13_EINT2_WIDTH 1 /* DSP_IRQ13_EINT2 */ -#define WM8285_DSP_IRQ12_EINT2 0x0800 /* DSP_IRQ12_EINT2 */ -#define WM8285_DSP_IRQ12_EINT2_MASK 0x0800 /* DSP_IRQ12_EINT2 */ -#define WM8285_DSP_IRQ12_EINT2_SHIFT 11 /* DSP_IRQ12_EINT2 */ -#define WM8285_DSP_IRQ12_EINT2_WIDTH 1 /* DSP_IRQ12_EINT2 */ -#define WM8285_DSP_IRQ11_EINT2 0x0400 /* DSP_IRQ11_EINT2 */ -#define WM8285_DSP_IRQ11_EINT2_MASK 0x0400 /* DSP_IRQ11_EINT2 */ -#define WM8285_DSP_IRQ11_EINT2_SHIFT 10 /* DSP_IRQ11_EINT2 */ -#define WM8285_DSP_IRQ11_EINT2_WIDTH 1 /* DSP_IRQ11_EINT2 */ -#define WM8285_DSP_IRQ10_EINT2 0x0200 /* DSP_IRQ10_EINT2 */ -#define WM8285_DSP_IRQ10_EINT2_MASK 0x0200 /* DSP_IRQ10_EINT2 */ -#define WM8285_DSP_IRQ10_EINT2_SHIFT 9 /* DSP_IRQ10_EINT2 */ -#define WM8285_DSP_IRQ10_EINT2_WIDTH 1 /* DSP_IRQ10_EINT2 */ -#define WM8285_DSP_IRQ9_EINT2 0x0100 /* DSP_IRQ9_EINT2 */ -#define WM8285_DSP_IRQ9_EINT2_MASK 0x0100 /* DSP_IRQ9_EINT2 */ -#define WM8285_DSP_IRQ9_EINT2_SHIFT 8 /* DSP_IRQ9_EINT2 */ -#define WM8285_DSP_IRQ9_EINT2_WIDTH 1 /* DSP_IRQ9_EINT2 */ -#define WM8285_DSP_IRQ8_EINT2 0x0080 /* DSP_IRQ8_EINT2 */ -#define WM8285_DSP_IRQ8_EINT2_MASK 0x0080 /* DSP_IRQ8_EINT2 */ -#define WM8285_DSP_IRQ8_EINT2_SHIFT 7 /* DSP_IRQ8_EINT2 */ -#define WM8285_DSP_IRQ8_EINT2_WIDTH 1 /* DSP_IRQ8_EINT2 */ -#define WM8285_DSP_IRQ7_EINT2 0x0040 /* DSP_IRQ7_EINT2 */ -#define WM8285_DSP_IRQ7_EINT2_MASK 0x0040 /* DSP_IRQ7_EINT2 */ -#define WM8285_DSP_IRQ7_EINT2_SHIFT 6 /* DSP_IRQ7_EINT2 */ -#define WM8285_DSP_IRQ7_EINT2_WIDTH 1 /* DSP_IRQ7_EINT2 */ -#define WM8285_DSP_IRQ6_EINT2 0x0020 /* DSP_IRQ6_EINT2 */ -#define WM8285_DSP_IRQ6_EINT2_MASK 0x0020 /* DSP_IRQ6_EINT2 */ -#define WM8285_DSP_IRQ6_EINT2_SHIFT 5 /* DSP_IRQ6_EINT2 */ -#define WM8285_DSP_IRQ6_EINT2_WIDTH 1 /* DSP_IRQ6_EINT2 */ -#define WM8285_DSP_IRQ5_EINT2 0x0010 /* DSP_IRQ5_EINT2 */ -#define WM8285_DSP_IRQ5_EINT2_MASK 0x0010 /* DSP_IRQ5_EINT2 */ -#define WM8285_DSP_IRQ5_EINT2_SHIFT 4 /* DSP_IRQ5_EINT2 */ -#define WM8285_DSP_IRQ5_EINT2_WIDTH 1 /* DSP_IRQ5_EINT2 */ -#define WM8285_DSP_IRQ4_EINT2 0x0008 /* DSP_IRQ4_EINT2 */ -#define WM8285_DSP_IRQ4_EINT2_MASK 0x0008 /* DSP_IRQ4_EINT2 */ -#define WM8285_DSP_IRQ4_EINT2_SHIFT 3 /* DSP_IRQ4_EINT2 */ -#define WM8285_DSP_IRQ4_EINT2_WIDTH 1 /* DSP_IRQ4_EINT2 */ -#define WM8285_DSP_IRQ3_EINT2 0x0004 /* DSP_IRQ3_EINT2 */ -#define WM8285_DSP_IRQ3_EINT2_MASK 0x0004 /* DSP_IRQ3_EINT2 */ -#define WM8285_DSP_IRQ3_EINT2_SHIFT 2 /* DSP_IRQ3_EINT2 */ -#define WM8285_DSP_IRQ3_EINT2_WIDTH 1 /* DSP_IRQ3_EINT2 */ -#define WM8285_DSP_IRQ2_EINT2 0x0002 /* DSP_IRQ2_EINT2 */ -#define WM8285_DSP_IRQ2_EINT2_MASK 0x0002 /* DSP_IRQ2_EINT2 */ -#define WM8285_DSP_IRQ2_EINT2_SHIFT 1 /* DSP_IRQ2_EINT2 */ -#define WM8285_DSP_IRQ2_EINT2_WIDTH 1 /* DSP_IRQ2_EINT2 */ -#define WM8285_DSP_IRQ1_EINT2 0x0001 /* DSP_IRQ1_EINT2 */ -#define WM8285_DSP_IRQ1_EINT2_MASK 0x0001 /* DSP_IRQ1_EINT2 */ -#define WM8285_DSP_IRQ1_EINT2_SHIFT 0 /* DSP_IRQ1_EINT2 */ -#define WM8285_DSP_IRQ1_EINT2_WIDTH 1 /* DSP_IRQ1_EINT2 */ +#define CLEARWATER_DSP_IRQ16_EINT2 0x8000 /* DSP_IRQ16_EINT2 */ +#define CLEARWATER_DSP_IRQ16_EINT2_MASK 0x8000 /* DSP_IRQ16_EINT2 */ +#define CLEARWATER_DSP_IRQ16_EINT2_SHIFT 15 /* DSP_IRQ16_EINT2 */ +#define CLEARWATER_DSP_IRQ16_EINT2_WIDTH 1 /* DSP_IRQ16_EINT2 */ +#define CLEARWATER_DSP_IRQ15_EINT2 0x4000 /* DSP_IRQ15_EINT2 */ +#define CLEARWATER_DSP_IRQ15_EINT2_MASK 0x4000 /* DSP_IRQ15_EINT2 */ +#define CLEARWATER_DSP_IRQ15_EINT2_SHIFT 14 /* DSP_IRQ15_EINT2 */ +#define CLEARWATER_DSP_IRQ15_EINT2_WIDTH 1 /* DSP_IRQ15_EINT2 */ +#define CLEARWATER_DSP_IRQ14_EINT2 0x2000 /* DSP_IRQ14_EINT2 */ +#define CLEARWATER_DSP_IRQ14_EINT2_MASK 0x2000 /* DSP_IRQ14_EINT2 */ +#define CLEARWATER_DSP_IRQ14_EINT2_SHIFT 13 /* DSP_IRQ14_EINT2 */ +#define CLEARWATER_DSP_IRQ14_EINT2_WIDTH 1 /* DSP_IRQ14_EINT2 */ +#define CLEARWATER_DSP_IRQ13_EINT2 0x1000 /* DSP_IRQ13_EINT2 */ +#define CLEARWATER_DSP_IRQ13_EINT2_MASK 0x1000 /* DSP_IRQ13_EINT2 */ +#define CLEARWATER_DSP_IRQ13_EINT2_SHIFT 12 /* DSP_IRQ13_EINT2 */ +#define CLEARWATER_DSP_IRQ13_EINT2_WIDTH 1 /* DSP_IRQ13_EINT2 */ +#define CLEARWATER_DSP_IRQ12_EINT2 0x0800 /* DSP_IRQ12_EINT2 */ +#define CLEARWATER_DSP_IRQ12_EINT2_MASK 0x0800 /* DSP_IRQ12_EINT2 */ +#define CLEARWATER_DSP_IRQ12_EINT2_SHIFT 11 /* DSP_IRQ12_EINT2 */ +#define CLEARWATER_DSP_IRQ12_EINT2_WIDTH 1 /* DSP_IRQ12_EINT2 */ +#define CLEARWATER_DSP_IRQ11_EINT2 0x0400 /* DSP_IRQ11_EINT2 */ +#define CLEARWATER_DSP_IRQ11_EINT2_MASK 0x0400 /* DSP_IRQ11_EINT2 */ +#define CLEARWATER_DSP_IRQ11_EINT2_SHIFT 10 /* DSP_IRQ11_EINT2 */ +#define CLEARWATER_DSP_IRQ11_EINT2_WIDTH 1 /* DSP_IRQ11_EINT2 */ +#define CLEARWATER_DSP_IRQ10_EINT2 0x0200 /* DSP_IRQ10_EINT2 */ +#define CLEARWATER_DSP_IRQ10_EINT2_MASK 0x0200 /* DSP_IRQ10_EINT2 */ +#define CLEARWATER_DSP_IRQ10_EINT2_SHIFT 9 /* DSP_IRQ10_EINT2 */ +#define CLEARWATER_DSP_IRQ10_EINT2_WIDTH 1 /* DSP_IRQ10_EINT2 */ +#define CLEARWATER_DSP_IRQ9_EINT2 0x0100 /* DSP_IRQ9_EINT2 */ +#define CLEARWATER_DSP_IRQ9_EINT2_MASK 0x0100 /* DSP_IRQ9_EINT2 */ +#define CLEARWATER_DSP_IRQ9_EINT2_SHIFT 8 /* DSP_IRQ9_EINT2 */ +#define CLEARWATER_DSP_IRQ9_EINT2_WIDTH 1 /* DSP_IRQ9_EINT2 */ +#define CLEARWATER_DSP_IRQ8_EINT2 0x0080 /* DSP_IRQ8_EINT2 */ +#define CLEARWATER_DSP_IRQ8_EINT2_MASK 0x0080 /* DSP_IRQ8_EINT2 */ +#define CLEARWATER_DSP_IRQ8_EINT2_SHIFT 7 /* DSP_IRQ8_EINT2 */ +#define CLEARWATER_DSP_IRQ8_EINT2_WIDTH 1 /* DSP_IRQ8_EINT2 */ +#define CLEARWATER_DSP_IRQ7_EINT2 0x0040 /* DSP_IRQ7_EINT2 */ +#define CLEARWATER_DSP_IRQ7_EINT2_MASK 0x0040 /* DSP_IRQ7_EINT2 */ +#define CLEARWATER_DSP_IRQ7_EINT2_SHIFT 6 /* DSP_IRQ7_EINT2 */ +#define CLEARWATER_DSP_IRQ7_EINT2_WIDTH 1 /* DSP_IRQ7_EINT2 */ +#define CLEARWATER_DSP_IRQ6_EINT2 0x0020 /* DSP_IRQ6_EINT2 */ +#define CLEARWATER_DSP_IRQ6_EINT2_MASK 0x0020 /* DSP_IRQ6_EINT2 */ +#define CLEARWATER_DSP_IRQ6_EINT2_SHIFT 5 /* DSP_IRQ6_EINT2 */ +#define CLEARWATER_DSP_IRQ6_EINT2_WIDTH 1 /* DSP_IRQ6_EINT2 */ +#define CLEARWATER_DSP_IRQ5_EINT2 0x0010 /* DSP_IRQ5_EINT2 */ +#define CLEARWATER_DSP_IRQ5_EINT2_MASK 0x0010 /* DSP_IRQ5_EINT2 */ +#define CLEARWATER_DSP_IRQ5_EINT2_SHIFT 4 /* DSP_IRQ5_EINT2 */ +#define CLEARWATER_DSP_IRQ5_EINT2_WIDTH 1 /* DSP_IRQ5_EINT2 */ +#define CLEARWATER_DSP_IRQ4_EINT2 0x0008 /* DSP_IRQ4_EINT2 */ +#define CLEARWATER_DSP_IRQ4_EINT2_MASK 0x0008 /* DSP_IRQ4_EINT2 */ +#define CLEARWATER_DSP_IRQ4_EINT2_SHIFT 3 /* DSP_IRQ4_EINT2 */ +#define CLEARWATER_DSP_IRQ4_EINT2_WIDTH 1 /* DSP_IRQ4_EINT2 */ +#define CLEARWATER_DSP_IRQ3_EINT2 0x0004 /* DSP_IRQ3_EINT2 */ +#define CLEARWATER_DSP_IRQ3_EINT2_MASK 0x0004 /* DSP_IRQ3_EINT2 */ +#define CLEARWATER_DSP_IRQ3_EINT2_SHIFT 2 /* DSP_IRQ3_EINT2 */ +#define CLEARWATER_DSP_IRQ3_EINT2_WIDTH 1 /* DSP_IRQ3_EINT2 */ +#define CLEARWATER_DSP_IRQ2_EINT2 0x0002 /* DSP_IRQ2_EINT2 */ +#define CLEARWATER_DSP_IRQ2_EINT2_MASK 0x0002 /* DSP_IRQ2_EINT2 */ +#define CLEARWATER_DSP_IRQ2_EINT2_SHIFT 1 /* DSP_IRQ2_EINT2 */ +#define CLEARWATER_DSP_IRQ2_EINT2_WIDTH 1 /* DSP_IRQ2_EINT2 */ +#define CLEARWATER_DSP_IRQ1_EINT2 0x0001 /* DSP_IRQ1_EINT2 */ +#define CLEARWATER_DSP_IRQ1_EINT2_MASK 0x0001 /* DSP_IRQ1_EINT2 */ +#define CLEARWATER_DSP_IRQ1_EINT2_SHIFT 0 /* DSP_IRQ1_EINT2 */ +#define CLEARWATER_DSP_IRQ1_EINT2_WIDTH 1 /* DSP_IRQ1_EINT2 */ /* * R6411 (0x190B) - IRQ2 Status 12 */ -#define WM8285_SPKOUTR_SC_EINT2 0x0080 /* SPKOUTR_SC_EINT2 */ -#define WM8285_SPKOUTR_SC_EINT2_MASK 0x0080 /* SPKOUTR_SC_EINT2 */ -#define WM8285_SPKOUTR_SC_EINT2_SHIFT 7 /* SPKOUTR_SC_EINT2 */ -#define WM8285_SPKOUTR_SC_EINT2_WIDTH 1 /* SPKOUTR_SC_EINT2 */ -#define WM8285_SPKOUTL_SC_EINT2 0x0040 /* SPKOUTL_SC_EINT2 */ -#define WM8285_SPKOUTL_SC_EINT2_MASK 0x0040 /* SPKOUTL_SC_EINT2 */ -#define WM8285_SPKOUTL_SC_EINT2_SHIFT 6 /* SPKOUTL_SC_EINT2 */ -#define WM8285_SPKOUTL_SC_EINT2_WIDTH 1 /* SPKOUTL_SC_EINT2 */ -#define WM8285_HP3R_SC_EINT2 0x0020 /* HP3R_SC_EINT2 */ -#define WM8285_HP3R_SC_EINT2_MASK 0x0020 /* HP3R_SC_EINT2 */ -#define WM8285_HP3R_SC_EINT2_SHIFT 5 /* HP3R_SC_EINT2 */ -#define WM8285_HP3R_SC_EINT2_WIDTH 1 /* HP3R_SC_EINT2 */ -#define WM8285_HP3L_SC_EINT2 0x0010 /* HP3L_SC_EINT2 */ -#define WM8285_HP3L_SC_EINT2_MASK 0x0010 /* HP3L_SC_EINT2 */ -#define WM8285_HP3L_SC_EINT2_SHIFT 4 /* HP3L_SC_EINT2 */ -#define WM8285_HP3L_SC_EINT2_WIDTH 1 /* HP3L_SC_EINT2 */ -#define WM8285_HP2R_SC_EINT2 0x0008 /* HP2R_SC_EINT2 */ -#define WM8285_HP2R_SC_EINT2_MASK 0x0008 /* HP2R_SC_EINT2 */ -#define WM8285_HP2R_SC_EINT2_SHIFT 3 /* HP2R_SC_EINT2 */ -#define WM8285_HP2R_SC_EINT2_WIDTH 1 /* HP2R_SC_EINT2 */ -#define WM8285_HP2L_SC_EINT2 0x0004 /* HP2L_SC_EINT2 */ -#define WM8285_HP2L_SC_EINT2_MASK 0x0004 /* HP2L_SC_EINT2 */ -#define WM8285_HP2L_SC_EINT2_SHIFT 2 /* HP2L_SC_EINT2 */ -#define WM8285_HP2L_SC_EINT2_WIDTH 1 /* HP2L_SC_EINT2 */ -#define WM8285_HP1R_SC_EINT2 0x0002 /* HP1R_SC_EINT2 */ -#define WM8285_HP1R_SC_EINT2_MASK 0x0002 /* HP1R_SC_EINT2 */ -#define WM8285_HP1R_SC_EINT2_SHIFT 1 /* HP1R_SC_EINT2 */ -#define WM8285_HP1R_SC_EINT2_WIDTH 1 /* HP1R_SC_EINT2 */ -#define WM8285_HP1L_SC_EINT2 0x0001 /* HP1L_SC_EINT2 */ -#define WM8285_HP1L_SC_EINT2_MASK 0x0001 /* HP1L_SC_EINT2 */ -#define WM8285_HP1L_SC_EINT2_SHIFT 0 /* HP1L_SC_EINT2 */ -#define WM8285_HP1L_SC_EINT2_WIDTH 1 /* HP1L_SC_EINT2 */ +#define CLEARWATER_SPKOUTR_SC_EINT2 0x0080 /* SPKOUTR_SC_EINT2 */ +#define CLEARWATER_SPKOUTR_SC_EINT2_MASK 0x0080 /* SPKOUTR_SC_EINT2 */ +#define CLEARWATER_SPKOUTR_SC_EINT2_SHIFT 7 /* SPKOUTR_SC_EINT2 */ +#define CLEARWATER_SPKOUTR_SC_EINT2_WIDTH 1 /* SPKOUTR_SC_EINT2 */ +#define CLEARWATER_SPKOUTL_SC_EINT2 0x0040 /* SPKOUTL_SC_EINT2 */ +#define CLEARWATER_SPKOUTL_SC_EINT2_MASK 0x0040 /* SPKOUTL_SC_EINT2 */ +#define CLEARWATER_SPKOUTL_SC_EINT2_SHIFT 6 /* SPKOUTL_SC_EINT2 */ +#define CLEARWATER_SPKOUTL_SC_EINT2_WIDTH 1 /* SPKOUTL_SC_EINT2 */ +#define CLEARWATER_HP3R_SC_EINT2 0x0020 /* HP3R_SC_EINT2 */ +#define CLEARWATER_HP3R_SC_EINT2_MASK 0x0020 /* HP3R_SC_EINT2 */ +#define CLEARWATER_HP3R_SC_EINT2_SHIFT 5 /* HP3R_SC_EINT2 */ +#define CLEARWATER_HP3R_SC_EINT2_WIDTH 1 /* HP3R_SC_EINT2 */ +#define CLEARWATER_HP3L_SC_EINT2 0x0010 /* HP3L_SC_EINT2 */ +#define CLEARWATER_HP3L_SC_EINT2_MASK 0x0010 /* HP3L_SC_EINT2 */ +#define CLEARWATER_HP3L_SC_EINT2_SHIFT 4 /* HP3L_SC_EINT2 */ +#define CLEARWATER_HP3L_SC_EINT2_WIDTH 1 /* HP3L_SC_EINT2 */ +#define CLEARWATER_HP2R_SC_EINT2 0x0008 /* HP2R_SC_EINT2 */ +#define CLEARWATER_HP2R_SC_EINT2_MASK 0x0008 /* HP2R_SC_EINT2 */ +#define CLEARWATER_HP2R_SC_EINT2_SHIFT 3 /* HP2R_SC_EINT2 */ +#define CLEARWATER_HP2R_SC_EINT2_WIDTH 1 /* HP2R_SC_EINT2 */ +#define CLEARWATER_HP2L_SC_EINT2 0x0004 /* HP2L_SC_EINT2 */ +#define CLEARWATER_HP2L_SC_EINT2_MASK 0x0004 /* HP2L_SC_EINT2 */ +#define CLEARWATER_HP2L_SC_EINT2_SHIFT 2 /* HP2L_SC_EINT2 */ +#define CLEARWATER_HP2L_SC_EINT2_WIDTH 1 /* HP2L_SC_EINT2 */ +#define CLEARWATER_HP1R_SC_EINT2 0x0002 /* HP1R_SC_EINT2 */ +#define CLEARWATER_HP1R_SC_EINT2_MASK 0x0002 /* HP1R_SC_EINT2 */ +#define CLEARWATER_HP1R_SC_EINT2_SHIFT 1 /* HP1R_SC_EINT2 */ +#define CLEARWATER_HP1R_SC_EINT2_WIDTH 1 /* HP1R_SC_EINT2 */ +#define CLEARWATER_HP1L_SC_EINT2 0x0001 /* HP1L_SC_EINT2 */ +#define CLEARWATER_HP1L_SC_EINT2_MASK 0x0001 /* HP1L_SC_EINT2 */ +#define CLEARWATER_HP1L_SC_EINT2_SHIFT 0 /* HP1L_SC_EINT2 */ +#define CLEARWATER_HP1L_SC_EINT2_WIDTH 1 /* HP1L_SC_EINT2 */ /* * R6412 (0x190C) - IRQ2 Status 13 */ -#define WM8285_SPKOUTR_ENABLE_DONE_EINT2 0x0080 /* SPKOUTR_ENABLE_DONE_EINT2 */ -#define WM8285_SPKOUTR_ENABLE_DONE_EINT2_MASK 0x0080 /* SPKOUTR_ENABLE_DONE_EINT2 */ -#define WM8285_SPKOUTR_ENABLE_DONE_EINT2_SHIFT 7 /* SPKOUTR_ENABLE_DONE_EINT2 */ -#define WM8285_SPKOUTR_ENABLE_DONE_EINT2_WIDTH 1 /* SPKOUTR_ENABLE_DONE_EINT2 */ -#define WM8285_SPKOUTL_ENABLE_DONE_EINT2 0x0040 /* SPKOUTL_ENABLE_DONE_EINT2 */ -#define WM8285_SPKOUTL_ENABLE_DONE_EINT2_MASK 0x0040 /* SPKOUTL_ENABLE_DONE_EINT2 */ -#define WM8285_SPKOUTL_ENABLE_DONE_EINT2_SHIFT 6 /* SPKOUTL_ENABLE_DONE_EINT2 */ -#define WM8285_SPKOUTL_ENABLE_DONE_EINT2_WIDTH 1 /* SPKOUTL_ENABLE_DONE_EINT2 */ -#define WM8285_HP3R_ENABLE_DONE_EINT2 0x0020 /* HP3R_ENABLE_DONE_EINT2 */ -#define WM8285_HP3R_ENABLE_DONE_EINT2_MASK 0x0020 /* HP3R_ENABLE_DONE_EINT2 */ -#define WM8285_HP3R_ENABLE_DONE_EINT2_SHIFT 5 /* HP3R_ENABLE_DONE_EINT2 */ -#define WM8285_HP3R_ENABLE_DONE_EINT2_WIDTH 1 /* HP3R_ENABLE_DONE_EINT2 */ -#define WM8285_HP3L_ENABLE_DONE_EINT2 0x0010 /* HP3L_ENABLE_DONE_EINT2 */ -#define WM8285_HP3L_ENABLE_DONE_EINT2_MASK 0x0010 /* HP3L_ENABLE_DONE_EINT2 */ -#define WM8285_HP3L_ENABLE_DONE_EINT2_SHIFT 4 /* HP3L_ENABLE_DONE_EINT2 */ -#define WM8285_HP3L_ENABLE_DONE_EINT2_WIDTH 1 /* HP3L_ENABLE_DONE_EINT2 */ -#define WM8285_HP2R_ENABLE_DONE_EINT2 0x0008 /* HP2R_ENABLE_DONE_EINT2 */ -#define WM8285_HP2R_ENABLE_DONE_EINT2_MASK 0x0008 /* HP2R_ENABLE_DONE_EINT2 */ -#define WM8285_HP2R_ENABLE_DONE_EINT2_SHIFT 3 /* HP2R_ENABLE_DONE_EINT2 */ -#define WM8285_HP2R_ENABLE_DONE_EINT2_WIDTH 1 /* HP2R_ENABLE_DONE_EINT2 */ -#define WM8285_HP2L_ENABLE_DONE_EINT2 0x0004 /* HP2L_ENABLE_DONE_EINT2 */ -#define WM8285_HP2L_ENABLE_DONE_EINT2_MASK 0x0004 /* HP2L_ENABLE_DONE_EINT2 */ -#define WM8285_HP2L_ENABLE_DONE_EINT2_SHIFT 2 /* HP2L_ENABLE_DONE_EINT2 */ -#define WM8285_HP2L_ENABLE_DONE_EINT2_WIDTH 1 /* HP2L_ENABLE_DONE_EINT2 */ -#define WM8285_HP1R_ENABLE_DONE_EINT2 0x0002 /* HP1R_ENABLE_DONE_EINT2 */ -#define WM8285_HP1R_ENABLE_DONE_EINT2_MASK 0x0002 /* HP1R_ENABLE_DONE_EINT2 */ -#define WM8285_HP1R_ENABLE_DONE_EINT2_SHIFT 1 /* HP1R_ENABLE_DONE_EINT2 */ -#define WM8285_HP1R_ENABLE_DONE_EINT2_WIDTH 1 /* HP1R_ENABLE_DONE_EINT2 */ -#define WM8285_HP1L_ENABLE_DONE_EINT2 0x0001 /* HP1L_ENABLE_DONE_EINT2 */ -#define WM8285_HP1L_ENABLE_DONE_EINT2_MASK 0x0001 /* HP1L_ENABLE_DONE_EINT2 */ -#define WM8285_HP1L_ENABLE_DONE_EINT2_SHIFT 0 /* HP1L_ENABLE_DONE_EINT2 */ -#define WM8285_HP1L_ENABLE_DONE_EINT2_WIDTH 1 /* HP1L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_SPKOUTR_ENABLE_DONE_EINT2 0x0080 /* SPKOUTR_ENABLE_DONE_EINT2 */ +#define CLEARWATER_SPKOUTR_ENABLE_DONE_EINT2_MASK 0x0080 /* SPKOUTR_ENABLE_DONE_EINT2 */ +#define CLEARWATER_SPKOUTR_ENABLE_DONE_EINT2_SHIFT 7 /* SPKOUTR_ENABLE_DONE_EINT2 */ +#define CLEARWATER_SPKOUTR_ENABLE_DONE_EINT2_WIDTH 1 /* SPKOUTR_ENABLE_DONE_EINT2 */ +#define CLEARWATER_SPKOUTL_ENABLE_DONE_EINT2 0x0040 /* SPKOUTL_ENABLE_DONE_EINT2 */ +#define CLEARWATER_SPKOUTL_ENABLE_DONE_EINT2_MASK 0x0040 /* SPKOUTL_ENABLE_DONE_EINT2 */ +#define CLEARWATER_SPKOUTL_ENABLE_DONE_EINT2_SHIFT 6 /* SPKOUTL_ENABLE_DONE_EINT2 */ +#define CLEARWATER_SPKOUTL_ENABLE_DONE_EINT2_WIDTH 1 /* SPKOUTL_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP3R_ENABLE_DONE_EINT2 0x0020 /* HP3R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP3R_ENABLE_DONE_EINT2_MASK 0x0020 /* HP3R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP3R_ENABLE_DONE_EINT2_SHIFT 5 /* HP3R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP3R_ENABLE_DONE_EINT2_WIDTH 1 /* HP3R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP3L_ENABLE_DONE_EINT2 0x0010 /* HP3L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP3L_ENABLE_DONE_EINT2_MASK 0x0010 /* HP3L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP3L_ENABLE_DONE_EINT2_SHIFT 4 /* HP3L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP3L_ENABLE_DONE_EINT2_WIDTH 1 /* HP3L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP2R_ENABLE_DONE_EINT2 0x0008 /* HP2R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP2R_ENABLE_DONE_EINT2_MASK 0x0008 /* HP2R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP2R_ENABLE_DONE_EINT2_SHIFT 3 /* HP2R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP2R_ENABLE_DONE_EINT2_WIDTH 1 /* HP2R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP2L_ENABLE_DONE_EINT2 0x0004 /* HP2L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP2L_ENABLE_DONE_EINT2_MASK 0x0004 /* HP2L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP2L_ENABLE_DONE_EINT2_SHIFT 2 /* HP2L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP2L_ENABLE_DONE_EINT2_WIDTH 1 /* HP2L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP1R_ENABLE_DONE_EINT2 0x0002 /* HP1R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP1R_ENABLE_DONE_EINT2_MASK 0x0002 /* HP1R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP1R_ENABLE_DONE_EINT2_SHIFT 1 /* HP1R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP1R_ENABLE_DONE_EINT2_WIDTH 1 /* HP1R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP1L_ENABLE_DONE_EINT2 0x0001 /* HP1L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP1L_ENABLE_DONE_EINT2_MASK 0x0001 /* HP1L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP1L_ENABLE_DONE_EINT2_SHIFT 0 /* HP1L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_HP1L_ENABLE_DONE_EINT2_WIDTH 1 /* HP1L_ENABLE_DONE_EINT2 */ /* * R6413 (0x190D) - IRQ2 Status 14 */ -#define WM8285_SPKOUTR_DISABLE_DONE_EINT2 0x0080 /* SPKOUTR_DISABLE_DONE_EINT2 */ -#define WM8285_SPKOUTR_DISABLE_DONE_EINT2_MASK 0x0080 /* SPKOUTR_DISABLE_DONE_EINT2 */ -#define WM8285_SPKOUTR_DISABLE_DONE_EINT2_SHIFT 7 /* SPKOUTR_DISABLE_DONE_EINT2 */ -#define WM8285_SPKOUTR_DISABLE_DONE_EINT2_WIDTH 1 /* SPKOUTR_DISABLE_DONE_EINT2 */ -#define WM8285_SPKOUTL_DISABLE_DONE_EINT2 0x0040 /* SPKOUTL_DISABLE_DONE_EINT2 */ -#define WM8285_SPKOUTL_DISABLE_DONE_EINT2_MASK 0x0040 /* SPKOUTL_DISABLE_DONE_EINT2 */ -#define WM8285_SPKOUTL_DISABLE_DONE_EINT2_SHIFT 6 /* SPKOUTL_DISABLE_DONE_EINT2 */ -#define WM8285_SPKOUTL_DISABLE_DONE_EINT2_WIDTH 1 /* SPKOUTL_DISABLE_DONE_EINT2 */ -#define WM8285_HP3R_DISABLE_DONE_EINT2 0x0020 /* HP3R_DISABLE_DONE_EINT2 */ -#define WM8285_HP3R_DISABLE_DONE_EINT2_MASK 0x0020 /* HP3R_DISABLE_DONE_EINT2 */ -#define WM8285_HP3R_DISABLE_DONE_EINT2_SHIFT 5 /* HP3R_DISABLE_DONE_EINT2 */ -#define WM8285_HP3R_DISABLE_DONE_EINT2_WIDTH 1 /* HP3R_DISABLE_DONE_EINT2 */ -#define WM8285_HP3L_DISABLE_DONE_EINT2 0x0010 /* HP3L_DISABLE_DONE_EINT2 */ -#define WM8285_HP3L_DISABLE_DONE_EINT2_MASK 0x0010 /* HP3L_DISABLE_DONE_EINT2 */ -#define WM8285_HP3L_DISABLE_DONE_EINT2_SHIFT 4 /* HP3L_DISABLE_DONE_EINT2 */ -#define WM8285_HP3L_DISABLE_DONE_EINT2_WIDTH 1 /* HP3L_DISABLE_DONE_EINT2 */ -#define WM8285_HP2R_DISABLE_DONE_EINT2 0x0008 /* HP2R_DISABLE_DONE_EINT2 */ -#define WM8285_HP2R_DISABLE_DONE_EINT2_MASK 0x0008 /* HP2R_DISABLE_DONE_EINT2 */ -#define WM8285_HP2R_DISABLE_DONE_EINT2_SHIFT 3 /* HP2R_DISABLE_DONE_EINT2 */ -#define WM8285_HP2R_DISABLE_DONE_EINT2_WIDTH 1 /* HP2R_DISABLE_DONE_EINT2 */ -#define WM8285_HP2L_DISABLE_DONE_EINT2 0x0004 /* HP2L_DISABLE_DONE_EINT2 */ -#define WM8285_HP2L_DISABLE_DONE_EINT2_MASK 0x0004 /* HP2L_DISABLE_DONE_EINT2 */ -#define WM8285_HP2L_DISABLE_DONE_EINT2_SHIFT 2 /* HP2L_DISABLE_DONE_EINT2 */ -#define WM8285_HP2L_DISABLE_DONE_EINT2_WIDTH 1 /* HP2L_DISABLE_DONE_EINT2 */ -#define WM8285_HP1R_DISABLE_DONE_EINT2 0x0002 /* HP1R_DISABLE_DONE_EINT2 */ -#define WM8285_HP1R_DISABLE_DONE_EINT2_MASK 0x0002 /* HP1R_DISABLE_DONE_EINT2 */ -#define WM8285_HP1R_DISABLE_DONE_EINT2_SHIFT 1 /* HP1R_DISABLE_DONE_EINT2 */ -#define WM8285_HP1R_DISABLE_DONE_EINT2_WIDTH 1 /* HP1R_DISABLE_DONE_EINT2 */ -#define WM8285_HP1L_DISABLE_DONE_EINT2 0x0001 /* HP1L_DISABLE_DONE_EINT2 */ -#define WM8285_HP1L_DISABLE_DONE_EINT2_MASK 0x0001 /* HP1L_DISABLE_DONE_EINT2 */ -#define WM8285_HP1L_DISABLE_DONE_EINT2_SHIFT 0 /* HP1L_DISABLE_DONE_EINT2 */ -#define WM8285_HP1L_DISABLE_DONE_EINT2_WIDTH 1 /* HP1L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_SPKOUTR_DISABLE_DONE_EINT2 0x0080 /* SPKOUTR_DISABLE_DONE_EINT2 */ +#define CLEARWATER_SPKOUTR_DISABLE_DONE_EINT2_MASK 0x0080 /* SPKOUTR_DISABLE_DONE_EINT2 */ +#define CLEARWATER_SPKOUTR_DISABLE_DONE_EINT2_SHIFT 7 /* SPKOUTR_DISABLE_DONE_EINT2 */ +#define CLEARWATER_SPKOUTR_DISABLE_DONE_EINT2_WIDTH 1 /* SPKOUTR_DISABLE_DONE_EINT2 */ +#define CLEARWATER_SPKOUTL_DISABLE_DONE_EINT2 0x0040 /* SPKOUTL_DISABLE_DONE_EINT2 */ +#define CLEARWATER_SPKOUTL_DISABLE_DONE_EINT2_MASK 0x0040 /* SPKOUTL_DISABLE_DONE_EINT2 */ +#define CLEARWATER_SPKOUTL_DISABLE_DONE_EINT2_SHIFT 6 /* SPKOUTL_DISABLE_DONE_EINT2 */ +#define CLEARWATER_SPKOUTL_DISABLE_DONE_EINT2_WIDTH 1 /* SPKOUTL_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP3R_DISABLE_DONE_EINT2 0x0020 /* HP3R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP3R_DISABLE_DONE_EINT2_MASK 0x0020 /* HP3R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP3R_DISABLE_DONE_EINT2_SHIFT 5 /* HP3R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP3R_DISABLE_DONE_EINT2_WIDTH 1 /* HP3R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP3L_DISABLE_DONE_EINT2 0x0010 /* HP3L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP3L_DISABLE_DONE_EINT2_MASK 0x0010 /* HP3L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP3L_DISABLE_DONE_EINT2_SHIFT 4 /* HP3L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP3L_DISABLE_DONE_EINT2_WIDTH 1 /* HP3L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP2R_DISABLE_DONE_EINT2 0x0008 /* HP2R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP2R_DISABLE_DONE_EINT2_MASK 0x0008 /* HP2R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP2R_DISABLE_DONE_EINT2_SHIFT 3 /* HP2R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP2R_DISABLE_DONE_EINT2_WIDTH 1 /* HP2R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP2L_DISABLE_DONE_EINT2 0x0004 /* HP2L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP2L_DISABLE_DONE_EINT2_MASK 0x0004 /* HP2L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP2L_DISABLE_DONE_EINT2_SHIFT 2 /* HP2L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP2L_DISABLE_DONE_EINT2_WIDTH 1 /* HP2L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP1R_DISABLE_DONE_EINT2 0x0002 /* HP1R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP1R_DISABLE_DONE_EINT2_MASK 0x0002 /* HP1R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP1R_DISABLE_DONE_EINT2_SHIFT 1 /* HP1R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP1R_DISABLE_DONE_EINT2_WIDTH 1 /* HP1R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP1L_DISABLE_DONE_EINT2 0x0001 /* HP1L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP1L_DISABLE_DONE_EINT2_MASK 0x0001 /* HP1L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP1L_DISABLE_DONE_EINT2_SHIFT 0 /* HP1L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_HP1L_DISABLE_DONE_EINT2_WIDTH 1 /* HP1L_DISABLE_DONE_EINT2 */ /* * R6414 (0x190E) - IRQ2 Status 15 */ -#define WM8285_SPK_OVERHEAT_WARN_EINT2 0x0004 /* SPK_OVERHEAT_WARN_EINT2 */ -#define WM8285_SPK_OVERHEAT_WARN_EINT2_MASK 0x0004 /* SPK_OVERHEAT_WARN_EINT2 */ -#define WM8285_SPK_OVERHEAT_WARN_EINT2_SHIFT 2 /* SPK_OVERHEAT_WARN_EINT2 */ -#define WM8285_SPK_OVERHEAT_WARN_EINT2_WIDTH 1 /* SPK_OVERHEAT_WARN_EINT2 */ -#define WM8285_SPK_OVERHEAT_EINT2 0x0002 /* SPK_OVERHEAT_EINT2 */ -#define WM8285_SPK_OVERHEAT_EINT2_MASK 0x0002 /* SPK_OVERHEAT_EINT2 */ -#define WM8285_SPK_OVERHEAT_EINT2_SHIFT 1 /* SPK_OVERHEAT_EINT2 */ -#define WM8285_SPK_OVERHEAT_EINT2_WIDTH 1 /* SPK_OVERHEAT_EINT2 */ -#define WM8285_SPK_SHUTDOWN_EINT2 0x0001 /* SPK_SHUTDOWN_EINT2 */ -#define WM8285_SPK_SHUTDOWN_EINT2_MASK 0x0001 /* SPK_SHUTDOWN_EINT2 */ -#define WM8285_SPK_SHUTDOWN_EINT2_SHIFT 0 /* SPK_SHUTDOWN_EINT2 */ -#define WM8285_SPK_SHUTDOWN_EINT2_WIDTH 1 /* SPK_SHUTDOWN_EINT2 */ +#define CLEARWATER_SPK_OVERHEAT_WARN_EINT2 0x0004 /* SPK_OVERHEAT_WARN_EINT2 */ +#define CLEARWATER_SPK_OVERHEAT_WARN_EINT2_MASK 0x0004 /* SPK_OVERHEAT_WARN_EINT2 */ +#define CLEARWATER_SPK_OVERHEAT_WARN_EINT2_SHIFT 2 /* SPK_OVERHEAT_WARN_EINT2 */ +#define CLEARWATER_SPK_OVERHEAT_WARN_EINT2_WIDTH 1 /* SPK_OVERHEAT_WARN_EINT2 */ +#define CLEARWATER_SPK_OVERHEAT_EINT2 0x0002 /* SPK_OVERHEAT_EINT2 */ +#define CLEARWATER_SPK_OVERHEAT_EINT2_MASK 0x0002 /* SPK_OVERHEAT_EINT2 */ +#define CLEARWATER_SPK_OVERHEAT_EINT2_SHIFT 1 /* SPK_OVERHEAT_EINT2 */ +#define CLEARWATER_SPK_OVERHEAT_EINT2_WIDTH 1 /* SPK_OVERHEAT_EINT2 */ +#define CLEARWATER_SPK_SHUTDOWN_EINT2 0x0001 /* SPK_SHUTDOWN_EINT2 */ +#define CLEARWATER_SPK_SHUTDOWN_EINT2_MASK 0x0001 /* SPK_SHUTDOWN_EINT2 */ +#define CLEARWATER_SPK_SHUTDOWN_EINT2_SHIFT 0 /* SPK_SHUTDOWN_EINT2 */ +#define CLEARWATER_SPK_SHUTDOWN_EINT2_WIDTH 1 /* SPK_SHUTDOWN_EINT2 */ /* * R6464 (0x1940) - IRQ2 Mask 1 */ -#define WM8285_IM_DSP_SHARED_WR_COLL_EINT2 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT2 */ -#define WM8285_IM_DSP_SHARED_WR_COLL_EINT2_MASK 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT2 */ -#define WM8285_IM_DSP_SHARED_WR_COLL_EINT2_SHIFT 15 /* IM_DSP_SHARED_WR_COLL_EINT2 */ -#define WM8285_IM_DSP_SHARED_WR_COLL_EINT2_WIDTH 1 /* IM_DSP_SHARED_WR_COLL_EINT2 */ -#define WM8285_IM_CTRLIF_ERR_EINT2 0x1000 /* IM_CTRLIF_ERR_EINT2 */ -#define WM8285_IM_CTRLIF_ERR_EINT2_MASK 0x1000 /* IM_CTRLIF_ERR_EINT2 */ -#define WM8285_IM_CTRLIF_ERR_EINT2_SHIFT 12 /* IM_CTRLIF_ERR_EINT2 */ -#define WM8285_IM_CTRLIF_ERR_EINT2_WIDTH 1 /* IM_CTRLIF_ERR_EINT2 */ -#define WM8285_IM_IRQ_NO_CLOCK_EINT2 0x0200 /* IM_IRQ_NO_CLOCK_EINT2 */ -#define WM8285_IM_IRQ_NO_CLOCK_EINT2_MASK 0x0200 /* IM_IRQ_NO_CLOCK_EINT2 */ -#define WM8285_IM_IRQ_NO_CLOCK_EINT2_SHIFT 9 /* IM_IRQ_NO_CLOCK_EINT2 */ -#define WM8285_IM_IRQ_NO_CLOCK_EINT2_WIDTH 1 /* IM_IRQ_NO_CLOCK_EINT2 */ -#define WM8285_IM_CLOCK_DETECT_EINT2 0x0100 /* IM_CLOCK_DETECT_EINT2 */ -#define WM8285_IM_CLOCK_DETECT_EINT2_MASK 0x0100 /* IM_CLOCK_DETECT_EINT2 */ -#define WM8285_IM_CLOCK_DETECT_EINT2_SHIFT 8 /* IM_CLOCK_DETECT_EINT2 */ -#define WM8285_IM_CLOCK_DETECT_EINT2_WIDTH 1 /* IM_CLOCK_DETECT_EINT2 */ -#define WM8285_IM_BOOT_DONE_EINT2 0x0080 /* IM_BOOT_DONE_EINT2 */ -#define WM8285_IM_BOOT_DONE_EINT2_MASK 0x0080 /* IM_BOOT_DONE_EINT2 */ -#define WM8285_IM_BOOT_DONE_EINT2_SHIFT 7 /* IM_BOOT_DONE_EINT2 */ -#define WM8285_IM_BOOT_DONE_EINT2_WIDTH 1 /* IM_BOOT_DONE_EINT2 */ +#define CLEARWATER_IM_DSP_SHARED_WR_COLL_EINT2 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT2 */ +#define CLEARWATER_IM_DSP_SHARED_WR_COLL_EINT2_MASK 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT2 */ +#define CLEARWATER_IM_DSP_SHARED_WR_COLL_EINT2_SHIFT 15 /* IM_DSP_SHARED_WR_COLL_EINT2 */ +#define CLEARWATER_IM_DSP_SHARED_WR_COLL_EINT2_WIDTH 1 /* IM_DSP_SHARED_WR_COLL_EINT2 */ +#define CLEARWATER_IM_CTRLIF_ERR_EINT2 0x1000 /* IM_CTRLIF_ERR_EINT2 */ +#define CLEARWATER_IM_CTRLIF_ERR_EINT2_MASK 0x1000 /* IM_CTRLIF_ERR_EINT2 */ +#define CLEARWATER_IM_CTRLIF_ERR_EINT2_SHIFT 12 /* IM_CTRLIF_ERR_EINT2 */ +#define CLEARWATER_IM_CTRLIF_ERR_EINT2_WIDTH 1 /* IM_CTRLIF_ERR_EINT2 */ +#define CLEARWATER_IM_IRQ_NO_CLOCK_EINT2 0x0200 /* IM_IRQ_NO_CLOCK_EINT2 */ +#define CLEARWATER_IM_IRQ_NO_CLOCK_EINT2_MASK 0x0200 /* IM_IRQ_NO_CLOCK_EINT2 */ +#define CLEARWATER_IM_IRQ_NO_CLOCK_EINT2_SHIFT 9 /* IM_IRQ_NO_CLOCK_EINT2 */ +#define CLEARWATER_IM_IRQ_NO_CLOCK_EINT2_WIDTH 1 /* IM_IRQ_NO_CLOCK_EINT2 */ +#define CLEARWATER_IM_CLOCK_DETECT_EINT2 0x0100 /* IM_CLOCK_DETECT_EINT2 */ +#define CLEARWATER_IM_CLOCK_DETECT_EINT2_MASK 0x0100 /* IM_CLOCK_DETECT_EINT2 */ +#define CLEARWATER_IM_CLOCK_DETECT_EINT2_SHIFT 8 /* IM_CLOCK_DETECT_EINT2 */ +#define CLEARWATER_IM_CLOCK_DETECT_EINT2_WIDTH 1 /* IM_CLOCK_DETECT_EINT2 */ +#define CLEARWATER_IM_BOOT_DONE_EINT2 0x0080 /* IM_BOOT_DONE_EINT2 */ +#define CLEARWATER_IM_BOOT_DONE_EINT2_MASK 0x0080 /* IM_BOOT_DONE_EINT2 */ +#define CLEARWATER_IM_BOOT_DONE_EINT2_SHIFT 7 /* IM_BOOT_DONE_EINT2 */ +#define CLEARWATER_IM_BOOT_DONE_EINT2_WIDTH 1 /* IM_BOOT_DONE_EINT2 */ /* * R6465 (0x1941) - IRQ2 Mask 2 */ -#define WM8285_IM_FLL3_LOCK_EINT2 0x0400 /* IM_FLL3_LOCK_EINT2 */ -#define WM8285_IM_FLL3_LOCK_EINT2_MASK 0x0400 /* IM_FLL3_LOCK_EINT2 */ -#define WM8285_IM_FLL3_LOCK_EINT2_SHIFT 10 /* IM_FLL3_LOCK_EINT2 */ -#define WM8285_IM_FLL3_LOCK_EINT2_WIDTH 1 /* IM_FLL3_LOCK_EINT2 */ -#define WM8285_IM_FLL2_LOCK_EINT2 0x0200 /* IM_FLL2_LOCK_EINT2 */ -#define WM8285_IM_FLL2_LOCK_EINT2_MASK 0x0200 /* IM_FLL2_LOCK_EINT2 */ -#define WM8285_IM_FLL2_LOCK_EINT2_SHIFT 9 /* IM_FLL2_LOCK_EINT2 */ -#define WM8285_IM_FLL2_LOCK_EINT2_WIDTH 1 /* IM_FLL2_LOCK_EINT2 */ -#define WM8285_IM_FLL1_LOCK_EINT2 0x0100 /* IM_FLL1_LOCK_EINT2 */ -#define WM8285_IM_FLL1_LOCK_EINT2_MASK 0x0100 /* IM_FLL1_LOCK_EINT2 */ -#define WM8285_IM_FLL1_LOCK_EINT2_SHIFT 8 /* IM_FLL1_LOCK_EINT2 */ -#define WM8285_IM_FLL1_LOCK_EINT2_WIDTH 1 /* IM_FLL1_LOCK_EINT2 */ +#define CLEARWATER_IM_FLL3_LOCK_EINT2 0x0400 /* IM_FLL3_LOCK_EINT2 */ +#define CLEARWATER_IM_FLL3_LOCK_EINT2_MASK 0x0400 /* IM_FLL3_LOCK_EINT2 */ +#define CLEARWATER_IM_FLL3_LOCK_EINT2_SHIFT 10 /* IM_FLL3_LOCK_EINT2 */ +#define CLEARWATER_IM_FLL3_LOCK_EINT2_WIDTH 1 /* IM_FLL3_LOCK_EINT2 */ +#define CLEARWATER_IM_FLL2_LOCK_EINT2 0x0200 /* IM_FLL2_LOCK_EINT2 */ +#define CLEARWATER_IM_FLL2_LOCK_EINT2_MASK 0x0200 /* IM_FLL2_LOCK_EINT2 */ +#define CLEARWATER_IM_FLL2_LOCK_EINT2_SHIFT 9 /* IM_FLL2_LOCK_EINT2 */ +#define CLEARWATER_IM_FLL2_LOCK_EINT2_WIDTH 1 /* IM_FLL2_LOCK_EINT2 */ +#define CLEARWATER_IM_FLL1_LOCK_EINT2 0x0100 /* IM_FLL1_LOCK_EINT2 */ +#define CLEARWATER_IM_FLL1_LOCK_EINT2_MASK 0x0100 /* IM_FLL1_LOCK_EINT2 */ +#define CLEARWATER_IM_FLL1_LOCK_EINT2_SHIFT 8 /* IM_FLL1_LOCK_EINT2 */ +#define CLEARWATER_IM_FLL1_LOCK_EINT2_WIDTH 1 /* IM_FLL1_LOCK_EINT2 */ /* * R6469 (0x1945) - IRQ2 Mask 6 */ -#define WM8285_IM_MICDET_EINT2 0x0100 /* IM_MICDET_EINT2 */ -#define WM8285_IM_MICDET_EINT2_MASK 0x0100 /* IM_MICDET_EINT2 */ -#define WM8285_IM_MICDET_EINT2_SHIFT 8 /* IM_MICDET_EINT2 */ -#define WM8285_IM_MICDET_EINT2_WIDTH 1 /* IM_MICDET_EINT2 */ -#define WM8285_IM_HPDET_EINT2 0x0001 /* IM_HPDET_EINT2 */ -#define WM8285_IM_HPDET_EINT2_MASK 0x0001 /* IM_HPDET_EINT2 */ -#define WM8285_IM_HPDET_EINT2_SHIFT 0 /* IM_HPDET_EINT2 */ -#define WM8285_IM_HPDET_EINT2_WIDTH 1 /* IM_HPDET_EINT2 */ +#define CLEARWATER_IM_MICDET_EINT2 0x0100 /* IM_MICDET_EINT2 */ +#define CLEARWATER_IM_MICDET_EINT2_MASK 0x0100 /* IM_MICDET_EINT2 */ +#define CLEARWATER_IM_MICDET_EINT2_SHIFT 8 /* IM_MICDET_EINT2 */ +#define CLEARWATER_IM_MICDET_EINT2_WIDTH 1 /* IM_MICDET_EINT2 */ +#define CLEARWATER_IM_HPDET_EINT2 0x0001 /* IM_HPDET_EINT2 */ +#define CLEARWATER_IM_HPDET_EINT2_MASK 0x0001 /* IM_HPDET_EINT2 */ +#define CLEARWATER_IM_HPDET_EINT2_SHIFT 0 /* IM_HPDET_EINT2 */ +#define CLEARWATER_IM_HPDET_EINT2_WIDTH 1 /* IM_HPDET_EINT2 */ /* * R6470 (0x1946) - IRQ2 Mask 7 */ -#define WM8285_IM_MICD_CLAMP_FALL_EINT2 0x0020 /* IM_MICD_CLAMP_FALL_EINT2 */ -#define WM8285_IM_MICD_CLAMP_FALL_EINT2_MASK 0x0020 /* IM_MICD_CLAMP_FALL_EINT2 */ -#define WM8285_IM_MICD_CLAMP_FALL_EINT2_SHIFT 5 /* IM_MICD_CLAMP_FALL_EINT2 */ -#define WM8285_IM_MICD_CLAMP_FALL_EINT2_WIDTH 1 /* IM_MICD_CLAMP_FALL_EINT2 */ -#define WM8285_IM_MICD_CLAMP_RISE_EINT2 0x0010 /* IM_MICD_CLAMP_RISE_EINT2 */ -#define WM8285_IM_MICD_CLAMP_RISE_EINT2_MASK 0x0010 /* IM_MICD_CLAMP_RISE_EINT2 */ -#define WM8285_IM_MICD_CLAMP_RISE_EINT2_SHIFT 4 /* IM_MICD_CLAMP_RISE_EINT2 */ -#define WM8285_IM_MICD_CLAMP_RISE_EINT2_WIDTH 1 /* IM_MICD_CLAMP_RISE_EINT2 */ -#define WM8285_IM_JD2_FALL_EINT2 0x0008 /* IM_JD2_FALL_EINT2 */ -#define WM8285_IM_JD2_FALL_EINT2_MASK 0x0008 /* IM_JD2_FALL_EINT2 */ -#define WM8285_IM_JD2_FALL_EINT2_SHIFT 3 /* IM_JD2_FALL_EINT2 */ -#define WM8285_IM_JD2_FALL_EINT2_WIDTH 1 /* IM_JD2_FALL_EINT2 */ -#define WM8285_IM_JD2_RISE_EINT2 0x0004 /* IM_JD2_RISE_EINT2 */ -#define WM8285_IM_JD2_RISE_EINT2_MASK 0x0004 /* IM_JD2_RISE_EINT2 */ -#define WM8285_IM_JD2_RISE_EINT2_SHIFT 2 /* IM_JD2_RISE_EINT2 */ -#define WM8285_IM_JD2_RISE_EINT2_WIDTH 1 /* IM_JD2_RISE_EINT2 */ -#define WM8285_IM_JD1_FALL_EINT2 0x0002 /* IM_JD1_FALL_EINT2 */ -#define WM8285_IM_JD1_FALL_EINT2_MASK 0x0002 /* IM_JD1_FALL_EINT2 */ -#define WM8285_IM_JD1_FALL_EINT2_SHIFT 1 /* IM_JD1_FALL_EINT2 */ -#define WM8285_IM_JD1_FALL_EINT2_WIDTH 1 /* IM_JD1_FALL_EINT2 */ -#define WM8285_IM_JD1_RISE_EINT2 0x0001 /* IM_JD1_RISE_EINT2 */ -#define WM8285_IM_JD1_RISE_EINT2_MASK 0x0001 /* IM_JD1_RISE_EINT2 */ -#define WM8285_IM_JD1_RISE_EINT2_SHIFT 0 /* IM_JD1_RISE_EINT2 */ -#define WM8285_IM_JD1_RISE_EINT2_WIDTH 1 /* IM_JD1_RISE_EINT2 */ +#define CLEARWATER_IM_MICD_CLAMP_FALL_EINT2 0x0020 /* IM_MICD_CLAMP_FALL_EINT2 */ +#define CLEARWATER_IM_MICD_CLAMP_FALL_EINT2_MASK 0x0020 /* IM_MICD_CLAMP_FALL_EINT2 */ +#define CLEARWATER_IM_MICD_CLAMP_FALL_EINT2_SHIFT 5 /* IM_MICD_CLAMP_FALL_EINT2 */ +#define CLEARWATER_IM_MICD_CLAMP_FALL_EINT2_WIDTH 1 /* IM_MICD_CLAMP_FALL_EINT2 */ +#define CLEARWATER_IM_MICD_CLAMP_RISE_EINT2 0x0010 /* IM_MICD_CLAMP_RISE_EINT2 */ +#define CLEARWATER_IM_MICD_CLAMP_RISE_EINT2_MASK 0x0010 /* IM_MICD_CLAMP_RISE_EINT2 */ +#define CLEARWATER_IM_MICD_CLAMP_RISE_EINT2_SHIFT 4 /* IM_MICD_CLAMP_RISE_EINT2 */ +#define CLEARWATER_IM_MICD_CLAMP_RISE_EINT2_WIDTH 1 /* IM_MICD_CLAMP_RISE_EINT2 */ +#define CLEARWATER_IM_JD2_FALL_EINT2 0x0008 /* IM_JD2_FALL_EINT2 */ +#define CLEARWATER_IM_JD2_FALL_EINT2_MASK 0x0008 /* IM_JD2_FALL_EINT2 */ +#define CLEARWATER_IM_JD2_FALL_EINT2_SHIFT 3 /* IM_JD2_FALL_EINT2 */ +#define CLEARWATER_IM_JD2_FALL_EINT2_WIDTH 1 /* IM_JD2_FALL_EINT2 */ +#define CLEARWATER_IM_JD2_RISE_EINT2 0x0004 /* IM_JD2_RISE_EINT2 */ +#define CLEARWATER_IM_JD2_RISE_EINT2_MASK 0x0004 /* IM_JD2_RISE_EINT2 */ +#define CLEARWATER_IM_JD2_RISE_EINT2_SHIFT 2 /* IM_JD2_RISE_EINT2 */ +#define CLEARWATER_IM_JD2_RISE_EINT2_WIDTH 1 /* IM_JD2_RISE_EINT2 */ +#define CLEARWATER_IM_JD1_FALL_EINT2 0x0002 /* IM_JD1_FALL_EINT2 */ +#define CLEARWATER_IM_JD1_FALL_EINT2_MASK 0x0002 /* IM_JD1_FALL_EINT2 */ +#define CLEARWATER_IM_JD1_FALL_EINT2_SHIFT 1 /* IM_JD1_FALL_EINT2 */ +#define CLEARWATER_IM_JD1_FALL_EINT2_WIDTH 1 /* IM_JD1_FALL_EINT2 */ +#define CLEARWATER_IM_JD1_RISE_EINT2 0x0001 /* IM_JD1_RISE_EINT2 */ +#define CLEARWATER_IM_JD1_RISE_EINT2_MASK 0x0001 /* IM_JD1_RISE_EINT2 */ +#define CLEARWATER_IM_JD1_RISE_EINT2_SHIFT 0 /* IM_JD1_RISE_EINT2 */ +#define CLEARWATER_IM_JD1_RISE_EINT2_WIDTH 1 /* IM_JD1_RISE_EINT2 */ /* * R6472 (0x1948) - IRQ2 Mask 9 */ -#define WM8285_IM_ASRC2_IN2_LOCK_EINT2 0x0800 /* IM_ASRC2_IN2_LOCK_EINT2 */ -#define WM8285_IM_ASRC2_IN2_LOCK_EINT2_MASK 0x0800 /* IM_ASRC2_IN2_LOCK_EINT2 */ -#define WM8285_IM_ASRC2_IN2_LOCK_EINT2_SHIFT 11 /* IM_ASRC2_IN2_LOCK_EINT2 */ -#define WM8285_IM_ASRC2_IN2_LOCK_EINT2_WIDTH 1 /* IM_ASRC2_IN2_LOCK_EINT2 */ -#define WM8285_IM_ASRC2_IN1_LOCK_EINT2 0x0400 /* IM_ASRC2_IN1_LOCK_EINT2 */ -#define WM8285_IM_ASRC2_IN1_LOCK_EINT2_MASK 0x0400 /* IM_ASRC2_IN1_LOCK_EINT2 */ -#define WM8285_IM_ASRC2_IN1_LOCK_EINT2_SHIFT 10 /* IM_ASRC2_IN1_LOCK_EINT2 */ -#define WM8285_IM_ASRC2_IN1_LOCK_EINT2_WIDTH 1 /* IM_ASRC2_IN1_LOCK_EINT2 */ -#define WM8285_IM_ASRC1_IN2_LOCK_EINT2 0x0200 /* IM_ASRC1_IN2_LOCK_EINT2 */ -#define WM8285_IM_ASRC1_IN2_LOCK_EINT2_MASK 0x0200 /* IM_ASRC1_IN2_LOCK_EINT2 */ -#define WM8285_IM_ASRC1_IN2_LOCK_EINT2_SHIFT 9 /* IM_ASRC1_IN2_LOCK_EINT2 */ -#define WM8285_IM_ASRC1_IN2_LOCK_EINT2_WIDTH 1 /* IM_ASRC1_IN2_LOCK_EINT2 */ -#define WM8285_IM_ASRC1_IN1_LOCK_EINT2 0x0100 /* IM_ASRC1_IN1_LOCK_EINT2 */ -#define WM8285_IM_ASRC1_IN1_LOCK_EINT2_MASK 0x0100 /* IM_ASRC1_IN1_LOCK_EINT2 */ -#define WM8285_IM_ASRC1_IN1_LOCK_EINT2_SHIFT 8 /* IM_ASRC1_IN1_LOCK_EINT2 */ -#define WM8285_IM_ASRC1_IN1_LOCK_EINT2_WIDTH 1 /* IM_ASRC1_IN1_LOCK_EINT2 */ -#define WM8285_IM_DRC2_SIG_DET_EINT2 0x0002 /* IM_DRC2_SIG_DET_EINT2 */ -#define WM8285_IM_DRC2_SIG_DET_EINT2_MASK 0x0002 /* IM_DRC2_SIG_DET_EINT2 */ -#define WM8285_IM_DRC2_SIG_DET_EINT2_SHIFT 1 /* IM_DRC2_SIG_DET_EINT2 */ -#define WM8285_IM_DRC2_SIG_DET_EINT2_WIDTH 1 /* IM_DRC2_SIG_DET_EINT2 */ -#define WM8285_IM_DRC1_SIG_DET_EINT2 0x0001 /* IM_DRC1_SIG_DET_EINT2 */ -#define WM8285_IM_DRC1_SIG_DET_EINT2_MASK 0x0001 /* IM_DRC1_SIG_DET_EINT2 */ -#define WM8285_IM_DRC1_SIG_DET_EINT2_SHIFT 0 /* IM_DRC1_SIG_DET_EINT2 */ -#define WM8285_IM_DRC1_SIG_DET_EINT2_WIDTH 1 /* IM_DRC1_SIG_DET_EINT2 */ +#define CLEARWATER_IM_ASRC2_IN2_LOCK_EINT2 0x0800 /* IM_ASRC2_IN2_LOCK_EINT2 */ +#define CLEARWATER_IM_ASRC2_IN2_LOCK_EINT2_MASK 0x0800 /* IM_ASRC2_IN2_LOCK_EINT2 */ +#define CLEARWATER_IM_ASRC2_IN2_LOCK_EINT2_SHIFT 11 /* IM_ASRC2_IN2_LOCK_EINT2 */ +#define CLEARWATER_IM_ASRC2_IN2_LOCK_EINT2_WIDTH 1 /* IM_ASRC2_IN2_LOCK_EINT2 */ +#define CLEARWATER_IM_ASRC2_IN1_LOCK_EINT2 0x0400 /* IM_ASRC2_IN1_LOCK_EINT2 */ +#define CLEARWATER_IM_ASRC2_IN1_LOCK_EINT2_MASK 0x0400 /* IM_ASRC2_IN1_LOCK_EINT2 */ +#define CLEARWATER_IM_ASRC2_IN1_LOCK_EINT2_SHIFT 10 /* IM_ASRC2_IN1_LOCK_EINT2 */ +#define CLEARWATER_IM_ASRC2_IN1_LOCK_EINT2_WIDTH 1 /* IM_ASRC2_IN1_LOCK_EINT2 */ +#define CLEARWATER_IM_ASRC1_IN2_LOCK_EINT2 0x0200 /* IM_ASRC1_IN2_LOCK_EINT2 */ +#define CLEARWATER_IM_ASRC1_IN2_LOCK_EINT2_MASK 0x0200 /* IM_ASRC1_IN2_LOCK_EINT2 */ +#define CLEARWATER_IM_ASRC1_IN2_LOCK_EINT2_SHIFT 9 /* IM_ASRC1_IN2_LOCK_EINT2 */ +#define CLEARWATER_IM_ASRC1_IN2_LOCK_EINT2_WIDTH 1 /* IM_ASRC1_IN2_LOCK_EINT2 */ +#define CLEARWATER_IM_ASRC1_IN1_LOCK_EINT2 0x0100 /* IM_ASRC1_IN1_LOCK_EINT2 */ +#define CLEARWATER_IM_ASRC1_IN1_LOCK_EINT2_MASK 0x0100 /* IM_ASRC1_IN1_LOCK_EINT2 */ +#define CLEARWATER_IM_ASRC1_IN1_LOCK_EINT2_SHIFT 8 /* IM_ASRC1_IN1_LOCK_EINT2 */ +#define CLEARWATER_IM_ASRC1_IN1_LOCK_EINT2_WIDTH 1 /* IM_ASRC1_IN1_LOCK_EINT2 */ +#define CLEARWATER_IM_DRC2_SIG_DET_EINT2 0x0002 /* IM_DRC2_SIG_DET_EINT2 */ +#define CLEARWATER_IM_DRC2_SIG_DET_EINT2_MASK 0x0002 /* IM_DRC2_SIG_DET_EINT2 */ +#define CLEARWATER_IM_DRC2_SIG_DET_EINT2_SHIFT 1 /* IM_DRC2_SIG_DET_EINT2 */ +#define CLEARWATER_IM_DRC2_SIG_DET_EINT2_WIDTH 1 /* IM_DRC2_SIG_DET_EINT2 */ +#define CLEARWATER_IM_DRC1_SIG_DET_EINT2 0x0001 /* IM_DRC1_SIG_DET_EINT2 */ +#define CLEARWATER_IM_DRC1_SIG_DET_EINT2_MASK 0x0001 /* IM_DRC1_SIG_DET_EINT2 */ +#define CLEARWATER_IM_DRC1_SIG_DET_EINT2_SHIFT 0 /* IM_DRC1_SIG_DET_EINT2 */ +#define CLEARWATER_IM_DRC1_SIG_DET_EINT2_WIDTH 1 /* IM_DRC1_SIG_DET_EINT2 */ /* * R6474 (0x194A) - IRQ2 Mask 11 */ -#define WM8285_IM_DSP_IRQ16_EINT2 0x8000 /* IM_DSP_IRQ16_EINT2 */ -#define WM8285_IM_DSP_IRQ16_EINT2_MASK 0x8000 /* IM_DSP_IRQ16_EINT2 */ -#define WM8285_IM_DSP_IRQ16_EINT2_SHIFT 15 /* IM_DSP_IRQ16_EINT2 */ -#define WM8285_IM_DSP_IRQ16_EINT2_WIDTH 1 /* IM_DSP_IRQ16_EINT2 */ -#define WM8285_IM_DSP_IRQ15_EINT2 0x4000 /* IM_DSP_IRQ15_EINT2 */ -#define WM8285_IM_DSP_IRQ15_EINT2_MASK 0x4000 /* IM_DSP_IRQ15_EINT2 */ -#define WM8285_IM_DSP_IRQ15_EINT2_SHIFT 14 /* IM_DSP_IRQ15_EINT2 */ -#define WM8285_IM_DSP_IRQ15_EINT2_WIDTH 1 /* IM_DSP_IRQ15_EINT2 */ -#define WM8285_IM_DSP_IRQ14_EINT2 0x2000 /* IM_DSP_IRQ14_EINT2 */ -#define WM8285_IM_DSP_IRQ14_EINT2_MASK 0x2000 /* IM_DSP_IRQ14_EINT2 */ -#define WM8285_IM_DSP_IRQ14_EINT2_SHIFT 13 /* IM_DSP_IRQ14_EINT2 */ -#define WM8285_IM_DSP_IRQ14_EINT2_WIDTH 1 /* IM_DSP_IRQ14_EINT2 */ -#define WM8285_IM_DSP_IRQ13_EINT2 0x1000 /* IM_DSP_IRQ13_EINT2 */ -#define WM8285_IM_DSP_IRQ13_EINT2_MASK 0x1000 /* IM_DSP_IRQ13_EINT2 */ -#define WM8285_IM_DSP_IRQ13_EINT2_SHIFT 12 /* IM_DSP_IRQ13_EINT2 */ -#define WM8285_IM_DSP_IRQ13_EINT2_WIDTH 1 /* IM_DSP_IRQ13_EINT2 */ -#define WM8285_IM_DSP_IRQ12_EINT2 0x0800 /* IM_DSP_IRQ12_EINT2 */ -#define WM8285_IM_DSP_IRQ12_EINT2_MASK 0x0800 /* IM_DSP_IRQ12_EINT2 */ -#define WM8285_IM_DSP_IRQ12_EINT2_SHIFT 11 /* IM_DSP_IRQ12_EINT2 */ -#define WM8285_IM_DSP_IRQ12_EINT2_WIDTH 1 /* IM_DSP_IRQ12_EINT2 */ -#define WM8285_IM_DSP_IRQ11_EINT2 0x0400 /* IM_DSP_IRQ11_EINT2 */ -#define WM8285_IM_DSP_IRQ11_EINT2_MASK 0x0400 /* IM_DSP_IRQ11_EINT2 */ -#define WM8285_IM_DSP_IRQ11_EINT2_SHIFT 10 /* IM_DSP_IRQ11_EINT2 */ -#define WM8285_IM_DSP_IRQ11_EINT2_WIDTH 1 /* IM_DSP_IRQ11_EINT2 */ -#define WM8285_IM_DSP_IRQ10_EINT2 0x0200 /* IM_DSP_IRQ10_EINT2 */ -#define WM8285_IM_DSP_IRQ10_EINT2_MASK 0x0200 /* IM_DSP_IRQ10_EINT2 */ -#define WM8285_IM_DSP_IRQ10_EINT2_SHIFT 9 /* IM_DSP_IRQ10_EINT2 */ -#define WM8285_IM_DSP_IRQ10_EINT2_WIDTH 1 /* IM_DSP_IRQ10_EINT2 */ -#define WM8285_IM_DSP_IRQ9_EINT2 0x0100 /* IM_DSP_IRQ9_EINT2 */ -#define WM8285_IM_DSP_IRQ9_EINT2_MASK 0x0100 /* IM_DSP_IRQ9_EINT2 */ -#define WM8285_IM_DSP_IRQ9_EINT2_SHIFT 8 /* IM_DSP_IRQ9_EINT2 */ -#define WM8285_IM_DSP_IRQ9_EINT2_WIDTH 1 /* IM_DSP_IRQ9_EINT2 */ -#define WM8285_IM_DSP_IRQ8_EINT2 0x0080 /* IM_DSP_IRQ8_EINT2 */ -#define WM8285_IM_DSP_IRQ8_EINT2_MASK 0x0080 /* IM_DSP_IRQ8_EINT2 */ -#define WM8285_IM_DSP_IRQ8_EINT2_SHIFT 7 /* IM_DSP_IRQ8_EINT2 */ -#define WM8285_IM_DSP_IRQ8_EINT2_WIDTH 1 /* IM_DSP_IRQ8_EINT2 */ -#define WM8285_IM_DSP_IRQ7_EINT2 0x0040 /* IM_DSP_IRQ7_EINT2 */ -#define WM8285_IM_DSP_IRQ7_EINT2_MASK 0x0040 /* IM_DSP_IRQ7_EINT2 */ -#define WM8285_IM_DSP_IRQ7_EINT2_SHIFT 6 /* IM_DSP_IRQ7_EINT2 */ -#define WM8285_IM_DSP_IRQ7_EINT2_WIDTH 1 /* IM_DSP_IRQ7_EINT2 */ -#define WM8285_IM_DSP_IRQ6_EINT2 0x0020 /* IM_DSP_IRQ6_EINT2 */ -#define WM8285_IM_DSP_IRQ6_EINT2_MASK 0x0020 /* IM_DSP_IRQ6_EINT2 */ -#define WM8285_IM_DSP_IRQ6_EINT2_SHIFT 5 /* IM_DSP_IRQ6_EINT2 */ -#define WM8285_IM_DSP_IRQ6_EINT2_WIDTH 1 /* IM_DSP_IRQ6_EINT2 */ -#define WM8285_IM_DSP_IRQ5_EINT2 0x0010 /* IM_DSP_IRQ5_EINT2 */ -#define WM8285_IM_DSP_IRQ5_EINT2_MASK 0x0010 /* IM_DSP_IRQ5_EINT2 */ -#define WM8285_IM_DSP_IRQ5_EINT2_SHIFT 4 /* IM_DSP_IRQ5_EINT2 */ -#define WM8285_IM_DSP_IRQ5_EINT2_WIDTH 1 /* IM_DSP_IRQ5_EINT2 */ -#define WM8285_IM_DSP_IRQ4_EINT2 0x0008 /* IM_DSP_IRQ4_EINT2 */ -#define WM8285_IM_DSP_IRQ4_EINT2_MASK 0x0008 /* IM_DSP_IRQ4_EINT2 */ -#define WM8285_IM_DSP_IRQ4_EINT2_SHIFT 3 /* IM_DSP_IRQ4_EINT2 */ -#define WM8285_IM_DSP_IRQ4_EINT2_WIDTH 1 /* IM_DSP_IRQ4_EINT2 */ -#define WM8285_IM_DSP_IRQ3_EINT2 0x0004 /* IM_DSP_IRQ3_EINT2 */ -#define WM8285_IM_DSP_IRQ3_EINT2_MASK 0x0004 /* IM_DSP_IRQ3_EINT2 */ -#define WM8285_IM_DSP_IRQ3_EINT2_SHIFT 2 /* IM_DSP_IRQ3_EINT2 */ -#define WM8285_IM_DSP_IRQ3_EINT2_WIDTH 1 /* IM_DSP_IRQ3_EINT2 */ -#define WM8285_IM_DSP_IRQ2_EINT2 0x0002 /* IM_DSP_IRQ2_EINT2 */ -#define WM8285_IM_DSP_IRQ2_EINT2_MASK 0x0002 /* IM_DSP_IRQ2_EINT2 */ -#define WM8285_IM_DSP_IRQ2_EINT2_SHIFT 1 /* IM_DSP_IRQ2_EINT2 */ -#define WM8285_IM_DSP_IRQ2_EINT2_WIDTH 1 /* IM_DSP_IRQ2_EINT2 */ -#define WM8285_IM_DSP_IRQ1_EINT2 0x0001 /* IM_DSP_IRQ1_EINT2 */ -#define WM8285_IM_DSP_IRQ1_EINT2_MASK 0x0001 /* IM_DSP_IRQ1_EINT2 */ -#define WM8285_IM_DSP_IRQ1_EINT2_SHIFT 0 /* IM_DSP_IRQ1_EINT2 */ -#define WM8285_IM_DSP_IRQ1_EINT2_WIDTH 1 /* IM_DSP_IRQ1_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ16_EINT2 0x8000 /* IM_DSP_IRQ16_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ16_EINT2_MASK 0x8000 /* IM_DSP_IRQ16_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ16_EINT2_SHIFT 15 /* IM_DSP_IRQ16_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ16_EINT2_WIDTH 1 /* IM_DSP_IRQ16_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ15_EINT2 0x4000 /* IM_DSP_IRQ15_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ15_EINT2_MASK 0x4000 /* IM_DSP_IRQ15_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ15_EINT2_SHIFT 14 /* IM_DSP_IRQ15_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ15_EINT2_WIDTH 1 /* IM_DSP_IRQ15_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ14_EINT2 0x2000 /* IM_DSP_IRQ14_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ14_EINT2_MASK 0x2000 /* IM_DSP_IRQ14_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ14_EINT2_SHIFT 13 /* IM_DSP_IRQ14_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ14_EINT2_WIDTH 1 /* IM_DSP_IRQ14_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ13_EINT2 0x1000 /* IM_DSP_IRQ13_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ13_EINT2_MASK 0x1000 /* IM_DSP_IRQ13_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ13_EINT2_SHIFT 12 /* IM_DSP_IRQ13_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ13_EINT2_WIDTH 1 /* IM_DSP_IRQ13_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ12_EINT2 0x0800 /* IM_DSP_IRQ12_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ12_EINT2_MASK 0x0800 /* IM_DSP_IRQ12_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ12_EINT2_SHIFT 11 /* IM_DSP_IRQ12_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ12_EINT2_WIDTH 1 /* IM_DSP_IRQ12_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ11_EINT2 0x0400 /* IM_DSP_IRQ11_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ11_EINT2_MASK 0x0400 /* IM_DSP_IRQ11_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ11_EINT2_SHIFT 10 /* IM_DSP_IRQ11_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ11_EINT2_WIDTH 1 /* IM_DSP_IRQ11_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ10_EINT2 0x0200 /* IM_DSP_IRQ10_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ10_EINT2_MASK 0x0200 /* IM_DSP_IRQ10_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ10_EINT2_SHIFT 9 /* IM_DSP_IRQ10_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ10_EINT2_WIDTH 1 /* IM_DSP_IRQ10_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ9_EINT2 0x0100 /* IM_DSP_IRQ9_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ9_EINT2_MASK 0x0100 /* IM_DSP_IRQ9_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ9_EINT2_SHIFT 8 /* IM_DSP_IRQ9_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ9_EINT2_WIDTH 1 /* IM_DSP_IRQ9_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ8_EINT2 0x0080 /* IM_DSP_IRQ8_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ8_EINT2_MASK 0x0080 /* IM_DSP_IRQ8_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ8_EINT2_SHIFT 7 /* IM_DSP_IRQ8_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ8_EINT2_WIDTH 1 /* IM_DSP_IRQ8_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ7_EINT2 0x0040 /* IM_DSP_IRQ7_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ7_EINT2_MASK 0x0040 /* IM_DSP_IRQ7_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ7_EINT2_SHIFT 6 /* IM_DSP_IRQ7_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ7_EINT2_WIDTH 1 /* IM_DSP_IRQ7_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ6_EINT2 0x0020 /* IM_DSP_IRQ6_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ6_EINT2_MASK 0x0020 /* IM_DSP_IRQ6_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ6_EINT2_SHIFT 5 /* IM_DSP_IRQ6_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ6_EINT2_WIDTH 1 /* IM_DSP_IRQ6_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ5_EINT2 0x0010 /* IM_DSP_IRQ5_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ5_EINT2_MASK 0x0010 /* IM_DSP_IRQ5_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ5_EINT2_SHIFT 4 /* IM_DSP_IRQ5_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ5_EINT2_WIDTH 1 /* IM_DSP_IRQ5_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ4_EINT2 0x0008 /* IM_DSP_IRQ4_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ4_EINT2_MASK 0x0008 /* IM_DSP_IRQ4_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ4_EINT2_SHIFT 3 /* IM_DSP_IRQ4_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ4_EINT2_WIDTH 1 /* IM_DSP_IRQ4_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ3_EINT2 0x0004 /* IM_DSP_IRQ3_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ3_EINT2_MASK 0x0004 /* IM_DSP_IRQ3_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ3_EINT2_SHIFT 2 /* IM_DSP_IRQ3_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ3_EINT2_WIDTH 1 /* IM_DSP_IRQ3_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ2_EINT2 0x0002 /* IM_DSP_IRQ2_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ2_EINT2_MASK 0x0002 /* IM_DSP_IRQ2_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ2_EINT2_SHIFT 1 /* IM_DSP_IRQ2_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ2_EINT2_WIDTH 1 /* IM_DSP_IRQ2_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ1_EINT2 0x0001 /* IM_DSP_IRQ1_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ1_EINT2_MASK 0x0001 /* IM_DSP_IRQ1_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ1_EINT2_SHIFT 0 /* IM_DSP_IRQ1_EINT2 */ +#define CLEARWATER_IM_DSP_IRQ1_EINT2_WIDTH 1 /* IM_DSP_IRQ1_EINT2 */ /* * R6272 (0x1880) - IRQ1 Raw Status 1 */ -#define WM8285_DSP_SHARED_WR_COLL_STS1 0x8000 /* DSP_SHARED_WR_COLL_STS1 */ -#define WM8285_DSP_SHARED_WR_COLL_STS1_MASK 0x8000 /* DSP_SHARED_WR_COLL_STS1 */ -#define WM8285_DSP_SHARED_WR_COLL_STS1_SHIFT 15 /* DSP_SHARED_WR_COLL_STS1 */ -#define WM8285_DSP_SHARED_WR_COLL_STS1_WIDTH 1 /* DSP_SHARED_WR_COLL_STS1 */ -#define WM8285_CTRLIF_ERR_STS1 0x1000 /* CTRLIF_ERR_STS1 */ -#define WM8285_CTRLIF_ERR_STS1_MASK 0x1000 /* CTRLIF_ERR_STS1 */ -#define WM8285_CTRLIF_ERR_STS1_SHIFT 12 /* CTRLIF_ERR_STS1 */ -#define WM8285_CTRLIF_ERR_STS1_WIDTH 1 /* CTRLIF_ERR_STS1 */ -#define WM8285_IRQ_NO_CLOCK_STS1 0x0200 /* IRQ_NO_CLOCK_STS1 */ -#define WM8285_IRQ_NO_CLOCK_STS1_MASK 0x0200 /* IRQ_NO_CLOCK_STS1 */ -#define WM8285_IRQ_NO_CLOCK_STS1_SHIFT 9 /* IRQ_NO_CLOCK_STS1 */ -#define WM8285_IRQ_NO_CLOCK_STS1_WIDTH 1 /* IRQ_NO_CLOCK_STS1 */ -#define WM8285_CLOCK_DETECT_STS1 0x0100 /* CLOCK_DETECT_STS1 */ -#define WM8285_CLOCK_DETECT_STS1_MASK 0x0100 /* CLOCK_DETECT_STS1 */ -#define WM8285_CLOCK_DETECT_STS1_SHIFT 8 /* CLOCK_DETECT_STS1 */ -#define WM8285_CLOCK_DETECT_STS1_WIDTH 1 /* CLOCK_DETECT_STS1 */ -#define WM8285_BOOT_DONE_STS1 0x0080 /* BOOT_DONE_STS1 */ -#define WM8285_BOOT_DONE_STS1_MASK 0x0080 /* BOOT_DONE_STS1 */ -#define WM8285_BOOT_DONE_STS1_SHIFT 7 /* BOOT_DONE_STS1 */ -#define WM8285_BOOT_DONE_STS1_WIDTH 1 /* BOOT_DONE_STS1 */ +#define CLEARWATER_DSP_SHARED_WR_COLL_STS1 0x8000 /* DSP_SHARED_WR_COLL_STS1 */ +#define CLEARWATER_DSP_SHARED_WR_COLL_STS1_MASK 0x8000 /* DSP_SHARED_WR_COLL_STS1 */ +#define CLEARWATER_DSP_SHARED_WR_COLL_STS1_SHIFT 15 /* DSP_SHARED_WR_COLL_STS1 */ +#define CLEARWATER_DSP_SHARED_WR_COLL_STS1_WIDTH 1 /* DSP_SHARED_WR_COLL_STS1 */ +#define CLEARWATER_CTRLIF_ERR_STS1 0x1000 /* CTRLIF_ERR_STS1 */ +#define CLEARWATER_CTRLIF_ERR_STS1_MASK 0x1000 /* CTRLIF_ERR_STS1 */ +#define CLEARWATER_CTRLIF_ERR_STS1_SHIFT 12 /* CTRLIF_ERR_STS1 */ +#define CLEARWATER_CTRLIF_ERR_STS1_WIDTH 1 /* CTRLIF_ERR_STS1 */ +#define CLEARWATER_IRQ_NO_CLOCK_STS1 0x0200 /* IRQ_NO_CLOCK_STS1 */ +#define CLEARWATER_IRQ_NO_CLOCK_STS1_MASK 0x0200 /* IRQ_NO_CLOCK_STS1 */ +#define CLEARWATER_IRQ_NO_CLOCK_STS1_SHIFT 9 /* IRQ_NO_CLOCK_STS1 */ +#define CLEARWATER_IRQ_NO_CLOCK_STS1_WIDTH 1 /* IRQ_NO_CLOCK_STS1 */ +#define CLEARWATER_CLOCK_DETECT_STS1 0x0100 /* CLOCK_DETECT_STS1 */ +#define CLEARWATER_CLOCK_DETECT_STS1_MASK 0x0100 /* CLOCK_DETECT_STS1 */ +#define CLEARWATER_CLOCK_DETECT_STS1_SHIFT 8 /* CLOCK_DETECT_STS1 */ +#define CLEARWATER_CLOCK_DETECT_STS1_WIDTH 1 /* CLOCK_DETECT_STS1 */ +#define CLEARWATER_BOOT_DONE_STS1 0x0080 /* BOOT_DONE_STS1 */ +#define CLEARWATER_BOOT_DONE_STS1_MASK 0x0080 /* BOOT_DONE_STS1 */ +#define CLEARWATER_BOOT_DONE_STS1_SHIFT 7 /* BOOT_DONE_STS1 */ +#define CLEARWATER_BOOT_DONE_STS1_WIDTH 1 /* BOOT_DONE_STS1 */ /* * R6273 (0x1881) - IRQ1 Raw Status 2 */ -#define WM8285_FLL3_LOCK_STS1 0x0400 /* FLL3_LOCK_STS1 */ -#define WM8285_FLL3_LOCK_STS1_MASK 0x0400 /* FLL3_LOCK_STS1 */ -#define WM8285_FLL3_LOCK_STS1_SHIFT 10 /* FLL3_LOCK_STS1 */ -#define WM8285_FLL3_LOCK_STS1_WIDTH 1 /* FLL3_LOCK_STS1 */ -#define WM8285_FLL2_LOCK_STS1 0x0200 /* FLL2_LOCK_STS1 */ -#define WM8285_FLL2_LOCK_STS1_MASK 0x0200 /* FLL2_LOCK_STS1 */ -#define WM8285_FLL2_LOCK_STS1_SHIFT 9 /* FLL2_LOCK_STS1 */ -#define WM8285_FLL2_LOCK_STS1_WIDTH 1 /* FLL2_LOCK_STS1 */ -#define WM8285_FLL1_LOCK_STS1 0x0100 /* FLL1_LOCK_STS1 */ -#define WM8285_FLL1_LOCK_STS1_MASK 0x0100 /* FLL1_LOCK_STS1 */ -#define WM8285_FLL1_LOCK_STS1_SHIFT 8 /* FLL1_LOCK_STS1 */ -#define WM8285_FLL1_LOCK_STS1_WIDTH 1 /* FLL1_LOCK_STS1 */ +#define CLEARWATER_FLL3_LOCK_STS1 0x0400 /* FLL3_LOCK_STS1 */ +#define CLEARWATER_FLL3_LOCK_STS1_MASK 0x0400 /* FLL3_LOCK_STS1 */ +#define CLEARWATER_FLL3_LOCK_STS1_SHIFT 10 /* FLL3_LOCK_STS1 */ +#define CLEARWATER_FLL3_LOCK_STS1_WIDTH 1 /* FLL3_LOCK_STS1 */ +#define CLEARWATER_FLL2_LOCK_STS1 0x0200 /* FLL2_LOCK_STS1 */ +#define CLEARWATER_FLL2_LOCK_STS1_MASK 0x0200 /* FLL2_LOCK_STS1 */ +#define CLEARWATER_FLL2_LOCK_STS1_SHIFT 9 /* FLL2_LOCK_STS1 */ +#define CLEARWATER_FLL2_LOCK_STS1_WIDTH 1 /* FLL2_LOCK_STS1 */ +#define CLEARWATER_FLL1_LOCK_STS1 0x0100 /* FLL1_LOCK_STS1 */ +#define CLEARWATER_FLL1_LOCK_STS1_MASK 0x0100 /* FLL1_LOCK_STS1 */ +#define CLEARWATER_FLL1_LOCK_STS1_SHIFT 8 /* FLL1_LOCK_STS1 */ +#define CLEARWATER_FLL1_LOCK_STS1_WIDTH 1 /* FLL1_LOCK_STS1 */ /* * R6277 (0x1885) - IRQ1 Raw Status 6 */ -#define WM8285_MICDET_STS1 0x0100 /* MICDET_STS1 */ -#define WM8285_MICDET_STS1_MASK 0x0100 /* MICDET_STS1 */ -#define WM8285_MICDET_STS1_SHIFT 8 /* MICDET_STS1 */ -#define WM8285_MICDET_STS1_WIDTH 1 /* MICDET_STS1 */ -#define WM8285_HPDET_STS1 0x0001 /* HPDET_STS1 */ -#define WM8285_HPDET_STS1_MASK 0x0001 /* HPDET_STS1 */ -#define WM8285_HPDET_STS1_SHIFT 0 /* HPDET_STS1 */ -#define WM8285_HPDET_STS1_WIDTH 1 /* HPDET_STS1 */ +#define CLEARWATER_MICDET_STS1 0x0100 /* MICDET_STS1 */ +#define CLEARWATER_MICDET_STS1_MASK 0x0100 /* MICDET_STS1 */ +#define CLEARWATER_MICDET_STS1_SHIFT 8 /* MICDET_STS1 */ +#define CLEARWATER_MICDET_STS1_WIDTH 1 /* MICDET_STS1 */ +#define CLEARWATER_HPDET_STS1 0x0001 /* HPDET_STS1 */ +#define CLEARWATER_HPDET_STS1_MASK 0x0001 /* HPDET_STS1 */ +#define CLEARWATER_HPDET_STS1_SHIFT 0 /* HPDET_STS1 */ +#define CLEARWATER_HPDET_STS1_WIDTH 1 /* HPDET_STS1 */ /* * R6278 (0x1886) - IRQ1 Raw Status 7 */ -#define WM8285_MICD_CLAMP_FALL_STS1 0x0020 /* MICD_CLAMP_FALL_STS1 */ -#define WM8285_MICD_CLAMP_FALL_STS1_MASK 0x0020 /* MICD_CLAMP_FALL_STS1 */ -#define WM8285_MICD_CLAMP_FALL_STS1_SHIFT 5 /* MICD_CLAMP_FALL_STS1 */ -#define WM8285_MICD_CLAMP_FALL_STS1_WIDTH 1 /* MICD_CLAMP_FALL_STS1 */ -#define WM8285_MICD_CLAMP_RISE_STS1 0x0010 /* MICD_CLAMP_RISE_STS1 */ -#define WM8285_MICD_CLAMP_RISE_STS1_MASK 0x0010 /* MICD_CLAMP_RISE_STS1 */ -#define WM8285_MICD_CLAMP_RISE_STS1_SHIFT 4 /* MICD_CLAMP_RISE_STS1 */ -#define WM8285_MICD_CLAMP_RISE_STS1_WIDTH 1 /* MICD_CLAMP_RISE_STS1 */ -#define WM8285_JD2_FALL_STS1 0x0008 /* JD2_FALL_STS1 */ -#define WM8285_JD2_FALL_STS1_MASK 0x0008 /* JD2_FALL_STS1 */ -#define WM8285_JD2_FALL_STS1_SHIFT 3 /* JD2_FALL_STS1 */ -#define WM8285_JD2_FALL_STS1_WIDTH 1 /* JD2_FALL_STS1 */ -#define WM8285_JD2_RISE_STS1 0x0004 /* JD2_RISE_STS1 */ -#define WM8285_JD2_RISE_STS1_MASK 0x0004 /* JD2_RISE_STS1 */ -#define WM8285_JD2_RISE_STS1_SHIFT 2 /* JD2_RISE_STS1 */ -#define WM8285_JD2_RISE_STS1_WIDTH 1 /* JD2_RISE_STS1 */ -#define WM8285_JD1_FALL_STS1 0x0002 /* JD1_FALL_STS1 */ -#define WM8285_JD1_FALL_STS1_MASK 0x0002 /* JD1_FALL_STS1 */ -#define WM8285_JD1_FALL_STS1_SHIFT 1 /* JD1_FALL_STS1 */ -#define WM8285_JD1_FALL_STS1_WIDTH 1 /* JD1_FALL_STS1 */ -#define WM8285_JD1_RISE_STS1 0x0001 /* JD1_RISE_STS1 */ -#define WM8285_JD1_RISE_STS1_MASK 0x0001 /* JD1_RISE_STS1 */ -#define WM8285_JD1_RISE_STS1_SHIFT 0 /* JD1_RISE_STS1 */ -#define WM8285_JD1_RISE_STS1_WIDTH 1 /* JD1_RISE_STS1 */ +#define CLEARWATER_MICD_CLAMP_FALL_STS1 0x0020 /* MICD_CLAMP_FALL_STS1 */ +#define CLEARWATER_MICD_CLAMP_FALL_STS1_MASK 0x0020 /* MICD_CLAMP_FALL_STS1 */ +#define CLEARWATER_MICD_CLAMP_FALL_STS1_SHIFT 5 /* MICD_CLAMP_FALL_STS1 */ +#define CLEARWATER_MICD_CLAMP_FALL_STS1_WIDTH 1 /* MICD_CLAMP_FALL_STS1 */ +#define CLEARWATER_MICD_CLAMP_RISE_STS1 0x0010 /* MICD_CLAMP_RISE_STS1 */ +#define CLEARWATER_MICD_CLAMP_RISE_STS1_MASK 0x0010 /* MICD_CLAMP_RISE_STS1 */ +#define CLEARWATER_MICD_CLAMP_RISE_STS1_SHIFT 4 /* MICD_CLAMP_RISE_STS1 */ +#define CLEARWATER_MICD_CLAMP_RISE_STS1_WIDTH 1 /* MICD_CLAMP_RISE_STS1 */ +#define CLEARWATER_JD2_FALL_STS1 0x0008 /* JD2_FALL_STS1 */ +#define CLEARWATER_JD2_FALL_STS1_MASK 0x0008 /* JD2_FALL_STS1 */ +#define CLEARWATER_JD2_FALL_STS1_SHIFT 3 /* JD2_FALL_STS1 */ +#define CLEARWATER_JD2_FALL_STS1_WIDTH 1 /* JD2_FALL_STS1 */ +#define CLEARWATER_JD2_RISE_STS1 0x0004 /* JD2_RISE_STS1 */ +#define CLEARWATER_JD2_RISE_STS1_MASK 0x0004 /* JD2_RISE_STS1 */ +#define CLEARWATER_JD2_RISE_STS1_SHIFT 2 /* JD2_RISE_STS1 */ +#define CLEARWATER_JD2_RISE_STS1_WIDTH 1 /* JD2_RISE_STS1 */ +#define CLEARWATER_JD1_FALL_STS1 0x0002 /* JD1_FALL_STS1 */ +#define CLEARWATER_JD1_FALL_STS1_MASK 0x0002 /* JD1_FALL_STS1 */ +#define CLEARWATER_JD1_FALL_STS1_SHIFT 1 /* JD1_FALL_STS1 */ +#define CLEARWATER_JD1_FALL_STS1_WIDTH 1 /* JD1_FALL_STS1 */ +#define CLEARWATER_JD1_RISE_STS1 0x0001 /* JD1_RISE_STS1 */ +#define CLEARWATER_JD1_RISE_STS1_MASK 0x0001 /* JD1_RISE_STS1 */ +#define CLEARWATER_JD1_RISE_STS1_SHIFT 0 /* JD1_RISE_STS1 */ +#define CLEARWATER_JD1_RISE_STS1_WIDTH 1 /* JD1_RISE_STS1 */ /* * R6280 (0x1888) - IRQ1 Raw Status 9 */ -#define WM8285_ASRC2_IN2_LOCK_STS1 0x0800 /* ASRC2_IN2_LOCK_STS1 */ -#define WM8285_ASRC2_IN2_LOCK_STS1_MASK 0x0800 /* ASRC2_IN2_LOCK_STS1 */ -#define WM8285_ASRC2_IN2_LOCK_STS1_SHIFT 11 /* ASRC2_IN2_LOCK_STS1 */ -#define WM8285_ASRC2_IN2_LOCK_STS1_WIDTH 1 /* ASRC2_IN2_LOCK_STS1 */ -#define WM8285_ASRC2_IN1_LOCK_STS1 0x0400 /* ASRC2_IN1_LOCK_STS1 */ -#define WM8285_ASRC2_IN1_LOCK_STS1_MASK 0x0400 /* ASRC2_IN1_LOCK_STS1 */ -#define WM8285_ASRC2_IN1_LOCK_STS1_SHIFT 10 /* ASRC2_IN1_LOCK_STS1 */ -#define WM8285_ASRC2_IN1_LOCK_STS1_WIDTH 1 /* ASRC2_IN1_LOCK_STS1 */ -#define WM8285_ASRC1_IN2_LOCK_STS1 0x0200 /* ASRC1_IN2_LOCK_STS1 */ -#define WM8285_ASRC1_IN2_LOCK_STS1_MASK 0x0200 /* ASRC1_IN2_LOCK_STS1 */ -#define WM8285_ASRC1_IN2_LOCK_STS1_SHIFT 9 /* ASRC1_IN2_LOCK_STS1 */ -#define WM8285_ASRC1_IN2_LOCK_STS1_WIDTH 1 /* ASRC1_IN2_LOCK_STS1 */ -#define WM8285_ASRC1_IN1_LOCK_STS1 0x0100 /* ASRC1_IN1_LOCK_STS1 */ -#define WM8285_ASRC1_IN1_LOCK_STS1_MASK 0x0100 /* ASRC1_IN1_LOCK_STS1 */ -#define WM8285_ASRC1_IN1_LOCK_STS1_SHIFT 8 /* ASRC1_IN1_LOCK_STS1 */ -#define WM8285_ASRC1_IN1_LOCK_STS1_WIDTH 1 /* ASRC1_IN1_LOCK_STS1 */ -#define WM8285_DRC2_SIG_DET_STS1 0x0002 /* DRC2_SIG_DET_STS1 */ -#define WM8285_DRC2_SIG_DET_STS1_MASK 0x0002 /* DRC2_SIG_DET_STS1 */ -#define WM8285_DRC2_SIG_DET_STS1_SHIFT 1 /* DRC2_SIG_DET_STS1 */ -#define WM8285_DRC2_SIG_DET_STS1_WIDTH 1 /* DRC2_SIG_DET_STS1 */ -#define WM8285_DRC1_SIG_DET_STS1 0x0001 /* DRC1_SIG_DET_STS1 */ -#define WM8285_DRC1_SIG_DET_STS1_MASK 0x0001 /* DRC1_SIG_DET_STS1 */ -#define WM8285_DRC1_SIG_DET_STS1_SHIFT 0 /* DRC1_SIG_DET_STS1 */ -#define WM8285_DRC1_SIG_DET_STS1_WIDTH 1 /* DRC1_SIG_DET_STS1 */ +#define CLEARWATER_ASRC2_IN2_LOCK_STS1 0x0800 /* ASRC2_IN2_LOCK_STS1 */ +#define CLEARWATER_ASRC2_IN2_LOCK_STS1_MASK 0x0800 /* ASRC2_IN2_LOCK_STS1 */ +#define CLEARWATER_ASRC2_IN2_LOCK_STS1_SHIFT 11 /* ASRC2_IN2_LOCK_STS1 */ +#define CLEARWATER_ASRC2_IN2_LOCK_STS1_WIDTH 1 /* ASRC2_IN2_LOCK_STS1 */ +#define CLEARWATER_ASRC2_IN1_LOCK_STS1 0x0400 /* ASRC2_IN1_LOCK_STS1 */ +#define CLEARWATER_ASRC2_IN1_LOCK_STS1_MASK 0x0400 /* ASRC2_IN1_LOCK_STS1 */ +#define CLEARWATER_ASRC2_IN1_LOCK_STS1_SHIFT 10 /* ASRC2_IN1_LOCK_STS1 */ +#define CLEARWATER_ASRC2_IN1_LOCK_STS1_WIDTH 1 /* ASRC2_IN1_LOCK_STS1 */ +#define CLEARWATER_ASRC1_IN2_LOCK_STS1 0x0200 /* ASRC1_IN2_LOCK_STS1 */ +#define CLEARWATER_ASRC1_IN2_LOCK_STS1_MASK 0x0200 /* ASRC1_IN2_LOCK_STS1 */ +#define CLEARWATER_ASRC1_IN2_LOCK_STS1_SHIFT 9 /* ASRC1_IN2_LOCK_STS1 */ +#define CLEARWATER_ASRC1_IN2_LOCK_STS1_WIDTH 1 /* ASRC1_IN2_LOCK_STS1 */ +#define CLEARWATER_ASRC1_IN1_LOCK_STS1 0x0100 /* ASRC1_IN1_LOCK_STS1 */ +#define CLEARWATER_ASRC1_IN1_LOCK_STS1_MASK 0x0100 /* ASRC1_IN1_LOCK_STS1 */ +#define CLEARWATER_ASRC1_IN1_LOCK_STS1_SHIFT 8 /* ASRC1_IN1_LOCK_STS1 */ +#define CLEARWATER_ASRC1_IN1_LOCK_STS1_WIDTH 1 /* ASRC1_IN1_LOCK_STS1 */ +#define CLEARWATER_DRC2_SIG_DET_STS1 0x0002 /* DRC2_SIG_DET_STS1 */ +#define CLEARWATER_DRC2_SIG_DET_STS1_MASK 0x0002 /* DRC2_SIG_DET_STS1 */ +#define CLEARWATER_DRC2_SIG_DET_STS1_SHIFT 1 /* DRC2_SIG_DET_STS1 */ +#define CLEARWATER_DRC2_SIG_DET_STS1_WIDTH 1 /* DRC2_SIG_DET_STS1 */ +#define CLEARWATER_DRC1_SIG_DET_STS1 0x0001 /* DRC1_SIG_DET_STS1 */ +#define CLEARWATER_DRC1_SIG_DET_STS1_MASK 0x0001 /* DRC1_SIG_DET_STS1 */ +#define CLEARWATER_DRC1_SIG_DET_STS1_SHIFT 0 /* DRC1_SIG_DET_STS1 */ +#define CLEARWATER_DRC1_SIG_DET_STS1_WIDTH 1 /* DRC1_SIG_DET_STS1 */ /* * R6282 (0x188A) - IRQ1 Raw Status 11 */ -#define WM8285_DSP_IRQ16_STS1 0x8000 /* DSP_IRQ16_STS1 */ -#define WM8285_DSP_IRQ16_STS1_MASK 0x8000 /* DSP_IRQ16_STS1 */ -#define WM8285_DSP_IRQ16_STS1_SHIFT 15 /* DSP_IRQ16_STS1 */ -#define WM8285_DSP_IRQ16_STS1_WIDTH 1 /* DSP_IRQ16_STS1 */ -#define WM8285_DSP_IRQ15_STS1 0x4000 /* DSP_IRQ15_STS1 */ -#define WM8285_DSP_IRQ15_STS1_MASK 0x4000 /* DSP_IRQ15_STS1 */ -#define WM8285_DSP_IRQ15_STS1_SHIFT 14 /* DSP_IRQ15_STS1 */ -#define WM8285_DSP_IRQ15_STS1_WIDTH 1 /* DSP_IRQ15_STS1 */ -#define WM8285_DSP_IRQ14_STS1 0x2000 /* DSP_IRQ14_STS1 */ -#define WM8285_DSP_IRQ14_STS1_MASK 0x2000 /* DSP_IRQ14_STS1 */ -#define WM8285_DSP_IRQ14_STS1_SHIFT 13 /* DSP_IRQ14_STS1 */ -#define WM8285_DSP_IRQ14_STS1_WIDTH 1 /* DSP_IRQ14_STS1 */ -#define WM8285_DSP_IRQ13_STS1 0x1000 /* DSP_IRQ13_STS1 */ -#define WM8285_DSP_IRQ13_STS1_MASK 0x1000 /* DSP_IRQ13_STS1 */ -#define WM8285_DSP_IRQ13_STS1_SHIFT 12 /* DSP_IRQ13_STS1 */ -#define WM8285_DSP_IRQ13_STS1_WIDTH 1 /* DSP_IRQ13_STS1 */ -#define WM8285_DSP_IRQ12_STS1 0x0800 /* DSP_IRQ12_STS1 */ -#define WM8285_DSP_IRQ12_STS1_MASK 0x0800 /* DSP_IRQ12_STS1 */ -#define WM8285_DSP_IRQ12_STS1_SHIFT 11 /* DSP_IRQ12_STS1 */ -#define WM8285_DSP_IRQ12_STS1_WIDTH 1 /* DSP_IRQ12_STS1 */ -#define WM8285_DSP_IRQ11_STS1 0x0400 /* DSP_IRQ11_STS1 */ -#define WM8285_DSP_IRQ11_STS1_MASK 0x0400 /* DSP_IRQ11_STS1 */ -#define WM8285_DSP_IRQ11_STS1_SHIFT 10 /* DSP_IRQ11_STS1 */ -#define WM8285_DSP_IRQ11_STS1_WIDTH 1 /* DSP_IRQ11_STS1 */ -#define WM8285_DSP_IRQ10_STS1 0x0200 /* DSP_IRQ10_STS1 */ -#define WM8285_DSP_IRQ10_STS1_MASK 0x0200 /* DSP_IRQ10_STS1 */ -#define WM8285_DSP_IRQ10_STS1_SHIFT 9 /* DSP_IRQ10_STS1 */ -#define WM8285_DSP_IRQ10_STS1_WIDTH 1 /* DSP_IRQ10_STS1 */ -#define WM8285_DSP_IRQ9_STS1 0x0100 /* DSP_IRQ9_STS1 */ -#define WM8285_DSP_IRQ9_STS1_MASK 0x0100 /* DSP_IRQ9_STS1 */ -#define WM8285_DSP_IRQ9_STS1_SHIFT 8 /* DSP_IRQ9_STS1 */ -#define WM8285_DSP_IRQ9_STS1_WIDTH 1 /* DSP_IRQ9_STS1 */ -#define WM8285_DSP_IRQ8_STS1 0x0080 /* DSP_IRQ8_STS1 */ -#define WM8285_DSP_IRQ8_STS1_MASK 0x0080 /* DSP_IRQ8_STS1 */ -#define WM8285_DSP_IRQ8_STS1_SHIFT 7 /* DSP_IRQ8_STS1 */ -#define WM8285_DSP_IRQ8_STS1_WIDTH 1 /* DSP_IRQ8_STS1 */ -#define WM8285_DSP_IRQ7_STS1 0x0040 /* DSP_IRQ7_STS1 */ -#define WM8285_DSP_IRQ7_STS1_MASK 0x0040 /* DSP_IRQ7_STS1 */ -#define WM8285_DSP_IRQ7_STS1_SHIFT 6 /* DSP_IRQ7_STS1 */ -#define WM8285_DSP_IRQ7_STS1_WIDTH 1 /* DSP_IRQ7_STS1 */ -#define WM8285_DSP_IRQ6_STS1 0x0020 /* DSP_IRQ6_STS1 */ -#define WM8285_DSP_IRQ6_STS1_MASK 0x0020 /* DSP_IRQ6_STS1 */ -#define WM8285_DSP_IRQ6_STS1_SHIFT 5 /* DSP_IRQ6_STS1 */ -#define WM8285_DSP_IRQ6_STS1_WIDTH 1 /* DSP_IRQ6_STS1 */ -#define WM8285_DSP_IRQ5_STS1 0x0010 /* DSP_IRQ5_STS1 */ -#define WM8285_DSP_IRQ5_STS1_MASK 0x0010 /* DSP_IRQ5_STS1 */ -#define WM8285_DSP_IRQ5_STS1_SHIFT 4 /* DSP_IRQ5_STS1 */ -#define WM8285_DSP_IRQ5_STS1_WIDTH 1 /* DSP_IRQ5_STS1 */ -#define WM8285_DSP_IRQ4_STS1 0x0008 /* DSP_IRQ4_STS1 */ -#define WM8285_DSP_IRQ4_STS1_MASK 0x0008 /* DSP_IRQ4_STS1 */ -#define WM8285_DSP_IRQ4_STS1_SHIFT 3 /* DSP_IRQ4_STS1 */ -#define WM8285_DSP_IRQ4_STS1_WIDTH 1 /* DSP_IRQ4_STS1 */ -#define WM8285_DSP_IRQ3_STS1 0x0004 /* DSP_IRQ3_STS1 */ -#define WM8285_DSP_IRQ3_STS1_MASK 0x0004 /* DSP_IRQ3_STS1 */ -#define WM8285_DSP_IRQ3_STS1_SHIFT 2 /* DSP_IRQ3_STS1 */ -#define WM8285_DSP_IRQ3_STS1_WIDTH 1 /* DSP_IRQ3_STS1 */ -#define WM8285_DSP_IRQ2_STS1 0x0002 /* DSP_IRQ2_STS1 */ -#define WM8285_DSP_IRQ2_STS1_MASK 0x0002 /* DSP_IRQ2_STS1 */ -#define WM8285_DSP_IRQ2_STS1_SHIFT 1 /* DSP_IRQ2_STS1 */ -#define WM8285_DSP_IRQ2_STS1_WIDTH 1 /* DSP_IRQ2_STS1 */ -#define WM8285_DSP_IRQ1_STS1 0x0001 /* DSP_IRQ1_STS1 */ -#define WM8285_DSP_IRQ1_STS1_MASK 0x0001 /* DSP_IRQ1_STS1 */ -#define WM8285_DSP_IRQ1_STS1_SHIFT 0 /* DSP_IRQ1_STS1 */ -#define WM8285_DSP_IRQ1_STS1_WIDTH 1 /* DSP_IRQ1_STS1 */ +#define CLEARWATER_DSP_IRQ16_STS1 0x8000 /* DSP_IRQ16_STS1 */ +#define CLEARWATER_DSP_IRQ16_STS1_MASK 0x8000 /* DSP_IRQ16_STS1 */ +#define CLEARWATER_DSP_IRQ16_STS1_SHIFT 15 /* DSP_IRQ16_STS1 */ +#define CLEARWATER_DSP_IRQ16_STS1_WIDTH 1 /* DSP_IRQ16_STS1 */ +#define CLEARWATER_DSP_IRQ15_STS1 0x4000 /* DSP_IRQ15_STS1 */ +#define CLEARWATER_DSP_IRQ15_STS1_MASK 0x4000 /* DSP_IRQ15_STS1 */ +#define CLEARWATER_DSP_IRQ15_STS1_SHIFT 14 /* DSP_IRQ15_STS1 */ +#define CLEARWATER_DSP_IRQ15_STS1_WIDTH 1 /* DSP_IRQ15_STS1 */ +#define CLEARWATER_DSP_IRQ14_STS1 0x2000 /* DSP_IRQ14_STS1 */ +#define CLEARWATER_DSP_IRQ14_STS1_MASK 0x2000 /* DSP_IRQ14_STS1 */ +#define CLEARWATER_DSP_IRQ14_STS1_SHIFT 13 /* DSP_IRQ14_STS1 */ +#define CLEARWATER_DSP_IRQ14_STS1_WIDTH 1 /* DSP_IRQ14_STS1 */ +#define CLEARWATER_DSP_IRQ13_STS1 0x1000 /* DSP_IRQ13_STS1 */ +#define CLEARWATER_DSP_IRQ13_STS1_MASK 0x1000 /* DSP_IRQ13_STS1 */ +#define CLEARWATER_DSP_IRQ13_STS1_SHIFT 12 /* DSP_IRQ13_STS1 */ +#define CLEARWATER_DSP_IRQ13_STS1_WIDTH 1 /* DSP_IRQ13_STS1 */ +#define CLEARWATER_DSP_IRQ12_STS1 0x0800 /* DSP_IRQ12_STS1 */ +#define CLEARWATER_DSP_IRQ12_STS1_MASK 0x0800 /* DSP_IRQ12_STS1 */ +#define CLEARWATER_DSP_IRQ12_STS1_SHIFT 11 /* DSP_IRQ12_STS1 */ +#define CLEARWATER_DSP_IRQ12_STS1_WIDTH 1 /* DSP_IRQ12_STS1 */ +#define CLEARWATER_DSP_IRQ11_STS1 0x0400 /* DSP_IRQ11_STS1 */ +#define CLEARWATER_DSP_IRQ11_STS1_MASK 0x0400 /* DSP_IRQ11_STS1 */ +#define CLEARWATER_DSP_IRQ11_STS1_SHIFT 10 /* DSP_IRQ11_STS1 */ +#define CLEARWATER_DSP_IRQ11_STS1_WIDTH 1 /* DSP_IRQ11_STS1 */ +#define CLEARWATER_DSP_IRQ10_STS1 0x0200 /* DSP_IRQ10_STS1 */ +#define CLEARWATER_DSP_IRQ10_STS1_MASK 0x0200 /* DSP_IRQ10_STS1 */ +#define CLEARWATER_DSP_IRQ10_STS1_SHIFT 9 /* DSP_IRQ10_STS1 */ +#define CLEARWATER_DSP_IRQ10_STS1_WIDTH 1 /* DSP_IRQ10_STS1 */ +#define CLEARWATER_DSP_IRQ9_STS1 0x0100 /* DSP_IRQ9_STS1 */ +#define CLEARWATER_DSP_IRQ9_STS1_MASK 0x0100 /* DSP_IRQ9_STS1 */ +#define CLEARWATER_DSP_IRQ9_STS1_SHIFT 8 /* DSP_IRQ9_STS1 */ +#define CLEARWATER_DSP_IRQ9_STS1_WIDTH 1 /* DSP_IRQ9_STS1 */ +#define CLEARWATER_DSP_IRQ8_STS1 0x0080 /* DSP_IRQ8_STS1 */ +#define CLEARWATER_DSP_IRQ8_STS1_MASK 0x0080 /* DSP_IRQ8_STS1 */ +#define CLEARWATER_DSP_IRQ8_STS1_SHIFT 7 /* DSP_IRQ8_STS1 */ +#define CLEARWATER_DSP_IRQ8_STS1_WIDTH 1 /* DSP_IRQ8_STS1 */ +#define CLEARWATER_DSP_IRQ7_STS1 0x0040 /* DSP_IRQ7_STS1 */ +#define CLEARWATER_DSP_IRQ7_STS1_MASK 0x0040 /* DSP_IRQ7_STS1 */ +#define CLEARWATER_DSP_IRQ7_STS1_SHIFT 6 /* DSP_IRQ7_STS1 */ +#define CLEARWATER_DSP_IRQ7_STS1_WIDTH 1 /* DSP_IRQ7_STS1 */ +#define CLEARWATER_DSP_IRQ6_STS1 0x0020 /* DSP_IRQ6_STS1 */ +#define CLEARWATER_DSP_IRQ6_STS1_MASK 0x0020 /* DSP_IRQ6_STS1 */ +#define CLEARWATER_DSP_IRQ6_STS1_SHIFT 5 /* DSP_IRQ6_STS1 */ +#define CLEARWATER_DSP_IRQ6_STS1_WIDTH 1 /* DSP_IRQ6_STS1 */ +#define CLEARWATER_DSP_IRQ5_STS1 0x0010 /* DSP_IRQ5_STS1 */ +#define CLEARWATER_DSP_IRQ5_STS1_MASK 0x0010 /* DSP_IRQ5_STS1 */ +#define CLEARWATER_DSP_IRQ5_STS1_SHIFT 4 /* DSP_IRQ5_STS1 */ +#define CLEARWATER_DSP_IRQ5_STS1_WIDTH 1 /* DSP_IRQ5_STS1 */ +#define CLEARWATER_DSP_IRQ4_STS1 0x0008 /* DSP_IRQ4_STS1 */ +#define CLEARWATER_DSP_IRQ4_STS1_MASK 0x0008 /* DSP_IRQ4_STS1 */ +#define CLEARWATER_DSP_IRQ4_STS1_SHIFT 3 /* DSP_IRQ4_STS1 */ +#define CLEARWATER_DSP_IRQ4_STS1_WIDTH 1 /* DSP_IRQ4_STS1 */ +#define CLEARWATER_DSP_IRQ3_STS1 0x0004 /* DSP_IRQ3_STS1 */ +#define CLEARWATER_DSP_IRQ3_STS1_MASK 0x0004 /* DSP_IRQ3_STS1 */ +#define CLEARWATER_DSP_IRQ3_STS1_SHIFT 2 /* DSP_IRQ3_STS1 */ +#define CLEARWATER_DSP_IRQ3_STS1_WIDTH 1 /* DSP_IRQ3_STS1 */ +#define CLEARWATER_DSP_IRQ2_STS1 0x0002 /* DSP_IRQ2_STS1 */ +#define CLEARWATER_DSP_IRQ2_STS1_MASK 0x0002 /* DSP_IRQ2_STS1 */ +#define CLEARWATER_DSP_IRQ2_STS1_SHIFT 1 /* DSP_IRQ2_STS1 */ +#define CLEARWATER_DSP_IRQ2_STS1_WIDTH 1 /* DSP_IRQ2_STS1 */ +#define CLEARWATER_DSP_IRQ1_STS1 0x0001 /* DSP_IRQ1_STS1 */ +#define CLEARWATER_DSP_IRQ1_STS1_MASK 0x0001 /* DSP_IRQ1_STS1 */ +#define CLEARWATER_DSP_IRQ1_STS1_SHIFT 0 /* DSP_IRQ1_STS1 */ +#define CLEARWATER_DSP_IRQ1_STS1_WIDTH 1 /* DSP_IRQ1_STS1 */ /* * R6283 (0x188B) - IRQ1 Raw Status 12 */ -#define WM8285_SPKOUTR_SC_STS1 0x0080 /* SPKOUTR_SC_STS1 */ -#define WM8285_SPKOUTR_SC_STS1_MASK 0x0080 /* SPKOUTR_SC_STS1 */ -#define WM8285_SPKOUTR_SC_STS1_SHIFT 7 /* SPKOUTR_SC_STS1 */ -#define WM8285_SPKOUTR_SC_STS1_WIDTH 1 /* SPKOUTR_SC_STS1 */ -#define WM8285_SPKOUTL_SC_STS1 0x0040 /* SPKOUTL_SC_STS1 */ -#define WM8285_SPKOUTL_SC_STS1_MASK 0x0040 /* SPKOUTL_SC_STS1 */ -#define WM8285_SPKOUTL_SC_STS1_SHIFT 6 /* SPKOUTL_SC_STS1 */ -#define WM8285_SPKOUTL_SC_STS1_WIDTH 1 /* SPKOUTL_SC_STS1 */ -#define WM8285_HP3R_SC_STS1 0x0020 /* HP3R_SC_STS1 */ -#define WM8285_HP3R_SC_STS1_MASK 0x0020 /* HP3R_SC_STS1 */ -#define WM8285_HP3R_SC_STS1_SHIFT 5 /* HP3R_SC_STS1 */ -#define WM8285_HP3R_SC_STS1_WIDTH 1 /* HP3R_SC_STS1 */ -#define WM8285_HP3L_SC_STS1 0x0010 /* HP3L_SC_STS1 */ -#define WM8285_HP3L_SC_STS1_MASK 0x0010 /* HP3L_SC_STS1 */ -#define WM8285_HP3L_SC_STS1_SHIFT 4 /* HP3L_SC_STS1 */ -#define WM8285_HP3L_SC_STS1_WIDTH 1 /* HP3L_SC_STS1 */ -#define WM8285_HP2R_SC_STS1 0x0008 /* HP2R_SC_STS1 */ -#define WM8285_HP2R_SC_STS1_MASK 0x0008 /* HP2R_SC_STS1 */ -#define WM8285_HP2R_SC_STS1_SHIFT 3 /* HP2R_SC_STS1 */ -#define WM8285_HP2R_SC_STS1_WIDTH 1 /* HP2R_SC_STS1 */ -#define WM8285_HP2L_SC_STS1 0x0004 /* HP2L_SC_STS1 */ -#define WM8285_HP2L_SC_STS1_MASK 0x0004 /* HP2L_SC_STS1 */ -#define WM8285_HP2L_SC_STS1_SHIFT 2 /* HP2L_SC_STS1 */ -#define WM8285_HP2L_SC_STS1_WIDTH 1 /* HP2L_SC_STS1 */ -#define WM8285_HP1R_SC_STS1 0x0002 /* HP1R_SC_STS1 */ -#define WM8285_HP1R_SC_STS1_MASK 0x0002 /* HP1R_SC_STS1 */ -#define WM8285_HP1R_SC_STS1_SHIFT 1 /* HP1R_SC_STS1 */ -#define WM8285_HP1R_SC_STS1_WIDTH 1 /* HP1R_SC_STS1 */ -#define WM8285_HP1L_SC_STS1 0x0001 /* HP1L_SC_STS1 */ -#define WM8285_HP1L_SC_STS1_MASK 0x0001 /* HP1L_SC_STS1 */ -#define WM8285_HP1L_SC_STS1_SHIFT 0 /* HP1L_SC_STS1 */ -#define WM8285_HP1L_SC_STS1_WIDTH 1 /* HP1L_SC_STS1 */ +#define CLEARWATER_SPKOUTR_SC_STS1 0x0080 /* SPKOUTR_SC_STS1 */ +#define CLEARWATER_SPKOUTR_SC_STS1_MASK 0x0080 /* SPKOUTR_SC_STS1 */ +#define CLEARWATER_SPKOUTR_SC_STS1_SHIFT 7 /* SPKOUTR_SC_STS1 */ +#define CLEARWATER_SPKOUTR_SC_STS1_WIDTH 1 /* SPKOUTR_SC_STS1 */ +#define CLEARWATER_SPKOUTL_SC_STS1 0x0040 /* SPKOUTL_SC_STS1 */ +#define CLEARWATER_SPKOUTL_SC_STS1_MASK 0x0040 /* SPKOUTL_SC_STS1 */ +#define CLEARWATER_SPKOUTL_SC_STS1_SHIFT 6 /* SPKOUTL_SC_STS1 */ +#define CLEARWATER_SPKOUTL_SC_STS1_WIDTH 1 /* SPKOUTL_SC_STS1 */ +#define CLEARWATER_HP3R_SC_STS1 0x0020 /* HP3R_SC_STS1 */ +#define CLEARWATER_HP3R_SC_STS1_MASK 0x0020 /* HP3R_SC_STS1 */ +#define CLEARWATER_HP3R_SC_STS1_SHIFT 5 /* HP3R_SC_STS1 */ +#define CLEARWATER_HP3R_SC_STS1_WIDTH 1 /* HP3R_SC_STS1 */ +#define CLEARWATER_HP3L_SC_STS1 0x0010 /* HP3L_SC_STS1 */ +#define CLEARWATER_HP3L_SC_STS1_MASK 0x0010 /* HP3L_SC_STS1 */ +#define CLEARWATER_HP3L_SC_STS1_SHIFT 4 /* HP3L_SC_STS1 */ +#define CLEARWATER_HP3L_SC_STS1_WIDTH 1 /* HP3L_SC_STS1 */ +#define CLEARWATER_HP2R_SC_STS1 0x0008 /* HP2R_SC_STS1 */ +#define CLEARWATER_HP2R_SC_STS1_MASK 0x0008 /* HP2R_SC_STS1 */ +#define CLEARWATER_HP2R_SC_STS1_SHIFT 3 /* HP2R_SC_STS1 */ +#define CLEARWATER_HP2R_SC_STS1_WIDTH 1 /* HP2R_SC_STS1 */ +#define CLEARWATER_HP2L_SC_STS1 0x0004 /* HP2L_SC_STS1 */ +#define CLEARWATER_HP2L_SC_STS1_MASK 0x0004 /* HP2L_SC_STS1 */ +#define CLEARWATER_HP2L_SC_STS1_SHIFT 2 /* HP2L_SC_STS1 */ +#define CLEARWATER_HP2L_SC_STS1_WIDTH 1 /* HP2L_SC_STS1 */ +#define CLEARWATER_HP1R_SC_STS1 0x0002 /* HP1R_SC_STS1 */ +#define CLEARWATER_HP1R_SC_STS1_MASK 0x0002 /* HP1R_SC_STS1 */ +#define CLEARWATER_HP1R_SC_STS1_SHIFT 1 /* HP1R_SC_STS1 */ +#define CLEARWATER_HP1R_SC_STS1_WIDTH 1 /* HP1R_SC_STS1 */ +#define CLEARWATER_HP1L_SC_STS1 0x0001 /* HP1L_SC_STS1 */ +#define CLEARWATER_HP1L_SC_STS1_MASK 0x0001 /* HP1L_SC_STS1 */ +#define CLEARWATER_HP1L_SC_STS1_SHIFT 0 /* HP1L_SC_STS1 */ +#define CLEARWATER_HP1L_SC_STS1_WIDTH 1 /* HP1L_SC_STS1 */ /* * R6284 (0x188C) - IRQ1 Raw Status 13 */ -#define WM8285_SPKOUTR_ENABLE_DONE_STS1 0x0080 /* SPKOUTR_ENABLE_DONE_STS1 */ -#define WM8285_SPKOUTR_ENABLE_DONE_STS1_MASK 0x0080 /* SPKOUTR_ENABLE_DONE_STS1 */ -#define WM8285_SPKOUTR_ENABLE_DONE_STS1_SHIFT 7 /* SPKOUTR_ENABLE_DONE_STS1 */ -#define WM8285_SPKOUTR_ENABLE_DONE_STS1_WIDTH 1 /* SPKOUTR_ENABLE_DONE_STS1 */ -#define WM8285_SPKOUTL_ENABLE_DONE_STS1 0x0040 /* SPKOUTL_ENABLE_DONE_STS1 */ -#define WM8285_SPKOUTL_ENABLE_DONE_STS1_MASK 0x0040 /* SPKOUTL_ENABLE_DONE_STS1 */ -#define WM8285_SPKOUTL_ENABLE_DONE_STS1_SHIFT 6 /* SPKOUTL_ENABLE_DONE_STS1 */ -#define WM8285_SPKOUTL_ENABLE_DONE_STS1_WIDTH 1 /* SPKOUTL_ENABLE_DONE_STS1 */ -#define WM8285_HP3R_ENABLE_DONE_STS1 0x0020 /* HP3R_ENABLE_DONE_STS1 */ -#define WM8285_HP3R_ENABLE_DONE_STS1_MASK 0x0020 /* HP3R_ENABLE_DONE_STS1 */ -#define WM8285_HP3R_ENABLE_DONE_STS1_SHIFT 5 /* HP3R_ENABLE_DONE_STS1 */ -#define WM8285_HP3R_ENABLE_DONE_STS1_WIDTH 1 /* HP3R_ENABLE_DONE_STS1 */ -#define WM8285_HP3L_ENABLE_DONE_STS1 0x0010 /* HP3L_ENABLE_DONE_STS1 */ -#define WM8285_HP3L_ENABLE_DONE_STS1_MASK 0x0010 /* HP3L_ENABLE_DONE_STS1 */ -#define WM8285_HP3L_ENABLE_DONE_STS1_SHIFT 4 /* HP3L_ENABLE_DONE_STS1 */ -#define WM8285_HP3L_ENABLE_DONE_STS1_WIDTH 1 /* HP3L_ENABLE_DONE_STS1 */ -#define WM8285_HP2R_ENABLE_DONE_STS1 0x0008 /* HP2R_ENABLE_DONE_STS1 */ -#define WM8285_HP2R_ENABLE_DONE_STS1_MASK 0x0008 /* HP2R_ENABLE_DONE_STS1 */ -#define WM8285_HP2R_ENABLE_DONE_STS1_SHIFT 3 /* HP2R_ENABLE_DONE_STS1 */ -#define WM8285_HP2R_ENABLE_DONE_STS1_WIDTH 1 /* HP2R_ENABLE_DONE_STS1 */ -#define WM8285_HP2L_ENABLE_DONE_STS1 0x0004 /* HP2L_ENABLE_DONE_STS1 */ -#define WM8285_HP2L_ENABLE_DONE_STS1_MASK 0x0004 /* HP2L_ENABLE_DONE_STS1 */ -#define WM8285_HP2L_ENABLE_DONE_STS1_SHIFT 2 /* HP2L_ENABLE_DONE_STS1 */ -#define WM8285_HP2L_ENABLE_DONE_STS1_WIDTH 1 /* HP2L_ENABLE_DONE_STS1 */ -#define WM8285_HP1R_ENABLE_DONE_STS1 0x0002 /* HP1R_ENABLE_DONE_STS1 */ -#define WM8285_HP1R_ENABLE_DONE_STS1_MASK 0x0002 /* HP1R_ENABLE_DONE_STS1 */ -#define WM8285_HP1R_ENABLE_DONE_STS1_SHIFT 1 /* HP1R_ENABLE_DONE_STS1 */ -#define WM8285_HP1R_ENABLE_DONE_STS1_WIDTH 1 /* HP1R_ENABLE_DONE_STS1 */ -#define WM8285_HP1L_ENABLE_DONE_STS1 0x0001 /* HP1L_ENABLE_DONE_STS1 */ -#define WM8285_HP1L_ENABLE_DONE_STS1_MASK 0x0001 /* HP1L_ENABLE_DONE_STS1 */ -#define WM8285_HP1L_ENABLE_DONE_STS1_SHIFT 0 /* HP1L_ENABLE_DONE_STS1 */ -#define WM8285_HP1L_ENABLE_DONE_STS1_WIDTH 1 /* HP1L_ENABLE_DONE_STS1 */ +#define CLEARWATER_SPKOUTR_ENABLE_DONE_STS1 0x0080 /* SPKOUTR_ENABLE_DONE_STS1 */ +#define CLEARWATER_SPKOUTR_ENABLE_DONE_STS1_MASK 0x0080 /* SPKOUTR_ENABLE_DONE_STS1 */ +#define CLEARWATER_SPKOUTR_ENABLE_DONE_STS1_SHIFT 7 /* SPKOUTR_ENABLE_DONE_STS1 */ +#define CLEARWATER_SPKOUTR_ENABLE_DONE_STS1_WIDTH 1 /* SPKOUTR_ENABLE_DONE_STS1 */ +#define CLEARWATER_SPKOUTL_ENABLE_DONE_STS1 0x0040 /* SPKOUTL_ENABLE_DONE_STS1 */ +#define CLEARWATER_SPKOUTL_ENABLE_DONE_STS1_MASK 0x0040 /* SPKOUTL_ENABLE_DONE_STS1 */ +#define CLEARWATER_SPKOUTL_ENABLE_DONE_STS1_SHIFT 6 /* SPKOUTL_ENABLE_DONE_STS1 */ +#define CLEARWATER_SPKOUTL_ENABLE_DONE_STS1_WIDTH 1 /* SPKOUTL_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP3R_ENABLE_DONE_STS1 0x0020 /* HP3R_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP3R_ENABLE_DONE_STS1_MASK 0x0020 /* HP3R_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP3R_ENABLE_DONE_STS1_SHIFT 5 /* HP3R_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP3R_ENABLE_DONE_STS1_WIDTH 1 /* HP3R_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP3L_ENABLE_DONE_STS1 0x0010 /* HP3L_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP3L_ENABLE_DONE_STS1_MASK 0x0010 /* HP3L_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP3L_ENABLE_DONE_STS1_SHIFT 4 /* HP3L_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP3L_ENABLE_DONE_STS1_WIDTH 1 /* HP3L_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP2R_ENABLE_DONE_STS1 0x0008 /* HP2R_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP2R_ENABLE_DONE_STS1_MASK 0x0008 /* HP2R_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP2R_ENABLE_DONE_STS1_SHIFT 3 /* HP2R_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP2R_ENABLE_DONE_STS1_WIDTH 1 /* HP2R_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP2L_ENABLE_DONE_STS1 0x0004 /* HP2L_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP2L_ENABLE_DONE_STS1_MASK 0x0004 /* HP2L_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP2L_ENABLE_DONE_STS1_SHIFT 2 /* HP2L_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP2L_ENABLE_DONE_STS1_WIDTH 1 /* HP2L_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP1R_ENABLE_DONE_STS1 0x0002 /* HP1R_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP1R_ENABLE_DONE_STS1_MASK 0x0002 /* HP1R_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP1R_ENABLE_DONE_STS1_SHIFT 1 /* HP1R_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP1R_ENABLE_DONE_STS1_WIDTH 1 /* HP1R_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP1L_ENABLE_DONE_STS1 0x0001 /* HP1L_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP1L_ENABLE_DONE_STS1_MASK 0x0001 /* HP1L_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP1L_ENABLE_DONE_STS1_SHIFT 0 /* HP1L_ENABLE_DONE_STS1 */ +#define CLEARWATER_HP1L_ENABLE_DONE_STS1_WIDTH 1 /* HP1L_ENABLE_DONE_STS1 */ /* * R6285 (0x188D) - IRQ1 Raw Status 14 */ -#define WM8285_SPKOUTR_DISABLE_DONE_STS1 0x0080 /* SPKOUTR_DISABLE_DONE_STS1 */ -#define WM8285_SPKOUTR_DISABLE_DONE_STS1_MASK 0x0080 /* SPKOUTR_DISABLE_DONE_STS1 */ -#define WM8285_SPKOUTR_DISABLE_DONE_STS1_SHIFT 7 /* SPKOUTR_DISABLE_DONE_STS1 */ -#define WM8285_SPKOUTR_DISABLE_DONE_STS1_WIDTH 1 /* SPKOUTR_DISABLE_DONE_STS1 */ -#define WM8285_SPKOUTL_DISABLE_DONE_STS1 0x0040 /* SPKOUTL_DISABLE_DONE_STS1 */ -#define WM8285_SPKOUTL_DISABLE_DONE_STS1_MASK 0x0040 /* SPKOUTL_DISABLE_DONE_STS1 */ -#define WM8285_SPKOUTL_DISABLE_DONE_STS1_SHIFT 6 /* SPKOUTL_DISABLE_DONE_STS1 */ -#define WM8285_SPKOUTL_DISABLE_DONE_STS1_WIDTH 1 /* SPKOUTL_DISABLE_DONE_STS1 */ -#define WM8285_HP3R_DISABLE_DONE_STS1 0x0020 /* HP3R_DISABLE_DONE_STS1 */ -#define WM8285_HP3R_DISABLE_DONE_STS1_MASK 0x0020 /* HP3R_DISABLE_DONE_STS1 */ -#define WM8285_HP3R_DISABLE_DONE_STS1_SHIFT 5 /* HP3R_DISABLE_DONE_STS1 */ -#define WM8285_HP3R_DISABLE_DONE_STS1_WIDTH 1 /* HP3R_DISABLE_DONE_STS1 */ -#define WM8285_HP3L_DISABLE_DONE_STS1 0x0010 /* HP3L_DISABLE_DONE_STS1 */ -#define WM8285_HP3L_DISABLE_DONE_STS1_MASK 0x0010 /* HP3L_DISABLE_DONE_STS1 */ -#define WM8285_HP3L_DISABLE_DONE_STS1_SHIFT 4 /* HP3L_DISABLE_DONE_STS1 */ -#define WM8285_HP3L_DISABLE_DONE_STS1_WIDTH 1 /* HP3L_DISABLE_DONE_STS1 */ -#define WM8285_HP2R_DISABLE_DONE_STS1 0x0008 /* HP2R_DISABLE_DONE_STS1 */ -#define WM8285_HP2R_DISABLE_DONE_STS1_MASK 0x0008 /* HP2R_DISABLE_DONE_STS1 */ -#define WM8285_HP2R_DISABLE_DONE_STS1_SHIFT 3 /* HP2R_DISABLE_DONE_STS1 */ -#define WM8285_HP2R_DISABLE_DONE_STS1_WIDTH 1 /* HP2R_DISABLE_DONE_STS1 */ -#define WM8285_HP2L_DISABLE_DONE_STS1 0x0004 /* HP2L_DISABLE_DONE_STS1 */ -#define WM8285_HP2L_DISABLE_DONE_STS1_MASK 0x0004 /* HP2L_DISABLE_DONE_STS1 */ -#define WM8285_HP2L_DISABLE_DONE_STS1_SHIFT 2 /* HP2L_DISABLE_DONE_STS1 */ -#define WM8285_HP2L_DISABLE_DONE_STS1_WIDTH 1 /* HP2L_DISABLE_DONE_STS1 */ -#define WM8285_HP1R_DISABLE_DONE_STS1 0x0002 /* HP1R_DISABLE_DONE_STS1 */ -#define WM8285_HP1R_DISABLE_DONE_STS1_MASK 0x0002 /* HP1R_DISABLE_DONE_STS1 */ -#define WM8285_HP1R_DISABLE_DONE_STS1_SHIFT 1 /* HP1R_DISABLE_DONE_STS1 */ -#define WM8285_HP1R_DISABLE_DONE_STS1_WIDTH 1 /* HP1R_DISABLE_DONE_STS1 */ -#define WM8285_HP1L_DISABLE_DONE_STS1 0x0001 /* HP1L_DISABLE_DONE_STS1 */ -#define WM8285_HP1L_DISABLE_DONE_STS1_MASK 0x0001 /* HP1L_DISABLE_DONE_STS1 */ -#define WM8285_HP1L_DISABLE_DONE_STS1_SHIFT 0 /* HP1L_DISABLE_DONE_STS1 */ -#define WM8285_HP1L_DISABLE_DONE_STS1_WIDTH 1 /* HP1L_DISABLE_DONE_STS1 */ +#define CLEARWATER_SPKOUTR_DISABLE_DONE_STS1 0x0080 /* SPKOUTR_DISABLE_DONE_STS1 */ +#define CLEARWATER_SPKOUTR_DISABLE_DONE_STS1_MASK 0x0080 /* SPKOUTR_DISABLE_DONE_STS1 */ +#define CLEARWATER_SPKOUTR_DISABLE_DONE_STS1_SHIFT 7 /* SPKOUTR_DISABLE_DONE_STS1 */ +#define CLEARWATER_SPKOUTR_DISABLE_DONE_STS1_WIDTH 1 /* SPKOUTR_DISABLE_DONE_STS1 */ +#define CLEARWATER_SPKOUTL_DISABLE_DONE_STS1 0x0040 /* SPKOUTL_DISABLE_DONE_STS1 */ +#define CLEARWATER_SPKOUTL_DISABLE_DONE_STS1_MASK 0x0040 /* SPKOUTL_DISABLE_DONE_STS1 */ +#define CLEARWATER_SPKOUTL_DISABLE_DONE_STS1_SHIFT 6 /* SPKOUTL_DISABLE_DONE_STS1 */ +#define CLEARWATER_SPKOUTL_DISABLE_DONE_STS1_WIDTH 1 /* SPKOUTL_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP3R_DISABLE_DONE_STS1 0x0020 /* HP3R_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP3R_DISABLE_DONE_STS1_MASK 0x0020 /* HP3R_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP3R_DISABLE_DONE_STS1_SHIFT 5 /* HP3R_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP3R_DISABLE_DONE_STS1_WIDTH 1 /* HP3R_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP3L_DISABLE_DONE_STS1 0x0010 /* HP3L_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP3L_DISABLE_DONE_STS1_MASK 0x0010 /* HP3L_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP3L_DISABLE_DONE_STS1_SHIFT 4 /* HP3L_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP3L_DISABLE_DONE_STS1_WIDTH 1 /* HP3L_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP2R_DISABLE_DONE_STS1 0x0008 /* HP2R_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP2R_DISABLE_DONE_STS1_MASK 0x0008 /* HP2R_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP2R_DISABLE_DONE_STS1_SHIFT 3 /* HP2R_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP2R_DISABLE_DONE_STS1_WIDTH 1 /* HP2R_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP2L_DISABLE_DONE_STS1 0x0004 /* HP2L_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP2L_DISABLE_DONE_STS1_MASK 0x0004 /* HP2L_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP2L_DISABLE_DONE_STS1_SHIFT 2 /* HP2L_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP2L_DISABLE_DONE_STS1_WIDTH 1 /* HP2L_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP1R_DISABLE_DONE_STS1 0x0002 /* HP1R_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP1R_DISABLE_DONE_STS1_MASK 0x0002 /* HP1R_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP1R_DISABLE_DONE_STS1_SHIFT 1 /* HP1R_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP1R_DISABLE_DONE_STS1_WIDTH 1 /* HP1R_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP1L_DISABLE_DONE_STS1 0x0001 /* HP1L_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP1L_DISABLE_DONE_STS1_MASK 0x0001 /* HP1L_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP1L_DISABLE_DONE_STS1_SHIFT 0 /* HP1L_DISABLE_DONE_STS1 */ +#define CLEARWATER_HP1L_DISABLE_DONE_STS1_WIDTH 1 /* HP1L_DISABLE_DONE_STS1 */ /* * R6286 (0x188E) - IRQ1 Raw Status 15 */ -#define WM8285_SPK_OVERHEAT_WARN_STS1 0x0004 /* SPK_OVERHEAT_WARN_STS1 */ -#define WM8285_SPK_OVERHEAT_WARN_STS1_MASK 0x0004 /* SPK_OVERHEAT_WARN_STS1 */ -#define WM8285_SPK_OVERHEAT_WARN_STS1_SHIFT 2 /* SPK_OVERHEAT_WARN_STS1 */ -#define WM8285_SPK_OVERHEAT_WARN_STS1_WIDTH 1 /* SPK_OVERHEAT_WARN_STS1 */ -#define WM8285_SPK_OVERHEAT_STS1 0x0002 /* SPK_OVERHEAT_STS1 */ -#define WM8285_SPK_OVERHEAT_STS1_MASK 0x0002 /* SPK_OVERHEAT_STS1 */ -#define WM8285_SPK_OVERHEAT_STS1_SHIFT 1 /* SPK_OVERHEAT_STS1 */ -#define WM8285_SPK_OVERHEAT_STS1_WIDTH 1 /* SPK_OVERHEAT_STS1 */ -#define WM8285_SPK_SHUTDOWN_STS1 0x0001 /* SPK_SHUTDOWN_STS1 */ -#define WM8285_SPK_SHUTDOWN_STS1_MASK 0x0001 /* SPK_SHUTDOWN_STS1 */ -#define WM8285_SPK_SHUTDOWN_STS1_SHIFT 0 /* SPK_SHUTDOWN_STS1 */ -#define WM8285_SPK_SHUTDOWN_STS1_WIDTH 1 /* SPK_SHUTDOWN_STS1 */ +#define CLEARWATER_SPK_OVERHEAT_WARN_STS1 0x0004 /* SPK_OVERHEAT_WARN_STS1 */ +#define CLEARWATER_SPK_OVERHEAT_WARN_STS1_MASK 0x0004 /* SPK_OVERHEAT_WARN_STS1 */ +#define CLEARWATER_SPK_OVERHEAT_WARN_STS1_SHIFT 2 /* SPK_OVERHEAT_WARN_STS1 */ +#define CLEARWATER_SPK_OVERHEAT_WARN_STS1_WIDTH 1 /* SPK_OVERHEAT_WARN_STS1 */ +#define CLEARWATER_SPK_OVERHEAT_STS1 0x0002 /* SPK_OVERHEAT_STS1 */ +#define CLEARWATER_SPK_OVERHEAT_STS1_MASK 0x0002 /* SPK_OVERHEAT_STS1 */ +#define CLEARWATER_SPK_OVERHEAT_STS1_SHIFT 1 /* SPK_OVERHEAT_STS1 */ +#define CLEARWATER_SPK_OVERHEAT_STS1_WIDTH 1 /* SPK_OVERHEAT_STS1 */ +#define CLEARWATER_SPK_SHUTDOWN_STS1 0x0001 /* SPK_SHUTDOWN_STS1 */ +#define CLEARWATER_SPK_SHUTDOWN_STS1_MASK 0x0001 /* SPK_SHUTDOWN_STS1 */ +#define CLEARWATER_SPK_SHUTDOWN_STS1_SHIFT 0 /* SPK_SHUTDOWN_STS1 */ +#define CLEARWATER_SPK_SHUTDOWN_STS1_WIDTH 1 /* SPK_SHUTDOWN_STS1 */ /* * R6475 (0x194B) - IRQ2 Mask 12 */ -#define WM8285_IM_SPKOUTR_SC_EINT2 0x0080 /* IM_SPKOUTR_SC_EINT2 */ -#define WM8285_IM_SPKOUTR_SC_EINT2_MASK 0x0080 /* IM_SPKOUTR_SC_EINT2 */ -#define WM8285_IM_SPKOUTR_SC_EINT2_SHIFT 7 /* IM_SPKOUTR_SC_EINT2 */ -#define WM8285_IM_SPKOUTR_SC_EINT2_WIDTH 1 /* IM_SPKOUTR_SC_EINT2 */ -#define WM8285_IM_SPKOUTL_SC_EINT2 0x0040 /* IM_SPKOUTL_SC_EINT2 */ -#define WM8285_IM_SPKOUTL_SC_EINT2_MASK 0x0040 /* IM_SPKOUTL_SC_EINT2 */ -#define WM8285_IM_SPKOUTL_SC_EINT2_SHIFT 6 /* IM_SPKOUTL_SC_EINT2 */ -#define WM8285_IM_SPKOUTL_SC_EINT2_WIDTH 1 /* IM_SPKOUTL_SC_EINT2 */ -#define WM8285_IM_HP3R_SC_EINT2 0x0020 /* IM_HP3R_SC_EINT2 */ -#define WM8285_IM_HP3R_SC_EINT2_MASK 0x0020 /* IM_HP3R_SC_EINT2 */ -#define WM8285_IM_HP3R_SC_EINT2_SHIFT 5 /* IM_HP3R_SC_EINT2 */ -#define WM8285_IM_HP3R_SC_EINT2_WIDTH 1 /* IM_HP3R_SC_EINT2 */ -#define WM8285_IM_HP3L_SC_EINT2 0x0010 /* IM_HP3L_SC_EINT2 */ -#define WM8285_IM_HP3L_SC_EINT2_MASK 0x0010 /* IM_HP3L_SC_EINT2 */ -#define WM8285_IM_HP3L_SC_EINT2_SHIFT 4 /* IM_HP3L_SC_EINT2 */ -#define WM8285_IM_HP3L_SC_EINT2_WIDTH 1 /* IM_HP3L_SC_EINT2 */ -#define WM8285_IM_HP2R_SC_EINT2 0x0008 /* IM_HP2R_SC_EINT2 */ -#define WM8285_IM_HP2R_SC_EINT2_MASK 0x0008 /* IM_HP2R_SC_EINT2 */ -#define WM8285_IM_HP2R_SC_EINT2_SHIFT 3 /* IM_HP2R_SC_EINT2 */ -#define WM8285_IM_HP2R_SC_EINT2_WIDTH 1 /* IM_HP2R_SC_EINT2 */ -#define WM8285_IM_HP2L_SC_EINT2 0x0004 /* IM_HP2L_SC_EINT2 */ -#define WM8285_IM_HP2L_SC_EINT2_MASK 0x0004 /* IM_HP2L_SC_EINT2 */ -#define WM8285_IM_HP2L_SC_EINT2_SHIFT 2 /* IM_HP2L_SC_EINT2 */ -#define WM8285_IM_HP2L_SC_EINT2_WIDTH 1 /* IM_HP2L_SC_EINT2 */ -#define WM8285_IM_HP1R_SC_EINT2 0x0002 /* IM_HP1R_SC_EINT2 */ -#define WM8285_IM_HP1R_SC_EINT2_MASK 0x0002 /* IM_HP1R_SC_EINT2 */ -#define WM8285_IM_HP1R_SC_EINT2_SHIFT 1 /* IM_HP1R_SC_EINT2 */ -#define WM8285_IM_HP1R_SC_EINT2_WIDTH 1 /* IM_HP1R_SC_EINT2 */ -#define WM8285_IM_HP1L_SC_EINT2 0x0001 /* IM_HP1L_SC_EINT2 */ -#define WM8285_IM_HP1L_SC_EINT2_MASK 0x0001 /* IM_HP1L_SC_EINT2 */ -#define WM8285_IM_HP1L_SC_EINT2_SHIFT 0 /* IM_HP1L_SC_EINT2 */ -#define WM8285_IM_HP1L_SC_EINT2_WIDTH 1 /* IM_HP1L_SC_EINT2 */ +#define CLEARWATER_IM_SPKOUTR_SC_EINT2 0x0080 /* IM_SPKOUTR_SC_EINT2 */ +#define CLEARWATER_IM_SPKOUTR_SC_EINT2_MASK 0x0080 /* IM_SPKOUTR_SC_EINT2 */ +#define CLEARWATER_IM_SPKOUTR_SC_EINT2_SHIFT 7 /* IM_SPKOUTR_SC_EINT2 */ +#define CLEARWATER_IM_SPKOUTR_SC_EINT2_WIDTH 1 /* IM_SPKOUTR_SC_EINT2 */ +#define CLEARWATER_IM_SPKOUTL_SC_EINT2 0x0040 /* IM_SPKOUTL_SC_EINT2 */ +#define CLEARWATER_IM_SPKOUTL_SC_EINT2_MASK 0x0040 /* IM_SPKOUTL_SC_EINT2 */ +#define CLEARWATER_IM_SPKOUTL_SC_EINT2_SHIFT 6 /* IM_SPKOUTL_SC_EINT2 */ +#define CLEARWATER_IM_SPKOUTL_SC_EINT2_WIDTH 1 /* IM_SPKOUTL_SC_EINT2 */ +#define CLEARWATER_IM_HP3R_SC_EINT2 0x0020 /* IM_HP3R_SC_EINT2 */ +#define CLEARWATER_IM_HP3R_SC_EINT2_MASK 0x0020 /* IM_HP3R_SC_EINT2 */ +#define CLEARWATER_IM_HP3R_SC_EINT2_SHIFT 5 /* IM_HP3R_SC_EINT2 */ +#define CLEARWATER_IM_HP3R_SC_EINT2_WIDTH 1 /* IM_HP3R_SC_EINT2 */ +#define CLEARWATER_IM_HP3L_SC_EINT2 0x0010 /* IM_HP3L_SC_EINT2 */ +#define CLEARWATER_IM_HP3L_SC_EINT2_MASK 0x0010 /* IM_HP3L_SC_EINT2 */ +#define CLEARWATER_IM_HP3L_SC_EINT2_SHIFT 4 /* IM_HP3L_SC_EINT2 */ +#define CLEARWATER_IM_HP3L_SC_EINT2_WIDTH 1 /* IM_HP3L_SC_EINT2 */ +#define CLEARWATER_IM_HP2R_SC_EINT2 0x0008 /* IM_HP2R_SC_EINT2 */ +#define CLEARWATER_IM_HP2R_SC_EINT2_MASK 0x0008 /* IM_HP2R_SC_EINT2 */ +#define CLEARWATER_IM_HP2R_SC_EINT2_SHIFT 3 /* IM_HP2R_SC_EINT2 */ +#define CLEARWATER_IM_HP2R_SC_EINT2_WIDTH 1 /* IM_HP2R_SC_EINT2 */ +#define CLEARWATER_IM_HP2L_SC_EINT2 0x0004 /* IM_HP2L_SC_EINT2 */ +#define CLEARWATER_IM_HP2L_SC_EINT2_MASK 0x0004 /* IM_HP2L_SC_EINT2 */ +#define CLEARWATER_IM_HP2L_SC_EINT2_SHIFT 2 /* IM_HP2L_SC_EINT2 */ +#define CLEARWATER_IM_HP2L_SC_EINT2_WIDTH 1 /* IM_HP2L_SC_EINT2 */ +#define CLEARWATER_IM_HP1R_SC_EINT2 0x0002 /* IM_HP1R_SC_EINT2 */ +#define CLEARWATER_IM_HP1R_SC_EINT2_MASK 0x0002 /* IM_HP1R_SC_EINT2 */ +#define CLEARWATER_IM_HP1R_SC_EINT2_SHIFT 1 /* IM_HP1R_SC_EINT2 */ +#define CLEARWATER_IM_HP1R_SC_EINT2_WIDTH 1 /* IM_HP1R_SC_EINT2 */ +#define CLEARWATER_IM_HP1L_SC_EINT2 0x0001 /* IM_HP1L_SC_EINT2 */ +#define CLEARWATER_IM_HP1L_SC_EINT2_MASK 0x0001 /* IM_HP1L_SC_EINT2 */ +#define CLEARWATER_IM_HP1L_SC_EINT2_SHIFT 0 /* IM_HP1L_SC_EINT2 */ +#define CLEARWATER_IM_HP1L_SC_EINT2_WIDTH 1 /* IM_HP1L_SC_EINT2 */ /* * R6476 (0x194C) - IRQ2 Mask 13 */ -#define WM8285_IM_SPKOUTR_ENABLE_DONE_EINT2 0x0080 /* IM_SPKOUTR_ENABLE_DONE_EINT2 */ -#define WM8285_IM_SPKOUTR_ENABLE_DONE_EINT2_MASK 0x0080 /* IM_SPKOUTR_ENABLE_DONE_EINT2 */ -#define WM8285_IM_SPKOUTR_ENABLE_DONE_EINT2_SHIFT 7 /* IM_SPKOUTR_ENABLE_DONE_EINT2 */ -#define WM8285_IM_SPKOUTR_ENABLE_DONE_EINT2_WIDTH 1 /* IM_SPKOUTR_ENABLE_DONE_EINT2 */ -#define WM8285_IM_SPKOUTL_ENABLE_DONE_EINT2 0x0040 /* IM_SPKOUTL_ENABLE_DONE_EINT2 */ -#define WM8285_IM_SPKOUTL_ENABLE_DONE_EINT2_MASK 0x0040 /* IM_SPKOUTL_ENABLE_DONE_EINT2 */ -#define WM8285_IM_SPKOUTL_ENABLE_DONE_EINT2_SHIFT 6 /* IM_SPKOUTL_ENABLE_DONE_EINT2 */ -#define WM8285_IM_SPKOUTL_ENABLE_DONE_EINT2_WIDTH 1 /* IM_SPKOUTL_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP3R_ENABLE_DONE_EINT2 0x0020 /* IM_HP3R_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP3R_ENABLE_DONE_EINT2_MASK 0x0020 /* IM_HP3R_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP3R_ENABLE_DONE_EINT2_SHIFT 5 /* IM_HP3R_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP3R_ENABLE_DONE_EINT2_WIDTH 1 /* IM_HP3R_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP3L_ENABLE_DONE_EINT2 0x0010 /* IM_HP3L_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP3L_ENABLE_DONE_EINT2_MASK 0x0010 /* IM_HP3L_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP3L_ENABLE_DONE_EINT2_SHIFT 4 /* IM_HP3L_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP3L_ENABLE_DONE_EINT2_WIDTH 1 /* IM_HP3L_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP2R_ENABLE_DONE_EINT2 0x0008 /* IM_HP2R_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP2R_ENABLE_DONE_EINT2_MASK 0x0008 /* IM_HP2R_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP2R_ENABLE_DONE_EINT2_SHIFT 3 /* IM_HP2R_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP2R_ENABLE_DONE_EINT2_WIDTH 1 /* IM_HP2R_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP2L_ENABLE_DONE_EINT2 0x0004 /* IM_HP2L_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP2L_ENABLE_DONE_EINT2_MASK 0x0004 /* IM_HP2L_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP2L_ENABLE_DONE_EINT2_SHIFT 2 /* IM_HP2L_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP2L_ENABLE_DONE_EINT2_WIDTH 1 /* IM_HP2L_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP1R_ENABLE_DONE_EINT2 0x0002 /* IM_HP1R_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP1R_ENABLE_DONE_EINT2_MASK 0x0002 /* IM_HP1R_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP1R_ENABLE_DONE_EINT2_SHIFT 1 /* IM_HP1R_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP1R_ENABLE_DONE_EINT2_WIDTH 1 /* IM_HP1R_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP1L_ENABLE_DONE_EINT2 0x0001 /* IM_HP1L_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP1L_ENABLE_DONE_EINT2_MASK 0x0001 /* IM_HP1L_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP1L_ENABLE_DONE_EINT2_SHIFT 0 /* IM_HP1L_ENABLE_DONE_EINT2 */ -#define WM8285_IM_HP1L_ENABLE_DONE_EINT2_WIDTH 1 /* IM_HP1L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_SPKOUTR_ENABLE_DONE_EINT2 0x0080 /* IM_SPKOUTR_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_SPKOUTR_ENABLE_DONE_EINT2_MASK 0x0080 /* IM_SPKOUTR_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_SPKOUTR_ENABLE_DONE_EINT2_SHIFT 7 /* IM_SPKOUTR_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_SPKOUTR_ENABLE_DONE_EINT2_WIDTH 1 /* IM_SPKOUTR_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_SPKOUTL_ENABLE_DONE_EINT2 0x0040 /* IM_SPKOUTL_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_SPKOUTL_ENABLE_DONE_EINT2_MASK 0x0040 /* IM_SPKOUTL_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_SPKOUTL_ENABLE_DONE_EINT2_SHIFT 6 /* IM_SPKOUTL_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_SPKOUTL_ENABLE_DONE_EINT2_WIDTH 1 /* IM_SPKOUTL_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP3R_ENABLE_DONE_EINT2 0x0020 /* IM_HP3R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP3R_ENABLE_DONE_EINT2_MASK 0x0020 /* IM_HP3R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP3R_ENABLE_DONE_EINT2_SHIFT 5 /* IM_HP3R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP3R_ENABLE_DONE_EINT2_WIDTH 1 /* IM_HP3R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP3L_ENABLE_DONE_EINT2 0x0010 /* IM_HP3L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP3L_ENABLE_DONE_EINT2_MASK 0x0010 /* IM_HP3L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP3L_ENABLE_DONE_EINT2_SHIFT 4 /* IM_HP3L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP3L_ENABLE_DONE_EINT2_WIDTH 1 /* IM_HP3L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP2R_ENABLE_DONE_EINT2 0x0008 /* IM_HP2R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP2R_ENABLE_DONE_EINT2_MASK 0x0008 /* IM_HP2R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP2R_ENABLE_DONE_EINT2_SHIFT 3 /* IM_HP2R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP2R_ENABLE_DONE_EINT2_WIDTH 1 /* IM_HP2R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP2L_ENABLE_DONE_EINT2 0x0004 /* IM_HP2L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP2L_ENABLE_DONE_EINT2_MASK 0x0004 /* IM_HP2L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP2L_ENABLE_DONE_EINT2_SHIFT 2 /* IM_HP2L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP2L_ENABLE_DONE_EINT2_WIDTH 1 /* IM_HP2L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP1R_ENABLE_DONE_EINT2 0x0002 /* IM_HP1R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP1R_ENABLE_DONE_EINT2_MASK 0x0002 /* IM_HP1R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP1R_ENABLE_DONE_EINT2_SHIFT 1 /* IM_HP1R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP1R_ENABLE_DONE_EINT2_WIDTH 1 /* IM_HP1R_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP1L_ENABLE_DONE_EINT2 0x0001 /* IM_HP1L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP1L_ENABLE_DONE_EINT2_MASK 0x0001 /* IM_HP1L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP1L_ENABLE_DONE_EINT2_SHIFT 0 /* IM_HP1L_ENABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP1L_ENABLE_DONE_EINT2_WIDTH 1 /* IM_HP1L_ENABLE_DONE_EINT2 */ /* * R6477 (0x194D) - IRQ2 Mask 14 */ -#define WM8285_IM_SPKOUTR_DISABLE_DONE_EINT2 0x0080 /* IM_SPKOUTR_DISABLE_DONE_EINT2 */ -#define WM8285_IM_SPKOUTR_DISABLE_DONE_EINT2_MASK 0x0080 /* IM_SPKOUTR_DISABLE_DONE_EINT2 */ -#define WM8285_IM_SPKOUTR_DISABLE_DONE_EINT2_SHIFT 7 /* IM_SPKOUTR_DISABLE_DONE_EINT2 */ -#define WM8285_IM_SPKOUTR_DISABLE_DONE_EINT2_WIDTH 1 /* IM_SPKOUTR_DISABLE_DONE_EINT2 */ -#define WM8285_IM_SPKOUTL_DISABLE_DONE_EINT2 0x0040 /* IM_SPKOUTL_DISABLE_DONE_EINT2 */ -#define WM8285_IM_SPKOUTL_DISABLE_DONE_EINT2_MASK 0x0040 /* IM_SPKOUTL_DISABLE_DONE_EINT2 */ -#define WM8285_IM_SPKOUTL_DISABLE_DONE_EINT2_SHIFT 6 /* IM_SPKOUTL_DISABLE_DONE_EINT2 */ -#define WM8285_IM_SPKOUTL_DISABLE_DONE_EINT2_WIDTH 1 /* IM_SPKOUTL_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP3R_DISABLE_DONE_EINT2 0x0020 /* IM_HP3R_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP3R_DISABLE_DONE_EINT2_MASK 0x0020 /* IM_HP3R_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP3R_DISABLE_DONE_EINT2_SHIFT 5 /* IM_HP3R_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP3R_DISABLE_DONE_EINT2_WIDTH 1 /* IM_HP3R_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP3L_DISABLE_DONE_EINT2 0x0010 /* IM_HP3L_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP3L_DISABLE_DONE_EINT2_MASK 0x0010 /* IM_HP3L_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP3L_DISABLE_DONE_EINT2_SHIFT 4 /* IM_HP3L_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP3L_DISABLE_DONE_EINT2_WIDTH 1 /* IM_HP3L_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP2R_DISABLE_DONE_EINT2 0x0008 /* IM_HP2R_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP2R_DISABLE_DONE_EINT2_MASK 0x0008 /* IM_HP2R_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP2R_DISABLE_DONE_EINT2_SHIFT 3 /* IM_HP2R_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP2R_DISABLE_DONE_EINT2_WIDTH 1 /* IM_HP2R_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP2L_DISABLE_DONE_EINT2 0x0004 /* IM_HP2L_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP2L_DISABLE_DONE_EINT2_MASK 0x0004 /* IM_HP2L_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP2L_DISABLE_DONE_EINT2_SHIFT 2 /* IM_HP2L_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP2L_DISABLE_DONE_EINT2_WIDTH 1 /* IM_HP2L_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP1R_DISABLE_DONE_EINT2 0x0002 /* IM_HP1R_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP1R_DISABLE_DONE_EINT2_MASK 0x0002 /* IM_HP1R_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP1R_DISABLE_DONE_EINT2_SHIFT 1 /* IM_HP1R_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP1R_DISABLE_DONE_EINT2_WIDTH 1 /* IM_HP1R_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP1L_DISABLE_DONE_EINT2 0x0001 /* IM_HP1L_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP1L_DISABLE_DONE_EINT2_MASK 0x0001 /* IM_HP1L_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP1L_DISABLE_DONE_EINT2_SHIFT 0 /* IM_HP1L_DISABLE_DONE_EINT2 */ -#define WM8285_IM_HP1L_DISABLE_DONE_EINT2_WIDTH 1 /* IM_HP1L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_SPKOUTR_DISABLE_DONE_EINT2 0x0080 /* IM_SPKOUTR_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_SPKOUTR_DISABLE_DONE_EINT2_MASK 0x0080 /* IM_SPKOUTR_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_SPKOUTR_DISABLE_DONE_EINT2_SHIFT 7 /* IM_SPKOUTR_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_SPKOUTR_DISABLE_DONE_EINT2_WIDTH 1 /* IM_SPKOUTR_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_SPKOUTL_DISABLE_DONE_EINT2 0x0040 /* IM_SPKOUTL_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_SPKOUTL_DISABLE_DONE_EINT2_MASK 0x0040 /* IM_SPKOUTL_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_SPKOUTL_DISABLE_DONE_EINT2_SHIFT 6 /* IM_SPKOUTL_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_SPKOUTL_DISABLE_DONE_EINT2_WIDTH 1 /* IM_SPKOUTL_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP3R_DISABLE_DONE_EINT2 0x0020 /* IM_HP3R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP3R_DISABLE_DONE_EINT2_MASK 0x0020 /* IM_HP3R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP3R_DISABLE_DONE_EINT2_SHIFT 5 /* IM_HP3R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP3R_DISABLE_DONE_EINT2_WIDTH 1 /* IM_HP3R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP3L_DISABLE_DONE_EINT2 0x0010 /* IM_HP3L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP3L_DISABLE_DONE_EINT2_MASK 0x0010 /* IM_HP3L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP3L_DISABLE_DONE_EINT2_SHIFT 4 /* IM_HP3L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP3L_DISABLE_DONE_EINT2_WIDTH 1 /* IM_HP3L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP2R_DISABLE_DONE_EINT2 0x0008 /* IM_HP2R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP2R_DISABLE_DONE_EINT2_MASK 0x0008 /* IM_HP2R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP2R_DISABLE_DONE_EINT2_SHIFT 3 /* IM_HP2R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP2R_DISABLE_DONE_EINT2_WIDTH 1 /* IM_HP2R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP2L_DISABLE_DONE_EINT2 0x0004 /* IM_HP2L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP2L_DISABLE_DONE_EINT2_MASK 0x0004 /* IM_HP2L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP2L_DISABLE_DONE_EINT2_SHIFT 2 /* IM_HP2L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP2L_DISABLE_DONE_EINT2_WIDTH 1 /* IM_HP2L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP1R_DISABLE_DONE_EINT2 0x0002 /* IM_HP1R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP1R_DISABLE_DONE_EINT2_MASK 0x0002 /* IM_HP1R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP1R_DISABLE_DONE_EINT2_SHIFT 1 /* IM_HP1R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP1R_DISABLE_DONE_EINT2_WIDTH 1 /* IM_HP1R_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP1L_DISABLE_DONE_EINT2 0x0001 /* IM_HP1L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP1L_DISABLE_DONE_EINT2_MASK 0x0001 /* IM_HP1L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP1L_DISABLE_DONE_EINT2_SHIFT 0 /* IM_HP1L_DISABLE_DONE_EINT2 */ +#define CLEARWATER_IM_HP1L_DISABLE_DONE_EINT2_WIDTH 1 /* IM_HP1L_DISABLE_DONE_EINT2 */ /* * R6478 (0x194E) - IRQ2 Mask 15 */ -#define WM8285_IM_SPK_OVERHEAT_WARN_EINT2 0x0004 /* IM_SPK_OVERHEAT_WARN_EINT2 */ -#define WM8285_IM_SPK_OVERHEAT_WARN_EINT2_MASK 0x0004 /* IM_SPK_OVERHEAT_WARN_EINT2 */ -#define WM8285_IM_SPK_OVERHEAT_WARN_EINT2_SHIFT 2 /* IM_SPK_OVERHEAT_WARN_EINT2 */ -#define WM8285_IM_SPK_OVERHEAT_WARN_EINT2_WIDTH 1 /* IM_SPK_OVERHEAT_WARN_EINT2 */ -#define WM8285_IM_SPK_OVERHEAT_EINT2 0x0002 /* IM_SPK_OVERHEAT_EINT2 */ -#define WM8285_IM_SPK_OVERHEAT_EINT2_MASK 0x0002 /* IM_SPK_OVERHEAT_EINT2 */ -#define WM8285_IM_SPK_OVERHEAT_EINT2_SHIFT 1 /* IM_SPK_OVERHEAT_EINT2 */ -#define WM8285_IM_SPK_OVERHEAT_EINT2_WIDTH 1 /* IM_SPK_OVERHEAT_EINT2 */ -#define WM8285_IM_SPK_SHUTDOWN_EINT2 0x0001 /* IM_SPK_SHUTDOWN_EINT2 */ -#define WM8285_IM_SPK_SHUTDOWN_EINT2_MASK 0x0001 /* IM_SPK_SHUTDOWN_EINT2 */ -#define WM8285_IM_SPK_SHUTDOWN_EINT2_SHIFT 0 /* IM_SPK_SHUTDOWN_EINT2 */ -#define WM8285_IM_SPK_SHUTDOWN_EINT2_WIDTH 1 /* IM_SPK_SHUTDOWN_EINT2 */ +#define CLEARWATER_IM_SPK_OVERHEAT_WARN_EINT2 0x0004 /* IM_SPK_OVERHEAT_WARN_EINT2 */ +#define CLEARWATER_IM_SPK_OVERHEAT_WARN_EINT2_MASK 0x0004 /* IM_SPK_OVERHEAT_WARN_EINT2 */ +#define CLEARWATER_IM_SPK_OVERHEAT_WARN_EINT2_SHIFT 2 /* IM_SPK_OVERHEAT_WARN_EINT2 */ +#define CLEARWATER_IM_SPK_OVERHEAT_WARN_EINT2_WIDTH 1 /* IM_SPK_OVERHEAT_WARN_EINT2 */ +#define CLEARWATER_IM_SPK_OVERHEAT_EINT2 0x0002 /* IM_SPK_OVERHEAT_EINT2 */ +#define CLEARWATER_IM_SPK_OVERHEAT_EINT2_MASK 0x0002 /* IM_SPK_OVERHEAT_EINT2 */ +#define CLEARWATER_IM_SPK_OVERHEAT_EINT2_SHIFT 1 /* IM_SPK_OVERHEAT_EINT2 */ +#define CLEARWATER_IM_SPK_OVERHEAT_EINT2_WIDTH 1 /* IM_SPK_OVERHEAT_EINT2 */ +#define CLEARWATER_IM_SPK_SHUTDOWN_EINT2 0x0001 /* IM_SPK_SHUTDOWN_EINT2 */ +#define CLEARWATER_IM_SPK_SHUTDOWN_EINT2_MASK 0x0001 /* IM_SPK_SHUTDOWN_EINT2 */ +#define CLEARWATER_IM_SPK_SHUTDOWN_EINT2_SHIFT 0 /* IM_SPK_SHUTDOWN_EINT2 */ +#define CLEARWATER_IM_SPK_SHUTDOWN_EINT2_WIDTH 1 /* IM_SPK_SHUTDOWN_EINT2 */ /* * R6528 (0x1980) - IRQ2 Raw Status 1 */ -#define WM8285_DSP_SHARED_WR_COLL_STS2 0x8000 /* DSP_SHARED_WR_COLL_STS2 */ -#define WM8285_DSP_SHARED_WR_COLL_STS2_MASK 0x8000 /* DSP_SHARED_WR_COLL_STS2 */ -#define WM8285_DSP_SHARED_WR_COLL_STS2_SHIFT 15 /* DSP_SHARED_WR_COLL_STS2 */ -#define WM8285_DSP_SHARED_WR_COLL_STS2_WIDTH 1 /* DSP_SHARED_WR_COLL_STS2 */ -#define WM8285_CTRLIF_ERR_STS2 0x1000 /* CTRLIF_ERR_STS2 */ -#define WM8285_CTRLIF_ERR_STS2_MASK 0x1000 /* CTRLIF_ERR_STS2 */ -#define WM8285_CTRLIF_ERR_STS2_SHIFT 12 /* CTRLIF_ERR_STS2 */ -#define WM8285_CTRLIF_ERR_STS2_WIDTH 1 /* CTRLIF_ERR_STS2 */ -#define WM8285_IRQ_NO_CLOCK_STS2 0x0200 /* IRQ_NO_CLOCK_STS2 */ -#define WM8285_IRQ_NO_CLOCK_STS2_MASK 0x0200 /* IRQ_NO_CLOCK_STS2 */ -#define WM8285_IRQ_NO_CLOCK_STS2_SHIFT 9 /* IRQ_NO_CLOCK_STS2 */ -#define WM8285_IRQ_NO_CLOCK_STS2_WIDTH 1 /* IRQ_NO_CLOCK_STS2 */ -#define WM8285_CLOCK_DETECT_STS2 0x0100 /* CLOCK_DETECT_STS2 */ -#define WM8285_CLOCK_DETECT_STS2_MASK 0x0100 /* CLOCK_DETECT_STS2 */ -#define WM8285_CLOCK_DETECT_STS2_SHIFT 8 /* CLOCK_DETECT_STS2 */ -#define WM8285_CLOCK_DETECT_STS2_WIDTH 1 /* CLOCK_DETECT_STS2 */ -#define WM8285_BOOT_DONE_STS2 0x0080 /* BOOT_DONE_STS2 */ -#define WM8285_BOOT_DONE_STS2_MASK 0x0080 /* BOOT_DONE_STS2 */ -#define WM8285_BOOT_DONE_STS2_SHIFT 7 /* BOOT_DONE_STS2 */ -#define WM8285_BOOT_DONE_STS2_WIDTH 1 /* BOOT_DONE_STS2 */ +#define CLEARWATER_DSP_SHARED_WR_COLL_STS2 0x8000 /* DSP_SHARED_WR_COLL_STS2 */ +#define CLEARWATER_DSP_SHARED_WR_COLL_STS2_MASK 0x8000 /* DSP_SHARED_WR_COLL_STS2 */ +#define CLEARWATER_DSP_SHARED_WR_COLL_STS2_SHIFT 15 /* DSP_SHARED_WR_COLL_STS2 */ +#define CLEARWATER_DSP_SHARED_WR_COLL_STS2_WIDTH 1 /* DSP_SHARED_WR_COLL_STS2 */ +#define CLEARWATER_CTRLIF_ERR_STS2 0x1000 /* CTRLIF_ERR_STS2 */ +#define CLEARWATER_CTRLIF_ERR_STS2_MASK 0x1000 /* CTRLIF_ERR_STS2 */ +#define CLEARWATER_CTRLIF_ERR_STS2_SHIFT 12 /* CTRLIF_ERR_STS2 */ +#define CLEARWATER_CTRLIF_ERR_STS2_WIDTH 1 /* CTRLIF_ERR_STS2 */ +#define CLEARWATER_IRQ_NO_CLOCK_STS2 0x0200 /* IRQ_NO_CLOCK_STS2 */ +#define CLEARWATER_IRQ_NO_CLOCK_STS2_MASK 0x0200 /* IRQ_NO_CLOCK_STS2 */ +#define CLEARWATER_IRQ_NO_CLOCK_STS2_SHIFT 9 /* IRQ_NO_CLOCK_STS2 */ +#define CLEARWATER_IRQ_NO_CLOCK_STS2_WIDTH 1 /* IRQ_NO_CLOCK_STS2 */ +#define CLEARWATER_CLOCK_DETECT_STS2 0x0100 /* CLOCK_DETECT_STS2 */ +#define CLEARWATER_CLOCK_DETECT_STS2_MASK 0x0100 /* CLOCK_DETECT_STS2 */ +#define CLEARWATER_CLOCK_DETECT_STS2_SHIFT 8 /* CLOCK_DETECT_STS2 */ +#define CLEARWATER_CLOCK_DETECT_STS2_WIDTH 1 /* CLOCK_DETECT_STS2 */ +#define CLEARWATER_BOOT_DONE_STS2 0x0080 /* BOOT_DONE_STS2 */ +#define CLEARWATER_BOOT_DONE_STS2_MASK 0x0080 /* BOOT_DONE_STS2 */ +#define CLEARWATER_BOOT_DONE_STS2_SHIFT 7 /* BOOT_DONE_STS2 */ +#define CLEARWATER_BOOT_DONE_STS2_WIDTH 1 /* BOOT_DONE_STS2 */ /* * R6529 (0x1981) - IRQ2 Raw Status 2 */ -#define WM8285_FLL3_LOCK_STS2 0x0400 /* FLL3_LOCK_STS2 */ -#define WM8285_FLL3_LOCK_STS2_MASK 0x0400 /* FLL3_LOCK_STS2 */ -#define WM8285_FLL3_LOCK_STS2_SHIFT 10 /* FLL3_LOCK_STS2 */ -#define WM8285_FLL3_LOCK_STS2_WIDTH 1 /* FLL3_LOCK_STS2 */ -#define WM8285_FLL2_LOCK_STS2 0x0200 /* FLL2_LOCK_STS2 */ -#define WM8285_FLL2_LOCK_STS2_MASK 0x0200 /* FLL2_LOCK_STS2 */ -#define WM8285_FLL2_LOCK_STS2_SHIFT 9 /* FLL2_LOCK_STS2 */ -#define WM8285_FLL2_LOCK_STS2_WIDTH 1 /* FLL2_LOCK_STS2 */ -#define WM8285_FLL1_LOCK_STS2 0x0100 /* FLL1_LOCK_STS2 */ -#define WM8285_FLL1_LOCK_STS2_MASK 0x0100 /* FLL1_LOCK_STS2 */ -#define WM8285_FLL1_LOCK_STS2_SHIFT 8 /* FLL1_LOCK_STS2 */ -#define WM8285_FLL1_LOCK_STS2_WIDTH 1 /* FLL1_LOCK_STS2 */ +#define CLEARWATER_FLL3_LOCK_STS2 0x0400 /* FLL3_LOCK_STS2 */ +#define CLEARWATER_FLL3_LOCK_STS2_MASK 0x0400 /* FLL3_LOCK_STS2 */ +#define CLEARWATER_FLL3_LOCK_STS2_SHIFT 10 /* FLL3_LOCK_STS2 */ +#define CLEARWATER_FLL3_LOCK_STS2_WIDTH 1 /* FLL3_LOCK_STS2 */ +#define CLEARWATER_FLL2_LOCK_STS2 0x0200 /* FLL2_LOCK_STS2 */ +#define CLEARWATER_FLL2_LOCK_STS2_MASK 0x0200 /* FLL2_LOCK_STS2 */ +#define CLEARWATER_FLL2_LOCK_STS2_SHIFT 9 /* FLL2_LOCK_STS2 */ +#define CLEARWATER_FLL2_LOCK_STS2_WIDTH 1 /* FLL2_LOCK_STS2 */ +#define CLEARWATER_FLL1_LOCK_STS2 0x0100 /* FLL1_LOCK_STS2 */ +#define CLEARWATER_FLL1_LOCK_STS2_MASK 0x0100 /* FLL1_LOCK_STS2 */ +#define CLEARWATER_FLL1_LOCK_STS2_SHIFT 8 /* FLL1_LOCK_STS2 */ +#define CLEARWATER_FLL1_LOCK_STS2_WIDTH 1 /* FLL1_LOCK_STS2 */ /* * R6533 (0x1985) - IRQ2 Raw Status 6 */ -#define WM8285_MICDET_STS2 0x0100 /* MICDET_STS2 */ -#define WM8285_MICDET_STS2_MASK 0x0100 /* MICDET_STS2 */ -#define WM8285_MICDET_STS2_SHIFT 8 /* MICDET_STS2 */ -#define WM8285_MICDET_STS2_WIDTH 1 /* MICDET_STS2 */ -#define WM8285_HPDET_STS2 0x0001 /* HPDET_STS2 */ -#define WM8285_HPDET_STS2_MASK 0x0001 /* HPDET_STS2 */ -#define WM8285_HPDET_STS2_SHIFT 0 /* HPDET_STS2 */ -#define WM8285_HPDET_STS2_WIDTH 1 /* HPDET_STS2 */ +#define CLEARWATER_MICDET_STS2 0x0100 /* MICDET_STS2 */ +#define CLEARWATER_MICDET_STS2_MASK 0x0100 /* MICDET_STS2 */ +#define CLEARWATER_MICDET_STS2_SHIFT 8 /* MICDET_STS2 */ +#define CLEARWATER_MICDET_STS2_WIDTH 1 /* MICDET_STS2 */ +#define CLEARWATER_HPDET_STS2 0x0001 /* HPDET_STS2 */ +#define CLEARWATER_HPDET_STS2_MASK 0x0001 /* HPDET_STS2 */ +#define CLEARWATER_HPDET_STS2_SHIFT 0 /* HPDET_STS2 */ +#define CLEARWATER_HPDET_STS2_WIDTH 1 /* HPDET_STS2 */ /* * R6534 (0x1986) - IRQ2 Raw Status 7 */ -#define WM8285_MICD_CLAMP_FALL_STS2 0x0020 /* MICD_CLAMP_FALL_STS2 */ -#define WM8285_MICD_CLAMP_FALL_STS2_MASK 0x0020 /* MICD_CLAMP_FALL_STS2 */ -#define WM8285_MICD_CLAMP_FALL_STS2_SHIFT 5 /* MICD_CLAMP_FALL_STS2 */ -#define WM8285_MICD_CLAMP_FALL_STS2_WIDTH 1 /* MICD_CLAMP_FALL_STS2 */ -#define WM8285_MICD_CLAMP_RISE_STS2 0x0010 /* MICD_CLAMP_RISE_STS2 */ -#define WM8285_MICD_CLAMP_RISE_STS2_MASK 0x0010 /* MICD_CLAMP_RISE_STS2 */ -#define WM8285_MICD_CLAMP_RISE_STS2_SHIFT 4 /* MICD_CLAMP_RISE_STS2 */ -#define WM8285_MICD_CLAMP_RISE_STS2_WIDTH 1 /* MICD_CLAMP_RISE_STS2 */ -#define WM8285_JD2_FALL_STS2 0x0008 /* JD2_FALL_STS2 */ -#define WM8285_JD2_FALL_STS2_MASK 0x0008 /* JD2_FALL_STS2 */ -#define WM8285_JD2_FALL_STS2_SHIFT 3 /* JD2_FALL_STS2 */ -#define WM8285_JD2_FALL_STS2_WIDTH 1 /* JD2_FALL_STS2 */ -#define WM8285_JD2_RISE_STS2 0x0004 /* JD2_RISE_STS2 */ -#define WM8285_JD2_RISE_STS2_MASK 0x0004 /* JD2_RISE_STS2 */ -#define WM8285_JD2_RISE_STS2_SHIFT 2 /* JD2_RISE_STS2 */ -#define WM8285_JD2_RISE_STS2_WIDTH 1 /* JD2_RISE_STS2 */ -#define WM8285_JD1_FALL_STS2 0x0002 /* JD1_FALL_STS2 */ -#define WM8285_JD1_FALL_STS2_MASK 0x0002 /* JD1_FALL_STS2 */ -#define WM8285_JD1_FALL_STS2_SHIFT 1 /* JD1_FALL_STS2 */ -#define WM8285_JD1_FALL_STS2_WIDTH 1 /* JD1_FALL_STS2 */ -#define WM8285_JD1_RISE_STS2 0x0001 /* JD1_RISE_STS2 */ -#define WM8285_JD1_RISE_STS2_MASK 0x0001 /* JD1_RISE_STS2 */ -#define WM8285_JD1_RISE_STS2_SHIFT 0 /* JD1_RISE_STS2 */ -#define WM8285_JD1_RISE_STS2_WIDTH 1 /* JD1_RISE_STS2 */ +#define CLEARWATER_MICD_CLAMP_FALL_STS2 0x0020 /* MICD_CLAMP_FALL_STS2 */ +#define CLEARWATER_MICD_CLAMP_FALL_STS2_MASK 0x0020 /* MICD_CLAMP_FALL_STS2 */ +#define CLEARWATER_MICD_CLAMP_FALL_STS2_SHIFT 5 /* MICD_CLAMP_FALL_STS2 */ +#define CLEARWATER_MICD_CLAMP_FALL_STS2_WIDTH 1 /* MICD_CLAMP_FALL_STS2 */ +#define CLEARWATER_MICD_CLAMP_RISE_STS2 0x0010 /* MICD_CLAMP_RISE_STS2 */ +#define CLEARWATER_MICD_CLAMP_RISE_STS2_MASK 0x0010 /* MICD_CLAMP_RISE_STS2 */ +#define CLEARWATER_MICD_CLAMP_RISE_STS2_SHIFT 4 /* MICD_CLAMP_RISE_STS2 */ +#define CLEARWATER_MICD_CLAMP_RISE_STS2_WIDTH 1 /* MICD_CLAMP_RISE_STS2 */ +#define CLEARWATER_JD2_FALL_STS2 0x0008 /* JD2_FALL_STS2 */ +#define CLEARWATER_JD2_FALL_STS2_MASK 0x0008 /* JD2_FALL_STS2 */ +#define CLEARWATER_JD2_FALL_STS2_SHIFT 3 /* JD2_FALL_STS2 */ +#define CLEARWATER_JD2_FALL_STS2_WIDTH 1 /* JD2_FALL_STS2 */ +#define CLEARWATER_JD2_RISE_STS2 0x0004 /* JD2_RISE_STS2 */ +#define CLEARWATER_JD2_RISE_STS2_MASK 0x0004 /* JD2_RISE_STS2 */ +#define CLEARWATER_JD2_RISE_STS2_SHIFT 2 /* JD2_RISE_STS2 */ +#define CLEARWATER_JD2_RISE_STS2_WIDTH 1 /* JD2_RISE_STS2 */ +#define CLEARWATER_JD1_FALL_STS2 0x0002 /* JD1_FALL_STS2 */ +#define CLEARWATER_JD1_FALL_STS2_MASK 0x0002 /* JD1_FALL_STS2 */ +#define CLEARWATER_JD1_FALL_STS2_SHIFT 1 /* JD1_FALL_STS2 */ +#define CLEARWATER_JD1_FALL_STS2_WIDTH 1 /* JD1_FALL_STS2 */ +#define CLEARWATER_JD1_RISE_STS2 0x0001 /* JD1_RISE_STS2 */ +#define CLEARWATER_JD1_RISE_STS2_MASK 0x0001 /* JD1_RISE_STS2 */ +#define CLEARWATER_JD1_RISE_STS2_SHIFT 0 /* JD1_RISE_STS2 */ +#define CLEARWATER_JD1_RISE_STS2_WIDTH 1 /* JD1_RISE_STS2 */ /* * R6536 (0x1988) - IRQ2 Raw Status 9 */ -#define WM8285_ASRC2_IN2_LOCK_STS2 0x0800 /* ASRC2_IN2_LOCK_STS2 */ -#define WM8285_ASRC2_IN2_LOCK_STS2_MASK 0x0800 /* ASRC2_IN2_LOCK_STS2 */ -#define WM8285_ASRC2_IN2_LOCK_STS2_SHIFT 11 /* ASRC2_IN2_LOCK_STS2 */ -#define WM8285_ASRC2_IN2_LOCK_STS2_WIDTH 1 /* ASRC2_IN2_LOCK_STS2 */ -#define WM8285_ASRC2_IN1_LOCK_STS2 0x0400 /* ASRC2_IN1_LOCK_STS2 */ -#define WM8285_ASRC2_IN1_LOCK_STS2_MASK 0x0400 /* ASRC2_IN1_LOCK_STS2 */ -#define WM8285_ASRC2_IN1_LOCK_STS2_SHIFT 10 /* ASRC2_IN1_LOCK_STS2 */ -#define WM8285_ASRC2_IN1_LOCK_STS2_WIDTH 1 /* ASRC2_IN1_LOCK_STS2 */ -#define WM8285_ASRC1_IN2_LOCK_STS2 0x0200 /* ASRC1_IN2_LOCK_STS2 */ -#define WM8285_ASRC1_IN2_LOCK_STS2_MASK 0x0200 /* ASRC1_IN2_LOCK_STS2 */ -#define WM8285_ASRC1_IN2_LOCK_STS2_SHIFT 9 /* ASRC1_IN2_LOCK_STS2 */ -#define WM8285_ASRC1_IN2_LOCK_STS2_WIDTH 1 /* ASRC1_IN2_LOCK_STS2 */ -#define WM8285_ASRC1_IN1_LOCK_STS2 0x0100 /* ASRC1_IN1_LOCK_STS2 */ -#define WM8285_ASRC1_IN1_LOCK_STS2_MASK 0x0100 /* ASRC1_IN1_LOCK_STS2 */ -#define WM8285_ASRC1_IN1_LOCK_STS2_SHIFT 8 /* ASRC1_IN1_LOCK_STS2 */ -#define WM8285_ASRC1_IN1_LOCK_STS2_WIDTH 1 /* ASRC1_IN1_LOCK_STS2 */ -#define WM8285_DRC2_SIG_DET_STS2 0x0002 /* DRC2_SIG_DET_STS2 */ -#define WM8285_DRC2_SIG_DET_STS2_MASK 0x0002 /* DRC2_SIG_DET_STS2 */ -#define WM8285_DRC2_SIG_DET_STS2_SHIFT 1 /* DRC2_SIG_DET_STS2 */ -#define WM8285_DRC2_SIG_DET_STS2_WIDTH 1 /* DRC2_SIG_DET_STS2 */ -#define WM8285_DRC1_SIG_DET_STS2 0x0001 /* DRC1_SIG_DET_STS2 */ -#define WM8285_DRC1_SIG_DET_STS2_MASK 0x0001 /* DRC1_SIG_DET_STS2 */ -#define WM8285_DRC1_SIG_DET_STS2_SHIFT 0 /* DRC1_SIG_DET_STS2 */ -#define WM8285_DRC1_SIG_DET_STS2_WIDTH 1 /* DRC1_SIG_DET_STS2 */ +#define CLEARWATER_ASRC2_IN2_LOCK_STS2 0x0800 /* ASRC2_IN2_LOCK_STS2 */ +#define CLEARWATER_ASRC2_IN2_LOCK_STS2_MASK 0x0800 /* ASRC2_IN2_LOCK_STS2 */ +#define CLEARWATER_ASRC2_IN2_LOCK_STS2_SHIFT 11 /* ASRC2_IN2_LOCK_STS2 */ +#define CLEARWATER_ASRC2_IN2_LOCK_STS2_WIDTH 1 /* ASRC2_IN2_LOCK_STS2 */ +#define CLEARWATER_ASRC2_IN1_LOCK_STS2 0x0400 /* ASRC2_IN1_LOCK_STS2 */ +#define CLEARWATER_ASRC2_IN1_LOCK_STS2_MASK 0x0400 /* ASRC2_IN1_LOCK_STS2 */ +#define CLEARWATER_ASRC2_IN1_LOCK_STS2_SHIFT 10 /* ASRC2_IN1_LOCK_STS2 */ +#define CLEARWATER_ASRC2_IN1_LOCK_STS2_WIDTH 1 /* ASRC2_IN1_LOCK_STS2 */ +#define CLEARWATER_ASRC1_IN2_LOCK_STS2 0x0200 /* ASRC1_IN2_LOCK_STS2 */ +#define CLEARWATER_ASRC1_IN2_LOCK_STS2_MASK 0x0200 /* ASRC1_IN2_LOCK_STS2 */ +#define CLEARWATER_ASRC1_IN2_LOCK_STS2_SHIFT 9 /* ASRC1_IN2_LOCK_STS2 */ +#define CLEARWATER_ASRC1_IN2_LOCK_STS2_WIDTH 1 /* ASRC1_IN2_LOCK_STS2 */ +#define CLEARWATER_ASRC1_IN1_LOCK_STS2 0x0100 /* ASRC1_IN1_LOCK_STS2 */ +#define CLEARWATER_ASRC1_IN1_LOCK_STS2_MASK 0x0100 /* ASRC1_IN1_LOCK_STS2 */ +#define CLEARWATER_ASRC1_IN1_LOCK_STS2_SHIFT 8 /* ASRC1_IN1_LOCK_STS2 */ +#define CLEARWATER_ASRC1_IN1_LOCK_STS2_WIDTH 1 /* ASRC1_IN1_LOCK_STS2 */ +#define CLEARWATER_DRC2_SIG_DET_STS2 0x0002 /* DRC2_SIG_DET_STS2 */ +#define CLEARWATER_DRC2_SIG_DET_STS2_MASK 0x0002 /* DRC2_SIG_DET_STS2 */ +#define CLEARWATER_DRC2_SIG_DET_STS2_SHIFT 1 /* DRC2_SIG_DET_STS2 */ +#define CLEARWATER_DRC2_SIG_DET_STS2_WIDTH 1 /* DRC2_SIG_DET_STS2 */ +#define CLEARWATER_DRC1_SIG_DET_STS2 0x0001 /* DRC1_SIG_DET_STS2 */ +#define CLEARWATER_DRC1_SIG_DET_STS2_MASK 0x0001 /* DRC1_SIG_DET_STS2 */ +#define CLEARWATER_DRC1_SIG_DET_STS2_SHIFT 0 /* DRC1_SIG_DET_STS2 */ +#define CLEARWATER_DRC1_SIG_DET_STS2_WIDTH 1 /* DRC1_SIG_DET_STS2 */ /* * R6538 (0x198A) - IRQ2 Raw Status 11 */ -#define WM8285_DSP_IRQ26_STS2 0x8000 /* DSP_IRQ26_STS2 */ -#define WM8285_DSP_IRQ26_STS2_MASK 0x8000 /* DSP_IRQ26_STS2 */ -#define WM8285_DSP_IRQ26_STS2_SHIFT 15 /* DSP_IRQ26_STS2 */ -#define WM8285_DSP_IRQ26_STS2_WIDTH 1 /* DSP_IRQ26_STS2 */ -#define WM8285_DSP_IRQ25_STS2 0x4000 /* DSP_IRQ25_STS2 */ -#define WM8285_DSP_IRQ25_STS2_MASK 0x4000 /* DSP_IRQ25_STS2 */ -#define WM8285_DSP_IRQ25_STS2_SHIFT 14 /* DSP_IRQ25_STS2 */ -#define WM8285_DSP_IRQ25_STS2_WIDTH 1 /* DSP_IRQ25_STS2 */ -#define WM8285_DSP_IRQ24_STS2 0x2000 /* DSP_IRQ24_STS2 */ -#define WM8285_DSP_IRQ24_STS2_MASK 0x2000 /* DSP_IRQ24_STS2 */ -#define WM8285_DSP_IRQ24_STS2_SHIFT 13 /* DSP_IRQ24_STS2 */ -#define WM8285_DSP_IRQ24_STS2_WIDTH 1 /* DSP_IRQ24_STS2 */ -#define WM8285_DSP_IRQ23_STS2 0x1000 /* DSP_IRQ23_STS2 */ -#define WM8285_DSP_IRQ23_STS2_MASK 0x1000 /* DSP_IRQ23_STS2 */ -#define WM8285_DSP_IRQ23_STS2_SHIFT 12 /* DSP_IRQ23_STS2 */ -#define WM8285_DSP_IRQ23_STS2_WIDTH 1 /* DSP_IRQ23_STS2 */ -#define WM8285_DSP_IRQ22_STS2 0x0800 /* DSP_IRQ22_STS2 */ -#define WM8285_DSP_IRQ22_STS2_MASK 0x0800 /* DSP_IRQ22_STS2 */ -#define WM8285_DSP_IRQ22_STS2_SHIFT 11 /* DSP_IRQ22_STS2 */ -#define WM8285_DSP_IRQ22_STS2_WIDTH 1 /* DSP_IRQ22_STS2 */ -#define WM8285_DSP_IRQ21_STS2 0x0400 /* DSP_IRQ21_STS2 */ -#define WM8285_DSP_IRQ21_STS2_MASK 0x0400 /* DSP_IRQ21_STS2 */ -#define WM8285_DSP_IRQ21_STS2_SHIFT 10 /* DSP_IRQ21_STS2 */ -#define WM8285_DSP_IRQ21_STS2_WIDTH 1 /* DSP_IRQ21_STS2 */ -#define WM8285_DSP_IRQ20_STS2 0x0200 /* DSP_IRQ20_STS2 */ -#define WM8285_DSP_IRQ20_STS2_MASK 0x0200 /* DSP_IRQ20_STS2 */ -#define WM8285_DSP_IRQ20_STS2_SHIFT 9 /* DSP_IRQ20_STS2 */ -#define WM8285_DSP_IRQ20_STS2_WIDTH 1 /* DSP_IRQ20_STS2 */ -#define WM8285_DSP_IRQ9_STS2 0x0100 /* DSP_IRQ9_STS2 */ -#define WM8285_DSP_IRQ9_STS2_MASK 0x0100 /* DSP_IRQ9_STS2 */ -#define WM8285_DSP_IRQ9_STS2_SHIFT 8 /* DSP_IRQ9_STS2 */ -#define WM8285_DSP_IRQ9_STS2_WIDTH 1 /* DSP_IRQ9_STS2 */ -#define WM8285_DSP_IRQ8_STS2 0x0080 /* DSP_IRQ8_STS2 */ -#define WM8285_DSP_IRQ8_STS2_MASK 0x0080 /* DSP_IRQ8_STS2 */ -#define WM8285_DSP_IRQ8_STS2_SHIFT 7 /* DSP_IRQ8_STS2 */ -#define WM8285_DSP_IRQ8_STS2_WIDTH 1 /* DSP_IRQ8_STS2 */ -#define WM8285_DSP_IRQ7_STS2 0x0040 /* DSP_IRQ7_STS2 */ -#define WM8285_DSP_IRQ7_STS2_MASK 0x0040 /* DSP_IRQ7_STS2 */ -#define WM8285_DSP_IRQ7_STS2_SHIFT 6 /* DSP_IRQ7_STS2 */ -#define WM8285_DSP_IRQ7_STS2_WIDTH 1 /* DSP_IRQ7_STS2 */ -#define WM8285_DSP_IRQ6_STS2 0x0020 /* DSP_IRQ6_STS2 */ -#define WM8285_DSP_IRQ6_STS2_MASK 0x0020 /* DSP_IRQ6_STS2 */ -#define WM8285_DSP_IRQ6_STS2_SHIFT 5 /* DSP_IRQ6_STS2 */ -#define WM8285_DSP_IRQ6_STS2_WIDTH 1 /* DSP_IRQ6_STS2 */ -#define WM8285_DSP_IRQ5_STS2 0x0010 /* DSP_IRQ5_STS2 */ -#define WM8285_DSP_IRQ5_STS2_MASK 0x0010 /* DSP_IRQ5_STS2 */ -#define WM8285_DSP_IRQ5_STS2_SHIFT 4 /* DSP_IRQ5_STS2 */ -#define WM8285_DSP_IRQ5_STS2_WIDTH 1 /* DSP_IRQ5_STS2 */ -#define WM8285_DSP_IRQ4_STS2 0x0008 /* DSP_IRQ4_STS2 */ -#define WM8285_DSP_IRQ4_STS2_MASK 0x0008 /* DSP_IRQ4_STS2 */ -#define WM8285_DSP_IRQ4_STS2_SHIFT 3 /* DSP_IRQ4_STS2 */ -#define WM8285_DSP_IRQ4_STS2_WIDTH 1 /* DSP_IRQ4_STS2 */ -#define WM8285_DSP_IRQ3_STS2 0x0004 /* DSP_IRQ3_STS2 */ -#define WM8285_DSP_IRQ3_STS2_MASK 0x0004 /* DSP_IRQ3_STS2 */ -#define WM8285_DSP_IRQ3_STS2_SHIFT 2 /* DSP_IRQ3_STS2 */ -#define WM8285_DSP_IRQ3_STS2_WIDTH 1 /* DSP_IRQ3_STS2 */ -#define WM8285_DSP_IRQ2_STS2 0x0002 /* DSP_IRQ2_STS2 */ -#define WM8285_DSP_IRQ2_STS2_MASK 0x0002 /* DSP_IRQ2_STS2 */ -#define WM8285_DSP_IRQ2_STS2_SHIFT 1 /* DSP_IRQ2_STS2 */ -#define WM8285_DSP_IRQ2_STS2_WIDTH 1 /* DSP_IRQ2_STS2 */ -#define WM8285_DSP_IRQ1_STS2 0x0001 /* DSP_IRQ1_STS2 */ -#define WM8285_DSP_IRQ1_STS2_MASK 0x0001 /* DSP_IRQ1_STS2 */ -#define WM8285_DSP_IRQ1_STS2_SHIFT 0 /* DSP_IRQ1_STS2 */ -#define WM8285_DSP_IRQ1_STS2_WIDTH 1 /* DSP_IRQ1_STS2 */ +#define CLEARWATER_DSP_IRQ26_STS2 0x8000 /* DSP_IRQ26_STS2 */ +#define CLEARWATER_DSP_IRQ26_STS2_MASK 0x8000 /* DSP_IRQ26_STS2 */ +#define CLEARWATER_DSP_IRQ26_STS2_SHIFT 15 /* DSP_IRQ26_STS2 */ +#define CLEARWATER_DSP_IRQ26_STS2_WIDTH 1 /* DSP_IRQ26_STS2 */ +#define CLEARWATER_DSP_IRQ25_STS2 0x4000 /* DSP_IRQ25_STS2 */ +#define CLEARWATER_DSP_IRQ25_STS2_MASK 0x4000 /* DSP_IRQ25_STS2 */ +#define CLEARWATER_DSP_IRQ25_STS2_SHIFT 14 /* DSP_IRQ25_STS2 */ +#define CLEARWATER_DSP_IRQ25_STS2_WIDTH 1 /* DSP_IRQ25_STS2 */ +#define CLEARWATER_DSP_IRQ24_STS2 0x2000 /* DSP_IRQ24_STS2 */ +#define CLEARWATER_DSP_IRQ24_STS2_MASK 0x2000 /* DSP_IRQ24_STS2 */ +#define CLEARWATER_DSP_IRQ24_STS2_SHIFT 13 /* DSP_IRQ24_STS2 */ +#define CLEARWATER_DSP_IRQ24_STS2_WIDTH 1 /* DSP_IRQ24_STS2 */ +#define CLEARWATER_DSP_IRQ23_STS2 0x1000 /* DSP_IRQ23_STS2 */ +#define CLEARWATER_DSP_IRQ23_STS2_MASK 0x1000 /* DSP_IRQ23_STS2 */ +#define CLEARWATER_DSP_IRQ23_STS2_SHIFT 12 /* DSP_IRQ23_STS2 */ +#define CLEARWATER_DSP_IRQ23_STS2_WIDTH 1 /* DSP_IRQ23_STS2 */ +#define CLEARWATER_DSP_IRQ22_STS2 0x0800 /* DSP_IRQ22_STS2 */ +#define CLEARWATER_DSP_IRQ22_STS2_MASK 0x0800 /* DSP_IRQ22_STS2 */ +#define CLEARWATER_DSP_IRQ22_STS2_SHIFT 11 /* DSP_IRQ22_STS2 */ +#define CLEARWATER_DSP_IRQ22_STS2_WIDTH 1 /* DSP_IRQ22_STS2 */ +#define CLEARWATER_DSP_IRQ21_STS2 0x0400 /* DSP_IRQ21_STS2 */ +#define CLEARWATER_DSP_IRQ21_STS2_MASK 0x0400 /* DSP_IRQ21_STS2 */ +#define CLEARWATER_DSP_IRQ21_STS2_SHIFT 10 /* DSP_IRQ21_STS2 */ +#define CLEARWATER_DSP_IRQ21_STS2_WIDTH 1 /* DSP_IRQ21_STS2 */ +#define CLEARWATER_DSP_IRQ20_STS2 0x0200 /* DSP_IRQ20_STS2 */ +#define CLEARWATER_DSP_IRQ20_STS2_MASK 0x0200 /* DSP_IRQ20_STS2 */ +#define CLEARWATER_DSP_IRQ20_STS2_SHIFT 9 /* DSP_IRQ20_STS2 */ +#define CLEARWATER_DSP_IRQ20_STS2_WIDTH 1 /* DSP_IRQ20_STS2 */ +#define CLEARWATER_DSP_IRQ9_STS2 0x0100 /* DSP_IRQ9_STS2 */ +#define CLEARWATER_DSP_IRQ9_STS2_MASK 0x0100 /* DSP_IRQ9_STS2 */ +#define CLEARWATER_DSP_IRQ9_STS2_SHIFT 8 /* DSP_IRQ9_STS2 */ +#define CLEARWATER_DSP_IRQ9_STS2_WIDTH 1 /* DSP_IRQ9_STS2 */ +#define CLEARWATER_DSP_IRQ8_STS2 0x0080 /* DSP_IRQ8_STS2 */ +#define CLEARWATER_DSP_IRQ8_STS2_MASK 0x0080 /* DSP_IRQ8_STS2 */ +#define CLEARWATER_DSP_IRQ8_STS2_SHIFT 7 /* DSP_IRQ8_STS2 */ +#define CLEARWATER_DSP_IRQ8_STS2_WIDTH 1 /* DSP_IRQ8_STS2 */ +#define CLEARWATER_DSP_IRQ7_STS2 0x0040 /* DSP_IRQ7_STS2 */ +#define CLEARWATER_DSP_IRQ7_STS2_MASK 0x0040 /* DSP_IRQ7_STS2 */ +#define CLEARWATER_DSP_IRQ7_STS2_SHIFT 6 /* DSP_IRQ7_STS2 */ +#define CLEARWATER_DSP_IRQ7_STS2_WIDTH 1 /* DSP_IRQ7_STS2 */ +#define CLEARWATER_DSP_IRQ6_STS2 0x0020 /* DSP_IRQ6_STS2 */ +#define CLEARWATER_DSP_IRQ6_STS2_MASK 0x0020 /* DSP_IRQ6_STS2 */ +#define CLEARWATER_DSP_IRQ6_STS2_SHIFT 5 /* DSP_IRQ6_STS2 */ +#define CLEARWATER_DSP_IRQ6_STS2_WIDTH 1 /* DSP_IRQ6_STS2 */ +#define CLEARWATER_DSP_IRQ5_STS2 0x0010 /* DSP_IRQ5_STS2 */ +#define CLEARWATER_DSP_IRQ5_STS2_MASK 0x0010 /* DSP_IRQ5_STS2 */ +#define CLEARWATER_DSP_IRQ5_STS2_SHIFT 4 /* DSP_IRQ5_STS2 */ +#define CLEARWATER_DSP_IRQ5_STS2_WIDTH 1 /* DSP_IRQ5_STS2 */ +#define CLEARWATER_DSP_IRQ4_STS2 0x0008 /* DSP_IRQ4_STS2 */ +#define CLEARWATER_DSP_IRQ4_STS2_MASK 0x0008 /* DSP_IRQ4_STS2 */ +#define CLEARWATER_DSP_IRQ4_STS2_SHIFT 3 /* DSP_IRQ4_STS2 */ +#define CLEARWATER_DSP_IRQ4_STS2_WIDTH 1 /* DSP_IRQ4_STS2 */ +#define CLEARWATER_DSP_IRQ3_STS2 0x0004 /* DSP_IRQ3_STS2 */ +#define CLEARWATER_DSP_IRQ3_STS2_MASK 0x0004 /* DSP_IRQ3_STS2 */ +#define CLEARWATER_DSP_IRQ3_STS2_SHIFT 2 /* DSP_IRQ3_STS2 */ +#define CLEARWATER_DSP_IRQ3_STS2_WIDTH 1 /* DSP_IRQ3_STS2 */ +#define CLEARWATER_DSP_IRQ2_STS2 0x0002 /* DSP_IRQ2_STS2 */ +#define CLEARWATER_DSP_IRQ2_STS2_MASK 0x0002 /* DSP_IRQ2_STS2 */ +#define CLEARWATER_DSP_IRQ2_STS2_SHIFT 1 /* DSP_IRQ2_STS2 */ +#define CLEARWATER_DSP_IRQ2_STS2_WIDTH 1 /* DSP_IRQ2_STS2 */ +#define CLEARWATER_DSP_IRQ1_STS2 0x0001 /* DSP_IRQ1_STS2 */ +#define CLEARWATER_DSP_IRQ1_STS2_MASK 0x0001 /* DSP_IRQ1_STS2 */ +#define CLEARWATER_DSP_IRQ1_STS2_SHIFT 0 /* DSP_IRQ1_STS2 */ +#define CLEARWATER_DSP_IRQ1_STS2_WIDTH 1 /* DSP_IRQ1_STS2 */ /* * R6539 (0x198B) - IRQ2 Raw Status 12 */ -#define WM8285_SPKOUTR_SC_STS2 0x0080 /* SPKOUTR_SC_STS2 */ -#define WM8285_SPKOUTR_SC_STS2_MASK 0x0080 /* SPKOUTR_SC_STS2 */ -#define WM8285_SPKOUTR_SC_STS2_SHIFT 7 /* SPKOUTR_SC_STS2 */ -#define WM8285_SPKOUTR_SC_STS2_WIDTH 1 /* SPKOUTR_SC_STS2 */ -#define WM8285_SPKOUTL_SC_STS2 0x0040 /* SPKOUTL_SC_STS2 */ -#define WM8285_SPKOUTL_SC_STS2_MASK 0x0040 /* SPKOUTL_SC_STS2 */ -#define WM8285_SPKOUTL_SC_STS2_SHIFT 6 /* SPKOUTL_SC_STS2 */ -#define WM8285_SPKOUTL_SC_STS2_WIDTH 1 /* SPKOUTL_SC_STS2 */ -#define WM8285_HP3R_SC_STS2 0x0020 /* HP3R_SC_STS2 */ -#define WM8285_HP3R_SC_STS2_MASK 0x0020 /* HP3R_SC_STS2 */ -#define WM8285_HP3R_SC_STS2_SHIFT 5 /* HP3R_SC_STS2 */ -#define WM8285_HP3R_SC_STS2_WIDTH 1 /* HP3R_SC_STS2 */ -#define WM8285_HP3L_SC_STS2 0x0010 /* HP3L_SC_STS2 */ -#define WM8285_HP3L_SC_STS2_MASK 0x0010 /* HP3L_SC_STS2 */ -#define WM8285_HP3L_SC_STS2_SHIFT 4 /* HP3L_SC_STS2 */ -#define WM8285_HP3L_SC_STS2_WIDTH 1 /* HP3L_SC_STS2 */ -#define WM8285_HP2R_SC_STS2 0x0008 /* HP2R_SC_STS2 */ -#define WM8285_HP2R_SC_STS2_MASK 0x0008 /* HP2R_SC_STS2 */ -#define WM8285_HP2R_SC_STS2_SHIFT 3 /* HP2R_SC_STS2 */ -#define WM8285_HP2R_SC_STS2_WIDTH 1 /* HP2R_SC_STS2 */ -#define WM8285_HP2L_SC_STS2 0x0004 /* HP2L_SC_STS2 */ -#define WM8285_HP2L_SC_STS2_MASK 0x0004 /* HP2L_SC_STS2 */ -#define WM8285_HP2L_SC_STS2_SHIFT 2 /* HP2L_SC_STS2 */ -#define WM8285_HP2L_SC_STS2_WIDTH 1 /* HP2L_SC_STS2 */ -#define WM8285_HP1R_SC_STS2 0x0002 /* HP1R_SC_STS2 */ -#define WM8285_HP1R_SC_STS2_MASK 0x0002 /* HP1R_SC_STS2 */ -#define WM8285_HP1R_SC_STS2_SHIFT 1 /* HP1R_SC_STS2 */ -#define WM8285_HP1R_SC_STS2_WIDTH 1 /* HP1R_SC_STS2 */ -#define WM8285_HP1L_SC_STS2 0x0001 /* HP1L_SC_STS2 */ -#define WM8285_HP1L_SC_STS2_MASK 0x0001 /* HP1L_SC_STS2 */ -#define WM8285_HP1L_SC_STS2_SHIFT 0 /* HP1L_SC_STS2 */ -#define WM8285_HP1L_SC_STS2_WIDTH 1 /* HP1L_SC_STS2 */ +#define CLEARWATER_SPKOUTR_SC_STS2 0x0080 /* SPKOUTR_SC_STS2 */ +#define CLEARWATER_SPKOUTR_SC_STS2_MASK 0x0080 /* SPKOUTR_SC_STS2 */ +#define CLEARWATER_SPKOUTR_SC_STS2_SHIFT 7 /* SPKOUTR_SC_STS2 */ +#define CLEARWATER_SPKOUTR_SC_STS2_WIDTH 1 /* SPKOUTR_SC_STS2 */ +#define CLEARWATER_SPKOUTL_SC_STS2 0x0040 /* SPKOUTL_SC_STS2 */ +#define CLEARWATER_SPKOUTL_SC_STS2_MASK 0x0040 /* SPKOUTL_SC_STS2 */ +#define CLEARWATER_SPKOUTL_SC_STS2_SHIFT 6 /* SPKOUTL_SC_STS2 */ +#define CLEARWATER_SPKOUTL_SC_STS2_WIDTH 1 /* SPKOUTL_SC_STS2 */ +#define CLEARWATER_HP3R_SC_STS2 0x0020 /* HP3R_SC_STS2 */ +#define CLEARWATER_HP3R_SC_STS2_MASK 0x0020 /* HP3R_SC_STS2 */ +#define CLEARWATER_HP3R_SC_STS2_SHIFT 5 /* HP3R_SC_STS2 */ +#define CLEARWATER_HP3R_SC_STS2_WIDTH 1 /* HP3R_SC_STS2 */ +#define CLEARWATER_HP3L_SC_STS2 0x0010 /* HP3L_SC_STS2 */ +#define CLEARWATER_HP3L_SC_STS2_MASK 0x0010 /* HP3L_SC_STS2 */ +#define CLEARWATER_HP3L_SC_STS2_SHIFT 4 /* HP3L_SC_STS2 */ +#define CLEARWATER_HP3L_SC_STS2_WIDTH 1 /* HP3L_SC_STS2 */ +#define CLEARWATER_HP2R_SC_STS2 0x0008 /* HP2R_SC_STS2 */ +#define CLEARWATER_HP2R_SC_STS2_MASK 0x0008 /* HP2R_SC_STS2 */ +#define CLEARWATER_HP2R_SC_STS2_SHIFT 3 /* HP2R_SC_STS2 */ +#define CLEARWATER_HP2R_SC_STS2_WIDTH 1 /* HP2R_SC_STS2 */ +#define CLEARWATER_HP2L_SC_STS2 0x0004 /* HP2L_SC_STS2 */ +#define CLEARWATER_HP2L_SC_STS2_MASK 0x0004 /* HP2L_SC_STS2 */ +#define CLEARWATER_HP2L_SC_STS2_SHIFT 2 /* HP2L_SC_STS2 */ +#define CLEARWATER_HP2L_SC_STS2_WIDTH 1 /* HP2L_SC_STS2 */ +#define CLEARWATER_HP1R_SC_STS2 0x0002 /* HP1R_SC_STS2 */ +#define CLEARWATER_HP1R_SC_STS2_MASK 0x0002 /* HP1R_SC_STS2 */ +#define CLEARWATER_HP1R_SC_STS2_SHIFT 1 /* HP1R_SC_STS2 */ +#define CLEARWATER_HP1R_SC_STS2_WIDTH 1 /* HP1R_SC_STS2 */ +#define CLEARWATER_HP1L_SC_STS2 0x0001 /* HP1L_SC_STS2 */ +#define CLEARWATER_HP1L_SC_STS2_MASK 0x0001 /* HP1L_SC_STS2 */ +#define CLEARWATER_HP1L_SC_STS2_SHIFT 0 /* HP1L_SC_STS2 */ +#define CLEARWATER_HP1L_SC_STS2_WIDTH 1 /* HP1L_SC_STS2 */ /* * R6540 (0x198C) - IRQ2 Raw Status 13 */ -#define WM8285_SPKOUTR_ENABLE_DONE_STS2 0x0080 /* SPKOUTR_ENABLE_DONE_STS2 */ -#define WM8285_SPKOUTR_ENABLE_DONE_STS2_MASK 0x0080 /* SPKOUTR_ENABLE_DONE_STS2 */ -#define WM8285_SPKOUTR_ENABLE_DONE_STS2_SHIFT 7 /* SPKOUTR_ENABLE_DONE_STS2 */ -#define WM8285_SPKOUTR_ENABLE_DONE_STS2_WIDTH 1 /* SPKOUTR_ENABLE_DONE_STS2 */ -#define WM8285_SPKOUTL_ENABLE_DONE_STS2 0x0040 /* SPKOUTL_ENABLE_DONE_STS2 */ -#define WM8285_SPKOUTL_ENABLE_DONE_STS2_MASK 0x0040 /* SPKOUTL_ENABLE_DONE_STS2 */ -#define WM8285_SPKOUTL_ENABLE_DONE_STS2_SHIFT 6 /* SPKOUTL_ENABLE_DONE_STS2 */ -#define WM8285_SPKOUTL_ENABLE_DONE_STS2_WIDTH 1 /* SPKOUTL_ENABLE_DONE_STS2 */ -#define WM8285_HP3R_ENABLE_DONE_STS2 0x0020 /* HP3R_ENABLE_DONE_STS2 */ -#define WM8285_HP3R_ENABLE_DONE_STS2_MASK 0x0020 /* HP3R_ENABLE_DONE_STS2 */ -#define WM8285_HP3R_ENABLE_DONE_STS2_SHIFT 5 /* HP3R_ENABLE_DONE_STS2 */ -#define WM8285_HP3R_ENABLE_DONE_STS2_WIDTH 1 /* HP3R_ENABLE_DONE_STS2 */ -#define WM8285_HP3L_ENABLE_DONE_STS2 0x0010 /* HP3L_ENABLE_DONE_STS2 */ -#define WM8285_HP3L_ENABLE_DONE_STS2_MASK 0x0010 /* HP3L_ENABLE_DONE_STS2 */ -#define WM8285_HP3L_ENABLE_DONE_STS2_SHIFT 4 /* HP3L_ENABLE_DONE_STS2 */ -#define WM8285_HP3L_ENABLE_DONE_STS2_WIDTH 1 /* HP3L_ENABLE_DONE_STS2 */ -#define WM8285_HP2R_ENABLE_DONE_STS2 0x0008 /* HP2R_ENABLE_DONE_STS2 */ -#define WM8285_HP2R_ENABLE_DONE_STS2_MASK 0x0008 /* HP2R_ENABLE_DONE_STS2 */ -#define WM8285_HP2R_ENABLE_DONE_STS2_SHIFT 3 /* HP2R_ENABLE_DONE_STS2 */ -#define WM8285_HP2R_ENABLE_DONE_STS2_WIDTH 1 /* HP2R_ENABLE_DONE_STS2 */ -#define WM8285_HP2L_ENABLE_DONE_STS2 0x0004 /* HP2L_ENABLE_DONE_STS2 */ -#define WM8285_HP2L_ENABLE_DONE_STS2_MASK 0x0004 /* HP2L_ENABLE_DONE_STS2 */ -#define WM8285_HP2L_ENABLE_DONE_STS2_SHIFT 2 /* HP2L_ENABLE_DONE_STS2 */ -#define WM8285_HP2L_ENABLE_DONE_STS2_WIDTH 1 /* HP2L_ENABLE_DONE_STS2 */ -#define WM8285_HP1R_ENABLE_DONE_STS2 0x0002 /* HP1R_ENABLE_DONE_STS2 */ -#define WM8285_HP1R_ENABLE_DONE_STS2_MASK 0x0002 /* HP1R_ENABLE_DONE_STS2 */ -#define WM8285_HP1R_ENABLE_DONE_STS2_SHIFT 1 /* HP1R_ENABLE_DONE_STS2 */ -#define WM8285_HP1R_ENABLE_DONE_STS2_WIDTH 1 /* HP1R_ENABLE_DONE_STS2 */ -#define WM8285_HP1L_ENABLE_DONE_STS2 0x0001 /* HP1L_ENABLE_DONE_STS2 */ -#define WM8285_HP1L_ENABLE_DONE_STS2_MASK 0x0001 /* HP1L_ENABLE_DONE_STS2 */ -#define WM8285_HP1L_ENABLE_DONE_STS2_SHIFT 0 /* HP1L_ENABLE_DONE_STS2 */ -#define WM8285_HP1L_ENABLE_DONE_STS2_WIDTH 1 /* HP1L_ENABLE_DONE_STS2 */ +#define CLEARWATER_SPKOUTR_ENABLE_DONE_STS2 0x0080 /* SPKOUTR_ENABLE_DONE_STS2 */ +#define CLEARWATER_SPKOUTR_ENABLE_DONE_STS2_MASK 0x0080 /* SPKOUTR_ENABLE_DONE_STS2 */ +#define CLEARWATER_SPKOUTR_ENABLE_DONE_STS2_SHIFT 7 /* SPKOUTR_ENABLE_DONE_STS2 */ +#define CLEARWATER_SPKOUTR_ENABLE_DONE_STS2_WIDTH 1 /* SPKOUTR_ENABLE_DONE_STS2 */ +#define CLEARWATER_SPKOUTL_ENABLE_DONE_STS2 0x0040 /* SPKOUTL_ENABLE_DONE_STS2 */ +#define CLEARWATER_SPKOUTL_ENABLE_DONE_STS2_MASK 0x0040 /* SPKOUTL_ENABLE_DONE_STS2 */ +#define CLEARWATER_SPKOUTL_ENABLE_DONE_STS2_SHIFT 6 /* SPKOUTL_ENABLE_DONE_STS2 */ +#define CLEARWATER_SPKOUTL_ENABLE_DONE_STS2_WIDTH 1 /* SPKOUTL_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP3R_ENABLE_DONE_STS2 0x0020 /* HP3R_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP3R_ENABLE_DONE_STS2_MASK 0x0020 /* HP3R_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP3R_ENABLE_DONE_STS2_SHIFT 5 /* HP3R_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP3R_ENABLE_DONE_STS2_WIDTH 1 /* HP3R_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP3L_ENABLE_DONE_STS2 0x0010 /* HP3L_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP3L_ENABLE_DONE_STS2_MASK 0x0010 /* HP3L_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP3L_ENABLE_DONE_STS2_SHIFT 4 /* HP3L_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP3L_ENABLE_DONE_STS2_WIDTH 1 /* HP3L_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP2R_ENABLE_DONE_STS2 0x0008 /* HP2R_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP2R_ENABLE_DONE_STS2_MASK 0x0008 /* HP2R_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP2R_ENABLE_DONE_STS2_SHIFT 3 /* HP2R_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP2R_ENABLE_DONE_STS2_WIDTH 1 /* HP2R_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP2L_ENABLE_DONE_STS2 0x0004 /* HP2L_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP2L_ENABLE_DONE_STS2_MASK 0x0004 /* HP2L_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP2L_ENABLE_DONE_STS2_SHIFT 2 /* HP2L_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP2L_ENABLE_DONE_STS2_WIDTH 1 /* HP2L_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP1R_ENABLE_DONE_STS2 0x0002 /* HP1R_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP1R_ENABLE_DONE_STS2_MASK 0x0002 /* HP1R_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP1R_ENABLE_DONE_STS2_SHIFT 1 /* HP1R_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP1R_ENABLE_DONE_STS2_WIDTH 1 /* HP1R_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP1L_ENABLE_DONE_STS2 0x0001 /* HP1L_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP1L_ENABLE_DONE_STS2_MASK 0x0001 /* HP1L_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP1L_ENABLE_DONE_STS2_SHIFT 0 /* HP1L_ENABLE_DONE_STS2 */ +#define CLEARWATER_HP1L_ENABLE_DONE_STS2_WIDTH 1 /* HP1L_ENABLE_DONE_STS2 */ /* * R6541 (0x198D) - IRQ2 Raw Status 14 */ -#define WM8285_SPKOUTR_DISABLE_DONE_STS2 0x0080 /* SPKOUTR_DISABLE_DONE_STS2 */ -#define WM8285_SPKOUTR_DISABLE_DONE_STS2_MASK 0x0080 /* SPKOUTR_DISABLE_DONE_STS2 */ -#define WM8285_SPKOUTR_DISABLE_DONE_STS2_SHIFT 7 /* SPKOUTR_DISABLE_DONE_STS2 */ -#define WM8285_SPKOUTR_DISABLE_DONE_STS2_WIDTH 1 /* SPKOUTR_DISABLE_DONE_STS2 */ -#define WM8285_SPKOUTL_DISABLE_DONE_STS2 0x0040 /* SPKOUTL_DISABLE_DONE_STS2 */ -#define WM8285_SPKOUTL_DISABLE_DONE_STS2_MASK 0x0040 /* SPKOUTL_DISABLE_DONE_STS2 */ -#define WM8285_SPKOUTL_DISABLE_DONE_STS2_SHIFT 6 /* SPKOUTL_DISABLE_DONE_STS2 */ -#define WM8285_SPKOUTL_DISABLE_DONE_STS2_WIDTH 1 /* SPKOUTL_DISABLE_DONE_STS2 */ -#define WM8285_HP3R_DISABLE_DONE_STS2 0x0020 /* HP3R_DISABLE_DONE_STS2 */ -#define WM8285_HP3R_DISABLE_DONE_STS2_MASK 0x0020 /* HP3R_DISABLE_DONE_STS2 */ -#define WM8285_HP3R_DISABLE_DONE_STS2_SHIFT 5 /* HP3R_DISABLE_DONE_STS2 */ -#define WM8285_HP3R_DISABLE_DONE_STS2_WIDTH 1 /* HP3R_DISABLE_DONE_STS2 */ -#define WM8285_HP3L_DISABLE_DONE_STS2 0x0010 /* HP3L_DISABLE_DONE_STS2 */ -#define WM8285_HP3L_DISABLE_DONE_STS2_MASK 0x0010 /* HP3L_DISABLE_DONE_STS2 */ -#define WM8285_HP3L_DISABLE_DONE_STS2_SHIFT 4 /* HP3L_DISABLE_DONE_STS2 */ -#define WM8285_HP3L_DISABLE_DONE_STS2_WIDTH 1 /* HP3L_DISABLE_DONE_STS2 */ -#define WM8285_HP2R_DISABLE_DONE_STS2 0x0008 /* HP2R_DISABLE_DONE_STS2 */ -#define WM8285_HP2R_DISABLE_DONE_STS2_MASK 0x0008 /* HP2R_DISABLE_DONE_STS2 */ -#define WM8285_HP2R_DISABLE_DONE_STS2_SHIFT 3 /* HP2R_DISABLE_DONE_STS2 */ -#define WM8285_HP2R_DISABLE_DONE_STS2_WIDTH 1 /* HP2R_DISABLE_DONE_STS2 */ -#define WM8285_HP2L_DISABLE_DONE_STS2 0x0004 /* HP2L_DISABLE_DONE_STS2 */ -#define WM8285_HP2L_DISABLE_DONE_STS2_MASK 0x0004 /* HP2L_DISABLE_DONE_STS2 */ -#define WM8285_HP2L_DISABLE_DONE_STS2_SHIFT 2 /* HP2L_DISABLE_DONE_STS2 */ -#define WM8285_HP2L_DISABLE_DONE_STS2_WIDTH 1 /* HP2L_DISABLE_DONE_STS2 */ -#define WM8285_HP1R_DISABLE_DONE_STS2 0x0002 /* HP1R_DISABLE_DONE_STS2 */ -#define WM8285_HP1R_DISABLE_DONE_STS2_MASK 0x0002 /* HP1R_DISABLE_DONE_STS2 */ -#define WM8285_HP1R_DISABLE_DONE_STS2_SHIFT 1 /* HP1R_DISABLE_DONE_STS2 */ -#define WM8285_HP1R_DISABLE_DONE_STS2_WIDTH 1 /* HP1R_DISABLE_DONE_STS2 */ -#define WM8285_HP1L_DISABLE_DONE_STS2 0x0001 /* HP1L_DISABLE_DONE_STS2 */ -#define WM8285_HP1L_DISABLE_DONE_STS2_MASK 0x0001 /* HP1L_DISABLE_DONE_STS2 */ -#define WM8285_HP1L_DISABLE_DONE_STS2_SHIFT 0 /* HP1L_DISABLE_DONE_STS2 */ -#define WM8285_HP1L_DISABLE_DONE_STS2_WIDTH 1 /* HP1L_DISABLE_DONE_STS2 */ +#define CLEARWATER_SPKOUTR_DISABLE_DONE_STS2 0x0080 /* SPKOUTR_DISABLE_DONE_STS2 */ +#define CLEARWATER_SPKOUTR_DISABLE_DONE_STS2_MASK 0x0080 /* SPKOUTR_DISABLE_DONE_STS2 */ +#define CLEARWATER_SPKOUTR_DISABLE_DONE_STS2_SHIFT 7 /* SPKOUTR_DISABLE_DONE_STS2 */ +#define CLEARWATER_SPKOUTR_DISABLE_DONE_STS2_WIDTH 1 /* SPKOUTR_DISABLE_DONE_STS2 */ +#define CLEARWATER_SPKOUTL_DISABLE_DONE_STS2 0x0040 /* SPKOUTL_DISABLE_DONE_STS2 */ +#define CLEARWATER_SPKOUTL_DISABLE_DONE_STS2_MASK 0x0040 /* SPKOUTL_DISABLE_DONE_STS2 */ +#define CLEARWATER_SPKOUTL_DISABLE_DONE_STS2_SHIFT 6 /* SPKOUTL_DISABLE_DONE_STS2 */ +#define CLEARWATER_SPKOUTL_DISABLE_DONE_STS2_WIDTH 1 /* SPKOUTL_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP3R_DISABLE_DONE_STS2 0x0020 /* HP3R_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP3R_DISABLE_DONE_STS2_MASK 0x0020 /* HP3R_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP3R_DISABLE_DONE_STS2_SHIFT 5 /* HP3R_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP3R_DISABLE_DONE_STS2_WIDTH 1 /* HP3R_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP3L_DISABLE_DONE_STS2 0x0010 /* HP3L_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP3L_DISABLE_DONE_STS2_MASK 0x0010 /* HP3L_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP3L_DISABLE_DONE_STS2_SHIFT 4 /* HP3L_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP3L_DISABLE_DONE_STS2_WIDTH 1 /* HP3L_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP2R_DISABLE_DONE_STS2 0x0008 /* HP2R_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP2R_DISABLE_DONE_STS2_MASK 0x0008 /* HP2R_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP2R_DISABLE_DONE_STS2_SHIFT 3 /* HP2R_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP2R_DISABLE_DONE_STS2_WIDTH 1 /* HP2R_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP2L_DISABLE_DONE_STS2 0x0004 /* HP2L_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP2L_DISABLE_DONE_STS2_MASK 0x0004 /* HP2L_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP2L_DISABLE_DONE_STS2_SHIFT 2 /* HP2L_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP2L_DISABLE_DONE_STS2_WIDTH 1 /* HP2L_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP1R_DISABLE_DONE_STS2 0x0002 /* HP1R_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP1R_DISABLE_DONE_STS2_MASK 0x0002 /* HP1R_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP1R_DISABLE_DONE_STS2_SHIFT 1 /* HP1R_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP1R_DISABLE_DONE_STS2_WIDTH 1 /* HP1R_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP1L_DISABLE_DONE_STS2 0x0001 /* HP1L_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP1L_DISABLE_DONE_STS2_MASK 0x0001 /* HP1L_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP1L_DISABLE_DONE_STS2_SHIFT 0 /* HP1L_DISABLE_DONE_STS2 */ +#define CLEARWATER_HP1L_DISABLE_DONE_STS2_WIDTH 1 /* HP1L_DISABLE_DONE_STS2 */ /* * R6542 (0x198E) - IRQ2 Raw Status 15 */ -#define WM8285_SPK_OVERHEAT_WARN_STS2 0x0004 /* SPK_OVERHEAT_WARN_STS2 */ -#define WM8285_SPK_OVERHEAT_WARN_STS2_MASK 0x0004 /* SPK_OVERHEAT_WARN_STS2 */ -#define WM8285_SPK_OVERHEAT_WARN_STS2_SHIFT 2 /* SPK_OVERHEAT_WARN_STS2 */ -#define WM8285_SPK_OVERHEAT_WARN_STS2_WIDTH 1 /* SPK_OVERHEAT_WARN_STS2 */ -#define WM8285_SPK_OVERHEAT_STS2 0x0002 /* SPK_OVERHEAT_STS2 */ -#define WM8285_SPK_OVERHEAT_STS2_MASK 0x0002 /* SPK_OVERHEAT_STS2 */ -#define WM8285_SPK_OVERHEAT_STS2_SHIFT 1 /* SPK_OVERHEAT_STS2 */ -#define WM8285_SPK_OVERHEAT_STS2_WIDTH 1 /* SPK_OVERHEAT_STS2 */ -#define WM8285_SPK_SHUTDOWN_STS2 0x0001 /* SPK_SHUTDOWN_STS2 */ -#define WM8285_SPK_SHUTDOWN_STS2_MASK 0x0001 /* SPK_SHUTDOWN_STS2 */ -#define WM8285_SPK_SHUTDOWN_STS2_SHIFT 0 /* SPK_SHUTDOWN_STS2 */ -#define WM8285_SPK_SHUTDOWN_STS2_WIDTH 1 /* SPK_SHUTDOWN_STS2 */ +#define CLEARWATER_SPK_OVERHEAT_WARN_STS2 0x0004 /* SPK_OVERHEAT_WARN_STS2 */ +#define CLEARWATER_SPK_OVERHEAT_WARN_STS2_MASK 0x0004 /* SPK_OVERHEAT_WARN_STS2 */ +#define CLEARWATER_SPK_OVERHEAT_WARN_STS2_SHIFT 2 /* SPK_OVERHEAT_WARN_STS2 */ +#define CLEARWATER_SPK_OVERHEAT_WARN_STS2_WIDTH 1 /* SPK_OVERHEAT_WARN_STS2 */ +#define CLEARWATER_SPK_OVERHEAT_STS2 0x0002 /* SPK_OVERHEAT_STS2 */ +#define CLEARWATER_SPK_OVERHEAT_STS2_MASK 0x0002 /* SPK_OVERHEAT_STS2 */ +#define CLEARWATER_SPK_OVERHEAT_STS2_SHIFT 1 /* SPK_OVERHEAT_STS2 */ +#define CLEARWATER_SPK_OVERHEAT_STS2_WIDTH 1 /* SPK_OVERHEAT_STS2 */ +#define CLEARWATER_SPK_SHUTDOWN_STS2 0x0001 /* SPK_SHUTDOWN_STS2 */ +#define CLEARWATER_SPK_SHUTDOWN_STS2_MASK 0x0001 /* SPK_SHUTDOWN_STS2 */ +#define CLEARWATER_SPK_SHUTDOWN_STS2_SHIFT 0 /* SPK_SHUTDOWN_STS2 */ +#define CLEARWATER_SPK_SHUTDOWN_STS2_WIDTH 1 /* SPK_SHUTDOWN_STS2 */ /* * R6662 (0x1A06) - Interrupt Debounce 7 */ -#define WM8285_MICD_CLAMP_DB 0x0010 /* MICD_CLAMP_DB */ -#define WM8285_MICD_CLAMP_DB_MASK 0x0010 /* MICD_CLAMP_DB */ -#define WM8285_MICD_CLAMP_DB_SHIFT 4 /* MICD_CLAMP_DB */ -#define WM8285_MICD_CLAMP_DB_WIDTH 1 /* MICD_CLAMP_DB */ -#define WM8285_JD2_DB 0x0004 /* JD2_DB */ -#define WM8285_JD2_DB_MASK 0x0004 /* JD2_DB */ -#define WM8285_JD2_DB_SHIFT 2 /* JD2_DB */ -#define WM8285_JD2_DB_WIDTH 1 /* JD2_DB */ -#define WM8285_JD1_DB 0x0001 /* JD1_DB */ -#define WM8285_JD1_DB_MASK 0x0001 /* JD1_DB */ -#define WM8285_JD1_DB_SHIFT 0 /* JD1_DB */ -#define WM8285_JD1_DB_WIDTH 1 /* JD1_DB */ +#define CLEARWATER_MICD_CLAMP_DB 0x0010 /* MICD_CLAMP_DB */ +#define CLEARWATER_MICD_CLAMP_DB_MASK 0x0010 /* MICD_CLAMP_DB */ +#define CLEARWATER_MICD_CLAMP_DB_SHIFT 4 /* MICD_CLAMP_DB */ +#define CLEARWATER_MICD_CLAMP_DB_WIDTH 1 /* MICD_CLAMP_DB */ +#define CLEARWATER_JD2_DB 0x0004 /* JD2_DB */ +#define CLEARWATER_JD2_DB_MASK 0x0004 /* JD2_DB */ +#define CLEARWATER_JD2_DB_SHIFT 2 /* JD2_DB */ +#define CLEARWATER_JD2_DB_WIDTH 1 /* JD2_DB */ +#define CLEARWATER_JD1_DB 0x0001 /* JD1_DB */ +#define CLEARWATER_JD1_DB_MASK 0x0001 /* JD1_DB */ +#define CLEARWATER_JD1_DB_SHIFT 0 /* JD1_DB */ +#define CLEARWATER_JD1_DB_WIDTH 1 /* JD1_DB */ /* * R6670 (0x1A0E) - Interrupt Debounce 15 */ -#define WM8285_SPK_OVERHEAT_WARN_DB 0x0004 /* SPK_OVERHEAT_WARN_DB */ -#define WM8285_SPK_OVERHEAT_WARN_DB_MASK 0x0004 /* SPK_OVERHEAT_WARN_DB */ -#define WM8285_SPK_OVERHEAT_WARN_DB_SHIFT 2 /* SPK_OVERHEAT_WARN_DB */ -#define WM8285_SPK_OVERHEAT_WARN_DB_WIDTH 1 /* SPK_OVERHEAT_WARN_DB */ -#define WM8285_SPK_OVERHEAT_DB 0x0002 /* SPK_OVERHEAT_DB */ -#define WM8285_SPK_OVERHEAT_DB_MASK 0x0002 /* SPK_OVERHEAT_DB */ -#define WM8285_SPK_OVERHEAT_DB_SHIFT 1 /* SPK_OVERHEAT_DB */ -#define WM8285_SPK_OVERHEAT_DB_WIDTH 1 /* SPK_OVERHEAT_DB */ +#define CLEARWATER_SPK_OVERHEAT_WARN_DB 0x0004 /* SPK_OVERHEAT_WARN_DB */ +#define CLEARWATER_SPK_OVERHEAT_WARN_DB_MASK 0x0004 /* SPK_OVERHEAT_WARN_DB */ +#define CLEARWATER_SPK_OVERHEAT_WARN_DB_SHIFT 2 /* SPK_OVERHEAT_WARN_DB */ +#define CLEARWATER_SPK_OVERHEAT_WARN_DB_WIDTH 1 /* SPK_OVERHEAT_WARN_DB */ +#define CLEARWATER_SPK_OVERHEAT_DB 0x0002 /* SPK_OVERHEAT_DB */ +#define CLEARWATER_SPK_OVERHEAT_DB_MASK 0x0002 /* SPK_OVERHEAT_DB */ +#define CLEARWATER_SPK_OVERHEAT_DB_SHIFT 1 /* SPK_OVERHEAT_DB */ +#define CLEARWATER_SPK_OVERHEAT_DB_WIDTH 1 /* SPK_OVERHEAT_DB */ /* * R6848 (0x1AC0) - GPIO Debounce Config */ -#define WM8285_GP_DBTIME_MASK 0x000F /* GP_DBTIME - [3:0] */ -#define WM8285_GP_DBTIME_SHIFT 0 /* GP_DBTIME - [3:0] */ -#define WM8285_GP_DBTIME_WIDTH 4 /* GP_DBTIME - [3:0] */ +#define CLEARWATER_GP_DBTIME_MASK 0x000F /* GP_DBTIME - [3:0] */ +#define CLEARWATER_GP_DBTIME_SHIFT 0 /* GP_DBTIME - [3:0] */ +#define CLEARWATER_GP_DBTIME_WIDTH 4 /* GP_DBTIME - [3:0] */ #endif From de859975463942d5bb0d2c77126a255674ecac35 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 22 Dec 2014 18:15:53 +0000 Subject: [PATCH 0569/1167] ASoC: clearwater: rename wm8285 to clearwater Change-Id: I861a8bd68deb1d25fd51a3df6b877aa2061f2ac0 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/Kconfig | 12 +- sound/soc/codecs/Makefile | 4 +- sound/soc/codecs/arizona.c | 110 +- sound/soc/codecs/arizona.h | 56 +- sound/soc/codecs/{wm8285.c => clearwater.c} | 1122 +++++++++---------- sound/soc/codecs/{wm8285.h => clearwater.h} | 18 +- 6 files changed, 661 insertions(+), 661 deletions(-) rename sound/soc/codecs/{wm8285.c => clearwater.c} (71%) rename sound/soc/codecs/{wm8285.h => clearwater.h} (52%) diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index aa531e6c79a..b803745003f 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -84,7 +84,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_WM5100 if I2C select SND_SOC_WM5102 if MFD_WM5102 select SND_SOC_FLORIDA if MFD_FLORIDA - select SND_SOC_WM8285 if MFD_WM8285 + select SND_SOC_CLEARWATER if MFD_CLEARWATER select SND_SOC_WM8350 if MFD_WM8350 select SND_SOC_WM8400 if MFD_WM8400 select SND_SOC_WM8510 if SND_SOC_I2C_AND_SPI @@ -147,13 +147,13 @@ config SND_SOC_ARIZONA tristate default y if SND_SOC_WM5102=y default y if SND_SOC_FLORIDA=y - default y if SND_SOC_WM8285=y + default y if SND_SOC_CLEARWATER=y default y if SND_SOC_WM8997=y default y if SND_SOC_WM8998=y default y if SND_SOC_CS47L24=y default m if SND_SOC_WM5102=m default m if SND_SOC_FLORIDA=m - default m if SND_SOC_WM8285=m + default m if SND_SOC_CLEARWATER=m default m if SND_SOC_WM8997=m default m if SND_SOC_WM8998=m default m if SND_SOC_CS47L24=m @@ -167,12 +167,12 @@ config SND_SOC_WM_ADSP tristate default y if SND_SOC_WM5102=y default y if SND_SOC_FLORIDA=y - default y if SND_SOC_WM8285=y + default y if SND_SOC_CLEARWATER=y default y if SND_SOC_WM2200=y default y if SND_SOC_CS47L24=y default m if SND_SOC_WM5102=m default m if SND_SOC_FLORIDA=m - default m if SND_SOC_WM8285=m + default m if SND_SOC_CLEARWATER=m default m if SND_SOC_WM2200=m default m if SND_SOC_CS47L24=m @@ -402,7 +402,7 @@ config SND_SOC_WM5102 config SND_SOC_FLORIDA tristate -config SND_SOC_WM8285 +config SND_SOC_CLEARWATER tristate config SND_SOC_WM8350 diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index deecadc6fd0..f66afe2d5ac 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -76,7 +76,7 @@ snd-soc-wm2200-objs := wm2200.o snd-soc-wm5100-objs := wm5100.o wm5100-tables.o snd-soc-wm5102-objs := wm5102.o snd-soc-florida-objs := florida.o -snd-soc-wm8285-objs := wm8285.o +snd-soc-clearwater-objs := clearwater.o snd-soc-wm8350-objs := wm8350.o snd-soc-wm8400-objs := wm8400.o snd-soc-wm8510-objs := wm8510.o @@ -203,7 +203,7 @@ obj-$(CONFIG_SND_SOC_WM2200) += snd-soc-wm2200.o obj-$(CONFIG_SND_SOC_WM5100) += snd-soc-wm5100.o obj-$(CONFIG_SND_SOC_WM5102) += snd-soc-wm5102.o obj-$(CONFIG_SND_SOC_FLORIDA) += snd-soc-florida.o -obj-$(CONFIG_SND_SOC_WM8285) += snd-soc-wm8285.o +obj-$(CONFIG_SND_SOC_CLEARWATER) += snd-soc-clearwater.o obj-$(CONFIG_SND_SOC_WM8350) += snd-soc-wm8350.o obj-$(CONFIG_SND_SOC_WM8400) += snd-soc-wm8400.o obj-$(CONFIG_SND_SOC_WM8510) += snd-soc-wm8510.o diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 53763831814..5829949f449 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -283,7 +283,7 @@ static const char * const arizona_dmic_inputs[] = { "IN4R", }; -static const char * const wm8285_dmic_inputs[] = { +static const char * const clearwater_dmic_inputs[] = { "IN1L Mux", "IN1R", "IN2L Mux", @@ -315,8 +315,8 @@ int arizona_init_input(struct snd_soc_codec *codec) switch (arizona->type) { case WM8285: case WM1840: - routes[0].sink = wm8285_dmic_inputs[i * 2]; - routes[1].sink = wm8285_dmic_inputs[(i * 2) + 1]; + routes[0].sink = clearwater_dmic_inputs[i * 2]; + routes[1].sink = clearwater_dmic_inputs[(i * 2) + 1]; break; default: routes[0].sink = arizona_dmic_inputs[i * 2]; @@ -1063,33 +1063,33 @@ const struct soc_enum arizona_asrc_rate1 = arizona_rate_text, arizona_rate_val); EXPORT_SYMBOL_GPL(arizona_asrc_rate1); -const struct soc_enum wm8285_asrc1_rate[] = { - SOC_VALUE_ENUM_SINGLE(WM8285_ASRC1_RATE1, - WM8285_ASRC1_RATE1_SHIFT, 0xf, +const struct soc_enum clearwater_asrc1_rate[] = { + SOC_VALUE_ENUM_SINGLE(CLEARWATER_ASRC1_RATE1, + CLEARWATER_ASRC1_RATE1_SHIFT, 0xf, ARIZONA_SYNC_RATE_ENUM_SIZE, arizona_rate_text, arizona_rate_val), - SOC_VALUE_ENUM_SINGLE(WM8285_ASRC1_RATE2, - WM8285_ASRC1_RATE1_SHIFT, 0xf, + SOC_VALUE_ENUM_SINGLE(CLEARWATER_ASRC1_RATE2, + CLEARWATER_ASRC1_RATE1_SHIFT, 0xf, ARIZONA_ASYNC_RATE_ENUM_SIZE, arizona_rate_text + ARIZONA_SYNC_RATE_ENUM_SIZE, arizona_rate_val + ARIZONA_SYNC_RATE_ENUM_SIZE), }; -EXPORT_SYMBOL_GPL(wm8285_asrc1_rate); +EXPORT_SYMBOL_GPL(clearwater_asrc1_rate); -const struct soc_enum wm8285_asrc2_rate[] = { - SOC_VALUE_ENUM_SINGLE(WM8285_ASRC2_RATE1, - WM8285_ASRC2_RATE1_SHIFT, 0xf, +const struct soc_enum clearwater_asrc2_rate[] = { + SOC_VALUE_ENUM_SINGLE(CLEARWATER_ASRC2_RATE1, + CLEARWATER_ASRC2_RATE1_SHIFT, 0xf, ARIZONA_SYNC_RATE_ENUM_SIZE, arizona_rate_text, arizona_rate_val), - SOC_VALUE_ENUM_SINGLE(WM8285_ASRC2_RATE2, - WM8285_ASRC2_RATE2_SHIFT, 0xf, + SOC_VALUE_ENUM_SINGLE(CLEARWATER_ASRC2_RATE2, + CLEARWATER_ASRC2_RATE2_SHIFT, 0xf, ARIZONA_ASYNC_RATE_ENUM_SIZE, arizona_rate_text + ARIZONA_SYNC_RATE_ENUM_SIZE, arizona_rate_val + ARIZONA_SYNC_RATE_ENUM_SIZE), }; -EXPORT_SYMBOL_GPL(wm8285_asrc2_rate); +EXPORT_SYMBOL_GPL(clearwater_asrc2_rate); static const char *arizona_vol_ramp_text[] = { "0ms/6dB", "0.5ms/6dB", "1ms/6dB", "2ms/6dB", "4ms/6dB", "8ms/6dB", @@ -1188,35 +1188,35 @@ const struct soc_enum arizona_in_dmic_osr[] = { }; EXPORT_SYMBOL_GPL(arizona_in_dmic_osr); -static const char * const wm8285_in_dmic_osr_text[WM8285_OSR_ENUM_SIZE] = { +static const char * const clearwater_in_dmic_osr_text[CLEARWATER_OSR_ENUM_SIZE] = { "384kHz", "768kHz", "1.536MHz", "3.072MHz", "6.144MHz", }; -static const int wm8285_in_dmic_osr_val[WM8285_OSR_ENUM_SIZE] = { +static const int clearwater_in_dmic_osr_val[CLEARWATER_OSR_ENUM_SIZE] = { 2, 3, 4, 5, 6, }; -const struct soc_enum wm8285_in_dmic_osr[] = { - SOC_VALUE_ENUM_SINGLE(ARIZONA_DMIC1L_CONTROL, WM8285_IN1_OSR_SHIFT, - 0x7, WM8285_OSR_ENUM_SIZE, - wm8285_in_dmic_osr_text, wm8285_in_dmic_osr_val), - SOC_VALUE_ENUM_SINGLE(ARIZONA_DMIC2L_CONTROL, WM8285_IN2_OSR_SHIFT, - 0x7, WM8285_OSR_ENUM_SIZE, - wm8285_in_dmic_osr_text, wm8285_in_dmic_osr_val), - SOC_VALUE_ENUM_SINGLE(ARIZONA_DMIC3L_CONTROL, WM8285_IN3_OSR_SHIFT, - 0x7, WM8285_OSR_ENUM_SIZE, - wm8285_in_dmic_osr_text, wm8285_in_dmic_osr_val), - SOC_VALUE_ENUM_SINGLE(ARIZONA_DMIC4L_CONTROL, WM8285_IN4_OSR_SHIFT, - 0x7, WM8285_OSR_ENUM_SIZE, - wm8285_in_dmic_osr_text, wm8285_in_dmic_osr_val), - SOC_VALUE_ENUM_SINGLE(ARIZONA_DMIC5L_CONTROL, WM8285_IN5_OSR_SHIFT, - 0x7, WM8285_OSR_ENUM_SIZE, - wm8285_in_dmic_osr_text, wm8285_in_dmic_osr_val), - SOC_VALUE_ENUM_SINGLE(ARIZONA_DMIC6L_CONTROL, WM8285_IN6_OSR_SHIFT, - 0x7, WM8285_OSR_ENUM_SIZE, - wm8285_in_dmic_osr_text, wm8285_in_dmic_osr_val), +const struct soc_enum clearwater_in_dmic_osr[] = { + SOC_VALUE_ENUM_SINGLE(ARIZONA_DMIC1L_CONTROL, CLEARWATER_IN1_OSR_SHIFT, + 0x7, CLEARWATER_OSR_ENUM_SIZE, + clearwater_in_dmic_osr_text, clearwater_in_dmic_osr_val), + SOC_VALUE_ENUM_SINGLE(ARIZONA_DMIC2L_CONTROL, CLEARWATER_IN2_OSR_SHIFT, + 0x7, CLEARWATER_OSR_ENUM_SIZE, + clearwater_in_dmic_osr_text, clearwater_in_dmic_osr_val), + SOC_VALUE_ENUM_SINGLE(ARIZONA_DMIC3L_CONTROL, CLEARWATER_IN3_OSR_SHIFT, + 0x7, CLEARWATER_OSR_ENUM_SIZE, + clearwater_in_dmic_osr_text, clearwater_in_dmic_osr_val), + SOC_VALUE_ENUM_SINGLE(ARIZONA_DMIC4L_CONTROL, CLEARWATER_IN4_OSR_SHIFT, + 0x7, CLEARWATER_OSR_ENUM_SIZE, + clearwater_in_dmic_osr_text, clearwater_in_dmic_osr_val), + SOC_VALUE_ENUM_SINGLE(ARIZONA_DMIC5L_CONTROL, CLEARWATER_IN5_OSR_SHIFT, + 0x7, CLEARWATER_OSR_ENUM_SIZE, + clearwater_in_dmic_osr_text, clearwater_in_dmic_osr_val), + SOC_VALUE_ENUM_SINGLE(ARIZONA_DMIC6L_CONTROL, CLEARWATER_IN6_OSR_SHIFT, + 0x7, CLEARWATER_OSR_ENUM_SIZE, + clearwater_in_dmic_osr_text, clearwater_in_dmic_osr_val), }; -EXPORT_SYMBOL_GPL(wm8285_in_dmic_osr); +EXPORT_SYMBOL_GPL(clearwater_in_dmic_osr); static const char *arizona_anc_input_src_text[ARIZONA_ANC_INPUT_ENUM_SIZE] = { "None", "IN1L", "IN1R", "IN1L + IN1R", "IN2L", "IN2R", "IN2L + IN2R", @@ -1250,7 +1250,7 @@ int arizona_put_anc_input(struct snd_kcontrol *kcontrol, shift = ARIZONA_IN_RXANCL_SEL_SHIFT; break; case ARIZONA_FCR_ADC_REFORMATTER_CONTROL: - case WM8285_FCR_ADC_REFORMATTER_CONTROL: + case CLEARWATER_FCR_ADC_REFORMATTER_CONTROL: mask = ARIZONA_IN_RXANCR_SEL_MASK; shift = ARIZONA_IN_RXANCR_SEL_SHIFT; break; @@ -1282,19 +1282,19 @@ const struct soc_enum arizona_anc_input_src[] = { }; EXPORT_SYMBOL_GPL(arizona_anc_input_src); -const struct soc_enum wm8285_anc_input_src[] = { +const struct soc_enum clearwater_anc_input_src[] = { SOC_VALUE_ENUM_SINGLE(ARIZONA_FCL_ADC_REFORMATTER_CONTROL, ARIZONA_FCL_MIC_MODE_SEL_SHIFT, 0, - WM8285_ANC_INPUT_ENUM_SIZE, + CLEARWATER_ANC_INPUT_ENUM_SIZE, arizona_anc_input_src_text, arizona_anc_input_src_val), - SOC_VALUE_ENUM_SINGLE(WM8285_FCR_ADC_REFORMATTER_CONTROL, + SOC_VALUE_ENUM_SINGLE(CLEARWATER_FCR_ADC_REFORMATTER_CONTROL, ARIZONA_FCR_MIC_MODE_SEL_SHIFT, 0, - WM8285_ANC_INPUT_ENUM_SIZE, + CLEARWATER_ANC_INPUT_ENUM_SIZE, arizona_anc_input_src_text, arizona_anc_input_src_val), }; -EXPORT_SYMBOL_GPL(wm8285_anc_input_src); +EXPORT_SYMBOL_GPL(clearwater_anc_input_src); static const char *arizona_output_anc_src_text[] = { "None", "RXANCL", "RXANCR", @@ -1352,13 +1352,13 @@ const struct soc_enum arizona_output_anc_src[] = { }; EXPORT_SYMBOL_GPL(arizona_output_anc_src); -const struct soc_enum wm8285_output_anc_src_defs[] = { +const struct soc_enum clearwater_output_anc_src_defs[] = { SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_3R, ARIZONA_OUT3R_ANC_SRC_SHIFT, ARRAY_SIZE(arizona_output_anc_src_text), arizona_output_anc_src_text), }; -EXPORT_SYMBOL_GPL(wm8285_output_anc_src_defs); +EXPORT_SYMBOL_GPL(clearwater_output_anc_src_defs); static void arizona_in_set_vu(struct snd_soc_codec *codec, int ena) { @@ -1910,7 +1910,7 @@ static int arizona_get_sysclk_setting(unsigned int freq) } } -static int wm8285_get_sysclk_setting(unsigned int freq) +static int clearwater_get_sysclk_setting(unsigned int freq) { switch (freq) { case 0: @@ -1928,13 +1928,13 @@ static int wm8285_get_sysclk_setting(unsigned int freq) return ARIZONA_CLK_49MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; case 90316800: case 98304000: - return WM8285_CLK_98MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; + return CLEARWATER_CLK_98MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; default: return -EINVAL; } } -static int wm8285_get_dspclk_setting(unsigned int freq) +static int clearwater_get_dspclk_setting(unsigned int freq) { switch (freq) { case 0: @@ -1942,7 +1942,7 @@ static int wm8285_get_dspclk_setting(unsigned int freq) /* For now we only support top speed for the DSP */ case 135475200: case 147456000: - return WM8285_DSP_CLK_147MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; + return CLEARWATER_DSP_CLK_147MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; default: return -EINVAL; } @@ -1997,23 +1997,23 @@ int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id, name = "SYSCLK"; reg = ARIZONA_SYSTEM_CLOCK_1; clk = &priv->sysclk; - clk_freq = wm8285_get_sysclk_setting(freq); + clk_freq = clearwater_get_sysclk_setting(freq); mask |= ARIZONA_SYSCLK_FRAC; break; case ARIZONA_CLK_ASYNCCLK: name = "ASYNCCLK"; reg = ARIZONA_ASYNC_CLOCK_1; clk = &priv->asyncclk; - clk_freq = wm8285_get_sysclk_setting(freq); + clk_freq = clearwater_get_sysclk_setting(freq); break; case ARIZONA_CLK_OPCLK: case ARIZONA_CLK_ASYNC_OPCLK: return arizona_set_opclk(codec, clk_id, freq); case ARIZONA_CLK_DSPCLK: name = "DSPCLK"; - reg = WM8285_DSP_CLOCK_1; + reg = CLEARWATER_DSP_CLOCK_1; clk = &priv->dspclk; - clk_freq = wm8285_get_dspclk_setting(freq); + clk_freq = clearwater_get_dspclk_setting(freq); break; default: return -EINVAL; @@ -3064,8 +3064,8 @@ static int arizona_wait_for_fll(struct arizona_fll *fll, bool requested) mask = ARIZONA_FLL1_CLOCK_OK_STS; break; default: - reg = WM8285_IRQ1_RAW_STATUS_2; - mask = WM8285_FLL1_LOCK_STS1; + reg = CLEARWATER_IRQ1_RAW_STATUS_2; + mask = CLEARWATER_FLL1_LOCK_STS1; break; } diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 0464ff51d2d..05cf2eec7fa 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -62,15 +62,15 @@ #define ARIZONA_CLK_24MHZ 2 #define ARIZONA_CLK_49MHZ 3 #define ARIZONA_CLK_73MHZ 4 -#define WM8285_CLK_98MHZ 4 +#define CLEARWATER_CLK_98MHZ 4 #define ARIZONA_CLK_98MHZ 5 #define ARIZONA_CLK_147MHZ 6 -#define WM8285_DSP_CLK_9MHZ 0 -#define WM8285_DSP_CLK_18MHZ 1 -#define WM8285_DSP_CLK_36MHZ 2 -#define WM8285_DSP_CLK_73MHZ 3 -#define WM8285_DSP_CLK_147MHZ 4 +#define CLEARWATER_DSP_CLK_9MHZ 0 +#define CLEARWATER_DSP_CLK_18MHZ 1 +#define CLEARWATER_DSP_CLK_36MHZ 2 +#define CLEARWATER_DSP_CLK_73MHZ 3 +#define CLEARWATER_DSP_CLK_147MHZ 4 #define ARIZONA_MAX_DAI 11 #define ARIZONA_MAX_ADSP 7 @@ -149,27 +149,27 @@ extern int arizona_v2_mixer_values[ARIZONA_V2_NUM_MIXER_INPUTS]; ARIZONA_MUX_ENUMS(name##_aux5, base_reg + 32); \ ARIZONA_MUX_ENUMS(name##_aux6, base_reg + 40) -#define WM8285_MUX_ENUM_DECL(name, reg) \ +#define CLEARWATER_MUX_ENUM_DECL(name, reg) \ SOC_VALUE_ENUM_SINGLE_DECL(name, reg, 0, 0xff, \ arizona_v2_mixer_texts, arizona_v2_mixer_values) -#define WM8285_MUX_ENUMS(name, base_reg) \ - static WM8285_MUX_ENUM_DECL(name##_enum, base_reg); \ +#define CLEARWATER_MUX_ENUMS(name, base_reg) \ + static CLEARWATER_MUX_ENUM_DECL(name##_enum, base_reg); \ static ARIZONA_MUX_CTL_DECL(name) -#define WM8285_MIXER_ENUMS(name, base_reg) \ - WM8285_MUX_ENUMS(name##_in1, base_reg); \ - WM8285_MUX_ENUMS(name##_in2, base_reg + 2); \ - WM8285_MUX_ENUMS(name##_in3, base_reg + 4); \ - WM8285_MUX_ENUMS(name##_in4, base_reg + 6) +#define CLEARWATER_MIXER_ENUMS(name, base_reg) \ + CLEARWATER_MUX_ENUMS(name##_in1, base_reg); \ + CLEARWATER_MUX_ENUMS(name##_in2, base_reg + 2); \ + CLEARWATER_MUX_ENUMS(name##_in3, base_reg + 4); \ + CLEARWATER_MUX_ENUMS(name##_in4, base_reg + 6) -#define WM8285_DSP_AUX_ENUMS(name, base_reg) \ - WM8285_MUX_ENUMS(name##_aux1, base_reg); \ - WM8285_MUX_ENUMS(name##_aux2, base_reg + 8); \ - WM8285_MUX_ENUMS(name##_aux3, base_reg + 16); \ - WM8285_MUX_ENUMS(name##_aux4, base_reg + 24); \ - WM8285_MUX_ENUMS(name##_aux5, base_reg + 32); \ - WM8285_MUX_ENUMS(name##_aux6, base_reg + 40) +#define CLEARWATER_DSP_AUX_ENUMS(name, base_reg) \ + CLEARWATER_MUX_ENUMS(name##_aux1, base_reg); \ + CLEARWATER_MUX_ENUMS(name##_aux2, base_reg + 8); \ + CLEARWATER_MUX_ENUMS(name##_aux3, base_reg + 16); \ + CLEARWATER_MUX_ENUMS(name##_aux4, base_reg + 24); \ + CLEARWATER_MUX_ENUMS(name##_aux5, base_reg + 32); \ + CLEARWATER_MUX_ENUMS(name##_aux6, base_reg + 40) #define ARIZONA_MUX(name, ctrl) \ SND_SOC_DAPM_VALUE_MUX(name, SND_SOC_NOPM, 0, 0, ctrl) @@ -242,14 +242,14 @@ extern int arizona_v2_mixer_values[ARIZONA_V2_NUM_MIXER_INPUTS]; {.base = xbase, .num_regs = 20, \ .mask = ~ARIZONA_EQ1_B1_MODE }) } -#define WM8285_OSR_ENUM_SIZE 5 +#define CLEARWATER_OSR_ENUM_SIZE 5 #define ARIZONA_RATE_ENUM_SIZE 5 #define ARIZONA_SYNC_RATE_ENUM_SIZE 3 #define ARIZONA_ASYNC_RATE_ENUM_SIZE 2 #define ARIZONA_SAMPLE_RATE_ENUM_SIZE 14 #define ARIZONA_ANC_INPUT_ENUM_SIZE 19 #define WM8280_ANC_INPUT_ENUM_SIZE 13 -#define WM8285_ANC_INPUT_ENUM_SIZE 19 +#define CLEARWATER_ANC_INPUT_ENUM_SIZE 19 extern const char *arizona_rate_text[ARIZONA_RATE_ENUM_SIZE]; extern const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE]; @@ -260,8 +260,8 @@ extern const struct soc_enum arizona_sample_rate[]; extern const struct soc_enum arizona_isrc_fsl[]; extern const struct soc_enum arizona_isrc_fsh[]; extern const struct soc_enum arizona_asrc_rate1; -extern const struct soc_enum wm8285_asrc1_rate[]; -extern const struct soc_enum wm8285_asrc2_rate[]; +extern const struct soc_enum clearwater_asrc1_rate[]; +extern const struct soc_enum clearwater_asrc2_rate[]; extern const struct soc_enum arizona_input_rate; extern const struct soc_enum arizona_output_rate; extern const struct soc_enum arizona_fx_rate; @@ -281,12 +281,12 @@ extern const struct soc_enum arizona_lhpf4_mode; extern const struct soc_enum arizona_ng_hold; extern const struct soc_enum arizona_in_hpf_cut_enum; extern const struct soc_enum arizona_in_dmic_osr[]; -extern const struct soc_enum wm8285_in_dmic_osr[]; +extern const struct soc_enum clearwater_in_dmic_osr[]; extern const struct soc_enum arizona_anc_input_src[]; -extern const struct soc_enum wm8285_anc_input_src[]; +extern const struct soc_enum clearwater_anc_input_src[]; extern const struct soc_enum arizona_output_anc_src[]; -extern const struct soc_enum wm8285_output_anc_src_defs[]; +extern const struct soc_enum clearwater_output_anc_src_defs[]; extern int arizona_put_anc_input(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); diff --git a/sound/soc/codecs/wm8285.c b/sound/soc/codecs/clearwater.c similarity index 71% rename from sound/soc/codecs/wm8285.c rename to sound/soc/codecs/clearwater.c index 82fe2fd657d..56501bdfbaa 100644 --- a/sound/soc/codecs/wm8285.c +++ b/sound/soc/codecs/clearwater.c @@ -1,5 +1,5 @@ /* - * wm8285.c -- ALSA SoC Audio driver for WM8285-class devices + * clearwater.c -- ALSA SoC Audio driver for CLEARWATER-class devices * * Copyright 2014 Cirrus Logic * @@ -31,26 +31,26 @@ #include "arizona.h" #include "wm_adsp.h" -#include "wm8285.h" +#include "clearwater.h" -#define WM8285_NUM_ADSP 7 +#define CLEARWATER_NUM_ADSP 7 -#define WM8285_DEFAULT_FRAGMENTS 1 -#define WM8285_DEFAULT_FRAGMENT_SIZE 4096 +#define CLEARWATER_DEFAULT_FRAGMENTS 1 +#define CLEARWATER_DEFAULT_FRAGMENT_SIZE 4096 -#define WM8285_FRF_COEFFICIENT_LEN 4 +#define CLEARWATER_FRF_COEFFICIENT_LEN 4 -static int wm8285_frf_bytes_put(struct snd_kcontrol *kcontrol, +static int clearwater_frf_bytes_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); -#define WM8285_FRF_BYTES(xname, xbase, xregs) \ +#define CLEARWATER_FRF_BYTES(xname, xbase, xregs) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ .info = snd_soc_bytes_info, .get = snd_soc_bytes_get, \ - .put = wm8285_frf_bytes_put, .private_value = \ + .put = clearwater_frf_bytes_put, .private_value = \ ((unsigned long)&(struct soc_bytes) \ {.base = xbase, .num_regs = xregs }) } -struct wm8285_compr { +struct clearwater_compr { struct mutex lock; struct snd_compr_stream *stream; @@ -62,137 +62,137 @@ struct wm8285_compr { bool forced; }; -struct wm8285_priv { +struct clearwater_priv { struct arizona_priv core; struct arizona_fll fll[3]; - struct wm8285_compr compr_info; + struct clearwater_compr compr_info; struct mutex fw_lock; }; -static const struct wm_adsp_region wm8285_dsp1_regions[] = { +static const struct wm_adsp_region clearwater_dsp1_regions[] = { { .type = WMFW_ADSP2_PM, .base = 0x080000 }, { .type = WMFW_ADSP2_ZM, .base = 0x0e0000 }, { .type = WMFW_ADSP2_XM, .base = 0x0a0000 }, { .type = WMFW_ADSP2_YM, .base = 0x0c0000 }, }; -static const struct wm_adsp_region wm8285_dsp2_regions[] = { +static const struct wm_adsp_region clearwater_dsp2_regions[] = { { .type = WMFW_ADSP2_PM, .base = 0x100000 }, { .type = WMFW_ADSP2_ZM, .base = 0x160000 }, { .type = WMFW_ADSP2_XM, .base = 0x120000 }, { .type = WMFW_ADSP2_YM, .base = 0x140000 }, }; -static const struct wm_adsp_region wm8285_dsp3_regions[] = { +static const struct wm_adsp_region clearwater_dsp3_regions[] = { { .type = WMFW_ADSP2_PM, .base = 0x180000 }, { .type = WMFW_ADSP2_ZM, .base = 0x1e0000 }, { .type = WMFW_ADSP2_XM, .base = 0x1a0000 }, { .type = WMFW_ADSP2_YM, .base = 0x1c0000 }, }; -static const struct wm_adsp_region wm8285_dsp4_regions[] = { +static const struct wm_adsp_region clearwater_dsp4_regions[] = { { .type = WMFW_ADSP2_PM, .base = 0x200000 }, { .type = WMFW_ADSP2_ZM, .base = 0x260000 }, { .type = WMFW_ADSP2_XM, .base = 0x220000 }, { .type = WMFW_ADSP2_YM, .base = 0x240000 }, }; -static const struct wm_adsp_region wm8285_dsp5_regions[] = { +static const struct wm_adsp_region clearwater_dsp5_regions[] = { { .type = WMFW_ADSP2_PM, .base = 0x280000 }, { .type = WMFW_ADSP2_ZM, .base = 0x2e0000 }, { .type = WMFW_ADSP2_XM, .base = 0x2a0000 }, { .type = WMFW_ADSP2_YM, .base = 0x2c0000 }, }; -static const struct wm_adsp_region wm8285_dsp6_regions[] = { +static const struct wm_adsp_region clearwater_dsp6_regions[] = { { .type = WMFW_ADSP2_PM, .base = 0x300000 }, { .type = WMFW_ADSP2_ZM, .base = 0x360000 }, { .type = WMFW_ADSP2_XM, .base = 0x320000 }, { .type = WMFW_ADSP2_YM, .base = 0x340000 }, }; -static const struct wm_adsp_region wm8285_dsp7_regions[] = { +static const struct wm_adsp_region clearwater_dsp7_regions[] = { { .type = WMFW_ADSP2_PM, .base = 0x380000 }, { .type = WMFW_ADSP2_ZM, .base = 0x3e0000 }, { .type = WMFW_ADSP2_XM, .base = 0x3a0000 }, { .type = WMFW_ADSP2_YM, .base = 0x3c0000 }, }; -static const struct wm_adsp_region *wm8285_dsp_regions[] = { - wm8285_dsp1_regions, - wm8285_dsp2_regions, - wm8285_dsp3_regions, - wm8285_dsp4_regions, - wm8285_dsp5_regions, - wm8285_dsp6_regions, - wm8285_dsp7_regions, +static const struct wm_adsp_region *clearwater_dsp_regions[] = { + clearwater_dsp1_regions, + clearwater_dsp2_regions, + clearwater_dsp3_regions, + clearwater_dsp4_regions, + clearwater_dsp5_regions, + clearwater_dsp6_regions, + clearwater_dsp7_regions, }; static const int wm_adsp2_control_bases[] = { - WM8285_DSP1_CONFIG, - WM8285_DSP2_CONFIG, - WM8285_DSP3_CONFIG, - WM8285_DSP4_CONFIG, - WM8285_DSP5_CONFIG, - WM8285_DSP6_CONFIG, - WM8285_DSP7_CONFIG, + CLEARWATER_DSP1_CONFIG, + CLEARWATER_DSP2_CONFIG, + CLEARWATER_DSP3_CONFIG, + CLEARWATER_DSP4_CONFIG, + CLEARWATER_DSP5_CONFIG, + CLEARWATER_DSP6_CONFIG, + CLEARWATER_DSP7_CONFIG, }; -static const char * const wm8285_inmux_texts[] = { +static const char * const clearwater_inmux_texts[] = { "A", "B", }; -static const SOC_ENUM_SINGLE_DECL(wm8285_in1mux_enum, +static const SOC_ENUM_SINGLE_DECL(clearwater_in1mux_enum, ARIZONA_ADC_DIGITAL_VOLUME_1L, ARIZONA_IN1L_SRC_SHIFT, - wm8285_inmux_texts); + clearwater_inmux_texts); -static const SOC_ENUM_SINGLE_DECL(wm8285_in2muxl_enum, +static const SOC_ENUM_SINGLE_DECL(clearwater_in2muxl_enum, ARIZONA_ADC_DIGITAL_VOLUME_2L, ARIZONA_IN2L_SRC_SHIFT, - wm8285_inmux_texts); -static const SOC_ENUM_SINGLE_DECL(wm8285_in2muxr_enum, + clearwater_inmux_texts); +static const SOC_ENUM_SINGLE_DECL(clearwater_in2muxr_enum, ARIZONA_ADC_DIGITAL_VOLUME_2R, ARIZONA_IN2R_SRC_SHIFT, - wm8285_inmux_texts); + clearwater_inmux_texts); -static const struct snd_kcontrol_new wm8285_in1mux = - SOC_DAPM_ENUM("IN1L Mux", wm8285_in1mux_enum); +static const struct snd_kcontrol_new clearwater_in1mux = + SOC_DAPM_ENUM("IN1L Mux", clearwater_in1mux_enum); -static const struct snd_kcontrol_new wm8285_in2mux[2] = { - SOC_DAPM_ENUM("IN2L Mux", wm8285_in2muxl_enum), - SOC_DAPM_ENUM("IN2R Mux", wm8285_in2muxr_enum), +static const struct snd_kcontrol_new clearwater_in2mux[2] = { + SOC_DAPM_ENUM("IN2L Mux", clearwater_in2muxl_enum), + SOC_DAPM_ENUM("IN2R Mux", clearwater_in2muxr_enum), }; -static int wm8285_virt_dsp_power_ev(struct snd_soc_dapm_widget *w, +static int clearwater_virt_dsp_power_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { - struct wm8285_priv *wm8285 = snd_soc_codec_get_drvdata(w->codec); + struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(w->codec); - mutex_lock(&wm8285->compr_info.lock); + mutex_lock(&clearwater->compr_info.lock); - if (!wm8285->compr_info.stream) - wm8285->compr_info.trig = false; + if (!clearwater->compr_info.stream) + clearwater->compr_info.trig = false; switch (event) { case SND_SOC_DAPM_POST_PMU: - wm8285->compr_info.forced = true; + clearwater->compr_info.forced = true; break; case SND_SOC_DAPM_PRE_PMD: - wm8285->compr_info.forced = false; + clearwater->compr_info.forced = false; break; default: break; } - mutex_unlock(&wm8285->compr_info.lock); + mutex_unlock(&clearwater->compr_info.lock); return 0; } -static int wm8285_frf_bytes_put(struct snd_kcontrol *kcontrol, +static int clearwater_frf_bytes_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct soc_bytes *params = (void *)kcontrol->private_value; @@ -224,7 +224,7 @@ static int wm8285_frf_bytes_put(struct snd_kcontrol *kcontrol, return ret; } -static int wm8285_adsp_power_ev(struct snd_soc_dapm_widget *w, +static int clearwater_adsp_power_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { @@ -234,14 +234,14 @@ static int wm8285_adsp_power_ev(struct snd_soc_dapm_widget *w, unsigned int freq; int ret; - ret = regmap_read(arizona->regmap, WM8285_DSP_CLOCK_1, &freq); + ret = regmap_read(arizona->regmap, CLEARWATER_DSP_CLOCK_1, &freq); if (ret != 0) { - dev_err(arizona->dev, "Failed to read WM8285_DSP_CLOCK_1: %d\n", ret); + dev_err(arizona->dev, "Failed to read CLEARWATER_DSP_CLOCK_1: %d\n", ret); return ret; } - freq &= WM8285_DSP_CLK_FREQ_LEGACY_MASK; - freq >>= WM8285_DSP_CLK_FREQ_LEGACY_SHIFT; + freq &= CLEARWATER_DSP_CLK_FREQ_LEGACY_MASK; + freq >>= CLEARWATER_DSP_CLK_FREQ_LEGACY_SHIFT; return wm_adsp2_early_event(w, kcontrol, event, freq); } @@ -252,7 +252,7 @@ static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); static DECLARE_TLV_DB_SCALE(noise_tlv, 0, 600, 0); static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); -#define WM8285_NG_SRC(name, base) \ +#define CLEARWATER_NG_SRC(name, base) \ SOC_SINGLE(name " NG HPOUT1L Switch", base, 0, 1, 0), \ SOC_SINGLE(name " NG HPOUT1R Switch", base, 1, 1, 0), \ SOC_SINGLE(name " NG HPOUT2L Switch", base, 2, 1, 0), \ @@ -266,7 +266,7 @@ static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); SOC_SINGLE(name " NG SPKDAT2L Switch", base, 10, 1, 0), \ SOC_SINGLE(name " NG SPKDAT2R Switch", base, 11, 1, 0) -#define WM8285_RXANC_INPUT_ROUTES(widget, name) \ +#define CLEARWATER_RXANC_INPUT_ROUTES(widget, name) \ { widget, NULL, name " Input" }, \ { name " Input", "IN1L", "IN1L PGA" }, \ { name " Input", "IN1R", "IN1R PGA" }, \ @@ -293,18 +293,18 @@ static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); { name " Input", "IN6L + IN6R", "IN6L PGA" }, \ { name " Input", "IN6L + IN6R", "IN6R PGA" } -#define WM8285_RXANC_OUTPUT_ROUTES(widget, name) \ +#define CLEARWATER_RXANC_OUTPUT_ROUTES(widget, name) \ { widget, NULL, name " ANC Source" }, \ { name " ANC Source", "RXANCL", "RXANCL" }, \ { name " ANC Source", "RXANCR", "RXANCR" } -static const struct snd_kcontrol_new wm8285_snd_controls[] = { -SOC_VALUE_ENUM("IN1 OSR", wm8285_in_dmic_osr[0]), -SOC_VALUE_ENUM("IN2 OSR", wm8285_in_dmic_osr[1]), -SOC_VALUE_ENUM("IN3 OSR", wm8285_in_dmic_osr[2]), -SOC_VALUE_ENUM("IN4 OSR", wm8285_in_dmic_osr[3]), -SOC_VALUE_ENUM("IN5 OSR", wm8285_in_dmic_osr[4]), -SOC_VALUE_ENUM("IN6 OSR", wm8285_in_dmic_osr[5]), +static const struct snd_kcontrol_new clearwater_snd_controls[] = { +SOC_VALUE_ENUM("IN1 OSR", clearwater_in_dmic_osr[0]), +SOC_VALUE_ENUM("IN2 OSR", clearwater_in_dmic_osr[1]), +SOC_VALUE_ENUM("IN3 OSR", clearwater_in_dmic_osr[2]), +SOC_VALUE_ENUM("IN4 OSR", clearwater_in_dmic_osr[3]), +SOC_VALUE_ENUM("IN5 OSR", clearwater_in_dmic_osr[4]), +SOC_VALUE_ENUM("IN6 OSR", clearwater_in_dmic_osr[5]), SOC_SINGLE_RANGE_TLV("IN1L Volume", ARIZONA_IN1L_CONTROL, ARIZONA_IN1L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), @@ -382,37 +382,37 @@ SND_SOC_BYTES("RXANC Coefficients", ARIZONA_ANC_COEFF_START, SND_SOC_BYTES("RXANCL Config", ARIZONA_FCL_FILTER_CONTROL, 1), SND_SOC_BYTES("RXANCL Coefficients", ARIZONA_FCL_COEFF_START, ARIZONA_FCL_COEFF_END - ARIZONA_FCL_COEFF_START + 1), -SND_SOC_BYTES("RXANCR Config", WM8285_FCR_FILTER_CONTROL, 1), -SND_SOC_BYTES("RXANCR Coefficients", WM8285_FCR_COEFF_START, - WM8285_FCR_COEFF_END - WM8285_FCR_COEFF_START + 1), - -WM8285_FRF_BYTES("FRF COEFF 1L", WM8285_FRF_COEFFICIENT_1L_1, - WM8285_FRF_COEFFICIENT_LEN), -WM8285_FRF_BYTES("FRF COEFF 1R", WM8285_FRF_COEFFICIENT_1R_1, - WM8285_FRF_COEFFICIENT_LEN), -WM8285_FRF_BYTES("FRF COEFF 2L", WM8285_FRF_COEFFICIENT_2L_1, - WM8285_FRF_COEFFICIENT_LEN), -WM8285_FRF_BYTES("FRF COEFF 2R", WM8285_FRF_COEFFICIENT_2R_1, - WM8285_FRF_COEFFICIENT_LEN), -WM8285_FRF_BYTES("FRF COEFF 3L", WM8285_FRF_COEFFICIENT_3L_1, - WM8285_FRF_COEFFICIENT_LEN), -WM8285_FRF_BYTES("FRF COEFF 3R", WM8285_FRF_COEFFICIENT_3R_1, - WM8285_FRF_COEFFICIENT_LEN), -WM8285_FRF_BYTES("FRF COEFF 4L", WM8285_FRF_COEFFICIENT_4L_1, - WM8285_FRF_COEFFICIENT_LEN), -WM8285_FRF_BYTES("FRF COEFF 4R", WM8285_FRF_COEFFICIENT_4R_1, - WM8285_FRF_COEFFICIENT_LEN), -WM8285_FRF_BYTES("FRF COEFF 5L", WM8285_FRF_COEFFICIENT_5L_1, - WM8285_FRF_COEFFICIENT_LEN), -WM8285_FRF_BYTES("FRF COEFF 5R", WM8285_FRF_COEFFICIENT_5R_1, - WM8285_FRF_COEFFICIENT_LEN), -WM8285_FRF_BYTES("FRF COEFF 6L", WM8285_FRF_COEFFICIENT_6L_1, - WM8285_FRF_COEFFICIENT_LEN), -WM8285_FRF_BYTES("FRF COEFF 6R", WM8285_FRF_COEFFICIENT_6R_1, - WM8285_FRF_COEFFICIENT_LEN), - -SND_SOC_BYTES("DAC COMP 1", WM8285_DAC_COMP_1, 1), -SND_SOC_BYTES("DAC COMP 2", WM8285_DAC_COMP_2, 1), +SND_SOC_BYTES("RXANCR Config", CLEARWATER_FCR_FILTER_CONTROL, 1), +SND_SOC_BYTES("RXANCR Coefficients", CLEARWATER_FCR_COEFF_START, + CLEARWATER_FCR_COEFF_END - CLEARWATER_FCR_COEFF_START + 1), + +CLEARWATER_FRF_BYTES("FRF COEFF 1L", CLEARWATER_FRF_COEFFICIENT_1L_1, + CLEARWATER_FRF_COEFFICIENT_LEN), +CLEARWATER_FRF_BYTES("FRF COEFF 1R", CLEARWATER_FRF_COEFFICIENT_1R_1, + CLEARWATER_FRF_COEFFICIENT_LEN), +CLEARWATER_FRF_BYTES("FRF COEFF 2L", CLEARWATER_FRF_COEFFICIENT_2L_1, + CLEARWATER_FRF_COEFFICIENT_LEN), +CLEARWATER_FRF_BYTES("FRF COEFF 2R", CLEARWATER_FRF_COEFFICIENT_2R_1, + CLEARWATER_FRF_COEFFICIENT_LEN), +CLEARWATER_FRF_BYTES("FRF COEFF 3L", CLEARWATER_FRF_COEFFICIENT_3L_1, + CLEARWATER_FRF_COEFFICIENT_LEN), +CLEARWATER_FRF_BYTES("FRF COEFF 3R", CLEARWATER_FRF_COEFFICIENT_3R_1, + CLEARWATER_FRF_COEFFICIENT_LEN), +CLEARWATER_FRF_BYTES("FRF COEFF 4L", CLEARWATER_FRF_COEFFICIENT_4L_1, + CLEARWATER_FRF_COEFFICIENT_LEN), +CLEARWATER_FRF_BYTES("FRF COEFF 4R", CLEARWATER_FRF_COEFFICIENT_4R_1, + CLEARWATER_FRF_COEFFICIENT_LEN), +CLEARWATER_FRF_BYTES("FRF COEFF 5L", CLEARWATER_FRF_COEFFICIENT_5L_1, + CLEARWATER_FRF_COEFFICIENT_LEN), +CLEARWATER_FRF_BYTES("FRF COEFF 5R", CLEARWATER_FRF_COEFFICIENT_5R_1, + CLEARWATER_FRF_COEFFICIENT_LEN), +CLEARWATER_FRF_BYTES("FRF COEFF 6L", CLEARWATER_FRF_COEFFICIENT_6L_1, + CLEARWATER_FRF_COEFFICIENT_LEN), +CLEARWATER_FRF_BYTES("FRF COEFF 6R", CLEARWATER_FRF_COEFFICIENT_6R_1, + CLEARWATER_FRF_COEFFICIENT_LEN), + +SND_SOC_BYTES("DAC COMP 1", CLEARWATER_DAC_COMP_1, 1), +SND_SOC_BYTES("DAC COMP 2", CLEARWATER_DAC_COMP_2, 1), ARIZONA_MIXER_CONTROLS("EQ1", ARIZONA_EQ1MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), @@ -474,7 +474,7 @@ ARIZONA_MIXER_CONTROLS("DRC2R", ARIZONA_DRC2RMIX_INPUT_1_SOURCE), SND_SOC_BYTES_MASK("DRC1", ARIZONA_DRC1_CTRL1, 5, ARIZONA_DRC1R_ENA | ARIZONA_DRC1L_ENA), -SND_SOC_BYTES_MASK("DRC2", WM8285_DRC2_CTRL1, 5, +SND_SOC_BYTES_MASK("DRC2", CLEARWATER_DRC2_CTRL1, 5, ARIZONA_DRC2R_ENA | ARIZONA_DRC2L_ENA), ARIZONA_MIXER_CONTROLS("LHPF1", ARIZONA_HPLP1MIX_INPUT_1_SOURCE), @@ -504,10 +504,10 @@ SOC_VALUE_ENUM("ISRC1 FSH", arizona_isrc_fsh[0]), SOC_VALUE_ENUM("ISRC2 FSH", arizona_isrc_fsh[1]), SOC_VALUE_ENUM("ISRC3 FSH", arizona_isrc_fsh[2]), SOC_VALUE_ENUM("ISRC4 FSH", arizona_isrc_fsh[3]), -SOC_VALUE_ENUM("ASRC1 Rate 1", wm8285_asrc1_rate[0]), -SOC_VALUE_ENUM("ASRC1 Rate 2", wm8285_asrc1_rate[1]), -SOC_VALUE_ENUM("ASRC2 Rate 1", wm8285_asrc2_rate[0]), -SOC_VALUE_ENUM("ASRC2 Rate 2", wm8285_asrc2_rate[1]), +SOC_VALUE_ENUM("ASRC1 Rate 1", clearwater_asrc1_rate[0]), +SOC_VALUE_ENUM("ASRC1 Rate 2", clearwater_asrc1_rate[1]), +SOC_VALUE_ENUM("ASRC2 Rate 1", clearwater_asrc2_rate[0]), +SOC_VALUE_ENUM("ASRC2 Rate 2", clearwater_asrc2_rate[1]), ARIZONA_MIXER_CONTROLS("DSP1L", ARIZONA_DSP1LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("DSP1R", ARIZONA_DSP1RMIX_INPUT_1_SOURCE), @@ -517,12 +517,12 @@ ARIZONA_MIXER_CONTROLS("DSP3L", ARIZONA_DSP3LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("DSP3R", ARIZONA_DSP3RMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("DSP4L", ARIZONA_DSP4LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("DSP4R", ARIZONA_DSP4RMIX_INPUT_1_SOURCE), -ARIZONA_MIXER_CONTROLS("DSP5L", WM8285_DSP5LMIX_INPUT_1_SOURCE), -ARIZONA_MIXER_CONTROLS("DSP5R", WM8285_DSP5RMIX_INPUT_1_SOURCE), -ARIZONA_MIXER_CONTROLS("DSP6L", WM8285_DSP6LMIX_INPUT_1_SOURCE), -ARIZONA_MIXER_CONTROLS("DSP6R", WM8285_DSP6RMIX_INPUT_1_SOURCE), -ARIZONA_MIXER_CONTROLS("DSP7L", WM8285_DSP7LMIX_INPUT_1_SOURCE), -ARIZONA_MIXER_CONTROLS("DSP7R", WM8285_DSP7RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP5L", CLEARWATER_DSP5LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP5R", CLEARWATER_DSP5RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP6L", CLEARWATER_DSP6LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP6R", CLEARWATER_DSP6RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP7L", CLEARWATER_DSP7LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP7R", CLEARWATER_DSP7RMIX_INPUT_1_SOURCE), SOC_SINGLE_TLV("Noise Generator Volume", ARIZONA_COMFORT_NOISE_GENERATOR, ARIZONA_NOISE_GEN_GAIN_SHIFT, 0x16, 0, noise_tlv), @@ -615,18 +615,18 @@ SOC_ENUM("Noise Gate Hold", arizona_ng_hold), SOC_VALUE_ENUM("Output Rate 1", arizona_output_rate), SOC_VALUE_ENUM("In Rate", arizona_input_rate), -WM8285_NG_SRC("HPOUT1L", ARIZONA_NOISE_GATE_SELECT_1L), -WM8285_NG_SRC("HPOUT1R", ARIZONA_NOISE_GATE_SELECT_1R), -WM8285_NG_SRC("HPOUT2L", ARIZONA_NOISE_GATE_SELECT_2L), -WM8285_NG_SRC("HPOUT2R", ARIZONA_NOISE_GATE_SELECT_2R), -WM8285_NG_SRC("HPOUT3L", ARIZONA_NOISE_GATE_SELECT_3L), -WM8285_NG_SRC("HPOUT3R", ARIZONA_NOISE_GATE_SELECT_3R), -WM8285_NG_SRC("SPKOUTL", ARIZONA_NOISE_GATE_SELECT_4L), -WM8285_NG_SRC("SPKOUTR", ARIZONA_NOISE_GATE_SELECT_4R), -WM8285_NG_SRC("SPKDAT1L", ARIZONA_NOISE_GATE_SELECT_5L), -WM8285_NG_SRC("SPKDAT1R", ARIZONA_NOISE_GATE_SELECT_5R), -WM8285_NG_SRC("SPKDAT2L", ARIZONA_NOISE_GATE_SELECT_6L), -WM8285_NG_SRC("SPKDAT2R", ARIZONA_NOISE_GATE_SELECT_6R), +CLEARWATER_NG_SRC("HPOUT1L", ARIZONA_NOISE_GATE_SELECT_1L), +CLEARWATER_NG_SRC("HPOUT1R", ARIZONA_NOISE_GATE_SELECT_1R), +CLEARWATER_NG_SRC("HPOUT2L", ARIZONA_NOISE_GATE_SELECT_2L), +CLEARWATER_NG_SRC("HPOUT2R", ARIZONA_NOISE_GATE_SELECT_2R), +CLEARWATER_NG_SRC("HPOUT3L", ARIZONA_NOISE_GATE_SELECT_3L), +CLEARWATER_NG_SRC("HPOUT3R", ARIZONA_NOISE_GATE_SELECT_3R), +CLEARWATER_NG_SRC("SPKOUTL", ARIZONA_NOISE_GATE_SELECT_4L), +CLEARWATER_NG_SRC("SPKOUTR", ARIZONA_NOISE_GATE_SELECT_4R), +CLEARWATER_NG_SRC("SPKDAT1L", ARIZONA_NOISE_GATE_SELECT_5L), +CLEARWATER_NG_SRC("SPKDAT1R", ARIZONA_NOISE_GATE_SELECT_5R), +CLEARWATER_NG_SRC("SPKDAT2L", ARIZONA_NOISE_GATE_SELECT_6L), +CLEARWATER_NG_SRC("SPKDAT2R", ARIZONA_NOISE_GATE_SELECT_6R), ARIZONA_MIXER_CONTROLS("AIF1TX1", ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("AIF1TX2", ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE), @@ -665,202 +665,202 @@ ARIZONA_GAINMUX_CONTROLS("SPDIFTX1", ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE), ARIZONA_GAINMUX_CONTROLS("SPDIFTX2", ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE), }; -WM8285_MIXER_ENUMS(EQ1, ARIZONA_EQ1MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(EQ2, ARIZONA_EQ2MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(EQ3, ARIZONA_EQ3MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(EQ4, ARIZONA_EQ4MIX_INPUT_1_SOURCE); - -WM8285_MIXER_ENUMS(DRC1L, ARIZONA_DRC1LMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(DRC1R, ARIZONA_DRC1RMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(DRC2L, ARIZONA_DRC2LMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(DRC2R, ARIZONA_DRC2RMIX_INPUT_1_SOURCE); - -WM8285_MIXER_ENUMS(LHPF1, ARIZONA_HPLP1MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(LHPF2, ARIZONA_HPLP2MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(LHPF3, ARIZONA_HPLP3MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(LHPF4, ARIZONA_HPLP4MIX_INPUT_1_SOURCE); - -WM8285_MIXER_ENUMS(DSP1L, ARIZONA_DSP1LMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(DSP1R, ARIZONA_DSP1RMIX_INPUT_1_SOURCE); -WM8285_DSP_AUX_ENUMS(DSP1, ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE); - -WM8285_MIXER_ENUMS(DSP2L, ARIZONA_DSP2LMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(DSP2R, ARIZONA_DSP2RMIX_INPUT_1_SOURCE); -WM8285_DSP_AUX_ENUMS(DSP2, ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE); - -WM8285_MIXER_ENUMS(DSP3L, ARIZONA_DSP3LMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(DSP3R, ARIZONA_DSP3RMIX_INPUT_1_SOURCE); -WM8285_DSP_AUX_ENUMS(DSP3, ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE); - -WM8285_MIXER_ENUMS(DSP4L, ARIZONA_DSP4LMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(DSP4R, ARIZONA_DSP4RMIX_INPUT_1_SOURCE); -WM8285_DSP_AUX_ENUMS(DSP4, ARIZONA_DSP4AUX1MIX_INPUT_1_SOURCE); - -WM8285_MIXER_ENUMS(DSP5L, WM8285_DSP5LMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(DSP5R, WM8285_DSP5RMIX_INPUT_1_SOURCE); -WM8285_DSP_AUX_ENUMS(DSP5, WM8285_DSP5AUX1MIX_INPUT_1_SOURCE); - -WM8285_MIXER_ENUMS(DSP6L, WM8285_DSP6LMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(DSP6R, WM8285_DSP6RMIX_INPUT_1_SOURCE); -WM8285_DSP_AUX_ENUMS(DSP6, WM8285_DSP6AUX1MIX_INPUT_1_SOURCE); - -WM8285_MIXER_ENUMS(DSP7L, WM8285_DSP7LMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(DSP7R, WM8285_DSP7RMIX_INPUT_1_SOURCE); -WM8285_DSP_AUX_ENUMS(DSP7, WM8285_DSP7AUX1MIX_INPUT_1_SOURCE); - -WM8285_MIXER_ENUMS(PWM1, ARIZONA_PWM1MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(PWM2, ARIZONA_PWM2MIX_INPUT_1_SOURCE); - -WM8285_MIXER_ENUMS(OUT1L, ARIZONA_OUT1LMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(OUT1R, ARIZONA_OUT1RMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(OUT2L, ARIZONA_OUT2LMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(OUT2R, ARIZONA_OUT2RMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(OUT3L, ARIZONA_OUT3LMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(OUT3R, ARIZONA_OUT3RMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(SPKOUTL, ARIZONA_OUT4LMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(SPKOUTR, ARIZONA_OUT4RMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(SPKDAT1L, ARIZONA_OUT5LMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(SPKDAT1R, ARIZONA_OUT5RMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(SPKDAT2L, ARIZONA_OUT6LMIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(SPKDAT2R, ARIZONA_OUT6RMIX_INPUT_1_SOURCE); - -WM8285_MIXER_ENUMS(AIF1TX1, ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(AIF1TX2, ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(AIF1TX3, ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(AIF1TX4, ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(AIF1TX5, ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(AIF1TX6, ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(AIF1TX7, ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(AIF1TX8, ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE); - -WM8285_MIXER_ENUMS(AIF2TX1, ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(AIF2TX2, ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(AIF2TX3, ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(AIF2TX4, ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(AIF2TX5, ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(AIF2TX6, ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(AIF2TX7, ARIZONA_AIF2TX7MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(AIF2TX8, ARIZONA_AIF2TX8MIX_INPUT_1_SOURCE); - -WM8285_MIXER_ENUMS(AIF3TX1, ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(AIF3TX2, ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE); - -WM8285_MIXER_ENUMS(AIF4TX1, ARIZONA_AIF4TX1MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(AIF4TX2, ARIZONA_AIF4TX2MIX_INPUT_1_SOURCE); - -WM8285_MIXER_ENUMS(SLIMTX1, ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(SLIMTX2, ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(SLIMTX3, ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(SLIMTX4, ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(SLIMTX5, ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(SLIMTX6, ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(SLIMTX7, ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE); -WM8285_MIXER_ENUMS(SLIMTX8, ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE); - -WM8285_MUX_ENUMS(SPD1TX1, ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(SPD1TX2, ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE); - -WM8285_MUX_ENUMS(ASRC1IN1L, WM8285_ASRC1_1LMIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ASRC1IN1R, WM8285_ASRC1_1RMIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ASRC1IN2L, WM8285_ASRC1_2LMIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ASRC1IN2R, WM8285_ASRC1_2RMIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ASRC2IN1L, WM8285_ASRC2_1LMIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ASRC2IN1R, WM8285_ASRC2_1RMIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ASRC2IN2L, WM8285_ASRC2_2LMIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ASRC2IN2R, WM8285_ASRC2_2RMIX_INPUT_1_SOURCE); - -WM8285_MUX_ENUMS(ISRC1INT1, ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ISRC1INT2, ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ISRC1INT3, ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ISRC1INT4, ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE); - -WM8285_MUX_ENUMS(ISRC1DEC1, ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ISRC1DEC2, ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ISRC1DEC3, ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ISRC1DEC4, ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE); - -WM8285_MUX_ENUMS(ISRC2INT1, ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ISRC2INT2, ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ISRC2INT3, ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ISRC2INT4, ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE); - -WM8285_MUX_ENUMS(ISRC2DEC1, ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ISRC2DEC2, ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ISRC2DEC3, ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ISRC2DEC4, ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE); - -WM8285_MUX_ENUMS(ISRC3INT1, ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ISRC3INT2, ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE); - -WM8285_MUX_ENUMS(ISRC3DEC1, ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ISRC3DEC2, ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE); - -WM8285_MUX_ENUMS(ISRC4INT1, ARIZONA_ISRC4INT1MIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ISRC4INT2, ARIZONA_ISRC4INT2MIX_INPUT_1_SOURCE); - -WM8285_MUX_ENUMS(ISRC4DEC1, ARIZONA_ISRC4DEC1MIX_INPUT_1_SOURCE); -WM8285_MUX_ENUMS(ISRC4DEC2, ARIZONA_ISRC4DEC2MIX_INPUT_1_SOURCE); - -static const char * const wm8285_dsp_output_texts[] = { +CLEARWATER_MIXER_ENUMS(EQ1, ARIZONA_EQ1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(EQ2, ARIZONA_EQ2MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(EQ3, ARIZONA_EQ3MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(EQ4, ARIZONA_EQ4MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DRC1L, ARIZONA_DRC1LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DRC1R, ARIZONA_DRC1RMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DRC2L, ARIZONA_DRC2LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DRC2R, ARIZONA_DRC2RMIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(LHPF1, ARIZONA_HPLP1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(LHPF2, ARIZONA_HPLP2MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(LHPF3, ARIZONA_HPLP3MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(LHPF4, ARIZONA_HPLP4MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DSP1L, ARIZONA_DSP1LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DSP1R, ARIZONA_DSP1RMIX_INPUT_1_SOURCE); +CLEARWATER_DSP_AUX_ENUMS(DSP1, ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DSP2L, ARIZONA_DSP2LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DSP2R, ARIZONA_DSP2RMIX_INPUT_1_SOURCE); +CLEARWATER_DSP_AUX_ENUMS(DSP2, ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DSP3L, ARIZONA_DSP3LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DSP3R, ARIZONA_DSP3RMIX_INPUT_1_SOURCE); +CLEARWATER_DSP_AUX_ENUMS(DSP3, ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DSP4L, ARIZONA_DSP4LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DSP4R, ARIZONA_DSP4RMIX_INPUT_1_SOURCE); +CLEARWATER_DSP_AUX_ENUMS(DSP4, ARIZONA_DSP4AUX1MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DSP5L, CLEARWATER_DSP5LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DSP5R, CLEARWATER_DSP5RMIX_INPUT_1_SOURCE); +CLEARWATER_DSP_AUX_ENUMS(DSP5, CLEARWATER_DSP5AUX1MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DSP6L, CLEARWATER_DSP6LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DSP6R, CLEARWATER_DSP6RMIX_INPUT_1_SOURCE); +CLEARWATER_DSP_AUX_ENUMS(DSP6, CLEARWATER_DSP6AUX1MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DSP7L, CLEARWATER_DSP7LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DSP7R, CLEARWATER_DSP7RMIX_INPUT_1_SOURCE); +CLEARWATER_DSP_AUX_ENUMS(DSP7, CLEARWATER_DSP7AUX1MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(PWM1, ARIZONA_PWM1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(PWM2, ARIZONA_PWM2MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(OUT1L, ARIZONA_OUT1LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(OUT1R, ARIZONA_OUT1RMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(OUT2L, ARIZONA_OUT2LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(OUT2R, ARIZONA_OUT2RMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(OUT3L, ARIZONA_OUT3LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(OUT3R, ARIZONA_OUT3RMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SPKOUTL, ARIZONA_OUT4LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SPKOUTR, ARIZONA_OUT4RMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SPKDAT1L, ARIZONA_OUT5LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SPKDAT1R, ARIZONA_OUT5RMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SPKDAT2L, ARIZONA_OUT6LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SPKDAT2R, ARIZONA_OUT6RMIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(AIF1TX1, ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX2, ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX3, ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX4, ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX5, ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX6, ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX7, ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX8, ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(AIF2TX1, ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF2TX2, ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF2TX3, ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF2TX4, ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF2TX5, ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF2TX6, ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF2TX7, ARIZONA_AIF2TX7MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF2TX8, ARIZONA_AIF2TX8MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(AIF3TX1, ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF3TX2, ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(AIF4TX1, ARIZONA_AIF4TX1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF4TX2, ARIZONA_AIF4TX2MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(SLIMTX1, ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SLIMTX2, ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SLIMTX3, ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SLIMTX4, ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SLIMTX5, ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SLIMTX6, ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SLIMTX7, ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SLIMTX8, ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(SPD1TX1, ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(SPD1TX2, ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ASRC1IN1L, CLEARWATER_ASRC1_1LMIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ASRC1IN1R, CLEARWATER_ASRC1_1RMIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ASRC1IN2L, CLEARWATER_ASRC1_2LMIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ASRC1IN2R, CLEARWATER_ASRC1_2RMIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ASRC2IN1L, CLEARWATER_ASRC2_1LMIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ASRC2IN1R, CLEARWATER_ASRC2_1RMIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ASRC2IN2L, CLEARWATER_ASRC2_2LMIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ASRC2IN2R, CLEARWATER_ASRC2_2RMIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC1INT1, ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1INT2, ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1INT3, ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1INT4, ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC1DEC1, ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1DEC2, ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1DEC3, ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1DEC4, ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC2INT1, ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2INT2, ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2INT3, ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2INT4, ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC2DEC1, ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2DEC2, ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2DEC3, ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2DEC4, ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC3INT1, ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC3INT2, ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC3DEC1, ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC3DEC2, ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC4INT1, ARIZONA_ISRC4INT1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC4INT2, ARIZONA_ISRC4INT2MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC4DEC1, ARIZONA_ISRC4DEC1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC4DEC2, ARIZONA_ISRC4DEC2MIX_INPUT_1_SOURCE); + +static const char * const clearwater_dsp_output_texts[] = { "None", "DSP6", }; -static const struct soc_enum wm8285_dsp_output_enum = - SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm8285_dsp_output_texts), - wm8285_dsp_output_texts); +static const struct soc_enum clearwater_dsp_output_enum = + SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(clearwater_dsp_output_texts), + clearwater_dsp_output_texts); -static const struct snd_kcontrol_new wm8285_dsp_output_mux[] = { - SOC_DAPM_ENUM_VIRT("DSP Virtual Output Mux", wm8285_dsp_output_enum), +static const struct snd_kcontrol_new clearwater_dsp_output_mux[] = { + SOC_DAPM_ENUM_VIRT("DSP Virtual Output Mux", clearwater_dsp_output_enum), }; -static const char * const wm8285_memory_mux_texts[] = { +static const char * const clearwater_memory_mux_texts[] = { "None", "Shared Memory", }; -static const struct soc_enum wm8285_memory_enum = - SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm8285_memory_mux_texts), - wm8285_memory_mux_texts); +static const struct soc_enum clearwater_memory_enum = + SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(clearwater_memory_mux_texts), + clearwater_memory_mux_texts); -static const struct snd_kcontrol_new wm8285_memory_mux[] = { - SOC_DAPM_ENUM_VIRT("DSP2 Virtual Input", wm8285_memory_enum), - SOC_DAPM_ENUM_VIRT("DSP3 Virtual Input", wm8285_memory_enum), +static const struct snd_kcontrol_new clearwater_memory_mux[] = { + SOC_DAPM_ENUM_VIRT("DSP2 Virtual Input", clearwater_memory_enum), + SOC_DAPM_ENUM_VIRT("DSP3 Virtual Input", clearwater_memory_enum), }; -static const char * const wm8285_aec_loopback_texts[] = { +static const char * const clearwater_aec_loopback_texts[] = { "HPOUT1L", "HPOUT1R", "HPOUT2L", "HPOUT2R", "HPOUT3L", "HPOUT3R", "SPKOUTL", "SPKOUTR", "SPKDAT1L", "SPKDAT1R", "SPKDAT2L", "SPKDAT2R", }; -static const unsigned int wm8285_aec_loopback_values[] = { +static const unsigned int clearwater_aec_loopback_values[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, }; -static const struct soc_enum wm8285_aec_loopback = +static const struct soc_enum clearwater_aec_loopback = SOC_VALUE_ENUM_SINGLE(ARIZONA_DAC_AEC_CONTROL_1, ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, - ARRAY_SIZE(wm8285_aec_loopback_texts), - wm8285_aec_loopback_texts, - wm8285_aec_loopback_values); + ARRAY_SIZE(clearwater_aec_loopback_texts), + clearwater_aec_loopback_texts, + clearwater_aec_loopback_values); -static const struct snd_kcontrol_new wm8285_aec_loopback_mux = - SOC_DAPM_VALUE_ENUM("AEC Loopback", wm8285_aec_loopback); +static const struct snd_kcontrol_new clearwater_aec_loopback_mux = + SOC_DAPM_VALUE_ENUM("AEC Loopback", clearwater_aec_loopback); -static const struct snd_kcontrol_new wm8285_anc_input_mux[] = { - SOC_DAPM_ENUM_EXT("RXANCL Input", wm8285_anc_input_src[0], +static const struct snd_kcontrol_new clearwater_anc_input_mux[] = { + SOC_DAPM_ENUM_EXT("RXANCL Input", clearwater_anc_input_src[0], snd_soc_dapm_get_enum_virt, arizona_put_anc_input), - SOC_DAPM_ENUM_EXT("RXANCR Input", wm8285_anc_input_src[1], + SOC_DAPM_ENUM_EXT("RXANCR Input", clearwater_anc_input_src[1], snd_soc_dapm_get_enum_virt, arizona_put_anc_input), }; -static const struct snd_kcontrol_new wm8285_output_anc_src[] = { +static const struct snd_kcontrol_new clearwater_output_anc_src[] = { SOC_DAPM_ENUM("HPOUT1L ANC Source", arizona_output_anc_src[0]), SOC_DAPM_ENUM("HPOUT1R ANC Source", arizona_output_anc_src[1]), SOC_DAPM_ENUM("HPOUT2L ANC Source", arizona_output_anc_src[2]), SOC_DAPM_ENUM("HPOUT2R ANC Source", arizona_output_anc_src[3]), SOC_DAPM_ENUM("HPOUT3L ANC Source", arizona_output_anc_src[4]), - SOC_DAPM_ENUM("HPOUT3R ANC Source", wm8285_output_anc_src_defs[0]), + SOC_DAPM_ENUM("HPOUT3R ANC Source", clearwater_output_anc_src_defs[0]), SOC_DAPM_ENUM("SPKOUTL ANC Source", arizona_output_anc_src[6]), SOC_DAPM_ENUM("SPKOUTR ANC Source", arizona_output_anc_src[7]), SOC_DAPM_ENUM("SPKDAT1L ANC Source", arizona_output_anc_src[8]), @@ -869,7 +869,7 @@ static const struct snd_kcontrol_new wm8285_output_anc_src[] = { SOC_DAPM_ENUM("SPKDAT2R ANC Source", arizona_output_anc_src[11]), }; -static const struct snd_soc_dapm_widget wm8285_dapm_widgets[] = { +static const struct snd_soc_dapm_widget clearwater_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT, 0, NULL, SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_SUPPLY("ASYNCCLK", ARIZONA_ASYNC_CLOCK_1, @@ -878,7 +878,7 @@ SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK, ARIZONA_OPCLK_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("ASYNCOPCLK", ARIZONA_OUTPUT_ASYNC_CLOCK, ARIZONA_OPCLK_ASYNC_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_SUPPLY("DSPCLK", WM8285_DSP_CLOCK_1, 6, +SND_SOC_DAPM_SUPPLY("DSPCLK", CLEARWATER_DSP_CLOCK_1, 6, 0, NULL, 0), @@ -910,9 +910,9 @@ SND_SOC_DAPM_INPUT("IN5R"), SND_SOC_DAPM_INPUT("IN6L"), SND_SOC_DAPM_INPUT("IN6R"), -SND_SOC_DAPM_MUX("IN1L Mux", SND_SOC_NOPM, 0, 0, &wm8285_in1mux), -SND_SOC_DAPM_MUX("IN2L Mux", SND_SOC_NOPM, 0, 0, &wm8285_in2mux[0]), -SND_SOC_DAPM_MUX("IN2R Mux", SND_SOC_NOPM, 0, 0, &wm8285_in2mux[1]), +SND_SOC_DAPM_MUX("IN1L Mux", SND_SOC_NOPM, 0, 0, &clearwater_in1mux), +SND_SOC_DAPM_MUX("IN2L Mux", SND_SOC_NOPM, 0, 0, &clearwater_in2mux[0]), +SND_SOC_DAPM_MUX("IN2R Mux", SND_SOC_NOPM, 0, 0, &clearwater_in2mux[1]), SND_SOC_DAPM_OUTPUT("DRC1 Signal Activity"), SND_SOC_DAPM_OUTPUT("DRC2 Signal Activity"), @@ -994,9 +994,9 @@ SND_SOC_DAPM_PGA("DRC1L", ARIZONA_DRC1_CTRL1, ARIZONA_DRC1L_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_PGA("DRC1R", ARIZONA_DRC1_CTRL1, ARIZONA_DRC1R_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("DRC2L", WM8285_DRC2_CTRL1, ARIZONA_DRC2L_ENA_SHIFT, 0, +SND_SOC_DAPM_PGA("DRC2L", CLEARWATER_DRC2_CTRL1, ARIZONA_DRC2L_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("DRC2R", WM8285_DRC2_CTRL1, ARIZONA_DRC2R_ENA_SHIFT, 0, +SND_SOC_DAPM_PGA("DRC2R", CLEARWATER_DRC2_CTRL1, ARIZONA_DRC2R_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_PGA("LHPF1", ARIZONA_HPLPF1_1, ARIZONA_LHPF1_ENA_SHIFT, 0, @@ -1013,31 +1013,31 @@ SND_SOC_DAPM_PGA("PWM1 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM1_ENA_SHIFT, SND_SOC_DAPM_PGA("PWM2 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM2_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC1IN1L", WM8285_ASRC1_ENABLE, WM8285_ASRC1_IN1L_ENA_SHIFT, +SND_SOC_DAPM_PGA("ASRC1IN1L", CLEARWATER_ASRC1_ENABLE, CLEARWATER_ASRC1_IN1L_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC1IN1R", WM8285_ASRC1_ENABLE, WM8285_ASRC1_IN1R_ENA_SHIFT, +SND_SOC_DAPM_PGA("ASRC1IN1R", CLEARWATER_ASRC1_ENABLE, CLEARWATER_ASRC1_IN1R_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC1IN2L", WM8285_ASRC1_ENABLE, WM8285_ASRC1_IN2L_ENA_SHIFT, +SND_SOC_DAPM_PGA("ASRC1IN2L", CLEARWATER_ASRC1_ENABLE, CLEARWATER_ASRC1_IN2L_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC1IN2R", WM8285_ASRC1_ENABLE, WM8285_ASRC1_IN2R_ENA_SHIFT, +SND_SOC_DAPM_PGA("ASRC1IN2R", CLEARWATER_ASRC1_ENABLE, CLEARWATER_ASRC1_IN2R_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC2IN1L", WM8285_ASRC2_ENABLE, WM8285_ASRC2_IN1L_ENA_SHIFT, +SND_SOC_DAPM_PGA("ASRC2IN1L", CLEARWATER_ASRC2_ENABLE, CLEARWATER_ASRC2_IN1L_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC2IN1R", WM8285_ASRC2_ENABLE, WM8285_ASRC2_IN1R_ENA_SHIFT, +SND_SOC_DAPM_PGA("ASRC2IN1R", CLEARWATER_ASRC2_ENABLE, CLEARWATER_ASRC2_IN1R_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC2IN2L", WM8285_ASRC2_ENABLE, WM8285_ASRC2_IN2L_ENA_SHIFT, +SND_SOC_DAPM_PGA("ASRC2IN2L", CLEARWATER_ASRC2_ENABLE, CLEARWATER_ASRC2_IN2L_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC2IN2R", WM8285_ASRC2_ENABLE, WM8285_ASRC2_IN2R_ENA_SHIFT, +SND_SOC_DAPM_PGA("ASRC2IN2R", CLEARWATER_ASRC2_ENABLE, CLEARWATER_ASRC2_IN2R_ENA_SHIFT, 0, NULL, 0), -WM_ADSP2("DSP1", 0, wm8285_adsp_power_ev), -WM_ADSP2("DSP2", 1, wm8285_adsp_power_ev), -WM_ADSP2("DSP3", 2, wm8285_adsp_power_ev), -WM_ADSP2("DSP4", 3, wm8285_adsp_power_ev), -WM_ADSP2("DSP5", 4, wm8285_adsp_power_ev), -WM_ADSP2("DSP6", 5, wm8285_adsp_power_ev), -WM_ADSP2("DSP7", 6, wm8285_adsp_power_ev), +WM_ADSP2("DSP1", 0, clearwater_adsp_power_ev), +WM_ADSP2("DSP2", 1, clearwater_adsp_power_ev), +WM_ADSP2("DSP3", 2, clearwater_adsp_power_ev), +WM_ADSP2("DSP4", 3, clearwater_adsp_power_ev), +WM_ADSP2("DSP5", 4, clearwater_adsp_power_ev), +WM_ADSP2("DSP6", 5, clearwater_adsp_power_ev), +WM_ADSP2("DSP7", 6, clearwater_adsp_power_ev), SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), @@ -1097,10 +1097,10 @@ SND_SOC_DAPM_PGA("ISRC4DEC2", ARIZONA_ISRC_4_CTRL_3, SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, - &wm8285_aec_loopback_mux), + &clearwater_aec_loopback_mux), -SND_SOC_DAPM_MUX("RXANCL Input", SND_SOC_NOPM, 0, 0, &wm8285_anc_input_mux[0]), -SND_SOC_DAPM_MUX("RXANCR Input", SND_SOC_NOPM, 0, 0, &wm8285_anc_input_mux[1]), +SND_SOC_DAPM_MUX("RXANCL Input", SND_SOC_NOPM, 0, 0, &clearwater_anc_input_mux[0]), +SND_SOC_DAPM_MUX("RXANCR Input", SND_SOC_NOPM, 0, 0, &clearwater_anc_input_mux[1]), SND_SOC_DAPM_PGA_E("RXANCL", SND_SOC_NOPM, ARIZONA_CLK_L_ENA_SET_SHIFT, 0, NULL, 0, arizona_anc_ev, @@ -1110,29 +1110,29 @@ SND_SOC_DAPM_PGA_E("RXANCR", SND_SOC_NOPM, ARIZONA_CLK_R_ENA_SET_SHIFT, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), SND_SOC_DAPM_MUX("HPOUT1L ANC Source", SND_SOC_NOPM, 0, 0, - &wm8285_output_anc_src[0]), + &clearwater_output_anc_src[0]), SND_SOC_DAPM_MUX("HPOUT1R ANC Source", SND_SOC_NOPM, 0, 0, - &wm8285_output_anc_src[1]), + &clearwater_output_anc_src[1]), SND_SOC_DAPM_MUX("HPOUT2L ANC Source", SND_SOC_NOPM, 0, 0, - &wm8285_output_anc_src[2]), + &clearwater_output_anc_src[2]), SND_SOC_DAPM_MUX("HPOUT2R ANC Source", SND_SOC_NOPM, 0, 0, - &wm8285_output_anc_src[3]), + &clearwater_output_anc_src[3]), SND_SOC_DAPM_MUX("HPOUT3L ANC Source", SND_SOC_NOPM, 0, 0, - &wm8285_output_anc_src[4]), + &clearwater_output_anc_src[4]), SND_SOC_DAPM_MUX("HPOUT3R ANC Source", SND_SOC_NOPM, 0, 0, - &wm8285_output_anc_src[5]), + &clearwater_output_anc_src[5]), SND_SOC_DAPM_MUX("SPKOUTL ANC Source", SND_SOC_NOPM, 0, 0, - &wm8285_output_anc_src[6]), + &clearwater_output_anc_src[6]), SND_SOC_DAPM_MUX("SPKOUTR ANC Source", SND_SOC_NOPM, 0, 0, - &wm8285_output_anc_src[7]), + &clearwater_output_anc_src[7]), SND_SOC_DAPM_MUX("SPKDAT1L ANC Source", SND_SOC_NOPM, 0, 0, - &wm8285_output_anc_src[8]), + &clearwater_output_anc_src[8]), SND_SOC_DAPM_MUX("SPKDAT1R ANC Source", SND_SOC_NOPM, 0, 0, - &wm8285_output_anc_src[9]), + &clearwater_output_anc_src[9]), SND_SOC_DAPM_MUX("SPKDAT2L ANC Source", SND_SOC_NOPM, 0, 0, - &wm8285_output_anc_src[10]), + &clearwater_output_anc_src[10]), SND_SOC_DAPM_MUX("SPKDAT2R ANC Source", SND_SOC_NOPM, 0, 0, - &wm8285_output_anc_src[11]), + &clearwater_output_anc_src[11]), SND_SOC_DAPM_AIF_OUT("AIF1TX1", NULL, 0, ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX1_ENA_SHIFT, 0), @@ -1398,12 +1398,12 @@ ARIZONA_DSP_WIDGETS(DSP6, "DSP6"), ARIZONA_DSP_WIDGETS(DSP7, "DSP7"), SND_SOC_DAPM_VIRT_MUX("DSP2 Virtual Input", SND_SOC_NOPM, 0, 0, - &wm8285_memory_mux[0]), + &clearwater_memory_mux[0]), SND_SOC_DAPM_VIRT_MUX("DSP3 Virtual Input", SND_SOC_NOPM, 0, 0, - &wm8285_memory_mux[1]), + &clearwater_memory_mux[1]), SND_SOC_DAPM_VIRT_MUX_E("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, - &wm8285_dsp_output_mux[0], wm8285_virt_dsp_power_ev, + &clearwater_dsp_output_mux[0], clearwater_virt_dsp_power_ev, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), ARIZONA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), @@ -1590,7 +1590,7 @@ SND_SOC_DAPM_OUTPUT("MICSUPP"), { name, "DSP7.5", "DSP7" }, \ { name, "DSP7.6", "DSP7" } -static const struct snd_soc_dapm_route wm8285_dapm_routes[] = { +static const struct snd_soc_dapm_route clearwater_dapm_routes[] = { { "AIF2 Capture", NULL, "DBVDD2" }, { "AIF2 Playback", NULL, "DBVDD2" }, @@ -1951,21 +1951,21 @@ static const struct snd_soc_dapm_route wm8285_dapm_routes[] = { { "SPKDAT2L", NULL, "OUT6L" }, { "SPKDAT2R", NULL, "OUT6R" }, - WM8285_RXANC_INPUT_ROUTES("RXANCL", "RXANCL"), - WM8285_RXANC_INPUT_ROUTES("RXANCR", "RXANCR"), - - WM8285_RXANC_OUTPUT_ROUTES("OUT1L", "HPOUT1L"), - WM8285_RXANC_OUTPUT_ROUTES("OUT1R", "HPOUT1R"), - WM8285_RXANC_OUTPUT_ROUTES("OUT2L", "HPOUT2L"), - WM8285_RXANC_OUTPUT_ROUTES("OUT2R", "HPOUT2R"), - WM8285_RXANC_OUTPUT_ROUTES("OUT3L", "HPOUT3L"), - WM8285_RXANC_OUTPUT_ROUTES("OUT3R", "HPOUT3R"), - WM8285_RXANC_OUTPUT_ROUTES("OUT4L", "SPKOUTL"), - WM8285_RXANC_OUTPUT_ROUTES("OUT4R", "SPKOUTR"), - WM8285_RXANC_OUTPUT_ROUTES("OUT5L", "SPKDAT1L"), - WM8285_RXANC_OUTPUT_ROUTES("OUT5R", "SPKDAT1R"), - WM8285_RXANC_OUTPUT_ROUTES("OUT6L", "SPKDAT2L"), - WM8285_RXANC_OUTPUT_ROUTES("OUT6R", "SPKDAT2R"), + CLEARWATER_RXANC_INPUT_ROUTES("RXANCL", "RXANCL"), + CLEARWATER_RXANC_INPUT_ROUTES("RXANCR", "RXANCR"), + + CLEARWATER_RXANC_OUTPUT_ROUTES("OUT1L", "HPOUT1L"), + CLEARWATER_RXANC_OUTPUT_ROUTES("OUT1R", "HPOUT1R"), + CLEARWATER_RXANC_OUTPUT_ROUTES("OUT2L", "HPOUT2L"), + CLEARWATER_RXANC_OUTPUT_ROUTES("OUT2R", "HPOUT2R"), + CLEARWATER_RXANC_OUTPUT_ROUTES("OUT3L", "HPOUT3L"), + CLEARWATER_RXANC_OUTPUT_ROUTES("OUT3R", "HPOUT3R"), + CLEARWATER_RXANC_OUTPUT_ROUTES("OUT4L", "SPKOUTL"), + CLEARWATER_RXANC_OUTPUT_ROUTES("OUT4R", "SPKOUTR"), + CLEARWATER_RXANC_OUTPUT_ROUTES("OUT5L", "SPKDAT1L"), + CLEARWATER_RXANC_OUTPUT_ROUTES("OUT5R", "SPKDAT1R"), + CLEARWATER_RXANC_OUTPUT_ROUTES("OUT6L", "SPKDAT2L"), + CLEARWATER_RXANC_OUTPUT_ROUTES("OUT6R", "SPKDAT2R"), { "SPDIF", NULL, "SPD1" }, @@ -1977,278 +1977,278 @@ static const struct snd_soc_dapm_route wm8285_dapm_routes[] = { { "DRC2 Signal Activity", NULL, "DRC2R" }, }; -static int wm8285_set_fll(struct snd_soc_codec *codec, int fll_id, int source, +static int clearwater_set_fll(struct snd_soc_codec *codec, int fll_id, int source, unsigned int Fref, unsigned int Fout) { - struct wm8285_priv *wm8285 = snd_soc_codec_get_drvdata(codec); + struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(codec); switch (fll_id) { - case WM8285_FLL1: - return arizona_set_fll(&wm8285->fll[0], source, Fref, Fout); - case WM8285_FLL2: - return arizona_set_fll(&wm8285->fll[1], source, Fref, Fout); - case WM8285_FLL3: - return arizona_set_fll(&wm8285->fll[2], source, Fref, Fout); - case WM8285_FLL1_REFCLK: - return arizona_set_fll_refclk(&wm8285->fll[0], source, Fref, + case CLEARWATER_FLL1: + return arizona_set_fll(&clearwater->fll[0], source, Fref, Fout); + case CLEARWATER_FLL2: + return arizona_set_fll(&clearwater->fll[1], source, Fref, Fout); + case CLEARWATER_FLL3: + return arizona_set_fll(&clearwater->fll[2], source, Fref, Fout); + case CLEARWATER_FLL1_REFCLK: + return arizona_set_fll_refclk(&clearwater->fll[0], source, Fref, Fout); - case WM8285_FLL2_REFCLK: - return arizona_set_fll_refclk(&wm8285->fll[1], source, Fref, + case CLEARWATER_FLL2_REFCLK: + return arizona_set_fll_refclk(&clearwater->fll[1], source, Fref, Fout); - case WM8285_FLL3_REFCLK: - return arizona_set_fll_refclk(&wm8285->fll[2], source, Fref, + case CLEARWATER_FLL3_REFCLK: + return arizona_set_fll_refclk(&clearwater->fll[2], source, Fref, Fout); default: return -EINVAL; } } -#define WM8285_RATES SNDRV_PCM_RATE_8000_192000 +#define CLEARWATER_RATES SNDRV_PCM_RATE_8000_192000 -#define WM8285_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ +#define CLEARWATER_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) -static struct snd_soc_dai_driver wm8285_dai[] = { +static struct snd_soc_dai_driver clearwater_dai[] = { { - .name = "wm8285-aif1", + .name = "clearwater-aif1", .id = 1, .base = ARIZONA_AIF1_BCLK_CTRL, .playback = { .stream_name = "AIF1 Playback", .channels_min = 1, .channels_max = 8, - .rates = WM8285_RATES, - .formats = WM8285_FORMATS, + .rates = CLEARWATER_RATES, + .formats = CLEARWATER_FORMATS, }, .capture = { .stream_name = "AIF1 Capture", .channels_min = 1, .channels_max = 8, - .rates = WM8285_RATES, - .formats = WM8285_FORMATS, + .rates = CLEARWATER_RATES, + .formats = CLEARWATER_FORMATS, }, .ops = &arizona_dai_ops, .symmetric_rates = 1, }, { - .name = "wm8285-aif2", + .name = "clearwater-aif2", .id = 2, .base = ARIZONA_AIF2_BCLK_CTRL, .playback = { .stream_name = "AIF2 Playback", .channels_min = 1, .channels_max = 8, - .rates = WM8285_RATES, - .formats = WM8285_FORMATS, + .rates = CLEARWATER_RATES, + .formats = CLEARWATER_FORMATS, }, .capture = { .stream_name = "AIF2 Capture", .channels_min = 1, .channels_max = 8, - .rates = WM8285_RATES, - .formats = WM8285_FORMATS, + .rates = CLEARWATER_RATES, + .formats = CLEARWATER_FORMATS, }, .ops = &arizona_dai_ops, .symmetric_rates = 1, }, { - .name = "wm8285-aif3", + .name = "clearwater-aif3", .id = 3, .base = ARIZONA_AIF3_BCLK_CTRL, .playback = { .stream_name = "AIF3 Playback", .channels_min = 1, .channels_max = 2, - .rates = WM8285_RATES, - .formats = WM8285_FORMATS, + .rates = CLEARWATER_RATES, + .formats = CLEARWATER_FORMATS, }, .capture = { .stream_name = "AIF3 Capture", .channels_min = 1, .channels_max = 2, - .rates = WM8285_RATES, - .formats = WM8285_FORMATS, + .rates = CLEARWATER_RATES, + .formats = CLEARWATER_FORMATS, }, .ops = &arizona_dai_ops, .symmetric_rates = 1, }, { - .name = "wm8285-aif4", + .name = "clearwater-aif4", .id = 4, .base = ARIZONA_AIF4_BCLK_CTRL, .playback = { .stream_name = "AIF4 Playback", .channels_min = 1, .channels_max = 2, - .rates = WM8285_RATES, - .formats = WM8285_FORMATS, + .rates = CLEARWATER_RATES, + .formats = CLEARWATER_FORMATS, }, .capture = { .stream_name = "AIF4 Capture", .channels_min = 1, .channels_max = 2, - .rates = WM8285_RATES, - .formats = WM8285_FORMATS, + .rates = CLEARWATER_RATES, + .formats = CLEARWATER_FORMATS, }, .ops = &arizona_dai_ops, .symmetric_rates = 1, }, { - .name = "wm8285-slim1", + .name = "clearwater-slim1", .id = 5, .playback = { .stream_name = "Slim1 Playback", .channels_min = 1, .channels_max = 4, - .rates = WM8285_RATES, - .formats = WM8285_FORMATS, + .rates = CLEARWATER_RATES, + .formats = CLEARWATER_FORMATS, }, .capture = { .stream_name = "Slim1 Capture", .channels_min = 1, .channels_max = 4, - .rates = WM8285_RATES, - .formats = WM8285_FORMATS, + .rates = CLEARWATER_RATES, + .formats = CLEARWATER_FORMATS, }, .ops = &arizona_simple_dai_ops, }, { - .name = "wm8285-slim2", + .name = "clearwater-slim2", .id = 6, .playback = { .stream_name = "Slim2 Playback", .channels_min = 1, .channels_max = 2, - .rates = WM8285_RATES, - .formats = WM8285_FORMATS, + .rates = CLEARWATER_RATES, + .formats = CLEARWATER_FORMATS, }, .capture = { .stream_name = "Slim2 Capture", .channels_min = 1, .channels_max = 2, - .rates = WM8285_RATES, - .formats = WM8285_FORMATS, + .rates = CLEARWATER_RATES, + .formats = CLEARWATER_FORMATS, }, .ops = &arizona_simple_dai_ops, }, { - .name = "wm8285-slim3", + .name = "clearwater-slim3", .id = 7, .playback = { .stream_name = "Slim3 Playback", .channels_min = 1, .channels_max = 2, - .rates = WM8285_RATES, - .formats = WM8285_FORMATS, + .rates = CLEARWATER_RATES, + .formats = CLEARWATER_FORMATS, }, .capture = { .stream_name = "Slim3 Capture", .channels_min = 1, .channels_max = 2, - .rates = WM8285_RATES, - .formats = WM8285_FORMATS, + .rates = CLEARWATER_RATES, + .formats = CLEARWATER_FORMATS, }, .ops = &arizona_simple_dai_ops, }, { - .name = "wm8285-cpu-voicectrl", + .name = "clearwater-cpu-voicectrl", .capture = { .stream_name = "Voice Control CPU", .channels_min = 1, .channels_max = 1, - .rates = WM8285_RATES, - .formats = WM8285_FORMATS, + .rates = CLEARWATER_RATES, + .formats = CLEARWATER_FORMATS, }, .compress_dai = 1, }, { - .name = "wm8285-dsp-voicectrl", + .name = "clearwater-dsp-voicectrl", .capture = { .stream_name = "Voice Control DSP", .channels_min = 1, .channels_max = 1, - .rates = WM8285_RATES, - .formats = WM8285_FORMATS, + .rates = CLEARWATER_RATES, + .formats = CLEARWATER_FORMATS, }, }, { - .name = "wm8285-cpu-trace", + .name = "clearwater-cpu-trace", .capture = { .stream_name = "Trace CPU", .channels_min = 2, .channels_max = 8, - .rates = WM8285_RATES, - .formats = WM8285_FORMATS, + .rates = CLEARWATER_RATES, + .formats = CLEARWATER_FORMATS, }, .compress_dai = 1, }, { - .name = "wm8285-dsp-trace", + .name = "clearwater-dsp-trace", .capture = { .stream_name = "Trace DSP", .channels_min = 2, .channels_max = 8, - .rates = WM8285_RATES, - .formats = WM8285_FORMATS, + .rates = CLEARWATER_RATES, + .formats = CLEARWATER_FORMATS, }, }, }; static irqreturn_t adsp2_irq(int irq, void *data) { - struct wm8285_priv *wm8285 = data; + struct clearwater_priv *clearwater = data; int ret, avail; - mutex_lock(&wm8285->compr_info.lock); + mutex_lock(&clearwater->compr_info.lock); - if (!wm8285->compr_info.trig && - wm8285->core.adsp[5].fw_id == 0x6000d && - wm8285->core.adsp[5].running) { - if (wm8285->core.arizona->pdata.ez2ctrl_trigger) - wm8285->core.arizona->pdata.ez2ctrl_trigger(); - wm8285->compr_info.trig = true; + if (!clearwater->compr_info.trig && + clearwater->core.adsp[5].fw_id == 0x6000d && + clearwater->core.adsp[5].running) { + if (clearwater->core.arizona->pdata.ez2ctrl_trigger) + clearwater->core.arizona->pdata.ez2ctrl_trigger(); + clearwater->compr_info.trig = true; } - if (!wm8285->compr_info.allocated) + if (!clearwater->compr_info.allocated) goto out; - ret = wm_adsp_stream_handle_irq(wm8285->compr_info.adsp); + ret = wm_adsp_stream_handle_irq(clearwater->compr_info.adsp); if (ret < 0) { - dev_err(wm8285->core.arizona->dev, + dev_err(clearwater->core.arizona->dev, "Failed to capture DSP data: %d\n", ret); goto out; } - wm8285->compr_info.total_copied += ret; + clearwater->compr_info.total_copied += ret; - avail = wm_adsp_stream_avail(wm8285->compr_info.adsp); - if (avail > WM8285_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(wm8285->compr_info.stream); + avail = wm_adsp_stream_avail(clearwater->compr_info.adsp); + if (avail > CLEARWATER_DEFAULT_FRAGMENT_SIZE) + snd_compr_fragment_elapsed(clearwater->compr_info.stream); out: - mutex_unlock(&wm8285->compr_info.lock); + mutex_unlock(&clearwater->compr_info.lock); return IRQ_HANDLED; } -static int wm8285_open(struct snd_compr_stream *stream) +static int clearwater_open(struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct wm8285_priv *wm8285 = snd_soc_codec_get_drvdata(rtd->codec); - struct arizona *arizona = wm8285->core.arizona; + struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = clearwater->core.arizona; int n_adsp, ret = 0; - mutex_lock(&wm8285->compr_info.lock); + mutex_lock(&clearwater->compr_info.lock); - if (wm8285->compr_info.stream) { + if (clearwater->compr_info.stream) { ret = -EBUSY; goto out; } - if (strcmp(rtd->codec_dai->name, "wm8285-dsp-voicectrl") == 0) { + if (strcmp(rtd->codec_dai->name, "clearwater-dsp-voicectrl") == 0) { n_adsp = 5; - } else if (strcmp(rtd->codec_dai->name, "wm8285-dsp-trace") == 0) { + } else if (strcmp(rtd->codec_dai->name, "clearwater-dsp-trace") == 0) { n_adsp = 0; } else { dev_err(arizona->dev, @@ -2258,48 +2258,48 @@ static int wm8285_open(struct snd_compr_stream *stream) goto out; } - if (!wm_adsp_compress_supported(&wm8285->core.adsp[n_adsp], stream)) { + if (!wm_adsp_compress_supported(&clearwater->core.adsp[n_adsp], stream)) { dev_err(arizona->dev, "No suitable firmware for compressed stream\n"); ret = -EINVAL; goto out; } - wm8285->compr_info.adsp = &wm8285->core.adsp[n_adsp]; - wm8285->compr_info.stream = stream; + clearwater->compr_info.adsp = &clearwater->core.adsp[n_adsp]; + clearwater->compr_info.stream = stream; out: - mutex_unlock(&wm8285->compr_info.lock); + mutex_unlock(&clearwater->compr_info.lock); return ret; } -static int wm8285_free(struct snd_compr_stream *stream) +static int clearwater_free(struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct wm8285_priv *wm8285 = snd_soc_codec_get_drvdata(rtd->codec); + struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(rtd->codec); - mutex_lock(&wm8285->compr_info.lock); + mutex_lock(&clearwater->compr_info.lock); - wm8285->compr_info.allocated = false; - wm8285->compr_info.stream = NULL; - wm8285->compr_info.total_copied = 0; - if (!wm8285->compr_info.forced) - wm8285->compr_info.trig = false; + clearwater->compr_info.allocated = false; + clearwater->compr_info.stream = NULL; + clearwater->compr_info.total_copied = 0; + if (!clearwater->compr_info.forced) + clearwater->compr_info.trig = false; - wm_adsp_stream_free(wm8285->compr_info.adsp); + wm_adsp_stream_free(clearwater->compr_info.adsp); - mutex_unlock(&wm8285->compr_info.lock); + mutex_unlock(&clearwater->compr_info.lock); return 0; } -static int wm8285_set_params(struct snd_compr_stream *stream, +static int clearwater_set_params(struct snd_compr_stream *stream, struct snd_compr_params *params) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct wm8285_priv *wm8285 = snd_soc_codec_get_drvdata(rtd->codec); - struct arizona *arizona = wm8285->core.arizona; - struct wm8285_compr *compr = &wm8285->compr_info; + struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = clearwater->core.arizona; + struct clearwater_compr *compr = &clearwater->compr_info; int ret = 0; mutex_lock(&compr->lock); @@ -2324,30 +2324,30 @@ static int wm8285_set_params(struct snd_compr_stream *stream, return ret; } -static int wm8285_get_params(struct snd_compr_stream *stream, +static int clearwater_get_params(struct snd_compr_stream *stream, struct snd_codec *params) { return 0; } -static int wm8285_trigger(struct snd_compr_stream *stream, int cmd) +static int clearwater_trigger(struct snd_compr_stream *stream, int cmd) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct wm8285_priv *wm8285 = snd_soc_codec_get_drvdata(rtd->codec); + struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(rtd->codec); int ret = 0; bool pending = false; - mutex_lock(&wm8285->compr_info.lock); + mutex_lock(&clearwater->compr_info.lock); switch (cmd) { case SNDRV_PCM_TRIGGER_START: - ret = wm_adsp_stream_start(wm8285->compr_info.adsp); + ret = wm_adsp_stream_start(clearwater->compr_info.adsp); /** * If the stream has already triggered before the stream * opened better process any outstanding data */ - if (wm8285->compr_info.trig) + if (clearwater->compr_info.trig) pending = true; break; case SNDRV_PCM_TRIGGER_STOP: @@ -2357,79 +2357,79 @@ static int wm8285_trigger(struct snd_compr_stream *stream, int cmd) break; } - mutex_unlock(&wm8285->compr_info.lock); + mutex_unlock(&clearwater->compr_info.lock); if (pending) - adsp2_irq(0, wm8285); + adsp2_irq(0, clearwater); return ret; } -static int wm8285_pointer(struct snd_compr_stream *stream, +static int clearwater_pointer(struct snd_compr_stream *stream, struct snd_compr_tstamp *tstamp) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct wm8285_priv *wm8285 = snd_soc_codec_get_drvdata(rtd->codec); + struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(rtd->codec); - mutex_lock(&wm8285->compr_info.lock); + mutex_lock(&clearwater->compr_info.lock); tstamp->byte_offset = 0; - tstamp->copied_total = wm8285->compr_info.total_copied; - mutex_unlock(&wm8285->compr_info.lock); + tstamp->copied_total = clearwater->compr_info.total_copied; + mutex_unlock(&clearwater->compr_info.lock); return 0; } -static int wm8285_copy(struct snd_compr_stream *stream, char __user *buf, +static int clearwater_copy(struct snd_compr_stream *stream, char __user *buf, size_t count) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct wm8285_priv *wm8285 = snd_soc_codec_get_drvdata(rtd->codec); + struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(rtd->codec); int ret; - mutex_lock(&wm8285->compr_info.lock); + mutex_lock(&clearwater->compr_info.lock); if (stream->direction == SND_COMPRESS_PLAYBACK) ret = -EINVAL; else - ret = wm_adsp_stream_read(wm8285->compr_info.adsp, buf, count); + ret = wm_adsp_stream_read(clearwater->compr_info.adsp, buf, count); - mutex_unlock(&wm8285->compr_info.lock); + mutex_unlock(&clearwater->compr_info.lock); return ret; } -static int wm8285_get_caps(struct snd_compr_stream *stream, +static int clearwater_get_caps(struct snd_compr_stream *stream, struct snd_compr_caps *caps) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct wm8285_priv *wm8285 = snd_soc_codec_get_drvdata(rtd->codec); + struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(rtd->codec); - mutex_lock(&wm8285->compr_info.lock); + mutex_lock(&clearwater->compr_info.lock); memset(caps, 0, sizeof(*caps)); caps->direction = stream->direction; - caps->min_fragment_size = WM8285_DEFAULT_FRAGMENT_SIZE; - caps->max_fragment_size = WM8285_DEFAULT_FRAGMENT_SIZE; - caps->min_fragments = WM8285_DEFAULT_FRAGMENTS; - caps->max_fragments = WM8285_DEFAULT_FRAGMENTS; + caps->min_fragment_size = CLEARWATER_DEFAULT_FRAGMENT_SIZE; + caps->max_fragment_size = CLEARWATER_DEFAULT_FRAGMENT_SIZE; + caps->min_fragments = CLEARWATER_DEFAULT_FRAGMENTS; + caps->max_fragments = CLEARWATER_DEFAULT_FRAGMENTS; - wm_adsp_get_caps(wm8285->compr_info.adsp, stream, caps); + wm_adsp_get_caps(clearwater->compr_info.adsp, stream, caps); - mutex_unlock(&wm8285->compr_info.lock); + mutex_unlock(&clearwater->compr_info.lock); return 0; } -static int wm8285_get_codec_caps(struct snd_compr_stream *stream, +static int clearwater_get_codec_caps(struct snd_compr_stream *stream, struct snd_compr_codec_caps *codec) { return 0; } -static int wm8285_codec_probe(struct snd_soc_codec *codec) +static int clearwater_codec_probe(struct snd_soc_codec *codec) { - struct wm8285_priv *priv = snd_soc_codec_get_drvdata(codec); + struct clearwater_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; int ret; @@ -2472,9 +2472,9 @@ static int wm8285_codec_probe(struct snd_soc_codec *codec) snd_soc_dapm_enable_pin(&codec->dapm, "DRC2 Signal Activity"); mutex_unlock(&codec->card->dapm_mutex); - ret = regmap_update_bits(arizona->regmap, WM8285_IRQ2_MASK_9, - WM8285_DRC2_SIG_DET_EINT2, - WM8285_DRC2_SIG_DET_EINT2); + ret = regmap_update_bits(arizona->regmap, CLEARWATER_IRQ2_MASK_9, + CLEARWATER_DRC2_SIG_DET_EINT2, + CLEARWATER_DRC2_SIG_DET_EINT2); if (ret != 0) { dev_err(arizona->dev, "Failed to unmask DRC2 IRQ for DSP: %d\n", @@ -2485,9 +2485,9 @@ static int wm8285_codec_probe(struct snd_soc_codec *codec) return 0; } -static int wm8285_codec_remove(struct snd_soc_codec *codec) +static int clearwater_codec_remove(struct snd_soc_codec *codec) { - struct wm8285_priv *priv = snd_soc_codec_get_drvdata(codec); + struct clearwater_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; irq_set_irq_wake(arizona->irq, 0); @@ -2501,9 +2501,9 @@ static int wm8285_codec_remove(struct snd_soc_codec *codec) return 0; } -#define WM8285_DIG_VU 0x0200 +#define CLEARWATER_DIG_VU 0x0200 -static unsigned int wm8285_digital_vu[] = { +static unsigned int clearwater_digital_vu[] = { ARIZONA_DAC_DIGITAL_VOLUME_1L, ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_DAC_DIGITAL_VOLUME_2L, @@ -2518,119 +2518,119 @@ static unsigned int wm8285_digital_vu[] = { ARIZONA_DAC_DIGITAL_VOLUME_6R, }; -static struct snd_soc_codec_driver soc_codec_dev_wm8285 = { - .probe = wm8285_codec_probe, - .remove = wm8285_codec_remove, +static struct snd_soc_codec_driver soc_codec_dev_clearwater = { + .probe = clearwater_codec_probe, + .remove = clearwater_codec_remove, .idle_bias_off = true, .set_sysclk = arizona_set_sysclk, - .set_pll = wm8285_set_fll, - - .controls = wm8285_snd_controls, - .num_controls = ARRAY_SIZE(wm8285_snd_controls), - .dapm_widgets = wm8285_dapm_widgets, - .num_dapm_widgets = ARRAY_SIZE(wm8285_dapm_widgets), - .dapm_routes = wm8285_dapm_routes, - .num_dapm_routes = ARRAY_SIZE(wm8285_dapm_routes), + .set_pll = clearwater_set_fll, + + .controls = clearwater_snd_controls, + .num_controls = ARRAY_SIZE(clearwater_snd_controls), + .dapm_widgets = clearwater_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(clearwater_dapm_widgets), + .dapm_routes = clearwater_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(clearwater_dapm_routes), }; -static struct snd_compr_ops wm8285_compr_ops = { - .open = wm8285_open, - .free = wm8285_free, - .set_params = wm8285_set_params, - .get_params = wm8285_get_params, - .trigger = wm8285_trigger, - .pointer = wm8285_pointer, - .copy = wm8285_copy, - .get_caps = wm8285_get_caps, - .get_codec_caps = wm8285_get_codec_caps, +static struct snd_compr_ops clearwater_compr_ops = { + .open = clearwater_open, + .free = clearwater_free, + .set_params = clearwater_set_params, + .get_params = clearwater_get_params, + .trigger = clearwater_trigger, + .pointer = clearwater_pointer, + .copy = clearwater_copy, + .get_caps = clearwater_get_caps, + .get_codec_caps = clearwater_get_codec_caps, }; -static struct snd_soc_platform_driver wm8285_compr_platform = { - .compr_ops = &wm8285_compr_ops, +static struct snd_soc_platform_driver clearwater_compr_platform = { + .compr_ops = &clearwater_compr_ops, }; -static int wm8285_probe(struct platform_device *pdev) +static int clearwater_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); - struct wm8285_priv *wm8285; + struct clearwater_priv *clearwater; int i, ret; - BUILD_BUG_ON(ARRAY_SIZE(wm8285_dai) > ARIZONA_MAX_DAI); + BUILD_BUG_ON(ARRAY_SIZE(clearwater_dai) > ARIZONA_MAX_DAI); - wm8285 = devm_kzalloc(&pdev->dev, sizeof(struct wm8285_priv), + clearwater = devm_kzalloc(&pdev->dev, sizeof(struct clearwater_priv), GFP_KERNEL); - if (wm8285 == NULL) + if (clearwater == NULL) return -ENOMEM; - platform_set_drvdata(pdev, wm8285); + platform_set_drvdata(pdev, clearwater); /* Set of_node to parent from the SPI device to allow DAPM to * locate regulator supplies */ pdev->dev.of_node = arizona->dev->of_node; - mutex_init(&wm8285->compr_info.lock); - mutex_init(&wm8285->fw_lock); + mutex_init(&clearwater->compr_info.lock); + mutex_init(&clearwater->fw_lock); - wm8285->core.arizona = arizona; - wm8285->core.num_inputs = 8; + clearwater->core.arizona = arizona; + clearwater->core.num_inputs = 8; - for (i = 0; i < WM8285_NUM_ADSP; i++) { - wm8285->core.adsp[i].part = "wm8285"; + for (i = 0; i < CLEARWATER_NUM_ADSP; i++) { + clearwater->core.adsp[i].part = "clearwater"; if (arizona->pdata.rev_specific_fw) - wm8285->core.adsp[i].part_rev = 'a' + arizona->rev; - wm8285->core.adsp[i].num = i + 1; - wm8285->core.adsp[i].type = WMFW_ADSP2; - wm8285->core.adsp[i].rev = 1; - wm8285->core.adsp[i].dev = arizona->dev; - wm8285->core.adsp[i].regmap = arizona->regmap_32bit; - - wm8285->core.adsp[i].base = wm_adsp2_control_bases[i]; - wm8285->core.adsp[i].mem = wm8285_dsp_regions[i]; - wm8285->core.adsp[i].num_mems - = ARRAY_SIZE(wm8285_dsp1_regions); + clearwater->core.adsp[i].part_rev = 'a' + arizona->rev; + clearwater->core.adsp[i].num = i + 1; + clearwater->core.adsp[i].type = WMFW_ADSP2; + clearwater->core.adsp[i].rev = 1; + clearwater->core.adsp[i].dev = arizona->dev; + clearwater->core.adsp[i].regmap = arizona->regmap_32bit; + + clearwater->core.adsp[i].base = wm_adsp2_control_bases[i]; + clearwater->core.adsp[i].mem = clearwater_dsp_regions[i]; + clearwater->core.adsp[i].num_mems + = ARRAY_SIZE(clearwater_dsp1_regions); if (arizona->pdata.num_fw_defs[i]) { - wm8285->core.adsp[i].firmwares + clearwater->core.adsp[i].firmwares = arizona->pdata.fw_defs[i]; - wm8285->core.adsp[i].num_firmwares + clearwater->core.adsp[i].num_firmwares = arizona->pdata.num_fw_defs[i]; } - ret = wm_adsp2_init(&wm8285->core.adsp[i], &wm8285->fw_lock); + ret = wm_adsp2_init(&clearwater->core.adsp[i], &clearwater->fw_lock); if (ret != 0) return ret; } - for (i = 0; i < ARRAY_SIZE(wm8285->fll); i++) { - wm8285->fll[i].vco_mult = 3; - wm8285->fll[i].min_outdiv = 3; - wm8285->fll[i].max_outdiv = 3; + for (i = 0; i < ARRAY_SIZE(clearwater->fll); i++) { + clearwater->fll[i].vco_mult = 3; + clearwater->fll[i].min_outdiv = 3; + clearwater->fll[i].max_outdiv = 3; } arizona_init_fll(arizona, 1, ARIZONA_FLL1_CONTROL_1 - 1, ARIZONA_IRQ_FLL1_LOCK, ARIZONA_IRQ_FLL1_CLOCK_OK, - &wm8285->fll[0]); + &clearwater->fll[0]); arizona_init_fll(arizona, 2, ARIZONA_FLL2_CONTROL_1 - 1, ARIZONA_IRQ_FLL2_LOCK, ARIZONA_IRQ_FLL2_CLOCK_OK, - &wm8285->fll[1]); + &clearwater->fll[1]); arizona_init_fll(arizona, 3, ARIZONA_FLL3_CONTROL_1 - 1, ARIZONA_IRQ_FLL3_LOCK, ARIZONA_IRQ_FLL3_CLOCK_OK, - &wm8285->fll[2]); + &clearwater->fll[2]); - for (i = 0; i < ARRAY_SIZE(wm8285_dai); i++) - arizona_init_dai(&wm8285->core, i); + for (i = 0; i < ARRAY_SIZE(clearwater_dai); i++) + arizona_init_dai(&clearwater->core, i); /* Latch volume update bits */ - for (i = 0; i < ARRAY_SIZE(wm8285_digital_vu); i++) - regmap_update_bits(arizona->regmap, wm8285_digital_vu[i], - WM8285_DIG_VU, WM8285_DIG_VU); + for (i = 0; i < ARRAY_SIZE(clearwater_digital_vu); i++) + regmap_update_bits(arizona->regmap, clearwater_digital_vu[i], + CLEARWATER_DIG_VU, CLEARWATER_DIG_VU); pm_runtime_enable(&pdev->dev); pm_runtime_idle(&pdev->dev); - ret = snd_soc_register_platform(&pdev->dev, &wm8285_compr_platform); + ret = snd_soc_register_platform(&pdev->dev, &clearwater_compr_platform); if (ret < 0) { dev_err(&pdev->dev, "Failed to register platform: %d\n", @@ -2638,8 +2638,8 @@ static int wm8285_probe(struct platform_device *pdev) goto error; } - ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_wm8285, - wm8285_dai, ARRAY_SIZE(wm8285_dai)); + ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_clearwater, + clearwater_dai, ARRAY_SIZE(clearwater_dai)); if (ret < 0) { dev_err(&pdev->dev, "Failed to register codec: %d\n", @@ -2651,37 +2651,37 @@ static int wm8285_probe(struct platform_device *pdev) return ret; error: - mutex_destroy(&wm8285->compr_info.lock); - mutex_destroy(&wm8285->fw_lock); + mutex_destroy(&clearwater->compr_info.lock); + mutex_destroy(&clearwater->fw_lock); return ret; } -static int wm8285_remove(struct platform_device *pdev) +static int clearwater_remove(struct platform_device *pdev) { - struct wm8285_priv *wm8285 = platform_get_drvdata(pdev); + struct clearwater_priv *clearwater = platform_get_drvdata(pdev); snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); - mutex_destroy(&wm8285->compr_info.lock); - mutex_destroy(&wm8285->fw_lock); + mutex_destroy(&clearwater->compr_info.lock); + mutex_destroy(&clearwater->fw_lock); return 0; } -static struct platform_driver wm8285_codec_driver = { +static struct platform_driver clearwater_codec_driver = { .driver = { - .name = "wm8285-codec", + .name = "clearwater-codec", .owner = THIS_MODULE, }, - .probe = wm8285_probe, - .remove = wm8285_remove, + .probe = clearwater_probe, + .remove = clearwater_remove, }; -module_platform_driver(wm8285_codec_driver); +module_platform_driver(clearwater_codec_driver); -MODULE_DESCRIPTION("ASoC WM8285 driver"); +MODULE_DESCRIPTION("ASoC CLEARWATER driver"); MODULE_AUTHOR("Nariman Poushin "); MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:wm8285-codec"); +MODULE_ALIAS("platform:clearwater-codec"); diff --git a/sound/soc/codecs/wm8285.h b/sound/soc/codecs/clearwater.h similarity index 52% rename from sound/soc/codecs/wm8285.h rename to sound/soc/codecs/clearwater.h index a418ed90092..6d60e67fd79 100644 --- a/sound/soc/codecs/wm8285.h +++ b/sound/soc/codecs/clearwater.h @@ -1,5 +1,5 @@ /* - * florida.h -- ALSA SoC Audio driver for Florida-class codecs + * clearwater.h -- ALSA SoC Audio driver for Florida-class codecs * * Copyright 2012 Wolfson Microelectronics plc * @@ -10,16 +10,16 @@ * published by the Free Software Foundation. */ -#ifndef _WM8285_H -#define _WM8285_H +#ifndef _CLEARWATER_H +#define _CLEARWATER_H #include "arizona.h" -#define WM8285_FLL1 1 -#define WM8285_FLL2 2 -#define WM8285_FLL1_REFCLK 3 -#define WM8285_FLL2_REFCLK 4 -#define WM8285_FLL3 5 -#define WM8285_FLL3_REFCLK 6 +#define CLEARWATER_FLL1 1 +#define CLEARWATER_FLL2 2 +#define CLEARWATER_FLL1_REFCLK 3 +#define CLEARWATER_FLL2_REFCLK 4 +#define CLEARWATER_FLL3 5 +#define CLEARWATER_FLL3_REFCLK 6 #endif From c28e9854d7d741addc31999be01140c64221f1d9 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 22 Dec 2014 18:16:53 +0000 Subject: [PATCH 0570/1167] gpio: arizona: rename wm8285 to clearwater Change-Id: I027a72b26338a273895357e0c2e7ca0087480343 Signed-off-by: Nikesh Oswal --- drivers/gpio/gpio-arizona.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/gpio/gpio-arizona.c b/drivers/gpio/gpio-arizona.c index 9d5ea3310c8..7750b93f198 100644 --- a/drivers/gpio/gpio-arizona.c +++ b/drivers/gpio/gpio-arizona.c @@ -85,18 +85,18 @@ static void arizona_gpio_set(struct gpio_chip *chip, unsigned offset, int value) ARIZONA_GPN_LVL, value); } -static int wm8285_gpio_direction_in(struct gpio_chip *chip, unsigned offset) +static int clearwater_gpio_direction_in(struct gpio_chip *chip, unsigned offset) { struct arizona_gpio *arizona_gpio = to_arizona_gpio(chip); struct arizona *arizona = arizona_gpio->arizona; offset *= 2; - return regmap_update_bits(arizona->regmap, WM8285_GPIO1_CTRL_2 + offset, + return regmap_update_bits(arizona->regmap, CLEARWATER_GPIO1_CTRL_2 + offset, ARIZONA_GPN_DIR, ARIZONA_GPN_DIR); } -static int wm8285_gpio_get(struct gpio_chip *chip, unsigned offset) +static int clearwater_gpio_get(struct gpio_chip *chip, unsigned offset) { struct arizona_gpio *arizona_gpio = to_arizona_gpio(chip); struct arizona *arizona = arizona_gpio->arizona; @@ -105,17 +105,17 @@ static int wm8285_gpio_get(struct gpio_chip *chip, unsigned offset) offset *= 2; - ret = regmap_read(arizona->regmap, WM8285_GPIO1_CTRL_1 + offset, &val); + ret = regmap_read(arizona->regmap, CLEARWATER_GPIO1_CTRL_1 + offset, &val); if (ret < 0) return ret; - if (val & WM8285_GPN_LVL) + if (val & CLEARWATER_GPN_LVL) return 1; else return 0; } -static int wm8285_gpio_direction_out(struct gpio_chip *chip, +static int clearwater_gpio_direction_out(struct gpio_chip *chip, unsigned offset, int value) { struct arizona_gpio *arizona_gpio = to_arizona_gpio(chip); @@ -125,18 +125,18 @@ static int wm8285_gpio_direction_out(struct gpio_chip *chip, offset *= 2; if (value) - value = WM8285_GPN_LVL; + value = CLEARWATER_GPN_LVL; - ret = regmap_update_bits(arizona->regmap, WM8285_GPIO1_CTRL_2 + offset, + ret = regmap_update_bits(arizona->regmap, CLEARWATER_GPIO1_CTRL_2 + offset, ARIZONA_GPN_DIR, 0); if (ret < 0) return ret; - return regmap_update_bits(arizona->regmap, WM8285_GPIO1_CTRL_1 + offset, - WM8285_GPN_LVL, value); + return regmap_update_bits(arizona->regmap, CLEARWATER_GPIO1_CTRL_1 + offset, + CLEARWATER_GPN_LVL, value); } -static void wm8285_gpio_set(struct gpio_chip *chip, unsigned offset, int value) +static void clearwater_gpio_set(struct gpio_chip *chip, unsigned offset, int value) { struct arizona_gpio *arizona_gpio = to_arizona_gpio(chip); struct arizona *arizona = arizona_gpio->arizona; @@ -144,10 +144,10 @@ static void wm8285_gpio_set(struct gpio_chip *chip, unsigned offset, int value) offset *= 2; if (value) - value = WM8285_GPN_LVL; + value = CLEARWATER_GPN_LVL; - regmap_update_bits(arizona->regmap, WM8285_GPIO1_CTRL_1 + offset, - WM8285_GPN_LVL, value); + regmap_update_bits(arizona->regmap, CLEARWATER_GPIO1_CTRL_1 + offset, + CLEARWATER_GPN_LVL, value); } static struct gpio_chip template_chip = { @@ -191,11 +191,11 @@ static int arizona_gpio_probe(struct platform_device *pdev) case WM8285: case WM1840: arizona_gpio->gpio_chip.direction_input = - wm8285_gpio_direction_in; - arizona_gpio->gpio_chip.get = wm8285_gpio_get; + clearwater_gpio_direction_in; + arizona_gpio->gpio_chip.get = clearwater_gpio_get; arizona_gpio->gpio_chip.direction_output = - wm8285_gpio_direction_out; - arizona_gpio->gpio_chip.set = wm8285_gpio_set; + clearwater_gpio_direction_out; + arizona_gpio->gpio_chip.set = clearwater_gpio_set; arizona_gpio->gpio_chip.ngpio = 40; break; From 07bfa97d2c7a24d9762a7d39f17c0ae30fb25ec9 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 22 Dec 2014 18:18:02 +0000 Subject: [PATCH 0571/1167] switch: arizona: rename wm8285 to clearwater Change-Id: I2a5cf413db9d9d62ca486cbc27bf124f4ff4f773 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 44 ++++++++++++++++----------------- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 1a999d9e8e2..a8dec92c8ec 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1058,8 +1058,8 @@ static int arizona_hpdet_moisture_start(struct arizona_extcon_info *info) break; default: regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, - WM8285_HP_RATE_MASK, - 0x2 << WM8285_HP_RATE_SHIFT); + CLEARWATER_HP_RATE_MASK, + 0x2 << CLEARWATER_HP_RATE_SHIFT); break; } @@ -1090,7 +1090,7 @@ static void arizona_hpdet_moisture_stop(struct arizona_extcon_info *info) break; default: regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, - WM8285_HP_RATE_MASK, 0); + CLEARWATER_HP_RATE_MASK, 0); break; } } @@ -1153,8 +1153,8 @@ int arizona_micd_start(struct arizona_extcon_info *info) default: dev_dbg(arizona->dev, "Disabling MICD_OVD\n"); regmap_update_bits(arizona->regmap, - WM8285_MICD_CLAMP_CONTROL, - WM8285_MICD_CLAMP_OVD_MASK, 0); + CLEARWATER_MICD_CLAMP_CONTROL, + CLEARWATER_MICD_CLAMP_OVD_MASK, 0); break; } } @@ -1238,9 +1238,9 @@ void arizona_micd_stop(struct arizona_extcon_info *info) default: dev_dbg(arizona->dev, "Enabling MICD_OVD\n"); regmap_update_bits(arizona->regmap, - WM8285_MICD_CLAMP_CONTROL, - WM8285_MICD_CLAMP_OVD_MASK, - WM8285_MICD_CLAMP_OVD); + CLEARWATER_MICD_CLAMP_CONTROL, + CLEARWATER_MICD_CLAMP_OVD_MASK, + CLEARWATER_MICD_CLAMP_OVD); break; } } @@ -1794,7 +1794,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) break; default: if (arizona->pdata.jd_gpio5) { - mask = WM8285_MICD_CLAMP_RISE_STS1; + mask = CLEARWATER_MICD_CLAMP_RISE_STS1; present = 0; } else { mask = ARIZONA_JD1_STS; @@ -1804,7 +1804,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) present = ARIZONA_JD1_STS; } - reg = WM8285_IRQ1_RAW_STATUS_7; + reg = CLEARWATER_IRQ1_RAW_STATUS_7; break; } @@ -1842,10 +1842,10 @@ static irqreturn_t arizona_jackdet(int irq, void *data) mask = ARIZONA_MICD_CLAMP_DB | ARIZONA_JD1_DB; break; default: - reg = WM8285_INTERRUPT_DEBOUNCE_7; - mask = WM8285_MICD_CLAMP_DB | WM8285_JD1_DB; + reg = CLEARWATER_INTERRUPT_DEBOUNCE_7; + mask = CLEARWATER_MICD_CLAMP_DB | CLEARWATER_JD1_DB; if (arizona->pdata.jd_gpio5) - mask |= WM8285_JD2_DB; + mask |= CLEARWATER_JD2_DB; break; } @@ -2165,12 +2165,12 @@ static void arizona_extcon_set_micd_clamp_mode(struct arizona *arizona) clamp_db_val = ARIZONA_MICD_CLAMP_DB; break; default: - clamp_ctrl_reg = WM8285_MICD_CLAMP_CONTROL; + clamp_ctrl_reg = CLEARWATER_MICD_CLAMP_CONTROL; clamp_ctrl_mask = ARIZONA_MICD_CLAMP_MODE_MASK; - clamp_db_reg = WM8285_INTERRUPT_DEBOUNCE_7; - clamp_db_mask = WM8285_MICD_CLAMP_DB; - clamp_db_val = WM8285_MICD_CLAMP_DB; + clamp_db_reg = CLEARWATER_INTERRUPT_DEBOUNCE_7; + clamp_db_mask = CLEARWATER_MICD_CLAMP_DB; + clamp_db_val = CLEARWATER_MICD_CLAMP_DB; break; } @@ -2360,7 +2360,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) reg = ARIZONA_GP_SWITCH_1; break; default: - reg = WM8285_GP_SWITCH_1; + reg = CLEARWATER_GP_SWITCH_1; break; } @@ -2564,13 +2564,13 @@ static int arizona_extcon_probe(struct platform_device *pdev) analog_val = ARIZONA_JD1_ENA; break; default: - debounce_reg = WM8285_INTERRUPT_DEBOUNCE_7; + debounce_reg = CLEARWATER_INTERRUPT_DEBOUNCE_7; if (arizona->pdata.jd_gpio5) { - debounce_val = WM8285_JD1_DB | WM8285_JD2_DB; + debounce_val = CLEARWATER_JD1_DB | CLEARWATER_JD2_DB; analog_val = ARIZONA_JD1_ENA | ARIZONA_JD2_ENA; } else { - debounce_val = WM8285_JD1_DB; + debounce_val = CLEARWATER_JD1_DB; analog_val = ARIZONA_JD1_ENA; } break; @@ -2642,7 +2642,7 @@ static int arizona_extcon_remove(struct platform_device *pdev) ARIZONA_MICD_CLAMP_MODE_MASK, 0); break; default: - regmap_update_bits(arizona->regmap, WM8285_MICD_CLAMP_CONTROL, + regmap_update_bits(arizona->regmap, CLEARWATER_MICD_CLAMP_CONTROL, ARIZONA_MICD_CLAMP_MODE_MASK, 0); break; } From e1b5bda21b8fe8216d44c53921390f359553e2ab Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 22 Dec 2014 18:18:39 +0000 Subject: [PATCH 0572/1167] extcon: arizona: rename wm8285 to clearwater Change-Id: I44d28c2854a2c447045217f43c1360a0401417be Signed-off-by: Nikesh Oswal --- drivers/extcon/extcon-arizona.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index b2aeb7e4ee7..2fe73d2bb81 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -1103,7 +1103,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) break; default: if (arizona->pdata.jd_gpio5) { - mask = WM8285_MICD_CLAMP_RISE_STS1; + mask = CLEARWATER_MICD_CLAMP_RISE_STS1; present = 0; } else { mask = ARIZONA_JD1_STS; @@ -1113,7 +1113,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) present = ARIZONA_JD1_STS; } - reg = WM8285_IRQ1_RAW_STATUS_7; + reg = CLEARWATER_IRQ1_RAW_STATUS_7; break; } @@ -1155,8 +1155,8 @@ static irqreturn_t arizona_jackdet(int irq, void *data) mask = ARIZONA_MICD_CLAMP_DB | ARIZONA_JD1_DB; break; default: - reg = WM8285_INTERRUPT_DEBOUNCE_7; - mask = WM8285_MICD_CLAMP_DB | WM8285_JD1_DB; + reg = CLEARWATER_INTERRUPT_DEBOUNCE_7; + mask = CLEARWATER_MICD_CLAMP_DB | CLEARWATER_JD1_DB; break; } @@ -1356,15 +1356,15 @@ static void arizona_extcon_set_micd_clamp_mode(struct arizona *arizona) clamp_db_val = ARIZONA_MICD_CLAMP_DB; break; default: - clamp_ctrl_reg = WM8285_MICD_CLAMP_CONTROL; + clamp_ctrl_reg = CLEARWATER_MICD_CLAMP_CONTROL; clamp_ctrl_mask = ARIZONA_MICD_CLAMP_MODE_MASK; - clamp_db_reg = WM8285_INTERRUPT_DEBOUNCE_7; - clamp_db_mask = WM8285_MICD_CLAMP_DB; - clamp_db_val = WM8285_MICD_CLAMP_DB; + clamp_db_reg = CLEARWATER_INTERRUPT_DEBOUNCE_7; + clamp_db_mask = CLEARWATER_MICD_CLAMP_DB; + clamp_db_val = CLEARWATER_MICD_CLAMP_DB; regmap_update_bits(arizona->regmap, - WM8285_MICD_CLAMP_CONTROL, + CLEARWATER_MICD_CLAMP_CONTROL, 0x10, 0); break; } @@ -1546,7 +1546,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) reg = ARIZONA_GP_SWITCH_1; break; default: - reg = WM8285_GP_SWITCH_1; + reg = CLEARWATER_GP_SWITCH_1; break; } @@ -1793,7 +1793,7 @@ static int arizona_extcon_remove(struct platform_device *pdev) ARIZONA_MICD_CLAMP_MODE_MASK, 0); break; default: - regmap_update_bits(arizona->regmap, WM8285_MICD_CLAMP_CONTROL, + regmap_update_bits(arizona->regmap, CLEARWATER_MICD_CLAMP_CONTROL, ARIZONA_MICD_CLAMP_MODE_MASK, 0); break; } From 4f1d5945018ece7de51b8a459a78c56fd4dbecea Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 19 Dec 2014 15:00:55 +0000 Subject: [PATCH 0573/1167] switch: arizona: Add support for additional software debounce Change-Id: I627fabd1ab292decb37f5a608f6c5b8ccd23057f Signed-off-by: Charles Keepax Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 36 +++++++++++++++++++++++++++++++ include/linux/mfd/arizona/pdata.h | 3 +++ 2 files changed, 39 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index a8dec92c8ec..d87461720cd 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -93,6 +93,9 @@ struct arizona_extcon_info { bool micd_reva; bool micd_clamp; + int micd_res_old; + int micd_debounce; + int micd_count; struct delayed_work hpdet_work; struct delayed_work micd_detect_work; @@ -1255,11 +1258,38 @@ int arizona_micd_button_reading(struct arizona_extcon_info *info, int val) { struct arizona *arizona = info->arizona; + int debounce_lim = arizona->pdata.micd_manual_debounce; int lvl, i, key; if (val < 0) return val; + if (debounce_lim) { + if (info->micd_debounce != val) + info->micd_count = 0; + + info->micd_debounce = val; + info->micd_count++; + + if (info->micd_count == debounce_lim) { + info->micd_count = 0; + if (val == info->micd_res_old) + return 0; + + info->micd_res_old = val; + } else { + dev_dbg(arizona->dev, "Software debounce: %d,%x\n", + info->micd_count, val); + regmap_update_bits(arizona->regmap, + ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, 0); + regmap_update_bits(arizona->regmap, + ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, ARIZONA_MICD_ENA); + return -EAGAIN; + } + } + if (val & MICD_LVL_0_TO_7) { dev_dbg(arizona->dev, "Mic button detected\n"); @@ -1888,6 +1918,9 @@ static irqreturn_t arizona_jackdet(int irq, void *data) info->hpdet_res[i] = 0; info->mic = false; info->hpdet_retried = false; + info->micd_res_old = 0; + info->micd_debounce = 0; + info->micd_count = 0; arizona->hp_impedance = 0; arizona_jds_set_state(info, NULL); @@ -1975,6 +2008,9 @@ static int arizona_extcon_of_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,micd-detect-debounce", false, &pdata->micd_detect_debounce); + arizona_of_read_u32(arizona, "wlf,micd-manual-debounce", false, + &pdata->micd_manual_debounce); + pdata->micd_pol_gpio = arizona_of_get_named_gpio(arizona, "wlf,micd-pol-gpio", false); diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 43462bc54c7..24bb13451b4 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -189,6 +189,9 @@ struct arizona_pdata { /** Extra debounce timeout used during initial mic detection (ms) */ int micd_detect_debounce; + /** Extra software debounces during button detection */ + int micd_manual_debounce; + /** GPIO for mic detection polarity */ int micd_pol_gpio; From dd8a5089320c4368b3ea4c1fa72d23a1e59d842c Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Sun, 21 Dec 2014 12:14:23 +0000 Subject: [PATCH 0574/1167] mfd: arizona: Don't set isolate bit for clearwater When DCVDD is externally supplied isolation is not needed for clearwater codecs Change-Id: Ic8e0a331351d3b150dd90cc4af74fea1ad62b4c6 Signed-off-by: Nikesh Oswal --- drivers/mfd/arizona-core.c | 46 ++++++++++++++++++++++++++++++-------- 1 file changed, 37 insertions(+), 9 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 146ba0f982b..ec359f13ce6 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -669,7 +669,11 @@ static int arizona_runtime_resume(struct device *dev) } } break; - default: + case WM8997: + case WM8998: + case WM1814: + case WM1831: + case CS47L24: if (arizona->pdata.reset && arizona->external_dcvdd) { gpio_set_value_cansleep(arizona->pdata.reset, 1); msleep(1); @@ -691,6 +695,17 @@ static int arizona_runtime_resume(struct device *dev) } } break; + default: + if (arizona->pdata.reset && arizona->external_dcvdd) { + gpio_set_value_cansleep(arizona->pdata.reset, 1); + msleep(1); + } + + ret = arizona_wait_for_boot(arizona); + if (ret != 0) { + goto err; + } + break; } ret = regcache_sync(arizona->regmap); @@ -734,14 +749,27 @@ static int arizona_runtime_suspend(struct device *dev) } if (arizona->external_dcvdd) { - ret = regmap_update_bits(arizona->regmap, - ARIZONA_ISOLATION_CONTROL, - ARIZONA_ISOLATE_DCVDD1, - ARIZONA_ISOLATE_DCVDD1); - if (ret != 0) { - dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", - ret); - goto err; + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8280: + case WM8998: + case WM1814: + case WM1831: + case CS47L24: + ret = regmap_update_bits(arizona->regmap, + ARIZONA_ISOLATION_CONTROL, + ARIZONA_ISOLATE_DCVDD1, + ARIZONA_ISOLATE_DCVDD1); + if (ret != 0) { + dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", + ret); + goto err; + } + break; + default: + break; } } else { switch (arizona->type) { From bc864db0dfad730d02843ba785893c736b4960c5 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 22 Dec 2014 08:48:10 +0000 Subject: [PATCH 0575/1167] mfd: arizona: handle mode settings for inputs This patch fixes the differential/single ended mode setting for clearwater inputs. Change-Id: If43c35711d6c6897efcfc0ab4dfc427b239f92cb Signed-off-by: Nikesh Oswal --- drivers/mfd/arizona-core.c | 46 +++++++++++++++++++++++-------- include/linux/mfd/arizona/pdata.h | 2 +- 2 files changed, 35 insertions(+), 13 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index ec359f13ce6..734d7a92ee2 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1382,7 +1382,7 @@ int arizona_dev_init(struct arizona *arizona) const char *type_name = "Unknown"; unsigned int reg, val, mask; int (*apply_patch)(struct arizona *) = NULL; - int ret, i; + int ret, i, max_inputs; char revision_char; dev_set_drvdata(arizona->dev, arizona); @@ -1825,7 +1825,25 @@ int arizona_dev_init(struct arizona *arizona) ARIZONA_MICB1_RATE, val); } - for (i = 0; i < ARIZONA_MAX_INPUT; i++) { + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8280: + case WM8998: + case WM1814: + case WM1831: + case CS47L24: + /* These arizona chips have only 4 inputs*/ + max_inputs = ARIZONA_MAX_INPUT - 2; + break; + default: + /*DMIC Ref for IN4-6 is fixed for WM8285/1840*/ + max_inputs = ARIZONA_MAX_INPUT - 3; + break; + } + + for (i = 0; i < max_inputs; i++) { /* Default for both is 0 so noop with defaults */ val = arizona->pdata.dmic_ref[i] << ARIZONA_IN1_DMIC_SUP_SHIFT; @@ -1833,8 +1851,20 @@ int arizona_dev_init(struct arizona *arizona) << (ARIZONA_IN1_MODE_SHIFT - 1); switch (arizona->type) { - case WM8998: - case WM1814: + case WM5102: + case WM5110: + case WM8997: + case WM8280: + case WM1831: + case CS47L24: + val |= (arizona->pdata.inmode[i] & 1) + << ARIZONA_IN1_SINGLE_ENDED_SHIFT; + + mask = ARIZONA_IN1_DMIC_SUP_MASK | + ARIZONA_IN1_MODE_MASK | + ARIZONA_IN1_SINGLE_ENDED_MASK; + break; + default: regmap_update_bits(arizona->regmap, ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 8), ARIZONA_IN1L_SRC_SE_MASK, @@ -1850,14 +1880,6 @@ int arizona_dev_init(struct arizona *arizona) mask = ARIZONA_IN1_DMIC_SUP_MASK | ARIZONA_IN1_MODE_MASK; break; - default: - val |= (arizona->pdata.inmode[i] & 1) - << ARIZONA_IN1_SINGLE_ENDED_SHIFT; - - mask = ARIZONA_IN1_DMIC_SUP_MASK | - ARIZONA_IN1_MODE_MASK | - ARIZONA_IN1_SINGLE_ENDED_MASK; - break; } regmap_update_bits(arizona->regmap, diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 24bb13451b4..a9fed540016 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -57,7 +57,7 @@ #define ARIZONA_32KZ_MCLK2 2 #define ARIZONA_32KZ_NONE 3 -#define ARIZONA_MAX_INPUT 4 +#define ARIZONA_MAX_INPUT 6 #define ARIZONA_DMIC_MICVDD 0 #define ARIZONA_DMIC_MICBIAS1 1 From c7f02019a773d13977e5871123354f59cf183bb8 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 22 Dec 2014 12:38:59 +0000 Subject: [PATCH 0576/1167] ASoC: arizona: Add function to set input mode Sometimes Inputs may have both analog and digital microphone connected. So in this case we need to select the input mode based on which microphone is enabled for a particular usecase. This change adds the necessary enums and functions to create an alsa control for input mode selection. Change-Id: I92e7e21050e6f49eb1e321ca380712a7096ef120 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 51 ++++++++++++++++++++++++++++++++++++++ sound/soc/codecs/arizona.h | 4 +++ 2 files changed, 55 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 5829949f449..eac21b37f18 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1360,6 +1360,57 @@ const struct soc_enum clearwater_output_anc_src_defs[] = { }; EXPORT_SYMBOL_GPL(clearwater_output_anc_src_defs); +const char *arizona_ip_mode_text[2] = { + "Analog", "Digital", +}; + +const struct soc_enum arizona_ip_mode[] = { + SOC_ENUM_SINGLE(ARIZONA_IN1L_CONTROL, ARIZONA_IN1_MODE_SHIFT, + ARRAY_SIZE(arizona_ip_mode_text), arizona_ip_mode_text), + SOC_ENUM_SINGLE(ARIZONA_IN2L_CONTROL, ARIZONA_IN2_MODE_SHIFT, + ARRAY_SIZE(arizona_ip_mode_text), arizona_ip_mode_text), + SOC_ENUM_SINGLE(ARIZONA_IN3L_CONTROL, ARIZONA_IN3_MODE_SHIFT, + ARRAY_SIZE(arizona_ip_mode_text), arizona_ip_mode_text), +}; +EXPORT_SYMBOL_GPL(arizona_ip_mode); + +int arizona_ip_mode_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + unsigned int reg, ret = 0; + + mutex_lock_nested(&codec->card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); + + /* Cannot change input mode on an active input*/ + reg = snd_soc_read(codec, ARIZONA_INPUT_ENABLES); + + switch (e->reg) { + case ARIZONA_IN1L_CONTROL: + if (reg & (ARIZONA_IN1L_ENA_MASK |ARIZONA_IN1R_ENA_MASK)) + return -EBUSY; + break; + case ARIZONA_IN2L_CONTROL: + if (reg & (ARIZONA_IN2L_ENA_MASK |ARIZONA_IN2R_ENA_MASK)) + return -EBUSY; + break; + case ARIZONA_IN3L_CONTROL: + if (reg & (ARIZONA_IN3L_ENA_MASK |ARIZONA_IN3R_ENA_MASK)) + return -EBUSY; + break; + default: + return -EINVAL; + break; + } + + ret = snd_soc_put_enum_double(kcontrol, ucontrol); + mutex_unlock(&codec->card->dapm_mutex); + + return ret; +} +EXPORT_SYMBOL_GPL(arizona_ip_mode_put); + static void arizona_in_set_vu(struct snd_soc_codec *codec, int ena) { struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 05cf2eec7fa..d907fed50e7 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -287,6 +287,10 @@ extern const struct soc_enum arizona_anc_input_src[]; extern const struct soc_enum clearwater_anc_input_src[]; extern const struct soc_enum arizona_output_anc_src[]; extern const struct soc_enum clearwater_output_anc_src_defs[]; +extern const struct soc_enum arizona_ip_mode[]; + +extern int arizona_ip_mode_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); extern int arizona_put_anc_input(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); From 4593fd9bcda29db4d6e8298972f9a1b5ded81ee1 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 22 Dec 2014 12:43:01 +0000 Subject: [PATCH 0577/1167] ASoC: clearwater: Add alsa controls for input mode Change-Id: Ibc604806858b2698f6e297c7a4a68e63f9775a77 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/clearwater.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 56501bdfbaa..3fbe452dd16 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -371,6 +371,13 @@ SOC_SINGLE_TLV("IN6L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_6L, SOC_SINGLE_TLV("IN6R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_6R, ARIZONA_IN6R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_ENUM_EXT("IN1 Mode", arizona_ip_mode[0], + snd_soc_get_enum_double, arizona_ip_mode_put), +SOC_ENUM_EXT("IN2 Mode", arizona_ip_mode[1], + snd_soc_get_enum_double, arizona_ip_mode_put), +SOC_ENUM_EXT("IN3 Mode", arizona_ip_mode[2], + snd_soc_get_enum_double, arizona_ip_mode_put), + SOC_ENUM("Input Ramp Up", arizona_in_vi_ramp), SOC_ENUM("Input Ramp Down", arizona_in_vd_ramp), From 17344161e74cbf8e7d1ca454429dc8d4f5f8a61a Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 24 Dec 2014 08:44:06 +0000 Subject: [PATCH 0578/1167] ASoC: arizona: release mutex before exiting fix the mutex handling in arizona_ip_mode_put function Change-Id: Iead28d8710b0c0f2667fc10e8f562566be0bb378 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index eac21b37f18..45f4b508218 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1388,25 +1388,32 @@ int arizona_ip_mode_put(struct snd_kcontrol *kcontrol, switch (e->reg) { case ARIZONA_IN1L_CONTROL: - if (reg & (ARIZONA_IN1L_ENA_MASK |ARIZONA_IN1R_ENA_MASK)) - return -EBUSY; + if (reg & (ARIZONA_IN1L_ENA_MASK |ARIZONA_IN1R_ENA_MASK)) { + ret = -EBUSY; + goto exit; + } break; case ARIZONA_IN2L_CONTROL: - if (reg & (ARIZONA_IN2L_ENA_MASK |ARIZONA_IN2R_ENA_MASK)) - return -EBUSY; + if (reg & (ARIZONA_IN2L_ENA_MASK |ARIZONA_IN2R_ENA_MASK)) { + ret = -EBUSY; + goto exit; + } break; case ARIZONA_IN3L_CONTROL: - if (reg & (ARIZONA_IN3L_ENA_MASK |ARIZONA_IN3R_ENA_MASK)) - return -EBUSY; + if (reg & (ARIZONA_IN3L_ENA_MASK |ARIZONA_IN3R_ENA_MASK)) { + ret = -EBUSY; + goto exit; + } break; default: - return -EINVAL; + ret = -EINVAL; + goto exit; break; } ret = snd_soc_put_enum_double(kcontrol, ucontrol); +exit: mutex_unlock(&codec->card->dapm_mutex); - return ret; } EXPORT_SYMBOL_GPL(arizona_ip_mode_put); From e9f7e32904427845044fb87ee3dd8e47f9ddf538 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 23 Dec 2014 12:24:55 +0000 Subject: [PATCH 0579/1167] mfd: clearwater: apply patch only for revA and revA+ This patch fixes the code which was applying a patch meant for RevA/A+ to RevB chips as well. Change-Id: I3b215d5f849150191c9c45f46b9829270ff461e2 Signed-off-by: Nikesh Oswal --- drivers/mfd/clearwater-tables.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index 21049f71439..a76dce123ca 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -50,10 +50,13 @@ static const struct reg_default clearwater_reva_patch[] = { int clearwater_patch(struct arizona *arizona) { switch (arizona->rev) { - default: + case 0: + case 1: return regmap_register_patch(arizona->regmap, clearwater_reva_patch, ARRAY_SIZE(clearwater_reva_patch)); + default: + break; } return 0; From 4696e2b39768b7238f7f44c84043aef479dcf8aa Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 23 Dec 2014 12:39:54 +0000 Subject: [PATCH 0580/1167] mfd: clearwater: For EDRE add RevA patch RevA versions of Clearwater requires a patch to be applied on bootup and everytime the codec is reset or DCVDD is re-enabled Change-Id: If949244bc1deecb54625cefd09800c4d5a8472a7 Signed-off-by: Nikesh Oswal --- drivers/mfd/arizona-core.c | 18 ++ drivers/mfd/clearwater-tables.c | 272 ++++++++++++++++++++++++++++++- include/linux/mfd/arizona/core.h | 1 + 3 files changed, 287 insertions(+), 4 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 734d7a92ee2..5fac200f025 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -714,6 +714,15 @@ static int arizona_runtime_resume(struct device *dev) goto err; } +#ifdef CONFIG_MFD_CLEARWATER + if (arizona->type == WM8285 || arizona->type == WM1840) { + ret = clearwater_patch_32(arizona); + if (ret != 0) { + dev_err(arizona->dev, "Failed to apply 32 bit register patch\n"); + goto err; + } + } +#endif ret = arizona_restore_dvfs(arizona); if (ret < 0) goto err; @@ -1532,6 +1541,15 @@ int arizona_dev_init(struct arizona *arizona) dev_err(dev, "Failed to sync device: %d\n", ret); goto err_reset; } +#ifdef CONFIG_MFD_CLEARWATER + if (arizona->type == WM8285 || arizona->type == WM1840) { + ret = clearwater_patch_32(arizona); + if (ret != 0) { + dev_err(arizona->dev, "Failed to apply 32 bit register patch\n"); + goto err_reset; + } + } +#endif } /* Ensure device startup is complete */ diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index a76dce123ca..f94f52d7c1f 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -18,7 +18,7 @@ #include "arizona.h" -static const struct reg_default clearwater_reva_patch[] = { +static const struct reg_default clearwater_reva_16_patch[] = { { 0x80, 0x0003 }, { 0x213, 0x03E4 }, { 0x177, 0x0281 }, @@ -46,15 +46,279 @@ static const struct reg_default clearwater_reva_patch[] = { { 0x80, 0x0000 }, }; +/* this patch is required for EDRE on RevA*/ +static const struct reg_default clearwater_reva_32_patch[] = { + { 0x3000, 0xC2253632}, + { 0x3002, 0xC2300001}, + { 0x3004, 0x8225100E}, + { 0x3006, 0x22251803}, + { 0x3008, 0x82310B00}, + { 0x300A, 0xE231023B}, + { 0x300C, 0x2313B01}, + { 0x300E, 0x62300000}, + { 0x3010, 0xE2314288}, + { 0x3012, 0x2310B00}, + { 0x3014, 0x2310B00}, + { 0x3016, 0x4050100}, + { 0x3018, 0x42310C02}, + { 0x301A, 0xE2310227}, + { 0x301C, 0x2313B01}, + { 0x301E, 0xE2314266}, + { 0x3020, 0xE2315294}, + { 0x3022, 0x2310B00}, + { 0x3024, 0x2310B00}, + { 0x3026, 0x2251100}, + { 0x3028, 0x2251401}, + { 0x302A, 0x2250200}, + { 0x302C, 0x2251001}, + { 0x302E, 0x2250200}, + { 0x3030, 0xE2310266}, + { 0x3032, 0x82314B15}, + { 0x3034, 0x82310B15}, + { 0x3036, 0xE2315294}, + { 0x3038, 0x2310B00}, + { 0x303A, 0x8225160D}, + { 0x303C, 0x225F501}, + { 0x303E, 0x8225061C}, + { 0x3040, 0x2251000}, + { 0x3042, 0x4051101}, + { 0x3044, 0x2251800}, + { 0x3046, 0x42251203}, + { 0x3048, 0x2251101}, + { 0x304A, 0xC2251300}, + { 0x304C, 0x2225FB02}, + { 0x3050, 0xC2263632}, + { 0x3052, 0xC2300001}, + { 0x3054, 0x8226100E}, + { 0x3056, 0x22261803}, + { 0x3058, 0x82310B02}, + { 0x305A, 0xE231023B}, + { 0x305C, 0x2313B01}, + { 0x305E, 0x62300000}, + { 0x3060, 0xE2314288}, + { 0x3062, 0x2310B00}, + { 0x3064, 0x2310B00}, + { 0x3066, 0x4050000}, + { 0x3068, 0x42310C03}, + { 0x306A, 0xE2310227}, + { 0x306C, 0x2313B01}, + { 0x306E, 0xE2314266}, + { 0x3070, 0xE2315294}, + { 0x3072, 0x2310B00}, + { 0x3074, 0x2310B00}, + { 0x3076, 0x2261100}, + { 0x3078, 0x2261401}, + { 0x307A, 0x2260200}, + { 0x307C, 0x2261001}, + { 0x307E, 0x2260200}, + { 0x3080, 0xE2310266}, + { 0x3082, 0x82314B17}, + { 0x3084, 0x82310B17}, + { 0x3086, 0xE2315294}, + { 0x3088, 0x2310B00}, + { 0x308A, 0x8226160D}, + { 0x308C, 0x226F501}, + { 0x308E, 0x8226061C}, + { 0x3090, 0x2261000}, + { 0x3092, 0x4051101}, + { 0x3094, 0x2261800}, + { 0x3096, 0x42261203}, + { 0x3098, 0x2261101}, + { 0x309A, 0xC2261300}, + { 0x309C, 0x2226FB02}, + { 0x309E, 0xF000}, + { 0x30A0, 0xC2273632}, + { 0x30A2, 0xC2400001}, + { 0x30A4, 0x8227100E}, + { 0x30A6, 0x22271803}, + { 0x30A8, 0x82410B00}, + { 0x30AA, 0xE241023B}, + { 0x30AC, 0x2413B01}, + { 0x30AE, 0x62400000}, + { 0x30B0, 0xE2414288}, + { 0x30B2, 0x2410B00}, + { 0x30B4, 0x2410B00}, + { 0x30B6, 0x4050300}, + { 0x30B8, 0x42410C02}, + { 0x30BA, 0xE2410227}, + { 0x30BC, 0x2413B01}, + { 0x30BE, 0xE2414266}, + { 0x30C0, 0xE2415294}, + { 0x30C2, 0x2410B00}, + { 0x30C4, 0x2410B00}, + { 0x30C6, 0x2271100}, + { 0x30C8, 0x2271401}, + { 0x30CA, 0x2270200}, + { 0x30CC, 0x2271001}, + { 0x30CE, 0x2270200}, + { 0x30D0, 0xE2410266}, + { 0x30D2, 0x82414B15}, + { 0x30D4, 0x82410B15}, + { 0x30D6, 0xE2415294}, + { 0x30D8, 0x2410B00}, + { 0x30DA, 0x8227160D}, + { 0x30DC, 0x227F501}, + { 0x30DE, 0x8227061C}, + { 0x30E0, 0x2271000}, + { 0x30E2, 0x4051101}, + { 0x30E4, 0x2271800}, + { 0x30E6, 0x42271203}, + { 0x30E8, 0x2271101}, + { 0x30EA, 0xC2271300}, + { 0x30EC, 0x2227FB02}, + { 0x30F0, 0xC2283632}, + { 0x30F2, 0xC2400001}, + { 0x30F4, 0x8228100E}, + { 0x30F6, 0x22281803}, + { 0x30F8, 0x82410B02}, + { 0x30FA, 0xE241023B}, + { 0x30FC, 0x2413B01}, + { 0x30FE, 0x62400000}, + { 0x3100, 0xE2414288}, + { 0x3102, 0x2410B00}, + { 0x3104, 0x2410B00}, + { 0x3106, 0x4050200}, + { 0x3108, 0x42410C03}, + { 0x310A, 0xE2410227}, + { 0x310C, 0x2413B01}, + { 0x310E, 0xE2414266}, + { 0x3110, 0xE2415294}, + { 0x3112, 0x2410B00}, + { 0x3114, 0x2410B00}, + { 0x3116, 0x2281100}, + { 0x3118, 0x2281401}, + { 0x311A, 0x2280200}, + { 0x311C, 0x2281001}, + { 0x311E, 0x2280200}, + { 0x3120, 0xE2410266}, + { 0x3122, 0x82414B17}, + { 0x3124, 0x82410B17}, + { 0x3126, 0xE2415294}, + { 0x3128, 0x2410B00}, + { 0x312A, 0x8228160D}, + { 0x312C, 0x228F501}, + { 0x312E, 0x8228061C}, + { 0x3130, 0x2281000}, + { 0x3132, 0x4051101}, + { 0x3134, 0x2281800}, + { 0x3136, 0x42281203}, + { 0x3138, 0x2281101}, + { 0x313A, 0xC2281300}, + { 0x313C, 0x2228FB02}, + { 0x3140, 0xC2293632}, + { 0x3142, 0xC2500001}, + { 0x3144, 0x8229100E}, + { 0x3146, 0x22291803}, + { 0x3148, 0x82510B00}, + { 0x314A, 0xE251023B}, + { 0x314C, 0x2513B01}, + { 0x314E, 0x62500000}, + { 0x3150, 0xE2514288}, + { 0x3152, 0x2510B00}, + { 0x3154, 0x2510B00}, + { 0x3156, 0x4050500}, + { 0x3158, 0x42510C02}, + { 0x315A, 0xE2510227}, + { 0x315C, 0x2513B01}, + { 0x315E, 0xE2514266}, + { 0x3160, 0xE2515294}, + { 0x3162, 0x2510B00}, + { 0x3164, 0x2510B00}, + { 0x3166, 0x2291100}, + { 0x3168, 0x2291401}, + { 0x316A, 0x2290200}, + { 0x316C, 0x2291001}, + { 0x316E, 0x2290200}, + { 0x3170, 0xE2510266}, + { 0x3172, 0x82514B15}, + { 0x3174, 0x82510B15}, + { 0x3176, 0xE2515294}, + { 0x3178, 0x2510B00}, + { 0x317A, 0x8229160D}, + { 0x317C, 0x229F501}, + { 0x317E, 0x8229061C}, + { 0x3180, 0x2291000}, + { 0x3182, 0x4051101}, + { 0x3184, 0x2291800}, + { 0x3186, 0x42291203}, + { 0x3188, 0x2291101}, + { 0x318A, 0xC2291300}, + { 0x318C, 0x2229FB02}, + { 0x3190, 0xC22A3632}, + { 0x3192, 0xC2500001}, + { 0x3194, 0x822A100E}, + { 0x3196, 0x222A1803}, + { 0x3198, 0x82510B02}, + { 0x319A, 0xE251023B}, + { 0x319C, 0x2513B01}, + { 0x319E, 0x62500000}, + { 0x31A0, 0xE2514288}, + { 0x31A2, 0x2510B00}, + { 0x31A4, 0x2510B00}, + { 0x31A6, 0x4050400}, + { 0x31A8, 0x42510C03}, + { 0x31AA, 0xE2510227}, + { 0x31AC, 0x2513B01}, + { 0x31AE, 0xE2514266}, + { 0x31B0, 0xE2515294}, + { 0x31B2, 0x2510B00}, + { 0x31B4, 0x2510B00}, + { 0x31B6, 0x22A1100}, + { 0x31B8, 0x22A1401}, + { 0x31BA, 0x22A0200}, + { 0x31BC, 0x22A1001}, + { 0x31BE, 0x22A0200}, + { 0x31C0, 0xE2510266}, + { 0x31C2, 0x82514B17}, + { 0x31C4, 0x82510B17}, + { 0x31C6, 0xE2515294}, + { 0x31C8, 0x2510B00}, + { 0x31CA, 0x822A160D}, + { 0x31CC, 0x22AF501}, + { 0x31CE, 0x822A061C}, + { 0x31D0, 0x22A1000}, + { 0x31D2, 0x4051101}, + { 0x31D4, 0x22A1800}, + { 0x31D6, 0x422A1203}, + { 0x31D8, 0x22A1101}, + { 0x31DA, 0xC22A1300}, + { 0x31DC, 0x222AFB02}, +}; + +int clearwater_patch_32(struct arizona *arizona) +{ + switch (arizona->rev) { + case 0: + case 1: + return regmap_multi_reg_write_bypassed(arizona->regmap_32bit, + clearwater_reva_32_patch, + ARRAY_SIZE(clearwater_reva_32_patch)); + default: + return 0; + } +} +EXPORT_SYMBOL_GPL(clearwater_patch_32); + /* We use a function so we can use ARRAY_SIZE() */ int clearwater_patch(struct arizona *arizona) { + int ret = 0; + switch (arizona->rev) { case 0: case 1: - return regmap_register_patch(arizona->regmap, - clearwater_reva_patch, - ARRAY_SIZE(clearwater_reva_patch)); + ret = regmap_register_patch(arizona->regmap, + clearwater_reva_16_patch, + ARRAY_SIZE(clearwater_reva_16_patch)); + if (ret < 0) { + dev_err(arizona->dev, "Error in applying Clearwater Rev A 16 bit patch\n"); + return ret; + } + ret = clearwater_patch_32(arizona); + if (ret < 0) { + dev_err(arizona->dev, "Error in applying Clearwater Rev A 32 bit patch\n"); + return ret; + } default: break; } diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 0bdaa1b36e8..8c4f2286240 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -187,6 +187,7 @@ int florida_patch(struct arizona *arizona); int wm8997_patch(struct arizona *arizona); int wm8998_patch(struct arizona *arizona); int clearwater_patch(struct arizona *arizona); +int clearwater_patch_32(struct arizona *arizona); int cs47l24_patch(struct arizona *arizona); extern int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, From d9b786fa7d52759875d9266e29af39556c6cc13a Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 30 Dec 2014 11:55:09 +0000 Subject: [PATCH 0581/1167] ASoC: clearwater: add mode control for charge pump Change-Id: I33768ab298bad9c66f81f1b9bc3871ad55e570e9 Signed-off-by: Nikesh Oswal --- drivers/mfd/clearwater-tables.c | 1 + include/linux/mfd/arizona/registers.h | 1 + sound/soc/codecs/clearwater.c | 55 +++++++++++++++++++++++++++ 3 files changed, 57 insertions(+) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index f94f52d7c1f..10dfb466669 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -1970,6 +1970,7 @@ static bool clearwater_16bit_readable_register(struct device *dev, unsigned int case ARIZONA_FLL3_SPREAD_SPECTRUM: case ARIZONA_FLL3_GPIO_CLOCK: case ARIZONA_MIC_CHARGE_PUMP_1: + case CLEARWATER_CP_MODE: case ARIZONA_LDO1_CONTROL_1: case ARIZONA_LDO2_CONTROL_1: case ARIZONA_MIC_BIAS_CTRL_1: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 810ff681e4c..d8c29a5cb53 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -141,6 +141,7 @@ #define ARIZONA_FLL3_SPREAD_SPECTRUM 0x1C9 #define ARIZONA_FLL3_GPIO_CLOCK 0x1CA #define ARIZONA_MIC_CHARGE_PUMP_1 0x200 +#define CLEARWATER_CP_MODE 0x20B #define ARIZONA_LDO1_CONTROL_1 0x210 #define ARIZONA_LDO1_CONTROL_2 0x212 #define ARIZONA_LDO2_CONTROL_1 0x213 diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 3fbe452dd16..3918153b0b2 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -298,6 +298,59 @@ static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); { name " ANC Source", "RXANCL", "RXANCL" }, \ { name " ANC Source", "RXANCR", "RXANCR" } +int clearwater_cp_mode_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; + unsigned int val; + + regmap_read(arizona->regmap, CLEARWATER_CP_MODE, &val); + if (val == 0x400) + ucontrol->value.enumerated.item[0] = 0; + else + ucontrol->value.enumerated.item[0] = 1; + + return 0; +} + +int clearwater_cp_mode_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + unsigned int val = ucontrol->value.enumerated.item[0]; + + if (val > e->max - 1) + return -EINVAL; + + mutex_lock(&codec->mutex); + if (val ==0) { /* Default */ + regmap_write(arizona->regmap, 0x80, 0x1); + regmap_write(arizona->regmap, CLEARWATER_CP_MODE, 0x400); + regmap_write(arizona->regmap, 0x80, 0x0); + } else {/* Inverting */ + regmap_write(arizona->regmap, 0x80, 0x1); + regmap_write(arizona->regmap, CLEARWATER_CP_MODE, 0x407); + regmap_write(arizona->regmap, 0x80, 0x0); + } + mutex_unlock(&codec->mutex); + + return 0; +} + +const char *clearwater_cp_mode_text[2] = { + "Default", "Inverting", +}; + +const struct soc_enum clearwater_cp_mode[] = { + SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(clearwater_cp_mode_text), + clearwater_cp_mode_text), +}; + static const struct snd_kcontrol_new clearwater_snd_controls[] = { SOC_VALUE_ENUM("IN1 OSR", clearwater_in_dmic_osr[0]), SOC_VALUE_ENUM("IN2 OSR", clearwater_in_dmic_osr[1]), @@ -377,6 +430,8 @@ SOC_ENUM_EXT("IN2 Mode", arizona_ip_mode[1], snd_soc_get_enum_double, arizona_ip_mode_put), SOC_ENUM_EXT("IN3 Mode", arizona_ip_mode[2], snd_soc_get_enum_double, arizona_ip_mode_put), +SOC_ENUM_EXT("CP Mode", clearwater_cp_mode[0], + clearwater_cp_mode_get, clearwater_cp_mode_put), SOC_ENUM("Input Ramp Up", arizona_in_vi_ramp), SOC_ENUM("Input Ramp Down", arizona_in_vd_ramp), From ce98eaa3117e34c99c1c5112fd9badac9aed8922 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 24 Dec 2014 09:10:26 +0000 Subject: [PATCH 0582/1167] mfd: arizona: handle INxL and INxR settings for clearwater chips SingleEnded/Differential mode settings can be different for INxL and INxR this patch handles that. So for clearwater input settings are specified in pdata as [INxL, INxR, INyL, INyR...] and for other chips its specified as [INx, INy...]. Change-Id: Ie1ad264221c85a330438db99e18bf8c05a92a283 Signed-off-by: Nikesh Oswal --- drivers/mfd/arizona-core.c | 48 ++++++++++++++++++++++--------- include/linux/mfd/arizona/pdata.h | 2 +- 2 files changed, 35 insertions(+), 15 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 5fac200f025..386917fc2f5 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1852,22 +1852,18 @@ int arizona_dev_init(struct arizona *arizona) case WM1814: case WM1831: case CS47L24: - /* These arizona chips have only 4 inputs*/ - max_inputs = ARIZONA_MAX_INPUT - 2; + /* These arizona chips have only 4 inputs and + settings for INxL and INxR are same*/ + max_inputs = ARIZONA_MAX_INPUT / 2 - 2; break; default: - /*DMIC Ref for IN4-6 is fixed for WM8285/1840*/ - max_inputs = ARIZONA_MAX_INPUT - 3; + /*DMIC Ref for IN4-6 is fixed for WM8285/1840 and + settings for INxL and INxR are different*/ + max_inputs = ARIZONA_MAX_INPUT / 2 - 3; break; } for (i = 0; i < max_inputs; i++) { - /* Default for both is 0 so noop with defaults */ - val = arizona->pdata.dmic_ref[i] - << ARIZONA_IN1_DMIC_SUP_SHIFT; - val |= (arizona->pdata.inmode[i] & 2) - << (ARIZONA_IN1_MODE_SHIFT - 1); - switch (arizona->type) { case WM5102: case WM5110: @@ -1875,28 +1871,52 @@ int arizona_dev_init(struct arizona *arizona) case WM8280: case WM1831: case CS47L24: + val = arizona->pdata.dmic_ref[i] + << ARIZONA_IN1_DMIC_SUP_SHIFT; + val |= (arizona->pdata.inmode[i] & 2) + << (ARIZONA_IN1_MODE_SHIFT - 1); val |= (arizona->pdata.inmode[i] & 1) << ARIZONA_IN1_SINGLE_ENDED_SHIFT; - mask = ARIZONA_IN1_DMIC_SUP_MASK | ARIZONA_IN1_MODE_MASK | ARIZONA_IN1_SINGLE_ENDED_MASK; break; - default: + case WM8998: + case WM1814: + val = arizona->pdata.dmic_ref[i] + << ARIZONA_IN1_DMIC_SUP_SHIFT; + val |= (arizona->pdata.inmode[i] & 2) + << (ARIZONA_IN1_MODE_SHIFT - 1); + mask = ARIZONA_IN1_DMIC_SUP_MASK | + ARIZONA_IN1_MODE_MASK; regmap_update_bits(arizona->regmap, ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 8), ARIZONA_IN1L_SRC_SE_MASK, (arizona->pdata.inmode[i] & 1) << ARIZONA_IN1L_SRC_SE_SHIFT); - regmap_update_bits(arizona->regmap, ARIZONA_ADC_DIGITAL_VOLUME_1R + (i * 8), ARIZONA_IN1R_SRC_SE_MASK, (arizona->pdata.inmode[i] & 1) << ARIZONA_IN1R_SRC_SE_SHIFT); - + break; + default: + val = arizona->pdata.dmic_ref[2*i] + << ARIZONA_IN1_DMIC_SUP_SHIFT; + val |= (arizona->pdata.inmode[2*i] & 2) + << (ARIZONA_IN1_MODE_SHIFT - 1); mask = ARIZONA_IN1_DMIC_SUP_MASK | ARIZONA_IN1_MODE_MASK; + regmap_update_bits(arizona->regmap, + ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 8), + ARIZONA_IN1L_SRC_SE_MASK, + (arizona->pdata.inmode[2*i] & 1) + << ARIZONA_IN1L_SRC_SE_SHIFT); + regmap_update_bits(arizona->regmap, + ARIZONA_ADC_DIGITAL_VOLUME_1R + (i * 8), + ARIZONA_IN1R_SRC_SE_MASK, + (arizona->pdata.inmode[(2*i) + 1] & 1) + << ARIZONA_IN1R_SRC_SE_SHIFT); break; } diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index a9fed540016..a924d47ed94 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -57,7 +57,7 @@ #define ARIZONA_32KZ_MCLK2 2 #define ARIZONA_32KZ_NONE 3 -#define ARIZONA_MAX_INPUT 6 +#define ARIZONA_MAX_INPUT 12 #define ARIZONA_DMIC_MICVDD 0 #define ARIZONA_DMIC_MICBIAS1 1 From fd6f13ffc75c1e6389f625e7f15cb37ffa854f9b Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 24 Dec 2014 09:40:26 +0000 Subject: [PATCH 0583/1167] mfd: arizona: handle variable number of enteries for input settings The number of entries for input settings will be different between clearwater and other arizona chips. This patch handles variable number of entries entered in device tree. Change-Id: I7c7c4c8eb16e363dadcc89d299bf145ee2e49b10 Signed-off-by: Nikesh Oswal --- drivers/mfd/arizona-core.c | 48 ++++++++++++++++++++++++++++++++++---- 1 file changed, 44 insertions(+), 4 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 386917fc2f5..2fd7eafe212 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -963,6 +963,48 @@ static int arizona_of_get_max_channels(struct arizona *arizona, return 0; } +static int arizona_of_get_inmode(struct arizona *arizona, + const char *prop) +{ + struct arizona_pdata *pdata = &arizona->pdata; + struct device_node *np = arizona->dev->of_node; + struct property *tempprop; + const __be32 *cur; + u32 val; + int i; + + i = 0; + of_property_for_each_u32(np, prop, tempprop, cur, val) { + if (i == ARRAY_SIZE(pdata->inmode)) + break; + + pdata->inmode[i++] = val; + } + + return 0; +} + +static int arizona_of_get_dmicref(struct arizona *arizona, + const char *prop) +{ + struct arizona_pdata *pdata = &arizona->pdata; + struct device_node *np = arizona->dev->of_node; + struct property *tempprop; + const __be32 *cur; + u32 val; + int i; + + i = 0; + of_property_for_each_u32(np, prop, tempprop, cur, val) { + if (i == ARRAY_SIZE(pdata->dmic_ref)) + break; + + pdata->dmic_ref[i++] = val; + } + + return 0; +} + static int arizona_of_get_gpio_defaults(struct arizona *arizona, const char *prop) { @@ -1155,11 +1197,9 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) arizona_of_get_max_channels(arizona, "wlf,max-channels-clocked"); - arizona_of_read_u32_array(arizona, "wlf,dmic-ref", false, - pdata->dmic_ref, ARRAY_SIZE(pdata->dmic_ref)); + arizona_of_get_dmicref(arizona, "wlf,dmic-ref"); - arizona_of_read_u32_array(arizona, "wlf,inmode", false, - pdata->inmode, ARRAY_SIZE(pdata->inmode)); + arizona_of_get_inmode(arizona, "wlf,inmode"); arizona_of_read_u32_array(arizona, "wlf,out-mono", false, out_mono, ARRAY_SIZE(out_mono)); From d3debff3104ec3c6f2ea6564b9eb1074f7ad18f5 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Mon, 3 Nov 2014 16:23:31 +0000 Subject: [PATCH 0584/1167] ASoC: clearwater: Add EDRE controls Change-Id: Iedb7020430b9e41b62dd82a975f6922dfc9cd4a6 Signed-off-by: Nariman Poushin Signed-off-by: Nikesh Oswal --- sound/soc/codecs/clearwater.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 3918153b0b2..bfe83299742 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -663,6 +663,28 @@ SOC_DOUBLE("HPOUT2 DRE Switch", ARIZONA_DRE_ENABLE, SOC_DOUBLE("HPOUT3 DRE Switch", ARIZONA_DRE_ENABLE, ARIZONA_DRE3L_ENA_SHIFT, ARIZONA_DRE3R_ENA_SHIFT, 1, 0), +SOC_DOUBLE("HPOUT1 EDRE Switch", CLEARWATER_EDRE_ENABLE, + CLEARWATER_EDRE_OUT1L_THR1_ENA_SHIFT, + CLEARWATER_EDRE_OUT1R_THR1_ENA_SHIFT, 1, 0), +SOC_DOUBLE("HPOUT2 EDRE Switch", CLEARWATER_EDRE_ENABLE, + CLEARWATER_EDRE_OUT2L_THR1_ENA_SHIFT, + CLEARWATER_EDRE_OUT2R_THR1_ENA_SHIFT, 1, 0), +SOC_DOUBLE("HPOUT3 EDRE Switch", CLEARWATER_EDRE_ENABLE, + CLEARWATER_EDRE_OUT3L_THR1_ENA_SHIFT, + CLEARWATER_EDRE_OUT3R_THR1_ENA_SHIFT, 1, 0), + +SOC_DOUBLE("Speaker THR1 EDRE Switch", CLEARWATER_EDRE_ENABLE, + CLEARWATER_EDRE_OUT4L_THR1_ENA_SHIFT, + CLEARWATER_EDRE_OUT4R_THR1_ENA_SHIFT, 1, 0), +SOC_DOUBLE("Speaker THR2 EDRE Switch", CLEARWATER_EDRE_ENABLE, + CLEARWATER_EDRE_OUT4L_THR2_ENA_SHIFT, + CLEARWATER_EDRE_OUT4R_THR2_ENA_SHIFT, 1, 0), +SOC_DOUBLE("Speaker THR3 EDRE Switch", CLEARWATER_EDRE_ENABLE, + CLEARWATER_EDRE_OUT4L_THR3_ENA_SHIFT, + CLEARWATER_EDRE_OUT4R_THR3_ENA_SHIFT, 1, 0), + + + SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp), SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp), From edfcc50dd320ded4d8e759e5673290dd9b583024 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Sat, 27 Dec 2014 20:27:26 +0000 Subject: [PATCH 0585/1167] switch: arizona: handle mic impedance mesaurement in adc mode earlier code was handling adc mode only if it is set via pdata but a custom jack detection state machine can also use adc mode for measuring mic impedance, this patch handles that case. Change-Id: I2109de2e9c921fa19acf10fc2f43f2007f1655f5 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index d87461720cd..34751143d8e 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -409,7 +409,10 @@ static int arizona_micd_read(struct arizona_extcon_info *info) unsigned int val = 0; int ret, i; - if (info->detecting && arizona->pdata.micd_software_compare) { + regmap_read(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, &val); + val &= ARIZONA_ACCDET_MODE_MASK; + + if ((info->detecting) && (val == ARIZONA_ACCDET_MODE_ADC)) { bool micd_ena; unsigned int micd_ena_bit; From 938f1c5a98a8e87deefda26c24d4b95d795cf6e3 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 30 Dec 2014 16:14:47 +0000 Subject: [PATCH 0586/1167] switch: arizona: add state machine for antenna detection Antenna cable is a 4 pole cable with open circuit impedance and the usual 3 pole (headphone) or 4 pole (headset) cables can be plugged into the antenna cable. Change-Id: I259369420c9e8f6cee044f840a0b7599d920f87b Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 180 +++++++++++++++++++++++++++++- include/linux/mfd/arizona/pdata.h | 7 ++ 2 files changed, 186 insertions(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 34751143d8e..81adaa9f7e5 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -153,6 +153,7 @@ enum headset_state { BIT_NO_HEADSET = 0, BIT_HEADSET = (1 << 0), BIT_HEADSET_NO_MIC = (1 << 1), + BIT_ANTENNA = (1 << 2), }; static ssize_t arizona_extcon_show(struct device *dev, @@ -1109,7 +1110,10 @@ static int arizona_hpdet_moisture_reading(struct arizona_extcon_info *info, if (val < 0) { return val; } else if (val < arizona->pdata.hpdet_moisture_imp) { - arizona_jds_set_state(info, &arizona_micd_microphone); + if (arizona->pdata.antenna_supported) + arizona_jds_set_state(info, &arizona_antenna_mic_det); + else + arizona_jds_set_state(info, &arizona_micd_microphone); } else { dev_warn(arizona->dev, "Jack detection due to moisture, ignoring\n"); @@ -1324,6 +1328,123 @@ int arizona_micd_button_reading(struct arizona_extcon_info *info, } EXPORT_SYMBOL_GPL(arizona_micd_button_reading); +static const struct arizona_jd_state arizona_antenna_mic_det; +static const struct arizona_jd_state arizona_antenna_oc_det; +static const struct arizona_jd_state arizona_antenna_hp_det; +static const struct arizona_jd_state arizona_antenna_button_det; +static const struct arizona_jd_state arizona_antenna_hp_oc_det; +static const struct arizona_jd_state arizona_antenna_hpr_det; +static const struct arizona_jd_state arizona_antenna_hpr_oc_det; + + +static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, int val) +{ + int ret; + + if (val < 0) + return val; + + if (!(val & ARIZONA_MICD_STS)) { + arizona_extcon_report(info, BIT_ANTENNA); + arizona_jds_set_state(info, &arizona_antenna_oc_det); + } else { + info->mic = val & ARIZONA_MICD_LVL_8 ? true : false; + + if (arizona->pdata.hpdet_channel) + ret = arizona_jds_set_state(info, &arizona_antenna_hpr_det); + else + ret = arizona_jds_set_state(info, &arizona_antenna_hp_det); + + if (ret < 0) { + if (info->mic) + arizona_extcon_report(info, BIT_HEADSET); + else + arizona_extcon_report(info, BIT_HEADSET_NO_MIC); + } + } + + return 0; +} + +static int arizona_antenna_oc_reading(struct arizona_extcon_info *info, int val) +{ + int ret; + + if (val < 0) + return val; + + if (!(val & ARIZONA_MICD_STS)) + return 0; + + info->mic = val & ARIZONA_MICD_LVL_8 ? true : false; + + if (arizona->pdata.hpdet_channel) + ret = arizona_jds_set_state(info, &arizona_antenna_hpr_oc_det); + else + ret = arizona_jds_set_state(info, &arizona_antenna_hp_oc_det); + + if (ret < 0) { + if (info->mic) + arizona_extcon_report(info, BIT_HEADSET); + else + arizona_extcon_report(info, BIT_HEADSET_NO_MIC); + } + + return 0; +} + +static int arizona_antenna_hp_oc_reading(struct arizona_extcon_info *info, int val) +{ + if (val < 0) + return val; + + arizona_set_headphone_imp(info, val); + + if (info->mic) + arizona_extcon_report(info, BIT_HEADSET); + else + arizona_extcon_report(info, BIT_HEADSET_NO_MIC); + + arizona_jds_set_state(info, &arizona_antenna_button_det); + + return 0; +} + +static int arizona_antenna_hp_reading(struct arizona_extcon_info *info, int val) +{ + if (val < 0) + return val; + + arizona_set_headphone_imp(info, val); + + if (info->mic) { + arizona_extcon_report(info, BIT_HEADSET); + arizona_jds_set_state(info, &arizona_antenna_button_det); + } else { + arizona_extcon_report(info, BIT_HEADSET_NO_MIC); + arizona_jds_set_state(info, NULL); + } + + return 0; +} + +static int arizona_antenna_button_reading(struct arizona_extcon_info *info, + int val) +{ + if (val < 0) + return val; + + /* Detected open circuit*/ + if (!(val & ARIZONA_MICD_STS)) + return arizona_antenna_mic_reading(info, val); + /* previously headset detected so check for button presses*/ + else if (info->mic) + return arizona_micd_button_reading(info, val); + + return 0; +} + + int arizona_micd_mic_start(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; @@ -1779,6 +1900,57 @@ static const struct arizona_jd_state arizona_hpdet_acc_id = { .stop = arizona_hpdet_acc_id_stop, }; +/* States for Antenna Detect */ + +static const struct arizona_jd_state arizona_antenna_mic_det = { + .mode = ARIZONA_ACCDET_MODE_ADC, + .start = arizona_micd_mic_start, + .reading = arizona_antenna_mic_reading, + .stop = arizona_micd_mic_stop, +}; + +static const struct arizona_jd_state arizona_antenna_oc_det = { + .mode = ARIZONA_ACCDET_MODE_MIC, + .start = arizona_micd_mic_start, + .reading = arizona_antenna_oc_reading, + .stop = arizona_micd_mic_stop, +}; + +static const struct arizona_jd_state arizona_antenna_hp_det = { + .mode = ARIZONA_ACCDET_MODE_HPL, + .start = arizona_hpdet_start, + .reading = arizona_antenna_hp_reading, + .stop = arizona_hpdet_stop, +}; + +static const struct arizona_jd_state arizona_antenna_hpr_det = { + .mode = ARIZONA_ACCDET_MODE_HPR, + .start = arizona_hpdet_start, + .reading = arizona_antenna_hp_reading, + .stop = arizona_hpdet_stop, +}; + +static const struct arizona_jd_state arizona_antenna_button_det = { + .mode = ARIZONA_ACCDET_MODE_MIC, + .start = arizona_micd_start, + .reading = arizona_antenna_button_reading, + .stop = arizona_micd_stop, +}; + +static const struct arizona_jd_state arizona_antenna_hp_oc_det = { + .mode = ARIZONA_ACCDET_MODE_HPL, + .start = arizona_hpdet_start, + .reading = arizona_antenna_hp_oc_reading, + .stop = arizona_hpdet_stop, +}; + +static const struct arizona_jd_state arizona_antenna_hpr_oc_det = { + .mode = ARIZONA_ACCDET_MODE_HPR, + .start = arizona_hpdet_start, + .reading = arizona_antenna_hp_oc_reading, + .stop = arizona_hpdet_stop, +}; + static void arizona_hpdet_work(struct work_struct *work) { struct arizona_extcon_info *info = container_of(work, @@ -1902,6 +2074,9 @@ static irqreturn_t arizona_jackdet(int irq, void *data) else if (arizona->pdata.hpdet_moisture_imp) arizona_jds_set_state(info, &arizona_hpdet_moisture); + else if (arizona->pdata.antenna_supported) + arizona_jds_set_state(info, + &arizona_antenna_mic_det); else arizona_jds_set_state(info, &arizona_micd_microphone); @@ -2054,6 +2229,9 @@ static int arizona_extcon_of_get_pdata(struct arizona *arizona) pdata->jd_invert = of_property_read_bool(arizona->dev->of_node, "wlf,jd-invert"); + pdata->antenna_supported = of_property_read_bool(arizona->dev->of_node, + "wlf,antenna-supported"); + arizona_of_read_u32(arizona, "wlf,gpsw", false, &pdata->gpsw); arizona_of_read_u32(arizona, "wlf,init-mic-delay", false, diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index a924d47ed94..8c1248b5b5c 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -148,6 +148,13 @@ struct arizona_pdata { /** set to true if jackdet contact opens on insert */ bool jd_invert; + /** + * Set to true to support antenna cable. antenna cable is a 4 pole + * cable with open circuit impedance and the usual 3 pole (headphone) + * or 4 pole (headset) cables can be plugged into the antenna cable + */ + bool antenna_supported; + /** If non-zero don't run headphone detection, report this value */ int fixed_hpdet_imp; From d1a046c54cec98dfe36734cc1e3dda230f930d6e Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 31 Dec 2014 08:01:34 +0000 Subject: [PATCH 0587/1167] switch: arizona: remove compilation errors Change-Id: I8143ef9da3c4a46e5dcf4f853445b5d69731823b Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 81adaa9f7e5..6611d5739a0 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -169,6 +169,13 @@ EXPORT_SYMBOL_GPL(arizona_extcon_report); static const struct arizona_jd_state arizona_hpdet_moisture; static const struct arizona_jd_state arizona_hpdet_acc_id; +static const struct arizona_jd_state arizona_antenna_mic_det; +static const struct arizona_jd_state arizona_antenna_oc_det; +static const struct arizona_jd_state arizona_antenna_hp_det; +static const struct arizona_jd_state arizona_antenna_button_det; +static const struct arizona_jd_state arizona_antenna_hp_oc_det; +static const struct arizona_jd_state arizona_antenna_hpr_det; +static const struct arizona_jd_state arizona_antenna_hpr_oc_det; static int arizona_jds_get_mode(struct arizona_extcon_info *info) { @@ -1328,17 +1335,9 @@ int arizona_micd_button_reading(struct arizona_extcon_info *info, } EXPORT_SYMBOL_GPL(arizona_micd_button_reading); -static const struct arizona_jd_state arizona_antenna_mic_det; -static const struct arizona_jd_state arizona_antenna_oc_det; -static const struct arizona_jd_state arizona_antenna_hp_det; -static const struct arizona_jd_state arizona_antenna_button_det; -static const struct arizona_jd_state arizona_antenna_hp_oc_det; -static const struct arizona_jd_state arizona_antenna_hpr_det; -static const struct arizona_jd_state arizona_antenna_hpr_oc_det; - - static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, int val) { + struct arizona *arizona = info->arizona; int ret; if (val < 0) @@ -1368,6 +1367,7 @@ static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, int val static int arizona_antenna_oc_reading(struct arizona_extcon_info *info, int val) { + struct arizona *arizona = info->arizona; int ret; if (val < 0) From 0522932da4aa5c1aae3794a0abf74a795bb3ab67 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 5 Jan 2015 11:19:43 +0900 Subject: [PATCH 0588/1167] switch: arizona: add software debounce for antenna When antenna cable is plugged in we continously measure the impedance of micdet pin so as to detect a subsequent plugin of 3/4 pole jack. In such a scenario if a 4 pole headset jack is slowly plugged in then hpl/hpr may come in contact with micdet pin and we may meausre the impedance of hpl/r and falsely report a 4 pole headset as a 3 pole headphone jack. So this patch adds a software debounce to negate the effect of slow jack insertions into an antenna cable. Change-Id: Ib41eb22383cd755659439ee2513400dfa64df1f9 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 39 +++++++++++++++++++++++++++++++ include/linux/mfd/arizona/pdata.h | 3 +++ 2 files changed, 42 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 6611d5739a0..c0d38bdab59 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -96,6 +96,9 @@ struct arizona_extcon_info { int micd_res_old; int micd_debounce; int micd_count; + int antenna_res_old; + int antenna_debounce; + int antenna_count; struct delayed_work hpdet_work; struct delayed_work micd_detect_work; @@ -1344,6 +1347,9 @@ static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, int val return val; if (!(val & ARIZONA_MICD_STS)) { + info->antenna_res_old = 0; + info->antenna_debounce = 0; + info->antenna_count = 0; arizona_extcon_report(info, BIT_ANTENNA); arizona_jds_set_state(info, &arizona_antenna_oc_det); } else { @@ -1368,6 +1374,7 @@ static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, int val static int arizona_antenna_oc_reading(struct arizona_extcon_info *info, int val) { struct arizona *arizona = info->arizona; + int debounce_lim = arizona->pdata.antenna_manual_debounce; int ret; if (val < 0) @@ -1376,6 +1383,32 @@ static int arizona_antenna_oc_reading(struct arizona_extcon_info *info, int val) if (!(val & ARIZONA_MICD_STS)) return 0; + if (debounce_lim) { + if (info->antenna_debounce != val) + info->antenna_count = 0; + + info->antenna_debounce = val; + info->antenna_count++; + + if (info->antenna_count == debounce_lim) { + info->antenna_count = 0; + if (val == info->antenna_res_old) + return 0; + + info->antenna_res_old = val; + } else { + dev_dbg(arizona->dev, "Antenna software debounce: %d,%x\n", + info->antenna_count, val); + regmap_update_bits(arizona->regmap, + ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, 0); + regmap_update_bits(arizona->regmap, + ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, ARIZONA_MICD_ENA); + return -EAGAIN; + } + } + info->mic = val & ARIZONA_MICD_LVL_8 ? true : false; if (arizona->pdata.hpdet_channel) @@ -2099,6 +2132,9 @@ static irqreturn_t arizona_jackdet(int irq, void *data) info->micd_res_old = 0; info->micd_debounce = 0; info->micd_count = 0; + info->antenna_res_old = 0; + info->antenna_debounce = 0; + info->antenna_count = 0; arizona->hp_impedance = 0; arizona_jds_set_state(info, NULL); @@ -2189,6 +2225,9 @@ static int arizona_extcon_of_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,micd-manual-debounce", false, &pdata->micd_manual_debounce); + arizona_of_read_u32(arizona, "wlf,antenna-manual-debounce", false, + &pdata->antenna_manual_debounce); + pdata->micd_pol_gpio = arizona_of_get_named_gpio(arizona, "wlf,micd-pol-gpio", false); diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 8c1248b5b5c..5a6c449e465 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -199,6 +199,9 @@ struct arizona_pdata { /** Extra software debounces during button detection */ int micd_manual_debounce; + /** Software debounces during 3/4 pole plugin into antenna cable */ + int antenna_manual_debounce; + /** GPIO for mic detection polarity */ int micd_pol_gpio; From 628b69b8f5fa67244384ef7f8d0ee44be1f34790 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 5 Jan 2015 11:25:41 +0900 Subject: [PATCH 0589/1167] switch: arizona: reset the software debounce for button detect Everytime an antenna cable is inserted or a 4 Pole headset jack is removed from an antenna cable we need to reset the software debounce variables that are used for 4 Pole headset button detection. Change-Id: I29de758e2ee523093d24fe94d43ae139e625e46d Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index c0d38bdab59..3fdc8b44ddb 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1347,6 +1347,9 @@ static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, int val return val; if (!(val & ARIZONA_MICD_STS)) { + info->micd_res_old = 0; + info->micd_debounce = 0; + info->micd_count = 0; info->antenna_res_old = 0; info->antenna_debounce = 0; info->antenna_count = 0; From 927f65a34b15326fa742657ef19d7c590d83aed7 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 5 Jan 2015 15:34:50 +0900 Subject: [PATCH 0590/1167] switch: arizona: add debug prints for antenna detection Change-Id: Ia5219a863196ff28b46c27a38c26a649315f1c02 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 3fdc8b44ddb..c2398a6ba33 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -166,6 +166,7 @@ DEVICE_ATTR(hp_impedance, S_IRUGO, arizona_extcon_show, NULL); inline void arizona_extcon_report(struct arizona_extcon_info *info, int state) { + dev_dbg(info->arizona->dev, "Switch Report: %d\n", state); switch_set_state(&info->edev, state); } EXPORT_SYMBOL_GPL(arizona_extcon_report); @@ -1343,6 +1344,8 @@ static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, int val struct arizona *arizona = info->arizona; int ret; + dev_dbg(arizona->dev, "Antenna Detection: Mic Reading: 0x%x\n", val); + if (val < 0) return val; @@ -1380,6 +1383,8 @@ static int arizona_antenna_oc_reading(struct arizona_extcon_info *info, int val) int debounce_lim = arizona->pdata.antenna_manual_debounce; int ret; + dev_dbg(arizona->dev, "Antenna Detection: Antenna Reading: 0x%x\n", val); + if (val < 0) return val; @@ -1431,6 +1436,8 @@ static int arizona_antenna_oc_reading(struct arizona_extcon_info *info, int val) static int arizona_antenna_hp_oc_reading(struct arizona_extcon_info *info, int val) { + dev_dbg(info->arizona->dev, "Antenna Detection: HP-Antenna Reading: 0x%x\n", val); + if (val < 0) return val; @@ -1448,6 +1455,8 @@ static int arizona_antenna_hp_oc_reading(struct arizona_extcon_info *info, int v static int arizona_antenna_hp_reading(struct arizona_extcon_info *info, int val) { + dev_dbg(info->arizona->dev, "Antenna Detection: HP Reading: 0x%x\n", val); + if (val < 0) return val; @@ -1467,6 +1476,8 @@ static int arizona_antenna_hp_reading(struct arizona_extcon_info *info, int val) static int arizona_antenna_button_reading(struct arizona_extcon_info *info, int val) { + dev_dbg(info->arizona->dev, "Antenna Detection: Button Reading: 0x%x\n", val); + if (val < 0) return val; From 14861da19e01beb80bf43ac2648909d8265ac6a7 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 5 Jan 2015 18:44:43 +0900 Subject: [PATCH 0591/1167] mfd: clearwater: add patch for rev b chip this patch reduces the cross talk when edre is enabled Change-Id: I75a8cb8e157d63af58ba0285df81f77b5bfd1d4b Signed-off-by: Nikesh Oswal --- drivers/mfd/clearwater-tables.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index 10dfb466669..03d054b5f1d 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -46,6 +46,10 @@ static const struct reg_default clearwater_reva_16_patch[] = { { 0x80, 0x0000 }, }; +static const struct reg_default clearwater_revb_16_patch[] = { + { 0x27E, 0x0001 }, +}; + /* this patch is required for EDRE on RevA*/ static const struct reg_default clearwater_reva_32_patch[] = { { 0x3000, 0xC2253632}, @@ -319,7 +323,16 @@ int clearwater_patch(struct arizona *arizona) dev_err(arizona->dev, "Error in applying Clearwater Rev A 32 bit patch\n"); return ret; } + break; default: + ret = regmap_register_patch(arizona->regmap, + clearwater_revb_16_patch, + ARRAY_SIZE(clearwater_revb_16_patch)); + if (ret < 0) { + dev_err(arizona->dev, + "Error in applying Clearwater Rev B 16 bit patch\n"); + return ret; + } break; } From 05d96ac5e9917e2ec277323c9cad36f0cfe3be0b Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 6 Jan 2015 11:27:30 +0900 Subject: [PATCH 0592/1167] switch: arizona: transit to button det for direct 4 pole plugin when 4 pole jack is plugged in directly without going via an antenna cable the state machine can directly transit to button detection state instead of transiting to a state which detects antenna and button. Change-Id: I1ffb9451b52d8096d80fdee4baacc51d17cbdb56 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index c2398a6ba33..231075a153a 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1464,7 +1464,7 @@ static int arizona_antenna_hp_reading(struct arizona_extcon_info *info, int val) if (info->mic) { arizona_extcon_report(info, BIT_HEADSET); - arizona_jds_set_state(info, &arizona_antenna_button_det); + arizona_jds_set_state(info, &arizona_micd_button); } else { arizona_extcon_report(info, BIT_HEADSET_NO_MIC); arizona_jds_set_state(info, NULL); From 84cb78c5897fd6d807931716536d9e20d37b5b76 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 6 Jan 2015 11:48:02 +0900 Subject: [PATCH 0593/1167] switch: arizona: debounce for jack plugouts from ant cable a slow removal of 4 pole headset jack from an antenna cable can result in the ground pin of headset jack to comes in contact with the mic pin of antenna and due to zero impedance of ground pin the state machine will falsely report a button press this patch prevents this situation by adding a software debounce in the state machine. Also plugin and plugout debounce variables are kept separate so that each can be tuned according to the requirements. Change-Id: I3c76678c062b812f82f13117a3987e1b464ba57e Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 66 +++++++++++++++++++++++++------ include/linux/mfd/arizona/pdata.h | 3 ++ 2 files changed, 58 insertions(+), 11 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 231075a153a..fa8bd29ed38 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -99,6 +99,10 @@ struct arizona_extcon_info { int antenna_res_old; int antenna_debounce; int antenna_count; + int antenna_db_plugout; + int antenna_cnt_plugout; + int antenna_res_old_plugout; + bool antenna_skip_btn_db; struct delayed_work hpdet_work; struct delayed_work micd_detect_work; @@ -1282,7 +1286,8 @@ int arizona_micd_button_reading(struct arizona_extcon_info *info, if (val < 0) return val; - if (debounce_lim) { + if ((debounce_lim) && + ( !(info->antenna_skip_btn_db))) { if (info->micd_debounce != val) info->micd_count = 0; @@ -1350,9 +1355,9 @@ static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, int val return val; if (!(val & ARIZONA_MICD_STS)) { - info->micd_res_old = 0; - info->micd_debounce = 0; - info->micd_count = 0; + info->antenna_db_plugout = 0; + info->antenna_cnt_plugout = 0; + info->antenna_res_old_plugout = 0; info->antenna_res_old = 0; info->antenna_debounce = 0; info->antenna_count = 0; @@ -1476,19 +1481,51 @@ static int arizona_antenna_hp_reading(struct arizona_extcon_info *info, int val) static int arizona_antenna_button_reading(struct arizona_extcon_info *info, int val) { + int debounce_lim = info->arizona->pdata.antenna_manual_db_plugout; + int ret = 0; dev_dbg(info->arizona->dev, "Antenna Detection: Button Reading: 0x%x\n", val); if (val < 0) return val; - /* Detected open circuit*/ - if (!(val & ARIZONA_MICD_STS)) - return arizona_antenna_mic_reading(info, val); - /* previously headset detected so check for button presses*/ - else if (info->mic) - return arizona_micd_button_reading(info, val); + if (debounce_lim) { + if (info->antenna_db_plugout != val) + info->antenna_cnt_plugout = 0; - return 0; + info->antenna_db_plugout = val; + info->antenna_cnt_plugout++; + + if (info->antenna_cnt_plugout == debounce_lim) { + info->antenna_cnt_plugout = 0; + if (val == info->antenna_res_old_plugout) + return 0; + + info->antenna_res_old_plugout = val; + } else { + dev_dbg(info->arizona->dev, "Antenna software plugout db: %d,%x\n", + info->antenna_cnt_plugout, val); + regmap_update_bits(info->arizona->regmap, + ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, 0); + regmap_update_bits(info->arizona->regmap, + ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, ARIZONA_MICD_ENA); + return -EAGAIN; + } + } + + if (!(val & ARIZONA_MICD_STS)) { /* Detected open circuit*/ + info->antenna_skip_btn_db = false; + ret = arizona_antenna_mic_reading(info, val); + } else if (info->mic) { /* previous hs det so check for button */ + /* skip furthur debounce for button as we have + already debounced in this function*/ + if (debounce_lim) + info->antenna_skip_btn_db = true; + ret = arizona_micd_button_reading(info, val); + } + + return ret; } @@ -2149,6 +2186,10 @@ static irqreturn_t arizona_jackdet(int irq, void *data) info->antenna_res_old = 0; info->antenna_debounce = 0; info->antenna_count = 0; + info->antenna_db_plugout = 0; + info->antenna_cnt_plugout = 0; + info->antenna_res_old_plugout = 0; + info->antenna_skip_btn_db = false; arizona->hp_impedance = 0; arizona_jds_set_state(info, NULL); @@ -2242,6 +2283,9 @@ static int arizona_extcon_of_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,antenna-manual-debounce", false, &pdata->antenna_manual_debounce); + arizona_of_read_u32(arizona, "wlf,antenna-manual-db-plugout", false, + &pdata->antenna_manual_db_plugout); + pdata->micd_pol_gpio = arizona_of_get_named_gpio(arizona, "wlf,micd-pol-gpio", false); diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 5a6c449e465..3e935073cd8 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -202,6 +202,9 @@ struct arizona_pdata { /** Software debounces during 3/4 pole plugin into antenna cable */ int antenna_manual_debounce; + /** Software debounces during 3/4 pole plugout from antenna cable */ + int antenna_manual_db_plugout; + /** GPIO for mic detection polarity */ int micd_pol_gpio; From ba467e1dc3446fc98ac8ec60b9e01209c2e81476 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 6 Jan 2015 17:32:47 +0900 Subject: [PATCH 0594/1167] regulator: arizona-ldo1: get ldoen gpio only if required ldoen gpio is required only when the dcvdd is generate using internal codec ldo for externally supplied dcvdd ldoen gpio is not needed Change-Id: I5ef4e4d94d870af99ec5806f20e4a08c41ea796c Signed-off-by: Nikesh Oswal --- drivers/regulator/arizona-ldo1.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/regulator/arizona-ldo1.c b/drivers/regulator/arizona-ldo1.c index f483cc0d04b..5647aa13aa5 100644 --- a/drivers/regulator/arizona-ldo1.c +++ b/drivers/regulator/arizona-ldo1.c @@ -183,8 +183,6 @@ static int arizona_ldo1_of_get_pdata(struct arizona *arizona, struct device_node *init_node, *dcvdd_node; struct regulator_init_data *init_data; - pdata->ldoena = arizona_of_get_named_gpio(arizona, "wlf,ldoena", true); - init_node = of_get_child_by_name(arizona->dev->of_node, "ldo1"); dcvdd_node = of_parse_phandle(arizona->dev->of_node, "DCVDD-supply", 0); @@ -206,6 +204,9 @@ static int arizona_ldo1_of_get_pdata(struct arizona *arizona, arizona->external_dcvdd = true; } + if (!(arizona->external_dcvdd)) + pdata->ldoena = arizona_of_get_named_gpio(arizona, "wlf,ldoena", true); + of_node_put(dcvdd_node); return 0; From 0468ca3e9467e0e80ee202a8714698a7ac5f44cc Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 6 Jan 2015 14:37:24 +0900 Subject: [PATCH 0595/1167] switch: arizona: skip flipping polarity for platforms that support fixed polarity headset jacks skip the code that flips polarity to identify different polarity headsets as this wastes a lot of time and increase the jack detection latency Change-Id: Ib8ca3a2e63132487be5506a2f4b43126b7a4ffc2 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index fa8bd29ed38..9ff5097f86e 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1592,7 +1592,8 @@ int arizona_micd_mic_reading(struct arizona_extcon_info *info, int val) * plain headphones. If both polarities report a low * impedence then give up and report headphones. */ - if (val & MICD_LVL_1_TO_7) { + if ((val & MICD_LVL_1_TO_7) && + (info->micd_num_modes > 1)) { if (info->jack_flips >= info->micd_num_modes * 10) { dev_dbg(arizona->dev, "Detected HP/line\n"); goto done; From f84c7d2544aa38d1adeec417655a5ea666092d5b Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 6 Jan 2015 10:35:58 +0900 Subject: [PATCH 0596/1167] switch: arizona: add patch for low impedance headphones this patch reduces thd+n on clearwater for low impedance (<=13ohms) headphone loads Change-Id: Icec78d9e972baa05a691f71e3b2d91be64a13818 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 65 +++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 9ff5097f86e..365d7146f0f 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -858,6 +858,26 @@ static const struct reg_default wm1814_normal_impedance_patch[] = { { 0x470, 0x0801 }, }; +static const struct reg_default clearwater_low_impedance_patch[] = { + { 0x465, 0x4C6D }, + { 0x467, 0x3950 }, + { 0x469, 0x2D86 }, + { 0x46B, 0x1E6D }, + { 0x46D, 0x199A }, + { 0x46F, 0x1456 }, + { 0x483, 0x0826 }, +}; + +static const struct reg_default clearwater_normal_impedance_patch[] = { + { 0x465, 0x8A43 }, + { 0x467, 0x7259 }, + { 0x469, 0x65EA }, + { 0x46B, 0x50F4 }, + { 0x46D, 0x41CD }, + { 0x46F, 0x199A }, + { 0x483, 0x0023 }, +}; + int arizona_wm5110_tune_headphone(struct arizona_extcon_info *info, int reading) { @@ -949,6 +969,47 @@ int arizona_wm1814_tune_headphone(struct arizona_extcon_info *info, return 0; } +int arizona_clearwater_tune_headphone(struct arizona_extcon_info *info, + int reading) +{ + struct arizona *arizona = info->arizona; + const struct reg_default *patch; + int i, ret, size; + + if (reading <= arizona->pdata.hpdet_short_circuit_imp) { + /* Headphones are always off here so just mark them */ + dev_warn(arizona->dev, "Possible HP short, disabling\n"); + return 0; + } else if (reading <= HP_LOW_IMPEDANCE_LIMIT) { + if (info->hp_imp_level == HP_LOW_IMPEDANCE) + return 0; + + info->hp_imp_level = HP_LOW_IMPEDANCE; + + patch = clearwater_low_impedance_patch; + size = ARRAY_SIZE(clearwater_low_impedance_patch); + } else { + if (info->hp_imp_level == HP_NORMAL_IMPEDANCE) + return 0; + + info->hp_imp_level = HP_NORMAL_IMPEDANCE; + + patch = clearwater_normal_impedance_patch; + size = ARRAY_SIZE(clearwater_normal_impedance_patch); + } + + for (i = 0; i < size; ++i) { + ret = regmap_write(arizona->regmap, + patch[i].reg, patch[i].def); + if (ret != 0) + dev_warn(arizona->dev, + "Failed to write headphone patch: %x <= %x\n", + patch[i].reg, patch[i].def); + } + + return 0; +} + void arizona_set_headphone_imp(struct arizona_extcon_info *info, int imp) { struct arizona *arizona = info->arizona; @@ -965,6 +1026,10 @@ void arizona_set_headphone_imp(struct arizona_extcon_info *info, int imp) case WM1814: arizona_wm1814_tune_headphone(info, arizona->hp_impedance); break; + case WM8285: + case WM1840: + arizona_clearwater_tune_headphone(info, arizona->hp_impedance); + break; default: break; } From 1e9d3a352ca989ae6c6d7fe616808b1639e10d0f Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Fri, 9 Jan 2015 18:04:59 +0900 Subject: [PATCH 0597/1167] Revert "switch: arizona: transit to button det for direct 4 pole plugin" user can fool the state machine by plugging a 4 pole into antenna cable and then plugging in the antenna cable so the state machine is fooled to think that as a 4 pole whereas it should actually consider that as 4 pole + antenna This reverts commit 05d96ac5e9917e2ec277323c9cad36f0cfe3be0b. Change-Id: Icffbde8b33b756304d9de41073a3d980aa71fd63 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 365d7146f0f..8c38f0a2f03 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1534,7 +1534,7 @@ static int arizona_antenna_hp_reading(struct arizona_extcon_info *info, int val) if (info->mic) { arizona_extcon_report(info, BIT_HEADSET); - arizona_jds_set_state(info, &arizona_micd_button); + arizona_jds_set_state(info, &arizona_antenna_button_det); } else { arizona_extcon_report(info, BIT_HEADSET_NO_MIC); arizona_jds_set_state(info, NULL); From cd2d3ce930e3fe72e8dce3f5daf72ea0de948092 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 7 Jan 2015 17:53:16 +0900 Subject: [PATCH 0598/1167] switch: arizona: handle extreme slow plugin of 4 pole into antenna when a 4 pole headset is plugged in extremely slowly to the point of inserting it partially in the antenna cable and just holding it there then the hpl/hpr will come in contact with mic pin of antenna and a low impedance will be detected and it will report a headphone. But ultimately when the headset is completely plugged in we will get the high impedance measurement on mic pin so this patch takes into account the update to mic impedance and reports a headset in this scenario. Change-Id: I40348de3997c72742527cec1a2e13471b291f973 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 8c38f0a2f03..7485bbe4413 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1548,6 +1548,7 @@ static int arizona_antenna_button_reading(struct arizona_extcon_info *info, { int debounce_lim = info->arizona->pdata.antenna_manual_db_plugout; int ret = 0; + bool mic; dev_dbg(info->arizona->dev, "Antenna Detection: Button Reading: 0x%x\n", val); if (val < 0) @@ -1582,12 +1583,21 @@ static int arizona_antenna_button_reading(struct arizona_extcon_info *info, if (!(val & ARIZONA_MICD_STS)) { /* Detected open circuit*/ info->antenna_skip_btn_db = false; ret = arizona_antenna_mic_reading(info, val); - } else if (info->mic) { /* previous hs det so check for button */ - /* skip furthur debounce for button as we have - already debounced in this function*/ - if (debounce_lim) - info->antenna_skip_btn_db = true; - ret = arizona_micd_button_reading(info, val); + } else { + + mic = val & ARIZONA_MICD_LVL_8 ? true : false; + if (mic && mic != info->mic) { + info->mic = mic; + arizona_extcon_report(info, BIT_HEADSET); + } + + if (info->mic) {/* previous hs det so check for button */ + /* skip furthur debounce for button as we have + already debounced in this function*/ + if (debounce_lim) + info->antenna_skip_btn_db = true; + ret = arizona_micd_button_reading(info, val); + } } return ret; From fb33b55602aa30295a0853fd1deb43342d7472c3 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Fri, 9 Jan 2015 12:31:08 +0900 Subject: [PATCH 0599/1167] switch: arizona: set btn release when plugging out HS from antenna Due to slow plugout of 4 pole headset from the antenna cable the gnd/hpl/hpr of 4 pole can come in contact with mic pin of antenna hence measuring a low impedance on the mic pin and reporting a button presse event. So here we send a button release event to negate all such false button presses Change-Id: Id1f344757c68a2db8049217dbebb702c11d29dd4 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 7485bbe4413..1fea4be809d 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1547,8 +1547,9 @@ static int arizona_antenna_button_reading(struct arizona_extcon_info *info, int val) { int debounce_lim = info->arizona->pdata.antenna_manual_db_plugout; - int ret = 0; + int i, ret = 0; bool mic; + dev_dbg(info->arizona->dev, "Antenna Detection: Button Reading: 0x%x\n", val); if (val < 0) @@ -1581,6 +1582,17 @@ static int arizona_antenna_button_reading(struct arizona_extcon_info *info, } if (!(val & ARIZONA_MICD_STS)) { /* Detected open circuit*/ + /** Due to slow plugout of 4 pole headset from the antenna cable + * the gnd/hpl/hpr of 4 pole can come in contact with mic pin of + * antenna hence measuring a low impedance on the mic pin and + * reporting a button presse event. So here we send a button + * release event to negate all such false button presses + */ + for (i = 0; i < info->num_micd_ranges; i++) + input_report_key(info->input, + info->micd_ranges[i].key, 0); + input_sync(info->input); + info->antenna_skip_btn_db = false; ret = arizona_antenna_mic_reading(info, val); } else { From 9417fd92fb6e980f3d4df4ffa060f7864fe21fee Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 12 Jan 2015 11:14:14 +0900 Subject: [PATCH 0600/1167] switch: arizona: handle button press for antenna state machine For antenna state machine there are 3 manual debounce values for plugin , plugout and button . The plugout debounce value will be used as a common debounce for both button presses and to handle slow plugouts in cases where a 4 pole is plugged into an antenna. This is done because to support slow plugouts we need a larger debounce as compared to button presses. But in cases where a 4 pole is directly plugged in we use the dedicated button debounce. Change-Id: I12251798b86233a237a5b3cf7af09259f19ada73 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 1fea4be809d..93d72b9a95a 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1513,10 +1513,12 @@ static int arizona_antenna_hp_oc_reading(struct arizona_extcon_info *info, int v arizona_set_headphone_imp(info, val); - if (info->mic) + if (info->mic) { + info->antenna_skip_btn_db = true; arizona_extcon_report(info, BIT_HEADSET); - else + } else { arizona_extcon_report(info, BIT_HEADSET_NO_MIC); + } arizona_jds_set_state(info, &arizona_antenna_button_det); @@ -1534,6 +1536,7 @@ static int arizona_antenna_hp_reading(struct arizona_extcon_info *info, int val) if (info->mic) { arizona_extcon_report(info, BIT_HEADSET); + info->antenna_skip_btn_db = false; arizona_jds_set_state(info, &arizona_antenna_button_det); } else { arizona_extcon_report(info, BIT_HEADSET_NO_MIC); @@ -1555,7 +1558,11 @@ static int arizona_antenna_button_reading(struct arizona_extcon_info *info, if (val < 0) return val; - if (debounce_lim) { + if (debounce_lim && info->antenna_skip_btn_db) { + /** If plugout debounce is set and we are skipping the debounce for + * button then do a common debounce below to handle both slow + * plugouts and buttons + */ if (info->antenna_db_plugout != val) info->antenna_cnt_plugout = 0; @@ -1600,16 +1607,12 @@ static int arizona_antenna_button_reading(struct arizona_extcon_info *info, mic = val & ARIZONA_MICD_LVL_8 ? true : false; if (mic && mic != info->mic) { info->mic = mic; + info->antenna_skip_btn_db = true; arizona_extcon_report(info, BIT_HEADSET); } - if (info->mic) {/* previous hs det so check for button */ - /* skip furthur debounce for button as we have - already debounced in this function*/ - if (debounce_lim) - info->antenna_skip_btn_db = true; + if (info->mic)/* previous hs det so check for button */ ret = arizona_micd_button_reading(info, val); - } } return ret; From eb7062aa0d096990c4501d54ab36b020f4ba6519 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 12 Jan 2015 15:13:37 +0900 Subject: [PATCH 0601/1167] switch: arizona: Swith to manual mic clamping on Clearwater If the headphone detection is cross-wired, HPDETL -> HPR and HPDETR -> HPL the automatic clamping will not function correctly. As some customers use this configuration on Clearwater, switch to manual clamping on Clearwater. Change-Id: I08fa981ee292c21cd668994523c80645868915b9 Signed-off-by: Nikesh Oswal Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 22 ++++++++++++++++++++++ include/linux/mfd/arizona/registers.h | 3 ++- 2 files changed, 24 insertions(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 93d72b9a95a..0e1b1d69abb 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -267,6 +267,7 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, struct arizona *arizona = info->arizona; unsigned int mask, val = 0; unsigned int cap_sel = 0; + unsigned int edre_reg = 0, edre_val = 0; int ret; switch (arizona->type) { @@ -297,6 +298,19 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, "Failed to set TST_CAP_SEL: %d\n", ret); break; + case WM8285: + case WM1840: + edre_reg = CLEARWATER_EDRE_MANUAL; + mask = ARIZONA_HP1L_SHRTO | ARIZONA_HP1L_FLWR | + ARIZONA_HP1L_SHRTI; + if (clamp) { + val = ARIZONA_HP1L_SHRTO; + edre_val = 0x3; + } else { + val = ARIZONA_HP1L_FLWR | ARIZONA_HP1L_SHRTI; + edre_val = 0; + } + break; default: mask = 0; break; @@ -318,6 +332,14 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, ret); } + if (edre_reg) { + ret = regmap_write(arizona->regmap, edre_reg, edre_val); + if (ret != 0) + dev_warn(arizona->dev, + "Failed to set EDRE Manual: %d\n", + ret); + } + if (mask) { ret = regmap_update_bits(arizona->regmap, ARIZONA_HP_CTRL_1L, mask, val); diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index d8c29a5cb53..bd26e7b36dc 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -278,7 +278,8 @@ #define ARIZONA_DRE_CONTROL_1 0x441 #define ARIZONA_DRE_CONTROL_2 0x442 #define ARIZONA_DRE_CONTROL_3 0x443 -#define CLEARWATER_EDRE_ENABLE 0x448 +#define CLEARWATER_EDRE_ENABLE 0x448 +#define CLEARWATER_EDRE_MANUAL 0x44A #define ARIZONA_DAC_AEC_CONTROL_1 0x450 #define ARIZONA_DAC_AEC_CONTROL_2 0x451 #define ARIZONA_NOISE_GATE_CONTROL 0x458 From 40933c5ec3dafeca5e4c563248a5954b9f404731 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 13 Jan 2015 12:37:35 +0900 Subject: [PATCH 0602/1167] switch: arizona: Add software debounce for moisture detect Software debounce will prevent false moisture detect in cases where the jack is plugged in slowly. We only debounce in the case moisture is detected. Change-Id: I7706aad079a74694e9955aa7ec5ed336def21744 Signed-off-by: Nikesh Oswal Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 18 ++++++++++++++++++ include/linux/mfd/arizona/pdata.h | 3 +++ 2 files changed, 21 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 0e1b1d69abb..aaaf00de647 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -103,6 +103,7 @@ struct arizona_extcon_info { int antenna_cnt_plugout; int antenna_res_old_plugout; bool antenna_skip_btn_db; + int moisture_count; struct delayed_work hpdet_work; struct delayed_work micd_detect_work; @@ -1208,6 +1209,7 @@ static int arizona_hpdet_moisture_reading(struct arizona_extcon_info *info, int val) { struct arizona *arizona = info->arizona; + int debounce_lim = info->arizona->pdata.hpdet_moisture_debounce; if (val < 0) { return val; @@ -1217,6 +1219,18 @@ static int arizona_hpdet_moisture_reading(struct arizona_extcon_info *info, else arizona_jds_set_state(info, &arizona_micd_microphone); } else { + if (debounce_lim) { + if (++info->moisture_count < debounce_lim) { + dev_dbg(info->arizona->dev, + "Moisture software debounce: %d, %x\n", + info->moisture_count, val); + arizona_hpdet_restart(info); + return -EAGAIN; + } + + info->moisture_count = 0; + } + dev_warn(arizona->dev, "Jack detection due to moisture, ignoring\n"); arizona_jds_set_state(info, NULL); @@ -2303,6 +2317,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) info->antenna_cnt_plugout = 0; info->antenna_res_old_plugout = 0; info->antenna_skip_btn_db = false; + info->moisture_count = 0; arizona->hp_impedance = 0; arizona_jds_set_state(info, NULL); @@ -2453,6 +2468,9 @@ static int arizona_extcon_of_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,hpdet-moisture-imp", false, &pdata->hpdet_moisture_imp); + arizona_of_read_u32(arizona, "wlf,hpdet-moisture-debounce", false, + &pdata->hpdet_moisture_debounce); + arizona_of_read_u32(arizona, "wlf,hpdet-short-circuit-imp", false, &pdata->hpdet_short_circuit_imp); diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 3e935073cd8..028c46d052a 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -184,6 +184,9 @@ struct arizona_pdata { */ int hpdet_moisture_imp; + /** Software debounces for moisture detect */ + int hpdet_moisture_debounce; + /** * Channel to use for headphone detection, valid values are 0 for * left and 1 for right From f2a93ac9dc6cf2b8d4036e3717ca1174be9b9f78 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 15 Jan 2015 13:38:46 +0000 Subject: [PATCH 0603/1167] ASoC: clearwater: Correct mutex used for register key Change-Id: Id7105557b5840d54cb34171d6873bf82d7b2d06f Signed-off-by: Charles Keepax --- sound/soc/codecs/clearwater.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index bfe83299742..526a24bfb7a 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -327,7 +327,7 @@ int clearwater_cp_mode_put(struct snd_kcontrol *kcontrol, if (val > e->max - 1) return -EINVAL; - mutex_lock(&codec->mutex); + mutex_lock(&arizona->reg_setting_lock); if (val ==0) { /* Default */ regmap_write(arizona->regmap, 0x80, 0x1); regmap_write(arizona->regmap, CLEARWATER_CP_MODE, 0x400); @@ -337,7 +337,7 @@ int clearwater_cp_mode_put(struct snd_kcontrol *kcontrol, regmap_write(arizona->regmap, CLEARWATER_CP_MODE, 0x407); regmap_write(arizona->regmap, 0x80, 0x0); } - mutex_unlock(&codec->mutex); + mutex_unlock(&arizona->reg_setting_lock); return 0; } From 6b5bb138489378669d823c6142773b9733fb6408 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 15 Jan 2015 15:23:28 +0000 Subject: [PATCH 0604/1167] mfd: clearwater: Add missing cache register Change-Id: I279a9cdd20630d6a36c6d36c4f5141940f528a12 Signed-off-by: Charles Keepax --- drivers/mfd/clearwater-tables.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index 03d054b5f1d..445c7c81dac 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -517,6 +517,7 @@ static const struct reg_default clearwater_reg_default[] = { { 0x000001C9, 0x0000 }, /* R457 - FLL3 Spread Spectrum */ { 0x000001CA, 0x000C }, /* R458 - FLL3 GPIO Clock */ { 0x00000200, 0x0006 }, /* R512 (0x200) - Mic Charge Pump 1 */ + { 0x0000020B, 0x0400 }, { 0x00000210, 0x0184 }, /* R528 (0x210) - LDO1 Control 1 */ { 0x00000213, 0x03e4 }, /* R531 (0x213) - LDO2 Control 1 */ { 0x00000218, 0x00e6 }, /* R536 (0x218) - Mic Bias Ctrl 1 */ From 10c1d47b4402cd13297f2f138b49ad25ffc57af3 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 15 Jan 2015 13:49:01 +0000 Subject: [PATCH 0605/1167] mfd: clearwater: Add sync for keyed cache As we have unfortunately added ALSA controls for keyed registers we need to have a seperate cache sync for these. Change-Id: I85a8106e9eec88e189b8b9e734363c5c102ade5d Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 2fd7eafe212..520fb69c314 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -705,6 +705,17 @@ static int arizona_runtime_resume(struct device *dev) if (ret != 0) { goto err; } + + mutex_lock(&arizona->reg_setting_lock); + regmap_write(arizona->regmap, 0x80, 0x3); + ret = regcache_sync_region(arizona->regmap, CLEARWATER_CP_MODE, + CLEARWATER_CP_MODE); + if (ret != 0) { + dev_err(arizona->dev, "Failed to restore keyed cache\n"); + goto err; + } + regmap_write(arizona->regmap, 0x80, 0x0); + mutex_unlock(&arizona->reg_setting_lock); break; } From d0eb20cff44c0377a43ddd22a0bc866d269ad438 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Fri, 16 Jan 2015 10:00:25 +0000 Subject: [PATCH 0606/1167] switch: arizona: add micd_cb to antenna state machine micd_cb is a callback function provided to convey the state of the microphone, this patch adds the support of this callback to the antenna state machine. Change-Id: If69ef5ca396a53de1b973dd758285b53088eb912 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index aaaf00de647..6446a44a41f 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1462,6 +1462,7 @@ static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, int val info->antenna_res_old = 0; info->antenna_debounce = 0; info->antenna_count = 0; + info->mic = false; arizona_extcon_report(info, BIT_ANTENNA); arizona_jds_set_state(info, &arizona_antenna_oc_det); } else { @@ -1480,6 +1481,9 @@ static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, int val } } + if (arizona->pdata.micd_cb) + arizona->pdata.micd_cb(info->mic); + return 0; } @@ -1537,6 +1541,9 @@ static int arizona_antenna_oc_reading(struct arizona_extcon_info *info, int val) arizona_extcon_report(info, BIT_HEADSET_NO_MIC); } + if (arizona->pdata.micd_cb) + arizona->pdata.micd_cb(info->mic); + return 0; } @@ -1585,11 +1592,12 @@ static int arizona_antenna_hp_reading(struct arizona_extcon_info *info, int val) static int arizona_antenna_button_reading(struct arizona_extcon_info *info, int val) { - int debounce_lim = info->arizona->pdata.antenna_manual_db_plugout; + struct arizona *arizona = info->arizona; + int debounce_lim = arizona->pdata.antenna_manual_db_plugout; int i, ret = 0; bool mic; - dev_dbg(info->arizona->dev, "Antenna Detection: Button Reading: 0x%x\n", val); + dev_dbg(arizona->dev, "Antenna Detection: Button Reading: 0x%x\n", val); if (val < 0) return val; @@ -1612,12 +1620,12 @@ static int arizona_antenna_button_reading(struct arizona_extcon_info *info, info->antenna_res_old_plugout = val; } else { - dev_dbg(info->arizona->dev, "Antenna software plugout db: %d,%x\n", + dev_dbg(arizona->dev, "Antenna software plugout db: %d,%x\n", info->antenna_cnt_plugout, val); - regmap_update_bits(info->arizona->regmap, + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, ARIZONA_MICD_ENA, 0); - regmap_update_bits(info->arizona->regmap, + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, ARIZONA_MICD_ENA, ARIZONA_MICD_ENA); return -EAGAIN; @@ -1644,6 +1652,8 @@ static int arizona_antenna_button_reading(struct arizona_extcon_info *info, if (mic && mic != info->mic) { info->mic = mic; info->antenna_skip_btn_db = true; + if (arizona->pdata.micd_cb) + arizona->pdata.micd_cb(info->mic); arizona_extcon_report(info, BIT_HEADSET); } From 5ae88d900610d5c73c9f258687190a8b1b6f8025 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 19 Jan 2015 10:00:51 +0000 Subject: [PATCH 0607/1167] switch: arizona: call hpdet_cb on antenna jack plugin hpdet_cb function is called to convey the headphone impedance when only antenna is plugged in we convey a sufficiently large number to indicate open circuit Change-Id: I5c0eef1d485b3a24765dc0b6cceede77fa748a65 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 6446a44a41f..3569da39b80 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1463,6 +1463,9 @@ static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, int val info->antenna_debounce = 0; info->antenna_count = 0; info->mic = false; + /* Use a sufficiently large number to indicate open circuit */ + if (arizona->pdata.hpdet_cb) + arizona->pdata.hpdet_cb(ARIZONA_HP_Z_OPEN); arizona_extcon_report(info, BIT_ANTENNA); arizona_jds_set_state(info, &arizona_antenna_oc_det); } else { From fc9811d5d2213128b52514fd3da8916701347663 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 19 Jan 2015 09:31:00 +0000 Subject: [PATCH 0608/1167] mfd: clearwater: Specify DMIC references per input not per channel The DMIC references are specified per input not per channel like the input modes. This patch corrects this in the parsing of the pdata/DT. Change-Id: I9d99d6ad4a89de38a2358387ab27cb59ca4fd0be Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 520fb69c314..c5e719eb9df 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1952,7 +1952,7 @@ int arizona_dev_init(struct arizona *arizona) << ARIZONA_IN1R_SRC_SE_SHIFT); break; default: - val = arizona->pdata.dmic_ref[2*i] + val = arizona->pdata.dmic_ref[i] << ARIZONA_IN1_DMIC_SUP_SHIFT; val |= (arizona->pdata.inmode[2*i] & 2) << (ARIZONA_IN1_MODE_SHIFT - 1); From da13e147d755b13faeb99cb14f4c4ad50432a64f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 19 Jan 2015 09:43:22 +0000 Subject: [PATCH 0609/1167] ASoC: clearwater: Update Sample Rate 1 default to 48kHz For cases where no hw_params is called update Sample Rate 1 to default to 48kHz to ensure sensible operation. Change-Id: I8d5c7e11b2d9fdd3a2c7d3b30787aa66cdce4811 Signed-off-by: Charles Keepax --- sound/soc/codecs/clearwater.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 526a24bfb7a..5ce45f134c3 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2529,6 +2529,10 @@ static int clearwater_codec_probe(struct snd_soc_codec *codec) arizona_init_mono(codec); arizona_init_input(codec); + /* Update Sample Rate 1 to 48kHz for cases when no AIF1 hw_params */ + regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_1, + ARIZONA_SAMPLE_RATE_1_MASK, 0x03); + ret = snd_soc_add_codec_controls(codec, wm_adsp2v2_fw_controls, 14); if (ret != 0) return ret; From 60c5dc1829c976258c424729b4bbd9e9097c549c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 20 Jan 2015 14:54:08 +0000 Subject: [PATCH 0610/1167] regulator: arizona-ldo1: Ensure DCVDD stays off until we assert it Change-Id: Ic15f623469c34a542df64c9ff78b566ddcda748d Signed-off-by: Charles Keepax --- drivers/regulator/arizona-ldo1.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/regulator/arizona-ldo1.c b/drivers/regulator/arizona-ldo1.c index 5647aa13aa5..eea6414b73b 100644 --- a/drivers/regulator/arizona-ldo1.c +++ b/drivers/regulator/arizona-ldo1.c @@ -266,6 +266,7 @@ static int arizona_ldo1_probe(struct platform_device *pdev) } config.ena_gpio = arizona->pdata.ldoena; + config.ena_gpio_flags = GPIOF_OUT_INIT_LOW; if (arizona->pdata.ldo1) config.init_data = arizona->pdata.ldo1; From d6b7bd1c950f1b402a493273ad10bf94daaf8bcd Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 20 Jan 2015 14:30:51 +0000 Subject: [PATCH 0611/1167] mfd: arizona: Ensure minimum DCVDD off period of 20mS Ensure that DCVDD is never disabled for less than 20mS, to ensure good power on reset state on the CODEC. Change-Id: I7723c0b85fe5408cc221e7e1dea6ad2a2a33f680 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 33 ++++++++++++++++++++++++++++++-- include/linux/mfd/arizona/core.h | 1 + 2 files changed, 32 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index c5e719eb9df..09f967d21f8 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -575,6 +576,20 @@ static int arizona_restore_dvfs(struct arizona *arizona) return ret; } +static int arizona_dcvdd_notify(struct notifier_block *nb, + unsigned long action, void *data) +{ + struct arizona *arizona = container_of(nb, struct arizona, + dcvdd_notifier); + + dev_dbg(arizona->dev, "DCVDD notify %lx\n", action); + + if (action & REGULATOR_EVENT_DISABLE) + msleep(20); + + return NOTIFY_DONE; +} + static int arizona_runtime_resume(struct device *dev) { struct arizona *arizona = dev_get_drvdata(dev); @@ -1518,6 +1533,14 @@ int arizona_dev_init(struct arizona *arizona) goto err_early; } + arizona->dcvdd_notifier.notifier_call = arizona_dcvdd_notify; + ret = regulator_register_notifier(arizona->dcvdd, + &arizona->dcvdd_notifier); + if (ret < 0) { + dev_err(dev, "Failed to register DCVDD notifier %d\n", ret); + goto err_dcvdd; + } + if (arizona->pdata.reset) { /* Start out with /RESET low to put the chip into reset */ ret = gpio_request_one(arizona->pdata.reset, @@ -1525,16 +1548,19 @@ int arizona_dev_init(struct arizona *arizona) "arizona /RESET"); if (ret != 0) { dev_err(dev, "Failed to request /RESET: %d\n", ret); - goto err_dcvdd; + goto err_notifier; } } + /* Ensure period of reset asserted before we apply the supplies */ + msleep(20); + ret = regulator_bulk_enable(arizona->num_core_supplies, arizona->core_supplies); if (ret != 0) { dev_err(dev, "Failed to enable core supplies: %d\n", ret); - goto err_dcvdd; + goto err_notifier; } ret = regulator_enable(arizona->dcvdd); @@ -2069,6 +2095,8 @@ int arizona_dev_init(struct arizona *arizona) err_enable: regulator_bulk_disable(arizona->num_core_supplies, arizona->core_supplies); +err_notifier: + regulator_unregister_notifier(arizona->dcvdd, &arizona->dcvdd_notifier); err_dcvdd: regulator_put(arizona->dcvdd); err_early: @@ -2082,6 +2110,7 @@ int arizona_dev_exit(struct arizona *arizona) pm_runtime_disable(arizona->dev); regulator_disable(arizona->dcvdd); + regulator_unregister_notifier(arizona->dcvdd, &arizona->dcvdd_notifier); regulator_put(arizona->dcvdd); mfd_remove_devices(arizona->dev); diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 8c4f2286240..bc8950067b5 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -129,6 +129,7 @@ struct arizona { int num_core_supplies; struct regulator_bulk_data core_supplies[ARIZONA_MAX_CORE_SUPPLIES]; struct regulator *dcvdd; + struct notifier_block dcvdd_notifier; struct arizona_pdata pdata; From eb1c6075bda032a04cabee0cf7eedb1f21b26bf0 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 21 Jan 2015 13:25:40 +0000 Subject: [PATCH 0612/1167] switch: arizona: Always go to button detection when antenna connected Change-Id: I9579e2ed78ecdb00b765545e9937da05c06d3f9a Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 3569da39b80..bbdf9d3fc9c 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1583,12 +1583,12 @@ static int arizona_antenna_hp_reading(struct arizona_extcon_info *info, int val) if (info->mic) { arizona_extcon_report(info, BIT_HEADSET); info->antenna_skip_btn_db = false; - arizona_jds_set_state(info, &arizona_antenna_button_det); } else { arizona_extcon_report(info, BIT_HEADSET_NO_MIC); - arizona_jds_set_state(info, NULL); } + arizona_jds_set_state(info, &arizona_antenna_button_det); + return 0; } From 2589f91567e695f5c55d3351e5089d5fc5470a1b Mon Sep 17 00:00:00 2001 From: Vitaly Rodionov Date: Thu, 22 Jan 2015 09:48:24 +0000 Subject: [PATCH 0613/1167] switch: arizona: handle 3-pole jack removal and 4-pole jack half way insertion. When 3-pole jack is removed there will be one false callback with mic set to one. When 4-pole jack is inserted half way throught callback notifing 3-pole jack/no mic, then if 4-pole jack have been pushed into right position then no callback is called. This patch is handling both situations. Change-Id: I776bef2c5a4ca22dc9e1af5d0082f25f4a960d1e Signed-off-by: Vitaly Rodionov --- drivers/switch/switch-arizona.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index bbdf9d3fc9c..97152985f1a 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -70,6 +70,9 @@ #define HP_LOW_IMPEDANCE_LIMIT 13 +#define ANTENNA_3_POLE_INSERTED 0x2 +#define ANTENNA_4_POLE_INSERTED 0x4 + struct arizona_hpdet_d_trims { int off; int grad_x2; @@ -103,6 +106,7 @@ struct arizona_extcon_info { int antenna_cnt_plugout; int antenna_res_old_plugout; bool antenna_skip_btn_db; + int antenna_state; int moisture_count; struct delayed_work hpdet_work; @@ -1547,6 +1551,9 @@ static int arizona_antenna_oc_reading(struct arizona_extcon_info *info, int val) if (arizona->pdata.micd_cb) arizona->pdata.micd_cb(info->mic); + // remember antenna state + info->antenna_state = info->mic ? ANTENNA_4_POLE_INSERTED : ANTENNA_3_POLE_INSERTED; + return 0; } @@ -1650,14 +1657,19 @@ static int arizona_antenna_button_reading(struct arizona_extcon_info *info, info->antenna_skip_btn_db = false; ret = arizona_antenna_mic_reading(info, val); } else { - mic = val & ARIZONA_MICD_LVL_8 ? true : false; if (mic && mic != info->mic) { - info->mic = mic; - info->antenna_skip_btn_db = true; - if (arizona->pdata.micd_cb) - arizona->pdata.micd_cb(info->mic); - arizona_extcon_report(info, BIT_HEADSET); + // if 3 pole jack was inserted, this could be false event on removal + // or 4 pole jack was inserted half way through and then pushed, + // check jack again and notify proper state. + if(info->antenna_state & ANTENNA_3_POLE_INSERTED) { + arizona_jds_set_state(info, &arizona_antenna_mic_det); + return -EAGAIN; + } else { + info->mic = mic; + info->antenna_skip_btn_db = true; + arizona_extcon_report(info, BIT_HEADSET); + } } if (info->mic)/* previous hs det so check for button */ From 6c964901cc624d244954aadbf4da0e9e5f0292e0 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 22 Jan 2015 16:54:08 +0000 Subject: [PATCH 0614/1167] ASoC: florida: Sync headphone write sequences on DRE control changes If the headphone output is enabled we need to sync the enable/disable write sequences when the DRE control is changed such that the correct sequence is run when the output is disabled. Change-Id: I182f53957d98375dcaffedf7519faa3b97882524 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 83 ++++++++++++++++++++++++++++++++++++++ sound/soc/codecs/arizona.h | 3 ++ sound/soc/codecs/florida.c | 15 ++++--- 3 files changed, 95 insertions(+), 6 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 45f4b508218..e563d1ccfe1 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1732,6 +1732,89 @@ static int florida_hp_post_disable(struct snd_soc_dapm_widget *w) return 0; } +static int arizona_set_dre(struct arizona *arizona, unsigned int shift, + bool enable) +{ + unsigned int mask = 1 << shift; + unsigned int val = 0; + const struct reg_default *wseq; + int nregs; + bool change; + + if (enable) { + regmap_update_bits_check(arizona->regmap, ARIZONA_DRE_ENABLE, + mask, mask, &change); + if (!change) + return 0; + + switch (shift) { + case ARIZONA_DRE1L_ENA_SHIFT: + mask = ARIZONA_OUT1L_ENA; + wseq = florida_dre_left_enable; + nregs = ARRAY_SIZE(florida_dre_left_enable); + break; + case ARIZONA_DRE1R_ENA_SHIFT: + mask = ARIZONA_OUT1R_ENA; + wseq = florida_dre_right_enable; + nregs = ARRAY_SIZE(florida_dre_right_enable); + break; + default: + return 0; + } + } else { + regmap_update_bits_check(arizona->regmap, ARIZONA_DRE_ENABLE, + mask, 0, &change); + if (!change) + return 0; + + switch (shift) { + case ARIZONA_DRE1L_ENA_SHIFT: + mask = ARIZONA_OUT1L_ENA; + wseq = florida_no_dre_left_enable; + nregs = ARRAY_SIZE(florida_no_dre_left_enable); + break; + case ARIZONA_DRE1R_ENA_SHIFT: + mask = ARIZONA_OUT1R_ENA; + wseq = florida_no_dre_right_enable; + nregs = ARRAY_SIZE(florida_no_dre_right_enable); + break; + default: + return 0; + } + } + + /* If the output is on we need to update the disable sequence */ + regmap_read(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, &val); + + if (val & mask) { + regmap_multi_reg_write(arizona->regmap, wseq, nregs); + udelay(1000); + } + + return 0; +} + +int arizona_put_dre(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + unsigned int lshift = mc->shift; + unsigned int rshift = mc->rshift; + + mutex_lock(&arizona->dapm->card->dapm_mutex); + + arizona_set_dre(arizona, lshift, !!ucontrol->value.integer.value[0]); + arizona_set_dre(arizona, rshift, !!ucontrol->value.integer.value[1]); + + mutex_unlock(&arizona->dapm->card->dapm_mutex); + + return 0; +} +EXPORT_SYMBOL_GPL(arizona_put_dre); + int arizona_out_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index d907fed50e7..f07b2aab087 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -373,6 +373,9 @@ extern int arizona_set_ez2ctrl_cb(struct snd_soc_codec *codec, extern int arizona_set_custom_jd(struct snd_soc_codec *codec, const struct arizona_jd_state *custom_jd); +extern int arizona_put_dre(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); + extern struct regmap *arizona_get_regmap_dsp(struct snd_soc_codec *codec); extern int arizona_enable_force_bypass(struct snd_soc_codec *codec); diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 1ca2dbb5a92..af7e6297b7b 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -529,12 +529,15 @@ SOC_DOUBLE("SPKDAT1 Switch", ARIZONA_PDM_SPK1_CTRL_1, ARIZONA_SPK1L_MUTE_SHIFT, SOC_DOUBLE("SPKDAT2 Switch", ARIZONA_PDM_SPK2_CTRL_1, ARIZONA_SPK2L_MUTE_SHIFT, ARIZONA_SPK2R_MUTE_SHIFT, 1, 1), -SOC_DOUBLE("HPOUT1 DRE Switch", ARIZONA_DRE_ENABLE, - ARIZONA_DRE1L_ENA_SHIFT, ARIZONA_DRE1R_ENA_SHIFT, 1, 0), -SOC_DOUBLE("HPOUT2 DRE Switch", ARIZONA_DRE_ENABLE, - ARIZONA_DRE2L_ENA_SHIFT, ARIZONA_DRE2R_ENA_SHIFT, 1, 0), -SOC_DOUBLE("HPOUT3 DRE Switch", ARIZONA_DRE_ENABLE, - ARIZONA_DRE3L_ENA_SHIFT, ARIZONA_DRE3R_ENA_SHIFT, 1, 0), +SOC_DOUBLE_EXT("HPOUT1 DRE Switch", ARIZONA_DRE_ENABLE, + ARIZONA_DRE1L_ENA_SHIFT, ARIZONA_DRE1R_ENA_SHIFT, 1, 0, + snd_soc_get_volsw, arizona_put_dre), +SOC_DOUBLE_EXT("HPOUT2 DRE Switch", ARIZONA_DRE_ENABLE, + ARIZONA_DRE2L_ENA_SHIFT, ARIZONA_DRE2R_ENA_SHIFT, 1, 0, + snd_soc_get_volsw, arizona_put_dre), +SOC_DOUBLE_EXT("HPOUT3 DRE Switch", ARIZONA_DRE_ENABLE, + ARIZONA_DRE3L_ENA_SHIFT, ARIZONA_DRE3R_ENA_SHIFT, 1, 0, + snd_soc_get_volsw, arizona_put_dre), SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp), SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp), From 59a42390abc25b8eafc7b72ad581d7b77f9d1a43 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 22 Jan 2015 16:59:50 +0000 Subject: [PATCH 0615/1167] ASoC: arizona: Force reset of the PGA volume when DRE is disabled Change-Id: Idb58960052dcb1b82321fccddf4e33eb4faf71cb Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index e563d1ccfe1..d4be8ef557e 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1735,6 +1735,7 @@ static int florida_hp_post_disable(struct snd_soc_dapm_widget *w) static int arizona_set_dre(struct arizona *arizona, unsigned int shift, bool enable) { + unsigned int pga = ARIZONA_OUTPUT_PATH_CONFIG_1L + shift * 4; unsigned int mask = 1 << shift; unsigned int val = 0; const struct reg_default *wseq; @@ -1767,6 +1768,12 @@ static int arizona_set_dre(struct arizona *arizona, unsigned int shift, if (!change) return 0; + /* Force reset of PGA Vol */ + regmap_update_bits(arizona->regmap, pga, + ARIZONA_OUT1L_PGA_VOL_MASK, 0x7F); + regmap_update_bits(arizona->regmap, pga, + ARIZONA_OUT1L_PGA_VOL_MASK, 0x80); + switch (shift) { case ARIZONA_DRE1L_ENA_SHIFT: mask = ARIZONA_OUT1L_ENA; From 07099f8034b17f6a6bc947063ce0fa3f1de7d379 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 22 Jan 2015 09:49:00 +0000 Subject: [PATCH 0616/1167] ASoC: arizona: Add stub for wm_adsp2_early_event As we call wm_adsp2_early_event from arizona.c we need to be careful of situations where the ADSP driver is not included in the build, for example for a CODEC with no ADSP cores. This patch adds a stub function that will replace wm_adsp2_early_event in the case that the ADSP driver is not included in the build. Change-Id: Ie3cf409763f4cddf0bb07792c3ac452db7b5659f Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.h | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 5d6ad4ff005..fabeef91299 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -144,9 +144,20 @@ int wm_adsp1_init(struct wm_adsp *adsp); int wm_adsp2_init(struct wm_adsp *adsp, struct mutex *fw_lock); int wm_adsp1_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); + +#if defined(CONFIG_SND_SOC_WM_ADSP) int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event, unsigned int freq); +#else +static inline int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event, + unsigned int freq) +{ + return 0; +} +#endif + int wm_adsp2_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); From a49f5c6be9dd311f3097f4cc81969db4026b251f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 26 Jan 2015 19:30:11 +0000 Subject: [PATCH 0617/1167] mfd: clearwater: Correct application of 32-bit register patch The 32-bit register patch is needlessly applied bypassing the normal register patch functionality. This patch updates this to actually use the register patch functionality. In the process this fixes a bug where the 32-bit register patch function was being called before the chip revision had been read causing the rev A patch to be applied to all versions of the chip. Change-Id: Ia304cc69a238846bc62e31265494a32b13e3a285 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 18 ------------- drivers/mfd/clearwater-tables.c | 43 +++++++++++++++++++------------- include/linux/mfd/arizona/core.h | 1 - 3 files changed, 26 insertions(+), 36 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 09f967d21f8..e6777eabcfa 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -740,15 +740,6 @@ static int arizona_runtime_resume(struct device *dev) goto err; } -#ifdef CONFIG_MFD_CLEARWATER - if (arizona->type == WM8285 || arizona->type == WM1840) { - ret = clearwater_patch_32(arizona); - if (ret != 0) { - dev_err(arizona->dev, "Failed to apply 32 bit register patch\n"); - goto err; - } - } -#endif ret = arizona_restore_dvfs(arizona); if (ret < 0) goto err; @@ -1618,15 +1609,6 @@ int arizona_dev_init(struct arizona *arizona) dev_err(dev, "Failed to sync device: %d\n", ret); goto err_reset; } -#ifdef CONFIG_MFD_CLEARWATER - if (arizona->type == WM8285 || arizona->type == WM1840) { - ret = clearwater_patch_32(arizona); - if (ret != 0) { - dev_err(arizona->dev, "Failed to apply 32 bit register patch\n"); - goto err_reset; - } - } -#endif } /* Ensure device startup is complete */ diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index 445c7c81dac..6b869ba8ed9 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -46,7 +46,7 @@ static const struct reg_default clearwater_reva_16_patch[] = { { 0x80, 0x0000 }, }; -static const struct reg_default clearwater_revb_16_patch[] = { +static const struct reg_default clearwater_revc_16_patch[] = { { 0x27E, 0x0001 }, }; @@ -307,33 +307,42 @@ EXPORT_SYMBOL_GPL(clearwater_patch_32); int clearwater_patch(struct arizona *arizona) { int ret = 0; + const struct reg_default *patch16 = NULL; + const struct reg_default *patch32 = NULL; + unsigned int num16, num32; switch (arizona->rev) { case 0: case 1: - ret = regmap_register_patch(arizona->regmap, - clearwater_reva_16_patch, - ARRAY_SIZE(clearwater_reva_16_patch)); - if (ret < 0) { - dev_err(arizona->dev, "Error in applying Clearwater Rev A 16 bit patch\n"); - return ret; - } - ret = clearwater_patch_32(arizona); + patch16 = clearwater_reva_16_patch; + num16 = ARRAY_SIZE(clearwater_reva_16_patch); + + patch32 = clearwater_reva_32_patch; + num32 = ARRAY_SIZE(clearwater_reva_32_patch); + break; + default: + patch16 = clearwater_revc_16_patch; + num16 = ARRAY_SIZE(clearwater_revc_16_patch); + break; + } + + if (patch16) { + ret = regmap_register_patch(arizona->regmap, patch16, num16); if (ret < 0) { - dev_err(arizona->dev, "Error in applying Clearwater Rev A 32 bit patch\n"); + dev_err(arizona->dev, + "Error in applying 16-bit patch: %d\n", ret); return ret; } - break; - default: - ret = regmap_register_patch(arizona->regmap, - clearwater_revb_16_patch, - ARRAY_SIZE(clearwater_revb_16_patch)); + } + + if (patch32) { + ret = regmap_register_patch(arizona->regmap_32bit, + patch32, num32); if (ret < 0) { dev_err(arizona->dev, - "Error in applying Clearwater Rev B 16 bit patch\n"); + "Error in applying 32-bit patch: %d\n", ret); return ret; } - break; } return 0; diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index bc8950067b5..219236619cc 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -188,7 +188,6 @@ int florida_patch(struct arizona *arizona); int wm8997_patch(struct arizona *arizona); int wm8998_patch(struct arizona *arizona); int clearwater_patch(struct arizona *arizona); -int clearwater_patch_32(struct arizona *arizona); int cs47l24_patch(struct arizona *arizona); extern int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, From ddd288d17a039e56f179eca18449f4faaa60eda5 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 27 Jan 2015 11:27:37 +0000 Subject: [PATCH 0618/1167] ASoC: clearwater: Reset DCS when powering down headphones Change-Id: I0f4f7617829c6ac3aad9c40c1562c17a26c79395 Signed-off-by: Charles Keepax --- drivers/mfd/clearwater-tables.c | 4 ++++ include/linux/mfd/arizona/registers.h | 2 ++ sound/soc/codecs/arizona.c | 22 +++++++++++++++++++++- 3 files changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index 6b869ba8ed9..4ca172d3021 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -2006,6 +2006,8 @@ static bool clearwater_16bit_readable_register(struct device *dev, unsigned int case ARIZONA_HP_CTRL_2R: case ARIZONA_HP_CTRL_3L: case ARIZONA_HP_CTRL_3R: + case ARIZONA_DCS_HP1L_CONTROL: + case ARIZONA_DCS_HP1R_CONTROL: case ARIZONA_ACCESSORY_DETECT_MODE_1: case ARIZONA_HEADPHONE_DETECT_1: case ARIZONA_HEADPHONE_DETECT_2: @@ -3216,6 +3218,8 @@ static bool clearwater_16bit_volatile_register(struct device *dev, unsigned int case ARIZONA_SAMPLE_RATE_2_STATUS: case ARIZONA_SAMPLE_RATE_3_STATUS: case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: + case ARIZONA_DCS_HP1L_CONTROL: + case ARIZONA_DCS_HP1R_CONTROL: case ARIZONA_MIC_DETECT_3: case ARIZONA_MIC_DETECT_4: case ARIZONA_HEADPHONE_DETECT_2: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index bd26e7b36dc..a2555588bc2 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -155,6 +155,8 @@ #define ARIZONA_HP_CTRL_2R 0x228 #define ARIZONA_HP_CTRL_3L 0x229 #define ARIZONA_HP_CTRL_3R 0x22A +#define ARIZONA_DCS_HP1L_CONTROL 0x232 +#define ARIZONA_DCS_HP1R_CONTROL 0x238 #define ARIZONA_ACCESSORY_DETECT_MODE_1 0x293 #define ARIZONA_HEADPHONE_DETECT_1 0x29B #define ARIZONA_HEADPHONE_DETECT_2 0x29C diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index d4be8ef557e..5239ff4c300 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1883,6 +1883,7 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); unsigned int mask = 1 << w->shift; unsigned int val; + int ret; switch (event) { case SND_SOC_DAPM_PRE_PMU: @@ -1911,12 +1912,31 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, switch (priv->arizona->type) { case WM5110: florida_hp_post_disable(w); + ret = arizona_out_ev(w, kcontrol, event); + break; + case WM8285: + case WM1840: + ret = arizona_out_ev(w, kcontrol, event); + switch (w->shift) { + case ARIZONA_OUT1L_ENA_SHIFT: + snd_soc_write(w->codec, + ARIZONA_DCS_HP1L_CONTROL, + 0x2006); + break; + case ARIZONA_OUT1R_ENA_SHIFT: + snd_soc_write(w->codec, + ARIZONA_DCS_HP1R_CONTROL, + 0x2006); + break; + default: + break; + } break; default: break; } - return arizona_out_ev(w, kcontrol, event); + return ret; default: return -EINVAL; } From 74961cd5d1bafa17019975b0629f74dff31610ed Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 27 Jan 2015 12:08:46 +0000 Subject: [PATCH 0619/1167] mfd: clearwater: Remove unused function clearwater_patch_32 should have been removed in this patch: commit a49f5c6be9dd311f3097f4cc81969db4026b251f mfd: clearwater: Correct application of 32-bit register patch But was overlooked this patch removes it. Change-Id: I632ac2ca03f1a39f5622a3eaabf91de6275ba897 Signed-off-by: Charles Keepax --- drivers/mfd/clearwater-tables.c | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index 4ca172d3021..7426bfa83e8 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -289,20 +289,6 @@ static const struct reg_default clearwater_reva_32_patch[] = { { 0x31DC, 0x222AFB02}, }; -int clearwater_patch_32(struct arizona *arizona) -{ - switch (arizona->rev) { - case 0: - case 1: - return regmap_multi_reg_write_bypassed(arizona->regmap_32bit, - clearwater_reva_32_patch, - ARRAY_SIZE(clearwater_reva_32_patch)); - default: - return 0; - } -} -EXPORT_SYMBOL_GPL(clearwater_patch_32); - /* We use a function so we can use ARRAY_SIZE() */ int clearwater_patch(struct arizona *arizona) { From d84e50a28e877a0ace68d8dc04ecf60509c61759 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 27 Jan 2015 12:12:24 +0000 Subject: [PATCH 0620/1167] ASoC: clearwater: Add sync for 32-bit register map This shouldn't be necessary for the current patch/registers but best to do it incase it is needed in the future. Change-Id: I119c49ae7afd90c825d4ae40484f5b547fc85d94 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 14 +++++++++++++- drivers/mfd/clearwater-tables.c | 4 ++-- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index e6777eabcfa..68458c1a7f0 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -736,10 +736,20 @@ static int arizona_runtime_resume(struct device *dev) ret = regcache_sync(arizona->regmap); if (ret != 0) { - dev_err(arizona->dev, "Failed to restore register cache\n"); + dev_err(arizona->dev, + "Failed to restore 16-bit register cache\n"); goto err; } + if (arizona->regmap_32bit) { + ret = regcache_sync(arizona->regmap_32bit); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to restore 32-bit register cache\n"); + goto err; + } + } + ret = arizona_restore_dvfs(arizona); if (ret < 0) goto err; @@ -817,6 +827,8 @@ static int arizona_runtime_suspend(struct device *dev) regcache_cache_only(arizona->regmap, true); regcache_mark_dirty(arizona->regmap); + if (arizona->regmap_32bit) + regcache_mark_dirty(arizona->regmap_32bit); regulator_disable(arizona->dcvdd); return 0; diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index 7426bfa83e8..40e41f3fdf5 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -3353,7 +3353,7 @@ const struct regmap_config clearwater_32bit_spi_regmap = { .readable_reg = clearwater_32bit_readable_register, .volatile_reg = clearwater_32bit_volatile_register, - .cache_type = REGCACHE_NONE, + .cache_type = REGCACHE_RBTREE, }; EXPORT_SYMBOL_GPL(clearwater_32bit_spi_regmap); @@ -3367,6 +3367,6 @@ const struct regmap_config clearwater_32bit_i2c_regmap = { .readable_reg = clearwater_32bit_readable_register, .volatile_reg = clearwater_32bit_volatile_register, - .cache_type = REGCACHE_NONE, + .cache_type = REGCACHE_RBTREE, }; EXPORT_SYMBOL_GPL(clearwater_32bit_i2c_regmap); From b94a49de3b1949cf9e83a66419c88b71a81b3a7c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 27 Jan 2015 13:00:25 +0000 Subject: [PATCH 0621/1167] mfd: clearwater: Add new register patch Change-Id: I63456ffd1e9114386f015b8fdad2ca11641ba34f Signed-off-by: Charles Keepax --- drivers/mfd/clearwater-tables.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index 40e41f3fdf5..dc69fb771aa 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -289,6 +289,27 @@ static const struct reg_default clearwater_reva_32_patch[] = { { 0x31DC, 0x222AFB02}, }; +static const struct reg_default clearwater_revc_32_patch[] = { + { 0x3380, 0xE4103066 }, + { 0x3382, 0xE4103070 }, + { 0x3384, 0xE4103078 }, + { 0x3386, 0xE4103080 }, + { 0x3388, 0xE410F080 }, + { 0x338A, 0xE4143066 }, + { 0x338C, 0xE4143070 }, + { 0x338E, 0xE4143078 }, + { 0x3390, 0xE4143080 }, + { 0x3392, 0xE414F080 }, + { 0x3394, 0xE4103078 }, + { 0x3396, 0xE4103070 }, + { 0x3398, 0xE4103066 }, + { 0x339A, 0xE410F056 }, + { 0x339C, 0xE4143078 }, + { 0x339E, 0xE4143070 }, + { 0x33A0, 0xE4143066 }, + { 0x33A2, 0xE414F056 }, +}; + /* We use a function so we can use ARRAY_SIZE() */ int clearwater_patch(struct arizona *arizona) { @@ -309,6 +330,9 @@ int clearwater_patch(struct arizona *arizona) default: patch16 = clearwater_revc_16_patch; num16 = ARRAY_SIZE(clearwater_revc_16_patch); + + patch32 = clearwater_revc_32_patch; + num32 = ARRAY_SIZE(clearwater_revc_32_patch); break; } From 28a22fbe3c99a5b6c7a4b2d3ac631185c0e8591c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 27 Jan 2015 13:15:30 +0000 Subject: [PATCH 0622/1167] ASoC: clearwater: Add additional no DRE disable/enable sequences Change-Id: I0a971be2dd6044e58f9c4ac8bece5838efb56fd7 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 174 ++++++++++++++++++++++++++++++++++--- 1 file changed, 160 insertions(+), 14 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 5239ff4c300..3b8201a21c1 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1822,6 +1822,150 @@ int arizona_put_dre(struct snd_kcontrol *kcontrol, } EXPORT_SYMBOL_GPL(arizona_put_dre); +static int clearwater_hp_pre_enable(struct snd_soc_dapm_widget *w) +{ + unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); + + switch (w->shift) { + case ARIZONA_OUT1L_ENA_SHIFT: + if (!(val & ARIZONA_DRE1L_ENA_MASK)) + snd_soc_update_bits(w->codec, + ARIZONA_OUTPUT_PATH_CONFIG_1L, + ARIZONA_OUT1L_PGA_VOL_MASK, + 0x56); + break; + + case ARIZONA_OUT1R_ENA_SHIFT: + if (!(val & ARIZONA_DRE1R_ENA_MASK)) + snd_soc_update_bits(w->codec, + ARIZONA_OUTPUT_PATH_CONFIG_1R, + ARIZONA_OUT1R_PGA_VOL_MASK, + 0x56); + break; + + default: + break; + } + + return 0; +} + +static int clearwater_hp_post_enable(struct snd_soc_dapm_widget *w) +{ + unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); + + switch (w->shift) { + case ARIZONA_OUT1L_ENA_SHIFT: + if (!(val & ARIZONA_DRE1L_ENA_MASK)) { + snd_soc_write(w->codec, + ARIZONA_WRITE_SEQUENCER_CTRL_0, + ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | + 0x1c0); + msleep(10); + snd_soc_update_bits(w->codec, + ARIZONA_OUTPUT_PATH_CONFIG_1L, + ARIZONA_OUT1L_PGA_VOL_MASK, + 0x80); + } + break; + + case ARIZONA_OUT1R_ENA_SHIFT: + if (!(val & ARIZONA_DRE1R_ENA_MASK)) { + snd_soc_write(w->codec, + ARIZONA_WRITE_SEQUENCER_CTRL_0, + ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | + 0x1c5); + msleep(10); + snd_soc_update_bits(w->codec, + ARIZONA_OUTPUT_PATH_CONFIG_1R, + ARIZONA_OUT1R_PGA_VOL_MASK, + 0x80); + } + break; + + default: + break; + } + + return 0; +} + +static int clearwater_hp_pre_disable(struct snd_soc_dapm_widget *w) +{ + unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); + + switch (w->shift) { + case ARIZONA_OUT1L_ENA_SHIFT: + if (!(val & ARIZONA_DRE1L_ENA_MASK)) { + snd_soc_write(w->codec, + ARIZONA_WRITE_SEQUENCER_CTRL_0, + ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | + 0x1ca); + msleep(10); + snd_soc_update_bits(w->codec, + ARIZONA_OUTPUT_PATH_CONFIG_1L, + ARIZONA_OUT1L_PGA_VOL_MASK, + 0x56); + } + break; + + case ARIZONA_OUT1R_ENA_SHIFT: + if (!(val & ARIZONA_DRE1R_ENA_MASK)) { + snd_soc_write(w->codec, + ARIZONA_WRITE_SEQUENCER_CTRL_0, + ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | + 0x1ce); + msleep(10); + snd_soc_update_bits(w->codec, + ARIZONA_OUTPUT_PATH_CONFIG_1R, + ARIZONA_OUT1R_PGA_VOL_MASK, + 0x56); + } + break; + + default: + break; + } + + return 0; +} + +static int clearwater_hp_post_disable(struct snd_soc_dapm_widget *w) +{ + unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); + + switch (w->shift) { + case ARIZONA_OUT1L_ENA_SHIFT: + if (!(val & ARIZONA_DRE1L_ENA_MASK)) { + snd_soc_write(w->codec, + ARIZONA_DCS_HP1L_CONTROL, + 0x2006); + snd_soc_update_bits(w->codec, + ARIZONA_OUTPUT_PATH_CONFIG_1L, + ARIZONA_OUT1L_PGA_VOL_MASK, + 0x80); + } + break; + + case ARIZONA_OUT1R_ENA_SHIFT: + if (!(val & ARIZONA_DRE1R_ENA_MASK)) { + snd_soc_write(w->codec, + ARIZONA_DCS_HP1R_CONTROL, + 0x2006); + snd_soc_update_bits(w->codec, + ARIZONA_OUTPUT_PATH_CONFIG_1R, + ARIZONA_OUT1R_PGA_VOL_MASK, + 0x80); + } + break; + + default: + break; + } + + return 0; +} + int arizona_out_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) @@ -1839,6 +1983,10 @@ int arizona_out_ev(struct snd_soc_dapm_widget *w, case WM5110: florida_hp_post_enable(w); break; + case WM8285: + case WM1840: + clearwater_hp_post_enable(w); + break; default: break; } @@ -1891,6 +2039,10 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, case WM5110: florida_hp_pre_enable(w); break; + case WM8285: + case WM1840: + clearwater_hp_pre_enable(w); + break; default: break; } @@ -1904,6 +2056,10 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, case WM5110: florida_hp_pre_disable(w); break; + case WM8285: + case WM1840: + clearwater_hp_pre_disable(w); + break; default: break; } @@ -1917,22 +2073,12 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, case WM8285: case WM1840: ret = arizona_out_ev(w, kcontrol, event); - switch (w->shift) { - case ARIZONA_OUT1L_ENA_SHIFT: - snd_soc_write(w->codec, - ARIZONA_DCS_HP1L_CONTROL, - 0x2006); - break; - case ARIZONA_OUT1R_ENA_SHIFT: - snd_soc_write(w->codec, - ARIZONA_DCS_HP1R_CONTROL, - 0x2006); - break; - default: - break; - } + + clearwater_hp_post_disable(w); + break; default: + ret = 0; break; } From c1c4c96aba9b29e1426492daab906b25922cc376 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 27 Jan 2015 16:23:23 +0000 Subject: [PATCH 0623/1167] ASoC: clearwater: Lock DAPM mutex when changing DRE As the DRE is involved heavily in the output power up and down sequences hold the DAPM mutex whilst enabling/disabling it. Change-Id: Ib0c64cbb747d35ffaae7bf17067363b8d75048e5 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 27 ++++++++++++++++++++++----- sound/soc/codecs/arizona.h | 4 +++- sound/soc/codecs/clearwater.c | 15 +++++++++------ sound/soc/codecs/florida.c | 6 +++--- 4 files changed, 37 insertions(+), 15 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 3b8201a21c1..7e4b91d924e 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1732,7 +1732,7 @@ static int florida_hp_post_disable(struct snd_soc_dapm_widget *w) return 0; } -static int arizona_set_dre(struct arizona *arizona, unsigned int shift, +static int florida_set_dre(struct arizona *arizona, unsigned int shift, bool enable) { unsigned int pga = ARIZONA_OUTPUT_PATH_CONFIG_1L + shift * 4; @@ -1801,7 +1801,7 @@ static int arizona_set_dre(struct arizona *arizona, unsigned int shift, return 0; } -int arizona_put_dre(struct snd_kcontrol *kcontrol, +int florida_put_dre(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); @@ -1813,14 +1813,31 @@ int arizona_put_dre(struct snd_kcontrol *kcontrol, mutex_lock(&arizona->dapm->card->dapm_mutex); - arizona_set_dre(arizona, lshift, !!ucontrol->value.integer.value[0]); - arizona_set_dre(arizona, rshift, !!ucontrol->value.integer.value[1]); + florida_set_dre(arizona, lshift, !!ucontrol->value.integer.value[0]); + florida_set_dre(arizona, rshift, !!ucontrol->value.integer.value[1]); mutex_unlock(&arizona->dapm->card->dapm_mutex); return 0; } -EXPORT_SYMBOL_GPL(arizona_put_dre); +EXPORT_SYMBOL_GPL(florida_put_dre); + +int clearwater_put_dre(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + int ret; + + mutex_lock(&arizona->dapm->card->dapm_mutex); + + ret = snd_soc_put_volsw(kcontrol, ucontrol); + + mutex_unlock(&arizona->dapm->card->dapm_mutex); + + return ret; +} +EXPORT_SYMBOL_GPL(clearwater_put_dre); static int clearwater_hp_pre_enable(struct snd_soc_dapm_widget *w) { diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index f07b2aab087..2946b47ed9f 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -373,8 +373,10 @@ extern int arizona_set_ez2ctrl_cb(struct snd_soc_codec *codec, extern int arizona_set_custom_jd(struct snd_soc_codec *codec, const struct arizona_jd_state *custom_jd); -extern int arizona_put_dre(struct snd_kcontrol *kcontrol, +extern int florida_put_dre(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); +extern int clearwater_put_dre(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); extern struct regmap *arizona_get_regmap_dsp(struct snd_soc_codec *codec); diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 5ce45f134c3..2e8ce1a8105 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -656,12 +656,15 @@ SOC_DOUBLE("SPKDAT1 Switch", ARIZONA_PDM_SPK1_CTRL_1, ARIZONA_SPK1L_MUTE_SHIFT, SOC_DOUBLE("SPKDAT2 Switch", ARIZONA_PDM_SPK2_CTRL_1, ARIZONA_SPK2L_MUTE_SHIFT, ARIZONA_SPK2R_MUTE_SHIFT, 1, 1), -SOC_DOUBLE("HPOUT1 DRE Switch", ARIZONA_DRE_ENABLE, - ARIZONA_DRE1L_ENA_SHIFT, ARIZONA_DRE1R_ENA_SHIFT, 1, 0), -SOC_DOUBLE("HPOUT2 DRE Switch", ARIZONA_DRE_ENABLE, - ARIZONA_DRE2L_ENA_SHIFT, ARIZONA_DRE2R_ENA_SHIFT, 1, 0), -SOC_DOUBLE("HPOUT3 DRE Switch", ARIZONA_DRE_ENABLE, - ARIZONA_DRE3L_ENA_SHIFT, ARIZONA_DRE3R_ENA_SHIFT, 1, 0), +SOC_DOUBLE_EXT("HPOUT1 DRE Switch", ARIZONA_DRE_ENABLE, + ARIZONA_DRE1L_ENA_SHIFT, ARIZONA_DRE1R_ENA_SHIFT, 1, 0, + snd_soc_get_volsw, clearwater_put_dre), +SOC_DOUBLE_EXT("HPOUT2 DRE Switch", ARIZONA_DRE_ENABLE, + ARIZONA_DRE2L_ENA_SHIFT, ARIZONA_DRE2R_ENA_SHIFT, 1, 0, + snd_soc_get_volsw, clearwater_put_dre), +SOC_DOUBLE_EXT("HPOUT3 DRE Switch", ARIZONA_DRE_ENABLE, + ARIZONA_DRE3L_ENA_SHIFT, ARIZONA_DRE3R_ENA_SHIFT, 1, 0, + snd_soc_get_volsw, clearwater_put_dre), SOC_DOUBLE("HPOUT1 EDRE Switch", CLEARWATER_EDRE_ENABLE, CLEARWATER_EDRE_OUT1L_THR1_ENA_SHIFT, diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index af7e6297b7b..f1e94b4591c 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -531,13 +531,13 @@ SOC_DOUBLE("SPKDAT2 Switch", ARIZONA_PDM_SPK2_CTRL_1, ARIZONA_SPK2L_MUTE_SHIFT, SOC_DOUBLE_EXT("HPOUT1 DRE Switch", ARIZONA_DRE_ENABLE, ARIZONA_DRE1L_ENA_SHIFT, ARIZONA_DRE1R_ENA_SHIFT, 1, 0, - snd_soc_get_volsw, arizona_put_dre), + snd_soc_get_volsw, florida_put_dre), SOC_DOUBLE_EXT("HPOUT2 DRE Switch", ARIZONA_DRE_ENABLE, ARIZONA_DRE2L_ENA_SHIFT, ARIZONA_DRE2R_ENA_SHIFT, 1, 0, - snd_soc_get_volsw, arizona_put_dre), + snd_soc_get_volsw, florida_put_dre), SOC_DOUBLE_EXT("HPOUT3 DRE Switch", ARIZONA_DRE_ENABLE, ARIZONA_DRE3L_ENA_SHIFT, ARIZONA_DRE3R_ENA_SHIFT, 1, 0, - snd_soc_get_volsw, arizona_put_dre), + snd_soc_get_volsw, florida_put_dre), SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp), SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp), From 4b4af9b68433c2b22a93fa970fb48fbbf81f7875 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 16 Dec 2014 19:55:02 +0000 Subject: [PATCH 0624/1167] switch: arizona: Return mic impedance in ohms rather than levels Change-Id: I4820b4a780103dfd7e38c7583ed12cdc25b289c1 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 76 +++++++++++++++++++-------------- 1 file changed, 44 insertions(+), 32 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 97152985f1a..15208a2b954 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -61,7 +61,6 @@ #define HPDET_DEBOUNCE 500 #define DEFAULT_MICD_TIMEOUT 2000 -#define QUICK_HEADPHONE_MAX_OHM 3 #define MICROPHONE_MIN_OHM 1257 #define MICROPHONE_MAX_OHM 30000 @@ -487,15 +486,6 @@ static int arizona_micd_read(struct arizona_extcon_info *info) else val = INT_MAX; - if (val <= QUICK_HEADPHONE_MAX_OHM) - val = ARIZONA_MICD_STS | ARIZONA_MICD_LVL_0; - else if (val <= MICROPHONE_MIN_OHM) - val = ARIZONA_MICD_STS | ARIZONA_MICD_LVL_1; - else if (val <= MICROPHONE_MAX_OHM) - val = ARIZONA_MICD_STS | ARIZONA_MICD_LVL_8; - else - val = ARIZONA_MICD_LVL_8; - if (micd_ena) micd_ena_bit = ARIZONA_MICD_ENA; else @@ -536,6 +526,24 @@ static int arizona_micd_read(struct arizona_extcon_info *info) return -EINVAL; } + if (!(val & ARIZONA_MICD_STS)) { + val = INT_MAX; + } else if (!(val & MICD_LVL_0_TO_7)) { + val = arizona_micd_levels[ARRAY_SIZE(arizona_micd_levels) - 1]; + } else { + int lvl; + + lvl = (val & ARIZONA_MICD_LVL_MASK) >> ARIZONA_MICD_LVL_SHIFT; + lvl = ffs(lvl) - 1; + + if (lvl < info->num_micd_ranges) { + val = info->micd_ranges[lvl].max; + } else { + i = ARRAY_SIZE(arizona_micd_levels) - 2; + val = arizona_micd_levels[i]; + } + } + return val; } @@ -1386,7 +1394,7 @@ int arizona_micd_button_reading(struct arizona_extcon_info *info, { struct arizona *arizona = info->arizona; int debounce_lim = arizona->pdata.micd_manual_debounce; - int lvl, i, key; + int i, key; if (val < 0) return val; @@ -1418,24 +1426,25 @@ int arizona_micd_button_reading(struct arizona_extcon_info *info, } } - if (val & MICD_LVL_0_TO_7) { + if (val < MICROPHONE_MIN_OHM) { dev_dbg(arizona->dev, "Mic button detected\n"); - lvl = val & ARIZONA_MICD_LVL_MASK; - lvl >>= ARIZONA_MICD_LVL_SHIFT; - for (i = 0; i < info->num_micd_ranges; i++) input_report_key(info->input, info->micd_ranges[i].key, 0); - if (lvl && ffs(lvl) - 1 < info->num_micd_ranges) { - key = info->micd_ranges[ffs(lvl) - 1].key; - input_report_key(info->input, key, 1); - input_sync(info->input); - } else { - dev_warn(arizona->dev, - "Button level %u out of range\n", lvl); + for (i = 0; i < info->num_micd_ranges; i++) { + if (val <= info->micd_ranges[i].max) { + key = info->micd_ranges[i].key; + input_report_key(info->input, key, 1); + input_sync(info->input); + break; + } } + + if (i == info->num_micd_ranges) + dev_warn(arizona->dev, + "Button level %u out of range\n", val); } else { dev_dbg(arizona->dev, "Mic button released\n"); for (i = 0; i < info->num_micd_ranges; i++) @@ -1459,7 +1468,7 @@ static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, int val if (val < 0) return val; - if (!(val & ARIZONA_MICD_STS)) { + if (val > MICROPHONE_MAX_OHM) { info->antenna_db_plugout = 0; info->antenna_cnt_plugout = 0; info->antenna_res_old_plugout = 0; @@ -1473,7 +1482,7 @@ static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, int val arizona_extcon_report(info, BIT_ANTENNA); arizona_jds_set_state(info, &arizona_antenna_oc_det); } else { - info->mic = val & ARIZONA_MICD_LVL_8 ? true : false; + info->mic = (val >= MICROPHONE_MIN_OHM); if (arizona->pdata.hpdet_channel) ret = arizona_jds_set_state(info, &arizona_antenna_hpr_det); @@ -1505,7 +1514,7 @@ static int arizona_antenna_oc_reading(struct arizona_extcon_info *info, int val) if (val < 0) return val; - if (!(val & ARIZONA_MICD_STS)) + if (val > MICROPHONE_MAX_OHM) return 0; if (debounce_lim) { @@ -1534,7 +1543,7 @@ static int arizona_antenna_oc_reading(struct arizona_extcon_info *info, int val) } } - info->mic = val & ARIZONA_MICD_LVL_8 ? true : false; + info->mic = (val >= MICROPHONE_MIN_OHM); if (arizona->pdata.hpdet_channel) ret = arizona_jds_set_state(info, &arizona_antenna_hpr_oc_det); @@ -1642,7 +1651,7 @@ static int arizona_antenna_button_reading(struct arizona_extcon_info *info, } } - if (!(val & ARIZONA_MICD_STS)) { /* Detected open circuit*/ + if (val > MICROPHONE_MAX_OHM) { /* Detected open circuit*/ /** Due to slow plugout of 4 pole headset from the antenna cable * the gnd/hpl/hpr of 4 pole can come in contact with mic pin of * antenna hence measuring a low impedance on the mic pin and @@ -1657,7 +1666,8 @@ static int arizona_antenna_button_reading(struct arizona_extcon_info *info, info->antenna_skip_btn_db = false; ret = arizona_antenna_mic_reading(info, val); } else { - mic = val & ARIZONA_MICD_LVL_8 ? true : false; + mic = (val >= MICROPHONE_MIN_OHM); + if (mic && mic != info->mic) { // if 3 pole jack was inserted, this could be false event on removal // or 4 pole jack was inserted half way through and then pushed, @@ -1724,14 +1734,14 @@ int arizona_micd_mic_reading(struct arizona_extcon_info *info, int val) return val; /* Due to jack detect this should never happen */ - if (!(val & ARIZONA_MICD_STS)) { + if (val > MICROPHONE_MAX_OHM) { dev_warn(arizona->dev, "Detected open circuit\n"); info->mic = arizona->pdata.micd_open_circuit_declare; goto done; } /* If we got a high impedence we should have a headset, report it. */ - if (val & ARIZONA_MICD_LVL_8) { + if (val >= MICROPHONE_MIN_OHM) { dev_dbg(arizona->dev, "Detected headset\n"); info->mic = true; goto done; @@ -1743,8 +1753,8 @@ int arizona_micd_mic_reading(struct arizona_extcon_info *info, int val) * plain headphones. If both polarities report a low * impedence then give up and report headphones. */ - if ((val & MICD_LVL_1_TO_7) && - (info->micd_num_modes > 1)) { + if (val > info->micd_ranges[0].max && + info->micd_num_modes > 1) { if (info->jack_flips >= info->micd_num_modes * 10) { dev_dbg(arizona->dev, "Detected HP/line\n"); goto done; @@ -2020,6 +2030,8 @@ static void arizona_micd_handler(struct work_struct *work) if (ret == -EAGAIN) goto out; + dev_dbg(arizona->dev, "Mic impedance %d ohms\n", ret); + arizona_jds_reading(info, ret); out: From 245c3eb444b3c7f26fe6ffd4ba021fcb5903c473 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 17 Dec 2014 15:10:14 +0000 Subject: [PATCH 0625/1167] switch: arizona: Make ADC microphone detection an actual state Currently the ADC microphone detection was being handled as a special case option on the normal microphone detection path. Make this an actual state in the detection process in its own right. Change-Id: Ice24772a12642db382265eaf4a6a39007d69fc3d Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 100 ++++++++++++++++++++------------ 1 file changed, 62 insertions(+), 38 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 15208a2b954..32da2da20ad 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -179,6 +179,7 @@ inline void arizona_extcon_report(struct arizona_extcon_info *info, int state) } EXPORT_SYMBOL_GPL(arizona_extcon_report); +static const struct arizona_jd_state arizona_micd_adc_mic; static const struct arizona_jd_state arizona_hpdet_moisture; static const struct arizona_jd_state arizona_hpdet_acc_id; static const struct arizona_jd_state arizona_antenna_mic_det; @@ -445,18 +446,17 @@ static void arizona_extcon_pulse_micbias(struct arizona_extcon_info *info) } } -static int arizona_micd_read(struct arizona_extcon_info *info) +static int arizona_micd_adc_read(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; unsigned int val = 0; - int ret, i; + int ret; regmap_read(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, &val); val &= ARIZONA_ACCDET_MODE_MASK; if ((info->detecting) && (val == ARIZONA_ACCDET_MODE_ADC)) { bool micd_ena; - unsigned int micd_ena_bit; /* Must disable MICD before we read the ADCVAL */ ret = regmap_update_bits_check(arizona->regmap, @@ -469,39 +469,42 @@ static int arizona_micd_read(struct arizona_extcon_info *info) ret); return ret; } + } - ret = regmap_read(arizona->regmap, ARIZONA_MIC_DETECT_4, &val); - if (ret != 0) { - dev_err(arizona->dev, - "Failed to read MICDET_ADCVAL: %d\n", - ret); - return ret; - } + /* Must disable MICD before we read the ADCVAL */ + ret = regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, 0); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to disable MICD: %d\n", + ret); + return ret; + } - dev_dbg(arizona->dev, "MICDET_ADCVAL: 0x%x\n", val); + ret = regmap_read(arizona->regmap, ARIZONA_MIC_DETECT_4, &val); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to read MICDET_ADCVAL: %d\n", + ret); + return ret; + } - val &= ARIZONA_MICDET_ADCVAL_MASK; - if (val < ARRAY_SIZE(arizona_micd_levels)) - val = arizona_micd_levels[val]; - else - val = INT_MAX; + dev_dbg(arizona->dev, "MICDET_ADCVAL: 0x%x\n", val); - if (micd_ena) - micd_ena_bit = ARIZONA_MICD_ENA; - else - micd_ena_bit = 0; + val &= ARIZONA_MICDET_ADCVAL_MASK; + if (val < ARRAY_SIZE(arizona_micd_levels)) + val = arizona_micd_levels[val]; + else + val = INT_MAX; - ret = regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_ENA, micd_ena_bit); - if (ret != 0) { - dev_err(arizona->dev, - "Failed to restore MICD: %d\n", - ret); - return ret; - } + return val; +} - return val; - } +static int arizona_micd_read(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + unsigned int val = 0; + int ret, i; for (i = 0; i < 10 && !(val & MICD_LVL_0_TO_8); i++) { ret = regmap_read(arizona->regmap, ARIZONA_MIC_DETECT_3, &val); @@ -1228,6 +1231,8 @@ static int arizona_hpdet_moisture_reading(struct arizona_extcon_info *info, } else if (val < arizona->pdata.hpdet_moisture_imp) { if (arizona->pdata.antenna_supported) arizona_jds_set_state(info, &arizona_antenna_mic_det); + else if (arizona->pdata.micd_software_compare) + arizona_jds_set_state(info, &arizona_micd_adc_mic); else arizona_jds_set_state(info, &arizona_micd_microphone); } else { @@ -1273,7 +1278,6 @@ EXPORT_SYMBOL_GPL(arizona_hpdet_reading); int arizona_micd_start(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; - unsigned int mode; int ret; /* Microphone detection can't use idle mode */ @@ -1311,12 +1315,8 @@ int arizona_micd_start(struct arizona_extcon_info *info) mutex_unlock(&arizona->reg_setting_lock); } - mode = info->state->mode; - if (info->detecting && arizona->pdata.micd_software_compare) - mode = ARIZONA_ACCDET_MODE_ADC; - regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, - ARIZONA_ACCDET_MODE_MASK, mode); + ARIZONA_ACCDET_MODE_MASK, info->state->mode); arizona_extcon_pulse_micbias(info); @@ -1725,6 +1725,14 @@ void arizona_micd_mic_stop(struct arizona_extcon_info *info) } EXPORT_SYMBOL_GPL(arizona_micd_mic_stop); +static void arizona_micd_adc_restart(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, ARIZONA_MICD_ENA); +} + int arizona_micd_mic_reading(struct arizona_extcon_info *info, int val) { struct arizona *arizona = info->arizona; @@ -1766,7 +1774,7 @@ int arizona_micd_mic_reading(struct arizona_extcon_info *info, int val) info->jack_flips++; - return 0; + return -EAGAIN; } } @@ -2017,7 +2025,10 @@ static void arizona_micd_handler(struct work_struct *work) switch (arizona_jds_get_mode(info)) { case ARIZONA_ACCDET_MODE_MIC: + ret = arizona_micd_read(info); + break; case ARIZONA_ACCDET_MODE_ADC: + ret = arizona_micd_adc_read(info); break; default: dev_warn(arizona->dev, "Spurious MICDET IRQ\n"); @@ -2026,7 +2037,6 @@ static void arizona_micd_handler(struct work_struct *work) return; } - ret = arizona_micd_read(info); if (ret == -EAGAIN) goto out; @@ -2129,6 +2139,17 @@ const struct arizona_jd_state arizona_micd_button = { }; EXPORT_SYMBOL_GPL(arizona_micd_button); +static const struct arizona_jd_state arizona_micd_adc_mic = { + .mode = ARIZONA_ACCDET_MODE_ADC, + .start = arizona_micd_mic_start, + .restart = arizona_micd_adc_restart, + .reading = arizona_micd_mic_reading, + .stop = arizona_micd_mic_stop, + + .timeout_ms = arizona_micd_mic_timeout_ms, + .timeout = arizona_micd_mic_timeout, +}; + const struct arizona_jd_state arizona_micd_microphone = { .mode = ARIZONA_ACCDET_MODE_MIC, .start = arizona_micd_mic_start, @@ -2325,6 +2346,9 @@ static irqreturn_t arizona_jackdet(int irq, void *data) else if (arizona->pdata.antenna_supported) arizona_jds_set_state(info, &arizona_antenna_mic_det); + else if (arizona->pdata.micd_software_compare) + arizona_jds_set_state(info, + &arizona_micd_adc_mic); else arizona_jds_set_state(info, &arizona_micd_microphone); From 20b465c720ea34ad2959758acd04131c564a084d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 16 Dec 2014 18:40:40 +0000 Subject: [PATCH 0626/1167] switch: arizona: Add mic detect sysfs entry Add an entry in sysfs that will run an ADC microphone detection to return the current mic impedance. Change-Id: I92b7efe4f4a3704ddc237a13074666b8e3aabaa8 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 66 +++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 32da2da20ad..39649fabaa0 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -129,9 +129,13 @@ struct arizona_extcon_info { struct switch_dev edev; const struct arizona_jd_state *state; + const struct arizona_jd_state *old_state; struct delayed_work state_timeout_work; struct wakeup_source detection_wake_lock; + + int mic_impedance; + struct completion manual_mic_completion; }; static const struct arizona_micd_config micd_default_modes[] = { @@ -172,6 +176,11 @@ static ssize_t arizona_extcon_show(struct device *dev, char *buf); DEVICE_ATTR(hp_impedance, S_IRUGO, arizona_extcon_show, NULL); +static ssize_t arizona_extcon_mic_show(struct device *dev, + struct device_attribute *attr, + char *buf); +DEVICE_ATTR(mic_impedance, S_IRUGO, arizona_extcon_mic_show, NULL); + inline void arizona_extcon_report(struct arizona_extcon_info *info, int state) { dev_dbg(info->arizona->dev, "Switch Report: %d\n", state); @@ -2563,6 +2572,55 @@ static ssize_t arizona_extcon_show(struct device *dev, return scnprintf(buf, PAGE_SIZE, "%d\n", info->arizona->hp_impedance); } +static void arizona_micd_manual_timeout(struct arizona_extcon_info *info) +{ + dev_dbg(info->arizona->dev, "Manual MICD timed out\n"); + + info->mic_impedance = -EINVAL; + + arizona_jds_set_state(info, info->old_state); + + complete(&info->manual_mic_completion); +} + +static int arizona_micd_manual_reading(struct arizona_extcon_info *info, int val) +{ + info->mic_impedance = val; + + arizona_jds_set_state(info, info->old_state); + + complete(&info->manual_mic_completion); + + return val; +} + +const struct arizona_jd_state arizona_micd_manual = { + .mode = ARIZONA_ACCDET_MODE_ADC, + .start = arizona_micd_mic_start, + .reading = arizona_micd_manual_reading, + .stop = arizona_micd_mic_stop, + + .timeout_ms = arizona_micd_mic_timeout_ms, + .timeout = arizona_micd_manual_timeout, +}; + +static ssize_t arizona_extcon_mic_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct platform_device *pdev = to_platform_device(dev); + struct arizona_extcon_info *info = platform_get_drvdata(pdev); + + mutex_lock(&info->lock); + info->old_state = info->state; + arizona_jds_set_state(info, &arizona_micd_manual); + mutex_unlock(&info->lock); + + wait_for_completion(&info->manual_mic_completion); + + return scnprintf(buf, PAGE_SIZE, "%d\n", info->mic_impedance); +} + static int arizona_hp_trim_signify(int raw, int value_mask) { if (raw > value_mask) @@ -2789,6 +2847,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) } mutex_init(&info->lock); + init_completion(&info->manual_mic_completion); wakeup_source_init(&info->detection_wake_lock, "arizona-jack-detection"); info->arizona = arizona; info->dev = &pdev->dev; @@ -3106,6 +3165,12 @@ static int arizona_extcon_probe(struct platform_device *pdev) "Failed to create sysfs node for hp_impedance %d\n", ret); + ret = device_create_file(&pdev->dev, &dev_attr_mic_impedance); + if (ret != 0) + dev_err(&pdev->dev, + "Failed to create sysfs node for mic_impedance %d\n", + ret); + return 0; err_hpdet: @@ -3173,6 +3238,7 @@ static int arizona_extcon_remove(struct platform_device *pdev) arizona_clk32k_disable(arizona); device_remove_file(&pdev->dev, &dev_attr_hp_impedance); + device_remove_file(&pdev->dev, &dev_attr_mic_impedance); switch_dev_unregister(&info->edev); wakeup_source_trash(&info->detection_wake_lock); kfree(info->hpdet_d_trims); From cb9d5276705908c96a9eae5f6e9b9c27890a75cc Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 15 Jan 2015 16:29:49 +0000 Subject: [PATCH 0627/1167] ASoC: arizona: Add means to get extcon_info pointer Change-Id: I47d19b6fd7df437a75e737001a16d63d2b45ac1e Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 1 + include/linux/mfd/arizona/core.h | 2 ++ sound/soc/codecs/arizona.c | 9 +++++++++ sound/soc/codecs/arizona.h | 3 +++ 4 files changed, 15 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 39649fabaa0..a63399d3dc2 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -2857,6 +2857,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) INIT_DELAYED_WORK(&info->micd_clear_work, arizona_micd_input_clear); INIT_DELAYED_WORK(&info->state_timeout_work, arizona_jds_timeout_work); platform_set_drvdata(pdev, info); + arizona->extcon_info = info; switch (arizona->type) { case WM5102: diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 219236619cc..120a97b1905 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -116,6 +116,7 @@ enum arizona_type { #define ARIZONA_HP_SHORT_IMPEDANCE 4 struct snd_soc_dapm_context; +struct arizona_extcon_info; struct arizona { struct regmap *regmap; @@ -145,6 +146,7 @@ struct arizona { unsigned int hp_ena; unsigned int hp_impedance; + struct arizona_extcon_info *extcon_info; struct mutex clk_lock; int clk32k_ref; diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 7e4b91d924e..e51ab32dddb 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -3734,6 +3734,15 @@ struct regmap *arizona_get_regmap_dsp(struct snd_soc_codec *codec) } EXPORT_SYMBOL_GPL(arizona_get_regmap_dsp); +struct arizona_extcon_info * +arizona_get_extcon_info(struct snd_soc_codec *codec) +{ + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + + return arizona->extcon_info; +} +EXPORT_SYMBOL_GPL(arizona_get_extcon_info); + int arizona_enable_force_bypass(struct snd_soc_codec *codec) { struct arizona *arizona = dev_get_drvdata(codec->dev->parent); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 2946b47ed9f..7f6116e74e5 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -380,6 +380,9 @@ extern int clearwater_put_dre(struct snd_kcontrol *kcontrol, extern struct regmap *arizona_get_regmap_dsp(struct snd_soc_codec *codec); +extern struct arizona_extcon_info * +arizona_get_extcon_info(struct snd_soc_codec *codec); + extern int arizona_enable_force_bypass(struct snd_soc_codec *codec); extern int arizona_disable_force_bypass(struct snd_soc_codec *codec); From 16c86dcf6b522a41cac61dc173048bc746dbd9f3 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 15 Jan 2015 16:57:05 +0000 Subject: [PATCH 0628/1167] switch: arizona: Add exported function to trigger manual read of mic Change-Id: Ib73174239abf4be40787e044da2a3c94e8045d7d Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 21 ++++++++++++++------- include/linux/switch-arizona.h | 2 ++ 2 files changed, 16 insertions(+), 7 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index a63399d3dc2..80fea69a9d6 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -2604,13 +2604,8 @@ const struct arizona_jd_state arizona_micd_manual = { .timeout = arizona_micd_manual_timeout, }; -static ssize_t arizona_extcon_mic_show(struct device *dev, - struct device_attribute *attr, - char *buf) +int arizona_extcon_take_manual_mic_reading(struct arizona_extcon_info *info) { - struct platform_device *pdev = to_platform_device(dev); - struct arizona_extcon_info *info = platform_get_drvdata(pdev); - mutex_lock(&info->lock); info->old_state = info->state; arizona_jds_set_state(info, &arizona_micd_manual); @@ -2618,7 +2613,19 @@ static ssize_t arizona_extcon_mic_show(struct device *dev, wait_for_completion(&info->manual_mic_completion); - return scnprintf(buf, PAGE_SIZE, "%d\n", info->mic_impedance); + return info->mic_impedance; +} +EXPORT_SYMBOL_GPL(arizona_extcon_take_manual_mic_reading); + +static ssize_t arizona_extcon_mic_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct platform_device *pdev = to_platform_device(dev); + struct arizona_extcon_info *info = platform_get_drvdata(pdev); + int mic_impedance = arizona_extcon_take_manual_mic_reading(info); + + return scnprintf(buf, PAGE_SIZE, "%d\n", mic_impedance); } static int arizona_hp_trim_signify(int raw, int value_mask) diff --git a/include/linux/switch-arizona.h b/include/linux/switch-arizona.h index 45f84c4d830..b66f91759b9 100644 --- a/include/linux/switch-arizona.h +++ b/include/linux/switch-arizona.h @@ -79,4 +79,6 @@ extern void arizona_micd_mic_timeout(struct arizona_extcon_info *info); extern void arizona_extcon_report(struct arizona_extcon_info *info, int state); +extern int arizona_extcon_take_manual_mic_reading(struct arizona_extcon_info *info); + #endif From ddd190c01b7fb7e8991fa4e76aa04ecb85c0dedd Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 26 Jan 2015 14:10:39 +0000 Subject: [PATCH 0629/1167] ASoC: arizona: Simplify ez2control trigger callback Now we have a power event for the ADSP itself we can simply clear the trigger flag every time we boot the ADSP which makes the whole process much simpler. Additionally, this fixes a race condition where if the stream is closed the stream free callback would run resetting the trigger flag before the DSP was powered down. Meaning an IRQ in that time would be treated as a new trigger. Change-Id: Ic3041a05ece7ba9159cf6111b6c196baa931a855 Signed-off-by: Charles Keepax --- sound/soc/codecs/clearwater.c | 51 +++++++++++------------------------ sound/soc/codecs/cs47l24.c | 34 ++++++++--------------- sound/soc/codecs/florida.c | 39 ++++++++++----------------- 3 files changed, 41 insertions(+), 83 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 2e8ce1a8105..658d8e1d66a 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -59,7 +59,6 @@ struct clearwater_compr { size_t total_copied; bool allocated; bool trig; - bool forced; }; struct clearwater_priv { @@ -166,32 +165,6 @@ static const struct snd_kcontrol_new clearwater_in2mux[2] = { SOC_DAPM_ENUM("IN2R Mux", clearwater_in2muxr_enum), }; -static int clearwater_virt_dsp_power_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) -{ - struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(w->codec); - - mutex_lock(&clearwater->compr_info.lock); - - if (!clearwater->compr_info.stream) - clearwater->compr_info.trig = false; - - switch (event) { - case SND_SOC_DAPM_POST_PMU: - clearwater->compr_info.forced = true; - break; - case SND_SOC_DAPM_PRE_PMD: - clearwater->compr_info.forced = false; - break; - default: - break; - } - - mutex_unlock(&clearwater->compr_info.lock); - - return 0; -} - static int clearwater_frf_bytes_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { @@ -225,11 +198,12 @@ static int clearwater_frf_bytes_put(struct snd_kcontrol *kcontrol, } static int clearwater_adsp_power_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event) + struct snd_kcontrol *kcontrol, + int event) { struct snd_soc_codec *codec = w->codec; - struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(codec); + struct arizona_priv *priv = &clearwater->core; struct arizona *arizona = priv->arizona; unsigned int freq; int ret; @@ -243,6 +217,16 @@ static int clearwater_adsp_power_ev(struct snd_soc_dapm_widget *w, freq &= CLEARWATER_DSP_CLK_FREQ_LEGACY_MASK; freq >>= CLEARWATER_DSP_CLK_FREQ_LEGACY_SHIFT; + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + mutex_lock(&clearwater->compr_info.lock); + clearwater->compr_info.trig = false; + mutex_unlock(&clearwater->compr_info.lock); + break; + default: + break; + } + return wm_adsp2_early_event(w, kcontrol, event, freq); } @@ -1489,9 +1473,8 @@ SND_SOC_DAPM_VIRT_MUX("DSP2 Virtual Input", SND_SOC_NOPM, 0, 0, SND_SOC_DAPM_VIRT_MUX("DSP3 Virtual Input", SND_SOC_NOPM, 0, 0, &clearwater_memory_mux[1]), -SND_SOC_DAPM_VIRT_MUX_E("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, - &clearwater_dsp_output_mux[0], clearwater_virt_dsp_power_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), +SND_SOC_DAPM_VIRT_MUX("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, + &clearwater_dsp_output_mux[0]), ARIZONA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), ARIZONA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"), @@ -2370,8 +2353,6 @@ static int clearwater_free(struct snd_compr_stream *stream) clearwater->compr_info.allocated = false; clearwater->compr_info.stream = NULL; clearwater->compr_info.total_copied = 0; - if (!clearwater->compr_info.forced) - clearwater->compr_info.trig = false; wm_adsp_stream_free(clearwater->compr_info.adsp); diff --git a/sound/soc/codecs/cs47l24.c b/sound/soc/codecs/cs47l24.c index 616693e1432..c6bc274f58d 100644 --- a/sound/soc/codecs/cs47l24.c +++ b/sound/soc/codecs/cs47l24.c @@ -45,7 +45,6 @@ struct cs47l24_compr { size_t total_copied; bool allocated; bool trig; - bool forced; }; struct cs47l24_priv { @@ -75,30 +74,22 @@ static const struct wm_adsp_region *cs47l24_dsp_regions[] = { cs47l24_dsp3_regions, }; -static int cs47l24_virt_dsp_power_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) +static int cs47l24_adsp_power_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) { struct cs47l24_priv *cs47l24 = snd_soc_codec_get_drvdata(w->codec); - mutex_lock(&cs47l24->compr_info.lock); - - if (!cs47l24->compr_info.stream) - cs47l24->compr_info.trig = false; - switch (event) { - case SND_SOC_DAPM_POST_PMU: - cs47l24->compr_info.forced = true; - break; - case SND_SOC_DAPM_PRE_PMD: - cs47l24->compr_info.forced = false; + case SND_SOC_DAPM_PRE_PMU: + mutex_lock(&cs47l24->compr_info.lock); + cs47l24->compr_info.trig = false; + mutex_unlock(&cs47l24->compr_info.lock); break; default: break; } - mutex_unlock(&cs47l24->compr_info.lock); - - return 0; + return arizona_adsp_power_ev(w, kcontrol, event); } static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); @@ -486,8 +477,8 @@ SND_SOC_DAPM_PGA("ASRC2L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2L_ENA_SHIFT, 0, SND_SOC_DAPM_PGA("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0, NULL, 0), -WM_ADSP2("DSP2", 1, arizona_adsp_power_ev), -WM_ADSP2("DSP3", 2, arizona_adsp_power_ev), +WM_ADSP2("DSP2", 1, cs47l24_adsp_power_ev), +WM_ADSP2("DSP3", 2, cs47l24_adsp_power_ev), SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), @@ -678,9 +669,8 @@ SND_SOC_DAPM_VIRT_MUX("DSP2 Virtual Input", SND_SOC_NOPM, 0, 0, SND_SOC_DAPM_VIRT_MUX("DSP3 Virtual Input", SND_SOC_NOPM, 0, 0, &cs47l24_memory_mux[1]), -SND_SOC_DAPM_VIRT_MUX_E("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, - &cs47l24_dsp_output_mux[0], cs47l24_virt_dsp_power_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), +SND_SOC_DAPM_VIRT_MUX("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, + &cs47l24_dsp_output_mux[0]), ARIZONA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), ARIZONA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"), @@ -1184,8 +1174,6 @@ static int cs47l24_free(struct snd_compr_stream *stream) cs47l24->compr_info.allocated = false; cs47l24->compr_info.stream = NULL; cs47l24->compr_info.total_copied = 0; - if (!cs47l24->compr_info.forced) - cs47l24->compr_info.trig = false; wm_adsp_stream_free(cs47l24->compr_info.adsp); diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index f1e94b4591c..5eb5003513d 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -47,7 +47,6 @@ struct florida_compr { size_t total_copied; bool allocated; bool trig; - bool forced; }; struct florida_priv { @@ -221,30 +220,23 @@ static int florida_sysclk_ev(struct snd_soc_dapm_widget *w, return 0; } -static int florida_virt_dsp_power_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) +static int florida_adsp_power_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) { struct florida_priv *florida = snd_soc_codec_get_drvdata(w->codec); - mutex_lock(&florida->compr_info.lock); - - if (!florida->compr_info.stream) - florida->compr_info.trig = false; - switch (event) { - case SND_SOC_DAPM_POST_PMU: - florida->compr_info.forced = true; - break; - case SND_SOC_DAPM_PRE_PMD: - florida->compr_info.forced = false; + case SND_SOC_DAPM_PRE_PMU: + mutex_lock(&florida->compr_info.lock); + florida->compr_info.trig = false; + mutex_unlock(&florida->compr_info.lock); break; default: break; } - mutex_unlock(&florida->compr_info.lock); - - return 0; + return arizona_adsp_power_ev(w, kcontrol, event); } static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); @@ -897,10 +889,10 @@ SND_SOC_DAPM_PGA("ASRC2L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2L_ENA_SHIFT, 0, SND_SOC_DAPM_PGA("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0, NULL, 0), -WM_ADSP2("DSP1", 0, arizona_adsp_power_ev), -WM_ADSP2("DSP2", 1, arizona_adsp_power_ev), -WM_ADSP2("DSP3", 2, arizona_adsp_power_ev), -WM_ADSP2("DSP4", 3, arizona_adsp_power_ev), +WM_ADSP2("DSP1", 0, florida_adsp_power_ev), +WM_ADSP2("DSP2", 1, florida_adsp_power_ev), +WM_ADSP2("DSP3", 2, florida_adsp_power_ev), +WM_ADSP2("DSP4", 3, florida_adsp_power_ev), SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), @@ -1225,9 +1217,8 @@ SND_SOC_DAPM_VIRT_MUX("DSP2 Virtual Input", SND_SOC_NOPM, 0, 0, SND_SOC_DAPM_VIRT_MUX("DSP3 Virtual Input", SND_SOC_NOPM, 0, 0, &florida_memory_mux[1]), -SND_SOC_DAPM_VIRT_MUX_E("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, - &florida_dsp_output_mux[0], florida_virt_dsp_power_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), +SND_SOC_DAPM_VIRT_MUX("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, + &florida_dsp_output_mux[0]), ARIZONA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), ARIZONA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"), @@ -1976,8 +1967,6 @@ static int florida_free(struct snd_compr_stream *stream) florida->compr_info.allocated = false; florida->compr_info.stream = NULL; florida->compr_info.total_copied = 0; - if (!florida->compr_info.forced) - florida->compr_info.trig = false; wm_adsp_stream_free(florida->compr_info.adsp); From 9df367f1992fb69b7e9e38d6a065976c2d6132b9 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 20 Jan 2015 14:19:40 +0000 Subject: [PATCH 0630/1167] ASoC: wm_adsp: Make DSP controls persistent across DSP On/Off Currently DSP controls are persistent (across DSP On/Off) only if they were set when dsp was off, this change makes the controls persistent irrespective of when they are set. Change-Id: Ice0105935888c02847879a88f5ffa5319b2d903e Signed-off-by: Nikesh Oswal --- sound/soc/codecs/wm_adsp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 26970f85aed..5b14d0d8e38 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -737,8 +737,8 @@ static int wm_coeff_put(struct snd_kcontrol *kcontrol, mutex_lock(&ctl->lock); memcpy(ctl->cache, p, ctl->len); + ctl->set = 1; if (!ctl->enabled) { - ctl->set = 1; mutex_unlock(&ctl->lock); return 0; } From 7867a977bd08294f2292a0155ecbc78a32d040e5 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 29 Jan 2015 10:06:19 +0000 Subject: [PATCH 0631/1167] switch: arizona: Export additional jack detection states Export all jack detection states from the state machine to afford greater flexibility to the custom jack detection. Change-Id: I6681a33ee0d3e1973508cd91024b81a38e93ffbe Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 41 ++++++++++++++++----------------- include/linux/switch-arizona.h | 10 ++++++++ 2 files changed, 30 insertions(+), 21 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 80fea69a9d6..9fbf58bd55d 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -188,17 +188,6 @@ inline void arizona_extcon_report(struct arizona_extcon_info *info, int state) } EXPORT_SYMBOL_GPL(arizona_extcon_report); -static const struct arizona_jd_state arizona_micd_adc_mic; -static const struct arizona_jd_state arizona_hpdet_moisture; -static const struct arizona_jd_state arizona_hpdet_acc_id; -static const struct arizona_jd_state arizona_antenna_mic_det; -static const struct arizona_jd_state arizona_antenna_oc_det; -static const struct arizona_jd_state arizona_antenna_hp_det; -static const struct arizona_jd_state arizona_antenna_button_det; -static const struct arizona_jd_state arizona_antenna_hp_oc_det; -static const struct arizona_jd_state arizona_antenna_hpr_det; -static const struct arizona_jd_state arizona_antenna_hpr_oc_det; - static int arizona_jds_get_mode(struct arizona_extcon_info *info) { int mode = ARIZONA_ACCDET_MODE_INVALID; @@ -2117,12 +2106,13 @@ static irqreturn_t arizona_micdet(int irq, void *data) return IRQ_HANDLED; } -static const struct arizona_jd_state arizona_hpdet_moisture = { +const struct arizona_jd_state arizona_hpdet_moisture = { .mode = ARIZONA_ACCDET_MODE_HPL, .start = arizona_hpdet_moisture_start, .reading = arizona_hpdet_moisture_reading, .stop = arizona_hpdet_moisture_stop, }; +EXPORT_SYMBOL_GPL(arizona_hpdet_moisture); const struct arizona_jd_state arizona_hpdet_left = { .mode = ARIZONA_ACCDET_MODE_HPL, @@ -2148,7 +2138,7 @@ const struct arizona_jd_state arizona_micd_button = { }; EXPORT_SYMBOL_GPL(arizona_micd_button); -static const struct arizona_jd_state arizona_micd_adc_mic = { +const struct arizona_jd_state arizona_micd_adc_mic = { .mode = ARIZONA_ACCDET_MODE_ADC, .start = arizona_micd_mic_start, .restart = arizona_micd_adc_restart, @@ -2158,6 +2148,7 @@ static const struct arizona_jd_state arizona_micd_adc_mic = { .timeout_ms = arizona_micd_mic_timeout_ms, .timeout = arizona_micd_mic_timeout, }; +EXPORT_SYMBOL_GPL(arizona_micd_adc_mic); const struct arizona_jd_state arizona_micd_microphone = { .mode = ARIZONA_ACCDET_MODE_MIC, @@ -2170,64 +2161,72 @@ const struct arizona_jd_state arizona_micd_microphone = { }; EXPORT_SYMBOL_GPL(arizona_micd_microphone); -static const struct arizona_jd_state arizona_hpdet_acc_id = { +const struct arizona_jd_state arizona_hpdet_acc_id = { .mode = ARIZONA_ACCDET_MODE_HPL, .start = arizona_hpdet_acc_id_start, .restart = arizona_hpdet_restart, .reading = arizona_hpdet_acc_id_reading, .stop = arizona_hpdet_acc_id_stop, }; +EXPORT_SYMBOL_GPL(arizona_hpdet_acc_id); /* States for Antenna Detect */ -static const struct arizona_jd_state arizona_antenna_mic_det = { +const struct arizona_jd_state arizona_antenna_mic_det = { .mode = ARIZONA_ACCDET_MODE_ADC, .start = arizona_micd_mic_start, .reading = arizona_antenna_mic_reading, .stop = arizona_micd_mic_stop, }; +EXPORT_SYMBOL_GPL(arizona_antenna_mic_det); -static const struct arizona_jd_state arizona_antenna_oc_det = { +const struct arizona_jd_state arizona_antenna_oc_det = { .mode = ARIZONA_ACCDET_MODE_MIC, .start = arizona_micd_mic_start, .reading = arizona_antenna_oc_reading, .stop = arizona_micd_mic_stop, }; +EXPORT_SYMBOL_GPL(arizona_antenna_oc_det); -static const struct arizona_jd_state arizona_antenna_hp_det = { +const struct arizona_jd_state arizona_antenna_hp_det = { .mode = ARIZONA_ACCDET_MODE_HPL, .start = arizona_hpdet_start, .reading = arizona_antenna_hp_reading, .stop = arizona_hpdet_stop, }; +EXPORT_SYMBOL_GPL(arizona_antenna_hp_det); -static const struct arizona_jd_state arizona_antenna_hpr_det = { +const struct arizona_jd_state arizona_antenna_hpr_det = { .mode = ARIZONA_ACCDET_MODE_HPR, .start = arizona_hpdet_start, .reading = arizona_antenna_hp_reading, .stop = arizona_hpdet_stop, }; +EXPORT_SYMBOL_GPL(arizona_antenna_hpr_det); -static const struct arizona_jd_state arizona_antenna_button_det = { +const struct arizona_jd_state arizona_antenna_button_det = { .mode = ARIZONA_ACCDET_MODE_MIC, .start = arizona_micd_start, .reading = arizona_antenna_button_reading, .stop = arizona_micd_stop, }; +EXPORT_SYMBOL_GPL(arizona_antenna_button_det); -static const struct arizona_jd_state arizona_antenna_hp_oc_det = { +const struct arizona_jd_state arizona_antenna_hp_oc_det = { .mode = ARIZONA_ACCDET_MODE_HPL, .start = arizona_hpdet_start, .reading = arizona_antenna_hp_oc_reading, .stop = arizona_hpdet_stop, }; +EXPORT_SYMBOL_GPL(arizona_antenna_hp_oc_det); -static const struct arizona_jd_state arizona_antenna_hpr_oc_det = { +const struct arizona_jd_state arizona_antenna_hpr_oc_det = { .mode = ARIZONA_ACCDET_MODE_HPR, .start = arizona_hpdet_start, .reading = arizona_antenna_hp_oc_reading, .stop = arizona_hpdet_stop, }; +EXPORT_SYMBOL_GPL(arizona_antenna_hpr_oc_det); static void arizona_hpdet_work(struct work_struct *work) { diff --git a/include/linux/switch-arizona.h b/include/linux/switch-arizona.h index b66f91759b9..58b99336386 100644 --- a/include/linux/switch-arizona.h +++ b/include/linux/switch-arizona.h @@ -56,10 +56,20 @@ int arizona_jds_set_state(struct arizona_extcon_info *info, extern void arizona_set_headphone_imp(struct arizona_extcon_info *info, int imp); +extern const struct arizona_jd_state arizona_hpdet_moisture; extern const struct arizona_jd_state arizona_hpdet_left; extern const struct arizona_jd_state arizona_hpdet_right; extern const struct arizona_jd_state arizona_micd_button; extern const struct arizona_jd_state arizona_micd_microphone; +extern const struct arizona_jd_state arizona_micd_adc_mic; +extern const struct arizona_jd_state arizona_hpdet_acc_id; +extern const struct arizona_jd_state arizona_antenna_mic_det; +extern const struct arizona_jd_state arizona_antenna_oc_det; +extern const struct arizona_jd_state arizona_antenna_hp_det; +extern const struct arizona_jd_state arizona_antenna_button_det; +extern const struct arizona_jd_state arizona_antenna_hp_oc_det; +extern const struct arizona_jd_state arizona_antenna_hpr_det; +extern const struct arizona_jd_state arizona_antenna_hpr_oc_det; extern int arizona_hpdet_start(struct arizona_extcon_info *info); extern void arizona_hpdet_restart(struct arizona_extcon_info *info); From 2bedd1480bf49a4ab4ae09ffb75c47769896318c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 29 Jan 2015 10:38:13 +0000 Subject: [PATCH 0632/1167] switch: arizona: Completely seperate antenna detection Seperate antenna detection completely from the main detection flow. This will make the two paths easier to maintain as they can be reasoned about in isolation. Change-Id: I88dda1de240f8d169a9897b70d2f2a24ec291b0e Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 49 +++++++++++++++++++++++++++++---- include/linux/switch-arizona.h | 1 + 2 files changed, 44 insertions(+), 6 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 9fbf58bd55d..b3b21f425d1 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1227,9 +1227,7 @@ static int arizona_hpdet_moisture_reading(struct arizona_extcon_info *info, if (val < 0) { return val; } else if (val < arizona->pdata.hpdet_moisture_imp) { - if (arizona->pdata.antenna_supported) - arizona_jds_set_state(info, &arizona_antenna_mic_det); - else if (arizona->pdata.micd_software_compare) + if (arizona->pdata.micd_software_compare) arizona_jds_set_state(info, &arizona_micd_adc_mic); else arizona_jds_set_state(info, &arizona_micd_microphone); @@ -1456,6 +1454,37 @@ int arizona_micd_button_reading(struct arizona_extcon_info *info, } EXPORT_SYMBOL_GPL(arizona_micd_button_reading); +static int arizona_antenna_moisture_reading(struct arizona_extcon_info *info, + int val) +{ + struct arizona *arizona = info->arizona; + int debounce_lim = info->arizona->pdata.hpdet_moisture_debounce; + + if (val < 0) { + return val; + } else if (val < arizona->pdata.hpdet_moisture_imp) { + arizona_jds_set_state(info, &arizona_antenna_mic_det); + } else { + if (debounce_lim) { + if (++info->moisture_count < debounce_lim) { + dev_dbg(info->arizona->dev, + "Moisture software debounce: %d, %x\n", + info->moisture_count, val); + arizona_hpdet_restart(info); + return -EAGAIN; + } + + info->moisture_count = 0; + } + + dev_warn(arizona->dev, + "Jack detection due to moisture, ignoring\n"); + arizona_jds_set_state(info, NULL); + } + + return 0; +} + static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, int val) { struct arizona *arizona = info->arizona; @@ -2172,6 +2201,14 @@ EXPORT_SYMBOL_GPL(arizona_hpdet_acc_id); /* States for Antenna Detect */ +const struct arizona_jd_state arizona_antenna_moisture = { + .mode = ARIZONA_ACCDET_MODE_HPL, + .start = arizona_hpdet_moisture_start, + .reading = arizona_antenna_moisture_reading, + .stop = arizona_hpdet_moisture_stop, +}; +EXPORT_SYMBOL_GPL(arizona_antenna_moisture); + const struct arizona_jd_state arizona_antenna_mic_det = { .mode = ARIZONA_ACCDET_MODE_ADC, .start = arizona_micd_mic_start, @@ -2348,12 +2385,12 @@ static irqreturn_t arizona_jackdet(int irq, void *data) if (arizona->pdata.custom_jd) arizona_jds_set_state(info, arizona->pdata.custom_jd); + else if (arizona->pdata.antenna_supported) + arizona_jds_set_state(info, + &arizona_antenna_moisture); else if (arizona->pdata.hpdet_moisture_imp) arizona_jds_set_state(info, &arizona_hpdet_moisture); - else if (arizona->pdata.antenna_supported) - arizona_jds_set_state(info, - &arizona_antenna_mic_det); else if (arizona->pdata.micd_software_compare) arizona_jds_set_state(info, &arizona_micd_adc_mic); diff --git a/include/linux/switch-arizona.h b/include/linux/switch-arizona.h index 58b99336386..5f84fe58cbf 100644 --- a/include/linux/switch-arizona.h +++ b/include/linux/switch-arizona.h @@ -63,6 +63,7 @@ extern const struct arizona_jd_state arizona_micd_button; extern const struct arizona_jd_state arizona_micd_microphone; extern const struct arizona_jd_state arizona_micd_adc_mic; extern const struct arizona_jd_state arizona_hpdet_acc_id; +extern const struct arizona_jd_state arizona_antenna_moisture; extern const struct arizona_jd_state arizona_antenna_mic_det; extern const struct arizona_jd_state arizona_antenna_oc_det; extern const struct arizona_jd_state arizona_antenna_hp_det; From e2e86abd6e409d95ef275cf7634aa54f977c80e7 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 29 Jan 2015 16:23:54 +0000 Subject: [PATCH 0633/1167] switch: arizona: Factor out read of jack present status Change-Id: I0cb74acbf7d58d83de166c3f216b27c66e36d9ac Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 110 +++++++++++++++++++------------- 1 file changed, 67 insertions(+), 43 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index b3b21f425d1..4a8fd51fb0d 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1999,6 +1999,68 @@ static void arizona_hpdet_acc_id_stop(struct arizona_extcon_info *info) arizona_hpdet_stop(info); } +static int arizona_jack_present(struct arizona_extcon_info *info, + unsigned int *jack_val) +{ + struct arizona *arizona = info->arizona; + unsigned int reg, val = 0; + unsigned int mask, present; + int ret; + + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8998: + case WM1814: + case WM8280: + if (arizona->pdata.jd_gpio5) { + mask = ARIZONA_MICD_CLAMP_STS; + present = 0; + } else { + mask = ARIZONA_JD1_STS; + if (arizona->pdata.jd_invert) + present = 0; + else + present = ARIZONA_JD1_STS; + } + + reg = ARIZONA_AOD_IRQ_RAW_STATUS; + break; + default: + if (arizona->pdata.jd_gpio5) { + mask = CLEARWATER_MICD_CLAMP_RISE_STS1; + present = 0; + } else { + mask = ARIZONA_JD1_STS; + if (arizona->pdata.jd_invert) + present = 0; + else + present = ARIZONA_JD1_STS; + } + + reg = CLEARWATER_IRQ1_RAW_STATUS_7; + break; + } + + ret = regmap_read(arizona->regmap, reg, &val); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read jackdet status: %d\n", + ret); + return ret; + } + + val &= mask; + + if (jack_val) + *jack_val = val; + + if (val == present) + return 1; + else + return 0; +} + static irqreturn_t arizona_hpdet_handler(int irq, void *data) { struct arizona_extcon_info *info = data; @@ -2282,7 +2344,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) struct arizona *arizona = info->arizona; unsigned int reg, val, present, mask; bool cancelled_hp, cancelled_state; - int ret, i; + int i; cancelled_hp = cancel_delayed_work_sync(&info->hpdet_work); cancelled_state = arizona_jds_cancel_timeout(info); @@ -2291,52 +2353,14 @@ static irqreturn_t arizona_jackdet(int irq, void *data) mutex_lock(&info->lock); - switch (arizona->type) { - case WM5102: - case WM5110: - case WM8997: - case WM8998: - case WM1814: - case WM8280: - if (arizona->pdata.jd_gpio5) { - mask = ARIZONA_MICD_CLAMP_STS; - present = 0; - } else { - mask = ARIZONA_JD1_STS; - if (arizona->pdata.jd_invert) - present = 0; - else - present = ARIZONA_JD1_STS; - } - - reg = ARIZONA_AOD_IRQ_RAW_STATUS; - break; - default: - if (arizona->pdata.jd_gpio5) { - mask = CLEARWATER_MICD_CLAMP_RISE_STS1; - present = 0; - } else { - mask = ARIZONA_JD1_STS; - if (arizona->pdata.jd_invert) - present = 0; - else - present = ARIZONA_JD1_STS; - } - - reg = CLEARWATER_IRQ1_RAW_STATUS_7; - break; - } - - ret = regmap_read(arizona->regmap, reg, &val); - if (ret != 0) { - dev_err(arizona->dev, "Failed to read jackdet status: %d\n", - ret); + val = 0; + present = arizona_jack_present(info, &val); + if (present < 0) { mutex_unlock(&info->lock); pm_runtime_put_autosuspend(info->dev); return IRQ_NONE; } - val &= mask; if (val == info->last_jackdet) { dev_dbg(arizona->dev, "Suppressing duplicate JACKDET\n"); if (cancelled_hp) @@ -2368,7 +2392,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) break; } - if (info->last_jackdet == present) { + if (present) { dev_dbg(arizona->dev, "Detected jack\n"); if (arizona->pdata.jd_wake_time) From 2e31bde21bd52d6b93e402cc7459e776fa727c39 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 29 Jan 2015 16:40:25 +0000 Subject: [PATCH 0634/1167] switch: arizona: Check physical state of the jack before HP and Mic det Change-Id: Iada64873e4f934713e0f392241b8cd196b3944e5 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 4a8fd51fb0d..3699eae9606 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -2075,7 +2075,9 @@ static irqreturn_t arizona_hpdet_handler(int irq, void *data) case ARIZONA_ACCDET_MODE_HPL: case ARIZONA_ACCDET_MODE_HPR: case ARIZONA_ACCDET_MODE_HPM: - break; + /* Fall through to spurious if no jack present */ + if (arizona_jack_present(info, NULL) > 0) + break; default: dev_warn(arizona->dev, "Spurious HPDET IRQ\n"); arizona_jds_start_timeout(info); @@ -2112,6 +2114,9 @@ static void arizona_micd_handler(struct work_struct *work) mutex_lock(&info->lock); + if (arizona_jack_present(info, NULL) <= 0) + goto spurious; + switch (arizona_jds_get_mode(info)) { case ARIZONA_ACCDET_MODE_MIC: ret = arizona_micd_read(info); @@ -2120,10 +2125,7 @@ static void arizona_micd_handler(struct work_struct *work) ret = arizona_micd_adc_read(info); break; default: - dev_warn(arizona->dev, "Spurious MICDET IRQ\n"); - arizona_jds_start_timeout(info); - mutex_unlock(&info->lock); - return; + goto spurious; } if (ret == -EAGAIN) @@ -2139,6 +2141,13 @@ static void arizona_micd_handler(struct work_struct *work) pm_runtime_mark_last_busy(info->dev); mutex_unlock(&info->lock); + + return; + +spurious: + dev_warn(arizona->dev, "Spurious MICDET IRQ\n"); + arizona_jds_start_timeout(info); + mutex_unlock(&info->lock); } static void arizona_micd_input_clear(struct work_struct *work) From b33a4ed482e066dc7a058c1f61f132a94404686d Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 30 Jan 2015 14:56:18 +0000 Subject: [PATCH 0635/1167] ASoC: wm8998: Fix input mux routing When the input mux controls were renamed in the change "ASoC: wm8998: update to new input mux control naming" some of the routing was not updated to the new name. This patch fixes that. Change-Id: I6c59f8bfcaf4f7768456becda424034251889e04 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm8998.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/sound/soc/codecs/wm8998.c b/sound/soc/codecs/wm8998.c index a3c459c3684..7393e19ebf7 100644 --- a/sound/soc/codecs/wm8998.c +++ b/sound/soc/codecs/wm8998.c @@ -925,9 +925,9 @@ static const struct snd_soc_dapm_route wm8998_dapm_routes[] = { { "IN2 Mux", "A", "IN2A" }, { "IN2 Mux", "B", "IN2B" }, - { "IN1L PGA", NULL, "IN1MUXL Input" }, - { "IN1R PGA", NULL, "IN1MUXR Input" }, - { "IN2 PGA", NULL, "IN2MUX Input" }, + { "IN1L PGA", NULL, "IN1L Mux" }, + { "IN1R PGA", NULL, "IN1R Mux" }, + { "IN2 PGA", NULL, "IN2 Mux" }, ARIZONA_MIXER_ROUTES("OUT1L", "HPOUTL"), ARIZONA_MIXER_ROUTES("OUT1R", "HPOUTR"), @@ -1180,8 +1180,7 @@ static int wm8998_in1mux_ev(struct snd_soc_dapm_widget *w, */ if (left_mux != right_mux) { dev_err(arizona->dev, - "IN1=DMIC and 'IN1MUXL Input'" - " != 'IN1MUXR Input'"); + "IN1=DMIC and IN1L Mux != IN1R Mux"); return -EINVAL; } From 032b604d0e9cc5558c1e0df40db12fc4bc737736 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 2 Feb 2015 10:15:23 +0000 Subject: [PATCH 0636/1167] ASoC: arizona: Only reset trigger flag for ez2control core The trigger flag is mistakenly being reset for all cores which could lead to retriggers when another core is loaded. This patch fixes the issue so the trigger flag is only reset when the ez2control core is powered up. Change-Id: Ica0e085876f09e46d4392a6db7a99bd1db82f4ae Signed-off-by: Charles Keepax --- sound/soc/codecs/clearwater.c | 8 +++++--- sound/soc/codecs/cs47l24.c | 8 +++++--- sound/soc/codecs/florida.c | 8 +++++--- 3 files changed, 15 insertions(+), 9 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 658d8e1d66a..b37d4850cad 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -219,9 +219,11 @@ static int clearwater_adsp_power_ev(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_PRE_PMU: - mutex_lock(&clearwater->compr_info.lock); - clearwater->compr_info.trig = false; - mutex_unlock(&clearwater->compr_info.lock); + if (w->shift == 5) { + mutex_lock(&clearwater->compr_info.lock); + clearwater->compr_info.trig = false; + mutex_unlock(&clearwater->compr_info.lock); + } break; default: break; diff --git a/sound/soc/codecs/cs47l24.c b/sound/soc/codecs/cs47l24.c index c6bc274f58d..c1bf76eecdc 100644 --- a/sound/soc/codecs/cs47l24.c +++ b/sound/soc/codecs/cs47l24.c @@ -81,9 +81,11 @@ static int cs47l24_adsp_power_ev(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_PRE_PMU: - mutex_lock(&cs47l24->compr_info.lock); - cs47l24->compr_info.trig = false; - mutex_unlock(&cs47l24->compr_info.lock); + if (w->shift == 2) { + mutex_lock(&cs47l24->compr_info.lock); + cs47l24->compr_info.trig = false; + mutex_unlock(&cs47l24->compr_info.lock); + } break; default: break; diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 5eb5003513d..862ad739230 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -228,9 +228,11 @@ static int florida_adsp_power_ev(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_PRE_PMU: - mutex_lock(&florida->compr_info.lock); - florida->compr_info.trig = false; - mutex_unlock(&florida->compr_info.lock); + if (w->shift == 2) { + mutex_lock(&florida->compr_info.lock); + florida->compr_info.trig = false; + mutex_unlock(&florida->compr_info.lock); + } break; default: break; From 071f3ee761fad481058fe818c0674286a7c2e860 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 2 Feb 2015 09:18:57 +0000 Subject: [PATCH 0637/1167] switch: arizona: Factor out parts of button detection Factor out the manual debounce and button reporting parts of the button detection so they can be seperately reused. Change-Id: I5bf44a33146acee66e4aaf10ad5f867a8d800e62 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 32 ++++++++++++++++++++++++++------ 1 file changed, 26 insertions(+), 6 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 3699eae9606..98cbbfe65e0 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1385,15 +1385,11 @@ void arizona_micd_stop(struct arizona_extcon_info *info) } EXPORT_SYMBOL_GPL(arizona_micd_stop); -int arizona_micd_button_reading(struct arizona_extcon_info *info, - int val) +static int arizona_micd_button_debounce(struct arizona_extcon_info *info, + int val) { struct arizona *arizona = info->arizona; int debounce_lim = arizona->pdata.micd_manual_debounce; - int i, key; - - if (val < 0) - return val; if ((debounce_lim) && ( !(info->antenna_skip_btn_db))) { @@ -1422,6 +1418,15 @@ int arizona_micd_button_reading(struct arizona_extcon_info *info, } } + return 0; +} + +static int arizona_micd_button_process(struct arizona_extcon_info *info, + int val) +{ + struct arizona *arizona = info->arizona; + int i, key; + if (val < MICROPHONE_MIN_OHM) { dev_dbg(arizona->dev, "Mic button detected\n"); @@ -1452,6 +1457,21 @@ int arizona_micd_button_reading(struct arizona_extcon_info *info, return 0; } + +int arizona_micd_button_reading(struct arizona_extcon_info *info, + int val) +{ + int ret; + + if (val < 0) + return val; + + ret = arizona_micd_button_debounce(info, val); + if (ret < 0) + return ret; + + return arizona_micd_button_process(info, val); +} EXPORT_SYMBOL_GPL(arizona_micd_button_reading); static int arizona_antenna_moisture_reading(struct arizona_extcon_info *info, From fd083f3f99724b708cc134e7258dcdb9ed58aa47 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 4 Feb 2015 09:38:29 +0000 Subject: [PATCH 0638/1167] switch: arizona: Factor out restart of microphone detection Change-Id: I83cab76435a8b2f76005eae145f604bc275ac9f0 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 98cbbfe65e0..6c54f61c2c0 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1385,6 +1385,16 @@ void arizona_micd_stop(struct arizona_extcon_info *info) } EXPORT_SYMBOL_GPL(arizona_micd_stop); +static void arizona_micd_restart(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, 0); + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, ARIZONA_MICD_ENA); +} + static int arizona_micd_button_debounce(struct arizona_extcon_info *info, int val) { @@ -1408,12 +1418,7 @@ static int arizona_micd_button_debounce(struct arizona_extcon_info *info, } else { dev_dbg(arizona->dev, "Software debounce: %d,%x\n", info->micd_count, val); - regmap_update_bits(arizona->regmap, - ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_ENA, 0); - regmap_update_bits(arizona->regmap, - ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_ENA, ARIZONA_MICD_ENA); + arizona_micd_restart(info); return -EAGAIN; } } From 147ddee5fc6f7362ec940dacf8ef87f36f0c9442 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 4 Feb 2015 08:21:53 +0000 Subject: [PATCH 0639/1167] switch: arizona: Merge arizona_micd_adc_restart and arizona_micd_restart Change-Id: I4bb7b72ffa81d0f3f1fed791e796cfe4abdf2a04 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 6c54f61c2c0..e0caac4d28c 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1777,14 +1777,6 @@ void arizona_micd_mic_stop(struct arizona_extcon_info *info) } EXPORT_SYMBOL_GPL(arizona_micd_mic_stop); -static void arizona_micd_adc_restart(struct arizona_extcon_info *info) -{ - struct arizona *arizona = info->arizona; - - regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_ENA, ARIZONA_MICD_ENA); -} - int arizona_micd_mic_reading(struct arizona_extcon_info *info, int val) { struct arizona *arizona = info->arizona; @@ -2266,7 +2258,7 @@ EXPORT_SYMBOL_GPL(arizona_micd_button); const struct arizona_jd_state arizona_micd_adc_mic = { .mode = ARIZONA_ACCDET_MODE_ADC, .start = arizona_micd_mic_start, - .restart = arizona_micd_adc_restart, + .restart = arizona_micd_restart, .reading = arizona_micd_mic_reading, .stop = arizona_micd_mic_stop, From 3864d306b094ef59d6dbcbc23884187ca48d3ab8 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 2 Feb 2015 07:18:33 +0000 Subject: [PATCH 0640/1167] Revert "switch: arizona: handle 3-pole jack removal and 4-pole jack half way insertion." This reverts commit 2589f91567e695f5c55d3351e5089d5fc5470a1b. This commit appears to attempt to solve the problem of button reports whilst removing a 3 pole jack, but this is not the correct solution. Firstly, antenna_state seems to needlessly duplicate the mic value in extcon_info. Secondly, a better fix would be to not be doing button detection on a 3-pole jack. Change-Id: I2ec176561e6082374e3e499dd67772db5a5bea73 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 23 +++++------------------ 1 file changed, 5 insertions(+), 18 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index e0caac4d28c..9216c449eab 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -69,9 +69,6 @@ #define HP_LOW_IMPEDANCE_LIMIT 13 -#define ANTENNA_3_POLE_INSERTED 0x2 -#define ANTENNA_4_POLE_INSERTED 0x4 - struct arizona_hpdet_d_trims { int off; int grad_x2; @@ -105,7 +102,6 @@ struct arizona_extcon_info { int antenna_cnt_plugout; int antenna_res_old_plugout; bool antenna_skip_btn_db; - int antenna_state; int moisture_count; struct delayed_work hpdet_work; @@ -1612,9 +1608,6 @@ static int arizona_antenna_oc_reading(struct arizona_extcon_info *info, int val) if (arizona->pdata.micd_cb) arizona->pdata.micd_cb(info->mic); - // remember antenna state - info->antenna_state = info->mic ? ANTENNA_4_POLE_INSERTED : ANTENNA_3_POLE_INSERTED; - return 0; } @@ -1721,17 +1714,11 @@ static int arizona_antenna_button_reading(struct arizona_extcon_info *info, mic = (val >= MICROPHONE_MIN_OHM); if (mic && mic != info->mic) { - // if 3 pole jack was inserted, this could be false event on removal - // or 4 pole jack was inserted half way through and then pushed, - // check jack again and notify proper state. - if(info->antenna_state & ANTENNA_3_POLE_INSERTED) { - arizona_jds_set_state(info, &arizona_antenna_mic_det); - return -EAGAIN; - } else { - info->mic = mic; - info->antenna_skip_btn_db = true; - arizona_extcon_report(info, BIT_HEADSET); - } + info->mic = mic; + info->antenna_skip_btn_db = true; + if (arizona->pdata.micd_cb) + arizona->pdata.micd_cb(info->mic); + arizona_extcon_report(info, BIT_HEADSET); } if (info->mic)/* previous hs det so check for button */ From 176b58f51dbb44b65b4f5de6b523eb7460314c17 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 2 Feb 2015 07:28:19 +0000 Subject: [PATCH 0641/1167] switch: arizona: Simplify arizona_antenna_oc_reading The open-circuit state should simply return back to the microphone detection state once it detects an impedance that is not open-circuit. This is necessary because we need to do the 3/4 pole determination using an ADC read, it also has the additional benefit of making the function much simpler. Change-Id: Ic1eb619071401ad9f5a03f36c94b6c2600154a82 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 59 ++++----------------------------- 1 file changed, 6 insertions(+), 53 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 9216c449eab..e4126db6c28 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -95,9 +95,6 @@ struct arizona_extcon_info { int micd_res_old; int micd_debounce; int micd_count; - int antenna_res_old; - int antenna_debounce; - int antenna_count; int antenna_db_plugout; int antenna_cnt_plugout; int antenna_res_old_plugout; @@ -1520,9 +1517,6 @@ static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, int val info->antenna_db_plugout = 0; info->antenna_cnt_plugout = 0; info->antenna_res_old_plugout = 0; - info->antenna_res_old = 0; - info->antenna_debounce = 0; - info->antenna_count = 0; info->mic = false; /* Use a sufficiently large number to indicate open circuit */ if (arizona->pdata.hpdet_cb) @@ -1554,59 +1548,21 @@ static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, int val static int arizona_antenna_oc_reading(struct arizona_extcon_info *info, int val) { struct arizona *arizona = info->arizona; - int debounce_lim = arizona->pdata.antenna_manual_debounce; int ret; - dev_dbg(arizona->dev, "Antenna Detection: Antenna Reading: 0x%x\n", val); + dev_dbg(arizona->dev, "%s: Reading: %d Ohms\n", __func__, val); if (val < 0) return val; + ret = arizona_micd_button_debounce(info, val); + if (ret < 0) + return ret; + if (val > MICROPHONE_MAX_OHM) return 0; - if (debounce_lim) { - if (info->antenna_debounce != val) - info->antenna_count = 0; - - info->antenna_debounce = val; - info->antenna_count++; - - if (info->antenna_count == debounce_lim) { - info->antenna_count = 0; - if (val == info->antenna_res_old) - return 0; - - info->antenna_res_old = val; - } else { - dev_dbg(arizona->dev, "Antenna software debounce: %d,%x\n", - info->antenna_count, val); - regmap_update_bits(arizona->regmap, - ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_ENA, 0); - regmap_update_bits(arizona->regmap, - ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_ENA, ARIZONA_MICD_ENA); - return -EAGAIN; - } - } - - info->mic = (val >= MICROPHONE_MIN_OHM); - - if (arizona->pdata.hpdet_channel) - ret = arizona_jds_set_state(info, &arizona_antenna_hpr_oc_det); - else - ret = arizona_jds_set_state(info, &arizona_antenna_hp_oc_det); - - if (ret < 0) { - if (info->mic) - arizona_extcon_report(info, BIT_HEADSET); - else - arizona_extcon_report(info, BIT_HEADSET_NO_MIC); - } - - if (arizona->pdata.micd_cb) - arizona->pdata.micd_cb(info->mic); + arizona_jds_set_state(info, &arizona_antenna_mic_det); return 0; } @@ -2453,9 +2409,6 @@ static irqreturn_t arizona_jackdet(int irq, void *data) info->micd_res_old = 0; info->micd_debounce = 0; info->micd_count = 0; - info->antenna_res_old = 0; - info->antenna_debounce = 0; - info->antenna_count = 0; info->antenna_db_plugout = 0; info->antenna_cnt_plugout = 0; info->antenna_res_old_plugout = 0; From ab4f1c612cbb22c73550b8e1f5c4a7a054870622 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 2 Feb 2015 07:35:05 +0000 Subject: [PATCH 0642/1167] switch: arizona: Remove unneeded hp_oc states No need to have seperate states for the headphone detection here these are redundant. Change-Id: Iec189de10dcbb30390ed8d35ad8001cf4cbdd834 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 37 --------------------------------- include/linux/switch-arizona.h | 4 +--- 2 files changed, 1 insertion(+), 40 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index e4126db6c28..c5ce8e67392 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1567,27 +1567,6 @@ static int arizona_antenna_oc_reading(struct arizona_extcon_info *info, int val) return 0; } -static int arizona_antenna_hp_oc_reading(struct arizona_extcon_info *info, int val) -{ - dev_dbg(info->arizona->dev, "Antenna Detection: HP-Antenna Reading: 0x%x\n", val); - - if (val < 0) - return val; - - arizona_set_headphone_imp(info, val); - - if (info->mic) { - info->antenna_skip_btn_db = true; - arizona_extcon_report(info, BIT_HEADSET); - } else { - arizona_extcon_report(info, BIT_HEADSET_NO_MIC); - } - - arizona_jds_set_state(info, &arizona_antenna_button_det); - - return 0; -} - static int arizona_antenna_hp_reading(struct arizona_extcon_info *info, int val) { dev_dbg(info->arizona->dev, "Antenna Detection: HP Reading: 0x%x\n", val); @@ -2280,22 +2259,6 @@ const struct arizona_jd_state arizona_antenna_button_det = { }; EXPORT_SYMBOL_GPL(arizona_antenna_button_det); -const struct arizona_jd_state arizona_antenna_hp_oc_det = { - .mode = ARIZONA_ACCDET_MODE_HPL, - .start = arizona_hpdet_start, - .reading = arizona_antenna_hp_oc_reading, - .stop = arizona_hpdet_stop, -}; -EXPORT_SYMBOL_GPL(arizona_antenna_hp_oc_det); - -const struct arizona_jd_state arizona_antenna_hpr_oc_det = { - .mode = ARIZONA_ACCDET_MODE_HPR, - .start = arizona_hpdet_start, - .reading = arizona_antenna_hp_oc_reading, - .stop = arizona_hpdet_stop, -}; -EXPORT_SYMBOL_GPL(arizona_antenna_hpr_oc_det); - static void arizona_hpdet_work(struct work_struct *work) { struct arizona_extcon_info *info = container_of(work, diff --git a/include/linux/switch-arizona.h b/include/linux/switch-arizona.h index 5f84fe58cbf..736156c4cea 100644 --- a/include/linux/switch-arizona.h +++ b/include/linux/switch-arizona.h @@ -67,10 +67,8 @@ extern const struct arizona_jd_state arizona_antenna_moisture; extern const struct arizona_jd_state arizona_antenna_mic_det; extern const struct arizona_jd_state arizona_antenna_oc_det; extern const struct arizona_jd_state arizona_antenna_hp_det; -extern const struct arizona_jd_state arizona_antenna_button_det; -extern const struct arizona_jd_state arizona_antenna_hp_oc_det; extern const struct arizona_jd_state arizona_antenna_hpr_det; -extern const struct arizona_jd_state arizona_antenna_hpr_oc_det; +extern const struct arizona_jd_state arizona_antenna_button_det; extern int arizona_hpdet_start(struct arizona_extcon_info *info); extern void arizona_hpdet_restart(struct arizona_extcon_info *info); From 0a13a24ee0eaf3c5d208c243a4d206db22c1eba6 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 2 Feb 2015 07:41:40 +0000 Subject: [PATCH 0643/1167] switch: arizona: Tidy up arizona_antenna_hp_reading Tidy up the code in arizona_antenna_hp_reading and add a new state that will monitor for jack state changes whilst a 3-pole is connected. Change-Id: I2455e43a2677387b89e9c9671351c739c3e87bb4 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 38 ++++++++++++++++++++++++++++++--- include/linux/switch-arizona.h | 1 + 2 files changed, 36 insertions(+), 3 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index c5ce8e67392..51ad9a5989e 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1569,7 +1569,9 @@ static int arizona_antenna_oc_reading(struct arizona_extcon_info *info, int val) static int arizona_antenna_hp_reading(struct arizona_extcon_info *info, int val) { - dev_dbg(info->arizona->dev, "Antenna Detection: HP Reading: 0x%x\n", val); + struct arizona *arizona = info->arizona; + + dev_dbg(arizona->dev, "%s: Reading: %d Ohms\n", __func__, val); if (val < 0) return val; @@ -1578,12 +1580,34 @@ static int arizona_antenna_hp_reading(struct arizona_extcon_info *info, int val) if (info->mic) { arizona_extcon_report(info, BIT_HEADSET); - info->antenna_skip_btn_db = false; + arizona_jds_set_state(info, &arizona_antenna_button_det); } else { arizona_extcon_report(info, BIT_HEADSET_NO_MIC); + arizona_jds_set_state(info, &arizona_antenna_remove_det); } - arizona_jds_set_state(info, &arizona_antenna_button_det); + return 0; +} + +static int arizona_antenna_remove_reading(struct arizona_extcon_info *info, + int val) +{ + struct arizona *arizona = info->arizona; + int ret; + + dev_dbg(arizona->dev, "%s: Reading: %d Ohms\n", __func__, val); + + if (val < 0) + return val; + + ret = arizona_micd_button_debounce(info, val); + if (ret < 0) + return ret; + + if (val < MICROPHONE_MIN_OHM) + return 0; + + arizona_jds_set_state(info, &arizona_antenna_mic_det); return 0; } @@ -2259,6 +2283,14 @@ const struct arizona_jd_state arizona_antenna_button_det = { }; EXPORT_SYMBOL_GPL(arizona_antenna_button_det); +const struct arizona_jd_state arizona_antenna_remove_det = { + .mode = ARIZONA_ACCDET_MODE_MIC, + .start = arizona_micd_start, + .reading = arizona_antenna_remove_reading, + .stop = arizona_micd_stop, +}; +EXPORT_SYMBOL_GPL(arizona_antenna_remove_det); + static void arizona_hpdet_work(struct work_struct *work) { struct arizona_extcon_info *info = container_of(work, diff --git a/include/linux/switch-arizona.h b/include/linux/switch-arizona.h index 736156c4cea..6576d0ddc03 100644 --- a/include/linux/switch-arizona.h +++ b/include/linux/switch-arizona.h @@ -69,6 +69,7 @@ extern const struct arizona_jd_state arizona_antenna_oc_det; extern const struct arizona_jd_state arizona_antenna_hp_det; extern const struct arizona_jd_state arizona_antenna_hpr_det; extern const struct arizona_jd_state arizona_antenna_button_det; +extern const struct arizona_jd_state arizona_antenna_remove_det; extern int arizona_hpdet_start(struct arizona_extcon_info *info); extern void arizona_hpdet_restart(struct arizona_extcon_info *info); From defda5eaa338f4e5ca2512e7e51c90987042a4a6 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 2 Feb 2015 07:51:23 +0000 Subject: [PATCH 0644/1167] switch: arizona: Simplify arizona_antenna_button_reading Now that arizona_antenna_button_reading only handles measurements for 4-pole insertions it can be made dramatically simpler. Change-Id: Ia1d5a644a4c1ecb1f313624e5906814009730a28 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 81 ++++++--------------------------- 1 file changed, 13 insertions(+), 68 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 51ad9a5989e..5062f52ddc0 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -95,10 +95,6 @@ struct arizona_extcon_info { int micd_res_old; int micd_debounce; int micd_count; - int antenna_db_plugout; - int antenna_cnt_plugout; - int antenna_res_old_plugout; - bool antenna_skip_btn_db; int moisture_count; struct delayed_work hpdet_work; @@ -1394,8 +1390,7 @@ static int arizona_micd_button_debounce(struct arizona_extcon_info *info, struct arizona *arizona = info->arizona; int debounce_lim = arizona->pdata.micd_manual_debounce; - if ((debounce_lim) && - ( !(info->antenna_skip_btn_db))) { + if (debounce_lim) { if (info->micd_debounce != val) info->micd_count = 0; @@ -1514,9 +1509,6 @@ static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, int val return val; if (val > MICROPHONE_MAX_OHM) { - info->antenna_db_plugout = 0; - info->antenna_cnt_plugout = 0; - info->antenna_res_old_plugout = 0; info->mic = false; /* Use a sufficiently large number to indicate open circuit */ if (arizona->pdata.hpdet_cb) @@ -1613,81 +1605,38 @@ static int arizona_antenna_remove_reading(struct arizona_extcon_info *info, } static int arizona_antenna_button_reading(struct arizona_extcon_info *info, - int val) + int val) { struct arizona *arizona = info->arizona; - int debounce_lim = arizona->pdata.antenna_manual_db_plugout; - int i, ret = 0; - bool mic; + int ret = 0; - dev_dbg(arizona->dev, "Antenna Detection: Button Reading: 0x%x\n", val); + dev_dbg(arizona->dev, "%s: Reading: %d Ohms\n", __func__, val); if (val < 0) return val; - if (debounce_lim && info->antenna_skip_btn_db) { - /** If plugout debounce is set and we are skipping the debounce for - * button then do a common debounce below to handle both slow - * plugouts and buttons - */ - if (info->antenna_db_plugout != val) - info->antenna_cnt_plugout = 0; - - info->antenna_db_plugout = val; - info->antenna_cnt_plugout++; - - if (info->antenna_cnt_plugout == debounce_lim) { - info->antenna_cnt_plugout = 0; - if (val == info->antenna_res_old_plugout) - return 0; + ret = arizona_micd_button_debounce(info, val); + if (ret < 0) + return ret; - info->antenna_res_old_plugout = val; - } else { - dev_dbg(arizona->dev, "Antenna software plugout db: %d,%x\n", - info->antenna_cnt_plugout, val); - regmap_update_bits(arizona->regmap, - ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_ENA, 0); - regmap_update_bits(arizona->regmap, - ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_ENA, ARIZONA_MICD_ENA); - return -EAGAIN; - } - } + if (val > MICROPHONE_MAX_OHM) { + int i; - if (val > MICROPHONE_MAX_OHM) { /* Detected open circuit*/ - /** Due to slow plugout of 4 pole headset from the antenna cable - * the gnd/hpl/hpr of 4 pole can come in contact with mic pin of - * antenna hence measuring a low impedance on the mic pin and - * reporting a button presse event. So here we send a button - * release event to negate all such false button presses - */ + /* Clear any currently pressed buttons */ for (i = 0; i < info->num_micd_ranges; i++) input_report_key(info->input, info->micd_ranges[i].key, 0); input_sync(info->input); - info->antenna_skip_btn_db = false; - ret = arizona_antenna_mic_reading(info, val); + arizona_extcon_report(info, BIT_ANTENNA); + arizona_jds_set_state(info, &arizona_antenna_mic_det); } else { - mic = (val >= MICROPHONE_MIN_OHM); - - if (mic && mic != info->mic) { - info->mic = mic; - info->antenna_skip_btn_db = true; - if (arizona->pdata.micd_cb) - arizona->pdata.micd_cb(info->mic); - arizona_extcon_report(info, BIT_HEADSET); - } - - if (info->mic)/* previous hs det so check for button */ - ret = arizona_micd_button_reading(info, val); + ret = arizona_micd_button_reading(info, val); } return ret; } - int arizona_micd_mic_start(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; @@ -2404,10 +2353,6 @@ static irqreturn_t arizona_jackdet(int irq, void *data) info->micd_res_old = 0; info->micd_debounce = 0; info->micd_count = 0; - info->antenna_db_plugout = 0; - info->antenna_cnt_plugout = 0; - info->antenna_res_old_plugout = 0; - info->antenna_skip_btn_db = false; info->moisture_count = 0; arizona->hp_impedance = 0; arizona_jds_set_state(info, NULL); From 74185284d14e64bd418e150c8c650a22a1c4ceb8 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 2 Feb 2015 08:22:19 +0000 Subject: [PATCH 0645/1167] switch: arizona: Trivial tidy up of arizona_antenna_mic_reading Change-Id: I035119e8c5adeeaced2a710367489155bfe12ee8 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 5062f52ddc0..bf3d5641be4 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1498,31 +1498,37 @@ static int arizona_antenna_moisture_reading(struct arizona_extcon_info *info, return 0; } -static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, int val) +static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, + int val) { struct arizona *arizona = info->arizona; int ret; - dev_dbg(arizona->dev, "Antenna Detection: Mic Reading: 0x%x\n", val); + dev_dbg(arizona->dev, "%s: Reading: %d\n", __func__, val); if (val < 0) return val; + ret = arizona_micd_button_debounce(info, val); + if (ret < 0) + return ret; + if (val > MICROPHONE_MAX_OHM) { info->mic = false; - /* Use a sufficiently large number to indicate open circuit */ - if (arizona->pdata.hpdet_cb) - arizona->pdata.hpdet_cb(ARIZONA_HP_Z_OPEN); + + arizona_set_headphone_imp(info, ARIZONA_HP_Z_OPEN); + arizona_extcon_report(info, BIT_ANTENNA); arizona_jds_set_state(info, &arizona_antenna_oc_det); } else { info->mic = (val >= MICROPHONE_MIN_OHM); if (arizona->pdata.hpdet_channel) - ret = arizona_jds_set_state(info, &arizona_antenna_hpr_det); + ret = arizona_jds_set_state(info, + &arizona_antenna_hpr_det); else - ret = arizona_jds_set_state(info, &arizona_antenna_hp_det); - + ret = arizona_jds_set_state(info, + &arizona_antenna_hp_det); if (ret < 0) { if (info->mic) arizona_extcon_report(info, BIT_HEADSET); From ba1af67586f19e39c048f25d94617a343ee0b2e5 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 2 Feb 2015 09:38:09 +0000 Subject: [PATCH 0646/1167] switch: arizona: Add additional debounce after button detection Confirm that a button press is genuine by checking if microphone impedance doesn't go to open-circuit. Change-Id: I4d1c88b32d2011bff9990f5a142b8ffc7b0fa0c5 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 32 +++++++++++++++++++++++++++++--- include/linux/switch-arizona.h | 1 + 2 files changed, 30 insertions(+), 3 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index bf3d5641be4..16fe39dbbdd 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -125,6 +125,9 @@ struct arizona_extcon_info { int mic_impedance; struct completion manual_mic_completion; + + int button_impedance; + int button_check; }; static const struct arizona_micd_config micd_default_modes[] = { @@ -1513,6 +1516,8 @@ static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, if (ret < 0) return ret; + info->button_impedance = 0; + if (val > MICROPHONE_MAX_OHM) { info->mic = false; @@ -1614,7 +1619,7 @@ static int arizona_antenna_button_reading(struct arizona_extcon_info *info, int val) { struct arizona *arizona = info->arizona; - int ret = 0; + int ret; dev_dbg(arizona->dev, "%s: Reading: %d Ohms\n", __func__, val); @@ -1628,6 +1633,9 @@ static int arizona_antenna_button_reading(struct arizona_extcon_info *info, if (val > MICROPHONE_MAX_OHM) { int i; + info->button_impedance = 0; + info->button_check = false; + /* Clear any currently pressed buttons */ for (i = 0; i < info->num_micd_ranges; i++) input_report_key(info->input, @@ -1637,10 +1645,27 @@ static int arizona_antenna_button_reading(struct arizona_extcon_info *info, arizona_extcon_report(info, BIT_ANTENNA); arizona_jds_set_state(info, &arizona_antenna_mic_det); } else { - ret = arizona_micd_button_reading(info, val); + switch (info->button_check) { + case 0: + info->button_impedance = val; + info->button_check = 2; + return -EAGAIN; + + case 1: + info->button_check = 0; + arizona_micd_button_process(info, + info->button_impedance); + if (info->button_impedance != val) + return -EAGAIN; + break; + + default: + info->button_check--; + return -EAGAIN; + } } - return ret; + return 0; } int arizona_micd_mic_start(struct arizona_extcon_info *info) @@ -2233,6 +2258,7 @@ EXPORT_SYMBOL_GPL(arizona_antenna_hpr_det); const struct arizona_jd_state arizona_antenna_button_det = { .mode = ARIZONA_ACCDET_MODE_MIC, .start = arizona_micd_start, + .restart = arizona_micd_restart, .reading = arizona_antenna_button_reading, .stop = arizona_micd_stop, }; diff --git a/include/linux/switch-arizona.h b/include/linux/switch-arizona.h index 6576d0ddc03..204d08bcf14 100644 --- a/include/linux/switch-arizona.h +++ b/include/linux/switch-arizona.h @@ -69,6 +69,7 @@ extern const struct arizona_jd_state arizona_antenna_oc_det; extern const struct arizona_jd_state arizona_antenna_hp_det; extern const struct arizona_jd_state arizona_antenna_hpr_det; extern const struct arizona_jd_state arizona_antenna_button_det; +extern const struct arizona_jd_state arizona_antenna_button_check; extern const struct arizona_jd_state arizona_antenna_remove_det; extern int arizona_hpdet_start(struct arizona_extcon_info *info); From a1a7dd36991a2aefb2615207e92b71d2eccf4705 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 4 Feb 2015 10:20:24 +0000 Subject: [PATCH 0647/1167] switch: arizona: Don't report antenna cable Change-Id: I1b120a152d4b5ed620337374772a28a62a00ba38 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 16fe39dbbdd..4a24c26ffcc 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -160,7 +160,6 @@ enum headset_state { BIT_NO_HEADSET = 0, BIT_HEADSET = (1 << 0), BIT_HEADSET_NO_MIC = (1 << 1), - BIT_ANTENNA = (1 << 2), }; static ssize_t arizona_extcon_show(struct device *dev, @@ -1523,7 +1522,7 @@ static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, arizona_set_headphone_imp(info, ARIZONA_HP_Z_OPEN); - arizona_extcon_report(info, BIT_ANTENNA); + arizona_extcon_report(info, BIT_NO_HEADSET); arizona_jds_set_state(info, &arizona_antenna_oc_det); } else { info->mic = (val >= MICROPHONE_MIN_OHM); @@ -1642,7 +1641,7 @@ static int arizona_antenna_button_reading(struct arizona_extcon_info *info, info->micd_ranges[i].key, 0); input_sync(info->input); - arizona_extcon_report(info, BIT_ANTENNA); + arizona_extcon_report(info, BIT_NO_HEADSET); arizona_jds_set_state(info, &arizona_antenna_mic_det); } else { switch (info->button_check) { From 065f4cadc7ce10ff6d0331640c39965934224c43 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Fri, 6 Feb 2015 20:21:37 +0900 Subject: [PATCH 0648/1167] mfd: arizona: add deferred resume codec resume is deferred if the card has not yet resumed Change-Id: I155544e3585245b256ddaba226e43ecf2dc97314 Signed-off-by: Nikesh Oswal --- drivers/mfd/arizona-core.c | 52 +++++++++++++++++++++++++++++--- include/linux/mfd/arizona/core.h | 3 ++ sound/soc/codecs/Kconfig | 3 ++ 3 files changed, 54 insertions(+), 4 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 68458c1a7f0..d01dfa76dc8 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -26,6 +26,9 @@ #include #include #include +#include +#include +#include #include #include @@ -877,15 +880,51 @@ static int arizona_resume_noirq(struct device *dev) return 0; } +#ifdef CONFIG_SND_SOC_ARIZONA_DEFERRED_RESUME +static void arizona_resume_deferred(struct work_struct *work) +{ + struct arizona *arizona = + container_of(work, struct arizona, deferred_resume_work); + int level = -1; + + if (arizona->dapm) + level = snd_power_get_state(arizona->dapm->card->snd_card); + + if ((arizona->dapm) && (level != SNDRV_CTL_POWER_D0)) { + if (!schedule_work(&arizona->deferred_resume_work)) + dev_err(arizona->dev, "Resume work item may be lost\n"); + } else { + dev_dbg(arizona->dev, "Deferred resume, reenabling IRQ\n"); + if (arizona->irq_sem) { + enable_irq(arizona->irq); + arizona->irq_sem = 0; + } + } +} +#endif + static int arizona_resume(struct device *dev) { struct arizona *arizona = dev_get_drvdata(dev); +#ifdef CONFIG_SND_SOC_ARIZONA_DEFERRED_RESUME + int level = -1; - dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n"); - if (arizona->irq_sem) { - enable_irq(arizona->irq); - arizona->irq_sem = 0; + if (arizona->dapm) + level = snd_power_get_state(arizona->dapm->card->snd_card); + + if ((arizona->dapm) && (level != SNDRV_CTL_POWER_D0)) { + if (!schedule_work(&arizona->deferred_resume_work)) + dev_err(dev, "Resume work item may be lost\n"); + } else { +#endif + dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n"); + if (arizona->irq_sem) { + enable_irq(arizona->irq); + arizona->irq_sem = 0; + } +#ifdef CONFIG_SND_SOC_ARIZONA_DEFERRED_RESUME } +#endif return 0; } @@ -1498,6 +1537,11 @@ int arizona_dev_init(struct arizona *arizona) return -EINVAL; } +#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_SND_SOC_ARIZONA_DEFERRED_RESUME) + /* deferred resume work */ + INIT_WORK(&arizona->deferred_resume_work, arizona_resume_deferred); +#endif + /* Mark DCVDD as external, LDO1 driver will clear if internal */ arizona->external_dcvdd = true; diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 120a97b1905..354248738a5 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -166,6 +166,9 @@ struct arizona { uint8_t out_comp_enabled; bool bypass_cache; +#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_SND_SOC_ARIZONA_DEFERRED_RESUME) + struct work_struct deferred_resume_work; +#endif }; #define ARIZONA_DVFS_SR1_RQ 0x00000001 diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index b803745003f..2d50caa5022 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -158,6 +158,9 @@ config SND_SOC_ARIZONA default m if SND_SOC_WM8998=m default m if SND_SOC_CS47L24=m +config SND_SOC_ARIZONA_DEFERRED_RESUME + tristate + config SND_SOC_WM_HUBS tristate default y if SND_SOC_WM8993=y || SND_SOC_WM8994=y From 1dc699c0eaad5afd0e0b070e2458a8d11f6d915f Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Sat, 7 Feb 2015 19:57:12 +0900 Subject: [PATCH 0649/1167] mfd: arizona: move the deferred resume flag move the deferred resume flag from codecs Kconfig to mfd Kconfig since the arizona driver is defined in mfd Change-Id: I2b3be5646296e62ea70cfdab6d45a5c57cd7e8db --- drivers/mfd/Kconfig | 6 ++++++ drivers/mfd/arizona-core.c | 8 ++++---- include/linux/mfd/arizona/core.h | 2 +- sound/soc/codecs/Kconfig | 3 --- 4 files changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index faddc82be7a..c997837a0f7 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1011,6 +1011,12 @@ config MFD_ARIZONA select MFD_CORE bool +config MFD_ARIZONA_DEFERRED_RESUME + bool "Arizona Deferred Resume" + depends on MFD_ARIZONA + help + Support for Arizona deferred resume + config MFD_ARIZONA_I2C tristate "Wolfson Microelectronics Arizona platform with I2C" select MFD_ARIZONA diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index d01dfa76dc8..5ec5adfad76 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -880,7 +880,7 @@ static int arizona_resume_noirq(struct device *dev) return 0; } -#ifdef CONFIG_SND_SOC_ARIZONA_DEFERRED_RESUME +#ifdef CONFIG_MFD_ARIZONA_DEFERRED_RESUME static void arizona_resume_deferred(struct work_struct *work) { struct arizona *arizona = @@ -906,7 +906,7 @@ static void arizona_resume_deferred(struct work_struct *work) static int arizona_resume(struct device *dev) { struct arizona *arizona = dev_get_drvdata(dev); -#ifdef CONFIG_SND_SOC_ARIZONA_DEFERRED_RESUME +#ifdef CONFIG_MFD_ARIZONA_DEFERRED_RESUME int level = -1; if (arizona->dapm) @@ -922,7 +922,7 @@ static int arizona_resume(struct device *dev) enable_irq(arizona->irq); arizona->irq_sem = 0; } -#ifdef CONFIG_SND_SOC_ARIZONA_DEFERRED_RESUME +#ifdef CONFIG_MFD_ARIZONA_DEFERRED_RESUME } #endif @@ -1537,7 +1537,7 @@ int arizona_dev_init(struct arizona *arizona) return -EINVAL; } -#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_SND_SOC_ARIZONA_DEFERRED_RESUME) +#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_MFD_ARIZONA_DEFERRED_RESUME) /* deferred resume work */ INIT_WORK(&arizona->deferred_resume_work, arizona_resume_deferred); #endif diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 354248738a5..38300531677 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -166,7 +166,7 @@ struct arizona { uint8_t out_comp_enabled; bool bypass_cache; -#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_SND_SOC_ARIZONA_DEFERRED_RESUME) +#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_MFD_ARIZONA_DEFERRED_RESUME) struct work_struct deferred_resume_work; #endif }; diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 2d50caa5022..b803745003f 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -158,9 +158,6 @@ config SND_SOC_ARIZONA default m if SND_SOC_WM8998=m default m if SND_SOC_CS47L24=m -config SND_SOC_ARIZONA_DEFERRED_RESUME - tristate - config SND_SOC_WM_HUBS tristate default y if SND_SOC_WM8993=y || SND_SOC_WM8994=y From 7facf989825ae97925cfeb6c2dae9fbfc64e93b0 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 5 Feb 2015 14:41:48 +0000 Subject: [PATCH 0650/1167] mfd: arizona: Make ASRC_RATE2 and ASYNC_SAMPLE_RATE_2 readable Change-Id: I8ad948c1ad431867b03e61c638b622f3c2a4cc14 Signed-off-by: Richard Fitzgerald --- drivers/mfd/clearwater-tables.c | 1 + drivers/mfd/cs47l24-tables.c | 2 ++ drivers/mfd/florida-tables.c | 2 ++ drivers/mfd/wm5102-tables.c | 1 + drivers/mfd/wm8998-tables.c | 5 +++++ 5 files changed, 11 insertions(+) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index dc69fb771aa..82b56991805 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -3228,6 +3228,7 @@ static bool clearwater_16bit_volatile_register(struct device *dev, unsigned int case ARIZONA_SAMPLE_RATE_2_STATUS: case ARIZONA_SAMPLE_RATE_3_STATUS: case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: + case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: case ARIZONA_DCS_HP1L_CONTROL: case ARIZONA_DCS_HP1R_CONTROL: case ARIZONA_MIC_DETECT_3: diff --git a/drivers/mfd/cs47l24-tables.c b/drivers/mfd/cs47l24-tables.c index 42b28266dc5..02252d637d4 100644 --- a/drivers/mfd/cs47l24-tables.c +++ b/drivers/mfd/cs47l24-tables.c @@ -776,6 +776,7 @@ static const struct reg_default cs47l24_reg_default[] = { { 0x00000ECD, 0x0000 }, /* R3789 - HPLPF4_2 */ { 0x00000EE0, 0x0000 }, /* R3808 - ASRC_ENABLE */ { 0x00000EE2, 0x0000 }, /* R3810 - ASRC_RATE1 */ + { 0x00000EE3, 0x4000 }, /* R3811 - ASRC_RATE2 */ { 0x00000EF0, 0x0000 }, /* R3824 - ISRC 1 CTRL 1 */ { 0x00000EF1, 0x0000 }, /* R3825 - ISRC 1 CTRL 2 */ { 0x00000EF2, 0x0000 }, /* R3826 - ISRC 1 CTRL 3 */ @@ -1439,6 +1440,7 @@ static bool cs47l24_readable_register(struct device *dev, unsigned int reg) case ARIZONA_ASRC_ENABLE: case ARIZONA_ASRC_STATUS: case ARIZONA_ASRC_RATE1: + case ARIZONA_ASRC_RATE2: case ARIZONA_ISRC_1_CTRL_1: case ARIZONA_ISRC_1_CTRL_2: case ARIZONA_ISRC_1_CTRL_3: diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 866e5687b4c..e852b02bdad 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -1646,6 +1646,7 @@ static const struct reg_default florida_reg_default[] = { { 0x00000ECD, 0x0000 }, /* R3789 - HPLPF4_2 */ { 0x00000EE0, 0x0000 }, /* R3808 - ASRC_ENABLE */ { 0x00000EE2, 0x0000 }, /* R3810 - ASRC_RATE1 */ + { 0x00000EE3, 0x4000 }, /* R3811 - ASRC_RATE2 */ { 0x00000EF0, 0x0000 }, /* R3824 - ISRC 1 CTRL 1 */ { 0x00000EF1, 0x0000 }, /* R3825 - ISRC 1 CTRL 2 */ { 0x00000EF2, 0x0000 }, /* R3826 - ISRC 1 CTRL 3 */ @@ -2914,6 +2915,7 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_ASRC_ENABLE: case ARIZONA_ASRC_STATUS: case ARIZONA_ASRC_RATE1: + case ARIZONA_ASRC_RATE2: case ARIZONA_ISRC_1_CTRL_1: case ARIZONA_ISRC_1_CTRL_2: case ARIZONA_ISRC_1_CTRL_3: diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index 11767cb7583..84afce10267 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -1067,6 +1067,7 @@ static const struct reg_default wm5102_reg_default[] = { { 0x00000ECD, 0x0000 }, /* R3789 - HPLPF4_2 */ { 0x00000EE0, 0x0000 }, /* R3808 - ASRC_ENABLE */ { 0x00000EE2, 0x0000 }, /* R3810 - ASRC_RATE1 */ + { 0x00000EE3, 0x0400 }, /* R3811 - ASRC_RATE2 */ { 0x00000EF0, 0x0000 }, /* R3824 - ISRC 1 CTRL 1 */ { 0x00000EF1, 0x0000 }, /* R3825 - ISRC 1 CTRL 2 */ { 0x00000EF2, 0x0000 }, /* R3826 - ISRC 1 CTRL 3 */ diff --git a/drivers/mfd/wm8998-tables.c b/drivers/mfd/wm8998-tables.c index dfeabd6d640..c692df122a3 100644 --- a/drivers/mfd/wm8998-tables.c +++ b/drivers/mfd/wm8998-tables.c @@ -216,6 +216,7 @@ static const struct reg_default wm8998_reg_default[] = { { 0x00000104, 0x0011 }, /* R260 - Sample rate 3 */ { 0x00000112, 0x0305 }, /* R274 - Async clock 1 */ { 0x00000113, 0x0011 }, /* R275 - Async sample rate 1 */ + { 0x00000114, 0x0011 }, /* R276 - Async sample rate 2 */ { 0x00000149, 0x0000 }, /* R329 - Output system clock */ { 0x0000014A, 0x0000 }, /* R330 - Output async clock */ { 0x00000152, 0x0000 }, /* R338 - Rate Estimator 1 */ @@ -876,6 +877,8 @@ static bool wm8998_readable_register(struct device *dev, unsigned int reg) case ARIZONA_ASYNC_CLOCK_1: case ARIZONA_ASYNC_SAMPLE_RATE_1: case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: + case ARIZONA_ASYNC_SAMPLE_RATE_2: + case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: case ARIZONA_OUTPUT_SYSTEM_CLOCK: case ARIZONA_OUTPUT_ASYNC_CLOCK: case ARIZONA_RATE_ESTIMATOR_1: @@ -1497,6 +1500,7 @@ static bool wm8998_readable_register(struct device *dev, unsigned int reg) case ARIZONA_ASRC_ENABLE: case ARIZONA_ASRC_STATUS: case ARIZONA_ASRC_RATE1: + case ARIZONA_ASRC_RATE2: case ARIZONA_ISRC_1_CTRL_1: case ARIZONA_ISRC_1_CTRL_2: case ARIZONA_ISRC_1_CTRL_3: @@ -1528,6 +1532,7 @@ static bool wm8998_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_SAMPLE_RATE_2_STATUS: case ARIZONA_SAMPLE_RATE_3_STATUS: case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: + case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: case ARIZONA_MIC_DETECT_3: case ARIZONA_MIC_DETECT_4: case ARIZONA_HEADPHONE_DETECT_2: From acb5d98cf6f47eda28d2572880898c062e8955f9 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 3 Feb 2015 02:28:16 +0000 Subject: [PATCH 0651/1167] ASoC: arizona: Add support for ASRC RATE 1 Some CODECs are missing a control for ASRC Rate 1, add this to the CODECs that are missing it, but support it. Change-Id: Ifa100ab1f075e326b2e85ff3513d75b15a1f4a44 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5102.c | 1 + sound/soc/codecs/wm8997.c | 1 + 2 files changed, 2 insertions(+) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 3f42af3b4a0..e4d3fd1ce61 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -877,6 +877,7 @@ SOC_VALUE_ENUM("FX Rate", arizona_fx_rate), SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), +SOC_VALUE_ENUM("ASRC RATE 1", arizona_asrc_rate1), ARIZONA_MIXER_CONTROLS("Mic", ARIZONA_MICMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("Noise", ARIZONA_NOISEMIX_INPUT_1_SOURCE), diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c index 6cbbf70ac73..fa604b938d6 100644 --- a/sound/soc/codecs/wm8997.c +++ b/sound/soc/codecs/wm8997.c @@ -241,6 +241,7 @@ SND_SOC_BYTES("LHPF4 Coefficients", ARIZONA_HPLPF4_2, 1), SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), +SOC_VALUE_ENUM("ASRC RATE 1", arizona_asrc_rate1), ARIZONA_MIXER_CONTROLS("Mic", ARIZONA_MICMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("Noise", ARIZONA_NOISEMIX_INPUT_1_SOURCE), From f9a3cf0d6118792c3217ee29a8dedb00bfafa8c9 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 3 Feb 2015 02:25:03 +0000 Subject: [PATCH 0652/1167] ASoC: arizona: Add support for ASRC RATE 2 Change-Id: Iba00848fde7f79ebed103f67e3e1455d9b0fe869 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 8 ++++++++ sound/soc/codecs/arizona.h | 1 + sound/soc/codecs/cs47l24.c | 1 + sound/soc/codecs/florida.c | 1 + sound/soc/codecs/wm5102.c | 1 + sound/soc/codecs/wm8998.c | 1 + 6 files changed, 13 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index e51ab32dddb..7e51d423f92 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1063,6 +1063,14 @@ const struct soc_enum arizona_asrc_rate1 = arizona_rate_text, arizona_rate_val); EXPORT_SYMBOL_GPL(arizona_asrc_rate1); +const struct soc_enum arizona_asrc_rate2 = + SOC_VALUE_ENUM_SINGLE(ARIZONA_ASRC_RATE2, + ARIZONA_ASRC_RATE2_SHIFT, 0xf, + ARIZONA_ASYNC_RATE_ENUM_SIZE, + arizona_rate_text + ARIZONA_SYNC_RATE_ENUM_SIZE, + arizona_rate_val + ARIZONA_SYNC_RATE_ENUM_SIZE); +EXPORT_SYMBOL_GPL(arizona_asrc_rate2); + const struct soc_enum clearwater_asrc1_rate[] = { SOC_VALUE_ENUM_SINGLE(CLEARWATER_ASRC1_RATE1, CLEARWATER_ASRC1_RATE1_SHIFT, 0xf, diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 7f6116e74e5..08497d045ab 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -260,6 +260,7 @@ extern const struct soc_enum arizona_sample_rate[]; extern const struct soc_enum arizona_isrc_fsl[]; extern const struct soc_enum arizona_isrc_fsh[]; extern const struct soc_enum arizona_asrc_rate1; +extern const struct soc_enum arizona_asrc_rate2; extern const struct soc_enum clearwater_asrc1_rate[]; extern const struct soc_enum clearwater_asrc2_rate[]; extern const struct soc_enum arizona_input_rate; diff --git a/sound/soc/codecs/cs47l24.c b/sound/soc/codecs/cs47l24.c index c1bf76eecdc..f39f2cf90dc 100644 --- a/sound/soc/codecs/cs47l24.c +++ b/sound/soc/codecs/cs47l24.c @@ -195,6 +195,7 @@ SOC_VALUE_ENUM("ISRC1 FSH", arizona_isrc_fsh[0]), SOC_VALUE_ENUM("ISRC2 FSH", arizona_isrc_fsh[1]), SOC_VALUE_ENUM("ISRC3 FSH", arizona_isrc_fsh[2]), SOC_VALUE_ENUM("ASRC RATE 1", arizona_asrc_rate1), +SOC_VALUE_ENUM("ASRC RATE 2", arizona_asrc_rate2), ARIZONA_MIXER_CONTROLS("DSP2L", ARIZONA_DSP2LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("DSP2R", ARIZONA_DSP2RMIX_INPUT_1_SOURCE), diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 862ad739230..7e83244c7c6 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -445,6 +445,7 @@ SOC_VALUE_ENUM("ISRC1 FSH", arizona_isrc_fsh[0]), SOC_VALUE_ENUM("ISRC2 FSH", arizona_isrc_fsh[1]), SOC_VALUE_ENUM("ISRC3 FSH", arizona_isrc_fsh[2]), SOC_VALUE_ENUM("ASRC RATE 1", arizona_asrc_rate1), +SOC_VALUE_ENUM("ASRC RATE 2", arizona_asrc_rate2), ARIZONA_MIXER_CONTROLS("DSP1L", ARIZONA_DSP1LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("DSP1R", ARIZONA_DSP1RMIX_INPUT_1_SOURCE), diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index e4d3fd1ce61..62fd312cea9 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -878,6 +878,7 @@ SOC_VALUE_ENUM("FX Rate", arizona_fx_rate), SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), SOC_VALUE_ENUM("ASRC RATE 1", arizona_asrc_rate1), +SOC_VALUE_ENUM("ASRC RATE 2", arizona_asrc_rate2), ARIZONA_MIXER_CONTROLS("Mic", ARIZONA_MICMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("Noise", ARIZONA_NOISEMIX_INPUT_1_SOURCE), diff --git a/sound/soc/codecs/wm8998.c b/sound/soc/codecs/wm8998.c index 7393e19ebf7..da7766ebc81 100644 --- a/sound/soc/codecs/wm8998.c +++ b/sound/soc/codecs/wm8998.c @@ -200,6 +200,7 @@ SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), SOC_VALUE_ENUM("ISRC1 FSH", arizona_isrc_fsh[0]), SOC_VALUE_ENUM("ISRC2 FSH", arizona_isrc_fsh[1]), SOC_VALUE_ENUM("ASRC RATE 1", arizona_asrc_rate1), +SOC_VALUE_ENUM("ASRC RATE 2", arizona_asrc_rate2), SOC_SINGLE_TLV("Noise Generator Volume", ARIZONA_COMFORT_NOISE_GENERATOR, ARIZONA_NOISE_GEN_GAIN_SHIFT, 0x16, 0, noise_tlv), From edc969d3c69970781d0aebca1596645b83a48285 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 3 Feb 2015 04:19:33 +0000 Subject: [PATCH 0653/1167] ASoC: wm8998: Add control for Async Sample Rate 2 Change-Id: I1d61d1e5bcdab1c4abb645d3b56b809ddcf9b8ca Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 4 ++++ sound/soc/codecs/wm8998.c | 1 + 2 files changed, 5 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 7e51d423f92..810a3082cae 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2609,6 +2609,10 @@ int arizona_put_sample_rate_enum(struct snd_kcontrol *kcontrol, flag = ARIZONA_DVFS_SR3_RQ; break; + case ARIZONA_ASYNC_SAMPLE_RATE_2: + flag = ARIZONA_DVFS_ASR2_RQ; + break; + default: return ret; } diff --git a/sound/soc/codecs/wm8998.c b/sound/soc/codecs/wm8998.c index da7766ebc81..f2a3622ec20 100644 --- a/sound/soc/codecs/wm8998.c +++ b/sound/soc/codecs/wm8998.c @@ -194,6 +194,7 @@ SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), ARIZONA_SAMPLE_RATE_CONTROL_DVFS("Sample Rate 2", 2), ARIZONA_SAMPLE_RATE_CONTROL_DVFS("Sample Rate 3", 3), +ARIZONA_SAMPLE_RATE_CONTROL_DVFS("ASYNC Sample Rate 2", 4), SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), From fa7c886575eef6a249305a349719b618bf6cff68 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 3 Feb 2015 04:28:02 +0000 Subject: [PATCH 0654/1167] ASoC: wm8998: Warn if ASRC is started with unsupported sample rate Change-Id: I742420fec7ac5de062385f4b365f024c17315a25 Signed-off-by: Charles Keepax Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm8998.c | 48 ++++++++++++++++++++++++++++++++------- 1 file changed, 40 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/wm8998.c b/sound/soc/codecs/wm8998.c index f2a3622ec20..b6a250da1c7 100644 --- a/sound/soc/codecs/wm8998.c +++ b/sound/soc/codecs/wm8998.c @@ -45,6 +45,38 @@ static int wm8998_in2mux_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); +static int wm8998_asrc_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + unsigned int val; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + val = snd_soc_read(w->codec, ARIZONA_ASRC_RATE1); + val &= ARIZONA_ASRC_RATE1_MASK; + val >>= ARIZONA_ASRC_RATE1_SHIFT; + + val = snd_soc_read(w->codec, ARIZONA_SAMPLE_RATE_1 + val); + if (val >= 0x11) + dev_warn(w->codec->dev, "Unsupported ASRC rate1\n"); + + val = snd_soc_read(w->codec, ARIZONA_ASRC_RATE2); + val &= ARIZONA_ASRC_RATE2_MASK; + val >>= ARIZONA_ASRC_RATE2_SHIFT; + val -= 0x8; + + val = snd_soc_read(w->codec, ARIZONA_ASYNC_SAMPLE_RATE_1 + val); + if (val >= 0x11) + dev_warn(w->codec->dev, "Unsupported ASRC rate2\n"); + break; + default: + return -EINVAL; + } + + return 0; +} + static const char * const wm8998_inmux_texts[] = { "A", "B", @@ -508,14 +540,14 @@ SND_SOC_DAPM_PGA("PWM1 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM1_ENA_SHIFT, SND_SOC_DAPM_PGA("PWM2 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM2_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC1L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC1L_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("ASRC1R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC1R_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("ASRC2L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2L_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0, - NULL, 0), +SND_SOC_DAPM_PGA_E("ASRC1L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC1L_ENA_SHIFT, 0, + NULL, 0, wm8998_asrc_ev, SND_SOC_DAPM_PRE_PMU), +SND_SOC_DAPM_PGA_E("ASRC1R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC1R_ENA_SHIFT, 0, + NULL, 0, wm8998_asrc_ev, SND_SOC_DAPM_PRE_PMU), +SND_SOC_DAPM_PGA_E("ASRC2L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2L_ENA_SHIFT, 0, + NULL, 0, wm8998_asrc_ev, SND_SOC_DAPM_PRE_PMU), +SND_SOC_DAPM_PGA_E("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0, + NULL, 0, wm8998_asrc_ev, SND_SOC_DAPM_PRE_PMU), SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), From 86bb68a61a833d950d682f875005fb73d76baf16 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 10 Feb 2015 16:33:21 +0000 Subject: [PATCH 0655/1167] switch: arizona: Always report mic for the antenna cable The MICDET is running all the time, so to support so unusual machine driver configurations always report that we have a mic present for the antenna cable. Change-Id: Ie8ceaab530b77971ab4e65e92ff27b2ad59f831e Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 4a24c26ffcc..30fccfc9869 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1542,7 +1542,7 @@ static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, } if (arizona->pdata.micd_cb) - arizona->pdata.micd_cb(info->mic); + arizona->pdata.micd_cb(true); return 0; } From 0d30b9358dd2c0f0a76b50b3ad8522615ecc5e68 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 6 Feb 2015 11:25:16 +0000 Subject: [PATCH 0656/1167] Revert "ASoC: clearwater: Add additional no DRE disable/enable sequences" This reverts commit 28a22fbe3c99a5b6c7a4b2d3ac631185c0e8591c. Reverting to replace with a simpler implementation. Change-Id: I6c6a386bd6f9db3528d5eaaeb1b794b7dd410227 Signed-off-by: Richard Fitzgerald Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 173 +++---------------------------------- 1 file changed, 14 insertions(+), 159 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 810a3082cae..24ebf1086a3 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1847,150 +1847,6 @@ int clearwater_put_dre(struct snd_kcontrol *kcontrol, } EXPORT_SYMBOL_GPL(clearwater_put_dre); -static int clearwater_hp_pre_enable(struct snd_soc_dapm_widget *w) -{ - unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); - - switch (w->shift) { - case ARIZONA_OUT1L_ENA_SHIFT: - if (!(val & ARIZONA_DRE1L_ENA_MASK)) - snd_soc_update_bits(w->codec, - ARIZONA_OUTPUT_PATH_CONFIG_1L, - ARIZONA_OUT1L_PGA_VOL_MASK, - 0x56); - break; - - case ARIZONA_OUT1R_ENA_SHIFT: - if (!(val & ARIZONA_DRE1R_ENA_MASK)) - snd_soc_update_bits(w->codec, - ARIZONA_OUTPUT_PATH_CONFIG_1R, - ARIZONA_OUT1R_PGA_VOL_MASK, - 0x56); - break; - - default: - break; - } - - return 0; -} - -static int clearwater_hp_post_enable(struct snd_soc_dapm_widget *w) -{ - unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); - - switch (w->shift) { - case ARIZONA_OUT1L_ENA_SHIFT: - if (!(val & ARIZONA_DRE1L_ENA_MASK)) { - snd_soc_write(w->codec, - ARIZONA_WRITE_SEQUENCER_CTRL_0, - ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | - 0x1c0); - msleep(10); - snd_soc_update_bits(w->codec, - ARIZONA_OUTPUT_PATH_CONFIG_1L, - ARIZONA_OUT1L_PGA_VOL_MASK, - 0x80); - } - break; - - case ARIZONA_OUT1R_ENA_SHIFT: - if (!(val & ARIZONA_DRE1R_ENA_MASK)) { - snd_soc_write(w->codec, - ARIZONA_WRITE_SEQUENCER_CTRL_0, - ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | - 0x1c5); - msleep(10); - snd_soc_update_bits(w->codec, - ARIZONA_OUTPUT_PATH_CONFIG_1R, - ARIZONA_OUT1R_PGA_VOL_MASK, - 0x80); - } - break; - - default: - break; - } - - return 0; -} - -static int clearwater_hp_pre_disable(struct snd_soc_dapm_widget *w) -{ - unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); - - switch (w->shift) { - case ARIZONA_OUT1L_ENA_SHIFT: - if (!(val & ARIZONA_DRE1L_ENA_MASK)) { - snd_soc_write(w->codec, - ARIZONA_WRITE_SEQUENCER_CTRL_0, - ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | - 0x1ca); - msleep(10); - snd_soc_update_bits(w->codec, - ARIZONA_OUTPUT_PATH_CONFIG_1L, - ARIZONA_OUT1L_PGA_VOL_MASK, - 0x56); - } - break; - - case ARIZONA_OUT1R_ENA_SHIFT: - if (!(val & ARIZONA_DRE1R_ENA_MASK)) { - snd_soc_write(w->codec, - ARIZONA_WRITE_SEQUENCER_CTRL_0, - ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | - 0x1ce); - msleep(10); - snd_soc_update_bits(w->codec, - ARIZONA_OUTPUT_PATH_CONFIG_1R, - ARIZONA_OUT1R_PGA_VOL_MASK, - 0x56); - } - break; - - default: - break; - } - - return 0; -} - -static int clearwater_hp_post_disable(struct snd_soc_dapm_widget *w) -{ - unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); - - switch (w->shift) { - case ARIZONA_OUT1L_ENA_SHIFT: - if (!(val & ARIZONA_DRE1L_ENA_MASK)) { - snd_soc_write(w->codec, - ARIZONA_DCS_HP1L_CONTROL, - 0x2006); - snd_soc_update_bits(w->codec, - ARIZONA_OUTPUT_PATH_CONFIG_1L, - ARIZONA_OUT1L_PGA_VOL_MASK, - 0x80); - } - break; - - case ARIZONA_OUT1R_ENA_SHIFT: - if (!(val & ARIZONA_DRE1R_ENA_MASK)) { - snd_soc_write(w->codec, - ARIZONA_DCS_HP1R_CONTROL, - 0x2006); - snd_soc_update_bits(w->codec, - ARIZONA_OUTPUT_PATH_CONFIG_1R, - ARIZONA_OUT1R_PGA_VOL_MASK, - 0x80); - } - break; - - default: - break; - } - - return 0; -} - int arizona_out_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) @@ -2008,10 +1864,6 @@ int arizona_out_ev(struct snd_soc_dapm_widget *w, case WM5110: florida_hp_post_enable(w); break; - case WM8285: - case WM1840: - clearwater_hp_post_enable(w); - break; default: break; } @@ -2064,10 +1916,6 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, case WM5110: florida_hp_pre_enable(w); break; - case WM8285: - case WM1840: - clearwater_hp_pre_enable(w); - break; default: break; } @@ -2081,10 +1929,6 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, case WM5110: florida_hp_pre_disable(w); break; - case WM8285: - case WM1840: - clearwater_hp_pre_disable(w); - break; default: break; } @@ -2098,9 +1942,20 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, case WM8285: case WM1840: ret = arizona_out_ev(w, kcontrol, event); - - clearwater_hp_post_disable(w); - + switch (w->shift) { + case ARIZONA_OUT1L_ENA_SHIFT: + snd_soc_write(w->codec, + ARIZONA_DCS_HP1L_CONTROL, + 0x2006); + break; + case ARIZONA_OUT1R_ENA_SHIFT: + snd_soc_write(w->codec, + ARIZONA_DCS_HP1R_CONTROL, + 0x2006); + break; + default: + break; + } break; default: ret = 0; From 5549c58001cc796877a1d50ff5bf5c513cef6c45 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 6 Feb 2015 11:58:53 +0000 Subject: [PATCH 0657/1167] mfd: clearwater: Add EDRE stereo control register Change-Id: I1b8f1f60f3506b6496575fad5626888ef44f9a0b Signed-off-by: Richard Fitzgerald --- drivers/mfd/clearwater-tables.c | 2 ++ include/linux/mfd/arizona/registers.h | 17 +++++++++++++++++ 2 files changed, 19 insertions(+) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index 82b56991805..d84b28013c5 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -549,6 +549,7 @@ static const struct reg_default clearwater_reg_default[] = { { 0x00000228, 0x1406 }, { 0x00000229, 0x1406 }, { 0x0000022a, 0x1406 }, + { 0x0000027e, 0x0001 }, /* R638 (0x27E) - Clearwater EDRE HP stereo control */ { 0x00000293, 0x0000 }, /* R659 (0x293) - Accessory Detect Mode 1 */ { 0x0000029b, 0x0000 }, /* R667 (0x29B) - Headphone Detect 1 */ { 0x0000029f, 0x0000 }, @@ -2018,6 +2019,7 @@ static bool clearwater_16bit_readable_register(struct device *dev, unsigned int case ARIZONA_HP_CTRL_3R: case ARIZONA_DCS_HP1L_CONTROL: case ARIZONA_DCS_HP1R_CONTROL: + case CLEARWATER_EDRE_HP_STEREO_CONTROL: case ARIZONA_ACCESSORY_DETECT_MODE_1: case ARIZONA_HEADPHONE_DETECT_1: case ARIZONA_HEADPHONE_DETECT_2: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index a2555588bc2..8d4023ea8a8 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -157,6 +157,7 @@ #define ARIZONA_HP_CTRL_3R 0x22A #define ARIZONA_DCS_HP1L_CONTROL 0x232 #define ARIZONA_DCS_HP1R_CONTROL 0x238 +#define CLEARWATER_EDRE_HP_STEREO_CONTROL 0x27E #define ARIZONA_ACCESSORY_DETECT_MODE_1 0x293 #define ARIZONA_HEADPHONE_DETECT_1 0x29B #define ARIZONA_HEADPHONE_DETECT_2 0x29C @@ -3602,6 +3603,22 @@ #define ARIZONA_HP1R_SHRTO_SHIFT 0 /* HP1R_SHRTO */ #define ARIZONA_HP1R_SHRTO_WIDTH 1 /* HP1R_SHRTO */ +/* + * R638 (0x27E) - Clearwater EDRE HP stereo control + */ +#define ARIZONA_HP3_EDRE_STEREO 0x0004 /* HP3_EDRE_STEREO */ +#define ARIZONA_HP3_EDRE_STEREO_MASK 0x0004 /* HP3_EDRE_STEREO */ +#define ARIZONA_HP3_EDRE_STEREO_SHIFT 2 /* HP3_EDRE_STEREO */ +#define ARIZONA_HP3_EDRE_STEREO_WIDTH 1 /* HP3_EDRE_STEREO */ +#define ARIZONA_HP2_EDRE_STEREO 0x0002 /* HP2_EDRE_STEREO */ +#define ARIZONA_HP2_EDRE_STEREO_MASK 0x0002 /* HP2_EDRE_STEREO */ +#define ARIZONA_HP2_EDRE_STEREO_SHIFT 1 /* HP2_EDRE_STEREO */ +#define ARIZONA_HP2_EDRE_STEREO_WIDTH 1 /* HP2_EDRE_STEREO */ +#define ARIZONA_HP1_EDRE_STEREO 0x0001 /* HP1_EDRE_STEREO */ +#define ARIZONA_HP1_EDRE_STEREO_MASK 0x0001 /* HP1_EDRE_STEREO */ +#define ARIZONA_HP1_EDRE_STEREO_SHIFT 0 /* HP1_EDRE_STEREO */ +#define ARIZONA_HP1_EDRE_STEREO_WIDTH 1 /* HP1_EDRE_STEREO */ + /* * R659 (0x293) - Accessory Detect Mode 1 */ From d2dc858eca0f9de2a2ca3f8078b54b26da6ee00e Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 6 Feb 2015 17:12:36 +0000 Subject: [PATCH 0658/1167] mfd: clearwater: Update register patch Change-Id: Ib20af2caa123e674ed3a51092c8d2139638b5557 Signed-off-by: Richard Fitzgerald --- drivers/mfd/clearwater-tables.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index d84b28013c5..eb7df94a4ba 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -41,13 +41,13 @@ static const struct reg_default clearwater_reva_16_patch[] = { { 0x293, 0x0080 }, { 0x17D, 0x0303 }, { 0x19D, 0x0303 }, - { 0x27E, 0x0001 }, + { 0x27E, 0x0000 }, { 0x80, 0x0000 }, { 0x80, 0x0000 }, }; static const struct reg_default clearwater_revc_16_patch[] = { - { 0x27E, 0x0001 }, + { 0x27E, 0x0000 }, }; /* this patch is required for EDRE on RevA*/ @@ -549,7 +549,7 @@ static const struct reg_default clearwater_reg_default[] = { { 0x00000228, 0x1406 }, { 0x00000229, 0x1406 }, { 0x0000022a, 0x1406 }, - { 0x0000027e, 0x0001 }, /* R638 (0x27E) - Clearwater EDRE HP stereo control */ + { 0x0000027e, 0x0000 }, /* R638 (0x27E) - Clearwater EDRE HP stereo control */ { 0x00000293, 0x0000 }, /* R659 (0x293) - Accessory Detect Mode 1 */ { 0x0000029b, 0x0000 }, /* R667 (0x29B) - Headphone Detect 1 */ { 0x0000029f, 0x0000 }, From dd510daf2da1afcd6d9ee0255f9523b7003bfce7 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 6 Feb 2015 13:18:44 +0000 Subject: [PATCH 0659/1167] ASoC: arizona: Disable EDRE stereo mode while enabling headphones On Clearwater the EDRE stereo mode must be disabled while enabling a headphone output. Change-Id: I7210fb46a2c5eb7be618adc1b62a923914cbec5e Signed-off-by: Richard Fitzgerald Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 65 ++++++++++++++++++++++++++++++-------- 1 file changed, 51 insertions(+), 14 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 24ebf1086a3..16691d15b10 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1740,6 +1740,52 @@ static int florida_hp_post_disable(struct snd_soc_dapm_widget *w) return 0; } +static void clearwater_hp_post_enable(struct snd_soc_dapm_widget *w) +{ + unsigned int val; + + switch (w->shift) { + case ARIZONA_OUT1L_ENA_SHIFT: + case ARIZONA_OUT1R_ENA_SHIFT: + val = snd_soc_read(w->codec, ARIZONA_OUTPUT_ENABLES_1); + val &= (ARIZONA_OUT1L_ENA | ARIZONA_OUT1R_ENA); + + if (val == (ARIZONA_OUT1L_ENA | ARIZONA_OUT1R_ENA)) + snd_soc_update_bits(w->codec, + CLEARWATER_EDRE_HP_STEREO_CONTROL, + ARIZONA_HP1_EDRE_STEREO_MASK, + ARIZONA_HP1_EDRE_STEREO); + break; + + default: + break; + } +} + +static void clearwater_hp_post_disable(struct snd_soc_dapm_widget *w) +{ + switch (w->shift) { + case ARIZONA_OUT1L_ENA_SHIFT: + snd_soc_write(w->codec, + ARIZONA_DCS_HP1L_CONTROL, + 0x2006); + break; + case ARIZONA_OUT1R_ENA_SHIFT: + snd_soc_write(w->codec, + ARIZONA_DCS_HP1R_CONTROL, + 0x2006); + break; + default: + return; + } + + /* Only get to here for OUT1L and OUT1R */ + snd_soc_update_bits(w->codec, + CLEARWATER_EDRE_HP_STEREO_CONTROL, + ARIZONA_HP1_EDRE_STEREO_MASK, + 0); +} + static int florida_set_dre(struct arizona *arizona, unsigned int shift, bool enable) { @@ -1864,6 +1910,10 @@ int arizona_out_ev(struct snd_soc_dapm_widget *w, case WM5110: florida_hp_post_enable(w); break; + case WM8285: + case WM1840: + clearwater_hp_post_enable(w); + break; default: break; } @@ -1942,20 +1992,7 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, case WM8285: case WM1840: ret = arizona_out_ev(w, kcontrol, event); - switch (w->shift) { - case ARIZONA_OUT1L_ENA_SHIFT: - snd_soc_write(w->codec, - ARIZONA_DCS_HP1L_CONTROL, - 0x2006); - break; - case ARIZONA_OUT1R_ENA_SHIFT: - snd_soc_write(w->codec, - ARIZONA_DCS_HP1R_CONTROL, - 0x2006); - break; - default: - break; - } + clearwater_hp_post_disable(w); break; default: ret = 0; From 8a730c2f756cc4652dffaae7dd1ea2fbea58701c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 11 Feb 2015 14:45:08 +0000 Subject: [PATCH 0660/1167] switch: arizona: Correct microphone level check Currently the code accidentally reports the second highest level (1071-1257 ohms) as a microphone rather than a button. This patch corrects this such that only impedances from 1258-30k ohms are reported as microphones. Change-Id: I7fa319793c4d796be64403b470ae69d1e2bb49c0 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 30fccfc9869..553efb7701c 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -61,7 +61,7 @@ #define HPDET_DEBOUNCE 500 #define DEFAULT_MICD_TIMEOUT 2000 -#define MICROPHONE_MIN_OHM 1257 +#define MICROPHONE_MIN_OHM 1258 #define MICROPHONE_MAX_OHM 30000 #define HP_NORMAL_IMPEDANCE 0 From 225f7ffca7a941a7e2c273b965fd181a789f66d8 Mon Sep 17 00:00:00 2001 From: JS Park Date: Mon, 16 Feb 2015 09:33:29 +0000 Subject: [PATCH 0661/1167] ASoC: arizona: Fix deadlock to use mutex_lock_nested Change-Id: I260b8555165c7209ba2373ecd81e7fa218d741f4 Signed-off-by: JS Park Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 16691d15b10..51f23de62a7 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1865,12 +1865,12 @@ int florida_put_dre(struct snd_kcontrol *kcontrol, unsigned int lshift = mc->shift; unsigned int rshift = mc->rshift; - mutex_lock(&arizona->dapm->card->dapm_mutex); + mutex_lock_nested(&codec->card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); florida_set_dre(arizona, lshift, !!ucontrol->value.integer.value[0]); florida_set_dre(arizona, rshift, !!ucontrol->value.integer.value[1]); - mutex_unlock(&arizona->dapm->card->dapm_mutex); + mutex_unlock(&codec->card->dapm_mutex); return 0; } @@ -1880,14 +1880,13 @@ int clearwater_put_dre(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); - struct arizona *arizona = dev_get_drvdata(codec->dev->parent); int ret; - mutex_lock(&arizona->dapm->card->dapm_mutex); + mutex_lock_nested(&codec->card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); ret = snd_soc_put_volsw(kcontrol, ucontrol); - mutex_unlock(&arizona->dapm->card->dapm_mutex); + mutex_unlock(&codec->card->dapm_mutex); return ret; } From 47656a9adae8486b1778a79cd83adeb985f190fc Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 10 Feb 2015 13:12:40 +0000 Subject: [PATCH 0662/1167] mfd: arizona: Document meaning of gpio_defaults pdata It's not obvious how 'set to zero' and 'leave at default' are defined through this array so document this in the header. Change-Id: I94b11262cc6bdac3a90b55b6551eff3a7225490d Signed-off-by: Richard Fitzgerald --- include/linux/mfd/arizona/pdata.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 028c46d052a..9e3614eb3bd 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -126,7 +126,13 @@ struct arizona_pdata { /* Base GPIO */ int gpio_base; - /** Pin state for GPIO pins */ + /** Pin state for GPIO pins + * Defines default pin function and state for each GPIO + * + * 0 = leave at chip default + * values 0x1..0xffff = set to this value + * >0xffff = set to 0 + */ unsigned int gpio_defaults[CLEARWATER_MAX_GPIO_REGS]; /** From 22cc54e61183cee07f0c878faab70bb26d6019b5 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 9 Feb 2015 16:42:04 +0000 Subject: [PATCH 0663/1167] regulator: arizona-micsupp: Control the cached bypass state directly To avoid races between arizona_disable_force_bypass and jack detection control the cached state directly from the regulator driver. Change-Id: I78641d0d9c4a998dd5d6b36ab97e23a778526c5d Signed-off-by: Charles Keepax --- drivers/regulator/arizona-micsupp.c | 7 +++++-- include/linux/mfd/arizona/core.h | 2 +- sound/soc/codecs/arizona.c | 15 ++++++++------- 3 files changed, 14 insertions(+), 10 deletions(-) diff --git a/drivers/regulator/arizona-micsupp.c b/drivers/regulator/arizona-micsupp.c index 699e230a732..de7dbedf827 100644 --- a/drivers/regulator/arizona-micsupp.c +++ b/drivers/regulator/arizona-micsupp.c @@ -105,10 +105,13 @@ static void arizona_micsupp_check_cp(struct work_struct *work) mutex_lock(&dapm->card->dapm_mutex); if ((reg & (ARIZONA_CPMIC_ENA | ARIZONA_CPMIC_BYPASS)) == - ARIZONA_CPMIC_ENA) + ARIZONA_CPMIC_ENA) { snd_soc_dapm_force_enable_pin(dapm, "MICSUPP"); - else + arizona->micvdd_regulated = true; + } else { snd_soc_dapm_disable_pin(dapm, "MICSUPP"); + arizona->micvdd_regulated = false; + } mutex_unlock(&dapm->card->dapm_mutex); diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 38300531677..94f1c192ab1 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -165,7 +165,7 @@ struct arizona { uint16_t out_comp_coeff; uint8_t out_comp_enabled; - bool bypass_cache; + bool micvdd_regulated; #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_MFD_ARIZONA_DEFERRED_RESUME) struct work_struct deferred_resume_work; #endif diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 51f23de62a7..ab85b7717af 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -3649,12 +3649,9 @@ EXPORT_SYMBOL_GPL(arizona_get_extcon_info); int arizona_enable_force_bypass(struct snd_soc_codec *codec) { struct arizona *arizona = dev_get_drvdata(codec->dev->parent); - unsigned int val; - regmap_read(arizona->regmap, ARIZONA_MIC_CHARGE_PUMP_1, &val); - arizona->bypass_cache = !(val & ARIZONA_CPMIC_BYPASS); - if (arizona->bypass_cache) { - mutex_lock(&arizona->dapm->card->dapm_mutex); + mutex_lock(&arizona->dapm->card->dapm_mutex); + if (arizona->micvdd_regulated) { snd_soc_dapm_disable_pin(arizona->dapm, "MICSUPP"); mutex_unlock(&arizona->dapm->card->dapm_mutex); @@ -3662,6 +3659,8 @@ int arizona_enable_force_bypass(struct snd_soc_codec *codec) regmap_update_bits(arizona->regmap, ARIZONA_MIC_CHARGE_PUMP_1, ARIZONA_CPMIC_BYPASS, ARIZONA_CPMIC_BYPASS); + } else { + mutex_unlock(&arizona->dapm->card->dapm_mutex); } regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_1, @@ -3682,8 +3681,8 @@ int arizona_disable_force_bypass(struct snd_soc_codec *codec) struct arizona *arizona = dev_get_drvdata(codec->dev->parent); struct arizona_micbias *micbias = arizona->pdata.micbias; - if (arizona->bypass_cache) { - mutex_lock(&arizona->dapm->card->dapm_mutex); + mutex_lock(&arizona->dapm->card->dapm_mutex); + if (arizona->micvdd_regulated) { snd_soc_dapm_force_enable_pin(arizona->dapm, "MICSUPP"); mutex_unlock(&arizona->dapm->card->dapm_mutex); @@ -3691,6 +3690,8 @@ int arizona_disable_force_bypass(struct snd_soc_codec *codec) regmap_update_bits(arizona->regmap, ARIZONA_MIC_CHARGE_PUMP_1, ARIZONA_CPMIC_BYPASS, 0); + } else { + mutex_unlock(&arizona->dapm->card->dapm_mutex); } if (!micbias[0].bypass && micbias[0].mV) From 5405094e73f9c9a040a7480836dd137c0c4d5c84 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 22 Jan 2015 14:52:31 +0000 Subject: [PATCH 0664/1167] mfd: clearwater: Add definition of noise generator register Change-Id: I389e1d10cf09db8fe6dacafbd6237b6ea5150cf9 Signed-off-by: Richard Fitzgerald --- drivers/mfd/clearwater-tables.c | 3 ++- include/linux/mfd/arizona/registers.h | 12 ++++++++++++ 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index eb7df94a4ba..b54b4e73c07 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -464,6 +464,7 @@ static const struct reg_default clearwater_reg_default[] = { { 0x00000095, 0x0000 }, /* R149 (0x95) - Haptics phase 2 duration */ { 0x00000096, 0x0000 }, /* R150 (0x96) - Haptics phase 3 intensity */ { 0x00000097, 0x0000 }, /* R151 (0x97) - Haptics phase 3 duration */ + { 0x000000A0, 0x0000 }, /* R160 (0xA0) - Clearwater Comfort Noise Generator */ { 0x00000100, 0x0002 }, /* R256 (0x100) - Clock 32k 1 */ { 0x00000101, 0x0404 }, /* R257 (0x101) - System Clock 1 */ { 0x00000102, 0x0011 }, /* R258 (0x102) - Sample rate 1 */ @@ -1917,7 +1918,6 @@ static bool clearwater_16bit_readable_register(struct device *dev, unsigned int case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4: case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5: case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6: - case ARIZONA_COMFORT_NOISE_GENERATOR: case ARIZONA_HAPTICS_CONTROL_1: case ARIZONA_HAPTICS_CONTROL_2: case ARIZONA_HAPTICS_PHASE_1_INTENSITY: @@ -1927,6 +1927,7 @@ static bool clearwater_16bit_readable_register(struct device *dev, unsigned int case ARIZONA_HAPTICS_PHASE_3_INTENSITY: case ARIZONA_HAPTICS_PHASE_3_DURATION: case ARIZONA_HAPTICS_STATUS: + case CLEARWATER_COMFORT_NOISE_GENERATOR: case ARIZONA_CLOCK_32K_1: case ARIZONA_SYSTEM_CLOCK_1: case ARIZONA_SAMPLE_RATE_1: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 8d4023ea8a8..4147e3bc9f2 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -63,6 +63,7 @@ #define ARIZONA_HAPTICS_PHASE_3_INTENSITY 0x96 #define ARIZONA_HAPTICS_PHASE_3_DURATION 0x97 #define ARIZONA_HAPTICS_STATUS 0x98 +#define CLEARWATER_COMFORT_NOISE_GENERATOR 0xA0 #define ARIZONA_CLOCK_32K_1 0x100 #define ARIZONA_SYSTEM_CLOCK_1 0x101 #define ARIZONA_SAMPLE_RATE_1 0x102 @@ -2688,6 +2689,17 @@ #define ARIZONA_ONESHOT_STS_SHIFT 0 /* ONESHOT_STS */ #define ARIZONA_ONESHOT_STS_WIDTH 1 /* ONESHOT_STS */ +/* + * R160 (0xA0) - Clearwater Comfort Noise Generator + */ +#define CLEARWATER_NOISE_GEN_ENA 0x0020 /* NOISE_GEN_ENA */ +#define CLEARWATER_NOISE_GEN_ENA_MASK 0x0020 /* NOISE_GEN_ENA */ +#define CLEARWATER_NOISE_GEN_ENA_SHIFT 5 /* NOISE_GEN_ENA */ +#define CLEARWATER_NOISE_GEN_ENA_WIDTH 1 /* NOISE_GEN_ENA */ +#define CLEARWATER_NOISE_GEN_GAIN_MASK 0x001F /* NOISE_GEN_GAIN - [4:0] */ +#define CLEARWATER_NOISE_GEN_GAIN_SHIFT 0 /* NOISE_GEN_GAIN - [4:0] */ +#define CLEARWATER_NOISE_GEN_GAIN_WIDTH 5 /* NOISE_GEN_GAIN - [4:0] */ + /* * R256 (0x100) - Clock 32k 1 */ From 2642ebb1227a180fc43b0dc3f189f8df070a727f Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 22 Jan 2015 14:31:21 +0000 Subject: [PATCH 0665/1167] ASoC: clearwater: Fix noise generator volume control The register address and range for this control had been defined wrongly. Change-Id: Ifd963c840b3df8ccc9d8cbbf04a4874b9d4f4f8e Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index b37d4850cad..c7c9ae115de 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -235,7 +235,7 @@ static int clearwater_adsp_power_ev(struct snd_soc_dapm_widget *w, static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); -static DECLARE_TLV_DB_SCALE(noise_tlv, 0, 600, 0); +static DECLARE_TLV_DB_SCALE(noise_tlv, -11400, 600, 0); static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); #define CLEARWATER_NG_SRC(name, base) \ @@ -572,8 +572,8 @@ ARIZONA_MIXER_CONTROLS("DSP6R", CLEARWATER_DSP6RMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("DSP7L", CLEARWATER_DSP7LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("DSP7R", CLEARWATER_DSP7RMIX_INPUT_1_SOURCE), -SOC_SINGLE_TLV("Noise Generator Volume", ARIZONA_COMFORT_NOISE_GENERATOR, - ARIZONA_NOISE_GEN_GAIN_SHIFT, 0x16, 0, noise_tlv), +SOC_SINGLE_TLV("Noise Generator Volume", CLEARWATER_COMFORT_NOISE_GENERATOR, + CLEARWATER_NOISE_GEN_GAIN_SHIFT, 0x12, 0, noise_tlv), ARIZONA_MIXER_CONTROLS("HPOUT1L", ARIZONA_OUT1LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("HPOUT1R", ARIZONA_OUT1RMIX_INPUT_1_SOURCE), @@ -1050,8 +1050,8 @@ SND_SOC_DAPM_SUPPLY("MICBIAS3", ARIZONA_MIC_BIAS_CTRL_3, SND_SOC_DAPM_SUPPLY("MICBIAS4", ARIZONA_MIC_BIAS_CTRL_4, ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("Noise Generator", ARIZONA_COMFORT_NOISE_GENERATOR, - ARIZONA_NOISE_GEN_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("Noise Generator", CLEARWATER_COMFORT_NOISE_GENERATOR, + CLEARWATER_NOISE_GEN_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_PGA("Tone Generator 1", ARIZONA_TONE_GENERATOR_1, ARIZONA_TONE1_ENA_SHIFT, 0, NULL, 0), From 791a474cfb1b9d2df97f38e6beb26f682360d315 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 2 Feb 2015 14:25:33 +0000 Subject: [PATCH 0666/1167] ASoC: clearwater: Add FX rate control Change-Id: I031894ebc6194008dd2b45feb3c5e3f2ea2f5851 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index c7c9ae115de..54ba91cd137 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -544,6 +544,8 @@ SOC_VALUE_ENUM("Sample Rate 2", arizona_sample_rate[0]), SOC_VALUE_ENUM("Sample Rate 3", arizona_sample_rate[1]), SOC_VALUE_ENUM("ASYNC Sample Rate 2", arizona_sample_rate[2]), +SOC_VALUE_ENUM("FX Rate", arizona_fx_rate), + SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), SOC_VALUE_ENUM("ISRC3 FSL", arizona_isrc_fsl[2]), From e07f74f0feef4857d5a1fdc5c366b68b4f8cadd6 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 16 Feb 2015 12:40:23 +0000 Subject: [PATCH 0667/1167] switch: arizona: remove old test code Remove some code that was only used for testing and isn't needed now. Change-Id: I31658ae76423110a5850733d9db3379b45b3e335 Signed-off-by: Richard Fitzgerald --- drivers/switch/switch-arizona.c | 13 ------------- 1 file changed, 13 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 553efb7701c..f5dd64122f2 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -577,15 +577,6 @@ static const struct { { 1000, 10000, 100684000, -949400, 7300, 63200000, 347600, 250000}, }; -#ifdef ARIZONA_HPDET_USE_DEFAULT_TRIMS -static struct arizona_hpdet_d_trims arizona_hpdet_d_trims_default[] = { - { -1, 5}, - { 0, 5 }, - { -2, 12 }, - { -3, 12 }, -}; -#endif - static int arizona_hpdet_d_calibrate(const struct arizona_extcon_info *info, int dacval, int range) { @@ -2643,10 +2634,6 @@ static int arizona_hpdet_d_read_calibration(struct arizona_extcon_info *info) unsigned int v1, v2; int ret = -EIO; -#ifdef ARIZONA_HPDET_USE_DEFAULT_TRIMS - info->hpdet_d_trims = arizona_hpdet_d_trims_default; -#endif - ret = regmap_read(arizona->regmap, 0x0087, &v1); if (ret >= 0) { ret = regmap_read(arizona->regmap, 0x0088, &v2); From ff86dcfb2adad928e3100aec1bcab831daf3ce57 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 30 Jan 2015 10:16:30 +0000 Subject: [PATCH 0668/1167] switch: arizona: Add some missing static declarations Change-Id: Ib8f712f6d927a7febf391c55474b429b306abe8e Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index f5dd64122f2..cc84f61a6fd 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -165,12 +165,12 @@ enum headset_state { static ssize_t arizona_extcon_show(struct device *dev, struct device_attribute *attr, char *buf); -DEVICE_ATTR(hp_impedance, S_IRUGO, arizona_extcon_show, NULL); +static DEVICE_ATTR(hp_impedance, S_IRUGO, arizona_extcon_show, NULL); static ssize_t arizona_extcon_mic_show(struct device *dev, struct device_attribute *attr, char *buf); -DEVICE_ATTR(mic_impedance, S_IRUGO, arizona_extcon_mic_show, NULL); +static DEVICE_ATTR(mic_impedance, S_IRUGO, arizona_extcon_mic_show, NULL); inline void arizona_extcon_report(struct arizona_extcon_info *info, int state) { @@ -896,8 +896,8 @@ static const struct reg_default clearwater_normal_impedance_patch[] = { { 0x483, 0x0023 }, }; -int arizona_wm5110_tune_headphone(struct arizona_extcon_info *info, - int reading) +static int arizona_wm5110_tune_headphone(struct arizona_extcon_info *info, + int reading) { struct arizona *arizona = info->arizona; const struct reg_default *patch; @@ -946,8 +946,8 @@ int arizona_wm5110_tune_headphone(struct arizona_extcon_info *info, return 0; } -int arizona_wm1814_tune_headphone(struct arizona_extcon_info *info, - int reading) +static int arizona_wm1814_tune_headphone(struct arizona_extcon_info *info, + int reading) { struct arizona *arizona = info->arizona; const struct reg_default *patch; @@ -987,8 +987,8 @@ int arizona_wm1814_tune_headphone(struct arizona_extcon_info *info, return 0; } -int arizona_clearwater_tune_headphone(struct arizona_extcon_info *info, - int reading) +static int arizona_clearwater_tune_headphone(struct arizona_extcon_info *info, + int reading) { struct arizona *arizona = info->arizona; const struct reg_default *patch; @@ -2582,7 +2582,7 @@ static int arizona_micd_manual_reading(struct arizona_extcon_info *info, int val return val; } -const struct arizona_jd_state arizona_micd_manual = { +static const struct arizona_jd_state arizona_micd_manual = { .mode = ARIZONA_ACCDET_MODE_ADC, .start = arizona_micd_mic_start, .reading = arizona_micd_manual_reading, From c2683a58ca2f1ed18c61f6cdb53c0f5afd15bc37 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 30 Jan 2015 10:30:06 +0000 Subject: [PATCH 0669/1167] ASoC: clearwater: Add some missing static declarations Change-Id: Ic66467b18c2b769e58bbb7081bc72dfb90bbb513 Signed-off-by: Charles Keepax --- sound/soc/codecs/clearwater.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 54ba91cd137..89f64c6b02b 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -284,7 +284,7 @@ static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); { name " ANC Source", "RXANCL", "RXANCL" }, \ { name " ANC Source", "RXANCR", "RXANCR" } -int clearwater_cp_mode_get(struct snd_kcontrol *kcontrol, +static int clearwater_cp_mode_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); @@ -301,7 +301,7 @@ int clearwater_cp_mode_get(struct snd_kcontrol *kcontrol, return 0; } -int clearwater_cp_mode_put(struct snd_kcontrol *kcontrol, +static int clearwater_cp_mode_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); @@ -328,11 +328,11 @@ int clearwater_cp_mode_put(struct snd_kcontrol *kcontrol, return 0; } -const char *clearwater_cp_mode_text[2] = { +static const char *clearwater_cp_mode_text[2] = { "Default", "Inverting", }; -const struct soc_enum clearwater_cp_mode[] = { +static const struct soc_enum clearwater_cp_mode[] = { SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(clearwater_cp_mode_text), clearwater_cp_mode_text), }; From 6244b592f37b5162aaca033fd8b1b5cc53690237 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 30 Jan 2015 10:38:05 +0000 Subject: [PATCH 0670/1167] ASoC: arizona: Correct sign of various arrays etc. The ASoC core expects unsigned values for mixer values. Corrects many of the following sparse warnings: sound/soc/codecs/florida.c:596:1: warning: incorrect type in initializer (different signedness) sound/soc/codecs/florida.c:596:1: expected unsigned int const *values sound/soc/codecs/florida.c:596:1: got int extern [toplevel] * Change-Id: I637128f230fb71b3dfa9903ae688a4346c0a9ed4 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 14 +++++++------- sound/soc/codecs/arizona.h | 8 ++++---- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index ab85b7717af..0dbfe08285d 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -511,7 +511,7 @@ const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = { }; EXPORT_SYMBOL_GPL(arizona_mixer_texts); -int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = { +unsigned int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = { 0x00, /* None */ 0x04, /* Tone */ 0x05, @@ -791,7 +791,7 @@ const char *arizona_v2_mixer_texts[ARIZONA_V2_NUM_MIXER_INPUTS] = { }; EXPORT_SYMBOL_GPL(arizona_v2_mixer_texts); -int arizona_v2_mixer_values[ARIZONA_V2_NUM_MIXER_INPUTS] = { +unsigned int arizona_v2_mixer_values[ARIZONA_V2_NUM_MIXER_INPUTS] = { 0x00, /* None */ 0x04, /* Tone */ 0x05, @@ -943,7 +943,7 @@ const char *arizona_sample_rate_text[ARIZONA_SAMPLE_RATE_ENUM_SIZE] = { }; EXPORT_SYMBOL_GPL(arizona_sample_rate_text); -const int arizona_sample_rate_val[ARIZONA_SAMPLE_RATE_ENUM_SIZE] = { +const unsigned int arizona_sample_rate_val[ARIZONA_SAMPLE_RATE_ENUM_SIZE] = { 0x01, 0x02, 0x03, 0x04, 0x05, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x10, 0x11, 0x12, 0x13, }; @@ -1009,7 +1009,7 @@ const struct soc_enum arizona_spdif_rate = arizona_rate_val); EXPORT_SYMBOL_GPL(arizona_spdif_rate); -const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE] = { +const unsigned int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE] = { 0x0, 0x1, 0x2, 0x8, 0x9, }; EXPORT_SYMBOL_GPL(arizona_rate_val); @@ -1200,7 +1200,7 @@ static const char * const clearwater_in_dmic_osr_text[CLEARWATER_OSR_ENUM_SIZE] "384kHz", "768kHz", "1.536MHz", "3.072MHz", "6.144MHz", }; -static const int clearwater_in_dmic_osr_val[CLEARWATER_OSR_ENUM_SIZE] = { +static const unsigned int clearwater_in_dmic_osr_val[CLEARWATER_OSR_ENUM_SIZE] = { 2, 3, 4, 5, 6, }; @@ -1232,7 +1232,7 @@ static const char *arizona_anc_input_src_text[ARIZONA_ANC_INPUT_ENUM_SIZE] = { "IN5R", "IN5L + IN5R", "IN6L", "IN6R", "IN6L + IN6R", }; -static const int arizona_anc_input_src_val[ARIZONA_ANC_INPUT_ENUM_SIZE] = { +static const unsigned int arizona_anc_input_src_val[ARIZONA_ANC_INPUT_ENUM_SIZE] = { 0x0000, 0x0101, 0x0201, 0x0301, 0x0102, 0x0202, 0x0302, 0x0103, 0x0203, 0x0303, 0x0104, 0x0204, 0x0304, 0x0105, 0x0205, 0x0305, 0x0106, 0x0206, 0x0306, @@ -2189,7 +2189,7 @@ int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id, unsigned int mask = ARIZONA_SYSCLK_FREQ_MASK | ARIZONA_SYSCLK_SRC_MASK; unsigned int val = source << ARIZONA_SYSCLK_SRC_SHIFT; int clk_freq; - unsigned int *clk; + int *clk; switch (arizona->type) { case WM8997: diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 08497d045ab..38161e1a9d1 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -100,9 +100,9 @@ struct arizona_priv { extern const unsigned int arizona_mixer_tlv[]; extern const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS]; -extern int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS]; +extern unsigned int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS]; extern const char *arizona_v2_mixer_texts[ARIZONA_V2_NUM_MIXER_INPUTS]; -extern int arizona_v2_mixer_values[ARIZONA_V2_NUM_MIXER_INPUTS]; +extern unsigned int arizona_v2_mixer_values[ARIZONA_V2_NUM_MIXER_INPUTS]; #define ARIZONA_GAINMUX_CONTROLS(name, base) \ SOC_SINGLE_RANGE_TLV(name " Input Volume", base + 1, \ @@ -252,9 +252,9 @@ extern int arizona_v2_mixer_values[ARIZONA_V2_NUM_MIXER_INPUTS]; #define CLEARWATER_ANC_INPUT_ENUM_SIZE 19 extern const char *arizona_rate_text[ARIZONA_RATE_ENUM_SIZE]; -extern const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE]; +extern const unsigned int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE]; extern const char *arizona_sample_rate_text[ARIZONA_SAMPLE_RATE_ENUM_SIZE]; -extern const int arizona_sample_rate_val[ARIZONA_SAMPLE_RATE_ENUM_SIZE]; +extern const unsigned int arizona_sample_rate_val[ARIZONA_SAMPLE_RATE_ENUM_SIZE]; extern const struct soc_enum arizona_sample_rate[]; extern const struct soc_enum arizona_isrc_fsl[]; From 5e9a412df76ef73b3998e73a38404318e5838632 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 30 Jan 2015 13:14:18 +0000 Subject: [PATCH 0671/1167] ASoC: arizona: Make some const correctness changes Change-Id: Ib707607670a5be99f779c226f0009aa689ecd666 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 22 +++++++++++----------- sound/soc/codecs/arizona.h | 8 ++++---- 2 files changed, 15 insertions(+), 15 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 0dbfe08285d..a76b26bf254 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -373,7 +373,7 @@ int arizona_init_gpio(struct snd_soc_codec *codec) } EXPORT_SYMBOL_GPL(arizona_init_gpio); -const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = { +const char * const arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = { "None", "Tone Generator 1", "Tone Generator 2", @@ -649,7 +649,7 @@ unsigned int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = { }; EXPORT_SYMBOL_GPL(arizona_mixer_values); -const char *arizona_v2_mixer_texts[ARIZONA_V2_NUM_MIXER_INPUTS] = { +const char * const arizona_v2_mixer_texts[ARIZONA_V2_NUM_MIXER_INPUTS] = { "None", "Tone Generator 1", "Tone Generator 2", @@ -936,7 +936,7 @@ EXPORT_SYMBOL_GPL(arizona_v2_mixer_values); const DECLARE_TLV_DB_SCALE(arizona_mixer_tlv, -3200, 100, 0); EXPORT_SYMBOL_GPL(arizona_mixer_tlv); -const char *arizona_sample_rate_text[ARIZONA_SAMPLE_RATE_ENUM_SIZE] = { +const char * const arizona_sample_rate_text[ARIZONA_SAMPLE_RATE_ENUM_SIZE] = { "12kHz", "24kHz", "48kHz", "96kHz", "192kHz", "11.025kHz", "22.05kHz", "44.1kHz", "88.2kHz", "176.4kHz", "4kHz", "8kHz", "16kHz", "32kHz", @@ -969,7 +969,7 @@ const struct soc_enum arizona_sample_rate[] = { }; EXPORT_SYMBOL_GPL(arizona_sample_rate); -const char *arizona_rate_text[ARIZONA_RATE_ENUM_SIZE] = { +const char * const arizona_rate_text[ARIZONA_RATE_ENUM_SIZE] = { "SYNCCLK rate 1", "SYNCCLK rate 2", "SYNCCLK rate 3", "ASYNCCLK rate", "ASYNCCLK rate 2", }; @@ -1099,7 +1099,7 @@ const struct soc_enum clearwater_asrc2_rate[] = { }; EXPORT_SYMBOL_GPL(clearwater_asrc2_rate); -static const char *arizona_vol_ramp_text[] = { +static const char * const arizona_vol_ramp_text[] = { "0ms/6dB", "0.5ms/6dB", "1ms/6dB", "2ms/6dB", "4ms/6dB", "8ms/6dB", "15ms/6dB", "30ms/6dB", }; @@ -1128,7 +1128,7 @@ const SOC_ENUM_SINGLE_DECL(arizona_out_vi_ramp, arizona_vol_ramp_text); EXPORT_SYMBOL_GPL(arizona_out_vi_ramp); -static const char *arizona_lhpf_mode_text[] = { +static const char * const arizona_lhpf_mode_text[] = { "Low-pass", "High-pass" }; @@ -1156,7 +1156,7 @@ const SOC_ENUM_SINGLE_DECL(arizona_lhpf4_mode, arizona_lhpf_mode_text); EXPORT_SYMBOL_GPL(arizona_lhpf4_mode); -static const char *arizona_ng_hold_text[] = { +static const char * const arizona_ng_hold_text[] = { "30ms", "120ms", "250ms", "500ms", }; @@ -1226,7 +1226,7 @@ const struct soc_enum clearwater_in_dmic_osr[] = { }; EXPORT_SYMBOL_GPL(clearwater_in_dmic_osr); -static const char *arizona_anc_input_src_text[ARIZONA_ANC_INPUT_ENUM_SIZE] = { +static const char * const arizona_anc_input_src_text[ARIZONA_ANC_INPUT_ENUM_SIZE] = { "None", "IN1L", "IN1R", "IN1L + IN1R", "IN2L", "IN2R", "IN2L + IN2R", "IN3L", "IN3R", "IN3L + IN3R", "IN4L", "IN4R", "IN4L + IN4R", "IN5L", "IN5R", "IN5L + IN5R", "IN6L", "IN6R", "IN6L + IN6R", @@ -1304,7 +1304,7 @@ const struct soc_enum clearwater_anc_input_src[] = { }; EXPORT_SYMBOL_GPL(clearwater_anc_input_src); -static const char *arizona_output_anc_src_text[] = { +static const char * const arizona_output_anc_src_text[] = { "None", "RXANCL", "RXANCR", }; @@ -1368,7 +1368,7 @@ const struct soc_enum clearwater_output_anc_src_defs[] = { }; EXPORT_SYMBOL_GPL(clearwater_output_anc_src_defs); -const char *arizona_ip_mode_text[2] = { +static const char * const arizona_ip_mode_text[2] = { "Analog", "Digital", }; @@ -2822,7 +2822,7 @@ static int arizona_hw_params(struct snd_pcm_substream *substream, return ret; } -static const char *arizona_dai_clk_str(int clk_id) +static const char * const arizona_dai_clk_str(int clk_id) { switch (clk_id) { case ARIZONA_CLK_SYSCLK: diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 38161e1a9d1..6917c1a5cec 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -99,9 +99,9 @@ struct arizona_priv { #define ARIZONA_V2_NUM_MIXER_INPUTS 138 extern const unsigned int arizona_mixer_tlv[]; -extern const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS]; +extern const char * const arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS]; extern unsigned int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS]; -extern const char *arizona_v2_mixer_texts[ARIZONA_V2_NUM_MIXER_INPUTS]; +extern const char * const arizona_v2_mixer_texts[ARIZONA_V2_NUM_MIXER_INPUTS]; extern unsigned int arizona_v2_mixer_values[ARIZONA_V2_NUM_MIXER_INPUTS]; #define ARIZONA_GAINMUX_CONTROLS(name, base) \ @@ -251,9 +251,9 @@ extern unsigned int arizona_v2_mixer_values[ARIZONA_V2_NUM_MIXER_INPUTS]; #define WM8280_ANC_INPUT_ENUM_SIZE 13 #define CLEARWATER_ANC_INPUT_ENUM_SIZE 19 -extern const char *arizona_rate_text[ARIZONA_RATE_ENUM_SIZE]; +extern const char * const arizona_rate_text[ARIZONA_RATE_ENUM_SIZE]; extern const unsigned int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE]; -extern const char *arizona_sample_rate_text[ARIZONA_SAMPLE_RATE_ENUM_SIZE]; +extern const char * const arizona_sample_rate_text[ARIZONA_SAMPLE_RATE_ENUM_SIZE]; extern const unsigned int arizona_sample_rate_val[ARIZONA_SAMPLE_RATE_ENUM_SIZE]; extern const struct soc_enum arizona_sample_rate[]; From ddb32911a353e33222a3ff3794a1706d97bcbabf Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 30 Jan 2015 13:15:50 +0000 Subject: [PATCH 0672/1167] ASoC: wm_adsp: Add some missing static declarations Change-Id: I7051d4b5dde11c7f6f4bb54b3b68e616dc54ffc9 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 5b14d0d8e38..4a321e82b0d 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -319,7 +319,7 @@ struct wm_adsp_host_buffer { #define ALG_XM_FIELD(field) \ (offsetof(struct wm_adsp_alg_xm_struct, field) / sizeof(__be32)) -struct wm_adsp_buffer_region_def ez2control_regions[] = { +static struct wm_adsp_buffer_region_def ez2control_regions[] = { { .mem_type = WMFW_ADSP2_XM, .base_offset = HOST_BUFFER_FIELD(X_buf_base), @@ -351,7 +351,7 @@ static struct wm_adsp_fw_caps ez2control_caps[] = { }, }; -struct wm_adsp_buffer_region_def trace_regions[] = { +static struct wm_adsp_buffer_region_def trace_regions[] = { { .mem_type = WMFW_ADSP2_XM, .base_offset = HOST_BUFFER_FIELD(X_buf_base), @@ -2229,7 +2229,7 @@ static void wm_adsp2_boot_work(struct work_struct *work) ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0); } -void wm_adsp2_set_dspclk(struct wm_adsp *dsp, unsigned int freq) +static void wm_adsp2_set_dspclk(struct wm_adsp *dsp, unsigned int freq) { int ret; int mask; From 2cb7295f6caa56ea658fe46426f327cfc245f071 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 30 Jan 2015 13:17:26 +0000 Subject: [PATCH 0673/1167] ASoC: wm_adsp: Correct sign of register value variable Change-Id: Ide4aeef5f0f3301efb67054a88fda262954f2cb7 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 4a321e82b0d..ba6ed9c4645 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2046,7 +2046,7 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, struct wm_adsp *dsp = &dsps[w->shift]; struct wm_coeff_ctl *ctl; int ret; - int val; + unsigned int val; dsp->card = codec->card; From 0110fc55db0c747887872d753e9f507075098843 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 20 Feb 2015 15:18:35 +0000 Subject: [PATCH 0674/1167] regulator: arizona-ldo1: Drop OF node reference on error path We were not calling of_node_put if the regulator failed to register this patch fixes this. Change-Id: I97671c18e3ac0041242e02eeaa34fc1acab483aa Signed-off-by: Charles Keepax --- drivers/regulator/arizona-ldo1.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/regulator/arizona-ldo1.c b/drivers/regulator/arizona-ldo1.c index eea6414b73b..74ed9ab023c 100644 --- a/drivers/regulator/arizona-ldo1.c +++ b/drivers/regulator/arizona-ldo1.c @@ -281,6 +281,9 @@ static int arizona_ldo1_probe(struct platform_device *pdev) arizona->external_dcvdd = true; ldo1->regulator = regulator_register(desc, &config); + + of_node_put(config.of_node); + if (IS_ERR(ldo1->regulator)) { ret = PTR_ERR(ldo1->regulator); dev_err(arizona->dev, "Failed to register LDO1 supply: %d\n", @@ -288,8 +291,6 @@ static int arizona_ldo1_probe(struct platform_device *pdev) return ret; } - of_node_put(config.of_node); - platform_set_drvdata(pdev, ldo1); return 0; From 84f4535633e1825f90e24d11dca895889ad011fd Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 20 Feb 2015 15:54:17 +0000 Subject: [PATCH 0675/1167] regulator: arizona-micsupp: Drop OF node reference on error path We were not calling of_node_put if the regulator failed to register this patch fixes this. Change-Id: Iaa49189f2404a719a23e8268977bd27ced2c37a4 Signed-off-by: Charles Keepax --- drivers/regulator/arizona-micsupp.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/regulator/arizona-micsupp.c b/drivers/regulator/arizona-micsupp.c index de7dbedf827..971338b1464 100644 --- a/drivers/regulator/arizona-micsupp.c +++ b/drivers/regulator/arizona-micsupp.c @@ -321,6 +321,9 @@ static int arizona_micsupp_probe(struct platform_device *pdev) ARIZONA_CPMIC_BYPASS, 0); micsupp->regulator = regulator_register(desc, &config); + + of_node_put(config.of_node); + if (IS_ERR(micsupp->regulator)) { ret = PTR_ERR(micsupp->regulator); dev_err(arizona->dev, "Failed to register mic supply: %d\n", @@ -328,8 +331,6 @@ static int arizona_micsupp_probe(struct platform_device *pdev) return ret; } - of_node_put(config.of_node); - platform_set_drvdata(pdev, micsupp); return 0; From baf67332f6b3c03f74aeff1caa02f8b8a47e2bc3 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 20 Feb 2015 16:57:31 +0000 Subject: [PATCH 0676/1167] ASoC: wm8998: Vegas has no noise generator remove it Change-Id: I0ab12b54c07a26dbcb06760db605fe17f5bbe65a Signed-off-by: Charles Keepax --- sound/soc/codecs/wm8998.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/sound/soc/codecs/wm8998.c b/sound/soc/codecs/wm8998.c index b6a250da1c7..f12ddb5ec63 100644 --- a/sound/soc/codecs/wm8998.c +++ b/sound/soc/codecs/wm8998.c @@ -108,7 +108,6 @@ static const struct snd_kcontrol_new wm8998_in2mux = static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); -static DECLARE_TLV_DB_SCALE(noise_tlv, 0, 600, 0); static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); #define WM8998_NG_SRC(name, base) \ @@ -235,9 +234,6 @@ SOC_VALUE_ENUM("ISRC2 FSH", arizona_isrc_fsh[1]), SOC_VALUE_ENUM("ASRC RATE 1", arizona_asrc_rate1), SOC_VALUE_ENUM("ASRC RATE 2", arizona_asrc_rate2), -SOC_SINGLE_TLV("Noise Generator Volume", ARIZONA_COMFORT_NOISE_GENERATOR, - ARIZONA_NOISE_GEN_GAIN_SHIFT, 0x16, 0, noise_tlv), - ARIZONA_MIXER_CONTROLS("HPOUTL", ARIZONA_OUT1LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("HPOUTR", ARIZONA_OUT1RMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("LINEOUTL", ARIZONA_OUT2LMIX_INPUT_1_SOURCE), @@ -469,7 +465,6 @@ SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDDL", 0, 0), SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDDR", 0, 0), SND_SOC_DAPM_SIGGEN("TONE"), -SND_SOC_DAPM_SIGGEN("NOISE"), SND_SOC_DAPM_SIGGEN("HAPTICS"), SND_SOC_DAPM_INPUT("IN1AL"), @@ -508,9 +503,6 @@ SND_SOC_DAPM_SUPPLY("MICBIAS2", ARIZONA_MIC_BIAS_CTRL_2, SND_SOC_DAPM_SUPPLY("MICBIAS3", ARIZONA_MIC_BIAS_CTRL_3, ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("Noise Generator", ARIZONA_COMFORT_NOISE_GENERATOR, - ARIZONA_NOISE_GEN_ENA_SHIFT, 0, NULL, 0), - SND_SOC_DAPM_PGA("Tone Generator 1", ARIZONA_TONE_GENERATOR_1, ARIZONA_TONE1_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_PGA("Tone Generator 2", ARIZONA_TONE_GENERATOR_1, @@ -799,7 +791,6 @@ SND_SOC_DAPM_OUTPUT("MICSUPP"), }; #define ARIZONA_MIXER_INPUT_ROUTES(name) \ - { name, "Noise Generator", "Noise Generator" }, \ { name, "Tone Generator 1", "Tone Generator 1" }, \ { name, "Tone Generator 2", "Tone Generator 2" }, \ { name, "Haptics", "HAPTICS" }, \ @@ -887,7 +878,6 @@ static const struct snd_soc_dapm_route wm8998_dapm_routes[] = { { "MICBIAS2", NULL, "MICVDD" }, { "MICBIAS3", NULL, "MICVDD" }, - { "Noise Generator", NULL, "NOISE" }, { "Tone Generator 1", NULL, "TONE" }, { "Tone Generator 2", NULL, "TONE" }, From 220b6c2db2a5020b03df2947f23295b8f4397214 Mon Sep 17 00:00:00 2001 From: Heather Lomond Date: Wed, 14 Jan 2015 10:20:46 +0000 Subject: [PATCH 0677/1167] mfd: vegas: rename wm8998 to vegas Change-Id: Ic98f2e9c22bddc34d216f0b9d3c105f48e6ebac6 Signed-off-by: Heather Lomond --- drivers/mfd/Kconfig | 6 +- drivers/mfd/Makefile | 4 +- drivers/mfd/arizona-core.c | 12 ++-- drivers/mfd/arizona-i2c.c | 4 +- drivers/mfd/arizona-irq.c | 6 +- drivers/mfd/arizona.h | 6 +- .../mfd/{wm8998-tables.c => vegas-tables.c} | 64 +++++++++---------- include/linux/mfd/arizona/core.h | 2 +- 8 files changed, 52 insertions(+), 52 deletions(-) rename drivers/mfd/{wm8998-tables.c => vegas-tables.c} (98%) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index c997837a0f7..28bd8067ad4 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1050,11 +1050,11 @@ config MFD_FLORIDA Support for Wolfson Microelectronics Florida class low power audio SoC such as the WM8280 -config MFD_WM8998 - bool "Support Wolfson Microelectronics WM8998" +config MFD_VEGAS + bool "Support Wolfson Microelectronics Vegas" depends on MFD_ARIZONA help - Support for Wolfson Microelectronics WM8998 low power audio SoC + Support for Wolfson Microelectronics Vegas low power audio SoC config MFD_WM8997 bool "Wolfson Microelectronics WM8997" diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 3c8f6592971..8da99a6a014 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -46,8 +46,8 @@ endif ifneq ($(CONFIG_MFD_WM8997),n) obj-$(CONFIG_MFD_ARIZONA) += wm8997-tables.o endif -ifneq ($(CONFIG_MFD_WM8998),n) -obj-$(CONFIG_MFD_ARIZONA) += wm8998-tables.o +ifneq ($(CONFIG_MFD_VEGAS),n) +obj-$(CONFIG_MFD_ARIZONA) += vegas-tables.o endif ifneq ($(CONFIG_MFD_CLEARWATER),n) obj-$(CONFIG_MFD_ARIZONA) += clearwater-tables.o diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 5ec5adfad76..348d455b93c 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1344,13 +1344,13 @@ static struct mfd_cell wm8997_devs[] = { { .name = "wm8997-codec" }, }; -static struct mfd_cell wm8998_devs[] = { +static struct mfd_cell vegas_devs[] = { { .name = "arizona-micsupp" }, { .name = "arizona-extcon" }, { .name = "arizona-gpio" }, { .name = "arizona-haptics" }, { .name = "arizona-pwm" }, - { .name = "wm8998-codec" }, + { .name = "vegas-codec" }, }; static struct mfd_cell clearwater_devs[] = { @@ -1783,7 +1783,7 @@ int arizona_dev_init(struct arizona *arizona) apply_patch = wm8997_patch; break; #endif -#ifdef CONFIG_MFD_WM8998 +#ifdef CONFIG_MFD_VEGAS case 0x6349: switch (arizona->type) { case WM8998: @@ -1800,7 +1800,7 @@ int arizona_dev_init(struct arizona *arizona) arizona->type = WM8998; } - apply_patch = wm8998_patch; + apply_patch = vegas_patch; revision_char = arizona->rev + 'A'; break; #endif @@ -2105,8 +2105,8 @@ int arizona_dev_init(struct arizona *arizona) break; case WM8998: case WM1814: - ret = mfd_add_devices(arizona->dev, -1, wm8998_devs, - ARRAY_SIZE(wm8998_devs), NULL, 0, NULL); + ret = mfd_add_devices(arizona->dev, -1, vegas_devs, + ARRAY_SIZE(vegas_devs), NULL, 0, NULL); break; case WM8285: case WM1840: diff --git a/drivers/mfd/arizona-i2c.c b/drivers/mfd/arizona-i2c.c index c5440d44514..0ac4cbda855 100644 --- a/drivers/mfd/arizona-i2c.c +++ b/drivers/mfd/arizona-i2c.c @@ -53,10 +53,10 @@ static int arizona_i2c_probe(struct i2c_client *i2c, regmap_config = &wm8997_i2c_regmap; break; #endif -#ifdef CONFIG_MFD_WM8998 +#ifdef CONFIG_MFD_VEGAS case WM8998: case WM1814: - regmap_config = &wm8998_i2c_regmap; + regmap_config = &vegas_i2c_regmap; break; #endif #ifdef CONFIG_MFD_CLEARWATER diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index d45bcfd359e..7d77ebd1b5a 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -255,11 +255,11 @@ int arizona_irq_init(struct arizona *arizona) ctrlif_error = false; break; #endif -#ifdef CONFIG_MFD_WM8998 +#ifdef CONFIG_MFD_VEGAS case WM8998: case WM1814: - aod = &wm8998_aod; - irq = &wm8998_irq; + aod = &vegas_aod; + irq = &vegas_irq; ctrlif_error = false; break; diff --git a/drivers/mfd/arizona.h b/drivers/mfd/arizona.h index ec54352c8ef..d3f9023545b 100644 --- a/drivers/mfd/arizona.h +++ b/drivers/mfd/arizona.h @@ -33,7 +33,7 @@ extern const struct regmap_config clearwater_32bit_i2c_regmap; extern const struct regmap_config wm8997_i2c_regmap; -extern const struct regmap_config wm8998_i2c_regmap; +extern const struct regmap_config vegas_i2c_regmap; extern const struct regmap_config cs47l24_spi_regmap; @@ -53,8 +53,8 @@ extern const struct regmap_irq_chip clearwater_irq; extern const struct regmap_irq_chip wm8997_aod; extern const struct regmap_irq_chip wm8997_irq; -extern struct regmap_irq_chip wm8998_aod; -extern struct regmap_irq_chip wm8998_irq; +extern struct regmap_irq_chip vegas_aod; +extern struct regmap_irq_chip vegas_irq; extern const struct regmap_irq_chip cs47l24_irq; diff --git a/drivers/mfd/wm8998-tables.c b/drivers/mfd/vegas-tables.c similarity index 98% rename from drivers/mfd/wm8998-tables.c rename to drivers/mfd/vegas-tables.c index c692df122a3..919e5054a3d 100644 --- a/drivers/mfd/wm8998-tables.c +++ b/drivers/mfd/vegas-tables.c @@ -1,7 +1,7 @@ /* - * wm8998-tables.c -- data tables for wm8998-class codecs + * vegas-tables.c -- data tables for vegas-class codecs * - * Copyright 2014 Wolfson Microelectronics plc + * Copyright 2014-2015 Cirrus Logic * * Author: Richard Fitzgerald * @@ -18,10 +18,10 @@ #include "arizona.h" -#define WM8998_NUM_AOD_ISR 2 -#define WM8998_NUM_ISR 5 +#define VEGAS_NUM_AOD_ISR 2 +#define VEGAS_NUM_ISR 5 -static const struct reg_default wm8998_rev_a_patch[] = { +static const struct reg_default vegas_rev_a_patch[] = { { 0x0212, 0x0000 }, { 0x0211, 0x0014 }, { 0x04E4, 0x0E0D }, @@ -42,15 +42,15 @@ static const struct reg_default wm8998_rev_a_patch[] = { }; /* We use a function so we can use ARRAY_SIZE() */ -int wm8998_patch(struct arizona *arizona) +int vegas_patch(struct arizona *arizona) { return regmap_register_patch(arizona->regmap, - wm8998_rev_a_patch, - ARRAY_SIZE(wm8998_rev_a_patch)); + vegas_rev_a_patch, + ARRAY_SIZE(vegas_rev_a_patch)); } -EXPORT_SYMBOL_GPL(wm8998_patch); +EXPORT_SYMBOL_GPL(vegas_patch); -static const struct regmap_irq wm8998_aod_irqs[ARIZONA_NUM_IRQ] = { +static const struct regmap_irq vegas_aod_irqs[ARIZONA_NUM_IRQ] = { [ARIZONA_IRQ_MICD_CLAMP_FALL] = { .mask = ARIZONA_MICD_CLAMP_FALL_EINT1 }, @@ -63,18 +63,18 @@ static const struct regmap_irq wm8998_aod_irqs[ARIZONA_NUM_IRQ] = { [ARIZONA_IRQ_JD_RISE] = { .mask = ARIZONA_JD1_RISE_EINT1 }, }; -struct regmap_irq_chip wm8998_aod = { - .name = "wm8998 AOD", +struct regmap_irq_chip vegas_aod = { + .name = "vegas AOD", .status_base = ARIZONA_AOD_IRQ1, .mask_base = ARIZONA_AOD_IRQ_MASK_IRQ1, .ack_base = ARIZONA_AOD_IRQ1, .num_regs = 1, - .irqs = wm8998_aod_irqs, - .num_irqs = ARRAY_SIZE(wm8998_aod_irqs), + .irqs = vegas_aod_irqs, + .num_irqs = ARRAY_SIZE(vegas_aod_irqs), }; -EXPORT_SYMBOL_GPL(wm8998_aod); +EXPORT_SYMBOL_GPL(vegas_aod); -static const struct regmap_irq wm8998_irqs[ARIZONA_NUM_IRQ] = { +static const struct regmap_irq vegas_irqs[ARIZONA_NUM_IRQ] = { [ARIZONA_IRQ_GP4] = { .reg_offset = 0, .mask = ARIZONA_GP4_EINT1 }, [ARIZONA_IRQ_GP3] = { .reg_offset = 0, .mask = ARIZONA_GP3_EINT1 }, [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 }, @@ -165,18 +165,18 @@ static const struct regmap_irq wm8998_irqs[ARIZONA_NUM_IRQ] = { }, }; -struct regmap_irq_chip wm8998_irq = { - .name = "wm8998 IRQ", +struct regmap_irq_chip vegas_irq = { + .name = "vegas IRQ", .status_base = ARIZONA_INTERRUPT_STATUS_1, .mask_base = ARIZONA_INTERRUPT_STATUS_1_MASK, .ack_base = ARIZONA_INTERRUPT_STATUS_1, .num_regs = 5, - .irqs = wm8998_irqs, - .num_irqs = ARRAY_SIZE(wm8998_irqs), + .irqs = vegas_irqs, + .num_irqs = ARRAY_SIZE(vegas_irqs), }; -EXPORT_SYMBOL_GPL(wm8998_irq); +EXPORT_SYMBOL_GPL(vegas_irq); -static const struct reg_default wm8998_reg_default[] = { +static const struct reg_default vegas_reg_default[] = { { 0x00000009, 0x0001 }, /* R9 - Ctrl IF I2C1 CFG 1 */ { 0x0000000B, 0x001A }, /* R11 - Ctrl IF I2C1 CFG 2 */ { 0x00000020, 0x0000 }, /* R32 - Tone Generator 1 */ @@ -826,7 +826,7 @@ static const struct reg_default wm8998_reg_default[] = { { 0x00001705, 0x0000 }, /* R5893 - DAC_COMP_2 */ }; -static bool wm8998_readable_register(struct device *dev, unsigned int reg) +static bool vegas_readable_register(struct device *dev, unsigned int reg) { switch (reg) { case ARIZONA_SOFTWARE_RESET: @@ -1519,7 +1519,7 @@ static bool wm8998_readable_register(struct device *dev, unsigned int reg) } } -static bool wm8998_volatile_register(struct device *dev, unsigned int reg) +static bool vegas_volatile_register(struct device *dev, unsigned int reg) { switch (reg) { case ARIZONA_SOFTWARE_RESET: @@ -1571,18 +1571,18 @@ static bool wm8998_volatile_register(struct device *dev, unsigned int reg) } } -#define WM8998_MAX_REGISTER 0x31ff +#define VEGAS_MAX_REGISTER 0x31ff -const struct regmap_config wm8998_i2c_regmap = { +const struct regmap_config vegas_i2c_regmap = { .reg_bits = 32, .val_bits = 16, - .max_register = WM8998_MAX_REGISTER, - .readable_reg = wm8998_readable_register, - .volatile_reg = wm8998_volatile_register, + .max_register = VEGAS_MAX_REGISTER, + .readable_reg = vegas_readable_register, + .volatile_reg = vegas_volatile_register, .cache_type = REGCACHE_RBTREE, - .reg_defaults = wm8998_reg_default, - .num_reg_defaults = ARRAY_SIZE(wm8998_reg_default), + .reg_defaults = vegas_reg_default, + .num_reg_defaults = ARRAY_SIZE(vegas_reg_default), }; -EXPORT_SYMBOL_GPL(wm8998_i2c_regmap); +EXPORT_SYMBOL_GPL(vegas_i2c_regmap); diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 94f1c192ab1..2bfb67a2a01 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -191,7 +191,7 @@ int arizona_set_irq_wake(struct arizona *arizona, int irq, int on); int wm5102_patch(struct arizona *arizona); int florida_patch(struct arizona *arizona); int wm8997_patch(struct arizona *arizona); -int wm8998_patch(struct arizona *arizona); +int vegas_patch(struct arizona *arizona); int clearwater_patch(struct arizona *arizona); int cs47l24_patch(struct arizona *arizona); From b5f90686989c0e254f324f8469b920aeb703f7aa Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 12 Feb 2015 15:04:44 +0000 Subject: [PATCH 0678/1167] ASoC: vegas: rename wm8998 to vegas Change-Id: Ia6e31f10b855610d80e5584bf3c67368cd11a1fd Signed-off-by: Heather Lomond Signed-off-by: Vitaly Rodionov Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/Kconfig | 8 +- sound/soc/codecs/Makefile | 4 +- sound/soc/codecs/{wm8998.c => vegas.c} | 276 ++++++++++++------------- sound/soc/codecs/{wm8998.h => vegas.h} | 16 +- 4 files changed, 152 insertions(+), 152 deletions(-) rename sound/soc/codecs/{wm8998.c => vegas.c} (87%) rename sound/soc/codecs/{wm8998.h => vegas.h} (53%) diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index b803745003f..35a20768be6 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -123,7 +123,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_WM8995 if SND_SOC_I2C_AND_SPI select SND_SOC_WM8996 if I2C select SND_SOC_WM8997 if MFD_WM8997 - select SND_SOC_WM8998 if MFD_WM8998 + select SND_SOC_VEGAS if MFD_VEGAS select SND_SOC_WM9081 if I2C select SND_SOC_WM9090 if I2C select SND_SOC_WM9705 if SND_SOC_AC97_BUS @@ -149,13 +149,13 @@ config SND_SOC_ARIZONA default y if SND_SOC_FLORIDA=y default y if SND_SOC_CLEARWATER=y default y if SND_SOC_WM8997=y - default y if SND_SOC_WM8998=y + default y if SND_SOC_VEGAS=y default y if SND_SOC_CS47L24=y default m if SND_SOC_WM5102=m default m if SND_SOC_FLORIDA=m default m if SND_SOC_CLEARWATER=m default m if SND_SOC_WM8997=m - default m if SND_SOC_WM8998=m + default m if SND_SOC_VEGAS=m default m if SND_SOC_CS47L24=m config SND_SOC_WM_HUBS @@ -519,7 +519,7 @@ config SND_SOC_WM8996 config SND_SOC_WM8997 tristate -config SND_SOC_WM8998 +config SND_SOC_VEGAS tristate config SND_SOC_WM9081 diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index f66afe2d5ac..d38ceeee02f 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -115,7 +115,7 @@ snd-soc-wm8993-objs := wm8993.o snd-soc-wm8994-objs := wm8994.o wm8958-dsp2.o snd-soc-wm8995-objs := wm8995.o snd-soc-wm8997-objs := wm8997.o -snd-soc-wm8998-objs := wm8998.o +snd-soc-vegas-objs := vegas.o snd-soc-wm9081-objs := wm9081.o snd-soc-wm9090-objs := wm9090.o snd-soc-wm9705-objs := wm9705.o @@ -242,7 +242,7 @@ obj-$(CONFIG_SND_SOC_WM8993) += snd-soc-wm8993.o obj-$(CONFIG_SND_SOC_WM8994) += snd-soc-wm8994.o obj-$(CONFIG_SND_SOC_WM8995) += snd-soc-wm8995.o obj-$(CONFIG_SND_SOC_WM8997) += snd-soc-wm8997.o -obj-$(CONFIG_SND_SOC_WM8998) += snd-soc-wm8998.o +obj-$(CONFIG_SND_SOC_VEGAS) += snd-soc-vegas.o obj-$(CONFIG_SND_SOC_WM9081) += snd-soc-wm9081.o obj-$(CONFIG_SND_SOC_WM9090) += snd-soc-wm9090.o obj-$(CONFIG_SND_SOC_WM9705) += snd-soc-wm9705.o diff --git a/sound/soc/codecs/wm8998.c b/sound/soc/codecs/vegas.c similarity index 87% rename from sound/soc/codecs/wm8998.c rename to sound/soc/codecs/vegas.c index f12ddb5ec63..b1948314b2c 100644 --- a/sound/soc/codecs/wm8998.c +++ b/sound/soc/codecs/vegas.c @@ -1,7 +1,7 @@ /* - * wm8998.c -- ALSA SoC Audio driver for WM8998 codecs + * vegas.c -- ALSA SoC Audio driver for Vegas codecs * - * Copyright 2014 Wolfson Microelectronics plc + * Copyright 2014-2015 Cirrus Logic * * Author: Richard Fitzgerald * @@ -30,22 +30,22 @@ #include #include "arizona.h" -#include "wm8998.h" +#include "vegas.h" -struct wm8998_priv { +struct vegas_priv { struct arizona_priv core; struct arizona_fll fll[2]; }; -static int wm8998_in1mux_ev(struct snd_soc_dapm_widget *w, +static int vegas_in1mux_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); -static int wm8998_in2mux_ev(struct snd_soc_dapm_widget *w, +static int vegas_in2mux_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); -static int wm8998_asrc_ev(struct snd_soc_dapm_widget *w, +static int vegas_asrc_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { @@ -77,40 +77,40 @@ static int wm8998_asrc_ev(struct snd_soc_dapm_widget *w, return 0; } -static const char * const wm8998_inmux_texts[] = { +static const char * const vegas_inmux_texts[] = { "A", "B", }; -static const SOC_ENUM_SINGLE_DECL(wm8998_in1muxl_enum, +static const SOC_ENUM_SINGLE_DECL(vegas_in1muxl_enum, ARIZONA_ADC_DIGITAL_VOLUME_1L, ARIZONA_IN1L_SRC_SHIFT, - wm8998_inmux_texts); + vegas_inmux_texts); -static const SOC_ENUM_SINGLE_DECL(wm8998_in1muxr_enum, +static const SOC_ENUM_SINGLE_DECL(vegas_in1muxr_enum, ARIZONA_ADC_DIGITAL_VOLUME_1R, ARIZONA_IN1R_SRC_SHIFT, - wm8998_inmux_texts); + vegas_inmux_texts); -static const SOC_ENUM_SINGLE_DECL(wm8998_in2mux_enum, +static const SOC_ENUM_SINGLE_DECL(vegas_in2mux_enum, ARIZONA_ADC_DIGITAL_VOLUME_2L, ARIZONA_IN2L_SRC_SHIFT, - wm8998_inmux_texts); + vegas_inmux_texts); -static const struct snd_kcontrol_new wm8998_in1mux[2] = { - SOC_DAPM_ENUM("IN1L Mux", wm8998_in1muxl_enum), - SOC_DAPM_ENUM("IN1R Mux", wm8998_in1muxr_enum), +static const struct snd_kcontrol_new vegas_in1mux[2] = { + SOC_DAPM_ENUM("IN1L Mux", vegas_in1muxl_enum), + SOC_DAPM_ENUM("IN1R Mux", vegas_in1muxr_enum), }; -static const struct snd_kcontrol_new wm8998_in2mux = - SOC_DAPM_ENUM("IN2 Mux", wm8998_in2mux_enum); +static const struct snd_kcontrol_new vegas_in2mux = + SOC_DAPM_ENUM("IN2 Mux", vegas_in2mux_enum); static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); -#define WM8998_NG_SRC(name, base) \ +#define VEGAS_NG_SRC(name, base) \ SOC_SINGLE(name " NG HPOUTL Switch", base, 0, 1, 0), \ SOC_SINGLE(name " NG HPOUTR Switch", base, 1, 1, 0), \ SOC_SINGLE(name " NG LINEOUTL Switch", base, 2, 1, 0), \ @@ -119,7 +119,7 @@ static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); SOC_SINGLE(name " NG SPKOUTL Switch", base, 6, 1, 0), \ SOC_SINGLE(name " NG SPKOUTR Switch", base, 7, 1, 0) -static const struct snd_kcontrol_new wm8998_snd_controls[] = { +static const struct snd_kcontrol_new vegas_snd_controls[] = { SOC_ENUM("IN1 OSR", arizona_in_dmic_osr[0]), SOC_ENUM("IN2 OSR", arizona_in_dmic_osr[1]), @@ -303,15 +303,15 @@ SOC_SINGLE_TLV("Noise Gate Threshold Volume", ARIZONA_NOISE_GATE_CONTROL, ARIZONA_NGATE_THR_SHIFT, 7, 1, ng_tlv), SOC_ENUM("Noise Gate Hold", arizona_ng_hold), -WM8998_NG_SRC("HPOUTL", ARIZONA_NOISE_GATE_SELECT_1L), -WM8998_NG_SRC("HPOUTR", ARIZONA_NOISE_GATE_SELECT_1R), -WM8998_NG_SRC("LINEOUTL", ARIZONA_NOISE_GATE_SELECT_2L), -WM8998_NG_SRC("LINEOUTR", ARIZONA_NOISE_GATE_SELECT_2R), -WM8998_NG_SRC("EPOUT", ARIZONA_NOISE_GATE_SELECT_3L), -WM8998_NG_SRC("SPKOUTL", ARIZONA_NOISE_GATE_SELECT_4L), -WM8998_NG_SRC("SPKOUTR", ARIZONA_NOISE_GATE_SELECT_4R), -WM8998_NG_SRC("SPKDATL", ARIZONA_NOISE_GATE_SELECT_5L), -WM8998_NG_SRC("SPKDATR", ARIZONA_NOISE_GATE_SELECT_5R), +VEGAS_NG_SRC("HPOUTL", ARIZONA_NOISE_GATE_SELECT_1L), +VEGAS_NG_SRC("HPOUTR", ARIZONA_NOISE_GATE_SELECT_1R), +VEGAS_NG_SRC("LINEOUTL", ARIZONA_NOISE_GATE_SELECT_2L), +VEGAS_NG_SRC("LINEOUTR", ARIZONA_NOISE_GATE_SELECT_2R), +VEGAS_NG_SRC("EPOUT", ARIZONA_NOISE_GATE_SELECT_3L), +VEGAS_NG_SRC("SPKOUTL", ARIZONA_NOISE_GATE_SELECT_4L), +VEGAS_NG_SRC("SPKOUTR", ARIZONA_NOISE_GATE_SELECT_4R), +VEGAS_NG_SRC("SPKDATL", ARIZONA_NOISE_GATE_SELECT_5L), +VEGAS_NG_SRC("SPKDATR", ARIZONA_NOISE_GATE_SELECT_5R), ARIZONA_MIXER_CONTROLS("AIF1TX1", ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("AIF1TX2", ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE), @@ -421,33 +421,33 @@ ARIZONA_MUX_ENUMS(ISRC2INT2, ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE); ARIZONA_MUX_ENUMS(ISRC2DEC1, ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE); ARIZONA_MUX_ENUMS(ISRC2DEC2, ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE); -static const char *wm8998_aec_loopback_texts[] = { +static const char *vegas_aec_loopback_texts[] = { "HPOUTL", "HPOUTR", "LINEOUTL", "LINEOUTR", "EPOUT", "SPKOUTL", "SPKOUTR", "SPKDATL", "SPKDATR", }; -static const unsigned int wm8998_aec_loopback_values[] = { +static const unsigned int vegas_aec_loopback_values[] = { 0, 1, 2, 3, 4, 6, 7, 8, 9, }; -static const SOC_VALUE_ENUM_SINGLE_DECL(wm8998_aec1_loopback, +static const SOC_VALUE_ENUM_SINGLE_DECL(vegas_aec1_loopback, ARIZONA_DAC_AEC_CONTROL_1, ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, - wm8998_aec_loopback_texts, - wm8998_aec_loopback_values); + vegas_aec_loopback_texts, + vegas_aec_loopback_values); -static const SOC_VALUE_ENUM_SINGLE_DECL(wm8998_aec2_loopback, +static const SOC_VALUE_ENUM_SINGLE_DECL(vegas_aec2_loopback, ARIZONA_DAC_AEC_CONTROL_2, ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, - wm8998_aec_loopback_texts, - wm8998_aec_loopback_values); + vegas_aec_loopback_texts, + vegas_aec_loopback_values); -static const struct snd_kcontrol_new wm8998_aec_loopback_mux[] = { - SOC_DAPM_VALUE_ENUM("AEC1 Loopback", wm8998_aec1_loopback), - SOC_DAPM_VALUE_ENUM("AEC2 Loopback", wm8998_aec2_loopback), +static const struct snd_kcontrol_new vegas_aec_loopback_mux[] = { + SOC_DAPM_VALUE_ENUM("AEC1 Loopback", vegas_aec1_loopback), + SOC_DAPM_VALUE_ENUM("AEC2 Loopback", vegas_aec2_loopback), }; -static const struct snd_soc_dapm_widget wm8998_dapm_widgets[] = { +static const struct snd_soc_dapm_widget vegas_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("ASYNCCLK", ARIZONA_ASYNC_CLOCK_1, @@ -474,12 +474,12 @@ SND_SOC_DAPM_INPUT("IN1BR"), SND_SOC_DAPM_INPUT("IN2A"), SND_SOC_DAPM_INPUT("IN2B"), -SND_SOC_DAPM_MUX_E("IN1L Mux", SND_SOC_NOPM, 0, 0, &wm8998_in1mux[0], - wm8998_in1mux_ev, SND_SOC_DAPM_PRE_PMU), -SND_SOC_DAPM_MUX_E("IN1R Mux", SND_SOC_NOPM, 0, 0, &wm8998_in1mux[1], - wm8998_in1mux_ev, SND_SOC_DAPM_PRE_PMU), -SND_SOC_DAPM_MUX_E("IN2 Mux", SND_SOC_NOPM, 0, 0, &wm8998_in2mux, - wm8998_in2mux_ev, SND_SOC_DAPM_PRE_PMU), +SND_SOC_DAPM_MUX_E("IN1L Mux", SND_SOC_NOPM, 0, 0, &vegas_in1mux[0], + vegas_in1mux_ev, SND_SOC_DAPM_PRE_PMU), +SND_SOC_DAPM_MUX_E("IN1R Mux", SND_SOC_NOPM, 0, 0, &vegas_in1mux[1], + vegas_in1mux_ev, SND_SOC_DAPM_PRE_PMU), +SND_SOC_DAPM_MUX_E("IN2 Mux", SND_SOC_NOPM, 0, 0, &vegas_in2mux, + vegas_in2mux_ev, SND_SOC_DAPM_PRE_PMU), SND_SOC_DAPM_OUTPUT("DRC1 Signal Activity"), @@ -533,13 +533,13 @@ SND_SOC_DAPM_PGA("PWM2 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM2_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_PGA_E("ASRC1L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC1L_ENA_SHIFT, 0, - NULL, 0, wm8998_asrc_ev, SND_SOC_DAPM_PRE_PMU), + NULL, 0, vegas_asrc_ev, SND_SOC_DAPM_PRE_PMU), SND_SOC_DAPM_PGA_E("ASRC1R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC1R_ENA_SHIFT, 0, - NULL, 0, wm8998_asrc_ev, SND_SOC_DAPM_PRE_PMU), + NULL, 0, vegas_asrc_ev, SND_SOC_DAPM_PRE_PMU), SND_SOC_DAPM_PGA_E("ASRC2L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2L_ENA_SHIFT, 0, - NULL, 0, wm8998_asrc_ev, SND_SOC_DAPM_PRE_PMU), + NULL, 0, vegas_asrc_ev, SND_SOC_DAPM_PRE_PMU), SND_SOC_DAPM_PGA_E("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0, - NULL, 0, wm8998_asrc_ev, SND_SOC_DAPM_PRE_PMU), + NULL, 0, vegas_asrc_ev, SND_SOC_DAPM_PRE_PMU), SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), @@ -571,11 +571,11 @@ SND_SOC_DAPM_PGA("ISRC2DEC2", ARIZONA_ISRC_2_CTRL_3, SND_SOC_DAPM_VALUE_MUX("AEC1 Loopback", ARIZONA_DAC_AEC_CONTROL_1, ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, - &wm8998_aec_loopback_mux[0]), + &vegas_aec_loopback_mux[0]), SND_SOC_DAPM_VALUE_MUX("AEC2 Loopback", ARIZONA_DAC_AEC_CONTROL_2, ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, - &wm8998_aec_loopback_mux[1]), + &vegas_aec_loopback_mux[1]), SND_SOC_DAPM_AIF_OUT("AIF1TX1", NULL, 0, ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX1_ENA_SHIFT, 0), @@ -844,7 +844,7 @@ SND_SOC_DAPM_OUTPUT("MICSUPP"), { name, "ISRC2INT1", "ISRC2INT1" }, \ { name, "ISRC2INT2", "ISRC2INT2" } -static const struct snd_soc_dapm_route wm8998_dapm_routes[] = { +static const struct snd_soc_dapm_route vegas_dapm_routes[] = { { "AIF2 Capture", NULL, "DBVDD2" }, { "AIF2 Playback", NULL, "DBVDD2" }, @@ -1069,116 +1069,116 @@ static const struct snd_soc_dapm_route wm8998_dapm_routes[] = { { "DRC1 Signal Activity", NULL, "DRC1R" }, }; -#define WM8998_RATES SNDRV_PCM_RATE_8000_192000 +#define VEGAS_RATES SNDRV_PCM_RATE_8000_192000 -#define WM8998_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ +#define VEGAS_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) -static struct snd_soc_dai_driver wm8998_dai[] = { +static struct snd_soc_dai_driver vegas_dai[] = { { - .name = "wm8998-aif1", + .name = "vegas-aif1", .id = 1, .base = ARIZONA_AIF1_BCLK_CTRL, .playback = { .stream_name = "AIF1 Playback", .channels_min = 1, .channels_max = 6, - .rates = WM8998_RATES, - .formats = WM8998_FORMATS, + .rates = VEGAS_RATES, + .formats = VEGAS_FORMATS, }, .capture = { .stream_name = "AIF1 Capture", .channels_min = 1, .channels_max = 6, - .rates = WM8998_RATES, - .formats = WM8998_FORMATS, + .rates = VEGAS_RATES, + .formats = VEGAS_FORMATS, }, .ops = &arizona_dai_ops, .symmetric_rates = 1, }, { - .name = "wm8998-aif2", + .name = "vegas-aif2", .id = 2, .base = ARIZONA_AIF2_BCLK_CTRL, .playback = { .stream_name = "AIF2 Playback", .channels_min = 1, .channels_max = 6, - .rates = WM8998_RATES, - .formats = WM8998_FORMATS, + .rates = VEGAS_RATES, + .formats = VEGAS_FORMATS, }, .capture = { .stream_name = "AIF2 Capture", .channels_min = 1, .channels_max = 6, - .rates = WM8998_RATES, - .formats = WM8998_FORMATS, + .rates = VEGAS_RATES, + .formats = VEGAS_FORMATS, }, .ops = &arizona_dai_ops, .symmetric_rates = 1, }, { - .name = "wm8998-aif3", + .name = "vegas-aif3", .id = 3, .base = ARIZONA_AIF3_BCLK_CTRL, .playback = { .stream_name = "AIF3 Playback", .channels_min = 1, .channels_max = 2, - .rates = WM8998_RATES, - .formats = WM8998_FORMATS, + .rates = VEGAS_RATES, + .formats = VEGAS_FORMATS, }, .capture = { .stream_name = "AIF3 Capture", .channels_min = 1, .channels_max = 2, - .rates = WM8998_RATES, - .formats = WM8998_FORMATS, + .rates = VEGAS_RATES, + .formats = VEGAS_FORMATS, }, .ops = &arizona_dai_ops, .symmetric_rates = 1, }, { - .name = "wm8998-slim1", + .name = "vegas-slim1", .id = 4, .playback = { .stream_name = "Slim1 Playback", .channels_min = 1, .channels_max = 2, - .rates = WM8998_RATES, - .formats = WM8998_FORMATS, + .rates = VEGAS_RATES, + .formats = VEGAS_FORMATS, }, .capture = { .stream_name = "Slim1 Capture", .channels_min = 1, .channels_max = 4, - .rates = WM8998_RATES, - .formats = WM8998_FORMATS, + .rates = VEGAS_RATES, + .formats = VEGAS_FORMATS, }, .ops = &arizona_simple_dai_ops, }, { - .name = "wm8998-slim2", + .name = "vegas-slim2", .id = 5, .playback = { .stream_name = "Slim2 Playback", .channels_min = 1, .channels_max = 2, - .rates = WM8998_RATES, - .formats = WM8998_FORMATS, + .rates = VEGAS_RATES, + .formats = VEGAS_FORMATS, }, .capture = { .stream_name = "Slim2 Capture", .channels_min = 1, .channels_max = 2, - .rates = WM8998_RATES, - .formats = WM8998_FORMATS, + .rates = VEGAS_RATES, + .formats = VEGAS_FORMATS, }, .ops = &arizona_simple_dai_ops, }, }; -static int wm8998_in1mux_ev(struct snd_soc_dapm_widget *w, +static int vegas_in1mux_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { @@ -1228,7 +1228,7 @@ static int wm8998_in1mux_ev(struct snd_soc_dapm_widget *w, } } -static int wm8998_in2mux_ev(struct snd_soc_dapm_widget *w, +static int vegas_in2mux_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { @@ -1260,30 +1260,30 @@ static int wm8998_in2mux_ev(struct snd_soc_dapm_widget *w, } } -static int wm8998_set_fll(struct snd_soc_codec *codec, int fll_id, int source, +static int vegas_set_fll(struct snd_soc_codec *codec, int fll_id, int source, unsigned int Fref, unsigned int Fout) { - struct wm8998_priv *wm8998 = snd_soc_codec_get_drvdata(codec); + struct vegas_priv *vegas = snd_soc_codec_get_drvdata(codec); switch (fll_id) { - case WM8998_FLL1: - return arizona_set_fll(&wm8998->fll[0], source, Fref, Fout); - case WM8998_FLL2: - return arizona_set_fll(&wm8998->fll[1], source, Fref, Fout); - case WM8998_FLL1_REFCLK: - return arizona_set_fll_refclk(&wm8998->fll[0], source, Fref, + case VEGAS_FLL1: + return arizona_set_fll(&vegas->fll[0], source, Fref, Fout); + case VEGAS_FLL2: + return arizona_set_fll(&vegas->fll[1], source, Fref, Fout); + case VEGAS_FLL1_REFCLK: + return arizona_set_fll_refclk(&vegas->fll[0], source, Fref, Fout); - case WM8998_FLL2_REFCLK: - return arizona_set_fll_refclk(&wm8998->fll[1], source, Fref, + case VEGAS_FLL2_REFCLK: + return arizona_set_fll_refclk(&vegas->fll[1], source, Fref, Fout); default: return -EINVAL; } } -static int wm8998_codec_probe(struct snd_soc_codec *codec) +static int vegas_codec_probe(struct snd_soc_codec *codec) { - struct wm8998_priv *priv = snd_soc_codec_get_drvdata(codec); + struct vegas_priv *priv = snd_soc_codec_get_drvdata(codec); int ret; codec->control_data = priv->core.arizona->regmap; @@ -1315,18 +1315,18 @@ static int wm8998_codec_probe(struct snd_soc_codec *codec) return 0; } -static int wm8998_codec_remove(struct snd_soc_codec *codec) +static int vegas_codec_remove(struct snd_soc_codec *codec) { - struct wm8998_priv *priv = snd_soc_codec_get_drvdata(codec); + struct vegas_priv *priv = snd_soc_codec_get_drvdata(codec); priv->core.arizona->dapm = NULL; return 0; } -#define WM8998_DIG_VU 0x0200 +#define VEGAS_DIG_VU 0x0200 -static unsigned int wm8998_digital_vu[] = { +static unsigned int vegas_digital_vu[] = { ARIZONA_DAC_DIGITAL_VOLUME_1L, ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_DAC_DIGITAL_VOLUME_2L, @@ -1338,68 +1338,68 @@ static unsigned int wm8998_digital_vu[] = { ARIZONA_DAC_DIGITAL_VOLUME_5R, }; -static struct snd_soc_codec_driver soc_codec_dev_wm8998 = { - .probe = wm8998_codec_probe, - .remove = wm8998_codec_remove, +static struct snd_soc_codec_driver soc_codec_dev_vegas = { + .probe = vegas_codec_probe, + .remove = vegas_codec_remove, .idle_bias_off = true, .set_sysclk = arizona_set_sysclk, - .set_pll = wm8998_set_fll, - - .controls = wm8998_snd_controls, - .num_controls = ARRAY_SIZE(wm8998_snd_controls), - .dapm_widgets = wm8998_dapm_widgets, - .num_dapm_widgets = ARRAY_SIZE(wm8998_dapm_widgets), - .dapm_routes = wm8998_dapm_routes, - .num_dapm_routes = ARRAY_SIZE(wm8998_dapm_routes), + .set_pll = vegas_set_fll, + + .controls = vegas_snd_controls, + .num_controls = ARRAY_SIZE(vegas_snd_controls), + .dapm_widgets = vegas_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(vegas_dapm_widgets), + .dapm_routes = vegas_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(vegas_dapm_routes), }; -static int wm8998_probe(struct platform_device *pdev) +static int vegas_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); - struct wm8998_priv *wm8998; + struct vegas_priv *vegas; int i; - wm8998 = devm_kzalloc(&pdev->dev, sizeof(struct wm8998_priv), + vegas = devm_kzalloc(&pdev->dev, sizeof(struct vegas_priv), GFP_KERNEL); - if (!wm8998) + if (!vegas) return -ENOMEM; - platform_set_drvdata(pdev, wm8998); + platform_set_drvdata(pdev, vegas); /* Set of_node to parent from the SPI device to allow DAPM to * locate regulator supplies */ pdev->dev.of_node = arizona->dev->of_node; - wm8998->core.arizona = arizona; - wm8998->core.num_inputs = 3; /* IN1L, IN1R, IN2 */ + vegas->core.arizona = arizona; + vegas->core.num_inputs = 3; /* IN1L, IN1R, IN2 */ - for (i = 0; i < ARRAY_SIZE(wm8998->fll); i++) - wm8998->fll[i].vco_mult = 1; + for (i = 0; i < ARRAY_SIZE(vegas->fll); i++) + vegas->fll[i].vco_mult = 1; arizona_init_fll(arizona, 1, ARIZONA_FLL1_CONTROL_1 - 1, ARIZONA_IRQ_FLL1_LOCK, ARIZONA_IRQ_FLL1_CLOCK_OK, - &wm8998->fll[0]); + &vegas->fll[0]); arizona_init_fll(arizona, 2, ARIZONA_FLL2_CONTROL_1 - 1, ARIZONA_IRQ_FLL2_LOCK, ARIZONA_IRQ_FLL2_CLOCK_OK, - &wm8998->fll[1]); + &vegas->fll[1]); - for (i = 0; i < ARRAY_SIZE(wm8998_dai); i++) - arizona_init_dai(&wm8998->core, i); + for (i = 0; i < ARRAY_SIZE(vegas_dai); i++) + arizona_init_dai(&vegas->core, i); /* Latch volume update bits */ - for (i = 0; i < ARRAY_SIZE(wm8998_digital_vu); i++) - regmap_update_bits(arizona->regmap, wm8998_digital_vu[i], - WM8998_DIG_VU, WM8998_DIG_VU); + for (i = 0; i < ARRAY_SIZE(vegas_digital_vu); i++) + regmap_update_bits(arizona->regmap, vegas_digital_vu[i], + VEGAS_DIG_VU, VEGAS_DIG_VU); pm_runtime_enable(&pdev->dev); pm_runtime_idle(&pdev->dev); - return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_wm8998, - wm8998_dai, ARRAY_SIZE(wm8998_dai)); + return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_vegas, + vegas_dai, ARRAY_SIZE(vegas_dai)); } -static int wm8998_remove(struct platform_device *pdev) +static int vegas_remove(struct platform_device *pdev) { snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); @@ -1407,18 +1407,18 @@ static int wm8998_remove(struct platform_device *pdev) return 0; } -static struct platform_driver wm8998_codec_driver = { +static struct platform_driver vegas_codec_driver = { .driver = { - .name = "wm8998-codec", + .name = "vegas-codec", .owner = THIS_MODULE, }, - .probe = wm8998_probe, - .remove = wm8998_remove, + .probe = vegas_probe, + .remove = vegas_remove, }; -module_platform_driver(wm8998_codec_driver); +module_platform_driver(vegas_codec_driver); -MODULE_DESCRIPTION("ASoC WM8998 driver"); +MODULE_DESCRIPTION("ASoC Vegas driver"); MODULE_AUTHOR("Richard Fitzgerald "); MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:wm8998-codec"); +MODULE_ALIAS("platform:vegas-codec"); diff --git a/sound/soc/codecs/wm8998.h b/sound/soc/codecs/vegas.h similarity index 53% rename from sound/soc/codecs/wm8998.h rename to sound/soc/codecs/vegas.h index 83bc745f159..38b41e8e5ec 100644 --- a/sound/soc/codecs/wm8998.h +++ b/sound/soc/codecs/vegas.h @@ -1,7 +1,7 @@ /* - * wm8998.h -- ALSA SoC Audio driver for WM8998 codecs + * vegas.h -- ALSA SoC Audio driver for Vegas codecs * - * Copyright 2012-2014 Wolfson Microelectronics plc + * Copyright 2014-2015 Cirrus Logic * * Author: Richard Fitzgerald * @@ -10,14 +10,14 @@ * published by the Free Software Foundation. */ -#ifndef _WM8998_H -#define _WM8998_H +#ifndef _VEGAS_H +#define _VEGAS_H #include "arizona.h" -#define WM8998_FLL1 1 -#define WM8998_FLL2 2 -#define WM8998_FLL1_REFCLK 3 -#define WM8998_FLL2_REFCLK 4 +#define VEGAS_FLL1 1 +#define VEGAS_FLL2 2 +#define VEGAS_FLL1_REFCLK 3 +#define VEGAS_FLL2_REFCLK 4 #endif From 83d86fdbee5bcdc41e9c0e348ee44ba5e821ad94 Mon Sep 17 00:00:00 2001 From: Heather Lomond Date: Thu, 15 Jan 2015 15:46:38 +0000 Subject: [PATCH 0679/1167] mfd: largo: rename cs47l24 to largo Change-Id: Ia6883d19831aead919a27a23d96698c8c30d0d8c Signed-off-by: Heather Lomond Signed-off-by: Vitaly Rodionov --- drivers/mfd/Kconfig | 6 +-- drivers/mfd/Makefile | 4 +- drivers/mfd/arizona-core.c | 16 +++--- drivers/mfd/arizona-irq.c | 4 +- drivers/mfd/arizona-spi.c | 4 +- drivers/mfd/arizona.h | 4 +- .../mfd/{cs47l24-tables.c => largo-tables.c} | 54 +++++++++---------- include/linux/mfd/arizona/core.h | 2 +- 8 files changed, 47 insertions(+), 47 deletions(-) rename drivers/mfd/{cs47l24-tables.c => largo-tables.c} (98%) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 28bd8067ad4..9a9a976b3dc 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1069,11 +1069,11 @@ config MFD_CLEARWATER Support for Wolfson Microelectronics ClearWater class low power audio SoC such as the WM8285 -config MFD_CS47L24 - bool "Cirrus Logic CS47L24" +config MFD_LARGO + bool "Cirrus Logic Largo" depends on MFD_ARIZONA help - Support for Cirrus Logic CS47L24 low power audio SoC + Support for Cirrus Logic Largo low power audio SoC config MFD_WM8400 bool "Wolfson Microelectronics WM8400" diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 8da99a6a014..c1435186b6f 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -52,8 +52,8 @@ endif ifneq ($(CONFIG_MFD_CLEARWATER),n) obj-$(CONFIG_MFD_ARIZONA) += clearwater-tables.o endif -ifneq ($(CONFIG_MFD_CS47L24),n) -obj-$(CONFIG_MFD_ARIZONA) += cs47l24-tables.o +ifneq ($(CONFIG_MFD_LARGO),n) +obj-$(CONFIG_MFD_ARIZONA) += largo-tables.o endif obj-$(CONFIG_MFD_WM8400) += wm8400-core.o wm831x-objs := wm831x-core.o wm831x-irq.o wm831x-otp.o diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 348d455b93c..b7d24f9ab13 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1328,11 +1328,11 @@ static struct mfd_cell florida_devs[] = { { .name = "florida-codec" }, }; -static struct mfd_cell cs47l24_devs[] = { +static struct mfd_cell largo_devs[] = { { .name = "arizona-gpio" }, { .name = "arizona-haptics" }, { .name = "arizona-pwm" }, - { .name = "cs47l24-codec" }, + { .name = "largo-codec" }, }; static struct mfd_cell wm8997_devs[] = { @@ -1747,7 +1747,7 @@ int arizona_dev_init(struct arizona *arizona) apply_patch = florida_patch; break; #endif -#ifdef CONFIG_MFD_CS47L24 +#ifdef CONFIG_MFD_LARGO case 0x6363: switch (arizona->type) { case CS47L24: @@ -1761,14 +1761,14 @@ int arizona_dev_init(struct arizona *arizona) break; default: - dev_err(arizona->dev, "CS47L24 codec registered as %d\n", + dev_err(arizona->dev, "Largo codec registered as %d\n", arizona->type); arizona->type = CS47L24; - type_name = "CS47L24"; + type_name = "Largo"; revision_char = arizona->rev + 'A'; break; } - apply_patch = cs47l24_patch; + apply_patch = largo_patch; break; #endif #ifdef CONFIG_MFD_WM8997 @@ -2096,8 +2096,8 @@ int arizona_dev_init(struct arizona *arizona) break; case WM1831: case CS47L24: - ret = mfd_add_devices(arizona->dev, -1, cs47l24_devs, - ARRAY_SIZE(cs47l24_devs), NULL, 0, NULL); + ret = mfd_add_devices(arizona->dev, -1, largo_devs, + ARRAY_SIZE(largo_devs), NULL, 0, NULL); break; case WM8997: ret = mfd_add_devices(arizona->dev, -1, wm8997_devs, diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index 7d77ebd1b5a..efc55e500d4 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -238,11 +238,11 @@ int arizona_irq_init(struct arizona *arizona) irq_ctrl_reg = CLEARWATER_IRQ1_CTRL; break; #endif -#ifdef CONFIG_MFD_CS47L24 +#ifdef CONFIG_MFD_LARGO case WM1831: case CS47L24: aod = NULL; - irq = &cs47l24_irq; + irq = &largo_irq; ctrlif_error = false; break; diff --git a/drivers/mfd/arizona-spi.c b/drivers/mfd/arizona-spi.c index 1dddc6c456a..524a1582e7c 100644 --- a/drivers/mfd/arizona-spi.c +++ b/drivers/mfd/arizona-spi.c @@ -56,10 +56,10 @@ static int arizona_spi_probe(struct spi_device *spi) regmap_32bit_config = &clearwater_32bit_spi_regmap; break; #endif -#ifdef CONFIG_MFD_CS47L24 +#ifdef CONFIG_MFD_LARGO case WM1831: case CS47L24: - regmap_config = &cs47l24_spi_regmap; + regmap_config = &largo_spi_regmap; break; #endif default: diff --git a/drivers/mfd/arizona.h b/drivers/mfd/arizona.h index d3f9023545b..cae07559b2d 100644 --- a/drivers/mfd/arizona.h +++ b/drivers/mfd/arizona.h @@ -35,7 +35,7 @@ extern const struct regmap_config wm8997_i2c_regmap; extern const struct regmap_config vegas_i2c_regmap; -extern const struct regmap_config cs47l24_spi_regmap; +extern const struct regmap_config largo_spi_regmap; extern const struct dev_pm_ops arizona_pm_ops; @@ -56,7 +56,7 @@ extern const struct regmap_irq_chip wm8997_irq; extern struct regmap_irq_chip vegas_aod; extern struct regmap_irq_chip vegas_irq; -extern const struct regmap_irq_chip cs47l24_irq; +extern const struct regmap_irq_chip largo_irq; int arizona_dev_init(struct arizona *arizona); int arizona_dev_exit(struct arizona *arizona); diff --git a/drivers/mfd/cs47l24-tables.c b/drivers/mfd/largo-tables.c similarity index 98% rename from drivers/mfd/cs47l24-tables.c rename to drivers/mfd/largo-tables.c index 02252d637d4..51c0867589d 100644 --- a/drivers/mfd/cs47l24-tables.c +++ b/drivers/mfd/largo-tables.c @@ -1,5 +1,5 @@ /* - * cs47l24-tables.c -- data tables for CS47L24 codec + * largo-tables.c -- data tables for Largo codec * * Copyright 2014 CirrusLogic, Inc. * @@ -18,9 +18,9 @@ #include "arizona.h" -#define CS47L24_NUM_ISR 5 +#define LARGO_NUM_ISR 5 -static const struct reg_default cs47l24_reva_patch[] = { +static const struct reg_default largo_reva_patch[] = { { 0x80, 0x3 }, { 0x27C, 0x0010 }, { 0x221, 0x0070 }, @@ -28,15 +28,15 @@ static const struct reg_default cs47l24_reva_patch[] = { }; /* We use a function so we can use ARRAY_SIZE() */ -int cs47l24_patch(struct arizona *arizona) +int largo_patch(struct arizona *arizona) { return regmap_register_patch(arizona->regmap, - cs47l24_reva_patch, - ARRAY_SIZE(cs47l24_reva_patch)); + largo_reva_patch, + ARRAY_SIZE(largo_reva_patch)); } -EXPORT_SYMBOL_GPL(cs47l24_patch); +EXPORT_SYMBOL_GPL(largo_patch); -static const struct regmap_irq cs47l24_irqs[ARIZONA_NUM_IRQ] = { +static const struct regmap_irq largo_irqs[ARIZONA_NUM_IRQ] = { [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 }, [ARIZONA_IRQ_GP1] = { .reg_offset = 0, .mask = ARIZONA_GP1_EINT1 }, @@ -178,18 +178,18 @@ static const struct regmap_irq cs47l24_irqs[ARIZONA_NUM_IRQ] = { }, }; -const struct regmap_irq_chip cs47l24_irq = { - .name = "cs47l24 IRQ", +const struct regmap_irq_chip largo_irq = { + .name = "largo IRQ", .status_base = ARIZONA_INTERRUPT_STATUS_1, .mask_base = ARIZONA_INTERRUPT_STATUS_1_MASK, .ack_base = ARIZONA_INTERRUPT_STATUS_1, .num_regs = 6, - .irqs = cs47l24_irqs, - .num_irqs = ARRAY_SIZE(cs47l24_irqs), + .irqs = largo_irqs, + .num_irqs = ARRAY_SIZE(largo_irqs), }; -EXPORT_SYMBOL_GPL(cs47l24_irq); +EXPORT_SYMBOL_GPL(largo_irq); -static const struct reg_default cs47l24_reg_default[] = { +static const struct reg_default largo_reg_default[] = { { 0x00000008, 0x0019 }, /* R8 - Ctrl IF SPI CFG 1 */ { 0x00000020, 0x0000 }, /* R32 - Tone Generator 1 */ { 0x00000021, 0x1000 }, /* R33 - Tone Generator 2 */ @@ -790,7 +790,7 @@ static const struct reg_default cs47l24_reg_default[] = { { 0x00001300, 0x0010 }, /* R4864 - DSP3 Control 1 */ }; -static bool cs47l24_is_adsp_memory(struct device *dev, unsigned int reg) +static bool largo_is_adsp_memory(struct device *dev, unsigned int reg) { if ((reg >= 0x200000 && reg < 0x206000) || (reg >= 0x280000 && reg < 0x282000) || @@ -805,7 +805,7 @@ static bool cs47l24_is_adsp_memory(struct device *dev, unsigned int reg) return false; } -static bool cs47l24_readable_register(struct device *dev, unsigned int reg) +static bool largo_readable_register(struct device *dev, unsigned int reg) { switch (reg) { case ARIZONA_SOFTWARE_RESET: @@ -1512,11 +1512,11 @@ static bool cs47l24_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DSP3_SCRATCH_3: return true; default: - return cs47l24_is_adsp_memory(dev, reg); + return largo_is_adsp_memory(dev, reg); } } -static bool cs47l24_volatile_register(struct device *dev, unsigned int reg) +static bool largo_volatile_register(struct device *dev, unsigned int reg) { switch (reg) { case ARIZONA_SOFTWARE_RESET: @@ -1624,24 +1624,24 @@ static bool cs47l24_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_DSP3_CLOCKING_1: return true; default: - return cs47l24_is_adsp_memory(dev, reg); + return largo_is_adsp_memory(dev, reg); } } -#define CS47L24_MAX_REGISTER 0x3b3fff +#define LARGO_MAX_REGISTER 0x3b3fff -const struct regmap_config cs47l24_spi_regmap = { +const struct regmap_config largo_spi_regmap = { .reg_bits = 32, .pad_bits = 16, .val_bits = 16, - .max_register = CS47L24_MAX_REGISTER, - .readable_reg = cs47l24_readable_register, - .volatile_reg = cs47l24_volatile_register, + .max_register = LARGO_MAX_REGISTER, + .readable_reg = largo_readable_register, + .volatile_reg = largo_volatile_register, .cache_type = REGCACHE_RBTREE, - .reg_defaults = cs47l24_reg_default, - .num_reg_defaults = ARRAY_SIZE(cs47l24_reg_default), + .reg_defaults = largo_reg_default, + .num_reg_defaults = ARRAY_SIZE(largo_reg_default), }; -EXPORT_SYMBOL_GPL(cs47l24_spi_regmap); +EXPORT_SYMBOL_GPL(largo_spi_regmap); diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 2bfb67a2a01..06df657e8ef 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -193,7 +193,7 @@ int florida_patch(struct arizona *arizona); int wm8997_patch(struct arizona *arizona); int vegas_patch(struct arizona *arizona); int clearwater_patch(struct arizona *arizona); -int cs47l24_patch(struct arizona *arizona); +int largo_patch(struct arizona *arizona); extern int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, bool mandatory); From 84ce81557b1a990e31cd81de37d36f9d130ea0e4 Mon Sep 17 00:00:00 2001 From: Heather Lomond Date: Thu, 15 Jan 2015 16:09:06 +0000 Subject: [PATCH 0680/1167] ASoC: largo: rename cs47l24 to largo Change-Id: I6ad35614c2fdef18fbe9a6e206e41901f4836554 Signed-off-by: Heather Lomond --- sound/soc/codecs/Kconfig | 12 +- sound/soc/codecs/Makefile | 4 +- sound/soc/codecs/{cs47l24.c => largo.c} | 476 ++++++++++++------------ sound/soc/codecs/{cs47l24.h => largo.h} | 14 +- 4 files changed, 258 insertions(+), 248 deletions(-) rename sound/soc/codecs/{cs47l24.c => largo.c} (79%) rename sound/soc/codecs/{cs47l24.h => largo.h} (61%) diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 35a20768be6..601be7508b4 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -35,7 +35,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_CS42L73 if I2C select SND_SOC_CS4270 if I2C select SND_SOC_CS4271 if SND_SOC_I2C_AND_SPI - select SND_SOC_CS47L24 if MFD_CS47L24 + select SND_SOC_LARGO if MFD_LARGO select SND_SOC_CX20442 if TTY select SND_SOC_DA7210 if I2C select SND_SOC_DA7213 if I2C @@ -150,13 +150,13 @@ config SND_SOC_ARIZONA default y if SND_SOC_CLEARWATER=y default y if SND_SOC_WM8997=y default y if SND_SOC_VEGAS=y - default y if SND_SOC_CS47L24=y + default y if SND_SOC_LARGO=y default m if SND_SOC_WM5102=m default m if SND_SOC_FLORIDA=m default m if SND_SOC_CLEARWATER=m default m if SND_SOC_WM8997=m default m if SND_SOC_VEGAS=m - default m if SND_SOC_CS47L24=m + default m if SND_SOC_LARGO=m config SND_SOC_WM_HUBS tristate @@ -169,12 +169,12 @@ config SND_SOC_WM_ADSP default y if SND_SOC_FLORIDA=y default y if SND_SOC_CLEARWATER=y default y if SND_SOC_WM2200=y - default y if SND_SOC_CS47L24=y + default y if SND_SOC_LARGO=y default m if SND_SOC_WM5102=m default m if SND_SOC_FLORIDA=m default m if SND_SOC_CLEARWATER=m default m if SND_SOC_WM2200=m - default m if SND_SOC_CS47L24=m + default m if SND_SOC_LARGO=m config SND_SOC_AB8500_CODEC tristate @@ -258,7 +258,7 @@ config SND_SOC_CS4270_VD33_ERRATA config SND_SOC_CS4271 tristate -config SND_SOC_CS47L24 +config SND_SOC_LARGO tristate config SND_SOC_CX20442 diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index d38ceeee02f..10185ac84de 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -22,7 +22,7 @@ snd-soc-cs42l52-objs := cs42l52.o snd-soc-cs42l73-objs := cs42l73.o snd-soc-cs4270-objs := cs4270.o snd-soc-cs4271-objs := cs4271.o -snd-soc-cs47l24-objs := cs47l24.o +snd-soc-largo-objs := largo.o snd-soc-cx20442-objs := cx20442.o snd-soc-da7210-objs := da7210.o snd-soc-da7213-objs := da7213.o @@ -153,7 +153,7 @@ obj-$(CONFIG_SND_SOC_CS42L52) += snd-soc-cs42l52.o obj-$(CONFIG_SND_SOC_CS42L73) += snd-soc-cs42l73.o obj-$(CONFIG_SND_SOC_CS4270) += snd-soc-cs4270.o obj-$(CONFIG_SND_SOC_CS4271) += snd-soc-cs4271.o -obj-$(CONFIG_SND_SOC_CS47L24) += snd-soc-cs47l24.o +obj-$(CONFIG_SND_SOC_LARGO) += snd-soc-largo.o obj-$(CONFIG_SND_SOC_CX20442) += snd-soc-cx20442.o obj-$(CONFIG_SND_SOC_DA7210) += snd-soc-da7210.o obj-$(CONFIG_SND_SOC_DA7213) += snd-soc-da7213.o diff --git a/sound/soc/codecs/cs47l24.c b/sound/soc/codecs/largo.c similarity index 79% rename from sound/soc/codecs/cs47l24.c rename to sound/soc/codecs/largo.c index f39f2cf90dc..d09cff7c2a7 100644 --- a/sound/soc/codecs/cs47l24.c +++ b/sound/soc/codecs/largo.c @@ -1,5 +1,5 @@ /* - * cs47l24.c -- ALSA SoC Audio driver for CS47L24 codec + * largo.c -- ALSA SoC Audio driver for Largo codec * * Copyright 2014 CirrusLogic, Inc. * @@ -31,12 +31,12 @@ #include "arizona.h" #include "wm_adsp.h" -#include "cs47l24.h" +#include "largo.h" -#define CS47L24_DEFAULT_FRAGMENTS 1 -#define CS47L24_DEFAULT_FRAGMENT_SIZE 4096 +#define LARGO_DEFAULT_FRAGMENTS 1 +#define LARGO_DEFAULT_FRAGMENT_SIZE 4096 -struct cs47l24_compr { +struct largo_compr { struct mutex lock; struct snd_compr_stream *stream; @@ -45,53 +45,60 @@ struct cs47l24_compr { size_t total_copied; bool allocated; bool trig; + bool forced; }; -struct cs47l24_priv { +struct largo_priv { struct arizona_priv core; struct arizona_fll fll[2]; - struct cs47l24_compr compr_info; + struct largo_compr compr_info; struct mutex fw_lock; }; -static const struct wm_adsp_region cs47l24_dsp2_regions[] = { +static const struct wm_adsp_region largo_dsp2_regions[] = { { .type = WMFW_ADSP2_PM, .base = 0x200000 }, { .type = WMFW_ADSP2_ZM, .base = 0x280000 }, { .type = WMFW_ADSP2_XM, .base = 0x290000 }, { .type = WMFW_ADSP2_YM, .base = 0x2a8000 }, }; -static const struct wm_adsp_region cs47l24_dsp3_regions[] = { +static const struct wm_adsp_region largo_dsp3_regions[] = { { .type = WMFW_ADSP2_PM, .base = 0x300000 }, { .type = WMFW_ADSP2_ZM, .base = 0x380000 }, { .type = WMFW_ADSP2_XM, .base = 0x390000 }, { .type = WMFW_ADSP2_YM, .base = 0x3a8000 }, }; -static const struct wm_adsp_region *cs47l24_dsp_regions[] = { - cs47l24_dsp2_regions, - cs47l24_dsp3_regions, +static const struct wm_adsp_region *largo_dsp_regions[] = { + largo_dsp2_regions, + largo_dsp3_regions, }; -static int cs47l24_adsp_power_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) +static int largo_virt_dsp_power_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) { - struct cs47l24_priv *cs47l24 = snd_soc_codec_get_drvdata(w->codec); + struct largo_priv *largo = snd_soc_codec_get_drvdata(w->codec); + + mutex_lock(&largo->compr_info.lock); + + if (!largo->compr_info.stream) + largo->compr_info.trig = false; switch (event) { - case SND_SOC_DAPM_PRE_PMU: - if (w->shift == 2) { - mutex_lock(&cs47l24->compr_info.lock); - cs47l24->compr_info.trig = false; - mutex_unlock(&cs47l24->compr_info.lock); - } + case SND_SOC_DAPM_POST_PMU: + largo->compr_info.forced = true; + break; + case SND_SOC_DAPM_PRE_PMD: + largo->compr_info.forced = false; break; default: break; } - return arizona_adsp_power_ev(w, kcontrol, event); + mutex_unlock(&largo->compr_info.lock); + + return 0; } static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); @@ -99,12 +106,12 @@ static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); static DECLARE_TLV_DB_SCALE(noise_tlv, 0, 600, 0); static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); -#define CS47L24_NG_SRC(name, base) \ +#define LARGO_NG_SRC(name, base) \ SOC_SINGLE(name " NG HPOUT1L Switch", base, 0, 1, 0), \ SOC_SINGLE(name " NG HPOUT1R Switch", base, 1, 1, 0), \ SOC_SINGLE(name " NG SPKOUT Switch", base, 6, 1, 0) -static const struct snd_kcontrol_new cs47l24_snd_controls[] = { +static const struct snd_kcontrol_new largo_snd_controls[] = { SOC_ENUM("IN1 OSR", arizona_in_dmic_osr[0]), SOC_ENUM("IN2 OSR", arizona_in_dmic_osr[1]), @@ -236,9 +243,9 @@ SOC_ENUM("Noise Gate Hold", arizona_ng_hold), SOC_VALUE_ENUM("Output Rate 1", arizona_output_rate), SOC_VALUE_ENUM("In Rate", arizona_input_rate), -CS47L24_NG_SRC("HPOUT1L", ARIZONA_NOISE_GATE_SELECT_1L), -CS47L24_NG_SRC("HPOUT1R", ARIZONA_NOISE_GATE_SELECT_1R), -CS47L24_NG_SRC("SPKOUT", ARIZONA_NOISE_GATE_SELECT_4L), +LARGO_NG_SRC("HPOUT1L", ARIZONA_NOISE_GATE_SELECT_1L), +LARGO_NG_SRC("HPOUT1R", ARIZONA_NOISE_GATE_SELECT_1R), +LARGO_NG_SRC("SPKOUT", ARIZONA_NOISE_GATE_SELECT_4L), ARIZONA_MIXER_CONTROLS("AIF1TX1", ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("AIF1TX2", ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE), @@ -342,52 +349,52 @@ ARIZONA_MUX_ENUMS(ISRC3DEC2, ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE); ARIZONA_MUX_ENUMS(ISRC3DEC3, ARIZONA_ISRC3DEC3MIX_INPUT_1_SOURCE); ARIZONA_MUX_ENUMS(ISRC3DEC4, ARIZONA_ISRC3DEC4MIX_INPUT_1_SOURCE); -static const char * const cs47l24_dsp_output_texts[] = { +static const char * const largo_dsp_output_texts[] = { "None", "DSP3", }; -static const struct soc_enum cs47l24_dsp_output_enum = - SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(cs47l24_dsp_output_texts), - cs47l24_dsp_output_texts); +static const struct soc_enum largo_dsp_output_enum = + SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(largo_dsp_output_texts), + largo_dsp_output_texts); -static const struct snd_kcontrol_new cs47l24_dsp_output_mux[] = { - SOC_DAPM_ENUM_VIRT("DSP Virtual Output Mux", cs47l24_dsp_output_enum), +static const struct snd_kcontrol_new largo_dsp_output_mux[] = { + SOC_DAPM_ENUM_VIRT("DSP Virtual Output Mux", largo_dsp_output_enum), }; -static const char * const cs47l24_memory_mux_texts[] = { +static const char * const largo_memory_mux_texts[] = { "None", "Shared Memory", }; -static const struct soc_enum cs47l24_memory_enum = - SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(cs47l24_memory_mux_texts), - cs47l24_memory_mux_texts); +static const struct soc_enum largo_memory_enum = + SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(largo_memory_mux_texts), + largo_memory_mux_texts); -static const struct snd_kcontrol_new cs47l24_memory_mux[] = { - SOC_DAPM_ENUM_VIRT("DSP2 Virtual Input", cs47l24_memory_enum), - SOC_DAPM_ENUM_VIRT("DSP3 Virtual Input", cs47l24_memory_enum), +static const struct snd_kcontrol_new largo_memory_mux[] = { + SOC_DAPM_ENUM_VIRT("DSP2 Virtual Input", largo_memory_enum), + SOC_DAPM_ENUM_VIRT("DSP3 Virtual Input", largo_memory_enum), }; -static const char * const cs47l24_aec_loopback_texts[] = { +static const char * const largo_aec_loopback_texts[] = { "HPOUT1L", "HPOUT1R", "SPKOUT", }; -static const unsigned int cs47l24_aec_loopback_values[] = { +static const unsigned int largo_aec_loopback_values[] = { 0, 1, 6, }; -static const struct soc_enum cs47l24_aec_loopback = +static const struct soc_enum largo_aec_loopback = SOC_VALUE_ENUM_SINGLE(ARIZONA_DAC_AEC_CONTROL_1, ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, - ARRAY_SIZE(cs47l24_aec_loopback_texts), - cs47l24_aec_loopback_texts, - cs47l24_aec_loopback_values); + ARRAY_SIZE(largo_aec_loopback_texts), + largo_aec_loopback_texts, + largo_aec_loopback_values); -static const struct snd_kcontrol_new cs47l24_aec_loopback_mux = - SOC_DAPM_VALUE_ENUM("AEC Loopback", cs47l24_aec_loopback); +static const struct snd_kcontrol_new largo_aec_loopback_mux = + SOC_DAPM_VALUE_ENUM("AEC Loopback", largo_aec_loopback); -static const struct snd_soc_dapm_widget cs47l24_dapm_widgets[] = { +static const struct snd_soc_dapm_widget largo_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("ASYNCCLK", ARIZONA_ASYNC_CLOCK_1, @@ -480,8 +487,8 @@ SND_SOC_DAPM_PGA("ASRC2L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2L_ENA_SHIFT, 0, SND_SOC_DAPM_PGA("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0, NULL, 0), -WM_ADSP2("DSP2", 1, cs47l24_adsp_power_ev), -WM_ADSP2("DSP3", 2, cs47l24_adsp_power_ev), +WM_ADSP2("DSP2", 1, arizona_adsp_power_ev), +WM_ADSP2("DSP3", 2, arizona_adsp_power_ev), SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), @@ -539,7 +546,7 @@ SND_SOC_DAPM_PGA("ISRC3DEC4", ARIZONA_ISRC_3_CTRL_3, SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, - &cs47l24_aec_loopback_mux), + &largo_aec_loopback_mux), SND_SOC_DAPM_AIF_OUT("AIF1TX1", NULL, 0, ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX1_ENA_SHIFT, 0), @@ -668,12 +675,13 @@ ARIZONA_DSP_WIDGETS(DSP2, "DSP2"), ARIZONA_DSP_WIDGETS(DSP3, "DSP3"), SND_SOC_DAPM_VIRT_MUX("DSP2 Virtual Input", SND_SOC_NOPM, 0, 0, - &cs47l24_memory_mux[0]), + &largo_memory_mux[0]), SND_SOC_DAPM_VIRT_MUX("DSP3 Virtual Input", SND_SOC_NOPM, 0, 0, - &cs47l24_memory_mux[1]), + &largo_memory_mux[1]), -SND_SOC_DAPM_VIRT_MUX("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, - &cs47l24_dsp_output_mux[0]), +SND_SOC_DAPM_VIRT_MUX_E("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, + &largo_dsp_output_mux[0], largo_virt_dsp_power_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), ARIZONA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), ARIZONA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"), @@ -790,7 +798,7 @@ SND_SOC_DAPM_OUTPUT("MICSUPP"), { name, "DSP3.5", "DSP3" }, \ { name, "DSP3.6", "DSP3" } -static const struct snd_soc_dapm_route cs47l24_dapm_routes[] = { +static const struct snd_soc_dapm_route largo_dapm_routes[] = { { "OUT1L", NULL, "CPVDD" }, { "OUT1R", NULL, "CPVDD" }, @@ -977,172 +985,172 @@ static const struct snd_soc_dapm_route cs47l24_dapm_routes[] = { { "DRC2 Signal Activity", NULL, "DRC2R" }, }; -static int cs47l24_set_fll(struct snd_soc_codec *codec, int fll_id, int source, +static int largo_set_fll(struct snd_soc_codec *codec, int fll_id, int source, unsigned int Fref, unsigned int Fout) { - struct cs47l24_priv *cs47l24 = snd_soc_codec_get_drvdata(codec); + struct largo_priv *largo = snd_soc_codec_get_drvdata(codec); switch (fll_id) { - case CS47L24_FLL1: - return arizona_set_fll(&cs47l24->fll[0], source, Fref, Fout); - case CS47L24_FLL2: - return arizona_set_fll(&cs47l24->fll[1], source, Fref, Fout); - case CS47L24_FLL1_REFCLK: - return arizona_set_fll_refclk(&cs47l24->fll[0], source, Fref, + case LARGO_FLL1: + return arizona_set_fll(&largo->fll[0], source, Fref, Fout); + case LARGO_FLL2: + return arizona_set_fll(&largo->fll[1], source, Fref, Fout); + case LARGO_FLL1_REFCLK: + return arizona_set_fll_refclk(&largo->fll[0], source, Fref, Fout); - case CS47L24_FLL2_REFCLK: - return arizona_set_fll_refclk(&cs47l24->fll[1], source, Fref, + case LARGO_FLL2_REFCLK: + return arizona_set_fll_refclk(&largo->fll[1], source, Fref, Fout); default: return -EINVAL; } } -#define CS47L24_RATES SNDRV_PCM_RATE_8000_192000 +#define LARGO_RATES SNDRV_PCM_RATE_8000_192000 -#define CS47L24_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ +#define LARGO_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) -static struct snd_soc_dai_driver cs47l24_dai[] = { +static struct snd_soc_dai_driver largo_dai[] = { { - .name = "cs47l24-aif1", + .name = "largo-aif1", .id = 1, .base = ARIZONA_AIF1_BCLK_CTRL, .playback = { .stream_name = "AIF1 Playback", .channels_min = 1, .channels_max = 8, - .rates = CS47L24_RATES, - .formats = CS47L24_FORMATS, + .rates = LARGO_RATES, + .formats = LARGO_FORMATS, }, .capture = { .stream_name = "AIF1 Capture", .channels_min = 1, .channels_max = 8, - .rates = CS47L24_RATES, - .formats = CS47L24_FORMATS, + .rates = LARGO_RATES, + .formats = LARGO_FORMATS, }, .ops = &arizona_dai_ops, .symmetric_rates = 1, }, { - .name = "cs47l24-aif2", + .name = "largo-aif2", .id = 2, .base = ARIZONA_AIF2_BCLK_CTRL, .playback = { .stream_name = "AIF2 Playback", .channels_min = 1, .channels_max = 6, - .rates = CS47L24_RATES, - .formats = CS47L24_FORMATS, + .rates = LARGO_RATES, + .formats = LARGO_FORMATS, }, .capture = { .stream_name = "AIF2 Capture", .channels_min = 1, .channels_max = 6, - .rates = CS47L24_RATES, - .formats = CS47L24_FORMATS, + .rates = LARGO_RATES, + .formats = LARGO_FORMATS, }, .ops = &arizona_dai_ops, .symmetric_rates = 1, }, { - .name = "cs47l24-aif3", + .name = "largo-aif3", .id = 3, .base = ARIZONA_AIF3_BCLK_CTRL, .playback = { .stream_name = "AIF3 Playback", .channels_min = 1, .channels_max = 2, - .rates = CS47L24_RATES, - .formats = CS47L24_FORMATS, + .rates = LARGO_RATES, + .formats = LARGO_FORMATS, }, .capture = { .stream_name = "AIF3 Capture", .channels_min = 1, .channels_max = 2, - .rates = CS47L24_RATES, - .formats = CS47L24_FORMATS, + .rates = LARGO_RATES, + .formats = LARGO_FORMATS, }, .ops = &arizona_dai_ops, .symmetric_rates = 1, }, { - .name = "cs47l24-cpu-voicectrl", + .name = "largo-cpu-voicectrl", .capture = { .stream_name = "Voice Control CPU", .channels_min = 1, .channels_max = 2, - .rates = CS47L24_RATES, - .formats = CS47L24_FORMATS, + .rates = LARGO_RATES, + .formats = LARGO_FORMATS, }, .compress_dai = 1, }, { - .name = "cs47l24-dsp-voicectrl", + .name = "largo-dsp-voicectrl", .capture = { .stream_name = "Voice Control DSP", .channels_min = 1, .channels_max = 2, - .rates = CS47L24_RATES, - .formats = CS47L24_FORMATS, + .rates = LARGO_RATES, + .formats = LARGO_FORMATS, }, }, }; static irqreturn_t adsp2_irq(int irq, void *data) { - struct cs47l24_priv *cs47l24 = data; + struct largo_priv *largo = data; int ret, avail; - mutex_lock(&cs47l24->compr_info.lock); + mutex_lock(&largo->compr_info.lock); - if (!cs47l24->compr_info.trig && - cs47l24->core.adsp[2].fw_features.ez2control_trigger && - cs47l24->core.adsp[2].running) { - if (cs47l24->core.arizona->pdata.ez2ctrl_trigger) - cs47l24->core.arizona->pdata.ez2ctrl_trigger(); - cs47l24->compr_info.trig = true; + if (!largo->compr_info.trig && + largo->core.adsp[2].fw_features.ez2control_trigger && + largo->core.adsp[2].running) { + if (largo->core.arizona->pdata.ez2ctrl_trigger) + largo->core.arizona->pdata.ez2ctrl_trigger(); + largo->compr_info.trig = true; } - if (!cs47l24->compr_info.allocated) + if (!largo->compr_info.allocated) goto out; - ret = wm_adsp_stream_handle_irq(cs47l24->compr_info.adsp); + ret = wm_adsp_stream_handle_irq(largo->compr_info.adsp); if (ret < 0) { - dev_err(cs47l24->core.arizona->dev, + dev_err(largo->core.arizona->dev, "Failed to capture DSP data: %d\n", ret); goto out; } - cs47l24->compr_info.total_copied += ret; + largo->compr_info.total_copied += ret; - avail = wm_adsp_stream_avail(cs47l24->compr_info.adsp); - if (avail > CS47L24_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(cs47l24->compr_info.stream); + avail = wm_adsp_stream_avail(largo->compr_info.adsp); + if (avail > LARGO_DEFAULT_FRAGMENT_SIZE) + snd_compr_fragment_elapsed(largo->compr_info.stream); out: - mutex_unlock(&cs47l24->compr_info.lock); + mutex_unlock(&largo->compr_info.lock); return IRQ_HANDLED; } -static int cs47l24_open(struct snd_compr_stream *stream) +static int largo_open(struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct cs47l24_priv *cs47l24 = snd_soc_codec_get_drvdata(rtd->codec); - struct arizona *arizona = cs47l24->core.arizona; + struct largo_priv *largo = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = largo->core.arizona; int n_adsp, ret = 0; - mutex_lock(&cs47l24->compr_info.lock); + mutex_lock(&largo->compr_info.lock); - if (cs47l24->compr_info.stream) { + if (largo->compr_info.stream) { ret = -EBUSY; goto out; } - if (strcmp(rtd->codec_dai->name, "cs47l24-dsp-voicectrl") == 0) { + if (strcmp(rtd->codec_dai->name, "largo-dsp-voicectrl") == 0) { n_adsp = 2; } else { dev_err(arizona->dev, @@ -1152,46 +1160,48 @@ static int cs47l24_open(struct snd_compr_stream *stream) goto out; } - if (!wm_adsp_compress_supported(&cs47l24->core.adsp[n_adsp], stream)) { + if (!wm_adsp_compress_supported(&largo->core.adsp[n_adsp], stream)) { dev_err(arizona->dev, "No suitable firmware for compressed stream\n"); ret = -EINVAL; goto out; } - cs47l24->compr_info.adsp = &cs47l24->core.adsp[n_adsp]; - cs47l24->compr_info.stream = stream; + largo->compr_info.adsp = &largo->core.adsp[n_adsp]; + largo->compr_info.stream = stream; out: - mutex_unlock(&cs47l24->compr_info.lock); + mutex_unlock(&largo->compr_info.lock); return ret; } -static int cs47l24_free(struct snd_compr_stream *stream) +static int largo_free(struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct cs47l24_priv *cs47l24 = snd_soc_codec_get_drvdata(rtd->codec); + struct largo_priv *largo = snd_soc_codec_get_drvdata(rtd->codec); - mutex_lock(&cs47l24->compr_info.lock); + mutex_lock(&largo->compr_info.lock); - cs47l24->compr_info.allocated = false; - cs47l24->compr_info.stream = NULL; - cs47l24->compr_info.total_copied = 0; + largo->compr_info.allocated = false; + largo->compr_info.stream = NULL; + largo->compr_info.total_copied = 0; + if (!largo->compr_info.forced) + largo->compr_info.trig = false; - wm_adsp_stream_free(cs47l24->compr_info.adsp); + wm_adsp_stream_free(largo->compr_info.adsp); - mutex_unlock(&cs47l24->compr_info.lock); + mutex_unlock(&largo->compr_info.lock); return 0; } -static int cs47l24_set_params(struct snd_compr_stream *stream, +static int largo_set_params(struct snd_compr_stream *stream, struct snd_compr_params *params) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct cs47l24_priv *cs47l24 = snd_soc_codec_get_drvdata(rtd->codec); - struct arizona *arizona = cs47l24->core.arizona; - struct cs47l24_compr *compr = &cs47l24->compr_info; + struct largo_priv *largo = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = largo->core.arizona; + struct largo_compr *compr = &largo->compr_info; int ret = 0; mutex_lock(&compr->lock); @@ -1216,30 +1226,30 @@ static int cs47l24_set_params(struct snd_compr_stream *stream, return ret; } -static int cs47l24_get_params(struct snd_compr_stream *stream, +static int largo_get_params(struct snd_compr_stream *stream, struct snd_codec *params) { return 0; } -static int cs47l24_trigger(struct snd_compr_stream *stream, int cmd) +static int largo_trigger(struct snd_compr_stream *stream, int cmd) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct cs47l24_priv *cs47l24 = snd_soc_codec_get_drvdata(rtd->codec); + struct largo_priv *largo = snd_soc_codec_get_drvdata(rtd->codec); int ret = 0; bool pending = false; - mutex_lock(&cs47l24->compr_info.lock); + mutex_lock(&largo->compr_info.lock); switch (cmd) { case SNDRV_PCM_TRIGGER_START: - ret = wm_adsp_stream_start(cs47l24->compr_info.adsp); + ret = wm_adsp_stream_start(largo->compr_info.adsp); /** * If the stream has already triggered before the stream * opened better process any outstanding data */ - if (cs47l24->compr_info.trig) + if (largo->compr_info.trig) pending = true; break; case SNDRV_PCM_TRIGGER_STOP: @@ -1249,79 +1259,79 @@ static int cs47l24_trigger(struct snd_compr_stream *stream, int cmd) break; } - mutex_unlock(&cs47l24->compr_info.lock); + mutex_unlock(&largo->compr_info.lock); if (pending) - adsp2_irq(0, cs47l24); + adsp2_irq(0, largo); return ret; } -static int cs47l24_pointer(struct snd_compr_stream *stream, +static int largo_pointer(struct snd_compr_stream *stream, struct snd_compr_tstamp *tstamp) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct cs47l24_priv *cs47l24 = snd_soc_codec_get_drvdata(rtd->codec); + struct largo_priv *largo = snd_soc_codec_get_drvdata(rtd->codec); - mutex_lock(&cs47l24->compr_info.lock); + mutex_lock(&largo->compr_info.lock); tstamp->byte_offset = 0; - tstamp->copied_total = cs47l24->compr_info.total_copied; - mutex_unlock(&cs47l24->compr_info.lock); + tstamp->copied_total = largo->compr_info.total_copied; + mutex_unlock(&largo->compr_info.lock); return 0; } -static int cs47l24_copy(struct snd_compr_stream *stream, char __user *buf, +static int largo_copy(struct snd_compr_stream *stream, char __user *buf, size_t count) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct cs47l24_priv *cs47l24 = snd_soc_codec_get_drvdata(rtd->codec); + struct largo_priv *largo = snd_soc_codec_get_drvdata(rtd->codec); int ret; - mutex_lock(&cs47l24->compr_info.lock); + mutex_lock(&largo->compr_info.lock); if (stream->direction == SND_COMPRESS_PLAYBACK) ret = -EINVAL; else - ret = wm_adsp_stream_read(cs47l24->compr_info.adsp, buf, count); + ret = wm_adsp_stream_read(largo->compr_info.adsp, buf, count); - mutex_unlock(&cs47l24->compr_info.lock); + mutex_unlock(&largo->compr_info.lock); return ret; } -static int cs47l24_get_caps(struct snd_compr_stream *stream, +static int largo_get_caps(struct snd_compr_stream *stream, struct snd_compr_caps *caps) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct cs47l24_priv *cs47l24 = snd_soc_codec_get_drvdata(rtd->codec); + struct largo_priv *largo = snd_soc_codec_get_drvdata(rtd->codec); - mutex_lock(&cs47l24->compr_info.lock); + mutex_lock(&largo->compr_info.lock); memset(caps, 0, sizeof(*caps)); caps->direction = stream->direction; - caps->min_fragment_size = CS47L24_DEFAULT_FRAGMENT_SIZE; - caps->max_fragment_size = CS47L24_DEFAULT_FRAGMENT_SIZE; - caps->min_fragments = CS47L24_DEFAULT_FRAGMENTS; - caps->max_fragments = CS47L24_DEFAULT_FRAGMENTS; + caps->min_fragment_size = LARGO_DEFAULT_FRAGMENT_SIZE; + caps->max_fragment_size = LARGO_DEFAULT_FRAGMENT_SIZE; + caps->min_fragments = LARGO_DEFAULT_FRAGMENTS; + caps->max_fragments = LARGO_DEFAULT_FRAGMENTS; - wm_adsp_get_caps(cs47l24->compr_info.adsp, stream, caps); + wm_adsp_get_caps(largo->compr_info.adsp, stream, caps); - mutex_unlock(&cs47l24->compr_info.lock); + mutex_unlock(&largo->compr_info.lock); return 0; } -static int cs47l24_get_codec_caps(struct snd_compr_stream *stream, +static int largo_get_codec_caps(struct snd_compr_stream *stream, struct snd_compr_codec_caps *codec) { return 0; } -static int cs47l24_codec_probe(struct snd_soc_codec *codec) +static int largo_codec_probe(struct snd_soc_codec *codec) { - struct cs47l24_priv *priv = snd_soc_codec_get_drvdata(codec); + struct largo_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; int ret; @@ -1377,9 +1387,9 @@ static int cs47l24_codec_probe(struct snd_soc_codec *codec) return 0; } -static int cs47l24_codec_remove(struct snd_soc_codec *codec) +static int largo_codec_remove(struct snd_soc_codec *codec) { - struct cs47l24_priv *priv = snd_soc_codec_get_drvdata(codec); + struct largo_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; irq_set_irq_wake(arizona->irq, 0); @@ -1393,119 +1403,119 @@ static int cs47l24_codec_remove(struct snd_soc_codec *codec) return 0; } -#define CS47L24_DIG_VU 0x0200 +#define LARGO_DIG_VU 0x0200 -static unsigned int cs47l24_digital_vu[] = { +static unsigned int largo_digital_vu[] = { ARIZONA_DAC_DIGITAL_VOLUME_1L, ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_DAC_DIGITAL_VOLUME_4L, }; -static struct snd_soc_codec_driver soc_codec_dev_cs47l24 = { - .probe = cs47l24_codec_probe, - .remove = cs47l24_codec_remove, +static struct snd_soc_codec_driver soc_codec_dev_largo = { + .probe = largo_codec_probe, + .remove = largo_codec_remove, .idle_bias_off = true, .set_sysclk = arizona_set_sysclk, - .set_pll = cs47l24_set_fll, - - .controls = cs47l24_snd_controls, - .num_controls = ARRAY_SIZE(cs47l24_snd_controls), - .dapm_widgets = cs47l24_dapm_widgets, - .num_dapm_widgets = ARRAY_SIZE(cs47l24_dapm_widgets), - .dapm_routes = cs47l24_dapm_routes, - .num_dapm_routes = ARRAY_SIZE(cs47l24_dapm_routes), + .set_pll = largo_set_fll, + + .controls = largo_snd_controls, + .num_controls = ARRAY_SIZE(largo_snd_controls), + .dapm_widgets = largo_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(largo_dapm_widgets), + .dapm_routes = largo_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(largo_dapm_routes), }; -static struct snd_compr_ops cs47l24_compr_ops = { - .open = cs47l24_open, - .free = cs47l24_free, - .set_params = cs47l24_set_params, - .get_params = cs47l24_get_params, - .trigger = cs47l24_trigger, - .pointer = cs47l24_pointer, - .copy = cs47l24_copy, - .get_caps = cs47l24_get_caps, - .get_codec_caps = cs47l24_get_codec_caps, +static struct snd_compr_ops largo_compr_ops = { + .open = largo_open, + .free = largo_free, + .set_params = largo_set_params, + .get_params = largo_get_params, + .trigger = largo_trigger, + .pointer = largo_pointer, + .copy = largo_copy, + .get_caps = largo_get_caps, + .get_codec_caps = largo_get_codec_caps, }; -static struct snd_soc_platform_driver cs47l24_compr_platform = { - .compr_ops = &cs47l24_compr_ops, +static struct snd_soc_platform_driver largo_compr_platform = { + .compr_ops = &largo_compr_ops, }; -static int cs47l24_probe(struct platform_device *pdev) +static int largo_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); - struct cs47l24_priv *cs47l24; + struct largo_priv *largo; int i, ret; - BUILD_BUG_ON(ARRAY_SIZE(cs47l24_dai) > ARIZONA_MAX_DAI); + BUILD_BUG_ON(ARRAY_SIZE(largo_dai) > ARIZONA_MAX_DAI); - cs47l24 = devm_kzalloc(&pdev->dev, sizeof(struct cs47l24_priv), + largo = devm_kzalloc(&pdev->dev, sizeof(struct largo_priv), GFP_KERNEL); - if (cs47l24 == NULL) + if (largo == NULL) return -ENOMEM; - platform_set_drvdata(pdev, cs47l24); + platform_set_drvdata(pdev, largo); /* Set of_node to parent from the SPI device to allow DAPM to * locate regulator supplies */ pdev->dev.of_node = arizona->dev->of_node; - mutex_init(&cs47l24->compr_info.lock); - mutex_init(&cs47l24->fw_lock); + mutex_init(&largo->compr_info.lock); + mutex_init(&largo->fw_lock); - cs47l24->core.arizona = arizona; - cs47l24->core.num_inputs = 4; + largo->core.arizona = arizona; + largo->core.num_inputs = 4; for (i = 1; i <= 2; i++) { - cs47l24->core.adsp[i].part = "cs47l24"; - cs47l24->core.adsp[i].num = i + 1; - cs47l24->core.adsp[i].type = WMFW_ADSP2; - cs47l24->core.adsp[i].dev = arizona->dev; - cs47l24->core.adsp[i].regmap = arizona->regmap; + largo->core.adsp[i].part = "largo"; + largo->core.adsp[i].num = i + 1; + largo->core.adsp[i].type = WMFW_ADSP2; + largo->core.adsp[i].dev = arizona->dev; + largo->core.adsp[i].regmap = arizona->regmap; - cs47l24->core.adsp[i].base = ARIZONA_DSP1_CONTROL_1 + largo->core.adsp[i].base = ARIZONA_DSP1_CONTROL_1 + (0x100 * i); - cs47l24->core.adsp[i].mem = cs47l24_dsp_regions[i - 1]; - cs47l24->core.adsp[i].num_mems - = ARRAY_SIZE(cs47l24_dsp2_regions); + largo->core.adsp[i].mem = largo_dsp_regions[i - 1]; + largo->core.adsp[i].num_mems + = ARRAY_SIZE(largo_dsp2_regions); if (arizona->pdata.num_fw_defs[i]) { - cs47l24->core.adsp[i].firmwares + largo->core.adsp[i].firmwares = arizona->pdata.fw_defs[i]; - cs47l24->core.adsp[i].num_firmwares + largo->core.adsp[i].num_firmwares = arizona->pdata.num_fw_defs[i]; } - ret = wm_adsp2_init(&cs47l24->core.adsp[i], &cs47l24->fw_lock); + ret = wm_adsp2_init(&largo->core.adsp[i], &largo->fw_lock); if (ret != 0) goto error; } - for (i = 0; i < ARRAY_SIZE(cs47l24->fll); i++) - cs47l24->fll[i].vco_mult = 3; + for (i = 0; i < ARRAY_SIZE(largo->fll); i++) + largo->fll[i].vco_mult = 3; arizona_init_fll(arizona, 1, ARIZONA_FLL1_CONTROL_1 - 1, ARIZONA_IRQ_FLL1_LOCK, ARIZONA_IRQ_FLL1_CLOCK_OK, - &cs47l24->fll[0]); + &largo->fll[0]); arizona_init_fll(arizona, 2, ARIZONA_FLL2_CONTROL_1 - 1, ARIZONA_IRQ_FLL2_LOCK, ARIZONA_IRQ_FLL2_CLOCK_OK, - &cs47l24->fll[1]); + &largo->fll[1]); - for (i = 0; i < ARRAY_SIZE(cs47l24_dai); i++) - arizona_init_dai(&cs47l24->core, i); + for (i = 0; i < ARRAY_SIZE(largo_dai); i++) + arizona_init_dai(&largo->core, i); /* Latch volume update bits */ - for (i = 0; i < ARRAY_SIZE(cs47l24_digital_vu); i++) - regmap_update_bits(arizona->regmap, cs47l24_digital_vu[i], - CS47L24_DIG_VU, CS47L24_DIG_VU); + for (i = 0; i < ARRAY_SIZE(largo_digital_vu); i++) + regmap_update_bits(arizona->regmap, largo_digital_vu[i], + LARGO_DIG_VU, LARGO_DIG_VU); pm_runtime_enable(&pdev->dev); pm_runtime_idle(&pdev->dev); - ret = snd_soc_register_platform(&pdev->dev, &cs47l24_compr_platform); + ret = snd_soc_register_platform(&pdev->dev, &largo_compr_platform); if (ret < 0) { dev_err(&pdev->dev, "Failed to register platform: %d\n", @@ -1513,8 +1523,8 @@ static int cs47l24_probe(struct platform_device *pdev) goto error; } - ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_cs47l24, - cs47l24_dai, ARRAY_SIZE(cs47l24_dai)); + ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_largo, + largo_dai, ARRAY_SIZE(largo_dai)); if (ret < 0) { dev_err(&pdev->dev, "Failed to register codec: %d\n", @@ -1526,37 +1536,37 @@ static int cs47l24_probe(struct platform_device *pdev) return ret; error: - mutex_destroy(&cs47l24->compr_info.lock); - mutex_destroy(&cs47l24->fw_lock); + mutex_destroy(&largo->compr_info.lock); + mutex_destroy(&largo->fw_lock); return ret; } -static int cs47l24_remove(struct platform_device *pdev) +static int largo_remove(struct platform_device *pdev) { - struct cs47l24_priv *cs47l24 = platform_get_drvdata(pdev); + struct largo_priv *largo = platform_get_drvdata(pdev); snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); - mutex_destroy(&cs47l24->compr_info.lock); - mutex_destroy(&cs47l24->fw_lock); + mutex_destroy(&largo->compr_info.lock); + mutex_destroy(&largo->fw_lock); return 0; } -static struct platform_driver cs47l24_codec_driver = { +static struct platform_driver largo_codec_driver = { .driver = { - .name = "cs47l24-codec", + .name = "largo-codec", .owner = THIS_MODULE, }, - .probe = cs47l24_probe, - .remove = cs47l24_remove, + .probe = largo_probe, + .remove = largo_remove, }; -module_platform_driver(cs47l24_codec_driver); +module_platform_driver(largo_codec_driver); -MODULE_DESCRIPTION("ASoC CS47L24 driver"); +MODULE_DESCRIPTION("ASoC Largo driver"); MODULE_AUTHOR("Richard Fitzgerald "); MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:cs47l24-codec"); +MODULE_ALIAS("platform:largo-codec"); diff --git a/sound/soc/codecs/cs47l24.h b/sound/soc/codecs/largo.h similarity index 61% rename from sound/soc/codecs/cs47l24.h rename to sound/soc/codecs/largo.h index ce51c6b005e..10f49cf9a5c 100644 --- a/sound/soc/codecs/cs47l24.h +++ b/sound/soc/codecs/largo.h @@ -1,5 +1,5 @@ /* - * cs47l24.h -- ALSA SoC Audio driver for CS47L24 + * largo.h -- ALSA SoC Audio driver for Largo * * Copyright 2014 Cirrus Logic * @@ -10,14 +10,14 @@ * published by the Free Software Foundation. */ -#ifndef _CS47L24_H -#define _CS47L24_H +#ifndef _LARGO_H +#define _LARGO_H #include "arizona.h" -#define CS47L24_FLL1 1 -#define CS47L24_FLL2 2 -#define CS47L24_FLL1_REFCLK 3 -#define CS47L24_FLL2_REFCLK 4 +#define LARGO_FLL1 1 +#define LARGO_FLL2 2 +#define LARGO_FLL1_REFCLK 3 +#define LARGO_FLL2_REFCLK 4 #endif From 5743014f198556fad5004cb4f73b15a9ddbbbd60 Mon Sep 17 00:00:00 2001 From: Mayuresh Kulkarni Date: Tue, 10 Feb 2015 13:51:48 +0000 Subject: [PATCH 0681/1167] mfd: arizona: add new registers for clearwater HP impedance tuning also mark them volatile Change-Id: I8c7b37cb8190be7708f75945d0d88e8b516736a2 Signed-off-by: Mayuresh Kulkarni --- drivers/mfd/clearwater-tables.c | 7 ++++- include/linux/mfd/arizona/registers.h | 45 +++++++++++++++++++++++++++ 2 files changed, 51 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index b54b4e73c07..33a95a80a73 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -553,7 +553,6 @@ static const struct reg_default clearwater_reg_default[] = { { 0x0000027e, 0x0000 }, /* R638 (0x27E) - Clearwater EDRE HP stereo control */ { 0x00000293, 0x0000 }, /* R659 (0x293) - Accessory Detect Mode 1 */ { 0x0000029b, 0x0000 }, /* R667 (0x29B) - Headphone Detect 1 */ - { 0x0000029f, 0x0000 }, { 0x000002a3, 0x1102 }, /* R675 (0x2A3) - Mic Detect 1 */ { 0x000002a4, 0x009f }, /* R676 (0x2A4) - Mic Detect 2 */ { 0x000002a6, 0x3737 }, @@ -2024,6 +2023,8 @@ static bool clearwater_16bit_readable_register(struct device *dev, unsigned int case ARIZONA_ACCESSORY_DETECT_MODE_1: case ARIZONA_HEADPHONE_DETECT_1: case ARIZONA_HEADPHONE_DETECT_2: + case ARIZONA_HEADPHONE_DETECT_3: + case ARIZONA_HP_DACVAL: case CLEARWATER_MICD_CLAMP_CONTROL: case ARIZONA_MIC_DETECT_1: case ARIZONA_MIC_DETECT_2: @@ -3237,6 +3238,8 @@ static bool clearwater_16bit_volatile_register(struct device *dev, unsigned int case ARIZONA_MIC_DETECT_3: case ARIZONA_MIC_DETECT_4: case ARIZONA_HEADPHONE_DETECT_2: + case ARIZONA_HEADPHONE_DETECT_3: + case ARIZONA_HP_DACVAL: case ARIZONA_INPUT_ENABLES_STATUS: case ARIZONA_OUTPUT_STATUS_1: case ARIZONA_RAW_OUTPUT_STATUS_1: @@ -3309,6 +3312,7 @@ static bool clearwater_32bit_readable_register(struct device *dev, unsigned int { switch (reg) { case ARIZONA_WSEQ_SEQUENCE_1 ... ARIZONA_WSEQ_SEQUENCE_508: + case CLEARWATER_OTP_HPDET_CALIB_1 ... CLEARWATER_OTP_HPDET_CALIB_2: case CLEARWATER_DSP1_CONFIG ... CLEARWATER_DSP1_SCRATCH_3: case CLEARWATER_DSP2_CONFIG ... CLEARWATER_DSP2_SCRATCH_3: case CLEARWATER_DSP3_CONFIG ... CLEARWATER_DSP3_SCRATCH_3: @@ -3326,6 +3330,7 @@ static bool clearwater_32bit_volatile_register(struct device *dev, unsigned int { switch (reg) { case ARIZONA_WSEQ_SEQUENCE_1 ... ARIZONA_WSEQ_SEQUENCE_508: + case CLEARWATER_OTP_HPDET_CALIB_1 ... CLEARWATER_OTP_HPDET_CALIB_2: case CLEARWATER_DSP1_CONFIG ... CLEARWATER_DSP1_SCRATCH_3: case CLEARWATER_DSP2_CONFIG ... CLEARWATER_DSP2_SCRATCH_3: case CLEARWATER_DSP3_CONFIG ... CLEARWATER_DSP3_SCRATCH_3: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 4147e3bc9f2..27f27e06feb 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -2199,6 +2199,8 @@ #define ARIZONA_WSEQ_SEQUENCE_506 0x33F2 #define ARIZONA_WSEQ_SEQUENCE_507 0x33F4 #define ARIZONA_WSEQ_SEQUENCE_508 0x33F6 +#define CLEARWATER_OTP_HPDET_CALIB_1 0x33F8 +#define CLEARWATER_OTP_HPDET_CALIB_2 0x33FA #define CLEARWATER_DSP1_CONFIG 0x0FFE00 #define CLEARWATER_DSP1_STATUS_1 0x0FFE04 #define CLEARWATER_DSP1_STATUS_2 0x0FFE05 @@ -3638,6 +3640,10 @@ #define ARIZONA_ACCDET_SRC_MASK 0x2000 /* ACCDET_SRC */ #define ARIZONA_ACCDET_SRC_SHIFT 13 /* ACCDET_SRC */ #define ARIZONA_ACCDET_SRC_WIDTH 1 /* ACCDET_SRC */ +#define ARIZONA_ACCDET_POLARITY_INV_ENA 0x0080 /* ACCDET_POLARITY_INV_ENA */ +#define ARIZONA_ACCDET_POLARITY_INV_ENA_MASK 0x0080 /* ACCDET_POLARITY_INV_ENA */ +#define ARIZONA_ACCDET_POLARITY_INV_ENA_SHIFT 7 /* ACCDET_POLARITY_INV_ENA */ +#define ARIZONA_ACCDET_POLARITY_INV_ENA_WIDTH 1 /* ACCDET_POLARITY_INV_ENA */ #define ARIZONA_ACCDET_MODE_MASK 0x0007 /* ACCDET_MODE - [2:0] */ #define ARIZONA_ACCDET_MODE_SHIFT 0 /* ACCDET_MODE - [2:0] */ #define ARIZONA_ACCDET_MODE_WIDTH 3 /* ACCDET_MODE - [2:0] */ @@ -3700,6 +3706,13 @@ #define ARIZONA_HP_DACVAL_SHIFT 0 /* HP_DACVAL [9:0] */ #define ARIZONA_HP_DACVAL_WIDTH 10 /* HP_DACVAL [9:0] */ +/* + * R669 (0x29F) - Headphone Detect 5 + */ +#define ARIZONA_HP_DACVAL_DOWN_MASK 0x03FF /* HP_DACVAL_DOWN [9:0] */ +#define ARIZONA_HP_DACVAL_DOWN_SHIFT 0 /* HP_DACVAL_DOWN [9:0] */ +#define ARIZONA_HP_DACVAL_DOWN_WIDTH 10 /* HP_DACVAL_DOWN [9:0] */ + /* * R674 (0x2A2) - MICD clamp control */ @@ -12234,4 +12247,36 @@ #define CLEARWATER_GP_DBTIME_SHIFT 0 /* GP_DBTIME - [3:0] */ #define CLEARWATER_GP_DBTIME_WIDTH 4 /* GP_DBTIME - [3:0] */ +/* + * R13304 (0x33F8) - OTP HPDET Calibration 1 + */ +#define CLEARWATER_OTP_HPDET_CALIB_OFFSET_11 0xFF000000 /* HP_OFFSET_11 - [31:24] */ +#define CLEARWATER_OTP_HPDET_CALIB_OFFSET_11_MASK 0xFF000000 /* HP_OFFSET_11 - [31:24] */ +#define CLEARWATER_OTP_HPDET_CALIB_OFFSET_11_SHIFT 24 /* HP_OFFSET_11 - [31:24] */ +#define CLEARWATER_OTP_HPDET_CALIB_OFFSET_11_WIDTH 8 /* HP_OFFSET_11 - [31:24] */ +#define CLEARWATER_OTP_HPDET_CALIB_OFFSET_10 0x00FF0000 /* HP_OFFSET_10 - [23:16] */ +#define CLEARWATER_OTP_HPDET_CALIB_OFFSET_10_MASK 0x00FF0000 /* HP_OFFSET_10 - [23:16] */ +#define CLEARWATER_OTP_HPDET_CALIB_OFFSET_10_SHIFT 16 /* HP_OFFSET_10 - [23:16] */ +#define CLEARWATER_OTP_HPDET_CALIB_OFFSET_10_WIDTH 8 /* HP_OFFSET_10 - [23:16] */ +#define CLEARWATER_OTP_HPDET_CALIB_OFFSET_01 0x0000FF00 /* HP_OFFSET_01 - [15:8] */ +#define CLEARWATER_OTP_HPDET_CALIB_OFFSET_01_MASK 0x0000FF00 /* HP_OFFSET_01 - [15:8] */ +#define CLEARWATER_OTP_HPDET_CALIB_OFFSET_01_SHIFT 8 /* HP_OFFSET_01 - [15:8] */ +#define CLEARWATER_OTP_HPDET_CALIB_OFFSET_01_WIDTH 8 /* HP_OFFSET_01 - [15:8] */ +#define CLEARWATER_OTP_HPDET_CALIB_OFFSET_00 0x000000FF /* HP_OFFSET_10 - [7:0] */ +#define CLEARWATER_OTP_HPDET_CALIB_OFFSET_00_MASK 0x000000FF /* HP_OFFSET_10 - [7:0] */ +#define CLEARWATER_OTP_HPDET_CALIB_OFFSET_00_SHIFT 0 /* HP_OFFSET_10 - [7:0] */ +#define CLEARWATER_OTP_HPDET_CALIB_OFFSET_00_WIDTH 8 /* HP_OFFSET_10 - [7:0] */ + +/* + * R13306 (0x33FA) - OTP HPDET Calibration 2 + */ +#define CLEARWATER_OTP_HPDET_GRADIENT_1X 0xFF00 /* HP_GRADIENT_1X - [15:8] */ +#define CLEARWATER_OTP_HPDET_GRADIENT_1X_MASK 0xFF00 /* HP_GRADIENT_1X - [15:8] */ +#define CLEARWATER_OTP_HPDET_GRADIENT_1X_SHIFT 16 /* HP_GRADIENT_1X - [15:8] */ +#define CLEARWATER_OTP_HPDET_GRADIENT_1X_WIDTH 8 /* HP_GRADIENT_1X - [15:8] */ +#define CLEARWATER_OTP_HPDET_GRADIENT_0X 0x00FF /* HP_GRADIENT_0X - [7:0] */ +#define CLEARWATER_OTP_HPDET_GRADIENT_0X_MASK 0x00FF /* HP_GRADIENT_0X - [7:0] */ +#define CLEARWATER_OTP_HPDET_GRADIENT_0X_SHIFT 0 /* HP_GRADIENT_0X - [7:0] */ +#define CLEARWATER_OTP_HPDET_GRADIENT_0X_WIDTH 8 /* HP_GRADIENT_0X - [7:0] */ + #endif From 8f33afd9cedce18a84675cce409661cfb89983c8 Mon Sep 17 00:00:00 2001 From: Mayuresh Kulkarni Date: Tue, 10 Feb 2015 13:53:29 +0000 Subject: [PATCH 0682/1167] ASoc: clearwater: add support for HP impedance tuning Change-Id: I7709a411a1d9004539ee9febda77ee318cff2052 Signed-off-by: Mayuresh Kulkarni --- drivers/switch/switch-arizona.c | 228 +++++++++++++++++++++++++------- 1 file changed, 179 insertions(+), 49 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index cc84f61a6fd..dd0d0bc771a 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -69,9 +69,21 @@ #define HP_LOW_IMPEDANCE_LIMIT 13 +static struct arizona_hpdet_calibration_data { + int min; + int max; + s64 C0; /* value * 1000000 */ + s64 C1; /* value * 10000 */ + s64 C2; /* not multiplied */ + s64 C3; /* value * 1000000 */ + s64 C4_x_C3; /* value * 1000000 */ + s64 C5; /* value * 1000000 */ + s64 dacval_adjust; +}; + struct arizona_hpdet_d_trims { - int off; - int grad_x2; + int off_x4; + int grad_x4; }; struct arizona_extcon_info { @@ -114,6 +126,8 @@ struct arizona_extcon_info { int hpdet_ip; const struct arizona_hpdet_d_trims *hpdet_d_trims; + const struct arizona_hpdet_calibration_data *calib_data; + int calib_data_size; struct switch_dev edev; @@ -561,47 +575,45 @@ static struct { { 1000, 10000 }, }; -static const struct { - int min; - int max; - s64 C0; /* value * 1000000 */ - s64 C1; /* value * 10000 */ - s64 C2; /* not multiplied */ - s64 C3; /* value * 1000000 */ - s64 C4_x_C3; /* value * 1000000 */ - s64 C5; /* value * 1000000 */ -} arizona_hpdet_d_ranges[] = { - { 0, 30, 1007000, -7200, 4003, 69300000, 381150, 250000}, - { 8, 100, 1007000, -7200, 7975, 69600000, 382800, 250000}, - { 100, 1000, 9696000, -79500, 7300, 62900000, 345950, 250000}, - { 1000, 10000, 100684000, -949400, 7300, 63200000, 347600, 250000}, +static const struct arizona_hpdet_calibration_data arizona_hpdet_d_ranges[] = { + { 0, 30, 1007000, -7200, 4003, 69300000, 381150, 250000, 1500000}, + { 8, 100, 1007000, -7200, 7975, 69600000, 382800, 250000, 1500000}, + { 100, 1000, 9696000, -79500, 7300, 62900000, 345950, 250000, 1500000}, + { 1000, 10000, 100684000, -949400, 7300, 63200000, 347600, 250000, 1500000}, +}; + +static const struct arizona_hpdet_calibration_data arizona_hpdet_clearwater_ranges[] = { + { 4, 30, 1007000, -7200, 4003, 69300000, 55, 250000, 500000}, + { 8, 100, 1007000, -7200, 7975, 69600000, 55, 250000, 500000}, + { 100, 1000, 9696000, -79500, 7300, 62900000, 55, 250000, 500000}, + { 1000, 10000, 100684000, -949400, 7300, 63200000, 55, 250000, 500000}, }; static int arizona_hpdet_d_calibrate(const struct arizona_extcon_info *info, int dacval, int range) { - int gradx2 = info->hpdet_d_trims[range].grad_x2; - int off = info->hpdet_d_trims[range].off; + int grad_x4 = info->hpdet_d_trims[range].grad_x4; + int off_x4 = info->hpdet_d_trims[range].off_x4; s64 val = dacval; s64 n; dev_warn(info->arizona->dev, "hpdet_d calib range %d dac %d\n", range, dacval); - val = (val * 1000000) + 1500000; - val = div64_s64(val, arizona_hpdet_d_ranges[range].C2); + val = (val * 1000000) + info->calib_data[range].dacval_adjust; + val = div64_s64(val, info->calib_data[range].C2); - n = div_s64(1000000000000, arizona_hpdet_d_ranges[range].C3 + - ((arizona_hpdet_d_ranges[range].C4_x_C3 * gradx2) / 2)); + n = div_s64(1000000000000, info->calib_data[range].C3 + + ((info->calib_data[range].C4_x_C3 * grad_x4) / 4)); n = val - n; if (n == 0) return ARIZONA_HPDET_MAX; - val = arizona_hpdet_d_ranges[range].C0 + - (arizona_hpdet_d_ranges[range].C1 * off); + val = info->calib_data[range].C0 + + ((info->calib_data[range].C1 * off_x4) / 4); val *= 1000000; val = div_s64(val, n); - val -= arizona_hpdet_d_ranges[range].C5; + val -= info->calib_data[range].C5; /* Round up */ val += 500000; @@ -620,6 +632,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) struct arizona *arizona = info->arizona; unsigned int val, range; int ret; + unsigned int val_down; ret = regmap_read(arizona->regmap, ARIZONA_HEADPHONE_DETECT_2, &val); if (ret != 0) { @@ -729,6 +742,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) break; case 3: + case 4: if (!(val & ARIZONA_HP_DONE_B)) { dev_err(arizona->dev, "HPDET did not complete: %x\n", val); @@ -740,16 +754,16 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) regmap_read(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, &range); - range = (range & ARIZONA_HP_IMPEDANCE_RANGE_MASK) - >> ARIZONA_HP_IMPEDANCE_RANGE_SHIFT; + range = (range & ARIZONA_HP_IMPEDANCE_RANGE_MASK) >> + ARIZONA_HP_IMPEDANCE_RANGE_SHIFT; /* Skip up a range, or report? */ - if (range < ARRAY_SIZE(arizona_hpdet_d_ranges) - 1 && - (val >= arizona_hpdet_d_ranges[range].max)) { + if (range < info->calib_data_size - 1 && + (val >= info->calib_data[range].max)) { range++; dev_dbg(arizona->dev, "Moving to HPDET range %d-%d\n", - arizona_hpdet_d_ranges[range].min, - arizona_hpdet_d_ranges[range].max); + info->calib_data[range].min, + info->calib_data[range].max); regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, ARIZONA_HP_IMPEDANCE_RANGE_MASK, @@ -766,9 +780,23 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) ret); return -EAGAIN; } - val = (val >> ARIZONA_HP_DACVAL_SHIFT) & ARIZONA_HP_DACVAL_MASK; + + if (info->hpdet_ip == 4) { + ret = regmap_read(arizona->regmap, + ARIZONA_HP_DACVAL, + &val_down); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read HP DACVAL value: %d\n", + ret); + return -EAGAIN; + } + val_down = (val_down >> ARIZONA_HP_DACVAL_DOWN_SHIFT) & + ARIZONA_HP_DACVAL_DOWN_MASK; + val = (val + val_down) / 2; + } val = arizona_hpdet_d_calibrate(info, val, range); + break; } @@ -2675,26 +2703,108 @@ static int arizona_hpdet_d_read_calibration(struct arizona_extcon_info *info) grad_range3_2 = (v2 >> 7) & 0x7f; grad_range3_2 = arizona_hp_trim_signify(grad_range3_2, 0x3f); - trims[0].off = coeff_range0 + off_range1; - trims[1].off = off_range1; - trims[2].off = coeff_range2 + off_range1; - trims[3].off = coeff_range3 + off_range1; - trims[0].grad_x2 = grad_range1_0 * 2; - trims[1].grad_x2 = grad_range1_0 * 2; - trims[2].grad_x2 = grad_range3_2 * 2; - trims[3].grad_x2 = grad_range3_2 * 2; + trims[0].off_x4 = (coeff_range0 + off_range1) * 4; + trims[1].off_x4 = off_range1 * 4; + trims[2].off_x4 = (coeff_range2 + off_range1) * 4; + trims[3].off_x4 = (coeff_range3 + off_range1) * 4; + trims[0].grad_x4 = grad_range1_0 * 4; + trims[1].grad_x4 = grad_range1_0 * 4; + trims[2].grad_x4 = grad_range3_2 * 4; + trims[3].grad_x4 = grad_range3_2 * 4; info->hpdet_d_trims = trims; + info->calib_data = arizona_hpdet_d_ranges; + info->calib_data_size = ARRAY_SIZE(arizona_hpdet_d_ranges); dev_dbg(arizona->dev, "Set trims %d,%d %d,%d %d,%d %d,%d\n", - trims[0].off, - trims[0].grad_x2, - trims[1].off, - trims[1].grad_x2, - trims[2].off, - trims[2].grad_x2, - trims[3].off, - trims[3].grad_x2); + trims[0].off_x4, + trims[0].grad_x4, + trims[1].off_x4, + trims[1].grad_x4, + trims[2].off_x4, + trims[2].grad_x4, + trims[3].off_x4, + trims[3].grad_x4); + return 0; +} + +#define ARIZONA_HPDET_CLEARWATER_OTP_MID_VAL 128 +static inline int arizona_hpdet_clearwater_convert_otp(unsigned int otp_val) +{ + return (ARIZONA_HPDET_CLEARWATER_OTP_MID_VAL - (int)otp_val); +} + +static int arizona_hpdet_clearwater_read_calibration(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + struct arizona_hpdet_d_trims *trims; + int ret = -EIO; + unsigned int offset, gradient, interim_val; + + ret = regmap_read(arizona->regmap_32bit, + CLEARWATER_OTP_HPDET_CALIB_1, + &offset); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read HP CALIB OFFSET value: %d\n", + ret); + return ret; + } + + ret = regmap_read(arizona->regmap_32bit, + CLEARWATER_OTP_HPDET_CALIB_2, + &gradient); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read HP CALIB OFFSET value: %d\n", + ret); + return ret; + } + + if (((offset == 0) && (gradient == 0)) || + ((offset == 0xFFFFFFFF) && (gradient == 0xFFFFFFFF))) { + dev_warn(arizona->dev, "No HP trims\n"); + return 0; + } + + trims = devm_kzalloc(info->dev, + 4 * sizeof(struct arizona_hpdet_d_trims), + GFP_KERNEL); + if (!trims) { + dev_err(arizona->dev, "Failed to alloc hpdet trims\n"); + return -ENOMEM; + } + + interim_val = (offset & CLEARWATER_OTP_HPDET_CALIB_OFFSET_00_MASK) >> + CLEARWATER_OTP_HPDET_CALIB_OFFSET_00_SHIFT; + trims[0].off_x4 = arizona_hpdet_clearwater_convert_otp(interim_val); + + interim_val = (gradient & CLEARWATER_OTP_HPDET_GRADIENT_0X_MASK) >> + CLEARWATER_OTP_HPDET_GRADIENT_0X_SHIFT; + trims[0].grad_x4 = arizona_hpdet_clearwater_convert_otp(interim_val); + + interim_val = (offset & CLEARWATER_OTP_HPDET_CALIB_OFFSET_01_MASK) >> + CLEARWATER_OTP_HPDET_CALIB_OFFSET_01_SHIFT; + trims[1].off_x4 = arizona_hpdet_clearwater_convert_otp(interim_val); + + trims[1].grad_x4 = trims[0].grad_x4; + + interim_val = (offset & CLEARWATER_OTP_HPDET_CALIB_OFFSET_10_MASK) >> + CLEARWATER_OTP_HPDET_CALIB_OFFSET_10_SHIFT; + trims[2].off_x4 = arizona_hpdet_clearwater_convert_otp(interim_val); + + interim_val = (gradient & CLEARWATER_OTP_HPDET_GRADIENT_1X_MASK) >> + CLEARWATER_OTP_HPDET_GRADIENT_1X_SHIFT; + trims[2].grad_x4 = arizona_hpdet_clearwater_convert_otp(interim_val); + + interim_val = (offset & CLEARWATER_OTP_HPDET_CALIB_OFFSET_11_MASK) >> + CLEARWATER_OTP_HPDET_CALIB_OFFSET_11_SHIFT; + trims[3].off_x4 = arizona_hpdet_clearwater_convert_otp(interim_val); + + trims[3].grad_x4 = trims[2].grad_x4; + + info->hpdet_d_trims = trims; + info->calib_data = arizona_hpdet_clearwater_ranges; + info->calib_data_size = ARRAY_SIZE(arizona_hpdet_clearwater_ranges); + return 0; } @@ -2873,6 +2983,11 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; } break; + case WM8285: + case WM1840: + info->micd_clamp = true; + info->hpdet_ip = 4; + break; default: info->micd_clamp = true; info->hpdet_ip = 2; @@ -3048,10 +3163,25 @@ static int arizona_extcon_probe(struct platform_device *pdev) pm_runtime_idle(&pdev->dev); pm_runtime_get_sync(&pdev->dev); - if (info->hpdet_ip == 3) { + switch (info->hpdet_ip) { + case 3: arizona_hpdet_d_read_calibration(info); if (!info->hpdet_d_trims) info->hpdet_ip = 2; + break; + case 4: + arizona_hpdet_clearwater_read_calibration(info); + if (!info->hpdet_d_trims) + info->hpdet_ip = 2; + else + /* as per the hardware steps - below bit needs to be set + * for clearwater for accurate HP impedance detection */ + regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_POLARITY_INV_ENA_MASK, + 1 << ARIZONA_ACCDET_POLARITY_INV_ENA_SHIFT); + break; + default: + break; } if (arizona->pdata.jd_gpio5) { From 150ab8857c617d9af56d3b27887ecac4af269b39 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 3 Mar 2015 15:34:02 +0000 Subject: [PATCH 0683/1167] Revert "ASoc: clearwater: add support for HP impedance tuning" This reverts commit 8f33afd9cedce18a84675cce409661cfb89983c8. Change-Id: Ie827c49b7f6262184318477f1188440283b7de5a Signed-off-by: Richard Fitzgerald --- drivers/switch/switch-arizona.c | 228 +++++++------------------------- 1 file changed, 49 insertions(+), 179 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index dd0d0bc771a..cc84f61a6fd 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -69,21 +69,9 @@ #define HP_LOW_IMPEDANCE_LIMIT 13 -static struct arizona_hpdet_calibration_data { - int min; - int max; - s64 C0; /* value * 1000000 */ - s64 C1; /* value * 10000 */ - s64 C2; /* not multiplied */ - s64 C3; /* value * 1000000 */ - s64 C4_x_C3; /* value * 1000000 */ - s64 C5; /* value * 1000000 */ - s64 dacval_adjust; -}; - struct arizona_hpdet_d_trims { - int off_x4; - int grad_x4; + int off; + int grad_x2; }; struct arizona_extcon_info { @@ -126,8 +114,6 @@ struct arizona_extcon_info { int hpdet_ip; const struct arizona_hpdet_d_trims *hpdet_d_trims; - const struct arizona_hpdet_calibration_data *calib_data; - int calib_data_size; struct switch_dev edev; @@ -575,45 +561,47 @@ static struct { { 1000, 10000 }, }; -static const struct arizona_hpdet_calibration_data arizona_hpdet_d_ranges[] = { - { 0, 30, 1007000, -7200, 4003, 69300000, 381150, 250000, 1500000}, - { 8, 100, 1007000, -7200, 7975, 69600000, 382800, 250000, 1500000}, - { 100, 1000, 9696000, -79500, 7300, 62900000, 345950, 250000, 1500000}, - { 1000, 10000, 100684000, -949400, 7300, 63200000, 347600, 250000, 1500000}, -}; - -static const struct arizona_hpdet_calibration_data arizona_hpdet_clearwater_ranges[] = { - { 4, 30, 1007000, -7200, 4003, 69300000, 55, 250000, 500000}, - { 8, 100, 1007000, -7200, 7975, 69600000, 55, 250000, 500000}, - { 100, 1000, 9696000, -79500, 7300, 62900000, 55, 250000, 500000}, - { 1000, 10000, 100684000, -949400, 7300, 63200000, 55, 250000, 500000}, +static const struct { + int min; + int max; + s64 C0; /* value * 1000000 */ + s64 C1; /* value * 10000 */ + s64 C2; /* not multiplied */ + s64 C3; /* value * 1000000 */ + s64 C4_x_C3; /* value * 1000000 */ + s64 C5; /* value * 1000000 */ +} arizona_hpdet_d_ranges[] = { + { 0, 30, 1007000, -7200, 4003, 69300000, 381150, 250000}, + { 8, 100, 1007000, -7200, 7975, 69600000, 382800, 250000}, + { 100, 1000, 9696000, -79500, 7300, 62900000, 345950, 250000}, + { 1000, 10000, 100684000, -949400, 7300, 63200000, 347600, 250000}, }; static int arizona_hpdet_d_calibrate(const struct arizona_extcon_info *info, int dacval, int range) { - int grad_x4 = info->hpdet_d_trims[range].grad_x4; - int off_x4 = info->hpdet_d_trims[range].off_x4; + int gradx2 = info->hpdet_d_trims[range].grad_x2; + int off = info->hpdet_d_trims[range].off; s64 val = dacval; s64 n; dev_warn(info->arizona->dev, "hpdet_d calib range %d dac %d\n", range, dacval); - val = (val * 1000000) + info->calib_data[range].dacval_adjust; - val = div64_s64(val, info->calib_data[range].C2); + val = (val * 1000000) + 1500000; + val = div64_s64(val, arizona_hpdet_d_ranges[range].C2); - n = div_s64(1000000000000, info->calib_data[range].C3 + - ((info->calib_data[range].C4_x_C3 * grad_x4) / 4)); + n = div_s64(1000000000000, arizona_hpdet_d_ranges[range].C3 + + ((arizona_hpdet_d_ranges[range].C4_x_C3 * gradx2) / 2)); n = val - n; if (n == 0) return ARIZONA_HPDET_MAX; - val = info->calib_data[range].C0 + - ((info->calib_data[range].C1 * off_x4) / 4); + val = arizona_hpdet_d_ranges[range].C0 + + (arizona_hpdet_d_ranges[range].C1 * off); val *= 1000000; val = div_s64(val, n); - val -= info->calib_data[range].C5; + val -= arizona_hpdet_d_ranges[range].C5; /* Round up */ val += 500000; @@ -632,7 +620,6 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) struct arizona *arizona = info->arizona; unsigned int val, range; int ret; - unsigned int val_down; ret = regmap_read(arizona->regmap, ARIZONA_HEADPHONE_DETECT_2, &val); if (ret != 0) { @@ -742,7 +729,6 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) break; case 3: - case 4: if (!(val & ARIZONA_HP_DONE_B)) { dev_err(arizona->dev, "HPDET did not complete: %x\n", val); @@ -754,16 +740,16 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) regmap_read(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, &range); - range = (range & ARIZONA_HP_IMPEDANCE_RANGE_MASK) >> - ARIZONA_HP_IMPEDANCE_RANGE_SHIFT; + range = (range & ARIZONA_HP_IMPEDANCE_RANGE_MASK) + >> ARIZONA_HP_IMPEDANCE_RANGE_SHIFT; /* Skip up a range, or report? */ - if (range < info->calib_data_size - 1 && - (val >= info->calib_data[range].max)) { + if (range < ARRAY_SIZE(arizona_hpdet_d_ranges) - 1 && + (val >= arizona_hpdet_d_ranges[range].max)) { range++; dev_dbg(arizona->dev, "Moving to HPDET range %d-%d\n", - info->calib_data[range].min, - info->calib_data[range].max); + arizona_hpdet_d_ranges[range].min, + arizona_hpdet_d_ranges[range].max); regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, ARIZONA_HP_IMPEDANCE_RANGE_MASK, @@ -780,23 +766,9 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) ret); return -EAGAIN; } - val = (val >> ARIZONA_HP_DACVAL_SHIFT) & ARIZONA_HP_DACVAL_MASK; - if (info->hpdet_ip == 4) { - ret = regmap_read(arizona->regmap, - ARIZONA_HP_DACVAL, - &val_down); - if (ret != 0) { - dev_err(arizona->dev, "Failed to read HP DACVAL value: %d\n", - ret); - return -EAGAIN; - } - val_down = (val_down >> ARIZONA_HP_DACVAL_DOWN_SHIFT) & - ARIZONA_HP_DACVAL_DOWN_MASK; - val = (val + val_down) / 2; - } + val = (val >> ARIZONA_HP_DACVAL_SHIFT) & ARIZONA_HP_DACVAL_MASK; val = arizona_hpdet_d_calibrate(info, val, range); - break; } @@ -2703,108 +2675,26 @@ static int arizona_hpdet_d_read_calibration(struct arizona_extcon_info *info) grad_range3_2 = (v2 >> 7) & 0x7f; grad_range3_2 = arizona_hp_trim_signify(grad_range3_2, 0x3f); - trims[0].off_x4 = (coeff_range0 + off_range1) * 4; - trims[1].off_x4 = off_range1 * 4; - trims[2].off_x4 = (coeff_range2 + off_range1) * 4; - trims[3].off_x4 = (coeff_range3 + off_range1) * 4; - trims[0].grad_x4 = grad_range1_0 * 4; - trims[1].grad_x4 = grad_range1_0 * 4; - trims[2].grad_x4 = grad_range3_2 * 4; - trims[3].grad_x4 = grad_range3_2 * 4; + trims[0].off = coeff_range0 + off_range1; + trims[1].off = off_range1; + trims[2].off = coeff_range2 + off_range1; + trims[3].off = coeff_range3 + off_range1; + trims[0].grad_x2 = grad_range1_0 * 2; + trims[1].grad_x2 = grad_range1_0 * 2; + trims[2].grad_x2 = grad_range3_2 * 2; + trims[3].grad_x2 = grad_range3_2 * 2; info->hpdet_d_trims = trims; - info->calib_data = arizona_hpdet_d_ranges; - info->calib_data_size = ARRAY_SIZE(arizona_hpdet_d_ranges); dev_dbg(arizona->dev, "Set trims %d,%d %d,%d %d,%d %d,%d\n", - trims[0].off_x4, - trims[0].grad_x4, - trims[1].off_x4, - trims[1].grad_x4, - trims[2].off_x4, - trims[2].grad_x4, - trims[3].off_x4, - trims[3].grad_x4); - return 0; -} - -#define ARIZONA_HPDET_CLEARWATER_OTP_MID_VAL 128 -static inline int arizona_hpdet_clearwater_convert_otp(unsigned int otp_val) -{ - return (ARIZONA_HPDET_CLEARWATER_OTP_MID_VAL - (int)otp_val); -} - -static int arizona_hpdet_clearwater_read_calibration(struct arizona_extcon_info *info) -{ - struct arizona *arizona = info->arizona; - struct arizona_hpdet_d_trims *trims; - int ret = -EIO; - unsigned int offset, gradient, interim_val; - - ret = regmap_read(arizona->regmap_32bit, - CLEARWATER_OTP_HPDET_CALIB_1, - &offset); - if (ret != 0) { - dev_err(arizona->dev, "Failed to read HP CALIB OFFSET value: %d\n", - ret); - return ret; - } - - ret = regmap_read(arizona->regmap_32bit, - CLEARWATER_OTP_HPDET_CALIB_2, - &gradient); - if (ret != 0) { - dev_err(arizona->dev, "Failed to read HP CALIB OFFSET value: %d\n", - ret); - return ret; - } - - if (((offset == 0) && (gradient == 0)) || - ((offset == 0xFFFFFFFF) && (gradient == 0xFFFFFFFF))) { - dev_warn(arizona->dev, "No HP trims\n"); - return 0; - } - - trims = devm_kzalloc(info->dev, - 4 * sizeof(struct arizona_hpdet_d_trims), - GFP_KERNEL); - if (!trims) { - dev_err(arizona->dev, "Failed to alloc hpdet trims\n"); - return -ENOMEM; - } - - interim_val = (offset & CLEARWATER_OTP_HPDET_CALIB_OFFSET_00_MASK) >> - CLEARWATER_OTP_HPDET_CALIB_OFFSET_00_SHIFT; - trims[0].off_x4 = arizona_hpdet_clearwater_convert_otp(interim_val); - - interim_val = (gradient & CLEARWATER_OTP_HPDET_GRADIENT_0X_MASK) >> - CLEARWATER_OTP_HPDET_GRADIENT_0X_SHIFT; - trims[0].grad_x4 = arizona_hpdet_clearwater_convert_otp(interim_val); - - interim_val = (offset & CLEARWATER_OTP_HPDET_CALIB_OFFSET_01_MASK) >> - CLEARWATER_OTP_HPDET_CALIB_OFFSET_01_SHIFT; - trims[1].off_x4 = arizona_hpdet_clearwater_convert_otp(interim_val); - - trims[1].grad_x4 = trims[0].grad_x4; - - interim_val = (offset & CLEARWATER_OTP_HPDET_CALIB_OFFSET_10_MASK) >> - CLEARWATER_OTP_HPDET_CALIB_OFFSET_10_SHIFT; - trims[2].off_x4 = arizona_hpdet_clearwater_convert_otp(interim_val); - - interim_val = (gradient & CLEARWATER_OTP_HPDET_GRADIENT_1X_MASK) >> - CLEARWATER_OTP_HPDET_GRADIENT_1X_SHIFT; - trims[2].grad_x4 = arizona_hpdet_clearwater_convert_otp(interim_val); - - interim_val = (offset & CLEARWATER_OTP_HPDET_CALIB_OFFSET_11_MASK) >> - CLEARWATER_OTP_HPDET_CALIB_OFFSET_11_SHIFT; - trims[3].off_x4 = arizona_hpdet_clearwater_convert_otp(interim_val); - - trims[3].grad_x4 = trims[2].grad_x4; - - info->hpdet_d_trims = trims; - info->calib_data = arizona_hpdet_clearwater_ranges; - info->calib_data_size = ARRAY_SIZE(arizona_hpdet_clearwater_ranges); - + trims[0].off, + trims[0].grad_x2, + trims[1].off, + trims[1].grad_x2, + trims[2].off, + trims[2].grad_x2, + trims[3].off, + trims[3].grad_x2); return 0; } @@ -2983,11 +2873,6 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; } break; - case WM8285: - case WM1840: - info->micd_clamp = true; - info->hpdet_ip = 4; - break; default: info->micd_clamp = true; info->hpdet_ip = 2; @@ -3163,25 +3048,10 @@ static int arizona_extcon_probe(struct platform_device *pdev) pm_runtime_idle(&pdev->dev); pm_runtime_get_sync(&pdev->dev); - switch (info->hpdet_ip) { - case 3: + if (info->hpdet_ip == 3) { arizona_hpdet_d_read_calibration(info); if (!info->hpdet_d_trims) info->hpdet_ip = 2; - break; - case 4: - arizona_hpdet_clearwater_read_calibration(info); - if (!info->hpdet_d_trims) - info->hpdet_ip = 2; - else - /* as per the hardware steps - below bit needs to be set - * for clearwater for accurate HP impedance detection */ - regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, - ARIZONA_ACCDET_POLARITY_INV_ENA_MASK, - 1 << ARIZONA_ACCDET_POLARITY_INV_ENA_SHIFT); - break; - default: - break; } if (arizona->pdata.jd_gpio5) { From 9a98b1134c773d340aa1b17796fa935513243a4a Mon Sep 17 00:00:00 2001 From: Mayuresh Kulkarni Date: Tue, 10 Feb 2015 13:53:29 +0000 Subject: [PATCH 0684/1167] switch: clearwater: add support for HP impedance tuning Change-Id: I047351cf0c70ffb7c5013956540f5fb564e57301 Signed-off-by: Mayuresh Kulkarni --- drivers/switch/switch-arizona.c | 228 +++++++++++++++++++++++++------- 1 file changed, 179 insertions(+), 49 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index cc84f61a6fd..dd0d0bc771a 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -69,9 +69,21 @@ #define HP_LOW_IMPEDANCE_LIMIT 13 +static struct arizona_hpdet_calibration_data { + int min; + int max; + s64 C0; /* value * 1000000 */ + s64 C1; /* value * 10000 */ + s64 C2; /* not multiplied */ + s64 C3; /* value * 1000000 */ + s64 C4_x_C3; /* value * 1000000 */ + s64 C5; /* value * 1000000 */ + s64 dacval_adjust; +}; + struct arizona_hpdet_d_trims { - int off; - int grad_x2; + int off_x4; + int grad_x4; }; struct arizona_extcon_info { @@ -114,6 +126,8 @@ struct arizona_extcon_info { int hpdet_ip; const struct arizona_hpdet_d_trims *hpdet_d_trims; + const struct arizona_hpdet_calibration_data *calib_data; + int calib_data_size; struct switch_dev edev; @@ -561,47 +575,45 @@ static struct { { 1000, 10000 }, }; -static const struct { - int min; - int max; - s64 C0; /* value * 1000000 */ - s64 C1; /* value * 10000 */ - s64 C2; /* not multiplied */ - s64 C3; /* value * 1000000 */ - s64 C4_x_C3; /* value * 1000000 */ - s64 C5; /* value * 1000000 */ -} arizona_hpdet_d_ranges[] = { - { 0, 30, 1007000, -7200, 4003, 69300000, 381150, 250000}, - { 8, 100, 1007000, -7200, 7975, 69600000, 382800, 250000}, - { 100, 1000, 9696000, -79500, 7300, 62900000, 345950, 250000}, - { 1000, 10000, 100684000, -949400, 7300, 63200000, 347600, 250000}, +static const struct arizona_hpdet_calibration_data arizona_hpdet_d_ranges[] = { + { 0, 30, 1007000, -7200, 4003, 69300000, 381150, 250000, 1500000}, + { 8, 100, 1007000, -7200, 7975, 69600000, 382800, 250000, 1500000}, + { 100, 1000, 9696000, -79500, 7300, 62900000, 345950, 250000, 1500000}, + { 1000, 10000, 100684000, -949400, 7300, 63200000, 347600, 250000, 1500000}, +}; + +static const struct arizona_hpdet_calibration_data arizona_hpdet_clearwater_ranges[] = { + { 4, 30, 1007000, -7200, 4003, 69300000, 55, 250000, 500000}, + { 8, 100, 1007000, -7200, 7975, 69600000, 55, 250000, 500000}, + { 100, 1000, 9696000, -79500, 7300, 62900000, 55, 250000, 500000}, + { 1000, 10000, 100684000, -949400, 7300, 63200000, 55, 250000, 500000}, }; static int arizona_hpdet_d_calibrate(const struct arizona_extcon_info *info, int dacval, int range) { - int gradx2 = info->hpdet_d_trims[range].grad_x2; - int off = info->hpdet_d_trims[range].off; + int grad_x4 = info->hpdet_d_trims[range].grad_x4; + int off_x4 = info->hpdet_d_trims[range].off_x4; s64 val = dacval; s64 n; dev_warn(info->arizona->dev, "hpdet_d calib range %d dac %d\n", range, dacval); - val = (val * 1000000) + 1500000; - val = div64_s64(val, arizona_hpdet_d_ranges[range].C2); + val = (val * 1000000) + info->calib_data[range].dacval_adjust; + val = div64_s64(val, info->calib_data[range].C2); - n = div_s64(1000000000000, arizona_hpdet_d_ranges[range].C3 + - ((arizona_hpdet_d_ranges[range].C4_x_C3 * gradx2) / 2)); + n = div_s64(1000000000000, info->calib_data[range].C3 + + ((info->calib_data[range].C4_x_C3 * grad_x4) / 4)); n = val - n; if (n == 0) return ARIZONA_HPDET_MAX; - val = arizona_hpdet_d_ranges[range].C0 + - (arizona_hpdet_d_ranges[range].C1 * off); + val = info->calib_data[range].C0 + + ((info->calib_data[range].C1 * off_x4) / 4); val *= 1000000; val = div_s64(val, n); - val -= arizona_hpdet_d_ranges[range].C5; + val -= info->calib_data[range].C5; /* Round up */ val += 500000; @@ -620,6 +632,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) struct arizona *arizona = info->arizona; unsigned int val, range; int ret; + unsigned int val_down; ret = regmap_read(arizona->regmap, ARIZONA_HEADPHONE_DETECT_2, &val); if (ret != 0) { @@ -729,6 +742,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) break; case 3: + case 4: if (!(val & ARIZONA_HP_DONE_B)) { dev_err(arizona->dev, "HPDET did not complete: %x\n", val); @@ -740,16 +754,16 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) regmap_read(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, &range); - range = (range & ARIZONA_HP_IMPEDANCE_RANGE_MASK) - >> ARIZONA_HP_IMPEDANCE_RANGE_SHIFT; + range = (range & ARIZONA_HP_IMPEDANCE_RANGE_MASK) >> + ARIZONA_HP_IMPEDANCE_RANGE_SHIFT; /* Skip up a range, or report? */ - if (range < ARRAY_SIZE(arizona_hpdet_d_ranges) - 1 && - (val >= arizona_hpdet_d_ranges[range].max)) { + if (range < info->calib_data_size - 1 && + (val >= info->calib_data[range].max)) { range++; dev_dbg(arizona->dev, "Moving to HPDET range %d-%d\n", - arizona_hpdet_d_ranges[range].min, - arizona_hpdet_d_ranges[range].max); + info->calib_data[range].min, + info->calib_data[range].max); regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, ARIZONA_HP_IMPEDANCE_RANGE_MASK, @@ -766,9 +780,23 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) ret); return -EAGAIN; } - val = (val >> ARIZONA_HP_DACVAL_SHIFT) & ARIZONA_HP_DACVAL_MASK; + + if (info->hpdet_ip == 4) { + ret = regmap_read(arizona->regmap, + ARIZONA_HP_DACVAL, + &val_down); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read HP DACVAL value: %d\n", + ret); + return -EAGAIN; + } + val_down = (val_down >> ARIZONA_HP_DACVAL_DOWN_SHIFT) & + ARIZONA_HP_DACVAL_DOWN_MASK; + val = (val + val_down) / 2; + } val = arizona_hpdet_d_calibrate(info, val, range); + break; } @@ -2675,26 +2703,108 @@ static int arizona_hpdet_d_read_calibration(struct arizona_extcon_info *info) grad_range3_2 = (v2 >> 7) & 0x7f; grad_range3_2 = arizona_hp_trim_signify(grad_range3_2, 0x3f); - trims[0].off = coeff_range0 + off_range1; - trims[1].off = off_range1; - trims[2].off = coeff_range2 + off_range1; - trims[3].off = coeff_range3 + off_range1; - trims[0].grad_x2 = grad_range1_0 * 2; - trims[1].grad_x2 = grad_range1_0 * 2; - trims[2].grad_x2 = grad_range3_2 * 2; - trims[3].grad_x2 = grad_range3_2 * 2; + trims[0].off_x4 = (coeff_range0 + off_range1) * 4; + trims[1].off_x4 = off_range1 * 4; + trims[2].off_x4 = (coeff_range2 + off_range1) * 4; + trims[3].off_x4 = (coeff_range3 + off_range1) * 4; + trims[0].grad_x4 = grad_range1_0 * 4; + trims[1].grad_x4 = grad_range1_0 * 4; + trims[2].grad_x4 = grad_range3_2 * 4; + trims[3].grad_x4 = grad_range3_2 * 4; info->hpdet_d_trims = trims; + info->calib_data = arizona_hpdet_d_ranges; + info->calib_data_size = ARRAY_SIZE(arizona_hpdet_d_ranges); dev_dbg(arizona->dev, "Set trims %d,%d %d,%d %d,%d %d,%d\n", - trims[0].off, - trims[0].grad_x2, - trims[1].off, - trims[1].grad_x2, - trims[2].off, - trims[2].grad_x2, - trims[3].off, - trims[3].grad_x2); + trims[0].off_x4, + trims[0].grad_x4, + trims[1].off_x4, + trims[1].grad_x4, + trims[2].off_x4, + trims[2].grad_x4, + trims[3].off_x4, + trims[3].grad_x4); + return 0; +} + +#define ARIZONA_HPDET_CLEARWATER_OTP_MID_VAL 128 +static inline int arizona_hpdet_clearwater_convert_otp(unsigned int otp_val) +{ + return (ARIZONA_HPDET_CLEARWATER_OTP_MID_VAL - (int)otp_val); +} + +static int arizona_hpdet_clearwater_read_calibration(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + struct arizona_hpdet_d_trims *trims; + int ret = -EIO; + unsigned int offset, gradient, interim_val; + + ret = regmap_read(arizona->regmap_32bit, + CLEARWATER_OTP_HPDET_CALIB_1, + &offset); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read HP CALIB OFFSET value: %d\n", + ret); + return ret; + } + + ret = regmap_read(arizona->regmap_32bit, + CLEARWATER_OTP_HPDET_CALIB_2, + &gradient); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read HP CALIB OFFSET value: %d\n", + ret); + return ret; + } + + if (((offset == 0) && (gradient == 0)) || + ((offset == 0xFFFFFFFF) && (gradient == 0xFFFFFFFF))) { + dev_warn(arizona->dev, "No HP trims\n"); + return 0; + } + + trims = devm_kzalloc(info->dev, + 4 * sizeof(struct arizona_hpdet_d_trims), + GFP_KERNEL); + if (!trims) { + dev_err(arizona->dev, "Failed to alloc hpdet trims\n"); + return -ENOMEM; + } + + interim_val = (offset & CLEARWATER_OTP_HPDET_CALIB_OFFSET_00_MASK) >> + CLEARWATER_OTP_HPDET_CALIB_OFFSET_00_SHIFT; + trims[0].off_x4 = arizona_hpdet_clearwater_convert_otp(interim_val); + + interim_val = (gradient & CLEARWATER_OTP_HPDET_GRADIENT_0X_MASK) >> + CLEARWATER_OTP_HPDET_GRADIENT_0X_SHIFT; + trims[0].grad_x4 = arizona_hpdet_clearwater_convert_otp(interim_val); + + interim_val = (offset & CLEARWATER_OTP_HPDET_CALIB_OFFSET_01_MASK) >> + CLEARWATER_OTP_HPDET_CALIB_OFFSET_01_SHIFT; + trims[1].off_x4 = arizona_hpdet_clearwater_convert_otp(interim_val); + + trims[1].grad_x4 = trims[0].grad_x4; + + interim_val = (offset & CLEARWATER_OTP_HPDET_CALIB_OFFSET_10_MASK) >> + CLEARWATER_OTP_HPDET_CALIB_OFFSET_10_SHIFT; + trims[2].off_x4 = arizona_hpdet_clearwater_convert_otp(interim_val); + + interim_val = (gradient & CLEARWATER_OTP_HPDET_GRADIENT_1X_MASK) >> + CLEARWATER_OTP_HPDET_GRADIENT_1X_SHIFT; + trims[2].grad_x4 = arizona_hpdet_clearwater_convert_otp(interim_val); + + interim_val = (offset & CLEARWATER_OTP_HPDET_CALIB_OFFSET_11_MASK) >> + CLEARWATER_OTP_HPDET_CALIB_OFFSET_11_SHIFT; + trims[3].off_x4 = arizona_hpdet_clearwater_convert_otp(interim_val); + + trims[3].grad_x4 = trims[2].grad_x4; + + info->hpdet_d_trims = trims; + info->calib_data = arizona_hpdet_clearwater_ranges; + info->calib_data_size = ARRAY_SIZE(arizona_hpdet_clearwater_ranges); + return 0; } @@ -2873,6 +2983,11 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; } break; + case WM8285: + case WM1840: + info->micd_clamp = true; + info->hpdet_ip = 4; + break; default: info->micd_clamp = true; info->hpdet_ip = 2; @@ -3048,10 +3163,25 @@ static int arizona_extcon_probe(struct platform_device *pdev) pm_runtime_idle(&pdev->dev); pm_runtime_get_sync(&pdev->dev); - if (info->hpdet_ip == 3) { + switch (info->hpdet_ip) { + case 3: arizona_hpdet_d_read_calibration(info); if (!info->hpdet_d_trims) info->hpdet_ip = 2; + break; + case 4: + arizona_hpdet_clearwater_read_calibration(info); + if (!info->hpdet_d_trims) + info->hpdet_ip = 2; + else + /* as per the hardware steps - below bit needs to be set + * for clearwater for accurate HP impedance detection */ + regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_POLARITY_INV_ENA_MASK, + 1 << ARIZONA_ACCDET_POLARITY_INV_ENA_SHIFT); + break; + default: + break; } if (arizona->pdata.jd_gpio5) { From 8a60eb8a54a755dd6e2947af1384e8a936af7d37 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 12 Aug 2014 14:51:22 +0100 Subject: [PATCH 0685/1167] mfd: arizona: Avoid use of legacy IRQ mapping regmap_add_irq_chip is called from arizona_irq_init with the irq_base specified as -1 and regmap_add_irq_chip uses if (irq_base) to check if it should use legacy IRQ mapping. As such the irq mappings are currently added with irq_domain_add_legacy, rather than irq_domain_add_linear. This is clearly a typo as there is no reason why this driver can't use irq_domain_add_linear. This patch corrects this by passing the irq_base as zero to regmap_add_irq_chip. Signed-off-by: Charles Keepax Signed-off-by: Lee Jones (cherry picked from commit 2a3377ee2d8ca15ba21caf1d420cfeaf3ba4390a) Change-Id: I3a8f4d1bb3b3ef288d6734b3d8a2639e149ada4c Signed-off-by: Charles Keepax --- drivers/mfd/arizona-irq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index efc55e500d4..5d665341520 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -333,7 +333,7 @@ int arizona_irq_init(struct arizona *arizona) if (aod) { ret = regmap_add_irq_chip(arizona->regmap, irq_create_mapping(arizona->virq, 0), - IRQF_ONESHOT, -1, aod, + IRQF_ONESHOT, 0, aod, &arizona->aod_irq_chip); if (ret != 0) { dev_err(arizona->dev, "Failed to add AOD IRQs: %d\n", @@ -345,7 +345,7 @@ int arizona_irq_init(struct arizona *arizona) if (irq) { ret = regmap_add_irq_chip(arizona->regmap, irq_create_mapping(arizona->virq, 1), - IRQF_ONESHOT, -1, irq, + IRQF_ONESHOT, 0, irq, &arizona->irq_chip); if (ret != 0) { dev_err(arizona->dev, "Failed to add main IRQs: %d\n", ret); From d862d75e08da25df9106a9c6739a000f6cbe3ec9 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 1 Sep 2014 15:29:11 +0100 Subject: [PATCH 0686/1167] mfd: arizona: Propagate irq_wake through to parent IRQ If one of the internal Arizona IRQs is set as a wake source this needs to be propogated back to the actual IRQ line that the Arizona device is attached to. Signed-off-by: Charles Keepax Signed-off-by: Lee Jones (cherry pick from commit c38715fed8f51a8fba4a15f86732ad885f073d78) Change-Id: Ibb3e8c6760e756f9833242a9518036590ed90a65 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-irq.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index 5d665341520..89f6f65c43f 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -159,6 +159,13 @@ static void arizona_irq_dummy(struct irq_data *data) { } +static int arizona_irq_set_wake(struct irq_data *data, unsigned int on) +{ + struct arizona *arizona = irq_data_get_irq_chip_data(data); + + return irq_set_irq_wake(arizona->irq, on); +} + static struct irq_chip arizona_irq_chip = { .name = "arizona", .irq_disable = arizona_irq_dummy, @@ -166,6 +173,7 @@ static struct irq_chip arizona_irq_chip = { .irq_ack = arizona_irq_dummy, .irq_mask = arizona_irq_dummy, .irq_unmask = arizona_irq_dummy, + .irq_set_wake = arizona_irq_set_wake, }; static int arizona_irq_map(struct irq_domain *h, unsigned int virq, From dd1bc57675df8f5eb78696595abf5951134d15b8 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 25 Feb 2015 15:37:13 +0000 Subject: [PATCH 0687/1167] mfd: arizona: Move useful defines into a dt-binding include Move parts of linux/mfd/arizona/pdata.h and gpio.h into a new file in the dt-binding directory for use by device tree bindings. This also makes gpio.h redundant so remove it in the process. Signed-off-by: Charles Keepax Acked-by: Mark Brown Acked-by: Rob Herring Signed-off-by: Lee Jones (cherry picked from commit 49010336290f4e3e4249c43bff1a1ff065c8f94e) Change-Id: Ib843a7ac27539eb14b409be9483d5bff21825472 Signed-off-by: Charles Keepax --- .../devicetree/bindings/mfd/arizona.txt | 19 +++--- .../gpio.h => dt-bindings/mfd/arizona.h} | 67 +++++++++---------- include/linux/mfd/arizona/pdata.h | 22 +----- sound/soc/codecs/arizona.c | 1 - 4 files changed, 44 insertions(+), 65 deletions(-) rename include/{linux/mfd/arizona/gpio.h => dt-bindings/mfd/arizona.h} (54%) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index abe0781c31b..8c86c73fcab 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -95,10 +95,11 @@ Optional properties: - wlf,micbias3 : See wlf,micbias1 - wlf,micbias4 : See wlf,micbias1 - - wlf,gpio-defaults : A list of GPIO configuration register values. If - absent, no configuration of these registers is performed. If any - entry has a value that is out of range for a 16 bit register then - the chip default will be used. + - wlf,gpio-defaults : A list of GPIO configuration register values. Defines + for the appropriate values can found in . If + absent, no configuration of these registers is performed. If any entry has + a value that is out of range for a 16 bit register then the chip default + will be used. - wlf,max-channels-clocked : The maximum number of channels to be clocked on each AIF, useful for I2S systems with multiple data lines being mastered. @@ -184,11 +185,11 @@ codec: wm5102@1a { wlf,gpsw = <0x3>; wlf,gpio-defaults = < - 0x00000000 /* AIF1TXLRCLK */ - 0xffffffff - 0xffffffff - 0xffffffff - 0xffffffff + ARIZONA_GP_FN_TXLRCLK + ARIZONA_GP_DEFAULT + ARIZONA_GP_DEFAULT + ARIZONA_GP_DEFAULT + ARIZONA_GP_DEFAULT >; wlf,max-channels-clocked = <2 0 0>; diff --git a/include/linux/mfd/arizona/gpio.h b/include/dt-bindings/mfd/arizona.h similarity index 54% rename from include/linux/mfd/arizona/gpio.h rename to include/dt-bindings/mfd/arizona.h index d2146bb74f8..c7af7c7ef79 100644 --- a/include/linux/mfd/arizona/gpio.h +++ b/include/dt-bindings/mfd/arizona.h @@ -1,7 +1,7 @@ /* - * GPIO configuration for Arizona devices + * Device Tree defines for Arizona devices * - * Copyright 2013 Wolfson Microelectronics. PLC. + * Copyright 2015 Cirrus Logic Inc. * * Author: Charles Keepax * @@ -10,9 +10,10 @@ * published by the Free Software Foundation. */ -#ifndef _ARIZONA_GPIO_H -#define _ARIZONA_GPIO_H +#ifndef _DT_BINDINGS_MFD_ARIZONA_H +#define _DT_BINDINGS_MFD_ARIZONA_H +/* GPIO Function Definitions */ #define ARIZONA_GP_FN_TXLRCLK 0x00 #define ARIZONA_GP_FN_GPIO 0x01 #define ARIZONA_GP_FN_IRQ1 0x02 @@ -61,36 +62,32 @@ #define ARIZONA_GP_FN_SYSCLK_ENA_STATUS 0x4B #define ARIZONA_GP_FN_ASYNCCLK_ENA_STATUS 0x4C -#define ARIZONA_GPN_DIR 0x8000 /* GPN_DIR */ -#define ARIZONA_GPN_DIR_MASK 0x8000 /* GPN_DIR */ -#define ARIZONA_GPN_DIR_SHIFT 15 /* GPN_DIR */ -#define ARIZONA_GPN_DIR_WIDTH 1 /* GPN_DIR */ -#define ARIZONA_GPN_PU 0x4000 /* GPN_PU */ -#define ARIZONA_GPN_PU_MASK 0x4000 /* GPN_PU */ -#define ARIZONA_GPN_PU_SHIFT 14 /* GPN_PU */ -#define ARIZONA_GPN_PU_WIDTH 1 /* GPN_PU */ -#define ARIZONA_GPN_PD 0x2000 /* GPN_PD */ -#define ARIZONA_GPN_PD_MASK 0x2000 /* GPN_PD */ -#define ARIZONA_GPN_PD_SHIFT 13 /* GPN_PD */ -#define ARIZONA_GPN_PD_WIDTH 1 /* GPN_PD */ -#define ARIZONA_GPN_LVL 0x0800 /* GPN_LVL */ -#define ARIZONA_GPN_LVL_MASK 0x0800 /* GPN_LVL */ -#define ARIZONA_GPN_LVL_SHIFT 11 /* GPN_LVL */ -#define ARIZONA_GPN_LVL_WIDTH 1 /* GPN_LVL */ -#define ARIZONA_GPN_POL 0x0400 /* GPN_POL */ -#define ARIZONA_GPN_POL_MASK 0x0400 /* GPN_POL */ -#define ARIZONA_GPN_POL_SHIFT 10 /* GPN_POL */ -#define ARIZONA_GPN_POL_WIDTH 1 /* GPN_POL */ -#define ARIZONA_GPN_OP_CFG 0x0200 /* GPN_OP_CFG */ -#define ARIZONA_GPN_OP_CFG_MASK 0x0200 /* GPN_OP_CFG */ -#define ARIZONA_GPN_OP_CFG_SHIFT 9 /* GPN_OP_CFG */ -#define ARIZONA_GPN_OP_CFG_WIDTH 1 /* GPN_OP_CFG */ -#define ARIZONA_GPN_DB 0x0100 /* GPN_DB */ -#define ARIZONA_GPN_DB_MASK 0x0100 /* GPN_DB */ -#define ARIZONA_GPN_DB_SHIFT 8 /* GPN_DB */ -#define ARIZONA_GPN_DB_WIDTH 1 /* GPN_DB */ -#define ARIZONA_GPN_FN_MASK 0x007F /* GPN_DB */ -#define ARIZONA_GPN_FN_SHIFT 0 /* GPN_DB */ -#define ARIZONA_GPN_FN_WIDTH 7 /* GPN_DB */ +/* GPIO Configuration Bits */ +#define ARIZONA_GPN_DIR 0x8000 +#define ARIZONA_GPN_PU 0x4000 +#define ARIZONA_GPN_PD 0x2000 +#define ARIZONA_GPN_LVL 0x0800 +#define ARIZONA_GPN_POL 0x0400 +#define ARIZONA_GPN_OP_CFG 0x0200 +#define ARIZONA_GPN_DB 0x0100 + +/* Provide some defines for the most common configs */ +#define ARIZONA_GP_DEFAULT 0xffffffff +#define ARIZONA_GP_OUTPUT (ARIZONA_GP_FN_GPIO) +#define ARIZONA_GP_INPUT (ARIZONA_GP_FN_GPIO | \ + ARIZONA_GPN_DIR) + +#define ARIZONA_32KZ_MCLK1 1 +#define ARIZONA_32KZ_MCLK2 2 +#define ARIZONA_32KZ_NONE 3 + +#define ARIZONA_DMIC_MICVDD 0 +#define ARIZONA_DMIC_MICBIAS1 1 +#define ARIZONA_DMIC_MICBIAS2 2 +#define ARIZONA_DMIC_MICBIAS3 3 + +#define ARIZONA_INMODE_DIFF 0 +#define ARIZONA_INMODE_SE 1 +#define ARIZONA_INMODE_DMIC 2 #endif diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 9e3614eb3bd..c0d6c3a6149 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -13,31 +13,26 @@ #ifndef _ARIZONA_PDATA_H #define _ARIZONA_PDATA_H -#define ARIZONA_GPN_DIR 0x8000 /* GPN_DIR */ +#include + #define ARIZONA_GPN_DIR_MASK 0x8000 /* GPN_DIR */ #define ARIZONA_GPN_DIR_SHIFT 15 /* GPN_DIR */ #define ARIZONA_GPN_DIR_WIDTH 1 /* GPN_DIR */ -#define ARIZONA_GPN_PU 0x4000 /* GPN_PU */ #define ARIZONA_GPN_PU_MASK 0x4000 /* GPN_PU */ #define ARIZONA_GPN_PU_SHIFT 14 /* GPN_PU */ #define ARIZONA_GPN_PU_WIDTH 1 /* GPN_PU */ -#define ARIZONA_GPN_PD 0x2000 /* GPN_PD */ #define ARIZONA_GPN_PD_MASK 0x2000 /* GPN_PD */ #define ARIZONA_GPN_PD_SHIFT 13 /* GPN_PD */ #define ARIZONA_GPN_PD_WIDTH 1 /* GPN_PD */ -#define ARIZONA_GPN_LVL 0x0800 /* GPN_LVL */ #define ARIZONA_GPN_LVL_MASK 0x0800 /* GPN_LVL */ #define ARIZONA_GPN_LVL_SHIFT 11 /* GPN_LVL */ #define ARIZONA_GPN_LVL_WIDTH 1 /* GPN_LVL */ -#define ARIZONA_GPN_POL 0x0400 /* GPN_POL */ #define ARIZONA_GPN_POL_MASK 0x0400 /* GPN_POL */ #define ARIZONA_GPN_POL_SHIFT 10 /* GPN_POL */ #define ARIZONA_GPN_POL_WIDTH 1 /* GPN_POL */ -#define ARIZONA_GPN_OP_CFG 0x0200 /* GPN_OP_CFG */ #define ARIZONA_GPN_OP_CFG_MASK 0x0200 /* GPN_OP_CFG */ #define ARIZONA_GPN_OP_CFG_SHIFT 9 /* GPN_OP_CFG */ #define ARIZONA_GPN_OP_CFG_WIDTH 1 /* GPN_OP_CFG */ -#define ARIZONA_GPN_DB 0x0100 /* GPN_DB */ #define ARIZONA_GPN_DB_MASK 0x0100 /* GPN_DB */ #define ARIZONA_GPN_DB_SHIFT 8 /* GPN_DB */ #define ARIZONA_GPN_DB_WIDTH 1 /* GPN_DB */ @@ -53,23 +48,10 @@ #define ARIZONA_MAX_GPIO_REGS 5 #define CLEARWATER_MAX_GPIO_REGS 80 -#define ARIZONA_32KZ_MCLK1 1 -#define ARIZONA_32KZ_MCLK2 2 -#define ARIZONA_32KZ_NONE 3 - #define ARIZONA_MAX_INPUT 12 -#define ARIZONA_DMIC_MICVDD 0 -#define ARIZONA_DMIC_MICBIAS1 1 -#define ARIZONA_DMIC_MICBIAS2 2 -#define ARIZONA_DMIC_MICBIAS3 3 - #define ARIZONA_MAX_MICBIAS 4 -#define ARIZONA_INMODE_DIFF 0 -#define ARIZONA_INMODE_SE 1 -#define ARIZONA_INMODE_DMIC 2 - #define ARIZONA_MAX_OUTPUT 6 #define ARIZONA_MAX_AIF 4 diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index a76b26bf254..fc927229148 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -21,7 +21,6 @@ #include #include -#include #include #include "arizona.h" From 18ea6c9fdebd9262f7a6229fa3f6f21d23e5bd67 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 16 Feb 2015 13:22:49 +0000 Subject: [PATCH 0688/1167] mfd: clearwater: Make HP_CTRL_xx registers volatile These registers are changed by various write sequences and as such are volatile as far as the driver is concerned. Change-Id: I7524798033c0a993c1eeb9e66b8cbf481bca73f7 Signed-off-by: Charles Keepax --- drivers/mfd/clearwater-tables.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index 33a95a80a73..cc6e12cdb44 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -544,12 +544,6 @@ static const struct reg_default clearwater_reg_default[] = { { 0x00000219, 0x00e6 }, /* R537 (0x219) - Mic Bias Ctrl 2 */ { 0x0000021a, 0x00e6 }, /* R538 (0x21A) - Mic Bias Ctrl 3 */ { 0x0000021B, 0x00e6 }, /* R539 - Mic Bias Ctrl 4 */ - { 0x00000225, 0x1406 }, - { 0x00000226, 0x1406 }, - { 0x00000227, 0x1406 }, - { 0x00000228, 0x1406 }, - { 0x00000229, 0x1406 }, - { 0x0000022a, 0x1406 }, { 0x0000027e, 0x0000 }, /* R638 (0x27E) - Clearwater EDRE HP stereo control */ { 0x00000293, 0x0000 }, /* R659 (0x293) - Accessory Detect Mode 1 */ { 0x0000029b, 0x0000 }, /* R667 (0x29B) - Headphone Detect 1 */ @@ -3233,6 +3227,12 @@ static bool clearwater_16bit_volatile_register(struct device *dev, unsigned int case ARIZONA_SAMPLE_RATE_3_STATUS: case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: + case ARIZONA_HP_CTRL_1L: + case ARIZONA_HP_CTRL_1R: + case ARIZONA_HP_CTRL_2L: + case ARIZONA_HP_CTRL_2R: + case ARIZONA_HP_CTRL_3L: + case ARIZONA_HP_CTRL_3R: case ARIZONA_DCS_HP1L_CONTROL: case ARIZONA_DCS_HP1R_CONTROL: case ARIZONA_MIC_DETECT_3: From 9bd2617afc0f928488cea32915838eec6c4df539 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 5 Mar 2015 13:53:35 +0000 Subject: [PATCH 0689/1167] ASoC: arizona: fix more constness errors Change-Id: Icc4fd68b0930b7e3dc57cc2caf4e3de62772f983 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 2 +- sound/soc/codecs/vegas.c | 2 +- sound/soc/codecs/wm5102.c | 4 ++-- sound/soc/codecs/wm8997.c | 4 ++-- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 89f64c6b02b..1bf64605433 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -328,7 +328,7 @@ static int clearwater_cp_mode_put(struct snd_kcontrol *kcontrol, return 0; } -static const char *clearwater_cp_mode_text[2] = { +static const char * const clearwater_cp_mode_text[2] = { "Default", "Inverting", }; diff --git a/sound/soc/codecs/vegas.c b/sound/soc/codecs/vegas.c index b1948314b2c..8e269695df5 100644 --- a/sound/soc/codecs/vegas.c +++ b/sound/soc/codecs/vegas.c @@ -421,7 +421,7 @@ ARIZONA_MUX_ENUMS(ISRC2INT2, ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE); ARIZONA_MUX_ENUMS(ISRC2DEC1, ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE); ARIZONA_MUX_ENUMS(ISRC2DEC2, ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE); -static const char *vegas_aec_loopback_texts[] = { +static const char * const vegas_aec_loopback_texts[] = { "HPOUTL", "HPOUTR", "LINEOUTL", "LINEOUTR", "EPOUT", "SPKOUTL", "SPKOUTR", "SPKDATL", "SPKDATR", }; diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 62fd312cea9..2954ca2697b 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -725,7 +725,7 @@ static int wm5102_out_comp_switch_put(struct snd_kcontrol *kcontrol, return 0; } -static const char *wm5102_osr_text[] = { +static const char * const wm5102_osr_text[] = { "Low power", "Normal", "High performance", }; @@ -1085,7 +1085,7 @@ static const SOC_ENUM_SINGLE_DECL(wm5102_dsp_output_enum, 0, 0, wm5102_dsp_outpu static const struct snd_kcontrol_new wm5102_dsp_output_mux = SOC_DAPM_ENUM_VIRT("DSP Virtual Output Mux", wm5102_dsp_output_enum); -static const char *wm5102_aec_loopback_texts[] = { +static const char * const wm5102_aec_loopback_texts[] = { "HPOUT1L", "HPOUT1R", "HPOUT2L", "HPOUT2R", "EPOUT", "SPKOUTL", "SPKOUTR", "SPKDAT1L", "SPKDAT1R", }; diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c index fa604b938d6..d669bd4077e 100644 --- a/sound/soc/codecs/wm8997.c +++ b/sound/soc/codecs/wm8997.c @@ -113,7 +113,7 @@ static int wm8997_sysclk_ev(struct snd_soc_dapm_widget *w, return 0; } -static const char *wm8997_osr_text[] = { +static const char * const wm8997_osr_text[] = { "Low power", "Normal", "High performance", }; @@ -384,7 +384,7 @@ ARIZONA_MUX_ENUMS(ISRC2INT2, ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE); ARIZONA_MUX_ENUMS(ISRC2DEC1, ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE); ARIZONA_MUX_ENUMS(ISRC2DEC2, ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE); -static const char *wm8997_aec_loopback_texts[] = { +static const char * const wm8997_aec_loopback_texts[] = { "HPOUT1L", "HPOUT1R", "EPOUT", "SPKOUT", "SPKDAT1L", "SPKDAT1R", }; From d7538f91c7a23a27dd1415bb8dc6704d12002393 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 5 Mar 2015 13:58:06 +0000 Subject: [PATCH 0690/1167] switch: arizona: Fix build warning caused by pointless static Change-Id: I4e71339a0297ad9aa5e9c3d6092cee55e99891a7 Signed-off-by: Richard Fitzgerald --- drivers/switch/switch-arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index dd0d0bc771a..fff3baba094 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -69,7 +69,7 @@ #define HP_LOW_IMPEDANCE_LIMIT 13 -static struct arizona_hpdet_calibration_data { +struct arizona_hpdet_calibration_data { int min; int max; s64 C0; /* value * 1000000 */ From 6e7ff35c00e21a1a0fa65391ba7d1f397d93088e Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 3 Mar 2015 10:42:00 +0000 Subject: [PATCH 0691/1167] switch: arizona: Factor out setting of mic detection levels Change-Id: Iff1377d64185b74d8c6353d9d146e7042b0a2051 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 81 +++++++++++++++++++-------------- 1 file changed, 48 insertions(+), 33 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index fff3baba094..805e2338524 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -2483,6 +2483,50 @@ static void arizona_micd_set_level(struct arizona *arizona, int index, regmap_update_bits(arizona->regmap, reg, mask, level); } +static int arizona_add_micd_levels(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + int i, j; + int ret =0; + + /* Disable all buttons by default */ + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_2, + ARIZONA_MICD_LVL_SEL_MASK, 0x81); + + /* Set up all the buttons the user specified */ + for (i = 0; i < info->num_micd_ranges; i++) { + for (j = 0; j < ARIZONA_NUM_MICD_BUTTON_LEVELS; j++) + if (arizona_micd_levels[j] >= info->micd_ranges[i].max) + break; + + if (j == ARIZONA_NUM_MICD_BUTTON_LEVELS) { + dev_err(arizona->dev, "Unsupported MICD level %d\n", + info->micd_ranges[i].max); + ret = -EINVAL; + goto err_input; + } + + dev_dbg(arizona->dev, "%d ohms for MICD threshold %d\n", + arizona_micd_levels[j], i); + + arizona_micd_set_level(arizona, i, j); + if (info->micd_ranges[i].key > 0) + input_set_capability(info->input, EV_KEY, + info->micd_ranges[i].key); + + /* Enable reporting of that range */ + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_2, + 1 << i, 1 << i); + } + + /* Set all the remaining keys to a maximum */ + for (; i < ARIZONA_MAX_MICD_RANGE; i++) + arizona_micd_set_level(arizona, i, 0x3f); + +err_input: + return ret; +} + #ifdef CONFIG_OF static int arizona_extcon_of_get_pdata(struct arizona *arizona) { @@ -2913,7 +2957,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) struct arizona_extcon_info *info; unsigned int reg; int jack_irq_fall, jack_irq_rise; - int ret, mode, i, j; + int ret, mode, i; int debounce_reg, debounce_val, analog_val; if (!arizona->dapm || !arizona->dapm->card) @@ -3117,38 +3161,9 @@ static int arizona_extcon_probe(struct platform_device *pdev) } } - /* Disable all buttons by default */ - regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_2, - ARIZONA_MICD_LVL_SEL_MASK, 0x81); - - /* Set up all the buttons the user specified */ - for (i = 0; i < info->num_micd_ranges; i++) { - for (j = 0; j < ARIZONA_NUM_MICD_BUTTON_LEVELS; j++) - if (arizona_micd_levels[j] >= info->micd_ranges[i].max) - break; - - if (j == ARIZONA_NUM_MICD_BUTTON_LEVELS) { - dev_err(arizona->dev, "Unsupported MICD level %d\n", - info->micd_ranges[i].max); - ret = -EINVAL; - goto err_input; - } - - dev_dbg(arizona->dev, "%d ohms for MICD threshold %d\n", - arizona_micd_levels[j], i); - - arizona_micd_set_level(arizona, i, j); - input_set_capability(info->input, EV_KEY, - info->micd_ranges[i].key); - - /* Enable reporting of that range */ - regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_2, - 1 << i, 1 << i); - } - - /* Set all the remaining keys to a maximum */ - for (; i < ARIZONA_MAX_MICD_RANGE; i++) - arizona_micd_set_level(arizona, i, 0x3f); + ret = arizona_add_micd_levels(info); + if (ret < 0) + goto err_input; /* * If we have a clamp use it, activating in conjunction with From e096336b161ae9b8129d2537de5ae34f0b6f0d96 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 3 Mar 2015 10:57:06 +0000 Subject: [PATCH 0692/1167] switch: arizona: Validate button press when a 4 pole is slowly plugged out from antenna cable the hp pins of 4 pole can touch the mic pins of antenna and we may report a false button press this patch prevents it by differentiating between hp and button impedance. Differentiation is possible since the patch adds capability to measure an impedance band around the hp impedance level and when the state machine in button detection state hits this band it considers it as a false button press which might have triggered due to a slow plugout. One tradeoff here is the button detection around this impedance band will be disabled. So if a button (in a specific headset) falls in the disabled impedance range then such a button won't work (the headset as such and its other buttons would still work). But the impedance range here is kept as small as possible by the patch so that reduces the probability of hitting such a condition. Speicfically for samsung headsets the impedance of all the buttons fall outside this range so all functionality works fine for samsung headsets. Change-Id: Id5c2bd880aab5cbf3c20757563013d33475f59d2 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 150 ++++++++++++++++++++++++++++++-- 1 file changed, 143 insertions(+), 7 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 805e2338524..c2eb20e3948 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -99,7 +99,7 @@ struct arizona_extcon_info { const struct arizona_micd_config *micd_modes; int micd_num_modes; - const struct arizona_micd_range *micd_ranges; + struct arizona_micd_range *micd_ranges; int num_micd_ranges; bool micd_reva; @@ -149,13 +149,15 @@ static const struct arizona_micd_config micd_default_modes[] = { { 0, 2, 1 }, }; -static const struct arizona_micd_range micd_default_ranges[] = { +static struct arizona_micd_range micd_default_ranges[] = { { .max = 11, .key = BTN_0 }, { .max = 28, .key = BTN_1 }, { .max = 54, .key = BTN_2 }, { .max = 100, .key = BTN_3 }, { .max = 186, .key = BTN_4 }, { .max = 430, .key = BTN_5 }, + { .max = -1, .key = -1 }, + { .max = -1, .key = -1 }, }; /* The number of levels in arizona_micd_levels valid for button thresholds */ @@ -1633,6 +1635,131 @@ static int arizona_antenna_remove_reading(struct arizona_extcon_info *info, return 0; } +static int arizona_add_micd_levels(struct arizona_extcon_info *info); + +static int arizona_antenna_add_micd_level(struct arizona_extcon_info *info, int imp) +{ + struct arizona *arizona = info->arizona; + int i, j, micd_lvl; + int ret =0; + + + /* check if impedance level is supported */ + for (micd_lvl = 0; micd_lvl < ARIZONA_NUM_MICD_BUTTON_LEVELS; micd_lvl++) { + if (arizona_micd_levels[micd_lvl] >= imp) + break; + } + + if (micd_lvl == ARIZONA_NUM_MICD_BUTTON_LEVELS) { + dev_info(arizona->dev, "Unsupported MICD level %d\n", + imp); + ret = -EINVAL; + goto err_input; + } + + /* find index to insert an impedance level */ + for (i = 0; i < info->num_micd_ranges; i++) { + if (info->micd_ranges[i].max >= imp) + break; + } + + if (info->micd_ranges[i].max == imp) { + dev_info(arizona->dev, "MICD level already used %d\n", + imp); + ret = -EINVAL; + goto err_input; + } + + /* insert an impedance level */ + for (j =( info->num_micd_ranges - 1); j >= i; j--) { + info->micd_ranges[j+2].max = info->micd_ranges[j].max; + info->micd_ranges[j+2].key = info->micd_ranges[j].key; + } + info->micd_ranges[i].max = arizona_micd_levels[micd_lvl-2]; + info->micd_ranges[i].key = info->micd_ranges[i+2].key; + info->micd_ranges[i+1].max =imp; + info->micd_ranges[i+1].key = -1; + info->num_micd_ranges += 2; + ret = arizona_add_micd_levels(info); + +err_input: + return ret; +} + +static int arizona_antenna_remove_micd_level(struct arizona_extcon_info *info, int imp) +{ + struct arizona *arizona = info->arizona; + int i, j; + int ret =0; + + /* find index to remove */ + for (i = 0; i < info->num_micd_ranges; i++) { + if (info->micd_ranges[i].max == imp && + info->micd_ranges[i].key == -1) + break; + } + + if (i == info->num_micd_ranges) { + dev_info(arizona->dev, "MICD level %d doesn't exist\n", + imp); + ret = -EINVAL; + goto err_input; + } + + /* remove the impedance level */ + info->num_micd_ranges -= 2;; + for (j = i-1; j < info->num_micd_ranges; j++) { + info->micd_ranges[j].max = info->micd_ranges[j+2].max; + info->micd_ranges[j].key = info->micd_ranges[j+2].key; + } + ret = arizona_add_micd_levels(info); + +err_input: + return ret; +} + +static int arizona_antenna_button_start(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + int i; + + for (i = 0; i < info->num_micd_ranges; i++) { + if (info->micd_ranges[i].key == -1) { + break; + } + } + + if ((i != info->num_micd_ranges) && + (info->micd_ranges[i].max != arizona->hp_impedance)) { + arizona_antenna_remove_micd_level(info, info->micd_ranges[i].max); + } + arizona_antenna_add_micd_level(info, arizona->hp_impedance); + + for (i = 0; i < info->num_micd_ranges; i++) + dev_dbg(arizona->dev, "%s: micd_lvl=%d: key=%d\n", __func__ , + info->micd_ranges[i].max, info->micd_ranges[i].key); + + return arizona_micd_start(info); +} + +static bool arizona_antenna_is_valid_button(struct arizona_extcon_info *info, int imp) +{ + int i; + int key = -1; + bool is_valid_button = true; + + if (imp < MICROPHONE_MIN_OHM) { + for (i = 0; i < info->num_micd_ranges; i++) { + if (imp <= info->micd_ranges[i].max) { + key = info->micd_ranges[i].key; + break; + } + } + is_valid_button = key > 0 ? true : false; + } + + return is_valid_button; +} static int arizona_antenna_button_reading(struct arizona_extcon_info *info, int val) { @@ -1648,6 +1775,9 @@ static int arizona_antenna_button_reading(struct arizona_extcon_info *info, if (ret < 0) return ret; + if (!arizona_antenna_is_valid_button(info, val)) + return val; + if (val > MICROPHONE_MAX_OHM) { int i; @@ -2275,7 +2405,7 @@ EXPORT_SYMBOL_GPL(arizona_antenna_hpr_det); const struct arizona_jd_state arizona_antenna_button_det = { .mode = ARIZONA_ACCDET_MODE_MIC, - .start = arizona_micd_start, + .start = arizona_antenna_button_start, .restart = arizona_micd_restart, .reading = arizona_antenna_button_reading, .stop = arizona_micd_stop, @@ -3136,12 +3266,18 @@ static int arizona_extcon_probe(struct platform_device *pdev) BUILD_BUG_ON(ARRAY_SIZE(arizona_micd_levels) < ARIZONA_NUM_MICD_BUTTON_LEVELS); + info->micd_ranges = micd_default_ranges; + info->num_micd_ranges = ARRAY_SIZE(micd_default_ranges) - 2; + if (arizona->pdata.num_micd_ranges) { - info->micd_ranges = pdata->micd_ranges; + memcpy(info->micd_ranges, pdata->micd_ranges, + sizeof(struct arizona_micd_range) * pdata->num_micd_ranges); info->num_micd_ranges = pdata->num_micd_ranges; - } else { - info->micd_ranges = micd_default_ranges; - info->num_micd_ranges = ARRAY_SIZE(micd_default_ranges); + + for (i = info->num_micd_ranges; i < ARRAY_SIZE(micd_default_ranges); i++) { + info->micd_ranges[i].max = -1; + info->micd_ranges[i].key = -1; + } } if (arizona->pdata.num_micd_ranges > ARIZONA_MAX_MICD_RANGE) { From 1c1e29abd86214ec884fed2a064da3354a484e7b Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 5 Mar 2015 12:05:21 +0000 Subject: [PATCH 0693/1167] switch: arizona: Add configurable impedance rejection range this patch provides configurability to the impedance rejection range that is used to filter out false button events Change-Id: I3514665ea58645e0601cac324884e9b7f2564ad7 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 81 ++++++++++++++++++++++++++++--- include/linux/mfd/arizona/pdata.h | 4 ++ 2 files changed, 77 insertions(+), 8 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index c2eb20e3948..c066c2b565e 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1637,12 +1637,31 @@ static int arizona_antenna_remove_reading(struct arizona_extcon_info *info, static int arizona_add_micd_levels(struct arizona_extcon_info *info); +static int arizona_antenna_get_micd_level(int imp, int range) +{ + int micd_lvl; + int impd_lvl; + + impd_lvl = imp + range; + + /* check if impedance level is supported */ + for (micd_lvl = 0; micd_lvl < ARIZONA_NUM_MICD_BUTTON_LEVELS; micd_lvl++) { + if (arizona_micd_levels[micd_lvl] >= impd_lvl) + break; + } + + if (micd_lvl == ARIZONA_NUM_MICD_BUTTON_LEVELS) + return -EINVAL; + + return micd_lvl; +} + static int arizona_antenna_add_micd_level(struct arizona_extcon_info *info, int imp) { struct arizona *arizona = info->arizona; + struct arizona_pdata *pdata = &arizona->pdata; int i, j, micd_lvl; - int ret =0; - + int hp_imp_range_lo = -1, hp_imp_range_hi = -1, ret = 0; /* check if impedance level is supported */ for (micd_lvl = 0; micd_lvl < ARIZONA_NUM_MICD_BUTTON_LEVELS; micd_lvl++) { @@ -1657,27 +1676,51 @@ static int arizona_antenna_add_micd_level(struct arizona_extcon_info *info, int goto err_input; } + if (pdata->antenna_hp_imp_range_hi || + pdata->antenna_hp_imp_range_lo) { + hp_imp_range_hi = arizona_antenna_get_micd_level(imp, + pdata->antenna_hp_imp_range_hi); + hp_imp_range_lo = arizona_antenna_get_micd_level(imp, + -(pdata->antenna_hp_imp_range_lo)); + } + + if (hp_imp_range_lo < 0 || hp_imp_range_hi < 0) { + hp_imp_range_hi = arizona_antenna_get_micd_level(imp, 0); + hp_imp_range_lo = hp_imp_range_hi - 2; + } + /* find index to insert an impedance level */ for (i = 0; i < info->num_micd_ranges; i++) { - if (info->micd_ranges[i].max >= imp) + if (info->micd_ranges[i].max >= arizona_micd_levels[hp_imp_range_hi]) break; } - if (info->micd_ranges[i].max == imp) { + if (info->micd_ranges[i].max == arizona_micd_levels[hp_imp_range_hi]) { dev_info(arizona->dev, "MICD level already used %d\n", imp); ret = -EINVAL; goto err_input; } + if (hp_imp_range_lo == hp_imp_range_hi) { + if (info->micd_ranges[i-1].max < arizona_micd_levels[hp_imp_range_hi - 1]) + hp_imp_range_lo = hp_imp_range_hi - 1; + else { + dev_info(arizona->dev, "MICD level range cannot be added %d\n", + hp_imp_range_lo); + ret = -EINVAL; + goto err_input; + } + } + /* insert an impedance level */ for (j =( info->num_micd_ranges - 1); j >= i; j--) { info->micd_ranges[j+2].max = info->micd_ranges[j].max; info->micd_ranges[j+2].key = info->micd_ranges[j].key; } - info->micd_ranges[i].max = arizona_micd_levels[micd_lvl-2]; + info->micd_ranges[i].max = arizona_micd_levels[hp_imp_range_lo]; info->micd_ranges[i].key = info->micd_ranges[i+2].key; - info->micd_ranges[i+1].max =imp; + info->micd_ranges[i+1].max =arizona_micd_levels[hp_imp_range_hi]; info->micd_ranges[i+1].key = -1; info->num_micd_ranges += 2; ret = arizona_add_micd_levels(info); @@ -1721,7 +1764,22 @@ static int arizona_antenna_remove_micd_level(struct arizona_extcon_info *info, i static int arizona_antenna_button_start(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; - int i; + struct arizona_pdata *pdata = &arizona->pdata; + int i, micd_lvl; + int hp_imp_range_hi = -1; + + /* check if impedance level is supported */ + micd_lvl = arizona_antenna_get_micd_level(arizona->hp_impedance, 0); + + if (micd_lvl < 0) + goto micd_start; + + if (pdata->antenna_hp_imp_range_hi) + hp_imp_range_hi = arizona_antenna_get_micd_level(arizona->hp_impedance, + pdata->antenna_hp_imp_range_hi); + + if (hp_imp_range_hi < 0) + hp_imp_range_hi = micd_lvl; for (i = 0; i < info->num_micd_ranges; i++) { if (info->micd_ranges[i].key == -1) { @@ -1730,7 +1788,7 @@ static int arizona_antenna_button_start(struct arizona_extcon_info *info) } if ((i != info->num_micd_ranges) && - (info->micd_ranges[i].max != arizona->hp_impedance)) { + (info->micd_ranges[i].max != arizona_micd_levels[hp_imp_range_hi])) { arizona_antenna_remove_micd_level(info, info->micd_ranges[i].max); } arizona_antenna_add_micd_level(info, arizona->hp_impedance); @@ -1739,6 +1797,7 @@ static int arizona_antenna_button_start(struct arizona_extcon_info *info) dev_dbg(arizona->dev, "%s: micd_lvl=%d: key=%d\n", __func__ , info->micd_ranges[i].max, info->micd_ranges[i].key); +micd_start: return arizona_micd_start(info); } @@ -2674,6 +2733,12 @@ static int arizona_extcon_of_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,antenna-manual-db-plugout", false, &pdata->antenna_manual_db_plugout); + arizona_of_read_u32(arizona, "wlf,antenna-hp-imp-range-lo", false, + &pdata->antenna_hp_imp_range_lo); + + arizona_of_read_u32(arizona, "wlf,antenna-hp-imp-range-hi", false, + &pdata->antenna_hp_imp_range_hi); + pdata->micd_pol_gpio = arizona_of_get_named_gpio(arizona, "wlf,micd-pol-gpio", false); diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index c0d6c3a6149..ca83c449858 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -196,6 +196,10 @@ struct arizona_pdata { /** Software debounces during 3/4 pole plugout from antenna cable */ int antenna_manual_db_plugout; + /** range around hp impedance to be rejected to prevent false button events */ + int antenna_hp_imp_range_lo; + int antenna_hp_imp_range_hi; + /** GPIO for mic detection polarity */ int micd_pol_gpio; From 29a7c51b1ccb3055c9c732f7f4edfb6f066ee443 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 9 Mar 2015 15:31:50 +0000 Subject: [PATCH 0694/1167] switch: arizona: wait for complete jack insertion After detecting false button, wait for complete jack insertion before processing any subsequent button. This will help to filter out false button events when 4 pole is slowly plugged out. On slow plugouts initially hpr impedance is detected which maps to a false button but subsequently hpl+hpr series impedance may be detected which gets mapped to a button impedance since we are not adding any additional impedance rejection level around hpl+hpr. We dont add a level because we have limited number of levels that can be supported by hardware and also adding more levels will make the code more prone to malfunction for some headsets which has button impedance close to hpl+hpr impedance. Change-Id: I0273f633ce1df381aeae0375dd16d9a26f85ede3 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index c066c2b565e..1b8b1863397 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -142,6 +142,7 @@ struct arizona_extcon_info { int button_impedance; int button_check; + bool wait_for_mic; }; static const struct arizona_micd_config micd_default_modes[] = { @@ -1768,6 +1769,8 @@ static int arizona_antenna_button_start(struct arizona_extcon_info *info) int i, micd_lvl; int hp_imp_range_hi = -1; + info->wait_for_mic = false; + /* check if impedance level is supported */ micd_lvl = arizona_antenna_get_micd_level(arizona->hp_impedance, 0); @@ -1815,6 +1818,12 @@ static bool arizona_antenna_is_valid_button(struct arizona_extcon_info *info, in } } is_valid_button = key > 0 ? true : false; + if (!is_valid_button) + info->wait_for_mic = true; + if (info->wait_for_mic) + is_valid_button = false; + } else { + info->wait_for_mic = false; } return is_valid_button; From dc466f894f7d509fbb382c88ca8a83a5598742b4 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 24 Feb 2015 18:10:53 +0000 Subject: [PATCH 0695/1167] switch: arizona: add configurable debounce to handle plugouts from antenna Change-Id: I48dcb8e57897891e34ac511dd8a276fd743fd91e Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 1b8b1863397..4437c750c84 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1864,7 +1864,10 @@ static int arizona_antenna_button_reading(struct arizona_extcon_info *info, switch (info->button_check) { case 0: info->button_impedance = val; - info->button_check = 2; + if (arizona->pdata.antenna_manual_db_plugout) + info->button_check = arizona->pdata.antenna_manual_db_plugout; + else + info->button_check = 2; return -EAGAIN; case 1: From 47ee44354104e9c3c7d1f368c5edd5f9ccb844a4 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 5 Mar 2015 15:16:55 +0000 Subject: [PATCH 0696/1167] switch: arizona: Use fast mode for moisture detect Change-Id: I231d0651a1518d72024071cfbfee441c0fc8965b Signed-off-by: Richard Fitzgerald --- drivers/switch/switch-arizona.c | 30 ++++++++++++++++++++------- include/linux/mfd/arizona/registers.h | 8 +++++++ 2 files changed, 30 insertions(+), 8 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 4437c750c84..abf13c8ac34 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1182,15 +1182,23 @@ static int arizona_hpdet_moisture_start(struct arizona_extcon_info *info) switch (arizona->type) { case WM5102: - case WM5110: case WM8997: + regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_RATE, ARIZONA_HP_RATE); + break; + case WM5110: case WM8280: - case WM8998: - case WM1814: case WM1831: case CS47L24: regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, - ARIZONA_HP_RATE, ARIZONA_HP_RATE); + ARIZONA_HP_RATE | ARIZONA_HP_FAST_MODE, + ARIZONA_HP_RATE | ARIZONA_HP_FAST_MODE); + break; + case WM8998: + case WM1814: + regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_RATE | VEGAS_HP_FAST_MODE, + ARIZONA_HP_RATE | VEGAS_HP_FAST_MODE); break; default: regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, @@ -1214,15 +1222,21 @@ static void arizona_hpdet_moisture_stop(struct arizona_extcon_info *info) switch (arizona->type) { case WM5102: - case WM5110: case WM8997: + regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_RATE, 0); + break; + case WM5110: case WM8280: - case WM8998: - case WM1814: case WM1831: case CS47L24: regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, - ARIZONA_HP_RATE, 0); + ARIZONA_HP_RATE | ARIZONA_HP_FAST_MODE, 0); + break; + case WM8998: + case WM1814: + regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_RATE | VEGAS_HP_FAST_MODE, 0); break; default: regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 27f27e06feb..dac328bd897 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -3651,6 +3651,14 @@ /* * R667 (0x29B) - Headphone Detect 1 */ +#define VEGAS_HP_FAST_MODE 0x8000 /* HP_FAST_MODE [15] */ +#define VEGAS_HP_FAST_MODE_MASK 0x8000 /* HP_FAST_MODE [15] */ +#define VEGAS_HP_FAST_MODE_SHIFT 15 /* HP_FAST_MODE [15] */ +#define VEGAS_HP_FAST_MODE_WIDTH 1 /* HP_FAST_MODE [15] */ +#define ARIZONA_HP_FAST_MODE 0x0800 /* HP_FAST_MODE [11] */ +#define ARIZONA_HP_FAST_MODE_MASK 0x0800 /* HP_FAST_MODE [11] */ +#define ARIZONA_HP_FAST_MODE_SHIFT 11 /* HP_FAST_MODE [11] */ +#define ARIZONA_HP_FAST_MODE_WIDTH 1 /* HP_FAST_MODE [11] */ #define ARIZONA_HP_IMPEDANCE_RANGE_MASK 0x0600 /* HP_IMPEDANCE_RANGE - [10:9] */ #define ARIZONA_HP_IMPEDANCE_RANGE_SHIFT 9 /* HP_IMPEDANCE_RANGE - [10:9] */ #define ARIZONA_HP_IMPEDANCE_RANGE_WIDTH 2 /* HP_IMPEDANCE_RANGE - [10:9] */ From 5e5ecaf0b3cac16dabe7c7767a39b3d07d549ecd Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 16 Mar 2015 10:50:56 +0000 Subject: [PATCH 0697/1167] mfd: vegas: Mark ARIZONA_DRE_ENABLE as readable This causes problems with the DRE enable switches if this register is not marked as readable. Change-Id: I9397936f2fa9918718667f016dda3201a7283759 Signed-off-by: Charles Keepax --- drivers/mfd/vegas-tables.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mfd/vegas-tables.c b/drivers/mfd/vegas-tables.c index 919e5054a3d..6c1c82cbaee 100644 --- a/drivers/mfd/vegas-tables.c +++ b/drivers/mfd/vegas-tables.c @@ -325,6 +325,7 @@ static const struct reg_default vegas_reg_default[] = { { 0x00000434, 0x0000 }, /* R1076 - Output Path Config 5R */ { 0x00000435, 0x0180 }, /* R1077 - DAC Digital Volume 5R */ { 0x00000437, 0x0200 }, /* R1079 - Noise Gate Select 5R */ + { 0x00000440, 0x8FFF }, /* R1088 - DRE Enable */ { 0x00000441, 0xC759 }, /* R1089 - DRE Control 1 */ { 0x00000442, 0x2A08 }, /* R1089 - DRE Control 2 */ { 0x00000443, 0x5CFA }, /* R1089 - DRE Control 3 */ @@ -990,6 +991,7 @@ static bool vegas_readable_register(struct device *dev, unsigned int reg) case ARIZONA_OUTPUT_PATH_CONFIG_5R: case ARIZONA_DAC_DIGITAL_VOLUME_5R: case ARIZONA_NOISE_GATE_SELECT_5R: + case ARIZONA_DRE_ENABLE: case ARIZONA_DRE_CONTROL_1: case ARIZONA_DRE_CONTROL_2: case ARIZONA_DRE_CONTROL_3: From 56dba93b9afc42268f1a65be84ac026b26ac4f31 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 9 Mar 2015 14:51:41 +0000 Subject: [PATCH 0698/1167] ASoC: vegas: Correct order of channels for DRE enable Vegas has the left/right order of enable bits for DRE consistent with all other channel enable bits. Change-Id: Iae5876c357822d6c4aedd93a38d14c1930b0cca3 Signed-off-by: Richard Fitzgerald --- include/linux/mfd/arizona/registers.h | 24 ++++++++++++++++++++++++ sound/soc/codecs/vegas.c | 6 +++--- 2 files changed, 27 insertions(+), 3 deletions(-) diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index dac328bd897..6372b0796a1 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -5025,6 +5025,30 @@ #define ARIZONA_DRE1L_ENA_SHIFT 0 /* DRE1L_ENA */ #define ARIZONA_DRE1L_ENA_WIDTH 1 /* DRE1L_ENA */ +/* + * R1088 (0x440) - DRE Enable (Vegas) + */ +#define VEGAS_DRE3L_ENA 0x0020 /* DRE3L_ENA */ +#define VEGAS_DRE3L_ENA_MASK 0x0020 /* DRE3L_ENA */ +#define VEGAS_DRE3L_ENA_SHIFT 5 /* DRE3L_ENA */ +#define VEGAS_DRE3L_ENA_WIDTH 1 /* DRE3L_ENA */ +#define VEGAS_DRE2L_ENA 0x0008 /* DRE2L_ENA */ +#define VEGAS_DRE2L_ENA_MASK 0x0008 /* DRE2L_ENA */ +#define VEGAS_DRE2L_ENA_SHIFT 3 /* DRE2L_ENA */ +#define VEGAS_DRE2L_ENA_WIDTH 1 /* DRE2L_ENA */ +#define VEGAS_DRE2R_ENA 0x0004 /* DRE2R_ENA */ +#define VEGAS_DRE2R_ENA_MASK 0x0004 /* DRE2R_ENA */ +#define VEGAS_DRE2R_ENA_SHIFT 2 /* DRE2R_ENA */ +#define VEGAS_DRE2R_ENA_WIDTH 1 /* DRE2R_ENA */ +#define VEGAS_DRE1L_ENA 0x0002 /* DRE1L_ENA */ +#define VEGAS_DRE1L_ENA_MASK 0x0002 /* DRE1L_ENA */ +#define VEGAS_DRE1L_ENA_SHIFT 1 /* DRE1L_ENA */ +#define VEGAS_DRE1L_ENA_WIDTH 1 /* DRE1L_ENA */ +#define VEGAS_DRE1R_ENA 0x0001 /* DRE1R_ENA */ +#define VEGAS_DRE1R_ENA_MASK 0x0001 /* DRE1R_ENA */ +#define VEGAS_DRE1R_ENA_SHIFT 0 /* DRE1R_ENA */ +#define VEGAS_DRE1R_ENA_WIDTH 1 /* DRE1R_ENA */ + /* * R1089 (0x441) - DRE Control 1 */ diff --git a/sound/soc/codecs/vegas.c b/sound/soc/codecs/vegas.c index 8e269695df5..00ac0af7627 100644 --- a/sound/soc/codecs/vegas.c +++ b/sound/soc/codecs/vegas.c @@ -274,11 +274,11 @@ SOC_DOUBLE("SPKDAT Switch", ARIZONA_PDM_SPK1_CTRL_1, ARIZONA_SPK1L_MUTE_SHIFT, ARIZONA_SPK1R_MUTE_SHIFT, 1, 1), SOC_DOUBLE("HPOUT DRE Switch", ARIZONA_DRE_ENABLE, - ARIZONA_DRE1L_ENA_SHIFT, ARIZONA_DRE1R_ENA_SHIFT, 1, 0), + VEGAS_DRE1L_ENA_SHIFT, VEGAS_DRE1R_ENA_SHIFT, 1, 0), SOC_DOUBLE("LINEOUT DRE Switch", ARIZONA_DRE_ENABLE, - ARIZONA_DRE2L_ENA_SHIFT, ARIZONA_DRE2R_ENA_SHIFT, 1, 0), + VEGAS_DRE2L_ENA_SHIFT, VEGAS_DRE2R_ENA_SHIFT, 1, 0), SOC_SINGLE("EPOUT DRE Switch", ARIZONA_DRE_ENABLE, - ARIZONA_DRE3L_ENA_SHIFT, 1, 0), + VEGAS_DRE3L_ENA_SHIFT, 1, 0), SOC_SINGLE("DRE Threshold", ARIZONA_DRE_CONTROL_2, ARIZONA_DRE_T_LOW_SHIFT, 63, 0), From c73744019c753404bfb480be9e5c5eb08b497532 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 17 Mar 2015 09:11:32 +0000 Subject: [PATCH 0699/1167] mfd: arizona: Add stub for arizona_dcvdd_notify In the case of CONFIG_PM_RUNTIME not being declared we need a stub function for arizona_dcvdd_notify. This patch adds one. Change-Id: Iab32cae7409bef06b64ff5c4ce95212208c5c991 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index b7d24f9ab13..8143c426510 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -839,6 +839,12 @@ static int arizona_runtime_suspend(struct device *dev) arizona_restore_dvfs(arizona); return ret; } +#else +static inline int arizona_dcvdd_notify(struct notifier_block *nb, + unsigned long action, void *data) +{ + return 0; +} #endif #ifdef CONFIG_PM_SLEEP From 200d5f57d2db3dd0f21f21d6a865e267b979aef6 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 16 Mar 2015 11:00:36 +0000 Subject: [PATCH 0700/1167] switch: arizona: fix adding entry to micd_ranges table This patch limits the entries in micd_ranges table below the maximum range allowed for arizona chips It also fixes the key of the entry added to the end of micd_ranges table and also fixes the checks when adding entry to start of the micd_ranges table. Change-Id: I0ac7e6605d6406cab07ac269a8bf86813afe0b98 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index abf13c8ac34..9ad904b91a3 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1678,6 +1678,14 @@ static int arizona_antenna_add_micd_level(struct arizona_extcon_info *info, int int i, j, micd_lvl; int hp_imp_range_lo = -1, hp_imp_range_hi = -1, ret = 0; + /* check if additional impedance levels can be added */ + if (info->num_micd_ranges + 2 > ARIZONA_MAX_MICD_RANGE) { + dev_info(arizona->dev, "Cannot increase MICD ranges to: %d\n", + info->num_micd_ranges + 2); + ret = -EINVAL; + goto err_input; + } + /* check if impedance level is supported */ for (micd_lvl = 0; micd_lvl < ARIZONA_NUM_MICD_BUTTON_LEVELS; micd_lvl++) { if (arizona_micd_levels[micd_lvl] >= imp) @@ -1718,7 +1726,10 @@ static int arizona_antenna_add_micd_level(struct arizona_extcon_info *info, int } if (hp_imp_range_lo == hp_imp_range_hi) { - if (info->micd_ranges[i-1].max < arizona_micd_levels[hp_imp_range_hi - 1]) + if (i == 0) + hp_imp_range_lo = hp_imp_range_hi - 1; + else if (info->micd_ranges[i-1].max < + arizona_micd_levels[hp_imp_range_hi - 1]) hp_imp_range_lo = hp_imp_range_hi - 1; else { dev_info(arizona->dev, "MICD level range cannot be added %d\n", @@ -1734,7 +1745,10 @@ static int arizona_antenna_add_micd_level(struct arizona_extcon_info *info, int info->micd_ranges[j+2].key = info->micd_ranges[j].key; } info->micd_ranges[i].max = arizona_micd_levels[hp_imp_range_lo]; - info->micd_ranges[i].key = info->micd_ranges[i+2].key; + if (i == info->num_micd_ranges) + info->micd_ranges[i].key = info->micd_ranges[i-1].key; + else + info->micd_ranges[i].key = info->micd_ranges[i+2].key; info->micd_ranges[i+1].max =arizona_micd_levels[hp_imp_range_hi]; info->micd_ranges[i+1].key = -1; info->num_micd_ranges += 2; From e8516fc1d2efe48ca81b407c299f1f2aa03da56e Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 12 Mar 2015 09:42:10 +0000 Subject: [PATCH 0701/1167] switch: arizona: enable manual hp clamping for vegas enable manual hp clamping for vegas so that HPDETL can be used to measure HPR impedance and HPDETR can be used to measure HPL impedance Change-Id: I68efba30d41fed55210fce7e5a002ac4ad952732 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 9ad904b91a3..2b9ee32b1b4 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -284,6 +284,8 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, switch (arizona->type) { case WM5102: case WM8997: + case WM8998: + case WM1814: mask = ARIZONA_RMV_SHRT_HP1L; if (clamp) val = ARIZONA_RMV_SHRT_HP1L; From 6db007ad430d1d5de925b96a4511589287c08275 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 17 Mar 2015 09:56:11 +0000 Subject: [PATCH 0702/1167] switch: arizona: add moisture detection on HPR This patch adds the configurability to do moisture detect on HPL/HPR selected via a DT entry Change-Id: Ief38e04717e92c6458e3f4c2422aa8bc597c5ed1 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 41 +++++++++++++++++++++++++------ include/linux/mfd/arizona/pdata.h | 12 ++++++--- include/linux/switch-arizona.h | 2 ++ 3 files changed, 45 insertions(+), 10 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 2b9ee32b1b4..184697e4136 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -2406,6 +2406,14 @@ const struct arizona_jd_state arizona_hpdet_moisture = { }; EXPORT_SYMBOL_GPL(arizona_hpdet_moisture); +const struct arizona_jd_state arizona_hpdet_moisture_r = { + .mode = ARIZONA_ACCDET_MODE_HPR, + .start = arizona_hpdet_moisture_start, + .reading = arizona_hpdet_moisture_reading, + .stop = arizona_hpdet_moisture_stop, +}; +EXPORT_SYMBOL_GPL(arizona_hpdet_moisture_r); + const struct arizona_jd_state arizona_hpdet_left = { .mode = ARIZONA_ACCDET_MODE_HPL, .start = arizona_hpdet_start, @@ -2472,6 +2480,14 @@ const struct arizona_jd_state arizona_antenna_moisture = { }; EXPORT_SYMBOL_GPL(arizona_antenna_moisture); +const struct arizona_jd_state arizona_antenna_moisture_r = { + .mode = ARIZONA_ACCDET_MODE_HPR, + .start = arizona_hpdet_moisture_start, + .reading = arizona_antenna_moisture_reading, + .stop = arizona_hpdet_moisture_stop, +}; +EXPORT_SYMBOL_GPL(arizona_antenna_moisture_r); + const struct arizona_jd_state arizona_antenna_mic_det = { .mode = ARIZONA_ACCDET_MODE_ADC, .start = arizona_micd_mic_start, @@ -2603,13 +2619,21 @@ static irqreturn_t arizona_jackdet(int irq, void *data) if (arizona->pdata.custom_jd) arizona_jds_set_state(info, arizona->pdata.custom_jd); - else if (arizona->pdata.antenna_supported) - arizona_jds_set_state(info, - &arizona_antenna_moisture); - else if (arizona->pdata.hpdet_moisture_imp) - arizona_jds_set_state(info, - &arizona_hpdet_moisture); - else if (arizona->pdata.micd_software_compare) + else if (arizona->pdata.antenna_supported) { + if (arizona->pdata.moisture_det_channel) + arizona_jds_set_state(info, + &arizona_antenna_moisture_r); + else + arizona_jds_set_state(info, + &arizona_antenna_moisture); + } else if (arizona->pdata.hpdet_moisture_imp) { + if (arizona->pdata.moisture_det_channel) + arizona_jds_set_state(info, + &arizona_hpdet_moisture_r); + else + arizona_jds_set_state(info, + &arizona_hpdet_moisture); + } else if (arizona->pdata.micd_software_compare) arizona_jds_set_state(info, &arizona_micd_adc_mic); else @@ -2844,6 +2868,9 @@ static int arizona_extcon_of_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,hpdet-channel", false, &pdata->hpdet_channel); + arizona_of_read_u32(arizona, "wlf,moisture-det-channel", false, + &pdata->moisture_det_channel); + arizona_of_read_u32(arizona, "wlf,jd-wake-time", false, &pdata->jd_wake_time); diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index ca83c449858..34480360dff 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -166,10 +166,16 @@ struct arizona_pdata { */ int hpdet_short_circuit_imp; - /** Use HPDETL to check for moisture, this value specifies the - * threshold impedance in ohms above which it will be considered - * a false detection + /** + * Channel to use for moisture detection, valid values are 0 for + * left and 1 for right */ + unsigned int moisture_det_channel; + + /** + * This value specifies the threshold impedance in ohms above + * which it will be considered a false detection + */ int hpdet_moisture_imp; /** Software debounces for moisture detect */ diff --git a/include/linux/switch-arizona.h b/include/linux/switch-arizona.h index 204d08bcf14..eafcc376b95 100644 --- a/include/linux/switch-arizona.h +++ b/include/linux/switch-arizona.h @@ -57,6 +57,7 @@ extern void arizona_set_headphone_imp(struct arizona_extcon_info *info, int imp); extern const struct arizona_jd_state arizona_hpdet_moisture; +extern const struct arizona_jd_state arizona_hpdet_moisture_r; extern const struct arizona_jd_state arizona_hpdet_left; extern const struct arizona_jd_state arizona_hpdet_right; extern const struct arizona_jd_state arizona_micd_button; @@ -64,6 +65,7 @@ extern const struct arizona_jd_state arizona_micd_microphone; extern const struct arizona_jd_state arizona_micd_adc_mic; extern const struct arizona_jd_state arizona_hpdet_acc_id; extern const struct arizona_jd_state arizona_antenna_moisture; +extern const struct arizona_jd_state arizona_antenna_moisture_r; extern const struct arizona_jd_state arizona_antenna_mic_det; extern const struct arizona_jd_state arizona_antenna_oc_det; extern const struct arizona_jd_state arizona_antenna_hp_det; From 6f62b2cd5254c1bb49eb05a06f7b43e126fcfe9d Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 18 Mar 2015 06:51:56 +0000 Subject: [PATCH 0703/1167] switch: arizona: reset variables used for button validation Change-Id: I35bb007da70036f9324018fa540382308f06322b Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 184697e4136..c4617d83b4d 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1799,6 +1799,8 @@ static int arizona_antenna_button_start(struct arizona_extcon_info *info) int i, micd_lvl; int hp_imp_range_hi = -1; + info->button_impedance = 0; + info->button_check = 0; info->wait_for_mic = false; /* check if impedance level is supported */ @@ -1880,7 +1882,7 @@ static int arizona_antenna_button_reading(struct arizona_extcon_info *info, int i; info->button_impedance = 0; - info->button_check = false; + info->button_check = 0; /* Clear any currently pressed buttons */ for (i = 0; i < info->num_micd_ranges; i++) From f3db1710644a7347f711984981c2c090780af058 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 18 Mar 2015 06:56:08 +0000 Subject: [PATCH 0704/1167] switch: arizona: enable important logging information Change-Id: I8d7dfc6d77de33b911bddca8baccb8d9f743177b Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index c4617d83b4d..5c657f29548 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -191,7 +191,7 @@ static DEVICE_ATTR(mic_impedance, S_IRUGO, arizona_extcon_mic_show, NULL); inline void arizona_extcon_report(struct arizona_extcon_info *info, int state) { - dev_dbg(info->arizona->dev, "Switch Report: %d\n", state); + dev_info(info->arizona->dev, "Switch Report: %d\n", state); switch_set_state(&info->edev, state); } EXPORT_SYMBOL_GPL(arizona_extcon_report); @@ -1461,7 +1461,6 @@ static int arizona_micd_button_process(struct arizona_extcon_info *info, int i, key; if (val < MICROPHONE_MIN_OHM) { - dev_dbg(arizona->dev, "Mic button detected\n"); for (i = 0; i < info->num_micd_ranges; i++) input_report_key(info->input, @@ -1472,6 +1471,7 @@ static int arizona_micd_button_process(struct arizona_extcon_info *info, key = info->micd_ranges[i].key; input_report_key(info->input, key, 1); input_sync(info->input); + dev_info(arizona->dev, "Mic button detected (%d)\n", key); break; } } @@ -1480,7 +1480,7 @@ static int arizona_micd_button_process(struct arizona_extcon_info *info, dev_warn(arizona->dev, "Button level %u out of range\n", val); } else { - dev_dbg(arizona->dev, "Mic button released\n"); + dev_info(arizona->dev, "Mic button released\n"); for (i = 0; i < info->num_micd_ranges; i++) input_report_key(info->input, info->micd_ranges[i].key, 0); From 7fc05c86c65d52d804a3e41c432e01488cd3e770 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 11 Mar 2015 12:54:24 +0000 Subject: [PATCH 0705/1167] mfd: arizona: Fix missing mutex unlock on cache sync error The error path when resume failed to sync the CLEARWATER_CP_MODE setting was failing to unlock the mutex and restore the correct codec state. This patch fixes that. Change-Id: Ia799ec01aac47da820ff4ab722356a7febd0b1e5 Signed-off-by: Richard Fitzgerald --- drivers/mfd/arizona-core.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 8143c426510..66febfceb6e 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -728,12 +728,13 @@ static int arizona_runtime_resume(struct device *dev) regmap_write(arizona->regmap, 0x80, 0x3); ret = regcache_sync_region(arizona->regmap, CLEARWATER_CP_MODE, CLEARWATER_CP_MODE); + regmap_write(arizona->regmap, 0x80, 0x0); + mutex_unlock(&arizona->reg_setting_lock); + if (ret != 0) { dev_err(arizona->dev, "Failed to restore keyed cache\n"); goto err; } - regmap_write(arizona->regmap, 0x80, 0x0); - mutex_unlock(&arizona->reg_setting_lock); break; } From ba77e254b7810f003ede69b30192ad791fa3defe Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 10 Mar 2015 09:02:58 +0000 Subject: [PATCH 0706/1167] ASoC: florida: add alsa controls to limit output volume Change-Id: Ibd71ab51b229a256d27103e94a968114b5a73abc Signed-off-by: Nikesh Oswal --- sound/soc/codecs/florida.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 7e83244c7c6..e7ec5b49e31 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -244,6 +244,7 @@ static int florida_adsp_power_ev(struct snd_soc_dapm_widget *w, static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); +static DECLARE_TLV_DB_SCALE(vol_limit_tlv, -600, 50, 116); static DECLARE_TLV_DB_SCALE(noise_tlv, 0, 600, 0); static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); @@ -519,6 +520,25 @@ SOC_DOUBLE_R_TLV("SPKDAT2 Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_6L, ARIZONA_DAC_DIGITAL_VOLUME_6R, ARIZONA_OUT6L_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_DOUBLE_R_RANGE_TLV("HPOUT1 Volume Limit", ARIZONA_DAC_VOLUME_LIMIT_1L, + ARIZONA_DAC_VOLUME_LIMIT_1R, ARIZONA_OUT1L_VOL_LIM_SHIFT, + 0x74, 0x8C, 0, vol_limit_tlv), +SOC_DOUBLE_R_RANGE_TLV("HPOUT2 Volume Limit", ARIZONA_DAC_VOLUME_LIMIT_2L, + ARIZONA_DAC_VOLUME_LIMIT_2R, ARIZONA_OUT1L_VOL_LIM_SHIFT, + 0x74, 0x8C, 0, vol_limit_tlv), +SOC_DOUBLE_R_RANGE_TLV("HPOUT3 Volume Limit", ARIZONA_DAC_VOLUME_LIMIT_3L, + ARIZONA_DAC_VOLUME_LIMIT_3R, ARIZONA_OUT1L_VOL_LIM_SHIFT, + 0x74, 0x8C, 0, vol_limit_tlv), +SOC_DOUBLE_R_RANGE_TLV("Speaker Volume Limit", ARIZONA_OUT_VOLUME_4L, + ARIZONA_OUT_VOLUME_4R, ARIZONA_OUT1L_VOL_LIM_SHIFT, + 0x74, 0x8C, 0, vol_limit_tlv), +SOC_DOUBLE_R_RANGE_TLV("SPKDAT1 Volume Limit", ARIZONA_DAC_VOLUME_LIMIT_5L, + ARIZONA_DAC_VOLUME_LIMIT_5R, ARIZONA_OUT1L_VOL_LIM_SHIFT, + 0x74, 0x8C, 0, vol_limit_tlv), +SOC_DOUBLE_R_RANGE_TLV("SPKDAT2 Volume Limit", ARIZONA_DAC_VOLUME_LIMIT_6L, + ARIZONA_DAC_VOLUME_LIMIT_6R, ARIZONA_OUT1L_VOL_LIM_SHIFT, + 0x74, 0x8C, 0, vol_limit_tlv), + SOC_DOUBLE("SPKDAT1 Switch", ARIZONA_PDM_SPK1_CTRL_1, ARIZONA_SPK1L_MUTE_SHIFT, ARIZONA_SPK1R_MUTE_SHIFT, 1, 1), SOC_DOUBLE("SPKDAT2 Switch", ARIZONA_PDM_SPK2_CTRL_1, ARIZONA_SPK2L_MUTE_SHIFT, From 734b861a463235d2307a3b659904278038bb14a4 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 19 Mar 2015 07:11:54 +0000 Subject: [PATCH 0707/1167] Revert "switch: arizona: enable important logging information" This reverts commit f3db1710644a7347f711984981c2c090780af058. Change-Id: I8c80587d734254238da68f6842f7016ac88f07e8 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 5c657f29548..c4617d83b4d 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -191,7 +191,7 @@ static DEVICE_ATTR(mic_impedance, S_IRUGO, arizona_extcon_mic_show, NULL); inline void arizona_extcon_report(struct arizona_extcon_info *info, int state) { - dev_info(info->arizona->dev, "Switch Report: %d\n", state); + dev_dbg(info->arizona->dev, "Switch Report: %d\n", state); switch_set_state(&info->edev, state); } EXPORT_SYMBOL_GPL(arizona_extcon_report); @@ -1461,6 +1461,7 @@ static int arizona_micd_button_process(struct arizona_extcon_info *info, int i, key; if (val < MICROPHONE_MIN_OHM) { + dev_dbg(arizona->dev, "Mic button detected\n"); for (i = 0; i < info->num_micd_ranges; i++) input_report_key(info->input, @@ -1471,7 +1472,6 @@ static int arizona_micd_button_process(struct arizona_extcon_info *info, key = info->micd_ranges[i].key; input_report_key(info->input, key, 1); input_sync(info->input); - dev_info(arizona->dev, "Mic button detected (%d)\n", key); break; } } @@ -1480,7 +1480,7 @@ static int arizona_micd_button_process(struct arizona_extcon_info *info, dev_warn(arizona->dev, "Button level %u out of range\n", val); } else { - dev_info(arizona->dev, "Mic button released\n"); + dev_dbg(arizona->dev, "Mic button released\n"); for (i = 0; i < info->num_micd_ranges; i++) input_report_key(info->input, info->micd_ranges[i].key, 0); From e89ff9b7a0a750f95e0de6402931aa011f568c71 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 17 Mar 2015 14:54:58 +0000 Subject: [PATCH 0708/1167] regulator: arizona-ldo1: Add ramp time for HI_PWR For regulators that support HI_PWR we need to ensure that switching to 1.8v allows time for the regulator to reach that voltage. Change-Id: Id01a10ad6c738a6369e81c8e80a33cadce1f07e2 Signed-off-by: Richard Fitzgerald --- drivers/regulator/arizona-ldo1.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/regulator/arizona-ldo1.c b/drivers/regulator/arizona-ldo1.c index 74ed9ab023c..eaae1d71146 100644 --- a/drivers/regulator/arizona-ldo1.c +++ b/drivers/regulator/arizona-ldo1.c @@ -107,6 +107,17 @@ static int arizona_ldo1_hc_get_voltage_sel(struct regulator_dev *rdev) return (val & ARIZONA_LDO1_VSEL_MASK) >> ARIZONA_LDO1_VSEL_SHIFT; } +static int arizona_ldo1_hc_set_voltage_time_sel(struct regulator_dev *rdev, + unsigned int old_selector, + unsigned int new_selector) +{ + /* if moving to 1.8v allow time for it to reach voltage */ + if (new_selector == rdev->desc->n_voltages - 1) + return 25; + else + return 0; +} + static struct regulator_ops arizona_ldo1_hc_ops = { .list_voltage = arizona_ldo1_hc_list_voltage, .map_voltage = arizona_ldo1_hc_map_voltage, @@ -114,6 +125,7 @@ static struct regulator_ops arizona_ldo1_hc_ops = { .set_voltage_sel = arizona_ldo1_hc_set_voltage_sel, .get_bypass = regulator_get_bypass_regmap, .set_bypass = regulator_set_bypass_regmap, + .set_voltage_time_sel = arizona_ldo1_hc_set_voltage_time_sel, }; static const struct regulator_desc arizona_ldo1_hc = { From 8a259894959209bc4c0e20870efee56c068ed275 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 19 Mar 2015 15:42:13 +0000 Subject: [PATCH 0709/1167] ASoC: clearwater: Correct order of channels for DRE enable Change-Id: If1438aa9955d730fc554af56c8df8f5a2fbd991c Signed-off-by: Richard Fitzgerald --- include/linux/mfd/arizona/registers.h | 4 ++++ sound/soc/codecs/clearwater.c | 6 +++--- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 6372b0796a1..3911dd0f7f5 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -5032,6 +5032,10 @@ #define VEGAS_DRE3L_ENA_MASK 0x0020 /* DRE3L_ENA */ #define VEGAS_DRE3L_ENA_SHIFT 5 /* DRE3L_ENA */ #define VEGAS_DRE3L_ENA_WIDTH 1 /* DRE3L_ENA */ +#define VEGAS_DRE3R_ENA 0x0010 /* DRE3R_ENA */ +#define VEGAS_DRE3R_ENA_MASK 0x0010 /* DRE3R_ENA */ +#define VEGAS_DRE3R_ENA_SHIFT 4 /* DRE3R_ENA */ +#define VEGAS_DRE3R_ENA_WIDTH 1 /* DRE3R_ENA */ #define VEGAS_DRE2L_ENA 0x0008 /* DRE2L_ENA */ #define VEGAS_DRE2L_ENA_MASK 0x0008 /* DRE2L_ENA */ #define VEGAS_DRE2L_ENA_SHIFT 3 /* DRE2L_ENA */ diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 1bf64605433..e9c7723faea 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -645,13 +645,13 @@ SOC_DOUBLE("SPKDAT2 Switch", ARIZONA_PDM_SPK2_CTRL_1, ARIZONA_SPK2L_MUTE_SHIFT, ARIZONA_SPK2R_MUTE_SHIFT, 1, 1), SOC_DOUBLE_EXT("HPOUT1 DRE Switch", ARIZONA_DRE_ENABLE, - ARIZONA_DRE1L_ENA_SHIFT, ARIZONA_DRE1R_ENA_SHIFT, 1, 0, + VEGAS_DRE1L_ENA_SHIFT, VEGAS_DRE1R_ENA_SHIFT, 1, 0, snd_soc_get_volsw, clearwater_put_dre), SOC_DOUBLE_EXT("HPOUT2 DRE Switch", ARIZONA_DRE_ENABLE, - ARIZONA_DRE2L_ENA_SHIFT, ARIZONA_DRE2R_ENA_SHIFT, 1, 0, + VEGAS_DRE2L_ENA_SHIFT, VEGAS_DRE2R_ENA_SHIFT, 1, 0, snd_soc_get_volsw, clearwater_put_dre), SOC_DOUBLE_EXT("HPOUT3 DRE Switch", ARIZONA_DRE_ENABLE, - ARIZONA_DRE3L_ENA_SHIFT, ARIZONA_DRE3R_ENA_SHIFT, 1, 0, + VEGAS_DRE3L_ENA_SHIFT, VEGAS_DRE3R_ENA_SHIFT, 1, 0, snd_soc_get_volsw, clearwater_put_dre), SOC_DOUBLE("HPOUT1 EDRE Switch", CLEARWATER_EDRE_ENABLE, From 1fcfd2dafee9326a09de3d2fb64cf4e506339b28 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 19 Mar 2015 11:01:35 +0000 Subject: [PATCH 0710/1167] switch: arizona: fix size of long long constant Change-Id: I9a58574e77e91b4adc27ec9fac9a06f1ddbbc4d7 Signed-off-by: Richard Fitzgerald --- drivers/switch/switch-arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index c4617d83b4d..825e19ba9d2 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -607,7 +607,7 @@ static int arizona_hpdet_d_calibrate(const struct arizona_extcon_info *info, val = (val * 1000000) + info->calib_data[range].dacval_adjust; val = div64_s64(val, info->calib_data[range].C2); - n = div_s64(1000000000000, info->calib_data[range].C3 + + n = div_s64(1000000000000LL, info->calib_data[range].C3 + ((info->calib_data[range].C4_x_C3 * grad_x4) / 4)); n = val - n; if (n == 0) From a22c13204f41b38654e9c1be93da8fb94888c235 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 19 Mar 2015 11:08:22 +0000 Subject: [PATCH 0711/1167] extcon: arizona: fix signedness errors Change-Id: Ib850a97593f6b4509cf93db4cd33991a2e41855e Signed-off-by: Richard Fitzgerald --- drivers/extcon/extcon-arizona.c | 12 ++++++------ include/linux/mfd/arizona/core.h | 5 +++++ include/linux/mfd/arizona/pdata.h | 4 ++-- 3 files changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 2fe73d2bb81..33ea78d083d 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -1267,23 +1267,23 @@ static int arizona_extcon_of_get_pdata(struct arizona *arizona) { struct arizona_pdata *pdata = &arizona->pdata; - arizona_of_read_u32(arizona, "wlf,micd-detect-debounce", false, + arizona_of_read_s32(arizona, "wlf,micd-detect-debounce", false, &pdata->micd_detect_debounce); pdata->micd_pol_gpio = arizona_of_get_named_gpio(arizona, "wlf,micd-pol-gpio", false); - arizona_of_read_u32(arizona, "wlf,micd-bias-start-time", false, + arizona_of_read_s32(arizona, "wlf,micd-bias-start-time", false, &pdata->micd_bias_start_time); - arizona_of_read_u32(arizona, "wlf,micd-rate", false, + arizona_of_read_s32(arizona, "wlf,micd-rate", false, &pdata->micd_rate); - arizona_of_read_u32(arizona, "wlf,micd-dbtime", false, + arizona_of_read_s32(arizona, "wlf,micd-dbtime", false, &pdata->micd_dbtime); - arizona_of_read_u32(arizona, "wlf,micd-timeout", false, + arizona_of_read_s32(arizona, "wlf,micd-timeout", false, &pdata->micd_timeout); pdata->micd_force_micbias = @@ -1309,7 +1309,7 @@ static int arizona_extcon_of_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,gpsw", false, &pdata->gpsw); - arizona_of_read_u32(arizona, "wlf,init-mic-delay", false, + arizona_of_read_s32(arizona, "wlf,init-mic-delay", false, &pdata->init_mic_delay); arizona_of_read_u32(arizona, "wlf,micd-clamp-mode", false, diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 06df657e8ef..75fe067ae72 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -206,4 +206,9 @@ extern void arizona_florida_mute_analog(struct arizona* arizona, unsigned int mute); extern void arizona_florida_clear_input(struct arizona *arizona); +static inline int arizona_of_read_s32(struct arizona *arizona, const char *prop, + bool mandatory, s32 *data) +{ + return arizona_of_read_u32(arizona, prop, mandatory, (u32 *)data); +} #endif diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 34480360dff..647980224d3 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -238,7 +238,7 @@ struct arizona_pdata { int num_micd_ranges; /** Mic detect clamp function */ - int micd_clamp_mode; + unsigned int micd_clamp_mode; /** Headset polarity configurations */ struct arizona_micd_config *micd_configs; @@ -272,7 +272,7 @@ struct arizona_pdata { int irq_gpio; /** General purpose switch control */ - int gpsw; + unsigned int gpsw; /** Callback which is called when the trigger phrase is detected */ void (*ez2ctrl_trigger)(void); From a3ea8f03fc1bbcff66338ac34b56909a9a247909 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 19 Mar 2015 10:56:01 +0000 Subject: [PATCH 0712/1167] switch: arizona: Fix signedness warnings Change-Id: I303011ece7ef0964f3b14e741395b4f834d60f85 Signed-off-by: Richard Fitzgerald --- drivers/switch/switch-arizona.c | 34 ++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 825e19ba9d2..843b5f11b32 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -2789,38 +2789,38 @@ static int arizona_extcon_of_get_pdata(struct arizona *arizona) { struct arizona_pdata *pdata = &arizona->pdata; - arizona_of_read_u32(arizona, "wlf,micd-detect-debounce", false, + arizona_of_read_s32(arizona, "wlf,micd-detect-debounce", false, &pdata->micd_detect_debounce); - arizona_of_read_u32(arizona, "wlf,micd-manual-debounce", false, + arizona_of_read_s32(arizona, "wlf,micd-manual-debounce", false, &pdata->micd_manual_debounce); - arizona_of_read_u32(arizona, "wlf,antenna-manual-debounce", false, + arizona_of_read_s32(arizona, "wlf,antenna-manual-debounce", false, &pdata->antenna_manual_debounce); - arizona_of_read_u32(arizona, "wlf,antenna-manual-db-plugout", false, + arizona_of_read_s32(arizona, "wlf,antenna-manual-db-plugout", false, &pdata->antenna_manual_db_plugout); - arizona_of_read_u32(arizona, "wlf,antenna-hp-imp-range-lo", false, + arizona_of_read_s32(arizona, "wlf,antenna-hp-imp-range-lo", false, &pdata->antenna_hp_imp_range_lo); - arizona_of_read_u32(arizona, "wlf,antenna-hp-imp-range-hi", false, + arizona_of_read_s32(arizona, "wlf,antenna-hp-imp-range-hi", false, &pdata->antenna_hp_imp_range_hi); pdata->micd_pol_gpio = arizona_of_get_named_gpio(arizona, "wlf,micd-pol-gpio", false); - arizona_of_read_u32(arizona, "wlf,micd-bias-start-time", false, + arizona_of_read_s32(arizona, "wlf,micd-bias-start-time", false, &pdata->micd_bias_start_time); - arizona_of_read_u32(arizona, "wlf,micd-rate", false, + arizona_of_read_s32(arizona, "wlf,micd-rate", false, &pdata->micd_rate); - arizona_of_read_u32(arizona, "wlf,micd-dbtime", false, + arizona_of_read_s32(arizona, "wlf,micd-dbtime", false, &pdata->micd_dbtime); - arizona_of_read_u32(arizona, "wlf,micd-timeout", false, + arizona_of_read_s32(arizona, "wlf,micd-timeout", false, &pdata->micd_timeout); pdata->micd_force_micbias = @@ -2852,28 +2852,28 @@ static int arizona_extcon_of_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,gpsw", false, &pdata->gpsw); - arizona_of_read_u32(arizona, "wlf,init-mic-delay", false, + arizona_of_read_s32(arizona, "wlf,init-mic-delay", false, &pdata->init_mic_delay); - arizona_of_read_u32(arizona, "wlf,fixed-hpdet-imp", false, + arizona_of_read_s32(arizona, "wlf,fixed-hpdet-imp", false, &pdata->fixed_hpdet_imp); - arizona_of_read_u32(arizona, "wlf,hpdet-moisture-imp", false, + arizona_of_read_s32(arizona, "wlf,hpdet-moisture-imp", false, &pdata->hpdet_moisture_imp); - arizona_of_read_u32(arizona, "wlf,hpdet-moisture-debounce", false, + arizona_of_read_s32(arizona, "wlf,hpdet-moisture-debounce", false, &pdata->hpdet_moisture_debounce); - arizona_of_read_u32(arizona, "wlf,hpdet-short-circuit-imp", false, + arizona_of_read_s32(arizona, "wlf,hpdet-short-circuit-imp", false, &pdata->hpdet_short_circuit_imp); - arizona_of_read_u32(arizona, "wlf,hpdet-channel", false, + arizona_of_read_s32(arizona, "wlf,hpdet-channel", false, &pdata->hpdet_channel); arizona_of_read_u32(arizona, "wlf,moisture-det-channel", false, &pdata->moisture_det_channel); - arizona_of_read_u32(arizona, "wlf,jd-wake-time", false, + arizona_of_read_s32(arizona, "wlf,jd-wake-time", false, &pdata->jd_wake_time); arizona_of_read_u32(arizona, "wlf,micd-clamp-mode", false, From 2db003c68aacefc8edb2f0ff8c0a7b083ef8dd74 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 18 Mar 2015 15:29:23 +0000 Subject: [PATCH 0713/1167] mfd: arizona: Add HP_RATE field define for Vegas Change-Id: I1e6631d1a6998c504e4b69ae3d04e8ffcb8ae85d Signed-off-by: Richard Fitzgerald --- include/linux/mfd/arizona/registers.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 3911dd0f7f5..358fc78d40e 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -3679,6 +3679,9 @@ #define CLEARWATER_HP_RATE_MASK 0x0006 /* HP_RATE - [2:1] */ #define CLEARWATER_HP_RATE_SHIFT 1 /* HP_RATE - [2:1] */ #define CLEARWATER_HP_RATE_WIDTH 2 /* HP_RATE - [2:1] */ +#define VEGAS_HP_RATE_MASK 0x0006 /* HP_RATE - [2:1] */ +#define VEGAS_HP_RATE_SHIFT 1 /* HP_RATE - [2:1] */ +#define VEGAS_HP_RATE_WIDTH 2 /* HP_RATE - [2:1] */ #define ARIZONA_HP_RATE 0x0002 /* HP_RATE */ #define ARIZONA_HP_RATE_MASK 0x0002 /* HP_RATE */ #define ARIZONA_HP_RATE_SHIFT 1 /* HP_RATE */ From 33e9195040d10aa2e7c78bdb88a1bb77cdd05067 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 18 Mar 2015 15:32:47 +0000 Subject: [PATCH 0714/1167] switch: arizona: No need to set HP_RATE in fast mode When HP_FAST_MODE is set the HP_RATE field does not have any effect so don't set it. Change-Id: Ia45fb633e76f5e9a89d125da9ceb366239ec4991 Signed-off-by: Richard Fitzgerald --- drivers/switch/switch-arizona.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 843b5f11b32..18ca9a4848b 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1193,14 +1193,12 @@ static int arizona_hpdet_moisture_start(struct arizona_extcon_info *info) case WM1831: case CS47L24: regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, - ARIZONA_HP_RATE | ARIZONA_HP_FAST_MODE, - ARIZONA_HP_RATE | ARIZONA_HP_FAST_MODE); + ARIZONA_HP_FAST_MODE, ARIZONA_HP_FAST_MODE); break; case WM8998: case WM1814: regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, - ARIZONA_HP_RATE | VEGAS_HP_FAST_MODE, - ARIZONA_HP_RATE | VEGAS_HP_FAST_MODE); + VEGAS_HP_FAST_MODE, VEGAS_HP_FAST_MODE); break; default: regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, @@ -1233,12 +1231,12 @@ static void arizona_hpdet_moisture_stop(struct arizona_extcon_info *info) case WM1831: case CS47L24: regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, - ARIZONA_HP_RATE | ARIZONA_HP_FAST_MODE, 0); + ARIZONA_HP_FAST_MODE, 0); break; case WM8998: case WM1814: regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, - ARIZONA_HP_RATE | VEGAS_HP_FAST_MODE, 0); + VEGAS_HP_FAST_MODE, 0); break; default: regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, From e54965ac3fc06332fe186af53fa63472c791414a Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 19 Mar 2015 16:44:58 +0000 Subject: [PATCH 0715/1167] regulator: arizona-micsupp: Use nested mutex lock for the DAPM mutex Change-Id: Iea9e2078231760843d0cc4303f361ab6869aaee9 Signed-off-by: Charles Keepax --- drivers/regulator/arizona-micsupp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/regulator/arizona-micsupp.c b/drivers/regulator/arizona-micsupp.c index 971338b1464..933caa9139c 100644 --- a/drivers/regulator/arizona-micsupp.c +++ b/drivers/regulator/arizona-micsupp.c @@ -102,7 +102,8 @@ static void arizona_micsupp_check_cp(struct work_struct *work) } if (dapm) { - mutex_lock(&dapm->card->dapm_mutex); + mutex_lock_nested(&dapm->card->dapm_mutex, + SND_SOC_DAPM_CLASS_RUNTIME); if ((reg & (ARIZONA_CPMIC_ENA | ARIZONA_CPMIC_BYPASS)) == ARIZONA_CPMIC_ENA) { From 30776de96328ccbf4bde9f6a1e8ab0b5eb32b888 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 20 Mar 2015 11:49:00 +0000 Subject: [PATCH 0716/1167] mfd: arizona: Add rate lock to gate access to rate registers Change-Id: Ie253c221b0fca04d07f8037613d705c56fba07a4 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 1 + include/linux/mfd/arizona/core.h | 2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 66febfceb6e..6490a96f5ac 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1513,6 +1513,7 @@ int arizona_dev_init(struct arizona *arizona) mutex_init(&arizona->clk_lock); mutex_init(&arizona->subsys_max_lock); mutex_init(&arizona->reg_setting_lock); + mutex_init(&arizona->rate_lock); if (dev_get_platdata(arizona->dev)) memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 75fe067ae72..7501132ff5e 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -169,6 +169,8 @@ struct arizona { #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_MFD_ARIZONA_DEFERRED_RESUME) struct work_struct deferred_resume_work; #endif + + struct mutex rate_lock; }; #define ARIZONA_DVFS_SR1_RQ 0x00000001 From 1a7c587c4a44b5f9290205b1c8bb2dcd010497f0 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 20 Mar 2015 14:58:34 +0000 Subject: [PATCH 0717/1167] ASoC: arizona: Only set mixer sources when a block powers up Change-Id: Iebaae222e4ed5c60979405bf0ba5969fb2ccbfa2 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 62 ++++++++++++++++++++++++++++++++++++++ sound/soc/codecs/arizona.h | 22 +++++++++++--- 2 files changed, 79 insertions(+), 5 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index fc927229148..ea14b5df26e 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -218,6 +218,68 @@ int arizona_init_spk(struct snd_soc_codec *codec) } EXPORT_SYMBOL_GPL(arizona_init_spk); +int arizona_mux_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol); + struct snd_soc_dapm_widget *widget = wlist->widgets[0]; + struct snd_soc_codec *codec = widget->codec; + struct snd_soc_card *card = codec->card; + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + unsigned int val, mask; + int ret; + + mutex_lock_nested(&card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); + + ret = widget->power_check(widget); + if (ret) { + val = e->values[ucontrol->value.enumerated.item[0]]; + val <<= e->shift_l; + mask = e->mask << e->shift_l; + + mutex_lock(&arizona->rate_lock); + snd_soc_update_bits(codec, e->reg, mask, val); + mutex_unlock(&arizona->rate_lock); + } + + mutex_unlock(&card->dapm_mutex); + + return snd_soc_dapm_put_enum_virt(kcontrol, ucontrol); +} +EXPORT_SYMBOL_GPL(arizona_mux_put); + +int arizona_mux_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + struct soc_enum *e; + unsigned int val, mask; + int ret; + + e = (struct soc_enum *)w->kcontrols[0]->private_value; + mask = e->mask << e->shift_l; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + val = e->values[w->value]; + break; + case SND_SOC_DAPM_PRE_PMD: + val = 0; + break; + default: + return -EINVAL; + } + + mutex_lock(&arizona->rate_lock); + ret = regmap_update_bits(arizona->regmap, e->reg, mask, val); + mutex_unlock(&arizona->rate_lock); + + return ret; +} +EXPORT_SYMBOL_GPL(arizona_mux_event); + int arizona_adsp_power_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 6917c1a5cec..97fbd178684 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -127,9 +127,13 @@ extern unsigned int arizona_v2_mixer_values[ARIZONA_V2_NUM_MIXER_INPUTS]; SOC_VALUE_ENUM_SINGLE_DECL(name, reg, 0, 0xff, \ arizona_mixer_texts, arizona_mixer_values) -#define ARIZONA_MUX_CTL_DECL(name) \ - const struct snd_kcontrol_new name##_mux = \ - SOC_DAPM_VALUE_ENUM("Route", name##_enum) +#define ARIZONA_MUX_CTL_DECL(xname) \ + const struct snd_kcontrol_new xname##_mux = { \ + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "Route", \ + .info = snd_soc_info_enum_double, \ + .get = snd_soc_dapm_get_enum_virt, \ + .put = arizona_mux_put, \ + .private_value = (unsigned long)&xname##_enum } #define ARIZONA_MUX_ENUMS(name, base_reg) \ static ARIZONA_MUX_ENUM_DECL(name##_enum, base_reg); \ @@ -171,8 +175,11 @@ extern unsigned int arizona_v2_mixer_values[ARIZONA_V2_NUM_MIXER_INPUTS]; CLEARWATER_MUX_ENUMS(name##_aux5, base_reg + 32); \ CLEARWATER_MUX_ENUMS(name##_aux6, base_reg + 40) -#define ARIZONA_MUX(name, ctrl) \ - SND_SOC_DAPM_VALUE_MUX(name, SND_SOC_NOPM, 0, 0, ctrl) +#define ARIZONA_MUX(wname, wctrl) \ +{ .id = snd_soc_dapm_value_mux, .name = wname, .reg = SND_SOC_NOPM, \ + .shift = 0, .invert = 0, .kcontrol_news = wctrl, \ + .num_kcontrols = 1, .event = arizona_mux_event, \ + .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD } #define ARIZONA_MUX_WIDGETS(name, name_str) \ ARIZONA_MUX(name_str " Input", &name##_mux) @@ -309,6 +316,11 @@ extern int arizona_anc_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); +extern int arizona_mux_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); +extern int arizona_mux_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event); + extern int arizona_put_sample_rate_enum(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); From 6443258b1534791acbe95327ad7904257136f474 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Tue, 17 Mar 2015 13:41:00 +0000 Subject: [PATCH 0718/1167] ASoC: wm_adsp: Add codec specific rate_put callback for "DSP[n] Rate" Change-Id: I1abd2a63563b75cf0daa16e6919f3d3206a9fa5a Signed-off-by: Nariman Poushin Signed-off-by: Charles Keepax --- sound/soc/codecs/clearwater.c | 10 ++++++++++ sound/soc/codecs/wm_adsp.c | 8 +++----- sound/soc/codecs/wm_adsp.h | 2 ++ 3 files changed, 15 insertions(+), 5 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index e9c7723faea..56a26aa759b 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -197,6 +197,13 @@ static int clearwater_frf_bytes_put(struct snd_kcontrol *kcontrol, return ret; } +static int clearwater_adsp_rate_put_cb(struct wm_adsp *adsp, + unsigned int mask, + unsigned int val) +{ + return regmap_update_bits(adsp->regmap, adsp->base, mask, val); +} + static int clearwater_adsp_power_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) @@ -2674,6 +2681,9 @@ static int clearwater_probe(struct platform_device *pdev) = arizona->pdata.num_fw_defs[i]; } + clearwater->core.adsp[i].rate_put_cb = + clearwater_adsp_rate_put_cb; + ret = wm_adsp2_init(&clearwater->core.adsp[i], &clearwater->fw_lock); if (ret != 0) return ret; diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index ba6ed9c4645..ede36386280 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -526,10 +526,8 @@ static int wm_adsp2v2_rate_put(struct snd_kcontrol *kcontrol, adsp->rate_cache = val; if (adsp->running) { - ret = regmap_update_bits(adsp->regmap, - adsp->base, - ADSP2V2_RATE_MASK, - val << ADSP2V2_RATE_SHIFT); + ret = adsp->rate_put_cb(adsp, ADSP2V2_RATE_MASK, + val << ADSP2V2_RATE_SHIFT); } } @@ -2252,7 +2250,7 @@ static void wm_adsp2_set_dspclk(struct wm_adsp *dsp, unsigned int freq) freq <<= ADSP2V2_CLK_SEL_SHIFT; freq |= dsp->rate_cache << ADSP2V2_RATE_SHIFT; - ret = regmap_update_bits(dsp->regmap, dsp->base, mask, freq); + ret = dsp->rate_put_cb(dsp, mask, freq); if (ret != 0) { adsp_err(dsp, "Failed to set DSP_CLK rate: %d\n", ret); mutex_unlock(&dsp->rate_lock); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index fabeef91299..5ed2d7cc868 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -88,6 +88,8 @@ struct wm_adsp { unsigned int rate_cache; struct mutex rate_lock; + int (*rate_put_cb) (struct wm_adsp *adsp, unsigned int mask, + unsigned int val); struct list_head alg_regions; From 4495b6bf163f449fc0030628af6bddc656c97f29 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Wed, 18 Mar 2015 17:03:41 +0000 Subject: [PATCH 0719/1167] ASoC: arizona: Apply rate setting constraint for AIFs Change-Id: I704d6056aec2965ef41c4a175877019a4ed4b98a Signed-off-by: Nariman Poushin Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 281 ++++++++++++++++++++++++++++++++++++- sound/soc/codecs/arizona.h | 10 ++ 2 files changed, 288 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index ea14b5df26e..83f5f55e9a3 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -81,6 +81,205 @@ #define arizona_aif_dbg(_dai, fmt, ...) \ dev_dbg(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__) +static const int arizona_aif1_inputs[32] = { + ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE, + ARIZONA_AIF1TX1MIX_INPUT_2_SOURCE, + ARIZONA_AIF1TX1MIX_INPUT_3_SOURCE, + ARIZONA_AIF1TX1MIX_INPUT_4_SOURCE, + ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE, + ARIZONA_AIF1TX2MIX_INPUT_2_SOURCE, + ARIZONA_AIF1TX2MIX_INPUT_3_SOURCE, + ARIZONA_AIF1TX2MIX_INPUT_4_SOURCE, + ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE, + ARIZONA_AIF1TX3MIX_INPUT_2_SOURCE, + ARIZONA_AIF1TX3MIX_INPUT_3_SOURCE, + ARIZONA_AIF1TX3MIX_INPUT_4_SOURCE, + ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE, + ARIZONA_AIF1TX4MIX_INPUT_2_SOURCE, + ARIZONA_AIF1TX4MIX_INPUT_3_SOURCE, + ARIZONA_AIF1TX4MIX_INPUT_4_SOURCE, + ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE, + ARIZONA_AIF1TX5MIX_INPUT_2_SOURCE, + ARIZONA_AIF1TX5MIX_INPUT_3_SOURCE, + ARIZONA_AIF1TX5MIX_INPUT_4_SOURCE, + ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE, + ARIZONA_AIF1TX6MIX_INPUT_2_SOURCE, + ARIZONA_AIF1TX6MIX_INPUT_3_SOURCE, + ARIZONA_AIF1TX6MIX_INPUT_4_SOURCE, + ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE, + ARIZONA_AIF1TX7MIX_INPUT_2_SOURCE, + ARIZONA_AIF1TX7MIX_INPUT_3_SOURCE, + ARIZONA_AIF1TX7MIX_INPUT_4_SOURCE, + ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE, + ARIZONA_AIF1TX8MIX_INPUT_2_SOURCE, + ARIZONA_AIF1TX8MIX_INPUT_3_SOURCE, + ARIZONA_AIF1TX8MIX_INPUT_4_SOURCE, +}; + +static const int arizona_aif2_inputs[32] = { + ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE, + ARIZONA_AIF2TX1MIX_INPUT_2_SOURCE, + ARIZONA_AIF2TX1MIX_INPUT_3_SOURCE, + ARIZONA_AIF2TX1MIX_INPUT_4_SOURCE, + ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE, + ARIZONA_AIF2TX2MIX_INPUT_2_SOURCE, + ARIZONA_AIF2TX2MIX_INPUT_3_SOURCE, + ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE, + ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE, + ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE, + ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE, + ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE, + ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE, + ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE, + ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE, + ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE, + ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE, + ARIZONA_AIF2TX5MIX_INPUT_2_SOURCE, + ARIZONA_AIF2TX5MIX_INPUT_3_SOURCE, + ARIZONA_AIF2TX5MIX_INPUT_4_SOURCE, + ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE, + ARIZONA_AIF2TX6MIX_INPUT_2_SOURCE, + ARIZONA_AIF2TX6MIX_INPUT_3_SOURCE, + ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE, + ARIZONA_AIF2TX7MIX_INPUT_1_SOURCE, + ARIZONA_AIF2TX7MIX_INPUT_2_SOURCE, + ARIZONA_AIF2TX7MIX_INPUT_3_SOURCE, + ARIZONA_AIF2TX7MIX_INPUT_4_SOURCE, + ARIZONA_AIF2TX8MIX_INPUT_1_SOURCE, + ARIZONA_AIF2TX8MIX_INPUT_2_SOURCE, + ARIZONA_AIF2TX8MIX_INPUT_3_SOURCE, + ARIZONA_AIF2TX8MIX_INPUT_4_SOURCE, +}; + +static const int arizona_aif3_inputs[8] = { + ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE, + ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE, + ARIZONA_AIF3TX1MIX_INPUT_3_SOURCE, + ARIZONA_AIF3TX1MIX_INPUT_4_SOURCE, + ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE, + ARIZONA_AIF3TX2MIX_INPUT_2_SOURCE, + ARIZONA_AIF3TX2MIX_INPUT_3_SOURCE, + ARIZONA_AIF3TX2MIX_INPUT_4_SOURCE, +}; + +static const int arizona_aif4_inputs[8] = { + ARIZONA_AIF4TX1MIX_INPUT_1_SOURCE, + ARIZONA_AIF4TX1MIX_INPUT_2_SOURCE, + ARIZONA_AIF4TX1MIX_INPUT_3_SOURCE, + ARIZONA_AIF4TX1MIX_INPUT_4_SOURCE, + ARIZONA_AIF4TX2MIX_INPUT_1_SOURCE, + ARIZONA_AIF4TX2MIX_INPUT_2_SOURCE, + ARIZONA_AIF4TX2MIX_INPUT_3_SOURCE, + ARIZONA_AIF4TX2MIX_INPUT_4_SOURCE, +}; + +static int arizona_aif_sources_cache[ARRAY_SIZE(arizona_aif1_inputs)]; + +static int arizona_get_sources(struct arizona *arizona, + struct snd_soc_dai *dai, + const int **source, int *lim) +{ + int ret = 0; + + *lim = dai->driver->playback.channels_max * 4; + + switch (dai->driver->base) { + case ARIZONA_AIF1_BCLK_CTRL: + *source = arizona_aif1_inputs; + break; + case ARIZONA_AIF2_BCLK_CTRL: + *source = arizona_aif2_inputs; + break; + case ARIZONA_AIF3_BCLK_CTRL: + *source = arizona_aif3_inputs; + break; + case ARIZONA_AIF4_BCLK_CTRL: + *source = arizona_aif4_inputs; + break; + default: + ret = -EINVAL; + break; + } + + return ret; +} + +int arizona_cache_and_clear_sources(struct arizona *arizona, + const int *sources, + int *cache, + int lim) +{ + int ret = 0; + int i; + + for (i = 0; i < lim; i++) + cache[i] = 0; + + for (i = 0; i < lim; i++) { + ret = regmap_read(arizona->regmap, + sources[i], + &cache[i]); + + dev_dbg(arizona->dev, + "%s addr: 0x%04x value: 0x%04x\n", + __func__, sources[i], cache[i]); + + if (ret != 0) { + dev_err(arizona->dev, + "%s Failed to cache AIF:0x%04x inputs: %d\n", + __func__, sources[i], ret); + break; + } + + ret = regmap_write(arizona->regmap, + sources[i], + 0); + + if (ret != 0) { + dev_err(arizona->dev, + "%s Failed to clear AIF:0x%04x inputs: %d\n", + __func__, sources[i], ret); + break; + } + + } + + return ret; +} +EXPORT_SYMBOL_GPL(arizona_cache_and_clear_sources); + +int arizona_restore_sources(struct arizona *arizona, + const int *sources, + int *cache, + int lim) +{ + int ret = 0; + int i; + + for (i = 0; i < lim; i++) { + + dev_dbg(arizona->dev, + "%s addr: 0x%04x value: 0x%04x\n", + __func__, sources[i], cache[i]); + + ret = regmap_write(arizona->regmap, + sources[i], + cache[i]); + + if (ret != 0) { + dev_err(arizona->dev, + "%s Failed to restore AIF:0x%04x inputs: %d\n", + __func__, sources[i], ret); + break; + } + + } + + return ret; + +} +EXPORT_SYMBOL_GPL(arizona_restore_sources); + static int arizona_spk_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) @@ -2654,7 +2853,11 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1]; int base = dai->driver->base; - int i, sr_val, ret; + int ret = 0, err; + int i, sr_val, lim; + const int *sources; + unsigned int cur, tar; + bool change_rate = true; /* * We will need to be more flexible than this in future, @@ -2692,6 +2895,63 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, break; } + switch (dai_priv->clk) { + case ARIZONA_CLK_SYSCLK: + tar = 0 << ARIZONA_AIF1_RATE_SHIFT; + break; + case ARIZONA_CLK_SYSCLK_2: + tar = 1 << ARIZONA_AIF1_RATE_SHIFT; + break; + case ARIZONA_CLK_SYSCLK_3: + tar = 2 << ARIZONA_AIF1_RATE_SHIFT; + break; + case ARIZONA_CLK_ASYNCCLK: + tar = 8 << ARIZONA_AIF1_RATE_SHIFT; + break; + case ARIZONA_CLK_ASYNCCLK_2: + tar = 9 << ARIZONA_AIF1_RATE_SHIFT; + break; + default: + return -EINVAL; + } + + ret = regmap_read(priv->arizona->regmap, + base + ARIZONA_AIF_RATE_CTRL, &cur); + if (ret != 0) { + arizona_aif_err(dai, "Failed to check rate: %d\n", ret); + return ret; + } + + if ((cur & ARIZONA_AIF1_RATE_MASK) == (tar & ARIZONA_AIF1_RATE_MASK)) + change_rate = false; + + if (change_rate) { + ret = arizona_get_sources(priv->arizona, + dai, + &sources, + &lim); + if (ret != 0) { + arizona_aif_err(dai, + "Failed to get aif sources %d\n", + ret); + return ret; + } + + mutex_lock(&priv->arizona->rate_lock); + + ret = arizona_cache_and_clear_sources(priv->arizona, sources, + arizona_aif_sources_cache, + lim); + if (ret != 0) { + arizona_aif_err(dai, + "Failed to cache and clear aif sources: %d\n", + ret); + goto out; + } + + udelay(300); + } + switch (dai_priv->clk) { case ARIZONA_CLK_SYSCLK: arizona_wm5102_set_dac_comp(codec, params_rate(params)); @@ -2741,10 +3001,25 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, break; default: arizona_aif_err(dai, "Invalid clock %d\n", dai_priv->clk); - return -EINVAL; + ret = -EINVAL; } - return 0; + if (change_rate) + udelay(300); + +out: + if (change_rate) { + err = arizona_restore_sources(priv->arizona, sources, + arizona_aif_sources_cache, lim); + if (err != 0) { + arizona_aif_err(dai, + "Failed to restore sources: %d\n", + err); + } + + mutex_unlock(&priv->arizona->rate_lock); + } + return ret; } static bool arizona_aif_cfg_changed(struct snd_soc_codec *codec, diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 97fbd178684..7817eedcf39 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -330,6 +330,16 @@ extern int arizona_eq_coeff_put(struct snd_kcontrol *kcontrol, extern int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id, int source, unsigned int freq, int dir); +extern int arizona_cache_and_clear_sources(struct arizona *arizona, + const int *sources, + int *cache, + int lim); + +extern int arizona_restore_sources(struct arizona *arizona, + const int *sources, + int *cache, + int lim); + extern const struct snd_soc_dai_ops arizona_dai_ops; extern const struct snd_soc_dai_ops arizona_simple_dai_ops; From cfd8513bff0258307f8d1299e317b18956a8e3a1 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Mon, 16 Mar 2015 14:45:26 +0000 Subject: [PATCH 0720/1167] ASoC: clearwater: Apply constraints for "* Rate" controls We must not modify the rate feeding a particular mixer if any of the inputs to that mixer are non-zero (non-mute) There is also a strict timing constraint for modifying the the rate of a mixer block where any of the mixer sources were "recently" non-zero, "recently" is defined as 1 sample period. Our worst case sample rate is 8kHz which results in a sample period of 125 uS. In order to avoid the rate control put being ineffective until all the mixer sources go to mute, we simply unhook the sources, set the rate and re-apply. Change-Id: I31a97cccead0579b87e80b0be012b03905bd1776 Signed-off-by: Nariman Poushin Signed-off-by: Charles Keepax --- sound/soc/codecs/clearwater.c | 399 ++++++++++++++++++++++++++++++++-- 1 file changed, 382 insertions(+), 17 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 56a26aa759b..6f7d31dd408 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -50,6 +50,141 @@ static int clearwater_frf_bytes_put(struct snd_kcontrol *kcontrol, ((unsigned long)&(struct soc_bytes) \ {.base = xbase, .num_regs = xregs }) } +/* 2 mixer inputs with a stride of n in the register address */ +#define CLEARWATER_MIXER_INPUTS_2_N(_reg, n) \ + (_reg), \ + (_reg) + (1 * (n)) + +/* 4 mixer inputs with a stride of n in the register address */ +#define CLEARWATER_MIXER_INPUTS_4_N(_reg, n) \ + CLEARWATER_MIXER_INPUTS_2_N(_reg, n), \ + CLEARWATER_MIXER_INPUTS_2_N(_reg + (2 * n), n) + +#define CLEARWATER_DSP_MIXER_INPUTS(_reg) \ + CLEARWATER_MIXER_INPUTS_4_N(_reg, 2), \ + CLEARWATER_MIXER_INPUTS_4_N(_reg + 8, 2), \ + CLEARWATER_MIXER_INPUTS_4_N(_reg + 16, 8), \ + CLEARWATER_MIXER_INPUTS_2_N(_reg + 48, 8) + +static const int clearwater_fx_inputs[] = { + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_EQ1MIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_EQ2MIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_EQ3MIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_EQ4MIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_DRC1LMIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_DRC1RMIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_DRC2LMIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_DRC2RMIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_HPLP1MIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_HPLP2MIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_HPLP3MIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_HPLP4MIX_INPUT_1_SOURCE, 2), +}; + +static const int clearwater_asrc1_1_inputs[] = { + CLEARWATER_MIXER_INPUTS_2_N(CLEARWATER_ASRC1_1LMIX_INPUT_1_SOURCE, 8), +}; + +static const int clearwater_asrc1_2_inputs[] = { + CLEARWATER_MIXER_INPUTS_2_N(CLEARWATER_ASRC1_2LMIX_INPUT_1_SOURCE, 8), +}; + +static const int clearwater_asrc2_1_inputs[] = { + CLEARWATER_MIXER_INPUTS_2_N(CLEARWATER_ASRC2_1LMIX_INPUT_1_SOURCE, 8), +}; + +static const int clearwater_asrc2_2_inputs[] = { + CLEARWATER_MIXER_INPUTS_2_N(CLEARWATER_ASRC2_2LMIX_INPUT_1_SOURCE, 8), +}; + +static const int clearwater_isrc1_fsl_inputs[] = { + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE, 8), +}; + +static const int clearwater_isrc1_fsh_inputs[] = { + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE, 8), +}; + +static const int clearwater_isrc2_fsl_inputs[] = { + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE, 8), +}; + +static const int clearwater_isrc2_fsh_inputs[] = { + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE, 8), +}; + +static const int clearwater_isrc3_fsl_inputs[] = { + CLEARWATER_MIXER_INPUTS_2_N(ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE, 8), +}; + +static const int clearwater_isrc3_fsh_inputs[] = { + CLEARWATER_MIXER_INPUTS_2_N(ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE, 8), +}; + +static const int clearwater_isrc4_fsl_inputs[] = { + CLEARWATER_MIXER_INPUTS_2_N(ARIZONA_ISRC4INT1MIX_INPUT_1_SOURCE, 8), +}; + +static const int clearwater_isrc4_fsh_inputs[] = { + CLEARWATER_MIXER_INPUTS_2_N(ARIZONA_ISRC4DEC1MIX_INPUT_1_SOURCE, 8), +}; + +static const int clearwater_out_inputs[] = { + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_OUT1LMIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_OUT1RMIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_OUT2LMIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_OUT2RMIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_OUT3LMIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_OUT3RMIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_OUT4LMIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_OUT4RMIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_OUT5LMIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_OUT5RMIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_OUT6LMIX_INPUT_1_SOURCE, 2), + CLEARWATER_MIXER_INPUTS_4_N(ARIZONA_OUT6RMIX_INPUT_1_SOURCE, 2), +}; + +static const int clearwater_spd1_inputs[] = { + CLEARWATER_MIXER_INPUTS_2_N(ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE, 8), +}; + +static const int clearwater_dsp1_inputs[] = { + CLEARWATER_DSP_MIXER_INPUTS(ARIZONA_DSP1LMIX_INPUT_1_SOURCE), +}; + +static const int clearwater_dsp2_inputs[] = { + CLEARWATER_DSP_MIXER_INPUTS(ARIZONA_DSP2LMIX_INPUT_1_SOURCE), +}; + +static const int clearwater_dsp3_inputs[] = { + CLEARWATER_DSP_MIXER_INPUTS(ARIZONA_DSP3LMIX_INPUT_1_SOURCE), +}; + +static const int clearwater_dsp4_inputs[] = { + CLEARWATER_DSP_MIXER_INPUTS(ARIZONA_DSP4LMIX_INPUT_1_SOURCE), +}; + +static const int clearwater_dsp5_inputs[] = { + CLEARWATER_DSP_MIXER_INPUTS(CLEARWATER_DSP5LMIX_INPUT_1_SOURCE), +}; + +static const int clearwater_dsp6_inputs[] = { + CLEARWATER_DSP_MIXER_INPUTS(CLEARWATER_DSP6LMIX_INPUT_1_SOURCE), +}; + +static const int clearwater_dsp7_inputs[] = { + CLEARWATER_DSP_MIXER_INPUTS(CLEARWATER_DSP7LMIX_INPUT_1_SOURCE), +}; + +static int clearwater_rate_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); + +#define CLEARWATER_RATE_ENUM(xname, xenum) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\ + .info = snd_soc_info_enum_double, \ + .get = snd_soc_get_value_enum_double, .put = clearwater_rate_put, \ + .private_value = (unsigned long)&xenum } + struct clearwater_compr { struct mutex lock; @@ -197,11 +332,241 @@ static int clearwater_frf_bytes_put(struct snd_kcontrol *kcontrol, return ret; } +/* Allow the worst case number of sources (FX Rate currently) */ +static int mixer_sources_cache[ARRAY_SIZE(clearwater_fx_inputs)]; + +static int clearwater_get_sources(unsigned int reg, + const int **cur_sources, int *lim) +{ + int ret = 0; + + switch (reg) { + case ARIZONA_FX_CTRL1: + *cur_sources = clearwater_fx_inputs; + *lim = ARRAY_SIZE(clearwater_fx_inputs); + break; + case CLEARWATER_ASRC1_RATE1: + *cur_sources = clearwater_asrc1_1_inputs; + *lim = ARRAY_SIZE(clearwater_asrc1_1_inputs); + break; + case CLEARWATER_ASRC1_RATE2: + *cur_sources = clearwater_asrc1_2_inputs; + *lim = ARRAY_SIZE(clearwater_asrc1_2_inputs); + break; + case CLEARWATER_ASRC2_RATE1: + *cur_sources = clearwater_asrc2_1_inputs; + *lim = ARRAY_SIZE(clearwater_asrc2_1_inputs); + break; + case CLEARWATER_ASRC2_RATE2: + *cur_sources = clearwater_asrc2_2_inputs; + *lim = ARRAY_SIZE(clearwater_asrc2_2_inputs); + break; + case ARIZONA_ISRC_1_CTRL_1: + *cur_sources = clearwater_isrc1_fsh_inputs; + *lim = ARRAY_SIZE(clearwater_isrc1_fsh_inputs); + break; + case ARIZONA_ISRC_1_CTRL_2: + *cur_sources = clearwater_isrc1_fsl_inputs; + *lim = ARRAY_SIZE(clearwater_isrc1_fsl_inputs); + break; + case ARIZONA_ISRC_2_CTRL_1: + *cur_sources = clearwater_isrc2_fsh_inputs; + *lim = ARRAY_SIZE(clearwater_isrc2_fsh_inputs); + break; + case ARIZONA_ISRC_2_CTRL_2: + *cur_sources = clearwater_isrc2_fsl_inputs; + *lim = ARRAY_SIZE(clearwater_isrc2_fsl_inputs); + break; + case ARIZONA_ISRC_3_CTRL_1: + *cur_sources = clearwater_isrc3_fsh_inputs; + *lim = ARRAY_SIZE(clearwater_isrc3_fsh_inputs); + break; + case ARIZONA_ISRC_3_CTRL_2: + *cur_sources = clearwater_isrc3_fsl_inputs; + *lim = ARRAY_SIZE(clearwater_isrc3_fsl_inputs); + break; + case ARIZONA_ISRC_4_CTRL_1: + *cur_sources = clearwater_isrc4_fsh_inputs; + *lim = ARRAY_SIZE(clearwater_isrc4_fsh_inputs); + break; + case ARIZONA_ISRC_4_CTRL_2: + *cur_sources = clearwater_isrc4_fsl_inputs; + *lim = ARRAY_SIZE(clearwater_isrc4_fsl_inputs); + break; + case ARIZONA_OUTPUT_RATE_1: + *cur_sources = clearwater_out_inputs; + *lim = ARRAY_SIZE(clearwater_out_inputs); + break; + case ARIZONA_SPD1_TX_CONTROL: + *cur_sources = clearwater_spd1_inputs; + *lim = ARRAY_SIZE(clearwater_spd1_inputs); + break; + case CLEARWATER_DSP1_CONFIG: + *cur_sources = clearwater_dsp1_inputs; + *lim = ARRAY_SIZE(clearwater_dsp1_inputs); + break; + case CLEARWATER_DSP2_CONFIG: + *cur_sources = clearwater_dsp2_inputs; + *lim = ARRAY_SIZE(clearwater_dsp2_inputs); + break; + case CLEARWATER_DSP3_CONFIG: + *cur_sources = clearwater_dsp3_inputs; + *lim = ARRAY_SIZE(clearwater_dsp3_inputs); + break; + case CLEARWATER_DSP4_CONFIG: + *cur_sources = clearwater_dsp4_inputs; + *lim = ARRAY_SIZE(clearwater_dsp4_inputs); + break; + case CLEARWATER_DSP5_CONFIG: + *cur_sources = clearwater_dsp5_inputs; + *lim = ARRAY_SIZE(clearwater_dsp5_inputs); + break; + case CLEARWATER_DSP6_CONFIG: + *cur_sources = clearwater_dsp6_inputs; + *lim = ARRAY_SIZE(clearwater_dsp6_inputs); + break; + case CLEARWATER_DSP7_CONFIG: + *cur_sources = clearwater_dsp7_inputs; + *lim = ARRAY_SIZE(clearwater_dsp7_inputs); + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static int clearwater_rate_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int ret, err; + int lim; + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + + struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(codec); + struct arizona_priv *priv = &clearwater->core; + struct arizona *arizona = priv->arizona; + + const int *cur_sources; + + unsigned int val, cur; + unsigned int mask; + + if (ucontrol->value.enumerated.item[0] > e->max - 1) + return -EINVAL; + + val = e->values[ucontrol->value.enumerated.item[0]] << e->shift_l; + mask = e->mask << e->shift_l; + + ret = regmap_read(arizona->regmap, e->reg, &cur); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read current reg: %d\n", ret); + return ret; + } + + if ((cur & mask) == (val & mask)) + return 0; + + ret = clearwater_get_sources((int)e->reg, &cur_sources, &lim); + if (ret != 0) { + dev_err(arizona->dev, "Failed to get sources for 0x%08x: %d\n", + e->reg, + ret); + return ret; + } + + mutex_lock(&arizona->rate_lock); + + ret = arizona_cache_and_clear_sources(arizona, cur_sources, + mixer_sources_cache, lim); + if (ret != 0) { + dev_err(arizona->dev, + "%s Failed to cache and clear sources %d\n", + __func__, + ret); + goto out; + } + + /* Apply the rate through the original callback */ + udelay(300); + ret = snd_soc_update_bits_locked(codec, e->reg, mask, val); + udelay(300); + +out: + err = arizona_restore_sources(arizona, cur_sources, + mixer_sources_cache, lim); + if (err != 0) { + dev_err(arizona->dev, + "%s Failed to restore sources %d\n", + __func__, + err); + } + + mutex_unlock(&arizona->rate_lock); + return ret; +} + static int clearwater_adsp_rate_put_cb(struct wm_adsp *adsp, unsigned int mask, unsigned int val) { - return regmap_update_bits(adsp->regmap, adsp->base, mask, val); + int ret, err; + int lim; + const int *cur_sources; + struct arizona *arizona = dev_get_drvdata(adsp->dev); + unsigned int cur; + + ret = regmap_read(adsp->regmap, adsp->base, &cur); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read current: %d\n", ret); + return ret; + } + + if ((val & mask) == (cur & mask)) + return 0; + + ret = clearwater_get_sources(adsp->base, &cur_sources, &lim); + if (ret != 0) { + dev_err(arizona->dev, "Failed to get sources for 0x%08x: %d\n", + adsp->base, + ret); + return ret; + } + + dev_dbg(arizona->dev, "%s for DSP%d\n", __func__, adsp->num); + + mutex_lock(&arizona->rate_lock); + + ret = arizona_cache_and_clear_sources(arizona, cur_sources, + mixer_sources_cache, lim); + + if (ret != 0) { + dev_err(arizona->dev, + "%s Failed to cache and clear sources %d\n", + __func__, + ret); + goto out; + } + + udelay(300); + /* Apply the rate */ + ret = regmap_update_bits(adsp->regmap, adsp->base, mask, val); + udelay(300); + +out: + err = arizona_restore_sources(arizona, cur_sources, + mixer_sources_cache, lim); + + if (err != 0) { + dev_err(arizona->dev, + "%s Failed to restore sources %d\n", + __func__, + err); + } + + mutex_unlock(&arizona->rate_lock); + return ret; } static int clearwater_adsp_power_ev(struct snd_soc_dapm_widget *w, @@ -551,20 +916,20 @@ SOC_VALUE_ENUM("Sample Rate 2", arizona_sample_rate[0]), SOC_VALUE_ENUM("Sample Rate 3", arizona_sample_rate[1]), SOC_VALUE_ENUM("ASYNC Sample Rate 2", arizona_sample_rate[2]), -SOC_VALUE_ENUM("FX Rate", arizona_fx_rate), - -SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), -SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), -SOC_VALUE_ENUM("ISRC3 FSL", arizona_isrc_fsl[2]), -SOC_VALUE_ENUM("ISRC4 FSL", arizona_isrc_fsl[3]), -SOC_VALUE_ENUM("ISRC1 FSH", arizona_isrc_fsh[0]), -SOC_VALUE_ENUM("ISRC2 FSH", arizona_isrc_fsh[1]), -SOC_VALUE_ENUM("ISRC3 FSH", arizona_isrc_fsh[2]), -SOC_VALUE_ENUM("ISRC4 FSH", arizona_isrc_fsh[3]), -SOC_VALUE_ENUM("ASRC1 Rate 1", clearwater_asrc1_rate[0]), -SOC_VALUE_ENUM("ASRC1 Rate 2", clearwater_asrc1_rate[1]), -SOC_VALUE_ENUM("ASRC2 Rate 1", clearwater_asrc2_rate[0]), -SOC_VALUE_ENUM("ASRC2 Rate 2", clearwater_asrc2_rate[1]), +CLEARWATER_RATE_ENUM("FX Rate", arizona_fx_rate), + +CLEARWATER_RATE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), +CLEARWATER_RATE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), +CLEARWATER_RATE_ENUM("ISRC3 FSL", arizona_isrc_fsl[2]), +CLEARWATER_RATE_ENUM("ISRC4 FSL", arizona_isrc_fsl[3]), +CLEARWATER_RATE_ENUM("ISRC1 FSH", arizona_isrc_fsh[0]), +CLEARWATER_RATE_ENUM("ISRC2 FSH", arizona_isrc_fsh[1]), +CLEARWATER_RATE_ENUM("ISRC3 FSH", arizona_isrc_fsh[2]), +CLEARWATER_RATE_ENUM("ISRC4 FSH", arizona_isrc_fsh[3]), +CLEARWATER_RATE_ENUM("ASRC1 Rate 1", clearwater_asrc1_rate[0]), +CLEARWATER_RATE_ENUM("ASRC1 Rate 2", clearwater_asrc1_rate[1]), +CLEARWATER_RATE_ENUM("ASRC2 Rate 1", clearwater_asrc2_rate[0]), +CLEARWATER_RATE_ENUM("ASRC2 Rate 2", clearwater_asrc2_rate[1]), ARIZONA_MIXER_CONTROLS("DSP1L", ARIZONA_DSP1LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("DSP1R", ARIZONA_DSP1RMIX_INPUT_1_SOURCE), @@ -686,7 +1051,7 @@ SOC_DOUBLE("Speaker THR3 EDRE Switch", CLEARWATER_EDRE_ENABLE, SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp), SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp), -SOC_ENUM("SPDIF Rate", arizona_spdif_rate), +CLEARWATER_RATE_ENUM("SPDIF Rate", arizona_spdif_rate), SOC_SINGLE("Noise Gate Switch", ARIZONA_NOISE_GATE_CONTROL, ARIZONA_NGATE_ENA_SHIFT, 1, 0), @@ -694,7 +1059,7 @@ SOC_SINGLE_TLV("Noise Gate Threshold Volume", ARIZONA_NOISE_GATE_CONTROL, ARIZONA_NGATE_THR_SHIFT, 7, 1, ng_tlv), SOC_ENUM("Noise Gate Hold", arizona_ng_hold), -SOC_VALUE_ENUM("Output Rate 1", arizona_output_rate), +CLEARWATER_RATE_ENUM("Output Rate 1", arizona_output_rate), SOC_VALUE_ENUM("In Rate", arizona_input_rate), CLEARWATER_NG_SRC("HPOUT1L", ARIZONA_NOISE_GATE_SELECT_1L), From f9b80d38f260346ca77392dc0fc49062318a607d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 30 Mar 2015 11:13:39 +0100 Subject: [PATCH 0721/1167] mfd: arizona: Add scratch register Add a scratch register that can be used to ensure timing is correct on the SPI bus. Change-Id: I2c1bc61e7f9073564890cfd5f21b579081a4c00d Signed-off-by: Charles Keepax --- drivers/mfd/clearwater-tables.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index cc6e12cdb44..2f185a76e7d 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -48,6 +48,7 @@ static const struct reg_default clearwater_reva_16_patch[] = { static const struct reg_default clearwater_revc_16_patch[] = { { 0x27E, 0x0000 }, + { 0x2C2, 0x5 }, }; /* this patch is required for EDRE on RevA*/ @@ -1881,6 +1882,7 @@ static bool clearwater_is_adsp_memory(struct device *dev, unsigned int reg) static bool clearwater_16bit_readable_register(struct device *dev, unsigned int reg) { switch (reg) { + case 0x2C2: case ARIZONA_SOFTWARE_RESET: case ARIZONA_DEVICE_REVISION: case ARIZONA_CTRL_IF_SPI_CFG_1: @@ -3219,6 +3221,7 @@ static bool clearwater_16bit_readable_register(struct device *dev, unsigned int static bool clearwater_16bit_volatile_register(struct device *dev, unsigned int reg) { switch (reg) { + case 0x2C2: case ARIZONA_SOFTWARE_RESET: case ARIZONA_DEVICE_REVISION: case ARIZONA_HAPTICS_STATUS: From 24e46f715870af5c1abf07a73f2955d061acd748 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 24 Mar 2015 17:13:39 +0000 Subject: [PATCH 0722/1167] ASoC: clearwater: Ensure a few clocks around rate changes Change-Id: Ia3b70806b6039c02bd52140fbd3a03aa04a54715 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 33 ++++++++++++++++++++++++++++++++- sound/soc/codecs/arizona.h | 2 ++ sound/soc/codecs/clearwater.c | 21 ++++++++++++++++++++- 3 files changed, 54 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 83f5f55e9a3..a69f364cbca 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -248,6 +248,34 @@ int arizona_cache_and_clear_sources(struct arizona *arizona, } EXPORT_SYMBOL_GPL(arizona_cache_and_clear_sources); +void clearwater_spin_sysclk(struct arizona *arizona) +{ + unsigned int val, res; + int ret, i; + + /* Skip this if the chip is down */ + if (pm_runtime_suspended(arizona->dev)) + return; + + /* + * Just read a register a few times to ensure the internal + * oscillator sends out a few clocks. + */ + for (i = 0; i < 4; i++) + regmap_read(arizona->regmap, 0x2c2, &val); + + val = (~val) & 0x7; + + regmap_write(arizona->regmap, 0x2c2, val); + ret = regmap_read(arizona->regmap, 0x2c2, &res); + + if (ret == 0 && val != res) + dev_err(arizona->dev, + "Failed to toggle flag register (%x,%x)\n", + val, res); +} +EXPORT_SYMBOL_GPL(clearwater_spin_sysclk); + int arizona_restore_sources(struct arizona *arizona, const int *sources, int *cache, @@ -2949,6 +2977,7 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, goto out; } + clearwater_spin_sysclk(priv->arizona); udelay(300); } @@ -3004,8 +3033,10 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, ret = -EINVAL; } - if (change_rate) + if (change_rate) { + clearwater_spin_sysclk(priv->arizona); udelay(300); + } out: if (change_rate) { diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 7817eedcf39..fd11038df0a 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -340,6 +340,8 @@ extern int arizona_restore_sources(struct arizona *arizona, int *cache, int lim); +extern void clearwater_spin_sysclk(struct arizona *arizona); + extern const struct snd_soc_dai_ops arizona_dai_ops; extern const struct snd_soc_dai_ops arizona_simple_dai_ops; diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 6f7d31dd408..d32d19ccb2a 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -489,8 +489,10 @@ static int clearwater_rate_put(struct snd_kcontrol *kcontrol, } /* Apply the rate through the original callback */ + clearwater_spin_sysclk(arizona); udelay(300); ret = snd_soc_update_bits_locked(codec, e->reg, mask, val); + clearwater_spin_sysclk(arizona); udelay(300); out: @@ -549,9 +551,11 @@ static int clearwater_adsp_rate_put_cb(struct wm_adsp *adsp, goto out; } + clearwater_spin_sysclk(arizona); udelay(300); /* Apply the rate */ ret = regmap_update_bits(adsp->regmap, adsp->base, mask, val); + clearwater_spin_sysclk(arizona); udelay(300); out: @@ -569,6 +573,20 @@ static int clearwater_adsp_rate_put_cb(struct wm_adsp *adsp, return ret; } +static int clearwater_sysclk_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(codec); + struct arizona_priv *priv = &clearwater->core; + struct arizona *arizona = priv->arizona; + + clearwater_spin_sysclk(arizona); + udelay(300); + + return 0; +} + static int clearwater_adsp_power_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) @@ -1318,7 +1336,8 @@ static const struct snd_kcontrol_new clearwater_output_anc_src[] = { static const struct snd_soc_dapm_widget clearwater_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT, - 0, NULL, SND_SOC_DAPM_POST_PMU), + 0, clearwater_sysclk_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), SND_SOC_DAPM_SUPPLY("ASYNCCLK", ARIZONA_ASYNC_CLOCK_1, ARIZONA_ASYNC_CLK_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK, From 925760000ece3729ef6790e3390f461b2f4baec4 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 10 Apr 2015 16:19:51 +0100 Subject: [PATCH 0723/1167] mfd: vegas: Make EDRE enable register readable Change-Id: If24c55e7e65163f233ba93743f8470b6465cb489 Signed-off-by: Richard Fitzgerald --- drivers/mfd/vegas-tables.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mfd/vegas-tables.c b/drivers/mfd/vegas-tables.c index 6c1c82cbaee..0515fd244eb 100644 --- a/drivers/mfd/vegas-tables.c +++ b/drivers/mfd/vegas-tables.c @@ -39,6 +39,7 @@ static const struct reg_default vegas_rev_a_patch[] = { { 0x0420, 0x2080 }, { 0x04B8, 0x1120 }, { 0x047E, 0x080E }, + { 0x0448, 0x03EF }, }; /* We use a function so we can use ARRAY_SIZE() */ @@ -329,6 +330,7 @@ static const struct reg_default vegas_reg_default[] = { { 0x00000441, 0xC759 }, /* R1089 - DRE Control 1 */ { 0x00000442, 0x2A08 }, /* R1089 - DRE Control 2 */ { 0x00000443, 0x5CFA }, /* R1089 - DRE Control 3 */ + { 0x00000448, 0x03EF }, /* R1096 - EDRE Enable */ { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */ { 0x00000451, 0x0000 }, /* R1105 - DAC AEC Control 2 */ { 0x00000458, 0x0000 }, /* R1112 - Noise Gate Control */ @@ -995,6 +997,7 @@ static bool vegas_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DRE_CONTROL_1: case ARIZONA_DRE_CONTROL_2: case ARIZONA_DRE_CONTROL_3: + case CLEARWATER_EDRE_ENABLE: case ARIZONA_DAC_AEC_CONTROL_1: case ARIZONA_DAC_AEC_CONTROL_2: case ARIZONA_NOISE_GATE_CONTROL: From 78b1d9b33abf1fcf8dad67362d4593e11880f03e Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 7 Apr 2015 11:52:01 +0100 Subject: [PATCH 0724/1167] ASoC: vegas: Add EDRE switch controls Note that OUT4 has multiple bits so needs special handling. Change-Id: I848758694d29ef94b24bd3c51d023883175be142 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 58 ++++++++++++++++++++++++++++++++++++++ sound/soc/codecs/arizona.h | 2 ++ sound/soc/codecs/vegas.c | 49 +++++++++++++++++++++++++++++++- 3 files changed, 108 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index a69f364cbca..b7733b9cf1c 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2180,6 +2180,64 @@ int clearwater_put_dre(struct snd_kcontrol *kcontrol, } EXPORT_SYMBOL_GPL(clearwater_put_dre); +int arizona_put_out4_edre(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + const struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + unsigned int mask_l, mask_r, old_val, out_ena; + unsigned int val_l = 0, val_r = 0; + int ret = 0; + + switch (priv->arizona->type) { + case WM1814: + case WM8998: + mask_l = CLEARWATER_EDRE_OUT4L_THR1_ENA | + CLEARWATER_EDRE_OUT4L_THR2_ENA; + mask_r = CLEARWATER_EDRE_OUT4R_THR1_ENA | + CLEARWATER_EDRE_OUT4R_THR2_ENA; + break; + default: + return 0; + } + + if (ucontrol->value.integer.value[0]) + val_l = mask_l; + + if (ucontrol->value.integer.value[1]) + val_r = mask_r; + + mutex_lock_nested(&codec->card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); + + /* Check what will change so we know which output enables to test */ + old_val = snd_soc_read(codec, CLEARWATER_EDRE_ENABLE); + if ((old_val & mask_l) == val_l) + mask_l = 0; + + if ((old_val & mask_r) == val_r) + mask_r = 0; + + if ((mask_l | mask_r) == 0) + goto out; + + out_ena = snd_soc_read(codec, ARIZONA_OUTPUT_ENABLES_1); + if ((mask_l && (out_ena & ARIZONA_OUT4L_ENA_MASK)) || + (mask_r && (out_ena & ARIZONA_OUT4R_ENA_MASK))) { + dev_warn(codec->dev, "Cannot change OUT4 eDRE with output on\n"); + ret = -EBUSY; + goto out; + } + + snd_soc_update_bits(codec, CLEARWATER_EDRE_ENABLE, + mask_l | mask_r, val_l | val_r); +out: + mutex_unlock(&codec->card->dapm_mutex); + return ret; +} +EXPORT_SYMBOL_GPL(arizona_put_out4_edre); + int arizona_out_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index fd11038df0a..0809a7cf6c5 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -402,6 +402,8 @@ extern int florida_put_dre(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); extern int clearwater_put_dre(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); +extern int arizona_put_out4_edre(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); extern struct regmap *arizona_get_regmap_dsp(struct snd_soc_codec *codec); diff --git a/sound/soc/codecs/vegas.c b/sound/soc/codecs/vegas.c index 00ac0af7627..6dbd1a44127 100644 --- a/sound/soc/codecs/vegas.c +++ b/sound/soc/codecs/vegas.c @@ -37,6 +37,39 @@ struct vegas_priv { struct arizona_fll fll[2]; }; +static const struct reg_default vegas_sysclk_edre_patch[] = { + { 0x3138, 0x0001 }, + { 0x3139, 0x0000 }, + { 0x3144, 0x0001 }, + { 0x3145, 0x0000 }, + { 0x3164, 0x0001 }, + { 0x3165, 0x0000 }, + { 0x3170, 0x0001 }, + { 0x3171, 0x0000 }, +}; + +static int vegas_sysclk_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + struct regmap *regmap = codec->control_data; + int i; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + for (i = 0; i < ARRAY_SIZE(vegas_sysclk_edre_patch); i++) + regmap_write(regmap, vegas_sysclk_edre_patch[i].reg, + vegas_sysclk_edre_patch[i].def); + break; + + default: + break; + } + + return 0; +} + static int vegas_in1mux_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); @@ -292,6 +325,19 @@ SOC_SINGLE("DRE TC Fast", ARIZONA_DRE_CONTROL_1, SOC_SINGLE("DRE Analogue Volume Delay", ARIZONA_DRE_CONTROL_2, ARIZONA_DRE_ALOG_VOL_DELAY_SHIFT, 15, 0), +SOC_DOUBLE("HPOUT EDRE Switch", CLEARWATER_EDRE_ENABLE, + CLEARWATER_EDRE_OUT1L_THR1_ENA_SHIFT, + CLEARWATER_EDRE_OUT1R_THR1_ENA_SHIFT, 1, 0), +SOC_DOUBLE("LINEOUT EDRE Switch", CLEARWATER_EDRE_ENABLE, + CLEARWATER_EDRE_OUT2L_THR1_ENA_SHIFT, + CLEARWATER_EDRE_OUT2R_THR1_ENA_SHIFT, 1, 0), +SOC_SINGLE("EPOUT EDRE Switch", CLEARWATER_EDRE_ENABLE, + CLEARWATER_EDRE_OUT3L_THR1_ENA_SHIFT, 1, 0), +SOC_DOUBLE_EXT("SPKOUT EDRE Switch", CLEARWATER_EDRE_ENABLE, + CLEARWATER_EDRE_OUT4L_THR1_ENA_SHIFT, + CLEARWATER_EDRE_OUT4R_THR1_ENA_SHIFT, 1, 0, + snd_soc_get_volsw, arizona_put_out4_edre), + SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp), SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp), @@ -449,7 +495,8 @@ static const struct snd_kcontrol_new vegas_aec_loopback_mux[] = { static const struct snd_soc_dapm_widget vegas_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, - ARIZONA_SYSCLK_ENA_SHIFT, 0, NULL, 0), + ARIZONA_SYSCLK_ENA_SHIFT, 0, + vegas_sysclk_ev, SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_SUPPLY("ASYNCCLK", ARIZONA_ASYNC_CLOCK_1, ARIZONA_ASYNC_CLK_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK, From fe086cb52caba7ba64f999c7675f5db072a4b036 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 17 Apr 2015 10:39:15 +0100 Subject: [PATCH 0725/1167] ASoC: vegas: Remove unused variables Change-Id: If059d6583d6613e0a592675fbf67d29723eccd4b Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 2 -- sound/soc/codecs/vegas.c | 1 - 2 files changed, 3 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index b7733b9cf1c..e7b715404e4 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2185,8 +2185,6 @@ int arizona_put_out4_edre(struct snd_kcontrol *kcontrol, { struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); - const struct soc_mixer_control *mc = - (struct soc_mixer_control *)kcontrol->private_value; unsigned int mask_l, mask_r, old_val, out_ena; unsigned int val_l = 0, val_r = 0; int ret = 0; diff --git a/sound/soc/codecs/vegas.c b/sound/soc/codecs/vegas.c index 6dbd1a44127..1436678c1cc 100644 --- a/sound/soc/codecs/vegas.c +++ b/sound/soc/codecs/vegas.c @@ -52,7 +52,6 @@ static int vegas_sysclk_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { struct snd_soc_codec *codec = w->codec; - struct arizona *arizona = dev_get_drvdata(codec->dev->parent); struct regmap *regmap = codec->control_data; int i; From c13aef041471da49d2c7848b452ffd5e765a574e Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 16 Apr 2015 15:02:24 +0100 Subject: [PATCH 0726/1167] mfd: clearwater: Add missing ANC default Change-Id: I636cc926af5caeb7cec0f309bcca1c0be24b1780 Signed-off-by: Charles Keepax --- drivers/mfd/clearwater-tables.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index 2f185a76e7d..f55df8be6c7 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -1506,6 +1506,7 @@ static const struct reg_default clearwater_reg_default[] = { { 0x00000F02, 0x0000 }, /* R3842 - Arizona DSP Status */ { 0x00000F08, 0x001c }, /* R3848 - ANC Coefficient */ { 0x00000F09, 0x0000 }, /* R3849 - ANC Coefficient */ + { 0x00000F0A, 0x0000 }, /* R3850 - ANC Coefficient */ { 0x00000F0B, 0x0000 }, /* R3851 - ANC Coefficient */ { 0x00000F0C, 0x0000 }, /* R3852 - ANC Coefficient */ { 0x00000F0D, 0x0000 }, /* R3853 - ANC Coefficient */ From 745ea6c95aab7ba3662dff7a111bcb0e57988062 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 16 Apr 2015 14:57:33 +0100 Subject: [PATCH 0727/1167] mfd: florida: Add missing ANC default Change-Id: Ib875ce190c13c5dded23adbe08c31f7bbc57fbb1 Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index e852b02bdad..0c6d6402ba4 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -1660,6 +1660,7 @@ static const struct reg_default florida_reg_default[] = { { 0x00000F01, 0x0000 }, /* R3841 - ANC_SRC */ { 0x00000F08, 0x001c }, /* R3848 - ANC Coefficient */ { 0x00000F09, 0x0000 }, /* R3849 - ANC Coefficient */ + { 0x00000F0A, 0x0000 }, /* R3850 - ANC Coefficient */ { 0x00000F0B, 0x0000 }, /* R3851 - ANC Coefficient */ { 0x00000F0C, 0x0000 }, /* R3852 - ANC Coefficient */ { 0x00000F0D, 0x0000 }, /* R3853 - ANC Coefficient */ From 1b3a5cc8fa41c80f6c2531af6022cca08a5ecb12 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 28 Nov 2014 13:38:09 +0000 Subject: [PATCH 0728/1167] Revert "ASoC: wm_adsp: Fix regression for version 0 firmwares" This reverts commit 4056af38b1ae28ae362292cb8e91279ffe514d1f. Prepare for new implementation of controls by backing out the old implementation. Change-Id: Idd6f553c8af93aa6c08cb3e883784d5636f9173a Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 34 +++++++++++++++------------------- 1 file changed, 15 insertions(+), 19 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index ede36386280..6413c07edd3 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -445,8 +445,7 @@ struct wm_coeff_ctl { }; static int wm_adsp_create_grouped_control(struct wm_adsp *dsp, - struct wm_adsp_alg_region *region, - bool create); + struct wm_adsp_alg_region *region); static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) @@ -1356,8 +1355,7 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, } static int wm_adsp_create_grouped_control(struct wm_adsp *dsp, - struct wm_adsp_alg_region *region, - bool create) + struct wm_adsp_alg_region *region) { size_t len = region->len, offset = 0; struct wm_adsp_alg_region *r; @@ -1390,13 +1388,11 @@ static int wm_adsp_create_grouped_control(struct wm_adsp *dsp, else r->len = len - offset; offset += r->len; - + /* We do not need to create the control for this new + * region as it will be created once we reach the region + * whilst processing the alg_regions list. + */ list_add_tail(&r->list, &dsp->alg_regions); - if (create) { - ret = wm_adsp_create_control(dsp, r); - if (ret < 0) - return ret; - } } while (offset < len); return 0; @@ -1522,7 +1518,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) wm_adsp1_fixup_region_base(dsp, &adsp1_alg_tmp); list_for_each_entry(region, &dsp->alg_regions, list) { if (region->alg == be32_to_cpu(adsp1_alg_tmp.alg.id)) - wm_adsp_create_grouped_control(dsp, region, false); + wm_adsp_create_grouped_control(dsp, region); } } else { region = kzalloc(sizeof(*region), GFP_KERNEL); @@ -1577,7 +1573,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) wm_adsp2_fixup_region_base(dsp, &adsp2_alg_tmp); list_for_each_entry(region, &dsp->alg_regions, list) { if (region->alg == be32_to_cpu(adsp2_alg_tmp.alg.id)) - wm_adsp_create_grouped_control(dsp, region, false); + wm_adsp_create_grouped_control(dsp, region); } } else { region = kzalloc(sizeof(*region), GFP_KERNEL); @@ -1667,7 +1663,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) wm_adsp1_fixup_region_base(dsp, &adsp1_alg[i]); list_for_each_entry(region, &dsp->alg_regions, list) { if (region->alg == be32_to_cpu(adsp1_alg[i].alg.id)) - wm_adsp_create_grouped_control(dsp, region, false); + wm_adsp_create_grouped_control(dsp, region); } } else { region = kzalloc(sizeof(*region), GFP_KERNEL); @@ -1684,7 +1680,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len = be32_to_cpu(adsp1_alg[i + 1].dm); region->len -= be32_to_cpu(adsp1_alg[i].dm); region->len *= 4; - wm_adsp_create_grouped_control(dsp, region, true); + wm_adsp_create_grouped_control(dsp, region); } else { adsp_warn(dsp, "Length info not specified for region DM with ID %x\n", be32_to_cpu(adsp1_alg[i].alg.id)); @@ -1704,7 +1700,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len = be32_to_cpu(adsp1_alg[i + 1].zm); region->len -= be32_to_cpu(adsp1_alg[i].zm); region->len *= 4; - wm_adsp_create_grouped_control(dsp, region, true); + wm_adsp_create_grouped_control(dsp, region); } else { adsp_warn(dsp, "Length info not specified for region ZM with ID %x\n", be32_to_cpu(adsp1_alg[i].alg.id)); @@ -1727,7 +1723,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) wm_adsp2_fixup_region_base(dsp, &adsp2_alg[i]); list_for_each_entry(region, &dsp->alg_regions, list) { if (region->alg == be32_to_cpu(adsp2_alg[i].alg.id)) - wm_adsp_create_grouped_control(dsp, region, false); + wm_adsp_create_grouped_control(dsp, region); } } else { region = kzalloc(sizeof(*region), GFP_KERNEL); @@ -1744,7 +1740,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len = be32_to_cpu(adsp2_alg[i + 1].xm); region->len -= be32_to_cpu(adsp2_alg[i].xm); region->len *= 4; - wm_adsp_create_grouped_control(dsp, region, true); + wm_adsp_create_grouped_control(dsp, region); } else { adsp_warn(dsp, "Length info not specified for region XM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); @@ -1764,7 +1760,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len = be32_to_cpu(adsp2_alg[i + 1].ym); region->len -= be32_to_cpu(adsp2_alg[i].ym); region->len *= 4; - wm_adsp_create_grouped_control(dsp, region, true); + wm_adsp_create_grouped_control(dsp, region); } else { adsp_warn(dsp, "Length info not specified for region YM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); @@ -1784,7 +1780,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len = be32_to_cpu(adsp2_alg[i + 1].zm); region->len -= be32_to_cpu(adsp2_alg[i].zm); region->len *= 4; - wm_adsp_create_grouped_control(dsp, region, true); + wm_adsp_create_grouped_control(dsp, region); } else { adsp_warn(dsp, "Length info not specified for region ZM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); From 5388bb9b5eee5cb55f4ca8aa89a75e7b64050dfb Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 28 Nov 2014 13:38:35 +0000 Subject: [PATCH 0729/1167] Revert "ASoC: wm_adsp: Ensure we don't attempt to create controls twice" This reverts commit 6a23d3b01c2ed954cc51a4ccdcf92c3cb1cff65d. Prepare for new implementation of controls by backing out the old implementation. Change-Id: Id5be272f6a7da02b0eaece68093fec57a50f29d6 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 6413c07edd3..788d0dffe4f 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1361,6 +1361,7 @@ static int wm_adsp_create_grouped_control(struct wm_adsp *dsp, struct wm_adsp_alg_region *r; int ret; + region->block = 0; /* This is the quick case for control groups of a single block */ if (region->len <= 512) return wm_adsp_create_control(dsp, region); @@ -1388,11 +1389,10 @@ static int wm_adsp_create_grouped_control(struct wm_adsp *dsp, else r->len = len - offset; offset += r->len; - /* We do not need to create the control for this new - * region as it will be created once we reach the region - * whilst processing the alg_regions list. - */ list_add_tail(&r->list, &dsp->alg_regions); + ret = wm_adsp_create_control(dsp, r); + if (ret < 0) + return ret; } while (offset < len); return 0; From 45f99895e158a4fd7768efec62c39bbfe2872b1b Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 28 Nov 2014 13:42:53 +0000 Subject: [PATCH 0730/1167] Revert "ASoC: wm_adsp: Add support for algorithm and coefficient blocks" This reverts commit b09257859af42f0eafff04075318820a864e3c4f. Conflicts: sound/soc/codecs/wm_adsp.c Prepare for new implementation of controls by backing out the old implementation. Change-Id: I7fe74ad46ce16d1e66e1853abc488804dfdc23a5 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 473 ++++++++++--------------------------- sound/soc/codecs/wm_adsp.h | 2 - sound/soc/codecs/wmfw.h | 37 +-- 3 files changed, 123 insertions(+), 389 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 788d0dffe4f..fd6f7bed7f2 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -444,9 +444,6 @@ struct wm_coeff_ctl { struct mutex lock; }; -static int wm_adsp_create_grouped_control(struct wm_adsp *dsp, - struct wm_adsp_alg_region *region); - static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { @@ -703,7 +700,6 @@ static int wm_coeff_write_control(struct snd_kcontrol *kcontrol, reg = ctl->region.base; reg = wm_adsp_region_to_reg(mem, reg); - reg += ctl->region.offset; scratch = kmemdup(buf, ctl->len, GFP_KERNEL | GFP_DMA); if (!scratch) @@ -765,7 +761,6 @@ static int wm_coeff_read_control(struct snd_kcontrol *kcontrol, reg = ctl->region.base; reg = wm_adsp_region_to_reg(mem, reg); - reg += ctl->region.offset; scratch = kmalloc(ctl->len, GFP_KERNEL | GFP_DMA); if (!scratch) @@ -848,113 +843,6 @@ static int wmfw_add_ctl(struct wm_adsp *adsp, struct wm_coeff_ctl *ctl) return ret; } -static void wm_adsp2_dump_alg_data(const struct wm_adsp *dsp, - const struct wmfw_adsp2_alg_data *blk) -{ - adsp_dbg(dsp, "Algorithm ID: %#x\n", le32_to_cpu(blk->id)); - adsp_dbg(dsp, "Algorithm name: %s\n", blk->name); - adsp_dbg(dsp, "Algorithm description: %s\n", blk->descr); - adsp_dbg(dsp, "# of coefficient descriptors: %#x\n", - le32_to_cpu(blk->ncoeff)); -} - -static void wm_adsp2_dump_coeff_data_hdr(const struct wm_adsp *dsp, - const struct wmfw_adsp2_coeff_data_hdr *hdr) -{ - int offset, type; - - offset = le32_to_cpu(hdr->offset) & 0xffff; - type = (le32_to_cpu(hdr->type) >> 16) & 0xffff; - adsp_dbg(dsp, "\tCoefficient type: %#x\n", type); - adsp_dbg(dsp, "\tCoefficient offset: %#x\n", offset); - adsp_dbg(dsp, "\tCoefficient size: %#x\n", le32_to_cpu(hdr->size)); - -} - -static void wm_adsp2_dump_coeff_data(const struct wm_adsp *dsp, - const struct wmfw_adsp2_coeff_data *blk) -{ - adsp_dbg(dsp, "\tCoefficient name: %s\n", blk->name); - adsp_dbg(dsp, "\tCoefficient description: %s\n", blk->descr); - adsp_dbg(dsp, "\tALSA control type: %#x\n", le32_to_cpu(blk->type)); - adsp_dbg(dsp, "\tALSA control len: %#x\n", le32_to_cpu(blk->len)); -} - -static struct wmfw_adsp2_coeff_data_hdr *inc_coeff_hdr(struct wmfw_adsp2_coeff_data_hdr *hdr) -{ - return (void *)(u8 *)hdr + sizeof(*hdr) + hdr->size; -} - -static struct wmfw_adsp2_coeff_data *inc_coeff_blk(struct wmfw_adsp2_coeff_data_hdr *hdr) -{ - return (void *)(u8 *)hdr + sizeof(*hdr); -} - -static int wm_adsp_parse_coeff(struct wm_adsp *dsp, - const struct wmfw_region *region) -{ - struct wm_adsp_alg_region *alg_region; - const struct wmfw_adsp2_alg_data *alg_blk; - struct wmfw_adsp2_coeff_data_hdr *coeff_hdr; - struct wmfw_adsp2_coeff_data *coeff_blk; - int type, offset; - size_t len; - int i; - - alg_blk = (const struct wmfw_adsp2_alg_data *)region->data; - wm_adsp2_dump_alg_data(dsp, alg_blk); - - coeff_hdr = (void *)alg_blk->data; - coeff_blk = inc_coeff_blk(coeff_hdr); - for (i = 0; i < alg_blk->ncoeff; i++) { - wm_adsp2_dump_coeff_data_hdr(dsp, coeff_hdr); - wm_adsp2_dump_coeff_data(dsp, coeff_blk); - - switch (coeff_blk->type) { - case SNDRV_CTL_ELEM_TYPE_BYTES: - break; - default: - adsp_err(dsp, "Unknown control type: %d\n", - coeff_blk->type); - return -EINVAL; - } - - type = (le32_to_cpu(coeff_hdr->type) >> 16) & 0xffff; - offset = le32_to_cpu(coeff_hdr->offset) & 0xffff; - len = le32_to_cpu(coeff_blk->len); - - switch (type) { - case WMFW_ADSP1_DM: - case WMFW_ADSP1_ZM: - case WMFW_ADSP2_PM: - case WMFW_ADSP2_XM: - case WMFW_ADSP2_YM: - break; - default: - adsp_err(dsp, "Unknown region type: %d\n", type); - return -EINVAL; - } - - alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); - if (!alg_region) - return -ENOMEM; - - alg_region->type = type; - alg_region->offset = offset; - alg_region->alg = le32_to_cpu(alg_blk->id); - if (!len) - alg_region->len = 512; - else - alg_region->len = len; - list_add_tail(&alg_region->list, &dsp->alg_regions); - - coeff_hdr = inc_coeff_hdr(coeff_hdr); - coeff_blk = inc_coeff_blk(coeff_hdr); - } - - return 0; -} - static int wm_adsp_load(struct wm_adsp *dsp) { LIST_HEAD(buf_list); @@ -1016,12 +904,11 @@ static int wm_adsp_load(struct wm_adsp *dsp) goto out_fw; } - if (header->ver > 1) { + if (header->ver != 0) { adsp_err(dsp, "%s: unknown file format %d\n", file, header->ver); goto out_fw; } - dsp->fw_ver = header->ver; if (header->core != dsp->type) { adsp_err(dsp, "%s: invalid core %d != %d\n", @@ -1079,7 +966,7 @@ static int wm_adsp_load(struct wm_adsp *dsp) offset = le32_to_cpu(region->offset) & 0xffffff; type = be32_to_cpu(region->type) & 0xff; mem = wm_adsp_find_region(dsp, type); - + switch (type) { case WMFW_NAME_TEXT: region_name = "Firmware name"; @@ -1095,12 +982,6 @@ static int wm_adsp_load(struct wm_adsp *dsp) region_name = "Absolute"; reg = offset; break; - case WMFW_ALGORITHM_DATA: - region_name = "Algorithm"; - ret = wm_adsp_parse_coeff(dsp, region); - if (ret != 0) - goto out_fw; - break; case WMFW_ADSP1_PM: BUG_ON(!mem); region_name = "PM"; @@ -1398,70 +1279,13 @@ static int wm_adsp_create_grouped_control(struct wm_adsp *dsp, return 0; } -static int wm_adsp1_fixup_region_base(struct wm_adsp *dsp, - struct wmfw_adsp1_alg_hdr *hdr) -{ - int adsp1_region_types[] = { WMFW_ADSP1_ZM, WMFW_ADSP1_DM }; - struct wm_adsp_alg_region *region; - int i; - - for (i = 0; i < ARRAY_SIZE(adsp1_region_types); i++) { - list_for_each_entry(region, &dsp->alg_regions, list) { - if (region->alg == be32_to_cpu(hdr->alg.id) - && region->type == adsp1_region_types[i]) { - switch (region->type) { - case WMFW_ADSP1_ZM: - region->base = be32_to_cpu(hdr->zm); - break; - case WMFW_ADSP1_DM: - region->base = be32_to_cpu(hdr->dm); - break; - } - break; - } - } - } - - return 0; -} - -static int wm_adsp2_fixup_region_base(struct wm_adsp *dsp, - struct wmfw_adsp2_alg_hdr *hdr) -{ - int adsp2_region_types[] = { WMFW_ADSP2_ZM, WMFW_ADSP2_YM, WMFW_ADSP2_XM }; - struct wm_adsp_alg_region *region; - int i; - - for (i = 0; i < ARRAY_SIZE(adsp2_region_types); i++) { - list_for_each_entry(region, &dsp->alg_regions, list) { - if (region->alg == be32_to_cpu(hdr->alg.id) - && region->type == adsp2_region_types[i]) { - switch (region->type) { - case WMFW_ADSP2_ZM: - region->base = be32_to_cpu(hdr->zm); - break; - case WMFW_ADSP2_YM: - region->base = be32_to_cpu(hdr->ym); - break; - case WMFW_ADSP2_XM: - region->base = be32_to_cpu(hdr->xm); - break; - } - break; - } - } - } - - return 0; -} - static int wm_adsp_setup_algs(struct wm_adsp *dsp) { struct regmap *regmap = dsp->regmap; struct wmfw_adsp1_id_hdr adsp1_id; struct wmfw_adsp2_id_hdr adsp2_id; - struct wmfw_adsp1_alg_hdr *adsp1_alg, adsp1_alg_tmp; - struct wmfw_adsp2_alg_hdr *adsp2_alg, adsp2_alg_tmp; + struct wmfw_adsp1_alg_hdr *adsp1_alg; + struct wmfw_adsp2_alg_hdr *adsp2_alg; void *alg, *buf; struct wm_adsp_alg_region *region; const struct wm_adsp_region *mem; @@ -1509,34 +1333,21 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) be32_to_cpu(adsp1_id.fw.ver) & 0xff, algs); - if (dsp->fw_ver > 0) { - /* Translate `wmfw_adsp1_id_hdr' to `wmfw_adsp1_alg_hdr' */ - adsp1_alg_tmp.alg.id = adsp1_id.fw.id; - adsp1_alg_tmp.alg.ver = adsp1_id.fw.ver; - adsp1_alg_tmp.zm = adsp1_id.zm; - adsp1_alg_tmp.dm = adsp1_id.dm; - wm_adsp1_fixup_region_base(dsp, &adsp1_alg_tmp); - list_for_each_entry(region, &dsp->alg_regions, list) { - if (region->alg == be32_to_cpu(adsp1_alg_tmp.alg.id)) - wm_adsp_create_grouped_control(dsp, region); - } - } else { - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP1_ZM; - region->alg = be32_to_cpu(adsp1_id.fw.id); - region->base = be32_to_cpu(adsp1_id.zm); - list_add_tail(®ion->list, &dsp->alg_regions); + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP1_ZM; + region->alg = be32_to_cpu(adsp1_id.fw.id); + region->base = be32_to_cpu(adsp1_id.zm); + list_add_tail(®ion->list, &dsp->alg_regions); - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP1_DM; - region->alg = be32_to_cpu(adsp1_id.fw.id); - region->base = be32_to_cpu(adsp1_id.dm); - list_add_tail(®ion->list, &dsp->alg_regions); - } + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP1_DM; + region->alg = be32_to_cpu(adsp1_id.fw.id); + region->base = be32_to_cpu(adsp1_id.dm); + list_add_tail(®ion->list, &dsp->alg_regions); pos = sizeof(adsp1_id) / 2; term = pos + ((sizeof(*adsp1_alg) * algs) / 2); @@ -1563,43 +1374,29 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) be32_to_cpu(adsp2_id.fw.ver) & 0xff, algs); - if (dsp->fw_ver > 0) { - /* Translate `wmfw_adsp2_id_hdr' to `wmfw_adsp2_alg_hdr' */ - adsp2_alg_tmp.alg.id = adsp2_id.fw.id; - adsp2_alg_tmp.alg.ver = adsp2_id.fw.ver; - adsp2_alg_tmp.zm = adsp2_id.zm; - adsp2_alg_tmp.ym = adsp2_id.ym; - adsp2_alg_tmp.xm = adsp2_id.xm; - wm_adsp2_fixup_region_base(dsp, &adsp2_alg_tmp); - list_for_each_entry(region, &dsp->alg_regions, list) { - if (region->alg == be32_to_cpu(adsp2_alg_tmp.alg.id)) - wm_adsp_create_grouped_control(dsp, region); - } - } else { - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP2_XM; - region->alg = be32_to_cpu(adsp2_id.fw.id); - region->base = be32_to_cpu(adsp2_id.xm); - list_add_tail(®ion->list, &dsp->alg_regions); + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP2_XM; + region->alg = be32_to_cpu(adsp2_id.fw.id); + region->base = be32_to_cpu(adsp2_id.xm); + list_add_tail(®ion->list, &dsp->alg_regions); - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP2_YM; - region->alg = be32_to_cpu(adsp2_id.fw.id); - region->base = be32_to_cpu(adsp2_id.ym); - list_add_tail(®ion->list, &dsp->alg_regions); + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP2_YM; + region->alg = be32_to_cpu(adsp2_id.fw.id); + region->base = be32_to_cpu(adsp2_id.ym); + list_add_tail(®ion->list, &dsp->alg_regions); - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP2_ZM; - region->alg = be32_to_cpu(adsp2_id.fw.id); - region->base = be32_to_cpu(adsp2_id.zm); - list_add_tail(®ion->list, &dsp->alg_regions); - } + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP2_ZM; + region->alg = be32_to_cpu(adsp2_id.fw.id); + region->base = be32_to_cpu(adsp2_id.zm); + list_add_tail(®ion->list, &dsp->alg_regions); pos = sizeof(adsp2_id) / 2; term = pos + ((sizeof(*adsp2_alg) * algs) / 2); @@ -1659,52 +1456,40 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) be32_to_cpu(adsp1_alg[i].dm), be32_to_cpu(adsp1_alg[i].zm)); - if (dsp->fw_ver > 0) { - wm_adsp1_fixup_region_base(dsp, &adsp1_alg[i]); - list_for_each_entry(region, &dsp->alg_regions, list) { - if (region->alg == be32_to_cpu(adsp1_alg[i].alg.id)) - wm_adsp_create_grouped_control(dsp, region); - } + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP1_DM; + region->alg = be32_to_cpu(adsp1_alg[i].alg.id); + region->base = be32_to_cpu(adsp1_alg[i].dm); + region->len = 0; + list_add_tail(®ion->list, &dsp->alg_regions); + if (i + 1 < algs) { + region->len = be32_to_cpu(adsp1_alg[i + 1].dm); + region->len -= be32_to_cpu(adsp1_alg[i].dm); + region->len *= 4; + wm_adsp_create_grouped_control(dsp, region); } else { - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) { - ret = -ENOMEM; - goto out; - } - region->type = WMFW_ADSP1_DM; - region->alg = be32_to_cpu(adsp1_alg[i].alg.id); - region->base = be32_to_cpu(adsp1_alg[i].dm); - region->len = 0; - list_add_tail(®ion->list, &dsp->alg_regions); - if (i + 1 < algs) { - region->len = be32_to_cpu(adsp1_alg[i + 1].dm); - region->len -= be32_to_cpu(adsp1_alg[i].dm); - region->len *= 4; - wm_adsp_create_grouped_control(dsp, region); - } else { - adsp_warn(dsp, "Length info not specified for region DM with ID %x\n", - be32_to_cpu(adsp1_alg[i].alg.id)); - } + adsp_warn(dsp, "Missing length info for region DM with ID %x\n", + be32_to_cpu(adsp1_alg[i].alg.id)); + } - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) { - ret = -ENOMEM; - goto out; - } - region->type = WMFW_ADSP1_ZM; - region->alg = be32_to_cpu(adsp1_alg[i].alg.id); - region->base = be32_to_cpu(adsp1_alg[i].zm); - region->len = 0; - list_add_tail(®ion->list, &dsp->alg_regions); - if (i + 1 < algs) { - region->len = be32_to_cpu(adsp1_alg[i + 1].zm); - region->len -= be32_to_cpu(adsp1_alg[i].zm); - region->len *= 4; - wm_adsp_create_grouped_control(dsp, region); - } else { - adsp_warn(dsp, "Length info not specified for region ZM with ID %x\n", - be32_to_cpu(adsp1_alg[i].alg.id)); - } + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP1_ZM; + region->alg = be32_to_cpu(adsp1_alg[i].alg.id); + region->base = be32_to_cpu(adsp1_alg[i].zm); + region->len = 0; + list_add_tail(®ion->list, &dsp->alg_regions); + if (i + 1 < algs) { + region->len = be32_to_cpu(adsp1_alg[i + 1].zm); + region->len -= be32_to_cpu(adsp1_alg[i].zm); + region->len *= 4; + wm_adsp_create_grouped_control(dsp, region); + } else { + adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", + be32_to_cpu(adsp1_alg[i].alg.id)); } break; @@ -1719,72 +1504,58 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) be32_to_cpu(adsp2_alg[i].ym), be32_to_cpu(adsp2_alg[i].zm)); - if (dsp->fw_ver > 0) { - wm_adsp2_fixup_region_base(dsp, &adsp2_alg[i]); - list_for_each_entry(region, &dsp->alg_regions, list) { - if (region->alg == be32_to_cpu(adsp2_alg[i].alg.id)) - wm_adsp_create_grouped_control(dsp, region); - } + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP2_XM; + region->alg = be32_to_cpu(adsp2_alg[i].alg.id); + region->base = be32_to_cpu(adsp2_alg[i].xm); + region->len = 0; + list_add_tail(®ion->list, &dsp->alg_regions); + if (i + 1 < algs) { + region->len = be32_to_cpu(adsp2_alg[i + 1].xm); + region->len -= be32_to_cpu(adsp2_alg[i].xm); + region->len *= 4; + wm_adsp_create_grouped_control(dsp, region); } else { - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) { - ret = -ENOMEM; - goto out; - } - region->type = WMFW_ADSP2_XM; - region->alg = be32_to_cpu(adsp2_alg[i].alg.id); - region->base = be32_to_cpu(adsp2_alg[i].xm); - region->len = 0; - list_add_tail(®ion->list, &dsp->alg_regions); - if (i + 1 < algs) { - region->len = be32_to_cpu(adsp2_alg[i + 1].xm); - region->len -= be32_to_cpu(adsp2_alg[i].xm); - region->len *= 4; - wm_adsp_create_grouped_control(dsp, region); - } else { - adsp_warn(dsp, "Length info not specified for region XM with ID %x\n", - be32_to_cpu(adsp2_alg[i].alg.id)); - } + adsp_warn(dsp, "Missing length info for region XM with ID %x\n", + be32_to_cpu(adsp2_alg[i].alg.id)); + } - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) { - ret = -ENOMEM; - goto out; - } - region->type = WMFW_ADSP2_YM; - region->alg = be32_to_cpu(adsp2_alg[i].alg.id); - region->base = be32_to_cpu(adsp2_alg[i].ym); - region->len = 0; - list_add_tail(®ion->list, &dsp->alg_regions); - if (i + 1 < algs) { - region->len = be32_to_cpu(adsp2_alg[i + 1].ym); - region->len -= be32_to_cpu(adsp2_alg[i].ym); - region->len *= 4; - wm_adsp_create_grouped_control(dsp, region); - } else { - adsp_warn(dsp, "Length info not specified for region YM with ID %x\n", - be32_to_cpu(adsp2_alg[i].alg.id)); - } + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP2_YM; + region->alg = be32_to_cpu(adsp2_alg[i].alg.id); + region->base = be32_to_cpu(adsp2_alg[i].ym); + region->len = 0; + list_add_tail(®ion->list, &dsp->alg_regions); + if (i + 1 < algs) { + region->len = be32_to_cpu(adsp2_alg[i + 1].ym); + region->len -= be32_to_cpu(adsp2_alg[i].ym); + region->len *= 4; + wm_adsp_create_grouped_control(dsp, region); + } else { + adsp_warn(dsp, "Missing length info for region YM with ID %x\n", + be32_to_cpu(adsp2_alg[i].alg.id)); + } - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) { - ret = -ENOMEM; - goto out; - } - region->type = WMFW_ADSP2_ZM; - region->alg = be32_to_cpu(adsp2_alg[i].alg.id); - region->base = be32_to_cpu(adsp2_alg[i].zm); - region->len = 0; - list_add_tail(®ion->list, &dsp->alg_regions); - if (i + 1 < algs) { - region->len = be32_to_cpu(adsp2_alg[i + 1].zm); - region->len -= be32_to_cpu(adsp2_alg[i].zm); - region->len *= 4; - wm_adsp_create_grouped_control(dsp, region); - } else { - adsp_warn(dsp, "Length info not specified for region ZM with ID %x\n", - be32_to_cpu(adsp2_alg[i].alg.id)); - } + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP2_ZM; + region->alg = be32_to_cpu(adsp2_alg[i].alg.id); + region->base = be32_to_cpu(adsp2_alg[i].zm); + region->len = 0; + list_add_tail(®ion->list, &dsp->alg_regions); + if (i + 1 < algs) { + region->len = be32_to_cpu(adsp2_alg[i + 1].zm); + region->len -= be32_to_cpu(adsp2_alg[i].zm); + region->len *= 4; + wm_adsp_create_grouped_control(dsp, region); + } else { + adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", + be32_to_cpu(adsp2_alg[i].alg.id)); } break; } @@ -2115,7 +1886,6 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, list_for_each_entry(ctl, &dsp->ctl_list, list) ctl->enabled = 0; - break; default: @@ -2266,9 +2036,6 @@ int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); struct wm_adsp *dsp = &dsps[w->shift]; - /* Always default to version 0 to ensure backwards - * compatibility with older firmware images */ - dsp->fw_ver = 0; dsp->card = codec->card; switch (event) { diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 5ed2d7cc868..284eaf36f3e 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -33,7 +33,6 @@ struct wm_adsp_alg_region { unsigned int alg; int type; unsigned int base; - unsigned int offset; size_t len; }; @@ -100,7 +99,6 @@ struct wm_adsp { int fw; bool running; - int fw_ver; struct mutex ctl_lock; struct list_head ctl_list; diff --git a/sound/soc/codecs/wmfw.h b/sound/soc/codecs/wmfw.h index 877ce305bfc..ef163360a74 100644 --- a/sound/soc/codecs/wmfw.h +++ b/sound/soc/codecs/wmfw.h @@ -15,12 +15,6 @@ #include -#define WMFW_MAX_ALG_NAME 256 -#define WMFW_MAX_ALG_DESCR_NAME 256 - -#define WMFW_MAX_COEFF_NAME 256 -#define WMFW_MAX_COEFF_DESCR_NAME 256 - struct wmfw_header { char magic[4]; __le32 len; @@ -96,30 +90,6 @@ struct wmfw_adsp2_alg_hdr { __be32 ym; } __packed; -struct wmfw_adsp2_alg_data { - __le32 id; - u8 name[WMFW_MAX_ALG_NAME]; - u8 descr[WMFW_MAX_ALG_DESCR_NAME]; - __le32 ncoeff; - u8 data[]; -} __packed; - -struct wmfw_adsp2_coeff_data_hdr { - union { - __le32 type; - __le32 offset; - }; - __le32 size; -} __packed; - -struct wmfw_adsp2_coeff_data { - u8 name[WMFW_MAX_COEFF_NAME]; - u8 descr[WMFW_MAX_COEFF_DESCR_NAME]; - __le32 type; - __le32 len; - u8 data[]; -} __packed; - struct wmfw_coeff_hdr { u8 magic[4]; __le32 len; @@ -147,10 +117,9 @@ struct wmfw_coeff_item { #define WMFW_ADSP1 1 #define WMFW_ADSP2 2 -#define WMFW_ABSOLUTE 0xf0 -#define WMFW_ALGORITHM_DATA 0xf2 -#define WMFW_NAME_TEXT 0xfe -#define WMFW_INFO_TEXT 0xff +#define WMFW_ABSOLUTE 0xf0 +#define WMFW_NAME_TEXT 0xfe +#define WMFW_INFO_TEXT 0xff #define WMFW_ADSP1_PM 2 #define WMFW_ADSP1_DM 3 From 938928f48831cf0bf5d1b60d8f11f31839a43251 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 28 Nov 2014 13:43:14 +0000 Subject: [PATCH 0731/1167] Revert "ASoC: wm_adsp: Add support for grouped ALSA binary controls" This reverts commit fa98160ac86c5e90de46a34bb5e3e1151f7b3f6b. Prepare for new implementation of controls by backing out the old implementation. Change-Id: Ibf4e8665f7f860fa02821cb80796918e0a812bb6 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 59 ++++++-------------------------------- sound/soc/codecs/wm_adsp.h | 1 - 2 files changed, 8 insertions(+), 52 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index fd6f7bed7f2..09750e9e674 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1138,6 +1138,7 @@ static void wm_adsp_ctl_work(struct work_struct *work) static int wm_adsp_create_control(struct wm_adsp *dsp, const struct wm_adsp_alg_region *region) + { struct wm_coeff_ctl *ctl; struct wmfw_ctl_work *ctl_work; @@ -1170,8 +1171,8 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, return -EINVAL; } - snprintf(name, PAGE_SIZE, "DSP%d %s %x:%d", - dsp->num, region_name, region->alg, region->block); + snprintf(name, PAGE_SIZE, "DSP%d %s %x", + dsp->num, region_name, region->alg); list_for_each_entry(ctl, &dsp->ctl_list, list) { @@ -1235,50 +1236,6 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, return ret; } -static int wm_adsp_create_grouped_control(struct wm_adsp *dsp, - struct wm_adsp_alg_region *region) -{ - size_t len = region->len, offset = 0; - struct wm_adsp_alg_region *r; - int ret; - - region->block = 0; - /* This is the quick case for control groups of a single block */ - if (region->len <= 512) - return wm_adsp_create_control(dsp, region); - - /* The passed `region' is already in the list - * of algorithm regions so just create the control for it and don't - * add it to the list */ - region->len = 512; - ret = wm_adsp_create_control(dsp, region); - if (ret < 0) - return ret; - offset += 512; - - /* Carve up the entire region into 512-byte chunks */ - do { - r = kzalloc(sizeof(*r), GFP_KERNEL); - if (!r) - return -ENOMEM; - r->block = offset / 512; - r->type = region->type; - r->alg = region->alg; - r->base = region->base + offset / 4; - if (len - offset > 512) - r->len = 512; - else - r->len = len - offset; - offset += r->len; - list_add_tail(&r->list, &dsp->alg_regions); - ret = wm_adsp_create_control(dsp, r); - if (ret < 0) - return ret; - } while (offset < len); - - return 0; -} - static int wm_adsp_setup_algs(struct wm_adsp *dsp) { struct regmap *regmap = dsp->regmap; @@ -1468,7 +1425,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len = be32_to_cpu(adsp1_alg[i + 1].dm); region->len -= be32_to_cpu(adsp1_alg[i].dm); region->len *= 4; - wm_adsp_create_grouped_control(dsp, region); + wm_adsp_create_control(dsp, region); } else { adsp_warn(dsp, "Missing length info for region DM with ID %x\n", be32_to_cpu(adsp1_alg[i].alg.id)); @@ -1486,7 +1443,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len = be32_to_cpu(adsp1_alg[i + 1].zm); region->len -= be32_to_cpu(adsp1_alg[i].zm); region->len *= 4; - wm_adsp_create_grouped_control(dsp, region); + wm_adsp_create_control(dsp, region); } else { adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", be32_to_cpu(adsp1_alg[i].alg.id)); @@ -1516,7 +1473,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len = be32_to_cpu(adsp2_alg[i + 1].xm); region->len -= be32_to_cpu(adsp2_alg[i].xm); region->len *= 4; - wm_adsp_create_grouped_control(dsp, region); + wm_adsp_create_control(dsp, region); } else { adsp_warn(dsp, "Missing length info for region XM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); @@ -1534,7 +1491,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len = be32_to_cpu(adsp2_alg[i + 1].ym); region->len -= be32_to_cpu(adsp2_alg[i].ym); region->len *= 4; - wm_adsp_create_grouped_control(dsp, region); + wm_adsp_create_control(dsp, region); } else { adsp_warn(dsp, "Missing length info for region YM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); @@ -1552,7 +1509,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) region->len = be32_to_cpu(adsp2_alg[i + 1].zm); region->len -= be32_to_cpu(adsp2_alg[i].zm); region->len *= 4; - wm_adsp_create_grouped_control(dsp, region); + wm_adsp_create_control(dsp, region); } else { adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 284eaf36f3e..a1869943caf 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -29,7 +29,6 @@ struct wm_adsp_region { struct wm_adsp_alg_region { struct list_head list; - unsigned int block; unsigned int alg; int type; unsigned int base; From d168f8d25e229079d5a01fd43a088661cc378a0b Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 10 Apr 2015 15:44:28 +0100 Subject: [PATCH 0732/1167] ASoC: wm_adsp: Remove some checkpatch errors in wm_adsp_stream_free There is no need to check if a pointer is NULL before passing to kfree, kfree does this itself. Change-Id: I1338a177fdf230490d0b50ff33247763818f75c5 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 09750e9e674..88eefe72e02 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2678,15 +2678,11 @@ EXPORT_SYMBOL_GPL(wm_adsp_stream_alloc); int wm_adsp_stream_free(struct wm_adsp *adsp) { - if (adsp->host_regions) { - kfree(adsp->host_regions); - adsp->host_regions = NULL; - } + kfree(adsp->host_regions); + adsp->host_regions = NULL; - if (adsp->raw_capt_buf) { - kfree(adsp->raw_capt_buf); - adsp->raw_capt_buf = NULL; - } + kfree(adsp->raw_capt_buf); + adsp->raw_capt_buf = NULL; if (adsp->capt_buf.buf) { vfree(adsp->capt_buf.buf); From 8aa99c36d74498257e5807eb05f15a1374fe4ba4 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 17 Nov 2014 16:33:51 +0000 Subject: [PATCH 0733/1167] ASoC: wm_adsp: Split out adsp1 & 2 setup algorithms The vast majority of the wm_adsp_setup_algs function is case statements for ADSP1 or ADSP2, this patch splits this out into to seperate functions wm_adsp1_setup_algs and wm_adsp2_setup_algs. The small amount of shared code between them is factored out into an extra helper function. This makes the code a lot cleaner. Change-Id: I83e6778c2c90e5178bffb15cc7f7225cd9c3edc7 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 489 +++++++++++++++++++------------------ 1 file changed, 247 insertions(+), 242 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 88eefe72e02..69d8f675444 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1236,290 +1236,295 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, return ret; } -static int wm_adsp_setup_algs(struct wm_adsp *dsp) +static void *wm_adsp_read_algs(struct wm_adsp *dsp, size_t algs, + unsigned int pos, unsigned int len) { - struct regmap *regmap = dsp->regmap; - struct wmfw_adsp1_id_hdr adsp1_id; - struct wmfw_adsp2_id_hdr adsp2_id; - struct wmfw_adsp1_alg_hdr *adsp1_alg; - struct wmfw_adsp2_alg_hdr *adsp2_alg; - void *alg, *buf; - struct wm_adsp_alg_region *region; - const struct wm_adsp_region *mem; - unsigned int pos, term; - size_t algs, buf_size; + void *alg; + int ret; __be32 val; - int i, ret; - switch (dsp->type) { - case WMFW_ADSP1: - mem = wm_adsp_find_region(dsp, WMFW_ADSP1_DM); - break; - case WMFW_ADSP2: - mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM); - break; - default: - mem = NULL; - break; + if (algs == 0) { + adsp_err(dsp, "No algorithms\n"); + return ERR_PTR(-EINVAL); } - if (mem == NULL) { - BUG_ON(mem != NULL); - return -EINVAL; + if (algs > 1024) { + adsp_err(dsp, "Algorithm count %zx excessive\n", algs); + return ERR_PTR(-EINVAL); } - switch (dsp->type) { - case WMFW_ADSP1: - ret = regmap_raw_read(regmap, mem->base, &adsp1_id, - sizeof(adsp1_id)); - if (ret != 0) { - adsp_err(dsp, "Failed to read algorithm info: %d\n", - ret); - return ret; - } + /* Read the terminator first to validate the length */ + ret = regmap_raw_read(dsp->regmap, pos + len, &val, sizeof(val)); + if (ret != 0) { + adsp_err(dsp, "Failed to read algorithm list end: %d\n", + ret); + return ERR_PTR(ret); + } - buf = &adsp1_id; - buf_size = sizeof(adsp1_id); + if (be32_to_cpu(val) != 0xbedead) + adsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbeadead\n", + pos + len, be32_to_cpu(val)); - algs = be32_to_cpu(adsp1_id.algs); - dsp->fw_id = be32_to_cpu(adsp1_id.fw.id); - adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n", - dsp->fw_id, - (be32_to_cpu(adsp1_id.fw.ver) & 0xff0000) >> 16, - (be32_to_cpu(adsp1_id.fw.ver) & 0xff00) >> 8, - be32_to_cpu(adsp1_id.fw.ver) & 0xff, - algs); + alg = kzalloc(len * 2, GFP_KERNEL | GFP_DMA); + if (!alg) + return ERR_PTR(-ENOMEM); - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP1_ZM; - region->alg = be32_to_cpu(adsp1_id.fw.id); - region->base = be32_to_cpu(adsp1_id.zm); - list_add_tail(®ion->list, &dsp->alg_regions); + ret = regmap_raw_read(dsp->regmap, pos, alg, len * 2); + if (ret != 0) { + adsp_err(dsp, "Failed to read algorithm list: %d\n", + ret); + kfree(alg); + return ERR_PTR(ret); + } - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP1_DM; - region->alg = be32_to_cpu(adsp1_id.fw.id); - region->base = be32_to_cpu(adsp1_id.dm); - list_add_tail(®ion->list, &dsp->alg_regions); + return alg; +} - pos = sizeof(adsp1_id) / 2; - term = pos + ((sizeof(*adsp1_alg) * algs) / 2); - break; +static int wm_adsp1_setup_algs(struct wm_adsp *dsp) +{ + struct wmfw_adsp1_id_hdr adsp1_id; + struct wmfw_adsp1_alg_hdr *adsp1_alg; + struct wm_adsp_alg_region *region; + const struct wm_adsp_region *mem; + unsigned int pos, len; + size_t algs; + int i, ret; - case WMFW_ADSP2: - ret = regmap_raw_read(regmap, mem->base, &adsp2_id, - sizeof(adsp2_id)); - if (ret != 0) { - adsp_err(dsp, "Failed to read algorithm info: %d\n", - ret); - return ret; - } + mem = wm_adsp_find_region(dsp, WMFW_ADSP1_DM); + if (WARN_ON(!mem)) + return -EINVAL; + + ret = regmap_raw_read(dsp->regmap, mem->base, &adsp1_id, + sizeof(adsp1_id)); + if (ret != 0) { + adsp_err(dsp, "Failed to read algorithm info: %d\n", + ret); + return ret; + } - buf = &adsp2_id; - buf_size = sizeof(adsp2_id); + algs = be32_to_cpu(adsp1_id.algs); + dsp->fw_id = be32_to_cpu(adsp1_id.fw.id); + adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n", + dsp->fw_id, + (be32_to_cpu(adsp1_id.fw.ver) & 0xff0000) >> 16, + (be32_to_cpu(adsp1_id.fw.ver) & 0xff00) >> 8, + be32_to_cpu(adsp1_id.fw.ver) & 0xff, + algs); - algs = be32_to_cpu(adsp2_id.algs); - dsp->fw_id = be32_to_cpu(adsp2_id.fw.id); - adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n", - dsp->fw_id, - (be32_to_cpu(adsp2_id.fw.ver) & 0xff0000) >> 16, - (be32_to_cpu(adsp2_id.fw.ver) & 0xff00) >> 8, - be32_to_cpu(adsp2_id.fw.ver) & 0xff, - algs); + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP1_ZM; + region->alg = be32_to_cpu(adsp1_id.fw.id); + region->base = be32_to_cpu(adsp1_id.zm); + list_add_tail(®ion->list, &dsp->alg_regions); - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP2_XM; - region->alg = be32_to_cpu(adsp2_id.fw.id); - region->base = be32_to_cpu(adsp2_id.xm); - list_add_tail(®ion->list, &dsp->alg_regions); + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP1_DM; + region->alg = be32_to_cpu(adsp1_id.fw.id); + region->base = be32_to_cpu(adsp1_id.dm); + list_add_tail(®ion->list, &dsp->alg_regions); + + pos = sizeof(adsp1_id) / 2; + len = (sizeof(*adsp1_alg) * algs) / 2; + + adsp1_alg = wm_adsp_read_algs(dsp, algs, mem->base + pos, len); + if (IS_ERR(adsp1_alg)) + return PTR_ERR(adsp1_alg); + + for (i = 0; i < algs; i++) { + adsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n", + i, be32_to_cpu(adsp1_alg[i].alg.id), + (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff0000) >> 16, + (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff00) >> 8, + be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff, + be32_to_cpu(adsp1_alg[i].dm), + be32_to_cpu(adsp1_alg[i].zm)); region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP2_YM; - region->alg = be32_to_cpu(adsp2_id.fw.id); - region->base = be32_to_cpu(adsp2_id.ym); + if (!region) { + ret = -ENOMEM; + goto out; + } + region->type = WMFW_ADSP1_DM; + region->alg = be32_to_cpu(adsp1_alg[i].alg.id); + region->base = be32_to_cpu(adsp1_alg[i].dm); + region->len = 0; list_add_tail(®ion->list, &dsp->alg_regions); + if (i + 1 < algs) { + region->len = be32_to_cpu(adsp1_alg[i + 1].dm); + region->len -= be32_to_cpu(adsp1_alg[i].dm); + region->len *= 4; + wm_adsp_create_control(dsp, region); + } else { + adsp_warn(dsp, "Missing length info for region DM with ID %x\n", + be32_to_cpu(adsp1_alg[i].alg.id)); + } region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP2_ZM; - region->alg = be32_to_cpu(adsp2_id.fw.id); - region->base = be32_to_cpu(adsp2_id.zm); + if (!region) { + ret = -ENOMEM; + goto out; + } + region->type = WMFW_ADSP1_ZM; + region->alg = be32_to_cpu(adsp1_alg[i].alg.id); + region->base = be32_to_cpu(adsp1_alg[i].zm); + region->len = 0; list_add_tail(®ion->list, &dsp->alg_regions); - - pos = sizeof(adsp2_id) / 2; - term = pos + ((sizeof(*adsp2_alg) * algs) / 2); - break; - - default: - BUG_ON(NULL == "Unknown DSP type"); - return -EINVAL; + if (i + 1 < algs) { + region->len = be32_to_cpu(adsp1_alg[i + 1].zm); + region->len -= be32_to_cpu(adsp1_alg[i].zm); + region->len *= 4; + wm_adsp_create_control(dsp, region); + } else { + adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", + be32_to_cpu(adsp1_alg[i].alg.id)); + } } - if (algs == 0) { - adsp_err(dsp, "No algorithms\n"); - return -EINVAL; - } +out: + kfree(adsp1_alg); + return ret; +} - if (algs > 1024) { - adsp_err(dsp, "Algorithm count %zx excessive\n", algs); - print_hex_dump_bytes(dev_name(dsp->dev), DUMP_PREFIX_OFFSET, - buf, buf_size); +static int wm_adsp2_setup_algs(struct wm_adsp *dsp) +{ + struct wmfw_adsp2_id_hdr adsp2_id; + struct wmfw_adsp2_alg_hdr *adsp2_alg; + struct wm_adsp_alg_region *region; + const struct wm_adsp_region *mem; + unsigned int pos, len; + size_t algs; + int i, ret; + + mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM); + if (WARN_ON(!mem)) return -EINVAL; - } - /* Read the terminator first to validate the length */ - ret = regmap_raw_read(regmap, mem->base + term, &val, sizeof(val)); + ret = regmap_raw_read(dsp->regmap, mem->base, &adsp2_id, + sizeof(adsp2_id)); if (ret != 0) { - adsp_err(dsp, "Failed to read algorithm list end: %d\n", - ret); + adsp_err(dsp, "Failed to read algorithm info: %d\n", + ret); return ret; } - if (be32_to_cpu(val) != 0xbedead) - adsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbeadead\n", - term, be32_to_cpu(val)); + algs = be32_to_cpu(adsp2_id.algs); + dsp->fw_id = be32_to_cpu(adsp2_id.fw.id); + adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n", + dsp->fw_id, + (be32_to_cpu(adsp2_id.fw.ver) & 0xff0000) >> 16, + (be32_to_cpu(adsp2_id.fw.ver) & 0xff00) >> 8, + be32_to_cpu(adsp2_id.fw.ver) & 0xff, + algs); - alg = kzalloc((term - pos) * 2, GFP_KERNEL | GFP_DMA); - if (!alg) + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) return -ENOMEM; + region->type = WMFW_ADSP2_XM; + region->alg = be32_to_cpu(adsp2_id.fw.id); + region->base = be32_to_cpu(adsp2_id.xm); + list_add_tail(®ion->list, &dsp->alg_regions); - ret = regmap_raw_read(regmap, mem->base + pos, alg, (term - pos) * 2); - if (ret != 0) { - adsp_err(dsp, "Failed to read algorithm list: %d\n", - ret); - goto out; - } + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP2_YM; + region->alg = be32_to_cpu(adsp2_id.fw.id); + region->base = be32_to_cpu(adsp2_id.ym); + list_add_tail(®ion->list, &dsp->alg_regions); - adsp1_alg = alg; - adsp2_alg = alg; + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + region->type = WMFW_ADSP2_ZM; + region->alg = be32_to_cpu(adsp2_id.fw.id); + region->base = be32_to_cpu(adsp2_id.zm); + list_add_tail(®ion->list, &dsp->alg_regions); - for (i = 0; i < algs; i++) { - switch (dsp->type) { - case WMFW_ADSP1: - adsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n", - i, be32_to_cpu(adsp1_alg[i].alg.id), - (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff0000) >> 16, - (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff00) >> 8, - be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff, - be32_to_cpu(adsp1_alg[i].dm), - be32_to_cpu(adsp1_alg[i].zm)); - - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP1_DM; - region->alg = be32_to_cpu(adsp1_alg[i].alg.id); - region->base = be32_to_cpu(adsp1_alg[i].dm); - region->len = 0; - list_add_tail(®ion->list, &dsp->alg_regions); - if (i + 1 < algs) { - region->len = be32_to_cpu(adsp1_alg[i + 1].dm); - region->len -= be32_to_cpu(adsp1_alg[i].dm); - region->len *= 4; - wm_adsp_create_control(dsp, region); - } else { - adsp_warn(dsp, "Missing length info for region DM with ID %x\n", - be32_to_cpu(adsp1_alg[i].alg.id)); - } + pos = sizeof(adsp2_id) / 2; + len = (sizeof(*adsp2_alg) * algs) / 2; - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP1_ZM; - region->alg = be32_to_cpu(adsp1_alg[i].alg.id); - region->base = be32_to_cpu(adsp1_alg[i].zm); - region->len = 0; - list_add_tail(®ion->list, &dsp->alg_regions); - if (i + 1 < algs) { - region->len = be32_to_cpu(adsp1_alg[i + 1].zm); - region->len -= be32_to_cpu(adsp1_alg[i].zm); - region->len *= 4; - wm_adsp_create_control(dsp, region); - } else { - adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", - be32_to_cpu(adsp1_alg[i].alg.id)); - } - break; + adsp2_alg = wm_adsp_read_algs(dsp, algs, mem->base + pos, len); + if (IS_ERR(adsp2_alg)) + return PTR_ERR(adsp2_alg); - case WMFW_ADSP2: - adsp_info(dsp, - "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n", - i, be32_to_cpu(adsp2_alg[i].alg.id), - (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16, - (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8, - be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff, - be32_to_cpu(adsp2_alg[i].xm), - be32_to_cpu(adsp2_alg[i].ym), - be32_to_cpu(adsp2_alg[i].zm)); - - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP2_XM; - region->alg = be32_to_cpu(adsp2_alg[i].alg.id); - region->base = be32_to_cpu(adsp2_alg[i].xm); - region->len = 0; - list_add_tail(®ion->list, &dsp->alg_regions); - if (i + 1 < algs) { - region->len = be32_to_cpu(adsp2_alg[i + 1].xm); - region->len -= be32_to_cpu(adsp2_alg[i].xm); - region->len *= 4; - wm_adsp_create_control(dsp, region); - } else { - adsp_warn(dsp, "Missing length info for region XM with ID %x\n", - be32_to_cpu(adsp2_alg[i].alg.id)); - } + for (i = 0; i < algs; i++) { + adsp_info(dsp, + "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n", + i, be32_to_cpu(adsp2_alg[i].alg.id), + (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16, + (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8, + be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff, + be32_to_cpu(adsp2_alg[i].xm), + be32_to_cpu(adsp2_alg[i].ym), + be32_to_cpu(adsp2_alg[i].zm)); - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP2_YM; - region->alg = be32_to_cpu(adsp2_alg[i].alg.id); - region->base = be32_to_cpu(adsp2_alg[i].ym); - region->len = 0; - list_add_tail(®ion->list, &dsp->alg_regions); - if (i + 1 < algs) { - region->len = be32_to_cpu(adsp2_alg[i + 1].ym); - region->len -= be32_to_cpu(adsp2_alg[i].ym); - region->len *= 4; - wm_adsp_create_control(dsp, region); - } else { - adsp_warn(dsp, "Missing length info for region YM with ID %x\n", - be32_to_cpu(adsp2_alg[i].alg.id)); - } + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) { + ret = -ENOMEM; + goto out; + } + region->type = WMFW_ADSP2_XM; + region->alg = be32_to_cpu(adsp2_alg[i].alg.id); + region->base = be32_to_cpu(adsp2_alg[i].xm); + region->len = 0; + list_add_tail(®ion->list, &dsp->alg_regions); + if (i + 1 < algs) { + region->len = be32_to_cpu(adsp2_alg[i + 1].xm); + region->len -= be32_to_cpu(adsp2_alg[i].xm); + region->len *= 4; + wm_adsp_create_control(dsp, region); + } else { + adsp_warn(dsp, "Missing length info for region XM with ID %x\n", + be32_to_cpu(adsp2_alg[i].alg.id)); + } - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) - return -ENOMEM; - region->type = WMFW_ADSP2_ZM; - region->alg = be32_to_cpu(adsp2_alg[i].alg.id); - region->base = be32_to_cpu(adsp2_alg[i].zm); - region->len = 0; - list_add_tail(®ion->list, &dsp->alg_regions); - if (i + 1 < algs) { - region->len = be32_to_cpu(adsp2_alg[i + 1].zm); - region->len -= be32_to_cpu(adsp2_alg[i].zm); - region->len *= 4; - wm_adsp_create_control(dsp, region); - } else { - adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", - be32_to_cpu(adsp2_alg[i].alg.id)); - } - break; + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) { + ret = -ENOMEM; + goto out; + } + region->type = WMFW_ADSP2_YM; + region->alg = be32_to_cpu(adsp2_alg[i].alg.id); + region->base = be32_to_cpu(adsp2_alg[i].ym); + region->len = 0; + list_add_tail(®ion->list, &dsp->alg_regions); + if (i + 1 < algs) { + region->len = be32_to_cpu(adsp2_alg[i + 1].ym); + region->len -= be32_to_cpu(adsp2_alg[i].ym); + region->len *= 4; + wm_adsp_create_control(dsp, region); + } else { + adsp_warn(dsp, "Missing length info for region YM with ID %x\n", + be32_to_cpu(adsp2_alg[i].alg.id)); + } + + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) { + ret = -ENOMEM; + goto out; + } + region->type = WMFW_ADSP2_ZM; + region->alg = be32_to_cpu(adsp2_alg[i].alg.id); + region->base = be32_to_cpu(adsp2_alg[i].zm); + region->len = 0; + list_add_tail(®ion->list, &dsp->alg_regions); + if (i + 1 < algs) { + region->len = be32_to_cpu(adsp2_alg[i + 1].zm); + region->len -= be32_to_cpu(adsp2_alg[i].zm); + region->len *= 4; + wm_adsp_create_control(dsp, region); + } else { + adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", + be32_to_cpu(adsp2_alg[i].alg.id)); } } out: - kfree(alg); + kfree(adsp2_alg); return ret; } @@ -1806,7 +1811,7 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, if (ret != 0) goto err; - ret = wm_adsp_setup_algs(dsp); + ret = wm_adsp1_setup_algs(dsp); if (ret != 0) goto err; @@ -1918,7 +1923,7 @@ static void wm_adsp2_boot_work(struct work_struct *work) if (ret != 0) goto err; - ret = wm_adsp_setup_algs(dsp); + ret = wm_adsp2_setup_algs(dsp); if (ret != 0) goto err; From eff5d863bd7503c95c11b66ca466743e5dfa5d33 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 19 Nov 2014 14:04:09 +0000 Subject: [PATCH 0734/1167] ASoC: wm_adsp: Improve variable naming We have wm_adsp_region, wm_adsp_alg_region, and wmfw_region, the variables for which are all frequently called region, this can get quite confusing when review the code especially given some functions are quite long. Consistently use mem for wm_adsp_regions, alg_region for wm_adsp_alg_region and region for wmfw_region. Whilst we are at it, we use a mix of adsp and dsp for pointers to the wm_adsp structure standardise this on dsp. Change-Id: Ib7b786742501abe64eefb29a92e832a5d28b3188 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 733 +++++++++++++++++++------------------ sound/soc/codecs/wm_adsp.h | 4 +- sound/soc/codecs/wmfw.h | 4 +- 3 files changed, 372 insertions(+), 369 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 69d8f675444..1079e0a243a 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -431,9 +431,9 @@ struct wm_coeff_ctl_ops { struct wm_coeff_ctl { const char *name; - struct wm_adsp_alg_region region; + struct wm_adsp_alg_region alg_region; struct wm_coeff_ctl_ops ops; - struct wm_adsp *adsp; + struct wm_adsp *dsp; void *private; unsigned int enabled:1; struct list_head list; @@ -449,9 +449,9 @@ static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol, { struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; - struct wm_adsp *adsp = snd_soc_codec_get_drvdata(codec); + struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec); - ucontrol->value.integer.value[0] = adsp[e->shift_l].fw; + ucontrol->value.integer.value[0] = dsp[e->shift_l].fw; return 0; } @@ -461,18 +461,18 @@ static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol, { struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; - struct wm_adsp *adsp = snd_soc_codec_get_drvdata(codec); + struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec); - if (ucontrol->value.integer.value[0] == adsp[e->shift_l].fw) + if (ucontrol->value.integer.value[0] == dsp[e->shift_l].fw) return 0; - if (ucontrol->value.integer.value[0] >= adsp[e->shift_l].num_firmwares) + if (ucontrol->value.integer.value[0] >= dsp[e->shift_l].num_firmwares) return -EINVAL; - if (adsp[e->shift_l].running) + if (dsp[e->shift_l].running) return -EBUSY; - adsp[e->shift_l].fw = ucontrol->value.integer.value[0]; + dsp[e->shift_l].fw = ucontrol->value.integer.value[0]; return 0; } @@ -482,21 +482,21 @@ static int wm_adsp2v2_rate_get(struct snd_kcontrol *kcontrol, { struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; - struct wm_adsp *adsps = snd_soc_codec_get_drvdata(codec); - struct wm_adsp *adsp = &adsps[e->shift_l]; + struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); + struct wm_adsp *dsp = &dsps[e->shift_l]; unsigned int item; - mutex_lock(&adsp->rate_lock); + mutex_lock(&dsp->rate_lock); for (item = 0; item < e->max; item++) { - if (e->values[item] == adsp->rate_cache) { + if (e->values[item] == dsp->rate_cache) { ucontrol->value.enumerated.item[0] = item; - mutex_unlock(&adsp->rate_lock); + mutex_unlock(&dsp->rate_lock); return 0; } } - mutex_unlock(&adsp->rate_lock); + mutex_unlock(&dsp->rate_lock); return -EINVAL; } @@ -506,8 +506,8 @@ static int wm_adsp2v2_rate_put(struct snd_kcontrol *kcontrol, { struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; - struct wm_adsp *adsps = snd_soc_codec_get_drvdata(codec); - struct wm_adsp *adsp = &adsps[e->shift_l]; + struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); + struct wm_adsp *dsp = &dsps[e->shift_l]; unsigned int item = ucontrol->value.enumerated.item[0]; unsigned int val; int ret = 0; @@ -515,19 +515,19 @@ static int wm_adsp2v2_rate_put(struct snd_kcontrol *kcontrol, if (item >= e->max) return -EINVAL; - mutex_lock(&adsp->rate_lock); + mutex_lock(&dsp->rate_lock); - if (e->values[item] != adsp->rate_cache) { + if (e->values[item] != dsp->rate_cache) { val = e->values[item]; - adsp->rate_cache = val; + dsp->rate_cache = val; - if (adsp->running) { - ret = adsp->rate_put_cb(adsp, ADSP2V2_RATE_MASK, + if (dsp->running) { + ret = dsp->rate_put_cb(dsp, ADSP2V2_RATE_MASK, val << ADSP2V2_RATE_SHIFT); } } - mutex_unlock(&adsp->rate_lock); + mutex_unlock(&dsp->rate_lock); return ret; } @@ -650,20 +650,23 @@ static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp, return NULL; } -static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *region, +static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *mem, unsigned int offset) { - switch (region->type) { + if (WARN_ON(!mem)) + return offset; + + switch (mem->type) { case WMFW_ADSP1_PM: - return region->base + (offset * 3); + return mem->base + (offset * 3); case WMFW_ADSP1_DM: - return region->base + (offset * 2); + return mem->base + (offset * 2); case WMFW_ADSP2_XM: - return region->base + (offset * 2); + return mem->base + (offset * 2); case WMFW_ADSP2_YM: - return region->base + (offset * 2); + return mem->base + (offset * 2); case WMFW_ADSP1_ZM: - return region->base + (offset * 2); + return mem->base + (offset * 2); default: WARN_ON(NULL != "Unknown memory region type"); return offset; @@ -684,36 +687,36 @@ static int wm_coeff_write_control(struct snd_kcontrol *kcontrol, const void *buf, size_t len) { struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; - struct wm_adsp_alg_region *region = &ctl->region; + struct wm_adsp_alg_region *alg_region = &ctl->alg_region; const struct wm_adsp_region *mem; - struct wm_adsp *adsp = ctl->adsp; + struct wm_adsp *dsp = ctl->dsp; void *scratch; int ret; unsigned int reg; - mem = wm_adsp_find_region(adsp, region->type); + mem = wm_adsp_find_region(dsp, alg_region->type); if (!mem) { - adsp_err(adsp, "No base for region %x\n", - region->type); + adsp_err(dsp, "No base for region %x\n", + alg_region->type); return -EINVAL; } - reg = ctl->region.base; + reg = ctl->alg_region.base; reg = wm_adsp_region_to_reg(mem, reg); scratch = kmemdup(buf, ctl->len, GFP_KERNEL | GFP_DMA); if (!scratch) return -ENOMEM; - ret = regmap_raw_write(adsp->regmap, reg, scratch, + ret = regmap_raw_write(dsp->regmap, reg, scratch, ctl->len); if (ret) { - adsp_err(adsp, "Failed to write %zu bytes to %x: %d\n", + adsp_err(dsp, "Failed to write %zu bytes to %x: %d\n", ctl->len, reg, ret); kfree(scratch); return ret; } - adsp_dbg(adsp, "Wrote %zu bytes to %x\n", ctl->len, reg); + adsp_dbg(dsp, "Wrote %zu bytes to %x\n", ctl->len, reg); kfree(scratch); @@ -745,35 +748,35 @@ static int wm_coeff_read_control(struct snd_kcontrol *kcontrol, void *buf, size_t len) { struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; - struct wm_adsp_alg_region *region = &ctl->region; + struct wm_adsp_alg_region *alg_region = &ctl->alg_region; const struct wm_adsp_region *mem; - struct wm_adsp *adsp = ctl->adsp; + struct wm_adsp *dsp = ctl->dsp; void *scratch; int ret; unsigned int reg; - mem = wm_adsp_find_region(adsp, region->type); + mem = wm_adsp_find_region(dsp, alg_region->type); if (!mem) { - adsp_err(adsp, "No base for region %x\n", - region->type); + adsp_err(dsp, "No base for region %x\n", + alg_region->type); return -EINVAL; } - reg = ctl->region.base; + reg = ctl->alg_region.base; reg = wm_adsp_region_to_reg(mem, reg); scratch = kmalloc(ctl->len, GFP_KERNEL | GFP_DMA); if (!scratch) return -ENOMEM; - ret = regmap_raw_read(adsp->regmap, reg, scratch, ctl->len); + ret = regmap_raw_read(dsp->regmap, reg, scratch, ctl->len); if (ret) { - adsp_err(adsp, "Failed to read %zu bytes from %x: %d\n", + adsp_err(dsp, "Failed to read %zu bytes from %x: %d\n", ctl->len, reg, ret); kfree(scratch); return ret; } - adsp_dbg(adsp, "Read %zu bytes from %x\n", ctl->len, reg); + adsp_dbg(dsp, "Read %zu bytes from %x\n", ctl->len, reg); memcpy(buf, scratch, ctl->len); kfree(scratch); @@ -785,12 +788,12 @@ static int wm_coeff_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; - struct wm_adsp *adsp = ctl->adsp; + struct wm_adsp *dsp = ctl->dsp; char *p = ucontrol->value.bytes.data; mutex_lock(&ctl->lock); - if (adsp->running) + if (dsp->running) wm_coeff_read_control(kcontrol, ctl->cache, ctl->len); memcpy(p, ctl->cache, ctl->len); @@ -799,12 +802,12 @@ static int wm_coeff_get(struct snd_kcontrol *kcontrol, } struct wmfw_ctl_work { - struct wm_adsp *adsp; + struct wm_adsp *dsp; struct wm_coeff_ctl *ctl; struct work_struct work; }; -static int wmfw_add_ctl(struct wm_adsp *adsp, struct wm_coeff_ctl *ctl) +static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl) { struct snd_kcontrol_new *kcontrol; int ret; @@ -823,19 +826,20 @@ static int wmfw_add_ctl(struct wm_adsp *adsp, struct wm_coeff_ctl *ctl) kcontrol->put = wm_coeff_put; kcontrol->private_value = (unsigned long)ctl; - ret = snd_soc_add_card_controls(adsp->card, + ret = snd_soc_add_card_controls(dsp->card, kcontrol, 1); if (ret < 0) goto err_kcontrol; kfree(kcontrol); - ctl->kcontrol = snd_soc_card_get_kcontrol(adsp->card, + ctl->kcontrol = snd_soc_card_get_kcontrol(dsp->card, ctl->name); - mutex_lock(&adsp->ctl_lock); - list_add(&ctl->list, &adsp->ctl_list); - mutex_unlock(&adsp->ctl_lock); + mutex_lock(&dsp->ctl_lock); + list_add(&ctl->list, &dsp->ctl_list); + mutex_unlock(&dsp->ctl_lock); + return 0; err_kcontrol: @@ -1084,12 +1088,12 @@ static int wm_adsp_load(struct wm_adsp *dsp) return ret; } -static int wm_coeff_init_control_caches(struct wm_adsp *adsp) +static int wm_coeff_init_control_caches(struct wm_adsp *dsp) { struct wm_coeff_ctl *ctl; int ret; - list_for_each_entry(ctl, &adsp->ctl_list, list) { + list_for_each_entry(ctl, &dsp->ctl_list, list) { if (!ctl->enabled || ctl->set) continue; mutex_lock(&ctl->lock); @@ -1104,12 +1108,12 @@ static int wm_coeff_init_control_caches(struct wm_adsp *adsp) return 0; } -static int wm_coeff_sync_controls(struct wm_adsp *adsp) +static int wm_coeff_sync_controls(struct wm_adsp *dsp) { struct wm_coeff_ctl *ctl; int ret; - list_for_each_entry(ctl, &adsp->ctl_list, list) { + list_for_each_entry(ctl, &dsp->ctl_list, list) { if (!ctl->enabled) continue; if (ctl->set) { @@ -1132,13 +1136,12 @@ static void wm_adsp_ctl_work(struct work_struct *work) struct wmfw_ctl_work, work); - wmfw_add_ctl(ctl_work->adsp, ctl_work->ctl); + wmfw_add_ctl(ctl_work->dsp, ctl_work->ctl); kfree(ctl_work); } static int wm_adsp_create_control(struct wm_adsp *dsp, - const struct wm_adsp_alg_region *region) - + const struct wm_adsp_alg_region *alg_region) { struct wm_coeff_ctl *ctl; struct wmfw_ctl_work *ctl_work; @@ -1150,7 +1153,7 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, if (!name) return -ENOMEM; - switch (region->type) { + switch (alg_region->type) { case WMFW_ADSP1_PM: region_name = "PM"; break; @@ -1172,7 +1175,7 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, } snprintf(name, PAGE_SIZE, "DSP%d %s %x", - dsp->num, region_name, region->alg); + dsp->num, region_name, alg_region->alg); list_for_each_entry(ctl, &dsp->ctl_list, list) { @@ -1190,7 +1193,7 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, ret = -ENOMEM; goto err_name; } - ctl->region = *region; + ctl->alg_region = *alg_region; ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL); if (!ctl->name) { ret = -ENOMEM; @@ -1200,9 +1203,9 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, ctl->set = 0; ctl->ops.xget = wm_coeff_get; ctl->ops.xput = wm_coeff_put; - ctl->adsp = dsp; + ctl->dsp = dsp; - ctl->len = region->len; + ctl->len = alg_region->len; ctl->cache = kzalloc(ctl->len, GFP_KERNEL); if (!ctl->cache) { ret = -ENOMEM; @@ -1216,7 +1219,7 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, goto err_ctl_cache; } - ctl_work->adsp = dsp; + ctl_work->dsp = dsp; ctl_work->ctl = ctl; INIT_WORK(&ctl_work->work, wm_adsp_ctl_work); schedule_work(&ctl_work->work); @@ -1236,20 +1239,20 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, return ret; } -static void *wm_adsp_read_algs(struct wm_adsp *dsp, size_t algs, +static void *wm_adsp_read_algs(struct wm_adsp *dsp, size_t n_algs, unsigned int pos, unsigned int len) { void *alg; int ret; __be32 val; - if (algs == 0) { + if (n_algs == 0) { adsp_err(dsp, "No algorithms\n"); return ERR_PTR(-EINVAL); } - if (algs > 1024) { - adsp_err(dsp, "Algorithm count %zx excessive\n", algs); + if (n_algs > 1024) { + adsp_err(dsp, "Algorithm count %zx excessive\n", n_algs); return ERR_PTR(-EINVAL); } @@ -1284,10 +1287,10 @@ static int wm_adsp1_setup_algs(struct wm_adsp *dsp) { struct wmfw_adsp1_id_hdr adsp1_id; struct wmfw_adsp1_alg_hdr *adsp1_alg; - struct wm_adsp_alg_region *region; + struct wm_adsp_alg_region *alg_region; const struct wm_adsp_region *mem; unsigned int pos, len; - size_t algs; + size_t n_algs; int i, ret; mem = wm_adsp_find_region(dsp, WMFW_ADSP1_DM); @@ -1302,39 +1305,39 @@ static int wm_adsp1_setup_algs(struct wm_adsp *dsp) return ret; } - algs = be32_to_cpu(adsp1_id.algs); + n_algs = be32_to_cpu(adsp1_id.n_algs); dsp->fw_id = be32_to_cpu(adsp1_id.fw.id); adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n", dsp->fw_id, (be32_to_cpu(adsp1_id.fw.ver) & 0xff0000) >> 16, (be32_to_cpu(adsp1_id.fw.ver) & 0xff00) >> 8, be32_to_cpu(adsp1_id.fw.ver) & 0xff, - algs); + n_algs); - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) + alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); + if (!alg_region) return -ENOMEM; - region->type = WMFW_ADSP1_ZM; - region->alg = be32_to_cpu(adsp1_id.fw.id); - region->base = be32_to_cpu(adsp1_id.zm); - list_add_tail(®ion->list, &dsp->alg_regions); + alg_region->type = WMFW_ADSP1_ZM; + alg_region->alg = be32_to_cpu(adsp1_id.fw.id); + alg_region->base = be32_to_cpu(adsp1_id.zm); + list_add_tail(&alg_region->list, &dsp->alg_regions); - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) + alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); + if (!alg_region) return -ENOMEM; - region->type = WMFW_ADSP1_DM; - region->alg = be32_to_cpu(adsp1_id.fw.id); - region->base = be32_to_cpu(adsp1_id.dm); - list_add_tail(®ion->list, &dsp->alg_regions); + alg_region->type = WMFW_ADSP1_DM; + alg_region->alg = be32_to_cpu(adsp1_id.fw.id); + alg_region->base = be32_to_cpu(adsp1_id.dm); + list_add_tail(&alg_region->list, &dsp->alg_regions); pos = sizeof(adsp1_id) / 2; - len = (sizeof(*adsp1_alg) * algs) / 2; + len = (sizeof(*adsp1_alg) * n_algs) / 2; - adsp1_alg = wm_adsp_read_algs(dsp, algs, mem->base + pos, len); + adsp1_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len); if (IS_ERR(adsp1_alg)) return PTR_ERR(adsp1_alg); - for (i = 0; i < algs; i++) { + for (i = 0; i < n_algs; i++) { adsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n", i, be32_to_cpu(adsp1_alg[i].alg.id), (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff0000) >> 16, @@ -1343,41 +1346,41 @@ static int wm_adsp1_setup_algs(struct wm_adsp *dsp) be32_to_cpu(adsp1_alg[i].dm), be32_to_cpu(adsp1_alg[i].zm)); - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) { + alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); + if (!alg_region) { ret = -ENOMEM; goto out; } - region->type = WMFW_ADSP1_DM; - region->alg = be32_to_cpu(adsp1_alg[i].alg.id); - region->base = be32_to_cpu(adsp1_alg[i].dm); - region->len = 0; - list_add_tail(®ion->list, &dsp->alg_regions); - if (i + 1 < algs) { - region->len = be32_to_cpu(adsp1_alg[i + 1].dm); - region->len -= be32_to_cpu(adsp1_alg[i].dm); - region->len *= 4; - wm_adsp_create_control(dsp, region); + alg_region->type = WMFW_ADSP1_DM; + alg_region->alg = be32_to_cpu(adsp1_alg[i].alg.id); + alg_region->base = be32_to_cpu(adsp1_alg[i].dm); + alg_region->len = 0; + list_add_tail(&alg_region->list, &dsp->alg_regions); + if (i + 1 < n_algs) { + alg_region->len = be32_to_cpu(adsp1_alg[i + 1].dm); + alg_region->len -= be32_to_cpu(adsp1_alg[i].dm); + alg_region->len *= 4; + wm_adsp_create_control(dsp, alg_region); } else { adsp_warn(dsp, "Missing length info for region DM with ID %x\n", be32_to_cpu(adsp1_alg[i].alg.id)); } - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) { + alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); + if (!alg_region) { ret = -ENOMEM; goto out; } - region->type = WMFW_ADSP1_ZM; - region->alg = be32_to_cpu(adsp1_alg[i].alg.id); - region->base = be32_to_cpu(adsp1_alg[i].zm); - region->len = 0; - list_add_tail(®ion->list, &dsp->alg_regions); - if (i + 1 < algs) { - region->len = be32_to_cpu(adsp1_alg[i + 1].zm); - region->len -= be32_to_cpu(adsp1_alg[i].zm); - region->len *= 4; - wm_adsp_create_control(dsp, region); + alg_region->type = WMFW_ADSP1_ZM; + alg_region->alg = be32_to_cpu(adsp1_alg[i].alg.id); + alg_region->base = be32_to_cpu(adsp1_alg[i].zm); + alg_region->len = 0; + list_add_tail(&alg_region->list, &dsp->alg_regions); + if (i + 1 < n_algs) { + alg_region->len = be32_to_cpu(adsp1_alg[i + 1].zm); + alg_region->len -= be32_to_cpu(adsp1_alg[i].zm); + alg_region->len *= 4; + wm_adsp_create_control(dsp, alg_region); } else { adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", be32_to_cpu(adsp1_alg[i].alg.id)); @@ -1393,10 +1396,10 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) { struct wmfw_adsp2_id_hdr adsp2_id; struct wmfw_adsp2_alg_hdr *adsp2_alg; - struct wm_adsp_alg_region *region; + struct wm_adsp_alg_region *alg_region; const struct wm_adsp_region *mem; unsigned int pos, len; - size_t algs; + size_t n_algs; int i, ret; mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM); @@ -1411,47 +1414,47 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) return ret; } - algs = be32_to_cpu(adsp2_id.algs); + n_algs = be32_to_cpu(adsp2_id.n_algs); dsp->fw_id = be32_to_cpu(adsp2_id.fw.id); adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n", dsp->fw_id, (be32_to_cpu(adsp2_id.fw.ver) & 0xff0000) >> 16, (be32_to_cpu(adsp2_id.fw.ver) & 0xff00) >> 8, be32_to_cpu(adsp2_id.fw.ver) & 0xff, - algs); + n_algs); - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) + alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); + if (!alg_region) return -ENOMEM; - region->type = WMFW_ADSP2_XM; - region->alg = be32_to_cpu(adsp2_id.fw.id); - region->base = be32_to_cpu(adsp2_id.xm); - list_add_tail(®ion->list, &dsp->alg_regions); + alg_region->type = WMFW_ADSP2_XM; + alg_region->alg = be32_to_cpu(adsp2_id.fw.id); + alg_region->base = be32_to_cpu(adsp2_id.xm); + list_add_tail(&alg_region->list, &dsp->alg_regions); - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) + alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); + if (!alg_region) return -ENOMEM; - region->type = WMFW_ADSP2_YM; - region->alg = be32_to_cpu(adsp2_id.fw.id); - region->base = be32_to_cpu(adsp2_id.ym); - list_add_tail(®ion->list, &dsp->alg_regions); + alg_region->type = WMFW_ADSP2_YM; + alg_region->alg = be32_to_cpu(adsp2_id.fw.id); + alg_region->base = be32_to_cpu(adsp2_id.ym); + list_add_tail(&alg_region->list, &dsp->alg_regions); - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) + alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); + if (!alg_region) return -ENOMEM; - region->type = WMFW_ADSP2_ZM; - region->alg = be32_to_cpu(adsp2_id.fw.id); - region->base = be32_to_cpu(adsp2_id.zm); - list_add_tail(®ion->list, &dsp->alg_regions); + alg_region->type = WMFW_ADSP2_ZM; + alg_region->alg = be32_to_cpu(adsp2_id.fw.id); + alg_region->base = be32_to_cpu(adsp2_id.zm); + list_add_tail(&alg_region->list, &dsp->alg_regions); pos = sizeof(adsp2_id) / 2; - len = (sizeof(*adsp2_alg) * algs) / 2; + len = (sizeof(*adsp2_alg) * n_algs) / 2; - adsp2_alg = wm_adsp_read_algs(dsp, algs, mem->base + pos, len); + adsp2_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len); if (IS_ERR(adsp2_alg)) return PTR_ERR(adsp2_alg); - for (i = 0; i < algs; i++) { + for (i = 0; i < n_algs; i++) { adsp_info(dsp, "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n", i, be32_to_cpu(adsp2_alg[i].alg.id), @@ -1462,61 +1465,61 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) be32_to_cpu(adsp2_alg[i].ym), be32_to_cpu(adsp2_alg[i].zm)); - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) { + alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); + if (!alg_region) { ret = -ENOMEM; goto out; } - region->type = WMFW_ADSP2_XM; - region->alg = be32_to_cpu(adsp2_alg[i].alg.id); - region->base = be32_to_cpu(adsp2_alg[i].xm); - region->len = 0; - list_add_tail(®ion->list, &dsp->alg_regions); - if (i + 1 < algs) { - region->len = be32_to_cpu(adsp2_alg[i + 1].xm); - region->len -= be32_to_cpu(adsp2_alg[i].xm); - region->len *= 4; - wm_adsp_create_control(dsp, region); + alg_region->type = WMFW_ADSP2_XM; + alg_region->alg = be32_to_cpu(adsp2_alg[i].alg.id); + alg_region->base = be32_to_cpu(adsp2_alg[i].xm); + alg_region->len = 0; + list_add_tail(&alg_region->list, &dsp->alg_regions); + if (i + 1 < n_algs) { + alg_region->len = be32_to_cpu(adsp2_alg[i + 1].xm); + alg_region->len -= be32_to_cpu(adsp2_alg[i].xm); + alg_region->len *= 4; + wm_adsp_create_control(dsp, alg_region); } else { adsp_warn(dsp, "Missing length info for region XM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); } - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) { + alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); + if (!alg_region) { ret = -ENOMEM; goto out; } - region->type = WMFW_ADSP2_YM; - region->alg = be32_to_cpu(adsp2_alg[i].alg.id); - region->base = be32_to_cpu(adsp2_alg[i].ym); - region->len = 0; - list_add_tail(®ion->list, &dsp->alg_regions); - if (i + 1 < algs) { - region->len = be32_to_cpu(adsp2_alg[i + 1].ym); - region->len -= be32_to_cpu(adsp2_alg[i].ym); - region->len *= 4; - wm_adsp_create_control(dsp, region); + alg_region->type = WMFW_ADSP2_YM; + alg_region->alg = be32_to_cpu(adsp2_alg[i].alg.id); + alg_region->base = be32_to_cpu(adsp2_alg[i].ym); + alg_region->len = 0; + list_add_tail(&alg_region->list, &dsp->alg_regions); + if (i + 1 < n_algs) { + alg_region->len = be32_to_cpu(adsp2_alg[i + 1].ym); + alg_region->len -= be32_to_cpu(adsp2_alg[i].ym); + alg_region->len *= 4; + wm_adsp_create_control(dsp, alg_region); } else { adsp_warn(dsp, "Missing length info for region YM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); } - region = kzalloc(sizeof(*region), GFP_KERNEL); - if (!region) { + alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); + if (!alg_region) { ret = -ENOMEM; goto out; } - region->type = WMFW_ADSP2_ZM; - region->alg = be32_to_cpu(adsp2_alg[i].alg.id); - region->base = be32_to_cpu(adsp2_alg[i].zm); - region->len = 0; - list_add_tail(®ion->list, &dsp->alg_regions); - if (i + 1 < algs) { - region->len = be32_to_cpu(adsp2_alg[i + 1].zm); - region->len -= be32_to_cpu(adsp2_alg[i].zm); - region->len *= 4; - wm_adsp_create_control(dsp, region); + alg_region->type = WMFW_ADSP2_ZM; + alg_region->alg = be32_to_cpu(adsp2_alg[i].alg.id); + alg_region->base = be32_to_cpu(adsp2_alg[i].zm); + alg_region->len = 0; + list_add_tail(&alg_region->list, &dsp->alg_regions); + if (i + 1 < n_algs) { + alg_region->len = be32_to_cpu(adsp2_alg[i + 1].zm); + alg_region->len -= be32_to_cpu(adsp2_alg[i].zm); + alg_region->len *= 4; + wm_adsp_create_control(dsp, alg_region); } else { adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); @@ -1731,9 +1734,9 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) return ret; } -int wm_adsp1_init(struct wm_adsp *adsp) +int wm_adsp1_init(struct wm_adsp *dsp) { - INIT_LIST_HEAD(&adsp->alg_regions); + INIT_LIST_HEAD(&dsp->alg_regions); return 0; } @@ -2142,7 +2145,7 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, EXPORT_SYMBOL_GPL(wm_adsp2_event); #ifdef CONFIG_OF -static int wm_adsp_of_parse_caps(struct wm_adsp *adsp, +static int wm_adsp_of_parse_caps(struct wm_adsp *dsp, struct device_node *np, struct wm_adsp_fw_defs *fw) { @@ -2160,7 +2163,7 @@ static int wm_adsp_of_parse_caps(struct wm_adsp *adsp, return -EOVERFLOW; fw->num_caps = 1; - fw->caps = devm_kzalloc(adsp->dev, + fw->caps = devm_kzalloc(dsp->dev, sizeof(struct wm_adsp_fw_caps), GFP_KERNEL); if (!fw->caps) @@ -2168,7 +2171,7 @@ static int wm_adsp_of_parse_caps(struct wm_adsp *adsp, fw->caps->num_host_regions = ARRAY_SIZE(ez2control_regions); fw->caps->host_region_defs = - devm_kzalloc(adsp->dev, + devm_kzalloc(dsp->dev, sizeof(ez2control_regions), GFP_KERNEL); if (!fw->caps->host_region_defs) @@ -2196,7 +2199,7 @@ static int wm_adsp_of_parse_caps(struct wm_adsp *adsp, return 0; } -static int wm_adsp_of_parse_firmware(struct wm_adsp *adsp, +static int wm_adsp_of_parse_firmware(struct wm_adsp *dsp, struct device_node *np) { struct device_node *fws = of_get_child_by_name(np, "firmware"); @@ -2215,15 +2218,15 @@ static int wm_adsp_of_parse_firmware(struct wm_adsp *adsp, if (i == 0) return 0; - adsp->num_firmwares = i; + dsp->num_firmwares = i; - adsp->firmwares = devm_kzalloc(adsp->dev, + dsp->firmwares = devm_kzalloc(dsp->dev, i * sizeof(struct wm_adsp_fw_defs), GFP_KERNEL); - if (!adsp->firmwares) + if (!dsp->firmwares) return -ENOMEM; - ctl_names = devm_kzalloc(adsp->dev, + ctl_names = devm_kzalloc(dsp->dev, i * sizeof(const char *), GFP_KERNEL); if (!ctl_names) @@ -2234,33 +2237,33 @@ static int wm_adsp_of_parse_firmware(struct wm_adsp *adsp, ctl_names[i] = fw->name; ret = of_property_read_string(fw, "wlf,wmfw-file", - &adsp->firmwares[i].file); + &dsp->firmwares[i].file); if (ret < 0) { - adsp_err(adsp, + adsp_err(dsp, "Firmware filename missing/malformed: %d\n", ret); return ret; } ret = of_property_read_string(fw, "wlf,bin-file", - &adsp->firmwares[i].binfile); + &dsp->firmwares[i].binfile); if (ret < 0) - adsp->firmwares[i].binfile = NULL; + dsp->firmwares[i].binfile = NULL; - wm_adsp_of_parse_caps(adsp, fw, &adsp->firmwares[i]); + wm_adsp_of_parse_caps(dsp, fw, &dsp->firmwares[i]); i++; } - wm_adsp_fw_enum[adsp->num - 1].max = adsp->num_firmwares; - wm_adsp_fw_enum[adsp->num - 1].texts = ctl_names; + wm_adsp_fw_enum[dsp->num - 1].max = dsp->num_firmwares; + wm_adsp_fw_enum[dsp->num - 1].texts = ctl_names; - return adsp->num_firmwares; + return dsp->num_firmwares; } -static int wm_adsp_of_parse_adsp(struct wm_adsp *adsp) +static int wm_adsp_of_parse_adsp(struct wm_adsp *dsp) { - struct device_node *np = of_get_child_by_name(adsp->dev->of_node, + struct device_node *np = of_get_child_by_name(dsp->dev->of_node, "adsps"); struct device_node *core = NULL; unsigned int addr; @@ -2272,29 +2275,29 @@ static int wm_adsp_of_parse_adsp(struct wm_adsp *adsp) while ((core = of_get_next_child(np, core)) != NULL) { ret = of_property_read_u32(core, "reg", &addr); if (ret < 0) { - adsp_err(adsp, + adsp_err(dsp, "Failed to get ADSP base address: %d\n", ret); return ret; } - if (addr == adsp->base) + if (addr == dsp->base) break; } if (!core) return 0; - return wm_adsp_of_parse_firmware(adsp, core); + return wm_adsp_of_parse_firmware(dsp, core); } #else -static inline int wm_adsp_of_parse_adsp(struct wm_adsp *adsp) +static inline int wm_adsp_of_parse_adsp(struct wm_adsp *dsp) { return 0; } #endif -int wm_adsp2_init(struct wm_adsp *adsp, struct mutex *fw_lock) +int wm_adsp2_init(struct wm_adsp *dsp, struct mutex *fw_lock) { int ret, i; const char **ctl_names; @@ -2303,48 +2306,48 @@ int wm_adsp2_init(struct wm_adsp *adsp, struct mutex *fw_lock) * Disable the DSP memory by default when in reset for a small * power saving. */ - ret = regmap_update_bits(adsp->regmap, adsp->base + ADSP2_CONTROL, + ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, ADSP2_MEM_ENA, 0); if (ret != 0) { - adsp_err(adsp, "Failed to clear memory retention: %d\n", ret); + adsp_err(dsp, "Failed to clear memory retention: %d\n", ret); return ret; } - INIT_LIST_HEAD(&adsp->alg_regions); - INIT_LIST_HEAD(&adsp->ctl_list); - INIT_WORK(&adsp->boot_work, wm_adsp2_boot_work); - mutex_init(&adsp->ctl_lock); - mutex_init(&adsp->rate_lock); + INIT_LIST_HEAD(&dsp->alg_regions); + INIT_LIST_HEAD(&dsp->ctl_list); + INIT_WORK(&dsp->boot_work, wm_adsp2_boot_work); + mutex_init(&dsp->ctl_lock); + mutex_init(&dsp->rate_lock); - adsp->fw_lock = fw_lock; + dsp->fw_lock = fw_lock; - if (!adsp->num_firmwares) { - if (!adsp->dev->of_node || wm_adsp_of_parse_adsp(adsp) <= 0) { - adsp->num_firmwares = WM_ADSP_NUM_FW; - adsp->firmwares = wm_adsp_fw; + if (!dsp->num_firmwares) { + if (!dsp->dev->of_node || wm_adsp_of_parse_adsp(dsp) <= 0) { + dsp->num_firmwares = WM_ADSP_NUM_FW; + dsp->firmwares = wm_adsp_fw; } } else { - ctl_names = devm_kzalloc(adsp->dev, - adsp->num_firmwares * sizeof(const char *), + ctl_names = devm_kzalloc(dsp->dev, + dsp->num_firmwares * sizeof(const char *), GFP_KERNEL); - for (i = 0; i < adsp->num_firmwares; i++) - ctl_names[i] = adsp->firmwares[i].name; + for (i = 0; i < dsp->num_firmwares; i++) + ctl_names[i] = dsp->firmwares[i].name; - wm_adsp_fw_enum[adsp->num - 1].max = adsp->num_firmwares; - wm_adsp_fw_enum[adsp->num - 1].texts = ctl_names; + wm_adsp_fw_enum[dsp->num - 1].max = dsp->num_firmwares; + wm_adsp_fw_enum[dsp->num - 1].texts = ctl_names; } return 0; } EXPORT_SYMBOL_GPL(wm_adsp2_init); -bool wm_adsp_compress_supported(const struct wm_adsp *adsp, +bool wm_adsp_compress_supported(const struct wm_adsp *dsp, const struct snd_compr_stream *stream) { - if (adsp->fw >= 0 && adsp->fw < adsp->num_firmwares) { + if (dsp->fw >= 0 && dsp->fw < dsp->num_firmwares) { const struct wm_adsp_fw_defs *fw_defs = - &adsp->firmwares[adsp->fw]; + &dsp->firmwares[dsp->fw]; if (fw_defs->num_caps == 0) return false; @@ -2357,15 +2360,15 @@ bool wm_adsp_compress_supported(const struct wm_adsp *adsp, } EXPORT_SYMBOL_GPL(wm_adsp_compress_supported); -bool wm_adsp_format_supported(const struct wm_adsp *adsp, +bool wm_adsp_format_supported(const struct wm_adsp *dsp, const struct snd_compr_stream *stream, const struct snd_compr_params *params) { const struct wm_adsp_fw_caps *caps; int i, j; - for (i = 0; i < adsp->firmwares[adsp->fw].num_caps; i++) { - caps = &adsp->firmwares[adsp->fw].caps[i]; + for (i = 0; i < dsp->firmwares[dsp->fw].num_caps; i++) { + caps = &dsp->firmwares[dsp->fw].caps[i]; if (caps->id != params->codec.id) continue; @@ -2391,38 +2394,38 @@ bool wm_adsp_format_supported(const struct wm_adsp *adsp, } EXPORT_SYMBOL_GPL(wm_adsp_format_supported); -void wm_adsp_get_caps(const struct wm_adsp *adsp, +void wm_adsp_get_caps(const struct wm_adsp *dsp, const struct snd_compr_stream *stream, struct snd_compr_caps *caps) { int i; - if (adsp->firmwares[adsp->fw].caps) { - for (i = 0; i < adsp->firmwares[adsp->fw].num_caps; i++) - caps->codecs[i] = adsp->firmwares[adsp->fw].caps[i].id; + if (dsp->firmwares[dsp->fw].caps) { + for (i = 0; i < dsp->firmwares[dsp->fw].num_caps; i++) + caps->codecs[i] = dsp->firmwares[dsp->fw].caps[i].id; caps->num_codecs = i; - caps->direction = adsp->firmwares[adsp->fw].compr_direction; + caps->direction = dsp->firmwares[dsp->fw].compr_direction; } } EXPORT_SYMBOL_GPL(wm_adsp_get_caps); -static int wm_adsp_read_data_block(struct wm_adsp *adsp, int mem_type, +static int wm_adsp_read_data_block(struct wm_adsp *dsp, int mem_type, unsigned int mem_addr, unsigned int num_words, u32 *data) { - struct wm_adsp_region const *region = wm_adsp_find_region(adsp, - mem_type); + struct wm_adsp_region const *mem = wm_adsp_find_region(dsp, + mem_type); unsigned int i, reg; int ret; - if (!region) + if (!mem) return -EINVAL; - reg = wm_adsp_region_to_reg(region, mem_addr); + reg = wm_adsp_region_to_reg(mem, mem_addr); - ret = regmap_raw_read(adsp->regmap, reg, data, + ret = regmap_raw_read(dsp->regmap, reg, data, sizeof(*data) * num_words); if (ret < 0) return ret; @@ -2433,65 +2436,65 @@ static int wm_adsp_read_data_block(struct wm_adsp *adsp, int mem_type, return 0; } -static int wm_adsp_read_data_word(struct wm_adsp *adsp, int mem_type, +static int wm_adsp_read_data_word(struct wm_adsp *dsp, int mem_type, unsigned int mem_addr, u32 *data) { - return wm_adsp_read_data_block(adsp, mem_type, mem_addr, 1, data); + return wm_adsp_read_data_block(dsp, mem_type, mem_addr, 1, data); } -static int wm_adsp_write_data_word(struct wm_adsp *adsp, int mem_type, +static int wm_adsp_write_data_word(struct wm_adsp *dsp, int mem_type, unsigned int mem_addr, u32 data) { - struct wm_adsp_region const *region = wm_adsp_find_region(adsp, - mem_type); + struct wm_adsp_region const *mem = wm_adsp_find_region(dsp, + mem_type); unsigned int reg; - if (!region) + if (!mem) return -EINVAL; - reg = wm_adsp_region_to_reg(region, mem_addr); + reg = wm_adsp_region_to_reg(mem, mem_addr); data = cpu_to_be32(data & 0x00ffffffu); - return regmap_raw_write(adsp->regmap, reg, &data, sizeof(data)); + return regmap_raw_write(dsp->regmap, reg, &data, sizeof(data)); } -static inline int wm_adsp_host_buffer_read(struct wm_adsp *adsp, +static inline int wm_adsp_host_buffer_read(struct wm_adsp *dsp, unsigned int field_offset, u32 *data) { - return wm_adsp_read_data_word(adsp, WMFW_ADSP2_XM, - adsp->host_buf_ptr + field_offset, data); + return wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, + dsp->host_buf_ptr + field_offset, data); } -static inline int wm_adsp_host_buffer_write(struct wm_adsp *adsp, +static inline int wm_adsp_host_buffer_write(struct wm_adsp *dsp, unsigned int field_offset, u32 data) { - return wm_adsp_write_data_word(adsp, WMFW_ADSP2_XM, - adsp->host_buf_ptr + field_offset, + return wm_adsp_write_data_word(dsp, WMFW_ADSP2_XM, + dsp->host_buf_ptr + field_offset, data); } -static int wm_adsp_populate_buffer_regions(struct wm_adsp *adsp) +static int wm_adsp_populate_buffer_regions(struct wm_adsp *dsp) { int i, ret; u32 offset = 0; struct wm_adsp_buffer_region_def *host_region_defs = - adsp->firmwares[adsp->fw].caps->host_region_defs; + dsp->firmwares[dsp->fw].caps->host_region_defs; struct wm_adsp_buffer_region *region; - for (i = 0; i < adsp->firmwares[adsp->fw].caps->num_host_regions; ++i) { - region = &adsp->host_regions[i]; + for (i = 0; i < dsp->firmwares[dsp->fw].caps->num_host_regions; ++i) { + region = &dsp->host_regions[i]; region->offset = offset; region->mem_type = host_region_defs[i].mem_type; - ret = wm_adsp_host_buffer_read(adsp, + ret = wm_adsp_host_buffer_read(dsp, host_region_defs[i].base_offset, ®ion->base_addr); if (ret < 0) return ret; - ret = wm_adsp_host_buffer_read(adsp, + ret = wm_adsp_host_buffer_read(dsp, host_region_defs[i].size_offset, &offset); if (ret < 0) @@ -2499,7 +2502,7 @@ static int wm_adsp_populate_buffer_regions(struct wm_adsp *adsp) region->cumulative_size = offset; - adsp_dbg(adsp, + adsp_dbg(dsp, "Region %d type %d base %04x off %04x size %04x\n", i, region->mem_type, region->base_addr, region->offset, region->cumulative_size); @@ -2508,34 +2511,34 @@ static int wm_adsp_populate_buffer_regions(struct wm_adsp *adsp) return 0; } -static int wm_adsp_read_buffer(struct wm_adsp *adsp, int32_t read_index, +static int wm_adsp_read_buffer(struct wm_adsp *dsp, int32_t read_index, int avail) { - int circ_space_words = CIRC_SPACE(adsp->capt_buf.head, - adsp->capt_buf.tail, - adsp->capt_buf_size) / + int circ_space_words = CIRC_SPACE(dsp->capt_buf.head, + dsp->capt_buf.tail, + dsp->capt_buf_size) / WM_ADSP_DATA_WORD_SIZE; - u8 *capt_buf = (u8 *)adsp->capt_buf.buf; - int capt_buf_h = adsp->capt_buf.head; - int capt_buf_mask = adsp->capt_buf_size - 1; + u8 *capt_buf = (u8 *)dsp->capt_buf.buf; + int capt_buf_h = dsp->capt_buf.head; + int capt_buf_mask = dsp->capt_buf_size - 1; int mem_type; unsigned int adsp_addr; int num_words; int i, ret; /* Calculate read parameters */ - for (i = 0; i < adsp->firmwares[adsp->fw].caps->num_host_regions; ++i) { - if (read_index < adsp->host_regions[i].cumulative_size) + for (i = 0; i < dsp->firmwares[dsp->fw].caps->num_host_regions; ++i) { + if (read_index < dsp->host_regions[i].cumulative_size) break; } - if (i == adsp->firmwares[adsp->fw].caps->num_host_regions) + if (i == dsp->firmwares[dsp->fw].caps->num_host_regions) return -EINVAL; - num_words = adsp->host_regions[i].cumulative_size - read_index; - mem_type = adsp->host_regions[i].mem_type; - adsp_addr = adsp->host_regions[i].base_addr + - (read_index - adsp->host_regions[i].offset); + num_words = dsp->host_regions[i].cumulative_size - read_index; + mem_type = dsp->host_regions[i].mem_type; + adsp_addr = dsp->host_regions[i].base_addr + + (read_index - dsp->host_regions[i].offset); if (circ_space_words < num_words) num_words = circ_space_words; @@ -2548,14 +2551,14 @@ static int wm_adsp_read_buffer(struct wm_adsp *adsp, int32_t read_index, return 0; /* Read data from DSP */ - ret = wm_adsp_read_data_block(adsp, mem_type, adsp_addr, - num_words, adsp->raw_capt_buf); + ret = wm_adsp_read_data_block(dsp, mem_type, adsp_addr, + num_words, dsp->raw_capt_buf); if (ret != 0) return ret; /* Copy to circular buffer */ for (i = 0; i < num_words; ++i) { - u32 x = adsp->raw_capt_buf[i]; + u32 x = dsp->raw_capt_buf[i]; capt_buf[capt_buf_h++] = (u8)((x >> 0) & 0xff); capt_buf_h &= capt_buf_mask; @@ -2565,27 +2568,27 @@ static int wm_adsp_read_buffer(struct wm_adsp *adsp, int32_t read_index, capt_buf_h &= capt_buf_mask; } - adsp->capt_buf.head = capt_buf_h; + dsp->capt_buf.head = capt_buf_h; return num_words; } -static int wm_adsp_capture_block(struct wm_adsp *adsp, int *avail) +static int wm_adsp_capture_block(struct wm_adsp *dsp, int *avail) { - int last_region = adsp->firmwares[adsp->fw].caps->num_host_regions -1; - int host_size = adsp->host_regions[last_region].cumulative_size; + int last_region = dsp->firmwares[dsp->fw].caps->num_host_regions - 1; + int host_size = dsp->host_regions[last_region].cumulative_size; int num_words; u32 next_read_index, next_write_index; int32_t write_index, read_index; int ret; /* Get current host buffer status */ - ret = wm_adsp_host_buffer_read(adsp, + ret = wm_adsp_host_buffer_read(dsp, HOST_BUFFER_FIELD(next_read_index), &next_read_index); if (ret < 0) return ret; - ret = wm_adsp_host_buffer_read(adsp, + ret = wm_adsp_host_buffer_read(dsp, HOST_BUFFER_FIELD(next_write_index), &next_write_index); if (ret < 0) @@ -2602,7 +2605,7 @@ static int wm_adsp_capture_block(struct wm_adsp *adsp, int *avail) *avail += host_size; /* Read data from DSP */ - num_words = wm_adsp_read_buffer(adsp, read_index, *avail); + num_words = wm_adsp_read_buffer(dsp, read_index, *avail); if (num_words <= 0) return num_words; @@ -2611,7 +2614,7 @@ static int wm_adsp_capture_block(struct wm_adsp *adsp, int *avail) if (next_read_index == host_size) next_read_index = 0; - ret = wm_adsp_host_buffer_write(adsp, + ret = wm_adsp_host_buffer_write(dsp, HOST_BUFFER_FIELD(next_read_index), next_read_index); if (ret < 0) @@ -2620,41 +2623,41 @@ static int wm_adsp_capture_block(struct wm_adsp *adsp, int *avail) return num_words; } -int wm_adsp_stream_alloc(struct wm_adsp *adsp, +int wm_adsp_stream_alloc(struct wm_adsp *dsp, const struct snd_compr_params *params) { int ret; unsigned int size; - adsp->dsp_error = 0; + dsp->dsp_error = 0; - if (!adsp->capt_buf.buf) { - adsp->capt_buf_size = WM_ADSP_CAPTURE_BUFFER_SIZE; - adsp->capt_buf.buf = vmalloc(adsp->capt_buf_size); + if (!dsp->capt_buf.buf) { + dsp->capt_buf_size = WM_ADSP_CAPTURE_BUFFER_SIZE; + dsp->capt_buf.buf = vmalloc(dsp->capt_buf_size); - if (!adsp->capt_buf.buf) + if (!dsp->capt_buf.buf) return -ENOMEM; } - adsp->capt_buf.head = 0; - adsp->capt_buf.tail = 0; + dsp->capt_buf.head = 0; + dsp->capt_buf.tail = 0; - if (!adsp->raw_capt_buf) { - size = WM_ADSP_MAX_READ_SIZE * sizeof(*adsp->raw_capt_buf); - adsp->raw_capt_buf = kzalloc(size, GFP_KERNEL); + if (!dsp->raw_capt_buf) { + size = WM_ADSP_MAX_READ_SIZE * sizeof(*dsp->raw_capt_buf); + dsp->raw_capt_buf = kzalloc(size, GFP_KERNEL); - if (!adsp->raw_capt_buf) { + if (!dsp->raw_capt_buf) { ret = -ENOMEM; goto err_capt_buf; } } - if (!adsp->host_regions) { - size = adsp->firmwares[adsp->fw].caps->num_host_regions * - sizeof(*adsp->host_regions); - adsp->host_regions = kzalloc(size, GFP_KERNEL); + if (!dsp->host_regions) { + size = dsp->firmwares[dsp->fw].caps->num_host_regions * + sizeof(*dsp->host_regions); + dsp->host_regions = kzalloc(size, GFP_KERNEL); - if (!adsp->host_regions) { + if (!dsp->host_regions) { ret = -ENOMEM; goto err_raw_capt_buf; } @@ -2662,53 +2665,53 @@ int wm_adsp_stream_alloc(struct wm_adsp *adsp, size = params->buffer.fragment_size; if (size == 0) { - adsp->capt_watermark = WM_ADSP_DEFAULT_WATERMARK; - adsp_warn(adsp, "No fragment size, assuming %u", - adsp->capt_watermark * WM_ADSP_DATA_WORD_SIZE); + dsp->capt_watermark = WM_ADSP_DEFAULT_WATERMARK; + adsp_warn(dsp, "No fragment size, assuming %u", + dsp->capt_watermark * WM_ADSP_DATA_WORD_SIZE); } else { - adsp->capt_watermark = + dsp->capt_watermark = DIV_ROUND_UP(size, WM_ADSP_DATA_WORD_SIZE); } return 0; err_raw_capt_buf: - kfree(adsp->raw_capt_buf); + kfree(dsp->raw_capt_buf); err_capt_buf: - vfree(adsp->capt_buf.buf); + vfree(dsp->capt_buf.buf); return ret; } EXPORT_SYMBOL_GPL(wm_adsp_stream_alloc); -int wm_adsp_stream_free(struct wm_adsp *adsp) +int wm_adsp_stream_free(struct wm_adsp *dsp) { - kfree(adsp->host_regions); - adsp->host_regions = NULL; + kfree(dsp->host_regions); + dsp->host_regions = NULL; - kfree(adsp->raw_capt_buf); - adsp->raw_capt_buf = NULL; + kfree(dsp->raw_capt_buf); + dsp->raw_capt_buf = NULL; - if (adsp->capt_buf.buf) { - vfree(adsp->capt_buf.buf); - adsp->capt_buf.buf = NULL; + if (dsp->capt_buf.buf) { + vfree(dsp->capt_buf.buf); + dsp->capt_buf.buf = NULL; } return 0; } EXPORT_SYMBOL_GPL(wm_adsp_stream_free); -int wm_adsp_stream_start(struct wm_adsp *adsp) +int wm_adsp_stream_start(struct wm_adsp *dsp) { u32 xm_base, magic; int i, ret; - ret = wm_adsp_read_data_word(adsp, WMFW_ADSP2_XM, + ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, ADSP2_SYSTEM_CONFIG_XM_PTR, &xm_base); if (ret < 0) return ret; - ret = wm_adsp_read_data_word(adsp, WMFW_ADSP2_XM, + ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, xm_base + WM_ADSP_ALG_XM_PTR + ALG_XM_FIELD(magic), &magic); @@ -2719,52 +2722,52 @@ int wm_adsp_stream_start(struct wm_adsp *adsp) return -EINVAL; for (i = 0; i < 5; ++i) { - ret = wm_adsp_read_data_word(adsp, WMFW_ADSP2_XM, + ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, xm_base + WM_ADSP_ALG_XM_PTR + ALG_XM_FIELD(host_buf_ptr), - &adsp->host_buf_ptr); + &dsp->host_buf_ptr); if (ret < 0) return ret; - if (adsp->host_buf_ptr) + if (dsp->host_buf_ptr) break; msleep(1); } - if (!adsp->host_buf_ptr) + if (!dsp->host_buf_ptr) return -EIO; - adsp->max_dsp_read_bytes = WM_ADSP_MAX_READ_SIZE * sizeof(u32); - ret = wm_adsp_populate_buffer_regions(adsp); + dsp->max_dsp_read_bytes = WM_ADSP_MAX_READ_SIZE * sizeof(u32); + ret = wm_adsp_populate_buffer_regions(dsp); if (ret < 0) return ret; - ret = wm_adsp_host_buffer_write(adsp, + ret = wm_adsp_host_buffer_write(dsp, HOST_BUFFER_FIELD(high_water_mark), - adsp->capt_watermark); + dsp->capt_watermark); if (ret < 0) return ret; - adsp_dbg(adsp, "Set watermark to %u\n", adsp->capt_watermark); + adsp_dbg(dsp, "Set watermark to %u\n", dsp->capt_watermark); return 0; } EXPORT_SYMBOL_GPL(wm_adsp_stream_start); -static int wm_adsp_stream_capture(struct wm_adsp *adsp) +static int wm_adsp_stream_capture(struct wm_adsp *dsp) { int avail = 0; int amount_read; int total_read = 0; int ret = 0; - adsp->buffer_drain_pending = false; + dsp->buffer_drain_pending = false; do { amount_read = 0; do { - ret = wm_adsp_capture_block(adsp, &avail); + ret = wm_adsp_capture_block(dsp, &avail); if (ret < 0) return ret; @@ -2775,50 +2778,50 @@ static int wm_adsp_stream_capture(struct wm_adsp *adsp) } while (amount_read > 0 && avail > WM_ADSP_MAX_READ_SIZE); if (avail > WM_ADSP_MAX_READ_SIZE) - adsp->buffer_drain_pending = true; + dsp->buffer_drain_pending = true; return total_read * WM_ADSP_DATA_WORD_SIZE; } -static int wm_adsp_ack_buffer_interrupt(struct wm_adsp *adsp) +static int wm_adsp_ack_buffer_interrupt(struct wm_adsp *dsp) { u32 irq_ack; int ret; - ret = wm_adsp_host_buffer_read(adsp, + ret = wm_adsp_host_buffer_read(dsp, HOST_BUFFER_FIELD(irq_count), &irq_ack); if (ret < 0) return ret; - if (!adsp->buffer_drain_pending) + if (!dsp->buffer_drain_pending) irq_ack |= 1; /* enable further IRQs */ - ret = wm_adsp_host_buffer_write(adsp, + ret = wm_adsp_host_buffer_write(dsp, HOST_BUFFER_FIELD(irq_ack), irq_ack); return ret; } -int wm_adsp_stream_handle_irq(struct wm_adsp *adsp) +int wm_adsp_stream_handle_irq(struct wm_adsp *dsp) { int ret, bytes_captured; - ret = wm_adsp_host_buffer_read(adsp, + ret = wm_adsp_host_buffer_read(dsp, HOST_BUFFER_FIELD(error), - &adsp->dsp_error); + &dsp->dsp_error); if (ret < 0) return ret; - if (adsp->dsp_error != 0) { - adsp_err(adsp, "DSP error occurred: %d\n", adsp->dsp_error); + if (dsp->dsp_error != 0) { + adsp_err(dsp, "DSP error occurred: %d\n", dsp->dsp_error); return -EIO; } - bytes_captured = wm_adsp_stream_capture(adsp); + bytes_captured = wm_adsp_stream_capture(dsp); if (bytes_captured < 0) return bytes_captured; - ret = wm_adsp_ack_buffer_interrupt(adsp); + ret = wm_adsp_ack_buffer_interrupt(dsp); if (ret < 0) return ret; @@ -2826,51 +2829,51 @@ int wm_adsp_stream_handle_irq(struct wm_adsp *adsp) } EXPORT_SYMBOL_GPL(wm_adsp_stream_handle_irq); -int wm_adsp_stream_read(struct wm_adsp *adsp, char __user *buf, size_t count) +int wm_adsp_stream_read(struct wm_adsp *dsp, char __user *buf, size_t count) { int avail, to_end; int ret; - if (!adsp->running) + if (!dsp->running) return -EIO; - avail = CIRC_CNT(adsp->capt_buf.head, - adsp->capt_buf.tail, - adsp->capt_buf_size); - to_end = CIRC_CNT_TO_END(adsp->capt_buf.head, - adsp->capt_buf.tail, - adsp->capt_buf_size); + avail = CIRC_CNT(dsp->capt_buf.head, + dsp->capt_buf.tail, + dsp->capt_buf_size); + to_end = CIRC_CNT_TO_END(dsp->capt_buf.head, + dsp->capt_buf.tail, + dsp->capt_buf_size); if (avail < count) count = avail; - adsp_dbg(adsp, "%s: avail=%d toend=%d count=%zo\n", + adsp_dbg(dsp, "%s: avail=%d toend=%d count=%zo\n", __func__, avail, to_end, count); if (count > to_end) { if (copy_to_user(buf, - adsp->capt_buf.buf + - adsp->capt_buf.tail, + dsp->capt_buf.buf + + dsp->capt_buf.tail, to_end)) return -EFAULT; - if (copy_to_user(buf + to_end, adsp->capt_buf.buf, + if (copy_to_user(buf + to_end, dsp->capt_buf.buf, count - to_end)) return -EFAULT; } else { if (copy_to_user(buf, - adsp->capt_buf.buf + - adsp->capt_buf.tail, + dsp->capt_buf.buf + + dsp->capt_buf.tail, count)) return -EFAULT; } - adsp->capt_buf.tail += count; - adsp->capt_buf.tail &= adsp->capt_buf_size - 1; + dsp->capt_buf.tail += count; + dsp->capt_buf.tail &= dsp->capt_buf_size - 1; - if (adsp->buffer_drain_pending) { - wm_adsp_stream_capture(adsp); + if (dsp->buffer_drain_pending) { + wm_adsp_stream_capture(dsp); - ret = wm_adsp_ack_buffer_interrupt(adsp); + ret = wm_adsp_ack_buffer_interrupt(dsp); if (ret < 0) return ret; } @@ -2879,11 +2882,11 @@ int wm_adsp_stream_read(struct wm_adsp *adsp, char __user *buf, size_t count) } EXPORT_SYMBOL_GPL(wm_adsp_stream_read); -int wm_adsp_stream_avail(const struct wm_adsp *adsp) +int wm_adsp_stream_avail(const struct wm_adsp *dsp) { - return CIRC_CNT(adsp->capt_buf.head, - adsp->capt_buf.tail, - adsp->capt_buf_size); + return CIRC_CNT(dsp->capt_buf.head, + dsp->capt_buf.tail, + dsp->capt_buf_size); } EXPORT_SYMBOL_GPL(wm_adsp_stream_avail); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index a1869943caf..cfecb535a54 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -139,8 +139,8 @@ extern const struct snd_kcontrol_new wm_adsp1_fw_controls[]; extern const struct snd_kcontrol_new wm_adsp2_fw_controls[]; extern const struct snd_kcontrol_new wm_adsp2v2_fw_controls[]; -int wm_adsp1_init(struct wm_adsp *adsp); -int wm_adsp2_init(struct wm_adsp *adsp, struct mutex *fw_lock); +int wm_adsp1_init(struct wm_adsp *dsp); +int wm_adsp2_init(struct wm_adsp *dsp, struct mutex *fw_lock); int wm_adsp1_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); diff --git a/sound/soc/codecs/wmfw.h b/sound/soc/codecs/wmfw.h index ef163360a74..34c14b5916c 100644 --- a/sound/soc/codecs/wmfw.h +++ b/sound/soc/codecs/wmfw.h @@ -61,7 +61,7 @@ struct wmfw_adsp1_id_hdr { struct wmfw_id_hdr fw; __be32 zm; __be32 dm; - __be32 algs; + __be32 n_algs; } __packed; struct wmfw_adsp2_id_hdr { @@ -69,7 +69,7 @@ struct wmfw_adsp2_id_hdr { __be32 zm; __be32 xm; __be32 ym; - __be32 algs; + __be32 n_algs; } __packed; struct wmfw_alg_hdr { From 497bee8d7042474d14efbe67c41a548c70ec3c59 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 19 Nov 2014 13:49:31 +0000 Subject: [PATCH 0735/1167] ASoC: wm_adsp: Remove len field from wm_adsp_alg_region The algorithm region information in the firmware doesn't contain a length field, explicitly pass this to the create_control function rather than bundle into wm_adsp_alg_region. Change-Id: I1f1493a69114a97041d293e11405ad9ab7f9bde4 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 55 +++++++++++++++++++------------------- sound/soc/codecs/wm_adsp.h | 1 - 2 files changed, 28 insertions(+), 28 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 1079e0a243a..96ede1070f5 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1141,7 +1141,8 @@ static void wm_adsp_ctl_work(struct work_struct *work) } static int wm_adsp_create_control(struct wm_adsp *dsp, - const struct wm_adsp_alg_region *alg_region) + const struct wm_adsp_alg_region *alg_region, + unsigned int len) { struct wm_coeff_ctl *ctl; struct wmfw_ctl_work *ctl_work; @@ -1205,7 +1206,12 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, ctl->ops.xput = wm_coeff_put; ctl->dsp = dsp; - ctl->len = alg_region->len; + if (len > 512) { + adsp_warn(dsp, "Truncating control %s from %d\n", + ctl->name, len); + len = 512; + } + ctl->len = len; ctl->cache = kzalloc(ctl->len, GFP_KERNEL); if (!ctl->cache) { ret = -ENOMEM; @@ -1354,13 +1360,12 @@ static int wm_adsp1_setup_algs(struct wm_adsp *dsp) alg_region->type = WMFW_ADSP1_DM; alg_region->alg = be32_to_cpu(adsp1_alg[i].alg.id); alg_region->base = be32_to_cpu(adsp1_alg[i].dm); - alg_region->len = 0; list_add_tail(&alg_region->list, &dsp->alg_regions); if (i + 1 < n_algs) { - alg_region->len = be32_to_cpu(adsp1_alg[i + 1].dm); - alg_region->len -= be32_to_cpu(adsp1_alg[i].dm); - alg_region->len *= 4; - wm_adsp_create_control(dsp, alg_region); + len = be32_to_cpu(adsp1_alg[i + 1].dm); + len -= be32_to_cpu(adsp1_alg[i].dm); + len *= 4; + wm_adsp_create_control(dsp, alg_region, len); } else { adsp_warn(dsp, "Missing length info for region DM with ID %x\n", be32_to_cpu(adsp1_alg[i].alg.id)); @@ -1374,13 +1379,12 @@ static int wm_adsp1_setup_algs(struct wm_adsp *dsp) alg_region->type = WMFW_ADSP1_ZM; alg_region->alg = be32_to_cpu(adsp1_alg[i].alg.id); alg_region->base = be32_to_cpu(adsp1_alg[i].zm); - alg_region->len = 0; list_add_tail(&alg_region->list, &dsp->alg_regions); if (i + 1 < n_algs) { - alg_region->len = be32_to_cpu(adsp1_alg[i + 1].zm); - alg_region->len -= be32_to_cpu(adsp1_alg[i].zm); - alg_region->len *= 4; - wm_adsp_create_control(dsp, alg_region); + len = be32_to_cpu(adsp1_alg[i + 1].zm); + len -= be32_to_cpu(adsp1_alg[i].zm); + len *= 4; + wm_adsp_create_control(dsp, alg_region, len); } else { adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", be32_to_cpu(adsp1_alg[i].alg.id)); @@ -1473,13 +1477,12 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) alg_region->type = WMFW_ADSP2_XM; alg_region->alg = be32_to_cpu(adsp2_alg[i].alg.id); alg_region->base = be32_to_cpu(adsp2_alg[i].xm); - alg_region->len = 0; list_add_tail(&alg_region->list, &dsp->alg_regions); if (i + 1 < n_algs) { - alg_region->len = be32_to_cpu(adsp2_alg[i + 1].xm); - alg_region->len -= be32_to_cpu(adsp2_alg[i].xm); - alg_region->len *= 4; - wm_adsp_create_control(dsp, alg_region); + len = be32_to_cpu(adsp2_alg[i + 1].xm); + len -= be32_to_cpu(adsp2_alg[i].xm); + len *= 4; + wm_adsp_create_control(dsp, alg_region, len); } else { adsp_warn(dsp, "Missing length info for region XM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); @@ -1493,13 +1496,12 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) alg_region->type = WMFW_ADSP2_YM; alg_region->alg = be32_to_cpu(adsp2_alg[i].alg.id); alg_region->base = be32_to_cpu(adsp2_alg[i].ym); - alg_region->len = 0; list_add_tail(&alg_region->list, &dsp->alg_regions); if (i + 1 < n_algs) { - alg_region->len = be32_to_cpu(adsp2_alg[i + 1].ym); - alg_region->len -= be32_to_cpu(adsp2_alg[i].ym); - alg_region->len *= 4; - wm_adsp_create_control(dsp, alg_region); + len = be32_to_cpu(adsp2_alg[i + 1].ym); + len -= be32_to_cpu(adsp2_alg[i].ym); + len *= 4; + wm_adsp_create_control(dsp, alg_region, len); } else { adsp_warn(dsp, "Missing length info for region YM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); @@ -1513,13 +1515,12 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) alg_region->type = WMFW_ADSP2_ZM; alg_region->alg = be32_to_cpu(adsp2_alg[i].alg.id); alg_region->base = be32_to_cpu(adsp2_alg[i].zm); - alg_region->len = 0; list_add_tail(&alg_region->list, &dsp->alg_regions); if (i + 1 < n_algs) { - alg_region->len = be32_to_cpu(adsp2_alg[i + 1].zm); - alg_region->len -= be32_to_cpu(adsp2_alg[i].zm); - alg_region->len *= 4; - wm_adsp_create_control(dsp, alg_region); + len = be32_to_cpu(adsp2_alg[i + 1].zm); + len -= be32_to_cpu(adsp2_alg[i].zm); + len *= 4; + wm_adsp_create_control(dsp, alg_region, len); } else { adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index cfecb535a54..7a909c5728c 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -32,7 +32,6 @@ struct wm_adsp_alg_region { unsigned int alg; int type; unsigned int base; - size_t len; }; struct wm_adsp_buffer_region { From d52c5b52fe4b5b9bb594dceacfc5f521ec4095f4 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 21 Nov 2014 16:03:17 +0000 Subject: [PATCH 0736/1167] ASoC: wm_adsp: Limit firmware control name to ALSA control name size ALSA only supports control names up to 44 bytes, so there is no point allocating a whole page of memory to hold the control name, just limit the control name to 44 bytes. Change-Id: I701e9ffb3b9e0cf8dd1db45107c36955c932f56c Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 96ede1070f5..d8e7129b165 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -37,6 +37,8 @@ #include "arizona.h" #include "wm_adsp.h" +#define WM_ADSP_CONTROL_MAX 44 + #define adsp_crit(_dsp, fmt, ...) \ dev_crit(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__) #define adsp_err(_dsp, fmt, ...) \ @@ -1150,7 +1152,7 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, char *region_name; int ret; - name = kmalloc(PAGE_SIZE, GFP_KERNEL); + name = kmalloc(WM_ADSP_CONTROL_MAX, GFP_KERNEL); if (!name) return -ENOMEM; @@ -1175,7 +1177,7 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, return -EINVAL; } - snprintf(name, PAGE_SIZE, "DSP%d %s %x", + snprintf(name, WM_ADSP_CONTROL_MAX, "DSP%d %s %x", dsp->num, region_name, alg_region->alg); list_for_each_entry(ctl, &dsp->ctl_list, From 76f1389645cae8a1fee909e908d22acd55392fd6 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 8 Jan 2015 09:59:46 +0000 Subject: [PATCH 0737/1167] ASoC: wm_adsp: Move temporary control name to the stack Now we only allocate 44 bytes for the control name keep it on the stack to avoid a lot of pointless memory allocation. Change-Id: I5f6fc88b1b0d871464dca52f8d852f118f6b3eaf Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 20 ++++---------------- 1 file changed, 4 insertions(+), 16 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index d8e7129b165..b6ca2b08df5 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1148,14 +1148,10 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, { struct wm_coeff_ctl *ctl; struct wmfw_ctl_work *ctl_work; - char *name; + char name[WM_ADSP_CONTROL_MAX]; char *region_name; int ret; - name = kmalloc(WM_ADSP_CONTROL_MAX, GFP_KERNEL); - if (!name) - return -ENOMEM; - switch (alg_region->type) { case WMFW_ADSP1_PM: region_name = "PM"; @@ -1173,7 +1169,6 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, region_name = "ZM"; break; default: - kfree(name); return -EINVAL; } @@ -1185,17 +1180,13 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, if (!strcmp(ctl->name, name)) { if (!ctl->enabled) ctl->enabled = 1; - - kfree(name); return 0; } } ctl = kzalloc(sizeof(*ctl), GFP_KERNEL); - if (!ctl) { - ret = -ENOMEM; - goto err_name; - } + if (!ctl) + return -ENOMEM; ctl->alg_region = *alg_region; ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL); if (!ctl->name) { @@ -1232,8 +1223,6 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, INIT_WORK(&ctl_work->work, wm_adsp_ctl_work); schedule_work(&ctl_work->work); - kfree(name); - return 0; err_ctl_cache: @@ -1242,8 +1231,7 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, kfree(ctl->name); err_ctl: kfree(ctl); -err_name: - kfree(name); + return ret; } From 6330fc427920bcfdd4b24df5aa6d5e5fd7bcada9 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 20 Nov 2014 17:00:24 +0000 Subject: [PATCH 0738/1167] ASoC: wm_adsp: Clean up low level control read/write functions Physically reading and writing controls to/from the DSP are handled by two low level functions (wm_coeff_{write|read}_control, these currently take in a snd_kcontrol pointer but immediately pull out a wm_coeff_ctl pointer from the private data. This functions don't handle the kcontrols at all they just shuttle data to and from the chip and as all the call sites have wm_coeff_ctl pointer available anyway, just pass that in. Change-Id: I34c19671278aba455c7728abe9c3e4dd23d1fc81 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index b6ca2b08df5..88e2587fe4f 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -685,10 +685,9 @@ static int wm_coeff_info(struct snd_kcontrol *kcontrol, return 0; } -static int wm_coeff_write_control(struct snd_kcontrol *kcontrol, +static int wm_coeff_write_control(struct wm_coeff_ctl *ctl, const void *buf, size_t len) { - struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; struct wm_adsp_alg_region *alg_region = &ctl->alg_region; const struct wm_adsp_region *mem; struct wm_adsp *dsp = ctl->dsp; @@ -741,15 +740,14 @@ static int wm_coeff_put(struct snd_kcontrol *kcontrol, return 0; } - ret = wm_coeff_write_control(kcontrol, p, ctl->len); + ret = wm_coeff_write_control(ctl, p, ctl->len); mutex_unlock(&ctl->lock); return ret; } -static int wm_coeff_read_control(struct snd_kcontrol *kcontrol, +static int wm_coeff_read_control(struct wm_coeff_ctl *ctl, void *buf, size_t len) { - struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; struct wm_adsp_alg_region *alg_region = &ctl->alg_region; const struct wm_adsp_region *mem; struct wm_adsp *dsp = ctl->dsp; @@ -796,7 +794,7 @@ static int wm_coeff_get(struct snd_kcontrol *kcontrol, mutex_lock(&ctl->lock); if (dsp->running) - wm_coeff_read_control(kcontrol, ctl->cache, ctl->len); + wm_coeff_read_control(ctl, ctl->cache, ctl->len); memcpy(p, ctl->cache, ctl->len); mutex_unlock(&ctl->lock); @@ -1099,7 +1097,7 @@ static int wm_coeff_init_control_caches(struct wm_adsp *dsp) if (!ctl->enabled || ctl->set) continue; mutex_lock(&ctl->lock); - ret = wm_coeff_read_control(ctl->kcontrol, + ret = wm_coeff_read_control(ctl, ctl->cache, ctl->len); mutex_unlock(&ctl->lock); @@ -1120,7 +1118,7 @@ static int wm_coeff_sync_controls(struct wm_adsp *dsp) continue; if (ctl->set) { mutex_lock(&ctl->lock); - ret = wm_coeff_write_control(ctl->kcontrol, + ret = wm_coeff_write_control(ctl, ctl->cache, ctl->len); mutex_unlock(&ctl->lock); From c0e26416a80967fb6c989efb936833121acbc6b9 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 24 Nov 2014 17:49:05 +0000 Subject: [PATCH 0739/1167] ASoC: wm_adsp: Improve round to next 4-byte boundry Whilst the existing code does correctly round to the next 4-byte boundry it does so rather inefficiently. This patch changes the rounding to be simpler and more efficient. Change-Id: Ib1f8bf15fc8fabd977899569805564c29df95224 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 88e2587fe4f..6cfad19fbb7 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1534,7 +1534,6 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) int err, pos, blocks, type, offset, reg; char *file; struct wm_adsp_buf *buf; - int tmp; if (dsp->firmwares[dsp->fw].binfile && !(strcmp(dsp->firmwares[dsp->fw].binfile, "None"))) @@ -1694,12 +1693,7 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) } } - tmp = le32_to_cpu(blk->len) % 4; - if (tmp) - pos += le32_to_cpu(blk->len) + (4 - tmp) + sizeof(*blk); - else - pos += le32_to_cpu(blk->len) + sizeof(*blk); - + pos += (le32_to_cpu(blk->len) + sizeof(*blk) + 3) & ~0x03; blocks++; } From 919f3cf10dcd0513e90f9c2a4f6e279e12de77d1 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 27 Nov 2014 16:34:54 +0000 Subject: [PATCH 0740/1167] ASoC: wm_adsp: Factor out creation of alg_regions Tidy up the code a little by factoring out the creation of the algorithm regions. Change-Id: I869a781215b176697a7aeca730d32904092e2771 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 134 ++++++++++++++++++------------------- 1 file changed, 64 insertions(+), 70 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 6cfad19fbb7..be840779338 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1277,6 +1277,25 @@ static void *wm_adsp_read_algs(struct wm_adsp *dsp, size_t n_algs, return alg; } +static struct wm_adsp_alg_region *wm_adsp_create_region(struct wm_adsp *dsp, + int type, __be32 id, + __be32 base) +{ + struct wm_adsp_alg_region *alg_region; + + alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); + if (!alg_region) + return ERR_PTR(-ENOMEM); + + alg_region->type = type; + alg_region->alg = be32_to_cpu(id); + alg_region->base = be32_to_cpu(base); + + list_add_tail(&alg_region->list, &dsp->alg_regions); + + return alg_region; +} + static int wm_adsp1_setup_algs(struct wm_adsp *dsp) { struct wmfw_adsp1_id_hdr adsp1_id; @@ -1308,21 +1327,15 @@ static int wm_adsp1_setup_algs(struct wm_adsp *dsp) be32_to_cpu(adsp1_id.fw.ver) & 0xff, n_algs); - alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); - if (!alg_region) - return -ENOMEM; - alg_region->type = WMFW_ADSP1_ZM; - alg_region->alg = be32_to_cpu(adsp1_id.fw.id); - alg_region->base = be32_to_cpu(adsp1_id.zm); - list_add_tail(&alg_region->list, &dsp->alg_regions); + alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM, + adsp1_id.fw.id, adsp1_id.zm); + if (IS_ERR(alg_region)) + return PTR_ERR(alg_region); - alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); - if (!alg_region) - return -ENOMEM; - alg_region->type = WMFW_ADSP1_DM; - alg_region->alg = be32_to_cpu(adsp1_id.fw.id); - alg_region->base = be32_to_cpu(adsp1_id.dm); - list_add_tail(&alg_region->list, &dsp->alg_regions); + alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM, + adsp1_id.fw.id, adsp1_id.dm); + if (IS_ERR(alg_region)) + return PTR_ERR(alg_region); pos = sizeof(adsp1_id) / 2; len = (sizeof(*adsp1_alg) * n_algs) / 2; @@ -1340,15 +1353,13 @@ static int wm_adsp1_setup_algs(struct wm_adsp *dsp) be32_to_cpu(adsp1_alg[i].dm), be32_to_cpu(adsp1_alg[i].zm)); - alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); - if (!alg_region) { - ret = -ENOMEM; + alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM, + adsp1_alg[i].alg.id, + adsp1_alg[i].dm); + if (IS_ERR(alg_region)) { + ret = PTR_ERR(alg_region); goto out; } - alg_region->type = WMFW_ADSP1_DM; - alg_region->alg = be32_to_cpu(adsp1_alg[i].alg.id); - alg_region->base = be32_to_cpu(adsp1_alg[i].dm); - list_add_tail(&alg_region->list, &dsp->alg_regions); if (i + 1 < n_algs) { len = be32_to_cpu(adsp1_alg[i + 1].dm); len -= be32_to_cpu(adsp1_alg[i].dm); @@ -1359,15 +1370,13 @@ static int wm_adsp1_setup_algs(struct wm_adsp *dsp) be32_to_cpu(adsp1_alg[i].alg.id)); } - alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); - if (!alg_region) { - ret = -ENOMEM; + alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM, + adsp1_alg[i].alg.id, + adsp1_alg[i].zm); + if (IS_ERR(alg_region)) { + ret = PTR_ERR(alg_region); goto out; } - alg_region->type = WMFW_ADSP1_ZM; - alg_region->alg = be32_to_cpu(adsp1_alg[i].alg.id); - alg_region->base = be32_to_cpu(adsp1_alg[i].zm); - list_add_tail(&alg_region->list, &dsp->alg_regions); if (i + 1 < n_algs) { len = be32_to_cpu(adsp1_alg[i + 1].zm); len -= be32_to_cpu(adsp1_alg[i].zm); @@ -1415,29 +1424,20 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) be32_to_cpu(adsp2_id.fw.ver) & 0xff, n_algs); - alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); - if (!alg_region) - return -ENOMEM; - alg_region->type = WMFW_ADSP2_XM; - alg_region->alg = be32_to_cpu(adsp2_id.fw.id); - alg_region->base = be32_to_cpu(adsp2_id.xm); - list_add_tail(&alg_region->list, &dsp->alg_regions); + alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM, + adsp2_id.fw.id, adsp2_id.xm); + if (IS_ERR(alg_region)) + return PTR_ERR(alg_region); - alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); - if (!alg_region) - return -ENOMEM; - alg_region->type = WMFW_ADSP2_YM; - alg_region->alg = be32_to_cpu(adsp2_id.fw.id); - alg_region->base = be32_to_cpu(adsp2_id.ym); - list_add_tail(&alg_region->list, &dsp->alg_regions); + alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM, + adsp2_id.fw.id, adsp2_id.ym); + if (IS_ERR(alg_region)) + return PTR_ERR(alg_region); - alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); - if (!alg_region) - return -ENOMEM; - alg_region->type = WMFW_ADSP2_ZM; - alg_region->alg = be32_to_cpu(adsp2_id.fw.id); - alg_region->base = be32_to_cpu(adsp2_id.zm); - list_add_tail(&alg_region->list, &dsp->alg_regions); + alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM, + adsp2_id.fw.id, adsp2_id.zm); + if (IS_ERR(alg_region)) + return PTR_ERR(alg_region); pos = sizeof(adsp2_id) / 2; len = (sizeof(*adsp2_alg) * n_algs) / 2; @@ -1457,15 +1457,13 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) be32_to_cpu(adsp2_alg[i].ym), be32_to_cpu(adsp2_alg[i].zm)); - alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); - if (!alg_region) { - ret = -ENOMEM; + alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM, + adsp2_alg[i].alg.id, + adsp2_alg[i].xm); + if (IS_ERR(alg_region)) { + ret = PTR_ERR(alg_region); goto out; } - alg_region->type = WMFW_ADSP2_XM; - alg_region->alg = be32_to_cpu(adsp2_alg[i].alg.id); - alg_region->base = be32_to_cpu(adsp2_alg[i].xm); - list_add_tail(&alg_region->list, &dsp->alg_regions); if (i + 1 < n_algs) { len = be32_to_cpu(adsp2_alg[i + 1].xm); len -= be32_to_cpu(adsp2_alg[i].xm); @@ -1476,15 +1474,13 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) be32_to_cpu(adsp2_alg[i].alg.id)); } - alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); - if (!alg_region) { - ret = -ENOMEM; + alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM, + adsp2_alg[i].alg.id, + adsp2_alg[i].ym); + if (IS_ERR(alg_region)) { + ret = PTR_ERR(alg_region); goto out; } - alg_region->type = WMFW_ADSP2_YM; - alg_region->alg = be32_to_cpu(adsp2_alg[i].alg.id); - alg_region->base = be32_to_cpu(adsp2_alg[i].ym); - list_add_tail(&alg_region->list, &dsp->alg_regions); if (i + 1 < n_algs) { len = be32_to_cpu(adsp2_alg[i + 1].ym); len -= be32_to_cpu(adsp2_alg[i].ym); @@ -1495,15 +1491,13 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) be32_to_cpu(adsp2_alg[i].alg.id)); } - alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); - if (!alg_region) { - ret = -ENOMEM; + alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM, + adsp2_alg[i].alg.id, + adsp2_alg[i].zm); + if (IS_ERR(alg_region)) { + ret = PTR_ERR(alg_region); goto out; } - alg_region->type = WMFW_ADSP2_ZM; - alg_region->alg = be32_to_cpu(adsp2_alg[i].alg.id); - alg_region->base = be32_to_cpu(adsp2_alg[i].zm); - list_add_tail(&alg_region->list, &dsp->alg_regions); if (i + 1 < n_algs) { len = be32_to_cpu(adsp2_alg[i + 1].zm); len -= be32_to_cpu(adsp2_alg[i].zm); From 7033462099f1a347e1a753df9e1dd9e8478ef1a6 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 8 Jan 2015 16:14:04 +0000 Subject: [PATCH 0741/1167] ASoC: wm_adsp: Group all the ALSA control functions together This is slightly logically better and avoids some unnecessary forward declarations in the following refactoring. Change-Id: I86972876e66db3ff650ba269f93d4e53642675d0 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 290 ++++++++++++++++++------------------- 1 file changed, 145 insertions(+), 145 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index be840779338..b8e38c37637 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -847,6 +847,151 @@ static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl) return ret; } +static int wm_coeff_init_control_caches(struct wm_adsp *dsp) +{ + struct wm_coeff_ctl *ctl; + int ret; + + list_for_each_entry(ctl, &dsp->ctl_list, list) { + if (!ctl->enabled || ctl->set) + continue; + mutex_lock(&ctl->lock); + ret = wm_coeff_read_control(ctl, + ctl->cache, + ctl->len); + mutex_unlock(&ctl->lock); + if (ret < 0) + return ret; + } + + return 0; +} + +static int wm_coeff_sync_controls(struct wm_adsp *dsp) +{ + struct wm_coeff_ctl *ctl; + int ret; + + list_for_each_entry(ctl, &dsp->ctl_list, list) { + if (!ctl->enabled) + continue; + if (ctl->set) { + mutex_lock(&ctl->lock); + ret = wm_coeff_write_control(ctl, + ctl->cache, + ctl->len); + mutex_unlock(&ctl->lock); + if (ret < 0) + return ret; + } + } + + return 0; +} + +static void wm_adsp_ctl_work(struct work_struct *work) +{ + struct wmfw_ctl_work *ctl_work = container_of(work, + struct wmfw_ctl_work, + work); + + wmfw_add_ctl(ctl_work->dsp, ctl_work->ctl); + kfree(ctl_work); +} + +static int wm_adsp_create_control(struct wm_adsp *dsp, + const struct wm_adsp_alg_region *alg_region, + unsigned int len) +{ + struct wm_coeff_ctl *ctl; + struct wmfw_ctl_work *ctl_work; + char name[WM_ADSP_CONTROL_MAX]; + char *region_name; + int ret; + + switch (alg_region->type) { + case WMFW_ADSP1_PM: + region_name = "PM"; + break; + case WMFW_ADSP1_DM: + region_name = "DM"; + break; + case WMFW_ADSP2_XM: + region_name = "XM"; + break; + case WMFW_ADSP2_YM: + region_name = "YM"; + break; + case WMFW_ADSP1_ZM: + region_name = "ZM"; + break; + default: + return -EINVAL; + } + + snprintf(name, WM_ADSP_CONTROL_MAX, "DSP%d %s %x", + dsp->num, region_name, alg_region->alg); + + list_for_each_entry(ctl, &dsp->ctl_list, + list) { + if (!strcmp(ctl->name, name)) { + if (!ctl->enabled) + ctl->enabled = 1; + return 0; + } + } + + ctl = kzalloc(sizeof(*ctl), GFP_KERNEL); + if (!ctl) + return -ENOMEM; + ctl->alg_region = *alg_region; + ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL); + if (!ctl->name) { + ret = -ENOMEM; + goto err_ctl; + } + ctl->enabled = 1; + ctl->set = 0; + ctl->ops.xget = wm_coeff_get; + ctl->ops.xput = wm_coeff_put; + ctl->dsp = dsp; + + if (len > 512) { + adsp_warn(dsp, "Truncating control %s from %d\n", + ctl->name, len); + len = 512; + } + ctl->len = len; + ctl->cache = kzalloc(ctl->len, GFP_KERNEL); + if (!ctl->cache) { + ret = -ENOMEM; + goto err_ctl_name; + } + mutex_init(&ctl->lock); + + ctl_work = kzalloc(sizeof(*ctl_work), GFP_KERNEL); + if (!ctl_work) { + ret = -ENOMEM; + goto err_ctl_cache; + } + + ctl_work->dsp = dsp; + ctl_work->ctl = ctl; + INIT_WORK(&ctl_work->work, wm_adsp_ctl_work); + schedule_work(&ctl_work->work); + + return 0; + +err_ctl_cache: + kfree(ctl->cache); +err_ctl_name: + kfree(ctl->name); +err_ctl: + kfree(ctl); + + return ret; +} + static int wm_adsp_load(struct wm_adsp *dsp) { LIST_HEAD(buf_list); @@ -1088,151 +1233,6 @@ static int wm_adsp_load(struct wm_adsp *dsp) return ret; } -static int wm_coeff_init_control_caches(struct wm_adsp *dsp) -{ - struct wm_coeff_ctl *ctl; - int ret; - - list_for_each_entry(ctl, &dsp->ctl_list, list) { - if (!ctl->enabled || ctl->set) - continue; - mutex_lock(&ctl->lock); - ret = wm_coeff_read_control(ctl, - ctl->cache, - ctl->len); - mutex_unlock(&ctl->lock); - if (ret < 0) - return ret; - } - - return 0; -} - -static int wm_coeff_sync_controls(struct wm_adsp *dsp) -{ - struct wm_coeff_ctl *ctl; - int ret; - - list_for_each_entry(ctl, &dsp->ctl_list, list) { - if (!ctl->enabled) - continue; - if (ctl->set) { - mutex_lock(&ctl->lock); - ret = wm_coeff_write_control(ctl, - ctl->cache, - ctl->len); - mutex_unlock(&ctl->lock); - if (ret < 0) - return ret; - } - } - - return 0; -} - -static void wm_adsp_ctl_work(struct work_struct *work) -{ - struct wmfw_ctl_work *ctl_work = container_of(work, - struct wmfw_ctl_work, - work); - - wmfw_add_ctl(ctl_work->dsp, ctl_work->ctl); - kfree(ctl_work); -} - -static int wm_adsp_create_control(struct wm_adsp *dsp, - const struct wm_adsp_alg_region *alg_region, - unsigned int len) -{ - struct wm_coeff_ctl *ctl; - struct wmfw_ctl_work *ctl_work; - char name[WM_ADSP_CONTROL_MAX]; - char *region_name; - int ret; - - switch (alg_region->type) { - case WMFW_ADSP1_PM: - region_name = "PM"; - break; - case WMFW_ADSP1_DM: - region_name = "DM"; - break; - case WMFW_ADSP2_XM: - region_name = "XM"; - break; - case WMFW_ADSP2_YM: - region_name = "YM"; - break; - case WMFW_ADSP1_ZM: - region_name = "ZM"; - break; - default: - return -EINVAL; - } - - snprintf(name, WM_ADSP_CONTROL_MAX, "DSP%d %s %x", - dsp->num, region_name, alg_region->alg); - - list_for_each_entry(ctl, &dsp->ctl_list, - list) { - if (!strcmp(ctl->name, name)) { - if (!ctl->enabled) - ctl->enabled = 1; - return 0; - } - } - - ctl = kzalloc(sizeof(*ctl), GFP_KERNEL); - if (!ctl) - return -ENOMEM; - ctl->alg_region = *alg_region; - ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL); - if (!ctl->name) { - ret = -ENOMEM; - goto err_ctl; - } - ctl->enabled = 1; - ctl->set = 0; - ctl->ops.xget = wm_coeff_get; - ctl->ops.xput = wm_coeff_put; - ctl->dsp = dsp; - - if (len > 512) { - adsp_warn(dsp, "Truncating control %s from %d\n", - ctl->name, len); - len = 512; - } - ctl->len = len; - ctl->cache = kzalloc(ctl->len, GFP_KERNEL); - if (!ctl->cache) { - ret = -ENOMEM; - goto err_ctl_name; - } - mutex_init(&ctl->lock); - - ctl_work = kzalloc(sizeof(*ctl_work), GFP_KERNEL); - if (!ctl_work) { - ret = -ENOMEM; - goto err_ctl_cache; - } - - ctl_work->dsp = dsp; - ctl_work->ctl = ctl; - INIT_WORK(&ctl_work->work, wm_adsp_ctl_work); - schedule_work(&ctl_work->work); - - return 0; - -err_ctl_cache: - kfree(ctl->cache); -err_ctl_name: - kfree(ctl->name); -err_ctl: - kfree(ctl); - - return ret; -} - static void *wm_adsp_read_algs(struct wm_adsp *dsp, size_t n_algs, unsigned int pos, unsigned int len) { From ae338612fcf89c1be6149be849981464a364fe1a Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 19 Nov 2014 16:18:22 +0000 Subject: [PATCH 0742/1167] ASoC: wm_adsp: Add basic support for rev 1 firmware file format Revision one of the file format includes new algorithm and coefficient blocks which provide additional information about the controls exported by the firmware. This patch updates the processing to handle this version of the file format. Change-Id: Ie63bb99e647e8eee45d83d8d366e117853395b87 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 247 ++++++++++++++++++++++++++++++------- sound/soc/codecs/wm_adsp.h | 1 + sound/soc/codecs/wmfw.h | 35 +++++- 3 files changed, 232 insertions(+), 51 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index b8e38c37637..6404681782e 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -433,6 +433,7 @@ struct wm_coeff_ctl_ops { struct wm_coeff_ctl { const char *name; + const char *fw_name; struct wm_adsp_alg_region alg_region; struct wm_coeff_ctl_ops ops; struct wm_adsp *dsp; @@ -440,6 +441,7 @@ struct wm_coeff_ctl { unsigned int enabled:1; struct list_head list; void *cache; + unsigned int offset; size_t len; unsigned int set:1; struct snd_kcontrol *kcontrol; @@ -702,7 +704,7 @@ static int wm_coeff_write_control(struct wm_coeff_ctl *ctl, return -EINVAL; } - reg = ctl->alg_region.base; + reg = ctl->alg_region.base + ctl->offset; reg = wm_adsp_region_to_reg(mem, reg); scratch = kmemdup(buf, ctl->len, GFP_KERNEL | GFP_DMA); @@ -762,7 +764,7 @@ static int wm_coeff_read_control(struct wm_coeff_ctl *ctl, return -EINVAL; } - reg = ctl->alg_region.base; + reg = ctl->alg_region.base + ctl->offset; reg = wm_adsp_region_to_reg(mem, reg); scratch = kmalloc(ctl->len, GFP_KERNEL | GFP_DMA); @@ -836,10 +838,6 @@ static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl) ctl->kcontrol = snd_soc_card_get_kcontrol(dsp->card, ctl->name); - mutex_lock(&dsp->ctl_lock); - list_add(&ctl->list, &dsp->ctl_list); - mutex_unlock(&dsp->ctl_lock); - return 0; err_kcontrol: @@ -901,7 +899,8 @@ static void wm_adsp_ctl_work(struct work_struct *work) static int wm_adsp_create_control(struct wm_adsp *dsp, const struct wm_adsp_alg_region *alg_region, - unsigned int len) + unsigned int offset, unsigned int len, + const char *subname, unsigned int subname_len) { struct wm_coeff_ctl *ctl; struct wmfw_ctl_work *ctl_work; @@ -944,6 +943,7 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, ctl = kzalloc(sizeof(*ctl), GFP_KERNEL); if (!ctl) return -ENOMEM; + ctl->fw_name = dsp->firmwares[dsp->fw].name; ctl->alg_region = *alg_region; ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL); if (!ctl->name) { @@ -956,6 +956,7 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, ctl->ops.xput = wm_coeff_put; ctl->dsp = dsp; + ctl->offset = offset; if (len > 512) { adsp_warn(dsp, "Truncating control %s from %d\n", ctl->name, len); @@ -969,6 +970,10 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, } mutex_init(&ctl->lock); + mutex_lock(&dsp->ctl_lock); + list_add(&ctl->list, &dsp->ctl_list); + mutex_unlock(&dsp->ctl_lock); + ctl_work = kzalloc(sizeof(*ctl_work), GFP_KERNEL); if (!ctl_work) { ret = -ENOMEM; @@ -992,6 +997,103 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, return ret; } +struct wm_coeff_parsed_alg { + int id; + const u8 *name; + int name_len; + int ncoeff; +}; + +struct wm_coeff_parsed_coeff { + int offset; + int mem_type; + const u8 *name; + int name_len; + int ctl_type; + int flags; + int len; +}; + +static inline void wm_coeff_parse_alg(struct wm_adsp *dsp, const u8 **data, + struct wm_coeff_parsed_alg *blk) +{ + const struct wmfw_adsp_alg_data *raw; + + raw = (const struct wmfw_adsp_alg_data *)*data; + *data = raw->data; + + blk->id = le32_to_cpu(raw->id); + blk->name = raw->name; + blk->name_len = strlen(raw->name); + blk->ncoeff = le32_to_cpu(raw->ncoeff); + + adsp_dbg(dsp, "Algorithm ID: %#x\n", blk->id); + adsp_dbg(dsp, "Algorithm name: %.*s\n", blk->name_len, blk->name); + adsp_dbg(dsp, "# of coefficient descriptors: %#x\n", blk->ncoeff); +} + +static inline void wm_coeff_parse_coeff(struct wm_adsp *dsp, const u8 **data, + struct wm_coeff_parsed_coeff *blk) +{ + const struct wmfw_adsp_coeff_data *raw; + + raw = (const struct wmfw_adsp_coeff_data *)*data; + *data = *data + sizeof(raw->hdr) + le32_to_cpu(raw->hdr.size); + + blk->offset = le16_to_cpu(raw->hdr.offset); + blk->mem_type = le16_to_cpu(raw->hdr.type); + blk->name = raw->name; + blk->name_len = strlen(raw->name); + blk->ctl_type = le16_to_cpu(raw->ctl_type); + blk->flags = le16_to_cpu(raw->flags); + blk->len = le32_to_cpu(raw->len); + + adsp_dbg(dsp, "\tCoefficient type: %#x\n", blk->mem_type); + adsp_dbg(dsp, "\tCoefficient offset: %#x\n", blk->offset); + adsp_dbg(dsp, "\tCoefficient name: %.*s\n", blk->name_len, blk->name); + adsp_dbg(dsp, "\tCoefficient flags: %#x\n", blk->flags); + adsp_dbg(dsp, "\tALSA control type: %#x\n", blk->ctl_type); + adsp_dbg(dsp, "\tALSA control len: %#x\n", blk->len); +} + +static int wm_adsp_parse_coeff(struct wm_adsp *dsp, + const struct wmfw_region *region) +{ + struct wm_adsp_alg_region alg_region = {}; + struct wm_coeff_parsed_alg alg_blk; + struct wm_coeff_parsed_coeff coeff_blk; + const u8 *data = region->data; + int i, ret; + + wm_coeff_parse_alg(dsp, &data, &alg_blk); + for (i = 0; i < alg_blk.ncoeff; i++) { + wm_coeff_parse_coeff(dsp, &data, &coeff_blk); + + switch (coeff_blk.ctl_type) { + case SNDRV_CTL_ELEM_TYPE_BYTES: + break; + default: + adsp_err(dsp, "Unknown control type: %d\n", + coeff_blk.ctl_type); + return -EINVAL; + } + + alg_region.type = coeff_blk.mem_type; + alg_region.alg = alg_blk.id; + + ret = wm_adsp_create_control(dsp, &alg_region, + coeff_blk.offset, + coeff_blk.len, + coeff_blk.name, + coeff_blk.name_len); + if (ret < 0) + adsp_err(dsp, "Failed to create control: %.*s, %d\n", + coeff_blk.name_len, coeff_blk.name, ret); + } + + return 0; +} + static int wm_adsp_load(struct wm_adsp *dsp) { LIST_HEAD(buf_list); @@ -1053,12 +1155,19 @@ static int wm_adsp_load(struct wm_adsp *dsp) goto out_fw; } - if (header->ver != 0) { + switch (header->ver) { + case 0: + case 1: + break; + default: adsp_err(dsp, "%s: unknown file format %d\n", file, header->ver); goto out_fw; } + adsp_info(dsp, "Firmware version: %d\n", header->ver); + dsp->fw_ver = header->ver; + if (header->core != dsp->type) { adsp_err(dsp, "%s: invalid core %d != %d\n", file, header->core, dsp->type); @@ -1122,6 +1231,12 @@ static int wm_adsp_load(struct wm_adsp *dsp) text = kzalloc(le32_to_cpu(region->len) + 1, GFP_KERNEL); break; + case WMFW_ALGORITHM_DATA: + region_name = "Algorithm"; + ret = wm_adsp_parse_coeff(dsp, region); + if (ret != 0) + goto out_fw; + break; case WMFW_INFO_TEXT: region_name = "Information"; text = kzalloc(le32_to_cpu(region->len) + 1, @@ -1233,6 +1348,20 @@ static int wm_adsp_load(struct wm_adsp *dsp) return ret; } +static void wm_adsp_ctl_fixup_base(struct wm_adsp *dsp, + const struct wm_adsp_alg_region *alg_region) +{ + struct wm_coeff_ctl *ctl; + + list_for_each_entry(ctl, &dsp->ctl_list, list) { + if (ctl->fw_name == dsp->firmwares[dsp->fw].name && + alg_region->alg == ctl->alg_region.alg && + alg_region->type == ctl->alg_region.type) { + ctl->alg_region.base = alg_region->base; + } + } +} + static void *wm_adsp_read_algs(struct wm_adsp *dsp, size_t n_algs, unsigned int pos, unsigned int len) { @@ -1293,6 +1422,9 @@ static struct wm_adsp_alg_region *wm_adsp_create_region(struct wm_adsp *dsp, list_add_tail(&alg_region->list, &dsp->alg_regions); + if (dsp->fw_ver > 0) + wm_adsp_ctl_fixup_base(dsp, alg_region); + return alg_region; } @@ -1360,14 +1492,17 @@ static int wm_adsp1_setup_algs(struct wm_adsp *dsp) ret = PTR_ERR(alg_region); goto out; } - if (i + 1 < n_algs) { - len = be32_to_cpu(adsp1_alg[i + 1].dm); - len -= be32_to_cpu(adsp1_alg[i].dm); - len *= 4; - wm_adsp_create_control(dsp, alg_region, len); - } else { - adsp_warn(dsp, "Missing length info for region DM with ID %x\n", - be32_to_cpu(adsp1_alg[i].alg.id)); + if (dsp->fw_ver == 0) { + if (i + 1 < n_algs) { + len = be32_to_cpu(adsp1_alg[i + 1].dm); + len -= be32_to_cpu(adsp1_alg[i].dm); + len *= 4; + wm_adsp_create_control(dsp, alg_region, 0, + len, NULL, 0); + } else { + adsp_warn(dsp, "Missing length info for region DM with ID %x\n", + be32_to_cpu(adsp1_alg[i].alg.id)); + } } alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM, @@ -1377,14 +1512,17 @@ static int wm_adsp1_setup_algs(struct wm_adsp *dsp) ret = PTR_ERR(alg_region); goto out; } - if (i + 1 < n_algs) { - len = be32_to_cpu(adsp1_alg[i + 1].zm); - len -= be32_to_cpu(adsp1_alg[i].zm); - len *= 4; - wm_adsp_create_control(dsp, alg_region, len); - } else { - adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", - be32_to_cpu(adsp1_alg[i].alg.id)); + if (dsp->fw_ver == 0) { + if (i + 1 < n_algs) { + len = be32_to_cpu(adsp1_alg[i + 1].zm); + len -= be32_to_cpu(adsp1_alg[i].zm); + len *= 4; + wm_adsp_create_control(dsp, alg_region, 0, + len, NULL, 0); + } else { + adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", + be32_to_cpu(adsp1_alg[i].alg.id)); + } } } @@ -1464,14 +1602,17 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) ret = PTR_ERR(alg_region); goto out; } - if (i + 1 < n_algs) { - len = be32_to_cpu(adsp2_alg[i + 1].xm); - len -= be32_to_cpu(adsp2_alg[i].xm); - len *= 4; - wm_adsp_create_control(dsp, alg_region, len); - } else { - adsp_warn(dsp, "Missing length info for region XM with ID %x\n", - be32_to_cpu(adsp2_alg[i].alg.id)); + if (dsp->fw_ver == 0) { + if (i + 1 < n_algs) { + len = be32_to_cpu(adsp2_alg[i + 1].xm); + len -= be32_to_cpu(adsp2_alg[i].xm); + len *= 4; + wm_adsp_create_control(dsp, alg_region, 0, + len, NULL, 0); + } else { + adsp_warn(dsp, "Missing length info for region XM with ID %x\n", + be32_to_cpu(adsp2_alg[i].alg.id)); + } } alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM, @@ -1481,14 +1622,17 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) ret = PTR_ERR(alg_region); goto out; } - if (i + 1 < n_algs) { - len = be32_to_cpu(adsp2_alg[i + 1].ym); - len -= be32_to_cpu(adsp2_alg[i].ym); - len *= 4; - wm_adsp_create_control(dsp, alg_region, len); - } else { - adsp_warn(dsp, "Missing length info for region YM with ID %x\n", - be32_to_cpu(adsp2_alg[i].alg.id)); + if (dsp->fw_ver == 0) { + if (i + 1 < n_algs) { + len = be32_to_cpu(adsp2_alg[i + 1].ym); + len -= be32_to_cpu(adsp2_alg[i].ym); + len *= 4; + wm_adsp_create_control(dsp, alg_region, 0, + len, NULL, 0); + } else { + adsp_warn(dsp, "Missing length info for region YM with ID %x\n", + be32_to_cpu(adsp2_alg[i].alg.id)); + } } alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM, @@ -1498,14 +1642,17 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) ret = PTR_ERR(alg_region); goto out; } - if (i + 1 < n_algs) { - len = be32_to_cpu(adsp2_alg[i + 1].zm); - len -= be32_to_cpu(adsp2_alg[i].zm); - len *= 4; - wm_adsp_create_control(dsp, alg_region, len); - } else { - adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", - be32_to_cpu(adsp2_alg[i].alg.id)); + if (dsp->fw_ver == 0) { + if (i + 1 < n_algs) { + len = be32_to_cpu(adsp2_alg[i + 1].zm); + len -= be32_to_cpu(adsp2_alg[i].zm); + len *= 4; + wm_adsp_create_control(dsp, alg_region, 0, + len, NULL, 0); + } else { + adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", + be32_to_cpu(adsp2_alg[i].alg.id)); + } } } @@ -2212,6 +2359,7 @@ static int wm_adsp_of_parse_firmware(struct wm_adsp *dsp, i = 0; while ((fw = of_get_next_child(fws, fw)) != NULL) { ctl_names[i] = fw->name; + dsp->firmwares[i].name = fw->name; ret = of_property_read_string(fw, "wlf,wmfw-file", &dsp->firmwares[i].file); @@ -2303,6 +2451,9 @@ int wm_adsp2_init(struct wm_adsp *dsp, struct mutex *fw_lock) dsp->num_firmwares = WM_ADSP_NUM_FW; dsp->firmwares = wm_adsp_fw; } + + for (i = 0; i < dsp->num_firmwares; i++) + dsp->firmwares[i].name = wm_adsp_fw_text[i]; } else { ctl_names = devm_kzalloc(dsp->dev, dsp->num_firmwares * sizeof(const char *), diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 7a909c5728c..3f557f9380d 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -96,6 +96,7 @@ struct wm_adsp { int num_mems; int fw; + int fw_ver; bool running; struct mutex ctl_lock; diff --git a/sound/soc/codecs/wmfw.h b/sound/soc/codecs/wmfw.h index 34c14b5916c..04690b238b3 100644 --- a/sound/soc/codecs/wmfw.h +++ b/sound/soc/codecs/wmfw.h @@ -15,6 +15,12 @@ #include +#define WMFW_MAX_ALG_NAME 256 +#define WMFW_MAX_ALG_DESCR_NAME 256 + +#define WMFW_MAX_COEFF_NAME 256 +#define WMFW_MAX_COEFF_DESCR_NAME 256 + struct wmfw_header { char magic[4]; __le32 len; @@ -90,6 +96,28 @@ struct wmfw_adsp2_alg_hdr { __be32 ym; } __packed; +struct wmfw_adsp_alg_data { + __le32 id; + u8 name[WMFW_MAX_ALG_NAME]; + u8 descr[WMFW_MAX_ALG_DESCR_NAME]; + __le32 ncoeff; + u8 data[]; +} __packed; + +struct wmfw_adsp_coeff_data { + struct { + __le16 offset; + __le16 type; + __le32 size; + } hdr; + u8 name[WMFW_MAX_COEFF_NAME]; + u8 descr[WMFW_MAX_COEFF_DESCR_NAME]; + __le16 ctl_type; + __le16 flags; + __le32 len; + u8 data[]; +} __packed; + struct wmfw_coeff_hdr { u8 magic[4]; __le32 len; @@ -117,9 +145,10 @@ struct wmfw_coeff_item { #define WMFW_ADSP1 1 #define WMFW_ADSP2 2 -#define WMFW_ABSOLUTE 0xf0 -#define WMFW_NAME_TEXT 0xfe -#define WMFW_INFO_TEXT 0xff +#define WMFW_ABSOLUTE 0xf0 +#define WMFW_ALGORITHM_DATA 0xf2 +#define WMFW_NAME_TEXT 0xfe +#define WMFW_INFO_TEXT 0xff #define WMFW_ADSP1_PM 2 #define WMFW_ADSP1_DM 3 From 63ca3a66233bcb01b023f1e202b5f1032f517937 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 28 Nov 2014 16:31:02 +0000 Subject: [PATCH 0743/1167] ASoC: wm_adsp: Add support for controls longer than 512-bytes Change-Id: I5e9af2759ebc2fb58f50e25febdf061cc0dc6f99 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 37 +++++++++++++++++++++++++++++++++---- 1 file changed, 33 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 6404681782e..e2e019c81c5 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -897,10 +897,11 @@ static void wm_adsp_ctl_work(struct work_struct *work) kfree(ctl_work); } -static int wm_adsp_create_control(struct wm_adsp *dsp, +static int wm_adsp_create_ctl_blk(struct wm_adsp *dsp, const struct wm_adsp_alg_region *alg_region, unsigned int offset, unsigned int len, - const char *subname, unsigned int subname_len) + const char *subname, unsigned int subname_len, + int block) { struct wm_coeff_ctl *ctl; struct wmfw_ctl_work *ctl_work; @@ -928,8 +929,8 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, return -EINVAL; } - snprintf(name, WM_ADSP_CONTROL_MAX, "DSP%d %s %x", - dsp->num, region_name, alg_region->alg); + snprintf(name, WM_ADSP_CONTROL_MAX, "DSP%d %s %x:%d", + dsp->num, region_name, alg_region->alg, block); list_for_each_entry(ctl, &dsp->ctl_list, list) { @@ -997,6 +998,34 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, return ret; } +static int wm_adsp_create_control(struct wm_adsp *dsp, + const struct wm_adsp_alg_region *alg_region, + unsigned int offset, unsigned int len, + const char *subname, unsigned int subname_len) +{ + unsigned int ctl_len; + int block = 0; + int ret; + + while (len) { + ctl_len = len; + if (ctl_len > 512) + ctl_len = 512; + + ret = wm_adsp_create_ctl_blk(dsp, alg_region, offset, ctl_len, + subname, subname_len, block); + if (ret < 0) + return ret; + + offset += ctl_len / 4; + len -= ctl_len; + + block++; + } + + return 0; +} + struct wm_coeff_parsed_alg { int id; const u8 *name; From 08705379ac0b286460bfed42729943d8d5c70564 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 21 Nov 2014 14:33:43 +0000 Subject: [PATCH 0744/1167] ASoC: wm_adsp: Add support for DSP control flags The DSP control information contains various hints about the usage of the control use these when handling the control. Change-Id: I54558e2b961b4cd48c3b1061f71a2519ec74f504 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 65 ++++++++++++++++++++++++++------------ sound/soc/codecs/wmfw.h | 5 +++ 2 files changed, 50 insertions(+), 20 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index e2e019c81c5..9cd3fd6dce2 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -445,6 +445,7 @@ struct wm_coeff_ctl { size_t len; unsigned int set:1; struct snd_kcontrol *kcontrol; + unsigned int flags; struct mutex lock; }; @@ -731,18 +732,22 @@ static int wm_coeff_put(struct snd_kcontrol *kcontrol, { struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; char *p = ucontrol->value.bytes.data; - int ret; + int ret = 0; + + if (ctl->flags && !(ctl->flags & WMFW_CTL_FLAG_WRITEABLE)) + return -EPERM; mutex_lock(&ctl->lock); + memcpy(ctl->cache, p, ctl->len); ctl->set = 1; - if (!ctl->enabled) { - mutex_unlock(&ctl->lock); - return 0; - } + if (!ctl->enabled) + goto out; ret = wm_coeff_write_control(ctl, p, ctl->len); + +out: mutex_unlock(&ctl->lock); return ret; } @@ -790,17 +795,27 @@ static int wm_coeff_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; - struct wm_adsp *dsp = ctl->dsp; char *p = ucontrol->value.bytes.data; + int ret = 0; + + if (ctl->flags && !(ctl->flags & WMFW_CTL_FLAG_READABLE)) + return -EPERM; mutex_lock(&ctl->lock); - if (dsp->running) - wm_coeff_read_control(ctl, ctl->cache, ctl->len); + if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) { + if (ctl->enabled) + ret = wm_coeff_read_control(ctl, p, ctl->len); + else + ret = -EPERM; + goto out; + } memcpy(p, ctl->cache, ctl->len); + +out: mutex_unlock(&ctl->lock); - return 0; + return ret; } struct wmfw_ctl_work { @@ -853,6 +868,9 @@ static int wm_coeff_init_control_caches(struct wm_adsp *dsp) list_for_each_entry(ctl, &dsp->ctl_list, list) { if (!ctl->enabled || ctl->set) continue; + if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) + continue; + mutex_lock(&ctl->lock); ret = wm_coeff_read_control(ctl, ctl->cache, @@ -873,7 +891,7 @@ static int wm_coeff_sync_controls(struct wm_adsp *dsp) list_for_each_entry(ctl, &dsp->ctl_list, list) { if (!ctl->enabled) continue; - if (ctl->set) { + if (ctl->set && !(ctl->flags & WMFW_CTL_FLAG_VOLATILE)) { mutex_lock(&ctl->lock); ret = wm_coeff_write_control(ctl, ctl->cache, @@ -901,7 +919,7 @@ static int wm_adsp_create_ctl_blk(struct wm_adsp *dsp, const struct wm_adsp_alg_region *alg_region, unsigned int offset, unsigned int len, const char *subname, unsigned int subname_len, - int block) + unsigned int flags, int block) { struct wm_coeff_ctl *ctl; struct wmfw_ctl_work *ctl_work; @@ -909,6 +927,9 @@ static int wm_adsp_create_ctl_blk(struct wm_adsp *dsp, char *region_name; int ret; + if (flags & WMFW_CTL_FLAG_SYS) + return 0; + switch (alg_region->type) { case WMFW_ADSP1_PM: region_name = "PM"; @@ -957,6 +978,7 @@ static int wm_adsp_create_ctl_blk(struct wm_adsp *dsp, ctl->ops.xput = wm_coeff_put; ctl->dsp = dsp; + ctl->flags = flags; ctl->offset = offset; if (len > 512) { adsp_warn(dsp, "Truncating control %s from %d\n", @@ -1001,7 +1023,8 @@ static int wm_adsp_create_ctl_blk(struct wm_adsp *dsp, static int wm_adsp_create_control(struct wm_adsp *dsp, const struct wm_adsp_alg_region *alg_region, unsigned int offset, unsigned int len, - const char *subname, unsigned int subname_len) + const char *subname, unsigned int subname_len, + unsigned int flags) { unsigned int ctl_len; int block = 0; @@ -1012,8 +1035,9 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, if (ctl_len > 512) ctl_len = 512; - ret = wm_adsp_create_ctl_blk(dsp, alg_region, offset, ctl_len, - subname, subname_len, block); + ret = wm_adsp_create_ctl_blk(dsp, alg_region, offset, + ctl_len, subname, subname_len, + flags, block); if (ret < 0) return ret; @@ -1114,7 +1138,8 @@ static int wm_adsp_parse_coeff(struct wm_adsp *dsp, coeff_blk.offset, coeff_blk.len, coeff_blk.name, - coeff_blk.name_len); + coeff_blk.name_len, + coeff_blk.flags); if (ret < 0) adsp_err(dsp, "Failed to create control: %.*s, %d\n", coeff_blk.name_len, coeff_blk.name, ret); @@ -1527,7 +1552,7 @@ static int wm_adsp1_setup_algs(struct wm_adsp *dsp) len -= be32_to_cpu(adsp1_alg[i].dm); len *= 4; wm_adsp_create_control(dsp, alg_region, 0, - len, NULL, 0); + len, NULL, 0, 0); } else { adsp_warn(dsp, "Missing length info for region DM with ID %x\n", be32_to_cpu(adsp1_alg[i].alg.id)); @@ -1547,7 +1572,7 @@ static int wm_adsp1_setup_algs(struct wm_adsp *dsp) len -= be32_to_cpu(adsp1_alg[i].zm); len *= 4; wm_adsp_create_control(dsp, alg_region, 0, - len, NULL, 0); + len, NULL, 0, 0); } else { adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", be32_to_cpu(adsp1_alg[i].alg.id)); @@ -1637,7 +1662,7 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) len -= be32_to_cpu(adsp2_alg[i].xm); len *= 4; wm_adsp_create_control(dsp, alg_region, 0, - len, NULL, 0); + len, NULL, 0, 0); } else { adsp_warn(dsp, "Missing length info for region XM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); @@ -1657,7 +1682,7 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) len -= be32_to_cpu(adsp2_alg[i].ym); len *= 4; wm_adsp_create_control(dsp, alg_region, 0, - len, NULL, 0); + len, NULL, 0, 0); } else { adsp_warn(dsp, "Missing length info for region YM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); @@ -1677,7 +1702,7 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) len -= be32_to_cpu(adsp2_alg[i].zm); len *= 4; wm_adsp_create_control(dsp, alg_region, 0, - len, NULL, 0); + len, NULL, 0, 0); } else { adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); diff --git a/sound/soc/codecs/wmfw.h b/sound/soc/codecs/wmfw.h index 04690b238b3..7613d60d62e 100644 --- a/sound/soc/codecs/wmfw.h +++ b/sound/soc/codecs/wmfw.h @@ -21,6 +21,11 @@ #define WMFW_MAX_COEFF_NAME 256 #define WMFW_MAX_COEFF_DESCR_NAME 256 +#define WMFW_CTL_FLAG_SYS 0x8000 +#define WMFW_CTL_FLAG_VOLATILE 0x0004 +#define WMFW_CTL_FLAG_WRITEABLE 0x0002 +#define WMFW_CTL_FLAG_READABLE 0x0001 + struct wmfw_header { char magic[4]; __le32 len; From 42778f02ad9eb594e0805551a3428b1a828afc24 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 26 Nov 2014 17:26:20 +0000 Subject: [PATCH 0745/1167] ASoC: wm_adsp: Add support for rev 2 firmware file format Version 2 of the firmware file format includes length fields for the various strings associated with control creation, to reduce file size. However this does increase the parsing complexity slightly. This patch adds support for the revision of the file format. Change-Id: I97da7118c10f3cac692118baea1f8412b5d62f1e Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 140 ++++++++++++++++++++++++++++++++----- 1 file changed, 122 insertions(+), 18 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 9cd3fd6dce2..f6ec4c71d23 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -947,11 +947,34 @@ static int wm_adsp_create_ctl_blk(struct wm_adsp *dsp, region_name = "ZM"; break; default: + adsp_err(dsp, "Unknown region type: %d\n", alg_region->type); return -EINVAL; } - snprintf(name, WM_ADSP_CONTROL_MAX, "DSP%d %s %x:%d", - dsp->num, region_name, alg_region->alg, block); + switch (dsp->fw_ver) { + case 0: + case 1: + snprintf(name, WM_ADSP_CONTROL_MAX, "DSP%d %s %x:%d", + dsp->num, region_name, alg_region->alg, block); + break; + default: + ret = snprintf(name, WM_ADSP_CONTROL_MAX, "DSP%d%c %.10s %x:%d", + dsp->num, *region_name, wm_adsp_fw_text[dsp->fw], + alg_region->alg, block); + + /* Truncate the subname from the start if it is too long */ + if (subname) { + int avail = WM_ADSP_CONTROL_MAX - ret - 2; + int skip = 0; + + if (subname_len > avail) + skip = subname_len - avail; + + snprintf(name + ret, WM_ADSP_CONTROL_MAX - ret, " %.*s", + subname_len - skip, subname + skip); + } + break; + } list_for_each_entry(ctl, &dsp->ctl_list, list) { @@ -1067,18 +1090,74 @@ struct wm_coeff_parsed_coeff { int len; }; +static int wm_coeff_parse_string(int bytes, const u8 **pos, const u8 **str) +{ + int length; + + switch (bytes) { + case 1: + length = **pos; + break; + case 2: + length = le16_to_cpu(*((u16 *)*pos)); + break; + default: + return 0; + } + + if (str) + *str = *pos + bytes; + + *pos += ((length + bytes) + 3) & ~0x03; + + return length; +} + +static int wm_coeff_parse_int(int bytes, const u8 **pos) +{ + int val = 0; + + switch (bytes) { + case 2: + val = le16_to_cpu(*((u16 *)*pos)); + break; + case 4: + val = le32_to_cpu(*((u32 *)*pos)); + break; + default: + break; + } + + *pos += bytes; + + return val; +} + static inline void wm_coeff_parse_alg(struct wm_adsp *dsp, const u8 **data, struct wm_coeff_parsed_alg *blk) { const struct wmfw_adsp_alg_data *raw; - raw = (const struct wmfw_adsp_alg_data *)*data; - *data = raw->data; + switch (dsp->fw_ver) { + case 0: + case 1: + raw = (const struct wmfw_adsp_alg_data *)*data; + *data = raw->data; - blk->id = le32_to_cpu(raw->id); - blk->name = raw->name; - blk->name_len = strlen(raw->name); - blk->ncoeff = le32_to_cpu(raw->ncoeff); + blk->id = le32_to_cpu(raw->id); + blk->name = raw->name; + blk->name_len = strlen(raw->name); + blk->ncoeff = le32_to_cpu(raw->ncoeff); + break; + default: + blk->id = wm_coeff_parse_int(sizeof(raw->id), data); + blk->name_len = wm_coeff_parse_string(sizeof(u8), data, + &blk->name); + /* Discard description we have no use for it in the driver */ + wm_coeff_parse_string(sizeof(u16), data, NULL); + blk->ncoeff = wm_coeff_parse_int(sizeof(raw->ncoeff), data); + break; + } adsp_dbg(dsp, "Algorithm ID: %#x\n", blk->id); adsp_dbg(dsp, "Algorithm name: %.*s\n", blk->name_len, blk->name); @@ -1089,17 +1168,41 @@ static inline void wm_coeff_parse_coeff(struct wm_adsp *dsp, const u8 **data, struct wm_coeff_parsed_coeff *blk) { const struct wmfw_adsp_coeff_data *raw; + const u8 *tmp; + int length; - raw = (const struct wmfw_adsp_coeff_data *)*data; - *data = *data + sizeof(raw->hdr) + le32_to_cpu(raw->hdr.size); - - blk->offset = le16_to_cpu(raw->hdr.offset); - blk->mem_type = le16_to_cpu(raw->hdr.type); - blk->name = raw->name; - blk->name_len = strlen(raw->name); - blk->ctl_type = le16_to_cpu(raw->ctl_type); - blk->flags = le16_to_cpu(raw->flags); - blk->len = le32_to_cpu(raw->len); + switch (dsp->fw_ver) { + case 0: + case 1: + raw = (const struct wmfw_adsp_coeff_data *)*data; + *data = *data + sizeof(raw->hdr) + le32_to_cpu(raw->hdr.size); + + blk->offset = le16_to_cpu(raw->hdr.offset); + blk->mem_type = le16_to_cpu(raw->hdr.type); + blk->name = raw->name; + blk->name_len = strlen(raw->name); + blk->ctl_type = le16_to_cpu(raw->ctl_type); + blk->flags = le16_to_cpu(raw->flags); + blk->len = le32_to_cpu(raw->len); + break; + default: + tmp = *data; + blk->offset = wm_coeff_parse_int(sizeof(raw->hdr.offset), &tmp); + blk->mem_type = wm_coeff_parse_int(sizeof(raw->hdr.type), &tmp); + length = wm_coeff_parse_int(sizeof(raw->hdr.size), &tmp); + blk->name_len = wm_coeff_parse_string(sizeof(u8), &tmp, + &blk->name); + /* Discard extended name we have no use for it in the driver */ + wm_coeff_parse_string(sizeof(u8), &tmp, NULL); + /* Discard description we have no use for it in the driver */ + wm_coeff_parse_string(sizeof(u16), &tmp, NULL); + blk->ctl_type = wm_coeff_parse_int(sizeof(raw->ctl_type), &tmp); + blk->flags = wm_coeff_parse_int(sizeof(raw->flags), &tmp); + blk->len = wm_coeff_parse_int(sizeof(raw->len), &tmp); + + *data = *data + sizeof(raw->hdr) + length; + break; + } adsp_dbg(dsp, "\tCoefficient type: %#x\n", blk->mem_type); adsp_dbg(dsp, "\tCoefficient offset: %#x\n", blk->offset); @@ -1212,6 +1315,7 @@ static int wm_adsp_load(struct wm_adsp *dsp) switch (header->ver) { case 0: case 1: + case 2: break; default: adsp_err(dsp, "%s: unknown file format %d\n", From f42ed3e2c0224abff25375ba386987fa5655801e Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 10 Apr 2015 15:32:23 +0100 Subject: [PATCH 0746/1167] ASoC: wm_adsp: Warn that firmware file format 0 is depreciated There are very few version 0 firmwares in the wild and we would like to remove support for it from the driver. Add a warning if someone is using this file format. Change-Id: Ic176ee3592bf2c47130ec07246d1a9724c30667a Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index f6ec4c71d23..285b63e7a4a 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1314,6 +1314,9 @@ static int wm_adsp_load(struct wm_adsp *dsp) switch (header->ver) { case 0: + adsp_warn(dsp, "%s: Depreciated file format %d\n", + file, header->ver); + break; case 1: case 2: break; From fb5690a1668b2f2d7e4c46a98341e5c9eb8eb2ef Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Thu, 2 Apr 2015 14:58:33 +0100 Subject: [PATCH 0747/1167] mfd: marley: Initial Marley mfd driver commit Change-Id: Ie7ebe4e6fb53d9e7891e3145921062d3a8e2ede2 Signed-off-by: Piotr Stankiewicz --- drivers/mfd/Kconfig | 6 + drivers/mfd/Makefile | 3 + drivers/mfd/arizona-core.c | 36 +- drivers/mfd/arizona-i2c.c | 7 + drivers/mfd/arizona-irq.c | 11 +- drivers/mfd/arizona-spi.c | 7 + drivers/mfd/arizona.h | 7 + drivers/mfd/marley-tables.c | 1870 +++++++++++++++++++++++++ include/linux/mfd/arizona/core.h | 2 + include/linux/mfd/arizona/registers.h | 25 + 10 files changed, 1972 insertions(+), 2 deletions(-) create mode 100644 drivers/mfd/marley-tables.c diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 9a9a976b3dc..aea30211b93 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1075,6 +1075,12 @@ config MFD_LARGO help Support for Cirrus Logic Largo low power audio SoC +config MFD_MARLEY + bool "Cirrus Logic Marley" + depends on MFD_ARIZONA + help + Support for Cirrus Logic Marley low power audio SoC + config MFD_WM8400 bool "Wolfson Microelectronics WM8400" select MFD_CORE diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index c1435186b6f..fbd35c4c238 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -52,6 +52,9 @@ endif ifneq ($(CONFIG_MFD_CLEARWATER),n) obj-$(CONFIG_MFD_ARIZONA) += clearwater-tables.o endif +ifneq ($(CONFIG_MFD_MARLEY),n) +obj-$(CONFIG_MFD_ARIZONA) += marley-tables.o +endif ifneq ($(CONFIG_MFD_LARGO),n) obj-$(CONFIG_MFD_ARIZONA) += largo-tables.o endif diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 6490a96f5ac..df554595833 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1303,6 +1303,7 @@ const struct of_device_id arizona_of_match[] = { { .compatible = "wlf,wm1840", .data = (void *)WM1840 }, { .compatible = "wlf,wm1831", .data = (void *)WM1831 }, { .compatible = "cirrus,cs47l24", .data = (void *)CS47L24 }, + { .compatible = "cirrus,cs47l35", .data = (void *)CS47L35 }, {}, }; EXPORT_SYMBOL_GPL(arizona_of_match); @@ -1369,6 +1370,15 @@ static struct mfd_cell clearwater_devs[] = { { .name = "clearwater-codec" }, }; +static struct mfd_cell marley_devs[] = { + { .name = "arizona-micsupp" }, + { .name = "arizona-extcon" }, + { .name = "arizona-gpio" }, + { .name = "arizona-haptics" }, + { .name = "arizona-pwm" }, + { .name = "marley-codec" }, +}; + static const struct { unsigned int enable; unsigned int conf_reg; @@ -1534,6 +1544,7 @@ int arizona_dev_init(struct arizona *arizona) case WM1840: case WM1831: case CS47L24: + case CS47L35: for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) arizona->core_supplies[i].supply = wm5102_core_supplies[i]; @@ -1556,6 +1567,7 @@ int arizona_dev_init(struct arizona *arizona) switch (arizona->type) { case WM1831: case CS47L24: + case CS47L35: break; default: ret = mfd_add_devices(arizona->dev, -1, early_devs, @@ -1654,6 +1666,7 @@ int arizona_dev_init(struct arizona *arizona) case 0x6363: case 0x8997: case 0x6338: + case 0x6360: break; default: dev_err(arizona->dev, "Unknown device ID: %x\n", reg); @@ -1833,7 +1846,24 @@ int arizona_dev_init(struct arizona *arizona) apply_patch = clearwater_patch; break; #endif - default: +#ifdef CONFIG_MFD_MARLEY + case 0x6360: + switch (arizona->type) { + case CS47L35: + type_name = "CS47L35"; + break; + + default: + dev_err(arizona->dev, + "Unknown Marley codec registered as CS47L35\n"); + arizona->type = CS47L35; + } + + revision_char = arizona->rev + 'A'; + apply_patch = marley_patch; + break; +#endif +default: dev_err(arizona->dev, "Unknown device ID %x\n", reg); goto err_reset; } @@ -2121,6 +2151,10 @@ int arizona_dev_init(struct arizona *arizona) ret = mfd_add_devices(arizona->dev, -1, clearwater_devs, ARRAY_SIZE(clearwater_devs), NULL, 0, NULL); break; + case CS47L35: + ret = mfd_add_devices(arizona->dev, -1, marley_devs, + ARRAY_SIZE(marley_devs), NULL, 0, NULL); + break; } if (ret != 0) { diff --git a/drivers/mfd/arizona-i2c.c b/drivers/mfd/arizona-i2c.c index 0ac4cbda855..393696ab646 100644 --- a/drivers/mfd/arizona-i2c.c +++ b/drivers/mfd/arizona-i2c.c @@ -65,6 +65,12 @@ static int arizona_i2c_probe(struct i2c_client *i2c, regmap_config = &clearwater_16bit_i2c_regmap; regmap_32bit_config = &clearwater_32bit_i2c_regmap; break; +#endif +#ifdef CONFIG_MFD_MARLEY + case CS47L35: + regmap_config = &marley_16bit_i2c_regmap; + regmap_32bit_config = &marley_32bit_i2c_regmap; + break; #endif default: dev_err(&i2c->dev, "Unknown device type %ld\n", @@ -120,6 +126,7 @@ static const struct i2c_device_id arizona_i2c_id[] = { { "wm1814", WM1814 }, { "wm8285", WM8285 }, { "wm1840", WM1840 }, + { "cs47l35", CS47L35 }, { } }; MODULE_DEVICE_TABLE(i2c, arizona_i2c_id); diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index 89f6f65c43f..54af8befd00 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -272,7 +272,16 @@ int arizona_irq_init(struct arizona *arizona) ctrlif_error = false; break; #endif - default: +#ifdef CONFIG_MFD_MARLEY + case CS47L35: + aod = &marley_irq; + irq = NULL; + + ctrlif_error = false; + irq_ctrl_reg = CLEARWATER_IRQ1_CTRL; + break; +#endif +default: BUG_ON("Unknown Arizona class device" == NULL); return -EINVAL; } diff --git a/drivers/mfd/arizona-spi.c b/drivers/mfd/arizona-spi.c index 524a1582e7c..a70e3455882 100644 --- a/drivers/mfd/arizona-spi.c +++ b/drivers/mfd/arizona-spi.c @@ -61,6 +61,12 @@ static int arizona_spi_probe(struct spi_device *spi) case CS47L24: regmap_config = &largo_spi_regmap; break; +#endif +#ifdef CONFIG_MFD_MARLEY + case CS47L35: + regmap_config = &marley_16bit_spi_regmap; + regmap_32bit_config = &marley_32bit_spi_regmap; + break; #endif default: dev_err(&spi->dev, "Unknown device type %ld\n", @@ -115,6 +121,7 @@ static const struct spi_device_id arizona_spi_ids[] = { { "wm1840", WM1840 }, { "wm1831", WM1831 }, { "cs47l24", CS47L24 }, + { "cs47l35", CS47L35 }, { }, }; MODULE_DEVICE_TABLE(spi, arizona_spi_ids); diff --git a/drivers/mfd/arizona.h b/drivers/mfd/arizona.h index cae07559b2d..76b6bb68184 100644 --- a/drivers/mfd/arizona.h +++ b/drivers/mfd/arizona.h @@ -31,6 +31,11 @@ extern const struct regmap_config clearwater_16bit_spi_regmap; extern const struct regmap_config clearwater_32bit_spi_regmap; extern const struct regmap_config clearwater_32bit_i2c_regmap; +extern const struct regmap_config marley_16bit_i2c_regmap; +extern const struct regmap_config marley_16bit_spi_regmap; +extern const struct regmap_config marley_32bit_spi_regmap; +extern const struct regmap_config marley_32bit_i2c_regmap; + extern const struct regmap_config wm8997_i2c_regmap; extern const struct regmap_config vegas_i2c_regmap; @@ -58,6 +63,8 @@ extern struct regmap_irq_chip vegas_irq; extern const struct regmap_irq_chip largo_irq; +extern const struct regmap_irq_chip marley_irq; + int arizona_dev_init(struct arizona *arizona); int arizona_dev_exit(struct arizona *arizona); int arizona_irq_init(struct arizona *arizona); diff --git a/drivers/mfd/marley-tables.c b/drivers/mfd/marley-tables.c new file mode 100644 index 00000000000..e01a72b69f8 --- /dev/null +++ b/drivers/mfd/marley-tables.c @@ -0,0 +1,1870 @@ +/* + * marley-tables.c -- data tables for Marley class codecs + * + * Copyright 2015 Cirrus Logic + * + * Author: Piotr Stankiewicz + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include + +#include +#include +#include + +#include "arizona.h" + +static const struct reg_default marley_16_micbias_patch[] = { + { 0x21c, 0x23 }, + { 0x21e, 0x23 }, +}; + +/* We use a function so we can use ARRAY_SIZE() */ +int marley_patch(struct arizona *arizona) +{ + int ret = 0; + const struct reg_default *patch16 = marley_16_micbias_patch; + unsigned int num16 = ARRAY_SIZE(marley_16_micbias_patch); + + ret = regmap_register_patch(arizona->regmap, patch16, num16); + if (ret < 0) { + dev_err(arizona->dev, + "Error in applying 16-bit patch: %d\n", ret); + } + + return ret; +} +EXPORT_SYMBOL_GPL(marley_patch); + +static const struct regmap_irq marley_irqs[ARIZONA_NUM_IRQ] = { + [ARIZONA_IRQ_BOOT_DONE] = { .reg_offset = 0, + .mask = CLEARWATER_BOOT_DONE_EINT1 }, + [ARIZONA_IRQ_CTRLIF_ERR] = { .reg_offset = 0, + .mask = CLEARWATER_CTRLIF_ERR_EINT1 }, + + [ARIZONA_IRQ_FLL1_CLOCK_OK] = { .reg_offset = 1, + .mask = CLEARWATER_FLL1_LOCK_EINT1 }, + + [ARIZONA_IRQ_MICDET] = { .reg_offset = 5, + .mask = CLEARWATER_MICDET_EINT1 }, + [ARIZONA_IRQ_HPDET] = { .reg_offset = 5, + .mask = CLEARWATER_HPDET_EINT1}, + + [ARIZONA_IRQ_MICD_CLAMP_RISE] = { .reg_offset = 6, + .mask = CLEARWATER_MICD_CLAMP_RISE_EINT1 }, + [ARIZONA_IRQ_MICD_CLAMP_FALL] = { .reg_offset = 6, + .mask = CLEARWATER_MICD_CLAMP_FALL_EINT1 }, + [ARIZONA_IRQ_JD_FALL] = { .reg_offset = 6, + .mask = CLEARWATER_JD1_FALL_EINT1 }, + [ARIZONA_IRQ_JD_RISE] = { .reg_offset = 6, + .mask = CLEARWATER_JD1_RISE_EINT1 }, + + [ARIZONA_IRQ_DRC2_SIG_DET] = { .reg_offset = 8, + .mask = CLEARWATER_DRC2_SIG_DET_EINT1 }, + [ARIZONA_IRQ_DRC1_SIG_DET] = { .reg_offset = 8, + .mask = CLEARWATER_DRC1_SIG_DET_EINT1 }, + + [ARIZONA_IRQ_DSP_IRQ1] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ1_EINT1}, + [ARIZONA_IRQ_DSP_IRQ2] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ2_EINT1}, + [ARIZONA_IRQ_DSP_IRQ3] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ3_EINT1}, + [ARIZONA_IRQ_DSP_IRQ4] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ4_EINT1}, + [ARIZONA_IRQ_DSP_IRQ5] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ5_EINT1}, + [ARIZONA_IRQ_DSP_IRQ6] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ6_EINT1}, + [ARIZONA_IRQ_DSP_IRQ7] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ7_EINT1}, + [ARIZONA_IRQ_DSP_IRQ8] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ8_EINT1}, + + [ARIZONA_IRQ_SPK_OVERHEAT_WARN] = { .reg_offset = 14, + .mask = CLEARWATER_SPK_OVERHEAT_WARN_EINT1}, + [ARIZONA_IRQ_SPK_OVERHEAT] = { .reg_offset = 14, + .mask = CLEARWATER_SPK_SHUTDOWN_EINT1}, +}; + +const struct regmap_irq_chip marley_irq = { + .name = "marley IRQ", + .status_base = CLEARWATER_IRQ1_STATUS_1, + .mask_base = CLEARWATER_IRQ1_MASK_1, + .ack_base = CLEARWATER_IRQ1_STATUS_1, + .num_regs = 15, + .irqs = marley_irqs, + .num_irqs = ARRAY_SIZE(marley_irqs), +}; +EXPORT_SYMBOL_GPL(marley_irq); + +static const struct reg_default marley_reg_default[] = { + { 0x00000008, 0x0308 }, /* R8 (0x8) - Ctrl IF CFG 1 */ + { 0x00000009, 0x0200 }, /* R9 (0x9) - Ctrl IF CFG 2 */ + { 0x00000016, 0x0000 }, /* R22 (0x16) - Write Sequencer Ctrl 0 */ + { 0x00000017, 0x0000 }, /* R23 (0x17) - Write Sequencer Ctrl 1 */ + { 0x00000018, 0x0000 }, /* R24 (0x18) - Write Sequencer Ctrl 2 */ + { 0x0000001a, 0x0000 }, /* R26 (0x1A) - Write Sequencer PROM */ + { 0x00000020, 0x0000 }, /* R32 (0x20) - Tone Generator 1 */ + { 0x00000021, 0x1000 }, /* R33 (0x21) - Tone Generator 2 */ + { 0x00000022, 0x0000 }, /* R34 (0x22) - Tone Generator 3 */ + { 0x00000023, 0x1000 }, /* R35 (0x23) - Tone Generator 4 */ + { 0x00000024, 0x0000 }, /* R36 (0x24) - Tone Generator 5 */ + { 0x00000030, 0x0000 }, /* R48 (0x30) - PWM Drive 1 */ + { 0x00000031, 0x0100 }, /* R49 (0x31) - PWM Drive 2 */ + { 0x00000032, 0x0100 }, /* R50 (0x32) - PWM Drive 3 */ + { 0x00000041, 0x0000 }, /* R65 (0x41) - Sequence control */ + { 0x00000061, 0x01ff }, /* R97 (0x61) - Sample Rate Sequence Select 1 */ + { 0x00000062, 0x01ff }, /* R98 (0x62) - Sample Rate Sequence Select 2 */ + { 0x00000063, 0x01ff }, /* R99 (0x63) - Sample Rate Sequence Select 3 */ + { 0x00000064, 0x01ff }, /* R100 (0x64) - Sample Rate Sequence Select 4*/ + { 0x00000066, 0x01ff }, /* R102 (0x66) - Always On Triggers Sequence + Select 1*/ + { 0x00000067, 0x01ff }, /* R103 (0x67) - Always On Triggers Sequence + Select 2*/ + { 0x00000090, 0x0000 }, /* R144 (0x90) - Haptics Control 1 */ + { 0x00000091, 0x7fff }, /* R145 (0x91) - Haptics Control 2 */ + { 0x00000092, 0x0000 }, /* R146 (0x92) - Haptics phase 1 intensity */ + { 0x00000093, 0x0000 }, /* R147 (0x93) - Haptics phase 1 duration */ + { 0x00000094, 0x0000 }, /* R148 (0x94) - Haptics phase 2 intensity */ + { 0x00000095, 0x0000 }, /* R149 (0x95) - Haptics phase 2 duration */ + { 0x00000096, 0x0000 }, /* R150 (0x96) - Haptics phase 3 intensity */ + { 0x00000097, 0x0000 }, /* R151 (0x97) - Haptics phase 3 duration */ + { 0x000000A0, 0x0000 }, /* R160 (0xA0) - Comfort Noise Generator */ + { 0x00000100, 0x0002 }, /* R256 (0x100) - Clock 32k 1 */ + { 0x00000101, 0x0404 }, /* R257 (0x101) - System Clock 1 */ + { 0x00000102, 0x0011 }, /* R258 (0x102) - Sample rate 1 */ + { 0x00000103, 0x0011 }, /* R259 (0x103) - Sample rate 2 */ + { 0x00000104, 0x0011 }, /* R260 (0x104) - Sample rate 3 */ + { 0x00000120, 0x0305 }, /* R288 (0x120) - DSP Clock 1 */ + { 0x00000122, 0x0000 }, /* R290 (0x122) - DSP Clock 2 */ + { 0x00000149, 0x0000 }, /* R329 (0x149) - Output system clock */ + { 0x0000014a, 0x0000 }, /* R330 (0x14A) - Output async clock */ + { 0x00000152, 0x0000 }, /* R338 (0x152) - Rate Estimator 1 */ + { 0x00000153, 0x0000 }, /* R339 (0x153) - Rate Estimator 2 */ + { 0x00000154, 0x0000 }, /* R340 (0x154) - Rate Estimator 3 */ + { 0x00000155, 0x0000 }, /* R341 (0x155) - Rate Estimator 4 */ + { 0x00000156, 0x0000 }, /* R342 (0x156) - Rate Estimator 5 */ + { 0x00000171, 0x0002 }, /* R369 (0x171) - FLL1 Control 1 */ + { 0x00000172, 0x0008 }, /* R370 (0x172) - FLL1 Control 2 */ + { 0x00000173, 0x0018 }, /* R371 (0x173) - FLL1 Control 3 */ + { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */ + { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */ + { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */ + { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */ + { 0x00000178, 0x0000 }, /* R376 (0x178) - FLL1 NCO Test 0 */ + { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */ + { 0x0000017f, 0x0000 }, /* R383 (0x17f) - FLL1 Synchroniser 1 */ + { 0x00000180, 0x0000 }, /* R384 (0x180) - FLL1 Synchroniser 2 */ + { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 3 */ + { 0x00000182, 0x0000 }, /* R386 (0x182) - FLL1 Synchroniser 4 */ + { 0x00000183, 0x0000 }, /* R387 (0x183) - FLL1 Synchroniser 5 */ + { 0x00000184, 0x0000 }, /* R388 (0x184) - FLL1 Synchroniser 6 */ + { 0x00000185, 0x0001 }, /* R389 (0x185) - FLL1 Synchroniser 7 */ + { 0x00000187, 0x0000 }, /* R391 (0x187) - FLL1 Spread Spectrum */ + { 0x00000188, 0x000c }, /* R392 (0x188) - FLL1 GPIO Clock */ + { 0x00000200, 0x0006 }, /* R512 (0x200) - Mic Charge Pump 1 */ + { 0x00000213, 0x03e4 }, /* R531 (0x213) - LDO2 Control 1 */ + { 0x00000218, 0x00e6 }, /* R536 (0x218) - Mic Bias Ctrl 1 */ + { 0x00000219, 0x00e6 }, /* R537 (0x219) - Mic Bias Ctrl 2 */ + { 0x0000021c, 0x0023 }, /* R540 (0x21c) - Mic Bias Ctrl 5 */ + { 0x0000021d, 0x0023 }, /* R541 (0x21d) - Mic Bias Ctrl 6 */ + { 0x0000027e, 0x0000 }, /* R638 (0x27E) - EDRE HP stereo control */ + { 0x00000293, 0x0080 }, /* R659 (0x293) - Accessory Detect Mode 1 */ + { 0x0000029b, 0x0000 }, /* R667 (0x29B) - Headphone Detect 1 */ + { 0x000002a3, 0x1102 }, /* R675 (0x2A3) - Mic Detect 1 */ + { 0x000002a4, 0x009f }, /* R676 (0x2A4) - Mic Detect 2 */ + { 0x000002a6, 0x3d3d }, /* R678 (0x2a6) - Mic Detect Level 1 */ + { 0x000002a7, 0x3d3d }, /* R679 (0x2a7) - Mic Detect Level 2 */ + { 0x000002a8, 0x333d }, /* R680 (0x2a8) - Mic Detect Level 3 */ + { 0x000002a9, 0x202d }, /* R681 (0x2a9) - Mic Detect Level 4 */ + { 0x000002c3, 0x0000 }, /* R707 (0x2c3) - Mic noise mix control 1 */ + { 0x000002c6, 0x0010 }, /* R710 (0x2c5) - Mic Clamp control */ + { 0x000002c8, 0x0000 }, /* R712 (0x2C8) - GP switch 1 */ + { 0x000002d3, 0x0000 }, /* R723 (0x2D3) - Jack detect analogue */ + { 0x00000308, 0x0000 }, /* R776 (0x308) - Input Rate */ + { 0x00000309, 0x0022 }, /* R777 (0x309) - Input Volume Ramp */ + { 0x0000030c, 0x0002 }, /* R780 (0x30C) - HPF Control */ + { 0x00000310, 0x0080 }, /* R784 (0x310) - IN1L Control */ + { 0x00000311, 0x0180 }, /* R785 (0x311) - ADC Digital Volume 1L */ + { 0x00000312, 0x0500 }, /* R786 (0x312) - DMIC1L Control */ + { 0x00000314, 0x0080 }, /* R788 (0x314) - IN1R Control */ + { 0x00000315, 0x0180 }, /* R789 (0x315) - ADC Digital Volume 1R */ + { 0x00000316, 0x0000 }, /* R790 (0x316) - DMIC1R Control */ + { 0x00000318, 0x0080 }, /* R792 (0x318) - IN2L Control */ + { 0x00000319, 0x0180 }, /* R793 (0x319) - ADC Digital Volume 2L */ + { 0x0000031a, 0x0500 }, /* R794 (0x31A) - DMIC2L Control */ + { 0x0000031c, 0x0080 }, /* R796 (0x31C) - IN2R Control */ + { 0x0000031d, 0x0180 }, /* R797 (0x31D) - ADC Digital Volume 2R */ + { 0x0000031e, 0x0000 }, /* R798 (0x31E) - DMIC2R Control */ + { 0x00000400, 0x0000 }, /* R1024 (0x400) - Output Enables 1 */ + { 0x00000408, 0x0000 }, /* R1032 (0x408) - Output Rate 1 */ + { 0x00000409, 0x0022 }, /* R1033 (0x409) - Output Volume Ramp */ + { 0x00000410, 0x0080 }, /* R1040 (0x410) - Output Path Config 1L */ + { 0x00000411, 0x0180 }, /* R1041 (0x411) - DAC Digital Volume 1L */ + { 0x00000413, 0x0001 }, /* R1043 (0x413) - Noise Gate Select 1L */ + { 0x00000414, 0x0080 }, /* R1044 (0x414) - Output Path Config 1R */ + { 0x00000415, 0x0180 }, /* R1045 (0x415) - DAC Digital Volume 1R */ + { 0x00000417, 0x0002 }, /* R1047 (0x417) - Noise Gate Select 1R */ + { 0x00000428, 0x0000 }, /* R1064 (0x428) - Output Path Config 4L */ + { 0x00000429, 0x0180 }, /* R1065 (0x429) - DAC Digital Volume 4L */ + { 0x0000042b, 0x0040 }, /* R1067 (0x42B) - Noise Gate Select 4L */ + { 0x00000430, 0x0000 }, /* R1072 (0x430) - Output Path Config 5L */ + { 0x00000431, 0x0180 }, /* R1073 (0x431) - DAC Digital Volume 5L */ + { 0x00000433, 0x0100 }, /* R1075 (0x433) - Noise Gate Select 5L */ + { 0x00000434, 0x0000 }, /* R1076 (0x434) - Output Path Config 5R */ + { 0x00000435, 0x0180 }, /* R1077 (0x435) - DAC Digital Volume 5R */ + { 0x00000437, 0x0200 }, /* R1079 (0x437) - Noise Gate Select 5R */ + { 0x00000440, 0x0003 }, /* R1088 (0x440) - DRE Enable */ + { 0x00000441, 0xC050 }, /* R1089 (0x441) - DRE Control 1 */ + { 0x00000442, 0x0305 }, /* R1090 (0x442) - DRE Control 2 */ + { 0x00000443, 0x5cfa }, /* R1091 (0x443) - DRE Control 3 */ + { 0x00000448, 0x0a83 }, /* R1096 (0x448) - eDRE Enable */ + { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */ + { 0x00000451, 0x0000 }, /* R1105 (0x451) - DAC AEC Control 2*/ + { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */ + { 0x00000490, 0x0069 }, /* R1168 (0x490) - PDM SPK1 CTRL 1 */ + { 0x00000491, 0x0000 }, /* R1169 (0x491) - PDM SPK1 CTRL 2 */ + { 0x000004a0, 0x3080 }, /* R1184 (0x4a0) - HP1 Short Circuit Ctrl */ + { 0x000004a8, 0x7120 }, /* R1192 (0x4a8) - HP Test Ctrl 5 */ + { 0x000004a9, 0x7120 }, /* R1193 (0x4a9) - HP Test Ctrl 6 */ + { 0x000004b6, 0x0080 }, /* R1206 (0x4b6) - SPK IF Control 9*/ + { 0x00000500, 0x000c }, /* R1280 (0x500) - AIF1 BCLK Ctrl */ + { 0x00000501, 0x0000 }, /* R1281 (0x501) - AIF1 Tx Pin Ctrl */ + { 0x00000502, 0x0000 }, /* R1282 (0x502) - AIF1 Rx Pin Ctrl */ + { 0x00000503, 0x0000 }, /* R1283 (0x503) - AIF1 Rate Ctrl */ + { 0x00000504, 0x0000 }, /* R1284 (0x504) - AIF1 Format */ + { 0x00000505, 0x0040 }, /* R1285 (0x505) - AIF1 Tx BCLK Rate */ + { 0x00000506, 0x0040 }, /* R1286 (0x506) - AIF1 Rx BCLK Rate */ + { 0x00000507, 0x1818 }, /* R1287 (0x507) - AIF1 Frame Ctrl 1 */ + { 0x00000508, 0x1818 }, /* R1288 (0x508) - AIF1 Frame Ctrl 2 */ + { 0x00000509, 0x0000 }, /* R1289 (0x509) - AIF1 Frame Ctrl 3 */ + { 0x0000050a, 0x0001 }, /* R1290 (0x50A) - AIF1 Frame Ctrl 4 */ + { 0x0000050b, 0x0002 }, /* R1291 (0x50B) - AIF1 Frame Ctrl 5 */ + { 0x0000050c, 0x0003 }, /* R1292 (0x50C) - AIF1 Frame Ctrl 6 */ + { 0x0000050d, 0x0004 }, /* R1293 (0x50D) - AIF1 Frame Ctrl 7 */ + { 0x0000050e, 0x0005 }, /* R1294 (0x50E) - AIF1 Frame Ctrl 8 */ + { 0x00000511, 0x0000 }, /* R1297 (0x511) - AIF1 Frame Ctrl 11 */ + { 0x00000512, 0x0001 }, /* R1298 (0x512) - AIF1 Frame Ctrl 12 */ + { 0x00000513, 0x0002 }, /* R1299 (0x513) - AIF1 Frame Ctrl 13 */ + { 0x00000514, 0x0003 }, /* R1300 (0x514) - AIF1 Frame Ctrl 14 */ + { 0x00000515, 0x0004 }, /* R1301 (0x515) - AIF1 Frame Ctrl 15 */ + { 0x00000516, 0x0005 }, /* R1302 (0x516) - AIF1 Frame Ctrl 16 */ + { 0x00000519, 0x0000 }, /* R1305 (0x519) - AIF1 Tx Enables */ + { 0x0000051a, 0x0000 }, /* R1306 (0x51A) - AIF1 Rx Enables */ + { 0x0000051b, 0x0000 }, /* R1307 (0x51B) - AIF1 Force Write */ + { 0x00000540, 0x000c }, /* R1344 (0x540) - AIF2 BCLK Ctrl */ + { 0x00000541, 0x0000 }, /* R1345 (0x541) - AIF2 Tx Pin Ctrl */ + { 0x00000542, 0x0000 }, /* R1346 (0x542) - AIF2 Rx Pin Ctrl */ + { 0x00000543, 0x0000 }, /* R1347 (0x543) - AIF2 Rate Ctrl */ + { 0x00000544, 0x0000 }, /* R1348 (0x544) - AIF2 Format */ + { 0x00000545, 0x0040 }, /* R1349 (0x545) - AIF2 Tx BCLK Rate */ + { 0x00000546, 0x0040 }, /* R1350 (0x546) - AIF2 Rx BCLK Rate */ + { 0x00000547, 0x1818 }, /* R1351 (0x547) - AIF2 Frame Ctrl 1 */ + { 0x00000548, 0x1818 }, /* R1352 (0x548) - AIF2 Frame Ctrl 2 */ + { 0x00000549, 0x0000 }, /* R1353 (0x549) - AIF2 Frame Ctrl 3 */ + { 0x0000054a, 0x0001 }, /* R1354 (0x54A) - AIF2 Frame Ctrl 4 */ + { 0x00000551, 0x0000 }, /* R1361 (0x551) - AIF2 Frame Ctrl 11 */ + { 0x00000552, 0x0001 }, /* R1362 (0x552) - AIF2 Frame Ctrl 12 */ + { 0x00000559, 0x0000 }, /* R1369 (0x559) - AIF2 Tx Enables */ + { 0x0000055a, 0x0000 }, /* R1370 (0x55A) - AIF2 Rx Enables */ + { 0x0000055b, 0x0000 }, /* R1371 (0x55B) - AIF2 Force Write */ + { 0x00000580, 0x000c }, /* R1408 (0x580) - AIF3 BCLK Ctrl */ + { 0x00000581, 0x0000 }, /* R1409 (0x581) - AIF3 Tx Pin Ctrl */ + { 0x00000582, 0x0000 }, /* R1410 (0x582) - AIF3 Rx Pin Ctrl */ + { 0x00000583, 0x0000 }, /* R1411 (0x583) - AIF3 Rate Ctrl */ + { 0x00000584, 0x0000 }, /* R1412 (0x584) - AIF3 Format */ + { 0x00000585, 0x0040 }, /* R1413 (0x585) - AIF3 Tx BCLK Rate */ + { 0x00000586, 0x0040 }, /* R1414 (0x586) - AIF3 Rx BCLK Rate */ + { 0x00000587, 0x1818 }, /* R1415 (0x587) - AIF3 Frame Ctrl 1 */ + { 0x00000588, 0x1818 }, /* R1416 (0x588) - AIF3 Frame Ctrl 2 */ + { 0x00000589, 0x0000 }, /* R1417 (0x589) - AIF3 Frame Ctrl 3 */ + { 0x0000058a, 0x0001 }, /* R1418 (0x58A) - AIF3 Frame Ctrl 4 */ + { 0x00000591, 0x0000 }, /* R1425 (0x591) - AIF3 Frame Ctrl 11 */ + { 0x00000592, 0x0001 }, /* R1426 (0x592) - AIF3 Frame Ctrl 12 */ + { 0x00000599, 0x0000 }, /* R1433 (0x599) - AIF3 Tx Enables */ + { 0x0000059a, 0x0000 }, /* R1434 (0x59A) - AIF3 Rx Enables */ + { 0x0000059b, 0x0000 }, /* R1435 (0x59B) - AIF3 Force Write */ + { 0x000005c2, 0x0000 }, /* R1474 (0x5c2) - SPD1 TX Control */ + { 0x000005e3, 0x0000 }, /* R1507 (0x5E3) - SLIMbus Framer Ref Gear */ + { 0x000005e5, 0x0000 }, /* R1509 (0x5E5) - SLIMbus Rates 1 */ + { 0x000005e6, 0x0000 }, /* R1510 (0x5E6) - SLIMbus Rates 2 */ + { 0x000005e7, 0x0000 }, /* R1511 (0x5E7) - SLIMbus Rates 3 */ + { 0x000005e9, 0x0000 }, /* R1513 (0x5E9) - SLIMbus Rates 5 */ + { 0x000005ea, 0x0000 }, /* R1514 (0x5EA) - SLIMbus Rates 6 */ + { 0x000005eb, 0x0000 }, /* R1515 (0x5EB) - SLIMbus Rates 7 */ + { 0x000005f5, 0x0000 }, /* R1525 (0x5F5) - SLIMbus RX Channel Enable */ + { 0x000005f6, 0x0000 }, /* R1526 (0x5F6) - SLIMbus TX Channel Enable */ + { 0x00000640, 0x0000 }, /* R1600 (0x640) - PWM1MIX Input 1 Source */ + { 0x00000641, 0x0080 }, /* R1601 (0x641) - PWM1MIX Input 1 Volume */ + { 0x00000642, 0x0000 }, /* R1602 (0x642) - PWM1MIX Input 2 Source */ + { 0x00000643, 0x0080 }, /* R1603 (0x643) - PWM1MIX Input 2 Volume */ + { 0x00000644, 0x0000 }, /* R1604 (0x644) - PWM1MIX Input 3 Source */ + { 0x00000645, 0x0080 }, /* R1605 (0x645) - PWM1MIX Input 3 Volume */ + { 0x00000646, 0x0000 }, /* R1606 (0x646) - PWM1MIX Input 4 Source */ + { 0x00000647, 0x0080 }, /* R1607 (0x647) - PWM1MIX Input 4 Volume */ + { 0x00000648, 0x0000 }, /* R1608 (0x648) - PWM2MIX Input 1 Source */ + { 0x00000649, 0x0080 }, /* R1609 (0x649) - PWM2MIX Input 1 Volume */ + { 0x0000064a, 0x0000 }, /* R1610 (0x64a) - PWM2MIX Input 2 Source */ + { 0x0000064b, 0x0080 }, /* R1611 (0x64b) - PWM2MIX Input 2 Volume */ + { 0x0000064c, 0x0000 }, /* R1612 (0x64c) - PWM2MIX Input 3 Source */ + { 0x0000064d, 0x0080 }, /* R1613 (0x64d) - PWM2MIX Input 3 Volume */ + { 0x0000064e, 0x0000 }, /* R1614 (0x64e) - PWM2MIX Input 4 Source */ + { 0x0000064f, 0x0080 }, /* R1615 (0x64f) - PWM2MIX Input 4 Volume */ + { 0x00000680, 0x0000 }, /* R1664 (0x680) - OUT1LMIX Input 1 Source */ + { 0x00000681, 0x0080 }, /* R1665 (0x681) - OUT1LMIX Input 1 Volume */ + { 0x00000682, 0x0000 }, /* R1666 (0x682) - OUT1LMIX Input 2 Source */ + { 0x00000683, 0x0080 }, /* R1667 (0x683) - OUT1LMIX Input 2 Volume */ + { 0x00000684, 0x0000 }, /* R1668 (0x684) - OUT1LMIX Input 3 Source */ + { 0x00000685, 0x0080 }, /* R1669 (0x685) - OUT1LMIX Input 3 Volume */ + { 0x00000686, 0x0000 }, /* R1670 (0x686) - OUT1LMIX Input 4 Source */ + { 0x00000687, 0x0080 }, /* R1671 (0x687) - OUT1LMIX Input 4 Volume */ + { 0x00000688, 0x0000 }, /* R1672 (0x688) - OUT1RMIX Input 1 Source */ + { 0x00000689, 0x0080 }, /* R1673 (0x689) - OUT1RMIX Input 1 Volume */ + { 0x0000068a, 0x0000 }, /* R1674 (0x68a) - OUT1RMIX Input 2 Source */ + { 0x0000068b, 0x0080 }, /* R1675 (0x68b) - OUT1RMIX Input 2 Volume */ + { 0x0000068c, 0x0000 }, /* R1672 (0x68c) - OUT1RMIX Input 3 Source */ + { 0x0000068d, 0x0080 }, /* R1673 (0x68d) - OUT1RMIX Input 3 Volume */ + { 0x0000068e, 0x0000 }, /* R1674 (0x68e) - OUT1RMIX Input 4 Source */ + { 0x0000068f, 0x0080 }, /* R1675 (0x68f) - OUT1RMIX Input 4 Volume */ + { 0x000006b0, 0x0000 }, /* R1712 (0x6b0) - OUT4LMIX Input 1 Source */ + { 0x000006b1, 0x0080 }, /* R1713 (0x6b1) - OUT4LMIX Input 1 Volume */ + { 0x000006b2, 0x0000 }, /* R1714 (0x6b2) - OUT4LMIX Input 2 Source */ + { 0x000006b3, 0x0080 }, /* R1715 (0x6b3) - OUT4LMIX Input 2 Volume */ + { 0x000006b4, 0x0000 }, /* R1716 (0x6b4) - OUT4LMIX Input 3 Source */ + { 0x000006b5, 0x0080 }, /* R1717 (0x6b5) - OUT4LMIX Input 3 Volume */ + { 0x000006b6, 0x0000 }, /* R1718 (0x6b6) - OUT4LMIX Input 4 Source */ + { 0x000006b7, 0x0080 }, /* R1719 (0x6b7) - OUT4LMIX Input 4 Volume */ + { 0x000006c0, 0x0000 }, /* R1728 (0x6c0) - OUT5LMIX Input 1 Source */ + { 0x000006c1, 0x0080 }, /* R1729 (0x6c1) - OUT5LMIX Input 1 Volume */ + { 0x000006c2, 0x0000 }, /* R1730 (0x6c2) - OUT5LMIX Input 2 Source */ + { 0x000006c3, 0x0080 }, /* R1731 (0x6c3) - OUT5LMIX Input 2 Volume */ + { 0x000006c4, 0x0000 }, /* R1732 (0x6c4) - OUT5LMIX Input 3 Source */ + { 0x000006c5, 0x0080 }, /* R1733 (0x6c5) - OUT5LMIX Input 3 Volume */ + { 0x000006c6, 0x0000 }, /* R1734 (0x6c6) - OUT5LMIX Input 4 Source */ + { 0x000006c7, 0x0080 }, /* R1735 (0x6c7) - OUT5LMIX Input 4 Volume */ + { 0x000006c8, 0x0000 }, /* R1736 (0x6c8) - OUT5RMIX Input 1 Source */ + { 0x000006c9, 0x0080 }, /* R1737 (0x6c9) - OUT5RMIX Input 1 Volume */ + { 0x000006ca, 0x0000 }, /* R1738 (0x6ca) - OUT5RMIX Input 2 Source */ + { 0x000006cb, 0x0080 }, /* R1739 (0x6cb) - OUT5RMIX Input 2 Volume */ + { 0x000006cc, 0x0000 }, /* R1740 (0x6cc) - OUT5RMIX Input 3 Source */ + { 0x000006cd, 0x0080 }, /* R1741 (0x6cd) - OUT5RMIX Input 3 Volume */ + { 0x000006ce, 0x0000 }, /* R1742 (0x6ce) - OUT5RMIX Input 4 Source */ + { 0x000006cf, 0x0080 }, /* R1743 (0x6cf) - OUT5RMIX Input 4 Volume */ + { 0x00000700, 0x0000 }, /* R1792 (0x700) - AIF1TX1MIX Input 1 Source */ + { 0x00000701, 0x0080 }, /* R1793 (0x701) - AIF1TX1MIX Input 1 Volume */ + { 0x00000702, 0x0000 }, /* R1794 (0x702) - AIF1TX1MIX Input 2 Source */ + { 0x00000703, 0x0080 }, /* R1795 (0x703) - AIF1TX1MIX Input 2 Volume */ + { 0x00000704, 0x0000 }, /* R1796 (0x704) - AIF1TX1MIX Input 3 Source */ + { 0x00000705, 0x0080 }, /* R1797 (0x705) - AIF1TX1MIX Input 3 Volume */ + { 0x00000706, 0x0000 }, /* R1798 (0x706) - AIF1TX1MIX Input 4 Source */ + { 0x00000707, 0x0080 }, /* R1799 (0x707) - AIF1TX1MIX Input 4 Volume */ + { 0x00000708, 0x0000 }, /* R1800 (0x708) - AIF1TX2MIX Input 1 Source */ + { 0x00000709, 0x0080 }, /* R1801 (0x709) - AIF1TX2MIX Input 1 Volume */ + { 0x0000070a, 0x0000 }, /* R1802 (0x70a) - AIF1TX2MIX Input 2 Source */ + { 0x0000070b, 0x0080 }, /* R1803 (0x70b) - AIF1TX2MIX Input 2 Volume */ + { 0x0000070c, 0x0000 }, /* R1804 (0x70c) - AIF1TX2MIX Input 3 Source */ + { 0x0000070d, 0x0080 }, /* R1805 (0x70d) - AIF1TX2MIX Input 3 Volume */ + { 0x0000070e, 0x0000 }, /* R1806 (0x70e) - AIF1TX2MIX Input 4 Source */ + { 0x0000070f, 0x0080 }, /* R1807 (0x70f) - AIF1TX2MIX Input 4 Volume */ + { 0x00000710, 0x0000 }, /* R1808 (0x710) - AIF1TX3MIX Input 1 Source */ + { 0x00000711, 0x0080 }, /* R1809 (0x711) - AIF1TX3MIX Input 1 Volume */ + { 0x00000712, 0x0000 }, /* R1810 (0x712) - AIF1TX3MIX Input 2 Source */ + { 0x00000713, 0x0080 }, /* R1811 (0x713) - AIF1TX3MIX Input 2 Volume */ + { 0x00000714, 0x0000 }, /* R1812 (0x714) - AIF1TX3MIX Input 3 Source */ + { 0x00000715, 0x0080 }, /* R1813 (0x715) - AIF1TX3MIX Input 3 Volume */ + { 0x00000716, 0x0000 }, /* R1814 (0x716) - AIF1TX3MIX Input 4 Source */ + { 0x00000717, 0x0080 }, /* R1815 (0x717) - AIF1TX3MIX Input 4 Volume */ + { 0x00000718, 0x0000 }, /* R1816 (0x718) - AIF1TX4MIX Input 1 Source */ + { 0x00000719, 0x0080 }, /* R1817 (0x719) - AIF1TX4MIX Input 1 Volume */ + { 0x0000071a, 0x0000 }, /* R1818 (0x71a) - AIF1TX4MIX Input 2 Source */ + { 0x0000071b, 0x0080 }, /* R1819 (0x71b) - AIF1TX4MIX Input 2 Volume */ + { 0x0000071c, 0x0000 }, /* R1820 (0x71c) - AIF1TX4MIX Input 3 Source */ + { 0x0000071d, 0x0080 }, /* R1821 (0x71d) - AIF1TX4MIX Input 3 Volume */ + { 0x0000071e, 0x0000 }, /* R1822 (0x71e) - AIF1TX4MIX Input 4 Source */ + { 0x0000071f, 0x0080 }, /* R1823 (0x71f) - AIF1TX4MIX Input 4 Volume */ + { 0x00000720, 0x0000 }, /* R1824 (0x720) - AIF1TX5MIX Input 1 Source */ + { 0x00000721, 0x0080 }, /* R1825 (0x721) - AIF1TX5MIX Input 1 Volume */ + { 0x00000722, 0x0000 }, /* R1826 (0x722) - AIF1TX5MIX Input 2 Source */ + { 0x00000723, 0x0080 }, /* R1827 (0x723) - AIF1TX5MIX Input 2 Volume */ + { 0x00000724, 0x0000 }, /* R1828 (0x724) - AIF1TX5MIX Input 3 Source */ + { 0x00000725, 0x0080 }, /* R1829 (0x725) - AIF1TX5MIX Input 3 Volume */ + { 0x00000726, 0x0000 }, /* R1830 (0x726) - AIF1TX5MIX Input 4 Source */ + { 0x00000727, 0x0080 }, /* R1831 (0x727) - AIF1TX5MIX Input 4 Volume */ + { 0x00000728, 0x0000 }, /* R1832 (0x728) - AIF1TX6MIX Input 1 Source */ + { 0x00000729, 0x0080 }, /* R1833 (0x729) - AIF1TX6MIX Input 1 Volume */ + { 0x0000072a, 0x0000 }, /* R1834 (0x72a) - AIF1TX6MIX Input 2 Source */ + { 0x0000072b, 0x0080 }, /* R1835 (0x72b) - AIF1TX6MIX Input 2 Volume */ + { 0x0000072c, 0x0000 }, /* R1836 (0x72c) - AIF1TX6MIX Input 3 Source */ + { 0x0000072d, 0x0080 }, /* R1837 (0x72d) - AIF1TX6MIX Input 3 Volume */ + { 0x0000072e, 0x0000 }, /* R1838 (0x72e) - AIF1TX6MIX Input 4 Source */ + { 0x0000072f, 0x0080 }, /* R1839 (0x72f) - AIF1TX6MIX Input 4 Volume */ + { 0x00000740, 0x0000 }, /* R1856 (0x740) - AIF2TX1MIX Input 1 Source */ + { 0x00000741, 0x0080 }, /* R1857 (0x741) - AIF2TX1MIX Input 1 Volume */ + { 0x00000742, 0x0000 }, /* R1858 (0x742) - AIF2TX1MIX Input 2 Source */ + { 0x00000743, 0x0080 }, /* R1859 (0x743) - AIF2TX1MIX Input 2 Volume */ + { 0x00000744, 0x0000 }, /* R1860 (0x744) - AIF2TX1MIX Input 3 Source */ + { 0x00000745, 0x0080 }, /* R1861 (0x745) - AIF2TX1MIX Input 3 Volume */ + { 0x00000746, 0x0000 }, /* R1862 (0x746) - AIF2TX1MIX Input 4 Source */ + { 0x00000747, 0x0080 }, /* R1863 (0x747) - AIF2TX1MIX Input 4 Volume */ + { 0x00000748, 0x0000 }, /* R1864 (0x748) - AIF2TX2MIX Input 1 Source */ + { 0x00000749, 0x0080 }, /* R1865 (0x749) - AIF2TX2MIX Input 1 Volume */ + { 0x0000074a, 0x0000 }, /* R1866 (0x74a) - AIF2TX2MIX Input 2 Source */ + { 0x0000074b, 0x0080 }, /* R1867 (0x74b) - AIF2TX2MIX Input 2 Volume */ + { 0x0000074c, 0x0000 }, /* R1868 (0x74c) - AIF2TX2MIX Input 3 Source */ + { 0x0000074d, 0x0080 }, /* R1869 (0x74d) - AIF2TX2MIX Input 3 Volume */ + { 0x0000074e, 0x0000 }, /* R1870 (0x74e) - AIF2TX2MIX Input 4 Source */ + { 0x0000074f, 0x0080 }, /* R1871 (0x74f) - AIF2TX2MIX Input 4 Volume */ + { 0x00000780, 0x0000 }, /* R1920 (0x780) - AIF3TX1MIX Input 1 Source */ + { 0x00000781, 0x0080 }, /* R1921 (0x781) - AIF3TX1MIX Input 1 Volume */ + { 0x00000782, 0x0000 }, /* R1922 (0x782) - AIF3TX1MIX Input 2 Source */ + { 0x00000783, 0x0080 }, /* R1923 (0x783) - AIF3TX1MIX Input 2 Volume */ + { 0x00000784, 0x0000 }, /* R1924 (0x784) - AIF3TX1MIX Input 3 Source */ + { 0x00000785, 0x0080 }, /* R1925 (0x785) - AIF3TX1MIX Input 3 Volume */ + { 0x00000786, 0x0000 }, /* R1926 (0x786) - AIF3TX1MIX Input 4 Source */ + { 0x00000787, 0x0080 }, /* R1927 (0x787) - AIF3TX1MIX Input 4 Volume */ + { 0x00000788, 0x0000 }, /* R1928 (0x788) - AIF3TX2MIX Input 1 Source */ + { 0x00000789, 0x0080 }, /* R1929 (0x789) - AIF3TX2MIX Input 1 Volume */ + { 0x0000078a, 0x0000 }, /* R1930 (0x78a) - AIF3TX2MIX Input 2 Source */ + { 0x0000078b, 0x0080 }, /* R1931 (0x78b) - AIF3TX2MIX Input 2 Volume */ + { 0x0000078c, 0x0000 }, /* R1932 (0x78c) - AIF3TX2MIX Input 3 Source */ + { 0x0000078d, 0x0080 }, /* R1933 (0x78d) - AIF3TX2MIX Input 3 Volume */ + { 0x0000078e, 0x0000 }, /* R1934 (0x78e) - AIF3TX2MIX Input 4 Source */ + { 0x0000078f, 0x0080 }, /* R1935 (0x78f) - AIF3TX2MIX Input 4 Volume */ + { 0x000007c0, 0x0000 }, /* R1984 (0x7c0) - SLIMTX1MIX Input 1 Source */ + { 0x000007c1, 0x0080 }, /* R1985 (0x7c1) - SLIMTX1MIX Input 1 Volume */ + { 0x000007c2, 0x0000 }, /* R1986 (0x7c2) - SLIMTX1MIX Input 2 Source */ + { 0x000007c3, 0x0080 }, /* R1987 (0x7c3) - SLIMTX1MIX Input 2 Volume */ + { 0x000007c4, 0x0000 }, /* R1988 (0x7c4) - SLIMTX1MIX Input 3 Source */ + { 0x000007c5, 0x0080 }, /* R1989 (0x7c5) - SLIMTX1MIX Input 3 Volume */ + { 0x000007c6, 0x0000 }, /* R1990 (0x7c6) - SLIMTX1MIX Input 4 Source */ + { 0x000007c7, 0x0080 }, /* R1991 (0x7c7) - SLIMTX1MIX Input 4 Volume */ + { 0x000007c8, 0x0000 }, /* R1992 (0x7c8) - SLIMTX2MIX Input 1 Source */ + { 0x000007c9, 0x0080 }, /* R1993 (0x7c9) - SLIMTX2MIX Input 1 Volume */ + { 0x000007ca, 0x0000 }, /* R1994 (0x7ca) - SLIMTX2MIX Input 2 Source */ + { 0x000007cb, 0x0080 }, /* R1995 (0x7cb) - SLIMTX2MIX Input 2 Volume */ + { 0x000007cc, 0x0000 }, /* R1996 (0x7cc) - SLIMTX2MIX Input 3 Source */ + { 0x000007cd, 0x0080 }, /* R1997 (0x7cd) - SLIMTX2MIX Input 3 Volume */ + { 0x000007ce, 0x0000 }, /* R1998 (0x7ce) - SLIMTX2MIX Input 4 Source */ + { 0x000007cf, 0x0080 }, /* R1999 (0x7cf) - SLIMTX2MIX Input 4 Volume */ + { 0x000007d0, 0x0000 }, /* R2000 (0x7d0) - SLIMTX3MIX Input 1 Source */ + { 0x000007d1, 0x0080 }, /* R2001 (0x7d1) - SLIMTX3MIX Input 1 Volume */ + { 0x000007d2, 0x0000 }, /* R2002 (0x7d2) - SLIMTX3MIX Input 2 Source */ + { 0x000007d3, 0x0080 }, /* R2003 (0x7d3) - SLIMTX3MIX Input 2 Volume */ + { 0x000007d4, 0x0000 }, /* R2004 (0x7d4) - SLIMTX3MIX Input 3 Source */ + { 0x000007d5, 0x0080 }, /* R2005 (0x7d5) - SLIMTX3MIX Input 3 Volume */ + { 0x000007d6, 0x0000 }, /* R2006 (0x7d6) - SLIMTX3MIX Input 4 Source */ + { 0x000007d7, 0x0080 }, /* R2007 (0x7d7) - SLIMTX3MIX Input 4 Volume */ + { 0x000007d8, 0x0000 }, /* R2008 (0x7d8) - SLIMTX4MIX Input 1 Source */ + { 0x000007d9, 0x0080 }, /* R2009 (0x7d9) - SLIMTX4MIX Input 1 Volume */ + { 0x000007da, 0x0000 }, /* R2010 (0x7da) - SLIMTX4MIX Input 2 Source */ + { 0x000007db, 0x0080 }, /* R2011 (0x7db) - SLIMTX4MIX Input 2 Volume */ + { 0x000007dc, 0x0000 }, /* R2012 (0x7dc) - SLIMTX4MIX Input 3 Source */ + { 0x000007dd, 0x0080 }, /* R2013 (0x7dd) - SLIMTX4MIX Input 3 Volume */ + { 0x000007de, 0x0000 }, /* R2014 (0x7de) - SLIMTX4MIX Input 4 Source */ + { 0x000007df, 0x0080 }, /* R2015 (0x7df) - SLIMTX4MIX Input 4 Volume */ + { 0x000007e0, 0x0000 }, /* R2016 (0x7e0) - SLIMTX5MIX Input 1 Source */ + { 0x000007e1, 0x0080 }, /* R2017 (0x7e1) - SLIMTX5MIX Input 1 Volume */ + { 0x000007e2, 0x0000 }, /* R2018 (0x7e2) - SLIMTX5MIX Input 2 Source */ + { 0x000007e3, 0x0080 }, /* R2019 (0x7e3) - SLIMTX5MIX Input 2 Volume */ + { 0x000007e4, 0x0000 }, /* R2020 (0x7e4) - SLIMTX5MIX Input 3 Source */ + { 0x000007e5, 0x0080 }, /* R2021 (0x7e5) - SLIMTX5MIX Input 3 Volume */ + { 0x000007e6, 0x0000 }, /* R2022 (0x7e6) - SLIMTX5MIX Input 4 Source */ + { 0x000007e7, 0x0080 }, /* R2023 (0x7e7) - SLIMTX5MIX Input 4 Volume */ + { 0x000007e8, 0x0000 }, /* R2024 (0x7e8) - SLIMTX6MIX Input 1 Source */ + { 0x000007e9, 0x0080 }, /* R2025 (0x7e9) - SLIMTX6MIX Input 1 Volume */ + { 0x000007ea, 0x0000 }, /* R2026 (0x7ea) - SLIMTX6MIX Input 2 Source */ + { 0x000007eb, 0x0080 }, /* R2027 (0x7eb) - SLIMTX6MIX Input 2 Volume */ + { 0x000007ec, 0x0000 }, /* R2028 (0x7ec) - SLIMTX6MIX Input 3 Source */ + { 0x000007ed, 0x0080 }, /* R2029 (0x7ed) - SLIMTX6MIX Input 3 Volume */ + { 0x000007ee, 0x0000 }, /* R2030 (0x7ee) - SLIMTX6MIX Input 4 Source */ + { 0x000007ef, 0x0080 }, /* R2031 (0x7ef) - SLIMTX6MIX Input 4 Volume */ + { 0x00000800, 0x0000 }, /* R2048 (0x800) - SPDIF1TX1MIX Input 1 Source*/ + { 0x00000801, 0x0080 }, /* R2049 (0x801) - SPDIF1TX1MIX Input 1 Volume*/ + { 0x00000808, 0x0000 }, /* R2056 (0x808) - SPDIF1TX2MIX Input 1 Source*/ + { 0x00000809, 0x0080 }, /* R2057 (0x809) - SPDIF1TX2MIX Input 1 Volume*/ + { 0x00000880, 0x0000 }, /* R2176 (0x880) - EQ1MIX Input 1 Source */ + { 0x00000881, 0x0080 }, /* R2177 (0x881) - EQ1MIX Input 1 Volume */ + { 0x00000882, 0x0000 }, /* R2178 (0x882) - EQ1MIX Input 2 Source */ + { 0x00000883, 0x0080 }, /* R2179 (0x883) - EQ1MIX Input 2 Volume */ + { 0x00000884, 0x0000 }, /* R2180 (0x884) - EQ1MIX Input 3 Source */ + { 0x00000885, 0x0080 }, /* R2181 (0x885) - EQ1MIX Input 3 Volume */ + { 0x00000886, 0x0000 }, /* R2182 (0x886) - EQ1MIX Input 4 Source */ + { 0x00000887, 0x0080 }, /* R2183 (0x887) - EQ1MIX Input 4 Volume */ + { 0x00000888, 0x0000 }, /* R2184 (0x888) - EQ2MIX Input 1 Source */ + { 0x00000889, 0x0080 }, /* R2185 (0x889) - EQ2MIX Input 1 Volume */ + { 0x0000088a, 0x0000 }, /* R2186 (0x88a) - EQ2MIX Input 2 Source */ + { 0x0000088b, 0x0080 }, /* R2187 (0x88b) - EQ2MIX Input 2 Volume */ + { 0x0000088c, 0x0000 }, /* R2188 (0x88c) - EQ2MIX Input 3 Source */ + { 0x0000088d, 0x0080 }, /* R2189 (0x88d) - EQ2MIX Input 3 Volume */ + { 0x0000088e, 0x0000 }, /* R2190 (0x88e) - EQ2MIX Input 4 Source */ + { 0x0000088f, 0x0080 }, /* R2191 (0x88f) - EQ2MIX Input 4 Volume */ + { 0x00000890, 0x0000 }, /* R2192 (0x890) - EQ3MIX Input 1 Source */ + { 0x00000891, 0x0080 }, /* R2193 (0x891) - EQ3MIX Input 1 Volume */ + { 0x00000892, 0x0000 }, /* R2194 (0x892) - EQ3MIX Input 2 Source */ + { 0x00000893, 0x0080 }, /* R2195 (0x893) - EQ3MIX Input 2 Volume */ + { 0x00000894, 0x0000 }, /* R2196 (0x894) - EQ3MIX Input 3 Source */ + { 0x00000895, 0x0080 }, /* R2197 (0x895) - EQ3MIX Input 3 Volume */ + { 0x00000896, 0x0000 }, /* R2198 (0x896) - EQ3MIX Input 4 Source */ + { 0x00000897, 0x0080 }, /* R2199 (0x897) - EQ3MIX Input 4 Volume */ + { 0x00000898, 0x0000 }, /* R2200 (0x898) - EQ4MIX Input 1 Source */ + { 0x00000899, 0x0080 }, /* R2201 (0x899) - EQ4MIX Input 1 Volume */ + { 0x0000089a, 0x0000 }, /* R2202 (0x89a) - EQ4MIX Input 2 Source */ + { 0x0000089b, 0x0080 }, /* R2203 (0x89b) - EQ4MIX Input 2 Volume */ + { 0x0000089c, 0x0000 }, /* R2204 (0x89c) - EQ4MIX Input 3 Source */ + { 0x0000089d, 0x0080 }, /* R2205 (0x89d) - EQ4MIX Input 3 Volume */ + { 0x0000089e, 0x0000 }, /* R2206 (0x89e) - EQ4MIX Input 4 Source */ + { 0x0000089f, 0x0080 }, /* R2207 (0x89f) - EQ4MIX Input 4 Volume */ + { 0x000008c0, 0x0000 }, /* R2240 (0x8c0) - DRC1LMIX Input 1 Source */ + { 0x000008c1, 0x0080 }, /* R2241 (0x8c1) - DRC1LMIX Input 1 Volume */ + { 0x000008c2, 0x0000 }, /* R2242 (0x8c2) - DRC1LMIX Input 2 Source */ + { 0x000008c3, 0x0080 }, /* R2243 (0x8c3) - DRC1LMIX Input 2 Volume */ + { 0x000008c4, 0x0000 }, /* R2244 (0x8c4) - DRC1LMIX Input 3 Source */ + { 0x000008c5, 0x0080 }, /* R2245 (0x8c5) - DRC1LMIX Input 3 Volume */ + { 0x000008c6, 0x0000 }, /* R2246 (0x8c6) - DRC1LMIX Input 4 Source */ + { 0x000008c7, 0x0080 }, /* R2247 (0x8c7) - DRC1LMIX Input 4 Volume */ + { 0x000008c8, 0x0000 }, /* R2248 (0x8c8) - DRC1RMIX Input 1 Source */ + { 0x000008c9, 0x0080 }, /* R2249 (0x8c9) - DRC1RMIX Input 1 Volume */ + { 0x000008ca, 0x0000 }, /* R2250 (0x8ca) - DRC1RMIX Input 2 Source */ + { 0x000008cb, 0x0080 }, /* R2251 (0x8cb) - DRC1RMIX Input 2 Volume */ + { 0x000008cc, 0x0000 }, /* R2252 (0x8cc) - DRC1RMIX Input 3 Source */ + { 0x000008cd, 0x0080 }, /* R2253 (0x8cd) - DRC1RMIX Input 3 Volume */ + { 0x000008ce, 0x0000 }, /* R2254 (0x8ce) - DRC1RMIX Input 4 Source */ + { 0x000008cf, 0x0080 }, /* R2255 (0x8cf) - DRC1RMIX Input 4 Volume */ + { 0x000008d0, 0x0000 }, /* R2256 (0x8d0) - DRC2LMIX Input 1 Source */ + { 0x000008d1, 0x0080 }, /* R2257 (0x8d1) - DRC2LMIX Input 1 Volume */ + { 0x000008d2, 0x0000 }, /* R2258 (0x8d2) - DRC2LMIX Input 2 Source */ + { 0x000008d3, 0x0080 }, /* R2259 (0x8d3) - DRC2LMIX Input 2 Volume */ + { 0x000008d4, 0x0000 }, /* R2260 (0x8d4) - DRC2LMIX Input 3 Source */ + { 0x000008d5, 0x0080 }, /* R2261 (0x8d5) - DRC2LMIX Input 3 Volume */ + { 0x000008d6, 0x0000 }, /* R2262 (0x8d6) - DRC2LMIX Input 4 Source */ + { 0x000008d7, 0x0080 }, /* R2263 (0x8d7) - DRC2LMIX Input 4 Volume */ + { 0x000008d8, 0x0000 }, /* R2264 (0x8d8) - DRC2RMIX Input 1 Source */ + { 0x000008d9, 0x0080 }, /* R2265 (0x8d9) - DRC2RMIX Input 1 Volume */ + { 0x000008da, 0x0000 }, /* R2266 (0x8da) - DRC2RMIX Input 2 Source */ + { 0x000008db, 0x0080 }, /* R2267 (0x8db) - DRC2RMIX Input 2 Volume */ + { 0x000008dc, 0x0000 }, /* R2268 (0x8dc) - DRC2RMIX Input 3 Source */ + { 0x000008dd, 0x0080 }, /* R2269 (0x8dd) - DRC2RMIX Input 3 Volume */ + { 0x000008de, 0x0000 }, /* R2270 (0x8de) - DRC2RMIX Input 4 Source */ + { 0x000008df, 0x0080 }, /* R2271 (0x8df) - DRC2RMIX Input 4 Volume */ + { 0x00000900, 0x0000 }, /* R2304 (0x900) - HPLP1MIX Input 1 Source */ + { 0x00000901, 0x0080 }, /* R2305 (0x901) - HPLP1MIX Input 1 Volume */ + { 0x00000902, 0x0000 }, /* R2306 (0x902) - HPLP1MIX Input 2 Source */ + { 0x00000903, 0x0080 }, /* R2307 (0x903) - HPLP1MIX Input 2 Volume */ + { 0x00000904, 0x0000 }, /* R2308 (0x904) - HPLP1MIX Input 3 Source */ + { 0x00000905, 0x0080 }, /* R2309 (0x905) - HPLP1MIX Input 3 Volume */ + { 0x00000906, 0x0000 }, /* R2310 (0x906) - HPLP1MIX Input 4 Source */ + { 0x00000907, 0x0080 }, /* R2311 (0x907) - HPLP1MIX Input 4 Volume */ + { 0x00000908, 0x0000 }, /* R2312 (0x908) - HPLP2MIX Input 1 Source */ + { 0x00000909, 0x0080 }, /* R2313 (0x909) - HPLP2MIX Input 1 Volume */ + { 0x0000090a, 0x0000 }, /* R2314 (0x90a) - HPLP2MIX Input 2 Source */ + { 0x0000090b, 0x0080 }, /* R2315 (0x90b) - HPLP2MIX Input 2 Volume */ + { 0x0000090c, 0x0000 }, /* R2316 (0x90c) - HPLP2MIX Input 3 Source */ + { 0x0000090d, 0x0080 }, /* R2317 (0x90d) - HPLP2MIX Input 3 Volume */ + { 0x0000090e, 0x0000 }, /* R2318 (0x90e) - HPLP2MIX Input 4 Source */ + { 0x0000090f, 0x0080 }, /* R2319 (0x90f) - HPLP2MIX Input 4 Volume */ + { 0x00000910, 0x0000 }, /* R2320 (0x910) - HPLP3MIX Input 1 Source */ + { 0x00000911, 0x0080 }, /* R2321 (0x911) - HPLP3MIX Input 1 Volume */ + { 0x00000912, 0x0000 }, /* R2322 (0x912) - HPLP3MIX Input 2 Source */ + { 0x00000913, 0x0080 }, /* R2323 (0x913) - HPLP3MIX Input 2 Volume */ + { 0x00000914, 0x0000 }, /* R2324 (0x914) - HPLP3MIX Input 3 Source */ + { 0x00000915, 0x0080 }, /* R2325 (0x915) - HPLP3MIX Input 3 Volume */ + { 0x00000916, 0x0000 }, /* R2326 (0x916) - HPLP3MIX Input 4 Source */ + { 0x00000917, 0x0080 }, /* R2327 (0x917) - HPLP3MIX Input 4 Volume */ + { 0x00000918, 0x0000 }, /* R2328 (0x918) - HPLP4MIX Input 1 Source */ + { 0x00000919, 0x0080 }, /* R2329 (0x919) - HPLP4MIX Input 1 Volume */ + { 0x0000091a, 0x0000 }, /* R2330 (0x91a) - HPLP4MIX Input 2 Source */ + { 0x0000091b, 0x0080 }, /* R2331 (0x91b) - HPLP4MIX Input 2 Volume */ + { 0x0000091c, 0x0000 }, /* R2332 (0x91c) - HPLP4MIX Input 3 Source */ + { 0x0000091d, 0x0080 }, /* R2333 (0x91d) - HPLP4MIX Input 3 Volume */ + { 0x0000091e, 0x0000 }, /* R2334 (0x91e) - HPLP4MIX Input 4 Source */ + { 0x0000091f, 0x0080 }, /* R2335 (0x91f) - HPLP4MIX Input 4 Volume */ + { 0x00000940, 0x0000 }, /* R2368 (0x940) - DSP1LMIX Input 1 Source */ + { 0x00000941, 0x0080 }, /* R2369 (0x941) - DSP1LMIX Input 1 Volume */ + { 0x00000942, 0x0000 }, /* R2370 (0x942) - DSP1LMIX Input 2 Source */ + { 0x00000943, 0x0080 }, /* R2371 (0x943) - DSP1LMIX Input 2 Volume */ + { 0x00000944, 0x0000 }, /* R2372 (0x944) - DSP1LMIX Input 3 Source */ + { 0x00000945, 0x0080 }, /* R2373 (0x945) - DSP1LMIX Input 3 Volume */ + { 0x00000946, 0x0000 }, /* R2374 (0x946) - DSP1LMIX Input 4 Source */ + { 0x00000947, 0x0080 }, /* R2375 (0x947) - DSP1LMIX Input 4 Volume */ + { 0x00000948, 0x0000 }, /* R2376 (0x948) - DSP1RMIX Input 1 Source */ + { 0x00000949, 0x0080 }, /* R2377 (0x949) - DSP1RMIX Input 1 Volume */ + { 0x0000094a, 0x0000 }, /* R2378 (0x94a) - DSP1RMIX Input 2 Source */ + { 0x0000094b, 0x0080 }, /* R2379 (0x94b) - DSP1RMIX Input 2 Volume */ + { 0x0000094c, 0x0000 }, /* R2380 (0x94c) - DSP1RMIX Input 3 Source */ + { 0x0000094d, 0x0080 }, /* R2381 (0x94d) - DSP1RMIX Input 3 Volume */ + { 0x0000094e, 0x0000 }, /* R2382 (0x94e) - DSP1RMIX Input 4 Source */ + { 0x0000094f, 0x0080 }, /* R2383 (0x94f) - DSP1RMIX Input 4 Volume */ + { 0x00000950, 0x0000 }, /* R2384 (0x950) - DSP1AUX1MIX Input 1 Source */ + { 0x00000958, 0x0000 }, /* R2392 (0x958) - DSP1AUX2MIX Input 1 Source */ + { 0x00000960, 0x0000 }, /* R2400 (0x960) - DSP1AUX3MIX Input 1 Source */ + { 0x00000968, 0x0000 }, /* R2408 (0x968) - DSP1AUX4MIX Input 1 Source */ + { 0x00000970, 0x0000 }, /* R2416 (0x970) - DSP1AUX5MIX Input 1 Source */ + { 0x00000978, 0x0000 }, /* R2424 (0x978) - DSP1AUX6MIX Input 1 Source */ + { 0x00000980, 0x0000 }, /* R2432 (0x980) - DSP2LMIX Input 1 Source */ + { 0x00000981, 0x0080 }, /* R2433 (0x981) - DSP2LMIX Input 1 Volume */ + { 0x00000982, 0x0000 }, /* R2434 (0x982) - DSP2LMIX Input 2 Source */ + { 0x00000983, 0x0080 }, /* R2435 (0x983) - DSP2LMIX Input 2 Volume */ + { 0x00000984, 0x0000 }, /* R2436 (0x984) - DSP2LMIX Input 3 Source */ + { 0x00000985, 0x0080 }, /* R2437 (0x985) - DSP2LMIX Input 3 Volume */ + { 0x00000986, 0x0000 }, /* R2438 (0x986) - DSP2LMIX Input 4 Source */ + { 0x00000987, 0x0080 }, /* R2439 (0x987) - DSP2LMIX Input 4 Volume */ + { 0x00000988, 0x0000 }, /* R2440 (0x988) - DSP2RMIX Input 1 Source */ + { 0x00000989, 0x0080 }, /* R2441 (0x989) - DSP2RMIX Input 1 Volume */ + { 0x0000098a, 0x0000 }, /* R2442 (0x98a) - DSP2RMIX Input 2 Source */ + { 0x0000098b, 0x0080 }, /* R2443 (0x98b) - DSP2RMIX Input 2 Volume */ + { 0x0000098c, 0x0000 }, /* R2444 (0x98c) - DSP2RMIX Input 3 Source */ + { 0x0000098d, 0x0080 }, /* R2445 (0x98d) - DSP2RMIX Input 3 Volume */ + { 0x0000098e, 0x0000 }, /* R2446 (0x98e) - DSP2RMIX Input 4 Source */ + { 0x0000098f, 0x0080 }, /* R2447 (0x98f) - DSP2RMIX Input 4 Volume */ + { 0x00000990, 0x0000 }, /* R2448 (0x990) - DSP2AUX1MIX Input 1 Source */ + { 0x00000998, 0x0000 }, /* R2456 (0x998) - DSP2AUX2MIX Input 1 Source */ + { 0x000009a0, 0x0000 }, /* R2464 (0x9a0) - DSP2AUX3MIX Input 1 Source */ + { 0x000009a8, 0x0000 }, /* R2472 (0x9a8) - DSP2AUX4MIX Input 1 Source */ + { 0x000009b0, 0x0000 }, /* R2480 (0x9b0) - DSP2AUX5MIX Input 1 Source */ + { 0x000009b8, 0x0000 }, /* R2488 (0x9b8) - DSP2AUX6MIX Input 1 Source */ + { 0x000009c0, 0x0000 }, /* R2496 (0x9c0) - DSP3LMIX Input 1 Source */ + { 0x000009c1, 0x0080 }, /* R2497 (0x9c1) - DSP3LMIX Input 1 Volume */ + { 0x000009c2, 0x0000 }, /* R2498 (0x9c2) - DSP3LMIX Input 2 Source */ + { 0x000009c3, 0x0080 }, /* R2499 (0x9c3) - DSP3LMIX Input 2 Volume */ + { 0x000009c4, 0x0000 }, /* R2500 (0x9c4) - DSP3LMIX Input 3 Source */ + { 0x000009c5, 0x0080 }, /* R2501 (0x9c5) - DSP3LMIX Input 3 Volume */ + { 0x000009c6, 0x0000 }, /* R2502 (0x9c6) - DSP3LMIX Input 4 Source */ + { 0x000009c7, 0x0080 }, /* R2503 (0x9c7) - DSP3LMIX Input 4 Volume */ + { 0x000009c8, 0x0000 }, /* R2504 (0x9c8) - DSP3RMIX Input 1 Source */ + { 0x000009c9, 0x0080 }, /* R2505 (0x9c9) - DSP3RMIX Input 1 Volume */ + { 0x000009ca, 0x0000 }, /* R2506 (0x9ca) - DSP3RMIX Input 2 Source */ + { 0x000009cb, 0x0080 }, /* R2507 (0x9cb) - DSP3RMIX Input 2 Volume */ + { 0x000009cc, 0x0000 }, /* R2508 (0x9cc) - DSP3RMIX Input 3 Source */ + { 0x000009cd, 0x0080 }, /* R2509 (0x9cd) - DSP3RMIX Input 3 Volume */ + { 0x000009ce, 0x0000 }, /* R2510 (0x9ce) - DSP3RMIX Input 4 Source */ + { 0x000009cf, 0x0080 }, /* R2511 (0x9cf) - DSP3RMIX Input 4 Volume */ + { 0x000009d0, 0x0000 }, /* R2512 (0x9d0) - DSP3AUX1MIX Input 1 Source */ + { 0x000009d8, 0x0000 }, /* R2520 (0x9d8) - DSP3AUX2MIX Input 1 Source */ + { 0x000009e0, 0x0000 }, /* R2528 (0x9e0) - DSP3AUX3MIX Input 1 Source */ + { 0x000009e8, 0x0000 }, /* R2536 (0x9e8) - DSP3AUX4MIX Input 1 Source */ + { 0x000009f0, 0x0000 }, /* R2544 (0x9f0) - DSP3AUX5MIX Input 1 Source */ + { 0x000009f8, 0x0000 }, /* R2552 (0x9f8) - DSP3AUX6MIX Input 1 Source */ + { 0x00000b00, 0x0000 }, /* R2816 (0xb00) - ISRC1DEC1MIX Input 1 Source*/ + { 0x00000b08, 0x0000 }, /* R2824 (0xb08) - ISRC1DEC2MIX Input 1 Source*/ + { 0x00000b10, 0x0000 }, /* R2832 (0xb10) - ISRC1DEC3MIX Input 1 Source*/ + { 0x00000b18, 0x0000 }, /* R2840 (0xb18) - ISRC1DEC4MIX Input 1 Source*/ + { 0x00000b20, 0x0000 }, /* R2848 (0xb20) - ISRC1INT1MIX Input 1 Source*/ + { 0x00000b28, 0x0000 }, /* R2856 (0xb28) - ISRC1INT2MIX Input 1 Source*/ + { 0x00000b30, 0x0000 }, /* R2864 (0xb30) - ISRC1INT3MIX Input 1 Source*/ + { 0x00000b38, 0x0000 }, /* R2872 (0xb38) - ISRC1INT4MIX Input 1 Source*/ + { 0x00000b40, 0x0000 }, /* R2880 (0xb40) - ISRC2DEC1MIX Input 1 Source*/ + { 0x00000b48, 0x0000 }, /* R2888 (0xb48) - ISRC2DEC2MIX Input 1 Source*/ + { 0x00000b50, 0x0000 }, /* R2896 (0xb50) - ISRC2DEC3MIX Input 1 Source*/ + { 0x00000b58, 0x0000 }, /* R2904 (0xb58) - ISRC2DEC4MIX Input 1 Source*/ + { 0x00000b60, 0x0000 }, /* R2912 (0xb60) - ISRC2INT1MIX Input 1 Source*/ + { 0x00000b68, 0x0000 }, /* R2920 (0xb68) - ISRC2INT2MIX Input 1 Source*/ + { 0x00000b70, 0x0000 }, /* R2928 (0xb70) - ISRC2INT3MIX Input 1 Source*/ + { 0x00000b78, 0x0000 }, /* R2936 (0xb78) - ISRC2INT4MIX Input 1 Source*/ + { 0x00000e00, 0x0000 }, /* R3584 (0xe00) - FX Ctrl1 */ + { 0x00000e10, 0x6318 }, /* R3600 (0xe10) - EQ1_1 */ + { 0x00000e11, 0x6300 }, /* R3601 (0xe11) - EQ1_2 */ + { 0x00000e12, 0x0fc8 }, /* R3602 (0xe12) - EQ1_3 */ + { 0x00000e13, 0x03fe }, /* R3603 (0xe13) - EQ1_4 */ + { 0x00000e14, 0x00e0 }, /* R3604 (0xe14) - EQ1_5 */ + { 0x00000e15, 0x1ec4 }, /* R3605 (0xe15) - EQ1_6 */ + { 0x00000e16, 0xf136 }, /* R3606 (0xe16) - EQ1_7 */ + { 0x00000e17, 0x0409 }, /* R3607 (0xe17) - EQ1_8 */ + { 0x00000e18, 0x04cc }, /* R3608 (0xe18) - EQ1_9 */ + { 0x00000e19, 0x1c9b }, /* R3609 (0xe19) - EQ1_10 */ + { 0x00000e1a, 0xf337 }, /* R3610 (0xe1a) - EQ1_11 */ + { 0x00000e1b, 0x040b }, /* R3611 (0xe1b) - EQ1_12 */ + { 0x00000e1c, 0x0cbb }, /* R3612 (0xe1c) - EQ1_13 */ + { 0x00000e1d, 0x16f8 }, /* R3613 (0xe1d) - EQ1_14 */ + { 0x00000e1e, 0xf7d9 }, /* R3614 (0xe1e) - EQ1_15 */ + { 0x00000e1f, 0x040a }, /* R3615 (0xe1f) - EQ1_16 */ + { 0x00000e20, 0x1f14 }, /* R3616 (0xe20) - EQ1_17 */ + { 0x00000e21, 0x058c }, /* R3617 (0xe21) - EQ1_18 */ + { 0x00000e22, 0x0563 }, /* R3618 (0xe22) - EQ1_19 */ + { 0x00000e23, 0x4000 }, /* R3619 (0xe23) - EQ1_20 */ + { 0x00000e24, 0x0b75 }, /* R3620 (0xe24) - EQ1_21 */ + { 0x00000e26, 0x6318 }, /* R3622 (0xe26) - EQ2_1 */ + { 0x00000e27, 0x6300 }, /* R3623 (0xe27) - EQ2_2 */ + { 0x00000e28, 0x0fc8 }, /* R3624 (0xe28) - EQ2_3 */ + { 0x00000e29, 0x03fe }, /* R3625 (0xe29) - EQ2_4 */ + { 0x00000e2a, 0x00e0 }, /* R3626 (0xe2a) - EQ2_5 */ + { 0x00000e2b, 0x1ec4 }, /* R3627 (0xe2b) - EQ2_6 */ + { 0x00000e2c, 0xf136 }, /* R3628 (0xe2c) - EQ2_7 */ + { 0x00000e2d, 0x0409 }, /* R3629 (0xe2d) - EQ2_8 */ + { 0x00000e2e, 0x04cc }, /* R3630 (0xe2e) - EQ2_9 */ + { 0x00000e2f, 0x1c9b }, /* R3631 (0xe2f) - EQ2_10 */ + { 0x00000e30, 0xf337 }, /* R3632 (0xe30) - EQ2_11 */ + { 0x00000e31, 0x040b }, /* R3633 (0xe31) - EQ2_12 */ + { 0x00000e32, 0x0cbb }, /* R3634 (0xe32) - EQ2_13 */ + { 0x00000e33, 0x16f8 }, /* R3635 (0xe33) - EQ2_14 */ + { 0x00000e34, 0xf7d9 }, /* R3636 (0xe34) - EQ2_15 */ + { 0x00000e35, 0x040a }, /* R3637 (0xe35) - EQ2_16 */ + { 0x00000e36, 0x1f14 }, /* R3638 (0xe36) - EQ2_17 */ + { 0x00000e37, 0x058c }, /* R3639 (0xe37) - EQ2_18 */ + { 0x00000e38, 0x0563 }, /* R3640 (0xe38) - EQ2_19 */ + { 0x00000e39, 0x4000 }, /* R3641 (0xe39) - EQ2_20 */ + { 0x00000e3a, 0x0b75 }, /* R3642 (0xe3a) - EQ2_21 */ + { 0x00000e3c, 0x6318 }, /* R3644 (0xe3c) - EQ3_1 */ + { 0x00000e3d, 0x6300 }, /* R3645 (0xe3d) - EQ3_2 */ + { 0x00000e3e, 0x0fc8 }, /* R3646 (0xe3e) - EQ3_3 */ + { 0x00000e3f, 0x03fe }, /* R3647 (0xe3f) - EQ3_4 */ + { 0x00000e40, 0x00e0 }, /* R3648 (0xe40) - EQ3_5 */ + { 0x00000e41, 0x1ec4 }, /* R3649 (0xe41) - EQ3_6 */ + { 0x00000e42, 0xf136 }, /* R3650 (0xe42) - EQ3_7 */ + { 0x00000e43, 0x0409 }, /* R3651 (0xe43) - EQ3_8 */ + { 0x00000e44, 0x04cc }, /* R3652 (0xe44) - EQ3_9 */ + { 0x00000e45, 0x1c9b }, /* R3653 (0xe45) - EQ3_10 */ + { 0x00000e46, 0xf337 }, /* R3654 (0xe46) - EQ3_11 */ + { 0x00000e47, 0x040b }, /* R3655 (0xe47) - EQ3_12 */ + { 0x00000e48, 0x0cbb }, /* R3656 (0xe48) - EQ3_13 */ + { 0x00000e49, 0x16f8 }, /* R3657 (0xe49) - EQ3_14 */ + { 0x00000e4a, 0xf7d9 }, /* R3658 (0xe4a) - EQ3_15 */ + { 0x00000e4b, 0x040a }, /* R3659 (0xe4b) - EQ3_16 */ + { 0x00000e4c, 0x1f14 }, /* R3660 (0xe4c) - EQ3_17 */ + { 0x00000e4d, 0x058c }, /* R3661 (0xe4d) - EQ3_18 */ + { 0x00000e4e, 0x0563 }, /* R3662 (0xe4e) - EQ3_19 */ + { 0x00000e4f, 0x4000 }, /* R3663 (0xe4f) - EQ3_20 */ + { 0x00000e50, 0x0b75 }, /* R3664 (0xe50) - EQ3_21 */ + { 0x00000e52, 0x6318 }, /* R3666 (0xe52) - EQ4_1 */ + { 0x00000e53, 0x6300 }, /* R3667 (0xe53) - EQ4_2 */ + { 0x00000e54, 0x0fc8 }, /* R3668 (0xe54) - EQ4_3 */ + { 0x00000e55, 0x03fe }, /* R3669 (0xe55) - EQ4_4 */ + { 0x00000e56, 0x00e0 }, /* R3670 (0xe56) - EQ4_5 */ + { 0x00000e57, 0x1ec4 }, /* R3671 (0xe57) - EQ4_6 */ + { 0x00000e58, 0xf136 }, /* R3672 (0xe58) - EQ4_7 */ + { 0x00000e59, 0x0409 }, /* R3673 (0xe59) - EQ4_8 */ + { 0x00000e5a, 0x04cc }, /* R3674 (0xe5a) - EQ4_9 */ + { 0x00000e5b, 0x1c9b }, /* R3675 (0xe5b) - EQ4_10 */ + { 0x00000e5c, 0xf337 }, /* R3676 (0xe5c) - EQ4_11 */ + { 0x00000e5d, 0x040b }, /* R3677 (0xe5d) - EQ4_12 */ + { 0x00000e5e, 0x0cbb }, /* R3678 (0xe5e) - EQ4_13 */ + { 0x00000e5f, 0x16f8 }, /* R3679 (0xe5f) - EQ4_14 */ + { 0x00000e60, 0xf7d9 }, /* R3680 (0xe60) - EQ4_15 */ + { 0x00000e61, 0x040a }, /* R3681 (0xe61) - EQ4_16 */ + { 0x00000e62, 0x1f14 }, /* R3682 (0xe62) - EQ4_17 */ + { 0x00000e63, 0x058c }, /* R3683 (0xe63) - EQ4_18 */ + { 0x00000e64, 0x0563 }, /* R3684 (0xe64) - EQ4_19 */ + { 0x00000e65, 0x4000 }, /* R3685 (0xe65) - EQ4_20 */ + { 0x00000e66, 0x0b75 }, /* R3686 (0xe66) - EQ4_21 */ + { 0x00000e80, 0x0018 }, /* R3712 (0xe80) - DRC1 ctrl1 */ + { 0x00000e81, 0x0933 }, /* R3713 (0xe81) - DRC1 ctrl2 */ + { 0x00000e82, 0x0018 }, /* R3714 (0xe82) - DRC1 ctrl3 */ + { 0x00000e83, 0x0000 }, /* R3715 (0xe83) - DRC1 ctrl4 */ + { 0x00000e84, 0x0000 }, /* R3716 (0xe84) - DRC1 ctrl5 */ + { 0x00000e88, 0x0018 }, /* R3720 (0xe88) - DRC2 ctrl1 */ + { 0x00000e89, 0x0933 }, /* R3721 (0xe89) - DRC2 ctrl2 */ + { 0x00000e8a, 0x0018 }, /* R3722 (0xe8a) - DRC2 ctrl3 */ + { 0x00000e8b, 0x0000 }, /* R3723 (0xe8b) - DRC2 ctrl4 */ + { 0x00000e8c, 0x0000 }, /* R3724 (0xe8c) - DRC2 ctrl5 */ + { 0x00000ec0, 0x0000 }, /* R3776 (0xec0) - HPLPF1_1 */ + { 0x00000ec1, 0x0000 }, /* R3777 (0xec1) - HPLPF1_2 */ + { 0x00000ec4, 0x0000 }, /* R3780 (0xec4) - HPLPF2_1 */ + { 0x00000ec5, 0x0000 }, /* R3781 (0xec5) - HPLPF2_2 */ + { 0x00000ec8, 0x0000 }, /* R3784 (0xec8) - HPLPF3_1 */ + { 0x00000ec9, 0x0000 }, /* R3785 (0xec9) - HPLPF3_2 */ + { 0x00000ecc, 0x0000 }, /* R3788 (0xecc) - HPLPF4_1 */ + { 0x00000ecd, 0x0000 }, /* R3789 (0xecd) - HPLPF4_2 */ + { 0x00000ef0, 0x0000 }, /* R3824 (0xef0) - ISRC 1 CTRL 1 */ + { 0x00000ef1, 0x0001 }, /* R3825 (0xef1) - ISRC 1 CTRL 2 */ + { 0x00000ef2, 0x0000 }, /* R3826 (0xef2) - ISRC 1 CTRL 3 */ + { 0x00000ef3, 0x0000 }, /* R3827 (0xef3) - ISRC 2 CTRL 1 */ + { 0x00000ef4, 0x0001 }, /* R3828 (0xef4) - ISRC 2 CTRL 2 */ + { 0x00000ef5, 0x0000 }, /* R3829 (0xef5) - ISRC 2 CTRL 3 */ + { 0x00001200, 0x0000 }, /* R4608 (0x1200) - Clock enable overrides 1 */ + { 0x00001204, 0x0000 }, /* R4612 (0x1204) - Clock enable overrides 3 */ + { 0x00001206, 0x0000 }, /* R4614 (0x1206) - Clock enable overrides 4 */ + { 0x00001210, 0x0000 }, /* R4624 (0x1210) - Clock enable overrides 9 */ + { 0x00001212, 0x0000 }, /* R4626 (0x1212) - Clock enable overrides 10 */ + { 0x00001214, 0x0000 }, /* R4628 (0x1214) - Clock enable overrides 11 */ + { 0x00001216, 0x0000 }, /* R4630 (0x1216) - Clock enable overrides 12 */ + { 0x00001300, 0x0000 }, /* R4864 (0x1300) - DAC Comp 1 */ + { 0x00001302, 0x0000 }, /* R4866 (0x1302) - DAC Comp 2 */ + { 0x00001340, 0x0000 }, /* R4928 (0x1340) - DAC comp 1L */ + { 0x00001341, 0x0000 }, /* R4929 (0x1341) - DAC comp 1R */ + { 0x00001346, 0x0000 }, /* R4929 (0x1346) - DAC comp 4L */ + { 0x00001348, 0x0000 }, /* R4936 (0x1348) - DAC comp 5L */ + { 0x00001349, 0x0000 }, /* R4937 (0x1349) - DAC comp 5R */ + { 0x00001380, 0x0000 }, /* R4992 (0x1380) - FRF Coefficient 1L 1 */ + { 0x00001381, 0x0000 }, /* R4993 (0x1381) - FRF Coefficient 1L 2 */ + { 0x00001382, 0x0000 }, /* R4994 (0x1382) - FRF Coefficient 1L 3 */ + { 0x00001383, 0x0000 }, /* R4995 (0x1383) - FRF Coefficient 1L 4 */ + { 0x00001390, 0x0000 }, /* R5008 (0x1390) - FRF Coefficient 1R 1 */ + { 0x00001391, 0x0000 }, /* R5009 (0x1391) - FRF Coefficient 1R 2 */ + { 0x00001392, 0x0000 }, /* R5010 (0x1392) - FRF Coefficient 1R 3 */ + { 0x00001393, 0x0000 }, /* R5011 (0x1393) - FRF Coefficient 1R 4 */ + { 0x000013a0, 0x0000 }, /* R5024 (0x13a0) - FRF Coefficient 4L 1 */ + { 0x000013a1, 0x0000 }, /* R5025 (0x13a1) - FRF Coefficient 4L 2 */ + { 0x000013a2, 0x0000 }, /* R5026 (0x13a2) - FRF Coefficient 4L 3 */ + { 0x000013a3, 0x0000 }, /* R5027 (0x13a3) - FRF Coefficient 4L 4 */ + { 0x000013b0, 0x0000 }, /* R5040 (0x13b0) - FRF Coefficient 5L 1 */ + { 0x000013b1, 0x0000 }, /* R5041 (0x13b1) - FRF Coefficient 5L 2 */ + { 0x000013b2, 0x0000 }, /* R5042 (0x13b2) - FRF Coefficient 5L 3 */ + { 0x000013b3, 0x0000 }, /* R5043 (0x13b3) - FRF Coefficient 5L 4 */ + { 0x000013c0, 0x0000 }, /* R5040 (0x13c0) - FRF Coefficient 5R 1 */ + { 0x000013c1, 0x0000 }, /* R5041 (0x13c1) - FRF Coefficient 5R 2 */ + { 0x000013c2, 0x0000 }, /* R5042 (0x13c2) - FRF Coefficient 5R 3 */ + { 0x000013c3, 0x0000 }, /* R5043 (0x13c3) - FRF Coefficient 5R 4 */ + { 0x00001700, 0x2001 }, /* R5888 (0x1700) - GPIO1 Control 1 */ + { 0x00001701, 0xf000 }, /* R5889 (0x1701) - GPIO1 Control 2 */ + { 0x00001702, 0x2001 }, /* R5890 (0x1702) - GPIO2 Control 1 */ + { 0x00001703, 0xf000 }, /* R5891 (0x1703) - GPIO2 Control 2 */ + { 0x00001704, 0x2001 }, /* R5892 (0x1704) - GPIO3 Control 1 */ + { 0x00001705, 0xf000 }, /* R5893 (0x1705) - GPIO3 Control 2 */ + { 0x00001706, 0x2001 }, /* R5894 (0x1706) - GPIO4 Control 1 */ + { 0x00001707, 0xf000 }, /* R5895 (0x1707) - GPIO4 Control 2 */ + { 0x00001708, 0x2001 }, /* R5896 (0x1708) - GPIO5 Control 1 */ + { 0x00001709, 0xf000 }, /* R5897 (0x1709) - GPIO5 Control 2 */ + { 0x0000170a, 0x2001 }, /* R5898 (0x170a) - GPIO6 Control 1 */ + { 0x0000170b, 0xf000 }, /* R5899 (0x170b) - GPIO6 Control 2 */ + { 0x0000170c, 0x2001 }, /* R5900 (0x170c) - GPIO7 Control 1 */ + { 0x0000170d, 0xf000 }, /* R5901 (0x170d) - GPIO7 Control 2 */ + { 0x0000170e, 0x2001 }, /* R5902 (0x170e) - GPIO8 Control 1 */ + { 0x0000170f, 0xf000 }, /* R5903 (0x170f) - GPIO8 Control 2 */ + { 0x00001710, 0x2001 }, /* R5904 (0x1710) - GPIO9 Control 1 */ + { 0x00001711, 0xf000 }, /* R5905 (0x1711) - GPIO9 Control 2 */ + { 0x00001712, 0x2001 }, /* R5906 (0x1712) - GPIO10 Control 1 */ + { 0x00001713, 0xf000 }, /* R5907 (0x1713) - GPIO10 Control 2 */ + { 0x00001714, 0x2001 }, /* R5908 (0x1714) - GPIO11 Control 1 */ + { 0x00001715, 0xf000 }, /* R5909 (0x1715) - GPIO11 Control 2 */ + { 0x00001716, 0x2001 }, /* R5910 (0x1716) - GPIO12 Control 1 */ + { 0x00001717, 0xf000 }, /* R5911 (0x1717) - GPIO12 Control 2 */ + { 0x00001718, 0x2001 }, /* R5912 (0x1718) - GPIO13 Control 1 */ + { 0x00001719, 0xf000 }, /* R5913 (0x1719) - GPIO13 Control 2 */ + { 0x0000171A, 0x2001 }, /* R5914 (0x171A) - GPIO14 Control 1 */ + { 0x0000171B, 0xf000 }, /* R5915 (0x171B) - GPIO14 Control 2 */ + { 0x0000171C, 0x2001 }, /* R5916 (0x171C) - GPIO15 Control 1 */ + { 0x0000171D, 0xf000 }, /* R5917 (0x171D) - GPIO15 Control 2 */ + { 0x0000171E, 0x2001 }, /* R5918 (0x171E) - GPIO16 Control 1 */ + { 0x0000171F, 0xf000 }, /* R5919 (0x171F) - GPIO16 Control 2 */ + { 0x00001840, 0xffff }, /* R6208 (0x1840) - IRQ1 Mask 1 */ + { 0x00001841, 0xffff }, /* R6209 (0x1841) - IRQ1 Mask 2 */ + { 0x00001842, 0xffff }, /* R6210 (0x1842) - IRQ1 Mask 3 */ + { 0x00001843, 0xffff }, /* R6211 (0x1843) - IRQ1 Mask 4 */ + { 0x00001844, 0xffff }, /* R6212 (0x1844) - IRQ1 Mask 5 */ + { 0x00001845, 0xffff }, /* R6213 (0x1845) - IRQ1 Mask 6 */ + { 0x00001846, 0xffff }, /* R6214 (0x1846) - IRQ1 Mask 7 */ + { 0x00001847, 0xffff }, /* R6215 (0x1847) - IRQ1 Mask 8 */ + { 0x00001848, 0xffff }, /* R6216 (0x1848) - IRQ1 Mask 9 */ + { 0x00001849, 0xffff }, /* R6217 (0x1849) - IRQ1 Mask 10 */ + { 0x0000184a, 0xffff }, /* R6218 (0x184a) - IRQ1 Mask 11 */ + { 0x0000184b, 0xffff }, /* R6219 (0x184b) - IRQ1 Mask 12 */ + { 0x0000184c, 0xffff }, /* R6220 (0x184c) - IRQ1 Mask 13 */ + { 0x0000184d, 0xffff }, /* R6221 (0x184d) - IRQ1 Mask 14 */ + { 0x0000184e, 0xffff }, /* R6222 (0x184e) - IRQ1 Mask 15 */ + { 0x00001948, 0xffff }, /* R6472 (0x1948) - IRQ2 Mask 9 */ + { 0x00001a80, 0x4400 }, /* R6784 (0x1a80) - IRQ1 CTRL */ +}; + +static bool marley_is_adsp_memory(struct device *dev, unsigned int reg) +{ + if ((reg >= 0x080000 && reg <= 0x085ffe) || + (reg >= 0x0a0000 && reg <= 0x0a7ffe) || + (reg >= 0x0c0000 && reg <= 0x0c1ffe) || + (reg >= 0x0e0000 && reg <= 0x0e1ffe) || + (reg >= 0x100000 && reg <= 0x10effe) || + (reg >= 0x120000 && reg <= 0x12bffe) || + (reg >= 0x136000 && reg <= 0x137ffe) || + (reg >= 0x140000 && reg <= 0x14bffe) || + (reg >= 0x160000 && reg <= 0x161ffe) || + (reg >= 0x180000 && reg <= 0x18effe) || + (reg >= 0x1a0000 && reg <= 0x1b1ffe) || + (reg >= 0x1b6000 && reg <= 0x1b7ffe) || + (reg >= 0x1c0000 && reg <= 0x1cbffe) || + (reg >= 0x1e0000 && reg <= 0x1e1ffe)) + return true; + else + return false; +} + +static bool marley_16bit_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_SOFTWARE_RESET: + case ARIZONA_DEVICE_REVISION: + case ARIZONA_CTRL_IF_SPI_CFG_1: + case ARIZONA_CTRL_IF_I2C1_CFG_1: + case ARIZONA_WRITE_SEQUENCER_CTRL_0: + case ARIZONA_WRITE_SEQUENCER_CTRL_1: + case ARIZONA_WRITE_SEQUENCER_CTRL_2: + case ARIZONA_TONE_GENERATOR_1: + case ARIZONA_TONE_GENERATOR_2: + case ARIZONA_TONE_GENERATOR_3: + case ARIZONA_TONE_GENERATOR_4: + case ARIZONA_TONE_GENERATOR_5: + case ARIZONA_PWM_DRIVE_1: + case ARIZONA_PWM_DRIVE_2: + case ARIZONA_PWM_DRIVE_3: + case ARIZONA_SEQUENCE_CONTROL: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_1: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_4: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2: + case ARIZONA_HAPTICS_CONTROL_1: + case ARIZONA_HAPTICS_CONTROL_2: + case ARIZONA_HAPTICS_PHASE_1_INTENSITY: + case ARIZONA_HAPTICS_PHASE_1_DURATION: + case ARIZONA_HAPTICS_PHASE_2_INTENSITY: + case ARIZONA_HAPTICS_PHASE_2_DURATION: + case ARIZONA_HAPTICS_PHASE_3_INTENSITY: + case ARIZONA_HAPTICS_PHASE_3_DURATION: + case ARIZONA_HAPTICS_STATUS: + case CLEARWATER_COMFORT_NOISE_GENERATOR: + case ARIZONA_CLOCK_32K_1: + case ARIZONA_SYSTEM_CLOCK_1: + case ARIZONA_SAMPLE_RATE_1: + case ARIZONA_SAMPLE_RATE_2: + case ARIZONA_SAMPLE_RATE_3: + case ARIZONA_SAMPLE_RATE_1_STATUS: + case ARIZONA_SAMPLE_RATE_2_STATUS: + case ARIZONA_SAMPLE_RATE_3_STATUS: + case CLEARWATER_DSP_CLOCK_1: + case CLEARWATER_DSP_CLOCK_2: + case ARIZONA_OUTPUT_SYSTEM_CLOCK: + case ARIZONA_OUTPUT_ASYNC_CLOCK: + case ARIZONA_RATE_ESTIMATOR_1: + case ARIZONA_RATE_ESTIMATOR_2: + case ARIZONA_RATE_ESTIMATOR_3: + case ARIZONA_RATE_ESTIMATOR_4: + case ARIZONA_RATE_ESTIMATOR_5: + case ARIZONA_FLL1_CONTROL_1: + case ARIZONA_FLL1_CONTROL_2: + case ARIZONA_FLL1_CONTROL_3: + case ARIZONA_FLL1_CONTROL_4: + case ARIZONA_FLL1_CONTROL_5: + case ARIZONA_FLL1_CONTROL_6: + case ARIZONA_FLL1_CONTROL_7: + case ARIZONA_FLL1_LOOP_FILTER_TEST_1: + case ARIZONA_FLL1_NCO_TEST_0: + case MARLEY_FLL1_SYNCHRONISER_1: + case MARLEY_FLL1_SYNCHRONISER_2: + case MARLEY_FLL1_SYNCHRONISER_3: + case MARLEY_FLL1_SYNCHRONISER_4: + case MARLEY_FLL1_SYNCHRONISER_5: + case MARLEY_FLL1_SYNCHRONISER_6: + case MARLEY_FLL1_SYNCHRONISER_7: + case MARLEY_FLL1_SPREAD_SPECTRUM: + case MARLEY_FLL1_GPIO_CLOCK: + case ARIZONA_MIC_CHARGE_PUMP_1: + case CLEARWATER_CP_MODE: + case ARIZONA_LDO2_CONTROL_1: + case ARIZONA_MIC_BIAS_CTRL_1: + case ARIZONA_MIC_BIAS_CTRL_2: + case MARLEY_MIC_BIAS_CTRL_5: + case MARLEY_MIC_BIAS_CTRL_6: + case ARIZONA_HP_CTRL_1L: + case ARIZONA_HP_CTRL_1R: + case ARIZONA_DCS_HP1L_CONTROL: + case ARIZONA_DCS_HP1R_CONTROL: + case CLEARWATER_EDRE_HP_STEREO_CONTROL: + case ARIZONA_ACCESSORY_DETECT_MODE_1: + case ARIZONA_HEADPHONE_DETECT_1: + case ARIZONA_HEADPHONE_DETECT_2: + case ARIZONA_HEADPHONE_DETECT_3: + case ARIZONA_HP_DACVAL: + case CLEARWATER_MICD_CLAMP_CONTROL: + case ARIZONA_MIC_DETECT_1: + case ARIZONA_MIC_DETECT_2: + case ARIZONA_MIC_DETECT_3: + case ARIZONA_MIC_DETECT_4: + case ARIZONA_MIC_DETECT_LEVEL_1: + case ARIZONA_MIC_DETECT_LEVEL_2: + case ARIZONA_MIC_DETECT_LEVEL_3: + case ARIZONA_MIC_DETECT_LEVEL_4: + case ARIZONA_MIC_NOISE_MIX_CONTROL_1: + case CLEARWATER_GP_SWITCH_1: + case ARIZONA_JACK_DETECT_ANALOGUE: + case ARIZONA_INPUT_ENABLES: + case ARIZONA_INPUT_ENABLES_STATUS: + case ARIZONA_INPUT_RATE: + case ARIZONA_INPUT_VOLUME_RAMP: + case ARIZONA_HPF_CONTROL: + case ARIZONA_IN1L_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_1L: + case ARIZONA_DMIC1L_CONTROL: + case ARIZONA_IN1R_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_1R: + case ARIZONA_DMIC1R_CONTROL: + case ARIZONA_IN2L_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_2L: + case ARIZONA_DMIC2L_CONTROL: + case ARIZONA_IN2R_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_2R: + case ARIZONA_DMIC2R_CONTROL: + case ARIZONA_ADC_VCO_CAL_4: + case ARIZONA_ADC_VCO_CAL_5: + case ARIZONA_ADC_VCO_CAL_6: + case ARIZONA_ADC_VCO_CAL_7: + case ARIZONA_OUTPUT_ENABLES_1: + case ARIZONA_OUTPUT_STATUS_1: + case ARIZONA_OUTPUT_STANDBY_1: + case ARIZONA_RAW_OUTPUT_STATUS_1: + case ARIZONA_OUTPUT_RATE_1: + case ARIZONA_OUTPUT_VOLUME_RAMP: + case ARIZONA_OUTPUT_PATH_CONFIG_1L: + case ARIZONA_DAC_DIGITAL_VOLUME_1L: + case ARIZONA_DAC_VOLUME_LIMIT_1L: + case ARIZONA_NOISE_GATE_SELECT_1L: + case ARIZONA_OUTPUT_PATH_CONFIG_1R: + case ARIZONA_DAC_DIGITAL_VOLUME_1R: + case ARIZONA_DAC_VOLUME_LIMIT_1R: + case ARIZONA_NOISE_GATE_SELECT_1R: + case ARIZONA_OUTPUT_PATH_CONFIG_4L: + case ARIZONA_DAC_DIGITAL_VOLUME_4L: + case ARIZONA_OUT_VOLUME_4L: + case ARIZONA_NOISE_GATE_SELECT_4L: + case ARIZONA_OUTPUT_PATH_CONFIG_4R: + case ARIZONA_DAC_DIGITAL_VOLUME_4R: + case ARIZONA_OUT_VOLUME_4R: + case ARIZONA_NOISE_GATE_SELECT_4R: + case ARIZONA_OUTPUT_PATH_CONFIG_5L: + case ARIZONA_DAC_DIGITAL_VOLUME_5L: + case ARIZONA_DAC_VOLUME_LIMIT_5L: + case ARIZONA_NOISE_GATE_SELECT_5L: + case ARIZONA_OUTPUT_PATH_CONFIG_5R: + case ARIZONA_DAC_DIGITAL_VOLUME_5R: + case ARIZONA_DAC_VOLUME_LIMIT_5R: + case ARIZONA_NOISE_GATE_SELECT_5R: + case ARIZONA_DRE_ENABLE: + case CLEARWATER_EDRE_ENABLE: + case ARIZONA_DAC_AEC_CONTROL_1: + case ARIZONA_NOISE_GATE_CONTROL: + case ARIZONA_PDM_SPK1_CTRL_1: + case ARIZONA_PDM_SPK1_CTRL_2: + case ARIZONA_HP1_SHORT_CIRCUIT_CTRL: + case ARIZONA_HP_TEST_CTRL_5: + case ARIZONA_HP_TEST_CTRL_6: + case ARIZONA_SPK_CTRL_3: + case ARIZONA_AIF1_BCLK_CTRL: + case ARIZONA_AIF1_TX_PIN_CTRL: + case ARIZONA_AIF1_RX_PIN_CTRL: + case ARIZONA_AIF1_RATE_CTRL: + case ARIZONA_AIF1_FORMAT: + case ARIZONA_AIF1_TX_BCLK_RATE: + case ARIZONA_AIF1_RX_BCLK_RATE: + case ARIZONA_AIF1_FRAME_CTRL_1: + case ARIZONA_AIF1_FRAME_CTRL_2: + case ARIZONA_AIF1_FRAME_CTRL_3: + case ARIZONA_AIF1_FRAME_CTRL_4: + case ARIZONA_AIF1_FRAME_CTRL_5: + case ARIZONA_AIF1_FRAME_CTRL_6: + case ARIZONA_AIF1_FRAME_CTRL_7: + case ARIZONA_AIF1_FRAME_CTRL_8: + case ARIZONA_AIF1_FRAME_CTRL_11: + case ARIZONA_AIF1_FRAME_CTRL_12: + case ARIZONA_AIF1_FRAME_CTRL_13: + case ARIZONA_AIF1_FRAME_CTRL_14: + case ARIZONA_AIF1_FRAME_CTRL_15: + case ARIZONA_AIF1_FRAME_CTRL_16: + case ARIZONA_AIF1_TX_ENABLES: + case ARIZONA_AIF1_RX_ENABLES: + case ARIZONA_AIF2_BCLK_CTRL: + case ARIZONA_AIF2_TX_PIN_CTRL: + case ARIZONA_AIF2_RX_PIN_CTRL: + case ARIZONA_AIF2_RATE_CTRL: + case ARIZONA_AIF2_FORMAT: + case ARIZONA_AIF2_TX_BCLK_RATE: + case ARIZONA_AIF2_RX_BCLK_RATE: + case ARIZONA_AIF2_FRAME_CTRL_1: + case ARIZONA_AIF2_FRAME_CTRL_2: + case ARIZONA_AIF2_FRAME_CTRL_3: + case ARIZONA_AIF2_FRAME_CTRL_4: + case ARIZONA_AIF2_FRAME_CTRL_11: + case ARIZONA_AIF2_FRAME_CTRL_12: + case ARIZONA_AIF2_TX_ENABLES: + case ARIZONA_AIF2_RX_ENABLES: + case ARIZONA_AIF3_BCLK_CTRL: + case ARIZONA_AIF3_TX_PIN_CTRL: + case ARIZONA_AIF3_RX_PIN_CTRL: + case ARIZONA_AIF3_RATE_CTRL: + case ARIZONA_AIF3_FORMAT: + case ARIZONA_AIF3_TX_BCLK_RATE: + case ARIZONA_AIF3_RX_BCLK_RATE: + case ARIZONA_AIF3_FRAME_CTRL_1: + case ARIZONA_AIF3_FRAME_CTRL_2: + case ARIZONA_AIF3_FRAME_CTRL_3: + case ARIZONA_AIF3_FRAME_CTRL_4: + case ARIZONA_AIF3_FRAME_CTRL_11: + case ARIZONA_AIF3_FRAME_CTRL_12: + case ARIZONA_AIF3_TX_ENABLES: + case ARIZONA_AIF3_RX_ENABLES: + case ARIZONA_SPD1_TX_CONTROL: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_1: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_2: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_3: + case ARIZONA_SLIMBUS_FRAMER_REF_GEAR: + case ARIZONA_SLIMBUS_RATES_1: + case ARIZONA_SLIMBUS_RATES_2: + case ARIZONA_SLIMBUS_RATES_3: + case ARIZONA_SLIMBUS_RATES_5: + case ARIZONA_SLIMBUS_RATES_6: + case ARIZONA_SLIMBUS_RATES_7: + case ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE: + case ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE: + case ARIZONA_SLIMBUS_RX_PORT_STATUS: + case ARIZONA_SLIMBUS_TX_PORT_STATUS: + case ARIZONA_PWM1MIX_INPUT_1_SOURCE: + case ARIZONA_PWM1MIX_INPUT_1_VOLUME: + case ARIZONA_PWM1MIX_INPUT_2_SOURCE: + case ARIZONA_PWM1MIX_INPUT_2_VOLUME: + case ARIZONA_PWM1MIX_INPUT_3_SOURCE: + case ARIZONA_PWM1MIX_INPUT_3_VOLUME: + case ARIZONA_PWM1MIX_INPUT_4_SOURCE: + case ARIZONA_PWM1MIX_INPUT_4_VOLUME: + case ARIZONA_PWM2MIX_INPUT_1_SOURCE: + case ARIZONA_PWM2MIX_INPUT_1_VOLUME: + case ARIZONA_PWM2MIX_INPUT_2_SOURCE: + case ARIZONA_PWM2MIX_INPUT_2_VOLUME: + case ARIZONA_PWM2MIX_INPUT_3_SOURCE: + case ARIZONA_PWM2MIX_INPUT_3_VOLUME: + case ARIZONA_PWM2MIX_INPUT_4_SOURCE: + case ARIZONA_PWM2MIX_INPUT_4_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_1_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_1_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_2_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_2_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_3_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_3_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_4_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_4_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_1_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_1_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_2_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_2_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_3_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_3_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_4_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX1MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX1MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX1MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX1MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX1MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX1MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX1MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX2MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX2MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX2MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX2MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX2MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX2MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX2MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX3MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX3MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX3MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX3MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX3MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX3MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX3MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX4MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX4MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX4MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX4MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX4MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX4MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX4MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX5MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX5MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX5MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX5MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX5MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX5MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX5MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX6MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX6MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX6MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX6MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX6MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX6MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX6MIX_INPUT_4_VOLUME: + case ARIZONA_EQ1MIX_INPUT_1_SOURCE: + case ARIZONA_EQ1MIX_INPUT_1_VOLUME: + case ARIZONA_EQ1MIX_INPUT_2_SOURCE: + case ARIZONA_EQ1MIX_INPUT_2_VOLUME: + case ARIZONA_EQ1MIX_INPUT_3_SOURCE: + case ARIZONA_EQ1MIX_INPUT_3_VOLUME: + case ARIZONA_EQ1MIX_INPUT_4_SOURCE: + case ARIZONA_EQ1MIX_INPUT_4_VOLUME: + case ARIZONA_EQ2MIX_INPUT_1_SOURCE: + case ARIZONA_EQ2MIX_INPUT_1_VOLUME: + case ARIZONA_EQ2MIX_INPUT_2_SOURCE: + case ARIZONA_EQ2MIX_INPUT_2_VOLUME: + case ARIZONA_EQ2MIX_INPUT_3_SOURCE: + case ARIZONA_EQ2MIX_INPUT_3_VOLUME: + case ARIZONA_EQ2MIX_INPUT_4_SOURCE: + case ARIZONA_EQ2MIX_INPUT_4_VOLUME: + case ARIZONA_EQ3MIX_INPUT_1_SOURCE: + case ARIZONA_EQ3MIX_INPUT_1_VOLUME: + case ARIZONA_EQ3MIX_INPUT_2_SOURCE: + case ARIZONA_EQ3MIX_INPUT_2_VOLUME: + case ARIZONA_EQ3MIX_INPUT_3_SOURCE: + case ARIZONA_EQ3MIX_INPUT_3_VOLUME: + case ARIZONA_EQ3MIX_INPUT_4_SOURCE: + case ARIZONA_EQ3MIX_INPUT_4_VOLUME: + case ARIZONA_EQ4MIX_INPUT_1_SOURCE: + case ARIZONA_EQ4MIX_INPUT_1_VOLUME: + case ARIZONA_EQ4MIX_INPUT_2_SOURCE: + case ARIZONA_EQ4MIX_INPUT_2_VOLUME: + case ARIZONA_EQ4MIX_INPUT_3_SOURCE: + case ARIZONA_EQ4MIX_INPUT_3_VOLUME: + case ARIZONA_EQ4MIX_INPUT_4_SOURCE: + case ARIZONA_EQ4MIX_INPUT_4_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_1_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_1_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_2_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_2_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_3_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_3_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_4_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_4_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_1_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_1_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_2_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_2_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_3_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_3_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_4_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_4_VOLUME: + case ARIZONA_DRC2LMIX_INPUT_1_SOURCE: + case ARIZONA_DRC2LMIX_INPUT_1_VOLUME: + case ARIZONA_DRC2LMIX_INPUT_2_SOURCE: + case ARIZONA_DRC2LMIX_INPUT_2_VOLUME: + case ARIZONA_DRC2LMIX_INPUT_3_SOURCE: + case ARIZONA_DRC2LMIX_INPUT_3_VOLUME: + case ARIZONA_DRC2LMIX_INPUT_4_SOURCE: + case ARIZONA_DRC2LMIX_INPUT_4_VOLUME: + case ARIZONA_DRC2RMIX_INPUT_1_SOURCE: + case ARIZONA_DRC2RMIX_INPUT_1_VOLUME: + case ARIZONA_DRC2RMIX_INPUT_2_SOURCE: + case ARIZONA_DRC2RMIX_INPUT_2_VOLUME: + case ARIZONA_DRC2RMIX_INPUT_3_SOURCE: + case ARIZONA_DRC2RMIX_INPUT_3_VOLUME: + case ARIZONA_DRC2RMIX_INPUT_4_SOURCE: + case ARIZONA_DRC2RMIX_INPUT_4_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_4_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_4_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_4_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_4_VOLUME: + case ARIZONA_DSP1LMIX_INPUT_1_SOURCE: + case ARIZONA_DSP1LMIX_INPUT_1_VOLUME: + case ARIZONA_DSP1LMIX_INPUT_2_SOURCE: + case ARIZONA_DSP1LMIX_INPUT_2_VOLUME: + case ARIZONA_DSP1LMIX_INPUT_3_SOURCE: + case ARIZONA_DSP1LMIX_INPUT_3_VOLUME: + case ARIZONA_DSP1LMIX_INPUT_4_SOURCE: + case ARIZONA_DSP1LMIX_INPUT_4_VOLUME: + case ARIZONA_DSP1RMIX_INPUT_1_SOURCE: + case ARIZONA_DSP1RMIX_INPUT_1_VOLUME: + case ARIZONA_DSP1RMIX_INPUT_2_SOURCE: + case ARIZONA_DSP1RMIX_INPUT_2_VOLUME: + case ARIZONA_DSP1RMIX_INPUT_3_SOURCE: + case ARIZONA_DSP1RMIX_INPUT_3_VOLUME: + case ARIZONA_DSP1RMIX_INPUT_4_SOURCE: + case ARIZONA_DSP1RMIX_INPUT_4_VOLUME: + case ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE: + case ARIZONA_DSP1AUX2MIX_INPUT_1_SOURCE: + case ARIZONA_DSP1AUX3MIX_INPUT_1_SOURCE: + case ARIZONA_DSP1AUX4MIX_INPUT_1_SOURCE: + case ARIZONA_DSP1AUX5MIX_INPUT_1_SOURCE: + case ARIZONA_DSP1AUX6MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2LMIX_INPUT_1_SOURCE: + case ARIZONA_DSP2LMIX_INPUT_1_VOLUME: + case ARIZONA_DSP2LMIX_INPUT_2_SOURCE: + case ARIZONA_DSP2LMIX_INPUT_2_VOLUME: + case ARIZONA_DSP2LMIX_INPUT_3_SOURCE: + case ARIZONA_DSP2LMIX_INPUT_3_VOLUME: + case ARIZONA_DSP2LMIX_INPUT_4_SOURCE: + case ARIZONA_DSP2LMIX_INPUT_4_VOLUME: + case ARIZONA_DSP2RMIX_INPUT_1_SOURCE: + case ARIZONA_DSP2RMIX_INPUT_1_VOLUME: + case ARIZONA_DSP2RMIX_INPUT_2_SOURCE: + case ARIZONA_DSP2RMIX_INPUT_2_VOLUME: + case ARIZONA_DSP2RMIX_INPUT_3_SOURCE: + case ARIZONA_DSP2RMIX_INPUT_3_VOLUME: + case ARIZONA_DSP2RMIX_INPUT_4_SOURCE: + case ARIZONA_DSP2RMIX_INPUT_4_VOLUME: + case ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2AUX2MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2AUX3MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2AUX4MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2AUX5MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2AUX6MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3LMIX_INPUT_1_SOURCE: + case ARIZONA_DSP3LMIX_INPUT_1_VOLUME: + case ARIZONA_DSP3LMIX_INPUT_2_SOURCE: + case ARIZONA_DSP3LMIX_INPUT_2_VOLUME: + case ARIZONA_DSP3LMIX_INPUT_3_SOURCE: + case ARIZONA_DSP3LMIX_INPUT_3_VOLUME: + case ARIZONA_DSP3LMIX_INPUT_4_SOURCE: + case ARIZONA_DSP3LMIX_INPUT_4_VOLUME: + case ARIZONA_DSP3RMIX_INPUT_1_SOURCE: + case ARIZONA_DSP3RMIX_INPUT_1_VOLUME: + case ARIZONA_DSP3RMIX_INPUT_2_SOURCE: + case ARIZONA_DSP3RMIX_INPUT_2_VOLUME: + case ARIZONA_DSP3RMIX_INPUT_3_SOURCE: + case ARIZONA_DSP3RMIX_INPUT_3_VOLUME: + case ARIZONA_DSP3RMIX_INPUT_4_SOURCE: + case ARIZONA_DSP3RMIX_INPUT_4_VOLUME: + case ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3AUX2MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3AUX3MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3AUX4MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3AUX5MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3AUX6MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE: + case ARIZONA_FX_CTRL1: + case ARIZONA_FX_CTRL2: + case ARIZONA_EQ1_1: + case ARIZONA_EQ1_2: + case ARIZONA_EQ1_3: + case ARIZONA_EQ1_4: + case ARIZONA_EQ1_5: + case ARIZONA_EQ1_6: + case ARIZONA_EQ1_7: + case ARIZONA_EQ1_8: + case ARIZONA_EQ1_9: + case ARIZONA_EQ1_10: + case ARIZONA_EQ1_11: + case ARIZONA_EQ1_12: + case ARIZONA_EQ1_13: + case ARIZONA_EQ1_14: + case ARIZONA_EQ1_15: + case ARIZONA_EQ1_16: + case ARIZONA_EQ1_17: + case ARIZONA_EQ1_18: + case ARIZONA_EQ1_19: + case ARIZONA_EQ1_20: + case ARIZONA_EQ1_21: + case ARIZONA_EQ2_1: + case ARIZONA_EQ2_2: + case ARIZONA_EQ2_3: + case ARIZONA_EQ2_4: + case ARIZONA_EQ2_5: + case ARIZONA_EQ2_6: + case ARIZONA_EQ2_7: + case ARIZONA_EQ2_8: + case ARIZONA_EQ2_9: + case ARIZONA_EQ2_10: + case ARIZONA_EQ2_11: + case ARIZONA_EQ2_12: + case ARIZONA_EQ2_13: + case ARIZONA_EQ2_14: + case ARIZONA_EQ2_15: + case ARIZONA_EQ2_16: + case ARIZONA_EQ2_17: + case ARIZONA_EQ2_18: + case ARIZONA_EQ2_19: + case ARIZONA_EQ2_20: + case ARIZONA_EQ2_21: + case ARIZONA_EQ3_1: + case ARIZONA_EQ3_2: + case ARIZONA_EQ3_3: + case ARIZONA_EQ3_4: + case ARIZONA_EQ3_5: + case ARIZONA_EQ3_6: + case ARIZONA_EQ3_7: + case ARIZONA_EQ3_8: + case ARIZONA_EQ3_9: + case ARIZONA_EQ3_10: + case ARIZONA_EQ3_11: + case ARIZONA_EQ3_12: + case ARIZONA_EQ3_13: + case ARIZONA_EQ3_14: + case ARIZONA_EQ3_15: + case ARIZONA_EQ3_16: + case ARIZONA_EQ3_17: + case ARIZONA_EQ3_18: + case ARIZONA_EQ3_19: + case ARIZONA_EQ3_20: + case ARIZONA_EQ3_21: + case ARIZONA_EQ4_1: + case ARIZONA_EQ4_2: + case ARIZONA_EQ4_3: + case ARIZONA_EQ4_4: + case ARIZONA_EQ4_5: + case ARIZONA_EQ4_6: + case ARIZONA_EQ4_7: + case ARIZONA_EQ4_8: + case ARIZONA_EQ4_9: + case ARIZONA_EQ4_10: + case ARIZONA_EQ4_11: + case ARIZONA_EQ4_12: + case ARIZONA_EQ4_13: + case ARIZONA_EQ4_14: + case ARIZONA_EQ4_15: + case ARIZONA_EQ4_16: + case ARIZONA_EQ4_17: + case ARIZONA_EQ4_18: + case ARIZONA_EQ4_19: + case ARIZONA_EQ4_20: + case ARIZONA_EQ4_21: + case ARIZONA_DRC1_CTRL1: + case ARIZONA_DRC1_CTRL2: + case ARIZONA_DRC1_CTRL3: + case ARIZONA_DRC1_CTRL4: + case ARIZONA_DRC1_CTRL5: + case CLEARWATER_DRC2_CTRL1: + case CLEARWATER_DRC2_CTRL2: + case CLEARWATER_DRC2_CTRL3: + case CLEARWATER_DRC2_CTRL4: + case CLEARWATER_DRC2_CTRL5: + case ARIZONA_HPLPF1_1: + case ARIZONA_HPLPF1_2: + case ARIZONA_HPLPF2_1: + case ARIZONA_HPLPF2_2: + case ARIZONA_HPLPF3_1: + case ARIZONA_HPLPF3_2: + case ARIZONA_HPLPF4_1: + case ARIZONA_HPLPF4_2: + case ARIZONA_ISRC_1_CTRL_1: + case ARIZONA_ISRC_1_CTRL_2: + case ARIZONA_ISRC_1_CTRL_3: + case ARIZONA_ISRC_2_CTRL_1: + case ARIZONA_ISRC_2_CTRL_2: + case ARIZONA_ISRC_2_CTRL_3: + case CLEARWATER_DAC_COMP_1: + case CLEARWATER_DAC_COMP_2: + case CLEARWATER_FRF_COEFFICIENT_1L_1: + case CLEARWATER_FRF_COEFFICIENT_1L_2: + case CLEARWATER_FRF_COEFFICIENT_1L_3: + case CLEARWATER_FRF_COEFFICIENT_1L_4: + case CLEARWATER_FRF_COEFFICIENT_1R_1: + case CLEARWATER_FRF_COEFFICIENT_1R_2: + case CLEARWATER_FRF_COEFFICIENT_1R_3: + case CLEARWATER_FRF_COEFFICIENT_1R_4: + case MARLEY_FRF_COEFFICIENT_4L_1: + case MARLEY_FRF_COEFFICIENT_4L_2: + case MARLEY_FRF_COEFFICIENT_4L_3: + case MARLEY_FRF_COEFFICIENT_4L_4: + case MARLEY_FRF_COEFFICIENT_5L_1: + case MARLEY_FRF_COEFFICIENT_5L_2: + case MARLEY_FRF_COEFFICIENT_5L_3: + case MARLEY_FRF_COEFFICIENT_5L_4: + case MARLEY_FRF_COEFFICIENT_5R_1: + case MARLEY_FRF_COEFFICIENT_5R_2: + case MARLEY_FRF_COEFFICIENT_5R_3: + case MARLEY_FRF_COEFFICIENT_5R_4: + case CLEARWATER_GPIO1_CTRL_1: + case CLEARWATER_GPIO1_CTRL_2: + case CLEARWATER_GPIO2_CTRL_1: + case CLEARWATER_GPIO2_CTRL_2: + case CLEARWATER_GPIO3_CTRL_1: + case CLEARWATER_GPIO3_CTRL_2: + case CLEARWATER_GPIO4_CTRL_1: + case CLEARWATER_GPIO4_CTRL_2: + case CLEARWATER_GPIO5_CTRL_1: + case CLEARWATER_GPIO5_CTRL_2: + case CLEARWATER_GPIO6_CTRL_1: + case CLEARWATER_GPIO6_CTRL_2: + case CLEARWATER_GPIO7_CTRL_1: + case CLEARWATER_GPIO7_CTRL_2: + case CLEARWATER_GPIO8_CTRL_1: + case CLEARWATER_GPIO8_CTRL_2: + case CLEARWATER_GPIO9_CTRL_1: + case CLEARWATER_GPIO9_CTRL_2: + case CLEARWATER_GPIO10_CTRL_1: + case CLEARWATER_GPIO10_CTRL_2: + case CLEARWATER_GPIO11_CTRL_1: + case CLEARWATER_GPIO11_CTRL_2: + case CLEARWATER_GPIO12_CTRL_1: + case CLEARWATER_GPIO12_CTRL_2: + case CLEARWATER_GPIO13_CTRL_1: + case CLEARWATER_GPIO13_CTRL_2: + case CLEARWATER_GPIO14_CTRL_1: + case CLEARWATER_GPIO14_CTRL_2: + case CLEARWATER_GPIO15_CTRL_1: + case CLEARWATER_GPIO15_CTRL_2: + case CLEARWATER_GPIO16_CTRL_1: + case CLEARWATER_GPIO16_CTRL_2: + case CLEARWATER_IRQ1_STATUS_1: + case CLEARWATER_IRQ1_STATUS_2: + case CLEARWATER_IRQ1_STATUS_6: + case CLEARWATER_IRQ1_STATUS_7: + case CLEARWATER_IRQ1_STATUS_9: + case CLEARWATER_IRQ1_STATUS_11: + case CLEARWATER_IRQ1_STATUS_12: + case CLEARWATER_IRQ1_STATUS_13: + case CLEARWATER_IRQ1_STATUS_14: + case CLEARWATER_IRQ1_STATUS_15: + case CLEARWATER_IRQ1_STATUS_17: + case CLEARWATER_IRQ1_STATUS_21: + case CLEARWATER_IRQ1_STATUS_22: + case CLEARWATER_IRQ1_STATUS_23: + case CLEARWATER_IRQ1_STATUS_24: + case CLEARWATER_IRQ1_STATUS_25: + case CLEARWATER_IRQ1_STATUS_27: + case CLEARWATER_IRQ1_STATUS_28: + case CLEARWATER_IRQ1_STATUS_30: + case CLEARWATER_IRQ1_STATUS_31: + case CLEARWATER_IRQ1_STATUS_32: + case CLEARWATER_IRQ1_MASK_1: + case CLEARWATER_IRQ1_MASK_2: + case CLEARWATER_IRQ1_MASK_6: + case CLEARWATER_IRQ1_MASK_7: + case CLEARWATER_IRQ1_MASK_9: + case CLEARWATER_IRQ1_MASK_10: + case CLEARWATER_IRQ1_MASK_11: + case CLEARWATER_IRQ1_MASK_12: + case CLEARWATER_IRQ1_MASK_13: + case CLEARWATER_IRQ1_MASK_14: + case CLEARWATER_IRQ1_MASK_15: + case CLEARWATER_IRQ1_MASK_17: + case CLEARWATER_IRQ1_MASK_21: + case CLEARWATER_IRQ1_MASK_22: + case CLEARWATER_IRQ1_MASK_23: + case CLEARWATER_IRQ1_MASK_24: + case CLEARWATER_IRQ1_MASK_25: + case CLEARWATER_IRQ1_MASK_27: + case CLEARWATER_IRQ1_MASK_28: + case CLEARWATER_IRQ1_MASK_30: + case CLEARWATER_IRQ1_MASK_31: + case CLEARWATER_IRQ1_MASK_32: + case CLEARWATER_IRQ1_RAW_STATUS_1: + case CLEARWATER_IRQ1_RAW_STATUS_2: + case CLEARWATER_IRQ1_RAW_STATUS_7: + case CLEARWATER_IRQ1_RAW_STATUS_9: + case CLEARWATER_IRQ1_RAW_STATUS_12: + case CLEARWATER_IRQ1_RAW_STATUS_13: + case CLEARWATER_IRQ1_RAW_STATUS_14: + case CLEARWATER_IRQ1_RAW_STATUS_15: + case CLEARWATER_IRQ1_RAW_STATUS_17: + case CLEARWATER_IRQ1_RAW_STATUS_21: + case CLEARWATER_IRQ1_RAW_STATUS_22: + case CLEARWATER_IRQ1_RAW_STATUS_23: + case CLEARWATER_IRQ1_RAW_STATUS_24: + case CLEARWATER_IRQ1_RAW_STATUS_25: + case CLEARWATER_IRQ1_RAW_STATUS_30: + case CLEARWATER_IRQ1_RAW_STATUS_31: + case CLEARWATER_IRQ1_RAW_STATUS_32: + case CLEARWATER_IRQ2_STATUS_9: + case CLEARWATER_IRQ2_MASK_9: + case CLEARWATER_IRQ2_RAW_STATUS_9: + case CLEARWATER_IRQ1_CTRL: + return true; + default: + return false; + } +} + +static bool marley_16bit_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_SOFTWARE_RESET: + case ARIZONA_DEVICE_REVISION: + case ARIZONA_HAPTICS_STATUS: + case ARIZONA_SAMPLE_RATE_1_STATUS: + case ARIZONA_SAMPLE_RATE_2_STATUS: + case ARIZONA_SAMPLE_RATE_3_STATUS: + case ARIZONA_HP_CTRL_1L: + case ARIZONA_HP_CTRL_1R: + case ARIZONA_DCS_HP1L_CONTROL: + case ARIZONA_DCS_HP1R_CONTROL: + case ARIZONA_MIC_DETECT_3: + case ARIZONA_MIC_DETECT_4: + case ARIZONA_HEADPHONE_DETECT_2: + case ARIZONA_HEADPHONE_DETECT_3: + case ARIZONA_HP_DACVAL: + case ARIZONA_INPUT_ENABLES_STATUS: + case ARIZONA_OUTPUT_STATUS_1: + case ARIZONA_RAW_OUTPUT_STATUS_1: + case ARIZONA_ADC_VCO_CAL_4: + case ARIZONA_ADC_VCO_CAL_5: + case ARIZONA_ADC_VCO_CAL_6: + case ARIZONA_ADC_VCO_CAL_7: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_1: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_2: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_3: + case ARIZONA_SLIMBUS_RX_PORT_STATUS: + case ARIZONA_SLIMBUS_TX_PORT_STATUS: + case ARIZONA_FX_CTRL2: + case CLEARWATER_IRQ1_STATUS_1: + case CLEARWATER_IRQ1_STATUS_2: + case CLEARWATER_IRQ1_STATUS_6: + case CLEARWATER_IRQ1_STATUS_7: + case CLEARWATER_IRQ1_STATUS_9: + case CLEARWATER_IRQ1_STATUS_11: + case CLEARWATER_IRQ1_STATUS_12: + case CLEARWATER_IRQ1_STATUS_13: + case CLEARWATER_IRQ1_STATUS_14: + case CLEARWATER_IRQ1_STATUS_15: + case CLEARWATER_IRQ1_STATUS_17: + case CLEARWATER_IRQ1_STATUS_21: + case CLEARWATER_IRQ1_STATUS_22: + case CLEARWATER_IRQ1_STATUS_23: + case CLEARWATER_IRQ1_STATUS_24: + case CLEARWATER_IRQ1_STATUS_25: + case CLEARWATER_IRQ1_STATUS_27: + case CLEARWATER_IRQ1_STATUS_28: + case CLEARWATER_IRQ1_STATUS_30: + case CLEARWATER_IRQ1_STATUS_31: + case CLEARWATER_IRQ1_STATUS_32: + case CLEARWATER_IRQ1_RAW_STATUS_1: + case CLEARWATER_IRQ1_RAW_STATUS_2: + case CLEARWATER_IRQ1_RAW_STATUS_7: + case CLEARWATER_IRQ1_RAW_STATUS_9: + case CLEARWATER_IRQ1_RAW_STATUS_12: + case CLEARWATER_IRQ1_RAW_STATUS_13: + case CLEARWATER_IRQ1_RAW_STATUS_14: + case CLEARWATER_IRQ1_RAW_STATUS_15: + case CLEARWATER_IRQ1_RAW_STATUS_17: + case CLEARWATER_IRQ1_RAW_STATUS_21: + case CLEARWATER_IRQ1_RAW_STATUS_22: + case CLEARWATER_IRQ1_RAW_STATUS_23: + case CLEARWATER_IRQ1_RAW_STATUS_24: + case CLEARWATER_IRQ1_RAW_STATUS_25: + case CLEARWATER_IRQ1_RAW_STATUS_30: + case CLEARWATER_IRQ1_RAW_STATUS_31: + case CLEARWATER_IRQ1_RAW_STATUS_32: + case CLEARWATER_IRQ2_STATUS_9: + case CLEARWATER_IRQ2_RAW_STATUS_9: + return true; + default: + return false; + } +} + +static bool marley_32bit_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_WSEQ_SEQUENCE_1 ... ARIZONA_WSEQ_SEQUENCE_252: + case MARLEY_OTP_HPDET_CALIB_1 ... MARLEY_OTP_HPDET_CALIB_2: + case CLEARWATER_DSP1_CONFIG ... CLEARWATER_DSP1_SCRATCH_3: + case CLEARWATER_DSP2_CONFIG ... CLEARWATER_DSP2_SCRATCH_3: + case CLEARWATER_DSP3_CONFIG ... CLEARWATER_DSP3_SCRATCH_3: + return true; + default: + return marley_is_adsp_memory(dev, reg); + } +} + +static bool marley_32bit_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_WSEQ_SEQUENCE_1 ... ARIZONA_WSEQ_SEQUENCE_252: + case MARLEY_OTP_HPDET_CALIB_1 ... MARLEY_OTP_HPDET_CALIB_2: + case CLEARWATER_DSP1_CONFIG ... CLEARWATER_DSP1_SCRATCH_3: + case CLEARWATER_DSP2_CONFIG ... CLEARWATER_DSP2_SCRATCH_3: + case CLEARWATER_DSP3_CONFIG ... CLEARWATER_DSP3_SCRATCH_3: + return true; + default: + return marley_is_adsp_memory(dev, reg); + } +} + +const struct regmap_config marley_16bit_spi_regmap = { + .name = "marley_16bit", + .reg_bits = 32, + .pad_bits = 16, + .val_bits = 16, + + .max_register = 0x1b00, + .readable_reg = marley_16bit_readable_register, + .volatile_reg = marley_16bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = marley_reg_default, + .num_reg_defaults = ARRAY_SIZE(marley_reg_default), +}; +EXPORT_SYMBOL_GPL(marley_16bit_spi_regmap); + +const struct regmap_config marley_16bit_i2c_regmap = { + .name = "marley_16bit", + .reg_bits = 32, + .val_bits = 16, + + .max_register = 0x1b00, + .readable_reg = marley_16bit_readable_register, + .volatile_reg = marley_16bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = marley_reg_default, + .num_reg_defaults = ARRAY_SIZE(marley_reg_default), +}; +EXPORT_SYMBOL_GPL(marley_16bit_i2c_regmap); + +const struct regmap_config marley_32bit_spi_regmap = { + .name = "marley_32bit", + .reg_bits = 32, + .reg_stride = 2, + .pad_bits = 16, + .val_bits = 32, + + .max_register = CLEARWATER_DSP3_SCRATCH_3, + .readable_reg = marley_32bit_readable_register, + .volatile_reg = marley_32bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, +}; +EXPORT_SYMBOL_GPL(marley_32bit_spi_regmap); + +const struct regmap_config marley_32bit_i2c_regmap = { + .name = "marley_32bit", + .reg_bits = 32, + .reg_stride = 2, + .val_bits = 32, + + .max_register = CLEARWATER_DSP3_SCRATCH_3, + .readable_reg = marley_32bit_readable_register, + .volatile_reg = marley_32bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, +}; +EXPORT_SYMBOL_GPL(marley_32bit_i2c_regmap); diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 7501132ff5e..feb9a5789e8 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -32,6 +32,7 @@ enum arizona_type { WM1840 = 8, WM1831 = 9, CS47L24 = 10, + CS47L35 = 11, }; #define ARIZONA_IRQ_GP1 0 @@ -196,6 +197,7 @@ int wm8997_patch(struct arizona *arizona); int vegas_patch(struct arizona *arizona); int clearwater_patch(struct arizona *arizona); int largo_patch(struct arizona *arizona); +int marley_patch(struct arizona *arizona); extern int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, bool mandatory); diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 358fc78d40e..753c1b00efe 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -105,6 +105,15 @@ #define ARIZONA_FLL1_SYNCHRONISER_7 0x187 #define ARIZONA_FLL1_SPREAD_SPECTRUM 0x189 #define ARIZONA_FLL1_GPIO_CLOCK 0x18A +#define MARLEY_FLL1_SYNCHRONISER_1 0x17F +#define MARLEY_FLL1_SYNCHRONISER_2 0x180 +#define MARLEY_FLL1_SYNCHRONISER_3 0x181 +#define MARLEY_FLL1_SYNCHRONISER_4 0x182 +#define MARLEY_FLL1_SYNCHRONISER_5 0x183 +#define MARLEY_FLL1_SYNCHRONISER_6 0x184 +#define MARLEY_FLL1_SYNCHRONISER_7 0x185 +#define MARLEY_FLL1_SPREAD_SPECTRUM 0x187 +#define MARLEY_FLL1_GPIO_CLOCK 0x188 #define ARIZONA_FLL2_CONTROL_1 0x191 #define ARIZONA_FLL2_CONTROL_2 0x192 #define ARIZONA_FLL2_CONTROL_3 0x193 @@ -150,6 +159,8 @@ #define ARIZONA_MIC_BIAS_CTRL_2 0x219 #define ARIZONA_MIC_BIAS_CTRL_3 0x21A #define ARIZONA_MIC_BIAS_CTRL_4 0x21B +#define MARLEY_MIC_BIAS_CTRL_5 0x21C +#define MARLEY_MIC_BIAS_CTRL_6 0x21E #define ARIZONA_HP_CTRL_1L 0x225 #define ARIZONA_HP_CTRL_1R 0x226 #define ARIZONA_HP_CTRL_2L 0x227 @@ -1421,6 +1432,18 @@ #define CLEARWATER_FRF_COEFFICIENT_6R_2 0x1431 #define CLEARWATER_FRF_COEFFICIENT_6R_3 0x1432 #define CLEARWATER_FRF_COEFFICIENT_6R_4 0x1433 +#define MARLEY_FRF_COEFFICIENT_4L_1 0x13A0 +#define MARLEY_FRF_COEFFICIENT_4L_2 0x13A1 +#define MARLEY_FRF_COEFFICIENT_4L_3 0x13A2 +#define MARLEY_FRF_COEFFICIENT_4L_4 0x13A3 +#define MARLEY_FRF_COEFFICIENT_5L_1 0x13B0 +#define MARLEY_FRF_COEFFICIENT_5L_2 0x13B1 +#define MARLEY_FRF_COEFFICIENT_5L_3 0x13B2 +#define MARLEY_FRF_COEFFICIENT_5L_4 0x13B3 +#define MARLEY_FRF_COEFFICIENT_5R_1 0x13C0 +#define MARLEY_FRF_COEFFICIENT_5R_2 0x13C1 +#define MARLEY_FRF_COEFFICIENT_5R_3 0x13C2 +#define MARLEY_FRF_COEFFICIENT_5R_4 0x13C3 #define ARIZONA_DSP4_CONTROL_1 0x1400 #define ARIZONA_DSP4_CLOCKING_1 0x1401 #define ARIZONA_DSP4_STATUS_1 0x1404 @@ -2199,6 +2222,8 @@ #define ARIZONA_WSEQ_SEQUENCE_506 0x33F2 #define ARIZONA_WSEQ_SEQUENCE_507 0x33F4 #define ARIZONA_WSEQ_SEQUENCE_508 0x33F6 +#define MARLEY_OTP_HPDET_CALIB_1 0x31F8 +#define MARLEY_OTP_HPDET_CALIB_2 0x31FA #define CLEARWATER_OTP_HPDET_CALIB_1 0x33F8 #define CLEARWATER_OTP_HPDET_CALIB_2 0x33FA #define CLEARWATER_DSP1_CONFIG 0x0FFE00 From 7bcbb95328ea5b632aaba20f5d480e735093bc90 Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Tue, 14 Apr 2015 13:22:55 +0100 Subject: [PATCH 0748/1167] gpio: arizona: Adding case to handle marley Change-Id: I951ab6ce62d7e1cfe600a3ea5d0eef0cec0cf687 Signed-off-by: Piotr Stankiewicz --- drivers/gpio/gpio-arizona.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpio/gpio-arizona.c b/drivers/gpio/gpio-arizona.c index 7750b93f198..5690d16bf9b 100644 --- a/drivers/gpio/gpio-arizona.c +++ b/drivers/gpio/gpio-arizona.c @@ -203,6 +203,16 @@ static int arizona_gpio_probe(struct platform_device *pdev) case CS47L24: arizona_gpio->gpio_chip.ngpio = 2; break; + case CS47L35: + arizona_gpio->gpio_chip.direction_input = + clearwater_gpio_direction_in; + arizona_gpio->gpio_chip.get = clearwater_gpio_get; + arizona_gpio->gpio_chip.direction_output = + clearwater_gpio_direction_out; + arizona_gpio->gpio_chip.set = clearwater_gpio_set; + + arizona_gpio->gpio_chip.ngpio = 16; + break; default: dev_err(&pdev->dev, "Unknown chip variant %d\n", arizona->type); From 0e7fa7b9a79deeb308e57db0a73538d2c9efbebb Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Wed, 22 Apr 2015 15:25:36 +0100 Subject: [PATCH 0749/1167] switch: arizona: handling Marley Change-Id: I56c4a2dd376a3828c6e87ed5b7da0fa848a7f2ee Signed-off-by: Piotr Stankiewicz --- drivers/switch/switch-arizona.c | 54 +++++++++++++++++++++++++-------- 1 file changed, 42 insertions(+), 12 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 18ca9a4848b..1c683092d4f 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -313,6 +313,7 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, break; case WM8285: case WM1840: + case CS47L35: edre_reg = CLEARWATER_EDRE_MANUAL; mask = ARIZONA_HP1L_SHRTO | ARIZONA_HP1L_FLWR | ARIZONA_HP1L_SHRTI; @@ -405,17 +406,33 @@ static void arizona_extcon_set_mode(struct arizona_extcon_info *info, int mode) static const char *arizona_extcon_get_micbias(struct arizona_extcon_info *info) { - switch (info->micd_modes[0].bias) { - case 1: - return "MICBIAS1"; - case 2: - return "MICBIAS2"; - case 3: - return "MICBIAS3"; - case 4: - return "MICBIAS4"; + struct arizona *arizona = info->arizona; + + switch (arizona->type) { + case CS47L35: + switch (info->micd_modes[0].bias) { + case 1: + return "MICBIAS1A"; + case 2: + return "MICBIAS1B"; + case 3: + return "MICBIAS2A"; + default: + return "MICVDD"; + } default: - return "MICVDD"; + switch (info->micd_modes[0].bias) { + case 1: + return "MICBIAS1"; + case 2: + return "MICBIAS2"; + case 3: + return "MICBIAS3"; + case 4: + return "MICBIAS4"; + default: + return "MICVDD"; + } } } @@ -3048,9 +3065,21 @@ static int arizona_hpdet_clearwater_read_calibration(struct arizona_extcon_info struct arizona_hpdet_d_trims *trims; int ret = -EIO; unsigned int offset, gradient, interim_val; + unsigned int otp_hpdet_calib_1, otp_hpdet_calib_2; + + switch (arizona->type) { + case CS47L35: + otp_hpdet_calib_1 = MARLEY_OTP_HPDET_CALIB_1; + otp_hpdet_calib_2 = MARLEY_OTP_HPDET_CALIB_2; + break; + default: + otp_hpdet_calib_1 = CLEARWATER_OTP_HPDET_CALIB_1; + otp_hpdet_calib_2 = CLEARWATER_OTP_HPDET_CALIB_2; + break; + } ret = regmap_read(arizona->regmap_32bit, - CLEARWATER_OTP_HPDET_CALIB_1, + otp_hpdet_calib_1, &offset); if (ret != 0) { dev_err(arizona->dev, "Failed to read HP CALIB OFFSET value: %d\n", @@ -3059,7 +3088,7 @@ static int arizona_hpdet_clearwater_read_calibration(struct arizona_extcon_info } ret = regmap_read(arizona->regmap_32bit, - CLEARWATER_OTP_HPDET_CALIB_2, + otp_hpdet_calib_2, &gradient); if (ret != 0) { dev_err(arizona->dev, "Failed to read HP CALIB OFFSET value: %d\n", @@ -3293,6 +3322,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; case WM8285: case WM1840: + case CS47L35: info->micd_clamp = true; info->hpdet_ip = 4; break; From 38877bbb385f94248b48749df0dc8ca3627eb2fe Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Thu, 23 Apr 2015 09:53:47 +0100 Subject: [PATCH 0750/1167] extcon: arizona: handling Marley Change-Id: I97c74363d4f8b10974bbfaf9f03a405a41ee059d Signed-off-by: Piotr Stankiewicz --- drivers/extcon/extcon-arizona.c | 36 ++++++++++++++++++++++++--------- 1 file changed, 26 insertions(+), 10 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 33ea78d083d..e84f5716bc5 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -252,17 +252,33 @@ static void arizona_extcon_set_mode(struct arizona_extcon_info *info, int mode) static const char *arizona_extcon_get_micbias(struct arizona_extcon_info *info) { - switch (info->micd_modes[0].bias) { - case 1: - return "MICBIAS1"; - case 2: - return "MICBIAS2"; - case 3: - return "MICBIAS3"; - case 4: - return "MICBIAS4"; + struct arizona *arizona = info->arizona; + + switch (arizona->type) { + case CS47L35: + switch (info->micd_modes[0].bias) { + case 1: + return "MICBIAS1A"; + case 2: + return "MICBIAS1B"; + case 3: + return "MICBIAS2A"; + default: + return "MICVDD"; + } default: - return "MICVDD"; + switch (info->micd_modes[0].bias) { + case 1: + return "MICBIAS1"; + case 2: + return "MICBIAS2"; + case 3: + return "MICBIAS3"; + case 4: + return "MICBIAS4"; + default: + return "MICVDD"; + } } } From ebd9d70386ed280e0aa386a4a2f07a6b6cef4b34 Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Wed, 25 Mar 2015 15:38:47 +0000 Subject: [PATCH 0751/1167] ASoC: marley: Initial commit of Marley codec driver Change-Id: Id0d77e90edcbc3e28bbcb9f627941af263cdeaa2 Signed-off-by: Piotr Stankiewicz Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/Kconfig | 8 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/arizona.c | 35 +- sound/soc/codecs/marley.c | 2180 ++++++++++++++++++++++++++++++++++++ sound/soc/codecs/marley.h | 21 + 5 files changed, 2244 insertions(+), 2 deletions(-) create mode 100644 sound/soc/codecs/marley.c create mode 100644 sound/soc/codecs/marley.h diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 601be7508b4..8bd61cd8a9f 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -85,6 +85,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_WM5102 if MFD_WM5102 select SND_SOC_FLORIDA if MFD_FLORIDA select SND_SOC_CLEARWATER if MFD_CLEARWATER + select SND_SOC_MARLEY if MFD_MARLEY select SND_SOC_WM8350 if MFD_WM8350 select SND_SOC_WM8400 if MFD_WM8400 select SND_SOC_WM8510 if SND_SOC_I2C_AND_SPI @@ -148,12 +149,14 @@ config SND_SOC_ARIZONA default y if SND_SOC_WM5102=y default y if SND_SOC_FLORIDA=y default y if SND_SOC_CLEARWATER=y + default y if SND_SOC_MARLEY=y default y if SND_SOC_WM8997=y default y if SND_SOC_VEGAS=y default y if SND_SOC_LARGO=y default m if SND_SOC_WM5102=m default m if SND_SOC_FLORIDA=m default m if SND_SOC_CLEARWATER=m + default m if SND_SOC_MARLEY=m default m if SND_SOC_WM8997=m default m if SND_SOC_VEGAS=m default m if SND_SOC_LARGO=m @@ -170,11 +173,13 @@ config SND_SOC_WM_ADSP default y if SND_SOC_CLEARWATER=y default y if SND_SOC_WM2200=y default y if SND_SOC_LARGO=y + default y if SND_SOC_MARLEY=y default m if SND_SOC_WM5102=m default m if SND_SOC_FLORIDA=m default m if SND_SOC_CLEARWATER=m default m if SND_SOC_WM2200=m default m if SND_SOC_LARGO=m + default m if SND_SOC_MARLEY=m config SND_SOC_AB8500_CODEC tristate @@ -405,6 +410,9 @@ config SND_SOC_FLORIDA config SND_SOC_CLEARWATER tristate +config SND_SOC_MARLEY + tristate + config SND_SOC_WM8350 tristate diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 10185ac84de..dbc52a10acc 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -77,6 +77,7 @@ snd-soc-wm5100-objs := wm5100.o wm5100-tables.o snd-soc-wm5102-objs := wm5102.o snd-soc-florida-objs := florida.o snd-soc-clearwater-objs := clearwater.o +snd-soc-marley-objs := marley.o snd-soc-wm8350-objs := wm8350.o snd-soc-wm8400-objs := wm8400.o snd-soc-wm8510-objs := wm8510.o @@ -204,6 +205,7 @@ obj-$(CONFIG_SND_SOC_WM5100) += snd-soc-wm5100.o obj-$(CONFIG_SND_SOC_WM5102) += snd-soc-wm5102.o obj-$(CONFIG_SND_SOC_FLORIDA) += snd-soc-florida.o obj-$(CONFIG_SND_SOC_CLEARWATER) += snd-soc-clearwater.o +obj-$(CONFIG_SND_SOC_MARLEY) += snd-soc-marley.o obj-$(CONFIG_SND_SOC_WM8350) += snd-soc-wm8350.o obj-$(CONFIG_SND_SOC_WM8400) += snd-soc-wm8400.o obj-$(CONFIG_SND_SOC_WM8510) += snd-soc-wm8510.o diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index e7b715404e4..ecf4f85f853 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -416,6 +416,7 @@ int arizona_init_spk(struct snd_soc_codec *codec) case WM8997: case WM1831: case CS47L24: + case CS47L35: break; default: ret = snd_soc_dapm_new_controls(&codec->dapm, @@ -560,6 +561,13 @@ static const char * const arizona_dmic_refs[] = { "MICBIAS3", }; +static const char * const marley_dmic_refs[] = { + "MICVDD", + "MICBIAS1B", + "MICBIAS2A", + "MICBIAS2B", +}; + static const char * const arizona_dmic_inputs[] = { "IN1L", "IN1R", @@ -586,6 +594,13 @@ static const char * const clearwater_dmic_inputs[] = { "IN6R", }; +static const char * const marley_dmic_inputs[] = { + "IN1L Mux", + "IN1R Mux", + "IN2L", + "IN2R", +}; + int arizona_init_input(struct snd_soc_codec *codec) { struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); @@ -597,8 +612,18 @@ int arizona_init_input(struct snd_soc_codec *codec) memset(&routes, 0, sizeof(routes)); for (i = 0; i < priv->num_inputs / 2; ++i) { - routes[0].source = arizona_dmic_refs[pdata->dmic_ref[i]]; - routes[1].source = arizona_dmic_refs[pdata->dmic_ref[i]]; + switch (arizona->type) { + case CS47L35: + routes[0].source = marley_dmic_refs[pdata->dmic_ref[i]]; + routes[1].source = marley_dmic_refs[pdata->dmic_ref[i]]; + break; + default: + routes[0].source = + arizona_dmic_refs[pdata->dmic_ref[i]]; + routes[1].source = + arizona_dmic_refs[pdata->dmic_ref[i]]; + break; + } switch (arizona->type) { case WM8285: @@ -606,6 +631,10 @@ int arizona_init_input(struct snd_soc_codec *codec) routes[0].sink = clearwater_dmic_inputs[i * 2]; routes[1].sink = clearwater_dmic_inputs[(i * 2) + 1]; break; + case CS47L35: + routes[0].sink = marley_dmic_inputs[i * 2]; + routes[1].sink = marley_dmic_inputs[(i * 2) + 1]; + break; default: routes[0].sink = arizona_dmic_inputs[i * 2]; routes[1].sink = arizona_dmic_inputs[(i * 2) + 1]; @@ -2255,6 +2284,7 @@ int arizona_out_ev(struct snd_soc_dapm_widget *w, break; case WM8285: case WM1840: + case CS47L35: clearwater_hp_post_enable(w); break; default: @@ -2334,6 +2364,7 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, break; case WM8285: case WM1840: + case CS47L35: ret = arizona_out_ev(w, kcontrol, event); clearwater_hp_post_disable(w); break; diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c new file mode 100644 index 00000000000..3398852ba65 --- /dev/null +++ b/sound/soc/codecs/marley.c @@ -0,0 +1,2180 @@ +/* + * marley.c -- ALSA SoC Audio driver for Marley class devices + * + * Copyright 2015 Cirrus Logic + * + * Author: Piotr Stankiewicz + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "arizona.h" +#include "wm_adsp.h" +#include "marley.h" + +#define MARLEY_NUM_ADSP 3 + +#define MARLEY_DEFAULT_FRAGMENTS 1 +#define MARLEY_DEFAULT_FRAGMENT_SIZE 4096 + +#define MARLEY_FRF_COEFFICIENT_LEN 4 + +#define MARLEY_FLL_COUNT 1 + +static int marley_frf_bytes_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); + +#define MARLEY_FRF_BYTES(xname, xbase, xregs) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ + .info = snd_soc_bytes_info, .get = snd_soc_bytes_get, \ + .put = marley_frf_bytes_put, .private_value = \ + ((unsigned long)&(struct soc_bytes) \ + {.base = xbase, .num_regs = xregs }) } + +/* 2 mixer inputs with a stride of n in the register address */ +#define MARLEY_MIXER_INPUTS_2_N(_reg, n) \ + (_reg), \ + (_reg) + (1 * (n)) + +/* 4 mixer inputs with a stride of n in the register address */ +#define MARLEY_MIXER_INPUTS_4_N(_reg, n) \ + MARLEY_MIXER_INPUTS_2_N(_reg, n), \ + MARLEY_MIXER_INPUTS_2_N(_reg + (2 * n), n) + +#define MARLEY_DSP_MIXER_INPUTS(_reg) \ + MARLEY_MIXER_INPUTS_4_N(_reg, 2), \ + MARLEY_MIXER_INPUTS_4_N(_reg + 8, 2), \ + MARLEY_MIXER_INPUTS_4_N(_reg + 16, 8), \ + MARLEY_MIXER_INPUTS_2_N(_reg + 48, 8) + +static const int marley_fx_inputs[] = { + MARLEY_MIXER_INPUTS_4_N(ARIZONA_EQ1MIX_INPUT_1_SOURCE, 2), + MARLEY_MIXER_INPUTS_4_N(ARIZONA_EQ2MIX_INPUT_1_SOURCE, 2), + MARLEY_MIXER_INPUTS_4_N(ARIZONA_EQ3MIX_INPUT_1_SOURCE, 2), + MARLEY_MIXER_INPUTS_4_N(ARIZONA_EQ4MIX_INPUT_1_SOURCE, 2), + MARLEY_MIXER_INPUTS_4_N(ARIZONA_DRC1LMIX_INPUT_1_SOURCE, 2), + MARLEY_MIXER_INPUTS_4_N(ARIZONA_DRC1RMIX_INPUT_1_SOURCE, 2), + MARLEY_MIXER_INPUTS_4_N(ARIZONA_DRC2LMIX_INPUT_1_SOURCE, 2), + MARLEY_MIXER_INPUTS_4_N(ARIZONA_DRC2RMIX_INPUT_1_SOURCE, 2), + MARLEY_MIXER_INPUTS_4_N(ARIZONA_HPLP1MIX_INPUT_1_SOURCE, 2), + MARLEY_MIXER_INPUTS_4_N(ARIZONA_HPLP2MIX_INPUT_1_SOURCE, 2), + MARLEY_MIXER_INPUTS_4_N(ARIZONA_HPLP3MIX_INPUT_1_SOURCE, 2), + MARLEY_MIXER_INPUTS_4_N(ARIZONA_HPLP4MIX_INPUT_1_SOURCE, 2), +}; + +static const int marley_isrc1_fsl_inputs[] = { + MARLEY_MIXER_INPUTS_4_N(ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE, 8), +}; + +static const int marley_isrc1_fsh_inputs[] = { + MARLEY_MIXER_INPUTS_4_N(ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE, 8), +}; + +static const int marley_isrc2_fsl_inputs[] = { + MARLEY_MIXER_INPUTS_4_N(ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE, 8), +}; + +static const int marley_isrc2_fsh_inputs[] = { + MARLEY_MIXER_INPUTS_4_N(ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE, 8), +}; + +static const int marley_out_inputs[] = { + MARLEY_MIXER_INPUTS_4_N(ARIZONA_OUT1LMIX_INPUT_1_SOURCE, 2), + MARLEY_MIXER_INPUTS_4_N(ARIZONA_OUT1RMIX_INPUT_1_SOURCE, 2), + MARLEY_MIXER_INPUTS_4_N(ARIZONA_OUT4LMIX_INPUT_1_SOURCE, 2), + MARLEY_MIXER_INPUTS_4_N(ARIZONA_OUT5LMIX_INPUT_1_SOURCE, 2), + MARLEY_MIXER_INPUTS_4_N(ARIZONA_OUT5RMIX_INPUT_1_SOURCE, 2), +}; + +static const int marley_spd1_inputs[] = { + MARLEY_MIXER_INPUTS_2_N(ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE, 8), +}; + +static const int marley_dsp1_inputs[] = { + MARLEY_DSP_MIXER_INPUTS(ARIZONA_DSP1LMIX_INPUT_1_SOURCE), +}; + +static const int marley_dsp2_inputs[] = { + MARLEY_DSP_MIXER_INPUTS(ARIZONA_DSP2LMIX_INPUT_1_SOURCE), +}; + +static const int marley_dsp3_inputs[] = { + MARLEY_DSP_MIXER_INPUTS(ARIZONA_DSP3LMIX_INPUT_1_SOURCE), +}; + +static int marley_rate_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); + +#define MARLEY_RATE_ENUM(xname, xenum) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\ + .info = snd_soc_info_enum_double, \ + .get = snd_soc_get_value_enum_double, .put = marley_rate_put, \ + .private_value = (unsigned long)&xenum } + +struct marley_compr { + struct mutex lock; + + struct snd_compr_stream *stream; + struct wm_adsp *adsp; + + size_t total_copied; + bool allocated; + bool trig; +}; + +struct marley_priv { + struct arizona_priv core; + struct arizona_fll fll[MARLEY_FLL_COUNT]; + struct marley_compr compr_info; + + struct mutex fw_lock; +}; + +static const struct wm_adsp_region marley_dsp1_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x080000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x0e0000 }, + { .type = WMFW_ADSP2_XM, .base = 0x0a0000 }, + { .type = WMFW_ADSP2_YM, .base = 0x0c0000 }, +}; + +static const struct wm_adsp_region marley_dsp2_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x100000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x160000 }, + { .type = WMFW_ADSP2_XM, .base = 0x120000 }, + { .type = WMFW_ADSP2_YM, .base = 0x140000 }, +}; + +static const struct wm_adsp_region marley_dsp3_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x180000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x1e0000 }, + { .type = WMFW_ADSP2_XM, .base = 0x1a0000 }, + { .type = WMFW_ADSP2_YM, .base = 0x1c0000 }, +}; + +static const struct wm_adsp_region *marley_dsp_regions[] = { + marley_dsp1_regions, + marley_dsp2_regions, + marley_dsp3_regions, +}; + +static const int wm_adsp2_control_bases[] = { + CLEARWATER_DSP1_CONFIG, + CLEARWATER_DSP2_CONFIG, + CLEARWATER_DSP3_CONFIG, +}; + +static const char * const marley_inmux_texts[] = { + "A", + "B", +}; + +static const SOC_ENUM_SINGLE_DECL(marley_in1muxl_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_SRC_SHIFT, + marley_inmux_texts); + +static const SOC_ENUM_SINGLE_DECL(marley_in1muxr_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1R, + ARIZONA_IN1R_SRC_SHIFT, + marley_inmux_texts); + +static const struct snd_kcontrol_new marley_in1mux[2] = { + SOC_DAPM_ENUM("IN1L Mux", marley_in1muxl_enum), + SOC_DAPM_ENUM("IN1R Mux", marley_in1muxr_enum), +}; + +static int marley_frf_bytes_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_bytes *params = (void *)kcontrol->private_value; + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; + int ret, len; + void *data; + + len = params->num_regs * codec->val_bytes; + + data = kmemdup(ucontrol->value.bytes.data, len, GFP_KERNEL | GFP_DMA); + if (!data) { + ret = -ENOMEM; + goto out; + } + + mutex_lock(&arizona->reg_setting_lock); + regmap_write(arizona->regmap, 0x80, 0x3); + + ret = regmap_raw_write(codec->control_data, params->base, + data, len); + + regmap_write(arizona->regmap, 0x80, 0x0); + mutex_unlock(&arizona->reg_setting_lock); + +out: + kfree(data); + return ret; +} + +/* Allow the worst case number of sources (FX Rate currently) */ +static int mixer_sources_cache[ARRAY_SIZE(marley_fx_inputs)]; + +static int marley_get_sources(unsigned int reg, const int **cur_sources, + int *lim) +{ + int ret = 0; + + switch (reg) { + case ARIZONA_FX_CTRL1: + *cur_sources = marley_fx_inputs; + *lim = ARRAY_SIZE(marley_fx_inputs); + break; + case ARIZONA_ISRC_1_CTRL_1: + *cur_sources = marley_isrc1_fsh_inputs; + *lim = ARRAY_SIZE(marley_isrc1_fsh_inputs); + break; + case ARIZONA_ISRC_1_CTRL_2: + *cur_sources = marley_isrc1_fsl_inputs; + *lim = ARRAY_SIZE(marley_isrc1_fsl_inputs); + break; + case ARIZONA_ISRC_2_CTRL_1: + *cur_sources = marley_isrc2_fsh_inputs; + *lim = ARRAY_SIZE(marley_isrc2_fsh_inputs); + break; + case ARIZONA_ISRC_2_CTRL_2: + *cur_sources = marley_isrc2_fsl_inputs; + *lim = ARRAY_SIZE(marley_isrc2_fsl_inputs); + break; + case ARIZONA_OUTPUT_RATE_1: + *cur_sources = marley_out_inputs; + *lim = ARRAY_SIZE(marley_out_inputs); + break; + case ARIZONA_SPD1_TX_CONTROL: + *cur_sources = marley_spd1_inputs; + *lim = ARRAY_SIZE(marley_spd1_inputs); + break; + case CLEARWATER_DSP1_CONFIG: + *cur_sources = marley_dsp1_inputs; + *lim = ARRAY_SIZE(marley_dsp1_inputs); + break; + case CLEARWATER_DSP2_CONFIG: + *cur_sources = marley_dsp2_inputs; + *lim = ARRAY_SIZE(marley_dsp2_inputs); + break; + case CLEARWATER_DSP3_CONFIG: + *cur_sources = marley_dsp3_inputs; + *lim = ARRAY_SIZE(marley_dsp3_inputs); + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static int marley_rate_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int ret, err; + int lim; + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + + struct marley_priv *marley = snd_soc_codec_get_drvdata(codec); + struct arizona_priv *priv = &marley->core; + struct arizona *arizona = priv->arizona; + + const int *cur_sources; + + unsigned int val, cur; + unsigned int mask; + + if (ucontrol->value.enumerated.item[0] > e->max - 1) + return -EINVAL; + + val = e->values[ucontrol->value.enumerated.item[0]] << e->shift_l; + mask = e->mask << e->shift_l; + + ret = regmap_read(arizona->regmap, e->reg, &cur); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read current reg: %d\n", ret); + return ret; + } + + if ((cur & mask) == (val & mask)) + return 0; + + ret = marley_get_sources((int)e->reg, &cur_sources, &lim); + if (ret != 0) { + dev_err(arizona->dev, "Failed to get sources for 0x%08x: %d\n", + e->reg, + ret); + return ret; + } + + mutex_lock(&arizona->rate_lock); + + ret = arizona_cache_and_clear_sources(arizona, cur_sources, + mixer_sources_cache, lim); + if (ret != 0) { + dev_err(arizona->dev, + "%s Failed to cache and clear sources %d\n", + __func__, + ret); + goto out; + } + + /* Apply the rate through the original callback */ + clearwater_spin_sysclk(arizona); + udelay(300); + ret = snd_soc_update_bits_locked(codec, e->reg, mask, val); + clearwater_spin_sysclk(arizona); + udelay(300); + +out: + err = arizona_restore_sources(arizona, cur_sources, + mixer_sources_cache, lim); + if (err != 0) { + dev_err(arizona->dev, + "%s Failed to restore sources %d\n", + __func__, + err); + } + + mutex_unlock(&arizona->rate_lock); + return ret; +} + +static int marley_adsp_rate_put_cb(struct wm_adsp *adsp, unsigned int mask, + unsigned int val) +{ + int ret, err; + int lim; + const int *cur_sources; + struct arizona *arizona = dev_get_drvdata(adsp->dev); + unsigned int cur; + + ret = regmap_read(adsp->regmap, adsp->base, &cur); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read current: %d\n", ret); + return ret; + } + + if ((val & mask) == (cur & mask)) + return 0; + + ret = marley_get_sources(adsp->base, &cur_sources, &lim); + if (ret != 0) { + dev_err(arizona->dev, "Failed to get sources for 0x%08x: %d\n", + adsp->base, + ret); + return ret; + } + + dev_dbg(arizona->dev, "%s for DSP%d\n", __func__, adsp->num); + + mutex_lock(&arizona->rate_lock); + + ret = arizona_cache_and_clear_sources(arizona, cur_sources, + mixer_sources_cache, lim); + + if (ret != 0) { + dev_err(arizona->dev, + "%s Failed to cache and clear sources %d\n", + __func__, + ret); + goto out; + } + + clearwater_spin_sysclk(arizona); + udelay(300); + /* Apply the rate */ + ret = regmap_update_bits(adsp->regmap, adsp->base, mask, val); + clearwater_spin_sysclk(arizona); + udelay(300); + +out: + err = arizona_restore_sources(arizona, cur_sources, + mixer_sources_cache, lim); + + if (err != 0) { + dev_err(arizona->dev, + "%s Failed to restore sources %d\n", + __func__, + err); + } + + mutex_unlock(&arizona->rate_lock); + return ret; +} + +static int marley_adsp_power_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_codec *codec = w->codec; + struct marley_priv *marley = snd_soc_codec_get_drvdata(codec); + struct arizona_priv *priv = &marley->core; + struct arizona *arizona = priv->arizona; + unsigned int freq; + int ret; + + ret = regmap_read(arizona->regmap, CLEARWATER_DSP_CLOCK_1, &freq); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to read CLEARWATER_DSP_CLOCK_1: %d\n", ret); + return ret; + } + + freq &= CLEARWATER_DSP_CLK_FREQ_LEGACY_MASK; + freq >>= CLEARWATER_DSP_CLK_FREQ_LEGACY_SHIFT; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + if (w->shift == 2) { + mutex_lock(&marley->compr_info.lock); + marley->compr_info.trig = false; + mutex_unlock(&marley->compr_info.lock); + } + break; + default: + break; + } + + return wm_adsp2_early_event(w, kcontrol, event, freq); +} + +static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); +static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); +static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); +static DECLARE_TLV_DB_SCALE(noise_tlv, -11400, 600, 0); +static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); + +#define MARLEY_NG_SRC(name, base) \ + SOC_SINGLE(name " NG HPOUTL Switch", base, 0, 1, 0), \ + SOC_SINGLE(name " NG HPOUTR Switch", base, 1, 1, 0), \ + SOC_SINGLE(name " NG SPKOUT Switch", base, 6, 1, 0), \ + SOC_SINGLE(name " NG SPKDATL Switch", base, 8, 1, 0), \ + SOC_SINGLE(name " NG SPKDATR Switch", base, 9, 1, 0) + +static int marley_cp_mode_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; + unsigned int val; + + regmap_read(arizona->regmap, CLEARWATER_CP_MODE, &val); + if (val == 0x400) + ucontrol->value.enumerated.item[0] = 0; + else + ucontrol->value.enumerated.item[0] = 1; + + return 0; +} + +static int marley_cp_mode_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + unsigned int val = ucontrol->value.enumerated.item[0]; + + if (val > e->max - 1) + return -EINVAL; + + mutex_lock(&arizona->reg_setting_lock); + if (val == 0) { /* Default */ + regmap_write(arizona->regmap, 0x80, 0x1); + regmap_write(arizona->regmap, CLEARWATER_CP_MODE, 0x400); + regmap_write(arizona->regmap, 0x80, 0x0); + } else {/* Inverting */ + regmap_write(arizona->regmap, 0x80, 0x1); + regmap_write(arizona->regmap, CLEARWATER_CP_MODE, 0x407); + regmap_write(arizona->regmap, 0x80, 0x0); + } + mutex_unlock(&arizona->reg_setting_lock); + + return 0; +} + +static const char * const marley_cp_mode_text[2] = { + "Default", "Inverting", +}; + +static const struct soc_enum marley_cp_mode[] = { + SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(marley_cp_mode_text), + marley_cp_mode_text), +}; + +static const struct snd_kcontrol_new marley_snd_controls[] = { +SOC_VALUE_ENUM("IN1 OSR", clearwater_in_dmic_osr[0]), +SOC_VALUE_ENUM("IN2 OSR", clearwater_in_dmic_osr[1]), + +SOC_SINGLE_RANGE_TLV("IN1L Volume", ARIZONA_IN1L_CONTROL, + ARIZONA_IN1L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), +SOC_SINGLE_RANGE_TLV("IN1R Volume", ARIZONA_IN1R_CONTROL, + ARIZONA_IN1R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), +SOC_SINGLE_RANGE_TLV("IN2L Volume", ARIZONA_IN2L_CONTROL, + ARIZONA_IN2L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), +SOC_SINGLE_RANGE_TLV("IN2R Volume", ARIZONA_IN2R_CONTROL, + ARIZONA_IN2R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), + +SOC_ENUM("IN HPF Cutoff Frequency", arizona_in_hpf_cut_enum), + +SOC_SINGLE("IN1L HPF Switch", ARIZONA_IN1L_CONTROL, + ARIZONA_IN1L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN1R HPF Switch", ARIZONA_IN1R_CONTROL, + ARIZONA_IN1R_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN2L HPF Switch", ARIZONA_IN2L_CONTROL, + ARIZONA_IN2L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN2R HPF Switch", ARIZONA_IN2R_CONTROL, + ARIZONA_IN2R_HPF_SHIFT, 1, 0), + +SOC_SINGLE_TLV("IN1L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN1R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1R, + ARIZONA_IN1R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN2L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_2L, + ARIZONA_IN2L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN2R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_2R, + ARIZONA_IN2R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), + +SOC_ENUM_EXT("IN1 Mode", arizona_ip_mode[0], + snd_soc_get_enum_double, arizona_ip_mode_put), +SOC_ENUM_EXT("IN2 Mode", arizona_ip_mode[1], + snd_soc_get_enum_double, arizona_ip_mode_put), +SOC_ENUM_EXT("CP Mode", marley_cp_mode[0], + marley_cp_mode_get, marley_cp_mode_put), + +SOC_ENUM("Input Ramp Up", arizona_in_vi_ramp), +SOC_ENUM("Input Ramp Down", arizona_in_vd_ramp), + +MARLEY_FRF_BYTES("FRF COEFF 1L", CLEARWATER_FRF_COEFFICIENT_1L_1, + MARLEY_FRF_COEFFICIENT_LEN), +MARLEY_FRF_BYTES("FRF COEFF 1R", CLEARWATER_FRF_COEFFICIENT_1R_1, + MARLEY_FRF_COEFFICIENT_LEN), +MARLEY_FRF_BYTES("FRF COEFF 4L", MARLEY_FRF_COEFFICIENT_4L_1, + MARLEY_FRF_COEFFICIENT_LEN), +MARLEY_FRF_BYTES("FRF COEFF 5L", MARLEY_FRF_COEFFICIENT_5L_1, + MARLEY_FRF_COEFFICIENT_LEN), +MARLEY_FRF_BYTES("FRF COEFF 5R", MARLEY_FRF_COEFFICIENT_5R_1, + MARLEY_FRF_COEFFICIENT_LEN), + +SND_SOC_BYTES("DAC COMP 1", CLEARWATER_DAC_COMP_1, 1), +SND_SOC_BYTES("DAC COMP 2", CLEARWATER_DAC_COMP_2, 1), + +ARIZONA_MIXER_CONTROLS("EQ1", ARIZONA_EQ1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("EQ4", ARIZONA_EQ4MIX_INPUT_1_SOURCE), + +ARIZONA_EQ_CONTROL("EQ1 Coefficients", ARIZONA_EQ1_2), +SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B2 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B3 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B4 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B5 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +ARIZONA_EQ_CONTROL("EQ2 Coefficients", ARIZONA_EQ2_2), +SOC_SINGLE_TLV("EQ2 B1 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B2 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B3 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B4 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B5 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +ARIZONA_EQ_CONTROL("EQ3 Coefficients", ARIZONA_EQ3_2), +SOC_SINGLE_TLV("EQ3 B1 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B2 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B3 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B4 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B5 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +ARIZONA_EQ_CONTROL("EQ4 Coefficients", ARIZONA_EQ4_2), +SOC_SINGLE_TLV("EQ4 B1 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B2 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B3 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B4 Volume", ARIZONA_EQ4_2, ARIZONA_EQ4_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B5 Volume", ARIZONA_EQ4_2, ARIZONA_EQ4_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +ARIZONA_MIXER_CONTROLS("DRC1L", ARIZONA_DRC1LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DRC1R", ARIZONA_DRC1RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DRC2L", ARIZONA_DRC2LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DRC2R", ARIZONA_DRC2RMIX_INPUT_1_SOURCE), + +SND_SOC_BYTES_MASK("DRC1", ARIZONA_DRC1_CTRL1, 5, + ARIZONA_DRC1R_ENA | ARIZONA_DRC1L_ENA), +SND_SOC_BYTES_MASK("DRC2", CLEARWATER_DRC2_CTRL1, 5, + ARIZONA_DRC2R_ENA | ARIZONA_DRC2L_ENA), + +ARIZONA_MIXER_CONTROLS("LHPF1", ARIZONA_HPLP1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LHPF2", ARIZONA_HPLP2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LHPF3", ARIZONA_HPLP3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LHPF4", ARIZONA_HPLP4MIX_INPUT_1_SOURCE), + +SND_SOC_BYTES("LHPF1 Coefficients", ARIZONA_HPLPF1_2, 1), +SND_SOC_BYTES("LHPF2 Coefficients", ARIZONA_HPLPF2_2, 1), +SND_SOC_BYTES("LHPF3 Coefficients", ARIZONA_HPLPF3_2, 1), +SND_SOC_BYTES("LHPF4 Coefficients", ARIZONA_HPLPF4_2, 1), + +SOC_ENUM("LHPF1 Mode", arizona_lhpf1_mode), +SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode), +SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode), +SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), + +SOC_VALUE_ENUM("Sample Rate 2", arizona_sample_rate[0]), +SOC_VALUE_ENUM("Sample Rate 3", arizona_sample_rate[1]), + +MARLEY_RATE_ENUM("FX Rate", arizona_fx_rate), + +MARLEY_RATE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), +MARLEY_RATE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), +MARLEY_RATE_ENUM("ISRC1 FSH", arizona_isrc_fsh[0]), +MARLEY_RATE_ENUM("ISRC2 FSH", arizona_isrc_fsh[1]), + +ARIZONA_MIXER_CONTROLS("DSP1L", ARIZONA_DSP1LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP1R", ARIZONA_DSP1RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP2L", ARIZONA_DSP2LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP2R", ARIZONA_DSP2RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP3L", ARIZONA_DSP3LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP3R", ARIZONA_DSP3RMIX_INPUT_1_SOURCE), + +SOC_SINGLE_TLV("Noise Generator Volume", CLEARWATER_COMFORT_NOISE_GENERATOR, + CLEARWATER_NOISE_GEN_GAIN_SHIFT, 0x12, 0, noise_tlv), + +ARIZONA_MIXER_CONTROLS("HPOUTL", ARIZONA_OUT1LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("HPOUTR", ARIZONA_OUT1RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SPKOUT", ARIZONA_OUT4LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SPKDATL", ARIZONA_OUT5LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SPKDATR", ARIZONA_OUT5RMIX_INPUT_1_SOURCE), + +SOC_SINGLE("HPOUT SC Protect Switch", ARIZONA_HP1_SHORT_CIRCUIT_CTRL, + ARIZONA_HP1_SC_ENA_SHIFT, 1, 0), + +SOC_SINGLE("HPOUTL ONEFLT Switch", ARIZONA_HP_TEST_CTRL_5, + ARIZONA_HP1L_ONEFLT_SHIFT, 1, 0), +SOC_SINGLE("HPOUTR ONEFLT Switch", ARIZONA_HP_TEST_CTRL_6, + ARIZONA_HP1R_ONEFLT_SHIFT, 1, 0), + +SOC_SINGLE("SPKDAT High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_5L, + ARIZONA_OUT5_OSR_SHIFT, 1, 0), + +SOC_DOUBLE_R("HPOUT Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_1L, + ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_MUTE_SHIFT, 1, 1), +SOC_SINGLE("Speaker Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_4L, + ARIZONA_OUT4L_MUTE_SHIFT, 1, 1), +SOC_DOUBLE_R("SPKDAT Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_5L, + ARIZONA_DAC_DIGITAL_VOLUME_5R, ARIZONA_OUT5L_MUTE_SHIFT, 1, 1), + +SOC_DOUBLE_R_TLV("HPOUT Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_1L, + ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_VOL_SHIFT, + 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("Speaker Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_4L, + ARIZONA_OUT4L_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_DOUBLE_R_TLV("SPKDAT Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_5L, + ARIZONA_DAC_DIGITAL_VOLUME_5R, ARIZONA_OUT5L_VOL_SHIFT, + 0xbf, 0, digital_tlv), + +SOC_DOUBLE("SPKDAT Switch", ARIZONA_PDM_SPK1_CTRL_1, ARIZONA_SPK1L_MUTE_SHIFT, + ARIZONA_SPK1R_MUTE_SHIFT, 1, 1), + +SOC_DOUBLE_EXT("HPOUT DRE Switch", ARIZONA_DRE_ENABLE, + ARIZONA_DRE1L_ENA_SHIFT, ARIZONA_DRE1R_ENA_SHIFT, 1, 0, + snd_soc_get_volsw, clearwater_put_dre), + +SOC_DOUBLE("HPOUT EDRE Switch", CLEARWATER_EDRE_ENABLE, + CLEARWATER_EDRE_OUT1L_THR1_ENA_SHIFT, + CLEARWATER_EDRE_OUT1R_THR1_ENA_SHIFT, 1, 0), + +SOC_SINGLE("Speaker THR1 EDRE Switch", CLEARWATER_EDRE_ENABLE, + CLEARWATER_EDRE_OUT4L_THR1_ENA_SHIFT, 1, 0), + +SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp), +SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp), + +MARLEY_RATE_ENUM("SPDIF Rate", arizona_spdif_rate), + +SOC_SINGLE("Noise Gate Switch", ARIZONA_NOISE_GATE_CONTROL, + ARIZONA_NGATE_ENA_SHIFT, 1, 0), +SOC_SINGLE_TLV("Noise Gate Threshold Volume", ARIZONA_NOISE_GATE_CONTROL, + ARIZONA_NGATE_THR_SHIFT, 7, 1, ng_tlv), +SOC_ENUM("Noise Gate Hold", arizona_ng_hold), + +MARLEY_RATE_ENUM("Output Rate 1", arizona_output_rate), +SOC_VALUE_ENUM("In Rate", arizona_input_rate), + +MARLEY_NG_SRC("HPOUTL", ARIZONA_NOISE_GATE_SELECT_1L), +MARLEY_NG_SRC("HPOUTR", ARIZONA_NOISE_GATE_SELECT_1R), +MARLEY_NG_SRC("SPKOUT", ARIZONA_NOISE_GATE_SELECT_4L), +MARLEY_NG_SRC("SPKDATL", ARIZONA_NOISE_GATE_SELECT_5L), +MARLEY_NG_SRC("SPKDATR", ARIZONA_NOISE_GATE_SELECT_5R), + +ARIZONA_MIXER_CONTROLS("AIF1TX1", ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX2", ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX3", ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX4", ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX5", ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX6", ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("AIF2TX1", ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX2", ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("AIF3TX1", ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF3TX2", ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("SLIMTX1", ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX2", ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX3", ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX4", ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX5", ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX6", ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE), + +ARIZONA_GAINMUX_CONTROLS("SPDIFTX1", ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE), +ARIZONA_GAINMUX_CONTROLS("SPDIFTX2", ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE), +}; + +CLEARWATER_MIXER_ENUMS(EQ1, ARIZONA_EQ1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(EQ2, ARIZONA_EQ2MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(EQ3, ARIZONA_EQ3MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(EQ4, ARIZONA_EQ4MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DRC1L, ARIZONA_DRC1LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DRC1R, ARIZONA_DRC1RMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DRC2L, ARIZONA_DRC2LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DRC2R, ARIZONA_DRC2RMIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(LHPF1, ARIZONA_HPLP1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(LHPF2, ARIZONA_HPLP2MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(LHPF3, ARIZONA_HPLP3MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(LHPF4, ARIZONA_HPLP4MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DSP1L, ARIZONA_DSP1LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DSP1R, ARIZONA_DSP1RMIX_INPUT_1_SOURCE); +CLEARWATER_DSP_AUX_ENUMS(DSP1, ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DSP2L, ARIZONA_DSP2LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DSP2R, ARIZONA_DSP2RMIX_INPUT_1_SOURCE); +CLEARWATER_DSP_AUX_ENUMS(DSP2, ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DSP3L, ARIZONA_DSP3LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DSP3R, ARIZONA_DSP3RMIX_INPUT_1_SOURCE); +CLEARWATER_DSP_AUX_ENUMS(DSP3, ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(PWM1, ARIZONA_PWM1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(PWM2, ARIZONA_PWM2MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(OUT1L, ARIZONA_OUT1LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(OUT1R, ARIZONA_OUT1RMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SPKOUT, ARIZONA_OUT4LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SPKDAT1L, ARIZONA_OUT5LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SPKDAT1R, ARIZONA_OUT5RMIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(AIF1TX1, ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX2, ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX3, ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX4, ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX5, ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX6, ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(AIF2TX1, ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF2TX2, ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(AIF3TX1, ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF3TX2, ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(SLIMTX1, ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SLIMTX2, ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SLIMTX3, ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SLIMTX4, ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SLIMTX5, ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SLIMTX6, ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(SPD1TX1, ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(SPD1TX2, ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC1INT1, ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1INT2, ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1INT3, ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1INT4, ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC1DEC1, ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1DEC2, ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1DEC3, ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1DEC4, ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC2INT1, ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2INT2, ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2INT3, ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2INT4, ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC2DEC1, ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2DEC2, ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2DEC3, ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2DEC4, ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE); + +static const char * const marley_dsp_output_texts[] = { + "None", + "DSP3", +}; + +static const struct soc_enum marley_dsp_output_enum = + SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(marley_dsp_output_texts), + marley_dsp_output_texts); + +static const struct snd_kcontrol_new marley_dsp_output_mux[] = { + SOC_DAPM_ENUM_VIRT("DSP Virtual Output Mux", marley_dsp_output_enum), +}; + +static const char * const marley_memory_mux_texts[] = { + "None", + "Shared Memory", +}; + +static const struct soc_enum marley_memory_enum = + SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(marley_memory_mux_texts), + marley_memory_mux_texts); + +static const struct snd_kcontrol_new marley_memory_mux[] = { + SOC_DAPM_ENUM_VIRT("DSP2 Virtual Input", marley_memory_enum), + SOC_DAPM_ENUM_VIRT("DSP3 Virtual Input", marley_memory_enum), +}; + +static const char * const marley_aec_loopback_texts[] = { + "HPOUTL", "HPOUTR", "SPKOUT", "SPKDATL", "SPKDATR", +}; + +static const unsigned int marley_aec_loopback_values[] = { + 0, 1, 6, 8, 9, +}; + +static const struct soc_enum marley_aec_loopback = + SOC_VALUE_ENUM_SINGLE(ARIZONA_DAC_AEC_CONTROL_1, + ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, + ARRAY_SIZE(marley_aec_loopback_texts), + marley_aec_loopback_texts, + marley_aec_loopback_values); + +static const struct snd_kcontrol_new marley_aec_loopback_mux = + SOC_DAPM_VALUE_ENUM("AEC Loopback", marley_aec_loopback); + +static const struct snd_soc_dapm_widget marley_dapm_widgets[] = { +SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT, + 0, NULL, SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK, + ARIZONA_OPCLK_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("DSPCLK", CLEARWATER_DSP_CLOCK_1, 6, + 0, NULL, 0), + + +SND_SOC_DAPM_REGULATOR_SUPPLY("DBVDD2", 0, 0), +SND_SOC_DAPM_REGULATOR_SUPPLY("CPVDD", 20, 0), +SND_SOC_DAPM_REGULATOR_SUPPLY("MICVDD", 0, SND_SOC_DAPM_REGULATOR_BYPASS), +SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDD", 0, 0), + +SND_SOC_DAPM_SIGGEN("TONE"), +SND_SOC_DAPM_SIGGEN("NOISE"), +SND_SOC_DAPM_SIGGEN("HAPTICS"), + +SND_SOC_DAPM_INPUT("IN1AL"), +SND_SOC_DAPM_INPUT("IN1AR"), +SND_SOC_DAPM_INPUT("IN1BL"), +SND_SOC_DAPM_INPUT("IN1BR"), +SND_SOC_DAPM_INPUT("IN2L"), +SND_SOC_DAPM_INPUT("IN2R"), + +SND_SOC_DAPM_MUX("IN1L Mux", SND_SOC_NOPM, 0, 0, &marley_in1mux[0]), +SND_SOC_DAPM_MUX("IN1R Mux", SND_SOC_NOPM, 0, 0, &marley_in1mux[1]), + +SND_SOC_DAPM_OUTPUT("DRC1 Signal Activity"), +SND_SOC_DAPM_OUTPUT("DRC2 Signal Activity"), + +SND_SOC_DAPM_OUTPUT("DSP Virtual Output"), + +SND_SOC_DAPM_PGA_E("IN1L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN1L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN1R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN1R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN2L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN2L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN2R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN2R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), + +SND_SOC_DAPM_SUPPLY("MICBIAS1A", ARIZONA_MIC_BIAS_CTRL_1, + ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS2A", ARIZONA_MIC_BIAS_CTRL_2, + ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("Noise Generator", CLEARWATER_COMFORT_NOISE_GENERATOR, + CLEARWATER_NOISE_GEN_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("Tone Generator 1", ARIZONA_TONE_GENERATOR_1, + ARIZONA_TONE1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("Tone Generator 2", ARIZONA_TONE_GENERATOR_1, + ARIZONA_TONE2_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("EQ1", ARIZONA_EQ1_1, ARIZONA_EQ1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ2", ARIZONA_EQ2_1, ARIZONA_EQ2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ3", ARIZONA_EQ3_1, ARIZONA_EQ3_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ4", ARIZONA_EQ4_1, ARIZONA_EQ4_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("DRC1L", ARIZONA_DRC1_CTRL1, ARIZONA_DRC1L_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("DRC1R", ARIZONA_DRC1_CTRL1, ARIZONA_DRC1R_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("DRC2L", CLEARWATER_DRC2_CTRL1, ARIZONA_DRC2L_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("DRC2R", CLEARWATER_DRC2_CTRL1, ARIZONA_DRC2R_ENA_SHIFT, 0, + NULL, 0), + +SND_SOC_DAPM_PGA("LHPF1", ARIZONA_HPLPF1_1, ARIZONA_LHPF1_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF2", ARIZONA_HPLPF2_1, ARIZONA_LHPF2_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF3", ARIZONA_HPLPF3_1, ARIZONA_LHPF3_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF4", ARIZONA_HPLPF4_1, ARIZONA_LHPF4_ENA_SHIFT, 0, + NULL, 0), + +SND_SOC_DAPM_PGA("PWM1 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM1_ENA_SHIFT, + 0, NULL, 0), +SND_SOC_DAPM_PGA("PWM2 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM2_ENA_SHIFT, + 0, NULL, 0), + +WM_ADSP2("DSP1", 0, marley_adsp_power_ev), +WM_ADSP2("DSP2", 1, marley_adsp_power_ev), +WM_ADSP2("DSP3", 2, marley_adsp_power_ev), + +SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT2", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT3", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT4", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC1DEC1", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC2", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC3", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC4", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC2INT1", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT2", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT3", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT4", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC2DEC1", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC2", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC3", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC4", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, + ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, + &marley_aec_loopback_mux), + +SND_SOC_DAPM_AIF_OUT("AIF1TX1", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX2", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX3", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX4", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX5", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX6", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX6_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF1RX1", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX2", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX3", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX4", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX5", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX6", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX6_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("AIF2TX1", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX2", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX2", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("SLIMRX1", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX2", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX3", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX4", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX5", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX6", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX6_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("SLIMTX1", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX2", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX3", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX4", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX5", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX6", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX6_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("AIF3TX1", NULL, 0, + ARIZONA_AIF3_TX_ENABLES, ARIZONA_AIF3TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF3TX2", NULL, 0, + ARIZONA_AIF3_TX_ENABLES, ARIZONA_AIF3TX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF3RX1", NULL, 0, + ARIZONA_AIF3_RX_ENABLES, ARIZONA_AIF3RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF3RX2", NULL, 0, + ARIZONA_AIF3_RX_ENABLES, ARIZONA_AIF3RX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, + ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, + ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT5L", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT5L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT5R", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT5R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + +SND_SOC_DAPM_PGA("SPD1TX1", ARIZONA_SPD1_TX_CONTROL, + ARIZONA_SPD1_VAL1_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("SPD1TX2", ARIZONA_SPD1_TX_CONTROL, + ARIZONA_SPD1_VAL2_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_OUT_DRV("SPD1", ARIZONA_SPD1_TX_CONTROL, + ARIZONA_SPD1_ENA_SHIFT, 0, NULL, 0), + +ARIZONA_MIXER_WIDGETS(EQ1, "EQ1"), +ARIZONA_MIXER_WIDGETS(EQ2, "EQ2"), +ARIZONA_MIXER_WIDGETS(EQ3, "EQ3"), +ARIZONA_MIXER_WIDGETS(EQ4, "EQ4"), + +ARIZONA_MIXER_WIDGETS(DRC1L, "DRC1L"), +ARIZONA_MIXER_WIDGETS(DRC1R, "DRC1R"), +ARIZONA_MIXER_WIDGETS(DRC2L, "DRC2L"), +ARIZONA_MIXER_WIDGETS(DRC2R, "DRC2R"), + +ARIZONA_MIXER_WIDGETS(LHPF1, "LHPF1"), +ARIZONA_MIXER_WIDGETS(LHPF2, "LHPF2"), +ARIZONA_MIXER_WIDGETS(LHPF3, "LHPF3"), +ARIZONA_MIXER_WIDGETS(LHPF4, "LHPF4"), + +ARIZONA_MIXER_WIDGETS(PWM1, "PWM1"), +ARIZONA_MIXER_WIDGETS(PWM2, "PWM2"), + +ARIZONA_MIXER_WIDGETS(OUT1L, "HPOUTL"), +ARIZONA_MIXER_WIDGETS(OUT1R, "HPOUTR"), +ARIZONA_MIXER_WIDGETS(SPKOUT, "SPKOUT"), +ARIZONA_MIXER_WIDGETS(SPKDAT1L, "SPKDATL"), +ARIZONA_MIXER_WIDGETS(SPKDAT1R, "SPKDATR"), + +ARIZONA_MIXER_WIDGETS(AIF1TX1, "AIF1TX1"), +ARIZONA_MIXER_WIDGETS(AIF1TX2, "AIF1TX2"), +ARIZONA_MIXER_WIDGETS(AIF1TX3, "AIF1TX3"), +ARIZONA_MIXER_WIDGETS(AIF1TX4, "AIF1TX4"), +ARIZONA_MIXER_WIDGETS(AIF1TX5, "AIF1TX5"), +ARIZONA_MIXER_WIDGETS(AIF1TX6, "AIF1TX6"), + +ARIZONA_MIXER_WIDGETS(AIF2TX1, "AIF2TX1"), +ARIZONA_MIXER_WIDGETS(AIF2TX2, "AIF2TX2"), + +ARIZONA_MIXER_WIDGETS(AIF3TX1, "AIF3TX1"), +ARIZONA_MIXER_WIDGETS(AIF3TX2, "AIF3TX2"), + +ARIZONA_MIXER_WIDGETS(SLIMTX1, "SLIMTX1"), +ARIZONA_MIXER_WIDGETS(SLIMTX2, "SLIMTX2"), +ARIZONA_MIXER_WIDGETS(SLIMTX3, "SLIMTX3"), +ARIZONA_MIXER_WIDGETS(SLIMTX4, "SLIMTX4"), +ARIZONA_MIXER_WIDGETS(SLIMTX5, "SLIMTX5"), +ARIZONA_MIXER_WIDGETS(SLIMTX6, "SLIMTX6"), + +ARIZONA_MUX_WIDGETS(SPD1TX1, "SPDIFTX1"), +ARIZONA_MUX_WIDGETS(SPD1TX2, "SPDIFTX2"), + +ARIZONA_DSP_WIDGETS(DSP1, "DSP1"), +ARIZONA_DSP_WIDGETS(DSP2, "DSP2"), +ARIZONA_DSP_WIDGETS(DSP3, "DSP3"), + +SND_SOC_DAPM_VIRT_MUX("DSP2 Virtual Input", SND_SOC_NOPM, 0, 0, + &marley_memory_mux[0]), +SND_SOC_DAPM_VIRT_MUX("DSP3 Virtual Input", SND_SOC_NOPM, 0, 0, + &marley_memory_mux[1]), + +SND_SOC_DAPM_VIRT_MUX("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, + &marley_dsp_output_mux[0]), + +ARIZONA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), +ARIZONA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"), +ARIZONA_MUX_WIDGETS(ISRC1DEC3, "ISRC1DEC3"), +ARIZONA_MUX_WIDGETS(ISRC1DEC4, "ISRC1DEC4"), + +ARIZONA_MUX_WIDGETS(ISRC1INT1, "ISRC1INT1"), +ARIZONA_MUX_WIDGETS(ISRC1INT2, "ISRC1INT2"), +ARIZONA_MUX_WIDGETS(ISRC1INT3, "ISRC1INT3"), +ARIZONA_MUX_WIDGETS(ISRC1INT4, "ISRC1INT4"), + +ARIZONA_MUX_WIDGETS(ISRC2DEC1, "ISRC2DEC1"), +ARIZONA_MUX_WIDGETS(ISRC2DEC2, "ISRC2DEC2"), +ARIZONA_MUX_WIDGETS(ISRC2DEC3, "ISRC2DEC3"), +ARIZONA_MUX_WIDGETS(ISRC2DEC4, "ISRC2DEC4"), + +ARIZONA_MUX_WIDGETS(ISRC2INT1, "ISRC2INT1"), +ARIZONA_MUX_WIDGETS(ISRC2INT2, "ISRC2INT2"), +ARIZONA_MUX_WIDGETS(ISRC2INT3, "ISRC2INT3"), +ARIZONA_MUX_WIDGETS(ISRC2INT4, "ISRC2INT4"), + +SND_SOC_DAPM_OUTPUT("HPOUTL"), +SND_SOC_DAPM_OUTPUT("HPOUTR"), +SND_SOC_DAPM_OUTPUT("SPKOUTN"), +SND_SOC_DAPM_OUTPUT("SPKOUTP"), +SND_SOC_DAPM_OUTPUT("SPKDATL"), +SND_SOC_DAPM_OUTPUT("SPKDATR"), +SND_SOC_DAPM_OUTPUT("SPDIF"), + +SND_SOC_DAPM_OUTPUT("MICSUPP"), +}; + +#define ARIZONA_MIXER_INPUT_ROUTES(name) \ + { name, "Noise Generator", "Noise Generator" }, \ + { name, "Tone Generator 1", "Tone Generator 1" }, \ + { name, "Tone Generator 2", "Tone Generator 2" }, \ + { name, "Haptics", "HAPTICS" }, \ + { name, "AEC", "AEC Loopback" }, \ + { name, "IN1L", "IN1L PGA" }, \ + { name, "IN1R", "IN1R PGA" }, \ + { name, "IN2L", "IN2L PGA" }, \ + { name, "IN2R", "IN2R PGA" }, \ + { name, "AIF1RX1", "AIF1RX1" }, \ + { name, "AIF1RX2", "AIF1RX2" }, \ + { name, "AIF1RX3", "AIF1RX3" }, \ + { name, "AIF1RX4", "AIF1RX4" }, \ + { name, "AIF1RX5", "AIF1RX5" }, \ + { name, "AIF1RX6", "AIF1RX6" }, \ + { name, "AIF2RX1", "AIF2RX1" }, \ + { name, "AIF2RX2", "AIF2RX2" }, \ + { name, "AIF3RX1", "AIF3RX1" }, \ + { name, "AIF3RX2", "AIF3RX2" }, \ + { name, "SLIMRX1", "SLIMRX1" }, \ + { name, "SLIMRX2", "SLIMRX2" }, \ + { name, "SLIMRX3", "SLIMRX3" }, \ + { name, "SLIMRX4", "SLIMRX4" }, \ + { name, "SLIMRX5", "SLIMRX5" }, \ + { name, "SLIMRX6", "SLIMRX6" }, \ + { name, "EQ1", "EQ1" }, \ + { name, "EQ2", "EQ2" }, \ + { name, "EQ3", "EQ3" }, \ + { name, "EQ4", "EQ4" }, \ + { name, "DRC1L", "DRC1L" }, \ + { name, "DRC1R", "DRC1R" }, \ + { name, "DRC2L", "DRC2L" }, \ + { name, "DRC2R", "DRC2R" }, \ + { name, "LHPF1", "LHPF1" }, \ + { name, "LHPF2", "LHPF2" }, \ + { name, "LHPF3", "LHPF3" }, \ + { name, "LHPF4", "LHPF4" }, \ + { name, "ISRC1DEC1", "ISRC1DEC1" }, \ + { name, "ISRC1DEC2", "ISRC1DEC2" }, \ + { name, "ISRC1DEC3", "ISRC1DEC3" }, \ + { name, "ISRC1DEC4", "ISRC1DEC4" }, \ + { name, "ISRC1INT1", "ISRC1INT1" }, \ + { name, "ISRC1INT2", "ISRC1INT2" }, \ + { name, "ISRC1INT3", "ISRC1INT3" }, \ + { name, "ISRC1INT4", "ISRC1INT4" }, \ + { name, "ISRC2DEC1", "ISRC2DEC1" }, \ + { name, "ISRC2DEC2", "ISRC2DEC2" }, \ + { name, "ISRC2DEC3", "ISRC2DEC3" }, \ + { name, "ISRC2DEC4", "ISRC2DEC4" }, \ + { name, "ISRC2INT1", "ISRC2INT1" }, \ + { name, "ISRC2INT2", "ISRC2INT2" }, \ + { name, "ISRC2INT3", "ISRC2INT3" }, \ + { name, "ISRC2INT4", "ISRC2INT4" }, \ + { name, "DSP1.1", "DSP1" }, \ + { name, "DSP1.2", "DSP1" }, \ + { name, "DSP1.3", "DSP1" }, \ + { name, "DSP1.4", "DSP1" }, \ + { name, "DSP1.5", "DSP1" }, \ + { name, "DSP1.6", "DSP1" }, \ + { name, "DSP2.1", "DSP2" }, \ + { name, "DSP2.2", "DSP2" }, \ + { name, "DSP2.3", "DSP2" }, \ + { name, "DSP2.4", "DSP2" }, \ + { name, "DSP2.5", "DSP2" }, \ + { name, "DSP2.6", "DSP2" }, \ + { name, "DSP3.1", "DSP3" }, \ + { name, "DSP3.2", "DSP3" }, \ + { name, "DSP3.3", "DSP3" }, \ + { name, "DSP3.4", "DSP3" }, \ + { name, "DSP3.5", "DSP3" }, \ + { name, "DSP3.6", "DSP3" } + +static const struct snd_soc_dapm_route marley_dapm_routes[] = { + { "AIF2 Capture", NULL, "DBVDD2" }, + { "AIF2 Playback", NULL, "DBVDD2" }, + + { "AIF3 Capture", NULL, "DBVDD2" }, + { "AIF3 Playback", NULL, "DBVDD2" }, + + { "OUT1L", NULL, "CPVDD" }, + { "OUT1R", NULL, "CPVDD" }, + + { "OUT4L", NULL, "SPKVDD" }, + + { "OUT1L", NULL, "SYSCLK" }, + { "OUT1R", NULL, "SYSCLK" }, + { "OUT4L", NULL, "SYSCLK" }, + { "OUT5L", NULL, "SYSCLK" }, + { "OUT5R", NULL, "SYSCLK" }, + + { "SPD1", NULL, "SYSCLK" }, + { "SPD1", NULL, "SPD1TX1" }, + { "SPD1", NULL, "SPD1TX2" }, + + { "IN1AL", NULL, "SYSCLK" }, + { "IN1AR", NULL, "SYSCLK" }, + { "IN1BL", NULL, "SYSCLK" }, + { "IN1BR", NULL, "SYSCLK" }, + { "IN2L", NULL, "SYSCLK" }, + { "IN2R", NULL, "SYSCLK" }, + + { "DSP1", NULL, "DSPCLK"}, + { "DSP2", NULL, "DSPCLK"}, + { "DSP3", NULL, "DSPCLK"}, + + { "MICBIAS1A", NULL, "MICVDD" }, + { "MICBIAS2A", NULL, "MICVDD" }, + + { "Noise Generator", NULL, "SYSCLK" }, + { "Tone Generator 1", NULL, "SYSCLK" }, + { "Tone Generator 2", NULL, "SYSCLK" }, + + { "Noise Generator", NULL, "NOISE" }, + { "Tone Generator 1", NULL, "TONE" }, + { "Tone Generator 2", NULL, "TONE" }, + + { "AIF1 Capture", NULL, "AIF1TX1" }, + { "AIF1 Capture", NULL, "AIF1TX2" }, + { "AIF1 Capture", NULL, "AIF1TX3" }, + { "AIF1 Capture", NULL, "AIF1TX4" }, + { "AIF1 Capture", NULL, "AIF1TX5" }, + { "AIF1 Capture", NULL, "AIF1TX6" }, + + { "AIF1RX1", NULL, "AIF1 Playback" }, + { "AIF1RX2", NULL, "AIF1 Playback" }, + { "AIF1RX3", NULL, "AIF1 Playback" }, + { "AIF1RX4", NULL, "AIF1 Playback" }, + { "AIF1RX5", NULL, "AIF1 Playback" }, + { "AIF1RX6", NULL, "AIF1 Playback" }, + + { "AIF2 Capture", NULL, "AIF2TX1" }, + { "AIF2 Capture", NULL, "AIF2TX2" }, + + { "AIF2RX1", NULL, "AIF2 Playback" }, + { "AIF2RX2", NULL, "AIF2 Playback" }, + + { "AIF3 Capture", NULL, "AIF3TX1" }, + { "AIF3 Capture", NULL, "AIF3TX2" }, + + { "AIF3RX1", NULL, "AIF3 Playback" }, + { "AIF3RX2", NULL, "AIF3 Playback" }, + + { "Slim1 Capture", NULL, "SLIMTX1" }, + { "Slim1 Capture", NULL, "SLIMTX2" }, + { "Slim1 Capture", NULL, "SLIMTX3" }, + { "Slim1 Capture", NULL, "SLIMTX4" }, + + { "SLIMRX1", NULL, "Slim1 Playback" }, + { "SLIMRX2", NULL, "Slim1 Playback" }, + { "SLIMRX3", NULL, "Slim1 Playback" }, + { "SLIMRX4", NULL, "Slim1 Playback" }, + + { "Slim2 Capture", NULL, "SLIMTX5" }, + { "Slim2 Capture", NULL, "SLIMTX6" }, + + { "SLIMRX5", NULL, "Slim2 Playback" }, + { "SLIMRX6", NULL, "Slim2 Playback" }, + + { "AIF1 Playback", NULL, "SYSCLK" }, + { "AIF2 Playback", NULL, "SYSCLK" }, + { "AIF3 Playback", NULL, "SYSCLK" }, + { "Slim1 Playback", NULL, "SYSCLK" }, + { "Slim2 Playback", NULL, "SYSCLK" }, + + { "AIF1 Capture", NULL, "SYSCLK" }, + { "AIF2 Capture", NULL, "SYSCLK" }, + { "AIF3 Capture", NULL, "SYSCLK" }, + { "Slim1 Capture", NULL, "SYSCLK" }, + { "Slim2 Capture", NULL, "SYSCLK" }, + + { "Voice Control CPU", NULL, "Voice Control DSP" }, + { "Voice Control DSP", NULL, "DSP3" }, + { "Voice Control CPU", NULL, "SYSCLK" }, + { "Voice Control DSP", NULL, "SYSCLK" }, + + { "Trace CPU", NULL, "Trace DSP" }, + { "Trace DSP", NULL, "DSP1" }, + { "Trace CPU", NULL, "SYSCLK" }, + { "Trace DSP", NULL, "SYSCLK" }, + + { "IN1L Mux", "A", "IN1AL" }, + { "IN1L Mux", "B", "IN1BL" }, + { "IN1R Mux", "A", "IN1AR" }, + { "IN1R Mux", "B", "IN1BR" }, + + { "IN1L PGA", NULL, "IN1L Mux" }, + { "IN1R PGA", NULL, "IN1R Mux" }, + + { "IN2L PGA", NULL, "IN2L" }, + { "IN2R PGA", NULL, "IN2R" }, + + ARIZONA_MIXER_ROUTES("OUT1L", "HPOUTL"), + ARIZONA_MIXER_ROUTES("OUT1R", "HPOUTR"), + + ARIZONA_MIXER_ROUTES("OUT4L", "SPKOUT"), + + ARIZONA_MIXER_ROUTES("OUT5L", "SPKDATL"), + ARIZONA_MIXER_ROUTES("OUT5R", "SPKDATR"), + + ARIZONA_MIXER_ROUTES("PWM1 Driver", "PWM1"), + ARIZONA_MIXER_ROUTES("PWM2 Driver", "PWM2"), + + ARIZONA_MIXER_ROUTES("AIF1TX1", "AIF1TX1"), + ARIZONA_MIXER_ROUTES("AIF1TX2", "AIF1TX2"), + ARIZONA_MIXER_ROUTES("AIF1TX3", "AIF1TX3"), + ARIZONA_MIXER_ROUTES("AIF1TX4", "AIF1TX4"), + ARIZONA_MIXER_ROUTES("AIF1TX5", "AIF1TX5"), + ARIZONA_MIXER_ROUTES("AIF1TX6", "AIF1TX6"), + + ARIZONA_MIXER_ROUTES("AIF2TX1", "AIF2TX1"), + ARIZONA_MIXER_ROUTES("AIF2TX2", "AIF2TX2"), + + ARIZONA_MIXER_ROUTES("AIF3TX1", "AIF3TX1"), + ARIZONA_MIXER_ROUTES("AIF3TX2", "AIF3TX2"), + + ARIZONA_MIXER_ROUTES("SLIMTX1", "SLIMTX1"), + ARIZONA_MIXER_ROUTES("SLIMTX2", "SLIMTX2"), + ARIZONA_MIXER_ROUTES("SLIMTX3", "SLIMTX3"), + ARIZONA_MIXER_ROUTES("SLIMTX4", "SLIMTX4"), + ARIZONA_MIXER_ROUTES("SLIMTX5", "SLIMTX5"), + ARIZONA_MIXER_ROUTES("SLIMTX6", "SLIMTX6"), + + ARIZONA_MUX_ROUTES("SPD1TX1", "SPDIFTX1"), + ARIZONA_MUX_ROUTES("SPD1TX2", "SPDIFTX2"), + + ARIZONA_MIXER_ROUTES("EQ1", "EQ1"), + ARIZONA_MIXER_ROUTES("EQ2", "EQ2"), + ARIZONA_MIXER_ROUTES("EQ3", "EQ3"), + ARIZONA_MIXER_ROUTES("EQ4", "EQ4"), + + ARIZONA_MIXER_ROUTES("DRC1L", "DRC1L"), + ARIZONA_MIXER_ROUTES("DRC1R", "DRC1R"), + ARIZONA_MIXER_ROUTES("DRC2L", "DRC2L"), + ARIZONA_MIXER_ROUTES("DRC2R", "DRC2R"), + + ARIZONA_MIXER_ROUTES("LHPF1", "LHPF1"), + ARIZONA_MIXER_ROUTES("LHPF2", "LHPF2"), + ARIZONA_MIXER_ROUTES("LHPF3", "LHPF3"), + ARIZONA_MIXER_ROUTES("LHPF4", "LHPF4"), + + ARIZONA_DSP_ROUTES("DSP1"), + ARIZONA_DSP_ROUTES("DSP2"), + ARIZONA_DSP_ROUTES("DSP3"), + + { "DSP2 Preloader", NULL, "DSP2 Virtual Input" }, + { "DSP2 Virtual Input", "Shared Memory", "DSP3" }, + { "DSP3 Preloader", NULL, "DSP3 Virtual Input" }, + { "DSP3 Virtual Input", "Shared Memory", "DSP2" }, + + { "DSP Virtual Output", NULL, "DSP Virtual Output Mux" }, + { "DSP Virtual Output Mux", "DSP3", "DSP3" }, + { "DSP Virtual Output", NULL, "SYSCLK" }, + + ARIZONA_MUX_ROUTES("ISRC1INT1", "ISRC1INT1"), + ARIZONA_MUX_ROUTES("ISRC1INT2", "ISRC1INT2"), + ARIZONA_MUX_ROUTES("ISRC1INT3", "ISRC1INT3"), + ARIZONA_MUX_ROUTES("ISRC1INT4", "ISRC1INT4"), + + ARIZONA_MUX_ROUTES("ISRC1DEC1", "ISRC1DEC1"), + ARIZONA_MUX_ROUTES("ISRC1DEC2", "ISRC1DEC2"), + ARIZONA_MUX_ROUTES("ISRC1DEC3", "ISRC1DEC3"), + ARIZONA_MUX_ROUTES("ISRC1DEC4", "ISRC1DEC4"), + + ARIZONA_MUX_ROUTES("ISRC2INT1", "ISRC2INT1"), + ARIZONA_MUX_ROUTES("ISRC2INT2", "ISRC2INT2"), + ARIZONA_MUX_ROUTES("ISRC2INT3", "ISRC2INT3"), + ARIZONA_MUX_ROUTES("ISRC2INT4", "ISRC2INT4"), + + ARIZONA_MUX_ROUTES("ISRC2DEC1", "ISRC2DEC1"), + ARIZONA_MUX_ROUTES("ISRC2DEC2", "ISRC2DEC2"), + ARIZONA_MUX_ROUTES("ISRC2DEC3", "ISRC2DEC3"), + ARIZONA_MUX_ROUTES("ISRC2DEC4", "ISRC2DEC4"), + + { "AEC Loopback", "HPOUTL", "OUT1L" }, + { "AEC Loopback", "HPOUTR", "OUT1R" }, + { "HPOUTL", NULL, "OUT1L" }, + { "HPOUTR", NULL, "OUT1R" }, + + { "AEC Loopback", "SPKOUT", "OUT4L" }, + { "SPKOUTN", NULL, "OUT4L" }, + { "SPKOUTP", NULL, "OUT4L" }, + + { "AEC Loopback", "SPKDATL", "OUT5L" }, + { "AEC Loopback", "SPKDATR", "OUT5R" }, + { "SPKDATL", NULL, "OUT5L" }, + { "SPKDATR", NULL, "OUT5R" }, + + { "SPDIF", NULL, "SPD1" }, + + { "MICSUPP", NULL, "SYSCLK" }, + + { "DRC1 Signal Activity", NULL, "DRC1L" }, + { "DRC1 Signal Activity", NULL, "DRC1R" }, + { "DRC2 Signal Activity", NULL, "DRC2L" }, + { "DRC2 Signal Activity", NULL, "DRC2R" }, +}; + +static int marley_set_fll(struct snd_soc_codec *codec, int fll_id, int source, + unsigned int fref, unsigned int fout) +{ + struct marley_priv *marley = snd_soc_codec_get_drvdata(codec); + + switch (fll_id) { + case MARLEY_FLL1: + return arizona_set_fll(&marley->fll[0], source, fref, fout); + case MARLEY_FLL1_REFCLK: + return arizona_set_fll_refclk(&marley->fll[0], source, fref, + fout); + default: + return -EINVAL; + } +} + +#define MARLEY_RATES SNDRV_PCM_RATE_8000_192000 + +#define MARLEY_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_driver marley_dai[] = { + { + .name = "marley-aif1", + .id = 1, + .base = ARIZONA_AIF1_BCLK_CTRL, + .playback = { + .stream_name = "AIF1 Playback", + .channels_min = 1, + .channels_max = 6, + .rates = MARLEY_RATES, + .formats = MARLEY_FORMATS, + }, + .capture = { + .stream_name = "AIF1 Capture", + .channels_min = 1, + .channels_max = 6, + .rates = MARLEY_RATES, + .formats = MARLEY_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "marley-aif2", + .id = 2, + .base = ARIZONA_AIF2_BCLK_CTRL, + .playback = { + .stream_name = "AIF2 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = MARLEY_RATES, + .formats = MARLEY_FORMATS, + }, + .capture = { + .stream_name = "AIF2 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = MARLEY_RATES, + .formats = MARLEY_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "marley-aif3", + .id = 3, + .base = ARIZONA_AIF3_BCLK_CTRL, + .playback = { + .stream_name = "AIF3 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = MARLEY_RATES, + .formats = MARLEY_FORMATS, + }, + .capture = { + .stream_name = "AIF3 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = MARLEY_RATES, + .formats = MARLEY_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "marley-slim1", + .id = 5, + .playback = { + .stream_name = "Slim1 Playback", + .channels_min = 1, + .channels_max = 4, + .rates = MARLEY_RATES, + .formats = MARLEY_FORMATS, + }, + .capture = { + .stream_name = "Slim1 Capture", + .channels_min = 1, + .channels_max = 4, + .rates = MARLEY_RATES, + .formats = MARLEY_FORMATS, + }, + .ops = &arizona_simple_dai_ops, + }, + { + .name = "marley-slim2", + .id = 6, + .playback = { + .stream_name = "Slim2 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = MARLEY_RATES, + .formats = MARLEY_FORMATS, + }, + .capture = { + .stream_name = "Slim2 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = MARLEY_RATES, + .formats = MARLEY_FORMATS, + }, + .ops = &arizona_simple_dai_ops, + }, + { + .name = "marley-cpu-voicectrl", + .capture = { + .stream_name = "Voice Control CPU", + .channels_min = 1, + .channels_max = 1, + .rates = MARLEY_RATES, + .formats = MARLEY_FORMATS, + }, + .compress_dai = 1, + }, + { + .name = "marley-dsp-voicectrl", + .capture = { + .stream_name = "Voice Control DSP", + .channels_min = 1, + .channels_max = 1, + .rates = MARLEY_RATES, + .formats = MARLEY_FORMATS, + }, + }, + { + .name = "marley-cpu-trace", + .capture = { + .stream_name = "Trace CPU", + .channels_min = 2, + .channels_max = 8, + .rates = MARLEY_RATES, + .formats = MARLEY_FORMATS, + }, + .compress_dai = 1, + }, + { + .name = "marley-dsp-trace", + .capture = { + .stream_name = "Trace DSP", + .channels_min = 2, + .channels_max = 8, + .rates = MARLEY_RATES, + .formats = MARLEY_FORMATS, + }, + }, +}; + +static irqreturn_t adsp2_irq(int irq, void *data) +{ + struct marley_priv *marley = data; + int ret, avail; + + mutex_lock(&marley->compr_info.lock); + + if (!marley->compr_info.trig && + marley->core.adsp[2].fw_id == 0x8000d && + marley->core.adsp[2].running) { + if (marley->core.arizona->pdata.ez2ctrl_trigger) + marley->core.arizona->pdata.ez2ctrl_trigger(); + marley->compr_info.trig = true; + } + + if (!marley->compr_info.allocated) + goto out; + + ret = wm_adsp_stream_handle_irq(marley->compr_info.adsp); + if (ret < 0) { + dev_err(marley->core.arizona->dev, + "Failed to capture DSP data: %d\n", + ret); + goto out; + } + + marley->compr_info.total_copied += ret; + + avail = wm_adsp_stream_avail(marley->compr_info.adsp); + if (avail > MARLEY_DEFAULT_FRAGMENT_SIZE) + snd_compr_fragment_elapsed(marley->compr_info.stream); + +out: + mutex_unlock(&marley->compr_info.lock); + + return IRQ_HANDLED; +} + +static int marley_open(struct snd_compr_stream *stream) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct marley_priv *marley = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = marley->core.arizona; + int n_adsp, ret = 0; + + mutex_lock(&marley->compr_info.lock); + + if (marley->compr_info.stream) { + ret = -EBUSY; + goto out; + } + + if (strcmp(rtd->codec_dai->name, "marley-dsp-voicectrl") == 0) { + n_adsp = 2; + } else if (strcmp(rtd->codec_dai->name, "marley-dsp-trace") == 0) { + n_adsp = 0; + } else { + dev_err(arizona->dev, + "No suitable compressed stream for dai '%s'\n", + rtd->codec_dai->name); + ret = -EINVAL; + goto out; + } + + if (!wm_adsp_compress_supported(&marley->core.adsp[n_adsp], stream)) { + dev_err(arizona->dev, + "No suitable firmware for compressed stream\n"); + ret = -EINVAL; + goto out; + } + + marley->compr_info.adsp = &marley->core.adsp[n_adsp]; + marley->compr_info.stream = stream; +out: + mutex_unlock(&marley->compr_info.lock); + + return ret; +} + +static int marley_free(struct snd_compr_stream *stream) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct marley_priv *marley = snd_soc_codec_get_drvdata(rtd->codec); + + mutex_lock(&marley->compr_info.lock); + + marley->compr_info.allocated = false; + marley->compr_info.stream = NULL; + marley->compr_info.total_copied = 0; + + wm_adsp_stream_free(marley->compr_info.adsp); + + mutex_unlock(&marley->compr_info.lock); + + return 0; +} + +static int marley_set_params(struct snd_compr_stream *stream, + struct snd_compr_params *params) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct marley_priv *marley = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = marley->core.arizona; + struct marley_compr *compr = &marley->compr_info; + int ret = 0; + + mutex_lock(&compr->lock); + + if (!wm_adsp_format_supported(compr->adsp, stream, params)) { + dev_err(arizona->dev, + "Invalid params: id:%u, chan:%u,%u, rate:%u format:%u\n", + params->codec.id, params->codec.ch_in, + params->codec.ch_out, params->codec.sample_rate, + params->codec.format); + ret = -EINVAL; + goto out; + } + + ret = wm_adsp_stream_alloc(compr->adsp, params); + if (ret == 0) + compr->allocated = true; + +out: + mutex_unlock(&compr->lock); + + return ret; +} + +static int marley_get_params(struct snd_compr_stream *stream, + struct snd_codec *params) +{ + return 0; +} + +static int marley_trigger(struct snd_compr_stream *stream, int cmd) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct marley_priv *marley = snd_soc_codec_get_drvdata(rtd->codec); + int ret = 0; + bool pending = false; + + mutex_lock(&marley->compr_info.lock); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + ret = wm_adsp_stream_start(marley->compr_info.adsp); + + /** + * If the stream has already triggered before the stream + * opened better process any outstanding data + */ + if (marley->compr_info.trig) + pending = true; + break; + case SNDRV_PCM_TRIGGER_STOP: + break; + default: + ret = -EINVAL; + break; + } + + mutex_unlock(&marley->compr_info.lock); + + if (pending) + adsp2_irq(0, marley); + + return ret; +} + +static int marley_pointer(struct snd_compr_stream *stream, + struct snd_compr_tstamp *tstamp) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct marley_priv *marley = snd_soc_codec_get_drvdata(rtd->codec); + + mutex_lock(&marley->compr_info.lock); + tstamp->byte_offset = 0; + tstamp->copied_total = marley->compr_info.total_copied; + mutex_unlock(&marley->compr_info.lock); + + return 0; +} + +static int marley_copy(struct snd_compr_stream *stream, char __user *buf, + size_t count) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct marley_priv *marley = snd_soc_codec_get_drvdata(rtd->codec); + int ret; + + mutex_lock(&marley->compr_info.lock); + + if (stream->direction == SND_COMPRESS_PLAYBACK) + ret = -EINVAL; + else + ret = wm_adsp_stream_read(marley->compr_info.adsp, buf, count); + + mutex_unlock(&marley->compr_info.lock); + + return ret; +} + +static int marley_get_caps(struct snd_compr_stream *stream, + struct snd_compr_caps *caps) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct marley_priv *marley = snd_soc_codec_get_drvdata(rtd->codec); + + mutex_lock(&marley->compr_info.lock); + + memset(caps, 0, sizeof(*caps)); + + caps->direction = stream->direction; + caps->min_fragment_size = MARLEY_DEFAULT_FRAGMENT_SIZE; + caps->max_fragment_size = MARLEY_DEFAULT_FRAGMENT_SIZE; + caps->min_fragments = MARLEY_DEFAULT_FRAGMENTS; + caps->max_fragments = MARLEY_DEFAULT_FRAGMENTS; + + wm_adsp_get_caps(marley->compr_info.adsp, stream, caps); + + mutex_unlock(&marley->compr_info.lock); + + return 0; +} + +static int marley_get_codec_caps(struct snd_compr_stream *stream, + struct snd_compr_codec_caps *codec) +{ + return 0; +} + +static int marley_codec_probe(struct snd_soc_codec *codec) +{ + struct marley_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->core.arizona; + int ret; + + codec->control_data = priv->core.arizona->regmap; + priv->core.arizona->dapm = &codec->dapm; + + ret = snd_soc_codec_set_cache_io(codec, 32, 16, SND_SOC_REGMAP); + if (ret != 0) + return ret; + + arizona_init_spk(codec); + arizona_init_gpio(codec); + arizona_init_mono(codec); + arizona_init_input(codec); + + /* Update Sample Rate 1 to 48kHz for cases when no AIF1 hw_params */ + regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_1, + ARIZONA_SAMPLE_RATE_1_MASK, 0x03); + + ret = snd_soc_add_codec_controls(codec, wm_adsp2v2_fw_controls, 6); + if (ret != 0) + return ret; + + mutex_lock(&codec->card->dapm_mutex); + snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); + mutex_unlock(&codec->card->dapm_mutex); + + priv->core.arizona->dapm = &codec->dapm; + + ret = arizona_request_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, + "ADSP2 interrupt 1", adsp2_irq, priv); + if (ret != 0) { + dev_err(arizona->dev, "Failed to request DSP IRQ: %d\n", ret); + return ret; + } + + ret = irq_set_irq_wake(arizona->irq, 1); + if (ret) + dev_err(arizona->dev, + "Failed to set DSP IRQ to wake source: %d\n", + ret); + + mutex_lock(&codec->card->dapm_mutex); + snd_soc_dapm_enable_pin(&codec->dapm, "DRC2 Signal Activity"); + mutex_unlock(&codec->card->dapm_mutex); + + ret = regmap_update_bits(arizona->regmap, CLEARWATER_IRQ2_MASK_9, + CLEARWATER_DRC2_SIG_DET_EINT2, + CLEARWATER_DRC2_SIG_DET_EINT2); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to unmask DRC2 IRQ for DSP: %d\n", + ret); + return ret; + } + + return 0; +} + +static int marley_codec_remove(struct snd_soc_codec *codec) +{ + struct marley_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->core.arizona; + + irq_set_irq_wake(arizona->irq, 0); + arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); + regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, + ARIZONA_IM_DRC2_SIG_DET_EINT2, + 0); + + priv->core.arizona->dapm = NULL; + + return 0; +} + +#define MARLEY_DIG_VU 0x0200 + +static unsigned int marley_digital_vu[] = { + ARIZONA_DAC_DIGITAL_VOLUME_1L, + ARIZONA_DAC_DIGITAL_VOLUME_1R, + ARIZONA_DAC_DIGITAL_VOLUME_4L, + ARIZONA_DAC_DIGITAL_VOLUME_5L, + ARIZONA_DAC_DIGITAL_VOLUME_5R, +}; + +static struct snd_soc_codec_driver soc_codec_dev_marley = { + .probe = marley_codec_probe, + .remove = marley_codec_remove, + + .idle_bias_off = true, + + .set_sysclk = arizona_set_sysclk, + .set_pll = marley_set_fll, + + .controls = marley_snd_controls, + .num_controls = ARRAY_SIZE(marley_snd_controls), + .dapm_widgets = marley_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(marley_dapm_widgets), + .dapm_routes = marley_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(marley_dapm_routes), +}; + +static struct snd_compr_ops marley_compr_ops = { + .open = marley_open, + .free = marley_free, + .set_params = marley_set_params, + .get_params = marley_get_params, + .trigger = marley_trigger, + .pointer = marley_pointer, + .copy = marley_copy, + .get_caps = marley_get_caps, + .get_codec_caps = marley_get_codec_caps, +}; + +static struct snd_soc_platform_driver marley_compr_platform = { + .compr_ops = &marley_compr_ops, +}; + +static int marley_probe(struct platform_device *pdev) +{ + struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); + struct marley_priv *marley; + int i, ret; + + BUILD_BUG_ON(ARRAY_SIZE(marley_dai) > ARIZONA_MAX_DAI); + + marley = devm_kzalloc(&pdev->dev, sizeof(struct marley_priv), + GFP_KERNEL); + if (marley == NULL) + return -ENOMEM; + platform_set_drvdata(pdev, marley); + + /* Set of_node to parent from the SPI device to allow DAPM to + * locate regulator supplies */ + pdev->dev.of_node = arizona->dev->of_node; + + mutex_init(&marley->compr_info.lock); + mutex_init(&marley->fw_lock); + + marley->core.arizona = arizona; + marley->core.num_inputs = 4; + + for (i = 0; i < MARLEY_NUM_ADSP; i++) { + marley->core.adsp[i].part = "marley"; + if (arizona->pdata.rev_specific_fw) + marley->core.adsp[i].part_rev = 'a' + arizona->rev; + marley->core.adsp[i].num = i + 1; + marley->core.adsp[i].type = WMFW_ADSP2; + marley->core.adsp[i].rev = 1; + marley->core.adsp[i].dev = arizona->dev; + marley->core.adsp[i].regmap = arizona->regmap_32bit; + + marley->core.adsp[i].base = wm_adsp2_control_bases[i]; + marley->core.adsp[i].mem = marley_dsp_regions[i]; + marley->core.adsp[i].num_mems + = ARRAY_SIZE(marley_dsp1_regions); + + if (arizona->pdata.num_fw_defs[i]) { + marley->core.adsp[i].firmwares + = arizona->pdata.fw_defs[i]; + + marley->core.adsp[i].num_firmwares + = arizona->pdata.num_fw_defs[i]; + } + + marley->core.adsp[i].rate_put_cb = marley_adsp_rate_put_cb; + + ret = wm_adsp2_init(&marley->core.adsp[i], &marley->fw_lock); + if (ret != 0) + return ret; + } + + for (i = 0; i < ARRAY_SIZE(marley->fll); i++) { + marley->fll[i].vco_mult = 3; + marley->fll[i].min_outdiv = 3; + marley->fll[i].max_outdiv = 3; + } + + arizona_init_fll(arizona, 1, ARIZONA_FLL1_CONTROL_1 - 1, + ARIZONA_IRQ_FLL1_LOCK, ARIZONA_IRQ_FLL1_CLOCK_OK, + &marley->fll[0]); + + for (i = 0; i < ARRAY_SIZE(marley_dai); i++) + arizona_init_dai(&marley->core, i); + + /* Latch volume update bits */ + for (i = 0; i < ARRAY_SIZE(marley_digital_vu); i++) + regmap_update_bits(arizona->regmap, marley_digital_vu[i], + MARLEY_DIG_VU, MARLEY_DIG_VU); + + pm_runtime_enable(&pdev->dev); + pm_runtime_idle(&pdev->dev); + + ret = snd_soc_register_platform(&pdev->dev, &marley_compr_platform); + if (ret < 0) { + dev_err(&pdev->dev, + "Failed to register platform: %d\n", + ret); + goto error; + } + + ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_marley, + marley_dai, ARRAY_SIZE(marley_dai)); + if (ret < 0) { + dev_err(&pdev->dev, + "Failed to register codec: %d\n", + ret); + snd_soc_unregister_platform(&pdev->dev); + goto error; + } + + return ret; + +error: + mutex_destroy(&marley->compr_info.lock); + mutex_destroy(&marley->fw_lock); + + return ret; +} + +static int marley_remove(struct platform_device *pdev) +{ + struct marley_priv *marley = platform_get_drvdata(pdev); + + snd_soc_unregister_codec(&pdev->dev); + pm_runtime_disable(&pdev->dev); + + mutex_destroy(&marley->compr_info.lock); + mutex_destroy(&marley->fw_lock); + + return 0; +} + +static struct platform_driver marley_codec_driver = { + .driver = { + .name = "marley-codec", + .owner = THIS_MODULE, + }, + .probe = marley_probe, + .remove = marley_remove, +}; + +module_platform_driver(marley_codec_driver); + +MODULE_DESCRIPTION("ASoC Marley driver"); +MODULE_AUTHOR("Piotr Stankiewicz "); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:marley-codec"); diff --git a/sound/soc/codecs/marley.h b/sound/soc/codecs/marley.h new file mode 100644 index 00000000000..972f3bd6cc5 --- /dev/null +++ b/sound/soc/codecs/marley.h @@ -0,0 +1,21 @@ +/* + * marley.h -- ALSA SoC Audio driver for Marley class codecs + * + * Copyright 2015 Cirrus Logic + * + * Author: Piotr Stankiewicz + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _MARLEY_H +#define _MARLEY_H + +#include "arizona.h" + +#define MARLEY_FLL1 1 +#define MARLEY_FLL1_REFCLK 3 + +#endif From 99e9e759f8d0b33e2e79b3e3c9fb77edf61eb586 Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Tue, 28 Apr 2015 12:14:17 +0100 Subject: [PATCH 0752/1167] mfd: marley: MICBIAS switch support Marley uses 2 MICBIAS generators with 2 outputs each, each output is turned on/off using a switch. Field descriptions are added for registers controlling these switches. The temporary register patch can be removed as a following ASoC patch adds support for MICBIAS[1/2][A/B] to the codec driver. Change-Id: Ic5701a87ff0ad5bb44b351d27e05ea5958a5a276 Signed-off-by: Piotr Stankiewicz --- drivers/mfd/marley-tables.c | 25 +++------------ include/linux/mfd/arizona/registers.h | 44 +++++++++++++++++++++++++-- 2 files changed, 47 insertions(+), 22 deletions(-) diff --git a/drivers/mfd/marley-tables.c b/drivers/mfd/marley-tables.c index e01a72b69f8..71e20ef45cb 100644 --- a/drivers/mfd/marley-tables.c +++ b/drivers/mfd/marley-tables.c @@ -18,25 +18,10 @@ #include "arizona.h" -static const struct reg_default marley_16_micbias_patch[] = { - { 0x21c, 0x23 }, - { 0x21e, 0x23 }, -}; - /* We use a function so we can use ARRAY_SIZE() */ int marley_patch(struct arizona *arizona) { - int ret = 0; - const struct reg_default *patch16 = marley_16_micbias_patch; - unsigned int num16 = ARRAY_SIZE(marley_16_micbias_patch); - - ret = regmap_register_patch(arizona->regmap, patch16, num16); - if (ret < 0) { - dev_err(arizona->dev, - "Error in applying 16-bit patch: %d\n", ret); - } - - return ret; + return 0; } EXPORT_SYMBOL_GPL(marley_patch); @@ -171,8 +156,8 @@ static const struct reg_default marley_reg_default[] = { { 0x00000213, 0x03e4 }, /* R531 (0x213) - LDO2 Control 1 */ { 0x00000218, 0x00e6 }, /* R536 (0x218) - Mic Bias Ctrl 1 */ { 0x00000219, 0x00e6 }, /* R537 (0x219) - Mic Bias Ctrl 2 */ - { 0x0000021c, 0x0023 }, /* R540 (0x21c) - Mic Bias Ctrl 5 */ - { 0x0000021d, 0x0023 }, /* R541 (0x21d) - Mic Bias Ctrl 6 */ + { 0x0000021c, 0x0022 }, /* R540 (0x21c) - Mic Bias Ctrl 5 */ + { 0x0000021e, 0x0022 }, /* R542 (0x21e) - Mic Bias Ctrl 6 */ { 0x0000027e, 0x0000 }, /* R638 (0x27E) - EDRE HP stereo control */ { 0x00000293, 0x0080 }, /* R659 (0x293) - Accessory Detect Mode 1 */ { 0x0000029b, 0x0000 }, /* R667 (0x29B) - Headphone Detect 1 */ @@ -955,8 +940,8 @@ static bool marley_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_LDO2_CONTROL_1: case ARIZONA_MIC_BIAS_CTRL_1: case ARIZONA_MIC_BIAS_CTRL_2: - case MARLEY_MIC_BIAS_CTRL_5: - case MARLEY_MIC_BIAS_CTRL_6: + case ARIZONA_MIC_BIAS_CTRL_5: + case ARIZONA_MIC_BIAS_CTRL_6: case ARIZONA_HP_CTRL_1L: case ARIZONA_HP_CTRL_1R: case ARIZONA_DCS_HP1L_CONTROL: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 753c1b00efe..199e454e448 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -159,8 +159,8 @@ #define ARIZONA_MIC_BIAS_CTRL_2 0x219 #define ARIZONA_MIC_BIAS_CTRL_3 0x21A #define ARIZONA_MIC_BIAS_CTRL_4 0x21B -#define MARLEY_MIC_BIAS_CTRL_5 0x21C -#define MARLEY_MIC_BIAS_CTRL_6 0x21E +#define ARIZONA_MIC_BIAS_CTRL_5 0x21C +#define ARIZONA_MIC_BIAS_CTRL_6 0x21E #define ARIZONA_HP_CTRL_1L 0x225 #define ARIZONA_HP_CTRL_1R 0x226 #define ARIZONA_HP_CTRL_2L 0x227 @@ -3602,6 +3602,46 @@ #define ARIZONA_MICB4_ENA_SHIFT 0 /* MICB4_ENA */ #define ARIZONA_MICB4_ENA_WIDTH 1 /* MICB4_ENA */ +/* + * R540 (0x21C) - Mic Bias Ctrl 5 + */ +#define ARIZONA_MICB1B_DISCH 0x0020 /* MICB1B_DISCH */ +#define ARIZONA_MICB1B_DISCH_MASK 0x0020 /* MICB1B_DISCH */ +#define ARIZONA_MICB1B_DISCH_SHIFT 5 /* MICB1B_DISCH */ +#define ARIZONA_MICB1B_DISCH_WIDTH 1 /* MICB1B_DISCH */ +#define ARIZONA_MICB1B_ENA 0x0010 /* MICB1B_ENA */ +#define ARIZONA_MICB1B_ENA_MASK 0x0010 /* MICB1B_ENA */ +#define ARIZONA_MICB1B_ENA_SHIFT 4 /* MICB1B_ENA */ +#define ARIZONA_MICB1B_ENA_WIDTH 1 /* MICB1B_ENA */ +#define ARIZONA_MICB1A_DISCH 0x0002 /* MICB1A_DISCH */ +#define ARIZONA_MICB1A_DISCH_MASK 0x0002 /* MICB1A_DISCH */ +#define ARIZONA_MICB1A_DISCH_SHIFT 1 /* MICB1A_DISCH */ +#define ARIZONA_MICB1A_DISCH_WIDTH 1 /* MICB1A_DISCH */ +#define ARIZONA_MICB1A_ENA 0x0001 /* MICB1A_ENA */ +#define ARIZONA_MICB1A_ENA_MASK 0x0001 /* MICB1A_ENA */ +#define ARIZONA_MICB1A_ENA_SHIFT 0 /* MICB1A_ENA */ +#define ARIZONA_MICB1A_ENA_WIDTH 1 /* MICB1A_ENA */ + +/* + * R542 (0x21E) - Mic Bias Ctrl 6 + */ +#define ARIZONA_MICB2B_DISCH 0x0020 /* MICB2B_DISCH */ +#define ARIZONA_MICB2B_DISCH_MASK 0x0020 /* MICB2B_DISCH */ +#define ARIZONA_MICB2B_DISCH_SHIFT 5 /* MICB2B_DISCH */ +#define ARIZONA_MICB2B_DISCH_WIDTH 1 /* MICB2B_DISCH */ +#define ARIZONA_MICB2B_ENA 0x0010 /* MICB2B_ENA */ +#define ARIZONA_MICB2B_ENA_MASK 0x0010 /* MICB2B_ENA */ +#define ARIZONA_MICB2B_ENA_SHIFT 4 /* MICB2B_ENA */ +#define ARIZONA_MICB2B_ENA_WIDTH 1 /* MICB2B_ENA */ +#define ARIZONA_MICB2A_DISCH 0x0002 /* MICB2A_DISCH */ +#define ARIZONA_MICB2A_DISCH_MASK 0x0002 /* MICB2A_DISCH */ +#define ARIZONA_MICB2A_DISCH_SHIFT 1 /* MICB2A_DISCH */ +#define ARIZONA_MICB2A_DISCH_WIDTH 1 /* MICB2A_DISCH */ +#define ARIZONA_MICB2A_ENA 0x0001 /* MICB2A_ENA */ +#define ARIZONA_MICB2A_ENA_MASK 0x0001 /* MICB2A_ENA */ +#define ARIZONA_MICB2A_ENA_SHIFT 0 /* MICB2A_ENA */ +#define ARIZONA_MICB2A_ENA_WIDTH 1 /* MICB2A_ENA */ + /* * R549 (0x225) - HP Ctrl 1L */ From 74bc0ab5756a9f77b9d9568211ebca7e68693e55 Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Tue, 28 Apr 2015 12:20:33 +0100 Subject: [PATCH 0753/1167] ASoC: marley: MICBIAS switch support Change-Id: Ifedb636342032f718ff5ce77a936a841d63add44 Signed-off-by: Piotr Stankiewicz --- sound/soc/codecs/marley.c | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index 3398852ba65..9af4ba452fd 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -950,11 +950,20 @@ SND_SOC_DAPM_PGA_E("IN2R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN2R_ENA_SHIFT, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_SUPPLY("MICBIAS1A", ARIZONA_MIC_BIAS_CTRL_1, +SND_SOC_DAPM_SUPPLY("MICBIAS1 Src", ARIZONA_MIC_BIAS_CTRL_1, ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_SUPPLY("MICBIAS2A", ARIZONA_MIC_BIAS_CTRL_2, +SND_SOC_DAPM_SUPPLY("MICBIAS2 Src", ARIZONA_MIC_BIAS_CTRL_2, ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS1A", ARIZONA_MIC_BIAS_CTRL_5, + ARIZONA_MICB1A_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS1B", ARIZONA_MIC_BIAS_CTRL_5, + ARIZONA_MICB1B_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS2A", ARIZONA_MIC_BIAS_CTRL_6, + ARIZONA_MICB2A_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS2B", ARIZONA_MIC_BIAS_CTRL_6, + ARIZONA_MICB2B_ENA_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_PGA("Noise Generator", CLEARWATER_COMFORT_NOISE_GENERATOR, CLEARWATER_NOISE_GEN_ENA_SHIFT, 0, NULL, 0), @@ -1337,8 +1346,13 @@ static const struct snd_soc_dapm_route marley_dapm_routes[] = { { "DSP2", NULL, "DSPCLK"}, { "DSP3", NULL, "DSPCLK"}, - { "MICBIAS1A", NULL, "MICVDD" }, - { "MICBIAS2A", NULL, "MICVDD" }, + { "MICBIAS1 Src", NULL, "MICVDD" }, + { "MICBIAS2 Src", NULL, "MICVDD" }, + + { "MICBIAS1A", NULL, "MICBIAS1 Src" }, + { "MICBIAS1B", NULL, "MICBIAS1 Src" }, + { "MICBIAS2A", NULL, "MICBIAS2 Src" }, + { "MICBIAS2B", NULL, "MICBIAS2 Src" }, { "Noise Generator", NULL, "SYSCLK" }, { "Tone Generator 1", NULL, "SYSCLK" }, From 3caccd85b2c023e303ca89351d77c81d9c72b13a Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Tue, 28 Apr 2015 12:21:47 +0100 Subject: [PATCH 0754/1167] switch: arizona: always force MICBIAS on Marley Due to how switches for MICBIAS[1/2][A/B] work MICBIAS needs to be forced on. Change-Id: If14f6b37a7052c3591761b7c35b9b9ad3b362ed2 Signed-off-by: Piotr Stankiewicz --- drivers/switch/switch-arizona.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 1c683092d4f..c9e98679f53 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -3320,9 +3320,11 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; } break; + case CS47L35: + arizona->pdata.micd_force_micbias = true; + /* fall through to next case to set common properties */ case WM8285: case WM1840: - case CS47L35: info->micd_clamp = true; info->hpdet_ip = 4; break; From a66b43bbd8637e19e34a1b2bd13720f3596d6b1a Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Tue, 28 Apr 2015 12:23:16 +0100 Subject: [PATCH 0755/1167] extcon: arizona: always force MICBIAS on Marley Due to how switches for MICBIAS[1/2][A/B] work MICBIAS needs to be forced on. Change-Id: Ie4fb106f615ce5065fe132a8d8db396af494e41f Signed-off-by: Piotr Stankiewicz --- drivers/extcon/extcon-arizona.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index e84f5716bc5..ba75dbde8c4 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -1518,6 +1518,9 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; } break; + case CS47L35: + arizona->pdata.micd_force_micbias = true; + /* fall through to default case to set common properties */ default: info->micd_clamp = true; info->hpdet_ip = 2; From d62758f1b1ee6b512b2501f70e8f5e99f2e07db1 Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Fri, 1 May 2015 10:42:35 +0100 Subject: [PATCH 0756/1167] ASoC: marley: Removing input mode controls Change-Id: Ie29da5651033c096cc2ab46e1a7e36bea43eb952 Signed-off-by: Piotr Stankiewicz --- sound/soc/codecs/marley.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index 9af4ba452fd..dc94605f03a 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -563,10 +563,6 @@ SOC_SINGLE_TLV("IN2L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_2L, SOC_SINGLE_TLV("IN2R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_2R, ARIZONA_IN2R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), -SOC_ENUM_EXT("IN1 Mode", arizona_ip_mode[0], - snd_soc_get_enum_double, arizona_ip_mode_put), -SOC_ENUM_EXT("IN2 Mode", arizona_ip_mode[1], - snd_soc_get_enum_double, arizona_ip_mode_put), SOC_ENUM_EXT("CP Mode", marley_cp_mode[0], marley_cp_mode_get, marley_cp_mode_put), From 246e2270d7f2c4b897127e0d9359ef382b5acc77 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 30 Apr 2015 14:16:10 +0100 Subject: [PATCH 0757/1167] ASoC: vegas: Hookup SYSCLK to inputs, micsupp and tone generators All sources and sinks should enable SYSCLK. Change-Id: Ie227f78c9574ab7f94d0e469848d72938b64b7cb Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/vegas.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/sound/soc/codecs/vegas.c b/sound/soc/codecs/vegas.c index 1436678c1cc..d74d368909b 100644 --- a/sound/soc/codecs/vegas.c +++ b/sound/soc/codecs/vegas.c @@ -916,6 +916,13 @@ static const struct snd_soc_dapm_route vegas_dapm_routes[] = { { "OUT5L", NULL, "SYSCLK" }, { "OUT5R", NULL, "SYSCLK" }, + { "IN1AL", NULL, "SYSCLK" }, + { "IN1AR", NULL, "SYSCLK" }, + { "IN1BL", NULL, "SYSCLK" }, + { "IN1BR", NULL, "SYSCLK" }, + { "IN2A", NULL, "SYSCLK" }, + { "IN2B", NULL, "SYSCLK" }, + { "SPD1", NULL, "SYSCLK" }, { "SPD1", NULL, "SPD1TX1" }, { "SPD1", NULL, "SPD1TX2" }, @@ -924,6 +931,9 @@ static const struct snd_soc_dapm_route vegas_dapm_routes[] = { { "MICBIAS2", NULL, "MICVDD" }, { "MICBIAS3", NULL, "MICVDD" }, + { "Tone Generator 1", NULL, "SYSCLK" }, + { "Tone Generator 2", NULL, "SYSCLK" }, + { "Tone Generator 1", NULL, "TONE" }, { "Tone Generator 2", NULL, "TONE" }, @@ -1111,6 +1121,8 @@ static const struct snd_soc_dapm_route vegas_dapm_routes[] = { { "SPKDATL", NULL, "OUT5L" }, { "SPKDATR", NULL, "OUT5R" }, + { "MICSUPP", NULL, "SYSCLK" }, + { "DRC1 Signal Activity", NULL, "DRC1L" }, { "DRC1 Signal Activity", NULL, "DRC1R" }, }; From fe5bca0ba1b43d20b7d2ae539b9163ceb25b88b9 Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Tue, 28 Apr 2015 16:49:44 +0100 Subject: [PATCH 0758/1167] mfd: marley: field description for HP/EP selector Change-Id: I17476a67b4b00372c36513a02b73e7e38eb0e464 Signed-off-by: Piotr Stankiewicz --- include/linux/mfd/arizona/registers.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 199e454e448..07e1fb2febf 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -4480,6 +4480,10 @@ /* * R1024 (0x400) - Output Enables 1 */ +#define ARIZONA_HP_SEL 0x8000 /* HP_SEL */ +#define ARIZONA_HP_SEL_MASK 0x8000 /* HP_SEL */ +#define ARIZONA_HP_SEL_SHIFT 15 /* HP_SEL */ +#define ARIZONA_HP_SEL_WIDTH 1 /* HP_SEL */ #define ARIZONA_OUT6L_ENA 0x0800 /* OUT6L_ENA */ #define ARIZONA_OUT6L_ENA_MASK 0x0800 /* OUT6L_ENA */ #define ARIZONA_OUT6L_ENA_SHIFT 11 /* OUT6L_ENA */ From c3267fff368f6947ccd242fb2cbd86ebf49def06 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 24 Apr 2015 16:28:02 +0100 Subject: [PATCH 0759/1167] ASoC: arizona: Silence warning on older compilers Change-Id: I5d532fd7a9908b6f0ccdd76c834c537295e79c96 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index ecf4f85f853..6ea5d12d4ea 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2969,8 +2969,8 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1]; int base = dai->driver->base; int ret = 0, err; - int i, sr_val, lim; - const int *sources; + int i, sr_val, lim = 0; + const int *sources = NULL; unsigned int cur, tar; bool change_rate = true; From bb4cbe0cafb18243d9403337ea57eb53b611fe74 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Mon, 29 Jul 2013 17:13:58 +0200 Subject: [PATCH 0760/1167] ASoC: dapm: Wrap kcontrol widget list access In preparation for adding additional per control data wrap all access to the widget list in helper functions. Signed-off-by: Lars-Peter Clausen Signed-off-by: Mark Brown (cherry picked from commit e84357f7608f230b905acb18fe668609c9b811f0) Change-Id: I8fc048a7c7697a3308d7ba0b1d3f753c5a77d7df Signed-off-by: Charles Keepax --- sound/soc/soc-dapm.c | 97 +++++++++++++++++++++++++++++++------------- 1 file changed, 68 insertions(+), 29 deletions(-) diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index c7051c457b7..caed4c3d252 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c @@ -202,6 +202,59 @@ static inline struct snd_soc_card *dapm_get_soc_card( return NULL; } +struct dapm_kcontrol_data { + struct snd_soc_dapm_widget_list wlist; +}; + +static int dapm_kcontrol_data_alloc(struct snd_soc_dapm_widget *widget, + struct snd_kcontrol *kcontrol) +{ + struct dapm_kcontrol_data *data; + + data = kzalloc(sizeof(*data) + sizeof(widget), GFP_KERNEL); + if (!data) { + dev_err(widget->dapm->dev, + "ASoC: can't allocate kcontrol data for %s\n", + widget->name); + return -ENOMEM; + } + + data->wlist.widgets[0] = widget; + data->wlist.num_widgets = 1; + + kcontrol->private_data = &data->wlist; + + return 0; +} + +static void dapm_kcontrol_free(struct snd_kcontrol *kctl) +{ + struct dapm_kcontrol_data *data = container_of(snd_kcontrol_chip(kctl), + struct dapm_kcontrol_data, wlist); + kfree(data); +} + +static int dapm_kcontrol_add_widget(struct snd_kcontrol *kcontrol, + struct snd_soc_dapm_widget *widget) +{ + struct dapm_kcontrol_data *data = container_of( + snd_kcontrol_chip(kcontrol), struct dapm_kcontrol_data, wlist); + struct dapm_kcontrol_data *new_data; + unsigned int n = data->wlist.num_widgets + 1; + + new_data = krealloc(data, sizeof(*data) + sizeof(widget) * n, + GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->wlist.widgets[n - 1] = widget; + data->wlist.num_widgets = n; + + kcontrol->private_data = &data->wlist; + + return 0; +} + static void dapm_reset(struct snd_soc_card *card) { struct snd_soc_dapm_widget *w; @@ -520,9 +573,6 @@ static int dapm_create_or_share_mixmux_kcontrol(struct snd_soc_dapm_widget *w, size_t prefix_len; int shared; struct snd_kcontrol *kcontrol; - struct snd_soc_dapm_widget_list *wlist; - int wlistentries; - size_t wlistsize; bool wname_in_long_name, kcname_in_long_name; size_t name_len; char *long_name; @@ -542,25 +592,6 @@ static int dapm_create_or_share_mixmux_kcontrol(struct snd_soc_dapm_widget *w, shared = dapm_is_shared_kcontrol(dapm, w, &w->kcontrol_news[kci], &kcontrol); - if (kcontrol) { - wlist = kcontrol->private_data; - wlistentries = wlist->num_widgets + 1; - } else { - wlist = NULL; - wlistentries = 1; - } - - wlistsize = sizeof(struct snd_soc_dapm_widget_list) + - wlistentries * sizeof(struct snd_soc_dapm_widget *); - wlist = krealloc(wlist, wlistsize, GFP_KERNEL); - if (wlist == NULL) { - dev_err(dapm->dev, "ASoC: can't allocate widget list for %s\n", - w->name); - return -ENOMEM; - } - wlist->num_widgets = wlistentries; - wlist->widgets[wlistentries - 1] = w; - if (!kcontrol) { if (shared) { wname_in_long_name = false; @@ -583,7 +614,6 @@ static int dapm_create_or_share_mixmux_kcontrol(struct snd_soc_dapm_widget *w, kcname_in_long_name = false; break; default: - kfree(wlist); return -EINVAL; } } @@ -593,10 +623,8 @@ static int dapm_create_or_share_mixmux_kcontrol(struct snd_soc_dapm_widget *w, strlen(w->kcontrol_news[kci].name) + 1; long_name = kmalloc(name_len, GFP_KERNEL); - if (long_name == NULL) { - kfree(wlist); + if (long_name == NULL) return -ENOMEM; - } /* * The control will get a prefix from the control @@ -618,22 +646,33 @@ static int dapm_create_or_share_mixmux_kcontrol(struct snd_soc_dapm_widget *w, name = w->kcontrol_news[kci].name; } - kcontrol = snd_soc_cnew(&w->kcontrol_news[kci], wlist, name, + kcontrol = snd_soc_cnew(&w->kcontrol_news[kci], NULL, name, prefix); + kcontrol->private_free = dapm_kcontrol_free; + + ret = dapm_kcontrol_data_alloc(w, kcontrol); + if (ret) { + snd_ctl_free_one(kcontrol); + kfree(long_name); + return ret; + } + ret = snd_ctl_add(card, kcontrol); if (ret < 0) { dev_err(dapm->dev, "ASoC: failed to add widget %s dapm kcontrol %s: %d\n", w->name, name, ret); - kfree(wlist); kfree(long_name); return ret; } path->long_name = long_name; + } else { + ret = dapm_kcontrol_add_widget(kcontrol, w); + if (ret) + return ret; } - kcontrol->private_data = wlist; w->kcontrols[kci] = kcontrol; path->kcontrol = kcontrol; From 6e1e7e0ae1b6c6353a289752fe3100ef9e63c976 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Mon, 29 Jul 2013 17:14:00 +0200 Subject: [PATCH 0761/1167] ASoC: dapm: Keep a list of paths per kcontrol Currently we store for each path which control (if any at all) is associated with that control. But we are only ever interested in the reverse relationship, i.e. we want to know all the paths a certain control is associated with. This is currently implemented by always iterating over all paths. This patch updates the code to keep a list for each control which contains all the paths that are associated with that control. This improves the run time of e.g. soc_dapm_mixer_update_power() and soc_dapm_mux_update_power() from O(n) (with n being the number of paths for the card) to O(1). Signed-off-by: Lars-Peter Clausen Signed-off-by: Mark Brown (cherry picked from commit 5106b92f80a2cd37c52cffed80b4f5acfb77ccfd) Change-Id: Ic06efeef4b977adeb7d73465c0ae3a9bbebf4319 Signed-off-by: Charles Keepax --- include/sound/soc-dapm.h | 1 + sound/soc/soc-dapm.c | 41 ++++++++++++++++++++++++++++++---------- 2 files changed, 32 insertions(+), 10 deletions(-) diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h index 385c6329a96..d7c1cde308f 100644 --- a/include/sound/soc-dapm.h +++ b/include/sound/soc-dapm.h @@ -497,6 +497,7 @@ struct snd_soc_dapm_path { struct list_head list_source; struct list_head list_sink; + struct list_head list_kcontrol; struct list_head list; }; diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index caed4c3d252..f7b27cac96d 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c @@ -203,6 +203,7 @@ static inline struct snd_soc_card *dapm_get_soc_card( } struct dapm_kcontrol_data { + struct list_head paths; struct snd_soc_dapm_widget_list wlist; }; @@ -221,6 +222,7 @@ static int dapm_kcontrol_data_alloc(struct snd_soc_dapm_widget *widget, data->wlist.widgets[0] = widget; data->wlist.num_widgets = 1; + INIT_LIST_HEAD(&data->paths); kcontrol->private_data = &data->wlist; @@ -255,6 +257,28 @@ static int dapm_kcontrol_add_widget(struct snd_kcontrol *kcontrol, return 0; } +static void dapm_kcontrol_add_path(const struct snd_kcontrol *kcontrol, + struct snd_soc_dapm_path *path) +{ + struct dapm_kcontrol_data *data = container_of( + snd_kcontrol_chip(kcontrol), struct dapm_kcontrol_data, wlist); + + list_add_tail(&path->list_kcontrol, &data->paths); +} + +static struct list_head *dapm_kcontrol_get_path_list( + const struct snd_kcontrol *kcontrol) +{ + struct dapm_kcontrol_data *data = container_of( + snd_kcontrol_chip(kcontrol), struct dapm_kcontrol_data, wlist); + + return &data->paths; +} + +#define dapm_kcontrol_for_each_path(path, kcontrol) \ + list_for_each_entry(path, dapm_kcontrol_get_path_list(kcontrol), \ + list_kcontrol) + static void dapm_reset(struct snd_soc_card *card) { struct snd_soc_dapm_widget *w; @@ -675,6 +699,7 @@ static int dapm_create_or_share_mixmux_kcontrol(struct snd_soc_dapm_widget *w, w->kcontrols[kci] = kcontrol; path->kcontrol = kcontrol; + dapm_kcontrol_add_path(kcontrol, path); return 0; } @@ -695,6 +720,7 @@ static int dapm_new_mixer(struct snd_soc_dapm_widget *w) if (w->kcontrols[i]) { path->kcontrol = w->kcontrols[i]; + dapm_kcontrol_add_path(w->kcontrols[i], path); continue; } @@ -732,8 +758,10 @@ static int dapm_new_mux(struct snd_soc_dapm_widget *w) if (ret < 0) return ret; - list_for_each_entry(path, &w->sources, list_sink) + list_for_each_entry(path, &w->sources, list_sink) { path->kcontrol = w->kcontrols[0]; + dapm_kcontrol_add_path(w->kcontrols[0], path); + } return 0; } @@ -1974,10 +2002,7 @@ static int soc_dapm_mux_update_power(struct snd_soc_dapm_widget *widget, return -ENODEV; /* find dapm widget path assoc with kcontrol */ - list_for_each_entry(path, &widget->dapm->card->paths, list) { - if (path->kcontrol != kcontrol) - continue; - + dapm_kcontrol_for_each_path(path, kcontrol) { if (!path->name || !e->texts[mux]) continue; @@ -2030,11 +2055,7 @@ static int soc_dapm_mixer_update_power(struct snd_soc_dapm_widget *widget, return -ENODEV; /* find dapm widget path assoc with kcontrol */ - list_for_each_entry(path, &widget->dapm->card->paths, list) { - if (path->kcontrol != kcontrol) - continue; - - /* found, now check type */ + dapm_kcontrol_for_each_path(path, kcontrol) { found = 1; path->connect = connect; dapm_mark_dirty(path->source, "mixer connection"); From 77c98240d4accaff818b368b05ae0cf455b667bf Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 12 Aug 2013 23:28:42 +0100 Subject: [PATCH 0762/1167] ASoC: dapm: Don't create routes when creating kcontrols Attempting to create the route as part of adding a mux control causes us to attempt to add the same route twice since we loop over all sources for the mux after creating the control. Instead do the addition in the callers. Signed-off-by: Mark Brown Acked-by: Lars-Peter Clausen (cherry picked from commit 946d92a100f6c36b1c53922d5105b3c19a59173d) Change-Id: Ia085acd4c9449ac88132b704c492baa52650ff9f Signed-off-by: Charles Keepax --- sound/soc/soc-dapm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index f7b27cac96d..fcd6cad60f7 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c @@ -699,7 +699,6 @@ static int dapm_create_or_share_mixmux_kcontrol(struct snd_soc_dapm_widget *w, w->kcontrols[kci] = kcontrol; path->kcontrol = kcontrol; - dapm_kcontrol_add_path(kcontrol, path); return 0; } @@ -727,6 +726,8 @@ static int dapm_new_mixer(struct snd_soc_dapm_widget *w) ret = dapm_create_or_share_mixmux_kcontrol(w, i, path); if (ret < 0) return ret; + + dapm_kcontrol_add_path(w->kcontrols[i], path); } } From 9d3f24e62525bedff62fca5fd751a735c683baad Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Wed, 31 Jul 2013 11:52:44 +0300 Subject: [PATCH 0763/1167] ASoC: dapm: using freed pointer in dapm_kcontrol_add_widget() There is a typo here so we end up using the old freed pointer instead of the newly allocated one. (If the "n" is zero then the code works, obviously). Signed-off-by: Dan Carpenter Acked-by: Lars-Peter Clausen Signed-off-by: Mark Brown (cherry picked from commit 46a02c978fbc79de856d0fe7a8c1d4fc620796e0) Change-Id: If6dfd5761f13f63f43e1fcb7182b0497169e91c2 Signed-off-by: Charles Keepax --- sound/soc/soc-dapm.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index fcd6cad60f7..28cb053bb9b 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c @@ -246,13 +246,13 @@ static int dapm_kcontrol_add_widget(struct snd_kcontrol *kcontrol, new_data = krealloc(data, sizeof(*data) + sizeof(widget) * n, GFP_KERNEL); - if (!data) + if (!new_data) return -ENOMEM; - data->wlist.widgets[n - 1] = widget; - data->wlist.num_widgets = n; + new_data->wlist.widgets[n - 1] = widget; + new_data->wlist.num_widgets = n; - kcontrol->private_data = &data->wlist; + kcontrol->private_data = &new_data->wlist; return 0; } From 7303f0afe6a4b3338cc982a8d3b5ee5d005c4a0b Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 13 May 2015 11:00:11 +0100 Subject: [PATCH 0764/1167] mfd: arizona: Add support for CS47L85 Change-Id: I713726703c72ff03df56e47e5b954b339a4c05c1 Signed-off-by: Richard Fitzgerald --- drivers/mfd/Kconfig | 5 ++--- drivers/mfd/arizona-core.c | 5 +++-- drivers/mfd/arizona-i2c.c | 1 + drivers/mfd/arizona-spi.c | 1 + 4 files changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index aea30211b93..70d02daeb27 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1063,11 +1063,10 @@ config MFD_WM8997 Support for Wolfson Microelectronics WM8997 low power audio SoC config MFD_CLEARWATER - bool "Wolfson Microelectronics ClearWater class codecs" + bool "Cirrus Logic ClearWater class codecs" depends on MFD_ARIZONA help - Support for Wolfson Microelectronics ClearWater class low power audio SoC - such as the WM8285 + Support for Cirrus Logic ClearWater class low power audio SoC config MFD_LARGO bool "Cirrus Logic Largo" diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index df554595833..563c3fbbeb2 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1304,6 +1304,7 @@ const struct of_device_id arizona_of_match[] = { { .compatible = "wlf,wm1831", .data = (void *)WM1831 }, { .compatible = "cirrus,cs47l24", .data = (void *)CS47L24 }, { .compatible = "cirrus,cs47l35", .data = (void *)CS47L35 }, + { .compatible = "cirrus,cs47l85", .data = (void *)WM8285 }, {}, }; EXPORT_SYMBOL_GPL(arizona_of_match); @@ -1829,7 +1830,7 @@ int arizona_dev_init(struct arizona *arizona) case 0x6338: switch (arizona->type) { case WM8285: - type_name = "WM8285"; + type_name = "CS47L85"; break; case WM1840: @@ -1838,7 +1839,7 @@ int arizona_dev_init(struct arizona *arizona) default: dev_err(arizona->dev, - "Unknown Clearwater codec registered as WM8285\n"); + "Unknown Clearwater codec registered as CS47L85\n"); arizona->type = WM8285; } diff --git a/drivers/mfd/arizona-i2c.c b/drivers/mfd/arizona-i2c.c index 393696ab646..7e01168de7f 100644 --- a/drivers/mfd/arizona-i2c.c +++ b/drivers/mfd/arizona-i2c.c @@ -127,6 +127,7 @@ static const struct i2c_device_id arizona_i2c_id[] = { { "wm8285", WM8285 }, { "wm1840", WM1840 }, { "cs47l35", CS47L35 }, + { "cs47l85", WM8285 }, { } }; MODULE_DEVICE_TABLE(i2c, arizona_i2c_id); diff --git a/drivers/mfd/arizona-spi.c b/drivers/mfd/arizona-spi.c index a70e3455882..b5c1c93cfd0 100644 --- a/drivers/mfd/arizona-spi.c +++ b/drivers/mfd/arizona-spi.c @@ -122,6 +122,7 @@ static const struct spi_device_id arizona_spi_ids[] = { { "wm1831", WM1831 }, { "cs47l24", CS47L24 }, { "cs47l35", CS47L35 }, + { "cs47l85", WM8285 }, { }, }; MODULE_DEVICE_TABLE(spi, arizona_spi_ids); From 3574f9fdb01366471e0c7d5d7fb3a46d7a60c874 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 1 May 2015 14:34:03 +0100 Subject: [PATCH 0765/1167] mfd: arizona: Cleanup inconsistent indenting in registers.h Change-Id: I0b8e70dde48b46d2237e572d5665b35c73dd666b Signed-off-by: Richard Fitzgerald --- include/linux/mfd/arizona/registers.h | 3543 ++++++++++++------------- 1 file changed, 1771 insertions(+), 1772 deletions(-) diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 07e1fb2febf..436834d8e26 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -77,8 +77,8 @@ #define ARIZONA_ASYNC_SAMPLE_RATE_2 0x114 #define ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS 0x11B #define ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS 0x11C -#define CLEARWATER_DSP_CLOCK_1 0x120 -#define CLEARWATER_DSP_CLOCK_2 0x122 +#define CLEARWATER_DSP_CLOCK_1 0x120 +#define CLEARWATER_DSP_CLOCK_2 0x122 #define ARIZONA_OUTPUT_SYSTEM_CLOCK 0x149 #define ARIZONA_OUTPUT_ASYNC_CLOCK 0x14A #define ARIZONA_RATE_ESTIMATOR_1 0x152 @@ -151,7 +151,7 @@ #define ARIZONA_FLL3_SPREAD_SPECTRUM 0x1C9 #define ARIZONA_FLL3_GPIO_CLOCK 0x1CA #define ARIZONA_MIC_CHARGE_PUMP_1 0x200 -#define CLEARWATER_CP_MODE 0x20B +#define CLEARWATER_CP_MODE 0x20B #define ARIZONA_LDO1_CONTROL_1 0x210 #define ARIZONA_LDO1_CONTROL_2 0x212 #define ARIZONA_LDO2_CONTROL_1 0x213 @@ -174,18 +174,18 @@ #define ARIZONA_HEADPHONE_DETECT_1 0x29B #define ARIZONA_HEADPHONE_DETECT_2 0x29C #define ARIZONA_HEADPHONE_DETECT_3 0x29D -#define ARIZONA_HP_DACVAL 0x29F +#define ARIZONA_HP_DACVAL 0x29F #define ARIZONA_MICD_CLAMP_CONTROL 0x2A2 #define ARIZONA_MIC_DETECT_1 0x2A3 #define ARIZONA_MIC_DETECT_2 0x2A4 #define ARIZONA_MIC_DETECT_3 0x2A5 -#define ARIZONA_MIC_DETECT_LEVEL_1 0x2A6 -#define ARIZONA_MIC_DETECT_LEVEL_2 0x2A7 -#define ARIZONA_MIC_DETECT_LEVEL_3 0x2A8 -#define ARIZONA_MIC_DETECT_LEVEL_4 0x2A9 +#define ARIZONA_MIC_DETECT_LEVEL_1 0x2A6 +#define ARIZONA_MIC_DETECT_LEVEL_2 0x2A7 +#define ARIZONA_MIC_DETECT_LEVEL_3 0x2A8 +#define ARIZONA_MIC_DETECT_LEVEL_4 0x2A9 #define ARIZONA_MIC_DETECT_4 0x2AB #define ARIZONA_MIC_NOISE_MIX_CONTROL_1 0x2C3 -#define CLEARWATER_MICD_CLAMP_CONTROL 0x2C6 +#define CLEARWATER_MICD_CLAMP_CONTROL 0x2C6 #define ARIZONA_ISOLATION_CONTROL 0x2CB #define ARIZONA_JACK_DETECT_ANALOGUE 0x2D3 #define ARIZONA_INPUT_ENABLES 0x300 @@ -960,40 +960,40 @@ #define ARIZONA_DSP4AUX4MIX_INPUT_1_SOURCE 0xA28 #define ARIZONA_DSP4AUX5MIX_INPUT_1_SOURCE 0xA30 #define ARIZONA_DSP4AUX6MIX_INPUT_1_SOURCE 0xA38 -#define CLEARWATER_DSP5LMIX_INPUT_1_SOURCE 0xA40 -#define CLEARWATER_DSP5LMIX_INPUT_1_VOLUME 0xA41 -#define CLEARWATER_DSP5LMIX_INPUT_2_SOURCE 0xA42 -#define CLEARWATER_DSP5LMIX_INPUT_2_VOLUME 0xA43 -#define CLEARWATER_DSP5LMIX_INPUT_3_SOURCE 0xA44 -#define CLEARWATER_DSP5LMIX_INPUT_3_VOLUME 0xA45 -#define CLEARWATER_DSP5LMIX_INPUT_4_SOURCE 0xA46 -#define CLEARWATER_DSP5LMIX_INPUT_4_VOLUME 0xA47 -#define CLEARWATER_DSP5RMIX_INPUT_1_SOURCE 0xA48 -#define CLEARWATER_DSP5RMIX_INPUT_1_VOLUME 0xA49 -#define CLEARWATER_DSP5RMIX_INPUT_2_SOURCE 0xA4A -#define CLEARWATER_DSP5RMIX_INPUT_2_VOLUME 0xA4B -#define CLEARWATER_DSP5RMIX_INPUT_3_SOURCE 0xA4C -#define CLEARWATER_DSP5RMIX_INPUT_3_VOLUME 0xA4D -#define CLEARWATER_DSP5RMIX_INPUT_4_SOURCE 0xA4E -#define CLEARWATER_DSP5RMIX_INPUT_4_VOLUME 0xA4F -#define CLEARWATER_DSP5AUX1MIX_INPUT_1_SOURCE 0xA50 -#define CLEARWATER_DSP5AUX2MIX_INPUT_1_SOURCE 0xA58 -#define CLEARWATER_DSP5AUX3MIX_INPUT_1_SOURCE 0xA60 -#define CLEARWATER_DSP5AUX4MIX_INPUT_1_SOURCE 0xA68 -#define CLEARWATER_DSP5AUX5MIX_INPUT_1_SOURCE 0xA70 -#define CLEARWATER_DSP5AUX6MIX_INPUT_1_SOURCE 0xA78 +#define CLEARWATER_DSP5LMIX_INPUT_1_SOURCE 0xA40 +#define CLEARWATER_DSP5LMIX_INPUT_1_VOLUME 0xA41 +#define CLEARWATER_DSP5LMIX_INPUT_2_SOURCE 0xA42 +#define CLEARWATER_DSP5LMIX_INPUT_2_VOLUME 0xA43 +#define CLEARWATER_DSP5LMIX_INPUT_3_SOURCE 0xA44 +#define CLEARWATER_DSP5LMIX_INPUT_3_VOLUME 0xA45 +#define CLEARWATER_DSP5LMIX_INPUT_4_SOURCE 0xA46 +#define CLEARWATER_DSP5LMIX_INPUT_4_VOLUME 0xA47 +#define CLEARWATER_DSP5RMIX_INPUT_1_SOURCE 0xA48 +#define CLEARWATER_DSP5RMIX_INPUT_1_VOLUME 0xA49 +#define CLEARWATER_DSP5RMIX_INPUT_2_SOURCE 0xA4A +#define CLEARWATER_DSP5RMIX_INPUT_2_VOLUME 0xA4B +#define CLEARWATER_DSP5RMIX_INPUT_3_SOURCE 0xA4C +#define CLEARWATER_DSP5RMIX_INPUT_3_VOLUME 0xA4D +#define CLEARWATER_DSP5RMIX_INPUT_4_SOURCE 0xA4E +#define CLEARWATER_DSP5RMIX_INPUT_4_VOLUME 0xA4F +#define CLEARWATER_DSP5AUX1MIX_INPUT_1_SOURCE 0xA50 +#define CLEARWATER_DSP5AUX2MIX_INPUT_1_SOURCE 0xA58 +#define CLEARWATER_DSP5AUX3MIX_INPUT_1_SOURCE 0xA60 +#define CLEARWATER_DSP5AUX4MIX_INPUT_1_SOURCE 0xA68 +#define CLEARWATER_DSP5AUX5MIX_INPUT_1_SOURCE 0xA70 +#define CLEARWATER_DSP5AUX6MIX_INPUT_1_SOURCE 0xA78 #define ARIZONA_ASRC1LMIX_INPUT_1_SOURCE 0xA80 #define ARIZONA_ASRC1RMIX_INPUT_1_SOURCE 0xA88 #define ARIZONA_ASRC2LMIX_INPUT_1_SOURCE 0xA90 #define ARIZONA_ASRC2RMIX_INPUT_1_SOURCE 0xA98 -#define CLEARWATER_ASRC1_1LMIX_INPUT_1_SOURCE 0xA80 -#define CLEARWATER_ASRC1_1RMIX_INPUT_1_SOURCE 0xA88 -#define CLEARWATER_ASRC1_2LMIX_INPUT_1_SOURCE 0xA90 -#define CLEARWATER_ASRC1_2RMIX_INPUT_1_SOURCE 0xA98 -#define CLEARWATER_ASRC2_1LMIX_INPUT_1_SOURCE 0xAA0 -#define CLEARWATER_ASRC2_1RMIX_INPUT_1_SOURCE 0xAA8 -#define CLEARWATER_ASRC2_2LMIX_INPUT_1_SOURCE 0xAB0 -#define CLEARWATER_ASRC2_2RMIX_INPUT_1_SOURCE 0xAB8 +#define CLEARWATER_ASRC1_1LMIX_INPUT_1_SOURCE 0xA80 +#define CLEARWATER_ASRC1_1RMIX_INPUT_1_SOURCE 0xA88 +#define CLEARWATER_ASRC1_2LMIX_INPUT_1_SOURCE 0xA90 +#define CLEARWATER_ASRC1_2RMIX_INPUT_1_SOURCE 0xA98 +#define CLEARWATER_ASRC2_1LMIX_INPUT_1_SOURCE 0xAA0 +#define CLEARWATER_ASRC2_1RMIX_INPUT_1_SOURCE 0xAA8 +#define CLEARWATER_ASRC2_2LMIX_INPUT_1_SOURCE 0xAB0 +#define CLEARWATER_ASRC2_2RMIX_INPUT_1_SOURCE 0xAB8 #define ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE 0xB00 #define ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE 0xB08 #define ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE 0xB10 @@ -1028,50 +1028,50 @@ #define ARIZONA_ISRC4DEC2MIX_INPUT_1_SOURCE 0xBC8 #define ARIZONA_ISRC4INT1MIX_INPUT_1_SOURCE 0xBE0 #define ARIZONA_ISRC4INT2MIX_INPUT_1_SOURCE 0xBE8 -#define CLEARWATER_DSP6LMIX_INPUT_1_SOURCE 0xC00 -#define CLEARWATER_DSP6LMIX_INPUT_1_VOLUME 0xC01 -#define CLEARWATER_DSP6LMIX_INPUT_2_SOURCE 0xC02 -#define CLEARWATER_DSP6LMIX_INPUT_2_VOLUME 0xC03 -#define CLEARWATER_DSP6LMIX_INPUT_3_SOURCE 0xC04 -#define CLEARWATER_DSP6LMIX_INPUT_3_VOLUME 0xC05 -#define CLEARWATER_DSP6LMIX_INPUT_4_SOURCE 0xC06 -#define CLEARWATER_DSP6LMIX_INPUT_4_VOLUME 0xC07 -#define CLEARWATER_DSP6RMIX_INPUT_1_SOURCE 0xC08 -#define CLEARWATER_DSP6RMIX_INPUT_1_VOLUME 0xC09 -#define CLEARWATER_DSP6RMIX_INPUT_2_SOURCE 0xC0A -#define CLEARWATER_DSP6RMIX_INPUT_2_VOLUME 0xC0B -#define CLEARWATER_DSP6RMIX_INPUT_3_SOURCE 0xC0C -#define CLEARWATER_DSP6RMIX_INPUT_3_VOLUME 0xC0D -#define CLEARWATER_DSP6RMIX_INPUT_4_SOURCE 0xC0E -#define CLEARWATER_DSP6RMIX_INPUT_4_VOLUME 0xC0F -#define CLEARWATER_DSP6AUX1MIX_INPUT_1_SOURCE 0xC10 -#define CLEARWATER_DSP6AUX2MIX_INPUT_1_SOURCE 0xC18 -#define CLEARWATER_DSP6AUX3MIX_INPUT_1_SOURCE 0xC20 -#define CLEARWATER_DSP6AUX4MIX_INPUT_1_SOURCE 0xC28 -#define CLEARWATER_DSP6AUX5MIX_INPUT_1_SOURCE 0xC30 -#define CLEARWATER_DSP6AUX6MIX_INPUT_1_SOURCE 0xC38 -#define CLEARWATER_DSP7LMIX_INPUT_1_SOURCE 0xC40 -#define CLEARWATER_DSP7LMIX_INPUT_1_VOLUME 0xC41 -#define CLEARWATER_DSP7LMIX_INPUT_2_SOURCE 0xC42 -#define CLEARWATER_DSP7LMIX_INPUT_2_VOLUME 0xC43 -#define CLEARWATER_DSP7LMIX_INPUT_3_SOURCE 0xC44 -#define CLEARWATER_DSP7LMIX_INPUT_3_VOLUME 0xC45 -#define CLEARWATER_DSP7LMIX_INPUT_4_SOURCE 0xC46 -#define CLEARWATER_DSP7LMIX_INPUT_4_VOLUME 0xC47 -#define CLEARWATER_DSP7RMIX_INPUT_1_SOURCE 0xC48 -#define CLEARWATER_DSP7RMIX_INPUT_1_VOLUME 0xC49 -#define CLEARWATER_DSP7RMIX_INPUT_2_SOURCE 0xC4A -#define CLEARWATER_DSP7RMIX_INPUT_2_VOLUME 0xC4B -#define CLEARWATER_DSP7RMIX_INPUT_3_SOURCE 0xC4C -#define CLEARWATER_DSP7RMIX_INPUT_3_VOLUME 0xC4D -#define CLEARWATER_DSP7RMIX_INPUT_4_SOURCE 0xC4E -#define CLEARWATER_DSP7RMIX_INPUT_4_VOLUME 0xC4F -#define CLEARWATER_DSP7AUX1MIX_INPUT_1_SOURCE 0xC50 -#define CLEARWATER_DSP7AUX2MIX_INPUT_1_SOURCE 0xC58 -#define CLEARWATER_DSP7AUX3MIX_INPUT_1_SOURCE 0xC60 -#define CLEARWATER_DSP7AUX4MIX_INPUT_1_SOURCE 0xC68 -#define CLEARWATER_DSP7AUX5MIX_INPUT_1_SOURCE 0xC70 -#define CLEARWATER_DSP7AUX6MIX_INPUT_1_SOURCE 0xC78 +#define CLEARWATER_DSP6LMIX_INPUT_1_SOURCE 0xC00 +#define CLEARWATER_DSP6LMIX_INPUT_1_VOLUME 0xC01 +#define CLEARWATER_DSP6LMIX_INPUT_2_SOURCE 0xC02 +#define CLEARWATER_DSP6LMIX_INPUT_2_VOLUME 0xC03 +#define CLEARWATER_DSP6LMIX_INPUT_3_SOURCE 0xC04 +#define CLEARWATER_DSP6LMIX_INPUT_3_VOLUME 0xC05 +#define CLEARWATER_DSP6LMIX_INPUT_4_SOURCE 0xC06 +#define CLEARWATER_DSP6LMIX_INPUT_4_VOLUME 0xC07 +#define CLEARWATER_DSP6RMIX_INPUT_1_SOURCE 0xC08 +#define CLEARWATER_DSP6RMIX_INPUT_1_VOLUME 0xC09 +#define CLEARWATER_DSP6RMIX_INPUT_2_SOURCE 0xC0A +#define CLEARWATER_DSP6RMIX_INPUT_2_VOLUME 0xC0B +#define CLEARWATER_DSP6RMIX_INPUT_3_SOURCE 0xC0C +#define CLEARWATER_DSP6RMIX_INPUT_3_VOLUME 0xC0D +#define CLEARWATER_DSP6RMIX_INPUT_4_SOURCE 0xC0E +#define CLEARWATER_DSP6RMIX_INPUT_4_VOLUME 0xC0F +#define CLEARWATER_DSP6AUX1MIX_INPUT_1_SOURCE 0xC10 +#define CLEARWATER_DSP6AUX2MIX_INPUT_1_SOURCE 0xC18 +#define CLEARWATER_DSP6AUX3MIX_INPUT_1_SOURCE 0xC20 +#define CLEARWATER_DSP6AUX4MIX_INPUT_1_SOURCE 0xC28 +#define CLEARWATER_DSP6AUX5MIX_INPUT_1_SOURCE 0xC30 +#define CLEARWATER_DSP6AUX6MIX_INPUT_1_SOURCE 0xC38 +#define CLEARWATER_DSP7LMIX_INPUT_1_SOURCE 0xC40 +#define CLEARWATER_DSP7LMIX_INPUT_1_VOLUME 0xC41 +#define CLEARWATER_DSP7LMIX_INPUT_2_SOURCE 0xC42 +#define CLEARWATER_DSP7LMIX_INPUT_2_VOLUME 0xC43 +#define CLEARWATER_DSP7LMIX_INPUT_3_SOURCE 0xC44 +#define CLEARWATER_DSP7LMIX_INPUT_3_VOLUME 0xC45 +#define CLEARWATER_DSP7LMIX_INPUT_4_SOURCE 0xC46 +#define CLEARWATER_DSP7LMIX_INPUT_4_VOLUME 0xC47 +#define CLEARWATER_DSP7RMIX_INPUT_1_SOURCE 0xC48 +#define CLEARWATER_DSP7RMIX_INPUT_1_VOLUME 0xC49 +#define CLEARWATER_DSP7RMIX_INPUT_2_SOURCE 0xC4A +#define CLEARWATER_DSP7RMIX_INPUT_2_VOLUME 0xC4B +#define CLEARWATER_DSP7RMIX_INPUT_3_SOURCE 0xC4C +#define CLEARWATER_DSP7RMIX_INPUT_3_VOLUME 0xC4D +#define CLEARWATER_DSP7RMIX_INPUT_4_SOURCE 0xC4E +#define CLEARWATER_DSP7RMIX_INPUT_4_VOLUME 0xC4F +#define CLEARWATER_DSP7AUX1MIX_INPUT_1_SOURCE 0xC50 +#define CLEARWATER_DSP7AUX2MIX_INPUT_1_SOURCE 0xC58 +#define CLEARWATER_DSP7AUX3MIX_INPUT_1_SOURCE 0xC60 +#define CLEARWATER_DSP7AUX4MIX_INPUT_1_SOURCE 0xC68 +#define CLEARWATER_DSP7AUX5MIX_INPUT_1_SOURCE 0xC70 +#define CLEARWATER_DSP7AUX6MIX_INPUT_1_SOURCE 0xC78 #define ARIZONA_GPIO1_CTRL 0xC00 #define ARIZONA_GPIO2_CTRL 0xC01 #define ARIZONA_GPIO3_CTRL 0xC02 @@ -1080,7 +1080,7 @@ #define ARIZONA_IRQ_CTRL_1 0xC0F #define ARIZONA_GPIO_DEBOUNCE_CONFIG 0xC10 #define ARIZONA_GP_SWITCH_1 0xC18 -#define CLEARWATER_GP_SWITCH_1 0x2C8 +#define CLEARWATER_GP_SWITCH_1 0x2C8 #define ARIZONA_MISC_PAD_CTRL_1 0xC20 #define ARIZONA_MISC_PAD_CTRL_2 0xC21 #define ARIZONA_MISC_PAD_CTRL_3 0xC22 @@ -1238,11 +1238,11 @@ #define ARIZONA_DRC2_CTRL3 0xE8B #define ARIZONA_DRC2_CTRL4 0xE8C #define ARIZONA_DRC2_CTRL5 0xE8D -#define CLEARWATER_DRC2_CTRL1 0xE88 -#define CLEARWATER_DRC2_CTRL2 0xE89 -#define CLEARWATER_DRC2_CTRL3 0xE8A -#define CLEARWATER_DRC2_CTRL4 0xE8B -#define CLEARWATER_DRC2_CTRL5 0xE8C +#define CLEARWATER_DRC2_CTRL1 0xE88 +#define CLEARWATER_DRC2_CTRL2 0xE89 +#define CLEARWATER_DRC2_CTRL3 0xE8A +#define CLEARWATER_DRC2_CTRL4 0xE8B +#define CLEARWATER_DRC2_CTRL5 0xE8C #define ARIZONA_HPLPF1_1 0xEC0 #define ARIZONA_HPLPF1_2 0xEC1 #define ARIZONA_HPLPF2_1 0xEC4 @@ -1251,14 +1251,14 @@ #define ARIZONA_HPLPF3_2 0xEC9 #define ARIZONA_HPLPF4_1 0xECC #define ARIZONA_HPLPF4_2 0xECD -#define CLEARWATER_ASRC2_ENABLE 0xED0 -#define CLEARWATER_ASRC2_STATUS 0xED1 -#define CLEARWATER_ASRC2_RATE1 0xED2 -#define CLEARWATER_ASRC2_RATE2 0xED3 -#define CLEARWATER_ASRC1_ENABLE 0xEE0 -#define CLEARWATER_ASRC1_STATUS 0xEE1 -#define CLEARWATER_ASRC1_RATE1 0xEE2 -#define CLEARWATER_ASRC1_RATE2 0xEE3 +#define CLEARWATER_ASRC2_ENABLE 0xED0 +#define CLEARWATER_ASRC2_STATUS 0xED1 +#define CLEARWATER_ASRC2_RATE1 0xED2 +#define CLEARWATER_ASRC2_RATE2 0xED3 +#define CLEARWATER_ASRC1_ENABLE 0xEE0 +#define CLEARWATER_ASRC1_STATUS 0xEE1 +#define CLEARWATER_ASRC1_RATE1 0xEE2 +#define CLEARWATER_ASRC1_RATE2 0xEE3 #define ARIZONA_ASRC_ENABLE 0xEE0 #define ARIZONA_ASRC_STATUS 0xEE1 #define ARIZONA_ASRC_RATE1 0xEE2 @@ -1285,13 +1285,13 @@ #define ARIZONA_FCL_COEFF_START 0xF18 #define ARIZONA_FCL_COEFF_END 0xF69 #define ARIZONA_FCR_FILTER_CONTROL 0xF70 -#define CLEARWATER_FCR_FILTER_CONTROL 0xF71 +#define CLEARWATER_FCR_FILTER_CONTROL 0xF71 #define ARIZONA_FCR_ADC_REFORMATTER_CONTROL 0xF72 -#define CLEARWATER_FCR_ADC_REFORMATTER_CONTROL 0xF73 +#define CLEARWATER_FCR_ADC_REFORMATTER_CONTROL 0xF73 #define ARIZONA_FCR_COEFF_START 0xF73 #define ARIZONA_FCR_COEFF_END 0xFC4 -#define CLEARWATER_FCR_COEFF_START 0xF74 -#define CLEARWATER_FCR_COEFF_END 0xFC5 +#define CLEARWATER_FCR_COEFF_START 0xF74 +#define CLEARWATER_FCR_COEFF_END 0xFC5 #define ARIZONA_DSP1_CONTROL_1 0x1100 #define ARIZONA_DSP1_CLOCKING_1 0x1101 #define ARIZONA_DSP1_STATUS_1 0x1104 @@ -1353,9 +1353,9 @@ #define ARIZONA_DSP2_SCRATCH_2 0x1242 #define ARIZONA_DSP2_SCRATCH_3 0x1243 #define ARIZONA_DSP3_CONTROL_1 0x1300 -#define CLEARWATER_DAC_COMP_1 0x1300 +#define CLEARWATER_DAC_COMP_1 0x1300 #define ARIZONA_DSP3_CLOCKING_1 0x1301 -#define CLEARWATER_DAC_COMP_2 0x1302 +#define CLEARWATER_DAC_COMP_2 0x1302 #define ARIZONA_DSP3_STATUS_1 0x1304 #define ARIZONA_DSP3_STATUS_2 0x1305 #define ARIZONA_DSP3_STATUS_3 0x1306 @@ -1384,54 +1384,54 @@ #define ARIZONA_DSP3_SCRATCH_1 0x1341 #define ARIZONA_DSP3_SCRATCH_2 0x1342 #define ARIZONA_DSP3_SCRATCH_3 0x1343 -#define CLEARWATER_FRF_COEFFICIENT_1L_1 0x1380 -#define CLEARWATER_FRF_COEFFICIENT_1L_2 0x1381 -#define CLEARWATER_FRF_COEFFICIENT_1L_3 0x1382 -#define CLEARWATER_FRF_COEFFICIENT_1L_4 0x1383 -#define CLEARWATER_FRF_COEFFICIENT_1R_1 0x1390 -#define CLEARWATER_FRF_COEFFICIENT_1R_2 0x1391 -#define CLEARWATER_FRF_COEFFICIENT_1R_3 0x1392 -#define CLEARWATER_FRF_COEFFICIENT_1R_4 0x1393 -#define CLEARWATER_FRF_COEFFICIENT_2L_1 0x13A0 -#define CLEARWATER_FRF_COEFFICIENT_2L_2 0x13A1 -#define CLEARWATER_FRF_COEFFICIENT_2L_3 0x13A2 -#define CLEARWATER_FRF_COEFFICIENT_2L_4 0x13A3 -#define CLEARWATER_FRF_COEFFICIENT_2R_1 0x13B0 -#define CLEARWATER_FRF_COEFFICIENT_2R_2 0x13B1 -#define CLEARWATER_FRF_COEFFICIENT_2R_3 0x13B2 -#define CLEARWATER_FRF_COEFFICIENT_2R_4 0x13B3 -#define CLEARWATER_FRF_COEFFICIENT_3L_1 0x13C0 -#define CLEARWATER_FRF_COEFFICIENT_3L_2 0x13C1 -#define CLEARWATER_FRF_COEFFICIENT_3L_3 0x13C2 -#define CLEARWATER_FRF_COEFFICIENT_3L_4 0x13C3 -#define CLEARWATER_FRF_COEFFICIENT_3R_1 0x13D0 -#define CLEARWATER_FRF_COEFFICIENT_3R_2 0x13D1 -#define CLEARWATER_FRF_COEFFICIENT_3R_3 0x13D2 -#define CLEARWATER_FRF_COEFFICIENT_3R_4 0x13D3 -#define CLEARWATER_FRF_COEFFICIENT_4L_1 0x13E0 -#define CLEARWATER_FRF_COEFFICIENT_4L_2 0x13E1 -#define CLEARWATER_FRF_COEFFICIENT_4L_3 0x13E2 -#define CLEARWATER_FRF_COEFFICIENT_4L_4 0x13E3 -#define CLEARWATER_FRF_COEFFICIENT_4R_1 0x13F0 -#define CLEARWATER_FRF_COEFFICIENT_4R_2 0x13F1 -#define CLEARWATER_FRF_COEFFICIENT_4R_3 0x13F2 -#define CLEARWATER_FRF_COEFFICIENT_4R_4 0x13F3 -#define CLEARWATER_FRF_COEFFICIENT_5L_1 0x1400 -#define CLEARWATER_FRF_COEFFICIENT_5L_2 0x1401 -#define CLEARWATER_FRF_COEFFICIENT_5L_3 0x1402 -#define CLEARWATER_FRF_COEFFICIENT_5L_4 0x1403 -#define CLEARWATER_FRF_COEFFICIENT_5R_1 0x1410 -#define CLEARWATER_FRF_COEFFICIENT_5R_2 0x1411 -#define CLEARWATER_FRF_COEFFICIENT_5R_3 0x1412 -#define CLEARWATER_FRF_COEFFICIENT_5R_4 0x1413 -#define CLEARWATER_FRF_COEFFICIENT_6L_1 0x1420 -#define CLEARWATER_FRF_COEFFICIENT_6L_2 0x1421 -#define CLEARWATER_FRF_COEFFICIENT_6L_3 0x1422 -#define CLEARWATER_FRF_COEFFICIENT_6L_4 0x1423 -#define CLEARWATER_FRF_COEFFICIENT_6R_1 0x1430 -#define CLEARWATER_FRF_COEFFICIENT_6R_2 0x1431 -#define CLEARWATER_FRF_COEFFICIENT_6R_3 0x1432 -#define CLEARWATER_FRF_COEFFICIENT_6R_4 0x1433 +#define CLEARWATER_FRF_COEFFICIENT_1L_1 0x1380 +#define CLEARWATER_FRF_COEFFICIENT_1L_2 0x1381 +#define CLEARWATER_FRF_COEFFICIENT_1L_3 0x1382 +#define CLEARWATER_FRF_COEFFICIENT_1L_4 0x1383 +#define CLEARWATER_FRF_COEFFICIENT_1R_1 0x1390 +#define CLEARWATER_FRF_COEFFICIENT_1R_2 0x1391 +#define CLEARWATER_FRF_COEFFICIENT_1R_3 0x1392 +#define CLEARWATER_FRF_COEFFICIENT_1R_4 0x1393 +#define CLEARWATER_FRF_COEFFICIENT_2L_1 0x13A0 +#define CLEARWATER_FRF_COEFFICIENT_2L_2 0x13A1 +#define CLEARWATER_FRF_COEFFICIENT_2L_3 0x13A2 +#define CLEARWATER_FRF_COEFFICIENT_2L_4 0x13A3 +#define CLEARWATER_FRF_COEFFICIENT_2R_1 0x13B0 +#define CLEARWATER_FRF_COEFFICIENT_2R_2 0x13B1 +#define CLEARWATER_FRF_COEFFICIENT_2R_3 0x13B2 +#define CLEARWATER_FRF_COEFFICIENT_2R_4 0x13B3 +#define CLEARWATER_FRF_COEFFICIENT_3L_1 0x13C0 +#define CLEARWATER_FRF_COEFFICIENT_3L_2 0x13C1 +#define CLEARWATER_FRF_COEFFICIENT_3L_3 0x13C2 +#define CLEARWATER_FRF_COEFFICIENT_3L_4 0x13C3 +#define CLEARWATER_FRF_COEFFICIENT_3R_1 0x13D0 +#define CLEARWATER_FRF_COEFFICIENT_3R_2 0x13D1 +#define CLEARWATER_FRF_COEFFICIENT_3R_3 0x13D2 +#define CLEARWATER_FRF_COEFFICIENT_3R_4 0x13D3 +#define CLEARWATER_FRF_COEFFICIENT_4L_1 0x13E0 +#define CLEARWATER_FRF_COEFFICIENT_4L_2 0x13E1 +#define CLEARWATER_FRF_COEFFICIENT_4L_3 0x13E2 +#define CLEARWATER_FRF_COEFFICIENT_4L_4 0x13E3 +#define CLEARWATER_FRF_COEFFICIENT_4R_1 0x13F0 +#define CLEARWATER_FRF_COEFFICIENT_4R_2 0x13F1 +#define CLEARWATER_FRF_COEFFICIENT_4R_3 0x13F2 +#define CLEARWATER_FRF_COEFFICIENT_4R_4 0x13F3 +#define CLEARWATER_FRF_COEFFICIENT_5L_1 0x1400 +#define CLEARWATER_FRF_COEFFICIENT_5L_2 0x1401 +#define CLEARWATER_FRF_COEFFICIENT_5L_3 0x1402 +#define CLEARWATER_FRF_COEFFICIENT_5L_4 0x1403 +#define CLEARWATER_FRF_COEFFICIENT_5R_1 0x1410 +#define CLEARWATER_FRF_COEFFICIENT_5R_2 0x1411 +#define CLEARWATER_FRF_COEFFICIENT_5R_3 0x1412 +#define CLEARWATER_FRF_COEFFICIENT_5R_4 0x1413 +#define CLEARWATER_FRF_COEFFICIENT_6L_1 0x1420 +#define CLEARWATER_FRF_COEFFICIENT_6L_2 0x1421 +#define CLEARWATER_FRF_COEFFICIENT_6L_3 0x1422 +#define CLEARWATER_FRF_COEFFICIENT_6L_4 0x1423 +#define CLEARWATER_FRF_COEFFICIENT_6R_1 0x1430 +#define CLEARWATER_FRF_COEFFICIENT_6R_2 0x1431 +#define CLEARWATER_FRF_COEFFICIENT_6R_3 0x1432 +#define CLEARWATER_FRF_COEFFICIENT_6R_4 0x1433 #define MARLEY_FRF_COEFFICIENT_4L_1 0x13A0 #define MARLEY_FRF_COEFFICIENT_4L_2 0x13A1 #define MARLEY_FRF_COEFFICIENT_4L_3 0x13A2 @@ -1480,822 +1480,822 @@ #define ARIZONA_FRF_COEFF_4 0x1703 #define ARIZONA_V2_DAC_COMP_1 0x1704 #define ARIZONA_V2_DAC_COMP_2 0x1705 -#define CLEARWATER_ADSP2_IRQ0 0x1600 -#define CLEARWATER_ADSP2_IRQ1 0x1601 -#define CLEARWATER_ADSP2_IRQ2 0x1602 -#define CLEARWATER_ADSP2_IRQ3 0x1603 -#define CLEARWATER_ADSP2_IRQ4 0x1604 -#define CLEARWATER_ADSP2_IRQ5 0x1605 -#define CLEARWATER_ADSP2_IRQ6 0x1606 -#define CLEARWATER_ADSP2_IRQ7 0x1607 -#define CLEARWATER_GPIO1_CTRL_1 0x1700 -#define CLEARWATER_GPIO1_CTRL_2 0x1701 -#define CLEARWATER_GPIO2_CTRL_1 0x1702 -#define CLEARWATER_GPIO2_CTRL_2 0x1703 -#define CLEARWATER_GPIO3_CTRL_1 0x1704 -#define CLEARWATER_GPIO3_CTRL_2 0x1705 -#define CLEARWATER_GPIO4_CTRL_1 0x1706 -#define CLEARWATER_GPIO4_CTRL_2 0x1707 -#define CLEARWATER_GPIO5_CTRL_1 0x1708 -#define CLEARWATER_GPIO5_CTRL_2 0x1709 -#define CLEARWATER_GPIO6_CTRL_1 0x170A -#define CLEARWATER_GPIO6_CTRL_2 0x170B -#define CLEARWATER_GPIO7_CTRL_1 0x170C -#define CLEARWATER_GPIO7_CTRL_2 0x170D -#define CLEARWATER_GPIO8_CTRL_1 0x170E -#define CLEARWATER_GPIO8_CTRL_2 0x170F -#define CLEARWATER_GPIO9_CTRL_1 0x1710 -#define CLEARWATER_GPIO9_CTRL_2 0x1711 -#define CLEARWATER_GPIO10_CTRL_1 0x1712 -#define CLEARWATER_GPIO10_CTRL_2 0x1713 -#define CLEARWATER_GPIO11_CTRL_1 0x1714 -#define CLEARWATER_GPIO11_CTRL_2 0x1715 -#define CLEARWATER_GPIO12_CTRL_1 0x1716 -#define CLEARWATER_GPIO12_CTRL_2 0x1717 -#define CLEARWATER_GPIO13_CTRL_1 0x1718 -#define CLEARWATER_GPIO13_CTRL_2 0x1719 -#define CLEARWATER_GPIO14_CTRL_1 0x171A -#define CLEARWATER_GPIO14_CTRL_2 0x171B -#define CLEARWATER_GPIO15_CTRL_1 0x171C -#define CLEARWATER_GPIO15_CTRL_2 0x171D -#define CLEARWATER_GPIO16_CTRL_1 0x171E -#define CLEARWATER_GPIO16_CTRL_2 0x171F -#define CLEARWATER_GPIO17_CTRL_1 0x1720 -#define CLEARWATER_GPIO17_CTRL_2 0x1721 -#define CLEARWATER_GPIO18_CTRL_1 0x1722 -#define CLEARWATER_GPIO18_CTRL_2 0x1723 -#define CLEARWATER_GPIO19_CTRL_1 0x1724 -#define CLEARWATER_GPIO19_CTRL_2 0x1725 -#define CLEARWATER_GPIO20_CTRL_1 0x1726 -#define CLEARWATER_GPIO20_CTRL_2 0x1727 -#define CLEARWATER_GPIO21_CTRL_1 0x1728 -#define CLEARWATER_GPIO21_CTRL_2 0x1729 -#define CLEARWATER_GPIO22_CTRL_1 0x172A -#define CLEARWATER_GPIO22_CTRL_2 0x172B -#define CLEARWATER_GPIO23_CTRL_1 0x172C -#define CLEARWATER_GPIO23_CTRL_2 0x172D -#define CLEARWATER_GPIO24_CTRL_1 0x172E -#define CLEARWATER_GPIO24_CTRL_2 0x172F -#define CLEARWATER_GPIO25_CTRL_1 0x1730 -#define CLEARWATER_GPIO25_CTRL_2 0x1731 -#define CLEARWATER_GPIO26_CTRL_1 0x1732 -#define CLEARWATER_GPIO26_CTRL_2 0x1733 -#define CLEARWATER_GPIO27_CTRL_1 0x1734 -#define CLEARWATER_GPIO27_CTRL_2 0x1735 -#define CLEARWATER_GPIO28_CTRL_1 0x1736 -#define CLEARWATER_GPIO28_CTRL_2 0x1737 -#define CLEARWATER_GPIO29_CTRL_1 0x1738 -#define CLEARWATER_GPIO29_CTRL_2 0x1739 -#define CLEARWATER_GPIO30_CTRL_1 0x173A -#define CLEARWATER_GPIO30_CTRL_2 0x173B -#define CLEARWATER_GPIO31_CTRL_1 0x173C -#define CLEARWATER_GPIO31_CTRL_2 0x173D -#define CLEARWATER_GPIO32_CTRL_1 0x173E -#define CLEARWATER_GPIO32_CTRL_2 0x173F -#define CLEARWATER_GPIO33_CTRL_1 0x1740 -#define CLEARWATER_GPIO33_CTRL_2 0x1741 -#define CLEARWATER_GPIO34_CTRL_1 0x1742 -#define CLEARWATER_GPIO34_CTRL_2 0x1743 -#define CLEARWATER_GPIO35_CTRL_1 0x1744 -#define CLEARWATER_GPIO35_CTRL_2 0x1745 -#define CLEARWATER_GPIO36_CTRL_1 0x1746 -#define CLEARWATER_GPIO36_CTRL_2 0x1747 -#define CLEARWATER_GPIO37_CTRL_1 0x1748 -#define CLEARWATER_GPIO37_CTRL_2 0x1749 -#define CLEARWATER_GPIO38_CTRL_1 0x174A -#define CLEARWATER_GPIO38_CTRL_2 0x174B -#define CLEARWATER_GPIO39_CTRL_1 0x174C -#define CLEARWATER_GPIO39_CTRL_2 0x174D -#define CLEARWATER_GPIO40_CTRL_1 0x174E -#define CLEARWATER_GPIO40_CTRL_2 0x174F -#define CLEARWATER_IRQ1_STATUS_1 0x1800 -#define CLEARWATER_IRQ1_STATUS_2 0x1801 -#define CLEARWATER_IRQ1_STATUS_6 0x1805 -#define CLEARWATER_IRQ1_STATUS_7 0x1806 -#define CLEARWATER_IRQ1_STATUS_9 0x1808 -#define CLEARWATER_IRQ1_STATUS_11 0x180A -#define CLEARWATER_IRQ1_STATUS_12 0x180B -#define CLEARWATER_IRQ1_STATUS_13 0x180C -#define CLEARWATER_IRQ1_STATUS_14 0x180D -#define CLEARWATER_IRQ1_STATUS_15 0x180E -#define CLEARWATER_IRQ1_STATUS_17 0x1810 -#define CLEARWATER_IRQ1_STATUS_18 0x1811 -#define CLEARWATER_IRQ1_STATUS_19 0x1812 -#define CLEARWATER_IRQ1_STATUS_21 0x1814 -#define CLEARWATER_IRQ1_STATUS_22 0x1815 -#define CLEARWATER_IRQ1_STATUS_23 0x1816 -#define CLEARWATER_IRQ1_STATUS_24 0x1817 -#define CLEARWATER_IRQ1_STATUS_25 0x1818 -#define CLEARWATER_IRQ1_STATUS_27 0x181A -#define CLEARWATER_IRQ1_STATUS_28 0x181B -#define CLEARWATER_IRQ1_STATUS_30 0x181D -#define CLEARWATER_IRQ1_STATUS_31 0x181E -#define CLEARWATER_IRQ1_STATUS_32 0x181F -#define CLEARWATER_IRQ1_MASK_1 0x1840 -#define CLEARWATER_IRQ1_MASK_2 0x1841 -#define CLEARWATER_IRQ1_MASK_3 0x1842 -#define CLEARWATER_IRQ1_MASK_4 0x1843 -#define CLEARWATER_IRQ1_MASK_5 0x1844 -#define CLEARWATER_IRQ1_MASK_6 0x1845 -#define CLEARWATER_IRQ1_MASK_7 0x1846 -#define CLEARWATER_IRQ1_MASK_8 0x1847 -#define CLEARWATER_IRQ1_MASK_9 0x1848 -#define CLEARWATER_IRQ1_MASK_10 0x1849 -#define CLEARWATER_IRQ1_MASK_11 0x184A -#define CLEARWATER_IRQ1_MASK_12 0x184B -#define CLEARWATER_IRQ1_MASK_13 0x184C -#define CLEARWATER_IRQ1_MASK_14 0x184D -#define CLEARWATER_IRQ1_MASK_15 0x184E -#define CLEARWATER_IRQ1_MASK_17 0x1850 -#define CLEARWATER_IRQ1_MASK_18 0x1851 -#define CLEARWATER_IRQ1_MASK_19 0x1852 -#define CLEARWATER_IRQ1_MASK_21 0x1854 -#define CLEARWATER_IRQ1_MASK_22 0x1855 -#define CLEARWATER_IRQ1_MASK_23 0x1856 -#define CLEARWATER_IRQ1_MASK_24 0x1857 -#define CLEARWATER_IRQ1_MASK_25 0x1858 -#define CLEARWATER_IRQ1_MASK_27 0x185A -#define CLEARWATER_IRQ1_MASK_28 0x185B -#define CLEARWATER_IRQ1_MASK_30 0x185D -#define CLEARWATER_IRQ1_MASK_31 0x185E -#define CLEARWATER_IRQ1_MASK_32 0x185F -#define CLEARWATER_IRQ1_RAW_STATUS_1 0x1880 -#define CLEARWATER_IRQ1_RAW_STATUS_2 0x1881 -#define CLEARWATER_IRQ1_RAW_STATUS_6 0x1885 -#define CLEARWATER_IRQ1_RAW_STATUS_7 0x1886 -#define CLEARWATER_IRQ1_RAW_STATUS_9 0x1888 -#define CLEARWATER_IRQ1_RAW_STATUS_10 0x1889 -#define CLEARWATER_IRQ1_RAW_STATUS_11 0x188A -#define CLEARWATER_IRQ1_RAW_STATUS_12 0x188B -#define CLEARWATER_IRQ1_RAW_STATUS_13 0x188C -#define CLEARWATER_IRQ1_RAW_STATUS_14 0x188D -#define CLEARWATER_IRQ1_RAW_STATUS_15 0x188E -#define CLEARWATER_IRQ1_RAW_STATUS_17 0x1890 -#define CLEARWATER_IRQ1_RAW_STATUS_18 0x1891 -#define CLEARWATER_IRQ1_RAW_STATUS_19 0x1892 -#define CLEARWATER_IRQ1_RAW_STATUS_21 0x1894 -#define CLEARWATER_IRQ1_RAW_STATUS_22 0x1895 -#define CLEARWATER_IRQ1_RAW_STATUS_23 0x1896 -#define CLEARWATER_IRQ1_RAW_STATUS_24 0x1897 -#define CLEARWATER_IRQ1_RAW_STATUS_25 0x1898 -#define CLEARWATER_IRQ1_RAW_STATUS_30 0x189D -#define CLEARWATER_IRQ1_RAW_STATUS_31 0x189E -#define CLEARWATER_IRQ1_RAW_STATUS_32 0x189F -#define CLEARWATER_IRQ2_STATUS_1 0x1900 -#define CLEARWATER_IRQ2_STATUS_2 0x1901 -#define CLEARWATER_IRQ2_STATUS_6 0x1905 -#define CLEARWATER_IRQ2_STATUS_7 0x1906 -#define CLEARWATER_IRQ2_STATUS_9 0x1908 -#define CLEARWATER_IRQ2_STATUS_11 0x190A -#define CLEARWATER_IRQ2_STATUS_12 0x190B -#define CLEARWATER_IRQ2_STATUS_13 0x190C -#define CLEARWATER_IRQ2_STATUS_14 0x190D -#define CLEARWATER_IRQ2_STATUS_15 0x190E -#define CLEARWATER_IRQ2_STATUS_17 0x1910 -#define CLEARWATER_IRQ2_STATUS_18 0x1911 -#define CLEARWATER_IRQ2_STATUS_19 0x1912 -#define CLEARWATER_IRQ2_STATUS_21 0x1914 -#define CLEARWATER_IRQ2_STATUS_22 0x1915 -#define CLEARWATER_IRQ2_STATUS_23 0x1916 -#define CLEARWATER_IRQ2_STATUS_24 0x1917 -#define CLEARWATER_IRQ2_STATUS_25 0x1918 -#define CLEARWATER_IRQ2_STATUS_27 0x191A -#define CLEARWATER_IRQ2_STATUS_28 0x191B -#define CLEARWATER_IRQ2_STATUS_30 0x191D -#define CLEARWATER_IRQ2_STATUS_31 0x191E -#define CLEARWATER_IRQ2_STATUS_32 0x191F -#define CLEARWATER_IRQ2_MASK_1 0x1940 -#define CLEARWATER_IRQ2_MASK_2 0x1941 -#define CLEARWATER_IRQ2_MASK_6 0x1945 -#define CLEARWATER_IRQ2_MASK_7 0x1946 -#define CLEARWATER_IRQ2_MASK_9 0x1948 -#define CLEARWATER_IRQ2_MASK_11 0x194A -#define CLEARWATER_IRQ2_MASK_12 0x194B -#define CLEARWATER_IRQ2_MASK_13 0x194C -#define CLEARWATER_IRQ2_MASK_14 0x194D -#define CLEARWATER_IRQ2_MASK_15 0x194E -#define CLEARWATER_IRQ2_MASK_17 0x1950 -#define CLEARWATER_IRQ2_MASK_18 0x1951 -#define CLEARWATER_IRQ2_MASK_19 0x1952 -#define CLEARWATER_IRQ2_MASK_21 0x1954 -#define CLEARWATER_IRQ2_MASK_22 0x1955 -#define CLEARWATER_IRQ2_MASK_23 0x1956 -#define CLEARWATER_IRQ2_MASK_24 0x1957 -#define CLEARWATER_IRQ2_MASK_25 0x1958 -#define CLEARWATER_IRQ2_MASK_27 0x195A -#define CLEARWATER_IRQ2_MASK_28 0x195B -#define CLEARWATER_IRQ2_MASK_30 0x195D -#define CLEARWATER_IRQ2_MASK_31 0x195E -#define CLEARWATER_IRQ2_MASK_32 0x195F -#define CLEARWATER_IRQ2_RAW_STATUS_1 0x1980 -#define CLEARWATER_IRQ2_RAW_STATUS_2 0x1981 -#define CLEARWATER_IRQ2_RAW_STATUS_6 0x1985 -#define CLEARWATER_IRQ2_RAW_STATUS_7 0x1986 -#define CLEARWATER_IRQ2_RAW_STATUS_9 0x1988 -#define CLEARWATER_IRQ2_RAW_STATUS_10 0x1989 -#define CLEARWATER_IRQ2_RAW_STATUS_11 0x198A -#define CLEARWATER_IRQ2_RAW_STATUS_12 0x198B -#define CLEARWATER_IRQ2_RAW_STATUS_13 0x198C -#define CLEARWATER_IRQ2_RAW_STATUS_14 0x198D -#define CLEARWATER_IRQ2_RAW_STATUS_15 0x198E -#define CLEARWATER_IRQ2_RAW_STATUS_17 0x1990 -#define CLEARWATER_IRQ2_RAW_STATUS_18 0x1991 -#define CLEARWATER_IRQ2_RAW_STATUS_19 0x1992 -#define CLEARWATER_IRQ2_RAW_STATUS_21 0x1994 -#define CLEARWATER_IRQ2_RAW_STATUS_22 0x1995 -#define CLEARWATER_IRQ2_RAW_STATUS_23 0x1996 -#define CLEARWATER_IRQ2_RAW_STATUS_24 0x1997 -#define CLEARWATER_IRQ2_RAW_STATUS_25 0x1998 -#define CLEARWATER_IRQ2_RAW_STATUS_30 0x199D -#define CLEARWATER_IRQ2_RAW_STATUS_31 0x199E -#define CLEARWATER_IRQ2_RAW_STATUS_32 0x199F -#define CLEARWATER_INTERRUPT_DEBOUNCE_7 0x1A06 -#define CLEARWATER_INTERRUPT_DEBOUNCE_15 0x1A0E -#define CLEARWATER_IRQ1_CTRL 0x1A80 -#define CLEARWATER_IRQ2_CTRL 0x1A82 -#define CLEARWATER_INTERRUPT_RAW_STATUS_1 0x1AA0 -#define ARIZONA_WSEQ_SEQUENCE_1 0x3000 -#define ARIZONA_WSEQ_SEQUENCE_2 0x3002 -#define ARIZONA_WSEQ_SEQUENCE_3 0x3004 -#define ARIZONA_WSEQ_SEQUENCE_4 0x3006 -#define ARIZONA_WSEQ_SEQUENCE_5 0x3008 -#define ARIZONA_WSEQ_SEQUENCE_6 0x300A -#define ARIZONA_WSEQ_SEQUENCE_7 0x300C -#define ARIZONA_WSEQ_SEQUENCE_8 0x300E -#define ARIZONA_WSEQ_SEQUENCE_9 0x3010 -#define ARIZONA_WSEQ_SEQUENCE_10 0x3012 -#define ARIZONA_WSEQ_SEQUENCE_11 0x3014 -#define ARIZONA_WSEQ_SEQUENCE_12 0x3016 -#define ARIZONA_WSEQ_SEQUENCE_13 0x3018 -#define ARIZONA_WSEQ_SEQUENCE_14 0x301A -#define ARIZONA_WSEQ_SEQUENCE_15 0x301C -#define ARIZONA_WSEQ_SEQUENCE_16 0x301E -#define ARIZONA_WSEQ_SEQUENCE_17 0x3020 -#define ARIZONA_WSEQ_SEQUENCE_18 0x3022 -#define ARIZONA_WSEQ_SEQUENCE_19 0x3024 -#define ARIZONA_WSEQ_SEQUENCE_20 0x3026 -#define ARIZONA_WSEQ_SEQUENCE_21 0x3028 -#define ARIZONA_WSEQ_SEQUENCE_22 0x302A -#define ARIZONA_WSEQ_SEQUENCE_23 0x302C -#define ARIZONA_WSEQ_SEQUENCE_24 0x302E -#define ARIZONA_WSEQ_SEQUENCE_25 0x3030 -#define ARIZONA_WSEQ_SEQUENCE_26 0x3032 -#define ARIZONA_WSEQ_SEQUENCE_27 0x3034 -#define ARIZONA_WSEQ_SEQUENCE_28 0x3036 -#define ARIZONA_WSEQ_SEQUENCE_29 0x3038 -#define ARIZONA_WSEQ_SEQUENCE_30 0x303A -#define ARIZONA_WSEQ_SEQUENCE_31 0x303C -#define ARIZONA_WSEQ_SEQUENCE_32 0x303E -#define ARIZONA_WSEQ_SEQUENCE_33 0x3040 -#define ARIZONA_WSEQ_SEQUENCE_34 0x3042 -#define ARIZONA_WSEQ_SEQUENCE_35 0x3044 -#define ARIZONA_WSEQ_SEQUENCE_36 0x3046 -#define ARIZONA_WSEQ_SEQUENCE_37 0x3048 -#define ARIZONA_WSEQ_SEQUENCE_38 0x304A -#define ARIZONA_WSEQ_SEQUENCE_39 0x304C -#define ARIZONA_WSEQ_SEQUENCE_40 0x304E -#define ARIZONA_WSEQ_SEQUENCE_41 0x3050 -#define ARIZONA_WSEQ_SEQUENCE_42 0x3052 -#define ARIZONA_WSEQ_SEQUENCE_43 0x3054 -#define ARIZONA_WSEQ_SEQUENCE_44 0x3056 -#define ARIZONA_WSEQ_SEQUENCE_45 0x3058 -#define ARIZONA_WSEQ_SEQUENCE_46 0x305A -#define ARIZONA_WSEQ_SEQUENCE_47 0x305C -#define ARIZONA_WSEQ_SEQUENCE_48 0x305E -#define ARIZONA_WSEQ_SEQUENCE_49 0x3060 -#define ARIZONA_WSEQ_SEQUENCE_50 0x3062 -#define ARIZONA_WSEQ_SEQUENCE_51 0x3064 -#define ARIZONA_WSEQ_SEQUENCE_52 0x3066 -#define ARIZONA_WSEQ_SEQUENCE_53 0x3068 -#define ARIZONA_WSEQ_SEQUENCE_54 0x306A -#define ARIZONA_WSEQ_SEQUENCE_55 0x306C -#define ARIZONA_WSEQ_SEQUENCE_56 0x306E -#define ARIZONA_WSEQ_SEQUENCE_57 0x3070 -#define ARIZONA_WSEQ_SEQUENCE_58 0x3072 -#define ARIZONA_WSEQ_SEQUENCE_59 0x3074 -#define ARIZONA_WSEQ_SEQUENCE_60 0x3076 -#define ARIZONA_WSEQ_SEQUENCE_61 0x3078 -#define ARIZONA_WSEQ_SEQUENCE_62 0x307A -#define ARIZONA_WSEQ_SEQUENCE_63 0x307C -#define ARIZONA_WSEQ_SEQUENCE_64 0x307E -#define ARIZONA_WSEQ_SEQUENCE_65 0x3080 -#define ARIZONA_WSEQ_SEQUENCE_66 0x3082 -#define ARIZONA_WSEQ_SEQUENCE_67 0x3084 -#define ARIZONA_WSEQ_SEQUENCE_68 0x3086 -#define ARIZONA_WSEQ_SEQUENCE_69 0x3088 -#define ARIZONA_WSEQ_SEQUENCE_70 0x308A -#define ARIZONA_WSEQ_SEQUENCE_71 0x308C -#define ARIZONA_WSEQ_SEQUENCE_72 0x308E -#define ARIZONA_WSEQ_SEQUENCE_73 0x3090 -#define ARIZONA_WSEQ_SEQUENCE_74 0x3092 -#define ARIZONA_WSEQ_SEQUENCE_75 0x3094 -#define ARIZONA_WSEQ_SEQUENCE_76 0x3096 -#define ARIZONA_WSEQ_SEQUENCE_77 0x3098 -#define ARIZONA_WSEQ_SEQUENCE_78 0x309A -#define ARIZONA_WSEQ_SEQUENCE_79 0x309C -#define ARIZONA_WSEQ_SEQUENCE_80 0x309E -#define ARIZONA_WSEQ_SEQUENCE_81 0x30A0 -#define ARIZONA_WSEQ_SEQUENCE_82 0x30A2 -#define ARIZONA_WSEQ_SEQUENCE_83 0x30A4 -#define ARIZONA_WSEQ_SEQUENCE_84 0x30A6 -#define ARIZONA_WSEQ_SEQUENCE_85 0x30A8 -#define ARIZONA_WSEQ_SEQUENCE_86 0x30AA -#define ARIZONA_WSEQ_SEQUENCE_87 0x30AC -#define ARIZONA_WSEQ_SEQUENCE_88 0x30AE -#define ARIZONA_WSEQ_SEQUENCE_89 0x30B0 -#define ARIZONA_WSEQ_SEQUENCE_90 0x30B2 -#define ARIZONA_WSEQ_SEQUENCE_91 0x30B4 -#define ARIZONA_WSEQ_SEQUENCE_92 0x30B6 -#define ARIZONA_WSEQ_SEQUENCE_93 0x30B8 -#define ARIZONA_WSEQ_SEQUENCE_94 0x30BA -#define ARIZONA_WSEQ_SEQUENCE_95 0x30BC -#define ARIZONA_WSEQ_SEQUENCE_96 0x30BE -#define ARIZONA_WSEQ_SEQUENCE_97 0x30C0 -#define ARIZONA_WSEQ_SEQUENCE_98 0x30C2 -#define ARIZONA_WSEQ_SEQUENCE_99 0x30C4 -#define ARIZONA_WSEQ_SEQUENCE_100 0x30C6 -#define ARIZONA_WSEQ_SEQUENCE_101 0x30C8 -#define ARIZONA_WSEQ_SEQUENCE_102 0x30CA -#define ARIZONA_WSEQ_SEQUENCE_103 0x30CC -#define ARIZONA_WSEQ_SEQUENCE_104 0x30CE -#define ARIZONA_WSEQ_SEQUENCE_105 0x30D0 -#define ARIZONA_WSEQ_SEQUENCE_106 0x30D2 -#define ARIZONA_WSEQ_SEQUENCE_107 0x30D4 -#define ARIZONA_WSEQ_SEQUENCE_108 0x30D6 -#define ARIZONA_WSEQ_SEQUENCE_109 0x30D8 -#define ARIZONA_WSEQ_SEQUENCE_110 0x30DA -#define ARIZONA_WSEQ_SEQUENCE_111 0x30DC -#define ARIZONA_WSEQ_SEQUENCE_112 0x30DE -#define ARIZONA_WSEQ_SEQUENCE_113 0x30E0 -#define ARIZONA_WSEQ_SEQUENCE_114 0x30E2 -#define ARIZONA_WSEQ_SEQUENCE_115 0x30E4 -#define ARIZONA_WSEQ_SEQUENCE_116 0x30E6 -#define ARIZONA_WSEQ_SEQUENCE_117 0x30E8 -#define ARIZONA_WSEQ_SEQUENCE_118 0x30EA -#define ARIZONA_WSEQ_SEQUENCE_119 0x30EC -#define ARIZONA_WSEQ_SEQUENCE_120 0x30EE -#define ARIZONA_WSEQ_SEQUENCE_121 0x30F0 -#define ARIZONA_WSEQ_SEQUENCE_122 0x30F2 -#define ARIZONA_WSEQ_SEQUENCE_123 0x30F4 -#define ARIZONA_WSEQ_SEQUENCE_124 0x30F6 -#define ARIZONA_WSEQ_SEQUENCE_125 0x30F8 -#define ARIZONA_WSEQ_SEQUENCE_126 0x30FA -#define ARIZONA_WSEQ_SEQUENCE_127 0x30FC -#define ARIZONA_WSEQ_SEQUENCE_128 0x30FE -#define ARIZONA_WSEQ_SEQUENCE_129 0x3100 -#define ARIZONA_WSEQ_SEQUENCE_130 0x3102 -#define ARIZONA_WSEQ_SEQUENCE_131 0x3104 -#define ARIZONA_WSEQ_SEQUENCE_132 0x3106 -#define ARIZONA_WSEQ_SEQUENCE_133 0x3108 -#define ARIZONA_WSEQ_SEQUENCE_134 0x310A -#define ARIZONA_WSEQ_SEQUENCE_135 0x310C -#define ARIZONA_WSEQ_SEQUENCE_136 0x310E -#define ARIZONA_WSEQ_SEQUENCE_137 0x3110 -#define ARIZONA_WSEQ_SEQUENCE_138 0x3112 -#define ARIZONA_WSEQ_SEQUENCE_139 0x3114 -#define ARIZONA_WSEQ_SEQUENCE_140 0x3116 -#define ARIZONA_WSEQ_SEQUENCE_141 0x3118 -#define ARIZONA_WSEQ_SEQUENCE_142 0x311A -#define ARIZONA_WSEQ_SEQUENCE_143 0x311C -#define ARIZONA_WSEQ_SEQUENCE_144 0x311E -#define ARIZONA_WSEQ_SEQUENCE_145 0x3120 -#define ARIZONA_WSEQ_SEQUENCE_146 0x3122 -#define ARIZONA_WSEQ_SEQUENCE_147 0x3124 -#define ARIZONA_WSEQ_SEQUENCE_148 0x3126 -#define ARIZONA_WSEQ_SEQUENCE_149 0x3128 -#define ARIZONA_WSEQ_SEQUENCE_150 0x312A -#define ARIZONA_WSEQ_SEQUENCE_151 0x312C -#define ARIZONA_WSEQ_SEQUENCE_152 0x312E -#define ARIZONA_WSEQ_SEQUENCE_153 0x3130 -#define ARIZONA_WSEQ_SEQUENCE_154 0x3132 -#define ARIZONA_WSEQ_SEQUENCE_155 0x3134 -#define ARIZONA_WSEQ_SEQUENCE_156 0x3136 -#define ARIZONA_WSEQ_SEQUENCE_157 0x3138 -#define ARIZONA_WSEQ_SEQUENCE_158 0x313A -#define ARIZONA_WSEQ_SEQUENCE_159 0x313C -#define ARIZONA_WSEQ_SEQUENCE_160 0x313E -#define ARIZONA_WSEQ_SEQUENCE_161 0x3140 -#define ARIZONA_WSEQ_SEQUENCE_162 0x3142 -#define ARIZONA_WSEQ_SEQUENCE_163 0x3144 -#define ARIZONA_WSEQ_SEQUENCE_164 0x3146 -#define ARIZONA_WSEQ_SEQUENCE_165 0x3148 -#define ARIZONA_WSEQ_SEQUENCE_166 0x314A -#define ARIZONA_WSEQ_SEQUENCE_167 0x314C -#define ARIZONA_WSEQ_SEQUENCE_168 0x314E -#define ARIZONA_WSEQ_SEQUENCE_169 0x3150 -#define ARIZONA_WSEQ_SEQUENCE_170 0x3152 -#define ARIZONA_WSEQ_SEQUENCE_171 0x3154 -#define ARIZONA_WSEQ_SEQUENCE_172 0x3156 -#define ARIZONA_WSEQ_SEQUENCE_173 0x3158 -#define ARIZONA_WSEQ_SEQUENCE_174 0x315A -#define ARIZONA_WSEQ_SEQUENCE_175 0x315C -#define ARIZONA_WSEQ_SEQUENCE_176 0x315E -#define ARIZONA_WSEQ_SEQUENCE_177 0x3160 -#define ARIZONA_WSEQ_SEQUENCE_178 0x3162 -#define ARIZONA_WSEQ_SEQUENCE_179 0x3164 -#define ARIZONA_WSEQ_SEQUENCE_180 0x3166 -#define ARIZONA_WSEQ_SEQUENCE_181 0x3168 -#define ARIZONA_WSEQ_SEQUENCE_182 0x316A -#define ARIZONA_WSEQ_SEQUENCE_183 0x316C -#define ARIZONA_WSEQ_SEQUENCE_184 0x316E -#define ARIZONA_WSEQ_SEQUENCE_185 0x3170 -#define ARIZONA_WSEQ_SEQUENCE_186 0x3172 -#define ARIZONA_WSEQ_SEQUENCE_187 0x3174 -#define ARIZONA_WSEQ_SEQUENCE_188 0x3176 -#define ARIZONA_WSEQ_SEQUENCE_189 0x3178 -#define ARIZONA_WSEQ_SEQUENCE_190 0x317A -#define ARIZONA_WSEQ_SEQUENCE_191 0x317C -#define ARIZONA_WSEQ_SEQUENCE_192 0x317E -#define ARIZONA_WSEQ_SEQUENCE_193 0x3180 -#define ARIZONA_WSEQ_SEQUENCE_194 0x3182 -#define ARIZONA_WSEQ_SEQUENCE_195 0x3184 -#define ARIZONA_WSEQ_SEQUENCE_196 0x3186 -#define ARIZONA_WSEQ_SEQUENCE_197 0x3188 -#define ARIZONA_WSEQ_SEQUENCE_198 0x318A -#define ARIZONA_WSEQ_SEQUENCE_199 0x318C -#define ARIZONA_WSEQ_SEQUENCE_200 0x318E -#define ARIZONA_WSEQ_SEQUENCE_201 0x3190 -#define ARIZONA_WSEQ_SEQUENCE_202 0x3192 -#define ARIZONA_WSEQ_SEQUENCE_203 0x3194 -#define ARIZONA_WSEQ_SEQUENCE_204 0x3196 -#define ARIZONA_WSEQ_SEQUENCE_205 0x3198 -#define ARIZONA_WSEQ_SEQUENCE_206 0x319A -#define ARIZONA_WSEQ_SEQUENCE_207 0x319C -#define ARIZONA_WSEQ_SEQUENCE_208 0x319E -#define ARIZONA_WSEQ_SEQUENCE_209 0x31A0 -#define ARIZONA_WSEQ_SEQUENCE_210 0x31A2 -#define ARIZONA_WSEQ_SEQUENCE_211 0x31A4 -#define ARIZONA_WSEQ_SEQUENCE_212 0x31A6 -#define ARIZONA_WSEQ_SEQUENCE_213 0x31A8 -#define ARIZONA_WSEQ_SEQUENCE_214 0x31AA -#define ARIZONA_WSEQ_SEQUENCE_215 0x31AC -#define ARIZONA_WSEQ_SEQUENCE_216 0x31AE -#define ARIZONA_WSEQ_SEQUENCE_217 0x31B0 -#define ARIZONA_WSEQ_SEQUENCE_218 0x31B2 -#define ARIZONA_WSEQ_SEQUENCE_219 0x31B4 -#define ARIZONA_WSEQ_SEQUENCE_220 0x31B6 -#define ARIZONA_WSEQ_SEQUENCE_221 0x31B8 -#define ARIZONA_WSEQ_SEQUENCE_222 0x31BA -#define ARIZONA_WSEQ_SEQUENCE_223 0x31BC -#define ARIZONA_WSEQ_SEQUENCE_224 0x31BE -#define ARIZONA_WSEQ_SEQUENCE_225 0x31C0 -#define ARIZONA_WSEQ_SEQUENCE_226 0x31C2 -#define ARIZONA_WSEQ_SEQUENCE_227 0x31C4 -#define ARIZONA_WSEQ_SEQUENCE_228 0x31C6 -#define ARIZONA_WSEQ_SEQUENCE_229 0x31C8 -#define ARIZONA_WSEQ_SEQUENCE_230 0x31CA -#define ARIZONA_WSEQ_SEQUENCE_231 0x31CC -#define ARIZONA_WSEQ_SEQUENCE_232 0x31CE -#define ARIZONA_WSEQ_SEQUENCE_233 0x31D0 -#define ARIZONA_WSEQ_SEQUENCE_234 0x31D2 -#define ARIZONA_WSEQ_SEQUENCE_235 0x31D4 -#define ARIZONA_WSEQ_SEQUENCE_236 0x31D6 -#define ARIZONA_WSEQ_SEQUENCE_237 0x31D8 -#define ARIZONA_WSEQ_SEQUENCE_238 0x31DA -#define ARIZONA_WSEQ_SEQUENCE_239 0x31DC -#define ARIZONA_WSEQ_SEQUENCE_240 0x31DE -#define ARIZONA_WSEQ_SEQUENCE_241 0x31E0 -#define ARIZONA_WSEQ_SEQUENCE_242 0x31E2 -#define ARIZONA_WSEQ_SEQUENCE_243 0x31E4 -#define ARIZONA_WSEQ_SEQUENCE_244 0x31E6 -#define ARIZONA_WSEQ_SEQUENCE_245 0x31E8 -#define ARIZONA_WSEQ_SEQUENCE_246 0x31EA -#define ARIZONA_WSEQ_SEQUENCE_247 0x31EC -#define ARIZONA_WSEQ_SEQUENCE_248 0x31EE -#define ARIZONA_WSEQ_SEQUENCE_249 0x31F0 -#define ARIZONA_WSEQ_SEQUENCE_250 0x31F2 -#define ARIZONA_WSEQ_SEQUENCE_251 0x31F4 -#define ARIZONA_WSEQ_SEQUENCE_252 0x31F6 -#define ARIZONA_WSEQ_SEQUENCE_253 0x31F8 -#define ARIZONA_WSEQ_SEQUENCE_254 0x31FA -#define ARIZONA_WSEQ_SEQUENCE_255 0x31FC -#define ARIZONA_WSEQ_SEQUENCE_256 0x31FE -#define ARIZONA_WSEQ_SEQUENCE_257 0x3200 -#define ARIZONA_WSEQ_SEQUENCE_258 0x3202 -#define ARIZONA_WSEQ_SEQUENCE_259 0x3204 -#define ARIZONA_WSEQ_SEQUENCE_260 0x3206 -#define ARIZONA_WSEQ_SEQUENCE_261 0x3208 -#define ARIZONA_WSEQ_SEQUENCE_262 0x320A -#define ARIZONA_WSEQ_SEQUENCE_263 0x320C -#define ARIZONA_WSEQ_SEQUENCE_264 0x320E -#define ARIZONA_WSEQ_SEQUENCE_265 0x3210 -#define ARIZONA_WSEQ_SEQUENCE_266 0x3212 -#define ARIZONA_WSEQ_SEQUENCE_267 0x3214 -#define ARIZONA_WSEQ_SEQUENCE_268 0x3216 -#define ARIZONA_WSEQ_SEQUENCE_269 0x3218 -#define ARIZONA_WSEQ_SEQUENCE_270 0x321A -#define ARIZONA_WSEQ_SEQUENCE_271 0x321C -#define ARIZONA_WSEQ_SEQUENCE_272 0x321E -#define ARIZONA_WSEQ_SEQUENCE_273 0x3220 -#define ARIZONA_WSEQ_SEQUENCE_274 0x3222 -#define ARIZONA_WSEQ_SEQUENCE_275 0x3224 -#define ARIZONA_WSEQ_SEQUENCE_276 0x3226 -#define ARIZONA_WSEQ_SEQUENCE_277 0x3228 -#define ARIZONA_WSEQ_SEQUENCE_278 0x322A -#define ARIZONA_WSEQ_SEQUENCE_279 0x322C -#define ARIZONA_WSEQ_SEQUENCE_280 0x322E -#define ARIZONA_WSEQ_SEQUENCE_281 0x3230 -#define ARIZONA_WSEQ_SEQUENCE_282 0x3232 -#define ARIZONA_WSEQ_SEQUENCE_283 0x3234 -#define ARIZONA_WSEQ_SEQUENCE_284 0x3236 -#define ARIZONA_WSEQ_SEQUENCE_285 0x3238 -#define ARIZONA_WSEQ_SEQUENCE_286 0x323A -#define ARIZONA_WSEQ_SEQUENCE_287 0x323C -#define ARIZONA_WSEQ_SEQUENCE_288 0x323E -#define ARIZONA_WSEQ_SEQUENCE_289 0x3240 -#define ARIZONA_WSEQ_SEQUENCE_290 0x3242 -#define ARIZONA_WSEQ_SEQUENCE_291 0x3244 -#define ARIZONA_WSEQ_SEQUENCE_292 0x3246 -#define ARIZONA_WSEQ_SEQUENCE_293 0x3248 -#define ARIZONA_WSEQ_SEQUENCE_294 0x324A -#define ARIZONA_WSEQ_SEQUENCE_295 0x324C -#define ARIZONA_WSEQ_SEQUENCE_296 0x324E -#define ARIZONA_WSEQ_SEQUENCE_297 0x3250 -#define ARIZONA_WSEQ_SEQUENCE_298 0x3252 -#define ARIZONA_WSEQ_SEQUENCE_299 0x3254 -#define ARIZONA_WSEQ_SEQUENCE_300 0x3256 -#define ARIZONA_WSEQ_SEQUENCE_301 0x3258 -#define ARIZONA_WSEQ_SEQUENCE_302 0x325A -#define ARIZONA_WSEQ_SEQUENCE_303 0x325C -#define ARIZONA_WSEQ_SEQUENCE_304 0x325E -#define ARIZONA_WSEQ_SEQUENCE_305 0x3260 -#define ARIZONA_WSEQ_SEQUENCE_306 0x3262 -#define ARIZONA_WSEQ_SEQUENCE_307 0x3264 -#define ARIZONA_WSEQ_SEQUENCE_308 0x3266 -#define ARIZONA_WSEQ_SEQUENCE_309 0x3268 -#define ARIZONA_WSEQ_SEQUENCE_310 0x326A -#define ARIZONA_WSEQ_SEQUENCE_311 0x326C -#define ARIZONA_WSEQ_SEQUENCE_312 0x326E -#define ARIZONA_WSEQ_SEQUENCE_313 0x3270 -#define ARIZONA_WSEQ_SEQUENCE_314 0x3272 -#define ARIZONA_WSEQ_SEQUENCE_315 0x3274 -#define ARIZONA_WSEQ_SEQUENCE_316 0x3276 -#define ARIZONA_WSEQ_SEQUENCE_317 0x3278 -#define ARIZONA_WSEQ_SEQUENCE_318 0x327A -#define ARIZONA_WSEQ_SEQUENCE_319 0x327C -#define ARIZONA_WSEQ_SEQUENCE_320 0x327E -#define ARIZONA_WSEQ_SEQUENCE_321 0x3280 -#define ARIZONA_WSEQ_SEQUENCE_322 0x3282 -#define ARIZONA_WSEQ_SEQUENCE_323 0x3284 -#define ARIZONA_WSEQ_SEQUENCE_324 0x3286 -#define ARIZONA_WSEQ_SEQUENCE_325 0x3288 -#define ARIZONA_WSEQ_SEQUENCE_326 0x328A -#define ARIZONA_WSEQ_SEQUENCE_327 0x328C -#define ARIZONA_WSEQ_SEQUENCE_328 0x328E -#define ARIZONA_WSEQ_SEQUENCE_329 0x3290 -#define ARIZONA_WSEQ_SEQUENCE_330 0x3292 -#define ARIZONA_WSEQ_SEQUENCE_331 0x3294 -#define ARIZONA_WSEQ_SEQUENCE_332 0x3296 -#define ARIZONA_WSEQ_SEQUENCE_333 0x3298 -#define ARIZONA_WSEQ_SEQUENCE_334 0x329A -#define ARIZONA_WSEQ_SEQUENCE_335 0x329C -#define ARIZONA_WSEQ_SEQUENCE_336 0x329E -#define ARIZONA_WSEQ_SEQUENCE_337 0x32A0 -#define ARIZONA_WSEQ_SEQUENCE_338 0x32A2 -#define ARIZONA_WSEQ_SEQUENCE_339 0x32A4 -#define ARIZONA_WSEQ_SEQUENCE_340 0x32A6 -#define ARIZONA_WSEQ_SEQUENCE_341 0x32A8 -#define ARIZONA_WSEQ_SEQUENCE_342 0x32AA -#define ARIZONA_WSEQ_SEQUENCE_343 0x32AC -#define ARIZONA_WSEQ_SEQUENCE_344 0x32AE -#define ARIZONA_WSEQ_SEQUENCE_345 0x32B0 -#define ARIZONA_WSEQ_SEQUENCE_346 0x32B2 -#define ARIZONA_WSEQ_SEQUENCE_347 0x32B4 -#define ARIZONA_WSEQ_SEQUENCE_348 0x32B6 -#define ARIZONA_WSEQ_SEQUENCE_349 0x32B8 -#define ARIZONA_WSEQ_SEQUENCE_350 0x32BA -#define ARIZONA_WSEQ_SEQUENCE_351 0x32BC -#define ARIZONA_WSEQ_SEQUENCE_352 0x32BE -#define ARIZONA_WSEQ_SEQUENCE_353 0x32C0 -#define ARIZONA_WSEQ_SEQUENCE_354 0x32C2 -#define ARIZONA_WSEQ_SEQUENCE_355 0x32C4 -#define ARIZONA_WSEQ_SEQUENCE_356 0x32C6 -#define ARIZONA_WSEQ_SEQUENCE_357 0x32C8 -#define ARIZONA_WSEQ_SEQUENCE_358 0x32CA -#define ARIZONA_WSEQ_SEQUENCE_359 0x32CC -#define ARIZONA_WSEQ_SEQUENCE_360 0x32CE -#define ARIZONA_WSEQ_SEQUENCE_361 0x32D0 -#define ARIZONA_WSEQ_SEQUENCE_362 0x32D2 -#define ARIZONA_WSEQ_SEQUENCE_363 0x32D4 -#define ARIZONA_WSEQ_SEQUENCE_364 0x32D6 -#define ARIZONA_WSEQ_SEQUENCE_365 0x32D8 -#define ARIZONA_WSEQ_SEQUENCE_366 0x32DA -#define ARIZONA_WSEQ_SEQUENCE_367 0x32DC -#define ARIZONA_WSEQ_SEQUENCE_368 0x32DE -#define ARIZONA_WSEQ_SEQUENCE_369 0x32E0 -#define ARIZONA_WSEQ_SEQUENCE_370 0x32E2 -#define ARIZONA_WSEQ_SEQUENCE_371 0x32E4 -#define ARIZONA_WSEQ_SEQUENCE_372 0x32E6 -#define ARIZONA_WSEQ_SEQUENCE_373 0x32E8 -#define ARIZONA_WSEQ_SEQUENCE_374 0x32EA -#define ARIZONA_WSEQ_SEQUENCE_375 0x32EC -#define ARIZONA_WSEQ_SEQUENCE_376 0x32EE -#define ARIZONA_WSEQ_SEQUENCE_377 0x32F0 -#define ARIZONA_WSEQ_SEQUENCE_378 0x32F2 -#define ARIZONA_WSEQ_SEQUENCE_379 0x32F4 -#define ARIZONA_WSEQ_SEQUENCE_380 0x32F6 -#define ARIZONA_WSEQ_SEQUENCE_381 0x32F8 -#define ARIZONA_WSEQ_SEQUENCE_382 0x32FA -#define ARIZONA_WSEQ_SEQUENCE_383 0x32FC -#define ARIZONA_WSEQ_SEQUENCE_384 0x32FE -#define ARIZONA_WSEQ_SEQUENCE_385 0x3300 -#define ARIZONA_WSEQ_SEQUENCE_386 0x3302 -#define ARIZONA_WSEQ_SEQUENCE_387 0x3304 -#define ARIZONA_WSEQ_SEQUENCE_388 0x3306 -#define ARIZONA_WSEQ_SEQUENCE_389 0x3308 -#define ARIZONA_WSEQ_SEQUENCE_390 0x330A -#define ARIZONA_WSEQ_SEQUENCE_391 0x330C -#define ARIZONA_WSEQ_SEQUENCE_392 0x330E -#define ARIZONA_WSEQ_SEQUENCE_393 0x3310 -#define ARIZONA_WSEQ_SEQUENCE_394 0x3312 -#define ARIZONA_WSEQ_SEQUENCE_395 0x3314 -#define ARIZONA_WSEQ_SEQUENCE_396 0x3316 -#define ARIZONA_WSEQ_SEQUENCE_397 0x3318 -#define ARIZONA_WSEQ_SEQUENCE_398 0x331A -#define ARIZONA_WSEQ_SEQUENCE_399 0x331C -#define ARIZONA_WSEQ_SEQUENCE_400 0x331E -#define ARIZONA_WSEQ_SEQUENCE_401 0x3320 -#define ARIZONA_WSEQ_SEQUENCE_402 0x3322 -#define ARIZONA_WSEQ_SEQUENCE_403 0x3324 -#define ARIZONA_WSEQ_SEQUENCE_404 0x3326 -#define ARIZONA_WSEQ_SEQUENCE_405 0x3328 -#define ARIZONA_WSEQ_SEQUENCE_406 0x332A -#define ARIZONA_WSEQ_SEQUENCE_407 0x332C -#define ARIZONA_WSEQ_SEQUENCE_408 0x332E -#define ARIZONA_WSEQ_SEQUENCE_409 0x3330 -#define ARIZONA_WSEQ_SEQUENCE_410 0x3332 -#define ARIZONA_WSEQ_SEQUENCE_411 0x3334 -#define ARIZONA_WSEQ_SEQUENCE_412 0x3336 -#define ARIZONA_WSEQ_SEQUENCE_413 0x3338 -#define ARIZONA_WSEQ_SEQUENCE_414 0x333A -#define ARIZONA_WSEQ_SEQUENCE_415 0x333C -#define ARIZONA_WSEQ_SEQUENCE_416 0x333E -#define ARIZONA_WSEQ_SEQUENCE_417 0x3340 -#define ARIZONA_WSEQ_SEQUENCE_418 0x3342 -#define ARIZONA_WSEQ_SEQUENCE_419 0x3344 -#define ARIZONA_WSEQ_SEQUENCE_420 0x3346 -#define ARIZONA_WSEQ_SEQUENCE_421 0x3348 -#define ARIZONA_WSEQ_SEQUENCE_422 0x334A -#define ARIZONA_WSEQ_SEQUENCE_423 0x334C -#define ARIZONA_WSEQ_SEQUENCE_424 0x334E -#define ARIZONA_WSEQ_SEQUENCE_425 0x3350 -#define ARIZONA_WSEQ_SEQUENCE_426 0x3352 -#define ARIZONA_WSEQ_SEQUENCE_427 0x3354 -#define ARIZONA_WSEQ_SEQUENCE_428 0x3356 -#define ARIZONA_WSEQ_SEQUENCE_429 0x3358 -#define ARIZONA_WSEQ_SEQUENCE_430 0x335A -#define ARIZONA_WSEQ_SEQUENCE_431 0x335C -#define ARIZONA_WSEQ_SEQUENCE_432 0x335E -#define ARIZONA_WSEQ_SEQUENCE_433 0x3360 -#define ARIZONA_WSEQ_SEQUENCE_434 0x3362 -#define ARIZONA_WSEQ_SEQUENCE_435 0x3364 -#define ARIZONA_WSEQ_SEQUENCE_436 0x3366 -#define ARIZONA_WSEQ_SEQUENCE_437 0x3368 -#define ARIZONA_WSEQ_SEQUENCE_438 0x336A -#define ARIZONA_WSEQ_SEQUENCE_439 0x336C -#define ARIZONA_WSEQ_SEQUENCE_440 0x336E -#define ARIZONA_WSEQ_SEQUENCE_441 0x3370 -#define ARIZONA_WSEQ_SEQUENCE_442 0x3372 -#define ARIZONA_WSEQ_SEQUENCE_443 0x3374 -#define ARIZONA_WSEQ_SEQUENCE_444 0x3376 -#define ARIZONA_WSEQ_SEQUENCE_445 0x3378 -#define ARIZONA_WSEQ_SEQUENCE_446 0x337A -#define ARIZONA_WSEQ_SEQUENCE_447 0x337C -#define ARIZONA_WSEQ_SEQUENCE_448 0x337E -#define ARIZONA_WSEQ_SEQUENCE_449 0x3380 -#define ARIZONA_WSEQ_SEQUENCE_450 0x3382 -#define ARIZONA_WSEQ_SEQUENCE_451 0x3384 -#define ARIZONA_WSEQ_SEQUENCE_452 0x3386 -#define ARIZONA_WSEQ_SEQUENCE_453 0x3388 -#define ARIZONA_WSEQ_SEQUENCE_454 0x338A -#define ARIZONA_WSEQ_SEQUENCE_455 0x338C -#define ARIZONA_WSEQ_SEQUENCE_456 0x338E -#define ARIZONA_WSEQ_SEQUENCE_457 0x3390 -#define ARIZONA_WSEQ_SEQUENCE_458 0x3392 -#define ARIZONA_WSEQ_SEQUENCE_459 0x3394 -#define ARIZONA_WSEQ_SEQUENCE_460 0x3396 -#define ARIZONA_WSEQ_SEQUENCE_461 0x3398 -#define ARIZONA_WSEQ_SEQUENCE_462 0x339A -#define ARIZONA_WSEQ_SEQUENCE_463 0x339C -#define ARIZONA_WSEQ_SEQUENCE_464 0x339E -#define ARIZONA_WSEQ_SEQUENCE_465 0x33A0 -#define ARIZONA_WSEQ_SEQUENCE_466 0x33A2 -#define ARIZONA_WSEQ_SEQUENCE_467 0x33A4 -#define ARIZONA_WSEQ_SEQUENCE_468 0x33A6 -#define ARIZONA_WSEQ_SEQUENCE_469 0x33A8 -#define ARIZONA_WSEQ_SEQUENCE_470 0x33AA -#define ARIZONA_WSEQ_SEQUENCE_471 0x33AC -#define ARIZONA_WSEQ_SEQUENCE_472 0x33AE -#define ARIZONA_WSEQ_SEQUENCE_473 0x33B0 -#define ARIZONA_WSEQ_SEQUENCE_474 0x33B2 -#define ARIZONA_WSEQ_SEQUENCE_475 0x33B4 -#define ARIZONA_WSEQ_SEQUENCE_476 0x33B6 -#define ARIZONA_WSEQ_SEQUENCE_477 0x33B8 -#define ARIZONA_WSEQ_SEQUENCE_478 0x33BA -#define ARIZONA_WSEQ_SEQUENCE_479 0x33BC -#define ARIZONA_WSEQ_SEQUENCE_480 0x33BE -#define ARIZONA_WSEQ_SEQUENCE_481 0x33C0 -#define ARIZONA_WSEQ_SEQUENCE_482 0x33C2 -#define ARIZONA_WSEQ_SEQUENCE_483 0x33C4 -#define ARIZONA_WSEQ_SEQUENCE_484 0x33C6 -#define ARIZONA_WSEQ_SEQUENCE_485 0x33C8 -#define ARIZONA_WSEQ_SEQUENCE_486 0x33CA -#define ARIZONA_WSEQ_SEQUENCE_487 0x33CC -#define ARIZONA_WSEQ_SEQUENCE_488 0x33CE -#define ARIZONA_WSEQ_SEQUENCE_489 0x33D0 -#define ARIZONA_WSEQ_SEQUENCE_490 0x33D2 -#define ARIZONA_WSEQ_SEQUENCE_491 0x33D4 -#define ARIZONA_WSEQ_SEQUENCE_492 0x33D6 -#define ARIZONA_WSEQ_SEQUENCE_493 0x33D8 -#define ARIZONA_WSEQ_SEQUENCE_494 0x33DA -#define ARIZONA_WSEQ_SEQUENCE_495 0x33DC -#define ARIZONA_WSEQ_SEQUENCE_496 0x33DE -#define ARIZONA_WSEQ_SEQUENCE_497 0x33E0 -#define ARIZONA_WSEQ_SEQUENCE_498 0x33E2 -#define ARIZONA_WSEQ_SEQUENCE_499 0x33E4 -#define ARIZONA_WSEQ_SEQUENCE_500 0x33E6 -#define ARIZONA_WSEQ_SEQUENCE_501 0x33E8 -#define ARIZONA_WSEQ_SEQUENCE_502 0x33EA -#define ARIZONA_WSEQ_SEQUENCE_503 0x33EC -#define ARIZONA_WSEQ_SEQUENCE_504 0x33EE -#define ARIZONA_WSEQ_SEQUENCE_505 0x33F0 -#define ARIZONA_WSEQ_SEQUENCE_506 0x33F2 -#define ARIZONA_WSEQ_SEQUENCE_507 0x33F4 -#define ARIZONA_WSEQ_SEQUENCE_508 0x33F6 -#define MARLEY_OTP_HPDET_CALIB_1 0x31F8 -#define MARLEY_OTP_HPDET_CALIB_2 0x31FA -#define CLEARWATER_OTP_HPDET_CALIB_1 0x33F8 -#define CLEARWATER_OTP_HPDET_CALIB_2 0x33FA -#define CLEARWATER_DSP1_CONFIG 0x0FFE00 -#define CLEARWATER_DSP1_STATUS_1 0x0FFE04 -#define CLEARWATER_DSP1_STATUS_2 0x0FFE05 -#define CLEARWATER_DSP1_WDMA_CONFIG_1 0x0FFE30 -#define CLEARWATER_DSP1_WDMA_CONFIG_2 0x0FFE31 -#define CLEARWATER_DSP1_RDMA_CONFIG_1 0x0FFE34 -#define CLEARWATER_DSP1_SCRATCH_0 0x0FFE40 -#define CLEARWATER_DSP1_SCRATCH_1 0x0FFE41 -#define CLEARWATER_DSP1_SCRATCH_2 0x0FFE42 -#define CLEARWATER_DSP1_SCRATCH_3 0x0FFE43 -#define CLEARWATER_DSP2_CONFIG 0x17FE00 -#define CLEARWATER_DSP2_STATUS_1 0x17FE04 -#define CLEARWATER_DSP2_STATUS_2 0x17FE05 -#define CLEARWATER_DSP2_WDMA_CONFIG_1 0x17FE30 -#define CLEARWATER_DSP2_WDMA_CONFIG_2 0x17FE31 -#define CLEARWATER_DSP2_RDMA_CONFIG_1 0x17FE34 -#define CLEARWATER_DSP2_SCRATCH_0 0x17FE40 -#define CLEARWATER_DSP2_SCRATCH_1 0x17FE41 -#define CLEARWATER_DSP2_SCRATCH_2 0x17FE42 -#define CLEARWATER_DSP2_SCRATCH_3 0x17FE43 -#define CLEARWATER_DSP3_CONFIG 0x1FFE00 -#define CLEARWATER_DSP3_STATUS_1 0x1FFE04 -#define CLEARWATER_DSP3_STATUS_2 0x1FFE05 -#define CLEARWATER_DSP3_WDMA_CONFIG_1 0x1FFE30 -#define CLEARWATER_DSP3_WDMA_CONFIG_2 0x1FFE31 -#define CLEARWATER_DSP3_RDMA_CONFIG_1 0x1FFE34 -#define CLEARWATER_DSP3_SCRATCH_0 0x1FFE40 -#define CLEARWATER_DSP3_SCRATCH_1 0x1FFE41 -#define CLEARWATER_DSP3_SCRATCH_2 0x1FFE42 -#define CLEARWATER_DSP3_SCRATCH_3 0x1FFE43 -#define CLEARWATER_DSP4_CONFIG 0x27FE00 -#define CLEARWATER_DSP4_STATUS_1 0x27FE04 -#define CLEARWATER_DSP4_STATUS_2 0x27FE05 -#define CLEARWATER_DSP4_WDMA_CONFIG_1 0x27FE30 -#define CLEARWATER_DSP4_WDMA_CONFIG_2 0x27FE31 -#define CLEARWATER_DSP4_RDMA_CONFIG_1 0x27FE34 -#define CLEARWATER_DSP4_SCRATCH_0 0x27FE40 -#define CLEARWATER_DSP4_SCRATCH_1 0x27FE41 -#define CLEARWATER_DSP4_SCRATCH_2 0x27FE42 -#define CLEARWATER_DSP4_SCRATCH_3 0x27FE43 -#define CLEARWATER_DSP5_CONFIG 0x2FFE00 -#define CLEARWATER_DSP5_STATUS_1 0x2FFE04 -#define CLEARWATER_DSP5_STATUS_2 0x2FFE05 -#define CLEARWATER_DSP5_WDMA_CONFIG_1 0x2FFE30 -#define CLEARWATER_DSP5_WDMA_CONFIG_2 0x2FFE31 -#define CLEARWATER_DSP5_RDMA_CONFIG_1 0x2FFE34 -#define CLEARWATER_DSP5_SCRATCH_0 0x2FFE40 -#define CLEARWATER_DSP5_SCRATCH_1 0x2FFE41 -#define CLEARWATER_DSP5_SCRATCH_2 0x2FFE42 -#define CLEARWATER_DSP5_SCRATCH_3 0x2FFE43 -#define CLEARWATER_DSP6_CONFIG 0x37FE00 -#define CLEARWATER_DSP6_STATUS_1 0x37FE04 -#define CLEARWATER_DSP6_STATUS_2 0x37FE05 -#define CLEARWATER_DSP6_WDMA_CONFIG_1 0x37FE30 -#define CLEARWATER_DSP6_WDMA_CONFIG_2 0x37FE31 -#define CLEARWATER_DSP6_RDMA_CONFIG_1 0x37FE34 -#define CLEARWATER_DSP6_SCRATCH_0 0x37FE40 -#define CLEARWATER_DSP6_SCRATCH_1 0x37FE41 -#define CLEARWATER_DSP6_SCRATCH_2 0x37FE42 -#define CLEARWATER_DSP6_SCRATCH_3 0x37FE43 -#define CLEARWATER_DSP7_CONFIG 0x3FFE00 -#define CLEARWATER_DSP7_STATUS_1 0x3FFE04 -#define CLEARWATER_DSP7_STATUS_2 0x3FFE05 -#define CLEARWATER_DSP7_WDMA_CONFIG_1 0x3FFE30 -#define CLEARWATER_DSP7_WDMA_CONFIG_2 0x3FFE31 -#define CLEARWATER_DSP7_RDMA_CONFIG_1 0x3FFE34 -#define CLEARWATER_DSP7_SCRATCH_0 0x3FFE40 -#define CLEARWATER_DSP7_SCRATCH_1 0x3FFE41 -#define CLEARWATER_DSP7_SCRATCH_2 0x3FFE42 -#define CLEARWATER_DSP7_SCRATCH_3 0x3FFE43 +#define CLEARWATER_ADSP2_IRQ0 0x1600 +#define CLEARWATER_ADSP2_IRQ1 0x1601 +#define CLEARWATER_ADSP2_IRQ2 0x1602 +#define CLEARWATER_ADSP2_IRQ3 0x1603 +#define CLEARWATER_ADSP2_IRQ4 0x1604 +#define CLEARWATER_ADSP2_IRQ5 0x1605 +#define CLEARWATER_ADSP2_IRQ6 0x1606 +#define CLEARWATER_ADSP2_IRQ7 0x1607 +#define CLEARWATER_GPIO1_CTRL_1 0x1700 +#define CLEARWATER_GPIO1_CTRL_2 0x1701 +#define CLEARWATER_GPIO2_CTRL_1 0x1702 +#define CLEARWATER_GPIO2_CTRL_2 0x1703 +#define CLEARWATER_GPIO3_CTRL_1 0x1704 +#define CLEARWATER_GPIO3_CTRL_2 0x1705 +#define CLEARWATER_GPIO4_CTRL_1 0x1706 +#define CLEARWATER_GPIO4_CTRL_2 0x1707 +#define CLEARWATER_GPIO5_CTRL_1 0x1708 +#define CLEARWATER_GPIO5_CTRL_2 0x1709 +#define CLEARWATER_GPIO6_CTRL_1 0x170A +#define CLEARWATER_GPIO6_CTRL_2 0x170B +#define CLEARWATER_GPIO7_CTRL_1 0x170C +#define CLEARWATER_GPIO7_CTRL_2 0x170D +#define CLEARWATER_GPIO8_CTRL_1 0x170E +#define CLEARWATER_GPIO8_CTRL_2 0x170F +#define CLEARWATER_GPIO9_CTRL_1 0x1710 +#define CLEARWATER_GPIO9_CTRL_2 0x1711 +#define CLEARWATER_GPIO10_CTRL_1 0x1712 +#define CLEARWATER_GPIO10_CTRL_2 0x1713 +#define CLEARWATER_GPIO11_CTRL_1 0x1714 +#define CLEARWATER_GPIO11_CTRL_2 0x1715 +#define CLEARWATER_GPIO12_CTRL_1 0x1716 +#define CLEARWATER_GPIO12_CTRL_2 0x1717 +#define CLEARWATER_GPIO13_CTRL_1 0x1718 +#define CLEARWATER_GPIO13_CTRL_2 0x1719 +#define CLEARWATER_GPIO14_CTRL_1 0x171A +#define CLEARWATER_GPIO14_CTRL_2 0x171B +#define CLEARWATER_GPIO15_CTRL_1 0x171C +#define CLEARWATER_GPIO15_CTRL_2 0x171D +#define CLEARWATER_GPIO16_CTRL_1 0x171E +#define CLEARWATER_GPIO16_CTRL_2 0x171F +#define CLEARWATER_GPIO17_CTRL_1 0x1720 +#define CLEARWATER_GPIO17_CTRL_2 0x1721 +#define CLEARWATER_GPIO18_CTRL_1 0x1722 +#define CLEARWATER_GPIO18_CTRL_2 0x1723 +#define CLEARWATER_GPIO19_CTRL_1 0x1724 +#define CLEARWATER_GPIO19_CTRL_2 0x1725 +#define CLEARWATER_GPIO20_CTRL_1 0x1726 +#define CLEARWATER_GPIO20_CTRL_2 0x1727 +#define CLEARWATER_GPIO21_CTRL_1 0x1728 +#define CLEARWATER_GPIO21_CTRL_2 0x1729 +#define CLEARWATER_GPIO22_CTRL_1 0x172A +#define CLEARWATER_GPIO22_CTRL_2 0x172B +#define CLEARWATER_GPIO23_CTRL_1 0x172C +#define CLEARWATER_GPIO23_CTRL_2 0x172D +#define CLEARWATER_GPIO24_CTRL_1 0x172E +#define CLEARWATER_GPIO24_CTRL_2 0x172F +#define CLEARWATER_GPIO25_CTRL_1 0x1730 +#define CLEARWATER_GPIO25_CTRL_2 0x1731 +#define CLEARWATER_GPIO26_CTRL_1 0x1732 +#define CLEARWATER_GPIO26_CTRL_2 0x1733 +#define CLEARWATER_GPIO27_CTRL_1 0x1734 +#define CLEARWATER_GPIO27_CTRL_2 0x1735 +#define CLEARWATER_GPIO28_CTRL_1 0x1736 +#define CLEARWATER_GPIO28_CTRL_2 0x1737 +#define CLEARWATER_GPIO29_CTRL_1 0x1738 +#define CLEARWATER_GPIO29_CTRL_2 0x1739 +#define CLEARWATER_GPIO30_CTRL_1 0x173A +#define CLEARWATER_GPIO30_CTRL_2 0x173B +#define CLEARWATER_GPIO31_CTRL_1 0x173C +#define CLEARWATER_GPIO31_CTRL_2 0x173D +#define CLEARWATER_GPIO32_CTRL_1 0x173E +#define CLEARWATER_GPIO32_CTRL_2 0x173F +#define CLEARWATER_GPIO33_CTRL_1 0x1740 +#define CLEARWATER_GPIO33_CTRL_2 0x1741 +#define CLEARWATER_GPIO34_CTRL_1 0x1742 +#define CLEARWATER_GPIO34_CTRL_2 0x1743 +#define CLEARWATER_GPIO35_CTRL_1 0x1744 +#define CLEARWATER_GPIO35_CTRL_2 0x1745 +#define CLEARWATER_GPIO36_CTRL_1 0x1746 +#define CLEARWATER_GPIO36_CTRL_2 0x1747 +#define CLEARWATER_GPIO37_CTRL_1 0x1748 +#define CLEARWATER_GPIO37_CTRL_2 0x1749 +#define CLEARWATER_GPIO38_CTRL_1 0x174A +#define CLEARWATER_GPIO38_CTRL_2 0x174B +#define CLEARWATER_GPIO39_CTRL_1 0x174C +#define CLEARWATER_GPIO39_CTRL_2 0x174D +#define CLEARWATER_GPIO40_CTRL_1 0x174E +#define CLEARWATER_GPIO40_CTRL_2 0x174F +#define CLEARWATER_IRQ1_STATUS_1 0x1800 +#define CLEARWATER_IRQ1_STATUS_2 0x1801 +#define CLEARWATER_IRQ1_STATUS_6 0x1805 +#define CLEARWATER_IRQ1_STATUS_7 0x1806 +#define CLEARWATER_IRQ1_STATUS_9 0x1808 +#define CLEARWATER_IRQ1_STATUS_11 0x180A +#define CLEARWATER_IRQ1_STATUS_12 0x180B +#define CLEARWATER_IRQ1_STATUS_13 0x180C +#define CLEARWATER_IRQ1_STATUS_14 0x180D +#define CLEARWATER_IRQ1_STATUS_15 0x180E +#define CLEARWATER_IRQ1_STATUS_17 0x1810 +#define CLEARWATER_IRQ1_STATUS_18 0x1811 +#define CLEARWATER_IRQ1_STATUS_19 0x1812 +#define CLEARWATER_IRQ1_STATUS_21 0x1814 +#define CLEARWATER_IRQ1_STATUS_22 0x1815 +#define CLEARWATER_IRQ1_STATUS_23 0x1816 +#define CLEARWATER_IRQ1_STATUS_24 0x1817 +#define CLEARWATER_IRQ1_STATUS_25 0x1818 +#define CLEARWATER_IRQ1_STATUS_27 0x181A +#define CLEARWATER_IRQ1_STATUS_28 0x181B +#define CLEARWATER_IRQ1_STATUS_30 0x181D +#define CLEARWATER_IRQ1_STATUS_31 0x181E +#define CLEARWATER_IRQ1_STATUS_32 0x181F +#define CLEARWATER_IRQ1_MASK_1 0x1840 +#define CLEARWATER_IRQ1_MASK_2 0x1841 +#define CLEARWATER_IRQ1_MASK_3 0x1842 +#define CLEARWATER_IRQ1_MASK_4 0x1843 +#define CLEARWATER_IRQ1_MASK_5 0x1844 +#define CLEARWATER_IRQ1_MASK_6 0x1845 +#define CLEARWATER_IRQ1_MASK_7 0x1846 +#define CLEARWATER_IRQ1_MASK_8 0x1847 +#define CLEARWATER_IRQ1_MASK_9 0x1848 +#define CLEARWATER_IRQ1_MASK_10 0x1849 +#define CLEARWATER_IRQ1_MASK_11 0x184A +#define CLEARWATER_IRQ1_MASK_12 0x184B +#define CLEARWATER_IRQ1_MASK_13 0x184C +#define CLEARWATER_IRQ1_MASK_14 0x184D +#define CLEARWATER_IRQ1_MASK_15 0x184E +#define CLEARWATER_IRQ1_MASK_17 0x1850 +#define CLEARWATER_IRQ1_MASK_18 0x1851 +#define CLEARWATER_IRQ1_MASK_19 0x1852 +#define CLEARWATER_IRQ1_MASK_21 0x1854 +#define CLEARWATER_IRQ1_MASK_22 0x1855 +#define CLEARWATER_IRQ1_MASK_23 0x1856 +#define CLEARWATER_IRQ1_MASK_24 0x1857 +#define CLEARWATER_IRQ1_MASK_25 0x1858 +#define CLEARWATER_IRQ1_MASK_27 0x185A +#define CLEARWATER_IRQ1_MASK_28 0x185B +#define CLEARWATER_IRQ1_MASK_30 0x185D +#define CLEARWATER_IRQ1_MASK_31 0x185E +#define CLEARWATER_IRQ1_MASK_32 0x185F +#define CLEARWATER_IRQ1_RAW_STATUS_1 0x1880 +#define CLEARWATER_IRQ1_RAW_STATUS_2 0x1881 +#define CLEARWATER_IRQ1_RAW_STATUS_6 0x1885 +#define CLEARWATER_IRQ1_RAW_STATUS_7 0x1886 +#define CLEARWATER_IRQ1_RAW_STATUS_9 0x1888 +#define CLEARWATER_IRQ1_RAW_STATUS_10 0x1889 +#define CLEARWATER_IRQ1_RAW_STATUS_11 0x188A +#define CLEARWATER_IRQ1_RAW_STATUS_12 0x188B +#define CLEARWATER_IRQ1_RAW_STATUS_13 0x188C +#define CLEARWATER_IRQ1_RAW_STATUS_14 0x188D +#define CLEARWATER_IRQ1_RAW_STATUS_15 0x188E +#define CLEARWATER_IRQ1_RAW_STATUS_17 0x1890 +#define CLEARWATER_IRQ1_RAW_STATUS_18 0x1891 +#define CLEARWATER_IRQ1_RAW_STATUS_19 0x1892 +#define CLEARWATER_IRQ1_RAW_STATUS_21 0x1894 +#define CLEARWATER_IRQ1_RAW_STATUS_22 0x1895 +#define CLEARWATER_IRQ1_RAW_STATUS_23 0x1896 +#define CLEARWATER_IRQ1_RAW_STATUS_24 0x1897 +#define CLEARWATER_IRQ1_RAW_STATUS_25 0x1898 +#define CLEARWATER_IRQ1_RAW_STATUS_30 0x189D +#define CLEARWATER_IRQ1_RAW_STATUS_31 0x189E +#define CLEARWATER_IRQ1_RAW_STATUS_32 0x189F +#define CLEARWATER_IRQ2_STATUS_1 0x1900 +#define CLEARWATER_IRQ2_STATUS_2 0x1901 +#define CLEARWATER_IRQ2_STATUS_6 0x1905 +#define CLEARWATER_IRQ2_STATUS_7 0x1906 +#define CLEARWATER_IRQ2_STATUS_9 0x1908 +#define CLEARWATER_IRQ2_STATUS_11 0x190A +#define CLEARWATER_IRQ2_STATUS_12 0x190B +#define CLEARWATER_IRQ2_STATUS_13 0x190C +#define CLEARWATER_IRQ2_STATUS_14 0x190D +#define CLEARWATER_IRQ2_STATUS_15 0x190E +#define CLEARWATER_IRQ2_STATUS_17 0x1910 +#define CLEARWATER_IRQ2_STATUS_18 0x1911 +#define CLEARWATER_IRQ2_STATUS_19 0x1912 +#define CLEARWATER_IRQ2_STATUS_21 0x1914 +#define CLEARWATER_IRQ2_STATUS_22 0x1915 +#define CLEARWATER_IRQ2_STATUS_23 0x1916 +#define CLEARWATER_IRQ2_STATUS_24 0x1917 +#define CLEARWATER_IRQ2_STATUS_25 0x1918 +#define CLEARWATER_IRQ2_STATUS_27 0x191A +#define CLEARWATER_IRQ2_STATUS_28 0x191B +#define CLEARWATER_IRQ2_STATUS_30 0x191D +#define CLEARWATER_IRQ2_STATUS_31 0x191E +#define CLEARWATER_IRQ2_STATUS_32 0x191F +#define CLEARWATER_IRQ2_MASK_1 0x1940 +#define CLEARWATER_IRQ2_MASK_2 0x1941 +#define CLEARWATER_IRQ2_MASK_6 0x1945 +#define CLEARWATER_IRQ2_MASK_7 0x1946 +#define CLEARWATER_IRQ2_MASK_9 0x1948 +#define CLEARWATER_IRQ2_MASK_11 0x194A +#define CLEARWATER_IRQ2_MASK_12 0x194B +#define CLEARWATER_IRQ2_MASK_13 0x194C +#define CLEARWATER_IRQ2_MASK_14 0x194D +#define CLEARWATER_IRQ2_MASK_15 0x194E +#define CLEARWATER_IRQ2_MASK_17 0x1950 +#define CLEARWATER_IRQ2_MASK_18 0x1951 +#define CLEARWATER_IRQ2_MASK_19 0x1952 +#define CLEARWATER_IRQ2_MASK_21 0x1954 +#define CLEARWATER_IRQ2_MASK_22 0x1955 +#define CLEARWATER_IRQ2_MASK_23 0x1956 +#define CLEARWATER_IRQ2_MASK_24 0x1957 +#define CLEARWATER_IRQ2_MASK_25 0x1958 +#define CLEARWATER_IRQ2_MASK_27 0x195A +#define CLEARWATER_IRQ2_MASK_28 0x195B +#define CLEARWATER_IRQ2_MASK_30 0x195D +#define CLEARWATER_IRQ2_MASK_31 0x195E +#define CLEARWATER_IRQ2_MASK_32 0x195F +#define CLEARWATER_IRQ2_RAW_STATUS_1 0x1980 +#define CLEARWATER_IRQ2_RAW_STATUS_2 0x1981 +#define CLEARWATER_IRQ2_RAW_STATUS_6 0x1985 +#define CLEARWATER_IRQ2_RAW_STATUS_7 0x1986 +#define CLEARWATER_IRQ2_RAW_STATUS_9 0x1988 +#define CLEARWATER_IRQ2_RAW_STATUS_10 0x1989 +#define CLEARWATER_IRQ2_RAW_STATUS_11 0x198A +#define CLEARWATER_IRQ2_RAW_STATUS_12 0x198B +#define CLEARWATER_IRQ2_RAW_STATUS_13 0x198C +#define CLEARWATER_IRQ2_RAW_STATUS_14 0x198D +#define CLEARWATER_IRQ2_RAW_STATUS_15 0x198E +#define CLEARWATER_IRQ2_RAW_STATUS_17 0x1990 +#define CLEARWATER_IRQ2_RAW_STATUS_18 0x1991 +#define CLEARWATER_IRQ2_RAW_STATUS_19 0x1992 +#define CLEARWATER_IRQ2_RAW_STATUS_21 0x1994 +#define CLEARWATER_IRQ2_RAW_STATUS_22 0x1995 +#define CLEARWATER_IRQ2_RAW_STATUS_23 0x1996 +#define CLEARWATER_IRQ2_RAW_STATUS_24 0x1997 +#define CLEARWATER_IRQ2_RAW_STATUS_25 0x1998 +#define CLEARWATER_IRQ2_RAW_STATUS_30 0x199D +#define CLEARWATER_IRQ2_RAW_STATUS_31 0x199E +#define CLEARWATER_IRQ2_RAW_STATUS_32 0x199F +#define CLEARWATER_INTERRUPT_DEBOUNCE_7 0x1A06 +#define CLEARWATER_INTERRUPT_DEBOUNCE_15 0x1A0E +#define CLEARWATER_IRQ1_CTRL 0x1A80 +#define CLEARWATER_IRQ2_CTRL 0x1A82 +#define CLEARWATER_INTERRUPT_RAW_STATUS_1 0x1AA0 +#define ARIZONA_WSEQ_SEQUENCE_1 0x3000 +#define ARIZONA_WSEQ_SEQUENCE_2 0x3002 +#define ARIZONA_WSEQ_SEQUENCE_3 0x3004 +#define ARIZONA_WSEQ_SEQUENCE_4 0x3006 +#define ARIZONA_WSEQ_SEQUENCE_5 0x3008 +#define ARIZONA_WSEQ_SEQUENCE_6 0x300A +#define ARIZONA_WSEQ_SEQUENCE_7 0x300C +#define ARIZONA_WSEQ_SEQUENCE_8 0x300E +#define ARIZONA_WSEQ_SEQUENCE_9 0x3010 +#define ARIZONA_WSEQ_SEQUENCE_10 0x3012 +#define ARIZONA_WSEQ_SEQUENCE_11 0x3014 +#define ARIZONA_WSEQ_SEQUENCE_12 0x3016 +#define ARIZONA_WSEQ_SEQUENCE_13 0x3018 +#define ARIZONA_WSEQ_SEQUENCE_14 0x301A +#define ARIZONA_WSEQ_SEQUENCE_15 0x301C +#define ARIZONA_WSEQ_SEQUENCE_16 0x301E +#define ARIZONA_WSEQ_SEQUENCE_17 0x3020 +#define ARIZONA_WSEQ_SEQUENCE_18 0x3022 +#define ARIZONA_WSEQ_SEQUENCE_19 0x3024 +#define ARIZONA_WSEQ_SEQUENCE_20 0x3026 +#define ARIZONA_WSEQ_SEQUENCE_21 0x3028 +#define ARIZONA_WSEQ_SEQUENCE_22 0x302A +#define ARIZONA_WSEQ_SEQUENCE_23 0x302C +#define ARIZONA_WSEQ_SEQUENCE_24 0x302E +#define ARIZONA_WSEQ_SEQUENCE_25 0x3030 +#define ARIZONA_WSEQ_SEQUENCE_26 0x3032 +#define ARIZONA_WSEQ_SEQUENCE_27 0x3034 +#define ARIZONA_WSEQ_SEQUENCE_28 0x3036 +#define ARIZONA_WSEQ_SEQUENCE_29 0x3038 +#define ARIZONA_WSEQ_SEQUENCE_30 0x303A +#define ARIZONA_WSEQ_SEQUENCE_31 0x303C +#define ARIZONA_WSEQ_SEQUENCE_32 0x303E +#define ARIZONA_WSEQ_SEQUENCE_33 0x3040 +#define ARIZONA_WSEQ_SEQUENCE_34 0x3042 +#define ARIZONA_WSEQ_SEQUENCE_35 0x3044 +#define ARIZONA_WSEQ_SEQUENCE_36 0x3046 +#define ARIZONA_WSEQ_SEQUENCE_37 0x3048 +#define ARIZONA_WSEQ_SEQUENCE_38 0x304A +#define ARIZONA_WSEQ_SEQUENCE_39 0x304C +#define ARIZONA_WSEQ_SEQUENCE_40 0x304E +#define ARIZONA_WSEQ_SEQUENCE_41 0x3050 +#define ARIZONA_WSEQ_SEQUENCE_42 0x3052 +#define ARIZONA_WSEQ_SEQUENCE_43 0x3054 +#define ARIZONA_WSEQ_SEQUENCE_44 0x3056 +#define ARIZONA_WSEQ_SEQUENCE_45 0x3058 +#define ARIZONA_WSEQ_SEQUENCE_46 0x305A +#define ARIZONA_WSEQ_SEQUENCE_47 0x305C +#define ARIZONA_WSEQ_SEQUENCE_48 0x305E +#define ARIZONA_WSEQ_SEQUENCE_49 0x3060 +#define ARIZONA_WSEQ_SEQUENCE_50 0x3062 +#define ARIZONA_WSEQ_SEQUENCE_51 0x3064 +#define ARIZONA_WSEQ_SEQUENCE_52 0x3066 +#define ARIZONA_WSEQ_SEQUENCE_53 0x3068 +#define ARIZONA_WSEQ_SEQUENCE_54 0x306A +#define ARIZONA_WSEQ_SEQUENCE_55 0x306C +#define ARIZONA_WSEQ_SEQUENCE_56 0x306E +#define ARIZONA_WSEQ_SEQUENCE_57 0x3070 +#define ARIZONA_WSEQ_SEQUENCE_58 0x3072 +#define ARIZONA_WSEQ_SEQUENCE_59 0x3074 +#define ARIZONA_WSEQ_SEQUENCE_60 0x3076 +#define ARIZONA_WSEQ_SEQUENCE_61 0x3078 +#define ARIZONA_WSEQ_SEQUENCE_62 0x307A +#define ARIZONA_WSEQ_SEQUENCE_63 0x307C +#define ARIZONA_WSEQ_SEQUENCE_64 0x307E +#define ARIZONA_WSEQ_SEQUENCE_65 0x3080 +#define ARIZONA_WSEQ_SEQUENCE_66 0x3082 +#define ARIZONA_WSEQ_SEQUENCE_67 0x3084 +#define ARIZONA_WSEQ_SEQUENCE_68 0x3086 +#define ARIZONA_WSEQ_SEQUENCE_69 0x3088 +#define ARIZONA_WSEQ_SEQUENCE_70 0x308A +#define ARIZONA_WSEQ_SEQUENCE_71 0x308C +#define ARIZONA_WSEQ_SEQUENCE_72 0x308E +#define ARIZONA_WSEQ_SEQUENCE_73 0x3090 +#define ARIZONA_WSEQ_SEQUENCE_74 0x3092 +#define ARIZONA_WSEQ_SEQUENCE_75 0x3094 +#define ARIZONA_WSEQ_SEQUENCE_76 0x3096 +#define ARIZONA_WSEQ_SEQUENCE_77 0x3098 +#define ARIZONA_WSEQ_SEQUENCE_78 0x309A +#define ARIZONA_WSEQ_SEQUENCE_79 0x309C +#define ARIZONA_WSEQ_SEQUENCE_80 0x309E +#define ARIZONA_WSEQ_SEQUENCE_81 0x30A0 +#define ARIZONA_WSEQ_SEQUENCE_82 0x30A2 +#define ARIZONA_WSEQ_SEQUENCE_83 0x30A4 +#define ARIZONA_WSEQ_SEQUENCE_84 0x30A6 +#define ARIZONA_WSEQ_SEQUENCE_85 0x30A8 +#define ARIZONA_WSEQ_SEQUENCE_86 0x30AA +#define ARIZONA_WSEQ_SEQUENCE_87 0x30AC +#define ARIZONA_WSEQ_SEQUENCE_88 0x30AE +#define ARIZONA_WSEQ_SEQUENCE_89 0x30B0 +#define ARIZONA_WSEQ_SEQUENCE_90 0x30B2 +#define ARIZONA_WSEQ_SEQUENCE_91 0x30B4 +#define ARIZONA_WSEQ_SEQUENCE_92 0x30B6 +#define ARIZONA_WSEQ_SEQUENCE_93 0x30B8 +#define ARIZONA_WSEQ_SEQUENCE_94 0x30BA +#define ARIZONA_WSEQ_SEQUENCE_95 0x30BC +#define ARIZONA_WSEQ_SEQUENCE_96 0x30BE +#define ARIZONA_WSEQ_SEQUENCE_97 0x30C0 +#define ARIZONA_WSEQ_SEQUENCE_98 0x30C2 +#define ARIZONA_WSEQ_SEQUENCE_99 0x30C4 +#define ARIZONA_WSEQ_SEQUENCE_100 0x30C6 +#define ARIZONA_WSEQ_SEQUENCE_101 0x30C8 +#define ARIZONA_WSEQ_SEQUENCE_102 0x30CA +#define ARIZONA_WSEQ_SEQUENCE_103 0x30CC +#define ARIZONA_WSEQ_SEQUENCE_104 0x30CE +#define ARIZONA_WSEQ_SEQUENCE_105 0x30D0 +#define ARIZONA_WSEQ_SEQUENCE_106 0x30D2 +#define ARIZONA_WSEQ_SEQUENCE_107 0x30D4 +#define ARIZONA_WSEQ_SEQUENCE_108 0x30D6 +#define ARIZONA_WSEQ_SEQUENCE_109 0x30D8 +#define ARIZONA_WSEQ_SEQUENCE_110 0x30DA +#define ARIZONA_WSEQ_SEQUENCE_111 0x30DC +#define ARIZONA_WSEQ_SEQUENCE_112 0x30DE +#define ARIZONA_WSEQ_SEQUENCE_113 0x30E0 +#define ARIZONA_WSEQ_SEQUENCE_114 0x30E2 +#define ARIZONA_WSEQ_SEQUENCE_115 0x30E4 +#define ARIZONA_WSEQ_SEQUENCE_116 0x30E6 +#define ARIZONA_WSEQ_SEQUENCE_117 0x30E8 +#define ARIZONA_WSEQ_SEQUENCE_118 0x30EA +#define ARIZONA_WSEQ_SEQUENCE_119 0x30EC +#define ARIZONA_WSEQ_SEQUENCE_120 0x30EE +#define ARIZONA_WSEQ_SEQUENCE_121 0x30F0 +#define ARIZONA_WSEQ_SEQUENCE_122 0x30F2 +#define ARIZONA_WSEQ_SEQUENCE_123 0x30F4 +#define ARIZONA_WSEQ_SEQUENCE_124 0x30F6 +#define ARIZONA_WSEQ_SEQUENCE_125 0x30F8 +#define ARIZONA_WSEQ_SEQUENCE_126 0x30FA +#define ARIZONA_WSEQ_SEQUENCE_127 0x30FC +#define ARIZONA_WSEQ_SEQUENCE_128 0x30FE +#define ARIZONA_WSEQ_SEQUENCE_129 0x3100 +#define ARIZONA_WSEQ_SEQUENCE_130 0x3102 +#define ARIZONA_WSEQ_SEQUENCE_131 0x3104 +#define ARIZONA_WSEQ_SEQUENCE_132 0x3106 +#define ARIZONA_WSEQ_SEQUENCE_133 0x3108 +#define ARIZONA_WSEQ_SEQUENCE_134 0x310A +#define ARIZONA_WSEQ_SEQUENCE_135 0x310C +#define ARIZONA_WSEQ_SEQUENCE_136 0x310E +#define ARIZONA_WSEQ_SEQUENCE_137 0x3110 +#define ARIZONA_WSEQ_SEQUENCE_138 0x3112 +#define ARIZONA_WSEQ_SEQUENCE_139 0x3114 +#define ARIZONA_WSEQ_SEQUENCE_140 0x3116 +#define ARIZONA_WSEQ_SEQUENCE_141 0x3118 +#define ARIZONA_WSEQ_SEQUENCE_142 0x311A +#define ARIZONA_WSEQ_SEQUENCE_143 0x311C +#define ARIZONA_WSEQ_SEQUENCE_144 0x311E +#define ARIZONA_WSEQ_SEQUENCE_145 0x3120 +#define ARIZONA_WSEQ_SEQUENCE_146 0x3122 +#define ARIZONA_WSEQ_SEQUENCE_147 0x3124 +#define ARIZONA_WSEQ_SEQUENCE_148 0x3126 +#define ARIZONA_WSEQ_SEQUENCE_149 0x3128 +#define ARIZONA_WSEQ_SEQUENCE_150 0x312A +#define ARIZONA_WSEQ_SEQUENCE_151 0x312C +#define ARIZONA_WSEQ_SEQUENCE_152 0x312E +#define ARIZONA_WSEQ_SEQUENCE_153 0x3130 +#define ARIZONA_WSEQ_SEQUENCE_154 0x3132 +#define ARIZONA_WSEQ_SEQUENCE_155 0x3134 +#define ARIZONA_WSEQ_SEQUENCE_156 0x3136 +#define ARIZONA_WSEQ_SEQUENCE_157 0x3138 +#define ARIZONA_WSEQ_SEQUENCE_158 0x313A +#define ARIZONA_WSEQ_SEQUENCE_159 0x313C +#define ARIZONA_WSEQ_SEQUENCE_160 0x313E +#define ARIZONA_WSEQ_SEQUENCE_161 0x3140 +#define ARIZONA_WSEQ_SEQUENCE_162 0x3142 +#define ARIZONA_WSEQ_SEQUENCE_163 0x3144 +#define ARIZONA_WSEQ_SEQUENCE_164 0x3146 +#define ARIZONA_WSEQ_SEQUENCE_165 0x3148 +#define ARIZONA_WSEQ_SEQUENCE_166 0x314A +#define ARIZONA_WSEQ_SEQUENCE_167 0x314C +#define ARIZONA_WSEQ_SEQUENCE_168 0x314E +#define ARIZONA_WSEQ_SEQUENCE_169 0x3150 +#define ARIZONA_WSEQ_SEQUENCE_170 0x3152 +#define ARIZONA_WSEQ_SEQUENCE_171 0x3154 +#define ARIZONA_WSEQ_SEQUENCE_172 0x3156 +#define ARIZONA_WSEQ_SEQUENCE_173 0x3158 +#define ARIZONA_WSEQ_SEQUENCE_174 0x315A +#define ARIZONA_WSEQ_SEQUENCE_175 0x315C +#define ARIZONA_WSEQ_SEQUENCE_176 0x315E +#define ARIZONA_WSEQ_SEQUENCE_177 0x3160 +#define ARIZONA_WSEQ_SEQUENCE_178 0x3162 +#define ARIZONA_WSEQ_SEQUENCE_179 0x3164 +#define ARIZONA_WSEQ_SEQUENCE_180 0x3166 +#define ARIZONA_WSEQ_SEQUENCE_181 0x3168 +#define ARIZONA_WSEQ_SEQUENCE_182 0x316A +#define ARIZONA_WSEQ_SEQUENCE_183 0x316C +#define ARIZONA_WSEQ_SEQUENCE_184 0x316E +#define ARIZONA_WSEQ_SEQUENCE_185 0x3170 +#define ARIZONA_WSEQ_SEQUENCE_186 0x3172 +#define ARIZONA_WSEQ_SEQUENCE_187 0x3174 +#define ARIZONA_WSEQ_SEQUENCE_188 0x3176 +#define ARIZONA_WSEQ_SEQUENCE_189 0x3178 +#define ARIZONA_WSEQ_SEQUENCE_190 0x317A +#define ARIZONA_WSEQ_SEQUENCE_191 0x317C +#define ARIZONA_WSEQ_SEQUENCE_192 0x317E +#define ARIZONA_WSEQ_SEQUENCE_193 0x3180 +#define ARIZONA_WSEQ_SEQUENCE_194 0x3182 +#define ARIZONA_WSEQ_SEQUENCE_195 0x3184 +#define ARIZONA_WSEQ_SEQUENCE_196 0x3186 +#define ARIZONA_WSEQ_SEQUENCE_197 0x3188 +#define ARIZONA_WSEQ_SEQUENCE_198 0x318A +#define ARIZONA_WSEQ_SEQUENCE_199 0x318C +#define ARIZONA_WSEQ_SEQUENCE_200 0x318E +#define ARIZONA_WSEQ_SEQUENCE_201 0x3190 +#define ARIZONA_WSEQ_SEQUENCE_202 0x3192 +#define ARIZONA_WSEQ_SEQUENCE_203 0x3194 +#define ARIZONA_WSEQ_SEQUENCE_204 0x3196 +#define ARIZONA_WSEQ_SEQUENCE_205 0x3198 +#define ARIZONA_WSEQ_SEQUENCE_206 0x319A +#define ARIZONA_WSEQ_SEQUENCE_207 0x319C +#define ARIZONA_WSEQ_SEQUENCE_208 0x319E +#define ARIZONA_WSEQ_SEQUENCE_209 0x31A0 +#define ARIZONA_WSEQ_SEQUENCE_210 0x31A2 +#define ARIZONA_WSEQ_SEQUENCE_211 0x31A4 +#define ARIZONA_WSEQ_SEQUENCE_212 0x31A6 +#define ARIZONA_WSEQ_SEQUENCE_213 0x31A8 +#define ARIZONA_WSEQ_SEQUENCE_214 0x31AA +#define ARIZONA_WSEQ_SEQUENCE_215 0x31AC +#define ARIZONA_WSEQ_SEQUENCE_216 0x31AE +#define ARIZONA_WSEQ_SEQUENCE_217 0x31B0 +#define ARIZONA_WSEQ_SEQUENCE_218 0x31B2 +#define ARIZONA_WSEQ_SEQUENCE_219 0x31B4 +#define ARIZONA_WSEQ_SEQUENCE_220 0x31B6 +#define ARIZONA_WSEQ_SEQUENCE_221 0x31B8 +#define ARIZONA_WSEQ_SEQUENCE_222 0x31BA +#define ARIZONA_WSEQ_SEQUENCE_223 0x31BC +#define ARIZONA_WSEQ_SEQUENCE_224 0x31BE +#define ARIZONA_WSEQ_SEQUENCE_225 0x31C0 +#define ARIZONA_WSEQ_SEQUENCE_226 0x31C2 +#define ARIZONA_WSEQ_SEQUENCE_227 0x31C4 +#define ARIZONA_WSEQ_SEQUENCE_228 0x31C6 +#define ARIZONA_WSEQ_SEQUENCE_229 0x31C8 +#define ARIZONA_WSEQ_SEQUENCE_230 0x31CA +#define ARIZONA_WSEQ_SEQUENCE_231 0x31CC +#define ARIZONA_WSEQ_SEQUENCE_232 0x31CE +#define ARIZONA_WSEQ_SEQUENCE_233 0x31D0 +#define ARIZONA_WSEQ_SEQUENCE_234 0x31D2 +#define ARIZONA_WSEQ_SEQUENCE_235 0x31D4 +#define ARIZONA_WSEQ_SEQUENCE_236 0x31D6 +#define ARIZONA_WSEQ_SEQUENCE_237 0x31D8 +#define ARIZONA_WSEQ_SEQUENCE_238 0x31DA +#define ARIZONA_WSEQ_SEQUENCE_239 0x31DC +#define ARIZONA_WSEQ_SEQUENCE_240 0x31DE +#define ARIZONA_WSEQ_SEQUENCE_241 0x31E0 +#define ARIZONA_WSEQ_SEQUENCE_242 0x31E2 +#define ARIZONA_WSEQ_SEQUENCE_243 0x31E4 +#define ARIZONA_WSEQ_SEQUENCE_244 0x31E6 +#define ARIZONA_WSEQ_SEQUENCE_245 0x31E8 +#define ARIZONA_WSEQ_SEQUENCE_246 0x31EA +#define ARIZONA_WSEQ_SEQUENCE_247 0x31EC +#define ARIZONA_WSEQ_SEQUENCE_248 0x31EE +#define ARIZONA_WSEQ_SEQUENCE_249 0x31F0 +#define ARIZONA_WSEQ_SEQUENCE_250 0x31F2 +#define ARIZONA_WSEQ_SEQUENCE_251 0x31F4 +#define ARIZONA_WSEQ_SEQUENCE_252 0x31F6 +#define ARIZONA_WSEQ_SEQUENCE_253 0x31F8 +#define ARIZONA_WSEQ_SEQUENCE_254 0x31FA +#define ARIZONA_WSEQ_SEQUENCE_255 0x31FC +#define ARIZONA_WSEQ_SEQUENCE_256 0x31FE +#define ARIZONA_WSEQ_SEQUENCE_257 0x3200 +#define ARIZONA_WSEQ_SEQUENCE_258 0x3202 +#define ARIZONA_WSEQ_SEQUENCE_259 0x3204 +#define ARIZONA_WSEQ_SEQUENCE_260 0x3206 +#define ARIZONA_WSEQ_SEQUENCE_261 0x3208 +#define ARIZONA_WSEQ_SEQUENCE_262 0x320A +#define ARIZONA_WSEQ_SEQUENCE_263 0x320C +#define ARIZONA_WSEQ_SEQUENCE_264 0x320E +#define ARIZONA_WSEQ_SEQUENCE_265 0x3210 +#define ARIZONA_WSEQ_SEQUENCE_266 0x3212 +#define ARIZONA_WSEQ_SEQUENCE_267 0x3214 +#define ARIZONA_WSEQ_SEQUENCE_268 0x3216 +#define ARIZONA_WSEQ_SEQUENCE_269 0x3218 +#define ARIZONA_WSEQ_SEQUENCE_270 0x321A +#define ARIZONA_WSEQ_SEQUENCE_271 0x321C +#define ARIZONA_WSEQ_SEQUENCE_272 0x321E +#define ARIZONA_WSEQ_SEQUENCE_273 0x3220 +#define ARIZONA_WSEQ_SEQUENCE_274 0x3222 +#define ARIZONA_WSEQ_SEQUENCE_275 0x3224 +#define ARIZONA_WSEQ_SEQUENCE_276 0x3226 +#define ARIZONA_WSEQ_SEQUENCE_277 0x3228 +#define ARIZONA_WSEQ_SEQUENCE_278 0x322A +#define ARIZONA_WSEQ_SEQUENCE_279 0x322C +#define ARIZONA_WSEQ_SEQUENCE_280 0x322E +#define ARIZONA_WSEQ_SEQUENCE_281 0x3230 +#define ARIZONA_WSEQ_SEQUENCE_282 0x3232 +#define ARIZONA_WSEQ_SEQUENCE_283 0x3234 +#define ARIZONA_WSEQ_SEQUENCE_284 0x3236 +#define ARIZONA_WSEQ_SEQUENCE_285 0x3238 +#define ARIZONA_WSEQ_SEQUENCE_286 0x323A +#define ARIZONA_WSEQ_SEQUENCE_287 0x323C +#define ARIZONA_WSEQ_SEQUENCE_288 0x323E +#define ARIZONA_WSEQ_SEQUENCE_289 0x3240 +#define ARIZONA_WSEQ_SEQUENCE_290 0x3242 +#define ARIZONA_WSEQ_SEQUENCE_291 0x3244 +#define ARIZONA_WSEQ_SEQUENCE_292 0x3246 +#define ARIZONA_WSEQ_SEQUENCE_293 0x3248 +#define ARIZONA_WSEQ_SEQUENCE_294 0x324A +#define ARIZONA_WSEQ_SEQUENCE_295 0x324C +#define ARIZONA_WSEQ_SEQUENCE_296 0x324E +#define ARIZONA_WSEQ_SEQUENCE_297 0x3250 +#define ARIZONA_WSEQ_SEQUENCE_298 0x3252 +#define ARIZONA_WSEQ_SEQUENCE_299 0x3254 +#define ARIZONA_WSEQ_SEQUENCE_300 0x3256 +#define ARIZONA_WSEQ_SEQUENCE_301 0x3258 +#define ARIZONA_WSEQ_SEQUENCE_302 0x325A +#define ARIZONA_WSEQ_SEQUENCE_303 0x325C +#define ARIZONA_WSEQ_SEQUENCE_304 0x325E +#define ARIZONA_WSEQ_SEQUENCE_305 0x3260 +#define ARIZONA_WSEQ_SEQUENCE_306 0x3262 +#define ARIZONA_WSEQ_SEQUENCE_307 0x3264 +#define ARIZONA_WSEQ_SEQUENCE_308 0x3266 +#define ARIZONA_WSEQ_SEQUENCE_309 0x3268 +#define ARIZONA_WSEQ_SEQUENCE_310 0x326A +#define ARIZONA_WSEQ_SEQUENCE_311 0x326C +#define ARIZONA_WSEQ_SEQUENCE_312 0x326E +#define ARIZONA_WSEQ_SEQUENCE_313 0x3270 +#define ARIZONA_WSEQ_SEQUENCE_314 0x3272 +#define ARIZONA_WSEQ_SEQUENCE_315 0x3274 +#define ARIZONA_WSEQ_SEQUENCE_316 0x3276 +#define ARIZONA_WSEQ_SEQUENCE_317 0x3278 +#define ARIZONA_WSEQ_SEQUENCE_318 0x327A +#define ARIZONA_WSEQ_SEQUENCE_319 0x327C +#define ARIZONA_WSEQ_SEQUENCE_320 0x327E +#define ARIZONA_WSEQ_SEQUENCE_321 0x3280 +#define ARIZONA_WSEQ_SEQUENCE_322 0x3282 +#define ARIZONA_WSEQ_SEQUENCE_323 0x3284 +#define ARIZONA_WSEQ_SEQUENCE_324 0x3286 +#define ARIZONA_WSEQ_SEQUENCE_325 0x3288 +#define ARIZONA_WSEQ_SEQUENCE_326 0x328A +#define ARIZONA_WSEQ_SEQUENCE_327 0x328C +#define ARIZONA_WSEQ_SEQUENCE_328 0x328E +#define ARIZONA_WSEQ_SEQUENCE_329 0x3290 +#define ARIZONA_WSEQ_SEQUENCE_330 0x3292 +#define ARIZONA_WSEQ_SEQUENCE_331 0x3294 +#define ARIZONA_WSEQ_SEQUENCE_332 0x3296 +#define ARIZONA_WSEQ_SEQUENCE_333 0x3298 +#define ARIZONA_WSEQ_SEQUENCE_334 0x329A +#define ARIZONA_WSEQ_SEQUENCE_335 0x329C +#define ARIZONA_WSEQ_SEQUENCE_336 0x329E +#define ARIZONA_WSEQ_SEQUENCE_337 0x32A0 +#define ARIZONA_WSEQ_SEQUENCE_338 0x32A2 +#define ARIZONA_WSEQ_SEQUENCE_339 0x32A4 +#define ARIZONA_WSEQ_SEQUENCE_340 0x32A6 +#define ARIZONA_WSEQ_SEQUENCE_341 0x32A8 +#define ARIZONA_WSEQ_SEQUENCE_342 0x32AA +#define ARIZONA_WSEQ_SEQUENCE_343 0x32AC +#define ARIZONA_WSEQ_SEQUENCE_344 0x32AE +#define ARIZONA_WSEQ_SEQUENCE_345 0x32B0 +#define ARIZONA_WSEQ_SEQUENCE_346 0x32B2 +#define ARIZONA_WSEQ_SEQUENCE_347 0x32B4 +#define ARIZONA_WSEQ_SEQUENCE_348 0x32B6 +#define ARIZONA_WSEQ_SEQUENCE_349 0x32B8 +#define ARIZONA_WSEQ_SEQUENCE_350 0x32BA +#define ARIZONA_WSEQ_SEQUENCE_351 0x32BC +#define ARIZONA_WSEQ_SEQUENCE_352 0x32BE +#define ARIZONA_WSEQ_SEQUENCE_353 0x32C0 +#define ARIZONA_WSEQ_SEQUENCE_354 0x32C2 +#define ARIZONA_WSEQ_SEQUENCE_355 0x32C4 +#define ARIZONA_WSEQ_SEQUENCE_356 0x32C6 +#define ARIZONA_WSEQ_SEQUENCE_357 0x32C8 +#define ARIZONA_WSEQ_SEQUENCE_358 0x32CA +#define ARIZONA_WSEQ_SEQUENCE_359 0x32CC +#define ARIZONA_WSEQ_SEQUENCE_360 0x32CE +#define ARIZONA_WSEQ_SEQUENCE_361 0x32D0 +#define ARIZONA_WSEQ_SEQUENCE_362 0x32D2 +#define ARIZONA_WSEQ_SEQUENCE_363 0x32D4 +#define ARIZONA_WSEQ_SEQUENCE_364 0x32D6 +#define ARIZONA_WSEQ_SEQUENCE_365 0x32D8 +#define ARIZONA_WSEQ_SEQUENCE_366 0x32DA +#define ARIZONA_WSEQ_SEQUENCE_367 0x32DC +#define ARIZONA_WSEQ_SEQUENCE_368 0x32DE +#define ARIZONA_WSEQ_SEQUENCE_369 0x32E0 +#define ARIZONA_WSEQ_SEQUENCE_370 0x32E2 +#define ARIZONA_WSEQ_SEQUENCE_371 0x32E4 +#define ARIZONA_WSEQ_SEQUENCE_372 0x32E6 +#define ARIZONA_WSEQ_SEQUENCE_373 0x32E8 +#define ARIZONA_WSEQ_SEQUENCE_374 0x32EA +#define ARIZONA_WSEQ_SEQUENCE_375 0x32EC +#define ARIZONA_WSEQ_SEQUENCE_376 0x32EE +#define ARIZONA_WSEQ_SEQUENCE_377 0x32F0 +#define ARIZONA_WSEQ_SEQUENCE_378 0x32F2 +#define ARIZONA_WSEQ_SEQUENCE_379 0x32F4 +#define ARIZONA_WSEQ_SEQUENCE_380 0x32F6 +#define ARIZONA_WSEQ_SEQUENCE_381 0x32F8 +#define ARIZONA_WSEQ_SEQUENCE_382 0x32FA +#define ARIZONA_WSEQ_SEQUENCE_383 0x32FC +#define ARIZONA_WSEQ_SEQUENCE_384 0x32FE +#define ARIZONA_WSEQ_SEQUENCE_385 0x3300 +#define ARIZONA_WSEQ_SEQUENCE_386 0x3302 +#define ARIZONA_WSEQ_SEQUENCE_387 0x3304 +#define ARIZONA_WSEQ_SEQUENCE_388 0x3306 +#define ARIZONA_WSEQ_SEQUENCE_389 0x3308 +#define ARIZONA_WSEQ_SEQUENCE_390 0x330A +#define ARIZONA_WSEQ_SEQUENCE_391 0x330C +#define ARIZONA_WSEQ_SEQUENCE_392 0x330E +#define ARIZONA_WSEQ_SEQUENCE_393 0x3310 +#define ARIZONA_WSEQ_SEQUENCE_394 0x3312 +#define ARIZONA_WSEQ_SEQUENCE_395 0x3314 +#define ARIZONA_WSEQ_SEQUENCE_396 0x3316 +#define ARIZONA_WSEQ_SEQUENCE_397 0x3318 +#define ARIZONA_WSEQ_SEQUENCE_398 0x331A +#define ARIZONA_WSEQ_SEQUENCE_399 0x331C +#define ARIZONA_WSEQ_SEQUENCE_400 0x331E +#define ARIZONA_WSEQ_SEQUENCE_401 0x3320 +#define ARIZONA_WSEQ_SEQUENCE_402 0x3322 +#define ARIZONA_WSEQ_SEQUENCE_403 0x3324 +#define ARIZONA_WSEQ_SEQUENCE_404 0x3326 +#define ARIZONA_WSEQ_SEQUENCE_405 0x3328 +#define ARIZONA_WSEQ_SEQUENCE_406 0x332A +#define ARIZONA_WSEQ_SEQUENCE_407 0x332C +#define ARIZONA_WSEQ_SEQUENCE_408 0x332E +#define ARIZONA_WSEQ_SEQUENCE_409 0x3330 +#define ARIZONA_WSEQ_SEQUENCE_410 0x3332 +#define ARIZONA_WSEQ_SEQUENCE_411 0x3334 +#define ARIZONA_WSEQ_SEQUENCE_412 0x3336 +#define ARIZONA_WSEQ_SEQUENCE_413 0x3338 +#define ARIZONA_WSEQ_SEQUENCE_414 0x333A +#define ARIZONA_WSEQ_SEQUENCE_415 0x333C +#define ARIZONA_WSEQ_SEQUENCE_416 0x333E +#define ARIZONA_WSEQ_SEQUENCE_417 0x3340 +#define ARIZONA_WSEQ_SEQUENCE_418 0x3342 +#define ARIZONA_WSEQ_SEQUENCE_419 0x3344 +#define ARIZONA_WSEQ_SEQUENCE_420 0x3346 +#define ARIZONA_WSEQ_SEQUENCE_421 0x3348 +#define ARIZONA_WSEQ_SEQUENCE_422 0x334A +#define ARIZONA_WSEQ_SEQUENCE_423 0x334C +#define ARIZONA_WSEQ_SEQUENCE_424 0x334E +#define ARIZONA_WSEQ_SEQUENCE_425 0x3350 +#define ARIZONA_WSEQ_SEQUENCE_426 0x3352 +#define ARIZONA_WSEQ_SEQUENCE_427 0x3354 +#define ARIZONA_WSEQ_SEQUENCE_428 0x3356 +#define ARIZONA_WSEQ_SEQUENCE_429 0x3358 +#define ARIZONA_WSEQ_SEQUENCE_430 0x335A +#define ARIZONA_WSEQ_SEQUENCE_431 0x335C +#define ARIZONA_WSEQ_SEQUENCE_432 0x335E +#define ARIZONA_WSEQ_SEQUENCE_433 0x3360 +#define ARIZONA_WSEQ_SEQUENCE_434 0x3362 +#define ARIZONA_WSEQ_SEQUENCE_435 0x3364 +#define ARIZONA_WSEQ_SEQUENCE_436 0x3366 +#define ARIZONA_WSEQ_SEQUENCE_437 0x3368 +#define ARIZONA_WSEQ_SEQUENCE_438 0x336A +#define ARIZONA_WSEQ_SEQUENCE_439 0x336C +#define ARIZONA_WSEQ_SEQUENCE_440 0x336E +#define ARIZONA_WSEQ_SEQUENCE_441 0x3370 +#define ARIZONA_WSEQ_SEQUENCE_442 0x3372 +#define ARIZONA_WSEQ_SEQUENCE_443 0x3374 +#define ARIZONA_WSEQ_SEQUENCE_444 0x3376 +#define ARIZONA_WSEQ_SEQUENCE_445 0x3378 +#define ARIZONA_WSEQ_SEQUENCE_446 0x337A +#define ARIZONA_WSEQ_SEQUENCE_447 0x337C +#define ARIZONA_WSEQ_SEQUENCE_448 0x337E +#define ARIZONA_WSEQ_SEQUENCE_449 0x3380 +#define ARIZONA_WSEQ_SEQUENCE_450 0x3382 +#define ARIZONA_WSEQ_SEQUENCE_451 0x3384 +#define ARIZONA_WSEQ_SEQUENCE_452 0x3386 +#define ARIZONA_WSEQ_SEQUENCE_453 0x3388 +#define ARIZONA_WSEQ_SEQUENCE_454 0x338A +#define ARIZONA_WSEQ_SEQUENCE_455 0x338C +#define ARIZONA_WSEQ_SEQUENCE_456 0x338E +#define ARIZONA_WSEQ_SEQUENCE_457 0x3390 +#define ARIZONA_WSEQ_SEQUENCE_458 0x3392 +#define ARIZONA_WSEQ_SEQUENCE_459 0x3394 +#define ARIZONA_WSEQ_SEQUENCE_460 0x3396 +#define ARIZONA_WSEQ_SEQUENCE_461 0x3398 +#define ARIZONA_WSEQ_SEQUENCE_462 0x339A +#define ARIZONA_WSEQ_SEQUENCE_463 0x339C +#define ARIZONA_WSEQ_SEQUENCE_464 0x339E +#define ARIZONA_WSEQ_SEQUENCE_465 0x33A0 +#define ARIZONA_WSEQ_SEQUENCE_466 0x33A2 +#define ARIZONA_WSEQ_SEQUENCE_467 0x33A4 +#define ARIZONA_WSEQ_SEQUENCE_468 0x33A6 +#define ARIZONA_WSEQ_SEQUENCE_469 0x33A8 +#define ARIZONA_WSEQ_SEQUENCE_470 0x33AA +#define ARIZONA_WSEQ_SEQUENCE_471 0x33AC +#define ARIZONA_WSEQ_SEQUENCE_472 0x33AE +#define ARIZONA_WSEQ_SEQUENCE_473 0x33B0 +#define ARIZONA_WSEQ_SEQUENCE_474 0x33B2 +#define ARIZONA_WSEQ_SEQUENCE_475 0x33B4 +#define ARIZONA_WSEQ_SEQUENCE_476 0x33B6 +#define ARIZONA_WSEQ_SEQUENCE_477 0x33B8 +#define ARIZONA_WSEQ_SEQUENCE_478 0x33BA +#define ARIZONA_WSEQ_SEQUENCE_479 0x33BC +#define ARIZONA_WSEQ_SEQUENCE_480 0x33BE +#define ARIZONA_WSEQ_SEQUENCE_481 0x33C0 +#define ARIZONA_WSEQ_SEQUENCE_482 0x33C2 +#define ARIZONA_WSEQ_SEQUENCE_483 0x33C4 +#define ARIZONA_WSEQ_SEQUENCE_484 0x33C6 +#define ARIZONA_WSEQ_SEQUENCE_485 0x33C8 +#define ARIZONA_WSEQ_SEQUENCE_486 0x33CA +#define ARIZONA_WSEQ_SEQUENCE_487 0x33CC +#define ARIZONA_WSEQ_SEQUENCE_488 0x33CE +#define ARIZONA_WSEQ_SEQUENCE_489 0x33D0 +#define ARIZONA_WSEQ_SEQUENCE_490 0x33D2 +#define ARIZONA_WSEQ_SEQUENCE_491 0x33D4 +#define ARIZONA_WSEQ_SEQUENCE_492 0x33D6 +#define ARIZONA_WSEQ_SEQUENCE_493 0x33D8 +#define ARIZONA_WSEQ_SEQUENCE_494 0x33DA +#define ARIZONA_WSEQ_SEQUENCE_495 0x33DC +#define ARIZONA_WSEQ_SEQUENCE_496 0x33DE +#define ARIZONA_WSEQ_SEQUENCE_497 0x33E0 +#define ARIZONA_WSEQ_SEQUENCE_498 0x33E2 +#define ARIZONA_WSEQ_SEQUENCE_499 0x33E4 +#define ARIZONA_WSEQ_SEQUENCE_500 0x33E6 +#define ARIZONA_WSEQ_SEQUENCE_501 0x33E8 +#define ARIZONA_WSEQ_SEQUENCE_502 0x33EA +#define ARIZONA_WSEQ_SEQUENCE_503 0x33EC +#define ARIZONA_WSEQ_SEQUENCE_504 0x33EE +#define ARIZONA_WSEQ_SEQUENCE_505 0x33F0 +#define ARIZONA_WSEQ_SEQUENCE_506 0x33F2 +#define ARIZONA_WSEQ_SEQUENCE_507 0x33F4 +#define ARIZONA_WSEQ_SEQUENCE_508 0x33F6 +#define MARLEY_OTP_HPDET_CALIB_1 0x31F8 +#define MARLEY_OTP_HPDET_CALIB_2 0x31FA +#define CLEARWATER_OTP_HPDET_CALIB_1 0x33F8 +#define CLEARWATER_OTP_HPDET_CALIB_2 0x33FA +#define CLEARWATER_DSP1_CONFIG 0x0FFE00 +#define CLEARWATER_DSP1_STATUS_1 0x0FFE04 +#define CLEARWATER_DSP1_STATUS_2 0x0FFE05 +#define CLEARWATER_DSP1_WDMA_CONFIG_1 0x0FFE30 +#define CLEARWATER_DSP1_WDMA_CONFIG_2 0x0FFE31 +#define CLEARWATER_DSP1_RDMA_CONFIG_1 0x0FFE34 +#define CLEARWATER_DSP1_SCRATCH_0 0x0FFE40 +#define CLEARWATER_DSP1_SCRATCH_1 0x0FFE41 +#define CLEARWATER_DSP1_SCRATCH_2 0x0FFE42 +#define CLEARWATER_DSP1_SCRATCH_3 0x0FFE43 +#define CLEARWATER_DSP2_CONFIG 0x17FE00 +#define CLEARWATER_DSP2_STATUS_1 0x17FE04 +#define CLEARWATER_DSP2_STATUS_2 0x17FE05 +#define CLEARWATER_DSP2_WDMA_CONFIG_1 0x17FE30 +#define CLEARWATER_DSP2_WDMA_CONFIG_2 0x17FE31 +#define CLEARWATER_DSP2_RDMA_CONFIG_1 0x17FE34 +#define CLEARWATER_DSP2_SCRATCH_0 0x17FE40 +#define CLEARWATER_DSP2_SCRATCH_1 0x17FE41 +#define CLEARWATER_DSP2_SCRATCH_2 0x17FE42 +#define CLEARWATER_DSP2_SCRATCH_3 0x17FE43 +#define CLEARWATER_DSP3_CONFIG 0x1FFE00 +#define CLEARWATER_DSP3_STATUS_1 0x1FFE04 +#define CLEARWATER_DSP3_STATUS_2 0x1FFE05 +#define CLEARWATER_DSP3_WDMA_CONFIG_1 0x1FFE30 +#define CLEARWATER_DSP3_WDMA_CONFIG_2 0x1FFE31 +#define CLEARWATER_DSP3_RDMA_CONFIG_1 0x1FFE34 +#define CLEARWATER_DSP3_SCRATCH_0 0x1FFE40 +#define CLEARWATER_DSP3_SCRATCH_1 0x1FFE41 +#define CLEARWATER_DSP3_SCRATCH_2 0x1FFE42 +#define CLEARWATER_DSP3_SCRATCH_3 0x1FFE43 +#define CLEARWATER_DSP4_CONFIG 0x27FE00 +#define CLEARWATER_DSP4_STATUS_1 0x27FE04 +#define CLEARWATER_DSP4_STATUS_2 0x27FE05 +#define CLEARWATER_DSP4_WDMA_CONFIG_1 0x27FE30 +#define CLEARWATER_DSP4_WDMA_CONFIG_2 0x27FE31 +#define CLEARWATER_DSP4_RDMA_CONFIG_1 0x27FE34 +#define CLEARWATER_DSP4_SCRATCH_0 0x27FE40 +#define CLEARWATER_DSP4_SCRATCH_1 0x27FE41 +#define CLEARWATER_DSP4_SCRATCH_2 0x27FE42 +#define CLEARWATER_DSP4_SCRATCH_3 0x27FE43 +#define CLEARWATER_DSP5_CONFIG 0x2FFE00 +#define CLEARWATER_DSP5_STATUS_1 0x2FFE04 +#define CLEARWATER_DSP5_STATUS_2 0x2FFE05 +#define CLEARWATER_DSP5_WDMA_CONFIG_1 0x2FFE30 +#define CLEARWATER_DSP5_WDMA_CONFIG_2 0x2FFE31 +#define CLEARWATER_DSP5_RDMA_CONFIG_1 0x2FFE34 +#define CLEARWATER_DSP5_SCRATCH_0 0x2FFE40 +#define CLEARWATER_DSP5_SCRATCH_1 0x2FFE41 +#define CLEARWATER_DSP5_SCRATCH_2 0x2FFE42 +#define CLEARWATER_DSP5_SCRATCH_3 0x2FFE43 +#define CLEARWATER_DSP6_CONFIG 0x37FE00 +#define CLEARWATER_DSP6_STATUS_1 0x37FE04 +#define CLEARWATER_DSP6_STATUS_2 0x37FE05 +#define CLEARWATER_DSP6_WDMA_CONFIG_1 0x37FE30 +#define CLEARWATER_DSP6_WDMA_CONFIG_2 0x37FE31 +#define CLEARWATER_DSP6_RDMA_CONFIG_1 0x37FE34 +#define CLEARWATER_DSP6_SCRATCH_0 0x37FE40 +#define CLEARWATER_DSP6_SCRATCH_1 0x37FE41 +#define CLEARWATER_DSP6_SCRATCH_2 0x37FE42 +#define CLEARWATER_DSP6_SCRATCH_3 0x37FE43 +#define CLEARWATER_DSP7_CONFIG 0x3FFE00 +#define CLEARWATER_DSP7_STATUS_1 0x3FFE04 +#define CLEARWATER_DSP7_STATUS_2 0x3FFE05 +#define CLEARWATER_DSP7_WDMA_CONFIG_1 0x3FFE30 +#define CLEARWATER_DSP7_WDMA_CONFIG_2 0x3FFE31 +#define CLEARWATER_DSP7_RDMA_CONFIG_1 0x3FFE34 +#define CLEARWATER_DSP7_SCRATCH_0 0x3FFE40 +#define CLEARWATER_DSP7_SCRATCH_1 0x3FFE41 +#define CLEARWATER_DSP7_SCRATCH_2 0x3FFE42 +#define CLEARWATER_DSP7_SCRATCH_3 0x3FFE43 /* * Field Definitions. @@ -2843,25 +2843,25 @@ /* * R109 (0x120) - DSP_Clock_1 */ -#define CLEARWATER_DSP_CLK_FREQ_LEGACY 0x0700 /* DSP_CLK_FREQ_LEGACY - [10:8] */ -#define CLEARWATER_DSP_CLK_FREQ_LEGACY_MASK 0x0700 /* DSP_CLK_FREQ_LEGACY - [10:8] */ -#define CLEARWATER_DSP_CLK_FREQ_LEGACY_SHIFT 8 /* DSP_CLK_FREQ_LEGACY - [10:8] */ -#define CLEARWATER_DSP_CLK_FREQ_LEGACY_WIDTH 3 /* DSP_CLK_FREQ_LEGACY - [10:8] */ -#define CLEARWATER_DSP_CLK_ENA 0x0040 /* DSP_CLK_ENA */ -#define CLEARWATER_DSP_CLK_ENA_MASK 0x0040 /* DSP_CLK_ENA */ -#define CLEARWATER_DSP_CLK_ENA_SHIFT 6 /* DSP_CLK_ENA */ -#define CLEARWATER_DSP_CLK_ENA_WIDTH 1 /* DSP_CLK_ENA */ -#define CLEARWATER_DSP_CLK_SRC 0x000F /* DSP_CLK_SRC - [3:0] */ -#define CLEARWATER_DSP_CLK_SRC_MASK 0x000F /* DSP_CLK_SRC - [3:0] */ -#define CLEARWATER_DSP_CLK_SRC_SHIFT 0 /* DSP_CLK_SRC - [3:0] */ -#define CLEARWATER_DSP_CLK_SRC_WIDTH 4 /* DSP_CLK_SRC - [3:0] */ +#define CLEARWATER_DSP_CLK_FREQ_LEGACY 0x0700 /* DSP_CLK_FREQ_LEGACY - [10:8] */ +#define CLEARWATER_DSP_CLK_FREQ_LEGACY_MASK 0x0700 /* DSP_CLK_FREQ_LEGACY - [10:8] */ +#define CLEARWATER_DSP_CLK_FREQ_LEGACY_SHIFT 8 /* DSP_CLK_FREQ_LEGACY - [10:8] */ +#define CLEARWATER_DSP_CLK_FREQ_LEGACY_WIDTH 3 /* DSP_CLK_FREQ_LEGACY - [10:8] */ +#define CLEARWATER_DSP_CLK_ENA 0x0040 /* DSP_CLK_ENA */ +#define CLEARWATER_DSP_CLK_ENA_MASK 0x0040 /* DSP_CLK_ENA */ +#define CLEARWATER_DSP_CLK_ENA_SHIFT 6 /* DSP_CLK_ENA */ +#define CLEARWATER_DSP_CLK_ENA_WIDTH 1 /* DSP_CLK_ENA */ +#define CLEARWATER_DSP_CLK_SRC 0x000F /* DSP_CLK_SRC - [3:0] */ +#define CLEARWATER_DSP_CLK_SRC_MASK 0x000F /* DSP_CLK_SRC - [3:0] */ +#define CLEARWATER_DSP_CLK_SRC_SHIFT 0 /* DSP_CLK_SRC - [3:0] */ +#define CLEARWATER_DSP_CLK_SRC_WIDTH 4 /* DSP_CLK_SRC - [3:0] */ /* * R110 (0x122) - DSP_Clock_2 */ -#define CLEARWATER_DSP_CLK_FREQ_MASK 0x03FF /* DSP_CLK_FREQ - [9:0] */ -#define CLEARWATER_DSP_CLK_FREQ_SHIFT 0 /* DSP_CLK_FREQ - [9:0] */ -#define CLEARWATER_DSP_CLK_FREQ_WIDTH 10 /* DSP_CLK_FREQ - [9:0] */ +#define CLEARWATER_DSP_CLK_FREQ_MASK 0x03FF /* DSP_CLK_FREQ - [9:0] */ +#define CLEARWATER_DSP_CLK_FREQ_SHIFT 0 /* DSP_CLK_FREQ - [9:0] */ +#define CLEARWATER_DSP_CLK_FREQ_WIDTH 10 /* DSP_CLK_FREQ - [9:0] */ /* * R329 (0x149) - Output system clock @@ -3741,9 +3741,9 @@ #define ARIZONA_HP_IDAC_STEER_MASK 0x0004 /* HP_IDAC_STEER */ #define ARIZONA_HP_IDAC_STEER_SHIFT 2 /* HP_IDAC_STEER */ #define ARIZONA_HP_IDAC_STEER_WIDTH 1 /* HP_IDAC_STEER */ -#define CLEARWATER_HP_RATE_MASK 0x0006 /* HP_RATE - [2:1] */ -#define CLEARWATER_HP_RATE_SHIFT 1 /* HP_RATE - [2:1] */ -#define CLEARWATER_HP_RATE_WIDTH 2 /* HP_RATE - [2:1] */ +#define CLEARWATER_HP_RATE_MASK 0x0006 /* HP_RATE - [2:1] */ +#define CLEARWATER_HP_RATE_SHIFT 1 /* HP_RATE - [2:1] */ +#define CLEARWATER_HP_RATE_WIDTH 2 /* HP_RATE - [2:1] */ #define VEGAS_HP_RATE_MASK 0x0006 /* HP_RATE - [2:1] */ #define VEGAS_HP_RATE_SHIFT 1 /* HP_RATE - [2:1] */ #define VEGAS_HP_RATE_WIDTH 2 /* HP_RATE - [2:1] */ @@ -3766,7 +3766,6 @@ #define ARIZONA_HP_LVL_MASK 0x007F /* HP_LVL - [6:0] */ #define ARIZONA_HP_LVL_SHIFT 0 /* HP_LVL - [6:0] */ #define ARIZONA_HP_LVL_WIDTH 7 /* HP_LVL - [6:0] */ - #define ARIZONA_HP_DONE_B 0x8000 /* HP_DONE */ #define ARIZONA_HP_DONE_B_MASK 0x8000 /* HP_DONE */ #define ARIZONA_HP_DONE_B_SHIFT 15 /* HP_DONE */ @@ -3872,10 +3871,10 @@ /* * R710 (0x2C6) - Micd Clamp control */ -#define CLEARWATER_MICD_CLAMP_OVD_MASK 0x0010 /* MICD_CLAMP_OVD */ -#define CLEARWATER_MICD_CLAMP_OVD_SHIFT 4 /* MICD_CLAMP_OVD */ -#define CLEARWATER_MICD_CLAMP_OVD_WIDTH 1 /* MICD_CLAMP_OVD */ -#define CLEARWATER_MICD_CLAMP_OVD 0x10 /* MICD_CLAMP_OVD */ +#define CLEARWATER_MICD_CLAMP_OVD_MASK 0x0010 /* MICD_CLAMP_OVD */ +#define CLEARWATER_MICD_CLAMP_OVD_SHIFT 4 /* MICD_CLAMP_OVD */ +#define CLEARWATER_MICD_CLAMP_OVD_WIDTH 1 /* MICD_CLAMP_OVD */ +#define CLEARWATER_MICD_CLAMP_OVD 0x0010 /* MICD_CLAMP_OVD */ /* * R715 (0x2CB) - Isolation control @@ -4022,9 +4021,9 @@ #define ARIZONA_IN1_DMICL_DLY_MASK 0x003F /* IN1_DMICL_DLY - [5:0] */ #define ARIZONA_IN1_DMICL_DLY_SHIFT 0 /* IN1_DMICL_DLY - [5:0] */ #define ARIZONA_IN1_DMICL_DLY_WIDTH 6 /* IN1_DMICL_DLY - [5:0] */ -#define CLEARWATER_IN1_OSR_MASK 0x0700 /* IN1_OSR - [8:10] */ -#define CLEARWATER_IN1_OSR_SHIFT 8 /* IN1_OSR - [8:10] */ -#define CLEARWATER_IN1_OSR_WIDTH 3 /* IN1_OSR - [8:10] */ +#define CLEARWATER_IN1_OSR_MASK 0x0700 /* IN1_OSR - [8:10] */ +#define CLEARWATER_IN1_OSR_SHIFT 8 /* IN1_OSR - [8:10] */ +#define CLEARWATER_IN1_OSR_WIDTH 3 /* IN1_OSR - [8:10] */ /* * R788 (0x314) - IN1R Control @@ -4113,9 +4112,9 @@ #define ARIZONA_IN2_DMICL_DLY_MASK 0x003F /* IN2_DMICL_DLY - [5:0] */ #define ARIZONA_IN2_DMICL_DLY_SHIFT 0 /* IN2_DMICL_DLY - [5:0] */ #define ARIZONA_IN2_DMICL_DLY_WIDTH 6 /* IN2_DMICL_DLY - [5:0] */ -#define CLEARWATER_IN2_OSR_MASK 0x0700 /* IN2_OSR - [8:10] */ -#define CLEARWATER_IN2_OSR_SHIFT 8 /* IN2_OSR - [8:10] */ -#define CLEARWATER_IN2_OSR_WIDTH 3 /* IN2_OSR - [8:10] */ +#define CLEARWATER_IN2_OSR_MASK 0x0700 /* IN2_OSR - [8:10] */ +#define CLEARWATER_IN2_OSR_SHIFT 8 /* IN2_OSR - [8:10] */ +#define CLEARWATER_IN2_OSR_WIDTH 3 /* IN2_OSR - [8:10] */ /* * R796 (0x31C) - IN2R Control @@ -4198,9 +4197,9 @@ #define ARIZONA_IN3_DMICL_DLY_MASK 0x003F /* IN3_DMICL_DLY - [5:0] */ #define ARIZONA_IN3_DMICL_DLY_SHIFT 0 /* IN3_DMICL_DLY - [5:0] */ #define ARIZONA_IN3_DMICL_DLY_WIDTH 6 /* IN3_DMICL_DLY - [5:0] */ -#define CLEARWATER_IN3_OSR_MASK 0x0700 /* IN3_OSR - [8:10] */ -#define CLEARWATER_IN3_OSR_SHIFT 8 /* IN3_OSR - [8:10] */ -#define CLEARWATER_IN3_OSR_WIDTH 3 /* IN3_OSR - [8:10] */ +#define CLEARWATER_IN3_OSR_MASK 0x0700 /* IN3_OSR - [8:10] */ +#define CLEARWATER_IN3_OSR_SHIFT 8 /* IN3_OSR - [8:10] */ +#define CLEARWATER_IN3_OSR_WIDTH 3 /* IN3_OSR - [8:10] */ /* * R804 (0x324) - IN3R Control @@ -4268,9 +4267,9 @@ #define ARIZONA_IN4L_DMIC_DLY_MASK 0x003F /* IN4L_DMIC_DLY - [5:0] */ #define ARIZONA_IN4L_DMIC_DLY_SHIFT 0 /* IN4L_DMIC_DLY - [5:0] */ #define ARIZONA_IN4L_DMIC_DLY_WIDTH 6 /* IN4L_DMIC_DLY - [5:0] */ -#define CLEARWATER_IN4_OSR_MASK 0x0700 /* IN4_OSR - [8:10] */ -#define CLEARWATER_IN4_OSR_SHIFT 8 /* IN4_OSR - [8:10] */ -#define CLEARWATER_IN4_OSR_WIDTH 3 /* IN4_OSR - [8:10] */ +#define CLEARWATER_IN4_OSR_MASK 0x0700 /* IN4_OSR - [8:10] */ +#define CLEARWATER_IN4_OSR_SHIFT 8 /* IN4_OSR - [8:10] */ +#define CLEARWATER_IN4_OSR_WIDTH 3 /* IN4_OSR - [8:10] */ /* * R812 (0x32C) - IN4R Control @@ -4335,9 +4334,9 @@ #define ARIZONA_IN5L_DMIC_DLY_MASK 0x003F /* IN5L_DMIC_DLY - [5:0] */ #define ARIZONA_IN5L_DMIC_DLY_SHIFT 0 /* IN5L_DMIC_DLY - [5:0] */ #define ARIZONA_IN5L_DMIC_DLY_WIDTH 6 /* IN5L_DMIC_DLY - [5:0] */ -#define CLEARWATER_IN5_OSR_MASK 0x0700 /* IN5_OSR - [8:10] */ -#define CLEARWATER_IN5_OSR_SHIFT 8 /* IN5_OSR - [8:10] */ -#define CLEARWATER_IN5_OSR_WIDTH 3 /* IN5_OSR - [8:10] */ +#define CLEARWATER_IN5_OSR_MASK 0x0700 /* IN5_OSR - [8:10] */ +#define CLEARWATER_IN5_OSR_SHIFT 8 /* IN5_OSR - [8:10] */ +#define CLEARWATER_IN5_OSR_WIDTH 3 /* IN5_OSR - [8:10] */ /* * R820 (0x334) - IN5R Control @@ -4402,9 +4401,9 @@ #define ARIZONA_IN6L_DMIC_DLY_MASK 0x003F /* IN6L_DMIC_DLY - [5:0] */ #define ARIZONA_IN6L_DMIC_DLY_SHIFT 0 /* IN6L_DMIC_DLY - [5:0] */ #define ARIZONA_IN6L_DMIC_DLY_WIDTH 6 /* IN6L_DMIC_DLY - [5:0] */ -#define CLEARWATER_IN6_OSR_MASK 0x0700 /* IN6_OSR - [8:10] */ -#define CLEARWATER_IN6_OSR_SHIFT 8 /* IN6_OSR - [8:10] */ -#define CLEARWATER_IN6_OSR_WIDTH 3 /* IN6_OSR - [8:10] */ +#define CLEARWATER_IN6_OSR_MASK 0x0700 /* IN6_OSR - [8:10] */ +#define CLEARWATER_IN6_OSR_SHIFT 8 /* IN6_OSR - [8:10] */ +#define CLEARWATER_IN6_OSR_WIDTH 3 /* IN6_OSR - [8:10] */ /* * R828 (0x33C) - IN6R Control @@ -5154,54 +5153,54 @@ /* R486 (0x448) - EDRE_Enable */ -#define CLEARWATER_EDRE_OUT4L_THR3_ENA 0x0800 /* EDRE_OUT4L_THR3_ENA */ -#define CLEARWATER_EDRE_OUT4L_THR3_ENA_MASK 0x0800 /* EDRE_OUT4L_THR3_ENA */ -#define CLEARWATER_EDRE_OUT4L_THR3_ENA_SHIFT 11 /* EDRE_OUT4L_THR3_ENA */ -#define CLEARWATER_EDRE_OUT4L_THR3_ENA_WIDTH 1 /* EDRE_OUT4L_THR3_ENA */ -#define CLEARWATER_EDRE_OUT4R_THR3_ENA 0x0400 /* EDRE_OUT4R_THR3_ENA */ -#define CLEARWATER_EDRE_OUT4R_THR3_ENA_MASK 0x0400 /* EDRE_OUT4R_THR3_ENA */ -#define CLEARWATER_EDRE_OUT4R_THR3_ENA_SHIFT 10 /* EDRE_OUT4R_THR3_ENA */ -#define CLEARWATER_EDRE_OUT4R_THR3_ENA_WIDTH 1 /* EDRE_OUT4R_THR3_ENA */ -#define CLEARWATER_EDRE_OUT4L_THR2_ENA 0x0200 /* EDRE_OUT4L_THR2_ENA */ -#define CLEARWATER_EDRE_OUT4L_THR2_ENA_MASK 0x0200 /* EDRE_OUT4L_THR2_ENA */ -#define CLEARWATER_EDRE_OUT4L_THR2_ENA_SHIFT 9 /* EDRE_OUT4L_THR2_ENA */ -#define CLEARWATER_EDRE_OUT4L_THR2_ENA_WIDTH 1 /* EDRE_OUT4L_THR2_ENA */ -#define CLEARWATER_EDRE_OUT4R_THR2_ENA 0x0100 /* EDRE_OUT4R_THR2_ENA */ -#define CLEARWATER_EDRE_OUT4R_THR2_ENA_MASK 0x0100 /* EDRE_OUT4R_THR2_ENA */ -#define CLEARWATER_EDRE_OUT4R_THR2_ENA_SHIFT 8 /* EDRE_OUT4R_THR2_ENA */ -#define CLEARWATER_EDRE_OUT4R_THR2_ENA_WIDTH 1 /* EDRE_OUT4R_THR2_ENA */ -#define CLEARWATER_EDRE_OUT4L_THR1_ENA 0x0080 /* EDRE_OUT4L_THR1_ENA */ -#define CLEARWATER_EDRE_OUT4L_THR1_ENA_MASK 0x0080 /* EDRE_OUT4L_THR1_ENA */ -#define CLEARWATER_EDRE_OUT4L_THR1_ENA_SHIFT 7 /* EDRE_OUT4L_THR1_ENA */ -#define CLEARWATER_EDRE_OUT4L_THR1_ENA_WIDTH 1 /* EDRE_OUT4L_THR1_ENA */ -#define CLEARWATER_EDRE_OUT4R_THR1_ENA 0x0040 /* EDRE_OUT4R_THR1_ENA */ -#define CLEARWATER_EDRE_OUT4R_THR1_ENA_MASK 0x0040 /* EDRE_OUT4R_THR1_ENA */ -#define CLEARWATER_EDRE_OUT4R_THR1_ENA_SHIFT 6 /* EDRE_OUT4R_THR1_ENA */ -#define CLEARWATER_EDRE_OUT4R_THR1_ENA_WIDTH 1 /* EDRE_OUT4R_THR1_ENA */ -#define CLEARWATER_EDRE_OUT3L_THR1_ENA 0x0020 /* EDRE_OUT3L_THR1_ENA */ -#define CLEARWATER_EDRE_OUT3L_THR1_ENA_MASK 0x0020 /* EDRE_OUT3L_THR1_ENA */ -#define CLEARWATER_EDRE_OUT3L_THR1_ENA_SHIFT 5 /* EDRE_OUT3L_THR1_ENA */ -#define CLEARWATER_EDRE_OUT3L_THR1_ENA_WIDTH 1 /* EDRE_OUT3L_THR1_ENA */ -#define CLEARWATER_EDRE_OUT3R_THR1_ENA 0x0010 /* EDRE_OUT3R_THR1_ENA */ -#define CLEARWATER_EDRE_OUT3R_THR1_ENA_MASK 0x0010 /* EDRE_OUT3R_THR1_ENA */ -#define CLEARWATER_EDRE_OUT3R_THR1_ENA_SHIFT 4 /* EDRE_OUT3R_THR1_ENA */ -#define CLEARWATER_EDRE_OUT3R_THR1_ENA_WIDTH 1 /* EDRE_OUT3R_THR1_ENA */ -#define CLEARWATER_EDRE_OUT2L_THR1_ENA 0x0008 /* EDRE_OUT2L_THR1_ENA */ -#define CLEARWATER_EDRE_OUT2L_THR1_ENA_MASK 0x0008 /* EDRE_OUT2L_THR1_ENA */ -#define CLEARWATER_EDRE_OUT2L_THR1_ENA_SHIFT 3 /* EDRE_OUT2L_THR1_ENA */ -#define CLEARWATER_EDRE_OUT2L_THR1_ENA_WIDTH 1 /* EDRE_OUT2L_THR1_ENA */ -#define CLEARWATER_EDRE_OUT2R_THR1_ENA 0x0004 /* EDRE_OUT2R_THR1_ENA */ -#define CLEARWATER_EDRE_OUT2R_THR1_ENA_MASK 0x0004 /* EDRE_OUT2R_THR1_ENA */ -#define CLEARWATER_EDRE_OUT2R_THR1_ENA_SHIFT 2 /* EDRE_OUT2R_THR1_ENA */ -#define CLEARWATER_EDRE_OUT2R_THR1_ENA_WIDTH 1 /* EDRE_OUT2R_THR1_ENA */ -#define CLEARWATER_EDRE_OUT1L_THR1_ENA 0x0002 /* EDRE_OUT1L_THR1_ENA */ -#define CLEARWATER_EDRE_OUT1L_THR1_ENA_MASK 0x0002 /* EDRE_OUT1L_THR1_ENA */ -#define CLEARWATER_EDRE_OUT1L_THR1_ENA_SHIFT 1 /* EDRE_OUT1L_THR1_ENA */ -#define CLEARWATER_EDRE_OUT1L_THR1_ENA_WIDTH 1 /* EDRE_OUT1L_THR1_ENA */ -#define CLEARWATER_EDRE_OUT1R_THR1_ENA 0x0001 /* EDRE_OUT1R_THR1_ENA */ -#define CLEARWATER_EDRE_OUT1R_THR1_ENA_MASK 0x0001 /* EDRE_OUT1R_THR1_ENA */ -#define CLEARWATER_EDRE_OUT1R_THR1_ENA_SHIFT 0 /* EDRE_OUT1R_THR1_ENA */ -#define CLEARWATER_EDRE_OUT1R_THR1_ENA_WIDTH 1 /* EDRE_OUT1R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR3_ENA 0x0800 /* EDRE_OUT4L_THR3_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR3_ENA_MASK 0x0800 /* EDRE_OUT4L_THR3_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR3_ENA_SHIFT 11 /* EDRE_OUT4L_THR3_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR3_ENA_WIDTH 1 /* EDRE_OUT4L_THR3_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR3_ENA 0x0400 /* EDRE_OUT4R_THR3_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR3_ENA_MASK 0x0400 /* EDRE_OUT4R_THR3_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR3_ENA_SHIFT 10 /* EDRE_OUT4R_THR3_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR3_ENA_WIDTH 1 /* EDRE_OUT4R_THR3_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR2_ENA 0x0200 /* EDRE_OUT4L_THR2_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR2_ENA_MASK 0x0200 /* EDRE_OUT4L_THR2_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR2_ENA_SHIFT 9 /* EDRE_OUT4L_THR2_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR2_ENA_WIDTH 1 /* EDRE_OUT4L_THR2_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR2_ENA 0x0100 /* EDRE_OUT4R_THR2_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR2_ENA_MASK 0x0100 /* EDRE_OUT4R_THR2_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR2_ENA_SHIFT 8 /* EDRE_OUT4R_THR2_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR2_ENA_WIDTH 1 /* EDRE_OUT4R_THR2_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR1_ENA 0x0080 /* EDRE_OUT4L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR1_ENA_MASK 0x0080 /* EDRE_OUT4L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR1_ENA_SHIFT 7 /* EDRE_OUT4L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT4L_THR1_ENA_WIDTH 1 /* EDRE_OUT4L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR1_ENA 0x0040 /* EDRE_OUT4R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR1_ENA_MASK 0x0040 /* EDRE_OUT4R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR1_ENA_SHIFT 6 /* EDRE_OUT4R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT4R_THR1_ENA_WIDTH 1 /* EDRE_OUT4R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT3L_THR1_ENA 0x0020 /* EDRE_OUT3L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT3L_THR1_ENA_MASK 0x0020 /* EDRE_OUT3L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT3L_THR1_ENA_SHIFT 5 /* EDRE_OUT3L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT3L_THR1_ENA_WIDTH 1 /* EDRE_OUT3L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT3R_THR1_ENA 0x0010 /* EDRE_OUT3R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT3R_THR1_ENA_MASK 0x0010 /* EDRE_OUT3R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT3R_THR1_ENA_SHIFT 4 /* EDRE_OUT3R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT3R_THR1_ENA_WIDTH 1 /* EDRE_OUT3R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT2L_THR1_ENA 0x0008 /* EDRE_OUT2L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT2L_THR1_ENA_MASK 0x0008 /* EDRE_OUT2L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT2L_THR1_ENA_SHIFT 3 /* EDRE_OUT2L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT2L_THR1_ENA_WIDTH 1 /* EDRE_OUT2L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT2R_THR1_ENA 0x0004 /* EDRE_OUT2R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT2R_THR1_ENA_MASK 0x0004 /* EDRE_OUT2R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT2R_THR1_ENA_SHIFT 2 /* EDRE_OUT2R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT2R_THR1_ENA_WIDTH 1 /* EDRE_OUT2R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT1L_THR1_ENA 0x0002 /* EDRE_OUT1L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT1L_THR1_ENA_MASK 0x0002 /* EDRE_OUT1L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT1L_THR1_ENA_SHIFT 1 /* EDRE_OUT1L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT1L_THR1_ENA_WIDTH 1 /* EDRE_OUT1L_THR1_ENA */ +#define CLEARWATER_EDRE_OUT1R_THR1_ENA 0x0001 /* EDRE_OUT1R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT1R_THR1_ENA_MASK 0x0001 /* EDRE_OUT1R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT1R_THR1_ENA_SHIFT 0 /* EDRE_OUT1R_THR1_ENA */ +#define CLEARWATER_EDRE_OUT1R_THR1_ENA_WIDTH 1 /* EDRE_OUT1R_THR1_ENA */ /* * R1104 (0x450) - DAC AEC Control 1 @@ -5320,90 +5319,90 @@ /* * R539 (0x4A8) - HP_Test_Ctrl_5 */ -#define ARIZONA_HP1L_TST_CINT 0x4000 /* HP1L_TST_CINT */ -#define ARIZONA_HP1L_TST_CINT_MASK 0x4000 /* HP1L_TST_CINT */ -#define ARIZONA_HP1L_TST_CINT_SHIFT 14 /* HP1L_TST_CINT */ -#define ARIZONA_HP1L_TST_CINT_WIDTH 1 /* HP1L_TST_CINT */ -#define ARIZONA_HP1L_TST_GBW 0x3000 /* HP1L_TST_GBW - [13:12] */ -#define ARIZONA_HP1L_TST_GBW_MASK 0x3000 /* HP1L_TST_GBW - [13:12] */ -#define ARIZONA_HP1L_TST_GBW_SHIFT 12 /* HP1L_TST_GBW - [13:12] */ -#define ARIZONA_HP1L_TST_GBW_WIDTH 2 /* HP1L_TST_GBW - [13:12] */ -#define ARIZONA_HP1L_TST_PGAS 0x0800 /* HP1L_TST_PGAS */ -#define ARIZONA_HP1L_TST_PGAS_MASK 0x0800 /* HP1L_TST_PGAS */ -#define ARIZONA_HP1L_TST_PGAS_SHIFT 11 /* HP1L_TST_PGAS */ -#define ARIZONA_HP1L_TST_PGAS_WIDTH 1 /* HP1L_TST_PGAS */ -#define ARIZONA_HP1L_TST_DUMP 0x0400 /* HP1L_TST_DUMP */ -#define ARIZONA_HP1L_TST_DUMP_MASK 0x0400 /* HP1L_TST_DUMP */ -#define ARIZONA_HP1L_TST_DUMP_SHIFT 10 /* HP1L_TST_DUMP */ -#define ARIZONA_HP1L_TST_DUMP_WIDTH 1 /* HP1L_TST_DUMP */ -#define ARIZONA_HP1L_TST_RST 0x0200 /* HP1L_TST_RST */ -#define ARIZONA_HP1L_TST_RST_MASK 0x0200 /* HP1L_TST_RST */ -#define ARIZONA_HP1L_TST_RST_SHIFT 9 /* HP1L_TST_RST */ -#define ARIZONA_HP1L_TST_RST_WIDTH 1 /* HP1L_TST_RST */ -#define ARIZONA_HP1L_ONEFLT 0x0100 /* HP1L_ONEFLT */ -#define ARIZONA_HP1L_ONEFLT_MASK 0x0100 /* HP1L_ONEFLT */ -#define ARIZONA_HP1L_ONEFLT_SHIFT 8 /* HP1L_ONEFLT */ -#define ARIZONA_HP1L_ONEFLT_WIDTH 1 /* HP1L_ONEFLT */ -#define ARIZONA_HP1L_TST_THDOFF 0x00C0 /* HP1L_TST_THDOFF - [7:6] */ -#define ARIZONA_HP1L_TST_THDOFF_MASK 0x00C0 /* HP1L_TST_THDOFF - [7:6] */ -#define ARIZONA_HP1L_TST_THDOFF_SHIFT 6 /* HP1L_TST_THDOFF - [7:6] */ -#define ARIZONA_HP1L_TST_THDOFF_WIDTH 2 /* HP1L_TST_THDOFF - [7:6] */ -#define ARIZONA_HP1L_CTRL_IOUT 0x0030 /* HP1L_CTRL_IOUT - [5:4] */ -#define ARIZONA_HP1L_CTRL_IOUT_MASK 0x0030 /* HP1L_CTRL_IOUT - [5:4] */ -#define ARIZONA_HP1L_CTRL_IOUT_SHIFT 4 /* HP1L_CTRL_IOUT - [5:4] */ -#define ARIZONA_HP1L_CTRL_IOUT_WIDTH 2 /* HP1L_CTRL_IOUT - [5:4] */ -#define ARIZONA_HP1L_TST_ILG 0x0008 /* HP1L_TST_ILG */ -#define ARIZONA_HP1L_TST_ILG_MASK 0x0008 /* HP1L_TST_ILG */ -#define ARIZONA_HP1L_TST_ILG_SHIFT 3 /* HP1L_TST_ILG */ -#define ARIZONA_HP1L_TST_ILG_WIDTH 1 /* HP1L_TST_ILG */ -#define ARIZONA_HP1L_TST_IBIAS 0x0003 /* HP1L_TST_IBIAS - [1:0] */ -#define ARIZONA_HP1L_TST_IBIAS_MASK 0x0003 /* HP1L_TST_IBIAS - [1:0] */ -#define ARIZONA_HP1L_TST_IBIAS_SHIFT 0 /* HP1L_TST_IBIAS - [1:0] */ -#define ARIZONA_HP1L_TST_IBIAS_WIDTH 2 /* HP1L_TST_IBIAS - [1:0] */ +#define ARIZONA_HP1L_TST_CINT 0x4000 /* HP1L_TST_CINT */ +#define ARIZONA_HP1L_TST_CINT_MASK 0x4000 /* HP1L_TST_CINT */ +#define ARIZONA_HP1L_TST_CINT_SHIFT 14 /* HP1L_TST_CINT */ +#define ARIZONA_HP1L_TST_CINT_WIDTH 1 /* HP1L_TST_CINT */ +#define ARIZONA_HP1L_TST_GBW 0x3000 /* HP1L_TST_GBW - [13:12] */ +#define ARIZONA_HP1L_TST_GBW_MASK 0x3000 /* HP1L_TST_GBW - [13:12] */ +#define ARIZONA_HP1L_TST_GBW_SHIFT 12 /* HP1L_TST_GBW - [13:12] */ +#define ARIZONA_HP1L_TST_GBW_WIDTH 2 /* HP1L_TST_GBW - [13:12] */ +#define ARIZONA_HP1L_TST_PGAS 0x0800 /* HP1L_TST_PGAS */ +#define ARIZONA_HP1L_TST_PGAS_MASK 0x0800 /* HP1L_TST_PGAS */ +#define ARIZONA_HP1L_TST_PGAS_SHIFT 11 /* HP1L_TST_PGAS */ +#define ARIZONA_HP1L_TST_PGAS_WIDTH 1 /* HP1L_TST_PGAS */ +#define ARIZONA_HP1L_TST_DUMP 0x0400 /* HP1L_TST_DUMP */ +#define ARIZONA_HP1L_TST_DUMP_MASK 0x0400 /* HP1L_TST_DUMP */ +#define ARIZONA_HP1L_TST_DUMP_SHIFT 10 /* HP1L_TST_DUMP */ +#define ARIZONA_HP1L_TST_DUMP_WIDTH 1 /* HP1L_TST_DUMP */ +#define ARIZONA_HP1L_TST_RST 0x0200 /* HP1L_TST_RST */ +#define ARIZONA_HP1L_TST_RST_MASK 0x0200 /* HP1L_TST_RST */ +#define ARIZONA_HP1L_TST_RST_SHIFT 9 /* HP1L_TST_RST */ +#define ARIZONA_HP1L_TST_RST_WIDTH 1 /* HP1L_TST_RST */ +#define ARIZONA_HP1L_ONEFLT 0x0100 /* HP1L_ONEFLT */ +#define ARIZONA_HP1L_ONEFLT_MASK 0x0100 /* HP1L_ONEFLT */ +#define ARIZONA_HP1L_ONEFLT_SHIFT 8 /* HP1L_ONEFLT */ +#define ARIZONA_HP1L_ONEFLT_WIDTH 1 /* HP1L_ONEFLT */ +#define ARIZONA_HP1L_TST_THDOFF 0x00C0 /* HP1L_TST_THDOFF - [7:6] */ +#define ARIZONA_HP1L_TST_THDOFF_MASK 0x00C0 /* HP1L_TST_THDOFF - [7:6] */ +#define ARIZONA_HP1L_TST_THDOFF_SHIFT 6 /* HP1L_TST_THDOFF - [7:6] */ +#define ARIZONA_HP1L_TST_THDOFF_WIDTH 2 /* HP1L_TST_THDOFF - [7:6] */ +#define ARIZONA_HP1L_CTRL_IOUT 0x0030 /* HP1L_CTRL_IOUT - [5:4] */ +#define ARIZONA_HP1L_CTRL_IOUT_MASK 0x0030 /* HP1L_CTRL_IOUT - [5:4] */ +#define ARIZONA_HP1L_CTRL_IOUT_SHIFT 4 /* HP1L_CTRL_IOUT - [5:4] */ +#define ARIZONA_HP1L_CTRL_IOUT_WIDTH 2 /* HP1L_CTRL_IOUT - [5:4] */ +#define ARIZONA_HP1L_TST_ILG 0x0008 /* HP1L_TST_ILG */ +#define ARIZONA_HP1L_TST_ILG_MASK 0x0008 /* HP1L_TST_ILG */ +#define ARIZONA_HP1L_TST_ILG_SHIFT 3 /* HP1L_TST_ILG */ +#define ARIZONA_HP1L_TST_ILG_WIDTH 1 /* HP1L_TST_ILG */ +#define ARIZONA_HP1L_TST_IBIAS 0x0003 /* HP1L_TST_IBIAS - [1:0] */ +#define ARIZONA_HP1L_TST_IBIAS_MASK 0x0003 /* HP1L_TST_IBIAS - [1:0] */ +#define ARIZONA_HP1L_TST_IBIAS_SHIFT 0 /* HP1L_TST_IBIAS - [1:0] */ +#define ARIZONA_HP1L_TST_IBIAS_WIDTH 2 /* HP1L_TST_IBIAS - [1:0] */ /* * R540 (0x4A9) - HP_Test_Ctrl_6 */ -#define ARIZONA_HP1R_TST_CINT 0x4000 /* HP1R_TST_CINT */ -#define ARIZONA_HP1R_TST_CINT_MASK 0x4000 /* HP1R_TST_CINT */ -#define ARIZONA_HP1R_TST_CINT_SHIFT 14 /* HP1R_TST_CINT */ -#define ARIZONA_HP1R_TST_CINT_WIDTH 1 /* HP1R_TST_CINT */ -#define ARIZONA_HP1R_TST_GBW 0x3000 /* HP1R_TST_GBW - [13:12] */ -#define ARIZONA_HP1R_TST_GBW_MASK 0x3000 /* HP1R_TST_GBW - [13:12] */ -#define ARIZONA_HP1R_TST_GBW_SHIFT 12 /* HP1R_TST_GBW - [13:12] */ -#define ARIZONA_HP1R_TST_GBW_WIDTH 2 /* HP1R_TST_GBW - [13:12] */ -#define ARIZONA_HP1R_TST_PGAS 0x0800 /* HP1R_TST_PGAS */ -#define ARIZONA_HP1R_TST_PGAS_MASK 0x0800 /* HP1R_TST_PGAS */ -#define ARIZONA_HP1R_TST_PGAS_SHIFT 11 /* HP1R_TST_PGAS */ -#define ARIZONA_HP1R_TST_PGAS_WIDTH 1 /* HP1R_TST_PGAS */ -#define ARIZONA_HP1R_TST_DUMP 0x0400 /* HP1R_TST_DUMP */ -#define ARIZONA_HP1R_TST_DUMP_MASK 0x0400 /* HP1R_TST_DUMP */ -#define ARIZONA_HP1R_TST_DUMP_SHIFT 10 /* HP1R_TST_DUMP */ -#define ARIZONA_HP1R_TST_DUMP_WIDTH 1 /* HP1R_TST_DUMP */ -#define ARIZONA_HP1R_TST_RST 0x0200 /* HP1R_TST_RST */ -#define ARIZONA_HP1R_TST_RST_MASK 0x0200 /* HP1R_TST_RST */ -#define ARIZONA_HP1R_TST_RST_SHIFT 9 /* HP1R_TST_RST */ -#define ARIZONA_HP1R_TST_RST_WIDTH 1 /* HP1R_TST_RST */ -#define ARIZONA_HP1R_ONEFLT 0x0100 /* HP1R_ONEFLT */ -#define ARIZONA_HP1R_ONEFLT_MASK 0x0100 /* HP1R_ONEFLT */ -#define ARIZONA_HP1R_ONEFLT_SHIFT 8 /* HP1R_ONEFLT */ -#define ARIZONA_HP1R_ONEFLT_WIDTH 1 /* HP1R_ONEFLT */ -#define ARIZONA_HP1R_TST_THDOFF 0x00C0 /* HP1R_TST_THDOFF - [7:6] */ -#define ARIZONA_HP1R_TST_THDOFF_MASK 0x00C0 /* HP1R_TST_THDOFF - [7:6] */ -#define ARIZONA_HP1R_TST_THDOFF_SHIFT 6 /* HP1R_TST_THDOFF - [7:6] */ -#define ARIZONA_HP1R_TST_THDOFF_WIDTH 2 /* HP1R_TST_THDOFF - [7:6] */ -#define ARIZONA_HP1R_CTRL_IOUT 0x0030 /* HP1R_CTRL_IOUT - [5:4] */ -#define ARIZONA_HP1R_CTRL_IOUT_MASK 0x0030 /* HP1R_CTRL_IOUT - [5:4] */ -#define ARIZONA_HP1R_CTRL_IOUT_SHIFT 4 /* HP1R_CTRL_IOUT - [5:4] */ -#define ARIZONA_HP1R_CTRL_IOUT_WIDTH 2 /* HP1R_CTRL_IOUT - [5:4] */ -#define ARIZONA_HP1R_TST_ILG 0x0008 /* HP1R_TST_ILG */ -#define ARIZONA_HP1R_TST_ILG_MASK 0x0008 /* HP1R_TST_ILG */ -#define ARIZONA_HP1R_TST_ILG_SHIFT 3 /* HP1R_TST_ILG */ -#define ARIZONA_HP1R_TST_ILG_WIDTH 1 /* HP1R_TST_ILG */ -#define ARIZONA_HP1R_TST_IBIAS 0x0003 /* HP1R_TST_IBIAS - [1:0] */ -#define ARIZONA_HP1R_TST_IBIAS_MASK 0x0003 /* HP1R_TST_IBIAS - [1:0] */ -#define ARIZONA_HP1R_TST_IBIAS_SHIFT 0 /* HP1R_TST_IBIAS - [1:0] */ -#define ARIZONA_HP1R_TST_IBIAS_WIDTH 2 /* HP1R_TST_IBIAS - [1:0] */ +#define ARIZONA_HP1R_TST_CINT 0x4000 /* HP1R_TST_CINT */ +#define ARIZONA_HP1R_TST_CINT_MASK 0x4000 /* HP1R_TST_CINT */ +#define ARIZONA_HP1R_TST_CINT_SHIFT 14 /* HP1R_TST_CINT */ +#define ARIZONA_HP1R_TST_CINT_WIDTH 1 /* HP1R_TST_CINT */ +#define ARIZONA_HP1R_TST_GBW 0x3000 /* HP1R_TST_GBW - [13:12] */ +#define ARIZONA_HP1R_TST_GBW_MASK 0x3000 /* HP1R_TST_GBW - [13:12] */ +#define ARIZONA_HP1R_TST_GBW_SHIFT 12 /* HP1R_TST_GBW - [13:12] */ +#define ARIZONA_HP1R_TST_GBW_WIDTH 2 /* HP1R_TST_GBW - [13:12] */ +#define ARIZONA_HP1R_TST_PGAS 0x0800 /* HP1R_TST_PGAS */ +#define ARIZONA_HP1R_TST_PGAS_MASK 0x0800 /* HP1R_TST_PGAS */ +#define ARIZONA_HP1R_TST_PGAS_SHIFT 11 /* HP1R_TST_PGAS */ +#define ARIZONA_HP1R_TST_PGAS_WIDTH 1 /* HP1R_TST_PGAS */ +#define ARIZONA_HP1R_TST_DUMP 0x0400 /* HP1R_TST_DUMP */ +#define ARIZONA_HP1R_TST_DUMP_MASK 0x0400 /* HP1R_TST_DUMP */ +#define ARIZONA_HP1R_TST_DUMP_SHIFT 10 /* HP1R_TST_DUMP */ +#define ARIZONA_HP1R_TST_DUMP_WIDTH 1 /* HP1R_TST_DUMP */ +#define ARIZONA_HP1R_TST_RST 0x0200 /* HP1R_TST_RST */ +#define ARIZONA_HP1R_TST_RST_MASK 0x0200 /* HP1R_TST_RST */ +#define ARIZONA_HP1R_TST_RST_SHIFT 9 /* HP1R_TST_RST */ +#define ARIZONA_HP1R_TST_RST_WIDTH 1 /* HP1R_TST_RST */ +#define ARIZONA_HP1R_ONEFLT 0x0100 /* HP1R_ONEFLT */ +#define ARIZONA_HP1R_ONEFLT_MASK 0x0100 /* HP1R_ONEFLT */ +#define ARIZONA_HP1R_ONEFLT_SHIFT 8 /* HP1R_ONEFLT */ +#define ARIZONA_HP1R_ONEFLT_WIDTH 1 /* HP1R_ONEFLT */ +#define ARIZONA_HP1R_TST_THDOFF 0x00C0 /* HP1R_TST_THDOFF - [7:6] */ +#define ARIZONA_HP1R_TST_THDOFF_MASK 0x00C0 /* HP1R_TST_THDOFF - [7:6] */ +#define ARIZONA_HP1R_TST_THDOFF_SHIFT 6 /* HP1R_TST_THDOFF - [7:6] */ +#define ARIZONA_HP1R_TST_THDOFF_WIDTH 2 /* HP1R_TST_THDOFF - [7:6] */ +#define ARIZONA_HP1R_CTRL_IOUT 0x0030 /* HP1R_CTRL_IOUT - [5:4] */ +#define ARIZONA_HP1R_CTRL_IOUT_MASK 0x0030 /* HP1R_CTRL_IOUT - [5:4] */ +#define ARIZONA_HP1R_CTRL_IOUT_SHIFT 4 /* HP1R_CTRL_IOUT - [5:4] */ +#define ARIZONA_HP1R_CTRL_IOUT_WIDTH 2 /* HP1R_CTRL_IOUT - [5:4] */ +#define ARIZONA_HP1R_TST_ILG 0x0008 /* HP1R_TST_ILG */ +#define ARIZONA_HP1R_TST_ILG_MASK 0x0008 /* HP1R_TST_ILG */ +#define ARIZONA_HP1R_TST_ILG_SHIFT 3 /* HP1R_TST_ILG */ +#define ARIZONA_HP1R_TST_ILG_WIDTH 1 /* HP1R_TST_ILG */ +#define ARIZONA_HP1R_TST_IBIAS 0x0003 /* HP1R_TST_IBIAS - [1:0] */ +#define ARIZONA_HP1R_TST_IBIAS_MASK 0x0003 /* HP1R_TST_IBIAS - [1:0] */ +#define ARIZONA_HP1R_TST_IBIAS_SHIFT 0 /* HP1R_TST_IBIAS - [1:0] */ +#define ARIZONA_HP1R_TST_IBIAS_WIDTH 2 /* HP1R_TST_IBIAS - [1:0] */ /* * R1244 (0x4DC) - DAC comp 1 @@ -6454,22 +6453,22 @@ /* * R1475 (0x5C5) - SPD1 TX Channel Status 3 */ -#define ARIZONA_SPD1_ORGSAMP_MASK 0x0F00 /* SPD1_ORGSAMP */ -#define ARIZONA_SPD1_ORGSAMP_SHIFT 8 /* SPD1_ORGSAMP */ -#define ARIZONA_SPD1_ORGSAMP_WIDTH 4 /* SPD1_ORGSAMP */ -#define ARIZONA_SPD1_TXWL_MASK 0x00E0 /* SPD1_TXWL */ -#define ARIZONA_SPD1_TXWL_SHIFT 5 /* SPD1_TXWL */ -#define ARIZONA_SPD1_TXWL_WIDTH 3 /* SPD1_TXWL */ -#define ARIZONA_SPD1_MAXWL 0x0010 /* SPD1_MAXWL */ -#define ARIZONA_SPD1_MAXWL_MASK 0x0010 /* SPD1_MAXWL */ -#define ARIZONA_SPD1_MAXWL_SHIFT 4 /* SPD1_MAXWL */ -#define ARIZONA_SPD1_MAXWL_WIDTH 1 /* SPD1_MAXWL */ -#define ARIZONA_SPD1_CS31_30_MASK 0x000C /* SPD1_CS31_30 */ -#define ARIZONA_SPD1_CS31_30_SHIFT 2 /* SPD1_CS31_30 */ -#define ARIZONA_SPD1_CS31_30_WIDTH 2 /* SPD1_CS31_30 */ -#define ARIZONA_SPD1_CLKACU_MASK 0x0003 /* SPD1_CLKACU */ -#define ARIZONA_SPD1_CLKACU_SHIFT 2 /* SPD1_CLKACU */ -#define ARIZONA_SPD1_CLKACU_WIDTH 0 /* SPD1_CLKACU */ +#define ARIZONA_SPD1_ORGSAMP_MASK 0x0F00 /* SPD1_ORGSAMP */ +#define ARIZONA_SPD1_ORGSAMP_SHIFT 8 /* SPD1_ORGSAMP */ +#define ARIZONA_SPD1_ORGSAMP_WIDTH 4 /* SPD1_ORGSAMP */ +#define ARIZONA_SPD1_TXWL_MASK 0x00E0 /* SPD1_TXWL */ +#define ARIZONA_SPD1_TXWL_SHIFT 5 /* SPD1_TXWL */ +#define ARIZONA_SPD1_TXWL_WIDTH 3 /* SPD1_TXWL */ +#define ARIZONA_SPD1_MAXWL 0x0010 /* SPD1_MAXWL */ +#define ARIZONA_SPD1_MAXWL_MASK 0x0010 /* SPD1_MAXWL */ +#define ARIZONA_SPD1_MAXWL_SHIFT 4 /* SPD1_MAXWL */ +#define ARIZONA_SPD1_MAXWL_WIDTH 1 /* SPD1_MAXWL */ +#define ARIZONA_SPD1_CS31_30_MASK 0x000C /* SPD1_CS31_30 */ +#define ARIZONA_SPD1_CS31_30_SHIFT 2 /* SPD1_CS31_30 */ +#define ARIZONA_SPD1_CS31_30_WIDTH 2 /* SPD1_CS31_30 */ +#define ARIZONA_SPD1_CLKACU_MASK 0x0003 /* SPD1_CLKACU */ +#define ARIZONA_SPD1_CLKACU_SHIFT 2 /* SPD1_CLKACU */ +#define ARIZONA_SPD1_CLKACU_WIDTH 0 /* SPD1_CLKACU */ /* * R1507 (0x5E3) - SLIMbus Framer Ref Gear @@ -7325,70 +7324,70 @@ /* * R3339 (0xD0B) - Interrupt Status 4 Mask */ -#define ARIZONA_IM_ASRC_CFG_ERR_EINT1 0x8000 /* IM_ASRC_CFG_ERR_EINT1 */ -#define ARIZONA_IM_ASRC_CFG_ERR_EINT1_MASK 0x8000 /* IM_ASRC_CFG_ERR_EINT1 */ -#define ARIZONA_IM_ASRC_CFG_ERR_EINT1_SHIFT 15 /* IM_ASRC_CFG_ERR_EINT1 */ -#define ARIZONA_IM_ASRC_CFG_ERR_EINT1_WIDTH 1 /* IM_ASRC_CFG_ERR_EINT1 */ -#define ARIZONA_IM_AIF3_ERR_EINT1 0x4000 /* IM_AIF3_ERR_EINT1 */ -#define ARIZONA_IM_AIF3_ERR_EINT1_MASK 0x4000 /* IM_AIF3_ERR_EINT1 */ -#define ARIZONA_IM_AIF3_ERR_EINT1_SHIFT 14 /* IM_AIF3_ERR_EINT1 */ -#define ARIZONA_IM_AIF3_ERR_EINT1_WIDTH 1 /* IM_AIF3_ERR_EINT1 */ -#define ARIZONA_IM_AIF2_ERR_EINT1 0x2000 /* IM_AIF2_ERR_EINT1 */ -#define ARIZONA_IM_AIF2_ERR_EINT1_MASK 0x2000 /* IM_AIF2_ERR_EINT1 */ -#define ARIZONA_IM_AIF2_ERR_EINT1_SHIFT 13 /* IM_AIF2_ERR_EINT1 */ -#define ARIZONA_IM_AIF2_ERR_EINT1_WIDTH 1 /* IM_AIF2_ERR_EINT1 */ -#define ARIZONA_IM_AIF1_ERR_EINT1 0x1000 /* IM_AIF1_ERR_EINT1 */ -#define ARIZONA_IM_AIF1_ERR_EINT1_MASK 0x1000 /* IM_AIF1_ERR_EINT1 */ -#define ARIZONA_IM_AIF1_ERR_EINT1_SHIFT 12 /* IM_AIF1_ERR_EINT1 */ -#define ARIZONA_IM_AIF1_ERR_EINT1_WIDTH 1 /* IM_AIF1_ERR_EINT1 */ -#define ARIZONA_IM_CTRLIF_ERR_EINT1 0x0800 /* IM_CTRLIF_ERR_EINT1 */ -#define ARIZONA_IM_CTRLIF_ERR_EINT1_MASK 0x0800 /* IM_CTRLIF_ERR_EINT1 */ -#define ARIZONA_IM_CTRLIF_ERR_EINT1_SHIFT 11 /* IM_CTRLIF_ERR_EINT1 */ -#define ARIZONA_IM_CTRLIF_ERR_EINT1_WIDTH 1 /* IM_CTRLIF_ERR_EINT1 */ -#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1 0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */ -#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_MASK 0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */ -#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_SHIFT 10 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */ -#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_WIDTH 1 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */ -#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1 0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */ -#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_MASK 0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */ -#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_SHIFT 9 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */ -#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_WIDTH 1 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */ -#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1 0x0100 /* IM_SYSCLK_ENA_LOW_EINT1 */ -#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_MASK 0x0100 /* IM_SYSCLK_ENA_LOW_EINT1 */ -#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_SHIFT 8 /* IM_SYSCLK_ENA_LOW_EINT1 */ -#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_WIDTH 1 /* IM_SYSCLK_ENA_LOW_EINT1 */ -#define ARIZONA_IM_ISRC1_CFG_ERR_EINT1 0x0080 /* IM_ISRC1_CFG_ERR_EINT1 */ -#define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_MASK 0x0080 /* IM_ISRC1_CFG_ERR_EINT1 */ -#define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_SHIFT 7 /* IM_ISRC1_CFG_ERR_EINT1 */ -#define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_WIDTH 1 /* IM_ISRC1_CFG_ERR_EINT1 */ -#define ARIZONA_IM_ISRC2_CFG_ERR_EINT1 0x0040 /* IM_ISRC2_CFG_ERR_EINT1 */ -#define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_MASK 0x0040 /* IM_ISRC2_CFG_ERR_EINT1 */ -#define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_SHIFT 6 /* IM_ISRC2_CFG_ERR_EINT1 */ -#define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_WIDTH 1 /* IM_ISRC2_CFG_ERR_EINT1 */ -#define ARIZONA_IM_HP3R_DONE_EINT1 0x0020 /* IM_HP3R_DONE_EINT1 */ -#define ARIZONA_IM_HP3R_DONE_EINT1_MASK 0x0020 /* IM_HP3R_DONE_EINT1 */ -#define ARIZONA_IM_HP3R_DONE_EINT1_SHIFT 5 /* IM_HP3R_DONE_EINT1 */ -#define ARIZONA_IM_HP3R_DONE_EINT1_WIDTH 1 /* IM_HP3R_DONE_EINT1 */ -#define ARIZONA_IM_HP3L_DONE_EINT1 0x0010 /* IM_HP3L_DONE_EINT1 */ -#define ARIZONA_IM_HP3L_DONE_EINT1_MASK 0x0010 /* IM_HP3L_DONE_EINT1 */ -#define ARIZONA_IM_HP3L_DONE_EINT1_SHIFT 4 /* IM_HP3L_DONE_EINT1 */ -#define ARIZONA_IM_HP3L_DONE_EINT1_WIDTH 1 /* IM_HP3L_DONE_EINT1 */ -#define ARIZONA_IM_HP2R_DONE_EINT1 0x0008 /* IM_HP2R_DONE_EINT1 */ -#define ARIZONA_IM_HP2R_DONE_EINT1_MASK 0x0008 /* IM_HP2R_DONE_EINT1 */ -#define ARIZONA_IM_HP2R_DONE_EINT1_SHIFT 3 /* IM_HP2R_DONE_EINT1 */ -#define ARIZONA_IM_HP2R_DONE_EINT1_WIDTH 1 /* IM_HP2R_DONE_EINT1 */ -#define ARIZONA_IM_HP2L_DONE_EINT1 0x0004 /* IM_HP2L_DONE_EINT1 */ -#define ARIZONA_IM_HP2L_DONE_EINT1_MASK 0x0004 /* IM_HP2L_DONE_EINT1 */ -#define ARIZONA_IM_HP2L_DONE_EINT1_SHIFT 2 /* IM_HP2L_DONE_EINT1 */ -#define ARIZONA_IM_HP2L_DONE_EINT1_WIDTH 1 /* IM_HP2L_DONE_EINT1 */ -#define ARIZONA_IM_HP1R_DONE_EINT1 0x0002 /* IM_HP1R_DONE_EINT1 */ -#define ARIZONA_IM_HP1R_DONE_EINT1_MASK 0x0002 /* IM_HP1R_DONE_EINT1 */ -#define ARIZONA_IM_HP1R_DONE_EINT1_SHIFT 1 /* IM_HP1R_DONE_EINT1 */ -#define ARIZONA_IM_HP1R_DONE_EINT1_WIDTH 1 /* IM_HP1R_DONE_EINT1 */ -#define ARIZONA_IM_HP1L_DONE_EINT1 0x0001 /* IM_HP1L_DONE_EINT1 */ -#define ARIZONA_IM_HP1L_DONE_EINT1_MASK 0x0001 /* IM_HP1L_DONE_EINT1 */ -#define ARIZONA_IM_HP1L_DONE_EINT1_SHIFT 0 /* IM_HP1L_DONE_EINT1 */ -#define ARIZONA_IM_HP1L_DONE_EINT1_WIDTH 1 /* IM_HP1L_DONE_EINT1 */ +#define ARIZONA_IM_ASRC_CFG_ERR_EINT1 0x8000 /* IM_ASRC_CFG_ERR_EINT1 */ +#define ARIZONA_IM_ASRC_CFG_ERR_EINT1_MASK 0x8000 /* IM_ASRC_CFG_ERR_EINT1 */ +#define ARIZONA_IM_ASRC_CFG_ERR_EINT1_SHIFT 15 /* IM_ASRC_CFG_ERR_EINT1 */ +#define ARIZONA_IM_ASRC_CFG_ERR_EINT1_WIDTH 1 /* IM_ASRC_CFG_ERR_EINT1 */ +#define ARIZONA_IM_AIF3_ERR_EINT1 0x4000 /* IM_AIF3_ERR_EINT1 */ +#define ARIZONA_IM_AIF3_ERR_EINT1_MASK 0x4000 /* IM_AIF3_ERR_EINT1 */ +#define ARIZONA_IM_AIF3_ERR_EINT1_SHIFT 14 /* IM_AIF3_ERR_EINT1 */ +#define ARIZONA_IM_AIF3_ERR_EINT1_WIDTH 1 /* IM_AIF3_ERR_EINT1 */ +#define ARIZONA_IM_AIF2_ERR_EINT1 0x2000 /* IM_AIF2_ERR_EINT1 */ +#define ARIZONA_IM_AIF2_ERR_EINT1_MASK 0x2000 /* IM_AIF2_ERR_EINT1 */ +#define ARIZONA_IM_AIF2_ERR_EINT1_SHIFT 13 /* IM_AIF2_ERR_EINT1 */ +#define ARIZONA_IM_AIF2_ERR_EINT1_WIDTH 1 /* IM_AIF2_ERR_EINT1 */ +#define ARIZONA_IM_AIF1_ERR_EINT1 0x1000 /* IM_AIF1_ERR_EINT1 */ +#define ARIZONA_IM_AIF1_ERR_EINT1_MASK 0x1000 /* IM_AIF1_ERR_EINT1 */ +#define ARIZONA_IM_AIF1_ERR_EINT1_SHIFT 12 /* IM_AIF1_ERR_EINT1 */ +#define ARIZONA_IM_AIF1_ERR_EINT1_WIDTH 1 /* IM_AIF1_ERR_EINT1 */ +#define ARIZONA_IM_CTRLIF_ERR_EINT1 0x0800 /* IM_CTRLIF_ERR_EINT1 */ +#define ARIZONA_IM_CTRLIF_ERR_EINT1_MASK 0x0800 /* IM_CTRLIF_ERR_EINT1 */ +#define ARIZONA_IM_CTRLIF_ERR_EINT1_SHIFT 11 /* IM_CTRLIF_ERR_EINT1 */ +#define ARIZONA_IM_CTRLIF_ERR_EINT1_WIDTH 1 /* IM_CTRLIF_ERR_EINT1 */ +#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1 0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */ +#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_MASK 0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */ +#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_SHIFT 10 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */ +#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_WIDTH 1 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */ +#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1 0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */ +#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_MASK 0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */ +#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_SHIFT 9 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */ +#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_WIDTH 1 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */ +#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1 0x0100 /* IM_SYSCLK_ENA_LOW_EINT1 */ +#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_MASK 0x0100 /* IM_SYSCLK_ENA_LOW_EINT1 */ +#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_SHIFT 8 /* IM_SYSCLK_ENA_LOW_EINT1 */ +#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_WIDTH 1 /* IM_SYSCLK_ENA_LOW_EINT1 */ +#define ARIZONA_IM_ISRC1_CFG_ERR_EINT1 0x0080 /* IM_ISRC1_CFG_ERR_EINT1 */ +#define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_MASK 0x0080 /* IM_ISRC1_CFG_ERR_EINT1 */ +#define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_SHIFT 7 /* IM_ISRC1_CFG_ERR_EINT1 */ +#define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_WIDTH 1 /* IM_ISRC1_CFG_ERR_EINT1 */ +#define ARIZONA_IM_ISRC2_CFG_ERR_EINT1 0x0040 /* IM_ISRC2_CFG_ERR_EINT1 */ +#define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_MASK 0x0040 /* IM_ISRC2_CFG_ERR_EINT1 */ +#define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_SHIFT 6 /* IM_ISRC2_CFG_ERR_EINT1 */ +#define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_WIDTH 1 /* IM_ISRC2_CFG_ERR_EINT1 */ +#define ARIZONA_IM_HP3R_DONE_EINT1 0x0020 /* IM_HP3R_DONE_EINT1 */ +#define ARIZONA_IM_HP3R_DONE_EINT1_MASK 0x0020 /* IM_HP3R_DONE_EINT1 */ +#define ARIZONA_IM_HP3R_DONE_EINT1_SHIFT 5 /* IM_HP3R_DONE_EINT1 */ +#define ARIZONA_IM_HP3R_DONE_EINT1_WIDTH 1 /* IM_HP3R_DONE_EINT1 */ +#define ARIZONA_IM_HP3L_DONE_EINT1 0x0010 /* IM_HP3L_DONE_EINT1 */ +#define ARIZONA_IM_HP3L_DONE_EINT1_MASK 0x0010 /* IM_HP3L_DONE_EINT1 */ +#define ARIZONA_IM_HP3L_DONE_EINT1_SHIFT 4 /* IM_HP3L_DONE_EINT1 */ +#define ARIZONA_IM_HP3L_DONE_EINT1_WIDTH 1 /* IM_HP3L_DONE_EINT1 */ +#define ARIZONA_IM_HP2R_DONE_EINT1 0x0008 /* IM_HP2R_DONE_EINT1 */ +#define ARIZONA_IM_HP2R_DONE_EINT1_MASK 0x0008 /* IM_HP2R_DONE_EINT1 */ +#define ARIZONA_IM_HP2R_DONE_EINT1_SHIFT 3 /* IM_HP2R_DONE_EINT1 */ +#define ARIZONA_IM_HP2R_DONE_EINT1_WIDTH 1 /* IM_HP2R_DONE_EINT1 */ +#define ARIZONA_IM_HP2L_DONE_EINT1 0x0004 /* IM_HP2L_DONE_EINT1 */ +#define ARIZONA_IM_HP2L_DONE_EINT1_MASK 0x0004 /* IM_HP2L_DONE_EINT1 */ +#define ARIZONA_IM_HP2L_DONE_EINT1_SHIFT 2 /* IM_HP2L_DONE_EINT1 */ +#define ARIZONA_IM_HP2L_DONE_EINT1_WIDTH 1 /* IM_HP2L_DONE_EINT1 */ +#define ARIZONA_IM_HP1R_DONE_EINT1 0x0002 /* IM_HP1R_DONE_EINT1 */ +#define ARIZONA_IM_HP1R_DONE_EINT1_MASK 0x0002 /* IM_HP1R_DONE_EINT1 */ +#define ARIZONA_IM_HP1R_DONE_EINT1_SHIFT 1 /* IM_HP1R_DONE_EINT1 */ +#define ARIZONA_IM_HP1R_DONE_EINT1_WIDTH 1 /* IM_HP1R_DONE_EINT1 */ +#define ARIZONA_IM_HP1L_DONE_EINT1 0x0001 /* IM_HP1L_DONE_EINT1 */ +#define ARIZONA_IM_HP1L_DONE_EINT1_MASK 0x0001 /* IM_HP1L_DONE_EINT1 */ +#define ARIZONA_IM_HP1L_DONE_EINT1_SHIFT 0 /* IM_HP1L_DONE_EINT1 */ +#define ARIZONA_IM_HP1L_DONE_EINT1_WIDTH 1 /* IM_HP1L_DONE_EINT1 */ /* * R3339 (0xD0B) - Interrupt Status 4 Mask (Alternate layout) @@ -7722,46 +7721,46 @@ * Alternate layout used on later devices, note only fields that have moved * are specified */ -#define ARIZONA_V2_AIF3_ERR_EINT2 0x8000 /* AIF3_ERR_EINT2 */ -#define ARIZONA_V2_AIF3_ERR_EINT2_MASK 0x8000 /* AIF3_ERR_EINT2 */ -#define ARIZONA_V2_AIF3_ERR_EINT2_SHIFT 15 /* AIF3_ERR_EINT2 */ -#define ARIZONA_V2_AIF3_ERR_EINT2_WIDTH 1 /* AIF3_ERR_EINT2 */ -#define ARIZONA_V2_AIF2_ERR_EINT2 0x4000 /* AIF2_ERR_EINT2 */ -#define ARIZONA_V2_AIF2_ERR_EINT2_MASK 0x4000 /* AIF2_ERR_EINT2 */ -#define ARIZONA_V2_AIF2_ERR_EINT2_SHIFT 14 /* AIF2_ERR_EINT2 */ -#define ARIZONA_V2_AIF2_ERR_EINT2_WIDTH 1 /* AIF2_ERR_EINT2 */ -#define ARIZONA_V2_AIF1_ERR_EINT2 0x2000 /* AIF1_ERR_EINT2 */ -#define ARIZONA_V2_AIF1_ERR_EINT2_MASK 0x2000 /* AIF1_ERR_EINT2 */ -#define ARIZONA_V2_AIF1_ERR_EINT2_SHIFT 13 /* AIF1_ERR_EINT2 */ -#define ARIZONA_V2_AIF1_ERR_EINT2_WIDTH 1 /* AIF1_ERR_EINT2 */ -#define ARIZONA_V2_CTRLIF_ERR_EINT2 0x1000 /* CTRLIF_ERR_EINT2 */ -#define ARIZONA_V2_CTRLIF_ERR_EINT2_MASK 0x1000 /* CTRLIF_ERR_EINT2 */ -#define ARIZONA_V2_CTRLIF_ERR_EINT2_SHIFT 12 /* CTRLIF_ERR_EINT2 */ -#define ARIZONA_V2_CTRLIF_ERR_EINT2_WIDTH 1 /* CTRLIF_ERR_EINT2 */ -#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2 0x0800 /* MIXER_DROPPED_SAMPLE_EINT2 */ -#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2_MASK 0x0800 /* MIXER_DROPPED_SAMPLE_EINT2 */ -#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2_SHIFT 11 /* MIXER_DROPPED_SAMPLE_EINT2 */ -#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2_WIDTH 1 /* MIXER_DROPPED_SAMPLE_EINT2 */ -#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2 0x0400 /* ASYNC_CLK_ENA_LOW_EINT2 */ -#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2_MASK 0x0400 /* ASYNC_CLK_ENA_LOW_EINT2 */ -#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2_SHIFT 10 /* ASYNC_CLK_ENA_LOW_EINT2 */ -#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2_WIDTH 1 /* ASYNC_CLK_ENA_LOW_EINT2 */ -#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2 0x0200 /* SYSCLK_ENA_LOW_EINT2 */ -#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2_MASK 0x0200 /* SYSCLK_ENA_LOW_EINT2 */ -#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2_SHIFT 9 /* SYSCLK_ENA_LOW_EINT2 */ -#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2_WIDTH 1 /* SYSCLK_ENA_LOW_EINT2 */ -#define ARIZONA_V2_ISRC1_CFG_ERR_EINT2 0x0100 /* ISRC1_CFG_ERR_EINT2 */ -#define ARIZONA_V2_ISRC1_CFG_ERR_EINT2_MASK 0x0100 /* ISRC1_CFG_ERR_EINT2 */ -#define ARIZONA_V2_ISRC1_CFG_ERR_EINT2_SHIFT 8 /* ISRC1_CFG_ERR_EINT2 */ -#define ARIZONA_V2_ISRC1_CFG_ERR_EINT2_WIDTH 1 /* ISRC1_CFG_ERR_EINT2 */ -#define ARIZONA_V2_ISRC2_CFG_ERR_EINT2 0x0080 /* ISRC2_CFG_ERR_EINT2 */ -#define ARIZONA_V2_ISRC2_CFG_ERR_EINT2_MASK 0x0080 /* ISRC2_CFG_ERR_EINT2 */ -#define ARIZONA_V2_ISRC2_CFG_ERR_EINT2_SHIFT 7 /* ISRC2_CFG_ERR_EINT2 */ -#define ARIZONA_V2_ISRC2_CFG_ERR_EINT2_WIDTH 1 /* ISRC2_CFG_ERR_EINT2 */ -#define ARIZONA_V2_ISRC3_CFG_ERR_EINT2 0x0040 /* ISRC3_CFG_ERR_EINT2 */ -#define ARIZONA_V2_ISRC3_CFG_ERR_EINT2_MASK 0x0040 /* ISRC3_CFG_ERR_EINT2 */ -#define ARIZONA_V2_ISRC3_CFG_ERR_EINT2_SHIFT 6 /* ISRC3_CFG_ERR_EINT2 */ -#define ARIZONA_V2_ISRC3_CFG_ERR_EINT2_WIDTH 1 /* ISRC3_CFG_ERR_EINT2 */ +#define ARIZONA_V2_AIF3_ERR_EINT2 0x8000 /* AIF3_ERR_EINT2 */ +#define ARIZONA_V2_AIF3_ERR_EINT2_MASK 0x8000 /* AIF3_ERR_EINT2 */ +#define ARIZONA_V2_AIF3_ERR_EINT2_SHIFT 15 /* AIF3_ERR_EINT2 */ +#define ARIZONA_V2_AIF3_ERR_EINT2_WIDTH 1 /* AIF3_ERR_EINT2 */ +#define ARIZONA_V2_AIF2_ERR_EINT2 0x4000 /* AIF2_ERR_EINT2 */ +#define ARIZONA_V2_AIF2_ERR_EINT2_MASK 0x4000 /* AIF2_ERR_EINT2 */ +#define ARIZONA_V2_AIF2_ERR_EINT2_SHIFT 14 /* AIF2_ERR_EINT2 */ +#define ARIZONA_V2_AIF2_ERR_EINT2_WIDTH 1 /* AIF2_ERR_EINT2 */ +#define ARIZONA_V2_AIF1_ERR_EINT2 0x2000 /* AIF1_ERR_EINT2 */ +#define ARIZONA_V2_AIF1_ERR_EINT2_MASK 0x2000 /* AIF1_ERR_EINT2 */ +#define ARIZONA_V2_AIF1_ERR_EINT2_SHIFT 13 /* AIF1_ERR_EINT2 */ +#define ARIZONA_V2_AIF1_ERR_EINT2_WIDTH 1 /* AIF1_ERR_EINT2 */ +#define ARIZONA_V2_CTRLIF_ERR_EINT2 0x1000 /* CTRLIF_ERR_EINT2 */ +#define ARIZONA_V2_CTRLIF_ERR_EINT2_MASK 0x1000 /* CTRLIF_ERR_EINT2 */ +#define ARIZONA_V2_CTRLIF_ERR_EINT2_SHIFT 12 /* CTRLIF_ERR_EINT2 */ +#define ARIZONA_V2_CTRLIF_ERR_EINT2_WIDTH 1 /* CTRLIF_ERR_EINT2 */ +#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2 0x0800 /* MIXER_DROPPED_SAMPLE_EINT2 */ +#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2_MASK 0x0800 /* MIXER_DROPPED_SAMPLE_EINT2 */ +#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2_SHIFT 11 /* MIXER_DROPPED_SAMPLE_EINT2 */ +#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2_WIDTH 1 /* MIXER_DROPPED_SAMPLE_EINT2 */ +#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2 0x0400 /* ASYNC_CLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2_MASK 0x0400 /* ASYNC_CLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2_SHIFT 10 /* ASYNC_CLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2_WIDTH 1 /* ASYNC_CLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2 0x0200 /* SYSCLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2_MASK 0x0200 /* SYSCLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2_SHIFT 9 /* SYSCLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2_WIDTH 1 /* SYSCLK_ENA_LOW_EINT2 */ +#define ARIZONA_V2_ISRC1_CFG_ERR_EINT2 0x0100 /* ISRC1_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC1_CFG_ERR_EINT2_MASK 0x0100 /* ISRC1_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC1_CFG_ERR_EINT2_SHIFT 8 /* ISRC1_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC1_CFG_ERR_EINT2_WIDTH 1 /* ISRC1_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC2_CFG_ERR_EINT2 0x0080 /* ISRC2_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC2_CFG_ERR_EINT2_MASK 0x0080 /* ISRC2_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC2_CFG_ERR_EINT2_SHIFT 7 /* ISRC2_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC2_CFG_ERR_EINT2_WIDTH 1 /* ISRC2_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC3_CFG_ERR_EINT2 0x0040 /* ISRC3_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC3_CFG_ERR_EINT2_MASK 0x0040 /* ISRC3_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC3_CFG_ERR_EINT2_SHIFT 6 /* ISRC3_CFG_ERR_EINT2 */ +#define ARIZONA_V2_ISRC3_CFG_ERR_EINT2_WIDTH 1 /* ISRC3_CFG_ERR_EINT2 */ /* * R3348 (0xD14) - IRQ2 Status 5 @@ -7969,70 +7968,70 @@ /* * R3355 (0xD1B) - IRQ2 Status 4 Mask */ -#define ARIZONA_IM_ASRC_CFG_ERR_EINT2 0x8000 /* IM_ASRC_CFG_ERR_EINT2 */ -#define ARIZONA_IM_ASRC_CFG_ERR_EINT2_MASK 0x8000 /* IM_ASRC_CFG_ERR_EINT2 */ -#define ARIZONA_IM_ASRC_CFG_ERR_EINT2_SHIFT 15 /* IM_ASRC_CFG_ERR_EINT2 */ -#define ARIZONA_IM_ASRC_CFG_ERR_EINT2_WIDTH 1 /* IM_ASRC_CFG_ERR_EINT2 */ -#define ARIZONA_IM_AIF3_ERR_EINT2 0x4000 /* IM_AIF3_ERR_EINT2 */ -#define ARIZONA_IM_AIF3_ERR_EINT2_MASK 0x4000 /* IM_AIF3_ERR_EINT2 */ -#define ARIZONA_IM_AIF3_ERR_EINT2_SHIFT 14 /* IM_AIF3_ERR_EINT2 */ -#define ARIZONA_IM_AIF3_ERR_EINT2_WIDTH 1 /* IM_AIF3_ERR_EINT2 */ -#define ARIZONA_IM_AIF2_ERR_EINT2 0x2000 /* IM_AIF2_ERR_EINT2 */ -#define ARIZONA_IM_AIF2_ERR_EINT2_MASK 0x2000 /* IM_AIF2_ERR_EINT2 */ -#define ARIZONA_IM_AIF2_ERR_EINT2_SHIFT 13 /* IM_AIF2_ERR_EINT2 */ -#define ARIZONA_IM_AIF2_ERR_EINT2_WIDTH 1 /* IM_AIF2_ERR_EINT2 */ -#define ARIZONA_IM_AIF1_ERR_EINT2 0x1000 /* IM_AIF1_ERR_EINT2 */ -#define ARIZONA_IM_AIF1_ERR_EINT2_MASK 0x1000 /* IM_AIF1_ERR_EINT2 */ -#define ARIZONA_IM_AIF1_ERR_EINT2_SHIFT 12 /* IM_AIF1_ERR_EINT2 */ -#define ARIZONA_IM_AIF1_ERR_EINT2_WIDTH 1 /* IM_AIF1_ERR_EINT2 */ -#define ARIZONA_IM_CTRLIF_ERR_EINT2 0x0800 /* IM_CTRLIF_ERR_EINT2 */ -#define ARIZONA_IM_CTRLIF_ERR_EINT2_MASK 0x0800 /* IM_CTRLIF_ERR_EINT2 */ -#define ARIZONA_IM_CTRLIF_ERR_EINT2_SHIFT 11 /* IM_CTRLIF_ERR_EINT2 */ -#define ARIZONA_IM_CTRLIF_ERR_EINT2_WIDTH 1 /* IM_CTRLIF_ERR_EINT2 */ -#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2 0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */ -#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_MASK 0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */ -#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_SHIFT 10 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */ -#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_WIDTH 1 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */ -#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2 0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */ -#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_MASK 0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */ -#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_SHIFT 9 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */ -#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_WIDTH 1 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */ -#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2 0x0100 /* IM_SYSCLK_ENA_LOW_EINT2 */ -#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_MASK 0x0100 /* IM_SYSCLK_ENA_LOW_EINT2 */ -#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_SHIFT 8 /* IM_SYSCLK_ENA_LOW_EINT2 */ -#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_WIDTH 1 /* IM_SYSCLK_ENA_LOW_EINT2 */ -#define ARIZONA_IM_ISRC1_CFG_ERR_EINT2 0x0080 /* IM_ISRC1_CFG_ERR_EINT2 */ -#define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_MASK 0x0080 /* IM_ISRC1_CFG_ERR_EINT2 */ -#define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_SHIFT 7 /* IM_ISRC1_CFG_ERR_EINT2 */ -#define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_WIDTH 1 /* IM_ISRC1_CFG_ERR_EINT2 */ -#define ARIZONA_IM_ISRC2_CFG_ERR_EINT2 0x0040 /* IM_ISRC2_CFG_ERR_EINT2 */ -#define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_MASK 0x0040 /* IM_ISRC2_CFG_ERR_EINT2 */ -#define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_SHIFT 6 /* IM_ISRC2_CFG_ERR_EINT2 */ -#define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_WIDTH 1 /* IM_ISRC2_CFG_ERR_EINT2 */ -#define ARIZONA_IM_HP3R_DONE_EINT2 0x0020 /* IM_HP3R_DONE_EINT2 */ -#define ARIZONA_IM_HP3R_DONE_EINT2_MASK 0x0020 /* IM_HP3R_DONE_EINT2 */ -#define ARIZONA_IM_HP3R_DONE_EINT2_SHIFT 5 /* IM_HP3R_DONE_EINT2 */ -#define ARIZONA_IM_HP3R_DONE_EINT2_WIDTH 1 /* IM_HP3R_DONE_EINT2 */ -#define ARIZONA_IM_HP3L_DONE_EINT2 0x0010 /* IM_HP3L_DONE_EINT2 */ -#define ARIZONA_IM_HP3L_DONE_EINT2_MASK 0x0010 /* IM_HP3L_DONE_EINT2 */ -#define ARIZONA_IM_HP3L_DONE_EINT2_SHIFT 4 /* IM_HP3L_DONE_EINT2 */ -#define ARIZONA_IM_HP3L_DONE_EINT2_WIDTH 1 /* IM_HP3L_DONE_EINT2 */ -#define ARIZONA_IM_HP2R_DONE_EINT2 0x0008 /* IM_HP2R_DONE_EINT2 */ -#define ARIZONA_IM_HP2R_DONE_EINT2_MASK 0x0008 /* IM_HP2R_DONE_EINT2 */ -#define ARIZONA_IM_HP2R_DONE_EINT2_SHIFT 3 /* IM_HP2R_DONE_EINT2 */ -#define ARIZONA_IM_HP2R_DONE_EINT2_WIDTH 1 /* IM_HP2R_DONE_EINT2 */ -#define ARIZONA_IM_HP2L_DONE_EINT2 0x0004 /* IM_HP2L_DONE_EINT2 */ -#define ARIZONA_IM_HP2L_DONE_EINT2_MASK 0x0004 /* IM_HP2L_DONE_EINT2 */ -#define ARIZONA_IM_HP2L_DONE_EINT2_SHIFT 2 /* IM_HP2L_DONE_EINT2 */ -#define ARIZONA_IM_HP2L_DONE_EINT2_WIDTH 1 /* IM_HP2L_DONE_EINT2 */ -#define ARIZONA_IM_HP1R_DONE_EINT2 0x0002 /* IM_HP1R_DONE_EINT2 */ -#define ARIZONA_IM_HP1R_DONE_EINT2_MASK 0x0002 /* IM_HP1R_DONE_EINT2 */ -#define ARIZONA_IM_HP1R_DONE_EINT2_SHIFT 1 /* IM_HP1R_DONE_EINT2 */ -#define ARIZONA_IM_HP1R_DONE_EINT2_WIDTH 1 /* IM_HP1R_DONE_EINT2 */ -#define ARIZONA_IM_HP1L_DONE_EINT2 0x0001 /* IM_HP1L_DONE_EINT2 */ -#define ARIZONA_IM_HP1L_DONE_EINT2_MASK 0x0001 /* IM_HP1L_DONE_EINT2 */ -#define ARIZONA_IM_HP1L_DONE_EINT2_SHIFT 0 /* IM_HP1L_DONE_EINT2 */ -#define ARIZONA_IM_HP1L_DONE_EINT2_WIDTH 1 /* IM_HP1L_DONE_EINT2 */ +#define ARIZONA_IM_ASRC_CFG_ERR_EINT2 0x8000 /* IM_ASRC_CFG_ERR_EINT2 */ +#define ARIZONA_IM_ASRC_CFG_ERR_EINT2_MASK 0x8000 /* IM_ASRC_CFG_ERR_EINT2 */ +#define ARIZONA_IM_ASRC_CFG_ERR_EINT2_SHIFT 15 /* IM_ASRC_CFG_ERR_EINT2 */ +#define ARIZONA_IM_ASRC_CFG_ERR_EINT2_WIDTH 1 /* IM_ASRC_CFG_ERR_EINT2 */ +#define ARIZONA_IM_AIF3_ERR_EINT2 0x4000 /* IM_AIF3_ERR_EINT2 */ +#define ARIZONA_IM_AIF3_ERR_EINT2_MASK 0x4000 /* IM_AIF3_ERR_EINT2 */ +#define ARIZONA_IM_AIF3_ERR_EINT2_SHIFT 14 /* IM_AIF3_ERR_EINT2 */ +#define ARIZONA_IM_AIF3_ERR_EINT2_WIDTH 1 /* IM_AIF3_ERR_EINT2 */ +#define ARIZONA_IM_AIF2_ERR_EINT2 0x2000 /* IM_AIF2_ERR_EINT2 */ +#define ARIZONA_IM_AIF2_ERR_EINT2_MASK 0x2000 /* IM_AIF2_ERR_EINT2 */ +#define ARIZONA_IM_AIF2_ERR_EINT2_SHIFT 13 /* IM_AIF2_ERR_EINT2 */ +#define ARIZONA_IM_AIF2_ERR_EINT2_WIDTH 1 /* IM_AIF2_ERR_EINT2 */ +#define ARIZONA_IM_AIF1_ERR_EINT2 0x1000 /* IM_AIF1_ERR_EINT2 */ +#define ARIZONA_IM_AIF1_ERR_EINT2_MASK 0x1000 /* IM_AIF1_ERR_EINT2 */ +#define ARIZONA_IM_AIF1_ERR_EINT2_SHIFT 12 /* IM_AIF1_ERR_EINT2 */ +#define ARIZONA_IM_AIF1_ERR_EINT2_WIDTH 1 /* IM_AIF1_ERR_EINT2 */ +#define ARIZONA_IM_CTRLIF_ERR_EINT2 0x0800 /* IM_CTRLIF_ERR_EINT2 */ +#define ARIZONA_IM_CTRLIF_ERR_EINT2_MASK 0x0800 /* IM_CTRLIF_ERR_EINT2 */ +#define ARIZONA_IM_CTRLIF_ERR_EINT2_SHIFT 11 /* IM_CTRLIF_ERR_EINT2 */ +#define ARIZONA_IM_CTRLIF_ERR_EINT2_WIDTH 1 /* IM_CTRLIF_ERR_EINT2 */ +#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2 0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */ +#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_MASK 0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */ +#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_SHIFT 10 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */ +#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_WIDTH 1 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */ +#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2 0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */ +#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_MASK 0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */ +#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_SHIFT 9 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */ +#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_WIDTH 1 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */ +#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2 0x0100 /* IM_SYSCLK_ENA_LOW_EINT2 */ +#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_MASK 0x0100 /* IM_SYSCLK_ENA_LOW_EINT2 */ +#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_SHIFT 8 /* IM_SYSCLK_ENA_LOW_EINT2 */ +#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_WIDTH 1 /* IM_SYSCLK_ENA_LOW_EINT2 */ +#define ARIZONA_IM_ISRC1_CFG_ERR_EINT2 0x0080 /* IM_ISRC1_CFG_ERR_EINT2 */ +#define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_MASK 0x0080 /* IM_ISRC1_CFG_ERR_EINT2 */ +#define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_SHIFT 7 /* IM_ISRC1_CFG_ERR_EINT2 */ +#define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_WIDTH 1 /* IM_ISRC1_CFG_ERR_EINT2 */ +#define ARIZONA_IM_ISRC2_CFG_ERR_EINT2 0x0040 /* IM_ISRC2_CFG_ERR_EINT2 */ +#define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_MASK 0x0040 /* IM_ISRC2_CFG_ERR_EINT2 */ +#define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_SHIFT 6 /* IM_ISRC2_CFG_ERR_EINT2 */ +#define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_WIDTH 1 /* IM_ISRC2_CFG_ERR_EINT2 */ +#define ARIZONA_IM_HP3R_DONE_EINT2 0x0020 /* IM_HP3R_DONE_EINT2 */ +#define ARIZONA_IM_HP3R_DONE_EINT2_MASK 0x0020 /* IM_HP3R_DONE_EINT2 */ +#define ARIZONA_IM_HP3R_DONE_EINT2_SHIFT 5 /* IM_HP3R_DONE_EINT2 */ +#define ARIZONA_IM_HP3R_DONE_EINT2_WIDTH 1 /* IM_HP3R_DONE_EINT2 */ +#define ARIZONA_IM_HP3L_DONE_EINT2 0x0010 /* IM_HP3L_DONE_EINT2 */ +#define ARIZONA_IM_HP3L_DONE_EINT2_MASK 0x0010 /* IM_HP3L_DONE_EINT2 */ +#define ARIZONA_IM_HP3L_DONE_EINT2_SHIFT 4 /* IM_HP3L_DONE_EINT2 */ +#define ARIZONA_IM_HP3L_DONE_EINT2_WIDTH 1 /* IM_HP3L_DONE_EINT2 */ +#define ARIZONA_IM_HP2R_DONE_EINT2 0x0008 /* IM_HP2R_DONE_EINT2 */ +#define ARIZONA_IM_HP2R_DONE_EINT2_MASK 0x0008 /* IM_HP2R_DONE_EINT2 */ +#define ARIZONA_IM_HP2R_DONE_EINT2_SHIFT 3 /* IM_HP2R_DONE_EINT2 */ +#define ARIZONA_IM_HP2R_DONE_EINT2_WIDTH 1 /* IM_HP2R_DONE_EINT2 */ +#define ARIZONA_IM_HP2L_DONE_EINT2 0x0004 /* IM_HP2L_DONE_EINT2 */ +#define ARIZONA_IM_HP2L_DONE_EINT2_MASK 0x0004 /* IM_HP2L_DONE_EINT2 */ +#define ARIZONA_IM_HP2L_DONE_EINT2_SHIFT 2 /* IM_HP2L_DONE_EINT2 */ +#define ARIZONA_IM_HP2L_DONE_EINT2_WIDTH 1 /* IM_HP2L_DONE_EINT2 */ +#define ARIZONA_IM_HP1R_DONE_EINT2 0x0002 /* IM_HP1R_DONE_EINT2 */ +#define ARIZONA_IM_HP1R_DONE_EINT2_MASK 0x0002 /* IM_HP1R_DONE_EINT2 */ +#define ARIZONA_IM_HP1R_DONE_EINT2_SHIFT 1 /* IM_HP1R_DONE_EINT2 */ +#define ARIZONA_IM_HP1R_DONE_EINT2_WIDTH 1 /* IM_HP1R_DONE_EINT2 */ +#define ARIZONA_IM_HP1L_DONE_EINT2 0x0001 /* IM_HP1L_DONE_EINT2 */ +#define ARIZONA_IM_HP1L_DONE_EINT2_MASK 0x0001 /* IM_HP1L_DONE_EINT2 */ +#define ARIZONA_IM_HP1L_DONE_EINT2_SHIFT 0 /* IM_HP1L_DONE_EINT2 */ +#define ARIZONA_IM_HP1L_DONE_EINT2_WIDTH 1 /* IM_HP1L_DONE_EINT2 */ /* * R3355 (0xD1B) - IRQ2 Status 4 Mask (Alternate layout) @@ -8424,50 +8423,50 @@ /* * R3365 (0xD25) - Interrupt Raw Status 7 */ -#define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS 0x8000 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */ -#define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS_MASK 0x8000 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */ +#define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS 0x8000 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */ +#define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS_MASK 0x8000 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */ #define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS_SHIFT 15 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */ #define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS_WIDTH 1 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */ -#define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS 0x4000 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */ -#define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_MASK 0x4000 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */ -#define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_SHIFT 14 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */ -#define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_WIDTH 1 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */ -#define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS 0x2000 /* SLIMBUS_SYNC_OVERCLOCKED_STS */ -#define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_MASK 0x2000 /* SLIMBUS_SYNC_OVERCLOCKED_STS */ -#define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_SHIFT 13 /* SLIMBUS_SYNC_OVERCLOCKED_STS */ -#define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_WIDTH 1 /* SLIMBUS_SYNC_OVERCLOCKED_STS */ -#define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS 0x1000 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */ -#define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS_MASK 0x1000 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */ +#define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS 0x4000 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */ +#define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_MASK 0x4000 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */ +#define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_SHIFT 14 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */ +#define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_WIDTH 1 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */ +#define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS 0x2000 /* SLIMBUS_SYNC_OVERCLOCKED_STS */ +#define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_MASK 0x2000 /* SLIMBUS_SYNC_OVERCLOCKED_STS */ +#define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_SHIFT 13 /* SLIMBUS_SYNC_OVERCLOCKED_STS */ +#define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_WIDTH 1 /* SLIMBUS_SYNC_OVERCLOCKED_STS */ +#define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS 0x1000 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */ +#define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS_MASK 0x1000 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */ #define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS_SHIFT 12 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */ #define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS_WIDTH 1 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */ -#define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS 0x0800 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */ +#define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS 0x0800 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */ #define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS_MASK 0x0800 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */ -#define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS_SHIFT 11 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */ -#define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS_WIDTH 1 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */ -#define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS 0x0400 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */ -#define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_MASK 0x0400 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */ -#define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_SHIFT 10 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */ -#define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_WIDTH 1 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */ -#define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS 0x0200 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */ -#define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS_MASK 0x0200 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */ +#define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS_SHIFT 11 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */ +#define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS_WIDTH 1 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */ +#define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS 0x0400 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */ +#define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_MASK 0x0400 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */ +#define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_SHIFT 10 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */ +#define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_WIDTH 1 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */ +#define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS 0x0200 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */ +#define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS_MASK 0x0200 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */ #define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS_SHIFT 9 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */ #define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS_WIDTH 1 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */ -#define ARIZONA_ADSP2_1_OVERCLOCKED_STS 0x0008 /* ADSP2_1_OVERCLOCKED_STS */ -#define ARIZONA_ADSP2_1_OVERCLOCKED_STS_MASK 0x0008 /* ADSP2_1_OVERCLOCKED_STS */ -#define ARIZONA_ADSP2_1_OVERCLOCKED_STS_SHIFT 3 /* ADSP2_1_OVERCLOCKED_STS */ -#define ARIZONA_ADSP2_1_OVERCLOCKED_STS_WIDTH 1 /* ADSP2_1_OVERCLOCKED_STS */ -#define ARIZONA_ISRC3_OVERCLOCKED_STS 0x0004 /* ISRC3_OVERCLOCKED_STS */ -#define ARIZONA_ISRC3_OVERCLOCKED_STS_MASK 0x0004 /* ISRC3_OVERCLOCKED_STS */ -#define ARIZONA_ISRC3_OVERCLOCKED_STS_SHIFT 2 /* ISRC3_OVERCLOCKED_STS */ -#define ARIZONA_ISRC3_OVERCLOCKED_STS_WIDTH 1 /* ISRC3_OVERCLOCKED_STS */ -#define ARIZONA_ISRC2_OVERCLOCKED_STS 0x0002 /* ISRC2_OVERCLOCKED_STS */ -#define ARIZONA_ISRC2_OVERCLOCKED_STS_MASK 0x0002 /* ISRC2_OVERCLOCKED_STS */ -#define ARIZONA_ISRC2_OVERCLOCKED_STS_SHIFT 1 /* ISRC2_OVERCLOCKED_STS */ -#define ARIZONA_ISRC2_OVERCLOCKED_STS_WIDTH 1 /* ISRC2_OVERCLOCKED_STS */ -#define ARIZONA_ISRC1_OVERCLOCKED_STS 0x0001 /* ISRC1_OVERCLOCKED_STS */ -#define ARIZONA_ISRC1_OVERCLOCKED_STS_MASK 0x0001 /* ISRC1_OVERCLOCKED_STS */ -#define ARIZONA_ISRC1_OVERCLOCKED_STS_SHIFT 0 /* ISRC1_OVERCLOCKED_STS */ -#define ARIZONA_ISRC1_OVERCLOCKED_STS_WIDTH 1 /* ISRC1_OVERCLOCKED_STS */ +#define ARIZONA_ADSP2_1_OVERCLOCKED_STS 0x0008 /* ADSP2_1_OVERCLOCKED_STS */ +#define ARIZONA_ADSP2_1_OVERCLOCKED_STS_MASK 0x0008 /* ADSP2_1_OVERCLOCKED_STS */ +#define ARIZONA_ADSP2_1_OVERCLOCKED_STS_SHIFT 3 /* ADSP2_1_OVERCLOCKED_STS */ +#define ARIZONA_ADSP2_1_OVERCLOCKED_STS_WIDTH 1 /* ADSP2_1_OVERCLOCKED_STS */ +#define ARIZONA_ISRC3_OVERCLOCKED_STS 0x0004 /* ISRC3_OVERCLOCKED_STS */ +#define ARIZONA_ISRC3_OVERCLOCKED_STS_MASK 0x0004 /* ISRC3_OVERCLOCKED_STS */ +#define ARIZONA_ISRC3_OVERCLOCKED_STS_SHIFT 2 /* ISRC3_OVERCLOCKED_STS */ +#define ARIZONA_ISRC3_OVERCLOCKED_STS_WIDTH 1 /* ISRC3_OVERCLOCKED_STS */ +#define ARIZONA_ISRC2_OVERCLOCKED_STS 0x0002 /* ISRC2_OVERCLOCKED_STS */ +#define ARIZONA_ISRC2_OVERCLOCKED_STS_MASK 0x0002 /* ISRC2_OVERCLOCKED_STS */ +#define ARIZONA_ISRC2_OVERCLOCKED_STS_SHIFT 1 /* ISRC2_OVERCLOCKED_STS */ +#define ARIZONA_ISRC2_OVERCLOCKED_STS_WIDTH 1 /* ISRC2_OVERCLOCKED_STS */ +#define ARIZONA_ISRC1_OVERCLOCKED_STS 0x0001 /* ISRC1_OVERCLOCKED_STS */ +#define ARIZONA_ISRC1_OVERCLOCKED_STS_MASK 0x0001 /* ISRC1_OVERCLOCKED_STS */ +#define ARIZONA_ISRC1_OVERCLOCKED_STS_SHIFT 0 /* ISRC1_OVERCLOCKED_STS */ +#define ARIZONA_ISRC1_OVERCLOCKED_STS_WIDTH 1 /* ISRC1_OVERCLOCKED_STS */ /* * R3366 (0xD26) - Interrupt Raw Status 8 @@ -9758,70 +9757,70 @@ /* * R3808 (0xED0) - ASRC2_ENABLE */ -#define CLEARWATER_ASRC2_IN2L_ENA 0x0008 /* ASRC2L_ENA */ -#define CLEARWATER_ASRC2_IN2L_ENA_MASK 0x0008 /* ASRC2L_ENA */ -#define CLEARWATER_ASRC2_IN2L_ENA_SHIFT 3 /* ASRC2L_ENA */ -#define CLEARWATER_ASRC2_IN2L_ENA_WIDTH 1 /* ASRC2L_ENA */ -#define CLEARWATER_ASRC2_IN2R_ENA 0x0004 /* ASRC2R_ENA */ -#define CLEARWATER_ASRC2_IN2R_ENA_MASK 0x0004 /* ASRC2R_ENA */ -#define CLEARWATER_ASRC2_IN2R_ENA_SHIFT 2 /* ASRC2R_ENA */ -#define CLEARWATER_ASRC2_IN2R_ENA_WIDTH 1 /* ASRC2R_ENA */ -#define CLEARWATER_ASRC2_IN1L_ENA 0x0002 /* ASRC1L_ENA */ -#define CLEARWATER_ASRC2_IN1L_ENA_MASK 0x0002 /* ASRC1L_ENA */ -#define CLEARWATER_ASRC2_IN1L_ENA_SHIFT 1 /* ASRC1L_ENA */ -#define CLEARWATER_ASRC2_IN1L_ENA_WIDTH 1 /* ASRC1L_ENA */ -#define CLEARWATER_ASRC2_IN1R_ENA 0x0001 /* ASRC1R_ENA */ -#define CLEARWATER_ASRC2_IN1R_ENA_MASK 0x0001 /* ASRC1R_ENA */ -#define CLEARWATER_ASRC2_IN1R_ENA_SHIFT 0 /* ASRC1R_ENA */ -#define CLEARWATER_ASRC2_IN1R_ENA_WIDTH 1 /* ASRC1R_ENA */ +#define CLEARWATER_ASRC2_IN2L_ENA 0x0008 /* ASRC2L_ENA */ +#define CLEARWATER_ASRC2_IN2L_ENA_MASK 0x0008 /* ASRC2L_ENA */ +#define CLEARWATER_ASRC2_IN2L_ENA_SHIFT 3 /* ASRC2L_ENA */ +#define CLEARWATER_ASRC2_IN2L_ENA_WIDTH 1 /* ASRC2L_ENA */ +#define CLEARWATER_ASRC2_IN2R_ENA 0x0004 /* ASRC2R_ENA */ +#define CLEARWATER_ASRC2_IN2R_ENA_MASK 0x0004 /* ASRC2R_ENA */ +#define CLEARWATER_ASRC2_IN2R_ENA_SHIFT 2 /* ASRC2R_ENA */ +#define CLEARWATER_ASRC2_IN2R_ENA_WIDTH 1 /* ASRC2R_ENA */ +#define CLEARWATER_ASRC2_IN1L_ENA 0x0002 /* ASRC1L_ENA */ +#define CLEARWATER_ASRC2_IN1L_ENA_MASK 0x0002 /* ASRC1L_ENA */ +#define CLEARWATER_ASRC2_IN1L_ENA_SHIFT 1 /* ASRC1L_ENA */ +#define CLEARWATER_ASRC2_IN1L_ENA_WIDTH 1 /* ASRC1L_ENA */ +#define CLEARWATER_ASRC2_IN1R_ENA 0x0001 /* ASRC1R_ENA */ +#define CLEARWATER_ASRC2_IN1R_ENA_MASK 0x0001 /* ASRC1R_ENA */ +#define CLEARWATER_ASRC2_IN1R_ENA_SHIFT 0 /* ASRC1R_ENA */ +#define CLEARWATER_ASRC2_IN1R_ENA_WIDTH 1 /* ASRC1R_ENA */ /* * R3810 (0xED2) - ASRC2_RATE1 */ -#define CLEARWATER_ASRC2_RATE1_MASK 0x7800 /* ASRC_RATE1 - [14:11] */ -#define CLEARWATER_ASRC2_RATE1_SHIFT 11 /* ASRC_RATE1 - [14:11] */ -#define CLEARWATER_ASRC2_RATE1_WIDTH 4 /* ASRC_RATE1 - [14:11] */ +#define CLEARWATER_ASRC2_RATE1_MASK 0x7800 /* ASRC_RATE1 - [14:11] */ +#define CLEARWATER_ASRC2_RATE1_SHIFT 11 /* ASRC_RATE1 - [14:11] */ +#define CLEARWATER_ASRC2_RATE1_WIDTH 4 /* ASRC_RATE1 - [14:11] */ /* * R3811 (0xED3) - ASRC2_RATE2 */ -#define CLEARWATER_ASRC2_RATE2_MASK 0x7800 /* ASRC_RATE2 - [14:11] */ -#define CLEARWATER_ASRC2_RATE2_SHIFT 11 /* ASRC_RATE2 - [14:11] */ -#define CLEARWATER_ASRC2_RATE2_WIDTH 4 /* ASRC_RATE2 - [14:11] */ +#define CLEARWATER_ASRC2_RATE2_MASK 0x7800 /* ASRC_RATE2 - [14:11] */ +#define CLEARWATER_ASRC2_RATE2_SHIFT 11 /* ASRC_RATE2 - [14:11] */ +#define CLEARWATER_ASRC2_RATE2_WIDTH 4 /* ASRC_RATE2 - [14:11] */ /* * R3808 (0xEE0) - ASRC1_ENABLE */ -#define CLEARWATER_ASRC1_IN2L_ENA 0x0008 /* ASRC2L_ENA */ -#define CLEARWATER_ASRC1_IN2L_ENA_MASK 0x0008 /* ASRC2L_ENA */ -#define CLEARWATER_ASRC1_IN2L_ENA_SHIFT 3 /* ASRC2L_ENA */ -#define CLEARWATER_ASRC1_IN2L_ENA_WIDTH 1 /* ASRC2L_ENA */ -#define CLEARWATER_ASRC1_IN2R_ENA 0x0004 /* ASRC2R_ENA */ -#define CLEARWATER_ASRC1_IN2R_ENA_MASK 0x0004 /* ASRC2R_ENA */ -#define CLEARWATER_ASRC1_IN2R_ENA_SHIFT 2 /* ASRC2R_ENA */ -#define CLEARWATER_ASRC1_IN2R_ENA_WIDTH 1 /* ASRC2R_ENA */ -#define CLEARWATER_ASRC1_IN1L_ENA 0x0002 /* ASRC1L_ENA */ -#define CLEARWATER_ASRC1_IN1L_ENA_MASK 0x0002 /* ASRC1L_ENA */ -#define CLEARWATER_ASRC1_IN1L_ENA_SHIFT 1 /* ASRC1L_ENA */ -#define CLEARWATER_ASRC1_IN1L_ENA_WIDTH 1 /* ASRC1L_ENA */ -#define CLEARWATER_ASRC1_IN1R_ENA 0x0001 /* ASRC1R_ENA */ -#define CLEARWATER_ASRC1_IN1R_ENA_MASK 0x0001 /* ASRC1R_ENA */ -#define CLEARWATER_ASRC1_IN1R_ENA_SHIFT 0 /* ASRC1R_ENA */ -#define CLEARWATER_ASRC1_IN1R_ENA_WIDTH 1 /* ASRC1R_ENA */ +#define CLEARWATER_ASRC1_IN2L_ENA 0x0008 /* ASRC2L_ENA */ +#define CLEARWATER_ASRC1_IN2L_ENA_MASK 0x0008 /* ASRC2L_ENA */ +#define CLEARWATER_ASRC1_IN2L_ENA_SHIFT 3 /* ASRC2L_ENA */ +#define CLEARWATER_ASRC1_IN2L_ENA_WIDTH 1 /* ASRC2L_ENA */ +#define CLEARWATER_ASRC1_IN2R_ENA 0x0004 /* ASRC2R_ENA */ +#define CLEARWATER_ASRC1_IN2R_ENA_MASK 0x0004 /* ASRC2R_ENA */ +#define CLEARWATER_ASRC1_IN2R_ENA_SHIFT 2 /* ASRC2R_ENA */ +#define CLEARWATER_ASRC1_IN2R_ENA_WIDTH 1 /* ASRC2R_ENA */ +#define CLEARWATER_ASRC1_IN1L_ENA 0x0002 /* ASRC1L_ENA */ +#define CLEARWATER_ASRC1_IN1L_ENA_MASK 0x0002 /* ASRC1L_ENA */ +#define CLEARWATER_ASRC1_IN1L_ENA_SHIFT 1 /* ASRC1L_ENA */ +#define CLEARWATER_ASRC1_IN1L_ENA_WIDTH 1 /* ASRC1L_ENA */ +#define CLEARWATER_ASRC1_IN1R_ENA 0x0001 /* ASRC1R_ENA */ +#define CLEARWATER_ASRC1_IN1R_ENA_MASK 0x0001 /* ASRC1R_ENA */ +#define CLEARWATER_ASRC1_IN1R_ENA_SHIFT 0 /* ASRC1R_ENA */ +#define CLEARWATER_ASRC1_IN1R_ENA_WIDTH 1 /* ASRC1R_ENA */ /* * R3810 (0xEE2) - ASRC1_RATE1 */ -#define CLEARWATER_ASRC1_RATE1_MASK 0x7800 /* ASRC_RATE1 - [14:11] */ -#define CLEARWATER_ASRC1_RATE1_SHIFT 11 /* ASRC_RATE1 - [14:11] */ -#define CLEARWATER_ASRC1_RATE1_WIDTH 4 /* ASRC_RATE1 - [14:11] */ +#define CLEARWATER_ASRC1_RATE1_MASK 0x7800 /* ASRC_RATE1 - [14:11] */ +#define CLEARWATER_ASRC1_RATE1_SHIFT 11 /* ASRC_RATE1 - [14:11] */ +#define CLEARWATER_ASRC1_RATE1_WIDTH 4 /* ASRC_RATE1 - [14:11] */ /* * R3811 (0xEE3) - ASRC1_RATE2 */ -#define CLEARWATER_ASRC1_RATE2_MASK 0x7800 /* ASRC_RATE2 - [14:11] */ -#define CLEARWATER_ASRC1_RATE2_SHIFT 11 /* ASRC_RATE2 - [14:11] */ -#define CLEARWATER_ASRC1_RATE2_WIDTH 4 /* ASRC_RATE2 - [14:11] */ +#define CLEARWATER_ASRC1_RATE2_MASK 0x7800 /* ASRC_RATE2 - [14:11] */ +#define CLEARWATER_ASRC1_RATE2_SHIFT 11 /* ASRC_RATE2 - [14:11] */ +#define CLEARWATER_ASRC1_RATE2_WIDTH 4 /* ASRC_RATE2 - [14:11] */ /* * R3808 (0xEE0) - ASRC_ENABLE @@ -10185,550 +10184,550 @@ /* * R1718 (0x1380) - FRF_Coefficient_1L_1 */ -#define CLEARWATER_FRF_COEFF_1L_1_MASK 0xFFFF /* FRF_COEFF_1L_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_1L_1_SHIFT 0 /* FRF_COEFF_1L_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_1L_1_WIDTH 16 /* FRF_COEFF_1L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_1_MASK 0xFFFF /* FRF_COEFF_1L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_1_SHIFT 0 /* FRF_COEFF_1L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_1_WIDTH 16 /* FRF_COEFF_1L_1 - [15:0] */ /* * R1719 (0x1381) - FRF_Coefficient_1L_2 */ -#define CLEARWATER_FRF_COEFF_1L_2_MASK 0xFFFF /* FRF_COEFF_1L_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_1L_2_SHIFT 0 /* FRF_COEFF_1L_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_1L_2_WIDTH 16 /* FRF_COEFF_1L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_2_MASK 0xFFFF /* FRF_COEFF_1L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_2_SHIFT 0 /* FRF_COEFF_1L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_2_WIDTH 16 /* FRF_COEFF_1L_2 - [15:0] */ /* * R1720 (0x1382) - FRF_Coefficient_1L_3 */ -#define CLEARWATER_FRF_COEFF_1L_3_MASK 0xFFFF /* FRF_COEFF_1L_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_1L_3_SHIFT 0 /* FRF_COEFF_1L_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_1L_3_WIDTH 16 /* FRF_COEFF_1L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_3_MASK 0xFFFF /* FRF_COEFF_1L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_3_SHIFT 0 /* FRF_COEFF_1L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_3_WIDTH 16 /* FRF_COEFF_1L_3 - [15:0] */ /* * R1721 (0x1383) - FRF_Coefficient_1L_4 */ -#define CLEARWATER_FRF_COEFF_1L_4_MASK 0xFFFF /* FRF_COEFF_1L_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_1L_4_SHIFT 0 /* FRF_COEFF_1L_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_1L_4_WIDTH 16 /* FRF_COEFF_1L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_4_MASK 0xFFFF /* FRF_COEFF_1L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_4_SHIFT 0 /* FRF_COEFF_1L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1L_4_WIDTH 16 /* FRF_COEFF_1L_4 - [15:0] */ /* * R1722 (0x1390) - FRF_Coefficient_1R_1 */ -#define CLEARWATER_FRF_COEFF_1R_1_MASK 0xFFFF /* FRF_COEFF_1R_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_1R_1_SHIFT 0 /* FRF_COEFF_1R_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_1R_1_WIDTH 16 /* FRF_COEFF_1R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_1_MASK 0xFFFF /* FRF_COEFF_1R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_1_SHIFT 0 /* FRF_COEFF_1R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_1_WIDTH 16 /* FRF_COEFF_1R_1 - [15:0] */ /* * R1723 (0x1391) - FRF_Coefficient_1R_2 */ -#define CLEARWATER_FRF_COEFF_1R_2_MASK 0xFFFF /* FRF_COEFF_1R_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_1R_2_SHIFT 0 /* FRF_COEFF_1R_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_1R_2_WIDTH 16 /* FRF_COEFF_1R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_2_MASK 0xFFFF /* FRF_COEFF_1R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_2_SHIFT 0 /* FRF_COEFF_1R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_2_WIDTH 16 /* FRF_COEFF_1R_2 - [15:0] */ /* * R1724 (0x1392) - FRF_Coefficient_1R_3 */ -#define CLEARWATER_FRF_COEFF_1R_3_MASK 0xFFFF /* FRF_COEFF_1R_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_1R_3_SHIFT 0 /* FRF_COEFF_1R_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_1R_3_WIDTH 16 /* FRF_COEFF_1R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_3_MASK 0xFFFF /* FRF_COEFF_1R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_3_SHIFT 0 /* FRF_COEFF_1R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_3_WIDTH 16 /* FRF_COEFF_1R_3 - [15:0] */ /* * R1725 (0x1393) - FRF_Coefficient_1R_4 */ -#define CLEARWATER_FRF_COEFF_1R_4_MASK 0xFFFF /* FRF_COEFF_1R_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_1R_4_SHIFT 0 /* FRF_COEFF_1R_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_1R_4_WIDTH 16 /* FRF_COEFF_1R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_4_MASK 0xFFFF /* FRF_COEFF_1R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_4_SHIFT 0 /* FRF_COEFF_1R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_1R_4_WIDTH 16 /* FRF_COEFF_1R_4 - [15:0] */ /* * R1726 (0x13A0) - FRF_Coefficient_2L_1 */ -#define CLEARWATER_FRF_COEFF_2L_1_MASK 0xFFFF /* FRF_COEFF_2L_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_2L_1_SHIFT 0 /* FRF_COEFF_2L_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_2L_1_WIDTH 16 /* FRF_COEFF_2L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_1_MASK 0xFFFF /* FRF_COEFF_2L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_1_SHIFT 0 /* FRF_COEFF_2L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_1_WIDTH 16 /* FRF_COEFF_2L_1 - [15:0] */ /* * R1727 (0x13A1) - FRF_Coefficient_2L_2 */ -#define CLEARWATER_FRF_COEFF_2L_2_MASK 0xFFFF /* FRF_COEFF_2L_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_2L_2_SHIFT 0 /* FRF_COEFF_2L_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_2L_2_WIDTH 16 /* FRF_COEFF_2L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_2_MASK 0xFFFF /* FRF_COEFF_2L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_2_SHIFT 0 /* FRF_COEFF_2L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_2_WIDTH 16 /* FRF_COEFF_2L_2 - [15:0] */ /* * R1728 (0x13A2) - FRF_Coefficient_2L_3 */ -#define CLEARWATER_FRF_COEFF_2L_3_MASK 0xFFFF /* FRF_COEFF_2L_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_2L_3_SHIFT 0 /* FRF_COEFF_2L_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_2L_3_WIDTH 16 /* FRF_COEFF_2L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_3_MASK 0xFFFF /* FRF_COEFF_2L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_3_SHIFT 0 /* FRF_COEFF_2L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_3_WIDTH 16 /* FRF_COEFF_2L_3 - [15:0] */ /* * R1729 (0x13A3) - FRF_Coefficient_2L_4 */ -#define CLEARWATER_FRF_COEFF_2L_4_MASK 0xFFFF /* FRF_COEFF_2L_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_2L_4_SHIFT 0 /* FRF_COEFF_2L_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_2L_4_WIDTH 16 /* FRF_COEFF_2L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_4_MASK 0xFFFF /* FRF_COEFF_2L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_4_SHIFT 0 /* FRF_COEFF_2L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2L_4_WIDTH 16 /* FRF_COEFF_2L_4 - [15:0] */ /* * R1730 (0x13B0) - FRF_Coefficient_2R_1 */ -#define CLEARWATER_FRF_COEFF_2R_1_MASK 0xFFFF /* FRF_COEFF_2R_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_2R_1_SHIFT 0 /* FRF_COEFF_2R_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_2R_1_WIDTH 16 /* FRF_COEFF_2R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_1_MASK 0xFFFF /* FRF_COEFF_2R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_1_SHIFT 0 /* FRF_COEFF_2R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_1_WIDTH 16 /* FRF_COEFF_2R_1 - [15:0] */ /* * R1731 (0x13B1) - FRF_Coefficient_2R_2 */ -#define CLEARWATER_FRF_COEFF_2R_2_MASK 0xFFFF /* FRF_COEFF_2R_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_2R_2_SHIFT 0 /* FRF_COEFF_2R_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_2R_2_WIDTH 16 /* FRF_COEFF_2R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_2_MASK 0xFFFF /* FRF_COEFF_2R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_2_SHIFT 0 /* FRF_COEFF_2R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_2_WIDTH 16 /* FRF_COEFF_2R_2 - [15:0] */ /* * R1732 (0x13B2) - FRF_Coefficient_2R_3 */ -#define CLEARWATER_FRF_COEFF_2R_3_MASK 0xFFFF /* FRF_COEFF_2R_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_2R_3_SHIFT 0 /* FRF_COEFF_2R_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_2R_3_WIDTH 16 /* FRF_COEFF_2R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_3_MASK 0xFFFF /* FRF_COEFF_2R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_3_SHIFT 0 /* FRF_COEFF_2R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_3_WIDTH 16 /* FRF_COEFF_2R_3 - [15:0] */ /* * R1733 (0x13B3) - FRF_Coefficient_2R_4 */ -#define CLEARWATER_FRF_COEFF_2R_4_MASK 0xFFFF /* FRF_COEFF_2R_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_2R_4_SHIFT 0 /* FRF_COEFF_2R_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_2R_4_WIDTH 16 /* FRF_COEFF_2R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_4_MASK 0xFFFF /* FRF_COEFF_2R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_4_SHIFT 0 /* FRF_COEFF_2R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_2R_4_WIDTH 16 /* FRF_COEFF_2R_4 - [15:0] */ /* * R1734 (0x13C0) - FRF_Coefficient_3L_1 */ -#define CLEARWATER_FRF_COEFF_3L_1_MASK 0xFFFF /* FRF_COEFF_3L_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_3L_1_SHIFT 0 /* FRF_COEFF_3L_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_3L_1_WIDTH 16 /* FRF_COEFF_3L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_1_MASK 0xFFFF /* FRF_COEFF_3L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_1_SHIFT 0 /* FRF_COEFF_3L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_1_WIDTH 16 /* FRF_COEFF_3L_1 - [15:0] */ /* * R1735 (0x13C1) - FRF_Coefficient_3L_2 */ -#define CLEARWATER_FRF_COEFF_3L_2_MASK 0xFFFF /* FRF_COEFF_3L_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_3L_2_SHIFT 0 /* FRF_COEFF_3L_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_3L_2_WIDTH 16 /* FRF_COEFF_3L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_2_MASK 0xFFFF /* FRF_COEFF_3L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_2_SHIFT 0 /* FRF_COEFF_3L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_2_WIDTH 16 /* FRF_COEFF_3L_2 - [15:0] */ /* * R1736 (0x13C2) - FRF_Coefficient_3L_3 */ -#define CLEARWATER_FRF_COEFF_3L_3_MASK 0xFFFF /* FRF_COEFF_3L_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_3L_3_SHIFT 0 /* FRF_COEFF_3L_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_3L_3_WIDTH 16 /* FRF_COEFF_3L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_3_MASK 0xFFFF /* FRF_COEFF_3L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_3_SHIFT 0 /* FRF_COEFF_3L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_3_WIDTH 16 /* FRF_COEFF_3L_3 - [15:0] */ /* * R1737 (0x13C3) - FRF_Coefficient_3L_4 */ -#define CLEARWATER_FRF_COEFF_3L_4_MASK 0xFFFF /* FRF_COEFF_3L_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_3L_4_SHIFT 0 /* FRF_COEFF_3L_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_3L_4_WIDTH 16 /* FRF_COEFF_3L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_4_MASK 0xFFFF /* FRF_COEFF_3L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_4_SHIFT 0 /* FRF_COEFF_3L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3L_4_WIDTH 16 /* FRF_COEFF_3L_4 - [15:0] */ /* * R1738 (0x13D0) - FRF_Coefficient_3R_1 */ -#define CLEARWATER_FRF_COEFF_3R_1_MASK 0xFFFF /* FRF_COEFF_3R_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_3R_1_SHIFT 0 /* FRF_COEFF_3R_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_3R_1_WIDTH 16 /* FRF_COEFF_3R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_1_MASK 0xFFFF /* FRF_COEFF_3R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_1_SHIFT 0 /* FRF_COEFF_3R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_1_WIDTH 16 /* FRF_COEFF_3R_1 - [15:0] */ /* * R1739 (0x13D1) - FRF_Coefficient_3R_2 */ -#define CLEARWATER_FRF_COEFF_3R_2_MASK 0xFFFF /* FRF_COEFF_3R_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_3R_2_SHIFT 0 /* FRF_COEFF_3R_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_3R_2_WIDTH 16 /* FRF_COEFF_3R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_2_MASK 0xFFFF /* FRF_COEFF_3R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_2_SHIFT 0 /* FRF_COEFF_3R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_2_WIDTH 16 /* FRF_COEFF_3R_2 - [15:0] */ /* * R1740 (0x13D2) - FRF_Coefficient_3R_3 */ -#define CLEARWATER_FRF_COEFF_3R_3_MASK 0xFFFF /* FRF_COEFF_3R_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_3R_3_SHIFT 0 /* FRF_COEFF_3R_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_3R_3_WIDTH 16 /* FRF_COEFF_3R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_3_MASK 0xFFFF /* FRF_COEFF_3R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_3_SHIFT 0 /* FRF_COEFF_3R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_3_WIDTH 16 /* FRF_COEFF_3R_3 - [15:0] */ /* * R1741 (0x13D3) - FRF_Coefficient_3R_4 */ -#define CLEARWATER_FRF_COEFF_3R_4_MASK 0xFFFF /* FRF_COEFF_3R_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_3R_4_SHIFT 0 /* FRF_COEFF_3R_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_3R_4_WIDTH 16 /* FRF_COEFF_3R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_4_MASK 0xFFFF /* FRF_COEFF_3R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_4_SHIFT 0 /* FRF_COEFF_3R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_3R_4_WIDTH 16 /* FRF_COEFF_3R_4 - [15:0] */ /* * R1742 (0x13E0) - FRF_Coefficient_4L_1 */ -#define CLEARWATER_FRF_COEFF_4L_1_MASK 0xFFFF /* FRF_COEFF_4L_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_4L_1_SHIFT 0 /* FRF_COEFF_4L_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_4L_1_WIDTH 16 /* FRF_COEFF_4L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_1_MASK 0xFFFF /* FRF_COEFF_4L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_1_SHIFT 0 /* FRF_COEFF_4L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_1_WIDTH 16 /* FRF_COEFF_4L_1 - [15:0] */ /* * R1743 (0x13E1) - FRF_Coefficient_4L_2 */ -#define CLEARWATER_FRF_COEFF_4L_2_MASK 0xFFFF /* FRF_COEFF_4L_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_4L_2_SHIFT 0 /* FRF_COEFF_4L_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_4L_2_WIDTH 16 /* FRF_COEFF_4L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_2_MASK 0xFFFF /* FRF_COEFF_4L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_2_SHIFT 0 /* FRF_COEFF_4L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_2_WIDTH 16 /* FRF_COEFF_4L_2 - [15:0] */ /* * R1744 (0x13E2) - FRF_Coefficient_4L_3 */ -#define CLEARWATER_FRF_COEFF_4L_3_MASK 0xFFFF /* FRF_COEFF_4L_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_4L_3_SHIFT 0 /* FRF_COEFF_4L_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_4L_3_WIDTH 16 /* FRF_COEFF_4L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_3_MASK 0xFFFF /* FRF_COEFF_4L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_3_SHIFT 0 /* FRF_COEFF_4L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_3_WIDTH 16 /* FRF_COEFF_4L_3 - [15:0] */ /* * R1745 (0x13E3) - FRF_Coefficient_4L_4 */ -#define CLEARWATER_FRF_COEFF_4L_4_MASK 0xFFFF /* FRF_COEFF_4L_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_4L_4_SHIFT 0 /* FRF_COEFF_4L_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_4L_4_WIDTH 16 /* FRF_COEFF_4L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_4_MASK 0xFFFF /* FRF_COEFF_4L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_4_SHIFT 0 /* FRF_COEFF_4L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4L_4_WIDTH 16 /* FRF_COEFF_4L_4 - [15:0] */ /* * R1746 (0x13F0) - FRF_Coefficient_4R_1 */ -#define CLEARWATER_FRF_COEFF_4R_1_MASK 0xFFFF /* FRF_COEFF_4R_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_4R_1_SHIFT 0 /* FRF_COEFF_4R_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_4R_1_WIDTH 16 /* FRF_COEFF_4R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_1_MASK 0xFFFF /* FRF_COEFF_4R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_1_SHIFT 0 /* FRF_COEFF_4R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_1_WIDTH 16 /* FRF_COEFF_4R_1 - [15:0] */ /* * R1747 (0x13F1) - FRF_Coefficient_4R_2 */ -#define CLEARWATER_FRF_COEFF_4R_2_MASK 0xFFFF /* FRF_COEFF_4R_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_4R_2_SHIFT 0 /* FRF_COEFF_4R_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_4R_2_WIDTH 16 /* FRF_COEFF_4R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_2_MASK 0xFFFF /* FRF_COEFF_4R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_2_SHIFT 0 /* FRF_COEFF_4R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_2_WIDTH 16 /* FRF_COEFF_4R_2 - [15:0] */ /* * R1748 (0x13F2) - FRF_Coefficient_4R_3 */ -#define CLEARWATER_FRF_COEFF_4R_3_MASK 0xFFFF /* FRF_COEFF_4R_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_4R_3_SHIFT 0 /* FRF_COEFF_4R_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_4R_3_WIDTH 16 /* FRF_COEFF_4R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_3_MASK 0xFFFF /* FRF_COEFF_4R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_3_SHIFT 0 /* FRF_COEFF_4R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_3_WIDTH 16 /* FRF_COEFF_4R_3 - [15:0] */ /* * R1749 (0x13F3) - FRF_Coefficient_4R_4 */ -#define CLEARWATER_FRF_COEFF_4R_4_MASK 0xFFFF /* FRF_COEFF_4R_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_4R_4_SHIFT 0 /* FRF_COEFF_4R_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_4R_4_WIDTH 16 /* FRF_COEFF_4R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_4_MASK 0xFFFF /* FRF_COEFF_4R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_4_SHIFT 0 /* FRF_COEFF_4R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_4R_4_WIDTH 16 /* FRF_COEFF_4R_4 - [15:0] */ /* * R1750 (0x1400) - FRF_Coefficient_5L_1 */ -#define CLEARWATER_FRF_COEFF_5L_1_MASK 0xFFFF /* FRF_COEFF_5L_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_5L_1_SHIFT 0 /* FRF_COEFF_5L_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_5L_1_WIDTH 16 /* FRF_COEFF_5L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_1_MASK 0xFFFF /* FRF_COEFF_5L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_1_SHIFT 0 /* FRF_COEFF_5L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_1_WIDTH 16 /* FRF_COEFF_5L_1 - [15:0] */ /* * R1751 (0x1401) - FRF_Coefficient_5L_2 */ -#define CLEARWATER_FRF_COEFF_5L_2_MASK 0xFFFF /* FRF_COEFF_5L_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_5L_2_SHIFT 0 /* FRF_COEFF_5L_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_5L_2_WIDTH 16 /* FRF_COEFF_5L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_2_MASK 0xFFFF /* FRF_COEFF_5L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_2_SHIFT 0 /* FRF_COEFF_5L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_2_WIDTH 16 /* FRF_COEFF_5L_2 - [15:0] */ /* * R1752 (0x1402) - FRF_Coefficient_5L_3 */ -#define CLEARWATER_FRF_COEFF_5L_3_MASK 0xFFFF /* FRF_COEFF_5L_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_5L_3_SHIFT 0 /* FRF_COEFF_5L_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_5L_3_WIDTH 16 /* FRF_COEFF_5L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_3_MASK 0xFFFF /* FRF_COEFF_5L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_3_SHIFT 0 /* FRF_COEFF_5L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_3_WIDTH 16 /* FRF_COEFF_5L_3 - [15:0] */ /* * R1753 (0x1403) - FRF_Coefficient_5L_4 */ -#define CLEARWATER_FRF_COEFF_5L_4_MASK 0xFFFF /* FRF_COEFF_5L_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_5L_4_SHIFT 0 /* FRF_COEFF_5L_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_5L_4_WIDTH 16 /* FRF_COEFF_5L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_4_MASK 0xFFFF /* FRF_COEFF_5L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_4_SHIFT 0 /* FRF_COEFF_5L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5L_4_WIDTH 16 /* FRF_COEFF_5L_4 - [15:0] */ /* * R1754 (0x1410) - FRF_Coefficient_5R_1 */ -#define CLEARWATER_FRF_COEFF_5R_1_MASK 0xFFFF /* FRF_COEFF_5R_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_5R_1_SHIFT 0 /* FRF_COEFF_5R_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_5R_1_WIDTH 16 /* FRF_COEFF_5R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_1_MASK 0xFFFF /* FRF_COEFF_5R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_1_SHIFT 0 /* FRF_COEFF_5R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_1_WIDTH 16 /* FRF_COEFF_5R_1 - [15:0] */ /* * R1755 (0x1411) - FRF_Coefficient_5R_2 */ -#define CLEARWATER_FRF_COEFF_5R_2_MASK 0xFFFF /* FRF_COEFF_5R_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_5R_2_SHIFT 0 /* FRF_COEFF_5R_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_5R_2_WIDTH 16 /* FRF_COEFF_5R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_2_MASK 0xFFFF /* FRF_COEFF_5R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_2_SHIFT 0 /* FRF_COEFF_5R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_2_WIDTH 16 /* FRF_COEFF_5R_2 - [15:0] */ /* * R1756 (0x1412) - FRF_Coefficient_5R_3 */ -#define CLEARWATER_FRF_COEFF_5R_3_MASK 0xFFFF /* FRF_COEFF_5R_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_5R_3_SHIFT 0 /* FRF_COEFF_5R_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_5R_3_WIDTH 16 /* FRF_COEFF_5R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_3_MASK 0xFFFF /* FRF_COEFF_5R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_3_SHIFT 0 /* FRF_COEFF_5R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_3_WIDTH 16 /* FRF_COEFF_5R_3 - [15:0] */ /* * R1757 (0x1413) - FRF_Coefficient_5R_4 */ -#define CLEARWATER_FRF_COEFF_5R_4_MASK 0xFFFF /* FRF_COEFF_5R_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_5R_4_SHIFT 0 /* FRF_COEFF_5R_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_5R_4_WIDTH 16 /* FRF_COEFF_5R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_4_MASK 0xFFFF /* FRF_COEFF_5R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_4_SHIFT 0 /* FRF_COEFF_5R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_5R_4_WIDTH 16 /* FRF_COEFF_5R_4 - [15:0] */ /* * R1758 (0x1420) - FRF_Coefficient_6L_1 */ -#define CLEARWATER_FRF_COEFF_6L_1_MASK 0xFFFF /* FRF_COEFF_6L_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_6L_1_SHIFT 0 /* FRF_COEFF_6L_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_6L_1_WIDTH 16 /* FRF_COEFF_6L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_1_MASK 0xFFFF /* FRF_COEFF_6L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_1_SHIFT 0 /* FRF_COEFF_6L_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_1_WIDTH 16 /* FRF_COEFF_6L_1 - [15:0] */ /* * R1759 (0x1421) - FRF_Coefficient_6L_2 */ -#define CLEARWATER_FRF_COEFF_6L_2_MASK 0xFFFF /* FRF_COEFF_6L_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_6L_2_SHIFT 0 /* FRF_COEFF_6L_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_6L_2_WIDTH 16 /* FRF_COEFF_6L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_2_MASK 0xFFFF /* FRF_COEFF_6L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_2_SHIFT 0 /* FRF_COEFF_6L_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_2_WIDTH 16 /* FRF_COEFF_6L_2 - [15:0] */ /* * R1760 (0x1422) - FRF_Coefficient_6L_3 */ -#define CLEARWATER_FRF_COEFF_6L_3_MASK 0xFFFF /* FRF_COEFF_6L_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_6L_3_SHIFT 0 /* FRF_COEFF_6L_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_6L_3_WIDTH 16 /* FRF_COEFF_6L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_3_MASK 0xFFFF /* FRF_COEFF_6L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_3_SHIFT 0 /* FRF_COEFF_6L_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_3_WIDTH 16 /* FRF_COEFF_6L_3 - [15:0] */ /* * R1761 (0x1423) - FRF_Coefficient_6L_4 */ -#define CLEARWATER_FRF_COEFF_6L_4_MASK 0xFFFF /* FRF_COEFF_6L_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_6L_4_SHIFT 0 /* FRF_COEFF_6L_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_6L_4_WIDTH 16 /* FRF_COEFF_6L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_4_MASK 0xFFFF /* FRF_COEFF_6L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_4_SHIFT 0 /* FRF_COEFF_6L_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6L_4_WIDTH 16 /* FRF_COEFF_6L_4 - [15:0] */ /* * R1762 (0x1430) - FRF_Coefficient_6R_1 */ -#define CLEARWATER_FRF_COEFF_6R_1_MASK 0xFFFF /* FRF_COEFF_6R_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_6R_1_SHIFT 0 /* FRF_COEFF_6R_1 - [15:0] */ -#define CLEARWATER_FRF_COEFF_6R_1_WIDTH 16 /* FRF_COEFF_6R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_1_MASK 0xFFFF /* FRF_COEFF_6R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_1_SHIFT 0 /* FRF_COEFF_6R_1 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_1_WIDTH 16 /* FRF_COEFF_6R_1 - [15:0] */ /* * R1763 (0x1431) - FRF_Coefficient_6R_2 */ -#define CLEARWATER_FRF_COEFF_6R_2_MASK 0xFFFF /* FRF_COEFF_6R_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_6R_2_SHIFT 0 /* FRF_COEFF_6R_2 - [15:0] */ -#define CLEARWATER_FRF_COEFF_6R_2_WIDTH 16 /* FRF_COEFF_6R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_2_MASK 0xFFFF /* FRF_COEFF_6R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_2_SHIFT 0 /* FRF_COEFF_6R_2 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_2_WIDTH 16 /* FRF_COEFF_6R_2 - [15:0] */ /* * R1764 (0x1432) - FRF_Coefficient_6R_3 */ -#define CLEARWATER_FRF_COEFF_6R_3_MASK 0xFFFF /* FRF_COEFF_6R_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_6R_3_SHIFT 0 /* FRF_COEFF_6R_3 - [15:0] */ -#define CLEARWATER_FRF_COEFF_6R_3_WIDTH 16 /* FRF_COEFF_6R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_3_MASK 0xFFFF /* FRF_COEFF_6R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_3_SHIFT 0 /* FRF_COEFF_6R_3 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_3_WIDTH 16 /* FRF_COEFF_6R_3 - [15:0] */ /* * R1765 (0x1433) - FRF_Coefficient_6R_4 */ -#define CLEARWATER_FRF_COEFF_6R_4_MASK 0xFFFF /* FRF_COEFF_6R_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_6R_4_SHIFT 0 /* FRF_COEFF_6R_4 - [15:0] */ -#define CLEARWATER_FRF_COEFF_6R_4_WIDTH 16 /* FRF_COEFF_6R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_4_MASK 0xFFFF /* FRF_COEFF_6R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_4_SHIFT 0 /* FRF_COEFF_6R_4 - [15:0] */ +#define CLEARWATER_FRF_COEFF_6R_4_WIDTH 16 /* FRF_COEFF_6R_4 - [15:0] */ /* * R6144 (0x1800) - IRQ1 Status 1 */ -#define CLEARWATER_DSP_SHARED_WR_COLL_EINT1 0x8000 /* DSP_SHARED_WR_COLL_EINT1 */ -#define CLEARWATER_DSP_SHARED_WR_COLL_EINT1_MASK 0x8000 /* DSP_SHARED_WR_COLL_EINT1 */ -#define CLEARWATER_DSP_SHARED_WR_COLL_EINT1_SHIFT 15 /* DSP_SHARED_WR_COLL_EINT1 */ -#define CLEARWATER_DSP_SHARED_WR_COLL_EINT1_WIDTH 1 /* DSP_SHARED_WR_COLL_EINT1 */ -#define CLEARWATER_CTRLIF_ERR_EINT1 0x1000 /* CTRLIF_ERR_EINT1 */ -#define CLEARWATER_CTRLIF_ERR_EINT1_MASK 0x1000 /* CTRLIF_ERR_EINT1 */ -#define CLEARWATER_CTRLIF_ERR_EINT1_SHIFT 12 /* CTRLIF_ERR_EINT1 */ -#define CLEARWATER_CTRLIF_ERR_EINT1_WIDTH 1 /* CTRLIF_ERR_EINT1 */ -#define CLEARWATER_IRQ_NO_CLOCK_EINT1 0x0200 /* IRQ_NO_CLOCK_EINT1 */ -#define CLEARWATER_IRQ_NO_CLOCK_EINT1_MASK 0x0200 /* IRQ_NO_CLOCK_EINT1 */ -#define CLEARWATER_IRQ_NO_CLOCK_EINT1_SHIFT 9 /* IRQ_NO_CLOCK_EINT1 */ -#define CLEARWATER_IRQ_NO_CLOCK_EINT1_WIDTH 1 /* IRQ_NO_CLOCK_EINT1 */ -#define CLEARWATER_CLOCK_DETECT_EINT1 0x0100 /* CLOCK_DETECT_EINT1 */ -#define CLEARWATER_CLOCK_DETECT_EINT1_MASK 0x0100 /* CLOCK_DETECT_EINT1 */ -#define CLEARWATER_CLOCK_DETECT_EINT1_SHIFT 8 /* CLOCK_DETECT_EINT1 */ -#define CLEARWATER_CLOCK_DETECT_EINT1_WIDTH 1 /* CLOCK_DETECT_EINT1 */ -#define CLEARWATER_BOOT_DONE_EINT1 0x0080 /* BOOT_DONE_EINT1 */ -#define CLEARWATER_BOOT_DONE_EINT1_MASK 0x0080 /* BOOT_DONE_EINT1 */ -#define CLEARWATER_BOOT_DONE_EINT1_SHIFT 7 /* BOOT_DONE_EINT1 */ -#define CLEARWATER_BOOT_DONE_EINT1_WIDTH 1 /* BOOT_DONE_EINT1 */ +#define CLEARWATER_DSP_SHARED_WR_COLL_EINT1 0x8000 /* DSP_SHARED_WR_COLL_EINT1 */ +#define CLEARWATER_DSP_SHARED_WR_COLL_EINT1_MASK 0x8000 /* DSP_SHARED_WR_COLL_EINT1 */ +#define CLEARWATER_DSP_SHARED_WR_COLL_EINT1_SHIFT 15 /* DSP_SHARED_WR_COLL_EINT1 */ +#define CLEARWATER_DSP_SHARED_WR_COLL_EINT1_WIDTH 1 /* DSP_SHARED_WR_COLL_EINT1 */ +#define CLEARWATER_CTRLIF_ERR_EINT1 0x1000 /* CTRLIF_ERR_EINT1 */ +#define CLEARWATER_CTRLIF_ERR_EINT1_MASK 0x1000 /* CTRLIF_ERR_EINT1 */ +#define CLEARWATER_CTRLIF_ERR_EINT1_SHIFT 12 /* CTRLIF_ERR_EINT1 */ +#define CLEARWATER_CTRLIF_ERR_EINT1_WIDTH 1 /* CTRLIF_ERR_EINT1 */ +#define CLEARWATER_IRQ_NO_CLOCK_EINT1 0x0200 /* IRQ_NO_CLOCK_EINT1 */ +#define CLEARWATER_IRQ_NO_CLOCK_EINT1_MASK 0x0200 /* IRQ_NO_CLOCK_EINT1 */ +#define CLEARWATER_IRQ_NO_CLOCK_EINT1_SHIFT 9 /* IRQ_NO_CLOCK_EINT1 */ +#define CLEARWATER_IRQ_NO_CLOCK_EINT1_WIDTH 1 /* IRQ_NO_CLOCK_EINT1 */ +#define CLEARWATER_CLOCK_DETECT_EINT1 0x0100 /* CLOCK_DETECT_EINT1 */ +#define CLEARWATER_CLOCK_DETECT_EINT1_MASK 0x0100 /* CLOCK_DETECT_EINT1 */ +#define CLEARWATER_CLOCK_DETECT_EINT1_SHIFT 8 /* CLOCK_DETECT_EINT1 */ +#define CLEARWATER_CLOCK_DETECT_EINT1_WIDTH 1 /* CLOCK_DETECT_EINT1 */ +#define CLEARWATER_BOOT_DONE_EINT1 0x0080 /* BOOT_DONE_EINT1 */ +#define CLEARWATER_BOOT_DONE_EINT1_MASK 0x0080 /* BOOT_DONE_EINT1 */ +#define CLEARWATER_BOOT_DONE_EINT1_SHIFT 7 /* BOOT_DONE_EINT1 */ +#define CLEARWATER_BOOT_DONE_EINT1_WIDTH 1 /* BOOT_DONE_EINT1 */ /* * R6145 (0x1801) - IRQ1 Status 2 */ -#define CLEARWATER_FLL3_LOCK_EINT1 0x0400 /* FLL3_LOCK_EINT1 */ -#define CLEARWATER_FLL3_LOCK_EINT1_MASK 0x0400 /* FLL3_LOCK_EINT1 */ -#define CLEARWATER_FLL3_LOCK_EINT1_SHIFT 10 /* FLL3_LOCK_EINT1 */ -#define CLEARWATER_FLL3_LOCK_EINT1_WIDTH 1 /* FLL3_LOCK_EINT1 */ -#define CLEARWATER_FLL2_LOCK_EINT1 0x0200 /* FLL2_LOCK_EINT1 */ -#define CLEARWATER_FLL2_LOCK_EINT1_MASK 0x0200 /* FLL2_LOCK_EINT1 */ -#define CLEARWATER_FLL2_LOCK_EINT1_SHIFT 9 /* FLL2_LOCK_EINT1 */ -#define CLEARWATER_FLL2_LOCK_EINT1_WIDTH 1 /* FLL2_LOCK_EINT1 */ -#define CLEARWATER_FLL1_LOCK_EINT1 0x0100 /* FLL1_LOCK_EINT1 */ -#define CLEARWATER_FLL1_LOCK_EINT1_MASK 0x0100 /* FLL1_LOCK_EINT1 */ -#define CLEARWATER_FLL1_LOCK_EINT1_SHIFT 8 /* FLL1_LOCK_EINT1 */ -#define CLEARWATER_FLL1_LOCK_EINT1_WIDTH 1 /* FLL1_LOCK_EINT1 */ +#define CLEARWATER_FLL3_LOCK_EINT1 0x0400 /* FLL3_LOCK_EINT1 */ +#define CLEARWATER_FLL3_LOCK_EINT1_MASK 0x0400 /* FLL3_LOCK_EINT1 */ +#define CLEARWATER_FLL3_LOCK_EINT1_SHIFT 10 /* FLL3_LOCK_EINT1 */ +#define CLEARWATER_FLL3_LOCK_EINT1_WIDTH 1 /* FLL3_LOCK_EINT1 */ +#define CLEARWATER_FLL2_LOCK_EINT1 0x0200 /* FLL2_LOCK_EINT1 */ +#define CLEARWATER_FLL2_LOCK_EINT1_MASK 0x0200 /* FLL2_LOCK_EINT1 */ +#define CLEARWATER_FLL2_LOCK_EINT1_SHIFT 9 /* FLL2_LOCK_EINT1 */ +#define CLEARWATER_FLL2_LOCK_EINT1_WIDTH 1 /* FLL2_LOCK_EINT1 */ +#define CLEARWATER_FLL1_LOCK_EINT1 0x0100 /* FLL1_LOCK_EINT1 */ +#define CLEARWATER_FLL1_LOCK_EINT1_MASK 0x0100 /* FLL1_LOCK_EINT1 */ +#define CLEARWATER_FLL1_LOCK_EINT1_SHIFT 8 /* FLL1_LOCK_EINT1 */ +#define CLEARWATER_FLL1_LOCK_EINT1_WIDTH 1 /* FLL1_LOCK_EINT1 */ /* * R6149 (0x1805) - IRQ1 Status 6 */ -#define CLEARWATER_MICDET_EINT1 0x0100 /* MICDET_EINT1 */ -#define CLEARWATER_MICDET_EINT1_MASK 0x0100 /* MICDET_EINT1 */ -#define CLEARWATER_MICDET_EINT1_SHIFT 8 /* MICDET_EINT1 */ -#define CLEARWATER_MICDET_EINT1_WIDTH 1 /* MICDET_EINT1 */ -#define CLEARWATER_HPDET_EINT1 0x0001 /* HPDET_EINT1 */ -#define CLEARWATER_HPDET_EINT1_MASK 0x0001 /* HPDET_EINT1 */ -#define CLEARWATER_HPDET_EINT1_SHIFT 0 /* HPDET_EINT1 */ -#define CLEARWATER_HPDET_EINT1_WIDTH 1 /* HPDET_EINT1 */ +#define CLEARWATER_MICDET_EINT1 0x0100 /* MICDET_EINT1 */ +#define CLEARWATER_MICDET_EINT1_MASK 0x0100 /* MICDET_EINT1 */ +#define CLEARWATER_MICDET_EINT1_SHIFT 8 /* MICDET_EINT1 */ +#define CLEARWATER_MICDET_EINT1_WIDTH 1 /* MICDET_EINT1 */ +#define CLEARWATER_HPDET_EINT1 0x0001 /* HPDET_EINT1 */ +#define CLEARWATER_HPDET_EINT1_MASK 0x0001 /* HPDET_EINT1 */ +#define CLEARWATER_HPDET_EINT1_SHIFT 0 /* HPDET_EINT1 */ +#define CLEARWATER_HPDET_EINT1_WIDTH 1 /* HPDET_EINT1 */ /* * R6150 (0x1806) - IRQ1 Status 7 */ -#define CLEARWATER_MICD_CLAMP_FALL_EINT1 0x0020 /* MICD_CLAMP_FALL_EINT1 */ -#define CLEARWATER_MICD_CLAMP_FALL_EINT1_MASK 0x0020 /* MICD_CLAMP_FALL_EINT1 */ -#define CLEARWATER_MICD_CLAMP_FALL_EINT1_SHIFT 5 /* MICD_CLAMP_FALL_EINT1 */ -#define CLEARWATER_MICD_CLAMP_FALL_EINT1_WIDTH 1 /* MICD_CLAMP_FALL_EINT1 */ -#define CLEARWATER_MICD_CLAMP_RISE_EINT1 0x0010 /* MICD_CLAMP_RISE_EINT1 */ -#define CLEARWATER_MICD_CLAMP_RISE_EINT1_MASK 0x0010 /* MICD_CLAMP_RISE_EINT1 */ -#define CLEARWATER_MICD_CLAMP_RISE_EINT1_SHIFT 4 /* MICD_CLAMP_RISE_EINT1 */ -#define CLEARWATER_MICD_CLAMP_RISE_EINT1_WIDTH 1 /* MICD_CLAMP_RISE_EINT1 */ -#define CLEARWATER_JD2_FALL_EINT1 0x0008 /* JD2_FALL_EINT1 */ -#define CLEARWATER_JD2_FALL_EINT1_MASK 0x0008 /* JD2_FALL_EINT1 */ -#define CLEARWATER_JD2_FALL_EINT1_SHIFT 3 /* JD2_FALL_EINT1 */ -#define CLEARWATER_JD2_FALL_EINT1_WIDTH 1 /* JD2_FALL_EINT1 */ -#define CLEARWATER_JD2_RISE_EINT1 0x0004 /* JD2_RISE_EINT1 */ -#define CLEARWATER_JD2_RISE_EINT1_MASK 0x0004 /* JD2_RISE_EINT1 */ -#define CLEARWATER_JD2_RISE_EINT1_SHIFT 2 /* JD2_RISE_EINT1 */ -#define CLEARWATER_JD2_RISE_EINT1_WIDTH 1 /* JD2_RISE_EINT1 */ -#define CLEARWATER_JD1_FALL_EINT1 0x0002 /* JD1_FALL_EINT1 */ -#define CLEARWATER_JD1_FALL_EINT1_MASK 0x0002 /* JD1_FALL_EINT1 */ -#define CLEARWATER_JD1_FALL_EINT1_SHIFT 1 /* JD1_FALL_EINT1 */ -#define CLEARWATER_JD1_FALL_EINT1_WIDTH 1 /* JD1_FALL_EINT1 */ -#define CLEARWATER_JD1_RISE_EINT1 0x0001 /* JD1_RISE_EINT1 */ -#define CLEARWATER_JD1_RISE_EINT1_MASK 0x0001 /* JD1_RISE_EINT1 */ -#define CLEARWATER_JD1_RISE_EINT1_SHIFT 0 /* JD1_RISE_EINT1 */ -#define CLEARWATER_JD1_RISE_EINT1_WIDTH 1 /* JD1_RISE_EINT1 */ +#define CLEARWATER_MICD_CLAMP_FALL_EINT1 0x0020 /* MICD_CLAMP_FALL_EINT1 */ +#define CLEARWATER_MICD_CLAMP_FALL_EINT1_MASK 0x0020 /* MICD_CLAMP_FALL_EINT1 */ +#define CLEARWATER_MICD_CLAMP_FALL_EINT1_SHIFT 5 /* MICD_CLAMP_FALL_EINT1 */ +#define CLEARWATER_MICD_CLAMP_FALL_EINT1_WIDTH 1 /* MICD_CLAMP_FALL_EINT1 */ +#define CLEARWATER_MICD_CLAMP_RISE_EINT1 0x0010 /* MICD_CLAMP_RISE_EINT1 */ +#define CLEARWATER_MICD_CLAMP_RISE_EINT1_MASK 0x0010 /* MICD_CLAMP_RISE_EINT1 */ +#define CLEARWATER_MICD_CLAMP_RISE_EINT1_SHIFT 4 /* MICD_CLAMP_RISE_EINT1 */ +#define CLEARWATER_MICD_CLAMP_RISE_EINT1_WIDTH 1 /* MICD_CLAMP_RISE_EINT1 */ +#define CLEARWATER_JD2_FALL_EINT1 0x0008 /* JD2_FALL_EINT1 */ +#define CLEARWATER_JD2_FALL_EINT1_MASK 0x0008 /* JD2_FALL_EINT1 */ +#define CLEARWATER_JD2_FALL_EINT1_SHIFT 3 /* JD2_FALL_EINT1 */ +#define CLEARWATER_JD2_FALL_EINT1_WIDTH 1 /* JD2_FALL_EINT1 */ +#define CLEARWATER_JD2_RISE_EINT1 0x0004 /* JD2_RISE_EINT1 */ +#define CLEARWATER_JD2_RISE_EINT1_MASK 0x0004 /* JD2_RISE_EINT1 */ +#define CLEARWATER_JD2_RISE_EINT1_SHIFT 2 /* JD2_RISE_EINT1 */ +#define CLEARWATER_JD2_RISE_EINT1_WIDTH 1 /* JD2_RISE_EINT1 */ +#define CLEARWATER_JD1_FALL_EINT1 0x0002 /* JD1_FALL_EINT1 */ +#define CLEARWATER_JD1_FALL_EINT1_MASK 0x0002 /* JD1_FALL_EINT1 */ +#define CLEARWATER_JD1_FALL_EINT1_SHIFT 1 /* JD1_FALL_EINT1 */ +#define CLEARWATER_JD1_FALL_EINT1_WIDTH 1 /* JD1_FALL_EINT1 */ +#define CLEARWATER_JD1_RISE_EINT1 0x0001 /* JD1_RISE_EINT1 */ +#define CLEARWATER_JD1_RISE_EINT1_MASK 0x0001 /* JD1_RISE_EINT1 */ +#define CLEARWATER_JD1_RISE_EINT1_SHIFT 0 /* JD1_RISE_EINT1 */ +#define CLEARWATER_JD1_RISE_EINT1_WIDTH 1 /* JD1_RISE_EINT1 */ /* * R6152 (0x1808) - IRQ1 Status 9 */ -#define CLEARWATER_ASRC2_IN2_LOCK_EINT1 0x0800 /* ASRC2_IN2_LOCK_EINT1 */ -#define CLEARWATER_ASRC2_IN2_LOCK_EINT1_MASK 0x0800 /* ASRC2_IN2_LOCK_EINT1 */ -#define CLEARWATER_ASRC2_IN2_LOCK_EINT1_SHIFT 11 /* ASRC2_IN2_LOCK_EINT1 */ -#define CLEARWATER_ASRC2_IN2_LOCK_EINT1_WIDTH 1 /* ASRC2_IN2_LOCK_EINT1 */ -#define CLEARWATER_ASRC2_IN1_LOCK_EINT1 0x0400 /* ASRC2_IN1_LOCK_EINT1 */ -#define CLEARWATER_ASRC2_IN1_LOCK_EINT1_MASK 0x0400 /* ASRC2_IN1_LOCK_EINT1 */ -#define CLEARWATER_ASRC2_IN1_LOCK_EINT1_SHIFT 10 /* ASRC2_IN1_LOCK_EINT1 */ -#define CLEARWATER_ASRC2_IN1_LOCK_EINT1_WIDTH 1 /* ASRC2_IN1_LOCK_EINT1 */ -#define CLEARWATER_ASRC1_IN2_LOCK_EINT1 0x0200 /* ASRC1_IN2_LOCK_EINT1 */ -#define CLEARWATER_ASRC1_IN2_LOCK_EINT1_MASK 0x0200 /* ASRC1_IN2_LOCK_EINT1 */ -#define CLEARWATER_ASRC1_IN2_LOCK_EINT1_SHIFT 9 /* ASRC1_IN2_LOCK_EINT1 */ -#define CLEARWATER_ASRC1_IN2_LOCK_EINT1_WIDTH 1 /* ASRC1_IN2_LOCK_EINT1 */ -#define CLEARWATER_ASRC1_IN1_LOCK_EINT1 0x0100 /* ASRC1_IN1_LOCK_EINT1 */ -#define CLEARWATER_ASRC1_IN1_LOCK_EINT1_MASK 0x0100 /* ASRC1_IN1_LOCK_EINT1 */ -#define CLEARWATER_ASRC1_IN1_LOCK_EINT1_SHIFT 8 /* ASRC1_IN1_LOCK_EINT1 */ -#define CLEARWATER_ASRC1_IN1_LOCK_EINT1_WIDTH 1 /* ASRC1_IN1_LOCK_EINT1 */ -#define CLEARWATER_DRC2_SIG_DET_EINT1 0x0002 /* DRC2_SIG_DET_EINT1 */ -#define CLEARWATER_DRC2_SIG_DET_EINT1_MASK 0x0002 /* DRC2_SIG_DET_EINT1 */ -#define CLEARWATER_DRC2_SIG_DET_EINT1_SHIFT 1 /* DRC2_SIG_DET_EINT1 */ -#define CLEARWATER_DRC2_SIG_DET_EINT1_WIDTH 1 /* DRC2_SIG_DET_EINT1 */ -#define CLEARWATER_DRC1_SIG_DET_EINT1 0x0001 /* DRC1_SIG_DET_EINT1 */ -#define CLEARWATER_DRC1_SIG_DET_EINT1_MASK 0x0001 /* DRC1_SIG_DET_EINT1 */ -#define CLEARWATER_DRC1_SIG_DET_EINT1_SHIFT 0 /* DRC1_SIG_DET_EINT1 */ -#define CLEARWATER_DRC1_SIG_DET_EINT1_WIDTH 1 /* DRC1_SIG_DET_EINT1 */ +#define CLEARWATER_ASRC2_IN2_LOCK_EINT1 0x0800 /* ASRC2_IN2_LOCK_EINT1 */ +#define CLEARWATER_ASRC2_IN2_LOCK_EINT1_MASK 0x0800 /* ASRC2_IN2_LOCK_EINT1 */ +#define CLEARWATER_ASRC2_IN2_LOCK_EINT1_SHIFT 11 /* ASRC2_IN2_LOCK_EINT1 */ +#define CLEARWATER_ASRC2_IN2_LOCK_EINT1_WIDTH 1 /* ASRC2_IN2_LOCK_EINT1 */ +#define CLEARWATER_ASRC2_IN1_LOCK_EINT1 0x0400 /* ASRC2_IN1_LOCK_EINT1 */ +#define CLEARWATER_ASRC2_IN1_LOCK_EINT1_MASK 0x0400 /* ASRC2_IN1_LOCK_EINT1 */ +#define CLEARWATER_ASRC2_IN1_LOCK_EINT1_SHIFT 10 /* ASRC2_IN1_LOCK_EINT1 */ +#define CLEARWATER_ASRC2_IN1_LOCK_EINT1_WIDTH 1 /* ASRC2_IN1_LOCK_EINT1 */ +#define CLEARWATER_ASRC1_IN2_LOCK_EINT1 0x0200 /* ASRC1_IN2_LOCK_EINT1 */ +#define CLEARWATER_ASRC1_IN2_LOCK_EINT1_MASK 0x0200 /* ASRC1_IN2_LOCK_EINT1 */ +#define CLEARWATER_ASRC1_IN2_LOCK_EINT1_SHIFT 9 /* ASRC1_IN2_LOCK_EINT1 */ +#define CLEARWATER_ASRC1_IN2_LOCK_EINT1_WIDTH 1 /* ASRC1_IN2_LOCK_EINT1 */ +#define CLEARWATER_ASRC1_IN1_LOCK_EINT1 0x0100 /* ASRC1_IN1_LOCK_EINT1 */ +#define CLEARWATER_ASRC1_IN1_LOCK_EINT1_MASK 0x0100 /* ASRC1_IN1_LOCK_EINT1 */ +#define CLEARWATER_ASRC1_IN1_LOCK_EINT1_SHIFT 8 /* ASRC1_IN1_LOCK_EINT1 */ +#define CLEARWATER_ASRC1_IN1_LOCK_EINT1_WIDTH 1 /* ASRC1_IN1_LOCK_EINT1 */ +#define CLEARWATER_DRC2_SIG_DET_EINT1 0x0002 /* DRC2_SIG_DET_EINT1 */ +#define CLEARWATER_DRC2_SIG_DET_EINT1_MASK 0x0002 /* DRC2_SIG_DET_EINT1 */ +#define CLEARWATER_DRC2_SIG_DET_EINT1_SHIFT 1 /* DRC2_SIG_DET_EINT1 */ +#define CLEARWATER_DRC2_SIG_DET_EINT1_WIDTH 1 /* DRC2_SIG_DET_EINT1 */ +#define CLEARWATER_DRC1_SIG_DET_EINT1 0x0001 /* DRC1_SIG_DET_EINT1 */ +#define CLEARWATER_DRC1_SIG_DET_EINT1_MASK 0x0001 /* DRC1_SIG_DET_EINT1 */ +#define CLEARWATER_DRC1_SIG_DET_EINT1_SHIFT 0 /* DRC1_SIG_DET_EINT1 */ +#define CLEARWATER_DRC1_SIG_DET_EINT1_WIDTH 1 /* DRC1_SIG_DET_EINT1 */ /* * R6154 (0x180A) - IRQ1 Status 11 */ -#define CLEARWATER_DSP_IRQ16_EINT1 0x8000 /* DSP_IRQ16_EINT1 */ -#define CLEARWATER_DSP_IRQ16_EINT1_MASK 0x8000 /* DSP_IRQ16_EINT1 */ -#define CLEARWATER_DSP_IRQ16_EINT1_SHIFT 15 /* DSP_IRQ16_EINT1 */ -#define CLEARWATER_DSP_IRQ16_EINT1_WIDTH 1 /* DSP_IRQ16_EINT1 */ -#define CLEARWATER_DSP_IRQ15_EINT1 0x4000 /* DSP_IRQ15_EINT1 */ -#define CLEARWATER_DSP_IRQ15_EINT1_MASK 0x4000 /* DSP_IRQ15_EINT1 */ -#define CLEARWATER_DSP_IRQ15_EINT1_SHIFT 14 /* DSP_IRQ15_EINT1 */ -#define CLEARWATER_DSP_IRQ15_EINT1_WIDTH 1 /* DSP_IRQ15_EINT1 */ -#define CLEARWATER_DSP_IRQ14_EINT1 0x2000 /* DSP_IRQ14_EINT1 */ -#define CLEARWATER_DSP_IRQ14_EINT1_MASK 0x2000 /* DSP_IRQ14_EINT1 */ -#define CLEARWATER_DSP_IRQ14_EINT1_SHIFT 13 /* DSP_IRQ14_EINT1 */ -#define CLEARWATER_DSP_IRQ14_EINT1_WIDTH 1 /* DSP_IRQ14_EINT1 */ -#define CLEARWATER_DSP_IRQ13_EINT1 0x1000 /* DSP_IRQ13_EINT1 */ -#define CLEARWATER_DSP_IRQ13_EINT1_MASK 0x1000 /* DSP_IRQ13_EINT1 */ -#define CLEARWATER_DSP_IRQ13_EINT1_SHIFT 12 /* DSP_IRQ13_EINT1 */ -#define CLEARWATER_DSP_IRQ13_EINT1_WIDTH 1 /* DSP_IRQ13_EINT1 */ -#define CLEARWATER_DSP_IRQ12_EINT1 0x0800 /* DSP_IRQ12_EINT1 */ -#define CLEARWATER_DSP_IRQ12_EINT1_MASK 0x0800 /* DSP_IRQ12_EINT1 */ -#define CLEARWATER_DSP_IRQ12_EINT1_SHIFT 11 /* DSP_IRQ12_EINT1 */ -#define CLEARWATER_DSP_IRQ12_EINT1_WIDTH 1 /* DSP_IRQ12_EINT1 */ -#define CLEARWATER_DSP_IRQ11_EINT1 0x0400 /* DSP_IRQ11_EINT1 */ -#define CLEARWATER_DSP_IRQ11_EINT1_MASK 0x0400 /* DSP_IRQ11_EINT1 */ -#define CLEARWATER_DSP_IRQ11_EINT1_SHIFT 10 /* DSP_IRQ11_EINT1 */ -#define CLEARWATER_DSP_IRQ11_EINT1_WIDTH 1 /* DSP_IRQ11_EINT1 */ -#define CLEARWATER_DSP_IRQ10_EINT1 0x0200 /* DSP_IRQ10_EINT1 */ -#define CLEARWATER_DSP_IRQ10_EINT1_MASK 0x0200 /* DSP_IRQ10_EINT1 */ -#define CLEARWATER_DSP_IRQ10_EINT1_SHIFT 9 /* DSP_IRQ10_EINT1 */ -#define CLEARWATER_DSP_IRQ10_EINT1_WIDTH 1 /* DSP_IRQ10_EINT1 */ -#define CLEARWATER_DSP_IRQ9_EINT1 0x0100 /* DSP_IRQ9_EINT1 */ -#define CLEARWATER_DSP_IRQ9_EINT1_MASK 0x0100 /* DSP_IRQ9_EINT1 */ -#define CLEARWATER_DSP_IRQ9_EINT1_SHIFT 8 /* DSP_IRQ9_EINT1 */ -#define CLEARWATER_DSP_IRQ9_EINT1_WIDTH 1 /* DSP_IRQ9_EINT1 */ -#define CLEARWATER_DSP_IRQ8_EINT1 0x0080 /* DSP_IRQ8_EINT1 */ -#define CLEARWATER_DSP_IRQ8_EINT1_MASK 0x0080 /* DSP_IRQ8_EINT1 */ -#define CLEARWATER_DSP_IRQ8_EINT1_SHIFT 7 /* DSP_IRQ8_EINT1 */ -#define CLEARWATER_DSP_IRQ8_EINT1_WIDTH 1 /* DSP_IRQ8_EINT1 */ -#define CLEARWATER_DSP_IRQ7_EINT1 0x0040 /* DSP_IRQ7_EINT1 */ -#define CLEARWATER_DSP_IRQ7_EINT1_MASK 0x0040 /* DSP_IRQ7_EINT1 */ -#define CLEARWATER_DSP_IRQ7_EINT1_SHIFT 6 /* DSP_IRQ7_EINT1 */ -#define CLEARWATER_DSP_IRQ7_EINT1_WIDTH 1 /* DSP_IRQ7_EINT1 */ -#define CLEARWATER_DSP_IRQ6_EINT1 0x0020 /* DSP_IRQ6_EINT1 */ -#define CLEARWATER_DSP_IRQ6_EINT1_MASK 0x0020 /* DSP_IRQ6_EINT1 */ -#define CLEARWATER_DSP_IRQ6_EINT1_SHIFT 5 /* DSP_IRQ6_EINT1 */ -#define CLEARWATER_DSP_IRQ6_EINT1_WIDTH 1 /* DSP_IRQ6_EINT1 */ -#define CLEARWATER_DSP_IRQ5_EINT1 0x0010 /* DSP_IRQ5_EINT1 */ -#define CLEARWATER_DSP_IRQ5_EINT1_MASK 0x0010 /* DSP_IRQ5_EINT1 */ -#define CLEARWATER_DSP_IRQ5_EINT1_SHIFT 4 /* DSP_IRQ5_EINT1 */ -#define CLEARWATER_DSP_IRQ5_EINT1_WIDTH 1 /* DSP_IRQ5_EINT1 */ -#define CLEARWATER_DSP_IRQ4_EINT1 0x0008 /* DSP_IRQ4_EINT1 */ -#define CLEARWATER_DSP_IRQ4_EINT1_MASK 0x0008 /* DSP_IRQ4_EINT1 */ -#define CLEARWATER_DSP_IRQ4_EINT1_SHIFT 3 /* DSP_IRQ4_EINT1 */ -#define CLEARWATER_DSP_IRQ4_EINT1_WIDTH 1 /* DSP_IRQ4_EINT1 */ -#define CLEARWATER_DSP_IRQ3_EINT1 0x0004 /* DSP_IRQ3_EINT1 */ -#define CLEARWATER_DSP_IRQ3_EINT1_MASK 0x0004 /* DSP_IRQ3_EINT1 */ -#define CLEARWATER_DSP_IRQ3_EINT1_SHIFT 2 /* DSP_IRQ3_EINT1 */ -#define CLEARWATER_DSP_IRQ3_EINT1_WIDTH 1 /* DSP_IRQ3_EINT1 */ -#define CLEARWATER_DSP_IRQ2_EINT1 0x0002 /* DSP_IRQ2_EINT1 */ -#define CLEARWATER_DSP_IRQ2_EINT1_MASK 0x0002 /* DSP_IRQ2_EINT1 */ -#define CLEARWATER_DSP_IRQ2_EINT1_SHIFT 1 /* DSP_IRQ2_EINT1 */ -#define CLEARWATER_DSP_IRQ2_EINT1_WIDTH 1 /* DSP_IRQ2_EINT1 */ -#define CLEARWATER_DSP_IRQ1_EINT1 0x0001 /* DSP_IRQ1_EINT1 */ -#define CLEARWATER_DSP_IRQ1_EINT1_MASK 0x0001 /* DSP_IRQ1_EINT1 */ -#define CLEARWATER_DSP_IRQ1_EINT1_SHIFT 0 /* DSP_IRQ1_EINT1 */ -#define CLEARWATER_DSP_IRQ1_EINT1_WIDTH 1 /* DSP_IRQ1_EINT1 */ +#define CLEARWATER_DSP_IRQ16_EINT1 0x8000 /* DSP_IRQ16_EINT1 */ +#define CLEARWATER_DSP_IRQ16_EINT1_MASK 0x8000 /* DSP_IRQ16_EINT1 */ +#define CLEARWATER_DSP_IRQ16_EINT1_SHIFT 15 /* DSP_IRQ16_EINT1 */ +#define CLEARWATER_DSP_IRQ16_EINT1_WIDTH 1 /* DSP_IRQ16_EINT1 */ +#define CLEARWATER_DSP_IRQ15_EINT1 0x4000 /* DSP_IRQ15_EINT1 */ +#define CLEARWATER_DSP_IRQ15_EINT1_MASK 0x4000 /* DSP_IRQ15_EINT1 */ +#define CLEARWATER_DSP_IRQ15_EINT1_SHIFT 14 /* DSP_IRQ15_EINT1 */ +#define CLEARWATER_DSP_IRQ15_EINT1_WIDTH 1 /* DSP_IRQ15_EINT1 */ +#define CLEARWATER_DSP_IRQ14_EINT1 0x2000 /* DSP_IRQ14_EINT1 */ +#define CLEARWATER_DSP_IRQ14_EINT1_MASK 0x2000 /* DSP_IRQ14_EINT1 */ +#define CLEARWATER_DSP_IRQ14_EINT1_SHIFT 13 /* DSP_IRQ14_EINT1 */ +#define CLEARWATER_DSP_IRQ14_EINT1_WIDTH 1 /* DSP_IRQ14_EINT1 */ +#define CLEARWATER_DSP_IRQ13_EINT1 0x1000 /* DSP_IRQ13_EINT1 */ +#define CLEARWATER_DSP_IRQ13_EINT1_MASK 0x1000 /* DSP_IRQ13_EINT1 */ +#define CLEARWATER_DSP_IRQ13_EINT1_SHIFT 12 /* DSP_IRQ13_EINT1 */ +#define CLEARWATER_DSP_IRQ13_EINT1_WIDTH 1 /* DSP_IRQ13_EINT1 */ +#define CLEARWATER_DSP_IRQ12_EINT1 0x0800 /* DSP_IRQ12_EINT1 */ +#define CLEARWATER_DSP_IRQ12_EINT1_MASK 0x0800 /* DSP_IRQ12_EINT1 */ +#define CLEARWATER_DSP_IRQ12_EINT1_SHIFT 11 /* DSP_IRQ12_EINT1 */ +#define CLEARWATER_DSP_IRQ12_EINT1_WIDTH 1 /* DSP_IRQ12_EINT1 */ +#define CLEARWATER_DSP_IRQ11_EINT1 0x0400 /* DSP_IRQ11_EINT1 */ +#define CLEARWATER_DSP_IRQ11_EINT1_MASK 0x0400 /* DSP_IRQ11_EINT1 */ +#define CLEARWATER_DSP_IRQ11_EINT1_SHIFT 10 /* DSP_IRQ11_EINT1 */ +#define CLEARWATER_DSP_IRQ11_EINT1_WIDTH 1 /* DSP_IRQ11_EINT1 */ +#define CLEARWATER_DSP_IRQ10_EINT1 0x0200 /* DSP_IRQ10_EINT1 */ +#define CLEARWATER_DSP_IRQ10_EINT1_MASK 0x0200 /* DSP_IRQ10_EINT1 */ +#define CLEARWATER_DSP_IRQ10_EINT1_SHIFT 9 /* DSP_IRQ10_EINT1 */ +#define CLEARWATER_DSP_IRQ10_EINT1_WIDTH 1 /* DSP_IRQ10_EINT1 */ +#define CLEARWATER_DSP_IRQ9_EINT1 0x0100 /* DSP_IRQ9_EINT1 */ +#define CLEARWATER_DSP_IRQ9_EINT1_MASK 0x0100 /* DSP_IRQ9_EINT1 */ +#define CLEARWATER_DSP_IRQ9_EINT1_SHIFT 8 /* DSP_IRQ9_EINT1 */ +#define CLEARWATER_DSP_IRQ9_EINT1_WIDTH 1 /* DSP_IRQ9_EINT1 */ +#define CLEARWATER_DSP_IRQ8_EINT1 0x0080 /* DSP_IRQ8_EINT1 */ +#define CLEARWATER_DSP_IRQ8_EINT1_MASK 0x0080 /* DSP_IRQ8_EINT1 */ +#define CLEARWATER_DSP_IRQ8_EINT1_SHIFT 7 /* DSP_IRQ8_EINT1 */ +#define CLEARWATER_DSP_IRQ8_EINT1_WIDTH 1 /* DSP_IRQ8_EINT1 */ +#define CLEARWATER_DSP_IRQ7_EINT1 0x0040 /* DSP_IRQ7_EINT1 */ +#define CLEARWATER_DSP_IRQ7_EINT1_MASK 0x0040 /* DSP_IRQ7_EINT1 */ +#define CLEARWATER_DSP_IRQ7_EINT1_SHIFT 6 /* DSP_IRQ7_EINT1 */ +#define CLEARWATER_DSP_IRQ7_EINT1_WIDTH 1 /* DSP_IRQ7_EINT1 */ +#define CLEARWATER_DSP_IRQ6_EINT1 0x0020 /* DSP_IRQ6_EINT1 */ +#define CLEARWATER_DSP_IRQ6_EINT1_MASK 0x0020 /* DSP_IRQ6_EINT1 */ +#define CLEARWATER_DSP_IRQ6_EINT1_SHIFT 5 /* DSP_IRQ6_EINT1 */ +#define CLEARWATER_DSP_IRQ6_EINT1_WIDTH 1 /* DSP_IRQ6_EINT1 */ +#define CLEARWATER_DSP_IRQ5_EINT1 0x0010 /* DSP_IRQ5_EINT1 */ +#define CLEARWATER_DSP_IRQ5_EINT1_MASK 0x0010 /* DSP_IRQ5_EINT1 */ +#define CLEARWATER_DSP_IRQ5_EINT1_SHIFT 4 /* DSP_IRQ5_EINT1 */ +#define CLEARWATER_DSP_IRQ5_EINT1_WIDTH 1 /* DSP_IRQ5_EINT1 */ +#define CLEARWATER_DSP_IRQ4_EINT1 0x0008 /* DSP_IRQ4_EINT1 */ +#define CLEARWATER_DSP_IRQ4_EINT1_MASK 0x0008 /* DSP_IRQ4_EINT1 */ +#define CLEARWATER_DSP_IRQ4_EINT1_SHIFT 3 /* DSP_IRQ4_EINT1 */ +#define CLEARWATER_DSP_IRQ4_EINT1_WIDTH 1 /* DSP_IRQ4_EINT1 */ +#define CLEARWATER_DSP_IRQ3_EINT1 0x0004 /* DSP_IRQ3_EINT1 */ +#define CLEARWATER_DSP_IRQ3_EINT1_MASK 0x0004 /* DSP_IRQ3_EINT1 */ +#define CLEARWATER_DSP_IRQ3_EINT1_SHIFT 2 /* DSP_IRQ3_EINT1 */ +#define CLEARWATER_DSP_IRQ3_EINT1_WIDTH 1 /* DSP_IRQ3_EINT1 */ +#define CLEARWATER_DSP_IRQ2_EINT1 0x0002 /* DSP_IRQ2_EINT1 */ +#define CLEARWATER_DSP_IRQ2_EINT1_MASK 0x0002 /* DSP_IRQ2_EINT1 */ +#define CLEARWATER_DSP_IRQ2_EINT1_SHIFT 1 /* DSP_IRQ2_EINT1 */ +#define CLEARWATER_DSP_IRQ2_EINT1_WIDTH 1 /* DSP_IRQ2_EINT1 */ +#define CLEARWATER_DSP_IRQ1_EINT1 0x0001 /* DSP_IRQ1_EINT1 */ +#define CLEARWATER_DSP_IRQ1_EINT1_MASK 0x0001 /* DSP_IRQ1_EINT1 */ +#define CLEARWATER_DSP_IRQ1_EINT1_SHIFT 0 /* DSP_IRQ1_EINT1 */ +#define CLEARWATER_DSP_IRQ1_EINT1_WIDTH 1 /* DSP_IRQ1_EINT1 */ /* * R6155 (0x180B) - IRQ1 Status 12 */ -#define CLEARWATER_SPKOUTR_SC_EINT1 0x0080 /* SPKOUTR_SC_EINT1 */ -#define CLEARWATER_SPKOUTR_SC_EINT1_MASK 0x0080 /* SPKOUTR_SC_EINT1 */ -#define CLEARWATER_SPKOUTR_SC_EINT1_SHIFT 7 /* SPKOUTR_SC_EINT1 */ -#define CLEARWATER_SPKOUTR_SC_EINT1_WIDTH 1 /* SPKOUTR_SC_EINT1 */ -#define CLEARWATER_SPKOUTL_SC_EINT1 0x0040 /* SPKOUTL_SC_EINT1 */ -#define CLEARWATER_SPKOUTL_SC_EINT1_MASK 0x0040 /* SPKOUTL_SC_EINT1 */ -#define CLEARWATER_SPKOUTL_SC_EINT1_SHIFT 6 /* SPKOUTL_SC_EINT1 */ -#define CLEARWATER_SPKOUTL_SC_EINT1_WIDTH 1 /* SPKOUTL_SC_EINT1 */ -#define CLEARWATER_HP3R_SC_EINT1 0x0020 /* HP3R_SC_EINT1 */ -#define CLEARWATER_HP3R_SC_EINT1_MASK 0x0020 /* HP3R_SC_EINT1 */ -#define CLEARWATER_HP3R_SC_EINT1_SHIFT 5 /* HP3R_SC_EINT1 */ -#define CLEARWATER_HP3R_SC_EINT1_WIDTH 1 /* HP3R_SC_EINT1 */ -#define CLEARWATER_HP3L_SC_EINT1 0x0010 /* HP3L_SC_EINT1 */ -#define CLEARWATER_HP3L_SC_EINT1_MASK 0x0010 /* HP3L_SC_EINT1 */ -#define CLEARWATER_HP3L_SC_EINT1_SHIFT 4 /* HP3L_SC_EINT1 */ -#define CLEARWATER_HP3L_SC_EINT1_WIDTH 1 /* HP3L_SC_EINT1 */ -#define CLEARWATER_HP2R_SC_EINT1 0x0008 /* HP2R_SC_EINT1 */ -#define CLEARWATER_HP2R_SC_EINT1_MASK 0x0008 /* HP2R_SC_EINT1 */ -#define CLEARWATER_HP2R_SC_EINT1_SHIFT 3 /* HP2R_SC_EINT1 */ -#define CLEARWATER_HP2R_SC_EINT1_WIDTH 1 /* HP2R_SC_EINT1 */ -#define CLEARWATER_HP2L_SC_EINT1 0x0004 /* HP2L_SC_EINT1 */ -#define CLEARWATER_HP2L_SC_EINT1_MASK 0x0004 /* HP2L_SC_EINT1 */ -#define CLEARWATER_HP2L_SC_EINT1_SHIFT 2 /* HP2L_SC_EINT1 */ -#define CLEARWATER_HP2L_SC_EINT1_WIDTH 1 /* HP2L_SC_EINT1 */ -#define CLEARWATER_HP1R_SC_EINT1 0x0002 /* HP1R_SC_EINT1 */ -#define CLEARWATER_HP1R_SC_EINT1_MASK 0x0002 /* HP1R_SC_EINT1 */ -#define CLEARWATER_HP1R_SC_EINT1_SHIFT 1 /* HP1R_SC_EINT1 */ -#define CLEARWATER_HP1R_SC_EINT1_WIDTH 1 /* HP1R_SC_EINT1 */ -#define CLEARWATER_HP1L_SC_EINT1 0x0001 /* HP1L_SC_EINT1 */ -#define CLEARWATER_HP1L_SC_EINT1_MASK 0x0001 /* HP1L_SC_EINT1 */ -#define CLEARWATER_HP1L_SC_EINT1_SHIFT 0 /* HP1L_SC_EINT1 */ -#define CLEARWATER_HP1L_SC_EINT1_WIDTH 1 /* HP1L_SC_EINT1 */ +#define CLEARWATER_SPKOUTR_SC_EINT1 0x0080 /* SPKOUTR_SC_EINT1 */ +#define CLEARWATER_SPKOUTR_SC_EINT1_MASK 0x0080 /* SPKOUTR_SC_EINT1 */ +#define CLEARWATER_SPKOUTR_SC_EINT1_SHIFT 7 /* SPKOUTR_SC_EINT1 */ +#define CLEARWATER_SPKOUTR_SC_EINT1_WIDTH 1 /* SPKOUTR_SC_EINT1 */ +#define CLEARWATER_SPKOUTL_SC_EINT1 0x0040 /* SPKOUTL_SC_EINT1 */ +#define CLEARWATER_SPKOUTL_SC_EINT1_MASK 0x0040 /* SPKOUTL_SC_EINT1 */ +#define CLEARWATER_SPKOUTL_SC_EINT1_SHIFT 6 /* SPKOUTL_SC_EINT1 */ +#define CLEARWATER_SPKOUTL_SC_EINT1_WIDTH 1 /* SPKOUTL_SC_EINT1 */ +#define CLEARWATER_HP3R_SC_EINT1 0x0020 /* HP3R_SC_EINT1 */ +#define CLEARWATER_HP3R_SC_EINT1_MASK 0x0020 /* HP3R_SC_EINT1 */ +#define CLEARWATER_HP3R_SC_EINT1_SHIFT 5 /* HP3R_SC_EINT1 */ +#define CLEARWATER_HP3R_SC_EINT1_WIDTH 1 /* HP3R_SC_EINT1 */ +#define CLEARWATER_HP3L_SC_EINT1 0x0010 /* HP3L_SC_EINT1 */ +#define CLEARWATER_HP3L_SC_EINT1_MASK 0x0010 /* HP3L_SC_EINT1 */ +#define CLEARWATER_HP3L_SC_EINT1_SHIFT 4 /* HP3L_SC_EINT1 */ +#define CLEARWATER_HP3L_SC_EINT1_WIDTH 1 /* HP3L_SC_EINT1 */ +#define CLEARWATER_HP2R_SC_EINT1 0x0008 /* HP2R_SC_EINT1 */ +#define CLEARWATER_HP2R_SC_EINT1_MASK 0x0008 /* HP2R_SC_EINT1 */ +#define CLEARWATER_HP2R_SC_EINT1_SHIFT 3 /* HP2R_SC_EINT1 */ +#define CLEARWATER_HP2R_SC_EINT1_WIDTH 1 /* HP2R_SC_EINT1 */ +#define CLEARWATER_HP2L_SC_EINT1 0x0004 /* HP2L_SC_EINT1 */ +#define CLEARWATER_HP2L_SC_EINT1_MASK 0x0004 /* HP2L_SC_EINT1 */ +#define CLEARWATER_HP2L_SC_EINT1_SHIFT 2 /* HP2L_SC_EINT1 */ +#define CLEARWATER_HP2L_SC_EINT1_WIDTH 1 /* HP2L_SC_EINT1 */ +#define CLEARWATER_HP1R_SC_EINT1 0x0002 /* HP1R_SC_EINT1 */ +#define CLEARWATER_HP1R_SC_EINT1_MASK 0x0002 /* HP1R_SC_EINT1 */ +#define CLEARWATER_HP1R_SC_EINT1_SHIFT 1 /* HP1R_SC_EINT1 */ +#define CLEARWATER_HP1R_SC_EINT1_WIDTH 1 /* HP1R_SC_EINT1 */ +#define CLEARWATER_HP1L_SC_EINT1 0x0001 /* HP1L_SC_EINT1 */ +#define CLEARWATER_HP1L_SC_EINT1_MASK 0x0001 /* HP1L_SC_EINT1 */ +#define CLEARWATER_HP1L_SC_EINT1_SHIFT 0 /* HP1L_SC_EINT1 */ +#define CLEARWATER_HP1L_SC_EINT1_WIDTH 1 /* HP1L_SC_EINT1 */ /* * R6156 (0x180C) - IRQ1 Status 13 @@ -12307,53 +12306,53 @@ /* * R6542 (0x198E) - IRQ2 Raw Status 15 */ -#define CLEARWATER_SPK_OVERHEAT_WARN_STS2 0x0004 /* SPK_OVERHEAT_WARN_STS2 */ -#define CLEARWATER_SPK_OVERHEAT_WARN_STS2_MASK 0x0004 /* SPK_OVERHEAT_WARN_STS2 */ -#define CLEARWATER_SPK_OVERHEAT_WARN_STS2_SHIFT 2 /* SPK_OVERHEAT_WARN_STS2 */ -#define CLEARWATER_SPK_OVERHEAT_WARN_STS2_WIDTH 1 /* SPK_OVERHEAT_WARN_STS2 */ -#define CLEARWATER_SPK_OVERHEAT_STS2 0x0002 /* SPK_OVERHEAT_STS2 */ -#define CLEARWATER_SPK_OVERHEAT_STS2_MASK 0x0002 /* SPK_OVERHEAT_STS2 */ -#define CLEARWATER_SPK_OVERHEAT_STS2_SHIFT 1 /* SPK_OVERHEAT_STS2 */ -#define CLEARWATER_SPK_OVERHEAT_STS2_WIDTH 1 /* SPK_OVERHEAT_STS2 */ -#define CLEARWATER_SPK_SHUTDOWN_STS2 0x0001 /* SPK_SHUTDOWN_STS2 */ -#define CLEARWATER_SPK_SHUTDOWN_STS2_MASK 0x0001 /* SPK_SHUTDOWN_STS2 */ -#define CLEARWATER_SPK_SHUTDOWN_STS2_SHIFT 0 /* SPK_SHUTDOWN_STS2 */ -#define CLEARWATER_SPK_SHUTDOWN_STS2_WIDTH 1 /* SPK_SHUTDOWN_STS2 */ +#define CLEARWATER_SPK_OVERHEAT_WARN_STS2 0x0004 /* SPK_OVERHEAT_WARN_STS2 */ +#define CLEARWATER_SPK_OVERHEAT_WARN_STS2_MASK 0x0004 /* SPK_OVERHEAT_WARN_STS2 */ +#define CLEARWATER_SPK_OVERHEAT_WARN_STS2_SHIFT 2 /* SPK_OVERHEAT_WARN_STS2 */ +#define CLEARWATER_SPK_OVERHEAT_WARN_STS2_WIDTH 1 /* SPK_OVERHEAT_WARN_STS2 */ +#define CLEARWATER_SPK_OVERHEAT_STS2 0x0002 /* SPK_OVERHEAT_STS2 */ +#define CLEARWATER_SPK_OVERHEAT_STS2_MASK 0x0002 /* SPK_OVERHEAT_STS2 */ +#define CLEARWATER_SPK_OVERHEAT_STS2_SHIFT 1 /* SPK_OVERHEAT_STS2 */ +#define CLEARWATER_SPK_OVERHEAT_STS2_WIDTH 1 /* SPK_OVERHEAT_STS2 */ +#define CLEARWATER_SPK_SHUTDOWN_STS2 0x0001 /* SPK_SHUTDOWN_STS2 */ +#define CLEARWATER_SPK_SHUTDOWN_STS2_MASK 0x0001 /* SPK_SHUTDOWN_STS2 */ +#define CLEARWATER_SPK_SHUTDOWN_STS2_SHIFT 0 /* SPK_SHUTDOWN_STS2 */ +#define CLEARWATER_SPK_SHUTDOWN_STS2_WIDTH 1 /* SPK_SHUTDOWN_STS2 */ /* * R6662 (0x1A06) - Interrupt Debounce 7 */ -#define CLEARWATER_MICD_CLAMP_DB 0x0010 /* MICD_CLAMP_DB */ -#define CLEARWATER_MICD_CLAMP_DB_MASK 0x0010 /* MICD_CLAMP_DB */ -#define CLEARWATER_MICD_CLAMP_DB_SHIFT 4 /* MICD_CLAMP_DB */ -#define CLEARWATER_MICD_CLAMP_DB_WIDTH 1 /* MICD_CLAMP_DB */ -#define CLEARWATER_JD2_DB 0x0004 /* JD2_DB */ -#define CLEARWATER_JD2_DB_MASK 0x0004 /* JD2_DB */ -#define CLEARWATER_JD2_DB_SHIFT 2 /* JD2_DB */ -#define CLEARWATER_JD2_DB_WIDTH 1 /* JD2_DB */ -#define CLEARWATER_JD1_DB 0x0001 /* JD1_DB */ -#define CLEARWATER_JD1_DB_MASK 0x0001 /* JD1_DB */ -#define CLEARWATER_JD1_DB_SHIFT 0 /* JD1_DB */ -#define CLEARWATER_JD1_DB_WIDTH 1 /* JD1_DB */ +#define CLEARWATER_MICD_CLAMP_DB 0x0010 /* MICD_CLAMP_DB */ +#define CLEARWATER_MICD_CLAMP_DB_MASK 0x0010 /* MICD_CLAMP_DB */ +#define CLEARWATER_MICD_CLAMP_DB_SHIFT 4 /* MICD_CLAMP_DB */ +#define CLEARWATER_MICD_CLAMP_DB_WIDTH 1 /* MICD_CLAMP_DB */ +#define CLEARWATER_JD2_DB 0x0004 /* JD2_DB */ +#define CLEARWATER_JD2_DB_MASK 0x0004 /* JD2_DB */ +#define CLEARWATER_JD2_DB_SHIFT 2 /* JD2_DB */ +#define CLEARWATER_JD2_DB_WIDTH 1 /* JD2_DB */ +#define CLEARWATER_JD1_DB 0x0001 /* JD1_DB */ +#define CLEARWATER_JD1_DB_MASK 0x0001 /* JD1_DB */ +#define CLEARWATER_JD1_DB_SHIFT 0 /* JD1_DB */ +#define CLEARWATER_JD1_DB_WIDTH 1 /* JD1_DB */ /* * R6670 (0x1A0E) - Interrupt Debounce 15 */ -#define CLEARWATER_SPK_OVERHEAT_WARN_DB 0x0004 /* SPK_OVERHEAT_WARN_DB */ -#define CLEARWATER_SPK_OVERHEAT_WARN_DB_MASK 0x0004 /* SPK_OVERHEAT_WARN_DB */ -#define CLEARWATER_SPK_OVERHEAT_WARN_DB_SHIFT 2 /* SPK_OVERHEAT_WARN_DB */ -#define CLEARWATER_SPK_OVERHEAT_WARN_DB_WIDTH 1 /* SPK_OVERHEAT_WARN_DB */ -#define CLEARWATER_SPK_OVERHEAT_DB 0x0002 /* SPK_OVERHEAT_DB */ -#define CLEARWATER_SPK_OVERHEAT_DB_MASK 0x0002 /* SPK_OVERHEAT_DB */ -#define CLEARWATER_SPK_OVERHEAT_DB_SHIFT 1 /* SPK_OVERHEAT_DB */ -#define CLEARWATER_SPK_OVERHEAT_DB_WIDTH 1 /* SPK_OVERHEAT_DB */ +#define CLEARWATER_SPK_OVERHEAT_WARN_DB 0x0004 /* SPK_OVERHEAT_WARN_DB */ +#define CLEARWATER_SPK_OVERHEAT_WARN_DB_MASK 0x0004 /* SPK_OVERHEAT_WARN_DB */ +#define CLEARWATER_SPK_OVERHEAT_WARN_DB_SHIFT 2 /* SPK_OVERHEAT_WARN_DB */ +#define CLEARWATER_SPK_OVERHEAT_WARN_DB_WIDTH 1 /* SPK_OVERHEAT_WARN_DB */ +#define CLEARWATER_SPK_OVERHEAT_DB 0x0002 /* SPK_OVERHEAT_DB */ +#define CLEARWATER_SPK_OVERHEAT_DB_MASK 0x0002 /* SPK_OVERHEAT_DB */ +#define CLEARWATER_SPK_OVERHEAT_DB_SHIFT 1 /* SPK_OVERHEAT_DB */ +#define CLEARWATER_SPK_OVERHEAT_DB_WIDTH 1 /* SPK_OVERHEAT_DB */ /* * R6848 (0x1AC0) - GPIO Debounce Config */ -#define CLEARWATER_GP_DBTIME_MASK 0x000F /* GP_DBTIME - [3:0] */ -#define CLEARWATER_GP_DBTIME_SHIFT 0 /* GP_DBTIME - [3:0] */ -#define CLEARWATER_GP_DBTIME_WIDTH 4 /* GP_DBTIME - [3:0] */ +#define CLEARWATER_GP_DBTIME_MASK 0x000F /* GP_DBTIME - [3:0] */ +#define CLEARWATER_GP_DBTIME_SHIFT 0 /* GP_DBTIME - [3:0] */ +#define CLEARWATER_GP_DBTIME_WIDTH 4 /* GP_DBTIME - [3:0] */ /* * R13304 (0x33F8) - OTP HPDET Calibration 1 @@ -12378,13 +12377,13 @@ /* * R13306 (0x33FA) - OTP HPDET Calibration 2 */ -#define CLEARWATER_OTP_HPDET_GRADIENT_1X 0xFF00 /* HP_GRADIENT_1X - [15:8] */ -#define CLEARWATER_OTP_HPDET_GRADIENT_1X_MASK 0xFF00 /* HP_GRADIENT_1X - [15:8] */ -#define CLEARWATER_OTP_HPDET_GRADIENT_1X_SHIFT 16 /* HP_GRADIENT_1X - [15:8] */ -#define CLEARWATER_OTP_HPDET_GRADIENT_1X_WIDTH 8 /* HP_GRADIENT_1X - [15:8] */ -#define CLEARWATER_OTP_HPDET_GRADIENT_0X 0x00FF /* HP_GRADIENT_0X - [7:0] */ -#define CLEARWATER_OTP_HPDET_GRADIENT_0X_MASK 0x00FF /* HP_GRADIENT_0X - [7:0] */ -#define CLEARWATER_OTP_HPDET_GRADIENT_0X_SHIFT 0 /* HP_GRADIENT_0X - [7:0] */ -#define CLEARWATER_OTP_HPDET_GRADIENT_0X_WIDTH 8 /* HP_GRADIENT_0X - [7:0] */ +#define CLEARWATER_OTP_HPDET_GRADIENT_1X 0xFF00 /* HP_GRADIENT_1X - [15:8] */ +#define CLEARWATER_OTP_HPDET_GRADIENT_1X_MASK 0xFF00 /* HP_GRADIENT_1X - [15:8] */ +#define CLEARWATER_OTP_HPDET_GRADIENT_1X_SHIFT 16 /* HP_GRADIENT_1X - [15:8] */ +#define CLEARWATER_OTP_HPDET_GRADIENT_1X_WIDTH 8 /* HP_GRADIENT_1X - [15:8] */ +#define CLEARWATER_OTP_HPDET_GRADIENT_0X 0x00FF /* HP_GRADIENT_0X - [7:0] */ +#define CLEARWATER_OTP_HPDET_GRADIENT_0X_MASK 0x00FF /* HP_GRADIENT_0X - [7:0] */ +#define CLEARWATER_OTP_HPDET_GRADIENT_0X_SHIFT 0 /* HP_GRADIENT_0X - [7:0] */ +#define CLEARWATER_OTP_HPDET_GRADIENT_0X_WIDTH 8 /* HP_GRADIENT_0X - [7:0] */ #endif From 5d475bf519e3796c4a472dc2c90ce83cfa885d3c Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 14 May 2015 11:01:11 +0100 Subject: [PATCH 0766/1167] mfd: arizona: Add stub for wm5102_patch() For the WM5102 there is a dependency in the core code on wm5102_patch() which only exists when CONFIG_MFD_WM5102 is defined. To avoid having to sprinkle #ifdefs around the code it is given an alternative empty stub version when CONFIG_MFD_WM5102 is deselected Change-Id: Ib6c5f760e51f48e20ae21885c4b32b6aa8890551 Signed-off-by: Richard Fitzgerald --- include/linux/mfd/arizona/core.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index feb9a5789e8..3d8c1665584 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -191,7 +191,15 @@ int arizona_request_irq(struct arizona *arizona, int irq, char *name, void arizona_free_irq(struct arizona *arizona, int irq, void *data); int arizona_set_irq_wake(struct arizona *arizona, int irq, int on); +#ifdef CONFIG_MFD_WM5102 int wm5102_patch(struct arizona *arizona); +#else +static inline int wm5102_patch(struct arizona *arizona) +{ + return 0; +} +#endif + int florida_patch(struct arizona *arizona); int wm8997_patch(struct arizona *arizona); int vegas_patch(struct arizona *arizona); From 24bcf30c7fc29e859426dfdbffc845a272d5071b Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 10 Apr 2015 13:43:32 +0100 Subject: [PATCH 0767/1167] mfd: arizona: Fix incorrect Makefile conditionals The use of ifneq against 'n' to conditionally compile codec-specific parts is wrong and was resulting in all the codec tables being built even for deselected codecs. Change-Id: I3f8ee441ed58ca3feed08aefb5d3185af48f0458 Signed-off-by: Richard Fitzgerald --- drivers/mfd/Makefile | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index fbd35c4c238..dceedb8865a 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -37,25 +37,25 @@ obj-$(CONFIG_MFD_ARIZONA) += arizona-core.o obj-$(CONFIG_MFD_ARIZONA) += arizona-irq.o obj-$(CONFIG_MFD_ARIZONA_I2C) += arizona-i2c.o obj-$(CONFIG_MFD_ARIZONA_SPI) += arizona-spi.o -ifneq ($(CONFIG_MFD_WM5102),n) +ifeq ($(CONFIG_MFD_WM5102),y) obj-$(CONFIG_MFD_ARIZONA) += wm5102-tables.o endif -ifneq ($(CONFIG_MFD_FLORIDA),n) +ifeq ($(CONFIG_MFD_FLORIDA),y) obj-$(CONFIG_MFD_ARIZONA) += florida-tables.o endif -ifneq ($(CONFIG_MFD_WM8997),n) +ifeq ($(CONFIG_MFD_WM8997),y) obj-$(CONFIG_MFD_ARIZONA) += wm8997-tables.o endif -ifneq ($(CONFIG_MFD_VEGAS),n) +ifeq ($(CONFIG_MFD_VEGAS),y) obj-$(CONFIG_MFD_ARIZONA) += vegas-tables.o endif -ifneq ($(CONFIG_MFD_CLEARWATER),n) +ifeq ($(CONFIG_MFD_CLEARWATER),y) obj-$(CONFIG_MFD_ARIZONA) += clearwater-tables.o endif -ifneq ($(CONFIG_MFD_MARLEY),n) +ifeq ($(CONFIG_MFD_MARLEY),y) obj-$(CONFIG_MFD_ARIZONA) += marley-tables.o endif -ifneq ($(CONFIG_MFD_LARGO),n) +ifeq ($(CONFIG_MFD_LARGO),y) obj-$(CONFIG_MFD_ARIZONA) += largo-tables.o endif obj-$(CONFIG_MFD_WM8400) += wm8400-core.o From 333271b605acbb3d3c37eb6fd47dd4d9c5bc91d9 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 14 May 2015 11:47:05 +0100 Subject: [PATCH 0768/1167] Documentation: mfd: arizona: Add cs47l85 identity Change-Id: I243bd50331cdc9561a8f0982225a9a875c8007b6 Signed-off-by: Richard Fitzgerald --- Documentation/devicetree/bindings/mfd/arizona.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 8c86c73fcab..7f3802a7131 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -17,6 +17,7 @@ Required properties: "wlf,wm1840" "wlf,wm1831" "cirrus,cs47l24" + "cirrus,cs47l85" - reg : I2C slave address when connected using I2C, chip select number when using SPI. From 757132f8be9b90329ea137f482d6fdddde605f44 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 24 Apr 2015 11:57:52 +0100 Subject: [PATCH 0769/1167] ASoC: vegas: Improve handling of mux controls Replace the widget callbacks with a custom put for the mux controls. This is a simpler way of handling the control bits that are affected by the mux settings. It is also less confusing because it prevents illegal mux settings instead of only being able to warn about them. Change-Id: I44b4ba233d72ae3ef6246288a80106e9212164b1 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/vegas.c | 198 +++++++++++++++++++-------------------- 1 file changed, 99 insertions(+), 99 deletions(-) diff --git a/sound/soc/codecs/vegas.c b/sound/soc/codecs/vegas.c index d74d368909b..08033a7a045 100644 --- a/sound/soc/codecs/vegas.c +++ b/sound/soc/codecs/vegas.c @@ -69,14 +69,6 @@ static int vegas_sysclk_ev(struct snd_soc_dapm_widget *w, return 0; } -static int vegas_in1mux_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event); - -static int vegas_in2mux_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event); - static int vegas_asrc_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) @@ -109,6 +101,96 @@ static int vegas_asrc_ev(struct snd_soc_dapm_widget *w, return 0; } +static int vegas_in1mux_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol); + struct snd_soc_dapm_widget *widget = wlist->widgets[0]; + struct snd_soc_codec *codec = widget->codec; + struct vegas_priv *vegas = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = vegas->core.arizona; + const struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + unsigned int mux, inmode; + unsigned int mode_val, src_val; + + mux = ucontrol->value.enumerated.item[0]; + if (mux > 1) + return -EINVAL; + + /* L and R registers have same shift and mask */ + inmode = arizona->pdata.inmode[2 * mux]; + src_val = mux << ARIZONA_IN1L_SRC_SHIFT; + if (inmode & ARIZONA_INMODE_SE) + src_val |= 1 << ARIZONA_IN1L_SRC_SE_SHIFT; + + switch (arizona->pdata.inmode[0]) { + case ARIZONA_INMODE_DMIC: + if (mux) + mode_val = 0; /* B always analogue */ + else + mode_val = 1 << ARIZONA_IN1_MODE_SHIFT; + + snd_soc_update_bits(codec, ARIZONA_IN1L_CONTROL, + ARIZONA_IN1_MODE_MASK, mode_val); + + /* IN1A is digital so L and R must change together */ + /* src_val setting same for both registers */ + snd_soc_update_bits(codec, + ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_SRC_MASK | + ARIZONA_IN1L_SRC_SE_MASK, src_val); + snd_soc_update_bits(codec, + ARIZONA_ADC_DIGITAL_VOLUME_1R, + ARIZONA_IN1R_SRC_MASK | + ARIZONA_IN1R_SRC_SE_MASK, src_val); + break; + default: + /* both analogue */ + snd_soc_update_bits(codec, + e->reg, + ARIZONA_IN1L_SRC_MASK | + ARIZONA_IN1L_SRC_SE_MASK, + src_val); + break; + } + + return snd_soc_dapm_put_enum_virt(kcontrol, ucontrol); +} + +static int vegas_in2mux_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol); + struct snd_soc_dapm_widget *widget = wlist->widgets[0]; + struct snd_soc_codec *codec = widget->codec; + struct vegas_priv *vegas = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = vegas->core.arizona; + unsigned int mux, inmode, src_val, mode_val; + + mux = ucontrol->value.enumerated.item[0]; + if (mux > 1) + return -EINVAL; + + inmode = arizona->pdata.inmode[1 + (2 * mux)]; + if (inmode & ARIZONA_INMODE_DMIC) + mode_val = 1 << ARIZONA_IN2_MODE_SHIFT; + else + mode_val = 0; + + src_val = mux << ARIZONA_IN2L_SRC_SHIFT; + if (inmode & ARIZONA_INMODE_SE) + src_val |= 1 << ARIZONA_IN2L_SRC_SE_SHIFT; + + snd_soc_update_bits(codec, ARIZONA_IN2L_CONTROL, + ARIZONA_IN2_MODE_MASK, mode_val); + + snd_soc_update_bits(codec, ARIZONA_ADC_DIGITAL_VOLUME_2L, + ARIZONA_IN2L_SRC_MASK | ARIZONA_IN2L_SRC_SE_MASK, + src_val); + + return snd_soc_dapm_put_enum_virt(kcontrol, ucontrol); +} + static const char * const vegas_inmux_texts[] = { "A", "B", @@ -130,12 +212,15 @@ static const SOC_ENUM_SINGLE_DECL(vegas_in2mux_enum, vegas_inmux_texts); static const struct snd_kcontrol_new vegas_in1mux[2] = { - SOC_DAPM_ENUM("IN1L Mux", vegas_in1muxl_enum), - SOC_DAPM_ENUM("IN1R Mux", vegas_in1muxr_enum), + SOC_DAPM_ENUM_EXT("IN1L Mux", vegas_in1muxl_enum, + snd_soc_dapm_get_enum_double, vegas_in1mux_put), + SOC_DAPM_ENUM_EXT("IN1R Mux", vegas_in1muxr_enum, + snd_soc_dapm_get_enum_double, vegas_in1mux_put), }; static const struct snd_kcontrol_new vegas_in2mux = - SOC_DAPM_ENUM("IN2 Mux", vegas_in2mux_enum); + SOC_DAPM_ENUM_EXT("IN2 Mux", vegas_in2mux_enum, + snd_soc_dapm_get_enum_double, vegas_in2mux_put); static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); @@ -520,12 +605,9 @@ SND_SOC_DAPM_INPUT("IN1BR"), SND_SOC_DAPM_INPUT("IN2A"), SND_SOC_DAPM_INPUT("IN2B"), -SND_SOC_DAPM_MUX_E("IN1L Mux", SND_SOC_NOPM, 0, 0, &vegas_in1mux[0], - vegas_in1mux_ev, SND_SOC_DAPM_PRE_PMU), -SND_SOC_DAPM_MUX_E("IN1R Mux", SND_SOC_NOPM, 0, 0, &vegas_in1mux[1], - vegas_in1mux_ev, SND_SOC_DAPM_PRE_PMU), -SND_SOC_DAPM_MUX_E("IN2 Mux", SND_SOC_NOPM, 0, 0, &vegas_in2mux, - vegas_in2mux_ev, SND_SOC_DAPM_PRE_PMU), +SND_SOC_DAPM_MUX("IN1L Mux", SND_SOC_NOPM, 0, 0, &vegas_in1mux[0]), +SND_SOC_DAPM_MUX("IN1R Mux", SND_SOC_NOPM, 0, 0, &vegas_in1mux[1]), +SND_SOC_DAPM_MUX("IN2 Mux", SND_SOC_NOPM, 0, 0, &vegas_in2mux), SND_SOC_DAPM_OUTPUT("DRC1 Signal Activity"), @@ -1236,88 +1318,6 @@ static struct snd_soc_dai_driver vegas_dai[] = { }, }; -static int vegas_in1mux_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event) -{ - struct snd_soc_codec *codec = w->codec; - struct arizona *arizona = dev_get_drvdata(codec->dev->parent); - unsigned int left_mux, right_mux, in1mode, old; - - switch (event) { - case SND_SOC_DAPM_PRE_PMU: - /* Validate the mux configuration */ - left_mux = snd_soc_read(codec, ARIZONA_ADC_DIGITAL_VOLUME_1L) & - ARIZONA_IN1L_SRC_MASK; - right_mux = snd_soc_read(codec, ARIZONA_ADC_DIGITAL_VOLUME_1R) & - ARIZONA_IN1R_SRC_MASK; - - /* Only IN1A can be digital, IN1B is always analogue */ - in1mode = (arizona->pdata.inmode[0] & 2) - << (ARIZONA_IN1_MODE_SHIFT - 1); - - if (in1mode != 0) { - /* if IN1A is digital, the only valid mux configs - * are both channels A or both channels B. - */ - if (left_mux != right_mux) { - dev_err(arizona->dev, - "IN1=DMIC and IN1L Mux != IN1R Mux"); - return -EINVAL; - } - - /* IN1A is digital so need to ensure mode is set back - * to analogue if IN1B is selected - */ - if (left_mux != 0) - in1mode = 0; - } - - old = snd_soc_read(codec, ARIZONA_IN1L_CONTROL) & - ARIZONA_IN1_MODE_MASK; - - if (old != in1mode) - snd_soc_update_bits(codec, ARIZONA_IN1L_CONTROL, - ARIZONA_IN1_MODE_MASK, in1mode); - return 0; - - default: - return 0; - } -} - -static int vegas_in2mux_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event) -{ - struct snd_soc_codec *codec = w->codec; - struct arizona *arizona = dev_get_drvdata(codec->dev->parent); - unsigned int mux, in2mode, old; - - switch (event) { - case SND_SOC_DAPM_PRE_PMU: - mux = snd_soc_read(codec, ARIZONA_ADC_DIGITAL_VOLUME_2L) & - ARIZONA_IN2L_SRC_MASK; - - if (mux == 0) - in2mode = (arizona->pdata.inmode[1] & 2) - << (ARIZONA_IN2_MODE_SHIFT - 1); - else - in2mode = 0; /* IN2B always analogue */ - - old = snd_soc_read(codec, ARIZONA_IN2L_CONTROL) & - ARIZONA_IN2_MODE_MASK; - - if (old != in2mode) - snd_soc_update_bits(codec, ARIZONA_IN2L_CONTROL, - ARIZONA_IN2_MODE_MASK, in2mode); - return 0; - - default: - return 0; - } -} - static int vegas_set_fll(struct snd_soc_codec *codec, int fll_id, int source, unsigned int Fref, unsigned int Fout) { From 122cd2529c26faa34ba66cedb6bb2776eb7e3336 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 27 Apr 2015 13:04:39 +0100 Subject: [PATCH 0770/1167] mfd: arizona: Update documentation of inmode pdata Document how the inmode array entries map to inputs Change-Id: I401eeb5f8d736eeabbffdf5767a4318849b48590 Signed-off-by: Richard Fitzgerald --- Documentation/devicetree/bindings/mfd/arizona.txt | 3 +++ include/linux/mfd/arizona/pdata.h | 3 +++ 2 files changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 7f3802a7131..61be98ffd3a 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -114,6 +114,9 @@ Optional properties: - wlf,inmode : Input mode for each input, must contain four cells if specified. 0 indicates Differential, 1 indicates Single Ended and 2 indicates a digital microphone. + For most codecs the entries map to + wm8998: entries are for + cs47l85, wm8285: entries are for - wlf,out-mono : Mono bit for each output, must contain six cells if specified. A non-zero value indicates the corresponding output is mono. diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 647980224d3..78a6c2d16c2 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -253,6 +253,9 @@ struct arizona_pdata { /** * Mode of input structures * One of the ARIZONA_INMODE_xxx values + * For most codecs the entries are [0]=IN1 [1]=IN2 [2]=IN3 [3]=IN4 + * wm8998: [0]=IN1A [1]=IN2A [2]=IN1B [3]=IN2B + * cs47l85, wm8285: [0]=IN1L [1]=IN1R [2]=IN2L [3]=IN2R [4]=IN3L [5]=IN3R */ int inmode[ARIZONA_MAX_INPUT]; From 8e588b35c3a2489171c1234ce47c39b5f1c0e18c Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 27 Apr 2015 13:23:02 +0100 Subject: [PATCH 0771/1167] mfd: arizona: Number of inputs should be constant The number of inputs was being indirectly derived from the size of the pdata array, but the number of inputs for a codec is fixed so it should be an explicit constant value. Change-Id: I90ed5e6b2823c943946eb7a8f86916cd5bf2c809 Signed-off-by: Richard Fitzgerald --- drivers/mfd/arizona-core.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 563c3fbbeb2..933ae8d2760 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -2002,18 +2002,20 @@ int arizona_dev_init(struct arizona *arizona) case WM5110: case WM8997: case WM8280: - case WM8998: - case WM1814: case WM1831: case CS47L24: - /* These arizona chips have only 4 inputs and + /* These arizona chips have 4 inputs and settings for INxL and INxR are same*/ - max_inputs = ARIZONA_MAX_INPUT / 2 - 2; + max_inputs = 4; + break; + case WM8998: + case WM1814: + max_inputs = 2; break; default: - /*DMIC Ref for IN4-6 is fixed for WM8285/1840 and + /* DMIC Ref for IN4-6 is fixed for WM8285/1840 and settings for INxL and INxR are different*/ - max_inputs = ARIZONA_MAX_INPUT / 2 - 3; + max_inputs = 3; break; } From 0bccce1fbc6de7f9001473d86b4bea65ced8a8b4 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 15 Apr 2015 09:07:27 +0100 Subject: [PATCH 0772/1167] mfd: arizona: Silence last few sparse warnings in arizona-core Change-Id: Ia81b5d9d74a74d86bfaf25b32bb0fa10c358698d Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 933ae8d2760..432274f44f2 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1253,7 +1253,7 @@ static int arizona_of_get_micbias(struct arizona *arizona, static int arizona_of_get_core_pdata(struct arizona *arizona) { struct arizona_pdata *pdata = &arizona->pdata; - u32 out_mono[ARRAY_SIZE(pdata->out_mono)]; + u32 out_mono[ARIZONA_MAX_OUTPUT]; int i; memset(&out_mono, 0, sizeof(out_mono)); @@ -1278,13 +1278,13 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) arizona_of_read_u32_array(arizona, "wlf,out-mono", false, out_mono, ARRAY_SIZE(out_mono)); - for (i = 0; i < ARRAY_SIZE(pdata->out_mono); ++i) + for (i = 0; i < ARRAY_SIZE(out_mono); ++i) pdata->out_mono[i] = !!out_mono[i]; arizona_of_read_u32(arizona, "wlf,wm5102t-output-pwr", false, &pdata->wm5102t_output_pwr); - arizona_of_read_u32(arizona, "wlf,hpdet-ext-res", false, + arizona_of_read_s32(arizona, "wlf,hpdet-ext-res", false, &pdata->hpdet_ext_res); pdata->rev_specific_fw = of_property_read_bool(arizona->dev->of_node, From 94ce2e6e1aad7dac34f39dd2b206b11a7e5cc050 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 24 Mar 2015 11:17:00 +0000 Subject: [PATCH 0773/1167] mfd: arizona: Add missing error path goto In arizona_runtime_suspend we need to call arizona_restore_dvfs if we fail to set the suspend voltage for DCVDD. This must have been missed as part of the rebasing of patches between the DVFS and suspend fix ups. Change-Id: I5da11fa168afd9a24e2784ec87ba58b362cfccd7 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 432274f44f2..366b930b1cb 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -821,7 +821,7 @@ static int arizona_runtime_suspend(struct device *dev) dev_err(arizona->dev, "Failed to set suspend voltage: %d\n", ret); - return ret; + goto err; } break; default: From 6adb6bb64c4987eb1a5542f18b257d4cab9b4de7 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Sun, 22 Mar 2015 12:16:01 +0000 Subject: [PATCH 0774/1167] mfd: arizona: Fix resume reset with external DCVDD The holding of reset during resume for external DCVDD's was only intended to be applied to Clearwater. But it has been accidentally applied to all CODECs. This is especially broken for wm5102 where we never actually release the reset line. This patch corrects this such that this is only held for Clearwater. Change-Id: I4a404428122df6a0ea68affad205365c5edf905e Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 366b930b1cb..c9dd2d37a0c 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -606,6 +606,13 @@ static int arizona_runtime_resume(struct device *dev) if (arizona->rev == 3 && arizona->pdata.reset) gpio_set_value_cansleep(arizona->pdata.reset, 0); break; + case WM5102: + case WM8997: + case WM8998: + case WM1814: + case WM1831: + case CS47L24: + break; default: if (arizona->pdata.reset && arizona->external_dcvdd) { gpio_set_value_cansleep(arizona->pdata.reset, 0); @@ -692,11 +699,6 @@ static int arizona_runtime_resume(struct device *dev) case WM1814: case WM1831: case CS47L24: - if (arizona->pdata.reset && arizona->external_dcvdd) { - gpio_set_value_cansleep(arizona->pdata.reset, 1); - msleep(1); - } - ret = arizona_wait_for_boot(arizona); if (ret != 0) { goto err; From fdec541d1609c98ab90c546f8b8f8269a4ee23ba Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 23 Mar 2015 15:14:14 +0000 Subject: [PATCH 0775/1167] mfd: arizona: Sync boot code with upstream Change-Id: I5f75b124708d5adf2acf8871a16731577a9dabc6 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 159 ++++++++++++++++++++++--------------- 1 file changed, 94 insertions(+), 65 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index c9dd2d37a0c..2dc6d82c4fa 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -410,21 +410,26 @@ static int arizona_wait_for_boot(struct arizona *arizona) return ret; } -static int arizona_exec_with_sysclk(struct arizona* arizona, - int (*exec)(struct arizona*)) +struct arizona_sysclk_state { + unsigned int fll; + unsigned int sysclk; +}; + +static int arizona_enable_freerun_sysclk(struct arizona *arizona, + struct arizona_sysclk_state *state) { - unsigned int fll, sysclk; int ret, err; /* Cache existing FLL and SYSCLK settings */ - ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll); - if (ret != 0) { + ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll); + if (ret) { dev_err(arizona->dev, "Failed to cache FLL settings: %d\n", ret); return ret; } - ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk); - if (ret != 0) { + ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, + &state->sysclk); + if (ret) { dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n", ret); return ret; @@ -433,7 +438,7 @@ static int arizona_exec_with_sysclk(struct arizona* arizona, /* Start up SYSCLK using the FLL in free running mode */ ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN); - if (ret != 0) { + if (ret) { dev_err(arizona->dev, "Failed to start FLL in freerunning mode: %d\n", ret); @@ -442,98 +447,113 @@ static int arizona_exec_with_sysclk(struct arizona* arizona, ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5, ARIZONA_FLL1_CLOCK_OK_STS, ARIZONA_FLL1_CLOCK_OK_STS); - if (ret != 0) { + if (ret) { ret = -ETIMEDOUT; goto err_fll; } ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144); - if (ret != 0) { + if (ret) { dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret); goto err_fll; } - ret = exec(arizona); + return 0; - err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk); - if (err != 0) { +err_fll: + err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); + if (err) dev_err(arizona->dev, - "Failed to re-apply old SYSCLK settings: %d\n", - err); - } + "Failed to re-apply old FLL settings: %d\n", err); -err_fll: - err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll); - if (err != 0) { + return ret; +} + +static int arizona_disable_freerun_sysclk(struct arizona *arizona, + struct arizona_sysclk_state *state) +{ + int ret; + + ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, + state->sysclk); + if (ret) { dev_err(arizona->dev, - "Failed to re-apply old FLL settings: %d\n", - err); + "Failed to re-apply old SYSCLK settings: %d\n", ret); + return ret; } - if (ret != 0) + ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); + if (ret) { + dev_err(arizona->dev, + "Failed to re-apply old FLL settings: %d\n", ret); return ret; - else - return err; + } + + return 0; } -static int arizona_hardware_patch_wseq(struct arizona* arizona) +static int wm5102_apply_hardware_patch(struct arizona *arizona) { - int ret; + struct arizona_sysclk_state state; + int err, ret; + + ret = arizona_enable_freerun_sysclk(arizona, &state); + if (ret) + return ret; /* Start the write sequencer and wait for it to finish */ ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); - if (ret != 0) { + if (ret) { dev_err(arizona->dev, "Failed to start write sequencer: %d\n", ret); - return ret; + goto err; } + ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1, ARIZONA_WSEQ_BUSY, 0); - if (ret != 0) { + if (ret) { regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, - ARIZONA_WSEQ_ABORT); + ARIZONA_WSEQ_ABORT); ret = -ETIMEDOUT; } - return ret; -} +err: + err = arizona_disable_freerun_sysclk(arizona, &state); -static int arizona_apply_hardware_patch(struct arizona* arizona) -{ - return arizona_exec_with_sysclk(arizona, arizona_hardware_patch_wseq); + return ret ?: err; } -static const struct reg_default arizona_sysclk_reg_patch[] = { +/* + * Register patch to some of the CODECs internal write sequences + * to ensure a clean exit from the low power sleep state. + */ +static const struct reg_default wm5110_sleep_patch[] = { { 0x337A, 0xC100 }, { 0x337B, 0x0041 }, - { 0x3300, 0xa210 }, + { 0x3300, 0xA210 }, { 0x3301, 0x050C }, }; -static int arizona_sleep_patch(struct arizona* arizona) +static int wm5110_apply_sleep_patch(struct arizona *arizona) { - int i, ret; + struct arizona_sysclk_state state; + int err, ret; - for (i = 0; i < ARRAY_SIZE(arizona_sysclk_reg_patch); ++i) { - ret = regmap_write(arizona->regmap, - arizona_sysclk_reg_patch[i].reg, - arizona_sysclk_reg_patch[i].def); - if (ret != 0) { - dev_err(arizona->dev, - "Failed to apply sleep patch: %x <= %x\n", - arizona_sysclk_reg_patch[i].reg, - arizona_sysclk_reg_patch[i].def); - return ret; - } - } + ret = arizona_enable_freerun_sysclk(arizona, &state); + if (ret) + return ret; - return 0; -} + ret = regmap_multi_reg_write_bypassed(arizona->regmap, + wm5110_sleep_patch, + ARRAY_SIZE(wm5110_sleep_patch)); -static int arizona_apply_sleep_patch(struct arizona* arizona) -{ - return arizona_exec_with_sysclk(arizona, arizona_sleep_patch); + err = arizona_disable_freerun_sysclk(arizona, &state); + + if (ret) + return ret; + else + return err; } static int arizona_soft_reset(struct arizona *arizona) @@ -648,8 +668,8 @@ static int arizona_runtime_resume(struct device *dev) goto err; } - ret = arizona_apply_hardware_patch(arizona); - if (ret != 0) { + ret = wm5102_apply_hardware_patch(arizona); + if (ret) { dev_err(arizona->dev, "Failed to apply hardware patch: %d\n", ret); @@ -670,20 +690,24 @@ static int arizona_runtime_resume(struct device *dev) } ret = arizona_wait_for_boot(arizona); - if (ret != 0) { + if (ret) goto err; - } if (arizona->external_dcvdd) { ret = regmap_update_bits(arizona->regmap, ARIZONA_ISOLATION_CONTROL, ARIZONA_ISOLATE_DCVDD1, 0); - if (ret != 0) { + if (ret) { dev_err(arizona->dev, "Failed to connect DCVDD: %d\n", ret); goto err; } } else { + /* + * As this is only called for the internal regulator + * (where we know voltage ranges available) it is ok + * to request an exact range. + */ ret = regulator_set_voltage(arizona->dcvdd, 1200000, 1200000); if (ret < 0) { @@ -817,6 +841,11 @@ static int arizona_runtime_suspend(struct device *dev) switch (arizona->type) { case WM5110: case WM8280: + /* + * As this is only called for the internal regulator + * (where we know voltage ranges available) it is ok + * to request an exact range. + */ ret = regulator_set_voltage(arizona->dcvdd, 1175000, 1175000); if (ret < 0) { @@ -1883,8 +1912,8 @@ int arizona_dev_init(struct arizona *arizona) switch (arizona->type) { case WM5102: - ret = arizona_apply_hardware_patch(arizona); - if (ret != 0) { + ret = wm5102_apply_hardware_patch(arizona); + if (ret) { dev_err(arizona->dev, "Failed to apply hardware patch: %d\n", ret); @@ -1893,8 +1922,8 @@ int arizona_dev_init(struct arizona *arizona) break; case WM5110: case WM8280: - ret = arizona_apply_sleep_patch(arizona); - if (ret != 0) { + ret = wm5110_apply_sleep_patch(arizona); + if (ret) { dev_err(arizona->dev, "Failed to apply sleep patch: %d\n", ret); From 798673ca1d9c3a71853d2ac33ba4f64a98a7239f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 24 Mar 2015 10:40:04 +0000 Subject: [PATCH 0776/1167] mfd: arizona: Use devres to manage reset GPIO This also handily fixes a leak of the GPIO in arizona_dev_exit. Change-Id: I0105e89192fdc149023ba6811a43c19b236290db Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 2dc6d82c4fa..3e545b99ee9 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1642,9 +1642,9 @@ int arizona_dev_init(struct arizona *arizona) if (arizona->pdata.reset) { /* Start out with /RESET low to put the chip into reset */ - ret = gpio_request_one(arizona->pdata.reset, - GPIOF_DIR_OUT | GPIOF_INIT_LOW, - "arizona /RESET"); + ret = devm_gpio_request_one(arizona->dev, arizona->pdata.reset, + GPIOF_DIR_OUT | GPIOF_INIT_LOW, + "arizona /RESET"); if (ret != 0) { dev_err(dev, "Failed to request /RESET: %d\n", ret); goto err_notifier; @@ -2201,10 +2201,8 @@ int arizona_dev_init(struct arizona *arizona) err_irq: arizona_irq_exit(arizona); err_reset: - if (arizona->pdata.reset) { + if (arizona->pdata.reset) gpio_set_value_cansleep(arizona->pdata.reset, 0); - gpio_free(arizona->pdata.reset); - } regulator_disable(arizona->dcvdd); err_enable: regulator_bulk_disable(arizona->num_core_supplies, From efee360063b6cd261d913789f0565c984e070e6e Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 19 Mar 2015 15:30:12 +0000 Subject: [PATCH 0777/1167] mfd: arizona: Factor out hard reset into helper functions This patch adds functions for enabling and disabling the physical reset line. This will be helpful in future refactoring. Change-Id: Ia5caa0e595bbdbe48537bb168c0318e924ec59f9 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 61 +++++++++++++++++++++----------------- 1 file changed, 33 insertions(+), 28 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 3e545b99ee9..1ff979c639f 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -410,6 +410,29 @@ static int arizona_wait_for_boot(struct arizona *arizona) return ret; } +static inline void arizona_enable_reset(struct arizona *arizona) +{ + if (arizona->pdata.reset) + gpio_set_value_cansleep(arizona->pdata.reset, 0); +} + +static void arizona_disable_reset(struct arizona *arizona) +{ + if (arizona->pdata.reset) { + switch (arizona->type) { + case WM5110: + case WM8280: + msleep(5); + break; + default: + break; + } + + gpio_set_value_cansleep(arizona->pdata.reset, 1); + msleep(1); + } +} + struct arizona_sysclk_state { unsigned int fll; unsigned int sysclk; @@ -623,8 +646,8 @@ static int arizona_runtime_resume(struct device *dev) switch (arizona->type) { case WM5110: case WM8280: - if (arizona->rev == 3 && arizona->pdata.reset) - gpio_set_value_cansleep(arizona->pdata.reset, 0); + if (arizona->rev == 3) + arizona_enable_reset(arizona); break; case WM5102: case WM8997: @@ -634,9 +657,8 @@ static int arizona_runtime_resume(struct device *dev) case CS47L24: break; default: - if (arizona->pdata.reset && arizona->external_dcvdd) { - gpio_set_value_cansleep(arizona->pdata.reset, 0); - } + if (arizona->external_dcvdd) + arizona_enable_reset(arizona); break; }; @@ -684,8 +706,7 @@ static int arizona_runtime_resume(struct device *dev) if (ret != 0) goto err; } else { - gpio_set_value_cansleep(arizona->pdata.reset, 1); - msleep(1); + arizona_disable_reset(arizona); } } @@ -740,10 +761,8 @@ static int arizona_runtime_resume(struct device *dev) } break; default: - if (arizona->pdata.reset && arizona->external_dcvdd) { - gpio_set_value_cansleep(arizona->pdata.reset, 1); - msleep(1); - } + if (arizona->external_dcvdd) + arizona_disable_reset(arizona); ret = arizona_wait_for_boot(arizona); if (ret != 0) { @@ -1668,19 +1687,7 @@ int arizona_dev_init(struct arizona *arizona) goto err_enable; } - switch (arizona->type) { - case WM5110: - case WM8280: - msleep(5); - break; - default: - break; - } - - if (arizona->pdata.reset) { - gpio_set_value_cansleep(arizona->pdata.reset, 1); - msleep(1); - } + arizona_disable_reset(arizona); regcache_cache_only(arizona->regmap, false); @@ -2201,8 +2208,7 @@ int arizona_dev_init(struct arizona *arizona) err_irq: arizona_irq_exit(arizona); err_reset: - if (arizona->pdata.reset) - gpio_set_value_cansleep(arizona->pdata.reset, 0); + arizona_enable_reset(arizona); regulator_disable(arizona->dcvdd); err_enable: regulator_bulk_disable(arizona->num_core_supplies, @@ -2230,8 +2236,7 @@ int arizona_dev_exit(struct arizona *arizona) arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); arizona_irq_exit(arizona); - if (arizona->pdata.reset) - gpio_set_value_cansleep(arizona->pdata.reset, 0); + arizona_enable_reset(arizona); regulator_bulk_disable(arizona->num_core_supplies, arizona->core_supplies); From a7a923dba3367b75d3027a47facf0a7c55c7bb13 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 8 Apr 2015 13:24:50 +0100 Subject: [PATCH 0778/1167] mfd: wm5102: Ensure we always boot the device fully The wm5102 uses a custom boot sequence and the standard boot sequence is disabled. However, the standard boot sequence must be run at least once after a cold boot (caused by either a hard reset or removal of AVDD). Unfortunately the register WRITE_SEQUENCER_CTRL_3 is not affected by the hardware reset. This means if the device has been previously booted but the AVDD supply has never been removed, arizona_dev_init will reset the chip but the boot sequence will not run, which can cause numerous problems. The solution is to manually clear this register and then boot the chip again, which is what this patch does. Change-Id: Ifa6a8e802170670dd35b1ec17f42d2553fbd0765 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 50 ++++++++++++++++++++++++++++++-------- 1 file changed, 40 insertions(+), 10 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 1ff979c639f..684f2d06d8b 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -579,6 +579,33 @@ static int wm5110_apply_sleep_patch(struct arizona *arizona) return err; } +static int wm5102_clear_write_sequencer(struct arizona *arizona) +{ + int ret; + + ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3, + 0x0); + if (ret) { + dev_err(arizona->dev, + "Failed to clear write sequencer state: %d\n", ret); + return ret; + } + + arizona_enable_reset(arizona); + regulator_disable(arizona->dcvdd); + + msleep(20); + + ret = regulator_enable(arizona->dcvdd); + if (ret) { + dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret); + return ret; + } + arizona_disable_reset(arizona); + + return 0; +} + static int arizona_soft_reset(struct arizona *arizona) { int ret; @@ -1732,21 +1759,24 @@ int arizona_dev_init(struct arizona *arizona) case WM5102: ret = regmap_read(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3, &val); - if (ret != 0) + if (ret) { dev_err(dev, "Failed to check write sequencer state: %d\n", ret); - else if (val & 0x01) - break; - /* Fall through */ - default: - ret = arizona_wait_for_boot(arizona); - if (ret != 0) { - dev_err(arizona->dev, - "Device failed initial boot: %d\n", ret); - goto err_reset; + } else if (val & 0x01) { + ret = wm5102_clear_write_sequencer(arizona); + if (ret) + return ret; } break; + default: + break; + } + + ret = arizona_wait_for_boot(arizona); + if (ret) { + dev_err(arizona->dev, "Device failed initial boot: %d\n", ret); + goto err_reset; } /* Read the device ID information & do device specific stuff */ From e9140bb9ae1b46372440f56f56b4082b95f43a52 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 18 Mar 2015 17:46:04 +0000 Subject: [PATCH 0779/1167] mfd: arizona: Add better support for system suspend Allow the chip to completely power off if we enter runtime suspend and there is no jack detection active. This is helpful for systems where system suspend might remove the supplies to the CODEC, without informing us. Note the powering off is done in runtime suspend rather than system suspend, because we need to hold reset until the first time DCVDD is powered anyway (which would be in runtime resume), and we might as well save the extra power. Change-Id: I1e403a485c0be0d11aa9d85b95a4c9af7c7819da Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 114 ++++++++++++++++++++++++------- include/linux/mfd/arizona/core.h | 1 + 2 files changed, 90 insertions(+), 25 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 684f2d06d8b..d55886cd250 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -667,14 +667,31 @@ static int arizona_runtime_resume(struct device *dev) { struct arizona *arizona = dev_get_drvdata(dev); int ret; + bool in_reset = false; dev_dbg(arizona->dev, "Leaving AoD mode\n"); + if (arizona->has_fully_powered_off) { + dev_dbg(arizona->dev, "Re-enabling core supplies\n"); + + ret = regulator_bulk_enable(arizona->num_core_supplies, + arizona->core_supplies); + if (ret) { + dev_err(dev, "Failed to enable core supplies: %d\n", + ret); + return ret; + } + + in_reset = true; + } + switch (arizona->type) { case WM5110: case WM8280: - if (arizona->rev == 3) + if (arizona->rev == 3) { arizona_enable_reset(arizona); + in_reset = true; + } break; case WM5102: case WM8997: @@ -684,17 +701,30 @@ static int arizona_runtime_resume(struct device *dev) case CS47L24: break; default: - if (arizona->external_dcvdd) + if (arizona->external_dcvdd) { arizona_enable_reset(arizona); + in_reset = true; + } break; }; ret = regulator_enable(arizona->dcvdd); if (ret != 0) { dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); + if (arizona->has_fully_powered_off) + regulator_bulk_disable(arizona->num_core_supplies, + arizona->core_supplies); return ret; } + if (in_reset) + arizona_disable_reset(arizona); + + if (arizona->has_fully_powered_off) { + enable_irq(arizona->irq); + arizona->has_fully_powered_off = false; + } + regcache_cache_only(arizona->regmap, false); switch (arizona->type) { @@ -732,8 +762,6 @@ static int arizona_runtime_resume(struct device *dev) ret = arizona_soft_reset(arizona); if (ret != 0) goto err; - } else { - arizona_disable_reset(arizona); } } @@ -765,6 +793,14 @@ static int arizona_runtime_resume(struct device *dev) goto err; } } + + ret = wm5110_apply_sleep_patch(arizona); + if (ret) { + dev_err(arizona->dev, + "Failed to re-apply sleep patch: %d\n", + ret); + goto err; + } break; case WM8997: case WM8998: @@ -788,9 +824,6 @@ static int arizona_runtime_resume(struct device *dev) } break; default: - if (arizona->external_dcvdd) - arizona_disable_reset(arizona); - ret = arizona_wait_for_boot(arizona); if (ret != 0) { goto err; @@ -841,10 +874,17 @@ static int arizona_runtime_resume(struct device *dev) static int arizona_runtime_suspend(struct device *dev) { struct arizona *arizona = dev_get_drvdata(dev); + unsigned int val; int ret; dev_dbg(arizona->dev, "Entering AoD mode\n"); + ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val); + if (ret) { + dev_err(dev, "Failed to check jack det status: %d\n", ret); + return ret; + } + switch(arizona->type) { case WM5102: case WM8997: @@ -883,27 +923,39 @@ static int arizona_runtime_suspend(struct device *dev) default: break; } - } else { - switch (arizona->type) { - case WM5110: - case WM8280: - /* - * As this is only called for the internal regulator - * (where we know voltage ranges available) it is ok - * to request an exact range. - */ - ret = regulator_set_voltage(arizona->dcvdd, - 1175000, 1175000); - if (ret < 0) { + } + + switch (arizona->type) { + case WM5110: + case WM8280: + if (arizona->external_dcvdd) + break; + + /* + * As this is only called for the internal regulator + * (where we know voltage ranges available) it is ok + * to request an exact range. + */ + ret = regulator_set_voltage(arizona->dcvdd, 1175000, 1175000); + if (ret < 0) { + dev_err(arizona->dev, + "Failed to set suspend voltage: %d\n", ret); + goto err; + } + break; + case WM5102: + if (!(val & ARIZONA_JD1_ENA)) + ret = regmap_write(arizona->regmap, + ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0); + if (ret) { dev_err(arizona->dev, - "Failed to set suspend voltage: %d\n", + "Failed to clear write sequencer: %d\n", ret); - goto err; + return ret; } - break; - default: - break; - } + break; + default: + break; } regcache_cache_only(arizona->regmap, true); @@ -912,6 +964,18 @@ static int arizona_runtime_suspend(struct device *dev) regcache_mark_dirty(arizona->regmap_32bit); regulator_disable(arizona->dcvdd); + /* Allow us to completely power down if no jack detection */ + if (!(val & ARIZONA_JD1_ENA)) { + dev_dbg(arizona->dev, "Fully powering off\n"); + + arizona->has_fully_powered_off = true; + + disable_irq(arizona->irq); + arizona_enable_reset(arizona); + regulator_bulk_disable(arizona->num_core_supplies, + arizona->core_supplies); + } + return 0; err: arizona_restore_dvfs(arizona); diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 3d8c1665584..c59febf4a7d 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -132,6 +132,7 @@ struct arizona { struct regulator_bulk_data core_supplies[ARIZONA_MAX_CORE_SUPPLIES]; struct regulator *dcvdd; struct notifier_block dcvdd_notifier; + bool has_fully_powered_off; struct arizona_pdata pdata; From 3d1ec27e26cb565c00f7454ba88d13ab593549df Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 8 Jan 2015 10:18:14 +0000 Subject: [PATCH 0780/1167] ASoC: wm_adsp: Remove private field from wm_coeff_ctl The private field in wm_coeff_ctl is currently unused and given the controls are entirely handled within the ADSP code it is not clear what it would be used for in the future. Remove the field for now it can be readded if it is ever required. Change-Id: Iedbfa3fb0138707d26abb067751008123faf8780 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 285b63e7a4a..aa57e41bc72 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -437,7 +437,6 @@ struct wm_coeff_ctl { struct wm_adsp_alg_region alg_region; struct wm_coeff_ctl_ops ops; struct wm_adsp *dsp; - void *private; unsigned int enabled:1; struct list_head list; void *cache; From defcd503738c48ed7d283dd4b5866240e30c5179 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 30 Sep 2014 13:32:23 +0100 Subject: [PATCH 0781/1167] mfd: arizona: Remove redundant register sync This soft reset used to be located after the register patch had been applied, but has since moved to before the patch is applied. At the new location there is no requirement to do a register sync as no register writes will have happened yet. Change-Id: Iddf10c317f6a3590f32ebb41cd48c4bd0a6789be Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index d55886cd250..9dfc16ebaa6 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1805,17 +1805,9 @@ int arizona_dev_init(struct arizona *arizona) /* If we have a /RESET GPIO we'll already be reset */ if (!arizona->pdata.reset) { - regcache_mark_dirty(arizona->regmap); - ret = arizona_soft_reset(arizona); if (ret != 0) goto err_reset; - - ret = regcache_sync(arizona->regmap); - if (ret != 0) { - dev_err(dev, "Failed to sync device: %d\n", ret); - goto err_reset; - } } /* Ensure device startup is complete */ From bb00d9aa813c8af4ffab32c4171d1cf04de24856 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 2 Apr 2015 16:18:29 +0100 Subject: [PATCH 0782/1167] mfd: wm5102: Remove registers for output 3R from readable list The earpiece on 5102 is mono, thus there is no output 3R. Remove the registers associated with the unused right channel from the readable registers list. Change-Id: Icf69624b804e517149b1402b82967b7afd04f343 Signed-off-by: Charles Keepax --- drivers/mfd/wm5102-tables.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index 84afce10267..ed5de999a24 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -1249,9 +1249,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DAC_DIGITAL_VOLUME_3L: case ARIZONA_DAC_VOLUME_LIMIT_3L: case ARIZONA_NOISE_GATE_SELECT_3L: - case ARIZONA_OUTPUT_PATH_CONFIG_3R: - case ARIZONA_DAC_DIGITAL_VOLUME_3R: - case ARIZONA_DAC_VOLUME_LIMIT_3R: case ARIZONA_OUTPUT_PATH_CONFIG_4L: case ARIZONA_DAC_DIGITAL_VOLUME_4L: case ARIZONA_OUT_VOLUME_4L: From 35ce6b572bc6cab94dc1952cbabfdd1c3b6a063d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 2 Apr 2015 16:19:13 +0100 Subject: [PATCH 0783/1167] ASoC: wm5102: Remove set of volume update bits for output 3R The earpiece on wm5102 is mono, thus there is no output 3R. Don't toggle the volume update bits for this output, although worth noting that doing so had no negative effects it is just redundant. Change-Id: Ifc9fd307168bda12d568870ac7c52bf7da9c6867 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5102.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 2954ca2697b..7d80cbad35a 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1980,7 +1980,6 @@ static unsigned int wm5102_digital_vu[] = { ARIZONA_DAC_DIGITAL_VOLUME_2L, ARIZONA_DAC_DIGITAL_VOLUME_2R, ARIZONA_DAC_DIGITAL_VOLUME_3L, - ARIZONA_DAC_DIGITAL_VOLUME_3R, ARIZONA_DAC_DIGITAL_VOLUME_4L, ARIZONA_DAC_DIGITAL_VOLUME_4R, ARIZONA_DAC_DIGITAL_VOLUME_5L, From 98642b3bd0ef601051aa888f99157a11dbc7eaab Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 4 Feb 2015 05:53:01 +0000 Subject: [PATCH 0784/1167] switch: arizona: Use arizona_set_headphone_imp in arizona_jackdet arizona_set_headphone_imp instead of hard-coding the same functionality in arizona_jackdet. Change-Id: Iffc97c474e85caedaf25279156cb5ee04d595ca9 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 17 +---------------- 1 file changed, 1 insertion(+), 16 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index c9e98679f53..dc2b29be3d7 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -2676,7 +2676,6 @@ static irqreturn_t arizona_jackdet(int irq, void *data) info->micd_debounce = 0; info->micd_count = 0; info->moisture_count = 0; - arizona->hp_impedance = 0; arizona_jds_set_state(info, NULL); for (i = 0; i < info->num_micd_ranges; i++) @@ -2688,21 +2687,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) regmap_update_bits(arizona->regmap, reg, mask, mask); - switch (arizona->type) { - case WM5110: - arizona_wm5110_tune_headphone(info, ARIZONA_HP_Z_OPEN); - break; - case WM1814: - arizona_wm1814_tune_headphone(info, ARIZONA_HP_Z_OPEN); - break; - default: - break; - } - - /* Use a sufficiently large number to indicate open circuit */ - if (arizona->pdata.hpdet_cb) { - arizona->pdata.hpdet_cb(ARIZONA_HP_Z_OPEN); - } + arizona_set_headphone_imp(info, ARIZONA_HP_Z_OPEN); if (arizona->pdata.micd_cb) arizona->pdata.micd_cb(false); From 6a83132473a66ffb97853f76c4994a051a050c12 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 4 Feb 2015 08:20:51 +0000 Subject: [PATCH 0785/1167] switch: arizona: Remove duplicated code Some code was accidentally duplicated whilst the ADC MICDET was factored out into a seperate state. This patch removes this unnecessary code. Change-Id: I60fb09fadba84ef0bf772c892e31bd3b64cdf1cd Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index dc2b29be3d7..798c443f30b 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -480,22 +480,6 @@ static int arizona_micd_adc_read(struct arizona_extcon_info *info) regmap_read(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, &val); val &= ARIZONA_ACCDET_MODE_MASK; - if ((info->detecting) && (val == ARIZONA_ACCDET_MODE_ADC)) { - bool micd_ena; - - /* Must disable MICD before we read the ADCVAL */ - ret = regmap_update_bits_check(arizona->regmap, - ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_ENA, 0, - &micd_ena); - if (ret != 0) { - dev_err(arizona->dev, - "Failed to disable MICD: %d\n", - ret); - return ret; - } - } - /* Must disable MICD before we read the ADCVAL */ ret = regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, ARIZONA_MICD_ENA, 0); From f93fa1aac76e47365c87b26d29dc5d719f1dfdbe Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 21 May 2015 09:47:09 +0100 Subject: [PATCH 0786/1167] switch: arizona: Fix HPDET calibration for open-circuit values For open-circuit values the calculation can return a negative number in an intermediate stage which causes the sign of the final impedance value to be flipped. This patch changes the check from (n == 0) to (n <= 0) to catch this issue. Change-Id: I2b8285d6b615fe07d2ce1740bb580753bcaf1a6b Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 798c443f30b..a2761ea57b7 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -611,7 +611,7 @@ static int arizona_hpdet_d_calibrate(const struct arizona_extcon_info *info, n = div_s64(1000000000000LL, info->calib_data[range].C3 + ((info->calib_data[range].C4_x_C3 * grad_x4) / 4)); n = val - n; - if (n == 0) + if (n <= 0) return ARIZONA_HPDET_MAX; val = info->calib_data[range].C0 + From f94d33c88a5feb4929a056126f5f44d8c87cb643 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Fri, 1 May 2015 18:02:42 +0200 Subject: [PATCH 0787/1167] ASoC: dapm: Add new widgets to the end of the widget list Currently new widgets are appended to the beginning of the cards widget list. This has the effect that widgets that are created while iterating over the widget list in snd_soc_dapm_new_widgets() (like e.g. the auto-disable widgets) are not covered during that invocation of the function. If no further invocations of snd_soc_dapm_new_widgets() happen these widgets will not be fully initialized and e.g. no debugfs entries are created for them. By adding new widgets to the end of the widget list we make sure that widgets that are created in snd_soc_dapm_new_widgets() will still be handled during the same snd_soc_dapm_new_widgets() invocation and are always fully initialized. Signed-off-by: Lars-Peter Clausen Signed-off-by: Mark Brown (cherry picked from commit 92fa12426741d52b39ec92ad77c9843d3fc2b3d6) Change-Id: I80b2903ec85d96c1175e89d65cde9e8e83a5fbd4 Signed-off-by: Charles Keepax Signed-off-by: Piotr Stankiewicz --- sound/soc/soc-dapm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index 28cb053bb9b..1b633e183bb 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c @@ -3221,7 +3221,7 @@ snd_soc_dapm_new_control(struct snd_soc_dapm_context *dapm, INIT_LIST_HEAD(&w->sinks); INIT_LIST_HEAD(&w->list); INIT_LIST_HEAD(&w->dirty); - list_add(&w->list, &dapm->card->widgets); + list_add_tail(&w->list, &dapm->card->widgets); /* machine layer set ups unconnected pins and insertions */ w->connected = 1; From bf47a5825bee1f9070a80d022f85652211b4ad7b Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Fri, 1 May 2015 18:02:43 +0200 Subject: [PATCH 0788/1167] ASoC: dapm: Add demux support A demux is conceptually similar to a mux. Where a mux has multiple input and one output and selects one of the inputs to be connected to the output, the demux has one input and multiple outputs and selects one of the outputs to which the input gets connected. This similarity makes it straight forward to support them in DAPM using the existing mux support, we only need to swap sinks and sources when initially setting up the paths. The only slightly tricky part is that there can only be one control per path. Since mixers/muxes are at the sink of a path and a demux is at the source and both types want a control it is not possible to directly connect a demux output to a mixer/mux input. The patch adds some sanity checks to make sure that this does not happen. Drivers who want to model hardware which directly connects a demux output to a mixer/mux input can do this by inserting a dummy widget between the two. E.g.: { "Dummy", "Demux Control", "Demux" }, { "Mixer", "Mixer Control", "Dummy" }, Signed-off-by: Lars-Peter Clausen Signed-off-by: Mark Brown (cherry picked from commit d714f97c5b8c4c5da56b89a7289acb3f12ef7abb) Conflicts: include/sound/soc-dapm.h sound/soc/soc-dapm.c Change-Id: Ib1dcd956c8b34832619b0d4e49753ceffa35704a Signed-off-by: Piotr Stankiewicz --- include/sound/soc-dapm.h | 4 ++ sound/soc/soc-dapm.c | 118 +++++++++++++++++++++++++++++++++++---- 2 files changed, 112 insertions(+), 10 deletions(-) diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h index d7c1cde308f..7f9b6452fd1 100644 --- a/include/sound/soc-dapm.h +++ b/include/sound/soc-dapm.h @@ -104,6 +104,9 @@ struct device; { .id = snd_soc_dapm_value_mux, .name = wname, .reg = wreg, \ .shift = wshift, .invert = winvert, .kcontrol_news = wcontrols, \ .num_kcontrols = 1} +#define SND_SOC_DAPM_DEMUX(wname, wreg, wshift, winvert, wcontrols) \ +{ .id = snd_soc_dapm_demux, .name = wname, .reg = wreg, .shift = wshift, \ + .invert = winvert, .kcontrol_news = wcontrols, .num_kcontrols = 1} /* Simplified versions of above macros, assuming wncontrols = ARRAY_SIZE(wcontrols) */ #define SOC_PGA_ARRAY(wname, wreg, wshift, winvert,\ @@ -429,6 +432,7 @@ enum snd_soc_dapm_type { snd_soc_dapm_mux, /* selects 1 analog signal from many inputs */ snd_soc_dapm_virt_mux, /* virtual version of snd_soc_dapm_mux */ snd_soc_dapm_value_mux, /* selects 1 analog signal from many inputs */ + snd_soc_dapm_demux, /* connects the input to one of multiple outputs */ snd_soc_dapm_mixer, /* mixes several analog signals together */ snd_soc_dapm_mixer_named_ctl, /* mixer with named controls */ snd_soc_dapm_pga, /* programmable gain/attenuation (volume) */ diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index 1b633e183bb..0a3d2e191a7 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c @@ -63,6 +63,7 @@ static int dapm_up_seq[] = { [snd_soc_dapm_mux] = 5, [snd_soc_dapm_virt_mux] = 5, [snd_soc_dapm_value_mux] = 5, + [snd_soc_dapm_demux] = 5, [snd_soc_dapm_dac] = 6, [snd_soc_dapm_mixer] = 7, [snd_soc_dapm_mixer_named_ctl] = 7, @@ -91,6 +92,7 @@ static int dapm_down_seq[] = { [snd_soc_dapm_mux] = 9, [snd_soc_dapm_virt_mux] = 9, [snd_soc_dapm_value_mux] = 9, + [snd_soc_dapm_demux] = 9, [snd_soc_dapm_aif_in] = 10, [snd_soc_dapm_aif_out] = 10, [snd_soc_dapm_dai_in] = 10, @@ -434,7 +436,8 @@ static void dapm_set_path_status(struct snd_soc_dapm_widget *w, p->connect = !!val; } break; - case snd_soc_dapm_mux: { + case snd_soc_dapm_mux: + case snd_soc_dapm_demux: { struct soc_enum *e = (struct soc_enum *) w->kcontrol_news[i].private_value; int val, item; @@ -530,7 +533,10 @@ static int dapm_connect_mux(struct snd_soc_dapm_context *dapm, list_add(&path->list_sink, &dest->sources); list_add(&path->list_source, &src->sinks); path->name = (char*)e->texts[i]; - dapm_set_path_status(dest, path, 0); + if (src->id == snd_soc_dapm_demux) + dapm_set_path_status(src, path, 0); + else + dapm_set_path_status(dest, path, 0); return 0; } } @@ -634,6 +640,7 @@ static int dapm_create_or_share_mixmux_kcontrol(struct snd_soc_dapm_widget *w, case snd_soc_dapm_mux: case snd_soc_dapm_virt_mux: case snd_soc_dapm_value_mux: + case snd_soc_dapm_demux: wname_in_long_name = true; kcname_in_long_name = false; break; @@ -738,20 +745,38 @@ static int dapm_new_mixer(struct snd_soc_dapm_widget *w) static int dapm_new_mux(struct snd_soc_dapm_widget *w) { struct snd_soc_dapm_context *dapm = w->dapm; - struct snd_soc_dapm_path *path; + struct snd_soc_dapm_path *path = NULL; + const char *type; int ret; + switch (w->id) { + case snd_soc_dapm_mux: + case snd_soc_dapm_virt_mux: + case snd_soc_dapm_value_mux: + type = "mux"; + break; + case snd_soc_dapm_demux: + type = "demux"; + break; + default: + return -EINVAL; + } + if (w->num_kcontrols != 1) { dev_err(dapm->dev, - "ASoC: mux %s has incorrect number of controls\n", + "ASoC: %s %s has incorrect number of controls\n", type, w->name); return -EINVAL; } - path = list_first_entry(&w->sources, struct snd_soc_dapm_path, + if (w->id == snd_soc_dapm_demux) + path = list_first_entry(&w->sinks, struct snd_soc_dapm_path, + list_source); + else + path = list_first_entry(&w->sources, struct snd_soc_dapm_path, list_sink); if (!path) { - dev_err(dapm->dev, "ASoC: mux %s has no paths\n", w->name); + dev_err(dapm->dev, "ASoC: %s %s has no paths\n", type, w->name); return -EINVAL; } @@ -759,9 +784,16 @@ static int dapm_new_mux(struct snd_soc_dapm_widget *w) if (ret < 0) return ret; - list_for_each_entry(path, &w->sources, list_sink) { - path->kcontrol = w->kcontrols[0]; - dapm_kcontrol_add_path(w->kcontrols[0], path); + if (w->id == snd_soc_dapm_demux) { + list_for_each_entry(path, &w->sinks, list_source) { + path->kcontrol = w->kcontrols[0]; + dapm_kcontrol_add_path(w->kcontrols[0], path); + } + } else { + list_for_each_entry(path, &w->sources, list_sink) { + path->kcontrol = w->kcontrols[0]; + dapm_kcontrol_add_path(w->kcontrols[0], path); + } } return 0; @@ -1999,7 +2031,8 @@ static int soc_dapm_mux_update_power(struct snd_soc_dapm_widget *widget, if (widget->id != snd_soc_dapm_mux && widget->id != snd_soc_dapm_virt_mux && - widget->id != snd_soc_dapm_value_mux) + widget->id != snd_soc_dapm_value_mux && + widget->id != snd_soc_dapm_demux) return -ENODEV; /* find dapm widget path assoc with kcontrol */ @@ -2259,6 +2292,53 @@ int snd_soc_dapm_sync(struct snd_soc_dapm_context *dapm) } EXPORT_SYMBOL_GPL(snd_soc_dapm_sync); +static int snd_soc_dapm_check_dynamic_path(struct snd_soc_dapm_context *dapm, + struct snd_soc_dapm_widget *source, struct snd_soc_dapm_widget *sink, + const char *control) +{ + bool dynamic_source = false; + bool dynamic_sink = false; + + if (!control) + return 0; + + switch (source->id) { + case snd_soc_dapm_demux: + dynamic_source = true; + break; + default: + break; + } + + switch (sink->id) { + case snd_soc_dapm_mux: + case snd_soc_dapm_virt_mux: + case snd_soc_dapm_value_mux: + case snd_soc_dapm_switch: + case snd_soc_dapm_mixer: + case snd_soc_dapm_mixer_named_ctl: + dynamic_sink = true; + break; + default: + break; + } + + if (dynamic_source && dynamic_sink) { + dev_err(dapm->dev, + "Direct connection between demux and mixer/mux not " \ + "supported for path %s -> [%s] -> %s\n", + source->name, control, sink->name); + return -EINVAL; + } else if (!dynamic_source && !dynamic_sink) { + dev_err(dapm->dev, + "Control not supported for path %s -> [%s] -> %s\n", + source->name, control, sink->name); + return -EINVAL; + } + + return 0; +} + static int snd_soc_dapm_add_route(struct snd_soc_dapm_context *dapm, const struct snd_soc_dapm_route *route) { @@ -2354,6 +2434,19 @@ static int snd_soc_dapm_add_route(struct snd_soc_dapm_context *dapm, return 0; } + ret = snd_soc_dapm_check_dynamic_path(dapm, wsource, wsink, control); + + if (ret) + goto dynamic_path_err; + + if (wsource->id == snd_soc_dapm_demux) { + ret = dapm_connect_mux(dapm, wsource, wsink, path, control, + &wsource->kcontrol_news[0]); + if (ret != 0) + goto err; + goto end; + } + /* connect dynamic paths */ switch (wsink->id) { case snd_soc_dapm_adc: @@ -2375,6 +2468,7 @@ static int snd_soc_dapm_add_route(struct snd_soc_dapm_context *dapm, case snd_soc_dapm_dai_in: case snd_soc_dapm_dai_out: case snd_soc_dapm_dai_link: + case snd_soc_dapm_demux: list_add(&path->list, &dapm->card->paths); list_add(&path->list_sink, &wsink->sources); list_add(&path->list_source, &wsource->sinks); @@ -2406,6 +2500,7 @@ static int snd_soc_dapm_add_route(struct snd_soc_dapm_context *dapm, return 0; } +end: dapm_mark_dirty(wsource, "Route added"); dapm_mark_dirty(wsink, "Route added"); @@ -2414,6 +2509,7 @@ static int snd_soc_dapm_add_route(struct snd_soc_dapm_context *dapm, err: dev_warn(dapm->dev, "ASoC: no dapm match for %s --> %s --> %s\n", source, control, sink); +dynamic_path_err: kfree(path); return ret; } @@ -2650,6 +2746,7 @@ int snd_soc_dapm_new_widgets(struct snd_soc_dapm_context *dapm) case snd_soc_dapm_mux: case snd_soc_dapm_virt_mux: case snd_soc_dapm_value_mux: + case snd_soc_dapm_demux: dapm_new_mux(w); break; case snd_soc_dapm_pga: @@ -3180,6 +3277,7 @@ snd_soc_dapm_new_control(struct snd_soc_dapm_context *dapm, case snd_soc_dapm_mux: case snd_soc_dapm_virt_mux: case snd_soc_dapm_value_mux: + case snd_soc_dapm_demux: w->power_check = dapm_generic_check_power; break; case snd_soc_dapm_adc: From 816eb59e55c10f0b4366f07f82ddfec705917ec4 Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Thu, 14 May 2015 16:37:06 +0100 Subject: [PATCH 0789/1167] ASoC: dapm: macro for demux with power event Change-Id: Ieb9693cb8fa7b896d6d3ff6cacc36febcc177f09 Signed-off-by: Piotr Stankiewicz --- include/sound/soc-dapm.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h index 7f9b6452fd1..fac38af0d1a 100644 --- a/include/sound/soc-dapm.h +++ b/include/sound/soc-dapm.h @@ -159,6 +159,11 @@ struct device; { .id = snd_soc_dapm_virt_mux, .name = wname, .reg = wreg, .shift = wshift, \ .invert = winvert, .kcontrol_news = wcontrols, .num_kcontrols = 1, \ .event = wevent, .event_flags = wflags} +#define SND_SOC_DAPM_DEMUX_E(wname, wreg, wshift, winvert, wcontrols, wevent, \ + wflags) \ +{ .id = snd_soc_dapm_demux, .name = wname, .reg = wreg, .shift = wshift, \ + .invert = winvert, .kcontrol_news = wcontrols, .num_kcontrols = 1, \ + .event = wevent, .event_flags = wflags} /* additional sequencing control within an event type */ #define SND_SOC_DAPM_PGA_S(wname, wsubseq, wreg, wshift, winvert, \ From 462b413345c4608ca25dee39f4208a10ad8e1884 Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Thu, 21 May 2015 11:52:29 +0100 Subject: [PATCH 0790/1167] mfd: marley: renaming HP/EP selector field to EP_SEL Change-Id: I2fe900cb1ddb8e0ca12a91f6ed1176f0f7cafcdb Signed-off-by: Piotr Stankiewicz --- include/linux/mfd/arizona/registers.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 436834d8e26..4bfe3c7b9bd 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -4479,10 +4479,10 @@ /* * R1024 (0x400) - Output Enables 1 */ -#define ARIZONA_HP_SEL 0x8000 /* HP_SEL */ -#define ARIZONA_HP_SEL_MASK 0x8000 /* HP_SEL */ -#define ARIZONA_HP_SEL_SHIFT 15 /* HP_SEL */ -#define ARIZONA_HP_SEL_WIDTH 1 /* HP_SEL */ +#define ARIZONA_EP_SEL 0x8000 /* EP_SEL */ +#define ARIZONA_EP_SEL_MASK 0x8000 /* EP_SEL */ +#define ARIZONA_EP_SEL_SHIFT 15 /* EP_SEL */ +#define ARIZONA_EP_SEL_WIDTH 1 /* EP_SEL */ #define ARIZONA_OUT6L_ENA 0x0800 /* OUT6L_ENA */ #define ARIZONA_OUT6L_ENA_MASK 0x0800 /* OUT6L_ENA */ #define ARIZONA_OUT6L_ENA_SHIFT 11 /* OUT6L_ENA */ From 1ae2586988eb61e336ce2e28acfd1980aced6bb4 Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Thu, 21 May 2015 16:55:06 +0100 Subject: [PATCH 0791/1167] ASoC: marley: rename MICBIAS1/2 Src to MICBIAS1/2 Change-Id: Icbb742ddbe967362e8353ffe1b764e1b4d003e24 Signed-off-by: Piotr Stankiewicz --- sound/soc/codecs/marley.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index dc94605f03a..7e4db81f37a 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -946,9 +946,9 @@ SND_SOC_DAPM_PGA_E("IN2R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN2R_ENA_SHIFT, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_SUPPLY("MICBIAS1 Src", ARIZONA_MIC_BIAS_CTRL_1, +SND_SOC_DAPM_SUPPLY("MICBIAS1", ARIZONA_MIC_BIAS_CTRL_1, ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_SUPPLY("MICBIAS2 Src", ARIZONA_MIC_BIAS_CTRL_2, +SND_SOC_DAPM_SUPPLY("MICBIAS2", ARIZONA_MIC_BIAS_CTRL_2, ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("MICBIAS1A", ARIZONA_MIC_BIAS_CTRL_5, @@ -1342,13 +1342,13 @@ static const struct snd_soc_dapm_route marley_dapm_routes[] = { { "DSP2", NULL, "DSPCLK"}, { "DSP3", NULL, "DSPCLK"}, - { "MICBIAS1 Src", NULL, "MICVDD" }, - { "MICBIAS2 Src", NULL, "MICVDD" }, + { "MICBIAS1", NULL, "MICVDD" }, + { "MICBIAS2", NULL, "MICVDD" }, - { "MICBIAS1A", NULL, "MICBIAS1 Src" }, - { "MICBIAS1B", NULL, "MICBIAS1 Src" }, - { "MICBIAS2A", NULL, "MICBIAS2 Src" }, - { "MICBIAS2B", NULL, "MICBIAS2 Src" }, + { "MICBIAS1A", NULL, "MICBIAS1" }, + { "MICBIAS1B", NULL, "MICBIAS1" }, + { "MICBIAS2A", NULL, "MICBIAS2" }, + { "MICBIAS2B", NULL, "MICBIAS2" }, { "Noise Generator", NULL, "SYSCLK" }, { "Tone Generator 1", NULL, "SYSCLK" }, From 7e5f17b9a1fce0e49c7f9d0cc4878af7558caa93 Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Thu, 21 May 2015 14:16:05 +0100 Subject: [PATCH 0792/1167] mfd: arizona: report real revision for florida devices Change-Id: I89ca6f74643aca50df975c22cb6e43b520ad63eb Signed-off-by: Piotr Stankiewicz --- drivers/mfd/arizona-core.c | 20 +++----------------- 1 file changed, 3 insertions(+), 17 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 9dfc16ebaa6..c692a8a3ed6 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1659,7 +1659,6 @@ int arizona_dev_init(struct arizona *arizona) unsigned int reg, val, mask; int (*apply_patch)(struct arizona *) = NULL; int ret, i, max_inputs; - char revision_char; dev_set_drvdata(arizona->dev, arizona); mutex_init(&arizona->clk_lock); @@ -1861,25 +1860,20 @@ int arizona_dev_init(struct arizona *arizona) } apply_patch = wm5102_patch; arizona->rev &= 0x7; - revision_char = arizona->rev + 'A'; break; #endif #ifdef CONFIG_MFD_FLORIDA case 0x5110: switch (arizona->type) { case WM8280: - if (arizona->rev >= 0x5) { + if (arizona->rev >= 0x5) type_name = "WM8281"; - revision_char = arizona->rev + 60; - } else { + else type_name = "WM8280"; - revision_char = arizona->rev + 61; - } break; case WM5110: type_name = "WM5110"; - revision_char = arizona->rev + 'A'; break; default: @@ -1887,7 +1881,6 @@ int arizona_dev_init(struct arizona *arizona) arizona->type); arizona->type = WM8280; type_name = "Florida"; - revision_char = arizona->rev + 61; break; } apply_patch = florida_patch; @@ -1898,12 +1891,10 @@ int arizona_dev_init(struct arizona *arizona) switch (arizona->type) { case CS47L24: type_name = "CS47L24"; - revision_char = arizona->rev + 'A'; break; case WM1831: type_name = "WM1831"; - revision_char = arizona->rev + 'A'; break; default: @@ -1911,7 +1902,6 @@ int arizona_dev_init(struct arizona *arizona) arizona->type); arizona->type = CS47L24; type_name = "Largo"; - revision_char = arizona->rev + 'A'; break; } apply_patch = largo_patch; @@ -1920,7 +1910,6 @@ int arizona_dev_init(struct arizona *arizona) #ifdef CONFIG_MFD_WM8997 case 0x8997: type_name = "WM8997"; - revision_char = arizona->rev + 'A'; if (arizona->type != WM8997) { dev_err(arizona->dev, "WM8997 registered as %d\n", arizona->type); @@ -1947,7 +1936,6 @@ int arizona_dev_init(struct arizona *arizona) } apply_patch = vegas_patch; - revision_char = arizona->rev + 'A'; break; #endif #ifdef CONFIG_MFD_CLEARWATER @@ -1967,7 +1955,6 @@ int arizona_dev_init(struct arizona *arizona) arizona->type = WM8285; } - revision_char = arizona->rev + 'A'; apply_patch = clearwater_patch; break; #endif @@ -1984,7 +1971,6 @@ int arizona_dev_init(struct arizona *arizona) arizona->type = CS47L35; } - revision_char = arizona->rev + 'A'; apply_patch = marley_patch; break; #endif @@ -1993,7 +1979,7 @@ int arizona_dev_init(struct arizona *arizona) goto err_reset; } - dev_info(dev, "%s revision %c\n", type_name, revision_char); + dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); if (apply_patch) { ret = apply_patch(arizona); From ed2d69296068c81e79023579f83527b79e2bca3c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 6 May 2015 14:11:39 +0100 Subject: [PATCH 0793/1167] ASoC: dapm: Break out of widget search when source and sink are located Currently snd_soc_dapm_add_route will continue to search the widget list even after both the source and sink for the route have been located. This patch breaks out of the search when both are located giving a small improvement in probe time for drivers. Signed-off-by: Charles Keepax Signed-off-by: Mark Brown (cherry picked from commit 70c751095d5481d246ae7ec622ed35a76ce6ff0c) Change-Id: I89682bc30eb28fb92b403c1d7002d8e2e413033e Signed-off-by: Charles Keepax --- sound/soc/soc-dapm.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index 0a3d2e191a7..641f69f82b4 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c @@ -2371,14 +2371,20 @@ static int snd_soc_dapm_add_route(struct snd_soc_dapm_context *dapm, list_for_each_entry(w, &dapm->card->widgets, list) { if (!wsink && !(strcmp(w->name, sink))) { wtsink = w; - if (w->dapm == dapm) + if (w->dapm == dapm) { wsink = w; + if (wsource) + break; + } continue; } if (!wsource && !(strcmp(w->name, source))) { wtsource = w; - if (w->dapm == dapm) + if (w->dapm == dapm) { wsource = w; + if (wsink) + break; + } } } /* use widget from another DAPM context if not found from this */ From 334c422e31180a9b2b539aa26e624b9408303f6f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 11 May 2015 13:50:30 +0100 Subject: [PATCH 0794/1167] ASoC: dapm: Add cache to speed up adding of routes Some CODECs have a significant number of DAPM routes and for each route, when it is added to the card, the entire card widget list must be searched. When adding routes it is very likely, however, that adjacent routes will require adjacent widgets. For example all the routes for a mux are likely added in a block and the sink widget will be the same each time and it is also quite likely that the source widgets are sequential located in the widget list. This patch adds a cache to the DAPM context, this cache will hold the source and sink widgets from the last call to snd_soc_dapm_add_route for that context. A small search of the widget list will be made from those points for both the sink and source. Currently this search only checks both the last widget and the one adjacent to it. On wm8280 which has approximately 500 widgets and 30000 routes (one of the largest CODECs in mainline), the number of paths that hit the cache is 24000, which significantly improves probe time. Signed-off-by: Charles Keepax Signed-off-by: Mark Brown (cherry picked from commit 45a110a1377d9f7afbbf53e351b72cf813ac426e) Change-Id: I19c1e2b23a79c9089f23e63c54ebff83bfa322b2 Signed-off-by: Charles Keepax --- include/sound/soc-dapm.h | 7 +++++++ sound/soc/soc-dapm.c | 39 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 46 insertions(+) diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h index fac38af0d1a..b00a1c0fcd8 100644 --- a/include/sound/soc-dapm.h +++ b/include/sound/soc-dapm.h @@ -575,6 +575,10 @@ struct snd_soc_dapm_update { int val; }; +struct snd_soc_dapm_wcache { + struct snd_soc_dapm_widget *widget; +}; + /* DAPM context */ struct snd_soc_dapm_context { enum snd_soc_bias_level bias_level; @@ -598,6 +602,9 @@ struct snd_soc_dapm_context { int (*stream_event)(struct snd_soc_dapm_context *dapm, int event); + struct snd_soc_dapm_wcache path_sink_cache; + struct snd_soc_dapm_wcache path_source_cache; + #ifdef CONFIG_DEBUG_FS struct dentry *debugfs_dapm; #endif diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index 641f69f82b4..fd7312b2969 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c @@ -368,6 +368,35 @@ static int soc_widget_update_bits_locked(struct snd_soc_dapm_widget *w, return change; } +static struct snd_soc_dapm_widget * +dapm_wcache_lookup(struct snd_soc_dapm_wcache *wcache, const char *name) +{ + struct snd_soc_dapm_widget *w = wcache->widget; + struct list_head *wlist; + const int depth = 2; + int i = 0; + + if (w) { + wlist = &w->dapm->card->widgets; + + list_for_each_entry_from(w, wlist, list) { + if (!strcmp(name, w->name)) + return w; + + if (++i == depth) + break; + } + } + + return NULL; +} + +static inline void dapm_wcache_update(struct snd_soc_dapm_wcache *wcache, + struct snd_soc_dapm_widget *w) +{ + wcache->widget = w; +} + /** * snd_soc_dapm_set_bias_level - set the bias level for the system * @dapm: DAPM context @@ -2364,6 +2393,12 @@ static int snd_soc_dapm_add_route(struct snd_soc_dapm_context *dapm, source = route->source; } + wsource = dapm_wcache_lookup(&dapm->path_source_cache, source); + wsink = dapm_wcache_lookup(&dapm->path_sink_cache, sink); + + if (wsink && wsource) + goto skip_search; + /* * find src and dest widgets over all widgets but favor a widget from * current DAPM context @@ -2404,6 +2439,10 @@ static int snd_soc_dapm_add_route(struct snd_soc_dapm_context *dapm, return -ENODEV; } +skip_search: + dapm_wcache_update(&dapm->path_sink_cache, wsink); + dapm_wcache_update(&dapm->path_source_cache, wsource); + path = kzalloc(sizeof(struct snd_soc_dapm_path), GFP_KERNEL); if (!path) return -ENOMEM; From ac65ac0e72a517a6ed166336aa3d52cafb359757 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 26 May 2015 10:27:07 +0100 Subject: [PATCH 0795/1167] ASoC: arizona: Fixup type of sources cache Regmap expects an unsigned int, so update the type of the sources cache used for rate changes to be unsigned. Silences this Sparse warning: sound/soc/codecs/arizona.c warning 221:41 incorrect type in argument 3 (different signedness) expected unsigned int *val got int * Change-Id: I3c932b5232952064fe4ddb74110d05922d9264a3 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 6 +++--- sound/soc/codecs/arizona.h | 4 ++-- sound/soc/codecs/clearwater.c | 2 +- sound/soc/codecs/marley.c | 2 +- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 6ea5d12d4ea..46ed507fcda 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -173,7 +173,7 @@ static const int arizona_aif4_inputs[8] = { ARIZONA_AIF4TX2MIX_INPUT_4_SOURCE, }; -static int arizona_aif_sources_cache[ARRAY_SIZE(arizona_aif1_inputs)]; +static unsigned int arizona_aif_sources_cache[ARRAY_SIZE(arizona_aif1_inputs)]; static int arizona_get_sources(struct arizona *arizona, struct snd_soc_dai *dai, @@ -206,7 +206,7 @@ static int arizona_get_sources(struct arizona *arizona, int arizona_cache_and_clear_sources(struct arizona *arizona, const int *sources, - int *cache, + unsigned int *cache, int lim) { int ret = 0; @@ -278,7 +278,7 @@ EXPORT_SYMBOL_GPL(clearwater_spin_sysclk); int arizona_restore_sources(struct arizona *arizona, const int *sources, - int *cache, + unsigned int *cache, int lim) { int ret = 0; diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 0809a7cf6c5..2a3d26d40b5 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -332,12 +332,12 @@ extern int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id, extern int arizona_cache_and_clear_sources(struct arizona *arizona, const int *sources, - int *cache, + unsigned int *cache, int lim); extern int arizona_restore_sources(struct arizona *arizona, const int *sources, - int *cache, + unsigned int *cache, int lim); extern void clearwater_spin_sysclk(struct arizona *arizona); diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index d32d19ccb2a..3e40559fc32 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -333,7 +333,7 @@ static int clearwater_frf_bytes_put(struct snd_kcontrol *kcontrol, } /* Allow the worst case number of sources (FX Rate currently) */ -static int mixer_sources_cache[ARRAY_SIZE(clearwater_fx_inputs)]; +static unsigned int mixer_sources_cache[ARRAY_SIZE(clearwater_fx_inputs)]; static int clearwater_get_sources(unsigned int reg, const int **cur_sources, int *lim) diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index 7e4db81f37a..3ba685d2329 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -237,7 +237,7 @@ static int marley_frf_bytes_put(struct snd_kcontrol *kcontrol, } /* Allow the worst case number of sources (FX Rate currently) */ -static int mixer_sources_cache[ARRAY_SIZE(marley_fx_inputs)]; +static unsigned int mixer_sources_cache[ARRAY_SIZE(marley_fx_inputs)]; static int marley_get_sources(unsigned int reg, const int **cur_sources, int *lim) From 3cc0ff4c92bbee0bc824ccd39f52f60880e213d9 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 3 Feb 2015 14:29:09 +0000 Subject: [PATCH 0796/1167] mfd: arizona: Add DT entry for setting 32kHz clock input Change-Id: Id2dea85398f9590727787cda36bd698c6ecde6e7 Signed-off-by: Richard Fitzgerald --- Documentation/devicetree/bindings/mfd/arizona.txt | 2 ++ drivers/mfd/arizona-core.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 61be98ffd3a..5d7da3bfccd 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -46,6 +46,8 @@ Optional properties: - wlf,reset : GPIO specifier for the GPIO controlling /RESET - wlf,ldoena : GPIO specifier for the GPIO controlling LDOENA + - wlf,clk32k-src : set input source for codec 32kHz clock. + 0 = default, 1 = MCLK1, 2 = MCLK2, 3 = None - wlf,micd-software-compare : Use a software comparison to determine mic presence diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index c692a8a3ed6..669809177e0 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1401,6 +1401,9 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true); + arizona_of_read_u32(arizona, "wlf,clk32k-src", false, + &pdata->clk32k_src); + arizona_of_get_micd_ranges(arizona, "wlf,micd-ranges"); arizona_of_get_micd_configs(arizona, "wlf,micd-configs"); From 1ed3e50ff89eae3a794482f401c5ee58c1917041 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 22 May 2015 09:57:22 +0100 Subject: [PATCH 0797/1167] Documentation: ASoC: arizona: Add CS47L85 feature list Change-Id: Iac1e5efe14354360d21916f5bce8fb9ec90f6bab Signed-off-by: Richard Fitzgerald --- .../sound/alsa/soc/wolfson-arizona.txt | 122 +++++++++--------- 1 file changed, 61 insertions(+), 61 deletions(-) diff --git a/Documentation/sound/alsa/soc/wolfson-arizona.txt b/Documentation/sound/alsa/soc/wolfson-arizona.txt index 55fb4200ce6..d1ba6fac4c6 100644 --- a/Documentation/sound/alsa/soc/wolfson-arizona.txt +++ b/Documentation/sound/alsa/soc/wolfson-arizona.txt @@ -7,69 +7,69 @@ to sound: '-' means not relevant for that audio hub model WM8280 -Feature WM8997 WM8998 WM5102 WM8281 CS47L24 ------------------------------------------------------------------------------- -24-bit samples Y Y Y Y Y -192kHz sample rate Y Y Y Y Y -Routing controlled via ALSA controls Y Y Y Y Y -Volume control on all mixer inputs Y Y Y Y Y -Volume control on all outputs Y Y Y Y Y -Mute control on all outputs Y Y Y Y Y -Output DRE control - Y Y Y - -Output OSR control Y - Y Y Y -Input ramp control Y Y Y Y Y -Output ramp control Y Y Y Y Y -Route any audio input to any mixer input Y Y Y Y Y -Route internal signals to mixer inputs Y Y Y Y Y -Route audio path through ISRC Y Y Y Y Y -Route audio path through ASRC - Y Y Y Y -Route audio path through EQs Y Y Y Y Y -Route audio path through LHPFs Y Y Y Y Y -Route audio path through DRCs Y Y Y Y Y -Route audio path through ADSP cores - - Y Y Y -Set EQ coefficient through ALSA controls Y Y Y Y Y -Set LHPF coeffs through ALSA controls Y Y Y Y Y -Set DRC coefficient through ALSA controls Y Y Y Y Y -Set Noise Gates through ALSA controls Y Y Y Y Y -Config inputs analogue/digital mode [note 1] Y Y Y Y - -Input HPF control - Y - Y Y -Input mux controls [note 8] - Y - - - +Feature WM8997 WM8998 WM5102 WM8281 CS47L24 CS47L85 +-------------------------------------------------------------------------------------- +24-bit samples Y Y Y Y Y Y +192kHz sample rate Y Y Y Y Y Y +Routing controlled via ALSA controls Y Y Y Y Y Y +Volume control on all mixer inputs Y Y Y Y Y Y +Volume control on all outputs Y Y Y Y Y Y +Mute control on all outputs Y Y Y Y Y Y +Output DRE control - Y Y Y - Y +Output OSR control Y - Y Y Y Y +Input ramp control Y Y Y Y Y Y +Output ramp control Y Y Y Y Y Y +Route any audio input to any mixer input Y Y Y Y Y Y +Route internal signals to mixer inputs Y Y Y Y Y Y +Route audio path through ISRC Y Y Y Y Y Y +Route audio path through ASRC - Y Y Y Y Y +Route audio path through EQs Y Y Y Y Y Y +Route audio path through LHPFs Y Y Y Y Y Y +Route audio path through DRCs Y Y Y Y Y Y +Route audio path through ADSP cores - - Y Y Y Y +Set EQ coefficient through ALSA controls Y Y Y Y Y Y +Set LHPF coeffs through ALSA controls Y Y Y Y Y Y +Set DRC coefficient through ALSA controls Y Y Y Y Y Y +Set Noise Gates through ALSA controls Y Y Y Y Y Y +Config inputs analogue/digital mode [note 1] Y Y Y Y - Y +Input HPF control - Y - Y Y Y +Input mux controls [note 8] - Y - - - Y Config analogue inputs as single-ended - or differential [note 1] Y Y Y Y - -Host I2S routing to any AIF Y Y Y Y Y -I2S TDM (multi-channel) [note 2] Y Y Y Y Y -Configure TDM active slots [note 2] Y Y Y Y Y -Configure TDM slot size [note 2] Y Y Y Y Y -AEC loopback control Y Y Y Y Y -ANC block control - - - Y - -Select firmware by ALSA control [note 6] - - Y Y Y -Load ADSP firmware via DAPM power-up - - Y Y Y -Load tuning data (.bin) with firmware - - Y Y Y -Expose firmware controls via ALSA - - Y Y Y -Set sample-rate domain frequencies [note 4] Y Y Y Y Y -Auto sample-rate N N N N N -Speaker short-circuit protection - N N N N -Use write sequencer N N N N N -Codec control over SPI - - Y Y Y -Codec control over I2C Y Y Y Y - -DAPM-based power up/down Y Y Y Y Y -Jack insert detection Y Y Y Y - -Headset mic detection Y Y Y Y - -Headset button detection Y Y Y Y - -Headphone speaker impedance detection Y Y Y Y - -Codec internal LDOVDD regulator control Y Y Y Y - -Support for external DCVDD regulator Y Y Y Y Y -Build as loadable module Y Y Y Y Y -Configure via pdata Y Y Y Y Y -Configure via device tree [note 7] Y Y Y Y Y -Configure SYSCLK rate [note 5] Y Y Y Y Y -Configure ASYNCCLK rate [note 5] Y Y Y Y Y -Configure analogue mic bias [note 1] Y Y Y Y - + or differential [note 1] Y Y Y Y - Y +Host I2S routing to any AIF Y Y Y Y Y Y +I2S TDM (multi-channel) [note 2] Y Y Y Y Y Y +Configure TDM active slots [note 2] Y Y Y Y Y Y +Configure TDM slot size [note 2] Y Y Y Y Y Y +AEC loopback control Y Y Y Y Y Y +ANC block control - - - Y - Y +Select firmware by ALSA control [note 6] - - Y Y Y Y +Load ADSP firmware via DAPM power-up - - Y Y Y Y +Load tuning data (.bin) with firmware - - Y Y Y Y +Expose firmware controls via ALSA - - Y Y Y Y +Set sample-rate domain frequencies [note 4] Y Y Y Y Y Y +Auto sample-rate N N N N N N +Speaker short-circuit protection - N N N N N +Use write sequencer N N N N N N +Codec control over SPI - - Y Y Y Y +Codec control over I2C Y Y Y Y - Y +DAPM-based power up/down Y Y Y Y Y Y +Jack insert detection Y Y Y Y - Y +Headset mic detection Y Y Y Y - Y +Headset button detection Y Y Y Y - Y +Headphone speaker impedance detection Y Y Y Y - Y +Codec internal LDOVDD regulator control Y Y Y Y - Y +Support for external DCVDD regulator Y Y Y Y Y Y +Build as loadable module Y Y Y Y Y Y +Configure via pdata Y Y Y Y Y Y +Configure via device tree [note 7] Y Y Y Y Y Y +Configure SYSCLK rate [note 5] Y Y Y Y Y Y +Configure ASYNCCLK rate [note 5] Y Y Y Y Y Y +Configure analogue mic bias [note 1] Y Y Y Y - Y Configure mapping of headset button - resistance to key event [note 1] Y Y Y Y - -Configure available firmwares [note 3] - - Y Y Y -Support Ez2Control - - N Y Y -Support trace firmware - - - Y N + resistance to key event [note 1] Y Y Y Y - Y +Configure available firmwares [note 3] - - Y Y Y Y +Support Ez2Control - - N Y Y Y +Support trace firmware - - - Y N Y Notes: 1. Integration-time configuration. Not possible to change at runtime From 19dd6c49303b9eaafd9e8340b41eedd76b0f922a Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 22 May 2015 10:22:53 +0100 Subject: [PATCH 0798/1167] Documentation: ASoC: arizona: Updates to feature table - Removed speaker protection, it's confusing to list it here because it's a firmware that doesn't require any explicit driver support - Note that ACPI configuration is not supported - Rework the input mux description to be more general and separate out the WM8998 specifics - Rebrand Ez2Control to SoundClear Control Change-Id: Iea927b4e38ea332ba0ec932fc000de2a28ecb8d7 Signed-off-by: Richard Fitzgerald --- .../sound/alsa/soc/wolfson-arizona.txt | 81 ++++++++----------- 1 file changed, 35 insertions(+), 46 deletions(-) diff --git a/Documentation/sound/alsa/soc/wolfson-arizona.txt b/Documentation/sound/alsa/soc/wolfson-arizona.txt index d1ba6fac4c6..d0d4752b35c 100644 --- a/Documentation/sound/alsa/soc/wolfson-arizona.txt +++ b/Documentation/sound/alsa/soc/wolfson-arizona.txt @@ -1,7 +1,7 @@ -This document lists the features of the Wolfson 'Arizona' class audio hubs -supported by the kernel drivers. +This document lists the features of the Cirrus Logic / Wolfson Microelectronics +'Arizona' class SmartCodecs that are supported by the kernel drivers. Note that some features are covered by other classes of driver (extcon, -regulator, etc.) and this list below shows the full set of features related +regulator, etc.), the list below shows the full set of features related to sound: '-' means not relevant for that audio hub model @@ -9,6 +9,7 @@ to sound: WM8280 Feature WM8997 WM8998 WM5102 WM8281 CS47L24 CS47L85 -------------------------------------------------------------------------------------- +32-bit samples Y Y Y Y Y Y 24-bit samples Y Y Y Y Y Y 192kHz sample rate Y Y Y Y Y Y Routing controlled via ALSA controls Y Y Y Y Y Y @@ -47,9 +48,7 @@ Load ADSP firmware via DAPM power-up - - Y Y Y Load tuning data (.bin) with firmware - - Y Y Y Y Expose firmware controls via ALSA - - Y Y Y Y Set sample-rate domain frequencies [note 4] Y Y Y Y Y Y -Auto sample-rate N N N N N N -Speaker short-circuit protection - N N N N N -Use write sequencer N N N N N N +Auto sample-rate detection N N N N N N Codec control over SPI - - Y Y Y Y Codec control over I2C Y Y Y Y - Y DAPM-based power up/down Y Y Y Y Y Y @@ -62,14 +61,14 @@ Support for external DCVDD regulator Y Y Y Y Y Build as loadable module Y Y Y Y Y Y Configure via pdata Y Y Y Y Y Y Configure via device tree [note 7] Y Y Y Y Y Y +Configure via ACPI N N N N N N Configure SYSCLK rate [note 5] Y Y Y Y Y Y Configure ASYNCCLK rate [note 5] Y Y Y Y Y Y Configure analogue mic bias [note 1] Y Y Y Y - Y Configure mapping of headset button resistance to key event [note 1] Y Y Y Y - Y Configure available firmwares [note 3] - - Y Y Y Y -Support Ez2Control - - N Y Y Y -Support trace firmware - - - Y N Y +Support SoundClear Control - - N Y Y Y Notes: 1. Integration-time configuration. Not possible to change at runtime @@ -88,63 +87,53 @@ Notes: active path 7. Configuration from device tree is work-in-progress so there may be some pdata settings that have not yet been migrated to device tree -8. See below for a description of the input mux routing on WM8998. The input - mux should be set _before_ connecting it into an audio path. If one - input is configured as digital, that setting will be applied only when - the input is powered up as part of an active audio route - the - digital/analogue setting of the input path cannot be changed while the - input is part of an active audio route. +8. See below for a description of the input mux routing. -INPUT MUXES ON WM8998 -===================== -The WM8998 has two physical input paths, IN1 and IN2, and both paths have an -input mux to select between two possible external input sources for that -path. +INPUT MUXES +=========== +Some SmartCodecs have input paths with input muxes to select between two +possible external input sources for that path. +For example on the WM8998: - The IN1 path can be selected between IN1A or IN1B pins. The left and right channels have separate mux controls - - The IN2 path can be selected between IN2A or IN2B and is mono -A diagram of the route through the input muxes is: +A diagram of the route through the input muxes on the WM8998 is shown below +(the other SmartCodecs with input muxes are similar): Input pin ALSA control Internal signal path ------------------------------------------------------- - +-----------+ -IN1AL ---> "A" | | - | "IN1LMUX" | --> IN1L -IN1BL ---> "B" | | - +-----------+ + +------------+ +IN1AL ---> "A" | | + | "IN1L Mux" | --> IN1L +IN1BL ---> "B" | | + +------------+ + + +------------+ +IN1AR ---> "A" | | + | "IN1R Mux" | --> IN1R +IN1BR ---> "B" | | + +------------+ - +-----------+ -IN1AR ---> "A" | | - | "IN1RMUX" | --> IN1R -IN1BR ---> "B" | | - +-----------+ + +------------+ +IN2A ---> "A" | | + | "IN2 Mux" | --> IN2L +IN2B ---> "B" | | + +------------+ - +-----------+ -IN2A ---> "A" | | - | "IN2MUX" | --> IN2L -IN2B ---> "B" | | - +-----------+ +WM8998 input muxes +------------------ IN1A and IN2A can be set as digital. IN1B and IN2B are analogue only. It is important to note that although the left and right paths of IN1 have separate mux controls, these are only separate for analogue paths. The setting of digital/analogue applies jointly to both channels of IN1. Because of this, -if IN1A is digital _both_ the left and right mux must be set to "A" before -connecting the input to any internal codec blocks. When IN1 is part of an -active path the whole of IN1 will be set to digital or analogue depending on -mux setting and this cannot be changed while IN1 is part of an active path. - -To change from a digital IN1A to an analogue IN1B follow this sequence: - -1) Disconnect IN1 from the input of any codec blocks -2) Change the IN1MUXL and IN1MUXR to "B" -3) Connect IN1 as an input to codec blocks +if IN1A is digital _both_ the left and right mux are ganged together and +changing the mux on one channel will automatically change the other. The input mode pdata for WM8998 is defined as: From cda59d421ef9d74c0915a34b26e67933337acf45 Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Fri, 22 May 2015 14:48:08 +0100 Subject: [PATCH 0799/1167] Documentation: marley: list of Marley features Change-Id: I528dc4080beace21d0fc36cd5e0e6ad476ed09ba Signed-off-by: Piotr Stankiewicz --- .../sound/alsa/soc/wolfson-arizona.txt | 120 +++++++++--------- 1 file changed, 60 insertions(+), 60 deletions(-) diff --git a/Documentation/sound/alsa/soc/wolfson-arizona.txt b/Documentation/sound/alsa/soc/wolfson-arizona.txt index d0d4752b35c..f8195db8642 100644 --- a/Documentation/sound/alsa/soc/wolfson-arizona.txt +++ b/Documentation/sound/alsa/soc/wolfson-arizona.txt @@ -7,68 +7,68 @@ to sound: '-' means not relevant for that audio hub model WM8280 -Feature WM8997 WM8998 WM5102 WM8281 CS47L24 CS47L85 --------------------------------------------------------------------------------------- -32-bit samples Y Y Y Y Y Y -24-bit samples Y Y Y Y Y Y -192kHz sample rate Y Y Y Y Y Y -Routing controlled via ALSA controls Y Y Y Y Y Y -Volume control on all mixer inputs Y Y Y Y Y Y -Volume control on all outputs Y Y Y Y Y Y -Mute control on all outputs Y Y Y Y Y Y -Output DRE control - Y Y Y - Y -Output OSR control Y - Y Y Y Y -Input ramp control Y Y Y Y Y Y -Output ramp control Y Y Y Y Y Y -Route any audio input to any mixer input Y Y Y Y Y Y -Route internal signals to mixer inputs Y Y Y Y Y Y -Route audio path through ISRC Y Y Y Y Y Y -Route audio path through ASRC - Y Y Y Y Y -Route audio path through EQs Y Y Y Y Y Y -Route audio path through LHPFs Y Y Y Y Y Y -Route audio path through DRCs Y Y Y Y Y Y -Route audio path through ADSP cores - - Y Y Y Y -Set EQ coefficient through ALSA controls Y Y Y Y Y Y -Set LHPF coeffs through ALSA controls Y Y Y Y Y Y -Set DRC coefficient through ALSA controls Y Y Y Y Y Y -Set Noise Gates through ALSA controls Y Y Y Y Y Y -Config inputs analogue/digital mode [note 1] Y Y Y Y - Y -Input HPF control - Y - Y Y Y -Input mux controls [note 8] - Y - - - Y +Feature WM8997 WM8998 WM5102 WM8281 CS47L24 CS47L85 CS47L35 +---------------------------------------------------------------------------------------------- +32-bit samples Y Y Y Y Y Y Y +24-bit samples Y Y Y Y Y Y Y +192kHz sample rate Y Y Y Y Y Y Y +Routing controlled via ALSA controls Y Y Y Y Y Y Y +Volume control on all mixer inputs Y Y Y Y Y Y Y +Volume control on all outputs Y Y Y Y Y Y Y +Mute control on all outputs Y Y Y Y Y Y Y +Output DRE control - Y Y Y - Y Y +Output OSR control Y - Y Y Y Y N +Input ramp control Y Y Y Y Y Y Y +Output ramp control Y Y Y Y Y Y Y +Route any audio input to any mixer input Y Y Y Y Y Y Y +Route internal signals to mixer inputs Y Y Y Y Y Y Y +Route audio path through ISRC Y Y Y Y Y Y Y +Route audio path through ASRC - Y Y Y Y Y - +Route audio path through EQs Y Y Y Y Y Y Y +Route audio path through LHPFs Y Y Y Y Y Y Y +Route audio path through DRCs Y Y Y Y Y Y Y +Route audio path through ADSP cores - - Y Y Y Y Y +Set EQ coefficient through ALSA controls Y Y Y Y Y Y Y +Set LHPF coeffs through ALSA controls Y Y Y Y Y Y Y +Set DRC coefficient through ALSA controls Y Y Y Y Y Y Y +Set Noise Gates through ALSA controls Y Y Y Y Y Y Y +Config inputs analogue/digital mode [note 1] Y Y Y Y - Y Y +Input HPF control - Y - Y Y Y Y +Input mux controls [note 8] - Y - - - Y Y Config analogue inputs as single-ended - or differential [note 1] Y Y Y Y - Y -Host I2S routing to any AIF Y Y Y Y Y Y -I2S TDM (multi-channel) [note 2] Y Y Y Y Y Y -Configure TDM active slots [note 2] Y Y Y Y Y Y -Configure TDM slot size [note 2] Y Y Y Y Y Y -AEC loopback control Y Y Y Y Y Y -ANC block control - - - Y - Y -Select firmware by ALSA control [note 6] - - Y Y Y Y -Load ADSP firmware via DAPM power-up - - Y Y Y Y -Load tuning data (.bin) with firmware - - Y Y Y Y -Expose firmware controls via ALSA - - Y Y Y Y -Set sample-rate domain frequencies [note 4] Y Y Y Y Y Y -Auto sample-rate detection N N N N N N -Codec control over SPI - - Y Y Y Y -Codec control over I2C Y Y Y Y - Y -DAPM-based power up/down Y Y Y Y Y Y -Jack insert detection Y Y Y Y - Y -Headset mic detection Y Y Y Y - Y -Headset button detection Y Y Y Y - Y -Headphone speaker impedance detection Y Y Y Y - Y -Codec internal LDOVDD regulator control Y Y Y Y - Y -Support for external DCVDD regulator Y Y Y Y Y Y -Build as loadable module Y Y Y Y Y Y -Configure via pdata Y Y Y Y Y Y -Configure via device tree [note 7] Y Y Y Y Y Y -Configure via ACPI N N N N N N -Configure SYSCLK rate [note 5] Y Y Y Y Y Y -Configure ASYNCCLK rate [note 5] Y Y Y Y Y Y -Configure analogue mic bias [note 1] Y Y Y Y - Y + or differential [note 1] Y Y Y Y - Y Y +Host I2S routing to any AIF Y Y Y Y Y Y Y +I2S TDM (multi-channel) [note 2] Y Y Y Y Y Y Y +Configure TDM active slots [note 2] Y Y Y Y Y Y Y +Configure TDM slot size [note 2] Y Y Y Y Y Y Y +AEC loopback control Y Y Y Y Y Y Y +ANC block control - - - Y - Y - +Select firmware by ALSA control [note 6] - - Y Y Y Y Y +Load ADSP firmware via DAPM power-up - - Y Y Y Y Y +Load tuning data (.bin) with firmware - - Y Y Y Y Y +Expose firmware controls via ALSA - - Y Y Y Y Y +Set sample-rate domain frequencies [note 4] Y Y Y Y Y Y Y +Auto sample-rate detection N N N N N N N +Codec control over SPI - - Y Y Y Y Y +Codec control over I2C Y Y Y Y - Y Y +DAPM-based power up/down Y Y Y Y Y Y Y +Jack insert detection Y Y Y Y - Y Y +Headset mic detection Y Y Y Y - Y Y +Headset button detection Y Y Y Y - Y Y +Headphone speaker impedance detection Y Y Y Y - Y Y +Codec internal LDOVDD regulator control Y Y Y Y - Y - +Support for external DCVDD regulator Y Y Y Y Y Y Y +Build as loadable module Y Y Y Y Y Y Y +Configure via pdata Y Y Y Y Y Y Y +Configure via device tree [note 7] Y Y Y Y Y Y Y +Configure via ACPI N N N N N N N +Configure SYSCLK rate [note 5] Y Y Y Y Y Y Y +Configure ASYNCCLK rate [note 5] Y Y Y Y Y Y - +Configure analogue mic bias [note 1] Y Y Y Y - Y Y Configure mapping of headset button - resistance to key event [note 1] Y Y Y Y - Y -Configure available firmwares [note 3] - - Y Y Y Y -Support SoundClear Control - - N Y Y Y + resistance to key event [note 1] Y Y Y Y - Y Y +Configure available firmwares [note 3] - - Y Y Y Y Y +Support SoundClear Control - - N Y Y Y Y Notes: 1. Integration-time configuration. Not possible to change at runtime From 6af84cf699a65028f533505dbf3134673c7c02d7 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 28 Jan 2015 15:44:27 +0000 Subject: [PATCH 0800/1167] mfd: clearwater: Fix errors in ADSP register addresses The register address layout for the ADSP registers had been copied from the older 16-bit definitions, but they are 32-bit registers on Clearwater. Change-Id: I42e821a5f094e66dbb7ae3c87a086e35a5777e26 Signed-off-by: Richard Fitzgerald Signed-off-by: Charles Keepax --- drivers/mfd/clearwater-tables.c | 32 ++++++------ drivers/mfd/marley-tables.c | 16 +++--- include/linux/mfd/arizona/registers.h | 70 +++++++++++---------------- 3 files changed, 52 insertions(+), 66 deletions(-) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index f55df8be6c7..abf28246149 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -3317,13 +3317,13 @@ static bool clearwater_32bit_readable_register(struct device *dev, unsigned int switch (reg) { case ARIZONA_WSEQ_SEQUENCE_1 ... ARIZONA_WSEQ_SEQUENCE_508: case CLEARWATER_OTP_HPDET_CALIB_1 ... CLEARWATER_OTP_HPDET_CALIB_2: - case CLEARWATER_DSP1_CONFIG ... CLEARWATER_DSP1_SCRATCH_3: - case CLEARWATER_DSP2_CONFIG ... CLEARWATER_DSP2_SCRATCH_3: - case CLEARWATER_DSP3_CONFIG ... CLEARWATER_DSP3_SCRATCH_3: - case CLEARWATER_DSP4_CONFIG ... CLEARWATER_DSP4_SCRATCH_3: - case CLEARWATER_DSP5_CONFIG ... CLEARWATER_DSP5_SCRATCH_3: - case CLEARWATER_DSP6_CONFIG ... CLEARWATER_DSP6_SCRATCH_3: - case CLEARWATER_DSP7_CONFIG ... CLEARWATER_DSP7_SCRATCH_3: + case CLEARWATER_DSP1_CONFIG ... CLEARWATER_DSP1_SCRATCH_2_3: + case CLEARWATER_DSP2_CONFIG ... CLEARWATER_DSP2_SCRATCH_2_3: + case CLEARWATER_DSP3_CONFIG ... CLEARWATER_DSP3_SCRATCH_2_3: + case CLEARWATER_DSP4_CONFIG ... CLEARWATER_DSP4_SCRATCH_2_3: + case CLEARWATER_DSP5_CONFIG ... CLEARWATER_DSP5_SCRATCH_2_3: + case CLEARWATER_DSP6_CONFIG ... CLEARWATER_DSP6_SCRATCH_2_3: + case CLEARWATER_DSP7_CONFIG ... CLEARWATER_DSP7_SCRATCH_2_3: return true; default: return clearwater_is_adsp_memory(dev, reg); @@ -3335,13 +3335,13 @@ static bool clearwater_32bit_volatile_register(struct device *dev, unsigned int switch (reg) { case ARIZONA_WSEQ_SEQUENCE_1 ... ARIZONA_WSEQ_SEQUENCE_508: case CLEARWATER_OTP_HPDET_CALIB_1 ... CLEARWATER_OTP_HPDET_CALIB_2: - case CLEARWATER_DSP1_CONFIG ... CLEARWATER_DSP1_SCRATCH_3: - case CLEARWATER_DSP2_CONFIG ... CLEARWATER_DSP2_SCRATCH_3: - case CLEARWATER_DSP3_CONFIG ... CLEARWATER_DSP3_SCRATCH_3: - case CLEARWATER_DSP4_CONFIG ... CLEARWATER_DSP4_SCRATCH_3: - case CLEARWATER_DSP5_CONFIG ... CLEARWATER_DSP5_SCRATCH_3: - case CLEARWATER_DSP6_CONFIG ... CLEARWATER_DSP6_SCRATCH_3: - case CLEARWATER_DSP7_CONFIG ... CLEARWATER_DSP7_SCRATCH_3: + case CLEARWATER_DSP1_CONFIG ... CLEARWATER_DSP1_SCRATCH_2_3: + case CLEARWATER_DSP2_CONFIG ... CLEARWATER_DSP2_SCRATCH_2_3: + case CLEARWATER_DSP3_CONFIG ... CLEARWATER_DSP3_SCRATCH_2_3: + case CLEARWATER_DSP4_CONFIG ... CLEARWATER_DSP4_SCRATCH_2_3: + case CLEARWATER_DSP5_CONFIG ... CLEARWATER_DSP5_SCRATCH_2_3: + case CLEARWATER_DSP6_CONFIG ... CLEARWATER_DSP6_SCRATCH_2_3: + case CLEARWATER_DSP7_CONFIG ... CLEARWATER_DSP7_SCRATCH_2_3: return true; default: return clearwater_is_adsp_memory(dev, reg); @@ -3386,7 +3386,7 @@ const struct regmap_config clearwater_32bit_spi_regmap = { .pad_bits = 16, .val_bits = 32, - .max_register = CLEARWATER_DSP7_SCRATCH_3, + .max_register = CLEARWATER_DSP7_SCRATCH_2_3, .readable_reg = clearwater_32bit_readable_register, .volatile_reg = clearwater_32bit_volatile_register, @@ -3400,7 +3400,7 @@ const struct regmap_config clearwater_32bit_i2c_regmap = { .reg_stride = 2, .val_bits = 32, - .max_register = CLEARWATER_DSP7_SCRATCH_3, + .max_register = CLEARWATER_DSP7_SCRATCH_2_3, .readable_reg = clearwater_32bit_readable_register, .volatile_reg = clearwater_32bit_volatile_register, diff --git a/drivers/mfd/marley-tables.c b/drivers/mfd/marley-tables.c index 71e20ef45cb..8e1f00a05e5 100644 --- a/drivers/mfd/marley-tables.c +++ b/drivers/mfd/marley-tables.c @@ -1771,9 +1771,9 @@ static bool marley_32bit_readable_register(struct device *dev, unsigned int reg) switch (reg) { case ARIZONA_WSEQ_SEQUENCE_1 ... ARIZONA_WSEQ_SEQUENCE_252: case MARLEY_OTP_HPDET_CALIB_1 ... MARLEY_OTP_HPDET_CALIB_2: - case CLEARWATER_DSP1_CONFIG ... CLEARWATER_DSP1_SCRATCH_3: - case CLEARWATER_DSP2_CONFIG ... CLEARWATER_DSP2_SCRATCH_3: - case CLEARWATER_DSP3_CONFIG ... CLEARWATER_DSP3_SCRATCH_3: + case CLEARWATER_DSP1_CONFIG ... CLEARWATER_DSP1_SCRATCH_2_3: + case CLEARWATER_DSP2_CONFIG ... CLEARWATER_DSP2_SCRATCH_2_3: + case CLEARWATER_DSP3_CONFIG ... CLEARWATER_DSP3_SCRATCH_2_3: return true; default: return marley_is_adsp_memory(dev, reg); @@ -1785,9 +1785,9 @@ static bool marley_32bit_volatile_register(struct device *dev, unsigned int reg) switch (reg) { case ARIZONA_WSEQ_SEQUENCE_1 ... ARIZONA_WSEQ_SEQUENCE_252: case MARLEY_OTP_HPDET_CALIB_1 ... MARLEY_OTP_HPDET_CALIB_2: - case CLEARWATER_DSP1_CONFIG ... CLEARWATER_DSP1_SCRATCH_3: - case CLEARWATER_DSP2_CONFIG ... CLEARWATER_DSP2_SCRATCH_3: - case CLEARWATER_DSP3_CONFIG ... CLEARWATER_DSP3_SCRATCH_3: + case CLEARWATER_DSP1_CONFIG ... CLEARWATER_DSP1_SCRATCH_2_3: + case CLEARWATER_DSP2_CONFIG ... CLEARWATER_DSP2_SCRATCH_2_3: + case CLEARWATER_DSP3_CONFIG ... CLEARWATER_DSP3_SCRATCH_2_3: return true; default: return marley_is_adsp_memory(dev, reg); @@ -1832,7 +1832,7 @@ const struct regmap_config marley_32bit_spi_regmap = { .pad_bits = 16, .val_bits = 32, - .max_register = CLEARWATER_DSP3_SCRATCH_3, + .max_register = CLEARWATER_DSP3_SCRATCH_2_3, .readable_reg = marley_32bit_readable_register, .volatile_reg = marley_32bit_volatile_register, @@ -1846,7 +1846,7 @@ const struct regmap_config marley_32bit_i2c_regmap = { .reg_stride = 2, .val_bits = 32, - .max_register = CLEARWATER_DSP3_SCRATCH_3, + .max_register = CLEARWATER_DSP3_SCRATCH_2_3, .readable_reg = marley_32bit_readable_register, .volatile_reg = marley_32bit_volatile_register, diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 4bfe3c7b9bd..9b304e51381 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -2228,74 +2228,60 @@ #define CLEARWATER_OTP_HPDET_CALIB_2 0x33FA #define CLEARWATER_DSP1_CONFIG 0x0FFE00 #define CLEARWATER_DSP1_STATUS_1 0x0FFE04 -#define CLEARWATER_DSP1_STATUS_2 0x0FFE05 +#define CLEARWATER_DSP1_STATUS_2 0x0FFE06 #define CLEARWATER_DSP1_WDMA_CONFIG_1 0x0FFE30 -#define CLEARWATER_DSP1_WDMA_CONFIG_2 0x0FFE31 +#define CLEARWATER_DSP1_WDMA_CONFIG_2 0x0FFE32 #define CLEARWATER_DSP1_RDMA_CONFIG_1 0x0FFE34 -#define CLEARWATER_DSP1_SCRATCH_0 0x0FFE40 -#define CLEARWATER_DSP1_SCRATCH_1 0x0FFE41 -#define CLEARWATER_DSP1_SCRATCH_2 0x0FFE42 -#define CLEARWATER_DSP1_SCRATCH_3 0x0FFE43 +#define CLEARWATER_DSP1_SCRATCH_0_1 0x0FFE40 +#define CLEARWATER_DSP1_SCRATCH_2_3 0x0FFE42 #define CLEARWATER_DSP2_CONFIG 0x17FE00 #define CLEARWATER_DSP2_STATUS_1 0x17FE04 -#define CLEARWATER_DSP2_STATUS_2 0x17FE05 +#define CLEARWATER_DSP2_STATUS_2 0x17FE06 #define CLEARWATER_DSP2_WDMA_CONFIG_1 0x17FE30 -#define CLEARWATER_DSP2_WDMA_CONFIG_2 0x17FE31 +#define CLEARWATER_DSP2_WDMA_CONFIG_2 0x17FE32 #define CLEARWATER_DSP2_RDMA_CONFIG_1 0x17FE34 -#define CLEARWATER_DSP2_SCRATCH_0 0x17FE40 -#define CLEARWATER_DSP2_SCRATCH_1 0x17FE41 -#define CLEARWATER_DSP2_SCRATCH_2 0x17FE42 -#define CLEARWATER_DSP2_SCRATCH_3 0x17FE43 +#define CLEARWATER_DSP2_SCRATCH_0_1 0x17FE40 +#define CLEARWATER_DSP2_SCRATCH_2_3 0x17FE42 #define CLEARWATER_DSP3_CONFIG 0x1FFE00 #define CLEARWATER_DSP3_STATUS_1 0x1FFE04 -#define CLEARWATER_DSP3_STATUS_2 0x1FFE05 +#define CLEARWATER_DSP3_STATUS_2 0x1FFE06 #define CLEARWATER_DSP3_WDMA_CONFIG_1 0x1FFE30 -#define CLEARWATER_DSP3_WDMA_CONFIG_2 0x1FFE31 +#define CLEARWATER_DSP3_WDMA_CONFIG_2 0x1FFE32 #define CLEARWATER_DSP3_RDMA_CONFIG_1 0x1FFE34 -#define CLEARWATER_DSP3_SCRATCH_0 0x1FFE40 -#define CLEARWATER_DSP3_SCRATCH_1 0x1FFE41 -#define CLEARWATER_DSP3_SCRATCH_2 0x1FFE42 -#define CLEARWATER_DSP3_SCRATCH_3 0x1FFE43 +#define CLEARWATER_DSP3_SCRATCH_0_1 0x1FFE40 +#define CLEARWATER_DSP3_SCRATCH_2_3 0x1FFE42 #define CLEARWATER_DSP4_CONFIG 0x27FE00 #define CLEARWATER_DSP4_STATUS_1 0x27FE04 -#define CLEARWATER_DSP4_STATUS_2 0x27FE05 +#define CLEARWATER_DSP4_STATUS_2 0x27FE06 #define CLEARWATER_DSP4_WDMA_CONFIG_1 0x27FE30 -#define CLEARWATER_DSP4_WDMA_CONFIG_2 0x27FE31 +#define CLEARWATER_DSP4_WDMA_CONFIG_2 0x27FE32 #define CLEARWATER_DSP4_RDMA_CONFIG_1 0x27FE34 -#define CLEARWATER_DSP4_SCRATCH_0 0x27FE40 -#define CLEARWATER_DSP4_SCRATCH_1 0x27FE41 -#define CLEARWATER_DSP4_SCRATCH_2 0x27FE42 -#define CLEARWATER_DSP4_SCRATCH_3 0x27FE43 +#define CLEARWATER_DSP4_SCRATCH_0_1 0x27FE40 +#define CLEARWATER_DSP4_SCRATCH_2_3 0x27FE42 #define CLEARWATER_DSP5_CONFIG 0x2FFE00 #define CLEARWATER_DSP5_STATUS_1 0x2FFE04 -#define CLEARWATER_DSP5_STATUS_2 0x2FFE05 +#define CLEARWATER_DSP5_STATUS_2 0x2FFE06 #define CLEARWATER_DSP5_WDMA_CONFIG_1 0x2FFE30 -#define CLEARWATER_DSP5_WDMA_CONFIG_2 0x2FFE31 +#define CLEARWATER_DSP5_WDMA_CONFIG_2 0x2FFE32 #define CLEARWATER_DSP5_RDMA_CONFIG_1 0x2FFE34 -#define CLEARWATER_DSP5_SCRATCH_0 0x2FFE40 -#define CLEARWATER_DSP5_SCRATCH_1 0x2FFE41 -#define CLEARWATER_DSP5_SCRATCH_2 0x2FFE42 -#define CLEARWATER_DSP5_SCRATCH_3 0x2FFE43 +#define CLEARWATER_DSP5_SCRATCH_0_1 0x2FFE40 +#define CLEARWATER_DSP5_SCRATCH_2_3 0x2FFE42 #define CLEARWATER_DSP6_CONFIG 0x37FE00 #define CLEARWATER_DSP6_STATUS_1 0x37FE04 -#define CLEARWATER_DSP6_STATUS_2 0x37FE05 +#define CLEARWATER_DSP6_STATUS_2 0x37FE06 #define CLEARWATER_DSP6_WDMA_CONFIG_1 0x37FE30 -#define CLEARWATER_DSP6_WDMA_CONFIG_2 0x37FE31 +#define CLEARWATER_DSP6_WDMA_CONFIG_2 0x37FE32 #define CLEARWATER_DSP6_RDMA_CONFIG_1 0x37FE34 -#define CLEARWATER_DSP6_SCRATCH_0 0x37FE40 -#define CLEARWATER_DSP6_SCRATCH_1 0x37FE41 -#define CLEARWATER_DSP6_SCRATCH_2 0x37FE42 -#define CLEARWATER_DSP6_SCRATCH_3 0x37FE43 +#define CLEARWATER_DSP6_SCRATCH_0_1 0x37FE40 +#define CLEARWATER_DSP6_SCRATCH_2_3 0x37FE42 #define CLEARWATER_DSP7_CONFIG 0x3FFE00 #define CLEARWATER_DSP7_STATUS_1 0x3FFE04 -#define CLEARWATER_DSP7_STATUS_2 0x3FFE05 +#define CLEARWATER_DSP7_STATUS_2 0x3FFE06 #define CLEARWATER_DSP7_WDMA_CONFIG_1 0x3FFE30 -#define CLEARWATER_DSP7_WDMA_CONFIG_2 0x3FFE31 +#define CLEARWATER_DSP7_WDMA_CONFIG_2 0x3FFE32 #define CLEARWATER_DSP7_RDMA_CONFIG_1 0x3FFE34 -#define CLEARWATER_DSP7_SCRATCH_0 0x3FFE40 -#define CLEARWATER_DSP7_SCRATCH_1 0x3FFE41 -#define CLEARWATER_DSP7_SCRATCH_2 0x3FFE42 -#define CLEARWATER_DSP7_SCRATCH_3 0x3FFE43 +#define CLEARWATER_DSP7_SCRATCH_0_1 0x3FFE40 +#define CLEARWATER_DSP7_SCRATCH_2_3 0x3FFE42 /* * Field Definitions. From c55d39d9e73fce9f780a68d068efd71fa92fa7b6 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 28 Jan 2015 13:20:39 +0000 Subject: [PATCH 0801/1167] ASoC: wm_adsp: Dump DSP_SCRATCH1 on DSP shutdown The DSP_SCRATCH1 register is used by firmwares to hold diagnostic information. Include this in the shutdown message - it can be useful for debugging. Change-Id: I3d621bf076c758fdd1489f43fefb70c86eb0a96b Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index aa57e41bc72..6cfb5064975 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -125,6 +125,14 @@ #define ADSP2V2_WDMA_CONFIG_2 0x32 #define ADSP2_RDMA_CONFIG_1 0x34 +#define ADSP2_SCRATCH0 0x40 +#define ADSP2_SCRATCH1 0x41 +#define ADSP2_SCRATCH2 0x42 +#define ADSP2_SCRATCH3 0x43 + +#define ADSP2V2_SCRATCH0_1 0x40 +#define ADSP2V2_SCRATCH2_3 0x42 + /* * ADSP2 Control */ @@ -2347,6 +2355,7 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, struct wm_adsp *dsp = &dsps[w->shift]; struct wm_adsp_alg_region *alg_region; struct wm_coeff_ctl *ctl; + unsigned int scratch1 = 0xFFFFFFFF; int ret; switch (event) { @@ -2366,6 +2375,23 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, break; case SND_SOC_DAPM_PRE_PMD: + /* Capture DSP_SCRATCH1, it can be useful for analysis */ + switch (dsp->rev) { + case 0: + ret = regmap_read(dsp->regmap, + dsp->base + ADSP2_SCRATCH1, + &scratch1); + break; + default: + ret = regmap_read(dsp->regmap, + dsp->base + ADSP2V2_SCRATCH0_1, + &scratch1); + break; + } + + if (ret < 0) + adsp_err(dsp, "Failed to read SCRATCH1 %d\n", ret); + if (dsp->fw_features.shutdown) wm_adsp_edac_shutdown(dsp); @@ -2413,7 +2439,7 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, kfree(alg_region); } - adsp_info(dsp, "Shutdown complete\n"); + adsp_info(dsp, "Shutdown complete (SCRATCH1:0x%x)\n", scratch1); break; default: From f289188ac4f80cf8c5e6e20856266fb86a3c5d8c Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 3 Mar 2015 15:41:51 +0000 Subject: [PATCH 0802/1167] switch: downgrade calibration warning message to debug The debug print on the HP calibration function was unnecessarily given dev_warn status. Change to a dev_dbg. Change-Id: Id85431fdd16aba68513d39c436b951fc63e8011d Signed-off-by: Richard Fitzgerald --- drivers/switch/switch-arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index a2761ea57b7..e7319a64cb8 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -603,7 +603,7 @@ static int arizona_hpdet_d_calibrate(const struct arizona_extcon_info *info, s64 val = dacval; s64 n; - dev_warn(info->arizona->dev, "hpdet_d calib range %d dac %d\n", range, dacval); + dev_dbg(info->arizona->dev, "hpdet_d calib range %d dac %d\n", range, dacval); val = (val * 1000000) + info->calib_data[range].dacval_adjust; val = div64_s64(val, info->calib_data[range].C2); From 2038ed49987efcf75f2d2b90d988f96956f6700d Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 4 Mar 2015 10:14:32 +0000 Subject: [PATCH 0803/1167] ASoC: wm_adsp: Remove unused regulator include We're no longer using the regulator from the wm_adsp driver so the forward-declaration and header include can be removed. Change-Id: I877e49e2d391adb4e70cb48ee89a11b049e3ddb7 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 1 - sound/soc/codecs/wm_adsp.h | 2 -- 2 files changed, 3 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 6cfb5064975..50947664151 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -20,7 +20,6 @@ #include #include #include -#include #include #include #include diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 3f557f9380d..2bdd3a8b903 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -20,8 +20,6 @@ #include "wmfw.h" -struct regulator; - struct wm_adsp_region { int type; unsigned int base; From eff1f4a8e04a6204a4143a26e1cbf3857d02d07f Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 27 Apr 2015 13:44:33 +0100 Subject: [PATCH 0804/1167] extcon: arizona: Rename hpdet_ip to make its purpose clearer Renamed to hpdet_ip_version to make it clearer what it does and that the value in it is simply a version number. Change-Id: I2971fd057d125fd3c8e49c42a6781a8f49062d62 Signed-off-by: Richard Fitzgerald --- drivers/extcon/extcon-arizona.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index ba75dbde8c4..e51b719f40f 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -106,7 +106,7 @@ struct arizona_extcon_info { bool detecting; int jack_flips; - int hpdet_ip; + int hpdet_ip_version; struct extcon_dev edev; }; @@ -443,7 +443,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) return ret; } - switch (info->hpdet_ip) { + switch (info->hpdet_ip_version) { case 0: if (!(val & ARIZONA_HP_DONE)) { dev_err(arizona->dev, "HPDET did not complete: %x\n", @@ -504,7 +504,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) default: dev_warn(arizona->dev, "Unknown HPDET IP revision %d\n", - info->hpdet_ip); + info->hpdet_ip_version); case 2: if (!(val & ARIZONA_HP_DONE_B)) { dev_err(arizona->dev, "HPDET did not complete: %x\n", @@ -1503,7 +1503,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; default: info->micd_clamp = true; - info->hpdet_ip = 1; + info->hpdet_ip_version = 1; break; } break; @@ -1514,7 +1514,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; default: info->micd_clamp = true; - info->hpdet_ip = 2; + info->hpdet_ip_version = 2; break; } break; @@ -1523,7 +1523,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) /* fall through to default case to set common properties */ default: info->micd_clamp = true; - info->hpdet_ip = 2; + info->hpdet_ip_version = 2; break; } From 0415e1edaac58b5ec9f5d171eaacb0a86a8718d7 Mon Sep 17 00:00:00 2001 From: Vitaly Rodionov Date: Tue, 3 Mar 2015 16:18:23 +0000 Subject: [PATCH 0805/1167] ASoC: clearwater: generate interrupt instead of calling irq handle directly In case where stream has already trigerred before stream opened force irq handler to run. This has the advantage that the drain of any existing buffer will be handled in the threaded handler and thus not delay the trigger callback from completing. Change-Id: I03defd53d53046ddd4c649a95ac70629188a6c15 Signed-off-by: Vitaly Rodionov --- sound/soc/codecs/clearwater.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 3e40559fc32..73f982184fc 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2797,6 +2797,7 @@ static int clearwater_trigger(struct snd_compr_stream *stream, int cmd) { struct snd_soc_pcm_runtime *rtd = stream->private_data; struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = clearwater->core.arizona; int ret = 0; bool pending = false; @@ -2822,8 +2823,12 @@ static int clearwater_trigger(struct snd_compr_stream *stream, int cmd) mutex_unlock(&clearwater->compr_info.lock); + /* + * Stream has already trigerred, force irq handler to run + * by generating interrupt. + */ if (pending) - adsp2_irq(0, clearwater); + regmap_write(arizona->regmap, CLEARWATER_ADSP2_IRQ0, 0x01); return ret; } From 149ce49d7e997a7228ee93560aed11cafd40705f Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 15 May 2015 15:46:15 +0100 Subject: [PATCH 0806/1167] ASoC: arizona: Fix noise generator gain TLV Several codecs have an incorrect dB scaling for the noise generator gain that started at 0dB and went upwards. Actually the highest setting is 0dB. Change-Id: Ie8847e3e35ea3284d5fc6912a7318679e6371a6b Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/florida.c | 2 +- sound/soc/codecs/largo.c | 2 +- sound/soc/codecs/wm5102.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index e7ec5b49e31..ef63fdb3398 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -245,7 +245,7 @@ static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); static DECLARE_TLV_DB_SCALE(vol_limit_tlv, -600, 50, 116); -static DECLARE_TLV_DB_SCALE(noise_tlv, 0, 600, 0); +static DECLARE_TLV_DB_SCALE(noise_tlv, -13200, 600, 0); static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); #define FLORIDA_NG_SRC(name, base) \ diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index d09cff7c2a7..1b8dce06f80 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -103,7 +103,7 @@ static int largo_virt_dsp_power_ev(struct snd_soc_dapm_widget *w, static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); -static DECLARE_TLV_DB_SCALE(noise_tlv, 0, 600, 0); +static DECLARE_TLV_DB_SCALE(noise_tlv, -13200, 600, 0); static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); #define LARGO_NG_SRC(name, base) \ diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 7d80cbad35a..6382404b967 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -43,7 +43,7 @@ struct wm5102_priv { static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); -static DECLARE_TLV_DB_SCALE(noise_tlv, 0, 600, 0); +static DECLARE_TLV_DB_SCALE(noise_tlv, -13200, 600, 0); static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); static const struct wm_adsp_region wm5102_dsp1_regions[] = { From 71704f611cdf4da0410201ac624b69be73f94fdd Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 15 May 2015 15:43:11 +0100 Subject: [PATCH 0807/1167] ASoC: clearwater: Fix incorrect noise generator volume range The range of the noise generator gain is 0x0..0x16 Change-Id: I37ed2a410099b733541f814f9656690aed54509e Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 73f982184fc..62599217776 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -625,7 +625,7 @@ static int clearwater_adsp_power_ev(struct snd_soc_dapm_widget *w, static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); -static DECLARE_TLV_DB_SCALE(noise_tlv, -11400, 600, 0); +static DECLARE_TLV_DB_SCALE(noise_tlv, -13200, 600, 0); static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); #define CLEARWATER_NG_SRC(name, base) \ @@ -965,7 +965,7 @@ ARIZONA_MIXER_CONTROLS("DSP7L", CLEARWATER_DSP7LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("DSP7R", CLEARWATER_DSP7RMIX_INPUT_1_SOURCE), SOC_SINGLE_TLV("Noise Generator Volume", CLEARWATER_COMFORT_NOISE_GENERATOR, - CLEARWATER_NOISE_GEN_GAIN_SHIFT, 0x12, 0, noise_tlv), + CLEARWATER_NOISE_GEN_GAIN_SHIFT, 0x16, 0, noise_tlv), ARIZONA_MIXER_CONTROLS("HPOUT1L", ARIZONA_OUT1LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("HPOUT1R", ARIZONA_OUT1RMIX_INPUT_1_SOURCE), From ef50a887e359672bbd9c31523a0108376e6f6aac Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Tue, 28 Apr 2015 16:54:05 +0100 Subject: [PATCH 0808/1167] ASoC: marley: support for HP/EP out selection Change-Id: I1610519180e89c874bb87463c87c285bd61ae3a8 Signed-off-by: Piotr Stankiewicz --- sound/soc/codecs/arizona.c | 18 ++++- sound/soc/codecs/marley.c | 148 +++++++++++++++++++++++++++++++------ 2 files changed, 142 insertions(+), 24 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 46ed507fcda..0674c6d20f7 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2331,6 +2331,7 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); unsigned int mask = 1 << w->shift; unsigned int val; + unsigned int ep_sel = 0; int ret; switch (event) { @@ -2382,9 +2383,22 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, priv->arizona->hp_ena &= ~mask; priv->arizona->hp_ena |= val; + /* in case of Marley check if OUT1 is routed to EPOUT, do not disable + * OUT1 in this case */ + switch (priv->arizona->type) { + case CS47L35: + regmap_read(priv->arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, + &ep_sel); + ep_sel &= ARIZONA_EP_SEL_MASK; + break; + default: + break; + } + /* Force off if HPDET clamp is active */ - if (priv->arizona->hpdet_clamp || - priv->arizona->hp_impedance <= priv->arizona->pdata.hpdet_short_circuit_imp) + if ((priv->arizona->hpdet_clamp || + priv->arizona->hp_impedance <= + priv->arizona->pdata.hpdet_short_circuit_imp) && !ep_sel) val = 0; snd_soc_update_bits(w->codec, ARIZONA_OUTPUT_ENABLES_1, mask, val); diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index 3ba685d2329..9c44402df13 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -204,6 +204,101 @@ static const struct snd_kcontrol_new marley_in1mux[2] = { SOC_DAPM_ENUM("IN1R Mux", marley_in1muxr_enum), }; +static const char * const marley_outdemux_texts[] = { + "HPOUT", + "EPOUT", +}; + +static int marley_put_demux(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol); + struct snd_soc_dapm_widget *widget = wlist->widgets[0]; + struct snd_soc_codec *codec = widget->codec; + struct snd_soc_card *card = codec->card; + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + unsigned int ep_sel, mux, change; + unsigned int mask; + int ret; + + if (ucontrol->value.enumerated.item[0] > e->max - 1) + return -EINVAL; + mux = ucontrol->value.enumerated.item[0]; + ep_sel = mux << e->shift_l; + mask = e->mask << e->shift_l; + + mutex_lock_nested(&card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); + + change = snd_soc_test_bits(codec, e->reg, mask, ep_sel); + if (change) { + /* if HP detection clamp is applied while switching to HPOUT + * disable OUT1 and set EDRE Manual */ + if (!ep_sel && (arizona->hpdet_clamp || (arizona->hp_impedance + <= arizona->pdata.hpdet_short_circuit_imp))) { + ret = regmap_update_bits(arizona->regmap, + ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT1L_ENA | + ARIZONA_OUT1R_ENA, 0); + if (ret) + dev_warn(arizona->dev, + "Failed to disable headphone outputs" + ": %d\n", ret); + } + if (!ep_sel && arizona->hpdet_clamp) { + ret = regmap_write(arizona->regmap, + CLEARWATER_EDRE_MANUAL, 0x3); + if (ret) + dev_warn(arizona->dev, + "Failed to set EDRE Manual: %d\n", + ret); + } + + ret = regmap_update_bits(arizona->regmap, + ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_EP_SEL, ep_sel); + if (ret) + dev_err(arizona->dev, "Failed to set OUT1 demux: %d\n", + ret); + + /* provided the switch back to EPOUT succeeded make sure OUT1 + * is restored to a desired value (retained by arizona->hp_ena) + * and EDRE Manual is set to the proper value + * */ + if (ep_sel && !ret) { + ret = regmap_update_bits(arizona->regmap, + ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT1L_ENA | + ARIZONA_OUT1R_ENA, + arizona->hp_ena); + if (ret) + dev_warn(arizona->dev, + "Failed to restore earpiece outputs:" + " %d\n", ret); + ret = regmap_write(arizona->regmap, + CLEARWATER_EDRE_MANUAL, 0); + if (ret) + dev_warn(arizona->dev, + "Failed to restore EDRE Manual: %d\n", + ret); + } + + } + + mutex_unlock(&card->dapm_mutex); + + return snd_soc_dapm_put_enum_virt(kcontrol, ucontrol); +} + +static const SOC_ENUM_SINGLE_DECL(marley_outdemux_enum, + ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_EP_SEL_SHIFT, + marley_outdemux_texts); + +static const struct snd_kcontrol_new marley_outdemux = + SOC_DAPM_ENUM_EXT("OUT1 Demux", marley_outdemux_enum, + snd_soc_dapm_get_enum_double, marley_put_demux); + static int marley_frf_bytes_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { @@ -471,8 +566,8 @@ static DECLARE_TLV_DB_SCALE(noise_tlv, -11400, 600, 0); static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); #define MARLEY_NG_SRC(name, base) \ - SOC_SINGLE(name " NG HPOUTL Switch", base, 0, 1, 0), \ - SOC_SINGLE(name " NG HPOUTR Switch", base, 1, 1, 0), \ + SOC_SINGLE(name " NG OUT1L Switch", base, 0, 1, 0), \ + SOC_SINGLE(name " NG OUT1R Switch", base, 1, 1, 0), \ SOC_SINGLE(name " NG SPKOUT Switch", base, 6, 1, 0), \ SOC_SINGLE(name " NG SPKDATL Switch", base, 8, 1, 0), \ SOC_SINGLE(name " NG SPKDATR Switch", base, 9, 1, 0) @@ -681,31 +776,31 @@ ARIZONA_MIXER_CONTROLS("DSP3R", ARIZONA_DSP3RMIX_INPUT_1_SOURCE), SOC_SINGLE_TLV("Noise Generator Volume", CLEARWATER_COMFORT_NOISE_GENERATOR, CLEARWATER_NOISE_GEN_GAIN_SHIFT, 0x12, 0, noise_tlv), -ARIZONA_MIXER_CONTROLS("HPOUTL", ARIZONA_OUT1LMIX_INPUT_1_SOURCE), -ARIZONA_MIXER_CONTROLS("HPOUTR", ARIZONA_OUT1RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("OUT1L", ARIZONA_OUT1LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("OUT1R", ARIZONA_OUT1RMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("SPKOUT", ARIZONA_OUT4LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("SPKDATL", ARIZONA_OUT5LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("SPKDATR", ARIZONA_OUT5RMIX_INPUT_1_SOURCE), -SOC_SINGLE("HPOUT SC Protect Switch", ARIZONA_HP1_SHORT_CIRCUIT_CTRL, +SOC_SINGLE("OUT1 SC Protect Switch", ARIZONA_HP1_SHORT_CIRCUIT_CTRL, ARIZONA_HP1_SC_ENA_SHIFT, 1, 0), -SOC_SINGLE("HPOUTL ONEFLT Switch", ARIZONA_HP_TEST_CTRL_5, +SOC_SINGLE("OUT1L ONEFLT Switch", ARIZONA_HP_TEST_CTRL_5, ARIZONA_HP1L_ONEFLT_SHIFT, 1, 0), -SOC_SINGLE("HPOUTR ONEFLT Switch", ARIZONA_HP_TEST_CTRL_6, +SOC_SINGLE("OUT1R ONEFLT Switch", ARIZONA_HP_TEST_CTRL_6, ARIZONA_HP1R_ONEFLT_SHIFT, 1, 0), SOC_SINGLE("SPKDAT High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_5L, ARIZONA_OUT5_OSR_SHIFT, 1, 0), -SOC_DOUBLE_R("HPOUT Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_1L, +SOC_DOUBLE_R("OUT1 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_1L, ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_MUTE_SHIFT, 1, 1), SOC_SINGLE("Speaker Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_4L, ARIZONA_OUT4L_MUTE_SHIFT, 1, 1), SOC_DOUBLE_R("SPKDAT Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_5L, ARIZONA_DAC_DIGITAL_VOLUME_5R, ARIZONA_OUT5L_MUTE_SHIFT, 1, 1), -SOC_DOUBLE_R_TLV("HPOUT Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_1L, +SOC_DOUBLE_R_TLV("OUT1 Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_1L, ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_VOL_SHIFT, 0xbf, 0, digital_tlv), SOC_SINGLE_TLV("Speaker Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_4L, @@ -717,11 +812,11 @@ SOC_DOUBLE_R_TLV("SPKDAT Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_5L, SOC_DOUBLE("SPKDAT Switch", ARIZONA_PDM_SPK1_CTRL_1, ARIZONA_SPK1L_MUTE_SHIFT, ARIZONA_SPK1R_MUTE_SHIFT, 1, 1), -SOC_DOUBLE_EXT("HPOUT DRE Switch", ARIZONA_DRE_ENABLE, +SOC_DOUBLE_EXT("OUT1 DRE Switch", ARIZONA_DRE_ENABLE, ARIZONA_DRE1L_ENA_SHIFT, ARIZONA_DRE1R_ENA_SHIFT, 1, 0, snd_soc_get_volsw, clearwater_put_dre), -SOC_DOUBLE("HPOUT EDRE Switch", CLEARWATER_EDRE_ENABLE, +SOC_DOUBLE("OUT1 EDRE Switch", CLEARWATER_EDRE_ENABLE, CLEARWATER_EDRE_OUT1L_THR1_ENA_SHIFT, CLEARWATER_EDRE_OUT1R_THR1_ENA_SHIFT, 1, 0), @@ -742,8 +837,8 @@ SOC_ENUM("Noise Gate Hold", arizona_ng_hold), MARLEY_RATE_ENUM("Output Rate 1", arizona_output_rate), SOC_VALUE_ENUM("In Rate", arizona_input_rate), -MARLEY_NG_SRC("HPOUTL", ARIZONA_NOISE_GATE_SELECT_1L), -MARLEY_NG_SRC("HPOUTR", ARIZONA_NOISE_GATE_SELECT_1R), +MARLEY_NG_SRC("OUT1L", ARIZONA_NOISE_GATE_SELECT_1L), +MARLEY_NG_SRC("OUT1R", ARIZONA_NOISE_GATE_SELECT_1R), MARLEY_NG_SRC("SPKOUT", ARIZONA_NOISE_GATE_SELECT_4L), MARLEY_NG_SRC("SPKDATL", ARIZONA_NOISE_GATE_SELECT_5L), MARLEY_NG_SRC("SPKDATR", ARIZONA_NOISE_GATE_SELECT_5R), @@ -879,7 +974,7 @@ static const struct snd_kcontrol_new marley_memory_mux[] = { }; static const char * const marley_aec_loopback_texts[] = { - "HPOUTL", "HPOUTR", "SPKOUT", "SPKDATL", "SPKDATR", + "OUT1L", "OUT1R", "SPKOUT", "SPKDATL", "SPKDATR", }; static const unsigned int marley_aec_loopback_values[] = { @@ -924,6 +1019,8 @@ SND_SOC_DAPM_INPUT("IN2R"), SND_SOC_DAPM_MUX("IN1L Mux", SND_SOC_NOPM, 0, 0, &marley_in1mux[0]), SND_SOC_DAPM_MUX("IN1R Mux", SND_SOC_NOPM, 0, 0, &marley_in1mux[1]), +SND_SOC_DAPM_DEMUX("OUT1 Demux", SND_SOC_NOPM, 0, 0, &marley_outdemux), + SND_SOC_DAPM_OUTPUT("DRC1 Signal Activity"), SND_SOC_DAPM_OUTPUT("DRC2 Signal Activity"), @@ -1164,8 +1261,8 @@ ARIZONA_MIXER_WIDGETS(LHPF4, "LHPF4"), ARIZONA_MIXER_WIDGETS(PWM1, "PWM1"), ARIZONA_MIXER_WIDGETS(PWM2, "PWM2"), -ARIZONA_MIXER_WIDGETS(OUT1L, "HPOUTL"), -ARIZONA_MIXER_WIDGETS(OUT1R, "HPOUTR"), +ARIZONA_MIXER_WIDGETS(OUT1L, "OUT1L"), +ARIZONA_MIXER_WIDGETS(OUT1R, "OUT1R"), ARIZONA_MIXER_WIDGETS(SPKOUT, "SPKOUT"), ARIZONA_MIXER_WIDGETS(SPKDAT1L, "SPKDATL"), ARIZONA_MIXER_WIDGETS(SPKDAT1R, "SPKDATR"), @@ -1227,6 +1324,8 @@ ARIZONA_MUX_WIDGETS(ISRC2INT4, "ISRC2INT4"), SND_SOC_DAPM_OUTPUT("HPOUTL"), SND_SOC_DAPM_OUTPUT("HPOUTR"), +SND_SOC_DAPM_OUTPUT("EPOUTP"), +SND_SOC_DAPM_OUTPUT("EPOUTN"), SND_SOC_DAPM_OUTPUT("SPKOUTN"), SND_SOC_DAPM_OUTPUT("SPKOUTP"), SND_SOC_DAPM_OUTPUT("SPKDATL"), @@ -1433,8 +1532,8 @@ static const struct snd_soc_dapm_route marley_dapm_routes[] = { { "IN2L PGA", NULL, "IN2L" }, { "IN2R PGA", NULL, "IN2R" }, - ARIZONA_MIXER_ROUTES("OUT1L", "HPOUTL"), - ARIZONA_MIXER_ROUTES("OUT1R", "HPOUTR"), + ARIZONA_MIXER_ROUTES("OUT1L", "OUT1L"), + ARIZONA_MIXER_ROUTES("OUT1R", "OUT1R"), ARIZONA_MIXER_ROUTES("OUT4L", "SPKOUT"), @@ -1515,15 +1614,20 @@ static const struct snd_soc_dapm_route marley_dapm_routes[] = { ARIZONA_MUX_ROUTES("ISRC2DEC3", "ISRC2DEC3"), ARIZONA_MUX_ROUTES("ISRC2DEC4", "ISRC2DEC4"), - { "AEC Loopback", "HPOUTL", "OUT1L" }, - { "AEC Loopback", "HPOUTR", "OUT1R" }, - { "HPOUTL", NULL, "OUT1L" }, - { "HPOUTR", NULL, "OUT1R" }, + { "AEC Loopback", "OUT1L", "OUT1L" }, + { "AEC Loopback", "OUT1R", "OUT1R" }, + { "OUT1 Demux", NULL, "OUT1L" }, + { "OUT1 Demux", NULL, "OUT1R" }, { "AEC Loopback", "SPKOUT", "OUT4L" }, { "SPKOUTN", NULL, "OUT4L" }, { "SPKOUTP", NULL, "OUT4L" }, + { "HPOUTL", "HPOUT", "OUT1 Demux" }, + { "HPOUTR", "HPOUT", "OUT1 Demux" }, + { "EPOUTP", "EPOUT", "OUT1 Demux" }, + { "EPOUTN", "EPOUT", "OUT1 Demux" }, + { "AEC Loopback", "SPKDATL", "OUT5L" }, { "AEC Loopback", "SPKDATR", "OUT5R" }, { "SPKDATL", NULL, "OUT5L" }, From 4b987f104623d8b45d06fb32d11dba3f23068264 Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Thu, 14 May 2015 16:47:34 +0100 Subject: [PATCH 0809/1167] switch: arizona: don't disable OUT1 on Marley if EPOUT is selected On Marley OUT1 will no longer be disabled during measurement, provided OUT1 Demux is set to EPOUT. Change-Id: I6f845b95894a34a7008e7a669f730477a436418c Signed-off-by: Piotr Stankiewicz --- drivers/switch/switch-arizona.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index e7319a64cb8..22bcf022c52 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -279,8 +279,12 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, unsigned int mask, val = 0; unsigned int cap_sel = 0; unsigned int edre_reg = 0, edre_val = 0; + unsigned int ep_sel = 0; int ret; + mutex_lock_nested(&arizona->dapm->card->dapm_mutex, + SND_SOC_DAPM_CLASS_RUNTIME); + switch (arizona->type) { case WM5102: case WM8997: @@ -311,9 +315,14 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, "Failed to set TST_CAP_SEL: %d\n", ret); break; + case CS47L35: + /* check whether audio is routed to EPOUT, do not disable OUT1 + * in that case */ + regmap_read(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, &ep_sel); + ep_sel &= ARIZONA_EP_SEL_MASK; + /* fall through to next step to set common variables */ case WM8285: case WM1840: - case CS47L35: edre_reg = CLEARWATER_EDRE_MANUAL; mask = ARIZONA_HP1L_SHRTO | ARIZONA_HP1L_FLWR | ARIZONA_HP1L_SHRTI; @@ -330,12 +339,10 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, break; }; - mutex_lock(&arizona->dapm->card->dapm_mutex); - arizona->hpdet_clamp = clamp; /* Keep the HP output stages disabled while doing the clamp */ - if (clamp) { + if (clamp && !ep_sel) { ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT1L_ENA | @@ -346,7 +353,7 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, ret); } - if (edre_reg) { + if (edre_reg && !ep_sel) { ret = regmap_write(arizona->regmap, edre_reg, edre_val); if (ret != 0) dev_warn(arizona->dev, @@ -369,7 +376,8 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, } /* Restore the desired state while not doing the clamp */ - if (!clamp && (arizona->hp_impedance > arizona->pdata.hpdet_short_circuit_imp)) { + if (!clamp && (arizona->hp_impedance > + arizona->pdata.hpdet_short_circuit_imp) && !ep_sel) { ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT1L_ENA | From b42980b83cf5acc822a266118d58ed0cbf6eefde Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Thu, 14 May 2015 16:50:42 +0100 Subject: [PATCH 0810/1167] extcon: arizona: don't disable OUT1 on Marley if EPOUT is selected On Marley OUT1 will no longer be disabled during measurement, provided OUT1 Demux is set to EPOUT. Change-Id: I566270bf718ec98f2338d438e8e7eb4d9dea8df6 Signed-off-by: Piotr Stankiewicz --- drivers/extcon/extcon-arizona.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index e51b719f40f..82c9a8f88d4 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -161,8 +161,13 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, { struct arizona *arizona = info->arizona; unsigned int mask, val = 0; + unsigned int ep_sel = 0; int ret; + mutex_lock_nested(&arizona->dapm->card->dapm_mutex, + SND_SOC_DAPM_CLASS_RUNTIME); + + switch (arizona->type) { case WM5102: case WM8997: @@ -179,17 +184,21 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, else val = ARIZONA_HP1L_FLWR | ARIZONA_HP1L_SHRTI; break; + case CS47L35: + /* check whether audio is routed to EPOUT, do not disable OUT1 + * in that case */ + regmap_read(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, &ep_sel); + ep_sel &= ARIZONA_EP_SEL_MASK; + /* fall through to next step to set common variables */ default: mask = 0; break; }; - mutex_lock(&arizona->dapm->card->dapm_mutex); - arizona->hpdet_clamp = clamp; /* Keep the HP output stages disabled while doing the clamp */ - if (clamp) { + if (clamp && !ep_sel) { ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT1L_ENA | @@ -215,7 +224,7 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, } /* Restore the desired state while not doing the clamp */ - if (!clamp) { + if (!clamp && !ep_sel) { ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT1L_ENA | From 07a4b718feb24378aaa02f0a4fb00bca847e6eb1 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 28 May 2015 10:09:35 +0100 Subject: [PATCH 0811/1167] mfd: arizona: Fix type for clk32k device tree entry Corrects this Sparse warning: drivers/mfd/arizona-core.c warning 1405:34 incorrect type in argument 4 (different signedness) expected unsigned int [usertype] *data got int * Change-Id: I4d14e65d470650f2ec73171fda86fd741096f331 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 669809177e0..064e28009b7 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1401,8 +1401,8 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true); - arizona_of_read_u32(arizona, "wlf,clk32k-src", false, - &pdata->clk32k_src); + arizona_of_read_s32(arizona, "wlf,clk32k-src", false, + &pdata->clk32k_src); arizona_of_get_micd_ranges(arizona, "wlf,micd-ranges"); arizona_of_get_micd_configs(arizona, "wlf,micd-configs"); From 17c12c2beed772a8e7572f7eced6a7d33544cec0 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 27 May 2015 13:09:47 +0100 Subject: [PATCH 0812/1167] mfd: arizona: Remove VCO_CAL registers from chips that arn't Florida These registers were only used to work around a bug on Florida and shouldn't have made it into any other chips. Change-Id: I3cba5b6ee9d4f512903d089a5a07c6427eb2be4e Signed-off-by: Charles Keepax --- drivers/mfd/clearwater-tables.c | 6 ------ drivers/mfd/largo-tables.c | 6 ------ drivers/mfd/marley-tables.c | 4 ---- 3 files changed, 16 deletions(-) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index abf28246149..7338a0708fe 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -2076,12 +2076,6 @@ static bool clearwater_16bit_readable_register(struct device *dev, unsigned int case ARIZONA_IN6R_CONTROL: case ARIZONA_ADC_DIGITAL_VOLUME_6R: case ARIZONA_DMIC6R_CONTROL: - case ARIZONA_ADC_VCO_CAL_4: - case ARIZONA_ADC_VCO_CAL_5: - case ARIZONA_ADC_VCO_CAL_6: - case ARIZONA_ADC_VCO_CAL_7: - case ARIZONA_ADC_VCO_CAL_8: - case ARIZONA_ADC_VCO_CAL_9: case ARIZONA_OUTPUT_ENABLES_1: case ARIZONA_OUTPUT_STATUS_1: case ARIZONA_OUTPUT_STANDBY_1: diff --git a/drivers/mfd/largo-tables.c b/drivers/mfd/largo-tables.c index 51c0867589d..363e87447c5 100644 --- a/drivers/mfd/largo-tables.c +++ b/drivers/mfd/largo-tables.c @@ -914,12 +914,6 @@ static bool largo_readable_register(struct device *dev, unsigned int reg) case ARIZONA_IN2R_CONTROL: case ARIZONA_ADC_DIGITAL_VOLUME_2R: case ARIZONA_DMIC2R_CONTROL: - case ARIZONA_ADC_VCO_CAL_4: - case ARIZONA_ADC_VCO_CAL_5: - case ARIZONA_ADC_VCO_CAL_6: - case ARIZONA_ADC_VCO_CAL_7: - case ARIZONA_ADC_VCO_CAL_8: - case ARIZONA_ADC_VCO_CAL_9: case ARIZONA_OUTPUT_ENABLES_1: case ARIZONA_OUTPUT_STATUS_1: case ARIZONA_OUTPUT_STANDBY_1: diff --git a/drivers/mfd/marley-tables.c b/drivers/mfd/marley-tables.c index 8e1f00a05e5..5b277b8ba4f 100644 --- a/drivers/mfd/marley-tables.c +++ b/drivers/mfd/marley-tables.c @@ -981,10 +981,6 @@ static bool marley_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_IN2R_CONTROL: case ARIZONA_ADC_DIGITAL_VOLUME_2R: case ARIZONA_DMIC2R_CONTROL: - case ARIZONA_ADC_VCO_CAL_4: - case ARIZONA_ADC_VCO_CAL_5: - case ARIZONA_ADC_VCO_CAL_6: - case ARIZONA_ADC_VCO_CAL_7: case ARIZONA_OUTPUT_ENABLES_1: case ARIZONA_OUTPUT_STATUS_1: case ARIZONA_OUTPUT_STANDBY_1: From 195b635af2d6282e31b1e84a09b474c5fa25a855 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 27 May 2015 13:11:28 +0100 Subject: [PATCH 0813/1167] mfd: clearwater: Remove isolation control register This register doesn't exist on Clearwater. Change-Id: Idd478afe5f925850fa1e4b04028cb6bd08607b50 Signed-off-by: Charles Keepax --- drivers/mfd/clearwater-tables.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index 7338a0708fe..cb187a334bd 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -2033,7 +2033,6 @@ static bool clearwater_16bit_readable_register(struct device *dev, unsigned int case ARIZONA_MIC_DETECT_LEVEL_4: case ARIZONA_MIC_NOISE_MIX_CONTROL_1: case CLEARWATER_GP_SWITCH_1: - case ARIZONA_ISOLATION_CONTROL: case ARIZONA_JACK_DETECT_ANALOGUE: case ARIZONA_INPUT_ENABLES: case ARIZONA_INPUT_ENABLES_STATUS: From 7ae3e28681b4b575f3592181c9a4e1bd50719cc6 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 27 May 2015 13:13:45 +0100 Subject: [PATCH 0814/1167] mfd: clearwater: Remove MICMIX and NOISEMIX mixer registers These don't exist on Clearwater, so remove them. Change-Id: I83633399ddd66bf6503abccca05429907f1f8b4a Signed-off-by: Charles Keepax --- drivers/mfd/clearwater-tables.c | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index cb187a334bd..1ea3d89a9be 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -2260,22 +2260,6 @@ static bool clearwater_16bit_readable_register(struct device *dev, unsigned int case ARIZONA_PWM2MIX_INPUT_3_VOLUME: case ARIZONA_PWM2MIX_INPUT_4_SOURCE: case ARIZONA_PWM2MIX_INPUT_4_VOLUME: - case ARIZONA_MICMIX_INPUT_1_SOURCE: - case ARIZONA_MICMIX_INPUT_1_VOLUME: - case ARIZONA_MICMIX_INPUT_2_SOURCE: - case ARIZONA_MICMIX_INPUT_2_VOLUME: - case ARIZONA_MICMIX_INPUT_3_SOURCE: - case ARIZONA_MICMIX_INPUT_3_VOLUME: - case ARIZONA_MICMIX_INPUT_4_SOURCE: - case ARIZONA_MICMIX_INPUT_4_VOLUME: - case ARIZONA_NOISEMIX_INPUT_1_SOURCE: - case ARIZONA_NOISEMIX_INPUT_1_VOLUME: - case ARIZONA_NOISEMIX_INPUT_2_SOURCE: - case ARIZONA_NOISEMIX_INPUT_2_VOLUME: - case ARIZONA_NOISEMIX_INPUT_3_SOURCE: - case ARIZONA_NOISEMIX_INPUT_3_VOLUME: - case ARIZONA_NOISEMIX_INPUT_4_SOURCE: - case ARIZONA_NOISEMIX_INPUT_4_VOLUME: case ARIZONA_OUT1LMIX_INPUT_1_SOURCE: case ARIZONA_OUT1LMIX_INPUT_1_VOLUME: case ARIZONA_OUT1LMIX_INPUT_2_SOURCE: From a9b5825676db5911d2a60f8c5d88d082565e1add Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 27 May 2015 13:18:04 +0100 Subject: [PATCH 0815/1167] mfd: clearwater: Remove registers for ISRC3 inputs 3,4 Remove the registers for inputs 3 and 4 on ISRC3 as it only has two inputs. Change-Id: I997f823a382f920c1c2ddae68c7c7d436d975bfe Signed-off-by: Charles Keepax --- drivers/mfd/clearwater-tables.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index 1ea3d89a9be..0cb017bd911 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -2796,12 +2796,8 @@ static bool clearwater_16bit_readable_register(struct device *dev, unsigned int case ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE: case ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE: case ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE: - case ARIZONA_ISRC3DEC3MIX_INPUT_1_SOURCE: - case ARIZONA_ISRC3DEC4MIX_INPUT_1_SOURCE: case ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE: case ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE: - case ARIZONA_ISRC3INT3MIX_INPUT_1_SOURCE: - case ARIZONA_ISRC3INT4MIX_INPUT_1_SOURCE: case ARIZONA_ISRC4DEC1MIX_INPUT_1_SOURCE: case ARIZONA_ISRC4DEC2MIX_INPUT_1_SOURCE: case ARIZONA_ISRC4INT1MIX_INPUT_1_SOURCE: From b29ebbfcfff506728d0a6da24258c87d63528b0c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 27 May 2015 14:20:28 +0100 Subject: [PATCH 0816/1167] mfd: arizona: Correct number of inputs on CODECs A bunch of CODECs had their input numbers set higher that actually exist, although this is harmless might as well fix it. Change-Id: Id6f7141cae381dc3ea4ec30086e6ee4261439d4d Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 064e28009b7..ee44b62e113 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -2113,16 +2113,17 @@ int arizona_dev_init(struct arizona *arizona) switch (arizona->type) { case WM5102: case WM5110: - case WM8997: case WM8280: - case WM1831: - case CS47L24: /* These arizona chips have 4 inputs and settings for INxL and INxR are same*/ max_inputs = 4; break; + case WM8997: + case WM1831: + case CS47L24: case WM8998: case WM1814: + case CS47L35: max_inputs = 2; break; default: From 10b26d5c219f699dc79d6569e0501ab6985c960a Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 27 May 2015 15:22:37 +0100 Subject: [PATCH 0817/1167] switch: arizona: Rename hpdet_ip to make its purpose clearer Renamed to hpdet_ip_version to make it clearer what it does and that the value in it is simply a version number. Change-Id: I34a8717fc019d10bf41d8f399f3eb48c924de1c6 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 22bcf022c52..7f031d02ae3 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -124,7 +124,7 @@ struct arizona_extcon_info { bool detecting; int jack_flips; - int hpdet_ip; + int hpdet_ip_version; const struct arizona_hpdet_d_trims *hpdet_d_trims; const struct arizona_hpdet_calibration_data *calib_data; int calib_data_size; @@ -655,7 +655,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) return ret; } - switch (info->hpdet_ip) { + switch (info->hpdet_ip_version) { case 0: if (!(val & ARIZONA_HP_DONE)) { dev_err(arizona->dev, "HPDET did not complete: %x\n", @@ -716,7 +716,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) default: dev_warn(arizona->dev, "Unknown HPDET IP revision %d\n", - info->hpdet_ip); + info->hpdet_ip_version); case 2: if (!(val & ARIZONA_HP_DONE_B)) { dev_err(arizona->dev, "HPDET did not complete: %x\n", @@ -796,7 +796,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) } val = (val >> ARIZONA_HP_DACVAL_SHIFT) & ARIZONA_HP_DACVAL_MASK; - if (info->hpdet_ip == 4) { + if (info->hpdet_ip_version == 4) { ret = regmap_read(arizona->regmap, ARIZONA_HP_DACVAL, &val_down); @@ -3282,7 +3282,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; default: info->micd_clamp = true; - info->hpdet_ip = 1; + info->hpdet_ip_version = 1; break; } break; @@ -3293,7 +3293,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; default: info->micd_clamp = true; - info->hpdet_ip = 3; + info->hpdet_ip_version = 3; break; } break; @@ -3303,11 +3303,11 @@ static int arizona_extcon_probe(struct platform_device *pdev) case WM8285: case WM1840: info->micd_clamp = true; - info->hpdet_ip = 4; + info->hpdet_ip_version = 4; break; default: info->micd_clamp = true; - info->hpdet_ip = 2; + info->hpdet_ip_version = 2; break; } @@ -3457,16 +3457,16 @@ static int arizona_extcon_probe(struct platform_device *pdev) pm_runtime_idle(&pdev->dev); pm_runtime_get_sync(&pdev->dev); - switch (info->hpdet_ip) { + switch (info->hpdet_ip_version) { case 3: arizona_hpdet_d_read_calibration(info); if (!info->hpdet_d_trims) - info->hpdet_ip = 2; + info->hpdet_ip_version = 2; break; case 4: arizona_hpdet_clearwater_read_calibration(info); if (!info->hpdet_d_trims) - info->hpdet_ip = 2; + info->hpdet_ip_version = 2; else /* as per the hardware steps - below bit needs to be set * for clearwater for accurate HP impedance detection */ From f46ffe62542af65218148fd634c7be4a6733f066 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 26 May 2015 10:30:12 +0100 Subject: [PATCH 0818/1167] ASoC: wm5102: No need for event type on virtual output mux The virtual output mux seems to be defined as a SND_SOC_DAPM_VIRT_MUX_E but no event functions are provided. This seems to be a typo correct to a standard SND_SOC_DAPM_VIRT_MUX, this silences this Sparse warning: sound/soc/codecs/wm5102.c warning 1339:1 Using plain integer as NULL pointer Change-Id: I94a597102266dcb529914a625627c1376899aabf Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5102.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 6382404b967..21284011885 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1336,8 +1336,8 @@ SND_SOC_DAPM_AIF_IN("SLIMRX8", NULL, 0, ARIZONA_DSP_WIDGETS(DSP1, "DSP1"), -SND_SOC_DAPM_VIRT_MUX_E("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, - &wm5102_dsp_output_mux, 0, 0), +SND_SOC_DAPM_VIRT_MUX("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, + &wm5102_dsp_output_mux), SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, From 6a816c1a5a055b4ca24541538839733070793ca1 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 25 May 2015 13:47:51 +0100 Subject: [PATCH 0819/1167] ASoC: arizona: Fix handling of POST_PMD delay All analogue outputs should call arizona_out_ev such that the 750uS delay is used. Otherwise we might remove the SYSCLK before the write sequence has finished closing the output resulting in a pop. Change-Id: If7341302a75459146490588597a03cee491fc272 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 2 +- sound/soc/codecs/clearwater.c | 12 ++++++++---- sound/soc/codecs/florida.c | 12 ++++++++---- sound/soc/codecs/vegas.c | 15 ++++++++++----- sound/soc/codecs/wm5102.c | 15 ++++++++++----- sound/soc/codecs/wm8997.c | 9 ++++++--- 6 files changed, 43 insertions(+), 22 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 0674c6d20f7..086e269dbd5 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2370,7 +2370,7 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, clearwater_hp_post_disable(w); break; default: - ret = 0; + ret = arizona_out_ev(w, kcontrol, event); break; } diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 62599217776..320d029be93 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -1748,16 +1748,20 @@ SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT2L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT2L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT2R", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT2R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT3L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT3L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT3R", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT3R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT5L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT5L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index ef63fdb3398..1cc8c68f26c 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -1140,16 +1140,20 @@ SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT2L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT2L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT2R", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT2R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT3L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT3L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT3R", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT3R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT5L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT5L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), diff --git a/sound/soc/codecs/vegas.c b/sound/soc/codecs/vegas.c index 08033a7a045..c78178dd5ed 100644 --- a/sound/soc/codecs/vegas.c +++ b/sound/soc/codecs/vegas.c @@ -801,19 +801,24 @@ SND_SOC_DAPM_AIF_IN("AIF3RX2", NULL, 0, SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT2L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT2L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT2R", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT2R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT3", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT3L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT5L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT5L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 21284011885..ef4dec3f10d 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1345,19 +1345,24 @@ SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT2L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT2L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT2R", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT2R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT3L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT3L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT5L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT5L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c index d669bd4077e..74cedd85f8f 100644 --- a/sound/soc/codecs/wm8997.c +++ b/sound/soc/codecs/wm8997.c @@ -605,13 +605,16 @@ SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT3L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT3L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT5L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT5L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), From f9483392cf591cc3dff9f268a98680f775400d07 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 25 May 2015 13:16:58 +0100 Subject: [PATCH 0820/1167] ASoC: florida: Create seperate florida_hp_ev The additional operations required for DRE enable/disable on Florida for the headphone path, are making the arizona_hp_ev and arizona_out_ev functions very complex. It seems much clearer to create a specific florida_hp_ev function, so this patch does that. Change-Id: I86a0f1b87caea52f6e362c2eab681403718cd7fc Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 51 ++++++++++++++++++++++---------------- sound/soc/codecs/arizona.h | 3 +++ sound/soc/codecs/florida.c | 4 +-- 3 files changed, 35 insertions(+), 23 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 086e269dbd5..05d020417ba 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2279,9 +2279,6 @@ int arizona_out_ev(struct snd_soc_dapm_widget *w, msleep(17); switch (priv->arizona->type) { - case WM5110: - florida_hp_post_enable(w); - break; case WM8285: case WM1840: case CS47L35: @@ -2336,33 +2333,15 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_PRE_PMU: - switch (priv->arizona->type) { - case WM5110: - florida_hp_pre_enable(w); - break; - default: - break; - } return 0; case SND_SOC_DAPM_POST_PMU: val = mask; break; case SND_SOC_DAPM_PRE_PMD: val = 0; - switch (priv->arizona->type) { - case WM5110: - florida_hp_pre_disable(w); - break; - default: - break; - } break; case SND_SOC_DAPM_POST_PMD: switch (priv->arizona->type) { - case WM5110: - florida_hp_post_disable(w); - ret = arizona_out_ev(w, kcontrol, event); - break; case WM8285: case WM1840: case CS47L35: @@ -2407,6 +2386,36 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, } EXPORT_SYMBOL_GPL(arizona_hp_ev); +int florida_hp_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, + int event) +{ + int ret; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + florida_hp_pre_enable(w); + return 0; + case SND_SOC_DAPM_POST_PMU: + ret = arizona_hp_ev(w, kcontrol, event); + if (ret < 0) + return ret; + + florida_hp_post_enable(w); + return 0; + case SND_SOC_DAPM_PRE_PMD: + florida_hp_pre_disable(w); + break; + case SND_SOC_DAPM_POST_PMD: + florida_hp_post_disable(w); + break; + default: + return -EINVAL; + } + + return arizona_hp_ev(w, kcontrol, event); +} +EXPORT_SYMBOL_GPL(florida_hp_ev); + int arizona_anc_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 2a3d26d40b5..c5ec6d190cd 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -312,6 +312,9 @@ extern int arizona_out_ev(struct snd_soc_dapm_widget *w, extern int arizona_hp_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); +extern int florida_hp_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event); extern int arizona_anc_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 1cc8c68f26c..62c3cb409c5 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -1131,11 +1131,11 @@ SND_SOC_DAPM_AIF_IN("AIF3RX2", NULL, 0, ARIZONA_AIF3_RX_ENABLES, ARIZONA_AIF3RX2_ENA_SHIFT, 0), SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, - ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, + ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, florida_hp_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, - ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, + ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, florida_hp_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT2L", ARIZONA_OUTPUT_ENABLES_1, From 0aa1aa2cba85f173617e81b96d6d6f68c796b2f6 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 25 May 2015 13:21:47 +0100 Subject: [PATCH 0821/1167] ASoC: clearwater: Create seperate clearwater_hp_ev The additional operations required for DRE enable/disable on Clearwater for the headphone path, are making the arizona_hp_ev and arizona_out_ev functions very complex. It seems much clearer to create a specific clearwater_hp_ev function, so this patch does that. Change-Id: I68d36f268c5792e463afb235b953d05e102d87b3 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 54 +++++++++++++++++------------------ sound/soc/codecs/arizona.h | 3 ++ sound/soc/codecs/clearwater.c | 4 +-- sound/soc/codecs/marley.c | 4 +-- 4 files changed, 34 insertions(+), 31 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 05d020417ba..d908d8724c2 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2269,25 +2269,12 @@ int arizona_out_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { - struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); - switch (event) { case SND_SOC_DAPM_POST_PMU: switch (w->shift) { case ARIZONA_OUT1L_ENA_SHIFT: case ARIZONA_OUT1R_ENA_SHIFT: msleep(17); - - switch (priv->arizona->type) { - case WM8285: - case WM1840: - case CS47L35: - clearwater_hp_post_enable(w); - break; - default: - break; - } - break; case ARIZONA_OUT2L_ENA_SHIFT: case ARIZONA_OUT2R_ENA_SHIFT: @@ -2329,7 +2316,6 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, unsigned int mask = 1 << w->shift; unsigned int val; unsigned int ep_sel = 0; - int ret; switch (event) { case SND_SOC_DAPM_PRE_PMU: @@ -2341,19 +2327,7 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, val = 0; break; case SND_SOC_DAPM_POST_PMD: - switch (priv->arizona->type) { - case WM8285: - case WM1840: - case CS47L35: - ret = arizona_out_ev(w, kcontrol, event); - clearwater_hp_post_disable(w); - break; - default: - ret = arizona_out_ev(w, kcontrol, event); - break; - } - - return ret; + return arizona_out_ev(w, kcontrol, event); default: return -EINVAL; } @@ -2416,6 +2390,32 @@ int florida_hp_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, } EXPORT_SYMBOL_GPL(florida_hp_ev); +int clearwater_hp_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + int ret; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + case SND_SOC_DAPM_PRE_PMD: + return arizona_hp_ev(w, kcontrol, event); + case SND_SOC_DAPM_POST_PMU: + ret = arizona_hp_ev(w, kcontrol, event); + if (ret < 0) + return ret; + + clearwater_hp_post_enable(w); + return 0; + case SND_SOC_DAPM_POST_PMD: + ret = arizona_hp_ev(w, kcontrol, event); + clearwater_hp_post_disable(w); + return ret; + default: + return -EINVAL; + } +} +EXPORT_SYMBOL_GPL(clearwater_hp_ev); + int arizona_anc_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index c5ec6d190cd..c242dbf507f 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -315,6 +315,9 @@ extern int arizona_hp_ev(struct snd_soc_dapm_widget *w, extern int florida_hp_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); +extern int clearwater_hp_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event); extern int arizona_anc_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 320d029be93..c86652be648 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -1739,11 +1739,11 @@ SND_SOC_DAPM_AIF_IN("AIF4RX2", NULL, 0, ARIZONA_AIF4_RX_ENABLES, ARIZONA_AIF4RX2_ENA_SHIFT, 0), SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, - ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, + ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, clearwater_hp_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, - ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, + ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, clearwater_hp_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT2L", ARIZONA_OUTPUT_ENABLES_1, diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index 9c44402df13..c8c49d6e2a6 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -1222,11 +1222,11 @@ SND_SOC_DAPM_AIF_IN("AIF3RX2", NULL, 0, ARIZONA_AIF3_RX_ENABLES, ARIZONA_AIF3RX2_ENA_SHIFT, 0), SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, - ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, + ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, clearwater_hp_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, - ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, + ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, clearwater_hp_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT5L", ARIZONA_OUTPUT_ENABLES_1, From a0c6e38cb1fd7df1a09d30a51de254e414f885d1 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 23 Jan 2015 13:52:20 +0000 Subject: [PATCH 0822/1167] ASoC: arizona: Coalesce output power down delays Change-Id: I35268bca94519c806d57713639f97b3a251072f5 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 24 +++++++++++++++++++++++- sound/soc/codecs/arizona.h | 3 +++ 2 files changed, 26 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index d908d8724c2..b235b54466d 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2269,6 +2269,8 @@ int arizona_out_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { + struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); + switch (event) { case SND_SOC_DAPM_POST_PMU: switch (w->shift) { @@ -2288,6 +2290,22 @@ int arizona_out_ev(struct snd_soc_dapm_widget *w, } break; + case SND_SOC_DAPM_PRE_PMD: + switch (w->shift) { + case ARIZONA_OUT1L_ENA_SHIFT: + case ARIZONA_OUT1R_ENA_SHIFT: + case ARIZONA_OUT2L_ENA_SHIFT: + case ARIZONA_OUT2R_ENA_SHIFT: + case ARIZONA_OUT3L_ENA_SHIFT: + case ARIZONA_OUT3R_ENA_SHIFT: + priv->out_down_pending++; + priv->out_down_delay++; + break; + default: + break; + } + break; + case SND_SOC_DAPM_POST_PMD: switch (w->shift) { case ARIZONA_OUT1L_ENA_SHIFT: @@ -2296,7 +2314,11 @@ int arizona_out_ev(struct snd_soc_dapm_widget *w, case ARIZONA_OUT2R_ENA_SHIFT: case ARIZONA_OUT3L_ENA_SHIFT: case ARIZONA_OUT3R_ENA_SHIFT: - udelay(750); + priv->out_down_pending--; + if (!priv->out_down_pending) { + msleep(priv->out_down_delay); + priv->out_down_delay = 0; + } break; default: break; diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index c242dbf507f..17865268f2e 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -93,6 +93,9 @@ struct arizona_priv { int num_inputs; unsigned int in_pending; + + unsigned int out_down_pending; + unsigned int out_down_delay; }; #define ARIZONA_NUM_MIXER_INPUTS 134 From a975ab42b37ef3c5ca1b48765bc22943af34e78a Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 23 Jan 2015 13:58:11 +0000 Subject: [PATCH 0823/1167] ASoC: arizona: Coalesce output power up delays Change-Id: I4322fe77a3d6b9a0ddcdc6e757021d2f5da447d8 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 29 +++++++++++++++++++++++------ sound/soc/codecs/arizona.h | 2 ++ sound/soc/codecs/clearwater.c | 8 ++++---- sound/soc/codecs/vegas.c | 10 +++++----- sound/soc/codecs/wm5102.c | 10 +++++----- sound/soc/codecs/wm8997.c | 6 +++--- 6 files changed, 42 insertions(+), 23 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index b235b54466d..b88e281a35d 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2272,17 +2272,35 @@ int arizona_out_ev(struct snd_soc_dapm_widget *w, struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); switch (event) { - case SND_SOC_DAPM_POST_PMU: + case SND_SOC_DAPM_PRE_PMU: switch (w->shift) { case ARIZONA_OUT1L_ENA_SHIFT: case ARIZONA_OUT1R_ENA_SHIFT: - msleep(17); + case ARIZONA_OUT2L_ENA_SHIFT: + case ARIZONA_OUT2R_ENA_SHIFT: + case ARIZONA_OUT3L_ENA_SHIFT: + case ARIZONA_OUT3R_ENA_SHIFT: + priv->out_up_pending++; + priv->out_up_delay += 17; + break; + default: break; + } + break; + + case SND_SOC_DAPM_POST_PMU: + switch (w->shift) { + case ARIZONA_OUT1L_ENA_SHIFT: + case ARIZONA_OUT1R_ENA_SHIFT: case ARIZONA_OUT2L_ENA_SHIFT: case ARIZONA_OUT2R_ENA_SHIFT: case ARIZONA_OUT3L_ENA_SHIFT: case ARIZONA_OUT3R_ENA_SHIFT: - msleep(17); + priv->out_up_pending--; + if (!priv->out_up_pending) { + msleep(priv->out_up_delay); + priv->out_up_delay = 0; + } break; default: @@ -2340,14 +2358,13 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, unsigned int ep_sel = 0; switch (event) { - case SND_SOC_DAPM_PRE_PMU: - return 0; case SND_SOC_DAPM_POST_PMU: val = mask; break; case SND_SOC_DAPM_PRE_PMD: val = 0; break; + case SND_SOC_DAPM_PRE_PMU: case SND_SOC_DAPM_POST_PMD: return arizona_out_ev(w, kcontrol, event); default: @@ -2390,7 +2407,7 @@ int florida_hp_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, switch (event) { case SND_SOC_DAPM_PRE_PMU: florida_hp_pre_enable(w); - return 0; + break; case SND_SOC_DAPM_POST_PMU: ret = arizona_hp_ev(w, kcontrol, event); if (ret < 0) diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 17865268f2e..a490a880c88 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -94,6 +94,8 @@ struct arizona_priv { int num_inputs; unsigned int in_pending; + unsigned int out_up_pending; + unsigned int out_up_delay; unsigned int out_down_pending; unsigned int out_down_delay; }; diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index c86652be648..200649b8d21 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -1749,19 +1749,19 @@ SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, SND_SOC_DAPM_PGA_E("OUT2L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT2L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT2R", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT2R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT3L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT3L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT3R", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT3R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT5L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT5L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), diff --git a/sound/soc/codecs/vegas.c b/sound/soc/codecs/vegas.c index c78178dd5ed..04f8cc39f86 100644 --- a/sound/soc/codecs/vegas.c +++ b/sound/soc/codecs/vegas.c @@ -802,23 +802,23 @@ SND_SOC_DAPM_AIF_IN("AIF3RX2", NULL, 0, SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT2L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT2L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT2R", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT2R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT3", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT3L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT5L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT5L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index ef4dec3f10d..3cf4801b64f 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1346,23 +1346,23 @@ SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT2L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT2L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT2R", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT2R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT3L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT3L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT5L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT5L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c index 74cedd85f8f..d63dd466d30 100644 --- a/sound/soc/codecs/wm8997.c +++ b/sound/soc/codecs/wm8997.c @@ -606,15 +606,15 @@ SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT3L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT3L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT5L", ARIZONA_OUTPUT_ENABLES_1, ARIZONA_OUT5L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), From da777a775b3b49a7c440106224fe9c3edc40597d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 25 May 2015 14:27:10 +0100 Subject: [PATCH 0824/1167] ASoC: florida: Remove PGA updates for headphone output disable A DAPM sequence can't abort half way through, nothing else will be attempting to alter the PGA volume during the sequence. This means that at the end of the DAPM sequence both the cache and chip will have a value of 0x80 for the PGA volume and there is no need to keep the cache in sync during the sequence. This patch removes the additional writes that were keeping the cache in sync. Change-Id: I097379e47f34ae9860de53878b35422ca9333c7f Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 22 ++-------------------- 1 file changed, 2 insertions(+), 20 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index b88e281a35d..96579bab262 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1999,10 +1999,6 @@ static int florida_hp_pre_disable(struct snd_soc_dapm_widget *w) ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 0x138); msleep(10); - snd_soc_update_bits(w->codec, - ARIZONA_OUTPUT_PATH_CONFIG_1L, - ARIZONA_OUT1L_PGA_VOL_MASK, - 0x56); } break; case ARIZONA_OUT1R_ENA_SHIFT: @@ -2012,10 +2008,6 @@ static int florida_hp_pre_disable(struct snd_soc_dapm_widget *w) ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 0x13d); msleep(10); - snd_soc_update_bits(w->codec, - ARIZONA_OUTPUT_PATH_CONFIG_1R, - ARIZONA_OUT1R_PGA_VOL_MASK, - 0x56); } break; @@ -2032,22 +2024,12 @@ static int florida_hp_post_disable(struct snd_soc_dapm_widget *w) switch (w->shift) { case ARIZONA_OUT1L_ENA_SHIFT: - if (!(val & ARIZONA_DRE1L_ENA_MASK)) { + if (!(val & ARIZONA_DRE1L_ENA_MASK)) msleep(17); - snd_soc_update_bits(w->codec, - ARIZONA_OUTPUT_PATH_CONFIG_1L, - ARIZONA_OUT1L_PGA_VOL_MASK, - 0x80); - } break; case ARIZONA_OUT1R_ENA_SHIFT: - if (!(val & ARIZONA_DRE1R_ENA_MASK)) { + if (!(val & ARIZONA_DRE1R_ENA_MASK)) msleep(17); - snd_soc_update_bits(w->codec, - ARIZONA_OUTPUT_PATH_CONFIG_1R, - ARIZONA_OUT1R_PGA_VOL_MASK, - 0x80); - } break; default: From c742ca250c2723bc37aaadbdc7147c5f3affb8fe Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 25 May 2015 14:30:36 +0100 Subject: [PATCH 0825/1167] ASoC: florida: Merge DRE delays into coalesced delay The Florida specific DRE delays that happen in the POST handlers can be merged into the new general coalesced delay. This patch does so. Change-Id: Iccda9325acb1dcbd050784623956ea2b60e387b7 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 96579bab262..2c93fe0765e 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1968,16 +1968,17 @@ static int florida_hp_pre_enable(struct snd_soc_dapm_widget *w) static int florida_hp_post_enable(struct snd_soc_dapm_widget *w) { + struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); switch (w->shift) { case ARIZONA_OUT1L_ENA_SHIFT: if (!(val & ARIZONA_DRE1L_ENA_MASK)) - msleep(10); + priv->out_up_delay += 10; break; case ARIZONA_OUT1R_ENA_SHIFT: if (!(val & ARIZONA_DRE1R_ENA_MASK)) - msleep(10); + priv->out_up_delay += 10; break; default: @@ -2020,16 +2021,17 @@ static int florida_hp_pre_disable(struct snd_soc_dapm_widget *w) static int florida_hp_post_disable(struct snd_soc_dapm_widget *w) { + struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); switch (w->shift) { case ARIZONA_OUT1L_ENA_SHIFT: if (!(val & ARIZONA_DRE1L_ENA_MASK)) - msleep(17); + priv->out_down_delay += 17; break; case ARIZONA_OUT1R_ENA_SHIFT: if (!(val & ARIZONA_DRE1R_ENA_MASK)) - msleep(17); + priv->out_down_delay += 17; break; default: @@ -2384,19 +2386,13 @@ EXPORT_SYMBOL_GPL(arizona_hp_ev); int florida_hp_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { - int ret; - switch (event) { case SND_SOC_DAPM_PRE_PMU: florida_hp_pre_enable(w); break; case SND_SOC_DAPM_POST_PMU: - ret = arizona_hp_ev(w, kcontrol, event); - if (ret < 0) - return ret; - florida_hp_post_enable(w); - return 0; + break; case SND_SOC_DAPM_PRE_PMD: florida_hp_pre_disable(w); break; From 1fd6ab259ccd69e84ebdca135ece2424e9bd78f8 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 15 May 2015 15:48:24 +0100 Subject: [PATCH 0826/1167] ASoC: marley: Fix incorrect noise generator volume range The range of the noise generator gain is 0x0..0x16 Change-Id: I7cec7ff9228d088a620cf8f96a300c3539cb976c Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/marley.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index c8c49d6e2a6..d67628506c7 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -562,7 +562,7 @@ static int marley_adsp_power_ev(struct snd_soc_dapm_widget *w, static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); -static DECLARE_TLV_DB_SCALE(noise_tlv, -11400, 600, 0); +static DECLARE_TLV_DB_SCALE(noise_tlv, -13200, 600, 0); static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); #define MARLEY_NG_SRC(name, base) \ @@ -774,7 +774,7 @@ ARIZONA_MIXER_CONTROLS("DSP3L", ARIZONA_DSP3LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("DSP3R", ARIZONA_DSP3RMIX_INPUT_1_SOURCE), SOC_SINGLE_TLV("Noise Generator Volume", CLEARWATER_COMFORT_NOISE_GENERATOR, - CLEARWATER_NOISE_GEN_GAIN_SHIFT, 0x12, 0, noise_tlv), + CLEARWATER_NOISE_GEN_GAIN_SHIFT, 0x16, 0, noise_tlv), ARIZONA_MIXER_CONTROLS("OUT1L", ARIZONA_OUT1LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("OUT1R", ARIZONA_OUT1RMIX_INPUT_1_SOURCE), From 47d1131e75c51fbb872d011ab015d72eefec092d Mon Sep 17 00:00:00 2001 From: Mayuresh Kulkarni Date: Tue, 2 Jun 2015 17:55:16 +0100 Subject: [PATCH 0827/1167] ASoC: wm_adsp: add GFP_DMA flag to raw DSP capture buffer dsp->raw_capt_buf points to the buffer in which DSP memory contents are read using underlying regmap interface over SPI/I2C. since the controllers of these interfaces can use DMA for transfers internally, this buffer should be allocated from ZONE_DMA of kernel. hence add flag GFP_DMA along with GFP_KERNEL to indicate "allocate DMA able memory and allocation can sleep". Change-Id: I7ee6915e2748a074df3983224b3bd8220e8d7e53 Signed-off-by: Mayuresh Kulkarni --- sound/soc/codecs/wm_adsp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 50947664151..593a6cdbb93 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2957,7 +2957,7 @@ int wm_adsp_stream_alloc(struct wm_adsp *dsp, if (!dsp->raw_capt_buf) { size = WM_ADSP_MAX_READ_SIZE * sizeof(*dsp->raw_capt_buf); - dsp->raw_capt_buf = kzalloc(size, GFP_KERNEL); + dsp->raw_capt_buf = kzalloc(size, GFP_DMA | GFP_KERNEL); if (!dsp->raw_capt_buf) { ret = -ENOMEM; From 0671b89a7284e855fd09d93b9e8a967e428ebfdc Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 28 May 2015 15:02:00 +0100 Subject: [PATCH 0828/1167] ASoC: wm_adsp: Fix race condition in control locking We need to be taking the lock when inspecting the state of 'set' to avoid a race condition with reading and writing the ALSA control. Change-Id: Ia842ccc17a836dc6eff2193a03d26eaa03ca832b Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 37 +++++++++++++++++++------------------ 1 file changed, 19 insertions(+), 18 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 593a6cdbb93..e22f6148dba 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -869,19 +869,19 @@ static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl) static int wm_coeff_init_control_caches(struct wm_adsp *dsp) { struct wm_coeff_ctl *ctl; - int ret; + int ret = 0; list_for_each_entry(ctl, &dsp->ctl_list, list) { - if (!ctl->enabled || ctl->set) - continue; - if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) + if (!ctl->enabled || (ctl->flags & WMFW_CTL_FLAG_VOLATILE)) continue; mutex_lock(&ctl->lock); - ret = wm_coeff_read_control(ctl, - ctl->cache, - ctl->len); + + if (!ctl->set) + ret = wm_coeff_read_control(ctl, ctl->cache, ctl->len); + mutex_unlock(&ctl->lock); + if (ret < 0) return ret; } @@ -892,20 +892,21 @@ static int wm_coeff_init_control_caches(struct wm_adsp *dsp) static int wm_coeff_sync_controls(struct wm_adsp *dsp) { struct wm_coeff_ctl *ctl; - int ret; + int ret = 0; list_for_each_entry(ctl, &dsp->ctl_list, list) { - if (!ctl->enabled) + if (!ctl->enabled || (ctl->flags & WMFW_CTL_FLAG_VOLATILE)) continue; - if (ctl->set && !(ctl->flags & WMFW_CTL_FLAG_VOLATILE)) { - mutex_lock(&ctl->lock); - ret = wm_coeff_write_control(ctl, - ctl->cache, - ctl->len); - mutex_unlock(&ctl->lock); - if (ret < 0) - return ret; - } + + mutex_lock(&ctl->lock); + + if (ctl->set) + ret = wm_coeff_write_control(ctl, ctl->cache, ctl->len); + + mutex_unlock(&ctl->lock); + + if (ret < 0) + return ret; } return 0; From 3b80f66cebfeb1ad2aff28585d033718f43d1183 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 20 Apr 2015 15:58:58 +0100 Subject: [PATCH 0829/1167] ASoC: wm_adsp: Add basic debugfs entries This patch adds some debugfs nodes to get information about the currently running firmware. Change-Id: Idb42b550cdb6c40824fd51d143358ccf7b97bc74 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 9 +- sound/soc/codecs/florida.c | 9 +- sound/soc/codecs/largo.c | 6 + sound/soc/codecs/wm5102.c | 4 + sound/soc/codecs/wm_adsp.c | 228 +++++++++++++++++++++++++++++++++- sound/soc/codecs/wm_adsp.h | 25 +++- 6 files changed, 272 insertions(+), 9 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 200649b8d21..73b8e94ac03 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2903,7 +2903,10 @@ static int clearwater_codec_probe(struct snd_soc_codec *codec) { struct clearwater_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; - int ret; + int i, ret; + + for (i = 0; i < CLEARWATER_NUM_ADSP; i++) + wm_adsp_init_debugfs(&priv->core.adsp[i], codec); codec->control_data = priv->core.arizona->regmap; priv->core.arizona->dapm = &codec->dapm; @@ -2965,6 +2968,10 @@ static int clearwater_codec_remove(struct snd_soc_codec *codec) { struct clearwater_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; + int i; + + for (i = 0; i < CLEARWATER_NUM_ADSP; i++) + wm_adsp_cleanup_debugfs(&priv->core.adsp[i]); irq_set_irq_wake(arizona->irq, 0); arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 62c3cb409c5..3713ce6c46b 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2140,7 +2140,10 @@ static int florida_codec_probe(struct snd_soc_codec *codec) { struct florida_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; - int ret; + int i, ret; + + for (i = 0; i < FLORIDA_NUM_ADSP; i++) + wm_adsp_init_debugfs(&priv->core.adsp[i], codec); codec->control_data = priv->core.arizona->regmap; priv->core.arizona->dapm = &codec->dapm; @@ -2198,6 +2201,10 @@ static int florida_codec_remove(struct snd_soc_codec *codec) { struct florida_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; + int i; + + for (i = 0; i < FLORIDA_NUM_ADSP; i++) + wm_adsp_cleanup_debugfs(&priv->core.adsp[i]); irq_set_irq_wake(arizona->irq, 0); arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index 1b8dce06f80..f7682b5254d 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -1335,6 +1335,9 @@ static int largo_codec_probe(struct snd_soc_codec *codec) struct arizona *arizona = priv->core.arizona; int ret; + wm_adsp_init_debugfs(&priv->core.adsp[1], codec); + wm_adsp_init_debugfs(&priv->core.adsp[2], codec); + codec->control_data = priv->core.arizona->regmap; priv->core.arizona->dapm = &codec->dapm; @@ -1392,6 +1395,9 @@ static int largo_codec_remove(struct snd_soc_codec *codec) struct largo_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; + wm_adsp_cleanup_debugfs(&priv->core.adsp[1]); + wm_adsp_cleanup_debugfs(&priv->core.adsp[2]); + irq_set_irq_wake(arizona->irq, 0); arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 3cf4801b64f..7492af87829 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1918,6 +1918,8 @@ static int wm5102_codec_probe(struct snd_soc_codec *codec) struct arizona *arizona = priv->core.arizona; int ret; + wm_adsp_init_debugfs(&priv->core.adsp[0], codec); + codec->control_data = priv->core.arizona->regmap; ret = snd_soc_codec_set_cache_io(codec, 32, 16, SND_SOC_REGMAP); @@ -1966,6 +1968,8 @@ static int wm5102_codec_remove(struct snd_soc_codec *codec) struct wm5102_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; + wm_adsp_cleanup_debugfs(&priv->core.adsp[0]); + irq_set_irq_wake(arizona->irq, 0); arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index e22f6148dba..9714d51b5ab 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -455,6 +456,21 @@ struct wm_coeff_ctl { struct mutex lock; }; +#ifdef CONFIG_DEBUG_FS +static void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, const char *s); +static void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, const char *s); +#else +static inline void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, + const char *s) +{ +} + +static inline void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, + const char *s) +{ +} +#endif + static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { @@ -1506,6 +1522,8 @@ static int wm_adsp_load(struct wm_adsp *dsp) adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", file, regions, pos - firmware->size); + wm_adsp_debugfs_save_wmfwname(dsp, file); + out_buf: wm_adsp_buf_free(&buf_list); out_fw: @@ -1620,11 +1638,12 @@ static int wm_adsp1_setup_algs(struct wm_adsp *dsp) n_algs = be32_to_cpu(adsp1_id.n_algs); dsp->fw_id = be32_to_cpu(adsp1_id.fw.id); + dsp->fw_id_version = be32_to_cpu(adsp1_id.fw.ver); adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n", dsp->fw_id, - (be32_to_cpu(adsp1_id.fw.ver) & 0xff0000) >> 16, - (be32_to_cpu(adsp1_id.fw.ver) & 0xff00) >> 8, - be32_to_cpu(adsp1_id.fw.ver) & 0xff, + (dsp->fw_id_version & 0xff0000) >> 16, + (dsp->fw_id_version & 0xff00) >> 8, + dsp->fw_id_version & 0xff, n_algs); alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM, @@ -1723,11 +1742,12 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) n_algs = be32_to_cpu(adsp2_id.n_algs); dsp->fw_id = be32_to_cpu(adsp2_id.fw.id); + dsp->fw_id_version = be32_to_cpu(adsp2_id.fw.ver); adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n", dsp->fw_id, - (be32_to_cpu(adsp2_id.fw.ver) & 0xff0000) >> 16, - (be32_to_cpu(adsp2_id.fw.ver) & 0xff00) >> 8, - be32_to_cpu(adsp2_id.fw.ver) & 0xff, + (dsp->fw_id_version & 0xff0000) >> 16, + (dsp->fw_id_version & 0xff00) >> 8, + dsp->fw_id_version & 0xff, n_algs); alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM, @@ -2010,6 +2030,8 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", file, blocks, pos - firmware->size); + wm_adsp_debugfs_save_binname(dsp, file); + out_async: err = regmap_async_complete(regmap); if (err != 0) { @@ -2397,6 +2419,9 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, dsp->running = false; + wm_adsp_debugfs_save_wmfwname(dsp, NULL); + wm_adsp_debugfs_save_binname(dsp, NULL); + switch (dsp->rev) { case 0: regmap_update_bits(dsp->regmap, @@ -3204,4 +3229,195 @@ int wm_adsp_stream_avail(const struct wm_adsp *dsp) } EXPORT_SYMBOL_GPL(wm_adsp_stream_avail); +#ifdef CONFIG_DEBUG_FS +static void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, const char *s) +{ + kfree(dsp->wmfw_file_loaded); + /* kstrdup returns NULL if (s == NULL) */ + dsp->wmfw_file_loaded = kstrdup(s, GFP_KERNEL); +} + +static void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, const char *s) +{ + kfree(dsp->bin_file_loaded); + dsp->bin_file_loaded = kstrdup(s, GFP_KERNEL); +} + +static ssize_t wm_adsp_debugfs_string_read(struct wm_adsp *dsp, + char __user *user_buf, + size_t count, loff_t *ppos, + const char *string) +{ + char *temp; + int len; + ssize_t ret; + + if (!string || !dsp->running) + return 0; + + temp = kmalloc(PAGE_SIZE, GFP_KERNEL); + if (!temp) + return -ENOMEM; + + len = snprintf(temp, PAGE_SIZE, "%s\n", string); + ret = simple_read_from_buffer(user_buf, count, ppos, temp, len); + kfree(temp); + return ret; +} + +static ssize_t wm_adsp_debugfs_x32_read(struct wm_adsp *dsp, + char __user *user_buf, + size_t count, loff_t *ppos, + int value) +{ + char temp[12]; + int len; + + if (!dsp->running) + return 0; + + len = snprintf(temp, sizeof(temp), "0x%06x\n", value); + return simple_read_from_buffer(user_buf, count, ppos, temp, len); +} + +static ssize_t wm_adsp_debugfs_running_read(struct file *file, + char __user *user_buf, + size_t count, loff_t *ppos) +{ + struct wm_adsp *dsp = file->private_data; + char temp[2]; + + temp[0] = dsp->running ? 'Y' : 'N'; + temp[1] = '\n'; + + return simple_read_from_buffer(user_buf, count, ppos, temp, 2); +} + +static ssize_t wm_adsp_debugfs_wmfw_read(struct file *file, + char __user *user_buf, + size_t count, loff_t *ppos) +{ + struct wm_adsp *dsp = file->private_data; + + return wm_adsp_debugfs_string_read(dsp, user_buf, count, ppos, + dsp->wmfw_file_loaded); +} + +static ssize_t wm_adsp_debugfs_bin_read(struct file *file, + char __user *user_buf, + size_t count, loff_t *ppos) +{ + struct wm_adsp *dsp = file->private_data; + + return wm_adsp_debugfs_string_read(dsp, user_buf, count, ppos, + dsp->bin_file_loaded); +} + +static ssize_t wm_adsp_debugfs_fwid_read(struct file *file, + char __user *user_buf, + size_t count, loff_t *ppos) +{ + struct wm_adsp *dsp = file->private_data; + + return wm_adsp_debugfs_x32_read(dsp, user_buf, count, ppos, + dsp->fw_id); +} + +static ssize_t wm_adsp_debugfs_fwver_read(struct file *file, + char __user *user_buf, + size_t count, loff_t *ppos) +{ + struct wm_adsp *dsp = file->private_data; + + return wm_adsp_debugfs_x32_read(dsp, user_buf, count, ppos, + dsp->fw_id_version); +} + +static const struct { + const char *name; + const struct file_operations fops; +} wm_adsp_debugfs_fops[] = { + { + .name = "running", + .fops = { + .open = simple_open, + .read = wm_adsp_debugfs_running_read, + }, + }, + { + .name = "wmfw_file", + .fops = { + .open = simple_open, + .read = wm_adsp_debugfs_wmfw_read, + }, + }, + { + .name = "bin_file", + .fops = { + .open = simple_open, + .read = wm_adsp_debugfs_bin_read, + }, + }, + { + .name = "fw_id", + .fops = { + .open = simple_open, + .read = wm_adsp_debugfs_fwid_read, + }, + }, + { + .name = "fw_version", + .fops = { + .open = simple_open, + .read = wm_adsp_debugfs_fwver_read, + }, + }, +}; + +void wm_adsp_init_debugfs(struct wm_adsp *dsp, struct snd_soc_codec *codec) +{ + struct dentry *root = NULL; + char *root_name; + int i; + + if (!codec->debugfs_codec_root) { + adsp_err(dsp, "No codec debugfs root\n"); + goto err; + } + + root_name = kmalloc(PAGE_SIZE, GFP_KERNEL); + if (!root_name) + goto err; + + snprintf(root_name, PAGE_SIZE, "dsp%d", dsp->num); + root = debugfs_create_dir(root_name, codec->debugfs_codec_root); + kfree(root_name); + + if (!root) + goto err; + + for (i = 0; i < ARRAY_SIZE(wm_adsp_debugfs_fops); ++i) { + if (!debugfs_create_file(wm_adsp_debugfs_fops[i].name, + S_IRUGO, root, dsp, + &wm_adsp_debugfs_fops[i].fops)) + goto err; + } + + dsp->debugfs_root = root; + return; + +err: + debugfs_remove_recursive(root); + adsp_err(dsp, "Failed to create debugfs\n"); +} +EXPORT_SYMBOL_GPL(wm_adsp_init_debugfs); + + +void wm_adsp_cleanup_debugfs(struct wm_adsp *dsp) +{ + debugfs_remove_recursive(dsp->debugfs_root); +} +EXPORT_SYMBOL_GPL(wm_adsp_cleanup_debugfs); +#endif + MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 2bdd3a8b903..d8568ff60e0 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -89,13 +89,14 @@ struct wm_adsp { struct list_head alg_regions; int fw_id; + int fw_id_version; const struct wm_adsp_region *mem; int num_mems; int fw; int fw_ver; - bool running; + u32 running; struct mutex ctl_lock; struct list_head ctl_list; @@ -118,6 +119,13 @@ struct wm_adsp { struct mutex *fw_lock; struct work_struct boot_work; + +#ifdef CONFIG_DEBUG_FS + struct dentry *debugfs_root; + char *wmfw_file_loaded; + char *bin_file_loaded; +#endif + }; #define WM_ADSP1(wname, num) \ @@ -139,6 +147,21 @@ extern const struct snd_kcontrol_new wm_adsp2v2_fw_controls[]; int wm_adsp1_init(struct wm_adsp *dsp); int wm_adsp2_init(struct wm_adsp *dsp, struct mutex *fw_lock); + +#ifdef CONFIG_DEBUG_FS +void wm_adsp_init_debugfs(struct wm_adsp *dsp, struct snd_soc_codec *codec); +void wm_adsp_cleanup_debugfs(struct wm_adsp *dsp); +#else +static inline void wm_adsp_init_debugfs(struct wm_adsp *dsp, + struct snd_soc_codec *codec) +{ +} + +void wm_adsp_cleanup_debugfs(struct wm_adsp *dsp) +{ +} +#endif + int wm_adsp1_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); From aa5c68214b4e2151fcbeff5bcd12a3596f6e5c7b Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Fri, 5 Jun 2015 14:03:14 +0100 Subject: [PATCH 0830/1167] ASoC: marley: adding supported firmware features Change-Id: Id60d3bca4d1197d0f824d01900e7285b12fd9563 Signed-off-by: Piotr Stankiewicz --- sound/soc/codecs/marley.c | 2 +- sound/soc/codecs/wm_adsp.c | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index d67628506c7..8a1a16e1178 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -1818,7 +1818,7 @@ static irqreturn_t adsp2_irq(int irq, void *data) mutex_lock(&marley->compr_info.lock); if (!marley->compr_info.trig && - marley->core.adsp[2].fw_id == 0x8000d && + marley->core.adsp[2].fw_features.ez2control_trigger && marley->core.adsp[2].running) { if (marley->core.arizona->pdata.ez2ctrl_trigger) marley->core.arizona->pdata.ez2ctrl_trigger(); diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 9714d51b5ab..c74afe96f43 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2066,6 +2066,8 @@ static int wm_adsp_get_features(struct wm_adsp *dsp) case 0x5f003: case 0x7000d: case 0x70036: + case 0x8000d: + case 0x80053: dsp->fw_features.ez2control_trigger = true; break; case 0x40019: From abc24299f9f8deb383e315d7408af398f1c86c5f Mon Sep 17 00:00:00 2001 From: Paul Handrigan Date: Fri, 5 Jun 2015 10:26:17 -0500 Subject: [PATCH 0831/1167] ASoC: arizona: Add break into anc_ev. Add in a missing break into the case statement. Change-Id: I2c88120e7c97c18f3ec12ff6205c734ff4318169 Signed-off-by: Paul Handrigan --- sound/soc/codecs/arizona.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 2c93fe0765e..e1592bd68b0 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2446,6 +2446,7 @@ int arizona_anc_ev(struct snd_soc_dapm_widget *w, break; case SND_SOC_DAPM_PRE_PMD: val = 1 << (w->shift + 1); + break; default: return 0; } From 5560ed3ec615109bb86936ff9efd1e2f6f0aa893 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 23 Jan 2015 15:42:25 +0000 Subject: [PATCH 0832/1167] ASoC: wm_adsp: Add fw id for clearwater Ez2Control Change-Id: I71db089a3f20353edb5e2573b386d92fd5b45398 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index c74afe96f43..632c65f667b 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2064,6 +2064,8 @@ static int wm_adsp_get_features(struct wm_adsp *dsp) case 0x4000d: case 0x40036: case 0x5f003: + case 0x6000d: + case 0x60037: case 0x7000d: case 0x70036: case 0x8000d: From f689a4944405d62c25986f89c4c0da419f2e5d4a Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 23 Jan 2015 15:49:39 +0000 Subject: [PATCH 0833/1167] ASoC: clearwater: use features flag to check for voice trigger support Use the flag instead of hardcoding a firmware id check into the IRQ handler Change-Id: If37ca3e6ac1f90ca7e86d947b2df33cb17cd0546 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 73b8e94ac03..a4d35daa8c9 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2671,7 +2671,7 @@ static irqreturn_t adsp2_irq(int irq, void *data) mutex_lock(&clearwater->compr_info.lock); if (!clearwater->compr_info.trig && - clearwater->core.adsp[5].fw_id == 0x6000d && + clearwater->core.adsp[5].fw_features.ez2control_trigger && clearwater->core.adsp[5].running) { if (clearwater->core.arizona->pdata.ez2ctrl_trigger) clearwater->core.arizona->pdata.ez2ctrl_trigger(); From 451c4d3d8a9d90136d5e7af2a910a46d0fc71c2a Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Tue, 9 Jun 2015 18:46:44 +0100 Subject: [PATCH 0834/1167] mfd: arizona: Add support for hs-mic DT entry Add support for specifying which is the hs-mic, in order to mute it during a button press in the cases where this causes excessive TX TDMA noise being transmitted. Change-Id: I1b7f724dc953e33af6e6d195c267bf597ef5e501 Signed-off-by: Nariman Poushin --- Documentation/devicetree/bindings/mfd/arizona.txt | 2 ++ include/linux/mfd/arizona/pdata.h | 6 ++++++ 2 files changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 5d7da3bfccd..2c5bb36fd16 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -83,6 +83,8 @@ Optional properties: - wlf,init-mic-delay : Adds a delay in milliseconds between jack detection and beginning ramp of MICBIAS. - wlf,micd-clamp-mode: Specifies the logic of the micdetect clamp block + - wlf,hs-mic: Specify an input to mute during headset button presses and + jack removal: 1 - IN1L, 2 - IN1R, ..., n - IN[n]R - wlf,micbias1 : Configuration for the micbias regulator, should include 5 cells. diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 78a6c2d16c2..e218c81caf8 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -294,6 +294,12 @@ struct arizona_pdata { /** Load firmwares for specific chip revisions */ bool rev_specific_fw; + + /** + * Specify an input to mute during headset button presses and jack + * removal: 1 - IN1L, 2 - IN1R, ..., n - IN[n]R + */ + unsigned int hs_mic; }; #endif From c0ff2b4da8f92c037ea8d1db5b101077389467b4 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Tue, 9 Jun 2015 18:47:37 +0100 Subject: [PATCH 0835/1167] switch: arizona: Mute mic on button or jack removal if hs-mic is set If hs mic is set, mute the headset mic on button presses and jack removal to avoid excess TX TDMA noise during certain network conditions Change-Id: Idab94b55a6124eb333704cc2d0599a64beb79e00 Signed-off-by: Nariman Poushin --- drivers/switch/switch-arizona.c | 48 +++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 7f031d02ae3..47784a00f2c 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -69,6 +69,9 @@ #define HP_LOW_IMPEDANCE_LIMIT 13 +#define ARIZONA_MIC_MUTE 1 +#define ARIZONA_MIC_UNMUTE 0 + struct arizona_hpdet_calibration_data { int min; int max; @@ -938,6 +941,37 @@ static const struct reg_default clearwater_normal_impedance_patch[] = { { 0x483, 0x0023 }, }; +static void arizona_hs_mic_control(struct arizona *arizona, int state) +{ + unsigned int addr = ARIZONA_ADC_DIGITAL_VOLUME_1L; + int val; + + if (!arizona->pdata.hs_mic) + return; + + addr += (arizona->pdata.hs_mic - 1) * 4; + + switch (state) { + case ARIZONA_MIC_MUTE: + dev_dbg(arizona->dev, "Mute headset mic: 0x%04x\n", + addr); + val = ARIZONA_MIC_MUTE; + break; + case ARIZONA_MIC_UNMUTE: + dev_dbg(arizona->dev, "Unmute headset mic: 0x%04x\n", + addr); + val = ARIZONA_MIC_UNMUTE; + break; + default: + dev_err(arizona->dev, + "Unknown headset mic control state: %d\n", state); + return; + } + + val <<= ARIZONA_IN1L_MUTE_SHIFT; + regmap_update_bits(arizona->regmap, addr, ARIZONA_IN1L_MUTE_MASK, val); +} + static int arizona_wm5110_tune_headphone(struct arizona_extcon_info *info, int reading) { @@ -1488,6 +1522,8 @@ static int arizona_micd_button_process(struct arizona_extcon_info *info, "Button level %u out of range\n", val); } else { dev_dbg(arizona->dev, "Mic button released\n"); + arizona_hs_mic_control(arizona, ARIZONA_MIC_UNMUTE); + for (i = 0; i < info->num_micd_ranges; i++) input_report_key(info->input, info->micd_ranges[i].key, 0); @@ -1980,6 +2016,9 @@ int arizona_micd_mic_reading(struct arizona_extcon_info *info, int val) if (val >= MICROPHONE_MIN_OHM) { dev_dbg(arizona->dev, "Detected headset\n"); info->mic = true; + + arizona_hs_mic_control(arizona, ARIZONA_MIC_UNMUTE); + goto done; } @@ -2318,6 +2357,8 @@ static void arizona_micd_handler(struct work_struct *work) if (arizona_jack_present(info, NULL) <= 0) goto spurious; + arizona_hs_mic_control(arizona, ARIZONA_MIC_MUTE); + switch (arizona_jds_get_mode(info)) { case ARIZONA_ACCDET_MODE_MIC: ret = arizona_micd_read(info); @@ -2659,6 +2700,8 @@ static irqreturn_t arizona_jackdet(int irq, void *data) } else { dev_dbg(arizona->dev, "Detected jack removal\n"); + arizona_hs_mic_control(arizona, ARIZONA_MIC_MUTE); + info->num_hpdet_res = 0; for (i = 0; i < ARRAY_SIZE(info->hpdet_res); i++) info->hpdet_res[i] = 0; @@ -2871,6 +2914,11 @@ static int arizona_extcon_of_get_pdata(struct arizona *arizona) arizona_of_read_u32(arizona, "wlf,micd-clamp-mode", false, &pdata->micd_clamp_mode); + arizona_of_read_u32(arizona, "wlf,hs-mic", false, + &pdata->hs_mic); + if (pdata->hs_mic > ARIZONA_MAX_INPUT) + pdata->hs_mic = 0; + return 0; } #else From 000a31d1e4976fa8f383b43b4b6986a92ebe5ad8 Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Fri, 12 Jun 2015 09:11:35 +0100 Subject: [PATCH 0836/1167] ASoC: marley: initialize debugfs entries for DSP cores Change-Id: Iaa5fd0d43f0509e0e55946b1fabc3819c0181bd3 Signed-off-by: Piotr Stankiewicz --- sound/soc/codecs/marley.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index 8a1a16e1178..e80e3899acd 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -2045,7 +2045,10 @@ static int marley_codec_probe(struct snd_soc_codec *codec) { struct marley_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; - int ret; + int i, ret; + + for (i = 0; i < MARLEY_NUM_ADSP; ++i) + wm_adsp_init_debugfs(&priv->core.adsp[i], codec); codec->control_data = priv->core.arizona->regmap; priv->core.arizona->dapm = &codec->dapm; @@ -2107,6 +2110,10 @@ static int marley_codec_remove(struct snd_soc_codec *codec) { struct marley_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; + int i; + + for (i = 0; i < MARLEY_NUM_ADSP; ++i) + wm_adsp_cleanup_debugfs(&priv->core.adsp[i]); irq_set_irq_wake(arizona->irq, 0); arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); From 43aaa30963d4be5de650966dbbe0c3179b42845a Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 12 Jun 2015 18:37:53 +0100 Subject: [PATCH 0837/1167] Revert "mfd: arizona: Add better support for system suspend" This reverts commit e9140bb9ae1b46372440f56f56b4082b95f43a52. Disabling the interrupts from runtime suspend has some non-trivial issues. These need to be investigated, since this patch is of little value in typical systems revert for now. Change-Id: Ied4ae5c8daa146e9b33fb7f762f23d1ec593cd21 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 114 +++++++------------------------ include/linux/mfd/arizona/core.h | 1 - 2 files changed, 25 insertions(+), 90 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index ee44b62e113..d6c6c926194 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -667,31 +667,14 @@ static int arizona_runtime_resume(struct device *dev) { struct arizona *arizona = dev_get_drvdata(dev); int ret; - bool in_reset = false; dev_dbg(arizona->dev, "Leaving AoD mode\n"); - if (arizona->has_fully_powered_off) { - dev_dbg(arizona->dev, "Re-enabling core supplies\n"); - - ret = regulator_bulk_enable(arizona->num_core_supplies, - arizona->core_supplies); - if (ret) { - dev_err(dev, "Failed to enable core supplies: %d\n", - ret); - return ret; - } - - in_reset = true; - } - switch (arizona->type) { case WM5110: case WM8280: - if (arizona->rev == 3) { + if (arizona->rev == 3) arizona_enable_reset(arizona); - in_reset = true; - } break; case WM5102: case WM8997: @@ -701,30 +684,17 @@ static int arizona_runtime_resume(struct device *dev) case CS47L24: break; default: - if (arizona->external_dcvdd) { + if (arizona->external_dcvdd) arizona_enable_reset(arizona); - in_reset = true; - } break; }; ret = regulator_enable(arizona->dcvdd); if (ret != 0) { dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); - if (arizona->has_fully_powered_off) - regulator_bulk_disable(arizona->num_core_supplies, - arizona->core_supplies); return ret; } - if (in_reset) - arizona_disable_reset(arizona); - - if (arizona->has_fully_powered_off) { - enable_irq(arizona->irq); - arizona->has_fully_powered_off = false; - } - regcache_cache_only(arizona->regmap, false); switch (arizona->type) { @@ -762,6 +732,8 @@ static int arizona_runtime_resume(struct device *dev) ret = arizona_soft_reset(arizona); if (ret != 0) goto err; + } else { + arizona_disable_reset(arizona); } } @@ -793,14 +765,6 @@ static int arizona_runtime_resume(struct device *dev) goto err; } } - - ret = wm5110_apply_sleep_patch(arizona); - if (ret) { - dev_err(arizona->dev, - "Failed to re-apply sleep patch: %d\n", - ret); - goto err; - } break; case WM8997: case WM8998: @@ -824,6 +788,9 @@ static int arizona_runtime_resume(struct device *dev) } break; default: + if (arizona->external_dcvdd) + arizona_disable_reset(arizona); + ret = arizona_wait_for_boot(arizona); if (ret != 0) { goto err; @@ -874,17 +841,10 @@ static int arizona_runtime_resume(struct device *dev) static int arizona_runtime_suspend(struct device *dev) { struct arizona *arizona = dev_get_drvdata(dev); - unsigned int val; int ret; dev_dbg(arizona->dev, "Entering AoD mode\n"); - ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val); - if (ret) { - dev_err(dev, "Failed to check jack det status: %d\n", ret); - return ret; - } - switch(arizona->type) { case WM5102: case WM8997: @@ -923,39 +883,27 @@ static int arizona_runtime_suspend(struct device *dev) default: break; } - } - - switch (arizona->type) { - case WM5110: - case WM8280: - if (arizona->external_dcvdd) - break; - - /* - * As this is only called for the internal regulator - * (where we know voltage ranges available) it is ok - * to request an exact range. - */ - ret = regulator_set_voltage(arizona->dcvdd, 1175000, 1175000); - if (ret < 0) { - dev_err(arizona->dev, - "Failed to set suspend voltage: %d\n", ret); - goto err; - } - break; - case WM5102: - if (!(val & ARIZONA_JD1_ENA)) - ret = regmap_write(arizona->regmap, - ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0); - if (ret) { + } else { + switch (arizona->type) { + case WM5110: + case WM8280: + /* + * As this is only called for the internal regulator + * (where we know voltage ranges available) it is ok + * to request an exact range. + */ + ret = regulator_set_voltage(arizona->dcvdd, + 1175000, 1175000); + if (ret < 0) { dev_err(arizona->dev, - "Failed to clear write sequencer: %d\n", + "Failed to set suspend voltage: %d\n", ret); - return ret; + goto err; } - break; - default: - break; + break; + default: + break; + } } regcache_cache_only(arizona->regmap, true); @@ -964,18 +912,6 @@ static int arizona_runtime_suspend(struct device *dev) regcache_mark_dirty(arizona->regmap_32bit); regulator_disable(arizona->dcvdd); - /* Allow us to completely power down if no jack detection */ - if (!(val & ARIZONA_JD1_ENA)) { - dev_dbg(arizona->dev, "Fully powering off\n"); - - arizona->has_fully_powered_off = true; - - disable_irq(arizona->irq); - arizona_enable_reset(arizona); - regulator_bulk_disable(arizona->num_core_supplies, - arizona->core_supplies); - } - return 0; err: arizona_restore_dvfs(arizona); diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index c59febf4a7d..3d8c1665584 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -132,7 +132,6 @@ struct arizona { struct regulator_bulk_data core_supplies[ARIZONA_MAX_CORE_SUPPLIES]; struct regulator *dcvdd; struct notifier_block dcvdd_notifier; - bool has_fully_powered_off; struct arizona_pdata pdata; From 7c27145198a673fb0e1f00ab12b85e75acfe273b Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Mon, 15 Jun 2015 14:17:23 +0100 Subject: [PATCH 0838/1167] switch: arizona: Make 'present' in arizona_jackdet a signed int The variable 'present' could take -EINVAL as a return value from arizona_jack_present (and is checked against the condition < 0), so make sure it is signed. Change-Id: I7a5dbc7449729e55d0089b7a26a56953f6a31b3d Signed-off-by: Nariman Poushin --- drivers/switch/switch-arizona.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 47784a00f2c..61f9c09b8fa 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -2602,9 +2602,9 @@ static irqreturn_t arizona_jackdet(int irq, void *data) { struct arizona_extcon_info *info = data; struct arizona *arizona = info->arizona; - unsigned int reg, val, present, mask; + unsigned int reg, val, mask; bool cancelled_hp, cancelled_state; - int i; + int i, present; cancelled_hp = cancel_delayed_work_sync(&info->hpdet_work); cancelled_state = arizona_jds_cancel_timeout(info); From 4f73d6f874c365aeb46aecffc9cf9d9801aab57e Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Mon, 15 Jun 2015 14:26:55 +0100 Subject: [PATCH 0839/1167] mfd: arizona: Fix CLEARWATER_OTP_HPDET_GRADIENT_1X_SHIFT This was incorrectly defined as 16, where it should be 8 causing all shifts on 16 bit registers to end up as 0. Change-Id: I9ae8157bd89b6c9ae878509321889817090cd4d5 Signed-off-by: Nariman Poushin --- include/linux/mfd/arizona/registers.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 9b304e51381..82cb201b944 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -12365,7 +12365,7 @@ */ #define CLEARWATER_OTP_HPDET_GRADIENT_1X 0xFF00 /* HP_GRADIENT_1X - [15:8] */ #define CLEARWATER_OTP_HPDET_GRADIENT_1X_MASK 0xFF00 /* HP_GRADIENT_1X - [15:8] */ -#define CLEARWATER_OTP_HPDET_GRADIENT_1X_SHIFT 16 /* HP_GRADIENT_1X - [15:8] */ +#define CLEARWATER_OTP_HPDET_GRADIENT_1X_SHIFT 8 /* HP_GRADIENT_1X - [15:8] */ #define CLEARWATER_OTP_HPDET_GRADIENT_1X_WIDTH 8 /* HP_GRADIENT_1X - [15:8] */ #define CLEARWATER_OTP_HPDET_GRADIENT_0X 0x00FF /* HP_GRADIENT_0X - [7:0] */ #define CLEARWATER_OTP_HPDET_GRADIENT_0X_MASK 0x00FF /* HP_GRADIENT_0X - [7:0] */ From 342ae117bf3e1bf237de65c392bcbfc74e935517 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 16 Jun 2015 09:14:02 +0100 Subject: [PATCH 0840/1167] switch: arizona: check range of hp_imp_range_[hi/lo] hp_imp_range_[hi/lo] are used as array indices so they must be unsigned and hp_imp_range_lo must be less than hp_imp_range_hi and its minimum value is restricted to zero Change-Id: Ife32721b03514d5e4382ebc408151a58e794f6c8 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 33 +++++++++++++++++++-------------- 1 file changed, 19 insertions(+), 14 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 61f9c09b8fa..0e50b738117 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1697,9 +1697,9 @@ static int arizona_antenna_remove_reading(struct arizona_extcon_info *info, static int arizona_add_micd_levels(struct arizona_extcon_info *info); -static int arizona_antenna_get_micd_level(int imp, int range) +static unsigned int arizona_antenna_get_micd_level(int imp, int range) { - int micd_lvl; + unsigned int micd_lvl; int impd_lvl; impd_lvl = imp + range; @@ -1710,9 +1710,6 @@ static int arizona_antenna_get_micd_level(int imp, int range) break; } - if (micd_lvl == ARIZONA_NUM_MICD_BUTTON_LEVELS) - return -EINVAL; - return micd_lvl; } @@ -1721,7 +1718,9 @@ static int arizona_antenna_add_micd_level(struct arizona_extcon_info *info, int struct arizona *arizona = info->arizona; struct arizona_pdata *pdata = &arizona->pdata; int i, j, micd_lvl; - int hp_imp_range_lo = -1, hp_imp_range_hi = -1, ret = 0; + int ret = 0; + unsigned int hp_imp_range_lo = ARIZONA_NUM_MICD_BUTTON_LEVELS; + unsigned int hp_imp_range_hi = ARIZONA_NUM_MICD_BUTTON_LEVELS; /* check if additional impedance levels can be added */ if (info->num_micd_ranges + 2 > ARIZONA_MAX_MICD_RANGE) { @@ -1752,9 +1751,13 @@ static int arizona_antenna_add_micd_level(struct arizona_extcon_info *info, int -(pdata->antenna_hp_imp_range_lo)); } - if (hp_imp_range_lo < 0 || hp_imp_range_hi < 0) { + if (hp_imp_range_lo == ARIZONA_NUM_MICD_BUTTON_LEVELS || + hp_imp_range_hi == ARIZONA_NUM_MICD_BUTTON_LEVELS) { hp_imp_range_hi = arizona_antenna_get_micd_level(imp, 0); - hp_imp_range_lo = hp_imp_range_hi - 2; + if (hp_imp_range_hi - 2 > hp_imp_range_hi) + hp_imp_range_lo = 0; + else + hp_imp_range_lo = hp_imp_range_hi - 2; } /* find index to insert an impedance level */ @@ -1771,10 +1774,11 @@ static int arizona_antenna_add_micd_level(struct arizona_extcon_info *info, int } if (hp_imp_range_lo == hp_imp_range_hi) { - if (i == 0) + if ((hp_imp_range_hi != 0) && (i == 0)) hp_imp_range_lo = hp_imp_range_hi - 1; - else if (info->micd_ranges[i-1].max < - arizona_micd_levels[hp_imp_range_hi - 1]) + else if ((hp_imp_range_hi != 0) && + (info->micd_ranges[i-1].max < + arizona_micd_levels[hp_imp_range_hi - 1])) hp_imp_range_lo = hp_imp_range_hi - 1; else { dev_info(arizona->dev, "MICD level range cannot be added %d\n", @@ -1839,7 +1843,8 @@ static int arizona_antenna_button_start(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; struct arizona_pdata *pdata = &arizona->pdata; - int i, micd_lvl; + int i; + unsigned int micd_lvl = ARIZONA_NUM_MICD_BUTTON_LEVELS; int hp_imp_range_hi = -1; info->button_impedance = 0; @@ -1849,14 +1854,14 @@ static int arizona_antenna_button_start(struct arizona_extcon_info *info) /* check if impedance level is supported */ micd_lvl = arizona_antenna_get_micd_level(arizona->hp_impedance, 0); - if (micd_lvl < 0) + if (micd_lvl == ARIZONA_NUM_MICD_BUTTON_LEVELS) goto micd_start; if (pdata->antenna_hp_imp_range_hi) hp_imp_range_hi = arizona_antenna_get_micd_level(arizona->hp_impedance, pdata->antenna_hp_imp_range_hi); - if (hp_imp_range_hi < 0) + if (hp_imp_range_hi == ARIZONA_NUM_MICD_BUTTON_LEVELS) hp_imp_range_hi = micd_lvl; for (i = 0; i < info->num_micd_ranges; i++) { From 1b6f635edb1125f44e2c114073322588e2dc19ff Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 15 Jun 2015 18:15:52 +0100 Subject: [PATCH 0841/1167] ASoC: arizona: Avoid pseudo-fractional mode for 22.5MHz > 90.3MHz Change-Id: Iaf83e0c35077ac32bdb807123e917b89c2e293b8 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index e1592bd68b0..dfb4276d778 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -3599,6 +3599,9 @@ static int arizona_calc_fratio(struct arizona_fll *fll, return init_ratio; break; default: + if (Fref == 11289600 && target == 90316800) + return init_ratio; + if (sync) return init_ratio; } From 2f87dda2242e2f5c483589dbd712247d5d36cc04 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 17 Jun 2015 15:57:35 +0100 Subject: [PATCH 0842/1167] switch: arizona: Trap spurious state timeouts If the state timeout handler expires during a state that does not have a timeout handler or during idle, log a warning. Change-Id: I937c1df313578dc6ca7d680e15a08828ae4f08e0 Signed-off-by: Richard Fitzgerald --- drivers/switch/switch-arizona.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 0e50b738117..5390aa8b3a1 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -269,8 +269,15 @@ static void arizona_jds_timeout_work(struct work_struct *work) mutex_lock(&info->lock); - info->state->timeout(info); - arizona_jds_start_timeout(info); + if (!info->state) { + dev_warn(info->arizona->dev, "Spurious timeout in idle state\n"); + } else if (!info->state->timeout) { + dev_warn(info->arizona->dev, "Spurious timeout state.mode=%d\n", + info->state->mode); + } else { + info->state->timeout(info); + arizona_jds_start_timeout(info); + } mutex_unlock(&info->lock); } From 17103a0c7a72844e23df25d2ef80886a20855ccc Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Mon, 22 Jun 2015 15:06:55 +0100 Subject: [PATCH 0843/1167] switch: arizona: Make all instances of hp_imp_range are unsigned Change-Id: I86716c1c6d3c2dc84150a6cafbb00e990cc576e7 Signed-off-by: Nariman Poushin --- drivers/switch/switch-arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 5390aa8b3a1..f2778a338f4 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1852,7 +1852,7 @@ static int arizona_antenna_button_start(struct arizona_extcon_info *info) struct arizona_pdata *pdata = &arizona->pdata; int i; unsigned int micd_lvl = ARIZONA_NUM_MICD_BUTTON_LEVELS; - int hp_imp_range_hi = -1; + unsigned int hp_imp_range_hi = ARIZONA_NUM_MICD_BUTTON_LEVELS; info->button_impedance = 0; info->button_check = 0; From af8124d2fd7c21a9a063ff5bbe4f454235b9a538 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Tue, 23 Jun 2015 14:22:55 +0100 Subject: [PATCH 0844/1167] mfd: clearwater: Add default for ARIZONA_INPUT_ENABLES Change-Id: Icc637357673dc86d294b80d6f0c26620f6c79925 Signed-off-by: Nariman Poushin --- drivers/mfd/clearwater-tables.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index 0cb017bd911..be37d6051c7 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -558,6 +558,7 @@ static const struct reg_default clearwater_reg_default[] = { { 0x000002c6, 0x0010 }, { 0x000002c8, 0x0000 }, /* R712 (0x2C8) - GP switch 1 */ { 0x000002d3, 0x0000 }, /* R723 (0x2D3) - Jack detect analogue */ + { 0x00000300, 0x0000 }, /* R768 - Input Enables */ { 0x00000308, 0x0000 }, /* R776 (0x308) - Input Rate */ { 0x00000309, 0x0022 }, /* R777 (0x309) - Input Volume Ramp */ { 0x0000030c, 0x0002 }, /* R780 (0x30C) - HPF Control */ From 6e4c1cec92bc60389cc247f5d6bfffdd2cd2941c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 23 Jun 2015 09:30:35 +0100 Subject: [PATCH 0845/1167] regulator: arizona-micsupp: Always add CHANGE_BYPASS to DT init_data When reading the init_data from device tree the 3.10 kernel doesn't support REGULATOR_CHANGE_BYPASS. As there are few sensible use-cases for not having this simply add the flag to valid_ops_mask after reading the init_data from DT. Change-Id: I367d80739dd01480638e69d214c7a2fc550cb560 Signed-off-by: Charles Keepax --- drivers/regulator/arizona-micsupp.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/regulator/arizona-micsupp.c b/drivers/regulator/arizona-micsupp.c index 933caa9139c..0a1d48823f1 100644 --- a/drivers/regulator/arizona-micsupp.c +++ b/drivers/regulator/arizona-micsupp.c @@ -254,6 +254,9 @@ static int arizona_micsupp_of_get_pdata(struct arizona *arizona, init_data->consumer_supplies = &micsupp->supply; init_data->num_consumer_supplies = 1; + init_data->constraints.valid_ops_mask |= + REGULATOR_CHANGE_BYPASS; + pdata->micvdd = init_data; } } From 9122c206241d05570f354d4c2582b71529777cc5 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 30 Jun 2015 14:19:53 +0100 Subject: [PATCH 0846/1167] mfd: clearwater: Make INTERRUPT_DEBOUNCE_7 readable Jack detect debounce is controlled on Clearwater by INTERRUPT_DEBOUNCE_7 so make this readable and remove the old ARIZONA_JACK_DETECT_DEBOUNCE. Change-Id: I2378ca7408773db4a9a640b454f38445fd062d95 Signed-off-by: Richard Fitzgerald --- drivers/mfd/clearwater-tables.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index be37d6051c7..8903e4ac49e 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -1841,6 +1841,7 @@ static const struct reg_default clearwater_reg_default[] = { { 0x0000184D, 0xFFFF }, /* R6221 - IRQ1 Mask 14 */ { 0x0000184E, 0xFFFF }, /* R6222 - IRQ1 Mask 15 */ { 0x00001948, 0xFFFF }, /* R6472 - IRQ2 Mask 9 */ + { 0x00001A06, 0x0000 }, /* R6662 - Interrupt Debounce 7 */ { 0x00001A80, 0x4400 }, /* R6784 - IRQ1 CTRL */ }; @@ -2847,7 +2848,6 @@ static bool clearwater_16bit_readable_register(struct device *dev, unsigned int case CLEARWATER_DSP7AUX4MIX_INPUT_1_SOURCE: case CLEARWATER_DSP7AUX5MIX_INPUT_1_SOURCE: case CLEARWATER_DSP7AUX6MIX_INPUT_1_SOURCE: - case ARIZONA_JACK_DETECT_DEBOUNCE: case ARIZONA_FX_CTRL1: case ARIZONA_FX_CTRL2: case ARIZONA_EQ1_1: @@ -3186,6 +3186,7 @@ static bool clearwater_16bit_readable_register(struct device *dev, unsigned int case CLEARWATER_IRQ2_STATUS_9: case CLEARWATER_IRQ2_MASK_9: case CLEARWATER_IRQ2_RAW_STATUS_9: + case CLEARWATER_INTERRUPT_DEBOUNCE_7: case CLEARWATER_IRQ1_CTRL: return true; default: From 47b719761cfdc61a269a42b89a33ec87dade48ea Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 30 Jun 2015 14:25:46 +0100 Subject: [PATCH 0847/1167] mfd: marley: Make INTERRUPT_DEBOUNCE_7 readable Jack detect debounce is controlled on Marley by INTERRUPT_DEBOUNCE_7 so make this readable. Change-Id: Ifc99ce1e56e56e2bde6e5698f70f45df24cbc5ca Signed-off-by: Richard Fitzgerald --- drivers/mfd/marley-tables.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mfd/marley-tables.c b/drivers/mfd/marley-tables.c index 5b277b8ba4f..8a6b7f953c6 100644 --- a/drivers/mfd/marley-tables.c +++ b/drivers/mfd/marley-tables.c @@ -841,6 +841,7 @@ static const struct reg_default marley_reg_default[] = { { 0x0000184d, 0xffff }, /* R6221 (0x184d) - IRQ1 Mask 14 */ { 0x0000184e, 0xffff }, /* R6222 (0x184e) - IRQ1 Mask 15 */ { 0x00001948, 0xffff }, /* R6472 (0x1948) - IRQ2 Mask 9 */ + { 0x00001A06, 0x0000 }, /* R6662 (0x1a06) - Interrupt Debounce 7 */ { 0x00001a80, 0x4400 }, /* R6784 (0x1a80) - IRQ1 CTRL */ }; @@ -1678,6 +1679,7 @@ static bool marley_16bit_readable_register(struct device *dev, unsigned int reg) case CLEARWATER_IRQ2_STATUS_9: case CLEARWATER_IRQ2_MASK_9: case CLEARWATER_IRQ2_RAW_STATUS_9: + case CLEARWATER_INTERRUPT_DEBOUNCE_7: case CLEARWATER_IRQ1_CTRL: return true; default: From afefbdd634a03ed65da6d0fb739bd8949c3e1351 Mon Sep 17 00:00:00 2001 From: Simon Trimmer Date: Sun, 28 Jun 2015 20:27:36 +0100 Subject: [PATCH 0848/1167] ASoc: wm_adsp: Add debugfs entry for host buffer error field This patch adds a "error" node in a "buffer0" subdirectory in debugfs that reads the error field of the host buffer of a running DSP. Change-Id: I9d5451a1fafde2ace3f768d0e34ece0bee8687f9 Signed-off-by: Simon Trimmer --- sound/soc/codecs/wm_adsp.c | 47 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 632c65f667b..5ccba55ec79 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3337,6 +3337,39 @@ static ssize_t wm_adsp_debugfs_fwver_read(struct file *file, dsp->fw_id_version); } +static ssize_t wm_adsp_debugfs_buffererror_read(struct file *file, + char __user *user_buf, + size_t count, loff_t *ppos) +{ + struct wm_adsp *dsp = file->private_data; + int ret; + u32 host_buffer_error; + + if (!dsp->card) + return 0; + + mutex_lock(&dsp->card->dapm_mutex); + + if (!dsp->running || !dsp->host_buf_ptr) { + mutex_unlock(&dsp->card->dapm_mutex); + return 0; + } + + ret = wm_adsp_host_buffer_read(dsp, + HOST_BUFFER_FIELD(error), + &host_buffer_error); + + mutex_unlock(&dsp->card->dapm_mutex); + + if (ret < 0) { + adsp_err(dsp, "Failed to read host buffer: %d\n", ret); + return 0; + } + + return wm_adsp_debugfs_x32_read(dsp, user_buf, count, ppos, + host_buffer_error); +} + static const struct { const char *name; const struct file_operations fops; @@ -3378,9 +3411,15 @@ static const struct { }, }; +static const struct file_operations wm_adsp_debugfs_buffererror_fops = { + .open = simple_open, + .read = wm_adsp_debugfs_buffererror_read, +}; + void wm_adsp_init_debugfs(struct wm_adsp *dsp, struct snd_soc_codec *codec) { struct dentry *root = NULL; + struct dentry *buffer_dentry = NULL; char *root_name; int i; @@ -3407,6 +3446,14 @@ void wm_adsp_init_debugfs(struct wm_adsp *dsp, struct snd_soc_codec *codec) goto err; } + buffer_dentry = debugfs_create_dir("buffer0", root); + if (!buffer_dentry) + goto err; + + if (!debugfs_create_file("error", S_IRUGO, buffer_dentry, dsp, + &wm_adsp_debugfs_buffererror_fops)) + goto err; + dsp->debugfs_root = root; return; From eaa48e0914a93c02c70e35675f71542f456e07a3 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 18 Jun 2015 15:39:02 +0100 Subject: [PATCH 0849/1167] switch: arizona: micd handler must check state before accessing registers The micd handler is triggered by an IRQ, which could be spurious, so it must check that it is actually in mic detection state. This must be done before attempting to access any codec registers because if we are not in the correct state the codec could be powered-down. Change-Id: Ibc2b6430024d6f4aa76019aa4fa792f6763d6c78 Signed-off-by: Richard Fitzgerald --- drivers/switch/switch-arizona.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index f2778a338f4..d8df4cc212c 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -2360,26 +2360,40 @@ static void arizona_micd_handler(struct work_struct *work) struct arizona_extcon_info, micd_detect_work.work); struct arizona *arizona = info->arizona; + int mode; int ret; arizona_jds_cancel_timeout(info); mutex_lock(&info->lock); + /* Must check that we are in a micd state before accessing + * any codec registers + */ + mode = arizona_jds_get_mode(info); + switch (mode) { + case ARIZONA_ACCDET_MODE_MIC: + case ARIZONA_ACCDET_MODE_ADC: + break; + default: + goto spurious; + } + if (arizona_jack_present(info, NULL) <= 0) goto spurious; arizona_hs_mic_control(arizona, ARIZONA_MIC_MUTE); - switch (arizona_jds_get_mode(info)) { + switch (mode) { case ARIZONA_ACCDET_MODE_MIC: ret = arizona_micd_read(info); break; case ARIZONA_ACCDET_MODE_ADC: ret = arizona_micd_adc_read(info); break; - default: - goto spurious; + default: /* we can't get here but compiler still warns */ + ret = 0; + break; } if (ret == -EAGAIN) From 0dcb28357b4ca08ae0ff70a13114efb3a4dd2074 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 18 Jun 2015 14:04:38 +0100 Subject: [PATCH 0850/1167] switch: arizona: Always defer micd handler to the workqueue The micd_handler is potentially not thread-safe in the case where its IRQ fires spuriously at the same time as one deferred to the workqueue is also running. This can result in the first one to start assuming that it has cancelled the timer but in fact the timer was restarted during the race window. To avoid this, always queue the micd handling on the workqueue. Change-Id: I2775e92801d8e64dbfd14265e9538c58fdc49c0d Signed-off-by: Richard Fitzgerald --- drivers/switch/switch-arizona.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index d8df4cc212c..6a72d767233 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -2465,11 +2465,12 @@ static irqreturn_t arizona_micdet(int irq, void *data) mutex_unlock(&info->lock); - if (debounce) - schedule_delayed_work(&info->micd_detect_work, - msecs_to_jiffies(debounce)); - else - arizona_micd_handler(&info->micd_detect_work.work); + /* Defer to the workqueue to ensure serialization + * and prevent race conditions if an IRQ occurs while + * running the delayed work + */ + schedule_delayed_work(&info->micd_detect_work, + msecs_to_jiffies(debounce)); return IRQ_HANDLED; } From 26af703c4a5154f5e5445fd982cb46e8d15381ab Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 2 Jun 2015 15:40:43 +0100 Subject: [PATCH 0851/1167] ASoC: clearwater: Fix incorrect interrupt disable in remove() The codec remove was attempting to disable the DRC interrupt using the old Arizona interrupt mask register that doesn't exist on Clearwater. Change-Id: I975453c4724a78a4910b65b30e8462bf42252348 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index a4d35daa8c9..687911738e8 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2975,8 +2975,8 @@ static int clearwater_codec_remove(struct snd_soc_codec *codec) irq_set_irq_wake(arizona->irq, 0); arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); - regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, - ARIZONA_IM_DRC2_SIG_DET_EINT2, + regmap_update_bits(arizona->regmap, CLEARWATER_IRQ2_MASK_9, + CLEARWATER_DRC2_SIG_DET_EINT2, 0); priv->core.arizona->dapm = NULL; From 1e05f4d2b918d6a4873926ceb33a1adb60aa28df Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 15 Jun 2015 09:50:27 +0100 Subject: [PATCH 0852/1167] ASoC: marley: fix incorrect interrupt disable in remove() The marley driver was derived from the clearwater driver and so inherited an incorrect disable of the DRC interrupt during codec_remove Change-Id: I727fcbdf8e51a1c43465f2e170158f09502db12e Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/marley.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index e80e3899acd..c1b18470ec7 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -2117,8 +2117,8 @@ static int marley_codec_remove(struct snd_soc_codec *codec) irq_set_irq_wake(arizona->irq, 0); arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); - regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, - ARIZONA_IM_DRC2_SIG_DET_EINT2, + regmap_update_bits(arizona->regmap, CLEARWATER_IRQ2_MASK_9, + CLEARWATER_DRC2_SIG_DET_EINT2, 0); priv->core.arizona->dapm = NULL; From 78bcebe1960908c66018befbf18110222cc62eda Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 2 Jul 2015 14:30:13 +0100 Subject: [PATCH 0853/1167] ASoC: vegas: Remove patching of Vegas speaker EDRE control Remove the patching of the write sequencer for EDRE control as this potentially conflicts with short-circuit detection. Change-Id: If854cfcb7695e5df92dc1ad976f193da351b2e00 Signed-off-by: Richard Fitzgerald (cherry picked from commit fc524158282fc01fc7c8acb9e9062c5218ac4655) --- sound/soc/codecs/vegas.c | 35 +---------------------------------- 1 file changed, 1 insertion(+), 34 deletions(-) diff --git a/sound/soc/codecs/vegas.c b/sound/soc/codecs/vegas.c index 04f8cc39f86..43162b4c921 100644 --- a/sound/soc/codecs/vegas.c +++ b/sound/soc/codecs/vegas.c @@ -37,38 +37,6 @@ struct vegas_priv { struct arizona_fll fll[2]; }; -static const struct reg_default vegas_sysclk_edre_patch[] = { - { 0x3138, 0x0001 }, - { 0x3139, 0x0000 }, - { 0x3144, 0x0001 }, - { 0x3145, 0x0000 }, - { 0x3164, 0x0001 }, - { 0x3165, 0x0000 }, - { 0x3170, 0x0001 }, - { 0x3171, 0x0000 }, -}; - -static int vegas_sysclk_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) -{ - struct snd_soc_codec *codec = w->codec; - struct regmap *regmap = codec->control_data; - int i; - - switch (event) { - case SND_SOC_DAPM_POST_PMU: - for (i = 0; i < ARRAY_SIZE(vegas_sysclk_edre_patch); i++) - regmap_write(regmap, vegas_sysclk_edre_patch[i].reg, - vegas_sysclk_edre_patch[i].def); - break; - - default: - break; - } - - return 0; -} - static int vegas_asrc_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) @@ -579,8 +547,7 @@ static const struct snd_kcontrol_new vegas_aec_loopback_mux[] = { static const struct snd_soc_dapm_widget vegas_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, - ARIZONA_SYSCLK_ENA_SHIFT, 0, - vegas_sysclk_ev, SND_SOC_DAPM_POST_PMU), + ARIZONA_SYSCLK_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("ASYNCCLK", ARIZONA_ASYNC_CLOCK_1, ARIZONA_ASYNC_CLK_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK, From e9e973d2323cea82d3d47fb665c6f6f61a217539 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 3 Jul 2015 10:07:13 +0100 Subject: [PATCH 0854/1167] ASoC: vegas: manage speaker EDRE bits during enable/disable The EDRE THR2 bits are modified by write sequences so keep the register status in sync during the power-up and power-down of the speaker widget. Change-Id: I79df4c545339ee71e1878203452c4967820567b3 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 180 +++++++++++++++++++++++++------------ sound/soc/codecs/arizona.h | 4 +- sound/soc/codecs/vegas.c | 73 +++++++++++++-- 3 files changed, 188 insertions(+), 69 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index dfb4276d778..d8ba40af6e1 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -308,6 +308,98 @@ int arizona_restore_sources(struct arizona *arizona, } EXPORT_SYMBOL_GPL(arizona_restore_sources); +static int vegas_spk_pre_enable(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_codec *codec = w->codec; + struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); + unsigned int mute_reg, mute_mask; + + switch (w->shift) { + case ARIZONA_OUT4L_ENA_SHIFT: + mute_reg = ARIZONA_DAC_DIGITAL_VOLUME_4L; + mute_mask = ARIZONA_OUT4L_MUTE_MASK; + break; + case ARIZONA_OUT4R_ENA_SHIFT: + mute_reg = ARIZONA_DAC_DIGITAL_VOLUME_4R; + mute_mask = ARIZONA_OUT4R_MUTE_MASK; + break; + default: + return 0; + } + + /* mute to prevent pops */ + priv->spk_mute_cache &= ~mute_mask; + priv->spk_mute_cache |= snd_soc_read(codec, mute_reg) & mute_mask; + snd_soc_update_bits(codec, mute_reg, mute_mask, mute_mask); + + return 0; +} + +static int vegas_spk_post_enable(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_codec *codec = w->codec; + struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); + unsigned int mute_reg, mute_mask, thr1_mask, thr2_mask, val; + + switch (w->shift) { + case ARIZONA_OUT4L_ENA_SHIFT: + mute_reg = ARIZONA_DAC_DIGITAL_VOLUME_4L; + mute_mask = ARIZONA_OUT4L_MUTE_MASK; + thr1_mask = CLEARWATER_EDRE_OUT4L_THR1_ENA_MASK; + thr2_mask = CLEARWATER_EDRE_OUT4L_THR2_ENA_MASK; + break; + case ARIZONA_OUT4R_ENA_SHIFT: + mute_reg = ARIZONA_DAC_DIGITAL_VOLUME_4R; + mute_mask = ARIZONA_OUT4R_MUTE_MASK; + thr1_mask = CLEARWATER_EDRE_OUT4R_THR1_ENA_MASK; + thr2_mask = CLEARWATER_EDRE_OUT4R_THR2_ENA_MASK; + break; + default: + return 0; + } + + /* write sequencer sets OUT4R_THR2_ENA - update cache */ + snd_soc_update_bits(codec, CLEARWATER_EDRE_ENABLE, thr2_mask, thr2_mask); + + /* disable THR2 if THR1 disabled */ + val = snd_soc_read(codec, CLEARWATER_EDRE_ENABLE); + if ((val & thr1_mask) == 0) + snd_soc_update_bits(codec, CLEARWATER_EDRE_ENABLE, thr2_mask, 0); + + /* restore mute state */ + snd_soc_update_bits(codec, mute_reg, mute_mask, priv->spk_mute_cache); + + return 0; +} + +static int vegas_spk_post_disable(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_codec *codec = w->codec; + unsigned int thr2_mask; + + switch (w->shift) { + case ARIZONA_OUT4L_ENA_SHIFT: + thr2_mask = CLEARWATER_EDRE_OUT4L_THR2_ENA_MASK; + break; + case ARIZONA_OUT4R_ENA_SHIFT: + thr2_mask = CLEARWATER_EDRE_OUT4R_THR2_ENA_MASK; + break; + default: + return 0; + } + + /* write sequencer clears OUT4R_THR2_ENA - update cache */ + snd_soc_update_bits(codec, CLEARWATER_EDRE_ENABLE, thr2_mask, 0); + + return 0; +} + static int arizona_spk_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) @@ -317,6 +409,16 @@ static int arizona_spk_ev(struct snd_soc_dapm_widget *w, int val; switch (event) { + case SND_SOC_DAPM_PRE_PMU: + switch (arizona->type) { + case WM8998: + case WM1814: + vegas_spk_pre_enable(w, kcontrol, event); + break; + default: + break; + } + break; case SND_SOC_DAPM_POST_PMU: val = snd_soc_read(codec, ARIZONA_INTERRUPT_RAW_STATUS_3); if (val & ARIZONA_SPK_OVERHEAT_STS) { @@ -335,6 +437,11 @@ static int arizona_spk_ev(struct snd_soc_dapm_widget *w, case CS47L24: msleep(10); break; + case WM8998: + case WM1814: + msleep(10); /* wait for wseq to end */ + vegas_spk_post_enable(w, kcontrol, event); + break; default: break; }; @@ -343,6 +450,17 @@ static int arizona_spk_ev(struct snd_soc_dapm_widget *w, snd_soc_update_bits(codec, ARIZONA_OUTPUT_ENABLES_1, 1 << w->shift, 0); break; + case SND_SOC_DAPM_POST_PMD: + switch (arizona->type) { + case WM8998: + case WM1814: + msleep(5); /* wait for wseq to end */ + vegas_spk_post_disable(w, kcontrol, event); + break; + default: + break; + } + break; } return 0; @@ -395,12 +513,14 @@ static irqreturn_t arizona_thermal_shutdown(int irq, void *data) static const struct snd_soc_dapm_widget arizona_spkl = SND_SOC_DAPM_PGA_E("OUT4L", SND_SOC_NOPM, ARIZONA_OUT4L_ENA_SHIFT, 0, NULL, 0, arizona_spk_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU); + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU); static const struct snd_soc_dapm_widget arizona_spkr = SND_SOC_DAPM_PGA_E("OUT4R", SND_SOC_NOPM, ARIZONA_OUT4R_ENA_SHIFT, 0, NULL, 0, arizona_spk_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU); + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU); int arizona_init_spk(struct snd_soc_codec *codec) { @@ -2193,62 +2313,6 @@ int clearwater_put_dre(struct snd_kcontrol *kcontrol, } EXPORT_SYMBOL_GPL(clearwater_put_dre); -int arizona_put_out4_edre(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); - struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); - unsigned int mask_l, mask_r, old_val, out_ena; - unsigned int val_l = 0, val_r = 0; - int ret = 0; - - switch (priv->arizona->type) { - case WM1814: - case WM8998: - mask_l = CLEARWATER_EDRE_OUT4L_THR1_ENA | - CLEARWATER_EDRE_OUT4L_THR2_ENA; - mask_r = CLEARWATER_EDRE_OUT4R_THR1_ENA | - CLEARWATER_EDRE_OUT4R_THR2_ENA; - break; - default: - return 0; - } - - if (ucontrol->value.integer.value[0]) - val_l = mask_l; - - if (ucontrol->value.integer.value[1]) - val_r = mask_r; - - mutex_lock_nested(&codec->card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); - - /* Check what will change so we know which output enables to test */ - old_val = snd_soc_read(codec, CLEARWATER_EDRE_ENABLE); - if ((old_val & mask_l) == val_l) - mask_l = 0; - - if ((old_val & mask_r) == val_r) - mask_r = 0; - - if ((mask_l | mask_r) == 0) - goto out; - - out_ena = snd_soc_read(codec, ARIZONA_OUTPUT_ENABLES_1); - if ((mask_l && (out_ena & ARIZONA_OUT4L_ENA_MASK)) || - (mask_r && (out_ena & ARIZONA_OUT4R_ENA_MASK))) { - dev_warn(codec->dev, "Cannot change OUT4 eDRE with output on\n"); - ret = -EBUSY; - goto out; - } - - snd_soc_update_bits(codec, CLEARWATER_EDRE_ENABLE, - mask_l | mask_r, val_l | val_r); -out: - mutex_unlock(&codec->card->dapm_mutex); - return ret; -} -EXPORT_SYMBOL_GPL(arizona_put_out4_edre); - int arizona_out_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index a490a880c88..ffc951caa6c 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -98,6 +98,8 @@ struct arizona_priv { unsigned int out_up_delay; unsigned int out_down_pending; unsigned int out_down_delay; + + unsigned int spk_mute_cache; }; #define ARIZONA_NUM_MIXER_INPUTS 134 @@ -413,8 +415,6 @@ extern int florida_put_dre(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); extern int clearwater_put_dre(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); -extern int arizona_put_out4_edre(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); extern struct regmap *arizona_get_regmap_dsp(struct snd_soc_codec *codec); diff --git a/sound/soc/codecs/vegas.c b/sound/soc/codecs/vegas.c index 43162b4c921..4c83779cd09 100644 --- a/sound/soc/codecs/vegas.c +++ b/sound/soc/codecs/vegas.c @@ -37,6 +37,49 @@ struct vegas_priv { struct arizona_fll fll[2]; }; +static int vegas_put_volsw_locked(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + int ret; + + mutex_lock_nested(&codec->card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); + + ret = snd_soc_put_volsw(kcontrol, ucontrol); + + mutex_unlock(&codec->card->dapm_mutex); + + return ret; +} + +static int vegas_put_spk_edre(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + unsigned int val = 0; + + mutex_lock_nested(&codec->card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); + + if (ucontrol->value.integer.value[0] != 0) + val |= CLEARWATER_EDRE_OUT4L_THR1_ENA_MASK | + CLEARWATER_EDRE_OUT4L_THR2_ENA_MASK; + + if (ucontrol->value.integer.value[1] != 0) + val |= CLEARWATER_EDRE_OUT4R_THR1_ENA_MASK | + CLEARWATER_EDRE_OUT4R_THR2_ENA_MASK; + + snd_soc_update_bits(codec, CLEARWATER_EDRE_ENABLE, + CLEARWATER_EDRE_OUT4L_THR1_ENA_MASK | + CLEARWATER_EDRE_OUT4R_THR1_ENA_MASK | + CLEARWATER_EDRE_OUT4L_THR2_ENA_MASK | + CLEARWATER_EDRE_OUT4R_THR2_ENA_MASK, + val); + + mutex_unlock(&codec->card->dapm_mutex); + + return 0; +} + static int vegas_asrc_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) @@ -335,8 +378,17 @@ SOC_DOUBLE_R("LINEOUT Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_2L, ARIZONA_DAC_DIGITAL_VOLUME_2R, ARIZONA_OUT2L_MUTE_SHIFT, 1, 1), SOC_SINGLE("EPOUT Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_3L, ARIZONA_OUT3L_MUTE_SHIFT, 1, 1), -SOC_DOUBLE_R("Speaker Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_4L, - ARIZONA_DAC_DIGITAL_VOLUME_4R, ARIZONA_OUT4L_MUTE_SHIFT, 1, 1), + +/* There isn't a SOC_DOUBLE_R_EXT macro that we can use for this */ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "Speaker Digital Switch", + .info = snd_soc_info_volsw, + .get = snd_soc_get_volsw, .put = vegas_put_volsw_locked, + .private_value = SOC_DOUBLE_R_VALUE(ARIZONA_DAC_DIGITAL_VOLUME_4L, + ARIZONA_DAC_DIGITAL_VOLUME_4R, + ARIZONA_OUT4L_MUTE_SHIFT, + 1, 1) +}, + SOC_DOUBLE_R("SPKDAT Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_5L, ARIZONA_DAC_DIGITAL_VOLUME_5R, ARIZONA_OUT5L_MUTE_SHIFT, 1, 1), @@ -377,18 +429,21 @@ SOC_SINGLE("DRE TC Fast", ARIZONA_DRE_CONTROL_1, SOC_SINGLE("DRE Analogue Volume Delay", ARIZONA_DRE_CONTROL_2, ARIZONA_DRE_ALOG_VOL_DELAY_SHIFT, 15, 0), -SOC_DOUBLE("HPOUT EDRE Switch", CLEARWATER_EDRE_ENABLE, +SOC_DOUBLE_EXT("HPOUT EDRE Switch", CLEARWATER_EDRE_ENABLE, CLEARWATER_EDRE_OUT1L_THR1_ENA_SHIFT, - CLEARWATER_EDRE_OUT1R_THR1_ENA_SHIFT, 1, 0), -SOC_DOUBLE("LINEOUT EDRE Switch", CLEARWATER_EDRE_ENABLE, + CLEARWATER_EDRE_OUT1R_THR1_ENA_SHIFT, 1, 0, + snd_soc_get_volsw, vegas_put_volsw_locked), +SOC_DOUBLE_EXT("LINEOUT EDRE Switch", CLEARWATER_EDRE_ENABLE, CLEARWATER_EDRE_OUT2L_THR1_ENA_SHIFT, - CLEARWATER_EDRE_OUT2R_THR1_ENA_SHIFT, 1, 0), -SOC_SINGLE("EPOUT EDRE Switch", CLEARWATER_EDRE_ENABLE, - CLEARWATER_EDRE_OUT3L_THR1_ENA_SHIFT, 1, 0), + CLEARWATER_EDRE_OUT2R_THR1_ENA_SHIFT, 1, 0, + snd_soc_get_volsw, vegas_put_volsw_locked), +SOC_SINGLE_EXT("EPOUT EDRE Switch", CLEARWATER_EDRE_ENABLE, + CLEARWATER_EDRE_OUT3L_THR1_ENA_SHIFT, 1, 0, + snd_soc_get_volsw, vegas_put_volsw_locked), SOC_DOUBLE_EXT("SPKOUT EDRE Switch", CLEARWATER_EDRE_ENABLE, CLEARWATER_EDRE_OUT4L_THR1_ENA_SHIFT, CLEARWATER_EDRE_OUT4R_THR1_ENA_SHIFT, 1, 0, - snd_soc_get_volsw, arizona_put_out4_edre), + snd_soc_get_volsw, vegas_put_spk_edre), SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp), SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp), From fbf3cff60ca6e0393094b93d747ddf4e4be5cacd Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 6 Nov 2014 09:37:43 +0000 Subject: [PATCH 0855/1167] ASoC: arizona: Sync EQ stability check with upstream Change-Id: Ie3cb7eabc9053f23a9817e6d8d91622b8f1b4f93 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 19 +++++++++---------- sound/soc/codecs/arizona.h | 13 ++++++------- 2 files changed, 15 insertions(+), 17 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index d8ba40af6e1..a6e96dc4c93 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -4273,10 +4273,10 @@ int arizona_disable_force_bypass(struct snd_soc_codec *codec) } EXPORT_SYMBOL_GPL(arizona_disable_force_bypass); -static bool arizona_filter_unstable(bool mode, s16 a, s16 b) +static bool arizona_eq_filter_unstable(bool mode, __be16 _a, __be16 _b) { - a = be16_to_cpu(a); - b = be16_to_cpu(b); + s16 a = be16_to_cpu(_a); + s16 b = be16_to_cpu(_b); if (!mode) { return abs(a) >= 4096; @@ -4301,18 +4301,17 @@ int arizona_eq_coeff_put(struct snd_kcontrol *kcontrol, len = params->num_regs * regmap_get_val_bytes(arizona->regmap); - data = kmemdup(ucontrol->value.bytes.data, len, - GFP_KERNEL | GFP_DMA); + data = kmemdup(ucontrol->value.bytes.data, len, GFP_KERNEL | GFP_DMA); if (!data) return -ENOMEM; data[0] &= cpu_to_be16(ARIZONA_EQ1_B1_MODE); - if (arizona_filter_unstable(!!data[0], data[1], data[2]) || - arizona_filter_unstable(true, data[4], data[5]) || - arizona_filter_unstable(true, data[8], data[9]) || - arizona_filter_unstable(true, data[12], data[13]) || - arizona_filter_unstable(false, data[16], data[17])) { + if (arizona_eq_filter_unstable(!!data[0], data[1], data[2]) || + arizona_eq_filter_unstable(true, data[4], data[5]) || + arizona_eq_filter_unstable(true, data[8], data[9]) || + arizona_eq_filter_unstable(true, data[12], data[13]) || + arizona_eq_filter_unstable(false, data[16], data[17])) { dev_err(arizona->dev, "Rejecting unstable EQ coefficients\n"); ret = -EINVAL; goto out; diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index ffc951caa6c..a12f4250355 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -248,13 +248,12 @@ extern unsigned int arizona_v2_mixer_values[ARIZONA_V2_NUM_MIXER_INPUTS]; snd_soc_get_value_enum_double, \ arizona_put_sample_rate_enum) -#define ARIZONA_EQ_CONTROL(xname, xbase) \ -{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ - .info = snd_soc_bytes_info, .get = snd_soc_bytes_get, \ - .put = arizona_eq_coeff_put, .private_value = \ - ((unsigned long)&(struct soc_bytes) \ - {.base = xbase, .num_regs = 20, \ - .mask = ~ARIZONA_EQ1_B1_MODE }) } +#define ARIZONA_EQ_CONTROL(xname, xbase) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ + .info = snd_soc_bytes_info, .get = snd_soc_bytes_get, \ + .put = arizona_eq_coeff_put, .private_value = \ + ((unsigned long)&(struct soc_bytes) { .base = xbase, \ + .num_regs = 20, .mask = ~ARIZONA_EQ1_B1_MODE }) } #define CLEARWATER_OSR_ENUM_SIZE 5 #define ARIZONA_RATE_ENUM_SIZE 5 From 0b102138f74347546fb7bfbc5cc205bbd80a300f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 30 Apr 2015 12:51:33 +0100 Subject: [PATCH 0856/1167] ASoC: arizona: Implement stability check for LHPF coefficients Change-Id: I3a951942e3ce6af64c5b7bd2c8fb3da0ecba552e Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 17 +++++++++++++++++ sound/soc/codecs/arizona.h | 9 +++++++++ sound/soc/codecs/clearwater.c | 8 ++++---- sound/soc/codecs/florida.c | 8 ++++---- sound/soc/codecs/largo.c | 8 ++++---- sound/soc/codecs/marley.c | 8 ++++---- sound/soc/codecs/vegas.c | 8 ++++---- sound/soc/codecs/wm5102.c | 8 ++++---- sound/soc/codecs/wm8997.c | 8 ++++---- 9 files changed, 54 insertions(+), 28 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index a6e96dc4c93..d7f33da3dc3 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -4332,6 +4332,23 @@ int arizona_eq_coeff_put(struct snd_kcontrol *kcontrol, } EXPORT_SYMBOL_GPL(arizona_eq_coeff_put); +int arizona_lhpf_coeff_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + __be16 *data = (__be16 *)ucontrol->value.bytes.data; + s16 val = be16_to_cpu(*data); + + if (abs(val) >= 4096) { + dev_err(arizona->dev, "Rejecting unstable LHPF coefficients\n"); + return -EINVAL; + } + + return snd_soc_bytes_put(kcontrol, ucontrol); +} +EXPORT_SYMBOL_GPL(arizona_lhpf_coeff_put); + MODULE_DESCRIPTION("ASoC Wolfson Arizona class device support"); MODULE_AUTHOR("Mark Brown "); MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index a12f4250355..843d7779d5c 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -255,6 +255,13 @@ extern unsigned int arizona_v2_mixer_values[ARIZONA_V2_NUM_MIXER_INPUTS]; ((unsigned long)&(struct soc_bytes) { .base = xbase, \ .num_regs = 20, .mask = ~ARIZONA_EQ1_B1_MODE }) } +#define ARIZONA_LHPF_CONTROL(xname, xbase) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ + .info = snd_soc_bytes_info, .get = snd_soc_bytes_get, \ + .put = arizona_lhpf_coeff_put, .private_value = \ + ((unsigned long)&(struct soc_bytes) { .base = xbase, \ + .num_regs = 1 }) } + #define CLEARWATER_OSR_ENUM_SIZE 5 #define ARIZONA_RATE_ENUM_SIZE 5 #define ARIZONA_SYNC_RATE_ENUM_SIZE 3 @@ -338,6 +345,8 @@ extern int arizona_put_sample_rate_enum(struct snd_kcontrol *kcontrol, extern int arizona_eq_coeff_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); +extern int arizona_lhpf_coeff_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); extern int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id, int source, unsigned int freq, int dir); diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 687911738e8..4992baced1d 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -920,10 +920,10 @@ ARIZONA_MIXER_CONTROLS("LHPF2", ARIZONA_HPLP2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("LHPF3", ARIZONA_HPLP3MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("LHPF4", ARIZONA_HPLP4MIX_INPUT_1_SOURCE), -SND_SOC_BYTES("LHPF1 Coefficients", ARIZONA_HPLPF1_2, 1), -SND_SOC_BYTES("LHPF2 Coefficients", ARIZONA_HPLPF2_2, 1), -SND_SOC_BYTES("LHPF3 Coefficients", ARIZONA_HPLPF3_2, 1), -SND_SOC_BYTES("LHPF4 Coefficients", ARIZONA_HPLPF4_2, 1), +ARIZONA_LHPF_CONTROL("LHPF1 Coefficients", ARIZONA_HPLPF1_2), +ARIZONA_LHPF_CONTROL("LHPF2 Coefficients", ARIZONA_HPLPF2_2), +ARIZONA_LHPF_CONTROL("LHPF3 Coefficients", ARIZONA_HPLPF3_2), +ARIZONA_LHPF_CONTROL("LHPF4 Coefficients", ARIZONA_HPLPF4_2), SOC_ENUM("LHPF1 Mode", arizona_lhpf1_mode), SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode), diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 3713ce6c46b..92915120bc8 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -424,10 +424,10 @@ ARIZONA_MIXER_CONTROLS("LHPF2", ARIZONA_HPLP2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("LHPF3", ARIZONA_HPLP3MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("LHPF4", ARIZONA_HPLP4MIX_INPUT_1_SOURCE), -SND_SOC_BYTES("LHPF1 Coefficients", ARIZONA_HPLPF1_2, 1), -SND_SOC_BYTES("LHPF2 Coefficients", ARIZONA_HPLPF2_2, 1), -SND_SOC_BYTES("LHPF3 Coefficients", ARIZONA_HPLPF3_2, 1), -SND_SOC_BYTES("LHPF4 Coefficients", ARIZONA_HPLPF4_2, 1), +ARIZONA_LHPF_CONTROL("LHPF1 Coefficients", ARIZONA_HPLPF1_2), +ARIZONA_LHPF_CONTROL("LHPF2 Coefficients", ARIZONA_HPLPF2_2), +ARIZONA_LHPF_CONTROL("LHPF3 Coefficients", ARIZONA_HPLPF3_2), +ARIZONA_LHPF_CONTROL("LHPF4 Coefficients", ARIZONA_HPLPF4_2), SOC_ENUM("LHPF1 Mode", arizona_lhpf1_mode), SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode), diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index f7682b5254d..b4976bcd2c7 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -180,10 +180,10 @@ ARIZONA_MIXER_CONTROLS("LHPF2", ARIZONA_HPLP2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("LHPF3", ARIZONA_HPLP3MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("LHPF4", ARIZONA_HPLP4MIX_INPUT_1_SOURCE), -SND_SOC_BYTES("LHPF1 Coefficients", ARIZONA_HPLPF1_2, 1), -SND_SOC_BYTES("LHPF2 Coefficients", ARIZONA_HPLPF2_2, 1), -SND_SOC_BYTES("LHPF3 Coefficients", ARIZONA_HPLPF3_2, 1), -SND_SOC_BYTES("LHPF4 Coefficients", ARIZONA_HPLPF4_2, 1), +ARIZONA_LHPF_CONTROL("LHPF1 Coefficients", ARIZONA_HPLPF1_2), +ARIZONA_LHPF_CONTROL("LHPF2 Coefficients", ARIZONA_HPLPF2_2), +ARIZONA_LHPF_CONTROL("LHPF3 Coefficients", ARIZONA_HPLPF3_2), +ARIZONA_LHPF_CONTROL("LHPF4 Coefficients", ARIZONA_HPLPF4_2), SOC_ENUM("LHPF1 Mode", arizona_lhpf1_mode), SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode), diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index c1b18470ec7..d75c8b647c5 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -746,10 +746,10 @@ ARIZONA_MIXER_CONTROLS("LHPF2", ARIZONA_HPLP2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("LHPF3", ARIZONA_HPLP3MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("LHPF4", ARIZONA_HPLP4MIX_INPUT_1_SOURCE), -SND_SOC_BYTES("LHPF1 Coefficients", ARIZONA_HPLPF1_2, 1), -SND_SOC_BYTES("LHPF2 Coefficients", ARIZONA_HPLPF2_2, 1), -SND_SOC_BYTES("LHPF3 Coefficients", ARIZONA_HPLPF3_2, 1), -SND_SOC_BYTES("LHPF4 Coefficients", ARIZONA_HPLPF4_2, 1), +ARIZONA_LHPF_CONTROL("LHPF1 Coefficients", ARIZONA_HPLPF1_2), +ARIZONA_LHPF_CONTROL("LHPF2 Coefficients", ARIZONA_HPLPF2_2), +ARIZONA_LHPF_CONTROL("LHPF3 Coefficients", ARIZONA_HPLPF3_2), +ARIZONA_LHPF_CONTROL("LHPF4 Coefficients", ARIZONA_HPLPF4_2), SOC_ENUM("LHPF1 Mode", arizona_lhpf1_mode), SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode), diff --git a/sound/soc/codecs/vegas.c b/sound/soc/codecs/vegas.c index 4c83779cd09..15dc149e687 100644 --- a/sound/soc/codecs/vegas.c +++ b/sound/soc/codecs/vegas.c @@ -341,10 +341,10 @@ ARIZONA_MIXER_CONTROLS("LHPF2", ARIZONA_HPLP2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("LHPF3", ARIZONA_HPLP3MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("LHPF4", ARIZONA_HPLP4MIX_INPUT_1_SOURCE), -SND_SOC_BYTES("LHPF1 Coefficients", ARIZONA_HPLPF1_2, 1), -SND_SOC_BYTES("LHPF2 Coefficients", ARIZONA_HPLPF2_2, 1), -SND_SOC_BYTES("LHPF3 Coefficients", ARIZONA_HPLPF3_2, 1), -SND_SOC_BYTES("LHPF4 Coefficients", ARIZONA_HPLPF4_2, 1), +ARIZONA_LHPF_CONTROL("LHPF1 Coefficients", ARIZONA_HPLPF1_2), +ARIZONA_LHPF_CONTROL("LHPF2 Coefficients", ARIZONA_HPLPF2_2), +ARIZONA_LHPF_CONTROL("LHPF3 Coefficients", ARIZONA_HPLPF3_2), +ARIZONA_LHPF_CONTROL("LHPF4 Coefficients", ARIZONA_HPLPF4_2), SOC_ENUM("LHPF1 Mode", arizona_lhpf1_mode), SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode), diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 7492af87829..dc6b5568db3 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -857,10 +857,10 @@ ARIZONA_MIXER_CONTROLS("LHPF2", ARIZONA_HPLP2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("LHPF3", ARIZONA_HPLP3MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("LHPF4", ARIZONA_HPLP4MIX_INPUT_1_SOURCE), -SND_SOC_BYTES("LHPF1 Coefficients", ARIZONA_HPLPF1_2, 1), -SND_SOC_BYTES("LHPF2 Coefficients", ARIZONA_HPLPF2_2, 1), -SND_SOC_BYTES("LHPF3 Coefficients", ARIZONA_HPLPF3_2, 1), -SND_SOC_BYTES("LHPF4 Coefficients", ARIZONA_HPLPF4_2, 1), +ARIZONA_LHPF_CONTROL("LHPF1 Coefficients", ARIZONA_HPLPF1_2), +ARIZONA_LHPF_CONTROL("LHPF2 Coefficients", ARIZONA_HPLPF2_2), +ARIZONA_LHPF_CONTROL("LHPF3 Coefficients", ARIZONA_HPLPF3_2), +ARIZONA_LHPF_CONTROL("LHPF4 Coefficients", ARIZONA_HPLPF4_2), ARIZONA_MIXER_CONTROLS("DSP1L", ARIZONA_DSP1LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("DSP1R", ARIZONA_DSP1RMIX_INPUT_1_SOURCE), diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c index d63dd466d30..f60ccb3c825 100644 --- a/sound/soc/codecs/wm8997.c +++ b/sound/soc/codecs/wm8997.c @@ -234,10 +234,10 @@ SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode), SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode), SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), -SND_SOC_BYTES("LHPF1 Coefficients", ARIZONA_HPLPF1_2, 1), -SND_SOC_BYTES("LHPF2 Coefficients", ARIZONA_HPLPF2_2, 1), -SND_SOC_BYTES("LHPF3 Coefficients", ARIZONA_HPLPF3_2, 1), -SND_SOC_BYTES("LHPF4 Coefficients", ARIZONA_HPLPF4_2, 1), +ARIZONA_LHPF_CONTROL("LHPF1 Coefficients", ARIZONA_HPLPF1_2), +ARIZONA_LHPF_CONTROL("LHPF2 Coefficients", ARIZONA_HPLPF2_2), +ARIZONA_LHPF_CONTROL("LHPF3 Coefficients", ARIZONA_HPLPF3_2), +ARIZONA_LHPF_CONTROL("LHPF4 Coefficients", ARIZONA_HPLPF4_2), SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), From 9f75c23c923083476bc14ce29da9c97e1a360597 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 28 May 2015 17:10:54 +0100 Subject: [PATCH 0857/1167] mfd: arizona: Fixup register table definitions The regmap register definitions have been a source of many small fixes as issues are discovered. As such I made a small automated tool to check these definitions. This patch fixes the issues (mostly harmless) located by that tool, the issues fall into three catagories: 1) Volatile registers that have a default in the defaults table (default has been removed from the table since it is redundant) 2) Registers that are marked as volatile but unreadable (register has been removed from the volatile list since it is obviously not being used) 3) Registers that arn't readable but have an entry in the defaults table (again removed since it is redundant) 4) Readable non-volatile registers that are missing a default, these are dangerous as they won't get synced during a cache sync. Fortunately, most of them seem to be registers that shouldn't be there (for example wm5102 had readable registers for DRC2 and ISRC3 which is doesn't have) Hopefully another tool will be produced to check the actual default values themselves but that is outside the scope of this patch. Change-Id: I06e6f6e0acc9ee6baafabc004606f58733b410ec Signed-off-by: Charles Keepax --- drivers/mfd/clearwater-tables.c | 83 +++++++++------------------------ drivers/mfd/florida-tables.c | 9 +--- drivers/mfd/largo-tables.c | 9 ---- drivers/mfd/marley-tables.c | 59 ++++------------------- drivers/mfd/vegas-tables.c | 8 ---- drivers/mfd/wm5102-tables.c | 46 +----------------- drivers/mfd/wm8997-tables.c | 6 +-- 7 files changed, 35 insertions(+), 185 deletions(-) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index 8903e4ac49e..c634801d44e 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -437,7 +437,6 @@ static const struct reg_default clearwater_reg_default[] = { { 0x00000016, 0x0000 }, /* R22 (0x16) - Write Sequencer Ctrl 0 */ { 0x00000017, 0x0000 }, /* R23 (0x17) - Write Sequencer Ctrl 1 */ { 0x00000018, 0x0000 }, /* R24 (0x18) - Write Sequencer Ctrl 2 */ - { 0x0000001a, 0x0000 }, /* R26 (0x1A) - Write Sequencer PROM */ { 0x00000020, 0x0000 }, /* R32 (0x20) - Tone Generator 1 */ { 0x00000021, 0x1000 }, /* R33 (0x21) - Tone Generator 2 */ { 0x00000022, 0x0000 }, /* R34 (0x22) - Tone Generator 3 */ @@ -638,12 +637,9 @@ static const struct reg_default clearwater_reg_default[] = { { 0x0000043d, 0x0180 }, /* R1085 (0x43D) - DAC Digital Volume 6R */ { 0x0000043f, 0x0800 }, /* R1087 (0x43F) - Noise Gate Select 6R */ { 0x00000440, 0x003f }, /* R1088 (0x440) - DRE Enable */ - { 0x00000441, 0xC050 }, /* R1089 - DRE Control 1 */ - { 0x00000442, 0x0305 }, /* R1090 (0x442) - DRE Control 2 */ - { 0x00000443, 0x5cfa }, /* R1091 (0x443) - DRE Control 3 */ { 0x00000448, 0x0fff }, /* R1096 (0x448) - eDRE Enable */ { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */ - { 0x00000451, 0x0000 }, + { 0x00000451, 0x0000 }, /* R1105 - DAC AEC Control 2 */ { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */ { 0x00000490, 0x0069 }, /* R1168 (0x490) - PDM SPK1 CTRL 1 */ { 0x00000491, 0x0000 }, /* R1169 (0x491) - PDM SPK1 CTRL 2 */ @@ -654,11 +650,6 @@ static const struct reg_default clearwater_reg_default[] = { { 0x000004A2, 0x3200 }, /* R1186 - HP3 Short Circuit Ctrl */ { 0x000004A8, 0x7020 }, /* R1192 - HP Test Ctrl 5 */ { 0x000004A9, 0x7020 }, /* R1193 - HP Test Ctrl 6 */ - { 0x000004b5, 0x0000 }, - { 0x000004b6, 0x8080 }, - { 0x000004dc, 0x6000 }, /* R1244 (0x4DC) - DAC comp 1 */ - { 0x000004de, 0x0000 }, /* R1246 (0x4DE) - DAC comp 3 */ - { 0x000004df, 0x0000 }, /* R1247 (0x4DF) - DAC comp 4 */ { 0x00000500, 0x000c }, /* R1280 (0x500) - AIF1 BCLK Ctrl */ { 0x00000501, 0x0000 }, /* R1281 (0x501) - AIF1 Tx Pin Ctrl */ { 0x00000502, 0x0000 }, /* R1282 (0x502) - AIF1 Rx Pin Ctrl */ @@ -686,7 +677,6 @@ static const struct reg_default clearwater_reg_default[] = { { 0x00000518, 0x0007 }, /* R1304 (0x518) - AIF1 Frame Ctrl 18 */ { 0x00000519, 0x0000 }, /* R1305 (0x519) - AIF1 Tx Enables */ { 0x0000051a, 0x0000 }, /* R1306 (0x51A) - AIF1 Rx Enables */ - { 0x0000051b, 0x0000 }, /* R1307 (0x51B) - AIF1 Force Write */ { 0x00000540, 0x000c }, /* R1344 (0x540) - AIF2 BCLK Ctrl */ { 0x00000541, 0x0000 }, /* R1345 (0x541) - AIF2 Tx Pin Ctrl */ { 0x00000542, 0x0000 }, /* R1346 (0x542) - AIF2 Rx Pin Ctrl */ @@ -714,7 +704,6 @@ static const struct reg_default clearwater_reg_default[] = { { 0x00000558, 0x0007 }, /* R1368 - AIF2 Frame Ctrl 18 */ { 0x00000559, 0x0000 }, /* R1369 (0x559) - AIF2 Tx Enables */ { 0x0000055a, 0x0000 }, /* R1370 (0x55A) - AIF2 Rx Enables */ - { 0x0000055b, 0x0000 }, /* R1371 (0x55B) - AIF2 Force Write */ { 0x00000580, 0x000c }, /* R1408 (0x580) - AIF3 BCLK Ctrl */ { 0x00000581, 0x0000 }, /* R1409 (0x581) - AIF3 Tx Pin Ctrl */ { 0x00000582, 0x0000 }, /* R1410 (0x582) - AIF3 Rx Pin Ctrl */ @@ -730,7 +719,6 @@ static const struct reg_default clearwater_reg_default[] = { { 0x00000592, 0x0001 }, /* R1426 (0x592) - AIF3 Frame Ctrl 12 */ { 0x00000599, 0x0000 }, /* R1433 (0x599) - AIF3 Tx Enables */ { 0x0000059a, 0x0000 }, /* R1434 (0x59A) - AIF3 Rx Enables */ - { 0x0000059b, 0x0000 }, /* R1435 (0x59B) - AIF3 Force Write */ { 0x000005a0, 0x000c }, /* R1440 - AIF4 BCLK Ctrl */ { 0x000005a1, 0x0000 }, /* R1441 - AIF4 Tx Pin Ctrl */ { 0x000005a2, 0x0000 }, /* R1442 - AIF4 Rx Pin Ctrl */ @@ -746,7 +734,6 @@ static const struct reg_default clearwater_reg_default[] = { { 0x000005b2, 0x0001 }, /* R1458 - AIF4 Frame Ctrl 12 */ { 0x000005b9, 0x0000 }, /* R1465 - AIF4 Tx Enables */ { 0x000005ba, 0x0000 }, /* R1466 - AIF4 Rx Enables */ - { 0x000005bb, 0x0000 }, /* R1467 - AIF4 Force Write */ { 0x000005C2, 0x0000 }, /* R1474 - SPD1 TX Control */ { 0x000005e3, 0x0000 }, /* R1507 (0x5E3) - SLIMbus Framer Ref Gear */ { 0x000005e5, 0x0000 }, /* R1509 (0x5E5) - SLIMbus Rates 1 */ @@ -1684,19 +1671,8 @@ static const struct reg_default clearwater_reg_default[] = { { 0x00000FC3, 0x0000 }, /* R4035 - ANC Coefficient */ { 0x00000FC4, 0x0000 }, /* R4036 - ANC Coefficient */ { 0x00000FC5, 0x0000 }, /* R4037 - ANC Coefficient */ - { 0x00001200, 0x0000 }, - { 0x00001204, 0x0000 }, - { 0x00001206, 0x0000 }, - { 0x00001210, 0x0000 }, - { 0x00001212, 0x0000 }, - { 0x00001214, 0x0000 }, - { 0x00001216, 0x0000 }, { 0x00001300, 0x0000 }, /* R4864 - DAC Comp 1 */ { 0x00001302, 0x0000 }, /* R4866 - DAC Comp 2 */ - { 0x00001340, 0x0000 }, - { 0x00001341, 0x0000 }, - { 0x00001342, 0x0000 }, - { 0x00001343, 0x0000 }, { 0x00001380, 0x0000 }, { 0x00001381, 0x0000 }, { 0x00001382, 0x0000 }, @@ -1891,8 +1867,6 @@ static bool clearwater_16bit_readable_register(struct device *dev, unsigned int case ARIZONA_CTRL_IF_SPI_CFG_1: case ARIZONA_CTRL_IF_I2C1_CFG_1: case ARIZONA_CTRL_IF_I2C2_CFG_1: - case ARIZONA_CTRL_IF_I2C1_CFG_2: - case ARIZONA_CTRL_IF_I2C2_CFG_2: case ARIZONA_WRITE_SEQUENCER_CTRL_0: case ARIZONA_WRITE_SEQUENCER_CTRL_1: case ARIZONA_WRITE_SEQUENCER_CTRL_2: @@ -1904,7 +1878,6 @@ static bool clearwater_16bit_readable_register(struct device *dev, unsigned int case ARIZONA_PWM_DRIVE_1: case ARIZONA_PWM_DRIVE_2: case ARIZONA_PWM_DRIVE_3: - case ARIZONA_WAKE_CONTROL: case ARIZONA_SEQUENCE_CONTROL: case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_1: case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2: @@ -2079,61 +2052,49 @@ static bool clearwater_16bit_readable_register(struct device *dev, unsigned int case ARIZONA_DMIC6R_CONTROL: case ARIZONA_OUTPUT_ENABLES_1: case ARIZONA_OUTPUT_STATUS_1: - case ARIZONA_OUTPUT_STANDBY_1: case ARIZONA_RAW_OUTPUT_STATUS_1: case ARIZONA_OUTPUT_RATE_1: case ARIZONA_OUTPUT_VOLUME_RAMP: case ARIZONA_OUTPUT_PATH_CONFIG_1L: case ARIZONA_DAC_DIGITAL_VOLUME_1L: - case ARIZONA_DAC_VOLUME_LIMIT_1L: case ARIZONA_NOISE_GATE_SELECT_1L: case ARIZONA_OUTPUT_PATH_CONFIG_1R: case ARIZONA_DAC_DIGITAL_VOLUME_1R: - case ARIZONA_DAC_VOLUME_LIMIT_1R: case ARIZONA_NOISE_GATE_SELECT_1R: case ARIZONA_OUTPUT_PATH_CONFIG_2L: case ARIZONA_DAC_DIGITAL_VOLUME_2L: - case ARIZONA_DAC_VOLUME_LIMIT_2L: case ARIZONA_NOISE_GATE_SELECT_2L: case ARIZONA_OUTPUT_PATH_CONFIG_2R: case ARIZONA_DAC_DIGITAL_VOLUME_2R: - case ARIZONA_DAC_VOLUME_LIMIT_2R: case ARIZONA_NOISE_GATE_SELECT_2R: case ARIZONA_OUTPUT_PATH_CONFIG_3L: case ARIZONA_DAC_DIGITAL_VOLUME_3L: - case ARIZONA_DAC_VOLUME_LIMIT_3L: case ARIZONA_NOISE_GATE_SELECT_3L: case ARIZONA_OUTPUT_PATH_CONFIG_3R: case ARIZONA_DAC_DIGITAL_VOLUME_3R: - case ARIZONA_DAC_VOLUME_LIMIT_3R: case ARIZONA_NOISE_GATE_SELECT_3R: case ARIZONA_OUTPUT_PATH_CONFIG_4L: case ARIZONA_DAC_DIGITAL_VOLUME_4L: - case ARIZONA_OUT_VOLUME_4L: case ARIZONA_NOISE_GATE_SELECT_4L: case ARIZONA_OUTPUT_PATH_CONFIG_4R: case ARIZONA_DAC_DIGITAL_VOLUME_4R: - case ARIZONA_OUT_VOLUME_4R: case ARIZONA_NOISE_GATE_SELECT_4R: case ARIZONA_OUTPUT_PATH_CONFIG_5L: case ARIZONA_DAC_DIGITAL_VOLUME_5L: - case ARIZONA_DAC_VOLUME_LIMIT_5L: case ARIZONA_NOISE_GATE_SELECT_5L: case ARIZONA_OUTPUT_PATH_CONFIG_5R: case ARIZONA_DAC_DIGITAL_VOLUME_5R: - case ARIZONA_DAC_VOLUME_LIMIT_5R: case ARIZONA_NOISE_GATE_SELECT_5R: case ARIZONA_OUTPUT_PATH_CONFIG_6L: case ARIZONA_DAC_DIGITAL_VOLUME_6L: - case ARIZONA_DAC_VOLUME_LIMIT_6L: case ARIZONA_NOISE_GATE_SELECT_6L: case ARIZONA_OUTPUT_PATH_CONFIG_6R: case ARIZONA_DAC_DIGITAL_VOLUME_6R: - case ARIZONA_DAC_VOLUME_LIMIT_6R: case ARIZONA_NOISE_GATE_SELECT_6R: case ARIZONA_DRE_ENABLE: case CLEARWATER_EDRE_ENABLE: case ARIZONA_DAC_AEC_CONTROL_1: + case ARIZONA_DAC_AEC_CONTROL_2: case ARIZONA_NOISE_GATE_CONTROL: case ARIZONA_PDM_SPK1_CTRL_1: case ARIZONA_PDM_SPK1_CTRL_2: @@ -2144,7 +2105,6 @@ static bool clearwater_16bit_readable_register(struct device *dev, unsigned int case ARIZONA_HP3_SHORT_CIRCUIT_CTRL: case ARIZONA_HP_TEST_CTRL_5: case ARIZONA_HP_TEST_CTRL_6: - case ARIZONA_SPK_CTRL_3: case ARIZONA_AIF1_BCLK_CTRL: case ARIZONA_AIF1_TX_PIN_CTRL: case ARIZONA_AIF1_RX_PIN_CTRL: @@ -2470,6 +2430,22 @@ static bool clearwater_16bit_readable_register(struct device *dev, unsigned int case ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME: case ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE: case ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX7MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX7MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX7MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX7MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX7MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX7MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX7MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX7MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX8MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX8MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX8MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX8MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX8MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX8MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX8MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX8MIX_INPUT_4_VOLUME: case ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE: case ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME: case ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE: @@ -2566,6 +2542,10 @@ static bool clearwater_16bit_readable_register(struct device *dev, unsigned int case ARIZONA_SLIMTX8MIX_INPUT_3_VOLUME: case ARIZONA_SLIMTX8MIX_INPUT_4_SOURCE: case ARIZONA_SLIMTX8MIX_INPUT_4_VOLUME: + case ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE: + case ARIZONA_SPDIFTX1MIX_INPUT_1_VOLUME: + case ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE: + case ARIZONA_SPDIFTX2MIX_INPUT_1_VOLUME: case ARIZONA_EQ1MIX_INPUT_1_SOURCE: case ARIZONA_EQ1MIX_INPUT_1_VOLUME: case ARIZONA_EQ1MIX_INPUT_2_SOURCE: @@ -3150,19 +3130,6 @@ static bool clearwater_16bit_readable_register(struct device *dev, unsigned int case CLEARWATER_IRQ1_MASK_13: case CLEARWATER_IRQ1_MASK_14: case CLEARWATER_IRQ1_MASK_15: - case CLEARWATER_IRQ1_MASK_17: - case CLEARWATER_IRQ1_MASK_18: - case CLEARWATER_IRQ1_MASK_19: - case CLEARWATER_IRQ1_MASK_21: - case CLEARWATER_IRQ1_MASK_22: - case CLEARWATER_IRQ1_MASK_23: - case CLEARWATER_IRQ1_MASK_24: - case CLEARWATER_IRQ1_MASK_25: - case CLEARWATER_IRQ1_MASK_27: - case CLEARWATER_IRQ1_MASK_28: - case CLEARWATER_IRQ1_MASK_30: - case CLEARWATER_IRQ1_MASK_31: - case CLEARWATER_IRQ1_MASK_32: case CLEARWATER_IRQ1_RAW_STATUS_1: case CLEARWATER_IRQ1_RAW_STATUS_2: case CLEARWATER_IRQ1_RAW_STATUS_7: @@ -3222,12 +3189,6 @@ static bool clearwater_16bit_volatile_register(struct device *dev, unsigned int case ARIZONA_INPUT_ENABLES_STATUS: case ARIZONA_OUTPUT_STATUS_1: case ARIZONA_RAW_OUTPUT_STATUS_1: - case ARIZONA_ADC_VCO_CAL_4: - case ARIZONA_ADC_VCO_CAL_5: - case ARIZONA_ADC_VCO_CAL_6: - case ARIZONA_ADC_VCO_CAL_7: - case ARIZONA_ADC_VCO_CAL_8: - case ARIZONA_ADC_VCO_CAL_9: case ARIZONA_SPD1_TX_CHANNEL_STATUS_1: case ARIZONA_SPD1_TX_CHANNEL_STATUS_2: case ARIZONA_SPD1_TX_CHANNEL_STATUS_3: diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 0c6d6402ba4..c8bded2a377 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -754,11 +754,9 @@ static const struct reg_default florida_reg_default[] = { { 0x0000021A, 0x01A6 }, /* R538 - Mic Bias Ctrl 3 */ { 0x00000293, 0x0000 }, /* R659 - Accessory Detect Mode 1 */ { 0x0000029B, 0x0028 }, /* R667 - Headphone Detect 1 */ - { 0x0000029C, 0x0000 }, /* R668 - Headphone Detect 2 */ { 0x000002A2, 0x0000 }, /* R674 - Micd clamp control */ { 0x000002A3, 0x1102 }, /* R675 - Mic Detect 1 */ { 0x000002A4, 0x009F }, /* R676 - Mic Detect 2 */ - { 0x000002A5, 0x0000 }, /* R677 - Mic Detect 3 */ { 0x000002A6, 0x3737 }, /* R678 - Mic Detect Level 1 */ { 0x000002A7, 0x372C }, /* R679 - Mic Detect Level 2 */ { 0x000002A8, 0x1422 }, /* R680 - Mic Detect Level 3 */ @@ -879,8 +877,6 @@ static const struct reg_default florida_reg_default[] = { { 0x0000047C, 0x05DF }, { 0x0000047D, 0x0001 }, { 0x0000047E, 0x07FF }, - { 0x00000480, 0x0040 }, /* R1152 - Class W ANC Threshold 1 */ - { 0x00000481, 0x0040 }, /* R1153 - Class W ANC Threshold 2 */ { 0x00000483, 0x0826 }, { 0x00000490, 0x0069 }, /* R1168 - PDM SPK1 CTRL 1 */ { 0x00000491, 0x0000 }, /* R1169 - PDM SPK1 CTRL 2 */ @@ -1541,7 +1537,6 @@ static const struct reg_default florida_reg_default[] = { { 0x00000D54, 0x00FC }, /* R3412 - AOD IRQ Mask IRQ2 */ { 0x00000D56, 0x0000 }, /* R3414 - Jack detect debounce */ { 0x00000E00, 0x0000 }, /* R3584 - FX_Ctrl1 */ - { 0x00000E01, 0x0000 }, /* R3585 - FX_Ctrl2 */ { 0x00000E10, 0x6318 }, /* R3600 - EQ1_1 */ { 0x00000E11, 0x6300 }, /* R3601 - EQ1_2 */ { 0x00000E12, 0x0FC8 }, /* R3602 - EQ1_3 */ @@ -2067,7 +2062,6 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_ADC_VCO_CAL_9: case ARIZONA_OUTPUT_ENABLES_1: case ARIZONA_OUTPUT_STATUS_1: - case ARIZONA_OUTPUT_STANDBY_1: case ARIZONA_RAW_OUTPUT_STATUS_1: case ARIZONA_OUTPUT_RATE_1: case ARIZONA_OUTPUT_VOLUME_RAMP: @@ -2130,7 +2124,6 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_HP2_SHORT_CIRCUIT_CTRL: case ARIZONA_HP3_SHORT_CIRCUIT_CTRL: case ARIZONA_HP_TEST_CTRL_1: - case ARIZONA_SPK_CTRL_3: case ARIZONA_AIF1_BCLK_CTRL: case ARIZONA_AIF1_TX_PIN_CTRL: case ARIZONA_AIF1_RX_PIN_CTRL: @@ -3056,6 +3049,8 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DSP4_SCRATCH_1: case ARIZONA_DSP4_SCRATCH_2: case ARIZONA_DSP4_SCRATCH_3: + case 0x460 ... 0x47E: + case 0x483: return true; default: return florida_is_adsp_memory(dev, reg); diff --git a/drivers/mfd/largo-tables.c b/drivers/mfd/largo-tables.c index 363e87447c5..021085df8c0 100644 --- a/drivers/mfd/largo-tables.c +++ b/drivers/mfd/largo-tables.c @@ -713,7 +713,6 @@ static const struct reg_default largo_reg_default[] = { { 0x00000D1D, 0xD005 }, /* R3357 - IRQ2 Status 6 Mask */ { 0x00000D1F, 0x0000 }, /* R3359 - IRQ2 Control */ { 0x00000E00, 0x0000 }, /* R3584 - FX_Ctrl1 */ - { 0x00000E01, 0x0000 }, /* R3585 - FX_Ctrl2 */ { 0x00000E10, 0x6318 }, /* R3600 - EQ1_1 */ { 0x00000E11, 0x6300 }, /* R3601 - EQ1_2 */ { 0x00000E12, 0x0FC8 }, /* R3602 - EQ1_3 */ @@ -916,7 +915,6 @@ static bool largo_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DMIC2R_CONTROL: case ARIZONA_OUTPUT_ENABLES_1: case ARIZONA_OUTPUT_STATUS_1: - case ARIZONA_OUTPUT_STANDBY_1: case ARIZONA_RAW_OUTPUT_STATUS_1: case ARIZONA_OUTPUT_RATE_1: case ARIZONA_OUTPUT_VOLUME_RAMP: @@ -933,7 +931,6 @@ static bool largo_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DAC_AEC_CONTROL_1: case ARIZONA_NOISE_GATE_CONTROL: case ARIZONA_HP1_SHORT_CIRCUIT_CTRL: - case ARIZONA_SPK_CTRL_3: case ARIZONA_AIF1_BCLK_CTRL: case ARIZONA_AIF1_TX_PIN_CTRL: case ARIZONA_AIF1_RX_PIN_CTRL: @@ -1529,12 +1526,6 @@ static bool largo_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_INPUT_ENABLES_STATUS: case ARIZONA_OUTPUT_STATUS_1: case ARIZONA_RAW_OUTPUT_STATUS_1: - case ARIZONA_ADC_VCO_CAL_4: - case ARIZONA_ADC_VCO_CAL_5: - case ARIZONA_ADC_VCO_CAL_6: - case ARIZONA_ADC_VCO_CAL_7: - case ARIZONA_ADC_VCO_CAL_8: - case ARIZONA_ADC_VCO_CAL_9: case ARIZONA_INTERRUPT_STATUS_1: case ARIZONA_INTERRUPT_STATUS_2: case ARIZONA_INTERRUPT_STATUS_3: diff --git a/drivers/mfd/marley-tables.c b/drivers/mfd/marley-tables.c index 8a6b7f953c6..8e40811837d 100644 --- a/drivers/mfd/marley-tables.c +++ b/drivers/mfd/marley-tables.c @@ -93,7 +93,6 @@ static const struct reg_default marley_reg_default[] = { { 0x00000016, 0x0000 }, /* R22 (0x16) - Write Sequencer Ctrl 0 */ { 0x00000017, 0x0000 }, /* R23 (0x17) - Write Sequencer Ctrl 1 */ { 0x00000018, 0x0000 }, /* R24 (0x18) - Write Sequencer Ctrl 2 */ - { 0x0000001a, 0x0000 }, /* R26 (0x1A) - Write Sequencer PROM */ { 0x00000020, 0x0000 }, /* R32 (0x20) - Tone Generator 1 */ { 0x00000021, 0x1000 }, /* R33 (0x21) - Tone Generator 2 */ { 0x00000022, 0x0000 }, /* R34 (0x22) - Tone Generator 3 */ @@ -107,10 +106,8 @@ static const struct reg_default marley_reg_default[] = { { 0x00000062, 0x01ff }, /* R98 (0x62) - Sample Rate Sequence Select 2 */ { 0x00000063, 0x01ff }, /* R99 (0x63) - Sample Rate Sequence Select 3 */ { 0x00000064, 0x01ff }, /* R100 (0x64) - Sample Rate Sequence Select 4*/ - { 0x00000066, 0x01ff }, /* R102 (0x66) - Always On Triggers Sequence - Select 1*/ - { 0x00000067, 0x01ff }, /* R103 (0x67) - Always On Triggers Sequence - Select 2*/ + { 0x00000066, 0x01ff }, /* R102 (0x66) - Always On Triggers Sequence Select 1*/ + { 0x00000067, 0x01ff }, /* R103 (0x67) - Always On Triggers Sequence Select 2*/ { 0x00000090, 0x0000 }, /* R144 (0x90) - Haptics Control 1 */ { 0x00000091, 0x7fff }, /* R145 (0x91) - Haptics Control 2 */ { 0x00000092, 0x0000 }, /* R146 (0x92) - Haptics phase 1 intensity */ @@ -153,6 +150,7 @@ static const struct reg_default marley_reg_default[] = { { 0x00000187, 0x0000 }, /* R391 (0x187) - FLL1 Spread Spectrum */ { 0x00000188, 0x000c }, /* R392 (0x188) - FLL1 GPIO Clock */ { 0x00000200, 0x0006 }, /* R512 (0x200) - Mic Charge Pump 1 */ + { 0x0000020B, 0x0400 }, /* R523 (0x20B) - HP Charge Pump 8 */ { 0x00000213, 0x03e4 }, /* R531 (0x213) - LDO2 Control 1 */ { 0x00000218, 0x00e6 }, /* R536 (0x218) - Mic Bias Ctrl 1 */ { 0x00000219, 0x00e6 }, /* R537 (0x219) - Mic Bias Ctrl 2 */ @@ -171,6 +169,7 @@ static const struct reg_default marley_reg_default[] = { { 0x000002c6, 0x0010 }, /* R710 (0x2c5) - Mic Clamp control */ { 0x000002c8, 0x0000 }, /* R712 (0x2C8) - GP switch 1 */ { 0x000002d3, 0x0000 }, /* R723 (0x2D3) - Jack detect analogue */ + { 0x00000300, 0x0000 }, /* R768 (0x300) - Input Enables */ { 0x00000308, 0x0000 }, /* R776 (0x308) - Input Rate */ { 0x00000309, 0x0022 }, /* R777 (0x309) - Input Volume Ramp */ { 0x0000030c, 0x0002 }, /* R780 (0x30C) - HPF Control */ @@ -205,19 +204,14 @@ static const struct reg_default marley_reg_default[] = { { 0x00000435, 0x0180 }, /* R1077 (0x435) - DAC Digital Volume 5R */ { 0x00000437, 0x0200 }, /* R1079 (0x437) - Noise Gate Select 5R */ { 0x00000440, 0x0003 }, /* R1088 (0x440) - DRE Enable */ - { 0x00000441, 0xC050 }, /* R1089 (0x441) - DRE Control 1 */ - { 0x00000442, 0x0305 }, /* R1090 (0x442) - DRE Control 2 */ - { 0x00000443, 0x5cfa }, /* R1091 (0x443) - DRE Control 3 */ { 0x00000448, 0x0a83 }, /* R1096 (0x448) - eDRE Enable */ { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */ - { 0x00000451, 0x0000 }, /* R1105 (0x451) - DAC AEC Control 2*/ { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */ { 0x00000490, 0x0069 }, /* R1168 (0x490) - PDM SPK1 CTRL 1 */ { 0x00000491, 0x0000 }, /* R1169 (0x491) - PDM SPK1 CTRL 2 */ { 0x000004a0, 0x3080 }, /* R1184 (0x4a0) - HP1 Short Circuit Ctrl */ { 0x000004a8, 0x7120 }, /* R1192 (0x4a8) - HP Test Ctrl 5 */ { 0x000004a9, 0x7120 }, /* R1193 (0x4a9) - HP Test Ctrl 6 */ - { 0x000004b6, 0x0080 }, /* R1206 (0x4b6) - SPK IF Control 9*/ { 0x00000500, 0x000c }, /* R1280 (0x500) - AIF1 BCLK Ctrl */ { 0x00000501, 0x0000 }, /* R1281 (0x501) - AIF1 Tx Pin Ctrl */ { 0x00000502, 0x0000 }, /* R1282 (0x502) - AIF1 Rx Pin Ctrl */ @@ -241,7 +235,6 @@ static const struct reg_default marley_reg_default[] = { { 0x00000516, 0x0005 }, /* R1302 (0x516) - AIF1 Frame Ctrl 16 */ { 0x00000519, 0x0000 }, /* R1305 (0x519) - AIF1 Tx Enables */ { 0x0000051a, 0x0000 }, /* R1306 (0x51A) - AIF1 Rx Enables */ - { 0x0000051b, 0x0000 }, /* R1307 (0x51B) - AIF1 Force Write */ { 0x00000540, 0x000c }, /* R1344 (0x540) - AIF2 BCLK Ctrl */ { 0x00000541, 0x0000 }, /* R1345 (0x541) - AIF2 Tx Pin Ctrl */ { 0x00000542, 0x0000 }, /* R1346 (0x542) - AIF2 Rx Pin Ctrl */ @@ -257,7 +250,6 @@ static const struct reg_default marley_reg_default[] = { { 0x00000552, 0x0001 }, /* R1362 (0x552) - AIF2 Frame Ctrl 12 */ { 0x00000559, 0x0000 }, /* R1369 (0x559) - AIF2 Tx Enables */ { 0x0000055a, 0x0000 }, /* R1370 (0x55A) - AIF2 Rx Enables */ - { 0x0000055b, 0x0000 }, /* R1371 (0x55B) - AIF2 Force Write */ { 0x00000580, 0x000c }, /* R1408 (0x580) - AIF3 BCLK Ctrl */ { 0x00000581, 0x0000 }, /* R1409 (0x581) - AIF3 Tx Pin Ctrl */ { 0x00000582, 0x0000 }, /* R1410 (0x582) - AIF3 Rx Pin Ctrl */ @@ -273,7 +265,6 @@ static const struct reg_default marley_reg_default[] = { { 0x00000592, 0x0001 }, /* R1426 (0x592) - AIF3 Frame Ctrl 12 */ { 0x00000599, 0x0000 }, /* R1433 (0x599) - AIF3 Tx Enables */ { 0x0000059a, 0x0000 }, /* R1434 (0x59A) - AIF3 Rx Enables */ - { 0x0000059b, 0x0000 }, /* R1435 (0x59B) - AIF3 Force Write */ { 0x000005c2, 0x0000 }, /* R1474 (0x5c2) - SPD1 TX Control */ { 0x000005e3, 0x0000 }, /* R1507 (0x5E3) - SLIMbus Framer Ref Gear */ { 0x000005e5, 0x0000 }, /* R1509 (0x5E5) - SLIMbus Rates 1 */ @@ -759,20 +750,8 @@ static const struct reg_default marley_reg_default[] = { { 0x00000ef3, 0x0000 }, /* R3827 (0xef3) - ISRC 2 CTRL 1 */ { 0x00000ef4, 0x0001 }, /* R3828 (0xef4) - ISRC 2 CTRL 2 */ { 0x00000ef5, 0x0000 }, /* R3829 (0xef5) - ISRC 2 CTRL 3 */ - { 0x00001200, 0x0000 }, /* R4608 (0x1200) - Clock enable overrides 1 */ - { 0x00001204, 0x0000 }, /* R4612 (0x1204) - Clock enable overrides 3 */ - { 0x00001206, 0x0000 }, /* R4614 (0x1206) - Clock enable overrides 4 */ - { 0x00001210, 0x0000 }, /* R4624 (0x1210) - Clock enable overrides 9 */ - { 0x00001212, 0x0000 }, /* R4626 (0x1212) - Clock enable overrides 10 */ - { 0x00001214, 0x0000 }, /* R4628 (0x1214) - Clock enable overrides 11 */ - { 0x00001216, 0x0000 }, /* R4630 (0x1216) - Clock enable overrides 12 */ { 0x00001300, 0x0000 }, /* R4864 (0x1300) - DAC Comp 1 */ { 0x00001302, 0x0000 }, /* R4866 (0x1302) - DAC Comp 2 */ - { 0x00001340, 0x0000 }, /* R4928 (0x1340) - DAC comp 1L */ - { 0x00001341, 0x0000 }, /* R4929 (0x1341) - DAC comp 1R */ - { 0x00001346, 0x0000 }, /* R4929 (0x1346) - DAC comp 4L */ - { 0x00001348, 0x0000 }, /* R4936 (0x1348) - DAC comp 5L */ - { 0x00001349, 0x0000 }, /* R4937 (0x1349) - DAC comp 5R */ { 0x00001380, 0x0000 }, /* R4992 (0x1380) - FRF Coefficient 1L 1 */ { 0x00001381, 0x0000 }, /* R4993 (0x1381) - FRF Coefficient 1L 2 */ { 0x00001382, 0x0000 }, /* R4994 (0x1382) - FRF Coefficient 1L 3 */ @@ -984,33 +963,23 @@ static bool marley_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DMIC2R_CONTROL: case ARIZONA_OUTPUT_ENABLES_1: case ARIZONA_OUTPUT_STATUS_1: - case ARIZONA_OUTPUT_STANDBY_1: case ARIZONA_RAW_OUTPUT_STATUS_1: case ARIZONA_OUTPUT_RATE_1: case ARIZONA_OUTPUT_VOLUME_RAMP: case ARIZONA_OUTPUT_PATH_CONFIG_1L: case ARIZONA_DAC_DIGITAL_VOLUME_1L: - case ARIZONA_DAC_VOLUME_LIMIT_1L: case ARIZONA_NOISE_GATE_SELECT_1L: case ARIZONA_OUTPUT_PATH_CONFIG_1R: case ARIZONA_DAC_DIGITAL_VOLUME_1R: - case ARIZONA_DAC_VOLUME_LIMIT_1R: case ARIZONA_NOISE_GATE_SELECT_1R: case ARIZONA_OUTPUT_PATH_CONFIG_4L: case ARIZONA_DAC_DIGITAL_VOLUME_4L: - case ARIZONA_OUT_VOLUME_4L: case ARIZONA_NOISE_GATE_SELECT_4L: - case ARIZONA_OUTPUT_PATH_CONFIG_4R: - case ARIZONA_DAC_DIGITAL_VOLUME_4R: - case ARIZONA_OUT_VOLUME_4R: - case ARIZONA_NOISE_GATE_SELECT_4R: case ARIZONA_OUTPUT_PATH_CONFIG_5L: case ARIZONA_DAC_DIGITAL_VOLUME_5L: - case ARIZONA_DAC_VOLUME_LIMIT_5L: case ARIZONA_NOISE_GATE_SELECT_5L: case ARIZONA_OUTPUT_PATH_CONFIG_5R: case ARIZONA_DAC_DIGITAL_VOLUME_5R: - case ARIZONA_DAC_VOLUME_LIMIT_5R: case ARIZONA_NOISE_GATE_SELECT_5R: case ARIZONA_DRE_ENABLE: case CLEARWATER_EDRE_ENABLE: @@ -1021,7 +990,6 @@ static bool marley_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_HP1_SHORT_CIRCUIT_CTRL: case ARIZONA_HP_TEST_CTRL_5: case ARIZONA_HP_TEST_CTRL_6: - case ARIZONA_SPK_CTRL_3: case ARIZONA_AIF1_BCLK_CTRL: case ARIZONA_AIF1_TX_PIN_CTRL: case ARIZONA_AIF1_RX_PIN_CTRL: @@ -1274,6 +1242,10 @@ static bool marley_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_SLIMTX6MIX_INPUT_3_VOLUME: case ARIZONA_SLIMTX6MIX_INPUT_4_SOURCE: case ARIZONA_SLIMTX6MIX_INPUT_4_VOLUME: + case ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE: + case ARIZONA_SPDIFTX1MIX_INPUT_1_VOLUME: + case ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE: + case ARIZONA_SPDIFTX2MIX_INPUT_1_VOLUME: case ARIZONA_EQ1MIX_INPUT_1_SOURCE: case ARIZONA_EQ1MIX_INPUT_1_VOLUME: case ARIZONA_EQ1MIX_INPUT_2_SOURCE: @@ -1648,17 +1620,6 @@ static bool marley_16bit_readable_register(struct device *dev, unsigned int reg) case CLEARWATER_IRQ1_MASK_13: case CLEARWATER_IRQ1_MASK_14: case CLEARWATER_IRQ1_MASK_15: - case CLEARWATER_IRQ1_MASK_17: - case CLEARWATER_IRQ1_MASK_21: - case CLEARWATER_IRQ1_MASK_22: - case CLEARWATER_IRQ1_MASK_23: - case CLEARWATER_IRQ1_MASK_24: - case CLEARWATER_IRQ1_MASK_25: - case CLEARWATER_IRQ1_MASK_27: - case CLEARWATER_IRQ1_MASK_28: - case CLEARWATER_IRQ1_MASK_30: - case CLEARWATER_IRQ1_MASK_31: - case CLEARWATER_IRQ1_MASK_32: case CLEARWATER_IRQ1_RAW_STATUS_1: case CLEARWATER_IRQ1_RAW_STATUS_2: case CLEARWATER_IRQ1_RAW_STATUS_7: @@ -1708,10 +1669,6 @@ static bool marley_16bit_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_INPUT_ENABLES_STATUS: case ARIZONA_OUTPUT_STATUS_1: case ARIZONA_RAW_OUTPUT_STATUS_1: - case ARIZONA_ADC_VCO_CAL_4: - case ARIZONA_ADC_VCO_CAL_5: - case ARIZONA_ADC_VCO_CAL_6: - case ARIZONA_ADC_VCO_CAL_7: case ARIZONA_SPD1_TX_CHANNEL_STATUS_1: case ARIZONA_SPD1_TX_CHANNEL_STATUS_2: case ARIZONA_SPD1_TX_CHANNEL_STATUS_3: diff --git a/drivers/mfd/vegas-tables.c b/drivers/mfd/vegas-tables.c index 0515fd244eb..0920e189541 100644 --- a/drivers/mfd/vegas-tables.c +++ b/drivers/mfd/vegas-tables.c @@ -200,8 +200,6 @@ static const struct reg_default vegas_reg_default[] = { { 0x00000069, 0x01FF }, /* R105 - Always On Triggers Sequence Select 4 */ { 0x0000006A, 0x01FF }, /* R106 - Always On Triggers Sequence Select 5 */ { 0x0000006B, 0x01FF }, /* R107 - Always On Triggers Sequence Select 6 */ - { 0x0000006E, 0x01FF }, /* R110 - Trigger Sequence Select 32 */ - { 0x0000006F, 0x01FF }, /* R111 - Trigger Sequence Select 33 */ { 0x00000090, 0x0000 }, /* R144 - Haptics Control 1 */ { 0x00000091, 0x7FFF }, /* R145 - Haptics Control 2 */ { 0x00000092, 0x0000 }, /* R146 - Haptics phase 1 intensity */ @@ -271,16 +269,13 @@ static const struct reg_default vegas_reg_default[] = { { 0x0000021A, 0x01A6 }, /* R538 - Mic Bias Ctrl 3 */ { 0x00000293, 0x0080 }, /* R659 - Accessory Detect Mode 1 */ { 0x0000029B, 0x0000 }, /* R667 - Headphone Detect 1 */ - { 0x0000029C, 0x0000 }, /* R668 - Headphone Detect 2 */ { 0x000002A2, 0x0000 }, /* R674 - Micd Clamp control */ { 0x000002A3, 0x1102 }, /* R675 - Mic Detect 1 */ { 0x000002A4, 0x009F }, /* R676 - Mic Detect 2 */ - { 0x000002A5, 0x0000 }, /* R677 - Mic Detect 3 */ { 0x000002A6, 0x3737 }, /* R678 - Mic Detect Level 1 */ { 0x000002A7, 0x2C37 }, /* R679 - Mic Detect Level 2 */ { 0x000002A8, 0x1422 }, /* R680 - Mic Detect Level 3 */ { 0x000002A9, 0x030A }, /* R681 - Mic Detect Level 4 */ - { 0x000002AB, 0x0000 }, /* R683 - Mic Detect 4 */ { 0x000002CB, 0x0000 }, /* R715 - Isolation control */ { 0x000002D3, 0x0000 }, /* R723 - Jack detect analogue */ { 0x00000300, 0x0000 }, /* R768 - Input Enables */ @@ -708,13 +703,11 @@ static const struct reg_default vegas_reg_default[] = { { 0x00000D1A, 0xFFFF }, /* R3354 - IRQ2 Status 3 Mask */ { 0x00000D1B, 0xFFFF }, /* R3355 - IRQ2 Status 4 Mask */ { 0x00000D1C, 0xFEFF }, /* R3356 - IRQ2 Status 5 Mask */ - { 0x00000D1D, 0xFFFF }, /* R3357 - IRQ2 Status 6 Mask */ { 0x00000D1F, 0x0000 }, /* R3359 - IRQ2 Control */ { 0x00000D53, 0xFFFF }, /* R3411 - AOD IRQ Mask IRQ1 */ { 0x00000D54, 0xFFFF }, /* R3412 - AOD IRQ Mask IRQ2 */ { 0x00000D56, 0x0000 }, /* R3414 - Jack detect debounce */ { 0x00000E00, 0x0000 }, /* R3584 - FX_Ctrl1 */ - { 0x00000E01, 0x0000 }, /* R3585 - FX_Ctrl2 */ { 0x00000E10, 0x6318 }, /* R3600 - EQ1_1 */ { 0x00000E11, 0x6300 }, /* R3601 - EQ1_2 */ { 0x00000E12, 0x0FC8 }, /* R3602 - EQ1_3 */ @@ -834,7 +827,6 @@ static bool vegas_readable_register(struct device *dev, unsigned int reg) switch (reg) { case ARIZONA_SOFTWARE_RESET: case ARIZONA_DEVICE_REVISION: - case ARIZONA_CTRL_IF_SPI_CFG_1: case ARIZONA_CTRL_IF_I2C1_CFG_1: case ARIZONA_CTRL_IF_I2C1_CFG_2: case ARIZONA_WRITE_SEQUENCER_CTRL_0: diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index ed5de999a24..9977739d846 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -342,8 +342,6 @@ static const struct reg_default wm5102_reg_default[] = { { 0x00000069, 0x01FF }, /* R105 - Always On Triggers Sequence Select 4 */ { 0x0000006A, 0x01FF }, /* R106 - Always On Triggers Sequence Select 5 */ { 0x0000006B, 0x01FF }, /* R107 - Always On Triggers Sequence Select 6 */ - { 0x0000006E, 0x01FF }, /* R110 - Trigger Sequence Select 32 */ - { 0x0000006F, 0x01FF }, /* R111 - Trigger Sequence Select 33 */ { 0x00000070, 0x0000 }, /* R112 - Comfort Noise Generator */ { 0x00000090, 0x0000 }, /* R144 - Haptics Control 1 */ { 0x00000091, 0x7FFF }, /* R145 - Haptics Control 2 */ @@ -376,7 +374,6 @@ static const struct reg_default wm5102_reg_default[] = { { 0x00000175, 0x0004 }, /* R373 - FLL1 Control 5 */ { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */ { 0x00000177, 0x0181 }, /* R375 - FLL1 Loop Filter Test 1 */ - { 0x00000178, 0x0000 }, /* R376 - FLL1 NCO Test 0 */ { 0x00000179, 0x0000 }, /* R377 - FLL1 Control 7 */ { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */ { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */ @@ -394,7 +391,6 @@ static const struct reg_default wm5102_reg_default[] = { { 0x00000195, 0x0004 }, /* R405 - FLL2 Control 5 */ { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */ { 0x00000197, 0x0000 }, /* R407 - FLL2 Loop Filter Test 1 */ - { 0x00000198, 0x0000 }, /* R408 - FLL2 NCO Test 0 */ { 0x00000199, 0x0000 }, /* R409 - FLL2 Control 7 */ { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */ { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */ @@ -414,12 +410,9 @@ static const struct reg_default wm5102_reg_default[] = { { 0x0000021A, 0x01A6 }, /* R538 - Mic Bias Ctrl 3 */ { 0x00000293, 0x0000 }, /* R659 - Accessory Detect Mode 1 */ { 0x0000029B, 0x0020 }, /* R667 - Headphone Detect 1 */ - { 0x0000029C, 0x0000 }, /* R668 - Headphone Detect 2 */ - { 0x0000029F, 0x0000 }, /* R671 - Headphone Detect Test */ { 0x000002A2, 0x0000 }, /* R674 - Micd clamp control */ { 0x000002A3, 0x1102 }, /* R675 - Mic Detect 1 */ { 0x000002A4, 0x009F }, /* R676 - Mic Detect 2 */ - { 0x000002A5, 0x0000 }, /* R677 - Mic Detect 3 */ { 0x000002A6, 0x3737 }, /* R678 - Mic Detect Level 1 */ { 0x000002A7, 0x372C }, /* R679 - Mic Detect Level 2 */ { 0x000002A8, 0x1422 }, /* R680 - Mic Detect Level 3 */ @@ -963,11 +956,11 @@ static const struct reg_default wm5102_reg_default[] = { { 0x00000D1B, 0xFFFF }, /* R3355 - IRQ2 Status 4 Mask */ { 0x00000D1C, 0xFFFF }, /* R3356 - IRQ2 Status 5 Mask */ { 0x00000D1F, 0x0000 }, /* R3359 - IRQ2 Control */ + { 0x00000D41, 0x0000 }, /* R3393 - ADSP2 IRQ0 */ { 0x00000D53, 0xFFFF }, /* R3411 - AOD IRQ Mask IRQ1 */ { 0x00000D54, 0xFFFF }, /* R3412 - AOD IRQ Mask IRQ2 */ { 0x00000D56, 0x0000 }, /* R3414 - Jack detect debounce */ { 0x00000E00, 0x0000 }, /* R3584 - FX_Ctrl1 */ - { 0x00000E01, 0x0000 }, /* R3585 - FX_Ctrl2 */ { 0x00000E10, 0x6318 }, /* R3600 - EQ1_1 */ { 0x00000E11, 0x6300 }, /* R3601 - EQ1_2 */ { 0x00000E12, 0x0FC8 }, /* R3602 - EQ1_3 */ @@ -1075,7 +1068,6 @@ static const struct reg_default wm5102_reg_default[] = { { 0x00000EF4, 0x0000 }, /* R3828 - ISRC 2 CTRL 2 */ { 0x00000EF5, 0x0000 }, /* R3829 - ISRC 2 CTRL 3 */ { 0x00001100, 0x0010 }, /* R4352 - DSP1 Control 1 */ - { 0x00001101, 0x0000 }, /* R4353 - DSP1 Clocking 1 */ }; static bool wm5102_readable_register(struct device *dev, unsigned int reg) @@ -1085,12 +1077,10 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DEVICE_REVISION: case ARIZONA_CTRL_IF_SPI_CFG_1: case ARIZONA_CTRL_IF_I2C1_CFG_1: - case ARIZONA_CTRL_IF_STATUS_1: case ARIZONA_WRITE_SEQUENCER_CTRL_0: case ARIZONA_WRITE_SEQUENCER_CTRL_1: case ARIZONA_WRITE_SEQUENCER_CTRL_2: case ARIZONA_WRITE_SEQUENCER_CTRL_3: - case ARIZONA_WRITE_SEQUENCER_PROM: case ARIZONA_TONE_GENERATOR_1: case ARIZONA_TONE_GENERATOR_2: case ARIZONA_TONE_GENERATOR_3: @@ -1111,8 +1101,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4: case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5: case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6: - case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_7: - case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_8: case ARIZONA_COMFORT_NOISE_GENERATOR: case ARIZONA_HAPTICS_CONTROL_1: case ARIZONA_HAPTICS_CONTROL_2: @@ -1253,7 +1241,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DAC_DIGITAL_VOLUME_4L: case ARIZONA_OUT_VOLUME_4L: case ARIZONA_NOISE_GATE_SELECT_4L: - case ARIZONA_OUTPUT_PATH_CONFIG_4R: case ARIZONA_DAC_DIGITAL_VOLUME_4R: case ARIZONA_OUT_VOLUME_4R: case ARIZONA_NOISE_GATE_SELECT_4R: @@ -1261,7 +1248,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DAC_DIGITAL_VOLUME_5L: case ARIZONA_DAC_VOLUME_LIMIT_5L: case ARIZONA_NOISE_GATE_SELECT_5L: - case ARIZONA_OUTPUT_PATH_CONFIG_5R: case ARIZONA_DAC_DIGITAL_VOLUME_5R: case ARIZONA_DAC_VOLUME_LIMIT_5R: case ARIZONA_NOISE_GATE_SELECT_5R: @@ -1272,8 +1258,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_NOISE_GATE_CONTROL: case ARIZONA_PDM_SPK1_CTRL_1: case ARIZONA_PDM_SPK1_CTRL_2: - case ARIZONA_SPK_CTRL_2: - case ARIZONA_SPK_CTRL_3: case ARIZONA_DAC_COMP_1: case ARIZONA_DAC_COMP_2: case ARIZONA_DAC_COMP_3: @@ -1305,7 +1289,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_AIF1_FRAME_CTRL_18: case ARIZONA_AIF1_TX_ENABLES: case ARIZONA_AIF1_RX_ENABLES: - case ARIZONA_AIF1_FORCE_WRITE: case ARIZONA_AIF2_BCLK_CTRL: case ARIZONA_AIF2_TX_PIN_CTRL: case ARIZONA_AIF2_RX_PIN_CTRL: @@ -1321,7 +1304,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_AIF2_FRAME_CTRL_12: case ARIZONA_AIF2_TX_ENABLES: case ARIZONA_AIF2_RX_ENABLES: - case ARIZONA_AIF2_FORCE_WRITE: case ARIZONA_AIF3_BCLK_CTRL: case ARIZONA_AIF3_TX_PIN_CTRL: case ARIZONA_AIF3_RX_PIN_CTRL: @@ -1337,7 +1319,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_AIF3_FRAME_CTRL_12: case ARIZONA_AIF3_TX_ENABLES: case ARIZONA_AIF3_RX_ENABLES: - case ARIZONA_AIF3_FORCE_WRITE: case ARIZONA_SLIMBUS_FRAMER_REF_GEAR: case ARIZONA_SLIMBUS_RATES_1: case ARIZONA_SLIMBUS_RATES_2: @@ -1663,22 +1644,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DRC1RMIX_INPUT_3_VOLUME: case ARIZONA_DRC1RMIX_INPUT_4_SOURCE: case ARIZONA_DRC1RMIX_INPUT_4_VOLUME: - case ARIZONA_DRC2LMIX_INPUT_1_SOURCE: - case ARIZONA_DRC2LMIX_INPUT_1_VOLUME: - case ARIZONA_DRC2LMIX_INPUT_2_SOURCE: - case ARIZONA_DRC2LMIX_INPUT_2_VOLUME: - case ARIZONA_DRC2LMIX_INPUT_3_SOURCE: - case ARIZONA_DRC2LMIX_INPUT_3_VOLUME: - case ARIZONA_DRC2LMIX_INPUT_4_SOURCE: - case ARIZONA_DRC2LMIX_INPUT_4_VOLUME: - case ARIZONA_DRC2RMIX_INPUT_1_SOURCE: - case ARIZONA_DRC2RMIX_INPUT_1_VOLUME: - case ARIZONA_DRC2RMIX_INPUT_2_SOURCE: - case ARIZONA_DRC2RMIX_INPUT_2_VOLUME: - case ARIZONA_DRC2RMIX_INPUT_3_SOURCE: - case ARIZONA_DRC2RMIX_INPUT_3_VOLUME: - case ARIZONA_DRC2RMIX_INPUT_4_SOURCE: - case ARIZONA_DRC2RMIX_INPUT_4_VOLUME: case ARIZONA_HPLP1MIX_INPUT_1_SOURCE: case ARIZONA_HPLP1MIX_INPUT_1_VOLUME: case ARIZONA_HPLP1MIX_INPUT_2_SOURCE: @@ -1887,11 +1852,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DRC1_CTRL3: case ARIZONA_DRC1_CTRL4: case ARIZONA_DRC1_CTRL5: - case ARIZONA_DRC2_CTRL1: - case ARIZONA_DRC2_CTRL2: - case ARIZONA_DRC2_CTRL3: - case ARIZONA_DRC2_CTRL4: - case ARIZONA_DRC2_CTRL5: case ARIZONA_HPLPF1_1: case ARIZONA_HPLPF1_2: case ARIZONA_HPLPF2_1: @@ -1909,9 +1869,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_ISRC_2_CTRL_1: case ARIZONA_ISRC_2_CTRL_2: case ARIZONA_ISRC_2_CTRL_3: - case ARIZONA_ISRC_3_CTRL_1: - case ARIZONA_ISRC_3_CTRL_2: - case ARIZONA_ISRC_3_CTRL_3: case ARIZONA_DSP1_CONTROL_1: case ARIZONA_DSP1_CLOCKING_1: case ARIZONA_DSP1_STATUS_1: @@ -1960,7 +1917,6 @@ static bool wm5102_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_WRITE_SEQUENCER_CTRL_2: case ARIZONA_WRITE_SEQUENCER_CTRL_3: case ARIZONA_OUTPUT_STATUS_1: - case ARIZONA_RAW_OUTPUT_STATUS_1: case ARIZONA_SLIMBUS_RX_PORT_STATUS: case ARIZONA_SLIMBUS_TX_PORT_STATUS: case ARIZONA_SAMPLE_RATE_1_STATUS: diff --git a/drivers/mfd/wm8997-tables.c b/drivers/mfd/wm8997-tables.c index 033b73a9ae2..9dea52f64e9 100644 --- a/drivers/mfd/wm8997-tables.c +++ b/drivers/mfd/wm8997-tables.c @@ -240,7 +240,6 @@ static const struct reg_default wm8997_reg_default[] = { { 0x0000029B, 0x0020 }, /* R667 - Headphone Detect 1 */ { 0x000002A3, 0x1102 }, /* R675 - Mic Detect 1 */ { 0x000002A4, 0x009F }, /* R676 - Mic Detect 2 */ - { 0x000002A5, 0x0000 }, /* R677 - Mic Detect 3 */ { 0x000002C3, 0x0000 }, /* R707 - Mic noise mix control 1 */ { 0x000002CB, 0x0000 }, /* R715 - Isolation control */ { 0x000002D3, 0x0000 }, /* R723 - Jack detect analogue */ @@ -680,7 +679,6 @@ static const struct reg_default wm8997_reg_default[] = { { 0x00000D54, 0xFFFF }, /* R3412 - AOD IRQ Mask IRQ2 */ { 0x00000D56, 0x0000 }, /* R3414 - Jack detect debounce */ { 0x00000E00, 0x0000 }, /* R3584 - FX_Ctrl1 */ - { 0x00000E01, 0x0000 }, /* R3585 - FX_Ctrl2 */ { 0x00000E10, 0x6318 }, /* R3600 - EQ1_1 */ { 0x00000E11, 0x6300 }, /* R3601 - EQ1_2 */ { 0x00000E12, 0x0FC8 }, /* R3602 - EQ1_3 */ @@ -784,8 +782,6 @@ static const struct reg_default wm8997_reg_default[] = { { 0x00000EF3, 0x0000 }, /* R3827 - ISRC 2 CTRL 1 */ { 0x00000EF4, 0x0000 }, /* R3828 - ISRC 2 CTRL 2 */ { 0x00000EF5, 0x0000 }, /* R3829 - ISRC 2 CTRL 3 */ - { 0x00001100, 0x0010 }, /* R4352 - DSP1 Control 1 */ - { 0x00001101, 0x0000 }, /* R4353 - DSP1 Clocking 1 */ }; static bool wm8997_readable_register(struct device *dev, unsigned int reg) @@ -1476,6 +1472,8 @@ static bool wm8997_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_SAMPLE_RATE_2_STATUS: case ARIZONA_SAMPLE_RATE_3_STATUS: case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: + case ARIZONA_FLL1_NCO_TEST_0: + case ARIZONA_FLL2_NCO_TEST_0: case ARIZONA_MIC_DETECT_3: case ARIZONA_HEADPHONE_DETECT_2: case ARIZONA_INPUT_ENABLES_STATUS: From 48af1e13f28ec16f04cab1a3220bd6ef4a11b385 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 30 Jun 2015 14:31:21 +0100 Subject: [PATCH 0858/1167] extcon: arizona: Use correct debounce register for Clearwater The ARIZONA_JACK_DETECT_DEBOUNCE register doesn't exist on Clearwater and later codecs, instead debounce is set by CLEARWATER_INTERRUPT_DEBOUNCE_7 Change-Id: I3276744227517f63ba3bd48feafd88a6c3081216 Signed-off-by: Richard Fitzgerald --- drivers/extcon/extcon-arizona.c | 33 +++++++++++++++++++++++++++++---- 1 file changed, 29 insertions(+), 4 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 82c9a8f88d4..016e00f2c5b 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -1465,7 +1465,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); struct arizona_pdata *pdata = &arizona->pdata; struct arizona_extcon_info *info; - unsigned int reg; + unsigned int reg, debounce_reg, debounce_val, analog_val; int jack_irq_fall, jack_irq_rise; int ret, mode, i, j; @@ -1757,10 +1757,35 @@ static int arizona_extcon_probe(struct platform_device *pdev) } arizona_clk32k_enable(arizona); - regmap_update_bits(arizona->regmap, ARIZONA_JACK_DETECT_DEBOUNCE, - ARIZONA_JD1_DB, ARIZONA_JD1_DB); + + switch (arizona->type) { + case WM8997: + case WM5102: + case WM1814: + case WM8998: + case WM8280: + case WM5110: + debounce_reg = ARIZONA_JACK_DETECT_DEBOUNCE; + debounce_val = ARIZONA_JD1_DB; + analog_val = ARIZONA_JD1_ENA; + break; + default: + debounce_reg = CLEARWATER_INTERRUPT_DEBOUNCE_7; + + if (arizona->pdata.jd_gpio5) { + debounce_val = CLEARWATER_JD1_DB | CLEARWATER_JD2_DB; + analog_val = ARIZONA_JD1_ENA | ARIZONA_JD2_ENA; + } else { + debounce_val = CLEARWATER_JD1_DB; + analog_val = ARIZONA_JD1_ENA; + } + break; + } + + regmap_update_bits(arizona->regmap, debounce_reg, + debounce_val, debounce_val); regmap_update_bits(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, - ARIZONA_JD1_ENA, ARIZONA_JD1_ENA); + analog_val, analog_val); ret = regulator_allow_bypass(info->micvdd, true); if (ret != 0) From 46b7246a3485f9c2a3cb4ab56fbbcea5f1b80b7b Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 29 May 2015 13:18:23 +0100 Subject: [PATCH 0859/1167] ASoC: wm_adsp: Dump scratch registers on DSP shutdown [switching to upstream version] The SCRATCH registers are used by firmwares to hold diagnostic information. Log this during shutdown to assist analysis and debug of firmwares. Change-Id: Iaead7843ad33cd1fe4680d6e62b208d93269846b Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 61 ++++++++++++++++++++++++++++++-------- 1 file changed, 48 insertions(+), 13 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 5ccba55ec79..8f17236aa63 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -700,6 +700,49 @@ static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *mem, } } +static void wm_adsp2_show_fw_status(struct wm_adsp *dsp) +{ + u16 scratch[4]; + int ret; + + ret = regmap_raw_read(dsp->regmap, dsp->base + ADSP2_SCRATCH0, + scratch, sizeof(scratch)); + + if (ret) { + adsp_err(dsp, "Failed to read SCRATCH regs: %d\n", ret); + return; + } + + adsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n", + be16_to_cpu(scratch[0]), + be16_to_cpu(scratch[1]), + be16_to_cpu(scratch[2]), + be16_to_cpu(scratch[3])); +} + +static void wm_adsp2v2_show_fw_status(struct wm_adsp *dsp) +{ + u32 scratch[2]; + int ret; + + ret = regmap_raw_read(dsp->regmap, dsp->base + ADSP2V2_SCRATCH0_1, + scratch, sizeof(scratch)); + + if (ret) { + adsp_err(dsp, "Failed to read SCRATCH regs: %d\n", ret); + return; + } + + scratch[0] = be32_to_cpu(scratch[0]); + scratch[1] = be32_to_cpu(scratch[1]); + + adsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n", + scratch[0] & 0xFFFF, + scratch[0] >> 16, + scratch[1] & 0xFFFF, + scratch[1] >> 16); +} + static int wm_coeff_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { @@ -2381,7 +2424,6 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, struct wm_adsp *dsp = &dsps[w->shift]; struct wm_adsp_alg_region *alg_region; struct wm_coeff_ctl *ctl; - unsigned int scratch1 = 0xFFFFFFFF; int ret; switch (event) { @@ -2401,22 +2443,15 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, break; case SND_SOC_DAPM_PRE_PMD: - /* Capture DSP_SCRATCH1, it can be useful for analysis */ + /* Log firmware state, it can be useful for analysis */ switch (dsp->rev) { case 0: - ret = regmap_read(dsp->regmap, - dsp->base + ADSP2_SCRATCH1, - &scratch1); + wm_adsp2_show_fw_status(dsp); break; default: - ret = regmap_read(dsp->regmap, - dsp->base + ADSP2V2_SCRATCH0_1, - &scratch1); + wm_adsp2v2_show_fw_status(dsp); break; - } - - if (ret < 0) - adsp_err(dsp, "Failed to read SCRATCH1 %d\n", ret); + }; if (dsp->fw_features.shutdown) wm_adsp_edac_shutdown(dsp); @@ -2468,7 +2503,7 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, kfree(alg_region); } - adsp_info(dsp, "Shutdown complete (SCRATCH1:0x%x)\n", scratch1); + adsp_info(dsp, "Shutdown complete\n"); break; default: From c206cf022bcbe35dd76a856628c3b39605c86952 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Mon, 6 Jul 2015 16:34:49 +0100 Subject: [PATCH 0860/1167] ASoC: Disable THR2 during enable/disable Correct the pre/post enable sequences to also disable THR2 (in addition to muting. Change-Id: I7b1fd9fcc9dd9067750d5997c79603f0d6afa2f1 Signed-off-by: Nariman Poushin --- sound/soc/codecs/arizona.c | 27 ++++++++++++++++++++++++++- sound/soc/codecs/arizona.h | 1 + 2 files changed, 27 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index d7f33da3dc3..b5f43cce1e8 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -314,16 +314,18 @@ static int vegas_spk_pre_enable(struct snd_soc_dapm_widget *w, { struct snd_soc_codec *codec = w->codec; struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); - unsigned int mute_reg, mute_mask; + unsigned int mute_reg, mute_mask, thr2_mask; switch (w->shift) { case ARIZONA_OUT4L_ENA_SHIFT: mute_reg = ARIZONA_DAC_DIGITAL_VOLUME_4L; mute_mask = ARIZONA_OUT4L_MUTE_MASK; + thr2_mask = CLEARWATER_EDRE_OUT4L_THR2_ENA_MASK; break; case ARIZONA_OUT4R_ENA_SHIFT: mute_reg = ARIZONA_DAC_DIGITAL_VOLUME_4R; mute_mask = ARIZONA_OUT4R_MUTE_MASK; + thr2_mask = CLEARWATER_EDRE_OUT4R_THR2_ENA_MASK; break; default: return 0; @@ -334,6 +336,13 @@ static int vegas_spk_pre_enable(struct snd_soc_dapm_widget *w, priv->spk_mute_cache |= snd_soc_read(codec, mute_reg) & mute_mask; snd_soc_update_bits(codec, mute_reg, mute_mask, mute_mask); + /* disable thr2 while we enable */ + priv->spk_thr2_cache &= ~thr2_mask; + priv->spk_thr2_cache |= + snd_soc_read(codec, CLEARWATER_EDRE_ENABLE) & thr2_mask; + snd_soc_update_bits(codec, CLEARWATER_EDRE_ENABLE, thr2_mask, + 0); + return 0; } @@ -365,6 +374,10 @@ static int vegas_spk_post_enable(struct snd_soc_dapm_widget *w, /* write sequencer sets OUT4R_THR2_ENA - update cache */ snd_soc_update_bits(codec, CLEARWATER_EDRE_ENABLE, thr2_mask, thr2_mask); + /* restore THR2 to what it was at the start of the sequence */ + snd_soc_update_bits(codec, CLEARWATER_EDRE_ENABLE, thr2_mask, + priv->spk_thr2_cache); + /* disable THR2 if THR1 disabled */ val = snd_soc_read(codec, CLEARWATER_EDRE_ENABLE); if ((val & thr1_mask) == 0) @@ -381,6 +394,7 @@ static int vegas_spk_post_disable(struct snd_soc_dapm_widget *w, int event) { struct snd_soc_codec *codec = w->codec; + struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); unsigned int thr2_mask; switch (w->shift) { @@ -394,9 +408,20 @@ static int vegas_spk_post_disable(struct snd_soc_dapm_widget *w, return 0; } + /* Read the current value of THR2 in to the cache so we can restore + * it after the write sequencer has executed + */ + priv->spk_thr2_cache &= ~thr2_mask; + priv->spk_thr2_cache |= + snd_soc_read(codec, CLEARWATER_EDRE_ENABLE) & thr2_mask; + /* write sequencer clears OUT4R_THR2_ENA - update cache */ snd_soc_update_bits(codec, CLEARWATER_EDRE_ENABLE, thr2_mask, 0); + /* Restore the previous value after the write sequencer update */ + snd_soc_update_bits(codec, CLEARWATER_EDRE_ENABLE, thr2_mask, + priv->spk_thr2_cache); + return 0; } diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 843d7779d5c..3d8315748f5 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -100,6 +100,7 @@ struct arizona_priv { unsigned int out_down_delay; unsigned int spk_mute_cache; + unsigned int spk_thr2_cache; }; #define ARIZONA_NUM_MIXER_INPUTS 134 From 91573419c43df5846dc8d2f2f7b05a22e377834a Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 5 Jun 2015 09:09:39 +0100 Subject: [PATCH 0861/1167] ASoC: florida: Remove unused volume ramp up write sequences Change-Id: Id941be037da7c01bacfb6eb603d9ebae412eebb7 Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 92915120bc8..be91f1b276d 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -149,22 +149,6 @@ static const struct reg_default florida_sysclk_revd_patch[] = { }; static const struct reg_default florida_sysclk_reve_patch[] = { - { 0x325C, 0xE410 }, - { 0x325D, 0x3066 }, - { 0x325E, 0xE410 }, - { 0x325F, 0x3070 }, - { 0x3260, 0xE410 }, - { 0x3261, 0x3078 }, - { 0x3262, 0xE410 }, - { 0x3263, 0x3080 }, - { 0x3266, 0xE414 }, - { 0x3267, 0x3066 }, - { 0x3268, 0xE414 }, - { 0x3269, 0x3070 }, - { 0x326A, 0xE414 }, - { 0x326B, 0x3078 }, - { 0x326C, 0xE414 }, - { 0x326D, 0x3080 }, { 0x3270, 0xE410 }, { 0x3271, 0x3078 }, { 0x3272, 0xE410 }, From 2a7b4761fb8956b6a3e6d59a3d0ea5af6d192ce9 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 5 Jun 2015 09:12:39 +0100 Subject: [PATCH 0862/1167] mfd: florida: Add registers for custom write sequence triggers Change-Id: I44129672abc0c0f1c084350787d3979d812db050 Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 2 ++ include/linux/mfd/arizona/registers.h | 37 +++++++++++++++++++++++++++ 2 files changed, 39 insertions(+) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index c8bded2a377..1d9936d55da 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -676,6 +676,7 @@ static const struct reg_default florida_reg_default[] = { { 0x00000032, 0x0100 }, /* R50 - PWM Drive 3 */ { 0x00000040, 0x0000 }, /* R64 - Wake control */ { 0x00000041, 0x0000 }, /* R65 - Sequence control */ + { 0x00000042, 0x0000 }, /* R66 - Spare Triggers */ { 0x00000061, 0x01FF }, /* R97 - Sample Rate Sequence Select 1 */ { 0x00000062, 0x01FF }, /* R98 - Sample Rate Sequence Select 2 */ { 0x00000063, 0x01FF }, /* R99 - Sample Rate Sequence Select 3 */ @@ -1919,6 +1920,7 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_PWM_DRIVE_3: case ARIZONA_WAKE_CONTROL: case ARIZONA_SEQUENCE_CONTROL: + case ARIZONA_SPARE_TRIGGERS: case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_1: case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2: case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 82cb201b944..afeaca1e488 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -39,6 +39,7 @@ #define ARIZONA_PWM_DRIVE_3 0x32 #define ARIZONA_WAKE_CONTROL 0x40 #define ARIZONA_SEQUENCE_CONTROL 0x41 +#define ARIZONA_SPARE_TRIGGERS 0x42 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_1 0x61 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2 0x62 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3 0x63 @@ -2543,6 +2544,42 @@ #define ARIZONA_WSEQ_ENA_JD2_RISE_SHIFT 0 /* WSEQ_ENA_JD2_RISE */ #define ARIZONA_WSEQ_ENA_JD2_RISE_WIDTH 1 /* WSEQ_ENA_JD2_RISE */ +/* + * R66 (0x42) - Spare Triggers + */ +#define ARIZONA_WS_TRG8 0x0080 /* WS_TRG8 */ +#define ARIZONA_WS_TRG8_MASK 0x0080 /* WS_TRG8 */ +#define ARIZONA_WS_TRG8_SHIFT 7 /* WS_TRG8 */ +#define ARIZONA_WS_TRG8_WIDTH 1 /* WS_TRG8 */ +#define ARIZONA_WS_TRG7 0x0040 /* WS_TRG7 */ +#define ARIZONA_WS_TRG7_MASK 0x0040 /* WS_TRG7 */ +#define ARIZONA_WS_TRG7_SHIFT 6 /* WS_TRG7 */ +#define ARIZONA_WS_TRG7_WIDTH 1 /* WS_TRG7 */ +#define ARIZONA_WS_TRG6 0x0020 /* WS_TRG6 */ +#define ARIZONA_WS_TRG6_MASK 0x0020 /* WS_TRG6 */ +#define ARIZONA_WS_TRG6_SHIFT 5 /* WS_TRG6 */ +#define ARIZONA_WS_TRG6_WIDTH 1 /* WS_TRG6 */ +#define ARIZONA_WS_TRG5 0x0010 /* WS_TRG5 */ +#define ARIZONA_WS_TRG5_MASK 0x0010 /* WS_TRG5 */ +#define ARIZONA_WS_TRG5_SHIFT 4 /* WS_TRG5 */ +#define ARIZONA_WS_TRG5_WIDTH 1 /* WS_TRG5 */ +#define ARIZONA_WS_TRG4 0x0008 /* WS_TRG4 */ +#define ARIZONA_WS_TRG4_MASK 0x0008 /* WS_TRG4 */ +#define ARIZONA_WS_TRG4_SHIFT 3 /* WS_TRG4 */ +#define ARIZONA_WS_TRG4_WIDTH 1 /* WS_TRG4 */ +#define ARIZONA_WS_TRG3 0x0004 /* WS_TRG3 */ +#define ARIZONA_WS_TRG3_MASK 0x0004 /* WS_TRG3 */ +#define ARIZONA_WS_TRG3_SHIFT 2 /* WS_TRG3 */ +#define ARIZONA_WS_TRG3_WIDTH 1 /* WS_TRG3 */ +#define ARIZONA_WS_TRG2 0x0002 /* WS_TRG2 */ +#define ARIZONA_WS_TRG2_MASK 0x0002 /* WS_TRG2 */ +#define ARIZONA_WS_TRG2_SHIFT 1 /* WS_TRG2 */ +#define ARIZONA_WS_TRG2_WIDTH 1 /* WS_TRG2 */ +#define ARIZONA_WS_TRG1 0x0001 /* WS_TRG1 */ +#define ARIZONA_WS_TRG1_MASK 0x0001 /* WS_TRG1 */ +#define ARIZONA_WS_TRG1_SHIFT 0 /* WS_TRG1 */ +#define ARIZONA_WS_TRG1_WIDTH 1 /* WS_TRG1 */ + /* * R97 (0x61) - Sample Rate Sequence Select 1 */ From 90c273b401324117a45ec5eca4abdeffb78218b5 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 5 Jun 2015 09:13:40 +0100 Subject: [PATCH 0863/1167] mfd: florida: Add triggers for the volume ramp write sequences Attach the two volume ramp down write sequences for the headphones to two custom write sequence triggers. Change-Id: I2c77fc08818ea8a82dc34eb10ea9804fe58b93d2 Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 1d9936d55da..2baa67ad852 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -249,6 +249,16 @@ static const struct reg_default florida_revd_patch[] = { { 0x80, 0x0 }, }; +/* Add extra headphone write sequence locations */ +static const struct reg_default florida_reve_patch[] = { + { 0x80, 0x3 }, + { 0x80, 0x3 }, + { 0x4b, 0x138 }, + { 0x4c, 0x13d }, + { 0x80, 0x0 }, + { 0x80, 0x0 }, +}; + /* We use a function so we can use ARRAY_SIZE() */ int florida_patch(struct arizona *arizona) { @@ -266,7 +276,9 @@ int florida_patch(struct arizona *arizona) florida_revd_patch, ARRAY_SIZE(florida_revd_patch)); default: - return 0; + return regmap_register_patch(arizona->regmap, + florida_reve_patch, + ARRAY_SIZE(florida_reve_patch)); } } EXPORT_SYMBOL_GPL(florida_patch); From 7c1d1f7b27b3bbad1b9529c710dcbeb79e766f2e Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 5 Jun 2015 09:14:26 +0100 Subject: [PATCH 0864/1167] ASoC: florida: Use write sequence triggers to trigger volume ramp Write sequences started through WRITE_SEQUENCER_CTRL_0 do not queue nicely with other write sequences. This patch switches to using a custom trigger to queue the volume ramp down write sequences for the no DRE case of headphone disable. Change-Id: I6fe2da03456420d026bc62a4b504caa09da7fbb3 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index b5f43cce1e8..25c7524b905 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2140,19 +2140,19 @@ static int florida_hp_pre_disable(struct snd_soc_dapm_widget *w) switch (w->shift) { case ARIZONA_OUT1L_ENA_SHIFT: if (!(val & ARIZONA_DRE1L_ENA_MASK)) { - snd_soc_write(w->codec, - ARIZONA_WRITE_SEQUENCER_CTRL_0, - ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | - 0x138); + snd_soc_update_bits(w->codec, ARIZONA_SPARE_TRIGGERS, + ARIZONA_WS_TRG1, ARIZONA_WS_TRG1); + snd_soc_update_bits(w->codec, ARIZONA_SPARE_TRIGGERS, + ARIZONA_WS_TRG1, 0); msleep(10); } break; case ARIZONA_OUT1R_ENA_SHIFT: if (!(val & ARIZONA_DRE1R_ENA_MASK)) { - snd_soc_write(w->codec, - ARIZONA_WRITE_SEQUENCER_CTRL_0, - ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | - 0x13d); + snd_soc_update_bits(w->codec, ARIZONA_SPARE_TRIGGERS, + ARIZONA_WS_TRG2, ARIZONA_WS_TRG2); + snd_soc_update_bits(w->codec, ARIZONA_SPARE_TRIGGERS, + ARIZONA_WS_TRG2, 0); msleep(10); } break; From 641decb16d80cd85349c8995bfda2ca5fec35d38 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 29 May 2015 14:58:03 +0100 Subject: [PATCH 0865/1167] ASoC: florida: Coalesce volume ramp sequence delays Before powering down the headphones whilst DRE is not enabled we should ramp down the volume for the output to ensure glitch free operation. Currently, two 10mS delays are used for this. This patch coalesces these with the standard power down delay. This is acceptable because the write sequencer in the chip will queue all the write sequences, so the headphone disable sequence can't run until the matching volume ramp has completed. So in the driver we only need to allow enough total delay to ensure that all the write sequences have finished. Change-Id: I2e49891921ed4b51278d491629f155ce8e215644 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 25c7524b905..81ab0f7bf0f 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2135,6 +2135,7 @@ static int florida_hp_post_enable(struct snd_soc_dapm_widget *w) static int florida_hp_pre_disable(struct snd_soc_dapm_widget *w) { + struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); switch (w->shift) { @@ -2144,7 +2145,7 @@ static int florida_hp_pre_disable(struct snd_soc_dapm_widget *w) ARIZONA_WS_TRG1, ARIZONA_WS_TRG1); snd_soc_update_bits(w->codec, ARIZONA_SPARE_TRIGGERS, ARIZONA_WS_TRG1, 0); - msleep(10); + priv->out_down_delay += 10; } break; case ARIZONA_OUT1R_ENA_SHIFT: @@ -2153,7 +2154,7 @@ static int florida_hp_pre_disable(struct snd_soc_dapm_widget *w) ARIZONA_WS_TRG2, ARIZONA_WS_TRG2); snd_soc_update_bits(w->codec, ARIZONA_SPARE_TRIGGERS, ARIZONA_WS_TRG2, 0); - msleep(10); + priv->out_down_delay += 10; } break; From 5dd7d0ebbdbd7905bebf94cb57bce0e68009d7ee Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 1 Jun 2015 17:47:49 +0100 Subject: [PATCH 0866/1167] ASoC: florida: Combine pre and post headphone handlers Both the post_enable and post_disable handlers for the Florida headphones simply add delay, now the delays are all coalesced into one delay at the end it doesn't matter if we add that delay in the pre or post handler. So this patch merges the post handlers into the pre handles. Change-Id: Ia83e8f94f05a553ef5ce0c55cecdcacdf62d7ab5 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 58 ++++---------------------------------- 1 file changed, 5 insertions(+), 53 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 81ab0f7bf0f..67c6e7a038f 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2088,6 +2088,7 @@ static int florida_hp_pre_enable(struct snd_soc_dapm_widget *w) regmap_multi_reg_write(priv->arizona->regmap, florida_no_dre_left_enable, ARRAY_SIZE(florida_no_dre_left_enable)); + priv->out_up_delay += 10; } udelay(1000); break; @@ -2100,6 +2101,7 @@ static int florida_hp_pre_enable(struct snd_soc_dapm_widget *w) regmap_multi_reg_write(priv->arizona->regmap, florida_no_dre_right_enable, ARRAY_SIZE(florida_no_dre_right_enable)); + priv->out_up_delay += 10; } udelay(1000); break; @@ -2111,28 +2113,6 @@ static int florida_hp_pre_enable(struct snd_soc_dapm_widget *w) return 0; } -static int florida_hp_post_enable(struct snd_soc_dapm_widget *w) -{ - struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); - unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); - - switch (w->shift) { - case ARIZONA_OUT1L_ENA_SHIFT: - if (!(val & ARIZONA_DRE1L_ENA_MASK)) - priv->out_up_delay += 10; - break; - case ARIZONA_OUT1R_ENA_SHIFT: - if (!(val & ARIZONA_DRE1R_ENA_MASK)) - priv->out_up_delay += 10; - break; - - default: - break; - } - - return 0; -} - static int florida_hp_pre_disable(struct snd_soc_dapm_widget *w) { struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); @@ -2145,7 +2125,7 @@ static int florida_hp_pre_disable(struct snd_soc_dapm_widget *w) ARIZONA_WS_TRG1, ARIZONA_WS_TRG1); snd_soc_update_bits(w->codec, ARIZONA_SPARE_TRIGGERS, ARIZONA_WS_TRG1, 0); - priv->out_down_delay += 10; + priv->out_down_delay += 27; } break; case ARIZONA_OUT1R_ENA_SHIFT: @@ -2154,7 +2134,7 @@ static int florida_hp_pre_disable(struct snd_soc_dapm_widget *w) ARIZONA_WS_TRG2, ARIZONA_WS_TRG2); snd_soc_update_bits(w->codec, ARIZONA_SPARE_TRIGGERS, ARIZONA_WS_TRG2, 0); - priv->out_down_delay += 10; + priv->out_down_delay += 27; } break; @@ -2165,28 +2145,6 @@ static int florida_hp_pre_disable(struct snd_soc_dapm_widget *w) return 0; } -static int florida_hp_post_disable(struct snd_soc_dapm_widget *w) -{ - struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); - unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); - - switch (w->shift) { - case ARIZONA_OUT1L_ENA_SHIFT: - if (!(val & ARIZONA_DRE1L_ENA_MASK)) - priv->out_down_delay += 17; - break; - case ARIZONA_OUT1R_ENA_SHIFT: - if (!(val & ARIZONA_DRE1R_ENA_MASK)) - priv->out_down_delay += 17; - break; - - default: - break; - } - - return 0; -} - static void clearwater_hp_post_enable(struct snd_soc_dapm_widget *w) { unsigned int val; @@ -2480,17 +2438,11 @@ int florida_hp_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, case SND_SOC_DAPM_PRE_PMU: florida_hp_pre_enable(w); break; - case SND_SOC_DAPM_POST_PMU: - florida_hp_post_enable(w); - break; case SND_SOC_DAPM_PRE_PMD: florida_hp_pre_disable(w); break; - case SND_SOC_DAPM_POST_PMD: - florida_hp_post_disable(w); - break; default: - return -EINVAL; + break; } return arizona_hp_ev(w, kcontrol, event); From 5b0a382eaa16a39ba5e4eb095884fcbba25f7a33 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 9 Jul 2015 09:21:46 +0100 Subject: [PATCH 0867/1167] ASoC: florida: Move DRE handling into Florida driver Change-Id: I34b76addd1d9ee0e1849f489010e4da7c7e6b2b9 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 252 ------------------------------------- sound/soc/codecs/arizona.h | 5 - sound/soc/codecs/florida.c | 250 ++++++++++++++++++++++++++++++++++++ 3 files changed, 250 insertions(+), 257 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 67c6e7a038f..f884b6b0884 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2001,150 +2001,6 @@ int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, } EXPORT_SYMBOL_GPL(arizona_in_ev); -static const struct reg_default florida_no_dre_left_enable[] = { - { 0x3024, 0xE410 }, - { 0x3025, 0x0056 }, - { 0x301B, 0x0224 }, - { 0x301F, 0x4263 }, - { 0x3021, 0x5291 }, - { 0x3030, 0xE410 }, - { 0x3031, 0x3066 }, - { 0x3032, 0xE410 }, - { 0x3033, 0x3070 }, - { 0x3034, 0xE410 }, - { 0x3035, 0x3078 }, - { 0x3036, 0xE410 }, - { 0x3037, 0x3080 }, - { 0x3038, 0xE410 }, - { 0x3039, 0x3080 }, -}; - -static const struct reg_default florida_dre_left_enable[] = { - { 0x3024, 0x0231 }, - { 0x3025, 0x0B00 }, - { 0x301B, 0x0227 }, - { 0x301F, 0x4266 }, - { 0x3021, 0x5294 }, - { 0x3030, 0xE231 }, - { 0x3031, 0x0266 }, - { 0x3032, 0x8231 }, - { 0x3033, 0x4B15 }, - { 0x3034, 0x8231 }, - { 0x3035, 0x0B15 }, - { 0x3036, 0xE231 }, - { 0x3037, 0x5294 }, - { 0x3038, 0x0231 }, - { 0x3039, 0x0B00 }, -}; - -static const struct reg_default florida_no_dre_right_enable[] = { - { 0x3074, 0xE414 }, - { 0x3075, 0x0056 }, - { 0x306B, 0x0224 }, - { 0x306F, 0x4263 }, - { 0x3071, 0x5291 }, - { 0x3080, 0xE414 }, - { 0x3081, 0x3066 }, - { 0x3082, 0xE414 }, - { 0x3083, 0x3070 }, - { 0x3084, 0xE414 }, - { 0x3085, 0x3078 }, - { 0x3086, 0xE414 }, - { 0x3087, 0x3080 }, - { 0x3088, 0xE414 }, - { 0x3089, 0x3080 }, -}; - -static const struct reg_default florida_dre_right_enable[] = { - { 0x3074, 0x0231 }, - { 0x3075, 0x0B00 }, - { 0x306B, 0x0227 }, - { 0x306F, 0x4266 }, - { 0x3071, 0x5294 }, - { 0x3080, 0xE231 }, - { 0x3081, 0x0266 }, - { 0x3082, 0x8231 }, - { 0x3083, 0x4B17 }, - { 0x3084, 0x8231 }, - { 0x3085, 0x0B17 }, - { 0x3086, 0xE231 }, - { 0x3087, 0x5294 }, - { 0x3088, 0x0231 }, - { 0x3089, 0x0B00 }, -}; - -static int florida_hp_pre_enable(struct snd_soc_dapm_widget *w) -{ - struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); - unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); - - switch (w->shift) { - case ARIZONA_OUT1L_ENA_SHIFT: - if (val & ARIZONA_DRE1L_ENA_MASK) { - regmap_multi_reg_write(priv->arizona->regmap, - florida_dre_left_enable, - ARRAY_SIZE(florida_dre_left_enable)); - } else { - regmap_multi_reg_write(priv->arizona->regmap, - florida_no_dre_left_enable, - ARRAY_SIZE(florida_no_dre_left_enable)); - priv->out_up_delay += 10; - } - udelay(1000); - break; - case ARIZONA_OUT1R_ENA_SHIFT: - if (val & ARIZONA_DRE1R_ENA_MASK) { - regmap_multi_reg_write(priv->arizona->regmap, - florida_dre_right_enable, - ARRAY_SIZE(florida_dre_right_enable)); - } else { - regmap_multi_reg_write(priv->arizona->regmap, - florida_no_dre_right_enable, - ARRAY_SIZE(florida_no_dre_right_enable)); - priv->out_up_delay += 10; - } - udelay(1000); - break; - - default: - break; - } - - return 0; -} - -static int florida_hp_pre_disable(struct snd_soc_dapm_widget *w) -{ - struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); - unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); - - switch (w->shift) { - case ARIZONA_OUT1L_ENA_SHIFT: - if (!(val & ARIZONA_DRE1L_ENA_MASK)) { - snd_soc_update_bits(w->codec, ARIZONA_SPARE_TRIGGERS, - ARIZONA_WS_TRG1, ARIZONA_WS_TRG1); - snd_soc_update_bits(w->codec, ARIZONA_SPARE_TRIGGERS, - ARIZONA_WS_TRG1, 0); - priv->out_down_delay += 27; - } - break; - case ARIZONA_OUT1R_ENA_SHIFT: - if (!(val & ARIZONA_DRE1R_ENA_MASK)) { - snd_soc_update_bits(w->codec, ARIZONA_SPARE_TRIGGERS, - ARIZONA_WS_TRG2, ARIZONA_WS_TRG2); - snd_soc_update_bits(w->codec, ARIZONA_SPARE_TRIGGERS, - ARIZONA_WS_TRG2, 0); - priv->out_down_delay += 27; - } - break; - - default: - break; - } - - return 0; -} - static void clearwater_hp_post_enable(struct snd_soc_dapm_widget *w) { unsigned int val; @@ -2191,96 +2047,6 @@ static void clearwater_hp_post_disable(struct snd_soc_dapm_widget *w) 0); } -static int florida_set_dre(struct arizona *arizona, unsigned int shift, - bool enable) -{ - unsigned int pga = ARIZONA_OUTPUT_PATH_CONFIG_1L + shift * 4; - unsigned int mask = 1 << shift; - unsigned int val = 0; - const struct reg_default *wseq; - int nregs; - bool change; - - if (enable) { - regmap_update_bits_check(arizona->regmap, ARIZONA_DRE_ENABLE, - mask, mask, &change); - if (!change) - return 0; - - switch (shift) { - case ARIZONA_DRE1L_ENA_SHIFT: - mask = ARIZONA_OUT1L_ENA; - wseq = florida_dre_left_enable; - nregs = ARRAY_SIZE(florida_dre_left_enable); - break; - case ARIZONA_DRE1R_ENA_SHIFT: - mask = ARIZONA_OUT1R_ENA; - wseq = florida_dre_right_enable; - nregs = ARRAY_SIZE(florida_dre_right_enable); - break; - default: - return 0; - } - } else { - regmap_update_bits_check(arizona->regmap, ARIZONA_DRE_ENABLE, - mask, 0, &change); - if (!change) - return 0; - - /* Force reset of PGA Vol */ - regmap_update_bits(arizona->regmap, pga, - ARIZONA_OUT1L_PGA_VOL_MASK, 0x7F); - regmap_update_bits(arizona->regmap, pga, - ARIZONA_OUT1L_PGA_VOL_MASK, 0x80); - - switch (shift) { - case ARIZONA_DRE1L_ENA_SHIFT: - mask = ARIZONA_OUT1L_ENA; - wseq = florida_no_dre_left_enable; - nregs = ARRAY_SIZE(florida_no_dre_left_enable); - break; - case ARIZONA_DRE1R_ENA_SHIFT: - mask = ARIZONA_OUT1R_ENA; - wseq = florida_no_dre_right_enable; - nregs = ARRAY_SIZE(florida_no_dre_right_enable); - break; - default: - return 0; - } - } - - /* If the output is on we need to update the disable sequence */ - regmap_read(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, &val); - - if (val & mask) { - regmap_multi_reg_write(arizona->regmap, wseq, nregs); - udelay(1000); - } - - return 0; -} - -int florida_put_dre(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); - struct arizona *arizona = dev_get_drvdata(codec->dev->parent); - struct soc_mixer_control *mc = - (struct soc_mixer_control *)kcontrol->private_value; - unsigned int lshift = mc->shift; - unsigned int rshift = mc->rshift; - - mutex_lock_nested(&codec->card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); - - florida_set_dre(arizona, lshift, !!ucontrol->value.integer.value[0]); - florida_set_dre(arizona, rshift, !!ucontrol->value.integer.value[1]); - - mutex_unlock(&codec->card->dapm_mutex); - - return 0; -} -EXPORT_SYMBOL_GPL(florida_put_dre); - int clearwater_put_dre(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { @@ -2431,24 +2197,6 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, } EXPORT_SYMBOL_GPL(arizona_hp_ev); -int florida_hp_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, - int event) -{ - switch (event) { - case SND_SOC_DAPM_PRE_PMU: - florida_hp_pre_enable(w); - break; - case SND_SOC_DAPM_PRE_PMD: - florida_hp_pre_disable(w); - break; - default: - break; - } - - return arizona_hp_ev(w, kcontrol, event); -} -EXPORT_SYMBOL_GPL(florida_hp_ev); - int clearwater_hp_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 3d8315748f5..e46fe5d5815 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -326,9 +326,6 @@ extern int arizona_out_ev(struct snd_soc_dapm_widget *w, extern int arizona_hp_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); -extern int florida_hp_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event); extern int clearwater_hp_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); @@ -420,8 +417,6 @@ extern int arizona_set_ez2ctrl_cb(struct snd_soc_codec *codec, extern int arizona_set_custom_jd(struct snd_soc_codec *codec, const struct arizona_jd_state *custom_jd); -extern int florida_put_dre(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); extern int clearwater_put_dre(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index be91f1b276d..a910d9e28e9 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -225,6 +225,256 @@ static int florida_adsp_power_ev(struct snd_soc_dapm_widget *w, return arizona_adsp_power_ev(w, kcontrol, event); } +static const struct reg_default florida_no_dre_left_enable[] = { + { 0x3024, 0xE410 }, + { 0x3025, 0x0056 }, + { 0x301B, 0x0224 }, + { 0x301F, 0x4263 }, + { 0x3021, 0x5291 }, + { 0x3030, 0xE410 }, + { 0x3031, 0x3066 }, + { 0x3032, 0xE410 }, + { 0x3033, 0x3070 }, + { 0x3034, 0xE410 }, + { 0x3035, 0x3078 }, + { 0x3036, 0xE410 }, + { 0x3037, 0x3080 }, + { 0x3038, 0xE410 }, + { 0x3039, 0x3080 }, +}; + +static const struct reg_default florida_dre_left_enable[] = { + { 0x3024, 0x0231 }, + { 0x3025, 0x0B00 }, + { 0x301B, 0x0227 }, + { 0x301F, 0x4266 }, + { 0x3021, 0x5294 }, + { 0x3030, 0xE231 }, + { 0x3031, 0x0266 }, + { 0x3032, 0x8231 }, + { 0x3033, 0x4B15 }, + { 0x3034, 0x8231 }, + { 0x3035, 0x0B15 }, + { 0x3036, 0xE231 }, + { 0x3037, 0x5294 }, + { 0x3038, 0x0231 }, + { 0x3039, 0x0B00 }, +}; + +static const struct reg_default florida_no_dre_right_enable[] = { + { 0x3074, 0xE414 }, + { 0x3075, 0x0056 }, + { 0x306B, 0x0224 }, + { 0x306F, 0x4263 }, + { 0x3071, 0x5291 }, + { 0x3080, 0xE414 }, + { 0x3081, 0x3066 }, + { 0x3082, 0xE414 }, + { 0x3083, 0x3070 }, + { 0x3084, 0xE414 }, + { 0x3085, 0x3078 }, + { 0x3086, 0xE414 }, + { 0x3087, 0x3080 }, + { 0x3088, 0xE414 }, + { 0x3089, 0x3080 }, +}; + +static const struct reg_default florida_dre_right_enable[] = { + { 0x3074, 0x0231 }, + { 0x3075, 0x0B00 }, + { 0x306B, 0x0227 }, + { 0x306F, 0x4266 }, + { 0x3071, 0x5294 }, + { 0x3080, 0xE231 }, + { 0x3081, 0x0266 }, + { 0x3082, 0x8231 }, + { 0x3083, 0x4B17 }, + { 0x3084, 0x8231 }, + { 0x3085, 0x0B17 }, + { 0x3086, 0xE231 }, + { 0x3087, 0x5294 }, + { 0x3088, 0x0231 }, + { 0x3089, 0x0B00 }, +}; + +static int florida_hp_pre_enable(struct snd_soc_dapm_widget *w) +{ + struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); + unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); + + switch (w->shift) { + case ARIZONA_OUT1L_ENA_SHIFT: + if (val & ARIZONA_DRE1L_ENA_MASK) { + regmap_multi_reg_write(priv->arizona->regmap, + florida_dre_left_enable, + ARRAY_SIZE(florida_dre_left_enable)); + } else { + regmap_multi_reg_write(priv->arizona->regmap, + florida_no_dre_left_enable, + ARRAY_SIZE(florida_no_dre_left_enable)); + priv->out_up_delay += 10; + } + udelay(1000); + break; + case ARIZONA_OUT1R_ENA_SHIFT: + if (val & ARIZONA_DRE1R_ENA_MASK) { + regmap_multi_reg_write(priv->arizona->regmap, + florida_dre_right_enable, + ARRAY_SIZE(florida_dre_right_enable)); + } else { + regmap_multi_reg_write(priv->arizona->regmap, + florida_no_dre_right_enable, + ARRAY_SIZE(florida_no_dre_right_enable)); + priv->out_up_delay += 10; + } + udelay(1000); + break; + + default: + break; + } + + return 0; +} + +static int florida_hp_pre_disable(struct snd_soc_dapm_widget *w) +{ + struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); + unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); + + switch (w->shift) { + case ARIZONA_OUT1L_ENA_SHIFT: + if (!(val & ARIZONA_DRE1L_ENA_MASK)) { + snd_soc_update_bits(w->codec, ARIZONA_SPARE_TRIGGERS, + ARIZONA_WS_TRG1, ARIZONA_WS_TRG1); + snd_soc_update_bits(w->codec, ARIZONA_SPARE_TRIGGERS, + ARIZONA_WS_TRG1, 0); + priv->out_down_delay += 27; + } + break; + case ARIZONA_OUT1R_ENA_SHIFT: + if (!(val & ARIZONA_DRE1R_ENA_MASK)) { + snd_soc_update_bits(w->codec, ARIZONA_SPARE_TRIGGERS, + ARIZONA_WS_TRG2, ARIZONA_WS_TRG2); + snd_soc_update_bits(w->codec, ARIZONA_SPARE_TRIGGERS, + ARIZONA_WS_TRG2, 0); + priv->out_down_delay += 27; + } + break; + + default: + break; + } + + return 0; +} + +static int florida_hp_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + florida_hp_pre_enable(w); + break; + case SND_SOC_DAPM_PRE_PMD: + florida_hp_pre_disable(w); + break; + default: + break; + } + + return arizona_hp_ev(w, kcontrol, event); +} + +static int florida_set_dre(struct arizona *arizona, unsigned int shift, + bool enable) +{ + unsigned int pga = ARIZONA_OUTPUT_PATH_CONFIG_1L + shift * 4; + unsigned int mask = 1 << shift; + unsigned int val = 0; + const struct reg_default *wseq; + int nregs; + bool change; + + if (enable) { + regmap_update_bits_check(arizona->regmap, ARIZONA_DRE_ENABLE, + mask, mask, &change); + if (!change) + return 0; + + switch (shift) { + case ARIZONA_DRE1L_ENA_SHIFT: + mask = ARIZONA_OUT1L_ENA; + wseq = florida_dre_left_enable; + nregs = ARRAY_SIZE(florida_dre_left_enable); + break; + case ARIZONA_DRE1R_ENA_SHIFT: + mask = ARIZONA_OUT1R_ENA; + wseq = florida_dre_right_enable; + nregs = ARRAY_SIZE(florida_dre_right_enable); + break; + default: + return 0; + } + } else { + regmap_update_bits_check(arizona->regmap, ARIZONA_DRE_ENABLE, + mask, 0, &change); + if (!change) + return 0; + + /* Force reset of PGA Vol */ + regmap_update_bits(arizona->regmap, pga, + ARIZONA_OUT1L_PGA_VOL_MASK, 0x7F); + regmap_update_bits(arizona->regmap, pga, + ARIZONA_OUT1L_PGA_VOL_MASK, 0x80); + + switch (shift) { + case ARIZONA_DRE1L_ENA_SHIFT: + mask = ARIZONA_OUT1L_ENA; + wseq = florida_no_dre_left_enable; + nregs = ARRAY_SIZE(florida_no_dre_left_enable); + break; + case ARIZONA_DRE1R_ENA_SHIFT: + mask = ARIZONA_OUT1R_ENA; + wseq = florida_no_dre_right_enable; + nregs = ARRAY_SIZE(florida_no_dre_right_enable); + break; + default: + return 0; + } + } + + /* If the output is on we need to update the disable sequence */ + regmap_read(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, &val); + + if (val & mask) { + regmap_multi_reg_write(arizona->regmap, wseq, nregs); + udelay(1000); + } + + return 0; +} + +static int florida_put_dre(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + unsigned int lshift = mc->shift; + unsigned int rshift = mc->rshift; + + mutex_lock_nested(&codec->card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); + + florida_set_dre(arizona, lshift, !!ucontrol->value.integer.value[0]); + florida_set_dre(arizona, rshift, !!ucontrol->value.integer.value[1]); + + mutex_unlock(&codec->card->dapm_mutex); + + return 0; +} + static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); From a9ddb4449f7564e92e6c9edf712d39944be81122 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 9 Jul 2015 09:32:39 +0100 Subject: [PATCH 0868/1167] ASoC: florida: Sync DRE handling with upstream Change-Id: Idf8cf38c42469b572625bd23817b97c8b98416cc Signed-off-by: Charles Keepax --- sound/soc/codecs/florida.c | 74 +++++++++++++++++++++++--------------- 1 file changed, 46 insertions(+), 28 deletions(-) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index a910d9e28e9..cf5c42a7e34 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -300,41 +300,40 @@ static const struct reg_default florida_dre_right_enable[] = { static int florida_hp_pre_enable(struct snd_soc_dapm_widget *w) { struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); + struct arizona *arizona = priv->arizona; unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); + const struct reg_default *wseq; + int nregs; + int ret; switch (w->shift) { case ARIZONA_OUT1L_ENA_SHIFT: if (val & ARIZONA_DRE1L_ENA_MASK) { - regmap_multi_reg_write(priv->arizona->regmap, - florida_dre_left_enable, - ARRAY_SIZE(florida_dre_left_enable)); + wseq = florida_dre_left_enable; + nregs = ARRAY_SIZE(florida_dre_left_enable); } else { - regmap_multi_reg_write(priv->arizona->regmap, - florida_no_dre_left_enable, - ARRAY_SIZE(florida_no_dre_left_enable)); + wseq = florida_no_dre_left_enable; + nregs = ARRAY_SIZE(florida_no_dre_left_enable); priv->out_up_delay += 10; } - udelay(1000); break; case ARIZONA_OUT1R_ENA_SHIFT: if (val & ARIZONA_DRE1R_ENA_MASK) { - regmap_multi_reg_write(priv->arizona->regmap, - florida_dre_right_enable, - ARRAY_SIZE(florida_dre_right_enable)); + wseq = florida_dre_right_enable; + nregs = ARRAY_SIZE(florida_dre_right_enable); } else { - regmap_multi_reg_write(priv->arizona->regmap, - florida_no_dre_right_enable, - ARRAY_SIZE(florida_no_dre_right_enable)); + wseq = florida_no_dre_right_enable; + nregs = ARRAY_SIZE(florida_no_dre_right_enable); priv->out_up_delay += 10; } - udelay(1000); break; - default: - break; + return 0; } - return 0; + ret = regmap_multi_reg_write(arizona->regmap, wseq, nregs); + udelay(1000); + return ret; } static int florida_hp_pre_disable(struct snd_soc_dapm_widget *w) @@ -372,24 +371,46 @@ static int florida_hp_pre_disable(struct snd_soc_dapm_widget *w) static int florida_hp_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { - switch (event) { - case SND_SOC_DAPM_PRE_PMU: - florida_hp_pre_enable(w); - break; - case SND_SOC_DAPM_PRE_PMD: - florida_hp_pre_disable(w); + struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); + + switch (priv->arizona->rev) { + case 0 ... 3: break; default: + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + florida_hp_pre_enable(w); + break; + case SND_SOC_DAPM_PRE_PMD: + florida_hp_pre_disable(w); + break; + default: + break; + } break; } return arizona_hp_ev(w, kcontrol, event); } +static int florida_clear_pga_volume(struct arizona *arizona, int output) +{ + struct reg_default clear_pga = { + ARIZONA_OUTPUT_PATH_CONFIG_1L + output * 4, 0x80 + }; + int ret; + + ret = regmap_multi_reg_write_bypassed(arizona->regmap, &clear_pga, 1); + if (ret) + dev_err(arizona->dev, "Failed to clear PGA (0x%x): %d\n", + clear_pga.reg, ret); + + return ret; +} + static int florida_set_dre(struct arizona *arizona, unsigned int shift, bool enable) { - unsigned int pga = ARIZONA_OUTPUT_PATH_CONFIG_1L + shift * 4; unsigned int mask = 1 << shift; unsigned int val = 0; const struct reg_default *wseq; @@ -423,10 +444,7 @@ static int florida_set_dre(struct arizona *arizona, unsigned int shift, return 0; /* Force reset of PGA Vol */ - regmap_update_bits(arizona->regmap, pga, - ARIZONA_OUT1L_PGA_VOL_MASK, 0x7F); - regmap_update_bits(arizona->regmap, pga, - ARIZONA_OUT1L_PGA_VOL_MASK, 0x80); + florida_clear_pga_volume(arizona, shift); switch (shift) { case ARIZONA_DRE1L_ENA_SHIFT: From ac31443a134828a59548c9d639108ee06923b991 Mon Sep 17 00:00:00 2001 From: V V N Praveen Kumar Date: Wed, 8 Jul 2015 15:15:48 +0530 Subject: [PATCH 0869/1167] ASoC: clearwater: Adding Support for AEC2 Loopback Change-Id: I23e1391e4ecfb0e63cbcce02a74584dccf4672c9 Signed-off-by: V V N Praveen Kumar --- sound/soc/codecs/clearwater.c | 62 +++++++++++++++++++++++++---------- 1 file changed, 44 insertions(+), 18 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 4992baced1d..efaf8a1ee53 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -1302,15 +1302,24 @@ static const unsigned int clearwater_aec_loopback_values[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, }; -static const struct soc_enum clearwater_aec_loopback = +static const struct soc_enum clearwater_aec1_loopback = SOC_VALUE_ENUM_SINGLE(ARIZONA_DAC_AEC_CONTROL_1, ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, ARRAY_SIZE(clearwater_aec_loopback_texts), clearwater_aec_loopback_texts, clearwater_aec_loopback_values); -static const struct snd_kcontrol_new clearwater_aec_loopback_mux = - SOC_DAPM_VALUE_ENUM("AEC Loopback", clearwater_aec_loopback); +static const struct soc_enum clearwater_aec2_loopback = + SOC_VALUE_ENUM_SINGLE(ARIZONA_DAC_AEC_CONTROL_2, + ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, + ARRAY_SIZE(clearwater_aec_loopback_texts), + clearwater_aec_loopback_texts, + clearwater_aec_loopback_values); + +static const struct snd_kcontrol_new clearwater_aec_loopback_mux[] = { + SOC_DAPM_VALUE_ENUM("AEC1 Loopback", clearwater_aec1_loopback), + SOC_DAPM_VALUE_ENUM("AEC2 Loopback", clearwater_aec2_loopback), +}; static const struct snd_kcontrol_new clearwater_anc_input_mux[] = { SOC_DAPM_ENUM_EXT("RXANCL Input", clearwater_anc_input_src[0], @@ -1561,9 +1570,13 @@ SND_SOC_DAPM_PGA("ISRC4DEC1", ARIZONA_ISRC_4_CTRL_3, SND_SOC_DAPM_PGA("ISRC4DEC2", ARIZONA_ISRC_4_CTRL_3, ARIZONA_ISRC4_DEC1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, +SND_SOC_DAPM_VALUE_MUX("AEC1 Loopback", ARIZONA_DAC_AEC_CONTROL_1, ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, - &clearwater_aec_loopback_mux), + &clearwater_aec_loopback_mux[0]), +SND_SOC_DAPM_VALUE_MUX("AEC2 Loopback", ARIZONA_DAC_AEC_CONTROL_2, + ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, + &clearwater_aec_loopback_mux[1]), + SND_SOC_DAPM_MUX("RXANCL Input", SND_SOC_NOPM, 0, 0, &clearwater_anc_input_mux[0]), SND_SOC_DAPM_MUX("RXANCR Input", SND_SOC_NOPM, 0, 0, &clearwater_anc_input_mux[1]), @@ -1931,7 +1944,8 @@ SND_SOC_DAPM_OUTPUT("MICSUPP"), { name, "Tone Generator 1", "Tone Generator 1" }, \ { name, "Tone Generator 2", "Tone Generator 2" }, \ { name, "Haptics", "HAPTICS" }, \ - { name, "AEC", "AEC Loopback" }, \ + { name, "AEC", "AEC1 Loopback" }, \ + { name, "AEC2", "AEC2 Loopback" }, \ { name, "IN1L", "IN1L PGA" }, \ { name, "IN1R", "IN1R PGA" }, \ { name, "IN2L", "IN2L PGA" }, \ @@ -2387,36 +2401,48 @@ static const struct snd_soc_dapm_route clearwater_dapm_routes[] = { ARIZONA_MUX_ROUTES("ISRC4DEC1", "ISRC4DEC1"), ARIZONA_MUX_ROUTES("ISRC4DEC2", "ISRC4DEC2"), - { "AEC Loopback", "HPOUT1L", "OUT1L" }, - { "AEC Loopback", "HPOUT1R", "OUT1R" }, + { "AEC1 Loopback", "HPOUT1L", "OUT1L" }, + { "AEC1 Loopback", "HPOUT1R", "OUT1R" }, + { "AEC2 Loopback", "HPOUT1L", "OUT1L" }, + { "AEC2 Loopback", "HPOUT1R", "OUT1R" }, { "HPOUT1L", NULL, "OUT1L" }, { "HPOUT1R", NULL, "OUT1R" }, - { "AEC Loopback", "HPOUT2L", "OUT2L" }, - { "AEC Loopback", "HPOUT2R", "OUT2R" }, + { "AEC1 Loopback", "HPOUT2L", "OUT2L" }, + { "AEC1 Loopback", "HPOUT2R", "OUT2R" }, + { "AEC2 Loopback", "HPOUT2L", "OUT2L" }, + { "AEC2 Loopback", "HPOUT2R", "OUT2R" }, { "HPOUT2L", NULL, "OUT2L" }, { "HPOUT2R", NULL, "OUT2R" }, - { "AEC Loopback", "HPOUT3L", "OUT3L" }, - { "AEC Loopback", "HPOUT3R", "OUT3R" }, + { "AEC1 Loopback", "HPOUT3L", "OUT3L" }, + { "AEC1 Loopback", "HPOUT3R", "OUT3R" }, + { "AEC2 Loopback", "HPOUT3L", "OUT3L" }, + { "AEC2 Loopback", "HPOUT3R", "OUT3R" }, { "HPOUT3L", NULL, "OUT3L" }, { "HPOUT3R", NULL, "OUT3R" }, - { "AEC Loopback", "SPKOUTL", "OUT4L" }, + { "AEC1 Loopback", "SPKOUTL", "OUT4L" }, + { "AEC2 Loopback", "SPKOUTL", "OUT4L" }, { "SPKOUTLN", NULL, "OUT4L" }, { "SPKOUTLP", NULL, "OUT4L" }, - { "AEC Loopback", "SPKOUTR", "OUT4R" }, + { "AEC1 Loopback", "SPKOUTR", "OUT4R" }, + { "AEC2 Loopback", "SPKOUTR", "OUT4R" }, { "SPKOUTRN", NULL, "OUT4R" }, { "SPKOUTRP", NULL, "OUT4R" }, - { "AEC Loopback", "SPKDAT1L", "OUT5L" }, - { "AEC Loopback", "SPKDAT1R", "OUT5R" }, + { "AEC1 Loopback", "SPKDAT1L", "OUT5L" }, + { "AEC1 Loopback", "SPKDAT1R", "OUT5R" }, + { "AEC2 Loopback", "SPKDAT1L", "OUT5L" }, + { "AEC2 Loopback", "SPKDAT1R", "OUT5R" }, { "SPKDAT1L", NULL, "OUT5L" }, { "SPKDAT1R", NULL, "OUT5R" }, - { "AEC Loopback", "SPKDAT2L", "OUT6L" }, - { "AEC Loopback", "SPKDAT2R", "OUT6R" }, + { "AEC1 Loopback", "SPKDAT2L", "OUT6L" }, + { "AEC1 Loopback", "SPKDAT2R", "OUT6R" }, + { "AEC2 Loopback", "SPKDAT2L", "OUT6L" }, + { "AEC2 Loopback", "SPKDAT2R", "OUT6R" }, { "SPKDAT2L", NULL, "OUT6L" }, { "SPKDAT2R", NULL, "OUT6R" }, From c4565bfcb586b816938e1b1a702abb893f894974 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Wed, 14 Jan 2015 12:20:20 +0000 Subject: [PATCH 0870/1167] ASoC: wm_adsp: Support stereo capture for Ez2Control Change-Id: I5b74db1767c2ed22073b30c551fa924663789ee8 Signed-off-by: Nariman Poushin Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 4 ++-- sound/soc/codecs/florida.c | 4 ++-- sound/soc/codecs/marley.c | 4 ++-- sound/soc/codecs/wm_adsp.c | 2 +- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index efaf8a1ee53..6cfc0b80c26 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2650,7 +2650,7 @@ static struct snd_soc_dai_driver clearwater_dai[] = { .capture = { .stream_name = "Voice Control CPU", .channels_min = 1, - .channels_max = 1, + .channels_max = 2, .rates = CLEARWATER_RATES, .formats = CLEARWATER_FORMATS, }, @@ -2661,7 +2661,7 @@ static struct snd_soc_dai_driver clearwater_dai[] = { .capture = { .stream_name = "Voice Control DSP", .channels_min = 1, - .channels_max = 1, + .channels_max = 2, .rates = CLEARWATER_RATES, .formats = CLEARWATER_FORMATS, }, diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index cf5c42a7e34..0e0749b7f3a 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2118,7 +2118,7 @@ static struct snd_soc_dai_driver florida_dai[] = { .capture = { .stream_name = "Voice Control CPU", .channels_min = 1, - .channels_max = 1, + .channels_max = 2, .rates = FLORIDA_RATES, .formats = FLORIDA_FORMATS, }, @@ -2129,7 +2129,7 @@ static struct snd_soc_dai_driver florida_dai[] = { .capture = { .stream_name = "Voice Control DSP", .channels_min = 1, - .channels_max = 1, + .channels_max = 2, .rates = FLORIDA_RATES, .formats = FLORIDA_FORMATS, }, diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index d75c8b647c5..efe92e0ddda 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -1771,7 +1771,7 @@ static struct snd_soc_dai_driver marley_dai[] = { .capture = { .stream_name = "Voice Control CPU", .channels_min = 1, - .channels_max = 1, + .channels_max = 2, .rates = MARLEY_RATES, .formats = MARLEY_FORMATS, }, @@ -1782,7 +1782,7 @@ static struct snd_soc_dai_driver marley_dai[] = { .capture = { .stream_name = "Voice Control DSP", .channels_min = 1, - .channels_max = 1, + .channels_max = 2, .rates = MARLEY_RATES, .formats = MARLEY_FORMATS, }, diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 8f17236aa63..a4023cf62c3 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -351,7 +351,7 @@ static struct wm_adsp_fw_caps ez2control_caps[] = { { .id = SND_AUDIOCODEC_PCM, .desc = { - .max_ch = 1, + .max_ch = 2, .sample_rates = { 16000 }, .num_sample_rates = 1, .formats = SNDRV_PCM_FMTBIT_S16_LE, From bc3bfefe72ea3a228c87a9f200cbb0fce61face9 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Thu, 16 Jul 2015 16:36:21 +0100 Subject: [PATCH 0871/1167] regmap: Use reg_sequence for multi_reg_write / register_patch Separate the functionality using sequences of register writes from the functions that take register defaults. This change renames the arguments in order to support the extension of reg_sequence to take an optional delay to be applied after any given register in a sequence is written. This avoids adding an int to all register defaults, which could substantially increase memory usage for regmaps with large default tables. This also updates all the clients of multi_reg_write/register_patch. Change-Id: Ib82b04621d3d2c1051f030308d08caed611b7008 Signed-off-by: Nariman Poushin Signed-off-by: Mark Brown --- drivers/base/regmap/regmap.c | 6 +++--- drivers/mfd/arizona-core.c | 2 +- drivers/mfd/wm5102-tables.c | 16 ++++++++-------- include/linux/regmap.h | 15 +++++++++++++-- sound/soc/codecs/florida.c | 14 +++++++------- 5 files changed, 32 insertions(+), 21 deletions(-) diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c index e31a9baa819..d98d06e3919 100644 --- a/drivers/base/regmap/regmap.c +++ b/drivers/base/regmap/regmap.c @@ -1320,7 +1320,7 @@ int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, EXPORT_SYMBOL_GPL(regmap_bulk_write); static int _regmap_multi_reg_write(struct regmap *map, - const struct reg_default *regs, + const struct reg_sequence *regs, int num_regs) { int i, ret; @@ -1355,7 +1355,7 @@ static int _regmap_multi_reg_write(struct regmap *map, * A value of zero will be returned on success, a negative errno will * be returned in error cases. */ -int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs, +int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs, int num_regs) { int ret; @@ -1388,7 +1388,7 @@ EXPORT_SYMBOL_GPL(regmap_multi_reg_write); * be returned in error cases. */ int regmap_multi_reg_write_bypassed(struct regmap *map, - const struct reg_default *regs, + const struct reg_sequence *regs, int num_regs) { int ret; diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index d6c6c926194..29a0420b599 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -551,7 +551,7 @@ static int wm5102_apply_hardware_patch(struct arizona *arizona) * Register patch to some of the CODECs internal write sequences * to ensure a clean exit from the low power sleep state. */ -static const struct reg_default wm5110_sleep_patch[] = { +static const struct reg_sequence wm5110_sleep_patch[] = { { 0x337A, 0xC100 }, { 0x337B, 0x0041 }, { 0x3300, 0xA210 }, diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index 9977739d846..6ea51ff6d76 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -21,7 +21,7 @@ #define WM5102_NUM_AOD_ISR 2 #define WM5102_NUM_ISR 5 -static const struct reg_default wm5102_reva_patch[] = { +static const struct reg_sequence wm5102_reva_patch[] = { { 0x80, 0x0003 }, { 0x221, 0x0090 }, { 0x211, 0x0014 }, @@ -57,7 +57,7 @@ static const struct reg_default wm5102_reva_patch[] = { { 0x80, 0x0000 }, }; -static const struct reg_default wm5102_revb_patch[] = { +static const struct reg_sequence wm5102_revb_patch[] = { { 0x19, 0x0001 }, { 0x80, 0x0003 }, { 0x081, 0xE022 }, @@ -77,13 +77,13 @@ static const struct reg_default wm5102_revb_patch[] = { { 0x80, 0x0000 }, }; -static const struct reg_default wm5102t_pwr_1[] = { +static const struct reg_sequence wm5102t_pwr_1[] = { { 0x46C, 0xC01 }, { 0x46E, 0xC01 }, { 0x470, 0xC01 }, }; -static const struct reg_default wm5102t_pwr_2[] = { +static const struct reg_sequence wm5102t_pwr_2[] = { { 0x462, 0xC00 }, { 0x464, 0xC00 }, { 0x466, 0xC00 }, @@ -95,7 +95,7 @@ static const struct reg_default wm5102t_pwr_2[] = { { 0x476, 0x806 }, }; -static const struct reg_default wm5102t_pwr_3[] = { +static const struct reg_sequence wm5102t_pwr_3[] = { { 0x462, 0xC00 }, { 0x464, 0xC00 }, { 0x466, 0xC00 }, @@ -109,7 +109,7 @@ static const struct reg_default wm5102t_pwr_3[] = { { 0x47e, 0x80e }, }; -static const struct reg_default wm5102t_pwr_4[] = { +static const struct reg_sequence wm5102t_pwr_4[] = { { 0x462, 0xC00 }, { 0x464, 0xC00 }, { 0x466, 0xC00 }, @@ -128,7 +128,7 @@ static const struct reg_default wm5102t_pwr_4[] = { }; static const struct { - const struct reg_default *patch; + const struct reg_sequence *patch; int size; } wm5102t_pwr[] = { { NULL, 0 }, @@ -141,7 +141,7 @@ static const struct { /* We use a function so we can use ARRAY_SIZE() */ int wm5102_patch(struct arizona *arizona) { - const struct reg_default *wm5102_patch; + const struct reg_sequence *wm5102_patch; int ret; int patch_size; int pwr_index = arizona->pdata.wm5102t_output_pwr; diff --git a/include/linux/regmap.h b/include/linux/regmap.h index b3a7f3344c3..32dafd9863f 100644 --- a/include/linux/regmap.h +++ b/include/linux/regmap.h @@ -45,6 +45,17 @@ struct reg_default { unsigned int def; }; +/** + * Register/value pairs for sequences of writes + * + * @reg: Register address. + * @def: Register value. + */ +struct reg_sequence { + unsigned int reg; + unsigned int def; +}; + #ifdef CONFIG_REGMAP enum regmap_endian { @@ -375,10 +386,10 @@ int regmap_raw_write(struct regmap *map, unsigned int reg, const void *val, size_t val_len); int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, size_t val_count); -int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs, +int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs, int num_regs); int regmap_multi_reg_write_bypassed(struct regmap *map, - const struct reg_default *regs, + const struct reg_sequence *regs, int num_regs); int regmap_raw_write_async(struct regmap *map, unsigned int reg, const void *val, size_t val_len); diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 0e0749b7f3a..3420a24c945 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -225,7 +225,7 @@ static int florida_adsp_power_ev(struct snd_soc_dapm_widget *w, return arizona_adsp_power_ev(w, kcontrol, event); } -static const struct reg_default florida_no_dre_left_enable[] = { +static const struct reg_sequence florida_no_dre_left_enable[] = { { 0x3024, 0xE410 }, { 0x3025, 0x0056 }, { 0x301B, 0x0224 }, @@ -243,7 +243,7 @@ static const struct reg_default florida_no_dre_left_enable[] = { { 0x3039, 0x3080 }, }; -static const struct reg_default florida_dre_left_enable[] = { +static const struct reg_sequence florida_dre_left_enable[] = { { 0x3024, 0x0231 }, { 0x3025, 0x0B00 }, { 0x301B, 0x0227 }, @@ -261,7 +261,7 @@ static const struct reg_default florida_dre_left_enable[] = { { 0x3039, 0x0B00 }, }; -static const struct reg_default florida_no_dre_right_enable[] = { +static const struct reg_sequence florida_no_dre_right_enable[] = { { 0x3074, 0xE414 }, { 0x3075, 0x0056 }, { 0x306B, 0x0224 }, @@ -279,7 +279,7 @@ static const struct reg_default florida_no_dre_right_enable[] = { { 0x3089, 0x3080 }, }; -static const struct reg_default florida_dre_right_enable[] = { +static const struct reg_sequence florida_dre_right_enable[] = { { 0x3074, 0x0231 }, { 0x3075, 0x0B00 }, { 0x306B, 0x0227 }, @@ -302,7 +302,7 @@ static int florida_hp_pre_enable(struct snd_soc_dapm_widget *w) struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); struct arizona *arizona = priv->arizona; unsigned int val = snd_soc_read(w->codec, ARIZONA_DRE_ENABLE); - const struct reg_default *wseq; + const struct reg_sequence *wseq; int nregs; int ret; @@ -395,7 +395,7 @@ static int florida_hp_ev(struct snd_soc_dapm_widget *w, static int florida_clear_pga_volume(struct arizona *arizona, int output) { - struct reg_default clear_pga = { + struct reg_sequence clear_pga = { ARIZONA_OUTPUT_PATH_CONFIG_1L + output * 4, 0x80 }; int ret; @@ -413,7 +413,7 @@ static int florida_set_dre(struct arizona *arizona, unsigned int shift, { unsigned int mask = 1 << shift; unsigned int val = 0; - const struct reg_default *wseq; + const struct reg_sequence *wseq; int nregs; bool change; From 269f0c0aebd145e5f8b34e5b65b43867106b5087 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Thu, 16 Jul 2015 16:36:22 +0100 Subject: [PATCH 0872/1167] regmap: Apply optional delay in multi_reg_write/register_patch Add an optional delay_us field in reg_sequence to allow the client to specify a delay (in microseconds) to be applied after any given write in a sequence of writes. We treat a delay in a sequence the same way we treat a page change as they are logically similar in that you can coalesce all write before a delay (in the same way you can coalesce all writes before a page change is needed) Change-Id: Ic6850a90c71c6a7f15f4a76625ae8a75ab5c5d6a Signed-off-by: Nariman Poushin Signed-off-by: Mark Brown --- drivers/base/regmap/regmap.c | 4 ++++ include/linux/regmap.h | 5 ++++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c index d98d06e3919..321c0d49d0b 100644 --- a/drivers/base/regmap/regmap.c +++ b/drivers/base/regmap/regmap.c @@ -17,6 +17,7 @@ #include #include #include +#include #define CREATE_TRACE_POINTS #include @@ -1334,6 +1335,9 @@ static int _regmap_multi_reg_write(struct regmap *map, regs[i].reg, regs[i].def, ret); return ret; } + + if (regs[i].delay_us) + udelay(regs[i].delay_us); } return 0; diff --git a/include/linux/regmap.h b/include/linux/regmap.h index 32dafd9863f..6a4ac15eb11 100644 --- a/include/linux/regmap.h +++ b/include/linux/regmap.h @@ -46,14 +46,17 @@ struct reg_default { }; /** - * Register/value pairs for sequences of writes + * Register/value pairs for sequences of writes with an optional delay in + * microseconds to be applied after each write. * * @reg: Register address. * @def: Register value. + * @delay_us: Delay to be applied after the register write in microseconds */ struct reg_sequence { unsigned int reg; unsigned int def; + unsigned int delay_us; }; #ifdef CONFIG_REGMAP From da5576ca1da443f2d0087ac3e314a0eeae93f674 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Tue, 5 May 2015 16:43:35 +0100 Subject: [PATCH 0873/1167] mfd: arizona: Add lock to avoid race between dapm and set_sysclk For the cases where we modify the input to the DSPCLK domain on the fly we need to clear DSPCLK_ENA during the modification. Due to the fact that the DSPCLK supply widget also controls this bit, make sure we don't race. We can't use the dapm mutex here because we cannot guarantee that set_sysclk will not be called without the dapm_mutex held. Change-Id: I87c69f3893221bdfdaeb5bced5ec021f26998f07 Signed-off-by: Nariman Poushin --- drivers/mfd/arizona-core.c | 1 + include/linux/mfd/arizona/core.h | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 29a0420b599..df9bd3bb4fd 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1604,6 +1604,7 @@ int arizona_dev_init(struct arizona *arizona) mutex_init(&arizona->subsys_max_lock); mutex_init(&arizona->reg_setting_lock); mutex_init(&arizona->rate_lock); + mutex_init(&arizona->dspclk_ena_lock); if (dev_get_platdata(arizona->dev)) memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 3d8c1665584..2e50f351219 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -172,6 +172,7 @@ struct arizona { #endif struct mutex rate_lock; + struct mutex dspclk_ena_lock; }; #define ARIZONA_DVFS_SR1_RQ 0x00000001 From eb76346593892a31598175272e5699ef851073d0 Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Thu, 30 Apr 2015 14:24:23 +0100 Subject: [PATCH 0874/1167] ASoC: arizona: Add FLL1_DIV6 as a DSPCLK source for clearwater Change-Id: Idca15a3472ebafe0b51c144f8d522f65976ab825 Signed-off-by: Nariman Poushin Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 111 ++++++++++++++++++++++++++++++++-- sound/soc/codecs/arizona.h | 19 +++--- sound/soc/codecs/clearwater.c | 24 +++++++- 3 files changed, 140 insertions(+), 14 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index f884b6b0884..c6a4d03135a 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2370,12 +2370,27 @@ static int clearwater_get_sysclk_setting(unsigned int freq) } } -static int clearwater_get_dspclk_setting(unsigned int freq) +static int clearwater_get_dspclk_setting(unsigned int freq, + struct arizona *arizona, + int source) { switch (freq) { case 0: return 0; - /* For now we only support top speed for the DSP */ + case 45158400: + case 49152000: + switch (arizona->type) { + case WM1840: + case WM8285: + if (arizona->rev >= 3 && + source == CLEARWATER_CLK_SRC_FLL1_DIV6) + return ARIZONA_CLK_49MHZ << + ARIZONA_SYSCLK_FREQ_SHIFT; + else + return -EINVAL; + default: + return -EINVAL; + } case 135475200: case 147456000: return CLEARWATER_DSP_CLK_147MHZ << ARIZONA_SYSCLK_FREQ_SHIFT; @@ -2384,6 +2399,38 @@ static int clearwater_get_dspclk_setting(unsigned int freq) } } +void clearwater_get_dsp_reg_seq(unsigned int cur, unsigned int tar, + unsigned int reg, unsigned int mask, + struct reg_sequence *s) +{ + /* To transition DSPCLK to a new source and frequency we must: + * - Disable DSPCLK_ENA + * - Wait 34us + * - Write the new source, freq and enable in one write + */ + unsigned int tmp; + + mask |= CLEARWATER_DSP_CLK_ENA_MASK; + + s[0].reg = reg; + s[0].def = (cur & ~CLEARWATER_DSP_CLK_ENA_MASK); + /* The required delay is one worst case clock period (32kHz) + 2 us */ + s[0].delay_us = 34; + + /* Clear the fields we care about */ + tmp = (cur & ~mask); + + /* Update the fields */ + tmp |= tar & mask; + + /* Re-set the enable bit */ + tmp |= CLEARWATER_DSP_CLK_ENA_MASK; + + s[1].reg = reg; + s[1].def = tmp; + s[1].delay_us = 0; +} + int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id, int source, unsigned int freq, int dir) { @@ -2396,6 +2443,9 @@ int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id, unsigned int val = source << ARIZONA_SYSCLK_SRC_SHIFT; int clk_freq; int *clk; + unsigned int dspclk_change = 0; + unsigned int dspclk_val; + struct reg_sequence dspclk_seq[2]; switch (arizona->type) { case WM8997: @@ -2449,7 +2499,18 @@ int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id, name = "DSPCLK"; reg = CLEARWATER_DSP_CLOCK_1; clk = &priv->dspclk; - clk_freq = clearwater_get_dspclk_setting(freq); + clk_freq = clearwater_get_dspclk_setting(freq, + arizona, + source); + switch (arizona->type) { + case WM1840: + case WM8285: + dspclk_change = 1; + break; + default: + break; + } + break; default: return -EINVAL; @@ -2478,7 +2539,49 @@ int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id, dev_dbg(arizona->dev, "%s set to %uHz", name, freq); - return regmap_update_bits(arizona->regmap, reg, mask, val); + /* For the cases where we are changing DSPCLK on the fly we need to + * make sure DSPCLK_ENA is disabled for at least 32uS before changing it + */ + if (dspclk_change) { + mutex_lock(&arizona->dspclk_ena_lock); + + /* Is DSPCLK_ENA on? */ + ret = regmap_read(arizona->regmap, reg, &dspclk_val); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read 0x%04x: %d\n", + reg, ret); + goto err; + } + + if (dspclk_val & CLEARWATER_DSP_CLK_ENA_MASK) { + clearwater_get_dsp_reg_seq(dspclk_val, val, reg, mask, + dspclk_seq); + + ret = regmap_multi_reg_write(arizona->regmap, + dspclk_seq, + ARRAY_SIZE(dspclk_seq)); + + if (ret != 0) { + dev_err(arizona->dev, + "Failed to write dspclk_seq: %d\n", + ret); + goto err; + } + } else { + ret = regmap_update_bits(arizona->regmap, reg, mask, + val); + } + + mutex_unlock(&arizona->dspclk_ena_lock); + } else { + ret = regmap_update_bits(arizona->regmap, reg, mask, val); + } + + return ret; + +err: + mutex_unlock(&arizona->dspclk_ena_lock); + return ret; } EXPORT_SYMBOL_GPL(arizona_set_sysclk); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index e46fe5d5815..ec05a0d1ede 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -28,15 +28,16 @@ #define ARIZONA_CLK_ASYNCCLK_2 7 #define ARIZONA_CLK_DSPCLK 8 -#define ARIZONA_CLK_SRC_MCLK1 0x0 -#define ARIZONA_CLK_SRC_MCLK2 0x1 -#define ARIZONA_CLK_SRC_FLL1 0x4 -#define ARIZONA_CLK_SRC_FLL2 0x5 -#define ARIZONA_CLK_SRC_FLL3 0x6 -#define ARIZONA_CLK_SRC_AIF1BCLK 0x8 -#define ARIZONA_CLK_SRC_AIF2BCLK 0x9 -#define ARIZONA_CLK_SRC_AIF3BCLK 0xa -#define ARIZONA_CLK_SRC_AIF4BCLK 0xb +#define ARIZONA_CLK_SRC_MCLK1 0x0 +#define ARIZONA_CLK_SRC_MCLK2 0x1 +#define ARIZONA_CLK_SRC_FLL1 0x4 +#define ARIZONA_CLK_SRC_FLL2 0x5 +#define ARIZONA_CLK_SRC_FLL3 0x6 +#define CLEARWATER_CLK_SRC_FLL1_DIV6 0x7 +#define ARIZONA_CLK_SRC_AIF1BCLK 0x8 +#define ARIZONA_CLK_SRC_AIF2BCLK 0x9 +#define ARIZONA_CLK_SRC_AIF3BCLK 0xa +#define ARIZONA_CLK_SRC_AIF4BCLK 0xb #define ARIZONA_FLL_SRC_NONE -1 #define ARIZONA_FLL_SRC_MCLK1 0 diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 6cfc0b80c26..79ab09d6415 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -587,6 +587,27 @@ static int clearwater_sysclk_ev(struct snd_soc_dapm_widget *w, return 0; } +static int clearwater_dspclk_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_codec *codec = w->codec; + struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(codec); + struct arizona_priv *priv = &clearwater->core; + struct arizona *arizona = priv->arizona; + + switch (event) { + case SND_SOC_DAPM_PRE_REG: + mutex_lock(&arizona->dspclk_ena_lock); + break; + case SND_SOC_DAPM_POST_REG: + mutex_unlock(&arizona->dspclk_ena_lock); + break; + } + + return 0; +} + static int clearwater_adsp_power_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) @@ -1354,7 +1375,8 @@ SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK, SND_SOC_DAPM_SUPPLY("ASYNCOPCLK", ARIZONA_OUTPUT_ASYNC_CLOCK, ARIZONA_OPCLK_ASYNC_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("DSPCLK", CLEARWATER_DSP_CLOCK_1, 6, - 0, NULL, 0), + 0, clearwater_dspclk_ev, + SND_SOC_DAPM_PRE_REG | SND_SOC_DAPM_POST_REG), SND_SOC_DAPM_REGULATOR_SUPPLY("DBVDD2", 0, 0), From e798afe8610bb8848ea1b59e46d2c5dac6f35cbd Mon Sep 17 00:00:00 2001 From: Nariman Poushin Date: Wed, 29 Jul 2015 11:17:01 +0100 Subject: [PATCH 0875/1167] ASoC: arizona: Make clearwater_get_dsp_reg_seq static Change-Id: Ia0ccb3f88ffee3d3b391695026bed43876ecfaf3 Signed-off-by: Nariman Poushin --- sound/soc/codecs/arizona.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index c6a4d03135a..5f0c99b7b14 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2399,9 +2399,9 @@ static int clearwater_get_dspclk_setting(unsigned int freq, } } -void clearwater_get_dsp_reg_seq(unsigned int cur, unsigned int tar, - unsigned int reg, unsigned int mask, - struct reg_sequence *s) +static void clearwater_get_dsp_reg_seq(unsigned int cur, unsigned int tar, + unsigned int reg, unsigned int mask, + struct reg_sequence *s) { /* To transition DSPCLK to a new source and frequency we must: * - Disable DSPCLK_ENA From 0d8ef24350bec67ed5f42699acbdabed65912a20 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 20 Mar 2015 10:40:06 +0000 Subject: [PATCH 0876/1167] ASoC: wm_adsp: factor out writing wmfw block data Move the loop which buffers and writes wmfw data out into a separate function so that it can be re-used for other purposes. Change-Id: I19b5666d974bd5db5b08b2081a61d39da0af0e83 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 79 ++++++++++++++++++++++---------------- 1 file changed, 46 insertions(+), 33 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index a4023cf62c3..cbd9229a374 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1317,6 +1317,43 @@ static int wm_adsp_parse_coeff(struct wm_adsp *dsp, return 0; } +static int wm_adsp_write_blocks(struct wm_adsp *dsp, const u8 *data, size_t len, + unsigned reg, struct list_head *list) + +{ + size_t to_write = PAGE_SIZE; + size_t remain = len; + struct wm_adsp_buf *buf; + int ret; + + while (remain > 0) { + if (remain < PAGE_SIZE) + to_write = remain; + + buf = wm_adsp_buf_alloc(data, to_write, list); + if (!buf) { + adsp_err(dsp, "Out of memory\n"); + return -ENOMEM; + } + + ret = regmap_raw_write_async(dsp->regmap, reg, + buf->buf, to_write); + if (ret != 0) { + adsp_err(dsp, + "Failed to write %zd bytes at %d\n", + to_write, reg); + + return ret; + } + + data += to_write; + reg += to_write / 2; + remain -= to_write; + } + + return 0; +} + static int wm_adsp_load(struct wm_adsp *dsp) { LIST_HEAD(buf_list); @@ -1331,7 +1368,6 @@ static int wm_adsp_load(struct wm_adsp *dsp) const struct wm_adsp_region *mem; const char *region_name; char *file, *text; - struct wm_adsp_buf *buf; unsigned int reg; int regions = 0; int ret, offset, type, sizes; @@ -1516,38 +1552,15 @@ static int wm_adsp_load(struct wm_adsp *dsp) } if (reg) { - size_t to_write = PAGE_SIZE; - size_t remain = le32_to_cpu(region->len); - const u8 *data = region->data; - - while (remain > 0) { - if (remain < PAGE_SIZE) - to_write = remain; - - buf = wm_adsp_buf_alloc(data, - to_write, - &buf_list); - if (!buf) { - adsp_err(dsp, "Out of memory\n"); - ret = -ENOMEM; - goto out_buf; - } - - ret = regmap_raw_write_async(regmap, reg, - buf->buf, - to_write); - if (ret != 0) { - adsp_err(dsp, - "%s.%d: Failed to write %zd bytes at %d in %s: %d\n", - file, regions, - to_write, offset, - region_name, ret); - goto out_buf; - } - - data += to_write; - reg += to_write / 2; - remain -= to_write; + ret = wm_adsp_write_blocks(dsp, region->data, + le32_to_cpu(region->len), + reg, &buf_list); + if (ret != 0) { + adsp_err(dsp, + "%s.%d: Failed writing data at %d in %s: %d\n", + file, regions, + offset, region_name, ret); + goto out_buf; } } From 0d9a2678c9db31e3da59ba71e1d02020d39f887c Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 23 Mar 2015 10:18:35 +0000 Subject: [PATCH 0877/1167] ASoC: wm_adsp: split binfile load into smaller chunks If the binfile contains any large regions and memory is heavily fragmented the allocation of a single buffer for the region data can fail. Avoid this by splitting the data into page-sized chunks. Change-Id: I88380b5322a41ef73583a025a2dc07d47bedcbe2 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 19 +++---------------- 1 file changed, 3 insertions(+), 16 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index cbd9229a374..2de458f9508 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1918,7 +1918,6 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) int ret = 0; int err, pos, blocks, type, offset, reg; char *file; - struct wm_adsp_buf *buf; if (dsp->firmwares[dsp->fw].binfile && !(strcmp(dsp->firmwares[dsp->fw].binfile, "None"))) @@ -2057,20 +2056,10 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) } if (reg) { - buf = wm_adsp_buf_alloc(blk->data, - le32_to_cpu(blk->len), - &buf_list); - if (!buf) { - adsp_err(dsp, "Out of memory\n"); - ret = -ENOMEM; - goto out_async; - } + ret = wm_adsp_write_blocks(dsp, blk->data, + le32_to_cpu(blk->len), + reg, &buf_list); - adsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n", - file, blocks, le32_to_cpu(blk->len), - reg); - ret = regmap_raw_write_async(regmap, reg, buf->buf, - le32_to_cpu(blk->len)); if (ret != 0) { adsp_err(dsp, "%s.%d: Failed to write to %x in %s: %d\n", @@ -2087,8 +2076,6 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) file, blocks, pos - firmware->size); wm_adsp_debugfs_save_binname(dsp, file); - -out_async: err = regmap_async_complete(regmap); if (err != 0) { adsp_err(dsp, "Failed to complete async write: %d\n", err); From 4770857df38e3bb6abbc3c1681a5c484fa04bbe1 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 23 Mar 2015 14:01:42 +0000 Subject: [PATCH 0878/1167] ASoC: wm_adsp: Fail if there are errors applying the binfile The code was logging errors during the binfile load but continuing with the load. The result is unlikely to be useful if we've failed to load all the data to the DSP so instead return an error and fail the load if there are any failures during loading the binfile. Change-Id: I824186d60c45ed3870a8aaa03a4ea50bba8b29b4 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 2de458f9508..f7d14ddb9c8 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2007,7 +2007,8 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) mem = wm_adsp_find_region(dsp, type); if (!mem) { adsp_err(dsp, "No ZM\n"); - break; + ret = -EINVAL; + goto out_fw; } reg = wm_adsp_region_to_reg(mem, 0); @@ -2028,7 +2029,8 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) mem = wm_adsp_find_region(dsp, type); if (!mem) { adsp_err(dsp, "No base for region %x\n", type); - break; + ret = -EINVAL; + goto out_fw; } reg = 0; @@ -2044,15 +2046,19 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) } } - if (reg == 0) + if (reg == 0) { adsp_err(dsp, "No %x for algorithm %x\n", type, le32_to_cpu(blk->id)); + ret = -EINVAL; + goto out_fw; + } break; default: adsp_err(dsp, "%s.%d: Unknown region type %x at %d\n", file, blocks, type, pos); - break; + ret = -EINVAL; + goto out_fw; } if (reg) { @@ -2064,6 +2070,7 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) adsp_err(dsp, "%s.%d: Failed to write to %x in %s: %d\n", file, blocks, reg, region_name, ret); + goto out_fw; } } From 9549032014f0ad87e319ced9691d0332248930f9 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 5 May 2015 09:56:32 +0100 Subject: [PATCH 0879/1167] ASoC: vegas: Fix missing error returns from ASRC widget If the ASRC widget detects that the ASRC is set to an invalid sample rate it should be failing with an error. Change-Id: I27cd047f3fe714f782e23ebd97a7a40d09aef001 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/vegas.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/vegas.c b/sound/soc/codecs/vegas.c index 15dc149e687..0b250d3bbda 100644 --- a/sound/soc/codecs/vegas.c +++ b/sound/soc/codecs/vegas.c @@ -93,8 +93,10 @@ static int vegas_asrc_ev(struct snd_soc_dapm_widget *w, val >>= ARIZONA_ASRC_RATE1_SHIFT; val = snd_soc_read(w->codec, ARIZONA_SAMPLE_RATE_1 + val); - if (val >= 0x11) + if (val >= 0x11) { dev_warn(w->codec->dev, "Unsupported ASRC rate1\n"); + return -EINVAL; + } val = snd_soc_read(w->codec, ARIZONA_ASRC_RATE2); val &= ARIZONA_ASRC_RATE2_MASK; @@ -102,8 +104,10 @@ static int vegas_asrc_ev(struct snd_soc_dapm_widget *w, val -= 0x8; val = snd_soc_read(w->codec, ARIZONA_ASYNC_SAMPLE_RATE_1 + val); - if (val >= 0x11) + if (val >= 0x11) { dev_warn(w->codec->dev, "Unsupported ASRC rate2\n"); + return -EINVAL; + } break; default: return -EINVAL; From a1722a15959e2105be54dcfc20d383d7cb1740a4 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 5 May 2015 10:03:41 +0100 Subject: [PATCH 0880/1167] ASoC: vegas: Make illegal ASRC rate detection log the bad rate If the ASRC widget detects that the ASRC is set to an illegal rate, include the actual rate in the log message Change-Id: I6ea4cff98137ce6a577d7fe8c773fe387322fa8d Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 13 ++++++++++++ sound/soc/codecs/arizona.h | 2 ++ sound/soc/codecs/vegas.c | 42 +++++++++++++++++++++++++++++++------- 3 files changed, 50 insertions(+), 7 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 5f0c99b7b14..e94af709da3 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1411,6 +1411,19 @@ const unsigned int arizona_sample_rate_val[ARIZONA_SAMPLE_RATE_ENUM_SIZE] = { }; EXPORT_SYMBOL_GPL(arizona_sample_rate_val); +const char *arizona_sample_rate_val_to_name(unsigned int rate_val) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(arizona_sample_rate_val); ++i) { + if (arizona_sample_rate_val[i] == rate_val) + return arizona_sample_rate_text[i]; + } + + return "Illegal"; +} +EXPORT_SYMBOL_GPL(arizona_sample_rate_val_to_name); + const struct soc_enum arizona_sample_rate[] = { SOC_VALUE_ENUM_SINGLE(ARIZONA_SAMPLE_RATE_2, ARIZONA_SAMPLE_RATE_2_SHIFT, 0x1f, diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index ec05a0d1ede..a282af4ce1e 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -429,4 +429,6 @@ arizona_get_extcon_info(struct snd_soc_codec *codec); extern int arizona_enable_force_bypass(struct snd_soc_codec *codec); extern int arizona_disable_force_bypass(struct snd_soc_codec *codec); +extern const char *arizona_sample_rate_val_to_name(unsigned int rate_val); + #endif diff --git a/sound/soc/codecs/vegas.c b/sound/soc/codecs/vegas.c index 0b250d3bbda..3d04557a7f5 100644 --- a/sound/soc/codecs/vegas.c +++ b/sound/soc/codecs/vegas.c @@ -92,22 +92,50 @@ static int vegas_asrc_ev(struct snd_soc_dapm_widget *w, val &= ARIZONA_ASRC_RATE1_MASK; val >>= ARIZONA_ASRC_RATE1_SHIFT; - val = snd_soc_read(w->codec, ARIZONA_SAMPLE_RATE_1 + val); - if (val >= 0x11) { - dev_warn(w->codec->dev, "Unsupported ASRC rate1\n"); + switch (val) { + case 0: + case 1: + case 2: + val = snd_soc_read(w->codec, + ARIZONA_SAMPLE_RATE_1 + val); + if (val >= 0x11) { + dev_warn(w->codec->dev, + "Unsupported ASRC rate1 (%s)\n", + arizona_sample_rate_val_to_name(val)); + return -EINVAL; + } + break; + default: + dev_err(w->codec->dev, + "Illegal ASRC rate1 selector (0x%x)\n", + val); return -EINVAL; } val = snd_soc_read(w->codec, ARIZONA_ASRC_RATE2); val &= ARIZONA_ASRC_RATE2_MASK; val >>= ARIZONA_ASRC_RATE2_SHIFT; - val -= 0x8; - val = snd_soc_read(w->codec, ARIZONA_ASYNC_SAMPLE_RATE_1 + val); - if (val >= 0x11) { - dev_warn(w->codec->dev, "Unsupported ASRC rate2\n"); + switch (val) { + case 8: + case 9: + val -= 0x8; + val = snd_soc_read(w->codec, + ARIZONA_ASYNC_SAMPLE_RATE_1 + val); + if (val >= 0x11) { + dev_warn(w->codec->dev, + "Unsupported ASRC rate2 (%s)\n", + arizona_sample_rate_val_to_name(val)); + return -EINVAL; + } + break; + default: + dev_err(w->codec->dev, + "Illegal ASRC rate2 selector (0x%x)\n", + val); return -EINVAL; } + break; default: return -EINVAL; From f9b3f93989ba5039d1bb36a5712c632307d653f6 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 25 Jul 2014 16:15:28 +0100 Subject: [PATCH 0881/1167] mfd: arizona: Disable IRQ whilst we unbind driver Change-Id: I48d8854cfe0a3ac432f5adb04a340fdee44fac25 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index df9bd3bb4fd..9279374f05e 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -2239,6 +2239,7 @@ EXPORT_SYMBOL_GPL(arizona_dev_init); int arizona_dev_exit(struct arizona *arizona) { pm_runtime_disable(arizona->dev); + disable_irq(arizona->irq); regulator_disable(arizona->dcvdd); regulator_unregister_notifier(arizona->dcvdd, &arizona->dcvdd_notifier); From 07d71a8165922affc429685ec9fe7b3af00783f4 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 7 Aug 2015 16:48:38 +0100 Subject: [PATCH 0882/1167] mfd: arizona: Update default Clearwater EDRE settings Change-Id: I45497f1be3870de5e92b0a29c4a09175b8c0c736 Signed-off-by: Richard Fitzgerald --- drivers/mfd/clearwater-tables.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index c634801d44e..2418554b4bb 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -44,11 +44,13 @@ static const struct reg_default clearwater_reva_16_patch[] = { { 0x27E, 0x0000 }, { 0x80, 0x0000 }, { 0x80, 0x0000 }, + { 0x448, 0x003f }, }; static const struct reg_default clearwater_revc_16_patch[] = { { 0x27E, 0x0000 }, { 0x2C2, 0x5 }, + { 0x448, 0x003f }, }; /* this patch is required for EDRE on RevA*/ @@ -637,7 +639,7 @@ static const struct reg_default clearwater_reg_default[] = { { 0x0000043d, 0x0180 }, /* R1085 (0x43D) - DAC Digital Volume 6R */ { 0x0000043f, 0x0800 }, /* R1087 (0x43F) - Noise Gate Select 6R */ { 0x00000440, 0x003f }, /* R1088 (0x440) - DRE Enable */ - { 0x00000448, 0x0fff }, /* R1096 (0x448) - eDRE Enable */ + { 0x00000448, 0x003f }, /* R1096 (0x448) - eDRE Enable */ { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */ { 0x00000451, 0x0000 }, /* R1105 - DAC AEC Control 2 */ { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */ From e5f1b8c6281a6a75bcb3542b4b6e0cba6bb3bda1 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 7 Aug 2015 16:51:09 +0100 Subject: [PATCH 0883/1167] ASoC: clearwater: Remove speaker EDRE controls The state of EDRE on speakers must not be changed from the driver default setting so remove the ALSA controls. Change-Id: I321b7832c79b35b36ed0222fc0059c566e89ce43 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 79ab09d6415..a2c569514ab 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -1075,18 +1075,6 @@ SOC_DOUBLE("HPOUT3 EDRE Switch", CLEARWATER_EDRE_ENABLE, CLEARWATER_EDRE_OUT3L_THR1_ENA_SHIFT, CLEARWATER_EDRE_OUT3R_THR1_ENA_SHIFT, 1, 0), -SOC_DOUBLE("Speaker THR1 EDRE Switch", CLEARWATER_EDRE_ENABLE, - CLEARWATER_EDRE_OUT4L_THR1_ENA_SHIFT, - CLEARWATER_EDRE_OUT4R_THR1_ENA_SHIFT, 1, 0), -SOC_DOUBLE("Speaker THR2 EDRE Switch", CLEARWATER_EDRE_ENABLE, - CLEARWATER_EDRE_OUT4L_THR2_ENA_SHIFT, - CLEARWATER_EDRE_OUT4R_THR2_ENA_SHIFT, 1, 0), -SOC_DOUBLE("Speaker THR3 EDRE Switch", CLEARWATER_EDRE_ENABLE, - CLEARWATER_EDRE_OUT4L_THR3_ENA_SHIFT, - CLEARWATER_EDRE_OUT4R_THR3_ENA_SHIFT, 1, 0), - - - SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp), SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp), From 0ef36d6b05171b2e037c454dc4589f204a36daeb Mon Sep 17 00:00:00 2001 From: V V N Praveen Kumar Date: Mon, 29 Jun 2015 18:02:09 +0530 Subject: [PATCH 0884/1167] switch: arizona: Adding missing unregistration of the input device Change-Id: I6fa8f01be8c57d2540beb046a41c40030c51fa01 Signed-off-by: V V N Praveen Kumar --- drivers/switch/switch-arizona.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 6a72d767233..946e50af5be 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -3724,6 +3724,7 @@ static int arizona_extcon_remove(struct platform_device *pdev) arizona_free_irq(arizona, jack_irq_rise, info); arizona_free_irq(arizona, jack_irq_fall, info); cancel_delayed_work_sync(&info->hpdet_work); + input_unregister_device(info->input); regmap_update_bits(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, ARIZONA_JD1_ENA | ARIZONA_JD2_ENA, 0); arizona_clk32k_disable(arizona); From 9e38761e18b923ad2a3c7b22406a91e5ac097338 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 3 Jun 2015 12:58:03 +0100 Subject: [PATCH 0885/1167] Revert "mfd: arizona: improve handling of DVFS in suspend" This reverts commit 636bdbf4ab52fc668b24694cd40ee8b736eabc2b in preparation for switching to the upstream implementation. Conflicts: drivers/mfd/arizona-core.c Change-Id: I17a5afa5ef86484cd9fe8ea34ab8067bfa257fd1 Signed-off-by: Richard Fitzgerald --- drivers/mfd/arizona-core.c | 184 ++++++++++++------------------- include/linux/mfd/arizona/core.h | 1 - 2 files changed, 73 insertions(+), 112 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 9279374f05e..576ee86118c 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -99,85 +99,50 @@ int arizona_clk32k_disable(struct arizona *arizona) } EXPORT_SYMBOL_GPL(arizona_clk32k_disable); -static int arizona_dvfs_apply_boost(struct arizona *arizona) -{ - int ret; - - ret = regulator_set_voltage(arizona->dcvdd, 1800000, 1800000); - if (ret != 0) { - dev_err(arizona->dev, - "Failed to boost DCVDD: %d\n", ret); - return ret; - } - - ret = regmap_update_bits(arizona->regmap, - ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, - ARIZONA_SUBSYS_MAX_FREQ, 1); - if (ret != 0) { - dev_err(arizona->dev, - "Failed to enable subsys max: %d\n", ret); - - regulator_set_voltage(arizona->dcvdd, 1200000, 1800000); - return ret; - } - - return 0; -} - -static int arizona_dvfs_remove_boost(struct arizona *arizona) -{ - int ret; - - ret = regmap_update_bits(arizona->regmap, - ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, - ARIZONA_SUBSYS_MAX_FREQ, 0); - if (ret != 0) { - dev_err(arizona->dev, - "Failed to disable subsys max: %d\n", ret); - return ret; - } - - ret = regulator_set_voltage(arizona->dcvdd, 1200000, 1800000); - if (ret != 0) { - dev_err(arizona->dev, - "Failed to unboost DCVDD : %d\n", ret); - return ret; - } - - return 0; -} - int arizona_dvfs_up(struct arizona *arizona, unsigned int flags) { - unsigned int old_flags; + unsigned int new_flags; int ret = 0; mutex_lock(&arizona->subsys_max_lock); - old_flags = arizona->subsys_max_rq; - arizona->subsys_max_rq |= flags; - - /* If currently caching the change will be applied in runtime resume */ - if (arizona->subsys_max_cached) { - dev_dbg(arizona->dev, "subsys_max_cached (dvfs up)\n"); - goto out; - } + new_flags = arizona->subsys_max_rq | flags; - if (arizona->subsys_max_rq != old_flags) { + if (arizona->subsys_max_rq != new_flags) { switch (arizona->type) { case WM5102: case WM8997: case WM8998: case WM1814: - ret = arizona_dvfs_apply_boost(arizona); + ret = regulator_set_voltage(arizona->dcvdd, + 1800000, 1800000); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to set DCVDD (DVFS up): %d\n", + ret); + goto err; + } + + ret = regmap_update_bits(arizona->regmap, + ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, + ARIZONA_SUBSYS_MAX_FREQ, 1); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to enable subsys max: %d\n", + ret); + regulator_set_voltage(arizona->dcvdd, + 1200000, 1800000); + goto err; + } break; default: break; } + arizona->subsys_max_rq = new_flags; } -out: +err: mutex_unlock(&arizona->subsys_max_lock); return ret; } @@ -185,34 +150,39 @@ EXPORT_SYMBOL_GPL(arizona_dvfs_up); int arizona_dvfs_down(struct arizona *arizona, unsigned int flags) { - unsigned int old_flags; int ret = 0; mutex_lock(&arizona->subsys_max_lock); - old_flags = arizona->subsys_max_rq; arizona->subsys_max_rq &= ~flags; - /* If currently caching the change will be applied in runtime resume */ - if (arizona->subsys_max_cached) { - dev_dbg(arizona->dev, "subsys_max_cached (dvfs down)\n"); - goto out; - } - - if ((old_flags != 0) && (arizona->subsys_max_rq == 0)) { + if (arizona->subsys_max_rq == 0) { switch (arizona->type) { case WM5102: case WM8997: case WM8998: case WM1814: - ret = arizona_dvfs_remove_boost(arizona); + ret = regmap_update_bits(arizona->regmap, + ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, + ARIZONA_SUBSYS_MAX_FREQ, 0); + if (ret != 0) + dev_err(arizona->dev, + "Failed to disable subsys max: %d\n", + ret); + + ret = regulator_set_voltage(arizona->dcvdd, + 1200000, 1800000); + if (ret != 0) + dev_err(arizona->dev, + "Failed to set DCVDD (DVFS down): %d\n", + ret); break; default: break; } } -out: + mutex_unlock(&arizona->subsys_max_lock); return ret; } @@ -622,33 +592,6 @@ static int arizona_soft_reset(struct arizona *arizona) } #ifdef CONFIG_PM_RUNTIME -static int arizona_restore_dvfs(struct arizona *arizona) -{ - int ret; - - switch (arizona->type) { - default: - return 0; /* no DVFS */ - - case WM5102: - case WM8997: - case WM8998: - case WM1814: - break; - } - - ret = 0; - mutex_lock(&arizona->subsys_max_lock); - if (arizona->subsys_max_rq != 0) { - dev_dbg(arizona->dev, "Restore subsys_max boost\n"); - ret = arizona_dvfs_apply_boost(arizona); - } - - arizona->subsys_max_cached = false; - mutex_unlock(&arizona->subsys_max_lock); - return ret; -} - static int arizona_dcvdd_notify(struct notifier_block *nb, unsigned long action, void *data) { @@ -826,9 +769,31 @@ static int arizona_runtime_resume(struct device *dev) } } - ret = arizona_restore_dvfs(arizona); - if (ret < 0) - goto err; + switch(arizona->type) { + case WM5102: + case WM8997: + case WM8998: + case WM1814: + /* Restore DVFS setting */ + ret = 0; + mutex_lock(&arizona->subsys_max_lock); + if (arizona->subsys_max_rq != 0) { + ret = regmap_update_bits(arizona->regmap, + ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, + ARIZONA_SUBSYS_MAX_FREQ, 1); + } + mutex_unlock(&arizona->subsys_max_lock); + + if (ret != 0) { + dev_err(arizona->dev, + "Failed to enable subsys max: %d\n", + ret); + goto err; + } + break; + default: + break; + } return 0; @@ -851,10 +816,9 @@ static int arizona_runtime_suspend(struct device *dev) case WM8998: case WM1814: /* Must disable DVFS boost before powering down DCVDD */ - mutex_lock(&arizona->subsys_max_lock); - arizona->subsys_max_cached = true; - arizona_dvfs_remove_boost(arizona); - mutex_unlock(&arizona->subsys_max_lock); + regmap_update_bits(arizona->regmap, + ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, + ARIZONA_SUBSYS_MAX_FREQ, 0); break; default: break; @@ -877,7 +841,7 @@ static int arizona_runtime_suspend(struct device *dev) if (ret != 0) { dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", ret); - goto err; + return ret; } break; default: @@ -893,12 +857,13 @@ static int arizona_runtime_suspend(struct device *dev) * to request an exact range. */ ret = regulator_set_voltage(arizona->dcvdd, - 1175000, 1175000); + 1175000, + 1175000); if (ret < 0) { dev_err(arizona->dev, "Failed to set suspend voltage: %d\n", ret); - goto err; + return ret; } break; default: @@ -913,9 +878,6 @@ static int arizona_runtime_suspend(struct device *dev) regulator_disable(arizona->dcvdd); return 0; -err: - arizona_restore_dvfs(arizona); - return ret; } #else static inline int arizona_dcvdd_notify(struct notifier_block *nb, diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 2e50f351219..bb0c0c98da1 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -154,7 +154,6 @@ struct arizona { struct mutex subsys_max_lock; unsigned int subsys_max_rq; - bool subsys_max_cached; struct snd_soc_dapm_context *dapm; From 901b190f44530d09978267a7186eb7d61ab63d32 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 3 Jun 2015 13:00:21 +0100 Subject: [PATCH 0886/1167] Revert "mfd: arizona: Disable DVFS boost in suspend" This reverts commit 739b3b8e6c7f709531c4fe6bfb38f4d581cfe818 in preparation for switching to the upstream implementation. Conflicts: drivers/mfd/arizona-core.c Change-Id: I67fb54866bd461b750223d4e061a8168fdd1c701 Signed-off-by: Richard Fitzgerald --- drivers/mfd/arizona-core.c | 40 -------------------------------------- 1 file changed, 40 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 576ee86118c..75f68f1d602 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -769,32 +769,6 @@ static int arizona_runtime_resume(struct device *dev) } } - switch(arizona->type) { - case WM5102: - case WM8997: - case WM8998: - case WM1814: - /* Restore DVFS setting */ - ret = 0; - mutex_lock(&arizona->subsys_max_lock); - if (arizona->subsys_max_rq != 0) { - ret = regmap_update_bits(arizona->regmap, - ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, - ARIZONA_SUBSYS_MAX_FREQ, 1); - } - mutex_unlock(&arizona->subsys_max_lock); - - if (ret != 0) { - dev_err(arizona->dev, - "Failed to enable subsys max: %d\n", - ret); - goto err; - } - break; - default: - break; - } - return 0; err: @@ -810,20 +784,6 @@ static int arizona_runtime_suspend(struct device *dev) dev_dbg(arizona->dev, "Entering AoD mode\n"); - switch(arizona->type) { - case WM5102: - case WM8997: - case WM8998: - case WM1814: - /* Must disable DVFS boost before powering down DCVDD */ - regmap_update_bits(arizona->regmap, - ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, - ARIZONA_SUBSYS_MAX_FREQ, 0); - break; - default: - break; - } - if (arizona->external_dcvdd) { switch (arizona->type) { case WM5102: From 5408f7b1ee72399496ca04cf2da7c4e5345c8514 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 3 Jun 2015 13:01:36 +0100 Subject: [PATCH 0887/1167] Revert "mfd: arizona: Remove bogus warning in arizona_dvfs_down" This reverts commit 7401f5e8c2d472ee4ea5d1c0cdc1b7ee11d3d889 in preparation for switching to the upstream implementation. Change-Id: I859e4aef87fa835c8592b2b7bb3d168e2b6e1f76 Signed-off-by: Richard Fitzgerald --- drivers/mfd/arizona-core.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 75f68f1d602..db832fbafd3 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -154,6 +154,9 @@ int arizona_dvfs_down(struct arizona *arizona, unsigned int flags) mutex_lock(&arizona->subsys_max_lock); + if ((arizona->subsys_max_rq & flags) != flags) + dev_warn(arizona->dev, "Unbalanced DVFS down: %x\n", flags); + arizona->subsys_max_rq &= ~flags; if (arizona->subsys_max_rq == 0) { From 67e07db6ebf7aeee4cdb7fc95877ad289e15f45a Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 3 Jun 2015 13:02:48 +0100 Subject: [PATCH 0888/1167] Revert "mfd: arizona: Export function to control subsystem DVFS" This reverts commit 7d94864eab55bbea4b9438cda38d2e5d6be10f3e in preparation for switching to the upstream implementation. Conflicts: drivers/mfd/arizona-core.c Change-Id: Icd8de903dbca475aafcabe8aeb5735fc544d3e7a Signed-off-by: Richard Fitzgerald --- drivers/mfd/arizona-core.c | 93 -------------------------------- include/linux/mfd/arizona/core.h | 12 ----- 2 files changed, 105 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index db832fbafd3..f0d5ca0b2b6 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -99,98 +99,6 @@ int arizona_clk32k_disable(struct arizona *arizona) } EXPORT_SYMBOL_GPL(arizona_clk32k_disable); -int arizona_dvfs_up(struct arizona *arizona, unsigned int flags) -{ - unsigned int new_flags; - int ret = 0; - - mutex_lock(&arizona->subsys_max_lock); - - new_flags = arizona->subsys_max_rq | flags; - - if (arizona->subsys_max_rq != new_flags) { - switch (arizona->type) { - case WM5102: - case WM8997: - case WM8998: - case WM1814: - ret = regulator_set_voltage(arizona->dcvdd, - 1800000, 1800000); - if (ret != 0) { - dev_err(arizona->dev, - "Failed to set DCVDD (DVFS up): %d\n", - ret); - goto err; - } - - ret = regmap_update_bits(arizona->regmap, - ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, - ARIZONA_SUBSYS_MAX_FREQ, 1); - if (ret != 0) { - dev_err(arizona->dev, - "Failed to enable subsys max: %d\n", - ret); - regulator_set_voltage(arizona->dcvdd, - 1200000, 1800000); - goto err; - } - break; - - default: - break; - } - - arizona->subsys_max_rq = new_flags; - } -err: - mutex_unlock(&arizona->subsys_max_lock); - return ret; -} -EXPORT_SYMBOL_GPL(arizona_dvfs_up); - -int arizona_dvfs_down(struct arizona *arizona, unsigned int flags) -{ - int ret = 0; - - mutex_lock(&arizona->subsys_max_lock); - - if ((arizona->subsys_max_rq & flags) != flags) - dev_warn(arizona->dev, "Unbalanced DVFS down: %x\n", flags); - - arizona->subsys_max_rq &= ~flags; - - if (arizona->subsys_max_rq == 0) { - switch (arizona->type) { - case WM5102: - case WM8997: - case WM8998: - case WM1814: - ret = regmap_update_bits(arizona->regmap, - ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, - ARIZONA_SUBSYS_MAX_FREQ, 0); - if (ret != 0) - dev_err(arizona->dev, - "Failed to disable subsys max: %d\n", - ret); - - ret = regulator_set_voltage(arizona->dcvdd, - 1200000, 1800000); - if (ret != 0) - dev_err(arizona->dev, - "Failed to set DCVDD (DVFS down): %d\n", - ret); - break; - - default: - break; - } - } - - mutex_unlock(&arizona->subsys_max_lock); - return ret; -} -EXPORT_SYMBOL_GPL(arizona_dvfs_down); - static irqreturn_t arizona_clkgen_err(int irq, void *data) { struct arizona *arizona = data; @@ -1526,7 +1434,6 @@ int arizona_dev_init(struct arizona *arizona) dev_set_drvdata(arizona->dev, arizona); mutex_init(&arizona->clk_lock); - mutex_init(&arizona->subsys_max_lock); mutex_init(&arizona->reg_setting_lock); mutex_init(&arizona->rate_lock); mutex_init(&arizona->dspclk_ena_lock); diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index bb0c0c98da1..9f7d5fc64a7 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -152,9 +152,6 @@ struct arizona { struct mutex clk_lock; int clk32k_ref; - struct mutex subsys_max_lock; - unsigned int subsys_max_rq; - struct snd_soc_dapm_context *dapm; struct mutex reg_setting_lock; @@ -174,17 +171,8 @@ struct arizona { struct mutex dspclk_ena_lock; }; -#define ARIZONA_DVFS_SR1_RQ 0x00000001 -#define ARIZONA_DVFS_SR2_RQ 0x00000002 -#define ARIZONA_DVFS_SR3_RQ 0x00000004 -#define ARIZONA_DVFS_ASR1_RQ 0x00000010 -#define ARIZONA_DVFS_ASR2_RQ 0x00000020 -#define ARIZONA_DVFS_ADSP1_RQ 0x00010000 - int arizona_clk32k_enable(struct arizona *arizona); int arizona_clk32k_disable(struct arizona *arizona); -int arizona_dvfs_up(struct arizona *arizona, unsigned int mask); -int arizona_dvfs_down(struct arizona *arizona, unsigned int mask); int arizona_request_irq(struct arizona *arizona, int irq, char *name, irq_handler_t handler, void *data); From a22b4fda58c3ff6cf052cdf8b0c18af859269da0 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 3 Jun 2015 13:58:09 +0100 Subject: [PATCH 0889/1167] ASoC: arizona: Export functions to control subsystem DVFS The WM5102, WM8997 and WM8998 have an internal dynamic clock booster. When this booster is active, the DCVDD voltage must be increased. If all the currently active audio paths can run with the root SYSCLK we can disable the booster, allowing us to turn down DCVDD voltage to save power. Previously this was being done by having the booster enable bit set as a side-effect of the LDO1 regulator driver, which is unexpected behaviour of a regulator and not compatible with using an external regulator. This patch exports functions to handle the booster enable and DCVDD voltage, with each relevant subsystem flagging whether it can currently run without the booster. Note that these subsystems are stateless and none of them are nestable, so there's no need for reference counting, we only need a simple boolean for each subsystem of whether their current condition could require the booster or will allow us to turn the codec down to lower operating power. Change-Id: I09aba9fc88f3effed5425cee5eeebde66fb515f3 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 137 +++++++++++++++++++++++++++++++++++-- sound/soc/codecs/arizona.h | 16 +++++ sound/soc/codecs/vegas.c | 22 +++++- sound/soc/codecs/wm5102.c | 16 +++-- sound/soc/codecs/wm8997.c | 11 ++- 5 files changed, 187 insertions(+), 15 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index e94af709da3..7be4c861933 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2260,6 +2260,134 @@ int arizona_anc_ev(struct snd_soc_dapm_widget *w, } EXPORT_SYMBOL_GPL(arizona_anc_ev); +static int arizona_dvfs_enable(struct snd_soc_codec *codec) +{ + const struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; + int ret; + + ret = regulator_set_voltage(arizona->dcvdd, 1800000, 1800000); + if (ret) { + dev_err(codec->dev, "Failed to boost DCVDD: %d\n", ret); + return ret; + } + + ret = regmap_update_bits(arizona->regmap, + ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, + ARIZONA_SUBSYS_MAX_FREQ, + ARIZONA_SUBSYS_MAX_FREQ); + if (ret) { + dev_err(codec->dev, "Failed to enable subsys max: %d\n", ret); + regulator_set_voltage(arizona->dcvdd, 1200000, 1800000); + return ret; + } + + return 0; +} + +static int arizona_dvfs_disable(struct snd_soc_codec *codec) +{ + const struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; + int ret; + + ret = regmap_update_bits(arizona->regmap, + ARIZONA_DYNAMIC_FREQUENCY_SCALING_1, + ARIZONA_SUBSYS_MAX_FREQ, 0); + if (ret) { + dev_err(codec->dev, "Failed to disable subsys max: %d\n", ret); + return ret; + } + + ret = regulator_set_voltage(arizona->dcvdd, 1200000, 1800000); + if (ret) { + dev_err(codec->dev, "Failed to unboost DCVDD: %d\n", ret); + return ret; + } + + return 0; +} + +int arizona_dvfs_up(struct snd_soc_codec *codec, unsigned int flags) +{ + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + int ret = 0; + + mutex_lock(&priv->dvfs_lock); + + if (!priv->dvfs_cached && !priv->dvfs_reqs) { + ret = arizona_dvfs_enable(codec); + if (ret) + goto err; + } + + priv->dvfs_reqs |= flags; +err: + mutex_unlock(&priv->dvfs_lock); + return ret; +} +EXPORT_SYMBOL_GPL(arizona_dvfs_up); + +int arizona_dvfs_down(struct snd_soc_codec *codec, unsigned int flags) +{ + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + unsigned int old_reqs; + int ret = 0; + + mutex_lock(&priv->dvfs_lock); + + old_reqs = priv->dvfs_reqs; + priv->dvfs_reqs &= ~flags; + + if (!priv->dvfs_cached && old_reqs && !priv->dvfs_reqs) + ret = arizona_dvfs_disable(codec); + + mutex_unlock(&priv->dvfs_lock); + return ret; +} +EXPORT_SYMBOL_GPL(arizona_dvfs_down); + +int arizona_dvfs_sysclk_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + int ret = 0; + + mutex_lock(&priv->dvfs_lock); + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + if (priv->dvfs_reqs) + ret = arizona_dvfs_enable(codec); + + priv->dvfs_cached = false; + break; + case SND_SOC_DAPM_PRE_PMD: + /* We must ensure DVFS is disabled before the codec goes into + * suspend so that we are never in an illegal state of DVFS + * enabled without enough DCVDD + */ + priv->dvfs_cached = true; + + if (priv->dvfs_reqs) + ret = arizona_dvfs_disable(codec); + break; + default: + break; + } + + mutex_unlock(&priv->dvfs_lock); + return ret; +} +EXPORT_SYMBOL_GPL(arizona_dvfs_sysclk_ev); + +void arizona_init_dvfs(struct arizona_priv *priv) +{ + mutex_init(&priv->dvfs_lock); +} +EXPORT_SYMBOL_GPL(arizona_init_dvfs); + static unsigned int arizona_sysclk_48k_rates[] = { 6144000, 12288000, @@ -2801,7 +2929,6 @@ int arizona_put_sample_rate_enum(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); - struct arizona *arizona = dev_get_drvdata(codec->dev->parent); struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; unsigned int val; unsigned int flag; @@ -2831,11 +2958,11 @@ int arizona_put_sample_rate_enum(struct snd_kcontrol *kcontrol, } if (arizona_sr_vals[val] >= 88200) { - ret = arizona_dvfs_up(arizona, flag); + ret = arizona_dvfs_up(codec, flag); if (ret != 0) dev_err(codec->dev, "Failed to raise DVFS %d\n", ret); } else { - ret = arizona_dvfs_down(arizona, flag); + ret = arizona_dvfs_down(codec, flag); } return ret; @@ -2941,10 +3068,10 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, case WM8998: case WM1814: if (arizona_sr_vals[sr_val] >= 88200) - ret = arizona_dvfs_up(priv->arizona, + ret = arizona_dvfs_up(codec, ARIZONA_DVFS_SR1_RQ); else - ret = arizona_dvfs_down(priv->arizona, + ret = arizona_dvfs_down(codec, ARIZONA_DVFS_SR1_RQ); if (ret != 0) { diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index a282af4ce1e..37bc1c25777 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -76,6 +76,13 @@ #define ARIZONA_MAX_DAI 11 #define ARIZONA_MAX_ADSP 7 +#define ARIZONA_DVFS_SR1_RQ 0x001 +#define ARIZONA_DVFS_SR2_RQ 0x002 +#define ARIZONA_DVFS_SR3_RQ 0x004 +#define ARIZONA_DVFS_ASR1_RQ 0x008 +#define ARIZONA_DVFS_ASR2_RQ 0x010 +#define ARIZONA_DVFS_ADSP1_RQ 0x100 + struct arizona; struct wm_adsp; struct arizona_jd_state; @@ -102,6 +109,9 @@ struct arizona_priv { unsigned int spk_mute_cache; unsigned int spk_thr2_cache; + unsigned int dvfs_reqs; + struct mutex dvfs_lock; + bool dvfs_cached; }; #define ARIZONA_NUM_MIXER_INPUTS 134 @@ -388,6 +398,12 @@ struct arizona_fll { char clock_ok_name[ARIZONA_FLL_NAME_LEN]; }; +extern int arizona_dvfs_up(struct snd_soc_codec *codec, unsigned int flags); +extern int arizona_dvfs_down(struct snd_soc_codec *codec, unsigned int flags); +extern int arizona_dvfs_sysclk_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event); +extern void arizona_init_dvfs(struct arizona_priv *priv); + extern int arizona_init_fll(struct arizona *arizona, int id, int base, int lock_irq, int ok_irq, struct arizona_fll *fll); extern int arizona_set_fll_refclk(struct arizona_fll *fll, int source, diff --git a/sound/soc/codecs/vegas.c b/sound/soc/codecs/vegas.c index 3d04557a7f5..8d228bcd934 100644 --- a/sound/soc/codecs/vegas.c +++ b/sound/soc/codecs/vegas.c @@ -58,6 +58,7 @@ static int vegas_put_spk_edre(struct snd_kcontrol *kcontrol, struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); unsigned int val = 0; + mutex_lock_nested(&codec->card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); if (ucontrol->value.integer.value[0] != 0) @@ -80,6 +81,21 @@ static int vegas_put_spk_edre(struct snd_kcontrol *kcontrol, return 0; } +static int vegas_sysclk_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + break; + case SND_SOC_DAPM_PRE_PMD: + break; + default: + return 0; + } + + return arizona_dvfs_sysclk_ev(w, kcontrol, event); +} static int vegas_asrc_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) @@ -634,7 +650,9 @@ static const struct snd_kcontrol_new vegas_aec_loopback_mux[] = { static const struct snd_soc_dapm_widget vegas_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, - ARIZONA_SYSCLK_ENA_SHIFT, 0, NULL, 0), + ARIZONA_SYSCLK_ENA_SHIFT, 0, + vegas_sysclk_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), SND_SOC_DAPM_SUPPLY("ASYNCCLK", ARIZONA_ASYNC_CLOCK_1, ARIZONA_ASYNC_CLK_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK, @@ -1491,6 +1509,8 @@ static int vegas_probe(struct platform_device *pdev) vegas->core.arizona = arizona; vegas->core.num_inputs = 3; /* IN1L, IN1R, IN2 */ + arizona_init_dvfs(&vegas->core); + for (i = 0; i < ARRAY_SIZE(vegas->fll); i++) vegas->fll[i].vco_mult = 1; diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index dc6b5568db3..919c0e80b24 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -618,12 +618,13 @@ static int wm5102_sysclk_ev(struct snd_soc_dapm_widget *w, wm5102t_sysclk_pwr[i].reg, wm5102t_sysclk_pwr[i].def); break; - - default: + case SND_SOC_DAPM_PRE_PMD: break; + default: + return 0; } - return 0; + return arizona_dvfs_sysclk_ev(w, kcontrol, event); } static int wm5102_adsp_power_ev(struct snd_soc_dapm_widget *w, @@ -646,7 +647,7 @@ static int wm5102_adsp_power_ev(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_PRE_PMU: if (v >= 3) { - ret = arizona_dvfs_up(arizona, ARIZONA_DVFS_ADSP1_RQ); + ret = arizona_dvfs_up(codec, ARIZONA_DVFS_ADSP1_RQ); if (ret != 0) { dev_err(codec->dev, "Failed to raise DVFS: %d\n", ret); @@ -656,7 +657,7 @@ static int wm5102_adsp_power_ev(struct snd_soc_dapm_widget *w, break; case SND_SOC_DAPM_POST_PMD: - ret = arizona_dvfs_down(arizona, ARIZONA_DVFS_ADSP1_RQ); + ret = arizona_dvfs_down(codec, ARIZONA_DVFS_ADSP1_RQ); if (ret != 0) dev_warn(codec->dev, "Failed to lower DVFS: %d\n", ret); @@ -1106,7 +1107,8 @@ static const struct snd_kcontrol_new wm5102_aec_loopback_mux = static const struct snd_soc_dapm_widget wm5102_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT, - 0, wm5102_sysclk_ev, SND_SOC_DAPM_POST_PMU), + 0, wm5102_sysclk_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), SND_SOC_DAPM_SUPPLY("ASYNCCLK", ARIZONA_ASYNC_CLOCK_1, ARIZONA_ASYNC_CLK_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK, @@ -2033,6 +2035,8 @@ static int wm5102_probe(struct platform_device *pdev) wm5102->core.arizona = arizona; wm5102->core.num_inputs = 6; + arizona_init_dvfs(&wm5102->core); + wm5102->core.adsp[0].part = "wm5102"; wm5102->core.adsp[0].num = 1; wm5102->core.adsp[0].type = WMFW_ADSP2; diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c index f60ccb3c825..27df9431b35 100644 --- a/sound/soc/codecs/wm8997.c +++ b/sound/soc/codecs/wm8997.c @@ -106,11 +106,13 @@ static int wm8997_sysclk_ev(struct snd_soc_dapm_widget *w, regmap_write(regmap, patch[i].reg, patch[i].def); break; - default: + case SND_SOC_DAPM_PRE_PMD: break; + default: + return 0; } - return 0; + return arizona_dvfs_sysclk_ev(w, kcontrol, event); } static const char * const wm8997_osr_text[] = { @@ -404,7 +406,8 @@ static const struct snd_kcontrol_new wm8997_aec_loopback_mux = static const struct snd_soc_dapm_widget wm8997_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT, - 0, wm8997_sysclk_ev, SND_SOC_DAPM_POST_PMU), + 0, wm8997_sysclk_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), SND_SOC_DAPM_SUPPLY("ASYNCCLK", ARIZONA_ASYNC_CLOCK_1, ARIZONA_ASYNC_CLK_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK, @@ -1122,6 +1125,8 @@ static int wm8997_probe(struct platform_device *pdev) wm8997->core.arizona = arizona; wm8997->core.num_inputs = 4; + arizona_init_dvfs(&wm8997->core); + for (i = 0; i < ARRAY_SIZE(wm8997->fll); i++) wm8997->fll[i].vco_mult = 1; From eb6f5805a68c25fbd53790b442ec5a39969a3cef Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 6 Aug 2015 13:13:12 +0100 Subject: [PATCH 0890/1167] ASoC: arizona: fix high bandwidth setting of fll high bandwidth must be based on fsync value, which is the input to fll synchroniser loop after applying the input divider, also the threshold to switch the bandwidth must be 128K and not 100K Change-Id: I98f8dd5932f38a79d294eee15c8efbeee142f96b Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 7be4c861933..dda45fab4ee 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -3854,6 +3854,7 @@ static int arizona_enable_fll(struct arizona_fll *fll) int already_enabled = arizona_is_enabled_fll(fll); struct arizona_fll_cfg cfg; bool fll_change; + unsigned int fsync_freq; if (already_enabled < 0) return already_enabled; @@ -3881,7 +3882,7 @@ static int arizona_enable_fll(struct arizona_fll *fll) false); if (fll->sync_src >= 0) { arizona_calc_fll(fll, &cfg, fll->sync_freq, true); - + fsync_freq = fll->sync_freq / (1 << cfg.refdiv); fll_change |= arizona_apply_fll(arizona, fll->base + 0x10, &cfg, fll->sync_src, true); use_sync = true; @@ -3903,7 +3904,7 @@ static int arizona_enable_fll(struct arizona_fll *fll) * Increase the bandwidth if we're not using a low frequency * sync source. */ - if (use_sync && fll->sync_freq > 100000) + if (use_sync && fsync_freq > 128000) regmap_update_bits(arizona->regmap, fll->base + 0x17, ARIZONA_FLL1_SYNC_BW, 0); else From fe014f1825f356927ada0e526e3d56533db97b10 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 6 Aug 2015 13:17:07 +0100 Subject: [PATCH 0891/1167] ASoC: arizona: fix fratio for fll reference loop fratio (for fll reference loop) was not correctly set in the part of the code which skips pseudo fractional mode for 22.5MHz > 90.3MHz Change-Id: I129b04ae03464f7e4a83c2e744c65ba8e6dcebcb Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index dda45fab4ee..4bc70380868 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -3632,8 +3632,11 @@ static int arizona_calc_fratio(struct arizona_fll *fll, return init_ratio; break; default: - if (Fref == 11289600 && target == 90316800) + if (Fref == 11289600 && target == 90316800) { + if (!sync) + cfg->fratio = init_ratio - 1; return init_ratio; + } if (sync) return init_ratio; From 24c24bcc7e81d7c50e7eedac09f96fe14fe17126 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 6 Aug 2015 13:50:57 +0100 Subject: [PATCH 0892/1167] ASoC: arizona: rename variables used in fll code use sensible names which reflect the data sheet naming for variable involved in fll setup code, also in the process remove camel case from variable naming Change-Id: Ie4b887fc4a365577e6c6c5c1da69631c5c68a24d Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 110 +++++++++++++++++++------------------ sound/soc/codecs/arizona.h | 4 +- 2 files changed, 58 insertions(+), 56 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 4bc70380868..109c407aeeb 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -3559,32 +3559,32 @@ struct arizona_fll_cfg { }; static int arizona_validate_fll(struct arizona_fll *fll, - unsigned int Fref, - unsigned int Fvco) + unsigned int fin, + unsigned int fvco) { - if (fll->fvco && Fvco != fll->fvco) { + if (fll->fvco && fvco != fll->fvco) { arizona_fll_err(fll, "Can't change output on active FLL\n"); return -EINVAL; } - if (Fref / ARIZONA_FLL_MAX_REFDIV > ARIZONA_FLL_MAX_FREF) { + if (fin / ARIZONA_FLL_MAX_REFDIV > ARIZONA_FLL_MAX_FREF) { arizona_fll_err(fll, "Can't scale %dMHz in to <=13.5MHz\n", - Fref); + fin); return -EINVAL; } return 0; } -static int arizona_find_fratio(unsigned int Fref, int *fratio) +static int arizona_find_fratio(unsigned int fref, int *fratio) { int i; /* Find an appropriate FLL_FRATIO */ for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) { - if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) { + if (fll_fratios[i].min <= fref && fref <= fll_fratios[i].max) { if (fratio) *fratio = fll_fratios[i].fratio; return fll_fratios[i].ratio; @@ -3596,18 +3596,19 @@ static int arizona_find_fratio(unsigned int Fref, int *fratio) static int arizona_calc_fratio(struct arizona_fll *fll, struct arizona_fll_cfg *cfg, - unsigned int target, - unsigned int Fref, bool sync) + unsigned int fvco, + unsigned int fin, bool sync) { int init_ratio, ratio; int refdiv, div; + unsigned int fref = fin; /* Fref must be <=13.5MHz, find initial refdiv */ div = 1; cfg->refdiv = 0; - while (Fref > ARIZONA_FLL_MAX_FREF) { + while (fref > ARIZONA_FLL_MAX_FREF) { div *= 2; - Fref /= 2; + fref /= 2; cfg->refdiv++; if (div > ARIZONA_FLL_MAX_REFDIV) @@ -3615,10 +3616,10 @@ static int arizona_calc_fratio(struct arizona_fll *fll, } /* Find an appropriate FLL_FRATIO */ - init_ratio = arizona_find_fratio(Fref, &cfg->fratio); + init_ratio = arizona_find_fratio(fref, &cfg->fratio); if (init_ratio < 0) { - arizona_fll_err(fll, "Unable to find FRATIO for Fref=%uHz\n", - Fref); + arizona_fll_err(fll, "Unable to find FRATIO for fref=%uHz\n", + fref); return init_ratio; } @@ -3632,7 +3633,7 @@ static int arizona_calc_fratio(struct arizona_fll *fll, return init_ratio; break; default: - if (Fref == 11289600 && target == 90316800) { + if (fref == 11289600 && fvco == 90316800) { if (!sync) cfg->fratio = init_ratio - 1; return init_ratio; @@ -3651,10 +3652,10 @@ static int arizona_calc_fratio(struct arizona_fll *fll, for (ratio = init_ratio; ratio <= ARIZONA_FLL_MAX_FRATIO; ratio++) { if ((ARIZONA_FLL_VCO_CORNER / 2) / - (fll->vco_mult * ratio) < Fref) + (fll->vco_mult * ratio) < fref) break; - if (target % (ratio * Fref)) { + if (fvco % (ratio * fref)) { cfg->refdiv = refdiv; cfg->fratio = ratio - 1; return ratio; @@ -3662,7 +3663,7 @@ static int arizona_calc_fratio(struct arizona_fll *fll, } for (ratio = init_ratio - 1; ratio > 0; ratio--) { - if (target % (ratio * Fref)) { + if (fvco % (ratio * fref)) { cfg->refdiv = refdiv; cfg->fratio = ratio - 1; return ratio; @@ -3670,9 +3671,9 @@ static int arizona_calc_fratio(struct arizona_fll *fll, } div *= 2; - Fref /= 2; + fref /= 2; refdiv++; - init_ratio = arizona_find_fratio(Fref, NULL); + init_ratio = arizona_find_fratio(fref, NULL); } arizona_fll_warn(fll, "Falling back to integer mode operation\n"); @@ -3681,35 +3682,36 @@ static int arizona_calc_fratio(struct arizona_fll *fll, static int arizona_calc_fll(struct arizona_fll *fll, struct arizona_fll_cfg *cfg, - unsigned int Fref, bool sync) + unsigned int fin, bool sync) { - unsigned int target, gcd_fll; + unsigned int fvco, gcd_fll; int i, ratio; + unsigned int fref; - arizona_fll_dbg(fll, "Fref=%u Fout=%u\n", Fref, fll->fout); + arizona_fll_dbg(fll, "fin=%u fout=%u\n", fin, fll->fout); - target = fll->fvco; + fvco = fll->fvco; cfg->outdiv = fll->outdiv; - arizona_fll_dbg(fll, "Fvco=%dHz\n", target); + arizona_fll_dbg(fll, "fvco=%dHz\n", fvco); /* Find an appropriate FLL_FRATIO and refdiv */ - ratio = arizona_calc_fratio(fll, cfg, target, Fref, sync); + ratio = arizona_calc_fratio(fll, cfg, fvco, fin, sync); if (ratio < 0) return ratio; /* Apply the division for our remaining calculations */ - Fref = Fref / (1 << cfg->refdiv); + fref = fin / (1 << cfg->refdiv); - cfg->n = target / (ratio * Fref); + cfg->n = fvco / (ratio * fref); - if (target % (ratio * Fref)) { - gcd_fll = gcd(target, ratio * Fref); + if (fvco % (ratio * fref)) { + gcd_fll = gcd(fvco, ratio * fref); arizona_fll_dbg(fll, "GCD=%u\n", gcd_fll); - cfg->theta = (target - (cfg->n * ratio * Fref)) + cfg->theta = (fvco - (cfg->n * ratio * fref)) / gcd_fll; - cfg->lambda = (ratio * Fref) / gcd_fll; + cfg->lambda = (ratio * fref) / gcd_fll; } else { cfg->theta = 0; cfg->lambda = 0; @@ -3725,14 +3727,14 @@ static int arizona_calc_fll(struct arizona_fll *fll, } for (i = 0; i < ARRAY_SIZE(fll_gains); i++) { - if (fll_gains[i].min <= Fref && Fref <= fll_gains[i].max) { + if (fll_gains[i].min <= fref && fref <= fll_gains[i].max) { cfg->gain = fll_gains[i].gain; break; } } if (i == ARRAY_SIZE(fll_gains)) { - arizona_fll_err(fll, "Unable to find gain for Fref=%uHz\n", - Fref); + arizona_fll_err(fll, "Unable to find gain for fref=%uHz\n", + fref); return -EINVAL; } @@ -3960,23 +3962,23 @@ static void arizona_disable_fll(struct arizona_fll *fll) } int arizona_set_fll_refclk(struct arizona_fll *fll, int source, - unsigned int Fref, unsigned int Fout) + unsigned int fin, unsigned int fout) { int ret = 0; - if (fll->ref_src == source && fll->ref_freq == Fref) + if (fll->ref_src == source && fll->ref_freq == fin) return 0; - if (fll->fout && Fref > 0) { - ret = arizona_validate_fll(fll, Fref, fll->fvco); + if (fll->fout && fin > 0) { + ret = arizona_validate_fll(fll, fin, fll->fvco); if (ret != 0) return ret; } fll->ref_src = source; - fll->ref_freq = Fref; + fll->ref_freq = fin; - if (fll->fout && Fref > 0) { + if (fll->fout && fin > 0) { ret = arizona_enable_fll(fll); } @@ -3985,47 +3987,47 @@ int arizona_set_fll_refclk(struct arizona_fll *fll, int source, EXPORT_SYMBOL_GPL(arizona_set_fll_refclk); int arizona_set_fll(struct arizona_fll *fll, int source, - unsigned int Fref, unsigned int Fout) + unsigned int fin, unsigned int fout) { - unsigned int Fvco = 0; + unsigned int fvco = 0; int div = 0; int ret = 0; if (fll->sync_src == source && - fll->sync_freq == Fref && fll->fout == Fout) + fll->sync_freq == fin && fll->fout == fout) return 0; - if (Fout) { + if (fout) { div = fll->min_outdiv; - while (Fout * div < ARIZONA_FLL_MIN_FVCO * fll->vco_mult) { + while (fout * div < ARIZONA_FLL_MIN_FVCO * fll->vco_mult) { div++; if (div > fll->max_outdiv) { arizona_fll_err(fll, "No FLL_OUTDIV for Fout=%uHz\n", - Fout); + fout); return -EINVAL; } } - Fvco = Fout * div / fll->vco_mult; + fvco = fout * div / fll->vco_mult; if (fll->ref_src >= 0) { - ret = arizona_validate_fll(fll, fll->ref_freq, Fvco); + ret = arizona_validate_fll(fll, fll->ref_freq, fvco); if (ret != 0) return ret; } - ret = arizona_validate_fll(fll, Fref, Fvco); + ret = arizona_validate_fll(fll, fin, fvco); if (ret != 0) return ret; } fll->sync_src = source; - fll->sync_freq = Fref; - fll->fvco = Fvco; + fll->sync_freq = fin; + fll->fvco = fvco; fll->outdiv = div; - fll->fout = Fout; + fll->fout = fout; - if (Fout) + if (fout) ret = arizona_enable_fll(fll); else arizona_disable_fll(fll); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 37bc1c25777..ad1a4f6e3da 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -407,9 +407,9 @@ extern void arizona_init_dvfs(struct arizona_priv *priv); extern int arizona_init_fll(struct arizona *arizona, int id, int base, int lock_irq, int ok_irq, struct arizona_fll *fll); extern int arizona_set_fll_refclk(struct arizona_fll *fll, int source, - unsigned int Fref, unsigned int Fout); + unsigned int fin, unsigned int fout); extern int arizona_set_fll(struct arizona_fll *fll, int source, - unsigned int Fref, unsigned int Fout); + unsigned int fin, unsigned int fout); extern int arizona_init_spk(struct snd_soc_codec *codec); extern int arizona_init_gpio(struct snd_soc_codec *codec); From e3b53018409a7f728db0cb23291a8b613fb4e3f6 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 6 Aug 2015 13:59:01 +0100 Subject: [PATCH 0893/1167] ASoC: arizona: remove unused variables from fll struct Change-Id: Ic1832bc281e639d609db3faaf0559fc9424969b8 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 9 --------- sound/soc/codecs/arizona.h | 6 ------ 2 files changed, 15 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 109c407aeeb..10874e8ba57 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -3919,9 +3919,6 @@ static int arizona_enable_fll(struct arizona_fll *fll) if (!already_enabled) pm_runtime_get(arizona->dev); - /* Clear any pending completions */ - try_wait_for_completion(&fll->ok); - regmap_update_bits(arizona->regmap, fll->base + 1, ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA); if (use_sync) @@ -4041,8 +4038,6 @@ int arizona_init_fll(struct arizona *arizona, int id, int base, int lock_irq, { unsigned int val; - init_completion(&fll->ok); - fll->id = id; fll->base = base; fll->arizona = arizona; @@ -4065,10 +4060,6 @@ int arizona_init_fll(struct arizona *arizona, int id, int base, int lock_irq, } fll->ref_freq = 32768; - snprintf(fll->lock_name, sizeof(fll->lock_name), "FLL%d lock", id); - snprintf(fll->clock_ok_name, sizeof(fll->clock_ok_name), - "FLL%d clock OK", id); - regmap_update_bits(arizona->regmap, fll->base + 1, ARIZONA_FLL1_FREERUN, 0); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index ad1a4f6e3da..d63d3f99468 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -375,14 +375,11 @@ extern void clearwater_spin_sysclk(struct arizona *arizona); extern const struct snd_soc_dai_ops arizona_dai_ops; extern const struct snd_soc_dai_ops arizona_simple_dai_ops; -#define ARIZONA_FLL_NAME_LEN 20 - struct arizona_fll { struct arizona *arizona; int id; unsigned int base; unsigned int vco_mult; - struct completion ok; unsigned int fvco; int min_outdiv; @@ -393,9 +390,6 @@ struct arizona_fll { unsigned int sync_freq; int ref_src; unsigned int ref_freq; - - char lock_name[ARIZONA_FLL_NAME_LEN]; - char clock_ok_name[ARIZONA_FLL_NAME_LEN]; }; extern int arizona_dvfs_up(struct snd_soc_codec *codec, unsigned int flags); From 5f22d82a526d50d5c74433ca74a24c1811c77b82 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 6 Aug 2015 15:44:25 +0100 Subject: [PATCH 0894/1167] ASoC: arizona: cache the fll configuration the current code was recomputing the fll configuration everytime we set the fll, in most systems the fll configurations remains the same and we just turn on/off the fll. In this patch we cache the previously computed fll configuration and apply the same if no reconfiguration is needed i.e both fin and fout of the fll are same Change-Id: Ie7d69bf37a758a09d00614f28e5bae7c2c7aaa99 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 38 +++++++++++++++++++------------------- sound/soc/codecs/arizona.h | 14 ++++++++++++++ 2 files changed, 33 insertions(+), 19 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 10874e8ba57..08a4ec32b38 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -3548,16 +3548,6 @@ static struct { { 1000000, 13500000, 4 }, }; -struct arizona_fll_cfg { - int n; - int theta; - int lambda; - int refdiv; - int outdiv; - int fratio; - int gain; -}; - static int arizona_validate_fll(struct arizona_fll *fll, unsigned int fin, unsigned int fvco) @@ -3690,9 +3680,15 @@ static int arizona_calc_fll(struct arizona_fll *fll, arizona_fll_dbg(fll, "fin=%u fout=%u\n", fin, fll->fout); - fvco = fll->fvco; cfg->outdiv = fll->outdiv; + if (cfg->fin == fin && cfg->fvco == fll->fvco) { + /* use the pre-computed fll configuration */ + return 0; + } + + fvco = fll->fvco; + arizona_fll_dbg(fll, "fvco=%dHz\n", fvco); /* Find an appropriate FLL_FRATIO and refdiv */ @@ -3738,6 +3734,9 @@ static int arizona_calc_fll(struct arizona_fll *fll, return -EINVAL; } + cfg->fin = fin; + cfg->fvco = fll->fvco; + arizona_fll_dbg(fll, "N=%x THETA=%x LAMBDA=%x\n", cfg->n, cfg->theta, cfg->lambda); arizona_fll_dbg(fll, "FRATIO=%x(%d) OUTDIV=%x REFCLK_DIV=%x\n", @@ -3857,7 +3856,8 @@ static int arizona_enable_fll(struct arizona_fll *fll) struct arizona *arizona = fll->arizona; bool use_sync = false; int already_enabled = arizona_is_enabled_fll(fll); - struct arizona_fll_cfg cfg; + struct arizona_fll_cfg *ref_cfg = &(fll->ref_cfg); + struct arizona_fll_cfg *sync_cfg = &(fll->sync_cfg); bool fll_change; unsigned int fsync_freq; @@ -3881,21 +3881,21 @@ static int arizona_enable_fll(struct arizona_fll *fll) */ if (fll->ref_src >= 0 && fll->ref_freq && fll->ref_src != fll->sync_src) { - arizona_calc_fll(fll, &cfg, fll->ref_freq, false); + arizona_calc_fll(fll, ref_cfg, fll->ref_freq, false); - fll_change = arizona_apply_fll(arizona, fll->base, &cfg, fll->ref_src, + fll_change = arizona_apply_fll(arizona, fll->base, ref_cfg, fll->ref_src, false); if (fll->sync_src >= 0) { - arizona_calc_fll(fll, &cfg, fll->sync_freq, true); - fsync_freq = fll->sync_freq / (1 << cfg.refdiv); - fll_change |= arizona_apply_fll(arizona, fll->base + 0x10, &cfg, + arizona_calc_fll(fll, sync_cfg, fll->sync_freq, true); + fsync_freq = fll->sync_freq / (1 << sync_cfg->refdiv); + fll_change |= arizona_apply_fll(arizona, fll->base + 0x10, sync_cfg, fll->sync_src, true); use_sync = true; } } else if (fll->sync_src >= 0) { - arizona_calc_fll(fll, &cfg, fll->sync_freq, false); + arizona_calc_fll(fll, ref_cfg, fll->sync_freq, false); - fll_change = arizona_apply_fll(arizona, fll->base, &cfg, + fll_change = arizona_apply_fll(arizona, fll->base, ref_cfg, fll->sync_src, false); regmap_update_bits(arizona->regmap, fll->base + 0x11, diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index d63d3f99468..a4f872b497b 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -375,6 +375,18 @@ extern void clearwater_spin_sysclk(struct arizona *arizona); extern const struct snd_soc_dai_ops arizona_dai_ops; extern const struct snd_soc_dai_ops arizona_simple_dai_ops; +struct arizona_fll_cfg { + unsigned int fin; + unsigned int fvco; + int n; + int theta; + int lambda; + int refdiv; + int outdiv; + int fratio; + int gain; +}; + struct arizona_fll { struct arizona *arizona; int id; @@ -390,6 +402,8 @@ struct arizona_fll { unsigned int sync_freq; int ref_src; unsigned int ref_freq; + struct arizona_fll_cfg ref_cfg; + struct arizona_fll_cfg sync_cfg; }; extern int arizona_dvfs_up(struct snd_soc_codec *codec, unsigned int flags); From add4f0d501e2cefc37af31c0bd8399f0a555584e Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 10 Aug 2015 16:31:26 +0100 Subject: [PATCH 0895/1167] ASoC: arizona: fix gain settings of fll in free-run mode wrong register was getting accessed to set the gain of ref loop, this patch corrects the offset of the gain register from fll base Change-Id: I97886e91d73566e1ebeeb6ef4efd327de2ad9e6b Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 08a4ec32b38..5101988b565 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -3869,7 +3869,7 @@ static int arizona_enable_fll(struct arizona_fll *fll) if (already_enabled) { /* Facilitate smooth refclk across the transition */ - regmap_update_bits(fll->arizona->regmap, fll->base + 0x7, + regmap_update_bits(fll->arizona->regmap, fll->base + 0x9, ARIZONA_FLL1_GAIN_MASK, 0); regmap_update_bits(fll->arizona->regmap, fll->base + 1, ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN); From dc22080126fb68cd7894a592c9cfb3d26478697b Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 10 Aug 2015 16:48:03 +0100 Subject: [PATCH 0896/1167] ASoC: marley: fix setting of sync loop of fll this patch fixes the offsets of sync registers of fll for marley, which is 0xE as compared to 0x10 of other arizona codecs Change-Id: I5306b6bbf11fa7865d6adf55bf27bbf5053d7503 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 25 +++++++++++++++++-------- sound/soc/codecs/arizona.h | 1 + sound/soc/codecs/marley.c | 1 + 3 files changed, 19 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 5101988b565..67b635dabe6 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -61,6 +61,7 @@ #define ARIZONA_FLL_MAX_REFDIV 8 #define ARIZONA_FLL_MIN_OUTDIV 2 #define ARIZONA_FLL_MAX_OUTDIV 7 +#define ARIZONA_FLL_SYNC_OFFSET 0x10 #define ARIZONA_FMT_DSP_MODE_A 0 #define ARIZONA_FMT_DSP_MODE_B 1 @@ -3888,8 +3889,8 @@ static int arizona_enable_fll(struct arizona_fll *fll) if (fll->sync_src >= 0) { arizona_calc_fll(fll, sync_cfg, fll->sync_freq, true); fsync_freq = fll->sync_freq / (1 << sync_cfg->refdiv); - fll_change |= arizona_apply_fll(arizona, fll->base + 0x10, sync_cfg, - fll->sync_src, true); + fll_change |= arizona_apply_fll(arizona, fll->base + fll->sync_offset, + sync_cfg, fll->sync_src, true); use_sync = true; } } else if (fll->sync_src >= 0) { @@ -3898,7 +3899,8 @@ static int arizona_enable_fll(struct arizona_fll *fll) fll_change = arizona_apply_fll(arizona, fll->base, ref_cfg, fll->sync_src, false); - regmap_update_bits(arizona->regmap, fll->base + 0x11, + regmap_update_bits(arizona->regmap, fll->base + + fll->sync_offset + 0x1, ARIZONA_FLL1_SYNC_ENA, 0); } else { arizona_fll_err(fll, "No clocks provided\n"); @@ -3910,11 +3912,14 @@ static int arizona_enable_fll(struct arizona_fll *fll) * sync source. */ if (use_sync && fsync_freq > 128000) - regmap_update_bits(arizona->regmap, fll->base + 0x17, + regmap_update_bits(arizona->regmap, fll->base + + fll->sync_offset + 0x7, ARIZONA_FLL1_SYNC_BW, 0); else - regmap_update_bits(arizona->regmap, fll->base + 0x17, - ARIZONA_FLL1_SYNC_BW, ARIZONA_FLL1_SYNC_BW); + regmap_update_bits(arizona->regmap, fll->base + + fll->sync_offset + 0x7, + ARIZONA_FLL1_SYNC_BW, + ARIZONA_FLL1_SYNC_BW); if (!already_enabled) pm_runtime_get(arizona->dev); @@ -3922,7 +3927,8 @@ static int arizona_enable_fll(struct arizona_fll *fll) regmap_update_bits(arizona->regmap, fll->base + 1, ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA); if (use_sync) - regmap_update_bits(arizona->regmap, fll->base + 0x11, + regmap_update_bits(arizona->regmap, fll->base + + fll->sync_offset + 0x1, ARIZONA_FLL1_SYNC_ENA, ARIZONA_FLL1_SYNC_ENA); @@ -3947,7 +3953,8 @@ static void arizona_disable_fll(struct arizona_fll *fll) ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN); regmap_update_bits_check(arizona->regmap, fll->base + 1, ARIZONA_FLL1_ENA, 0, &change); - regmap_update_bits(arizona->regmap, fll->base + 0x11, + regmap_update_bits(arizona->regmap, fll->base + + fll->sync_offset + 0x1, ARIZONA_FLL1_SYNC_ENA, 0); regmap_update_bits(arizona->regmap, fll->base + 1, ARIZONA_FLL1_FREERUN, 0); @@ -4047,6 +4054,8 @@ int arizona_init_fll(struct arizona *arizona, int id, int base, int lock_irq, fll->min_outdiv = ARIZONA_FLL_MIN_OUTDIV; if (!fll->max_outdiv) fll->max_outdiv = ARIZONA_FLL_MAX_OUTDIV; + if (!fll->sync_offset) + fll->sync_offset = ARIZONA_FLL_SYNC_OFFSET; /* Configure default refclk to 32kHz if we have one */ regmap_read(arizona->regmap, ARIZONA_CLOCK_32K_1, &val); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index a4f872b497b..7e6a797af86 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -391,6 +391,7 @@ struct arizona_fll { struct arizona *arizona; int id; unsigned int base; + unsigned int sync_offset; unsigned int vco_mult; unsigned int fvco; diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index efe92e0ddda..58d48df77bf 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -2227,6 +2227,7 @@ static int marley_probe(struct platform_device *pdev) marley->fll[i].vco_mult = 3; marley->fll[i].min_outdiv = 3; marley->fll[i].max_outdiv = 3; + marley->fll[i].sync_offset = 0xE; } arizona_init_fll(arizona, 1, ARIZONA_FLL1_CONTROL_1 - 1, From 56d63e37e7c1a2e6b135a2cb1a5ff47230ec7a7f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 27 Aug 2015 11:36:12 +0100 Subject: [PATCH 0897/1167] ASoC: arizona: Simplify handling of ANC input DAPM configuration Change-Id: I95e2dd2204c3b83b870ff4a1bf07db8d9b4f33fd Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 102 ++++++++++++---------------------- sound/soc/codecs/arizona.h | 6 -- sound/soc/codecs/clearwater.c | 64 ++++++++++----------- sound/soc/codecs/florida.c | 52 +++++++++-------- 4 files changed, 98 insertions(+), 126 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 67b635dabe6..90acd3291ad 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1702,81 +1702,51 @@ const struct soc_enum clearwater_in_dmic_osr[] = { }; EXPORT_SYMBOL_GPL(clearwater_in_dmic_osr); -static const char * const arizona_anc_input_src_text[ARIZONA_ANC_INPUT_ENUM_SIZE] = { - "None", "IN1L", "IN1R", "IN1L + IN1R", "IN2L", "IN2R", "IN2L + IN2R", - "IN3L", "IN3R", "IN3L + IN3R", "IN4L", "IN4R", "IN4L + IN4R", "IN5L", - "IN5R", "IN5L + IN5R", "IN6L", "IN6R", "IN6L + IN6R", +static const char * const arizona_anc_input_src_text[] = { + "None", "IN1", "IN2", "IN3", "IN4", "IN5", "IN6", }; -static const unsigned int arizona_anc_input_src_val[ARIZONA_ANC_INPUT_ENUM_SIZE] = { - 0x0000, 0x0101, 0x0201, 0x0301, 0x0102, 0x0202, 0x0302, - 0x0103, 0x0203, 0x0303, 0x0104, 0x0204, 0x0304, 0x0105, - 0x0205, 0x0305, 0x0106, 0x0206, 0x0306, +static const char * const arizona_anc_channel_src_text[] = { + "None", "Left", "Right", "Combine", }; -int arizona_put_anc_input(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol); - struct snd_soc_dapm_widget *widget = wlist->widgets[0]; - struct snd_soc_codec *codec = widget->codec; - struct soc_enum *e = - (struct soc_enum *)kcontrol->private_value; - int sel = ucontrol->value.enumerated.item[0]; - unsigned int val, mask, shift; - - if (sel >= e->max) - return -EINVAL; - - switch (e->reg) { - case ARIZONA_FCL_ADC_REFORMATTER_CONTROL: - mask = ARIZONA_IN_RXANCL_SEL_MASK; - shift = ARIZONA_IN_RXANCL_SEL_SHIFT; - break; - case ARIZONA_FCR_ADC_REFORMATTER_CONTROL: - case CLEARWATER_FCR_ADC_REFORMATTER_CONTROL: - mask = ARIZONA_IN_RXANCR_SEL_MASK; - shift = ARIZONA_IN_RXANCR_SEL_SHIFT; - break; - default: - return -EINVAL; - } - - val = (e->values[sel] & 0xFF00) >> 8; - snd_soc_write(codec, e->reg, val << e->shift_l); - - val = (e->values[sel] & 0xFF); - snd_soc_update_bits(codec, ARIZONA_ANC_SRC, mask, val << shift); - - return snd_soc_dapm_put_enum_virt(kcontrol, ucontrol); -} -EXPORT_SYMBOL_GPL(arizona_put_anc_input); - const struct soc_enum arizona_anc_input_src[] = { - SOC_VALUE_ENUM_SINGLE(ARIZONA_FCL_ADC_REFORMATTER_CONTROL, - ARIZONA_FCL_MIC_MODE_SEL_SHIFT, 0, - WM8280_ANC_INPUT_ENUM_SIZE, - arizona_anc_input_src_text, - arizona_anc_input_src_val), - SOC_VALUE_ENUM_SINGLE(ARIZONA_FCR_ADC_REFORMATTER_CONTROL, - ARIZONA_FCR_MIC_MODE_SEL_SHIFT, 0, - WM8280_ANC_INPUT_ENUM_SIZE, - arizona_anc_input_src_text, - arizona_anc_input_src_val), + SOC_ENUM_SINGLE(ARIZONA_ANC_SRC, + ARIZONA_IN_RXANCL_SEL_SHIFT, + ARRAY_SIZE(arizona_anc_input_src_text), + arizona_anc_input_src_text), + SOC_ENUM_SINGLE(ARIZONA_FCL_ADC_REFORMATTER_CONTROL, + ARIZONA_FCL_MIC_MODE_SEL, + ARRAY_SIZE(arizona_anc_channel_src_text), + arizona_anc_channel_src_text), + SOC_ENUM_SINGLE(ARIZONA_ANC_SRC, + ARIZONA_IN_RXANCR_SEL_SHIFT, + ARRAY_SIZE(arizona_anc_input_src_text), + arizona_anc_input_src_text), + SOC_ENUM_SINGLE(ARIZONA_FCR_ADC_REFORMATTER_CONTROL, + ARIZONA_FCR_MIC_MODE_SEL, + ARRAY_SIZE(arizona_anc_channel_src_text), + arizona_anc_channel_src_text), }; EXPORT_SYMBOL_GPL(arizona_anc_input_src); const struct soc_enum clearwater_anc_input_src[] = { - SOC_VALUE_ENUM_SINGLE(ARIZONA_FCL_ADC_REFORMATTER_CONTROL, - ARIZONA_FCL_MIC_MODE_SEL_SHIFT, 0, - CLEARWATER_ANC_INPUT_ENUM_SIZE, - arizona_anc_input_src_text, - arizona_anc_input_src_val), - SOC_VALUE_ENUM_SINGLE(CLEARWATER_FCR_ADC_REFORMATTER_CONTROL, - ARIZONA_FCR_MIC_MODE_SEL_SHIFT, 0, - CLEARWATER_ANC_INPUT_ENUM_SIZE, - arizona_anc_input_src_text, - arizona_anc_input_src_val), + SOC_ENUM_SINGLE(ARIZONA_ANC_SRC, + ARIZONA_IN_RXANCL_SEL_SHIFT, + ARRAY_SIZE(arizona_anc_input_src_text), + arizona_anc_input_src_text), + SOC_ENUM_SINGLE(ARIZONA_FCL_ADC_REFORMATTER_CONTROL, + ARIZONA_FCL_MIC_MODE_SEL, + ARRAY_SIZE(arizona_anc_channel_src_text), + arizona_anc_channel_src_text), + SOC_ENUM_SINGLE(ARIZONA_ANC_SRC, + ARIZONA_IN_RXANCR_SEL_SHIFT, + ARRAY_SIZE(arizona_anc_input_src_text), + arizona_anc_input_src_text), + SOC_ENUM_SINGLE(CLEARWATER_FCR_ADC_REFORMATTER_CONTROL, + ARIZONA_FCR_MIC_MODE_SEL, + ARRAY_SIZE(arizona_anc_channel_src_text), + arizona_anc_channel_src_text), }; EXPORT_SYMBOL_GPL(clearwater_anc_input_src); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 7e6a797af86..0f153bd91ac 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -279,9 +279,6 @@ extern unsigned int arizona_v2_mixer_values[ARIZONA_V2_NUM_MIXER_INPUTS]; #define ARIZONA_SYNC_RATE_ENUM_SIZE 3 #define ARIZONA_ASYNC_RATE_ENUM_SIZE 2 #define ARIZONA_SAMPLE_RATE_ENUM_SIZE 14 -#define ARIZONA_ANC_INPUT_ENUM_SIZE 19 -#define WM8280_ANC_INPUT_ENUM_SIZE 13 -#define CLEARWATER_ANC_INPUT_ENUM_SIZE 19 extern const char * const arizona_rate_text[ARIZONA_RATE_ENUM_SIZE]; extern const unsigned int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE]; @@ -325,9 +322,6 @@ extern const struct soc_enum arizona_ip_mode[]; extern int arizona_ip_mode_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); -extern int arizona_put_anc_input(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); - extern int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index a2c569514ab..d188967c5e0 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -664,31 +664,23 @@ static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); SOC_SINGLE(name " NG SPKDAT2R Switch", base, 11, 1, 0) #define CLEARWATER_RXANC_INPUT_ROUTES(widget, name) \ - { widget, NULL, name " Input" }, \ - { name " Input", "IN1L", "IN1L PGA" }, \ - { name " Input", "IN1R", "IN1R PGA" }, \ - { name " Input", "IN1L + IN1R", "IN1L PGA" }, \ - { name " Input", "IN1L + IN1R", "IN1R PGA" }, \ - { name " Input", "IN2L", "IN2L PGA" }, \ - { name " Input", "IN2R", "IN2R PGA" }, \ - { name " Input", "IN2L + IN2R", "IN2L PGA" }, \ - { name " Input", "IN2L + IN2R", "IN2R PGA" }, \ - { name " Input", "IN3L", "IN3L PGA" }, \ - { name " Input", "IN3R", "IN3R PGA" }, \ - { name " Input", "IN3L + IN3R", "IN3L PGA" }, \ - { name " Input", "IN3L + IN3R", "IN3R PGA" }, \ - { name " Input", "IN4L", "IN4L PGA" }, \ - { name " Input", "IN4R", "IN4R PGA" }, \ - { name " Input", "IN4L + IN4R", "IN4L PGA" }, \ - { name " Input", "IN4L + IN4R", "IN4R PGA" }, \ - { name " Input", "IN5L", "IN5L PGA" }, \ - { name " Input", "IN5R", "IN5R PGA" }, \ - { name " Input", "IN5L + IN5R", "IN5L PGA" }, \ - { name " Input", "IN5L + IN5R", "IN5R PGA" }, \ - { name " Input", "IN6L", "IN6L PGA" }, \ - { name " Input", "IN6R", "IN6R PGA" }, \ - { name " Input", "IN6L + IN6R", "IN6L PGA" }, \ - { name " Input", "IN6L + IN6R", "IN6R PGA" } + { widget, NULL, name " Channel" }, \ + { name " Channel", "Left", name " Left Input" }, \ + { name " Channel", "Combine", name " Left Input" }, \ + { name " Channel", "Right", name " Right Input" }, \ + { name " Channel", "Combine", name " Right Input" }, \ + { name " Left Input", "IN1", "IN1L PGA" }, \ + { name " Right Input", "IN1", "IN1R PGA" }, \ + { name " Left Input", "IN2", "IN2L PGA" }, \ + { name " Right Input", "IN2", "IN2R PGA" }, \ + { name " Left Input", "IN3", "IN3L PGA" }, \ + { name " Right Input", "IN3", "IN3R PGA" }, \ + { name " Left Input", "IN4", "IN4L PGA" }, \ + { name " Right Input", "IN4", "IN4R PGA" }, \ + { name " Left Input", "IN5", "IN5L PGA" }, \ + { name " Right Input", "IN5", "IN5R PGA" }, \ + { name " Left Input", "IN6", "IN6L PGA" }, \ + { name " Right Input", "IN6", "IN6R PGA" } #define CLEARWATER_RXANC_OUTPUT_ROUTES(widget, name) \ { widget, NULL, name " ANC Source" }, \ @@ -1331,10 +1323,10 @@ static const struct snd_kcontrol_new clearwater_aec_loopback_mux[] = { }; static const struct snd_kcontrol_new clearwater_anc_input_mux[] = { - SOC_DAPM_ENUM_EXT("RXANCL Input", clearwater_anc_input_src[0], - snd_soc_dapm_get_enum_virt, arizona_put_anc_input), - SOC_DAPM_ENUM_EXT("RXANCR Input", clearwater_anc_input_src[1], - snd_soc_dapm_get_enum_virt, arizona_put_anc_input), + SOC_DAPM_ENUM("RXANCL Input", clearwater_anc_input_src[0]), + SOC_DAPM_ENUM("RXANCL Channel", clearwater_anc_input_src[1]), + SOC_DAPM_ENUM("RXANCR Input", clearwater_anc_input_src[2]), + SOC_DAPM_ENUM("RXANCR Channel", clearwater_anc_input_src[3]), }; static const struct snd_kcontrol_new clearwater_output_anc_src[] = { @@ -1588,8 +1580,18 @@ SND_SOC_DAPM_VALUE_MUX("AEC2 Loopback", ARIZONA_DAC_AEC_CONTROL_2, &clearwater_aec_loopback_mux[1]), -SND_SOC_DAPM_MUX("RXANCL Input", SND_SOC_NOPM, 0, 0, &clearwater_anc_input_mux[0]), -SND_SOC_DAPM_MUX("RXANCR Input", SND_SOC_NOPM, 0, 0, &clearwater_anc_input_mux[1]), +SND_SOC_DAPM_MUX("RXANCL Left Input", SND_SOC_NOPM, 0, 0, + &clearwater_anc_input_mux[0]), +SND_SOC_DAPM_MUX("RXANCL Right Input", SND_SOC_NOPM, 0, 0, + &clearwater_anc_input_mux[0]), +SND_SOC_DAPM_MUX("RXANCL Channel", SND_SOC_NOPM, 0, 0, + &clearwater_anc_input_mux[1]), +SND_SOC_DAPM_MUX("RXANCR Left Input", SND_SOC_NOPM, 0, 0, + &clearwater_anc_input_mux[2]), +SND_SOC_DAPM_MUX("RXANCR Right Input", SND_SOC_NOPM, 0, 0, + &clearwater_anc_input_mux[2]), +SND_SOC_DAPM_MUX("RXANCR Channel", SND_SOC_NOPM, 0, 0, + &clearwater_anc_input_mux[3]), SND_SOC_DAPM_PGA_E("RXANCL", SND_SOC_NOPM, ARIZONA_CLK_L_ENA_SET_SHIFT, 0, NULL, 0, arizona_anc_ev, diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 3420a24c945..efb133ff909 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -515,23 +515,19 @@ static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); SOC_SINGLE(name " NG SPKDAT2R Switch", base, 11, 1, 0) #define FLORIDA_RXANC_INPUT_ROUTES(widget, name) \ - { widget, NULL, name " Input" }, \ - { name " Input", "IN1L", "IN1L PGA" }, \ - { name " Input", "IN1R", "IN1R PGA" }, \ - { name " Input", "IN1L + IN1R", "IN1L PGA" }, \ - { name " Input", "IN1L + IN1R", "IN1R PGA" }, \ - { name " Input", "IN2L", "IN2L PGA" }, \ - { name " Input", "IN2R", "IN2R PGA" }, \ - { name " Input", "IN2L + IN2R", "IN2L PGA" }, \ - { name " Input", "IN2L + IN2R", "IN2R PGA" }, \ - { name " Input", "IN3L", "IN3L PGA" }, \ - { name " Input", "IN3R", "IN3R PGA" }, \ - { name " Input", "IN3L + IN3R", "IN3L PGA" }, \ - { name " Input", "IN3L + IN3R", "IN3R PGA" }, \ - { name " Input", "IN4L", "IN4L PGA" }, \ - { name " Input", "IN4R", "IN4R PGA" }, \ - { name " Input", "IN4L + IN4R", "IN4L PGA" }, \ - { name " Input", "IN4L + IN4R", "IN4R PGA" } + { widget, NULL, name " Channel" }, \ + { name " Channel", "Left", name " Left Input" }, \ + { name " Channel", "Combine", name " Left Input" }, \ + { name " Channel", "Right", name " Right Input" }, \ + { name " Channel", "Combine", name " Right Input" }, \ + { name " Left Input", "IN1", "IN1L PGA" }, \ + { name " Right Input", "IN1", "IN1R PGA" }, \ + { name " Left Input", "IN2", "IN2L PGA" }, \ + { name " Right Input", "IN2", "IN2R PGA" }, \ + { name " Left Input", "IN3", "IN3L PGA" }, \ + { name " Right Input", "IN3", "IN3R PGA" }, \ + { name " Left Input", "IN4", "IN4L PGA" }, \ + { name " Right Input", "IN4", "IN4R PGA" } #define FLORIDA_RXANC_OUTPUT_ROUTES(widget, name) \ { widget, NULL, name " ANC Source" }, \ @@ -1020,10 +1016,10 @@ static const struct snd_kcontrol_new florida_aec_loopback_mux = SOC_DAPM_VALUE_ENUM("AEC Loopback", florida_aec_loopback); static const struct snd_kcontrol_new florida_anc_input_mux[] = { - SOC_DAPM_ENUM_EXT("RXANCL Input", arizona_anc_input_src[0], - snd_soc_dapm_get_enum_virt, arizona_put_anc_input), - SOC_DAPM_ENUM_EXT("RXANCR Input", arizona_anc_input_src[1], - snd_soc_dapm_get_enum_virt, arizona_put_anc_input), + SOC_DAPM_ENUM("RXANCL Input", arizona_anc_input_src[0]), + SOC_DAPM_ENUM("RXANCL Channel", arizona_anc_input_src[1]), + SOC_DAPM_ENUM("RXANCR Input", arizona_anc_input_src[2]), + SOC_DAPM_ENUM("RXANCR Channel", arizona_anc_input_src[3]), }; static const struct snd_kcontrol_new florida_output_anc_src[] = { @@ -1227,8 +1223,18 @@ SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, &florida_aec_loopback_mux), -SND_SOC_DAPM_MUX("RXANCL Input", SND_SOC_NOPM, 0, 0, &florida_anc_input_mux[0]), -SND_SOC_DAPM_MUX("RXANCR Input", SND_SOC_NOPM, 0, 0, &florida_anc_input_mux[1]), +SND_SOC_DAPM_MUX("RXANCL Left Input", SND_SOC_NOPM, 0, 0, + &florida_anc_input_mux[0]), +SND_SOC_DAPM_MUX("RXANCL Right Input", SND_SOC_NOPM, 0, 0, + &florida_anc_input_mux[0]), +SND_SOC_DAPM_MUX("RXANCL Channel", SND_SOC_NOPM, 0, 0, + &florida_anc_input_mux[1]), +SND_SOC_DAPM_MUX("RXANCR Left Input", SND_SOC_NOPM, 0, 0, + &florida_anc_input_mux[2]), +SND_SOC_DAPM_MUX("RXANCR Right Input", SND_SOC_NOPM, 0, 0, + &florida_anc_input_mux[2]), +SND_SOC_DAPM_MUX("RXANCR Channel", SND_SOC_NOPM, 0, 0, + &florida_anc_input_mux[3]), SND_SOC_DAPM_PGA_E("RXANCL", SND_SOC_NOPM, ARIZONA_CLK_L_ENA_SET_SHIFT, 0, NULL, 0, arizona_anc_ev, From 2ca3f6d3124648e1dfdb8d7187371cc19c2fd945 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 27 Aug 2015 12:40:06 +0100 Subject: [PATCH 0898/1167] mfd: arizona: Add noise gate clock bits for ANC Change-Id: Iba7c86a4a107608d8c072e59a73794c29b2f0332 Signed-off-by: Charles Keepax --- include/linux/mfd/arizona/registers.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index afeaca1e488..94e5ff8432f 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -10110,6 +10110,14 @@ /* * R3840 (0xF00) - Clock Control */ +#define ARIZONA_EXT_NG_SEL_CLR 0x0080 /* EXT_NG_SEL_CLR */ +#define ARIZONA_EXT_NG_SEL_CLR_MASK 0x0080 /* EXT_NG_SEL_CLR */ +#define ARIZONA_EXT_NG_SEL_CLR_SHIFT 7 /* EXT_NG_SEL_CLR */ +#define ARIZONA_EXT_NG_SEL_CLR_WIDTH 1 /* EXT_NG_SEL_CLR */ +#define ARIZONA_EXT_NG_SEL_SET 0x0040 /* EXT_NG_SEL_SET */ +#define ARIZONA_EXT_NG_SEL_SET_MASK 0x0040 /* EXT_NG_SEL_SET */ +#define ARIZONA_EXT_NG_SEL_SET_SHIFT 6 /* EXT_NG_SEL_SET */ +#define ARIZONA_EXT_NG_SEL_SET_WIDTH 1 /* EXT_NG_SEL_SET */ #define ARIZONA_CLK_R_ENA_CLR 0x0020 /* CLK_R_ENA_CLR */ #define ARIZONA_CLK_R_ENA_CLR_MASK 0x0020 /* CLK_R_ENA_CLR */ #define ARIZONA_CLK_R_ENA_CLR_SHIFT 5 /* CLK_R_ENA_CLR */ @@ -10118,6 +10126,14 @@ #define ARIZONA_CLK_R_ENA_SET_MASK 0x0010 /* CLK_R_ENA_SET */ #define ARIZONA_CLK_R_ENA_SET_SHIFT 4 /* CLK_R_ENA_SET */ #define ARIZONA_CLK_R_ENA_SET_WIDTH 1 /* CLK_R_ENA_SET */ +#define ARIZONA_CLK_NG_ENA_CLR 0x0008 /* CLK_NG_ENA_CLR */ +#define ARIZONA_CLK_NG_ENA_CLR_MASK 0x0008 /* CLK_NG_ENA_CLR */ +#define ARIZONA_CLK_NG_ENA_CLR_SHIFT 3 /* CLK_NG_ENA_CLR */ +#define ARIZONA_CLK_NG_ENA_CLR_WIDTH 1 /* CLK_NG_ENA_CLR */ +#define ARIZONA_CLK_NG_ENA_SET 0x0004 /* CLK_NG_ENA_SET */ +#define ARIZONA_CLK_NG_ENA_SET_MASK 0x0004 /* CLK_NG_ENA_SET */ +#define ARIZONA_CLK_NG_ENA_SET_SHIFT 2 /* CLK_NG_ENA_SET */ +#define ARIZONA_CLK_NG_ENA_SET_WIDTH 1 /* CLK_NG_ENA_SET */ #define ARIZONA_CLK_L_ENA_CLR 0x0002 /* CLK_L_ENA_CLR */ #define ARIZONA_CLK_L_ENA_CLR_MASK 0x0002 /* CLK_L_ENA_CLR */ #define ARIZONA_CLK_L_ENA_CLR_SHIFT 1 /* CLK_L_ENA_CLR */ From 23eb4b5c29d8b9bae1c1c26f3e4250908d40344d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 27 Aug 2015 12:48:42 +0100 Subject: [PATCH 0899/1167] ASoC: arizona: Add better support for ANC NG Change-Id: Ib52ce9d41839cc5add9a52189efd0141fa8b42cc Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 11 +++++++++++ sound/soc/codecs/arizona.h | 1 + sound/soc/codecs/clearwater.c | 31 +++++++++++++++++++++++++++---- sound/soc/codecs/florida.c | 29 +++++++++++++++++++++++++---- 4 files changed, 64 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 90acd3291ad..a1c1747a55d 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1750,6 +1750,17 @@ const struct soc_enum clearwater_anc_input_src[] = { }; EXPORT_SYMBOL_GPL(clearwater_anc_input_src); +static const char * const arizona_anc_ng_texts[] = { + "None", + "Internal", + "External", +}; + +const struct soc_enum arizona_anc_ng_enum = +SOC_ENUM_SINGLE(SND_SOC_NOPM, 0, ARRAY_SIZE(arizona_anc_ng_texts), + arizona_anc_ng_texts); +EXPORT_SYMBOL_GPL(arizona_anc_ng_enum); + static const char * const arizona_output_anc_src_text[] = { "None", "RXANCL", "RXANCR", }; diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 0f153bd91ac..e1a59c680bf 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -315,6 +315,7 @@ extern const struct soc_enum clearwater_in_dmic_osr[]; extern const struct soc_enum arizona_anc_input_src[]; extern const struct soc_enum clearwater_anc_input_src[]; +extern const struct soc_enum arizona_anc_ng_enum; extern const struct soc_enum arizona_output_anc_src[]; extern const struct soc_enum clearwater_output_anc_src_defs[]; extern const struct soc_enum arizona_ip_mode[]; diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index d188967c5e0..630b6fbb412 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -664,7 +664,14 @@ static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); SOC_SINGLE(name " NG SPKDAT2R Switch", base, 11, 1, 0) #define CLEARWATER_RXANC_INPUT_ROUTES(widget, name) \ - { widget, NULL, name " Channel" }, \ + { widget, NULL, name " NG Mux" }, \ + { name " NG Internal", NULL, "RXANC NG Clock" }, \ + { name " NG Internal", NULL, name " Channel" }, \ + { name " NG External", NULL, "RXANC NG External Clock" }, \ + { name " NG External", NULL, name " Channel" }, \ + { name " NG Mux", "None", name " Channel" }, \ + { name " NG Mux", "Internal", name " NG Internal" }, \ + { name " NG Mux", "External", name " NG External" }, \ { name " Channel", "Left", name " Left Input" }, \ { name " Channel", "Combine", name " Left Input" }, \ { name " Channel", "Right", name " Right Input" }, \ @@ -825,9 +832,6 @@ SOC_ENUM_EXT("CP Mode", clearwater_cp_mode[0], SOC_ENUM("Input Ramp Up", arizona_in_vi_ramp), SOC_ENUM("Input Ramp Down", arizona_in_vd_ramp), -SND_SOC_BYTES_MASK("RXANC Config", ARIZONA_CLOCK_CONTROL, 1, - ARIZONA_CLK_R_ENA_CLR | ARIZONA_CLK_R_ENA_SET | - ARIZONA_CLK_L_ENA_CLR | ARIZONA_CLK_L_ENA_SET), SND_SOC_BYTES("RXANC Coefficients", ARIZONA_ANC_COEFF_START, ARIZONA_ANC_COEFF_END - ARIZONA_ANC_COEFF_START + 1), SND_SOC_BYTES("RXANCL Config", ARIZONA_FCL_FILTER_CONTROL, 1), @@ -1329,6 +1333,9 @@ static const struct snd_kcontrol_new clearwater_anc_input_mux[] = { SOC_DAPM_ENUM("RXANCR Channel", clearwater_anc_input_src[3]), }; +static const struct snd_kcontrol_new clearwater_anc_ng_mux = + SOC_DAPM_ENUM_VIRT("RXANC NG Source", arizona_anc_ng_enum); + static const struct snd_kcontrol_new clearwater_output_anc_src[] = { SOC_DAPM_ENUM("HPOUT1L ANC Source", arizona_output_anc_src[0]), SOC_DAPM_ENUM("HPOUT1R ANC Source", arizona_output_anc_src[1]), @@ -1580,18 +1587,34 @@ SND_SOC_DAPM_VALUE_MUX("AEC2 Loopback", ARIZONA_DAC_AEC_CONTROL_2, &clearwater_aec_loopback_mux[1]), +SND_SOC_DAPM_SUPPLY("RXANC NG External Clock", SND_SOC_NOPM, + ARIZONA_EXT_NG_SEL_SET_SHIFT, 0, arizona_anc_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), +SND_SOC_DAPM_PGA("RXANCL NG External", SND_SOC_NOPM, 0, 0, NULL, 0), +SND_SOC_DAPM_PGA("RXANCR NG External", SND_SOC_NOPM, 0, 0, NULL, 0), + +SND_SOC_DAPM_SUPPLY("RXANC NG Clock", SND_SOC_NOPM, + ARIZONA_CLK_NG_ENA_SET_SHIFT, 0, arizona_anc_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), +SND_SOC_DAPM_PGA("RXANCL NG Internal", SND_SOC_NOPM, 0, 0, NULL, 0), +SND_SOC_DAPM_PGA("RXANCR NG Internal", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MUX("RXANCL Left Input", SND_SOC_NOPM, 0, 0, &clearwater_anc_input_mux[0]), SND_SOC_DAPM_MUX("RXANCL Right Input", SND_SOC_NOPM, 0, 0, &clearwater_anc_input_mux[0]), SND_SOC_DAPM_MUX("RXANCL Channel", SND_SOC_NOPM, 0, 0, &clearwater_anc_input_mux[1]), +SND_SOC_DAPM_VIRT_MUX("RXANCL NG Mux", SND_SOC_NOPM, 0, 0, + &clearwater_anc_ng_mux), SND_SOC_DAPM_MUX("RXANCR Left Input", SND_SOC_NOPM, 0, 0, &clearwater_anc_input_mux[2]), SND_SOC_DAPM_MUX("RXANCR Right Input", SND_SOC_NOPM, 0, 0, &clearwater_anc_input_mux[2]), SND_SOC_DAPM_MUX("RXANCR Channel", SND_SOC_NOPM, 0, 0, &clearwater_anc_input_mux[3]), +SND_SOC_DAPM_VIRT_MUX("RXANCR NG Mux", SND_SOC_NOPM, 0, 0, + &clearwater_anc_ng_mux), SND_SOC_DAPM_PGA_E("RXANCL", SND_SOC_NOPM, ARIZONA_CLK_L_ENA_SET_SHIFT, 0, NULL, 0, arizona_anc_ev, diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index efb133ff909..5200afb606e 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -515,7 +515,14 @@ static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); SOC_SINGLE(name " NG SPKDAT2R Switch", base, 11, 1, 0) #define FLORIDA_RXANC_INPUT_ROUTES(widget, name) \ - { widget, NULL, name " Channel" }, \ + { widget, NULL, name " NG Mux" }, \ + { name " NG Internal", NULL, "RXANC NG Clock" }, \ + { name " NG Internal", NULL, name " Channel" }, \ + { name " NG External", NULL, "RXANC NG External Clock" }, \ + { name " NG External", NULL, name " Channel" }, \ + { name " NG Mux", "None", name " Channel" }, \ + { name " NG Mux", "Internal", name " NG Internal" }, \ + { name " NG Mux", "External", name " NG External" }, \ { name " Channel", "Left", name " Left Input" }, \ { name " Channel", "Combine", name " Left Input" }, \ { name " Channel", "Right", name " Right Input" }, \ @@ -592,9 +599,6 @@ SOC_SINGLE_TLV("IN4R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_4R, SOC_ENUM("Input Ramp Up", arizona_in_vi_ramp), SOC_ENUM("Input Ramp Down", arizona_in_vd_ramp), -SND_SOC_BYTES_MASK("RXANC Config", ARIZONA_CLOCK_CONTROL, 1, - ARIZONA_CLK_R_ENA_CLR | ARIZONA_CLK_R_ENA_SET | - ARIZONA_CLK_L_ENA_CLR | ARIZONA_CLK_L_ENA_SET), SND_SOC_BYTES("RXANC Coefficients", ARIZONA_ANC_COEFF_START, ARIZONA_ANC_COEFF_END - ARIZONA_ANC_COEFF_START + 1), SND_SOC_BYTES("RXANCL Config", ARIZONA_FCL_FILTER_CONTROL, 1), @@ -1022,6 +1026,9 @@ static const struct snd_kcontrol_new florida_anc_input_mux[] = { SOC_DAPM_ENUM("RXANCR Channel", arizona_anc_input_src[3]), }; +static const struct snd_kcontrol_new florida_anc_ng_mux = + SOC_DAPM_ENUM_VIRT("RXANC NG Source", arizona_anc_ng_enum); + static const struct snd_kcontrol_new florida_output_anc_src[] = { SOC_DAPM_ENUM("HPOUT1L ANC Source", arizona_output_anc_src[0]), SOC_DAPM_ENUM("HPOUT1R ANC Source", arizona_output_anc_src[1]), @@ -1223,18 +1230,32 @@ SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, &florida_aec_loopback_mux), +SND_SOC_DAPM_SUPPLY("RXANC NG External Clock", SND_SOC_NOPM, + ARIZONA_EXT_NG_SEL_SET_SHIFT, 0, arizona_anc_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), +SND_SOC_DAPM_PGA("RXANCL NG External", SND_SOC_NOPM, 0, 0, NULL, 0), +SND_SOC_DAPM_PGA("RXANCR NG External", SND_SOC_NOPM, 0, 0, NULL, 0), + +SND_SOC_DAPM_SUPPLY("RXANC NG Clock", SND_SOC_NOPM, + ARIZONA_CLK_NG_ENA_SET_SHIFT, 0, arizona_anc_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), +SND_SOC_DAPM_PGA("RXANCL NG Internal", SND_SOC_NOPM, 0, 0, NULL, 0), +SND_SOC_DAPM_PGA("RXANCR NG Internal", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MUX("RXANCL Left Input", SND_SOC_NOPM, 0, 0, &florida_anc_input_mux[0]), SND_SOC_DAPM_MUX("RXANCL Right Input", SND_SOC_NOPM, 0, 0, &florida_anc_input_mux[0]), SND_SOC_DAPM_MUX("RXANCL Channel", SND_SOC_NOPM, 0, 0, &florida_anc_input_mux[1]), +SND_SOC_DAPM_VIRT_MUX("RXANCL NG Mux", SND_SOC_NOPM, 0, 0, &florida_anc_ng_mux), SND_SOC_DAPM_MUX("RXANCR Left Input", SND_SOC_NOPM, 0, 0, &florida_anc_input_mux[2]), SND_SOC_DAPM_MUX("RXANCR Right Input", SND_SOC_NOPM, 0, 0, &florida_anc_input_mux[2]), SND_SOC_DAPM_MUX("RXANCR Channel", SND_SOC_NOPM, 0, 0, &florida_anc_input_mux[3]), +SND_SOC_DAPM_VIRT_MUX("RXANCR NG Mux", SND_SOC_NOPM, 0, 0, &florida_anc_ng_mux), SND_SOC_DAPM_PGA_E("RXANCL", SND_SOC_NOPM, ARIZONA_CLK_L_ENA_SET_SHIFT, 0, NULL, 0, arizona_anc_ev, From 4d5136bdc4f00a05a20a37716b4143e2d78b81f5 Mon Sep 17 00:00:00 2001 From: Mayuresh Kulkarni Date: Fri, 10 Jul 2015 15:15:20 +0100 Subject: [PATCH 0900/1167] ASoC: wm_adsp: only reset ADSP2_MEM_ENA bit for codecs before clearwater Change-Id: I37c6adf125bc30e6143a487a808eddaca2ac6aed Signed-off-by: Mayuresh Kulkarni --- sound/soc/codecs/wm_adsp.c | 26 +++++++++++++++++--------- 1 file changed, 17 insertions(+), 9 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index f7d14ddb9c8..f64dca97328 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2684,15 +2684,23 @@ int wm_adsp2_init(struct wm_adsp *dsp, struct mutex *fw_lock) int ret, i; const char **ctl_names; - /* - * Disable the DSP memory by default when in reset for a small - * power saving. - */ - ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, - ADSP2_MEM_ENA, 0); - if (ret != 0) { - adsp_err(dsp, "Failed to clear memory retention: %d\n", ret); - return ret; + switch (dsp->rev) { + case 0: + /* + * Disable the DSP memory by default when in reset for a small + * power saving + */ + ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, + ADSP2_MEM_ENA, 0); + if (ret != 0) { + adsp_err(dsp, "Failed to clear memory retention: %d\n", + ret); + return ret; + } + break; + + default: + break; } INIT_LIST_HEAD(&dsp->alg_regions); From 387c24b0c84ec58e9a9633e54c808ebc9017f30b Mon Sep 17 00:00:00 2001 From: Mayuresh Kulkarni Date: Tue, 2 Jun 2015 10:21:32 +0100 Subject: [PATCH 0901/1167] mfd: arizona: call regcache_cache_only() also for 32-bit regmap if a codec supports 32-bit regmap, call regcache_cache_only() for it along with 16-bit regmap Change-Id: I446683e86ec6ee19d1aff28e79cca791399f57d2 Signed-off-by: Mayuresh Kulkarni --- drivers/mfd/arizona-core.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index f0d5ca0b2b6..185936dc629 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -550,6 +550,8 @@ static int arizona_runtime_resume(struct device *dev) } regcache_cache_only(arizona->regmap, false); + if (arizona->regmap_32bit) + regcache_cache_only(arizona->regmap_32bit, false); switch (arizona->type) { case WM5102: @@ -684,6 +686,8 @@ static int arizona_runtime_resume(struct device *dev) err: regcache_cache_only(arizona->regmap, true); + if (arizona->regmap_32bit) + regcache_cache_only(arizona->regmap_32bit, true); regulator_disable(arizona->dcvdd); return ret; } @@ -744,8 +748,10 @@ static int arizona_runtime_suspend(struct device *dev) regcache_cache_only(arizona->regmap, true); regcache_mark_dirty(arizona->regmap); - if (arizona->regmap_32bit) + if (arizona->regmap_32bit) { + regcache_cache_only(arizona->regmap_32bit, true); regcache_mark_dirty(arizona->regmap_32bit); + } regulator_disable(arizona->dcvdd); return 0; @@ -1445,6 +1451,8 @@ int arizona_dev_init(struct arizona *arizona) arizona_of_get_core_pdata(arizona); regcache_cache_only(arizona->regmap, true); + if (arizona->regmap_32bit) + regcache_cache_only(arizona->regmap_32bit, true); switch (arizona->type) { case WM5102: @@ -1552,6 +1560,8 @@ int arizona_dev_init(struct arizona *arizona) arizona_disable_reset(arizona); regcache_cache_only(arizona->regmap, false); + if (arizona->regmap_32bit) + regcache_cache_only(arizona->regmap_32bit, false); /* Verify that this is a chip we know about */ ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); From 91a6f61308b6fc9f0eddeb91cc32216ca747473d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 11 Sep 2015 13:51:08 +0100 Subject: [PATCH 0902/1167] mfd: arizona: Fix typo in arizona_irq_map The type of the data for the main Arizona IRQ chip should be struct arizona not struct regmap_irq_chip_data. The bug is harmless but should probably be corrected anyway. Change-Id: Id30f15b4da000f7338996ef9d2cb7d61994ef357 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-irq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index 54af8befd00..d3734ee0e4b 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -179,7 +179,7 @@ static struct irq_chip arizona_irq_chip = { static int arizona_irq_map(struct irq_domain *h, unsigned int virq, irq_hw_number_t hw) { - struct regmap_irq_chip_data *data = h->host_data; + struct arizona *data = h->host_data; irq_set_chip_data(virq, data); irq_set_chip_and_handler(virq, &arizona_irq_chip, handle_simple_irq); From 091c0f8a214b0893cab4c65522157e1f6979492b Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Wed, 9 Sep 2015 11:45:39 +0100 Subject: [PATCH 0903/1167] ASoC: marley: fix noise gate threshold levels Noise gate threshold values have been shifted by -18dB. Change-Id: I7a7f9ffef6beb924f752cb6a3c3b39c9dfb7e81c Signed-off-by: Piotr Stankiewicz --- sound/soc/codecs/marley.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index 58d48df77bf..1f4abdeb757 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -563,7 +563,7 @@ static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); static DECLARE_TLV_DB_SCALE(noise_tlv, -13200, 600, 0); -static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); +static DECLARE_TLV_DB_SCALE(ng_tlv, -12000, 600, 0); #define MARLEY_NG_SRC(name, base) \ SOC_SINGLE(name " NG OUT1L Switch", base, 0, 1, 0), \ From 29af2de3779e3db32274d38512461d309448db35 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 17 Jun 2015 16:52:35 +0100 Subject: [PATCH 0904/1167] ASoC: arizona: Remove pointless readback in clearwater_spin_sysclk The toggling and reading back of a value is only done under the misguided notion that the SPI subsystem will allow writes/reads to be reordered and that the writes may not have completed by the time the function returns. As these assumptions are blatently false simplify spin_sysclk to just read the chip ID register. Change-Id: Ib3bae9b51d46981e09f4d2c3e6e1a8bd97b94ec4 Signed-off-by: Charles Keepax Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 16 +++------------- 1 file changed, 3 insertions(+), 13 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index a1c1747a55d..c798ac8726c 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -251,8 +251,8 @@ EXPORT_SYMBOL_GPL(arizona_cache_and_clear_sources); void clearwater_spin_sysclk(struct arizona *arizona) { - unsigned int val, res; - int ret, i; + unsigned int val; + int i; /* Skip this if the chip is down */ if (pm_runtime_suspended(arizona->dev)) @@ -263,17 +263,7 @@ void clearwater_spin_sysclk(struct arizona *arizona) * oscillator sends out a few clocks. */ for (i = 0; i < 4; i++) - regmap_read(arizona->regmap, 0x2c2, &val); - - val = (~val) & 0x7; - - regmap_write(arizona->regmap, 0x2c2, val); - ret = regmap_read(arizona->regmap, 0x2c2, &res); - - if (ret == 0 && val != res) - dev_err(arizona->dev, - "Failed to toggle flag register (%x,%x)\n", - val, res); + regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &val); } EXPORT_SYMBOL_GPL(clearwater_spin_sysclk); From d67f8e7f1f26fba3cc144128003da3c82c7524e6 Mon Sep 17 00:00:00 2001 From: Simon Trimmer Date: Mon, 22 Jun 2015 19:05:24 +0100 Subject: [PATCH 0905/1167] ASoC: arizona: add error check to regmap_read in clearwater_spin_sysclk Make failures in regmap_read more obvious with a dev_err message rather than failing silently. Change-Id: Ia37323ff9d5657b87d696d905ab71ec73c67c737 Signed-off-by: Simon Trimmer Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index c798ac8726c..a4f8c98fa25 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -252,7 +252,7 @@ EXPORT_SYMBOL_GPL(arizona_cache_and_clear_sources); void clearwater_spin_sysclk(struct arizona *arizona) { unsigned int val; - int i; + int ret, i; /* Skip this if the chip is down */ if (pm_runtime_suspended(arizona->dev)) @@ -262,8 +262,15 @@ void clearwater_spin_sysclk(struct arizona *arizona) * Just read a register a few times to ensure the internal * oscillator sends out a few clocks. */ - for (i = 0; i < 4; i++) - regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &val); + for (i = 0; i < 4; i++) { + ret = regmap_read(arizona->regmap, + ARIZONA_SOFTWARE_RESET, + &val); + if (ret != 0) + dev_err(arizona->dev, + "%s Failed to read register: %d (%d)\n", + __func__, ret, i); + } } EXPORT_SYMBOL_GPL(clearwater_spin_sysclk); From 7610f86a3917a530620a86386db32db26ed62c64 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 20 Apr 2015 13:54:17 +0100 Subject: [PATCH 0906/1167] mfd: arizona: add moon support For Moon - add spi and i2c support - verify device id register - add (register) mfd devices - register irq's - disable ldo1 (no ldo1 on moon) - apply rev-0 silicon patch - scan settings of children's micbiases - scan settings of dmic clock sources - scan settings of gnd field in micd_configs Additional Registers (as compared to clearwater) for -Micbias Switches -IN Rate Control -DMIC Clk Source -FLL_AO -MICDET2 Block -Additional Registers for MICDET1 and HPDET -DFC -DSP Region Locking DSP Memory regions (as compared to clearwater) -DSP1/6/7 has more memory -DSP4 has less memory Change-Id: Iec5e4bade4760fb3f8352fb5b9633b6c1e0ac5af Signed-off-by: Nikesh Oswal --- drivers/mfd/Kconfig | 9 + drivers/mfd/Makefile | 3 + drivers/mfd/arizona-core.c | 229 +- drivers/mfd/arizona-i2c.c | 9 + drivers/mfd/arizona-irq.c | 12 +- drivers/mfd/arizona-spi.c | 9 + drivers/mfd/arizona.h | 6 + drivers/mfd/moon-tables.c | 2991 +++++++++++++++++++++++++ include/linux/mfd/arizona/core.h | 16 +- include/linux/mfd/arizona/pdata.h | 11 +- include/linux/mfd/arizona/registers.h | 663 ++++++ 11 files changed, 3926 insertions(+), 32 deletions(-) create mode 100644 drivers/mfd/moon-tables.c diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 70d02daeb27..88fb5b5eff8 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1068,6 +1068,15 @@ config MFD_CLEARWATER help Support for Cirrus Logic ClearWater class low power audio SoC +config MFD_MOON + bool "Cirrus Logic Moon class codecs" + depends on MFD_ARIZONA + help + Support for Cirrus Logic Moon class low power audio SoC + such as the CS47L90. This driver provides common support + for accessing the device, additional drivers must be + enabled in order to use the functionality of the device. + config MFD_LARGO bool "Cirrus Logic Largo" depends on MFD_ARIZONA diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index dceedb8865a..555222bd211 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -58,6 +58,9 @@ endif ifeq ($(CONFIG_MFD_LARGO),y) obj-$(CONFIG_MFD_ARIZONA) += largo-tables.o endif +ifeq ($(CONFIG_MFD_MOON), y) +obj-$(CONFIG_MFD_ARIZONA) += moon-tables.o +endif obj-$(CONFIG_MFD_WM8400) += wm8400-core.o wm831x-objs := wm831x-core.o wm831x-irq.o wm831x-otp.o wm831x-objs += wm831x-auxadc.o diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 185936dc629..ae734b7bb0e 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -996,6 +996,27 @@ static int arizona_of_get_dmicref(struct arizona *arizona, return 0; } +static int arizona_of_get_dmic_clksrc(struct arizona *arizona, + const char *prop) +{ + struct arizona_pdata *pdata = &arizona->pdata; + struct device_node *np = arizona->dev->of_node; + struct property *tempprop; + const __be32 *cur; + u32 val; + int i; + + i = 0; + of_property_for_each_u32(np, prop, tempprop, cur, val) { + if (i == ARRAY_SIZE(pdata->dmic_clksrc)) + break; + + pdata->dmic_clksrc[i++] = val; + } + + return 0; +} + static int arizona_of_get_gpio_defaults(struct arizona *arizona, const char *prop) { @@ -1100,12 +1121,31 @@ static int arizona_of_get_micd_configs(struct arizona *arizona, const char *prop) { int nconfigs; - int i, j; + int i, j, group_size; int ret = 0; u32 value; struct arizona_micd_config *micd_configs; - nconfigs = arizona_of_get_u32_num_groups(arizona, prop, 3); + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8280: + case WM8998: + case WM1814: + case WM8285: + case WM1840: + case WM1831: + case CS47L24: + case CS47L35: + group_size = 3; + break; + default: + group_size = 4; + break; + } + + nconfigs = arizona_of_get_u32_num_groups(arizona, prop, group_size); if (nconfigs < 0) return nconfigs; @@ -1121,6 +1161,14 @@ static int arizona_of_get_micd_configs(struct arizona *arizona, goto error; micd_configs[i].src = value; + if (group_size == 4) { + ret = of_property_read_u32_index(arizona->dev->of_node, + prop, j++, &value); + if (ret < 0) + goto error; + micd_configs[i].gnd = value; + } + ret = of_property_read_u32_index(arizona->dev->of_node, prop, j++, &value); if (ret < 0) @@ -1147,20 +1195,25 @@ static int arizona_of_get_micd_configs(struct arizona *arizona, } static int arizona_of_get_micbias(struct arizona *arizona, - const char *prop, int index) + const char *prop, int index, + int num_micbias_outputs) { - int ret; - u32 micbias_config[5]; + int ret, i; + int j = 0; + u32 micbias_config[4 + ARIZONA_MAX_CHILD_MICBIAS] = {0}; ret = arizona_of_read_u32_array(arizona, prop, false, micbias_config, - ARRAY_SIZE(micbias_config)); + 4 + num_micbias_outputs); + if (ret >= 0) { - arizona->pdata.micbias[index].mV = micbias_config[0]; - arizona->pdata.micbias[index].ext_cap = micbias_config[1]; - arizona->pdata.micbias[index].discharge = micbias_config[2]; - arizona->pdata.micbias[index].soft_start = micbias_config[3]; - arizona->pdata.micbias[index].bypass = micbias_config[4]; + arizona->pdata.micbias[index].mV = micbias_config[j++]; + arizona->pdata.micbias[index].ext_cap = micbias_config[j++]; + for (i = 0; i < num_micbias_outputs; i++) + arizona->pdata.micbias[index].discharge[i] = + micbias_config[j++]; + arizona->pdata.micbias[index].soft_start = micbias_config[j++]; + arizona->pdata.micbias[index].bypass = micbias_config[j++]; } return ret; @@ -1170,7 +1223,28 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) { struct arizona_pdata *pdata = &arizona->pdata; u32 out_mono[ARIZONA_MAX_OUTPUT]; - int i; + int i, num_micbias_outputs; + + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8280: + case WM8998: + case WM1814: + case WM8285: + case WM1840: + case WM1831: + case CS47L24: + num_micbias_outputs = 1; + break; + case CS47L35: + num_micbias_outputs = MARLEY_NUM_CHILD_MICBIAS; + break; + default: + num_micbias_outputs = MOON_NUM_CHILD_MICBIAS; + break; + } memset(&out_mono, 0, sizeof(out_mono)); @@ -1182,10 +1256,10 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) arizona_of_get_micd_ranges(arizona, "wlf,micd-ranges"); arizona_of_get_micd_configs(arizona, "wlf,micd-configs"); - arizona_of_get_micbias(arizona, "wlf,micbias1", 0); - arizona_of_get_micbias(arizona, "wlf,micbias2", 1); - arizona_of_get_micbias(arizona, "wlf,micbias3", 2); - arizona_of_get_micbias(arizona, "wlf,micbias4", 3); + arizona_of_get_micbias(arizona, "wlf,micbias1", 0, num_micbias_outputs); + arizona_of_get_micbias(arizona, "wlf,micbias2", 1, num_micbias_outputs); + arizona_of_get_micbias(arizona, "wlf,micbias3", 2, num_micbias_outputs); + arizona_of_get_micbias(arizona, "wlf,micbias4", 3, num_micbias_outputs); arizona_of_get_gpio_defaults(arizona, "wlf,gpio-defaults"); @@ -1195,6 +1269,8 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) arizona_of_get_inmode(arizona, "wlf,inmode"); + arizona_of_get_dmic_clksrc(arizona, "wlf,dmic-clksrc"); + arizona_of_read_u32_array(arizona, "wlf,out-mono", false, out_mono, ARRAY_SIZE(out_mono)); for (i = 0; i < ARRAY_SIZE(out_mono); ++i) @@ -1224,6 +1300,8 @@ const struct of_device_id arizona_of_match[] = { { .compatible = "cirrus,cs47l24", .data = (void *)CS47L24 }, { .compatible = "cirrus,cs47l35", .data = (void *)CS47L35 }, { .compatible = "cirrus,cs47l85", .data = (void *)WM8285 }, + { .compatible = "cirrus,cs47l90", .data = (void *)CS47L90 }, + { .compatible = "cirrus,cs47l91", .data = (void *)CS47L91 }, {}, }; EXPORT_SYMBOL_GPL(arizona_of_match); @@ -1299,6 +1377,15 @@ static struct mfd_cell marley_devs[] = { { .name = "marley-codec" }, }; +static struct mfd_cell moon_devs[] = { + { .name = "arizona-micsupp" }, + { .name = "arizona-extcon" }, + { .name = "arizona-gpio" }, + { .name = "arizona-haptics" }, + { .name = "arizona-pwm" }, + { .name = "moon-codec" }, +}; + static const struct { unsigned int enable; unsigned int conf_reg; @@ -1436,7 +1523,9 @@ int arizona_dev_init(struct arizona *arizona) const char *type_name = "Unknown"; unsigned int reg, val, mask; int (*apply_patch)(struct arizona *) = NULL; - int ret, i, max_inputs; + int ret, i, max_inputs, max_micbias, j; + int num_child_micbias = 0; + unsigned int num_dmic_clksrc = 0; dev_set_drvdata(arizona->dev, arizona); mutex_init(&arizona->clk_lock); @@ -1466,6 +1555,8 @@ int arizona_dev_init(struct arizona *arizona) case WM1831: case CS47L24: case CS47L35: + case CS47L90: + case CS47L91: for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) arizona->core_supplies[i].supply = wm5102_core_supplies[i]; @@ -1489,6 +1580,8 @@ int arizona_dev_init(struct arizona *arizona) case WM1831: case CS47L24: case CS47L35: + case CS47L90: + case CS47L91: break; default: ret = mfd_add_devices(arizona->dev, -1, early_devs, @@ -1578,6 +1671,7 @@ int arizona_dev_init(struct arizona *arizona) case 0x8997: case 0x6338: case 0x6360: + case 0x6364: break; default: dev_err(arizona->dev, "Unknown device ID: %x\n", reg); @@ -1756,7 +1850,25 @@ int arizona_dev_init(struct arizona *arizona) apply_patch = marley_patch; break; #endif -default: +#ifdef CONFIG_MFD_MOON + case 0x6364: + switch (arizona->type) { + case CS47L90: + type_name = "CS47L90"; + break; + case CS47L91: + type_name = "CS47L91"; + break; + default: + dev_err(arizona->dev, + "Unknown Moon codec registered as CS47L90\n"); + arizona->type = CS47L90; + } + + apply_patch = moon_patch; + break; +#endif + default: dev_err(arizona->dev, "Unknown device ID %x\n", reg); goto err_reset; } @@ -1855,7 +1967,31 @@ int arizona_dev_init(struct arizona *arizona) pm_runtime_use_autosuspend(arizona->dev); pm_runtime_enable(arizona->dev); - for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8280: + case WM8998: + case WM1814: + case WM8285: + case WM1840: + case WM1831: + case CS47L24: + max_micbias = ARIZONA_MAX_MICBIAS; + num_child_micbias = 0; + break; + case CS47L35: + max_micbias = 2; + num_child_micbias = MARLEY_NUM_CHILD_MICBIAS; + break; + default: + max_micbias = 2; + num_child_micbias = MOON_NUM_CHILD_MICBIAS; + break; + } + + for (i = 0; i < max_micbias; i++) { if (!arizona->pdata.micbias[i].mV && !arizona->pdata.micbias[i].bypass) continue; @@ -1866,13 +2002,19 @@ int arizona_dev_init(struct arizona *arizona) val = (arizona->pdata.micbias[i].mV - 1500) / 100; + mask = ARIZONA_MICB1_LVL_MASK | ARIZONA_MICB1_EXT_CAP | + ARIZONA_MICB1_BYPASS | ARIZONA_MICB1_RATE; + val <<= ARIZONA_MICB1_LVL_SHIFT; if (arizona->pdata.micbias[i].ext_cap) val |= ARIZONA_MICB1_EXT_CAP; - if (arizona->pdata.micbias[i].discharge) - val |= ARIZONA_MICB1_DISCH; + if (num_child_micbias == 0) { + mask |= ARIZONA_MICB1_DISCH; + if (arizona->pdata.micbias[i].discharge[0]) + val |= ARIZONA_MICB1_DISCH; + } if (arizona->pdata.micbias[i].soft_start) val |= ARIZONA_MICB1_RATE; @@ -1881,12 +2023,21 @@ int arizona_dev_init(struct arizona *arizona) val |= ARIZONA_MICB1_BYPASS; regmap_update_bits(arizona->regmap, - ARIZONA_MIC_BIAS_CTRL_1 + i, - ARIZONA_MICB1_LVL_MASK | - ARIZONA_MICB1_EXT_CAP | - ARIZONA_MICB1_DISCH | - ARIZONA_MICB1_BYPASS | - ARIZONA_MICB1_RATE, val); + ARIZONA_MIC_BIAS_CTRL_1 + i, + mask, val); + + if (num_child_micbias) { + val = 0; + mask = 0; + for (j = 0; j < num_child_micbias; j++) { + mask |= (ARIZONA_MICB1A_DISCH << j*4); + if (arizona->pdata.micbias[i].discharge[j]) + val |= (ARIZONA_MICB1A_DISCH << j*4); + } + regmap_update_bits(arizona->regmap, + ARIZONA_MIC_BIAS_CTRL_5 + i*2, + mask, val); + } } switch (arizona->type) { @@ -1905,11 +2056,29 @@ int arizona_dev_init(struct arizona *arizona) case CS47L35: max_inputs = 2; break; - default: + case WM8285: + case WM1840: /* DMIC Ref for IN4-6 is fixed for WM8285/1840 and settings for INxL and INxR are different*/ max_inputs = 3; break; + default: + /*DMIC Ref for IN3-5 is fixed for CS47L90 and + settings for INxL and INxR are different*/ + max_inputs = 2; + /* For CS47L90/91 dmic clk src can be set same as + pdm speaker clock this is used when pdm speaker + feedsback IV data via pdm input */ + num_dmic_clksrc = 5; + break; + } + + for (i = 0; i < num_dmic_clksrc; i++) { + regmap_update_bits(arizona->regmap, + ARIZONA_IN1R_CONTROL + (i * 8), + MOON_IN1_DMICCLK_SRC_MASK, + (arizona->pdata.dmic_clksrc[i]) + << MOON_IN1_DMICCLK_SRC_SHIFT); } for (i = 0; i < max_inputs; i++) { @@ -2050,6 +2219,10 @@ int arizona_dev_init(struct arizona *arizona) case CS47L35: ret = mfd_add_devices(arizona->dev, -1, marley_devs, ARRAY_SIZE(marley_devs), NULL, 0, NULL); + case CS47L90: + case CS47L91: + ret = mfd_add_devices(arizona->dev, -1, moon_devs, + ARRAY_SIZE(moon_devs), NULL, 0, NULL); break; } diff --git a/drivers/mfd/arizona-i2c.c b/drivers/mfd/arizona-i2c.c index 7e01168de7f..ac8de783700 100644 --- a/drivers/mfd/arizona-i2c.c +++ b/drivers/mfd/arizona-i2c.c @@ -71,6 +71,13 @@ static int arizona_i2c_probe(struct i2c_client *i2c, regmap_config = &marley_16bit_i2c_regmap; regmap_32bit_config = &marley_32bit_i2c_regmap; break; +#endif +#ifdef CONFIG_MFD_MOON + case CS47L90: + case CS47L91: + regmap_config = &moon_16bit_i2c_regmap; + regmap_32bit_config = &moon_32bit_i2c_regmap; + break; #endif default: dev_err(&i2c->dev, "Unknown device type %ld\n", @@ -128,6 +135,8 @@ static const struct i2c_device_id arizona_i2c_id[] = { { "wm1840", WM1840 }, { "cs47l35", CS47L35 }, { "cs47l85", WM8285 }, + { "cs47l90", CS47L90 }, + { "cs47l91", CS47L91 }, { } }; MODULE_DEVICE_TABLE(i2c, arizona_i2c_id); diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index d3734ee0e4b..eaa80122ba4 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -281,7 +281,17 @@ int arizona_irq_init(struct arizona *arizona) irq_ctrl_reg = CLEARWATER_IRQ1_CTRL; break; #endif -default: +#ifdef CONFIG_MFD_MOON + case CS47L90: + case CS47L91: + aod = &moon_irq; + irq = NULL; + + ctrlif_error = false; + irq_ctrl_reg = CLEARWATER_IRQ1_CTRL; + break; +#endif + default: BUG_ON("Unknown Arizona class device" == NULL); return -EINVAL; } diff --git a/drivers/mfd/arizona-spi.c b/drivers/mfd/arizona-spi.c index b5c1c93cfd0..f2f473e158b 100644 --- a/drivers/mfd/arizona-spi.c +++ b/drivers/mfd/arizona-spi.c @@ -67,6 +67,13 @@ static int arizona_spi_probe(struct spi_device *spi) regmap_config = &marley_16bit_spi_regmap; regmap_32bit_config = &marley_32bit_spi_regmap; break; +#endif +#ifdef CONFIG_MFD_MOON + case CS47L90: + case CS47L91: + regmap_config = &moon_16bit_spi_regmap; + regmap_32bit_config = &moon_32bit_spi_regmap; + break; #endif default: dev_err(&spi->dev, "Unknown device type %ld\n", @@ -123,6 +130,8 @@ static const struct spi_device_id arizona_spi_ids[] = { { "cs47l24", CS47L24 }, { "cs47l35", CS47L35 }, { "cs47l85", WM8285 }, + { "cs47l90", CS47L90 }, + { "cs47l91", CS47L91 }, { }, }; MODULE_DEVICE_TABLE(spi, arizona_spi_ids); diff --git a/drivers/mfd/arizona.h b/drivers/mfd/arizona.h index 76b6bb68184..d78a9c2b7b0 100644 --- a/drivers/mfd/arizona.h +++ b/drivers/mfd/arizona.h @@ -36,6 +36,11 @@ extern const struct regmap_config marley_16bit_spi_regmap; extern const struct regmap_config marley_32bit_spi_regmap; extern const struct regmap_config marley_32bit_i2c_regmap; +extern const struct regmap_config moon_16bit_i2c_regmap; +extern const struct regmap_config moon_16bit_spi_regmap; +extern const struct regmap_config moon_32bit_spi_regmap; +extern const struct regmap_config moon_32bit_i2c_regmap; + extern const struct regmap_config wm8997_i2c_regmap; extern const struct regmap_config vegas_i2c_regmap; @@ -54,6 +59,7 @@ extern const struct regmap_irq_chip florida_irq; extern const struct regmap_irq_chip florida_revd_irq; extern const struct regmap_irq_chip clearwater_irq; +extern const struct regmap_irq_chip moon_irq; extern const struct regmap_irq_chip wm8997_aod; extern const struct regmap_irq_chip wm8997_irq; diff --git a/drivers/mfd/moon-tables.c b/drivers/mfd/moon-tables.c new file mode 100644 index 00000000000..3feabedf7de --- /dev/null +++ b/drivers/mfd/moon-tables.c @@ -0,0 +1,2991 @@ +/* + * moon-tables.c -- data tables for MOON class codecs + * + * Copyright 2015 Cirrus Logic + * + * Author: Nikesh Oswal + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include + +#include +#include +#include + +#include "arizona.h" + +static const struct reg_default moon_reva_16_patch[] = { + { 0x8A, 0x5555 }, + { 0x8A, 0xAAAA }, + { 0x51B, 0x0001 }, + { 0x55B, 0x0001 }, + { 0x59B, 0x0001 }, + { 0x5BB, 0x0001 }, + { 0x4CF, 0x0730 }, + { 0x3A2, 0x242A }, + { 0x443, 0x9CFA }, + { 0x441, 0xC750 }, + { 0x4E2, 0x1312 }, + { 0x4E3, 0x1312 }, + { 0x4E4, 0x1312 }, + { 0x8A, 0xCCCC }, + { 0x8A, 0x3333 }, +}; + +/* We use a function so we can use ARRAY_SIZE() */ +int moon_patch(struct arizona *arizona) +{ + int ret; + const struct reg_default *patch16 = NULL; + unsigned int num16; + + patch16 = moon_reva_16_patch; + num16 = ARRAY_SIZE(moon_reva_16_patch); + + if (patch16) { + ret = regmap_register_patch(arizona->regmap, patch16, num16); + if (ret < 0) { + dev_err(arizona->dev, + "Error in applying 16-bit patch: %d\n", ret); + return ret; + } + } + + return 0; +} +EXPORT_SYMBOL_GPL(moon_patch); + +static const struct regmap_irq moon_irqs[ARIZONA_NUM_IRQ] = { + [ARIZONA_IRQ_BOOT_DONE] = { .reg_offset = 0, + .mask = CLEARWATER_BOOT_DONE_EINT1 }, + [ARIZONA_IRQ_CTRLIF_ERR] = { .reg_offset = 0, + .mask = CLEARWATER_CTRLIF_ERR_EINT1 }, + + [ARIZONA_IRQ_FLL1_CLOCK_OK] = { .reg_offset = 1, + .mask = CLEARWATER_FLL1_LOCK_EINT1 }, + [ARIZONA_IRQ_FLL2_CLOCK_OK] = { .reg_offset = 1, + .mask = CLEARWATER_FLL2_LOCK_EINT1}, + [MOON_IRQ_FLLAO_CLOCK_OK] = { .reg_offset = 1, + .mask = MOON_FLLAO_LOCK_EINT1}, + + [ARIZONA_IRQ_MICDET] = { .reg_offset = 5, + .mask = CLEARWATER_MICDET_EINT1 }, + [MOON_IRQ_MICDET2] = { .reg_offset = 5, + .mask = MOON_MICDET2_EINT1 }, + [ARIZONA_IRQ_HPDET] = { .reg_offset = 5, + .mask = CLEARWATER_HPDET_EINT1}, + + [ARIZONA_IRQ_MICD_CLAMP_RISE] = { .reg_offset = 6, + .mask = CLEARWATER_MICD_CLAMP_RISE_EINT1 }, + [ARIZONA_IRQ_MICD_CLAMP_FALL] = { .reg_offset = 6, + .mask = CLEARWATER_MICD_CLAMP_FALL_EINT1 }, + [ARIZONA_IRQ_JD_FALL] = { .reg_offset = 6, + .mask = CLEARWATER_JD1_FALL_EINT1 }, + [ARIZONA_IRQ_JD_RISE] = { .reg_offset = 6, + .mask = CLEARWATER_JD1_RISE_EINT1 }, + + [ARIZONA_IRQ_ASRC2_LOCK] = { .reg_offset = 8, + .mask = CLEARWATER_ASRC2_IN1_LOCK_EINT1 }, + [ARIZONA_IRQ_ASRC1_LOCK] = { .reg_offset = 8, + .mask = CLEARWATER_ASRC1_IN1_LOCK_EINT1 }, + [ARIZONA_IRQ_DRC2_SIG_DET] = { .reg_offset = 8, + .mask = CLEARWATER_DRC2_SIG_DET_EINT1 }, + [ARIZONA_IRQ_DRC1_SIG_DET] = { .reg_offset = 8, + .mask = CLEARWATER_DRC1_SIG_DET_EINT1 }, + + [ARIZONA_IRQ_DSP_IRQ1] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ1_EINT1}, + [ARIZONA_IRQ_DSP_IRQ2] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ2_EINT1}, + [ARIZONA_IRQ_DSP_IRQ3] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ3_EINT1}, + [ARIZONA_IRQ_DSP_IRQ4] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ4_EINT1}, + [ARIZONA_IRQ_DSP_IRQ5] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ5_EINT1}, + [ARIZONA_IRQ_DSP_IRQ6] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ6_EINT1}, + [ARIZONA_IRQ_DSP_IRQ7] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ7_EINT1}, + [ARIZONA_IRQ_DSP_IRQ8] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ8_EINT1}, + [MOON_IRQ_DSP1_BUS_ERROR] = { .reg_offset = 32, + .mask = MOON_ADSP_ERROR_STATUS_DSP1}, + [MOON_IRQ_DSP2_BUS_ERROR] = { .reg_offset = 32, + .mask = MOON_ADSP_ERROR_STATUS_DSP2}, + [MOON_IRQ_DSP3_BUS_ERROR] = { .reg_offset = 32, + .mask = MOON_ADSP_ERROR_STATUS_DSP3}, + [MOON_IRQ_DSP4_BUS_ERROR] = { .reg_offset = 32, + .mask = MOON_ADSP_ERROR_STATUS_DSP4}, + [MOON_IRQ_DSP5_BUS_ERROR] = { .reg_offset = 32, + .mask = MOON_ADSP_ERROR_STATUS_DSP5}, + [MOON_IRQ_DSP6_BUS_ERROR] = { .reg_offset = 32, + .mask = MOON_ADSP_ERROR_STATUS_DSP6}, + [MOON_IRQ_DSP7_BUS_ERROR] = { .reg_offset = 32, + .mask = MOON_ADSP_ERROR_STATUS_DSP7}, +}; + +const struct regmap_irq_chip moon_irq = { + .name = "moon IRQ", + .status_base = CLEARWATER_IRQ1_STATUS_1, + .mask_base = CLEARWATER_IRQ1_MASK_1, + .ack_base = CLEARWATER_IRQ1_STATUS_1, + .num_regs = 33, + .irqs = moon_irqs, + .num_irqs = ARRAY_SIZE(moon_irqs), +}; +EXPORT_SYMBOL_GPL(moon_irq); + +static const struct reg_default moon_reg_default[] = { + { 0x00000008, 0x0308 }, /* R8 - Ctrl IF CFG 1 */ + { 0x00000009, 0x0200 }, /* R9 - Ctrl IF CFG 2 */ + { 0x0000000A, 0x0308 }, /* R10 - Ctrl IF CFG 3 */ + { 0x00000016, 0x0000 }, /* R22 (0x16) - Write Sequencer Ctrl 0 */ + { 0x00000017, 0x0000 }, /* R23 (0x17) - Write Sequencer Ctrl 1 */ + { 0x00000018, 0x0000 }, /* R24 (0x18) - Write Sequencer Ctrl 2 */ + { 0x00000020, 0x0000 }, /* R32 (0x20) - Tone Generator 1 */ + { 0x00000021, 0x1000 }, /* R33 (0x21) - Tone Generator 2 */ + { 0x00000022, 0x0000 }, /* R34 (0x22) - Tone Generator 3 */ + { 0x00000023, 0x1000 }, /* R35 (0x23) - Tone Generator 4 */ + { 0x00000024, 0x0000 }, /* R36 (0x24) - Tone Generator 5 */ + { 0x00000030, 0x0000 }, /* R48 (0x30) - PWM Drive 1 */ + { 0x00000031, 0x0100 }, /* R49 (0x31) - PWM Drive 2 */ + { 0x00000032, 0x0100 }, /* R50 (0x32) - PWM Drive 3 */ + { 0x00000041, 0x0000 }, /* R65 (0x41) - Sequence control */ + { 0x00000061, 0x01ff }, /* R97 (0x61) - Sample Rate Sequence Select 1 */ + { 0x00000062, 0x01ff }, /* R98 (0x62) - Sample Rate Sequence Select 2 */ + { 0x00000063, 0x01ff }, /* R99 (0x63) - Sample Rate Sequence Select 3 */ + { 0x00000064, 0x01ff }, /* R100 (0x64) - Sample Rate Sequence Select 4 */ + { 0x00000066, 0x01ff }, + { 0x00000067, 0x01ff }, + { 0x00000068, 0x01ff }, /* R104 (0x68) - Always On Triggers Sequence Select 1 */ + { 0x00000069, 0x01ff }, /* R105 (0x69) - Always On Triggers Sequence Select 2 */ + { 0x0000006a, 0x01ff }, /* R106 (0x6A) - Always On Triggers Sequence Select 3 */ + { 0x0000006b, 0x01ff }, /* R107 (0x6B) - Always On Triggers Sequence Select 4 */ + { 0x00000090, 0x0000 }, /* R144 (0x90) - Haptics Control 1 */ + { 0x00000091, 0x7fff }, /* R145 (0x91) - Haptics Control 2 */ + { 0x00000092, 0x0000 }, /* R146 (0x92) - Haptics phase 1 intensity */ + { 0x00000093, 0x0000 }, /* R147 (0x93) - Haptics phase 1 duration */ + { 0x00000094, 0x0000 }, /* R148 (0x94) - Haptics phase 2 intensity */ + { 0x00000095, 0x0000 }, /* R149 (0x95) - Haptics phase 2 duration */ + { 0x00000096, 0x0000 }, /* R150 (0x96) - Haptics phase 3 intensity */ + { 0x00000097, 0x0000 }, /* R151 (0x97) - Haptics phase 3 duration */ + { 0x000000A0, 0x0000 }, /* R160 (0xA0) - Clearwater Comfort Noise Generator */ + { 0x00000100, 0x0002 }, /* R256 (0x100) - Clock 32k 1 */ + { 0x00000101, 0x0404 }, /* R257 (0x101) - System Clock 1 */ + { 0x00000102, 0x0011 }, /* R258 (0x102) - Sample rate 1 */ + { 0x00000103, 0x0011 }, /* R259 (0x103) - Sample rate 2 */ + { 0x00000104, 0x0011 }, /* R260 (0x104) - Sample rate 3 */ + { 0x00000112, 0x0305 }, /* R274 (0x112) - Async clock 1 */ + { 0x00000113, 0x0011 }, /* R275 (0x113) - Async sample rate 1 */ + { 0x00000114, 0x0011 }, /* R276 (0x114) - Async sample rate 2 */ + { 0x00000120, 0x0305 }, + { 0x00000122, 0x0000 }, + { 0x00000149, 0x0000 }, /* R329 (0x149) - Output system clock */ + { 0x0000014a, 0x0000 }, /* R330 (0x14A) - Output async clock */ + { 0x00000152, 0x0000 }, /* R338 (0x152) - Rate Estimator 1 */ + { 0x00000153, 0x0000 }, /* R339 (0x153) - Rate Estimator 2 */ + { 0x00000154, 0x0000 }, /* R340 (0x154) - Rate Estimator 3 */ + { 0x00000155, 0x0000 }, /* R341 (0x155) - Rate Estimator 4 */ + { 0x00000156, 0x0000 }, /* R342 (0x156) - Rate Estimator 5 */ + { 0x00000171, 0x0002 }, /* R369 (0x171) - FLL1 Control 1 */ + { 0x00000172, 0x0008 }, /* R370 (0x172) - FLL1 Control 2 */ + { 0x00000173, 0x0018 }, /* R371 (0x173) - FLL1 Control 3 */ + { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */ + { 0x00000175, 0x0000 }, /* R373 - FLL1 Control 5 */ + { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */ + { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */ + { 0x00000178, 0x0000 }, + { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */ + { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 1 */ + { 0x00000182, 0x0000 }, /* R386 (0x182) - FLL1 Synchroniser 2 */ + { 0x00000183, 0x0000 }, /* R387 (0x183) - FLL1 Synchroniser 3 */ + { 0x00000184, 0x0000 }, /* R388 (0x184) - FLL1 Synchroniser 4 */ + { 0x00000185, 0x0000 }, /* R389 (0x185) - FLL1 Synchroniser 5 */ + { 0x00000186, 0x0000 }, /* R390 (0x186) - FLL1 Synchroniser 6 */ + { 0x00000187, 0x0001 }, /* R391 (0x187) - FLL1 Synchroniser 7 */ + { 0x00000189, 0x0000 }, /* R393 (0x189) - FLL1 Spread Spectrum */ + { 0x0000018a, 0x0004 }, /* R394 (0x18A) - FLL1 GPIO Clock */ + { 0x00000191, 0x0002 }, /* R401 (0x191) - FLL2 Control 1 */ + { 0x00000192, 0x0008 }, /* R402 (0x192) - FLL2 Control 2 */ + { 0x00000193, 0x0018 }, /* R403 (0x193) - FLL2 Control 3 */ + { 0x00000194, 0x007d }, /* R404 (0x194) - FLL2 Control 4 */ + { 0x00000195, 0x0000 }, /* R405 - FLL2 Control 5 */ + { 0x00000196, 0x0000 }, /* R406 (0x196) - FLL2 Control 6 */ + { 0x00000197, 0x0281 }, /* R407 (0x197) - FLL2 Loop Filter Test 1 */ + { 0x00000198, 0x0000 }, + { 0x00000199, 0x0000 }, /* R409 (0x199) - FLL2 Control 7 */ + { 0x000001a1, 0x0000 }, /* R417 (0x1A1) - FLL2 Synchroniser 1 */ + { 0x000001a2, 0x0000 }, /* R418 (0x1A2) - FLL2 Synchroniser 2 */ + { 0x000001a3, 0x0000 }, /* R419 (0x1A3) - FLL2 Synchroniser 3 */ + { 0x000001a4, 0x0000 }, /* R420 (0x1A4) - FLL2 Synchroniser 4 */ + { 0x000001a5, 0x0000 }, /* R421 (0x1A5) - FLL2 Synchroniser 5 */ + { 0x000001a6, 0x0000 }, /* R422 (0x1A6) - FLL2 Synchroniser 6 */ + { 0x000001a7, 0x0001 }, /* R423 (0x1A7) - FLL2 Synchroniser 7 */ + { 0x000001a9, 0x0000 }, /* R425 (0x1A9) - FLL2 Spread Spectrum */ + { 0x000001aa, 0x0004 }, /* R426 (0x1AA) - FLL2 GPIO Clock */ + { 0x000001D1, 0x0004 }, /* R465 - FLLAO_CONTROL_1 */ + { 0x000001D2, 0x0004 }, /* R466 - FLLAO_CONTROL_2 */ + { 0x000001D3, 0x0000 }, /* R467 - FLLAO_CONTROL_3 */ + { 0x000001D4, 0x0000 }, /* R468 - FLLAO_CONTROL_4 */ + { 0x000001D5, 0x0001 }, /* R469 - FLLAO_CONTROL_5 */ + { 0x000001D6, 0x8004 }, /* R470 - FLLAO_CONTROL_6 */ + { 0x000001D8, 0x0000 }, /* R472 - FLLAO_CONTROL_7 */ + { 0x000001DA, 0x0070 }, /* R474 - FLLAO_CONTROL_8 */ + { 0x000001DB, 0x0000 }, /* R475 - FLLAO_CONTROL_9 */ + { 0x000001DC, 0x06DA }, /* R476 - FLLAO_CONTROL_10 */ + { 0x000001DD, 0x0011 }, /* R477 - FLLAO_CONTROL_11 */ + { 0x00000200, 0x0006 }, /* R512 (0x200) - Mic Charge Pump 1 */ + { 0x00000213, 0x03e4 }, /* R531 (0x213) - LDO2 Control 1 */ + { 0x00000218, 0x00e6 }, /* R536 (0x218) - Mic Bias Ctrl 1 */ + { 0x00000219, 0x00e6 }, /* R537 (0x219) - Mic Bias Ctrl 2 */ + { 0x0000021C, 0x2222 }, /* R540 - Mic Bias Ctrl 5 */ + { 0x0000021E, 0x2222 }, /* R542 - Mic Bias Ctrl 6 */ + { 0x0000027e, 0x0000 }, /* R638 (0x27E) - Clearwater EDRE HP stereo control */ + { 0x00000293, 0x0080 }, /* R659 (0x293) - Accessory Detect Mode 1 */ + { 0x00000299, 0x0000 }, /* R665 (0x299) - Headphone Detect 0 */ + { 0x0000029b, 0x0000 }, /* R667 (0x29B) - Headphone Detect 1 */ + { 0x000002a2, 0x0010 }, /* R674 (0x2A2) - Mic Detect 0 */ + { 0x000002a3, 0x1102 }, /* R675 (0x2A3) - Mic Detect 1 */ + { 0x000002a4, 0x009f }, /* R676 (0x2A4) - Mic Detect 2 */ + { 0x000002a6, 0x3d3d }, + { 0x000002a7, 0x3d3d }, + { 0x000002a8, 0x333d }, + { 0x000002a9, 0x202d }, + { 0x000002b2, 0x0010 }, /* R690 (0x2B2) - MicDetect2-0 */ + { 0x000002b3, 0x1102 }, /* R691 (0x2B3) - MicDetect2-1 */ + { 0x000002b4, 0x009f }, /* R692 (0x2B4) - MicDetect2-2 */ + { 0x000002b6, 0x3D3D }, + { 0x000002b7, 0x3D3D }, + { 0x000002b8, 0x333D }, + { 0x000002b9, 0x202D }, + { 0x000002c6, 0x0010 }, + { 0x000002c8, 0x0000 }, /* R712 (0x2C8) - GP switch 1 */ + { 0x000002d3, 0x0000 }, /* R723 (0x2D3) - Jack detect analogue */ + { 0x00000300, 0x0000 }, /* R666 (0x300) - input_enable */ + { 0x00000308, 0x0400 }, /* R776 (0x308) - Input Rate */ + { 0x00000309, 0x0022 }, /* R777 (0x309) - Input Volume Ramp */ + { 0x0000030c, 0x0002 }, /* R780 (0x30C) - HPF Control */ + { 0x00000310, 0x0080 }, /* R784 (0x310) - IN1L Control */ + { 0x00000311, 0x0180 }, /* R785 (0x311) - ADC Digital Volume 1L */ + { 0x00000312, 0x0500 }, /* R786 (0x312) - DMIC1L Control */ + { 0x00000313, 0x0000 }, /* R787 (0x313) - IN1L Rate Control */ + { 0x00000314, 0x0080 }, /* R788 (0x314) - IN1R Control */ + { 0x00000315, 0x0180 }, /* R789 (0x315) - ADC Digital Volume 1R */ + { 0x00000316, 0x0000 }, /* R790 (0x316) - DMIC1R Control */ + { 0x00000317, 0x0000 }, /* R791 (0x317) - IN1R Rate Control */ + { 0x00000318, 0x0080 }, /* R792 (0x318) - IN2L Control */ + { 0x00000319, 0x0180 }, /* R793 (0x319) - ADC Digital Volume 2L */ + { 0x0000031a, 0x0500 }, /* R794 (0x31A) - DMIC2L Control */ + { 0x0000031b, 0x0000 }, /* R795 (0x31B) - IN2L Rate Control */ + { 0x0000031c, 0x0080 }, /* R796 (0x31C) - IN2R Control */ + { 0x0000031d, 0x0180 }, /* R797 (0x31D) - ADC Digital Volume 2R */ + { 0x0000031e, 0x0000 }, /* R798 (0x31E) - DMIC2R Control */ + { 0x0000031f, 0x0000 }, /* R799 (0x31F) - IN2R Rate Control */ + { 0x00000320, 0x0000 }, /* R800 (0x320) - IN3L Control */ + { 0x00000321, 0x0180 }, /* R801 (0x321) - ADC Digital Volume 3L */ + { 0x00000322, 0x0500 }, /* R802 (0x322) - DMIC3L Control */ + { 0x00000323, 0x0000 }, /* R803 (0x323) - IN3L Rate Control */ + { 0x00000324, 0x0000 }, /* R804 (0x324) - IN3R Control */ + { 0x00000325, 0x0180 }, /* R805 (0x325) - ADC Digital Volume 3R */ + { 0x00000326, 0x0000 }, /* R806 (0x326) - DMIC3R Control */ + { 0x00000327, 0x0000 }, /* R807 (0x327) - IN3R Rate Control */ + { 0x00000328, 0x0000 }, /* R808 (0x328) - IN4 Control */ + { 0x00000329, 0x0180 }, /* R809 (0x329) - ADC Digital Volume 4L */ + { 0x0000032a, 0x0500 }, /* R810 (0x32A) - DMIC4L Control */ + { 0x0000032b, 0x0000 }, /* R811 (0x32B) - IN4L Rate Control */ + { 0x0000032c, 0x0000 }, /* R812 (0x32C) - IN4R Control */ + { 0x0000032d, 0x0180 }, /* R813 (0x32D) - ADC Digital Volume 4R */ + { 0x0000032e, 0x0000 }, /* R814 (0x32E) - DMIC4R Control */ + { 0x0000032f, 0x0000 }, /* R815 (0x32F) - IN4R Rate Control */ + { 0x00000330, 0x0000 }, /* R816 - IN5L Control */ + { 0x00000331, 0x0180 }, /* R817 - ADC Digital Volume 5L */ + { 0x00000332, 0x0500 }, /* R818 - DMIC5L Control */ + { 0x00000333, 0x0000 }, /* R819 (0x333) - IN5L Rate Control */ + { 0x00000334, 0x0000 }, /* R820 - IN5R Control */ + { 0x00000335, 0x0180 }, /* R821 - ADC Digital Volume 5R */ + { 0x00000336, 0x0000 }, /* R822 - DMIC5R Control */ + { 0x00000337, 0x0000 }, /* R823 (0x337) - IN5R Rate Control */ + { 0x00000400, 0x0000 }, /* R1024 (0x400) - Output Enables 1 */ + { 0x00000408, 0x0000 }, /* R1032 (0x408) - Output Rate 1 */ + { 0x00000409, 0x0022 }, /* R1033 (0x409) - Output Volume Ramp */ + { 0x00000410, 0x0080 }, /* R1040 (0x410) - Output Path Config 1L */ + { 0x00000411, 0x0180 }, /* R1041 (0x411) - DAC Digital Volume 1L */ + { 0x00000412, 0x0000 }, /* R1042 (0x412) - moon_out1_config */ + { 0x00000413, 0x0001 }, /* R1043 (0x413) - Noise Gate Select 1L */ + { 0x00000414, 0x0080 }, /* R1044 (0x414) - Output Path Config 1R */ + { 0x00000415, 0x0180 }, /* R1045 (0x415) - DAC Digital Volume 1R */ + { 0x00000417, 0x0002 }, /* R1047 (0x417) - Noise Gate Select 1R */ + { 0x00000418, 0x0080 }, /* R1048 (0x418) - Output Path Config 2L */ + { 0x00000419, 0x0180 }, /* R1049 (0x419) - DAC Digital Volume 2L */ + { 0x0000041A, 0x0002 }, /* R1050 (0x41A) - moon_out2_config */ + { 0x0000041b, 0x0004 }, /* R1051 (0x41B) - Noise Gate Select 2L */ + { 0x0000041c, 0x0080 }, /* R1052 (0x41C) - Output Path Config 2R */ + { 0x0000041d, 0x0180 }, /* R1053 (0x41D) - DAC Digital Volume 2R */ + { 0x0000041f, 0x0008 }, /* R1055 (0x41F) - Noise Gate Select 2R */ + { 0x00000420, 0x0080 }, /* R1056 (0x420) - Output Path Config 3L */ + { 0x00000421, 0x0180 }, /* R1057 (0x421) - DAC Digital Volume 3L */ + { 0x00000423, 0x0010 }, /* R1059 (0x423) - Noise Gate Select 3L */ + { 0x00000424, 0x0080 }, /* R1060 (0x424) - Output Path Config 3R */ + { 0x00000425, 0x0180 }, /* R1061 (0x425) - DAC Digital Volume 3R */ + { 0x00000427, 0x0020 }, + { 0x00000430, 0x0000 }, /* R1072 (0x430) - Output Path Config 5L */ + { 0x00000431, 0x0180 }, /* R1073 (0x431) - DAC Digital Volume 5L */ + { 0x00000433, 0x0100 }, /* R1075 (0x433) - Noise Gate Select 5L */ + { 0x00000434, 0x0000 }, /* R1076 (0x434) - Output Path Config 5R */ + { 0x00000435, 0x0180 }, /* R1077 (0x435) - DAC Digital Volume 5R */ + { 0x00000437, 0x0200 }, /* R1079 (0x437) - Noise Gate Select 5R */ + { 0x00000440, 0x003f }, /* R1088 (0x440) - DRE Enable */ + { 0x00000448, 0x003f }, /* R1096 (0x448) - eDRE Enable */ + { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */ + { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */ + { 0x00000490, 0x0069 }, /* R1168 (0x490) - PDM SPK1 CTRL 1 */ + { 0x00000491, 0x0000 }, /* R1169 (0x491) - PDM SPK1 CTRL 2 */ + { 0x000004A0, 0x3080 }, /* R1184 - HP1 Short Circuit Ctrl */ + { 0x000004A1, 0x3000 }, /* R1185 - HP2 Short Circuit Ctrl */ + { 0x000004A2, 0x3000 }, /* R1186 - HP3 Short Circuit Ctrl */ + { 0x000004A8, 0x7120 }, /* R1192 - HP Test Ctrl 5 */ + { 0x000004A9, 0x7120 }, /* R1193 - HP Test Ctrl 6 */ + { 0x00000500, 0x000c }, /* R1280 (0x500) - AIF1 BCLK Ctrl */ + { 0x00000501, 0x0000 }, /* R1281 (0x501) - AIF1 Tx Pin Ctrl */ + { 0x00000502, 0x0000 }, /* R1282 (0x502) - AIF1 Rx Pin Ctrl */ + { 0x00000503, 0x0000 }, /* R1283 (0x503) - AIF1 Rate Ctrl */ + { 0x00000504, 0x0000 }, /* R1284 (0x504) - AIF1 Format */ + { 0x00000505, 0x0040 }, /* R1285 (0x505) - AIF1 Tx BCLK Rate */ + { 0x00000506, 0x0040 }, /* R1286 (0x506) - AIF1 Rx BCLK Rate */ + { 0x00000507, 0x1818 }, /* R1287 (0x507) - AIF1 Frame Ctrl 1 */ + { 0x00000508, 0x1818 }, /* R1288 (0x508) - AIF1 Frame Ctrl 2 */ + { 0x00000509, 0x0000 }, /* R1289 (0x509) - AIF1 Frame Ctrl 3 */ + { 0x0000050a, 0x0001 }, /* R1290 (0x50A) - AIF1 Frame Ctrl 4 */ + { 0x0000050b, 0x0002 }, /* R1291 (0x50B) - AIF1 Frame Ctrl 5 */ + { 0x0000050c, 0x0003 }, /* R1292 (0x50C) - AIF1 Frame Ctrl 6 */ + { 0x0000050d, 0x0004 }, /* R1293 (0x50D) - AIF1 Frame Ctrl 7 */ + { 0x0000050e, 0x0005 }, /* R1294 (0x50E) - AIF1 Frame Ctrl 8 */ + { 0x0000050f, 0x0006 }, /* R1295 (0x50F) - AIF1 Frame Ctrl 9 */ + { 0x00000510, 0x0007 }, /* R1296 (0x510) - AIF1 Frame Ctrl 10 */ + { 0x00000511, 0x0000 }, /* R1297 (0x511) - AIF1 Frame Ctrl 11 */ + { 0x00000512, 0x0001 }, /* R1298 (0x512) - AIF1 Frame Ctrl 12 */ + { 0x00000513, 0x0002 }, /* R1299 (0x513) - AIF1 Frame Ctrl 13 */ + { 0x00000514, 0x0003 }, /* R1300 (0x514) - AIF1 Frame Ctrl 14 */ + { 0x00000515, 0x0004 }, /* R1301 (0x515) - AIF1 Frame Ctrl 15 */ + { 0x00000516, 0x0005 }, /* R1302 (0x516) - AIF1 Frame Ctrl 16 */ + { 0x00000517, 0x0006 }, /* R1303 (0x517) - AIF1 Frame Ctrl 17 */ + { 0x00000518, 0x0007 }, /* R1304 (0x518) - AIF1 Frame Ctrl 18 */ + { 0x00000519, 0x0000 }, /* R1305 (0x519) - AIF1 Tx Enables */ + { 0x0000051a, 0x0000 }, /* R1306 (0x51A) - AIF1 Rx Enables */ + { 0x00000540, 0x000c }, /* R1344 (0x540) - AIF2 BCLK Ctrl */ + { 0x00000541, 0x0000 }, /* R1345 (0x541) - AIF2 Tx Pin Ctrl */ + { 0x00000542, 0x0000 }, /* R1346 (0x542) - AIF2 Rx Pin Ctrl */ + { 0x00000543, 0x0000 }, /* R1347 (0x543) - AIF2 Rate Ctrl */ + { 0x00000544, 0x0000 }, /* R1348 (0x544) - AIF2 Format */ + { 0x00000545, 0x0040 }, /* R1349 (0x545) - AIF2 Tx BCLK Rate */ + { 0x00000546, 0x0040 }, /* R1350 (0x546) - AIF2 Rx BCLK Rate */ + { 0x00000547, 0x1818 }, /* R1351 (0x547) - AIF2 Frame Ctrl 1 */ + { 0x00000548, 0x1818 }, /* R1352 (0x548) - AIF2 Frame Ctrl 2 */ + { 0x00000549, 0x0000 }, /* R1353 (0x549) - AIF2 Frame Ctrl 3 */ + { 0x0000054a, 0x0001 }, /* R1354 (0x54A) - AIF2 Frame Ctrl 4 */ + { 0x0000054b, 0x0002 }, /* R1355 (0x54B) - AIF2 Frame Ctrl 5 */ + { 0x0000054c, 0x0003 }, /* R1356 (0x54C) - AIF2 Frame Ctrl 6 */ + { 0x0000054d, 0x0004 }, /* R1357 (0x54D) - AIF2 Frame Ctrl 7 */ + { 0x0000054e, 0x0005 }, /* R1358 (0x54E) - AIF2 Frame Ctrl 8 */ + { 0x0000054F, 0x0006 }, /* R1359 - AIF2 Frame Ctrl 9 */ + { 0x00000550, 0x0007 }, /* R1360 - AIF2 Frame Ctrl 10 */ + { 0x00000551, 0x0000 }, /* R1361 (0x551) - AIF2 Frame Ctrl 11 */ + { 0x00000552, 0x0001 }, /* R1362 (0x552) - AIF2 Frame Ctrl 12 */ + { 0x00000553, 0x0002 }, /* R1363 (0x553) - AIF2 Frame Ctrl 13 */ + { 0x00000554, 0x0003 }, /* R1364 (0x554) - AIF2 Frame Ctrl 14 */ + { 0x00000555, 0x0004 }, /* R1365 (0x555) - AIF2 Frame Ctrl 15 */ + { 0x00000556, 0x0005 }, /* R1366 (0x556) - AIF2 Frame Ctrl 16 */ + { 0x00000557, 0x0006 }, /* R1367 - AIF2 Frame Ctrl 17 */ + { 0x00000558, 0x0007 }, /* R1368 - AIF2 Frame Ctrl 18 */ + { 0x00000559, 0x0000 }, /* R1369 (0x559) - AIF2 Tx Enables */ + { 0x0000055a, 0x0000 }, /* R1370 (0x55A) - AIF2 Rx Enables */ + { 0x00000580, 0x000c }, /* R1408 (0x580) - AIF3 BCLK Ctrl */ + { 0x00000581, 0x0000 }, /* R1409 (0x581) - AIF3 Tx Pin Ctrl */ + { 0x00000582, 0x0000 }, /* R1410 (0x582) - AIF3 Rx Pin Ctrl */ + { 0x00000583, 0x0000 }, /* R1411 (0x583) - AIF3 Rate Ctrl */ + { 0x00000584, 0x0000 }, /* R1412 (0x584) - AIF3 Format */ + { 0x00000585, 0x0040 }, /* R1413 (0x585) - AIF3 Tx BCLK Rate */ + { 0x00000586, 0x0040 }, /* R1414 (0x586) - AIF3 Rx BCLK Rate */ + { 0x00000587, 0x1818 }, /* R1415 (0x587) - AIF3 Frame Ctrl 1 */ + { 0x00000588, 0x1818 }, /* R1416 (0x588) - AIF3 Frame Ctrl 2 */ + { 0x00000589, 0x0000 }, /* R1417 (0x589) - AIF3 Frame Ctrl 3 */ + { 0x0000058a, 0x0001 }, /* R1418 (0x58A) - AIF3 Frame Ctrl 4 */ + { 0x00000591, 0x0000 }, /* R1425 (0x591) - AIF3 Frame Ctrl 11 */ + { 0x00000592, 0x0001 }, /* R1426 (0x592) - AIF3 Frame Ctrl 12 */ + { 0x00000599, 0x0000 }, /* R1433 (0x599) - AIF3 Tx Enables */ + { 0x0000059a, 0x0000 }, /* R1434 (0x59A) - AIF3 Rx Enables */ + { 0x000005a0, 0x000c }, /* R1440 - AIF4 BCLK Ctrl */ + { 0x000005a1, 0x0000 }, /* R1441 - AIF4 Tx Pin Ctrl */ + { 0x000005a2, 0x0000 }, /* R1442 - AIF4 Rx Pin Ctrl */ + { 0x000005a3, 0x0000 }, /* R1443 - AIF4 Rate Ctrl */ + { 0x000005a4, 0x0000 }, /* R1444 - AIF4 Format */ + { 0x000005a5, 0x0040 }, /* R1445 - AIF4 Tx BCLK Rate */ + { 0x000005a6, 0x0040 }, /* R1446 - AIF4 Rx BCLK Rate */ + { 0x000005a7, 0x1818 }, /* R1447 - AIF4 Frame Ctrl 1 */ + { 0x000005a8, 0x1818 }, /* R1448 - AIF4 Frame Ctrl 2 */ + { 0x000005a9, 0x0000 }, /* R1449 - AIF4 Frame Ctrl 3 */ + { 0x000005aa, 0x0001 }, /* R1450 - AIF4 Frame Ctrl 4 */ + { 0x000005b1, 0x0000 }, /* R1457 - AIF4 Frame Ctrl 11 */ + { 0x000005b2, 0x0001 }, /* R1458 - AIF4 Frame Ctrl 12 */ + { 0x000005b9, 0x0000 }, /* R1465 - AIF4 Tx Enables */ + { 0x000005ba, 0x0000 }, /* R1466 - AIF4 Rx Enables */ + { 0x000005C2, 0x0000 }, /* R1474 - SPD1 TX Control */ + { 0x000005e3, 0x0000 }, /* R1507 (0x5E3) - SLIMbus Framer Ref Gear */ + { 0x000005e5, 0x0000 }, /* R1509 (0x5E5) - SLIMbus Rates 1 */ + { 0x000005e6, 0x0000 }, /* R1510 (0x5E6) - SLIMbus Rates 2 */ + { 0x000005e7, 0x0000 }, /* R1511 (0x5E7) - SLIMbus Rates 3 */ + { 0x000005e8, 0x0000 }, /* R1512 (0x5E8) - SLIMbus Rates 4 */ + { 0x000005e9, 0x0000 }, /* R1513 (0x5E9) - SLIMbus Rates 5 */ + { 0x000005ea, 0x0000 }, /* R1514 (0x5EA) - SLIMbus Rates 6 */ + { 0x000005eb, 0x0000 }, /* R1515 (0x5EB) - SLIMbus Rates 7 */ + { 0x000005ec, 0x0000 }, /* R1516 (0x5EC) - SLIMbus Rates 8 */ + { 0x000005f5, 0x0000 }, /* R1525 (0x5F5) - SLIMbus RX Channel Enable */ + { 0x000005f6, 0x0000 }, /* R1526 (0x5F6) - SLIMbus TX Channel Enable */ + { 0x00000640, 0x0000 }, + { 0x00000641, 0x0080 }, + { 0x00000642, 0x0000 }, + { 0x00000643, 0x0080 }, + { 0x00000644, 0x0000 }, + { 0x00000645, 0x0080 }, + { 0x00000646, 0x0000 }, + { 0x00000647, 0x0080 }, + { 0x00000648, 0x0000 }, + { 0x00000649, 0x0080 }, + { 0x0000064a, 0x0000 }, + { 0x0000064b, 0x0080 }, + { 0x0000064c, 0x0000 }, + { 0x0000064d, 0x0080 }, + { 0x0000064e, 0x0000 }, + { 0x0000064f, 0x0080 }, + { 0x00000680, 0x0000 }, + { 0x00000681, 0x0080 }, + { 0x00000682, 0x0000 }, + { 0x00000683, 0x0080 }, + { 0x00000684, 0x0000 }, + { 0x00000685, 0x0080 }, + { 0x00000686, 0x0000 }, + { 0x00000687, 0x0080 }, + { 0x00000688, 0x0000 }, + { 0x00000689, 0x0080 }, + { 0x0000068a, 0x0000 }, + { 0x0000068b, 0x0080 }, + { 0x0000068c, 0x0000 }, + { 0x0000068d, 0x0080 }, + { 0x0000068e, 0x0000 }, + { 0x0000068f, 0x0080 }, + { 0x00000690, 0x0000 }, + { 0x00000691, 0x0080 }, + { 0x00000692, 0x0000 }, + { 0x00000693, 0x0080 }, + { 0x00000694, 0x0000 }, + { 0x00000695, 0x0080 }, + { 0x00000696, 0x0000 }, + { 0x00000697, 0x0080 }, + { 0x00000698, 0x0000 }, + { 0x00000699, 0x0080 }, + { 0x0000069a, 0x0000 }, + { 0x0000069b, 0x0080 }, + { 0x0000069c, 0x0000 }, + { 0x0000069d, 0x0080 }, + { 0x0000069e, 0x0000 }, + { 0x0000069f, 0x0080 }, + { 0x000006a0, 0x0000 }, + { 0x000006a1, 0x0080 }, + { 0x000006a2, 0x0000 }, + { 0x000006a3, 0x0080 }, + { 0x000006a4, 0x0000 }, + { 0x000006a5, 0x0080 }, + { 0x000006a6, 0x0000 }, + { 0x000006a7, 0x0080 }, + { 0x000006a8, 0x0000 }, + { 0x000006a9, 0x0080 }, + { 0x000006aa, 0x0000 }, + { 0x000006ab, 0x0080 }, + { 0x000006ac, 0x0000 }, + { 0x000006ad, 0x0080 }, + { 0x000006ae, 0x0000 }, + { 0x000006af, 0x0080 }, + { 0x000006c0, 0x0000 }, + { 0x000006c1, 0x0080 }, + { 0x000006c2, 0x0000 }, + { 0x000006c3, 0x0080 }, + { 0x000006c4, 0x0000 }, + { 0x000006c5, 0x0080 }, + { 0x000006c6, 0x0000 }, + { 0x000006c7, 0x0080 }, + { 0x000006c8, 0x0000 }, + { 0x000006c9, 0x0080 }, + { 0x000006ca, 0x0000 }, + { 0x000006cb, 0x0080 }, + { 0x000006cc, 0x0000 }, + { 0x000006cd, 0x0080 }, + { 0x000006ce, 0x0000 }, + { 0x000006cf, 0x0080 }, + { 0x00000700, 0x0000 }, + { 0x00000701, 0x0080 }, + { 0x00000702, 0x0000 }, + { 0x00000703, 0x0080 }, + { 0x00000704, 0x0000 }, + { 0x00000705, 0x0080 }, + { 0x00000706, 0x0000 }, + { 0x00000707, 0x0080 }, + { 0x00000708, 0x0000 }, + { 0x00000709, 0x0080 }, + { 0x0000070a, 0x0000 }, + { 0x0000070b, 0x0080 }, + { 0x0000070c, 0x0000 }, + { 0x0000070d, 0x0080 }, + { 0x0000070e, 0x0000 }, + { 0x0000070f, 0x0080 }, + { 0x00000710, 0x0000 }, + { 0x00000711, 0x0080 }, + { 0x00000712, 0x0000 }, + { 0x00000713, 0x0080 }, + { 0x00000714, 0x0000 }, + { 0x00000715, 0x0080 }, + { 0x00000716, 0x0000 }, + { 0x00000717, 0x0080 }, + { 0x00000718, 0x0000 }, + { 0x00000719, 0x0080 }, + { 0x0000071a, 0x0000 }, + { 0x0000071b, 0x0080 }, + { 0x0000071c, 0x0000 }, + { 0x0000071d, 0x0080 }, + { 0x0000071e, 0x0000 }, + { 0x0000071f, 0x0080 }, + { 0x00000720, 0x0000 }, + { 0x00000721, 0x0080 }, + { 0x00000722, 0x0000 }, + { 0x00000723, 0x0080 }, + { 0x00000724, 0x0000 }, + { 0x00000725, 0x0080 }, + { 0x00000726, 0x0000 }, + { 0x00000727, 0x0080 }, + { 0x00000728, 0x0000 }, + { 0x00000729, 0x0080 }, + { 0x0000072a, 0x0000 }, + { 0x0000072b, 0x0080 }, + { 0x0000072c, 0x0000 }, + { 0x0000072d, 0x0080 }, + { 0x0000072e, 0x0000 }, + { 0x0000072f, 0x0080 }, + { 0x00000730, 0x0000 }, + { 0x00000731, 0x0080 }, + { 0x00000732, 0x0000 }, + { 0x00000733, 0x0080 }, + { 0x00000734, 0x0000 }, + { 0x00000735, 0x0080 }, + { 0x00000736, 0x0000 }, + { 0x00000737, 0x0080 }, + { 0x00000738, 0x0000 }, + { 0x00000739, 0x0080 }, + { 0x0000073a, 0x0000 }, + { 0x0000073b, 0x0080 }, + { 0x0000073c, 0x0000 }, + { 0x0000073d, 0x0080 }, + { 0x0000073e, 0x0000 }, + { 0x0000073f, 0x0080 }, + { 0x00000740, 0x0000 }, + { 0x00000741, 0x0080 }, + { 0x00000742, 0x0000 }, + { 0x00000743, 0x0080 }, + { 0x00000744, 0x0000 }, + { 0x00000745, 0x0080 }, + { 0x00000746, 0x0000 }, + { 0x00000747, 0x0080 }, + { 0x00000748, 0x0000 }, + { 0x00000749, 0x0080 }, + { 0x0000074a, 0x0000 }, + { 0x0000074b, 0x0080 }, + { 0x0000074c, 0x0000 }, + { 0x0000074d, 0x0080 }, + { 0x0000074e, 0x0000 }, + { 0x0000074f, 0x0080 }, + { 0x00000750, 0x0000 }, + { 0x00000751, 0x0080 }, + { 0x00000752, 0x0000 }, + { 0x00000753, 0x0080 }, + { 0x00000754, 0x0000 }, + { 0x00000755, 0x0080 }, + { 0x00000756, 0x0000 }, + { 0x00000757, 0x0080 }, + { 0x00000758, 0x0000 }, + { 0x00000759, 0x0080 }, + { 0x0000075a, 0x0000 }, + { 0x0000075b, 0x0080 }, + { 0x0000075c, 0x0000 }, + { 0x0000075d, 0x0080 }, + { 0x0000075e, 0x0000 }, + { 0x0000075f, 0x0080 }, + { 0x00000760, 0x0000 }, + { 0x00000761, 0x0080 }, + { 0x00000762, 0x0000 }, + { 0x00000763, 0x0080 }, + { 0x00000764, 0x0000 }, + { 0x00000765, 0x0080 }, + { 0x00000766, 0x0000 }, + { 0x00000767, 0x0080 }, + { 0x00000768, 0x0000 }, + { 0x00000769, 0x0080 }, + { 0x0000076a, 0x0000 }, + { 0x0000076b, 0x0080 }, + { 0x0000076c, 0x0000 }, + { 0x0000076d, 0x0080 }, + { 0x0000076e, 0x0000 }, + { 0x0000076f, 0x0080 }, + { 0x00000780, 0x0000 }, + { 0x00000781, 0x0080 }, + { 0x00000782, 0x0000 }, + { 0x00000783, 0x0080 }, + { 0x00000784, 0x0000 }, + { 0x00000785, 0x0080 }, + { 0x00000786, 0x0000 }, + { 0x00000787, 0x0080 }, + { 0x00000788, 0x0000 }, + { 0x00000789, 0x0080 }, + { 0x0000078a, 0x0000 }, + { 0x0000078b, 0x0080 }, + { 0x0000078c, 0x0000 }, + { 0x0000078d, 0x0080 }, + { 0x0000078e, 0x0000 }, + { 0x0000078f, 0x0080 }, + { 0x000007a0, 0x0000 }, /* R1952 - AIF4TX1MIX Input 1 Source */ + { 0x000007a1, 0x0080 }, /* R1953 - AIF4TX1MIX Input 1 Volume */ + { 0x000007a2, 0x0000 }, /* R1954 - AIF4TX1MIX Input 2 Source */ + { 0x000007a3, 0x0080 }, /* R1955 - AIF4TX1MIX Input 2 Volume */ + { 0x000007a4, 0x0000 }, /* R1956 - AIF4TX1MIX Input 3 Source */ + { 0x000007a5, 0x0080 }, /* R1957 - AIF4TX1MIX Input 3 Volume */ + { 0x000007a6, 0x0000 }, /* R1958 - AIF4TX1MIX Input 4 Source */ + { 0x000007a7, 0x0080 }, /* R1959 - AIF4TX1MIX Input 4 Volume */ + { 0x000007a8, 0x0000 }, /* R1960 - AIF4TX2MIX Input 1 Source */ + { 0x000007a9, 0x0080 }, /* R1961 - AIF4TX2MIX Input 1 Volume */ + { 0x000007aa, 0x0000 }, /* R1962 - AIF4TX2MIX Input 2 Source */ + { 0x000007ab, 0x0080 }, /* R1963 - AIF4TX2MIX Input 2 Volume */ + { 0x000007ac, 0x0000 }, /* R1964 - AIF4TX2MIX Input 3 Source */ + { 0x000007ad, 0x0080 }, /* R1965 - AIF4TX2MIX Input 3 Volume */ + { 0x000007ae, 0x0000 }, /* R1966 - AIF4TX2MIX Input 4 Source */ + { 0x000007af, 0x0080 }, /* R1967 - AIF4TX2MIX Input 4 Volume */ + { 0x000007c0, 0x0000 }, + { 0x000007c1, 0x0080 }, + { 0x000007c2, 0x0000 }, + { 0x000007c3, 0x0080 }, + { 0x000007c4, 0x0000 }, + { 0x000007c5, 0x0080 }, + { 0x000007c6, 0x0000 }, + { 0x000007c7, 0x0080 }, + { 0x000007c8, 0x0000 }, + { 0x000007c9, 0x0080 }, + { 0x000007ca, 0x0000 }, + { 0x000007cb, 0x0080 }, + { 0x000007cc, 0x0000 }, + { 0x000007cd, 0x0080 }, + { 0x000007ce, 0x0000 }, + { 0x000007cf, 0x0080 }, + { 0x000007d0, 0x0000 }, + { 0x000007d1, 0x0080 }, + { 0x000007d2, 0x0000 }, + { 0x000007d3, 0x0080 }, + { 0x000007d4, 0x0000 }, + { 0x000007d5, 0x0080 }, + { 0x000007d6, 0x0000 }, + { 0x000007d7, 0x0080 }, + { 0x000007d8, 0x0000 }, + { 0x000007d9, 0x0080 }, + { 0x000007da, 0x0000 }, + { 0x000007db, 0x0080 }, + { 0x000007dc, 0x0000 }, + { 0x000007dd, 0x0080 }, + { 0x000007de, 0x0000 }, + { 0x000007df, 0x0080 }, + { 0x000007e0, 0x0000 }, + { 0x000007e1, 0x0080 }, + { 0x000007e2, 0x0000 }, + { 0x000007e3, 0x0080 }, + { 0x000007e4, 0x0000 }, + { 0x000007e5, 0x0080 }, + { 0x000007e6, 0x0000 }, + { 0x000007e7, 0x0080 }, + { 0x000007e8, 0x0000 }, + { 0x000007e9, 0x0080 }, + { 0x000007ea, 0x0000 }, + { 0x000007eb, 0x0080 }, + { 0x000007ec, 0x0000 }, + { 0x000007ed, 0x0080 }, + { 0x000007ee, 0x0000 }, + { 0x000007ef, 0x0080 }, + { 0x000007f0, 0x0000 }, + { 0x000007f1, 0x0080 }, + { 0x000007f2, 0x0000 }, + { 0x000007f3, 0x0080 }, + { 0x000007f4, 0x0000 }, + { 0x000007f5, 0x0080 }, + { 0x000007f6, 0x0000 }, + { 0x000007f7, 0x0080 }, + { 0x000007f8, 0x0000 }, + { 0x000007f9, 0x0080 }, + { 0x000007fa, 0x0000 }, + { 0x000007fb, 0x0080 }, + { 0x000007fc, 0x0000 }, + { 0x000007fd, 0x0080 }, + { 0x000007fe, 0x0000 }, + { 0x000007ff, 0x0080 }, + { 0x00000880, 0x0000 }, + { 0x00000881, 0x0080 }, + { 0x00000882, 0x0000 }, + { 0x00000883, 0x0080 }, + { 0x00000884, 0x0000 }, + { 0x00000885, 0x0080 }, + { 0x00000886, 0x0000 }, + { 0x00000887, 0x0080 }, + { 0x00000888, 0x0000 }, + { 0x00000889, 0x0080 }, + { 0x0000088a, 0x0000 }, + { 0x0000088b, 0x0080 }, + { 0x0000088c, 0x0000 }, + { 0x0000088d, 0x0080 }, + { 0x0000088e, 0x0000 }, + { 0x0000088f, 0x0080 }, + { 0x00000890, 0x0000 }, + { 0x00000891, 0x0080 }, + { 0x00000892, 0x0000 }, + { 0x00000893, 0x0080 }, + { 0x00000894, 0x0000 }, + { 0x00000895, 0x0080 }, + { 0x00000896, 0x0000 }, + { 0x00000897, 0x0080 }, + { 0x00000898, 0x0000 }, + { 0x00000899, 0x0080 }, + { 0x0000089a, 0x0000 }, + { 0x0000089b, 0x0080 }, + { 0x0000089c, 0x0000 }, + { 0x0000089d, 0x0080 }, + { 0x0000089e, 0x0000 }, + { 0x0000089f, 0x0080 }, + { 0x000008c0, 0x0000 }, + { 0x000008c1, 0x0080 }, + { 0x000008c2, 0x0000 }, + { 0x000008c3, 0x0080 }, + { 0x000008c4, 0x0000 }, + { 0x000008c5, 0x0080 }, + { 0x000008c6, 0x0000 }, + { 0x000008c7, 0x0080 }, + { 0x000008c8, 0x0000 }, + { 0x000008c9, 0x0080 }, + { 0x000008ca, 0x0000 }, + { 0x000008cb, 0x0080 }, + { 0x000008cc, 0x0000 }, + { 0x000008cd, 0x0080 }, + { 0x000008ce, 0x0000 }, + { 0x000008cf, 0x0080 }, + { 0x000008d0, 0x0000 }, + { 0x000008d1, 0x0080 }, + { 0x000008d2, 0x0000 }, + { 0x000008d3, 0x0080 }, + { 0x000008d4, 0x0000 }, + { 0x000008d5, 0x0080 }, + { 0x000008d6, 0x0000 }, + { 0x000008d7, 0x0080 }, + { 0x000008d8, 0x0000 }, + { 0x000008d9, 0x0080 }, + { 0x000008da, 0x0000 }, + { 0x000008db, 0x0080 }, + { 0x000008dc, 0x0000 }, + { 0x000008dd, 0x0080 }, + { 0x000008de, 0x0000 }, + { 0x000008df, 0x0080 }, + { 0x00000900, 0x0000 }, + { 0x00000901, 0x0080 }, + { 0x00000902, 0x0000 }, + { 0x00000903, 0x0080 }, + { 0x00000904, 0x0000 }, + { 0x00000905, 0x0080 }, + { 0x00000906, 0x0000 }, + { 0x00000907, 0x0080 }, + { 0x00000908, 0x0000 }, + { 0x00000909, 0x0080 }, + { 0x0000090a, 0x0000 }, + { 0x0000090b, 0x0080 }, + { 0x0000090c, 0x0000 }, + { 0x0000090d, 0x0080 }, + { 0x0000090e, 0x0000 }, + { 0x0000090f, 0x0080 }, + { 0x00000910, 0x0000 }, + { 0x00000911, 0x0080 }, + { 0x00000912, 0x0000 }, + { 0x00000913, 0x0080 }, + { 0x00000914, 0x0000 }, + { 0x00000915, 0x0080 }, + { 0x00000916, 0x0000 }, + { 0x00000917, 0x0080 }, + { 0x00000918, 0x0000 }, + { 0x00000919, 0x0080 }, + { 0x0000091a, 0x0000 }, + { 0x0000091b, 0x0080 }, + { 0x0000091c, 0x0000 }, + { 0x0000091d, 0x0080 }, + { 0x0000091e, 0x0000 }, + { 0x0000091f, 0x0080 }, + { 0x00000940, 0x0000 }, + { 0x00000941, 0x0080 }, + { 0x00000942, 0x0000 }, + { 0x00000943, 0x0080 }, + { 0x00000944, 0x0000 }, + { 0x00000945, 0x0080 }, + { 0x00000946, 0x0000 }, + { 0x00000947, 0x0080 }, + { 0x00000948, 0x0000 }, + { 0x00000949, 0x0080 }, + { 0x0000094a, 0x0000 }, + { 0x0000094b, 0x0080 }, + { 0x0000094c, 0x0000 }, + { 0x0000094d, 0x0080 }, + { 0x0000094e, 0x0000 }, + { 0x0000094f, 0x0080 }, + { 0x00000950, 0x0000 }, + { 0x00000958, 0x0000 }, + { 0x00000960, 0x0000 }, + { 0x00000968, 0x0000 }, + { 0x00000970, 0x0000 }, + { 0x00000978, 0x0000 }, + { 0x00000980, 0x0000 }, + { 0x00000981, 0x0080 }, + { 0x00000982, 0x0000 }, + { 0x00000983, 0x0080 }, + { 0x00000984, 0x0000 }, + { 0x00000985, 0x0080 }, + { 0x00000986, 0x0000 }, + { 0x00000987, 0x0080 }, + { 0x00000988, 0x0000 }, + { 0x00000989, 0x0080 }, + { 0x0000098a, 0x0000 }, + { 0x0000098b, 0x0080 }, + { 0x0000098c, 0x0000 }, + { 0x0000098d, 0x0080 }, + { 0x0000098e, 0x0000 }, + { 0x0000098f, 0x0080 }, + { 0x00000990, 0x0000 }, + { 0x00000998, 0x0000 }, + { 0x000009a0, 0x0000 }, + { 0x000009a8, 0x0000 }, + { 0x000009b0, 0x0000 }, + { 0x000009b8, 0x0000 }, + { 0x000009c0, 0x0000 }, + { 0x000009c1, 0x0080 }, + { 0x000009c2, 0x0000 }, + { 0x000009c3, 0x0080 }, + { 0x000009c4, 0x0000 }, + { 0x000009c5, 0x0080 }, + { 0x000009c6, 0x0000 }, + { 0x000009c7, 0x0080 }, + { 0x000009c8, 0x0000 }, + { 0x000009c9, 0x0080 }, + { 0x000009ca, 0x0000 }, + { 0x000009cb, 0x0080 }, + { 0x000009cc, 0x0000 }, + { 0x000009cd, 0x0080 }, + { 0x000009ce, 0x0000 }, + { 0x000009cf, 0x0080 }, + { 0x000009d0, 0x0000 }, + { 0x000009d8, 0x0000 }, + { 0x000009e0, 0x0000 }, + { 0x000009e8, 0x0000 }, + { 0x000009f0, 0x0000 }, + { 0x000009f8, 0x0000 }, + { 0x00000a00, 0x0000 }, + { 0x00000a01, 0x0080 }, + { 0x00000a02, 0x0000 }, + { 0x00000a03, 0x0080 }, + { 0x00000a04, 0x0000 }, + { 0x00000a05, 0x0080 }, + { 0x00000a06, 0x0000 }, + { 0x00000a07, 0x0080 }, + { 0x00000a08, 0x0000 }, + { 0x00000a09, 0x0080 }, + { 0x00000a0a, 0x0000 }, + { 0x00000a0b, 0x0080 }, + { 0x00000a0c, 0x0000 }, + { 0x00000a0d, 0x0080 }, + { 0x00000a0e, 0x0000 }, + { 0x00000a0f, 0x0080 }, + { 0x00000a10, 0x0000 }, + { 0x00000a18, 0x0000 }, + { 0x00000a20, 0x0000 }, + { 0x00000a28, 0x0000 }, + { 0x00000a30, 0x0000 }, + { 0x00000a38, 0x0000 }, + { 0x00000a40, 0x0000 }, + { 0x00000a41, 0x0080 }, + { 0x00000a42, 0x0000 }, + { 0x00000a43, 0x0080 }, + { 0x00000a44, 0x0000 }, + { 0x00000a45, 0x0080 }, + { 0x00000a46, 0x0000 }, + { 0x00000a47, 0x0080 }, + { 0x00000a48, 0x0000 }, + { 0x00000a49, 0x0080 }, + { 0x00000a4a, 0x0000 }, + { 0x00000a4b, 0x0080 }, + { 0x00000a4c, 0x0000 }, + { 0x00000a4d, 0x0080 }, + { 0x00000a4e, 0x0000 }, + { 0x00000a4f, 0x0080 }, + { 0x00000a50, 0x0000 }, + { 0x00000a58, 0x0000 }, + { 0x00000a60, 0x0000 }, + { 0x00000a68, 0x0000 }, + { 0x00000a70, 0x0000 }, + { 0x00000a78, 0x0000 }, + { 0x00000a80, 0x0000 }, + { 0x00000a88, 0x0000 }, + { 0x00000a90, 0x0000 }, + { 0x00000a98, 0x0000 }, + { 0x00000aa0, 0x0000 }, + { 0x00000aa8, 0x0000 }, + { 0x00000ab0, 0x0000 }, + { 0x00000ab8, 0x0000 }, + { 0x00000b00, 0x0000 }, + { 0x00000b08, 0x0000 }, + { 0x00000b10, 0x0000 }, + { 0x00000b18, 0x0000 }, + { 0x00000b20, 0x0000 }, + { 0x00000b28, 0x0000 }, + { 0x00000b30, 0x0000 }, + { 0x00000b38, 0x0000 }, + { 0x00000b40, 0x0000 }, + { 0x00000b48, 0x0000 }, + { 0x00000b50, 0x0000 }, + { 0x00000b58, 0x0000 }, + { 0x00000b60, 0x0000 }, + { 0x00000b68, 0x0000 }, + { 0x00000b70, 0x0000 }, + { 0x00000b78, 0x0000 }, + { 0x00000b80, 0x0000 }, + { 0x00000b88, 0x0000 }, + { 0x00000ba0, 0x0000 }, + { 0x00000ba8, 0x0000 }, + { 0x00000bc0, 0x0000 }, /* R3008 - ISRC4DEC1MIX Input 1 Source */ + { 0x00000bc8, 0x0000 }, /* R3016 - ISRC4DEC2MIX Input 1 Source */ + { 0x00000be0, 0x0000 }, /* R3040 - ISRC4INT1MIX Input 1 Source */ + { 0x00000be8, 0x0000 }, /* R3048 - ISRC4INT2MIX Input 1 Source */ + { 0x00000c00, 0x0000 }, + { 0x00000c01, 0x0080 }, + { 0x00000c02, 0x0000 }, + { 0x00000c03, 0x0080 }, + { 0x00000c04, 0x0000 }, + { 0x00000c05, 0x0080 }, + { 0x00000c06, 0x0000 }, + { 0x00000c07, 0x0080 }, + { 0x00000c08, 0x0000 }, + { 0x00000c09, 0x0080 }, + { 0x00000c0a, 0x0000 }, + { 0x00000c0b, 0x0080 }, + { 0x00000c0c, 0x0000 }, + { 0x00000c0d, 0x0080 }, + { 0x00000c0e, 0x0000 }, + { 0x00000c0f, 0x0080 }, + { 0x00000c10, 0x0000 }, /* R3088 (0xC10) - DSP6AUX1MIX Input 1 */ + { 0x00000c18, 0x0000 }, /* R3088 (0xC18) - DSP6AUX2MIX Input 1 */ + { 0x00000c20, 0x0000 }, /* R3088 (0xC20) - DSP6AUX3MIX Input 1 */ + { 0x00000c28, 0x0000 }, /* R3088 (0xC28) - DSP6AUX4MIX Input 1 */ + { 0x00000c30, 0x0000 }, /* R3088 (0xC30) - DSP6AUX5MIX Input 1 */ + { 0x00000c38, 0x0000 }, /* R3088 (0xC38) - DSP6AUX6MIX Input 1 */ + { 0x00000c40, 0x0000 }, + { 0x00000c41, 0x0080 }, + { 0x00000c42, 0x0000 }, + { 0x00000c43, 0x0080 }, + { 0x00000c44, 0x0000 }, + { 0x00000c45, 0x0080 }, + { 0x00000c46, 0x0000 }, + { 0x00000c47, 0x0080 }, + { 0x00000c48, 0x0000 }, + { 0x00000c49, 0x0080 }, + { 0x00000c4a, 0x0000 }, + { 0x00000c4b, 0x0080 }, + { 0x00000c4c, 0x0000 }, + { 0x00000c4d, 0x0080 }, + { 0x00000c4e, 0x0000 }, + { 0x00000c4f, 0x0080 }, + { 0x00000c50, 0x0000 }, + { 0x00000c58, 0x0000 }, + { 0x00000c60, 0x0000 }, + { 0x00000c68, 0x0000 }, + { 0x00000c70, 0x0000 }, + { 0x00000c78, 0x0000 }, + { 0x00000dc0, 0x0000 }, + { 0x00000dc8, 0x0000 }, + { 0x00000dd0, 0x0000 }, + { 0x00000dd8, 0x0000 }, + { 0x00000de0, 0x0000 }, + { 0x00000de8, 0x0000 }, + { 0x00000df0, 0x0000 }, + { 0x00000df8, 0x0000 }, + { 0x00000e00, 0x0000 }, /* R3584 (0xE00) - FX_Ctrl1 */ + { 0x00000e10, 0x6318 }, /* R3600 (0xE10) - EQ1_1 */ + { 0x00000e11, 0x6300 }, /* R3601 (0xE11) - EQ1_2 */ + { 0x00000e12, 0x0fc8 }, /* R3602 (0xE12) - EQ1_3 */ + { 0x00000e13, 0x03fe }, /* R3603 (0xE13) - EQ1_4 */ + { 0x00000e14, 0x00e0 }, /* R3604 (0xE14) - EQ1_5 */ + { 0x00000e15, 0x1ec4 }, /* R3605 (0xE15) - EQ1_6 */ + { 0x00000e16, 0xf136 }, /* R3606 (0xE16) - EQ1_7 */ + { 0x00000e17, 0x0409 }, /* R3607 (0xE17) - EQ1_8 */ + { 0x00000e18, 0x04cc }, /* R3608 (0xE18) - EQ1_9 */ + { 0x00000e19, 0x1c9b }, /* R3609 (0xE19) - EQ1_10 */ + { 0x00000e1a, 0xf337 }, /* R3610 (0xE1A) - EQ1_11 */ + { 0x00000e1b, 0x040b }, /* R3611 (0xE1B) - EQ1_12 */ + { 0x00000e1c, 0x0cbb }, /* R3612 (0xE1C) - EQ1_13 */ + { 0x00000e1d, 0x16f8 }, /* R3613 (0xE1D) - EQ1_14 */ + { 0x00000e1e, 0xf7d9 }, /* R3614 (0xE1E) - EQ1_15 */ + { 0x00000e1f, 0x040a }, /* R3615 (0xE1F) - EQ1_16 */ + { 0x00000e20, 0x1f14 }, /* R3616 (0xE20) - EQ1_17 */ + { 0x00000e21, 0x058c }, /* R3617 (0xE21) - EQ1_18 */ + { 0x00000e22, 0x0563 }, /* R3618 (0xE22) - EQ1_19 */ + { 0x00000e23, 0x4000 }, /* R3619 (0xE23) - EQ1_20 */ + { 0x00000e24, 0x0b75 }, /* R3620 (0xE24) - EQ1_21 */ + { 0x00000e26, 0x6318 }, /* R3622 (0xE26) - EQ2_1 */ + { 0x00000e27, 0x6300 }, /* R3623 (0xE27) - EQ2_2 */ + { 0x00000e28, 0x0fc8 }, /* R3624 (0xE28) - EQ2_3 */ + { 0x00000e29, 0x03fe }, /* R3625 (0xE29) - EQ2_4 */ + { 0x00000e2a, 0x00e0 }, /* R3626 (0xE2A) - EQ2_5 */ + { 0x00000e2b, 0x1ec4 }, /* R3627 (0xE2B) - EQ2_6 */ + { 0x00000e2c, 0xf136 }, /* R3628 (0xE2C) - EQ2_7 */ + { 0x00000e2d, 0x0409 }, /* R3629 (0xE2D) - EQ2_8 */ + { 0x00000e2e, 0x04cc }, /* R3630 (0xE2E) - EQ2_9 */ + { 0x00000e2f, 0x1c9b }, /* R3631 (0xE2F) - EQ2_10 */ + { 0x00000e30, 0xf337 }, /* R3632 (0xE30) - EQ2_11 */ + { 0x00000e31, 0x040b }, /* R3633 (0xE31) - EQ2_12 */ + { 0x00000e32, 0x0cbb }, /* R3634 (0xE32) - EQ2_13 */ + { 0x00000e33, 0x16f8 }, /* R3635 (0xE33) - EQ2_14 */ + { 0x00000e34, 0xf7d9 }, /* R3636 (0xE34) - EQ2_15 */ + { 0x00000e35, 0x040a }, /* R3637 (0xE35) - EQ2_16 */ + { 0x00000e36, 0x1f14 }, /* R3638 (0xE36) - EQ2_17 */ + { 0x00000e37, 0x058c }, /* R3639 (0xE37) - EQ2_18 */ + { 0x00000e38, 0x0563 }, /* R3640 (0xE38) - EQ2_19 */ + { 0x00000e39, 0x4000 }, /* R3641 (0xE39) - EQ2_20 */ + { 0x00000e3a, 0x0b75 }, /* R3642 (0xE3A) - EQ2_21 */ + { 0x00000e3c, 0x6318 }, /* R3644 (0xE3C) - EQ3_1 */ + { 0x00000e3d, 0x6300 }, /* R3645 (0xE3D) - EQ3_2 */ + { 0x00000e3e, 0x0fc8 }, /* R3646 (0xE3E) - EQ3_3 */ + { 0x00000e3f, 0x03fe }, /* R3647 (0xE3F) - EQ3_4 */ + { 0x00000e40, 0x00e0 }, /* R3648 (0xE40) - EQ3_5 */ + { 0x00000e41, 0x1ec4 }, /* R3649 (0xE41) - EQ3_6 */ + { 0x00000e42, 0xf136 }, /* R3650 (0xE42) - EQ3_7 */ + { 0x00000e43, 0x0409 }, /* R3651 (0xE43) - EQ3_8 */ + { 0x00000e44, 0x04cc }, /* R3652 (0xE44) - EQ3_9 */ + { 0x00000e45, 0x1c9b }, /* R3653 (0xE45) - EQ3_10 */ + { 0x00000e46, 0xf337 }, /* R3654 (0xE46) - EQ3_11 */ + { 0x00000e47, 0x040b }, /* R3655 (0xE47) - EQ3_12 */ + { 0x00000e48, 0x0cbb }, /* R3656 (0xE48) - EQ3_13 */ + { 0x00000e49, 0x16f8 }, /* R3657 (0xE49) - EQ3_14 */ + { 0x00000e4a, 0xf7d9 }, /* R3658 (0xE4A) - EQ3_15 */ + { 0x00000e4b, 0x040a }, /* R3659 (0xE4B) - EQ3_16 */ + { 0x00000e4c, 0x1f14 }, /* R3660 (0xE4C) - EQ3_17 */ + { 0x00000e4d, 0x058c }, /* R3661 (0xE4D) - EQ3_18 */ + { 0x00000e4e, 0x0563 }, /* R3662 (0xE4E) - EQ3_19 */ + { 0x00000e4f, 0x4000 }, /* R3663 (0xE4F) - EQ3_20 */ + { 0x00000e50, 0x0b75 }, /* R3664 (0xE50) - EQ3_21 */ + { 0x00000e52, 0x6318 }, /* R3666 (0xE52) - EQ4_1 */ + { 0x00000e53, 0x6300 }, /* R3667 (0xE53) - EQ4_2 */ + { 0x00000e54, 0x0fc8 }, /* R3668 (0xE54) - EQ4_3 */ + { 0x00000e55, 0x03fe }, /* R3669 (0xE55) - EQ4_4 */ + { 0x00000e56, 0x00e0 }, /* R3670 (0xE56) - EQ4_5 */ + { 0x00000e57, 0x1ec4 }, /* R3671 (0xE57) - EQ4_6 */ + { 0x00000e58, 0xf136 }, /* R3672 (0xE58) - EQ4_7 */ + { 0x00000e59, 0x0409 }, /* R3673 (0xE59) - EQ4_8 */ + { 0x00000e5a, 0x04cc }, /* R3674 (0xE5A) - EQ4_9 */ + { 0x00000e5b, 0x1c9b }, /* R3675 (0xE5B) - EQ4_10 */ + { 0x00000e5c, 0xf337 }, /* R3676 (0xE5C) - EQ4_11 */ + { 0x00000e5d, 0x040b }, /* R3677 (0xE5D) - EQ4_12 */ + { 0x00000e5e, 0x0cbb }, /* R3678 (0xE5E) - EQ4_13 */ + { 0x00000e5f, 0x16f8 }, /* R3679 (0xE5F) - EQ4_14 */ + { 0x00000e60, 0xf7d9 }, /* R3680 (0xE60) - EQ4_15 */ + { 0x00000e61, 0x040a }, /* R3681 (0xE61) - EQ4_16 */ + { 0x00000e62, 0x1f14 }, /* R3682 (0xE62) - EQ4_17 */ + { 0x00000e63, 0x058c }, /* R3683 (0xE63) - EQ4_18 */ + { 0x00000e64, 0x0563 }, /* R3684 (0xE64) - EQ4_19 */ + { 0x00000e65, 0x4000 }, /* R3685 (0xE65) - EQ4_20 */ + { 0x00000e66, 0x0b75 }, /* R3686 (0xE66) - EQ4_21 */ + { 0x00000e80, 0x0018 }, /* R3712 (0xE80) - DRC1 ctrl1 */ + { 0x00000e81, 0x0933 }, /* R3713 (0xE81) - DRC1 ctrl2 */ + { 0x00000e82, 0x0018 }, /* R3714 (0xE82) - DRC1 ctrl3 */ + { 0x00000e83, 0x0000 }, /* R3715 (0xE83) - DRC1 ctrl4 */ + { 0x00000e84, 0x0000 }, /* R3716 (0xE84) - DRC1 ctrl5 */ + { 0x00000e88, 0x0018 }, /* R3720 (0xE88) - DRC2 ctrl1 */ + { 0x00000e89, 0x0933 }, /* R3721 (0xE89) - DRC2 ctrl2 */ + { 0x00000e8a, 0x0018 }, /* R3722 (0xE8A) - DRC2 ctrl3 */ + { 0x00000e8b, 0x0000 }, /* R3723 (0xE8B) - DRC2 ctrl4 */ + { 0x00000e8c, 0x0000 }, /* R3724 (0xE8C) - DRC2 ctrl5 */ + { 0x00000ec0, 0x0000 }, /* R3776 (0xEC0) - HPLPF1_1 */ + { 0x00000ec1, 0x0000 }, /* R3777 (0xEC1) - HPLPF1_2 */ + { 0x00000ec4, 0x0000 }, /* R3780 (0xEC4) - HPLPF2_1 */ + { 0x00000ec5, 0x0000 }, /* R3781 (0xEC5) - HPLPF2_2 */ + { 0x00000ec8, 0x0000 }, /* R3784 (0xEC8) - HPLPF3_1 */ + { 0x00000ec9, 0x0000 }, /* R3785 (0xEC9) - HPLPF3_2 */ + { 0x00000ecc, 0x0000 }, /* R3788 (0xECC) - HPLPF4_1 */ + { 0x00000ecd, 0x0000 }, /* R3789 (0xECD) - HPLPF4_2 */ + { 0x00000ed0, 0x0000 }, /* R3792 (0xED0) - ASRC2_ENABLE */ + { 0x00000ed2, 0x0000 }, /* R3794 (0xED2) - ASRC2_RATE1 */ + { 0x00000ed3, 0x4000 }, /* R3795 (0xED3) - ASRC2_RATE2 */ + { 0x00000ee0, 0x0000 }, /* R3808 (0xEE0) - ASRC1_ENABLE */ + { 0x00000ee2, 0x0000 }, /* R3810 (0xEE2) - ASRC1_RATE1 */ + { 0x00000ee3, 0x4000 }, /* R3811 (0xEE3) - ASRC1_RATE2 */ + { 0x00000ef0, 0x0000 }, /* R3824 (0xEF0) - ISRC 1 CTRL 1 */ + { 0x00000ef1, 0x0001 }, /* R3825 (0xEF1) - ISRC 1 CTRL 2 */ + { 0x00000ef2, 0x0000 }, /* R3826 (0xEF2) - ISRC 1 CTRL 3 */ + { 0x00000ef3, 0x0000 }, /* R3827 (0xEF3) - ISRC 2 CTRL 1 */ + { 0x00000ef4, 0x0001 }, /* R3828 (0xEF4) - ISRC 2 CTRL 2 */ + { 0x00000ef5, 0x0000 }, /* R3829 (0xEF5) - ISRC 2 CTRL 3 */ + { 0x00000ef6, 0x0000 }, /* R3830 (0xEF6) - ISRC 3 CTRL 1 */ + { 0x00000ef7, 0x0001 }, /* R3831 (0xEF7) - ISRC 3 CTRL 2 */ + { 0x00000ef8, 0x0000 }, /* R3832 (0xEF8) - ISRC 3 CTRL 3 */ + { 0x00000ef9, 0x0000 }, /* R3833 - ISRC 4 CTRL 1 */ + { 0x00000efa, 0x0001 }, /* R3834 - ISRC 4 CTRL 2 */ + { 0x00000efb, 0x0000 }, /* R3835 - ISRC 4 CTRL 3 */ + { 0x00000f00, 0x0000 }, /* R3840 (0xF00) - Clock Control */ + { 0x00000F01, 0x0000 }, /* R3841 - ANC_SRC */ + { 0x00000F02, 0x0000 }, /* R3842 - Arizona DSP Status */ + { 0x00000F08, 0x001c }, /* R3848 - ANC Coefficient */ + { 0x00000F09, 0x0000 }, /* R3849 - ANC Coefficient */ + { 0x00000F0A, 0x0000 }, /* R3850 - ANC Coefficient */ + { 0x00000F0B, 0x0000 }, /* R3851 - ANC Coefficient */ + { 0x00000F0C, 0x0000 }, /* R3852 - ANC Coefficient */ + { 0x00000F0D, 0x0000 }, /* R3853 - ANC Coefficient */ + { 0x00000F0E, 0x0000 }, /* R3854 - ANC Coefficient */ + { 0x00000F0F, 0x0000 }, /* R3855 - ANC Coefficient */ + { 0x00000F10, 0x0000 }, /* R3856 - ANC Coefficient */ + { 0x00000F11, 0x0000 }, /* R3857 - ANC Coefficient */ + { 0x00000F12, 0x0000 }, /* R3858 - ANC Coefficient */ + { 0x00000F15, 0x0000 }, /* R3861 - FCL Filter Control */ + { 0x00000F17, 0x0004 }, /* R3863 - FCL ADC Reformatter Control */ + { 0x00000F18, 0x0004 }, /* R3864 - ANC Coefficient */ + { 0x00000F19, 0x0002 }, /* R3865 - ANC Coefficient */ + { 0x00000F1A, 0x0000 }, /* R3866 - ANC Coefficient */ + { 0x00000F1B, 0x0010 }, /* R3867 - ANC Coefficient */ + { 0x00000F1C, 0x0000 }, /* R3868 - ANC Coefficient */ + { 0x00000F1D, 0x0000 }, /* R3869 - ANC Coefficient */ + { 0x00000F1E, 0x0000 }, /* R3870 - ANC Coefficient */ + { 0x00000F1F, 0x0000 }, /* R3871 - ANC Coefficient */ + { 0x00000F20, 0x0000 }, /* R3872 - ANC Coefficient */ + { 0x00000F21, 0x0000 }, /* R3873 - ANC Coefficient */ + { 0x00000F22, 0x0000 }, /* R3874 - ANC Coefficient */ + { 0x00000F23, 0x0000 }, /* R3875 - ANC Coefficient */ + { 0x00000F24, 0x0000 }, /* R3876 - ANC Coefficient */ + { 0x00000F25, 0x0000 }, /* R3877 - ANC Coefficient */ + { 0x00000F26, 0x0000 }, /* R3878 - ANC Coefficient */ + { 0x00000F27, 0x0000 }, /* R3879 - ANC Coefficient */ + { 0x00000F28, 0x0000 }, /* R3880 - ANC Coefficient */ + { 0x00000F29, 0x0000 }, /* R3881 - ANC Coefficient */ + { 0x00000F2A, 0x0000 }, /* R3882 - ANC Coefficient */ + { 0x00000F2B, 0x0000 }, /* R3883 - ANC Coefficient */ + { 0x00000F2C, 0x0000 }, /* R3884 - ANC Coefficient */ + { 0x00000F2D, 0x0000 }, /* R3885 - ANC Coefficient */ + { 0x00000F2E, 0x0000 }, /* R3886 - ANC Coefficient */ + { 0x00000F2F, 0x0000 }, /* R3887 - ANC Coefficient */ + { 0x00000F30, 0x0000 }, /* R3888 - ANC Coefficient */ + { 0x00000F31, 0x0000 }, /* R3889 - ANC Coefficient */ + { 0x00000F32, 0x0000 }, /* R3890 - ANC Coefficient */ + { 0x00000F33, 0x0000 }, /* R3891 - ANC Coefficient */ + { 0x00000F34, 0x0000 }, /* R3892 - ANC Coefficient */ + { 0x00000F35, 0x0000 }, /* R3893 - ANC Coefficient */ + { 0x00000F36, 0x0000 }, /* R3894 - ANC Coefficient */ + { 0x00000F37, 0x0000 }, /* R3895 - ANC Coefficient */ + { 0x00000F38, 0x0000 }, /* R3896 - ANC Coefficient */ + { 0x00000F39, 0x0000 }, /* R3897 - ANC Coefficient */ + { 0x00000F3A, 0x0000 }, /* R3898 - ANC Coefficient */ + { 0x00000F3B, 0x0000 }, /* R3899 - ANC Coefficient */ + { 0x00000F3C, 0x0000 }, /* R3900 - ANC Coefficient */ + { 0x00000F3D, 0x0000 }, /* R3901 - ANC Coefficient */ + { 0x00000F3E, 0x0000 }, /* R3902 - ANC Coefficient */ + { 0x00000F3F, 0x0000 }, /* R3903 - ANC Coefficient */ + { 0x00000F40, 0x0000 }, /* R3904 - ANC Coefficient */ + { 0x00000F41, 0x0000 }, /* R3905 - ANC Coefficient */ + { 0x00000F42, 0x0000 }, /* R3906 - ANC Coefficient */ + { 0x00000F43, 0x0000 }, /* R3907 - ANC Coefficient */ + { 0x00000F44, 0x0000 }, /* R3908 - ANC Coefficient */ + { 0x00000F45, 0x0000 }, /* R3909 - ANC Coefficient */ + { 0x00000F46, 0x0000 }, /* R3910 - ANC Coefficient */ + { 0x00000F47, 0x0000 }, /* R3911 - ANC Coefficient */ + { 0x00000F48, 0x0000 }, /* R3912 - ANC Coefficient */ + { 0x00000F49, 0x0000 }, /* R3913 - ANC Coefficient */ + { 0x00000F4A, 0x0000 }, /* R3914 - ANC Coefficient */ + { 0x00000F4B, 0x0000 }, /* R3915 - ANC Coefficient */ + { 0x00000F4C, 0x0000 }, /* R3916 - ANC Coefficient */ + { 0x00000F4D, 0x0000 }, /* R3917 - ANC Coefficient */ + { 0x00000F4E, 0x0000 }, /* R3918 - ANC Coefficient */ + { 0x00000F4F, 0x0000 }, /* R3919 - ANC Coefficient */ + { 0x00000F50, 0x0000 }, /* R3920 - ANC Coefficient */ + { 0x00000F51, 0x0000 }, /* R3921 - ANC Coefficient */ + { 0x00000F52, 0x0000 }, /* R3922 - ANC Coefficient */ + { 0x00000F53, 0x0000 }, /* R3923 - ANC Coefficient */ + { 0x00000F54, 0x0000 }, /* R3924 - ANC Coefficient */ + { 0x00000F55, 0x0000 }, /* R3925 - ANC Coefficient */ + { 0x00000F56, 0x0000 }, /* R3926 - ANC Coefficient */ + { 0x00000F57, 0x0000 }, /* R3927 - ANC Coefficient */ + { 0x00000F58, 0x0000 }, /* R3928 - ANC Coefficient */ + { 0x00000F59, 0x0000 }, /* R3929 - ANC Coefficient */ + { 0x00000F5A, 0x0000 }, /* R3930 - ANC Coefficient */ + { 0x00000F5B, 0x0000 }, /* R3931 - ANC Coefficient */ + { 0x00000F5C, 0x0000 }, /* R3932 - ANC Coefficient */ + { 0x00000F5D, 0x0000 }, /* R3933 - ANC Coefficient */ + { 0x00000F5E, 0x0000 }, /* R3934 - ANC Coefficient */ + { 0x00000F5F, 0x0000 }, /* R3935 - ANC Coefficient */ + { 0x00000F60, 0x0000 }, /* R3936 - ANC Coefficient */ + { 0x00000F61, 0x0000 }, /* R3937 - ANC Coefficient */ + { 0x00000F62, 0x0000 }, /* R3938 - ANC Coefficient */ + { 0x00000F63, 0x0000 }, /* R3939 - ANC Coefficient */ + { 0x00000F64, 0x0000 }, /* R3940 - ANC Coefficient */ + { 0x00000F65, 0x0000 }, /* R3941 - ANC Coefficient */ + { 0x00000F66, 0x0000 }, /* R3942 - ANC Coefficient */ + { 0x00000F67, 0x0000 }, /* R3943 - ANC Coefficient */ + { 0x00000F68, 0x0000 }, /* R3944 - ANC Coefficient */ + { 0x00000F69, 0x0000 }, /* R3945 - ANC Coefficient */ + { 0x00000F71, 0x0000 }, /* R3953 - FCR Filter Control */ + { 0x00000F73, 0x0004 }, /* R3955 - FCR ADC Reformatter Control */ + { 0x00000F74, 0x0004 }, /* R3956 - ANC Coefficient */ + { 0x00000F75, 0x0002 }, /* R3957 - ANC Coefficient */ + { 0x00000F76, 0x0000 }, /* R3958 - ANC Coefficient */ + { 0x00000F77, 0x0010 }, /* R3959 - ANC Coefficient */ + { 0x00000F78, 0x0000 }, /* R3960 - ANC Coefficient */ + { 0x00000F79, 0x0000 }, /* R3961 - ANC Coefficient */ + { 0x00000F7A, 0x0000 }, /* R3962 - ANC Coefficient */ + { 0x00000F7B, 0x0000 }, /* R3963 - ANC Coefficient */ + { 0x00000F7C, 0x0000 }, /* R3964 - ANC Coefficient */ + { 0x00000F7D, 0x0000 }, /* R3965 - ANC Coefficient */ + { 0x00000F7E, 0x0000 }, /* R3966 - ANC Coefficient */ + { 0x00000F7F, 0x0000 }, /* R3967 - ANC Coefficient */ + { 0x00000F80, 0x0000 }, /* R3968 - ANC Coefficient */ + { 0x00000F81, 0x0000 }, /* R3969 - ANC Coefficient */ + { 0x00000F82, 0x0000 }, /* R3970 - ANC Coefficient */ + { 0x00000F83, 0x0000 }, /* R3971 - ANC Coefficient */ + { 0x00000F84, 0x0000 }, /* R3972 - ANC Coefficient */ + { 0x00000F85, 0x0000 }, /* R3973 - ANC Coefficient */ + { 0x00000F86, 0x0000 }, /* R3974 - ANC Coefficient */ + { 0x00000F87, 0x0000 }, /* R3975 - ANC Coefficient */ + { 0x00000F88, 0x0000 }, /* R3976 - ANC Coefficient */ + { 0x00000F89, 0x0000 }, /* R3977 - ANC Coefficient */ + { 0x00000F8A, 0x0000 }, /* R3978 - ANC Coefficient */ + { 0x00000F8B, 0x0000 }, /* R3979 - ANC Coefficient */ + { 0x00000F8C, 0x0000 }, /* R3980 - ANC Coefficient */ + { 0x00000F8D, 0x0000 }, /* R3981 - ANC Coefficient */ + { 0x00000F8E, 0x0000 }, /* R3982 - ANC Coefficient */ + { 0x00000F8F, 0x0000 }, /* R3983 - ANC Coefficient */ + { 0x00000F90, 0x0000 }, /* R3984 - ANC Coefficient */ + { 0x00000F91, 0x0000 }, /* R3985 - ANC Coefficient */ + { 0x00000F92, 0x0000 }, /* R3986 - ANC Coefficient */ + { 0x00000F93, 0x0000 }, /* R3987 - ANC Coefficient */ + { 0x00000F94, 0x0000 }, /* R3988 - ANC Coefficient */ + { 0x00000F95, 0x0000 }, /* R3989 - ANC Coefficient */ + { 0x00000F96, 0x0000 }, /* R3990 - ANC Coefficient */ + { 0x00000F97, 0x0000 }, /* R3991 - ANC Coefficient */ + { 0x00000F98, 0x0000 }, /* R3992 - ANC Coefficient */ + { 0x00000F99, 0x0000 }, /* R3993 - ANC Coefficient */ + { 0x00000F9A, 0x0000 }, /* R3994 - ANC Coefficient */ + { 0x00000F9B, 0x0000 }, /* R3995 - ANC Coefficient */ + { 0x00000F9C, 0x0000 }, /* R3996 - ANC Coefficient */ + { 0x00000F9D, 0x0000 }, /* R3997 - ANC Coefficient */ + { 0x00000F9E, 0x0000 }, /* R3998 - ANC Coefficient */ + { 0x00000F9F, 0x0000 }, /* R3999 - ANC Coefficient */ + { 0x00000FA0, 0x0000 }, /* R4000 - ANC Coefficient */ + { 0x00000FA1, 0x0000 }, /* R4001 - ANC Coefficient */ + { 0x00000FA2, 0x0000 }, /* R4002 - ANC Coefficient */ + { 0x00000FA3, 0x0000 }, /* R4003 - ANC Coefficient */ + { 0x00000FA4, 0x0000 }, /* R4004 - ANC Coefficient */ + { 0x00000FA5, 0x0000 }, /* R4005 - ANC Coefficient */ + { 0x00000FA6, 0x0000 }, /* R4006 - ANC Coefficient */ + { 0x00000FA7, 0x0000 }, /* R4007 - ANC Coefficient */ + { 0x00000FA8, 0x0000 }, /* R4008 - ANC Coefficient */ + { 0x00000FA9, 0x0000 }, /* R4009 - ANC Coefficient */ + { 0x00000FAA, 0x0000 }, /* R4010 - ANC Coefficient */ + { 0x00000FAB, 0x0000 }, /* R4011 - ANC Coefficient */ + { 0x00000FAC, 0x0000 }, /* R4012 - ANC Coefficient */ + { 0x00000FAD, 0x0000 }, /* R4013 - ANC Coefficient */ + { 0x00000FAE, 0x0000 }, /* R4014 - ANC Coefficient */ + { 0x00000FAF, 0x0000 }, /* R4015 - ANC Coefficient */ + { 0x00000FB0, 0x0000 }, /* R4016 - ANC Coefficient */ + { 0x00000FB1, 0x0000 }, /* R4017 - ANC Coefficient */ + { 0x00000FB2, 0x0000 }, /* R4018 - ANC Coefficient */ + { 0x00000FB3, 0x0000 }, /* R4019 - ANC Coefficient */ + { 0x00000FB4, 0x0000 }, /* R4020 - ANC Coefficient */ + { 0x00000FB5, 0x0000 }, /* R4021 - ANC Coefficient */ + { 0x00000FB6, 0x0000 }, /* R4022 - ANC Coefficient */ + { 0x00000FB7, 0x0000 }, /* R4023 - ANC Coefficient */ + { 0x00000FB8, 0x0000 }, /* R4024 - ANC Coefficient */ + { 0x00000FB9, 0x0000 }, /* R4025 - ANC Coefficient */ + { 0x00000FBA, 0x0000 }, /* R4026 - ANC Coefficient */ + { 0x00000FBB, 0x0000 }, /* R4027 - ANC Coefficient */ + { 0x00000FBC, 0x0000 }, /* R4028 - ANC Coefficient */ + { 0x00000FBD, 0x0000 }, /* R4029 - ANC Coefficient */ + { 0x00000FBE, 0x0000 }, /* R4030 - ANC Coefficient */ + { 0x00000FBF, 0x0000 }, /* R4031 - ANC Coefficient */ + { 0x00000FC0, 0x0000 }, /* R4032 - ANC Coefficient */ + { 0x00000FC1, 0x0000 }, /* R4033 - ANC Coefficient */ + { 0x00000FC2, 0x0000 }, /* R4034 - ANC Coefficient */ + { 0x00000FC3, 0x0000 }, /* R4035 - ANC Coefficient */ + { 0x00000FC4, 0x0000 }, /* R4036 - ANC Coefficient */ + { 0x00000FC5, 0x0000 }, /* R4037 - ANC Coefficient */ + { 0x00001300, 0x0000 }, /* R4864 - DAC Comp 1 */ + { 0x00001302, 0x0000 }, /* R4866 - DAC Comp 2 */ + { 0x00001380, 0x0000 }, + { 0x00001381, 0x0000 }, + { 0x00001382, 0x0000 }, + { 0x00001383, 0x0000 }, + { 0x00001390, 0x0000 }, + { 0x00001391, 0x0000 }, + { 0x00001392, 0x0000 }, + { 0x00001393, 0x0000 }, + { 0x000013a0, 0x0000 }, + { 0x000013a1, 0x0000 }, + { 0x000013a2, 0x0000 }, + { 0x000013a3, 0x0000 }, + { 0x000013b0, 0x0000 }, + { 0x000013b1, 0x0000 }, + { 0x000013b2, 0x0000 }, + { 0x000013b3, 0x0000 }, + { 0x000013c0, 0x0000 }, + { 0x000013c1, 0x0000 }, + { 0x000013c2, 0x0000 }, + { 0x000013c3, 0x0000 }, + { 0x000013d0, 0x0000 }, + { 0x000013d1, 0x0000 }, + { 0x000013d2, 0x0000 }, + { 0x000013d3, 0x0000 }, + { 0x00001400, 0x0000 }, + { 0x00001401, 0x0000 }, + { 0x00001402, 0x0000 }, + { 0x00001403, 0x0000 }, + { 0x00001410, 0x0000 }, + { 0x00001411, 0x0000 }, + { 0x00001412, 0x0000 }, + { 0x00001413, 0x0000 }, + { 0x00001480, 0x0000 }, /*R5248 - DFC1_CTRL*/ + { 0x00001482, 0x1F00 }, /*R5250 - DFC1_RX*/ + { 0x00001484, 0x1F00 }, /*R5252 - DFC1_TX*/ + { 0x00001486, 0x0000 }, + { 0x00001488, 0x1F00 }, + { 0x0000148A, 0x1F00 }, + { 0x0000148C, 0x0000 }, + { 0x0000148E, 0x1F00 }, + { 0x00001490, 0x1F00 }, + { 0x00001492, 0x0000 }, + { 0x00001494, 0x1F00 }, + { 0x00001496, 0x1F00 }, + { 0x00001498, 0x0000 }, + { 0x0000149A, 0x1F00 }, + { 0x0000149C, 0x1F00 }, + { 0x0000149E, 0x0000 }, + { 0x000014A0, 0x1F00 }, + { 0x000014A2, 0x1F00 }, + { 0x000014A4, 0x0000 }, + { 0x000014A6, 0x1F00 }, + { 0x000014A8, 0x1F00 }, + { 0x000014AA, 0x0000 }, + { 0x000014AC, 0x1F00 }, + { 0x000014AE, 0x1F00 }, /*R5294 - DFC8_TX */ + { 0x00001700, 0x2001 }, /* R5888 - GPIO1 Control 1 */ + { 0x00001701, 0xF000 }, /* R5889 - GPIO1 Control 2 */ + { 0x00001702, 0x2001 }, /* R5890 - GPIO2 Control 1 */ + { 0x00001703, 0xF000 }, /* R5891 - GPIO2 Control 2 */ + { 0x00001704, 0x2001 }, /* R5892 - GPIO3 Control 1 */ + { 0x00001705, 0xF000 }, /* R5893 - GPIO3 Control 2 */ + { 0x00001706, 0x2001 }, /* R5894 - GPIO4 Control 1 */ + { 0x00001707, 0xF000 }, /* R5895 - GPIO4 Control 2 */ + { 0x00001708, 0x2001 }, /* R5896 - GPIO5 Control 1 */ + { 0x00001709, 0xF000 }, /* R5897 - GPIO5 Control 2 */ + { 0x0000170A, 0x2001 }, /* R5898 - GPIO6 Control 1 */ + { 0x0000170B, 0xF000 }, /* R5899 - GPIO6 Control 2 */ + { 0x0000170C, 0x2001 }, /* R5900 - GPIO7 Control 1 */ + { 0x0000170D, 0xF000 }, /* R5901 - GPIO7 Control 2 */ + { 0x0000170E, 0x2001 }, /* R5902 - GPIO8 Control 1 */ + { 0x0000170F, 0xF000 }, /* R5903 - GPIO8 Control 2 */ + { 0x00001710, 0x2001 }, /* R5904 - GPIO9 Control 1 */ + { 0x00001711, 0xF000 }, /* R5905 - GPIO9 Control 2 */ + { 0x00001712, 0x2001 }, /* R5906 - GPIO10 Control 1 */ + { 0x00001713, 0xF000 }, /* R5907 - GPIO10 Control 2 */ + { 0x00001714, 0x2001 }, /* R5908 - GPIO11 Control 1 */ + { 0x00001715, 0xF000 }, /* R5909 - GPIO11 Control 2 */ + { 0x00001716, 0x2001 }, /* R5910 - GPIO12 Control 1 */ + { 0x00001717, 0xF000 }, /* R5911 - GPIO12 Control 2 */ + { 0x00001718, 0x2001 }, /* R5912 - GPIO13 Control 1 */ + { 0x00001719, 0xF000 }, /* R5913 - GPIO13 Control 2 */ + { 0x0000171A, 0x2001 }, /* R5914 - GPIO14 Control 1 */ + { 0x0000171B, 0xF000 }, /* R5915 - GPIO14 Control 2 */ + { 0x0000171C, 0x2001 }, /* R5916 - GPIO15 Control 1 */ + { 0x0000171D, 0xF000 }, /* R5917 - GPIO15 Control 2 */ + { 0x0000171E, 0x2001 }, /* R5918 - GPIO16 Control 1 */ + { 0x0000171F, 0xF000 }, /* R5919 - GPIO16 Control 2 */ + { 0x00001720, 0x2001 }, /* R5920 - GPIO17 Control 1 */ + { 0x00001721, 0xF000 }, /* R5921 - GPIO17 Control 2 */ + { 0x00001722, 0x2001 }, /* R5922 - GPIO18 Control 1 */ + { 0x00001723, 0xF000 }, /* R5923 - GPIO18 Control 2 */ + { 0x00001724, 0x2001 }, /* R5924 - GPIO19 Control 1 */ + { 0x00001725, 0xF000 }, /* R5925 - GPIO19 Control 2 */ + { 0x00001726, 0x2001 }, /* R5926 - GPIO20 Control 1 */ + { 0x00001727, 0xF000 }, /* R5927 - GPIO20 Control 2 */ + { 0x00001728, 0x2001 }, /* R5928 - GPIO21 Control 1 */ + { 0x00001729, 0xF000 }, /* R5929 - GPIO21 Control 2 */ + { 0x0000172A, 0x2001 }, /* R5930 - GPIO22 Control 1 */ + { 0x0000172B, 0xF000 }, /* R5931 - GPIO22 Control 2 */ + { 0x0000172C, 0x2001 }, /* R5932 - GPIO23 Control 1 */ + { 0x0000172D, 0xF000 }, /* R5933 - GPIO23 Control 2 */ + { 0x0000172E, 0x2001 }, /* R5934 - GPIO24 Control 1 */ + { 0x0000172F, 0xF000 }, /* R5935 - GPIO24 Control 2 */ + { 0x00001730, 0x2001 }, /* R5936 - GPIO25 Control 1 */ + { 0x00001731, 0xF000 }, /* R5937 - GPIO25 Control 2 */ + { 0x00001732, 0x2001 }, /* R5938 - GPIO26 Control 1 */ + { 0x00001733, 0xF000 }, /* R5939 - GPIO26 Control 2 */ + { 0x00001734, 0x2001 }, /* R5940 - GPIO27 Control 1 */ + { 0x00001735, 0xF000 }, /* R5941 - GPIO27 Control 2 */ + { 0x00001736, 0x2001 }, /* R5942 - GPIO28 Control 1 */ + { 0x00001737, 0xF000 }, /* R5943 - GPIO28 Control 2 */ + { 0x00001738, 0x2001 }, /* R5944 - GPIO29 Control 1 */ + { 0x00001739, 0xF000 }, /* R5945 - GPIO29 Control 2 */ + { 0x0000173A, 0x2001 }, /* R5946 - GPIO30 Control 1 */ + { 0x0000173B, 0xF000 }, /* R5947 - GPIO30 Control 2 */ + { 0x0000173C, 0x2001 }, /* R5948 - GPIO31 Control 1 */ + { 0x0000173D, 0xF000 }, /* R5949 - GPIO31 Control 2 */ + { 0x0000173E, 0x2001 }, /* R5950 - GPIO32 Control 1 */ + { 0x0000173F, 0xF000 }, /* R5951 - GPIO32 Control 2 */ + { 0x00001740, 0x2001 }, /* R5952 - GPIO33 Control 1 */ + { 0x00001741, 0xF000 }, /* R5953 - GPIO33 Control 2 */ + { 0x00001742, 0x2001 }, /* R5954 - GPIO34 Control 1 */ + { 0x00001743, 0xF000 }, /* R5955 - GPIO34 Control 2 */ + { 0x00001744, 0x2001 }, /* R5956 - GPIO35 Control 1 */ + { 0x00001745, 0xF000 }, /* R5957 - GPIO35 Control 2 */ + { 0x00001746, 0x2001 }, /* R5958 - GPIO36 Control 1 */ + { 0x00001747, 0xF000 }, /* R5959 - GPIO36 Control 2 */ + { 0x00001748, 0x2001 }, /* R5960 - GPIO37 Control 1 */ + { 0x00001749, 0xF000 }, /* R5961 - GPIO37 Control 2 */ + { 0x0000174A, 0x2001 }, /* R5962 - GPIO38 Control 1 */ + { 0x0000174B, 0xF000 }, /* R5963 - GPIO38 Control 2 */ + { 0x00001840, 0x9200 }, /* R6208 - IRQ1 Mask 1 */ + { 0x00001841, 0xFB00 }, /* R6209 - IRQ1 Mask 2 */ + { 0x00001842, 0xFFFF }, /* R6210 - IRQ1 Mask 3 */ + { 0x00001843, 0xFFFF }, /* R6211 - IRQ1 Mask 4 */ + { 0x00001844, 0xFFFF }, /* R6212 - IRQ1 Mask 5 */ + { 0x00001845, 0x0301 }, /* R6213 - IRQ1 Mask 6 */ + { 0x00001846, 0x003F }, /* R6214 - IRQ1 Mask 7 */ + { 0x00001847, 0xFFFF }, /* R6215 - IRQ1 Mask 8 */ + { 0x00001848, 0x0F07 }, /* R6216 - IRQ1 Mask 9 */ + { 0x00001849, 0xFFFF }, /* R6217 - IRQ1 Mask 10 */ + { 0x0000184A, 0xFFFF }, /* R6218 - IRQ1 Mask 11 */ + { 0x0000184B, 0x003F }, /* R6219 - IRQ1 Mask 12 */ + { 0x0000184C, 0x003F }, /* R6220 - IRQ1 Mask 13 */ + { 0x0000184D, 0x003F }, /* R6221 - IRQ1 Mask 14 */ + { 0x0000184E, 0xFFFF }, /* R6222 - IRQ1 Mask 15 */ + { 0x0000184F, 0xFFFF }, /* R6223 - IRQ1 Mask 16 */ + { 0x00001850, 0xFFFF }, /* R6224 - IRQ1 Mask 17 */ + { 0x00001851, 0xFFFF }, /* R6225 - IRQ1 Mask 18 */ + { 0x00001852, 0x003F }, /* R6226 - IRQ1 Mask 19 */ + { 0x00001853, 0xFFFF }, /* R6227 - IRQ1 Mask 20 */ + { 0x00001854, 0x00FF }, /* R6228 - IRQ1 Mask 21 */ + { 0x00001855, 0x00FF }, /* R6229 - IRQ1 Mask 22 */ + { 0x00001856, 0x00FF }, /* R6230 - IRQ1 Mask 23 */ + { 0x00001857, 0x00FF }, /* R6231 - IRQ1 Mask 24 */ + { 0x00001858, 0x007F }, /* R6232 - IRQ1 Mask 25 */ + { 0x00001859, 0xFFFF }, /* R6233 - IRQ1 Mask 26 */ + { 0x0000185A, 0x007F }, /* R6234 - IRQ1 Mask 27 */ + { 0x0000185B, 0x007F }, /* R6235 - IRQ1 Mask 28 */ + { 0x0000185C, 0xFFFF }, /* R6236 - IRQ1 Mask 29 */ + { 0x0000185D, 0x007F }, /* R6237 - IRQ1 Mask 30 */ + { 0x0000185E, 0x0007 }, /* R6238 - IRQ1 Mask 31 */ + { 0x0000185F, 0x0007 }, /* R6239 - IRQ1 Mask 32 */ + { 0x00001860, 0x007F }, /* R6240 - IRQ1 Mask 33 */ + { 0x00001948, 0x0F07 }, /* R6472 - IRQ2 Mask 9 */ + { 0x00001A80, 0x4400 }, /* R6784 - IRQ1 CTRL */ +}; + +static bool moon_is_adsp_memory(struct device *dev, unsigned int reg) +{ + if ((reg >= 0x080000 && reg <= 0x088ffe) || + (reg >= 0x0a0000 && reg <= 0x0a9ffe) || + (reg >= 0x0c0000 && reg <= 0x0c3ffe) || + (reg >= 0x0e0000 && reg <= 0x0e1ffe) || + (reg >= 0x100000 && reg <= 0x10effe) || + (reg >= 0x120000 && reg <= 0x12bffe) || + (reg >= 0x136000 && reg <= 0x137ffe) || + (reg >= 0x140000 && reg <= 0x14bffe) || + (reg >= 0x160000 && reg <= 0x161ffe) || + (reg >= 0x180000 && reg <= 0x18effe) || + (reg >= 0x1a0000 && reg <= 0x1b1ffe) || + (reg >= 0x1b6000 && reg <= 0x1b7ffe) || + (reg >= 0x1c0000 && reg <= 0x1cbffe) || + (reg >= 0x1e0000 && reg <= 0x1e1ffe) || + (reg >= 0x200000 && reg <= 0x208ffe) || + (reg >= 0x220000 && reg <= 0x229ffe) || + (reg >= 0x240000 && reg <= 0x243ffe) || + (reg >= 0x260000 && reg <= 0x261ffe) || + (reg >= 0x280000 && reg <= 0x288ffe) || + (reg >= 0x2a0000 && reg <= 0x2a9ffe) || + (reg >= 0x2c0000 && reg <= 0x2c3ffe) || + (reg >= 0x2e0000 && reg <= 0x2e1ffe) || + (reg >= 0x300000 && reg <= 0x308ffe) || + (reg >= 0x320000 && reg <= 0x333ffe) || + (reg >= 0x340000 && reg <= 0x353ffe) || + (reg >= 0x360000 && reg <= 0x361ffe) || + (reg >= 0x380000 && reg <= 0x388ffe) || + (reg >= 0x3a0000 && reg <= 0x3b3ffe) || + (reg >= 0x3c0000 && reg <= 0x3d3ffe) || + (reg >= 0x3e0000 && reg <= 0x3e1ffe)) + return true; + else + return false; +} + +static bool moon_16bit_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_SOFTWARE_RESET: + case ARIZONA_DEVICE_REVISION: + case ARIZONA_CTRL_IF_SPI_CFG_1: + case ARIZONA_CTRL_IF_I2C1_CFG_1: + case ARIZONA_CTRL_IF_I2C2_CFG_1: + case ARIZONA_WRITE_SEQUENCER_CTRL_0: + case ARIZONA_WRITE_SEQUENCER_CTRL_1: + case ARIZONA_WRITE_SEQUENCER_CTRL_2: + case ARIZONA_TONE_GENERATOR_1: + case ARIZONA_TONE_GENERATOR_2: + case ARIZONA_TONE_GENERATOR_3: + case ARIZONA_TONE_GENERATOR_4: + case ARIZONA_TONE_GENERATOR_5: + case ARIZONA_PWM_DRIVE_1: + case ARIZONA_PWM_DRIVE_2: + case ARIZONA_PWM_DRIVE_3: + case ARIZONA_SEQUENCE_CONTROL: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_1: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_4: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6: + case ARIZONA_HAPTICS_CONTROL_1: + case ARIZONA_HAPTICS_CONTROL_2: + case ARIZONA_HAPTICS_PHASE_1_INTENSITY: + case ARIZONA_HAPTICS_PHASE_1_DURATION: + case ARIZONA_HAPTICS_PHASE_2_INTENSITY: + case ARIZONA_HAPTICS_PHASE_2_DURATION: + case ARIZONA_HAPTICS_PHASE_3_INTENSITY: + case ARIZONA_HAPTICS_PHASE_3_DURATION: + case ARIZONA_HAPTICS_STATUS: + case CLEARWATER_COMFORT_NOISE_GENERATOR: + case ARIZONA_CLOCK_32K_1: + case ARIZONA_SYSTEM_CLOCK_1: + case ARIZONA_SAMPLE_RATE_1: + case ARIZONA_SAMPLE_RATE_2: + case ARIZONA_SAMPLE_RATE_3: + case ARIZONA_SAMPLE_RATE_1_STATUS: + case ARIZONA_SAMPLE_RATE_2_STATUS: + case ARIZONA_SAMPLE_RATE_3_STATUS: + case ARIZONA_ASYNC_CLOCK_1: + case ARIZONA_ASYNC_SAMPLE_RATE_1: + case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: + case ARIZONA_ASYNC_SAMPLE_RATE_2: + case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: + case CLEARWATER_DSP_CLOCK_1: + case CLEARWATER_DSP_CLOCK_2: + case ARIZONA_OUTPUT_SYSTEM_CLOCK: + case ARIZONA_OUTPUT_ASYNC_CLOCK: + case ARIZONA_RATE_ESTIMATOR_1: + case ARIZONA_RATE_ESTIMATOR_2: + case ARIZONA_RATE_ESTIMATOR_3: + case ARIZONA_RATE_ESTIMATOR_4: + case ARIZONA_RATE_ESTIMATOR_5: + case ARIZONA_FLL1_CONTROL_1: + case ARIZONA_FLL1_CONTROL_2: + case ARIZONA_FLL1_CONTROL_3: + case ARIZONA_FLL1_CONTROL_4: + case ARIZONA_FLL1_CONTROL_5: + case ARIZONA_FLL1_CONTROL_6: + case ARIZONA_FLL1_CONTROL_7: + case ARIZONA_FLL1_LOOP_FILTER_TEST_1: + case ARIZONA_FLL1_NCO_TEST_0: + case ARIZONA_FLL1_SYNCHRONISER_1: + case ARIZONA_FLL1_SYNCHRONISER_2: + case ARIZONA_FLL1_SYNCHRONISER_3: + case ARIZONA_FLL1_SYNCHRONISER_4: + case ARIZONA_FLL1_SYNCHRONISER_5: + case ARIZONA_FLL1_SYNCHRONISER_6: + case ARIZONA_FLL1_SYNCHRONISER_7: + case ARIZONA_FLL1_SPREAD_SPECTRUM: + case ARIZONA_FLL1_GPIO_CLOCK: + case ARIZONA_FLL2_CONTROL_1: + case ARIZONA_FLL2_CONTROL_2: + case ARIZONA_FLL2_CONTROL_3: + case ARIZONA_FLL2_CONTROL_4: + case ARIZONA_FLL2_CONTROL_5: + case ARIZONA_FLL2_CONTROL_6: + case ARIZONA_FLL2_CONTROL_7: + case ARIZONA_FLL2_LOOP_FILTER_TEST_1: + case ARIZONA_FLL2_NCO_TEST_0: + case ARIZONA_FLL2_SYNCHRONISER_1: + case ARIZONA_FLL2_SYNCHRONISER_2: + case ARIZONA_FLL2_SYNCHRONISER_3: + case ARIZONA_FLL2_SYNCHRONISER_4: + case ARIZONA_FLL2_SYNCHRONISER_5: + case ARIZONA_FLL2_SYNCHRONISER_6: + case ARIZONA_FLL2_SYNCHRONISER_7: + case ARIZONA_FLL2_SPREAD_SPECTRUM: + case ARIZONA_FLL2_GPIO_CLOCK: + case MOON_FLLAO_CONTROL_1: + case MOON_FLLAO_CONTROL_2: + case MOON_FLLAO_CONTROL_3: + case MOON_FLLAO_CONTROL_4: + case MOON_FLLAO_CONTROL_5: + case MOON_FLLAO_CONTROL_6: + case MOON_FLLAO_CONTROL_7: + case MOON_FLLAO_CONTROL_8: + case MOON_FLLAO_CONTROL_9: + case MOON_FLLAO_CONTROL_10: + case MOON_FLLAO_CONTROL_11: + case ARIZONA_MIC_CHARGE_PUMP_1: + case ARIZONA_LDO2_CONTROL_1: + case ARIZONA_MIC_BIAS_CTRL_1: + case ARIZONA_MIC_BIAS_CTRL_2: + case ARIZONA_MIC_BIAS_CTRL_5: + case ARIZONA_MIC_BIAS_CTRL_6: + case ARIZONA_HP_CTRL_1L: + case ARIZONA_HP_CTRL_1R: + case ARIZONA_HP_CTRL_2L: + case ARIZONA_HP_CTRL_2R: + case ARIZONA_HP_CTRL_3L: + case ARIZONA_HP_CTRL_3R: + case CLEARWATER_EDRE_HP_STEREO_CONTROL: + case ARIZONA_ACCESSORY_DETECT_MODE_1: + case MOON_HEADPHONE_DETECT_0: + case ARIZONA_HEADPHONE_DETECT_1: + case ARIZONA_HEADPHONE_DETECT_2: + case ARIZONA_HEADPHONE_DETECT_3: + case ARIZONA_HP_DACVAL: + case CLEARWATER_MICD_CLAMP_CONTROL: + case MOON_MIC_DETECT_0: + case ARIZONA_MIC_DETECT_1: + case ARIZONA_MIC_DETECT_2: + case ARIZONA_MIC_DETECT_3: + case ARIZONA_MIC_DETECT_4: + case ARIZONA_MIC_DETECT_LEVEL_1: + case ARIZONA_MIC_DETECT_LEVEL_2: + case ARIZONA_MIC_DETECT_LEVEL_3: + case ARIZONA_MIC_DETECT_LEVEL_4: + case MOON_MICDET2_CONTROL_0: + case MOON_MICDET2_CONTROL_1: + case MOON_MICDET2_CONTROL_2: + case MOON_MICDET2_CONTROL_3: + case MOON_MICDET2_CONTROL_4: + case MOON_MICDET2_LEVEL_1: + case MOON_MICDET2_LEVEL_2: + case MOON_MICDET2_LEVEL_3: + case MOON_MICDET2_LEVEL_4: + case CLEARWATER_GP_SWITCH_1: + case ARIZONA_JACK_DETECT_ANALOGUE: + case ARIZONA_INPUT_ENABLES: + case ARIZONA_INPUT_ENABLES_STATUS: + case ARIZONA_INPUT_RATE: + case ARIZONA_INPUT_VOLUME_RAMP: + case ARIZONA_HPF_CONTROL: + case ARIZONA_IN1L_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_1L: + case ARIZONA_DMIC1L_CONTROL: + case MOON_IN1L_RATE_CONTROL: + case ARIZONA_IN1R_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_1R: + case ARIZONA_DMIC1R_CONTROL: + case MOON_IN1R_RATE_CONTROL: + case ARIZONA_IN2L_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_2L: + case ARIZONA_DMIC2L_CONTROL: + case MOON_IN2L_RATE_CONTROL: + case ARIZONA_IN2R_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_2R: + case ARIZONA_DMIC2R_CONTROL: + case MOON_IN2R_RATE_CONTROL: + case ARIZONA_IN3L_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_3L: + case ARIZONA_DMIC3L_CONTROL: + case MOON_IN3L_RATE_CONTROL: + case ARIZONA_IN3R_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_3R: + case ARIZONA_DMIC3R_CONTROL: + case MOON_IN3R_RATE_CONTROL: + case ARIZONA_IN4L_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_4L: + case ARIZONA_DMIC4L_CONTROL: + case MOON_IN4L_RATE_CONTROL: + case ARIZONA_IN4R_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_4R: + case ARIZONA_DMIC4R_CONTROL: + case MOON_IN4R_RATE_CONTROL: + case ARIZONA_IN5L_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_5L: + case ARIZONA_DMIC5L_CONTROL: + case MOON_IN5L_RATE_CONTROL: + case ARIZONA_IN5R_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_5R: + case ARIZONA_DMIC5R_CONTROL: + case MOON_IN5R_RATE_CONTROL: + case ARIZONA_OUTPUT_ENABLES_1: + case ARIZONA_OUTPUT_STATUS_1: + case ARIZONA_RAW_OUTPUT_STATUS_1: + case ARIZONA_OUTPUT_RATE_1: + case ARIZONA_OUTPUT_VOLUME_RAMP: + case ARIZONA_OUTPUT_PATH_CONFIG_1L: + case ARIZONA_DAC_DIGITAL_VOLUME_1L: + case MOON_OUT1_CONFIG: + case ARIZONA_NOISE_GATE_SELECT_1L: + case ARIZONA_OUTPUT_PATH_CONFIG_1R: + case ARIZONA_DAC_DIGITAL_VOLUME_1R: + case ARIZONA_NOISE_GATE_SELECT_1R: + case ARIZONA_OUTPUT_PATH_CONFIG_2L: + case ARIZONA_DAC_DIGITAL_VOLUME_2L: + case MOON_OUT2_CONFIG: + case ARIZONA_NOISE_GATE_SELECT_2L: + case ARIZONA_OUTPUT_PATH_CONFIG_2R: + case ARIZONA_DAC_DIGITAL_VOLUME_2R: + case ARIZONA_NOISE_GATE_SELECT_2R: + case ARIZONA_OUTPUT_PATH_CONFIG_3L: + case ARIZONA_DAC_DIGITAL_VOLUME_3L: + case ARIZONA_NOISE_GATE_SELECT_3L: + case ARIZONA_OUTPUT_PATH_CONFIG_3R: + case ARIZONA_DAC_DIGITAL_VOLUME_3R: + case ARIZONA_NOISE_GATE_SELECT_3R: + case ARIZONA_OUTPUT_PATH_CONFIG_5L: + case ARIZONA_DAC_DIGITAL_VOLUME_5L: + case ARIZONA_NOISE_GATE_SELECT_5L: + case ARIZONA_OUTPUT_PATH_CONFIG_5R: + case ARIZONA_DAC_DIGITAL_VOLUME_5R: + case ARIZONA_NOISE_GATE_SELECT_5R: + case ARIZONA_DRE_ENABLE: + case CLEARWATER_EDRE_ENABLE: + case ARIZONA_DAC_AEC_CONTROL_1: + case ARIZONA_NOISE_GATE_CONTROL: + case ARIZONA_PDM_SPK1_CTRL_1: + case ARIZONA_PDM_SPK1_CTRL_2: + case ARIZONA_HP1_SHORT_CIRCUIT_CTRL: + case ARIZONA_HP2_SHORT_CIRCUIT_CTRL: + case ARIZONA_HP3_SHORT_CIRCUIT_CTRL: + case ARIZONA_HP_TEST_CTRL_5: + case ARIZONA_HP_TEST_CTRL_6: + case ARIZONA_AIF1_BCLK_CTRL: + case ARIZONA_AIF1_TX_PIN_CTRL: + case ARIZONA_AIF1_RX_PIN_CTRL: + case ARIZONA_AIF1_RATE_CTRL: + case ARIZONA_AIF1_FORMAT: + case ARIZONA_AIF1_TX_BCLK_RATE: + case ARIZONA_AIF1_RX_BCLK_RATE: + case ARIZONA_AIF1_FRAME_CTRL_1: + case ARIZONA_AIF1_FRAME_CTRL_2: + case ARIZONA_AIF1_FRAME_CTRL_3: + case ARIZONA_AIF1_FRAME_CTRL_4: + case ARIZONA_AIF1_FRAME_CTRL_5: + case ARIZONA_AIF1_FRAME_CTRL_6: + case ARIZONA_AIF1_FRAME_CTRL_7: + case ARIZONA_AIF1_FRAME_CTRL_8: + case ARIZONA_AIF1_FRAME_CTRL_9: + case ARIZONA_AIF1_FRAME_CTRL_10: + case ARIZONA_AIF1_FRAME_CTRL_11: + case ARIZONA_AIF1_FRAME_CTRL_12: + case ARIZONA_AIF1_FRAME_CTRL_13: + case ARIZONA_AIF1_FRAME_CTRL_14: + case ARIZONA_AIF1_FRAME_CTRL_15: + case ARIZONA_AIF1_FRAME_CTRL_16: + case ARIZONA_AIF1_FRAME_CTRL_17: + case ARIZONA_AIF1_FRAME_CTRL_18: + case ARIZONA_AIF1_TX_ENABLES: + case ARIZONA_AIF1_RX_ENABLES: + case ARIZONA_AIF2_BCLK_CTRL: + case ARIZONA_AIF2_TX_PIN_CTRL: + case ARIZONA_AIF2_RX_PIN_CTRL: + case ARIZONA_AIF2_RATE_CTRL: + case ARIZONA_AIF2_FORMAT: + case ARIZONA_AIF2_TX_BCLK_RATE: + case ARIZONA_AIF2_RX_BCLK_RATE: + case ARIZONA_AIF2_FRAME_CTRL_1: + case ARIZONA_AIF2_FRAME_CTRL_2: + case ARIZONA_AIF2_FRAME_CTRL_3: + case ARIZONA_AIF2_FRAME_CTRL_4: + case ARIZONA_AIF2_FRAME_CTRL_5: + case ARIZONA_AIF2_FRAME_CTRL_6: + case ARIZONA_AIF2_FRAME_CTRL_7: + case ARIZONA_AIF2_FRAME_CTRL_8: + case ARIZONA_AIF2_FRAME_CTRL_9: + case ARIZONA_AIF2_FRAME_CTRL_10: + case ARIZONA_AIF2_FRAME_CTRL_11: + case ARIZONA_AIF2_FRAME_CTRL_12: + case ARIZONA_AIF2_FRAME_CTRL_13: + case ARIZONA_AIF2_FRAME_CTRL_14: + case ARIZONA_AIF2_FRAME_CTRL_15: + case ARIZONA_AIF2_FRAME_CTRL_16: + case ARIZONA_AIF2_FRAME_CTRL_17: + case ARIZONA_AIF2_FRAME_CTRL_18: + case ARIZONA_AIF2_TX_ENABLES: + case ARIZONA_AIF2_RX_ENABLES: + case ARIZONA_AIF3_BCLK_CTRL: + case ARIZONA_AIF3_TX_PIN_CTRL: + case ARIZONA_AIF3_RX_PIN_CTRL: + case ARIZONA_AIF3_RATE_CTRL: + case ARIZONA_AIF3_FORMAT: + case ARIZONA_AIF3_TX_BCLK_RATE: + case ARIZONA_AIF3_RX_BCLK_RATE: + case ARIZONA_AIF3_FRAME_CTRL_1: + case ARIZONA_AIF3_FRAME_CTRL_2: + case ARIZONA_AIF3_FRAME_CTRL_3: + case ARIZONA_AIF3_FRAME_CTRL_4: + case ARIZONA_AIF3_FRAME_CTRL_11: + case ARIZONA_AIF3_FRAME_CTRL_12: + case ARIZONA_AIF3_TX_ENABLES: + case ARIZONA_AIF3_RX_ENABLES: + case ARIZONA_AIF4_BCLK_CTRL: + case ARIZONA_AIF4_TX_PIN_CTRL: + case ARIZONA_AIF4_RX_PIN_CTRL: + case ARIZONA_AIF4_RATE_CTRL: + case ARIZONA_AIF4_FORMAT: + case ARIZONA_AIF4_TX_BCLK_RATE: + case ARIZONA_AIF4_RX_BCLK_RATE: + case ARIZONA_AIF4_FRAME_CTRL_1: + case ARIZONA_AIF4_FRAME_CTRL_2: + case ARIZONA_AIF4_FRAME_CTRL_3: + case ARIZONA_AIF4_FRAME_CTRL_4: + case ARIZONA_AIF4_FRAME_CTRL_11: + case ARIZONA_AIF4_FRAME_CTRL_12: + case ARIZONA_AIF4_TX_ENABLES: + case ARIZONA_AIF4_RX_ENABLES: + case ARIZONA_SPD1_TX_CONTROL: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_1: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_2: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_3: + case ARIZONA_SLIMBUS_FRAMER_REF_GEAR: + case ARIZONA_SLIMBUS_RATES_1: + case ARIZONA_SLIMBUS_RATES_2: + case ARIZONA_SLIMBUS_RATES_3: + case ARIZONA_SLIMBUS_RATES_4: + case ARIZONA_SLIMBUS_RATES_5: + case ARIZONA_SLIMBUS_RATES_6: + case ARIZONA_SLIMBUS_RATES_7: + case ARIZONA_SLIMBUS_RATES_8: + case ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE: + case ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE: + case ARIZONA_SLIMBUS_RX_PORT_STATUS: + case ARIZONA_SLIMBUS_TX_PORT_STATUS: + case ARIZONA_PWM1MIX_INPUT_1_SOURCE: + case ARIZONA_PWM1MIX_INPUT_1_VOLUME: + case ARIZONA_PWM1MIX_INPUT_2_SOURCE: + case ARIZONA_PWM1MIX_INPUT_2_VOLUME: + case ARIZONA_PWM1MIX_INPUT_3_SOURCE: + case ARIZONA_PWM1MIX_INPUT_3_VOLUME: + case ARIZONA_PWM1MIX_INPUT_4_SOURCE: + case ARIZONA_PWM1MIX_INPUT_4_VOLUME: + case ARIZONA_PWM2MIX_INPUT_1_SOURCE: + case ARIZONA_PWM2MIX_INPUT_1_VOLUME: + case ARIZONA_PWM2MIX_INPUT_2_SOURCE: + case ARIZONA_PWM2MIX_INPUT_2_VOLUME: + case ARIZONA_PWM2MIX_INPUT_3_SOURCE: + case ARIZONA_PWM2MIX_INPUT_3_VOLUME: + case ARIZONA_PWM2MIX_INPUT_4_SOURCE: + case ARIZONA_PWM2MIX_INPUT_4_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_1_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_1_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_2_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_2_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_3_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_3_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_4_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_4_VOLUME: + case ARIZONA_OUT2LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT2LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT2LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT2LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT2LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT2LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT2LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT2LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT2RMIX_INPUT_1_SOURCE: + case ARIZONA_OUT2RMIX_INPUT_1_VOLUME: + case ARIZONA_OUT2RMIX_INPUT_2_SOURCE: + case ARIZONA_OUT2RMIX_INPUT_2_VOLUME: + case ARIZONA_OUT2RMIX_INPUT_3_SOURCE: + case ARIZONA_OUT2RMIX_INPUT_3_VOLUME: + case ARIZONA_OUT2RMIX_INPUT_4_SOURCE: + case ARIZONA_OUT2RMIX_INPUT_4_VOLUME: + case ARIZONA_OUT3LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT3LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT3LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT3LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT3LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT3LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT3LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT3LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT3RMIX_INPUT_1_SOURCE: + case ARIZONA_OUT3RMIX_INPUT_1_VOLUME: + case ARIZONA_OUT3RMIX_INPUT_2_SOURCE: + case ARIZONA_OUT3RMIX_INPUT_2_VOLUME: + case ARIZONA_OUT3RMIX_INPUT_3_SOURCE: + case ARIZONA_OUT3RMIX_INPUT_3_VOLUME: + case ARIZONA_OUT3RMIX_INPUT_4_SOURCE: + case ARIZONA_OUT3RMIX_INPUT_4_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_1_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_1_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_2_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_2_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_3_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_3_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_4_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX7MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX7MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX7MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX7MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX7MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX7MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX7MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX8MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX8MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX8MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX8MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX8MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX8MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX8MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX5MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX5MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX5MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX5MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX5MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX5MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX5MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX6MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX6MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX6MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX6MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_4_VOLUME: + case ARIZONA_AIF4TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF4TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF4TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF4TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF4TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF4TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF4TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF4TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF4TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF4TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF4TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF4TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF4TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF4TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF4TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF4TX2MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX1MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX1MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX1MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX1MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX1MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX1MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX1MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX2MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX2MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX2MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX2MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX2MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX2MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX2MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX3MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX3MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX3MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX3MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX3MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX3MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX3MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX4MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX4MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX4MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX4MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX4MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX4MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX4MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX5MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX5MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX5MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX5MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX5MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX5MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX5MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX6MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX6MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX6MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX6MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX6MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX6MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX6MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX7MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX7MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX7MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX7MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX7MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX7MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX7MIX_INPUT_4_VOLUME: + case ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE: + case ARIZONA_SLIMTX8MIX_INPUT_1_VOLUME: + case ARIZONA_SLIMTX8MIX_INPUT_2_SOURCE: + case ARIZONA_SLIMTX8MIX_INPUT_2_VOLUME: + case ARIZONA_SLIMTX8MIX_INPUT_3_SOURCE: + case ARIZONA_SLIMTX8MIX_INPUT_3_VOLUME: + case ARIZONA_SLIMTX8MIX_INPUT_4_SOURCE: + case ARIZONA_SLIMTX8MIX_INPUT_4_VOLUME: + case ARIZONA_EQ1MIX_INPUT_1_SOURCE: + case ARIZONA_EQ1MIX_INPUT_1_VOLUME: + case ARIZONA_EQ1MIX_INPUT_2_SOURCE: + case ARIZONA_EQ1MIX_INPUT_2_VOLUME: + case ARIZONA_EQ1MIX_INPUT_3_SOURCE: + case ARIZONA_EQ1MIX_INPUT_3_VOLUME: + case ARIZONA_EQ1MIX_INPUT_4_SOURCE: + case ARIZONA_EQ1MIX_INPUT_4_VOLUME: + case ARIZONA_EQ2MIX_INPUT_1_SOURCE: + case ARIZONA_EQ2MIX_INPUT_1_VOLUME: + case ARIZONA_EQ2MIX_INPUT_2_SOURCE: + case ARIZONA_EQ2MIX_INPUT_2_VOLUME: + case ARIZONA_EQ2MIX_INPUT_3_SOURCE: + case ARIZONA_EQ2MIX_INPUT_3_VOLUME: + case ARIZONA_EQ2MIX_INPUT_4_SOURCE: + case ARIZONA_EQ2MIX_INPUT_4_VOLUME: + case ARIZONA_EQ3MIX_INPUT_1_SOURCE: + case ARIZONA_EQ3MIX_INPUT_1_VOLUME: + case ARIZONA_EQ3MIX_INPUT_2_SOURCE: + case ARIZONA_EQ3MIX_INPUT_2_VOLUME: + case ARIZONA_EQ3MIX_INPUT_3_SOURCE: + case ARIZONA_EQ3MIX_INPUT_3_VOLUME: + case ARIZONA_EQ3MIX_INPUT_4_SOURCE: + case ARIZONA_EQ3MIX_INPUT_4_VOLUME: + case ARIZONA_EQ4MIX_INPUT_1_SOURCE: + case ARIZONA_EQ4MIX_INPUT_1_VOLUME: + case ARIZONA_EQ4MIX_INPUT_2_SOURCE: + case ARIZONA_EQ4MIX_INPUT_2_VOLUME: + case ARIZONA_EQ4MIX_INPUT_3_SOURCE: + case ARIZONA_EQ4MIX_INPUT_3_VOLUME: + case ARIZONA_EQ4MIX_INPUT_4_SOURCE: + case ARIZONA_EQ4MIX_INPUT_4_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_1_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_1_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_2_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_2_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_3_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_3_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_4_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_4_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_1_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_1_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_2_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_2_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_3_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_3_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_4_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_4_VOLUME: + case ARIZONA_DRC2LMIX_INPUT_1_SOURCE: + case ARIZONA_DRC2LMIX_INPUT_1_VOLUME: + case ARIZONA_DRC2LMIX_INPUT_2_SOURCE: + case ARIZONA_DRC2LMIX_INPUT_2_VOLUME: + case ARIZONA_DRC2LMIX_INPUT_3_SOURCE: + case ARIZONA_DRC2LMIX_INPUT_3_VOLUME: + case ARIZONA_DRC2LMIX_INPUT_4_SOURCE: + case ARIZONA_DRC2LMIX_INPUT_4_VOLUME: + case ARIZONA_DRC2RMIX_INPUT_1_SOURCE: + case ARIZONA_DRC2RMIX_INPUT_1_VOLUME: + case ARIZONA_DRC2RMIX_INPUT_2_SOURCE: + case ARIZONA_DRC2RMIX_INPUT_2_VOLUME: + case ARIZONA_DRC2RMIX_INPUT_3_SOURCE: + case ARIZONA_DRC2RMIX_INPUT_3_VOLUME: + case ARIZONA_DRC2RMIX_INPUT_4_SOURCE: + case ARIZONA_DRC2RMIX_INPUT_4_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_4_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_4_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_4_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_4_VOLUME: + case ARIZONA_DSP1LMIX_INPUT_1_SOURCE: + case ARIZONA_DSP1LMIX_INPUT_1_VOLUME: + case ARIZONA_DSP1LMIX_INPUT_2_SOURCE: + case ARIZONA_DSP1LMIX_INPUT_2_VOLUME: + case ARIZONA_DSP1LMIX_INPUT_3_SOURCE: + case ARIZONA_DSP1LMIX_INPUT_3_VOLUME: + case ARIZONA_DSP1LMIX_INPUT_4_SOURCE: + case ARIZONA_DSP1LMIX_INPUT_4_VOLUME: + case ARIZONA_DSP1RMIX_INPUT_1_SOURCE: + case ARIZONA_DSP1RMIX_INPUT_1_VOLUME: + case ARIZONA_DSP1RMIX_INPUT_2_SOURCE: + case ARIZONA_DSP1RMIX_INPUT_2_VOLUME: + case ARIZONA_DSP1RMIX_INPUT_3_SOURCE: + case ARIZONA_DSP1RMIX_INPUT_3_VOLUME: + case ARIZONA_DSP1RMIX_INPUT_4_SOURCE: + case ARIZONA_DSP1RMIX_INPUT_4_VOLUME: + case ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE: + case ARIZONA_DSP1AUX2MIX_INPUT_1_SOURCE: + case ARIZONA_DSP1AUX3MIX_INPUT_1_SOURCE: + case ARIZONA_DSP1AUX4MIX_INPUT_1_SOURCE: + case ARIZONA_DSP1AUX5MIX_INPUT_1_SOURCE: + case ARIZONA_DSP1AUX6MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2LMIX_INPUT_1_SOURCE: + case ARIZONA_DSP2LMIX_INPUT_1_VOLUME: + case ARIZONA_DSP2LMIX_INPUT_2_SOURCE: + case ARIZONA_DSP2LMIX_INPUT_2_VOLUME: + case ARIZONA_DSP2LMIX_INPUT_3_SOURCE: + case ARIZONA_DSP2LMIX_INPUT_3_VOLUME: + case ARIZONA_DSP2LMIX_INPUT_4_SOURCE: + case ARIZONA_DSP2LMIX_INPUT_4_VOLUME: + case ARIZONA_DSP2RMIX_INPUT_1_SOURCE: + case ARIZONA_DSP2RMIX_INPUT_1_VOLUME: + case ARIZONA_DSP2RMIX_INPUT_2_SOURCE: + case ARIZONA_DSP2RMIX_INPUT_2_VOLUME: + case ARIZONA_DSP2RMIX_INPUT_3_SOURCE: + case ARIZONA_DSP2RMIX_INPUT_3_VOLUME: + case ARIZONA_DSP2RMIX_INPUT_4_SOURCE: + case ARIZONA_DSP2RMIX_INPUT_4_VOLUME: + case ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2AUX2MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2AUX3MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2AUX4MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2AUX5MIX_INPUT_1_SOURCE: + case ARIZONA_DSP2AUX6MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3LMIX_INPUT_1_SOURCE: + case ARIZONA_DSP3LMIX_INPUT_1_VOLUME: + case ARIZONA_DSP3LMIX_INPUT_2_SOURCE: + case ARIZONA_DSP3LMIX_INPUT_2_VOLUME: + case ARIZONA_DSP3LMIX_INPUT_3_SOURCE: + case ARIZONA_DSP3LMIX_INPUT_3_VOLUME: + case ARIZONA_DSP3LMIX_INPUT_4_SOURCE: + case ARIZONA_DSP3LMIX_INPUT_4_VOLUME: + case ARIZONA_DSP3RMIX_INPUT_1_SOURCE: + case ARIZONA_DSP3RMIX_INPUT_1_VOLUME: + case ARIZONA_DSP3RMIX_INPUT_2_SOURCE: + case ARIZONA_DSP3RMIX_INPUT_2_VOLUME: + case ARIZONA_DSP3RMIX_INPUT_3_SOURCE: + case ARIZONA_DSP3RMIX_INPUT_3_VOLUME: + case ARIZONA_DSP3RMIX_INPUT_4_SOURCE: + case ARIZONA_DSP3RMIX_INPUT_4_VOLUME: + case ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3AUX2MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3AUX3MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3AUX4MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3AUX5MIX_INPUT_1_SOURCE: + case ARIZONA_DSP3AUX6MIX_INPUT_1_SOURCE: + case ARIZONA_DSP4LMIX_INPUT_1_SOURCE: + case ARIZONA_DSP4LMIX_INPUT_1_VOLUME: + case ARIZONA_DSP4LMIX_INPUT_2_SOURCE: + case ARIZONA_DSP4LMIX_INPUT_2_VOLUME: + case ARIZONA_DSP4LMIX_INPUT_3_SOURCE: + case ARIZONA_DSP4LMIX_INPUT_3_VOLUME: + case ARIZONA_DSP4LMIX_INPUT_4_SOURCE: + case ARIZONA_DSP4LMIX_INPUT_4_VOLUME: + case ARIZONA_DSP4RMIX_INPUT_1_SOURCE: + case ARIZONA_DSP4RMIX_INPUT_1_VOLUME: + case ARIZONA_DSP4RMIX_INPUT_2_SOURCE: + case ARIZONA_DSP4RMIX_INPUT_2_VOLUME: + case ARIZONA_DSP4RMIX_INPUT_3_SOURCE: + case ARIZONA_DSP4RMIX_INPUT_3_VOLUME: + case ARIZONA_DSP4RMIX_INPUT_4_SOURCE: + case ARIZONA_DSP4RMIX_INPUT_4_VOLUME: + case ARIZONA_DSP4AUX1MIX_INPUT_1_SOURCE: + case ARIZONA_DSP4AUX2MIX_INPUT_1_SOURCE: + case ARIZONA_DSP4AUX3MIX_INPUT_1_SOURCE: + case ARIZONA_DSP4AUX4MIX_INPUT_1_SOURCE: + case ARIZONA_DSP4AUX5MIX_INPUT_1_SOURCE: + case ARIZONA_DSP4AUX6MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP5LMIX_INPUT_1_SOURCE: + case CLEARWATER_DSP5LMIX_INPUT_1_VOLUME: + case CLEARWATER_DSP5LMIX_INPUT_2_SOURCE: + case CLEARWATER_DSP5LMIX_INPUT_2_VOLUME: + case CLEARWATER_DSP5LMIX_INPUT_3_SOURCE: + case CLEARWATER_DSP5LMIX_INPUT_3_VOLUME: + case CLEARWATER_DSP5LMIX_INPUT_4_SOURCE: + case CLEARWATER_DSP5LMIX_INPUT_4_VOLUME: + case CLEARWATER_DSP5RMIX_INPUT_1_SOURCE: + case CLEARWATER_DSP5RMIX_INPUT_1_VOLUME: + case CLEARWATER_DSP5RMIX_INPUT_2_SOURCE: + case CLEARWATER_DSP5RMIX_INPUT_2_VOLUME: + case CLEARWATER_DSP5RMIX_INPUT_3_SOURCE: + case CLEARWATER_DSP5RMIX_INPUT_3_VOLUME: + case CLEARWATER_DSP5RMIX_INPUT_4_SOURCE: + case CLEARWATER_DSP5RMIX_INPUT_4_VOLUME: + case CLEARWATER_DSP5AUX1MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP5AUX2MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP5AUX3MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP5AUX4MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP5AUX5MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP5AUX6MIX_INPUT_1_SOURCE: + case CLEARWATER_ASRC1_1LMIX_INPUT_1_SOURCE: + case CLEARWATER_ASRC1_1RMIX_INPUT_1_SOURCE: + case CLEARWATER_ASRC1_2LMIX_INPUT_1_SOURCE: + case CLEARWATER_ASRC1_2RMIX_INPUT_1_SOURCE: + case CLEARWATER_ASRC2_1LMIX_INPUT_1_SOURCE: + case CLEARWATER_ASRC2_1RMIX_INPUT_1_SOURCE: + case CLEARWATER_ASRC2_2LMIX_INPUT_1_SOURCE: + case CLEARWATER_ASRC2_2RMIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC4DEC1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC4DEC2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC4INT1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC4INT2MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP6LMIX_INPUT_1_SOURCE: + case CLEARWATER_DSP6LMIX_INPUT_1_VOLUME: + case CLEARWATER_DSP6LMIX_INPUT_2_SOURCE: + case CLEARWATER_DSP6LMIX_INPUT_2_VOLUME: + case CLEARWATER_DSP6LMIX_INPUT_3_SOURCE: + case CLEARWATER_DSP6LMIX_INPUT_3_VOLUME: + case CLEARWATER_DSP6LMIX_INPUT_4_SOURCE: + case CLEARWATER_DSP6LMIX_INPUT_4_VOLUME: + case CLEARWATER_DSP6RMIX_INPUT_1_SOURCE: + case CLEARWATER_DSP6RMIX_INPUT_1_VOLUME: + case CLEARWATER_DSP6RMIX_INPUT_2_SOURCE: + case CLEARWATER_DSP6RMIX_INPUT_2_VOLUME: + case CLEARWATER_DSP6RMIX_INPUT_3_SOURCE: + case CLEARWATER_DSP6RMIX_INPUT_3_VOLUME: + case CLEARWATER_DSP6RMIX_INPUT_4_SOURCE: + case CLEARWATER_DSP6RMIX_INPUT_4_VOLUME: + case CLEARWATER_DSP6AUX1MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP6AUX2MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP6AUX3MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP6AUX4MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP6AUX5MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP6AUX6MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP7LMIX_INPUT_1_SOURCE: + case CLEARWATER_DSP7LMIX_INPUT_1_VOLUME: + case CLEARWATER_DSP7LMIX_INPUT_2_SOURCE: + case CLEARWATER_DSP7LMIX_INPUT_2_VOLUME: + case CLEARWATER_DSP7LMIX_INPUT_3_SOURCE: + case CLEARWATER_DSP7LMIX_INPUT_3_VOLUME: + case CLEARWATER_DSP7LMIX_INPUT_4_SOURCE: + case CLEARWATER_DSP7LMIX_INPUT_4_VOLUME: + case CLEARWATER_DSP7RMIX_INPUT_1_SOURCE: + case CLEARWATER_DSP7RMIX_INPUT_1_VOLUME: + case CLEARWATER_DSP7RMIX_INPUT_2_SOURCE: + case CLEARWATER_DSP7RMIX_INPUT_2_VOLUME: + case CLEARWATER_DSP7RMIX_INPUT_3_SOURCE: + case CLEARWATER_DSP7RMIX_INPUT_3_VOLUME: + case CLEARWATER_DSP7RMIX_INPUT_4_SOURCE: + case CLEARWATER_DSP7RMIX_INPUT_4_VOLUME: + case CLEARWATER_DSP7AUX1MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP7AUX2MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP7AUX3MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP7AUX4MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP7AUX5MIX_INPUT_1_SOURCE: + case CLEARWATER_DSP7AUX6MIX_INPUT_1_SOURCE: + case MOON_DFC1MIX_INPUT_1_SOURCE: + case MOON_DFC2MIX_INPUT_1_SOURCE: + case MOON_DFC3MIX_INPUT_1_SOURCE: + case MOON_DFC4MIX_INPUT_1_SOURCE: + case MOON_DFC5MIX_INPUT_1_SOURCE: + case MOON_DFC6MIX_INPUT_1_SOURCE: + case MOON_DFC7MIX_INPUT_1_SOURCE: + case MOON_DFC8MIX_INPUT_1_SOURCE: + case ARIZONA_FX_CTRL1: + case ARIZONA_FX_CTRL2: + case ARIZONA_EQ1_1: + case ARIZONA_EQ1_2: + case ARIZONA_EQ1_3: + case ARIZONA_EQ1_4: + case ARIZONA_EQ1_5: + case ARIZONA_EQ1_6: + case ARIZONA_EQ1_7: + case ARIZONA_EQ1_8: + case ARIZONA_EQ1_9: + case ARIZONA_EQ1_10: + case ARIZONA_EQ1_11: + case ARIZONA_EQ1_12: + case ARIZONA_EQ1_13: + case ARIZONA_EQ1_14: + case ARIZONA_EQ1_15: + case ARIZONA_EQ1_16: + case ARIZONA_EQ1_17: + case ARIZONA_EQ1_18: + case ARIZONA_EQ1_19: + case ARIZONA_EQ1_20: + case ARIZONA_EQ1_21: + case ARIZONA_EQ2_1: + case ARIZONA_EQ2_2: + case ARIZONA_EQ2_3: + case ARIZONA_EQ2_4: + case ARIZONA_EQ2_5: + case ARIZONA_EQ2_6: + case ARIZONA_EQ2_7: + case ARIZONA_EQ2_8: + case ARIZONA_EQ2_9: + case ARIZONA_EQ2_10: + case ARIZONA_EQ2_11: + case ARIZONA_EQ2_12: + case ARIZONA_EQ2_13: + case ARIZONA_EQ2_14: + case ARIZONA_EQ2_15: + case ARIZONA_EQ2_16: + case ARIZONA_EQ2_17: + case ARIZONA_EQ2_18: + case ARIZONA_EQ2_19: + case ARIZONA_EQ2_20: + case ARIZONA_EQ2_21: + case ARIZONA_EQ3_1: + case ARIZONA_EQ3_2: + case ARIZONA_EQ3_3: + case ARIZONA_EQ3_4: + case ARIZONA_EQ3_5: + case ARIZONA_EQ3_6: + case ARIZONA_EQ3_7: + case ARIZONA_EQ3_8: + case ARIZONA_EQ3_9: + case ARIZONA_EQ3_10: + case ARIZONA_EQ3_11: + case ARIZONA_EQ3_12: + case ARIZONA_EQ3_13: + case ARIZONA_EQ3_14: + case ARIZONA_EQ3_15: + case ARIZONA_EQ3_16: + case ARIZONA_EQ3_17: + case ARIZONA_EQ3_18: + case ARIZONA_EQ3_19: + case ARIZONA_EQ3_20: + case ARIZONA_EQ3_21: + case ARIZONA_EQ4_1: + case ARIZONA_EQ4_2: + case ARIZONA_EQ4_3: + case ARIZONA_EQ4_4: + case ARIZONA_EQ4_5: + case ARIZONA_EQ4_6: + case ARIZONA_EQ4_7: + case ARIZONA_EQ4_8: + case ARIZONA_EQ4_9: + case ARIZONA_EQ4_10: + case ARIZONA_EQ4_11: + case ARIZONA_EQ4_12: + case ARIZONA_EQ4_13: + case ARIZONA_EQ4_14: + case ARIZONA_EQ4_15: + case ARIZONA_EQ4_16: + case ARIZONA_EQ4_17: + case ARIZONA_EQ4_18: + case ARIZONA_EQ4_19: + case ARIZONA_EQ4_20: + case ARIZONA_EQ4_21: + case ARIZONA_DRC1_CTRL1: + case ARIZONA_DRC1_CTRL2: + case ARIZONA_DRC1_CTRL3: + case ARIZONA_DRC1_CTRL4: + case ARIZONA_DRC1_CTRL5: + case CLEARWATER_DRC2_CTRL1: + case CLEARWATER_DRC2_CTRL2: + case CLEARWATER_DRC2_CTRL3: + case CLEARWATER_DRC2_CTRL4: + case CLEARWATER_DRC2_CTRL5: + case ARIZONA_HPLPF1_1: + case ARIZONA_HPLPF1_2: + case ARIZONA_HPLPF2_1: + case ARIZONA_HPLPF2_2: + case ARIZONA_HPLPF3_1: + case ARIZONA_HPLPF3_2: + case ARIZONA_HPLPF4_1: + case ARIZONA_HPLPF4_2: + case CLEARWATER_ASRC1_ENABLE: + case CLEARWATER_ASRC1_STATUS: + case CLEARWATER_ASRC1_RATE1: + case CLEARWATER_ASRC1_RATE2: + case CLEARWATER_ASRC2_ENABLE: + case CLEARWATER_ASRC2_STATUS: + case CLEARWATER_ASRC2_RATE1: + case CLEARWATER_ASRC2_RATE2: + case ARIZONA_ISRC_1_CTRL_1: + case ARIZONA_ISRC_1_CTRL_2: + case ARIZONA_ISRC_1_CTRL_3: + case ARIZONA_ISRC_2_CTRL_1: + case ARIZONA_ISRC_2_CTRL_2: + case ARIZONA_ISRC_2_CTRL_3: + case ARIZONA_ISRC_3_CTRL_1: + case ARIZONA_ISRC_3_CTRL_2: + case ARIZONA_ISRC_3_CTRL_3: + case ARIZONA_ISRC_4_CTRL_1: + case ARIZONA_ISRC_4_CTRL_2: + case ARIZONA_ISRC_4_CTRL_3: + case ARIZONA_CLOCK_CONTROL: + case ARIZONA_ANC_SRC: + case ARIZONA_DSP_STATUS: + case ARIZONA_ANC_COEFF_START ... ARIZONA_ANC_COEFF_END: + case ARIZONA_FCL_FILTER_CONTROL: + case ARIZONA_FCL_ADC_REFORMATTER_CONTROL: + case ARIZONA_FCL_COEFF_START ... ARIZONA_FCL_COEFF_END: + case CLEARWATER_FCR_FILTER_CONTROL: + case CLEARWATER_FCR_ADC_REFORMATTER_CONTROL: + case CLEARWATER_FCR_COEFF_START ... CLEARWATER_FCR_COEFF_END: + case CLEARWATER_DAC_COMP_1: + case CLEARWATER_DAC_COMP_2: + case CLEARWATER_FRF_COEFFICIENT_1L_1: + case CLEARWATER_FRF_COEFFICIENT_1L_2: + case CLEARWATER_FRF_COEFFICIENT_1L_3: + case CLEARWATER_FRF_COEFFICIENT_1L_4: + case CLEARWATER_FRF_COEFFICIENT_1R_1: + case CLEARWATER_FRF_COEFFICIENT_1R_2: + case CLEARWATER_FRF_COEFFICIENT_1R_3: + case CLEARWATER_FRF_COEFFICIENT_1R_4: + case CLEARWATER_FRF_COEFFICIENT_2L_1: + case CLEARWATER_FRF_COEFFICIENT_2L_2: + case CLEARWATER_FRF_COEFFICIENT_2L_3: + case CLEARWATER_FRF_COEFFICIENT_2L_4: + case CLEARWATER_FRF_COEFFICIENT_2R_1: + case CLEARWATER_FRF_COEFFICIENT_2R_2: + case CLEARWATER_FRF_COEFFICIENT_2R_3: + case CLEARWATER_FRF_COEFFICIENT_2R_4: + case CLEARWATER_FRF_COEFFICIENT_3L_1: + case CLEARWATER_FRF_COEFFICIENT_3L_2: + case CLEARWATER_FRF_COEFFICIENT_3L_3: + case CLEARWATER_FRF_COEFFICIENT_3L_4: + case CLEARWATER_FRF_COEFFICIENT_3R_1: + case CLEARWATER_FRF_COEFFICIENT_3R_2: + case CLEARWATER_FRF_COEFFICIENT_3R_3: + case CLEARWATER_FRF_COEFFICIENT_3R_4: + case CLEARWATER_FRF_COEFFICIENT_5L_1: + case CLEARWATER_FRF_COEFFICIENT_5L_2: + case CLEARWATER_FRF_COEFFICIENT_5L_3: + case CLEARWATER_FRF_COEFFICIENT_5L_4: + case CLEARWATER_FRF_COEFFICIENT_5R_1: + case CLEARWATER_FRF_COEFFICIENT_5R_2: + case CLEARWATER_FRF_COEFFICIENT_5R_3: + case CLEARWATER_FRF_COEFFICIENT_5R_4: + case MOON_DFC1_CTRL: + case MOON_DFC1_RX: + case MOON_DFC1_TX: + case MOON_DFC2_CTRL: + case MOON_DFC2_RX: + case MOON_DFC2_TX: + case MOON_DFC3_CTRL: + case MOON_DFC3_RX: + case MOON_DFC3_TX: + case MOON_DFC4_CTRL: + case MOON_DFC4_RX: + case MOON_DFC4_TX: + case MOON_DFC5_CTRL: + case MOON_DFC5_RX: + case MOON_DFC5_TX: + case MOON_DFC6_CTRL: + case MOON_DFC6_RX: + case MOON_DFC6_TX: + case MOON_DFC7_CTRL: + case MOON_DFC7_RX: + case MOON_DFC7_TX: + case MOON_DFC8_CTRL: + case MOON_DFC8_RX: + case MOON_DFC8_TX: + case MOON_DFC_STATUS: + case CLEARWATER_GPIO1_CTRL_1: + case CLEARWATER_GPIO1_CTRL_2: + case CLEARWATER_GPIO2_CTRL_1: + case CLEARWATER_GPIO2_CTRL_2: + case CLEARWATER_GPIO3_CTRL_1: + case CLEARWATER_GPIO3_CTRL_2: + case CLEARWATER_GPIO4_CTRL_1: + case CLEARWATER_GPIO4_CTRL_2: + case CLEARWATER_GPIO5_CTRL_1: + case CLEARWATER_GPIO5_CTRL_2: + case CLEARWATER_GPIO6_CTRL_1: + case CLEARWATER_GPIO6_CTRL_2: + case CLEARWATER_GPIO7_CTRL_1: + case CLEARWATER_GPIO7_CTRL_2: + case CLEARWATER_GPIO8_CTRL_1: + case CLEARWATER_GPIO8_CTRL_2: + case CLEARWATER_GPIO9_CTRL_1: + case CLEARWATER_GPIO9_CTRL_2: + case CLEARWATER_GPIO10_CTRL_1: + case CLEARWATER_GPIO10_CTRL_2: + case CLEARWATER_GPIO11_CTRL_1: + case CLEARWATER_GPIO11_CTRL_2: + case CLEARWATER_GPIO12_CTRL_1: + case CLEARWATER_GPIO12_CTRL_2: + case CLEARWATER_GPIO13_CTRL_1: + case CLEARWATER_GPIO13_CTRL_2: + case CLEARWATER_GPIO14_CTRL_1: + case CLEARWATER_GPIO14_CTRL_2: + case CLEARWATER_GPIO15_CTRL_1: + case CLEARWATER_GPIO15_CTRL_2: + case CLEARWATER_GPIO16_CTRL_1: + case CLEARWATER_GPIO16_CTRL_2: + case CLEARWATER_GPIO17_CTRL_1: + case CLEARWATER_GPIO17_CTRL_2: + case CLEARWATER_GPIO18_CTRL_1: + case CLEARWATER_GPIO18_CTRL_2: + case CLEARWATER_GPIO19_CTRL_1: + case CLEARWATER_GPIO19_CTRL_2: + case CLEARWATER_GPIO20_CTRL_1: + case CLEARWATER_GPIO20_CTRL_2: + case CLEARWATER_GPIO21_CTRL_1: + case CLEARWATER_GPIO21_CTRL_2: + case CLEARWATER_GPIO22_CTRL_1: + case CLEARWATER_GPIO22_CTRL_2: + case CLEARWATER_GPIO23_CTRL_1: + case CLEARWATER_GPIO23_CTRL_2: + case CLEARWATER_GPIO24_CTRL_1: + case CLEARWATER_GPIO24_CTRL_2: + case CLEARWATER_GPIO25_CTRL_1: + case CLEARWATER_GPIO25_CTRL_2: + case CLEARWATER_GPIO26_CTRL_1: + case CLEARWATER_GPIO26_CTRL_2: + case CLEARWATER_GPIO27_CTRL_1: + case CLEARWATER_GPIO27_CTRL_2: + case CLEARWATER_GPIO28_CTRL_1: + case CLEARWATER_GPIO28_CTRL_2: + case CLEARWATER_GPIO29_CTRL_1: + case CLEARWATER_GPIO29_CTRL_2: + case CLEARWATER_GPIO30_CTRL_1: + case CLEARWATER_GPIO30_CTRL_2: + case CLEARWATER_GPIO31_CTRL_1: + case CLEARWATER_GPIO31_CTRL_2: + case CLEARWATER_GPIO32_CTRL_1: + case CLEARWATER_GPIO32_CTRL_2: + case CLEARWATER_GPIO33_CTRL_1: + case CLEARWATER_GPIO33_CTRL_2: + case CLEARWATER_GPIO34_CTRL_1: + case CLEARWATER_GPIO34_CTRL_2: + case CLEARWATER_GPIO35_CTRL_1: + case CLEARWATER_GPIO35_CTRL_2: + case CLEARWATER_GPIO36_CTRL_1: + case CLEARWATER_GPIO36_CTRL_2: + case CLEARWATER_GPIO37_CTRL_1: + case CLEARWATER_GPIO37_CTRL_2: + case CLEARWATER_GPIO38_CTRL_1: + case CLEARWATER_GPIO38_CTRL_2: + case CLEARWATER_IRQ1_STATUS_1: + case CLEARWATER_IRQ1_STATUS_2: + case CLEARWATER_IRQ1_STATUS_6: + case CLEARWATER_IRQ1_STATUS_7: + case CLEARWATER_IRQ1_STATUS_9: + case CLEARWATER_IRQ1_STATUS_11: + case CLEARWATER_IRQ1_STATUS_12: + case CLEARWATER_IRQ1_STATUS_13: + case CLEARWATER_IRQ1_STATUS_14: + case CLEARWATER_IRQ1_STATUS_15: + case CLEARWATER_IRQ1_STATUS_17: + case CLEARWATER_IRQ1_STATUS_18: + case CLEARWATER_IRQ1_STATUS_19: + case CLEARWATER_IRQ1_STATUS_21: + case CLEARWATER_IRQ1_STATUS_22: + case CLEARWATER_IRQ1_STATUS_23: + case CLEARWATER_IRQ1_STATUS_24: + case CLEARWATER_IRQ1_STATUS_25: + case CLEARWATER_IRQ1_STATUS_27: + case CLEARWATER_IRQ1_STATUS_28: + case CLEARWATER_IRQ1_STATUS_30: + case CLEARWATER_IRQ1_STATUS_31: + case CLEARWATER_IRQ1_STATUS_32: + case CLEARWATER_IRQ1_MASK_1: + case CLEARWATER_IRQ1_MASK_2: + case CLEARWATER_IRQ1_MASK_3: + case CLEARWATER_IRQ1_MASK_4: + case CLEARWATER_IRQ1_MASK_5: + case CLEARWATER_IRQ1_MASK_6: + case CLEARWATER_IRQ1_MASK_7: + case CLEARWATER_IRQ1_MASK_8: + case CLEARWATER_IRQ1_MASK_9: + case CLEARWATER_IRQ1_MASK_10: + case CLEARWATER_IRQ1_MASK_11: + case CLEARWATER_IRQ1_MASK_12: + case CLEARWATER_IRQ1_MASK_13: + case CLEARWATER_IRQ1_MASK_14: + case CLEARWATER_IRQ1_MASK_15: + case MOON_IRQ1_MASK_16: + case CLEARWATER_IRQ1_MASK_17: + case CLEARWATER_IRQ1_MASK_18: + case CLEARWATER_IRQ1_MASK_19: + case MOON_IRQ1_MASK_20: + case CLEARWATER_IRQ1_MASK_21: + case CLEARWATER_IRQ1_MASK_22: + case CLEARWATER_IRQ1_MASK_23: + case CLEARWATER_IRQ1_MASK_24: + case CLEARWATER_IRQ1_MASK_25: + case MOON_IRQ1_MASK_26: + case CLEARWATER_IRQ1_MASK_27: + case CLEARWATER_IRQ1_MASK_28: + case MOON_IRQ1_MASK_29: + case CLEARWATER_IRQ1_MASK_30: + case CLEARWATER_IRQ1_MASK_31: + case CLEARWATER_IRQ1_MASK_32: + case MOON_IRQ1_MASK_33: + case CLEARWATER_IRQ1_RAW_STATUS_1: + case CLEARWATER_IRQ1_RAW_STATUS_2: + case CLEARWATER_IRQ1_RAW_STATUS_7: + case CLEARWATER_IRQ1_RAW_STATUS_9: + case CLEARWATER_IRQ1_RAW_STATUS_11: + case CLEARWATER_IRQ1_RAW_STATUS_12: + case CLEARWATER_IRQ1_RAW_STATUS_13: + case CLEARWATER_IRQ1_RAW_STATUS_14: + case CLEARWATER_IRQ1_RAW_STATUS_15: + case CLEARWATER_IRQ1_RAW_STATUS_17: + case CLEARWATER_IRQ1_RAW_STATUS_18: + case CLEARWATER_IRQ1_RAW_STATUS_19: + case CLEARWATER_IRQ1_RAW_STATUS_21: + case CLEARWATER_IRQ1_RAW_STATUS_22: + case CLEARWATER_IRQ1_RAW_STATUS_23: + case CLEARWATER_IRQ1_RAW_STATUS_24: + case CLEARWATER_IRQ1_RAW_STATUS_25: + case CLEARWATER_IRQ1_RAW_STATUS_30: + case CLEARWATER_IRQ1_RAW_STATUS_31: + case CLEARWATER_IRQ1_RAW_STATUS_32: + case CLEARWATER_IRQ2_STATUS_9: + case CLEARWATER_IRQ2_MASK_9: + case CLEARWATER_IRQ2_RAW_STATUS_9: + case CLEARWATER_IRQ1_CTRL: + case MOON_IRQ1_STATUS_33: + return true; + default: + return false; + } +} + +static bool moon_16bit_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_SOFTWARE_RESET: + case ARIZONA_DEVICE_REVISION: + case ARIZONA_HAPTICS_STATUS: + case ARIZONA_SAMPLE_RATE_1_STATUS: + case ARIZONA_SAMPLE_RATE_2_STATUS: + case ARIZONA_SAMPLE_RATE_3_STATUS: + case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: + case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: + case ARIZONA_HP_CTRL_1L: + case ARIZONA_HP_CTRL_1R: + case ARIZONA_HP_CTRL_2L: + case ARIZONA_HP_CTRL_2R: + case ARIZONA_HP_CTRL_3L: + case ARIZONA_HP_CTRL_3R: + case ARIZONA_MIC_DETECT_3: + case ARIZONA_MIC_DETECT_4: + case MOON_MICDET2_CONTROL_3: + case MOON_MICDET2_CONTROL_4: + case ARIZONA_HEADPHONE_DETECT_2: + case ARIZONA_HEADPHONE_DETECT_3: + case ARIZONA_HP_DACVAL: + case ARIZONA_INPUT_ENABLES_STATUS: + case ARIZONA_OUTPUT_STATUS_1: + case ARIZONA_RAW_OUTPUT_STATUS_1: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_1: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_2: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_3: + case ARIZONA_SLIMBUS_RX_PORT_STATUS: + case ARIZONA_SLIMBUS_TX_PORT_STATUS: + case ARIZONA_FX_CTRL2: + case CLEARWATER_ASRC2_STATUS: + case CLEARWATER_ASRC1_STATUS: + case MOON_DFC_STATUS: + case CLEARWATER_IRQ1_STATUS_1: + case CLEARWATER_IRQ1_STATUS_2: + case CLEARWATER_IRQ1_STATUS_6: + case CLEARWATER_IRQ1_STATUS_7: + case CLEARWATER_IRQ1_STATUS_9: + case CLEARWATER_IRQ1_STATUS_11: + case CLEARWATER_IRQ1_STATUS_12: + case CLEARWATER_IRQ1_STATUS_13: + case CLEARWATER_IRQ1_STATUS_14: + case CLEARWATER_IRQ1_STATUS_15: + case CLEARWATER_IRQ1_STATUS_17: + case CLEARWATER_IRQ1_STATUS_18: + case CLEARWATER_IRQ1_STATUS_19: + case CLEARWATER_IRQ1_STATUS_21: + case CLEARWATER_IRQ1_STATUS_22: + case CLEARWATER_IRQ1_STATUS_23: + case CLEARWATER_IRQ1_STATUS_24: + case CLEARWATER_IRQ1_STATUS_25: + case CLEARWATER_IRQ1_STATUS_27: + case CLEARWATER_IRQ1_STATUS_28: + case CLEARWATER_IRQ1_STATUS_30: + case CLEARWATER_IRQ1_STATUS_31: + case CLEARWATER_IRQ1_STATUS_32: + case MOON_IRQ1_STATUS_33: + case CLEARWATER_IRQ1_RAW_STATUS_1: + case CLEARWATER_IRQ1_RAW_STATUS_2: + case CLEARWATER_IRQ1_RAW_STATUS_7: + case CLEARWATER_IRQ1_RAW_STATUS_9: + case CLEARWATER_IRQ1_RAW_STATUS_11: + case CLEARWATER_IRQ1_RAW_STATUS_12: + case CLEARWATER_IRQ1_RAW_STATUS_13: + case CLEARWATER_IRQ1_RAW_STATUS_14: + case CLEARWATER_IRQ1_RAW_STATUS_15: + case CLEARWATER_IRQ1_RAW_STATUS_17: + case CLEARWATER_IRQ1_RAW_STATUS_18: + case CLEARWATER_IRQ1_RAW_STATUS_19: + case CLEARWATER_IRQ1_RAW_STATUS_21: + case CLEARWATER_IRQ1_RAW_STATUS_22: + case CLEARWATER_IRQ1_RAW_STATUS_23: + case CLEARWATER_IRQ1_RAW_STATUS_24: + case CLEARWATER_IRQ1_RAW_STATUS_25: + case CLEARWATER_IRQ1_RAW_STATUS_30: + case CLEARWATER_IRQ1_RAW_STATUS_31: + case CLEARWATER_IRQ1_RAW_STATUS_32: + case CLEARWATER_IRQ2_STATUS_9: + case CLEARWATER_IRQ2_RAW_STATUS_9: + return true; + default: + return false; + } +} + +static bool moon_32bit_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_WSEQ_SEQUENCE_1 ... ARIZONA_WSEQ_SEQUENCE_508: + case CLEARWATER_OTP_HPDET_CALIB_1 ... CLEARWATER_OTP_HPDET_CALIB_2: + case CLEARWATER_DSP1_CONFIG ... MOON_DSP1_PMEM_ERR_ADDR_XMEM_ERR_ADDR: + case CLEARWATER_DSP2_CONFIG ... MOON_DSP2_PMEM_ERR_ADDR_XMEM_ERR_ADDR: + case CLEARWATER_DSP3_CONFIG ... MOON_DSP3_PMEM_ERR_ADDR_XMEM_ERR_ADDR: + case CLEARWATER_DSP4_CONFIG ... MOON_DSP4_PMEM_ERR_ADDR_XMEM_ERR_ADDR: + case CLEARWATER_DSP5_CONFIG ... MOON_DSP5_PMEM_ERR_ADDR_XMEM_ERR_ADDR: + case CLEARWATER_DSP6_CONFIG ... MOON_DSP6_PMEM_ERR_ADDR_XMEM_ERR_ADDR: + case CLEARWATER_DSP7_CONFIG ... MOON_DSP7_PMEM_ERR_ADDR_XMEM_ERR_ADDR: + return true; + default: + return moon_is_adsp_memory(dev, reg); + } +} + +static bool moon_32bit_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_WSEQ_SEQUENCE_1 ... ARIZONA_WSEQ_SEQUENCE_508: + case CLEARWATER_OTP_HPDET_CALIB_1 ... CLEARWATER_OTP_HPDET_CALIB_2: + case CLEARWATER_DSP1_CONFIG ... MOON_DSP1_PMEM_ERR_ADDR_XMEM_ERR_ADDR: + case CLEARWATER_DSP2_CONFIG ... MOON_DSP2_PMEM_ERR_ADDR_XMEM_ERR_ADDR: + case CLEARWATER_DSP3_CONFIG ... MOON_DSP3_PMEM_ERR_ADDR_XMEM_ERR_ADDR: + case CLEARWATER_DSP4_CONFIG ... MOON_DSP4_PMEM_ERR_ADDR_XMEM_ERR_ADDR: + case CLEARWATER_DSP5_CONFIG ... MOON_DSP5_PMEM_ERR_ADDR_XMEM_ERR_ADDR: + case CLEARWATER_DSP6_CONFIG ... MOON_DSP6_PMEM_ERR_ADDR_XMEM_ERR_ADDR: + case CLEARWATER_DSP7_CONFIG ... MOON_DSP7_PMEM_ERR_ADDR_XMEM_ERR_ADDR: + return true; + default: + return moon_is_adsp_memory(dev, reg); + } +} + +const struct regmap_config moon_16bit_spi_regmap = { + .name = "moon_16bit", + .reg_bits = 32, + .pad_bits = 16, + .val_bits = 16, + + .max_register = CLEARWATER_INTERRUPT_RAW_STATUS_1, + .readable_reg = moon_16bit_readable_register, + .volatile_reg = moon_16bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = moon_reg_default, + .num_reg_defaults = ARRAY_SIZE(moon_reg_default), +}; +EXPORT_SYMBOL_GPL(moon_16bit_spi_regmap); + +const struct regmap_config moon_16bit_i2c_regmap = { + .name = "moon_16bit", + .reg_bits = 32, + .val_bits = 16, + + .max_register = CLEARWATER_INTERRUPT_RAW_STATUS_1, + .readable_reg = moon_16bit_readable_register, + .volatile_reg = moon_16bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = moon_reg_default, + .num_reg_defaults = ARRAY_SIZE(moon_reg_default), +}; +EXPORT_SYMBOL_GPL(moon_16bit_i2c_regmap); + +const struct regmap_config moon_32bit_spi_regmap = { + .name = "moon_32bit", + .reg_bits = 32, + .reg_stride = 2, + .pad_bits = 16, + .val_bits = 32, + + .max_register = MOON_DSP7_PMEM_ERR_ADDR_XMEM_ERR_ADDR, + .readable_reg = moon_32bit_readable_register, + .volatile_reg = moon_32bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, +}; +EXPORT_SYMBOL_GPL(moon_32bit_spi_regmap); + +const struct regmap_config moon_32bit_i2c_regmap = { + .name = "moon_32bit", + .reg_bits = 32, + .reg_stride = 2, + .val_bits = 32, + + .max_register = MOON_DSP7_PMEM_ERR_ADDR_XMEM_ERR_ADDR, + .readable_reg = moon_32bit_readable_register, + .volatile_reg = moon_32bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, +}; +EXPORT_SYMBOL_GPL(moon_32bit_i2c_regmap); diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 9f7d5fc64a7..ea830bfcadd 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -33,6 +33,8 @@ enum arizona_type { WM1831 = 9, CS47L24 = 10, CS47L35 = 11, + CS47L90 = 12, + CS47L91 = 13, }; #define ARIZONA_IRQ_GP1 0 @@ -112,8 +114,17 @@ enum arizona_type { #define ARIZONA_IRQ_HP1L_SC_POS 74 #define ARIZONA_IRQ_FLL3_LOCK 75 #define ARIZONA_IRQ_FLL3_CLOCK_OK 76 - -#define ARIZONA_NUM_IRQ 77 +#define MOON_IRQ_FLLAO_CLOCK_OK 77 +#define MOON_IRQ_MICDET2 78 +#define MOON_IRQ_DSP1_BUS_ERROR 79 +#define MOON_IRQ_DSP2_BUS_ERROR 80 +#define MOON_IRQ_DSP3_BUS_ERROR 81 +#define MOON_IRQ_DSP4_BUS_ERROR 82 +#define MOON_IRQ_DSP5_BUS_ERROR 83 +#define MOON_IRQ_DSP6_BUS_ERROR 84 +#define MOON_IRQ_DSP7_BUS_ERROR 85 + +#define ARIZONA_NUM_IRQ 86 #define ARIZONA_HP_SHORT_IMPEDANCE 4 struct snd_soc_dapm_context; @@ -194,6 +205,7 @@ int vegas_patch(struct arizona *arizona); int clearwater_patch(struct arizona *arizona); int largo_patch(struct arizona *arizona); int marley_patch(struct arizona *arizona); +int moon_patch(struct arizona *arizona); extern int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, bool mandatory); diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index e218c81caf8..764b3f00bef 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -51,6 +51,10 @@ #define ARIZONA_MAX_INPUT 12 #define ARIZONA_MAX_MICBIAS 4 +#define ARIZONA_MAX_CHILD_MICBIAS 4 + +#define MARLEY_NUM_CHILD_MICBIAS 2 +#define MOON_NUM_CHILD_MICBIAS 4 #define ARIZONA_MAX_OUTPUT 6 @@ -73,13 +77,15 @@ struct arizona_jd_state; struct arizona_micbias { int mV; /** Regulated voltage */ unsigned int ext_cap:1; /** External capacitor fitted */ - unsigned int discharge:1; /** Actively discharge */ + /** Actively discharge */ + unsigned int discharge[ARIZONA_MAX_CHILD_MICBIAS]; unsigned int soft_start:1; /** Disable aggressive startup ramp rate */ unsigned int bypass:1; /** Use bypass mode */ }; struct arizona_micd_config { unsigned int src; + unsigned int gnd; unsigned int bias; bool gpio; }; @@ -247,6 +253,9 @@ struct arizona_pdata { /** Reference voltage for DMIC inputs */ int dmic_ref[ARIZONA_MAX_INPUT]; + /** Clock Source for DMIC's */ + int dmic_clksrc[ARIZONA_MAX_INPUT]; + /** MICBIAS configurations */ struct arizona_micbias micbias[ARIZONA_MAX_MICBIAS]; diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 94e5ff8432f..a62a01804ee 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -151,6 +151,17 @@ #define ARIZONA_FLL3_SYNCHRONISER_7 0x1C7 #define ARIZONA_FLL3_SPREAD_SPECTRUM 0x1C9 #define ARIZONA_FLL3_GPIO_CLOCK 0x1CA +#define MOON_FLLAO_CONTROL_1 0x1D1 +#define MOON_FLLAO_CONTROL_2 0x1D2 +#define MOON_FLLAO_CONTROL_3 0x1D3 +#define MOON_FLLAO_CONTROL_4 0x1D4 +#define MOON_FLLAO_CONTROL_5 0x1D5 +#define MOON_FLLAO_CONTROL_6 0x1D6 +#define MOON_FLLAO_CONTROL_7 0x1D8 +#define MOON_FLLAO_CONTROL_8 0x1DA +#define MOON_FLLAO_CONTROL_9 0x1DB +#define MOON_FLLAO_CONTROL_10 0x1DC +#define MOON_FLLAO_CONTROL_11 0x1DD #define ARIZONA_MIC_CHARGE_PUMP_1 0x200 #define CLEARWATER_CP_MODE 0x20B #define ARIZONA_LDO1_CONTROL_1 0x210 @@ -172,11 +183,13 @@ #define ARIZONA_DCS_HP1R_CONTROL 0x238 #define CLEARWATER_EDRE_HP_STEREO_CONTROL 0x27E #define ARIZONA_ACCESSORY_DETECT_MODE_1 0x293 +#define MOON_HEADPHONE_DETECT_0 0x299 #define ARIZONA_HEADPHONE_DETECT_1 0x29B #define ARIZONA_HEADPHONE_DETECT_2 0x29C #define ARIZONA_HEADPHONE_DETECT_3 0x29D #define ARIZONA_HP_DACVAL 0x29F #define ARIZONA_MICD_CLAMP_CONTROL 0x2A2 +#define MOON_MIC_DETECT_0 0x2A2 #define ARIZONA_MIC_DETECT_1 0x2A3 #define ARIZONA_MIC_DETECT_2 0x2A4 #define ARIZONA_MIC_DETECT_3 0x2A5 @@ -185,6 +198,15 @@ #define ARIZONA_MIC_DETECT_LEVEL_3 0x2A8 #define ARIZONA_MIC_DETECT_LEVEL_4 0x2A9 #define ARIZONA_MIC_DETECT_4 0x2AB +#define MOON_MICDET2_CONTROL_0 0x2B2 +#define MOON_MICDET2_CONTROL_1 0x2B3 +#define MOON_MICDET2_CONTROL_2 0x2B4 +#define MOON_MICDET2_CONTROL_3 0x2B5 +#define MOON_MICDET2_LEVEL_1 0x2B6 +#define MOON_MICDET2_LEVEL_2 0x2B7 +#define MOON_MICDET2_LEVEL_3 0x2B8 +#define MOON_MICDET2_LEVEL_4 0x2B9 +#define MOON_MICDET2_CONTROL_4 0x2BB #define ARIZONA_MIC_NOISE_MIX_CONTROL_1 0x2C3 #define CLEARWATER_MICD_CLAMP_CONTROL 0x2C6 #define ARIZONA_ISOLATION_CONTROL 0x2CB @@ -197,33 +219,43 @@ #define ARIZONA_IN1L_CONTROL 0x310 #define ARIZONA_ADC_DIGITAL_VOLUME_1L 0x311 #define ARIZONA_DMIC1L_CONTROL 0x312 +#define MOON_IN1L_RATE_CONTROL 0x313 #define ARIZONA_IN1R_CONTROL 0x314 #define ARIZONA_ADC_DIGITAL_VOLUME_1R 0x315 #define ARIZONA_DMIC1R_CONTROL 0x316 +#define MOON_IN1R_RATE_CONTROL 0x317 #define ARIZONA_IN2L_CONTROL 0x318 #define ARIZONA_ADC_DIGITAL_VOLUME_2L 0x319 #define ARIZONA_DMIC2L_CONTROL 0x31A +#define MOON_IN2L_RATE_CONTROL 0x31B #define ARIZONA_IN2R_CONTROL 0x31C #define ARIZONA_ADC_DIGITAL_VOLUME_2R 0x31D #define ARIZONA_DMIC2R_CONTROL 0x31E +#define MOON_IN2R_RATE_CONTROL 0x31F #define ARIZONA_IN3L_CONTROL 0x320 #define ARIZONA_ADC_DIGITAL_VOLUME_3L 0x321 #define ARIZONA_DMIC3L_CONTROL 0x322 +#define MOON_IN3L_RATE_CONTROL 0x323 #define ARIZONA_IN3R_CONTROL 0x324 #define ARIZONA_ADC_DIGITAL_VOLUME_3R 0x325 #define ARIZONA_DMIC3R_CONTROL 0x326 +#define MOON_IN3R_RATE_CONTROL 0x327 #define ARIZONA_IN4L_CONTROL 0x328 #define ARIZONA_ADC_DIGITAL_VOLUME_4L 0x329 #define ARIZONA_DMIC4L_CONTROL 0x32A +#define MOON_IN4L_RATE_CONTROL 0x32B #define ARIZONA_IN4R_CONTROL 0x32C #define ARIZONA_ADC_DIGITAL_VOLUME_4R 0x32D #define ARIZONA_DMIC4R_CONTROL 0x32E +#define MOON_IN4R_RATE_CONTROL 0x32F #define ARIZONA_IN5L_CONTROL 0x330 #define ARIZONA_ADC_DIGITAL_VOLUME_5L 0x331 #define ARIZONA_DMIC5L_CONTROL 0x332 +#define MOON_IN5L_RATE_CONTROL 0x333 #define ARIZONA_IN5R_CONTROL 0x334 #define ARIZONA_ADC_DIGITAL_VOLUME_5R 0x335 #define ARIZONA_DMIC5R_CONTROL 0x336 +#define MOON_IN5R_RATE_CONTROL 0x337 #define ARIZONA_IN6L_CONTROL 0x338 #define ARIZONA_ADC_DIGITAL_VOLUME_6L 0x339 #define ARIZONA_DMIC6L_CONTROL 0x33A @@ -245,6 +277,7 @@ #define ARIZONA_OUTPUT_PATH_CONFIG_1L 0x410 #define ARIZONA_DAC_DIGITAL_VOLUME_1L 0x411 #define ARIZONA_DAC_VOLUME_LIMIT_1L 0x412 +#define MOON_OUT1_CONFIG 0x412 #define ARIZONA_NOISE_GATE_SELECT_1L 0x413 #define ARIZONA_OUTPUT_PATH_CONFIG_1R 0x414 #define ARIZONA_DAC_DIGITAL_VOLUME_1R 0x415 @@ -253,6 +286,7 @@ #define ARIZONA_OUTPUT_PATH_CONFIG_2L 0x418 #define ARIZONA_DAC_DIGITAL_VOLUME_2L 0x419 #define ARIZONA_DAC_VOLUME_LIMIT_2L 0x41A +#define MOON_OUT2_CONFIG 0x41A #define ARIZONA_NOISE_GATE_SELECT_2L 0x41B #define ARIZONA_OUTPUT_PATH_CONFIG_2R 0x41C #define ARIZONA_DAC_DIGITAL_VOLUME_2R 0x41D @@ -1143,6 +1177,14 @@ #define ARIZONA_AOD_IRQ_MASK_IRQ2 0xD54 #define ARIZONA_AOD_IRQ_RAW_STATUS 0xD55 #define ARIZONA_JACK_DETECT_DEBOUNCE 0xD56 +#define MOON_DFC1MIX_INPUT_1_SOURCE 0xDC0 +#define MOON_DFC2MIX_INPUT_1_SOURCE 0xDC8 +#define MOON_DFC3MIX_INPUT_1_SOURCE 0xDD0 +#define MOON_DFC4MIX_INPUT_1_SOURCE 0xDD8 +#define MOON_DFC5MIX_INPUT_1_SOURCE 0xDE0 +#define MOON_DFC6MIX_INPUT_1_SOURCE 0xDE8 +#define MOON_DFC7MIX_INPUT_1_SOURCE 0xDF0 +#define MOON_DFC8MIX_INPUT_1_SOURCE 0xDF8 #define ARIZONA_FX_CTRL1 0xE00 #define ARIZONA_FX_CTRL2 0xE01 #define ARIZONA_EQ1_1 0xE10 @@ -1475,6 +1517,31 @@ #define ARIZONA_DSP4_SCRATCH_1 0x1441 #define ARIZONA_DSP4_SCRATCH_2 0x1442 #define ARIZONA_DSP4_SCRATCH_3 0x1443 +#define MOON_DFC1_CTRL 0x1480 +#define MOON_DFC1_RX 0x1482 +#define MOON_DFC1_TX 0x1484 +#define MOON_DFC2_CTRL 0x1486 +#define MOON_DFC2_RX 0x1488 +#define MOON_DFC2_TX 0x148A +#define MOON_DFC3_CTRL 0x148C +#define MOON_DFC3_RX 0x148E +#define MOON_DFC3_TX 0x1490 +#define MOON_DFC4_CTRL 0x1492 +#define MOON_DFC4_RX 0x1494 +#define MOON_DFC4_TX 0x1496 +#define MOON_DFC5_CTRL 0x1498 +#define MOON_DFC5_RX 0x149A +#define MOON_DFC5_TX 0x149C +#define MOON_DFC6_CTRL 0x149E +#define MOON_DFC6_RX 0x14A0 +#define MOON_DFC6_TX 0x14A2 +#define MOON_DFC7_CTRL 0x14A4 +#define MOON_DFC7_RX 0x14A6 +#define MOON_DFC7_TX 0x14A8 +#define MOON_DFC8_CTRL 0x14AA +#define MOON_DFC8_RX 0x14AC +#define MOON_DFC8_TX 0x14AE +#define MOON_DFC_STATUS 0x14B6 #define ARIZONA_FRF_COEFF_1 0x1700 #define ARIZONA_FRF_COEFF_2 0x1701 #define ARIZONA_FRF_COEFF_3 0x1702 @@ -1592,6 +1659,7 @@ #define CLEARWATER_IRQ1_STATUS_30 0x181D #define CLEARWATER_IRQ1_STATUS_31 0x181E #define CLEARWATER_IRQ1_STATUS_32 0x181F +#define MOON_IRQ1_STATUS_33 0x1820 #define CLEARWATER_IRQ1_MASK_1 0x1840 #define CLEARWATER_IRQ1_MASK_2 0x1841 #define CLEARWATER_IRQ1_MASK_3 0x1842 @@ -1607,19 +1675,24 @@ #define CLEARWATER_IRQ1_MASK_13 0x184C #define CLEARWATER_IRQ1_MASK_14 0x184D #define CLEARWATER_IRQ1_MASK_15 0x184E +#define MOON_IRQ1_MASK_16 0x184F #define CLEARWATER_IRQ1_MASK_17 0x1850 #define CLEARWATER_IRQ1_MASK_18 0x1851 #define CLEARWATER_IRQ1_MASK_19 0x1852 +#define MOON_IRQ1_MASK_20 0x1853 #define CLEARWATER_IRQ1_MASK_21 0x1854 #define CLEARWATER_IRQ1_MASK_22 0x1855 #define CLEARWATER_IRQ1_MASK_23 0x1856 #define CLEARWATER_IRQ1_MASK_24 0x1857 #define CLEARWATER_IRQ1_MASK_25 0x1858 +#define MOON_IRQ1_MASK_26 0x1859 #define CLEARWATER_IRQ1_MASK_27 0x185A #define CLEARWATER_IRQ1_MASK_28 0x185B +#define MOON_IRQ1_MASK_29 0x185C #define CLEARWATER_IRQ1_MASK_30 0x185D #define CLEARWATER_IRQ1_MASK_31 0x185E #define CLEARWATER_IRQ1_MASK_32 0x185F +#define MOON_IRQ1_MASK_33 0x1860 #define CLEARWATER_IRQ1_RAW_STATUS_1 0x1880 #define CLEARWATER_IRQ1_RAW_STATUS_2 0x1881 #define CLEARWATER_IRQ1_RAW_STATUS_6 0x1885 @@ -2230,59 +2303,129 @@ #define CLEARWATER_DSP1_CONFIG 0x0FFE00 #define CLEARWATER_DSP1_STATUS_1 0x0FFE04 #define CLEARWATER_DSP1_STATUS_2 0x0FFE06 +#define MOON_DSP1_WATCHDOG 0x0FFE0A #define CLEARWATER_DSP1_WDMA_CONFIG_1 0x0FFE30 #define CLEARWATER_DSP1_WDMA_CONFIG_2 0x0FFE32 #define CLEARWATER_DSP1_RDMA_CONFIG_1 0x0FFE34 #define CLEARWATER_DSP1_SCRATCH_0_1 0x0FFE40 #define CLEARWATER_DSP1_SCRATCH_2_3 0x0FFE42 +#define MOON_DSP1_BUS_ERR_ADDR 0x0FFE52 +#define MOON_DSP1_REGION_LOCK_STATUS 0x0FFE64 +#define MOON_DSP1_LOCK_REGION_1_LOCK_REGION_0 0x0FFE66 +#define MOON_DSP1_LOCK_REGION_3_LOCK_REGION_2 0x0FFE68 +#define MOON_DSP1_LOCK_REGION_5_LOCK_REGION_4 0x0FFE6A +#define MOON_DSP1_LOCK_REGION_7_LOCK_REGION_6 0x0FFE6C +#define MOON_DSP1_LOCK_REGION_9_LOCK_REGION_8 0x0FFE6E +#define MOON_DSP1_LOCK_REGION_CTRL 0x0FFE7A +#define MOON_DSP1_PMEM_ERR_ADDR_XMEM_ERR_ADDR 0x0FFE7C #define CLEARWATER_DSP2_CONFIG 0x17FE00 #define CLEARWATER_DSP2_STATUS_1 0x17FE04 #define CLEARWATER_DSP2_STATUS_2 0x17FE06 +#define MOON_DSP2_WATCHDOG 0x17FE0A #define CLEARWATER_DSP2_WDMA_CONFIG_1 0x17FE30 #define CLEARWATER_DSP2_WDMA_CONFIG_2 0x17FE32 #define CLEARWATER_DSP2_RDMA_CONFIG_1 0x17FE34 #define CLEARWATER_DSP2_SCRATCH_0_1 0x17FE40 #define CLEARWATER_DSP2_SCRATCH_2_3 0x17FE42 +#define MOON_DSP2_BUS_ERR_ADDR 0x17FE52 +#define MOON_DSP2_REGION_LOCK_STATUS 0x17FE64 +#define MOON_DSP2_LOCK_REGION_1_LOCK_REGION_0 0x17FE66 +#define MOON_DSP2_LOCK_REGION_3_LOCK_REGION_2 0x17FE68 +#define MOON_DSP2_LOCK_REGION_5_LOCK_REGION_4 0x17FE6A +#define MOON_DSP2_LOCK_REGION_7_LOCK_REGION_6 0x17FE6C +#define MOON_DSP2_LOCK_REGION_9_LOCK_REGION_8 0x17FE6E +#define MOON_DSP2_LOCK_REGION_CTRL 0x17FE7A +#define MOON_DSP2_PMEM_ERR_ADDR_XMEM_ERR_ADDR 0x17FE7C #define CLEARWATER_DSP3_CONFIG 0x1FFE00 #define CLEARWATER_DSP3_STATUS_1 0x1FFE04 #define CLEARWATER_DSP3_STATUS_2 0x1FFE06 +#define MOON_DSP3_WATCHDOG 0x1FFE0A #define CLEARWATER_DSP3_WDMA_CONFIG_1 0x1FFE30 #define CLEARWATER_DSP3_WDMA_CONFIG_2 0x1FFE32 #define CLEARWATER_DSP3_RDMA_CONFIG_1 0x1FFE34 #define CLEARWATER_DSP3_SCRATCH_0_1 0x1FFE40 #define CLEARWATER_DSP3_SCRATCH_2_3 0x1FFE42 +#define MOON_DSP3_BUS_ERR_ADDR 0x1FFE52 +#define MOON_DSP3_REGION_LOCK_STATUS 0x1FFE64 +#define MOON_DSP3_LOCK_REGION_1_LOCK_REGION_0 0x1FFE66 +#define MOON_DSP3_LOCK_REGION_3_LOCK_REGION_2 0x1FFE68 +#define MOON_DSP3_LOCK_REGION_5_LOCK_REGION_4 0x1FFE6A +#define MOON_DSP3_LOCK_REGION_7_LOCK_REGION_6 0x1FFE6C +#define MOON_DSP3_LOCK_REGION_9_LOCK_REGION_8 0x1FFE6E +#define MOON_DSP3_LOCK_REGION_CTRL 0x1FFE7A +#define MOON_DSP3_PMEM_ERR_ADDR_XMEM_ERR_ADDR 0x1FFE7C #define CLEARWATER_DSP4_CONFIG 0x27FE00 #define CLEARWATER_DSP4_STATUS_1 0x27FE04 #define CLEARWATER_DSP4_STATUS_2 0x27FE06 +#define MOON_DSP4_WATCHDOG 0x27FE0A #define CLEARWATER_DSP4_WDMA_CONFIG_1 0x27FE30 #define CLEARWATER_DSP4_WDMA_CONFIG_2 0x27FE32 #define CLEARWATER_DSP4_RDMA_CONFIG_1 0x27FE34 #define CLEARWATER_DSP4_SCRATCH_0_1 0x27FE40 #define CLEARWATER_DSP4_SCRATCH_2_3 0x27FE42 +#define MOON_DSP4_BUS_ERR_ADDR 0x27FE52 +#define MOON_DSP4_REGION_LOCK_STATUS 0x27FE64 +#define MOON_DSP4_LOCK_REGION_1_LOCK_REGION_0 0x27FE66 +#define MOON_DSP4_LOCK_REGION_3_LOCK_REGION_2 0x27FE68 +#define MOON_DSP4_LOCK_REGION_5_LOCK_REGION_4 0x27FE6A +#define MOON_DSP4_LOCK_REGION_7_LOCK_REGION_6 0x27FE6C +#define MOON_DSP4_LOCK_REGION_9_LOCK_REGION_8 0x27FE6E +#define MOON_DSP4_LOCK_REGION_CTRL 0x27FE7A +#define MOON_DSP4_PMEM_ERR_ADDR_XMEM_ERR_ADDR 0x27FE7C #define CLEARWATER_DSP5_CONFIG 0x2FFE00 #define CLEARWATER_DSP5_STATUS_1 0x2FFE04 #define CLEARWATER_DSP5_STATUS_2 0x2FFE06 +#define MOON_DSP5_WATCHDOG 0x2FFE0A #define CLEARWATER_DSP5_WDMA_CONFIG_1 0x2FFE30 #define CLEARWATER_DSP5_WDMA_CONFIG_2 0x2FFE32 #define CLEARWATER_DSP5_RDMA_CONFIG_1 0x2FFE34 #define CLEARWATER_DSP5_SCRATCH_0_1 0x2FFE40 #define CLEARWATER_DSP5_SCRATCH_2_3 0x2FFE42 +#define MOON_DSP5_BUS_ERR_ADDR 0x2FFE52 +#define MOON_DSP5_REGION_LOCK_STATUS 0x2FFE64 +#define MOON_DSP5_LOCK_REGION_1_LOCK_REGION_0 0x2FFE66 +#define MOON_DSP5_LOCK_REGION_3_LOCK_REGION_2 0x2FFE68 +#define MOON_DSP5_LOCK_REGION_5_LOCK_REGION_4 0x2FFE6A +#define MOON_DSP5_LOCK_REGION_7_LOCK_REGION_6 0x2FFE6C +#define MOON_DSP5_LOCK_REGION_9_LOCK_REGION_8 0x2FFE6E +#define MOON_DSP5_LOCK_REGION_CTRL 0x2FFE7A +#define MOON_DSP5_PMEM_ERR_ADDR_XMEM_ERR_ADDR 0x2FFE7C #define CLEARWATER_DSP6_CONFIG 0x37FE00 #define CLEARWATER_DSP6_STATUS_1 0x37FE04 #define CLEARWATER_DSP6_STATUS_2 0x37FE06 +#define MOON_DSP6_WATCHDOG 0x37FE0A #define CLEARWATER_DSP6_WDMA_CONFIG_1 0x37FE30 #define CLEARWATER_DSP6_WDMA_CONFIG_2 0x37FE32 #define CLEARWATER_DSP6_RDMA_CONFIG_1 0x37FE34 #define CLEARWATER_DSP6_SCRATCH_0_1 0x37FE40 #define CLEARWATER_DSP6_SCRATCH_2_3 0x37FE42 +#define MOON_DSP6_BUS_ERR_ADDR 0x37FE52 +#define MOON_DSP6_REGION_LOCK_STATUS 0x37FE64 +#define MOON_DSP6_LOCK_REGION_1_LOCK_REGION_0 0x37FE66 +#define MOON_DSP6_LOCK_REGION_3_LOCK_REGION_2 0x37FE68 +#define MOON_DSP6_LOCK_REGION_5_LOCK_REGION_4 0x37FE6A +#define MOON_DSP6_LOCK_REGION_7_LOCK_REGION_6 0x37FE6C +#define MOON_DSP6_LOCK_REGION_9_LOCK_REGION_8 0x37FE6E +#define MOON_DSP6_LOCK_REGION_CTRL 0x37FE7A +#define MOON_DSP6_PMEM_ERR_ADDR_XMEM_ERR_ADDR 0x37FE7C #define CLEARWATER_DSP7_CONFIG 0x3FFE00 #define CLEARWATER_DSP7_STATUS_1 0x3FFE04 #define CLEARWATER_DSP7_STATUS_2 0x3FFE06 +#define MOON_DSP7_WATCHDOG 0x3FFE0A #define CLEARWATER_DSP7_WDMA_CONFIG_1 0x3FFE30 #define CLEARWATER_DSP7_WDMA_CONFIG_2 0x3FFE32 #define CLEARWATER_DSP7_RDMA_CONFIG_1 0x3FFE34 #define CLEARWATER_DSP7_SCRATCH_0_1 0x3FFE40 #define CLEARWATER_DSP7_SCRATCH_2_3 0x3FFE42 +#define MOON_DSP7_BUS_ERR_ADDR 0x3FFE52 +#define MOON_DSP7_REGION_LOCK_STATUS 0x3FFE64 +#define MOON_DSP7_LOCK_REGION_1_LOCK_REGION_0 0x3FFE66 +#define MOON_DSP7_LOCK_REGION_3_LOCK_REGION_2 0x3FFE68 +#define MOON_DSP7_LOCK_REGION_5_LOCK_REGION_4 0x3FFE6A +#define MOON_DSP7_LOCK_REGION_7_LOCK_REGION_6 0x3FFE6C +#define MOON_DSP7_LOCK_REGION_9_LOCK_REGION_8 0x3FFE6E +#define MOON_DSP7_LOCK_REGION_CTRL 0x3FFE7A +#define MOON_DSP7_PMEM_ERR_ADDR_XMEM_ERR_ADDR 0x3FFE7C /* * Field Definitions. @@ -3432,6 +3575,161 @@ #define ARIZONA_FLL3_GPDIV_ENA_SHIFT 0 /* FLL3_GPDIV_ENA */ #define ARIZONA_FLL3_GPDIV_ENA_WIDTH 1 /* FLL3_GPDIV_ENA */ +/* + * R465 (0x1D1) - MOON_FLLAO_CONTROL_1 + */ +#define MOON_FLL_AO_HOLD 0x0004 /* FLL_AO_HOLD */ +#define MOON_FLL_AO_HOLD_MASK 0x0004 /* FLL_AO_HOLD */ +#define MOON_FLL_AO_HOLD_SHIFT 2 /* FLL_AO_HOLD */ +#define MOON_FLL_AO_HOLD_WIDTH 1 /* FLL_AO_HOLD */ +#define MOON_FLL_AO_FREERUN 0x0002 /* FLL_AO_FREERUN */ +#define MOON_FLL_AO_FREERUN_MASK 0x0002 /* FLL_AO_FREERUN */ +#define MOON_FLL_AO_FREERUN_SHIFT 1 /* FLL_AO_FREERUN */ +#define MOON_FLL_AO_FREERUN_WIDTH 1 /* FLL_AO_FREERUN */ +#define MOON_FLL_AO_ENA 0x0001 /* FLL_AO_ENA */ +#define MOON_FLL_AO_ENA_MASK 0x0001 /* FLL_AO_ENA */ +#define MOON_FLL_AO_ENA_SHIFT 0 /* FLL_AO_ENA */ +#define MOON_FLL_AO_ENA_WIDTH 1 /* FLL_AO_ENA */ + +/* + * R466 (0x1D2) - MOON_FLLAO_CONTROL_2 + */ +#define MOON_FLL_AO_CTRL_UPD 0x8000 /* FLL_AO_CTRL_UPD */ +#define MOON_FLL_AO_CTRL_UPD_MASK 0x8000 /* FLL_AO_CTRL_UPD */ +#define MOON_FLL_AO_CTRL_UPD_SHIFT 15 /* FLL_AO_CTRL_UPD */ +#define MOON_FLL_AO_CTRL_UPD_WIDTH 1 /* FLL_AO_CTRL_UPD */ +#define MOON_FLL_AO_N 0x03FF /* FLL_AO_N - [9:0] */ +#define MOON_FLL_AO_N_MASK 0x03FF /* FLL_AO_N - [9:0] */ +#define MOON_FLL_AO_N_SHIFT 0 /* FLL_AO_N - [9:0] */ +#define MOON_FLL_AO_N_WIDTH 10 /* FLL_AO_N - [9:0] */ + +/* + * R467 (0x1D3) - MOON_FLLAO_CONTROL_3 + */ +#define MOON_FLL_AO_THETA_MASK 0x00FF /* FLL_AO_THETA - [7:0] */ +#define MOON_FLL_AO_THETA_SHIFT 0 /* FLL_AO_THETA - [7:0] */ +#define MOON_FLL_AO_THETA_WIDTH 8 /* FLL_AO_THETA - [7:0] */ + +/* + * R468 (0x1D4) - MOON_FLLAO_CONTROL_4 + */ +#define MOON_FLL_AO_LAMBDA_MASK 0x00FF /* FLL_AO_LAMBDA - [7:0] */ +#define MOON_FLL_AO_LAMBDA_SHIFT 0 /* FLL_AO_LAMBDA - [7:0] */ +#define MOON_FLL_AO_LAMBDA_WIDTH 8 /* FLL_AO_LAMBDA - [7:0] */ + +/* + * R469 (0x1D5) - MOON_FLLAO_CONTROL_5 + */ +#define MOON_FLL_AO_FB_DIV_MASK 0x00FF /* FLL_AO_FB_DIV - [7:0] */ +#define MOON_FLL_AO_FB_DIV_SHIFT 0 /* FLL_AO_FB_DIV - [7:0] */ +#define MOON_FLL_AO_FB_DIV_WIDTH 8 /* FLL_AO_FB_DIV - [7:0] */ + +/* + * R470 (0x1D6) - MOON_FLLAO_CONTROL_6 + */ +#define MOON_FLL_AO_REFDET_ENA 0x8000 /* FLL_AO_REFDET_ENA */ +#define MOON_FLL_AO_REFDET_ENA_MASK 0x8000 /* FLL_AO_REFDET_ENA */ +#define MOON_FLL_AO_REFDET_ENA_SHIFT 15 /* FLL_AO_REFDET_ENA */ +#define MOON_FLL_AO_REFDET_ENA_WIDTH 1 /* FLL_AO_REFDET_ENA */ +#define MOON_FLL_AO_REFCLK_DIV 0x00C0 /* FLL_AO_REFCLK_DIV - [7:6] */ +#define MOON_FLL_AO_REFCLK_DIV_MASK 0x00C0 /* FLL_AO_REFCLK_DIV - [7:6] */ +#define MOON_FLL_AO_REFCLK_DIV_SHIFT 6 /* FLL_AO_REFCLK_DIV - [7:6] */ +#define MOON_FLL_AO_REFCLK_DIV_WIDTH 2 /* FLL_AO_REFCLK_DIV - [7:6] */ +#define MOON_FLL_AO_REFCLK_SRC 0x000F /* FLL_AO_REFCLK_SRC - [3:0] */ +#define MOON_FLL_AO_REFCLK_SRC_MASK 0x000F /* FLL_AO_REFCLK_SRC - [3:0] */ +#define MOON_FLL_AO_REFCLK_SRC_SHIFT 0 /* FLL_AO_REFCLK_SRC - [3:0] */ +#define MOON_FLL_AO_REFCLK_SRC_WIDTH 4 /* FLL_AO_REFCLK_SRC - [3:0] */ + +/* + * R472 (0x1D8) - MOON_FLLAO_CONTROL_7 + */ +#define MOON_FLL_AO_GAIN_MASK 0x000F /* FLL_AO_GAIN - [3:0] */ +#define MOON_FLL_AO_GAIN_SHIFT 0 /* FLL_AO_GAIN - [3:0] */ +#define MOON_FLL_AO_GAIN_WIDTH 4 /* FLL_AO_GAIN - [3:0] */ + +/* + * R474 (0x1DA) - MOON_FLLAO_CONTROL_8 + */ +#define MOON_FLL_AO_HS_DITH_TUNE 0xF000 /* FLL_AO_HS_DITH_TUNE - [15:12] */ +#define MOON_FLL_AO_HS_DITH_TUNE_MASK 0xF000 /* FLL_AO_HS_DITH_TUNE - [15:12] */ +#define MOON_FLL_AO_HS_DITH_TUNE_SHIFT 12 /* FLL_AO_HS_DITH_TUNE - [15:12] */ +#define MOON_FLL_AO_HS_DITH_TUNE_WIDTH 4 /* FLL_AO_HS_DITH_TUNE - [15:12] */ +#define MOON_FLL_AO_LS_DITH_TUNE_SHAPED 0x00F0 /* FLL_AO_LS_DITH_TUNE_SHAPED - [7:4] */ +#define MOON_FLL_AO_LS_DITH_TUNE_SHAPED_MASK 0x00F0 /* FLL_AO_LS_DITH_TUNE_SHAPED - [7:4] */ +#define MOON_FLL_AO_LS_DITH_TUNE_SHAPED_SHIFT 4 /* FLL_AO_LS_DITH_TUNE_SHAPED - [7:4] */ +#define MOON_FLL_AO_LS_DITH_TUNE_SHAPED_WIDTH 4 /* FLL_AO_LS_DITH_TUNE_SHAPED - [7:4] */ +#define MOON_FLL_AO_LS_DITH_TUNE_NONSHAPED 0x000F /* FLL_AO_LS_DITH_TUNE_NONSHAPED - [3:0] */ +#define MOON_FLL_AO_LS_DITH_TUNE_NONSHAPED_MASK 0x000F /* FLL_AO_LS_DITH_TUNE_NONSHAPED - [3:0] */ +#define MOON_FLL_AO_LS_DITH_TUNE_NONSHAPED_SHIFT 0 /* FLL_AO_LS_DITH_TUNE_NONSHAPED - [3:0] */ +#define MOON_FLL_AO_LS_DITH_TUNE_NONSHAPED_WIDTH 4 /* FLL_AO_LS_DITH_TUNE_NONSHAPED - [3:0] */ + +/* + * R475 (0x1DB) - MOON_FLLAO_CONTROL_9 + */ +#define MOON_FLL_AO_TR_RATE_MASK 0x000F /* FLL_AO_TR_RATE - [3:0] */ +#define MOON_FLL_AO_TR_RATE_SHIFT 0 /* FLL_AO_TR_RATE - [3:0] */ +#define MOON_FLL_AO_TR_RATE_WIDTH 4 /* FLL_AO_TR_RATE - [3:0] */ + +/* + * R476 (0x1DC) - MOON_FLLAO_CONTROL_10 + */ +#define MOON_FLL_AO_PHASEDET_ENA 0x1000 /* FLL_AO_PHASEDET_ENA */ +#define MOON_FLL_AO_PHASEDET_ENA_MASK 0x1000 /* FLL_AO_PHASEDET_ENA */ +#define MOON_FLL_AO_PHASEDET_ENA_SHIFT 12 /* FLL_AO_PHASEDET_ENA */ +#define MOON_FLL_AO_PHASEDET_ENA_WIDTH 1 /* FLL_AO_PHASEDET_ENA */ +#define MOON_FLL_AO_WLR_SDM_FRC_ENA 0x0800 /* FLL_AO_WLR_SDM_FRC_ENA */ +#define MOON_FLL_AO_WLR_SDM_FRC_ENA_MASK 0x0800 /* FLL_AO_WLR_SDM_FRC_ENA */ +#define MOON_FLL_AO_WLR_SDM_FRC_ENA_SHIFT 11 /* FLL_AO_WLR_SDM_FRC_ENA */ +#define MOON_FLL_AO_WLR_SDM_FRC_ENA_WIDTH 1 /* FLL_AO_WLR_SDM_FRC_ENA */ +#define MOON_FLL_AO_WLR_SDM_ENA 0x0400 /* FLL_AO_WLR_SDM_ENA */ +#define MOON_FLL_AO_WLR_SDM_ENA_MASK 0x0400 /* FLL_AO_WLR_SDM_ENA */ +#define MOON_FLL_AO_WLR_SDM_ENA_SHIFT 10 /* FLL_AO_WLR_SDM_ENA */ +#define MOON_FLL_AO_WLR_SDM_ENA_WIDTH 1 /* FLL_AO_WLR_SDM_ENA */ +#define MOON_FLL_AO_SYNC_EFS_ENA 0x0200 /* FLL_AO_SYNC_EFS_ENA */ +#define MOON_FLL_AO_SYNC_EFS_ENA_MASK 0x0200 /* FLL_AO_SYNC_EFS_ENA */ +#define MOON_FLL_AO_SYNC_EFS_ENA_SHIFT 9 /* FLL_AO_SYNC_EFS_ENA */ +#define MOON_FLL_AO_SYNC_EFS_ENA_WIDTH 1 /* FLL_AO_SYNC_EFS_ENA */ +#define MOON_FLL_AO_LS_DITH_ENA 0x0080 /* FLL_AO_LS_DITH_ENA */ +#define MOON_FLL_AO_LS_DITH_ENA_MASK 0x0080 /* FLL_AO_LS_DITH_ENA */ +#define MOON_FLL_AO_LS_DITH_ENA_SHIFT 7 /* FLL_AO_LS_DITH_ENA */ +#define MOON_FLL_AO_LS_DITH_ENA_WIDTH 1 /* FLL_AO_LS_DITH_ENA */ +#define MOON_FLL_AO_HS_DITH_ENA 0x0040 /* FLL_AO_HS_DITH_ENA */ +#define MOON_FLL_AO_HS_DITH_ENA_MASK 0x0040 /* FLL_AO_HS_DITH_ENA */ +#define MOON_FLL_AO_HS_DITH_ENA_SHIFT 6 /* FLL_AO_HS_DITH_ENA */ +#define MOON_FLL_AO_HS_DITH_ENA_WIDTH 1 /* FLL_AO_HS_DITH_ENA */ +#define MOON_FLL_AO_OSF_FRC_ENA 0x0010 /* FLL_AO_OSF_FRC_ENA */ +#define MOON_FLL_AO_OSF_FRC_ENA_MASK 0x0010 /* FLL_AO_OSF_FRC_ENA */ +#define MOON_FLL_AO_OSF_FRC_ENA_SHIFT 4 /* FLL_AO_OSF_FRC_ENA */ +#define MOON_FLL_AO_OSF_FRC_ENA_WIDTH 1 /* FLL_AO_OSF_FRC_ENA */ +#define MOON_FLL_AO_OSF_ENA 0x0008 /* FLL_AO_OSF_ENA */ +#define MOON_FLL_AO_OSF_ENA_MASK 0x0008 /* FLL_AO_OSF_ENA */ +#define MOON_FLL_AO_OSF_ENA_SHIFT 3 /* FLL_AO_OSF_ENA */ +#define MOON_FLL_AO_OSF_ENA_WIDTH 1 /* FLL_AO_OSF_ENA */ +#define MOON_FLL_AO_AUTO_DFSAT_ENA 0x0002 /* FLL_AO_AUTO_DFSAT_ENA */ +#define MOON_FLL_AO_AUTO_DFSAT_ENA_MASK 0x0002 /* FLL_AO_AUTO_DFSAT_ENA */ +#define MOON_FLL_AO_AUTO_DFSAT_ENA_SHIFT 1 /* FLL_AO_AUTO_DFSAT_ENA */ +#define MOON_FLL_AO_AUTO_DFSAT_ENA_WIDTH 1 /* FLL_AO_AUTO_DFSAT_ENA */ +#define MOON_FLL_AO_DFSAT_ENA 0x0001 /* FLL_AO_DFSAT_ENA */ +#define MOON_FLL_AO_DFSAT_ENA_MASK 0x0001 /* FLL_AO_DFSAT_ENA */ +#define MOON_FLL_AO_DFSAT_ENA_SHIFT 0 /* FLL_AO_DFSAT_ENA */ +#define MOON_FLL_AO_DFSAT_ENA_WIDTH 1 /* FLL_AO_DFSAT_ENA */ + +/* + * R477 (0x1DD) - MOON_FLLAO_CONTROL_11 + */ +#define MOON_FLL_AO_LOCKDET_PHASE_MASK 0x0080 /* FLL_AO_LOCKDET_PHASE_MASK */ +#define MOON_FLL_AO_LOCKDET_PHASE_MASK_MASK 0x0080 /* FLL_AO_LOCKDET_PHASE_MASK */ +#define MOON_FLL_AO_LOCKDET_PHASE_MASK_SHIFT 7 /* FLL_AO_LOCKDET_PHASE_MASK */ +#define MOON_FLL_AO_LOCKDET_PHASE_MASK_WIDTH 1 /* FLL_AO_LOCKDET_PHASE_MASK */ +#define MOON_FLL_AO_LOCKDET_THR 0x001E /* FLL_AO_LOCKDET_THR - [4:1] */ +#define MOON_FLL_AO_LOCKDET_THR_MASK 0x001E /* FLL_AO_LOCKDET_THR - [4:1] */ +#define MOON_FLL_AO_LOCKDET_THR_SHIFT 1 /* FLL_AO_LOCKDET_THR - [4:1] */ +#define MOON_FLL_AO_LOCKDET_THR_WIDTH 4 /* FLL_AO_LOCKDET_THR - [4:1] */ +#define MOON_FLL_AO_LOCKDET_ENA 0x0001 /* FLL_AO_LOCKDET_ENA */ +#define MOON_FLL_AO_LOCKDET_ENA_MASK 0x0001 /* FLL_AO_LOCKDET_ENA */ +#define MOON_FLL_AO_LOCKDET_ENA_SHIFT 0 /* FLL_AO_LOCKDET_ENA */ +#define MOON_FLL_AO_LOCKDET_ENA_WIDTH 1 /* FLL_AO_LOCKDET_ENA */ + /* * R512 (0x200) - Mic Charge Pump 1 */ @@ -3628,6 +3926,34 @@ /* * R540 (0x21C) - Mic Bias Ctrl 5 */ +#define ARIZONA_MICB1D_BYP 0x4000 /* MICB1D_BYP */ +#define ARIZONA_MICB1D_BYP_MASK 0x4000 /* MICB1D_BYP */ +#define ARIZONA_MICB1D_BYP_SHIFT 14 /* MICB1D_BYP */ +#define ARIZONA_MICB1D_BYP_WIDTH 1 /* MICB1D_BYP */ +#define ARIZONA_MICB1D_DISCH 0x2000 /* MICB1D_DISCH */ +#define ARIZONA_MICB1D_DISCH_MASK 0x2000 /* MICB1D_DISCH */ +#define ARIZONA_MICB1D_DISCH_SHIFT 13 /* MICB1D_DISCH */ +#define ARIZONA_MICB1D_DISCH_WIDTH 1 /* MICB1D_DISCH */ +#define ARIZONA_MICB1D_ENA 0x1000 /* MICB1D_ENA */ +#define ARIZONA_MICB1D_ENA_MASK 0x1000 /* MICB1D_ENA */ +#define ARIZONA_MICB1D_ENA_SHIFT 12 /* MICB1D_ENA */ +#define ARIZONA_MICB1D_ENA_WIDTH 1 /* MICB1D_ENA */ +#define ARIZONA_MICB1C_BYP 0x0400 /* MICB1C_BYP */ +#define ARIZONA_MICB1C_BYP_MASK 0x0400 /* MICB1C_BYP */ +#define ARIZONA_MICB1C_BYP_SHIFT 10 /* MICB1C_BYP */ +#define ARIZONA_MICB1C_BYP_WIDTH 1 /* MICB1C_BYP */ +#define ARIZONA_MICB1C_DISCH 0x0200 /* MICB1C_DISCH */ +#define ARIZONA_MICB1C_DISCH_MASK 0x0200 /* MICB1C_DISCH */ +#define ARIZONA_MICB1C_DISCH_SHIFT 9 /* MICB1C_DISCH */ +#define ARIZONA_MICB1C_DISCH_WIDTH 1 /* MICB1C_DISCH */ +#define ARIZONA_MICB1C_ENA 0x0100 /* MICB1C_ENA */ +#define ARIZONA_MICB1C_ENA_MASK 0x0100 /* MICB1C_ENA */ +#define ARIZONA_MICB1C_ENA_SHIFT 8 /* MICB1C_ENA */ +#define ARIZONA_MICB1C_ENA_WIDTH 1 /* MICB1C_ENA */ +#define ARIZONA_MICB1B_BYP 0x0040 /* MICB1B_BYP */ +#define ARIZONA_MICB1B_BYP_MASK 0x0040 /* MICB1B_BYP */ +#define ARIZONA_MICB1B_BYP_SHIFT 6 /* MICB1B_BYP */ +#define ARIZONA_MICB1B_BYP_WIDTH 1 /* MICB1B_BYP */ #define ARIZONA_MICB1B_DISCH 0x0020 /* MICB1B_DISCH */ #define ARIZONA_MICB1B_DISCH_MASK 0x0020 /* MICB1B_DISCH */ #define ARIZONA_MICB1B_DISCH_SHIFT 5 /* MICB1B_DISCH */ @@ -3636,6 +3962,10 @@ #define ARIZONA_MICB1B_ENA_MASK 0x0010 /* MICB1B_ENA */ #define ARIZONA_MICB1B_ENA_SHIFT 4 /* MICB1B_ENA */ #define ARIZONA_MICB1B_ENA_WIDTH 1 /* MICB1B_ENA */ +#define ARIZONA_MICB1A_BYP 0x0004 /* MICB1A_BYP */ +#define ARIZONA_MICB1A_BYP_MASK 0x0004 /* MICB1A_BYP */ +#define ARIZONA_MICB1A_BYP_SHIFT 2 /* MICB1A_BYP */ +#define ARIZONA_MICB1A_BYP_WIDTH 1 /* MICB1A_BYP */ #define ARIZONA_MICB1A_DISCH 0x0002 /* MICB1A_DISCH */ #define ARIZONA_MICB1A_DISCH_MASK 0x0002 /* MICB1A_DISCH */ #define ARIZONA_MICB1A_DISCH_SHIFT 1 /* MICB1A_DISCH */ @@ -3648,6 +3978,34 @@ /* * R542 (0x21E) - Mic Bias Ctrl 6 */ +#define ARIZONA_MICB2D_BYP 0x4000 /* MICB2D_BYP */ +#define ARIZONA_MICB2D_BYP_MASK 0x4000 /* MICB2D_BYP */ +#define ARIZONA_MICB2D_BYP_SHIFT 14 /* MICB2D_BYP */ +#define ARIZONA_MICB2D_BYP_WIDTH 1 /* MICB2D_BYP */ +#define ARIZONA_MICB2D_DISCH 0x2000 /* MICB2D_DISCH */ +#define ARIZONA_MICB2D_DISCH_MASK 0x2000 /* MICB2D_DISCH */ +#define ARIZONA_MICB2D_DISCH_SHIFT 13 /* MICB2D_DISCH */ +#define ARIZONA_MICB2D_DISCH_WIDTH 1 /* MICB2D_DISCH */ +#define ARIZONA_MICB2D_ENA 0x1000 /* MICB2D_ENA */ +#define ARIZONA_MICB2D_ENA_MASK 0x1000 /* MICB2D_ENA */ +#define ARIZONA_MICB2D_ENA_SHIFT 12 /* MICB2D_ENA */ +#define ARIZONA_MICB2D_ENA_WIDTH 1 /* MICB2D_ENA */ +#define ARIZONA_MICB2C_BYP 0x0400 /* MICB2C_BYP */ +#define ARIZONA_MICB2C_BYP_MASK 0x0400 /* MICB2C_BYP */ +#define ARIZONA_MICB2C_BYP_SHIFT 10 /* MICB2C_BYP */ +#define ARIZONA_MICB2C_BYP_WIDTH 1 /* MICB2C_BYP */ +#define ARIZONA_MICB2C_DISCH 0x0200 /* MICB2C_DISCH */ +#define ARIZONA_MICB2C_DISCH_MASK 0x0200 /* MICB2C_DISCH */ +#define ARIZONA_MICB2C_DISCH_SHIFT 9 /* MICB2C_DISCH */ +#define ARIZONA_MICB2C_DISCH_WIDTH 1 /* MICB2C_DISCH */ +#define ARIZONA_MICB2C_ENA 0x0100 /* MICB2C_ENA */ +#define ARIZONA_MICB2C_ENA_MASK 0x0100 /* MICB2C_ENA */ +#define ARIZONA_MICB2C_ENA_SHIFT 8 /* MICB2C_ENA */ +#define ARIZONA_MICB2C_ENA_WIDTH 1 /* MICB2C_ENA */ +#define ARIZONA_MICB2B_BYP 0x0040 /* MICB2B_BYP */ +#define ARIZONA_MICB2B_BYP_MASK 0x0040 /* MICB2B_BYP */ +#define ARIZONA_MICB2B_BYP_SHIFT 6 /* MICB2B_BYP */ +#define ARIZONA_MICB2B_BYP_WIDTH 1 /* MICB2B_BYP */ #define ARIZONA_MICB2B_DISCH 0x0020 /* MICB2B_DISCH */ #define ARIZONA_MICB2B_DISCH_MASK 0x0020 /* MICB2B_DISCH */ #define ARIZONA_MICB2B_DISCH_SHIFT 5 /* MICB2B_DISCH */ @@ -3656,6 +4014,10 @@ #define ARIZONA_MICB2B_ENA_MASK 0x0010 /* MICB2B_ENA */ #define ARIZONA_MICB2B_ENA_SHIFT 4 /* MICB2B_ENA */ #define ARIZONA_MICB2B_ENA_WIDTH 1 /* MICB2B_ENA */ +#define ARIZONA_MICB2A_BYP 0x0004 /* MICB2A_BYP */ +#define ARIZONA_MICB2A_BYP_MASK 0x0004 /* MICB2A_BYP */ +#define ARIZONA_MICB2A_BYP_SHIFT 2 /* MICB2A_BYP */ +#define ARIZONA_MICB2A_BYP_WIDTH 1 /* MICB2A_BYP */ #define ARIZONA_MICB2A_DISCH 0x0002 /* MICB2A_DISCH */ #define ARIZONA_MICB2A_DISCH_MASK 0x0002 /* MICB2A_DISCH */ #define ARIZONA_MICB2A_DISCH_SHIFT 1 /* MICB2A_DISCH */ @@ -3736,6 +4098,30 @@ #define ARIZONA_ACCDET_MODE_SHIFT 0 /* ACCDET_MODE - [2:0] */ #define ARIZONA_ACCDET_MODE_WIDTH 3 /* ACCDET_MODE - [2:0] */ +/* + * R665 (0x299) - MOON_HEADPHONE_DETECT_0 + */ +#define MOON_HPD_GND_SEL 0x0007 /*HPD_GND_SEL[2:0]*/ +#define MOON_HPD_GND_SEL_MASK 0x0007 /*HPD_GND_SEL[2:0]*/ +#define MOON_HPD_GND_SEL_SHIFT 0 /*HPD_GND_SEL[2:0]*/ +#define MOON_HPD_GND_SEL_WIDTH 3 /*HPD_GND_SEL[2:0]*/ +#define MOON_HPD_SENSE_SEL 0x0070 /*HPD_SENSE_SEL[4:6]*/ +#define MOON_HPD_SENSE_SEL_MASK 0x0070 /*HPD_SENSE_SEL[4:6]*/ +#define MOON_HPD_SENSE_SEL_SHIFT 4 /*HPD_SENSE_SEL[4:6]*/ +#define MOON_HPD_SENSE_SEL_WIDTH 3 /*HPD_SENSE_SEL[4:6]*/ +#define MOON_HPD_FRC_SEL 0x0700 /*HPD_FRC_SEL[8:10]*/ +#define MOON_HPD_FRC_SEL_MASK 0x0700 /*HPD_FRC_SEL[8:10]*/ +#define MOON_HPD_FRC_SEL_SHIFT 8 /*HPD_FRC_SEL[8:10]*/ +#define MOON_HPD_FRC_SEL_WIDTH 3 /*HPD_FRC_SEL[8:10]*/ +#define MOON_HPD_OUT_SEL 0x7000 /*HPD_OUT_SEL[12:14]*/ +#define MOON_HPD_OUT_SEL_MASK 0x7000 /*HPD_OUT_SEL[12:14]*/ +#define MOON_HPD_OUT_SEL_SHIFT 12 /*HPD_OUT_SEL[12:14]*/ +#define MOON_HPD_OUT_SEL_WIDTH 3 /*HPD_OUT_SEL[12:14]*/ +#define MOON_HPD_OVD_ENA_SEL 0x8000 /*HPD_OVD_ENA[15]]*/ +#define MOON_HPD_OVD_ENA_SEL_MASK 0x8000 /*HPD_OVD_ENA[15]]*/ +#define MOON_HPD_OVD_ENA_SEL_SHIFT 15 /*HPD_OVD_ENA[15]]*/ +#define MOON_HPD_OVD_ENA_SEL_WIDTH 1 /*HPD_OVD_ENA[15]]*/ + /* * R667 (0x29B) - Headphone Detect 1 */ @@ -3818,6 +4204,19 @@ #define ARIZONA_MICD_CLAMP_MODE_SHIFT 0 /* MICD_CLAMP_MODE - [3:0] */ #define ARIZONA_MICD_CLAMP_MODE_WIDTH 4 /* MICD_CLAMP_MODE - [3:0] */ +/* + * R674 (0x2A2) - MOON_MIC_DETECT_0 + */ +#define MOON_MICD1_GND_MASK 0x0007 /* MICD1_GND_SEL - [2:0] */ +#define MOON_MICD1_GND_SHIFT 0 /* MICD1_GND_SEL - [2:0] */ +#define MOON_MICD1_GND_WIDTH 3 /* MICD1_GND_SEL - [2:0] */ +#define MOON_MICD1_SENSE_MASK 0x0070 /* MICD1_SENSE_SEL - [2:0] */ +#define MOON_MICD1_SENSE_SHIFT 4 /* MICD1_SENSE_SEL - [2:0] */ +#define MOON_MICD1_SENSE_WIDTH 3 /* MICD1_SENSE_SEL - [2:0] */ +#define MOON_MICD1_ADC_MODE_MASK 0x8000 /* MICD1_ADC_MODE - [2:0] */ +#define MOON_MICD1_ADC_MODE_SHIFT 15 /* MICD1_ADC_MODE - [2:0] */ +#define MOON_MICD1_ADC_MODE_WIDTH 1 /* MICD1_ADC_MODE - [2:0] */ + /* * R675 (0x2A3) - Mic Detect 1 */ @@ -3830,6 +4229,9 @@ #define ARIZONA_MICD_BIAS_SRC_MASK 0x0030 /* MICD_BIAS_SRC - [5:4] */ #define ARIZONA_MICD_BIAS_SRC_SHIFT 4 /* MICD_BIAS_SRC - [5:4] */ #define ARIZONA_MICD_BIAS_SRC_WIDTH 2 /* MICD_BIAS_SRC - [5:4] */ +#define MOON_MICD_BIAS_SRC_MASK 0x00F0 /* MICD_BIAS_SRC - [7:4] */ +#define MOON_MICD_BIAS_SRC_SHIFT 4 /* MICD_BIAS_SRC - [7:4] */ +#define MOON_MICD_BIAS_SRC_WIDTH 4 /* MICD_BIAS_SRC - [7:4] */ #define ARIZONA_MICD_DBTIME 0x0002 /* MICD_DBTIME */ #define ARIZONA_MICD_DBTIME_MASK 0x0002 /* MICD_DBTIME */ #define ARIZONA_MICD_DBTIME_SHIFT 1 /* MICD_DBTIME */ @@ -3880,6 +4282,81 @@ #define ARIZONA_MICDET_ADCVAL_SHIFT 0 /* MICDET_ADCVAL - [15:8] */ #define ARIZONA_MICDET_ADCVAL_WIDTH 7 /* MICDET_ADCVAL - [15:8] */ +/* + * R690 (0x2B2) - MICDET2_CONTROL_0 + */ +#define MOON_MICD2_ADC_MODE 0x8000 /* MICD2_ADC_MODE */ +#define MOON_MICD2_ADC_MODE_MASK 0x8000 /* MICD2_ADC_MODE */ +#define MOON_MICD2_ADC_MODE_SHIFT 15 /* MICD2_ADC_MODE */ +#define MOON_MICD2_ADC_MODE_WIDTH 1 /* MICD2_ADC_MODE */ +#define MOON_MICD2_SENSE_SEL 0x0070 /* MICD2_SENSE_SEL - [6:4] */ +#define MOON_MICD2_SENSE_SEL_MASK 0x0070 /* MICD2_SENSE_SEL - [6:4] */ +#define MOON_MICD2_SENSE_SEL_SHIFT 4 /* MICD2_SENSE_SEL - [6:4] */ +#define MOON_MICD2_SENSE_SEL_WIDTH 3 /* MICD2_SENSE_SEL - [6:4] */ +#define MOON_MICD2_GND_SEL 0x0007 /* MICD2_GND_SEL - [2:0] */ +#define MOON_MICD2_GND_SEL_MASK 0x0007 /* MICD2_GND_SEL - [2:0] */ +#define MOON_MICD2_GND_SEL_SHIFT 0 /* MICD2_GND_SEL - [2:0] */ +#define MOON_MICD2_GND_SEL_WIDTH 3 /* MICD2_GND_SEL - [2:0] */ + +/* + * R691 (0x2B3) - MICDET2_CONTROL_1 + */ +#define MOON_MICD2_BIAS_STARTTIME 0xF000 /* MICD2_BIAS_STARTTIME - [15:12] */ +#define MOON_MICD2_BIAS_STARTTIME_MASK 0xF000 /* MICD2_BIAS_STARTTIME - [15:12] */ +#define MOON_MICD2_BIAS_STARTTIME_SHIFT 12 /* MICD2_BIAS_STARTTIME - [15:12] */ +#define MOON_MICD2_BIAS_STARTTIME_WIDTH 4 /* MICD2_BIAS_STARTTIME - [15:12] */ +#define MOON_MICD2_RATE 0x0F00 /* MICD2_RATE - [11:8] */ +#define MOON_MICD2_RATE_MASK 0x0F00 /* MICD2_RATE - [11:8] */ +#define MOON_MICD2_RATE_SHIFT 8 /* MICD2_RATE - [11:8] */ +#define MOON_MICD2_RATE_WIDTH 4 /* MICD2_RATE - [11:8] */ +#define MOON_MICD2_BIAS_SRC 0x00F0 /* MICD2_BIAS_SRC - [7:4] */ +#define MOON_MICD2_BIAS_SRC_MASK 0x00F0 /* MICD2_BIAS_SRC - [7:4] */ +#define MOON_MICD2_BIAS_SRC_SHIFT 4 /* MICD2_BIAS_SRC - [7:4] */ +#define MOON_MICD2_BIAS_SRC_WIDTH 4 /* MICD2_BIAS_SRC - [7:4] */ +#define MOON_MICD2_DBTIME 0x0002 /* MICD2_DBTIME */ +#define MOON_MICD2_DBTIME_MASK 0x0002 /* MICD2_DBTIME */ +#define MOON_MICD2_DBTIME_SHIFT 1 /* MICD2_DBTIME */ +#define MOON_MICD2_DBTIME_WIDTH 1 /* MICD2_DBTIME */ +#define MOON_MICD2_ENA 0x0001 /* MICD2_ENA */ +#define MOON_MICD2_ENA_MASK 0x0001 /* MICD2_ENA */ +#define MOON_MICD2_ENA_SHIFT 0 /* MICD2_ENA */ +#define MOON_MICD2_ENA_WIDTH 1 /* MICD2_ENA */ + +/* + * R692 (0x2B4) - MICDET2_CONTROL_2 + */ +#define MOON_MICD2_LVL_SEL_MASK 0x00FF /* MICD2_LVL_SEL - [7:0] */ +#define MOON_MICD2_LVL_SEL_SHIFT 0 /* MICD2_LVL_SEL - [7:0] */ +#define MOON_MICD2_LVL_SEL_WIDTH 8 /* MICD2_LVL_SEL - [7:0] */ + +/* + * R693 (0x2B5) - MICDET2_CONTROL_3 + */ +#define MOON_MICD2_LVL 0x07FC /* MICD2_LVL - [10:2] */ +#define MOON_MICD2_LVL_MASK 0x07FC /* MICD2_LVL - [10:2] */ +#define MOON_MICD2_LVL_SHIFT 2 /* MICD2_LVL - [10:2] */ +#define MOON_MICD2_LVL_WIDTH 9 /* MICD2_LVL - [10:2] */ +#define MOON_MICD2_VALID 0x0002 /* MICD2_VALID */ +#define MOON_MICD2_VALID_MASK 0x0002 /* MICD2_VALID */ +#define MOON_MICD2_VALID_SHIFT 1 /* MICD2_VALID */ +#define MOON_MICD2_VALID_WIDTH 1 /* MICD2_VALID */ +#define MOON_MICD2_STS 0x0001 /* MICD2_STS */ +#define MOON_MICD2_STS_MASK 0x0001 /* MICD2_STS */ +#define MOON_MICD2_STS_SHIFT 0 /* MICD2_STS */ +#define MOON_MICD2_STS_WIDTH 1 /* MICD2_STS */ + +/* + * R699 (0x2BB) - MICDET2_CONTROL_4 + */ +#define MOON_MICD2_ADCVAL_DIFF 0xFF00 /* MICD2_ADCVAL_DIFF - [15:8] */ +#define MOON_MICD2_ADCVAL_DIFF_MASK 0xFF00 /* MICD2_ADCVAL_DIFF - [15:8] */ +#define MOON_MICD2_ADCVAL_DIFF_SHIFT 8 /* MICD2_ADCVAL_DIFF - [15:8] */ +#define MOON_MICD2_ADCVAL_DIFF_WIDTH 8 /* MICD2_ADCVAL_DIFF - [15:8] */ +#define MOON_MICD2_ADCVAL 0x007F /* MICD2_ADCVAL - [6:0] */ +#define MOON_MICD2_ADCVAL_MASK 0x007F /* MICD2_ADCVAL - [6:0] */ +#define MOON_MICD2_ADCVAL_SHIFT 0 /* MICD2_ADCVAL - [6:0] */ +#define MOON_MICD2_ADCVAL_WIDTH 7 /* MICD2_ADCVAL - [6:0] */ + /* * R707 (0x2C3) - Mic noise mix control 1 */ @@ -3977,6 +4454,9 @@ #define ARIZONA_IN_RATE_MASK 0x7800 /* IN_RATE - [14:11] */ #define ARIZONA_IN_RATE_SHIFT 11 /* IN_RATE - [14:11] */ #define ARIZONA_IN_RATE_WIDTH 4 /* IN_RATE - [14:11] */ +#define MOON_IN_MODE_MASK 0x0400 /* IN_RATE_MODE */ +#define MOON_IN_MODE_SHIFT 10 /* IN_RATE_MODE */ +#define MOON_IN_MODE_WIDTH 1 /* IN_RATE_MODE */ /* * R777 (0x309) - Input Volume Ramp @@ -4048,6 +4528,13 @@ #define CLEARWATER_IN1_OSR_SHIFT 8 /* IN1_OSR - [8:10] */ #define CLEARWATER_IN1_OSR_WIDTH 3 /* IN1_OSR - [8:10] */ +/* +* R787 (0x313) - IN1L Rate Control +*/ +#define MOON_IN1L_RATE_MASK 0x7800 /* IN_RATE - [3:0] */ +#define MOON_IN1L_RATE_SHIFT 11 /* IN_RATE - [3:0] */ +#define MOON_IN1L_RATE_WIDTH 4 /* IN_RATE - [3:0] */ + /* * R788 (0x314) - IN1R Control */ @@ -4057,6 +4544,9 @@ #define ARIZONA_IN1R_PGA_VOL_MASK 0x00FE /* IN1R_PGA_VOL - [7:1] */ #define ARIZONA_IN1R_PGA_VOL_SHIFT 1 /* IN1R_PGA_VOL - [7:1] */ #define ARIZONA_IN1R_PGA_VOL_WIDTH 7 /* IN1R_PGA_VOL - [7:1] */ +#define MOON_IN1_DMICCLK_SRC_MASK 0x1800 /* DMICCLK_SRC[1:0] */ +#define MOON_IN1_DMICCLK_SRC_SHIFT 11 /* DMICCLK_SRC[1:0] */ +#define MOON_IN1_DMICCLK_SRC_WIDTH 2 /* DMICCLK_SRC[1:0] */ /* * R789 (0x315) - ADC Digital Volume 1R @@ -4086,6 +4576,13 @@ #define ARIZONA_IN1_DMICR_DLY_SHIFT 0 /* IN1_DMICR_DLY - [5:0] */ #define ARIZONA_IN1_DMICR_DLY_WIDTH 6 /* IN1_DMICR_DLY - [5:0] */ +/* +* R791 (0x317) - IN1R Rate Control +*/ +#define MOON_IN1R_RATE_MASK 0x7800 /* IN_RATE - [3:0] */ +#define MOON_IN1R_RATE_SHIFT 11 /* IN_RATE - [3:0] */ +#define MOON_IN1R_RATE_WIDTH 4 /* IN_RATE - [3:0] */ + /* * R792 (0x318) - IN2L Control */ @@ -4139,6 +4636,13 @@ #define CLEARWATER_IN2_OSR_SHIFT 8 /* IN2_OSR - [8:10] */ #define CLEARWATER_IN2_OSR_WIDTH 3 /* IN2_OSR - [8:10] */ +/* +* R795 (0x31B) - IN2L Rate Control +*/ +#define MOON_IN2L_RATE_MASK 0x7800 /* IN_RATE - [3:0] */ +#define MOON_IN2L_RATE_SHIFT 11 /* IN_RATE - [3:0] */ +#define MOON_IN2L_RATE_WIDTH 4 /* IN_RATE - [3:0] */ + /* * R796 (0x31C) - IN2R Control */ @@ -4148,6 +4652,9 @@ #define ARIZONA_IN2R_PGA_VOL_MASK 0x00FE /* IN2R_PGA_VOL - [7:1] */ #define ARIZONA_IN2R_PGA_VOL_SHIFT 1 /* IN2R_PGA_VOL - [7:1] */ #define ARIZONA_IN2R_PGA_VOL_WIDTH 7 /* IN2R_PGA_VOL - [7:1] */ +#define MOON_IN2_DMICCLK_SRC_MASK 0x1800 /* DMICCLK_SRC[1:0] */ +#define MOON_IN2_DMICCLK_SRC_SHIFT 11 /* DMICCLK_SRC[1:0] */ +#define MOON_IN2_DMICCLK_SRC_WIDTH 2 /* DMICCLK_SRC[1:0] */ /* * R797 (0x31D) - ADC Digital Volume 2R @@ -4177,6 +4684,13 @@ #define ARIZONA_IN2_DMICR_DLY_SHIFT 0 /* IN2_DMICR_DLY - [5:0] */ #define ARIZONA_IN2_DMICR_DLY_WIDTH 6 /* IN2_DMICR_DLY - [5:0] */ +/* +* R799 (0x31F) - IN2R Rate Control +*/ +#define MOON_IN2R_RATE_MASK 0x7800 /* IN_RATE - [3:0] */ +#define MOON_IN2R_RATE_SHIFT 11 /* IN_RATE - [3:0] */ +#define MOON_IN2R_RATE_WIDTH 4 /* IN_RATE - [3:0] */ + /* * R800 (0x320) - IN3L Control */ @@ -4224,6 +4738,13 @@ #define CLEARWATER_IN3_OSR_SHIFT 8 /* IN3_OSR - [8:10] */ #define CLEARWATER_IN3_OSR_WIDTH 3 /* IN3_OSR - [8:10] */ +/* +* R803 (0x323) - IN3L Rate Control +*/ +#define MOON_IN3L_RATE_MASK 0x7800 /* IN_RATE - [3:0] */ +#define MOON_IN3L_RATE_SHIFT 11 /* IN_RATE - [3:0] */ +#define MOON_IN3L_RATE_WIDTH 4 /* IN_RATE - [3:0] */ + /* * R804 (0x324) - IN3R Control */ @@ -4233,6 +4754,9 @@ #define ARIZONA_IN3R_PGA_VOL_MASK 0x00FE /* IN3R_PGA_VOL - [7:1] */ #define ARIZONA_IN3R_PGA_VOL_SHIFT 1 /* IN3R_PGA_VOL - [7:1] */ #define ARIZONA_IN3R_PGA_VOL_WIDTH 7 /* IN3R_PGA_VOL - [7:1] */ +#define MOON_IN3_DMICCLK_SRC_MASK 0x1800 /* DMICCLK_SRC[1:0] */ +#define MOON_IN3_DMICCLK_SRC_SHIFT 11 /* DMICCLK_SRC[1:0] */ +#define MOON_IN3_DMICCLK_SRC_WIDTH 2 /* DMICCLK_SRC[1:0] */ /* * R805 (0x325) - ADC Digital Volume 3R @@ -4256,6 +4780,13 @@ #define ARIZONA_IN3_DMICR_DLY_SHIFT 0 /* IN3_DMICR_DLY - [5:0] */ #define ARIZONA_IN3_DMICR_DLY_WIDTH 6 /* IN3_DMICR_DLY - [5:0] */ +/* +* R807 (0x327) - IN3R Rate Control +*/ +#define MOON_IN3R_RATE_MASK 0x7800 /* IN_RATE - [3:0] */ +#define MOON_IN3R_RATE_SHIFT 11 /* IN_RATE - [3:0] */ +#define MOON_IN3R_RATE_WIDTH 4 /* IN_RATE - [3:0] */ + /* * R808 (0x328) - IN4 Control */ @@ -4294,12 +4825,22 @@ #define CLEARWATER_IN4_OSR_SHIFT 8 /* IN4_OSR - [8:10] */ #define CLEARWATER_IN4_OSR_WIDTH 3 /* IN4_OSR - [8:10] */ +/* +* R811 (0x32B) - IN4L Rate Control +*/ +#define MOON_IN4L_RATE_MASK 0x7800 /* IN_RATE - [3:0] */ +#define MOON_IN4L_RATE_SHIFT 11 /* IN_RATE - [3:0] */ +#define MOON_IN4L_RATE_WIDTH 4 /* IN_RATE - [3:0] */ + /* * R812 (0x32C) - IN4R Control */ #define ARIZONA_IN4R_HPF_MASK 0x8000 /* IN4R_HPF - [15] */ #define ARIZONA_IN4R_HPF_SHIFT 15 /* IN4R_HPF - [15] */ #define ARIZONA_IN4R_HPF_WIDTH 1 /* IN4R_HPF - [15] */ +#define MOON_IN4_DMICCLK_SRC_MASK 0x1800 /* DMICCLK_SRC[1:0] */ +#define MOON_IN4_DMICCLK_SRC_SHIFT 11 /* DMICCLK_SRC[1:0] */ +#define MOON_IN4_DMICCLK_SRC_WIDTH 2 /* DMICCLK_SRC[1:0] */ /* * R813 (0x32D) - ADC Digital Volume 4R @@ -4323,6 +4864,13 @@ #define ARIZONA_IN4R_DMIC_DLY_SHIFT 0 /* IN4R_DMIC_DLY - [5:0] */ #define ARIZONA_IN4R_DMIC_DLY_WIDTH 6 /* IN4R_DMIC_DLY - [5:0] */ +/* +* R815 (0x32F) - IN4R Rate Control +*/ +#define MOON_IN4R_RATE_MASK 0x7800 /* IN_RATE - [3:0] */ +#define MOON_IN4R_RATE_SHIFT 11 /* IN_RATE - [3:0] */ +#define MOON_IN4R_RATE_WIDTH 4 /* IN_RATE - [3:0] */ + /* * R816 (0x330) - IN5L Control */ @@ -4361,12 +4909,22 @@ #define CLEARWATER_IN5_OSR_SHIFT 8 /* IN5_OSR - [8:10] */ #define CLEARWATER_IN5_OSR_WIDTH 3 /* IN5_OSR - [8:10] */ +/* +* R819 (0x333) - IN5L Rate Control +*/ +#define MOON_IN5L_RATE_MASK 0x7800 /* IN_RATE - [3:0] */ +#define MOON_IN5L_RATE_SHIFT 11 /* IN_RATE - [3:0] */ +#define MOON_IN5L_RATE_WIDTH 4 /* IN_RATE - [3:0] */ + /* * R820 (0x334) - IN5R Control */ #define ARIZONA_IN5R_HPF_MASK 0x8000 /* IN5R_HPF - [15] */ #define ARIZONA_IN5R_HPF_SHIFT 15 /* IN5R_HPF - [15] */ #define ARIZONA_IN5R_HPF_WIDTH 1 /* IN5R_HPF - [15] */ +#define MOON_IN5_DMICCLK_SRC_MASK 0x1800 /* DMICCLK_SRC[1:0] */ +#define MOON_IN5_DMICCLK_SRC_SHIFT 11 /* DMICCLK_SRC[1:0] */ +#define MOON_IN5_DMICCLK_SRC_WIDTH 2 /* DMICCLK_SRC[1:0] */ /* * R821 (0x335) - ADC Digital Volume 5R @@ -4390,6 +4948,13 @@ #define ARIZONA_IN5R_DMIC_DLY_SHIFT 0 /* IN5R_DMIC_DLY - [5:0] */ #define ARIZONA_IN5R_DMIC_DLY_WIDTH 6 /* IN5R_DMIC_DLY - [5:0] */ +/* +* R823 (0x337) - IN5R Rate Control +*/ +#define MOON_IN5R_RATE_MASK 0x7800 /* IN_RATE - [3:0] */ +#define MOON_IN5R_RATE_SHIFT 11 /* IN_RATE - [3:0] */ +#define MOON_IN5R_RATE_WIDTH 4 /* IN_RATE - [3:0] */ + /* * R824 (0x338) - IN6L Control */ @@ -4644,6 +5209,13 @@ #define ARIZONA_OUT1L_VOL_LIM_SHIFT 0 /* OUT1L_VOL_LIM - [7:0] */ #define ARIZONA_OUT1L_VOL_LIM_WIDTH 8 /* OUT1L_VOL_LIM - [7:0] */ +/* + * R1042 (0x412) - MOON_OUT1_CONFIG + */ +#define MOON_HP1_GND_SEL_MASK 0x0007 /* HP1_GND_SEL[2:0] */ +#define MOON_HP1_GND_SEL_SHIFT 0 /* HP1_GND_SEL[2:0] */ +#define MOON_HP1_GND_SEL_WIDTH 3 /* HP1_GND_SEL[2:0] */ + /* * R1043 (0x413) - Noise Gate Select 1L */ @@ -4734,6 +5306,13 @@ #define ARIZONA_OUT2L_VOL_LIM_SHIFT 0 /* OUT2L_VOL_LIM - [7:0] */ #define ARIZONA_OUT2L_VOL_LIM_WIDTH 8 /* OUT2L_VOL_LIM - [7:0] */ +/* + * R1050 (0x41A) - MOON_OUT2_CONFIG + */ +#define MOON_HP2_GND_SEL_MASK 0x0007 /* HP2_GND_SEL[2:0] */ +#define MOON_HP2_GND_SEL_SHIFT 0 /* HP2_GND_SEL[2:0] */ +#define MOON_HP2_GND_SEL_WIDTH 3 /* HP2_GND_SEL[2:0] */ + /* * R1051 (0x41B) - Noise Gate Select 2L */ @@ -10556,6 +11135,46 @@ #define CLEARWATER_FRF_COEFF_6R_4_SHIFT 0 /* FRF_COEFF_6R_4 - [15:0] */ #define CLEARWATER_FRF_COEFF_6R_4_WIDTH 16 /* FRF_COEFF_6R_4 - [15:0] */ +/* + * R1675 (0x1480) - DFC1_CTRL + */ +#define MOON_DFC1_RATE 0x003C /* DFC1_RATE - [5:2] */ +#define MOON_DFC1_RATE_MASK 0x003C /* DFC1_RATE - [5:2] */ +#define MOON_DFC1_RATE_SHIFT 2 /* DFC1_RATE - [5:2] */ +#define MOON_DFC1_RATE_WIDTH 4 /* DFC1_RATE - [5:2] */ +#define MOON_DFC1_DITH_ENA 0x0002 /* DFC1_DITH_ENA */ +#define MOON_DFC1_DITH_ENA_MASK 0x0002 /* DFC1_DITH_ENA */ +#define MOON_DFC1_DITH_ENA_SHIFT 1 /* DFC1_DITH_ENA */ +#define MOON_DFC1_DITH_ENA_WIDTH 1 /* DFC1_DITH_ENA */ +#define MOON_DFC1_ENA 0x0001 /* DFC1_ENA */ +#define MOON_DFC1_ENA_MASK 0x0001 /* DFC1_ENA */ +#define MOON_DFC1_ENA_SHIFT 0 /* DFC1_ENA */ +#define MOON_DFC1_ENA_WIDTH 1 /* DFC1_ENA */ + +/* + * R1677 (0x1482) - DFC1_RX + */ +#define MOON_DFC1_RX_DATA_WIDTH 0x1F00 /* DFC1_RX_DATA_WIDTH - [12:8] */ +#define MOON_DFC1_RX_DATA_WIDTH_MASK 0x1F00 /* DFC1_RX_DATA_WIDTH - [12:8] */ +#define MOON_DFC1_RX_DATA_WIDTH_SHIFT 8 /* DFC1_RX_DATA_WIDTH - [12:8] */ +#define MOON_DFC1_RX_DATA_WIDTH_WIDTH 5 /* DFC1_RX_DATA_WIDTH - [12:8] */ +#define MOON_DFC1_RX_DATA_TYPE 0x0007 /* DFC1_RX_DATA_TYPE - [2:0] */ +#define MOON_DFC1_RX_DATA_TYPE_MASK 0x0007 /* DFC1_RX_DATA_TYPE - [2:0] */ +#define MOON_DFC1_RX_DATA_TYPE_SHIFT 0 /* DFC1_RX_DATA_TYPE - [2:0] */ +#define MOON_DFC1_RX_DATA_TYPE_WIDTH 3 /* DFC1_RX_DATA_TYPE - [2:0] */ + +/* + * R1679 (0x1484) - DFC1_TX + */ +#define MOON_DFC1_TX_DATA_WIDTH 0x1F00 /* DFC1_TX_DATA_WIDTH - [12:8] */ +#define MOON_DFC1_TX_DATA_WIDTH_MASK 0x1F00 /* DFC1_TX_DATA_WIDTH - [12:8] */ +#define MOON_DFC1_TX_DATA_WIDTH_SHIFT 8 /* DFC1_TX_DATA_WIDTH - [12:8] */ +#define MOON_DFC1_TX_DATA_WIDTH_WIDTH 5 /* DFC1_TX_DATA_WIDTH - [12:8] */ +#define MOON_DFC1_TX_DATA_TYPE 0x0007 /* DFC1_TX_DATA_TYPE - [2:0] */ +#define MOON_DFC1_TX_DATA_TYPE_MASK 0x0007 /* DFC1_TX_DATA_TYPE - [2:0] */ +#define MOON_DFC1_TX_DATA_TYPE_SHIFT 0 /* DFC1_TX_DATA_TYPE - [2:0] */ +#define MOON_DFC1_TX_DATA_TYPE_WIDTH 3 /* DFC1_TX_DATA_TYPE - [2:0] */ + /* * R6144 (0x1800) - IRQ1 Status 1 */ @@ -10583,6 +11202,10 @@ /* * R6145 (0x1801) - IRQ1 Status 2 */ +#define MOON_FLLAO_LOCK_EINT1 0x0800 /* FLLAO_LOCK_EINT1 */ +#define MOON_FLLAO_LOCK_EINT1_MASK 0x0800 /* FLLAO_LOCK_EINT1 */ +#define MOON_FLLAO_LOCK_EINT1_SHIFT 11 /* FLLAO_LOCK_EINT1 */ +#define MOON_FLLAO_LOCK_EINT1_WIDTH 1 /* FLLAO_LOCK_EINT1 */ #define CLEARWATER_FLL3_LOCK_EINT1 0x0400 /* FLL3_LOCK_EINT1 */ #define CLEARWATER_FLL3_LOCK_EINT1_MASK 0x0400 /* FLL3_LOCK_EINT1 */ #define CLEARWATER_FLL3_LOCK_EINT1_SHIFT 10 /* FLL3_LOCK_EINT1 */ @@ -10603,6 +11226,10 @@ #define CLEARWATER_MICDET_EINT1_MASK 0x0100 /* MICDET_EINT1 */ #define CLEARWATER_MICDET_EINT1_SHIFT 8 /* MICDET_EINT1 */ #define CLEARWATER_MICDET_EINT1_WIDTH 1 /* MICDET_EINT1 */ +#define MOON_MICDET2_EINT1 0x0200 /* MICDET2_EINT1 */ +#define MOON_MICDET2_EINT1_MASK 0x0200 /* MICDET2_EINT1 */ +#define MOON_MICDET2_EINT1_SHIFT 9 /* MICDET2_EINT1 */ +#define MOON_MICDET2_EINT1_WIDTH 1 /* MICDET2_EINT1 */ #define CLEARWATER_HPDET_EINT1 0x0001 /* HPDET_EINT1 */ #define CLEARWATER_HPDET_EINT1_MASK 0x0001 /* HPDET_EINT1 */ #define CLEARWATER_HPDET_EINT1_SHIFT 0 /* HPDET_EINT1 */ @@ -10856,6 +11483,38 @@ #define CLEARWATER_SPK_SHUTDOWN_EINT1_SHIFT 0 /* SPK_SHUTDOWN_EINT1 */ #define CLEARWATER_SPK_SHUTDOWN_EINT1_WIDTH 1 /* SPK_SHUTDOWN_EINT1 */ +/* + * R6176 (0x1820) - IRQ1 Status 33 + */ +#define MOON_ADSP_ERROR_STATUS_DSP7 0x0040 /* IRQ_DSP7_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP7_MASK 0x0040 /* IRQ_DSP7_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP7_SHIFT 6 /* IRQ_DSP7_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP7_WIDTH 1 /* IRQ_DSP7_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP6 0x0020 /* IRQ_DSP6_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP6_MASK 0x0020 /* IRQ_DSP6_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP6_SHIFT 5 /* IRQ_DSP6_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP6_WIDTH 1 /* IRQ_DSP6_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP5 0x0010 /* IRQ_DSP5_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP5_MASK 0x0010 /* IRQ_DSP5_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP5_SHIFT 4 /* IRQ_DSP5_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP5_WIDTH 1 /* IRQ_DSP5_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP4 0x0008 /* IRQ_DSP4_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP4_MASK 0x0008 /* IRQ_DSP4_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP4_SHIFT 3 /* IRQ_DSP4_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP4_WIDTH 1 /* IRQ_DSP4_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP3 0x0004 /* IRQ_DSP3_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP3_MASK 0x0004 /* IRQ_DSP3_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP3_SHIFT 2 /* IRQ_DSP3_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP3_WIDTH 1 /* IRQ_DSP3_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP2 0x0002 /* IRQ_DSP2_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP2_MASK 0x0002 /* IRQ_DSP2_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP2_SHIFT 1 /* IRQ_DSP2_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP2_WIDTH 1 /* IRQ_DSP2_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP1 0x0001 /* IRQ_DSP1_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP1_MASK 0x0001 /* IRQ_DSP1_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP1_SHIFT 0 /* IRQ_DSP1_BUS_ERR_EINT1 */ +#define MOON_ADSP_ERROR_STATUS_DSP1_WIDTH 1 /* IRQ_DSP1_BUS_ERR_EINT1 */ + /* * R6208 (0x1840) - IRQ1 Mask 1 */ @@ -11659,6 +12318,10 @@ /* * R6273 (0x1881) - IRQ1 Raw Status 2 */ +#define MOON_FLLAO_LOCK_STS1 0x0800 /* FLLAO_LOCK_STS1 */ +#define MOON_FLLAO_LOCK_STS1_MASK 0x0800 /* FLLAO_LOCK_STS1 */ +#define MOON_FLLAO_LOCK_STS1_SHIFT 11 /* FLLAO_LOCK_STS1 */ +#define MOON_FLLAO_LOCK_STS1_WIDTH 1 /* FLLAO_LOCK_STS1 */ #define CLEARWATER_FLL3_LOCK_STS1 0x0400 /* FLL3_LOCK_STS1 */ #define CLEARWATER_FLL3_LOCK_STS1_MASK 0x0400 /* FLL3_LOCK_STS1 */ #define CLEARWATER_FLL3_LOCK_STS1_SHIFT 10 /* FLL3_LOCK_STS1 */ From 4f0c1ac94d488fbaa5b90571b0aff6654acb4815 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 23 Apr 2015 15:53:37 +0100 Subject: [PATCH 0907/1167] gpio: arizona: add gpio's for moon Change-Id: Ifd279baf899354e9d54641afe7e72e98671cf1d0 Signed-off-by: Nikesh Oswal --- drivers/gpio/gpio-arizona.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpio/gpio-arizona.c b/drivers/gpio/gpio-arizona.c index 5690d16bf9b..115452f5f6b 100644 --- a/drivers/gpio/gpio-arizona.c +++ b/drivers/gpio/gpio-arizona.c @@ -213,6 +213,17 @@ static int arizona_gpio_probe(struct platform_device *pdev) arizona_gpio->gpio_chip.ngpio = 16; break; + case CS47L90: + case CS47L91: + arizona_gpio->gpio_chip.direction_input = + clearwater_gpio_direction_in; + arizona_gpio->gpio_chip.get = clearwater_gpio_get; + arizona_gpio->gpio_chip.direction_output = + clearwater_gpio_direction_out; + arizona_gpio->gpio_chip.set = clearwater_gpio_set; + + arizona_gpio->gpio_chip.ngpio = 38; + break; default: dev_err(&pdev->dev, "Unknown chip variant %d\n", arizona->type); From 950f548171fe8fff8abb1f708c4a64dac407294b Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 20 Apr 2015 13:55:57 +0100 Subject: [PATCH 0908/1167] ASoC: moon: add driver As compared to clearwater -OUT4 and OUT6 are removed -IN6 is removed -IN3 is changed to digital -DFC is added in routes -IN1[L/R] and IN2[L] is Muxed as compared to IN1[L] and IN2[L/R] -Add dapm widgets for children's micbiases -Add alsa control to set per channel sample rate -Add alsa control for data format converter -Disable EDRE-stereo while enabling analog outputs Change-Id: Ibac45a1b6d290ccbc0bff18c2826af4471dc48a2 Signed-off-by: Nikesh Oswal Signed-off-by: bsapthagiri --- sound/soc/codecs/Kconfig | 8 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/arizona.c | 523 +++++- sound/soc/codecs/arizona.h | 23 +- sound/soc/codecs/moon.c | 3127 ++++++++++++++++++++++++++++++++++++ sound/soc/codecs/moon.h | 23 + 6 files changed, 3703 insertions(+), 3 deletions(-) create mode 100644 sound/soc/codecs/moon.c create mode 100644 sound/soc/codecs/moon.h diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 8bd61cd8a9f..bb11faf14f0 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -86,6 +86,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_FLORIDA if MFD_FLORIDA select SND_SOC_CLEARWATER if MFD_CLEARWATER select SND_SOC_MARLEY if MFD_MARLEY + select SND_SOC_MOON if MFD_MOON select SND_SOC_WM8350 if MFD_WM8350 select SND_SOC_WM8400 if MFD_WM8400 select SND_SOC_WM8510 if SND_SOC_I2C_AND_SPI @@ -150,6 +151,7 @@ config SND_SOC_ARIZONA default y if SND_SOC_FLORIDA=y default y if SND_SOC_CLEARWATER=y default y if SND_SOC_MARLEY=y + default y if SND_SOC_MOON=y default y if SND_SOC_WM8997=y default y if SND_SOC_VEGAS=y default y if SND_SOC_LARGO=y @@ -157,6 +159,7 @@ config SND_SOC_ARIZONA default m if SND_SOC_FLORIDA=m default m if SND_SOC_CLEARWATER=m default m if SND_SOC_MARLEY=m + default m if SND_SOC_MOON=m default m if SND_SOC_WM8997=m default m if SND_SOC_VEGAS=m default m if SND_SOC_LARGO=m @@ -171,12 +174,14 @@ config SND_SOC_WM_ADSP default y if SND_SOC_WM5102=y default y if SND_SOC_FLORIDA=y default y if SND_SOC_CLEARWATER=y + default y if SND_SOC_MOON=y default y if SND_SOC_WM2200=y default y if SND_SOC_LARGO=y default y if SND_SOC_MARLEY=y default m if SND_SOC_WM5102=m default m if SND_SOC_FLORIDA=m default m if SND_SOC_CLEARWATER=m + default m if SND_SOC_MOON=m default m if SND_SOC_WM2200=m default m if SND_SOC_LARGO=m default m if SND_SOC_MARLEY=m @@ -413,6 +418,9 @@ config SND_SOC_CLEARWATER config SND_SOC_MARLEY tristate +config SND_SOC_MOON + tristate + config SND_SOC_WM8350 tristate diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index dbc52a10acc..c8c0055a162 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -78,6 +78,7 @@ snd-soc-wm5102-objs := wm5102.o snd-soc-florida-objs := florida.o snd-soc-clearwater-objs := clearwater.o snd-soc-marley-objs := marley.o +snd-soc-moon-objs := moon.o snd-soc-wm8350-objs := wm8350.o snd-soc-wm8400-objs := wm8400.o snd-soc-wm8510-objs := wm8510.o @@ -206,6 +207,7 @@ obj-$(CONFIG_SND_SOC_WM5102) += snd-soc-wm5102.o obj-$(CONFIG_SND_SOC_FLORIDA) += snd-soc-florida.o obj-$(CONFIG_SND_SOC_CLEARWATER) += snd-soc-clearwater.o obj-$(CONFIG_SND_SOC_MARLEY) += snd-soc-marley.o +obj-$(CONFIG_SND_SOC_MOON) += snd-soc-moon.o obj-$(CONFIG_SND_SOC_WM8350) += snd-soc-wm8350.o obj-$(CONFIG_SND_SOC_WM8400) += snd-soc-wm8400.o obj-$(CONFIG_SND_SOC_WM8510) += snd-soc-wm8510.o diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index a4f8c98fa25..a6718355f06 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -744,6 +744,19 @@ static const char * const marley_dmic_inputs[] = { "IN2R", }; +static const char * const moon_dmic_inputs[] = { + "IN1L Mux", + "IN1R Mux", + "IN2L Mux", + "IN2R", + "IN3L", + "IN3R", + "IN4L", + "IN4R", + "IN5L", + "IN5R", +}; + int arizona_init_input(struct snd_soc_codec *codec) { struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); @@ -769,6 +782,17 @@ int arizona_init_input(struct snd_soc_codec *codec) } switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8280: + case WM8998: + case WM1814: + case WM1831: + case CS47L24: + routes[0].sink = arizona_dmic_inputs[i * 2]; + routes[1].sink = arizona_dmic_inputs[(i * 2) + 1]; + break; case WM8285: case WM1840: routes[0].sink = clearwater_dmic_inputs[i * 2]; @@ -779,8 +803,8 @@ int arizona_init_input(struct snd_soc_codec *codec) routes[1].sink = marley_dmic_inputs[(i * 2) + 1]; break; default: - routes[0].sink = arizona_dmic_inputs[i * 2]; - routes[1].sink = arizona_dmic_inputs[(i * 2) + 1]; + routes[0].sink = moon_dmic_inputs[i * 2]; + routes[1].sink = moon_dmic_inputs[(i * 2) + 1]; break; } @@ -1248,6 +1272,14 @@ const char * const arizona_v2_mixer_texts[ARIZONA_V2_NUM_MIXER_INPUTS] = { "ISRC4INT2", "ISRC4DEC1", "ISRC4DEC2", + "DFC1", + "DFC2", + "DFC3", + "DFC4", + "DFC5", + "DFC6", + "DFC7", + "DFC8", }; EXPORT_SYMBOL_GPL(arizona_v2_mixer_texts); @@ -1390,6 +1422,14 @@ unsigned int arizona_v2_mixer_values[ARIZONA_V2_NUM_MIXER_INPUTS] = { 0xb9, 0xbc, /* ISRC4DEC1 */ 0xbd, + 0xf8, /* DFC1 */ + 0xf9, + 0xfa, + 0xfb, + 0xfc, + 0xfd, + 0xfe, + 0xff, /* DFC8 */ }; EXPORT_SYMBOL_GPL(arizona_v2_mixer_values); @@ -1466,6 +1506,324 @@ const struct soc_enum arizona_input_rate = arizona_rate_val); EXPORT_SYMBOL_GPL(arizona_input_rate); +const struct soc_enum moon_input_rate[] = { + SOC_VALUE_ENUM_SINGLE(MOON_IN1L_RATE_CONTROL, + MOON_IN1L_RATE_SHIFT, + MOON_IN1L_RATE_MASK >> MOON_IN1L_RATE_SHIFT, + ARIZONA_SYNC_RATE_ENUM_SIZE, + arizona_rate_text, + arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(MOON_IN1R_RATE_CONTROL, + MOON_IN1R_RATE_SHIFT, + MOON_IN1R_RATE_MASK >> MOON_IN1R_RATE_SHIFT, + ARIZONA_SYNC_RATE_ENUM_SIZE, + arizona_rate_text, + arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(MOON_IN2L_RATE_CONTROL, + MOON_IN2L_RATE_SHIFT, + MOON_IN2L_RATE_MASK >> MOON_IN2L_RATE_SHIFT, + ARIZONA_SYNC_RATE_ENUM_SIZE, + arizona_rate_text, + arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(MOON_IN2R_RATE_CONTROL, + MOON_IN2R_RATE_SHIFT, + MOON_IN2R_RATE_MASK >> MOON_IN2R_RATE_SHIFT, + ARIZONA_SYNC_RATE_ENUM_SIZE, + arizona_rate_text, + arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(MOON_IN3L_RATE_CONTROL, + MOON_IN3L_RATE_SHIFT, + MOON_IN3L_RATE_MASK >> MOON_IN3L_RATE_SHIFT, + ARIZONA_SYNC_RATE_ENUM_SIZE, + arizona_rate_text, + arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(MOON_IN3R_RATE_CONTROL, + MOON_IN3R_RATE_SHIFT, + MOON_IN3R_RATE_MASK >> MOON_IN3R_RATE_SHIFT, + ARIZONA_SYNC_RATE_ENUM_SIZE, + arizona_rate_text, + arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(MOON_IN4L_RATE_CONTROL, + MOON_IN4L_RATE_SHIFT, + MOON_IN4L_RATE_MASK >> MOON_IN4L_RATE_SHIFT, + ARIZONA_SYNC_RATE_ENUM_SIZE, + arizona_rate_text, + arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(MOON_IN4R_RATE_CONTROL, + MOON_IN4R_RATE_SHIFT, + MOON_IN4R_RATE_MASK >> MOON_IN4R_RATE_SHIFT, + ARIZONA_SYNC_RATE_ENUM_SIZE, + arizona_rate_text, + arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(MOON_IN5L_RATE_CONTROL, + MOON_IN5L_RATE_SHIFT, + MOON_IN5L_RATE_MASK >> MOON_IN5L_RATE_SHIFT, + ARIZONA_SYNC_RATE_ENUM_SIZE, + arizona_rate_text, + arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(MOON_IN5R_RATE_CONTROL, + MOON_IN5R_RATE_SHIFT, + MOON_IN5R_RATE_MASK >> MOON_IN5R_RATE_SHIFT, + ARIZONA_SYNC_RATE_ENUM_SIZE, + arizona_rate_text, + arizona_rate_val), +}; +EXPORT_SYMBOL_GPL(moon_input_rate); + +const char * const moon_dfc_width_text[MOON_DFC_WIDTH_ENUM_SIZE] = { + "8bit", "16bit", "20bit", "24bit", "32bit", +}; +EXPORT_SYMBOL_GPL(moon_dfc_width_text); + +const unsigned int moon_dfc_width_val[MOON_DFC_WIDTH_ENUM_SIZE] = { + 7, 15, 19, 23, 31, +}; +EXPORT_SYMBOL_GPL(moon_dfc_width_val); + +const char * const moon_dfc_type_text[MOON_DFC_TYPE_ENUM_SIZE] = { + "Fixed", "Unsigned Fixed", "Single Precision Floating", + "Half Precision Floating", "Arm Alternative Floating", +}; +EXPORT_SYMBOL_GPL(moon_dfc_type_text); + +const unsigned int moon_dfc_type_val[MOON_DFC_TYPE_ENUM_SIZE] = { + 0, 1, 2, 4, 5, +}; +EXPORT_SYMBOL_GPL(moon_dfc_type_val); + + +const struct soc_enum moon_dfc_width[] = { + SOC_VALUE_ENUM_SINGLE(MOON_DFC1_RX, + MOON_DFC1_RX_DATA_WIDTH_SHIFT, + MOON_DFC1_RX_DATA_WIDTH_MASK >> + MOON_DFC1_RX_DATA_WIDTH_SHIFT, + ARRAY_SIZE(moon_dfc_width_text), + moon_dfc_width_text, + moon_dfc_width_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC1_TX, + MOON_DFC1_TX_DATA_WIDTH_SHIFT, + MOON_DFC1_TX_DATA_WIDTH_MASK >> + MOON_DFC1_TX_DATA_WIDTH_SHIFT, + ARRAY_SIZE(moon_dfc_width_text), + moon_dfc_width_text, + moon_dfc_width_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC2_RX, + MOON_DFC1_RX_DATA_WIDTH_SHIFT, + MOON_DFC1_RX_DATA_WIDTH_MASK >> + MOON_DFC1_RX_DATA_WIDTH_SHIFT, + ARRAY_SIZE(moon_dfc_width_text), + moon_dfc_width_text, + moon_dfc_width_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC2_TX, + MOON_DFC1_TX_DATA_WIDTH_SHIFT, + MOON_DFC1_TX_DATA_WIDTH_MASK >> + MOON_DFC1_TX_DATA_WIDTH_SHIFT, + ARRAY_SIZE(moon_dfc_width_text), + moon_dfc_width_text, + moon_dfc_width_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC3_RX, + MOON_DFC1_RX_DATA_WIDTH_SHIFT, + MOON_DFC1_RX_DATA_WIDTH_MASK >> + MOON_DFC1_RX_DATA_WIDTH_SHIFT, + ARRAY_SIZE(moon_dfc_width_text), + moon_dfc_width_text, + moon_dfc_width_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC3_TX, + MOON_DFC1_TX_DATA_WIDTH_SHIFT, + MOON_DFC1_TX_DATA_WIDTH_MASK >> + MOON_DFC1_TX_DATA_WIDTH_SHIFT, + ARRAY_SIZE(moon_dfc_width_text), + moon_dfc_width_text, + moon_dfc_width_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC4_RX, + MOON_DFC1_RX_DATA_WIDTH_SHIFT, + MOON_DFC1_RX_DATA_WIDTH_MASK >> + MOON_DFC1_RX_DATA_WIDTH_SHIFT, + ARRAY_SIZE(moon_dfc_width_text), + moon_dfc_width_text, + moon_dfc_width_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC4_TX, + MOON_DFC1_TX_DATA_WIDTH_SHIFT, + MOON_DFC1_TX_DATA_WIDTH_MASK >> + MOON_DFC1_TX_DATA_WIDTH_SHIFT, + ARRAY_SIZE(moon_dfc_width_text), + moon_dfc_width_text, + moon_dfc_width_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC5_RX, + MOON_DFC1_RX_DATA_WIDTH_SHIFT, + MOON_DFC1_RX_DATA_WIDTH_MASK >> + MOON_DFC1_RX_DATA_WIDTH_SHIFT, + ARRAY_SIZE(moon_dfc_width_text), + moon_dfc_width_text, + moon_dfc_width_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC5_TX, + MOON_DFC1_TX_DATA_WIDTH_SHIFT, + MOON_DFC1_TX_DATA_WIDTH_MASK >> + MOON_DFC1_TX_DATA_WIDTH_SHIFT, + ARRAY_SIZE(moon_dfc_width_text), + moon_dfc_width_text, + moon_dfc_width_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC6_RX, + MOON_DFC1_RX_DATA_WIDTH_SHIFT, + MOON_DFC1_RX_DATA_WIDTH_MASK >> + MOON_DFC1_RX_DATA_WIDTH_SHIFT, + ARRAY_SIZE(moon_dfc_width_text), + moon_dfc_width_text, + moon_dfc_width_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC6_TX, + MOON_DFC1_TX_DATA_WIDTH_SHIFT, + MOON_DFC1_TX_DATA_WIDTH_MASK >> + MOON_DFC1_TX_DATA_WIDTH_SHIFT, + ARRAY_SIZE(moon_dfc_width_text), + moon_dfc_width_text, + moon_dfc_width_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC7_RX, + MOON_DFC1_RX_DATA_WIDTH_SHIFT, + MOON_DFC1_RX_DATA_WIDTH_MASK >> + MOON_DFC1_RX_DATA_WIDTH_SHIFT, + ARRAY_SIZE(moon_dfc_width_text), + moon_dfc_width_text, + moon_dfc_width_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC7_TX, + MOON_DFC1_TX_DATA_WIDTH_SHIFT, + MOON_DFC1_TX_DATA_WIDTH_MASK >> + MOON_DFC1_TX_DATA_WIDTH_SHIFT, + ARRAY_SIZE(moon_dfc_width_text), + moon_dfc_width_text, + moon_dfc_width_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC8_RX, + MOON_DFC1_RX_DATA_WIDTH_SHIFT, + MOON_DFC1_RX_DATA_WIDTH_MASK >> + MOON_DFC1_RX_DATA_WIDTH_SHIFT, + ARRAY_SIZE(moon_dfc_width_text), + moon_dfc_width_text, + moon_dfc_width_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC8_TX, + MOON_DFC1_TX_DATA_WIDTH_SHIFT, + MOON_DFC1_TX_DATA_WIDTH_MASK >> + MOON_DFC1_TX_DATA_WIDTH_SHIFT, + ARRAY_SIZE(moon_dfc_width_text), + moon_dfc_width_text, + moon_dfc_width_val), +}; +EXPORT_SYMBOL_GPL(moon_dfc_width); + +const struct soc_enum moon_dfc_type[] = { + SOC_VALUE_ENUM_SINGLE(MOON_DFC1_RX, + MOON_DFC1_RX_DATA_TYPE_SHIFT, + MOON_DFC1_RX_DATA_TYPE_MASK >> + MOON_DFC1_RX_DATA_TYPE_SHIFT, + ARRAY_SIZE(moon_dfc_type_text), + moon_dfc_type_text, + moon_dfc_type_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC1_TX, + MOON_DFC1_TX_DATA_TYPE_SHIFT, + MOON_DFC1_TX_DATA_TYPE_MASK >> + MOON_DFC1_TX_DATA_TYPE_SHIFT, + ARRAY_SIZE(moon_dfc_type_text), + moon_dfc_type_text, + moon_dfc_type_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC2_RX, + MOON_DFC1_RX_DATA_TYPE_SHIFT, + MOON_DFC1_RX_DATA_TYPE_MASK >> + MOON_DFC1_RX_DATA_TYPE_SHIFT, + ARRAY_SIZE(moon_dfc_type_text), + moon_dfc_type_text, + moon_dfc_type_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC2_TX, + MOON_DFC1_TX_DATA_TYPE_SHIFT, + MOON_DFC1_TX_DATA_TYPE_MASK >> + MOON_DFC1_TX_DATA_TYPE_SHIFT, + ARRAY_SIZE(moon_dfc_type_text), + moon_dfc_type_text, + moon_dfc_type_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC3_RX, + MOON_DFC1_RX_DATA_TYPE_SHIFT, + MOON_DFC1_RX_DATA_TYPE_MASK >> + MOON_DFC1_RX_DATA_TYPE_SHIFT, + ARRAY_SIZE(moon_dfc_type_text), + moon_dfc_type_text, + moon_dfc_type_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC3_TX, + MOON_DFC1_TX_DATA_TYPE_SHIFT, + MOON_DFC1_TX_DATA_TYPE_MASK >> + MOON_DFC1_TX_DATA_TYPE_SHIFT, + ARRAY_SIZE(moon_dfc_type_text), + moon_dfc_type_text, + moon_dfc_type_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC4_RX, + MOON_DFC1_RX_DATA_TYPE_SHIFT, + MOON_DFC1_RX_DATA_TYPE_MASK >> + MOON_DFC1_RX_DATA_TYPE_SHIFT, + ARRAY_SIZE(moon_dfc_type_text), + moon_dfc_type_text, + moon_dfc_type_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC4_TX, + MOON_DFC1_TX_DATA_TYPE_SHIFT, + MOON_DFC1_TX_DATA_TYPE_MASK >> + MOON_DFC1_TX_DATA_TYPE_SHIFT, + ARRAY_SIZE(moon_dfc_type_text), + moon_dfc_type_text, + moon_dfc_type_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC5_RX, + MOON_DFC1_RX_DATA_TYPE_SHIFT, + MOON_DFC1_RX_DATA_TYPE_MASK >> + MOON_DFC1_RX_DATA_TYPE_SHIFT, + ARRAY_SIZE(moon_dfc_type_text), + moon_dfc_type_text, + moon_dfc_type_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC5_TX, + MOON_DFC1_TX_DATA_TYPE_SHIFT, + MOON_DFC1_TX_DATA_TYPE_MASK >> + MOON_DFC1_TX_DATA_TYPE_SHIFT, + ARRAY_SIZE(moon_dfc_type_text), + moon_dfc_type_text, + moon_dfc_type_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC6_RX, + MOON_DFC1_RX_DATA_TYPE_SHIFT, + MOON_DFC1_RX_DATA_TYPE_MASK >> + MOON_DFC1_RX_DATA_TYPE_SHIFT, + ARRAY_SIZE(moon_dfc_type_text), + moon_dfc_type_text, + moon_dfc_type_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC6_TX, + MOON_DFC1_TX_DATA_TYPE_SHIFT, + MOON_DFC1_TX_DATA_TYPE_MASK >> + MOON_DFC1_TX_DATA_TYPE_SHIFT, + ARRAY_SIZE(moon_dfc_type_text), + moon_dfc_type_text, + moon_dfc_type_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC7_RX, + MOON_DFC1_RX_DATA_TYPE_SHIFT, + MOON_DFC1_RX_DATA_TYPE_MASK >> + MOON_DFC1_RX_DATA_TYPE_SHIFT, + ARRAY_SIZE(moon_dfc_type_text), + moon_dfc_type_text, + moon_dfc_type_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC7_TX, + MOON_DFC1_TX_DATA_TYPE_SHIFT, + MOON_DFC1_TX_DATA_TYPE_MASK >> + MOON_DFC1_TX_DATA_TYPE_SHIFT, + ARRAY_SIZE(moon_dfc_type_text), + moon_dfc_type_text, + moon_dfc_type_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC8_RX, + MOON_DFC1_RX_DATA_TYPE_SHIFT, + MOON_DFC1_RX_DATA_TYPE_MASK >> + MOON_DFC1_RX_DATA_TYPE_SHIFT, + ARRAY_SIZE(moon_dfc_type_text), + moon_dfc_type_text, + moon_dfc_type_val), + SOC_VALUE_ENUM_SINGLE(MOON_DFC8_TX, + MOON_DFC1_TX_DATA_TYPE_SHIFT, + MOON_DFC1_TX_DATA_TYPE_MASK >> + MOON_DFC1_TX_DATA_TYPE_SHIFT, + ARRAY_SIZE(moon_dfc_type_text), + moon_dfc_type_text, + moon_dfc_type_val), +}; +EXPORT_SYMBOL_GPL(moon_dfc_type); + const struct soc_enum arizona_fx_rate = SOC_VALUE_ENUM_SINGLE(ARIZONA_FX_CTRL1, ARIZONA_FX_RATE_SHIFT, 0xf, @@ -1880,6 +2238,60 @@ int arizona_ip_mode_put(struct snd_kcontrol *kcontrol, } EXPORT_SYMBOL_GPL(arizona_ip_mode_put); +int moon_in_rate_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + unsigned int reg, mask; + int ret = 0; + + mutex_lock_nested(&codec->card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); + + /* Cannot change rate on an active input */ + reg = snd_soc_read(codec, ARIZONA_INPUT_ENABLES); + mask = (e->reg - ARIZONA_IN1L_CONTROL) / 4; + mask ^= 0x1; /* Flip bottom bit for channel order */ + + if (reg & mask) { + ret = -EBUSY; + goto exit; + } + + ret = snd_soc_put_value_enum_double(kcontrol, ucontrol); +exit: + mutex_unlock(&codec->card->dapm_mutex); + return ret; +} +EXPORT_SYMBOL_GPL(moon_in_rate_put); + +int moon_dfc_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + unsigned int reg = e->reg; + unsigned int val; + int ret = 0; + + reg = ((reg / 6) * 6) - 2; + + mutex_lock_nested(&codec->card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); + + /* Cannot change dfc settings when its on */ + val = snd_soc_read(codec, reg); + if (val & MOON_DFC1_ENA) { + ret = -EBUSY; + goto exit; + } + + ret = snd_soc_put_value_enum_double(kcontrol, ucontrol); +exit: + mutex_unlock(&codec->card->dapm_mutex); + return ret; +} +EXPORT_SYMBOL_GPL(moon_dfc_put); + static void arizona_in_set_vu(struct snd_soc_codec *codec, int ena) { struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); @@ -2215,6 +2627,113 @@ int clearwater_hp_ev(struct snd_soc_dapm_widget *w, } EXPORT_SYMBOL_GPL(clearwater_hp_ev); +static void moon_analog_post_enable(struct snd_soc_dapm_widget *w) +{ + unsigned int mask, val; + + switch (w->shift) { + case ARIZONA_OUT1L_ENA_SHIFT: + case ARIZONA_OUT1R_ENA_SHIFT: + mask = ARIZONA_HP1_EDRE_STEREO_MASK; + val = ARIZONA_HP1_EDRE_STEREO; + break; + case ARIZONA_OUT2L_ENA_SHIFT: + case ARIZONA_OUT2R_ENA_SHIFT: + mask = ARIZONA_HP2_EDRE_STEREO_MASK; + val = ARIZONA_HP2_EDRE_STEREO; + break; + case ARIZONA_OUT3L_ENA_SHIFT: + case ARIZONA_OUT3R_ENA_SHIFT: + mask = ARIZONA_HP3_EDRE_STEREO_MASK; + val = ARIZONA_HP3_EDRE_STEREO; + break; + default: + return; + } + + snd_soc_update_bits(w->codec, + CLEARWATER_EDRE_HP_STEREO_CONTROL, + mask, val); +} + +static void moon_analog_post_disable(struct snd_soc_dapm_widget *w) +{ + unsigned int mask; + + switch (w->shift) { + case ARIZONA_OUT1L_ENA_SHIFT: + case ARIZONA_OUT1R_ENA_SHIFT: + mask = ARIZONA_HP1_EDRE_STEREO_MASK; + break; + case ARIZONA_OUT2L_ENA_SHIFT: + case ARIZONA_OUT2R_ENA_SHIFT: + mask = ARIZONA_HP2_EDRE_STEREO_MASK; + break; + case ARIZONA_OUT3L_ENA_SHIFT: + case ARIZONA_OUT3R_ENA_SHIFT: + mask = ARIZONA_HP3_EDRE_STEREO_MASK; + break; + default: + return; + } + + snd_soc_update_bits(w->codec, + CLEARWATER_EDRE_HP_STEREO_CONTROL, + mask, 0); +} + +int moon_hp_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + int ret; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + case SND_SOC_DAPM_PRE_PMD: + return arizona_hp_ev(w, kcontrol, event); + case SND_SOC_DAPM_POST_PMU: + ret = arizona_hp_ev(w, kcontrol, event); + if (ret < 0) + return ret; + + moon_analog_post_enable(w); + return 0; + case SND_SOC_DAPM_POST_PMD: + ret = arizona_hp_ev(w, kcontrol, event); + moon_analog_post_disable(w); + return ret; + default: + return -EINVAL; + } +} +EXPORT_SYMBOL_GPL(moon_hp_ev); + +int moon_analog_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + int ret; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + case SND_SOC_DAPM_PRE_PMD: + return arizona_out_ev(w, kcontrol, event); + case SND_SOC_DAPM_POST_PMU: + ret = arizona_out_ev(w, kcontrol, event); + if (ret < 0) + return ret; + + moon_analog_post_enable(w); + return 0; + case SND_SOC_DAPM_POST_PMD: + ret = arizona_out_ev(w, kcontrol, event); + moon_analog_post_disable(w); + return ret; + default: + return -EINVAL; + } +} +EXPORT_SYMBOL_GPL(moon_analog_ev); + int arizona_anc_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index e1a59c680bf..5cce3f2e684 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -115,7 +115,7 @@ struct arizona_priv { }; #define ARIZONA_NUM_MIXER_INPUTS 134 -#define ARIZONA_V2_NUM_MIXER_INPUTS 138 +#define ARIZONA_V2_NUM_MIXER_INPUTS 146 extern const unsigned int arizona_mixer_tlv[]; extern const char * const arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS]; @@ -279,11 +279,17 @@ extern unsigned int arizona_v2_mixer_values[ARIZONA_V2_NUM_MIXER_INPUTS]; #define ARIZONA_SYNC_RATE_ENUM_SIZE 3 #define ARIZONA_ASYNC_RATE_ENUM_SIZE 2 #define ARIZONA_SAMPLE_RATE_ENUM_SIZE 14 +#define MOON_DFC_TYPE_ENUM_SIZE 5 +#define MOON_DFC_WIDTH_ENUM_SIZE 5 extern const char * const arizona_rate_text[ARIZONA_RATE_ENUM_SIZE]; extern const unsigned int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE]; extern const char * const arizona_sample_rate_text[ARIZONA_SAMPLE_RATE_ENUM_SIZE]; extern const unsigned int arizona_sample_rate_val[ARIZONA_SAMPLE_RATE_ENUM_SIZE]; +extern const char * const moon_dfc_width_text[MOON_DFC_WIDTH_ENUM_SIZE]; +extern const unsigned int moon_dfc_width_val[MOON_DFC_WIDTH_ENUM_SIZE]; +extern const char * const moon_dfc_type_text[MOON_DFC_TYPE_ENUM_SIZE]; +extern const unsigned int moon_dfc_type_val[MOON_DFC_TYPE_ENUM_SIZE]; extern const struct soc_enum arizona_sample_rate[]; extern const struct soc_enum arizona_isrc_fsl[]; @@ -296,6 +302,9 @@ extern const struct soc_enum arizona_input_rate; extern const struct soc_enum arizona_output_rate; extern const struct soc_enum arizona_fx_rate; extern const struct soc_enum arizona_spdif_rate; +extern const struct soc_enum moon_input_rate[]; +extern const struct soc_enum moon_dfc_width[]; +extern const struct soc_enum moon_dfc_type[]; extern const struct soc_enum arizona_in_vi_ramp; extern const struct soc_enum arizona_in_vd_ramp; @@ -323,6 +332,12 @@ extern const struct soc_enum arizona_ip_mode[]; extern int arizona_ip_mode_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); +extern int moon_in_rate_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); + +extern int moon_dfc_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); + extern int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); @@ -335,6 +350,12 @@ extern int arizona_hp_ev(struct snd_soc_dapm_widget *w, extern int clearwater_hp_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); +extern int moon_hp_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event); +extern int moon_analog_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event); extern int arizona_anc_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c new file mode 100644 index 00000000000..01f29558deb --- /dev/null +++ b/sound/soc/codecs/moon.c @@ -0,0 +1,3127 @@ +/* + * moon.c -- ALSA SoC Audio driver for MOON-class devices + * + * Copyright 2015 Cirrus Logic + * + * Author: Nikesh Oswal + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "arizona.h" +#include "wm_adsp.h" +#include "moon.h" + +#define MOON_NUM_ADSP 7 + +#define MOON_DEFAULT_FRAGMENTS 1 +#define MOON_DEFAULT_FRAGMENT_SIZE 4096 + +#define MOON_FRF_COEFFICIENT_LEN 4 + +static int moon_frf_bytes_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); + +#define MOON_FRF_BYTES(xname, xbase, xregs) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ + .info = snd_soc_bytes_info, .get = snd_soc_bytes_get, \ + .put = moon_frf_bytes_put, .private_value = \ + ((unsigned long)&(struct soc_bytes) \ + {.base = xbase, .num_regs = xregs }) } + +/* 2 mixer inputs with a stride of n in the register address */ +#define MOON_MIXER_INPUTS_2_N(_reg, n) \ + (_reg), \ + (_reg) + (1 * (n)) + +/* 4 mixer inputs with a stride of n in the register address */ +#define MOON_MIXER_INPUTS_4_N(_reg, n) \ + MOON_MIXER_INPUTS_2_N(_reg, n), \ + MOON_MIXER_INPUTS_2_N(_reg + (2 * n), n) + +#define MOON_DSP_MIXER_INPUTS(_reg) \ + MOON_MIXER_INPUTS_4_N(_reg, 2), \ + MOON_MIXER_INPUTS_4_N(_reg + 8, 2), \ + MOON_MIXER_INPUTS_4_N(_reg + 16, 8), \ + MOON_MIXER_INPUTS_2_N(_reg + 48, 8) + +static const int moon_fx_inputs[] = { + MOON_MIXER_INPUTS_4_N(ARIZONA_EQ1MIX_INPUT_1_SOURCE, 2), + MOON_MIXER_INPUTS_4_N(ARIZONA_EQ2MIX_INPUT_1_SOURCE, 2), + MOON_MIXER_INPUTS_4_N(ARIZONA_EQ3MIX_INPUT_1_SOURCE, 2), + MOON_MIXER_INPUTS_4_N(ARIZONA_EQ4MIX_INPUT_1_SOURCE, 2), + MOON_MIXER_INPUTS_4_N(ARIZONA_DRC1LMIX_INPUT_1_SOURCE, 2), + MOON_MIXER_INPUTS_4_N(ARIZONA_DRC1RMIX_INPUT_1_SOURCE, 2), + MOON_MIXER_INPUTS_4_N(ARIZONA_DRC2LMIX_INPUT_1_SOURCE, 2), + MOON_MIXER_INPUTS_4_N(ARIZONA_DRC2RMIX_INPUT_1_SOURCE, 2), + MOON_MIXER_INPUTS_4_N(ARIZONA_HPLP1MIX_INPUT_1_SOURCE, 2), + MOON_MIXER_INPUTS_4_N(ARIZONA_HPLP2MIX_INPUT_1_SOURCE, 2), + MOON_MIXER_INPUTS_4_N(ARIZONA_HPLP3MIX_INPUT_1_SOURCE, 2), + MOON_MIXER_INPUTS_4_N(ARIZONA_HPLP4MIX_INPUT_1_SOURCE, 2), +}; + +static const int moon_asrc1_1_inputs[] = { + MOON_MIXER_INPUTS_2_N(CLEARWATER_ASRC1_1LMIX_INPUT_1_SOURCE, 8), +}; + +static const int moon_asrc1_2_inputs[] = { + MOON_MIXER_INPUTS_2_N(CLEARWATER_ASRC1_2LMIX_INPUT_1_SOURCE, 8), +}; + +static const int moon_asrc2_1_inputs[] = { + MOON_MIXER_INPUTS_2_N(CLEARWATER_ASRC2_1LMIX_INPUT_1_SOURCE, 8), +}; + +static const int moon_asrc2_2_inputs[] = { + MOON_MIXER_INPUTS_2_N(CLEARWATER_ASRC2_2LMIX_INPUT_1_SOURCE, 8), +}; + +static const int moon_isrc1_fsl_inputs[] = { + MOON_MIXER_INPUTS_4_N(ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE, 8), +}; + +static const int moon_isrc1_fsh_inputs[] = { + MOON_MIXER_INPUTS_4_N(ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE, 8), +}; + +static const int moon_isrc2_fsl_inputs[] = { + MOON_MIXER_INPUTS_4_N(ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE, 8), +}; + +static const int moon_isrc2_fsh_inputs[] = { + MOON_MIXER_INPUTS_4_N(ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE, 8), +}; + +static const int moon_isrc3_fsl_inputs[] = { + MOON_MIXER_INPUTS_2_N(ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE, 8), +}; + +static const int moon_isrc3_fsh_inputs[] = { + MOON_MIXER_INPUTS_2_N(ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE, 8), +}; + +static const int moon_isrc4_fsl_inputs[] = { + MOON_MIXER_INPUTS_2_N(ARIZONA_ISRC4INT1MIX_INPUT_1_SOURCE, 8), +}; + +static const int moon_isrc4_fsh_inputs[] = { + MOON_MIXER_INPUTS_2_N(ARIZONA_ISRC4DEC1MIX_INPUT_1_SOURCE, 8), +}; + +static const int moon_out_inputs[] = { + MOON_MIXER_INPUTS_4_N(ARIZONA_OUT1LMIX_INPUT_1_SOURCE, 2), + MOON_MIXER_INPUTS_4_N(ARIZONA_OUT1RMIX_INPUT_1_SOURCE, 2), + MOON_MIXER_INPUTS_4_N(ARIZONA_OUT2LMIX_INPUT_1_SOURCE, 2), + MOON_MIXER_INPUTS_4_N(ARIZONA_OUT2RMIX_INPUT_1_SOURCE, 2), + MOON_MIXER_INPUTS_4_N(ARIZONA_OUT3LMIX_INPUT_1_SOURCE, 2), + MOON_MIXER_INPUTS_4_N(ARIZONA_OUT3RMIX_INPUT_1_SOURCE, 2), + MOON_MIXER_INPUTS_4_N(ARIZONA_OUT5LMIX_INPUT_1_SOURCE, 2), + MOON_MIXER_INPUTS_4_N(ARIZONA_OUT5RMIX_INPUT_1_SOURCE, 2), +}; + +static const int moon_spd1_inputs[] = { + MOON_MIXER_INPUTS_2_N(ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE, 8), +}; + +static const int moon_dsp1_inputs[] = { + MOON_DSP_MIXER_INPUTS(ARIZONA_DSP1LMIX_INPUT_1_SOURCE), +}; + +static const int moon_dsp2_inputs[] = { + MOON_DSP_MIXER_INPUTS(ARIZONA_DSP2LMIX_INPUT_1_SOURCE), +}; + +static const int moon_dsp3_inputs[] = { + MOON_DSP_MIXER_INPUTS(ARIZONA_DSP3LMIX_INPUT_1_SOURCE), +}; + +static const int moon_dsp4_inputs[] = { + MOON_DSP_MIXER_INPUTS(ARIZONA_DSP4LMIX_INPUT_1_SOURCE), +}; + +static const int moon_dsp5_inputs[] = { + MOON_DSP_MIXER_INPUTS(CLEARWATER_DSP5LMIX_INPUT_1_SOURCE), +}; + +static const int moon_dsp6_inputs[] = { + MOON_DSP_MIXER_INPUTS(CLEARWATER_DSP6LMIX_INPUT_1_SOURCE), +}; + +static const int moon_dsp7_inputs[] = { + MOON_DSP_MIXER_INPUTS(CLEARWATER_DSP7LMIX_INPUT_1_SOURCE), +}; + +static int moon_rate_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); + +#define MOON_RATE_ENUM(xname, xenum) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\ + .info = snd_soc_info_enum_double, \ + .get = snd_soc_get_value_enum_double, .put = moon_rate_put, \ + .private_value = (unsigned long)&xenum } + +struct moon_compr { + struct mutex lock; + + struct snd_compr_stream *stream; + struct wm_adsp *adsp; + + size_t total_copied; + bool allocated; + bool trig; +}; + +struct moon_priv { + struct arizona_priv core; + struct arizona_fll fll[2]; + struct moon_compr compr_info; + + struct mutex fw_lock; +}; + +static const struct wm_adsp_region moon_dsp1_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x080000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x0e0000 }, + { .type = WMFW_ADSP2_XM, .base = 0x0a0000 }, + { .type = WMFW_ADSP2_YM, .base = 0x0c0000 }, +}; + +static const struct wm_adsp_region moon_dsp2_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x100000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x160000 }, + { .type = WMFW_ADSP2_XM, .base = 0x120000 }, + { .type = WMFW_ADSP2_YM, .base = 0x140000 }, +}; + +static const struct wm_adsp_region moon_dsp3_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x180000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x1e0000 }, + { .type = WMFW_ADSP2_XM, .base = 0x1a0000 }, + { .type = WMFW_ADSP2_YM, .base = 0x1c0000 }, +}; + +static const struct wm_adsp_region moon_dsp4_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x200000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x260000 }, + { .type = WMFW_ADSP2_XM, .base = 0x220000 }, + { .type = WMFW_ADSP2_YM, .base = 0x240000 }, +}; + +static const struct wm_adsp_region moon_dsp5_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x280000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x2e0000 }, + { .type = WMFW_ADSP2_XM, .base = 0x2a0000 }, + { .type = WMFW_ADSP2_YM, .base = 0x2c0000 }, +}; + +static const struct wm_adsp_region moon_dsp6_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x300000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x360000 }, + { .type = WMFW_ADSP2_XM, .base = 0x320000 }, + { .type = WMFW_ADSP2_YM, .base = 0x340000 }, +}; + +static const struct wm_adsp_region moon_dsp7_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x380000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x3e0000 }, + { .type = WMFW_ADSP2_XM, .base = 0x3a0000 }, + { .type = WMFW_ADSP2_YM, .base = 0x3c0000 }, +}; + +static const struct wm_adsp_region *moon_dsp_regions[] = { + moon_dsp1_regions, + moon_dsp2_regions, + moon_dsp3_regions, + moon_dsp4_regions, + moon_dsp5_regions, + moon_dsp6_regions, + moon_dsp7_regions, +}; + +static const int wm_adsp2_control_bases[] = { + CLEARWATER_DSP1_CONFIG, + CLEARWATER_DSP2_CONFIG, + CLEARWATER_DSP3_CONFIG, + CLEARWATER_DSP4_CONFIG, + CLEARWATER_DSP5_CONFIG, + CLEARWATER_DSP6_CONFIG, + CLEARWATER_DSP7_CONFIG, +}; + +static const char * const moon_inmux_texts[] = { + "A", + "B", +}; + +static const SOC_ENUM_SINGLE_DECL(moon_in1muxl_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_SRC_SHIFT, + moon_inmux_texts); + +static const SOC_ENUM_SINGLE_DECL(moon_in1muxr_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1R, + ARIZONA_IN1R_SRC_SHIFT, + moon_inmux_texts); + +static const SOC_ENUM_SINGLE_DECL(moon_in2muxl_enum, + ARIZONA_ADC_DIGITAL_VOLUME_2L, + ARIZONA_IN2L_SRC_SHIFT, + moon_inmux_texts); + +static const struct snd_kcontrol_new moon_in1mux[2] = { + SOC_DAPM_ENUM("IN1L Mux", moon_in1muxl_enum), + SOC_DAPM_ENUM("IN1R Mux", moon_in1muxr_enum), +}; + +static const struct snd_kcontrol_new moon_in2mux = + SOC_DAPM_ENUM("IN2L Mux", moon_in2muxl_enum); + +static int moon_frf_bytes_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_bytes *params = (void *)kcontrol->private_value; + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; + int ret, len; + void *data; + + len = params->num_regs * codec->val_bytes; + + data = kmemdup(ucontrol->value.bytes.data, len, GFP_KERNEL | GFP_DMA); + if (!data) { + ret = -ENOMEM; + goto out; + } + + mutex_lock(&arizona->reg_setting_lock); + regmap_write(arizona->regmap, 0x80, 0x3); + + ret = regmap_raw_write(codec->control_data, params->base, + data, len); + + regmap_write(arizona->regmap, 0x80, 0x0); + mutex_unlock(&arizona->reg_setting_lock); + +out: + kfree(data); + return ret; +} + +/* Allow the worst case number of sources (FX Rate currently) */ +static unsigned int mixer_sources_cache[ARRAY_SIZE(moon_fx_inputs)]; + +static int moon_get_sources(unsigned int reg, + const int **cur_sources, int *lim) +{ + int ret = 0; + + switch (reg) { + case ARIZONA_FX_CTRL1: + *cur_sources = moon_fx_inputs; + *lim = ARRAY_SIZE(moon_fx_inputs); + break; + case CLEARWATER_ASRC1_RATE1: + *cur_sources = moon_asrc1_1_inputs; + *lim = ARRAY_SIZE(moon_asrc1_1_inputs); + break; + case CLEARWATER_ASRC1_RATE2: + *cur_sources = moon_asrc1_2_inputs; + *lim = ARRAY_SIZE(moon_asrc1_2_inputs); + break; + case CLEARWATER_ASRC2_RATE1: + *cur_sources = moon_asrc2_1_inputs; + *lim = ARRAY_SIZE(moon_asrc2_1_inputs); + break; + case CLEARWATER_ASRC2_RATE2: + *cur_sources = moon_asrc2_2_inputs; + *lim = ARRAY_SIZE(moon_asrc2_2_inputs); + break; + case ARIZONA_ISRC_1_CTRL_1: + *cur_sources = moon_isrc1_fsh_inputs; + *lim = ARRAY_SIZE(moon_isrc1_fsh_inputs); + break; + case ARIZONA_ISRC_1_CTRL_2: + *cur_sources = moon_isrc1_fsl_inputs; + *lim = ARRAY_SIZE(moon_isrc1_fsl_inputs); + break; + case ARIZONA_ISRC_2_CTRL_1: + *cur_sources = moon_isrc2_fsh_inputs; + *lim = ARRAY_SIZE(moon_isrc2_fsh_inputs); + break; + case ARIZONA_ISRC_2_CTRL_2: + *cur_sources = moon_isrc2_fsl_inputs; + *lim = ARRAY_SIZE(moon_isrc2_fsl_inputs); + break; + case ARIZONA_ISRC_3_CTRL_1: + *cur_sources = moon_isrc3_fsh_inputs; + *lim = ARRAY_SIZE(moon_isrc3_fsh_inputs); + break; + case ARIZONA_ISRC_3_CTRL_2: + *cur_sources = moon_isrc3_fsl_inputs; + *lim = ARRAY_SIZE(moon_isrc3_fsl_inputs); + break; + case ARIZONA_ISRC_4_CTRL_1: + *cur_sources = moon_isrc4_fsh_inputs; + *lim = ARRAY_SIZE(moon_isrc4_fsh_inputs); + break; + case ARIZONA_ISRC_4_CTRL_2: + *cur_sources = moon_isrc4_fsl_inputs; + *lim = ARRAY_SIZE(moon_isrc4_fsl_inputs); + break; + case ARIZONA_OUTPUT_RATE_1: + *cur_sources = moon_out_inputs; + *lim = ARRAY_SIZE(moon_out_inputs); + break; + case ARIZONA_SPD1_TX_CONTROL: + *cur_sources = moon_spd1_inputs; + *lim = ARRAY_SIZE(moon_spd1_inputs); + break; + case CLEARWATER_DSP1_CONFIG: + *cur_sources = moon_dsp1_inputs; + *lim = ARRAY_SIZE(moon_dsp1_inputs); + break; + case CLEARWATER_DSP2_CONFIG: + *cur_sources = moon_dsp2_inputs; + *lim = ARRAY_SIZE(moon_dsp2_inputs); + break; + case CLEARWATER_DSP3_CONFIG: + *cur_sources = moon_dsp3_inputs; + *lim = ARRAY_SIZE(moon_dsp3_inputs); + break; + case CLEARWATER_DSP4_CONFIG: + *cur_sources = moon_dsp4_inputs; + *lim = ARRAY_SIZE(moon_dsp4_inputs); + break; + case CLEARWATER_DSP5_CONFIG: + *cur_sources = moon_dsp5_inputs; + *lim = ARRAY_SIZE(moon_dsp5_inputs); + break; + case CLEARWATER_DSP6_CONFIG: + *cur_sources = moon_dsp6_inputs; + *lim = ARRAY_SIZE(moon_dsp6_inputs); + break; + case CLEARWATER_DSP7_CONFIG: + *cur_sources = moon_dsp7_inputs; + *lim = ARRAY_SIZE(moon_dsp7_inputs); + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static int moon_rate_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int ret, err; + int lim; + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + + struct moon_priv *moon = snd_soc_codec_get_drvdata(codec); + struct arizona_priv *priv = &moon->core; + struct arizona *arizona = priv->arizona; + + const int *cur_sources; + + unsigned int val, cur; + unsigned int mask; + + if (ucontrol->value.enumerated.item[0] > e->max - 1) + return -EINVAL; + + val = e->values[ucontrol->value.enumerated.item[0]] << e->shift_l; + mask = e->mask << e->shift_l; + + ret = regmap_read(arizona->regmap, e->reg, &cur); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read current reg: %d\n", ret); + return ret; + } + + if ((cur & mask) == (val & mask)) + return 0; + + ret = moon_get_sources((int)e->reg, &cur_sources, &lim); + if (ret != 0) { + dev_err(arizona->dev, "Failed to get sources for 0x%08x: %d\n", + e->reg, + ret); + return ret; + } + + mutex_lock(&arizona->rate_lock); + + ret = arizona_cache_and_clear_sources(arizona, cur_sources, + mixer_sources_cache, lim); + if (ret != 0) { + dev_err(arizona->dev, + "%s Failed to cache and clear sources %d\n", + __func__, + ret); + goto out; + } + + /* Apply the rate through the original callback */ + clearwater_spin_sysclk(arizona); + udelay(300); + ret = snd_soc_update_bits_locked(codec, e->reg, mask, val); + clearwater_spin_sysclk(arizona); + udelay(300); + +out: + err = arizona_restore_sources(arizona, cur_sources, + mixer_sources_cache, lim); + if (err != 0) { + dev_err(arizona->dev, + "%s Failed to restore sources %d\n", + __func__, + err); + } + + mutex_unlock(&arizona->rate_lock); + return ret; +} + +static int moon_adsp_rate_put_cb(struct wm_adsp *adsp, + unsigned int mask, + unsigned int val) +{ + int ret, err; + int lim; + const int *cur_sources; + struct arizona *arizona = dev_get_drvdata(adsp->dev); + unsigned int cur; + + ret = regmap_read(adsp->regmap, adsp->base, &cur); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read current: %d\n", ret); + return ret; + } + + if ((val & mask) == (cur & mask)) + return 0; + + ret = moon_get_sources(adsp->base, &cur_sources, &lim); + if (ret != 0) { + dev_err(arizona->dev, "Failed to get sources for 0x%08x: %d\n", + adsp->base, + ret); + return ret; + } + + dev_dbg(arizona->dev, "%s for DSP%d\n", __func__, adsp->num); + + mutex_lock(&arizona->rate_lock); + + ret = arizona_cache_and_clear_sources(arizona, cur_sources, + mixer_sources_cache, lim); + + if (ret != 0) { + dev_err(arizona->dev, + "%s Failed to cache and clear sources %d\n", + __func__, + ret); + goto out; + } + + clearwater_spin_sysclk(arizona); + udelay(300); + /* Apply the rate */ + ret = regmap_update_bits(adsp->regmap, adsp->base, mask, val); + clearwater_spin_sysclk(arizona); + udelay(300); + +out: + err = arizona_restore_sources(arizona, cur_sources, + mixer_sources_cache, lim); + + if (err != 0) { + dev_err(arizona->dev, + "%s Failed to restore sources %d\n", + __func__, + err); + } + + mutex_unlock(&arizona->rate_lock); + return ret; +} + +static int moon_sysclk_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + struct moon_priv *moon = snd_soc_codec_get_drvdata(codec); + struct arizona_priv *priv = &moon->core; + struct arizona *arizona = priv->arizona; + + clearwater_spin_sysclk(arizona); + udelay(300); + + return 0; +} + +static int moon_adsp_power_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_codec *codec = w->codec; + struct moon_priv *moon = snd_soc_codec_get_drvdata(codec); + struct arizona_priv *priv = &moon->core; + struct arizona *arizona = priv->arizona; + unsigned int freq; + int ret; + + ret = regmap_read(arizona->regmap, CLEARWATER_DSP_CLOCK_1, &freq); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to read CLEARWATER_DSP_CLOCK_1: %d\n", ret); + return ret; + } + + freq &= CLEARWATER_DSP_CLK_FREQ_LEGACY_MASK; + freq >>= CLEARWATER_DSP_CLK_FREQ_LEGACY_SHIFT; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + if (w->shift == 5) { + mutex_lock(&moon->compr_info.lock); + moon->compr_info.trig = false; + mutex_unlock(&moon->compr_info.lock); + } + break; + default: + break; + } + + return wm_adsp2_early_event(w, kcontrol, event, freq); +} + +static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); +static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); +static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); +static DECLARE_TLV_DB_SCALE(noise_tlv, -13200, 600, 0); +static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); + +#define MOON_NG_SRC(name, base) \ + SOC_SINGLE(name " NG HPOUT1L Switch", base, 0, 1, 0), \ + SOC_SINGLE(name " NG HPOUT1R Switch", base, 1, 1, 0), \ + SOC_SINGLE(name " NG HPOUT2L Switch", base, 2, 1, 0), \ + SOC_SINGLE(name " NG HPOUT2R Switch", base, 3, 1, 0), \ + SOC_SINGLE(name " NG HPOUT3L Switch", base, 4, 1, 0), \ + SOC_SINGLE(name " NG HPOUT3R Switch", base, 5, 1, 0), \ + SOC_SINGLE(name " NG SPKDAT1L Switch", base, 8, 1, 0), \ + SOC_SINGLE(name " NG SPKDAT1R Switch", base, 9, 1, 0) + +#define MOON_RXANC_INPUT_ROUTES(widget, name) \ + { widget, NULL, name " NG Mux" }, \ + { name " NG Internal", NULL, "RXANC NG Clock" }, \ + { name " NG Internal", NULL, name " Channel" }, \ + { name " NG External", NULL, "RXANC NG External Clock" }, \ + { name " NG External", NULL, name " Channel" }, \ + { name " NG Mux", "None", name " Channel" }, \ + { name " NG Mux", "Internal", name " NG Internal" }, \ + { name " NG Mux", "External", name " NG External" }, \ + { name " Channel", "Left", name " Left Input" }, \ + { name " Channel", "Combine", name " Left Input" }, \ + { name " Channel", "Right", name " Right Input" }, \ + { name " Channel", "Combine", name " Right Input" }, \ + { name " Left Input", "IN1", "IN1L PGA" }, \ + { name " Right Input", "IN1", "IN1R PGA" }, \ + { name " Left Input", "IN2", "IN2L PGA" }, \ + { name " Right Input", "IN2", "IN2R PGA" }, \ + { name " Left Input", "IN3", "IN3L PGA" }, \ + { name " Right Input", "IN3", "IN3R PGA" }, \ + { name " Left Input", "IN4", "IN4L PGA" }, \ + { name " Right Input", "IN4", "IN4R PGA" }, \ + { name " Left Input", "IN5", "IN5L PGA" }, \ + { name " Right Input", "IN5", "IN5R PGA" }, \ + { name " Left Input", "IN6", "IN6L PGA" }, \ + { name " Right Input", "IN6", "IN6R PGA" } + +#define MOON_RXANC_OUTPUT_ROUTES(widget, name) \ + { widget, NULL, name " ANC Source" }, \ + { name " ANC Source", "RXANCL", "RXANCL" }, \ + { name " ANC Source", "RXANCR", "RXANCR" } + +static const struct snd_kcontrol_new moon_snd_controls[] = { +SOC_VALUE_ENUM("IN1 OSR", clearwater_in_dmic_osr[0]), +SOC_VALUE_ENUM("IN2 OSR", clearwater_in_dmic_osr[1]), +SOC_VALUE_ENUM("IN3 OSR", clearwater_in_dmic_osr[2]), +SOC_VALUE_ENUM("IN4 OSR", clearwater_in_dmic_osr[3]), +SOC_VALUE_ENUM("IN5 OSR", clearwater_in_dmic_osr[4]), + +SOC_SINGLE_RANGE_TLV("IN1L Volume", ARIZONA_IN1L_CONTROL, + ARIZONA_IN1L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), +SOC_SINGLE_RANGE_TLV("IN1R Volume", ARIZONA_IN1R_CONTROL, + ARIZONA_IN1R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), +SOC_SINGLE_RANGE_TLV("IN2L Volume", ARIZONA_IN2L_CONTROL, + ARIZONA_IN2L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), +SOC_SINGLE_RANGE_TLV("IN2R Volume", ARIZONA_IN2R_CONTROL, + ARIZONA_IN2R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), + +SOC_ENUM("IN HPF Cutoff Frequency", arizona_in_hpf_cut_enum), + +SOC_SINGLE("IN1L HPF Switch", ARIZONA_IN1L_CONTROL, + ARIZONA_IN1L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN1R HPF Switch", ARIZONA_IN1R_CONTROL, + ARIZONA_IN1R_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN2L HPF Switch", ARIZONA_IN2L_CONTROL, + ARIZONA_IN2L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN2R HPF Switch", ARIZONA_IN2R_CONTROL, + ARIZONA_IN2R_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN3L HPF Switch", ARIZONA_IN3L_CONTROL, + ARIZONA_IN3L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN3R HPF Switch", ARIZONA_IN3R_CONTROL, + ARIZONA_IN3R_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN4L HPF Switch", ARIZONA_IN4L_CONTROL, + ARIZONA_IN4L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN4R HPF Switch", ARIZONA_IN4R_CONTROL, + ARIZONA_IN4R_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN5L HPF Switch", ARIZONA_IN5L_CONTROL, + ARIZONA_IN5L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN5R HPF Switch", ARIZONA_IN5R_CONTROL, + ARIZONA_IN5R_HPF_SHIFT, 1, 0), + +SOC_SINGLE_TLV("IN1L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN1R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1R, + ARIZONA_IN1R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN2L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_2L, + ARIZONA_IN2L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN2R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_2R, + ARIZONA_IN2R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN3L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_3L, + ARIZONA_IN3L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN3R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_3R, + ARIZONA_IN3R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN4L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_4L, + ARIZONA_IN4L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN4R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_4R, + ARIZONA_IN4R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN5L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_5L, + ARIZONA_IN5L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN5R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_5R, + ARIZONA_IN5R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), + +SOC_ENUM("Input Ramp Up", arizona_in_vi_ramp), +SOC_ENUM("Input Ramp Down", arizona_in_vd_ramp), + +SND_SOC_BYTES("RXANC Coefficients", ARIZONA_ANC_COEFF_START, + ARIZONA_ANC_COEFF_END - ARIZONA_ANC_COEFF_START + 1), +SND_SOC_BYTES("RXANCL Config", ARIZONA_FCL_FILTER_CONTROL, 1), +SND_SOC_BYTES("RXANCL Coefficients", ARIZONA_FCL_COEFF_START, + ARIZONA_FCL_COEFF_END - ARIZONA_FCL_COEFF_START + 1), +SND_SOC_BYTES("RXANCR Config", CLEARWATER_FCR_FILTER_CONTROL, 1), +SND_SOC_BYTES("RXANCR Coefficients", CLEARWATER_FCR_COEFF_START, + CLEARWATER_FCR_COEFF_END - CLEARWATER_FCR_COEFF_START + 1), + +MOON_FRF_BYTES("FRF COEFF 1L", CLEARWATER_FRF_COEFFICIENT_1L_1, + MOON_FRF_COEFFICIENT_LEN), +MOON_FRF_BYTES("FRF COEFF 1R", CLEARWATER_FRF_COEFFICIENT_1R_1, + MOON_FRF_COEFFICIENT_LEN), +MOON_FRF_BYTES("FRF COEFF 2L", CLEARWATER_FRF_COEFFICIENT_2L_1, + MOON_FRF_COEFFICIENT_LEN), +MOON_FRF_BYTES("FRF COEFF 2R", CLEARWATER_FRF_COEFFICIENT_2R_1, + MOON_FRF_COEFFICIENT_LEN), +MOON_FRF_BYTES("FRF COEFF 3L", CLEARWATER_FRF_COEFFICIENT_3L_1, + MOON_FRF_COEFFICIENT_LEN), +MOON_FRF_BYTES("FRF COEFF 3R", CLEARWATER_FRF_COEFFICIENT_3R_1, + MOON_FRF_COEFFICIENT_LEN), +MOON_FRF_BYTES("FRF COEFF 5L", CLEARWATER_FRF_COEFFICIENT_5L_1, + MOON_FRF_COEFFICIENT_LEN), +MOON_FRF_BYTES("FRF COEFF 5R", CLEARWATER_FRF_COEFFICIENT_5R_1, + MOON_FRF_COEFFICIENT_LEN), + +SND_SOC_BYTES("DAC COMP 1", CLEARWATER_DAC_COMP_1, 1), +SND_SOC_BYTES("DAC COMP 2", CLEARWATER_DAC_COMP_2, 1), + +ARIZONA_MIXER_CONTROLS("EQ1", ARIZONA_EQ1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("EQ4", ARIZONA_EQ4MIX_INPUT_1_SOURCE), + +ARIZONA_EQ_CONTROL("EQ1 Coefficients", ARIZONA_EQ1_2), +SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B2 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B3 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B4 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B5 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +ARIZONA_EQ_CONTROL("EQ2 Coefficients", ARIZONA_EQ2_2), +SOC_SINGLE_TLV("EQ2 B1 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B2 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B3 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B4 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B5 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +ARIZONA_EQ_CONTROL("EQ3 Coefficients", ARIZONA_EQ3_2), +SOC_SINGLE_TLV("EQ3 B1 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B2 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B3 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B4 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B5 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +ARIZONA_EQ_CONTROL("EQ4 Coefficients", ARIZONA_EQ4_2), +SOC_SINGLE_TLV("EQ4 B1 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B2 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B3 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B4 Volume", ARIZONA_EQ4_2, ARIZONA_EQ4_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B5 Volume", ARIZONA_EQ4_2, ARIZONA_EQ4_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +ARIZONA_MIXER_CONTROLS("DRC1L", ARIZONA_DRC1LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DRC1R", ARIZONA_DRC1RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DRC2L", ARIZONA_DRC2LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DRC2R", ARIZONA_DRC2RMIX_INPUT_1_SOURCE), + +SND_SOC_BYTES_MASK("DRC1", ARIZONA_DRC1_CTRL1, 5, + ARIZONA_DRC1R_ENA | ARIZONA_DRC1L_ENA), +SND_SOC_BYTES_MASK("DRC2", CLEARWATER_DRC2_CTRL1, 5, + ARIZONA_DRC2R_ENA | ARIZONA_DRC2L_ENA), + +ARIZONA_MIXER_CONTROLS("LHPF1", ARIZONA_HPLP1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LHPF2", ARIZONA_HPLP2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LHPF3", ARIZONA_HPLP3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LHPF4", ARIZONA_HPLP4MIX_INPUT_1_SOURCE), + +SND_SOC_BYTES("LHPF1 Coefficients", ARIZONA_HPLPF1_2, 1), +SND_SOC_BYTES("LHPF2 Coefficients", ARIZONA_HPLPF2_2, 1), +SND_SOC_BYTES("LHPF3 Coefficients", ARIZONA_HPLPF3_2, 1), +SND_SOC_BYTES("LHPF4 Coefficients", ARIZONA_HPLPF4_2, 1), + +SOC_ENUM("LHPF1 Mode", arizona_lhpf1_mode), +SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode), +SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode), +SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), + +SOC_VALUE_ENUM("Sample Rate 2", arizona_sample_rate[0]), +SOC_VALUE_ENUM("Sample Rate 3", arizona_sample_rate[1]), +SOC_VALUE_ENUM("ASYNC Sample Rate 2", arizona_sample_rate[2]), + +MOON_RATE_ENUM("FX Rate", arizona_fx_rate), + +MOON_RATE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), +MOON_RATE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), +MOON_RATE_ENUM("ISRC3 FSL", arizona_isrc_fsl[2]), +MOON_RATE_ENUM("ISRC4 FSL", arizona_isrc_fsl[3]), +MOON_RATE_ENUM("ISRC1 FSH", arizona_isrc_fsh[0]), +MOON_RATE_ENUM("ISRC2 FSH", arizona_isrc_fsh[1]), +MOON_RATE_ENUM("ISRC3 FSH", arizona_isrc_fsh[2]), +MOON_RATE_ENUM("ISRC4 FSH", arizona_isrc_fsh[3]), +MOON_RATE_ENUM("ASRC1 Rate 1", clearwater_asrc1_rate[0]), +MOON_RATE_ENUM("ASRC1 Rate 2", clearwater_asrc1_rate[1]), +MOON_RATE_ENUM("ASRC2 Rate 1", clearwater_asrc2_rate[0]), +MOON_RATE_ENUM("ASRC2 Rate 2", clearwater_asrc2_rate[1]), + +ARIZONA_MIXER_CONTROLS("DSP1L", ARIZONA_DSP1LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP1R", ARIZONA_DSP1RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP2L", ARIZONA_DSP2LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP2R", ARIZONA_DSP2RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP3L", ARIZONA_DSP3LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP3R", ARIZONA_DSP3RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP4L", ARIZONA_DSP4LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP4R", ARIZONA_DSP4RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP5L", CLEARWATER_DSP5LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP5R", CLEARWATER_DSP5RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP6L", CLEARWATER_DSP6LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP6R", CLEARWATER_DSP6RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP7L", CLEARWATER_DSP7LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP7R", CLEARWATER_DSP7RMIX_INPUT_1_SOURCE), + +SOC_SINGLE_TLV("Noise Generator Volume", CLEARWATER_COMFORT_NOISE_GENERATOR, + CLEARWATER_NOISE_GEN_GAIN_SHIFT, 0x16, 0, noise_tlv), + +ARIZONA_MIXER_CONTROLS("HPOUT1L", ARIZONA_OUT1LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("HPOUT1R", ARIZONA_OUT1RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("HPOUT2L", ARIZONA_OUT2LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("HPOUT2R", ARIZONA_OUT2RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("HPOUT3L", ARIZONA_OUT3LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("HPOUT3R", ARIZONA_OUT3RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SPKDAT1L", ARIZONA_OUT5LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SPKDAT1R", ARIZONA_OUT5RMIX_INPUT_1_SOURCE), + +SOC_SINGLE("HPOUT1 SC Protect Switch", ARIZONA_HP1_SHORT_CIRCUIT_CTRL, + ARIZONA_HP1_SC_ENA_SHIFT, 1, 0), +SOC_SINGLE("HPOUT2 SC Protect Switch", ARIZONA_HP2_SHORT_CIRCUIT_CTRL, + ARIZONA_HP2_SC_ENA_SHIFT, 1, 0), +SOC_SINGLE("HPOUT3 SC Protect Switch", ARIZONA_HP3_SHORT_CIRCUIT_CTRL, + ARIZONA_HP3_SC_ENA_SHIFT, 1, 0), + +SOC_SINGLE("SPKDAT1 High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_5L, + ARIZONA_OUT5_OSR_SHIFT, 1, 0), + +SOC_DOUBLE_R("HPOUT1 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_1L, + ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_MUTE_SHIFT, 1, 1), +SOC_DOUBLE_R("HPOUT2 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_2L, + ARIZONA_DAC_DIGITAL_VOLUME_2R, ARIZONA_OUT2L_MUTE_SHIFT, 1, 1), +SOC_DOUBLE_R("HPOUT3 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_3L, + ARIZONA_DAC_DIGITAL_VOLUME_3R, ARIZONA_OUT3L_MUTE_SHIFT, 1, 1), +SOC_DOUBLE_R("SPKDAT1 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_5L, + ARIZONA_DAC_DIGITAL_VOLUME_5R, ARIZONA_OUT5L_MUTE_SHIFT, 1, 1), + +SOC_DOUBLE_R_TLV("HPOUT1 Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_1L, + ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_VOL_SHIFT, + 0xbf, 0, digital_tlv), +SOC_DOUBLE_R_TLV("HPOUT2 Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_2L, + ARIZONA_DAC_DIGITAL_VOLUME_2R, ARIZONA_OUT2L_VOL_SHIFT, + 0xbf, 0, digital_tlv), +SOC_DOUBLE_R_TLV("HPOUT3 Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_3L, + ARIZONA_DAC_DIGITAL_VOLUME_3R, ARIZONA_OUT3L_VOL_SHIFT, + 0xbf, 0, digital_tlv), +SOC_DOUBLE_R_TLV("SPKDAT1 Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_5L, + ARIZONA_DAC_DIGITAL_VOLUME_5R, ARIZONA_OUT5L_VOL_SHIFT, + 0xbf, 0, digital_tlv), + +SOC_DOUBLE("SPKDAT1 Switch", ARIZONA_PDM_SPK1_CTRL_1, ARIZONA_SPK1L_MUTE_SHIFT, + ARIZONA_SPK1R_MUTE_SHIFT, 1, 1), + +SOC_DOUBLE_EXT("HPOUT1 DRE Switch", ARIZONA_DRE_ENABLE, + VEGAS_DRE1L_ENA_SHIFT, VEGAS_DRE1R_ENA_SHIFT, 1, 0, + snd_soc_get_volsw, clearwater_put_dre), +SOC_DOUBLE_EXT("HPOUT2 DRE Switch", ARIZONA_DRE_ENABLE, + VEGAS_DRE2L_ENA_SHIFT, VEGAS_DRE2R_ENA_SHIFT, 1, 0, + snd_soc_get_volsw, clearwater_put_dre), +SOC_DOUBLE_EXT("HPOUT3 DRE Switch", ARIZONA_DRE_ENABLE, + VEGAS_DRE3L_ENA_SHIFT, VEGAS_DRE3R_ENA_SHIFT, 1, 0, + snd_soc_get_volsw, clearwater_put_dre), + +SOC_DOUBLE("HPOUT1 EDRE Switch", CLEARWATER_EDRE_ENABLE, + CLEARWATER_EDRE_OUT1L_THR1_ENA_SHIFT, + CLEARWATER_EDRE_OUT1R_THR1_ENA_SHIFT, 1, 0), +SOC_DOUBLE("HPOUT2 EDRE Switch", CLEARWATER_EDRE_ENABLE, + CLEARWATER_EDRE_OUT2L_THR1_ENA_SHIFT, + CLEARWATER_EDRE_OUT2R_THR1_ENA_SHIFT, 1, 0), +SOC_DOUBLE("HPOUT3 EDRE Switch", CLEARWATER_EDRE_ENABLE, + CLEARWATER_EDRE_OUT3L_THR1_ENA_SHIFT, + CLEARWATER_EDRE_OUT3R_THR1_ENA_SHIFT, 1, 0), + +SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp), +SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp), + +MOON_RATE_ENUM("SPDIF Rate", arizona_spdif_rate), + +SOC_SINGLE("Noise Gate Switch", ARIZONA_NOISE_GATE_CONTROL, + ARIZONA_NGATE_ENA_SHIFT, 1, 0), +SOC_SINGLE_TLV("Noise Gate Threshold Volume", ARIZONA_NOISE_GATE_CONTROL, + ARIZONA_NGATE_THR_SHIFT, 7, 1, ng_tlv), +SOC_ENUM("Noise Gate Hold", arizona_ng_hold), + +MOON_RATE_ENUM("Output Rate 1", arizona_output_rate), + +SOC_VALUE_ENUM_EXT("IN1L Rate", moon_input_rate[0], + snd_soc_get_value_enum_double, moon_in_rate_put), +SOC_VALUE_ENUM_EXT("IN1R Rate", moon_input_rate[1], + snd_soc_get_value_enum_double, moon_in_rate_put), +SOC_VALUE_ENUM_EXT("IN2L Rate", moon_input_rate[2], + snd_soc_get_value_enum_double, moon_in_rate_put), +SOC_VALUE_ENUM_EXT("IN2R Rate", moon_input_rate[3], + snd_soc_get_value_enum_double, moon_in_rate_put), +SOC_VALUE_ENUM_EXT("IN3L Rate", moon_input_rate[4], + snd_soc_get_value_enum_double, moon_in_rate_put), +SOC_VALUE_ENUM_EXT("IN3R Rate", moon_input_rate[5], + snd_soc_get_value_enum_double, moon_in_rate_put), +SOC_VALUE_ENUM_EXT("IN4L Rate", moon_input_rate[6], + snd_soc_get_value_enum_double, moon_in_rate_put), +SOC_VALUE_ENUM_EXT("IN4R Rate", moon_input_rate[7], + snd_soc_get_value_enum_double, moon_in_rate_put), +SOC_VALUE_ENUM_EXT("IN5L Rate", moon_input_rate[8], + snd_soc_get_value_enum_double, moon_in_rate_put), +SOC_VALUE_ENUM_EXT("IN5R Rate", moon_input_rate[9], + snd_soc_get_value_enum_double, moon_in_rate_put), + +SOC_VALUE_ENUM_EXT("DFC1RX Width", moon_dfc_width[0], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC1RX Type", moon_dfc_type[0], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC1TX Width", moon_dfc_width[1], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC1TX Type", moon_dfc_type[1], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC2RX Width", moon_dfc_width[2], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC2RX Type", moon_dfc_type[2], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC2TX Width", moon_dfc_width[3], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC2TX Type", moon_dfc_type[3], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC3RX Width", moon_dfc_width[4], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC3RX Type", moon_dfc_type[4], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC3TX Width", moon_dfc_width[5], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC3TX Type", moon_dfc_type[5], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC4RX Width", moon_dfc_width[6], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC4RX Type", moon_dfc_type[6], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC4TX Width", moon_dfc_width[7], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC4TX Type", moon_dfc_type[7], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC5RX Width", moon_dfc_width[8], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC5RX Type", moon_dfc_type[8], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC5TX Width", moon_dfc_width[9], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC5TX Type", moon_dfc_type[9], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC6RX Width", moon_dfc_width[10], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC6RX Type", moon_dfc_type[10], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC6TX Width", moon_dfc_width[11], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC6TX Type", moon_dfc_type[11], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC7RX Width", moon_dfc_width[12], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC7RX Type", moon_dfc_type[12], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC7TX Width", moon_dfc_width[13], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC7TX Type", moon_dfc_type[13], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC8RX Width", moon_dfc_width[14], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC8RX Type", moon_dfc_type[14], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC8TX Width", moon_dfc_width[15], + snd_soc_get_value_enum_double, moon_dfc_put), +SOC_VALUE_ENUM_EXT("DFC8TX Type", moon_dfc_type[15], + snd_soc_get_value_enum_double, moon_dfc_put), + +MOON_NG_SRC("HPOUT1L", ARIZONA_NOISE_GATE_SELECT_1L), +MOON_NG_SRC("HPOUT1R", ARIZONA_NOISE_GATE_SELECT_1R), +MOON_NG_SRC("HPOUT2L", ARIZONA_NOISE_GATE_SELECT_2L), +MOON_NG_SRC("HPOUT2R", ARIZONA_NOISE_GATE_SELECT_2R), +MOON_NG_SRC("HPOUT3L", ARIZONA_NOISE_GATE_SELECT_3L), +MOON_NG_SRC("HPOUT3R", ARIZONA_NOISE_GATE_SELECT_3R), +MOON_NG_SRC("SPKDAT1L", ARIZONA_NOISE_GATE_SELECT_5L), +MOON_NG_SRC("SPKDAT1R", ARIZONA_NOISE_GATE_SELECT_5R), + +ARIZONA_MIXER_CONTROLS("AIF1TX1", ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX2", ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX3", ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX4", ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX5", ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX6", ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX7", ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX8", ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("AIF2TX1", ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX2", ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX3", ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX4", ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX5", ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX6", ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX7", ARIZONA_AIF2TX7MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX8", ARIZONA_AIF2TX8MIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("AIF3TX1", ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF3TX2", ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("AIF4TX1", ARIZONA_AIF4TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF4TX2", ARIZONA_AIF4TX2MIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("SLIMTX1", ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX2", ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX3", ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX4", ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX5", ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX6", ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX7", ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SLIMTX8", ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE), + +ARIZONA_GAINMUX_CONTROLS("SPDIFTX1", ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE), +ARIZONA_GAINMUX_CONTROLS("SPDIFTX2", ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE), +}; + +CLEARWATER_MIXER_ENUMS(EQ1, ARIZONA_EQ1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(EQ2, ARIZONA_EQ2MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(EQ3, ARIZONA_EQ3MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(EQ4, ARIZONA_EQ4MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DRC1L, ARIZONA_DRC1LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DRC1R, ARIZONA_DRC1RMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DRC2L, ARIZONA_DRC2LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DRC2R, ARIZONA_DRC2RMIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(LHPF1, ARIZONA_HPLP1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(LHPF2, ARIZONA_HPLP2MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(LHPF3, ARIZONA_HPLP3MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(LHPF4, ARIZONA_HPLP4MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DSP1L, ARIZONA_DSP1LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DSP1R, ARIZONA_DSP1RMIX_INPUT_1_SOURCE); +CLEARWATER_DSP_AUX_ENUMS(DSP1, ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DSP2L, ARIZONA_DSP2LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DSP2R, ARIZONA_DSP2RMIX_INPUT_1_SOURCE); +CLEARWATER_DSP_AUX_ENUMS(DSP2, ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DSP3L, ARIZONA_DSP3LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DSP3R, ARIZONA_DSP3RMIX_INPUT_1_SOURCE); +CLEARWATER_DSP_AUX_ENUMS(DSP3, ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DSP4L, ARIZONA_DSP4LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DSP4R, ARIZONA_DSP4RMIX_INPUT_1_SOURCE); +CLEARWATER_DSP_AUX_ENUMS(DSP4, ARIZONA_DSP4AUX1MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DSP5L, CLEARWATER_DSP5LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DSP5R, CLEARWATER_DSP5RMIX_INPUT_1_SOURCE); +CLEARWATER_DSP_AUX_ENUMS(DSP5, CLEARWATER_DSP5AUX1MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DSP6L, CLEARWATER_DSP6LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DSP6R, CLEARWATER_DSP6RMIX_INPUT_1_SOURCE); +CLEARWATER_DSP_AUX_ENUMS(DSP6, CLEARWATER_DSP6AUX1MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DSP7L, CLEARWATER_DSP7LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DSP7R, CLEARWATER_DSP7RMIX_INPUT_1_SOURCE); +CLEARWATER_DSP_AUX_ENUMS(DSP7, CLEARWATER_DSP7AUX1MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(PWM1, ARIZONA_PWM1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(PWM2, ARIZONA_PWM2MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(OUT1L, ARIZONA_OUT1LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(OUT1R, ARIZONA_OUT1RMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(OUT2L, ARIZONA_OUT2LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(OUT2R, ARIZONA_OUT2RMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(OUT3L, ARIZONA_OUT3LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(OUT3R, ARIZONA_OUT3RMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SPKDAT1L, ARIZONA_OUT5LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SPKDAT1R, ARIZONA_OUT5RMIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(AIF1TX1, ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX2, ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX3, ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX4, ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX5, ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX6, ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX7, ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX8, ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(AIF2TX1, ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF2TX2, ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF2TX3, ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF2TX4, ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF2TX5, ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF2TX6, ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF2TX7, ARIZONA_AIF2TX7MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF2TX8, ARIZONA_AIF2TX8MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(AIF3TX1, ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF3TX2, ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(AIF4TX1, ARIZONA_AIF4TX1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF4TX2, ARIZONA_AIF4TX2MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(SLIMTX1, ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SLIMTX2, ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SLIMTX3, ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SLIMTX4, ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SLIMTX5, ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SLIMTX6, ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SLIMTX7, ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SLIMTX8, ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(SPD1TX1, ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(SPD1TX2, ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ASRC1IN1L, CLEARWATER_ASRC1_1LMIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ASRC1IN1R, CLEARWATER_ASRC1_1RMIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ASRC1IN2L, CLEARWATER_ASRC1_2LMIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ASRC1IN2R, CLEARWATER_ASRC1_2RMIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ASRC2IN1L, CLEARWATER_ASRC2_1LMIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ASRC2IN1R, CLEARWATER_ASRC2_1RMIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ASRC2IN2L, CLEARWATER_ASRC2_2LMIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ASRC2IN2R, CLEARWATER_ASRC2_2RMIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC1INT1, ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1INT2, ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1INT3, ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1INT4, ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC1DEC1, ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1DEC2, ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1DEC3, ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1DEC4, ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC2INT1, ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2INT2, ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2INT3, ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2INT4, ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC2DEC1, ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2DEC2, ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2DEC3, ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2DEC4, ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC3INT1, ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC3INT2, ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC3DEC1, ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC3DEC2, ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC4INT1, ARIZONA_ISRC4INT1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC4INT2, ARIZONA_ISRC4INT2MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC4DEC1, ARIZONA_ISRC4DEC1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC4DEC2, ARIZONA_ISRC4DEC2MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(DFC1, MOON_DFC1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(DFC2, MOON_DFC2MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(DFC3, MOON_DFC3MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(DFC4, MOON_DFC4MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(DFC5, MOON_DFC5MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(DFC6, MOON_DFC6MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(DFC7, MOON_DFC7MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(DFC8, MOON_DFC8MIX_INPUT_1_SOURCE); + +static const char * const moon_dsp_output_texts[] = { + "None", + "DSP6", +}; + +static const struct soc_enum moon_dsp_output_enum = + SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(moon_dsp_output_texts), + moon_dsp_output_texts); + +static const struct snd_kcontrol_new moon_dsp_output_mux[] = { + SOC_DAPM_ENUM_VIRT("DSP Virtual Output Mux", moon_dsp_output_enum), +}; + +static const char * const moon_memory_mux_texts[] = { + "None", + "Shared Memory", +}; + +static const struct soc_enum moon_memory_enum = + SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(moon_memory_mux_texts), + moon_memory_mux_texts); + +static const struct snd_kcontrol_new moon_memory_mux[] = { + SOC_DAPM_ENUM_VIRT("DSP2 Virtual Input", moon_memory_enum), + SOC_DAPM_ENUM_VIRT("DSP3 Virtual Input", moon_memory_enum), +}; + +static const char * const moon_aec_loopback_texts[] = { + "HPOUT1L", "HPOUT1R", "HPOUT2L", "HPOUT2R", "HPOUT3L", "HPOUT3R", + "SPKDAT1L", "SPKDAT1R", +}; + +static const unsigned int moon_aec_loopback_values[] = { + 0, 1, 2, 3, 4, 5, 8, 9, +}; + +static const struct soc_enum moon_aec_loopback = + SOC_VALUE_ENUM_SINGLE(ARIZONA_DAC_AEC_CONTROL_1, + ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, + ARRAY_SIZE(moon_aec_loopback_texts), + moon_aec_loopback_texts, + moon_aec_loopback_values); + +static const struct snd_kcontrol_new moon_aec_loopback_mux = + SOC_DAPM_VALUE_ENUM("AEC Loopback", moon_aec_loopback); + +static const struct snd_kcontrol_new moon_anc_input_mux[] = { + SOC_DAPM_ENUM("RXANCL Input", clearwater_anc_input_src[0]), + SOC_DAPM_ENUM("RXANCL Channel", clearwater_anc_input_src[1]), + SOC_DAPM_ENUM("RXANCR Input", clearwater_anc_input_src[2]), + SOC_DAPM_ENUM("RXANCR Channel", clearwater_anc_input_src[3]), +}; + +static const struct snd_kcontrol_new moon_anc_ng_mux = + SOC_DAPM_ENUM("RXANC NG Source", arizona_anc_ng_enum); + +static const struct snd_kcontrol_new moon_output_anc_src[] = { + SOC_DAPM_ENUM("HPOUT1L ANC Source", arizona_output_anc_src[0]), + SOC_DAPM_ENUM("HPOUT1R ANC Source", arizona_output_anc_src[1]), + SOC_DAPM_ENUM("HPOUT2L ANC Source", arizona_output_anc_src[2]), + SOC_DAPM_ENUM("HPOUT2R ANC Source", arizona_output_anc_src[3]), + SOC_DAPM_ENUM("HPOUT3L ANC Source", arizona_output_anc_src[4]), + SOC_DAPM_ENUM("HPOUT3R ANC Source", clearwater_output_anc_src_defs[0]), + SOC_DAPM_ENUM("SPKDAT1L ANC Source", arizona_output_anc_src[8]), + SOC_DAPM_ENUM("SPKDAT1R ANC Source", arizona_output_anc_src[9]), +}; + +static const struct snd_soc_dapm_widget moon_dapm_widgets[] = { +SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT, + 0, moon_sysclk_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), +SND_SOC_DAPM_SUPPLY("ASYNCCLK", ARIZONA_ASYNC_CLOCK_1, + ARIZONA_ASYNC_CLK_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK, + ARIZONA_OPCLK_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("ASYNCOPCLK", ARIZONA_OUTPUT_ASYNC_CLOCK, + ARIZONA_OPCLK_ASYNC_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("DSPCLK", CLEARWATER_DSP_CLOCK_1, 6, + 0, NULL, 0), + + +SND_SOC_DAPM_REGULATOR_SUPPLY("DBVDD2", 0, 0), +SND_SOC_DAPM_REGULATOR_SUPPLY("DBVDD3", 0, 0), +SND_SOC_DAPM_REGULATOR_SUPPLY("DBVDD4", 0, 0), +SND_SOC_DAPM_REGULATOR_SUPPLY("CPVDD", 20, 0), +SND_SOC_DAPM_REGULATOR_SUPPLY("MICVDD", 0, SND_SOC_DAPM_REGULATOR_BYPASS), + +SND_SOC_DAPM_SIGGEN("TONE"), +SND_SOC_DAPM_SIGGEN("NOISE"), +SND_SOC_DAPM_SIGGEN("HAPTICS"), + +SND_SOC_DAPM_INPUT("IN1AL"), +SND_SOC_DAPM_INPUT("IN1BL"), +SND_SOC_DAPM_INPUT("IN1AR"), +SND_SOC_DAPM_INPUT("IN1BR"), +SND_SOC_DAPM_INPUT("IN2AL"), +SND_SOC_DAPM_INPUT("IN2BL"), +SND_SOC_DAPM_INPUT("IN2R"), +SND_SOC_DAPM_INPUT("IN3L"), +SND_SOC_DAPM_INPUT("IN3R"), +SND_SOC_DAPM_INPUT("IN4L"), +SND_SOC_DAPM_INPUT("IN4R"), +SND_SOC_DAPM_INPUT("IN5L"), +SND_SOC_DAPM_INPUT("IN5R"), + +SND_SOC_DAPM_MUX("IN1L Mux", SND_SOC_NOPM, 0, 0, &moon_in1mux[0]), +SND_SOC_DAPM_MUX("IN1R Mux", SND_SOC_NOPM, 0, 0, &moon_in1mux[1]), +SND_SOC_DAPM_MUX("IN2L Mux", SND_SOC_NOPM, 0, 0, &moon_in2mux), + +SND_SOC_DAPM_OUTPUT("DRC1 Signal Activity"), +SND_SOC_DAPM_OUTPUT("DRC2 Signal Activity"), + +SND_SOC_DAPM_OUTPUT("DSP Virtual Output"), + +SND_SOC_DAPM_PGA_E("IN1L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN1L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN1R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN1R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN2L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN2L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN2R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN2R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN3L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN3L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN3R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN3R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN4L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN4L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN4R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN4R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN5L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN5L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN5R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN5R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), + +SND_SOC_DAPM_SUPPLY("MICBIAS1", ARIZONA_MIC_BIAS_CTRL_1, + ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS2", ARIZONA_MIC_BIAS_CTRL_2, + ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_SUPPLY("MICBIAS1A", ARIZONA_MIC_BIAS_CTRL_5, + ARIZONA_MICB1A_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS1B", ARIZONA_MIC_BIAS_CTRL_5, + ARIZONA_MICB1B_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS1C", ARIZONA_MIC_BIAS_CTRL_5, + ARIZONA_MICB1C_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS1D", ARIZONA_MIC_BIAS_CTRL_5, + ARIZONA_MICB1D_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_SUPPLY("MICBIAS2A", ARIZONA_MIC_BIAS_CTRL_6, + ARIZONA_MICB2A_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS2B", ARIZONA_MIC_BIAS_CTRL_6, + ARIZONA_MICB2B_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS2C", ARIZONA_MIC_BIAS_CTRL_6, + ARIZONA_MICB2C_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS2D", ARIZONA_MIC_BIAS_CTRL_6, + ARIZONA_MICB2D_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("Noise Generator", CLEARWATER_COMFORT_NOISE_GENERATOR, + CLEARWATER_NOISE_GEN_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("Tone Generator 1", ARIZONA_TONE_GENERATOR_1, + ARIZONA_TONE1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("Tone Generator 2", ARIZONA_TONE_GENERATOR_1, + ARIZONA_TONE2_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("EQ1", ARIZONA_EQ1_1, ARIZONA_EQ1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ2", ARIZONA_EQ2_1, ARIZONA_EQ2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ3", ARIZONA_EQ3_1, ARIZONA_EQ3_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ4", ARIZONA_EQ4_1, ARIZONA_EQ4_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("DRC1L", ARIZONA_DRC1_CTRL1, ARIZONA_DRC1L_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("DRC1R", ARIZONA_DRC1_CTRL1, ARIZONA_DRC1R_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("DRC2L", CLEARWATER_DRC2_CTRL1, ARIZONA_DRC2L_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("DRC2R", CLEARWATER_DRC2_CTRL1, ARIZONA_DRC2R_ENA_SHIFT, 0, + NULL, 0), + +SND_SOC_DAPM_PGA("LHPF1", ARIZONA_HPLPF1_1, ARIZONA_LHPF1_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF2", ARIZONA_HPLPF2_1, ARIZONA_LHPF2_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF3", ARIZONA_HPLPF3_1, ARIZONA_LHPF3_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF4", ARIZONA_HPLPF4_1, ARIZONA_LHPF4_ENA_SHIFT, 0, + NULL, 0), + +SND_SOC_DAPM_PGA("PWM1 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM1_ENA_SHIFT, + 0, NULL, 0), +SND_SOC_DAPM_PGA("PWM2 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM2_ENA_SHIFT, + 0, NULL, 0), + +SND_SOC_DAPM_PGA("ASRC1IN1L", CLEARWATER_ASRC1_ENABLE, + CLEARWATER_ASRC1_IN1L_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ASRC1IN1R", CLEARWATER_ASRC1_ENABLE, + CLEARWATER_ASRC1_IN1R_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ASRC1IN2L", CLEARWATER_ASRC1_ENABLE, + CLEARWATER_ASRC1_IN2L_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ASRC1IN2R", CLEARWATER_ASRC1_ENABLE, + CLEARWATER_ASRC1_IN2R_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ASRC2IN1L", CLEARWATER_ASRC2_ENABLE, + CLEARWATER_ASRC2_IN1L_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ASRC2IN1R", CLEARWATER_ASRC2_ENABLE, + CLEARWATER_ASRC2_IN1R_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ASRC2IN2L", CLEARWATER_ASRC2_ENABLE, + CLEARWATER_ASRC2_IN2L_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ASRC2IN2R", CLEARWATER_ASRC2_ENABLE, + CLEARWATER_ASRC2_IN2R_ENA_SHIFT, 0, NULL, 0), + +WM_ADSP2("DSP1", 0, moon_adsp_power_ev), +WM_ADSP2("DSP2", 1, moon_adsp_power_ev), +WM_ADSP2("DSP3", 2, moon_adsp_power_ev), +WM_ADSP2("DSP4", 3, moon_adsp_power_ev), +WM_ADSP2("DSP5", 4, moon_adsp_power_ev), +WM_ADSP2("DSP6", 5, moon_adsp_power_ev), +WM_ADSP2("DSP7", 6, moon_adsp_power_ev), + +SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT2", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT3", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT4", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC1DEC1", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC2", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC3", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC4", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC2INT1", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT2", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT3", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT4", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC2DEC1", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC2", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC3", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC4", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC3INT1", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC3INT2", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_INT1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC3DEC1", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC3DEC2", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_DEC1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC4INT1", ARIZONA_ISRC_4_CTRL_3, + ARIZONA_ISRC4_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC4INT2", ARIZONA_ISRC_4_CTRL_3, + ARIZONA_ISRC4_INT1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC4DEC1", ARIZONA_ISRC_4_CTRL_3, + ARIZONA_ISRC4_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC4DEC2", ARIZONA_ISRC_4_CTRL_3, + ARIZONA_ISRC4_DEC1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, + ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, + &moon_aec_loopback_mux), + +SND_SOC_DAPM_SUPPLY("RXANC NG External Clock", SND_SOC_NOPM, + ARIZONA_EXT_NG_SEL_SET_SHIFT, 0, arizona_anc_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), +SND_SOC_DAPM_PGA("RXANCL NG External", SND_SOC_NOPM, 0, 0, NULL, 0), +SND_SOC_DAPM_PGA("RXANCR NG External", SND_SOC_NOPM, 0, 0, NULL, 0), + +SND_SOC_DAPM_SUPPLY("RXANC NG Clock", SND_SOC_NOPM, + ARIZONA_CLK_NG_ENA_SET_SHIFT, 0, arizona_anc_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), +SND_SOC_DAPM_PGA("RXANCL NG Internal", SND_SOC_NOPM, 0, 0, NULL, 0), +SND_SOC_DAPM_PGA("RXANCR NG Internal", SND_SOC_NOPM, 0, 0, NULL, 0), + +SND_SOC_DAPM_MUX("RXANCL Left Input", SND_SOC_NOPM, 0, 0, + &moon_anc_input_mux[0]), +SND_SOC_DAPM_MUX("RXANCL Right Input", SND_SOC_NOPM, 0, 0, + &moon_anc_input_mux[0]), +SND_SOC_DAPM_MUX("RXANCL Channel", SND_SOC_NOPM, 0, 0, &moon_anc_input_mux[1]), +SND_SOC_DAPM_MUX("RXANCL NG Mux", SND_SOC_NOPM, 0, 0, &moon_anc_ng_mux), +SND_SOC_DAPM_MUX("RXANCR Left Input", SND_SOC_NOPM, 0, 0, + &moon_anc_input_mux[2]), +SND_SOC_DAPM_MUX("RXANCR Right Input", SND_SOC_NOPM, 0, 0, + &moon_anc_input_mux[2]), +SND_SOC_DAPM_MUX("RXANCR Channel", SND_SOC_NOPM, 0, 0, &moon_anc_input_mux[3]), +SND_SOC_DAPM_MUX("RXANCR NG Mux", SND_SOC_NOPM, 0, 0, &moon_anc_ng_mux), + +SND_SOC_DAPM_PGA_E("RXANCL", SND_SOC_NOPM, ARIZONA_CLK_L_ENA_SET_SHIFT, + 0, NULL, 0, arizona_anc_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), +SND_SOC_DAPM_PGA_E("RXANCR", SND_SOC_NOPM, ARIZONA_CLK_R_ENA_SET_SHIFT, + 0, NULL, 0, arizona_anc_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), + +SND_SOC_DAPM_MUX("HPOUT1L ANC Source", SND_SOC_NOPM, 0, 0, + &moon_output_anc_src[0]), +SND_SOC_DAPM_MUX("HPOUT1R ANC Source", SND_SOC_NOPM, 0, 0, + &moon_output_anc_src[1]), +SND_SOC_DAPM_MUX("HPOUT2L ANC Source", SND_SOC_NOPM, 0, 0, + &moon_output_anc_src[2]), +SND_SOC_DAPM_MUX("HPOUT2R ANC Source", SND_SOC_NOPM, 0, 0, + &moon_output_anc_src[3]), +SND_SOC_DAPM_MUX("HPOUT3L ANC Source", SND_SOC_NOPM, 0, 0, + &moon_output_anc_src[4]), +SND_SOC_DAPM_MUX("HPOUT3R ANC Source", SND_SOC_NOPM, 0, 0, + &moon_output_anc_src[5]), +SND_SOC_DAPM_MUX("SPKDAT1L ANC Source", SND_SOC_NOPM, 0, 0, + &moon_output_anc_src[6]), +SND_SOC_DAPM_MUX("SPKDAT1R ANC Source", SND_SOC_NOPM, 0, 0, + &moon_output_anc_src[7]), + +SND_SOC_DAPM_AIF_OUT("AIF1TX1", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX2", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX3", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX4", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX5", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX6", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX7", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX8", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF1RX1", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX2", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX3", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX4", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX5", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX6", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX7", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX8", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("AIF2TX1", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX2", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX3", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX4", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX5", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX6", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX7", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX8", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX2", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX3", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX4", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX5", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX6", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX7", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX8", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("SLIMRX1", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX2", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX3", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX4", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX5", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX6", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX7", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX8", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("SLIMTX1", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX2", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX3", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX4", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX5", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX6", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX7", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("SLIMTX8", NULL, 0, + ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, + ARIZONA_SLIMTX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("AIF3TX1", NULL, 0, + ARIZONA_AIF3_TX_ENABLES, ARIZONA_AIF3TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF3TX2", NULL, 0, + ARIZONA_AIF3_TX_ENABLES, ARIZONA_AIF3TX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF3RX1", NULL, 0, + ARIZONA_AIF3_RX_ENABLES, ARIZONA_AIF3RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF3RX2", NULL, 0, + ARIZONA_AIF3_RX_ENABLES, ARIZONA_AIF3RX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("AIF4TX1", NULL, 0, + ARIZONA_AIF4_TX_ENABLES, ARIZONA_AIF4TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF4TX2", NULL, 0, + ARIZONA_AIF4_TX_ENABLES, ARIZONA_AIF4TX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF4RX1", NULL, 0, + ARIZONA_AIF4_RX_ENABLES, ARIZONA_AIF4RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF4RX2", NULL, 0, + ARIZONA_AIF4_RX_ENABLES, ARIZONA_AIF4RX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, + ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, moon_hp_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, + ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, moon_hp_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT2L", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT2L_ENA_SHIFT, 0, NULL, 0, moon_analog_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT2R", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT2R_ENA_SHIFT, 0, NULL, 0, moon_analog_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT3L", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT3L_ENA_SHIFT, 0, NULL, 0, moon_analog_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT3R", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT3R_ENA_SHIFT, 0, NULL, 0, moon_analog_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT5L", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT5L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT5R", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT5R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + +SND_SOC_DAPM_PGA("SPD1TX1", ARIZONA_SPD1_TX_CONTROL, + ARIZONA_SPD1_VAL1_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("SPD1TX2", ARIZONA_SPD1_TX_CONTROL, + ARIZONA_SPD1_VAL2_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_OUT_DRV("SPD1", ARIZONA_SPD1_TX_CONTROL, + ARIZONA_SPD1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("DFC1", MOON_DFC1_CTRL, + MOON_DFC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("DFC2", MOON_DFC2_CTRL, + MOON_DFC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("DFC3", MOON_DFC3_CTRL, + MOON_DFC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("DFC4", MOON_DFC4_CTRL, + MOON_DFC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("DFC5", MOON_DFC5_CTRL, + MOON_DFC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("DFC6", MOON_DFC6_CTRL, + MOON_DFC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("DFC7", MOON_DFC7_CTRL, + MOON_DFC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("DFC8", MOON_DFC8_CTRL, + MOON_DFC1_ENA_SHIFT, 0, NULL, 0), + +ARIZONA_MIXER_WIDGETS(EQ1, "EQ1"), +ARIZONA_MIXER_WIDGETS(EQ2, "EQ2"), +ARIZONA_MIXER_WIDGETS(EQ3, "EQ3"), +ARIZONA_MIXER_WIDGETS(EQ4, "EQ4"), + +ARIZONA_MIXER_WIDGETS(DRC1L, "DRC1L"), +ARIZONA_MIXER_WIDGETS(DRC1R, "DRC1R"), +ARIZONA_MIXER_WIDGETS(DRC2L, "DRC2L"), +ARIZONA_MIXER_WIDGETS(DRC2R, "DRC2R"), + +ARIZONA_MIXER_WIDGETS(LHPF1, "LHPF1"), +ARIZONA_MIXER_WIDGETS(LHPF2, "LHPF2"), +ARIZONA_MIXER_WIDGETS(LHPF3, "LHPF3"), +ARIZONA_MIXER_WIDGETS(LHPF4, "LHPF4"), + +ARIZONA_MIXER_WIDGETS(PWM1, "PWM1"), +ARIZONA_MIXER_WIDGETS(PWM2, "PWM2"), + +ARIZONA_MIXER_WIDGETS(OUT1L, "HPOUT1L"), +ARIZONA_MIXER_WIDGETS(OUT1R, "HPOUT1R"), +ARIZONA_MIXER_WIDGETS(OUT2L, "HPOUT2L"), +ARIZONA_MIXER_WIDGETS(OUT2R, "HPOUT2R"), +ARIZONA_MIXER_WIDGETS(OUT3L, "HPOUT3L"), +ARIZONA_MIXER_WIDGETS(OUT3R, "HPOUT3R"), +ARIZONA_MIXER_WIDGETS(SPKDAT1L, "SPKDAT1L"), +ARIZONA_MIXER_WIDGETS(SPKDAT1R, "SPKDAT1R"), + +ARIZONA_MIXER_WIDGETS(AIF1TX1, "AIF1TX1"), +ARIZONA_MIXER_WIDGETS(AIF1TX2, "AIF1TX2"), +ARIZONA_MIXER_WIDGETS(AIF1TX3, "AIF1TX3"), +ARIZONA_MIXER_WIDGETS(AIF1TX4, "AIF1TX4"), +ARIZONA_MIXER_WIDGETS(AIF1TX5, "AIF1TX5"), +ARIZONA_MIXER_WIDGETS(AIF1TX6, "AIF1TX6"), +ARIZONA_MIXER_WIDGETS(AIF1TX7, "AIF1TX7"), +ARIZONA_MIXER_WIDGETS(AIF1TX8, "AIF1TX8"), + +ARIZONA_MIXER_WIDGETS(AIF2TX1, "AIF2TX1"), +ARIZONA_MIXER_WIDGETS(AIF2TX2, "AIF2TX2"), +ARIZONA_MIXER_WIDGETS(AIF2TX3, "AIF2TX3"), +ARIZONA_MIXER_WIDGETS(AIF2TX4, "AIF2TX4"), +ARIZONA_MIXER_WIDGETS(AIF2TX5, "AIF2TX5"), +ARIZONA_MIXER_WIDGETS(AIF2TX6, "AIF2TX6"), +ARIZONA_MIXER_WIDGETS(AIF2TX7, "AIF2TX7"), +ARIZONA_MIXER_WIDGETS(AIF2TX8, "AIF2TX8"), + +ARIZONA_MIXER_WIDGETS(AIF3TX1, "AIF3TX1"), +ARIZONA_MIXER_WIDGETS(AIF3TX2, "AIF3TX2"), + +ARIZONA_MIXER_WIDGETS(AIF4TX1, "AIF4TX1"), +ARIZONA_MIXER_WIDGETS(AIF4TX2, "AIF4TX2"), + +ARIZONA_MIXER_WIDGETS(SLIMTX1, "SLIMTX1"), +ARIZONA_MIXER_WIDGETS(SLIMTX2, "SLIMTX2"), +ARIZONA_MIXER_WIDGETS(SLIMTX3, "SLIMTX3"), +ARIZONA_MIXER_WIDGETS(SLIMTX4, "SLIMTX4"), +ARIZONA_MIXER_WIDGETS(SLIMTX5, "SLIMTX5"), +ARIZONA_MIXER_WIDGETS(SLIMTX6, "SLIMTX6"), +ARIZONA_MIXER_WIDGETS(SLIMTX7, "SLIMTX7"), +ARIZONA_MIXER_WIDGETS(SLIMTX8, "SLIMTX8"), + +ARIZONA_MUX_WIDGETS(SPD1TX1, "SPDIFTX1"), +ARIZONA_MUX_WIDGETS(SPD1TX2, "SPDIFTX2"), + +ARIZONA_MUX_WIDGETS(ASRC1IN1L, "ASRC1IN1L"), +ARIZONA_MUX_WIDGETS(ASRC1IN1R, "ASRC1IN1R"), +ARIZONA_MUX_WIDGETS(ASRC1IN2L, "ASRC1IN2L"), +ARIZONA_MUX_WIDGETS(ASRC1IN2R, "ASRC1IN2R"), +ARIZONA_MUX_WIDGETS(ASRC2IN1L, "ASRC2IN1L"), +ARIZONA_MUX_WIDGETS(ASRC2IN1R, "ASRC2IN1R"), +ARIZONA_MUX_WIDGETS(ASRC2IN2L, "ASRC2IN2L"), +ARIZONA_MUX_WIDGETS(ASRC2IN2R, "ASRC2IN2R"), + + +ARIZONA_DSP_WIDGETS(DSP1, "DSP1"), +ARIZONA_DSP_WIDGETS(DSP2, "DSP2"), +ARIZONA_DSP_WIDGETS(DSP3, "DSP3"), +ARIZONA_DSP_WIDGETS(DSP4, "DSP4"), +ARIZONA_DSP_WIDGETS(DSP5, "DSP5"), +ARIZONA_DSP_WIDGETS(DSP6, "DSP6"), +ARIZONA_DSP_WIDGETS(DSP7, "DSP7"), + +SND_SOC_DAPM_VIRT_MUX("DSP2 Virtual Input", SND_SOC_NOPM, 0, 0, + &moon_memory_mux[0]), +SND_SOC_DAPM_VIRT_MUX("DSP3 Virtual Input", SND_SOC_NOPM, 0, 0, + &moon_memory_mux[1]), + +SND_SOC_DAPM_VIRT_MUX("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, + &moon_dsp_output_mux[0]), + +ARIZONA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), +ARIZONA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"), +ARIZONA_MUX_WIDGETS(ISRC1DEC3, "ISRC1DEC3"), +ARIZONA_MUX_WIDGETS(ISRC1DEC4, "ISRC1DEC4"), + +ARIZONA_MUX_WIDGETS(ISRC1INT1, "ISRC1INT1"), +ARIZONA_MUX_WIDGETS(ISRC1INT2, "ISRC1INT2"), +ARIZONA_MUX_WIDGETS(ISRC1INT3, "ISRC1INT3"), +ARIZONA_MUX_WIDGETS(ISRC1INT4, "ISRC1INT4"), + +ARIZONA_MUX_WIDGETS(ISRC2DEC1, "ISRC2DEC1"), +ARIZONA_MUX_WIDGETS(ISRC2DEC2, "ISRC2DEC2"), +ARIZONA_MUX_WIDGETS(ISRC2DEC3, "ISRC2DEC3"), +ARIZONA_MUX_WIDGETS(ISRC2DEC4, "ISRC2DEC4"), + +ARIZONA_MUX_WIDGETS(ISRC2INT1, "ISRC2INT1"), +ARIZONA_MUX_WIDGETS(ISRC2INT2, "ISRC2INT2"), +ARIZONA_MUX_WIDGETS(ISRC2INT3, "ISRC2INT3"), +ARIZONA_MUX_WIDGETS(ISRC2INT4, "ISRC2INT4"), + +ARIZONA_MUX_WIDGETS(ISRC3DEC1, "ISRC3DEC1"), +ARIZONA_MUX_WIDGETS(ISRC3DEC2, "ISRC3DEC2"), + +ARIZONA_MUX_WIDGETS(ISRC3INT1, "ISRC3INT1"), +ARIZONA_MUX_WIDGETS(ISRC3INT2, "ISRC3INT2"), + +ARIZONA_MUX_WIDGETS(ISRC4DEC1, "ISRC4DEC1"), +ARIZONA_MUX_WIDGETS(ISRC4DEC2, "ISRC4DEC2"), + +ARIZONA_MUX_WIDGETS(ISRC4INT1, "ISRC4INT1"), +ARIZONA_MUX_WIDGETS(ISRC4INT2, "ISRC4INT2"), + +ARIZONA_MUX_WIDGETS(DFC1, "DFC1"), +ARIZONA_MUX_WIDGETS(DFC2, "DFC2"), +ARIZONA_MUX_WIDGETS(DFC3, "DFC3"), +ARIZONA_MUX_WIDGETS(DFC4, "DFC4"), +ARIZONA_MUX_WIDGETS(DFC5, "DFC5"), +ARIZONA_MUX_WIDGETS(DFC6, "DFC6"), +ARIZONA_MUX_WIDGETS(DFC7, "DFC7"), +ARIZONA_MUX_WIDGETS(DFC8, "DFC8"), + +SND_SOC_DAPM_OUTPUT("HPOUT1L"), +SND_SOC_DAPM_OUTPUT("HPOUT1R"), +SND_SOC_DAPM_OUTPUT("HPOUT2L"), +SND_SOC_DAPM_OUTPUT("HPOUT2R"), +SND_SOC_DAPM_OUTPUT("HPOUT3L"), +SND_SOC_DAPM_OUTPUT("HPOUT3R"), +SND_SOC_DAPM_OUTPUT("SPKDAT1L"), +SND_SOC_DAPM_OUTPUT("SPKDAT1R"), +SND_SOC_DAPM_OUTPUT("SPDIF"), + +SND_SOC_DAPM_OUTPUT("MICSUPP"), +}; + +#define ARIZONA_MIXER_INPUT_ROUTES(name) \ + { name, "Noise Generator", "Noise Generator" }, \ + { name, "Tone Generator 1", "Tone Generator 1" }, \ + { name, "Tone Generator 2", "Tone Generator 2" }, \ + { name, "Haptics", "HAPTICS" }, \ + { name, "AEC", "AEC Loopback" }, \ + { name, "IN1L", "IN1L PGA" }, \ + { name, "IN1R", "IN1R PGA" }, \ + { name, "IN2L", "IN2L PGA" }, \ + { name, "IN2R", "IN2R PGA" }, \ + { name, "IN3L", "IN3L PGA" }, \ + { name, "IN3R", "IN3R PGA" }, \ + { name, "IN4L", "IN4L PGA" }, \ + { name, "IN4R", "IN4R PGA" }, \ + { name, "IN5L", "IN5L PGA" }, \ + { name, "IN5R", "IN5R PGA" }, \ + { name, "AIF1RX1", "AIF1RX1" }, \ + { name, "AIF1RX2", "AIF1RX2" }, \ + { name, "AIF1RX3", "AIF1RX3" }, \ + { name, "AIF1RX4", "AIF1RX4" }, \ + { name, "AIF1RX5", "AIF1RX5" }, \ + { name, "AIF1RX6", "AIF1RX6" }, \ + { name, "AIF1RX7", "AIF1RX7" }, \ + { name, "AIF1RX8", "AIF1RX8" }, \ + { name, "AIF2RX1", "AIF2RX1" }, \ + { name, "AIF2RX2", "AIF2RX2" }, \ + { name, "AIF2RX3", "AIF2RX3" }, \ + { name, "AIF2RX4", "AIF2RX4" }, \ + { name, "AIF2RX5", "AIF2RX5" }, \ + { name, "AIF2RX6", "AIF2RX6" }, \ + { name, "AIF2RX7", "AIF2RX7" }, \ + { name, "AIF2RX8", "AIF2RX8" }, \ + { name, "AIF3RX1", "AIF3RX1" }, \ + { name, "AIF3RX2", "AIF3RX2" }, \ + { name, "AIF4RX1", "AIF4RX1" }, \ + { name, "AIF4RX2", "AIF4RX2" }, \ + { name, "SLIMRX1", "SLIMRX1" }, \ + { name, "SLIMRX2", "SLIMRX2" }, \ + { name, "SLIMRX3", "SLIMRX3" }, \ + { name, "SLIMRX4", "SLIMRX4" }, \ + { name, "SLIMRX5", "SLIMRX5" }, \ + { name, "SLIMRX6", "SLIMRX6" }, \ + { name, "SLIMRX7", "SLIMRX7" }, \ + { name, "SLIMRX8", "SLIMRX8" }, \ + { name, "EQ1", "EQ1" }, \ + { name, "EQ2", "EQ2" }, \ + { name, "EQ3", "EQ3" }, \ + { name, "EQ4", "EQ4" }, \ + { name, "DRC1L", "DRC1L" }, \ + { name, "DRC1R", "DRC1R" }, \ + { name, "DRC2L", "DRC2L" }, \ + { name, "DRC2R", "DRC2R" }, \ + { name, "LHPF1", "LHPF1" }, \ + { name, "LHPF2", "LHPF2" }, \ + { name, "LHPF3", "LHPF3" }, \ + { name, "LHPF4", "LHPF4" }, \ + { name, "ASRC1IN1L", "ASRC1IN1L" }, \ + { name, "ASRC1IN1R", "ASRC1IN1R" }, \ + { name, "ASRC1IN2L", "ASRC1IN2L" }, \ + { name, "ASRC1IN2R", "ASRC1IN2R" }, \ + { name, "ASRC2IN1L", "ASRC2IN1L" }, \ + { name, "ASRC2IN1R", "ASRC2IN1R" }, \ + { name, "ASRC2IN2L", "ASRC2IN2L" }, \ + { name, "ASRC2IN2R", "ASRC2IN2R" }, \ + { name, "ISRC1DEC1", "ISRC1DEC1" }, \ + { name, "ISRC1DEC2", "ISRC1DEC2" }, \ + { name, "ISRC1DEC3", "ISRC1DEC3" }, \ + { name, "ISRC1DEC4", "ISRC1DEC4" }, \ + { name, "ISRC1INT1", "ISRC1INT1" }, \ + { name, "ISRC1INT2", "ISRC1INT2" }, \ + { name, "ISRC1INT3", "ISRC1INT3" }, \ + { name, "ISRC1INT4", "ISRC1INT4" }, \ + { name, "ISRC2DEC1", "ISRC2DEC1" }, \ + { name, "ISRC2DEC2", "ISRC2DEC2" }, \ + { name, "ISRC2DEC3", "ISRC2DEC3" }, \ + { name, "ISRC2DEC4", "ISRC2DEC4" }, \ + { name, "ISRC2INT1", "ISRC2INT1" }, \ + { name, "ISRC2INT2", "ISRC2INT2" }, \ + { name, "ISRC2INT3", "ISRC2INT3" }, \ + { name, "ISRC2INT4", "ISRC2INT4" }, \ + { name, "ISRC3DEC1", "ISRC3DEC1" }, \ + { name, "ISRC3DEC2", "ISRC3DEC2" }, \ + { name, "ISRC3INT1", "ISRC3INT1" }, \ + { name, "ISRC3INT2", "ISRC3INT2" }, \ + { name, "ISRC4DEC1", "ISRC4DEC1" }, \ + { name, "ISRC4DEC2", "ISRC4DEC2" }, \ + { name, "ISRC4INT1", "ISRC4INT1" }, \ + { name, "ISRC4INT2", "ISRC4INT2" }, \ + { name, "DSP1.1", "DSP1" }, \ + { name, "DSP1.2", "DSP1" }, \ + { name, "DSP1.3", "DSP1" }, \ + { name, "DSP1.4", "DSP1" }, \ + { name, "DSP1.5", "DSP1" }, \ + { name, "DSP1.6", "DSP1" }, \ + { name, "DSP2.1", "DSP2" }, \ + { name, "DSP2.2", "DSP2" }, \ + { name, "DSP2.3", "DSP2" }, \ + { name, "DSP2.4", "DSP2" }, \ + { name, "DSP2.5", "DSP2" }, \ + { name, "DSP2.6", "DSP2" }, \ + { name, "DSP3.1", "DSP3" }, \ + { name, "DSP3.2", "DSP3" }, \ + { name, "DSP3.3", "DSP3" }, \ + { name, "DSP3.4", "DSP3" }, \ + { name, "DSP3.5", "DSP3" }, \ + { name, "DSP3.6", "DSP3" }, \ + { name, "DSP4.1", "DSP4" }, \ + { name, "DSP4.2", "DSP4" }, \ + { name, "DSP4.3", "DSP4" }, \ + { name, "DSP4.4", "DSP4" }, \ + { name, "DSP4.5", "DSP4" }, \ + { name, "DSP4.6", "DSP4" }, \ + { name, "DSP5.1", "DSP5" }, \ + { name, "DSP5.2", "DSP5" }, \ + { name, "DSP5.3", "DSP5" }, \ + { name, "DSP5.4", "DSP5" }, \ + { name, "DSP5.5", "DSP5" }, \ + { name, "DSP5.6", "DSP5" }, \ + { name, "DSP6.1", "DSP6" }, \ + { name, "DSP6.2", "DSP6" }, \ + { name, "DSP6.3", "DSP6" }, \ + { name, "DSP6.4", "DSP6" }, \ + { name, "DSP6.5", "DSP6" }, \ + { name, "DSP6.6", "DSP6" }, \ + { name, "DSP7.1", "DSP7" }, \ + { name, "DSP7.2", "DSP7" }, \ + { name, "DSP7.3", "DSP7" }, \ + { name, "DSP7.4", "DSP7" }, \ + { name, "DSP7.5", "DSP7" }, \ + { name, "DSP7.6", "DSP7" }, \ + { name, "DFC1", "DFC1" }, \ + { name, "DFC2", "DFC2" }, \ + { name, "DFC3", "DFC3" }, \ + { name, "DFC4", "DFC4" }, \ + { name, "DFC5", "DFC5" }, \ + { name, "DFC6", "DFC6" }, \ + { name, "DFC7", "DFC7" }, \ + { name, "DFC8", "DFC8" } + +static const struct snd_soc_dapm_route moon_dapm_routes[] = { + { "AIF2 Capture", NULL, "DBVDD2" }, + { "AIF2 Playback", NULL, "DBVDD2" }, + + { "AIF3 Capture", NULL, "DBVDD3" }, + { "AIF3 Playback", NULL, "DBVDD3" }, + + { "AIF4 Capture", NULL, "DBVDD3" }, + { "AIF4 Playback", NULL, "DBVDD3" }, + + { "OUT1L", NULL, "CPVDD" }, + { "OUT1R", NULL, "CPVDD" }, + { "OUT2L", NULL, "CPVDD" }, + { "OUT2R", NULL, "CPVDD" }, + { "OUT3L", NULL, "CPVDD" }, + { "OUT3R", NULL, "CPVDD" }, + + { "OUT1L", NULL, "SYSCLK" }, + { "OUT1R", NULL, "SYSCLK" }, + { "OUT2L", NULL, "SYSCLK" }, + { "OUT2R", NULL, "SYSCLK" }, + { "OUT3L", NULL, "SYSCLK" }, + { "OUT5L", NULL, "SYSCLK" }, + { "OUT5R", NULL, "SYSCLK" }, + + { "SPD1", NULL, "SYSCLK" }, + { "SPD1", NULL, "SPD1TX1" }, + { "SPD1", NULL, "SPD1TX2" }, + + { "IN1AL", NULL, "SYSCLK" }, + { "IN1BL", NULL, "SYSCLK" }, + { "IN1AR", NULL, "SYSCLK" }, + { "IN1BR", NULL, "SYSCLK" }, + { "IN2AL", NULL, "SYSCLK" }, + { "IN2BL", NULL, "SYSCLK" }, + { "IN2R", NULL, "SYSCLK" }, + { "IN3L", NULL, "SYSCLK" }, + { "IN3R", NULL, "SYSCLK" }, + { "IN4L", NULL, "SYSCLK" }, + { "IN4R", NULL, "SYSCLK" }, + { "IN5L", NULL, "SYSCLK" }, + { "IN5R", NULL, "SYSCLK" }, + + { "IN3L", NULL, "DBVDD4" }, + { "IN3R", NULL, "DBVDD4" }, + { "IN4L", NULL, "DBVDD4" }, + { "IN4R", NULL, "DBVDD4" }, + { "IN5L", NULL, "DBVDD4" }, + { "IN5R", NULL, "DBVDD4" }, + + { "DSP1", NULL, "DSPCLK"}, + { "DSP2", NULL, "DSPCLK"}, + { "DSP3", NULL, "DSPCLK"}, + { "DSP4", NULL, "DSPCLK"}, + { "DSP5", NULL, "DSPCLK"}, + { "DSP6", NULL, "DSPCLK"}, + { "DSP7", NULL, "DSPCLK"}, + + { "MICBIAS1", NULL, "MICVDD" }, + { "MICBIAS2", NULL, "MICVDD" }, + + { "MICBIAS1A", NULL, "MICBIAS1" }, + { "MICBIAS1B", NULL, "MICBIAS1" }, + { "MICBIAS1C", NULL, "MICBIAS1" }, + { "MICBIAS1D", NULL, "MICBIAS1" }, + + { "MICBIAS2A", NULL, "MICBIAS2" }, + { "MICBIAS2B", NULL, "MICBIAS2" }, + { "MICBIAS2C", NULL, "MICBIAS2" }, + { "MICBIAS2D", NULL, "MICBIAS2" }, + + { "Noise Generator", NULL, "SYSCLK" }, + { "Tone Generator 1", NULL, "SYSCLK" }, + { "Tone Generator 2", NULL, "SYSCLK" }, + + { "Noise Generator", NULL, "NOISE" }, + { "Tone Generator 1", NULL, "TONE" }, + { "Tone Generator 2", NULL, "TONE" }, + + { "AIF1 Capture", NULL, "AIF1TX1" }, + { "AIF1 Capture", NULL, "AIF1TX2" }, + { "AIF1 Capture", NULL, "AIF1TX3" }, + { "AIF1 Capture", NULL, "AIF1TX4" }, + { "AIF1 Capture", NULL, "AIF1TX5" }, + { "AIF1 Capture", NULL, "AIF1TX6" }, + { "AIF1 Capture", NULL, "AIF1TX7" }, + { "AIF1 Capture", NULL, "AIF1TX8" }, + + { "AIF1RX1", NULL, "AIF1 Playback" }, + { "AIF1RX2", NULL, "AIF1 Playback" }, + { "AIF1RX3", NULL, "AIF1 Playback" }, + { "AIF1RX4", NULL, "AIF1 Playback" }, + { "AIF1RX5", NULL, "AIF1 Playback" }, + { "AIF1RX6", NULL, "AIF1 Playback" }, + { "AIF1RX7", NULL, "AIF1 Playback" }, + { "AIF1RX8", NULL, "AIF1 Playback" }, + + { "AIF2 Capture", NULL, "AIF2TX1" }, + { "AIF2 Capture", NULL, "AIF2TX2" }, + { "AIF2 Capture", NULL, "AIF2TX3" }, + { "AIF2 Capture", NULL, "AIF2TX4" }, + { "AIF2 Capture", NULL, "AIF2TX5" }, + { "AIF2 Capture", NULL, "AIF2TX6" }, + { "AIF2 Capture", NULL, "AIF2TX7" }, + { "AIF2 Capture", NULL, "AIF2TX8" }, + + { "AIF2RX1", NULL, "AIF2 Playback" }, + { "AIF2RX2", NULL, "AIF2 Playback" }, + { "AIF2RX3", NULL, "AIF2 Playback" }, + { "AIF2RX4", NULL, "AIF2 Playback" }, + { "AIF2RX5", NULL, "AIF2 Playback" }, + { "AIF2RX6", NULL, "AIF2 Playback" }, + { "AIF2RX7", NULL, "AIF2 Playback" }, + { "AIF2RX8", NULL, "AIF2 Playback" }, + + { "AIF3 Capture", NULL, "AIF3TX1" }, + { "AIF3 Capture", NULL, "AIF3TX2" }, + + { "AIF3RX1", NULL, "AIF3 Playback" }, + { "AIF3RX2", NULL, "AIF3 Playback" }, + + { "AIF4 Capture", NULL, "AIF4TX1" }, + { "AIF4 Capture", NULL, "AIF4TX2" }, + + { "AIF4RX1", NULL, "AIF4 Playback" }, + { "AIF4RX2", NULL, "AIF4 Playback" }, + + { "Slim1 Capture", NULL, "SLIMTX1" }, + { "Slim1 Capture", NULL, "SLIMTX2" }, + { "Slim1 Capture", NULL, "SLIMTX3" }, + { "Slim1 Capture", NULL, "SLIMTX4" }, + + { "SLIMRX1", NULL, "Slim1 Playback" }, + { "SLIMRX2", NULL, "Slim1 Playback" }, + { "SLIMRX3", NULL, "Slim1 Playback" }, + { "SLIMRX4", NULL, "Slim1 Playback" }, + + { "Slim2 Capture", NULL, "SLIMTX5" }, + { "Slim2 Capture", NULL, "SLIMTX6" }, + + { "SLIMRX5", NULL, "Slim2 Playback" }, + { "SLIMRX6", NULL, "Slim2 Playback" }, + + { "Slim3 Capture", NULL, "SLIMTX7" }, + { "Slim3 Capture", NULL, "SLIMTX8" }, + + { "SLIMRX7", NULL, "Slim3 Playback" }, + { "SLIMRX8", NULL, "Slim3 Playback" }, + + { "AIF1 Playback", NULL, "SYSCLK" }, + { "AIF2 Playback", NULL, "SYSCLK" }, + { "AIF3 Playback", NULL, "SYSCLK" }, + { "AIF4 Playback", NULL, "SYSCLK" }, + { "Slim1 Playback", NULL, "SYSCLK" }, + { "Slim2 Playback", NULL, "SYSCLK" }, + { "Slim3 Playback", NULL, "SYSCLK" }, + + { "AIF1 Capture", NULL, "SYSCLK" }, + { "AIF2 Capture", NULL, "SYSCLK" }, + { "AIF3 Capture", NULL, "SYSCLK" }, + { "AIF4 Capture", NULL, "SYSCLK" }, + { "Slim1 Capture", NULL, "SYSCLK" }, + { "Slim2 Capture", NULL, "SYSCLK" }, + { "Slim3 Capture", NULL, "SYSCLK" }, + + { "Voice Control CPU", NULL, "Voice Control DSP" }, + { "Voice Control DSP", NULL, "DSP6" }, + { "Voice Control CPU", NULL, "SYSCLK" }, + { "Voice Control DSP", NULL, "SYSCLK" }, + + { "Trace CPU", NULL, "Trace DSP" }, + { "Trace DSP", NULL, "DSP1" }, + { "Trace CPU", NULL, "SYSCLK" }, + { "Trace DSP", NULL, "SYSCLK" }, + + { "IN1L Mux", "A", "IN1AL" }, + { "IN1L Mux", "B", "IN1BL" }, + { "IN1R Mux", "A", "IN1AR" }, + { "IN1R Mux", "B", "IN1BR" }, + + { "IN2L Mux", "A", "IN2AL" }, + { "IN2L Mux", "B", "IN2BL" }, + + { "IN1L PGA", NULL, "IN1L Mux" }, + { "IN1R PGA", NULL, "IN1R Mux" }, + + { "IN2L PGA", NULL, "IN2L Mux" }, + { "IN2R PGA", NULL, "IN2R" }, + + { "IN3L PGA", NULL, "IN3L" }, + { "IN3R PGA", NULL, "IN3R" }, + + { "IN4L PGA", NULL, "IN4L" }, + { "IN4R PGA", NULL, "IN4R" }, + + { "IN5L PGA", NULL, "IN5L" }, + { "IN5R PGA", NULL, "IN5R" }, + + ARIZONA_MIXER_ROUTES("OUT1L", "HPOUT1L"), + ARIZONA_MIXER_ROUTES("OUT1R", "HPOUT1R"), + ARIZONA_MIXER_ROUTES("OUT2L", "HPOUT2L"), + ARIZONA_MIXER_ROUTES("OUT2R", "HPOUT2R"), + ARIZONA_MIXER_ROUTES("OUT3L", "HPOUT3L"), + ARIZONA_MIXER_ROUTES("OUT3R", "HPOUT3R"), + + ARIZONA_MIXER_ROUTES("OUT5L", "SPKDAT1L"), + ARIZONA_MIXER_ROUTES("OUT5R", "SPKDAT1R"), + + ARIZONA_MIXER_ROUTES("PWM1 Driver", "PWM1"), + ARIZONA_MIXER_ROUTES("PWM2 Driver", "PWM2"), + + ARIZONA_MIXER_ROUTES("AIF1TX1", "AIF1TX1"), + ARIZONA_MIXER_ROUTES("AIF1TX2", "AIF1TX2"), + ARIZONA_MIXER_ROUTES("AIF1TX3", "AIF1TX3"), + ARIZONA_MIXER_ROUTES("AIF1TX4", "AIF1TX4"), + ARIZONA_MIXER_ROUTES("AIF1TX5", "AIF1TX5"), + ARIZONA_MIXER_ROUTES("AIF1TX6", "AIF1TX6"), + ARIZONA_MIXER_ROUTES("AIF1TX7", "AIF1TX7"), + ARIZONA_MIXER_ROUTES("AIF1TX8", "AIF1TX8"), + + ARIZONA_MIXER_ROUTES("AIF2TX1", "AIF2TX1"), + ARIZONA_MIXER_ROUTES("AIF2TX2", "AIF2TX2"), + ARIZONA_MIXER_ROUTES("AIF2TX3", "AIF2TX3"), + ARIZONA_MIXER_ROUTES("AIF2TX4", "AIF2TX4"), + ARIZONA_MIXER_ROUTES("AIF2TX5", "AIF2TX5"), + ARIZONA_MIXER_ROUTES("AIF2TX6", "AIF2TX6"), + ARIZONA_MIXER_ROUTES("AIF2TX7", "AIF2TX7"), + ARIZONA_MIXER_ROUTES("AIF2TX8", "AIF2TX8"), + + ARIZONA_MIXER_ROUTES("AIF3TX1", "AIF3TX1"), + ARIZONA_MIXER_ROUTES("AIF3TX2", "AIF3TX2"), + + ARIZONA_MIXER_ROUTES("AIF4TX1", "AIF4TX1"), + ARIZONA_MIXER_ROUTES("AIF4TX2", "AIF4TX2"), + + ARIZONA_MIXER_ROUTES("SLIMTX1", "SLIMTX1"), + ARIZONA_MIXER_ROUTES("SLIMTX2", "SLIMTX2"), + ARIZONA_MIXER_ROUTES("SLIMTX3", "SLIMTX3"), + ARIZONA_MIXER_ROUTES("SLIMTX4", "SLIMTX4"), + ARIZONA_MIXER_ROUTES("SLIMTX5", "SLIMTX5"), + ARIZONA_MIXER_ROUTES("SLIMTX6", "SLIMTX6"), + ARIZONA_MIXER_ROUTES("SLIMTX7", "SLIMTX7"), + ARIZONA_MIXER_ROUTES("SLIMTX8", "SLIMTX8"), + + ARIZONA_MUX_ROUTES("SPD1TX1", "SPDIFTX1"), + ARIZONA_MUX_ROUTES("SPD1TX2", "SPDIFTX2"), + + ARIZONA_MIXER_ROUTES("EQ1", "EQ1"), + ARIZONA_MIXER_ROUTES("EQ2", "EQ2"), + ARIZONA_MIXER_ROUTES("EQ3", "EQ3"), + ARIZONA_MIXER_ROUTES("EQ4", "EQ4"), + + ARIZONA_MIXER_ROUTES("DRC1L", "DRC1L"), + ARIZONA_MIXER_ROUTES("DRC1R", "DRC1R"), + ARIZONA_MIXER_ROUTES("DRC2L", "DRC2L"), + ARIZONA_MIXER_ROUTES("DRC2R", "DRC2R"), + + ARIZONA_MIXER_ROUTES("LHPF1", "LHPF1"), + ARIZONA_MIXER_ROUTES("LHPF2", "LHPF2"), + ARIZONA_MIXER_ROUTES("LHPF3", "LHPF3"), + ARIZONA_MIXER_ROUTES("LHPF4", "LHPF4"), + + ARIZONA_MUX_ROUTES("ASRC1IN1L", "ASRC1IN1L"), + ARIZONA_MUX_ROUTES("ASRC1IN1R", "ASRC1IN1R"), + ARIZONA_MUX_ROUTES("ASRC1IN2L", "ASRC1IN2L"), + ARIZONA_MUX_ROUTES("ASRC1IN2R", "ASRC1IN2R"), + ARIZONA_MUX_ROUTES("ASRC2IN1L", "ASRC2IN1L"), + ARIZONA_MUX_ROUTES("ASRC2IN1R", "ASRC2IN1R"), + ARIZONA_MUX_ROUTES("ASRC2IN2L", "ASRC2IN2L"), + ARIZONA_MUX_ROUTES("ASRC2IN2R", "ASRC2IN2R"), + + ARIZONA_DSP_ROUTES("DSP1"), + ARIZONA_DSP_ROUTES("DSP2"), + ARIZONA_DSP_ROUTES("DSP3"), + ARIZONA_DSP_ROUTES("DSP4"), + ARIZONA_DSP_ROUTES("DSP5"), + ARIZONA_DSP_ROUTES("DSP6"), + ARIZONA_DSP_ROUTES("DSP7"), + + { "DSP2 Preloader", NULL, "DSP2 Virtual Input" }, + { "DSP2 Virtual Input", "Shared Memory", "DSP3" }, + { "DSP3 Preloader", NULL, "DSP3 Virtual Input" }, + { "DSP3 Virtual Input", "Shared Memory", "DSP2" }, + + { "DSP Virtual Output", NULL, "DSP Virtual Output Mux" }, + { "DSP Virtual Output Mux", "DSP6", "DSP6" }, + { "DSP Virtual Output", NULL, "SYSCLK" }, + + ARIZONA_MUX_ROUTES("ISRC1INT1", "ISRC1INT1"), + ARIZONA_MUX_ROUTES("ISRC1INT2", "ISRC1INT2"), + ARIZONA_MUX_ROUTES("ISRC1INT3", "ISRC1INT3"), + ARIZONA_MUX_ROUTES("ISRC1INT4", "ISRC1INT4"), + + ARIZONA_MUX_ROUTES("ISRC1DEC1", "ISRC1DEC1"), + ARIZONA_MUX_ROUTES("ISRC1DEC2", "ISRC1DEC2"), + ARIZONA_MUX_ROUTES("ISRC1DEC3", "ISRC1DEC3"), + ARIZONA_MUX_ROUTES("ISRC1DEC4", "ISRC1DEC4"), + + ARIZONA_MUX_ROUTES("ISRC2INT1", "ISRC2INT1"), + ARIZONA_MUX_ROUTES("ISRC2INT2", "ISRC2INT2"), + ARIZONA_MUX_ROUTES("ISRC2INT3", "ISRC2INT3"), + ARIZONA_MUX_ROUTES("ISRC2INT4", "ISRC2INT4"), + + ARIZONA_MUX_ROUTES("ISRC2DEC1", "ISRC2DEC1"), + ARIZONA_MUX_ROUTES("ISRC2DEC2", "ISRC2DEC2"), + ARIZONA_MUX_ROUTES("ISRC2DEC3", "ISRC2DEC3"), + ARIZONA_MUX_ROUTES("ISRC2DEC4", "ISRC2DEC4"), + + ARIZONA_MUX_ROUTES("ISRC3INT1", "ISRC3INT1"), + ARIZONA_MUX_ROUTES("ISRC3INT2", "ISRC3INT2"), + + ARIZONA_MUX_ROUTES("ISRC3DEC1", "ISRC3DEC1"), + ARIZONA_MUX_ROUTES("ISRC3DEC2", "ISRC3DEC2"), + + ARIZONA_MUX_ROUTES("ISRC4INT1", "ISRC4INT1"), + ARIZONA_MUX_ROUTES("ISRC4INT2", "ISRC4INT2"), + + ARIZONA_MUX_ROUTES("ISRC4DEC1", "ISRC4DEC1"), + ARIZONA_MUX_ROUTES("ISRC4DEC2", "ISRC4DEC2"), + + { "AEC Loopback", "HPOUT1L", "OUT1L" }, + { "AEC Loopback", "HPOUT1R", "OUT1R" }, + { "HPOUT1L", NULL, "OUT1L" }, + { "HPOUT1R", NULL, "OUT1R" }, + + { "AEC Loopback", "HPOUT2L", "OUT2L" }, + { "AEC Loopback", "HPOUT2R", "OUT2R" }, + { "HPOUT2L", NULL, "OUT2L" }, + { "HPOUT2R", NULL, "OUT2R" }, + + { "AEC Loopback", "HPOUT3L", "OUT3L" }, + { "AEC Loopback", "HPOUT3R", "OUT3R" }, + { "HPOUT3L", NULL, "OUT3L" }, + { "HPOUT3R", NULL, "OUT3R" }, + + { "AEC Loopback", "SPKDAT1L", "OUT5L" }, + { "AEC Loopback", "SPKDAT1R", "OUT5R" }, + { "SPKDAT1L", NULL, "OUT5L" }, + { "SPKDAT1R", NULL, "OUT5R" }, + + MOON_RXANC_INPUT_ROUTES("RXANCL", "RXANCL"), + MOON_RXANC_INPUT_ROUTES("RXANCR", "RXANCR"), + + MOON_RXANC_OUTPUT_ROUTES("OUT1L", "HPOUT1L"), + MOON_RXANC_OUTPUT_ROUTES("OUT1R", "HPOUT1R"), + MOON_RXANC_OUTPUT_ROUTES("OUT2L", "HPOUT2L"), + MOON_RXANC_OUTPUT_ROUTES("OUT2R", "HPOUT2R"), + MOON_RXANC_OUTPUT_ROUTES("OUT3L", "HPOUT3L"), + MOON_RXANC_OUTPUT_ROUTES("OUT3R", "HPOUT3R"), + MOON_RXANC_OUTPUT_ROUTES("OUT5L", "SPKDAT1L"), + MOON_RXANC_OUTPUT_ROUTES("OUT5R", "SPKDAT1R"), + + { "SPDIF", NULL, "SPD1" }, + + { "MICSUPP", NULL, "SYSCLK" }, + + { "DRC1 Signal Activity", NULL, "DRC1L" }, + { "DRC1 Signal Activity", NULL, "DRC1R" }, + { "DRC2 Signal Activity", NULL, "DRC2L" }, + { "DRC2 Signal Activity", NULL, "DRC2R" }, + + ARIZONA_MUX_ROUTES("DFC1", "DFC1"), + ARIZONA_MUX_ROUTES("DFC2", "DFC2"), + ARIZONA_MUX_ROUTES("DFC3", "DFC3"), + ARIZONA_MUX_ROUTES("DFC4", "DFC4"), + ARIZONA_MUX_ROUTES("DFC5", "DFC5"), + ARIZONA_MUX_ROUTES("DFC6", "DFC6"), + ARIZONA_MUX_ROUTES("DFC7", "DFC7"), + ARIZONA_MUX_ROUTES("DFC8", "DFC8"), +}; + +static int moon_set_fll(struct snd_soc_codec *codec, int fll_id, int source, + unsigned int Fref, unsigned int Fout) +{ + struct moon_priv *moon = snd_soc_codec_get_drvdata(codec); + + switch (fll_id) { + case MOON_FLL1: + return arizona_set_fll(&moon->fll[0], source, Fref, Fout); + case MOON_FLL2: + return arizona_set_fll(&moon->fll[1], source, Fref, Fout); + case MOON_FLL1_REFCLK: + return arizona_set_fll_refclk(&moon->fll[0], source, Fref, + Fout); + case MOON_FLL2_REFCLK: + return arizona_set_fll_refclk(&moon->fll[1], source, Fref, + Fout); + default: + return -EINVAL; + } +} + +#define MOON_RATES SNDRV_PCM_RATE_8000_192000 + +#define MOON_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_driver moon_dai[] = { + { + .name = "moon-aif1", + .id = 1, + .base = ARIZONA_AIF1_BCLK_CTRL, + .playback = { + .stream_name = "AIF1 Playback", + .channels_min = 1, + .channels_max = 8, + .rates = MOON_RATES, + .formats = MOON_FORMATS, + }, + .capture = { + .stream_name = "AIF1 Capture", + .channels_min = 1, + .channels_max = 8, + .rates = MOON_RATES, + .formats = MOON_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "moon-aif2", + .id = 2, + .base = ARIZONA_AIF2_BCLK_CTRL, + .playback = { + .stream_name = "AIF2 Playback", + .channels_min = 1, + .channels_max = 8, + .rates = MOON_RATES, + .formats = MOON_FORMATS, + }, + .capture = { + .stream_name = "AIF2 Capture", + .channels_min = 1, + .channels_max = 8, + .rates = MOON_RATES, + .formats = MOON_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "moon-aif3", + .id = 3, + .base = ARIZONA_AIF3_BCLK_CTRL, + .playback = { + .stream_name = "AIF3 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = MOON_RATES, + .formats = MOON_FORMATS, + }, + .capture = { + .stream_name = "AIF3 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = MOON_RATES, + .formats = MOON_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "moon-aif4", + .id = 4, + .base = ARIZONA_AIF4_BCLK_CTRL, + .playback = { + .stream_name = "AIF4 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = MOON_RATES, + .formats = MOON_FORMATS, + }, + .capture = { + .stream_name = "AIF4 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = MOON_RATES, + .formats = MOON_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "moon-slim1", + .id = 5, + .playback = { + .stream_name = "Slim1 Playback", + .channels_min = 1, + .channels_max = 4, + .rates = MOON_RATES, + .formats = MOON_FORMATS, + }, + .capture = { + .stream_name = "Slim1 Capture", + .channels_min = 1, + .channels_max = 4, + .rates = MOON_RATES, + .formats = MOON_FORMATS, + }, + .ops = &arizona_simple_dai_ops, + }, + { + .name = "moon-slim2", + .id = 6, + .playback = { + .stream_name = "Slim2 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = MOON_RATES, + .formats = MOON_FORMATS, + }, + .capture = { + .stream_name = "Slim2 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = MOON_RATES, + .formats = MOON_FORMATS, + }, + .ops = &arizona_simple_dai_ops, + }, + { + .name = "moon-slim3", + .id = 7, + .playback = { + .stream_name = "Slim3 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = MOON_RATES, + .formats = MOON_FORMATS, + }, + .capture = { + .stream_name = "Slim3 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = MOON_RATES, + .formats = MOON_FORMATS, + }, + .ops = &arizona_simple_dai_ops, + }, + { + .name = "moon-cpu6-voicectrl", + .capture = { + .stream_name = "Voice Control CPU", + .channels_min = 1, + .channels_max = 2, + .rates = MOON_RATES, + .formats = MOON_FORMATS, + }, + .compress_dai = 1, + }, + { + .name = "moon-dsp6-voicectrl", + .capture = { + .stream_name = "Voice Control DSP", + .channels_min = 1, + .channels_max = 2, + .rates = MOON_RATES, + .formats = MOON_FORMATS, + }, + }, + { + .name = "moon-cpu-trace", + .capture = { + .stream_name = "Trace CPU", + .channels_min = 2, + .channels_max = 8, + .rates = MOON_RATES, + .formats = MOON_FORMATS, + }, + .compress_dai = 1, + }, + { + .name = "moon-dsp-trace", + .capture = { + .stream_name = "Trace DSP", + .channels_min = 2, + .channels_max = 8, + .rates = MOON_RATES, + .formats = MOON_FORMATS, + }, + }, +}; + +static irqreturn_t adsp2_irq(int irq, void *data) +{ + struct moon_priv *moon = data; + int ret, avail; + + mutex_lock(&moon->compr_info.lock); + + if (!moon->compr_info.trig && + moon->core.adsp[5].fw_id == 0x9000d && + moon->core.adsp[5].running) { + if (moon->core.arizona->pdata.ez2ctrl_trigger) + moon->core.arizona->pdata.ez2ctrl_trigger(); + moon->compr_info.trig = true; + } + + if (!moon->compr_info.allocated) + goto out; + + ret = wm_adsp_stream_handle_irq(moon->compr_info.adsp); + if (ret < 0) { + dev_err(moon->core.arizona->dev, + "Failed to capture DSP data: %d\n", + ret); + goto out; + } + + moon->compr_info.total_copied += ret; + + avail = wm_adsp_stream_avail(moon->compr_info.adsp); + if (avail > MOON_DEFAULT_FRAGMENT_SIZE) + snd_compr_fragment_elapsed(moon->compr_info.stream); + +out: + mutex_unlock(&moon->compr_info.lock); + + return IRQ_HANDLED; +} + +static int moon_open(struct snd_compr_stream *stream) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct moon_priv *moon = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = moon->core.arizona; + int n_adsp, ret = 0; + + mutex_lock(&moon->compr_info.lock); + + if (moon->compr_info.stream) { + ret = -EBUSY; + goto out; + } + + if (strcmp(rtd->codec_dai->name, "moon-dsp6-voicectrl") == 0) { + n_adsp = 5; + } else if (strcmp(rtd->codec_dai->name, "moon-dsp-trace") == 0) { + n_adsp = 0; + } else { + dev_err(arizona->dev, + "No suitable compressed stream for dai '%s'\n", + rtd->codec_dai->name); + ret = -EINVAL; + goto out; + } + + if (!wm_adsp_compress_supported(&moon->core.adsp[n_adsp], stream)) { + dev_err(arizona->dev, + "No suitable firmware for compressed stream\n"); + ret = -EINVAL; + goto out; + } + + moon->compr_info.adsp = &moon->core.adsp[n_adsp]; + moon->compr_info.stream = stream; +out: + mutex_unlock(&moon->compr_info.lock); + + return ret; +} + +static int moon_free(struct snd_compr_stream *stream) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct moon_priv *moon = snd_soc_codec_get_drvdata(rtd->codec); + + mutex_lock(&moon->compr_info.lock); + + moon->compr_info.allocated = false; + moon->compr_info.stream = NULL; + moon->compr_info.total_copied = 0; + + wm_adsp_stream_free(moon->compr_info.adsp); + + mutex_unlock(&moon->compr_info.lock); + + return 0; +} + +static int moon_set_params(struct snd_compr_stream *stream, + struct snd_compr_params *params) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct moon_priv *moon = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = moon->core.arizona; + struct moon_compr *compr = &moon->compr_info; + int ret = 0; + + mutex_lock(&compr->lock); + + if (!wm_adsp_format_supported(compr->adsp, stream, params)) { + dev_err(arizona->dev, + "Invalid params: id:%u, chan:%u,%u, rate:%u format:%u\n", + params->codec.id, params->codec.ch_in, + params->codec.ch_out, params->codec.sample_rate, + params->codec.format); + ret = -EINVAL; + goto out; + } + + ret = wm_adsp_stream_alloc(compr->adsp, params); + if (ret == 0) + compr->allocated = true; + +out: + mutex_unlock(&compr->lock); + + return ret; +} + +static int moon_get_params(struct snd_compr_stream *stream, + struct snd_codec *params) +{ + return 0; +} + +static int moon_trigger(struct snd_compr_stream *stream, int cmd) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct moon_priv *moon = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = moon->core.arizona; + int ret = 0; + bool pending = false; + + mutex_lock(&moon->compr_info.lock); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + ret = wm_adsp_stream_start(moon->compr_info.adsp); + + /** + * If the stream has already triggered before the stream + * opened better process any outstanding data + */ + if (moon->compr_info.trig) + pending = true; + break; + case SNDRV_PCM_TRIGGER_STOP: + break; + default: + ret = -EINVAL; + break; + } + + mutex_unlock(&moon->compr_info.lock); + + /* + * Stream has already trigerred, force irq handler to run + * by generating interrupt. + */ + if (pending) + regmap_write(arizona->regmap, CLEARWATER_ADSP2_IRQ0, 0x01); + + + return ret; +} + +static int moon_pointer(struct snd_compr_stream *stream, + struct snd_compr_tstamp *tstamp) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct moon_priv *moon = snd_soc_codec_get_drvdata(rtd->codec); + + mutex_lock(&moon->compr_info.lock); + tstamp->byte_offset = 0; + tstamp->copied_total = moon->compr_info.total_copied; + mutex_unlock(&moon->compr_info.lock); + + return 0; +} + +static int moon_copy(struct snd_compr_stream *stream, char __user *buf, + size_t count) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct moon_priv *moon = snd_soc_codec_get_drvdata(rtd->codec); + int ret; + + mutex_lock(&moon->compr_info.lock); + + if (stream->direction == SND_COMPRESS_PLAYBACK) + ret = -EINVAL; + else + ret = wm_adsp_stream_read(moon->compr_info.adsp, buf, count); + + mutex_unlock(&moon->compr_info.lock); + + return ret; +} + +static int moon_get_caps(struct snd_compr_stream *stream, + struct snd_compr_caps *caps) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct moon_priv *moon = snd_soc_codec_get_drvdata(rtd->codec); + + mutex_lock(&moon->compr_info.lock); + + memset(caps, 0, sizeof(*caps)); + + caps->direction = stream->direction; + caps->min_fragment_size = MOON_DEFAULT_FRAGMENT_SIZE; + caps->max_fragment_size = MOON_DEFAULT_FRAGMENT_SIZE; + caps->min_fragments = MOON_DEFAULT_FRAGMENTS; + caps->max_fragments = MOON_DEFAULT_FRAGMENTS; + + wm_adsp_get_caps(moon->compr_info.adsp, stream, caps); + + mutex_unlock(&moon->compr_info.lock); + + return 0; +} + +static int moon_get_codec_caps(struct snd_compr_stream *stream, + struct snd_compr_codec_caps *codec) +{ + return 0; +} + +static int moon_codec_probe(struct snd_soc_codec *codec) +{ + struct moon_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->core.arizona; + int ret; + + codec->control_data = priv->core.arizona->regmap; + priv->core.arizona->dapm = &codec->dapm; + + ret = snd_soc_codec_set_cache_io(codec, 32, 16, SND_SOC_REGMAP); + if (ret != 0) + return ret; + + arizona_init_gpio(codec); + arizona_init_mono(codec); + arizona_init_input(codec); + + /* Update Sample Rate 1 to 48kHz for cases when no AIF1 hw_params */ + regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_1, + ARIZONA_SAMPLE_RATE_1_MASK, 0x03); + + ret = snd_soc_add_codec_controls(codec, wm_adsp2v2_fw_controls, 14); + if (ret != 0) + return ret; + + mutex_lock(&codec->card->dapm_mutex); + snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); + mutex_unlock(&codec->card->dapm_mutex); + + priv->core.arizona->dapm = &codec->dapm; + + ret = arizona_request_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, + "ADSP2 interrupt 1", adsp2_irq, priv); + if (ret != 0) { + dev_err(arizona->dev, "Failed to request DSP IRQ: %d\n", ret); + return ret; + } + + ret = irq_set_irq_wake(arizona->irq, 1); + if (ret) + dev_err(arizona->dev, + "Failed to set DSP IRQ to wake source: %d\n", + ret); + + mutex_lock(&codec->card->dapm_mutex); + snd_soc_dapm_enable_pin(&codec->dapm, "DRC2 Signal Activity"); + mutex_unlock(&codec->card->dapm_mutex); + + ret = regmap_update_bits(arizona->regmap, CLEARWATER_IRQ2_MASK_9, + CLEARWATER_DRC2_SIG_DET_EINT2, + CLEARWATER_DRC2_SIG_DET_EINT2); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to unmask DRC2 IRQ for DSP: %d\n", + ret); + return ret; + } + + return 0; +} + +static int moon_codec_remove(struct snd_soc_codec *codec) +{ + struct moon_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->core.arizona; + + irq_set_irq_wake(arizona->irq, 0); + arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); + regmap_update_bits(arizona->regmap, CLEARWATER_IRQ2_MASK_9, + CLEARWATER_DRC2_SIG_DET_EINT2, + 0); + + priv->core.arizona->dapm = NULL; + + return 0; +} + +#define MOON_DIG_VU 0x0200 + +static unsigned int moon_digital_vu[] = { + ARIZONA_DAC_DIGITAL_VOLUME_1L, + ARIZONA_DAC_DIGITAL_VOLUME_1R, + ARIZONA_DAC_DIGITAL_VOLUME_2L, + ARIZONA_DAC_DIGITAL_VOLUME_2R, + ARIZONA_DAC_DIGITAL_VOLUME_3L, + ARIZONA_DAC_DIGITAL_VOLUME_3R, + ARIZONA_DAC_DIGITAL_VOLUME_5L, + ARIZONA_DAC_DIGITAL_VOLUME_5R, +}; + +static struct snd_soc_codec_driver soc_codec_dev_moon = { + .probe = moon_codec_probe, + .remove = moon_codec_remove, + + .idle_bias_off = true, + + .set_sysclk = arizona_set_sysclk, + .set_pll = moon_set_fll, + + .controls = moon_snd_controls, + .num_controls = ARRAY_SIZE(moon_snd_controls), + .dapm_widgets = moon_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(moon_dapm_widgets), + .dapm_routes = moon_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(moon_dapm_routes), +}; + +static struct snd_compr_ops moon_compr_ops = { + .open = moon_open, + .free = moon_free, + .set_params = moon_set_params, + .get_params = moon_get_params, + .trigger = moon_trigger, + .pointer = moon_pointer, + .copy = moon_copy, + .get_caps = moon_get_caps, + .get_codec_caps = moon_get_codec_caps, +}; + +static struct snd_soc_platform_driver moon_compr_platform = { + .compr_ops = &moon_compr_ops, +}; + +static int moon_probe(struct platform_device *pdev) +{ + struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); + struct moon_priv *moon; + int i, ret; + + BUILD_BUG_ON(ARRAY_SIZE(moon_dai) > ARIZONA_MAX_DAI); + + moon = devm_kzalloc(&pdev->dev, sizeof(struct moon_priv), + GFP_KERNEL); + if (moon == NULL) + return -ENOMEM; + platform_set_drvdata(pdev, moon); + + /* Set of_node to parent from the SPI device to allow DAPM to + * locate regulator supplies */ + pdev->dev.of_node = arizona->dev->of_node; + + mutex_init(&moon->compr_info.lock); + mutex_init(&moon->fw_lock); + + moon->core.arizona = arizona; + moon->core.num_inputs = 10; + + for (i = 0; i < MOON_NUM_ADSP; i++) { + moon->core.adsp[i].part = "moon"; + if (arizona->pdata.rev_specific_fw) + moon->core.adsp[i].part_rev = 'a' + arizona->rev; + moon->core.adsp[i].num = i + 1; + moon->core.adsp[i].type = WMFW_ADSP2; + moon->core.adsp[i].rev = 1; + moon->core.adsp[i].dev = arizona->dev; + moon->core.adsp[i].regmap = arizona->regmap_32bit; + + moon->core.adsp[i].base = wm_adsp2_control_bases[i]; + moon->core.adsp[i].mem = moon_dsp_regions[i]; + moon->core.adsp[i].num_mems + = ARRAY_SIZE(moon_dsp1_regions); + + if (arizona->pdata.num_fw_defs[i]) { + moon->core.adsp[i].firmwares + = arizona->pdata.fw_defs[i]; + + moon->core.adsp[i].num_firmwares + = arizona->pdata.num_fw_defs[i]; + } + + moon->core.adsp[i].rate_put_cb = + moon_adsp_rate_put_cb; + + ret = wm_adsp2_init(&moon->core.adsp[i], &moon->fw_lock); + if (ret != 0) + return ret; + } + + for (i = 0; i < ARRAY_SIZE(moon->fll); i++) { + moon->fll[i].vco_mult = 3; + moon->fll[i].min_outdiv = 3; + moon->fll[i].max_outdiv = 3; + } + + arizona_init_fll(arizona, 1, ARIZONA_FLL1_CONTROL_1 - 1, + ARIZONA_IRQ_FLL1_LOCK, ARIZONA_IRQ_FLL1_CLOCK_OK, + &moon->fll[0]); + arizona_init_fll(arizona, 2, ARIZONA_FLL2_CONTROL_1 - 1, + ARIZONA_IRQ_FLL2_LOCK, ARIZONA_IRQ_FLL2_CLOCK_OK, + &moon->fll[1]); + + for (i = 0; i < ARRAY_SIZE(moon_dai); i++) + arizona_init_dai(&moon->core, i); + + /* Latch volume update bits */ + for (i = 0; i < ARRAY_SIZE(moon_digital_vu); i++) + regmap_update_bits(arizona->regmap, moon_digital_vu[i], + MOON_DIG_VU, MOON_DIG_VU); + + pm_runtime_enable(&pdev->dev); + pm_runtime_idle(&pdev->dev); + + ret = snd_soc_register_platform(&pdev->dev, &moon_compr_platform); + if (ret < 0) { + dev_err(&pdev->dev, + "Failed to register platform: %d\n", + ret); + goto error; + } + + ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_moon, + moon_dai, ARRAY_SIZE(moon_dai)); + if (ret < 0) { + dev_err(&pdev->dev, + "Failed to register codec: %d\n", + ret); + snd_soc_unregister_platform(&pdev->dev); + goto error; + } + + return ret; + +error: + mutex_destroy(&moon->compr_info.lock); + mutex_destroy(&moon->fw_lock); + + return ret; +} + +static int moon_remove(struct platform_device *pdev) +{ + struct moon_priv *moon = platform_get_drvdata(pdev); + + snd_soc_unregister_codec(&pdev->dev); + pm_runtime_disable(&pdev->dev); + + mutex_destroy(&moon->compr_info.lock); + mutex_destroy(&moon->fw_lock); + + return 0; +} + +static struct platform_driver moon_codec_driver = { + .driver = { + .name = "moon-codec", + .owner = THIS_MODULE, + }, + .probe = moon_probe, + .remove = moon_remove, +}; + +module_platform_driver(moon_codec_driver); + +MODULE_DESCRIPTION("ASoC MOON driver"); +MODULE_AUTHOR("Nikesh Oswal "); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:moon-codec"); diff --git a/sound/soc/codecs/moon.h b/sound/soc/codecs/moon.h new file mode 100644 index 00000000000..223da6daa33 --- /dev/null +++ b/sound/soc/codecs/moon.h @@ -0,0 +1,23 @@ +/* + * moon.h -- ALSA SoC Audio driver for Moon-class codecs + * + * Copyright 2015 Cirrus Logic + * + * Author: Nikesh Oswal + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _MOON_H +#define _MOON_H + +#include "arizona.h" + +#define MOON_FLL1 1 +#define MOON_FLL2 2 +#define MOON_FLL1_REFCLK 3 +#define MOON_FLL2_REFCLK 4 + +#endif From a9f8bcfa19d0c4801967b1107d64f919f9564162 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 27 May 2015 15:43:29 +0100 Subject: [PATCH 0909/1167] ASoC: moon: configure exact dsp frequency set the exact dsp frequency as compared to a frequency range set in legacy registers Change-Id: I077b91b0ea55566c7e8ce84cb91443455dddc6e2 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 75 ++++++++++++++++++++++++++++++++++---- sound/soc/codecs/moon.c | 9 ++--- sound/soc/codecs/wm_adsp.c | 32 +++++++++++++--- 3 files changed, 98 insertions(+), 18 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index a6718355f06..82de4c69440 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -3070,6 +3070,17 @@ static void clearwater_get_dsp_reg_seq(unsigned int cur, unsigned int tar, s[1].delay_us = 0; } +static int moon_get_dspclk_setting(unsigned int freq, unsigned int *val) +{ + if (freq > 150000000) + return -EINVAL; + + /* freq * (2^6) / (10^6) */ + *val = freq / 15625; + + return 0; +} + int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id, int source, unsigned int freq, int dir) { @@ -3078,6 +3089,7 @@ int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id, int ret = 0; char *name; unsigned int reg; + unsigned int reg2, val2; unsigned int mask = ARIZONA_SYSCLK_FREQ_MASK | ARIZONA_SYSCLK_SRC_MASK; unsigned int val = source << ARIZONA_SYSCLK_SRC_SHIFT; int clk_freq; @@ -3086,6 +3098,8 @@ int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id, unsigned int dspclk_val; struct reg_sequence dspclk_seq[2]; + reg2 = val2 = 0; + switch (arizona->type) { case WM8997: case WM8998: @@ -3116,7 +3130,9 @@ int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id, return -EINVAL; } break; - default: + case CS47L35: + case WM8285: + case WM1840: switch (clk_id) { case ARIZONA_CLK_SYSCLK: name = "SYSCLK"; @@ -3155,15 +3171,60 @@ int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id, return -EINVAL; } break; + default: + switch (clk_id) { + case ARIZONA_CLK_SYSCLK: + name = "SYSCLK"; + reg = ARIZONA_SYSTEM_CLOCK_1; + clk = &priv->sysclk; + clk_freq = clearwater_get_sysclk_setting(freq); + mask |= ARIZONA_SYSCLK_FRAC; + break; + case ARIZONA_CLK_ASYNCCLK: + name = "ASYNCCLK"; + reg = ARIZONA_ASYNC_CLOCK_1; + clk = &priv->asyncclk; + clk_freq = clearwater_get_sysclk_setting(freq); + break; + case ARIZONA_CLK_OPCLK: + case ARIZONA_CLK_ASYNC_OPCLK: + return arizona_set_opclk(codec, clk_id, freq); + case ARIZONA_CLK_DSPCLK: + name = "DSPCLK"; + reg = CLEARWATER_DSP_CLOCK_1; + mask = ARIZONA_SYSCLK_SRC_MASK; + reg2 = CLEARWATER_DSP_CLOCK_2; + clk = &priv->dspclk; + ret = moon_get_dspclk_setting(freq, &val2); + break; + default: + return -EINVAL; + } + break; } - if (clk_freq < 0) { - dev_err(arizona->dev, "Failed to get clk setting for %dHZ\n", - freq); - return ret; - } + if (reg2) { + if (ret < 0) { + dev_err(arizona->dev, "Failed to get clk setting for %dHZ\n", + freq); + return ret; + } + ret = regmap_write(arizona->regmap, + reg2, val2); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to set dsp freq to %d\n", val2); + return ret; + } + } else { + if (clk_freq < 0) { + dev_err(arizona->dev, "Failed to get clk setting for %dHZ\n", + freq); + return ret; + } - val |= clk_freq; + val |= clk_freq; + } if (freq == 0) { dev_dbg(arizona->dev, "%s cleared\n", name); diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 01f29558deb..c8ee171f262 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -595,16 +595,13 @@ static int moon_adsp_power_ev(struct snd_soc_dapm_widget *w, unsigned int freq; int ret; - ret = regmap_read(arizona->regmap, CLEARWATER_DSP_CLOCK_1, &freq); + ret = regmap_read(arizona->regmap, CLEARWATER_DSP_CLOCK_2, &freq); if (ret != 0) { dev_err(arizona->dev, - "Failed to read CLEARWATER_DSP_CLOCK_1: %d\n", ret); + "Failed to read CLEARWATER_DSP_CLOCK_2: %d\n", ret); return ret; } - freq &= CLEARWATER_DSP_CLK_FREQ_LEGACY_MASK; - freq >>= CLEARWATER_DSP_CLK_FREQ_LEGACY_SHIFT; - switch (event) { case SND_SOC_DAPM_PRE_PMU: if (w->shift == 5) { @@ -3021,7 +3018,7 @@ static int moon_probe(struct platform_device *pdev) moon->core.adsp[i].part_rev = 'a' + arizona->rev; moon->core.adsp[i].num = i + 1; moon->core.adsp[i].type = WMFW_ADSP2; - moon->core.adsp[i].rev = 1; + moon->core.adsp[i].rev = 2; moon->core.adsp[i].dev = arizona->dev; moon->core.adsp[i].regmap = arizona->regmap_32bit; diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index f64dca97328..5edf6c133f4 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -119,6 +119,7 @@ #define ADSP2_CONTROL 0x0 #define ADSP2_CLOCKING 0x1 +#define ADSP2V2_CLOCKING 0x2 #define ADSP2_STATUS1 0x4 #define ADSP2_WDMA_CONFIG_1 0x30 #define ADSP2_WDMA_CONFIG_2 0x31 @@ -2329,7 +2330,7 @@ static void wm_adsp2_boot_work(struct work_struct *work) static void wm_adsp2_set_dspclk(struct wm_adsp *dsp, unsigned int freq) { int ret; - int mask; + unsigned int mask, val; switch (dsp->rev) { case 0: @@ -2345,11 +2346,32 @@ static void wm_adsp2_set_dspclk(struct wm_adsp *dsp, unsigned int freq) default: mutex_lock(&dsp->rate_lock); - mask = ADSP2V2_CLK_SEL_MASK | ADSP2V2_RATE_MASK; - freq <<= ADSP2V2_CLK_SEL_SHIFT; - freq |= dsp->rate_cache << ADSP2V2_RATE_SHIFT; + mask = ADSP2V2_RATE_MASK; + val = dsp->rate_cache << ADSP2V2_RATE_SHIFT; - ret = dsp->rate_put_cb(dsp, mask, freq); + switch (dsp->rev) { + case 0: + case 1: + /* use legacy frequency registers */ + mask |= ADSP2V2_CLK_SEL_MASK; + val |= (freq << ADSP2V2_CLK_SEL_SHIFT); + break; + default: + /* Configure exact dsp frequency */ + ret = regmap_write(dsp->regmap, + dsp->base + ADSP2V2_CLOCKING, + freq); + if (ret != 0) { + adsp_err(dsp, + "Failed to set DSP freq: %d\n", + ret); + mutex_unlock(&dsp->rate_lock); + return; + } + break; + } + + ret = dsp->rate_put_cb(dsp, mask, val); if (ret != 0) { adsp_err(dsp, "Failed to set DSP_CLK rate: %d\n", ret); mutex_unlock(&dsp->rate_lock); From db9f253c6ed802a66abfac902ace28d4dc725406 Mon Sep 17 00:00:00 2001 From: Mayuresh Kulkarni Date: Tue, 19 May 2015 12:26:44 +0100 Subject: [PATCH 0910/1167] ASoC: wm_adsp: add support for DSP region lock Change-Id: Idc7d96d43e5d20c38a66b5042dea846b4fbcc886 Signed-off-by: Mayuresh Kulkarni Signed-off-by: Nikesh Oswal --- sound/soc/codecs/wm_adsp.c | 146 +++++++++++++++++++++++++++++++++++++ sound/soc/codecs/wm_adsp.h | 21 ++++++ 2 files changed, 167 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 5edf6c133f4..8784c40b24a 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -181,6 +181,38 @@ #define ADSP2_RAM_RDY_SHIFT 0 #define ADSP2_RAM_RDY_WIDTH 1 +/* + * ADSP2 Lock support + */ + +#define ADSP2_LOCK_CODE_0 0x5555 +#define ADSP2_LOCK_CODE_1 0xAAAA + +#define ADSP2_WATCHDOG 0x0A +#define ADSP2_BUS_ERR_ADDR 0x52 +#define ADSP2_REGION_LOCK_STATUS 0x64 +#define ADSP2_LOCK_REGION_1_LOCK_REGION_0 0x66 +#define ADSP2_LOCK_REGION_3_LOCK_REGION_2 0x68 +#define ADSP2_LOCK_REGION_5_LOCK_REGION_4 0x6A +#define ADSP2_LOCK_REGION_7_LOCK_REGION_6 0x6C +#define ADSP2_LOCK_REGION_9_LOCK_REGION_8 0x6E +#define ADSP2_LOCK_REGION_CTRL 0x7A +#define ADSP2_PMEM_ERR_ADDR_XMEM_ERR_ADDR 0x7C + +#define ADSP2_REGION_LOCK_ERR_MASK 0x8000 +#define ADSP2_SLAVE_ERR_MASK 0x4000 +#define ADSP2_WDT_TIMEOUT_STS_MASK 0x2000 +#define ADSP2_CTRL_ERR_PAUSE_ENA 0x0002 +#define ADSP2_CTRL_ERR_EINT 0x0001 + +#define ADSP2_BUS_ERR_ADDR_MASK 0x00FFFFFF +#define ADSP2_XMEM_ERR_ADDR_MASK 0x0000FFFF +#define ADSP2_PMEM_ERR_ADDR_MASK 0x7FFF0000 +#define ADSP2_PMEM_ERR_ADDR_SHIFT 16 +#define ADSP2_WDT_ENA_MASK 0xFFFFFFFD + +#define ADSP2_LOCK_REGION_SHIFT 16 + struct wm_adsp_buf { struct list_head list; void *buf; @@ -2445,6 +2477,19 @@ static void wm_adsp_edac_shutdown(struct wm_adsp *dsp) adsp_err(dsp, "Failed to shutdown eDAC firmware\n"); } +static inline void wm_adsp_stop_watchdog(struct wm_adsp *adsp) +{ + switch (adsp->rev) { + case 0: + case 1: + return; + default: + regmap_update_bits(adsp->regmap, + adsp->base + ADSP2_WATCHDOG, + ADSP2_WDT_ENA_MASK, 0); + } +} + int wm_adsp2_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { @@ -2462,6 +2507,8 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, if (!dsp->running) return -EIO; + wm_adsp2_lock(dsp, dsp->lock_regions); + ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, ADSP2_CORE_ENA | ADSP2_START, @@ -2485,6 +2532,8 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, if (dsp->fw_features.shutdown) wm_adsp_edac_shutdown(dsp); + wm_adsp_stop_watchdog(dsp); + dsp->running = false; wm_adsp_debugfs_save_wmfwname(dsp, NULL); @@ -3305,6 +3354,103 @@ int wm_adsp_stream_avail(const struct wm_adsp *dsp) } EXPORT_SYMBOL_GPL(wm_adsp_stream_avail); +/* DSP lock region support */ +int wm_adsp2_lock(struct wm_adsp *adsp, unsigned int lock_regions) +{ + struct regmap *regmap_32bit = adsp->regmap; + unsigned int lockcode0, lockcode1, lock_reg; + + if (!(lock_regions & WM_ADSP2_REGION_ALL)) + return 0; + + lock_regions &= WM_ADSP2_REGION_ALL; + lock_reg = adsp->base + + ADSP2_LOCK_REGION_1_LOCK_REGION_0; + + while (lock_regions) { + lockcode0 = lockcode1 = 0; + if (lock_regions & BIT(0)) { + lockcode0 = ADSP2_LOCK_CODE_0; + lockcode1 = ADSP2_LOCK_CODE_1; + } + if (lock_regions & BIT(1)) { + lockcode0 |= ADSP2_LOCK_CODE_0 << + ADSP2_LOCK_REGION_SHIFT; + lockcode1 |= ADSP2_LOCK_CODE_1 << + ADSP2_LOCK_REGION_SHIFT; + } + regmap_write(regmap_32bit, + lock_reg, lockcode0); + regmap_write(regmap_32bit, + lock_reg, lockcode1); + lock_regions >>= 2; + lock_reg += 2; + } + + return 0; +} +EXPORT_SYMBOL_GPL(wm_adsp2_lock); + +irqreturn_t wm_adsp2_bus_error(struct wm_adsp *adsp) +{ + unsigned int reg_val; + int ret = 0; + struct regmap *regmap = adsp->regmap; + + ret = regmap_read(regmap, adsp->base + + ADSP2_LOCK_REGION_CTRL, ®_val); + if (ret != 0) { + adsp_err(adsp, + "Failed to read Region Lock Ctrl register: %d\n", + ret); + goto exit; + } + + if (reg_val & ADSP2_WDT_TIMEOUT_STS_MASK) { + adsp_err(adsp, "watchdog timeout error\n"); + wm_adsp_stop_watchdog(adsp); + } + + if (reg_val & (ADSP2_SLAVE_ERR_MASK | ADSP2_REGION_LOCK_ERR_MASK)) { + if (reg_val & ADSP2_SLAVE_ERR_MASK) + adsp_err(adsp, "bus error: slave error\n"); + else + adsp_err(adsp, "bus error: region lock error\n"); + + ret = regmap_read(regmap, adsp->base + + ADSP2_BUS_ERR_ADDR, ®_val); + if (ret != 0) { + adsp_err(adsp, + "Failed to read Bus Err Addr register: %d\n", + ret); + goto exit; + } + adsp_err(adsp, "bus error address = 0x%x\n", + (reg_val & ADSP2_BUS_ERR_ADDR_MASK)); + + ret = regmap_read(regmap, adsp->base + + ADSP2_PMEM_ERR_ADDR_XMEM_ERR_ADDR, + ®_val); + if (ret != 0) { + adsp_err(adsp, + "Failed to read Pmem Xmem Err Addr register: %d\n", + ret); + goto exit; + } + adsp_err(adsp, "xmem error address = 0x%x\n", + (reg_val & ADSP2_XMEM_ERR_ADDR_MASK)); + adsp_err(adsp, "pmem error address = 0x%x\n", + (reg_val & ADSP2_PMEM_ERR_ADDR_MASK) + >> ADSP2_PMEM_ERR_ADDR_SHIFT); + } + + regmap_write(regmap, adsp->base + ADSP2_LOCK_REGION_CTRL, + ADSP2_CTRL_ERR_EINT); +exit: + return IRQ_HANDLED; +} +EXPORT_SYMBOL_GPL(wm_adsp2_bus_error); + #ifdef CONFIG_DEBUG_FS static void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, const char *s) { diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index d8568ff60e0..9dbb972f25d 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -20,6 +20,23 @@ #include "wmfw.h" +#define WM_ADSP2_REGION_0 BIT(0) +#define WM_ADSP2_REGION_1 BIT(1) +#define WM_ADSP2_REGION_2 BIT(2) +#define WM_ADSP2_REGION_3 BIT(3) +#define WM_ADSP2_REGION_4 BIT(4) +#define WM_ADSP2_REGION_5 BIT(5) +#define WM_ADSP2_REGION_6 BIT(6) +#define WM_ADSP2_REGION_7 BIT(7) +#define WM_ADSP2_REGION_8 BIT(8) +#define WM_ADSP2_REGION_9 BIT(9) +#define WM_ADSP2_REGION_1_9 (WM_ADSP2_REGION_1 | \ + WM_ADSP2_REGION_2 | WM_ADSP2_REGION_3 | \ + WM_ADSP2_REGION_4 | WM_ADSP2_REGION_5 | \ + WM_ADSP2_REGION_6 | WM_ADSP2_REGION_7 | \ + WM_ADSP2_REGION_8 | WM_ADSP2_REGION_9) +#define WM_ADSP2_REGION_ALL (WM_ADSP2_REGION_0 | WM_ADSP2_REGION_1_9) + struct wm_adsp_region { int type; unsigned int base; @@ -126,6 +143,7 @@ struct wm_adsp { char *bin_file_loaded; #endif + unsigned int lock_regions; }; #define WM_ADSP1(wname, num) \ @@ -178,6 +196,9 @@ static inline int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, } #endif +int wm_adsp2_lock(struct wm_adsp *adsp, unsigned int regions); +irqreturn_t wm_adsp2_bus_error(struct wm_adsp *adsp); + int wm_adsp2_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); From b61d57ea2ebd7495d494149d81be29ce96a15e1d Mon Sep 17 00:00:00 2001 From: Mayuresh Kulkarni Date: Tue, 19 May 2015 12:27:20 +0100 Subject: [PATCH 0911/1167] ASoC: moon: enable DSP lock region security Change-Id: I4d2350cbfdcd0ec91f9df4c43bd9b771be16a0a7 Signed-off-by: Mayuresh Kulkarni Signed-off-by: Nikesh Oswal --- sound/soc/codecs/moon.c | 52 ++++++++++++++++++++++++++++++++++++++--- 1 file changed, 49 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index c8ee171f262..efc360c8a2a 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -269,6 +269,16 @@ static const int wm_adsp2_control_bases[] = { CLEARWATER_DSP7_CONFIG, }; +static const int moon_adsp_bus_error_irqs[MOON_NUM_ADSP] = { + MOON_IRQ_DSP1_BUS_ERROR, + MOON_IRQ_DSP2_BUS_ERROR, + MOON_IRQ_DSP3_BUS_ERROR, + MOON_IRQ_DSP4_BUS_ERROR, + MOON_IRQ_DSP5_BUS_ERROR, + MOON_IRQ_DSP6_BUS_ERROR, + MOON_IRQ_DSP7_BUS_ERROR, +}; + static const char * const moon_inmux_texts[] = { "A", "B", @@ -2666,6 +2676,12 @@ static irqreturn_t adsp2_irq(int irq, void *data) return IRQ_HANDLED; } +static irqreturn_t moon_adsp_bus_error(int irq, void *data) +{ + struct wm_adsp *adsp = (struct wm_adsp *)data; + return wm_adsp2_bus_error(adsp); +} + static int moon_open(struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; @@ -2869,7 +2885,7 @@ static int moon_codec_probe(struct snd_soc_codec *codec) { struct moon_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; - int ret; + int ret, i, j; codec->control_data = priv->core.arizona->regmap; priv->core.arizona->dapm = &codec->dapm; @@ -2909,6 +2925,24 @@ static int moon_codec_probe(struct snd_soc_codec *codec) "Failed to set DSP IRQ to wake source: %d\n", ret); + for (i = 0; i < MOON_NUM_ADSP; i++) { + ret = arizona_request_irq(arizona, + moon_adsp_bus_error_irqs[i], + "ADSP2 bus error", + moon_adsp_bus_error, + &priv->core.adsp[i]); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to request DSP Lock region IRQ: %d\n", + ret); + for (j = 0; j < i; j++) + arizona_free_irq(arizona, + moon_adsp_bus_error_irqs[j], + &priv->core.adsp[j]); + return ret; + } + } + mutex_lock(&codec->card->dapm_mutex); snd_soc_dapm_enable_pin(&codec->dapm, "DRC2 Signal Activity"); mutex_unlock(&codec->card->dapm_mutex); @@ -2920,23 +2954,33 @@ static int moon_codec_probe(struct snd_soc_codec *codec) dev_err(arizona->dev, "Failed to unmask DRC2 IRQ for DSP: %d\n", ret); - return ret; + goto err_drc; } return 0; + +err_drc: + for (i = 0; i < MOON_NUM_ADSP; i++) + arizona_free_irq(arizona, moon_adsp_bus_error_irqs[i], + &priv->core.adsp[i]); + + return ret; } static int moon_codec_remove(struct snd_soc_codec *codec) { + int i; struct moon_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; irq_set_irq_wake(arizona->irq, 0); arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); + for (i = 0; i < MOON_NUM_ADSP; i++) + arizona_free_irq(arizona, moon_adsp_bus_error_irqs[i], + &priv->core.adsp[i]); regmap_update_bits(arizona->regmap, CLEARWATER_IRQ2_MASK_9, CLEARWATER_DRC2_SIG_DET_EINT2, 0); - priv->core.arizona->dapm = NULL; return 0; @@ -3038,6 +3082,8 @@ static int moon_probe(struct platform_device *pdev) moon->core.adsp[i].rate_put_cb = moon_adsp_rate_put_cb; + moon->core.adsp[i].lock_regions = WM_ADSP2_REGION_1_9; + ret = wm_adsp2_init(&moon->core.adsp[i], &moon->fw_lock); if (ret != 0) return ret; From 521c465e6303170f532ab01211cf415851b39a9d Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 30 Apr 2015 09:46:15 +0100 Subject: [PATCH 0912/1167] switch: arizona: Add defines for moon Change-Id: If7f05c02b9e7dd4df750fa7ceaa911a2ce7afba7 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 39 +++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 946e50af5be..b4270504e2f 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -72,6 +72,45 @@ #define ARIZONA_MIC_MUTE 1 #define ARIZONA_MIC_UNMUTE 0 +#define MOON_HPD_SENSE_MICDET1 0 +#define MOON_HPD_SENSE_MICDET2 1 +#define MOON_HPD_SENSE_MICDET3 2 +#define MOON_HPD_SENSE_MICDET4 3 +#define MOON_HPD_SENSE_HPDET1 4 +#define MOON_HPD_SENSE_HPDET2 5 +#define MOON_HPD_SENSE_JD1 6 +#define MOON_HPD_SENSE_JD2 7 + +#define MOON_HPD_GND_MICDET1 0 +#define MOON_HPD_GND_MICDET2 1 +#define MOON_HPD_GND_MICDET3 2 +#define MOON_HPD_GND_MICDET4 3 + +#define MOON_HPD_OUT_OUT1L 0 +#define MOON_HPD_OUT_OUT1R 1 +#define MOON_HPD_OUT_OUT2L 2 +#define MOON_HPD_OUT_OUT2R 3 + +#define MOON_MICD1_SENSE_MICDET1 0 +#define MOON_MICD1_SENSE_MICDET2 1 +#define MOON_MICD1_SENSE_MICDET3 2 +#define MOON_MICD1_SENSE_MICDET4 3 + +#define MOON_MICD1_GND_MICDET1 0 +#define MOON_MICD1_GND_MICDET2 1 +#define MOON_MICD1_GND_MICDET3 2 +#define MOON_MICD1_GND_MICDET4 3 + +#define MOON_MICD_BIAS_SRC_MICBIAS1A 0x0 +#define MOON_MICD_BIAS_SRC_MICBIAS1B 0x1 +#define MOON_MICD_BIAS_SRC_MICBIAS1C 0x2 +#define MOON_MICD_BIAS_SRC_MICBIAS1D 0x3 +#define MOON_MICD_BIAS_SRC_MICBIAS2A 0x4 +#define MOON_MICD_BIAS_SRC_MICBIAS2B 0x5 +#define MOON_MICD_BIAS_SRC_MICBIAS2C 0x6 +#define MOON_MICD_BIAS_SRC_MICBIAS2D 0x7 +#define MOON_MICD_BIAS_SRC_MICVDD 0xF + struct arizona_hpdet_calibration_data { int min; int max; From 44ae5be2bae4ec5b4d49d7ead0ce9b7566da266d Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 30 Apr 2015 09:50:50 +0100 Subject: [PATCH 0913/1167] switch: arizona: Add accdet_ip field moon has a few different set of registers for accessory detection, the accdet_ip field will help to differentiate moon from other arizona chips Change-Id: I9bb6017d59d15172a65ea7883d96e05c4595fd0e Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index b4270504e2f..6db7ad98308 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -185,6 +185,7 @@ struct arizona_extcon_info { int button_impedance; int button_check; bool wait_for_mic; + int accdet_ip; }; static const struct arizona_micd_config micd_default_modes[] = { @@ -3425,6 +3426,24 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; } + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8280: + case WM8998: + case WM1814: + case WM8285: + case WM1840: + case WM1831: + case CS47L24: + info->accdet_ip = 0; + break; + default: + info->accdet_ip = 1; + break; + } + info->edev.name = "h2w"; ret = switch_dev_register(&info->edev); From b27ad15220be8f47d5d18abff26e758b86dad152 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 30 Apr 2015 09:58:40 +0100 Subject: [PATCH 0914/1167] switch: arizona: add pdata for sense and clamp pins moon can sense headphone impedance on number of pins, impd_pin indicates the pin which is connected in hardware to sense impedance. impd_pin can be [MICDET1, MICDET2, MICDET3, MICDET4, HPDET1, HPDET2, JD1, JD2]. Similarly moisture_pin is used to sense impedance for detecting moisture and it also can takes similar set of values as impd_pin. If the impedance is measured on one of the pins connected to outputs of the codec then we need to un-clamp that output, clamp_pin indicates the output pin which is connected in hardware and needs clamping. clamp_pin can be [OUT1L, OUT1R, OUT2L, OUT2R]. Example: (1) Lets say OUT1L of codec is connected to HPL and HPDET1 is also connected to HPL for sensing impedance so here [clamp_pin, impd_pin] = [OUT1L, HPDET1] (2) For detecting moisture lets say JD1 is connected to Gnd pin of 4 pole jack, then here [moisture_pin] = [JD1] Change-Id: I8bbcce2ac39ca959d76766218204a372594f1827 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 22 ++++++++++++++++++++++ include/linux/mfd/arizona/pdata.h | 23 +++++++++++++++++++++++ 2 files changed, 45 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 6db7ad98308..016f18fbcf7 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -2986,6 +2986,28 @@ static int arizona_extcon_of_get_pdata(struct arizona *arizona) if (pdata->hs_mic > ARIZONA_MAX_INPUT) pdata->hs_mic = 0; + pdata->hpd_l_pins.clamp_pin = MOON_HPD_OUT_OUT1L; + pdata->hpd_l_pins.impd_pin = MOON_HPD_SENSE_HPDET1; + of_property_read_u32_index(arizona->dev->of_node, + "wlf,hpd-left-pins", 0, + &(pdata->hpd_l_pins.clamp_pin)); + of_property_read_u32_index(arizona->dev->of_node, + "wlf,hpd-left-pins", 1, + &(pdata->hpd_l_pins.impd_pin)); + + pdata->hpd_r_pins.clamp_pin = MOON_HPD_OUT_OUT1R; + pdata->hpd_r_pins.impd_pin = MOON_HPD_SENSE_HPDET1; + of_property_read_u32_index(arizona->dev->of_node, + "wlf,hpd-right-pins", 0, + &(pdata->hpd_r_pins.clamp_pin)); + of_property_read_u32_index(arizona->dev->of_node, + "wlf,hpd-right-pins", 1, + &(pdata->hpd_r_pins.impd_pin)); + + pdata->moisture_pin = MOON_HPD_SENSE_JD2; + arizona_of_read_u32(arizona, "wlf,moisture-detect-pin", false, + &pdata->moisture_pin); + return 0; } #else diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 764b3f00bef..236574a43c8 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -95,6 +95,11 @@ struct arizona_micd_range { int key; /** Key to report to input layer */ }; +struct arizona_hpd_pins { + unsigned int clamp_pin; + unsigned int impd_pin; +}; + struct arizona_pdata { int reset; /** GPIO controlling /RESET, if any */ int ldoena; /** GPIO controlling LODENA, if any */ @@ -250,6 +255,24 @@ struct arizona_pdata { struct arizona_micd_config *micd_configs; int num_micd_configs; + /** + * [clamp_pin, impedance_measurement_pin] for HPL + * of 3.5mm Jack + */ + struct arizona_hpd_pins hpd_l_pins; + + /** + * [clamp_pin, impedance_measurement_pin] for HPR + * of 3.5mm Jack + */ + struct arizona_hpd_pins hpd_r_pins; + + /** + * impedance_measurement_pin for + * detecting moisture + */ + unsigned int moisture_pin; + /** Reference voltage for DMIC inputs */ int dmic_ref[ARIZONA_MAX_INPUT]; From 84e5920d427e96f2897e105efecd5dfbd83ccca2 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 30 Apr 2015 10:23:25 +0100 Subject: [PATCH 0915/1167] switch: arizona: change micbias widgets for moon Change-Id: Iac2aba572985d1bf9c4e2c7c61d960112a888344 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 016f18fbcf7..66d31dae3e8 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -478,6 +478,29 @@ static const char *arizona_extcon_get_micbias(struct arizona_extcon_info *info) default: return "MICVDD"; } + case CS47L90: + case CS47L91: + switch (info->micd_modes[0].bias) { + case 0: + return "MICBIAS1A"; + case 1: + return "MICBIAS1B"; + case 2: + return "MICBIAS1C"; + case 3: + return "MICBIAS1D"; + case 4: + return "MICBIAS2A"; + case 5: + return "MICBIAS2B"; + case 6: + return "MICBIAS2C"; + case 7: + return "MICBIAS2D"; + default: + return "MICVDD"; + } + break; default: switch (info->micd_modes[0].bias) { case 1: From 70fe51928ce6f5fad3d71b386cd8ea4e55186e3d Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 30 Apr 2015 10:31:58 +0100 Subject: [PATCH 0916/1167] switch: arizona: Handle mic impedance measurement for moon moon has a separate MICD_SENSE_SEL and MICD_GND_SEL fields to indicate the 2 pins between which impedance will be measured. These 2 pins can take one of these values [MICDET1, MICDET2, MICDET3, MICDET4]. This is unlike the previous arizona codecs which had a single ACC_DET_SRC fields to indicate either MICDET1 or MICDET2 so lets say if we select MICDET1 then the other pin (in this case MICDET2) was considerd as ground. Also for moon we need to explicitly set the hp_gnd to one of these values [MICDET1, MICDET2, MICDET3, MICDET4]. Since the driver has ground switching to support both LRGM and LRMG kind of headsets so the actual ground will only be known after measuring mic impedance so we delay the setting of hp_gnd till then. Change-Id: I60efac1cbb6d8911656b528458422cc8d18783f6 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 54 +++++++++++++++++++++++++++------ 1 file changed, 44 insertions(+), 10 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 66d31dae3e8..e40f680dd69 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -189,8 +189,15 @@ struct arizona_extcon_info { }; static const struct arizona_micd_config micd_default_modes[] = { - { ARIZONA_ACCDET_SRC, 1, 0 }, - { 0, 2, 1 }, + { ARIZONA_ACCDET_SRC, ARIZONA_ACCDET_SRC, 1, 0 }, + { 0, 0, 2, 1 }, +}; + +static const struct arizona_micd_config moon_micd_default_modes[] = { + { MOON_MICD1_SENSE_MICDET1, MOON_MICD1_SENSE_MICDET2, + MOON_MICD_BIAS_SRC_MICBIAS1A, 0 }, + { MOON_MICD1_SENSE_MICDET2, MOON_MICD1_SENSE_MICDET1, + MOON_MICD_BIAS_SRC_MICBIAS1B, 1 }, }; static struct arizona_micd_range micd_default_ranges[] = { @@ -450,12 +457,33 @@ static void arizona_extcon_set_mode(struct arizona_extcon_info *info, int mode) if (arizona->pdata.micd_pol_gpio > 0) gpio_set_value_cansleep(arizona->pdata.micd_pol_gpio, info->micd_modes[mode].gpio); - regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_BIAS_SRC_MASK, - info->micd_modes[mode].bias << - ARIZONA_MICD_BIAS_SRC_SHIFT); - regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, - ARIZONA_ACCDET_SRC, info->micd_modes[mode].src); + + if (info->accdet_ip == 1) { + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, + MOON_MICD_BIAS_SRC_MASK, + info->micd_modes[mode].bias << + MOON_MICD_BIAS_SRC_SHIFT); + regmap_update_bits(arizona->regmap, MOON_MIC_DETECT_0, + MOON_MICD1_SENSE_MASK, + info->micd_modes[mode].src << + MOON_MICD1_SENSE_SHIFT); + regmap_update_bits(arizona->regmap, MOON_MIC_DETECT_0, + MOON_MICD1_GND_MASK, + info->micd_modes[mode].gnd << + MOON_MICD1_GND_SHIFT); + regmap_update_bits(arizona->regmap, MOON_OUT1_CONFIG, + MOON_HP1_GND_SEL_MASK, + info->micd_modes[mode].gnd << + MOON_HP1_GND_SEL_SHIFT); + } else { + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_BIAS_SRC_MASK, + info->micd_modes[mode].bias << + ARIZONA_MICD_BIAS_SRC_SHIFT); + regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_SRC, info->micd_modes[mode].src); + } info->micd_mode = mode; @@ -3513,8 +3541,14 @@ static int arizona_extcon_probe(struct platform_device *pdev) info->micd_modes = pdata->micd_configs; info->micd_num_modes = pdata->num_micd_configs; } else { - info->micd_modes = micd_default_modes; - info->micd_num_modes = ARRAY_SIZE(micd_default_modes); + if (info->accdet_ip == 1) { + info->micd_modes = moon_micd_default_modes; + info->micd_num_modes = + ARRAY_SIZE(moon_micd_default_modes); + } else { + info->micd_modes = micd_default_modes; + info->micd_num_modes = ARRAY_SIZE(micd_default_modes); + } } switch (arizona->type) { From 4c83f239abd71ad00befc62e35c8076cf0bd01b4 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 30 Apr 2015 10:51:21 +0100 Subject: [PATCH 0917/1167] switch: arizona: add adc_mode support for moon ADC_MODE bit when set impedance will be measured in adc mode else impedance will be measured in discrete mode Change-Id: I3366ab7996753b16670fb46d7fd3471e9bbf9ef1 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 27 +++++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index e40f680dd69..56db0812979 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1443,6 +1443,7 @@ int arizona_micd_start(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; int ret; + unsigned int micd_mode; /* Microphone detection can't use idle mode */ pm_runtime_get_sync(info->dev); @@ -1479,8 +1480,20 @@ int arizona_micd_start(struct arizona_extcon_info *info) mutex_unlock(&arizona->reg_setting_lock); } - regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, - ARIZONA_ACCDET_MODE_MASK, info->state->mode); + if (info->accdet_ip == 1) { + if (info->state->mode == ARIZONA_ACCDET_MODE_ADC) + micd_mode = MOON_MICD1_ADC_MODE_MASK; + else + micd_mode = 0; + + regmap_update_bits(arizona->regmap, MOON_MIC_DETECT_0, + MOON_MICD1_ADC_MODE_MASK, micd_mode); + } else { + regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_MODE_MASK, info->state->mode); + } + arizona_extcon_pulse_micbias(info); @@ -1521,10 +1534,12 @@ void arizona_micd_stop(struct arizona_extcon_info *info) mutex_unlock(&arizona->reg_setting_lock); } - /* Reset to default mode */ - regmap_update_bits(arizona->regmap, - ARIZONA_ACCESSORY_DETECT_MODE_1, - ARIZONA_ACCDET_MODE_MASK, 0); + if (info->accdet_ip != 1) { + /* Reset to default mode */ + regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_MODE_MASK, 0); + } regulator_disable(info->micvdd); From f8295ab682921dfb69c4555f3240feb2ce89be9d Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 30 Apr 2015 11:08:20 +0100 Subject: [PATCH 0918/1167] switch: arizona: handle hp impedance measurement for moon For moon we need to specify the sense and ground pins for headphone impedance measurement. We also need to specify the output which will be clamped when measuring the impedance. This is unlike previous arizona codecs where we just specified the acc_det_mode as HPDETL or HPDETR and clamping/unclamping was also automatic when impedance measurement is activated. Change-Id: I4465f0e1a23a1a6a4a2c1256c03ce1372eae317d Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 145 +++++++++++++++++++++++++++----- 1 file changed, 123 insertions(+), 22 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 56db0812979..e4cdfb6594a 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -745,9 +745,10 @@ static int arizona_hpdet_d_calibrate(const struct arizona_extcon_info *info, static int arizona_hpdet_read(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; - unsigned int val, range; + unsigned int val, range, sense_pin; int ret; unsigned int val_down; + bool is_jdx_micdetx_pin = false; ret = regmap_read(arizona->regmap, ARIZONA_HEADPHONE_DETECT_2, &val); if (ret != 0) { @@ -756,6 +757,21 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) return ret; } + if (info->accdet_ip == 1) { + regmap_read(arizona->regmap, MOON_HEADPHONE_DETECT_0, + &sense_pin); + sense_pin = (sense_pin & MOON_HPD_SENSE_SEL_MASK) + >> MOON_HPD_SENSE_SEL_SHIFT; + switch (sense_pin) { + case MOON_HPD_SENSE_HPDET1: + case MOON_HPD_SENSE_HPDET2: + is_jdx_micdetx_pin = false; + break; + default: + is_jdx_micdetx_pin = true;; + } + } + switch (info->hpdet_ip_version) { case 0: if (!(val & ARIZONA_HP_DONE)) { @@ -829,6 +845,9 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) /* Convert to ohms, the value is in 0.5 ohm increments */ val /= 2; + if (is_jdx_micdetx_pin) + goto exit; + regmap_read(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, &range); range = (range & ARIZONA_HP_IMPEDANCE_RANGE_MASK) @@ -867,6 +886,9 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) val &= ARIZONA_HP_LVL_B_MASK; val /= 2; + if (is_jdx_micdetx_pin) + goto exit; + regmap_read(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, &range); range = (range & ARIZONA_HP_IMPEDANCE_RANGE_MASK) >> @@ -931,9 +953,8 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) } } +exit: dev_dbg(arizona->dev, "HP impedance %d ohms\n", val); - - return val; } @@ -1232,6 +1253,7 @@ int arizona_hpdet_start(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; int ret; + unsigned int hpd_sense, hpd_clamp, val, hpd_gnd; dev_dbg(arizona->dev, "Starting HPDET\n"); @@ -1248,16 +1270,45 @@ int arizona_hpdet_start(struct arizona_extcon_info *info) /* Make sure we keep the device enabled during the measurement */ pm_runtime_get_sync(info->dev); - arizona_extcon_hp_clamp(info, true); + if (info->accdet_ip == 1) { + if (info->state->mode == ARIZONA_ACCDET_MODE_HPL) { + hpd_clamp = arizona->pdata.hpd_l_pins.clamp_pin; + hpd_sense = arizona->pdata.hpd_l_pins.impd_pin; + } else { + hpd_clamp = arizona->pdata.hpd_r_pins.clamp_pin; + hpd_sense = arizona->pdata.hpd_r_pins.impd_pin; + } - ret = regmap_update_bits(arizona->regmap, - ARIZONA_ACCESSORY_DETECT_MODE_1, - ARIZONA_ACCDET_MODE_MASK, - info->state->mode); - if (ret != 0) { - dev_err(arizona->dev, "Failed to set HPDET mode (%d): %d\n", - info->state->mode, ret); - goto err; + hpd_gnd = info->micd_modes[info->micd_mode].gnd; + + val = (hpd_sense << MOON_HPD_SENSE_SEL_SHIFT) | + (hpd_clamp << MOON_HPD_OUT_SEL_SHIFT) | + (hpd_sense << MOON_HPD_FRC_SEL_SHIFT) | + (hpd_gnd << MOON_HPD_GND_SEL_SHIFT); + ret = regmap_update_bits(arizona->regmap, + MOON_HEADPHONE_DETECT_0, + MOON_HPD_GND_SEL_MASK | + MOON_HPD_SENSE_SEL_MASK | + MOON_HPD_FRC_SEL_MASK | + MOON_HPD_OUT_SEL_MASK, + val); + if (ret != 0) { + dev_err(arizona->dev, "Failed to set HPDET sense: %d\n", + ret); + goto err; + } + arizona_extcon_hp_clamp(info, true); + } else { + arizona_extcon_hp_clamp(info, true); + ret = regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_MODE_MASK, + info->state->mode); + if (ret != 0) { + dev_err(arizona->dev, "Failed to set HPDET mode (%d): %d\n", + info->state->mode, ret); + goto err; + } } ret = regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, @@ -1306,10 +1357,12 @@ void arizona_hpdet_stop(struct arizona_extcon_info *info) ARIZONA_HP_IMPEDANCE_RANGE_MASK | ARIZONA_HP_POLL, 0); - /* Reset to default mode */ - regmap_update_bits(arizona->regmap, - ARIZONA_ACCESSORY_DETECT_MODE_1, - ARIZONA_ACCDET_MODE_MASK, 0); + if (info->accdet_ip != 1) { + /* Reset to default mode */ + regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_MODE_MASK, 0); + } arizona_extcon_hp_clamp(info, false); @@ -1321,7 +1374,8 @@ EXPORT_SYMBOL_GPL(arizona_hpdet_stop); static int arizona_hpdet_moisture_start(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; - int ret; + int ret = 0; + unsigned int hpd_sense, hpd_gnd, val; switch (arizona->type) { case WM5102: @@ -1348,10 +1402,45 @@ static int arizona_hpdet_moisture_start(struct arizona_extcon_info *info) break; } - ret = arizona_hpdet_start(info); + if (info->accdet_ip == 1) { + /* Make sure we keep the device enabled + during the measurement */ + pm_runtime_get_sync(info->dev); - arizona_extcon_hp_clamp(info, false); + hpd_sense = arizona->pdata.moisture_pin; + hpd_gnd = info->micd_modes[info->micd_mode].gnd; + + val = (hpd_sense << MOON_HPD_SENSE_SEL_SHIFT) | + (hpd_sense << MOON_HPD_FRC_SEL_SHIFT) | + (hpd_gnd << MOON_HPD_GND_SEL_SHIFT); + ret = regmap_update_bits(arizona->regmap, + MOON_HEADPHONE_DETECT_0, + MOON_HPD_GND_SEL_MASK | + MOON_HPD_SENSE_SEL_MASK | + MOON_HPD_FRC_SEL_MASK, + val); + if (ret != 0) { + dev_err(arizona->dev, "Failed to set HPDET sense: %d\n", + ret); + goto err; + } + + ret = regmap_update_bits(arizona->regmap, + ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_POLL, ARIZONA_HP_POLL); + if (ret != 0) { + dev_err(arizona->dev, "Can't start HPDET measurement: %d\n", + ret); + goto err; + } + } else { + ret = arizona_hpdet_start(info); + arizona_extcon_hp_clamp(info, false); + } + return ret; +err: + pm_runtime_put_autosuspend(info->dev); return ret; } @@ -1359,7 +1448,18 @@ static void arizona_hpdet_moisture_stop(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; - arizona_hpdet_stop(info); + if (info->accdet_ip == 1) { + /* Reset back to starting range */ + regmap_update_bits(arizona->regmap, + ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_IMPEDANCE_RANGE_MASK | + ARIZONA_HP_POLL, 0); + + pm_runtime_mark_last_busy(info->dev); + pm_runtime_put_autosuspend(info->dev); + } else { + arizona_hpdet_stop(info); + } switch (arizona->type) { case WM5102: @@ -2240,7 +2340,6 @@ static int arizona_hpdet_acc_id_reading(struct arizona_extcon_info *info, ARIZONA_ACCDET_MODE_MASK, info->micd_modes[0].src | ARIZONA_ACCDET_MODE_HPR); - gpio_set_value_cansleep(id_gpio, 1); return -EAGAIN; @@ -2291,6 +2390,9 @@ static int arizona_hpdet_acc_id_start(struct arizona_extcon_info *info) int hp_reading = 32; int ret; + if (info->accdet_ip == 1) + return -EINVAL; + dev_dbg(arizona->dev, "Starting identification via HPDET\n"); /* Make sure we keep the device enabled during the measurement */ @@ -2332,7 +2434,6 @@ static int arizona_hpdet_acc_id_start(struct arizona_extcon_info *info) arizona_extcon_hp_clamp(info, false); pm_runtime_put_autosuspend(info->dev); - /* Just report headphone */ arizona_extcon_report(info, BIT_HEADSET_NO_MIC); From 4de61682161dc91638914ff508177aa5fc229306 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 30 Apr 2015 10:43:37 +0100 Subject: [PATCH 0919/1167] switch: arizona: Add output clamping/unclamping for moon moon unlike previous arizona codecs cannot unclamp more than one output simultaneously. There is a single register wherin we must select the source [OUT1L, OUT1R, OUT2L, OUT2R] to unclamp and then set the HPD_OVD_ENA bit to unclamp the output. Change-Id: I2d2bbb1bda7abdd6c815749f8bcb9e9ff785b951 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 39 +++++++++++++++++++++++---------- 1 file changed, 28 insertions(+), 11 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index e4cdfb6594a..74c27ed4d81 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -391,6 +391,14 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, edre_val = 0; } break; + case CS47L90: + case CS47L91: + mask = MOON_HPD_OVD_ENA_SEL_MASK; + if (clamp) + val = MOON_HPD_OVD_ENA_SEL_MASK; + else + val = 0; + break; default: mask = 0; break; @@ -419,17 +427,26 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, } if (mask) { - ret = regmap_update_bits(arizona->regmap, ARIZONA_HP_CTRL_1L, - mask, val); - if (ret != 0) - dev_warn(arizona->dev, "Failed to do clamp: %d\n", - ret); - - ret = regmap_update_bits(arizona->regmap, ARIZONA_HP_CTRL_1R, - mask, val); - if (ret != 0) - dev_warn(arizona->dev, "Failed to do clamp: %d\n", - ret); + if (info->accdet_ip == 1) { + ret = regmap_update_bits(arizona->regmap, + MOON_HEADPHONE_DETECT_0, + MOON_HPD_OVD_ENA_SEL_MASK, + val); + if (ret != 0) + dev_warn(arizona->dev, "Failed to do clamp: %d\n", + ret); + } else { + ret = regmap_update_bits(arizona->regmap, + ARIZONA_HP_CTRL_1L, mask, val); + if (ret != 0) + dev_warn(arizona->dev, "Failed to do clamp: %d\n", + ret); + ret = regmap_update_bits(arizona->regmap, + ARIZONA_HP_CTRL_1R, mask, val); + if (ret != 0) + dev_warn(arizona->dev, "Failed to do clamp: %d\n", + ret); + } } /* Restore the desired state while not doing the clamp */ From 0b68329dc5b357222054e932e51304ca17229a95 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 28 May 2015 11:58:01 +0100 Subject: [PATCH 0920/1167] switch: arizona: add patch to tune charge pump this patch configures the signal levels at which charge pump will switch to next settings, there are different patches based on hp impedance level. Change-Id: I61534140bbd42cf714e2210b47aaa93e1acfead1 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 75 +++++++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 74c27ed4d81..47324ddb7ce 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -66,12 +66,16 @@ #define HP_NORMAL_IMPEDANCE 0 #define HP_LOW_IMPEDANCE 1 +#define HP_HIGH_IMPEDANCE 2 #define HP_LOW_IMPEDANCE_LIMIT 13 #define ARIZONA_MIC_MUTE 1 #define ARIZONA_MIC_UNMUTE 0 +#define MOON_HP_LOW_IMPEDANCE_LIMIT 11 +#define MOON_HP_MEDIUM_IMPEDANCE_LIMIT 23 + #define MOON_HPD_SENSE_MICDET1 0 #define MOON_HPD_SENSE_MICDET2 1 #define MOON_HPD_SENSE_MICDET3 2 @@ -1077,6 +1081,24 @@ static const struct reg_default clearwater_normal_impedance_patch[] = { { 0x483, 0x0023 }, }; +static const struct reg_default moon_low_impedance_patch[] = { + { 0x465, 0x5AD5 }, + { 0x469, 0x3950 }, + { 0x46D, 0x203A }, +}; + +static const struct reg_default moon_normal_impedance_patch[] = { + { 0x465, 0x804E }, + { 0x469, 0x50F4 }, + { 0x46D, 0x2D86 }, +}; + +static const struct reg_default moon_high_impedance_patch[] = { + { 0x465, 0x987D }, + { 0x469, 0x65EA }, + { 0x46D, 0x404E }, +}; + static void arizona_hs_mic_control(struct arizona *arizona, int state) { unsigned int addr = ARIZONA_ADC_DIGITAL_VOLUME_1L; @@ -1240,6 +1262,55 @@ static int arizona_clearwater_tune_headphone(struct arizona_extcon_info *info, return 0; } +static int arizona_moon_tune_headphone(struct arizona_extcon_info *info, + int reading) +{ + struct arizona *arizona = info->arizona; + const struct reg_default *patch; + int i, ret, size; + + if (reading <= arizona->pdata.hpdet_short_circuit_imp) { + /* Headphones are always off here so just mark them */ + dev_warn(arizona->dev, "Possible HP short, disabling\n"); + return 0; + } else if (reading <= MOON_HP_LOW_IMPEDANCE_LIMIT) { + if (info->hp_imp_level == HP_LOW_IMPEDANCE) + return 0; + + info->hp_imp_level = HP_LOW_IMPEDANCE; + + patch = moon_low_impedance_patch; + size = ARRAY_SIZE(moon_low_impedance_patch); + } else if (reading <= MOON_HP_MEDIUM_IMPEDANCE_LIMIT) { + if (info->hp_imp_level == HP_NORMAL_IMPEDANCE) + return 0; + + info->hp_imp_level = HP_NORMAL_IMPEDANCE; + + patch = moon_normal_impedance_patch; + size = ARRAY_SIZE(moon_normal_impedance_patch); + } else { + if (info->hp_imp_level == HP_HIGH_IMPEDANCE) + return 0; + + info->hp_imp_level = HP_HIGH_IMPEDANCE; + + patch = moon_high_impedance_patch; + size = ARRAY_SIZE(moon_high_impedance_patch); + } + + for (i = 0; i < size; ++i) { + ret = regmap_write(arizona->regmap, + patch[i].reg, patch[i].def); + if (ret != 0) + dev_warn(arizona->dev, + "Failed to write headphone patch: %x <= %x\n", + patch[i].reg, patch[i].def); + } + + return 0; +} + void arizona_set_headphone_imp(struct arizona_extcon_info *info, int imp) { struct arizona *arizona = info->arizona; @@ -1260,6 +1331,10 @@ void arizona_set_headphone_imp(struct arizona_extcon_info *info, int imp) case WM1840: arizona_clearwater_tune_headphone(info, arizona->hp_impedance); break; + case CS47L90: + case CS47L91: + arizona_moon_tune_headphone(info, arizona->hp_impedance); + break; default: break; } From 668ad92454b94289227e13cdc1f72ebb40150690 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 19 May 2015 14:39:40 +0100 Subject: [PATCH 0921/1167] switch: arizona: enable root micbias for measuring impedance for moon the root micbias must be enabled when measuring impedance, the enabling and disabling of the actual micbias will be done automatically in a pulsating manner by the mic detection state machine internal to the chip. Change-Id: I06540b296f437e15e5918996a1f9738557436109 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 96 +++++++++++++++++++++++++++++++++ 1 file changed, 96 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 47324ddb7ce..3549170b723 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -132,6 +132,11 @@ struct arizona_hpdet_d_trims { int grad_x4; }; +struct arizona_micd_bias { + unsigned int bias; + bool enabled; +}; + struct arizona_extcon_info { struct device *dev; struct arizona *arizona; @@ -190,6 +195,8 @@ struct arizona_extcon_info { int button_check; bool wait_for_mic; int accdet_ip; + + struct arizona_micd_bias micd_bias; }; static const struct arizona_micd_config micd_default_modes[] = { @@ -469,6 +476,87 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, mutex_unlock(&arizona->dapm->card->dapm_mutex); } +static const char *arizona_extcon_get_micbias_src( + struct arizona_extcon_info *info, unsigned int bias) +{ + struct arizona *arizona = info->arizona; + + switch (arizona->type) { + case CS47L90: + case CS47L91: + switch (bias) { + case 0: + case 1: + case 2: + case 3: + return "MICBIAS1"; + case 4: + case 5: + case 6: + case 7: + return "MICBIAS2"; + default: + return "MICVDD"; + } + break; + default: + return NULL; + } +} + +static int arizona_extcon_set_micd_bias(struct arizona_extcon_info *info, + unsigned int bias, bool enable) +{ + struct arizona *arizona = info->arizona; + struct snd_soc_dapm_context *dapm = arizona->dapm; + struct arizona_micd_bias *micd_bias = &(info->micd_bias); + const char *old_widget = + arizona_extcon_get_micbias_src(info, micd_bias->bias); + const char *new_widget = arizona_extcon_get_micbias_src(info, bias); + bool same_bias_src; + int ret = 0; + + switch (arizona->type) { + case CS47L90: + case CS47L91: + break; + default: + return 0; + }; + + micd_bias->bias = bias; + same_bias_src = !strcmp(old_widget, new_widget); + + if ((same_bias_src) && + (micd_bias->enabled == enable)) + return 0; + + if (micd_bias->enabled) { + mutex_lock(&dapm->card->dapm_mutex); + ret = snd_soc_dapm_disable_pin(dapm, old_widget); + if (ret != 0) + dev_warn(arizona->dev, + "Failed to disable %s: %d\n", + old_widget, ret); + mutex_unlock(&dapm->card->dapm_mutex); + snd_soc_dapm_sync(dapm); + } + + if (enable) { + mutex_lock(&dapm->card->dapm_mutex); + ret = snd_soc_dapm_force_enable_pin(dapm, new_widget); + if (ret != 0) + dev_warn(arizona->dev, "Failed to enable %s: %d\n", + new_widget, ret); + mutex_unlock(&dapm->card->dapm_mutex); + snd_soc_dapm_sync(dapm); + } + + micd_bias->enabled = enable; + + return ret; +} + static void arizona_extcon_set_mode(struct arizona_extcon_info *info, int mode) { struct arizona *arizona = info->arizona; @@ -508,6 +596,9 @@ static void arizona_extcon_set_mode(struct arizona_extcon_info *info, int mode) info->micd_mode = mode; + arizona_extcon_set_micd_bias(info, info->micd_modes[mode].bias, + info->micd_bias.enabled); + dev_dbg(arizona->dev, "Set jack polarity to %d\n", mode); } @@ -1686,6 +1777,8 @@ int arizona_micd_start(struct arizona_extcon_info *info) ARIZONA_ACCDET_MODE_MASK, info->state->mode); } + arizona_extcon_set_micd_bias(info, + info->micd_modes[info->micd_mode].bias, true); arizona_extcon_pulse_micbias(info); @@ -1718,6 +1811,9 @@ void arizona_micd_stop(struct arizona_extcon_info *info) snd_soc_dapm_sync(dapm); + arizona_extcon_set_micd_bias(info, + info->micd_modes[info->micd_mode].bias, false); + if (info->micd_reva) { mutex_lock(&arizona->reg_setting_lock); regmap_write(arizona->regmap, 0x80, 0x3); From a51dd2a2369cd539b87a4375e6995e35e0fc7228 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Fri, 12 Jun 2015 11:02:31 +0100 Subject: [PATCH 0922/1167] documentation: mfd: arizona: update for moon - add documentation for moon specific entries like wlf,hpd-left-pins, wlf,hpd-right-pins, wlf,moisture-detect-pin and wlf,dmic-clksrc - update documentation for wlf,micbiasx to reflect support of children micbiases in moon - update documentation for wlf,micd-configs which for moon will have an additional entry for accessory detect ground select - add few missing entries which are not specific to moon but apply to all arizona codecs but were missing like wlf,hpdet-moisture-imp, wlf,hpdet-moisture-debounce etc - re-arrange some entries so that all entries related to switch driver are placed together Change-Id: I74a3e17d6d8911abc30448b0670ce8c5ff2b36ee Signed-off-by: Nikesh Oswal --- .../devicetree/bindings/mfd/arizona.txt | 144 ++++++++++++------ 1 file changed, 97 insertions(+), 47 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 2c5bb36fd16..890efa2282e 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -18,6 +18,8 @@ Required properties: "wlf,wm1831" "cirrus,cs47l24" "cirrus,cs47l85" + "cirrus,cs47l90" + "cirrus,cs47l91" - reg : I2C slave address when connected using I2C, chip select number when using SPI. @@ -49,10 +51,10 @@ Optional properties: - wlf,clk32k-src : set input source for codec 32kHz clock. 0 = default, 1 = MCLK1, 2 = MCLK2, 3 = None - - wlf,micd-software-compare : Use a software comparison to determine mic - presence - wlf,micd-detect-debounce : Additional software microphone detection debounce specified in milliseconds + - wlf,micd-manual-debounce : Additional software button detection + debounce specified as a number - wlf,micd-pol-gpio : GPIO specifier for the GPIO controlling the headset polarity if one exists - wlf,micd-bias-start-time : Time allowed for MICBIAS to startup prior to @@ -65,51 +67,95 @@ Optional properties: - wlf,micd-timeout : Timeout for microphone detection, specified in milliseconds - wlf,micd-force-micbias : Force MICBIAS continuously on during microphone - detection + detection and button detection + - wlf,micd-force-micbias-initial : Force MICBIAS continuously on during + microphone detection + - wlf,micd-software-compare : Use a software comparison to determine mic + presence + - wlf,use-jd-gpio : Use GPIO input alongwith JD1 for dual jack detection. For + later arizona chips which have JD1 and JD2, setting this property will use + both JD1 and JD2 for dual jack detect and does not require an additional + GPIO + - wlf,usr-jd-gpio-nopull : Internal pull on GPIO is disabled when used for + jack detection. + - wlf,gpsw : Settings for the general purpose switch, set as per the + SW1_MODE bits in the GP Switch 1 register + - wlf,init-mic-delay : Adds a delay in milliseconds between jack detection + and beginning ramp of MICBIAS. + - wlf,fixed-hpdet-imp : Do not perform any headphone detection, just use + the fixed value specified here as the headphone impedance. + - wlf,hpdet-moisture-imp : This value specifies the threshold impedance in + ohms above which it will be considered a false detection due to moisture, + a valid headphone impedance measurement must be less than this threshold + - wlf,hpdet-moisture-debounce: Software debounces for moisture detect, if + moisture is detected this many number of times then it would be decalred + as moisture without any furthur retries + - wlf,hpdet-short-circuit-imp : Specifies the maximum impedance in ohms + that will be considered as a short circuit + - wlf,hpdet-channel : When this property is set then right channel is used + for headphone impedance measurement else the left headphone channel is + used + - wlf,moisture-det-channel : When this property is set then right channel + is used for moisture detect else the left headphone channel is used. + This property is used only for arizona chips which do not belong to + moon (cs47l90, cs47l91) class of arizona codecs + - wlf,micd-clamp-mode : Specifies the logic of the micdetect clamp block + - wlf,hpd-left-pins : This field is only for moon (cs47l90, cs47l91) class + of arizona codecs. It is a 2 cell long field where the first cell + represents the pin that needs to be unclamped when measuring headphone + left channel impedance as per the HPD_OUT_SEL field of HEADPHONE_DETECT_0 + register and the second pin represents the impedance sense pin as per the + HPD_SENSE_SEL field of HEADPHONE_DETECT_0 register + - wlf,hpd-right-pins : See wlf,hpd-left-pins which is for left headphone + channel and this field is similar but for right headphone channel + - wlf,moisture-detect-pin : This field is only for moon (cs47l90, cs47l91) + class of arizona codecs. It specifies the impedance sense pin that is used + for moisture detect as per HPD_SENSE_SEL field of HEADPHONE_DETECT_0 + register - wlf,micd-ranges : Microphone detection level and key configuration, this field can be of variable length but should always be a multiple of 2 cells long, each two cell group represents one button configuration The first cell is the maximum impedance for this button in ohms The second cell the key that should be reported to the input layer - wlf,micd-configs : Headset polarity configurations, the field can be of - variable length but should always be a multiple of 3 cells long, each two - cell group represents one polarity configration - The first cell is the accessory detection source as per the ACCDET_SRC bits - in the ACCESSORY_DETECT_MODE_1 register - The second cell represents the MICBIAS to be used as per the MICD_BIAS_SRC - bits in the MIC_DETECT_1 register - The third cell represents the value of the micd-pol-gpio pin, a non-zero - value indicates this should be on - - wlf,init-mic-delay : Adds a delay in milliseconds between jack detection - and beginning ramp of MICBIAS. - - wlf,micd-clamp-mode: Specifies the logic of the micdetect clamp block - - wlf,hs-mic: Specify an input to mute during headset button presses and - jack removal: 1 - IN1L, 2 - IN1R, ..., n - IN[n]R - - - wlf,micbias1 : Configuration for the micbias regulator, should include 5 - cells. + variable length. But is should always be a multiple of 4 cells long for Moon + class (cs47l90, cs47l91) of Arizona chips and should always be a multiple + of 3 cells long for other Arizona chips, each two cell group represents one + polarity configration + For Moon class (cs47l90, cs47l91) of Arizona chips the first cell is the + accessory detection source as per the MICD_SENSE_SEL field of + MIC_DETECT_1_CONTROL_0 regiser and for other Arizona chips its the accessory + detection source as per the ACCDET_SRC bits in the ACCESSORY_DETECT_MODE_1 register + For Moon class (cs47l90, cs47l91) of Arizona chips the second cell is the accessory + detection ground as per the MICD_GND_SEL field of MIC_DETECT_1_CONTROL_0 regiser + and for other Arizona chips the second cell represents the MICBIAS to be used as + per the MICD_BIAS_SRC bits in the MIC_DETECT_1 register + For Moon class (cs47l90, cs47l91) of Arizona chips the third cell represents + the MICBIAS to be used as per the MICD_BIAS_SRC bits in the MIC_DETECT_1_CONTROL_1 + register and for other Arizona chips the third cell represents the value of the + micd-pol-gpio pin, a non-zero value indicates this should be on + For Moon class (cs47l90, cs47l91) of Arizona chips the fourth cell represents + the value of the micd-pol-gpio pin, a non-zero value indicates this should be on + and for other Arizona chips there are only three cells and fourth cell should + not be specified + - wlf,micbias1 : Configuration for the micbias regulator, number of cells + here will depend on the arizona chip and will be 4 + n (number of + children micbiases). For Marley (cs47l35) n is 2, for Moon + (cs47l90, cs47l91) n is 4 and for other arizona chips n is 1. The first cell is the output voltage in millivolts The second cell a non-zero value indicates an external capacitor is fitted - The third cell a non-zero value indicates the micbias should be actively - discharged - The four cell a non-zero value indicates that the micbias should be + Starting from third cell the next n cells with a non-zero value indicates + the micbias (or children micbiases if n > 1) should be actively discharged + In the (3 + n)'th cell a non-zero value indicates that the micbias should be brought up slowly to reduce pops - The fifth cell a non-zero value indicates the micbias should be bypassed + In the (4 + n)'th cell a non-zero value indicates the micbias should be bypassed and simply output MICVDD - wlf,micbias2 : See wlf,micbias1 - wlf,micbias3 : See wlf,micbias1 - wlf,micbias4 : See wlf,micbias1 - - wlf,gpio-defaults : A list of GPIO configuration register values. Defines - for the appropriate values can found in . If - absent, no configuration of these registers is performed. If any entry has - a value that is out of range for a 16 bit register then the chip default - will be used. - - - wlf,max-channels-clocked : The maximum number of channels to be clocked on - each AIF, useful for I2S systems with multiple data lines being mastered. - Specify one cell for each AIF, specify zero for AIFs that should be handled - normally. + - wlf,hs-mic: Specify an input to mute during headset button presses and + jack removal: 1 - IN1L, 2 - IN1R, ..., n - IN[n]R - wlf,dmic-ref : DMIC reference for each input, must contain four cells if specified. 0 indicates MICVDD and is the default, 1,2,3 indicate the @@ -120,25 +166,29 @@ Optional properties: indicates a digital microphone. For most codecs the entries map to wm8998: entries are for - cs47l85, wm8285: entries are for + cs47l85, wm8285, cs47l90, cs47l91: entries are for - - wlf,out-mono : Mono bit for each output, must contain six cells if - specified. A non-zero value indicates the corresponding output is mono. + - wlf,dmic-clksrc : DMIC clock source for each input. This field is only for + moon class of arizona codecs (cs47l90, cs47l91) and a value of 0 will source + DMIC from internally generated clock within the ADC subsystem and a value of + 1 will source DMIC and External digital speakers with same clock - - wlf,use-jd-gpio : Use GPIO input for jack detection. - - wlf,usr-jd-gpio-nopull : Internal pull on GPIO is disabled when used for - jack detection. - - - wlf,gpsw : Settings for the general purpose switch, set as per the - SW1_MODE bits in the GP Switch 1 register + - wlf,gpio-defaults : A list of GPIO configuration register values. Defines + for the appropriate values can found in . If + absent, no configuration of these registers is performed. If any entry has + a value that is out of range for a 16 bit register then the chip default + will be used. - wlf,wm5102t-output-pwr : Output power setting (WM5102T only) + - wlf,max-channels-clocked : The maximum number of channels to be clocked on + each AIF, useful for I2S systems with multiple data lines being mastered. + Specify one cell for each AIF, specify zero for AIFs that should be handled + normally. - - wlf,fixed-hpdet-imp : Do not perform any headphone detection, just use - the fixed value specified here as the headphone impedance. + - wlf,out-mono : Mono bit for each output, must contain six cells if + specified. A non-zero value indicates the corresponding output is mono. - - wlf,hpdet-short-circuit-imp : Specifies the maximum impedance in ohms - that will be considered as a short circuit + - wlf,wm5102t-output-pwr : Output power setting (WM5102T only) - DCVDD-supply, MICVDD-supply : Power supplies, only need to be specified if they are being externally supplied. As covered in From 835bab63aad7b3602a0718a0e3af44db910aee96 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 21 Jul 2015 14:56:28 +0100 Subject: [PATCH 0923/1167] switch: arizona: Don't treat older codecs as default IP version Add specific IP version cases for the WM8997, WM8998 and WM1814 instead of using the default case. This allows the default to be for latest silicon IP. Change-Id: I115c9bc99f877dd2be49d5da7663c10eebb4ff7f Signed-off-by: Richard Fitzgerald Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 3549170b723..1a89a8f3130 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -3767,6 +3767,10 @@ static int arizona_extcon_probe(struct platform_device *pdev) arizona->extcon_info = info; switch (arizona->type) { + case WM8997: + info->micd_clamp = true; + info->hpdet_ip_version = 1; + break; case WM5102: switch (arizona->rev) { case 0: @@ -3778,6 +3782,11 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; } break; + case WM8998: + case WM1814: + info->micd_clamp = true; + info->hpdet_ip_version = 2; + break; case WM8280: case WM5110: switch (arizona->rev) { From 5f9db75259a791e238417d2cb908e15749507227 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 21 Jul 2015 14:58:43 +0100 Subject: [PATCH 0924/1167] switch: arizona: set accdet_ip with other IP setup cases Set the accdet_ip version in the switch that sets all other ip version info instead of using a separate switch. Change-Id: I2c657b2a9ee64f5d8934f6b8e5df925567dd10d6 Signed-off-by: Richard Fitzgerald Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 17 ----------------- 1 file changed, 17 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 1a89a8f3130..7e4521f984e 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -3809,23 +3809,6 @@ static int arizona_extcon_probe(struct platform_device *pdev) default: info->micd_clamp = true; info->hpdet_ip_version = 2; - break; - } - - switch (arizona->type) { - case WM5102: - case WM5110: - case WM8997: - case WM8280: - case WM8998: - case WM1814: - case WM8285: - case WM1840: - case WM1831: - case CS47L24: - info->accdet_ip = 0; - break; - default: info->accdet_ip = 1; break; } From d7a166f330c14944c1b31daeaf3746f2ddfbbfab Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 21 Jul 2015 15:05:26 +0100 Subject: [PATCH 0925/1167] switch: arizona: Make new accdet IP the default case Make the older accdet IP version the special case and newer IP the default case so that future silicon will automatically be handled as the default. Change-Id: I6c43b9a4620331742f820f020a3383864a5e429a Signed-off-by: Richard Fitzgerald Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 133 ++++++++++++++++++++------------ 1 file changed, 85 insertions(+), 48 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 7e4521f984e..be9c14e4f45 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -438,25 +438,28 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, } if (mask) { - if (info->accdet_ip == 1) { + switch (info->accdet_ip) { + case 0: ret = regmap_update_bits(arizona->regmap, - MOON_HEADPHONE_DETECT_0, - MOON_HPD_OVD_ENA_SEL_MASK, - val); + ARIZONA_HP_CTRL_1L, mask, val); if (ret != 0) dev_warn(arizona->dev, "Failed to do clamp: %d\n", ret); - } else { ret = regmap_update_bits(arizona->regmap, - ARIZONA_HP_CTRL_1L, mask, val); + ARIZONA_HP_CTRL_1R, mask, val); if (ret != 0) dev_warn(arizona->dev, "Failed to do clamp: %d\n", ret); + break; + default: ret = regmap_update_bits(arizona->regmap, - ARIZONA_HP_CTRL_1R, mask, val); + MOON_HEADPHONE_DETECT_0, + MOON_HPD_OVD_ENA_SEL_MASK, + val); if (ret != 0) dev_warn(arizona->dev, "Failed to do clamp: %d\n", ret); + break; } } @@ -567,7 +570,17 @@ static void arizona_extcon_set_mode(struct arizona_extcon_info *info, int mode) gpio_set_value_cansleep(arizona->pdata.micd_pol_gpio, info->micd_modes[mode].gpio); - if (info->accdet_ip == 1) { + switch (info->accdet_ip) { + case 0: + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_BIAS_SRC_MASK, + info->micd_modes[mode].bias << + ARIZONA_MICD_BIAS_SRC_SHIFT); + regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_SRC, info->micd_modes[mode].src); + break; + default: regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, MOON_MICD_BIAS_SRC_MASK, info->micd_modes[mode].bias << @@ -584,14 +597,7 @@ static void arizona_extcon_set_mode(struct arizona_extcon_info *info, int mode) MOON_HP1_GND_SEL_MASK, info->micd_modes[mode].gnd << MOON_HP1_GND_SEL_SHIFT); - } else { - regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, - ARIZONA_MICD_BIAS_SRC_MASK, - info->micd_modes[mode].bias << - ARIZONA_MICD_BIAS_SRC_SHIFT); - regmap_update_bits(arizona->regmap, - ARIZONA_ACCESSORY_DETECT_MODE_1, - ARIZONA_ACCDET_SRC, info->micd_modes[mode].src); + break; } info->micd_mode = mode; @@ -869,7 +875,10 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) return ret; } - if (info->accdet_ip == 1) { + switch (info->accdet_ip) { + case 0: + break; + default: regmap_read(arizona->regmap, MOON_HEADPHONE_DETECT_0, &sense_pin); sense_pin = (sense_pin & MOON_HPD_SENSE_SEL_MASK) @@ -882,6 +891,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) default: is_jdx_micdetx_pin = true;; } + break; } switch (info->hpdet_ip_version) { @@ -1453,7 +1463,20 @@ int arizona_hpdet_start(struct arizona_extcon_info *info) /* Make sure we keep the device enabled during the measurement */ pm_runtime_get_sync(info->dev); - if (info->accdet_ip == 1) { + switch (info->accdet_ip) { + case 0: + arizona_extcon_hp_clamp(info, true); + ret = regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_MODE_MASK, + info->state->mode); + if (ret != 0) { + dev_err(arizona->dev, "Failed to set HPDET mode (%d): %d\n", + info->state->mode, ret); + goto err; + } + break; + default: if (info->state->mode == ARIZONA_ACCDET_MODE_HPL) { hpd_clamp = arizona->pdata.hpd_l_pins.clamp_pin; hpd_sense = arizona->pdata.hpd_l_pins.impd_pin; @@ -1481,17 +1504,7 @@ int arizona_hpdet_start(struct arizona_extcon_info *info) goto err; } arizona_extcon_hp_clamp(info, true); - } else { - arizona_extcon_hp_clamp(info, true); - ret = regmap_update_bits(arizona->regmap, - ARIZONA_ACCESSORY_DETECT_MODE_1, - ARIZONA_ACCDET_MODE_MASK, - info->state->mode); - if (ret != 0) { - dev_err(arizona->dev, "Failed to set HPDET mode (%d): %d\n", - info->state->mode, ret); - goto err; - } + break; } ret = regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, @@ -1540,11 +1553,15 @@ void arizona_hpdet_stop(struct arizona_extcon_info *info) ARIZONA_HP_IMPEDANCE_RANGE_MASK | ARIZONA_HP_POLL, 0); - if (info->accdet_ip != 1) { + switch (info->accdet_ip) { + case 0: /* Reset to default mode */ regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, ARIZONA_ACCDET_MODE_MASK, 0); + break; + default: + break; } arizona_extcon_hp_clamp(info, false); @@ -1585,7 +1602,12 @@ static int arizona_hpdet_moisture_start(struct arizona_extcon_info *info) break; } - if (info->accdet_ip == 1) { + switch (info->accdet_ip) { + case 0: + ret = arizona_hpdet_start(info); + arizona_extcon_hp_clamp(info, false); + break; + default: /* Make sure we keep the device enabled during the measurement */ pm_runtime_get_sync(info->dev); @@ -1616,9 +1638,7 @@ static int arizona_hpdet_moisture_start(struct arizona_extcon_info *info) ret); goto err; } - } else { - ret = arizona_hpdet_start(info); - arizona_extcon_hp_clamp(info, false); + break; } return ret; @@ -1631,7 +1651,11 @@ static void arizona_hpdet_moisture_stop(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; - if (info->accdet_ip == 1) { + switch (info->accdet_ip) { + case 0: + arizona_hpdet_stop(info); + break; + default: /* Reset back to starting range */ regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, @@ -1640,8 +1664,7 @@ static void arizona_hpdet_moisture_stop(struct arizona_extcon_info *info) pm_runtime_mark_last_busy(info->dev); pm_runtime_put_autosuspend(info->dev); - } else { - arizona_hpdet_stop(info); + break; } switch (arizona->type) { @@ -1763,7 +1786,13 @@ int arizona_micd_start(struct arizona_extcon_info *info) mutex_unlock(&arizona->reg_setting_lock); } - if (info->accdet_ip == 1) { + switch (info->accdet_ip) { + case 0: + regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_MODE_MASK, info->state->mode); + break; + default: if (info->state->mode == ARIZONA_ACCDET_MODE_ADC) micd_mode = MOON_MICD1_ADC_MODE_MASK; else @@ -1771,10 +1800,7 @@ int arizona_micd_start(struct arizona_extcon_info *info) regmap_update_bits(arizona->regmap, MOON_MIC_DETECT_0, MOON_MICD1_ADC_MODE_MASK, micd_mode); - } else { - regmap_update_bits(arizona->regmap, - ARIZONA_ACCESSORY_DETECT_MODE_1, - ARIZONA_ACCDET_MODE_MASK, info->state->mode); + break; } arizona_extcon_set_micd_bias(info, @@ -1822,11 +1848,15 @@ void arizona_micd_stop(struct arizona_extcon_info *info) mutex_unlock(&arizona->reg_setting_lock); } - if (info->accdet_ip != 1) { + switch (info->accdet_ip) { + case 0: /* Reset to default mode */ regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, ARIZONA_ACCDET_MODE_MASK, 0); + break; + default: + break; } regulator_disable(info->micvdd); @@ -2578,8 +2608,12 @@ static int arizona_hpdet_acc_id_start(struct arizona_extcon_info *info) int hp_reading = 32; int ret; - if (info->accdet_ip == 1) + switch (info->accdet_ip) { + case 0: + break; + default: return -EINVAL; + } dev_dbg(arizona->dev, "Starting identification via HPDET\n"); @@ -3837,13 +3871,16 @@ static int arizona_extcon_probe(struct platform_device *pdev) info->micd_modes = pdata->micd_configs; info->micd_num_modes = pdata->num_micd_configs; } else { - if (info->accdet_ip == 1) { + switch (info->accdet_ip) { + case 0: + info->micd_modes = micd_default_modes; + info->micd_num_modes = ARRAY_SIZE(micd_default_modes); + break; + default: info->micd_modes = moon_micd_default_modes; info->micd_num_modes = ARRAY_SIZE(moon_micd_default_modes); - } else { - info->micd_modes = micd_default_modes; - info->micd_num_modes = ARRAY_SIZE(micd_default_modes); + break; } } From 2c64139d2daa00ba5ed910db7a89d74a69d1c7e4 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 11 May 2015 13:29:17 +0100 Subject: [PATCH 0926/1167] ASoC: arizona: add api's to configure fll_ao Change-Id: Ib9f0ef96f944397a51b0892d9490a2b35d30abc6 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 199 +++++++++++++++++++++++++++++++++++++ sound/soc/codecs/arizona.h | 4 + 2 files changed, 203 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 82de4c69440..921fc8cc75b 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -56,6 +56,9 @@ #define ARIZONA_FLL_VCO_CORNER 141900000 #define ARIZONA_FLL_MAX_FREF 13500000 +#define ARIZONA_FLLAO_MAX_FREF 12288000 +#define ARIZONA_FLLAO_MIN_N 4 +#define ARIZONA_FLLAO_MAX_N 1023 #define ARIZONA_FLL_MIN_FVCO 90000000 #define ARIZONA_FLL_MAX_FRATIO 16 #define ARIZONA_FLL_MAX_REFDIV 8 @@ -176,6 +179,13 @@ static const int arizona_aif4_inputs[8] = { static unsigned int arizona_aif_sources_cache[ARRAY_SIZE(arizona_aif1_inputs)]; +static const struct reg_sequence fll_ao_32K_patch[] = { + { MOON_FLLAO_CONTROL_11, 0x0091 }, + { MOON_FLLAO_CONTROL_10, 0x06DA }, + { MOON_FLLAO_CONTROL_8, 0x0045 }, + { MOON_FLLAO_CONTROL_6, 0x8001 }, +}; + static int arizona_get_sources(struct arizona *arizona, struct snd_soc_dai *dai, const int **source, int *lim) @@ -4598,6 +4608,195 @@ int arizona_set_fll(struct arizona_fll *fll, int source, } EXPORT_SYMBOL_GPL(arizona_set_fll); +static int arizona_enable_fll_ao(struct arizona_fll *fll, + struct arizona_fll_cfg *cfg, const struct reg_sequence *patch, + unsigned int patch_size) +{ + struct arizona *arizona = fll->arizona; + int already_enabled = arizona_is_enabled_fll(fll); + unsigned int phasedet_ena; + + if (already_enabled < 0) + return already_enabled; + + arizona_fll_dbg(fll, "Enabling FLL, initially %s\n", + already_enabled ? "enabled" : "disabled"); + + if (already_enabled) { + /* Facilitate smooth refclk across the transition */ + regmap_update_bits(fll->arizona->regmap, fll->base + 1, + MOON_FLL_AO_HOLD, MOON_FLL_AO_HOLD); + } else { + regmap_update_bits(fll->arizona->regmap, fll->base + 1, + MOON_FLL_AO_HOLD, 0); + } + + if (patch) { + regmap_multi_reg_write(arizona->regmap, patch, + patch_size); + } + + regmap_update_bits(arizona->regmap, fll->base + 3, + MOON_FLL_AO_THETA_MASK, cfg->theta); + regmap_update_bits(arizona->regmap, fll->base + 4, + MOON_FLL_AO_LAMBDA_MASK, cfg->lambda); + regmap_update_bits(arizona->regmap, fll->base + 5, + MOON_FLL_AO_FB_DIV_MASK, cfg->fratio); + regmap_update_bits(arizona->regmap, fll->base + 6, + MOON_FLL_AO_REFCLK_DIV_MASK | + MOON_FLL_AO_REFCLK_SRC_MASK, + cfg->refdiv << MOON_FLL_AO_REFCLK_DIV_SHIFT | + fll->ref_src << MOON_FLL_AO_REFCLK_SRC_SHIFT); + regmap_update_bits(arizona->regmap, fll->base + 0x8, + MOON_FLL_AO_GAIN_MASK, cfg->gain); + + phasedet_ena = cfg->theta ? 0 : MOON_FLL_AO_PHASEDET_ENA_MASK; + regmap_update_bits(arizona->regmap, fll->base + 12, + MOON_FLL_AO_PHASEDET_ENA_MASK, phasedet_ena); + + regmap_update_bits(arizona->regmap, fll->base + 2, + MOON_FLL_AO_CTRL_UPD_MASK | MOON_FLL_AO_N_MASK, + MOON_FLL_AO_CTRL_UPD_MASK | cfg->n); + + arizona_fll_dbg(fll, "fll_ao params: fin=%d, fout=%d," + "refsrc=%d, refdiv=%d, n=%d, theta=%d, lambda=%d," + "fbdiv=%d, gain=%d, phasedet=%d\n", fll->ref_src, + fll->fout, fll->ref_src, cfg->refdiv, cfg->n, cfg->theta, + cfg->lambda, cfg->fratio, cfg->gain, + phasedet_ena >> MOON_FLL_AO_PHASEDET_ENA_SHIFT); + + if (!already_enabled) + pm_runtime_get(arizona->dev); + + regmap_update_bits(arizona->regmap, fll->base + 1, + MOON_FLL_AO_ENA, MOON_FLL_AO_ENA); + + if (already_enabled) + regmap_update_bits(arizona->regmap, fll->base + 1, + MOON_FLL_AO_HOLD, 0); + + if (!already_enabled) + arizona_wait_for_fll(fll, true); + + return 0; +} + +static int arizona_disable_fll_ao(struct arizona_fll *fll) +{ + struct arizona *arizona = fll->arizona; + bool change; + + arizona_fll_dbg(fll, "Disabling FLL\n"); + + regmap_update_bits(arizona->regmap, fll->base + 1, + MOON_FLL_AO_HOLD, MOON_FLL_AO_HOLD); + regmap_update_bits_check(arizona->regmap, fll->base + 1, + MOON_FLL_AO_ENA, 0, &change); + regmap_update_bits(arizona->regmap, fll->base + 1, + MOON_FLL_AO_HOLD, 0); + + arizona_wait_for_fll(fll, false); + + if (change) + pm_runtime_put_autosuspend(arizona->dev); + + return 0; +} + +int arizona_set_fll_ao(struct arizona_fll *fll, int source, + unsigned int fin, unsigned int fout) +{ + unsigned int floop = 0; + int div = 0; + int ret = 0; + struct arizona_fll_cfg cfg; + int n; + unsigned int gcd_fll; + unsigned int fref = fin; + const struct reg_sequence *patch = NULL; + unsigned int patch_size = 0;; + + if (fll->ref_src == source && + fll->ref_freq == fin && fll->fout == fout) + return 0; + + if (fout) { + /* Restrict fin to 32KHz */ + switch (fin) { + case 32768: + patch = fll_ao_32K_patch; + patch_size = ARRAY_SIZE(fll_ao_32K_patch); + break; + default: + arizona_fll_err(fll, + "FLL_AO input needs to be 32768Hz\n"); + return -EINVAL; + } + + if (fll->fout && fout != fll->fout) { + arizona_fll_err(fll, + "Can't change output on active FLL\n"); + return -EINVAL; + } + if (fin / ARIZONA_FLL_MAX_REFDIV > + ARIZONA_FLLAO_MAX_FREF) { + arizona_fll_err(fll, + "Can't scale %dMHz in to <=12.288MHz\n", + fin); + return -EINVAL; + } + if ((fout / (fin / ARIZONA_FLL_MAX_REFDIV)) < + ARIZONA_FLLAO_MIN_N) { + arizona_fll_err(fll, + "Can't configure N < 4\n"); + return -EINVAL; + } + + /* Fref must be <=12.288MHz, find refdiv */ + div = 1; + cfg.refdiv = 0; + while ((fref > ARIZONA_FLLAO_MAX_FREF) || + (fout / fref < ARIZONA_FLLAO_MIN_N)) { + div *= 2; + fref /= 2; + cfg.refdiv++; + } + + cfg.gain = fref <= 32768 ? 3 : 0; + + n = fout / fref; + floop = fout; + + /* N must be <= 1023, find fbdiv(fratio) */ + div = 1; + while (n > ARIZONA_FLLAO_MAX_N) { + div++; + floop = fout / div; + n = floop / fref; + } + + cfg.fratio = div; + cfg.n = n; + + gcd_fll = gcd(floop, fref); + arizona_fll_dbg(fll, "GCD=%u\n", gcd_fll); + cfg.theta = (floop - (cfg.n * fref)) / gcd_fll; + cfg.lambda = fref / gcd_fll; + } + + fll->ref_src = source; + fll->ref_freq = fin; + fll->fout = fout; + + if (fout) + ret = arizona_enable_fll_ao(fll, &cfg, patch, patch_size); + else + arizona_disable_fll_ao(fll); + + return ret; +} +EXPORT_SYMBOL_GPL(arizona_set_fll_ao); + int arizona_init_fll(struct arizona *arizona, int id, int base, int lock_irq, int ok_irq, struct arizona_fll *fll) { diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 5cce3f2e684..1dac967d4d1 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -33,11 +33,13 @@ #define ARIZONA_CLK_SRC_FLL1 0x4 #define ARIZONA_CLK_SRC_FLL2 0x5 #define ARIZONA_CLK_SRC_FLL3 0x6 +#define ARIZONA_CLK_SRC_FLLAO_HI 0x7 #define CLEARWATER_CLK_SRC_FLL1_DIV6 0x7 #define ARIZONA_CLK_SRC_AIF1BCLK 0x8 #define ARIZONA_CLK_SRC_AIF2BCLK 0x9 #define ARIZONA_CLK_SRC_AIF3BCLK 0xa #define ARIZONA_CLK_SRC_AIF4BCLK 0xb +#define ARIZONA_CLK_SRC_FLLAO 0xF #define ARIZONA_FLL_SRC_NONE -1 #define ARIZONA_FLL_SRC_MCLK1 0 @@ -435,6 +437,8 @@ extern int arizona_set_fll_refclk(struct arizona_fll *fll, int source, unsigned int fin, unsigned int fout); extern int arizona_set_fll(struct arizona_fll *fll, int source, unsigned int fin, unsigned int fout); +extern int arizona_set_fll_ao(struct arizona_fll *fll, int source, + unsigned int fin, unsigned int fout); extern int arizona_init_spk(struct snd_soc_codec *codec); extern int arizona_init_gpio(struct snd_soc_codec *codec); From baf5b8d63cbd5cb4414cf9dd1ac45a421d5d4eeb Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 11 May 2015 13:55:40 +0100 Subject: [PATCH 0927/1167] ASoC: moon: add support for fll_ao Change-Id: I460aed15d098a94fc67e1adb81be249fe2d9a3d2 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/moon.c | 7 ++++++- sound/soc/codecs/moon.h | 1 + 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index efc360c8a2a..58560ce59f8 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -194,7 +194,7 @@ struct moon_compr { struct moon_priv { struct arizona_priv core; - struct arizona_fll fll[2]; + struct arizona_fll fll[3]; struct moon_compr compr_info; struct mutex fw_lock; @@ -2436,6 +2436,8 @@ static int moon_set_fll(struct snd_soc_codec *codec, int fll_id, int source, return arizona_set_fll(&moon->fll[0], source, Fref, Fout); case MOON_FLL2: return arizona_set_fll(&moon->fll[1], source, Fref, Fout); + case MOON_FLLAO: + return arizona_set_fll_ao(&moon->fll[2], source, Fref, Fout); case MOON_FLL1_REFCLK: return arizona_set_fll_refclk(&moon->fll[0], source, Fref, Fout); @@ -3101,6 +3103,9 @@ static int moon_probe(struct platform_device *pdev) arizona_init_fll(arizona, 2, ARIZONA_FLL2_CONTROL_1 - 1, ARIZONA_IRQ_FLL2_LOCK, ARIZONA_IRQ_FLL2_CLOCK_OK, &moon->fll[1]); + arizona_init_fll(arizona, 4, MOON_FLLAO_CONTROL_1 - 1, + MOON_IRQ_FLLAO_CLOCK_OK, MOON_IRQ_FLLAO_CLOCK_OK, + &moon->fll[2]); for (i = 0; i < ARRAY_SIZE(moon_dai); i++) arizona_init_dai(&moon->core, i); diff --git a/sound/soc/codecs/moon.h b/sound/soc/codecs/moon.h index 223da6daa33..81140951407 100644 --- a/sound/soc/codecs/moon.h +++ b/sound/soc/codecs/moon.h @@ -19,5 +19,6 @@ #define MOON_FLL2 2 #define MOON_FLL1_REFCLK 3 #define MOON_FLL2_REFCLK 4 +#define MOON_FLLAO 5 #endif From b1791a05aad7d32cce61c245630b8b8a48b0e10d Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 16 Jun 2015 16:07:15 +0100 Subject: [PATCH 0928/1167] ASoC: arizona: for fll don't do pseudo fractional mode the moon fll works better in integer mode so pseudo fractional mode is not needed Change-Id: I3e00eea08b08c4cbc0807b93cca102b66b088025 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 921fc8cc75b..9c93498ec16 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -4191,6 +4191,11 @@ static int arizona_calc_fratio(struct arizona_fll *fll, if (fll->arizona->rev < 3 || sync) return init_ratio; break; + case CS47L90: + case CS47L91: + if (!sync) + cfg->fratio = init_ratio - 1; + return init_ratio; default: if (fref == 11289600 && fvco == 90316800) { if (!sync) From cea64c23a584ac7988c4ed2c76bd7244c0076539 Mon Sep 17 00:00:00 2001 From: Mayuresh Kulkarni Date: Fri, 19 Jun 2015 17:20:47 +0100 Subject: [PATCH 0929/1167] ASoC: moon: call adsp debugfs init and clean-up routines Change-Id: Icf271de99b7514f7fe24ee75153f70ec115f4f8f Signed-off-by: Mayuresh Kulkarni Signed-off-by: Nikesh Oswal --- sound/soc/codecs/moon.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 58560ce59f8..1090de12362 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -2889,6 +2889,9 @@ static int moon_codec_probe(struct snd_soc_codec *codec) struct arizona *arizona = priv->core.arizona; int ret, i, j; + for (i = 0; i < MOON_NUM_ADSP; i++) + wm_adsp_init_debugfs(&priv->core.adsp[i], codec); + codec->control_data = priv->core.arizona->regmap; priv->core.arizona->dapm = &codec->dapm; @@ -2975,6 +2978,9 @@ static int moon_codec_remove(struct snd_soc_codec *codec) struct moon_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; + for (i = 0; i < MOON_NUM_ADSP; i++) + wm_adsp_cleanup_debugfs(&priv->core.adsp[i]); + irq_set_irq_wake(arizona->irq, 0); arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); for (i = 0; i < MOON_NUM_ADSP; i++) From 63e2d1eaaf0ae6af9fb1a6c4ee46b775b978d02a Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 30 Jun 2015 11:11:13 +0100 Subject: [PATCH 0930/1167] ASoC: arizona: factor out code for setting micbias bypass Change-Id: I6cc5e1dfb49df6e6aa505fe6a54f09ea0774a691 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 75 +++++++++++++++++--------------------- 1 file changed, 33 insertions(+), 42 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 9c93498ec16..08d51457ae2 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -4945,68 +4945,59 @@ arizona_get_extcon_info(struct snd_soc_codec *codec) } EXPORT_SYMBOL_GPL(arizona_get_extcon_info); -int arizona_enable_force_bypass(struct snd_soc_codec *codec) +static int arizona_set_force_bypass(struct snd_soc_codec *codec, + bool set_bypass) { struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + struct arizona_micbias *micbias = arizona->pdata.micbias; + unsigned int i, cp_bypass = 0, micbias_bypass = 0; + + if (set_bypass) { + cp_bypass = ARIZONA_CPMIC_BYPASS; + micbias_bypass = ARIZONA_MICB1_BYPASS; + } mutex_lock(&arizona->dapm->card->dapm_mutex); if (arizona->micvdd_regulated) { - snd_soc_dapm_disable_pin(arizona->dapm, "MICSUPP"); + if (set_bypass) + snd_soc_dapm_disable_pin(arizona->dapm, + "MICSUPP"); + else + snd_soc_dapm_force_enable_pin(arizona->dapm, + "MICSUPP"); + mutex_unlock(&arizona->dapm->card->dapm_mutex); snd_soc_dapm_sync(arizona->dapm); - regmap_update_bits(arizona->regmap, ARIZONA_MIC_CHARGE_PUMP_1, - ARIZONA_CPMIC_BYPASS, ARIZONA_CPMIC_BYPASS); + regmap_update_bits(arizona->regmap, + ARIZONA_MIC_CHARGE_PUMP_1, + ARIZONA_CPMIC_BYPASS, cp_bypass); } else { mutex_unlock(&arizona->dapm->card->dapm_mutex); } - regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_1, - ARIZONA_MICB1_BYPASS, ARIZONA_MICB1_BYPASS); - regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_2, - ARIZONA_MICB2_BYPASS, ARIZONA_MICB2_BYPASS); - regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_3, - ARIZONA_MICB3_BYPASS, ARIZONA_MICB3_BYPASS); - regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_4, - ARIZONA_MICB4_BYPASS, ARIZONA_MICB4_BYPASS); + for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { + if ((set_bypass) || + (!micbias[i].bypass && micbias[i].mV)) + regmap_update_bits(arizona->regmap, + ARIZONA_MIC_BIAS_CTRL_1 + i, + ARIZONA_MICB1_BYPASS, + micbias_bypass); + } return 0; } + +int arizona_enable_force_bypass(struct snd_soc_codec *codec) +{ + return arizona_set_force_bypass(codec, true); +} EXPORT_SYMBOL_GPL(arizona_enable_force_bypass); int arizona_disable_force_bypass(struct snd_soc_codec *codec) { - struct arizona *arizona = dev_get_drvdata(codec->dev->parent); - struct arizona_micbias *micbias = arizona->pdata.micbias; - - mutex_lock(&arizona->dapm->card->dapm_mutex); - if (arizona->micvdd_regulated) { - snd_soc_dapm_force_enable_pin(arizona->dapm, "MICSUPP"); - mutex_unlock(&arizona->dapm->card->dapm_mutex); - - snd_soc_dapm_sync(arizona->dapm); - - regmap_update_bits(arizona->regmap, ARIZONA_MIC_CHARGE_PUMP_1, - ARIZONA_CPMIC_BYPASS, 0); - } else { - mutex_unlock(&arizona->dapm->card->dapm_mutex); - } - - if (!micbias[0].bypass && micbias[0].mV) - regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_1, - ARIZONA_MICB1_BYPASS, 0); - if (!micbias[1].bypass && micbias[1].mV) - regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_2, - ARIZONA_MICB2_BYPASS, 0); - if (!micbias[2].bypass && micbias[2].mV) - regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_3, - ARIZONA_MICB3_BYPASS, 0); - if (!micbias[3].bypass && micbias[3].mV) - regmap_update_bits(arizona->regmap, ARIZONA_MIC_BIAS_CTRL_4, - ARIZONA_MICB4_BYPASS, 0); - - return 0; + return arizona_set_force_bypass(codec, false); } EXPORT_SYMBOL_GPL(arizona_disable_force_bypass); From 7bf6fa81fef1bdb534994f7549d08a3fe3aa4b91 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 30 Jun 2015 11:32:34 +0100 Subject: [PATCH 0931/1167] mfd: arizona: factor out a function to get num of micbiases Change-Id: I860677cbc94c803e4e25ec16bde566359716368c Signed-off-by: Nikesh Oswal --- drivers/mfd/arizona-core.c | 69 ++++++++++++++++++++----------- include/linux/mfd/arizona/core.h | 2 + include/linux/mfd/arizona/pdata.h | 4 +- 3 files changed, 49 insertions(+), 26 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index ae734b7bb0e..3e813fdbf90 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1517,14 +1517,55 @@ void arizona_florida_clear_input(struct arizona *arizona) } EXPORT_SYMBOL_GPL(arizona_florida_clear_input); +int arizona_get_num_micbias(struct arizona *arizona, + unsigned int *micbiases, unsigned int *child_micbiases) +{ + unsigned int num_micbiases, num_child_micbiases; + + if (!arizona) + return -EINVAL; + + switch (arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8280: + case WM8998: + case WM1814: + case WM8285: + case WM1840: + case WM1831: + case CS47L24: + num_micbiases = ARIZONA_MAX_MICBIAS; + num_child_micbiases = 0; + break; + case CS47L35: + num_micbiases = MARLEY_NUM_MICBIAS; + num_child_micbiases = MARLEY_NUM_CHILD_MICBIAS; + break; + default: + num_micbiases = MOON_NUM_MICBIAS; + num_child_micbiases = MOON_NUM_CHILD_MICBIAS; + break; + } + + if (micbiases) + *micbiases = num_micbiases; + if (child_micbiases) + *child_micbiases = num_child_micbiases; + + return 0; +} +EXPORT_SYMBOL_GPL(arizona_get_num_micbias); + int arizona_dev_init(struct arizona *arizona) { struct device *dev = arizona->dev; const char *type_name = "Unknown"; unsigned int reg, val, mask; int (*apply_patch)(struct arizona *) = NULL; - int ret, i, max_inputs, max_micbias, j; - int num_child_micbias = 0; + int ret, i, max_inputs, j; + unsigned int max_micbias = 0, num_child_micbias = 0; unsigned int num_dmic_clksrc = 0; dev_set_drvdata(arizona->dev, arizona); @@ -1967,29 +2008,7 @@ int arizona_dev_init(struct arizona *arizona) pm_runtime_use_autosuspend(arizona->dev); pm_runtime_enable(arizona->dev); - switch (arizona->type) { - case WM5102: - case WM5110: - case WM8997: - case WM8280: - case WM8998: - case WM1814: - case WM8285: - case WM1840: - case WM1831: - case CS47L24: - max_micbias = ARIZONA_MAX_MICBIAS; - num_child_micbias = 0; - break; - case CS47L35: - max_micbias = 2; - num_child_micbias = MARLEY_NUM_CHILD_MICBIAS; - break; - default: - max_micbias = 2; - num_child_micbias = MOON_NUM_CHILD_MICBIAS; - break; - } + arizona_get_num_micbias(arizona, &max_micbias, &num_child_micbias); for (i = 0; i < max_micbias; i++) { if (!arizona->pdata.micbias[i].mV && diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index ea830bfcadd..7b7b1677320 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -217,6 +217,8 @@ extern int arizona_of_read_u32(struct arizona *arizona, const char* prop, extern void arizona_florida_mute_analog(struct arizona* arizona, unsigned int mute); extern void arizona_florida_clear_input(struct arizona *arizona); +extern int arizona_get_num_micbias(struct arizona *arizona, + unsigned int *micbiases, unsigned int *child_micbiases); static inline int arizona_of_read_s32(struct arizona *arizona, const char *prop, bool mandatory, s32 *data) diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 236574a43c8..c45d11e0b8c 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -53,8 +53,10 @@ #define ARIZONA_MAX_MICBIAS 4 #define ARIZONA_MAX_CHILD_MICBIAS 4 +#define MARLEY_NUM_MICBIAS 2 #define MARLEY_NUM_CHILD_MICBIAS 2 -#define MOON_NUM_CHILD_MICBIAS 4 +#define MOON_NUM_MICBIAS 2 +#define MOON_NUM_CHILD_MICBIAS 4 #define ARIZONA_MAX_OUTPUT 6 From 825f152a0f83f6fdbb3d392403a973bb4209357b Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 30 Jun 2015 11:37:05 +0100 Subject: [PATCH 0932/1167] ASoC: arizona: set force bypass based on arizona chip Code was always enabling/disabling force bypass on 4 micbiases, different arizona codecs have different number of micbiases so this patch fixes this Change-Id: I12bd3e6523035cded4aeea67a0fb311dd6e505e4 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 08d51457ae2..6debbe0ea63 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -4951,6 +4951,7 @@ static int arizona_set_force_bypass(struct snd_soc_codec *codec, struct arizona *arizona = dev_get_drvdata(codec->dev->parent); struct arizona_micbias *micbias = arizona->pdata.micbias; unsigned int i, cp_bypass = 0, micbias_bypass = 0; + unsigned int num_micbiases; if (set_bypass) { cp_bypass = ARIZONA_CPMIC_BYPASS; @@ -4977,7 +4978,9 @@ static int arizona_set_force_bypass(struct snd_soc_codec *codec, mutex_unlock(&arizona->dapm->card->dapm_mutex); } - for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { + arizona_get_num_micbias(arizona, &num_micbiases, NULL); + + for (i = 0; i < num_micbiases; i++) { if ((set_bypass) || (!micbias[i].bypass && micbias[i].mV)) regmap_update_bits(arizona->regmap, From 73830a3d95334a4e84aa0b4e629c7daecf64f685 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 23 Jun 2015 10:45:42 +0100 Subject: [PATCH 0933/1167] regulator: arizona-micsupp: initialise micvdd as per the data sheet micvdd must be set to be 200mV more than the maximum micbias Change-Id: Iaaae3111d571b16b9f1f94ec5b951a5818d311cd Signed-off-by: Nikesh Oswal --- drivers/regulator/arizona-micsupp.c | 47 +++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/drivers/regulator/arizona-micsupp.c b/drivers/regulator/arizona-micsupp.c index 0a1d48823f1..03cae2b4e37 100644 --- a/drivers/regulator/arizona-micsupp.c +++ b/drivers/regulator/arizona-micsupp.c @@ -264,6 +264,33 @@ static int arizona_micsupp_of_get_pdata(struct arizona *arizona, return 0; } +static unsigned int arizona_get_max_micbias(struct arizona *arizona) +{ + unsigned int num_micbias, i, max_micbias, micbias_mv; + int ret; + + arizona_get_num_micbias(arizona, &num_micbias, NULL); + + max_micbias = 0; + for (i = 0; i < num_micbias; i++) { + ret = regmap_read(arizona->regmap, + ARIZONA_MIC_BIAS_CTRL_1 + i, &micbias_mv); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to read micbias level: %d\n", ret); + return 0; + } + + micbias_mv = (micbias_mv & ARIZONA_MICB1_LVL_MASK) >> + ARIZONA_MICB1_LVL_SHIFT; + micbias_mv = (1500) + (100 * micbias_mv); + if (micbias_mv > max_micbias) + max_micbias = micbias_mv; + } + + return (max_micbias * 1000); +} + static int arizona_micsupp_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); @@ -271,6 +298,7 @@ static int arizona_micsupp_probe(struct platform_device *pdev) struct regulator_config config = { }; struct arizona_micsupp *micsupp; int ret; + unsigned int max_micbias; micsupp = devm_kzalloc(&pdev->dev, sizeof(*micsupp), GFP_KERNEL); if (micsupp == NULL) { @@ -315,11 +343,30 @@ static int arizona_micsupp_probe(struct platform_device *pdev) } } + max_micbias = arizona_get_max_micbias(arizona); + if (max_micbias) { + /* micvdd must be 200mV more than maximum micbias */ + max_micbias += 200000; + if (micsupp->init_data.constraints.max_uV >= max_micbias) { + micsupp->init_data.constraints.max_uV = max_micbias; + micsupp->init_data.constraints.min_uV = max_micbias; + micsupp->init_data.constraints.apply_uV = true; + micsupp->init_data.constraints.valid_ops_mask &= + ~REGULATOR_CHANGE_VOLTAGE; + } + } + if (arizona->pdata.micvdd) config.init_data = arizona->pdata.micvdd; else config.init_data = &micsupp->init_data; + if (max_micbias) { + if (config.init_data->constraints.max_uV < max_micbias) + dev_err(arizona->dev, "micvdd must be atleast set to %duV\n", + max_micbias); + } + /* Default to regulated mode until the API supports bypass */ regmap_update_bits(arizona->regmap, ARIZONA_MIC_CHARGE_PUMP_1, ARIZONA_CPMIC_BYPASS, 0); From 8beb8c319078787596c0d82ea837fc2b14143f02 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 30 Jun 2015 16:59:49 +0100 Subject: [PATCH 0934/1167] mfd: moon: Make INTERRUPT_DEBOUNCE_7 readable Jack detect debounce is controlled on Moon by INTERRUPT_DEBOUNCE_7 so make this readable and set a default value for it Change-Id: I637ab57bbe1736557617bad477fdd0362f58c48e Signed-off-by: Nikesh Oswal --- drivers/mfd/moon-tables.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mfd/moon-tables.c b/drivers/mfd/moon-tables.c index 3feabedf7de..bf23d3d443e 100644 --- a/drivers/mfd/moon-tables.c +++ b/drivers/mfd/moon-tables.c @@ -1495,6 +1495,7 @@ static const struct reg_default moon_reg_default[] = { { 0x0000185F, 0x0007 }, /* R6239 - IRQ1 Mask 32 */ { 0x00001860, 0x007F }, /* R6240 - IRQ1 Mask 33 */ { 0x00001948, 0x0F07 }, /* R6472 - IRQ2 Mask 9 */ + { 0x00001A06, 0x0000 }, /* R6662 - Interrupt Debounce 7 */ { 0x00001A80, 0x4400 }, /* R6784 - IRQ1 CTRL */ }; @@ -2798,6 +2799,7 @@ static bool moon_16bit_readable_register(struct device *dev, unsigned int reg) case CLEARWATER_IRQ2_STATUS_9: case CLEARWATER_IRQ2_MASK_9: case CLEARWATER_IRQ2_RAW_STATUS_9: + case CLEARWATER_INTERRUPT_DEBOUNCE_7: case CLEARWATER_IRQ1_CTRL: case MOON_IRQ1_STATUS_33: return true; From e7ad783bd8d8f55fbe0bb807f0a7d316b94c9815 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 1 Jul 2015 08:56:03 +0100 Subject: [PATCH 0935/1167] ASoC: moon: unmask drc interrupt the drc interrupt was accidently getting masked this patch umasks it. Change-Id: I63b3f72b3372bf59f3a110fb3c7f13449363fb7f Signed-off-by: Nikesh Oswal --- sound/soc/codecs/moon.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 1090de12362..f63f4c262d4 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -2954,7 +2954,7 @@ static int moon_codec_probe(struct snd_soc_codec *codec) ret = regmap_update_bits(arizona->regmap, CLEARWATER_IRQ2_MASK_9, CLEARWATER_DRC2_SIG_DET_EINT2, - CLEARWATER_DRC2_SIG_DET_EINT2); + 0); if (ret != 0) { dev_err(arizona->dev, "Failed to unmask DRC2 IRQ for DSP: %d\n", @@ -2988,7 +2988,7 @@ static int moon_codec_remove(struct snd_soc_codec *codec) &priv->core.adsp[i]); regmap_update_bits(arizona->regmap, CLEARWATER_IRQ2_MASK_9, CLEARWATER_DRC2_SIG_DET_EINT2, - 0); + CLEARWATER_DRC2_SIG_DET_EINT2); priv->core.arizona->dapm = NULL; return 0; From 4f0b4b8647d801a270ddefcb8b574d6222e2e08f Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 1 Jul 2015 11:45:59 +0100 Subject: [PATCH 0936/1167] ASoC: moon: don't change osr when input is in analog mode In analog mode osr is fixed to the power on reset value of 3.072MHz and setting it to any lower value significantly detoriates the audio quality so this patch blocks any changes of osr when input is in analog mode Change-Id: Id4d74098cd7a879c9935a81952c1123ac8b3bf5d Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 19 +++++++++++++++++++ sound/soc/codecs/arizona.h | 3 +++ sound/soc/codecs/moon.c | 6 ++++-- 3 files changed, 26 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 6debbe0ea63..e57938defe1 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2302,6 +2302,25 @@ int moon_dfc_put(struct snd_kcontrol *kcontrol, } EXPORT_SYMBOL_GPL(moon_dfc_put); +int moon_osr_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + unsigned int mode; + + /* for analog mode osr is fixed */ + mode = snd_soc_read(codec, e->reg - 2); + if (!(mode & ARIZONA_IN1_MODE_MASK)) { + dev_err(codec->dev, + "OSR is fixed to 3.072MHz in analog mode\n"); + return -EINVAL; + } + + return snd_soc_put_value_enum_double(kcontrol, ucontrol); +} +EXPORT_SYMBOL_GPL(moon_osr_put); + static void arizona_in_set_vu(struct snd_soc_codec *codec, int ena) { struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 1dac967d4d1..9eca00d696f 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -340,6 +340,9 @@ extern int moon_in_rate_put(struct snd_kcontrol *kcontrol, extern int moon_dfc_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); +extern int moon_osr_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); + extern int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index f63f4c262d4..e07931bf7f6 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -675,8 +675,10 @@ static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); { name " ANC Source", "RXANCR", "RXANCR" } static const struct snd_kcontrol_new moon_snd_controls[] = { -SOC_VALUE_ENUM("IN1 OSR", clearwater_in_dmic_osr[0]), -SOC_VALUE_ENUM("IN2 OSR", clearwater_in_dmic_osr[1]), +SOC_VALUE_ENUM_EXT("IN1 OSR", clearwater_in_dmic_osr[0], + snd_soc_get_value_enum_double, moon_osr_put), +SOC_VALUE_ENUM_EXT("IN2 OSR", clearwater_in_dmic_osr[1], + snd_soc_get_value_enum_double, moon_osr_put), SOC_VALUE_ENUM("IN3 OSR", clearwater_in_dmic_osr[2]), SOC_VALUE_ENUM("IN4 OSR", clearwater_in_dmic_osr[3]), SOC_VALUE_ENUM("IN5 OSR", clearwater_in_dmic_osr[4]), From ba6367155b728fc270b7858bee6be7d1347c7af0 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 1 Jul 2015 11:59:20 +0100 Subject: [PATCH 0937/1167] mfd: arizona: add LP bits for moon inputs Change-Id: I7cfa2f9ae002020510990d5915d1772c37ae2082 Signed-off-by: Nikesh Oswal --- include/linux/mfd/arizona/registers.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index a62a01804ee..209d52be113 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -4506,6 +4506,10 @@ #define ARIZONA_IN1L_SRC_SE_MASK 0x2000 /* IN1L_SRC - [13] */ #define ARIZONA_IN1L_SRC_SE_SHIFT 13 /* IN1L_SRC - [13] */ #define ARIZONA_IN1L_SRC_SE_WIDTH 1 /* IN1L_SRC - [13] */ +#define MOON_IN1L_LP_MODE 0x0800 /* LP_MODE - [9] */ +#define MOON_IN1L_LP_MODE_MASK 0x0800 /* LP_MODE - [9] */ +#define MOON_IN1L_LP_MODE_SHIFT 11 /* LP_MODE - [9] */ +#define MOON_IN1L_LP_MODE_WIDTH 1 /* LP_MODE - [9] */ #define ARIZONA_IN_VU 0x0200 /* IN_VU */ #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */ #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */ From ce219329aba08b5086b84b8aa15e71bd931f191e Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 1 Jul 2015 13:12:02 +0100 Subject: [PATCH 0938/1167] ASoC: moon: add alsa control to change lp mode for inputs Change-Id: I78967af353deb976c68f7e4b3dc90d85c0e398ed Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 32 ++++++++++++++++++++++++++++++++ sound/soc/codecs/arizona.h | 3 +++ sound/soc/codecs/moon.c | 13 +++++++++++++ 3 files changed, 48 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index e57938defe1..e1bc60cd6a1 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2321,6 +2321,38 @@ int moon_osr_put(struct snd_kcontrol *kcontrol, } EXPORT_SYMBOL_GPL(moon_osr_put); +int moon_lp_mode_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + unsigned int reg, mask; + int ret; + + + mutex_lock_nested(&codec->card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); + + /* Cannot change lp mode on an active input */ + reg = snd_soc_read(codec, ARIZONA_INPUT_ENABLES); + mask = (mc->reg - ARIZONA_ADC_DIGITAL_VOLUME_1L) / 4; + mask ^= 0x1; /* Flip bottom bit for channel order */ + + if ((reg) & (1 << mask)) { + ret = -EBUSY; + dev_err(codec->dev, + "Can't change lp mode on an active input\n"); + goto exit; + } + + ret = snd_soc_put_volsw(kcontrol, ucontrol); + +exit: + mutex_unlock(&codec->card->dapm_mutex); + return ret; +} +EXPORT_SYMBOL_GPL(moon_lp_mode_put); + static void arizona_in_set_vu(struct snd_soc_codec *codec, int ena) { struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 9eca00d696f..f841e13153e 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -343,6 +343,9 @@ extern int moon_dfc_put(struct snd_kcontrol *kcontrol, extern int moon_osr_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); +extern int moon_lp_mode_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); + extern int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index e07931bf7f6..15c5962976a 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -694,6 +694,19 @@ SOC_SINGLE_RANGE_TLV("IN2R Volume", ARIZONA_IN2R_CONTROL, SOC_ENUM("IN HPF Cutoff Frequency", arizona_in_hpf_cut_enum), +SOC_SINGLE_EXT("IN1L LP Switch", ARIZONA_ADC_DIGITAL_VOLUME_1L, + MOON_IN1L_LP_MODE_SHIFT, 1, 0, + snd_soc_get_volsw, moon_lp_mode_put), +SOC_SINGLE_EXT("IN1R LP Switch", ARIZONA_ADC_DIGITAL_VOLUME_1R, + MOON_IN1L_LP_MODE_SHIFT, 1, 0, + snd_soc_get_volsw, moon_lp_mode_put), +SOC_SINGLE_EXT("IN2L LP Switch", ARIZONA_ADC_DIGITAL_VOLUME_2L, + MOON_IN1L_LP_MODE_SHIFT, 1, 0, + snd_soc_get_volsw, moon_lp_mode_put), +SOC_SINGLE_EXT("IN2R LP Switch", ARIZONA_ADC_DIGITAL_VOLUME_2R, + MOON_IN1L_LP_MODE_SHIFT, 1, 0, + snd_soc_get_volsw, moon_lp_mode_put), + SOC_SINGLE("IN1L HPF Switch", ARIZONA_IN1L_CONTROL, ARIZONA_IN1L_HPF_SHIFT, 1, 0), SOC_SINGLE("IN1R HPF Switch", ARIZONA_IN1R_CONTROL, From 16081326866b270ef5f14de3be5cc93a92674f46 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 1 Jul 2015 13:21:11 +0100 Subject: [PATCH 0939/1167] ASoC: arizona: fix the mask used for setting of input rate Change-Id: Ia6691d8c33efc67c1eb906d6fc5780adbdc0d117 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index e1bc60cd6a1..3c2c09270a0 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2263,7 +2263,7 @@ int moon_in_rate_put(struct snd_kcontrol *kcontrol, mask = (e->reg - ARIZONA_IN1L_CONTROL) / 4; mask ^= 0x1; /* Flip bottom bit for channel order */ - if (reg & mask) { + if ((reg) & (1 << mask)) { ret = -EBUSY; goto exit; } From a42be186b6b26a024c00a4b432d4c73d1f134346 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 8 Jul 2015 12:07:39 +0100 Subject: [PATCH 0940/1167] mfd: moon: ARIZONA_CLOCK_CONTROL should be volatile Change-Id: I79701cfffbb9e19aa87effd60f0b11f88a54713d Signed-off-by: Nikesh Oswal --- drivers/mfd/moon-tables.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/moon-tables.c b/drivers/mfd/moon-tables.c index bf23d3d443e..518936da5ce 100644 --- a/drivers/mfd/moon-tables.c +++ b/drivers/mfd/moon-tables.c @@ -1145,7 +1145,6 @@ static const struct reg_default moon_reg_default[] = { { 0x00000ef9, 0x0000 }, /* R3833 - ISRC 4 CTRL 1 */ { 0x00000efa, 0x0001 }, /* R3834 - ISRC 4 CTRL 2 */ { 0x00000efb, 0x0000 }, /* R3835 - ISRC 4 CTRL 3 */ - { 0x00000f00, 0x0000 }, /* R3840 (0xF00) - Clock Control */ { 0x00000F01, 0x0000 }, /* R3841 - ANC_SRC */ { 0x00000F02, 0x0000 }, /* R3842 - Arizona DSP Status */ { 0x00000F08, 0x001c }, /* R3848 - ANC Coefficient */ @@ -2843,6 +2842,7 @@ static bool moon_16bit_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_FX_CTRL2: case CLEARWATER_ASRC2_STATUS: case CLEARWATER_ASRC1_STATUS: + case ARIZONA_CLOCK_CONTROL: case MOON_DFC_STATUS: case CLEARWATER_IRQ1_STATUS_1: case CLEARWATER_IRQ1_STATUS_2: From 4b11cd0f6df3ceaa3754612d631b7cd14bf2ecac Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 9 Jul 2015 09:46:50 +0100 Subject: [PATCH 0941/1167] mfd: moon: modify the regmap patch MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit the new patch optimises the DRE and FLL settings as well as the FLL_AO current Change-Id: Ie065fb8a9dd80b411a3ee27f585a2a82d0f498d5 Signed-off-by: Nikesh Oswal --- drivers/mfd/moon-tables.c | 66 ++++++++++++++++++++++++--------------- 1 file changed, 40 insertions(+), 26 deletions(-) diff --git a/drivers/mfd/moon-tables.c b/drivers/mfd/moon-tables.c index 518936da5ce..5b073ca057a 100644 --- a/drivers/mfd/moon-tables.c +++ b/drivers/mfd/moon-tables.c @@ -19,21 +19,35 @@ #include "arizona.h" static const struct reg_default moon_reva_16_patch[] = { - { 0x8A, 0x5555 }, - { 0x8A, 0xAAAA }, - { 0x51B, 0x0001 }, - { 0x55B, 0x0001 }, - { 0x59B, 0x0001 }, - { 0x5BB, 0x0001 }, - { 0x4CF, 0x0730 }, - { 0x3A2, 0x242A }, - { 0x443, 0x9CFA }, - { 0x441, 0xC750 }, - { 0x4E2, 0x1312 }, - { 0x4E3, 0x1312 }, - { 0x4E4, 0x1312 }, - { 0x8A, 0xCCCC }, - { 0x8A, 0x3333 }, + { 0x8A, 0x5555 }, + { 0x8A, 0xAAAA }, + { 0x4CF, 0x0730 }, + { 0x3A2, 0x2438 }, + { 0x171, 0x0003 }, + { 0x101, 0x0444 }, + { 0x159, 0x0002 }, + { 0x120, 0x0444 }, + { 0x1D1, 0x0004 }, + { 0x1E0, 0xC084 }, + { 0x159, 0x0000 }, + { 0x120, 0x0404 }, + { 0x101, 0x0404 }, + { 0x171, 0x0002 }, + { 0x441, 0xC750 }, + { 0x1300, 0x050E }, + { 0x1302, 0x0101 }, + { 0x1380, 0x0425 }, + { 0x1381, 0xF6D8 }, + { 0x1382, 0x0632 }, + { 0x1383, 0xFEC8 }, + { 0x1390, 0x042F }, + { 0x1391, 0xF6CA }, + { 0x1392, 0x0637 }, + { 0x1393, 0xFEC8 }, + { 0x17A, 0x2906 }, + { 0x19A, 0x2906 }, + { 0x8A, 0xCCCC }, + { 0x8A, 0x3333 }, }; /* We use a function so we can use ARRAY_SIZE() */ @@ -183,7 +197,7 @@ static const struct reg_default moon_reg_default[] = { { 0x00000112, 0x0305 }, /* R274 (0x112) - Async clock 1 */ { 0x00000113, 0x0011 }, /* R275 (0x113) - Async sample rate 1 */ { 0x00000114, 0x0011 }, /* R276 (0x114) - Async sample rate 2 */ - { 0x00000120, 0x0305 }, + { 0x00000120, 0x0404 }, { 0x00000122, 0x0000 }, { 0x00000149, 0x0000 }, /* R329 (0x149) - Output system clock */ { 0x0000014a, 0x0000 }, /* R330 (0x14A) - Output async clock */ @@ -1326,16 +1340,16 @@ static const struct reg_default moon_reg_default[] = { { 0x00000FC3, 0x0000 }, /* R4035 - ANC Coefficient */ { 0x00000FC4, 0x0000 }, /* R4036 - ANC Coefficient */ { 0x00000FC5, 0x0000 }, /* R4037 - ANC Coefficient */ - { 0x00001300, 0x0000 }, /* R4864 - DAC Comp 1 */ - { 0x00001302, 0x0000 }, /* R4866 - DAC Comp 2 */ - { 0x00001380, 0x0000 }, - { 0x00001381, 0x0000 }, - { 0x00001382, 0x0000 }, - { 0x00001383, 0x0000 }, - { 0x00001390, 0x0000 }, - { 0x00001391, 0x0000 }, - { 0x00001392, 0x0000 }, - { 0x00001393, 0x0000 }, + { 0x00001300, 0x050E }, /* R4864 - DAC Comp 1 */ + { 0x00001302, 0x0101 }, /* R4866 - DAC Comp 2 */ + { 0x00001380, 0x0425 }, + { 0x00001381, 0xF6D8 }, + { 0x00001382, 0x0632 }, + { 0x00001383, 0xFEC8 }, + { 0x00001390, 0x042F }, + { 0x00001391, 0xF6CA }, + { 0x00001392, 0x0637 }, + { 0x00001393, 0xFEC8 }, { 0x000013a0, 0x0000 }, { 0x000013a1, 0x0000 }, { 0x000013a2, 0x0000 }, From c6094325989172484f36fa21cdbfaec3925e54ab Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 15 Jul 2015 12:24:05 +0900 Subject: [PATCH 0942/1167] ASoC: arizona: fix mux input settings the mux input value must be shifted and then passed to regmap_update_bits Change-Id: I4fa78604e59c4a0834b19b1fc4e823a57b5a2ffd Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 3c2c09270a0..1f4a2d4bc01 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -644,7 +644,7 @@ int arizona_mux_event(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_POST_PMU: - val = e->values[w->value]; + val = e->values[w->value] << e->shift_l; break; case SND_SOC_DAPM_PRE_PMD: val = 0; From f1ca5ab9aedf3a91ef0c6fe9dd5ced5bf3bc8c9f Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 4 Aug 2015 12:24:59 +0100 Subject: [PATCH 0943/1167] ASoC: arizona: reset ctrl_up when disabling fll_ao ctrl_up gates the writes to all fll_ao register. Setting it to 0 when disabling fll_ao ensures that after a runtime suspend/resume cycle when one enables the fllao then ctrl_up is the last bit that is configured by the fllao enable code rather than the cache sync operation which would have updated it much earlier before writing out all fllao registers. Change-Id: I239c589596e018daa1779454622859f171785873 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 1f4a2d4bc01..9495d7e08a3 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -4753,6 +4753,16 @@ static int arizona_disable_fll_ao(struct arizona_fll *fll) arizona_wait_for_fll(fll, false); + /* ctrl_up gates the writes to all fll_ao register, + setting it to 0 here ensures that after a runtime + suspend/resume cycle when one enables the + fllao then ctrl_up is the last bit that is configured + by the fllao enable code rather than the cache + sync operation which would have updated it + much earlier before writing out all fllao registers */ + regmap_update_bits(arizona->regmap, fll->base + 2, + MOON_FLL_AO_CTRL_UPD_MASK, 0); + if (change) pm_runtime_put_autosuspend(arizona->dev); From f356fef08eab478760de98f7c6559f9217e03ced Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 10 Aug 2015 13:49:17 +0100 Subject: [PATCH 0944/1167] ASoC: arizona: fb_div must take even values fb_div field of fll_ao is correctly computed to only take even values and also a check is added to ensure that fb_div is within its upper limit. Change-Id: I935231b3d26b4e15f550fc4fbfb562d5712328f3 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 9495d7e08a3..72a0ce9c83b 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -59,6 +59,7 @@ #define ARIZONA_FLLAO_MAX_FREF 12288000 #define ARIZONA_FLLAO_MIN_N 4 #define ARIZONA_FLLAO_MAX_N 1023 +#define ARIZONA_FLLAO_MAX_FBDIV 254 #define ARIZONA_FLL_MIN_FVCO 90000000 #define ARIZONA_FLL_MAX_FRATIO 16 #define ARIZONA_FLL_MAX_REFDIV 8 @@ -4776,7 +4777,6 @@ int arizona_set_fll_ao(struct arizona_fll *fll, int source, int div = 0; int ret = 0; struct arizona_fll_cfg cfg; - int n; unsigned int gcd_fll; unsigned int fref = fin; const struct reg_sequence *patch = NULL; @@ -4830,19 +4830,25 @@ int arizona_set_fll_ao(struct arizona_fll *fll, int source, cfg.gain = fref <= 32768 ? 3 : 0; - n = fout / fref; + cfg.fratio = 1; /* start with fb_div as 1 */ floop = fout; + cfg.n = floop / fref; /* N must be <= 1023, find fbdiv(fratio) */ - div = 1; - while (n > ARIZONA_FLLAO_MAX_N) { - div++; + div = 2; + while (cfg.n > ARIZONA_FLLAO_MAX_N && + div <= ARIZONA_FLLAO_MAX_FBDIV) { floop = fout / div; - n = floop / fref; + cfg.fratio = div; + cfg.n = floop / fref; + div += 2; } - cfg.fratio = div; - cfg.n = n; + if (cfg.n > ARIZONA_FLLAO_MAX_N) { + arizona_fll_err(fll, + "Can't configure N > 1023\n"); + return -EINVAL; + } gcd_fll = gcd(floop, fref); arizona_fll_dbg(fll, "GCD=%u\n", gcd_fll); From 04c794cfbd742fdd0cc859180d604237e8c9e13e Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 10 Aug 2015 14:13:56 +0100 Subject: [PATCH 0945/1167] ASoC: arizona: cache the fll_ao configuration the current code was recomputing the fll_ao configuration everytime we set the fll_ao, in most systems the fll_ao configurations remains the same and we just turn on/off the fll_ao. In this patch we cache the previously computed fll_ao configuration and apply the same if no reconfiguration is needed i.e both fin and fout of the fll_ao are same Change-Id: Ie9bab0db064c6188b190371e5e28cbce1e7e4280 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 37 +++++++++++++++++++------------------ sound/soc/codecs/arizona.h | 2 ++ 2 files changed, 21 insertions(+), 18 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 72a0ce9c83b..84b2d18f755 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -4776,22 +4776,21 @@ int arizona_set_fll_ao(struct arizona_fll *fll, int source, unsigned int floop = 0; int div = 0; int ret = 0; - struct arizona_fll_cfg cfg; + struct arizona_fll_cfg *cfg = &(fll->ref_cfg); unsigned int gcd_fll; unsigned int fref = fin; - const struct reg_sequence *patch = NULL; - unsigned int patch_size = 0;; if (fll->ref_src == source && fll->ref_freq == fin && fll->fout == fout) return 0; - if (fout) { + if ((fout) && (cfg->fin != fin || + cfg->fvco != fout)) { /* Restrict fin to 32KHz */ switch (fin) { case 32768: - patch = fll_ao_32K_patch; - patch_size = ARRAY_SIZE(fll_ao_32K_patch); + cfg->patch = fll_ao_32K_patch; + cfg->patch_size = ARRAY_SIZE(fll_ao_32K_patch); break; default: arizona_fll_err(fll, @@ -4820,31 +4819,31 @@ int arizona_set_fll_ao(struct arizona_fll *fll, int source, /* Fref must be <=12.288MHz, find refdiv */ div = 1; - cfg.refdiv = 0; + cfg->refdiv = 0; while ((fref > ARIZONA_FLLAO_MAX_FREF) || (fout / fref < ARIZONA_FLLAO_MIN_N)) { div *= 2; fref /= 2; - cfg.refdiv++; + cfg->refdiv++; } - cfg.gain = fref <= 32768 ? 3 : 0; + cfg->gain = fref <= 32768 ? 3 : 0; - cfg.fratio = 1; /* start with fb_div as 1 */ + cfg->fratio = 1; /* start with fb_div as 1 */ floop = fout; - cfg.n = floop / fref; + cfg->n = floop / fref; /* N must be <= 1023, find fbdiv(fratio) */ div = 2; - while (cfg.n > ARIZONA_FLLAO_MAX_N && + while (cfg->n > ARIZONA_FLLAO_MAX_N && div <= ARIZONA_FLLAO_MAX_FBDIV) { floop = fout / div; - cfg.fratio = div; - cfg.n = floop / fref; + cfg->fratio = div; + cfg->n = floop / fref; div += 2; } - if (cfg.n > ARIZONA_FLLAO_MAX_N) { + if (cfg->n > ARIZONA_FLLAO_MAX_N) { arizona_fll_err(fll, "Can't configure N > 1023\n"); return -EINVAL; @@ -4852,8 +4851,10 @@ int arizona_set_fll_ao(struct arizona_fll *fll, int source, gcd_fll = gcd(floop, fref); arizona_fll_dbg(fll, "GCD=%u\n", gcd_fll); - cfg.theta = (floop - (cfg.n * fref)) / gcd_fll; - cfg.lambda = fref / gcd_fll; + cfg->theta = (floop - (cfg->n * fref)) / gcd_fll; + cfg->lambda = fref / gcd_fll; + cfg->fin = fin; + cfg->fvco = fout; } fll->ref_src = source; @@ -4861,7 +4862,7 @@ int arizona_set_fll_ao(struct arizona_fll *fll, int source, fll->fout = fout; if (fout) - ret = arizona_enable_fll_ao(fll, &cfg, patch, patch_size); + ret = arizona_enable_fll_ao(fll, cfg, cfg->patch, cfg->patch_size); else arizona_disable_fll_ao(fll); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index f841e13153e..857215b8f18 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -409,6 +409,8 @@ struct arizona_fll_cfg { int outdiv; int fratio; int gain; + const struct reg_sequence *patch; + unsigned int patch_size; }; struct arizona_fll { From 7e0f493a7fd877a342c2b47cd343ec11f76e4a3d Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Fri, 28 Aug 2015 12:37:18 +0100 Subject: [PATCH 0946/1167] mfd: moon: Mark aif2_tx{7/8} mixer registers as readable Change-Id: I74c7c95ad95d92ae4baad40037de3e02374bda97 Signed-off-by: Nikesh Oswal --- drivers/mfd/moon-tables.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/mfd/moon-tables.c b/drivers/mfd/moon-tables.c index 5b073ca057a..2ef5f571af5 100644 --- a/drivers/mfd/moon-tables.c +++ b/drivers/mfd/moon-tables.c @@ -652,6 +652,22 @@ static const struct reg_default moon_reg_default[] = { { 0x0000076d, 0x0080 }, { 0x0000076e, 0x0000 }, { 0x0000076f, 0x0080 }, + { 0x00000770, 0x0000 }, + { 0x00000771, 0x0080 }, + { 0x00000772, 0x0000 }, + { 0x00000773, 0x0080 }, + { 0x00000774, 0x0000 }, + { 0x00000775, 0x0080 }, + { 0x00000776, 0x0000 }, + { 0x00000777, 0x0080 }, + { 0x00000778, 0x0000 }, + { 0x00000779, 0x0080 }, + { 0x0000077a, 0x0000 }, + { 0x0000077b, 0x0080 }, + { 0x0000077c, 0x0000 }, + { 0x0000077d, 0x0080 }, + { 0x0000077e, 0x0000 }, + { 0x0000077f, 0x0080 }, { 0x00000780, 0x0000 }, { 0x00000781, 0x0080 }, { 0x00000782, 0x0000 }, @@ -2078,6 +2094,22 @@ static bool moon_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME: case ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE: case ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX7MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX7MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX7MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX7MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX7MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX7MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX7MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX7MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX8MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX8MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX8MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX8MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX8MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX8MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX8MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX8MIX_INPUT_4_VOLUME: case ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE: case ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME: case ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE: From c603e850eb8769db6c4a8fa7fec6bcf05ba72af4 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 12 Aug 2015 13:45:28 +0100 Subject: [PATCH 0947/1167] mfd: moon: add fll{1/2}_efs2 registers Change-Id: I21b458d44c0574835a7ec152026599112acbfbc6 Signed-off-by: Nikesh Oswal --- drivers/mfd/moon-tables.c | 4 ++++ include/linux/mfd/arizona/registers.h | 12 ++++++++++++ 2 files changed, 16 insertions(+) diff --git a/drivers/mfd/moon-tables.c b/drivers/mfd/moon-tables.c index 2ef5f571af5..e0b8e4b7ed0 100644 --- a/drivers/mfd/moon-tables.c +++ b/drivers/mfd/moon-tables.c @@ -215,6 +215,7 @@ static const struct reg_default moon_reg_default[] = { { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */ { 0x00000178, 0x0000 }, { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */ + { 0x0000017a, 0x2906 }, /* R377 (0x17A) - FLL1 Efs 2 */ { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 1 */ { 0x00000182, 0x0000 }, /* R386 (0x182) - FLL1 Synchroniser 2 */ { 0x00000183, 0x0000 }, /* R387 (0x183) - FLL1 Synchroniser 3 */ @@ -233,6 +234,7 @@ static const struct reg_default moon_reg_default[] = { { 0x00000197, 0x0281 }, /* R407 (0x197) - FLL2 Loop Filter Test 1 */ { 0x00000198, 0x0000 }, { 0x00000199, 0x0000 }, /* R409 (0x199) - FLL2 Control 7 */ + { 0x0000019a, 0x2906 }, /* R410 (0x19A) - FLL2 Efs 2 */ { 0x000001a1, 0x0000 }, /* R417 (0x1A1) - FLL2 Synchroniser 1 */ { 0x000001a2, 0x0000 }, /* R418 (0x1A2) - FLL2 Synchroniser 2 */ { 0x000001a3, 0x0000 }, /* R419 (0x1A3) - FLL2 Synchroniser 3 */ @@ -1634,6 +1636,7 @@ static bool moon_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_FLL1_CONTROL_5: case ARIZONA_FLL1_CONTROL_6: case ARIZONA_FLL1_CONTROL_7: + case ARIZONA_FLL1_EFS_2: case ARIZONA_FLL1_LOOP_FILTER_TEST_1: case ARIZONA_FLL1_NCO_TEST_0: case ARIZONA_FLL1_SYNCHRONISER_1: @@ -1652,6 +1655,7 @@ static bool moon_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_FLL2_CONTROL_5: case ARIZONA_FLL2_CONTROL_6: case ARIZONA_FLL2_CONTROL_7: + case ARIZONA_FLL2_EFS_2: case ARIZONA_FLL2_LOOP_FILTER_TEST_1: case ARIZONA_FLL2_NCO_TEST_0: case ARIZONA_FLL2_SYNCHRONISER_1: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 209d52be113..4f79a16b227 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -97,6 +97,7 @@ #define ARIZONA_FLL1_LOOP_FILTER_TEST_1 0x177 #define ARIZONA_FLL1_NCO_TEST_0 0x178 #define ARIZONA_FLL1_CONTROL_7 0x179 +#define ARIZONA_FLL1_EFS_2 0x17A #define ARIZONA_FLL1_SYNCHRONISER_1 0x181 #define ARIZONA_FLL1_SYNCHRONISER_2 0x182 #define ARIZONA_FLL1_SYNCHRONISER_3 0x183 @@ -124,6 +125,7 @@ #define ARIZONA_FLL2_LOOP_FILTER_TEST_1 0x197 #define ARIZONA_FLL2_NCO_TEST_0 0x198 #define ARIZONA_FLL2_CONTROL_7 0x199 +#define ARIZONA_FLL2_EFS_2 0x19A #define ARIZONA_FLL2_SYNCHRONISER_1 0x1A1 #define ARIZONA_FLL2_SYNCHRONISER_2 0x1A2 #define ARIZONA_FLL2_SYNCHRONISER_3 0x1A3 @@ -3182,6 +3184,16 @@ #define ARIZONA_FLL1_GAIN_SHIFT 2 /* FLL1_GAIN */ #define ARIZONA_FLL1_GAIN_WIDTH 4 /* FLL1_GAIN */ +/* + * R378 (0x17A) - FLL1 EFS 2 + */ +#define ARIZONA_FLL1_PHASE_GAIN_MASK 0xF000 /* FLL1_PHASE_GAIN */ +#define ARIZONA_FLL1_PHASE_GAIN_SHIFT 12 /* FLL1_PHASE_GAIN */ +#define ARIZONA_FLL1_PHASE_GAIN_WIDTH 4 /* FLL1_PHASE_GAIN */ +#define ARIZONA_FLL1_PHASE_ENA_MASK 0x0800 /* FLL1_PHASE_ENA */ +#define ARIZONA_FLL1_PHASE_ENA_SHIFT 11 /* FLL1_PHASE_ENA */ +#define ARIZONA_FLL1_PHASE_ENA_WIDTH 1 /* FLL1_PHASE_ENA */ + /* * R385 (0x181) - FLL1 Synchroniser 1 */ From 596fa51f08a0d42ec4645674d5945c5812f60960 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 12 Aug 2015 13:48:56 +0100 Subject: [PATCH 0948/1167] ASoC: arizona: change the fll computations for moon the fll set-up algorithm for moon is slightly different than other arizona chips and it is as below: 1) refclkdiv should be as small as possible such that fref < 13.5MHz 2) fratio should be as small as as possible such that N < 1024 3) gain is dependent on fref, if fref > 768k, gain = 8, else, gain =4 4) pseudo-fractional mode should no longer be used 5) phase_ena should be enabled in integer mode Change-Id: I2394b9502036ad4aa9d2898b071489dc462cad14 Signed-off-by: Nikesh Oswal Signed-off-by: bsapthagiri --- sound/soc/codecs/arizona.c | 121 +++++++++++++++++++++++++++++++------ 1 file changed, 102 insertions(+), 19 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 84b2d18f755..0bbc71323d2 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -56,6 +56,7 @@ #define ARIZONA_FLL_VCO_CORNER 141900000 #define ARIZONA_FLL_MAX_FREF 13500000 +#define ARIZONA_FLL_MAX_N 1023 #define ARIZONA_FLLAO_MAX_FREF 12288000 #define ARIZONA_FLLAO_MIN_N 4 #define ARIZONA_FLLAO_MAX_N 1023 @@ -4189,9 +4190,34 @@ static int arizona_validate_fll(struct arizona_fll *fll, return 0; } -static int arizona_find_fratio(unsigned int fref, int *fratio) +static int arizona_find_fratio(struct arizona_fll *fll, unsigned int fref, + unsigned int fvco, int *fratio, bool sync) { - int i; + int i, ratio; + + switch (fll->arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8280: + case WM8998: + case WM1814: + case WM8285: + case WM1840: + case WM1831: + case CS47L24: + case CS47L35: + break; + default: + if (!sync) { + ratio = 1; + while ((fvco / (ratio * fref)) > ARIZONA_FLL_MAX_N) + ratio++; + *fratio = ratio - 1; + return ratio; + } + break; + } /* Find an appropriate FLL_FRATIO */ for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) { @@ -4227,7 +4253,7 @@ static int arizona_calc_fratio(struct arizona_fll *fll, } /* Find an appropriate FLL_FRATIO */ - init_ratio = arizona_find_fratio(fref, &cfg->fratio); + init_ratio = arizona_find_fratio(fll, fref, fvco, &cfg->fratio, sync); if (init_ratio < 0) { arizona_fll_err(fll, "Unable to find FRATIO for fref=%uHz\n", fref); @@ -4243,12 +4269,13 @@ static int arizona_calc_fratio(struct arizona_fll *fll, if (fll->arizona->rev < 3 || sync) return init_ratio; break; - case CS47L90: - case CS47L91: - if (!sync) - cfg->fratio = init_ratio - 1; - return init_ratio; - default: + case WM8998: + case WM1814: + case WM8285: + case WM1840: + case WM1831: + case CS47L24: + case CS47L35: if (fref == 11289600 && fvco == 90316800) { if (!sync) cfg->fratio = init_ratio - 1; @@ -4257,6 +4284,9 @@ static int arizona_calc_fratio(struct arizona_fll *fll, if (sync) return init_ratio; + break; + default: + return init_ratio; } cfg->fratio = init_ratio - 1; @@ -4289,7 +4319,7 @@ static int arizona_calc_fratio(struct arizona_fll *fll, div *= 2; fref /= 2; refdiv++; - init_ratio = arizona_find_fratio(fref, NULL); + init_ratio = arizona_find_fratio(fll, fref, fvco, NULL, sync); } arizona_fll_warn(fll, "Falling back to integer mode operation\n"); @@ -4348,16 +4378,36 @@ static int arizona_calc_fll(struct arizona_fll *fll, cfg->lambda >>= 1; } - for (i = 0; i < ARRAY_SIZE(fll_gains); i++) { - if (fll_gains[i].min <= fref && fref <= fll_gains[i].max) { - cfg->gain = fll_gains[i].gain; + switch (fll->arizona->type) { + default: + if (!sync) { + cfg->gain = fref > 768000 ? 3 : 2; break; } - } - if (i == ARRAY_SIZE(fll_gains)) { - arizona_fll_err(fll, "Unable to find gain for fref=%uHz\n", - fref); - return -EINVAL; + /* for sync loop fall through */ + case WM5102: + case WM5110: + case WM8997: + case WM8280: + case WM8998: + case WM1814: + case WM8285: + case WM1840: + case WM1831: + case CS47L24: + case CS47L35: + for (i = 0; i < ARRAY_SIZE(fll_gains); i++) { + if (fll_gains[i].min <= fref && fref <= fll_gains[i].max) { + cfg->gain = fll_gains[i].gain; + break; + } + } + if (i == ARRAY_SIZE(fll_gains)) { + arizona_fll_err(fll, "Unable to find gain for fref=%uHz\n", + fref); + return -EINVAL; + } + break; } cfg->fin = fin; @@ -4484,7 +4534,7 @@ static int arizona_enable_fll(struct arizona_fll *fll) int already_enabled = arizona_is_enabled_fll(fll); struct arizona_fll_cfg *ref_cfg = &(fll->ref_cfg); struct arizona_fll_cfg *sync_cfg = &(fll->sync_cfg); - bool fll_change; + bool fll_change, change; unsigned int fsync_freq; if (already_enabled < 0) @@ -4546,6 +4596,39 @@ static int arizona_enable_fll(struct arizona_fll *fll) ARIZONA_FLL1_SYNC_BW, ARIZONA_FLL1_SYNC_BW); + switch (fll->arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8280: + case WM8998: + case WM1814: + case WM8285: + case WM1840: + case WM1831: + case CS47L24: + case CS47L35: + break; + default: + if ((!use_sync) && (ref_cfg->theta == 0)) + regmap_update_bits_check(arizona->regmap, + fll->base + 0xA, + ARIZONA_FLL1_PHASE_ENA_MASK | + ARIZONA_FLL1_PHASE_GAIN_MASK, + (1 << ARIZONA_FLL1_PHASE_ENA_SHIFT) | + (2 << ARIZONA_FLL1_PHASE_GAIN_SHIFT), + &change); + else + regmap_update_bits_check(arizona->regmap, + fll->base + 0xA, + ARIZONA_FLL1_PHASE_ENA_MASK | + ARIZONA_FLL1_PHASE_GAIN_MASK, + 2 << ARIZONA_FLL1_PHASE_GAIN_SHIFT, + &change); + fll_change |= change; + break; + } + if (!already_enabled) pm_runtime_get(arizona->dev); From c8a7383fedd80be38903ce531a1bbdc7d27f5b3e Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Fri, 21 Aug 2015 11:56:31 +0100 Subject: [PATCH 0949/1167] ASoC: moon: fix the noise gate threshold levels noise gate threshold levels have moved down by -18db Change-Id: I4f856a2047fdacbaf203b587a33a72881efdf79a Signed-off-by: Nikesh Oswal --- sound/soc/codecs/moon.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 15c5962976a..17c6d153d30 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -631,7 +631,7 @@ static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); static DECLARE_TLV_DB_SCALE(noise_tlv, -13200, 600, 0); -static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); +static DECLARE_TLV_DB_SCALE(ng_tlv, -12000, 600, 0); #define MOON_NG_SRC(name, base) \ SOC_SINGLE(name " NG HPOUT1L Switch", base, 0, 1, 0), \ From 04ee5ba59f1e0a9bf718faa33c5fafcbb416b80f Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Fri, 21 Aug 2015 14:25:41 +0100 Subject: [PATCH 0950/1167] ASoC: arizona: change fll_ao patch and gains change the fll_ao patch and gains to reflect the optimum values as determined by the design team Change-Id: Idb5672546e6fcc4e796fc33b054e5749dd39fdee Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 0bbc71323d2..e66f8297cd6 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -182,10 +182,10 @@ static const int arizona_aif4_inputs[8] = { static unsigned int arizona_aif_sources_cache[ARRAY_SIZE(arizona_aif1_inputs)]; static const struct reg_sequence fll_ao_32K_patch[] = { - { MOON_FLLAO_CONTROL_11, 0x0091 }, + { MOON_FLLAO_CONTROL_11, 0x0085 }, { MOON_FLLAO_CONTROL_10, 0x06DA }, - { MOON_FLLAO_CONTROL_8, 0x0045 }, - { MOON_FLLAO_CONTROL_6, 0x8001 }, + { MOON_FLLAO_CONTROL_8, 0x0077 }, + { MOON_FLLAO_CONTROL_6, 0x8001 }, }; static int arizona_get_sources(struct arizona *arizona, @@ -4910,7 +4910,10 @@ int arizona_set_fll_ao(struct arizona_fll *fll, int source, cfg->refdiv++; } - cfg->gain = fref <= 32768 ? 3 : 0; + /* currently we only support fin=32KHz + so fref will be <= 32KHz for which gain + is fixed to 4 */ + cfg->gain = 4; cfg->fratio = 1; /* start with fb_div as 1 */ floop = fout; From a8fd48fd518ee7ef30f1147d585943268a5bc66c Mon Sep 17 00:00:00 2001 From: V V N Praveen Kumar Date: Fri, 7 Aug 2015 17:08:05 +0530 Subject: [PATCH 0951/1167] mfd: arizona: Adding register for Speaker control Change-Id: Ib6e16e74c5ed5068159ab891d4462170b588985a Signed-off-by: V V N Praveen Kumar --- drivers/mfd/florida-tables.c | 1 + drivers/mfd/largo-tables.c | 1 + drivers/mfd/vegas-tables.c | 1 + drivers/mfd/wm5102-tables.c | 1 + drivers/mfd/wm8997-tables.c | 1 + include/linux/mfd/arizona/registers.h | 15 +++++++++++++++ 6 files changed, 20 insertions(+) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 2baa67ad852..d7721648d0c 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -2138,6 +2138,7 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_HP2_SHORT_CIRCUIT_CTRL: case ARIZONA_HP3_SHORT_CIRCUIT_CTRL: case ARIZONA_HP_TEST_CTRL_1: + case ARIZONA_SPK_CTRL_5: case ARIZONA_AIF1_BCLK_CTRL: case ARIZONA_AIF1_TX_PIN_CTRL: case ARIZONA_AIF1_RX_PIN_CTRL: diff --git a/drivers/mfd/largo-tables.c b/drivers/mfd/largo-tables.c index 021085df8c0..d8739254f62 100644 --- a/drivers/mfd/largo-tables.c +++ b/drivers/mfd/largo-tables.c @@ -931,6 +931,7 @@ static bool largo_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DAC_AEC_CONTROL_1: case ARIZONA_NOISE_GATE_CONTROL: case ARIZONA_HP1_SHORT_CIRCUIT_CTRL: + case ARIZONA_SPK_CTRL_5: case ARIZONA_AIF1_BCLK_CTRL: case ARIZONA_AIF1_TX_PIN_CTRL: case ARIZONA_AIF1_RX_PIN_CTRL: diff --git a/drivers/mfd/vegas-tables.c b/drivers/mfd/vegas-tables.c index 0920e189541..1c09371cc77 100644 --- a/drivers/mfd/vegas-tables.c +++ b/drivers/mfd/vegas-tables.c @@ -996,6 +996,7 @@ static bool vegas_readable_register(struct device *dev, unsigned int reg) case ARIZONA_PDM_SPK1_CTRL_1: case ARIZONA_PDM_SPK1_CTRL_2: case ARIZONA_HP_TEST_CTRL_13: + case ARIZONA_SPK_CTRL_5: case ARIZONA_AIF1_BCLK_CTRL: case ARIZONA_AIF1_TX_PIN_CTRL: case ARIZONA_AIF1_RX_PIN_CTRL: diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index 6ea51ff6d76..89b03107f60 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -1258,6 +1258,7 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_NOISE_GATE_CONTROL: case ARIZONA_PDM_SPK1_CTRL_1: case ARIZONA_PDM_SPK1_CTRL_2: + case ARIZONA_SPK_CTRL_5: case ARIZONA_DAC_COMP_1: case ARIZONA_DAC_COMP_2: case ARIZONA_DAC_COMP_3: diff --git a/drivers/mfd/wm8997-tables.c b/drivers/mfd/wm8997-tables.c index 9dea52f64e9..23f601db427 100644 --- a/drivers/mfd/wm8997-tables.c +++ b/drivers/mfd/wm8997-tables.c @@ -936,6 +936,7 @@ static bool wm8997_readable_register(struct device *dev, unsigned int reg) case ARIZONA_NOISE_GATE_CONTROL: case ARIZONA_PDM_SPK1_CTRL_1: case ARIZONA_PDM_SPK1_CTRL_2: + case ARIZONA_SPK_CTRL_5: case ARIZONA_AIF1_BCLK_CTRL: case ARIZONA_AIF1_TX_PIN_CTRL: case ARIZONA_AIF1_RX_PIN_CTRL: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 4f79a16b227..3256a8f4c4b 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -348,6 +348,7 @@ #define ARIZONA_HP_TEST_CTRL_6 0x4A9 #define ARIZONA_SPK_CTRL_2 0x4B5 #define ARIZONA_SPK_CTRL_3 0x4B6 +#define ARIZONA_SPK_CTRL_5 0x4B8 #define ARIZONA_DAC_COMP_1 0x4DC #define ARIZONA_DAC_COMP_2 0x4DD #define ARIZONA_DAC_COMP_3 0x4DE @@ -6022,6 +6023,20 @@ #define ARIZONA_HP1R_TST_IBIAS_SHIFT 0 /* HP1R_TST_IBIAS - [1:0] */ #define ARIZONA_HP1R_TST_IBIAS_WIDTH 2 /* HP1R_TST_IBIAS - [1:0] */ +/* + * R1208 (0x4B8) - Speaker control 5 + */ +#define ARIZONA_SPK_THERM_ENA 0x1000 /* SPK_THERM_ENA */ +#define ARIZONA_SPK_THERM_ENA_MASK 0x1000 /* SPK_THERM_ENA */ +#define ARIZONA_SPK_THERM_ENA_SHIFT 12 /* SPK_THERM_ENA */ +#define ARIZONA_SPK_THERM_ENA_WIDTH 1 /* SPK_THERM_ENA */ +#define FLORIDA_SPK_THERM_ENA 0x0800 /* SPK_THERM_ENA */ +#define FLORIDA_SPK_THERM_ENA_MASK 0x0800 /* SPK_THERM_ENA */ +#define FLORIDA_SPK_THERM_ENA_SHIFT 11 /* SPK_THERM_ENA */ +#define FLORIDA_SPK_THERM_ENA_WIDTH 1 /* SPK_THERM_ENA */ + + + /* * R1244 (0x4DC) - DAC comp 1 */ From 782a95b58432dfa89cb17441c419e9d3870a46ee Mon Sep 17 00:00:00 2001 From: Stuart Henderson Date: Thu, 24 Sep 2015 11:27:53 +0100 Subject: [PATCH 0952/1167] mfd: arizona: Remove negative short circuit IRQs. These IRQs don't exist on largo, so remove them from the IRQ table. Change-Id: Ie249a52da187ad353358863588faa2e75e670556 Signed-off-by: Stuart Henderson --- drivers/mfd/largo-tables.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/mfd/largo-tables.c b/drivers/mfd/largo-tables.c index d8739254f62..58feddda206 100644 --- a/drivers/mfd/largo-tables.c +++ b/drivers/mfd/largo-tables.c @@ -164,15 +164,9 @@ static const struct regmap_irq largo_irqs[ARIZONA_NUM_IRQ] = { [ARIZONA_IRQ_SPK1L_SHORT] = { .reg_offset = 5, .mask = ARIZONA_SPK1L_SHORT_EINT1 }, - [ARIZONA_IRQ_HP1R_SC_NEG] = { - .reg_offset = 5, .mask = ARIZONA_HP1R_SC_NEG_EINT1 - }, [ARIZONA_IRQ_HP1R_SC_POS] = { .reg_offset = 5, .mask = ARIZONA_HP1R_SC_POS_EINT1 }, - [ARIZONA_IRQ_HP1L_SC_NEG] = { - .reg_offset = 5, .mask = ARIZONA_HP1L_SC_NEG_EINT1 - }, [ARIZONA_IRQ_HP1L_SC_POS] = { .reg_offset = 5, .mask = ARIZONA_HP1L_SC_POS_EINT1 }, From d6f4b77fc3547e5949c6c590b39c3f8e6782a253 Mon Sep 17 00:00:00 2001 From: Stuart Henderson Date: Wed, 30 Sep 2015 14:45:28 +0100 Subject: [PATCH 0953/1167] mfd: arizona: Add missing short circuit irqs to clearwater and marley The short circuit IRQs for clearwater and marley were missing from their respective regmap_irq tables. Add these to clearwater_irqs and marley_irqs. Change-Id: I08ef23ca8eb77fc6c380c0611c42c2a1ae498c81 Signed-off-by: Stuart Henderson --- drivers/mfd/clearwater-tables.c | 13 +++++++++++++ drivers/mfd/marley-tables.c | 9 +++++++++ 2 files changed, 22 insertions(+) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index 2418554b4bb..7ef8992d3ad 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -415,6 +415,19 @@ static const struct regmap_irq clearwater_irqs[ARIZONA_NUM_IRQ] = { [ARIZONA_IRQ_DSP_IRQ8] = { .reg_offset = 10, .mask = CLEARWATER_DSP_IRQ8_EINT1}, + [ARIZONA_IRQ_HP3R_SC_POS] = { .reg_offset = 11, + .mask = CLEARWATER_HP3R_SC_EINT1}, + [ARIZONA_IRQ_HP3L_SC_POS] = { .reg_offset = 11, + .mask = CLEARWATER_HP3L_SC_EINT1}, + [ARIZONA_IRQ_HP2R_SC_POS] = { .reg_offset = 11, + .mask = CLEARWATER_HP2R_SC_EINT1}, + [ARIZONA_IRQ_HP2L_SC_POS] = { .reg_offset = 11, + .mask = CLEARWATER_HP2L_SC_EINT1}, + [ARIZONA_IRQ_HP1R_SC_POS] = { .reg_offset = 11, + .mask = CLEARWATER_HP1R_SC_EINT1}, + [ARIZONA_IRQ_HP1L_SC_POS] = { .reg_offset = 11, + .mask = CLEARWATER_HP1L_SC_EINT1}, + [ARIZONA_IRQ_SPK_OVERHEAT_WARN] = { .reg_offset = 14, .mask = CLEARWATER_SPK_OVERHEAT_WARN_EINT1}, [ARIZONA_IRQ_SPK_OVERHEAT] = { .reg_offset = 14, diff --git a/drivers/mfd/marley-tables.c b/drivers/mfd/marley-tables.c index 8e40811837d..b6378a207e9 100644 --- a/drivers/mfd/marley-tables.c +++ b/drivers/mfd/marley-tables.c @@ -70,6 +70,15 @@ static const struct regmap_irq marley_irqs[ARIZONA_NUM_IRQ] = { [ARIZONA_IRQ_DSP_IRQ8] = { .reg_offset = 10, .mask = CLEARWATER_DSP_IRQ8_EINT1}, + [ARIZONA_IRQ_HP2R_SC_POS] = { .reg_offset = 11, + .mask = CLEARWATER_HP2R_SC_EINT1}, + [ARIZONA_IRQ_HP2L_SC_POS] = { .reg_offset = 11, + .mask = CLEARWATER_HP2L_SC_EINT1}, + [ARIZONA_IRQ_HP1R_SC_POS] = { .reg_offset = 11, + .mask = CLEARWATER_HP1R_SC_EINT1}, + [ARIZONA_IRQ_HP1L_SC_POS] = { .reg_offset = 11, + .mask = CLEARWATER_HP1L_SC_EINT1}, + [ARIZONA_IRQ_SPK_OVERHEAT_WARN] = { .reg_offset = 14, .mask = CLEARWATER_SPK_OVERHEAT_WARN_EINT1}, [ARIZONA_IRQ_SPK_OVERHEAT] = { .reg_offset = 14, From a558ca08467d7e0b7898f2f20cd53d04632ba27a Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 4 Sep 2015 16:26:29 +0100 Subject: [PATCH 0954/1167] switch: arizona: force_micbias must switch micbias when changing detect mode The previous behaviour of the driver when force_micbias was enabled was to enable the MICBIAS pin for the initial micd_config mode and leave it enabled through the entire mic detect process. This won't work when there are multiple micd_configs (for different types of probing) and they require different MICBIAS outputs. This patch fixes this so that when the mic detect state machine moves to the next micd_config mode it will disable any forced micbias for that mode and then enable any forced micbias for the new mode. Change-Id: Ic758ebb198c4b1f98f5753130356bfcf0a3c2722 Signed-off-by: Richard Fitzgerald Signed-off-by: bsapthagiri --- drivers/switch/switch-arizona.c | 70 +++++++++++++++++++++++++++------ 1 file changed, 58 insertions(+), 12 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index be9c14e4f45..53d5cc996fc 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -535,7 +535,10 @@ static int arizona_extcon_set_micd_bias(struct arizona_extcon_info *info, return 0; if (micd_bias->enabled) { + dev_dbg(arizona->dev, "disabling %s\n", old_widget); + mutex_lock(&dapm->card->dapm_mutex); + ret = snd_soc_dapm_disable_pin(dapm, old_widget); if (ret != 0) dev_warn(arizona->dev, @@ -546,7 +549,10 @@ static int arizona_extcon_set_micd_bias(struct arizona_extcon_info *info, } if (enable) { + dev_dbg(arizona->dev, "enabling %s\n", new_widget); + mutex_lock(&dapm->card->dapm_mutex); + ret = snd_soc_dapm_force_enable_pin(dapm, new_widget); if (ret != 0) dev_warn(arizona->dev, "Failed to enable %s: %d\n", @@ -564,8 +570,6 @@ static void arizona_extcon_set_mode(struct arizona_extcon_info *info, int mode) { struct arizona *arizona = info->arizona; - mode %= info->micd_num_modes; - if (arizona->pdata.micd_pol_gpio > 0) gpio_set_value_cansleep(arizona->pdata.micd_pol_gpio, info->micd_modes[mode].gpio); @@ -602,9 +606,6 @@ static void arizona_extcon_set_mode(struct arizona_extcon_info *info, int mode) info->micd_mode = mode; - arizona_extcon_set_micd_bias(info, info->micd_modes[mode].bias, - info->micd_bias.enabled); - dev_dbg(arizona->dev, "Set jack polarity to %d\n", mode); } @@ -614,7 +615,7 @@ static const char *arizona_extcon_get_micbias(struct arizona_extcon_info *info) switch (arizona->type) { case CS47L35: - switch (info->micd_modes[0].bias) { + switch (info->micd_modes[info->micd_mode].bias) { case 1: return "MICBIAS1A"; case 2: @@ -626,7 +627,7 @@ static const char *arizona_extcon_get_micbias(struct arizona_extcon_info *info) } case CS47L90: case CS47L91: - switch (info->micd_modes[0].bias) { + switch (info->micd_modes[info->micd_mode].bias) { case 0: return "MICBIAS1A"; case 1: @@ -648,7 +649,7 @@ static const char *arizona_extcon_get_micbias(struct arizona_extcon_info *info) } break; default: - switch (info->micd_modes[0].bias) { + switch (info->micd_modes[info->micd_mode].bias) { case 1: return "MICBIAS1"; case 2: @@ -670,6 +671,8 @@ static void arizona_extcon_pulse_micbias(struct arizona_extcon_info *info) struct snd_soc_dapm_context *dapm = arizona->dapm; int ret; + dev_dbg(arizona->dev, "enabling %s\n", widget); + mutex_lock(&dapm->card->dapm_mutex); ret = snd_soc_dapm_force_enable_pin(dapm, widget); @@ -685,6 +688,8 @@ static void arizona_extcon_pulse_micbias(struct arizona_extcon_info *info) return; if (!arizona->pdata.micd_force_micbias) { + dev_dbg(arizona->dev, "disabling %s\n", widget); + mutex_lock(&dapm->card->dapm_mutex); ret = snd_soc_dapm_disable_pin(arizona->dapm, widget); @@ -698,6 +703,48 @@ static void arizona_extcon_pulse_micbias(struct arizona_extcon_info *info) } } +static void arizona_extcon_change_mode(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + int old_mode = info->micd_mode; + int new_mode = (info->micd_mode + 1) % info->micd_num_modes; + bool change_bias = false; + const char *widget; + int ret; + + dev_dbg(arizona->dev, "change micd mode %d->%d (bias %d->%d\n)", + old_mode, new_mode, + info->micd_modes[old_mode].bias, + info->micd_modes[new_mode].bias); + + if (info->micd_modes[old_mode].bias != + info->micd_modes[new_mode].bias) { + change_bias = true; + + if (arizona->pdata.micd_force_micbias) { + widget = arizona_extcon_get_micbias(info); + dev_dbg(arizona->dev, "disabling %s\n", widget); + + ret = snd_soc_dapm_disable_pin(arizona->dapm, widget); + if (ret) + dev_warn(arizona->dev, + "Failed to disable %s: %d\n", + widget, ret); + + snd_soc_dapm_sync(arizona->dapm); + } + } + + arizona_extcon_set_mode(info, new_mode); + + if (change_bias) { + arizona_extcon_set_micd_bias(info, + info->micd_modes[new_mode].bias, + info->micd_bias.enabled); + arizona_extcon_pulse_micbias(info); + } +} + static int arizona_micd_adc_read(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; @@ -1825,6 +1872,8 @@ void arizona_micd_stop(struct arizona_extcon_info *info) regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, ARIZONA_MICD_ENA, 0); + dev_dbg(arizona->dev, "disabling %s\n", widget); + mutex_lock(&dapm->card->dapm_mutex); ret = snd_soc_dapm_disable_pin(dapm, widget); @@ -2470,10 +2519,7 @@ int arizona_micd_mic_reading(struct arizona_extcon_info *info, int val) dev_dbg(arizona->dev, "Detected HP/line\n"); goto done; } else { - info->micd_mode++; - if (info->micd_mode == info->micd_num_modes) - info->micd_mode = 0; - arizona_extcon_set_mode(info, info->micd_mode); + arizona_extcon_change_mode(info); info->jack_flips++; From a3d924e00d171036d439bb5008efc62ff7940d7f Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 11 Nov 2015 21:21:06 +0900 Subject: [PATCH 0955/1167] ASoC: arizona: fix bclk for sample rates that are multiple of 4K For 12K sample rate the bclk from 44.1K table was getting selected which was wrong this patch fixes this by selecting bclk from the 48K table Change-Id: I0acc9328c68f00f7ed5fc5fc0cba55b7d98f42d7 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index e66f8297cd6..b69411783a4 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -3875,7 +3875,7 @@ static int arizona_hw_params(struct snd_pcm_substream *substream, bool reconfig; unsigned int aif_tx_state = 0, aif_rx_state = 0; - if (params_rate(params) % 8000) + if (params_rate(params) % 4000) rates = &arizona_44k1_bclk_rates[0]; else rates = &arizona_48k_bclk_rates[0]; From 00c863a3a5229d6ee89566d85f37ffda6c5e9d1a Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 11 Jun 2015 14:12:19 +0100 Subject: [PATCH 0956/1167] Revert "ASoC: wm_adsp: Add basic debugfs entries" This reverts commit 3b80f66cebfeb1ad2aff28585d033718f43d1183. Will be replaced with upstream implementation. Change-Id: I3c9ac074666039214f9cdb325959fcd05ac54b4d Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 9 +- sound/soc/codecs/florida.c | 9 +- sound/soc/codecs/largo.c | 6 - sound/soc/codecs/marley.c | 6 - sound/soc/codecs/wm5102.c | 4 - sound/soc/codecs/wm_adsp.c | 275 +--------------------------------- sound/soc/codecs/wm_adsp.h | 24 +-- 7 files changed, 9 insertions(+), 324 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 630b6fbb412..c1ae4ef5366 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2964,10 +2964,7 @@ static int clearwater_codec_probe(struct snd_soc_codec *codec) { struct clearwater_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; - int i, ret; - - for (i = 0; i < CLEARWATER_NUM_ADSP; i++) - wm_adsp_init_debugfs(&priv->core.adsp[i], codec); + int ret; codec->control_data = priv->core.arizona->regmap; priv->core.arizona->dapm = &codec->dapm; @@ -3029,10 +3026,6 @@ static int clearwater_codec_remove(struct snd_soc_codec *codec) { struct clearwater_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; - int i; - - for (i = 0; i < CLEARWATER_NUM_ADSP; i++) - wm_adsp_cleanup_debugfs(&priv->core.adsp[i]); irq_set_irq_wake(arizona->irq, 0); arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 5200afb606e..1a5e93e1111 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2419,10 +2419,7 @@ static int florida_codec_probe(struct snd_soc_codec *codec) { struct florida_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; - int i, ret; - - for (i = 0; i < FLORIDA_NUM_ADSP; i++) - wm_adsp_init_debugfs(&priv->core.adsp[i], codec); + int ret; codec->control_data = priv->core.arizona->regmap; priv->core.arizona->dapm = &codec->dapm; @@ -2480,10 +2477,6 @@ static int florida_codec_remove(struct snd_soc_codec *codec) { struct florida_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; - int i; - - for (i = 0; i < FLORIDA_NUM_ADSP; i++) - wm_adsp_cleanup_debugfs(&priv->core.adsp[i]); irq_set_irq_wake(arizona->irq, 0); arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index b4976bcd2c7..298691b0991 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -1335,9 +1335,6 @@ static int largo_codec_probe(struct snd_soc_codec *codec) struct arizona *arizona = priv->core.arizona; int ret; - wm_adsp_init_debugfs(&priv->core.adsp[1], codec); - wm_adsp_init_debugfs(&priv->core.adsp[2], codec); - codec->control_data = priv->core.arizona->regmap; priv->core.arizona->dapm = &codec->dapm; @@ -1395,9 +1392,6 @@ static int largo_codec_remove(struct snd_soc_codec *codec) struct largo_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; - wm_adsp_cleanup_debugfs(&priv->core.adsp[1]); - wm_adsp_cleanup_debugfs(&priv->core.adsp[2]); - irq_set_irq_wake(arizona->irq, 0); arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index 1f4abdeb757..f0be1e54b94 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -2047,9 +2047,6 @@ static int marley_codec_probe(struct snd_soc_codec *codec) struct arizona *arizona = priv->core.arizona; int i, ret; - for (i = 0; i < MARLEY_NUM_ADSP; ++i) - wm_adsp_init_debugfs(&priv->core.adsp[i], codec); - codec->control_data = priv->core.arizona->regmap; priv->core.arizona->dapm = &codec->dapm; @@ -2112,9 +2109,6 @@ static int marley_codec_remove(struct snd_soc_codec *codec) struct arizona *arizona = priv->core.arizona; int i; - for (i = 0; i < MARLEY_NUM_ADSP; ++i) - wm_adsp_cleanup_debugfs(&priv->core.adsp[i]); - irq_set_irq_wake(arizona->irq, 0); arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); regmap_update_bits(arizona->regmap, CLEARWATER_IRQ2_MASK_9, diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 919c0e80b24..ed43de9b0d3 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1920,8 +1920,6 @@ static int wm5102_codec_probe(struct snd_soc_codec *codec) struct arizona *arizona = priv->core.arizona; int ret; - wm_adsp_init_debugfs(&priv->core.adsp[0], codec); - codec->control_data = priv->core.arizona->regmap; ret = snd_soc_codec_set_cache_io(codec, 32, 16, SND_SOC_REGMAP); @@ -1970,8 +1968,6 @@ static int wm5102_codec_remove(struct snd_soc_codec *codec) struct wm5102_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; - wm_adsp_cleanup_debugfs(&priv->core.adsp[0]); - irq_set_irq_wake(arizona->irq, 0); arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); regmap_update_bits(arizona->regmap, ARIZONA_IRQ2_STATUS_3_MASK, diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 8784c40b24a..32c42afacb5 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include #include @@ -489,21 +488,6 @@ struct wm_coeff_ctl { struct mutex lock; }; -#ifdef CONFIG_DEBUG_FS -static void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, const char *s); -static void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, const char *s); -#else -static inline void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, - const char *s) -{ -} - -static inline void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, - const char *s) -{ -} -#endif - static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { @@ -1611,8 +1595,6 @@ static int wm_adsp_load(struct wm_adsp *dsp) adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", file, regions, pos - firmware->size); - wm_adsp_debugfs_save_wmfwname(dsp, file); - out_buf: wm_adsp_buf_free(&buf_list); out_fw: @@ -1727,12 +1709,11 @@ static int wm_adsp1_setup_algs(struct wm_adsp *dsp) n_algs = be32_to_cpu(adsp1_id.n_algs); dsp->fw_id = be32_to_cpu(adsp1_id.fw.id); - dsp->fw_id_version = be32_to_cpu(adsp1_id.fw.ver); adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n", dsp->fw_id, - (dsp->fw_id_version & 0xff0000) >> 16, - (dsp->fw_id_version & 0xff00) >> 8, - dsp->fw_id_version & 0xff, + (be32_to_cpu(adsp1_id.fw.ver) & 0xff0000) >> 16, + (be32_to_cpu(adsp1_id.fw.ver) & 0xff00) >> 8, + be32_to_cpu(adsp1_id.fw.ver) & 0xff, n_algs); alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM, @@ -1831,12 +1812,11 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) n_algs = be32_to_cpu(adsp2_id.n_algs); dsp->fw_id = be32_to_cpu(adsp2_id.fw.id); - dsp->fw_id_version = be32_to_cpu(adsp2_id.fw.ver); adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n", dsp->fw_id, - (dsp->fw_id_version & 0xff0000) >> 16, - (dsp->fw_id_version & 0xff00) >> 8, - dsp->fw_id_version & 0xff, + (be32_to_cpu(adsp2_id.fw.ver) & 0xff0000) >> 16, + (be32_to_cpu(adsp2_id.fw.ver) & 0xff00) >> 8, + be32_to_cpu(adsp2_id.fw.ver) & 0xff, n_algs); alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM, @@ -2115,7 +2095,6 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", file, blocks, pos - firmware->size); - wm_adsp_debugfs_save_binname(dsp, file); err = regmap_async_complete(regmap); if (err != 0) { adsp_err(dsp, "Failed to complete async write: %d\n", err); @@ -2536,9 +2515,6 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, dsp->running = false; - wm_adsp_debugfs_save_wmfwname(dsp, NULL); - wm_adsp_debugfs_save_binname(dsp, NULL); - switch (dsp->rev) { case 0: regmap_update_bits(dsp->regmap, @@ -3450,243 +3426,4 @@ irqreturn_t wm_adsp2_bus_error(struct wm_adsp *adsp) return IRQ_HANDLED; } EXPORT_SYMBOL_GPL(wm_adsp2_bus_error); - -#ifdef CONFIG_DEBUG_FS -static void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, const char *s) -{ - kfree(dsp->wmfw_file_loaded); - /* kstrdup returns NULL if (s == NULL) */ - dsp->wmfw_file_loaded = kstrdup(s, GFP_KERNEL); -} - -static void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, const char *s) -{ - kfree(dsp->bin_file_loaded); - dsp->bin_file_loaded = kstrdup(s, GFP_KERNEL); -} - -static ssize_t wm_adsp_debugfs_string_read(struct wm_adsp *dsp, - char __user *user_buf, - size_t count, loff_t *ppos, - const char *string) -{ - char *temp; - int len; - ssize_t ret; - - if (!string || !dsp->running) - return 0; - - temp = kmalloc(PAGE_SIZE, GFP_KERNEL); - if (!temp) - return -ENOMEM; - - len = snprintf(temp, PAGE_SIZE, "%s\n", string); - ret = simple_read_from_buffer(user_buf, count, ppos, temp, len); - kfree(temp); - return ret; -} - -static ssize_t wm_adsp_debugfs_x32_read(struct wm_adsp *dsp, - char __user *user_buf, - size_t count, loff_t *ppos, - int value) -{ - char temp[12]; - int len; - - if (!dsp->running) - return 0; - - len = snprintf(temp, sizeof(temp), "0x%06x\n", value); - return simple_read_from_buffer(user_buf, count, ppos, temp, len); -} - -static ssize_t wm_adsp_debugfs_running_read(struct file *file, - char __user *user_buf, - size_t count, loff_t *ppos) -{ - struct wm_adsp *dsp = file->private_data; - char temp[2]; - - temp[0] = dsp->running ? 'Y' : 'N'; - temp[1] = '\n'; - - return simple_read_from_buffer(user_buf, count, ppos, temp, 2); -} - -static ssize_t wm_adsp_debugfs_wmfw_read(struct file *file, - char __user *user_buf, - size_t count, loff_t *ppos) -{ - struct wm_adsp *dsp = file->private_data; - - return wm_adsp_debugfs_string_read(dsp, user_buf, count, ppos, - dsp->wmfw_file_loaded); -} - -static ssize_t wm_adsp_debugfs_bin_read(struct file *file, - char __user *user_buf, - size_t count, loff_t *ppos) -{ - struct wm_adsp *dsp = file->private_data; - - return wm_adsp_debugfs_string_read(dsp, user_buf, count, ppos, - dsp->bin_file_loaded); -} - -static ssize_t wm_adsp_debugfs_fwid_read(struct file *file, - char __user *user_buf, - size_t count, loff_t *ppos) -{ - struct wm_adsp *dsp = file->private_data; - - return wm_adsp_debugfs_x32_read(dsp, user_buf, count, ppos, - dsp->fw_id); -} - -static ssize_t wm_adsp_debugfs_fwver_read(struct file *file, - char __user *user_buf, - size_t count, loff_t *ppos) -{ - struct wm_adsp *dsp = file->private_data; - - return wm_adsp_debugfs_x32_read(dsp, user_buf, count, ppos, - dsp->fw_id_version); -} - -static ssize_t wm_adsp_debugfs_buffererror_read(struct file *file, - char __user *user_buf, - size_t count, loff_t *ppos) -{ - struct wm_adsp *dsp = file->private_data; - int ret; - u32 host_buffer_error; - - if (!dsp->card) - return 0; - - mutex_lock(&dsp->card->dapm_mutex); - - if (!dsp->running || !dsp->host_buf_ptr) { - mutex_unlock(&dsp->card->dapm_mutex); - return 0; - } - - ret = wm_adsp_host_buffer_read(dsp, - HOST_BUFFER_FIELD(error), - &host_buffer_error); - - mutex_unlock(&dsp->card->dapm_mutex); - - if (ret < 0) { - adsp_err(dsp, "Failed to read host buffer: %d\n", ret); - return 0; - } - - return wm_adsp_debugfs_x32_read(dsp, user_buf, count, ppos, - host_buffer_error); -} - -static const struct { - const char *name; - const struct file_operations fops; -} wm_adsp_debugfs_fops[] = { - { - .name = "running", - .fops = { - .open = simple_open, - .read = wm_adsp_debugfs_running_read, - }, - }, - { - .name = "wmfw_file", - .fops = { - .open = simple_open, - .read = wm_adsp_debugfs_wmfw_read, - }, - }, - { - .name = "bin_file", - .fops = { - .open = simple_open, - .read = wm_adsp_debugfs_bin_read, - }, - }, - { - .name = "fw_id", - .fops = { - .open = simple_open, - .read = wm_adsp_debugfs_fwid_read, - }, - }, - { - .name = "fw_version", - .fops = { - .open = simple_open, - .read = wm_adsp_debugfs_fwver_read, - }, - }, -}; - -static const struct file_operations wm_adsp_debugfs_buffererror_fops = { - .open = simple_open, - .read = wm_adsp_debugfs_buffererror_read, -}; - -void wm_adsp_init_debugfs(struct wm_adsp *dsp, struct snd_soc_codec *codec) -{ - struct dentry *root = NULL; - struct dentry *buffer_dentry = NULL; - char *root_name; - int i; - - if (!codec->debugfs_codec_root) { - adsp_err(dsp, "No codec debugfs root\n"); - goto err; - } - - root_name = kmalloc(PAGE_SIZE, GFP_KERNEL); - if (!root_name) - goto err; - - snprintf(root_name, PAGE_SIZE, "dsp%d", dsp->num); - root = debugfs_create_dir(root_name, codec->debugfs_codec_root); - kfree(root_name); - - if (!root) - goto err; - - for (i = 0; i < ARRAY_SIZE(wm_adsp_debugfs_fops); ++i) { - if (!debugfs_create_file(wm_adsp_debugfs_fops[i].name, - S_IRUGO, root, dsp, - &wm_adsp_debugfs_fops[i].fops)) - goto err; - } - - buffer_dentry = debugfs_create_dir("buffer0", root); - if (!buffer_dentry) - goto err; - - if (!debugfs_create_file("error", S_IRUGO, buffer_dentry, dsp, - &wm_adsp_debugfs_buffererror_fops)) - goto err; - - dsp->debugfs_root = root; - return; - -err: - debugfs_remove_recursive(root); - adsp_err(dsp, "Failed to create debugfs\n"); -} -EXPORT_SYMBOL_GPL(wm_adsp_init_debugfs); - - -void wm_adsp_cleanup_debugfs(struct wm_adsp *dsp) -{ - debugfs_remove_recursive(dsp->debugfs_root); -} -EXPORT_SYMBOL_GPL(wm_adsp_cleanup_debugfs); -#endif - MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 9dbb972f25d..f13ffe838e0 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -106,14 +106,13 @@ struct wm_adsp { struct list_head alg_regions; int fw_id; - int fw_id_version; const struct wm_adsp_region *mem; int num_mems; int fw; int fw_ver; - u32 running; + bool running; struct mutex ctl_lock; struct list_head ctl_list; @@ -137,12 +136,6 @@ struct wm_adsp { struct mutex *fw_lock; struct work_struct boot_work; -#ifdef CONFIG_DEBUG_FS - struct dentry *debugfs_root; - char *wmfw_file_loaded; - char *bin_file_loaded; -#endif - unsigned int lock_regions; }; @@ -165,21 +158,6 @@ extern const struct snd_kcontrol_new wm_adsp2v2_fw_controls[]; int wm_adsp1_init(struct wm_adsp *dsp); int wm_adsp2_init(struct wm_adsp *dsp, struct mutex *fw_lock); - -#ifdef CONFIG_DEBUG_FS -void wm_adsp_init_debugfs(struct wm_adsp *dsp, struct snd_soc_codec *codec); -void wm_adsp_cleanup_debugfs(struct wm_adsp *dsp); -#else -static inline void wm_adsp_init_debugfs(struct wm_adsp *dsp, - struct snd_soc_codec *codec) -{ -} - -void wm_adsp_cleanup_debugfs(struct wm_adsp *dsp) -{ -} -#endif - int wm_adsp1_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); From 8e302c5a0e59966df687c25a72e3074261b6e2e1 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 11 Jun 2015 14:26:03 +0100 Subject: [PATCH 0957/1167] ASoC: wm_adsp: Add codec_probe and codec_remove stubs Currently the only init function in wm_adsp is called by the codec driver early in its probe before the codec has been registered with SOC. This patch adds stubs for the codec_probe and codec_remove stages and calls them from WM5102 and WM5110 codec drivers. This allows us to hang anything that needs setup during the codec probe stage off these functions without further modification of the codec drivers. Signed-off-by: Richard Fitzgerald Signed-off-by: Mark Brown (cherry picked from commit f5e2ce92bd96df99de1ef33fad05e3b3b2d34e54) Added support for largo, clearwater and marley. Change-Id: I65aa317c33526ea1dcdf0c0a19260c11c1bd4675 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 12 +++++++++++- sound/soc/codecs/florida.c | 12 +++++++++++- sound/soc/codecs/largo.c | 11 +++++++++++ sound/soc/codecs/marley.c | 9 +++++++++ sound/soc/codecs/wm5102.c | 6 ++++++ sound/soc/codecs/wm_adsp.c | 12 ++++++++++++ sound/soc/codecs/wm_adsp.h | 2 ++ 7 files changed, 62 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index c1ae4ef5366..846bf099ccb 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2964,7 +2964,7 @@ static int clearwater_codec_probe(struct snd_soc_codec *codec) { struct clearwater_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; - int ret; + int i, ret; codec->control_data = priv->core.arizona->regmap; priv->core.arizona->dapm = &codec->dapm; @@ -2982,6 +2982,12 @@ static int clearwater_codec_probe(struct snd_soc_codec *codec) regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_1, ARIZONA_SAMPLE_RATE_1_MASK, 0x03); + for (i = 0; i < CLEARWATER_NUM_ADSP; ++i) { + ret = wm_adsp2_codec_probe(&priv->core.adsp[i], codec); + if (ret) + return ret; + } + ret = snd_soc_add_codec_controls(codec, wm_adsp2v2_fw_controls, 14); if (ret != 0) return ret; @@ -3026,6 +3032,7 @@ static int clearwater_codec_remove(struct snd_soc_codec *codec) { struct clearwater_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; + int i; irq_set_irq_wake(arizona->irq, 0); arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); @@ -3033,6 +3040,9 @@ static int clearwater_codec_remove(struct snd_soc_codec *codec) CLEARWATER_DRC2_SIG_DET_EINT2, 0); + for (i = 0; i < CLEARWATER_NUM_ADSP; ++i) + wm_adsp2_codec_remove(&priv->core.adsp[i], codec); + priv->core.arizona->dapm = NULL; return 0; diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 1a5e93e1111..bf3cfe38640 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2419,7 +2419,7 @@ static int florida_codec_probe(struct snd_soc_codec *codec) { struct florida_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; - int ret; + int i, ret; codec->control_data = priv->core.arizona->regmap; priv->core.arizona->dapm = &codec->dapm; @@ -2433,6 +2433,12 @@ static int florida_codec_probe(struct snd_soc_codec *codec) arizona_init_mono(codec); arizona_init_input(codec); + for (i = 0; i < FLORIDA_NUM_ADSP; ++i) { + ret = wm_adsp2_codec_probe(&priv->core.adsp[i], codec); + if (ret) + return ret; + } + ret = snd_soc_add_codec_controls(codec, wm_adsp2_fw_controls, 8); if (ret != 0) return ret; @@ -2477,6 +2483,7 @@ static int florida_codec_remove(struct snd_soc_codec *codec) { struct florida_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; + int i; irq_set_irq_wake(arizona->irq, 0); arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); @@ -2484,6 +2491,9 @@ static int florida_codec_remove(struct snd_soc_codec *codec) ARIZONA_IM_DRC2_SIG_DET_EINT2, ARIZONA_IM_DRC2_SIG_DET_EINT2); + for (i = 0; i < FLORIDA_NUM_ADSP; ++i) + wm_adsp2_codec_remove(&priv->core.adsp[i], codec); + priv->core.arizona->dapm = NULL; return 0; diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index 298691b0991..a5a3ac7ba35 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -1347,6 +1347,14 @@ static int largo_codec_probe(struct snd_soc_codec *codec) arizona_init_mono(codec); arizona_init_input(codec); + ret = wm_adsp2_codec_probe(&priv->core.adsp[1], codec); + if (ret) + return ret; + + ret = wm_adsp2_codec_probe(&priv->core.adsp[2], codec); + if (ret) + return ret; + ret = snd_soc_add_codec_controls(codec, &wm_adsp2_fw_controls[2], 4); if (ret != 0) return ret; @@ -1398,6 +1406,9 @@ static int largo_codec_remove(struct snd_soc_codec *codec) ARIZONA_IM_DRC2_SIG_DET_EINT2, ARIZONA_IM_DRC2_SIG_DET_EINT2); + wm_adsp2_codec_remove(&priv->core.adsp[1], codec); + wm_adsp2_codec_remove(&priv->core.adsp[2], codec); + priv->core.arizona->dapm = NULL; return 0; diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index f0be1e54b94..e1e695d937a 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -2063,6 +2063,12 @@ static int marley_codec_probe(struct snd_soc_codec *codec) regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_1, ARIZONA_SAMPLE_RATE_1_MASK, 0x03); + for (i = 0; i < MARLEY_NUM_ADSP; ++i) { + ret = wm_adsp2_codec_probe(&priv->core.adsp[i], codec); + if (ret) + return ret; + } + ret = snd_soc_add_codec_controls(codec, wm_adsp2v2_fw_controls, 6); if (ret != 0) return ret; @@ -2115,6 +2121,9 @@ static int marley_codec_remove(struct snd_soc_codec *codec) CLEARWATER_DRC2_SIG_DET_EINT2, 0); + for (i = 0; i < MARLEY_NUM_ADSP; ++i) + wm_adsp2_codec_remove(&priv->core.adsp[i], codec); + priv->core.arizona->dapm = NULL; return 0; diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index ed43de9b0d3..3806de45b2e 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1926,6 +1926,10 @@ static int wm5102_codec_probe(struct snd_soc_codec *codec) if (ret != 0) return ret; + ret = wm_adsp2_codec_probe(&priv->core.adsp[0], codec); + if (ret) + return ret; + ret = snd_soc_add_codec_controls(codec, wm_adsp2_fw_controls, 2); if (ret != 0) return ret; @@ -1974,6 +1978,8 @@ static int wm5102_codec_remove(struct snd_soc_codec *codec) ARIZONA_IM_DRC1_SIG_DET_EINT2, ARIZONA_IM_DRC1_SIG_DET_EINT2); + wm_adsp2_codec_remove(&priv->core.adsp[0], codec); + priv->core.arizona->dapm = NULL; return 0; diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 32c42afacb5..e3f621aaafc 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2726,6 +2726,18 @@ static inline int wm_adsp_of_parse_adsp(struct wm_adsp *dsp) } #endif +int wm_adsp2_codec_probe(struct wm_adsp *dsp, struct snd_soc_codec *codec) +{ + return 0; +} +EXPORT_SYMBOL_GPL(wm_adsp2_codec_probe); + +int wm_adsp2_codec_remove(struct wm_adsp *dsp, struct snd_soc_codec *codec) +{ + return 0; +} +EXPORT_SYMBOL_GPL(wm_adsp2_codec_remove); + int wm_adsp2_init(struct wm_adsp *dsp, struct mutex *fw_lock) { int ret, i; diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index f13ffe838e0..1d1843d1005 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -158,6 +158,8 @@ extern const struct snd_kcontrol_new wm_adsp2v2_fw_controls[]; int wm_adsp1_init(struct wm_adsp *dsp); int wm_adsp2_init(struct wm_adsp *dsp, struct mutex *fw_lock); +int wm_adsp2_codec_probe(struct wm_adsp *dsp, struct snd_soc_codec *codec); +int wm_adsp2_codec_remove(struct wm_adsp *dsp, struct snd_soc_codec *codec); int wm_adsp1_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); From c9bab62c124e1f7022178ce486fa7d528faa88c1 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 11 Jun 2015 14:38:16 +0100 Subject: [PATCH 0958/1167] ASoC: wm_adsp: Add basic debugfs entries This patch adds some debugfs nodes to get information about the currently running firmware. Signed-off-by: Richard Fitzgerald Signed-off-by: Mark Brown (cherry picked from commit f9f55e31f8a537b7eaccc4fdb243cff938fa428c) Change-Id: Ic4ba28fc15cb76c0e61ec7fb81c9e09925809b59 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 194 ++++++++++++++++++++++++++++++++++++- sound/soc/codecs/wm_adsp.h | 11 ++- 2 files changed, 201 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index e3f621aaafc..34d76f2d66a 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -488,6 +489,175 @@ struct wm_coeff_ctl { struct mutex lock; }; +#ifdef CONFIG_DEBUG_FS +static void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, const char *s) +{ + char *tmp = kasprintf(GFP_KERNEL, "%s\n", s); + + mutex_lock(&dsp->debugfs_lock); + kfree(dsp->wmfw_file_name); + dsp->wmfw_file_name = tmp; + mutex_unlock(&dsp->debugfs_lock); +} + +static void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, const char *s) +{ + char *tmp = kasprintf(GFP_KERNEL, "%s\n", s); + + mutex_lock(&dsp->debugfs_lock); + kfree(dsp->bin_file_name); + dsp->bin_file_name = tmp; + mutex_unlock(&dsp->debugfs_lock); +} + +static void wm_adsp_debugfs_clear(struct wm_adsp *dsp) +{ + mutex_lock(&dsp->debugfs_lock); + kfree(dsp->wmfw_file_name); + kfree(dsp->bin_file_name); + dsp->wmfw_file_name = NULL; + dsp->bin_file_name = NULL; + mutex_unlock(&dsp->debugfs_lock); +} + +static ssize_t wm_adsp_debugfs_wmfw_read(struct file *file, + char __user *user_buf, + size_t count, loff_t *ppos) +{ + struct wm_adsp *dsp = file->private_data; + ssize_t ret; + + mutex_lock(&dsp->debugfs_lock); + + if (!dsp->wmfw_file_name || !dsp->running) + ret = 0; + else + ret = simple_read_from_buffer(user_buf, count, ppos, + dsp->wmfw_file_name, + strlen(dsp->wmfw_file_name)); + + mutex_unlock(&dsp->debugfs_lock); + return ret; +} + +static ssize_t wm_adsp_debugfs_bin_read(struct file *file, + char __user *user_buf, + size_t count, loff_t *ppos) +{ + struct wm_adsp *dsp = file->private_data; + ssize_t ret; + + mutex_lock(&dsp->debugfs_lock); + + if (!dsp->bin_file_name || !dsp->running) + ret = 0; + else + ret = simple_read_from_buffer(user_buf, count, ppos, + dsp->bin_file_name, + strlen(dsp->bin_file_name)); + + mutex_unlock(&dsp->debugfs_lock); + return ret; +} + +static const struct { + const char *name; + const struct file_operations fops; +} wm_adsp_debugfs_fops[] = { + { + .name = "wmfw_file_name", + .fops = { + .open = simple_open, + .read = wm_adsp_debugfs_wmfw_read, + }, + }, + { + .name = "bin_file_name", + .fops = { + .open = simple_open, + .read = wm_adsp_debugfs_bin_read, + }, + }, +}; + +static void wm_adsp2_init_debugfs(struct wm_adsp *dsp, + struct snd_soc_codec *codec) +{ + struct dentry *root = NULL; + char *root_name; + int i; + + if (!codec->debugfs_codec_root) { + adsp_err(dsp, "No codec debugfs root\n"); + goto err; + } + + root_name = kmalloc(PAGE_SIZE, GFP_KERNEL); + if (!root_name) + goto err; + + snprintf(root_name, PAGE_SIZE, "dsp%d", dsp->num); + root = debugfs_create_dir(root_name, codec->debugfs_codec_root); + kfree(root_name); + + if (!root) + goto err; + + if (!debugfs_create_bool("running", S_IRUGO, root, &dsp->running)) + goto err; + + if (!debugfs_create_x32("fw_id", S_IRUGO, root, &dsp->fw_id)) + goto err; + + if (!debugfs_create_x32("fw_version", S_IRUGO, root, + &dsp->fw_id_version)) + goto err; + + for (i = 0; i < ARRAY_SIZE(wm_adsp_debugfs_fops); ++i) { + if (!debugfs_create_file(wm_adsp_debugfs_fops[i].name, + S_IRUGO, root, dsp, + &wm_adsp_debugfs_fops[i].fops)) + goto err; + } + + dsp->debugfs_root = root; + return; + +err: + debugfs_remove_recursive(root); + adsp_err(dsp, "Failed to create debugfs\n"); +} + +static void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp) +{ + wm_adsp_debugfs_clear(dsp); + debugfs_remove_recursive(dsp->debugfs_root); +} +#else +static inline void wm_adsp2_init_debugfs(struct wm_adsp *dsp, + struct snd_soc_codec *codec) +{ +} + +static inline void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp) +{ +} + +static inline void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, + const char *s) +{ +} + +static inline void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, + const char *s) +{ +} + +static inline void wm_adsp_debugfs_clear(struct wm_adsp *dsp) +{ +} +#endif + static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { @@ -1595,6 +1765,8 @@ static int wm_adsp_load(struct wm_adsp *dsp) adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", file, regions, pos - firmware->size); + wm_adsp_debugfs_save_wmfwname(dsp, file); + out_buf: wm_adsp_buf_free(&buf_list); out_fw: @@ -1812,11 +1984,12 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) n_algs = be32_to_cpu(adsp2_id.n_algs); dsp->fw_id = be32_to_cpu(adsp2_id.fw.id); + dsp->fw_id_version = be32_to_cpu(adsp2_id.fw.ver); adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n", dsp->fw_id, - (be32_to_cpu(adsp2_id.fw.ver) & 0xff0000) >> 16, - (be32_to_cpu(adsp2_id.fw.ver) & 0xff00) >> 8, - be32_to_cpu(adsp2_id.fw.ver) & 0xff, + (dsp->fw_id_version & 0xff0000) >> 16, + (dsp->fw_id_version & 0xff00) >> 8, + dsp->fw_id_version & 0xff, n_algs); alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM, @@ -2095,6 +2268,8 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", file, blocks, pos - firmware->size); + wm_adsp_debugfs_save_binname(dsp, file); + err = regmap_async_complete(regmap); if (err != 0) { adsp_err(dsp, "Failed to complete async write: %d\n", err); @@ -2114,6 +2289,9 @@ int wm_adsp1_init(struct wm_adsp *dsp) { INIT_LIST_HEAD(&dsp->alg_regions); +#ifdef CONFIG_DEBUG_FS + mutex_init(&dsp->debugfs_lock); +#endif return 0; } EXPORT_SYMBOL_GPL(wm_adsp1_init); @@ -2513,6 +2691,10 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, wm_adsp_stop_watchdog(dsp); + wm_adsp_debugfs_clear(dsp); + + dsp->fw_id = 0; + dsp->fw_id_version = 0; dsp->running = false; switch (dsp->rev) { @@ -2728,12 +2910,15 @@ static inline int wm_adsp_of_parse_adsp(struct wm_adsp *dsp) int wm_adsp2_codec_probe(struct wm_adsp *dsp, struct snd_soc_codec *codec) { + wm_adsp2_init_debugfs(dsp, codec); return 0; } EXPORT_SYMBOL_GPL(wm_adsp2_codec_probe); int wm_adsp2_codec_remove(struct wm_adsp *dsp, struct snd_soc_codec *codec) { + wm_adsp2_cleanup_debugfs(dsp); + return 0; } EXPORT_SYMBOL_GPL(wm_adsp2_codec_remove); @@ -2790,6 +2975,9 @@ int wm_adsp2_init(struct wm_adsp *dsp, struct mutex *fw_lock) wm_adsp_fw_enum[dsp->num - 1].texts = ctl_names; } +#ifdef CONFIG_DEBUG_FS + mutex_init(&dsp->debugfs_lock); +#endif return 0; } EXPORT_SYMBOL_GPL(wm_adsp2_init); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 1d1843d1005..78286d6cac9 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -106,13 +106,14 @@ struct wm_adsp { struct list_head alg_regions; int fw_id; + int fw_id_version; const struct wm_adsp_region *mem; int num_mems; int fw; int fw_ver; - bool running; + u32 running; struct mutex ctl_lock; struct list_head ctl_list; @@ -137,6 +138,14 @@ struct wm_adsp { struct work_struct boot_work; unsigned int lock_regions; + +#ifdef CONFIG_DEBUG_FS + struct dentry *debugfs_root; + struct mutex debugfs_lock; + char *wmfw_file_name; + char *bin_file_name; +#endif + }; #define WM_ADSP1(wname, num) \ From 2fc5981881ca689547258798524e7fd251cc6ad2 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 11 Dec 2015 13:24:35 +0000 Subject: [PATCH 0959/1167] mfd: arizona: Request parent IRQ before we request child IRQs Currently the driver requests the boot done and control interface IRQs before it has requested its own IRQ line. This can cause problems on edge triggered IRQ systems as in an edge occurs before the parent IRQ is enabled it will be missed. Change-Id: I4a910f015c0f0e829f00878fe3402a502f0e9b1c Signed-off-by: Charles Keepax --- drivers/mfd/arizona-irq.c | 55 +++++++++++++++++++-------------------- 1 file changed, 27 insertions(+), 28 deletions(-) diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index eaa80122ba4..465d5c734e6 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -365,7 +365,7 @@ int arizona_irq_init(struct arizona *arizona) if (ret != 0) { dev_err(arizona->dev, "Failed to add AOD IRQs: %d\n", ret); - goto err_domain; + goto err; } } @@ -380,30 +380,6 @@ int arizona_irq_init(struct arizona *arizona) } } - /* Make sure the boot done IRQ is unmasked for resumes */ - i = arizona_map_irq(arizona, ARIZONA_IRQ_BOOT_DONE); - ret = request_threaded_irq(i, NULL, arizona_boot_done, IRQF_ONESHOT, - "Boot done", arizona); - if (ret != 0) { - dev_err(arizona->dev, "Failed to request boot done %d: %d\n", - arizona->irq, ret); - goto err_boot_done; - } - - /* Handle control interface errors in the core */ - if (ctrlif_error) { - i = arizona_map_irq(arizona, ARIZONA_IRQ_CTRLIF_ERR); - ret = request_threaded_irq(i, NULL, arizona_ctrlif_err, - IRQF_ONESHOT, - "Control interface error", arizona); - if (ret != 0) { - dev_err(arizona->dev, - "Failed to request CTRLIF_ERR %d: %d\n", - arizona->irq, ret); - goto err_ctrlif; - } - } - /* Used to emulate edge trigger and to work around broken pinmux */ if (arizona->pdata.irq_gpio) { if (gpio_to_irq(arizona->pdata.irq_gpio) != arizona->irq) { @@ -433,19 +409,42 @@ int arizona_irq_init(struct arizona *arizona) goto err_main_irq; } + /* Make sure the boot done IRQ is unmasked for resumes */ + i = arizona_map_irq(arizona, ARIZONA_IRQ_BOOT_DONE); + ret = request_threaded_irq(i, NULL, arizona_boot_done, IRQF_ONESHOT, + "Boot done", arizona); + if (ret != 0) { + dev_err(arizona->dev, "Failed to request boot done %d: %d\n", + arizona->irq, ret); + goto err_boot_done; + } + + /* Handle control interface errors in the core */ + if (ctrlif_error) { + i = arizona_map_irq(arizona, ARIZONA_IRQ_CTRLIF_ERR); + ret = request_threaded_irq(i, NULL, arizona_ctrlif_err, + IRQF_ONESHOT, + "Control interface error", arizona); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to request CTRLIF_ERR %d: %d\n", + arizona->irq, ret); + goto err_ctrlif; + } + } + return 0; -err_main_irq: - free_irq(arizona_map_irq(arizona, ARIZONA_IRQ_CTRLIF_ERR), arizona); err_ctrlif: free_irq(arizona_map_irq(arizona, ARIZONA_IRQ_BOOT_DONE), arizona); err_boot_done: + free_irq(arizona->irq, arizona); +err_main_irq: regmap_del_irq_chip(irq_create_mapping(arizona->virq, 1), arizona->irq_chip); err_aod: regmap_del_irq_chip(irq_create_mapping(arizona->virq, 0), arizona->aod_irq_chip); -err_domain: err: return ret; } From 9f81f894fad1eba06604818a87d8341ba227eaa2 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 20 Apr 2015 12:49:05 +0100 Subject: [PATCH 0960/1167] ASoC: wm_adsp: Use actual control access flags for DSP controls Instead of implementing the access control entirely in the get and put callbacks use the actual access flags for ALSA controls. Change-Id: I82f5474157fa01483de8f62b206b24875bfddf3b Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 34d76f2d66a..4b992a7b922 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -986,9 +986,6 @@ static int wm_coeff_put(struct snd_kcontrol *kcontrol, char *p = ucontrol->value.bytes.data; int ret = 0; - if (ctl->flags && !(ctl->flags & WMFW_CTL_FLAG_WRITEABLE)) - return -EPERM; - mutex_lock(&ctl->lock); memcpy(ctl->cache, p, ctl->len); @@ -1050,9 +1047,6 @@ static int wm_coeff_get(struct snd_kcontrol *kcontrol, char *p = ucontrol->value.bytes.data; int ret = 0; - if (ctl->flags && !(ctl->flags & WMFW_CTL_FLAG_READABLE)) - return -EPERM; - mutex_lock(&ctl->lock); if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) { @@ -1095,6 +1089,17 @@ static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl) kcontrol->put = wm_coeff_put; kcontrol->private_value = (unsigned long)ctl; + if (ctl->flags) { + if (ctl->flags & WMFW_CTL_FLAG_WRITEABLE) + kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_WRITE; + if (ctl->flags & WMFW_CTL_FLAG_READABLE) + kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_READ; + if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) + kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_VOLATILE; + } else { + kcontrol->access = SNDRV_CTL_ELEM_ACCESS_READWRITE; + } + ret = snd_soc_add_card_controls(dsp->card, kcontrol, 1); if (ret < 0) From 54cac5dc5efea65f409287b855482f9f791f4c84 Mon Sep 17 00:00:00 2001 From: Ajit Pandey Date: Wed, 16 Dec 2015 19:54:26 +0530 Subject: [PATCH 0961/1167] Revert "ASoC: moon: call adsp debugfs init and clean-up routines" This reverts commit cea64c23a584ac7988c4ed2c76bd7244c0076539. Switched to upstream implementation of wm_adsp debugfs Change-Id: If6c55e0d351f3b8c47cf4b67a185973f0a49b5da Signed-off-by: Ajit Pandey --- sound/soc/codecs/moon.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 17c6d153d30..83c1632846e 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -2904,9 +2904,6 @@ static int moon_codec_probe(struct snd_soc_codec *codec) struct arizona *arizona = priv->core.arizona; int ret, i, j; - for (i = 0; i < MOON_NUM_ADSP; i++) - wm_adsp_init_debugfs(&priv->core.adsp[i], codec); - codec->control_data = priv->core.arizona->regmap; priv->core.arizona->dapm = &codec->dapm; @@ -2993,9 +2990,6 @@ static int moon_codec_remove(struct snd_soc_codec *codec) struct moon_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = priv->core.arizona; - for (i = 0; i < MOON_NUM_ADSP; i++) - wm_adsp_cleanup_debugfs(&priv->core.adsp[i]); - irq_set_irq_wake(arizona->irq, 0); arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); for (i = 0; i < MOON_NUM_ADSP; i++) From 385296a2f0942bd5d15d462a8442e2e49d98c410 Mon Sep 17 00:00:00 2001 From: Ajit Pandey Date: Wed, 16 Dec 2015 20:48:30 +0530 Subject: [PATCH 0962/1167] mfd: arizona: Added mising 'break' within marley addition Change-Id: I151c1aeb72227e4bff52d7e8242776c5b45b8907 Signed-off-by: Ajit Pandey --- drivers/mfd/arizona-core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 3e813fdbf90..9942547a5f2 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -2238,6 +2238,7 @@ int arizona_dev_init(struct arizona *arizona) case CS47L35: ret = mfd_add_devices(arizona->dev, -1, marley_devs, ARRAY_SIZE(marley_devs), NULL, 0, NULL); + break; case CS47L90: case CS47L91: ret = mfd_add_devices(arizona->dev, -1, moon_devs, From 53e5892e0f156b90a60ae377a849607bc9aaa8f5 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 29 Jul 2015 14:32:24 +0100 Subject: [PATCH 0963/1167] mfd: clearwater: fill up holes in the irq space regmpa-irq needs a contiguous address space for irq's so this patch fills the gaps by adding dummy registers Change-Id: Ib92eff2613cf542358afc0b99925052b483ae6ea Signed-off-by: Nikesh Oswal --- drivers/mfd/clearwater-tables.c | 18 ++++++++++++++++++ include/linux/mfd/arizona/registers.h | 9 +++++++++ 2 files changed, 27 insertions(+) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index 7ef8992d3ad..c35465f1763 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -1816,6 +1816,15 @@ static const struct reg_default clearwater_reg_default[] = { { 0x0000174D, 0xE000 }, /* R5965 - GPIO39 Control 2 */ { 0x0000174E, 0x2001 }, /* R5966 - GPIO40 Control 1 */ { 0x0000174F, 0xE000 }, /* R5967 - GPIO40 Control 2 */ + { 0x00001802, 0x0000 }, + { 0x00001803, 0x0000 }, + { 0x00001804, 0x0000 }, + { 0x00001807, 0x0000 }, + { 0x00001809, 0x0000 }, + { 0x0000180F, 0x0000 }, + { 0x00001813, 0x0000 }, + { 0x00001819, 0x0000 }, + { 0x0000181C, 0x0000 }, { 0x00001840, 0xFFFF }, /* R6208 - IRQ1 Mask 1 */ { 0x00001841, 0xFFFF }, /* R6209 - IRQ1 Mask 2 */ { 0x00001842, 0xFFFF }, /* R6210 - IRQ1 Mask 3 */ @@ -3109,24 +3118,33 @@ static bool clearwater_16bit_readable_register(struct device *dev, unsigned int case CLEARWATER_GPIO40_CTRL_2: case CLEARWATER_IRQ1_STATUS_1: case CLEARWATER_IRQ1_STATUS_2: + case CLEARWATER_IRQ1_STATUS_3: + case CLEARWATER_IRQ1_STATUS_4: + case CLEARWATER_IRQ1_STATUS_5: case CLEARWATER_IRQ1_STATUS_6: case CLEARWATER_IRQ1_STATUS_7: + case CLEARWATER_IRQ1_STATUS_8: case CLEARWATER_IRQ1_STATUS_9: + case CLEARWATER_IRQ1_STATUS_10: case CLEARWATER_IRQ1_STATUS_11: case CLEARWATER_IRQ1_STATUS_12: case CLEARWATER_IRQ1_STATUS_13: case CLEARWATER_IRQ1_STATUS_14: case CLEARWATER_IRQ1_STATUS_15: + case CLEARWATER_IRQ1_STATUS_16: case CLEARWATER_IRQ1_STATUS_17: case CLEARWATER_IRQ1_STATUS_18: case CLEARWATER_IRQ1_STATUS_19: + case CLEARWATER_IRQ1_STATUS_20: case CLEARWATER_IRQ1_STATUS_21: case CLEARWATER_IRQ1_STATUS_22: case CLEARWATER_IRQ1_STATUS_23: case CLEARWATER_IRQ1_STATUS_24: case CLEARWATER_IRQ1_STATUS_25: + case CLEARWATER_IRQ1_STATUS_26: case CLEARWATER_IRQ1_STATUS_27: case CLEARWATER_IRQ1_STATUS_28: + case CLEARWATER_IRQ1_STATUS_29: case CLEARWATER_IRQ1_STATUS_30: case CLEARWATER_IRQ1_STATUS_31: case CLEARWATER_IRQ1_STATUS_32: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 3256a8f4c4b..79d081adda0 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -1641,24 +1641,33 @@ #define CLEARWATER_GPIO40_CTRL_2 0x174F #define CLEARWATER_IRQ1_STATUS_1 0x1800 #define CLEARWATER_IRQ1_STATUS_2 0x1801 +#define CLEARWATER_IRQ1_STATUS_3 0x1802 +#define CLEARWATER_IRQ1_STATUS_4 0x1803 +#define CLEARWATER_IRQ1_STATUS_5 0x1804 #define CLEARWATER_IRQ1_STATUS_6 0x1805 #define CLEARWATER_IRQ1_STATUS_7 0x1806 +#define CLEARWATER_IRQ1_STATUS_8 0x1807 #define CLEARWATER_IRQ1_STATUS_9 0x1808 +#define CLEARWATER_IRQ1_STATUS_10 0x1809 #define CLEARWATER_IRQ1_STATUS_11 0x180A #define CLEARWATER_IRQ1_STATUS_12 0x180B #define CLEARWATER_IRQ1_STATUS_13 0x180C #define CLEARWATER_IRQ1_STATUS_14 0x180D #define CLEARWATER_IRQ1_STATUS_15 0x180E +#define CLEARWATER_IRQ1_STATUS_16 0x180F #define CLEARWATER_IRQ1_STATUS_17 0x1810 #define CLEARWATER_IRQ1_STATUS_18 0x1811 #define CLEARWATER_IRQ1_STATUS_19 0x1812 +#define CLEARWATER_IRQ1_STATUS_20 0x1813 #define CLEARWATER_IRQ1_STATUS_21 0x1814 #define CLEARWATER_IRQ1_STATUS_22 0x1815 #define CLEARWATER_IRQ1_STATUS_23 0x1816 #define CLEARWATER_IRQ1_STATUS_24 0x1817 #define CLEARWATER_IRQ1_STATUS_25 0x1818 +#define CLEARWATER_IRQ1_STATUS_26 0x1819 #define CLEARWATER_IRQ1_STATUS_27 0x181A #define CLEARWATER_IRQ1_STATUS_28 0x181B +#define CLEARWATER_IRQ1_STATUS_29 0x181C #define CLEARWATER_IRQ1_STATUS_30 0x181D #define CLEARWATER_IRQ1_STATUS_31 0x181E #define CLEARWATER_IRQ1_STATUS_32 0x181F From ddf3e2e2a2c9f0af6ecbdfa1cdae166c6580dc3d Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 4 Aug 2015 17:15:48 +0100 Subject: [PATCH 0964/1167] ASoC: arizona: Use correct speaker overheat status for Clearwater and later The speaker overheat flags moved to register CLEARWATER_IRQ1_RAW_STATUS_15 in all codecs from Clearwater onwards. The code was trying to check the older register which caused spurious overheat warnings on later codecs. Change-Id: I5b35607c9f2b3073bc15b4f940856ec1523ca0c7 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 69 ++++++++++++++++++++++++++++---------- 1 file changed, 51 insertions(+), 18 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index b69411783a4..1c7c0bc2345 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -318,6 +318,44 @@ int arizona_restore_sources(struct arizona *arizona, } EXPORT_SYMBOL_GPL(arizona_restore_sources); +static int arizona_check_speaker_overheat(struct arizona *arizona, + bool *warn, bool *shutdown) +{ + unsigned int reg, mask_warn, mask_shutdown, val; + int ret; + + switch (arizona->type) { + case WM8997: + case WM5102: + case WM8280: + case WM5110: + case WM8998: + case WM1814: + case CS47L24: + case WM1831: + reg = ARIZONA_INTERRUPT_RAW_STATUS_3; + mask_warn = ARIZONA_SPK_OVERHEAT_WARN_STS; + mask_shutdown = ARIZONA_SPK_OVERHEAT_STS; + break; + default: + reg = CLEARWATER_IRQ1_RAW_STATUS_15; + mask_warn = CLEARWATER_SPK_OVERHEAT_WARN_STS1; + mask_shutdown = CLEARWATER_SPK_OVERHEAT_STS1; + break; + } + + ret = regmap_read(arizona->regmap, reg, &val); + if (ret) { + dev_err(arizona->dev, "Failed to read thermal status: %d\n", + ret); + return ret; + } + + *warn = val & mask_warn ? true : false; + *shutdown = val & mask_shutdown ? true : false; + return 0; +} + static int vegas_spk_pre_enable(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) @@ -441,7 +479,8 @@ static int arizona_spk_ev(struct snd_soc_dapm_widget *w, { struct snd_soc_codec *codec = w->codec; struct arizona *arizona = dev_get_drvdata(codec->dev->parent); - int val; + bool warn, shutdown; + int ret; switch (event) { case SND_SOC_DAPM_PRE_PMU: @@ -455,8 +494,11 @@ static int arizona_spk_ev(struct snd_soc_dapm_widget *w, } break; case SND_SOC_DAPM_POST_PMU: - val = snd_soc_read(codec, ARIZONA_INTERRUPT_RAW_STATUS_3); - if (val & ARIZONA_SPK_OVERHEAT_STS) { + ret = arizona_check_speaker_overheat(arizona, &warn, &shutdown); + if (ret) + return ret; + + if (shutdown) { dev_crit(arizona->dev, "Speaker not enabled due to temperature\n"); return -EBUSY; @@ -504,17 +546,12 @@ static int arizona_spk_ev(struct snd_soc_dapm_widget *w, static irqreturn_t arizona_thermal_warn(int irq, void *data) { struct arizona *arizona = data; - unsigned int val; + bool warn, shutdown; int ret; - ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_3, - &val); - if (ret != 0) { - dev_err(arizona->dev, "Failed to read thermal status: %d\n", - ret); - } else if (val & ARIZONA_SPK_OVERHEAT_WARN_STS) { + ret = arizona_check_speaker_overheat(arizona, &warn, &shutdown); + if ((ret == 0) && warn) dev_crit(arizona->dev, "Thermal warning\n"); - } return IRQ_HANDLED; } @@ -522,15 +559,11 @@ static irqreturn_t arizona_thermal_warn(int irq, void *data) static irqreturn_t arizona_thermal_shutdown(int irq, void *data) { struct arizona *arizona = data; - unsigned int val; + bool warn, shutdown; int ret; - ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_3, - &val); - if (ret != 0) { - dev_err(arizona->dev, "Failed to read thermal status: %d\n", - ret); - } else if (val & ARIZONA_SPK_OVERHEAT_STS) { + ret = arizona_check_speaker_overheat(arizona, &warn, &shutdown); + if ((ret == 0) && shutdown) { dev_crit(arizona->dev, "Thermal shutdown\n"); ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, From cac6d597551063efc4d5afbfb1ae41e5f0897a8d Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 5 Aug 2015 15:41:17 +0100 Subject: [PATCH 0965/1167] mfd: arizona: CS47L24 and WM1831 don't have ISOLATION_CONTROL register The runtime_suspend and runtime_resume were attempting to access the ISOLATION_CONTROL register on CS47L24 and WM1831, which don't have this register and so the code was failing with a regmap error. Change-Id: I343ad04702fc0c820fc87add5b54391a943f2625 Signed-off-by: Richard Fitzgerald --- drivers/mfd/arizona-core.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 9942547a5f2..034ba6a6d1b 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -625,8 +625,6 @@ static int arizona_runtime_resume(struct device *dev) case WM8997: case WM8998: case WM1814: - case WM1831: - case CS47L24: ret = arizona_wait_for_boot(arizona); if (ret != 0) { goto err; @@ -643,6 +641,13 @@ static int arizona_runtime_resume(struct device *dev) } } break; + case WM1831: + case CS47L24: + ret = arizona_wait_for_boot(arizona); + if (ret != 0) { + goto err; + } + break; default: if (arizona->external_dcvdd) arizona_disable_reset(arizona); @@ -707,8 +712,6 @@ static int arizona_runtime_suspend(struct device *dev) case WM8280: case WM8998: case WM1814: - case WM1831: - case CS47L24: ret = regmap_update_bits(arizona->regmap, ARIZONA_ISOLATION_CONTROL, ARIZONA_ISOLATE_DCVDD1, From 4edc350c2c48155a1b3cc0d8a07dfebc3b6a2cef Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 5 Aug 2015 16:03:27 +0100 Subject: [PATCH 0966/1167] ASoC: vegas: Fix constness warning in mux put functions The struct soc_enum pointer must be non-const so it can be passed to snd_soc_dapm_mux_update_power() Change-Id: I86581b814d2e3cb169695e494fb63e3763c59e94 Signed-off-by: Richard Fitzgerald Signed-off-by: V V N Praveen Kumar --- sound/soc/codecs/vegas.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/vegas.c b/sound/soc/codecs/vegas.c index 8d228bcd934..97a94c27f04 100644 --- a/sound/soc/codecs/vegas.c +++ b/sound/soc/codecs/vegas.c @@ -168,7 +168,7 @@ static int vegas_in1mux_put(struct snd_kcontrol *kcontrol, struct snd_soc_codec *codec = widget->codec; struct vegas_priv *vegas = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = vegas->core.arizona; - const struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; unsigned int mux, inmode; unsigned int mode_val, src_val; From ac25c03babf519b441b509cdbd909fd73e23317f Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Thu, 6 Aug 2015 10:39:26 +0100 Subject: [PATCH 0967/1167] mfd: marley: filling gaps in IRQ space Change-Id: Ic6c069300dbfd6d3cda2cb80d9c4998646cd4c3e Signed-off-by: Piotr Stankiewicz --- drivers/mfd/marley-tables.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/mfd/marley-tables.c b/drivers/mfd/marley-tables.c index b6378a207e9..cd74086cceb 100644 --- a/drivers/mfd/marley-tables.c +++ b/drivers/mfd/marley-tables.c @@ -813,6 +813,15 @@ static const struct reg_default marley_reg_default[] = { { 0x0000171D, 0xf000 }, /* R5917 (0x171D) - GPIO15 Control 2 */ { 0x0000171E, 0x2001 }, /* R5918 (0x171E) - GPIO16 Control 1 */ { 0x0000171F, 0xf000 }, /* R5919 (0x171F) - GPIO16 Control 2 */ + { 0x00001802, 0x0000 }, + { 0x00001803, 0x0000 }, + { 0x00001804, 0x0000 }, + { 0x00001807, 0x0000 }, + { 0x00001809, 0x0000 }, + { 0x0000180F, 0x0000 }, + { 0x00001813, 0x0000 }, + { 0x00001819, 0x0000 }, + { 0x0000181C, 0x0000 }, { 0x00001840, 0xffff }, /* R6208 (0x1840) - IRQ1 Mask 1 */ { 0x00001841, 0xffff }, /* R6209 (0x1841) - IRQ1 Mask 2 */ { 0x00001842, 0xffff }, /* R6210 (0x1842) - IRQ1 Mask 3 */ @@ -1599,22 +1608,33 @@ static bool marley_16bit_readable_register(struct device *dev, unsigned int reg) case CLEARWATER_GPIO16_CTRL_2: case CLEARWATER_IRQ1_STATUS_1: case CLEARWATER_IRQ1_STATUS_2: + case CLEARWATER_IRQ1_STATUS_3: + case CLEARWATER_IRQ1_STATUS_4: + case CLEARWATER_IRQ1_STATUS_5: case CLEARWATER_IRQ1_STATUS_6: case CLEARWATER_IRQ1_STATUS_7: + case CLEARWATER_IRQ1_STATUS_8: case CLEARWATER_IRQ1_STATUS_9: + case CLEARWATER_IRQ1_STATUS_10: case CLEARWATER_IRQ1_STATUS_11: case CLEARWATER_IRQ1_STATUS_12: case CLEARWATER_IRQ1_STATUS_13: case CLEARWATER_IRQ1_STATUS_14: case CLEARWATER_IRQ1_STATUS_15: + case CLEARWATER_IRQ1_STATUS_16: case CLEARWATER_IRQ1_STATUS_17: + case CLEARWATER_IRQ1_STATUS_18: + case CLEARWATER_IRQ1_STATUS_19: + case CLEARWATER_IRQ1_STATUS_20: case CLEARWATER_IRQ1_STATUS_21: case CLEARWATER_IRQ1_STATUS_22: case CLEARWATER_IRQ1_STATUS_23: case CLEARWATER_IRQ1_STATUS_24: case CLEARWATER_IRQ1_STATUS_25: + case CLEARWATER_IRQ1_STATUS_26: case CLEARWATER_IRQ1_STATUS_27: case CLEARWATER_IRQ1_STATUS_28: + case CLEARWATER_IRQ1_STATUS_29: case CLEARWATER_IRQ1_STATUS_30: case CLEARWATER_IRQ1_STATUS_31: case CLEARWATER_IRQ1_STATUS_32: From 13bfee738ae8666679f1e83e84effb1e47b43c77 Mon Sep 17 00:00:00 2001 From: V V N Praveen Kumar Date: Mon, 21 Dec 2015 19:28:45 +0530 Subject: [PATCH 0968/1167] ASoC: clearwater: Fix incorrect DRC2 interrupt masking The codec_probe() was masking the DRC2 interrupt where it should be unmasking it , and codec_remove was unmasking instead of masking Change-Id: If9c4ba6d6fbb6bc6cab0d7418eadf9e5739d2453 Signed-off-by: V V N Praveen Kumar --- sound/soc/codecs/clearwater.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 846bf099ccb..8741a13ec7c 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -3017,7 +3017,7 @@ static int clearwater_codec_probe(struct snd_soc_codec *codec) ret = regmap_update_bits(arizona->regmap, CLEARWATER_IRQ2_MASK_9, CLEARWATER_DRC2_SIG_DET_EINT2, - CLEARWATER_DRC2_SIG_DET_EINT2); + 0); if (ret != 0) { dev_err(arizona->dev, "Failed to unmask DRC2 IRQ for DSP: %d\n", @@ -3038,7 +3038,7 @@ static int clearwater_codec_remove(struct snd_soc_codec *codec) arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); regmap_update_bits(arizona->regmap, CLEARWATER_IRQ2_MASK_9, CLEARWATER_DRC2_SIG_DET_EINT2, - 0); + CLEARWATER_DRC2_SIG_DET_EINT2); for (i = 0; i < CLEARWATER_NUM_ADSP; ++i) wm_adsp2_codec_remove(&priv->core.adsp[i], codec); From 51aee92f2d7a4f6b771de495fa725f58e1410325 Mon Sep 17 00:00:00 2001 From: V V N Praveen Kumar Date: Tue, 22 Dec 2015 11:53:25 +0530 Subject: [PATCH 0969/1167] ASoC: marley: Fix incorrect DRC2 interrupt masking The codec_probe() was masking the DRC2 interrupt where it should be unmasking it , and codec_remove was unmasking instead of masking Change-Id: Ib9288795acbd46277e08e640f5526b307974b216 Signed-off-by: V V N Praveen Kumar --- sound/soc/codecs/marley.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index e1e695d937a..ffe62730d7b 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -2098,7 +2098,7 @@ static int marley_codec_probe(struct snd_soc_codec *codec) ret = regmap_update_bits(arizona->regmap, CLEARWATER_IRQ2_MASK_9, CLEARWATER_DRC2_SIG_DET_EINT2, - CLEARWATER_DRC2_SIG_DET_EINT2); + 0); if (ret != 0) { dev_err(arizona->dev, "Failed to unmask DRC2 IRQ for DSP: %d\n", @@ -2119,7 +2119,7 @@ static int marley_codec_remove(struct snd_soc_codec *codec) arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); regmap_update_bits(arizona->regmap, CLEARWATER_IRQ2_MASK_9, CLEARWATER_DRC2_SIG_DET_EINT2, - 0); + CLEARWATER_DRC2_SIG_DET_EINT2); for (i = 0; i < MARLEY_NUM_ADSP; ++i) wm_adsp2_codec_remove(&priv->core.adsp[i], codec); From db66f59a734fd67c88d360e85e78d7c3540eabbb Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 6 Aug 2015 17:31:29 +0100 Subject: [PATCH 0970/1167] mfd: arizona: Correct number of micbias for each codec Fix some errors in the number of micbiase present on each codec Change-Id: If7375c0e26d70e4c4d9cd201569d1990d822d5d8 Signed-off-by: Richard Fitzgerald --- drivers/mfd/arizona-core.c | 12 +++++++++--- include/linux/mfd/arizona/pdata.h | 3 +++ 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 034ba6a6d1b..10b0e15aaa0 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1535,11 +1535,17 @@ int arizona_get_num_micbias(struct arizona *arizona, case WM8280: case WM8998: case WM1814: - case WM8285: - case WM1840: + num_micbiases = WM5102_NUM_MICBIAS; + num_child_micbiases = 0; + break; case WM1831: case CS47L24: - num_micbiases = ARIZONA_MAX_MICBIAS; + num_micbiases = LARGO_NUM_MICBIAS; + num_child_micbiases = 0; + break; + case WM8285: + case WM1840: + num_micbiases = CLEARWATER_NUM_MICBIAS; num_child_micbiases = 0; break; case CS47L35: diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index c45d11e0b8c..666af0be75a 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -53,6 +53,9 @@ #define ARIZONA_MAX_MICBIAS 4 #define ARIZONA_MAX_CHILD_MICBIAS 4 +#define WM5102_NUM_MICBIAS 3 +#define CLEARWATER_NUM_MICBIAS 4 +#define LARGO_NUM_MICBIAS 2 #define MARLEY_NUM_MICBIAS 2 #define MARLEY_NUM_CHILD_MICBIAS 2 #define MOON_NUM_MICBIAS 2 From 1d441fd30495924c12c407455f2a77a66193e9a3 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 2 Sep 2015 09:44:52 +0100 Subject: [PATCH 0971/1167] ASoC: arizona: Don't hold dapm lock around dapm_{enable/disable}_pin Change-Id: I9334989365c2d75aa69ea3805318a1d3b5c84a84 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 1c7c0bc2345..e9c3dbc4fa0 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -5145,7 +5145,6 @@ static int arizona_set_force_bypass(struct snd_soc_codec *codec, micbias_bypass = ARIZONA_MICB1_BYPASS; } - mutex_lock(&arizona->dapm->card->dapm_mutex); if (arizona->micvdd_regulated) { if (set_bypass) snd_soc_dapm_disable_pin(arizona->dapm, @@ -5154,15 +5153,11 @@ static int arizona_set_force_bypass(struct snd_soc_codec *codec, snd_soc_dapm_force_enable_pin(arizona->dapm, "MICSUPP"); - mutex_unlock(&arizona->dapm->card->dapm_mutex); - snd_soc_dapm_sync(arizona->dapm); regmap_update_bits(arizona->regmap, ARIZONA_MIC_CHARGE_PUMP_1, ARIZONA_CPMIC_BYPASS, cp_bypass); - } else { - mutex_unlock(&arizona->dapm->card->dapm_mutex); } arizona_get_num_micbias(arizona, &num_micbiases, NULL); From 9c40ca4b04dc8cd4f43d49cb9c6304183c5f3bd8 Mon Sep 17 00:00:00 2001 From: Swetha Nagapuri Date: Wed, 2 Sep 2015 10:37:36 +0530 Subject: [PATCH 0972/1167] switch: arizona: Remove moisture detection and antenna handling functionality In the switch driver there are two pieces of functionalities, One is the "antenna" handling, the other is moisture detection, Which we are not using currently.So This patch removes these functionalities. Change-Id: I7be5a567182378bbf76dc726a94050869bc6347a Signed-off-by: Swetha Nagapuri --- .../devicetree/bindings/mfd/arizona.txt | 14 - drivers/switch/switch-arizona.c | 699 +----------------- include/linux/mfd/arizona/pdata.h | 38 - 3 files changed, 1 insertion(+), 750 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 890efa2282e..40b533afaf9 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -84,21 +84,11 @@ Optional properties: and beginning ramp of MICBIAS. - wlf,fixed-hpdet-imp : Do not perform any headphone detection, just use the fixed value specified here as the headphone impedance. - - wlf,hpdet-moisture-imp : This value specifies the threshold impedance in - ohms above which it will be considered a false detection due to moisture, - a valid headphone impedance measurement must be less than this threshold - - wlf,hpdet-moisture-debounce: Software debounces for moisture detect, if - moisture is detected this many number of times then it would be decalred - as moisture without any furthur retries - wlf,hpdet-short-circuit-imp : Specifies the maximum impedance in ohms that will be considered as a short circuit - wlf,hpdet-channel : When this property is set then right channel is used for headphone impedance measurement else the left headphone channel is used - - wlf,moisture-det-channel : When this property is set then right channel - is used for moisture detect else the left headphone channel is used. - This property is used only for arizona chips which do not belong to - moon (cs47l90, cs47l91) class of arizona codecs - wlf,micd-clamp-mode : Specifies the logic of the micdetect clamp block - wlf,hpd-left-pins : This field is only for moon (cs47l90, cs47l91) class of arizona codecs. It is a 2 cell long field where the first cell @@ -108,10 +98,6 @@ Optional properties: HPD_SENSE_SEL field of HEADPHONE_DETECT_0 register - wlf,hpd-right-pins : See wlf,hpd-left-pins which is for left headphone channel and this field is similar but for right headphone channel - - wlf,moisture-detect-pin : This field is only for moon (cs47l90, cs47l91) - class of arizona codecs. It specifies the impedance sense pin that is used - for moisture detect as per HPD_SENSE_SEL field of HEADPHONE_DETECT_0 - register - wlf,micd-ranges : Microphone detection level and key configuration, this field can be of variable length but should always be a multiple of 2 cells long, each two cell group represents one button configuration diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 53d5cc996fc..bc92c496ba2 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -158,7 +158,6 @@ struct arizona_extcon_info { int micd_res_old; int micd_debounce; int micd_count; - int moisture_count; struct delayed_work hpdet_work; struct delayed_work micd_detect_work; @@ -1618,161 +1617,6 @@ void arizona_hpdet_stop(struct arizona_extcon_info *info) } EXPORT_SYMBOL_GPL(arizona_hpdet_stop); -static int arizona_hpdet_moisture_start(struct arizona_extcon_info *info) -{ - struct arizona *arizona = info->arizona; - int ret = 0; - unsigned int hpd_sense, hpd_gnd, val; - - switch (arizona->type) { - case WM5102: - case WM8997: - regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, - ARIZONA_HP_RATE, ARIZONA_HP_RATE); - break; - case WM5110: - case WM8280: - case WM1831: - case CS47L24: - regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, - ARIZONA_HP_FAST_MODE, ARIZONA_HP_FAST_MODE); - break; - case WM8998: - case WM1814: - regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, - VEGAS_HP_FAST_MODE, VEGAS_HP_FAST_MODE); - break; - default: - regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, - CLEARWATER_HP_RATE_MASK, - 0x2 << CLEARWATER_HP_RATE_SHIFT); - break; - } - - switch (info->accdet_ip) { - case 0: - ret = arizona_hpdet_start(info); - arizona_extcon_hp_clamp(info, false); - break; - default: - /* Make sure we keep the device enabled - during the measurement */ - pm_runtime_get_sync(info->dev); - - hpd_sense = arizona->pdata.moisture_pin; - hpd_gnd = info->micd_modes[info->micd_mode].gnd; - - val = (hpd_sense << MOON_HPD_SENSE_SEL_SHIFT) | - (hpd_sense << MOON_HPD_FRC_SEL_SHIFT) | - (hpd_gnd << MOON_HPD_GND_SEL_SHIFT); - ret = regmap_update_bits(arizona->regmap, - MOON_HEADPHONE_DETECT_0, - MOON_HPD_GND_SEL_MASK | - MOON_HPD_SENSE_SEL_MASK | - MOON_HPD_FRC_SEL_MASK, - val); - if (ret != 0) { - dev_err(arizona->dev, "Failed to set HPDET sense: %d\n", - ret); - goto err; - } - - ret = regmap_update_bits(arizona->regmap, - ARIZONA_HEADPHONE_DETECT_1, - ARIZONA_HP_POLL, ARIZONA_HP_POLL); - if (ret != 0) { - dev_err(arizona->dev, "Can't start HPDET measurement: %d\n", - ret); - goto err; - } - break; - } - - return ret; -err: - pm_runtime_put_autosuspend(info->dev); - return ret; -} - -static void arizona_hpdet_moisture_stop(struct arizona_extcon_info *info) -{ - struct arizona *arizona = info->arizona; - - switch (info->accdet_ip) { - case 0: - arizona_hpdet_stop(info); - break; - default: - /* Reset back to starting range */ - regmap_update_bits(arizona->regmap, - ARIZONA_HEADPHONE_DETECT_1, - ARIZONA_HP_IMPEDANCE_RANGE_MASK | - ARIZONA_HP_POLL, 0); - - pm_runtime_mark_last_busy(info->dev); - pm_runtime_put_autosuspend(info->dev); - break; - } - - switch (arizona->type) { - case WM5102: - case WM8997: - regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, - ARIZONA_HP_RATE, 0); - break; - case WM5110: - case WM8280: - case WM1831: - case CS47L24: - regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, - ARIZONA_HP_FAST_MODE, 0); - break; - case WM8998: - case WM1814: - regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, - VEGAS_HP_FAST_MODE, 0); - break; - default: - regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, - CLEARWATER_HP_RATE_MASK, 0); - break; - } -} - -static int arizona_hpdet_moisture_reading(struct arizona_extcon_info *info, - int val) -{ - struct arizona *arizona = info->arizona; - int debounce_lim = info->arizona->pdata.hpdet_moisture_debounce; - - if (val < 0) { - return val; - } else if (val < arizona->pdata.hpdet_moisture_imp) { - if (arizona->pdata.micd_software_compare) - arizona_jds_set_state(info, &arizona_micd_adc_mic); - else - arizona_jds_set_state(info, &arizona_micd_microphone); - } else { - if (debounce_lim) { - if (++info->moisture_count < debounce_lim) { - dev_dbg(info->arizona->dev, - "Moisture software debounce: %d, %x\n", - info->moisture_count, val); - arizona_hpdet_restart(info); - return -EAGAIN; - } - - info->moisture_count = 0; - } - - dev_warn(arizona->dev, - "Jack detection due to moisture, ignoring\n"); - arizona_jds_set_state(info, NULL); - } - - return 0; -} - int arizona_hpdet_reading(struct arizona_extcon_info *info, int val) { if (val < 0) @@ -2030,422 +1874,6 @@ int arizona_micd_button_reading(struct arizona_extcon_info *info, } EXPORT_SYMBOL_GPL(arizona_micd_button_reading); -static int arizona_antenna_moisture_reading(struct arizona_extcon_info *info, - int val) -{ - struct arizona *arizona = info->arizona; - int debounce_lim = info->arizona->pdata.hpdet_moisture_debounce; - - if (val < 0) { - return val; - } else if (val < arizona->pdata.hpdet_moisture_imp) { - arizona_jds_set_state(info, &arizona_antenna_mic_det); - } else { - if (debounce_lim) { - if (++info->moisture_count < debounce_lim) { - dev_dbg(info->arizona->dev, - "Moisture software debounce: %d, %x\n", - info->moisture_count, val); - arizona_hpdet_restart(info); - return -EAGAIN; - } - - info->moisture_count = 0; - } - - dev_warn(arizona->dev, - "Jack detection due to moisture, ignoring\n"); - arizona_jds_set_state(info, NULL); - } - - return 0; -} - -static int arizona_antenna_mic_reading(struct arizona_extcon_info *info, - int val) -{ - struct arizona *arizona = info->arizona; - int ret; - - dev_dbg(arizona->dev, "%s: Reading: %d\n", __func__, val); - - if (val < 0) - return val; - - ret = arizona_micd_button_debounce(info, val); - if (ret < 0) - return ret; - - info->button_impedance = 0; - - if (val > MICROPHONE_MAX_OHM) { - info->mic = false; - - arizona_set_headphone_imp(info, ARIZONA_HP_Z_OPEN); - - arizona_extcon_report(info, BIT_NO_HEADSET); - arizona_jds_set_state(info, &arizona_antenna_oc_det); - } else { - info->mic = (val >= MICROPHONE_MIN_OHM); - - if (arizona->pdata.hpdet_channel) - ret = arizona_jds_set_state(info, - &arizona_antenna_hpr_det); - else - ret = arizona_jds_set_state(info, - &arizona_antenna_hp_det); - if (ret < 0) { - if (info->mic) - arizona_extcon_report(info, BIT_HEADSET); - else - arizona_extcon_report(info, BIT_HEADSET_NO_MIC); - } - } - - if (arizona->pdata.micd_cb) - arizona->pdata.micd_cb(true); - - return 0; -} - -static int arizona_antenna_oc_reading(struct arizona_extcon_info *info, int val) -{ - struct arizona *arizona = info->arizona; - int ret; - - dev_dbg(arizona->dev, "%s: Reading: %d Ohms\n", __func__, val); - - if (val < 0) - return val; - - ret = arizona_micd_button_debounce(info, val); - if (ret < 0) - return ret; - - if (val > MICROPHONE_MAX_OHM) - return 0; - - arizona_jds_set_state(info, &arizona_antenna_mic_det); - - return 0; -} - -static int arizona_antenna_hp_reading(struct arizona_extcon_info *info, int val) -{ - struct arizona *arizona = info->arizona; - - dev_dbg(arizona->dev, "%s: Reading: %d Ohms\n", __func__, val); - - if (val < 0) - return val; - - arizona_set_headphone_imp(info, val); - - if (info->mic) { - arizona_extcon_report(info, BIT_HEADSET); - arizona_jds_set_state(info, &arizona_antenna_button_det); - } else { - arizona_extcon_report(info, BIT_HEADSET_NO_MIC); - arizona_jds_set_state(info, &arizona_antenna_remove_det); - } - - return 0; -} - -static int arizona_antenna_remove_reading(struct arizona_extcon_info *info, - int val) -{ - struct arizona *arizona = info->arizona; - int ret; - - dev_dbg(arizona->dev, "%s: Reading: %d Ohms\n", __func__, val); - - if (val < 0) - return val; - - ret = arizona_micd_button_debounce(info, val); - if (ret < 0) - return ret; - - if (val < MICROPHONE_MIN_OHM) - return 0; - - arizona_jds_set_state(info, &arizona_antenna_mic_det); - - return 0; -} - -static int arizona_add_micd_levels(struct arizona_extcon_info *info); - -static unsigned int arizona_antenna_get_micd_level(int imp, int range) -{ - unsigned int micd_lvl; - int impd_lvl; - - impd_lvl = imp + range; - - /* check if impedance level is supported */ - for (micd_lvl = 0; micd_lvl < ARIZONA_NUM_MICD_BUTTON_LEVELS; micd_lvl++) { - if (arizona_micd_levels[micd_lvl] >= impd_lvl) - break; - } - - return micd_lvl; -} - -static int arizona_antenna_add_micd_level(struct arizona_extcon_info *info, int imp) -{ - struct arizona *arizona = info->arizona; - struct arizona_pdata *pdata = &arizona->pdata; - int i, j, micd_lvl; - int ret = 0; - unsigned int hp_imp_range_lo = ARIZONA_NUM_MICD_BUTTON_LEVELS; - unsigned int hp_imp_range_hi = ARIZONA_NUM_MICD_BUTTON_LEVELS; - - /* check if additional impedance levels can be added */ - if (info->num_micd_ranges + 2 > ARIZONA_MAX_MICD_RANGE) { - dev_info(arizona->dev, "Cannot increase MICD ranges to: %d\n", - info->num_micd_ranges + 2); - ret = -EINVAL; - goto err_input; - } - - /* check if impedance level is supported */ - for (micd_lvl = 0; micd_lvl < ARIZONA_NUM_MICD_BUTTON_LEVELS; micd_lvl++) { - if (arizona_micd_levels[micd_lvl] >= imp) - break; - } - - if (micd_lvl == ARIZONA_NUM_MICD_BUTTON_LEVELS) { - dev_info(arizona->dev, "Unsupported MICD level %d\n", - imp); - ret = -EINVAL; - goto err_input; - } - - if (pdata->antenna_hp_imp_range_hi || - pdata->antenna_hp_imp_range_lo) { - hp_imp_range_hi = arizona_antenna_get_micd_level(imp, - pdata->antenna_hp_imp_range_hi); - hp_imp_range_lo = arizona_antenna_get_micd_level(imp, - -(pdata->antenna_hp_imp_range_lo)); - } - - if (hp_imp_range_lo == ARIZONA_NUM_MICD_BUTTON_LEVELS || - hp_imp_range_hi == ARIZONA_NUM_MICD_BUTTON_LEVELS) { - hp_imp_range_hi = arizona_antenna_get_micd_level(imp, 0); - if (hp_imp_range_hi - 2 > hp_imp_range_hi) - hp_imp_range_lo = 0; - else - hp_imp_range_lo = hp_imp_range_hi - 2; - } - - /* find index to insert an impedance level */ - for (i = 0; i < info->num_micd_ranges; i++) { - if (info->micd_ranges[i].max >= arizona_micd_levels[hp_imp_range_hi]) - break; - } - - if (info->micd_ranges[i].max == arizona_micd_levels[hp_imp_range_hi]) { - dev_info(arizona->dev, "MICD level already used %d\n", - imp); - ret = -EINVAL; - goto err_input; - } - - if (hp_imp_range_lo == hp_imp_range_hi) { - if ((hp_imp_range_hi != 0) && (i == 0)) - hp_imp_range_lo = hp_imp_range_hi - 1; - else if ((hp_imp_range_hi != 0) && - (info->micd_ranges[i-1].max < - arizona_micd_levels[hp_imp_range_hi - 1])) - hp_imp_range_lo = hp_imp_range_hi - 1; - else { - dev_info(arizona->dev, "MICD level range cannot be added %d\n", - hp_imp_range_lo); - ret = -EINVAL; - goto err_input; - } - } - - /* insert an impedance level */ - for (j =( info->num_micd_ranges - 1); j >= i; j--) { - info->micd_ranges[j+2].max = info->micd_ranges[j].max; - info->micd_ranges[j+2].key = info->micd_ranges[j].key; - } - info->micd_ranges[i].max = arizona_micd_levels[hp_imp_range_lo]; - if (i == info->num_micd_ranges) - info->micd_ranges[i].key = info->micd_ranges[i-1].key; - else - info->micd_ranges[i].key = info->micd_ranges[i+2].key; - info->micd_ranges[i+1].max =arizona_micd_levels[hp_imp_range_hi]; - info->micd_ranges[i+1].key = -1; - info->num_micd_ranges += 2; - ret = arizona_add_micd_levels(info); - -err_input: - return ret; -} - -static int arizona_antenna_remove_micd_level(struct arizona_extcon_info *info, int imp) -{ - struct arizona *arizona = info->arizona; - int i, j; - int ret =0; - - /* find index to remove */ - for (i = 0; i < info->num_micd_ranges; i++) { - if (info->micd_ranges[i].max == imp && - info->micd_ranges[i].key == -1) - break; - } - - if (i == info->num_micd_ranges) { - dev_info(arizona->dev, "MICD level %d doesn't exist\n", - imp); - ret = -EINVAL; - goto err_input; - } - - /* remove the impedance level */ - info->num_micd_ranges -= 2;; - for (j = i-1; j < info->num_micd_ranges; j++) { - info->micd_ranges[j].max = info->micd_ranges[j+2].max; - info->micd_ranges[j].key = info->micd_ranges[j+2].key; - } - ret = arizona_add_micd_levels(info); - -err_input: - return ret; -} - -static int arizona_antenna_button_start(struct arizona_extcon_info *info) -{ - struct arizona *arizona = info->arizona; - struct arizona_pdata *pdata = &arizona->pdata; - int i; - unsigned int micd_lvl = ARIZONA_NUM_MICD_BUTTON_LEVELS; - unsigned int hp_imp_range_hi = ARIZONA_NUM_MICD_BUTTON_LEVELS; - - info->button_impedance = 0; - info->button_check = 0; - info->wait_for_mic = false; - - /* check if impedance level is supported */ - micd_lvl = arizona_antenna_get_micd_level(arizona->hp_impedance, 0); - - if (micd_lvl == ARIZONA_NUM_MICD_BUTTON_LEVELS) - goto micd_start; - - if (pdata->antenna_hp_imp_range_hi) - hp_imp_range_hi = arizona_antenna_get_micd_level(arizona->hp_impedance, - pdata->antenna_hp_imp_range_hi); - - if (hp_imp_range_hi == ARIZONA_NUM_MICD_BUTTON_LEVELS) - hp_imp_range_hi = micd_lvl; - - for (i = 0; i < info->num_micd_ranges; i++) { - if (info->micd_ranges[i].key == -1) { - break; - } - } - - if ((i != info->num_micd_ranges) && - (info->micd_ranges[i].max != arizona_micd_levels[hp_imp_range_hi])) { - arizona_antenna_remove_micd_level(info, info->micd_ranges[i].max); - } - arizona_antenna_add_micd_level(info, arizona->hp_impedance); - - for (i = 0; i < info->num_micd_ranges; i++) - dev_dbg(arizona->dev, "%s: micd_lvl=%d: key=%d\n", __func__ , - info->micd_ranges[i].max, info->micd_ranges[i].key); - -micd_start: - return arizona_micd_start(info); -} - -static bool arizona_antenna_is_valid_button(struct arizona_extcon_info *info, int imp) -{ - int i; - int key = -1; - bool is_valid_button = true; - - if (imp < MICROPHONE_MIN_OHM) { - for (i = 0; i < info->num_micd_ranges; i++) { - if (imp <= info->micd_ranges[i].max) { - key = info->micd_ranges[i].key; - break; - } - } - is_valid_button = key > 0 ? true : false; - if (!is_valid_button) - info->wait_for_mic = true; - if (info->wait_for_mic) - is_valid_button = false; - } else { - info->wait_for_mic = false; - } - - return is_valid_button; -} -static int arizona_antenna_button_reading(struct arizona_extcon_info *info, - int val) -{ - struct arizona *arizona = info->arizona; - int ret; - - dev_dbg(arizona->dev, "%s: Reading: %d Ohms\n", __func__, val); - - if (val < 0) - return val; - - ret = arizona_micd_button_debounce(info, val); - if (ret < 0) - return ret; - - if (!arizona_antenna_is_valid_button(info, val)) - return val; - - if (val > MICROPHONE_MAX_OHM) { - int i; - - info->button_impedance = 0; - info->button_check = 0; - - /* Clear any currently pressed buttons */ - for (i = 0; i < info->num_micd_ranges; i++) - input_report_key(info->input, - info->micd_ranges[i].key, 0); - input_sync(info->input); - - arizona_extcon_report(info, BIT_NO_HEADSET); - arizona_jds_set_state(info, &arizona_antenna_mic_det); - } else { - switch (info->button_check) { - case 0: - info->button_impedance = val; - if (arizona->pdata.antenna_manual_db_plugout) - info->button_check = arizona->pdata.antenna_manual_db_plugout; - else - info->button_check = 2; - return -EAGAIN; - - case 1: - info->button_check = 0; - arizona_micd_button_process(info, - info->button_impedance); - if (info->button_impedance != val) - return -EAGAIN; - break; - - default: - info->button_check--; - return -EAGAIN; - } - } - - return 0; -} int arizona_micd_mic_start(struct arizona_extcon_info *info) { @@ -2950,22 +2378,6 @@ static irqreturn_t arizona_micdet(int irq, void *data) return IRQ_HANDLED; } -const struct arizona_jd_state arizona_hpdet_moisture = { - .mode = ARIZONA_ACCDET_MODE_HPL, - .start = arizona_hpdet_moisture_start, - .reading = arizona_hpdet_moisture_reading, - .stop = arizona_hpdet_moisture_stop, -}; -EXPORT_SYMBOL_GPL(arizona_hpdet_moisture); - -const struct arizona_jd_state arizona_hpdet_moisture_r = { - .mode = ARIZONA_ACCDET_MODE_HPR, - .start = arizona_hpdet_moisture_start, - .reading = arizona_hpdet_moisture_reading, - .stop = arizona_hpdet_moisture_stop, -}; -EXPORT_SYMBOL_GPL(arizona_hpdet_moisture_r); - const struct arizona_jd_state arizona_hpdet_left = { .mode = ARIZONA_ACCDET_MODE_HPL, .start = arizona_hpdet_start, @@ -3022,73 +2434,6 @@ const struct arizona_jd_state arizona_hpdet_acc_id = { }; EXPORT_SYMBOL_GPL(arizona_hpdet_acc_id); -/* States for Antenna Detect */ - -const struct arizona_jd_state arizona_antenna_moisture = { - .mode = ARIZONA_ACCDET_MODE_HPL, - .start = arizona_hpdet_moisture_start, - .reading = arizona_antenna_moisture_reading, - .stop = arizona_hpdet_moisture_stop, -}; -EXPORT_SYMBOL_GPL(arizona_antenna_moisture); - -const struct arizona_jd_state arizona_antenna_moisture_r = { - .mode = ARIZONA_ACCDET_MODE_HPR, - .start = arizona_hpdet_moisture_start, - .reading = arizona_antenna_moisture_reading, - .stop = arizona_hpdet_moisture_stop, -}; -EXPORT_SYMBOL_GPL(arizona_antenna_moisture_r); - -const struct arizona_jd_state arizona_antenna_mic_det = { - .mode = ARIZONA_ACCDET_MODE_ADC, - .start = arizona_micd_mic_start, - .reading = arizona_antenna_mic_reading, - .stop = arizona_micd_mic_stop, -}; -EXPORT_SYMBOL_GPL(arizona_antenna_mic_det); - -const struct arizona_jd_state arizona_antenna_oc_det = { - .mode = ARIZONA_ACCDET_MODE_MIC, - .start = arizona_micd_mic_start, - .reading = arizona_antenna_oc_reading, - .stop = arizona_micd_mic_stop, -}; -EXPORT_SYMBOL_GPL(arizona_antenna_oc_det); - -const struct arizona_jd_state arizona_antenna_hp_det = { - .mode = ARIZONA_ACCDET_MODE_HPL, - .start = arizona_hpdet_start, - .reading = arizona_antenna_hp_reading, - .stop = arizona_hpdet_stop, -}; -EXPORT_SYMBOL_GPL(arizona_antenna_hp_det); - -const struct arizona_jd_state arizona_antenna_hpr_det = { - .mode = ARIZONA_ACCDET_MODE_HPR, - .start = arizona_hpdet_start, - .reading = arizona_antenna_hp_reading, - .stop = arizona_hpdet_stop, -}; -EXPORT_SYMBOL_GPL(arizona_antenna_hpr_det); - -const struct arizona_jd_state arizona_antenna_button_det = { - .mode = ARIZONA_ACCDET_MODE_MIC, - .start = arizona_antenna_button_start, - .restart = arizona_micd_restart, - .reading = arizona_antenna_button_reading, - .stop = arizona_micd_stop, -}; -EXPORT_SYMBOL_GPL(arizona_antenna_button_det); - -const struct arizona_jd_state arizona_antenna_remove_det = { - .mode = ARIZONA_ACCDET_MODE_MIC, - .start = arizona_micd_start, - .reading = arizona_antenna_remove_reading, - .stop = arizona_micd_stop, -}; -EXPORT_SYMBOL_GPL(arizona_antenna_remove_det); - static void arizona_hpdet_work(struct work_struct *work) { struct arizona_extcon_info *info = container_of(work, @@ -3171,21 +2516,7 @@ static irqreturn_t arizona_jackdet(int irq, void *data) if (arizona->pdata.custom_jd) arizona_jds_set_state(info, arizona->pdata.custom_jd); - else if (arizona->pdata.antenna_supported) { - if (arizona->pdata.moisture_det_channel) - arizona_jds_set_state(info, - &arizona_antenna_moisture_r); - else - arizona_jds_set_state(info, - &arizona_antenna_moisture); - } else if (arizona->pdata.hpdet_moisture_imp) { - if (arizona->pdata.moisture_det_channel) - arizona_jds_set_state(info, - &arizona_hpdet_moisture_r); - else - arizona_jds_set_state(info, - &arizona_hpdet_moisture); - } else if (arizona->pdata.micd_software_compare) + else if (arizona->pdata.micd_software_compare) arizona_jds_set_state(info, &arizona_micd_adc_mic); else @@ -3212,7 +2543,6 @@ static irqreturn_t arizona_jackdet(int irq, void *data) info->micd_res_old = 0; info->micd_debounce = 0; info->micd_count = 0; - info->moisture_count = 0; arizona_jds_set_state(info, NULL); for (i = 0; i < info->num_micd_ranges; i++) @@ -3332,17 +2662,6 @@ static int arizona_extcon_of_get_pdata(struct arizona *arizona) arizona_of_read_s32(arizona, "wlf,micd-manual-debounce", false, &pdata->micd_manual_debounce); - arizona_of_read_s32(arizona, "wlf,antenna-manual-debounce", false, - &pdata->antenna_manual_debounce); - - arizona_of_read_s32(arizona, "wlf,antenna-manual-db-plugout", false, - &pdata->antenna_manual_db_plugout); - - arizona_of_read_s32(arizona, "wlf,antenna-hp-imp-range-lo", false, - &pdata->antenna_hp_imp_range_lo); - - arizona_of_read_s32(arizona, "wlf,antenna-hp-imp-range-hi", false, - &pdata->antenna_hp_imp_range_hi); pdata->micd_pol_gpio = arizona_of_get_named_gpio(arizona, "wlf,micd-pol-gpio", @@ -3384,9 +2703,6 @@ static int arizona_extcon_of_get_pdata(struct arizona *arizona) pdata->jd_invert = of_property_read_bool(arizona->dev->of_node, "wlf,jd-invert"); - pdata->antenna_supported = of_property_read_bool(arizona->dev->of_node, - "wlf,antenna-supported"); - arizona_of_read_u32(arizona, "wlf,gpsw", false, &pdata->gpsw); arizona_of_read_s32(arizona, "wlf,init-mic-delay", false, @@ -3395,21 +2711,12 @@ static int arizona_extcon_of_get_pdata(struct arizona *arizona) arizona_of_read_s32(arizona, "wlf,fixed-hpdet-imp", false, &pdata->fixed_hpdet_imp); - arizona_of_read_s32(arizona, "wlf,hpdet-moisture-imp", false, - &pdata->hpdet_moisture_imp); - - arizona_of_read_s32(arizona, "wlf,hpdet-moisture-debounce", false, - &pdata->hpdet_moisture_debounce); - arizona_of_read_s32(arizona, "wlf,hpdet-short-circuit-imp", false, &pdata->hpdet_short_circuit_imp); arizona_of_read_s32(arizona, "wlf,hpdet-channel", false, &pdata->hpdet_channel); - arizona_of_read_u32(arizona, "wlf,moisture-det-channel", false, - &pdata->moisture_det_channel); - arizona_of_read_s32(arizona, "wlf,jd-wake-time", false, &pdata->jd_wake_time); @@ -3439,10 +2746,6 @@ static int arizona_extcon_of_get_pdata(struct arizona *arizona) "wlf,hpd-right-pins", 1, &(pdata->hpd_r_pins.impd_pin)); - pdata->moisture_pin = MOON_HPD_SENSE_JD2; - arizona_of_read_u32(arizona, "wlf,moisture-detect-pin", false, - &pdata->moisture_pin); - return 0; } #else diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 666af0be75a..6f4bc56906f 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -152,13 +152,6 @@ struct arizona_pdata { /** set to true if jackdet contact opens on insert */ bool jd_invert; - /** - * Set to true to support antenna cable. antenna cable is a 4 pole - * cable with open circuit impedance and the usual 3 pole (headphone) - * or 4 pole (headset) cables can be plugged into the antenna cable - */ - bool antenna_supported; - /** If non-zero don't run headphone detection, report this value */ int fixed_hpdet_imp; @@ -182,21 +175,6 @@ struct arizona_pdata { */ int hpdet_short_circuit_imp; - /** - * Channel to use for moisture detection, valid values are 0 for - * left and 1 for right - */ - unsigned int moisture_det_channel; - - /** - * This value specifies the threshold impedance in ohms above - * which it will be considered a false detection - */ - int hpdet_moisture_imp; - - /** Software debounces for moisture detect */ - int hpdet_moisture_debounce; - /** * Channel to use for headphone detection, valid values are 0 for * left and 1 for right @@ -212,16 +190,6 @@ struct arizona_pdata { /** Extra software debounces during button detection */ int micd_manual_debounce; - /** Software debounces during 3/4 pole plugin into antenna cable */ - int antenna_manual_debounce; - - /** Software debounces during 3/4 pole plugout from antenna cable */ - int antenna_manual_db_plugout; - - /** range around hp impedance to be rejected to prevent false button events */ - int antenna_hp_imp_range_lo; - int antenna_hp_imp_range_hi; - /** GPIO for mic detection polarity */ int micd_pol_gpio; @@ -272,12 +240,6 @@ struct arizona_pdata { */ struct arizona_hpd_pins hpd_r_pins; - /** - * impedance_measurement_pin for - * detecting moisture - */ - unsigned int moisture_pin; - /** Reference voltage for DMIC inputs */ int dmic_ref[ARIZONA_MAX_INPUT]; From 25f8c7dec67e58bbbe6878457851f4ce8a26074f Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 24 Sep 2015 10:25:28 +0100 Subject: [PATCH 0973/1167] ASoC: wm_adsp: use default firmware name if none is specified in dt the earlier code was over-writing the information provided in dt this patch uses the default names only if none is specified in dt Change-Id: Ic3f8f842aab92873487f86eb8708dfe9ed4e5828 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/wm_adsp.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 4b992a7b922..abbdbc7ca17 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2964,10 +2964,9 @@ int wm_adsp2_init(struct wm_adsp *dsp, struct mutex *fw_lock) if (!dsp->dev->of_node || wm_adsp_of_parse_adsp(dsp) <= 0) { dsp->num_firmwares = WM_ADSP_NUM_FW; dsp->firmwares = wm_adsp_fw; + for (i = 0; i < dsp->num_firmwares; i++) + dsp->firmwares[i].name = wm_adsp_fw_text[i]; } - - for (i = 0; i < dsp->num_firmwares; i++) - dsp->firmwares[i].name = wm_adsp_fw_text[i]; } else { ctl_names = devm_kzalloc(dsp->dev, dsp->num_firmwares * sizeof(const char *), From bb6ab2ab0f617dc503f7f13e946369fef3a87e27 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 12 Aug 2015 17:11:19 +0100 Subject: [PATCH 0974/1167] mfd: arizona: Name argument to arizona_request_irq should be const Change-Id: I1b85845fc993c2f15ebfc971581078e001ef31ac Signed-off-by: Richard Fitzgerald --- drivers/mfd/arizona-irq.c | 2 +- include/linux/mfd/arizona/core.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index 465d5c734e6..1822c7a95fe 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -43,7 +43,7 @@ static int arizona_map_irq(struct arizona *arizona, int irq) return 0; } -int arizona_request_irq(struct arizona *arizona, int irq, char *name, +int arizona_request_irq(struct arizona *arizona, int irq, const char *name, irq_handler_t handler, void *data) { irq = arizona_map_irq(arizona, irq); diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 7b7b1677320..a0033c2b4b2 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -185,7 +185,7 @@ struct arizona { int arizona_clk32k_enable(struct arizona *arizona); int arizona_clk32k_disable(struct arizona *arizona); -int arizona_request_irq(struct arizona *arizona, int irq, char *name, +int arizona_request_irq(struct arizona *arizona, int irq, const char *name, irq_handler_t handler, void *data); void arizona_free_irq(struct arizona *arizona, int irq, void *data); int arizona_set_irq_wake(struct arizona *arizona, int irq, int on); From 16f38d821ed123eaabdd51aef2280044b63a0006 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 12 Aug 2015 17:20:02 +0100 Subject: [PATCH 0975/1167] Revert "mfd: arizona: move the deferred resume flag" This reverts commit c32962b03a6293cba1d6aa8eff17411fd82ea1ff. The deferred resume code was a hack workaround for a 3rd-party driver problem and should not be part of the Arizona driver. Change-Id: If0b012cf2aad7377dd2b93238e887f072d02d42a Signed-off-by: Richard Fitzgerald --- drivers/mfd/Kconfig | 6 ------ drivers/mfd/arizona-core.c | 8 ++++---- include/linux/mfd/arizona/core.h | 3 --- sound/soc/codecs/Kconfig | 3 +++ 4 files changed, 7 insertions(+), 13 deletions(-) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 88fb5b5eff8..594554f2553 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1011,12 +1011,6 @@ config MFD_ARIZONA select MFD_CORE bool -config MFD_ARIZONA_DEFERRED_RESUME - bool "Arizona Deferred Resume" - depends on MFD_ARIZONA - help - Support for Arizona deferred resume - config MFD_ARIZONA_I2C tristate "Wolfson Microelectronics Arizona platform with I2C" select MFD_ARIZONA diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 10b0e15aaa0..9f11013ca24 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -806,7 +806,7 @@ static int arizona_resume_noirq(struct device *dev) return 0; } -#ifdef CONFIG_MFD_ARIZONA_DEFERRED_RESUME +#ifdef CONFIG_SND_SOC_ARIZONA_DEFERRED_RESUME static void arizona_resume_deferred(struct work_struct *work) { struct arizona *arizona = @@ -832,7 +832,7 @@ static void arizona_resume_deferred(struct work_struct *work) static int arizona_resume(struct device *dev) { struct arizona *arizona = dev_get_drvdata(dev); -#ifdef CONFIG_MFD_ARIZONA_DEFERRED_RESUME +#ifdef CONFIG_SND_SOC_ARIZONA_DEFERRED_RESUME int level = -1; if (arizona->dapm) @@ -848,7 +848,7 @@ static int arizona_resume(struct device *dev) enable_irq(arizona->irq); arizona->irq_sem = 0; } -#ifdef CONFIG_MFD_ARIZONA_DEFERRED_RESUME +#ifdef CONFIG_SND_SOC_ARIZONA_DEFERRED_RESUME } #endif @@ -1618,7 +1618,7 @@ int arizona_dev_init(struct arizona *arizona) return -EINVAL; } -#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_MFD_ARIZONA_DEFERRED_RESUME) +#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_SND_SOC_ARIZONA_DEFERRED_RESUME) /* deferred resume work */ INIT_WORK(&arizona->deferred_resume_work, arizona_resume_deferred); #endif diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index a0033c2b4b2..564152d5ca2 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -174,9 +174,6 @@ struct arizona { uint8_t out_comp_enabled; bool micvdd_regulated; -#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_MFD_ARIZONA_DEFERRED_RESUME) - struct work_struct deferred_resume_work; -#endif struct mutex rate_lock; struct mutex dspclk_ena_lock; diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index bb11faf14f0..97d193ae9de 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -164,6 +164,9 @@ config SND_SOC_ARIZONA default m if SND_SOC_VEGAS=m default m if SND_SOC_LARGO=m +config SND_SOC_ARIZONA_DEFERRED_RESUME + tristate + config SND_SOC_WM_HUBS tristate default y if SND_SOC_WM8993=y || SND_SOC_WM8994=y From 285b82475f96b3a908307b790978c18e7bddee89 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 12 Aug 2015 17:22:00 +0100 Subject: [PATCH 0976/1167] Revert "mfd: arizona: add deferred resume" This reverts commit 8382d3e3fd9e4bc8292aa95a9ef60aac0ca49045. The deferred resume code was a hack workaround for a 3rd-party driver problem and should not be part of the Arizona driver. Change-Id: I9c045d271688566c3108e9cbcf13ad0f70e634cb Signed-off-by: Richard Fitzgerald --- drivers/mfd/arizona-core.c | 52 +++----------------------------------- sound/soc/codecs/Kconfig | 3 --- 2 files changed, 4 insertions(+), 51 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 9f11013ca24..270f9758b56 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -26,9 +26,6 @@ #include #include #include -#include -#include -#include #include #include @@ -806,51 +803,15 @@ static int arizona_resume_noirq(struct device *dev) return 0; } -#ifdef CONFIG_SND_SOC_ARIZONA_DEFERRED_RESUME -static void arizona_resume_deferred(struct work_struct *work) -{ - struct arizona *arizona = - container_of(work, struct arizona, deferred_resume_work); - int level = -1; - - if (arizona->dapm) - level = snd_power_get_state(arizona->dapm->card->snd_card); - - if ((arizona->dapm) && (level != SNDRV_CTL_POWER_D0)) { - if (!schedule_work(&arizona->deferred_resume_work)) - dev_err(arizona->dev, "Resume work item may be lost\n"); - } else { - dev_dbg(arizona->dev, "Deferred resume, reenabling IRQ\n"); - if (arizona->irq_sem) { - enable_irq(arizona->irq); - arizona->irq_sem = 0; - } - } -} -#endif - static int arizona_resume(struct device *dev) { struct arizona *arizona = dev_get_drvdata(dev); -#ifdef CONFIG_SND_SOC_ARIZONA_DEFERRED_RESUME - int level = -1; - - if (arizona->dapm) - level = snd_power_get_state(arizona->dapm->card->snd_card); - if ((arizona->dapm) && (level != SNDRV_CTL_POWER_D0)) { - if (!schedule_work(&arizona->deferred_resume_work)) - dev_err(dev, "Resume work item may be lost\n"); - } else { -#endif - dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n"); - if (arizona->irq_sem) { - enable_irq(arizona->irq); - arizona->irq_sem = 0; - } -#ifdef CONFIG_SND_SOC_ARIZONA_DEFERRED_RESUME + dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n"); + if (arizona->irq_sem) { + enable_irq(arizona->irq); + arizona->irq_sem = 0; } -#endif return 0; } @@ -1618,11 +1579,6 @@ int arizona_dev_init(struct arizona *arizona) return -EINVAL; } -#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_SND_SOC_ARIZONA_DEFERRED_RESUME) - /* deferred resume work */ - INIT_WORK(&arizona->deferred_resume_work, arizona_resume_deferred); -#endif - /* Mark DCVDD as external, LDO1 driver will clear if internal */ arizona->external_dcvdd = true; diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 97d193ae9de..bb11faf14f0 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -164,9 +164,6 @@ config SND_SOC_ARIZONA default m if SND_SOC_VEGAS=m default m if SND_SOC_LARGO=m -config SND_SOC_ARIZONA_DEFERRED_RESUME - tristate - config SND_SOC_WM_HUBS tristate default y if SND_SOC_WM8993=y || SND_SOC_WM8994=y From 5a167bacc1fc41ebe906c4685753d147af66b944 Mon Sep 17 00:00:00 2001 From: Stuart Henderson Date: Thu, 15 Oct 2015 13:04:48 +0100 Subject: [PATCH 0977/1167] mfd: moon: Add Moon HPDET calibration OTP addresses Add the new Moon HPDET calibration OTP addresses and replace the Clearwater ones in the Moon tables. Change-Id: Ib4729f8515ac73ed816dfaf17a7425b41a9f6723 Signed-off-by: Stuart Henderson --- drivers/mfd/moon-tables.c | 4 ++-- include/linux/mfd/arizona/registers.h | 2 ++ 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/moon-tables.c b/drivers/mfd/moon-tables.c index e0b8e4b7ed0..209be1c2452 100644 --- a/drivers/mfd/moon-tables.c +++ b/drivers/mfd/moon-tables.c @@ -2950,7 +2950,7 @@ static bool moon_32bit_readable_register(struct device *dev, unsigned int reg) { switch (reg) { case ARIZONA_WSEQ_SEQUENCE_1 ... ARIZONA_WSEQ_SEQUENCE_508: - case CLEARWATER_OTP_HPDET_CALIB_1 ... CLEARWATER_OTP_HPDET_CALIB_2: + case MOON_OTP_HPDET_CALIB_1 ... MOON_OTP_HPDET_CALIB_2: case CLEARWATER_DSP1_CONFIG ... MOON_DSP1_PMEM_ERR_ADDR_XMEM_ERR_ADDR: case CLEARWATER_DSP2_CONFIG ... MOON_DSP2_PMEM_ERR_ADDR_XMEM_ERR_ADDR: case CLEARWATER_DSP3_CONFIG ... MOON_DSP3_PMEM_ERR_ADDR_XMEM_ERR_ADDR: @@ -2968,7 +2968,7 @@ static bool moon_32bit_volatile_register(struct device *dev, unsigned int reg) { switch (reg) { case ARIZONA_WSEQ_SEQUENCE_1 ... ARIZONA_WSEQ_SEQUENCE_508: - case CLEARWATER_OTP_HPDET_CALIB_1 ... CLEARWATER_OTP_HPDET_CALIB_2: + case MOON_OTP_HPDET_CALIB_1 ... MOON_OTP_HPDET_CALIB_2: case CLEARWATER_DSP1_CONFIG ... MOON_DSP1_PMEM_ERR_ADDR_XMEM_ERR_ADDR: case CLEARWATER_DSP2_CONFIG ... MOON_DSP2_PMEM_ERR_ADDR_XMEM_ERR_ADDR: case CLEARWATER_DSP3_CONFIG ... MOON_DSP3_PMEM_ERR_ADDR_XMEM_ERR_ADDR: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 79d081adda0..9a3bb3b831b 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -2312,6 +2312,8 @@ #define MARLEY_OTP_HPDET_CALIB_2 0x31FA #define CLEARWATER_OTP_HPDET_CALIB_1 0x33F8 #define CLEARWATER_OTP_HPDET_CALIB_2 0x33FA +#define MOON_OTP_HPDET_CALIB_1 0x020004 +#define MOON_OTP_HPDET_CALIB_2 0x020006 #define CLEARWATER_DSP1_CONFIG 0x0FFE00 #define CLEARWATER_DSP1_STATUS_1 0x0FFE04 #define CLEARWATER_DSP1_STATUS_2 0x0FFE06 From 6df51be551bfaae79c22cc397ac3ff6d06fd70ba Mon Sep 17 00:00:00 2001 From: Stuart Henderson Date: Thu, 15 Oct 2015 13:17:19 +0100 Subject: [PATCH 0978/1167] switch: arizona: Enable HPDET calibration for Moon Enable Moon as an HPDET calibration variant of hpdet_ip_version 4. Notable variations being HP DACVAL is already averaged by the hardware, so don't read DACVAL DOWN, differing coefficients and the POLARITY_INV_ENA bit no longer needs to be set. Change-Id: Icfe2d00d34058780dffd5f1e8a3be7c4929d5f5f Signed-off-by: Stuart Henderson --- drivers/switch/switch-arizona.c | 94 +++++++++++++++++++++++++-------- 1 file changed, 72 insertions(+), 22 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index bc92c496ba2..9532cafddad 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -868,6 +868,18 @@ static const struct arizona_hpdet_calibration_data arizona_hpdet_clearwater_rang { 1000, 10000, 100684000, -949400, 7300, 63200000, 55, 250000, 500000}, }; +static const struct arizona_hpdet_calibration_data + arizona_hpdet_moon_ranges[] = { + { 4, 30, 1014000, -4300, 3950, 69300000, 381150, 700000, + 500000}, + { 8, 100, 1014000, -8600, 7975, 69600000, 382800, 700000, + 500000}, + { 100, 1000, 9744000, -79500, 7300, 62900000, 345950, 700000, + 500000}, + { 1000, 10000, 101158000, -949400, 7300, 63200000, 347600, 700000, + 500000}, +}; + static int arizona_hpdet_d_calibrate(const struct arizona_extcon_info *info, int dacval, int range) { @@ -1088,17 +1100,27 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) val = (val >> ARIZONA_HP_DACVAL_SHIFT) & ARIZONA_HP_DACVAL_MASK; if (info->hpdet_ip_version == 4) { - ret = regmap_read(arizona->regmap, - ARIZONA_HP_DACVAL, - &val_down); - if (ret != 0) { - dev_err(arizona->dev, "Failed to read HP DACVAL value: %d\n", - ret); - return -EAGAIN; + switch (arizona->type) { + case CS47L35: + case WM8285: + case WM1840: + ret = regmap_read(arizona->regmap, + ARIZONA_HP_DACVAL, + &val_down); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to read HP DACVAL value: %d\n", + ret); + return -EAGAIN; + } + val_down = (val_down >> + ARIZONA_HP_DACVAL_DOWN_SHIFT) & + ARIZONA_HP_DACVAL_DOWN_MASK; + val = (val + val_down) / 2; + break; + default: + break; } - val_down = (val_down >> ARIZONA_HP_DACVAL_DOWN_SHIFT) & - ARIZONA_HP_DACVAL_DOWN_MASK; - val = (val + val_down) / 2; } val = arizona_hpdet_d_calibrate(info, val, range); @@ -2920,13 +2942,18 @@ static int arizona_hpdet_clearwater_read_calibration(struct arizona_extcon_info unsigned int otp_hpdet_calib_1, otp_hpdet_calib_2; switch (arizona->type) { + case WM8285: + case WM1840: + otp_hpdet_calib_1 = CLEARWATER_OTP_HPDET_CALIB_1; + otp_hpdet_calib_2 = CLEARWATER_OTP_HPDET_CALIB_2; + break; case CS47L35: otp_hpdet_calib_1 = MARLEY_OTP_HPDET_CALIB_1; otp_hpdet_calib_2 = MARLEY_OTP_HPDET_CALIB_2; break; default: - otp_hpdet_calib_1 = CLEARWATER_OTP_HPDET_CALIB_1; - otp_hpdet_calib_2 = CLEARWATER_OTP_HPDET_CALIB_2; + otp_hpdet_calib_1 = MOON_OTP_HPDET_CALIB_1; + otp_hpdet_calib_2 = MOON_OTP_HPDET_CALIB_2; break; } @@ -2991,8 +3018,20 @@ static int arizona_hpdet_clearwater_read_calibration(struct arizona_extcon_info trims[3].grad_x4 = trims[2].grad_x4; info->hpdet_d_trims = trims; - info->calib_data = arizona_hpdet_clearwater_ranges; - info->calib_data_size = ARRAY_SIZE(arizona_hpdet_clearwater_ranges); + switch (arizona->type) { + case WM8285: + case WM1840: + case CS47L35: + info->calib_data = arizona_hpdet_clearwater_ranges; + info->calib_data_size = + ARRAY_SIZE(arizona_hpdet_clearwater_ranges); + break; + default: + info->calib_data = arizona_hpdet_moon_ranges; + info->calib_data_size = + ARRAY_SIZE(arizona_hpdet_moon_ranges); + break; + } return 0; } @@ -3191,7 +3230,7 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; default: info->micd_clamp = true; - info->hpdet_ip_version = 2; + info->hpdet_ip_version = 4; info->accdet_ip = 1; break; } @@ -3359,14 +3398,25 @@ static int arizona_extcon_probe(struct platform_device *pdev) break; case 4: arizona_hpdet_clearwater_read_calibration(info); - if (!info->hpdet_d_trims) + if (!info->hpdet_d_trims) { info->hpdet_ip_version = 2; - else - /* as per the hardware steps - below bit needs to be set - * for clearwater for accurate HP impedance detection */ - regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1, - ARIZONA_ACCDET_POLARITY_INV_ENA_MASK, - 1 << ARIZONA_ACCDET_POLARITY_INV_ENA_SHIFT); + } else { + switch (arizona->type) { + case CS47L35: + case WM8285: + case WM1840: + /* as per the hardware steps - below bit needs + * to be set for clearwater for accurate HP + * impedance detection */ + regmap_update_bits(arizona->regmap, + ARIZONA_ACCESSORY_DETECT_MODE_1, + ARIZONA_ACCDET_POLARITY_INV_ENA_MASK, + 1 << ARIZONA_ACCDET_POLARITY_INV_ENA_SHIFT); + break; + default: + break; + } + } break; default: break; From f9ab28edb07a3af3c8bdc1d1aea4d76b2b4a3598 Mon Sep 17 00:00:00 2001 From: Stuart Henderson Date: Thu, 15 Oct 2015 13:39:49 +0100 Subject: [PATCH 0979/1167] switch: arizona: Correct some misleading comments/strings Coefficient 1 of arizona_hpdet_calibration_data is stored as C1*1000000, not C1*10000. Fix up a dev_err string incorrectly claiming to have failed to read offset instead of gradient. Change-Id: Ifd251c498f6269c99c9d9076c3ac6dc79bdeee5e Signed-off-by: Stuart Henderson --- drivers/switch/switch-arizona.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 9532cafddad..a0890516b35 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -119,7 +119,7 @@ struct arizona_hpdet_calibration_data { int min; int max; s64 C0; /* value * 1000000 */ - s64 C1; /* value * 10000 */ + s64 C1; /* value * 1000000 */ s64 C2; /* not multiplied */ s64 C3; /* value * 1000000 */ s64 C4_x_C3; /* value * 1000000 */ @@ -2970,7 +2970,7 @@ static int arizona_hpdet_clearwater_read_calibration(struct arizona_extcon_info otp_hpdet_calib_2, &gradient); if (ret != 0) { - dev_err(arizona->dev, "Failed to read HP CALIB OFFSET value: %d\n", + dev_err(arizona->dev, "Failed to read HP CALIB GRADIENT value: %d\n", ret); return ret; } From 22f5075ab98feb7d4b2c20b63829777a322c5268 Mon Sep 17 00:00:00 2001 From: Stuart Henderson Date: Thu, 15 Oct 2015 10:38:34 +0100 Subject: [PATCH 0980/1167] switch: arizona: Update HPDET calibration coefficients for clearwater The C4 value in the arizona_hpdet_calibration_data coefficient table is C4*C3*1000000, not C4*10000, as was there. This was resulting in slightly inflated impedance calculation results. Change-Id: I21d9972a53b25e8afbeee8383ef4988e7a59d558 Signed-off-by: Stuart Henderson --- drivers/switch/switch-arizona.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index a0890516b35..333530cee48 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -862,10 +862,14 @@ static const struct arizona_hpdet_calibration_data arizona_hpdet_d_ranges[] = { }; static const struct arizona_hpdet_calibration_data arizona_hpdet_clearwater_ranges[] = { - { 4, 30, 1007000, -7200, 4003, 69300000, 55, 250000, 500000}, - { 8, 100, 1007000, -7200, 7975, 69600000, 55, 250000, 500000}, - { 100, 1000, 9696000, -79500, 7300, 62900000, 55, 250000, 500000}, - { 1000, 10000, 100684000, -949400, 7300, 63200000, 55, 250000, 500000}, + { 4, 30, 1007000, -7200, 4003, 69300000, 381150, + 250000, 500000}, + { 8, 100, 1007000, -7200, 7975, 69600000, 382800, + 250000, 500000}, + { 100, 1000, 9696000, -79500, 7300, 62900000, 345950, + 250000, 500000}, + { 1000, 10000, 100684000, -949400, 7300, 63200000, 347600, + 250000, 500000}, }; static const struct arizona_hpdet_calibration_data From acd196ca1af24488acedc8c81d29b764abc2b541 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 5 Nov 2015 11:15:24 +0900 Subject: [PATCH 0981/1167] mfd: arizona: include notifier.h notifier_block is used by arizona regulators so include notifier.h Change-Id: I183d19d9ae93d845a0f7caf2cfa6262cf2191355 Signed-off-by: Nikesh Oswal --- include/linux/mfd/arizona/core.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 564152d5ca2..e1d0866f9d6 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -17,6 +17,7 @@ #include #include #include +#include #include #define ARIZONA_MAX_CORE_SUPPLIES 2 From caf7f4d6f7163876abc53ce176cedb1955fc5735 Mon Sep 17 00:00:00 2001 From: Ajit Pandey Date: Tue, 13 Oct 2015 15:48:42 +0530 Subject: [PATCH 0982/1167] switch: arizona: Initialize the tuning level to some invalid value Change-Id: I9e3356d22ebd28cfeb26eec1db438ee979e37a14 Signed-off-by: Ajit Pandey --- drivers/switch/switch-arizona.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 333530cee48..0e87fa96636 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -73,6 +73,8 @@ #define ARIZONA_MIC_MUTE 1 #define ARIZONA_MIC_UNMUTE 0 +#define ARIZONA_HP_TUNING_INVALID -1 + #define MOON_HP_LOW_IMPEDANCE_LIMIT 11 #define MOON_HP_MEDIUM_IMPEDANCE_LIMIT 23 @@ -3390,6 +3392,10 @@ static int arizona_extcon_probe(struct platform_device *pdev) arizona_extcon_set_mode(info, 0); + /* Invalidate the tuning level so that the first detection + * will always apply a tuning */ + info->hp_imp_level = ARIZONA_HP_TUNING_INVALID; + pm_runtime_enable(&pdev->dev); pm_runtime_idle(&pdev->dev); pm_runtime_get_sync(&pdev->dev); From cfc6146450eaafdb95769a50d6eaabb8c2417da5 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 16 Sep 2015 15:35:11 +0100 Subject: [PATCH 0983/1167] mfd: arizona: Fix possible corruption of GPIO defaults The DT and pdata entries use a different value to signify "chip default". The pdata uses 0 (used because this will be the value of any struct entry not explicitly initialized). For DT since there's no sense of a default for unspecified entries the value >0xFFFF is used to mean "chip default", giving a more convenient behaviour that a value of 0 means 0. Because of this settings read from DT must be converted to pdata format. However, there are differing numbers of GPIOs on each codec so the code that fetches the GPIO defaults from the DT doesn't mandate a particular length, just takes as many entries as are available, but it was then performing the conversion on the entire gpio_defaults array in pdata. Thus if the DT configures fewer than the total number of GPIOs on the codec the remaining should be left at chip default (0 in pdata) but the faulty code would change them to instead overwrite the chip default with 0. This patch fixes arizona_of_get_gpio_defaults() function to only perform the conversion on the entries that were read from DT. Change-Id: I094bd2afa219f218d18d514533886e5290a9cf54 Signed-off-by: Richard Fitzgerald --- drivers/mfd/arizona-core.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 270f9758b56..862f0c41d9c 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -998,8 +998,6 @@ static int arizona_of_get_gpio_defaults(struct arizona *arizona, pdata->gpio_defaults[i++] = val; } - if (!i) - return 0; /* * All values are literal except out of range values @@ -1007,7 +1005,8 @@ static int arizona_of_get_gpio_defaults(struct arizona *arizona, * data which uses 0 as chip default and out of range * as zero. */ - for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) { + while (i > 0) { + --i; if (pdata->gpio_defaults[i] > 0xffff) pdata->gpio_defaults[i] = 0; else if (pdata->gpio_defaults[i] == 0) From 9514259a4cb24d4c57ae39a50d46647c77869e45 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 5 Oct 2015 13:11:39 +0100 Subject: [PATCH 0984/1167] ASoC: arizona: fix computation of opclk opclk-div can only take even value for some arizona chips Change-Id: I8fc7b9cd3347598bd70c8bf052ecc98e2a571673 Signed-off-by: Nikesh Oswal Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 23 ++++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index e9c3dbc4fa0..f20df630d21 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -3008,7 +3008,24 @@ static int arizona_set_opclk(struct snd_soc_codec *codec, unsigned int clk, struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); unsigned int reg; unsigned int *rates; - int ref, div, refclk; + int ref, refclk; + unsigned int div, div_incr; + + switch (priv->arizona->type) { + case WM5102: + case WM5110: + case WM8280: + case WM8998: + case WM1814: + case CS47L24: + case WM1831: + case WM8997: + div_incr = 1; + break; + default: + div_incr = 2; + break; + } switch (clk) { case ARIZONA_CLK_OPCLK: @@ -3030,7 +3047,7 @@ static int arizona_set_opclk(struct snd_soc_codec *codec, unsigned int clk, for (ref = 0; ref < ARRAY_SIZE(arizona_sysclk_48k_rates) && rates[ref] <= refclk; ref++) { - div = 1; + div = div_incr; while (rates[ref] / div >= freq && div < 32) { if (rates[ref] / div == freq) { dev_dbg(codec->dev, "Configured %dHz OPCLK\n", @@ -3043,7 +3060,7 @@ static int arizona_set_opclk(struct snd_soc_codec *codec, unsigned int clk, ref); return 0; } - div++; + div += div_incr; } } From ab9d282caca89646882754191842b4b8d0c0e16a Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Fri, 9 Oct 2015 13:42:47 +0100 Subject: [PATCH 0985/1167] mfd: arizona_irq: return error code if not able to map the irq return error code if we can't map the irq to either the aod chip or the non-aod chip Change-Id: I4fdd0c9b90cf0f938030ec00acc8ead63e3c0eb2 Signed-off-by: Nikesh Oswal --- drivers/mfd/arizona-irq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index 1822c7a95fe..35bf0c8aaef 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -40,7 +40,7 @@ static int arizona_map_irq(struct arizona *arizona, int irq) if (arizona->irq_chip) return regmap_irq_get_virq(arizona->irq_chip, irq); - return 0; + return -EINVAL; } int arizona_request_irq(struct arizona *arizona, int irq, const char *name, From 163cebf7e141dd5f7001cdc06087171529bb3478 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Fri, 9 Oct 2015 13:36:04 +0100 Subject: [PATCH 0986/1167] mfd: arizona: Register gpio level sensitive irq's Change-Id: I87f4756db99d921326da367583f7d8bd9ee84d23 Signed-off-by: Nikesh Oswal --- drivers/mfd/moon-tables.c | 18 +++ include/linux/mfd/arizona/core.h | 172 +++++++++++++------------- include/linux/mfd/arizona/registers.h | 36 ++++++ 3 files changed, 142 insertions(+), 84 deletions(-) diff --git a/drivers/mfd/moon-tables.c b/drivers/mfd/moon-tables.c index 209be1c2452..abc307d72aa 100644 --- a/drivers/mfd/moon-tables.c +++ b/drivers/mfd/moon-tables.c @@ -127,6 +127,24 @@ static const struct regmap_irq moon_irqs[ARIZONA_NUM_IRQ] = { .mask = CLEARWATER_DSP_IRQ7_EINT1}, [ARIZONA_IRQ_DSP_IRQ8] = { .reg_offset = 10, .mask = CLEARWATER_DSP_IRQ8_EINT1}, + + [ARIZONA_IRQ_GP1] = { .reg_offset = 16, + .mask = CLEARWATER_GP1_EINT1}, + [ARIZONA_IRQ_GP2] = { .reg_offset = 16, + .mask = CLEARWATER_GP2_EINT1}, + [ARIZONA_IRQ_GP3] = { .reg_offset = 16, + .mask = CLEARWATER_GP3_EINT1}, + [ARIZONA_IRQ_GP4] = { .reg_offset = 16, + .mask = CLEARWATER_GP4_EINT1}, + [ARIZONA_IRQ_GP5] = { .reg_offset = 16, + .mask = CLEARWATER_GP5_EINT1}, + [ARIZONA_IRQ_GP6] = { .reg_offset = 16, + .mask = CLEARWATER_GP6_EINT1}, + [ARIZONA_IRQ_GP7] = { .reg_offset = 16, + .mask = CLEARWATER_GP7_EINT1}, + [ARIZONA_IRQ_GP8] = { .reg_offset = 16, + .mask = CLEARWATER_GP8_EINT1}, + [MOON_IRQ_DSP1_BUS_ERROR] = { .reg_offset = 32, .mask = MOON_ADSP_ERROR_STATUS_DSP1}, [MOON_IRQ_DSP2_BUS_ERROR] = { .reg_offset = 32, diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index e1d0866f9d6..3ab63be6507 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -42,90 +42,94 @@ enum arizona_type { #define ARIZONA_IRQ_GP2 1 #define ARIZONA_IRQ_GP3 2 #define ARIZONA_IRQ_GP4 3 -#define ARIZONA_IRQ_GP5_FALL 4 -#define ARIZONA_IRQ_GP5_RISE 5 -#define ARIZONA_IRQ_JD_FALL 6 -#define ARIZONA_IRQ_JD_RISE 7 -#define ARIZONA_IRQ_DSP1_RAM_RDY 8 -#define ARIZONA_IRQ_DSP2_RAM_RDY 9 -#define ARIZONA_IRQ_DSP3_RAM_RDY 10 -#define ARIZONA_IRQ_DSP4_RAM_RDY 11 -#define ARIZONA_IRQ_DSP_IRQ1 12 -#define ARIZONA_IRQ_DSP_IRQ2 13 -#define ARIZONA_IRQ_DSP_IRQ3 14 -#define ARIZONA_IRQ_DSP_IRQ4 15 -#define ARIZONA_IRQ_DSP_IRQ5 16 -#define ARIZONA_IRQ_DSP_IRQ6 17 -#define ARIZONA_IRQ_DSP_IRQ7 18 -#define ARIZONA_IRQ_DSP_IRQ8 19 -#define ARIZONA_IRQ_SPK_OVERHEAT_WARN 20 -#define ARIZONA_IRQ_SPK_OVERHEAT 21 -#define ARIZONA_IRQ_MICDET 22 -#define ARIZONA_IRQ_HPDET 23 -#define ARIZONA_IRQ_WSEQ_DONE 24 -#define ARIZONA_IRQ_DRC2_SIG_DET 25 -#define ARIZONA_IRQ_DRC1_SIG_DET 26 -#define ARIZONA_IRQ_ASRC2_LOCK 27 -#define ARIZONA_IRQ_ASRC1_LOCK 28 -#define ARIZONA_IRQ_UNDERCLOCKED 29 -#define ARIZONA_IRQ_OVERCLOCKED 30 -#define ARIZONA_IRQ_FLL2_LOCK 31 -#define ARIZONA_IRQ_FLL1_LOCK 32 -#define ARIZONA_IRQ_CLKGEN_ERR 33 -#define ARIZONA_IRQ_CLKGEN_ERR_ASYNC 34 -#define ARIZONA_IRQ_ASRC_CFG_ERR 35 -#define ARIZONA_IRQ_AIF3_ERR 36 -#define ARIZONA_IRQ_AIF2_ERR 37 -#define ARIZONA_IRQ_AIF1_ERR 38 -#define ARIZONA_IRQ_CTRLIF_ERR 39 -#define ARIZONA_IRQ_MIXER_DROPPED_SAMPLES 40 -#define ARIZONA_IRQ_ASYNC_CLK_ENA_LOW 41 -#define ARIZONA_IRQ_SYSCLK_ENA_LOW 42 -#define ARIZONA_IRQ_ISRC1_CFG_ERR 43 -#define ARIZONA_IRQ_ISRC2_CFG_ERR 44 -#define ARIZONA_IRQ_BOOT_DONE 45 -#define ARIZONA_IRQ_DCS_DAC_DONE 46 -#define ARIZONA_IRQ_DCS_HP_DONE 47 -#define ARIZONA_IRQ_FLL2_CLOCK_OK 48 -#define ARIZONA_IRQ_FLL1_CLOCK_OK 49 -#define ARIZONA_IRQ_MICD_CLAMP_RISE 50 -#define ARIZONA_IRQ_MICD_CLAMP_FALL 51 -#define ARIZONA_IRQ_HP3R_DONE 52 -#define ARIZONA_IRQ_HP3L_DONE 53 -#define ARIZONA_IRQ_HP2R_DONE 54 -#define ARIZONA_IRQ_HP2L_DONE 55 -#define ARIZONA_IRQ_HP1R_DONE 56 -#define ARIZONA_IRQ_HP1L_DONE 57 -#define ARIZONA_IRQ_ISRC3_CFG_ERR 58 -#define ARIZONA_IRQ_DSP_SHARED_WR_COLL 59 -#define ARIZONA_IRQ_SPK_SHUTDOWN 60 -#define ARIZONA_IRQ_SPK1R_SHORT 61 -#define ARIZONA_IRQ_SPK1L_SHORT 62 -#define ARIZONA_IRQ_HP3R_SC_NEG 63 -#define ARIZONA_IRQ_HP3R_SC_POS 64 -#define ARIZONA_IRQ_HP3L_SC_NEG 65 -#define ARIZONA_IRQ_HP3L_SC_POS 66 -#define ARIZONA_IRQ_HP2R_SC_NEG 67 -#define ARIZONA_IRQ_HP2R_SC_POS 68 -#define ARIZONA_IRQ_HP2L_SC_NEG 69 -#define ARIZONA_IRQ_HP2L_SC_POS 70 -#define ARIZONA_IRQ_HP1R_SC_NEG 71 -#define ARIZONA_IRQ_HP1R_SC_POS 72 -#define ARIZONA_IRQ_HP1L_SC_NEG 73 -#define ARIZONA_IRQ_HP1L_SC_POS 74 -#define ARIZONA_IRQ_FLL3_LOCK 75 -#define ARIZONA_IRQ_FLL3_CLOCK_OK 76 -#define MOON_IRQ_FLLAO_CLOCK_OK 77 -#define MOON_IRQ_MICDET2 78 -#define MOON_IRQ_DSP1_BUS_ERROR 79 -#define MOON_IRQ_DSP2_BUS_ERROR 80 -#define MOON_IRQ_DSP3_BUS_ERROR 81 -#define MOON_IRQ_DSP4_BUS_ERROR 82 -#define MOON_IRQ_DSP5_BUS_ERROR 83 -#define MOON_IRQ_DSP6_BUS_ERROR 84 -#define MOON_IRQ_DSP7_BUS_ERROR 85 - -#define ARIZONA_NUM_IRQ 86 +#define ARIZONA_IRQ_GP5 4 +#define ARIZONA_IRQ_GP6 5 +#define ARIZONA_IRQ_GP7 6 +#define ARIZONA_IRQ_GP8 7 +#define ARIZONA_IRQ_GP5_FALL 8 +#define ARIZONA_IRQ_GP5_RISE 9 +#define ARIZONA_IRQ_JD_FALL 10 +#define ARIZONA_IRQ_JD_RISE 11 +#define ARIZONA_IRQ_DSP1_RAM_RDY 12 +#define ARIZONA_IRQ_DSP2_RAM_RDY 13 +#define ARIZONA_IRQ_DSP3_RAM_RDY 14 +#define ARIZONA_IRQ_DSP4_RAM_RDY 15 +#define ARIZONA_IRQ_DSP_IRQ1 16 +#define ARIZONA_IRQ_DSP_IRQ2 17 +#define ARIZONA_IRQ_DSP_IRQ3 18 +#define ARIZONA_IRQ_DSP_IRQ4 19 +#define ARIZONA_IRQ_DSP_IRQ5 20 +#define ARIZONA_IRQ_DSP_IRQ6 21 +#define ARIZONA_IRQ_DSP_IRQ7 22 +#define ARIZONA_IRQ_DSP_IRQ8 23 +#define ARIZONA_IRQ_SPK_OVERHEAT_WARN 24 +#define ARIZONA_IRQ_SPK_OVERHEAT 25 +#define ARIZONA_IRQ_MICDET 26 +#define ARIZONA_IRQ_HPDET 27 +#define ARIZONA_IRQ_WSEQ_DONE 28 +#define ARIZONA_IRQ_DRC2_SIG_DET 29 +#define ARIZONA_IRQ_DRC1_SIG_DET 30 +#define ARIZONA_IRQ_ASRC2_LOCK 31 +#define ARIZONA_IRQ_ASRC1_LOCK 32 +#define ARIZONA_IRQ_UNDERCLOCKED 33 +#define ARIZONA_IRQ_OVERCLOCKED 34 +#define ARIZONA_IRQ_FLL2_LOCK 35 +#define ARIZONA_IRQ_FLL1_LOCK 36 +#define ARIZONA_IRQ_CLKGEN_ERR 37 +#define ARIZONA_IRQ_CLKGEN_ERR_ASYNC 38 +#define ARIZONA_IRQ_ASRC_CFG_ERR 39 +#define ARIZONA_IRQ_AIF3_ERR 40 +#define ARIZONA_IRQ_AIF2_ERR 41 +#define ARIZONA_IRQ_AIF1_ERR 42 +#define ARIZONA_IRQ_CTRLIF_ERR 43 +#define ARIZONA_IRQ_MIXER_DROPPED_SAMPLES 44 +#define ARIZONA_IRQ_ASYNC_CLK_ENA_LOW 45 +#define ARIZONA_IRQ_SYSCLK_ENA_LOW 46 +#define ARIZONA_IRQ_ISRC1_CFG_ERR 47 +#define ARIZONA_IRQ_ISRC2_CFG_ERR 48 +#define ARIZONA_IRQ_BOOT_DONE 49 +#define ARIZONA_IRQ_DCS_DAC_DONE 50 +#define ARIZONA_IRQ_DCS_HP_DONE 51 +#define ARIZONA_IRQ_FLL2_CLOCK_OK 52 +#define ARIZONA_IRQ_FLL1_CLOCK_OK 53 +#define ARIZONA_IRQ_MICD_CLAMP_RISE 54 +#define ARIZONA_IRQ_MICD_CLAMP_FALL 55 +#define ARIZONA_IRQ_HP3R_DONE 56 +#define ARIZONA_IRQ_HP3L_DONE 57 +#define ARIZONA_IRQ_HP2R_DONE 58 +#define ARIZONA_IRQ_HP2L_DONE 59 +#define ARIZONA_IRQ_HP1R_DONE 60 +#define ARIZONA_IRQ_HP1L_DONE 61 +#define ARIZONA_IRQ_ISRC3_CFG_ERR 62 +#define ARIZONA_IRQ_DSP_SHARED_WR_COLL 63 +#define ARIZONA_IRQ_SPK_SHUTDOWN 64 +#define ARIZONA_IRQ_SPK1R_SHORT 65 +#define ARIZONA_IRQ_SPK1L_SHORT 66 +#define ARIZONA_IRQ_HP3R_SC_NEG 67 +#define ARIZONA_IRQ_HP3R_SC_POS 68 +#define ARIZONA_IRQ_HP3L_SC_NEG 69 +#define ARIZONA_IRQ_HP3L_SC_POS 70 +#define ARIZONA_IRQ_HP2R_SC_NEG 71 +#define ARIZONA_IRQ_HP2R_SC_POS 72 +#define ARIZONA_IRQ_HP2L_SC_NEG 73 +#define ARIZONA_IRQ_HP2L_SC_POS 74 +#define ARIZONA_IRQ_HP1R_SC_NEG 75 +#define ARIZONA_IRQ_HP1R_SC_POS 76 +#define ARIZONA_IRQ_HP1L_SC_NEG 77 +#define ARIZONA_IRQ_HP1L_SC_POS 78 +#define ARIZONA_IRQ_FLL3_LOCK 79 +#define ARIZONA_IRQ_FLL3_CLOCK_OK 80 +#define MOON_IRQ_FLLAO_CLOCK_OK 81 +#define MOON_IRQ_MICDET2 82 +#define MOON_IRQ_DSP1_BUS_ERROR 83 +#define MOON_IRQ_DSP2_BUS_ERROR 84 +#define MOON_IRQ_DSP3_BUS_ERROR 85 +#define MOON_IRQ_DSP4_BUS_ERROR 86 +#define MOON_IRQ_DSP5_BUS_ERROR 87 +#define MOON_IRQ_DSP6_BUS_ERROR 88 +#define MOON_IRQ_DSP7_BUS_ERROR 89 + +#define ARIZONA_NUM_IRQ 90 #define ARIZONA_HP_SHORT_IMPEDANCE 4 struct snd_soc_dapm_context; diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 9a3bb3b831b..5dc60454675 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -11525,6 +11525,42 @@ #define CLEARWATER_SPK_SHUTDOWN_EINT1_SHIFT 0 /* SPK_SHUTDOWN_EINT1 */ #define CLEARWATER_SPK_SHUTDOWN_EINT1_WIDTH 1 /* SPK_SHUTDOWN_EINT1 */ +/* + * R6160 (0x1810) - IRQ1 Status 17 + */ +#define CLEARWATER_GP1_EINT1 0x0001 /* GP1_EINT1 */ +#define CLEARWATER_GP1_EINT1_MASK 0x0001 /* GP1_EINT1 */ +#define CLEARWATER_GP1_EINT1_SHIFT 0 /* GP1_EINT1 */ +#define CLEARWATER_GP1_EINT1_WIDTH 1 /* GP1_EINT1 */ +#define CLEARWATER_GP2_EINT1 0x0002 /* GP2_EINT1 */ +#define CLEARWATER_GP2_EINT1_MASK 0x0002 /* GP2_EINT1 */ +#define CLEARWATER_GP2_EINT1_SHIFT 1 /* GP2_EINT1 */ +#define CLEARWATER_GP2_EINT1_WIDTH 1 /* GP2_EINT1 */ +#define CLEARWATER_GP3_EINT1 0x0004 /* GP3_EINT1 */ +#define CLEARWATER_GP3_EINT1_MASK 0x0004 /* GP3_EINT1 */ +#define CLEARWATER_GP3_EINT1_SHIFT 2 /* GP3_EINT1 */ +#define CLEARWATER_GP3_EINT1_WIDTH 1 /* GP3_EINT1 */ +#define CLEARWATER_GP4_EINT1 0x0008 /* GP4_EINT1 */ +#define CLEARWATER_GP4_EINT1_MASK 0x0008 /* GP4_EINT1 */ +#define CLEARWATER_GP4_EINT1_SHIFT 3 /* GP4_EINT1 */ +#define CLEARWATER_GP4_EINT1_WIDTH 1 /* GP4_EINT1 */ +#define CLEARWATER_GP5_EINT1 0x0010 /* GP5_EINT1 */ +#define CLEARWATER_GP5_EINT1_MASK 0x0010 /* GP5_EINT1 */ +#define CLEARWATER_GP5_EINT1_SHIFT 4 /* GP5_EINT1 */ +#define CLEARWATER_GP5_EINT1_WIDTH 1 /* GP5_EINT1 */ +#define CLEARWATER_GP6_EINT1 0x0020 /* GP6_EINT1 */ +#define CLEARWATER_GP6_EINT1_MASK 0x0020 /* GP6_EINT1 */ +#define CLEARWATER_GP6_EINT1_SHIFT 5 /* GP6_EINT1 */ +#define CLEARWATER_GP6_EINT1_WIDTH 1 /* GP6_EINT1 */ +#define CLEARWATER_GP7_EINT1 0x0040 /* GP7_EINT1 */ +#define CLEARWATER_GP7_EINT1_MASK 0x0040 /* GP7_EINT1 */ +#define CLEARWATER_GP7_EINT1_SHIFT 6 /* GP7_EINT1 */ +#define CLEARWATER_GP7_EINT1_WIDTH 1 /* GP7_EINT1 */ +#define CLEARWATER_GP8_EINT1 0x0080 /* GP8_EINT1 */ +#define CLEARWATER_GP8_EINT1_MASK 0x0080 /* GP8_EINT1 */ +#define CLEARWATER_GP8_EINT1_SHIFT 7 /* GP8_EINT1 */ +#define CLEARWATER_GP8_EINT1_WIDTH 1 /* GP8_EINT1 */ + /* * R6176 (0x1820) - IRQ1 Status 33 */ From b559440d345182c5251757cb8a3a9bbbbfe32d31 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 19 Oct 2015 09:59:29 +0100 Subject: [PATCH 0987/1167] mfd: arizona: Export arizona_map_irq Export arizona_map_irq for use in the GPIO driver to map GPIOs to IRQs. Change-Id: I69427c3f812e9cc129e54014862654f684abd5c4 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-irq.c | 3 ++- include/linux/mfd/arizona/core.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index 35bf0c8aaef..ff190a79884 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -27,7 +27,7 @@ #include "arizona.h" -static int arizona_map_irq(struct arizona *arizona, int irq) +int arizona_map_irq(struct arizona *arizona, int irq) { int ret; @@ -42,6 +42,7 @@ static int arizona_map_irq(struct arizona *arizona, int irq) return -EINVAL; } +EXPORT_SYMBOL_GPL(arizona_map_irq); int arizona_request_irq(struct arizona *arizona, int irq, const char *name, irq_handler_t handler, void *data) diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 3ab63be6507..213e22ef57d 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -191,6 +191,7 @@ int arizona_request_irq(struct arizona *arizona, int irq, const char *name, irq_handler_t handler, void *data); void arizona_free_irq(struct arizona *arizona, int irq, void *data); int arizona_set_irq_wake(struct arizona *arizona, int irq, int on); +int arizona_map_irq(struct arizona *arizona, int irq); #ifdef CONFIG_MFD_WM5102 int wm5102_patch(struct arizona *arizona); From f26ac57cd11c1533c29eaa6aff5fe5c025d30061 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 7 Oct 2015 15:59:38 +0100 Subject: [PATCH 0988/1167] gpio: arizona: add support to map gpio to irq for moon Change-Id: Ib05772f14130015e4dc0bfc5bfea92cdb5b6cc44 Signed-off-by: Nikesh Oswal Signed-off-by: Charles Keepax --- drivers/gpio/gpio-arizona.c | 39 +++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/drivers/gpio/gpio-arizona.c b/drivers/gpio/gpio-arizona.c index 115452f5f6b..8de75a69129 100644 --- a/drivers/gpio/gpio-arizona.c +++ b/drivers/gpio/gpio-arizona.c @@ -150,6 +150,44 @@ static void clearwater_gpio_set(struct gpio_chip *chip, unsigned offset, int val CLEARWATER_GPN_LVL, value); } +static int clearwater_gpio_to_irq(struct gpio_chip *chip, unsigned offset) +{ + struct arizona_gpio *arizona_gpio = to_arizona_gpio(chip); + struct arizona *arizona = arizona_gpio->arizona; + int irq; + + switch (offset) { + case 0: + irq = ARIZONA_IRQ_GP1; + break; + case 1: + irq = ARIZONA_IRQ_GP2; + break; + case 2: + irq = ARIZONA_IRQ_GP3; + break; + case 3: + irq = ARIZONA_IRQ_GP4; + break; + case 4: + irq = ARIZONA_IRQ_GP5; + break; + case 5: + irq = ARIZONA_IRQ_GP6; + break; + case 6: + irq = ARIZONA_IRQ_GP7; + break; + case 7: + irq = ARIZONA_IRQ_GP8; + break; + default: + return -EINVAL; + } + + return arizona_map_irq(arizona, irq); +} + static struct gpio_chip template_chip = { .label = "arizona", .owner = THIS_MODULE, @@ -221,6 +259,7 @@ static int arizona_gpio_probe(struct platform_device *pdev) arizona_gpio->gpio_chip.direction_output = clearwater_gpio_direction_out; arizona_gpio->gpio_chip.set = clearwater_gpio_set; + arizona_gpio->gpio_chip.to_irq = clearwater_gpio_to_irq; arizona_gpio->gpio_chip.ngpio = 38; break; From c091d2a4d7f91b22235628194b833a3e59d35f78 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 19 Oct 2015 14:41:21 +0100 Subject: [PATCH 0989/1167] ASoC: arizona: modify gains for moon fll Use separate gain tables for synchroniser and main loop. For the main loop: When main loop is in fractional mode (or) when both synchroniser and main loops are used we apply the gains as per the fll_moon_gains table else we apply a fixed gain of 8/4 based on value of fref For the synchroniser loop: Gains is applied as per the fll_gains table Change-Id: I8e272586c52860649dcc2dc687495fe3a6028f92 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 70 ++++++++++++++++++++++++++++++-------- sound/soc/codecs/arizona.h | 1 + 2 files changed, 56 insertions(+), 15 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index f20df630d21..5d2b575cac0 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -4210,16 +4210,26 @@ static struct { { 1000000, 13500000, 0, 1 }, }; -static struct { +struct arizona_fll_gain { unsigned int min; unsigned int max; u16 gain; -} fll_gains[] = { +}; + +static struct arizona_fll_gain fll_gains[] = { { 0, 256000, 0 }, { 256000, 1000000, 2 }, { 1000000, 13500000, 4 }, }; +static struct arizona_fll_gain fll_moon_gains[] = { + { 0, 100000, 0 }, + { 100000, 375000, 2 }, + { 375000, 1500000, 3 }, + { 1500000, 6000000, 4 }, + { 6000000, 13500000, 5 }, +}; + static int arizona_validate_fll(struct arizona_fll *fll, unsigned int fin, unsigned int fvco) @@ -4383,6 +4393,8 @@ static int arizona_calc_fll(struct arizona_fll *fll, unsigned int fvco, gcd_fll; int i, ratio; unsigned int fref; + struct arizona_fll_gain *fll_gain; + unsigned int size_fll_gain; arizona_fll_dbg(fll, "fin=%u fout=%u\n", fin, fll->fout); @@ -4428,13 +4440,17 @@ static int arizona_calc_fll(struct arizona_fll *fll, cfg->lambda >>= 1; } + fll_gain = fll_gains; + size_fll_gain = ARRAY_SIZE(fll_gains); + switch (fll->arizona->type) { default: if (!sync) { - cfg->gain = fref > 768000 ? 3 : 2; - break; + cfg->intg_gain = fref > 768000 ? 3 : 2; + fll_gain = fll_moon_gains; + size_fll_gain = ARRAY_SIZE(fll_moon_gains); } - /* for sync loop fall through */ + /* fall-through */ case WM5102: case WM5110: case WM8997: @@ -4446,13 +4462,14 @@ static int arizona_calc_fll(struct arizona_fll *fll, case WM1831: case CS47L24: case CS47L35: - for (i = 0; i < ARRAY_SIZE(fll_gains); i++) { - if (fll_gains[i].min <= fref && fref <= fll_gains[i].max) { - cfg->gain = fll_gains[i].gain; + for (i = 0; i < size_fll_gain; i++) { + if (fll_gain[i].min <= fref && + fref <= fll_gain[i].max) { + cfg->gain = fll_gain[i].gain; break; } } - if (i == ARRAY_SIZE(fll_gains)) { + if (i == size_fll_gain) { arizona_fll_err(fll, "Unable to find gain for fref=%uHz\n", fref); return -EINVAL; @@ -4475,7 +4492,7 @@ static int arizona_calc_fll(struct arizona_fll *fll, static bool arizona_apply_fll(struct arizona *arizona, unsigned int base, struct arizona_fll_cfg *cfg, int source, - bool sync) + int gain, bool sync) { bool change, fll_change; @@ -4500,7 +4517,7 @@ static bool arizona_apply_fll(struct arizona *arizona, unsigned int base, if (sync) { regmap_update_bits_check(arizona->regmap, base + 0x7, ARIZONA_FLL1_GAIN_MASK, - cfg->gain << ARIZONA_FLL1_GAIN_SHIFT, &change); + gain << ARIZONA_FLL1_GAIN_SHIFT, &change); fll_change |= change; } else { regmap_update_bits(arizona->regmap, base + 0x5, @@ -4508,7 +4525,7 @@ static bool arizona_apply_fll(struct arizona *arizona, unsigned int base, cfg->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT); regmap_update_bits_check(arizona->regmap, base + 0x9, ARIZONA_FLL1_GAIN_MASK, - cfg->gain << ARIZONA_FLL1_GAIN_SHIFT, &change); + gain << ARIZONA_FLL1_GAIN_SHIFT, &change); fll_change |= change; } @@ -4586,6 +4603,7 @@ static int arizona_enable_fll(struct arizona_fll *fll) struct arizona_fll_cfg *sync_cfg = &(fll->sync_cfg); bool fll_change, change; unsigned int fsync_freq; + int gain; if (already_enabled < 0) return already_enabled; @@ -4610,19 +4628,41 @@ static int arizona_enable_fll(struct arizona_fll *fll) arizona_calc_fll(fll, ref_cfg, fll->ref_freq, false); fll_change = arizona_apply_fll(arizona, fll->base, ref_cfg, fll->ref_src, - false); + ref_cfg->gain, false); if (fll->sync_src >= 0) { arizona_calc_fll(fll, sync_cfg, fll->sync_freq, true); fsync_freq = fll->sync_freq / (1 << sync_cfg->refdiv); fll_change |= arizona_apply_fll(arizona, fll->base + fll->sync_offset, - sync_cfg, fll->sync_src, true); + sync_cfg, fll->sync_src, + sync_cfg->gain, true); use_sync = true; } } else if (fll->sync_src >= 0) { arizona_calc_fll(fll, ref_cfg, fll->sync_freq, false); + gain = ref_cfg->gain; + + switch (fll->arizona->type) { + case WM5102: + case WM5110: + case WM8997: + case WM8280: + case WM8998: + case WM1814: + case WM8285: + case WM1840: + case WM1831: + case CS47L24: + case CS47L35: + break; + default: + if (ref_cfg->theta == 0) + gain = ref_cfg->intg_gain; + break; + } + fll_change = arizona_apply_fll(arizona, fll->base, ref_cfg, - fll->sync_src, false); + fll->sync_src, gain, false); regmap_update_bits(arizona->regmap, fll->base + fll->sync_offset + 0x1, diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 857215b8f18..d0446bccd3b 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -409,6 +409,7 @@ struct arizona_fll_cfg { int outdiv; int fratio; int gain; + int intg_gain; const struct reg_sequence *patch; unsigned int patch_size; }; From d421380b3576b1e3165512e4369659929a13bae5 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 19 Oct 2015 16:30:15 +0100 Subject: [PATCH 0990/1167] ASoC: arizona: fix the fll_ao_hold settings When enabling fll_ao: 1. We must always set the fll_ao_hold 2. Then reconfigure and enable fll_ao 3. Release the fll_ao_hold so that the configurations done in 2 take effect and fllao outputs the newly configured frequency When disabling fll_ao: 1. set the fll_ao_hold so that the current configuration is held for later use 2. Disable fll_ao 3. Keep the fll_ao_hold in set condition and must remain set as long as fll_ao is disabled Change-Id: I2dd0d0b312a2dfe48bfced9a1d0e54c3cf8b8ead Signed-off-by: Nikesh Oswal --- sound/soc/codecs/arizona.c | 19 ++++++------------- 1 file changed, 6 insertions(+), 13 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 5d2b575cac0..35c9cd4b3e6 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -4852,14 +4852,9 @@ static int arizona_enable_fll_ao(struct arizona_fll *fll, arizona_fll_dbg(fll, "Enabling FLL, initially %s\n", already_enabled ? "enabled" : "disabled"); - if (already_enabled) { - /* Facilitate smooth refclk across the transition */ - regmap_update_bits(fll->arizona->regmap, fll->base + 1, - MOON_FLL_AO_HOLD, MOON_FLL_AO_HOLD); - } else { - regmap_update_bits(fll->arizona->regmap, fll->base + 1, - MOON_FLL_AO_HOLD, 0); - } + /* FLL_AO_HOLD must be set before configuring any registers */ + regmap_update_bits(fll->arizona->regmap, fll->base + 1, + MOON_FLL_AO_HOLD, MOON_FLL_AO_HOLD); if (patch) { regmap_multi_reg_write(arizona->regmap, patch, @@ -4901,9 +4896,9 @@ static int arizona_enable_fll_ao(struct arizona_fll *fll, regmap_update_bits(arizona->regmap, fll->base + 1, MOON_FLL_AO_ENA, MOON_FLL_AO_ENA); - if (already_enabled) - regmap_update_bits(arizona->regmap, fll->base + 1, - MOON_FLL_AO_HOLD, 0); + /* Release the hold so that fll_ao locks to external frequency */ + regmap_update_bits(arizona->regmap, fll->base + 1, + MOON_FLL_AO_HOLD, 0); if (!already_enabled) arizona_wait_for_fll(fll, true); @@ -4922,8 +4917,6 @@ static int arizona_disable_fll_ao(struct arizona_fll *fll) MOON_FLL_AO_HOLD, MOON_FLL_AO_HOLD); regmap_update_bits_check(arizona->regmap, fll->base + 1, MOON_FLL_AO_ENA, 0, &change); - regmap_update_bits(arizona->regmap, fll->base + 1, - MOON_FLL_AO_HOLD, 0); arizona_wait_for_fll(fll, false); From 39ffa701906698b2e13b57e9358488c8ff291fbf Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 19 Oct 2015 17:15:03 +0100 Subject: [PATCH 0991/1167] ASoC: arizona: Use fixed configurations for fllao fll_ao setting are loaded from precomputed tables rather than doing a hybrid system of partial computation and partial loading from tables. Change-Id: I7a75d44ffdac84706d076d773ffc45dc4c779027 Signed-off-by: Nikesh Oswal Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 174 +++++++++++++++---------------------- sound/soc/codecs/arizona.h | 2 +- 2 files changed, 69 insertions(+), 107 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 35c9cd4b3e6..e7fa794f57d 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -181,11 +181,53 @@ static const int arizona_aif4_inputs[8] = { static unsigned int arizona_aif_sources_cache[ARRAY_SIZE(arizona_aif1_inputs)]; -static const struct reg_sequence fll_ao_32K_patch[] = { - { MOON_FLLAO_CONTROL_11, 0x0085 }, - { MOON_FLLAO_CONTROL_10, 0x06DA }, +struct fllao_patch { + unsigned int fin; + unsigned int fout; + struct reg_sequence *patch; + unsigned int patch_size; +}; + +static struct reg_sequence fll_ao_32K_49M_patch[] = { + { MOON_FLLAO_CONTROL_2, 0x02EE }, + { MOON_FLLAO_CONTROL_3, 0x0000 }, + { MOON_FLLAO_CONTROL_4, 0x0001 }, + { MOON_FLLAO_CONTROL_5, 0x0002 }, + { MOON_FLLAO_CONTROL_6, 0x8001 }, + { MOON_FLLAO_CONTROL_7, 0x0004 }, { MOON_FLLAO_CONTROL_8, 0x0077 }, + { MOON_FLLAO_CONTROL_10, 0x06D8 }, + { MOON_FLLAO_CONTROL_11, 0x0085 }, + { MOON_FLLAO_CONTROL_2, 0x82EE }, +}; + +static struct reg_sequence fll_ao_32K_45M_patch[] = { + { MOON_FLLAO_CONTROL_2, 0x02B1 }, + { MOON_FLLAO_CONTROL_3, 0x0001 }, + { MOON_FLLAO_CONTROL_4, 0x0010 }, + { MOON_FLLAO_CONTROL_5, 0x0002 }, { MOON_FLLAO_CONTROL_6, 0x8001 }, + { MOON_FLLAO_CONTROL_7, 0x0004 }, + { MOON_FLLAO_CONTROL_8, 0x0077 }, + { MOON_FLLAO_CONTROL_10, 0x06D8 }, + { MOON_FLLAO_CONTROL_11, 0x0005 }, + { MOON_FLLAO_CONTROL_2, 0x82B1 }, +}; + +static struct fllao_patch fllao_settings [] = { + { + .fin = 32768, + .fout = 49152000, + .patch = fll_ao_32K_49M_patch, + .patch_size = ARRAY_SIZE(fll_ao_32K_49M_patch), + + }, + { + .fin = 32768, + .fout = 45158400, + .patch = fll_ao_32K_45M_patch, + .patch_size = ARRAY_SIZE(fll_ao_32K_45M_patch), + }, }; static int arizona_get_sources(struct arizona *arizona, @@ -4839,12 +4881,11 @@ int arizona_set_fll(struct arizona_fll *fll, int source, EXPORT_SYMBOL_GPL(arizona_set_fll); static int arizona_enable_fll_ao(struct arizona_fll *fll, - struct arizona_fll_cfg *cfg, const struct reg_sequence *patch, - unsigned int patch_size) + struct reg_sequence *patch, unsigned int patch_size) { struct arizona *arizona = fll->arizona; int already_enabled = arizona_is_enabled_fll(fll); - unsigned int phasedet_ena; + unsigned int i; if (already_enabled < 0) return already_enabled; @@ -4856,39 +4897,19 @@ static int arizona_enable_fll_ao(struct arizona_fll *fll, regmap_update_bits(fll->arizona->regmap, fll->base + 1, MOON_FLL_AO_HOLD, MOON_FLL_AO_HOLD); - if (patch) { - regmap_multi_reg_write(arizona->regmap, patch, - patch_size); + /* the default patch is for mclk2 as source, + modify the patch to apply fll->ref_src */ + for (i = 0; i < patch_size; i++) { + if (patch[i].reg == MOON_FLLAO_CONTROL_6) { + patch[i].def &= ~MOON_FLL_AO_REFCLK_SRC_MASK; + patch[i].def |= + (fll->ref_src << MOON_FLL_AO_REFCLK_SRC_SHIFT) + & MOON_FLL_AO_REFCLK_SRC_MASK; + } } - regmap_update_bits(arizona->regmap, fll->base + 3, - MOON_FLL_AO_THETA_MASK, cfg->theta); - regmap_update_bits(arizona->regmap, fll->base + 4, - MOON_FLL_AO_LAMBDA_MASK, cfg->lambda); - regmap_update_bits(arizona->regmap, fll->base + 5, - MOON_FLL_AO_FB_DIV_MASK, cfg->fratio); - regmap_update_bits(arizona->regmap, fll->base + 6, - MOON_FLL_AO_REFCLK_DIV_MASK | - MOON_FLL_AO_REFCLK_SRC_MASK, - cfg->refdiv << MOON_FLL_AO_REFCLK_DIV_SHIFT | - fll->ref_src << MOON_FLL_AO_REFCLK_SRC_SHIFT); - regmap_update_bits(arizona->regmap, fll->base + 0x8, - MOON_FLL_AO_GAIN_MASK, cfg->gain); - - phasedet_ena = cfg->theta ? 0 : MOON_FLL_AO_PHASEDET_ENA_MASK; - regmap_update_bits(arizona->regmap, fll->base + 12, - MOON_FLL_AO_PHASEDET_ENA_MASK, phasedet_ena); - - regmap_update_bits(arizona->regmap, fll->base + 2, - MOON_FLL_AO_CTRL_UPD_MASK | MOON_FLL_AO_N_MASK, - MOON_FLL_AO_CTRL_UPD_MASK | cfg->n); - - arizona_fll_dbg(fll, "fll_ao params: fin=%d, fout=%d," - "refsrc=%d, refdiv=%d, n=%d, theta=%d, lambda=%d," - "fbdiv=%d, gain=%d, phasedet=%d\n", fll->ref_src, - fll->fout, fll->ref_src, cfg->refdiv, cfg->n, cfg->theta, - cfg->lambda, cfg->fratio, cfg->gain, - phasedet_ena >> MOON_FLL_AO_PHASEDET_ENA_SHIFT); + regmap_multi_reg_write(arizona->regmap, patch, + patch_size); if (!already_enabled) pm_runtime_get(arizona->dev); @@ -4939,12 +4960,9 @@ static int arizona_disable_fll_ao(struct arizona_fll *fll) int arizona_set_fll_ao(struct arizona_fll *fll, int source, unsigned int fin, unsigned int fout) { - unsigned int floop = 0; - int div = 0; int ret = 0; struct arizona_fll_cfg *cfg = &(fll->ref_cfg); - unsigned int gcd_fll; - unsigned int fref = fin; + unsigned int i; if (fll->ref_src == source && fll->ref_freq == fin && fll->fout == fout) @@ -4952,76 +4970,20 @@ int arizona_set_fll_ao(struct arizona_fll *fll, int source, if ((fout) && (cfg->fin != fin || cfg->fvco != fout)) { - /* Restrict fin to 32KHz */ - switch (fin) { - case 32768: - cfg->patch = fll_ao_32K_patch; - cfg->patch_size = ARRAY_SIZE(fll_ao_32K_patch); - break; - default: - arizona_fll_err(fll, - "FLL_AO input needs to be 32768Hz\n"); - return -EINVAL; - } - - if (fll->fout && fout != fll->fout) { - arizona_fll_err(fll, - "Can't change output on active FLL\n"); - return -EINVAL; - } - if (fin / ARIZONA_FLL_MAX_REFDIV > - ARIZONA_FLLAO_MAX_FREF) { - arizona_fll_err(fll, - "Can't scale %dMHz in to <=12.288MHz\n", - fin); - return -EINVAL; - } - if ((fout / (fin / ARIZONA_FLL_MAX_REFDIV)) < - ARIZONA_FLLAO_MIN_N) { - arizona_fll_err(fll, - "Can't configure N < 4\n"); - return -EINVAL; - } - - /* Fref must be <=12.288MHz, find refdiv */ - div = 1; - cfg->refdiv = 0; - while ((fref > ARIZONA_FLLAO_MAX_FREF) || - (fout / fref < ARIZONA_FLLAO_MIN_N)) { - div *= 2; - fref /= 2; - cfg->refdiv++; - } - - /* currently we only support fin=32KHz - so fref will be <= 32KHz for which gain - is fixed to 4 */ - cfg->gain = 4; - - cfg->fratio = 1; /* start with fb_div as 1 */ - floop = fout; - cfg->n = floop / fref; - - /* N must be <= 1023, find fbdiv(fratio) */ - div = 2; - while (cfg->n > ARIZONA_FLLAO_MAX_N && - div <= ARIZONA_FLLAO_MAX_FBDIV) { - floop = fout / div; - cfg->fratio = div; - cfg->n = floop / fref; - div += 2; + for (i = 0; i < ARRAY_SIZE(fllao_settings); i++) { + if (fllao_settings[i].fin == fin && + fllao_settings[i].fout == fout) + break; } - if (cfg->n > ARIZONA_FLLAO_MAX_N) { + if (i == ARRAY_SIZE(fllao_settings)) { arizona_fll_err(fll, - "Can't configure N > 1023\n"); + "No matching configuration for FLL_AO\n"); return -EINVAL; } - gcd_fll = gcd(floop, fref); - arizona_fll_dbg(fll, "GCD=%u\n", gcd_fll); - cfg->theta = (floop - (cfg->n * fref)) / gcd_fll; - cfg->lambda = fref / gcd_fll; + cfg->patch = fllao_settings[i].patch; + cfg->patch_size = fllao_settings[i].patch_size; cfg->fin = fin; cfg->fvco = fout; } @@ -5031,7 +4993,7 @@ int arizona_set_fll_ao(struct arizona_fll *fll, int source, fll->fout = fout; if (fout) - ret = arizona_enable_fll_ao(fll, cfg, cfg->patch, cfg->patch_size); + ret = arizona_enable_fll_ao(fll, cfg->patch, cfg->patch_size); else arizona_disable_fll_ao(fll); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index d0446bccd3b..4ef3b0d0100 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -410,7 +410,7 @@ struct arizona_fll_cfg { int fratio; int gain; int intg_gain; - const struct reg_sequence *patch; + struct reg_sequence *patch; unsigned int patch_size; }; From ec64a102530878688ace0c6a88f0ffec508853fd Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 15 Oct 2015 12:40:09 +0100 Subject: [PATCH 0992/1167] mfd: arizona: Add register fields and pdata for lrclk_adv When lrclk_advance is set in DSP_A mode then fsync is shifted left by half bitclk this is needed for compatibility with Tbone amplifier in tdm mode. Change-Id: I7d41c7cbe89b7127c4bac502d3515b8c05fc9d4e Signed-off-by: Nikesh Oswal --- drivers/mfd/arizona-core.c | 24 ++++++++++++++++++++++++ include/linux/mfd/arizona/pdata.h | 4 ++++ include/linux/mfd/arizona/registers.h | 4 ++++ 3 files changed, 32 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 862f0c41d9c..6d5dfd5e8cd 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -939,6 +939,27 @@ static int arizona_of_get_inmode(struct arizona *arizona, return 0; } +static int arizona_of_get_lrclk_adv(struct arizona *arizona, + const char *prop) +{ + struct arizona_pdata *pdata = &arizona->pdata; + struct device_node *np = arizona->dev->of_node; + struct property *tempprop; + const __be32 *cur; + u32 val; + int i; + + i = 0; + of_property_for_each_u32(np, prop, tempprop, cur, val) { + if (i == ARRAY_SIZE(pdata->lrclk_adv)) + break; + + pdata->lrclk_adv[i++] = val; + } + + return 0; +} + static int arizona_of_get_dmicref(struct arizona *arizona, const char *prop) { @@ -1247,6 +1268,9 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) pdata->rev_specific_fw = of_property_read_bool(arizona->dev->of_node, "wlf,rev-specific-fw"); + + arizona_of_get_lrclk_adv(arizona, "wlf,aif-lrclk-advance"); + return 0; } diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 6f4bc56906f..ba9fb7708c1 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -299,6 +299,10 @@ struct arizona_pdata { * removal: 1 - IN1L, 2 - IN1R, ..., n - IN[n]R */ unsigned int hs_mic; + + /* If lrclk_adv is set then in dsp-a mode, + fsync is shifted left by half bclk */ + int lrclk_adv[ARIZONA_MAX_AIF]; }; #endif diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 5dc60454675..04e6cb48ba5 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -6132,6 +6132,10 @@ /* * R1282 (0x502) - AIF1 Rx Pin Ctrl */ +#define ARIZONA_AIF1RX_LRCLK_ADV 0x0008 /* AIF1RX_LRCLK_ADV */ +#define ARIZONA_AIF1RX_LRCLK_ADV_MASK 0x0008 /* AIF1RX_LRCLK_ADV */ +#define ARIZONA_AIF1RX_LRCLK_ADV_SHIFT 3 /* AIF1RX_LRCLK_ADV */ +#define ARIZONA_AIF1RX_LRCLK_ADV_WIDTH 1 /* AIF1RX_LRCLK_ADV */ #define ARIZONA_AIF1RX_LRCLK_INV 0x0004 /* AIF1RX_LRCLK_INV */ #define ARIZONA_AIF1RX_LRCLK_INV_MASK 0x0004 /* AIF1RX_LRCLK_INV */ #define ARIZONA_AIF1RX_LRCLK_INV_SHIFT 2 /* AIF1RX_LRCLK_INV */ From b6996b3f43f437c92927c8a7a8fbef0141a02167 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 15 Oct 2015 12:45:53 +0100 Subject: [PATCH 0993/1167] ASoC: arizona: Handle lrclk_adv in DSP-A mode When lrclk_advance is set in DSP_A mode then fsync is shifted left by half bitclk this was added in moon for compatibility with tbone amplifier in tdm mode. Change-Id: Ifb223d82eba43bf2e60d1ec7ab227112d8ff6c2a Signed-off-by: Nikesh Oswal Signed-off-by: V V N Praveen Kumar --- sound/soc/codecs/arizona.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index e7fa794f57d..c431e30b6b7 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -3443,7 +3443,10 @@ EXPORT_SYMBOL_GPL(arizona_set_sysclk); static int arizona_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) { struct snd_soc_codec *codec = dai->codec; + struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->arizona; int lrclk, bclk, mode, base; + unsigned int mask; base = dai->driver->base; @@ -3521,9 +3524,22 @@ static int arizona_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) snd_soc_update_bits(codec, base + ARIZONA_AIF_TX_PIN_CTRL, ARIZONA_AIF1TX_LRCLK_INV | ARIZONA_AIF1TX_LRCLK_MSTR, lrclk); + + mask = ARIZONA_AIF1RX_LRCLK_INV | ARIZONA_AIF1RX_LRCLK_MSTR; + switch (arizona->type) { + case CS47L90: + case CS47L91: + mask |= ARIZONA_AIF1RX_LRCLK_ADV; + if (arizona->pdata.lrclk_adv[dai->id - 1] && + mode == SND_SOC_DAIFMT_DSP_A) + lrclk |= ARIZONA_AIF1RX_LRCLK_ADV; + break; + default: + break; + } + snd_soc_update_bits(codec, base + ARIZONA_AIF_RX_PIN_CTRL, - ARIZONA_AIF1RX_LRCLK_INV | - ARIZONA_AIF1RX_LRCLK_MSTR, lrclk); + mask, lrclk); snd_soc_update_bits(codec, base + ARIZONA_AIF_FORMAT, ARIZONA_AIF1_FMT_MASK, mode); From b4c5b9906b4521fadf4399d3b44ada9ddfd66e18 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Fri, 9 Oct 2015 16:45:08 +0100 Subject: [PATCH 0994/1167] gpio: arizona: Activate arizona before handling gpios GPIO registers are volatile so we must activate arizona before attempting read/write on the register. Also when we are modifying the register value we need to store a copy of it in the cache so that the same can be restored when the chip is reset or powered up. Change-Id: Ie89de063d937684ff76053ad0b303f38ed134b7a Signed-off-by: Nikesh Oswal --- drivers/gpio/gpio-arizona.c | 51 +++++++++++++++++++++++++++++-------- 1 file changed, 41 insertions(+), 10 deletions(-) diff --git a/drivers/gpio/gpio-arizona.c b/drivers/gpio/gpio-arizona.c index 8de75a69129..d8d0289f0f6 100644 --- a/drivers/gpio/gpio-arizona.c +++ b/drivers/gpio/gpio-arizona.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -105,14 +106,17 @@ static int clearwater_gpio_get(struct gpio_chip *chip, unsigned offset) offset *= 2; + pm_runtime_get_sync(arizona->dev); + ret = regmap_read(arizona->regmap, CLEARWATER_GPIO1_CTRL_1 + offset, &val); if (ret < 0) - return ret; + goto err; - if (val & CLEARWATER_GPN_LVL) - return 1; - else - return 0; + ret = val & CLEARWATER_GPN_LVL ? 1 : 0; + +err: + pm_runtime_put_sync(arizona->dev); + return ret; } static int clearwater_gpio_direction_out(struct gpio_chip *chip, @@ -121,33 +125,60 @@ static int clearwater_gpio_direction_out(struct gpio_chip *chip, struct arizona_gpio *arizona_gpio = to_arizona_gpio(chip); struct arizona *arizona = arizona_gpio->arizona; int ret; + unsigned int old_val, new_val; offset *= 2; if (value) value = CLEARWATER_GPN_LVL; + pm_runtime_get_sync(arizona->dev); + ret = regmap_update_bits(arizona->regmap, CLEARWATER_GPIO1_CTRL_2 + offset, ARIZONA_GPN_DIR, 0); if (ret < 0) - return ret; + goto err; - return regmap_update_bits(arizona->regmap, CLEARWATER_GPIO1_CTRL_1 + offset, - CLEARWATER_GPN_LVL, value); + ret = regmap_read(arizona->regmap, CLEARWATER_GPIO1_CTRL_1 + offset, &old_val); + if (ret == 0) { + new_val = (old_val) & (~CLEARWATER_GPN_LVL); + new_val |= value; + if (new_val != old_val) { + regmap_write(arizona->regmap, CLEARWATER_GPIO1_CTRL_1 + offset, new_val); + arizona->pdata.gpio_defaults[offset] = new_val; + } + } + +err: + pm_runtime_put_sync(arizona->dev); + return ret; } static void clearwater_gpio_set(struct gpio_chip *chip, unsigned offset, int value) { struct arizona_gpio *arizona_gpio = to_arizona_gpio(chip); struct arizona *arizona = arizona_gpio->arizona; + unsigned int old_val, new_val; + int ret; offset *= 2; if (value) value = CLEARWATER_GPN_LVL; - regmap_update_bits(arizona->regmap, CLEARWATER_GPIO1_CTRL_1 + offset, - CLEARWATER_GPN_LVL, value); + pm_runtime_get_sync(arizona->dev); + + ret = regmap_read(arizona->regmap, CLEARWATER_GPIO1_CTRL_1 + offset, &old_val); + if (ret == 0) { + new_val = (old_val) & (~CLEARWATER_GPN_LVL); + new_val |= value; + if (new_val != old_val) { + regmap_write(arizona->regmap, CLEARWATER_GPIO1_CTRL_1 + offset, new_val); + arizona->pdata.gpio_defaults[offset] = new_val; + } + } + + pm_runtime_put_sync(arizona->dev); } static int clearwater_gpio_to_irq(struct gpio_chip *chip, unsigned offset) From d166cb2fb5a9a0ea6df0f4522b25ae530b648af9 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Thu, 15 Oct 2015 15:51:43 +0100 Subject: [PATCH 0995/1167] gpio: arizona: Add defines for num of gpios Change-Id: I59b9fb8922c7a0f10f63640f94fbc9171301af36 Signed-off-by: Nikesh Oswal --- drivers/gpio/gpio-arizona.c | 6 +++--- include/linux/mfd/arizona/pdata.h | 4 ++++ 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-arizona.c b/drivers/gpio/gpio-arizona.c index d8d0289f0f6..d3303522a1c 100644 --- a/drivers/gpio/gpio-arizona.c +++ b/drivers/gpio/gpio-arizona.c @@ -266,7 +266,7 @@ static int arizona_gpio_probe(struct platform_device *pdev) clearwater_gpio_direction_out; arizona_gpio->gpio_chip.set = clearwater_gpio_set; - arizona_gpio->gpio_chip.ngpio = 40; + arizona_gpio->gpio_chip.ngpio = CLEARWATER_NUM_GPIOS; break; case WM1831: case CS47L24: @@ -280,7 +280,7 @@ static int arizona_gpio_probe(struct platform_device *pdev) clearwater_gpio_direction_out; arizona_gpio->gpio_chip.set = clearwater_gpio_set; - arizona_gpio->gpio_chip.ngpio = 16; + arizona_gpio->gpio_chip.ngpio = MARLEY_NUM_GPIOS; break; case CS47L90: case CS47L91: @@ -292,7 +292,7 @@ static int arizona_gpio_probe(struct platform_device *pdev) arizona_gpio->gpio_chip.set = clearwater_gpio_set; arizona_gpio->gpio_chip.to_irq = clearwater_gpio_to_irq; - arizona_gpio->gpio_chip.ngpio = 38; + arizona_gpio->gpio_chip.ngpio = MOON_NUM_GPIOS; break; default: dev_err(&pdev->dev, "Unknown chip variant %d\n", diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index ba9fb7708c1..a29e9e416b9 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -48,6 +48,10 @@ #define ARIZONA_MAX_GPIO_REGS 5 #define CLEARWATER_MAX_GPIO_REGS 80 +#define CLEARWATER_NUM_GPIOS 40 +#define MARLEY_NUM_GPIOS 16 +#define MOON_NUM_GPIOS 38 + #define ARIZONA_MAX_INPUT 12 #define ARIZONA_MAX_MICBIAS 4 From 298af8283b3daca8c6a9da678a30d3b0045a3090 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Fri, 9 Oct 2015 10:06:34 +0100 Subject: [PATCH 0996/1167] mfd: arizona: Mark gpiox_ctrl1 register as volatile gpiox_ctrl1 register has the level field which must be read from the hardware register when gpio is configured as input so mark these registers as volatile. Similarly when gpio is used as output then we must sync the gpio registers from the cache everytime we powerup arizona. Change-Id: I1486ccb2f7ce782e8d7e38c3629e6455dd73a6e9 Signed-off-by: Nikesh Oswal --- drivers/mfd/arizona-core.c | 23 ++++++++++ drivers/mfd/clearwater-tables.c | 80 ++++++++++++++++----------------- drivers/mfd/marley-tables.c | 32 ++++++------- drivers/mfd/moon-tables.c | 76 +++++++++++++++---------------- 4 files changed, 117 insertions(+), 94 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 6d5dfd5e8cd..65f8728a9dc 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -518,6 +518,7 @@ static int arizona_runtime_resume(struct device *dev) { struct arizona *arizona = dev_get_drvdata(dev); int ret; + unsigned int offset, num_gpios = 0; dev_dbg(arizona->dev, "Leaving AoD mode\n"); @@ -668,6 +669,28 @@ static int arizona_runtime_resume(struct device *dev) break; } + switch (arizona->type) { + case WM8285: + case WM1840: + num_gpios = CLEARWATER_NUM_GPIOS; + break; + case CS47L35: + num_gpios = MARLEY_NUM_GPIOS; + break; + case CS47L90: + case CS47L91: + num_gpios = MOON_NUM_GPIOS; + break; + default: + break; + } + + /* sync the gpio registers */ + for (offset = 0; offset < num_gpios; offset++) + regmap_write(arizona->regmap, + CLEARWATER_GPIO1_CTRL_1 + (offset * 2), + arizona->pdata.gpio_defaults[offset * 2]); + ret = regcache_sync(arizona->regmap); if (ret != 0) { dev_err(arizona->dev, diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index c35465f1763..ddf57855bfa 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -1736,85 +1736,45 @@ static const struct reg_default clearwater_reg_default[] = { { 0x00001431, 0x0000 }, { 0x00001432, 0x0000 }, { 0x00001433, 0x0000 }, - { 0x00001700, 0x2001 }, /* R5888 - GPIO1 Control 1 */ { 0x00001701, 0xE000 }, /* R5889 - GPIO1 Control 2 */ - { 0x00001702, 0x2001 }, /* R5890 - GPIO2 Control 1 */ { 0x00001703, 0xE000 }, /* R5891 - GPIO2 Control 2 */ - { 0x00001704, 0x2001 }, /* R5892 - GPIO3 Control 1 */ { 0x00001705, 0xE000 }, /* R5893 - GPIO3 Control 2 */ - { 0x00001706, 0x2001 }, /* R5894 - GPIO4 Control 1 */ { 0x00001707, 0xE000 }, /* R5895 - GPIO4 Control 2 */ - { 0x00001708, 0x2001 }, /* R5896 - GPIO5 Control 1 */ { 0x00001709, 0xE000 }, /* R5897 - GPIO5 Control 2 */ - { 0x0000170A, 0x2001 }, /* R5898 - GPIO6 Control 1 */ { 0x0000170B, 0xE000 }, /* R5899 - GPIO6 Control 2 */ - { 0x0000170C, 0x2001 }, /* R5900 - GPIO7 Control 1 */ { 0x0000170D, 0xE000 }, /* R5901 - GPIO7 Control 2 */ - { 0x0000170E, 0x2001 }, /* R5902 - GPIO8 Control 1 */ { 0x0000170F, 0xE000 }, /* R5903 - GPIO8 Control 2 */ - { 0x00001710, 0x2001 }, /* R5904 - GPIO9 Control 1 */ { 0x00001711, 0xE000 }, /* R5905 - GPIO9 Control 2 */ - { 0x00001712, 0x2001 }, /* R5906 - GPIO10 Control 1 */ { 0x00001713, 0xE000 }, /* R5907 - GPIO10 Control 2 */ - { 0x00001714, 0x2001 }, /* R5908 - GPIO11 Control 1 */ { 0x00001715, 0xE000 }, /* R5909 - GPIO11 Control 2 */ - { 0x00001716, 0x2001 }, /* R5910 - GPIO12 Control 1 */ { 0x00001717, 0xE000 }, /* R5911 - GPIO12 Control 2 */ - { 0x00001718, 0x2001 }, /* R5912 - GPIO13 Control 1 */ { 0x00001719, 0xE000 }, /* R5913 - GPIO13 Control 2 */ - { 0x0000171A, 0x2001 }, /* R5914 - GPIO14 Control 1 */ { 0x0000171B, 0xE000 }, /* R5915 - GPIO14 Control 2 */ - { 0x0000171C, 0x2001 }, /* R5916 - GPIO15 Control 1 */ { 0x0000171D, 0xE000 }, /* R5917 - GPIO15 Control 2 */ - { 0x0000171E, 0x2001 }, /* R5918 - GPIO16 Control 1 */ { 0x0000171F, 0xE000 }, /* R5919 - GPIO16 Control 2 */ - { 0x00001720, 0x2001 }, /* R5920 - GPIO17 Control 1 */ { 0x00001721, 0xE000 }, /* R5921 - GPIO17 Control 2 */ - { 0x00001722, 0x2001 }, /* R5922 - GPIO18 Control 1 */ { 0x00001723, 0xE000 }, /* R5923 - GPIO18 Control 2 */ - { 0x00001724, 0x2001 }, /* R5924 - GPIO19 Control 1 */ { 0x00001725, 0xE000 }, /* R5925 - GPIO19 Control 2 */ - { 0x00001726, 0x2001 }, /* R5926 - GPIO20 Control 1 */ { 0x00001727, 0xE000 }, /* R5927 - GPIO20 Control 2 */ - { 0x00001728, 0x2001 }, /* R5928 - GPIO21 Control 1 */ { 0x00001729, 0xE000 }, /* R5929 - GPIO21 Control 2 */ - { 0x0000172A, 0x2001 }, /* R5930 - GPIO22 Control 1 */ { 0x0000172B, 0xE000 }, /* R5931 - GPIO22 Control 2 */ - { 0x0000172C, 0x2001 }, /* R5932 - GPIO23 Control 1 */ { 0x0000172D, 0xE000 }, /* R5933 - GPIO23 Control 2 */ - { 0x0000172E, 0x2001 }, /* R5934 - GPIO24 Control 1 */ { 0x0000172F, 0xE000 }, /* R5935 - GPIO24 Control 2 */ - { 0x00001730, 0x2001 }, /* R5936 - GPIO25 Control 1 */ { 0x00001731, 0xE000 }, /* R5937 - GPIO25 Control 2 */ - { 0x00001732, 0x2001 }, /* R5938 - GPIO26 Control 1 */ { 0x00001733, 0xE000 }, /* R5939 - GPIO26 Control 2 */ - { 0x00001734, 0x2001 }, /* R5940 - GPIO27 Control 1 */ { 0x00001735, 0xE000 }, /* R5941 - GPIO27 Control 2 */ - { 0x00001736, 0x2001 }, /* R5942 - GPIO28 Control 1 */ { 0x00001737, 0xE000 }, /* R5943 - GPIO28 Control 2 */ - { 0x00001738, 0x2001 }, /* R5944 - GPIO29 Control 1 */ { 0x00001739, 0xE000 }, /* R5945 - GPIO29 Control 2 */ - { 0x0000173A, 0x2001 }, /* R5946 - GPIO30 Control 1 */ { 0x0000173B, 0xE000 }, /* R5947 - GPIO30 Control 2 */ - { 0x0000173C, 0x2001 }, /* R5948 - GPIO31 Control 1 */ { 0x0000173D, 0xE000 }, /* R5949 - GPIO31 Control 2 */ - { 0x0000173E, 0x2001 }, /* R5950 - GPIO32 Control 1 */ { 0x0000173F, 0xE000 }, /* R5951 - GPIO32 Control 2 */ - { 0x00001740, 0x2001 }, /* R5952 - GPIO33 Control 1 */ { 0x00001741, 0xE000 }, /* R5953 - GPIO33 Control 2 */ - { 0x00001742, 0x2001 }, /* R5954 - GPIO34 Control 1 */ { 0x00001743, 0xE000 }, /* R5955 - GPIO34 Control 2 */ - { 0x00001744, 0x2001 }, /* R5956 - GPIO35 Control 1 */ { 0x00001745, 0xE000 }, /* R5957 - GPIO35 Control 2 */ - { 0x00001746, 0x2001 }, /* R5958 - GPIO36 Control 1 */ { 0x00001747, 0xE000 }, /* R5959 - GPIO36 Control 2 */ - { 0x00001748, 0x2001 }, /* R5960 - GPIO37 Control 1 */ { 0x00001749, 0xE000 }, /* R5961 - GPIO37 Control 2 */ - { 0x0000174A, 0x2001 }, /* R5962 - GPIO38 Control 1 */ { 0x0000174B, 0xE000 }, /* R5963 - GPIO38 Control 2 */ - { 0x0000174C, 0x2001 }, /* R5964 - GPIO39 Control 1 */ { 0x0000174D, 0xE000 }, /* R5965 - GPIO39 Control 2 */ - { 0x0000174E, 0x2001 }, /* R5966 - GPIO40 Control 1 */ { 0x0000174F, 0xE000 }, /* R5967 - GPIO40 Control 2 */ { 0x00001802, 0x0000 }, { 0x00001803, 0x0000 }, @@ -3230,6 +3190,46 @@ static bool clearwater_16bit_volatile_register(struct device *dev, unsigned int case ARIZONA_FX_CTRL2: case CLEARWATER_ASRC2_STATUS: case CLEARWATER_ASRC1_STATUS: + case CLEARWATER_GPIO1_CTRL_1: + case CLEARWATER_GPIO2_CTRL_1: + case CLEARWATER_GPIO3_CTRL_1: + case CLEARWATER_GPIO4_CTRL_1: + case CLEARWATER_GPIO5_CTRL_1: + case CLEARWATER_GPIO6_CTRL_1: + case CLEARWATER_GPIO7_CTRL_1: + case CLEARWATER_GPIO8_CTRL_1: + case CLEARWATER_GPIO9_CTRL_1: + case CLEARWATER_GPIO10_CTRL_1: + case CLEARWATER_GPIO11_CTRL_1: + case CLEARWATER_GPIO12_CTRL_1: + case CLEARWATER_GPIO13_CTRL_1: + case CLEARWATER_GPIO14_CTRL_1: + case CLEARWATER_GPIO15_CTRL_1: + case CLEARWATER_GPIO16_CTRL_1: + case CLEARWATER_GPIO17_CTRL_1: + case CLEARWATER_GPIO18_CTRL_1: + case CLEARWATER_GPIO19_CTRL_1: + case CLEARWATER_GPIO20_CTRL_1: + case CLEARWATER_GPIO21_CTRL_1: + case CLEARWATER_GPIO22_CTRL_1: + case CLEARWATER_GPIO23_CTRL_1: + case CLEARWATER_GPIO24_CTRL_1: + case CLEARWATER_GPIO25_CTRL_1: + case CLEARWATER_GPIO26_CTRL_1: + case CLEARWATER_GPIO27_CTRL_1: + case CLEARWATER_GPIO28_CTRL_1: + case CLEARWATER_GPIO29_CTRL_1: + case CLEARWATER_GPIO30_CTRL_1: + case CLEARWATER_GPIO31_CTRL_1: + case CLEARWATER_GPIO32_CTRL_1: + case CLEARWATER_GPIO33_CTRL_1: + case CLEARWATER_GPIO34_CTRL_1: + case CLEARWATER_GPIO35_CTRL_1: + case CLEARWATER_GPIO36_CTRL_1: + case CLEARWATER_GPIO37_CTRL_1: + case CLEARWATER_GPIO38_CTRL_1: + case CLEARWATER_GPIO39_CTRL_1: + case CLEARWATER_GPIO40_CTRL_1: case CLEARWATER_IRQ1_STATUS_1: case CLEARWATER_IRQ1_STATUS_2: case CLEARWATER_IRQ1_STATUS_6: diff --git a/drivers/mfd/marley-tables.c b/drivers/mfd/marley-tables.c index cd74086cceb..fe8ded7d4cb 100644 --- a/drivers/mfd/marley-tables.c +++ b/drivers/mfd/marley-tables.c @@ -781,37 +781,21 @@ static const struct reg_default marley_reg_default[] = { { 0x000013c1, 0x0000 }, /* R5041 (0x13c1) - FRF Coefficient 5R 2 */ { 0x000013c2, 0x0000 }, /* R5042 (0x13c2) - FRF Coefficient 5R 3 */ { 0x000013c3, 0x0000 }, /* R5043 (0x13c3) - FRF Coefficient 5R 4 */ - { 0x00001700, 0x2001 }, /* R5888 (0x1700) - GPIO1 Control 1 */ { 0x00001701, 0xf000 }, /* R5889 (0x1701) - GPIO1 Control 2 */ - { 0x00001702, 0x2001 }, /* R5890 (0x1702) - GPIO2 Control 1 */ { 0x00001703, 0xf000 }, /* R5891 (0x1703) - GPIO2 Control 2 */ - { 0x00001704, 0x2001 }, /* R5892 (0x1704) - GPIO3 Control 1 */ { 0x00001705, 0xf000 }, /* R5893 (0x1705) - GPIO3 Control 2 */ - { 0x00001706, 0x2001 }, /* R5894 (0x1706) - GPIO4 Control 1 */ { 0x00001707, 0xf000 }, /* R5895 (0x1707) - GPIO4 Control 2 */ - { 0x00001708, 0x2001 }, /* R5896 (0x1708) - GPIO5 Control 1 */ { 0x00001709, 0xf000 }, /* R5897 (0x1709) - GPIO5 Control 2 */ - { 0x0000170a, 0x2001 }, /* R5898 (0x170a) - GPIO6 Control 1 */ { 0x0000170b, 0xf000 }, /* R5899 (0x170b) - GPIO6 Control 2 */ - { 0x0000170c, 0x2001 }, /* R5900 (0x170c) - GPIO7 Control 1 */ { 0x0000170d, 0xf000 }, /* R5901 (0x170d) - GPIO7 Control 2 */ - { 0x0000170e, 0x2001 }, /* R5902 (0x170e) - GPIO8 Control 1 */ { 0x0000170f, 0xf000 }, /* R5903 (0x170f) - GPIO8 Control 2 */ - { 0x00001710, 0x2001 }, /* R5904 (0x1710) - GPIO9 Control 1 */ { 0x00001711, 0xf000 }, /* R5905 (0x1711) - GPIO9 Control 2 */ - { 0x00001712, 0x2001 }, /* R5906 (0x1712) - GPIO10 Control 1 */ { 0x00001713, 0xf000 }, /* R5907 (0x1713) - GPIO10 Control 2 */ - { 0x00001714, 0x2001 }, /* R5908 (0x1714) - GPIO11 Control 1 */ { 0x00001715, 0xf000 }, /* R5909 (0x1715) - GPIO11 Control 2 */ - { 0x00001716, 0x2001 }, /* R5910 (0x1716) - GPIO12 Control 1 */ { 0x00001717, 0xf000 }, /* R5911 (0x1717) - GPIO12 Control 2 */ - { 0x00001718, 0x2001 }, /* R5912 (0x1718) - GPIO13 Control 1 */ { 0x00001719, 0xf000 }, /* R5913 (0x1719) - GPIO13 Control 2 */ - { 0x0000171A, 0x2001 }, /* R5914 (0x171A) - GPIO14 Control 1 */ { 0x0000171B, 0xf000 }, /* R5915 (0x171B) - GPIO14 Control 2 */ - { 0x0000171C, 0x2001 }, /* R5916 (0x171C) - GPIO15 Control 1 */ { 0x0000171D, 0xf000 }, /* R5917 (0x171D) - GPIO15 Control 2 */ - { 0x0000171E, 0x2001 }, /* R5918 (0x171E) - GPIO16 Control 1 */ { 0x0000171F, 0xf000 }, /* R5919 (0x171F) - GPIO16 Control 2 */ { 0x00001802, 0x0000 }, { 0x00001803, 0x0000 }, @@ -1704,6 +1688,22 @@ static bool marley_16bit_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_SLIMBUS_RX_PORT_STATUS: case ARIZONA_SLIMBUS_TX_PORT_STATUS: case ARIZONA_FX_CTRL2: + case CLEARWATER_GPIO1_CTRL_1: + case CLEARWATER_GPIO2_CTRL_1: + case CLEARWATER_GPIO3_CTRL_1: + case CLEARWATER_GPIO4_CTRL_1: + case CLEARWATER_GPIO5_CTRL_1: + case CLEARWATER_GPIO6_CTRL_1: + case CLEARWATER_GPIO7_CTRL_1: + case CLEARWATER_GPIO8_CTRL_1: + case CLEARWATER_GPIO9_CTRL_1: + case CLEARWATER_GPIO10_CTRL_1: + case CLEARWATER_GPIO11_CTRL_1: + case CLEARWATER_GPIO12_CTRL_1: + case CLEARWATER_GPIO13_CTRL_1: + case CLEARWATER_GPIO14_CTRL_1: + case CLEARWATER_GPIO15_CTRL_1: + case CLEARWATER_GPIO16_CTRL_1: case CLEARWATER_IRQ1_STATUS_1: case CLEARWATER_IRQ1_STATUS_2: case CLEARWATER_IRQ1_STATUS_6: diff --git a/drivers/mfd/moon-tables.c b/drivers/mfd/moon-tables.c index abc307d72aa..fc1c8294034 100644 --- a/drivers/mfd/moon-tables.c +++ b/drivers/mfd/moon-tables.c @@ -1434,81 +1434,43 @@ static const struct reg_default moon_reg_default[] = { { 0x000014AA, 0x0000 }, { 0x000014AC, 0x1F00 }, { 0x000014AE, 0x1F00 }, /*R5294 - DFC8_TX */ - { 0x00001700, 0x2001 }, /* R5888 - GPIO1 Control 1 */ { 0x00001701, 0xF000 }, /* R5889 - GPIO1 Control 2 */ - { 0x00001702, 0x2001 }, /* R5890 - GPIO2 Control 1 */ { 0x00001703, 0xF000 }, /* R5891 - GPIO2 Control 2 */ - { 0x00001704, 0x2001 }, /* R5892 - GPIO3 Control 1 */ { 0x00001705, 0xF000 }, /* R5893 - GPIO3 Control 2 */ - { 0x00001706, 0x2001 }, /* R5894 - GPIO4 Control 1 */ { 0x00001707, 0xF000 }, /* R5895 - GPIO4 Control 2 */ - { 0x00001708, 0x2001 }, /* R5896 - GPIO5 Control 1 */ { 0x00001709, 0xF000 }, /* R5897 - GPIO5 Control 2 */ - { 0x0000170A, 0x2001 }, /* R5898 - GPIO6 Control 1 */ { 0x0000170B, 0xF000 }, /* R5899 - GPIO6 Control 2 */ - { 0x0000170C, 0x2001 }, /* R5900 - GPIO7 Control 1 */ { 0x0000170D, 0xF000 }, /* R5901 - GPIO7 Control 2 */ - { 0x0000170E, 0x2001 }, /* R5902 - GPIO8 Control 1 */ { 0x0000170F, 0xF000 }, /* R5903 - GPIO8 Control 2 */ - { 0x00001710, 0x2001 }, /* R5904 - GPIO9 Control 1 */ { 0x00001711, 0xF000 }, /* R5905 - GPIO9 Control 2 */ - { 0x00001712, 0x2001 }, /* R5906 - GPIO10 Control 1 */ { 0x00001713, 0xF000 }, /* R5907 - GPIO10 Control 2 */ - { 0x00001714, 0x2001 }, /* R5908 - GPIO11 Control 1 */ { 0x00001715, 0xF000 }, /* R5909 - GPIO11 Control 2 */ - { 0x00001716, 0x2001 }, /* R5910 - GPIO12 Control 1 */ { 0x00001717, 0xF000 }, /* R5911 - GPIO12 Control 2 */ - { 0x00001718, 0x2001 }, /* R5912 - GPIO13 Control 1 */ { 0x00001719, 0xF000 }, /* R5913 - GPIO13 Control 2 */ - { 0x0000171A, 0x2001 }, /* R5914 - GPIO14 Control 1 */ { 0x0000171B, 0xF000 }, /* R5915 - GPIO14 Control 2 */ - { 0x0000171C, 0x2001 }, /* R5916 - GPIO15 Control 1 */ { 0x0000171D, 0xF000 }, /* R5917 - GPIO15 Control 2 */ - { 0x0000171E, 0x2001 }, /* R5918 - GPIO16 Control 1 */ { 0x0000171F, 0xF000 }, /* R5919 - GPIO16 Control 2 */ - { 0x00001720, 0x2001 }, /* R5920 - GPIO17 Control 1 */ { 0x00001721, 0xF000 }, /* R5921 - GPIO17 Control 2 */ - { 0x00001722, 0x2001 }, /* R5922 - GPIO18 Control 1 */ { 0x00001723, 0xF000 }, /* R5923 - GPIO18 Control 2 */ - { 0x00001724, 0x2001 }, /* R5924 - GPIO19 Control 1 */ { 0x00001725, 0xF000 }, /* R5925 - GPIO19 Control 2 */ - { 0x00001726, 0x2001 }, /* R5926 - GPIO20 Control 1 */ { 0x00001727, 0xF000 }, /* R5927 - GPIO20 Control 2 */ - { 0x00001728, 0x2001 }, /* R5928 - GPIO21 Control 1 */ { 0x00001729, 0xF000 }, /* R5929 - GPIO21 Control 2 */ - { 0x0000172A, 0x2001 }, /* R5930 - GPIO22 Control 1 */ { 0x0000172B, 0xF000 }, /* R5931 - GPIO22 Control 2 */ - { 0x0000172C, 0x2001 }, /* R5932 - GPIO23 Control 1 */ { 0x0000172D, 0xF000 }, /* R5933 - GPIO23 Control 2 */ - { 0x0000172E, 0x2001 }, /* R5934 - GPIO24 Control 1 */ { 0x0000172F, 0xF000 }, /* R5935 - GPIO24 Control 2 */ - { 0x00001730, 0x2001 }, /* R5936 - GPIO25 Control 1 */ { 0x00001731, 0xF000 }, /* R5937 - GPIO25 Control 2 */ - { 0x00001732, 0x2001 }, /* R5938 - GPIO26 Control 1 */ { 0x00001733, 0xF000 }, /* R5939 - GPIO26 Control 2 */ - { 0x00001734, 0x2001 }, /* R5940 - GPIO27 Control 1 */ { 0x00001735, 0xF000 }, /* R5941 - GPIO27 Control 2 */ - { 0x00001736, 0x2001 }, /* R5942 - GPIO28 Control 1 */ { 0x00001737, 0xF000 }, /* R5943 - GPIO28 Control 2 */ - { 0x00001738, 0x2001 }, /* R5944 - GPIO29 Control 1 */ { 0x00001739, 0xF000 }, /* R5945 - GPIO29 Control 2 */ - { 0x0000173A, 0x2001 }, /* R5946 - GPIO30 Control 1 */ { 0x0000173B, 0xF000 }, /* R5947 - GPIO30 Control 2 */ - { 0x0000173C, 0x2001 }, /* R5948 - GPIO31 Control 1 */ { 0x0000173D, 0xF000 }, /* R5949 - GPIO31 Control 2 */ - { 0x0000173E, 0x2001 }, /* R5950 - GPIO32 Control 1 */ { 0x0000173F, 0xF000 }, /* R5951 - GPIO32 Control 2 */ - { 0x00001740, 0x2001 }, /* R5952 - GPIO33 Control 1 */ { 0x00001741, 0xF000 }, /* R5953 - GPIO33 Control 2 */ - { 0x00001742, 0x2001 }, /* R5954 - GPIO34 Control 1 */ { 0x00001743, 0xF000 }, /* R5955 - GPIO34 Control 2 */ - { 0x00001744, 0x2001 }, /* R5956 - GPIO35 Control 1 */ { 0x00001745, 0xF000 }, /* R5957 - GPIO35 Control 2 */ - { 0x00001746, 0x2001 }, /* R5958 - GPIO36 Control 1 */ { 0x00001747, 0xF000 }, /* R5959 - GPIO36 Control 2 */ - { 0x00001748, 0x2001 }, /* R5960 - GPIO37 Control 1 */ { 0x00001749, 0xF000 }, /* R5961 - GPIO37 Control 2 */ - { 0x0000174A, 0x2001 }, /* R5962 - GPIO38 Control 1 */ { 0x0000174B, 0xF000 }, /* R5963 - GPIO38 Control 2 */ { 0x00001840, 0x9200 }, /* R6208 - IRQ1 Mask 1 */ { 0x00001841, 0xFB00 }, /* R6209 - IRQ1 Mask 2 */ @@ -2912,6 +2874,44 @@ static bool moon_16bit_volatile_register(struct device *dev, unsigned int reg) case CLEARWATER_ASRC1_STATUS: case ARIZONA_CLOCK_CONTROL: case MOON_DFC_STATUS: + case CLEARWATER_GPIO1_CTRL_1: + case CLEARWATER_GPIO2_CTRL_1: + case CLEARWATER_GPIO3_CTRL_1: + case CLEARWATER_GPIO4_CTRL_1: + case CLEARWATER_GPIO5_CTRL_1: + case CLEARWATER_GPIO6_CTRL_1: + case CLEARWATER_GPIO7_CTRL_1: + case CLEARWATER_GPIO8_CTRL_1: + case CLEARWATER_GPIO9_CTRL_1: + case CLEARWATER_GPIO10_CTRL_1: + case CLEARWATER_GPIO11_CTRL_1: + case CLEARWATER_GPIO12_CTRL_1: + case CLEARWATER_GPIO13_CTRL_1: + case CLEARWATER_GPIO14_CTRL_1: + case CLEARWATER_GPIO15_CTRL_1: + case CLEARWATER_GPIO16_CTRL_1: + case CLEARWATER_GPIO17_CTRL_1: + case CLEARWATER_GPIO18_CTRL_1: + case CLEARWATER_GPIO19_CTRL_1: + case CLEARWATER_GPIO20_CTRL_1: + case CLEARWATER_GPIO21_CTRL_1: + case CLEARWATER_GPIO22_CTRL_1: + case CLEARWATER_GPIO23_CTRL_1: + case CLEARWATER_GPIO24_CTRL_1: + case CLEARWATER_GPIO25_CTRL_1: + case CLEARWATER_GPIO26_CTRL_1: + case CLEARWATER_GPIO27_CTRL_1: + case CLEARWATER_GPIO28_CTRL_1: + case CLEARWATER_GPIO29_CTRL_1: + case CLEARWATER_GPIO30_CTRL_1: + case CLEARWATER_GPIO31_CTRL_1: + case CLEARWATER_GPIO32_CTRL_1: + case CLEARWATER_GPIO33_CTRL_1: + case CLEARWATER_GPIO34_CTRL_1: + case CLEARWATER_GPIO35_CTRL_1: + case CLEARWATER_GPIO36_CTRL_1: + case CLEARWATER_GPIO37_CTRL_1: + case CLEARWATER_GPIO38_CTRL_1: case CLEARWATER_IRQ1_STATUS_1: case CLEARWATER_IRQ1_STATUS_2: case CLEARWATER_IRQ1_STATUS_6: From 2b12e0d9808b6d8f49f55848f1ac7e5ba0dd060c Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Fri, 23 Oct 2015 10:13:42 +0100 Subject: [PATCH 0997/1167] mfd: moon: Mark spdif registers as readable Mark spdif registers as readable and assign default vlaues to them. Change-Id: I52454e0b6f5232121c75b74f908796ebec1d5c14 Signed-off-by: Nikesh Oswal --- drivers/mfd/moon-tables.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/mfd/moon-tables.c b/drivers/mfd/moon-tables.c index fc1c8294034..b6a180069c4 100644 --- a/drivers/mfd/moon-tables.c +++ b/drivers/mfd/moon-tables.c @@ -784,6 +784,10 @@ static const struct reg_default moon_reg_default[] = { { 0x000007fd, 0x0080 }, { 0x000007fe, 0x0000 }, { 0x000007ff, 0x0080 }, + { 0x00000800, 0x0000 }, + { 0x00000801, 0x0080 }, + { 0x00000808, 0x0000 }, + { 0x00000809, 0x0080 }, { 0x00000880, 0x0000 }, { 0x00000881, 0x0080 }, { 0x00000882, 0x0000 }, @@ -2190,6 +2194,10 @@ static bool moon_16bit_readable_register(struct device *dev, unsigned int reg) case ARIZONA_SLIMTX8MIX_INPUT_3_VOLUME: case ARIZONA_SLIMTX8MIX_INPUT_4_SOURCE: case ARIZONA_SLIMTX8MIX_INPUT_4_VOLUME: + case ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE: + case ARIZONA_SPDIFTX1MIX_INPUT_1_VOLUME: + case ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE: + case ARIZONA_SPDIFTX2MIX_INPUT_1_VOLUME: case ARIZONA_EQ1MIX_INPUT_1_SOURCE: case ARIZONA_EQ1MIX_INPUT_1_VOLUME: case ARIZONA_EQ1MIX_INPUT_2_SOURCE: From 9c628159f4dfcce1a6e7d1961578bd154c41e64e Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 18 Nov 2015 14:19:40 +0000 Subject: [PATCH 0998/1167] ASoC: moon: Remove IN6 from RXANC hookup as Moon doesn't have one Change-Id: I52ad61979a8441e40114f7b86d3d9dd71ff88e80 Signed-off-by: Charles Keepax --- sound/soc/codecs/moon.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 83c1632846e..a82fad1c6f1 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -665,9 +665,7 @@ static DECLARE_TLV_DB_SCALE(ng_tlv, -12000, 600, 0); { name " Left Input", "IN4", "IN4L PGA" }, \ { name " Right Input", "IN4", "IN4R PGA" }, \ { name " Left Input", "IN5", "IN5L PGA" }, \ - { name " Right Input", "IN5", "IN5R PGA" }, \ - { name " Left Input", "IN6", "IN6L PGA" }, \ - { name " Right Input", "IN6", "IN6R PGA" } + { name " Right Input", "IN5", "IN5R PGA" } #define MOON_RXANC_OUTPUT_ROUTES(widget, name) \ { widget, NULL, name " ANC Source" }, \ From 75eb7e54ed4324e6b615ac3d82d360932f471659 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Wed, 21 Oct 2015 11:03:00 +0100 Subject: [PATCH 0999/1167] switch: arizona: Modify the charge pump patches As per the latest tuning by hardware team modify the charge pump patches and headphone impedance thresholds at which different charge pump patches are applied. Change-Id: Ibf8131c90acdeb46a40f2471cc80ae234339c6b7 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 106 ++++++++++++++++++++++++++++---- 1 file changed, 95 insertions(+), 11 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 0e87fa96636..f1e1fffe83c 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -75,8 +75,8 @@ #define ARIZONA_HP_TUNING_INVALID -1 -#define MOON_HP_LOW_IMPEDANCE_LIMIT 11 -#define MOON_HP_MEDIUM_IMPEDANCE_LIMIT 23 +#define MOON_HP_LOW_IMPEDANCE_LIMIT 14 +#define MOON_HP_MEDIUM_IMPEDANCE_LIMIT 24 #define MOON_HPD_SENSE_MICDET1 0 #define MOON_HPD_SENSE_MICDET2 1 @@ -1257,21 +1257,105 @@ static const struct reg_default clearwater_normal_impedance_patch[] = { }; static const struct reg_default moon_low_impedance_patch[] = { - { 0x465, 0x5AD5 }, - { 0x469, 0x3950 }, - { 0x46D, 0x203A }, + { 0x460, 0x0C21 }, + { 0x461, 0xB53C }, + { 0x462, 0x0C21 }, + { 0x463, 0xA186 }, + { 0x464, 0x0C21 }, + { 0x465, 0x8FF6 }, + { 0x466, 0x0C24 }, + { 0x467, 0x804E }, + { 0x468, 0x0C24 }, + { 0x469, 0x725A }, + { 0x46A, 0x0C24 }, + { 0x46B, 0x5AD5 }, + { 0x46C, 0x0C28 }, + { 0x46D, 0x50F4 }, + { 0x46E, 0x0C2C }, + { 0x46F, 0x4827 }, + { 0x470, 0x0C31 }, + { 0x471, 0x404E }, + { 0x472, 0x0020 }, + { 0x473, 0x3950 }, + { 0x474, 0x0028 }, + { 0x475, 0x3314 }, + { 0x476, 0x0030 }, + { 0x477, 0x2893 }, + { 0x478, 0x003F }, + { 0x479, 0x2429 }, + { 0x47A, 0x0830 }, + { 0x47B, 0x203A }, + { 0x47C, 0x0420 }, + { 0x47D, 0x1027 }, + { 0x47E, 0x0430 }, }; static const struct reg_default moon_normal_impedance_patch[] = { - { 0x465, 0x804E }, - { 0x469, 0x50F4 }, - { 0x46D, 0x2D86 }, + { 0x460, 0x0C21 }, + { 0x461, 0xB53C }, + { 0x462, 0x0C25 }, + { 0x463, 0xA186 }, + { 0x464, 0x0C26 }, + { 0x465, 0x8FF6 }, + { 0x466, 0x0C28 }, + { 0x467, 0x804E }, + { 0x468, 0x0C30 }, + { 0x469, 0x725A }, + { 0x46A, 0x0C30 }, + { 0x46B, 0x65EA }, + { 0x46C, 0x0028 }, + { 0x46D, 0x5AD5 }, + { 0x46E, 0x0028 }, + { 0x46F, 0x50F4 }, + { 0x470, 0x0030 }, + { 0x471, 0x4827 }, + { 0x472, 0x0030 }, + { 0x473, 0x404E }, + { 0x474, 0x003F }, + { 0x475, 0x3950 }, + { 0x476, 0x0830 }, + { 0x477, 0x3314 }, + { 0x478, 0x0420 }, + { 0x479, 0x2D86 }, + { 0x47A, 0x0428 }, + { 0x47B, 0x2893 }, + { 0x47C, 0x0428 }, + { 0x47D, 0x203A }, + { 0x47E, 0x0428 }, }; static const struct reg_default moon_high_impedance_patch[] = { - { 0x465, 0x987D }, - { 0x469, 0x65EA }, - { 0x46D, 0x404E }, + { 0x460, 0x0C21 }, + { 0x461, 0xB53C }, + { 0x462, 0x0C26 }, + { 0x463, 0xA186 }, + { 0x464, 0x0C28 }, + { 0x465, 0x8FF6 }, + { 0x466, 0x0C2A }, + { 0x467, 0x804E }, + { 0x468, 0x0025 }, + { 0x469, 0x725A }, + { 0x46A, 0x0030 }, + { 0x46B, 0x65EA }, + { 0x46C, 0x0030 }, + { 0x46D, 0x5AD5 }, + { 0x46E, 0x003F }, + { 0x46F, 0x50F4 }, + { 0x470, 0x003F }, + { 0x471, 0x4827 }, + { 0x472, 0x0830 }, + { 0x473, 0x404E }, + { 0x474, 0x083F }, + { 0x475, 0x3950 }, + { 0x476, 0x0420 }, + { 0x477, 0x3314 }, + { 0x478, 0x0430 }, + { 0x479, 0x2D86 }, + { 0x47A, 0x0430 }, + { 0x47B, 0x2893 }, + { 0x47C, 0x0430 }, + { 0x47D, 0x203A }, + { 0x47E, 0x0430 }, }; static void arizona_hs_mic_control(struct arizona *arizona, int state) From 3737409ae9b366d04b7cd4a9b1ddd48fca341702 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Fri, 4 Sep 2015 14:52:58 +0100 Subject: [PATCH 1000/1167] ASoC: moon: Re-arrange the DAPM widgets to maximise cache hits DAPM maintains a cache when searching for end points of a path, Arizona has many muxes. This patch registers the source widgets for these muxes in the same order as they are mentioned in the DAPM paths, this increases the cache hits by 25%. Change-Id: I989fb6118e4e00493c71c71886708e3a43ac2276 Signed-off-by: Nikesh Oswal --- sound/soc/codecs/moon.c | 460 ++++++++++++++++++++-------------------- 1 file changed, 232 insertions(+), 228 deletions(-) diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index a82fad1c6f1..d94ddf4e2f7 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -1333,7 +1333,6 @@ SND_SOC_DAPM_REGULATOR_SUPPLY("MICVDD", 0, SND_SOC_DAPM_REGULATOR_BYPASS), SND_SOC_DAPM_SIGGEN("TONE"), SND_SOC_DAPM_SIGGEN("NOISE"), -SND_SOC_DAPM_SIGGEN("HAPTICS"), SND_SOC_DAPM_INPUT("IN1AL"), SND_SOC_DAPM_INPUT("IN1BL"), @@ -1358,47 +1357,6 @@ SND_SOC_DAPM_OUTPUT("DRC2 Signal Activity"), SND_SOC_DAPM_OUTPUT("DSP Virtual Output"), -SND_SOC_DAPM_PGA_E("IN1L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN1L_ENA_SHIFT, - 0, NULL, 0, arizona_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("IN1R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN1R_ENA_SHIFT, - 0, NULL, 0, arizona_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("IN2L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN2L_ENA_SHIFT, - 0, NULL, 0, arizona_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("IN2R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN2R_ENA_SHIFT, - 0, NULL, 0, arizona_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("IN3L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN3L_ENA_SHIFT, - 0, NULL, 0, arizona_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("IN3R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN3R_ENA_SHIFT, - 0, NULL, 0, arizona_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("IN4L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN4L_ENA_SHIFT, - 0, NULL, 0, arizona_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("IN4R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN4R_ENA_SHIFT, - 0, NULL, 0, arizona_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("IN5L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN5L_ENA_SHIFT, - 0, NULL, 0, arizona_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("IN5R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN5R_ENA_SHIFT, - 0, NULL, 0, arizona_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), - SND_SOC_DAPM_SUPPLY("MICBIAS1", ARIZONA_MIC_BIAS_CTRL_1, ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("MICBIAS2", ARIZONA_MIC_BIAS_CTRL_2, @@ -1422,128 +1380,11 @@ SND_SOC_DAPM_SUPPLY("MICBIAS2C", ARIZONA_MIC_BIAS_CTRL_6, SND_SOC_DAPM_SUPPLY("MICBIAS2D", ARIZONA_MIC_BIAS_CTRL_6, ARIZONA_MICB2D_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("Noise Generator", CLEARWATER_COMFORT_NOISE_GENERATOR, - CLEARWATER_NOISE_GEN_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("Tone Generator 1", ARIZONA_TONE_GENERATOR_1, - ARIZONA_TONE1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("Tone Generator 2", ARIZONA_TONE_GENERATOR_1, - ARIZONA_TONE2_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("EQ1", ARIZONA_EQ1_1, ARIZONA_EQ1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("EQ2", ARIZONA_EQ2_1, ARIZONA_EQ2_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("EQ3", ARIZONA_EQ3_1, ARIZONA_EQ3_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("EQ4", ARIZONA_EQ4_1, ARIZONA_EQ4_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("DRC1L", ARIZONA_DRC1_CTRL1, ARIZONA_DRC1L_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("DRC1R", ARIZONA_DRC1_CTRL1, ARIZONA_DRC1R_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("DRC2L", CLEARWATER_DRC2_CTRL1, ARIZONA_DRC2L_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("DRC2R", CLEARWATER_DRC2_CTRL1, ARIZONA_DRC2R_ENA_SHIFT, 0, - NULL, 0), - -SND_SOC_DAPM_PGA("LHPF1", ARIZONA_HPLPF1_1, ARIZONA_LHPF1_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("LHPF2", ARIZONA_HPLPF2_1, ARIZONA_LHPF2_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("LHPF3", ARIZONA_HPLPF3_1, ARIZONA_LHPF3_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("LHPF4", ARIZONA_HPLPF4_1, ARIZONA_LHPF4_ENA_SHIFT, 0, - NULL, 0), - SND_SOC_DAPM_PGA("PWM1 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM1_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_PGA("PWM2 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM2_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC1IN1L", CLEARWATER_ASRC1_ENABLE, - CLEARWATER_ASRC1_IN1L_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC1IN1R", CLEARWATER_ASRC1_ENABLE, - CLEARWATER_ASRC1_IN1R_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC1IN2L", CLEARWATER_ASRC1_ENABLE, - CLEARWATER_ASRC1_IN2L_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC1IN2R", CLEARWATER_ASRC1_ENABLE, - CLEARWATER_ASRC1_IN2R_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("ASRC2IN1L", CLEARWATER_ASRC2_ENABLE, - CLEARWATER_ASRC2_IN1L_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC2IN1R", CLEARWATER_ASRC2_ENABLE, - CLEARWATER_ASRC2_IN1R_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC2IN2L", CLEARWATER_ASRC2_ENABLE, - CLEARWATER_ASRC2_IN2L_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC2IN2R", CLEARWATER_ASRC2_ENABLE, - CLEARWATER_ASRC2_IN2R_ENA_SHIFT, 0, NULL, 0), - -WM_ADSP2("DSP1", 0, moon_adsp_power_ev), -WM_ADSP2("DSP2", 1, moon_adsp_power_ev), -WM_ADSP2("DSP3", 2, moon_adsp_power_ev), -WM_ADSP2("DSP4", 3, moon_adsp_power_ev), -WM_ADSP2("DSP5", 4, moon_adsp_power_ev), -WM_ADSP2("DSP6", 5, moon_adsp_power_ev), -WM_ADSP2("DSP7", 6, moon_adsp_power_ev), - -SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, - ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC1INT2", ARIZONA_ISRC_1_CTRL_3, - ARIZONA_ISRC1_INT1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC1INT3", ARIZONA_ISRC_1_CTRL_3, - ARIZONA_ISRC1_INT2_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC1INT4", ARIZONA_ISRC_1_CTRL_3, - ARIZONA_ISRC1_INT3_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("ISRC1DEC1", ARIZONA_ISRC_1_CTRL_3, - ARIZONA_ISRC1_DEC0_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC1DEC2", ARIZONA_ISRC_1_CTRL_3, - ARIZONA_ISRC1_DEC1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC1DEC3", ARIZONA_ISRC_1_CTRL_3, - ARIZONA_ISRC1_DEC2_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC1DEC4", ARIZONA_ISRC_1_CTRL_3, - ARIZONA_ISRC1_DEC3_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("ISRC2INT1", ARIZONA_ISRC_2_CTRL_3, - ARIZONA_ISRC2_INT0_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC2INT2", ARIZONA_ISRC_2_CTRL_3, - ARIZONA_ISRC2_INT1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC2INT3", ARIZONA_ISRC_2_CTRL_3, - ARIZONA_ISRC2_INT2_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC2INT4", ARIZONA_ISRC_2_CTRL_3, - ARIZONA_ISRC2_INT3_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("ISRC2DEC1", ARIZONA_ISRC_2_CTRL_3, - ARIZONA_ISRC2_DEC0_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC2DEC2", ARIZONA_ISRC_2_CTRL_3, - ARIZONA_ISRC2_DEC1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC2DEC3", ARIZONA_ISRC_2_CTRL_3, - ARIZONA_ISRC2_DEC2_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC2DEC4", ARIZONA_ISRC_2_CTRL_3, - ARIZONA_ISRC2_DEC3_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("ISRC3INT1", ARIZONA_ISRC_3_CTRL_3, - ARIZONA_ISRC3_INT0_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC3INT2", ARIZONA_ISRC_3_CTRL_3, - ARIZONA_ISRC3_INT1_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("ISRC3DEC1", ARIZONA_ISRC_3_CTRL_3, - ARIZONA_ISRC3_DEC0_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC3DEC2", ARIZONA_ISRC_3_CTRL_3, - ARIZONA_ISRC3_DEC1_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("ISRC4INT1", ARIZONA_ISRC_4_CTRL_3, - ARIZONA_ISRC4_INT0_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC4INT2", ARIZONA_ISRC_4_CTRL_3, - ARIZONA_ISRC4_INT1_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("ISRC4DEC1", ARIZONA_ISRC_4_CTRL_3, - ARIZONA_ISRC4_DEC0_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC4DEC2", ARIZONA_ISRC_4_CTRL_3, - ARIZONA_ISRC4_DEC1_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, - ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, - &moon_aec_loopback_mux), - SND_SOC_DAPM_SUPPLY("RXANC NG External Clock", SND_SOC_NOPM, ARIZONA_EXT_NG_SEL_SET_SHIFT, 0, arizona_anc_ev, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), @@ -1610,23 +1451,6 @@ SND_SOC_DAPM_AIF_OUT("AIF1TX7", NULL, 0, SND_SOC_DAPM_AIF_OUT("AIF1TX8", NULL, 0, ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX8_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX1", NULL, 0, - ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX1_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX2", NULL, 0, - ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX2_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX3", NULL, 0, - ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX3_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX4", NULL, 0, - ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX4_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX5", NULL, 0, - ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX5_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX6", NULL, 0, - ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX6_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX7", NULL, 0, - ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX7_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX8", NULL, 0, - ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX8_ENA_SHIFT, 0), - SND_SOC_DAPM_AIF_OUT("AIF2TX1", NULL, 0, ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX1_ENA_SHIFT, 0), SND_SOC_DAPM_AIF_OUT("AIF2TX2", NULL, 0, @@ -1644,48 +1468,6 @@ SND_SOC_DAPM_AIF_OUT("AIF2TX7", NULL, 0, SND_SOC_DAPM_AIF_OUT("AIF2TX8", NULL, 0, ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX8_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0, - ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX1_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF2RX2", NULL, 0, - ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX2_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF2RX3", NULL, 0, - ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX3_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF2RX4", NULL, 0, - ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX4_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF2RX5", NULL, 0, - ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX5_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF2RX6", NULL, 0, - ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX6_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF2RX7", NULL, 0, - ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX7_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF2RX8", NULL, 0, - ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX8_ENA_SHIFT, 0), - -SND_SOC_DAPM_AIF_IN("SLIMRX1", NULL, 0, - ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, - ARIZONA_SLIMRX1_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("SLIMRX2", NULL, 0, - ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, - ARIZONA_SLIMRX2_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("SLIMRX3", NULL, 0, - ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, - ARIZONA_SLIMRX3_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("SLIMRX4", NULL, 0, - ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, - ARIZONA_SLIMRX4_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("SLIMRX5", NULL, 0, - ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, - ARIZONA_SLIMRX5_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("SLIMRX6", NULL, 0, - ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, - ARIZONA_SLIMRX6_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("SLIMRX7", NULL, 0, - ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, - ARIZONA_SLIMRX7_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("SLIMRX8", NULL, 0, - ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, - ARIZONA_SLIMRX8_ENA_SHIFT, 0), - SND_SOC_DAPM_AIF_OUT("SLIMTX1", NULL, 0, ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE, ARIZONA_SLIMTX1_ENA_SHIFT, 0), @@ -1716,21 +1498,11 @@ SND_SOC_DAPM_AIF_OUT("AIF3TX1", NULL, 0, SND_SOC_DAPM_AIF_OUT("AIF3TX2", NULL, 0, ARIZONA_AIF3_TX_ENABLES, ARIZONA_AIF3TX2_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF3RX1", NULL, 0, - ARIZONA_AIF3_RX_ENABLES, ARIZONA_AIF3RX1_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF3RX2", NULL, 0, - ARIZONA_AIF3_RX_ENABLES, ARIZONA_AIF3RX2_ENA_SHIFT, 0), - SND_SOC_DAPM_AIF_OUT("AIF4TX1", NULL, 0, ARIZONA_AIF4_TX_ENABLES, ARIZONA_AIF4TX1_ENA_SHIFT, 0), SND_SOC_DAPM_AIF_OUT("AIF4TX2", NULL, 0, ARIZONA_AIF4_TX_ENABLES, ARIZONA_AIF4TX2_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF4RX1", NULL, 0, - ARIZONA_AIF4_RX_ENABLES, ARIZONA_AIF4RX1_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF4RX2", NULL, 0, - ARIZONA_AIF4_RX_ENABLES, ARIZONA_AIF4RX2_ENA_SHIFT, 0), - SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, moon_hp_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | @@ -1769,6 +1541,238 @@ SND_SOC_DAPM_PGA("SPD1TX2", ARIZONA_SPD1_TX_CONTROL, SND_SOC_DAPM_OUT_DRV("SPD1", ARIZONA_SPD1_TX_CONTROL, ARIZONA_SPD1_ENA_SHIFT, 0, NULL, 0), +/* mux_in widgets : arranged in the order of sources + specified in ARIZONA_MIXER_INPUT_ROUTES */ + +SND_SOC_DAPM_PGA("Noise Generator", CLEARWATER_COMFORT_NOISE_GENERATOR, + CLEARWATER_NOISE_GEN_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("Tone Generator 1", ARIZONA_TONE_GENERATOR_1, + ARIZONA_TONE1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("Tone Generator 2", ARIZONA_TONE_GENERATOR_1, + ARIZONA_TONE2_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_SIGGEN("HAPTICS"), + +SND_SOC_DAPM_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, + ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, + &moon_aec_loopback_mux), + +SND_SOC_DAPM_PGA_E("IN1L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN1L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN1R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN1R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN2L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN2L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN2R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN2R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN3L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN3L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN3R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN3R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN4L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN4L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN4R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN4R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN5L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN5L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN5R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN5R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), + +SND_SOC_DAPM_AIF_IN("AIF1RX1", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX2", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX3", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX4", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX5", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX6", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX7", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX8", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX2", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX3", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX4", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX5", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX6", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX7", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX8", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF3RX1", NULL, 0, + ARIZONA_AIF3_RX_ENABLES, ARIZONA_AIF3RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF3RX2", NULL, 0, + ARIZONA_AIF3_RX_ENABLES, ARIZONA_AIF3RX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF4RX1", NULL, 0, + ARIZONA_AIF4_RX_ENABLES, ARIZONA_AIF4RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF4RX2", NULL, 0, + ARIZONA_AIF4_RX_ENABLES, ARIZONA_AIF4RX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("SLIMRX1", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX2", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX3", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX4", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX5", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX6", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX6_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX7", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX7_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("SLIMRX8", NULL, 0, + ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, + ARIZONA_SLIMRX8_ENA_SHIFT, 0), + +SND_SOC_DAPM_PGA("EQ1", ARIZONA_EQ1_1, ARIZONA_EQ1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ2", ARIZONA_EQ2_1, ARIZONA_EQ2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ3", ARIZONA_EQ3_1, ARIZONA_EQ3_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ4", ARIZONA_EQ4_1, ARIZONA_EQ4_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("DRC1L", ARIZONA_DRC1_CTRL1, ARIZONA_DRC1L_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("DRC1R", ARIZONA_DRC1_CTRL1, ARIZONA_DRC1R_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("DRC2L", CLEARWATER_DRC2_CTRL1, ARIZONA_DRC2L_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("DRC2R", CLEARWATER_DRC2_CTRL1, ARIZONA_DRC2R_ENA_SHIFT, 0, + NULL, 0), + +SND_SOC_DAPM_PGA("LHPF1", ARIZONA_HPLPF1_1, ARIZONA_LHPF1_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF2", ARIZONA_HPLPF2_1, ARIZONA_LHPF2_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF3", ARIZONA_HPLPF3_1, ARIZONA_LHPF3_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF4", ARIZONA_HPLPF4_1, ARIZONA_LHPF4_ENA_SHIFT, 0, + NULL, 0), + +SND_SOC_DAPM_PGA("ASRC1IN1L", CLEARWATER_ASRC1_ENABLE, + CLEARWATER_ASRC1_IN1L_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ASRC1IN1R", CLEARWATER_ASRC1_ENABLE, + CLEARWATER_ASRC1_IN1R_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ASRC1IN2L", CLEARWATER_ASRC1_ENABLE, + CLEARWATER_ASRC1_IN2L_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ASRC1IN2R", CLEARWATER_ASRC1_ENABLE, + CLEARWATER_ASRC1_IN2R_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ASRC2IN1L", CLEARWATER_ASRC2_ENABLE, + CLEARWATER_ASRC2_IN1L_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ASRC2IN1R", CLEARWATER_ASRC2_ENABLE, + CLEARWATER_ASRC2_IN1R_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ASRC2IN2L", CLEARWATER_ASRC2_ENABLE, + CLEARWATER_ASRC2_IN2L_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ASRC2IN2R", CLEARWATER_ASRC2_ENABLE, + CLEARWATER_ASRC2_IN2R_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC1DEC1", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC2", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC3", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC4", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT2", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT3", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT4", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC2DEC1", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC2", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC3", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC4", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC2INT1", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT2", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT3", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT4", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC3DEC1", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC3DEC2", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_DEC1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC3INT1", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC3INT2", ARIZONA_ISRC_3_CTRL_3, + ARIZONA_ISRC3_INT1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC4DEC1", ARIZONA_ISRC_4_CTRL_3, + ARIZONA_ISRC4_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC4DEC2", ARIZONA_ISRC_4_CTRL_3, + ARIZONA_ISRC4_DEC1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC4INT1", ARIZONA_ISRC_4_CTRL_3, + ARIZONA_ISRC4_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC4INT2", ARIZONA_ISRC_4_CTRL_3, + ARIZONA_ISRC4_INT1_ENA_SHIFT, 0, NULL, 0), + +WM_ADSP2("DSP1", 0, moon_adsp_power_ev), +WM_ADSP2("DSP2", 1, moon_adsp_power_ev), +WM_ADSP2("DSP3", 2, moon_adsp_power_ev), +WM_ADSP2("DSP4", 3, moon_adsp_power_ev), +WM_ADSP2("DSP5", 4, moon_adsp_power_ev), +WM_ADSP2("DSP6", 5, moon_adsp_power_ev), +WM_ADSP2("DSP7", 6, moon_adsp_power_ev), + SND_SOC_DAPM_PGA("DFC1", MOON_DFC1_CTRL, MOON_DFC1_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_PGA("DFC2", MOON_DFC2_CTRL, From 082b6b6e0bc091af61850a1392d1fe44d25478b4 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 6 Nov 2015 17:27:24 +0000 Subject: [PATCH 1001/1167] mfd: vegas: Make HP_CTRL_1x registers readable An earlier patch to the switch driver changed it to access the HP_CTRL_1x registers on vegas but the regmap tables weren't updated to make the registers readable, which leads to repeated warnings in the kernel log about regmap_read failures. This patch fixes that. Change-Id: Ief783db67d26bda86ef29735d8c0bde6f2da8d96 Signed-off-by: Richard Fitzgerald --- drivers/mfd/vegas-tables.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mfd/vegas-tables.c b/drivers/mfd/vegas-tables.c index 1c09371cc77..f0b62cfda1a 100644 --- a/drivers/mfd/vegas-tables.c +++ b/drivers/mfd/vegas-tables.c @@ -925,6 +925,8 @@ static bool vegas_readable_register(struct device *dev, unsigned int reg) case ARIZONA_MIC_BIAS_CTRL_1: case ARIZONA_MIC_BIAS_CTRL_2: case ARIZONA_MIC_BIAS_CTRL_3: + case ARIZONA_HP_CTRL_1L: + case ARIZONA_HP_CTRL_1R: case ARIZONA_ACCESSORY_DETECT_MODE_1: case ARIZONA_HEADPHONE_DETECT_1: case ARIZONA_HEADPHONE_DETECT_2: @@ -1533,6 +1535,8 @@ static bool vegas_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: case ARIZONA_MIC_DETECT_3: case ARIZONA_MIC_DETECT_4: + case ARIZONA_HP_CTRL_1L: + case ARIZONA_HP_CTRL_1R: case ARIZONA_HEADPHONE_DETECT_2: case ARIZONA_INPUT_ENABLES_STATUS: case ARIZONA_OUTPUT_STATUS_1: From bcfa1a705d26c233f50c292cca01075debc44d11 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 4 Nov 2015 10:22:47 +0000 Subject: [PATCH 1002/1167] ASoC: vegas: Remove duplicated consts The SOC_xxx_DECL() macros already include 'const' so there's no need to put a const in the source where they are used. Signed-off-by: Richard Fitzgerald Signed-off-by: Mark Brown (cherry picked from commit 82d6717f675f4ce7764c1978d844c59b57ca1499) Change-Id: Ib9e4ad31af9e9bad29351789f4b167f51a75b297 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/vegas.c | 46 ++++++++++++++++++++-------------------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/sound/soc/codecs/vegas.c b/sound/soc/codecs/vegas.c index 97a94c27f04..b79f3326c8b 100644 --- a/sound/soc/codecs/vegas.c +++ b/sound/soc/codecs/vegas.c @@ -255,20 +255,20 @@ static const char * const vegas_inmux_texts[] = { "B", }; -static const SOC_ENUM_SINGLE_DECL(vegas_in1muxl_enum, - ARIZONA_ADC_DIGITAL_VOLUME_1L, - ARIZONA_IN1L_SRC_SHIFT, - vegas_inmux_texts); +static SOC_ENUM_SINGLE_DECL(vegas_in1muxl_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_SRC_SHIFT, + vegas_inmux_texts); -static const SOC_ENUM_SINGLE_DECL(vegas_in1muxr_enum, - ARIZONA_ADC_DIGITAL_VOLUME_1R, - ARIZONA_IN1R_SRC_SHIFT, - vegas_inmux_texts); +static SOC_ENUM_SINGLE_DECL(vegas_in1muxr_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1R, + ARIZONA_IN1R_SRC_SHIFT, + vegas_inmux_texts); -static const SOC_ENUM_SINGLE_DECL(vegas_in2mux_enum, - ARIZONA_ADC_DIGITAL_VOLUME_2L, - ARIZONA_IN2L_SRC_SHIFT, - vegas_inmux_texts); +static SOC_ENUM_SINGLE_DECL(vegas_in2mux_enum, + ARIZONA_ADC_DIGITAL_VOLUME_2L, + ARIZONA_IN2L_SRC_SHIFT, + vegas_inmux_texts); static const struct snd_kcontrol_new vegas_in1mux[2] = { SOC_DAPM_ENUM_EXT("IN1L Mux", vegas_in1muxl_enum, @@ -631,17 +631,17 @@ static const unsigned int vegas_aec_loopback_values[] = { 0, 1, 2, 3, 4, 6, 7, 8, 9, }; -static const SOC_VALUE_ENUM_SINGLE_DECL(vegas_aec1_loopback, - ARIZONA_DAC_AEC_CONTROL_1, - ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, - vegas_aec_loopback_texts, - vegas_aec_loopback_values); - -static const SOC_VALUE_ENUM_SINGLE_DECL(vegas_aec2_loopback, - ARIZONA_DAC_AEC_CONTROL_2, - ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, - vegas_aec_loopback_texts, - vegas_aec_loopback_values); +static SOC_VALUE_ENUM_SINGLE_DECL(vegas_aec1_loopback, + ARIZONA_DAC_AEC_CONTROL_1, + ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, + vegas_aec_loopback_texts, + vegas_aec_loopback_values); + +static SOC_VALUE_ENUM_SINGLE_DECL(vegas_aec2_loopback, + ARIZONA_DAC_AEC_CONTROL_2, + ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, + vegas_aec_loopback_texts, + vegas_aec_loopback_values); static const struct snd_kcontrol_new vegas_aec_loopback_mux[] = { SOC_DAPM_VALUE_ENUM("AEC1 Loopback", vegas_aec1_loopback), From 09396b99c68158abc1b261e9816050d03dcb7ddd Mon Sep 17 00:00:00 2001 From: Stuart Henderson Date: Thu, 19 Nov 2015 14:00:30 +0000 Subject: [PATCH 1003/1167] ASoC: wm5102: Remove duplicate const SOC_ENUM_SINGLE_DECL already defines const, so remove the duplicate that causes sparse warnings. Change-Id: Ie603fb3b31d46c131e5efb32d395b39a812c7717 Signed-off-by: Stuart Henderson --- sound/soc/codecs/wm5102.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 3806de45b2e..72bc9d0d36d 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1081,7 +1081,8 @@ static const char * const wm5102_dsp_output_texts[] = { "DSP1", }; -static const SOC_ENUM_SINGLE_DECL(wm5102_dsp_output_enum, 0, 0, wm5102_dsp_output_texts); +static SOC_ENUM_SINGLE_DECL(wm5102_dsp_output_enum, 0, 0, + wm5102_dsp_output_texts); static const struct snd_kcontrol_new wm5102_dsp_output_mux = SOC_DAPM_ENUM_VIRT("DSP Virtual Output Mux", wm5102_dsp_output_enum); From bf838668d435cd16b778e3863857b91227bb809c Mon Sep 17 00:00:00 2001 From: Stuart Henderson Date: Thu, 19 Nov 2015 14:04:33 +0000 Subject: [PATCH 1004/1167] ASoC: clearwater: Remove duplicate consts SOC_ENUM_SINGLE_DECL already defines const, so remove the duplicates that cause sparse warnings. Change-Id: I91979df31c0272977fd796a2e56aaff084b10d82 Signed-off-by: Stuart Henderson --- sound/soc/codecs/clearwater.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 8741a13ec7c..1ea64c34e70 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -278,19 +278,19 @@ static const char * const clearwater_inmux_texts[] = { "B", }; -static const SOC_ENUM_SINGLE_DECL(clearwater_in1mux_enum, - ARIZONA_ADC_DIGITAL_VOLUME_1L, - ARIZONA_IN1L_SRC_SHIFT, - clearwater_inmux_texts); - -static const SOC_ENUM_SINGLE_DECL(clearwater_in2muxl_enum, - ARIZONA_ADC_DIGITAL_VOLUME_2L, - ARIZONA_IN2L_SRC_SHIFT, - clearwater_inmux_texts); -static const SOC_ENUM_SINGLE_DECL(clearwater_in2muxr_enum, - ARIZONA_ADC_DIGITAL_VOLUME_2R, - ARIZONA_IN2R_SRC_SHIFT, - clearwater_inmux_texts); +static SOC_ENUM_SINGLE_DECL(clearwater_in1mux_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_SRC_SHIFT, + clearwater_inmux_texts); + +static SOC_ENUM_SINGLE_DECL(clearwater_in2muxl_enum, + ARIZONA_ADC_DIGITAL_VOLUME_2L, + ARIZONA_IN2L_SRC_SHIFT, + clearwater_inmux_texts); +static SOC_ENUM_SINGLE_DECL(clearwater_in2muxr_enum, + ARIZONA_ADC_DIGITAL_VOLUME_2R, + ARIZONA_IN2R_SRC_SHIFT, + clearwater_inmux_texts); static const struct snd_kcontrol_new clearwater_in1mux = SOC_DAPM_ENUM("IN1L Mux", clearwater_in1mux_enum); From bde2c7d15922d3876264d55c727034dce3b885d1 Mon Sep 17 00:00:00 2001 From: Stuart Henderson Date: Thu, 19 Nov 2015 14:06:44 +0000 Subject: [PATCH 1005/1167] ASoC: marley: Remove duplicate consts SOC_ENUM_SINGLE_DECL already defines const, so remove the duplicates that cause sparse warnings. Change-Id: Ie7f7657ba776696872309cc4444aeef003ced982 Signed-off-by: Stuart Henderson --- sound/soc/codecs/marley.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index ffe62730d7b..b777029fca3 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -189,15 +189,15 @@ static const char * const marley_inmux_texts[] = { "B", }; -static const SOC_ENUM_SINGLE_DECL(marley_in1muxl_enum, - ARIZONA_ADC_DIGITAL_VOLUME_1L, - ARIZONA_IN1L_SRC_SHIFT, - marley_inmux_texts); +static SOC_ENUM_SINGLE_DECL(marley_in1muxl_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_SRC_SHIFT, + marley_inmux_texts); -static const SOC_ENUM_SINGLE_DECL(marley_in1muxr_enum, - ARIZONA_ADC_DIGITAL_VOLUME_1R, - ARIZONA_IN1R_SRC_SHIFT, - marley_inmux_texts); +static SOC_ENUM_SINGLE_DECL(marley_in1muxr_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1R, + ARIZONA_IN1R_SRC_SHIFT, + marley_inmux_texts); static const struct snd_kcontrol_new marley_in1mux[2] = { SOC_DAPM_ENUM("IN1L Mux", marley_in1muxl_enum), @@ -290,10 +290,10 @@ static int marley_put_demux(struct snd_kcontrol *kcontrol, return snd_soc_dapm_put_enum_virt(kcontrol, ucontrol); } -static const SOC_ENUM_SINGLE_DECL(marley_outdemux_enum, - ARIZONA_OUTPUT_ENABLES_1, - ARIZONA_EP_SEL_SHIFT, - marley_outdemux_texts); +static SOC_ENUM_SINGLE_DECL(marley_outdemux_enum, + ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_EP_SEL_SHIFT, + marley_outdemux_texts); static const struct snd_kcontrol_new marley_outdemux = SOC_DAPM_ENUM_EXT("OUT1 Demux", marley_outdemux_enum, From 25e0de03a89ab045ec51736d98b0d746973ad2d2 Mon Sep 17 00:00:00 2001 From: Stuart Henderson Date: Thu, 19 Nov 2015 14:13:25 +0000 Subject: [PATCH 1006/1167] ASoC: moon: Remove duplicate consts SOC_ENUM_SINGLE_DECL already defines const. Remove the duplicates that cause sparse warnings. Change-Id: If54774e69b3a6d34fbcdb00171ffb897f2989e91 Signed-off-by: Stuart Henderson --- sound/soc/codecs/moon.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index d94ddf4e2f7..b9d2077b470 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -284,20 +284,20 @@ static const char * const moon_inmux_texts[] = { "B", }; -static const SOC_ENUM_SINGLE_DECL(moon_in1muxl_enum, - ARIZONA_ADC_DIGITAL_VOLUME_1L, - ARIZONA_IN1L_SRC_SHIFT, - moon_inmux_texts); - -static const SOC_ENUM_SINGLE_DECL(moon_in1muxr_enum, - ARIZONA_ADC_DIGITAL_VOLUME_1R, - ARIZONA_IN1R_SRC_SHIFT, - moon_inmux_texts); - -static const SOC_ENUM_SINGLE_DECL(moon_in2muxl_enum, - ARIZONA_ADC_DIGITAL_VOLUME_2L, - ARIZONA_IN2L_SRC_SHIFT, - moon_inmux_texts); +static SOC_ENUM_SINGLE_DECL(moon_in1muxl_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_SRC_SHIFT, + moon_inmux_texts); + +static SOC_ENUM_SINGLE_DECL(moon_in1muxr_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1R, + ARIZONA_IN1R_SRC_SHIFT, + moon_inmux_texts); + +static SOC_ENUM_SINGLE_DECL(moon_in2muxl_enum, + ARIZONA_ADC_DIGITAL_VOLUME_2L, + ARIZONA_IN2L_SRC_SHIFT, + moon_inmux_texts); static const struct snd_kcontrol_new moon_in1mux[2] = { SOC_DAPM_ENUM("IN1L Mux", moon_in1muxl_enum), From ab4486a8135c4ef13d230c503e1c805aae6f5d70 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 20 Nov 2015 14:45:54 +0000 Subject: [PATCH 1007/1167] ASoC: wm5102: Fix definition of DSP Virtual Output Mux The virtual output mux control doesn't relate to a register so it should be SND_SOC_NOPM Change-Id: I52711e5b268325084454273669b0fa2a70599e20 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm5102.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 72bc9d0d36d..0907f18edb8 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1081,7 +1081,7 @@ static const char * const wm5102_dsp_output_texts[] = { "DSP1", }; -static SOC_ENUM_SINGLE_DECL(wm5102_dsp_output_enum, 0, 0, +static SOC_ENUM_SINGLE_DECL(wm5102_dsp_output_enum, SND_SOC_NOPM, 0, wm5102_dsp_output_texts); static const struct snd_kcontrol_new wm5102_dsp_output_mux = From dd030cdb49a15280e5e50f1d976e585c0a21e3a3 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 10 Nov 2015 15:29:55 +0000 Subject: [PATCH 1008/1167] ASoC: wm_adsp: Add fw id for moon SCControl Use the firmware feature flags to decide whether the firmware support voice trigger, rather than hardcoding the ID into the moon codec driver Change-Id: I812053f143f2e4b5ccbfaa66a6284daf44b036a6 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/moon.c | 2 +- sound/soc/codecs/wm_adsp.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index b9d2077b470..1d39192e187 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -2665,7 +2665,7 @@ static irqreturn_t adsp2_irq(int irq, void *data) mutex_lock(&moon->compr_info.lock); if (!moon->compr_info.trig && - moon->core.adsp[5].fw_id == 0x9000d && + moon->core.adsp[5].fw_features.ez2control_trigger && moon->core.adsp[5].running) { if (moon->core.arizona->pdata.ez2ctrl_trigger) moon->core.arizona->pdata.ez2ctrl_trigger(); diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index abbdbc7ca17..df0b4be69a5 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2315,6 +2315,7 @@ static int wm_adsp_get_features(struct wm_adsp *dsp) case 0x70036: case 0x8000d: case 0x80053: + case 0x9000d: dsp->fw_features.ez2control_trigger = true; break; case 0x40019: From 0281877adf9f2cdffc4839c9d34b5a82ee026c8e Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 23 Nov 2015 14:58:26 +0000 Subject: [PATCH 1009/1167] ASoC: arizona: fix coding standard error This patch fixes a definition that failed checkpatch Change-Id: Ic7239c5219016313cbffe18a3c85fac524b1c322 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index c431e30b6b7..acc05d7b26c 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -214,7 +214,7 @@ static struct reg_sequence fll_ao_32K_45M_patch[] = { { MOON_FLLAO_CONTROL_2, 0x82B1 }, }; -static struct fllao_patch fllao_settings [] = { +static struct fllao_patch fllao_settings[] = { { .fin = 32768, .fout = 49152000, From da922728d21c1a7523fbff98e282dd895efedccd Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 23 Nov 2015 14:59:19 +0000 Subject: [PATCH 1010/1167] ASoC: arizona: fix missing const on fllao_settings The fllao_settings table is never written so should be const Change-Id: I8fad8fefa8b669a4f77fd620867bc45fc0458f86 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index acc05d7b26c..995375e3ff6 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -214,7 +214,7 @@ static struct reg_sequence fll_ao_32K_45M_patch[] = { { MOON_FLLAO_CONTROL_2, 0x82B1 }, }; -static struct fllao_patch fllao_settings[] = { +static const struct fllao_patch fllao_settings[] = { { .fin = 32768, .fout = 49152000, From cbac21fb2da97449b201f54ac01b9a85c48295c7 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 1 Dec 2015 13:57:06 +0000 Subject: [PATCH 1011/1167] switch: arizona: remove unused variable antenna state machine was removed from the code in one of the earlier commits but a few variables were still present this patch removes those Change-Id: I92f6f36fa0d4c8eb3ca74312f004aa2995519ff8 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index f1e1fffe83c..69e52546594 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -192,9 +192,6 @@ struct arizona_extcon_info { int mic_impedance; struct completion manual_mic_completion; - int button_impedance; - int button_check; - bool wait_for_mic; int accdet_ip; struct arizona_micd_bias micd_bias; From 5718e204ea016df8f38a319edd9838ed606496e6 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Mon, 30 Nov 2015 14:01:58 +0000 Subject: [PATCH 1012/1167] switch: arizona: turn off the old micbias when switching modes the old micbias was getting turned off only when micd_force_micbias was set we need to turn it off also when micd_force_micbias_initial is set and we are detecting a mic Change-Id: Id5881196ecb5b64501f486442647f033df793f00 Signed-off-by: Nikesh Oswal --- drivers/switch/switch-arizona.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 69e52546594..d373b42e224 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -719,7 +719,9 @@ static void arizona_extcon_change_mode(struct arizona_extcon_info *info) info->micd_modes[new_mode].bias) { change_bias = true; - if (arizona->pdata.micd_force_micbias) { + if ((arizona->pdata.micd_force_micbias) || + (arizona->pdata.micd_force_micbias_initial && + info->detecting)) { widget = arizona_extcon_get_micbias(info); dev_dbg(arizona->dev, "disabling %s\n", widget); From 09a303a4e0f0fa3bb0867f4f7e5ab18d6bb6a03f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 4 Dec 2015 09:02:08 +0000 Subject: [PATCH 1013/1167] ASoC: wm_adsp: Mimic legacy behaviour of reading controls when DSP is on Before the updates to the control code, every control would be read from the DSP when the DSP was powered on. The newer code will only do this for volatile controls. This patch will read the control from the hardware if no flags are specified and the control is enabled. Change-Id: Ic5856c40dc9399e886ce6861f70117102e98b6ea Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index df0b4be69a5..ed619f1f5b4 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1055,6 +1055,8 @@ static int wm_coeff_get(struct snd_kcontrol *kcontrol, else ret = -EPERM; goto out; + } else if (!ctl->flags && ctl->enabled) { + ret = wm_coeff_read_control(ctl, ctl->cache, ctl->len); } memcpy(p, ctl->cache, ctl->len); From f3b11280bd19b9003d050b5b96856fda58fc35b6 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 28 Oct 2015 16:27:17 +0000 Subject: [PATCH 1014/1167] ASoC: arizona: fix range of OPCLK_REF The code was able to generate illegal OPCLK_REF values because the reference frequency tables listed all values of SYSCLK instead of valid values for OPCLK_REF clock. The maximum OPCLK_REF clock is 49.152MHz or 45.1584MHz. Change-Id: I95292a8773f259d9df522c84b7ce76502c800666 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 995375e3ff6..468363df054 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -3024,24 +3024,18 @@ void arizona_init_dvfs(struct arizona_priv *priv) } EXPORT_SYMBOL_GPL(arizona_init_dvfs); -static unsigned int arizona_sysclk_48k_rates[] = { +static unsigned int arizona_opclk_ref_48k_rates[] = { 6144000, 12288000, 24576000, 49152000, - 73728000, - 98304000, - 147456000, }; -static unsigned int arizona_sysclk_44k1_rates[] = { +static unsigned int arizona_opclk_ref_44k1_rates[] = { 5644800, 11289600, 22579200, 45158400, - 67737600, - 90316800, - 135475200, }; static int arizona_set_opclk(struct snd_soc_codec *codec, unsigned int clk, @@ -3083,11 +3077,11 @@ static int arizona_set_opclk(struct snd_soc_codec *codec, unsigned int clk, } if (refclk % 8000) - rates = arizona_sysclk_44k1_rates; + rates = arizona_opclk_ref_44k1_rates; else - rates = arizona_sysclk_48k_rates; + rates = arizona_opclk_ref_48k_rates; - for (ref = 0; ref < ARRAY_SIZE(arizona_sysclk_48k_rates) && + for (ref = 0; ref < ARRAY_SIZE(arizona_opclk_ref_48k_rates) && rates[ref] <= refclk; ref++) { div = div_incr; while (rates[ref] / div >= freq && div < 32) { From 7a93444cf0497c356c05f9ec24ce8670798a3882 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 7 Aug 2015 14:45:15 +0100 Subject: [PATCH 1015/1167] ASoC: vegas: mux control should only update power if its state changed The custom put functions for the mux controls should only call snd_soc_dapm_mux_update_power() if the mux state was changed. Change-Id: Ieda051ca468c8f40b2a8896432bf1bbffde957ff Signed-off-by: Richard Fitzgerald Signed-off-by: V V N Praveen Kumar --- sound/soc/codecs/vegas.c | 57 ++++++++++++++++++++++++++++++++++------ 1 file changed, 49 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/vegas.c b/sound/soc/codecs/vegas.c index b79f3326c8b..9ff2273f84d 100644 --- a/sound/soc/codecs/vegas.c +++ b/sound/soc/codecs/vegas.c @@ -171,6 +171,8 @@ static int vegas_in1mux_put(struct snd_kcontrol *kcontrol, struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; unsigned int mux, inmode; unsigned int mode_val, src_val; + bool changed = false; + int ret; mux = ucontrol->value.enumerated.item[0]; if (mux > 1) @@ -189,31 +191,53 @@ static int vegas_in1mux_put(struct snd_kcontrol *kcontrol, else mode_val = 1 << ARIZONA_IN1_MODE_SHIFT; - snd_soc_update_bits(codec, ARIZONA_IN1L_CONTROL, + ret = snd_soc_update_bits(codec, ARIZONA_IN1L_CONTROL, ARIZONA_IN1_MODE_MASK, mode_val); + if (ret < 0) + return ret; + else if (ret) + changed = true; /* IN1A is digital so L and R must change together */ /* src_val setting same for both registers */ - snd_soc_update_bits(codec, + ret = snd_soc_update_bits(codec, ARIZONA_ADC_DIGITAL_VOLUME_1L, ARIZONA_IN1L_SRC_MASK | ARIZONA_IN1L_SRC_SE_MASK, src_val); - snd_soc_update_bits(codec, + if (ret < 0) + return ret; + else if (ret) + changed = true; + + ret = snd_soc_update_bits(codec, ARIZONA_ADC_DIGITAL_VOLUME_1R, ARIZONA_IN1R_SRC_MASK | ARIZONA_IN1R_SRC_SE_MASK, src_val); + + if (ret < 0) + return ret; + else if (ret) + changed = true; break; default: /* both analogue */ - snd_soc_update_bits(codec, + ret = snd_soc_update_bits(codec, e->reg, ARIZONA_IN1L_SRC_MASK | ARIZONA_IN1L_SRC_SE_MASK, src_val); + if (ret < 0) + return ret; + else if (ret) + changed = true; break; } - return snd_soc_dapm_put_enum_virt(kcontrol, ucontrol); + if (changed) + return snd_soc_dapm_mux_update_power(widget, kcontrol, + mux, e); + else + return 0; } static int vegas_in2mux_put(struct snd_kcontrol *kcontrol, @@ -225,6 +249,9 @@ static int vegas_in2mux_put(struct snd_kcontrol *kcontrol, struct vegas_priv *vegas = snd_soc_codec_get_drvdata(codec); struct arizona *arizona = vegas->core.arizona; unsigned int mux, inmode, src_val, mode_val; + bool changed = false; + int ret; + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; mux = ucontrol->value.enumerated.item[0]; if (mux > 1) @@ -240,14 +267,28 @@ static int vegas_in2mux_put(struct snd_kcontrol *kcontrol, if (inmode & ARIZONA_INMODE_SE) src_val |= 1 << ARIZONA_IN2L_SRC_SE_SHIFT; - snd_soc_update_bits(codec, ARIZONA_IN2L_CONTROL, + ret = snd_soc_update_bits(codec, ARIZONA_IN2L_CONTROL, ARIZONA_IN2_MODE_MASK, mode_val); + if (ret < 0) + return ret; + else if (ret) + changed = true; - snd_soc_update_bits(codec, ARIZONA_ADC_DIGITAL_VOLUME_2L, + ret = snd_soc_update_bits(codec, ARIZONA_ADC_DIGITAL_VOLUME_2L, ARIZONA_IN2L_SRC_MASK | ARIZONA_IN2L_SRC_SE_MASK, src_val); + if (ret < 0) + return ret; + else if (ret) + changed = true; - return snd_soc_dapm_put_enum_virt(kcontrol, ucontrol); + + + if (changed) + return snd_soc_dapm_mux_update_power(widget, kcontrol, + mux, e); + else + return 0; } static const char * const vegas_inmux_texts[] = { From a94f9dd9f12436bd584e23f5f3e1075b2dbd55dd Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 18 Jan 2016 13:55:14 +0000 Subject: [PATCH 1016/1167] ASoC: wm5102: Add support for the debug firmware Change-Id: Iccc308c3a66dff8f1843f8fee6f9992e1319cd88 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm5102.c | 292 +++++++++++++++++++++++++++++++++++++- 1 file changed, 291 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 0907f18edb8..94aa607a50b 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -33,9 +33,25 @@ #include "wm5102.h" #include "wm_adsp.h" +#define WM5102_NUM_ADSP 1 + +#define WM5102_DEFAULT_FRAGMENTS 1 +#define WM5102_DEFAULT_FRAGMENT_SIZE 4096 + +struct wm5102_compr { + struct mutex lock; + + struct snd_compr_stream *stream; + struct wm_adsp *adsp; + + size_t total_copied; + bool allocated; +}; + struct wm5102_priv { struct arizona_priv core; struct arizona_fll fll[2]; + struct wm5102_compr compr_info; struct mutex fw_lock; }; @@ -1636,6 +1652,11 @@ static const struct snd_soc_dapm_route wm5102_dapm_routes[] = { { "Slim2 Capture", NULL, "SYSCLK" }, { "Slim3 Capture", NULL, "SYSCLK" }, + { "Trace CPU", NULL, "Trace DSP" }, + { "Trace DSP", NULL, "DSP1" }, + { "Trace CPU", NULL, "SYSCLK" }, + { "Trace DSP", NULL, "SYSCLK" }, + { "IN1L PGA", NULL, "IN1L" }, { "IN1R PGA", NULL, "IN1R" }, @@ -1902,19 +1923,243 @@ static struct snd_soc_dai_driver wm5102_dai[] = { }, .ops = &arizona_simple_dai_ops, }, + { + .name = "wm5102-cpu-trace", + .capture = { + .stream_name = "Trace CPU", + .channels_min = 2, + .channels_max = 8, + .rates = WM5102_RATES, + .formats = WM5102_FORMATS, + }, + .compress_dai = 1, + }, + { + .name = "wm5102-dsp-trace", + .capture = { + .stream_name = "Trace DSP", + .channels_min = 2, + .channels_max = 8, + .rates = WM5102_RATES, + .formats = WM5102_FORMATS, + }, + }, }; static irqreturn_t adsp2_irq(int irq, void *data) { struct wm5102_priv *wm5102 = data; + int ret, avail; + + mutex_lock(&wm5102->compr_info.lock); if (wm5102->core.arizona->pdata.ez2ctrl_trigger && wm5102->core.adsp[0].fw_features.ez2control_trigger) wm5102->core.arizona->pdata.ez2ctrl_trigger(); + if (!wm5102->compr_info.allocated) + goto out; + + ret = wm_adsp_stream_handle_irq(wm5102->compr_info.adsp); + if (ret < 0) { + dev_err(wm5102->core.arizona->dev, + "Failed to capture DSP data: %d\n", + ret); + goto out; + } + + wm5102->compr_info.total_copied += ret; + + avail = wm_adsp_stream_avail(wm5102->compr_info.adsp); + if (avail > WM5102_DEFAULT_FRAGMENT_SIZE) + snd_compr_fragment_elapsed(wm5102->compr_info.stream); + +out: + mutex_unlock(&wm5102->compr_info.lock); + return IRQ_HANDLED; } +static int wm5102_open(struct snd_compr_stream *stream) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm5102_priv *wm5102 = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = wm5102->core.arizona; + int n_adsp, ret = 0; + + mutex_lock(&wm5102->compr_info.lock); + + if (wm5102->compr_info.stream) { + ret = -EBUSY; + goto out; + } + + if (strcmp(rtd->codec_dai->name, "wm5102-dsp-trace") == 0) { + n_adsp = 0; + } else { + dev_err(arizona->dev, + "No suitable compressed stream for dai '%s'\n", + rtd->codec_dai->name); + ret = -EINVAL; + goto out; + } + + if (!wm_adsp_compress_supported(&wm5102->core.adsp[n_adsp], stream)) { + dev_err(arizona->dev, + "No suitable firmware for compressed stream\n"); + ret = -EINVAL; + goto out; + } + + wm5102->compr_info.adsp = &wm5102->core.adsp[n_adsp]; + wm5102->compr_info.stream = stream; +out: + mutex_unlock(&wm5102->compr_info.lock); + + return ret; +} + +static int wm5102_free(struct snd_compr_stream *stream) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm5102_priv *wm5102 = snd_soc_codec_get_drvdata(rtd->codec); + + mutex_lock(&wm5102->compr_info.lock); + + wm5102->compr_info.allocated = false; + wm5102->compr_info.stream = NULL; + wm5102->compr_info.total_copied = 0; + + wm_adsp_stream_free(wm5102->compr_info.adsp); + + mutex_unlock(&wm5102->compr_info.lock); + + return 0; +} + +static int wm5102_set_params(struct snd_compr_stream *stream, + struct snd_compr_params *params) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm5102_priv *wm5102 = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = wm5102->core.arizona; + struct wm5102_compr *compr = &wm5102->compr_info; + int ret = 0; + + mutex_lock(&compr->lock); + + if (!wm_adsp_format_supported(compr->adsp, stream, params)) { + dev_err(arizona->dev, + "Invalid params: id:%u, chan:%u,%u, rate:%u format:%u\n", + params->codec.id, params->codec.ch_in, + params->codec.ch_out, params->codec.sample_rate, + params->codec.format); + ret = -EINVAL; + goto out; + } + + ret = wm_adsp_stream_alloc(compr->adsp, params); + if (ret == 0) + compr->allocated = true; + +out: + mutex_unlock(&compr->lock); + + return ret; +} + +static int wm5102_get_params(struct snd_compr_stream *stream, + struct snd_codec *params) +{ + return 0; +} + +static int wm5102_trigger(struct snd_compr_stream *stream, int cmd) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm5102_priv *wm5102 = snd_soc_codec_get_drvdata(rtd->codec); + int ret = 0; + + mutex_lock(&wm5102->compr_info.lock); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + ret = wm_adsp_stream_start(wm5102->compr_info.adsp); + break; + case SNDRV_PCM_TRIGGER_STOP: + break; + default: + ret = -EINVAL; + break; + } + + mutex_unlock(&wm5102->compr_info.lock); + + return ret; +} + +static int wm5102_pointer(struct snd_compr_stream *stream, + struct snd_compr_tstamp *tstamp) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm5102_priv *wm5102 = snd_soc_codec_get_drvdata(rtd->codec); + + mutex_lock(&wm5102->compr_info.lock); + tstamp->byte_offset = 0; + tstamp->copied_total = wm5102->compr_info.total_copied; + mutex_unlock(&wm5102->compr_info.lock); + + return 0; +} + +static int wm5102_copy(struct snd_compr_stream *stream, char __user *buf, + size_t count) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm5102_priv *wm5102 = snd_soc_codec_get_drvdata(rtd->codec); + int ret; + + mutex_lock(&wm5102->compr_info.lock); + + if (stream->direction == SND_COMPRESS_PLAYBACK) + ret = -EINVAL; + else + ret = wm_adsp_stream_read(wm5102->compr_info.adsp, buf, count); + + mutex_unlock(&wm5102->compr_info.lock); + + return ret; +} + +static int wm5102_get_caps(struct snd_compr_stream *stream, + struct snd_compr_caps *caps) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm5102_priv *wm5102 = snd_soc_codec_get_drvdata(rtd->codec); + + mutex_lock(&wm5102->compr_info.lock); + + memset(caps, 0, sizeof(*caps)); + + caps->direction = stream->direction; + caps->min_fragment_size = WM5102_DEFAULT_FRAGMENT_SIZE; + caps->max_fragment_size = WM5102_DEFAULT_FRAGMENT_SIZE; + caps->min_fragments = WM5102_DEFAULT_FRAGMENTS; + caps->max_fragments = WM5102_DEFAULT_FRAGMENTS; + + wm_adsp_get_caps(wm5102->compr_info.adsp, stream, caps); + + mutex_unlock(&wm5102->compr_info.lock); + + return 0; +} + +static int wm5102_get_codec_caps(struct snd_compr_stream *stream, + struct snd_compr_codec_caps *codec) +{ + return 0; +} + static int wm5102_codec_probe(struct snd_soc_codec *codec) { struct wm5102_priv *priv = snd_soc_codec_get_drvdata(codec); @@ -2017,6 +2262,22 @@ static struct snd_soc_codec_driver soc_codec_dev_wm5102 = { .num_dapm_routes = ARRAY_SIZE(wm5102_dapm_routes), }; +static struct snd_compr_ops wm5102_compr_ops = { + .open = wm5102_open, + .free = wm5102_free, + .set_params = wm5102_set_params, + .get_params = wm5102_get_params, + .trigger = wm5102_trigger, + .pointer = wm5102_pointer, + .copy = wm5102_copy, + .get_caps = wm5102_get_caps, + .get_codec_caps = wm5102_get_codec_caps, +}; + +static struct snd_soc_platform_driver wm5102_compr_platform = { + .compr_ops = &wm5102_compr_ops, +}; + static int wm5102_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); @@ -2033,6 +2294,7 @@ static int wm5102_probe(struct platform_device *pdev) * locate regulator supplies */ pdev->dev.of_node = arizona->dev->of_node; + mutex_init(&wm5102->compr_info.lock); mutex_init(&wm5102->fw_lock); wm5102->core.arizona = arizona; @@ -2082,15 +2344,43 @@ static int wm5102_probe(struct platform_device *pdev) pm_runtime_enable(&pdev->dev); pm_runtime_idle(&pdev->dev); - return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_wm5102, + ret = snd_soc_register_platform(&pdev->dev, &wm5102_compr_platform); + if (ret < 0) { + dev_err(&pdev->dev, + "Failed to register platform: %d\n", + ret); + goto error; + } + + ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_wm5102, wm5102_dai, ARRAY_SIZE(wm5102_dai)); + if (ret < 0) { + dev_err(&pdev->dev, + "Failed to register codec: %d\n", + ret); + snd_soc_unregister_platform(&pdev->dev); + goto error; + } + + return ret; + +error: + mutex_destroy(&wm5102->compr_info.lock); + mutex_destroy(&wm5102->fw_lock); + + return ret; } static int wm5102_remove(struct platform_device *pdev) { + struct wm5102_priv *wm5102 = platform_get_drvdata(pdev); + snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); + mutex_destroy(&wm5102->compr_info.lock); + mutex_destroy(&wm5102->fw_lock); + return 0; } From bed80a6815913354383537e6156b7fcf724f917b Mon Sep 17 00:00:00 2001 From: Simon Trimmer Date: Mon, 25 Jan 2016 15:13:57 +0000 Subject: [PATCH 1017/1167] Revert "ASoC: wm5102: Add support for the debug firmware" This reverts commit a94f9dd9f12436bd584e23f5f3e1075b2dbd55dd. wm5102 support will be readded after the reworking of the compressed streams interface. Change-Id: I45b2f8d8e95cd06b1957eb03d32aa45a6d224157 Signed-off-by: Simon Trimmer --- sound/soc/codecs/wm5102.c | 292 +------------------------------------- 1 file changed, 1 insertion(+), 291 deletions(-) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 94aa607a50b..0907f18edb8 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -33,25 +33,9 @@ #include "wm5102.h" #include "wm_adsp.h" -#define WM5102_NUM_ADSP 1 - -#define WM5102_DEFAULT_FRAGMENTS 1 -#define WM5102_DEFAULT_FRAGMENT_SIZE 4096 - -struct wm5102_compr { - struct mutex lock; - - struct snd_compr_stream *stream; - struct wm_adsp *adsp; - - size_t total_copied; - bool allocated; -}; - struct wm5102_priv { struct arizona_priv core; struct arizona_fll fll[2]; - struct wm5102_compr compr_info; struct mutex fw_lock; }; @@ -1652,11 +1636,6 @@ static const struct snd_soc_dapm_route wm5102_dapm_routes[] = { { "Slim2 Capture", NULL, "SYSCLK" }, { "Slim3 Capture", NULL, "SYSCLK" }, - { "Trace CPU", NULL, "Trace DSP" }, - { "Trace DSP", NULL, "DSP1" }, - { "Trace CPU", NULL, "SYSCLK" }, - { "Trace DSP", NULL, "SYSCLK" }, - { "IN1L PGA", NULL, "IN1L" }, { "IN1R PGA", NULL, "IN1R" }, @@ -1923,243 +1902,19 @@ static struct snd_soc_dai_driver wm5102_dai[] = { }, .ops = &arizona_simple_dai_ops, }, - { - .name = "wm5102-cpu-trace", - .capture = { - .stream_name = "Trace CPU", - .channels_min = 2, - .channels_max = 8, - .rates = WM5102_RATES, - .formats = WM5102_FORMATS, - }, - .compress_dai = 1, - }, - { - .name = "wm5102-dsp-trace", - .capture = { - .stream_name = "Trace DSP", - .channels_min = 2, - .channels_max = 8, - .rates = WM5102_RATES, - .formats = WM5102_FORMATS, - }, - }, }; static irqreturn_t adsp2_irq(int irq, void *data) { struct wm5102_priv *wm5102 = data; - int ret, avail; - - mutex_lock(&wm5102->compr_info.lock); if (wm5102->core.arizona->pdata.ez2ctrl_trigger && wm5102->core.adsp[0].fw_features.ez2control_trigger) wm5102->core.arizona->pdata.ez2ctrl_trigger(); - if (!wm5102->compr_info.allocated) - goto out; - - ret = wm_adsp_stream_handle_irq(wm5102->compr_info.adsp); - if (ret < 0) { - dev_err(wm5102->core.arizona->dev, - "Failed to capture DSP data: %d\n", - ret); - goto out; - } - - wm5102->compr_info.total_copied += ret; - - avail = wm_adsp_stream_avail(wm5102->compr_info.adsp); - if (avail > WM5102_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(wm5102->compr_info.stream); - -out: - mutex_unlock(&wm5102->compr_info.lock); - return IRQ_HANDLED; } -static int wm5102_open(struct snd_compr_stream *stream) -{ - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct wm5102_priv *wm5102 = snd_soc_codec_get_drvdata(rtd->codec); - struct arizona *arizona = wm5102->core.arizona; - int n_adsp, ret = 0; - - mutex_lock(&wm5102->compr_info.lock); - - if (wm5102->compr_info.stream) { - ret = -EBUSY; - goto out; - } - - if (strcmp(rtd->codec_dai->name, "wm5102-dsp-trace") == 0) { - n_adsp = 0; - } else { - dev_err(arizona->dev, - "No suitable compressed stream for dai '%s'\n", - rtd->codec_dai->name); - ret = -EINVAL; - goto out; - } - - if (!wm_adsp_compress_supported(&wm5102->core.adsp[n_adsp], stream)) { - dev_err(arizona->dev, - "No suitable firmware for compressed stream\n"); - ret = -EINVAL; - goto out; - } - - wm5102->compr_info.adsp = &wm5102->core.adsp[n_adsp]; - wm5102->compr_info.stream = stream; -out: - mutex_unlock(&wm5102->compr_info.lock); - - return ret; -} - -static int wm5102_free(struct snd_compr_stream *stream) -{ - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct wm5102_priv *wm5102 = snd_soc_codec_get_drvdata(rtd->codec); - - mutex_lock(&wm5102->compr_info.lock); - - wm5102->compr_info.allocated = false; - wm5102->compr_info.stream = NULL; - wm5102->compr_info.total_copied = 0; - - wm_adsp_stream_free(wm5102->compr_info.adsp); - - mutex_unlock(&wm5102->compr_info.lock); - - return 0; -} - -static int wm5102_set_params(struct snd_compr_stream *stream, - struct snd_compr_params *params) -{ - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct wm5102_priv *wm5102 = snd_soc_codec_get_drvdata(rtd->codec); - struct arizona *arizona = wm5102->core.arizona; - struct wm5102_compr *compr = &wm5102->compr_info; - int ret = 0; - - mutex_lock(&compr->lock); - - if (!wm_adsp_format_supported(compr->adsp, stream, params)) { - dev_err(arizona->dev, - "Invalid params: id:%u, chan:%u,%u, rate:%u format:%u\n", - params->codec.id, params->codec.ch_in, - params->codec.ch_out, params->codec.sample_rate, - params->codec.format); - ret = -EINVAL; - goto out; - } - - ret = wm_adsp_stream_alloc(compr->adsp, params); - if (ret == 0) - compr->allocated = true; - -out: - mutex_unlock(&compr->lock); - - return ret; -} - -static int wm5102_get_params(struct snd_compr_stream *stream, - struct snd_codec *params) -{ - return 0; -} - -static int wm5102_trigger(struct snd_compr_stream *stream, int cmd) -{ - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct wm5102_priv *wm5102 = snd_soc_codec_get_drvdata(rtd->codec); - int ret = 0; - - mutex_lock(&wm5102->compr_info.lock); - - switch (cmd) { - case SNDRV_PCM_TRIGGER_START: - ret = wm_adsp_stream_start(wm5102->compr_info.adsp); - break; - case SNDRV_PCM_TRIGGER_STOP: - break; - default: - ret = -EINVAL; - break; - } - - mutex_unlock(&wm5102->compr_info.lock); - - return ret; -} - -static int wm5102_pointer(struct snd_compr_stream *stream, - struct snd_compr_tstamp *tstamp) -{ - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct wm5102_priv *wm5102 = snd_soc_codec_get_drvdata(rtd->codec); - - mutex_lock(&wm5102->compr_info.lock); - tstamp->byte_offset = 0; - tstamp->copied_total = wm5102->compr_info.total_copied; - mutex_unlock(&wm5102->compr_info.lock); - - return 0; -} - -static int wm5102_copy(struct snd_compr_stream *stream, char __user *buf, - size_t count) -{ - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct wm5102_priv *wm5102 = snd_soc_codec_get_drvdata(rtd->codec); - int ret; - - mutex_lock(&wm5102->compr_info.lock); - - if (stream->direction == SND_COMPRESS_PLAYBACK) - ret = -EINVAL; - else - ret = wm_adsp_stream_read(wm5102->compr_info.adsp, buf, count); - - mutex_unlock(&wm5102->compr_info.lock); - - return ret; -} - -static int wm5102_get_caps(struct snd_compr_stream *stream, - struct snd_compr_caps *caps) -{ - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct wm5102_priv *wm5102 = snd_soc_codec_get_drvdata(rtd->codec); - - mutex_lock(&wm5102->compr_info.lock); - - memset(caps, 0, sizeof(*caps)); - - caps->direction = stream->direction; - caps->min_fragment_size = WM5102_DEFAULT_FRAGMENT_SIZE; - caps->max_fragment_size = WM5102_DEFAULT_FRAGMENT_SIZE; - caps->min_fragments = WM5102_DEFAULT_FRAGMENTS; - caps->max_fragments = WM5102_DEFAULT_FRAGMENTS; - - wm_adsp_get_caps(wm5102->compr_info.adsp, stream, caps); - - mutex_unlock(&wm5102->compr_info.lock); - - return 0; -} - -static int wm5102_get_codec_caps(struct snd_compr_stream *stream, - struct snd_compr_codec_caps *codec) -{ - return 0; -} - static int wm5102_codec_probe(struct snd_soc_codec *codec) { struct wm5102_priv *priv = snd_soc_codec_get_drvdata(codec); @@ -2262,22 +2017,6 @@ static struct snd_soc_codec_driver soc_codec_dev_wm5102 = { .num_dapm_routes = ARRAY_SIZE(wm5102_dapm_routes), }; -static struct snd_compr_ops wm5102_compr_ops = { - .open = wm5102_open, - .free = wm5102_free, - .set_params = wm5102_set_params, - .get_params = wm5102_get_params, - .trigger = wm5102_trigger, - .pointer = wm5102_pointer, - .copy = wm5102_copy, - .get_caps = wm5102_get_caps, - .get_codec_caps = wm5102_get_codec_caps, -}; - -static struct snd_soc_platform_driver wm5102_compr_platform = { - .compr_ops = &wm5102_compr_ops, -}; - static int wm5102_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); @@ -2294,7 +2033,6 @@ static int wm5102_probe(struct platform_device *pdev) * locate regulator supplies */ pdev->dev.of_node = arizona->dev->of_node; - mutex_init(&wm5102->compr_info.lock); mutex_init(&wm5102->fw_lock); wm5102->core.arizona = arizona; @@ -2344,43 +2082,15 @@ static int wm5102_probe(struct platform_device *pdev) pm_runtime_enable(&pdev->dev); pm_runtime_idle(&pdev->dev); - ret = snd_soc_register_platform(&pdev->dev, &wm5102_compr_platform); - if (ret < 0) { - dev_err(&pdev->dev, - "Failed to register platform: %d\n", - ret); - goto error; - } - - ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_wm5102, + return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_wm5102, wm5102_dai, ARRAY_SIZE(wm5102_dai)); - if (ret < 0) { - dev_err(&pdev->dev, - "Failed to register codec: %d\n", - ret); - snd_soc_unregister_platform(&pdev->dev); - goto error; - } - - return ret; - -error: - mutex_destroy(&wm5102->compr_info.lock); - mutex_destroy(&wm5102->fw_lock); - - return ret; } static int wm5102_remove(struct platform_device *pdev) { - struct wm5102_priv *wm5102 = platform_get_drvdata(pdev); - snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); - mutex_destroy(&wm5102->compr_info.lock); - mutex_destroy(&wm5102->fw_lock); - return 0; } From df7c76b3a277baa7e991109a0b38567b0849d9c0 Mon Sep 17 00:00:00 2001 From: V V N Praveen Kumar Date: Mon, 25 Jan 2016 11:50:03 +0000 Subject: [PATCH 1018/1167] Revert "ASoC: vegas: Remove duplicated consts" This reverts commit bcfa1a705d26c233f50c292cca01075debc44d11. Change-Id: I501288e42397235f69f3af362b95cf4823f61f09 Signed-off-by: Simon Trimmer --- sound/soc/codecs/vegas.c | 46 ++++++++++++++++++++-------------------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/sound/soc/codecs/vegas.c b/sound/soc/codecs/vegas.c index 9ff2273f84d..61a953fe14b 100644 --- a/sound/soc/codecs/vegas.c +++ b/sound/soc/codecs/vegas.c @@ -296,20 +296,20 @@ static const char * const vegas_inmux_texts[] = { "B", }; -static SOC_ENUM_SINGLE_DECL(vegas_in1muxl_enum, - ARIZONA_ADC_DIGITAL_VOLUME_1L, - ARIZONA_IN1L_SRC_SHIFT, - vegas_inmux_texts); +static const SOC_ENUM_SINGLE_DECL(vegas_in1muxl_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_SRC_SHIFT, + vegas_inmux_texts); -static SOC_ENUM_SINGLE_DECL(vegas_in1muxr_enum, - ARIZONA_ADC_DIGITAL_VOLUME_1R, - ARIZONA_IN1R_SRC_SHIFT, - vegas_inmux_texts); +static const SOC_ENUM_SINGLE_DECL(vegas_in1muxr_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1R, + ARIZONA_IN1R_SRC_SHIFT, + vegas_inmux_texts); -static SOC_ENUM_SINGLE_DECL(vegas_in2mux_enum, - ARIZONA_ADC_DIGITAL_VOLUME_2L, - ARIZONA_IN2L_SRC_SHIFT, - vegas_inmux_texts); +static const SOC_ENUM_SINGLE_DECL(vegas_in2mux_enum, + ARIZONA_ADC_DIGITAL_VOLUME_2L, + ARIZONA_IN2L_SRC_SHIFT, + vegas_inmux_texts); static const struct snd_kcontrol_new vegas_in1mux[2] = { SOC_DAPM_ENUM_EXT("IN1L Mux", vegas_in1muxl_enum, @@ -672,17 +672,17 @@ static const unsigned int vegas_aec_loopback_values[] = { 0, 1, 2, 3, 4, 6, 7, 8, 9, }; -static SOC_VALUE_ENUM_SINGLE_DECL(vegas_aec1_loopback, - ARIZONA_DAC_AEC_CONTROL_1, - ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, - vegas_aec_loopback_texts, - vegas_aec_loopback_values); - -static SOC_VALUE_ENUM_SINGLE_DECL(vegas_aec2_loopback, - ARIZONA_DAC_AEC_CONTROL_2, - ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, - vegas_aec_loopback_texts, - vegas_aec_loopback_values); +static const SOC_VALUE_ENUM_SINGLE_DECL(vegas_aec1_loopback, + ARIZONA_DAC_AEC_CONTROL_1, + ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, + vegas_aec_loopback_texts, + vegas_aec_loopback_values); + +static const SOC_VALUE_ENUM_SINGLE_DECL(vegas_aec2_loopback, + ARIZONA_DAC_AEC_CONTROL_2, + ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, + vegas_aec_loopback_texts, + vegas_aec_loopback_values); static const struct snd_kcontrol_new vegas_aec_loopback_mux[] = { SOC_DAPM_VALUE_ENUM("AEC1 Loopback", vegas_aec1_loopback), From 2e6c49473f2af1a075442dea5d17d7b563ea8196 Mon Sep 17 00:00:00 2001 From: V V N Praveen Kumar Date: Mon, 25 Jan 2016 11:49:37 +0000 Subject: [PATCH 1019/1167] Revert "ASoC: wm5102: Remove duplicate const" This reverts commit 09396b99c68158abc1b261e9816050d03dcb7ddd. SOC_ENUM_SINGLE_DECL defined without const. Change-Id: Ic5be2854f0bc97fd8fca66d53e34bcfc9069a98c Signed-off-by: Simon Trimmer --- sound/soc/codecs/wm5102.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 0907f18edb8..3806de45b2e 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1081,8 +1081,7 @@ static const char * const wm5102_dsp_output_texts[] = { "DSP1", }; -static SOC_ENUM_SINGLE_DECL(wm5102_dsp_output_enum, SND_SOC_NOPM, 0, - wm5102_dsp_output_texts); +static const SOC_ENUM_SINGLE_DECL(wm5102_dsp_output_enum, 0, 0, wm5102_dsp_output_texts); static const struct snd_kcontrol_new wm5102_dsp_output_mux = SOC_DAPM_ENUM_VIRT("DSP Virtual Output Mux", wm5102_dsp_output_enum); From 904fa8653fce80061be09c4493705aa6c620d45c Mon Sep 17 00:00:00 2001 From: V V N Praveen Kumar Date: Mon, 25 Jan 2016 11:49:26 +0000 Subject: [PATCH 1020/1167] Revert "ASoC: clearwater: Remove duplicate consts" This reverts commit bf838668d435cd16b778e3863857b91227bb809c. SOC_ENUM_SINGLE_DECL defined without const. Change-Id: Iae96e20984a76abdbe52d1f419fb85f579e47135 Signed-off-by: Simon Trimmer --- sound/soc/codecs/clearwater.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 1ea64c34e70..8741a13ec7c 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -278,19 +278,19 @@ static const char * const clearwater_inmux_texts[] = { "B", }; -static SOC_ENUM_SINGLE_DECL(clearwater_in1mux_enum, - ARIZONA_ADC_DIGITAL_VOLUME_1L, - ARIZONA_IN1L_SRC_SHIFT, - clearwater_inmux_texts); - -static SOC_ENUM_SINGLE_DECL(clearwater_in2muxl_enum, - ARIZONA_ADC_DIGITAL_VOLUME_2L, - ARIZONA_IN2L_SRC_SHIFT, - clearwater_inmux_texts); -static SOC_ENUM_SINGLE_DECL(clearwater_in2muxr_enum, - ARIZONA_ADC_DIGITAL_VOLUME_2R, - ARIZONA_IN2R_SRC_SHIFT, - clearwater_inmux_texts); +static const SOC_ENUM_SINGLE_DECL(clearwater_in1mux_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_SRC_SHIFT, + clearwater_inmux_texts); + +static const SOC_ENUM_SINGLE_DECL(clearwater_in2muxl_enum, + ARIZONA_ADC_DIGITAL_VOLUME_2L, + ARIZONA_IN2L_SRC_SHIFT, + clearwater_inmux_texts); +static const SOC_ENUM_SINGLE_DECL(clearwater_in2muxr_enum, + ARIZONA_ADC_DIGITAL_VOLUME_2R, + ARIZONA_IN2R_SRC_SHIFT, + clearwater_inmux_texts); static const struct snd_kcontrol_new clearwater_in1mux = SOC_DAPM_ENUM("IN1L Mux", clearwater_in1mux_enum); From 27f4c3b367804663677683f5969fae15005afce1 Mon Sep 17 00:00:00 2001 From: V V N Praveen Kumar Date: Mon, 25 Jan 2016 11:49:08 +0000 Subject: [PATCH 1021/1167] Revert "ASoC: marley: Remove duplicate consts" This reverts commit bde2c7d15922d3876264d55c727034dce3b885d1. SOC_ENUM_SINGLE_DECL defined without const Change-Id: I9310930cb8ac6e6b3f6260971f63636e974033b2 Signed-off-by: Simon Trimmer --- sound/soc/codecs/marley.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index b777029fca3..ffe62730d7b 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -189,15 +189,15 @@ static const char * const marley_inmux_texts[] = { "B", }; -static SOC_ENUM_SINGLE_DECL(marley_in1muxl_enum, - ARIZONA_ADC_DIGITAL_VOLUME_1L, - ARIZONA_IN1L_SRC_SHIFT, - marley_inmux_texts); +static const SOC_ENUM_SINGLE_DECL(marley_in1muxl_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_SRC_SHIFT, + marley_inmux_texts); -static SOC_ENUM_SINGLE_DECL(marley_in1muxr_enum, - ARIZONA_ADC_DIGITAL_VOLUME_1R, - ARIZONA_IN1R_SRC_SHIFT, - marley_inmux_texts); +static const SOC_ENUM_SINGLE_DECL(marley_in1muxr_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1R, + ARIZONA_IN1R_SRC_SHIFT, + marley_inmux_texts); static const struct snd_kcontrol_new marley_in1mux[2] = { SOC_DAPM_ENUM("IN1L Mux", marley_in1muxl_enum), @@ -290,10 +290,10 @@ static int marley_put_demux(struct snd_kcontrol *kcontrol, return snd_soc_dapm_put_enum_virt(kcontrol, ucontrol); } -static SOC_ENUM_SINGLE_DECL(marley_outdemux_enum, - ARIZONA_OUTPUT_ENABLES_1, - ARIZONA_EP_SEL_SHIFT, - marley_outdemux_texts); +static const SOC_ENUM_SINGLE_DECL(marley_outdemux_enum, + ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_EP_SEL_SHIFT, + marley_outdemux_texts); static const struct snd_kcontrol_new marley_outdemux = SOC_DAPM_ENUM_EXT("OUT1 Demux", marley_outdemux_enum, From 76fdc4fe27a0ad0d0759e0890bfdacedf56f96e7 Mon Sep 17 00:00:00 2001 From: V V N Praveen Kumar Date: Mon, 25 Jan 2016 11:48:40 +0000 Subject: [PATCH 1022/1167] Revert "ASoC: moon: Remove duplicate consts" This reverts commit 25e0de03a89ab045ec51736d98b0d746973ad2d2. SOC_ENUM_SINGLE_DECL defined without const. Change-Id: I7617c1f884e8815072f264e6807f6b37fe5b42cb Signed-off-by: Simon Trimmer --- sound/soc/codecs/moon.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 1d39192e187..b7de695d751 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -284,20 +284,20 @@ static const char * const moon_inmux_texts[] = { "B", }; -static SOC_ENUM_SINGLE_DECL(moon_in1muxl_enum, - ARIZONA_ADC_DIGITAL_VOLUME_1L, - ARIZONA_IN1L_SRC_SHIFT, - moon_inmux_texts); - -static SOC_ENUM_SINGLE_DECL(moon_in1muxr_enum, - ARIZONA_ADC_DIGITAL_VOLUME_1R, - ARIZONA_IN1R_SRC_SHIFT, - moon_inmux_texts); - -static SOC_ENUM_SINGLE_DECL(moon_in2muxl_enum, - ARIZONA_ADC_DIGITAL_VOLUME_2L, - ARIZONA_IN2L_SRC_SHIFT, - moon_inmux_texts); +static const SOC_ENUM_SINGLE_DECL(moon_in1muxl_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_SRC_SHIFT, + moon_inmux_texts); + +static const SOC_ENUM_SINGLE_DECL(moon_in1muxr_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1R, + ARIZONA_IN1R_SRC_SHIFT, + moon_inmux_texts); + +static const SOC_ENUM_SINGLE_DECL(moon_in2muxl_enum, + ARIZONA_ADC_DIGITAL_VOLUME_2L, + ARIZONA_IN2L_SRC_SHIFT, + moon_inmux_texts); static const struct snd_kcontrol_new moon_in1mux[2] = { SOC_DAPM_ENUM("IN1L Mux", moon_in1muxl_enum), From 6cea5de4a551b6de413d30310f0032ada7c985b5 Mon Sep 17 00:00:00 2001 From: Simon Trimmer Date: Fri, 8 Jan 2016 13:59:47 +0000 Subject: [PATCH 1023/1167] ASoC: largo: reapply some changes lost during the driver rename Reapply some lost largo changes originally committed as: ASoC: arizona: Only reset trigger flag for ez2control core The trigger flag is mistakenly being reset for all cores which could lead to retriggers when another core is loaded. This patch fixes the issue so the trigger flag is only reset when the ez2control core is powered up. ASoC: largo: Simplify ez2control trigger callback Now we have a power event for the ADSP itself we can simply clear the trigger flag every time we boot the ADSP which makes the whole process much simpler. Additionally, this fixes a race condition where if the stream is closed the stream free callback would run resetting the trigger flag before the DSP was powered down. Meaning an IRQ in that time would be treated as a new trigger. Change-Id: I33b42a372baf7f1aa8f30fc3a10ae55e32061348 Signed-off-by: Simon Trimmer --- sound/soc/codecs/largo.c | 36 +++++++++++++----------------------- 1 file changed, 13 insertions(+), 23 deletions(-) diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index a5a3ac7ba35..6062c8156bc 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -45,7 +45,6 @@ struct largo_compr { size_t total_copied; bool allocated; bool trig; - bool forced; }; struct largo_priv { @@ -75,30 +74,24 @@ static const struct wm_adsp_region *largo_dsp_regions[] = { largo_dsp3_regions, }; -static int largo_virt_dsp_power_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) +static int largo_adsp_power_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) { struct largo_priv *largo = snd_soc_codec_get_drvdata(w->codec); - mutex_lock(&largo->compr_info.lock); - - if (!largo->compr_info.stream) - largo->compr_info.trig = false; - switch (event) { - case SND_SOC_DAPM_POST_PMU: - largo->compr_info.forced = true; - break; - case SND_SOC_DAPM_PRE_PMD: - largo->compr_info.forced = false; + case SND_SOC_DAPM_PRE_PMU: + if (w->shift == 2) { + mutex_lock(&largo->compr_info.lock); + largo->compr_info.trig = false; + mutex_unlock(&largo->compr_info.lock); + } break; default: break; } - mutex_unlock(&largo->compr_info.lock); - - return 0; + return arizona_adsp_power_ev(w, kcontrol, event); } static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); @@ -487,8 +480,8 @@ SND_SOC_DAPM_PGA("ASRC2L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2L_ENA_SHIFT, 0, SND_SOC_DAPM_PGA("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0, NULL, 0), -WM_ADSP2("DSP2", 1, arizona_adsp_power_ev), -WM_ADSP2("DSP3", 2, arizona_adsp_power_ev), +WM_ADSP2("DSP2", 1, largo_adsp_power_ev), +WM_ADSP2("DSP3", 2, largo_adsp_power_ev), SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), @@ -679,9 +672,8 @@ SND_SOC_DAPM_VIRT_MUX("DSP2 Virtual Input", SND_SOC_NOPM, 0, 0, SND_SOC_DAPM_VIRT_MUX("DSP3 Virtual Input", SND_SOC_NOPM, 0, 0, &largo_memory_mux[1]), -SND_SOC_DAPM_VIRT_MUX_E("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, - &largo_dsp_output_mux[0], largo_virt_dsp_power_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), +SND_SOC_DAPM_VIRT_MUX("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, + &largo_dsp_output_mux[0]), ARIZONA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), ARIZONA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"), @@ -1185,8 +1177,6 @@ static int largo_free(struct snd_compr_stream *stream) largo->compr_info.allocated = false; largo->compr_info.stream = NULL; largo->compr_info.total_copied = 0; - if (!largo->compr_info.forced) - largo->compr_info.trig = false; wm_adsp_stream_free(largo->compr_info.adsp); From ca1cd1213a4484a9dcc484bfc8e4daaaaae3b949 Mon Sep 17 00:00:00 2001 From: V V N Praveen Kumar Date: Tue, 19 Jan 2016 16:02:53 +0530 Subject: [PATCH 1024/1167] mfd: arizona: mark AIF1_TX_BCLK_RATE as readable Change-Id: Iceefa76a9e221a91cfa37d2994201bb1d80a3e30 Signed-off-by: V V N Praveen Kumar --- drivers/mfd/largo-tables.c | 2 ++ drivers/mfd/vegas-tables.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/drivers/mfd/largo-tables.c b/drivers/mfd/largo-tables.c index 58feddda206..102a0b11f43 100644 --- a/drivers/mfd/largo-tables.c +++ b/drivers/mfd/largo-tables.c @@ -297,6 +297,7 @@ static const struct reg_default largo_reg_default[] = { { 0x00000502, 0x0000 }, /* R1282 - AIF1 Rx Pin Ctrl */ { 0x00000503, 0x0000 }, /* R1283 - AIF1 Rate Ctrl */ { 0x00000504, 0x0000 }, /* R1284 - AIF1 Format */ + { 0x00000505, 0x0040 }, /* R1285 - AIF1 Tx BCLK Rate */ { 0x00000506, 0x0040 }, /* R1286 - AIF1 Rx BCLK Rate */ { 0x00000507, 0x1818 }, /* R1287 - AIF1 Frame Ctrl 1 */ { 0x00000508, 0x1818 }, /* R1288 - AIF1 Frame Ctrl 2 */ @@ -931,6 +932,7 @@ static bool largo_readable_register(struct device *dev, unsigned int reg) case ARIZONA_AIF1_RX_PIN_CTRL: case ARIZONA_AIF1_RATE_CTRL: case ARIZONA_AIF1_FORMAT: + case ARIZONA_AIF1_TX_BCLK_RATE: case ARIZONA_AIF1_RX_BCLK_RATE: case ARIZONA_AIF1_FRAME_CTRL_1: case ARIZONA_AIF1_FRAME_CTRL_2: diff --git a/drivers/mfd/vegas-tables.c b/drivers/mfd/vegas-tables.c index f0b62cfda1a..4db51da7f69 100644 --- a/drivers/mfd/vegas-tables.c +++ b/drivers/mfd/vegas-tables.c @@ -337,6 +337,7 @@ static const struct reg_default vegas_reg_default[] = { { 0x00000502, 0x0000 }, /* R1282 - AIF1 Rx Pin Ctrl */ { 0x00000503, 0x0000 }, /* R1283 - AIF1 Rate Ctrl */ { 0x00000504, 0x0000 }, /* R1284 - AIF1 Format */ + { 0x00000505, 0x0040 }, /* R1285 - AIF1 Tx BCLK Rate */ { 0x00000506, 0x0040 }, /* R1286 - AIF1 Rx BCLK Rate */ { 0x00000507, 0x1818 }, /* R1287 - AIF1 Frame Ctrl 1 */ { 0x00000508, 0x1818 }, /* R1288 - AIF1 Frame Ctrl 2 */ @@ -1004,6 +1005,7 @@ static bool vegas_readable_register(struct device *dev, unsigned int reg) case ARIZONA_AIF1_RX_PIN_CTRL: case ARIZONA_AIF1_RATE_CTRL: case ARIZONA_AIF1_FORMAT: + case ARIZONA_AIF1_TX_BCLK_RATE: case ARIZONA_AIF1_RX_BCLK_RATE: case ARIZONA_AIF1_FRAME_CTRL_1: case ARIZONA_AIF1_FRAME_CTRL_2: From 076ab0b2c8455df93d6328db82770c57879d83d4 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 21 Jan 2016 10:17:19 +0000 Subject: [PATCH 1025/1167] regulator: arizona-micsupp: Fix a couple of coding standards issues Change-Id: I043b04d61115fccf16a6c8f7c150cc8e5640a42e Signed-off-by: Charles Keepax --- drivers/regulator/arizona-micsupp.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/regulator/arizona-micsupp.c b/drivers/regulator/arizona-micsupp.c index 03cae2b4e37..d3af1ea8015 100644 --- a/drivers/regulator/arizona-micsupp.c +++ b/drivers/regulator/arizona-micsupp.c @@ -75,13 +75,13 @@ static int arizona_micsupp_list_voltage(struct regulator_dev *rdev, struct arizona_micsupp *micsupp = rdev_get_drvdata(rdev); switch (micsupp->arizona->type) { - case WM5102: - case WM8997: - case WM8998: - case WM1814: - return arizona_micsupp_sel_to_voltage(selector); - default: - return arizona_micsupp_ext_sel_to_voltage(selector); + case WM5102: + case WM8997: + case WM8998: + case WM1814: + return arizona_micsupp_sel_to_voltage(selector); + default: + return arizona_micsupp_ext_sel_to_voltage(selector); } } @@ -288,7 +288,7 @@ static unsigned int arizona_get_max_micbias(struct arizona *arizona) max_micbias = micbias_mv; } - return (max_micbias * 1000); + return max_micbias * 1000; } static int arizona_micsupp_probe(struct platform_device *pdev) From 6a7cf8b06ce674bd65cf48531f53a05121d72852 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 26 Oct 2015 17:09:06 +0000 Subject: [PATCH 1026/1167] ASoC: arizona: Don't call into wm_adsp driver from arizona driver WM8997 and WM8998 don't have any DSPs so they don't require the wm_adsp driver but do still use the arizona.c shared code. Previously there was code in arizona.c that called wm_adsp_early_event() and we were preventing a build error for WM8997/WM8998 by providing a dummy implementation if the CONFIG_SND_SOC_WM_ADSP was not defined. But this is not compatible with building as modules and leads to a different build error because of the multiple definitions of the function. This patch removes the problem code from arizona.c. Since only WM5102, florida and largo are using that code, and it is only a few lines, it can be moved into the codec drivers. Change-Id: I4a6abb954f2549f408b1cf273b59949f35f33193 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 21 --------------------- sound/soc/codecs/arizona.h | 4 ---- sound/soc/codecs/florida.c | 15 ++++++++++++++- sound/soc/codecs/largo.c | 15 ++++++++++++++- sound/soc/codecs/wm5102.c | 2 +- sound/soc/codecs/wm_adsp.h | 9 --------- 6 files changed, 29 insertions(+), 37 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 468363df054..515541628d0 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -738,27 +738,6 @@ int arizona_mux_event(struct snd_soc_dapm_widget *w, } EXPORT_SYMBOL_GPL(arizona_mux_event); -int arizona_adsp_power_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) -{ - struct snd_soc_codec *codec = w->codec; - struct arizona *arizona = dev_get_drvdata(codec->dev->parent); - unsigned int v ; - int ret; - - ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &v); - if (ret != 0) { - dev_err(codec->dev, - "Failed to read SYSCLK state: %d\n", ret); - return -EIO; - } - - v = (v & ARIZONA_SYSCLK_FREQ_MASK) >> ARIZONA_SYSCLK_FREQ_SHIFT; - - return wm_adsp2_early_event(w, kcontrol, event, v); -} -EXPORT_SYMBOL_GPL(arizona_adsp_power_ev); - static const struct snd_soc_dapm_route arizona_mono_routes[] = { { "OUT1R", NULL, "OUT1L" }, { "OUT2R", NULL, "OUT2L" }, diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 4ef3b0d0100..c9bbce9f38c 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -454,10 +454,6 @@ extern int arizona_init_gpio(struct snd_soc_codec *codec); extern int arizona_init_mono(struct snd_soc_codec *codec); extern int arizona_init_input(struct snd_soc_codec *codec); -extern int arizona_adsp_power_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event); - extern int arizona_init_dai(struct arizona_priv *priv, int dai); int arizona_set_output_mode(struct snd_soc_codec *codec, int output, diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index bf3cfe38640..fef46d0efc5 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -209,6 +209,19 @@ static int florida_adsp_power_ev(struct snd_soc_dapm_widget *w, int event) { struct florida_priv *florida = snd_soc_codec_get_drvdata(w->codec); + struct snd_soc_codec *codec = w->codec; + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + unsigned int v; + int ret; + + ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &v); + if (ret != 0) { + dev_err(codec->dev, + "Failed to read SYSCLK state: %d\n", ret); + return -EIO; + } + + v = (v & ARIZONA_SYSCLK_FREQ_MASK) >> ARIZONA_SYSCLK_FREQ_SHIFT; switch (event) { case SND_SOC_DAPM_PRE_PMU: @@ -222,7 +235,7 @@ static int florida_adsp_power_ev(struct snd_soc_dapm_widget *w, break; } - return arizona_adsp_power_ev(w, kcontrol, event); + return wm_adsp2_early_event(w, kcontrol, event, v); } static const struct reg_sequence florida_no_dre_left_enable[] = { diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index 6062c8156bc..35359323f5f 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -78,6 +78,19 @@ static int largo_adsp_power_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { struct largo_priv *largo = snd_soc_codec_get_drvdata(w->codec); + struct snd_soc_codec *codec = w->codec; + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + unsigned int v; + int ret; + + ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &v); + if (ret != 0) { + dev_err(codec->dev, + "Failed to read SYSCLK state: %d\n", ret); + return -EIO; + } + + v = (v & ARIZONA_SYSCLK_FREQ_MASK) >> ARIZONA_SYSCLK_FREQ_SHIFT; switch (event) { case SND_SOC_DAPM_PRE_PMU: @@ -91,7 +104,7 @@ static int largo_adsp_power_ev(struct snd_soc_dapm_widget *w, break; } - return arizona_adsp_power_ev(w, kcontrol, event); + return wm_adsp2_early_event(w, kcontrol, event, v); } static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 3806de45b2e..230e173a549 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -667,7 +667,7 @@ static int wm5102_adsp_power_ev(struct snd_soc_dapm_widget *w, break; } - return arizona_adsp_power_ev(w, kcontrol, event); + return wm_adsp2_early_event(w, kcontrol, event, v); } static int wm5102_out_comp_coeff_get(struct snd_kcontrol *kcontrol, diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 78286d6cac9..d518a416f79 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -172,18 +172,9 @@ int wm_adsp2_codec_remove(struct wm_adsp *dsp, struct snd_soc_codec *codec); int wm_adsp1_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); -#if defined(CONFIG_SND_SOC_WM_ADSP) int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event, unsigned int freq); -#else -static inline int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event, - unsigned int freq) -{ - return 0; -} -#endif int wm_adsp2_lock(struct wm_adsp *adsp, unsigned int regions); irqreturn_t wm_adsp2_bus_error(struct wm_adsp *adsp); From 05bc92d65d539be2255603cb18aed914b977508f Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 14 Sep 2015 15:22:58 +0100 Subject: [PATCH 1027/1167] mfd: florida: Correct defaults for micbias control registers Change-Id: I95f9d85658d9a4fdbc1e34e624d9acb9550dad11 Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index d7721648d0c..0037b7ae6ac 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -762,9 +762,9 @@ static const struct reg_default florida_reg_default[] = { { 0x00000200, 0x0006 }, /* R512 - Mic Charge Pump 1 */ { 0x00000210, 0x0184 }, /* R528 - LDO1 Control 1 */ { 0x00000213, 0x03E4 }, /* R531 - LDO2 Control 1 */ - { 0x00000218, 0x01A6 }, /* R536 - Mic Bias Ctrl 1 */ - { 0x00000219, 0x01A6 }, /* R537 - Mic Bias Ctrl 2 */ - { 0x0000021A, 0x01A6 }, /* R538 - Mic Bias Ctrl 3 */ + { 0x00000218, 0x00E6 }, /* R536 - Mic Bias Ctrl 1 */ + { 0x00000219, 0x00E6 }, /* R537 - Mic Bias Ctrl 2 */ + { 0x0000021A, 0x00E6 }, /* R538 - Mic Bias Ctrl 3 */ { 0x00000293, 0x0000 }, /* R659 - Accessory Detect Mode 1 */ { 0x0000029B, 0x0028 }, /* R667 - Headphone Detect 1 */ { 0x000002A2, 0x0000 }, /* R674 - Micd clamp control */ From 26229ed7ec3da068f3c1beb5e53b54dfed601a57 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 27 Nov 2015 14:41:40 +0000 Subject: [PATCH 1028/1167] Input: arizona-haptic: Correct disable of haptics device A small copy and paste error was preventing the haptics device being disabled. This patch corrects the value written on disable. Change-Id: I3894a67badafddbc577c2bf87586028cf3c5543f Signed-off-by: Charles Keepax --- drivers/input/misc/arizona-haptics.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/input/misc/arizona-haptics.c b/drivers/input/misc/arizona-haptics.c index c3292522437..1d0328b586d 100644 --- a/drivers/input/misc/arizona-haptics.c +++ b/drivers/input/misc/arizona-haptics.c @@ -113,8 +113,7 @@ static void arizona_haptics_work(struct work_struct *work) ret = regmap_update_bits(arizona->regmap, ARIZONA_HAPTICS_CONTROL_1, - ARIZONA_HAP_CTRL_MASK, - 1 << ARIZONA_HAP_CTRL_SHIFT); + ARIZONA_HAP_CTRL_MASK, 0); if (ret != 0) { dev_err(arizona->dev, "Failed to stop haptics: %d\n", ret); From 7e18d82d5dcf0d5773f55b242e791c3e80297415 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 1 Dec 2015 17:41:54 +0000 Subject: [PATCH 1029/1167] ASoC: arizona: Use mic widget for the HAPTICS widget The HAPTICS widget will have enable_pin/disable_pin called on it, these functions do not work well on siggen widgets because such widgets are always on. This leads to odd behaviour where calling enable_pin on the HAPTICS whilst it is part of a path will not cause the path to power up. Fix this up by using a microphone widget for the siggen. Change-Id: Id27a790b060c6640c98773c1c0d65aed077469ef Signed-off-by: Charles Keepax --- sound/soc/codecs/clearwater.c | 2 +- sound/soc/codecs/florida.c | 2 +- sound/soc/codecs/largo.c | 2 +- sound/soc/codecs/marley.c | 2 +- sound/soc/codecs/moon.c | 2 +- sound/soc/codecs/vegas.c | 2 +- sound/soc/codecs/wm5102.c | 2 +- sound/soc/codecs/wm8997.c | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 8741a13ec7c..2567bd384c2 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -1376,7 +1376,7 @@ SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDDR", 0, 0), SND_SOC_DAPM_SIGGEN("TONE"), SND_SOC_DAPM_SIGGEN("NOISE"), -SND_SOC_DAPM_SIGGEN("HAPTICS"), +SND_SOC_DAPM_MIC("HAPTICS", NULL), SND_SOC_DAPM_INPUT("IN1AL"), SND_SOC_DAPM_INPUT("IN1B"), diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index fef46d0efc5..5889cf571c8 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -1076,7 +1076,7 @@ SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDDR", 0, 0), SND_SOC_DAPM_SIGGEN("TONE"), SND_SOC_DAPM_SIGGEN("NOISE"), -SND_SOC_DAPM_SIGGEN("HAPTICS"), +SND_SOC_DAPM_MIC("HAPTICS", NULL), SND_SOC_DAPM_INPUT("IN1L"), SND_SOC_DAPM_INPUT("IN1R"), diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index 35359323f5f..3ff858fd14c 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -416,7 +416,7 @@ SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDD", 0, 0), SND_SOC_DAPM_SIGGEN("TONE"), SND_SOC_DAPM_SIGGEN("NOISE"), -SND_SOC_DAPM_SIGGEN("HAPTICS"), +SND_SOC_DAPM_MIC("HAPTICS", NULL), SND_SOC_DAPM_INPUT("IN1L"), SND_SOC_DAPM_INPUT("IN1R"), diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index ffe62730d7b..3c4d263e2ce 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -1007,7 +1007,7 @@ SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDD", 0, 0), SND_SOC_DAPM_SIGGEN("TONE"), SND_SOC_DAPM_SIGGEN("NOISE"), -SND_SOC_DAPM_SIGGEN("HAPTICS"), +SND_SOC_DAPM_MIC("HAPTICS", NULL), SND_SOC_DAPM_INPUT("IN1AL"), SND_SOC_DAPM_INPUT("IN1AR"), diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index b7de695d751..19f62c415a5 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -1552,7 +1552,7 @@ SND_SOC_DAPM_PGA("Tone Generator 1", ARIZONA_TONE_GENERATOR_1, SND_SOC_DAPM_PGA("Tone Generator 2", ARIZONA_TONE_GENERATOR_1, ARIZONA_TONE2_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_SIGGEN("HAPTICS"), +SND_SOC_DAPM_MIC("HAPTICS", NULL), SND_SOC_DAPM_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, diff --git a/sound/soc/codecs/vegas.c b/sound/soc/codecs/vegas.c index 61a953fe14b..18fee84e42f 100644 --- a/sound/soc/codecs/vegas.c +++ b/sound/soc/codecs/vegas.c @@ -709,7 +709,7 @@ SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDDL", 0, 0), SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDDR", 0, 0), SND_SOC_DAPM_SIGGEN("TONE"), -SND_SOC_DAPM_SIGGEN("HAPTICS"), +SND_SOC_DAPM_MIC("HAPTICS", NULL), SND_SOC_DAPM_INPUT("IN1AL"), SND_SOC_DAPM_INPUT("IN1AR"), diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 230e173a549..93aa86ae87b 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1125,7 +1125,7 @@ SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDDR", 0, 0), SND_SOC_DAPM_SIGGEN("TONE"), SND_SOC_DAPM_SIGGEN("NOISE"), -SND_SOC_DAPM_SIGGEN("HAPTICS"), +SND_SOC_DAPM_MIC("HAPTICS", NULL), SND_SOC_DAPM_INPUT("IN1L"), SND_SOC_DAPM_INPUT("IN1R"), diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c index 27df9431b35..20b3b44f991 100644 --- a/sound/soc/codecs/wm8997.c +++ b/sound/soc/codecs/wm8997.c @@ -422,7 +422,7 @@ SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDD", 0, 0), SND_SOC_DAPM_SIGGEN("TONE"), SND_SOC_DAPM_SIGGEN("NOISE"), -SND_SOC_DAPM_SIGGEN("HAPTICS"), +SND_SOC_DAPM_MIC("HAPTICS", NULL), SND_SOC_DAPM_INPUT("IN1L"), SND_SOC_DAPM_INPUT("IN1R"), From bf1ed9aad87e31ff6e3f616930f0c000f128972b Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 25 Nov 2015 10:00:34 +0000 Subject: [PATCH 1030/1167] ASoC: arizona: Add 32uS delay after putting FLL into freerun When switching between two clock sources using the FLL freerun to smooth the transition we should wait 32uS after putting the FLL into freerun before we proceed. In practice we appear to be getting enough delay from the surrounding code, but better to make it explicit. Change-Id: I80f797749c2c8d7903db8088518807c8ef0d32ba Signed-off-by: Charles Keepax Signed-off-by: Simon Trimmer --- sound/soc/codecs/arizona.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 515541628d0..52598884d3f 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -4648,6 +4648,7 @@ static int arizona_enable_fll(struct arizona_fll *fll) ARIZONA_FLL1_GAIN_MASK, 0); regmap_update_bits(fll->arizona->regmap, fll->base + 1, ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN); + udelay(32); } /* From 82e2e823fad2433cf8efd08482db20b1a16a5382 Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Fri, 25 Sep 2015 13:41:30 +0100 Subject: [PATCH 1031/1167] ASoC: arizona: marley revA1 should use moon FLL scheme Change-Id: Ib043c7ef4f8fea3c280bbf91dd2ad1f8d44c8bec Signed-off-by: Piotr Stankiewicz --- sound/soc/codecs/arizona.c | 26 ++++++++++++++++++++++---- 1 file changed, 22 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 52598884d3f..b3792f8258d 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -4297,8 +4297,12 @@ static int arizona_find_fratio(struct arizona_fll *fll, unsigned int fref, case WM1840: case WM1831: case CS47L24: - case CS47L35: break; + case CS47L35: + /* rev A0 is like Clearwater, so break */ + if (fll->arizona->rev == 0) + break; + /* rev A1 works similar to Moon, so fall through to default */ default: if (!sync) { ratio = 1; @@ -4366,7 +4370,6 @@ static int arizona_calc_fratio(struct arizona_fll *fll, case WM1840: case WM1831: case CS47L24: - case CS47L35: if (fref == 11289600 && fvco == 90316800) { if (!sync) cfg->fratio = init_ratio - 1; @@ -4376,6 +4379,19 @@ static int arizona_calc_fratio(struct arizona_fll *fll, if (sync) return init_ratio; break; + case CS47L35: + if (fll->arizona->rev == 0) { + if (fref == 11289600 && fvco == 90316800) { + if (!sync) + cfg->fratio = init_ratio - 1; + return init_ratio; + } + + if (sync) + return init_ratio; + break; + } + return init_ratio; default: return init_ratio; } @@ -4492,7 +4508,6 @@ static int arizona_calc_fll(struct arizona_fll *fll, case WM1840: case WM1831: case CS47L24: - case CS47L35: for (i = 0; i < size_fll_gain; i++) { if (fll_gain[i].min <= fref && fref <= fll_gain[i].max) { @@ -4729,8 +4744,11 @@ static int arizona_enable_fll(struct arizona_fll *fll) case WM1840: case WM1831: case CS47L24: - case CS47L35: break; + case CS47L35: + if (fll->arizona->rev == 0) + break; + /* for rev A1 fall through */ default: if ((!use_sync) && (ref_cfg->theta == 0)) regmap_update_bits_check(arizona->regmap, From 7857b05f7b5de61e9d4ed6777d76c7fbe4a2a555 Mon Sep 17 00:00:00 2001 From: Nikesh Oswal Date: Tue, 29 Dec 2015 12:22:29 +0000 Subject: [PATCH 1032/1167] mfd: moon: modify the regmap patch modify the regmap patch as per the instructions from hardware team Change-Id: Iad26752a2fde32d495844d85ea79018f4802ea2e Signed-off-by: Nikesh Oswal --- drivers/mfd/moon-tables.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/mfd/moon-tables.c b/drivers/mfd/moon-tables.c index b6a180069c4..0977e51eaad 100644 --- a/drivers/mfd/moon-tables.c +++ b/drivers/mfd/moon-tables.c @@ -21,8 +21,7 @@ static const struct reg_default moon_reva_16_patch[] = { { 0x8A, 0x5555 }, { 0x8A, 0xAAAA }, - { 0x4CF, 0x0730 }, - { 0x3A2, 0x2438 }, + { 0x4CF, 0x0700 }, { 0x171, 0x0003 }, { 0x101, 0x0444 }, { 0x159, 0x0002 }, @@ -33,7 +32,12 @@ static const struct reg_default moon_reva_16_patch[] = { { 0x120, 0x0404 }, { 0x101, 0x0404 }, { 0x171, 0x0002 }, + { 0x17A, 0x2906 }, + { 0x19A, 0x2906 }, { 0x441, 0xC750 }, + { 0x340, 0x0001 }, + { 0x112, 0x0405 }, + { 0x124, 0x0C49 }, { 0x1300, 0x050E }, { 0x1302, 0x0101 }, { 0x1380, 0x0425 }, @@ -44,8 +48,6 @@ static const struct reg_default moon_reva_16_patch[] = { { 0x1391, 0xF6CA }, { 0x1392, 0x0637 }, { 0x1393, 0xFEC8 }, - { 0x17A, 0x2906 }, - { 0x19A, 0x2906 }, { 0x8A, 0xCCCC }, { 0x8A, 0x3333 }, }; @@ -212,7 +214,7 @@ static const struct reg_default moon_reg_default[] = { { 0x00000102, 0x0011 }, /* R258 (0x102) - Sample rate 1 */ { 0x00000103, 0x0011 }, /* R259 (0x103) - Sample rate 2 */ { 0x00000104, 0x0011 }, /* R260 (0x104) - Sample rate 3 */ - { 0x00000112, 0x0305 }, /* R274 (0x112) - Async clock 1 */ + { 0x00000112, 0x0405 }, /* R274 (0x112) - Async clock 1 */ { 0x00000113, 0x0011 }, /* R275 (0x113) - Async sample rate 1 */ { 0x00000114, 0x0011 }, /* R276 (0x114) - Async sample rate 2 */ { 0x00000120, 0x0404 }, From 6045cf1918e3e4a12e046ba17522cd9cd96ef1d8 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 10 Apr 2015 15:06:16 +0100 Subject: [PATCH 1033/1167] ASoC: wm_adsp: Simplify firmware names We don't really need all the individual firmwares to be defined almost all customers use the custom naming functionality. Replace them with a few more generic names. Change-Id: I3856a9cd97101203fdf351112f340ffb82ee446f Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 99 ++++++++++++++------------------------ 1 file changed, 36 insertions(+), 63 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index ed619f1f5b4..56d7b9dbd0b 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -253,50 +253,32 @@ static void wm_adsp_buf_free(struct list_head *list) /* Must remain a power of two */ #define WM_ADSP_CAPTURE_BUFFER_SIZE 1048576 -#define WM_ADSP_FW_MBC_VSS 0 -#define WM_ADSP_FW_TX 1 -#define WM_ADSP_FW_TX_SPK 2 -#define WM_ADSP_FW_RX_ANC 3 -#define WM_ADSP_FW_EZ2CONTROL 4 -#define WM_ADSP_FW_TRACE 5 -#define WM_ADSP_FW_EDAC 6 -#define WM_ADSP_FW_EZ2LISTEN_SP 7 -#define WM_ADSP_FW_EZ2LISTEN_HP 8 -#define WM_ADSP_FW_EZ2HEAR_SP_TX 9 -#define WM_ADSP_FW_EZ2HEAR_HS_TX 10 -#define WM_ADSP_FW_EZ2HEAR_RX 11 -#define WM_ADSP_FW_EZ2FACETALK_TX 12 -#define WM_ADSP_FW_EZ2FACETALK_RX 13 -#define WM_ADSP_FW_EZ2GROUPTALK_TX 14 -#define WM_ADSP_FW_EZ2GROUPTALK_RX 15 -#define WM_ADSP_FW_EZ2RECORD 16 -#define WM_ADSP_FW_ASR_ASSIST 17 -#define WM_ADSP_FW_MASTERHIFI 18 -#define WM_ADSP_FW_SPEAKERPROTECT 19 - -#define WM_ADSP_NUM_FW 20 +#define WM_ADSP_FW_MBC_VSS 0 +#define WM_ADSP_FW_HIFI 1 +#define WM_ADSP_FW_TX 2 +#define WM_ADSP_FW_TX_SPK 3 +#define WM_ADSP_FW_RX 4 +#define WM_ADSP_FW_RX_ANC 5 +#define WM_ADSP_FW_CTRL 6 +#define WM_ADSP_FW_ASR 7 +#define WM_ADSP_FW_TRACE 8 +#define WM_ADSP_FW_SPK_PROT 9 +#define WM_ADSP_FW_MISC 10 + +#define WM_ADSP_NUM_FW 11 static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { - [WM_ADSP_FW_MBC_VSS] = "MBC/VSS", - [WM_ADSP_FW_TX] = "Tx", - [WM_ADSP_FW_TX_SPK] = "Tx Speaker", - [WM_ADSP_FW_RX_ANC] = "Rx ANC", - [WM_ADSP_FW_EZ2CONTROL] = "Ez2Control", - [WM_ADSP_FW_TRACE] = "Trace", - [WM_ADSP_FW_EDAC] = "EDAC", - [WM_ADSP_FW_EZ2LISTEN_SP] = "Ez2Listen SP", - [WM_ADSP_FW_EZ2LISTEN_HP] = "Ez2Listen HP", - [WM_ADSP_FW_EZ2HEAR_SP_TX] = "Ez2HearSP Tx", - [WM_ADSP_FW_EZ2HEAR_HS_TX] = "Ez2HearHS Tx", - [WM_ADSP_FW_EZ2HEAR_RX] = "Ez2Hear Rx", - [WM_ADSP_FW_EZ2FACETALK_TX] = "Ez2FaceTalk Tx", - [WM_ADSP_FW_EZ2FACETALK_RX] = "Ez2FaceTalk Rx", - [WM_ADSP_FW_EZ2GROUPTALK_TX] = "Ez2GroupTalk Tx", - [WM_ADSP_FW_EZ2GROUPTALK_RX] = "Ez2GroupTalk Rx", - [WM_ADSP_FW_EZ2RECORD] = "Ez2Record", - [WM_ADSP_FW_ASR_ASSIST] = "ASR Assist", - [WM_ADSP_FW_MASTERHIFI] = "MasterHiFi", - [WM_ADSP_FW_SPEAKERPROTECT] = "Speaker Protect", + [WM_ADSP_FW_MBC_VSS] = "MBC/VSS", + [WM_ADSP_FW_HIFI] = "MasterHiFi", + [WM_ADSP_FW_TX] = "Tx", + [WM_ADSP_FW_TX_SPK] = "Tx Speaker", + [WM_ADSP_FW_RX] = "Rx", + [WM_ADSP_FW_RX_ANC] = "Rx ANC", + [WM_ADSP_FW_CTRL] = "Voice Ctrl", + [WM_ADSP_FW_ASR] = "ASR Assist", + [WM_ADSP_FW_TRACE] = "Dbg Trace", + [WM_ADSP_FW_SPK_PROT] = "Protection", + [WM_ADSP_FW_MISC] = "Misc", }; struct wm_adsp_system_config_xm_hdr { @@ -431,36 +413,27 @@ static struct wm_adsp_fw_caps trace_caps[] = { }; static struct wm_adsp_fw_defs wm_adsp_fw[WM_ADSP_NUM_FW] = { - [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" }, - [WM_ADSP_FW_TX] = { .file = "tx" }, - [WM_ADSP_FW_TX_SPK] = { .file = "tx-spk" }, - [WM_ADSP_FW_RX_ANC] = { .file = "rx-anc" }, - [WM_ADSP_FW_EZ2CONTROL] = { - .file = "ez2-control", + [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" }, + [WM_ADSP_FW_HIFI] = { .file = "hifi" }, + [WM_ADSP_FW_TX] = { .file = "tx" }, + [WM_ADSP_FW_TX_SPK] = { .file = "tx-spk" }, + [WM_ADSP_FW_RX] = { .file = "rx" }, + [WM_ADSP_FW_RX_ANC] = { .file = "rx-anc" }, + [WM_ADSP_FW_CTRL] = { + .file = "ctrl", .compr_direction = SND_COMPRESS_CAPTURE, .num_caps = ARRAY_SIZE(ez2control_caps), .caps = ez2control_caps, }, - [WM_ADSP_FW_TRACE] = { + [WM_ADSP_FW_ASR] = { .file = "asr" }, + [WM_ADSP_FW_TRACE] = { .file = "trace", .compr_direction = SND_COMPRESS_CAPTURE, .num_caps = ARRAY_SIZE(trace_caps), .caps = trace_caps, }, - [WM_ADSP_FW_EDAC] = { .file = "edac" }, - [WM_ADSP_FW_EZ2LISTEN_SP] = { .file = "ez2listen-sp" }, - [WM_ADSP_FW_EZ2LISTEN_HP] = { .file = "ez2listen-hp" }, - [WM_ADSP_FW_EZ2HEAR_SP_TX] = { .file = "ez2hear-sp-tx" }, - [WM_ADSP_FW_EZ2HEAR_HS_TX] = { .file = "ez2hear-hs-tx" }, - [WM_ADSP_FW_EZ2HEAR_RX] = { .file = "ez2hear-rx" }, - [WM_ADSP_FW_EZ2FACETALK_TX] = { .file = "ez2facetalk-tx" }, - [WM_ADSP_FW_EZ2FACETALK_RX] = { .file = "ez2facetalk-rx" }, - [WM_ADSP_FW_EZ2GROUPTALK_TX] = { .file = "ez2grouptalk-tx" }, - [WM_ADSP_FW_EZ2GROUPTALK_RX] = { .file = "ez2grouptalk-rx" }, - [WM_ADSP_FW_EZ2RECORD] = { .file = "ez2record" }, - [WM_ADSP_FW_ASR_ASSIST] = { .file = "asr-assist" }, - [WM_ADSP_FW_MASTERHIFI] = { .file = "masterhifi" }, - [WM_ADSP_FW_SPEAKERPROTECT] = { .file = "speaker-protect" }, + [WM_ADSP_FW_SPK_PROT] = { .file = "spk-prot" }, + [WM_ADSP_FW_MISC] = { .file = "misc" }, }; struct wm_coeff_ctl_ops { From 3c248e7096af73f3e3c3baf3bc3432877dd672a6 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 3 Nov 2015 14:07:09 +0000 Subject: [PATCH 1034/1167] extcon: arizona: Remove enable/disable of 32k clock The 32k clock is unconditionally enabled by the MFD core so there is no need to control it from the Extcon device. Change-Id: I01eb02436e3dc4b19d555522a5fd6f8bcc449bf6 Signed-off-by: Charles Keepax --- drivers/extcon/extcon-arizona.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index 016e00f2c5b..cff90e27cbb 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -1756,8 +1756,6 @@ static int arizona_extcon_probe(struct platform_device *pdev) goto err_micdet; } - arizona_clk32k_enable(arizona); - switch (arizona->type) { case WM8997: case WM5102: @@ -1868,7 +1866,6 @@ static int arizona_extcon_remove(struct platform_device *pdev) cancel_delayed_work_sync(&info->hpdet_work); regmap_update_bits(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, ARIZONA_JD1_ENA, 0); - arizona_clk32k_disable(arizona); device_remove_file(&pdev->dev, &dev_attr_hp_impedance); extcon_dev_unregister(&info->edev); From 75d05bb3c6d8e12e16f25c383fddd9843686af50 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 23 Nov 2015 15:10:19 +0000 Subject: [PATCH 1035/1167] switch: arizona: Remove enable/disable of 32k clock The 32k clock is unconditionally enabled by the MFD core so there is no need to control it from the Extcon device. Change-Id: Ib97338ec56be79c33051b5eb7b2e8fbf33267d95 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index d373b42e224..f75f2b51b8d 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -3566,8 +3566,6 @@ static int arizona_extcon_probe(struct platform_device *pdev) goto err_micdet; } - arizona_clk32k_enable(arizona); - switch (arizona->type) { case WM5102: case WM5110: @@ -3689,7 +3687,6 @@ static int arizona_extcon_remove(struct platform_device *pdev) input_unregister_device(info->input); regmap_update_bits(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, ARIZONA_JD1_ENA | ARIZONA_JD2_ENA, 0); - arizona_clk32k_disable(arizona); device_remove_file(&pdev->dev, &dev_attr_hp_impedance); device_remove_file(&pdev->dev, &dev_attr_mic_impedance); From 77736aa5abbe80fcba6749d409891d09e458a6a9 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 15 Jan 2015 10:31:29 +0000 Subject: [PATCH 1036/1167] ASoC: wm_adsp: factor out setup of host buffer info Separate the setup of the firmware host buffer header from the compressed stream start. Change-Id: I1b350d69dcd3136de2c4f8cc2852b68e9668bcb0 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 128 +++++++++++++++++++++---------------- sound/soc/codecs/wm_adsp.h | 10 ++- 2 files changed, 81 insertions(+), 57 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 56d7b9dbd0b..e8dcc5938fe 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3083,14 +3083,17 @@ static inline int wm_adsp_host_buffer_read(struct wm_adsp *dsp, unsigned int field_offset, u32 *data) { return wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, - dsp->host_buf_ptr + field_offset, data); + dsp->host_buf_info.host_buf_ptr + + field_offset, + data); } static inline int wm_adsp_host_buffer_write(struct wm_adsp *dsp, unsigned int field_offset, u32 data) { return wm_adsp_write_data_word(dsp, WMFW_ADSP2_XM, - dsp->host_buf_ptr + field_offset, + dsp->host_buf_info.host_buf_ptr + + field_offset, data); } @@ -3103,7 +3106,7 @@ static int wm_adsp_populate_buffer_regions(struct wm_adsp *dsp) struct wm_adsp_buffer_region *region; for (i = 0; i < dsp->firmwares[dsp->fw].caps->num_host_regions; ++i) { - region = &dsp->host_regions[i]; + region = &dsp->host_buf_info.host_regions[i]; region->offset = offset; region->mem_type = host_region_defs[i].mem_type; @@ -3131,6 +3134,52 @@ static int wm_adsp_populate_buffer_regions(struct wm_adsp *dsp) return 0; } +static int wm_adsp_init_host_buf_info(struct wm_adsp *dsp) +{ + u32 xm_base, magic; + int i, ret; + + dsp->host_buf_info.error = 0; + + ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, + ADSP2_SYSTEM_CONFIG_XM_PTR, &xm_base); + if (ret < 0) + return ret; + + ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, + xm_base + WM_ADSP_ALG_XM_PTR + + ALG_XM_FIELD(magic), + &magic); + if (ret < 0) + return ret; + + if (magic != WM_ADSP_ALG_XM_STRUCT_MAGIC) + return -EINVAL; + + for (i = 0; i < 5; ++i) { + ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, + xm_base + WM_ADSP_ALG_XM_PTR + + ALG_XM_FIELD(host_buf_ptr), + &dsp->host_buf_info.host_buf_ptr); + if (ret < 0) + return ret; + + if (dsp->host_buf_info.host_buf_ptr) + break; + + msleep(1); + } + + if (!dsp->host_buf_info.host_buf_ptr) + return -EIO; + + ret = wm_adsp_populate_buffer_regions(dsp); + if (ret < 0) + return ret; + + return 0; +} + static int wm_adsp_read_buffer(struct wm_adsp *dsp, int32_t read_index, int avail) { @@ -3141,6 +3190,8 @@ static int wm_adsp_read_buffer(struct wm_adsp *dsp, int32_t read_index, u8 *capt_buf = (u8 *)dsp->capt_buf.buf; int capt_buf_h = dsp->capt_buf.head; int capt_buf_mask = dsp->capt_buf_size - 1; + struct wm_adsp_buffer_region *host_regions = + dsp->host_buf_info.host_regions; int mem_type; unsigned int adsp_addr; int num_words; @@ -3148,17 +3199,17 @@ static int wm_adsp_read_buffer(struct wm_adsp *dsp, int32_t read_index, /* Calculate read parameters */ for (i = 0; i < dsp->firmwares[dsp->fw].caps->num_host_regions; ++i) { - if (read_index < dsp->host_regions[i].cumulative_size) + if (read_index < host_regions[i].cumulative_size) break; } if (i == dsp->firmwares[dsp->fw].caps->num_host_regions) return -EINVAL; - num_words = dsp->host_regions[i].cumulative_size - read_index; - mem_type = dsp->host_regions[i].mem_type; - adsp_addr = dsp->host_regions[i].base_addr + - (read_index - dsp->host_regions[i].offset); + num_words = host_regions[i].cumulative_size - read_index; + mem_type = host_regions[i].mem_type; + adsp_addr = host_regions[i].base_addr + + (read_index - host_regions[i].offset); if (circ_space_words < num_words) num_words = circ_space_words; @@ -3195,8 +3246,10 @@ static int wm_adsp_read_buffer(struct wm_adsp *dsp, int32_t read_index, static int wm_adsp_capture_block(struct wm_adsp *dsp, int *avail) { + struct wm_adsp_buffer_region *host_regions = + dsp->host_buf_info.host_regions; int last_region = dsp->firmwares[dsp->fw].caps->num_host_regions - 1; - int host_size = dsp->host_regions[last_region].cumulative_size; + int host_size = host_regions[last_region].cumulative_size; int num_words; u32 next_read_index, next_write_index; int32_t write_index, read_index; @@ -3249,8 +3302,6 @@ int wm_adsp_stream_alloc(struct wm_adsp *dsp, int ret; unsigned int size; - dsp->dsp_error = 0; - if (!dsp->capt_buf.buf) { dsp->capt_buf_size = WM_ADSP_CAPTURE_BUFFER_SIZE; dsp->capt_buf.buf = vmalloc(dsp->capt_buf_size); @@ -3272,12 +3323,12 @@ int wm_adsp_stream_alloc(struct wm_adsp *dsp, } } - if (!dsp->host_regions) { + if (!dsp->host_buf_info.host_regions) { size = dsp->firmwares[dsp->fw].caps->num_host_regions * - sizeof(*dsp->host_regions); - dsp->host_regions = kzalloc(size, GFP_KERNEL); + sizeof(*dsp->host_buf_info.host_regions); + dsp->host_buf_info.host_regions = kzalloc(size, GFP_KERNEL); - if (!dsp->host_regions) { + if (!dsp->host_buf_info.host_regions) { ret = -ENOMEM; goto err_raw_capt_buf; } @@ -3306,8 +3357,8 @@ EXPORT_SYMBOL_GPL(wm_adsp_stream_alloc); int wm_adsp_stream_free(struct wm_adsp *dsp) { - kfree(dsp->host_regions); - dsp->host_regions = NULL; + kfree(dsp->host_buf_info.host_regions); + dsp->host_buf_info.host_regions = NULL; kfree(dsp->raw_capt_buf); dsp->raw_capt_buf = NULL; @@ -3323,45 +3374,13 @@ EXPORT_SYMBOL_GPL(wm_adsp_stream_free); int wm_adsp_stream_start(struct wm_adsp *dsp) { - u32 xm_base, magic; - int i, ret; - - ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, - ADSP2_SYSTEM_CONFIG_XM_PTR, &xm_base); - if (ret < 0) - return ret; + int ret; - ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, - xm_base + WM_ADSP_ALG_XM_PTR + - ALG_XM_FIELD(magic), - &magic); + ret = wm_adsp_init_host_buf_info(dsp); if (ret < 0) return ret; - if (magic != WM_ADSP_ALG_XM_STRUCT_MAGIC) - return -EINVAL; - - for (i = 0; i < 5; ++i) { - ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, - xm_base + WM_ADSP_ALG_XM_PTR + - ALG_XM_FIELD(host_buf_ptr), - &dsp->host_buf_ptr); - if (ret < 0) - return ret; - - if (dsp->host_buf_ptr) - break; - - msleep(1); - } - - if (!dsp->host_buf_ptr) - return -EIO; - dsp->max_dsp_read_bytes = WM_ADSP_MAX_READ_SIZE * sizeof(u32); - ret = wm_adsp_populate_buffer_regions(dsp); - if (ret < 0) - return ret; ret = wm_adsp_host_buffer_write(dsp, HOST_BUFFER_FIELD(high_water_mark), @@ -3429,11 +3448,12 @@ int wm_adsp_stream_handle_irq(struct wm_adsp *dsp) ret = wm_adsp_host_buffer_read(dsp, HOST_BUFFER_FIELD(error), - &dsp->dsp_error); + &dsp->host_buf_info.error); if (ret < 0) return ret; - if (dsp->dsp_error != 0) { - adsp_err(dsp, "DSP error occurred: %d\n", dsp->dsp_error); + if (dsp->host_buf_info.error != 0) { + adsp_err(dsp, "DSP error occurred: %d\n", + dsp->host_buf_info.error); return -EIO; } diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index d518a416f79..a9b7126a69f 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -83,6 +83,12 @@ struct wm_adsp_fw_features { bool ez2control_trigger:1; }; +struct wm_adsp_host_buf_info { + struct wm_adsp_buffer_region *host_regions; + u32 host_buf_ptr; + u32 error; +}; + struct wm_adsp { const char *part; char part_rev; @@ -118,15 +124,13 @@ struct wm_adsp { struct mutex ctl_lock; struct list_head ctl_list; - u32 host_buf_ptr; + struct wm_adsp_host_buf_info host_buf_info; int max_dsp_read_bytes; - u32 dsp_error; u32 *raw_capt_buf; struct circ_buf capt_buf; int capt_buf_size; u32 capt_watermark; - struct wm_adsp_buffer_region *host_regions; bool buffer_drain_pending; int num_firmwares; From cd055fe9bcb968cf2226143c8685858b1e7a3294 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 30 Oct 2015 13:14:53 +0000 Subject: [PATCH 1037/1167] ASoC: wm_adsp: protect host_buf_info with a mutex Preparing for future changes by protecting access to the host_buf_info with a mutex. Change-Id: Ibbb4c33d7cb2fd6905da7f0b7465630f4d745ec6 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 109 ++++++++++++++++++++++++++++--------- sound/soc/codecs/wm_adsp.h | 1 + 2 files changed, 84 insertions(+), 26 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index e8dcc5938fe..53950bbf0b1 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2933,6 +2933,7 @@ int wm_adsp2_init(struct wm_adsp *dsp, struct mutex *fw_lock) INIT_WORK(&dsp->boot_work, wm_adsp2_boot_work); mutex_init(&dsp->ctl_lock); mutex_init(&dsp->rate_lock); + mutex_init(&dsp->host_buf_info.lock); dsp->fw_lock = fw_lock; @@ -3082,6 +3083,8 @@ static int wm_adsp_write_data_word(struct wm_adsp *dsp, int mem_type, static inline int wm_adsp_host_buffer_read(struct wm_adsp *dsp, unsigned int field_offset, u32 *data) { + lockdep_assert_held(&dsp->host_buf_info.lock); + return wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, dsp->host_buf_info.host_buf_ptr + field_offset, @@ -3091,6 +3094,8 @@ static inline int wm_adsp_host_buffer_read(struct wm_adsp *dsp, static inline int wm_adsp_host_buffer_write(struct wm_adsp *dsp, unsigned int field_offset, u32 data) { + lockdep_assert_held(&dsp->host_buf_info.lock); + return wm_adsp_write_data_word(dsp, WMFW_ADSP2_XM, dsp->host_buf_info.host_buf_ptr + field_offset, @@ -3105,6 +3110,8 @@ static int wm_adsp_populate_buffer_regions(struct wm_adsp *dsp) dsp->firmwares[dsp->fw].caps->host_region_defs; struct wm_adsp_buffer_region *region; + lockdep_assert_held(&dsp->host_buf_info.lock); + for (i = 0; i < dsp->firmwares[dsp->fw].caps->num_host_regions; ++i) { region = &dsp->host_buf_info.host_regions[i]; @@ -3139,8 +3146,6 @@ static int wm_adsp_init_host_buf_info(struct wm_adsp *dsp) u32 xm_base, magic; int i, ret; - dsp->host_buf_info.error = 0; - ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, ADSP2_SYSTEM_CONFIG_XM_PTR, &xm_base); if (ret < 0) @@ -3156,13 +3161,17 @@ static int wm_adsp_init_host_buf_info(struct wm_adsp *dsp) if (magic != WM_ADSP_ALG_XM_STRUCT_MAGIC) return -EINVAL; + mutex_lock(&dsp->host_buf_info.lock); + + dsp->host_buf_info.error = 0; + for (i = 0; i < 5; ++i) { ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, xm_base + WM_ADSP_ALG_XM_PTR + ALG_XM_FIELD(host_buf_ptr), &dsp->host_buf_info.host_buf_ptr); if (ret < 0) - return ret; + goto out; if (dsp->host_buf_info.host_buf_ptr) break; @@ -3170,14 +3179,16 @@ static int wm_adsp_init_host_buf_info(struct wm_adsp *dsp) msleep(1); } - if (!dsp->host_buf_info.host_buf_ptr) - return -EIO; + if (!dsp->host_buf_info.host_buf_ptr) { + ret = -EIO; + goto out; + } ret = wm_adsp_populate_buffer_regions(dsp); - if (ret < 0) - return ret; +out: + mutex_unlock(&dsp->host_buf_info.lock); - return 0; + return ret; } static int wm_adsp_read_buffer(struct wm_adsp *dsp, int32_t read_index, @@ -3197,6 +3208,8 @@ static int wm_adsp_read_buffer(struct wm_adsp *dsp, int32_t read_index, int num_words; int i, ret; + lockdep_assert_held(&dsp->host_buf_info.lock); + /* Calculate read parameters */ for (i = 0; i < dsp->firmwares[dsp->fw].caps->num_host_regions; ++i) { if (read_index < host_regions[i].cumulative_size) @@ -3240,14 +3253,13 @@ static int wm_adsp_read_buffer(struct wm_adsp *dsp, int32_t read_index, } dsp->capt_buf.head = capt_buf_h; - return num_words; } static int wm_adsp_capture_block(struct wm_adsp *dsp, int *avail) { - struct wm_adsp_buffer_region *host_regions = - dsp->host_buf_info.host_regions; + const struct wm_adsp_buffer_region *host_regions = + dsp->host_buf_info.host_regions; int last_region = dsp->firmwares[dsp->fw].caps->num_host_regions - 1; int host_size = host_regions[last_region].cumulative_size; int num_words; @@ -3255,12 +3267,15 @@ static int wm_adsp_capture_block(struct wm_adsp *dsp, int *avail) int32_t write_index, read_index; int ret; + lockdep_assert_held(&dsp->host_buf_info.lock); + /* Get current host buffer status */ ret = wm_adsp_host_buffer_read(dsp, HOST_BUFFER_FIELD(next_read_index), &next_read_index); if (ret < 0) return ret; + ret = wm_adsp_host_buffer_read(dsp, HOST_BUFFER_FIELD(next_write_index), &next_write_index); @@ -3323,17 +3338,23 @@ int wm_adsp_stream_alloc(struct wm_adsp *dsp, } } + mutex_lock(&dsp->host_buf_info.lock); + + ret = 0; if (!dsp->host_buf_info.host_regions) { size = dsp->firmwares[dsp->fw].caps->num_host_regions * sizeof(*dsp->host_buf_info.host_regions); dsp->host_buf_info.host_regions = kzalloc(size, GFP_KERNEL); - if (!dsp->host_buf_info.host_regions) { + if (!dsp->host_buf_info.host_regions) ret = -ENOMEM; - goto err_raw_capt_buf; - } } + mutex_unlock(&dsp->host_buf_info.lock); + + if (ret != 0) + goto err_raw_capt_buf; + size = params->buffer.fragment_size; if (size == 0) { dsp->capt_watermark = WM_ADSP_DEFAULT_WATERMARK; @@ -3357,9 +3378,17 @@ EXPORT_SYMBOL_GPL(wm_adsp_stream_alloc); int wm_adsp_stream_free(struct wm_adsp *dsp) { - kfree(dsp->host_buf_info.host_regions); + struct wm_adsp_buffer_region *host_regions; + + mutex_lock(&dsp->host_buf_info.lock); + + host_regions = dsp->host_buf_info.host_regions; dsp->host_buf_info.host_regions = NULL; + mutex_unlock(&dsp->host_buf_info.lock); + + kfree(host_regions); + kfree(dsp->raw_capt_buf); dsp->raw_capt_buf = NULL; @@ -3376,9 +3405,11 @@ int wm_adsp_stream_start(struct wm_adsp *dsp) { int ret; + mutex_lock(&dsp->host_buf_info.lock); + ret = wm_adsp_init_host_buf_info(dsp); if (ret < 0) - return ret; + goto out_unlock; dsp->max_dsp_read_bytes = WM_ADSP_MAX_READ_SIZE * sizeof(u32); @@ -3386,11 +3417,14 @@ int wm_adsp_stream_start(struct wm_adsp *dsp) HOST_BUFFER_FIELD(high_water_mark), dsp->capt_watermark); if (ret < 0) - return ret; + goto out_unlock; adsp_dbg(dsp, "Set watermark to %u\n", dsp->capt_watermark); - return 0; +out_unlock: + mutex_unlock(&dsp->host_buf_info.lock); + + return ret; } EXPORT_SYMBOL_GPL(wm_adsp_stream_start); @@ -3403,6 +3437,11 @@ static int wm_adsp_stream_capture(struct wm_adsp *dsp) dsp->buffer_drain_pending = false; + lockdep_assert_held(&dsp->host_buf_info.lock); + + if (!dsp->host_buf_info.host_regions) + return -EIO; + do { amount_read = 0; do { @@ -3427,6 +3466,8 @@ static int wm_adsp_ack_buffer_interrupt(struct wm_adsp *dsp) u32 irq_ack; int ret; + lockdep_assert_held(&dsp->host_buf_info.lock); + ret = wm_adsp_host_buffer_read(dsp, HOST_BUFFER_FIELD(irq_count), &irq_ack); @@ -3444,28 +3485,39 @@ static int wm_adsp_ack_buffer_interrupt(struct wm_adsp *dsp) int wm_adsp_stream_handle_irq(struct wm_adsp *dsp) { - int ret, bytes_captured; + int ret, bytes_captured = 0; + + mutex_lock(&dsp->host_buf_info.lock); ret = wm_adsp_host_buffer_read(dsp, HOST_BUFFER_FIELD(error), &dsp->host_buf_info.error); if (ret < 0) return ret; + if (dsp->host_buf_info.error != 0) { adsp_err(dsp, "DSP error occurred: %d\n", dsp->host_buf_info.error); - return -EIO; + ret = -EIO; + goto out_unlock; } bytes_captured = wm_adsp_stream_capture(dsp); - if (bytes_captured < 0) - return bytes_captured; + if (bytes_captured < 0) { + ret = bytes_captured; + goto out_unlock; + } ret = wm_adsp_ack_buffer_interrupt(dsp); if (ret < 0) - return ret; + goto out_unlock; + + ret = bytes_captured; + +out_unlock: + mutex_unlock(&dsp->host_buf_info.lock); - return bytes_captured; + return ret; } EXPORT_SYMBOL_GPL(wm_adsp_stream_handle_irq); @@ -3511,9 +3563,14 @@ int wm_adsp_stream_read(struct wm_adsp *dsp, char __user *buf, size_t count) dsp->capt_buf.tail &= dsp->capt_buf_size - 1; if (dsp->buffer_drain_pending) { - wm_adsp_stream_capture(dsp); + mutex_lock(&dsp->host_buf_info.lock); + + ret = wm_adsp_stream_capture(dsp); + if (ret >= 0) + ret = wm_adsp_ack_buffer_interrupt(dsp); + + mutex_unlock(&dsp->host_buf_info.lock); - ret = wm_adsp_ack_buffer_interrupt(dsp); if (ret < 0) return ret; } diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index a9b7126a69f..274b6de6167 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -84,6 +84,7 @@ struct wm_adsp_fw_features { }; struct wm_adsp_host_buf_info { + struct mutex lock; struct wm_adsp_buffer_region *host_regions; u32 host_buf_ptr; u32 error; From 56944ce1d3b530703ff8d11c51cb01f9a42f4a31 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 15 Jan 2015 10:56:36 +0000 Subject: [PATCH 1038/1167] ASoC: wm_adsp: init host buffer struct when fw is loaded If the firmware has a host transfer buffer, initialize our view of it when the firmware is loaded instead of waiting until a data stream is opened. This allows us to check the firmware status without needing a compressed stream open. The host_buffer_info is invalidated if the DSP is powered down, since it's possible to power-down the DSP while the compressed stream is still active (for example if the audio input is disconnected.) Change-Id: I0f8821f046b354bd510f8b72e091f542f1d28016 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 107 +++++++++++++++++++++++++------------ sound/soc/codecs/wm_adsp.h | 1 + 2 files changed, 75 insertions(+), 33 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 53950bbf0b1..e7575947c9d 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -213,6 +213,9 @@ #define ADSP2_LOCK_REGION_SHIFT 16 +static int wm_adsp_init_host_buf_info(struct wm_adsp *dsp); +static void wm_adsp_free_host_buf_info(struct wm_adsp *dsp); + struct wm_adsp_buf { struct list_head list; void *buf; @@ -2291,7 +2294,17 @@ static int wm_adsp_get_features(struct wm_adsp *dsp) case 0x8000d: case 0x80053: case 0x9000d: + /* ez2control */ dsp->fw_features.ez2control_trigger = true; + dsp->fw_features.host_read_buf = true; + break; + case 0x4001e: + case 0x6001e: + case 0x7001e: + case 0x8001e: + case 0x9001e: + /* trace firmware */ + dsp->fw_features.host_read_buf = true; break; case 0x40019: case 0x4001f: @@ -2654,6 +2667,17 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, if (ret != 0) goto err; + + if (dsp->fw_features.host_read_buf) { + ret = wm_adsp_init_host_buf_info(dsp); + if (ret < 0) { + adsp_err(dsp, + "Failed to init host buffer (%d)\n", + ret); + goto err; + } + } + break; case SND_SOC_DAPM_PRE_PMD: @@ -2672,6 +2696,11 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, wm_adsp_stop_watchdog(dsp); + if (dsp->fw_features.host_read_buf) { + adsp_dbg(dsp, "host buf invalidated by DSP shutdown\n"); + wm_adsp_free_host_buf_info(dsp); + } + wm_adsp_debugfs_clear(dsp); dsp->fw_id = 0; @@ -3112,6 +3141,16 @@ static int wm_adsp_populate_buffer_regions(struct wm_adsp *dsp) lockdep_assert_held(&dsp->host_buf_info.lock); + BUG_ON(dsp->host_buf_info.host_regions != NULL); + + dsp->host_buf_info.host_regions = + kcalloc(dsp->firmwares[dsp->fw].caps->num_host_regions, + sizeof(*dsp->host_buf_info.host_regions), + GFP_KERNEL); + + if (!dsp->host_buf_info.host_regions) + return -ENOMEM; + for (i = 0; i < dsp->firmwares[dsp->fw].caps->num_host_regions; ++i) { region = &dsp->host_buf_info.host_regions[i]; @@ -3191,6 +3230,21 @@ static int wm_adsp_init_host_buf_info(struct wm_adsp *dsp) return ret; } +static void wm_adsp_free_host_buf_info(struct wm_adsp *dsp) +{ + struct wm_adsp_buffer_region *host_regions; + + mutex_lock(&dsp->host_buf_info.lock); + + host_regions = dsp->host_buf_info.host_regions; + dsp->host_buf_info.host_regions = NULL; + dsp->host_buf_info.host_buf_ptr = 0; + + mutex_unlock(&dsp->host_buf_info.lock); + + kfree(host_regions); +} + static int wm_adsp_read_buffer(struct wm_adsp *dsp, int32_t read_index, int avail) { @@ -3209,6 +3263,7 @@ static int wm_adsp_read_buffer(struct wm_adsp *dsp, int32_t read_index, int i, ret; lockdep_assert_held(&dsp->host_buf_info.lock); + BUG_ON(!host_regions); /* should have been checked by caller */ /* Calculate read parameters */ for (i = 0; i < dsp->firmwares[dsp->fw].caps->num_host_regions; ++i) { @@ -3268,6 +3323,7 @@ static int wm_adsp_capture_block(struct wm_adsp *dsp, int *avail) int ret; lockdep_assert_held(&dsp->host_buf_info.lock); + BUG_ON(!host_regions); /* should have been checked by caller */ /* Get current host buffer status */ ret = wm_adsp_host_buffer_read(dsp, @@ -3338,23 +3394,6 @@ int wm_adsp_stream_alloc(struct wm_adsp *dsp, } } - mutex_lock(&dsp->host_buf_info.lock); - - ret = 0; - if (!dsp->host_buf_info.host_regions) { - size = dsp->firmwares[dsp->fw].caps->num_host_regions * - sizeof(*dsp->host_buf_info.host_regions); - dsp->host_buf_info.host_regions = kzalloc(size, GFP_KERNEL); - - if (!dsp->host_buf_info.host_regions) - ret = -ENOMEM; - } - - mutex_unlock(&dsp->host_buf_info.lock); - - if (ret != 0) - goto err_raw_capt_buf; - size = params->buffer.fragment_size; if (size == 0) { dsp->capt_watermark = WM_ADSP_DEFAULT_WATERMARK; @@ -3367,8 +3406,6 @@ int wm_adsp_stream_alloc(struct wm_adsp *dsp, return 0; -err_raw_capt_buf: - kfree(dsp->raw_capt_buf); err_capt_buf: vfree(dsp->capt_buf.buf); @@ -3378,17 +3415,6 @@ EXPORT_SYMBOL_GPL(wm_adsp_stream_alloc); int wm_adsp_stream_free(struct wm_adsp *dsp) { - struct wm_adsp_buffer_region *host_regions; - - mutex_lock(&dsp->host_buf_info.lock); - - host_regions = dsp->host_buf_info.host_regions; - dsp->host_buf_info.host_regions = NULL; - - mutex_unlock(&dsp->host_buf_info.lock); - - kfree(host_regions); - kfree(dsp->raw_capt_buf); dsp->raw_capt_buf = NULL; @@ -3407,9 +3433,11 @@ int wm_adsp_stream_start(struct wm_adsp *dsp) mutex_lock(&dsp->host_buf_info.lock); - ret = wm_adsp_init_host_buf_info(dsp); - if (ret < 0) + if (!dsp->host_buf_info.host_buf_ptr) { + adsp_warn(dsp, "No host buffer info\n"); + ret = -EIO; goto out_unlock; + } dsp->max_dsp_read_bytes = WM_ADSP_MAX_READ_SIZE * sizeof(u32); @@ -3439,8 +3467,10 @@ static int wm_adsp_stream_capture(struct wm_adsp *dsp) lockdep_assert_held(&dsp->host_buf_info.lock); - if (!dsp->host_buf_info.host_regions) + if (!dsp->host_buf_info.host_regions) { + adsp_warn(dsp, "No host buffer info\n"); return -EIO; + } do { amount_read = 0; @@ -3468,6 +3498,11 @@ static int wm_adsp_ack_buffer_interrupt(struct wm_adsp *dsp) lockdep_assert_held(&dsp->host_buf_info.lock); + if (!dsp->host_buf_info.host_buf_ptr) { + adsp_warn(dsp, "No host buffer info\n"); + return -EIO; + } + ret = wm_adsp_host_buffer_read(dsp, HOST_BUFFER_FIELD(irq_count), &irq_ack); @@ -3489,6 +3524,12 @@ int wm_adsp_stream_handle_irq(struct wm_adsp *dsp) mutex_lock(&dsp->host_buf_info.lock); + if (!dsp->host_buf_info.host_buf_ptr) { + adsp_warn(dsp, "No host buffer info\n"); + ret = -EIO; + goto out_unlock; + } + ret = wm_adsp_host_buffer_read(dsp, HOST_BUFFER_FIELD(error), &dsp->host_buf_info.error); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 274b6de6167..a78117624d1 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -81,6 +81,7 @@ struct wm_adsp_fw_defs { struct wm_adsp_fw_features { bool shutdown:1; bool ez2control_trigger:1; + bool host_read_buf:1; }; struct wm_adsp_host_buf_info { From b02ced795cd3528a7753ffcf67433921cda638c2 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 3 Feb 2015 14:43:31 +0000 Subject: [PATCH 1039/1167] ASoC: wm_adsp: check stream error in all cases Compressed stream errors were only being checked if we were attempting to read data from inside an IRQ. This patch also checks for errors from a stream copy() and on IRQs where we do not yet have a stream open to read any data. Change-Id: I6c66efc9aaca9004b1cd95203bf4d90067bb7746 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 4 ++- sound/soc/codecs/florida.c | 4 ++- sound/soc/codecs/largo.c | 4 ++- sound/soc/codecs/marley.c | 3 +- sound/soc/codecs/moon.c | 3 +- sound/soc/codecs/wm_adsp.c | 61 +++++++++++++++++++++++++++-------- sound/soc/codecs/wm_adsp.h | 1 + 7 files changed, 61 insertions(+), 19 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 2567bd384c2..3a2be790e15 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2732,10 +2732,12 @@ static irqreturn_t adsp2_irq(int irq, void *data) mutex_lock(&clearwater->compr_info.lock); if (!clearwater->compr_info.trig && + clearwater->core.adsp[5].running && clearwater->core.adsp[5].fw_features.ez2control_trigger && - clearwater->core.adsp[5].running) { + !wm_adsp_stream_has_error(&clearwater->core.adsp[5])) { if (clearwater->core.arizona->pdata.ez2ctrl_trigger) clearwater->core.arizona->pdata.ez2ctrl_trigger(); + clearwater->compr_info.trig = true; } diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 5889cf571c8..972cb449faa 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2205,10 +2205,12 @@ static irqreturn_t adsp2_irq(int irq, void *data) mutex_lock(&florida->compr_info.lock); if (!florida->compr_info.trig && + florida->core.adsp[2].running && florida->core.adsp[2].fw_features.ez2control_trigger && - florida->core.adsp[2].running) { + !wm_adsp_stream_has_error(&florida->core.adsp[2])) { if (florida->core.arizona->pdata.ez2ctrl_trigger) florida->core.arizona->pdata.ez2ctrl_trigger(); + florida->compr_info.trig = true; } diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index 3ff858fd14c..0c7bfbf3d2b 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -1111,10 +1111,12 @@ static irqreturn_t adsp2_irq(int irq, void *data) mutex_lock(&largo->compr_info.lock); if (!largo->compr_info.trig && + largo->core.adsp[2].running && largo->core.adsp[2].fw_features.ez2control_trigger && - largo->core.adsp[2].running) { + !wm_adsp_stream_has_error(&largo->core.adsp[2])) { if (largo->core.arizona->pdata.ez2ctrl_trigger) largo->core.arizona->pdata.ez2ctrl_trigger(); + largo->compr_info.trig = true; } diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index 3c4d263e2ce..1a4500322b2 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -1818,8 +1818,9 @@ static irqreturn_t adsp2_irq(int irq, void *data) mutex_lock(&marley->compr_info.lock); if (!marley->compr_info.trig && + marley->core.adsp[2].running && marley->core.adsp[2].fw_features.ez2control_trigger && - marley->core.adsp[2].running) { + !wm_adsp_stream_has_error(&marley->core.adsp[2])) { if (marley->core.arizona->pdata.ez2ctrl_trigger) marley->core.arizona->pdata.ez2ctrl_trigger(); marley->compr_info.trig = true; diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 19f62c415a5..4047ebed268 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -2665,8 +2665,9 @@ static irqreturn_t adsp2_irq(int irq, void *data) mutex_lock(&moon->compr_info.lock); if (!moon->compr_info.trig && + moon->core.adsp[5].running && moon->core.adsp[5].fw_features.ez2control_trigger && - moon->core.adsp[5].running) { + !wm_adsp_stream_has_error(&moon->core.adsp[5])) { if (moon->core.arizona->pdata.ez2ctrl_trigger) moon->core.arizona->pdata.ez2ctrl_trigger(); moon->compr_info.trig = true; diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index e7575947c9d..a60680996fa 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3367,6 +3367,45 @@ static int wm_adsp_capture_block(struct wm_adsp *dsp, int *avail) return num_words; } +static int wm_adsp_stream_has_error_locked(struct wm_adsp *dsp) +{ + int ret; + + lockdep_assert_held(&dsp->host_buf_info.lock); + + if (dsp->host_buf_info.error != 0) + return -EIO; + + ret = wm_adsp_host_buffer_read(dsp, + HOST_BUFFER_FIELD(error), + &dsp->host_buf_info.error); + if (ret < 0) { + adsp_err(dsp, "Failed to read error field: %d\n", ret); + return ret; + } + + if (dsp->host_buf_info.error != 0) { + /* log the first time we see the error */ + adsp_warn(dsp, "DSP stream error occurred: %d\n", + dsp->host_buf_info.error); + return -EIO; + } + + return 0; +} + +int wm_adsp_stream_has_error(struct wm_adsp *dsp) +{ + int ret; + + mutex_lock(&dsp->host_buf_info.lock); + ret = wm_adsp_stream_has_error_locked(dsp); + mutex_unlock(&dsp->host_buf_info.lock); + + return ret; +} +EXPORT_SYMBOL_GPL(wm_adsp_stream_has_error); + int wm_adsp_stream_alloc(struct wm_adsp *dsp, const struct snd_compr_params *params) { @@ -3530,18 +3569,9 @@ int wm_adsp_stream_handle_irq(struct wm_adsp *dsp) goto out_unlock; } - ret = wm_adsp_host_buffer_read(dsp, - HOST_BUFFER_FIELD(error), - &dsp->host_buf_info.error); - if (ret < 0) - return ret; - - if (dsp->host_buf_info.error != 0) { - adsp_err(dsp, "DSP error occurred: %d\n", - dsp->host_buf_info.error); - ret = -EIO; + ret = wm_adsp_stream_has_error_locked(dsp); + if (ret) goto out_unlock; - } bytes_captured = wm_adsp_stream_capture(dsp); if (bytes_captured < 0) { @@ -3606,9 +3636,12 @@ int wm_adsp_stream_read(struct wm_adsp *dsp, char __user *buf, size_t count) if (dsp->buffer_drain_pending) { mutex_lock(&dsp->host_buf_info.lock); - ret = wm_adsp_stream_capture(dsp); - if (ret >= 0) - ret = wm_adsp_ack_buffer_interrupt(dsp); + ret = wm_adsp_stream_has_error_locked(dsp); + if (ret >= 0) { + ret = wm_adsp_stream_capture(dsp); + if (ret >= 0) + ret = wm_adsp_ack_buffer_interrupt(dsp); + } mutex_unlock(&dsp->host_buf_info.lock); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index a78117624d1..1fa0416ea82 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -202,6 +202,7 @@ extern int wm_adsp_stream_alloc(struct wm_adsp *adsp, extern int wm_adsp_stream_free(struct wm_adsp *adsp); extern int wm_adsp_stream_start(struct wm_adsp *adsp); +extern int wm_adsp_stream_has_error(struct wm_adsp *dsp); extern int wm_adsp_stream_handle_irq(struct wm_adsp *adsp); extern int wm_adsp_stream_read(struct wm_adsp *adsp, char __user *buf, size_t count); From 0acb92609254612277edfc21fdfe6f50358d3035 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 15 Jan 2015 16:24:53 +0000 Subject: [PATCH 1040/1167] ASoC: wm_adsp: make stream irq handler safe to call if no stream To simplify the implementation of the codec driver IRQ handler, make it safe to call wm_adsp_stream_handle_irq() without an open stream. The IRQ handler also needs to call wm_adsp_stream_avail() so also make this safe. Change-Id: I9909ec951143cd5fa738453e3e4eaffb81ccb21d Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 11 +++++------ sound/soc/codecs/florida.c | 11 +++++------ sound/soc/codecs/largo.c | 11 +++++------ sound/soc/codecs/marley.c | 11 +++++------ sound/soc/codecs/moon.c | 11 +++++------ sound/soc/codecs/wm_adsp.c | 31 ++++++++++++++++++++----------- sound/soc/codecs/wm_adsp.h | 1 + 7 files changed, 46 insertions(+), 41 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 3a2be790e15..f59ba76c0be 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2741,9 +2741,6 @@ static irqreturn_t adsp2_irq(int irq, void *data) clearwater->compr_info.trig = true; } - if (!clearwater->compr_info.allocated) - goto out; - ret = wm_adsp_stream_handle_irq(clearwater->compr_info.adsp); if (ret < 0) { dev_err(clearwater->core.arizona->dev, @@ -2754,9 +2751,11 @@ static irqreturn_t adsp2_irq(int irq, void *data) clearwater->compr_info.total_copied += ret; - avail = wm_adsp_stream_avail(clearwater->compr_info.adsp); - if (avail > CLEARWATER_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(clearwater->compr_info.stream); + if (clearwater->compr_info.allocated) { + avail = wm_adsp_stream_avail(clearwater->compr_info.adsp); + if (avail > CLEARWATER_DEFAULT_FRAGMENT_SIZE) + snd_compr_fragment_elapsed(clearwater->compr_info.stream); + } out: mutex_unlock(&clearwater->compr_info.lock); diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 972cb449faa..11149f803a8 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2214,9 +2214,6 @@ static irqreturn_t adsp2_irq(int irq, void *data) florida->compr_info.trig = true; } - if (!florida->compr_info.allocated) - goto out; - ret = wm_adsp_stream_handle_irq(florida->compr_info.adsp); if (ret < 0) { dev_err(florida->core.arizona->dev, @@ -2227,9 +2224,11 @@ static irqreturn_t adsp2_irq(int irq, void *data) florida->compr_info.total_copied += ret; - avail = wm_adsp_stream_avail(florida->compr_info.adsp); - if (avail > FLORIDA_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(florida->compr_info.stream); + if (florida->compr_info.allocated) { + avail = wm_adsp_stream_avail(florida->compr_info.adsp); + if (avail > FLORIDA_DEFAULT_FRAGMENT_SIZE) + snd_compr_fragment_elapsed(florida->compr_info.stream); + } out: mutex_unlock(&florida->compr_info.lock); diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index 0c7bfbf3d2b..8bfb537a8ec 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -1120,9 +1120,6 @@ static irqreturn_t adsp2_irq(int irq, void *data) largo->compr_info.trig = true; } - if (!largo->compr_info.allocated) - goto out; - ret = wm_adsp_stream_handle_irq(largo->compr_info.adsp); if (ret < 0) { dev_err(largo->core.arizona->dev, @@ -1133,9 +1130,11 @@ static irqreturn_t adsp2_irq(int irq, void *data) largo->compr_info.total_copied += ret; - avail = wm_adsp_stream_avail(largo->compr_info.adsp); - if (avail > LARGO_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(largo->compr_info.stream); + if (!largo->compr_info.allocated) { + avail = wm_adsp_stream_avail(largo->compr_info.adsp); + if (avail > LARGO_DEFAULT_FRAGMENT_SIZE) + snd_compr_fragment_elapsed(largo->compr_info.stream); + } out: mutex_unlock(&largo->compr_info.lock); diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index 1a4500322b2..4b6035f81f7 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -1826,9 +1826,6 @@ static irqreturn_t adsp2_irq(int irq, void *data) marley->compr_info.trig = true; } - if (!marley->compr_info.allocated) - goto out; - ret = wm_adsp_stream_handle_irq(marley->compr_info.adsp); if (ret < 0) { dev_err(marley->core.arizona->dev, @@ -1839,9 +1836,11 @@ static irqreturn_t adsp2_irq(int irq, void *data) marley->compr_info.total_copied += ret; - avail = wm_adsp_stream_avail(marley->compr_info.adsp); - if (avail > MARLEY_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(marley->compr_info.stream); + if (marley->compr_info.allocated) { + avail = wm_adsp_stream_avail(marley->compr_info.adsp); + if (avail > MARLEY_DEFAULT_FRAGMENT_SIZE) + snd_compr_fragment_elapsed(marley->compr_info.stream); + } out: mutex_unlock(&marley->compr_info.lock); diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 4047ebed268..e85d0f9fff0 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -2673,9 +2673,6 @@ static irqreturn_t adsp2_irq(int irq, void *data) moon->compr_info.trig = true; } - if (!moon->compr_info.allocated) - goto out; - ret = wm_adsp_stream_handle_irq(moon->compr_info.adsp); if (ret < 0) { dev_err(moon->core.arizona->dev, @@ -2686,9 +2683,11 @@ static irqreturn_t adsp2_irq(int irq, void *data) moon->compr_info.total_copied += ret; - avail = wm_adsp_stream_avail(moon->compr_info.adsp); - if (avail > MOON_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(moon->compr_info.stream); + if (moon->compr_info.allocated) { + avail = wm_adsp_stream_avail(moon->compr_info.adsp); + if (avail > MOON_DEFAULT_FRAGMENT_SIZE) + snd_compr_fragment_elapsed(moon->compr_info.stream); + } out: mutex_unlock(&moon->compr_info.lock); diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index a60680996fa..06e519a0db3 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3443,6 +3443,8 @@ int wm_adsp_stream_alloc(struct wm_adsp *dsp, DIV_ROUND_UP(size, WM_ADSP_DATA_WORD_SIZE); } + dsp->stream_allocated = true; + return 0; err_capt_buf: @@ -3454,6 +3456,8 @@ EXPORT_SYMBOL_GPL(wm_adsp_stream_alloc); int wm_adsp_stream_free(struct wm_adsp *dsp) { + dsp->stream_allocated = false; + kfree(dsp->raw_capt_buf); dsp->raw_capt_buf = NULL; @@ -3573,15 +3577,17 @@ int wm_adsp_stream_handle_irq(struct wm_adsp *dsp) if (ret) goto out_unlock; - bytes_captured = wm_adsp_stream_capture(dsp); - if (bytes_captured < 0) { - ret = bytes_captured; - goto out_unlock; - } + if (dsp->stream_allocated) { + bytes_captured = wm_adsp_stream_capture(dsp); + if (bytes_captured < 0) { + ret = bytes_captured; + goto out_unlock; + } - ret = wm_adsp_ack_buffer_interrupt(dsp); - if (ret < 0) - goto out_unlock; + ret = wm_adsp_ack_buffer_interrupt(dsp); + if (ret < 0) + goto out_unlock; + } ret = bytes_captured; @@ -3655,9 +3661,12 @@ EXPORT_SYMBOL_GPL(wm_adsp_stream_read); int wm_adsp_stream_avail(const struct wm_adsp *dsp) { - return CIRC_CNT(dsp->capt_buf.head, - dsp->capt_buf.tail, - dsp->capt_buf_size); + if (!dsp->stream_allocated) + return 0; + else + return CIRC_CNT(dsp->capt_buf.head, + dsp->capt_buf.tail, + dsp->capt_buf_size); } EXPORT_SYMBOL_GPL(wm_adsp_stream_avail); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 1fa0416ea82..6d9b89390b9 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -134,6 +134,7 @@ struct wm_adsp { int capt_buf_size; u32 capt_watermark; bool buffer_drain_pending; + bool stream_allocated; int num_firmwares; struct wm_adsp_fw_defs *firmwares; From 9e73500d92026a29b8012caf54c0f11806aaf63a Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 6 Nov 2015 15:36:21 +0000 Subject: [PATCH 1041/1167] ASoC: wm_adsp: return stream trigger status from irq handler Simplify the handling of voice trigger callbacks by checking the stream status in wm_adsp_stream_handle_irq() and returning a flag to indicate whether this IRQ was the initial trigger. Change-Id: I2cd39b8dfb494a42550d20fc8ba0ccaff29ab0a5 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 2 +- sound/soc/codecs/florida.c | 2 +- sound/soc/codecs/largo.c | 2 +- sound/soc/codecs/marley.c | 2 +- sound/soc/codecs/moon.c | 2 +- sound/soc/codecs/wm_adsp.c | 49 ++++++++++++++++++++++++----------- sound/soc/codecs/wm_adsp.h | 2 +- 7 files changed, 40 insertions(+), 21 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index f59ba76c0be..f0560a88616 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2741,7 +2741,7 @@ static irqreturn_t adsp2_irq(int irq, void *data) clearwater->compr_info.trig = true; } - ret = wm_adsp_stream_handle_irq(clearwater->compr_info.adsp); + ret = wm_adsp_stream_handle_irq(clearwater->compr_info.adsp, NULL); if (ret < 0) { dev_err(clearwater->core.arizona->dev, "Failed to capture DSP data: %d\n", diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 11149f803a8..98176be17b5 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2214,7 +2214,7 @@ static irqreturn_t adsp2_irq(int irq, void *data) florida->compr_info.trig = true; } - ret = wm_adsp_stream_handle_irq(florida->compr_info.adsp); + ret = wm_adsp_stream_handle_irq(florida->compr_info.adsp, NULL); if (ret < 0) { dev_err(florida->core.arizona->dev, "Failed to capture DSP data: %d\n", diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index 8bfb537a8ec..83bcedd8f92 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -1120,7 +1120,7 @@ static irqreturn_t adsp2_irq(int irq, void *data) largo->compr_info.trig = true; } - ret = wm_adsp_stream_handle_irq(largo->compr_info.adsp); + ret = wm_adsp_stream_handle_irq(largo->compr_info.adsp, NULL); if (ret < 0) { dev_err(largo->core.arizona->dev, "Failed to capture DSP data: %d\n", diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index 4b6035f81f7..23722c0864c 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -1826,7 +1826,7 @@ static irqreturn_t adsp2_irq(int irq, void *data) marley->compr_info.trig = true; } - ret = wm_adsp_stream_handle_irq(marley->compr_info.adsp); + ret = wm_adsp_stream_handle_irq(marley->compr_info.adsp, NULL); if (ret < 0) { dev_err(marley->core.arizona->dev, "Failed to capture DSP data: %d\n", diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index e85d0f9fff0..89c8af4a060 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -2673,7 +2673,7 @@ static irqreturn_t adsp2_irq(int irq, void *data) moon->compr_info.trig = true; } - ret = wm_adsp_stream_handle_irq(moon->compr_info.adsp); + ret = wm_adsp_stream_handle_irq(moon->compr_info.adsp, NULL); if (ret < 0) { dev_err(moon->core.arizona->dev, "Failed to capture DSP data: %d\n", diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 06e519a0db3..28f279e3aef 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3342,7 +3342,7 @@ static int wm_adsp_capture_block(struct wm_adsp *dsp, int *avail) write_index = sign_extend32(next_write_index, 23); if (read_index < 0) - return -EIO; /* stream has not yet started */ + return 0; /* stream has not yet started */ *avail = write_index - read_index; if (*avail < 0) @@ -3534,9 +3534,10 @@ static int wm_adsp_stream_capture(struct wm_adsp *dsp) return total_read * WM_ADSP_DATA_WORD_SIZE; } -static int wm_adsp_ack_buffer_interrupt(struct wm_adsp *dsp) +static int wm_adsp_stream_update_irq_count(struct wm_adsp *dsp, bool enable, + u32 *old_count) { - u32 irq_ack; + u32 irq_count; int ret; lockdep_assert_held(&dsp->host_buf_info.lock); @@ -3548,22 +3549,32 @@ static int wm_adsp_ack_buffer_interrupt(struct wm_adsp *dsp) ret = wm_adsp_host_buffer_read(dsp, HOST_BUFFER_FIELD(irq_count), - &irq_ack); + &irq_count); if (ret < 0) return ret; - if (!dsp->buffer_drain_pending) - irq_ack |= 1; /* enable further IRQs */ + if (old_count) + *old_count = irq_count; - ret = wm_adsp_host_buffer_write(dsp, - HOST_BUFFER_FIELD(irq_ack), - irq_ack); - return ret; + if (irq_count == 0) + return 0; /* don't ack if there haven't been any IRQs */ + + if (!enable || dsp->buffer_drain_pending) + return 0; + + return wm_adsp_host_buffer_write(dsp, + HOST_BUFFER_FIELD(irq_ack), + irq_count | 1); } -int wm_adsp_stream_handle_irq(struct wm_adsp *dsp) +int wm_adsp_stream_handle_irq(struct wm_adsp *dsp, bool *trigger) { int ret, bytes_captured = 0; + u32 old_irq_count; + bool enable_irqs = false; + + if (trigger) + *trigger = false; mutex_lock(&dsp->host_buf_info.lock); @@ -3584,11 +3595,17 @@ int wm_adsp_stream_handle_irq(struct wm_adsp *dsp) goto out_unlock; } - ret = wm_adsp_ack_buffer_interrupt(dsp); - if (ret < 0) - goto out_unlock; + enable_irqs = true; } + ret = wm_adsp_stream_update_irq_count(dsp, enable_irqs, &old_irq_count); + if (ret < 0) + goto out_unlock; + + /* irq_count = 2 only on the initial trigger */ + if (trigger && (old_irq_count == 2)) + *trigger = true; + ret = bytes_captured; out_unlock: @@ -3646,7 +3663,9 @@ int wm_adsp_stream_read(struct wm_adsp *dsp, char __user *buf, size_t count) if (ret >= 0) { ret = wm_adsp_stream_capture(dsp); if (ret >= 0) - ret = wm_adsp_ack_buffer_interrupt(dsp); + ret = wm_adsp_stream_update_irq_count(dsp, + true, + NULL); } mutex_unlock(&dsp->host_buf_info.lock); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 6d9b89390b9..2192634637b 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -204,7 +204,7 @@ extern int wm_adsp_stream_free(struct wm_adsp *adsp); extern int wm_adsp_stream_start(struct wm_adsp *adsp); extern int wm_adsp_stream_has_error(struct wm_adsp *dsp); -extern int wm_adsp_stream_handle_irq(struct wm_adsp *adsp); +extern int wm_adsp_stream_handle_irq(struct wm_adsp *adsp, bool *trigger); extern int wm_adsp_stream_read(struct wm_adsp *adsp, char __user *buf, size_t count); extern int wm_adsp_stream_avail(const struct wm_adsp *adsp); From 70c0be5fcc772c2aaa0b095a3f328fcf4bb1b7ca Mon Sep 17 00:00:00 2001 From: jjassal Date: Mon, 22 Jun 2015 00:51:19 +0000 Subject: [PATCH 1042/1167] ASoC: arizona: Refactor adsp2_irq() to use stream trigger Rearrange adsp2_irq() such that it uses the stream trigger status returned by wm_adsp_stream_handle_irq() and is not dependant on having a compressed stream open to service the interrupt. This allows firmware errors to be detected without needing a compressed stream to be open. No longer calls wm_adsp_stream_check_error() as this is already done by wm_adsp_stream_handle_irq(). Change-Id: Ia789bcc751def642bfdd9263012a42a28b2c907a Signed-off-by: Jaswinder Jassal Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 52 +++++++++++++++++++---------------- sound/soc/codecs/florida.c | 44 +++++++++++++++-------------- sound/soc/codecs/largo.c | 46 +++++++++++++++++-------------- sound/soc/codecs/marley.c | 50 ++++++++++++++++++--------------- sound/soc/codecs/moon.c | 50 ++++++++++++++++++--------------- 5 files changed, 134 insertions(+), 108 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index f0560a88616..c539be62235 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2727,38 +2727,42 @@ static struct snd_soc_dai_driver clearwater_dai[] = { static irqreturn_t adsp2_irq(int irq, void *data) { struct clearwater_priv *clearwater = data; + struct clearwater_compr *compr_info = &clearwater->compr_info; + struct arizona *arizona = clearwater->core.arizona; + struct wm_adsp *adsp6 = &clearwater->core.adsp[5]; + struct wm_adsp *adsp1 = &clearwater->core.adsp[0]; + bool trigger; int ret, avail; mutex_lock(&clearwater->compr_info.lock); - if (!clearwater->compr_info.trig && - clearwater->core.adsp[5].running && - clearwater->core.adsp[5].fw_features.ez2control_trigger && - !wm_adsp_stream_has_error(&clearwater->core.adsp[5])) { - if (clearwater->core.arizona->pdata.ez2ctrl_trigger) - clearwater->core.arizona->pdata.ez2ctrl_trigger(); - - clearwater->compr_info.trig = true; - } + if (adsp6->running) { + ret = wm_adsp_stream_handle_irq(adsp6, &trigger); + if (ret >= 0) { + if (adsp6 == compr_info->adsp) + compr_info->total_copied += ret; + + if (!compr_info->trig && trigger) { + compr_info->trig = true; + if (arizona->pdata.ez2ctrl_trigger && + adsp6->fw_features.ez2control_trigger) + arizona->pdata.ez2ctrl_trigger(); + } + } + } else if (adsp1->running) { + ret = wm_adsp_stream_handle_irq(adsp1, &trigger); - ret = wm_adsp_stream_handle_irq(clearwater->compr_info.adsp, NULL); - if (ret < 0) { - dev_err(clearwater->core.arizona->dev, - "Failed to capture DSP data: %d\n", - ret); - goto out; + if (ret >= 0 && (adsp1 == compr_info->adsp)) + compr_info->total_copied += ret; } - clearwater->compr_info.total_copied += ret; - - if (clearwater->compr_info.allocated) { - avail = wm_adsp_stream_avail(clearwater->compr_info.adsp); + if (compr_info->allocated) { + avail = wm_adsp_stream_avail(compr_info->adsp); if (avail > CLEARWATER_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(clearwater->compr_info.stream); + snd_compr_fragment_elapsed(compr_info->stream); } -out: - mutex_unlock(&clearwater->compr_info.lock); + mutex_unlock(&compr_info->lock); return IRQ_HANDLED; } @@ -2811,11 +2815,13 @@ static int clearwater_free(struct snd_compr_stream *stream) mutex_lock(&clearwater->compr_info.lock); + wm_adsp_stream_free(clearwater->compr_info.adsp); + clearwater->compr_info.allocated = false; clearwater->compr_info.stream = NULL; + clearwater->compr_info.adsp = NULL; clearwater->compr_info.total_copied = 0; - wm_adsp_stream_free(clearwater->compr_info.adsp); mutex_unlock(&clearwater->compr_info.lock); diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 98176be17b5..323511c629a 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2200,37 +2200,40 @@ static struct snd_soc_dai_driver florida_dai[] = { static irqreturn_t adsp2_irq(int irq, void *data) { struct florida_priv *florida = data; + struct arizona *arizona = florida->core.arizona; + struct wm_adsp *adsp3 = &florida->core.adsp[2]; + struct wm_adsp *adsp1 = &florida->core.adsp[0]; + bool trigger; int ret, avail; mutex_lock(&florida->compr_info.lock); - if (!florida->compr_info.trig && - florida->core.adsp[2].running && - florida->core.adsp[2].fw_features.ez2control_trigger && - !wm_adsp_stream_has_error(&florida->core.adsp[2])) { - if (florida->core.arizona->pdata.ez2ctrl_trigger) - florida->core.arizona->pdata.ez2ctrl_trigger(); - - florida->compr_info.trig = true; - } + if (adsp3->running) { + ret = wm_adsp_stream_handle_irq(adsp3, &trigger); + if (ret >= 0) { + if (adsp3 == florida->compr_info.adsp) + florida->compr_info.total_copied += ret; + + if (!florida->compr_info.trig && trigger) { + florida->compr_info.trig = true; + if (arizona->pdata.ez2ctrl_trigger && + adsp3->fw_features.ez2control_trigger) + arizona->pdata.ez2ctrl_trigger(); + } + } + } else if (adsp1->running) { + ret = wm_adsp_stream_handle_irq(adsp1, &trigger); - ret = wm_adsp_stream_handle_irq(florida->compr_info.adsp, NULL); - if (ret < 0) { - dev_err(florida->core.arizona->dev, - "Failed to capture DSP data: %d\n", - ret); - goto out; + if (ret >= 0 && (adsp1 == florida->compr_info.adsp)) + florida->compr_info.total_copied += ret; } - florida->compr_info.total_copied += ret; - if (florida->compr_info.allocated) { avail = wm_adsp_stream_avail(florida->compr_info.adsp); if (avail > FLORIDA_DEFAULT_FRAGMENT_SIZE) snd_compr_fragment_elapsed(florida->compr_info.stream); } -out: mutex_unlock(&florida->compr_info.lock); return IRQ_HANDLED; @@ -2284,12 +2287,13 @@ static int florida_free(struct snd_compr_stream *stream) mutex_lock(&florida->compr_info.lock); + wm_adsp_stream_free(florida->compr_info.adsp); + florida->compr_info.allocated = false; florida->compr_info.stream = NULL; + florida->compr_info.adsp = NULL; florida->compr_info.total_copied = 0; - wm_adsp_stream_free(florida->compr_info.adsp); - mutex_unlock(&florida->compr_info.lock); return 0; diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index 83bcedd8f92..c1b8dea2302 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -1106,37 +1106,40 @@ static struct snd_soc_dai_driver largo_dai[] = { static irqreturn_t adsp2_irq(int irq, void *data) { struct largo_priv *largo = data; + struct arizona *arizona = largo->core.arizona; + struct wm_adsp *adsp3 = &largo->core.adsp[2]; + struct wm_adsp *adsp1 = &largo->core.adsp[0]; + bool trigger; int ret, avail; mutex_lock(&largo->compr_info.lock); - if (!largo->compr_info.trig && - largo->core.adsp[2].running && - largo->core.adsp[2].fw_features.ez2control_trigger && - !wm_adsp_stream_has_error(&largo->core.adsp[2])) { - if (largo->core.arizona->pdata.ez2ctrl_trigger) - largo->core.arizona->pdata.ez2ctrl_trigger(); - - largo->compr_info.trig = true; - } + if (adsp3->running) { + ret = wm_adsp_stream_handle_irq(adsp3, &trigger); + if (ret >= 0) { + if (adsp3 == largo->compr_info.adsp) + largo->compr_info.total_copied += ret; + + if (!largo->compr_info.trig && trigger) { + largo->compr_info.trig = true; + if (arizona->pdata.ez2ctrl_trigger && + adsp3->fw_features.ez2control_trigger) + arizona->pdata.ez2ctrl_trigger(); + } + } + } else if (adsp1->running) { + ret = wm_adsp_stream_handle_irq(adsp1, &trigger); - ret = wm_adsp_stream_handle_irq(largo->compr_info.adsp, NULL); - if (ret < 0) { - dev_err(largo->core.arizona->dev, - "Failed to capture DSP data: %d\n", - ret); - goto out; + if (ret >= 0 && (adsp1 == largo->compr_info.adsp)) + largo->compr_info.total_copied += ret; } - largo->compr_info.total_copied += ret; - - if (!largo->compr_info.allocated) { + if (largo->compr_info.allocated) { avail = wm_adsp_stream_avail(largo->compr_info.adsp); if (avail > LARGO_DEFAULT_FRAGMENT_SIZE) snd_compr_fragment_elapsed(largo->compr_info.stream); } -out: mutex_unlock(&largo->compr_info.lock); return IRQ_HANDLED; @@ -1188,12 +1191,13 @@ static int largo_free(struct snd_compr_stream *stream) mutex_lock(&largo->compr_info.lock); + wm_adsp_stream_free(largo->compr_info.adsp); + largo->compr_info.allocated = false; largo->compr_info.stream = NULL; + largo->compr_info.adsp = NULL; largo->compr_info.total_copied = 0; - wm_adsp_stream_free(largo->compr_info.adsp); - mutex_unlock(&largo->compr_info.lock); return 0; diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index 23722c0864c..c01adc657bf 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -1813,36 +1813,41 @@ static struct snd_soc_dai_driver marley_dai[] = { static irqreturn_t adsp2_irq(int irq, void *data) { struct marley_priv *marley = data; + struct marley_compr *compr_info = &marley->compr_info; + struct arizona *arizona = marley->core.arizona; + struct wm_adsp *adsp3 = &marley->core.adsp[2]; + struct wm_adsp *adsp1 = &marley->core.adsp[0]; + bool trigger; int ret, avail; mutex_lock(&marley->compr_info.lock); - if (!marley->compr_info.trig && - marley->core.adsp[2].running && - marley->core.adsp[2].fw_features.ez2control_trigger && - !wm_adsp_stream_has_error(&marley->core.adsp[2])) { - if (marley->core.arizona->pdata.ez2ctrl_trigger) - marley->core.arizona->pdata.ez2ctrl_trigger(); - marley->compr_info.trig = true; - } + if (adsp3->running) { + ret = wm_adsp_stream_handle_irq(adsp3, &trigger); + if (ret >= 0) { + if (adsp3 == compr_info->adsp) + compr_info->total_copied += ret; + + if (!compr_info->trig && trigger) { + compr_info->trig = true; + if (arizona->pdata.ez2ctrl_trigger && + adsp3->fw_features.ez2control_trigger) + arizona->pdata.ez2ctrl_trigger(); + } + } + } else if (adsp1->running) { + ret = wm_adsp_stream_handle_irq(adsp1, &trigger); - ret = wm_adsp_stream_handle_irq(marley->compr_info.adsp, NULL); - if (ret < 0) { - dev_err(marley->core.arizona->dev, - "Failed to capture DSP data: %d\n", - ret); - goto out; + if (ret >= 0 && (adsp1 == compr_info->adsp)) + compr_info->total_copied += ret; } - marley->compr_info.total_copied += ret; - - if (marley->compr_info.allocated) { - avail = wm_adsp_stream_avail(marley->compr_info.adsp); + if (compr_info->allocated) { + avail = wm_adsp_stream_avail(compr_info->adsp); if (avail > MARLEY_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(marley->compr_info.stream); + snd_compr_fragment_elapsed(compr_info->stream); } -out: mutex_unlock(&marley->compr_info.lock); return IRQ_HANDLED; @@ -1896,12 +1901,13 @@ static int marley_free(struct snd_compr_stream *stream) mutex_lock(&marley->compr_info.lock); + wm_adsp_stream_free(marley->compr_info.adsp); + marley->compr_info.allocated = false; marley->compr_info.stream = NULL; + marley->compr_info.adsp = NULL; marley->compr_info.total_copied = 0; - wm_adsp_stream_free(marley->compr_info.adsp); - mutex_unlock(&marley->compr_info.lock); return 0; diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 89c8af4a060..bfc2f0d5182 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -2660,36 +2660,41 @@ static struct snd_soc_dai_driver moon_dai[] = { static irqreturn_t adsp2_irq(int irq, void *data) { struct moon_priv *moon = data; + struct moon_compr *compr_info = &moon->compr_info; + struct arizona *arizona = moon->core.arizona; + struct wm_adsp *adsp6 = &moon->core.adsp[5]; + struct wm_adsp *adsp1 = &moon->core.adsp[0]; + bool trigger; int ret, avail; mutex_lock(&moon->compr_info.lock); - if (!moon->compr_info.trig && - moon->core.adsp[5].running && - moon->core.adsp[5].fw_features.ez2control_trigger && - !wm_adsp_stream_has_error(&moon->core.adsp[5])) { - if (moon->core.arizona->pdata.ez2ctrl_trigger) - moon->core.arizona->pdata.ez2ctrl_trigger(); - moon->compr_info.trig = true; - } + if (adsp6->running) { + ret = wm_adsp_stream_handle_irq(adsp6, &trigger); + if (ret >= 0) { + if (adsp6 == compr_info->adsp) + compr_info->total_copied += ret; + + if (!compr_info->trig && trigger) { + compr_info->trig = true; + if (arizona->pdata.ez2ctrl_trigger && + adsp6->fw_features.ez2control_trigger) + arizona->pdata.ez2ctrl_trigger(); + } + } + } else if (adsp1->running) { + ret = wm_adsp_stream_handle_irq(adsp1, &trigger); - ret = wm_adsp_stream_handle_irq(moon->compr_info.adsp, NULL); - if (ret < 0) { - dev_err(moon->core.arizona->dev, - "Failed to capture DSP data: %d\n", - ret); - goto out; + if (ret >= 0 && (adsp1 == compr_info->adsp)) + compr_info->total_copied += ret; } - moon->compr_info.total_copied += ret; - - if (moon->compr_info.allocated) { - avail = wm_adsp_stream_avail(moon->compr_info.adsp); + if (compr_info->allocated) { + avail = wm_adsp_stream_avail(compr_info->adsp); if (avail > MOON_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(moon->compr_info.stream); + snd_compr_fragment_elapsed(compr_info->stream); } -out: mutex_unlock(&moon->compr_info.lock); return IRQ_HANDLED; @@ -2749,12 +2754,13 @@ static int moon_free(struct snd_compr_stream *stream) mutex_lock(&moon->compr_info.lock); + wm_adsp_stream_free(moon->compr_info.adsp); + moon->compr_info.allocated = false; moon->compr_info.stream = NULL; + moon->compr_info.adsp = NULL; moon->compr_info.total_copied = 0; - wm_adsp_stream_free(moon->compr_info.adsp); - mutex_unlock(&moon->compr_info.lock); return 0; From b03eb6b59fcc2ea6387526935651af7de95c16a5 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 9 Feb 2015 14:30:14 +0000 Subject: [PATCH 1043/1167] ASoC: arizona: use private_data to store compressed stream pointer In preparation for supporting multiple compressed streams, store the compr_info pointer into the compressed stream runtime private_data Change-Id: Ia3379bc8b0996d382220345f2806811839021a14 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 66 +++++++++++++++++++--------------- sound/soc/codecs/florida.c | 67 ++++++++++++++++++++--------------- sound/soc/codecs/largo.c | 67 ++++++++++++++++++++--------------- sound/soc/codecs/marley.c | 67 ++++++++++++++++++++--------------- sound/soc/codecs/moon.c | 67 ++++++++++++++++++++--------------- 5 files changed, 189 insertions(+), 145 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index c539be62235..3e7563f2232 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2802,6 +2802,7 @@ static int clearwater_open(struct snd_compr_stream *stream) clearwater->compr_info.adsp = &clearwater->core.adsp[n_adsp]; clearwater->compr_info.stream = stream; + stream->runtime->private_data = &clearwater->compr_info; out: mutex_unlock(&clearwater->compr_info.lock); @@ -2810,20 +2811,24 @@ static int clearwater_open(struct snd_compr_stream *stream) static int clearwater_free(struct snd_compr_stream *stream) { - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(rtd->codec); + struct clearwater_compr *compr = + (struct clearwater_compr *)stream->runtime->private_data; - mutex_lock(&clearwater->compr_info.lock); + if (!compr) + return -EINVAL; - wm_adsp_stream_free(clearwater->compr_info.adsp); + mutex_lock(&compr->lock); - clearwater->compr_info.allocated = false; - clearwater->compr_info.stream = NULL; - clearwater->compr_info.adsp = NULL; - clearwater->compr_info.total_copied = 0; + wm_adsp_stream_free(compr->adsp); + compr->allocated = false; + compr->stream = NULL; + compr->adsp = NULL; + compr->total_copied = 0; - mutex_unlock(&clearwater->compr_info.lock); + stream->runtime->private_data = NULL; + + mutex_unlock(&compr->lock); return 0; } @@ -2834,7 +2839,8 @@ static int clearwater_set_params(struct snd_compr_stream *stream, struct snd_soc_pcm_runtime *rtd = stream->private_data; struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(rtd->codec); struct arizona *arizona = clearwater->core.arizona; - struct clearwater_compr *compr = &clearwater->compr_info; + struct clearwater_compr *compr = + (struct clearwater_compr *)stream->runtime->private_data; int ret = 0; mutex_lock(&compr->lock); @@ -2870,20 +2876,22 @@ static int clearwater_trigger(struct snd_compr_stream *stream, int cmd) struct snd_soc_pcm_runtime *rtd = stream->private_data; struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(rtd->codec); struct arizona *arizona = clearwater->core.arizona; + struct clearwater_compr *compr = + (struct clearwater_compr *)stream->runtime->private_data; int ret = 0; bool pending = false; - mutex_lock(&clearwater->compr_info.lock); + mutex_lock(&compr->lock); switch (cmd) { case SNDRV_PCM_TRIGGER_START: - ret = wm_adsp_stream_start(clearwater->compr_info.adsp); + ret = wm_adsp_stream_start(compr->adsp); /** * If the stream has already triggered before the stream * opened better process any outstanding data */ - if (clearwater->compr_info.trig) + if (compr->trig) pending = true; break; case SNDRV_PCM_TRIGGER_STOP: @@ -2893,7 +2901,7 @@ static int clearwater_trigger(struct snd_compr_stream *stream, int cmd) break; } - mutex_unlock(&clearwater->compr_info.lock); + mutex_unlock(&compr->lock); /* * Stream has already trigerred, force irq handler to run @@ -2908,13 +2916,13 @@ static int clearwater_trigger(struct snd_compr_stream *stream, int cmd) static int clearwater_pointer(struct snd_compr_stream *stream, struct snd_compr_tstamp *tstamp) { - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(rtd->codec); + struct clearwater_compr *compr = + (struct clearwater_compr *)stream->runtime->private_data; - mutex_lock(&clearwater->compr_info.lock); + mutex_lock(&compr->lock); tstamp->byte_offset = 0; - tstamp->copied_total = clearwater->compr_info.total_copied; - mutex_unlock(&clearwater->compr_info.lock); + tstamp->copied_total = compr->total_copied; + mutex_unlock(&compr->lock); return 0; } @@ -2922,18 +2930,18 @@ static int clearwater_pointer(struct snd_compr_stream *stream, static int clearwater_copy(struct snd_compr_stream *stream, char __user *buf, size_t count) { - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(rtd->codec); + struct clearwater_compr *compr = + (struct clearwater_compr *)stream->runtime->private_data; int ret; - mutex_lock(&clearwater->compr_info.lock); + mutex_lock(&compr->lock); if (stream->direction == SND_COMPRESS_PLAYBACK) ret = -EINVAL; else - ret = wm_adsp_stream_read(clearwater->compr_info.adsp, buf, count); + ret = wm_adsp_stream_read(compr->adsp, buf, count); - mutex_unlock(&clearwater->compr_info.lock); + mutex_unlock(&compr->lock); return ret; } @@ -2941,10 +2949,10 @@ static int clearwater_copy(struct snd_compr_stream *stream, char __user *buf, static int clearwater_get_caps(struct snd_compr_stream *stream, struct snd_compr_caps *caps) { - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(rtd->codec); + struct clearwater_compr *compr = + (struct clearwater_compr *)stream->runtime->private_data; - mutex_lock(&clearwater->compr_info.lock); + mutex_lock(&compr->lock); memset(caps, 0, sizeof(*caps)); @@ -2954,9 +2962,9 @@ static int clearwater_get_caps(struct snd_compr_stream *stream, caps->min_fragments = CLEARWATER_DEFAULT_FRAGMENTS; caps->max_fragments = CLEARWATER_DEFAULT_FRAGMENTS; - wm_adsp_get_caps(clearwater->compr_info.adsp, stream, caps); + wm_adsp_get_caps(compr->adsp, stream, caps); - mutex_unlock(&clearwater->compr_info.lock); + mutex_unlock(&compr->lock); return 0; } diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 323511c629a..e7440758cba 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2274,6 +2274,7 @@ static int florida_open(struct snd_compr_stream *stream) florida->compr_info.adsp = &florida->core.adsp[n_adsp]; florida->compr_info.stream = stream; + stream->runtime->private_data = &florida->compr_info; out: mutex_unlock(&florida->compr_info.lock); @@ -2282,19 +2283,24 @@ static int florida_open(struct snd_compr_stream *stream) static int florida_free(struct snd_compr_stream *stream) { - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct florida_priv *florida = snd_soc_codec_get_drvdata(rtd->codec); + struct florida_compr *compr = + (struct florida_compr *)stream->runtime->private_data; - mutex_lock(&florida->compr_info.lock); + if (!compr) + return -EINVAL; - wm_adsp_stream_free(florida->compr_info.adsp); + mutex_lock(&compr->lock); - florida->compr_info.allocated = false; - florida->compr_info.stream = NULL; - florida->compr_info.adsp = NULL; - florida->compr_info.total_copied = 0; + wm_adsp_stream_free(compr->adsp); - mutex_unlock(&florida->compr_info.lock); + compr->allocated = false; + compr->stream = NULL; + compr->adsp = NULL; + compr->total_copied = 0; + + stream->runtime->private_data = NULL; + + mutex_unlock(&compr->lock); return 0; } @@ -2305,7 +2311,8 @@ static int florida_set_params(struct snd_compr_stream *stream, struct snd_soc_pcm_runtime *rtd = stream->private_data; struct florida_priv *florida = snd_soc_codec_get_drvdata(rtd->codec); struct arizona *arizona = florida->core.arizona; - struct florida_compr *compr = &florida->compr_info; + struct florida_compr *compr = + (struct florida_compr *)stream->runtime->private_data; int ret = 0; mutex_lock(&compr->lock); @@ -2340,20 +2347,22 @@ static int florida_trigger(struct snd_compr_stream *stream, int cmd) { struct snd_soc_pcm_runtime *rtd = stream->private_data; struct florida_priv *florida = snd_soc_codec_get_drvdata(rtd->codec); + struct florida_compr *compr = + (struct florida_compr *)stream->runtime->private_data; int ret = 0; bool pending = false; - mutex_lock(&florida->compr_info.lock); + mutex_lock(&compr->lock); switch (cmd) { case SNDRV_PCM_TRIGGER_START: - ret = wm_adsp_stream_start(florida->compr_info.adsp); + ret = wm_adsp_stream_start(compr->adsp); /** * If the stream has already triggered before the stream * opened better process any outstanding data */ - if (florida->compr_info.trig) + if (compr->trig) pending = true; break; case SNDRV_PCM_TRIGGER_STOP: @@ -2363,7 +2372,7 @@ static int florida_trigger(struct snd_compr_stream *stream, int cmd) break; } - mutex_unlock(&florida->compr_info.lock); + mutex_unlock(&compr->lock); if (pending) adsp2_irq(0, florida); @@ -2374,13 +2383,13 @@ static int florida_trigger(struct snd_compr_stream *stream, int cmd) static int florida_pointer(struct snd_compr_stream *stream, struct snd_compr_tstamp *tstamp) { - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct florida_priv *florida = snd_soc_codec_get_drvdata(rtd->codec); + struct florida_compr *compr = + (struct florida_compr *)stream->runtime->private_data; - mutex_lock(&florida->compr_info.lock); + mutex_lock(&compr->lock); tstamp->byte_offset = 0; - tstamp->copied_total = florida->compr_info.total_copied; - mutex_unlock(&florida->compr_info.lock); + tstamp->copied_total = compr->total_copied; + mutex_unlock(&compr->lock); return 0; } @@ -2388,18 +2397,18 @@ static int florida_pointer(struct snd_compr_stream *stream, static int florida_copy(struct snd_compr_stream *stream, char __user *buf, size_t count) { - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct florida_priv *florida = snd_soc_codec_get_drvdata(rtd->codec); + struct florida_compr *compr = + (struct florida_compr *)stream->runtime->private_data; int ret; - mutex_lock(&florida->compr_info.lock); + mutex_lock(&compr->lock); if (stream->direction == SND_COMPRESS_PLAYBACK) ret = -EINVAL; else - ret = wm_adsp_stream_read(florida->compr_info.adsp, buf, count); + ret = wm_adsp_stream_read(compr->adsp, buf, count); - mutex_unlock(&florida->compr_info.lock); + mutex_unlock(&compr->lock); return ret; } @@ -2407,10 +2416,10 @@ static int florida_copy(struct snd_compr_stream *stream, char __user *buf, static int florida_get_caps(struct snd_compr_stream *stream, struct snd_compr_caps *caps) { - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct florida_priv *florida = snd_soc_codec_get_drvdata(rtd->codec); + struct florida_compr *compr = + (struct florida_compr *)stream->runtime->private_data; - mutex_lock(&florida->compr_info.lock); + mutex_lock(&compr->lock); memset(caps, 0, sizeof(*caps)); @@ -2420,9 +2429,9 @@ static int florida_get_caps(struct snd_compr_stream *stream, caps->min_fragments = FLORIDA_DEFAULT_FRAGMENTS; caps->max_fragments = FLORIDA_DEFAULT_FRAGMENTS; - wm_adsp_get_caps(florida->compr_info.adsp, stream, caps); + wm_adsp_get_caps(compr->adsp, stream, caps); - mutex_unlock(&florida->compr_info.lock); + mutex_unlock(&compr->lock); return 0; } diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index c1b8dea2302..e8ebbf94ac3 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -1178,6 +1178,7 @@ static int largo_open(struct snd_compr_stream *stream) largo->compr_info.adsp = &largo->core.adsp[n_adsp]; largo->compr_info.stream = stream; + stream->runtime->private_data = &largo->compr_info; out: mutex_unlock(&largo->compr_info.lock); @@ -1186,19 +1187,24 @@ static int largo_open(struct snd_compr_stream *stream) static int largo_free(struct snd_compr_stream *stream) { - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct largo_priv *largo = snd_soc_codec_get_drvdata(rtd->codec); + struct largo_compr *compr = + (struct largo_compr *)stream->runtime->private_data; - mutex_lock(&largo->compr_info.lock); + if (!compr) + return -EINVAL; - wm_adsp_stream_free(largo->compr_info.adsp); + mutex_lock(&compr->lock); - largo->compr_info.allocated = false; - largo->compr_info.stream = NULL; - largo->compr_info.adsp = NULL; - largo->compr_info.total_copied = 0; + wm_adsp_stream_free(compr->adsp); - mutex_unlock(&largo->compr_info.lock); + compr->allocated = false; + compr->stream = NULL; + compr->adsp = NULL; + compr->total_copied = 0; + + stream->runtime->private_data = NULL; + + mutex_unlock(&compr->lock); return 0; } @@ -1209,7 +1215,8 @@ static int largo_set_params(struct snd_compr_stream *stream, struct snd_soc_pcm_runtime *rtd = stream->private_data; struct largo_priv *largo = snd_soc_codec_get_drvdata(rtd->codec); struct arizona *arizona = largo->core.arizona; - struct largo_compr *compr = &largo->compr_info; + struct largo_compr *compr = + (struct largo_compr *)stream->runtime->private_data; int ret = 0; mutex_lock(&compr->lock); @@ -1244,20 +1251,22 @@ static int largo_trigger(struct snd_compr_stream *stream, int cmd) { struct snd_soc_pcm_runtime *rtd = stream->private_data; struct largo_priv *largo = snd_soc_codec_get_drvdata(rtd->codec); + struct largo_compr *compr = + (struct largo_compr *)stream->runtime->private_data; int ret = 0; bool pending = false; - mutex_lock(&largo->compr_info.lock); + mutex_lock(&compr->lock); switch (cmd) { case SNDRV_PCM_TRIGGER_START: - ret = wm_adsp_stream_start(largo->compr_info.adsp); + ret = wm_adsp_stream_start(compr->adsp); /** * If the stream has already triggered before the stream * opened better process any outstanding data */ - if (largo->compr_info.trig) + if (compr->trig) pending = true; break; case SNDRV_PCM_TRIGGER_STOP: @@ -1267,7 +1276,7 @@ static int largo_trigger(struct snd_compr_stream *stream, int cmd) break; } - mutex_unlock(&largo->compr_info.lock); + mutex_unlock(&compr->lock); if (pending) adsp2_irq(0, largo); @@ -1278,13 +1287,13 @@ static int largo_trigger(struct snd_compr_stream *stream, int cmd) static int largo_pointer(struct snd_compr_stream *stream, struct snd_compr_tstamp *tstamp) { - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct largo_priv *largo = snd_soc_codec_get_drvdata(rtd->codec); + struct largo_compr *compr = + (struct largo_compr *)stream->runtime->private_data; - mutex_lock(&largo->compr_info.lock); + mutex_lock(&compr->lock); tstamp->byte_offset = 0; - tstamp->copied_total = largo->compr_info.total_copied; - mutex_unlock(&largo->compr_info.lock); + tstamp->copied_total = compr->total_copied; + mutex_unlock(&compr->lock); return 0; } @@ -1292,18 +1301,18 @@ static int largo_pointer(struct snd_compr_stream *stream, static int largo_copy(struct snd_compr_stream *stream, char __user *buf, size_t count) { - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct largo_priv *largo = snd_soc_codec_get_drvdata(rtd->codec); + struct largo_compr *compr = + (struct largo_compr *)stream->runtime->private_data; int ret; - mutex_lock(&largo->compr_info.lock); + mutex_lock(&compr->lock); if (stream->direction == SND_COMPRESS_PLAYBACK) ret = -EINVAL; else - ret = wm_adsp_stream_read(largo->compr_info.adsp, buf, count); + ret = wm_adsp_stream_read(compr->adsp, buf, count); - mutex_unlock(&largo->compr_info.lock); + mutex_unlock(&compr->lock); return ret; } @@ -1311,10 +1320,10 @@ static int largo_copy(struct snd_compr_stream *stream, char __user *buf, static int largo_get_caps(struct snd_compr_stream *stream, struct snd_compr_caps *caps) { - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct largo_priv *largo = snd_soc_codec_get_drvdata(rtd->codec); + struct largo_compr *compr = + (struct largo_compr *)stream->runtime->private_data; - mutex_lock(&largo->compr_info.lock); + mutex_lock(&compr->lock); memset(caps, 0, sizeof(*caps)); @@ -1324,9 +1333,9 @@ static int largo_get_caps(struct snd_compr_stream *stream, caps->min_fragments = LARGO_DEFAULT_FRAGMENTS; caps->max_fragments = LARGO_DEFAULT_FRAGMENTS; - wm_adsp_get_caps(largo->compr_info.adsp, stream, caps); + wm_adsp_get_caps(compr->adsp, stream, caps); - mutex_unlock(&largo->compr_info.lock); + mutex_unlock(&compr->lock); return 0; } diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index c01adc657bf..a8dc8265685 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -1888,6 +1888,7 @@ static int marley_open(struct snd_compr_stream *stream) marley->compr_info.adsp = &marley->core.adsp[n_adsp]; marley->compr_info.stream = stream; + stream->runtime->private_data = &marley->compr_info; out: mutex_unlock(&marley->compr_info.lock); @@ -1896,19 +1897,24 @@ static int marley_open(struct snd_compr_stream *stream) static int marley_free(struct snd_compr_stream *stream) { - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct marley_priv *marley = snd_soc_codec_get_drvdata(rtd->codec); + struct marley_compr *compr = + (struct marley_compr *)stream->runtime->private_data; - mutex_lock(&marley->compr_info.lock); + if (!compr) + return -EINVAL; - wm_adsp_stream_free(marley->compr_info.adsp); + mutex_lock(&compr->lock); - marley->compr_info.allocated = false; - marley->compr_info.stream = NULL; - marley->compr_info.adsp = NULL; - marley->compr_info.total_copied = 0; + wm_adsp_stream_free(compr->adsp); - mutex_unlock(&marley->compr_info.lock); + compr->allocated = false; + compr->stream = NULL; + compr->adsp = NULL; + compr->total_copied = 0; + + stream->runtime->private_data = NULL; + + mutex_unlock(&compr->lock); return 0; } @@ -1919,7 +1925,8 @@ static int marley_set_params(struct snd_compr_stream *stream, struct snd_soc_pcm_runtime *rtd = stream->private_data; struct marley_priv *marley = snd_soc_codec_get_drvdata(rtd->codec); struct arizona *arizona = marley->core.arizona; - struct marley_compr *compr = &marley->compr_info; + struct marley_compr *compr = + (struct marley_compr *)stream->runtime->private_data; int ret = 0; mutex_lock(&compr->lock); @@ -1954,20 +1961,22 @@ static int marley_trigger(struct snd_compr_stream *stream, int cmd) { struct snd_soc_pcm_runtime *rtd = stream->private_data; struct marley_priv *marley = snd_soc_codec_get_drvdata(rtd->codec); + struct marley_compr *compr = + (struct marley_compr *)stream->runtime->private_data; int ret = 0; bool pending = false; - mutex_lock(&marley->compr_info.lock); + mutex_lock(&compr->lock); switch (cmd) { case SNDRV_PCM_TRIGGER_START: - ret = wm_adsp_stream_start(marley->compr_info.adsp); + ret = wm_adsp_stream_start(compr->adsp); /** * If the stream has already triggered before the stream * opened better process any outstanding data */ - if (marley->compr_info.trig) + if (compr->trig) pending = true; break; case SNDRV_PCM_TRIGGER_STOP: @@ -1977,7 +1986,7 @@ static int marley_trigger(struct snd_compr_stream *stream, int cmd) break; } - mutex_unlock(&marley->compr_info.lock); + mutex_unlock(&compr->lock); if (pending) adsp2_irq(0, marley); @@ -1988,13 +1997,13 @@ static int marley_trigger(struct snd_compr_stream *stream, int cmd) static int marley_pointer(struct snd_compr_stream *stream, struct snd_compr_tstamp *tstamp) { - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct marley_priv *marley = snd_soc_codec_get_drvdata(rtd->codec); + struct marley_compr *compr = + (struct marley_compr *)stream->runtime->private_data; - mutex_lock(&marley->compr_info.lock); + mutex_lock(&compr->lock); tstamp->byte_offset = 0; - tstamp->copied_total = marley->compr_info.total_copied; - mutex_unlock(&marley->compr_info.lock); + tstamp->copied_total = compr->total_copied; + mutex_unlock(&compr->lock); return 0; } @@ -2002,18 +2011,18 @@ static int marley_pointer(struct snd_compr_stream *stream, static int marley_copy(struct snd_compr_stream *stream, char __user *buf, size_t count) { - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct marley_priv *marley = snd_soc_codec_get_drvdata(rtd->codec); + struct marley_compr *compr = + (struct marley_compr *)stream->runtime->private_data; int ret; - mutex_lock(&marley->compr_info.lock); + mutex_lock(&compr->lock); if (stream->direction == SND_COMPRESS_PLAYBACK) ret = -EINVAL; else - ret = wm_adsp_stream_read(marley->compr_info.adsp, buf, count); + ret = wm_adsp_stream_read(compr->adsp, buf, count); - mutex_unlock(&marley->compr_info.lock); + mutex_unlock(&compr->lock); return ret; } @@ -2021,10 +2030,10 @@ static int marley_copy(struct snd_compr_stream *stream, char __user *buf, static int marley_get_caps(struct snd_compr_stream *stream, struct snd_compr_caps *caps) { - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct marley_priv *marley = snd_soc_codec_get_drvdata(rtd->codec); + struct marley_compr *compr = + (struct marley_compr *)stream->runtime->private_data; - mutex_lock(&marley->compr_info.lock); + mutex_lock(&compr->lock); memset(caps, 0, sizeof(*caps)); @@ -2034,9 +2043,9 @@ static int marley_get_caps(struct snd_compr_stream *stream, caps->min_fragments = MARLEY_DEFAULT_FRAGMENTS; caps->max_fragments = MARLEY_DEFAULT_FRAGMENTS; - wm_adsp_get_caps(marley->compr_info.adsp, stream, caps); + wm_adsp_get_caps(compr->adsp, stream, caps); - mutex_unlock(&marley->compr_info.lock); + mutex_unlock(&compr->lock); return 0; } diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index bfc2f0d5182..d74919f0637 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -2741,6 +2741,7 @@ static int moon_open(struct snd_compr_stream *stream) moon->compr_info.adsp = &moon->core.adsp[n_adsp]; moon->compr_info.stream = stream; + stream->runtime->private_data = &moon->compr_info; out: mutex_unlock(&moon->compr_info.lock); @@ -2749,19 +2750,24 @@ static int moon_open(struct snd_compr_stream *stream) static int moon_free(struct snd_compr_stream *stream) { - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct moon_priv *moon = snd_soc_codec_get_drvdata(rtd->codec); + struct moon_compr *compr = + (struct moon_compr *)stream->runtime->private_data; - mutex_lock(&moon->compr_info.lock); + if (!compr) + return -EINVAL; - wm_adsp_stream_free(moon->compr_info.adsp); + mutex_lock(&compr->lock); - moon->compr_info.allocated = false; - moon->compr_info.stream = NULL; - moon->compr_info.adsp = NULL; - moon->compr_info.total_copied = 0; + wm_adsp_stream_free(compr->adsp); - mutex_unlock(&moon->compr_info.lock); + compr->allocated = false; + compr->stream = NULL; + compr->adsp = NULL; + compr->total_copied = 0; + + stream->runtime->private_data = NULL; + + mutex_unlock(&compr->lock); return 0; } @@ -2772,7 +2778,8 @@ static int moon_set_params(struct snd_compr_stream *stream, struct snd_soc_pcm_runtime *rtd = stream->private_data; struct moon_priv *moon = snd_soc_codec_get_drvdata(rtd->codec); struct arizona *arizona = moon->core.arizona; - struct moon_compr *compr = &moon->compr_info; + struct moon_compr *compr = + (struct moon_compr *)stream->runtime->private_data; int ret = 0; mutex_lock(&compr->lock); @@ -2808,20 +2815,22 @@ static int moon_trigger(struct snd_compr_stream *stream, int cmd) struct snd_soc_pcm_runtime *rtd = stream->private_data; struct moon_priv *moon = snd_soc_codec_get_drvdata(rtd->codec); struct arizona *arizona = moon->core.arizona; + struct moon_compr *compr = + (struct moon_compr *)stream->runtime->private_data; int ret = 0; bool pending = false; - mutex_lock(&moon->compr_info.lock); + mutex_lock(&compr->lock); switch (cmd) { case SNDRV_PCM_TRIGGER_START: - ret = wm_adsp_stream_start(moon->compr_info.adsp); + ret = wm_adsp_stream_start(compr->adsp); /** * If the stream has already triggered before the stream * opened better process any outstanding data */ - if (moon->compr_info.trig) + if (compr->trig) pending = true; break; case SNDRV_PCM_TRIGGER_STOP: @@ -2831,7 +2840,7 @@ static int moon_trigger(struct snd_compr_stream *stream, int cmd) break; } - mutex_unlock(&moon->compr_info.lock); + mutex_unlock(&compr->lock); /* * Stream has already trigerred, force irq handler to run @@ -2847,13 +2856,13 @@ static int moon_trigger(struct snd_compr_stream *stream, int cmd) static int moon_pointer(struct snd_compr_stream *stream, struct snd_compr_tstamp *tstamp) { - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct moon_priv *moon = snd_soc_codec_get_drvdata(rtd->codec); + struct moon_compr *compr = + (struct moon_compr *)stream->runtime->private_data; - mutex_lock(&moon->compr_info.lock); + mutex_lock(&compr->lock); tstamp->byte_offset = 0; - tstamp->copied_total = moon->compr_info.total_copied; - mutex_unlock(&moon->compr_info.lock); + tstamp->copied_total = compr->total_copied; + mutex_unlock(&compr->lock); return 0; } @@ -2861,18 +2870,18 @@ static int moon_pointer(struct snd_compr_stream *stream, static int moon_copy(struct snd_compr_stream *stream, char __user *buf, size_t count) { - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct moon_priv *moon = snd_soc_codec_get_drvdata(rtd->codec); + struct moon_compr *compr = + (struct moon_compr *)stream->runtime->private_data; int ret; - mutex_lock(&moon->compr_info.lock); + mutex_lock(&compr->lock); if (stream->direction == SND_COMPRESS_PLAYBACK) ret = -EINVAL; else - ret = wm_adsp_stream_read(moon->compr_info.adsp, buf, count); + ret = wm_adsp_stream_read(compr->adsp, buf, count); - mutex_unlock(&moon->compr_info.lock); + mutex_unlock(&compr->lock); return ret; } @@ -2880,10 +2889,10 @@ static int moon_copy(struct snd_compr_stream *stream, char __user *buf, static int moon_get_caps(struct snd_compr_stream *stream, struct snd_compr_caps *caps) { - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct moon_priv *moon = snd_soc_codec_get_drvdata(rtd->codec); + struct moon_compr *compr = + (struct moon_compr *)stream->runtime->private_data; - mutex_lock(&moon->compr_info.lock); + mutex_lock(&compr->lock); memset(caps, 0, sizeof(*caps)); @@ -2893,9 +2902,9 @@ static int moon_get_caps(struct snd_compr_stream *stream, caps->min_fragments = MOON_DEFAULT_FRAGMENTS; caps->max_fragments = MOON_DEFAULT_FRAGMENTS; - wm_adsp_get_caps(moon->compr_info.adsp, stream, caps); + wm_adsp_get_caps(compr->adsp, stream, caps); - mutex_unlock(&moon->compr_info.lock); + mutex_unlock(&compr->lock); return 0; } From 28088df42ec7066218e6abe77fe29e0976b26782 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 13 Feb 2015 14:29:16 +0000 Subject: [PATCH 1044/1167] ASoC: arizona: tie compr_info to compressed DAI To allow for multiple compressed streams, have one instance of the compr_info struct for each available compressed DAI instead of sharing one. Each compr_info is tied to a specific DAI and ADSP because we need to be able to service interrupts from the firmware even if the compressed stream has not been opened. There is no advantage to dynamically allocating compr_info to compressed streams because we need to have exactly the number of compr_info as compressed DAIs to be able to support running all compressed DAIs at the same time so they may as well be tied to each DAI. Change-Id: Ie27ea4292716f9dd83aefe9fe4c57a229e2ce190 Signed-off-by: Richard Fitzgerald Signed-off-by: Simon Trimmer --- sound/soc/codecs/clearwater.c | 187 ++++++++++++++++++++++----------- sound/soc/codecs/florida.c | 182 ++++++++++++++++++++++---------- sound/soc/codecs/largo.c | 175 +++++++++++++++++++++---------- sound/soc/codecs/marley.c | 191 +++++++++++++++++++++++----------- sound/soc/codecs/moon.c | 190 ++++++++++++++++++++++----------- 5 files changed, 636 insertions(+), 289 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 3e7563f2232..509176ee0de 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -35,6 +35,11 @@ #define CLEARWATER_NUM_ADSP 7 +/* Number of compressed DAI hookups, each pair of DSP and dummy CPU + * are counted as one DAI + */ +#define CLEARWATER_NUM_COMPR_DAI 2 + #define CLEARWATER_DEFAULT_FRAGMENTS 1 #define CLEARWATER_DEFAULT_FRAGMENT_SIZE 4096 @@ -187,23 +192,38 @@ static int clearwater_rate_put(struct snd_kcontrol *kcontrol, struct clearwater_compr { struct mutex lock; - - struct snd_compr_stream *stream; + const char *dai_name; struct wm_adsp *adsp; size_t total_copied; bool allocated; bool trig; + + struct snd_compr_stream *stream; }; struct clearwater_priv { struct arizona_priv core; struct arizona_fll fll[3]; - struct clearwater_compr compr_info; + struct clearwater_compr compr_info[CLEARWATER_NUM_COMPR_DAI]; struct mutex fw_lock; }; +static const struct { + const char *dai_name; + int adsp_num; +} compr_dai_mapping[CLEARWATER_NUM_COMPR_DAI] = { + { + .dai_name = "clearwater-dsp-voicectrl", + .adsp_num = 5, + }, + { + .dai_name = "clearwater-dsp-trace", + .adsp_num = 0, + }, +}; + static const struct wm_adsp_region clearwater_dsp1_regions[] = { { .type = WMFW_ADSP2_PM, .base = 0x080000 }, { .type = WMFW_ADSP2_ZM, .base = 0x0e0000 }, @@ -617,7 +637,7 @@ static int clearwater_adsp_power_ev(struct snd_soc_dapm_widget *w, struct arizona_priv *priv = &clearwater->core; struct arizona *arizona = priv->arizona; unsigned int freq; - int ret; + int i, ret; ret = regmap_read(arizona->regmap, CLEARWATER_DSP_CLOCK_1, &freq); if (ret != 0) { @@ -630,10 +650,13 @@ static int clearwater_adsp_power_ev(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_PRE_PMU: - if (w->shift == 5) { - mutex_lock(&clearwater->compr_info.lock); - clearwater->compr_info.trig = false; - mutex_unlock(&clearwater->compr_info.lock); + for (i = 0; i < ARRAY_SIZE(clearwater->compr_info); ++i) { + if (clearwater->compr_info[i].adsp->num != w->shift + 1) + continue; + + mutex_lock(&clearwater->compr_info[i].lock); + clearwater->compr_info[i].trig = false; + mutex_unlock(&clearwater->compr_info[i].lock); } break; default: @@ -2724,87 +2747,108 @@ static struct snd_soc_dai_driver clearwater_dai[] = { }, }; -static irqreturn_t adsp2_irq(int irq, void *data) +static void clearwater_compr_irq(struct clearwater_priv *clearwater, + struct clearwater_compr *compr) { - struct clearwater_priv *clearwater = data; - struct clearwater_compr *compr_info = &clearwater->compr_info; struct arizona *arizona = clearwater->core.arizona; - struct wm_adsp *adsp6 = &clearwater->core.adsp[5]; - struct wm_adsp *adsp1 = &clearwater->core.adsp[0]; bool trigger; int ret, avail; - mutex_lock(&clearwater->compr_info.lock); + mutex_lock(&compr->lock); + + ret = wm_adsp_stream_handle_irq(compr->adsp, &trigger); + if (ret < 0) { + dev_err(arizona->dev, + "Failed to capture DSP%d data: %d\n", + compr->adsp->num, ret); + goto out; + } - if (adsp6->running) { - ret = wm_adsp_stream_handle_irq(adsp6, &trigger); - if (ret >= 0) { - if (adsp6 == compr_info->adsp) - compr_info->total_copied += ret; + compr->total_copied += ret; - if (!compr_info->trig && trigger) { - compr_info->trig = true; - if (arizona->pdata.ez2ctrl_trigger && - adsp6->fw_features.ez2control_trigger) - arizona->pdata.ez2ctrl_trigger(); - } - } - } else if (adsp1->running) { - ret = wm_adsp_stream_handle_irq(adsp1, &trigger); + if (trigger && !compr->trig) { + compr->trig = true; - if (ret >= 0 && (adsp1 == compr_info->adsp)) - compr_info->total_copied += ret; + if (compr->adsp->fw_features.ez2control_trigger && + arizona->pdata.ez2ctrl_trigger) + arizona->pdata.ez2ctrl_trigger(); } - if (compr_info->allocated) { - avail = wm_adsp_stream_avail(compr_info->adsp); + if (compr->allocated) { + avail = wm_adsp_stream_avail(compr->adsp); if (avail > CLEARWATER_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(compr_info->stream); + snd_compr_fragment_elapsed(compr->stream); } - mutex_unlock(&compr_info->lock); +out: + mutex_unlock(&compr->lock); +} +static irqreturn_t clearwater_adsp2_irq(int irq, void *data) +{ + struct clearwater_priv *clearwater = data; + int i; + + for (i = 0; i < ARRAY_SIZE(clearwater->compr_info); ++i) { + if (!clearwater->compr_info[i].adsp->running) + continue; + + clearwater_compr_irq(clearwater, &clearwater->compr_info[i]); + } return IRQ_HANDLED; } +static struct clearwater_compr *clearwater_get_compr( + struct snd_soc_pcm_runtime *rtd, + struct clearwater_priv *clearwater) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(clearwater->compr_info); ++i) { + if (strcmp(rtd->codec_dai->name, + clearwater->compr_info[i].dai_name) == 0) + return &clearwater->compr_info[i]; + } + + return NULL; +} + static int clearwater_open(struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(rtd->codec); struct arizona *arizona = clearwater->core.arizona; - int n_adsp, ret = 0; - - mutex_lock(&clearwater->compr_info.lock); - - if (clearwater->compr_info.stream) { - ret = -EBUSY; - goto out; - } + struct clearwater_compr *compr; + int ret = 0; - if (strcmp(rtd->codec_dai->name, "clearwater-dsp-voicectrl") == 0) { - n_adsp = 5; - } else if (strcmp(rtd->codec_dai->name, "clearwater-dsp-trace") == 0) { - n_adsp = 0; - } else { + /* Find a compr_info for this DAI */ + compr = clearwater_get_compr(rtd, clearwater); + if (!compr) { dev_err(arizona->dev, "No suitable compressed stream for dai '%s'\n", rtd->codec_dai->name); - ret = -EINVAL; + return -EINVAL; + } + + mutex_lock(&compr->lock); + + if (compr->stream) { + ret = -EBUSY; goto out; } - if (!wm_adsp_compress_supported(&clearwater->core.adsp[n_adsp], stream)) { + if (!wm_adsp_compress_supported(compr->adsp, stream)) { dev_err(arizona->dev, - "No suitable firmware for compressed stream\n"); + "No suitable firmware for DAI '%s'\n", + rtd->codec_dai->name); ret = -EINVAL; goto out; } - clearwater->compr_info.adsp = &clearwater->core.adsp[n_adsp]; - clearwater->compr_info.stream = stream; - stream->runtime->private_data = &clearwater->compr_info; + compr->stream = stream; + stream->runtime->private_data = compr; out: - mutex_unlock(&clearwater->compr_info.lock); + mutex_unlock(&compr->lock); return ret; } @@ -2823,7 +2867,6 @@ static int clearwater_free(struct snd_compr_stream *stream) compr->allocated = false; compr->stream = NULL; - compr->adsp = NULL; compr->total_copied = 0; stream->runtime->private_data = NULL; @@ -3014,7 +3057,8 @@ static int clearwater_codec_probe(struct snd_soc_codec *codec) priv->core.arizona->dapm = &codec->dapm; ret = arizona_request_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, - "ADSP2 interrupt 1", adsp2_irq, priv); + "ADSP2 interrupt 1", + clearwater_adsp2_irq, priv); if (ret != 0) { dev_err(arizona->dev, "Failed to request DSP IRQ: %d\n", ret); return ret; @@ -3113,6 +3157,30 @@ static struct snd_soc_platform_driver clearwater_compr_platform = { .compr_ops = &clearwater_compr_ops, }; +static void clearwater_init_compr_info(struct clearwater_priv *clearwater) +{ + int i; + + BUILD_BUG_ON(ARRAY_SIZE(clearwater->compr_info) != + ARRAY_SIZE(compr_dai_mapping)); + + for (i = 0; i < ARRAY_SIZE(clearwater->compr_info); ++i) { + mutex_init(&clearwater->compr_info[i].lock); + clearwater->compr_info[i].dai_name = + compr_dai_mapping[i].dai_name; + clearwater->compr_info[i].adsp = + &clearwater->core.adsp[compr_dai_mapping[i].adsp_num]; + } +} + +static void clearwater_destroy_compr_info(struct clearwater_priv *clearwater) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(clearwater->compr_info); ++i) + mutex_destroy(&clearwater->compr_info[i].lock); +} + static int clearwater_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); @@ -3131,7 +3199,6 @@ static int clearwater_probe(struct platform_device *pdev) * locate regulator supplies */ pdev->dev.of_node = arizona->dev->of_node; - mutex_init(&clearwater->compr_info.lock); mutex_init(&clearwater->fw_lock); clearwater->core.arizona = arizona; @@ -3168,6 +3235,8 @@ static int clearwater_probe(struct platform_device *pdev) return ret; } + clearwater_init_compr_info(clearwater); + for (i = 0; i < ARRAY_SIZE(clearwater->fll); i++) { clearwater->fll[i].vco_mult = 3; clearwater->fll[i].min_outdiv = 3; @@ -3216,7 +3285,7 @@ static int clearwater_probe(struct platform_device *pdev) return ret; error: - mutex_destroy(&clearwater->compr_info.lock); + clearwater_destroy_compr_info(clearwater); mutex_destroy(&clearwater->fw_lock); return ret; @@ -3229,7 +3298,7 @@ static int clearwater_remove(struct platform_device *pdev) snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); - mutex_destroy(&clearwater->compr_info.lock); + clearwater_destroy_compr_info(clearwater); mutex_destroy(&clearwater->fw_lock); return 0; diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index e7440758cba..12ce32d0c5d 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -35,28 +35,49 @@ #define FLORIDA_NUM_ADSP 4 +/* Number of compressed DAI hookups, each pair of DSP and dummy CPU + * are counted as one DAI + */ +#define FLORIDA_NUM_COMPR_DAI 2 + #define FLORIDA_DEFAULT_FRAGMENTS 1 #define FLORIDA_DEFAULT_FRAGMENT_SIZE 4096 struct florida_compr { struct mutex lock; + const char *dai_name; - struct snd_compr_stream *stream; struct wm_adsp *adsp; size_t total_copied; bool allocated; bool trig; + + struct snd_compr_stream *stream; }; struct florida_priv { struct arizona_priv core; struct arizona_fll fll[2]; - struct florida_compr compr_info; + struct florida_compr compr_info[FLORIDA_NUM_COMPR_DAI]; struct mutex fw_lock; }; +static const struct { + const char *dai_name; + int adsp_num; +} compr_dai_mapping[FLORIDA_NUM_COMPR_DAI] = { + { + .dai_name = "florida-dsp-voicectrl", + .adsp_num = 2, + }, + { + .dai_name = "florida-dsp-trace", + .adsp_num = 0, + }, +}; + static const struct wm_adsp_region florida_dsp1_regions[] = { { .type = WMFW_ADSP2_PM, .base = 0x100000 }, { .type = WMFW_ADSP2_ZM, .base = 0x180000 }, @@ -213,6 +234,7 @@ static int florida_adsp_power_ev(struct snd_soc_dapm_widget *w, struct arizona *arizona = dev_get_drvdata(codec->dev->parent); unsigned int v; int ret; + int i; ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &v); if (ret != 0) { @@ -225,10 +247,13 @@ static int florida_adsp_power_ev(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_PRE_PMU: - if (w->shift == 2) { - mutex_lock(&florida->compr_info.lock); - florida->compr_info.trig = false; - mutex_unlock(&florida->compr_info.lock); + for (i = 0; i < ARRAY_SIZE(florida->compr_info); ++i) { + if (florida->compr_info[i].adsp->num != w->shift + 1) + continue; + + mutex_lock(&florida->compr_info[i].lock); + florida->compr_info[i].trig = false; + mutex_unlock(&florida->compr_info[i].lock); } break; default: @@ -2197,86 +2222,107 @@ static struct snd_soc_dai_driver florida_dai[] = { }, }; -static irqreturn_t adsp2_irq(int irq, void *data) +static void florida_compr_irq(struct florida_priv *florida, + struct florida_compr *compr) { - struct florida_priv *florida = data; struct arizona *arizona = florida->core.arizona; - struct wm_adsp *adsp3 = &florida->core.adsp[2]; - struct wm_adsp *adsp1 = &florida->core.adsp[0]; bool trigger; int ret, avail; - mutex_lock(&florida->compr_info.lock); + mutex_lock(&compr->lock); - if (adsp3->running) { - ret = wm_adsp_stream_handle_irq(adsp3, &trigger); - if (ret >= 0) { - if (adsp3 == florida->compr_info.adsp) - florida->compr_info.total_copied += ret; + ret = wm_adsp_stream_handle_irq(compr->adsp, &trigger); + if (ret < 0) { + dev_err(arizona->dev, + "Failed to capture DSP%d data: %d\n", + compr->adsp->num, ret); + goto out; + } - if (!florida->compr_info.trig && trigger) { - florida->compr_info.trig = true; - if (arizona->pdata.ez2ctrl_trigger && - adsp3->fw_features.ez2control_trigger) - arizona->pdata.ez2ctrl_trigger(); - } - } - } else if (adsp1->running) { - ret = wm_adsp_stream_handle_irq(adsp1, &trigger); + compr->total_copied += ret; + + if (trigger && !compr->trig) { + compr->trig = true; - if (ret >= 0 && (adsp1 == florida->compr_info.adsp)) - florida->compr_info.total_copied += ret; + if (compr->adsp->fw_features.ez2control_trigger && + arizona->pdata.ez2ctrl_trigger) + arizona->pdata.ez2ctrl_trigger(); } - if (florida->compr_info.allocated) { - avail = wm_adsp_stream_avail(florida->compr_info.adsp); + if (compr->allocated) { + avail = wm_adsp_stream_avail(compr->adsp); if (avail > FLORIDA_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(florida->compr_info.stream); + snd_compr_fragment_elapsed(compr->stream); } - mutex_unlock(&florida->compr_info.lock); +out: + mutex_unlock(&compr->lock); +} + +static irqreturn_t florida_adsp2_irq(int irq, void *data) +{ + struct florida_priv *florida = data; + int i; + + for (i = 0; i < ARRAY_SIZE(florida->compr_info); ++i) { + if (!florida->compr_info[i].adsp->running) + continue; + + florida_compr_irq(florida, &florida->compr_info[i]); + } return IRQ_HANDLED; } +static struct florida_compr *florida_get_compr(struct snd_soc_pcm_runtime *rtd, + struct florida_priv *florida) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(florida->compr_info); ++i) { + if (strcmp(rtd->codec_dai->name, + florida->compr_info[i].dai_name) == 0) + return &florida->compr_info[i]; + } + + return NULL; +} + static int florida_open(struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; struct florida_priv *florida = snd_soc_codec_get_drvdata(rtd->codec); struct arizona *arizona = florida->core.arizona; - int n_adsp, ret = 0; - - mutex_lock(&florida->compr_info.lock); - - if (florida->compr_info.stream) { - ret = -EBUSY; - goto out; - } + struct florida_compr *compr; + int ret = 0; - if (strcmp(rtd->codec_dai->name, "florida-dsp-voicectrl") == 0) { - n_adsp = 2; - } else if (strcmp(rtd->codec_dai->name, "florida-dsp-trace") == 0) { - n_adsp = 0; - } else { + /* Find a compr_info for this DAI */ + compr = florida_get_compr(rtd, florida); + if (!compr) { dev_err(arizona->dev, "No suitable compressed stream for dai '%s'\n", rtd->codec_dai->name); - ret = -EINVAL; + return -EINVAL; + } + + mutex_lock(&compr->lock); + + if (compr->stream) { + ret = -EBUSY; goto out; } - if (!wm_adsp_compress_supported(&florida->core.adsp[n_adsp], stream)) { + if (!wm_adsp_compress_supported(compr->adsp, stream)) { dev_err(arizona->dev, "No suitable firmware for compressed stream\n"); ret = -EINVAL; goto out; } - florida->compr_info.adsp = &florida->core.adsp[n_adsp]; - florida->compr_info.stream = stream; - stream->runtime->private_data = &florida->compr_info; + compr->stream = stream; + stream->runtime->private_data = compr; out: - mutex_unlock(&florida->compr_info.lock); + mutex_unlock(&compr->lock); return ret; } @@ -2295,7 +2341,6 @@ static int florida_free(struct snd_compr_stream *stream) compr->allocated = false; compr->stream = NULL; - compr->adsp = NULL; compr->total_copied = 0; stream->runtime->private_data = NULL; @@ -2375,7 +2420,7 @@ static int florida_trigger(struct snd_compr_stream *stream, int cmd) mutex_unlock(&compr->lock); if (pending) - adsp2_irq(0, florida); + florida_compr_irq(florida, compr); return ret; } @@ -2477,7 +2522,8 @@ static int florida_codec_probe(struct snd_soc_codec *codec) priv->core.arizona->dapm = &codec->dapm; ret = arizona_request_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, - "ADSP2 interrupt 1", adsp2_irq, priv); + "ADSP2 interrupt 1", + florida_adsp2_irq, priv); if (ret != 0) { dev_err(arizona->dev, "Failed to request DSP IRQ: %d\n", ret); return ret; @@ -2576,6 +2622,29 @@ static struct snd_soc_platform_driver florida_compr_platform = { .compr_ops = &florida_compr_ops, }; +static void florida_init_compr_info(struct florida_priv *florida) +{ + int i; + + BUILD_BUG_ON(ARRAY_SIZE(florida->compr_info) != + ARRAY_SIZE(compr_dai_mapping)); + + for (i = 0; i < ARRAY_SIZE(florida->compr_info); ++i) { + mutex_init(&florida->compr_info[i].lock); + florida->compr_info[i].dai_name = compr_dai_mapping[i].dai_name; + florida->compr_info[i].adsp = + &florida->core.adsp[compr_dai_mapping[i].adsp_num]; + } +} + +static void florida_destroy_compr_info(struct florida_priv *florida) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(florida->compr_info); ++i) + mutex_destroy(&florida->compr_info[i].lock); +} + static int florida_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); @@ -2594,7 +2663,6 @@ static int florida_probe(struct platform_device *pdev) * locate regulator supplies */ pdev->dev.of_node = arizona->dev->of_node; - mutex_init(&florida->compr_info.lock); mutex_init(&florida->fw_lock); florida->core.arizona = arizona; @@ -2626,6 +2694,8 @@ static int florida_probe(struct platform_device *pdev) goto error; } + florida_init_compr_info(florida); + for (i = 0; i < ARRAY_SIZE(florida->fll); i++) florida->fll[i].vco_mult = 3; @@ -2668,7 +2738,7 @@ static int florida_probe(struct platform_device *pdev) return ret; error: - mutex_destroy(&florida->compr_info.lock); + florida_destroy_compr_info(florida); mutex_destroy(&florida->fw_lock); return ret; @@ -2681,7 +2751,7 @@ static int florida_remove(struct platform_device *pdev) snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); - mutex_destroy(&florida->compr_info.lock); + florida_destroy_compr_info(florida); mutex_destroy(&florida->fw_lock); return 0; diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index e8ebbf94ac3..b210b19e10d 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -33,28 +33,45 @@ #include "wm_adsp.h" #include "largo.h" +/* Number of compressed DAI hookups, each pair of DSP and dummy CPU + * are counted as one DAI + */ +#define LARGO_NUM_COMPR_DAI 1 + #define LARGO_DEFAULT_FRAGMENTS 1 #define LARGO_DEFAULT_FRAGMENT_SIZE 4096 struct largo_compr { struct mutex lock; + const char *dai_name; - struct snd_compr_stream *stream; struct wm_adsp *adsp; size_t total_copied; bool allocated; bool trig; + + struct snd_compr_stream *stream; }; struct largo_priv { struct arizona_priv core; struct arizona_fll fll[2]; - struct largo_compr compr_info; + struct largo_compr compr_info[LARGO_NUM_COMPR_DAI]; struct mutex fw_lock; }; +static const struct { + const char *dai_name; + int adsp_num; +} compr_dai_mapping[LARGO_NUM_COMPR_DAI] = { + { + .dai_name = "largo-dsp-voicectrl", + .adsp_num = 2, + }, +}; + static const struct wm_adsp_region largo_dsp2_regions[] = { { .type = WMFW_ADSP2_PM, .base = 0x200000 }, { .type = WMFW_ADSP2_ZM, .base = 0x280000 }, @@ -82,6 +99,7 @@ static int largo_adsp_power_ev(struct snd_soc_dapm_widget *w, struct arizona *arizona = dev_get_drvdata(codec->dev->parent); unsigned int v; int ret; + int i; ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &v); if (ret != 0) { @@ -94,10 +112,13 @@ static int largo_adsp_power_ev(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_PRE_PMU: - if (w->shift == 2) { - mutex_lock(&largo->compr_info.lock); - largo->compr_info.trig = false; - mutex_unlock(&largo->compr_info.lock); + for (i = 0; i < ARRAY_SIZE(largo->compr_info); ++i) { + if (largo->compr_info[i].adsp->num != w->shift + 1) + continue; + + mutex_lock(&largo->compr_info[i].lock); + largo->compr_info[i].trig = false; + mutex_unlock(&largo->compr_info[i].lock); } break; default: @@ -1103,84 +1124,107 @@ static struct snd_soc_dai_driver largo_dai[] = { }, }; -static irqreturn_t adsp2_irq(int irq, void *data) +static void largo_compr_irq(struct largo_priv *largo, + struct largo_compr *compr) { - struct largo_priv *largo = data; struct arizona *arizona = largo->core.arizona; - struct wm_adsp *adsp3 = &largo->core.adsp[2]; - struct wm_adsp *adsp1 = &largo->core.adsp[0]; bool trigger; int ret, avail; - mutex_lock(&largo->compr_info.lock); + mutex_lock(&compr->lock); - if (adsp3->running) { - ret = wm_adsp_stream_handle_irq(adsp3, &trigger); - if (ret >= 0) { - if (adsp3 == largo->compr_info.adsp) - largo->compr_info.total_copied += ret; + ret = wm_adsp_stream_handle_irq(compr->adsp, &trigger); + if (ret < 0) { + dev_err(arizona->dev, + "Failed to capture DSP%d data: %d\n", + compr->adsp->num, ret); + goto out; + } - if (!largo->compr_info.trig && trigger) { - largo->compr_info.trig = true; - if (arizona->pdata.ez2ctrl_trigger && - adsp3->fw_features.ez2control_trigger) - arizona->pdata.ez2ctrl_trigger(); - } - } - } else if (adsp1->running) { - ret = wm_adsp_stream_handle_irq(adsp1, &trigger); + compr->total_copied += ret; - if (ret >= 0 && (adsp1 == largo->compr_info.adsp)) - largo->compr_info.total_copied += ret; + if (trigger && !compr->trig) { + compr->trig = true; + + if (compr->adsp->fw_features.ez2control_trigger && + arizona->pdata.ez2ctrl_trigger) + arizona->pdata.ez2ctrl_trigger(); } - if (largo->compr_info.allocated) { - avail = wm_adsp_stream_avail(largo->compr_info.adsp); + if (compr->allocated) { + avail = wm_adsp_stream_avail(compr->adsp); if (avail > LARGO_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(largo->compr_info.stream); + snd_compr_fragment_elapsed(compr->stream); } - mutex_unlock(&largo->compr_info.lock); +out: + mutex_unlock(&compr->lock); +} + +static irqreturn_t largo_adsp2_irq(int irq, void *data) +{ + struct largo_priv *largo = data; + int i; + + for (i = 0; i < ARRAY_SIZE(largo->compr_info); ++i) { + if (!largo->compr_info[i].adsp->running) + continue; + + largo_compr_irq(largo, &largo->compr_info[i]); + } return IRQ_HANDLED; } +static struct largo_compr *largo_get_compr(struct snd_soc_pcm_runtime *rtd, + struct largo_priv *largo) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(largo->compr_info); ++i) { + if (strcmp(rtd->codec_dai->name, + largo->compr_info[i].dai_name) == 0) + return &largo->compr_info[i]; + } + + return NULL; +} + static int largo_open(struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; struct largo_priv *largo = snd_soc_codec_get_drvdata(rtd->codec); struct arizona *arizona = largo->core.arizona; - int n_adsp, ret = 0; - - mutex_lock(&largo->compr_info.lock); - - if (largo->compr_info.stream) { - ret = -EBUSY; - goto out; - } + struct largo_compr *compr; + int ret = 0; - if (strcmp(rtd->codec_dai->name, "largo-dsp-voicectrl") == 0) { - n_adsp = 2; - } else { + /* Find a compr_info for this DAI */ + compr = largo_get_compr(rtd, largo); + if (!compr) { dev_err(arizona->dev, "No suitable compressed stream for dai '%s'\n", rtd->codec_dai->name); - ret = -EINVAL; + return -EINVAL; + } + + mutex_lock(&compr->lock); + + if (compr->stream) { + ret = -EBUSY; goto out; } - if (!wm_adsp_compress_supported(&largo->core.adsp[n_adsp], stream)) { + if (!wm_adsp_compress_supported(compr->adsp, stream)) { dev_err(arizona->dev, "No suitable firmware for compressed stream\n"); ret = -EINVAL; goto out; } - largo->compr_info.adsp = &largo->core.adsp[n_adsp]; - largo->compr_info.stream = stream; - stream->runtime->private_data = &largo->compr_info; + compr->stream = stream; + stream->runtime->private_data = compr; out: - mutex_unlock(&largo->compr_info.lock); + mutex_unlock(&compr->lock); return ret; } @@ -1199,7 +1243,6 @@ static int largo_free(struct snd_compr_stream *stream) compr->allocated = false; compr->stream = NULL; - compr->adsp = NULL; compr->total_copied = 0; stream->runtime->private_data = NULL; @@ -1279,7 +1322,7 @@ static int largo_trigger(struct snd_compr_stream *stream, int cmd) mutex_unlock(&compr->lock); if (pending) - adsp2_irq(0, largo); + largo_compr_irq(largo, compr); return ret; } @@ -1383,7 +1426,7 @@ static int largo_codec_probe(struct snd_soc_codec *codec) priv->core.arizona->dapm = &codec->dapm; ret = arizona_request_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, - "ADSP2 interrupt 1", adsp2_irq, priv); + "ADSP2 interrupt 1", largo_adsp2_irq, priv); if (ret != 0) { dev_err(arizona->dev, "Failed to request DSP IRQ: %d\n", ret); return ret; @@ -1472,6 +1515,29 @@ static struct snd_soc_platform_driver largo_compr_platform = { .compr_ops = &largo_compr_ops, }; +static void largo_init_compr_info(struct largo_priv *largo) +{ + int i; + + BUILD_BUG_ON(ARRAY_SIZE(largo->compr_info) != + ARRAY_SIZE(compr_dai_mapping)); + + for (i = 0; i < ARRAY_SIZE(largo->compr_info); ++i) { + mutex_init(&largo->compr_info[i].lock); + largo->compr_info[i].dai_name = compr_dai_mapping[i].dai_name; + largo->compr_info[i].adsp = + &largo->core.adsp[compr_dai_mapping[i].adsp_num]; + } +} + +static void largo_destroy_compr_info(struct largo_priv *largo) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(largo->compr_info); ++i) + mutex_destroy(&largo->compr_info[i].lock); +} + static int largo_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); @@ -1490,7 +1556,6 @@ static int largo_probe(struct platform_device *pdev) * locate regulator supplies */ pdev->dev.of_node = arizona->dev->of_node; - mutex_init(&largo->compr_info.lock); mutex_init(&largo->fw_lock); largo->core.arizona = arizona; @@ -1522,6 +1587,8 @@ static int largo_probe(struct platform_device *pdev) goto error; } + largo_init_compr_info(largo); + for (i = 0; i < ARRAY_SIZE(largo->fll); i++) largo->fll[i].vco_mult = 3; @@ -1564,7 +1631,7 @@ static int largo_probe(struct platform_device *pdev) return ret; error: - mutex_destroy(&largo->compr_info.lock); + largo_destroy_compr_info(largo); mutex_destroy(&largo->fw_lock); return ret; @@ -1577,7 +1644,7 @@ static int largo_remove(struct platform_device *pdev) snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); - mutex_destroy(&largo->compr_info.lock); + largo_destroy_compr_info(largo); mutex_destroy(&largo->fw_lock); return 0; diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index a8dc8265685..864785e6642 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -35,6 +35,11 @@ #define MARLEY_NUM_ADSP 3 +/* Number of compressed DAI hookups, each pair of DSP and dummy CPU + * are counted as one DAI + */ +#define MARLEY_NUM_COMPR_DAI 2 + #define MARLEY_DEFAULT_FRAGMENTS 1 #define MARLEY_DEFAULT_FRAGMENT_SIZE 4096 @@ -134,23 +139,39 @@ static int marley_rate_put(struct snd_kcontrol *kcontrol, struct marley_compr { struct mutex lock; + const char *dai_name; - struct snd_compr_stream *stream; struct wm_adsp *adsp; size_t total_copied; bool allocated; bool trig; + + struct snd_compr_stream *stream; }; struct marley_priv { struct arizona_priv core; struct arizona_fll fll[MARLEY_FLL_COUNT]; - struct marley_compr compr_info; + struct marley_compr compr_info[MARLEY_NUM_COMPR_DAI]; struct mutex fw_lock; }; +static const struct { + const char *dai_name; + int adsp_num; +} compr_dai_mapping[MARLEY_NUM_COMPR_DAI] = { + { + .dai_name = "marley-dsp-voicectrl", + .adsp_num = 2, + }, + { + .dai_name = "marley-dsp-trace", + .adsp_num = 0, + }, +}; + static const struct wm_adsp_region marley_dsp1_regions[] = { { .type = WMFW_ADSP2_PM, .base = 0x080000 }, { .type = WMFW_ADSP2_ZM, .base = 0x0e0000 }, @@ -532,7 +553,7 @@ static int marley_adsp_power_ev(struct snd_soc_dapm_widget *w, struct arizona_priv *priv = &marley->core; struct arizona *arizona = priv->arizona; unsigned int freq; - int ret; + int i, ret; ret = regmap_read(arizona->regmap, CLEARWATER_DSP_CLOCK_1, &freq); if (ret != 0) { @@ -546,10 +567,13 @@ static int marley_adsp_power_ev(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_PRE_PMU: - if (w->shift == 2) { - mutex_lock(&marley->compr_info.lock); - marley->compr_info.trig = false; - mutex_unlock(&marley->compr_info.lock); + for (i = 0; i < ARRAY_SIZE(marley->compr_info); ++i) { + if (marley->compr_info[i].adsp->num != w->shift + 1) + continue; + + mutex_lock(&marley->compr_info[i].lock); + marley->compr_info[i].trig = false; + mutex_unlock(&marley->compr_info[i].lock); } break; default: @@ -1810,87 +1834,107 @@ static struct snd_soc_dai_driver marley_dai[] = { }, }; -static irqreturn_t adsp2_irq(int irq, void *data) +static void marley_compr_irq(struct marley_priv *marley, + struct marley_compr *compr) { - struct marley_priv *marley = data; - struct marley_compr *compr_info = &marley->compr_info; struct arizona *arizona = marley->core.arizona; - struct wm_adsp *adsp3 = &marley->core.adsp[2]; - struct wm_adsp *adsp1 = &marley->core.adsp[0]; bool trigger; int ret, avail; - mutex_lock(&marley->compr_info.lock); + mutex_lock(&compr->lock); + + ret = wm_adsp_stream_handle_irq(compr->adsp, &trigger); + if (ret < 0) { + dev_err(arizona->dev, + "Failed to capture DSP%d data: %d\n", + compr->adsp->num, ret); + goto out; + } - if (adsp3->running) { - ret = wm_adsp_stream_handle_irq(adsp3, &trigger); - if (ret >= 0) { - if (adsp3 == compr_info->adsp) - compr_info->total_copied += ret; + compr->total_copied += ret; - if (!compr_info->trig && trigger) { - compr_info->trig = true; - if (arizona->pdata.ez2ctrl_trigger && - adsp3->fw_features.ez2control_trigger) - arizona->pdata.ez2ctrl_trigger(); - } - } - } else if (adsp1->running) { - ret = wm_adsp_stream_handle_irq(adsp1, &trigger); + if (trigger && !compr->trig) { + compr->trig = true; - if (ret >= 0 && (adsp1 == compr_info->adsp)) - compr_info->total_copied += ret; + if (compr->adsp->fw_features.ez2control_trigger && + arizona->pdata.ez2ctrl_trigger) + arizona->pdata.ez2ctrl_trigger(); } - if (compr_info->allocated) { - avail = wm_adsp_stream_avail(compr_info->adsp); + if (compr->allocated) { + avail = wm_adsp_stream_avail(compr->adsp); if (avail > MARLEY_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(compr_info->stream); + snd_compr_fragment_elapsed(compr->stream); } - mutex_unlock(&marley->compr_info.lock); +out: + mutex_unlock(&compr->lock); +} +static irqreturn_t marley_adsp2_irq(int irq, void *data) +{ + struct marley_priv *marley = data; + int i; + + for (i = 0; i < ARRAY_SIZE(marley->compr_info); ++i) { + if (!marley->compr_info[i].adsp->running) + continue; + + marley_compr_irq(marley, &marley->compr_info[i]); + } return IRQ_HANDLED; } +static struct marley_compr *marley_get_compr(struct snd_soc_pcm_runtime *rtd, + struct marley_priv *marley) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(marley->compr_info); ++i) { + if (strcmp(rtd->codec_dai->name, + marley->compr_info[i].dai_name) == 0) + return &marley->compr_info[i]; + } + + return NULL; +} + static int marley_open(struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; struct marley_priv *marley = snd_soc_codec_get_drvdata(rtd->codec); struct arizona *arizona = marley->core.arizona; - int n_adsp, ret = 0; - - mutex_lock(&marley->compr_info.lock); - - if (marley->compr_info.stream) { - ret = -EBUSY; - goto out; - } + struct marley_compr *compr; + int ret = 0; - if (strcmp(rtd->codec_dai->name, "marley-dsp-voicectrl") == 0) { - n_adsp = 2; - } else if (strcmp(rtd->codec_dai->name, "marley-dsp-trace") == 0) { - n_adsp = 0; - } else { + /* Find a compr_info for this DAI */ + compr = marley_get_compr(rtd, marley); + if (!compr) { dev_err(arizona->dev, "No suitable compressed stream for dai '%s'\n", rtd->codec_dai->name); - ret = -EINVAL; + return -EINVAL; + } + + mutex_lock(&compr->lock); + + if (compr->stream) { + ret = -EBUSY; goto out; } - if (!wm_adsp_compress_supported(&marley->core.adsp[n_adsp], stream)) { + if (!wm_adsp_compress_supported(compr->adsp, stream)) { dev_err(arizona->dev, - "No suitable firmware for compressed stream\n"); + "No suitable firmware for DAI '%s'\n", + rtd->codec_dai->name); ret = -EINVAL; goto out; } - marley->compr_info.adsp = &marley->core.adsp[n_adsp]; - marley->compr_info.stream = stream; - stream->runtime->private_data = &marley->compr_info; + compr->stream = stream; + stream->runtime->private_data = compr; out: - mutex_unlock(&marley->compr_info.lock); + mutex_unlock(&compr->lock); return ret; } @@ -1909,7 +1953,6 @@ static int marley_free(struct snd_compr_stream *stream) compr->allocated = false; compr->stream = NULL; - compr->adsp = NULL; compr->total_copied = 0; stream->runtime->private_data = NULL; @@ -1961,6 +2004,7 @@ static int marley_trigger(struct snd_compr_stream *stream, int cmd) { struct snd_soc_pcm_runtime *rtd = stream->private_data; struct marley_priv *marley = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = marley->core.arizona; struct marley_compr *compr = (struct marley_compr *)stream->runtime->private_data; int ret = 0; @@ -1988,8 +2032,12 @@ static int marley_trigger(struct snd_compr_stream *stream, int cmd) mutex_unlock(&compr->lock); + /* + * Stream has already trigerred, force irq handler to run + * by generating interrupt. + */ if (pending) - adsp2_irq(0, marley); + regmap_write(arizona->regmap, CLEARWATER_ADSP2_IRQ0, 0x01); return ret; } @@ -2095,7 +2143,7 @@ static int marley_codec_probe(struct snd_soc_codec *codec) priv->core.arizona->dapm = &codec->dapm; ret = arizona_request_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, - "ADSP2 interrupt 1", adsp2_irq, priv); + "ADSP2 interrupt 1", marley_adsp2_irq, priv); if (ret != 0) { dev_err(arizona->dev, "Failed to request DSP IRQ: %d\n", ret); return ret; @@ -2187,6 +2235,30 @@ static struct snd_soc_platform_driver marley_compr_platform = { .compr_ops = &marley_compr_ops, }; +static void marley_init_compr_info(struct marley_priv *marley) +{ + int i; + + BUILD_BUG_ON(ARRAY_SIZE(marley->compr_info) != + ARRAY_SIZE(compr_dai_mapping)); + + for (i = 0; i < ARRAY_SIZE(marley->compr_info); ++i) { + mutex_init(&marley->compr_info[i].lock); + marley->compr_info[i].dai_name = + compr_dai_mapping[i].dai_name; + marley->compr_info[i].adsp = + &marley->core.adsp[compr_dai_mapping[i].adsp_num]; + } +} + +static void marley_destroy_compr_info(struct marley_priv *marley) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(marley->compr_info); ++i) + mutex_destroy(&marley->compr_info[i].lock); +} + static int marley_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); @@ -2205,7 +2277,6 @@ static int marley_probe(struct platform_device *pdev) * locate regulator supplies */ pdev->dev.of_node = arizona->dev->of_node; - mutex_init(&marley->compr_info.lock); mutex_init(&marley->fw_lock); marley->core.arizona = arizona; @@ -2241,6 +2312,8 @@ static int marley_probe(struct platform_device *pdev) return ret; } + marley_init_compr_info(marley); + for (i = 0; i < ARRAY_SIZE(marley->fll); i++) { marley->fll[i].vco_mult = 3; marley->fll[i].min_outdiv = 3; @@ -2284,7 +2357,7 @@ static int marley_probe(struct platform_device *pdev) return ret; error: - mutex_destroy(&marley->compr_info.lock); + marley_destroy_compr_info(marley); mutex_destroy(&marley->fw_lock); return ret; @@ -2297,7 +2370,7 @@ static int marley_remove(struct platform_device *pdev) snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); - mutex_destroy(&marley->compr_info.lock); + marley_destroy_compr_info(marley); mutex_destroy(&marley->fw_lock); return 0; diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index d74919f0637..67ccede3a39 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -35,6 +35,11 @@ #define MOON_NUM_ADSP 7 +/* Number of compressed DAI hookups, each pair of DSP and dummy CPU + * are counted as one DAI + */ +#define MOON_NUM_COMPR_DAI 2 + #define MOON_DEFAULT_FRAGMENTS 1 #define MOON_DEFAULT_FRAGMENT_SIZE 4096 @@ -183,23 +188,39 @@ static int moon_rate_put(struct snd_kcontrol *kcontrol, struct moon_compr { struct mutex lock; + const char *dai_name; - struct snd_compr_stream *stream; struct wm_adsp *adsp; size_t total_copied; bool allocated; bool trig; + + struct snd_compr_stream *stream; }; struct moon_priv { struct arizona_priv core; struct arizona_fll fll[3]; - struct moon_compr compr_info; + struct moon_compr compr_info[MOON_NUM_COMPR_DAI]; struct mutex fw_lock; }; +static const struct { + const char *dai_name; + int adsp_num; +} compr_dai_mapping[MOON_NUM_COMPR_DAI] = { + { + .dai_name = "moon-dsp6-voicectrl", + .adsp_num = 5, + }, + { + .dai_name = "moon-dsp-trace", + .adsp_num = 0, + }, +}; + static const struct wm_adsp_region moon_dsp1_regions[] = { { .type = WMFW_ADSP2_PM, .base = 0x080000 }, { .type = WMFW_ADSP2_ZM, .base = 0x0e0000 }, @@ -603,7 +624,7 @@ static int moon_adsp_power_ev(struct snd_soc_dapm_widget *w, struct arizona_priv *priv = &moon->core; struct arizona *arizona = priv->arizona; unsigned int freq; - int ret; + int i, ret; ret = regmap_read(arizona->regmap, CLEARWATER_DSP_CLOCK_2, &freq); if (ret != 0) { @@ -614,10 +635,13 @@ static int moon_adsp_power_ev(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_PRE_PMU: - if (w->shift == 5) { - mutex_lock(&moon->compr_info.lock); - moon->compr_info.trig = false; - mutex_unlock(&moon->compr_info.lock); + for (i = 0; i < ARRAY_SIZE(moon->compr_info); ++i) { + if (moon->compr_info[i].adsp->num != w->shift + 1) + continue; + + mutex_lock(&moon->compr_info[i].lock); + moon->compr_info[i].trig = false; + mutex_unlock(&moon->compr_info[i].lock); } break; default: @@ -2657,53 +2681,75 @@ static struct snd_soc_dai_driver moon_dai[] = { }, }; -static irqreturn_t adsp2_irq(int irq, void *data) +static irqreturn_t moon_adsp_bus_error(int irq, void *data) +{ + struct wm_adsp *adsp = (struct wm_adsp *)data; + return wm_adsp2_bus_error(adsp); +} + +static void moon_compr_irq(struct moon_priv *moon, + struct moon_compr *compr) { - struct moon_priv *moon = data; - struct moon_compr *compr_info = &moon->compr_info; struct arizona *arizona = moon->core.arizona; - struct wm_adsp *adsp6 = &moon->core.adsp[5]; - struct wm_adsp *adsp1 = &moon->core.adsp[0]; bool trigger; int ret, avail; - mutex_lock(&moon->compr_info.lock); + mutex_lock(&compr->lock); - if (adsp6->running) { - ret = wm_adsp_stream_handle_irq(adsp6, &trigger); - if (ret >= 0) { - if (adsp6 == compr_info->adsp) - compr_info->total_copied += ret; + ret = wm_adsp_stream_handle_irq(compr->adsp, &trigger); + if (ret < 0) { + dev_err(arizona->dev, + "Failed to capture DSP%d data: %d\n", + compr->adsp->num, ret); + goto out; + } - if (!compr_info->trig && trigger) { - compr_info->trig = true; - if (arizona->pdata.ez2ctrl_trigger && - adsp6->fw_features.ez2control_trigger) - arizona->pdata.ez2ctrl_trigger(); - } - } - } else if (adsp1->running) { - ret = wm_adsp_stream_handle_irq(adsp1, &trigger); + compr->total_copied += ret; - if (ret >= 0 && (adsp1 == compr_info->adsp)) - compr_info->total_copied += ret; + if (trigger && !compr->trig) { + compr->trig = true; + + if (compr->adsp->fw_features.ez2control_trigger && + arizona->pdata.ez2ctrl_trigger) + arizona->pdata.ez2ctrl_trigger(); } - if (compr_info->allocated) { - avail = wm_adsp_stream_avail(compr_info->adsp); + if (compr->allocated) { + avail = wm_adsp_stream_avail(compr->adsp); if (avail > MOON_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(compr_info->stream); + snd_compr_fragment_elapsed(compr->stream); } - mutex_unlock(&moon->compr_info.lock); +out: + mutex_unlock(&compr->lock); +} + +static irqreturn_t moon_adsp2_irq(int irq, void *data) +{ + struct moon_priv *moon = data; + int i; + + for (i = 0; i < ARRAY_SIZE(moon->compr_info); ++i) { + if (!moon->compr_info[i].adsp->running) + continue; + moon_compr_irq(moon, &moon->compr_info[i]); + } return IRQ_HANDLED; } -static irqreturn_t moon_adsp_bus_error(int irq, void *data) +static struct moon_compr *moon_get_compr(struct snd_soc_pcm_runtime *rtd, + struct moon_priv *moon) { - struct wm_adsp *adsp = (struct wm_adsp *)data; - return wm_adsp2_bus_error(adsp); + int i; + + for (i = 0; i < ARRAY_SIZE(moon->compr_info); ++i) { + if (strcmp(rtd->codec_dai->name, + moon->compr_info[i].dai_name) == 0) + return &moon->compr_info[i]; + } + + return NULL; } static int moon_open(struct snd_compr_stream *stream) @@ -2711,39 +2757,37 @@ static int moon_open(struct snd_compr_stream *stream) struct snd_soc_pcm_runtime *rtd = stream->private_data; struct moon_priv *moon = snd_soc_codec_get_drvdata(rtd->codec); struct arizona *arizona = moon->core.arizona; - int n_adsp, ret = 0; - - mutex_lock(&moon->compr_info.lock); - - if (moon->compr_info.stream) { - ret = -EBUSY; - goto out; - } + struct moon_compr *compr; + int ret = 0; - if (strcmp(rtd->codec_dai->name, "moon-dsp6-voicectrl") == 0) { - n_adsp = 5; - } else if (strcmp(rtd->codec_dai->name, "moon-dsp-trace") == 0) { - n_adsp = 0; - } else { + /* Find a compr_info for this DAI */ + compr = moon_get_compr(rtd, moon); + if (!compr) { dev_err(arizona->dev, "No suitable compressed stream for dai '%s'\n", rtd->codec_dai->name); - ret = -EINVAL; + return -EINVAL; + } + + mutex_lock(&compr->lock); + + if (compr->stream) { + ret = -EBUSY; goto out; } - if (!wm_adsp_compress_supported(&moon->core.adsp[n_adsp], stream)) { + if (!wm_adsp_compress_supported(compr->adsp, stream)) { dev_err(arizona->dev, - "No suitable firmware for compressed stream\n"); + "No suitable firmware for DAI '%s'\n", + rtd->codec_dai->name); ret = -EINVAL; goto out; } - moon->compr_info.adsp = &moon->core.adsp[n_adsp]; - moon->compr_info.stream = stream; - stream->runtime->private_data = &moon->compr_info; + compr->stream = stream; + stream->runtime->private_data = compr; out: - mutex_unlock(&moon->compr_info.lock); + mutex_unlock(&compr->lock); return ret; } @@ -2762,7 +2806,6 @@ static int moon_free(struct snd_compr_stream *stream) compr->allocated = false; compr->stream = NULL; - compr->adsp = NULL; compr->total_copied = 0; stream->runtime->private_data = NULL; @@ -2947,7 +2990,7 @@ static int moon_codec_probe(struct snd_soc_codec *codec) priv->core.arizona->dapm = &codec->dapm; ret = arizona_request_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, - "ADSP2 interrupt 1", adsp2_irq, priv); + "ADSP2 interrupt 1", moon_adsp2_irq, priv); if (ret != 0) { dev_err(arizona->dev, "Failed to request DSP IRQ: %d\n", ret); return ret; @@ -3066,6 +3109,30 @@ static struct snd_soc_platform_driver moon_compr_platform = { .compr_ops = &moon_compr_ops, }; +static void moon_init_compr_info(struct moon_priv *moon) +{ + int i; + + BUILD_BUG_ON(ARRAY_SIZE(moon->compr_info) != + ARRAY_SIZE(compr_dai_mapping)); + + for (i = 0; i < ARRAY_SIZE(moon->compr_info); ++i) { + mutex_init(&moon->compr_info[i].lock); + moon->compr_info[i].dai_name = + compr_dai_mapping[i].dai_name; + moon->compr_info[i].adsp = + &moon->core.adsp[compr_dai_mapping[i].adsp_num]; + } +} + +static void moon_destroy_compr_info(struct moon_priv *moon) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(moon->compr_info); ++i) + mutex_destroy(&moon->compr_info[i].lock); +} + static int moon_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); @@ -3084,7 +3151,6 @@ static int moon_probe(struct platform_device *pdev) * locate regulator supplies */ pdev->dev.of_node = arizona->dev->of_node; - mutex_init(&moon->compr_info.lock); mutex_init(&moon->fw_lock); moon->core.arizona = arizona; @@ -3123,6 +3189,8 @@ static int moon_probe(struct platform_device *pdev) return ret; } + moon_init_compr_info(moon); + for (i = 0; i < ARRAY_SIZE(moon->fll); i++) { moon->fll[i].vco_mult = 3; moon->fll[i].min_outdiv = 3; @@ -3171,7 +3239,7 @@ static int moon_probe(struct platform_device *pdev) return ret; error: - mutex_destroy(&moon->compr_info.lock); + moon_destroy_compr_info(moon); mutex_destroy(&moon->fw_lock); return ret; @@ -3184,7 +3252,7 @@ static int moon_remove(struct platform_device *pdev) snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); - mutex_destroy(&moon->compr_info.lock); + moon_destroy_compr_info(moon); mutex_destroy(&moon->fw_lock); return 0; From cdeb3010cc57517e1ececa47495bd96b566e4fbb Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 30 Nov 2015 17:07:34 +0000 Subject: [PATCH 1045/1167] ASoC: wm_adsp: Add function to check for voice trigger feature Replace the direct access of the fw_features array from the codec driver with a helper function. Change-Id: If6c310257594cdd844ad32a137ee7b179d509b33 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 2 +- sound/soc/codecs/florida.c | 2 +- sound/soc/codecs/largo.c | 2 +- sound/soc/codecs/marley.c | 2 +- sound/soc/codecs/moon.c | 2 +- sound/soc/codecs/wm5102.c | 2 +- sound/soc/codecs/wm_adsp.h | 5 +++++ 7 files changed, 11 insertions(+), 6 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 509176ee0de..3531b04b208 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2769,7 +2769,7 @@ static void clearwater_compr_irq(struct clearwater_priv *clearwater, if (trigger && !compr->trig) { compr->trig = true; - if (compr->adsp->fw_features.ez2control_trigger && + if (wm_adsp_fw_has_voice_trig(compr->adsp) && arizona->pdata.ez2ctrl_trigger) arizona->pdata.ez2ctrl_trigger(); } diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 12ce32d0c5d..889c154b5e3 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2244,7 +2244,7 @@ static void florida_compr_irq(struct florida_priv *florida, if (trigger && !compr->trig) { compr->trig = true; - if (compr->adsp->fw_features.ez2control_trigger && + if (wm_adsp_fw_has_voice_trig(compr->adsp) && arizona->pdata.ez2ctrl_trigger) arizona->pdata.ez2ctrl_trigger(); } diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index b210b19e10d..bd171715078 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -1146,7 +1146,7 @@ static void largo_compr_irq(struct largo_priv *largo, if (trigger && !compr->trig) { compr->trig = true; - if (compr->adsp->fw_features.ez2control_trigger && + if (wm_adsp_fw_has_voice_trig(compr->adsp) && arizona->pdata.ez2ctrl_trigger) arizona->pdata.ez2ctrl_trigger(); } diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index 864785e6642..5715bb0da02 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -1856,7 +1856,7 @@ static void marley_compr_irq(struct marley_priv *marley, if (trigger && !compr->trig) { compr->trig = true; - if (compr->adsp->fw_features.ez2control_trigger && + if (wm_adsp_fw_has_voice_trig(compr->adsp) && arizona->pdata.ez2ctrl_trigger) arizona->pdata.ez2ctrl_trigger(); } diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 67ccede3a39..6d92b0736f2 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -2709,7 +2709,7 @@ static void moon_compr_irq(struct moon_priv *moon, if (trigger && !compr->trig) { compr->trig = true; - if (compr->adsp->fw_features.ez2control_trigger && + if (wm_adsp_fw_has_voice_trig(compr->adsp) && arizona->pdata.ez2ctrl_trigger) arizona->pdata.ez2ctrl_trigger(); } diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 93aa86ae87b..175c66c743e 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1908,7 +1908,7 @@ static irqreturn_t adsp2_irq(int irq, void *data) struct wm5102_priv *wm5102 = data; if (wm5102->core.arizona->pdata.ez2ctrl_trigger && - wm5102->core.adsp[0].fw_features.ez2control_trigger) + wm_adsp_fw_has_voice_trig(&wm5102->core.adsp[0])) wm5102->core.arizona->pdata.ez2ctrl_trigger(); return IRQ_HANDLED; diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 2192634637b..964f1af4ded 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -189,6 +189,11 @@ irqreturn_t wm_adsp2_bus_error(struct wm_adsp *adsp); int wm_adsp2_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); +static inline bool wm_adsp_fw_has_voice_trig(const struct wm_adsp *dsp) +{ + return dsp->fw_features.ez2control_trigger; +} + extern bool wm_adsp_compress_supported(const struct wm_adsp *adsp, const struct snd_compr_stream *stream); extern bool wm_adsp_format_supported(const struct wm_adsp *adsp, From a3d24f14682788ec53e06a96ca942a3f786f01f0 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 13 Feb 2015 17:15:09 +0000 Subject: [PATCH 1046/1167] ASoC: wm_adsp: Move compress stream handling to wm_adsp Remove the code duplication across codecs by moving all core generic compressed stream functionality into the wm_adsp driver Change-Id: I0b9b73b54a7f254e1f717ec50d188ff39577f43d Signed-off-by: Richard Fitzgerald Signed-off-by: Simon Trimmer --- sound/soc/codecs/clearwater.c | 289 ++++++-------------------- sound/soc/codecs/florida.c | 267 +++++-------------------- sound/soc/codecs/largo.c | 267 +++++-------------------- sound/soc/codecs/marley.c | 289 ++++++-------------------- sound/soc/codecs/moon.c | 291 ++++++--------------------- sound/soc/codecs/wm_adsp.c | 367 +++++++++++++++++++++++++--------- sound/soc/codecs/wm_adsp.h | 61 +++--- 7 files changed, 579 insertions(+), 1252 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 3531b04b208..008852ef2d3 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -40,9 +40,6 @@ */ #define CLEARWATER_NUM_COMPR_DAI 2 -#define CLEARWATER_DEFAULT_FRAGMENTS 1 -#define CLEARWATER_DEFAULT_FRAGMENT_SIZE 4096 - #define CLEARWATER_FRF_COEFFICIENT_LEN 4 static int clearwater_frf_bytes_put(struct snd_kcontrol *kcontrol, @@ -190,16 +187,13 @@ static int clearwater_rate_put(struct snd_kcontrol *kcontrol, .get = snd_soc_get_value_enum_double, .put = clearwater_rate_put, \ .private_value = (unsigned long)&xenum } +struct clearwater_priv; + struct clearwater_compr { - struct mutex lock; + struct wm_adsp_compr adsp_compr; const char *dai_name; - struct wm_adsp *adsp; - - size_t total_copied; - bool allocated; bool trig; - - struct snd_compr_stream *stream; + struct clearwater_priv *priv; }; struct clearwater_priv { @@ -651,12 +645,13 @@ static int clearwater_adsp_power_ev(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_PRE_PMU: for (i = 0; i < ARRAY_SIZE(clearwater->compr_info); ++i) { - if (clearwater->compr_info[i].adsp->num != w->shift + 1) + if (clearwater->compr_info[i].adsp_compr.dsp->num != + w->shift + 1) continue; - mutex_lock(&clearwater->compr_info[i].lock); + mutex_lock(&clearwater->compr_info[i].adsp_compr.lock); clearwater->compr_info[i].trig = false; - mutex_unlock(&clearwater->compr_info[i].lock); + mutex_unlock(&clearwater->compr_info[i].adsp_compr.lock); } break; default: @@ -2752,36 +2747,23 @@ static void clearwater_compr_irq(struct clearwater_priv *clearwater, { struct arizona *arizona = clearwater->core.arizona; bool trigger; - int ret, avail; - - mutex_lock(&compr->lock); - - ret = wm_adsp_stream_handle_irq(compr->adsp, &trigger); - if (ret < 0) { - dev_err(arizona->dev, - "Failed to capture DSP%d data: %d\n", - compr->adsp->num, ret); - goto out; - } - - compr->total_copied += ret; + int ret; - if (trigger && !compr->trig) { - compr->trig = true; + ret = wm_adsp_compr_irq(&compr->adsp_compr, &trigger); + if (ret < 0) + return; - if (wm_adsp_fw_has_voice_trig(compr->adsp) && - arizona->pdata.ez2ctrl_trigger) - arizona->pdata.ez2ctrl_trigger(); - } + if (trigger && arizona->pdata.ez2ctrl_trigger) { + mutex_lock(&compr->adsp_compr.lock); + if (!compr->trig) { + compr->trig = true; - if (compr->allocated) { - avail = wm_adsp_stream_avail(compr->adsp); - if (avail > CLEARWATER_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(compr->stream); + if (arizona->pdata.ez2ctrl_trigger && + wm_adsp_fw_has_voice_trig(compr->adsp_compr.dsp)) + arizona->pdata.ez2ctrl_trigger(); + } + mutex_unlock(&compr->adsp_compr.lock); } - -out: - mutex_unlock(&compr->lock); } static irqreturn_t clearwater_adsp2_irq(int irq, void *data) @@ -2790,7 +2772,7 @@ static irqreturn_t clearwater_adsp2_irq(int irq, void *data) int i; for (i = 0; i < ARRAY_SIZE(clearwater->compr_info); ++i) { - if (!clearwater->compr_info[i].adsp->running) + if (!clearwater->compr_info[i].adsp_compr.dsp->running) continue; clearwater_compr_irq(clearwater, &clearwater->compr_info[i]); @@ -2813,211 +2795,53 @@ static struct clearwater_compr *clearwater_get_compr( return NULL; } -static int clearwater_open(struct snd_compr_stream *stream) +static int clearwater_compr_open(struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(rtd->codec); - struct arizona *arizona = clearwater->core.arizona; struct clearwater_compr *compr; - int ret = 0; - /* Find a compr_info for this DAI */ compr = clearwater_get_compr(rtd, clearwater); if (!compr) { - dev_err(arizona->dev, - "No suitable compressed stream for dai '%s'\n", + dev_err(clearwater->core.arizona->dev, + "No compressed stream for dai '%s'\n", rtd->codec_dai->name); return -EINVAL; } - mutex_lock(&compr->lock); - - if (compr->stream) { - ret = -EBUSY; - goto out; - } - - if (!wm_adsp_compress_supported(compr->adsp, stream)) { - dev_err(arizona->dev, - "No suitable firmware for DAI '%s'\n", - rtd->codec_dai->name); - ret = -EINVAL; - goto out; - } - - compr->stream = stream; - stream->runtime->private_data = compr; -out: - mutex_unlock(&compr->lock); - - return ret; + return wm_adsp_compr_open(&compr->adsp_compr, stream); } -static int clearwater_free(struct snd_compr_stream *stream) +static int clearwater_compr_trigger(struct snd_compr_stream *stream, int cmd) { - struct clearwater_compr *compr = - (struct clearwater_compr *)stream->runtime->private_data; - - if (!compr) - return -EINVAL; - - mutex_lock(&compr->lock); - - wm_adsp_stream_free(compr->adsp); - - compr->allocated = false; - compr->stream = NULL; - compr->total_copied = 0; - - stream->runtime->private_data = NULL; - - mutex_unlock(&compr->lock); - - return 0; -} - -static int clearwater_set_params(struct snd_compr_stream *stream, - struct snd_compr_params *params) -{ - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(rtd->codec); - struct arizona *arizona = clearwater->core.arizona; - struct clearwater_compr *compr = - (struct clearwater_compr *)stream->runtime->private_data; - int ret = 0; - - mutex_lock(&compr->lock); - - if (!wm_adsp_format_supported(compr->adsp, stream, params)) { - dev_err(arizona->dev, - "Invalid params: id:%u, chan:%u,%u, rate:%u format:%u\n", - params->codec.id, params->codec.ch_in, - params->codec.ch_out, params->codec.sample_rate, - params->codec.format); - ret = -EINVAL; - goto out; - } - - ret = wm_adsp_stream_alloc(compr->adsp, params); - if (ret == 0) - compr->allocated = true; - -out: - mutex_unlock(&compr->lock); - - return ret; -} - -static int clearwater_get_params(struct snd_compr_stream *stream, - struct snd_codec *params) -{ - return 0; -} - -static int clearwater_trigger(struct snd_compr_stream *stream, int cmd) -{ - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct clearwater_priv *clearwater = snd_soc_codec_get_drvdata(rtd->codec); - struct arizona *arizona = clearwater->core.arizona; - struct clearwater_compr *compr = - (struct clearwater_compr *)stream->runtime->private_data; - int ret = 0; - bool pending = false; + struct wm_adsp_compr *adsp_compr = + (struct wm_adsp_compr *)stream->runtime->private_data; + struct clearwater_compr *compr = container_of(adsp_compr, + struct clearwater_compr, + adsp_compr); + struct arizona *arizona = compr->priv->core.arizona; + int ret; - mutex_lock(&compr->lock); + ret = wm_adsp_compr_trigger(stream, cmd); switch (cmd) { case SNDRV_PCM_TRIGGER_START: - ret = wm_adsp_stream_start(compr->adsp); - - /** - * If the stream has already triggered before the stream - * opened better process any outstanding data - */ if (compr->trig) - pending = true; - break; - case SNDRV_PCM_TRIGGER_STOP: + /* + * If the firmware already triggered before the stream + * was opened trigger another interrupt so irq handler + * will run and process any outstanding data + */ + regmap_write(arizona->regmap, + CLEARWATER_ADSP2_IRQ0, 0x01); break; default: - ret = -EINVAL; break; } - mutex_unlock(&compr->lock); - - /* - * Stream has already trigerred, force irq handler to run - * by generating interrupt. - */ - if (pending) - regmap_write(arizona->regmap, CLEARWATER_ADSP2_IRQ0, 0x01); - - return ret; -} - -static int clearwater_pointer(struct snd_compr_stream *stream, - struct snd_compr_tstamp *tstamp) -{ - struct clearwater_compr *compr = - (struct clearwater_compr *)stream->runtime->private_data; - - mutex_lock(&compr->lock); - tstamp->byte_offset = 0; - tstamp->copied_total = compr->total_copied; - mutex_unlock(&compr->lock); - - return 0; -} - -static int clearwater_copy(struct snd_compr_stream *stream, char __user *buf, - size_t count) -{ - struct clearwater_compr *compr = - (struct clearwater_compr *)stream->runtime->private_data; - int ret; - - mutex_lock(&compr->lock); - - if (stream->direction == SND_COMPRESS_PLAYBACK) - ret = -EINVAL; - else - ret = wm_adsp_stream_read(compr->adsp, buf, count); - - mutex_unlock(&compr->lock); - return ret; } -static int clearwater_get_caps(struct snd_compr_stream *stream, - struct snd_compr_caps *caps) -{ - struct clearwater_compr *compr = - (struct clearwater_compr *)stream->runtime->private_data; - - mutex_lock(&compr->lock); - - memset(caps, 0, sizeof(*caps)); - - caps->direction = stream->direction; - caps->min_fragment_size = CLEARWATER_DEFAULT_FRAGMENT_SIZE; - caps->max_fragment_size = CLEARWATER_DEFAULT_FRAGMENT_SIZE; - caps->min_fragments = CLEARWATER_DEFAULT_FRAGMENTS; - caps->max_fragments = CLEARWATER_DEFAULT_FRAGMENTS; - - wm_adsp_get_caps(compr->adsp, stream, caps); - - mutex_unlock(&compr->lock); - - return 0; -} - -static int clearwater_get_codec_caps(struct snd_compr_stream *stream, - struct snd_compr_codec_caps *codec) -{ - return 0; -} - static int clearwater_codec_probe(struct snd_soc_codec *codec) { struct clearwater_priv *priv = snd_soc_codec_get_drvdata(codec); @@ -3142,15 +2966,15 @@ static struct snd_soc_codec_driver soc_codec_dev_clearwater = { }; static struct snd_compr_ops clearwater_compr_ops = { - .open = clearwater_open, - .free = clearwater_free, - .set_params = clearwater_set_params, - .get_params = clearwater_get_params, - .trigger = clearwater_trigger, - .pointer = clearwater_pointer, - .copy = clearwater_copy, - .get_caps = clearwater_get_caps, - .get_codec_caps = clearwater_get_codec_caps, + .open = clearwater_compr_open, + .free = wm_adsp_compr_free, + .set_params = wm_adsp_compr_set_params, + .get_params = wm_adsp_compr_get_params, + .trigger = clearwater_compr_trigger, + .pointer = wm_adsp_compr_pointer, + .copy = wm_adsp_compr_copy, + .get_caps = wm_adsp_compr_get_caps, + .get_codec_caps = wm_adsp_compr_get_codec_caps, }; static struct snd_soc_platform_driver clearwater_compr_platform = { @@ -3159,17 +2983,20 @@ static struct snd_soc_platform_driver clearwater_compr_platform = { static void clearwater_init_compr_info(struct clearwater_priv *clearwater) { + struct wm_adsp *dsp; int i; BUILD_BUG_ON(ARRAY_SIZE(clearwater->compr_info) != ARRAY_SIZE(compr_dai_mapping)); for (i = 0; i < ARRAY_SIZE(clearwater->compr_info); ++i) { - mutex_init(&clearwater->compr_info[i].lock); + clearwater->compr_info[i].priv = clearwater; + clearwater->compr_info[i].dai_name = compr_dai_mapping[i].dai_name; - clearwater->compr_info[i].adsp = - &clearwater->core.adsp[compr_dai_mapping[i].adsp_num]; + + dsp = &clearwater->core.adsp[compr_dai_mapping[i].adsp_num], + wm_adsp_compr_init(dsp, &clearwater->compr_info[i].adsp_compr); } } @@ -3178,7 +3005,7 @@ static void clearwater_destroy_compr_info(struct clearwater_priv *clearwater) int i; for (i = 0; i < ARRAY_SIZE(clearwater->compr_info); ++i) - mutex_destroy(&clearwater->compr_info[i].lock); + wm_adsp_compr_destroy(&clearwater->compr_info[i].adsp_compr); } static int clearwater_probe(struct platform_device *pdev) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 889c154b5e3..e4811fe0bdd 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -40,20 +40,10 @@ */ #define FLORIDA_NUM_COMPR_DAI 2 -#define FLORIDA_DEFAULT_FRAGMENTS 1 -#define FLORIDA_DEFAULT_FRAGMENT_SIZE 4096 - struct florida_compr { - struct mutex lock; + struct wm_adsp_compr adsp_compr; const char *dai_name; - - struct wm_adsp *adsp; - - size_t total_copied; - bool allocated; bool trig; - - struct snd_compr_stream *stream; }; struct florida_priv { @@ -248,12 +238,13 @@ static int florida_adsp_power_ev(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_PRE_PMU: for (i = 0; i < ARRAY_SIZE(florida->compr_info); ++i) { - if (florida->compr_info[i].adsp->num != w->shift + 1) + if (florida->compr_info[i].adsp_compr.dsp->num != + w->shift + 1) continue; - mutex_lock(&florida->compr_info[i].lock); + mutex_lock(&florida->compr_info[i].adsp_compr.lock); florida->compr_info[i].trig = false; - mutex_unlock(&florida->compr_info[i].lock); + mutex_unlock(&florida->compr_info[i].adsp_compr.lock); } break; default: @@ -2227,36 +2218,23 @@ static void florida_compr_irq(struct florida_priv *florida, { struct arizona *arizona = florida->core.arizona; bool trigger; - int ret, avail; - - mutex_lock(&compr->lock); - - ret = wm_adsp_stream_handle_irq(compr->adsp, &trigger); - if (ret < 0) { - dev_err(arizona->dev, - "Failed to capture DSP%d data: %d\n", - compr->adsp->num, ret); - goto out; - } - - compr->total_copied += ret; + int ret; - if (trigger && !compr->trig) { - compr->trig = true; + ret = wm_adsp_compr_irq(&compr->adsp_compr, &trigger); + if (ret < 0) + return; - if (wm_adsp_fw_has_voice_trig(compr->adsp) && - arizona->pdata.ez2ctrl_trigger) - arizona->pdata.ez2ctrl_trigger(); - } + if (trigger && arizona->pdata.ez2ctrl_trigger) { + mutex_lock(&compr->adsp_compr.lock); + if (!compr->trig) { + compr->trig = true; - if (compr->allocated) { - avail = wm_adsp_stream_avail(compr->adsp); - if (avail > FLORIDA_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(compr->stream); + if (arizona->pdata.ez2ctrl_trigger && + wm_adsp_fw_has_voice_trig(compr->adsp_compr.dsp)) + arizona->pdata.ez2ctrl_trigger(); + } + mutex_unlock(&compr->adsp_compr.lock); } - -out: - mutex_unlock(&compr->lock); } static irqreturn_t florida_adsp2_irq(int irq, void *data) @@ -2265,7 +2243,7 @@ static irqreturn_t florida_adsp2_irq(int irq, void *data) int i; for (i = 0; i < ARRAY_SIZE(florida->compr_info); ++i) { - if (!florida->compr_info[i].adsp->running) + if (!florida->compr_info[i].adsp_compr.dsp->running) continue; florida_compr_irq(florida, &florida->compr_info[i]); @@ -2288,13 +2266,12 @@ static struct florida_compr *florida_get_compr(struct snd_soc_pcm_runtime *rtd, return NULL; } -static int florida_open(struct snd_compr_stream *stream) +static int florida_compr_open(struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; struct florida_priv *florida = snd_soc_codec_get_drvdata(rtd->codec); struct arizona *arizona = florida->core.arizona; struct florida_compr *compr; - int ret = 0; /* Find a compr_info for this DAI */ compr = florida_get_compr(rtd, florida); @@ -2305,188 +2282,37 @@ static int florida_open(struct snd_compr_stream *stream) return -EINVAL; } - mutex_lock(&compr->lock); - - if (compr->stream) { - ret = -EBUSY; - goto out; - } - - if (!wm_adsp_compress_supported(compr->adsp, stream)) { - dev_err(arizona->dev, - "No suitable firmware for compressed stream\n"); - ret = -EINVAL; - goto out; - } - - compr->stream = stream; - stream->runtime->private_data = compr; -out: - mutex_unlock(&compr->lock); - - return ret; + return wm_adsp_compr_open(&compr->adsp_compr, stream); } -static int florida_free(struct snd_compr_stream *stream) +static int florida_compr_trigger(struct snd_compr_stream *stream, int cmd) { - struct florida_compr *compr = - (struct florida_compr *)stream->runtime->private_data; - - if (!compr) - return -EINVAL; - - mutex_lock(&compr->lock); - - wm_adsp_stream_free(compr->adsp); - - compr->allocated = false; - compr->stream = NULL; - compr->total_copied = 0; - - stream->runtime->private_data = NULL; - - mutex_unlock(&compr->lock); - - return 0; -} - -static int florida_set_params(struct snd_compr_stream *stream, - struct snd_compr_params *params) -{ - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct florida_priv *florida = snd_soc_codec_get_drvdata(rtd->codec); - struct arizona *arizona = florida->core.arizona; - struct florida_compr *compr = - (struct florida_compr *)stream->runtime->private_data; - int ret = 0; - - mutex_lock(&compr->lock); - - if (!wm_adsp_format_supported(compr->adsp, stream, params)) { - dev_err(arizona->dev, - "Invalid params: id:%u, chan:%u,%u, rate:%u format:%u\n", - params->codec.id, params->codec.ch_in, - params->codec.ch_out, params->codec.sample_rate, - params->codec.format); - ret = -EINVAL; - goto out; - } - - ret = wm_adsp_stream_alloc(compr->adsp, params); - if (ret == 0) - compr->allocated = true; - -out: - mutex_unlock(&compr->lock); - - return ret; -} - -static int florida_get_params(struct snd_compr_stream *stream, - struct snd_codec *params) -{ - return 0; -} - -static int florida_trigger(struct snd_compr_stream *stream, int cmd) -{ - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct florida_priv *florida = snd_soc_codec_get_drvdata(rtd->codec); - struct florida_compr *compr = - (struct florida_compr *)stream->runtime->private_data; - int ret = 0; - bool pending = false; + struct wm_adsp_compr *adsp_compr = + (struct wm_adsp_compr *)stream->runtime->private_data; + struct florida_compr *compr = container_of(adsp_compr, + struct florida_compr, + adsp_compr); + bool dummy; + int ret; - mutex_lock(&compr->lock); + ret = wm_adsp_compr_trigger(stream, cmd); switch (cmd) { case SNDRV_PCM_TRIGGER_START: - ret = wm_adsp_stream_start(compr->adsp); - /** - * If the stream has already triggered before the stream - * opened better process any outstanding data + * If the firmware already triggered before the stream + * was opened process any outstanding data */ if (compr->trig) - pending = true; - break; - case SNDRV_PCM_TRIGGER_STOP: + wm_adsp_compr_irq(&compr->adsp_compr, &dummy); break; default: - ret = -EINVAL; break; } - mutex_unlock(&compr->lock); - - if (pending) - florida_compr_irq(florida, compr); - - return ret; -} - -static int florida_pointer(struct snd_compr_stream *stream, - struct snd_compr_tstamp *tstamp) -{ - struct florida_compr *compr = - (struct florida_compr *)stream->runtime->private_data; - - mutex_lock(&compr->lock); - tstamp->byte_offset = 0; - tstamp->copied_total = compr->total_copied; - mutex_unlock(&compr->lock); - - return 0; -} - -static int florida_copy(struct snd_compr_stream *stream, char __user *buf, - size_t count) -{ - struct florida_compr *compr = - (struct florida_compr *)stream->runtime->private_data; - int ret; - - mutex_lock(&compr->lock); - - if (stream->direction == SND_COMPRESS_PLAYBACK) - ret = -EINVAL; - else - ret = wm_adsp_stream_read(compr->adsp, buf, count); - - mutex_unlock(&compr->lock); - return ret; } -static int florida_get_caps(struct snd_compr_stream *stream, - struct snd_compr_caps *caps) -{ - struct florida_compr *compr = - (struct florida_compr *)stream->runtime->private_data; - - mutex_lock(&compr->lock); - - memset(caps, 0, sizeof(*caps)); - - caps->direction = stream->direction; - caps->min_fragment_size = FLORIDA_DEFAULT_FRAGMENT_SIZE; - caps->max_fragment_size = FLORIDA_DEFAULT_FRAGMENT_SIZE; - caps->min_fragments = FLORIDA_DEFAULT_FRAGMENTS; - caps->max_fragments = FLORIDA_DEFAULT_FRAGMENTS; - - wm_adsp_get_caps(compr->adsp, stream, caps); - - mutex_unlock(&compr->lock); - - return 0; -} - -static int florida_get_codec_caps(struct snd_compr_stream *stream, - struct snd_compr_codec_caps *codec) -{ - return 0; -} - static int florida_codec_probe(struct snd_soc_codec *codec) { struct florida_priv *priv = snd_soc_codec_get_drvdata(codec); @@ -2607,15 +2433,15 @@ static struct snd_soc_codec_driver soc_codec_dev_florida = { }; static struct snd_compr_ops florida_compr_ops = { - .open = florida_open, - .free = florida_free, - .set_params = florida_set_params, - .get_params = florida_get_params, - .trigger = florida_trigger, - .pointer = florida_pointer, - .copy = florida_copy, - .get_caps = florida_get_caps, - .get_codec_caps = florida_get_codec_caps, + .open = florida_compr_open, + .free = wm_adsp_compr_free, + .set_params = wm_adsp_compr_set_params, + .get_params = wm_adsp_compr_get_params, + .trigger = florida_compr_trigger, + .pointer = wm_adsp_compr_pointer, + .copy = wm_adsp_compr_copy, + .get_caps = wm_adsp_compr_get_caps, + .get_codec_caps = wm_adsp_compr_get_codec_caps, }; static struct snd_soc_platform_driver florida_compr_platform = { @@ -2624,16 +2450,17 @@ static struct snd_soc_platform_driver florida_compr_platform = { static void florida_init_compr_info(struct florida_priv *florida) { + struct wm_adsp *dsp; int i; BUILD_BUG_ON(ARRAY_SIZE(florida->compr_info) != ARRAY_SIZE(compr_dai_mapping)); for (i = 0; i < ARRAY_SIZE(florida->compr_info); ++i) { - mutex_init(&florida->compr_info[i].lock); florida->compr_info[i].dai_name = compr_dai_mapping[i].dai_name; - florida->compr_info[i].adsp = - &florida->core.adsp[compr_dai_mapping[i].adsp_num]; + + dsp = &florida->core.adsp[compr_dai_mapping[i].adsp_num], + wm_adsp_compr_init(dsp, &florida->compr_info[i].adsp_compr); } } @@ -2642,7 +2469,7 @@ static void florida_destroy_compr_info(struct florida_priv *florida) int i; for (i = 0; i < ARRAY_SIZE(florida->compr_info); ++i) - mutex_destroy(&florida->compr_info[i].lock); + wm_adsp_compr_destroy(&florida->compr_info[i].adsp_compr); } static int florida_probe(struct platform_device *pdev) diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index bd171715078..de01805debb 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -42,16 +42,9 @@ #define LARGO_DEFAULT_FRAGMENT_SIZE 4096 struct largo_compr { - struct mutex lock; + struct wm_adsp_compr adsp_compr; const char *dai_name; - - struct wm_adsp *adsp; - - size_t total_copied; - bool allocated; bool trig; - - struct snd_compr_stream *stream; }; struct largo_priv { @@ -113,12 +106,13 @@ static int largo_adsp_power_ev(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_PRE_PMU: for (i = 0; i < ARRAY_SIZE(largo->compr_info); ++i) { - if (largo->compr_info[i].adsp->num != w->shift + 1) + if (largo->compr_info[i].adsp_compr.dsp->num != + w->shift + 1) continue; - mutex_lock(&largo->compr_info[i].lock); + mutex_lock(&largo->compr_info[i].adsp_compr.lock); largo->compr_info[i].trig = false; - mutex_unlock(&largo->compr_info[i].lock); + mutex_unlock(&largo->compr_info[i].adsp_compr.lock); } break; default: @@ -1124,41 +1118,27 @@ static struct snd_soc_dai_driver largo_dai[] = { }, }; -static void largo_compr_irq(struct largo_priv *largo, - struct largo_compr *compr) +static void largo_compr_irq(struct largo_priv *largo, struct largo_compr *compr) { struct arizona *arizona = largo->core.arizona; bool trigger; - int ret, avail; - - mutex_lock(&compr->lock); - - ret = wm_adsp_stream_handle_irq(compr->adsp, &trigger); - if (ret < 0) { - dev_err(arizona->dev, - "Failed to capture DSP%d data: %d\n", - compr->adsp->num, ret); - goto out; - } - - compr->total_copied += ret; + int ret; - if (trigger && !compr->trig) { - compr->trig = true; + ret = wm_adsp_compr_irq(&compr->adsp_compr, &trigger); + if (ret < 0) + return; - if (wm_adsp_fw_has_voice_trig(compr->adsp) && - arizona->pdata.ez2ctrl_trigger) - arizona->pdata.ez2ctrl_trigger(); - } + if (trigger && arizona->pdata.ez2ctrl_trigger) { + mutex_lock(&compr->adsp_compr.lock); + if (!compr->trig) { + compr->trig = true; - if (compr->allocated) { - avail = wm_adsp_stream_avail(compr->adsp); - if (avail > LARGO_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(compr->stream); + if (arizona->pdata.ez2ctrl_trigger && + wm_adsp_fw_has_voice_trig(compr->adsp_compr.dsp)) + arizona->pdata.ez2ctrl_trigger(); + } + mutex_unlock(&compr->adsp_compr.lock); } - -out: - mutex_unlock(&compr->lock); } static irqreturn_t largo_adsp2_irq(int irq, void *data) @@ -1167,7 +1147,7 @@ static irqreturn_t largo_adsp2_irq(int irq, void *data) int i; for (i = 0; i < ARRAY_SIZE(largo->compr_info); ++i) { - if (!largo->compr_info[i].adsp->running) + if (!largo->compr_info[i].adsp_compr.dsp->running) continue; largo_compr_irq(largo, &largo->compr_info[i]); @@ -1190,13 +1170,12 @@ static struct largo_compr *largo_get_compr(struct snd_soc_pcm_runtime *rtd, return NULL; } -static int largo_open(struct snd_compr_stream *stream) +static int largo_compr_open(struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; struct largo_priv *largo = snd_soc_codec_get_drvdata(rtd->codec); struct arizona *arizona = largo->core.arizona; struct largo_compr *compr; - int ret = 0; /* Find a compr_info for this DAI */ compr = largo_get_compr(rtd, largo); @@ -1207,188 +1186,37 @@ static int largo_open(struct snd_compr_stream *stream) return -EINVAL; } - mutex_lock(&compr->lock); - - if (compr->stream) { - ret = -EBUSY; - goto out; - } - - if (!wm_adsp_compress_supported(compr->adsp, stream)) { - dev_err(arizona->dev, - "No suitable firmware for compressed stream\n"); - ret = -EINVAL; - goto out; - } - - compr->stream = stream; - stream->runtime->private_data = compr; -out: - mutex_unlock(&compr->lock); - - return ret; -} - -static int largo_free(struct snd_compr_stream *stream) -{ - struct largo_compr *compr = - (struct largo_compr *)stream->runtime->private_data; - - if (!compr) - return -EINVAL; - - mutex_lock(&compr->lock); - - wm_adsp_stream_free(compr->adsp); - - compr->allocated = false; - compr->stream = NULL; - compr->total_copied = 0; - - stream->runtime->private_data = NULL; - - mutex_unlock(&compr->lock); - - return 0; -} - -static int largo_set_params(struct snd_compr_stream *stream, - struct snd_compr_params *params) -{ - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct largo_priv *largo = snd_soc_codec_get_drvdata(rtd->codec); - struct arizona *arizona = largo->core.arizona; - struct largo_compr *compr = - (struct largo_compr *)stream->runtime->private_data; - int ret = 0; - - mutex_lock(&compr->lock); - - if (!wm_adsp_format_supported(compr->adsp, stream, params)) { - dev_err(arizona->dev, - "Invalid params: id:%u, chan:%u,%u, rate:%u format:%u\n", - params->codec.id, params->codec.ch_in, - params->codec.ch_out, params->codec.sample_rate, - params->codec.format); - ret = -EINVAL; - goto out; - } - - ret = wm_adsp_stream_alloc(compr->adsp, params); - if (ret == 0) - compr->allocated = true; - -out: - mutex_unlock(&compr->lock); - - return ret; + return wm_adsp_compr_open(&compr->adsp_compr, stream); } -static int largo_get_params(struct snd_compr_stream *stream, - struct snd_codec *params) +static int largo_compr_trigger(struct snd_compr_stream *stream, int cmd) { - return 0; -} - -static int largo_trigger(struct snd_compr_stream *stream, int cmd) -{ - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct largo_priv *largo = snd_soc_codec_get_drvdata(rtd->codec); - struct largo_compr *compr = - (struct largo_compr *)stream->runtime->private_data; - int ret = 0; - bool pending = false; + struct wm_adsp_compr *adsp_compr = + (struct wm_adsp_compr *)stream->runtime->private_data; + struct largo_compr *compr = container_of(adsp_compr, + struct largo_compr, + adsp_compr); + bool dummy; + int ret; - mutex_lock(&compr->lock); + ret = wm_adsp_compr_trigger(stream, cmd); switch (cmd) { case SNDRV_PCM_TRIGGER_START: - ret = wm_adsp_stream_start(compr->adsp); - /** - * If the stream has already triggered before the stream - * opened better process any outstanding data + * If the firmware already triggered before the stream + * was opened process any outstanding data */ if (compr->trig) - pending = true; - break; - case SNDRV_PCM_TRIGGER_STOP: + wm_adsp_compr_irq(&compr->adsp_compr, &dummy); break; default: - ret = -EINVAL; break; } - mutex_unlock(&compr->lock); - - if (pending) - largo_compr_irq(largo, compr); - - return ret; -} - -static int largo_pointer(struct snd_compr_stream *stream, - struct snd_compr_tstamp *tstamp) -{ - struct largo_compr *compr = - (struct largo_compr *)stream->runtime->private_data; - - mutex_lock(&compr->lock); - tstamp->byte_offset = 0; - tstamp->copied_total = compr->total_copied; - mutex_unlock(&compr->lock); - - return 0; -} - -static int largo_copy(struct snd_compr_stream *stream, char __user *buf, - size_t count) -{ - struct largo_compr *compr = - (struct largo_compr *)stream->runtime->private_data; - int ret; - - mutex_lock(&compr->lock); - - if (stream->direction == SND_COMPRESS_PLAYBACK) - ret = -EINVAL; - else - ret = wm_adsp_stream_read(compr->adsp, buf, count); - - mutex_unlock(&compr->lock); - return ret; } -static int largo_get_caps(struct snd_compr_stream *stream, - struct snd_compr_caps *caps) -{ - struct largo_compr *compr = - (struct largo_compr *)stream->runtime->private_data; - - mutex_lock(&compr->lock); - - memset(caps, 0, sizeof(*caps)); - - caps->direction = stream->direction; - caps->min_fragment_size = LARGO_DEFAULT_FRAGMENT_SIZE; - caps->max_fragment_size = LARGO_DEFAULT_FRAGMENT_SIZE; - caps->min_fragments = LARGO_DEFAULT_FRAGMENTS; - caps->max_fragments = LARGO_DEFAULT_FRAGMENTS; - - wm_adsp_get_caps(compr->adsp, stream, caps); - - mutex_unlock(&compr->lock); - - return 0; -} - -static int largo_get_codec_caps(struct snd_compr_stream *stream, - struct snd_compr_codec_caps *codec) -{ - return 0; -} - static int largo_codec_probe(struct snd_soc_codec *codec) { struct largo_priv *priv = snd_soc_codec_get_drvdata(codec); @@ -1500,15 +1328,15 @@ static struct snd_soc_codec_driver soc_codec_dev_largo = { }; static struct snd_compr_ops largo_compr_ops = { - .open = largo_open, - .free = largo_free, - .set_params = largo_set_params, - .get_params = largo_get_params, - .trigger = largo_trigger, - .pointer = largo_pointer, - .copy = largo_copy, - .get_caps = largo_get_caps, - .get_codec_caps = largo_get_codec_caps, + .open = largo_compr_open, + .free = wm_adsp_compr_free, + .set_params = wm_adsp_compr_set_params, + .get_params = wm_adsp_compr_get_params, + .trigger = largo_compr_trigger, + .pointer = wm_adsp_compr_pointer, + .copy = wm_adsp_compr_copy, + .get_caps = wm_adsp_compr_get_caps, + .get_codec_caps = wm_adsp_compr_get_codec_caps, }; static struct snd_soc_platform_driver largo_compr_platform = { @@ -1517,16 +1345,17 @@ static struct snd_soc_platform_driver largo_compr_platform = { static void largo_init_compr_info(struct largo_priv *largo) { + struct wm_adsp *dsp; int i; BUILD_BUG_ON(ARRAY_SIZE(largo->compr_info) != ARRAY_SIZE(compr_dai_mapping)); for (i = 0; i < ARRAY_SIZE(largo->compr_info); ++i) { - mutex_init(&largo->compr_info[i].lock); largo->compr_info[i].dai_name = compr_dai_mapping[i].dai_name; - largo->compr_info[i].adsp = - &largo->core.adsp[compr_dai_mapping[i].adsp_num]; + + dsp = &largo->core.adsp[compr_dai_mapping[i].adsp_num], + wm_adsp_compr_init(dsp, &largo->compr_info[i].adsp_compr); } } @@ -1535,7 +1364,7 @@ static void largo_destroy_compr_info(struct largo_priv *largo) int i; for (i = 0; i < ARRAY_SIZE(largo->compr_info); ++i) - mutex_destroy(&largo->compr_info[i].lock); + wm_adsp_compr_destroy(&largo->compr_info[i].adsp_compr); } static int largo_probe(struct platform_device *pdev) diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index 5715bb0da02..a4e1b8ca744 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -40,9 +40,6 @@ */ #define MARLEY_NUM_COMPR_DAI 2 -#define MARLEY_DEFAULT_FRAGMENTS 1 -#define MARLEY_DEFAULT_FRAGMENT_SIZE 4096 - #define MARLEY_FRF_COEFFICIENT_LEN 4 #define MARLEY_FLL_COUNT 1 @@ -137,17 +134,13 @@ static int marley_rate_put(struct snd_kcontrol *kcontrol, .get = snd_soc_get_value_enum_double, .put = marley_rate_put, \ .private_value = (unsigned long)&xenum } +struct marley_priv; + struct marley_compr { - struct mutex lock; + struct wm_adsp_compr adsp_compr; const char *dai_name; - - struct wm_adsp *adsp; - - size_t total_copied; - bool allocated; bool trig; - - struct snd_compr_stream *stream; + struct marley_priv *priv; }; struct marley_priv { @@ -568,12 +561,13 @@ static int marley_adsp_power_ev(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_PRE_PMU: for (i = 0; i < ARRAY_SIZE(marley->compr_info); ++i) { - if (marley->compr_info[i].adsp->num != w->shift + 1) + if (marley->compr_info[i].adsp_compr.dsp->num != + w->shift + 1) continue; - mutex_lock(&marley->compr_info[i].lock); + mutex_lock(&marley->compr_info[i].adsp_compr.lock); marley->compr_info[i].trig = false; - mutex_unlock(&marley->compr_info[i].lock); + mutex_unlock(&marley->compr_info[i].adsp_compr.lock); } break; default: @@ -1839,36 +1833,23 @@ static void marley_compr_irq(struct marley_priv *marley, { struct arizona *arizona = marley->core.arizona; bool trigger; - int ret, avail; - - mutex_lock(&compr->lock); - - ret = wm_adsp_stream_handle_irq(compr->adsp, &trigger); - if (ret < 0) { - dev_err(arizona->dev, - "Failed to capture DSP%d data: %d\n", - compr->adsp->num, ret); - goto out; - } - - compr->total_copied += ret; + int ret; - if (trigger && !compr->trig) { - compr->trig = true; + ret = wm_adsp_compr_irq(&compr->adsp_compr, &trigger); + if (ret < 0) + return; - if (wm_adsp_fw_has_voice_trig(compr->adsp) && - arizona->pdata.ez2ctrl_trigger) - arizona->pdata.ez2ctrl_trigger(); - } + if (trigger && arizona->pdata.ez2ctrl_trigger) { + mutex_lock(&compr->adsp_compr.lock); + if (!compr->trig) { + compr->trig = true; - if (compr->allocated) { - avail = wm_adsp_stream_avail(compr->adsp); - if (avail > MARLEY_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(compr->stream); + if (arizona->pdata.ez2ctrl_trigger && + wm_adsp_fw_has_voice_trig(compr->adsp_compr.dsp)) + arizona->pdata.ez2ctrl_trigger(); + } + mutex_unlock(&compr->adsp_compr.lock); } - -out: - mutex_unlock(&compr->lock); } static irqreturn_t marley_adsp2_irq(int irq, void *data) @@ -1877,7 +1858,7 @@ static irqreturn_t marley_adsp2_irq(int irq, void *data) int i; for (i = 0; i < ARRAY_SIZE(marley->compr_info); ++i) { - if (!marley->compr_info[i].adsp->running) + if (!marley->compr_info[i].adsp_compr.dsp->running) continue; marley_compr_irq(marley, &marley->compr_info[i]); @@ -1899,211 +1880,53 @@ static struct marley_compr *marley_get_compr(struct snd_soc_pcm_runtime *rtd, return NULL; } -static int marley_open(struct snd_compr_stream *stream) +static int marley_compr_open(struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; struct marley_priv *marley = snd_soc_codec_get_drvdata(rtd->codec); - struct arizona *arizona = marley->core.arizona; struct marley_compr *compr; - int ret = 0; - /* Find a compr_info for this DAI */ compr = marley_get_compr(rtd, marley); if (!compr) { - dev_err(arizona->dev, - "No suitable compressed stream for dai '%s'\n", + dev_err(marley->core.arizona->dev, + "No compressed stream for dai '%s'\n", rtd->codec_dai->name); return -EINVAL; } - mutex_lock(&compr->lock); - - if (compr->stream) { - ret = -EBUSY; - goto out; - } - - if (!wm_adsp_compress_supported(compr->adsp, stream)) { - dev_err(arizona->dev, - "No suitable firmware for DAI '%s'\n", - rtd->codec_dai->name); - ret = -EINVAL; - goto out; - } - - compr->stream = stream; - stream->runtime->private_data = compr; -out: - mutex_unlock(&compr->lock); - - return ret; + return wm_adsp_compr_open(&compr->adsp_compr, stream); } -static int marley_free(struct snd_compr_stream *stream) +static int marley_compr_trigger(struct snd_compr_stream *stream, int cmd) { - struct marley_compr *compr = - (struct marley_compr *)stream->runtime->private_data; - - if (!compr) - return -EINVAL; - - mutex_lock(&compr->lock); - - wm_adsp_stream_free(compr->adsp); - - compr->allocated = false; - compr->stream = NULL; - compr->total_copied = 0; - - stream->runtime->private_data = NULL; - - mutex_unlock(&compr->lock); - - return 0; -} - -static int marley_set_params(struct snd_compr_stream *stream, - struct snd_compr_params *params) -{ - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct marley_priv *marley = snd_soc_codec_get_drvdata(rtd->codec); - struct arizona *arizona = marley->core.arizona; - struct marley_compr *compr = - (struct marley_compr *)stream->runtime->private_data; - int ret = 0; - - mutex_lock(&compr->lock); - - if (!wm_adsp_format_supported(compr->adsp, stream, params)) { - dev_err(arizona->dev, - "Invalid params: id:%u, chan:%u,%u, rate:%u format:%u\n", - params->codec.id, params->codec.ch_in, - params->codec.ch_out, params->codec.sample_rate, - params->codec.format); - ret = -EINVAL; - goto out; - } - - ret = wm_adsp_stream_alloc(compr->adsp, params); - if (ret == 0) - compr->allocated = true; - -out: - mutex_unlock(&compr->lock); - - return ret; -} - -static int marley_get_params(struct snd_compr_stream *stream, - struct snd_codec *params) -{ - return 0; -} - -static int marley_trigger(struct snd_compr_stream *stream, int cmd) -{ - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct marley_priv *marley = snd_soc_codec_get_drvdata(rtd->codec); - struct arizona *arizona = marley->core.arizona; - struct marley_compr *compr = - (struct marley_compr *)stream->runtime->private_data; - int ret = 0; - bool pending = false; + struct wm_adsp_compr *adsp_compr = + (struct wm_adsp_compr *)stream->runtime->private_data; + struct marley_compr *compr = container_of(adsp_compr, + struct marley_compr, + adsp_compr); + struct arizona *arizona = compr->priv->core.arizona; + int ret; - mutex_lock(&compr->lock); + ret = wm_adsp_compr_trigger(stream, cmd); switch (cmd) { case SNDRV_PCM_TRIGGER_START: - ret = wm_adsp_stream_start(compr->adsp); - - /** - * If the stream has already triggered before the stream - * opened better process any outstanding data - */ if (compr->trig) - pending = true; - break; - case SNDRV_PCM_TRIGGER_STOP: + /* + * If the firmware already triggered before the stream + * was opened trigger another interrupt so irq handler + * will run and process any outstanding data + */ + regmap_write(arizona->regmap, + CLEARWATER_ADSP2_IRQ0, 0x01); break; default: - ret = -EINVAL; break; } - mutex_unlock(&compr->lock); - - /* - * Stream has already trigerred, force irq handler to run - * by generating interrupt. - */ - if (pending) - regmap_write(arizona->regmap, CLEARWATER_ADSP2_IRQ0, 0x01); - - return ret; -} - -static int marley_pointer(struct snd_compr_stream *stream, - struct snd_compr_tstamp *tstamp) -{ - struct marley_compr *compr = - (struct marley_compr *)stream->runtime->private_data; - - mutex_lock(&compr->lock); - tstamp->byte_offset = 0; - tstamp->copied_total = compr->total_copied; - mutex_unlock(&compr->lock); - - return 0; -} - -static int marley_copy(struct snd_compr_stream *stream, char __user *buf, - size_t count) -{ - struct marley_compr *compr = - (struct marley_compr *)stream->runtime->private_data; - int ret; - - mutex_lock(&compr->lock); - - if (stream->direction == SND_COMPRESS_PLAYBACK) - ret = -EINVAL; - else - ret = wm_adsp_stream_read(compr->adsp, buf, count); - - mutex_unlock(&compr->lock); - return ret; } -static int marley_get_caps(struct snd_compr_stream *stream, - struct snd_compr_caps *caps) -{ - struct marley_compr *compr = - (struct marley_compr *)stream->runtime->private_data; - - mutex_lock(&compr->lock); - - memset(caps, 0, sizeof(*caps)); - - caps->direction = stream->direction; - caps->min_fragment_size = MARLEY_DEFAULT_FRAGMENT_SIZE; - caps->max_fragment_size = MARLEY_DEFAULT_FRAGMENT_SIZE; - caps->min_fragments = MARLEY_DEFAULT_FRAGMENTS; - caps->max_fragments = MARLEY_DEFAULT_FRAGMENTS; - - wm_adsp_get_caps(compr->adsp, stream, caps); - - mutex_unlock(&compr->lock); - - return 0; -} - -static int marley_get_codec_caps(struct snd_compr_stream *stream, - struct snd_compr_codec_caps *codec) -{ - return 0; -} - static int marley_codec_probe(struct snd_soc_codec *codec) { struct marley_priv *priv = snd_soc_codec_get_drvdata(codec); @@ -2220,15 +2043,15 @@ static struct snd_soc_codec_driver soc_codec_dev_marley = { }; static struct snd_compr_ops marley_compr_ops = { - .open = marley_open, - .free = marley_free, - .set_params = marley_set_params, - .get_params = marley_get_params, - .trigger = marley_trigger, - .pointer = marley_pointer, - .copy = marley_copy, - .get_caps = marley_get_caps, - .get_codec_caps = marley_get_codec_caps, + .open = marley_compr_open, + .free = wm_adsp_compr_free, + .set_params = wm_adsp_compr_set_params, + .get_params = wm_adsp_compr_get_params, + .trigger = marley_compr_trigger, + .pointer = wm_adsp_compr_pointer, + .copy = wm_adsp_compr_copy, + .get_caps = wm_adsp_compr_get_caps, + .get_codec_caps = wm_adsp_compr_get_codec_caps, }; static struct snd_soc_platform_driver marley_compr_platform = { @@ -2237,17 +2060,19 @@ static struct snd_soc_platform_driver marley_compr_platform = { static void marley_init_compr_info(struct marley_priv *marley) { + struct wm_adsp *dsp; int i; BUILD_BUG_ON(ARRAY_SIZE(marley->compr_info) != ARRAY_SIZE(compr_dai_mapping)); for (i = 0; i < ARRAY_SIZE(marley->compr_info); ++i) { - mutex_init(&marley->compr_info[i].lock); + marley->compr_info[i].priv = marley; marley->compr_info[i].dai_name = compr_dai_mapping[i].dai_name; - marley->compr_info[i].adsp = - &marley->core.adsp[compr_dai_mapping[i].adsp_num]; + + dsp = &marley->core.adsp[compr_dai_mapping[i].adsp_num], + wm_adsp_compr_init(dsp, &marley->compr_info[i].adsp_compr); } } @@ -2256,7 +2081,7 @@ static void marley_destroy_compr_info(struct marley_priv *marley) int i; for (i = 0; i < ARRAY_SIZE(marley->compr_info); ++i) - mutex_destroy(&marley->compr_info[i].lock); + wm_adsp_compr_destroy(&marley->compr_info[i].adsp_compr); } static int marley_probe(struct platform_device *pdev) diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 6d92b0736f2..c1f6b9a2839 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -40,9 +40,6 @@ */ #define MOON_NUM_COMPR_DAI 2 -#define MOON_DEFAULT_FRAGMENTS 1 -#define MOON_DEFAULT_FRAGMENT_SIZE 4096 - #define MOON_FRF_COEFFICIENT_LEN 4 static int moon_frf_bytes_put(struct snd_kcontrol *kcontrol, @@ -186,17 +183,13 @@ static int moon_rate_put(struct snd_kcontrol *kcontrol, .get = snd_soc_get_value_enum_double, .put = moon_rate_put, \ .private_value = (unsigned long)&xenum } +struct moon_priv; + struct moon_compr { - struct mutex lock; + struct wm_adsp_compr adsp_compr; const char *dai_name; - - struct wm_adsp *adsp; - - size_t total_copied; - bool allocated; bool trig; - - struct snd_compr_stream *stream; + struct moon_priv *priv; }; struct moon_priv { @@ -636,12 +629,13 @@ static int moon_adsp_power_ev(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_PRE_PMU: for (i = 0; i < ARRAY_SIZE(moon->compr_info); ++i) { - if (moon->compr_info[i].adsp->num != w->shift + 1) + if (moon->compr_info[i].adsp_compr.dsp->num != + w->shift + 1) continue; - mutex_lock(&moon->compr_info[i].lock); + mutex_lock(&moon->compr_info[i].adsp_compr.lock); moon->compr_info[i].trig = false; - mutex_unlock(&moon->compr_info[i].lock); + mutex_unlock(&moon->compr_info[i].adsp_compr.lock); } break; default: @@ -2692,36 +2686,23 @@ static void moon_compr_irq(struct moon_priv *moon, { struct arizona *arizona = moon->core.arizona; bool trigger; - int ret, avail; - - mutex_lock(&compr->lock); - - ret = wm_adsp_stream_handle_irq(compr->adsp, &trigger); - if (ret < 0) { - dev_err(arizona->dev, - "Failed to capture DSP%d data: %d\n", - compr->adsp->num, ret); - goto out; - } - - compr->total_copied += ret; + int ret; - if (trigger && !compr->trig) { - compr->trig = true; + ret = wm_adsp_compr_irq(&compr->adsp_compr, &trigger); + if (ret < 0) + return; - if (wm_adsp_fw_has_voice_trig(compr->adsp) && - arizona->pdata.ez2ctrl_trigger) - arizona->pdata.ez2ctrl_trigger(); - } + if (trigger && arizona->pdata.ez2ctrl_trigger) { + mutex_lock(&compr->adsp_compr.lock); + if (!compr->trig) { + compr->trig = true; - if (compr->allocated) { - avail = wm_adsp_stream_avail(compr->adsp); - if (avail > MOON_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(compr->stream); + if (arizona->pdata.ez2ctrl_trigger && + wm_adsp_fw_has_voice_trig(compr->adsp_compr.dsp)) + arizona->pdata.ez2ctrl_trigger(); + } + mutex_unlock(&compr->adsp_compr.lock); } - -out: - mutex_unlock(&compr->lock); } static irqreturn_t moon_adsp2_irq(int irq, void *data) @@ -2730,7 +2711,7 @@ static irqreturn_t moon_adsp2_irq(int irq, void *data) int i; for (i = 0; i < ARRAY_SIZE(moon->compr_info); ++i) { - if (!moon->compr_info[i].adsp->running) + if (!moon->compr_info[i].adsp_compr.dsp->running) continue; moon_compr_irq(moon, &moon->compr_info[i]); @@ -2752,212 +2733,53 @@ static struct moon_compr *moon_get_compr(struct snd_soc_pcm_runtime *rtd, return NULL; } -static int moon_open(struct snd_compr_stream *stream) +static int moon_compr_open(struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; struct moon_priv *moon = snd_soc_codec_get_drvdata(rtd->codec); - struct arizona *arizona = moon->core.arizona; struct moon_compr *compr; - int ret = 0; - /* Find a compr_info for this DAI */ compr = moon_get_compr(rtd, moon); if (!compr) { - dev_err(arizona->dev, - "No suitable compressed stream for dai '%s'\n", + dev_err(moon->core.arizona->dev, + "No compressed stream for dai '%s'\n", rtd->codec_dai->name); return -EINVAL; } - mutex_lock(&compr->lock); - - if (compr->stream) { - ret = -EBUSY; - goto out; - } - - if (!wm_adsp_compress_supported(compr->adsp, stream)) { - dev_err(arizona->dev, - "No suitable firmware for DAI '%s'\n", - rtd->codec_dai->name); - ret = -EINVAL; - goto out; - } - - compr->stream = stream; - stream->runtime->private_data = compr; -out: - mutex_unlock(&compr->lock); - - return ret; -} - -static int moon_free(struct snd_compr_stream *stream) -{ - struct moon_compr *compr = - (struct moon_compr *)stream->runtime->private_data; - - if (!compr) - return -EINVAL; - - mutex_lock(&compr->lock); - - wm_adsp_stream_free(compr->adsp); - - compr->allocated = false; - compr->stream = NULL; - compr->total_copied = 0; - - stream->runtime->private_data = NULL; - - mutex_unlock(&compr->lock); - - return 0; -} - -static int moon_set_params(struct snd_compr_stream *stream, - struct snd_compr_params *params) -{ - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct moon_priv *moon = snd_soc_codec_get_drvdata(rtd->codec); - struct arizona *arizona = moon->core.arizona; - struct moon_compr *compr = - (struct moon_compr *)stream->runtime->private_data; - int ret = 0; - - mutex_lock(&compr->lock); - - if (!wm_adsp_format_supported(compr->adsp, stream, params)) { - dev_err(arizona->dev, - "Invalid params: id:%u, chan:%u,%u, rate:%u format:%u\n", - params->codec.id, params->codec.ch_in, - params->codec.ch_out, params->codec.sample_rate, - params->codec.format); - ret = -EINVAL; - goto out; - } - - ret = wm_adsp_stream_alloc(compr->adsp, params); - if (ret == 0) - compr->allocated = true; - -out: - mutex_unlock(&compr->lock); - - return ret; + return wm_adsp_compr_open(&compr->adsp_compr, stream); } -static int moon_get_params(struct snd_compr_stream *stream, - struct snd_codec *params) +static int moon_compr_trigger(struct snd_compr_stream *stream, int cmd) { - return 0; -} - -static int moon_trigger(struct snd_compr_stream *stream, int cmd) -{ - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct moon_priv *moon = snd_soc_codec_get_drvdata(rtd->codec); - struct arizona *arizona = moon->core.arizona; - struct moon_compr *compr = - (struct moon_compr *)stream->runtime->private_data; - int ret = 0; - bool pending = false; + struct wm_adsp_compr *adsp_compr = + (struct wm_adsp_compr *)stream->runtime->private_data; + struct moon_compr *compr = container_of(adsp_compr, + struct moon_compr, + adsp_compr); + struct arizona *arizona = compr->priv->core.arizona; + int ret; - mutex_lock(&compr->lock); + ret = wm_adsp_compr_trigger(stream, cmd); switch (cmd) { case SNDRV_PCM_TRIGGER_START: - ret = wm_adsp_stream_start(compr->adsp); - - /** - * If the stream has already triggered before the stream - * opened better process any outstanding data - */ if (compr->trig) - pending = true; - break; - case SNDRV_PCM_TRIGGER_STOP: + /* + * If the firmware already triggered before the stream + * was opened trigger another interrupt so irq handler + * will run and process any outstanding data + */ + regmap_write(arizona->regmap, + CLEARWATER_ADSP2_IRQ0, 0x01); break; default: - ret = -EINVAL; break; } - mutex_unlock(&compr->lock); - - /* - * Stream has already trigerred, force irq handler to run - * by generating interrupt. - */ - if (pending) - regmap_write(arizona->regmap, CLEARWATER_ADSP2_IRQ0, 0x01); - - return ret; } -static int moon_pointer(struct snd_compr_stream *stream, - struct snd_compr_tstamp *tstamp) -{ - struct moon_compr *compr = - (struct moon_compr *)stream->runtime->private_data; - - mutex_lock(&compr->lock); - tstamp->byte_offset = 0; - tstamp->copied_total = compr->total_copied; - mutex_unlock(&compr->lock); - - return 0; -} - -static int moon_copy(struct snd_compr_stream *stream, char __user *buf, - size_t count) -{ - struct moon_compr *compr = - (struct moon_compr *)stream->runtime->private_data; - int ret; - - mutex_lock(&compr->lock); - - if (stream->direction == SND_COMPRESS_PLAYBACK) - ret = -EINVAL; - else - ret = wm_adsp_stream_read(compr->adsp, buf, count); - - mutex_unlock(&compr->lock); - - return ret; -} - -static int moon_get_caps(struct snd_compr_stream *stream, - struct snd_compr_caps *caps) -{ - struct moon_compr *compr = - (struct moon_compr *)stream->runtime->private_data; - - mutex_lock(&compr->lock); - - memset(caps, 0, sizeof(*caps)); - - caps->direction = stream->direction; - caps->min_fragment_size = MOON_DEFAULT_FRAGMENT_SIZE; - caps->max_fragment_size = MOON_DEFAULT_FRAGMENT_SIZE; - caps->min_fragments = MOON_DEFAULT_FRAGMENTS; - caps->max_fragments = MOON_DEFAULT_FRAGMENTS; - - wm_adsp_get_caps(compr->adsp, stream, caps); - - mutex_unlock(&compr->lock); - - return 0; -} - -static int moon_get_codec_caps(struct snd_compr_stream *stream, - struct snd_compr_codec_caps *codec) -{ - return 0; -} - static int moon_codec_probe(struct snd_soc_codec *codec) { struct moon_priv *priv = snd_soc_codec_get_drvdata(codec); @@ -3094,15 +2916,15 @@ static struct snd_soc_codec_driver soc_codec_dev_moon = { }; static struct snd_compr_ops moon_compr_ops = { - .open = moon_open, - .free = moon_free, - .set_params = moon_set_params, - .get_params = moon_get_params, - .trigger = moon_trigger, - .pointer = moon_pointer, - .copy = moon_copy, - .get_caps = moon_get_caps, - .get_codec_caps = moon_get_codec_caps, + .open = moon_compr_open, + .free = wm_adsp_compr_free, + .set_params = wm_adsp_compr_set_params, + .get_params = wm_adsp_compr_get_params, + .trigger = moon_compr_trigger, + .pointer = wm_adsp_compr_pointer, + .copy = wm_adsp_compr_copy, + .get_caps = wm_adsp_compr_get_caps, + .get_codec_caps = wm_adsp_compr_get_codec_caps, }; static struct snd_soc_platform_driver moon_compr_platform = { @@ -3111,17 +2933,20 @@ static struct snd_soc_platform_driver moon_compr_platform = { static void moon_init_compr_info(struct moon_priv *moon) { + struct wm_adsp *dsp; int i; BUILD_BUG_ON(ARRAY_SIZE(moon->compr_info) != ARRAY_SIZE(compr_dai_mapping)); for (i = 0; i < ARRAY_SIZE(moon->compr_info); ++i) { - mutex_init(&moon->compr_info[i].lock); + moon->compr_info[i].priv = moon; + moon->compr_info[i].dai_name = compr_dai_mapping[i].dai_name; - moon->compr_info[i].adsp = - &moon->core.adsp[compr_dai_mapping[i].adsp_num]; + + dsp = &moon->core.adsp[compr_dai_mapping[i].adsp_num], + wm_adsp_compr_init(dsp, &moon->compr_info[i].adsp_compr); } } @@ -3130,7 +2955,7 @@ static void moon_destroy_compr_info(struct moon_priv *moon) int i; for (i = 0; i < ARRAY_SIZE(moon->compr_info); ++i) - mutex_destroy(&moon->compr_info[i].lock); + wm_adsp_compr_destroy(&moon->compr_info[i].adsp_compr); } static int moon_probe(struct platform_device *pdev) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 28f279e3aef..5a0a34054a2 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2992,7 +2992,7 @@ int wm_adsp2_init(struct wm_adsp *dsp, struct mutex *fw_lock) } EXPORT_SYMBOL_GPL(wm_adsp2_init); -bool wm_adsp_compress_supported(const struct wm_adsp *dsp, +static bool wm_adsp_compress_supported(const struct wm_adsp *dsp, const struct snd_compr_stream *stream) { if (dsp->fw >= 0 && dsp->fw < dsp->num_firmwares) { @@ -3008,9 +3008,8 @@ bool wm_adsp_compress_supported(const struct wm_adsp *dsp, return false; } -EXPORT_SYMBOL_GPL(wm_adsp_compress_supported); -bool wm_adsp_format_supported(const struct wm_adsp *dsp, +static bool wm_adsp_format_supported(const struct wm_adsp *dsp, const struct snd_compr_stream *stream, const struct snd_compr_params *params) { @@ -3042,23 +3041,6 @@ bool wm_adsp_format_supported(const struct wm_adsp *dsp, return false; } -EXPORT_SYMBOL_GPL(wm_adsp_format_supported); - -void wm_adsp_get_caps(const struct wm_adsp *dsp, - const struct snd_compr_stream *stream, - struct snd_compr_caps *caps) -{ - int i; - - if (dsp->firmwares[dsp->fw].caps) { - for (i = 0; i < dsp->firmwares[dsp->fw].num_caps; i++) - caps->codecs[i] = dsp->firmwares[dsp->fw].caps[i].id; - - caps->num_codecs = i; - caps->direction = dsp->firmwares[dsp->fw].compr_direction; - } -} -EXPORT_SYMBOL_GPL(wm_adsp_get_caps); static int wm_adsp_read_data_block(struct wm_adsp *dsp, int mem_type, unsigned int mem_addr, @@ -3245,9 +3227,10 @@ static void wm_adsp_free_host_buf_info(struct wm_adsp *dsp) kfree(host_regions); } -static int wm_adsp_read_buffer(struct wm_adsp *dsp, int32_t read_index, +static int wm_adsp_read_buffer(struct wm_adsp_compr *compr, int32_t read_index, int avail) { + struct wm_adsp *dsp = compr->dsp; int circ_space_words = CIRC_SPACE(dsp->capt_buf.head, dsp->capt_buf.tail, dsp->capt_buf_size) / @@ -3311,8 +3294,9 @@ static int wm_adsp_read_buffer(struct wm_adsp *dsp, int32_t read_index, return num_words; } -static int wm_adsp_capture_block(struct wm_adsp *dsp, int *avail) +static int wm_adsp_capture_block(struct wm_adsp_compr *compr, int *avail) { + struct wm_adsp *dsp = compr->dsp; const struct wm_adsp_buffer_region *host_regions = dsp->host_buf_info.host_regions; int last_region = dsp->firmwares[dsp->fw].caps->num_host_regions - 1; @@ -3349,7 +3333,7 @@ static int wm_adsp_capture_block(struct wm_adsp *dsp, int *avail) *avail += host_size; /* Read data from DSP */ - num_words = wm_adsp_read_buffer(dsp, read_index, *avail); + num_words = wm_adsp_read_buffer(compr, read_index, *avail); if (num_words <= 0) return num_words; @@ -3394,21 +3378,10 @@ static int wm_adsp_stream_has_error_locked(struct wm_adsp *dsp) return 0; } -int wm_adsp_stream_has_error(struct wm_adsp *dsp) -{ - int ret; - - mutex_lock(&dsp->host_buf_info.lock); - ret = wm_adsp_stream_has_error_locked(dsp); - mutex_unlock(&dsp->host_buf_info.lock); - - return ret; -} -EXPORT_SYMBOL_GPL(wm_adsp_stream_has_error); - -int wm_adsp_stream_alloc(struct wm_adsp *dsp, +static int wm_adsp_streambuf_alloc(struct wm_adsp_compr *compr, const struct snd_compr_params *params) { + struct wm_adsp *dsp = compr->dsp; int ret; unsigned int size; @@ -3435,16 +3408,14 @@ int wm_adsp_stream_alloc(struct wm_adsp *dsp, size = params->buffer.fragment_size; if (size == 0) { - dsp->capt_watermark = WM_ADSP_DEFAULT_WATERMARK; + compr->irq_watermark = WM_ADSP_DEFAULT_WATERMARK; adsp_warn(dsp, "No fragment size, assuming %u", - dsp->capt_watermark * WM_ADSP_DATA_WORD_SIZE); + compr->irq_watermark * WM_ADSP_DATA_WORD_SIZE); } else { - dsp->capt_watermark = + compr->irq_watermark = DIV_ROUND_UP(size, WM_ADSP_DATA_WORD_SIZE); } - dsp->stream_allocated = true; - return 0; err_capt_buf: @@ -3452,26 +3423,10 @@ int wm_adsp_stream_alloc(struct wm_adsp *dsp, return ret; } -EXPORT_SYMBOL_GPL(wm_adsp_stream_alloc); -int wm_adsp_stream_free(struct wm_adsp *dsp) -{ - dsp->stream_allocated = false; - - kfree(dsp->raw_capt_buf); - dsp->raw_capt_buf = NULL; - - if (dsp->capt_buf.buf) { - vfree(dsp->capt_buf.buf); - dsp->capt_buf.buf = NULL; - } - - return 0; -} -EXPORT_SYMBOL_GPL(wm_adsp_stream_free); - -int wm_adsp_stream_start(struct wm_adsp *dsp) +static int wm_adsp_stream_start(struct wm_adsp_compr *compr) { + struct wm_adsp *dsp = compr->dsp; int ret; mutex_lock(&dsp->host_buf_info.lock); @@ -3482,25 +3437,25 @@ int wm_adsp_stream_start(struct wm_adsp *dsp) goto out_unlock; } - dsp->max_dsp_read_bytes = WM_ADSP_MAX_READ_SIZE * sizeof(u32); + compr->max_dsp_read_bytes = WM_ADSP_MAX_READ_SIZE * sizeof(u32); ret = wm_adsp_host_buffer_write(dsp, HOST_BUFFER_FIELD(high_water_mark), - dsp->capt_watermark); + compr->irq_watermark); if (ret < 0) goto out_unlock; - adsp_dbg(dsp, "Set watermark to %u\n", dsp->capt_watermark); + adsp_dbg(dsp, "Set watermark to %u\n", compr->irq_watermark); out_unlock: mutex_unlock(&dsp->host_buf_info.lock); return ret; } -EXPORT_SYMBOL_GPL(wm_adsp_stream_start); -static int wm_adsp_stream_capture(struct wm_adsp *dsp) +static int wm_adsp_stream_capture(struct wm_adsp_compr *compr) { + struct wm_adsp *dsp = compr->dsp; int avail = 0; int amount_read; int total_read = 0; @@ -3518,7 +3473,7 @@ static int wm_adsp_stream_capture(struct wm_adsp *dsp) do { amount_read = 0; do { - ret = wm_adsp_capture_block(dsp, &avail); + ret = wm_adsp_capture_block(compr, &avail); if (ret < 0) return ret; @@ -3534,6 +3489,16 @@ static int wm_adsp_stream_capture(struct wm_adsp *dsp) return total_read * WM_ADSP_DATA_WORD_SIZE; } +static int wm_adsp_stream_avail(const struct wm_adsp_compr *compr) +{ + if (!compr->allocated) + return 0; + else + return CIRC_CNT(compr->dsp->capt_buf.head, + compr->dsp->capt_buf.tail, + compr->dsp->capt_buf_size); +} + static int wm_adsp_stream_update_irq_count(struct wm_adsp *dsp, bool enable, u32 *old_count) { @@ -3559,17 +3524,19 @@ static int wm_adsp_stream_update_irq_count(struct wm_adsp *dsp, bool enable, if (irq_count == 0) return 0; /* don't ack if there haven't been any IRQs */ - if (!enable || dsp->buffer_drain_pending) + if (enable) + return wm_adsp_host_buffer_write(dsp, + HOST_BUFFER_FIELD(irq_ack), + irq_count | 1); + else return 0; - return wm_adsp_host_buffer_write(dsp, - HOST_BUFFER_FIELD(irq_ack), - irq_count | 1); } -int wm_adsp_stream_handle_irq(struct wm_adsp *dsp, bool *trigger) +int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) { - int ret, bytes_captured = 0; + struct wm_adsp *dsp = compr->dsp; + int ret, avail, bytes_captured = 0; u32 old_irq_count; bool enable_irqs = false; @@ -3581,26 +3548,41 @@ int wm_adsp_stream_handle_irq(struct wm_adsp *dsp, bool *trigger) if (!dsp->host_buf_info.host_buf_ptr) { adsp_warn(dsp, "No host buffer info\n"); ret = -EIO; - goto out_unlock; + goto out_buf_unlock; } ret = wm_adsp_stream_has_error_locked(dsp); if (ret) - goto out_unlock; + goto out_buf_unlock; - if (dsp->stream_allocated) { - bytes_captured = wm_adsp_stream_capture(dsp); + mutex_lock(&compr->lock); + + /* If the firmware buffer has data available read it now, + * no need to wait for the firmware to issue an interrupt. + */ + if (compr->allocated) { + bytes_captured = wm_adsp_stream_capture(compr); if (bytes_captured < 0) { ret = bytes_captured; - goto out_unlock; + goto out_compr_unlock; } - enable_irqs = true; + /* allow more interrupts if our buffer is not full */ + if (!dsp->buffer_drain_pending) + enable_irqs = true; } ret = wm_adsp_stream_update_irq_count(dsp, enable_irqs, &old_irq_count); if (ret < 0) - goto out_unlock; + goto out_compr_unlock; + + compr->total_copied += bytes_captured; + + if (compr->allocated) { + avail = wm_adsp_stream_avail(compr); + if (avail > WM_ADSP2_DEFAULT_FRAGMENT_SIZE) + snd_compr_fragment_elapsed(compr->stream); + } /* irq_count = 2 only on the initial trigger */ if (trigger && (old_irq_count == 2)) @@ -3608,15 +3590,18 @@ int wm_adsp_stream_handle_irq(struct wm_adsp *dsp, bool *trigger) ret = bytes_captured; -out_unlock: +out_compr_unlock: + mutex_unlock(&compr->lock); +out_buf_unlock: mutex_unlock(&dsp->host_buf_info.lock); - return ret; } -EXPORT_SYMBOL_GPL(wm_adsp_stream_handle_irq); +EXPORT_SYMBOL_GPL(wm_adsp_compr_irq); -int wm_adsp_stream_read(struct wm_adsp *dsp, char __user *buf, size_t count) +static int wm_adsp_stream_read(struct wm_adsp_compr *compr, + char __user *buf, size_t count) { + struct wm_adsp *dsp = compr->dsp; int avail, to_end; int ret; @@ -3661,11 +3646,12 @@ int wm_adsp_stream_read(struct wm_adsp *dsp, char __user *buf, size_t count) ret = wm_adsp_stream_has_error_locked(dsp); if (ret >= 0) { - ret = wm_adsp_stream_capture(dsp); + ret = wm_adsp_stream_capture(compr); if (ret >= 0) - ret = wm_adsp_stream_update_irq_count(dsp, - true, - NULL); + ret = wm_adsp_stream_update_irq_count( + dsp, + !dsp->buffer_drain_pending, + NULL); } mutex_unlock(&dsp->host_buf_info.lock); @@ -3676,18 +3662,211 @@ int wm_adsp_stream_read(struct wm_adsp *dsp, char __user *buf, size_t count) return count; } -EXPORT_SYMBOL_GPL(wm_adsp_stream_read); -int wm_adsp_stream_avail(const struct wm_adsp *dsp) +int wm_adsp_compr_open(struct wm_adsp_compr *compr, + struct snd_compr_stream *stream) { - if (!dsp->stream_allocated) - return 0; + int ret = 0; + + mutex_lock(&compr->lock); + + if (compr->stream) { + ret = -EBUSY; + goto out; + } + + if (!wm_adsp_compress_supported(compr->dsp, stream)) { + adsp_err(compr->dsp, + "Firmware does not support compressed stream\n"); + ret = -EINVAL; + goto out; + } + + compr->stream = stream; + stream->runtime->private_data = compr; +out: + mutex_unlock(&compr->lock); + + return ret; +} +EXPORT_SYMBOL_GPL(wm_adsp_compr_open); + +int wm_adsp_compr_free(struct snd_compr_stream *stream) +{ + struct wm_adsp_compr *compr = stream->runtime->private_data; + + if (!compr) + return -EINVAL; + + mutex_lock(&compr->lock); + + compr->allocated = false; + compr->total_copied = 0; + compr->stream = NULL; + stream->runtime->private_data = NULL; + + kfree(compr->dsp->raw_capt_buf); + compr->dsp->raw_capt_buf = NULL; + + if (compr->dsp->capt_buf.buf) { + vfree(compr->dsp->capt_buf.buf); + compr->dsp->capt_buf.buf = NULL; + } + + mutex_unlock(&compr->lock); + return 0; +} +EXPORT_SYMBOL_GPL(wm_adsp_compr_free); + +int wm_adsp_compr_set_params(struct snd_compr_stream *stream, + struct snd_compr_params *params) +{ + struct wm_adsp_compr *compr = stream->runtime->private_data; + int ret = 0; + + mutex_lock(&compr->lock); + + if (!wm_adsp_format_supported(compr->dsp, stream, params)) { + adsp_err(compr->dsp, + "Invalid params: id:%u, chan:%u,%u, rate:%u format:%u\n", + params->codec.id, params->codec.ch_in, + params->codec.ch_out, params->codec.sample_rate, + params->codec.format); + ret = -EINVAL; + goto out; + } + + ret = wm_adsp_streambuf_alloc(compr, params); + if (ret < 0) + goto out; + + compr->allocated = true; + +out: + mutex_unlock(&compr->lock); + + return ret; +} +EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params); + +int wm_adsp_compr_get_params(struct snd_compr_stream *stream, + struct snd_codec *params) +{ + return 0; +} +EXPORT_SYMBOL_GPL(wm_adsp_compr_get_params); + +int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd) +{ + struct wm_adsp_compr *compr = stream->runtime->private_data; + int ret = 0; + + mutex_lock(&compr->lock); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + ret = wm_adsp_stream_start(compr); + break; + case SNDRV_PCM_TRIGGER_STOP: + break; + default: + ret = -EINVAL; + break; + } + + mutex_unlock(&compr->lock); + + return ret; +} +EXPORT_SYMBOL_GPL(wm_adsp_compr_trigger); + +int wm_adsp_compr_pointer(struct snd_compr_stream *stream, + struct snd_compr_tstamp *tstamp) +{ + struct wm_adsp_compr *compr = stream->runtime->private_data; + + mutex_lock(&compr->lock); + tstamp->byte_offset = 0; + tstamp->copied_total = compr->total_copied; + mutex_unlock(&compr->lock); + + return 0; +} +EXPORT_SYMBOL_GPL(wm_adsp_compr_pointer); + +int wm_adsp_compr_copy(struct snd_compr_stream *stream, + char __user *buf, size_t count) +{ + struct wm_adsp_compr *compr = stream->runtime->private_data; + int ret; + + mutex_lock(&compr->lock); + + if (stream->direction == SND_COMPRESS_PLAYBACK) + ret = -EINVAL; else - return CIRC_CNT(dsp->capt_buf.head, - dsp->capt_buf.tail, - dsp->capt_buf_size); + ret = wm_adsp_stream_read(compr, buf, count); + + mutex_unlock(&compr->lock); + + return ret; +} +EXPORT_SYMBOL_GPL(wm_adsp_compr_copy); + +int wm_adsp_compr_get_caps(struct snd_compr_stream *stream, + struct snd_compr_caps *caps) +{ + struct wm_adsp_compr *compr = stream->runtime->private_data; + struct wm_adsp *dsp = compr->dsp; + int i; + + mutex_lock(&compr->lock); + + memset(caps, 0, sizeof(*caps)); + + caps->direction = stream->direction; + caps->min_fragment_size = WM_ADSP2_DEFAULT_FRAGMENT_SIZE; + caps->max_fragment_size = WM_ADSP2_DEFAULT_FRAGMENT_SIZE; + caps->min_fragments = WM_ADSP2_DEFAULT_FRAGMENTS; + caps->max_fragments = WM_ADSP2_DEFAULT_FRAGMENTS; + + if (dsp->firmwares[dsp->fw].caps) { + for (i = 0; i < dsp->firmwares[dsp->fw].num_caps; i++) + caps->codecs[i] = dsp->firmwares[dsp->fw].caps[i].id; + + caps->num_codecs = i; + caps->direction = dsp->firmwares[dsp->fw].compr_direction; + } + + mutex_unlock(&compr->lock); + + return 0; +} +EXPORT_SYMBOL_GPL(wm_adsp_compr_get_caps); + +int wm_adsp_compr_get_codec_caps(struct snd_compr_stream *stream, + struct snd_compr_codec_caps *codec) +{ + return 0; } -EXPORT_SYMBOL_GPL(wm_adsp_stream_avail); +EXPORT_SYMBOL_GPL(wm_adsp_compr_get_codec_caps); + +void wm_adsp_compr_init(struct wm_adsp *dsp, struct wm_adsp_compr *compr) +{ + compr->dsp = dsp; + mutex_init(&compr->lock); +} +EXPORT_SYMBOL_GPL(wm_adsp_compr_init); + +void wm_adsp_compr_destroy(struct wm_adsp_compr *compr) +{ + if (!compr->dsp) + return; + + mutex_destroy(&compr->lock); +} +EXPORT_SYMBOL_GPL(wm_adsp_compr_destroy); + /* DSP lock region support */ int wm_adsp2_lock(struct wm_adsp *adsp, unsigned int lock_regions) diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 964f1af4ded..398d7ca5451 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -37,6 +37,11 @@ WM_ADSP2_REGION_8 | WM_ADSP2_REGION_9) #define WM_ADSP2_REGION_ALL (WM_ADSP2_REGION_0 | WM_ADSP2_REGION_1_9) +#define WM_ADSP2_DEFAULT_FRAGMENTS 1 +#define WM_ADSP2_DEFAULT_FRAGMENT_SIZE 4096 + +struct wm_adsp; + struct wm_adsp_region { int type; unsigned int base; @@ -91,6 +96,20 @@ struct wm_adsp_host_buf_info { u32 error; }; +struct wm_adsp_compr { + struct mutex lock; + struct wm_adsp *dsp; + + bool allocated; + + u32 irq_watermark; + int max_dsp_read_bytes; + + size_t total_copied; + + struct snd_compr_stream *stream; +}; + struct wm_adsp { const char *part; char part_rev; @@ -127,14 +146,10 @@ struct wm_adsp { struct list_head ctl_list; struct wm_adsp_host_buf_info host_buf_info; - - int max_dsp_read_bytes; u32 *raw_capt_buf; struct circ_buf capt_buf; int capt_buf_size; - u32 capt_watermark; bool buffer_drain_pending; - bool stream_allocated; int num_firmwares; struct wm_adsp_fw_defs *firmwares; @@ -194,25 +209,25 @@ static inline bool wm_adsp_fw_has_voice_trig(const struct wm_adsp *dsp) return dsp->fw_features.ez2control_trigger; } -extern bool wm_adsp_compress_supported(const struct wm_adsp *adsp, - const struct snd_compr_stream *stream); -extern bool wm_adsp_format_supported(const struct wm_adsp *adsp, - const struct snd_compr_stream *stream, - const struct snd_compr_params *params); -extern void wm_adsp_get_caps(const struct wm_adsp *adsp, - const struct snd_compr_stream *stream, - struct snd_compr_caps *caps); - -extern int wm_adsp_stream_alloc(struct wm_adsp *adsp, - const struct snd_compr_params *params); -extern int wm_adsp_stream_free(struct wm_adsp *adsp); -extern int wm_adsp_stream_start(struct wm_adsp *adsp); - -extern int wm_adsp_stream_has_error(struct wm_adsp *dsp); -extern int wm_adsp_stream_handle_irq(struct wm_adsp *adsp, bool *trigger); -extern int wm_adsp_stream_read(struct wm_adsp *adsp, char __user *buf, - size_t count); -extern int wm_adsp_stream_avail(const struct wm_adsp *adsp); +extern int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger); +extern int wm_adsp_compr_open(struct wm_adsp_compr *compr, + struct snd_compr_stream *stream); +extern int wm_adsp_compr_free(struct snd_compr_stream *stream); +extern int wm_adsp_compr_set_params(struct snd_compr_stream *stream, + struct snd_compr_params *params); +extern int wm_adsp_compr_get_params(struct snd_compr_stream *stream, + struct snd_codec *params); +extern int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd); +extern int wm_adsp_compr_pointer(struct snd_compr_stream *stream, + struct snd_compr_tstamp *tstamp); +extern int wm_adsp_compr_copy(struct snd_compr_stream *stream, + char __user *buf, size_t count); +extern int wm_adsp_compr_get_caps(struct snd_compr_stream *stream, + struct snd_compr_caps *caps); +extern int wm_adsp_compr_get_codec_caps(struct snd_compr_stream *stream, + struct snd_compr_codec_caps *codec); +extern void wm_adsp_compr_init(struct wm_adsp *dsp, struct wm_adsp_compr *compr); +extern void wm_adsp_compr_destroy(struct wm_adsp_compr *compr); #endif From 0842e1779087b217f53efc6f39cc4b7c4fe6c6cf Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 1 Dec 2015 16:16:25 +0000 Subject: [PATCH 1047/1167] ASoC: wm_adsp: Factor out fetching host buffer indexes Move the fetching of indexes and calcuation of available data out into a separate function. Change-Id: Ia3563bb618ff9a987cbf6ec3ecabcd68900d8518 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 75 ++++++++++++++++++++++++++------------ sound/soc/codecs/wm_adsp.h | 3 ++ 2 files changed, 54 insertions(+), 24 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 5a0a34054a2..da4da036752 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3294,20 +3294,22 @@ static int wm_adsp_read_buffer(struct wm_adsp_compr *compr, int32_t read_index, return num_words; } -static int wm_adsp_capture_block(struct wm_adsp_compr *compr, int *avail) +static inline int wm_adsp_buffer_size(struct wm_adsp_compr *compr) { - struct wm_adsp *dsp = compr->dsp; - const struct wm_adsp_buffer_region *host_regions = - dsp->host_buf_info.host_regions; + const struct wm_adsp *dsp = compr->dsp; int last_region = dsp->firmwares[dsp->fw].caps->num_host_regions - 1; - int host_size = host_regions[last_region].cumulative_size; - int num_words; + + return dsp->host_buf_info.host_regions[last_region].cumulative_size; +} + +static int wm_adsp_buffer_update_avail(struct wm_adsp_compr *compr) +{ + struct wm_adsp *dsp = compr->dsp; u32 next_read_index, next_write_index; - int32_t write_index, read_index; + int write_index, avail; int ret; lockdep_assert_held(&dsp->host_buf_info.lock); - BUG_ON(!host_regions); /* should have been checked by caller */ /* Get current host buffer status */ ret = wm_adsp_host_buffer_read(dsp, @@ -3322,29 +3324,54 @@ static int wm_adsp_capture_block(struct wm_adsp_compr *compr, int *avail) if (ret < 0) return ret; - read_index = sign_extend32(next_read_index, 23); + compr->buf_read_index = sign_extend32(next_read_index, 23); write_index = sign_extend32(next_write_index, 23); - if (read_index < 0) - return 0; /* stream has not yet started */ + if (compr->buf_read_index < 0) + return 0; - *avail = write_index - read_index; - if (*avail < 0) - *avail += host_size; + avail = write_index - compr->buf_read_index; + if (avail < 0) + avail += wm_adsp_buffer_size(compr); - /* Read data from DSP */ - num_words = wm_adsp_read_buffer(compr, read_index, *avail); + adsp_dbg(dsp, "readindex=0x%x, writeindex=0x%x, avail=%d\n", + compr->buf_read_index, write_index, avail); + + compr->buf_avail = avail; + + return 0; +} + +static int wm_adsp_capture_block(struct wm_adsp_compr *compr) +{ + struct wm_adsp *dsp = compr->dsp; + int num_words; + int ret; + + lockdep_assert_held(&dsp->host_buf_info.lock); + BUG_ON(!dsp->host_buf_info.host_regions); + + ret = wm_adsp_buffer_update_avail(compr); + if (ret < 0) + return ret; + + if (compr->buf_read_index < 0) + return 0; /* stream has not yet started */ + + /* Read data from DSP buffer */ + num_words = wm_adsp_read_buffer(compr, compr->buf_read_index, + compr->buf_avail); if (num_words <= 0) return num_words; /* update read index to account for words read */ - next_read_index += num_words; - if (next_read_index == host_size) - next_read_index = 0; + compr->buf_read_index += num_words; + if (compr->buf_read_index == wm_adsp_buffer_size(compr)) + compr->buf_read_index = 0; ret = wm_adsp_host_buffer_write(dsp, HOST_BUFFER_FIELD(next_read_index), - next_read_index); + compr->buf_read_index); if (ret < 0) return ret; @@ -3437,6 +3464,7 @@ static int wm_adsp_stream_start(struct wm_adsp_compr *compr) goto out_unlock; } + compr->buf_avail = 0; compr->max_dsp_read_bytes = WM_ADSP_MAX_READ_SIZE * sizeof(u32); ret = wm_adsp_host_buffer_write(dsp, @@ -3456,7 +3484,6 @@ static int wm_adsp_stream_start(struct wm_adsp_compr *compr) static int wm_adsp_stream_capture(struct wm_adsp_compr *compr) { struct wm_adsp *dsp = compr->dsp; - int avail = 0; int amount_read; int total_read = 0; int ret = 0; @@ -3473,7 +3500,7 @@ static int wm_adsp_stream_capture(struct wm_adsp_compr *compr) do { amount_read = 0; do { - ret = wm_adsp_capture_block(compr, &avail); + ret = wm_adsp_capture_block(compr); if (ret < 0) return ret; @@ -3481,9 +3508,9 @@ static int wm_adsp_stream_capture(struct wm_adsp_compr *compr) } while (ret > 0); total_read += amount_read; - } while (amount_read > 0 && avail > WM_ADSP_MAX_READ_SIZE); + } while (amount_read > 0 && compr->buf_avail > WM_ADSP_MAX_READ_SIZE); - if (avail > WM_ADSP_MAX_READ_SIZE) + if (compr->buf_avail > WM_ADSP_MAX_READ_SIZE) dsp->buffer_drain_pending = true; return total_read * WM_ADSP_DATA_WORD_SIZE; diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 398d7ca5451..fd8e95fc32e 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -102,6 +102,9 @@ struct wm_adsp_compr { bool allocated; + int buf_read_index; + int buf_avail; + u32 irq_watermark; int max_dsp_read_bytes; From 036360dd9b8d582fcbd7ffabcbe1abb6397c2dd4 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 1 Dec 2015 16:23:56 +0000 Subject: [PATCH 1048/1167] ASoC: wm_adsp: Only fetch buffer read index once We only have to fetch the buffer read index the first time we access the buffer. From that point only the driver updates the read index so we can use our cached value. Change-Id: Id00db178c5d963d9a60c6286ef68ae8d3205c8e1 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 30 +++++++++++++++++++----------- 1 file changed, 19 insertions(+), 11 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index da4da036752..d5460a528e2 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3306,17 +3306,28 @@ static int wm_adsp_buffer_update_avail(struct wm_adsp_compr *compr) { struct wm_adsp *dsp = compr->dsp; u32 next_read_index, next_write_index; - int write_index, avail; + int write_index, read_index, avail; int ret; lockdep_assert_held(&dsp->host_buf_info.lock); - /* Get current host buffer status */ - ret = wm_adsp_host_buffer_read(dsp, - HOST_BUFFER_FIELD(next_read_index), - &next_read_index); - if (ret < 0) - return ret; + /* Only sync the read index if we haven't already read a valid index */ + if (compr->buf_read_index < 0) { + ret = wm_adsp_host_buffer_read(dsp, + HOST_BUFFER_FIELD(next_read_index), + &next_read_index); + if (ret < 0) + return ret; + + read_index = sign_extend32(next_read_index, 23); + + if (read_index < 0) { + adsp_dbg(dsp, "Avail check on unstarted stream\n"); + return 0; + } + + compr->buf_read_index = read_index; + } ret = wm_adsp_host_buffer_read(dsp, HOST_BUFFER_FIELD(next_write_index), @@ -3324,12 +3335,8 @@ static int wm_adsp_buffer_update_avail(struct wm_adsp_compr *compr) if (ret < 0) return ret; - compr->buf_read_index = sign_extend32(next_read_index, 23); write_index = sign_extend32(next_write_index, 23); - if (compr->buf_read_index < 0) - return 0; - avail = write_index - compr->buf_read_index; if (avail < 0) avail += wm_adsp_buffer_size(compr); @@ -3464,6 +3471,7 @@ static int wm_adsp_stream_start(struct wm_adsp_compr *compr) goto out_unlock; } + compr->buf_read_index = -1; compr->buf_avail = 0; compr->max_dsp_read_bytes = WM_ADSP_MAX_READ_SIZE * sizeof(u32); From 472a8e759aece3b0889928ec1a73ca5b7690455d Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 1 Dec 2015 17:51:58 +0000 Subject: [PATCH 1049/1167] ASoC: wm_adsp: Remove capture circular buffer There's no need for the large circular buffer in the driver to collect data from the firmware. The firmware already buffers the data Change-Id: If57f8e7d402d0409ecd75e46976a57212e6651ec Signed-off-by: Charles Keepax Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 477 +++++++++++++++---------------------- sound/soc/codecs/wm_adsp.h | 13 +- 2 files changed, 198 insertions(+), 292 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index d5460a528e2..f21771b2670 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -329,8 +329,13 @@ struct wm_adsp_host_buffer { __be32 words_written[2]; /* total words written (64 bit) */ }; -#define WM_ADSP_DATA_WORD_SIZE 3 -#define WM_ADSP_MAX_READ_SIZE 256 +#define WM_ADSP_DATA_WORD_SIZE 3 +#define WM_ADSP_MIN_FRAGMENTS 1 +#define WM_ADSP_MAX_FRAGMENTS 256 +#define WM_ADSP_MIN_FRAGMENT_SIZE (64 * WM_ADSP_DATA_WORD_SIZE) +#define WM_ADSP_MAX_FRAGMENT_SIZE (4096 * WM_ADSP_DATA_WORD_SIZE) + + #define WM_ADSP_ALG_XM_STRUCT_MAGIC 0x49aec7 #define WM_ADSP_DEFAULT_WATERMARK DIV_ROUND_UP(2048, WM_ADSP_DATA_WORD_SIZE) @@ -3227,73 +3232,6 @@ static void wm_adsp_free_host_buf_info(struct wm_adsp *dsp) kfree(host_regions); } -static int wm_adsp_read_buffer(struct wm_adsp_compr *compr, int32_t read_index, - int avail) -{ - struct wm_adsp *dsp = compr->dsp; - int circ_space_words = CIRC_SPACE(dsp->capt_buf.head, - dsp->capt_buf.tail, - dsp->capt_buf_size) / - WM_ADSP_DATA_WORD_SIZE; - u8 *capt_buf = (u8 *)dsp->capt_buf.buf; - int capt_buf_h = dsp->capt_buf.head; - int capt_buf_mask = dsp->capt_buf_size - 1; - struct wm_adsp_buffer_region *host_regions = - dsp->host_buf_info.host_regions; - int mem_type; - unsigned int adsp_addr; - int num_words; - int i, ret; - - lockdep_assert_held(&dsp->host_buf_info.lock); - BUG_ON(!host_regions); /* should have been checked by caller */ - - /* Calculate read parameters */ - for (i = 0; i < dsp->firmwares[dsp->fw].caps->num_host_regions; ++i) { - if (read_index < host_regions[i].cumulative_size) - break; - } - - if (i == dsp->firmwares[dsp->fw].caps->num_host_regions) - return -EINVAL; - - num_words = host_regions[i].cumulative_size - read_index; - mem_type = host_regions[i].mem_type; - adsp_addr = host_regions[i].base_addr + - (read_index - host_regions[i].offset); - - if (circ_space_words < num_words) - num_words = circ_space_words; - if (avail < num_words) - num_words = avail; - if (num_words >= WM_ADSP_MAX_READ_SIZE) { - num_words = WM_ADSP_MAX_READ_SIZE; - } - if (!num_words) - return 0; - - /* Read data from DSP */ - ret = wm_adsp_read_data_block(dsp, mem_type, adsp_addr, - num_words, dsp->raw_capt_buf); - if (ret != 0) - return ret; - - /* Copy to circular buffer */ - for (i = 0; i < num_words; ++i) { - u32 x = dsp->raw_capt_buf[i]; - - capt_buf[capt_buf_h++] = (u8)((x >> 0) & 0xff); - capt_buf_h &= capt_buf_mask; - capt_buf[capt_buf_h++] = (u8)((x >> 8) & 0xff); - capt_buf_h &= capt_buf_mask; - capt_buf[capt_buf_h++] = (u8)((x >> 16) & 0xff); - capt_buf_h &= capt_buf_mask; - } - - dsp->capt_buf.head = capt_buf_h; - return num_words; -} - static inline int wm_adsp_buffer_size(struct wm_adsp_compr *compr) { const struct wm_adsp *dsp = compr->dsp; @@ -3349,113 +3287,169 @@ static int wm_adsp_buffer_update_avail(struct wm_adsp_compr *compr) return 0; } -static int wm_adsp_capture_block(struct wm_adsp_compr *compr) +static int wm_adsp_stream_has_error_locked(struct wm_adsp *dsp) { - struct wm_adsp *dsp = compr->dsp; - int num_words; int ret; + lockdep_assert_held(&dsp->host_buf_info.lock); + + if (dsp->host_buf_info.error != 0) + return -EIO; + + ret = wm_adsp_host_buffer_read(dsp, + HOST_BUFFER_FIELD(error), + &dsp->host_buf_info.error); + if (ret < 0) { + adsp_err(dsp, "Failed to read error field: %d\n", ret); + return ret; + } + + if (dsp->host_buf_info.error != 0) { + /* log the first time we see the error */ + adsp_warn(dsp, "DSP stream error occurred: %d\n", + dsp->host_buf_info.error); + return -EIO; + } + + return 0; +} + +static int wm_adsp_buffer_capture_block(struct wm_adsp_compr *compr, int target) +{ + struct wm_adsp *dsp = compr->dsp; + const struct wm_adsp_buffer_region *host_regions = + dsp->host_buf_info.host_regions; + int num_regions = dsp->firmwares[dsp->fw].caps->num_host_regions; + u8 *pack_in = (u8 *)compr->capt_buf; + u8 *pack_out = (u8 *)compr->capt_buf; + unsigned int adsp_addr; + int mem_type, nwords; + int i, j, ret; + lockdep_assert_held(&dsp->host_buf_info.lock); BUG_ON(!dsp->host_buf_info.host_regions); - ret = wm_adsp_buffer_update_avail(compr); + /* Calculate read parameters */ + for (i = 0; i < num_regions; ++i) + if (compr->buf_read_index < host_regions[i].cumulative_size) + break; + + if (i == num_regions) + return -EINVAL; + + mem_type = host_regions[i].mem_type; + adsp_addr = host_regions[i].base_addr + + (compr->buf_read_index - host_regions[i].offset); + + nwords = host_regions[i].cumulative_size - compr->buf_read_index; + + if (nwords > target) + nwords = target; + if (nwords > compr->buf_avail) + nwords = compr->buf_avail; + if (nwords > compr->max_read_words) + nwords = compr->max_read_words; + if (!nwords) + return 0; + + /* Read data from DSP */ + ret = wm_adsp_read_data_block(dsp, mem_type, adsp_addr, + nwords, compr->capt_buf); if (ret < 0) return ret; - if (compr->buf_read_index < 0) - return 0; /* stream has not yet started */ + /* Remove the padding bytes from the data read from the DSP */ + for (i = 0; i < nwords; i++) { + for (j = 0; j < WM_ADSP_DATA_WORD_SIZE; j++) + *pack_out++ = *pack_in++; - /* Read data from DSP buffer */ - num_words = wm_adsp_read_buffer(compr, compr->buf_read_index, - compr->buf_avail); - if (num_words <= 0) - return num_words; + pack_in += sizeof(*(compr->capt_buf)) - WM_ADSP_DATA_WORD_SIZE; + } /* update read index to account for words read */ - compr->buf_read_index += num_words; + compr->buf_read_index += nwords; if (compr->buf_read_index == wm_adsp_buffer_size(compr)) compr->buf_read_index = 0; - ret = wm_adsp_host_buffer_write(dsp, - HOST_BUFFER_FIELD(next_read_index), + ret = wm_adsp_host_buffer_write(dsp, HOST_BUFFER_FIELD(next_read_index), compr->buf_read_index); if (ret < 0) return ret; - return num_words; + /* update avail to account for words read */ + compr->buf_avail -= nwords; + + return nwords; } -static int wm_adsp_stream_has_error_locked(struct wm_adsp *dsp) +static int wm_adsp_compr_read(struct wm_adsp_compr *compr, + char __user *buf, size_t count) { + struct wm_adsp *dsp = compr->dsp; + int ntotal = 0; + int nwords, nbytes; int ret; lockdep_assert_held(&dsp->host_buf_info.lock); + BUG_ON(!dsp->host_buf_info.host_regions); - if (dsp->host_buf_info.error != 0) - return -EIO; + adsp_dbg(dsp, "Requested read of %d bytes\n", count); - ret = wm_adsp_host_buffer_read(dsp, - HOST_BUFFER_FIELD(error), - &dsp->host_buf_info.error); - if (ret < 0) { - adsp_err(dsp, "Failed to read error field: %d\n", ret); + ret = wm_adsp_stream_has_error_locked(dsp); + if (ret) return ret; - } - if (dsp->host_buf_info.error != 0) { - /* log the first time we see the error */ - adsp_warn(dsp, "DSP stream error occurred: %d\n", - dsp->host_buf_info.error); - return -EIO; - } + count /= WM_ADSP_DATA_WORD_SIZE; - return 0; + do { + nwords = wm_adsp_buffer_capture_block(compr, count); + if (nwords < 0) { + adsp_err(dsp, "Failed to capture block: %d\n", nwords); + return nwords; + } + + nbytes = nwords * WM_ADSP_DATA_WORD_SIZE; + + adsp_dbg(dsp, "Read %d bytes\n", nbytes); + + if (copy_to_user(buf + ntotal, compr->capt_buf, nbytes)) { + adsp_err(dsp, "Failed to copy data to user: %d, %d\n", + ntotal, nbytes); + return -EFAULT; + } + + count -= nwords; + ntotal += nbytes; + } while (nwords > 0 && count > 0); + + compr->copied_total += ntotal; + + return ntotal; } static int wm_adsp_streambuf_alloc(struct wm_adsp_compr *compr, const struct snd_compr_params *params) { - struct wm_adsp *dsp = compr->dsp; - int ret; unsigned int size; - if (!dsp->capt_buf.buf) { - dsp->capt_buf_size = WM_ADSP_CAPTURE_BUFFER_SIZE; - dsp->capt_buf.buf = vmalloc(dsp->capt_buf_size); - - if (!dsp->capt_buf.buf) - return -ENOMEM; - } + if (params->buffer.fragment_size == 0) + return -EINVAL; - dsp->capt_buf.head = 0; - dsp->capt_buf.tail = 0; + compr->max_read_words = + params->buffer.fragment_size / WM_ADSP_DATA_WORD_SIZE; - if (!dsp->raw_capt_buf) { - size = WM_ADSP_MAX_READ_SIZE * sizeof(*dsp->raw_capt_buf); - dsp->raw_capt_buf = kzalloc(size, GFP_DMA | GFP_KERNEL); + if (!compr->capt_buf) { + size = compr->max_read_words * sizeof(*compr->capt_buf); + compr->capt_buf = kmalloc(size, GFP_DMA | GFP_KERNEL); - if (!dsp->raw_capt_buf) { - ret = -ENOMEM; - goto err_capt_buf; - } + if (!compr->capt_buf) + return -ENOMEM; } - size = params->buffer.fragment_size; - if (size == 0) { - compr->irq_watermark = WM_ADSP_DEFAULT_WATERMARK; - adsp_warn(dsp, "No fragment size, assuming %u", - compr->irq_watermark * WM_ADSP_DATA_WORD_SIZE); - } else { - compr->irq_watermark = - DIV_ROUND_UP(size, WM_ADSP_DATA_WORD_SIZE); - } + compr->irq_watermark = DIV_ROUND_UP(params->buffer.fragment_size, + WM_ADSP_DATA_WORD_SIZE); return 0; - -err_capt_buf: - vfree(dsp->capt_buf.buf); - - return ret; } static int wm_adsp_stream_start(struct wm_adsp_compr *compr) @@ -3473,7 +3467,6 @@ static int wm_adsp_stream_start(struct wm_adsp_compr *compr) compr->buf_read_index = -1; compr->buf_avail = 0; - compr->max_dsp_read_bytes = WM_ADSP_MAX_READ_SIZE * sizeof(u32); ret = wm_adsp_host_buffer_write(dsp, HOST_BUFFER_FIELD(high_water_mark), @@ -3489,51 +3482,6 @@ static int wm_adsp_stream_start(struct wm_adsp_compr *compr) return ret; } -static int wm_adsp_stream_capture(struct wm_adsp_compr *compr) -{ - struct wm_adsp *dsp = compr->dsp; - int amount_read; - int total_read = 0; - int ret = 0; - - dsp->buffer_drain_pending = false; - - lockdep_assert_held(&dsp->host_buf_info.lock); - - if (!dsp->host_buf_info.host_regions) { - adsp_warn(dsp, "No host buffer info\n"); - return -EIO; - } - - do { - amount_read = 0; - do { - ret = wm_adsp_capture_block(compr); - if (ret < 0) - return ret; - - amount_read += ret; - } while (ret > 0); - - total_read += amount_read; - } while (amount_read > 0 && compr->buf_avail > WM_ADSP_MAX_READ_SIZE); - - if (compr->buf_avail > WM_ADSP_MAX_READ_SIZE) - dsp->buffer_drain_pending = true; - - return total_read * WM_ADSP_DATA_WORD_SIZE; -} - -static int wm_adsp_stream_avail(const struct wm_adsp_compr *compr) -{ - if (!compr->allocated) - return 0; - else - return CIRC_CNT(compr->dsp->capt_buf.head, - compr->dsp->capt_buf.tail, - compr->dsp->capt_buf_size); -} - static int wm_adsp_stream_update_irq_count(struct wm_adsp *dsp, bool enable, u32 *old_count) { @@ -3571,9 +3519,8 @@ static int wm_adsp_stream_update_irq_count(struct wm_adsp *dsp, bool enable, int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) { struct wm_adsp *dsp = compr->dsp; - int ret, avail, bytes_captured = 0; u32 old_irq_count; - bool enable_irqs = false; + int ret; if (trigger) *trigger = false; @@ -3592,39 +3539,26 @@ int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) mutex_lock(&compr->lock); - /* If the firmware buffer has data available read it now, - * no need to wait for the firmware to issue an interrupt. - */ + /* Fetch read_index and update count of available data */ if (compr->allocated) { - bytes_captured = wm_adsp_stream_capture(compr); - if (bytes_captured < 0) { - ret = bytes_captured; + ret = wm_adsp_buffer_update_avail(compr); + if (ret < 0) { + adsp_err(dsp, "Error reading read_index: %d\n", ret); goto out_compr_unlock; } - - /* allow more interrupts if our buffer is not full */ - if (!dsp->buffer_drain_pending) - enable_irqs = true; } - ret = wm_adsp_stream_update_irq_count(dsp, enable_irqs, &old_irq_count); + ret = wm_adsp_stream_update_irq_count(dsp, false, &old_irq_count); if (ret < 0) goto out_compr_unlock; - compr->total_copied += bytes_captured; - - if (compr->allocated) { - avail = wm_adsp_stream_avail(compr); - if (avail > WM_ADSP2_DEFAULT_FRAGMENT_SIZE) - snd_compr_fragment_elapsed(compr->stream); - } + if (compr->allocated) + snd_compr_fragment_elapsed(compr->stream); /* irq_count = 2 only on the initial trigger */ if (trigger && (old_irq_count == 2)) *trigger = true; - ret = bytes_captured; - out_compr_unlock: mutex_unlock(&compr->lock); out_buf_unlock: @@ -3633,71 +3567,6 @@ int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) } EXPORT_SYMBOL_GPL(wm_adsp_compr_irq); -static int wm_adsp_stream_read(struct wm_adsp_compr *compr, - char __user *buf, size_t count) -{ - struct wm_adsp *dsp = compr->dsp; - int avail, to_end; - int ret; - - if (!dsp->running) - return -EIO; - - avail = CIRC_CNT(dsp->capt_buf.head, - dsp->capt_buf.tail, - dsp->capt_buf_size); - to_end = CIRC_CNT_TO_END(dsp->capt_buf.head, - dsp->capt_buf.tail, - dsp->capt_buf_size); - - if (avail < count) - count = avail; - - adsp_dbg(dsp, "%s: avail=%d toend=%d count=%zo\n", - __func__, avail, to_end, count); - - if (count > to_end) { - if (copy_to_user(buf, - dsp->capt_buf.buf + - dsp->capt_buf.tail, - to_end)) - return -EFAULT; - if (copy_to_user(buf + to_end, dsp->capt_buf.buf, - count - to_end)) - return -EFAULT; - } else { - if (copy_to_user(buf, - dsp->capt_buf.buf + - dsp->capt_buf.tail, - count)) - return -EFAULT; - } - - dsp->capt_buf.tail += count; - dsp->capt_buf.tail &= dsp->capt_buf_size - 1; - - if (dsp->buffer_drain_pending) { - mutex_lock(&dsp->host_buf_info.lock); - - ret = wm_adsp_stream_has_error_locked(dsp); - if (ret >= 0) { - ret = wm_adsp_stream_capture(compr); - if (ret >= 0) - ret = wm_adsp_stream_update_irq_count( - dsp, - !dsp->buffer_drain_pending, - NULL); - } - - mutex_unlock(&dsp->host_buf_info.lock); - - if (ret < 0) - return ret; - } - - return count; -} - int wm_adsp_compr_open(struct wm_adsp_compr *compr, struct snd_compr_stream *stream) { @@ -3736,19 +3605,15 @@ int wm_adsp_compr_free(struct snd_compr_stream *stream) mutex_lock(&compr->lock); compr->allocated = false; - compr->total_copied = 0; + compr->copied_total = 0; compr->stream = NULL; stream->runtime->private_data = NULL; - kfree(compr->dsp->raw_capt_buf); - compr->dsp->raw_capt_buf = NULL; - - if (compr->dsp->capt_buf.buf) { - vfree(compr->dsp->capt_buf.buf); - compr->dsp->capt_buf.buf = NULL; - } + kfree(compr->capt_buf); + compr->capt_buf = NULL; mutex_unlock(&compr->lock); + return 0; } EXPORT_SYMBOL_GPL(wm_adsp_compr_free); @@ -3759,6 +3624,13 @@ int wm_adsp_compr_set_params(struct snd_compr_stream *stream, struct wm_adsp_compr *compr = stream->runtime->private_data; int ret = 0; + if ((params->buffer.fragment_size % WM_ADSP_DATA_WORD_SIZE) != 0) { + adsp_warn(compr->dsp, + "Fragment size %u not a multiple of DSP word size %u\n", + params->buffer.fragment_size, WM_ADSP_DATA_WORD_SIZE); + return -EINVAL; + } + mutex_lock(&compr->lock); if (!wm_adsp_format_supported(compr->dsp, stream, params)) { @@ -3819,13 +3691,52 @@ int wm_adsp_compr_pointer(struct snd_compr_stream *stream, struct snd_compr_tstamp *tstamp) { struct wm_adsp_compr *compr = stream->runtime->private_data; + int ret = 0; + + mutex_unlock(&compr->dsp->host_buf_info.lock); + + ret = wm_adsp_stream_has_error_locked(compr->dsp); + if (ret) + goto out_buf_unlock; mutex_lock(&compr->lock); - tstamp->byte_offset = 0; - tstamp->copied_total = compr->total_copied; + + if (compr->buf_avail < compr->max_read_words) { + ret = wm_adsp_buffer_update_avail(compr); + if (ret < 0) { + adsp_err(compr->dsp, "Error reading avail: %d\n", ret); + goto out; + } + + /* + * If we really have less than 1 fragment available ack the + * last DSP IRQ and rely on the IRQ to inform us when a whole + * fragment is available. + */ + if (compr->buf_avail < compr->max_read_words) { + ret = wm_adsp_stream_update_irq_count(compr->dsp, + true, NULL); + if (ret < 0) { + adsp_err(compr->dsp, + "Failed to ack buffer IRQ: %d\n", ret); + goto out; + } + } + } + + tstamp->copied_total = compr->copied_total; + tstamp->copied_total += compr->buf_avail * WM_ADSP_DATA_WORD_SIZE; + +out: + adsp_dbg(compr->dsp, "tstamp->copied_total=%d (avail=%d)\n", + tstamp->copied_total, compr->buf_avail); + mutex_unlock(&compr->lock); - return 0; +out_buf_unlock: + mutex_unlock(&compr->dsp->host_buf_info.lock); + + return ret; } EXPORT_SYMBOL_GPL(wm_adsp_compr_pointer); @@ -3837,10 +3748,10 @@ int wm_adsp_compr_copy(struct snd_compr_stream *stream, mutex_lock(&compr->lock); - if (stream->direction == SND_COMPRESS_PLAYBACK) - ret = -EINVAL; + if (stream->direction == SND_COMPRESS_CAPTURE) + ret = wm_adsp_compr_read(compr, buf, count); else - ret = wm_adsp_stream_read(compr, buf, count); + ret = -ENOTSUPP; mutex_unlock(&compr->lock); @@ -3860,10 +3771,10 @@ int wm_adsp_compr_get_caps(struct snd_compr_stream *stream, memset(caps, 0, sizeof(*caps)); caps->direction = stream->direction; - caps->min_fragment_size = WM_ADSP2_DEFAULT_FRAGMENT_SIZE; - caps->max_fragment_size = WM_ADSP2_DEFAULT_FRAGMENT_SIZE; - caps->min_fragments = WM_ADSP2_DEFAULT_FRAGMENTS; - caps->max_fragments = WM_ADSP2_DEFAULT_FRAGMENTS; + caps->min_fragment_size = WM_ADSP_MIN_FRAGMENT_SIZE; + caps->max_fragment_size = WM_ADSP_MAX_FRAGMENT_SIZE; + caps->min_fragments = WM_ADSP_MIN_FRAGMENTS; + caps->max_fragments = WM_ADSP_MAX_FRAGMENTS; if (dsp->firmwares[dsp->fw].caps) { for (i = 0; i < dsp->firmwares[dsp->fw].num_caps; i++) diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index fd8e95fc32e..ca322f46121 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -37,9 +37,6 @@ WM_ADSP2_REGION_8 | WM_ADSP2_REGION_9) #define WM_ADSP2_REGION_ALL (WM_ADSP2_REGION_0 | WM_ADSP2_REGION_1_9) -#define WM_ADSP2_DEFAULT_FRAGMENTS 1 -#define WM_ADSP2_DEFAULT_FRAGMENT_SIZE 4096 - struct wm_adsp; struct wm_adsp_region { @@ -105,10 +102,12 @@ struct wm_adsp_compr { int buf_read_index; int buf_avail; + u32 *capt_buf; + u32 irq_watermark; - int max_dsp_read_bytes; + int max_read_words; - size_t total_copied; + size_t copied_total; struct snd_compr_stream *stream; }; @@ -149,10 +148,6 @@ struct wm_adsp { struct list_head ctl_list; struct wm_adsp_host_buf_info host_buf_info; - u32 *raw_capt_buf; - struct circ_buf capt_buf; - int capt_buf_size; - bool buffer_drain_pending; int num_firmwares; struct wm_adsp_fw_defs *firmwares; From 2d2f67ebbfcf4bf278e7c9582ed4561bafef2573 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 2 Dec 2015 15:42:38 +0000 Subject: [PATCH 1050/1167] ASoC: wm_adsp: Simplify firmware irq ack As we now only ack the irq from wm_adsp_compr_pointer() and always request more interrupts we can simplify the implementation of writing back the ack. Change-Id: I7dbf9fd7514620e6a9dc1d509766fd3e64dc94bd Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 82 +++++++++++++++----------------------- sound/soc/codecs/wm_adsp.h | 1 + 2 files changed, 33 insertions(+), 50 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index f21771b2670..dd332a83c2a 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3190,6 +3190,7 @@ static int wm_adsp_init_host_buf_info(struct wm_adsp *dsp) mutex_lock(&dsp->host_buf_info.lock); dsp->host_buf_info.error = 0; + dsp->host_buf_info.irq_ack = 0xFFFFFFFF; for (i = 0; i < 5; ++i) { ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, @@ -3482,49 +3483,11 @@ static int wm_adsp_stream_start(struct wm_adsp_compr *compr) return ret; } -static int wm_adsp_stream_update_irq_count(struct wm_adsp *dsp, bool enable, - u32 *old_count) -{ - u32 irq_count; - int ret; - - lockdep_assert_held(&dsp->host_buf_info.lock); - - if (!dsp->host_buf_info.host_buf_ptr) { - adsp_warn(dsp, "No host buffer info\n"); - return -EIO; - } - - ret = wm_adsp_host_buffer_read(dsp, - HOST_BUFFER_FIELD(irq_count), - &irq_count); - if (ret < 0) - return ret; - - if (old_count) - *old_count = irq_count; - - if (irq_count == 0) - return 0; /* don't ack if there haven't been any IRQs */ - - if (enable) - return wm_adsp_host_buffer_write(dsp, - HOST_BUFFER_FIELD(irq_ack), - irq_count | 1); - else - return 0; - -} - int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) { struct wm_adsp *dsp = compr->dsp; - u32 old_irq_count; int ret; - if (trigger) - *trigger = false; - mutex_lock(&dsp->host_buf_info.lock); if (!dsp->host_buf_info.host_buf_ptr) { @@ -3537,6 +3500,21 @@ int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) if (ret) goto out_buf_unlock; + ret = wm_adsp_host_buffer_read(dsp, HOST_BUFFER_FIELD(irq_count), + &dsp->host_buf_info.irq_ack); + if (ret < 0) { + adsp_err(dsp, "Failed to get irq_count: %d\n", ret); + goto out_buf_unlock; + } + + if (trigger) { + /* irq_count = 2 only on the initial trigger */ + if (dsp->host_buf_info.irq_ack == 2) + *trigger = true; + else + *trigger = false; + } + mutex_lock(&compr->lock); /* Fetch read_index and update count of available data */ @@ -3546,18 +3524,9 @@ int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) adsp_err(dsp, "Error reading read_index: %d\n", ret); goto out_compr_unlock; } - } - - ret = wm_adsp_stream_update_irq_count(dsp, false, &old_irq_count); - if (ret < 0) - goto out_compr_unlock; - if (compr->allocated) snd_compr_fragment_elapsed(compr->stream); - - /* irq_count = 2 only on the initial trigger */ - if (trigger && (old_irq_count == 2)) - *trigger = true; + } out_compr_unlock: mutex_unlock(&compr->lock); @@ -3567,6 +3536,20 @@ int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) } EXPORT_SYMBOL_GPL(wm_adsp_compr_irq); +static int wm_adsp_buffer_ack_irq(struct wm_adsp *dsp) +{ + if (dsp->host_buf_info.irq_ack & 0x01) + return 0; + + adsp_dbg(dsp, "Acking buffer IRQ(0x%x)\n", + dsp->host_buf_info.irq_ack); + + dsp->host_buf_info.irq_ack |= 0x01; + + return wm_adsp_host_buffer_write(dsp, HOST_BUFFER_FIELD(irq_ack), + dsp->host_buf_info.irq_ack); +} + int wm_adsp_compr_open(struct wm_adsp_compr *compr, struct snd_compr_stream *stream) { @@ -3714,8 +3697,7 @@ int wm_adsp_compr_pointer(struct snd_compr_stream *stream, * fragment is available. */ if (compr->buf_avail < compr->max_read_words) { - ret = wm_adsp_stream_update_irq_count(compr->dsp, - true, NULL); + ret = wm_adsp_buffer_ack_irq(compr->dsp); if (ret < 0) { adsp_err(compr->dsp, "Failed to ack buffer IRQ: %d\n", ret); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index ca322f46121..48351c61c1b 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -91,6 +91,7 @@ struct wm_adsp_host_buf_info { struct wm_adsp_buffer_region *host_regions; u32 host_buf_ptr; u32 error; + u32 irq_ack; }; struct wm_adsp_compr { From c3bc5bb05c7ff4e693a50618d110f56ac40eaf89 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 2 Dec 2015 16:24:41 +0000 Subject: [PATCH 1051/1167] ASoC: wm_adsp: Remove unnecessary compressed API functions There's no need to provide empty implementations of the get_params and codec_caps compressed API functions. This patch removes them. Change-Id: I0c66bb70da7c6c8439ca726a93a1490f3a10c9f8 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 2 -- sound/soc/codecs/florida.c | 2 -- sound/soc/codecs/largo.c | 2 -- sound/soc/codecs/marley.c | 2 -- sound/soc/codecs/moon.c | 2 -- sound/soc/codecs/wm_adsp.c | 14 -------------- sound/soc/codecs/wm_adsp.h | 4 ---- 7 files changed, 28 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 008852ef2d3..21d5c7b3158 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2969,12 +2969,10 @@ static struct snd_compr_ops clearwater_compr_ops = { .open = clearwater_compr_open, .free = wm_adsp_compr_free, .set_params = wm_adsp_compr_set_params, - .get_params = wm_adsp_compr_get_params, .trigger = clearwater_compr_trigger, .pointer = wm_adsp_compr_pointer, .copy = wm_adsp_compr_copy, .get_caps = wm_adsp_compr_get_caps, - .get_codec_caps = wm_adsp_compr_get_codec_caps, }; static struct snd_soc_platform_driver clearwater_compr_platform = { diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index e4811fe0bdd..cb3ca9503db 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2436,12 +2436,10 @@ static struct snd_compr_ops florida_compr_ops = { .open = florida_compr_open, .free = wm_adsp_compr_free, .set_params = wm_adsp_compr_set_params, - .get_params = wm_adsp_compr_get_params, .trigger = florida_compr_trigger, .pointer = wm_adsp_compr_pointer, .copy = wm_adsp_compr_copy, .get_caps = wm_adsp_compr_get_caps, - .get_codec_caps = wm_adsp_compr_get_codec_caps, }; static struct snd_soc_platform_driver florida_compr_platform = { diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index de01805debb..294e686e8c0 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -1331,12 +1331,10 @@ static struct snd_compr_ops largo_compr_ops = { .open = largo_compr_open, .free = wm_adsp_compr_free, .set_params = wm_adsp_compr_set_params, - .get_params = wm_adsp_compr_get_params, .trigger = largo_compr_trigger, .pointer = wm_adsp_compr_pointer, .copy = wm_adsp_compr_copy, .get_caps = wm_adsp_compr_get_caps, - .get_codec_caps = wm_adsp_compr_get_codec_caps, }; static struct snd_soc_platform_driver largo_compr_platform = { diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index a4e1b8ca744..c84774fd35f 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -2046,12 +2046,10 @@ static struct snd_compr_ops marley_compr_ops = { .open = marley_compr_open, .free = wm_adsp_compr_free, .set_params = wm_adsp_compr_set_params, - .get_params = wm_adsp_compr_get_params, .trigger = marley_compr_trigger, .pointer = wm_adsp_compr_pointer, .copy = wm_adsp_compr_copy, .get_caps = wm_adsp_compr_get_caps, - .get_codec_caps = wm_adsp_compr_get_codec_caps, }; static struct snd_soc_platform_driver marley_compr_platform = { diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index c1f6b9a2839..a823f591db9 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -2919,12 +2919,10 @@ static struct snd_compr_ops moon_compr_ops = { .open = moon_compr_open, .free = wm_adsp_compr_free, .set_params = wm_adsp_compr_set_params, - .get_params = wm_adsp_compr_get_params, .trigger = moon_compr_trigger, .pointer = wm_adsp_compr_pointer, .copy = wm_adsp_compr_copy, .get_caps = wm_adsp_compr_get_caps, - .get_codec_caps = wm_adsp_compr_get_codec_caps, }; static struct snd_soc_platform_driver moon_compr_platform = { diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index dd332a83c2a..d9533cd5d1d 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3639,13 +3639,6 @@ int wm_adsp_compr_set_params(struct snd_compr_stream *stream, } EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params); -int wm_adsp_compr_get_params(struct snd_compr_stream *stream, - struct snd_codec *params) -{ - return 0; -} -EXPORT_SYMBOL_GPL(wm_adsp_compr_get_params); - int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd) { struct wm_adsp_compr *compr = stream->runtime->private_data; @@ -3772,13 +3765,6 @@ int wm_adsp_compr_get_caps(struct snd_compr_stream *stream, } EXPORT_SYMBOL_GPL(wm_adsp_compr_get_caps); -int wm_adsp_compr_get_codec_caps(struct snd_compr_stream *stream, - struct snd_compr_codec_caps *codec) -{ - return 0; -} -EXPORT_SYMBOL_GPL(wm_adsp_compr_get_codec_caps); - void wm_adsp_compr_init(struct wm_adsp *dsp, struct wm_adsp_compr *compr) { compr->dsp = dsp; diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 48351c61c1b..9c44e22c579 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -214,8 +214,6 @@ extern int wm_adsp_compr_open(struct wm_adsp_compr *compr, extern int wm_adsp_compr_free(struct snd_compr_stream *stream); extern int wm_adsp_compr_set_params(struct snd_compr_stream *stream, struct snd_compr_params *params); -extern int wm_adsp_compr_get_params(struct snd_compr_stream *stream, - struct snd_codec *params); extern int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd); extern int wm_adsp_compr_pointer(struct snd_compr_stream *stream, struct snd_compr_tstamp *tstamp); @@ -223,8 +221,6 @@ extern int wm_adsp_compr_copy(struct snd_compr_stream *stream, char __user *buf, size_t count); extern int wm_adsp_compr_get_caps(struct snd_compr_stream *stream, struct snd_compr_caps *caps); -extern int wm_adsp_compr_get_codec_caps(struct snd_compr_stream *stream, - struct snd_compr_codec_caps *codec); extern void wm_adsp_compr_init(struct wm_adsp *dsp, struct wm_adsp_compr *compr); extern void wm_adsp_compr_destroy(struct wm_adsp_compr *compr); From f70e97459fae1a53c1fee2dcbc7eef8a4f7fd8eb Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 2 Dec 2015 16:07:22 +0000 Subject: [PATCH 1052/1167] ASoC: wm_adsp: Rearrange compress functions to match upstream This patch reorders the compress functions to match the order of the upstream implementation. Change-Id: I2576deabbe8e41615c80957ce96612954a3cd90e Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 674 ++++++++++++++++++------------------- sound/soc/codecs/wm_adsp.h | 4 +- 2 files changed, 339 insertions(+), 339 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index d9533cd5d1d..1888fc2d3f1 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3014,6 +3014,57 @@ static bool wm_adsp_compress_supported(const struct wm_adsp *dsp, return false; } +int wm_adsp_compr_open(struct wm_adsp_compr *compr, + struct snd_compr_stream *stream) +{ + int ret = 0; + + mutex_lock(&compr->lock); + + if (compr->stream) { + ret = -EBUSY; + goto out; + } + + if (!wm_adsp_compress_supported(compr->dsp, stream)) { + adsp_err(compr->dsp, + "Firmware does not support compressed stream\n"); + ret = -EINVAL; + goto out; + } + + compr->stream = stream; + stream->runtime->private_data = compr; +out: + mutex_unlock(&compr->lock); + + return ret; +} +EXPORT_SYMBOL_GPL(wm_adsp_compr_open); + +int wm_adsp_compr_free(struct snd_compr_stream *stream) +{ + struct wm_adsp_compr *compr = stream->runtime->private_data; + + if (!compr) + return -EINVAL; + + mutex_lock(&compr->lock); + + compr->allocated = false; + compr->copied_total = 0; + compr->stream = NULL; + stream->runtime->private_data = NULL; + + kfree(compr->capt_buf); + compr->capt_buf = NULL; + + mutex_unlock(&compr->lock); + + return 0; +} +EXPORT_SYMBOL_GPL(wm_adsp_compr_free); + static bool wm_adsp_format_supported(const struct wm_adsp *dsp, const struct snd_compr_stream *stream, const struct snd_compr_params *params) @@ -3047,6 +3098,100 @@ static bool wm_adsp_format_supported(const struct wm_adsp *dsp, return false; } +static int wm_adsp_streambuf_alloc(struct wm_adsp_compr *compr, + const struct snd_compr_params *params) +{ + unsigned int size; + + if (params->buffer.fragment_size == 0) + return -EINVAL; + + compr->max_read_words = + params->buffer.fragment_size / WM_ADSP_DATA_WORD_SIZE; + + if (!compr->capt_buf) { + size = compr->max_read_words * sizeof(*compr->capt_buf); + compr->capt_buf = kmalloc(size, GFP_DMA | GFP_KERNEL); + + if (!compr->capt_buf) + return -ENOMEM; + } + + compr->irq_watermark = DIV_ROUND_UP(params->buffer.fragment_size, + WM_ADSP_DATA_WORD_SIZE); + + return 0; +} + +int wm_adsp_compr_set_params(struct snd_compr_stream *stream, + struct snd_compr_params *params) +{ + struct wm_adsp_compr *compr = stream->runtime->private_data; + int ret = 0; + + if ((params->buffer.fragment_size % WM_ADSP_DATA_WORD_SIZE) != 0) { + adsp_warn(compr->dsp, + "Fragment size %u not a multiple of DSP word size %u\n", + params->buffer.fragment_size, WM_ADSP_DATA_WORD_SIZE); + return -EINVAL; + } + + mutex_lock(&compr->lock); + + if (!wm_adsp_format_supported(compr->dsp, stream, params)) { + adsp_err(compr->dsp, + "Invalid params: id:%u, chan:%u,%u, rate:%u format:%u\n", + params->codec.id, params->codec.ch_in, + params->codec.ch_out, params->codec.sample_rate, + params->codec.format); + ret = -EINVAL; + goto out; + } + + ret = wm_adsp_streambuf_alloc(compr, params); + if (ret < 0) + goto out; + + compr->allocated = true; + +out: + mutex_unlock(&compr->lock); + + return ret; +} +EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params); + +int wm_adsp_compr_get_caps(struct snd_compr_stream *stream, + struct snd_compr_caps *caps) +{ + struct wm_adsp_compr *compr = stream->runtime->private_data; + struct wm_adsp *dsp = compr->dsp; + int i; + + mutex_lock(&compr->lock); + + memset(caps, 0, sizeof(*caps)); + + caps->direction = stream->direction; + caps->min_fragment_size = WM_ADSP_MIN_FRAGMENT_SIZE; + caps->max_fragment_size = WM_ADSP_MAX_FRAGMENT_SIZE; + caps->min_fragments = WM_ADSP_MIN_FRAGMENTS; + caps->max_fragments = WM_ADSP_MAX_FRAGMENTS; + + if (dsp->firmwares[dsp->fw].caps) { + for (i = 0; i < dsp->firmwares[dsp->fw].num_caps; i++) + caps->codecs[i] = dsp->firmwares[dsp->fw].caps[i].id; + + caps->num_codecs = i; + caps->direction = dsp->firmwares[dsp->fw].compr_direction; + } + + mutex_unlock(&compr->lock); + + return 0; +} +EXPORT_SYMBOL_GPL(wm_adsp_compr_get_caps); + static int wm_adsp_read_data_block(struct wm_adsp *dsp, int mem_type, unsigned int mem_addr, unsigned int num_words, @@ -3241,6 +3386,60 @@ static inline int wm_adsp_buffer_size(struct wm_adsp_compr *compr) return dsp->host_buf_info.host_regions[last_region].cumulative_size; } +static int wm_adsp_stream_start(struct wm_adsp_compr *compr) +{ + struct wm_adsp *dsp = compr->dsp; + int ret; + + mutex_lock(&dsp->host_buf_info.lock); + + if (!dsp->host_buf_info.host_buf_ptr) { + adsp_warn(dsp, "No host buffer info\n"); + ret = -EIO; + goto out_unlock; + } + + compr->buf_read_index = -1; + compr->buf_avail = 0; + + ret = wm_adsp_host_buffer_write(dsp, + HOST_BUFFER_FIELD(high_water_mark), + compr->irq_watermark); + if (ret < 0) + goto out_unlock; + + adsp_dbg(dsp, "Set watermark to %u\n", compr->irq_watermark); + +out_unlock: + mutex_unlock(&dsp->host_buf_info.lock); + + return ret; +} + +int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd) +{ + struct wm_adsp_compr *compr = stream->runtime->private_data; + int ret = 0; + + mutex_lock(&compr->lock); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + ret = wm_adsp_stream_start(compr); + break; + case SNDRV_PCM_TRIGGER_STOP: + break; + default: + ret = -EINVAL; + break; + } + + mutex_unlock(&compr->lock); + + return ret; +} +EXPORT_SYMBOL_GPL(wm_adsp_compr_trigger); + static int wm_adsp_buffer_update_avail(struct wm_adsp_compr *compr) { struct wm_adsp *dsp = compr->dsp; @@ -3315,207 +3514,39 @@ static int wm_adsp_stream_has_error_locked(struct wm_adsp *dsp) return 0; } -static int wm_adsp_buffer_capture_block(struct wm_adsp_compr *compr, int target) +int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) { struct wm_adsp *dsp = compr->dsp; - const struct wm_adsp_buffer_region *host_regions = - dsp->host_buf_info.host_regions; - int num_regions = dsp->firmwares[dsp->fw].caps->num_host_regions; - u8 *pack_in = (u8 *)compr->capt_buf; - u8 *pack_out = (u8 *)compr->capt_buf; - unsigned int adsp_addr; - int mem_type, nwords; - int i, j, ret; + int ret; - lockdep_assert_held(&dsp->host_buf_info.lock); - BUG_ON(!dsp->host_buf_info.host_regions); + mutex_lock(&dsp->host_buf_info.lock); - /* Calculate read parameters */ - for (i = 0; i < num_regions; ++i) - if (compr->buf_read_index < host_regions[i].cumulative_size) - break; + if (!dsp->host_buf_info.host_buf_ptr) { + adsp_warn(dsp, "No host buffer info\n"); + ret = -EIO; + goto out_buf_unlock; + } - if (i == num_regions) - return -EINVAL; + ret = wm_adsp_stream_has_error_locked(dsp); + if (ret) + goto out_buf_unlock; - mem_type = host_regions[i].mem_type; - adsp_addr = host_regions[i].base_addr + - (compr->buf_read_index - host_regions[i].offset); + ret = wm_adsp_host_buffer_read(dsp, HOST_BUFFER_FIELD(irq_count), + &dsp->host_buf_info.irq_ack); + if (ret < 0) { + adsp_err(dsp, "Failed to get irq_count: %d\n", ret); + goto out_buf_unlock; + } - nwords = host_regions[i].cumulative_size - compr->buf_read_index; + if (trigger) { + /* irq_count = 2 only on the initial trigger */ + if (dsp->host_buf_info.irq_ack == 2) + *trigger = true; + else + *trigger = false; + } - if (nwords > target) - nwords = target; - if (nwords > compr->buf_avail) - nwords = compr->buf_avail; - if (nwords > compr->max_read_words) - nwords = compr->max_read_words; - if (!nwords) - return 0; - - /* Read data from DSP */ - ret = wm_adsp_read_data_block(dsp, mem_type, adsp_addr, - nwords, compr->capt_buf); - if (ret < 0) - return ret; - - /* Remove the padding bytes from the data read from the DSP */ - for (i = 0; i < nwords; i++) { - for (j = 0; j < WM_ADSP_DATA_WORD_SIZE; j++) - *pack_out++ = *pack_in++; - - pack_in += sizeof(*(compr->capt_buf)) - WM_ADSP_DATA_WORD_SIZE; - } - - /* update read index to account for words read */ - compr->buf_read_index += nwords; - if (compr->buf_read_index == wm_adsp_buffer_size(compr)) - compr->buf_read_index = 0; - - ret = wm_adsp_host_buffer_write(dsp, HOST_BUFFER_FIELD(next_read_index), - compr->buf_read_index); - if (ret < 0) - return ret; - - /* update avail to account for words read */ - compr->buf_avail -= nwords; - - return nwords; -} - -static int wm_adsp_compr_read(struct wm_adsp_compr *compr, - char __user *buf, size_t count) -{ - struct wm_adsp *dsp = compr->dsp; - int ntotal = 0; - int nwords, nbytes; - int ret; - - lockdep_assert_held(&dsp->host_buf_info.lock); - BUG_ON(!dsp->host_buf_info.host_regions); - - adsp_dbg(dsp, "Requested read of %d bytes\n", count); - - ret = wm_adsp_stream_has_error_locked(dsp); - if (ret) - return ret; - - count /= WM_ADSP_DATA_WORD_SIZE; - - do { - nwords = wm_adsp_buffer_capture_block(compr, count); - if (nwords < 0) { - adsp_err(dsp, "Failed to capture block: %d\n", nwords); - return nwords; - } - - nbytes = nwords * WM_ADSP_DATA_WORD_SIZE; - - adsp_dbg(dsp, "Read %d bytes\n", nbytes); - - if (copy_to_user(buf + ntotal, compr->capt_buf, nbytes)) { - adsp_err(dsp, "Failed to copy data to user: %d, %d\n", - ntotal, nbytes); - return -EFAULT; - } - - count -= nwords; - ntotal += nbytes; - } while (nwords > 0 && count > 0); - - compr->copied_total += ntotal; - - return ntotal; -} - -static int wm_adsp_streambuf_alloc(struct wm_adsp_compr *compr, - const struct snd_compr_params *params) -{ - unsigned int size; - - if (params->buffer.fragment_size == 0) - return -EINVAL; - - compr->max_read_words = - params->buffer.fragment_size / WM_ADSP_DATA_WORD_SIZE; - - if (!compr->capt_buf) { - size = compr->max_read_words * sizeof(*compr->capt_buf); - compr->capt_buf = kmalloc(size, GFP_DMA | GFP_KERNEL); - - if (!compr->capt_buf) - return -ENOMEM; - } - - compr->irq_watermark = DIV_ROUND_UP(params->buffer.fragment_size, - WM_ADSP_DATA_WORD_SIZE); - - return 0; -} - -static int wm_adsp_stream_start(struct wm_adsp_compr *compr) -{ - struct wm_adsp *dsp = compr->dsp; - int ret; - - mutex_lock(&dsp->host_buf_info.lock); - - if (!dsp->host_buf_info.host_buf_ptr) { - adsp_warn(dsp, "No host buffer info\n"); - ret = -EIO; - goto out_unlock; - } - - compr->buf_read_index = -1; - compr->buf_avail = 0; - - ret = wm_adsp_host_buffer_write(dsp, - HOST_BUFFER_FIELD(high_water_mark), - compr->irq_watermark); - if (ret < 0) - goto out_unlock; - - adsp_dbg(dsp, "Set watermark to %u\n", compr->irq_watermark); - -out_unlock: - mutex_unlock(&dsp->host_buf_info.lock); - - return ret; -} - -int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) -{ - struct wm_adsp *dsp = compr->dsp; - int ret; - - mutex_lock(&dsp->host_buf_info.lock); - - if (!dsp->host_buf_info.host_buf_ptr) { - adsp_warn(dsp, "No host buffer info\n"); - ret = -EIO; - goto out_buf_unlock; - } - - ret = wm_adsp_stream_has_error_locked(dsp); - if (ret) - goto out_buf_unlock; - - ret = wm_adsp_host_buffer_read(dsp, HOST_BUFFER_FIELD(irq_count), - &dsp->host_buf_info.irq_ack); - if (ret < 0) { - adsp_err(dsp, "Failed to get irq_count: %d\n", ret); - goto out_buf_unlock; - } - - if (trigger) { - /* irq_count = 2 only on the initial trigger */ - if (dsp->host_buf_info.irq_ack == 2) - *trigger = true; - else - *trigger = false; - } - - mutex_lock(&compr->lock); + mutex_lock(&compr->lock); /* Fetch read_index and update count of available data */ if (compr->allocated) { @@ -3550,119 +3581,6 @@ static int wm_adsp_buffer_ack_irq(struct wm_adsp *dsp) dsp->host_buf_info.irq_ack); } -int wm_adsp_compr_open(struct wm_adsp_compr *compr, - struct snd_compr_stream *stream) -{ - int ret = 0; - - mutex_lock(&compr->lock); - - if (compr->stream) { - ret = -EBUSY; - goto out; - } - - if (!wm_adsp_compress_supported(compr->dsp, stream)) { - adsp_err(compr->dsp, - "Firmware does not support compressed stream\n"); - ret = -EINVAL; - goto out; - } - - compr->stream = stream; - stream->runtime->private_data = compr; -out: - mutex_unlock(&compr->lock); - - return ret; -} -EXPORT_SYMBOL_GPL(wm_adsp_compr_open); - -int wm_adsp_compr_free(struct snd_compr_stream *stream) -{ - struct wm_adsp_compr *compr = stream->runtime->private_data; - - if (!compr) - return -EINVAL; - - mutex_lock(&compr->lock); - - compr->allocated = false; - compr->copied_total = 0; - compr->stream = NULL; - stream->runtime->private_data = NULL; - - kfree(compr->capt_buf); - compr->capt_buf = NULL; - - mutex_unlock(&compr->lock); - - return 0; -} -EXPORT_SYMBOL_GPL(wm_adsp_compr_free); - -int wm_adsp_compr_set_params(struct snd_compr_stream *stream, - struct snd_compr_params *params) -{ - struct wm_adsp_compr *compr = stream->runtime->private_data; - int ret = 0; - - if ((params->buffer.fragment_size % WM_ADSP_DATA_WORD_SIZE) != 0) { - adsp_warn(compr->dsp, - "Fragment size %u not a multiple of DSP word size %u\n", - params->buffer.fragment_size, WM_ADSP_DATA_WORD_SIZE); - return -EINVAL; - } - - mutex_lock(&compr->lock); - - if (!wm_adsp_format_supported(compr->dsp, stream, params)) { - adsp_err(compr->dsp, - "Invalid params: id:%u, chan:%u,%u, rate:%u format:%u\n", - params->codec.id, params->codec.ch_in, - params->codec.ch_out, params->codec.sample_rate, - params->codec.format); - ret = -EINVAL; - goto out; - } - - ret = wm_adsp_streambuf_alloc(compr, params); - if (ret < 0) - goto out; - - compr->allocated = true; - -out: - mutex_unlock(&compr->lock); - - return ret; -} -EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params); - -int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd) -{ - struct wm_adsp_compr *compr = stream->runtime->private_data; - int ret = 0; - - mutex_lock(&compr->lock); - - switch (cmd) { - case SNDRV_PCM_TRIGGER_START: - ret = wm_adsp_stream_start(compr); - break; - case SNDRV_PCM_TRIGGER_STOP: - break; - default: - ret = -EINVAL; - break; - } - - mutex_unlock(&compr->lock); - - return ret; -} -EXPORT_SYMBOL_GPL(wm_adsp_compr_trigger); - int wm_adsp_compr_pointer(struct snd_compr_stream *stream, struct snd_compr_tstamp *tstamp) { @@ -3715,55 +3633,137 @@ int wm_adsp_compr_pointer(struct snd_compr_stream *stream, } EXPORT_SYMBOL_GPL(wm_adsp_compr_pointer); -int wm_adsp_compr_copy(struct snd_compr_stream *stream, - char __user *buf, size_t count) +static int wm_adsp_buffer_capture_block(struct wm_adsp_compr *compr, int target) { - struct wm_adsp_compr *compr = stream->runtime->private_data; - int ret; + struct wm_adsp *dsp = compr->dsp; + const struct wm_adsp_buffer_region *host_regions = + dsp->host_buf_info.host_regions; + int num_regions = dsp->firmwares[dsp->fw].caps->num_host_regions; + u8 *pack_in = (u8 *)compr->capt_buf; + u8 *pack_out = (u8 *)compr->capt_buf; + unsigned int adsp_addr; + int mem_type, nwords; + int i, j, ret; - mutex_lock(&compr->lock); + lockdep_assert_held(&dsp->host_buf_info.lock); + BUG_ON(!dsp->host_buf_info.host_regions); - if (stream->direction == SND_COMPRESS_CAPTURE) - ret = wm_adsp_compr_read(compr, buf, count); - else - ret = -ENOTSUPP; + /* Calculate read parameters */ + for (i = 0; i < num_regions; ++i) + if (compr->buf_read_index < host_regions[i].cumulative_size) + break; - mutex_unlock(&compr->lock); + if (i == num_regions) + return -EINVAL; - return ret; + mem_type = host_regions[i].mem_type; + adsp_addr = host_regions[i].base_addr + + (compr->buf_read_index - host_regions[i].offset); + + nwords = host_regions[i].cumulative_size - compr->buf_read_index; + + if (nwords > target) + nwords = target; + if (nwords > compr->buf_avail) + nwords = compr->buf_avail; + if (nwords > compr->max_read_words) + nwords = compr->max_read_words; + if (!nwords) + return 0; + + /* Read data from DSP */ + ret = wm_adsp_read_data_block(dsp, mem_type, adsp_addr, + nwords, compr->capt_buf); + if (ret < 0) + return ret; + + /* Remove the padding bytes from the data read from the DSP */ + for (i = 0; i < nwords; i++) { + for (j = 0; j < WM_ADSP_DATA_WORD_SIZE; j++) + *pack_out++ = *pack_in++; + + pack_in += sizeof(*(compr->capt_buf)) - WM_ADSP_DATA_WORD_SIZE; + } + + /* update read index to account for words read */ + compr->buf_read_index += nwords; + if (compr->buf_read_index == wm_adsp_buffer_size(compr)) + compr->buf_read_index = 0; + + ret = wm_adsp_host_buffer_write(dsp, HOST_BUFFER_FIELD(next_read_index), + compr->buf_read_index); + if (ret < 0) + return ret; + + /* update avail to account for words read */ + compr->buf_avail -= nwords; + + return nwords; } -EXPORT_SYMBOL_GPL(wm_adsp_compr_copy); -int wm_adsp_compr_get_caps(struct snd_compr_stream *stream, - struct snd_compr_caps *caps) +static int wm_adsp_compr_read(struct wm_adsp_compr *compr, + char __user *buf, size_t count) { - struct wm_adsp_compr *compr = stream->runtime->private_data; struct wm_adsp *dsp = compr->dsp; - int i; + int ntotal = 0; + int nwords, nbytes; + int ret; - mutex_lock(&compr->lock); + lockdep_assert_held(&dsp->host_buf_info.lock); + BUG_ON(!dsp->host_buf_info.host_regions); - memset(caps, 0, sizeof(*caps)); + adsp_dbg(dsp, "Requested read of %d bytes\n", count); - caps->direction = stream->direction; - caps->min_fragment_size = WM_ADSP_MIN_FRAGMENT_SIZE; - caps->max_fragment_size = WM_ADSP_MAX_FRAGMENT_SIZE; - caps->min_fragments = WM_ADSP_MIN_FRAGMENTS; - caps->max_fragments = WM_ADSP_MAX_FRAGMENTS; + ret = wm_adsp_stream_has_error_locked(dsp); + if (ret) + return ret; - if (dsp->firmwares[dsp->fw].caps) { - for (i = 0; i < dsp->firmwares[dsp->fw].num_caps; i++) - caps->codecs[i] = dsp->firmwares[dsp->fw].caps[i].id; + count /= WM_ADSP_DATA_WORD_SIZE; - caps->num_codecs = i; - caps->direction = dsp->firmwares[dsp->fw].compr_direction; - } + do { + nwords = wm_adsp_buffer_capture_block(compr, count); + if (nwords < 0) { + adsp_err(dsp, "Failed to capture block: %d\n", nwords); + return nwords; + } + + nbytes = nwords * WM_ADSP_DATA_WORD_SIZE; + + adsp_dbg(dsp, "Read %d bytes\n", nbytes); + + if (copy_to_user(buf + ntotal, compr->capt_buf, nbytes)) { + adsp_err(dsp, "Failed to copy data to user: %d, %d\n", + ntotal, nbytes); + return -EFAULT; + } + + count -= nwords; + ntotal += nbytes; + } while (nwords > 0 && count > 0); + + compr->copied_total += ntotal; + + return ntotal; +} + +int wm_adsp_compr_copy(struct snd_compr_stream *stream, + char __user *buf, size_t count) +{ + struct wm_adsp_compr *compr = stream->runtime->private_data; + int ret; + + mutex_lock(&compr->lock); + + if (stream->direction == SND_COMPRESS_CAPTURE) + ret = wm_adsp_compr_read(compr, buf, count); + else + ret = -ENOTSUPP; mutex_unlock(&compr->lock); - return 0; + return ret; } -EXPORT_SYMBOL_GPL(wm_adsp_compr_get_caps); +EXPORT_SYMBOL_GPL(wm_adsp_compr_copy); void wm_adsp_compr_init(struct wm_adsp *dsp, struct wm_adsp_compr *compr) { diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 9c44e22c579..c480acf6049 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -214,13 +214,13 @@ extern int wm_adsp_compr_open(struct wm_adsp_compr *compr, extern int wm_adsp_compr_free(struct snd_compr_stream *stream); extern int wm_adsp_compr_set_params(struct snd_compr_stream *stream, struct snd_compr_params *params); +extern int wm_adsp_compr_get_caps(struct snd_compr_stream *stream, + struct snd_compr_caps *caps); extern int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd); extern int wm_adsp_compr_pointer(struct snd_compr_stream *stream, struct snd_compr_tstamp *tstamp); extern int wm_adsp_compr_copy(struct snd_compr_stream *stream, char __user *buf, size_t count); -extern int wm_adsp_compr_get_caps(struct snd_compr_stream *stream, - struct snd_compr_caps *caps); extern void wm_adsp_compr_init(struct wm_adsp *dsp, struct wm_adsp_compr *compr); extern void wm_adsp_compr_destroy(struct wm_adsp_compr *compr); From e2934127345289043ab153644bb751789f8a7a11 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 2 Dec 2015 16:44:28 +0000 Subject: [PATCH 1053/1167] ASoC: wm_adsp: Rework checking of compressed stream parameters This patch extends the checking of parameters passed to wm_adsp_compr_set_params() Change-Id: I01884b9f6cc2cdec3eda191b7a8cbb1382be135e Signed-off-by: Charles Keepax Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 60 ++++++++++++++++++++------------------ 1 file changed, 32 insertions(+), 28 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 1888fc2d3f1..22fd8c40055 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3065,37 +3065,54 @@ int wm_adsp_compr_free(struct snd_compr_stream *stream) } EXPORT_SYMBOL_GPL(wm_adsp_compr_free); -static bool wm_adsp_format_supported(const struct wm_adsp *dsp, - const struct snd_compr_stream *stream, - const struct snd_compr_params *params) +static int wm_adsp_compr_check_params(struct snd_compr_stream *stream, + struct snd_compr_params *params) { + struct wm_adsp_compr *compr = stream->runtime->private_data; + struct wm_adsp *dsp = compr->dsp; const struct wm_adsp_fw_caps *caps; + const struct snd_codec_desc *desc; int i, j; + if (params->buffer.fragment_size < WM_ADSP_MIN_FRAGMENT_SIZE || + params->buffer.fragment_size > WM_ADSP_MAX_FRAGMENT_SIZE || + params->buffer.fragments < WM_ADSP_MIN_FRAGMENTS || + params->buffer.fragments > WM_ADSP_MAX_FRAGMENTS || + params->buffer.fragment_size % WM_ADSP_DATA_WORD_SIZE) { + adsp_err(dsp, "Invalid buffer fragsize=%d fragments=%d\n", + params->buffer.fragment_size, + params->buffer.fragments); + return -EINVAL; + } + for (i = 0; i < dsp->firmwares[dsp->fw].num_caps; i++) { caps = &dsp->firmwares[dsp->fw].caps[i]; + desc = &caps->desc; if (caps->id != params->codec.id) continue; if (stream->direction == SND_COMPRESS_PLAYBACK) { - if (caps->desc.max_ch < params->codec.ch_out) + if (desc->max_ch < params->codec.ch_out) continue; } else { - if (caps->desc.max_ch < params->codec.ch_in) + if (desc->max_ch < params->codec.ch_in) continue; } - if (!(caps->desc.formats & (1 << params->codec.format))) + if (!(desc->formats & (1 << params->codec.format))) continue; - for (j = 0; j < caps->desc.num_sample_rates; ++j) - if (caps->desc.sample_rates[j] == - params->codec.sample_rate) - return true; + for (j = 0; j < desc->num_sample_rates; ++j) + if (desc->sample_rates[j] == params->codec.sample_rate) + return 0; } - return false; + adsp_err(dsp, "Invalid params id=%u ch=%u,%u rate=%u fmt=%u\n", + params->codec.id, params->codec.ch_in, params->codec.ch_out, + params->codec.sample_rate, params->codec.format); + + return -EINVAL; } static int wm_adsp_streambuf_alloc(struct wm_adsp_compr *compr, @@ -3127,27 +3144,14 @@ int wm_adsp_compr_set_params(struct snd_compr_stream *stream, struct snd_compr_params *params) { struct wm_adsp_compr *compr = stream->runtime->private_data; - int ret = 0; + int ret; - if ((params->buffer.fragment_size % WM_ADSP_DATA_WORD_SIZE) != 0) { - adsp_warn(compr->dsp, - "Fragment size %u not a multiple of DSP word size %u\n", - params->buffer.fragment_size, WM_ADSP_DATA_WORD_SIZE); - return -EINVAL; - } + ret = wm_adsp_compr_check_params(stream, params); + if (ret) + return ret; mutex_lock(&compr->lock); - if (!wm_adsp_format_supported(compr->dsp, stream, params)) { - adsp_err(compr->dsp, - "Invalid params: id:%u, chan:%u,%u, rate:%u format:%u\n", - params->codec.id, params->codec.ch_in, - params->codec.ch_out, params->codec.sample_rate, - params->codec.format); - ret = -EINVAL; - goto out; - } - ret = wm_adsp_streambuf_alloc(compr, params); if (ret < 0) goto out; From 2a31662fed90cd3ee8c1731fe572fe73e72634b0 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 2 Dec 2015 17:06:08 +0000 Subject: [PATCH 1054/1167] ASoC: wm_adsp: Rename wm_adsp_host_buf_info to wm_adsp_compr_buf This matches the upstream naming. Change-Id: I070b912c323b5573eeccb54a844cd28587c14d8b Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 98 +++++++++++++++++++------------------- sound/soc/codecs/wm_adsp.h | 4 +- 2 files changed, 51 insertions(+), 51 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 22fd8c40055..83bbc5461d8 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2967,7 +2967,7 @@ int wm_adsp2_init(struct wm_adsp *dsp, struct mutex *fw_lock) INIT_WORK(&dsp->boot_work, wm_adsp2_boot_work); mutex_init(&dsp->ctl_lock); mutex_init(&dsp->rate_lock); - mutex_init(&dsp->host_buf_info.lock); + mutex_init(&dsp->compr_buf.lock); dsp->fw_lock = fw_lock; @@ -3248,10 +3248,10 @@ static int wm_adsp_write_data_word(struct wm_adsp *dsp, int mem_type, static inline int wm_adsp_host_buffer_read(struct wm_adsp *dsp, unsigned int field_offset, u32 *data) { - lockdep_assert_held(&dsp->host_buf_info.lock); + lockdep_assert_held(&dsp->compr_buf.lock); return wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, - dsp->host_buf_info.host_buf_ptr + + dsp->compr_buf.host_buf_ptr + field_offset, data); } @@ -3259,10 +3259,10 @@ static inline int wm_adsp_host_buffer_read(struct wm_adsp *dsp, static inline int wm_adsp_host_buffer_write(struct wm_adsp *dsp, unsigned int field_offset, u32 data) { - lockdep_assert_held(&dsp->host_buf_info.lock); + lockdep_assert_held(&dsp->compr_buf.lock); return wm_adsp_write_data_word(dsp, WMFW_ADSP2_XM, - dsp->host_buf_info.host_buf_ptr + + dsp->compr_buf.host_buf_ptr + field_offset, data); } @@ -3275,20 +3275,20 @@ static int wm_adsp_populate_buffer_regions(struct wm_adsp *dsp) dsp->firmwares[dsp->fw].caps->host_region_defs; struct wm_adsp_buffer_region *region; - lockdep_assert_held(&dsp->host_buf_info.lock); + lockdep_assert_held(&dsp->compr_buf.lock); - BUG_ON(dsp->host_buf_info.host_regions != NULL); + BUG_ON(dsp->compr_buf.host_regions != NULL); - dsp->host_buf_info.host_regions = + dsp->compr_buf.host_regions = kcalloc(dsp->firmwares[dsp->fw].caps->num_host_regions, - sizeof(*dsp->host_buf_info.host_regions), + sizeof(*dsp->compr_buf.host_regions), GFP_KERNEL); - if (!dsp->host_buf_info.host_regions) + if (!dsp->compr_buf.host_regions) return -ENOMEM; for (i = 0; i < dsp->firmwares[dsp->fw].caps->num_host_regions; ++i) { - region = &dsp->host_buf_info.host_regions[i]; + region = &dsp->compr_buf.host_regions[i]; region->offset = offset; region->mem_type = host_region_defs[i].mem_type; @@ -3336,33 +3336,33 @@ static int wm_adsp_init_host_buf_info(struct wm_adsp *dsp) if (magic != WM_ADSP_ALG_XM_STRUCT_MAGIC) return -EINVAL; - mutex_lock(&dsp->host_buf_info.lock); + mutex_lock(&dsp->compr_buf.lock); - dsp->host_buf_info.error = 0; - dsp->host_buf_info.irq_ack = 0xFFFFFFFF; + dsp->compr_buf.error = 0; + dsp->compr_buf.irq_ack = 0xFFFFFFFF; for (i = 0; i < 5; ++i) { ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, xm_base + WM_ADSP_ALG_XM_PTR + ALG_XM_FIELD(host_buf_ptr), - &dsp->host_buf_info.host_buf_ptr); + &dsp->compr_buf.host_buf_ptr); if (ret < 0) goto out; - if (dsp->host_buf_info.host_buf_ptr) + if (dsp->compr_buf.host_buf_ptr) break; msleep(1); } - if (!dsp->host_buf_info.host_buf_ptr) { + if (!dsp->compr_buf.host_buf_ptr) { ret = -EIO; goto out; } ret = wm_adsp_populate_buffer_regions(dsp); out: - mutex_unlock(&dsp->host_buf_info.lock); + mutex_unlock(&dsp->compr_buf.lock); return ret; } @@ -3371,13 +3371,13 @@ static void wm_adsp_free_host_buf_info(struct wm_adsp *dsp) { struct wm_adsp_buffer_region *host_regions; - mutex_lock(&dsp->host_buf_info.lock); + mutex_lock(&dsp->compr_buf.lock); - host_regions = dsp->host_buf_info.host_regions; - dsp->host_buf_info.host_regions = NULL; - dsp->host_buf_info.host_buf_ptr = 0; + host_regions = dsp->compr_buf.host_regions; + dsp->compr_buf.host_regions = NULL; + dsp->compr_buf.host_buf_ptr = 0; - mutex_unlock(&dsp->host_buf_info.lock); + mutex_unlock(&dsp->compr_buf.lock); kfree(host_regions); } @@ -3387,7 +3387,7 @@ static inline int wm_adsp_buffer_size(struct wm_adsp_compr *compr) const struct wm_adsp *dsp = compr->dsp; int last_region = dsp->firmwares[dsp->fw].caps->num_host_regions - 1; - return dsp->host_buf_info.host_regions[last_region].cumulative_size; + return dsp->compr_buf.host_regions[last_region].cumulative_size; } static int wm_adsp_stream_start(struct wm_adsp_compr *compr) @@ -3395,9 +3395,9 @@ static int wm_adsp_stream_start(struct wm_adsp_compr *compr) struct wm_adsp *dsp = compr->dsp; int ret; - mutex_lock(&dsp->host_buf_info.lock); + mutex_lock(&dsp->compr_buf.lock); - if (!dsp->host_buf_info.host_buf_ptr) { + if (!dsp->compr_buf.host_buf_ptr) { adsp_warn(dsp, "No host buffer info\n"); ret = -EIO; goto out_unlock; @@ -3415,7 +3415,7 @@ static int wm_adsp_stream_start(struct wm_adsp_compr *compr) adsp_dbg(dsp, "Set watermark to %u\n", compr->irq_watermark); out_unlock: - mutex_unlock(&dsp->host_buf_info.lock); + mutex_unlock(&dsp->compr_buf.lock); return ret; } @@ -3451,7 +3451,7 @@ static int wm_adsp_buffer_update_avail(struct wm_adsp_compr *compr) int write_index, read_index, avail; int ret; - lockdep_assert_held(&dsp->host_buf_info.lock); + lockdep_assert_held(&dsp->compr_buf.lock); /* Only sync the read index if we haven't already read a valid index */ if (compr->buf_read_index < 0) { @@ -3495,23 +3495,23 @@ static int wm_adsp_stream_has_error_locked(struct wm_adsp *dsp) { int ret; - lockdep_assert_held(&dsp->host_buf_info.lock); + lockdep_assert_held(&dsp->compr_buf.lock); - if (dsp->host_buf_info.error != 0) + if (dsp->compr_buf.error != 0) return -EIO; ret = wm_adsp_host_buffer_read(dsp, HOST_BUFFER_FIELD(error), - &dsp->host_buf_info.error); + &dsp->compr_buf.error); if (ret < 0) { adsp_err(dsp, "Failed to read error field: %d\n", ret); return ret; } - if (dsp->host_buf_info.error != 0) { + if (dsp->compr_buf.error != 0) { /* log the first time we see the error */ adsp_warn(dsp, "DSP stream error occurred: %d\n", - dsp->host_buf_info.error); + dsp->compr_buf.error); return -EIO; } @@ -3523,9 +3523,9 @@ int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) struct wm_adsp *dsp = compr->dsp; int ret; - mutex_lock(&dsp->host_buf_info.lock); + mutex_lock(&dsp->compr_buf.lock); - if (!dsp->host_buf_info.host_buf_ptr) { + if (!dsp->compr_buf.host_buf_ptr) { adsp_warn(dsp, "No host buffer info\n"); ret = -EIO; goto out_buf_unlock; @@ -3536,7 +3536,7 @@ int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) goto out_buf_unlock; ret = wm_adsp_host_buffer_read(dsp, HOST_BUFFER_FIELD(irq_count), - &dsp->host_buf_info.irq_ack); + &dsp->compr_buf.irq_ack); if (ret < 0) { adsp_err(dsp, "Failed to get irq_count: %d\n", ret); goto out_buf_unlock; @@ -3544,7 +3544,7 @@ int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) if (trigger) { /* irq_count = 2 only on the initial trigger */ - if (dsp->host_buf_info.irq_ack == 2) + if (dsp->compr_buf.irq_ack == 2) *trigger = true; else *trigger = false; @@ -3566,23 +3566,23 @@ int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) out_compr_unlock: mutex_unlock(&compr->lock); out_buf_unlock: - mutex_unlock(&dsp->host_buf_info.lock); + mutex_unlock(&dsp->compr_buf.lock); return ret; } EXPORT_SYMBOL_GPL(wm_adsp_compr_irq); static int wm_adsp_buffer_ack_irq(struct wm_adsp *dsp) { - if (dsp->host_buf_info.irq_ack & 0x01) + if (dsp->compr_buf.irq_ack & 0x01) return 0; adsp_dbg(dsp, "Acking buffer IRQ(0x%x)\n", - dsp->host_buf_info.irq_ack); + dsp->compr_buf.irq_ack); - dsp->host_buf_info.irq_ack |= 0x01; + dsp->compr_buf.irq_ack |= 0x01; return wm_adsp_host_buffer_write(dsp, HOST_BUFFER_FIELD(irq_ack), - dsp->host_buf_info.irq_ack); + dsp->compr_buf.irq_ack); } int wm_adsp_compr_pointer(struct snd_compr_stream *stream, @@ -3591,7 +3591,7 @@ int wm_adsp_compr_pointer(struct snd_compr_stream *stream, struct wm_adsp_compr *compr = stream->runtime->private_data; int ret = 0; - mutex_unlock(&compr->dsp->host_buf_info.lock); + mutex_lock(&compr->dsp->compr_buf.lock); ret = wm_adsp_stream_has_error_locked(compr->dsp); if (ret) @@ -3631,7 +3631,7 @@ int wm_adsp_compr_pointer(struct snd_compr_stream *stream, mutex_unlock(&compr->lock); out_buf_unlock: - mutex_unlock(&compr->dsp->host_buf_info.lock); + mutex_unlock(&compr->dsp->compr_buf.lock); return ret; } @@ -3641,7 +3641,7 @@ static int wm_adsp_buffer_capture_block(struct wm_adsp_compr *compr, int target) { struct wm_adsp *dsp = compr->dsp; const struct wm_adsp_buffer_region *host_regions = - dsp->host_buf_info.host_regions; + dsp->compr_buf.host_regions; int num_regions = dsp->firmwares[dsp->fw].caps->num_host_regions; u8 *pack_in = (u8 *)compr->capt_buf; u8 *pack_out = (u8 *)compr->capt_buf; @@ -3649,8 +3649,8 @@ static int wm_adsp_buffer_capture_block(struct wm_adsp_compr *compr, int target) int mem_type, nwords; int i, j, ret; - lockdep_assert_held(&dsp->host_buf_info.lock); - BUG_ON(!dsp->host_buf_info.host_regions); + lockdep_assert_held(&dsp->compr_buf.lock); + BUG_ON(!dsp->compr_buf.host_regions); /* Calculate read parameters */ for (i = 0; i < num_regions; ++i) @@ -3713,8 +3713,8 @@ static int wm_adsp_compr_read(struct wm_adsp_compr *compr, int nwords, nbytes; int ret; - lockdep_assert_held(&dsp->host_buf_info.lock); - BUG_ON(!dsp->host_buf_info.host_regions); + lockdep_assert_held(&dsp->compr_buf.lock); + BUG_ON(!dsp->compr_buf.host_regions); adsp_dbg(dsp, "Requested read of %d bytes\n", count); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index c480acf6049..d7f62272d52 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -86,7 +86,7 @@ struct wm_adsp_fw_features { bool host_read_buf:1; }; -struct wm_adsp_host_buf_info { +struct wm_adsp_compr_buf { struct mutex lock; struct wm_adsp_buffer_region *host_regions; u32 host_buf_ptr; @@ -148,7 +148,7 @@ struct wm_adsp { struct mutex ctl_lock; struct list_head ctl_list; - struct wm_adsp_host_buf_info host_buf_info; + struct wm_adsp_compr_buf compr_buf; int num_firmwares; struct wm_adsp_fw_defs *firmwares; From a72ee69a60c174e2de29027ea7097b1ca60e4ff3 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 2 Dec 2015 17:41:01 +0000 Subject: [PATCH 1055/1167] ASoC: wm_adsp: Connect compress stream to firmware buffer Point the wm_adsp_compr directly at the associated wm_adsp_compr_buf instead of accessing it via the wm_adsp object. This allow future support for firmwares that have multiple compressed streams. Change-Id: I821fcfde7ef175f32b60b88b670326fb80d0ab51 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 250 +++++++++++++++++++------------------ sound/soc/codecs/wm_adsp.h | 7 +- 2 files changed, 134 insertions(+), 123 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 83bbc5461d8..af8a4ee63b1 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -213,8 +213,8 @@ #define ADSP2_LOCK_REGION_SHIFT 16 -static int wm_adsp_init_host_buf_info(struct wm_adsp *dsp); -static void wm_adsp_free_host_buf_info(struct wm_adsp *dsp); +static int wm_adsp_init_host_buf_info(struct wm_adsp_compr_buf *buf); +static void wm_adsp_free_host_buf_info(struct wm_adsp_compr_buf *buf); struct wm_adsp_buf { struct list_head list; @@ -2674,7 +2674,7 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, goto err; if (dsp->fw_features.host_read_buf) { - ret = wm_adsp_init_host_buf_info(dsp); + ret = wm_adsp_init_host_buf_info(&dsp->compr_buf); if (ret < 0) { adsp_err(dsp, "Failed to init host buffer (%d)\n", @@ -2703,7 +2703,7 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, if (dsp->fw_features.host_read_buf) { adsp_dbg(dsp, "host buf invalidated by DSP shutdown\n"); - wm_adsp_free_host_buf_info(dsp); + wm_adsp_free_host_buf_info(&dsp->compr_buf); } wm_adsp_debugfs_clear(dsp); @@ -2971,6 +2971,8 @@ int wm_adsp2_init(struct wm_adsp *dsp, struct mutex *fw_lock) dsp->fw_lock = fw_lock; + dsp->compr_buf.dsp = dsp; + if (!dsp->num_firmwares) { if (!dsp->dev->of_node || wm_adsp_of_parse_adsp(dsp) <= 0) { dsp->num_firmwares = WM_ADSP_NUM_FW; @@ -3033,6 +3035,7 @@ int wm_adsp_compr_open(struct wm_adsp_compr *compr, goto out; } + compr->buf = &compr->dsp->compr_buf; compr->stream = stream; stream->runtime->private_data = compr; out: @@ -3054,6 +3057,7 @@ int wm_adsp_compr_free(struct snd_compr_stream *stream) compr->allocated = false; compr->copied_total = 0; compr->stream = NULL; + compr->buf = NULL; stream->runtime->private_data = NULL; kfree(compr->capt_buf); @@ -3245,61 +3249,62 @@ static int wm_adsp_write_data_word(struct wm_adsp *dsp, int mem_type, return regmap_raw_write(dsp->regmap, reg, &data, sizeof(data)); } -static inline int wm_adsp_host_buffer_read(struct wm_adsp *dsp, +static inline int wm_adsp_host_buffer_read(struct wm_adsp_compr_buf *buf, unsigned int field_offset, u32 *data) { - lockdep_assert_held(&dsp->compr_buf.lock); + lockdep_assert_held(&buf->lock); - return wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, - dsp->compr_buf.host_buf_ptr + + return wm_adsp_read_data_word(buf->dsp, WMFW_ADSP2_XM, + buf->host_buf_ptr + field_offset, data); } -static inline int wm_adsp_host_buffer_write(struct wm_adsp *dsp, +static inline int wm_adsp_host_buffer_write(struct wm_adsp_compr_buf *buf, unsigned int field_offset, u32 data) { - lockdep_assert_held(&dsp->compr_buf.lock); + lockdep_assert_held(&buf->lock); - return wm_adsp_write_data_word(dsp, WMFW_ADSP2_XM, - dsp->compr_buf.host_buf_ptr + + return wm_adsp_write_data_word(buf->dsp, WMFW_ADSP2_XM, + buf->host_buf_ptr + field_offset, data); } -static int wm_adsp_populate_buffer_regions(struct wm_adsp *dsp) +static int wm_adsp_populate_buffer_regions(struct wm_adsp_compr_buf *buf) { int i, ret; u32 offset = 0; + struct wm_adsp *dsp = buf->dsp; struct wm_adsp_buffer_region_def *host_region_defs = dsp->firmwares[dsp->fw].caps->host_region_defs; struct wm_adsp_buffer_region *region; - lockdep_assert_held(&dsp->compr_buf.lock); + lockdep_assert_held(&buf->lock); - BUG_ON(dsp->compr_buf.host_regions != NULL); + BUG_ON(buf->host_regions != NULL); - dsp->compr_buf.host_regions = + buf->host_regions = kcalloc(dsp->firmwares[dsp->fw].caps->num_host_regions, - sizeof(*dsp->compr_buf.host_regions), + sizeof(*buf->host_regions), GFP_KERNEL); - if (!dsp->compr_buf.host_regions) + if (!buf->host_regions) return -ENOMEM; for (i = 0; i < dsp->firmwares[dsp->fw].caps->num_host_regions; ++i) { - region = &dsp->compr_buf.host_regions[i]; + region = &buf->host_regions[i]; region->offset = offset; region->mem_type = host_region_defs[i].mem_type; - ret = wm_adsp_host_buffer_read(dsp, + ret = wm_adsp_host_buffer_read(buf, host_region_defs[i].base_offset, ®ion->base_addr); if (ret < 0) return ret; - ret = wm_adsp_host_buffer_read(dsp, + ret = wm_adsp_host_buffer_read(buf, host_region_defs[i].size_offset, &offset); if (ret < 0) @@ -3316,17 +3321,17 @@ static int wm_adsp_populate_buffer_regions(struct wm_adsp *dsp) return 0; } -static int wm_adsp_init_host_buf_info(struct wm_adsp *dsp) +static int wm_adsp_init_host_buf_info(struct wm_adsp_compr_buf *buf) { u32 xm_base, magic; int i, ret; - ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, + ret = wm_adsp_read_data_word(buf->dsp, WMFW_ADSP2_XM, ADSP2_SYSTEM_CONFIG_XM_PTR, &xm_base); if (ret < 0) return ret; - ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, + ret = wm_adsp_read_data_word(buf->dsp, WMFW_ADSP2_XM, xm_base + WM_ADSP_ALG_XM_PTR + ALG_XM_FIELD(magic), &magic); @@ -3336,86 +3341,88 @@ static int wm_adsp_init_host_buf_info(struct wm_adsp *dsp) if (magic != WM_ADSP_ALG_XM_STRUCT_MAGIC) return -EINVAL; - mutex_lock(&dsp->compr_buf.lock); + mutex_lock(&buf->lock); - dsp->compr_buf.error = 0; - dsp->compr_buf.irq_ack = 0xFFFFFFFF; + buf->read_index = -1; + buf->irq_ack = 0xFFFFFFFF; + buf->error = 0; + buf->avail = 0; for (i = 0; i < 5; ++i) { - ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, + ret = wm_adsp_read_data_word(buf->dsp, WMFW_ADSP2_XM, xm_base + WM_ADSP_ALG_XM_PTR + ALG_XM_FIELD(host_buf_ptr), - &dsp->compr_buf.host_buf_ptr); + &buf->host_buf_ptr); if (ret < 0) goto out; - if (dsp->compr_buf.host_buf_ptr) + if (buf->host_buf_ptr) break; msleep(1); } - if (!dsp->compr_buf.host_buf_ptr) { + if (!buf->host_buf_ptr) { ret = -EIO; goto out; } - ret = wm_adsp_populate_buffer_regions(dsp); + ret = wm_adsp_populate_buffer_regions(buf); out: - mutex_unlock(&dsp->compr_buf.lock); + mutex_unlock(&buf->lock); return ret; } -static void wm_adsp_free_host_buf_info(struct wm_adsp *dsp) +static void wm_adsp_free_host_buf_info(struct wm_adsp_compr_buf *buf) { struct wm_adsp_buffer_region *host_regions; - mutex_lock(&dsp->compr_buf.lock); + mutex_lock(&buf->lock); - host_regions = dsp->compr_buf.host_regions; - dsp->compr_buf.host_regions = NULL; - dsp->compr_buf.host_buf_ptr = 0; + host_regions = buf->host_regions; + buf->host_regions = NULL; + buf->host_buf_ptr = 0; - mutex_unlock(&dsp->compr_buf.lock); + mutex_unlock(&buf->lock); kfree(host_regions); } -static inline int wm_adsp_buffer_size(struct wm_adsp_compr *compr) +static inline int wm_adsp_buffer_size(struct wm_adsp_compr_buf *buf) { - const struct wm_adsp *dsp = compr->dsp; + const struct wm_adsp *dsp = buf->dsp; int last_region = dsp->firmwares[dsp->fw].caps->num_host_regions - 1; - return dsp->compr_buf.host_regions[last_region].cumulative_size; + return buf->host_regions[last_region].cumulative_size; } static int wm_adsp_stream_start(struct wm_adsp_compr *compr) { - struct wm_adsp *dsp = compr->dsp; + struct wm_adsp_compr_buf *buf = compr->buf; int ret; - mutex_lock(&dsp->compr_buf.lock); + mutex_lock(&buf->lock); - if (!dsp->compr_buf.host_buf_ptr) { - adsp_warn(dsp, "No host buffer info\n"); + if (!buf->host_buf_ptr) { + adsp_warn(buf->dsp, "No host buffer info\n"); ret = -EIO; goto out_unlock; } - compr->buf_read_index = -1; - compr->buf_avail = 0; + buf->read_index = -1; + buf->avail = 0; - ret = wm_adsp_host_buffer_write(dsp, + ret = wm_adsp_host_buffer_write(buf, HOST_BUFFER_FIELD(high_water_mark), compr->irq_watermark); if (ret < 0) goto out_unlock; - adsp_dbg(dsp, "Set watermark to %u\n", compr->irq_watermark); + adsp_dbg(buf->dsp, "Set watermark to %u\n", compr->irq_watermark); out_unlock: - mutex_unlock(&dsp->compr_buf.lock); + mutex_unlock(&buf->lock); return ret; } @@ -3444,18 +3451,17 @@ int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd) } EXPORT_SYMBOL_GPL(wm_adsp_compr_trigger); -static int wm_adsp_buffer_update_avail(struct wm_adsp_compr *compr) +static int wm_adsp_buffer_update_avail(struct wm_adsp_compr_buf *buf) { - struct wm_adsp *dsp = compr->dsp; u32 next_read_index, next_write_index; int write_index, read_index, avail; int ret; - lockdep_assert_held(&dsp->compr_buf.lock); + lockdep_assert_held(&buf->lock); /* Only sync the read index if we haven't already read a valid index */ - if (compr->buf_read_index < 0) { - ret = wm_adsp_host_buffer_read(dsp, + if (buf->read_index < 0) { + ret = wm_adsp_host_buffer_read(buf, HOST_BUFFER_FIELD(next_read_index), &next_read_index); if (ret < 0) @@ -3464,14 +3470,14 @@ static int wm_adsp_buffer_update_avail(struct wm_adsp_compr *compr) read_index = sign_extend32(next_read_index, 23); if (read_index < 0) { - adsp_dbg(dsp, "Avail check on unstarted stream\n"); + adsp_dbg(buf->dsp, "Avail check on unstarted stream\n"); return 0; } - compr->buf_read_index = read_index; + buf->read_index = read_index; } - ret = wm_adsp_host_buffer_read(dsp, + ret = wm_adsp_host_buffer_read(buf, HOST_BUFFER_FIELD(next_write_index), &next_write_index); if (ret < 0) @@ -3479,39 +3485,39 @@ static int wm_adsp_buffer_update_avail(struct wm_adsp_compr *compr) write_index = sign_extend32(next_write_index, 23); - avail = write_index - compr->buf_read_index; + avail = write_index - buf->read_index; if (avail < 0) - avail += wm_adsp_buffer_size(compr); + avail += wm_adsp_buffer_size(buf); - adsp_dbg(dsp, "readindex=0x%x, writeindex=0x%x, avail=%d\n", - compr->buf_read_index, write_index, avail); + adsp_dbg(buf->dsp, "readindex=0x%x, writeindex=0x%x, avail=%d\n", + buf->read_index, write_index, avail); - compr->buf_avail = avail; + buf->avail = avail; return 0; } -static int wm_adsp_stream_has_error_locked(struct wm_adsp *dsp) +static int wm_adsp_buffer_has_error_locked(struct wm_adsp_compr_buf *buf) { int ret; - lockdep_assert_held(&dsp->compr_buf.lock); + lockdep_assert_held(&buf->lock); - if (dsp->compr_buf.error != 0) + if (buf->error != 0) return -EIO; - ret = wm_adsp_host_buffer_read(dsp, + ret = wm_adsp_host_buffer_read(buf, HOST_BUFFER_FIELD(error), - &dsp->compr_buf.error); + &buf->error); if (ret < 0) { - adsp_err(dsp, "Failed to read error field: %d\n", ret); + adsp_err(buf->dsp, "Failed to read error field: %d\n", ret); return ret; } - if (dsp->compr_buf.error != 0) { + if (buf->error != 0) { /* log the first time we see the error */ - adsp_warn(dsp, "DSP stream error occurred: %d\n", - dsp->compr_buf.error); + adsp_warn(buf->dsp, "DSP stream error occurred: %d\n", + buf->error); return -EIO; } @@ -3520,31 +3526,34 @@ static int wm_adsp_stream_has_error_locked(struct wm_adsp *dsp) int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) { - struct wm_adsp *dsp = compr->dsp; + struct wm_adsp_compr_buf *buf = compr->buf; int ret; - mutex_lock(&dsp->compr_buf.lock); + if (!buf) + return 0; + + mutex_lock(&buf->lock); - if (!dsp->compr_buf.host_buf_ptr) { - adsp_warn(dsp, "No host buffer info\n"); + if (!buf->host_buf_ptr) { + adsp_warn(buf->dsp, "No host buffer info\n"); ret = -EIO; goto out_buf_unlock; } - ret = wm_adsp_stream_has_error_locked(dsp); + ret = wm_adsp_buffer_has_error_locked(buf); if (ret) goto out_buf_unlock; - ret = wm_adsp_host_buffer_read(dsp, HOST_BUFFER_FIELD(irq_count), - &dsp->compr_buf.irq_ack); + ret = wm_adsp_host_buffer_read(buf, HOST_BUFFER_FIELD(irq_count), + &buf->irq_ack); if (ret < 0) { - adsp_err(dsp, "Failed to get irq_count: %d\n", ret); + adsp_err(buf->dsp, "Failed to get irq_count: %d\n", ret); goto out_buf_unlock; } if (trigger) { /* irq_count = 2 only on the initial trigger */ - if (dsp->compr_buf.irq_ack == 2) + if (buf->irq_ack == 2) *trigger = true; else *trigger = false; @@ -3554,9 +3563,10 @@ int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) /* Fetch read_index and update count of available data */ if (compr->allocated) { - ret = wm_adsp_buffer_update_avail(compr); + ret = wm_adsp_buffer_update_avail(buf); if (ret < 0) { - adsp_err(dsp, "Error reading read_index: %d\n", ret); + adsp_err(buf->dsp, "Error reading read_index: %d\n", + ret); goto out_compr_unlock; } @@ -3566,41 +3576,41 @@ int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) out_compr_unlock: mutex_unlock(&compr->lock); out_buf_unlock: - mutex_unlock(&dsp->compr_buf.lock); + mutex_unlock(&buf->lock); return ret; } EXPORT_SYMBOL_GPL(wm_adsp_compr_irq); -static int wm_adsp_buffer_ack_irq(struct wm_adsp *dsp) +static int wm_adsp_buffer_ack_irq(struct wm_adsp_compr_buf *buf) { - if (dsp->compr_buf.irq_ack & 0x01) + if (buf->irq_ack & 0x01) return 0; - adsp_dbg(dsp, "Acking buffer IRQ(0x%x)\n", - dsp->compr_buf.irq_ack); + adsp_dbg(buf->dsp, "Acking buffer IRQ(0x%x)\n", buf->irq_ack); - dsp->compr_buf.irq_ack |= 0x01; + buf->irq_ack |= 0x01; - return wm_adsp_host_buffer_write(dsp, HOST_BUFFER_FIELD(irq_ack), - dsp->compr_buf.irq_ack); + return wm_adsp_host_buffer_write(buf, HOST_BUFFER_FIELD(irq_ack), + buf->irq_ack); } int wm_adsp_compr_pointer(struct snd_compr_stream *stream, struct snd_compr_tstamp *tstamp) { struct wm_adsp_compr *compr = stream->runtime->private_data; + struct wm_adsp_compr_buf *buf = compr->buf; int ret = 0; - mutex_lock(&compr->dsp->compr_buf.lock); + mutex_lock(&buf->lock); - ret = wm_adsp_stream_has_error_locked(compr->dsp); + ret = wm_adsp_buffer_has_error_locked(buf); if (ret) goto out_buf_unlock; mutex_lock(&compr->lock); - if (compr->buf_avail < compr->max_read_words) { - ret = wm_adsp_buffer_update_avail(compr); + if (buf->avail < compr->max_read_words) { + ret = wm_adsp_buffer_update_avail(buf); if (ret < 0) { adsp_err(compr->dsp, "Error reading avail: %d\n", ret); goto out; @@ -3611,8 +3621,8 @@ int wm_adsp_compr_pointer(struct snd_compr_stream *stream, * last DSP IRQ and rely on the IRQ to inform us when a whole * fragment is available. */ - if (compr->buf_avail < compr->max_read_words) { - ret = wm_adsp_buffer_ack_irq(compr->dsp); + if (buf->avail < compr->max_read_words) { + ret = wm_adsp_buffer_ack_irq(buf); if (ret < 0) { adsp_err(compr->dsp, "Failed to ack buffer IRQ: %d\n", ret); @@ -3622,16 +3632,16 @@ int wm_adsp_compr_pointer(struct snd_compr_stream *stream, } tstamp->copied_total = compr->copied_total; - tstamp->copied_total += compr->buf_avail * WM_ADSP_DATA_WORD_SIZE; + tstamp->copied_total += buf->avail * WM_ADSP_DATA_WORD_SIZE; out: adsp_dbg(compr->dsp, "tstamp->copied_total=%d (avail=%d)\n", - tstamp->copied_total, compr->buf_avail); + tstamp->copied_total, buf->avail); mutex_unlock(&compr->lock); out_buf_unlock: - mutex_unlock(&compr->dsp->compr_buf.lock); + mutex_unlock(&buf->lock); return ret; } @@ -3639,9 +3649,9 @@ EXPORT_SYMBOL_GPL(wm_adsp_compr_pointer); static int wm_adsp_buffer_capture_block(struct wm_adsp_compr *compr, int target) { - struct wm_adsp *dsp = compr->dsp; - const struct wm_adsp_buffer_region *host_regions = - dsp->compr_buf.host_regions; + struct wm_adsp_compr_buf *buf = compr->buf; + struct wm_adsp *dsp = buf->dsp; + const struct wm_adsp_buffer_region *host_regions = buf->host_regions; int num_regions = dsp->firmwares[dsp->fw].caps->num_host_regions; u8 *pack_in = (u8 *)compr->capt_buf; u8 *pack_out = (u8 *)compr->capt_buf; @@ -3649,12 +3659,12 @@ static int wm_adsp_buffer_capture_block(struct wm_adsp_compr *compr, int target) int mem_type, nwords; int i, j, ret; - lockdep_assert_held(&dsp->compr_buf.lock); - BUG_ON(!dsp->compr_buf.host_regions); + lockdep_assert_held(&buf->lock); + BUG_ON(!buf->host_regions); /* Calculate read parameters */ for (i = 0; i < num_regions; ++i) - if (compr->buf_read_index < host_regions[i].cumulative_size) + if (buf->read_index < host_regions[i].cumulative_size) break; if (i == num_regions) @@ -3662,14 +3672,14 @@ static int wm_adsp_buffer_capture_block(struct wm_adsp_compr *compr, int target) mem_type = host_regions[i].mem_type; adsp_addr = host_regions[i].base_addr + - (compr->buf_read_index - host_regions[i].offset); + (buf->read_index - host_regions[i].offset); - nwords = host_regions[i].cumulative_size - compr->buf_read_index; + nwords = host_regions[i].cumulative_size - buf->read_index; if (nwords > target) nwords = target; - if (nwords > compr->buf_avail) - nwords = compr->buf_avail; + if (nwords > buf->avail) + nwords = buf->avail; if (nwords > compr->max_read_words) nwords = compr->max_read_words; if (!nwords) @@ -3690,17 +3700,17 @@ static int wm_adsp_buffer_capture_block(struct wm_adsp_compr *compr, int target) } /* update read index to account for words read */ - compr->buf_read_index += nwords; - if (compr->buf_read_index == wm_adsp_buffer_size(compr)) - compr->buf_read_index = 0; + buf->read_index += nwords; + if (buf->read_index == wm_adsp_buffer_size(buf)) + buf->read_index = 0; - ret = wm_adsp_host_buffer_write(dsp, HOST_BUFFER_FIELD(next_read_index), - compr->buf_read_index); + ret = wm_adsp_host_buffer_write(buf, HOST_BUFFER_FIELD(next_read_index), + buf->read_index); if (ret < 0) return ret; /* update avail to account for words read */ - compr->buf_avail -= nwords; + buf->avail -= nwords; return nwords; } @@ -3713,12 +3723,12 @@ static int wm_adsp_compr_read(struct wm_adsp_compr *compr, int nwords, nbytes; int ret; - lockdep_assert_held(&dsp->compr_buf.lock); - BUG_ON(!dsp->compr_buf.host_regions); + lockdep_assert_held(&compr->buf->lock); + BUG_ON(!compr->buf->host_regions); adsp_dbg(dsp, "Requested read of %d bytes\n", count); - ret = wm_adsp_stream_has_error_locked(dsp); + ret = wm_adsp_buffer_has_error_locked(compr->buf); if (ret) return ret; diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index d7f62272d52..6eee4864566 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -88,21 +88,22 @@ struct wm_adsp_fw_features { struct wm_adsp_compr_buf { struct mutex lock; + struct wm_adsp *dsp; struct wm_adsp_buffer_region *host_regions; u32 host_buf_ptr; u32 error; u32 irq_ack; + int read_index; + int avail; }; struct wm_adsp_compr { struct mutex lock; struct wm_adsp *dsp; + struct wm_adsp_compr_buf *buf; bool allocated; - int buf_read_index; - int buf_avail; - u32 *capt_buf; u32 irq_watermark; From f795fade8a1d1a3b5a9552423403179dff360c2e Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 3 Dec 2015 12:48:12 +0000 Subject: [PATCH 1056/1167] ASoC: wm_adsp: remove compressed stream allocated flag The allocated flag was originally needed to stop the IRQ attempting to read data from the firmware buffer before the driver buffer had been allocated. Now the IRQ only updates the buffer avail count but doesn't read any data the allocated flag is unnecessary. Change-Id: I8d30614d956ef40127505603904b1979450a3543 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 20 ++++++-------------- sound/soc/codecs/wm_adsp.h | 2 -- 2 files changed, 6 insertions(+), 16 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index af8a4ee63b1..bb534e24752 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3054,7 +3054,6 @@ int wm_adsp_compr_free(struct snd_compr_stream *stream) mutex_lock(&compr->lock); - compr->allocated = false; compr->copied_total = 0; compr->stream = NULL; compr->buf = NULL; @@ -3157,12 +3156,7 @@ int wm_adsp_compr_set_params(struct snd_compr_stream *stream, mutex_lock(&compr->lock); ret = wm_adsp_streambuf_alloc(compr, params); - if (ret < 0) - goto out; - - compr->allocated = true; -out: mutex_unlock(&compr->lock); return ret; @@ -3562,16 +3556,14 @@ int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) mutex_lock(&compr->lock); /* Fetch read_index and update count of available data */ - if (compr->allocated) { - ret = wm_adsp_buffer_update_avail(buf); - if (ret < 0) { - adsp_err(buf->dsp, "Error reading read_index: %d\n", - ret); - goto out_compr_unlock; - } + ret = wm_adsp_buffer_update_avail(buf); + if (ret < 0) { + adsp_err(buf->dsp, "Error reading read_index: %d\n", ret); + goto out_compr_unlock; + } + if (compr->stream) snd_compr_fragment_elapsed(compr->stream); - } out_compr_unlock: mutex_unlock(&compr->lock); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 6eee4864566..1a09a302fa3 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -102,8 +102,6 @@ struct wm_adsp_compr { struct wm_adsp *dsp; struct wm_adsp_compr_buf *buf; - bool allocated; - u32 *capt_buf; u32 irq_watermark; From 39f16f717f61b3ffbf18ffbaab9e36a9787dc89e Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 3 Dec 2015 16:33:16 +0000 Subject: [PATCH 1057/1167] ASoC: arizona: Replace use of wm_adsp_compr mutex Now that the compressed stream API is handled by the wm_adsp driver we shouldn't be messing with its internal mutex objects from the codec driver. This patch creates a codec-specific mutex to protect access to the codec's trigger flag. Change-Id: I3b63024b49d4f63ca2f5eef2db5a40ad8df1804f Signed-off-by: Richard Fitzgerald Signed-off-by: Simon Trimmer --- sound/soc/codecs/clearwater.c | 11 +++++++---- sound/soc/codecs/florida.c | 11 +++++++---- sound/soc/codecs/largo.c | 11 +++++++---- sound/soc/codecs/marley.c | 11 +++++++---- sound/soc/codecs/moon.c | 11 +++++++---- 5 files changed, 35 insertions(+), 20 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 21d5c7b3158..a57896420d0 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -193,6 +193,7 @@ struct clearwater_compr { struct wm_adsp_compr adsp_compr; const char *dai_name; bool trig; + struct mutex trig_lock; struct clearwater_priv *priv; }; @@ -649,9 +650,9 @@ static int clearwater_adsp_power_ev(struct snd_soc_dapm_widget *w, w->shift + 1) continue; - mutex_lock(&clearwater->compr_info[i].adsp_compr.lock); + mutex_lock(&clearwater->compr_info[i].trig_lock); clearwater->compr_info[i].trig = false; - mutex_unlock(&clearwater->compr_info[i].adsp_compr.lock); + mutex_unlock(&clearwater->compr_info[i].trig_lock); } break; default: @@ -2754,7 +2755,7 @@ static void clearwater_compr_irq(struct clearwater_priv *clearwater, return; if (trigger && arizona->pdata.ez2ctrl_trigger) { - mutex_lock(&compr->adsp_compr.lock); + mutex_lock(&compr->trig_lock); if (!compr->trig) { compr->trig = true; @@ -2762,7 +2763,7 @@ static void clearwater_compr_irq(struct clearwater_priv *clearwater, wm_adsp_fw_has_voice_trig(compr->adsp_compr.dsp)) arizona->pdata.ez2ctrl_trigger(); } - mutex_unlock(&compr->adsp_compr.lock); + mutex_unlock(&compr->trig_lock); } } @@ -2995,6 +2996,8 @@ static void clearwater_init_compr_info(struct clearwater_priv *clearwater) dsp = &clearwater->core.adsp[compr_dai_mapping[i].adsp_num], wm_adsp_compr_init(dsp, &clearwater->compr_info[i].adsp_compr); + + mutex_init(&clearwater->compr_info[i].trig_lock); } } diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index cb3ca9503db..aae4914c1ee 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -44,6 +44,7 @@ struct florida_compr { struct wm_adsp_compr adsp_compr; const char *dai_name; bool trig; + struct mutex trig_lock; }; struct florida_priv { @@ -242,9 +243,9 @@ static int florida_adsp_power_ev(struct snd_soc_dapm_widget *w, w->shift + 1) continue; - mutex_lock(&florida->compr_info[i].adsp_compr.lock); + mutex_lock(&florida->compr_info[i].trig_lock); florida->compr_info[i].trig = false; - mutex_unlock(&florida->compr_info[i].adsp_compr.lock); + mutex_unlock(&florida->compr_info[i].trig_lock); } break; default: @@ -2225,7 +2226,7 @@ static void florida_compr_irq(struct florida_priv *florida, return; if (trigger && arizona->pdata.ez2ctrl_trigger) { - mutex_lock(&compr->adsp_compr.lock); + mutex_lock(&compr->trig_lock); if (!compr->trig) { compr->trig = true; @@ -2233,7 +2234,7 @@ static void florida_compr_irq(struct florida_priv *florida, wm_adsp_fw_has_voice_trig(compr->adsp_compr.dsp)) arizona->pdata.ez2ctrl_trigger(); } - mutex_unlock(&compr->adsp_compr.lock); + mutex_unlock(&compr->trig_lock); } } @@ -2459,6 +2460,8 @@ static void florida_init_compr_info(struct florida_priv *florida) dsp = &florida->core.adsp[compr_dai_mapping[i].adsp_num], wm_adsp_compr_init(dsp, &florida->compr_info[i].adsp_compr); + + mutex_init(&florida->compr_info[i].trig_lock); } } diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index 294e686e8c0..4dce1830cbc 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -45,6 +45,7 @@ struct largo_compr { struct wm_adsp_compr adsp_compr; const char *dai_name; bool trig; + struct mutex trig_lock; }; struct largo_priv { @@ -110,9 +111,9 @@ static int largo_adsp_power_ev(struct snd_soc_dapm_widget *w, w->shift + 1) continue; - mutex_lock(&largo->compr_info[i].adsp_compr.lock); + mutex_lock(&largo->compr_info[i].trig_lock); largo->compr_info[i].trig = false; - mutex_unlock(&largo->compr_info[i].adsp_compr.lock); + mutex_unlock(&largo->compr_info[i].trig_lock); } break; default: @@ -1129,7 +1130,7 @@ static void largo_compr_irq(struct largo_priv *largo, struct largo_compr *compr) return; if (trigger && arizona->pdata.ez2ctrl_trigger) { - mutex_lock(&compr->adsp_compr.lock); + mutex_lock(&compr->trig_lock); if (!compr->trig) { compr->trig = true; @@ -1137,7 +1138,7 @@ static void largo_compr_irq(struct largo_priv *largo, struct largo_compr *compr) wm_adsp_fw_has_voice_trig(compr->adsp_compr.dsp)) arizona->pdata.ez2ctrl_trigger(); } - mutex_unlock(&compr->adsp_compr.lock); + mutex_unlock(&compr->trig_lock); } } @@ -1354,6 +1355,8 @@ static void largo_init_compr_info(struct largo_priv *largo) dsp = &largo->core.adsp[compr_dai_mapping[i].adsp_num], wm_adsp_compr_init(dsp, &largo->compr_info[i].adsp_compr); + + mutex_init(&largo->compr_info[i].trig_lock); } } diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index c84774fd35f..fe5ea4a18f3 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -140,6 +140,7 @@ struct marley_compr { struct wm_adsp_compr adsp_compr; const char *dai_name; bool trig; + struct mutex trig_lock; struct marley_priv *priv; }; @@ -565,9 +566,9 @@ static int marley_adsp_power_ev(struct snd_soc_dapm_widget *w, w->shift + 1) continue; - mutex_lock(&marley->compr_info[i].adsp_compr.lock); + mutex_lock(&marley->compr_info[i].trig_lock); marley->compr_info[i].trig = false; - mutex_unlock(&marley->compr_info[i].adsp_compr.lock); + mutex_unlock(&marley->compr_info[i].trig_lock); } break; default: @@ -1840,7 +1841,7 @@ static void marley_compr_irq(struct marley_priv *marley, return; if (trigger && arizona->pdata.ez2ctrl_trigger) { - mutex_lock(&compr->adsp_compr.lock); + mutex_lock(&compr->trig_lock); if (!compr->trig) { compr->trig = true; @@ -1848,7 +1849,7 @@ static void marley_compr_irq(struct marley_priv *marley, wm_adsp_fw_has_voice_trig(compr->adsp_compr.dsp)) arizona->pdata.ez2ctrl_trigger(); } - mutex_unlock(&compr->adsp_compr.lock); + mutex_unlock(&compr->trig_lock); } } @@ -2071,6 +2072,8 @@ static void marley_init_compr_info(struct marley_priv *marley) dsp = &marley->core.adsp[compr_dai_mapping[i].adsp_num], wm_adsp_compr_init(dsp, &marley->compr_info[i].adsp_compr); + + mutex_init(&marley->compr_info[i].trig_lock); } } diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index a823f591db9..2fedaefac25 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -189,6 +189,7 @@ struct moon_compr { struct wm_adsp_compr adsp_compr; const char *dai_name; bool trig; + struct mutex trig_lock; struct moon_priv *priv; }; @@ -633,9 +634,9 @@ static int moon_adsp_power_ev(struct snd_soc_dapm_widget *w, w->shift + 1) continue; - mutex_lock(&moon->compr_info[i].adsp_compr.lock); + mutex_lock(&moon->compr_info[i].trig_lock); moon->compr_info[i].trig = false; - mutex_unlock(&moon->compr_info[i].adsp_compr.lock); + mutex_unlock(&moon->compr_info[i].trig_lock); } break; default: @@ -2693,7 +2694,7 @@ static void moon_compr_irq(struct moon_priv *moon, return; if (trigger && arizona->pdata.ez2ctrl_trigger) { - mutex_lock(&compr->adsp_compr.lock); + mutex_lock(&compr->trig_lock); if (!compr->trig) { compr->trig = true; @@ -2701,7 +2702,7 @@ static void moon_compr_irq(struct moon_priv *moon, wm_adsp_fw_has_voice_trig(compr->adsp_compr.dsp)) arizona->pdata.ez2ctrl_trigger(); } - mutex_unlock(&compr->adsp_compr.lock); + mutex_unlock(&compr->trig_lock); } } @@ -2945,6 +2946,8 @@ static void moon_init_compr_info(struct moon_priv *moon) dsp = &moon->core.adsp[compr_dai_mapping[i].adsp_num], wm_adsp_compr_init(dsp, &moon->compr_info[i].adsp_compr); + + mutex_init(&moon->compr_info[i].trig_lock); } } From 5f19c3a064d241405521c70898e7dfabeca60236 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 3 Dec 2015 12:57:00 +0000 Subject: [PATCH 1058/1167] ASoC: wm_adsp: Remove compressed stream mutex The mutex in wm_adsp_compr was originally needed to prevent a race condition between the IRQ and stream functions accessing the capture buffer. As the IRQ no longer reads data there's no need to protect the wm_adsp_compr with a mutex. Change-Id: I44e177c091a2235affad3c476b67200a121b3964 Signed-off-by: Richard Fitzgerald Signed-off-by: Simon Trimmer --- sound/soc/codecs/wm_adsp.c | 95 ++++++++++++++++---------------------- sound/soc/codecs/wm_adsp.h | 1 - 2 files changed, 40 insertions(+), 56 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index bb534e24752..cf097f37517 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3019,51 +3019,51 @@ static bool wm_adsp_compress_supported(const struct wm_adsp *dsp, int wm_adsp_compr_open(struct wm_adsp_compr *compr, struct snd_compr_stream *stream) { - int ret = 0; - - mutex_lock(&compr->lock); - - if (compr->stream) { - ret = -EBUSY; - goto out; - } + if (compr->stream) + return -EBUSY; if (!wm_adsp_compress_supported(compr->dsp, stream)) { adsp_err(compr->dsp, "Firmware does not support compressed stream\n"); - ret = -EINVAL; - goto out; + return -EINVAL; } compr->buf = &compr->dsp->compr_buf; compr->stream = stream; stream->runtime->private_data = compr; -out: - mutex_unlock(&compr->lock); - return ret; + return 0; } EXPORT_SYMBOL_GPL(wm_adsp_compr_open); int wm_adsp_compr_free(struct snd_compr_stream *stream) { struct wm_adsp_compr *compr = stream->runtime->private_data; + struct wm_adsp_compr_buf *buf; if (!compr) return -EINVAL; - mutex_lock(&compr->lock); + /* Take buffer lock to prevent race conditions with the IRQ handler + * while we disconnect the buffer from the stream + */ + if (compr->buf) { + buf = compr->buf; + mutex_lock(&buf->lock); + + compr->buf = NULL; + compr->stream = NULL; + + mutex_unlock(&buf->lock); + } compr->copied_total = 0; - compr->stream = NULL; - compr->buf = NULL; + stream->runtime->private_data = NULL; kfree(compr->capt_buf); compr->capt_buf = NULL; - mutex_unlock(&compr->lock); - return 0; } EXPORT_SYMBOL_GPL(wm_adsp_compr_free); @@ -3153,12 +3153,8 @@ int wm_adsp_compr_set_params(struct snd_compr_stream *stream, if (ret) return ret; - mutex_lock(&compr->lock); - ret = wm_adsp_streambuf_alloc(compr, params); - mutex_unlock(&compr->lock); - return ret; } EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params); @@ -3170,8 +3166,6 @@ int wm_adsp_compr_get_caps(struct snd_compr_stream *stream, struct wm_adsp *dsp = compr->dsp; int i; - mutex_lock(&compr->lock); - memset(caps, 0, sizeof(*caps)); caps->direction = stream->direction; @@ -3188,8 +3182,6 @@ int wm_adsp_compr_get_caps(struct snd_compr_stream *stream, caps->direction = dsp->firmwares[dsp->fw].compr_direction; } - mutex_unlock(&compr->lock); - return 0; } EXPORT_SYMBOL_GPL(wm_adsp_compr_get_caps); @@ -3424,24 +3416,15 @@ static int wm_adsp_stream_start(struct wm_adsp_compr *compr) int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd) { struct wm_adsp_compr *compr = stream->runtime->private_data; - int ret = 0; - - mutex_lock(&compr->lock); switch (cmd) { case SNDRV_PCM_TRIGGER_START: - ret = wm_adsp_stream_start(compr); - break; + return wm_adsp_stream_start(compr); case SNDRV_PCM_TRIGGER_STOP: - break; + return 0; default: - ret = -EINVAL; - break; + return -EINVAL; } - - mutex_unlock(&compr->lock); - - return ret; } EXPORT_SYMBOL_GPL(wm_adsp_compr_trigger); @@ -3553,20 +3536,16 @@ int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) *trigger = false; } - mutex_lock(&compr->lock); - /* Fetch read_index and update count of available data */ ret = wm_adsp_buffer_update_avail(buf); if (ret < 0) { adsp_err(buf->dsp, "Error reading read_index: %d\n", ret); - goto out_compr_unlock; + goto out_buf_unlock; } if (compr->stream) snd_compr_fragment_elapsed(compr->stream); -out_compr_unlock: - mutex_unlock(&compr->lock); out_buf_unlock: mutex_unlock(&buf->lock); return ret; @@ -3595,17 +3574,21 @@ int wm_adsp_compr_pointer(struct snd_compr_stream *stream, mutex_lock(&buf->lock); + if (!buf->host_buf_ptr) { + adsp_warn(buf->dsp, "No host buffer info\n"); + ret = -EIO; + goto out_buf_unlock; + } + ret = wm_adsp_buffer_has_error_locked(buf); if (ret) goto out_buf_unlock; - mutex_lock(&compr->lock); - if (buf->avail < compr->max_read_words) { ret = wm_adsp_buffer_update_avail(buf); if (ret < 0) { adsp_err(compr->dsp, "Error reading avail: %d\n", ret); - goto out; + goto out_buf_unlock; } /* @@ -3618,7 +3601,7 @@ int wm_adsp_compr_pointer(struct snd_compr_stream *stream, if (ret < 0) { adsp_err(compr->dsp, "Failed to ack buffer IRQ: %d\n", ret); - goto out; + goto out_buf_unlock; } } } @@ -3626,12 +3609,9 @@ int wm_adsp_compr_pointer(struct snd_compr_stream *stream, tstamp->copied_total = compr->copied_total; tstamp->copied_total += buf->avail * WM_ADSP_DATA_WORD_SIZE; -out: adsp_dbg(compr->dsp, "tstamp->copied_total=%d (avail=%d)\n", tstamp->copied_total, buf->avail); - mutex_unlock(&compr->lock); - out_buf_unlock: mutex_unlock(&buf->lock); @@ -3758,14 +3738,22 @@ int wm_adsp_compr_copy(struct snd_compr_stream *stream, struct wm_adsp_compr *compr = stream->runtime->private_data; int ret; - mutex_lock(&compr->lock); + mutex_lock(&compr->buf->lock); + + + if (!compr->buf->host_buf_ptr) { + adsp_warn(compr->buf->dsp, "No host buffer info\n"); + ret = -EIO; + goto out_buf_unlock; + } if (stream->direction == SND_COMPRESS_CAPTURE) ret = wm_adsp_compr_read(compr, buf, count); else ret = -ENOTSUPP; - mutex_unlock(&compr->lock); +out_buf_unlock: + mutex_unlock(&compr->buf->lock); return ret; } @@ -3774,7 +3762,6 @@ EXPORT_SYMBOL_GPL(wm_adsp_compr_copy); void wm_adsp_compr_init(struct wm_adsp *dsp, struct wm_adsp_compr *compr) { compr->dsp = dsp; - mutex_init(&compr->lock); } EXPORT_SYMBOL_GPL(wm_adsp_compr_init); @@ -3782,8 +3769,6 @@ void wm_adsp_compr_destroy(struct wm_adsp_compr *compr) { if (!compr->dsp) return; - - mutex_destroy(&compr->lock); } EXPORT_SYMBOL_GPL(wm_adsp_compr_destroy); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 1a09a302fa3..7a1b1eaa480 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -98,7 +98,6 @@ struct wm_adsp_compr_buf { }; struct wm_adsp_compr { - struct mutex lock; struct wm_adsp *dsp; struct wm_adsp_compr_buf *buf; From f59218160ce166e3e166170b5da6f255a5188d0e Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 15 Jul 2015 09:50:38 +0100 Subject: [PATCH 1059/1167] ASoC: wm_adsp: Factor out finding the location of an algorithm region Change-Id: I0f6161f3cca3d595617284d4324698d7839c5e67 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 36 ++++++++++++++++++++---------------- 1 file changed, 20 insertions(+), 16 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index cf097f37517..b7e2a49b167 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1823,6 +1823,19 @@ static void *wm_adsp_read_algs(struct wm_adsp *dsp, size_t n_algs, return alg; } +static struct wm_adsp_alg_region * + wm_adsp_find_alg_region(struct wm_adsp *dsp, int type, unsigned int id) +{ + struct wm_adsp_alg_region *alg_region; + + list_for_each_entry(alg_region, &dsp->alg_regions, list) { + if (id == alg_region->alg && type == alg_region->type) + return alg_region; + } + + return NULL; +} + static struct wm_adsp_alg_region *wm_adsp_create_region(struct wm_adsp *dsp, int type, __be32 id, __be32 base) @@ -2207,24 +2220,15 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) goto out_fw; } - reg = 0; - list_for_each_entry(alg_region, - &dsp->alg_regions, list) { - if (le32_to_cpu(blk->id) == alg_region->alg && - type == alg_region->type) { - reg = alg_region->base; - reg = wm_adsp_region_to_reg(mem, - reg); - reg += offset; - break; - } - } - - if (reg == 0) { + alg_region = wm_adsp_find_alg_region(dsp, type, + le32_to_cpu(blk->id)); + if (alg_region) { + reg = alg_region->base; + reg = wm_adsp_region_to_reg(mem, reg); + reg += offset; + } else { adsp_err(dsp, "No %x for algorithm %x\n", type, le32_to_cpu(blk->id)); - ret = -EINVAL; - goto out_fw; } break; From d5a5babc9a54b2b023f9832f0acc56e0ea975ad4 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 3 Dec 2015 16:53:36 +0000 Subject: [PATCH 1060/1167] ASoC: wm_adsp: Switch to upstream version of host buffer initialization Replace the code that fetches the host buffer pointer with the upstream implementation. Change-Id: I16f7272f8242ea08c339bf9feb85917b51bc9d37 Signed-off-by: Charles Keepax Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 79 ++++++++++++++++++++++---------------- 1 file changed, 46 insertions(+), 33 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index b7e2a49b167..9138c460495 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3261,6 +3261,45 @@ static inline int wm_adsp_host_buffer_write(struct wm_adsp_compr_buf *buf, data); } +static int wm_adsp_buffer_locate(struct wm_adsp_compr_buf *buf) +{ + struct wm_adsp_alg_region *alg_region; + struct wm_adsp *dsp = buf->dsp; + u32 xmalg, addr, magic; + int i, ret; + + alg_region = wm_adsp_find_alg_region(dsp, WMFW_ADSP2_XM, dsp->fw_id); + xmalg = sizeof(struct wm_adsp_system_config_xm_hdr) / sizeof(__be32); + + addr = alg_region->base + xmalg + ALG_XM_FIELD(magic); + ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, addr, &magic); + if (ret < 0) + return ret; + + if (magic != WM_ADSP_ALG_XM_STRUCT_MAGIC) + return -EINVAL; + + addr = alg_region->base + xmalg + ALG_XM_FIELD(host_buf_ptr); + for (i = 0; i < 5; ++i) { + ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, addr, + &buf->host_buf_ptr); + if (ret < 0) + return ret; + + if (buf->host_buf_ptr) + break; + + msleep(10); + } + + if (!buf->host_buf_ptr) + return -EIO; + + adsp_dbg(dsp, "host_buf_ptr=%x\n", buf->host_buf_ptr); + + return 0; +} + static int wm_adsp_populate_buffer_regions(struct wm_adsp_compr_buf *buf) { int i, ret; @@ -3313,23 +3352,7 @@ static int wm_adsp_populate_buffer_regions(struct wm_adsp_compr_buf *buf) static int wm_adsp_init_host_buf_info(struct wm_adsp_compr_buf *buf) { - u32 xm_base, magic; - int i, ret; - - ret = wm_adsp_read_data_word(buf->dsp, WMFW_ADSP2_XM, - ADSP2_SYSTEM_CONFIG_XM_PTR, &xm_base); - if (ret < 0) - return ret; - - ret = wm_adsp_read_data_word(buf->dsp, WMFW_ADSP2_XM, - xm_base + WM_ADSP_ALG_XM_PTR + - ALG_XM_FIELD(magic), - &magic); - if (ret < 0) - return ret; - - if (magic != WM_ADSP_ALG_XM_STRUCT_MAGIC) - return -EINVAL; + int ret; mutex_lock(&buf->lock); @@ -3338,26 +3361,16 @@ static int wm_adsp_init_host_buf_info(struct wm_adsp_compr_buf *buf) buf->error = 0; buf->avail = 0; - for (i = 0; i < 5; ++i) { - ret = wm_adsp_read_data_word(buf->dsp, WMFW_ADSP2_XM, - xm_base + WM_ADSP_ALG_XM_PTR + - ALG_XM_FIELD(host_buf_ptr), - &buf->host_buf_ptr); - if (ret < 0) - goto out; - - if (buf->host_buf_ptr) - break; - - msleep(1); - } - - if (!buf->host_buf_ptr) { - ret = -EIO; + ret = wm_adsp_buffer_locate(buf); + if (ret < 0) { + adsp_err(buf->dsp, "Failed to acquire host buffer: %d\n", ret); goto out; } ret = wm_adsp_populate_buffer_regions(buf); + if (ret < 0) + adsp_err(buf->dsp, "Failed to populate host buffer: %d\n", ret); + out: mutex_unlock(&buf->lock); From c21076ed715a1d33fc1c7d84c117d0afd0e90a75 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 16 Dec 2015 17:13:05 +0000 Subject: [PATCH 1061/1167] ASoC: wm_adsp: Remove unnecessary roundup in compressed stream wm_adsp_compr_check_params enforces that the fragment size is a multiple of the DSP word size so there's no need to round up the division when calculating the IRQ watermark. Change-Id: Iaaccc2064aa630498d6079c28f344962a6819996 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 9138c460495..0c952ac5752 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3141,8 +3141,8 @@ static int wm_adsp_streambuf_alloc(struct wm_adsp_compr *compr, return -ENOMEM; } - compr->irq_watermark = DIV_ROUND_UP(params->buffer.fragment_size, - WM_ADSP_DATA_WORD_SIZE); + compr->irq_watermark = params->buffer.fragment_size / + WM_ADSP_DATA_WORD_SIZE; return 0; } From cdee17e88636b71b9ec214d4407e1a0bb7a8d6dc Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 18 Jan 2016 13:35:38 +0000 Subject: [PATCH 1062/1167] ASoC: wm5102: Add support for the debug firmware Change-Id: I2bc249e18e7771024642a1d6a0b0a825b0a14c07 Signed-off-by: Charles Keepax Signed-off-by: Simon Trimmer --- sound/soc/codecs/wm5102.c | 170 +++++++++++++++++++++++++++++++++++-- sound/soc/codecs/wm_adsp.c | 1 + 2 files changed, 165 insertions(+), 6 deletions(-) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 175c66c743e..7b145931da8 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -33,13 +33,36 @@ #include "wm5102.h" #include "wm_adsp.h" +#define WM5102_NUM_ADSP 1 + +/* Number of compressed DAI hookups, each pair of DSP and dummy CPU +* are counted as one DAI +*/ +#define WM5102_NUM_COMPR_DAI 1 + +struct wm5102_compr { + struct wm_adsp_compr adsp_compr; + const char *dai_name; +}; + struct wm5102_priv { struct arizona_priv core; struct arizona_fll fll[2]; + struct wm5102_compr compr_info[WM5102_NUM_COMPR_DAI]; struct mutex fw_lock; }; +static const struct { + const char *dai_name; + int adsp_num; +} compr_dai_mapping[WM5102_NUM_COMPR_DAI] = { + { + .dai_name = "wm5102-dsp-trace", + .adsp_num = 0, + }, +}; + static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); @@ -1635,6 +1658,11 @@ static const struct snd_soc_dapm_route wm5102_dapm_routes[] = { { "Slim2 Capture", NULL, "SYSCLK" }, { "Slim3 Capture", NULL, "SYSCLK" }, + { "Trace CPU", NULL, "Trace DSP" }, + { "Trace DSP", NULL, "DSP1" }, + { "Trace CPU", NULL, "SYSCLK" }, + { "Trace DSP", NULL, "SYSCLK" }, + { "IN1L PGA", NULL, "IN1L" }, { "IN1R PGA", NULL, "IN1R" }, @@ -1901,19 +1929,82 @@ static struct snd_soc_dai_driver wm5102_dai[] = { }, .ops = &arizona_simple_dai_ops, }, + { + .name = "wm5102-cpu-trace", + .capture = { + .stream_name = "Trace CPU", + .channels_min = 1, + .channels_max = 4, + .rates = WM5102_RATES, + .formats = WM5102_FORMATS, + }, + .compress_dai = 1, + }, + { + .name = "wm5102-dsp-trace", + .capture = { + .stream_name = "Trace DSP", + .channels_min = 1, + .channels_max = 4, + .rates = WM5102_RATES, + .formats = WM5102_FORMATS, + }, + }, }; -static irqreturn_t adsp2_irq(int irq, void *data) +static irqreturn_t wm5102_adsp2_irq(int irq, void *data) { struct wm5102_priv *wm5102 = data; + int i; - if (wm5102->core.arizona->pdata.ez2ctrl_trigger && - wm_adsp_fw_has_voice_trig(&wm5102->core.adsp[0])) - wm5102->core.arizona->pdata.ez2ctrl_trigger(); + for (i = 0; i < ARRAY_SIZE(wm5102->compr_info); ++i) { + if (!wm5102->compr_info[i].adsp_compr.dsp->running) + continue; + + wm_adsp_compr_irq(&wm5102->compr_info[i].adsp_compr, NULL); + } return IRQ_HANDLED; } +static struct wm5102_compr *wm5102_get_compr(struct snd_soc_pcm_runtime *rtd, + struct wm5102_priv *wm5102) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(wm5102->compr_info); ++i) { + if (strcmp(rtd->codec_dai->name, + wm5102->compr_info[i].dai_name) == 0) + return &wm5102->compr_info[i]; + } + + return NULL; +} + +static int wm5102_compr_open(struct snd_compr_stream *stream) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct wm5102_priv *wm5102 = snd_soc_codec_get_drvdata(rtd->codec); + struct arizona *arizona = wm5102->core.arizona; + struct wm5102_compr *compr; + + /* Find a compr_info for this DAI */ + compr = wm5102_get_compr(rtd, wm5102); + if (!compr) { + dev_err(arizona->dev, + "No suitable compressed stream for dai '%s'\n", + rtd->codec_dai->name); + return -EINVAL; + } + + return wm_adsp_compr_open(&compr->adsp_compr, stream); +} + +static int wm5102_compr_trigger(struct snd_compr_stream *stream, int cmd) +{ + return wm_adsp_compr_trigger(stream, cmd); +} + static int wm5102_codec_probe(struct snd_soc_codec *codec) { struct wm5102_priv *priv = snd_soc_codec_get_drvdata(codec); @@ -1942,7 +2033,7 @@ static int wm5102_codec_probe(struct snd_soc_codec *codec) priv->core.arizona->dapm = &codec->dapm; ret = arizona_request_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, - "ADSP2 interrupt 1", adsp2_irq, priv); + "ADSP2 interrupt 1", wm5102_adsp2_irq, priv); if (ret != 0) { dev_err(arizona->dev, "Failed to request DSP IRQ: %d\n", ret); return ret; @@ -2016,6 +2107,44 @@ static struct snd_soc_codec_driver soc_codec_dev_wm5102 = { .num_dapm_routes = ARRAY_SIZE(wm5102_dapm_routes), }; +static struct snd_compr_ops wm5102_compr_ops = { + .open = wm5102_compr_open, + .free = wm_adsp_compr_free, + .set_params = wm_adsp_compr_set_params, + .trigger = wm5102_compr_trigger, + .pointer = wm_adsp_compr_pointer, + .copy = wm_adsp_compr_copy, + .get_caps = wm_adsp_compr_get_caps, +}; + +static struct snd_soc_platform_driver wm5102_compr_platform = { + .compr_ops = &wm5102_compr_ops, +}; + +static void wm5102_init_compr_info(struct wm5102_priv *wm5102) +{ + struct wm_adsp *dsp; + int i; + + BUILD_BUG_ON(ARRAY_SIZE(wm5102->compr_info) != + ARRAY_SIZE(compr_dai_mapping)); + + for (i = 0; i < ARRAY_SIZE(wm5102->compr_info); ++i) { + wm5102->compr_info[i].dai_name = compr_dai_mapping[i].dai_name; + + dsp = &wm5102->core.adsp[compr_dai_mapping[i].adsp_num], + wm_adsp_compr_init(dsp, &wm5102->compr_info[i].adsp_compr); + } +} + +static void wm5102_destroy_compr_info(struct wm5102_priv *wm5102) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(wm5102->compr_info); ++i) + wm_adsp_compr_destroy(&wm5102->compr_info[i].adsp_compr); +} + static int wm5102_probe(struct platform_device *pdev) { struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); @@ -2060,6 +2189,8 @@ static int wm5102_probe(struct platform_device *pdev) if (ret != 0) return ret; + wm5102_init_compr_info(wm5102); + for (i = 0; i < ARRAY_SIZE(wm5102->fll); i++) wm5102->fll[i].vco_mult = 1; @@ -2081,15 +2212,42 @@ static int wm5102_probe(struct platform_device *pdev) pm_runtime_enable(&pdev->dev); pm_runtime_idle(&pdev->dev); - return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_wm5102, + ret = snd_soc_register_platform(&pdev->dev, &wm5102_compr_platform); + if (ret < 0) { + dev_err(&pdev->dev, + "Failed to register platform: %d\n", + ret); + goto error; + } + + ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_wm5102, wm5102_dai, ARRAY_SIZE(wm5102_dai)); + if (ret < 0) { + dev_err(&pdev->dev, + "Failed to register codec: %d\n", + ret); + snd_soc_unregister_platform(&pdev->dev); + goto error; + } + + return ret; + +error: + wm5102_destroy_compr_info(wm5102); + mutex_destroy(&wm5102->fw_lock); + + return ret; } static int wm5102_remove(struct platform_device *pdev) { + struct wm5102_priv *wm5102 = platform_get_drvdata(pdev); + snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); + wm5102_destroy_compr_info(wm5102); + return 0; } diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 0c952ac5752..f5ca6b14aac 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2308,6 +2308,7 @@ static int wm_adsp_get_features(struct wm_adsp *dsp) dsp->fw_features.host_read_buf = true; break; case 0x4001e: + case 0x5001e: case 0x6001e: case 0x7001e: case 0x8001e: From 66d74a8b9dba93093e53fec1a0bdb4826d90f8bd Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 29 Jan 2016 14:40:18 +0000 Subject: [PATCH 1063/1167] input: arizona-haptics: Don't hold DAPM mutex round snd_soc_dapm_sync The DAPM mutex only has to be held around snd_soc_dapm_{en|dis}able_pin. The snd_soc_dapm_sync() takes the DAPM mutex internally so calling it while holding the mutex caused a deadlock. Change-Id: I64a300c2149d0c95b8869b9a724fca3f6ac2c6ee Signed-off-by: Richard Fitzgerald --- drivers/input/misc/arizona-haptics.c | 15 ++++----------- 1 file changed, 4 insertions(+), 11 deletions(-) diff --git a/drivers/input/misc/arizona-haptics.c b/drivers/input/misc/arizona-haptics.c index 1d0328b586d..36e7de81e91 100644 --- a/drivers/input/misc/arizona-haptics.c +++ b/drivers/input/misc/arizona-haptics.c @@ -70,12 +70,12 @@ static void arizona_haptics_work(struct work_struct *work) } mutex_lock_nested(dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); - ret = snd_soc_dapm_enable_pin(arizona->dapm, "HAPTICS"); + mutex_unlock(dapm_mutex); + if (ret != 0) { dev_err(arizona->dev, "Failed to start HAPTICS: %d\n", ret); - mutex_unlock(dapm_mutex); return; } @@ -83,21 +83,17 @@ static void arizona_haptics_work(struct work_struct *work) if (ret != 0) { dev_err(arizona->dev, "Failed to sync DAPM: %d\n", ret); - mutex_unlock(dapm_mutex); return; } - - mutex_unlock(dapm_mutex); - } else { /* This disable sequence will be a noop if already enabled */ mutex_lock_nested(dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); - ret = snd_soc_dapm_disable_pin(arizona->dapm, "HAPTICS"); + mutex_unlock(dapm_mutex); + if (ret != 0) { dev_err(arizona->dev, "Failed to disable HAPTICS: %d\n", ret); - mutex_unlock(dapm_mutex); return; } @@ -105,12 +101,9 @@ static void arizona_haptics_work(struct work_struct *work) if (ret != 0) { dev_err(arizona->dev, "Failed to sync DAPM: %d\n", ret); - mutex_unlock(dapm_mutex); return; } - mutex_unlock(dapm_mutex); - ret = regmap_update_bits(arizona->regmap, ARIZONA_HAPTICS_CONTROL_1, ARIZONA_HAP_CTRL_MASK, 0); From 5e8adfb5a27f7959e70b2ab0b48da596adef40ee Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 2 Feb 2016 13:04:08 +0000 Subject: [PATCH 1064/1167] ASoC: wm_adsp: Return sample rate in wm_adsp_compr_pointer With verbose mode enabled crec will blindly attempt to use the sample rate provided by the pointer callback. Update wm_adsp_compr_pointer to return a valid sample rate to avoid a division by zero. Change-Id: I7836371f38bd2f504b348f9645b82a0429634197 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 4 ++++ sound/soc/codecs/wm_adsp.h | 2 ++ 2 files changed, 6 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index f5ca6b14aac..9a468a68b82 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3063,6 +3063,7 @@ int wm_adsp_compr_free(struct snd_compr_stream *stream) } compr->copied_total = 0; + compr->sample_rate = 0; stream->runtime->private_data = NULL; @@ -3160,6 +3161,8 @@ int wm_adsp_compr_set_params(struct snd_compr_stream *stream, ret = wm_adsp_streambuf_alloc(compr, params); + compr->sample_rate = params->codec.sample_rate; + return ret; } EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params); @@ -3626,6 +3629,7 @@ int wm_adsp_compr_pointer(struct snd_compr_stream *stream, tstamp->copied_total = compr->copied_total; tstamp->copied_total += buf->avail * WM_ADSP_DATA_WORD_SIZE; + tstamp->sampling_rate = compr->sample_rate; adsp_dbg(compr->dsp, "tstamp->copied_total=%d (avail=%d)\n", tstamp->copied_total, buf->avail); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 7a1b1eaa480..b91f078e80e 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -109,6 +109,8 @@ struct wm_adsp_compr { size_t copied_total; struct snd_compr_stream *stream; + + unsigned int sample_rate; }; struct wm_adsp { From b6911492121d3bede1044cdb363adc17d044affc Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 2 Feb 2016 16:12:29 +0000 Subject: [PATCH 1065/1167] Revert "ASoC: arizona: cache the fll configuration" This reverts commit e04abe46ad10b1f801b5ce435aa693058fe188e0. The reverted patch was supposed to cache the last calculated FLL settings and re-use them next time the FLL is enabled if the FLL configuration hasn't changed. Unfortunately it was selecting the previously cached settings even if the FLL configuration had been changed. The original patch wasn't necessary because the calculation time is insignificant compared to the SPI writes, and regmap already skips writing a register if its value hasn't changed. So reverting the patch is better than fixing it since it reduces code complexity. Change-Id: I4a8db322df322ee88ff9a12594987fc5ba6a90b0 Signed-off-by: Richard Fitzgerald Signed-off-by: Simon Trimmer --- sound/soc/codecs/arizona.c | 44 ++++++++++++++++---------------------- sound/soc/codecs/arizona.h | 2 +- 2 files changed, 19 insertions(+), 27 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index b3792f8258d..a9169a97a1f 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -4445,14 +4445,8 @@ static int arizona_calc_fll(struct arizona_fll *fll, arizona_fll_dbg(fll, "fin=%u fout=%u\n", fin, fll->fout); - cfg->outdiv = fll->outdiv; - - if (cfg->fin == fin && cfg->fvco == fll->fvco) { - /* use the pre-computed fll configuration */ - return 0; - } - fvco = fll->fvco; + cfg->outdiv = fll->outdiv; arizona_fll_dbg(fll, "fvco=%dHz\n", fvco); @@ -4523,9 +4517,6 @@ static int arizona_calc_fll(struct arizona_fll *fll, break; } - cfg->fin = fin; - cfg->fvco = fll->fvco; - arizona_fll_dbg(fll, "N=%x THETA=%x LAMBDA=%x\n", cfg->n, cfg->theta, cfg->lambda); arizona_fll_dbg(fll, "FRATIO=%x(%d) OUTDIV=%x REFCLK_DIV=%x\n", @@ -4645,8 +4636,7 @@ static int arizona_enable_fll(struct arizona_fll *fll) struct arizona *arizona = fll->arizona; bool use_sync = false; int already_enabled = arizona_is_enabled_fll(fll); - struct arizona_fll_cfg *ref_cfg = &(fll->ref_cfg); - struct arizona_fll_cfg *sync_cfg = &(fll->sync_cfg); + struct arizona_fll_cfg cfg; bool fll_change, change; unsigned int fsync_freq; int gain; @@ -4672,22 +4662,24 @@ static int arizona_enable_fll(struct arizona_fll *fll) */ if (fll->ref_src >= 0 && fll->ref_freq && fll->ref_src != fll->sync_src) { - arizona_calc_fll(fll, ref_cfg, fll->ref_freq, false); + arizona_calc_fll(fll, &cfg, fll->ref_freq, false); - fll_change = arizona_apply_fll(arizona, fll->base, ref_cfg, fll->ref_src, - ref_cfg->gain, false); + fll_change = arizona_apply_fll(arizona, fll->base, &cfg, + fll->ref_src, + cfg.gain, false); if (fll->sync_src >= 0) { - arizona_calc_fll(fll, sync_cfg, fll->sync_freq, true); - fsync_freq = fll->sync_freq / (1 << sync_cfg->refdiv); - fll_change |= arizona_apply_fll(arizona, fll->base + fll->sync_offset, - sync_cfg, fll->sync_src, - sync_cfg->gain, true); + arizona_calc_fll(fll, &cfg, fll->sync_freq, true); + fsync_freq = fll->sync_freq / (1 << cfg.refdiv); + fll_change |= arizona_apply_fll(arizona, + fll->base + fll->sync_offset, + &cfg, fll->sync_src, + cfg.gain, true); use_sync = true; } } else if (fll->sync_src >= 0) { - arizona_calc_fll(fll, ref_cfg, fll->sync_freq, false); + arizona_calc_fll(fll, &cfg, fll->sync_freq, false); - gain = ref_cfg->gain; + gain = cfg.gain; switch (fll->arizona->type) { case WM5102: @@ -4703,12 +4695,12 @@ static int arizona_enable_fll(struct arizona_fll *fll) case CS47L35: break; default: - if (ref_cfg->theta == 0) - gain = ref_cfg->intg_gain; + if (cfg.theta == 0) + gain = cfg.intg_gain; break; } - fll_change = arizona_apply_fll(arizona, fll->base, ref_cfg, + fll_change = arizona_apply_fll(arizona, fll->base, &cfg, fll->sync_src, gain, false); regmap_update_bits(arizona->regmap, fll->base + @@ -4750,7 +4742,7 @@ static int arizona_enable_fll(struct arizona_fll *fll) break; /* for rev A1 fall through */ default: - if ((!use_sync) && (ref_cfg->theta == 0)) + if ((!use_sync) && (cfg.theta == 0)) regmap_update_bits_check(arizona->regmap, fll->base + 0xA, ARIZONA_FLL1_PHASE_ENA_MASK | diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index c9bbce9f38c..556174c0b93 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -430,8 +430,8 @@ struct arizona_fll { unsigned int sync_freq; int ref_src; unsigned int ref_freq; + struct arizona_fll_cfg ref_cfg; - struct arizona_fll_cfg sync_cfg; }; extern int arizona_dvfs_up(struct snd_soc_codec *codec, unsigned int flags); From 1ad99f184abc3b399372d495fca1dc2ea6de7b0d Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 2 Feb 2016 13:45:59 +0000 Subject: [PATCH 1066/1167] ASoC: arizona: fref must be limited in pseudo-fractional mode When the FLL is in pseudo-fractional mode there is an additional limit on fref based on the fratio, to prevent aliasing around the Nyquist frequency. If fref exceeds this limit the refclk divider must be increased and the calculation tried again until a suitable combination of fref and fratio is found or we have to fall back to integer mode. This patch also adds some debug log prints around this code. Change-Id: Ia6a17b847423c7908ec2b83436f37ea31e52a0c4 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 43 +++++++++++++++++++++++++++++++++++++- 1 file changed, 42 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index a9169a97a1f..170cac4c7bb 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -4241,6 +4241,25 @@ static struct { { 1000000, 13500000, 0, 1 }, }; +static const unsigned int pseudo_fref_max[ARIZONA_FLL_MAX_FRATIO] = { + 13500000, + 6144000, + 6144000, + 3072000, + 3072000, + 2822400, + 2822400, + 1536000, + 1536000, + 1536000, + 1536000, + 1536000, + 1536000, + 1536000, + 1536000, + 768000, +}; + struct arizona_fll_gain { unsigned int min; unsigned int max; @@ -4401,16 +4420,32 @@ static int arizona_calc_fratio(struct arizona_fll *fll, /* Adjust FRATIO/refdiv to avoid integer mode if possible */ refdiv = cfg->refdiv; + arizona_fll_dbg(fll, "pseudo: initial ratio=%u fref=%u refdiv=%u\n", + init_ratio, fref, refdiv); + while (div <= ARIZONA_FLL_MAX_REFDIV) { for (ratio = init_ratio; ratio <= ARIZONA_FLL_MAX_FRATIO; ratio++) { if ((ARIZONA_FLL_VCO_CORNER / 2) / - (fll->vco_mult * ratio) < fref) + (fll->vco_mult * ratio) < fref) { + arizona_fll_dbg(fll, "pseudo: hit VCO corner\n"); break; + } + + if (fref > pseudo_fref_max[ratio - 1]) { + arizona_fll_dbg(fll, + "pseudo: exceeded max fref(%u) for ratio=%u\n", + pseudo_fref_max[ratio - 1], + ratio); + break; + } if (fvco % (ratio * fref)) { cfg->refdiv = refdiv; cfg->fratio = ratio - 1; + arizona_fll_dbg(fll, + "pseudo: found fref=%u refdiv=%d(%d) ratio=%d\n", + fref, refdiv, div, ratio); return ratio; } } @@ -4419,6 +4454,9 @@ static int arizona_calc_fratio(struct arizona_fll *fll, if (fvco % (ratio * fref)) { cfg->refdiv = refdiv; cfg->fratio = ratio - 1; + arizona_fll_dbg(fll, + "pseudo: found fref=%u refdiv=%d(%d) ratio=%d\n", + fref, refdiv, div, ratio); return ratio; } } @@ -4427,6 +4465,9 @@ static int arizona_calc_fratio(struct arizona_fll *fll, fref /= 2; refdiv++; init_ratio = arizona_find_fratio(fll, fref, fvco, NULL, sync); + arizona_fll_dbg(fll, + "pseudo: change fref=%u refdiv=%d(%d) ratio=%u\n", + fref, refdiv, div, init_ratio); } arizona_fll_warn(fll, "Falling back to integer mode operation\n"); From 6c200ffef38be8da6f199bb06165d5bc13335576 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 5 Feb 2016 15:03:03 +0000 Subject: [PATCH 1067/1167] ASoC: arizona: Make logging of FLL calculations clearer The debug logging of FLL calculations was confusing. Values were printed in hex without indicating this by a leading 0x, and despite these normally being required in decimal. Also where the register value isn't the actual value (it s a power-of-two or 0 means 1, 1 means 2, ...) it was unclear whether the actual or register value was shown. This patch changes the log print so that all mathematical values are shown in decimal, all register values are shown in hex with a 0x prefix, and where the register value isn't the actual integer value the decimal integer value is shown in () after the hex register value. Change-Id: I289f03ae17790dfee2425a76583c4b1057a1609d Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 170cac4c7bb..7560ae1b25a 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -4558,11 +4558,12 @@ static int arizona_calc_fll(struct arizona_fll *fll, break; } - arizona_fll_dbg(fll, "N=%x THETA=%x LAMBDA=%x\n", + arizona_fll_dbg(fll, "N=%d THETA=%d LAMBDA=%d\n", cfg->n, cfg->theta, cfg->lambda); - arizona_fll_dbg(fll, "FRATIO=%x(%d) OUTDIV=%x REFCLK_DIV=%x\n", - cfg->fratio, cfg->fratio, cfg->outdiv, cfg->refdiv); - arizona_fll_dbg(fll, "GAIN=%d\n", cfg->gain); + arizona_fll_dbg(fll, "FRATIO=0x%x(%d) OUTDIV=%d REFCLK_DIV=0x%x(%d)\n", + cfg->fratio, ratio, cfg->outdiv, + cfg->refdiv, 1 << cfg->refdiv); + arizona_fll_dbg(fll, "GAIN=0x%x(%d)\n", cfg->gain, 1 << cfg->gain); return 0; From c5166a5e465a9f408f14890f77625d60d4c343cf Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Fri, 5 Feb 2016 09:31:03 +0000 Subject: [PATCH 1068/1167] ASoC: marley: don't change EP_SEL while OUT1 is enabled The EP_SEL bit should not be changed while the HP or EP drivers are enabled. Hence the put for the demux control is refactored to ensure OUT1L/R_ENA is set to 0 before the demux setting is applied, and subsequently restored to an 'enabled' state, if needed. Change-Id: I55292b847e6ae6ff7d92dd0514976dd8d19585bc Signed-off-by: Piotr Stankiewicz --- sound/soc/codecs/marley.c | 114 ++++++++++++++++++++++---------------- 1 file changed, 66 insertions(+), 48 deletions(-) diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index fe5ea4a18f3..b87e59940fd 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -235,7 +235,8 @@ static int marley_put_demux(struct snd_kcontrol *kcontrol, struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; unsigned int ep_sel, mux, change; unsigned int mask; - int ret; + int ret, demux_change_ret; + bool restore_out = true; if (ucontrol->value.enumerated.item[0] > e->max - 1) return -EINVAL; @@ -246,60 +247,77 @@ static int marley_put_demux(struct snd_kcontrol *kcontrol, mutex_lock_nested(&card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); change = snd_soc_test_bits(codec, e->reg, mask, ep_sel); - if (change) { - /* if HP detection clamp is applied while switching to HPOUT - * disable OUT1 and set EDRE Manual */ - if (!ep_sel && (arizona->hpdet_clamp || (arizona->hp_impedance - <= arizona->pdata.hpdet_short_circuit_imp))) { - ret = regmap_update_bits(arizona->regmap, - ARIZONA_OUTPUT_ENABLES_1, - ARIZONA_OUT1L_ENA | - ARIZONA_OUT1R_ENA, 0); - if (ret) - dev_warn(arizona->dev, - "Failed to disable headphone outputs" - ": %d\n", ret); - } - if (!ep_sel && arizona->hpdet_clamp) { - ret = regmap_write(arizona->regmap, - CLEARWATER_EDRE_MANUAL, 0x3); - if (ret) - dev_warn(arizona->dev, - "Failed to set EDRE Manual: %d\n", - ret); - } + /* if no change is required, skip */ + if (!change) + goto end; + + /* EP_SEL should not be modified while HP or EP driver is enabled + */ + ret = regmap_update_bits(arizona->regmap, + ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT1L_ENA | + ARIZONA_OUT1R_ENA, 0); + if (ret) + dev_warn(arizona->dev, + "Failed to disable outputs: %d\n", ret); + + usleep_range(2000, 3000); /* wait for wseq to complete */ + + /* [1] if HP detection clamp is applied while switching to HPOUT, OUT1 + * should remain disabled and EDRE should be set to Manual + */ + if (!ep_sel && (arizona->hpdet_clamp || (arizona->hp_impedance + <= arizona->pdata.hpdet_short_circuit_imp))) + restore_out = false; + if (!ep_sel && arizona->hpdet_clamp) { + ret = regmap_write(arizona->regmap, CLEARWATER_EDRE_MANUAL, + 0x3); + if (ret) + dev_warn(arizona->dev, + "Failed to set EDRE Manual: %d\n", ret); + } + + /* change demux setting */ + demux_change_ret = regmap_update_bits(arizona->regmap, + ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_EP_SEL, ep_sel); + if (demux_change_ret) + dev_err(arizona->dev, "Failed to set EP_SEL: %d\n", + demux_change_ret); + + /* restore outputs to the desired state, or keep them disabled provided + * condition [1] arose + */ + if (restore_out) { ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, - ARIZONA_EP_SEL, ep_sel); - if (ret) - dev_err(arizona->dev, "Failed to set OUT1 demux: %d\n", - ret); - - /* provided the switch back to EPOUT succeeded make sure OUT1 - * is restored to a desired value (retained by arizona->hp_ena) - * and EDRE Manual is set to the proper value - * */ - if (ep_sel && !ret) { - ret = regmap_update_bits(arizona->regmap, - ARIZONA_OUTPUT_ENABLES_1, - ARIZONA_OUT1L_ENA | - ARIZONA_OUT1R_ENA, - arizona->hp_ena); - if (ret) - dev_warn(arizona->dev, - "Failed to restore earpiece outputs:" - " %d\n", ret); - ret = regmap_write(arizona->regmap, - CLEARWATER_EDRE_MANUAL, 0); - if (ret) - dev_warn(arizona->dev, - "Failed to restore EDRE Manual: %d\n", - ret); + ARIZONA_OUT1L_ENA | + ARIZONA_OUT1R_ENA, + arizona->hp_ena); + if (ret) { + dev_warn(arizona->dev, + "Failed to restore outputs: %d\n", ret); + } else { + /* wait for wseq */ + if (arizona->hp_ena) + msleep(34); /* enable delay */ + else + usleep_range(2000, 3000); /* disable delay */ } + } + /* provided a switch to EPOUT occured and succeded, set EDRE Manual + * to the proper value + */ + if (ep_sel && !demux_change_ret) { + ret = regmap_write(arizona->regmap, CLEARWATER_EDRE_MANUAL, 0); + if (ret) + dev_warn(arizona->dev, + "Failed to restore EDRE Manual: %d\n", ret); } +end: mutex_unlock(&card->dapm_mutex); return snd_soc_dapm_put_enum_virt(kcontrol, ucontrol); From 046aac0a1438470b18f91105a05dc9f8b702d647 Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Tue, 2 Feb 2016 14:40:51 +0000 Subject: [PATCH 1069/1167] ASoC: marley: set output mode to mono when swiching to EP Output path config needs to be set to mono when using an earpiece. Change-Id: Ib5e75afd4f174425f77aa7855c1220a5025698ea Signed-off-by: Piotr Stankiewicz --- sound/soc/codecs/marley.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index b87e59940fd..0cf4cf7b21a 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -236,7 +236,7 @@ static int marley_put_demux(struct snd_kcontrol *kcontrol, unsigned int ep_sel, mux, change; unsigned int mask; int ret, demux_change_ret; - bool restore_out = true; + bool restore_out = true, out_mono; if (ucontrol->value.enumerated.item[0] > e->max - 1) return -EINVAL; @@ -251,7 +251,8 @@ static int marley_put_demux(struct snd_kcontrol *kcontrol, if (!change) goto end; - /* EP_SEL should not be modified while HP or EP driver is enabled + /* EP_SEL and OUT1_MONO should not be modified while HP or EP driver + * is enabled */ ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, @@ -282,9 +283,23 @@ static int marley_put_demux(struct snd_kcontrol *kcontrol, demux_change_ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, ARIZONA_EP_SEL, ep_sel); - if (demux_change_ret) + if (demux_change_ret) { dev_err(arizona->dev, "Failed to set EP_SEL: %d\n", demux_change_ret); + } else { /* provided the switch to HP/EP was successful, update output + mode accordingly */ + /* when switching to stereo headphone */ + if (!ep_sel && !arizona->pdata.out_mono[0]) + out_mono = false; + /* when switching to mono headphone, or any earpiece */ + else + out_mono = true; + + ret = arizona_set_output_mode(codec, 1, out_mono); + if (ret < 0) + dev_warn(arizona->dev, + "Failed to set output mode: %d\n", ret); + } /* restore outputs to the desired state, or keep them disabled provided * condition [1] arose From 1b7c93a41f3b328911c64bfd80debc0d2bace444 Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Thu, 11 Feb 2016 13:29:51 +0000 Subject: [PATCH 1070/1167] mfd: arizona: configure in-mode on Marley same as on Vegas In-mode on Marley should be configured analogously to Vegas, i.e. it should be configured per-input, rather than per-channel, to avoid erroneous configurations in cases where an analogue and digital mic are muxed on the same input. Change-Id: If0f1cc04647471392b1eb4edeb383cc838c48a79 Signed-off-by: Piotr Stankiewicz --- drivers/mfd/arizona-core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 65f8728a9dc..6d458ca63ee 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -2131,6 +2131,7 @@ int arizona_dev_init(struct arizona *arizona) break; case WM8998: case WM1814: + case CS47L35: val = arizona->pdata.dmic_ref[i] << ARIZONA_IN1_DMIC_SUP_SHIFT; val |= (arizona->pdata.inmode[i] & 2) From abd591b51df445aa7e48e360bda14ed9bf469e1f Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Thu, 11 Feb 2016 13:39:28 +0000 Subject: [PATCH 1071/1167] ASoC: marley: adding a custom put for IN1 mux Cases where an analogue and digital mic are muxed to the same input need to be handled analogously as on Vegas. Change-Id: I595b9005880131adfc56ab890531a93bc82e3fa8 Signed-off-by: Piotr Stankiewicz Signed-off-by: Simon Trimmer --- sound/soc/codecs/marley.c | 87 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 85 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index 0cf4cf7b21a..4bec125219e 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -204,6 +204,87 @@ static const char * const marley_inmux_texts[] = { "B", }; +static int marley_in1mux_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol); + struct snd_soc_dapm_widget *widget = wlist->widgets[0]; + struct snd_soc_codec *codec = widget->codec; + struct marley_priv *marley = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = marley->core.arizona; + struct soc_enum *e = (struct soc_enum *) kcontrol->private_value; + unsigned int mux, inmode; + unsigned int mode_val, src_val; + bool changed = false; + int ret; + + mux = ucontrol->value.enumerated.item[0]; + if (mux > 1) + return -EINVAL; + + /* L and R registers have same shift and mask */ + inmode = arizona->pdata.inmode[2 * mux]; + src_val = mux << ARIZONA_IN1L_SRC_SHIFT; + if (inmode & ARIZONA_INMODE_SE) + src_val |= 1 << ARIZONA_IN1L_SRC_SE_SHIFT; + + switch (arizona->pdata.inmode[0]) { + case ARIZONA_INMODE_DMIC: + if (mux) + mode_val = 0; /* B always analogue */ + else + mode_val = 1 << ARIZONA_IN1_MODE_SHIFT; + + ret = snd_soc_update_bits(codec, ARIZONA_IN1L_CONTROL, + ARIZONA_IN1_MODE_MASK, + mode_val); + if (ret < 0) + return ret; + else if (ret) + changed = true; + + /* IN1A is digital so L and R must change together */ + /* src_val setting same for both registers */ + + ret = snd_soc_update_bits(codec, ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_SRC_MASK | + ARIZONA_IN1L_SRC_SE_MASK, + src_val); + if (ret < 0) + return ret; + else if (ret) + changed = true; + + ret = snd_soc_update_bits(codec, ARIZONA_ADC_DIGITAL_VOLUME_1R, + ARIZONA_IN1R_SRC_MASK | + ARIZONA_IN1R_SRC_SE_MASK, + src_val); + + if (ret < 0) + return ret; + else if (ret) + changed = true; + break; + default: + /* both analogue */ + ret = snd_soc_update_bits(codec, e->reg, + ARIZONA_IN1L_SRC_MASK | + ARIZONA_IN1L_SRC_SE_MASK, + src_val); + if (ret < 0) + return ret; + else if (ret) + changed = true; + break; + } + + if (changed) + return snd_soc_dapm_mux_update_power(widget, kcontrol, + mux, e); + else + return 0; +} + static const SOC_ENUM_SINGLE_DECL(marley_in1muxl_enum, ARIZONA_ADC_DIGITAL_VOLUME_1L, ARIZONA_IN1L_SRC_SHIFT, @@ -215,8 +296,10 @@ static const SOC_ENUM_SINGLE_DECL(marley_in1muxr_enum, marley_inmux_texts); static const struct snd_kcontrol_new marley_in1mux[2] = { - SOC_DAPM_ENUM("IN1L Mux", marley_in1muxl_enum), - SOC_DAPM_ENUM("IN1R Mux", marley_in1muxr_enum), + SOC_DAPM_ENUM_EXT("IN1L Mux", marley_in1muxl_enum, + snd_soc_dapm_get_enum_double, marley_in1mux_put), + SOC_DAPM_ENUM_EXT("IN1R Mux", marley_in1muxr_enum, + snd_soc_dapm_get_enum_double, marley_in1mux_put), }; static const char * const marley_outdemux_texts[] = { From 754e4434e2e4859a0be7296048fb07de17f32b7c Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Thu, 11 Feb 2016 13:44:16 +0000 Subject: [PATCH 1072/1167] Documentation: devicetree: arizona: CS47L35 updates Change-Id: I2a6e51bc949373faf3b014b2b5ddfc3a82462763 Signed-off-by: Piotr Stankiewicz --- Documentation/devicetree/bindings/mfd/arizona.txt | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index 40b533afaf9..e19b5343510 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -18,6 +18,7 @@ Required properties: "wlf,wm1831" "cirrus,cs47l24" "cirrus,cs47l85" + "cirrus,cs47l35" "cirrus,cs47l90" "cirrus,cs47l91" @@ -40,8 +41,8 @@ Required properties: - AVDD-supply, DBVDD1-supply, DBVDD2-supply, DBVDD3-supply (wm5102, wm5110), DBVDD4-supply (wm8285), CPVDD-supply, SPKVDDL-supply (wm5102, wm5110), - SPKVDDR-supply (wm5102, wm5110), SPKVDD-supply (wm8997, cs47l24) : Power - supplies for the device, as covered in + SPKVDDR-supply (wm5102, wm5110), SPKVDD-supply (wm8997, cs47l24, cs47l35) : + Power supplies for the device, as covered in Documentation/devicetree/bindings/regulator/regulator.txt Optional properties: @@ -154,6 +155,7 @@ Optional properties: wm8998: entries are for cs47l85, wm8285, cs47l90, cs47l91: entries are for + cs47l35: entries are for - wlf,dmic-clksrc : DMIC clock source for each input. This field is only for moon class of arizona codecs (cs47l90, cs47l91) and a value of 0 will source @@ -171,9 +173,6 @@ Optional properties: Specify one cell for each AIF, specify zero for AIFs that should be handled normally. - - wlf,out-mono : Mono bit for each output, must contain six cells if - specified. A non-zero value indicates the corresponding output is mono. - - wlf,wm5102t-output-pwr : Output power setting (WM5102T only) - DCVDD-supply, MICVDD-supply : Power supplies, only need to be specified if From 60313197c3cfefc813eee693c8fa2d6302e2e155 Mon Sep 17 00:00:00 2001 From: Simon Trimmer Date: Thu, 11 Feb 2016 15:49:10 +0000 Subject: [PATCH 1073/1167] ASoC: moon: Fix RXANC NG to use VIRT DAPM macros When the source is not defined as SOC_DAPM_ENUM_VIRT the resulting ALSA control will not have a default value. Likewise the mux macros should also use the VIRT variant. Change-Id: Ifaafaa13bebf26faf0be936a75bc37bdb5130975 Signed-off-by: Simon Trimmer --- sound/soc/codecs/moon.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 2fedaefac25..e639412f7c1 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -1317,7 +1317,7 @@ static const struct snd_kcontrol_new moon_anc_input_mux[] = { }; static const struct snd_kcontrol_new moon_anc_ng_mux = - SOC_DAPM_ENUM("RXANC NG Source", arizona_anc_ng_enum); + SOC_DAPM_ENUM_VIRT("RXANC NG Source", arizona_anc_ng_enum); static const struct snd_kcontrol_new moon_output_anc_src[] = { SOC_DAPM_ENUM("HPOUT1L ANC Source", arizona_output_anc_src[0]), @@ -1421,13 +1421,13 @@ SND_SOC_DAPM_MUX("RXANCL Left Input", SND_SOC_NOPM, 0, 0, SND_SOC_DAPM_MUX("RXANCL Right Input", SND_SOC_NOPM, 0, 0, &moon_anc_input_mux[0]), SND_SOC_DAPM_MUX("RXANCL Channel", SND_SOC_NOPM, 0, 0, &moon_anc_input_mux[1]), -SND_SOC_DAPM_MUX("RXANCL NG Mux", SND_SOC_NOPM, 0, 0, &moon_anc_ng_mux), +SND_SOC_DAPM_VIRT_MUX("RXANCL NG Mux", SND_SOC_NOPM, 0, 0, &moon_anc_ng_mux), SND_SOC_DAPM_MUX("RXANCR Left Input", SND_SOC_NOPM, 0, 0, &moon_anc_input_mux[2]), SND_SOC_DAPM_MUX("RXANCR Right Input", SND_SOC_NOPM, 0, 0, &moon_anc_input_mux[2]), SND_SOC_DAPM_MUX("RXANCR Channel", SND_SOC_NOPM, 0, 0, &moon_anc_input_mux[3]), -SND_SOC_DAPM_MUX("RXANCR NG Mux", SND_SOC_NOPM, 0, 0, &moon_anc_ng_mux), +SND_SOC_DAPM_VIRT_MUX("RXANCR NG Mux", SND_SOC_NOPM, 0, 0, &moon_anc_ng_mux), SND_SOC_DAPM_PGA_E("RXANCL", SND_SOC_NOPM, ARIZONA_CLK_L_ENA_SET_SHIFT, 0, NULL, 0, arizona_anc_ev, From 64cf9bc5d47428604932b56fa058eca03ef90c58 Mon Sep 17 00:00:00 2001 From: Stuart Henderson Date: Tue, 9 Feb 2016 18:52:57 +0000 Subject: [PATCH 1074/1167] mfd: arizona: Don't set gpio defaults when zero Zero is used as chip default for pdata values, so skip those entries during resume like we do at init time. Change-Id: I96c6cfc1e3f0d4bd680bea824cb56a71fc03650f Signed-off-by: Stuart Henderson --- drivers/mfd/arizona-core.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 6d458ca63ee..2f5d7a377d2 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -686,10 +686,13 @@ static int arizona_runtime_resume(struct device *dev) } /* sync the gpio registers */ - for (offset = 0; offset < num_gpios; offset++) + for (offset = 0; offset < num_gpios; offset++) { + if (!arizona->pdata.gpio_defaults[offset * 2]) + continue; regmap_write(arizona->regmap, CLEARWATER_GPIO1_CTRL_1 + (offset * 2), arizona->pdata.gpio_defaults[offset * 2]); + } ret = regcache_sync(arizona->regmap); if (ret != 0) { From 54391138e3f93847b2ce66eab2ddf2953aa5cbf1 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 4 Jan 2016 16:52:57 +0000 Subject: [PATCH 1075/1167] mfd: wm5102: Fix defaults array based on testing My automated test is back and now can check defaults against the actual hardware. This patch updates the defaults array for the differences detected. Change-Id: Ia9082c17f5c370a3847ea96b2dfca9b674727554 Signed-off-by: Charles Keepax --- drivers/mfd/wm5102-tables.c | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index 89b03107f60..21db329f10f 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -373,7 +373,6 @@ static const struct reg_default wm5102_reg_default[] = { { 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */ { 0x00000175, 0x0004 }, /* R373 - FLL1 Control 5 */ { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */ - { 0x00000177, 0x0181 }, /* R375 - FLL1 Loop Filter Test 1 */ { 0x00000179, 0x0000 }, /* R377 - FLL1 Control 7 */ { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */ { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */ @@ -390,7 +389,6 @@ static const struct reg_default wm5102_reg_default[] = { { 0x00000194, 0x007D }, /* R404 - FLL2 Control 4 */ { 0x00000195, 0x0004 }, /* R405 - FLL2 Control 5 */ { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */ - { 0x00000197, 0x0000 }, /* R407 - FLL2 Loop Filter Test 1 */ { 0x00000199, 0x0000 }, /* R409 - FLL2 Control 7 */ { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */ { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */ @@ -414,7 +412,7 @@ static const struct reg_default wm5102_reg_default[] = { { 0x000002A3, 0x1102 }, /* R675 - Mic Detect 1 */ { 0x000002A4, 0x009F }, /* R676 - Mic Detect 2 */ { 0x000002A6, 0x3737 }, /* R678 - Mic Detect Level 1 */ - { 0x000002A7, 0x372C }, /* R679 - Mic Detect Level 2 */ + { 0x000002A7, 0x2C37 }, /* R679 - Mic Detect Level 2 */ { 0x000002A8, 0x1422 }, /* R680 - Mic Detect Level 3 */ { 0x000002A9, 0x030A }, /* R681 - Mic Detect Level 4 */ { 0x000002C3, 0x0000 }, /* R707 - Mic noise mix control 1 */ @@ -478,7 +476,7 @@ static const struct reg_default wm5102_reg_default[] = { { 0x00000435, 0x0180 }, /* R1077 - DAC Digital Volume 5R */ { 0x00000436, 0x0081 }, /* R1078 - DAC Volume Limit 5R */ { 0x00000437, 0x0200 }, /* R1079 - Noise Gate Select 5R */ - { 0x00000440, 0x8FFF }, /* R1088 - DRE Enable */ + { 0x00000440, 0x0FFF }, /* R1088 - DRE Enable */ { 0x00000442, 0x3F0A }, /* R1090 - DRE Control 2 */ { 0x00000443, 0xDC1F }, /* R1090 - DRE Control 3 */ { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */ @@ -939,7 +937,7 @@ static const struct reg_default wm5102_reg_default[] = { { 0x00000C0F, 0x0400 }, /* R3087 - IRQ CTRL 1 */ { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */ { 0x00000C20, 0x8002 }, /* R3104 - Misc Pad Ctrl 1 */ - { 0x00000C21, 0x8001 }, /* R3105 - Misc Pad Ctrl 2 */ + { 0x00000C21, 0x0001 }, /* R3105 - Misc Pad Ctrl 2 */ { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */ { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */ { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */ @@ -1060,7 +1058,7 @@ static const struct reg_default wm5102_reg_default[] = { { 0x00000ECD, 0x0000 }, /* R3789 - HPLPF4_2 */ { 0x00000EE0, 0x0000 }, /* R3808 - ASRC_ENABLE */ { 0x00000EE2, 0x0000 }, /* R3810 - ASRC_RATE1 */ - { 0x00000EE3, 0x0400 }, /* R3811 - ASRC_RATE2 */ + { 0x00000EE3, 0x4000 }, /* R3811 - ASRC_RATE2 */ { 0x00000EF0, 0x0000 }, /* R3824 - ISRC 1 CTRL 1 */ { 0x00000EF1, 0x0000 }, /* R3825 - ISRC 1 CTRL 2 */ { 0x00000EF2, 0x0000 }, /* R3826 - ISRC 1 CTRL 3 */ @@ -1138,8 +1136,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_FLL1_CONTROL_4: case ARIZONA_FLL1_CONTROL_5: case ARIZONA_FLL1_CONTROL_6: - case ARIZONA_FLL1_LOOP_FILTER_TEST_1: - case ARIZONA_FLL1_NCO_TEST_0: case ARIZONA_FLL1_CONTROL_7: case ARIZONA_FLL1_SYNCHRONISER_1: case ARIZONA_FLL1_SYNCHRONISER_2: @@ -1156,8 +1152,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_FLL2_CONTROL_4: case ARIZONA_FLL2_CONTROL_5: case ARIZONA_FLL2_CONTROL_6: - case ARIZONA_FLL2_LOOP_FILTER_TEST_1: - case ARIZONA_FLL2_NCO_TEST_0: case ARIZONA_FLL2_CONTROL_7: case ARIZONA_FLL2_SYNCHRONISER_1: case ARIZONA_FLL2_SYNCHRONISER_2: @@ -1926,8 +1920,6 @@ static bool wm5102_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_HAPTICS_STATUS: case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: - case ARIZONA_FLL1_NCO_TEST_0: - case ARIZONA_FLL2_NCO_TEST_0: case ARIZONA_DAC_COMP_1: case ARIZONA_DAC_COMP_2: case ARIZONA_DAC_COMP_3: From 20a17c299410a73825059d5d1f389cdc92bb79fc Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 4 Jan 2016 17:06:38 +0000 Subject: [PATCH 1076/1167] mfd: florida: Fix defaults array based on testing My automated test is back and now can check defaults against the actual hardware. This patch updates the defaults array for the differences detected. Change-Id: Iacde7fbd51ec69eee07e5bf2710ca9d17b93d50f Signed-off-by: Charles Keepax --- drivers/mfd/florida-tables.c | 54 +++++++++++++++--------------------- 1 file changed, 23 insertions(+), 31 deletions(-) diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 0037b7ae6ac..12e3f90befd 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -676,8 +676,8 @@ static const struct reg_default florida_reg_default[] = { { 0x00000008, 0x0019 }, /* R8 - Ctrl IF SPI CFG 1 */ { 0x00000009, 0x0001 }, /* R9 - Ctrl IF I2C1 CFG 1 */ { 0x0000000A, 0x0001 }, /* R10 - Ctrl IF I2C2 CFG 1 */ - { 0x0000000B, 0x0036 }, /* R11 - Ctrl IF I2C1 CFG 2 */ - { 0x0000000C, 0x0036 }, /* R12 - Ctrl IF I2C2 CFG 2 */ + { 0x0000000B, 0x001A }, /* R11 - Ctrl IF I2C1 CFG 2 */ + { 0x0000000C, 0x001A }, /* R12 - Ctrl IF I2C2 CFG 2 */ { 0x00000020, 0x0000 }, /* R32 - Tone Generator 1 */ { 0x00000021, 0x1000 }, /* R33 - Tone Generator 2 */ { 0x00000022, 0x0000 }, /* R34 - Tone Generator 3 */ @@ -723,14 +723,12 @@ static const struct reg_default florida_reg_default[] = { { 0x00000154, 0x0000 }, /* R340 - Rate Estimator 3 */ { 0x00000155, 0x0000 }, /* R341 - Rate Estimator 4 */ { 0x00000156, 0x0000 }, /* R342 - Rate Estimator 5 */ - { 0x00000171, 0x0000 }, /* R369 - FLL1 Control 1 */ + { 0x00000171, 0x0002 }, /* R369 - FLL1 Control 1 */ { 0x00000172, 0x0008 }, /* R370 - FLL1 Control 2 */ { 0x00000173, 0x0018 }, /* R371 - FLL1 Control 3 */ { 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */ { 0x00000175, 0x0006 }, /* R373 - FLL1 Control 5 */ { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */ - { 0x00000177, 0x0281 }, /* R375 - FLL1 Loop Filter Test 1 */ - { 0x00000178, 0x0000 }, /* R376 - FLL1 NCO Test 0 */ { 0x00000179, 0x0000 }, /* R376 - FLL1 Control 7 */ { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */ { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */ @@ -741,14 +739,12 @@ static const struct reg_default florida_reg_default[] = { { 0x00000187, 0x0001 }, /* R390 - FLL1 Synchroniser 7 */ { 0x00000189, 0x0000 }, /* R393 - FLL1 Spread Spectrum */ { 0x0000018A, 0x000C }, /* R394 - FLL1 GPIO Clock */ - { 0x00000191, 0x0000 }, /* R401 - FLL2 Control 1 */ + { 0x00000191, 0x0002 }, /* R401 - FLL2 Control 1 */ { 0x00000192, 0x0008 }, /* R402 - FLL2 Control 2 */ { 0x00000193, 0x0018 }, /* R403 - FLL2 Control 3 */ { 0x00000194, 0x007D }, /* R404 - FLL2 Control 4 */ { 0x00000195, 0x000C }, /* R405 - FLL2 Control 5 */ { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */ - { 0x00000197, 0x0000 }, /* R407 - FLL2 Loop Filter Test 1 */ - { 0x00000198, 0x0000 }, /* R408 - FLL2 NCO Test 0 */ { 0x00000199, 0x0000 }, /* R408 - FLL2 Control 7 */ { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */ { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */ @@ -771,9 +767,9 @@ static const struct reg_default florida_reg_default[] = { { 0x000002A3, 0x1102 }, /* R675 - Mic Detect 1 */ { 0x000002A4, 0x009F }, /* R676 - Mic Detect 2 */ { 0x000002A6, 0x3737 }, /* R678 - Mic Detect Level 1 */ - { 0x000002A7, 0x372C }, /* R679 - Mic Detect Level 2 */ + { 0x000002A7, 0x2C37 }, /* R679 - Mic Detect Level 2 */ { 0x000002A8, 0x1422 }, /* R680 - Mic Detect Level 3 */ - { 0x000002A9, 0x300A }, /* R681 - Mic Detect Level 4 */ + { 0x000002A9, 0x030A }, /* R681 - Mic Detect Level 4 */ { 0x000002C3, 0x0000 }, /* R707 - Mic noise mix control 1 */ { 0x000002CB, 0x0000 }, /* R715 - Isolation control */ { 0x000002D3, 0x0000 }, /* R723 - Jack detect analogue */ @@ -810,53 +806,53 @@ static const struct reg_default florida_reg_default[] = { { 0x00000409, 0x0022 }, /* R1033 - Output Volume Ramp */ { 0x00000410, 0x0080 }, /* R1040 - Output Path Config 1L */ { 0x00000411, 0x0180 }, /* R1041 - DAC Digital Volume 1L */ - { 0x00000412, 0x0080 }, /* R1042 - DAC Volume Limit 1L */ + { 0x00000412, 0x0081 }, /* R1042 - DAC Volume Limit 1L */ { 0x00000413, 0x0001 }, /* R1043 - Noise Gate Select 1L */ - { 0x00000414, 0x0000 }, /* R1044 - Output Path Config 1R */ + { 0x00000414, 0x0080 }, /* R1044 - Output Path Config 1R */ { 0x00000415, 0x0180 }, /* R1045 - DAC Digital Volume 1R */ - { 0x00000416, 0x0080 }, /* R1046 - DAC Volume Limit 1R */ + { 0x00000416, 0x0081 }, /* R1046 - DAC Volume Limit 1R */ { 0x00000417, 0x0002 }, /* R1047 - Noise Gate Select 1R */ { 0x00000418, 0x0080 }, /* R1048 - Output Path Config 2L */ { 0x00000419, 0x0180 }, /* R1049 - DAC Digital Volume 2L */ - { 0x0000041A, 0x0080 }, /* R1050 - DAC Volume Limit 2L */ + { 0x0000041A, 0x0081 }, /* R1050 - DAC Volume Limit 2L */ { 0x0000041B, 0x0004 }, /* R1051 - Noise Gate Select 2L */ { 0x0000041C, 0x0080 }, /* R1052 - Output Path Config 2R */ { 0x0000041D, 0x0180 }, /* R1053 - DAC Digital Volume 2R */ - { 0x0000041E, 0x0080 }, /* R1054 - DAC Volume Limit 2R */ + { 0x0000041E, 0x0081 }, /* R1054 - DAC Volume Limit 2R */ { 0x0000041F, 0x0008 }, /* R1055 - Noise Gate Select 2R */ { 0x00000420, 0x0080 }, /* R1056 - Output Path Config 3L */ { 0x00000421, 0x0180 }, /* R1057 - DAC Digital Volume 3L */ - { 0x00000422, 0x0080 }, /* R1058 - DAC Volume Limit 3L */ + { 0x00000422, 0x0081 }, /* R1058 - DAC Volume Limit 3L */ { 0x00000423, 0x0010 }, /* R1059 - Noise Gate Select 3L */ { 0x00000424, 0x0080 }, /* R1060 - Output Path Config 3R */ { 0x00000425, 0x0180 }, /* R1061 - DAC Digital Volume 3R */ - { 0x00000426, 0x0080 }, /* R1062 - DAC Volume Limit 3R */ + { 0x00000426, 0x0081 }, /* R1062 - DAC Volume Limit 3R */ { 0x00000427, 0x0020 }, /* R1063 - Noise Gate Select 3R */ { 0x00000428, 0x0000 }, /* R1064 - Output Path Config 4L */ { 0x00000429, 0x0180 }, /* R1065 - DAC Digital Volume 4L */ - { 0x0000042A, 0x0080 }, /* R1066 - Out Volume 4L */ + { 0x0000042A, 0x0081 }, /* R1066 - Out Volume 4L */ { 0x0000042B, 0x0040 }, /* R1067 - Noise Gate Select 4L */ { 0x0000042C, 0x0000 }, /* R1068 - Output Path Config 4R */ { 0x0000042D, 0x0180 }, /* R1069 - DAC Digital Volume 4R */ - { 0x0000042E, 0x0080 }, /* R1070 - Out Volume 4R */ + { 0x0000042E, 0x0081 }, /* R1070 - Out Volume 4R */ { 0x0000042F, 0x0080 }, /* R1071 - Noise Gate Select 4R */ { 0x00000430, 0x0000 }, /* R1072 - Output Path Config 5L */ { 0x00000431, 0x0180 }, /* R1073 - DAC Digital Volume 5L */ - { 0x00000432, 0x0080 }, /* R1074 - DAC Volume Limit 5L */ + { 0x00000432, 0x0081 }, /* R1074 - DAC Volume Limit 5L */ { 0x00000433, 0x0100 }, /* R1075 - Noise Gate Select 5L */ { 0x00000434, 0x0000 }, /* R1076 - Output Path Config 5R */ { 0x00000435, 0x0180 }, /* R1077 - DAC Digital Volume 5R */ - { 0x00000436, 0x0080 }, /* R1078 - DAC Volume Limit 5R */ + { 0x00000436, 0x0081 }, /* R1078 - DAC Volume Limit 5R */ { 0x00000437, 0x0200 }, /* R1079 - Noise Gate Select 5R */ { 0x00000438, 0x0000 }, /* R1080 - Output Path Config 6L */ { 0x00000439, 0x0180 }, /* R1081 - DAC Digital Volume 6L */ - { 0x0000043A, 0x0080 }, /* R1082 - DAC Volume Limit 6L */ + { 0x0000043A, 0x0081 }, /* R1082 - DAC Volume Limit 6L */ { 0x0000043B, 0x0400 }, /* R1083 - Noise Gate Select 6L */ { 0x0000043C, 0x0000 }, /* R1084 - Output Path Config 6R */ { 0x0000043D, 0x0180 }, /* R1085 - DAC Digital Volume 6R */ - { 0x0000043E, 0x0080 }, /* R1086 - DAC Volume Limit 6R */ + { 0x0000043E, 0x0081 }, /* R1086 - DAC Volume Limit 6R */ { 0x0000043F, 0x0800 }, /* R1087 - Noise Gate Select 6R */ - { 0x00000440, 0x8FFF }, /* R1088 - DRE Enable */ + { 0x00000440, 0x003F }, /* R1088 - DRE Enable */ { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */ { 0x00000458, 0x0000 }, /* R1112 - Noise Gate Control */ { 0x00000460, 0x0C40 }, @@ -896,8 +892,8 @@ static const struct reg_default florida_reg_default[] = { { 0x00000492, 0x0069 }, /* R1170 - PDM SPK2 CTRL 1 */ { 0x00000493, 0x0000 }, /* R1171 - PDM SPK2 CTRL 2 */ { 0x000004A0, 0x3480 }, /* R1184 - HP1 Short Circuit Ctrl */ - { 0x000004A1, 0x3480 }, /* R1185 - HP2 Short Circuit Ctrl */ - { 0x000004A2, 0x3480 }, /* R1186 - HP3 Short Circuit Ctrl */ + { 0x000004A1, 0x3400 }, /* R1185 - HP2 Short Circuit Ctrl */ + { 0x000004A2, 0x3400 }, /* R1186 - HP3 Short Circuit Ctrl */ { 0x00000500, 0x000C }, /* R1280 - AIF1 BCLK Ctrl */ { 0x00000501, 0x0008 }, /* R1281 - AIF1 Tx Pin Ctrl */ { 0x00000502, 0x0000 }, /* R1282 - AIF1 Rx Pin Ctrl */ @@ -1674,7 +1670,7 @@ static const struct reg_default florida_reg_default[] = { { 0x00000F0D, 0x0000 }, /* R3853 - ANC Coefficient */ { 0x00000F0E, 0x0000 }, /* R3854 - ANC Coefficient */ { 0x00000F0F, 0x0000 }, /* R3855 - ANC Coefficient */ - { 0x00000F10, 0x0000 }, /* R3856 - ANC Coefficient */ + { 0x00000F10, 0x0001 }, /* R3856 - ANC Coefficient */ { 0x00000F11, 0x0000 }, /* R3857 - ANC Coefficient */ { 0x00000F12, 0x0000 }, /* R3858 - ANC Coefficient */ { 0x00000F15, 0x0000 }, /* R3861 - FCL Filter Control */ @@ -1982,8 +1978,6 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_FLL1_CONTROL_5: case ARIZONA_FLL1_CONTROL_6: case ARIZONA_FLL1_CONTROL_7: - case ARIZONA_FLL1_LOOP_FILTER_TEST_1: - case ARIZONA_FLL1_NCO_TEST_0: case ARIZONA_FLL1_SYNCHRONISER_1: case ARIZONA_FLL1_SYNCHRONISER_2: case ARIZONA_FLL1_SYNCHRONISER_3: @@ -2000,8 +1994,6 @@ static bool florida_readable_register(struct device *dev, unsigned int reg) case ARIZONA_FLL2_CONTROL_5: case ARIZONA_FLL2_CONTROL_6: case ARIZONA_FLL2_CONTROL_7: - case ARIZONA_FLL2_LOOP_FILTER_TEST_1: - case ARIZONA_FLL2_NCO_TEST_0: case ARIZONA_FLL2_SYNCHRONISER_1: case ARIZONA_FLL2_SYNCHRONISER_2: case ARIZONA_FLL2_SYNCHRONISER_3: From 9e8ad7e6d5ad70feaf10e282e865f6d4c41dee53 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 4 Jan 2016 16:57:58 +0000 Subject: [PATCH 1077/1167] mfd: vegas: Fix defaults array based on testing My automated test is back and now can check defaults against the actual hardware. This patch updates the defaults array for the differences detected. Change-Id: Idf14867e87c7fe37da8168363516aa7c2184dfae Signed-off-by: Charles Keepax --- drivers/mfd/vegas-tables.c | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/drivers/mfd/vegas-tables.c b/drivers/mfd/vegas-tables.c index 4db51da7f69..612f03db246 100644 --- a/drivers/mfd/vegas-tables.c +++ b/drivers/mfd/vegas-tables.c @@ -230,8 +230,6 @@ static const struct reg_default vegas_reg_default[] = { { 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */ { 0x00000175, 0x0004 }, /* R373 - FLL1 Control 5 */ { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */ - { 0x00000177, 0x0181 }, /* R375 - FLL1 Loop Filter Test 1 */ - { 0x00000178, 0x0000 }, /* R376 - FLL1 NCO Test 0 */ { 0x00000179, 0x0000 }, /* R377 - FLL1 Control 7 */ { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */ { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */ @@ -248,8 +246,6 @@ static const struct reg_default vegas_reg_default[] = { { 0x00000194, 0x007D }, /* R404 - FLL2 Control 4 */ { 0x00000195, 0x0004 }, /* R405 - FLL2 Control 5 */ { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */ - { 0x00000197, 0x0000 }, /* R407 - FLL2 Loop Filter Test 1 */ - { 0x00000198, 0x0000 }, /* R408 - FLL2 NCO Test 0 */ { 0x00000199, 0x0000 }, /* R409 - FLL2 Control 7 */ { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */ { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */ @@ -321,7 +317,7 @@ static const struct reg_default vegas_reg_default[] = { { 0x00000434, 0x0000 }, /* R1076 - Output Path Config 5R */ { 0x00000435, 0x0180 }, /* R1077 - DAC Digital Volume 5R */ { 0x00000437, 0x0200 }, /* R1079 - Noise Gate Select 5R */ - { 0x00000440, 0x8FFF }, /* R1088 - DRE Enable */ + { 0x00000440, 0x002F }, /* R1088 - DRE Enable */ { 0x00000441, 0xC759 }, /* R1089 - DRE Control 1 */ { 0x00000442, 0x2A08 }, /* R1089 - DRE Control 2 */ { 0x00000443, 0x5CFA }, /* R1089 - DRE Control 3 */ @@ -688,7 +684,7 @@ static const struct reg_default vegas_reg_default[] = { { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */ { 0x00000C18, 0x0000 }, /* R3096 - GP Switch 1 */ { 0x00000C20, 0x8002 }, /* R3104 - Misc Pad Ctrl 1 */ - { 0x00000C21, 0x8001 }, /* R3105 - Misc Pad Ctrl 2 */ + { 0x00000C21, 0x0001 }, /* R3105 - Misc Pad Ctrl 2 */ { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */ { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */ { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */ @@ -890,8 +886,6 @@ static bool vegas_readable_register(struct device *dev, unsigned int reg) case ARIZONA_FLL1_CONTROL_5: case ARIZONA_FLL1_CONTROL_6: case ARIZONA_FLL1_CONTROL_7: - case ARIZONA_FLL1_LOOP_FILTER_TEST_1: - case ARIZONA_FLL1_NCO_TEST_0: case ARIZONA_FLL1_SYNCHRONISER_1: case ARIZONA_FLL1_SYNCHRONISER_2: case ARIZONA_FLL1_SYNCHRONISER_3: @@ -908,8 +902,6 @@ static bool vegas_readable_register(struct device *dev, unsigned int reg) case ARIZONA_FLL2_CONTROL_5: case ARIZONA_FLL2_CONTROL_6: case ARIZONA_FLL2_CONTROL_7: - case ARIZONA_FLL2_LOOP_FILTER_TEST_1: - case ARIZONA_FLL2_NCO_TEST_0: case ARIZONA_FLL2_SYNCHRONISER_1: case ARIZONA_FLL2_SYNCHRONISER_2: case ARIZONA_FLL2_SYNCHRONISER_3: From 04b2ff4f45400b90307a5e6e4fd53c9744d3b676 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 29 Jan 2016 13:28:56 +0000 Subject: [PATCH 1078/1167] mfd: largo: Fix defaults array based on testing My automated test is back and now can check defaults against the actual hardware. This patch updates the defaults array for the differences detected. Change-Id: I727dafa6ddbc708646bcabc1d798254874c1aafa Signed-off-by: Charles Keepax --- drivers/mfd/largo-tables.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/drivers/mfd/largo-tables.c b/drivers/mfd/largo-tables.c index 102a0b11f43..479cc8cae20 100644 --- a/drivers/mfd/largo-tables.c +++ b/drivers/mfd/largo-tables.c @@ -228,8 +228,6 @@ static const struct reg_default largo_reg_default[] = { { 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */ { 0x00000175, 0x0006 }, /* R373 - FLL1 Control 5 */ { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */ - { 0x00000177, 0x0281 }, /* R375 - FLL1 Loop Filter Test 1 */ - { 0x00000178, 0x0000 }, /* R376 - FLL1 NCO Test 0 */ { 0x00000179, 0x0000 }, /* R376 - FLL1 Control 7 */ { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */ { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */ @@ -246,8 +244,6 @@ static const struct reg_default largo_reg_default[] = { { 0x00000194, 0x007D }, /* R404 - FLL2 Control 4 */ { 0x00000195, 0x000C }, /* R405 - FLL2 Control 5 */ { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */ - { 0x00000197, 0x0000 }, /* R407 - FLL2 Loop Filter Test 1 */ - { 0x00000198, 0x0000 }, /* R408 - FLL2 NCO Test 0 */ { 0x00000199, 0x0000 }, /* R408 - FLL2 Control 7 */ { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */ { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */ @@ -680,7 +676,7 @@ static const struct reg_default largo_reg_default[] = { { 0x00000C0F, 0x0400 }, /* R3087 - IRQ CTRL 1 */ { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */ { 0x00000C20, 0x0002 }, /* R3104 - Misc Pad Ctrl 1 */ - { 0x00000C21, 0x8001 }, /* R3105 - Misc Pad Ctrl 2 */ + { 0x00000C21, 0x0000 }, /* R3105 - Misc Pad Ctrl 2 */ { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */ { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */ { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */ @@ -858,8 +854,6 @@ static bool largo_readable_register(struct device *dev, unsigned int reg) case ARIZONA_FLL1_CONTROL_5: case ARIZONA_FLL1_CONTROL_6: case ARIZONA_FLL1_CONTROL_7: - case ARIZONA_FLL1_LOOP_FILTER_TEST_1: - case ARIZONA_FLL1_NCO_TEST_0: case ARIZONA_FLL1_SYNCHRONISER_1: case ARIZONA_FLL1_SYNCHRONISER_2: case ARIZONA_FLL1_SYNCHRONISER_3: @@ -876,8 +870,6 @@ static bool largo_readable_register(struct device *dev, unsigned int reg) case ARIZONA_FLL2_CONTROL_5: case ARIZONA_FLL2_CONTROL_6: case ARIZONA_FLL2_CONTROL_7: - case ARIZONA_FLL2_LOOP_FILTER_TEST_1: - case ARIZONA_FLL2_NCO_TEST_0: case ARIZONA_FLL2_SYNCHRONISER_1: case ARIZONA_FLL2_SYNCHRONISER_2: case ARIZONA_FLL2_SYNCHRONISER_3: From 011d0651827f8094e6082cf3e00bb1477d6ce72d Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Wed, 3 Feb 2016 13:54:38 +0000 Subject: [PATCH 1079/1167] mfd: marley: fill in IRQ-related registers The gaps between IRQ mask and status registers need to be filled in. Otherwise the IRQ framework will not be able to get at some of the IRQ's. Change-Id: Iaa597b2236278a421d3409c1bf855c59d502a60c Signed-off-by: Piotr Stankiewicz --- drivers/mfd/marley-tables.c | 60 ++++++++++++++++++++++++++++++------- 1 file changed, 50 insertions(+), 10 deletions(-) diff --git a/drivers/mfd/marley-tables.c b/drivers/mfd/marley-tables.c index fe8ded7d4cb..5066c6454a4 100644 --- a/drivers/mfd/marley-tables.c +++ b/drivers/mfd/marley-tables.c @@ -90,7 +90,7 @@ const struct regmap_irq_chip marley_irq = { .status_base = CLEARWATER_IRQ1_STATUS_1, .mask_base = CLEARWATER_IRQ1_MASK_1, .ack_base = CLEARWATER_IRQ1_STATUS_1, - .num_regs = 15, + .num_regs = 32, .irqs = marley_irqs, .num_irqs = ARRAY_SIZE(marley_irqs), }; @@ -797,15 +797,17 @@ static const struct reg_default marley_reg_default[] = { { 0x0000171B, 0xf000 }, /* R5915 (0x171B) - GPIO14 Control 2 */ { 0x0000171D, 0xf000 }, /* R5917 (0x171D) - GPIO15 Control 2 */ { 0x0000171F, 0xf000 }, /* R5919 (0x171F) - GPIO16 Control 2 */ - { 0x00001802, 0x0000 }, - { 0x00001803, 0x0000 }, - { 0x00001804, 0x0000 }, - { 0x00001807, 0x0000 }, - { 0x00001809, 0x0000 }, - { 0x0000180F, 0x0000 }, - { 0x00001813, 0x0000 }, - { 0x00001819, 0x0000 }, - { 0x0000181C, 0x0000 }, + { 0x00001802, 0x0000 }, /* R6146 (0x1802) - IRQ1 Status 3 */ + { 0x00001803, 0x0000 }, /* R6147 (0x1803) - IRQ1 Status 4 */ + { 0x00001804, 0x0000 }, /* R6148 (0x1804) - IRQ1 Status 5 */ + { 0x00001807, 0x0000 }, /* R6151 (0x1807) - IRQ1 Status 8 */ + { 0x00001809, 0x0000 }, /* R6153 (0x1809) - IRQ1 Status 10 */ + { 0x0000180f, 0x0000 }, /* R6159 (0x180f) - IRQ1 Status 16 */ + { 0x00001811, 0x0000 }, /* R6161 (0x1811) - IRQ1 Status 18 */ + { 0x00001812, 0x0000 }, /* R6162 (0x1812) - IRQ1 Status 19 */ + { 0x00001813, 0x0000 }, /* R6163 (0x1813) - IRQ1 Status 20 */ + { 0x00001819, 0x0000 }, /* R6169 (0x1819) - IRQ1 Status 26 */ + { 0x0000181c, 0x0000 }, /* R6172 (0x181c) - IRQ1 Status 29 */ { 0x00001840, 0xffff }, /* R6208 (0x1840) - IRQ1 Mask 1 */ { 0x00001841, 0xffff }, /* R6209 (0x1841) - IRQ1 Mask 2 */ { 0x00001842, 0xffff }, /* R6210 (0x1842) - IRQ1 Mask 3 */ @@ -821,6 +823,23 @@ static const struct reg_default marley_reg_default[] = { { 0x0000184c, 0xffff }, /* R6220 (0x184c) - IRQ1 Mask 13 */ { 0x0000184d, 0xffff }, /* R6221 (0x184d) - IRQ1 Mask 14 */ { 0x0000184e, 0xffff }, /* R6222 (0x184e) - IRQ1 Mask 15 */ + { 0x0000184f, 0xffff }, /* R6223 (0x184f) - IRQ1 Mask 16 */ + { 0x00001850, 0xffff }, /* R6224 (0x1850) - IRQ1 Mask 17 */ + { 0x00001851, 0xffff }, /* R6225 (0x1851) - IRQ1 Mask 18 */ + { 0x00001852, 0xffff }, /* R6226 (0x1852) - IRQ1 Mask 19 */ + { 0x00001853, 0xffff }, /* R6227 (0x1853) - IRQ1 Mask 20 */ + { 0x00001854, 0xffff }, /* R6228 (0x1854) - IRQ1 Mask 21 */ + { 0x00001855, 0xffff }, /* R6229 (0x1855) - IRQ1 Mask 22 */ + { 0x00001856, 0xffff }, /* R6230 (0x1856) - IRQ1 Mask 23 */ + { 0x00001857, 0xffff }, /* R6231 (0x1857) - IRQ1 Mask 24 */ + { 0x00001858, 0xffff }, /* R6232 (0x1858) - IRQ1 Mask 25 */ + { 0x00001859, 0xffff }, /* R6233 (0x1859) - IRQ1 Mask 26 */ + { 0x0000185a, 0xffff }, /* R6234 (0x185a) - IRQ1 Mask 27 */ + { 0x0000185b, 0xffff }, /* R6235 (0x185b) - IRQ1 Mask 28 */ + { 0x0000185c, 0xffff }, /* R6236 (0x185c) - IRQ1 Mask 29 */ + { 0x0000185d, 0xffff }, /* R6237 (0x185d) - IRQ1 Mask 30 */ + { 0x0000185e, 0xffff }, /* R6238 (0x185e) - IRQ1 Mask 31 */ + { 0x0000185f, 0xffff }, /* R6239 (0x185f) - IRQ1 Mask 32 */ { 0x00001948, 0xffff }, /* R6472 (0x1948) - IRQ2 Mask 9 */ { 0x00001A06, 0x0000 }, /* R6662 (0x1a06) - Interrupt Debounce 7 */ { 0x00001a80, 0x4400 }, /* R6784 (0x1a80) - IRQ1 CTRL */ @@ -1624,8 +1643,12 @@ static bool marley_16bit_readable_register(struct device *dev, unsigned int reg) case CLEARWATER_IRQ1_STATUS_32: case CLEARWATER_IRQ1_MASK_1: case CLEARWATER_IRQ1_MASK_2: + case CLEARWATER_IRQ1_MASK_3: + case CLEARWATER_IRQ1_MASK_4: + case CLEARWATER_IRQ1_MASK_5: case CLEARWATER_IRQ1_MASK_6: case CLEARWATER_IRQ1_MASK_7: + case CLEARWATER_IRQ1_MASK_8: case CLEARWATER_IRQ1_MASK_9: case CLEARWATER_IRQ1_MASK_10: case CLEARWATER_IRQ1_MASK_11: @@ -1633,6 +1656,23 @@ static bool marley_16bit_readable_register(struct device *dev, unsigned int reg) case CLEARWATER_IRQ1_MASK_13: case CLEARWATER_IRQ1_MASK_14: case CLEARWATER_IRQ1_MASK_15: + case MOON_IRQ1_MASK_16: + case CLEARWATER_IRQ1_MASK_17: + case CLEARWATER_IRQ1_MASK_18: + case CLEARWATER_IRQ1_MASK_19: + case MOON_IRQ1_MASK_20: + case CLEARWATER_IRQ1_MASK_21: + case CLEARWATER_IRQ1_MASK_22: + case CLEARWATER_IRQ1_MASK_23: + case CLEARWATER_IRQ1_MASK_24: + case CLEARWATER_IRQ1_MASK_25: + case MOON_IRQ1_MASK_26: + case CLEARWATER_IRQ1_MASK_27: + case CLEARWATER_IRQ1_MASK_28: + case MOON_IRQ1_MASK_29: + case CLEARWATER_IRQ1_MASK_30: + case CLEARWATER_IRQ1_MASK_31: + case CLEARWATER_IRQ1_MASK_32: case CLEARWATER_IRQ1_RAW_STATUS_1: case CLEARWATER_IRQ1_RAW_STATUS_2: case CLEARWATER_IRQ1_RAW_STATUS_7: From 72b7ac8e2ed47c220d9205bf62d96f561aa5a87a Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 4 Feb 2016 09:21:51 +0000 Subject: [PATCH 1080/1167] ASoC: wm_adsp: Fixup some odd line wrapping Change-Id: Iad4085a932334e5ec66e2a6b22845f7c83bcd484 Signed-off-by: Charles Keepax Signed-off-by: jjassal --- sound/soc/codecs/wm_adsp.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 9a468a68b82..f63f9db189f 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1083,15 +1083,13 @@ static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl) kcontrol->access = SNDRV_CTL_ELEM_ACCESS_READWRITE; } - ret = snd_soc_add_card_controls(dsp->card, - kcontrol, 1); + ret = snd_soc_add_card_controls(dsp->card, kcontrol, 1); if (ret < 0) goto err_kcontrol; kfree(kcontrol); - ctl->kcontrol = snd_soc_card_get_kcontrol(dsp->card, - ctl->name); + ctl->kcontrol = snd_soc_card_get_kcontrol(dsp->card, ctl->name); return 0; @@ -1814,8 +1812,7 @@ static void *wm_adsp_read_algs(struct wm_adsp *dsp, size_t n_algs, ret = regmap_raw_read(dsp->regmap, pos, alg, len * 2); if (ret != 0) { - adsp_err(dsp, "Failed to read algorithm list: %d\n", - ret); + adsp_err(dsp, "Failed to read algorithm list: %d\n", ret); kfree(alg); return ERR_PTR(ret); } @@ -2359,8 +2356,7 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, return ret; } - val = (val & dsp->sysclk_mask) - >> dsp->sysclk_shift; + val = (val & dsp->sysclk_mask) >> dsp->sysclk_shift; ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_31, @@ -2443,7 +2439,8 @@ static int wm_adsp2_ena(struct wm_adsp *dsp) /* Wait for the RAM to start, should be near instantaneous */ for (count = 0; count < 10; ++count) { - ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1, + ret = regmap_read(dsp->regmap, + dsp->base + ADSP2_STATUS1, &val); if (ret != 0) return ret; From de0844002942730c9e02ea5279b41b122653e684 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 4 Nov 2014 15:26:22 +0000 Subject: [PATCH 1081/1167] mfd: wm8997: Mark INTERRUPT_STATUS_2_MASK as readable Technically this register is not used on wm8997 however the regmap core requires a continuous block of IRQs. The simplest solution is just to add the register. Signed-off-by: Charles Keepax (cherry picked from commit e62cace7b602b29cc9226e64dfb2c47ddfb9558e) Change-Id: I4118313234afb20823318935f66d65c70c9ea8f8 Signed-off-by: V V N Praveen Kumar --- drivers/mfd/wm8997-tables.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mfd/wm8997-tables.c b/drivers/mfd/wm8997-tables.c index 23f601db427..4a9a238852b 100644 --- a/drivers/mfd/wm8997-tables.c +++ b/drivers/mfd/wm8997-tables.c @@ -666,6 +666,7 @@ static const struct reg_default wm8997_reg_default[] = { { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */ { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */ { 0x00000D08, 0xFFFF }, /* R3336 - Interrupt Status 1 Mask */ + { 0x00000D09, 0xFFFF }, /* R3337 - Interrupt Status 2 Mask */ { 0x00000D0A, 0xFFFF }, /* R3338 - Interrupt Status 3 Mask */ { 0x00000D0B, 0xFFFF }, /* R3339 - Interrupt Status 4 Mask */ { 0x00000D0C, 0xFEFF }, /* R3340 - Interrupt Status 5 Mask */ @@ -1322,6 +1323,7 @@ static bool wm8997_readable_register(struct device *dev, unsigned int reg) case ARIZONA_INTERRUPT_STATUS_4: case ARIZONA_INTERRUPT_STATUS_5: case ARIZONA_INTERRUPT_STATUS_1_MASK: + case ARIZONA_INTERRUPT_STATUS_2_MASK: case ARIZONA_INTERRUPT_STATUS_3_MASK: case ARIZONA_INTERRUPT_STATUS_4_MASK: case ARIZONA_INTERRUPT_STATUS_5_MASK: From f41570c4f1b4cd01c906278511bb47ddb8be63cb Mon Sep 17 00:00:00 2001 From: V V N Praveen Kumar Date: Mon, 22 Feb 2016 17:53:45 +0530 Subject: [PATCH 1082/1167] mfd: wm8997: adding missing registers ARIZONA_HP_CTRL_1L and ARIZONA_HP_CTRL_1R Change-Id: I813948aac251c6bb8693d57bd6cf0f0c87cbe0de Signed-off-by: V V N Praveen Kumar --- drivers/mfd/wm8997-tables.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mfd/wm8997-tables.c b/drivers/mfd/wm8997-tables.c index 4a9a238852b..9cceccf9f7a 100644 --- a/drivers/mfd/wm8997-tables.c +++ b/drivers/mfd/wm8997-tables.c @@ -880,6 +880,8 @@ static bool wm8997_readable_register(struct device *dev, unsigned int reg) case ARIZONA_MIC_BIAS_CTRL_1: case ARIZONA_MIC_BIAS_CTRL_2: case ARIZONA_MIC_BIAS_CTRL_3: + case ARIZONA_HP_CTRL_1L: + case ARIZONA_HP_CTRL_1R: case ARIZONA_ACCESSORY_DETECT_MODE_1: case ARIZONA_HEADPHONE_DETECT_1: case ARIZONA_HEADPHONE_DETECT_2: @@ -1477,6 +1479,8 @@ static bool wm8997_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: case ARIZONA_FLL1_NCO_TEST_0: case ARIZONA_FLL2_NCO_TEST_0: + case ARIZONA_HP_CTRL_1L: + case ARIZONA_HP_CTRL_1R: case ARIZONA_MIC_DETECT_3: case ARIZONA_HEADPHONE_DETECT_2: case ARIZONA_INPUT_ENABLES_STATUS: From 9305525372568cb26648bfdeff264a458c9ddf99 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 12 Jan 2016 17:52:34 +0000 Subject: [PATCH 1083/1167] switch: arizona: Enable mic det along with hp det The headphone detect may fail to run if the microphone detect did not exit cleanly. Work around this by always running a microphone detection along side a headphone detection. Change-Id: I290f39d05e19e0b6feb0dbec68067e64b39a7204 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 53 +++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index f75f2b51b8d..84a00bbc697 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1599,6 +1599,44 @@ void arizona_set_headphone_imp(struct arizona_extcon_info *info, int imp) } EXPORT_SYMBOL_GPL(arizona_set_headphone_imp); +static void arizona_hpdet_start_micd(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + + regmap_update_bits(arizona->regmap, MOON_MIC_DETECT_0, + MOON_MICD1_ADC_MODE_MASK, + MOON_MICD1_ADC_MODE_MASK); + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_BIAS_STARTTIME_MASK | + ARIZONA_MICD_RATE_MASK | + ARIZONA_MICD_DBTIME_MASK | + ARIZONA_MICD_ENA, ARIZONA_MICD_ENA); +} + +static void arizona_hpdet_stop_micd(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + unsigned int start_time = 1, dbtime = 1, rate = 1; + + if (arizona->pdata.micd_bias_start_time) + start_time = arizona->pdata.micd_bias_start_time; + + if (arizona->pdata.micd_rate) + rate = arizona->pdata.micd_rate; + + if (arizona->pdata.micd_dbtime) + dbtime = arizona->pdata.micd_dbtime; + + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_BIAS_STARTTIME_MASK | + ARIZONA_MICD_RATE_MASK | + ARIZONA_MICD_DBTIME_MASK | + ARIZONA_MICD_ENA, + start_time << ARIZONA_MICD_BIAS_STARTTIME_SHIFT | + rate << ARIZONA_MICD_RATE_SHIFT | + dbtime << ARIZONA_MICD_DBTIME_SHIFT); +} + int arizona_hpdet_start(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; @@ -1661,6 +1699,8 @@ int arizona_hpdet_start(struct arizona_extcon_info *info) goto err; } arizona_extcon_hp_clamp(info, true); + + arizona_hpdet_start_micd(info); break; } @@ -1689,11 +1729,22 @@ void arizona_hpdet_restart(struct arizona_extcon_info *info) struct arizona *arizona = info->arizona; /* Reset back to starting range */ + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, 0); regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, ARIZONA_HP_IMPEDANCE_RANGE_MASK | ARIZONA_HP_POLL, 0); + switch (info->accdet_ip) { + case 0: + break; + default: + regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, + ARIZONA_MICD_ENA, ARIZONA_MICD_ENA); + break; + } + regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, ARIZONA_HP_POLL, ARIZONA_HP_POLL); @@ -1705,6 +1756,8 @@ void arizona_hpdet_stop(struct arizona_extcon_info *info) struct arizona *arizona = info->arizona; /* Reset back to starting range */ + arizona_hpdet_stop_micd(info); + regmap_update_bits(arizona->regmap, ARIZONA_HEADPHONE_DETECT_1, ARIZONA_HP_IMPEDANCE_RANGE_MASK | From 48920e59bd8c31ffd0033d69457248df09611fa5 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 19 Jan 2016 10:12:19 +0000 Subject: [PATCH 1084/1167] switch: arizona: Clear any spurious micdet during hpdet IRQs We don't want any micdet IRQs to get queued up to be handled after the hpdet as they can confuse the process. This patch masks the micdet IRQs whilst doing a HPDET and then clears any that happened. Change-Id: Ibb1a71c68548c0ce6ef9131ffbad1edaf315f5fb Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 84a00bbc697..5606ae7bc02 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1603,6 +1603,10 @@ static void arizona_hpdet_start_micd(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; + regmap_update_bits(arizona->regmap, CLEARWATER_IRQ1_MASK_6, + CLEARWATER_IM_MICDET_EINT1, + CLEARWATER_IM_MICDET_EINT1); + regmap_update_bits(arizona->regmap, MOON_MIC_DETECT_0, MOON_MICD1_ADC_MODE_MASK, MOON_MICD1_ADC_MODE_MASK); @@ -1635,6 +1639,14 @@ static void arizona_hpdet_stop_micd(struct arizona_extcon_info *info) start_time << ARIZONA_MICD_BIAS_STARTTIME_SHIFT | rate << ARIZONA_MICD_RATE_SHIFT | dbtime << ARIZONA_MICD_DBTIME_SHIFT); + + udelay(100); + + /* Clear any spurious IRQs that have happened */ + regmap_write(arizona->regmap, CLEARWATER_IRQ1_STATUS_6, + CLEARWATER_MICDET_EINT1); + regmap_update_bits(arizona->regmap, CLEARWATER_IRQ1_MASK_6, + CLEARWATER_IM_MICDET_EINT1, 0); } int arizona_hpdet_start(struct arizona_extcon_info *info) From eb00d501cbed429eef7398928b2ac9531867e0ba Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 29 Jan 2016 13:14:02 +0000 Subject: [PATCH 1085/1167] ASoC: arizona: Add support for SNDRV_PCM_RATE_KNOT The Arizona CODECs support several rates that do not have simple defines in ALSA. This patch adds support for SNDRV_PCM_RATE_KNOT so that users can open stream at these rates. As part of this we should always set contraints in arizona_startup, currently we only set the constraints if we already have a clock to limit rates to that family of sample rates. This patch updates this to set a constraint of all rates supported by the chip if we do not already know which family of rates to limit to. Finally we also reduce the list of rates supported in the constraints to only include those that are supported on current parts. Change-Id: I64fe938430de3fc5b54fa34b315c6f571867eba5 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 62 +++++++++-------------------------- sound/soc/codecs/arizona.h | 2 ++ sound/soc/codecs/clearwater.c | 2 +- sound/soc/codecs/florida.c | 2 +- sound/soc/codecs/largo.c | 2 +- sound/soc/codecs/marley.c | 2 +- sound/soc/codecs/moon.c | 2 +- sound/soc/codecs/vegas.c | 2 +- sound/soc/codecs/wm5102.c | 2 +- sound/soc/codecs/wm8997.c | 2 +- 10 files changed, 26 insertions(+), 54 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 7560ae1b25a..1d4a5887b44 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -3541,29 +3541,6 @@ static const int arizona_48k_bclk_rates[] = { 24576000, }; -static const unsigned int arizona_48k_rates[] = { - 12000, - 24000, - 48000, - 96000, - 192000, - 384000, - 768000, - 4000, - 8000, - 16000, - 32000, - 64000, - 128000, - 256000, - 512000, -}; - -static const struct snd_pcm_hw_constraint_list arizona_48k_constraint = { - .count = ARRAY_SIZE(arizona_48k_rates), - .list = arizona_48k_rates, -}; - static const int arizona_44k1_bclk_rates[] = { -1, 44100, @@ -3586,22 +3563,7 @@ static const int arizona_44k1_bclk_rates[] = { 22579200, }; -static const unsigned int arizona_44k1_rates[] = { - 11025, - 22050, - 44100, - 88200, - 176400, - 352800, - 705600, -}; - -static const struct snd_pcm_hw_constraint_list arizona_44k1_constraint = { - .count = ARRAY_SIZE(arizona_44k1_rates), - .list = arizona_44k1_rates, -}; - -static int arizona_sr_vals[] = { +static const unsigned int arizona_sr_vals[] = { 0, 12000, 24000, @@ -3628,6 +3590,15 @@ static int arizona_sr_vals[] = { 512000, }; +#define ARIZONA_48K_RATE_MASK 0x0F003E +#define ARIZONA_44K1_RATE_MASK 0x003E00 +#define ARIZONA_RATE_MASK (ARIZONA_48K_RATE_MASK | ARIZONA_44K1_RATE_MASK) + +static const struct snd_pcm_hw_constraint_list arizona_constraint = { + .count = ARRAY_SIZE(arizona_sr_vals), + .list = arizona_sr_vals, +}; + int arizona_put_sample_rate_enum(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { @@ -3678,7 +3649,6 @@ static int arizona_startup(struct snd_pcm_substream *substream, struct snd_soc_codec *codec = dai->codec; struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1]; - const struct snd_pcm_hw_constraint_list *constraint; unsigned int base_rate; switch (dai_priv->clk) { @@ -3696,16 +3666,15 @@ static int arizona_startup(struct snd_pcm_substream *substream, } if (base_rate == 0) - return 0; - - if (base_rate % 8000) - constraint = &arizona_44k1_constraint; + dai_priv->constraint.mask = ARIZONA_RATE_MASK; + else if (base_rate % 4000) + dai_priv->constraint.mask = ARIZONA_44K1_RATE_MASK; else - constraint = &arizona_48k_constraint; + dai_priv->constraint.mask = ARIZONA_48K_RATE_MASK; return snd_pcm_hw_constraint_list(substream->runtime, 0, SNDRV_PCM_HW_PARAM_RATE, - constraint); + &dai_priv->constraint); } static void arizona_wm5102_set_dac_comp(struct snd_soc_codec *codec, @@ -4223,6 +4192,7 @@ int arizona_init_dai(struct arizona_priv *priv, int id) struct arizona_dai_priv *dai_priv = &priv->dai[id]; dai_priv->clk = ARIZONA_CLK_SYSCLK; + dai_priv->constraint = arizona_constraint; return 0; } diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 556174c0b93..c6c42d3e1ed 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -91,6 +91,8 @@ struct arizona_jd_state; struct arizona_dai_priv { int clk; + + struct snd_pcm_hw_constraint_list constraint; }; struct arizona_priv { diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index a57896420d0..3805bb9791e 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2552,7 +2552,7 @@ static int clearwater_set_fll(struct snd_soc_codec *codec, int fll_id, int sourc } } -#define CLEARWATER_RATES SNDRV_PCM_RATE_8000_192000 +#define CLEARWATER_RATES SNDRV_PCM_RATE_KNOT #define CLEARWATER_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index aae4914c1ee..5df239f0085 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2044,7 +2044,7 @@ static int florida_set_fll(struct snd_soc_codec *codec, int fll_id, int source, } } -#define FLORIDA_RATES SNDRV_PCM_RATE_8000_192000 +#define FLORIDA_RATES SNDRV_PCM_RATE_KNOT #define FLORIDA_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index 4dce1830cbc..068da3b6293 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -1027,7 +1027,7 @@ static int largo_set_fll(struct snd_soc_codec *codec, int fll_id, int source, } } -#define LARGO_RATES SNDRV_PCM_RATE_8000_192000 +#define LARGO_RATES SNDRV_PCM_RATE_KNOT #define LARGO_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index 4bec125219e..4e2e8922f1c 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -1794,7 +1794,7 @@ static int marley_set_fll(struct snd_soc_codec *codec, int fll_id, int source, } } -#define MARLEY_RATES SNDRV_PCM_RATE_8000_192000 +#define MARLEY_RATES SNDRV_PCM_RATE_KNOT #define MARLEY_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index e639412f7c1..ee21a0aa3e2 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -2485,7 +2485,7 @@ static int moon_set_fll(struct snd_soc_codec *codec, int fll_id, int source, } } -#define MOON_RATES SNDRV_PCM_RATE_8000_192000 +#define MOON_RATES SNDRV_PCM_RATE_KNOT #define MOON_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) diff --git a/sound/soc/codecs/vegas.c b/sound/soc/codecs/vegas.c index 18fee84e42f..a073104af7c 100644 --- a/sound/soc/codecs/vegas.c +++ b/sound/soc/codecs/vegas.c @@ -1327,7 +1327,7 @@ static const struct snd_soc_dapm_route vegas_dapm_routes[] = { { "DRC1 Signal Activity", NULL, "DRC1R" }, }; -#define VEGAS_RATES SNDRV_PCM_RATE_8000_192000 +#define VEGAS_RATES SNDRV_PCM_RATE_KNOT #define VEGAS_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 7b145931da8..3cad6ce21a0 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1803,7 +1803,7 @@ static int wm5102_set_fll(struct snd_soc_codec *codec, int fll_id, int source, } } -#define WM5102_RATES SNDRV_PCM_RATE_8000_192000 +#define WM5102_RATES SNDRV_PCM_RATE_KNOT #define WM5102_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c index 20b3b44f991..f9e24e7287e 100644 --- a/sound/soc/codecs/wm8997.c +++ b/sound/soc/codecs/wm8997.c @@ -942,7 +942,7 @@ static int wm8997_set_fll(struct snd_soc_codec *codec, int fll_id, int source, } } -#define WM8997_RATES SNDRV_PCM_RATE_8000_192000 +#define WM8997_RATES SNDRV_PCM_RATE_KNOT #define WM8997_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) From 4f4a3b88adf21b29d7744f7607860be3a0c44769 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 3 Feb 2016 16:44:01 +0000 Subject: [PATCH 1086/1167] ASoC: wm_adsp: wm_coeff_{read|write}_control should passed length wm_coeff_{read|write}_control were using the control length rather than the length parameter passed to them. This is not causing any issues as the two values are currently always the same, but this needs fixed to allow future improvements. Change-Id: I09939d473b83da514bb18cdb82f0fcfe575e4e99 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index f63f9db189f..071dbbf6da6 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -941,19 +941,19 @@ static int wm_coeff_write_control(struct wm_coeff_ctl *ctl, reg = ctl->alg_region.base + ctl->offset; reg = wm_adsp_region_to_reg(mem, reg); - scratch = kmemdup(buf, ctl->len, GFP_KERNEL | GFP_DMA); + scratch = kmemdup(buf, len, GFP_KERNEL | GFP_DMA); if (!scratch) return -ENOMEM; ret = regmap_raw_write(dsp->regmap, reg, scratch, - ctl->len); + len); if (ret) { adsp_err(dsp, "Failed to write %zu bytes to %x: %d\n", - ctl->len, reg, ret); + len, reg, ret); kfree(scratch); return ret; } - adsp_dbg(dsp, "Wrote %zu bytes to %x\n", ctl->len, reg); + adsp_dbg(dsp, "Wrote %zu bytes to %x\n", len, reg); kfree(scratch); @@ -1002,20 +1002,20 @@ static int wm_coeff_read_control(struct wm_coeff_ctl *ctl, reg = ctl->alg_region.base + ctl->offset; reg = wm_adsp_region_to_reg(mem, reg); - scratch = kmalloc(ctl->len, GFP_KERNEL | GFP_DMA); + scratch = kmalloc(len, GFP_KERNEL | GFP_DMA); if (!scratch) return -ENOMEM; - ret = regmap_raw_read(dsp->regmap, reg, scratch, ctl->len); + ret = regmap_raw_read(dsp->regmap, reg, scratch, len); if (ret) { adsp_err(dsp, "Failed to read %zu bytes from %x: %d\n", - ctl->len, reg, ret); + len, reg, ret); kfree(scratch); return ret; } - adsp_dbg(dsp, "Read %zu bytes from %x\n", ctl->len, reg); + adsp_dbg(dsp, "Read %zu bytes from %x\n", len, reg); - memcpy(buf, scratch, ctl->len); + memcpy(buf, scratch, len); kfree(scratch); return 0; From 4e57981d87969551be3e58c9325cb4ce107c925c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 3 Feb 2016 17:15:19 +0000 Subject: [PATCH 1087/1167] ASoC: wm_adsp: Set the volatile flag for controls with undefined access If no access flags are specified for a control we will always read from the hardware when the DSP is powered up, as such those controls should be marked as volatile as they can change. Change-Id: I7b6caf2ef6c550203cb00474c764c4541304fc40 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 071dbbf6da6..5ba781a0ebd 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1081,6 +1081,7 @@ static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl) kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_VOLATILE; } else { kcontrol->access = SNDRV_CTL_ELEM_ACCESS_READWRITE; + kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_VOLATILE; } ret = snd_soc_add_card_controls(dsp->card, kcontrol, 1); From ce0ca4c5d22da360c15cef61912741b153b0e780 Mon Sep 17 00:00:00 2001 From: Simon Trimmer Date: Tue, 23 Feb 2016 11:31:27 +0000 Subject: [PATCH 1088/1167] mfd: arizona: Refactor the irq thread handler for AOD and IRQ Previously the arizona_irq_thread implementation would call handle_nested_irqs() blindly if the codec had interrupts of that type, which can cause a build up of spurious IRQs and eventual IRQ disablement. This change separates the interrupt handling of codecs that only use the AOD type and those that may use them so that handle_nested_irqs can be called more appropriately, checking AOD status where available. Change-Id: I652346b980f021fe564076e7f6f0457325f6dfef Signed-off-by: Simon Trimmer Signed-off-by: Richard Fitzgerald --- drivers/mfd/arizona-irq.c | 96 +++++++++++++++++++++++++++++---------- 1 file changed, 71 insertions(+), 25 deletions(-) diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index ff190a79884..b28d1fd98e4 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -98,10 +98,29 @@ static irqreturn_t arizona_ctrlif_err(int irq, void *data) return IRQ_HANDLED; } +/* + * Examine the IRQ pin status to see if we're really done + * if the interrupt controller can't do it for us. + */ +static bool arizona_irq_still_pending(struct arizona *arizona) +{ + bool still_pending = false; + + if (arizona->pdata.irq_gpio) { + if (arizona->pdata.irq_flags & IRQF_TRIGGER_RISING && + gpio_get_value_cansleep(arizona->pdata.irq_gpio)) { + still_pending = true; + } else if (arizona->pdata.irq_flags & IRQF_TRIGGER_FALLING && + !gpio_get_value_cansleep(arizona->pdata.irq_gpio)) { + still_pending = true; + } + } + return still_pending; +} + static irqreturn_t arizona_irq_thread(int irq, void *data) { struct arizona *arizona = data; - bool poll; unsigned int val, nest_irq; int ret; @@ -112,43 +131,61 @@ static irqreturn_t arizona_irq_thread(int irq, void *data) } do { - poll = false; - - if (arizona->aod_irq_chip) - handle_nested_irq(irq_find_mapping(arizona->virq, 0)); - - if (arizona->irq_chip) { + if (arizona->aod_irq_chip) { /* - * Check if one of the main interrupts is asserted and - * only check that domain if it is. + * Check the AOD status register to determine whether + * the nested IRQ handler should be called. */ ret = regmap_read(arizona->regmap, - ARIZONA_IRQ_PIN_STATUS, + ARIZONA_AOD_IRQ1, &val); - if (ret == 0 && val & ARIZONA_IRQ1_STS) { - nest_irq = irq_find_mapping(arizona->virq, 1); + if (ret == 0 && val != 0) { + nest_irq = irq_find_mapping(arizona->virq, 0); handle_nested_irq(nest_irq); } else if (ret != 0) { dev_err(arizona->dev, - "Failed to read main IRQ status: %d\n", + "Failed to read AOD IRQ1 %d\n", ret); } } /* - * Poll the IRQ pin status to see if we're really done - * if the interrupt controller can't do it for us. + * Check if one of the main interrupts is asserted and + * only check that domain if it is. */ - if (!arizona->pdata.irq_gpio) { - break; - } else if (arizona->pdata.irq_flags & IRQF_TRIGGER_RISING && - gpio_get_value_cansleep(arizona->pdata.irq_gpio)) { - poll = true; - } else if (arizona->pdata.irq_flags & IRQF_TRIGGER_FALLING && - !gpio_get_value_cansleep(arizona->pdata.irq_gpio)) { - poll = true; + ret = regmap_read(arizona->regmap, + ARIZONA_IRQ_PIN_STATUS, + &val); + if (ret == 0 && val & ARIZONA_IRQ1_STS) { + nest_irq = irq_find_mapping(arizona->virq, 1); + handle_nested_irq(nest_irq); + } else if (ret != 0) { + dev_err(arizona->dev, + "Failed to read main IRQ status: %d\n", + ret); } - } while (poll); + } while (arizona_irq_still_pending(arizona)); + + pm_runtime_mark_last_busy(arizona->dev); + pm_runtime_put_autosuspend(arizona->dev); + + return IRQ_HANDLED; +} + +static irqreturn_t arizona_aodonly_irq_thread(int irq, void *data) +{ + struct arizona *arizona = data; + int ret; + + ret = pm_runtime_get_sync(arizona->dev); + if (ret < 0) { + dev_err(arizona->dev, "Failed to resume device: %d\n", ret); + return IRQ_NONE; + } + + do { + handle_nested_irq(irq_find_mapping(arizona->virq, 0)); + } while (arizona_irq_still_pending(arizona)); pm_runtime_mark_last_busy(arizona->dev); pm_runtime_put_autosuspend(arizona->dev); @@ -210,10 +247,12 @@ int arizona_irq_init(struct arizona *arizona) bool ctrlif_error = true; struct irq_data *irq_data; unsigned int irq_ctrl_reg = ARIZONA_IRQ_CTRL_1; + irq_handler_t irq_thread_handler = NULL; switch (arizona->type) { #ifdef CONFIG_MFD_WM5102 case WM5102: + irq_thread_handler = arizona_irq_thread; aod = &wm5102_aod; irq = &wm5102_irq; @@ -223,6 +262,7 @@ int arizona_irq_init(struct arizona *arizona) #ifdef CONFIG_MFD_FLORIDA case WM8280: case WM5110: + irq_thread_handler = arizona_irq_thread; aod = &florida_aod; switch (arizona->rev) { @@ -240,6 +280,7 @@ int arizona_irq_init(struct arizona *arizona) #ifdef CONFIG_MFD_CLEARWATER case WM8285: case WM1840: + irq_thread_handler = arizona_aodonly_irq_thread; aod = &clearwater_irq; irq = NULL; @@ -250,6 +291,7 @@ int arizona_irq_init(struct arizona *arizona) #ifdef CONFIG_MFD_LARGO case WM1831: case CS47L24: + irq_thread_handler = arizona_irq_thread; aod = NULL; irq = &largo_irq; @@ -258,6 +300,7 @@ int arizona_irq_init(struct arizona *arizona) #endif #ifdef CONFIG_MFD_WM8997 case WM8997: + irq_thread_handler = arizona_irq_thread; aod = &wm8997_aod; irq = &wm8997_irq; @@ -267,6 +310,7 @@ int arizona_irq_init(struct arizona *arizona) #ifdef CONFIG_MFD_VEGAS case WM8998: case WM1814: + irq_thread_handler = arizona_irq_thread; aod = &vegas_aod; irq = &vegas_irq; @@ -275,6 +319,7 @@ int arizona_irq_init(struct arizona *arizona) #endif #ifdef CONFIG_MFD_MARLEY case CS47L35: + irq_thread_handler = arizona_aodonly_irq_thread; aod = &marley_irq; irq = NULL; @@ -285,6 +330,7 @@ int arizona_irq_init(struct arizona *arizona) #ifdef CONFIG_MFD_MOON case CS47L90: case CS47L91: + irq_thread_handler = arizona_aodonly_irq_thread; aod = &moon_irq; irq = NULL; @@ -401,7 +447,7 @@ int arizona_irq_init(struct arizona *arizona) } } - ret = request_threaded_irq(arizona->irq, NULL, arizona_irq_thread, + ret = request_threaded_irq(arizona->irq, NULL, irq_thread_handler, flags, "arizona", arizona); if (ret != 0) { From ae52c89908f06867f2d20b3ba8d333d25cbbdfd7 Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Wed, 16 Mar 2016 10:18:43 +0000 Subject: [PATCH 1089/1167] mfd: marley: adding register patch Change-Id: Id562b28a62d4a8be33c876d47996ac0f1e65e6d9 Signed-off-by: Piotr Stankiewicz --- drivers/mfd/marley-tables.c | 47 ++++++++++++++++++++++++++++++++++++- 1 file changed, 46 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/marley-tables.c b/drivers/mfd/marley-tables.c index 5066c6454a4..325987bfc5c 100644 --- a/drivers/mfd/marley-tables.c +++ b/drivers/mfd/marley-tables.c @@ -18,10 +18,55 @@ #include "arizona.h" +static const struct reg_default marley_16_patch[] = { + { 0x460, 0x0c40 }, + { 0x461, 0xcd1a }, + { 0x462, 0x0c40 }, + { 0x463, 0xb53b }, + { 0x464, 0x0c40 }, + { 0x465, 0x7503 }, + { 0x466, 0x0c40 }, + { 0x467, 0x4a41 }, + { 0x468, 0x0041 }, + { 0x469, 0x3491 }, + { 0x46a, 0x0841 }, + { 0x46b, 0x1f50 }, + { 0x46c, 0x0446 }, + { 0x46d, 0x14ed }, + { 0x46e, 0x0446 }, + { 0x46f, 0x1455 }, + { 0x470, 0x04c6 }, + { 0x471, 0x1220 }, + { 0x472, 0x04c6 }, + { 0x473, 0x040f }, + { 0x474, 0x04ce }, + { 0x475, 0x0339 }, + { 0x476, 0x05df }, + { 0x477, 0x028f }, + { 0x478, 0x05df }, + { 0x479, 0x0209 }, + { 0x47a, 0x05df }, + { 0x47b, 0x00cf }, + { 0x47c, 0x05df }, + { 0x47d, 0x0001 }, + { 0x47e, 0x07ff }, +}; + /* We use a function so we can use ARRAY_SIZE() */ int marley_patch(struct arizona *arizona) { - return 0; + int ret = 0; + const struct reg_default *patch16 = NULL; + unsigned int num16; + + patch16 = marley_16_patch; + num16 = ARRAY_SIZE(marley_16_patch); + + ret = regmap_register_patch(arizona->regmap, patch16, num16); + if (ret < 0) + dev_err(arizona->dev, "Error applying 16-bit patch: %d\n", ret); + + return ret; } EXPORT_SYMBOL_GPL(marley_patch); From b6f7b1cc8b658cde35840879db31993e3d8b58a6 Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Wed, 16 Mar 2016 09:09:43 +0000 Subject: [PATCH 1090/1167] switch: arizona: charge pump tuning for marley Change-Id: If407f96c9ba0160d3c6b6470a386e2cea86aa288 Signed-off-by: Piotr Stankiewicz --- drivers/switch/switch-arizona.c | 112 ++++++++++++++++++++++++++++++++ 1 file changed, 112 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 5606ae7bc02..40e52aef8f5 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1255,6 +1255,74 @@ static const struct reg_default clearwater_normal_impedance_patch[] = { { 0x483, 0x0023 }, }; +static const struct reg_default marley_low_impedance_patch[] = { + { 0x460, 0x0C40 }, + { 0x461, 0xCD1A }, + { 0x462, 0x0C40 }, + { 0x463, 0xB53B }, + { 0x464, 0x0C41 }, + { 0x465, 0x4826 }, + { 0x466, 0x0C41 }, + { 0x467, 0x2EDA }, + { 0x468, 0x0C41 }, + { 0x469, 0x203A }, + { 0x46A, 0x0841 }, + { 0x46B, 0x121F }, + { 0x46C, 0x0446 }, + { 0x46D, 0x0B6F }, + { 0x46E, 0x0446 }, + { 0x46F, 0x0818 }, + { 0x470, 0x04C6 }, + { 0x471, 0x05BB }, + { 0x472, 0x04C6 }, + { 0x473, 0x040F }, + { 0x474, 0x04CE }, + { 0x475, 0x0339 }, + { 0x476, 0x05DF }, + { 0x477, 0x028F }, + { 0x478, 0x05DF }, + { 0x479, 0x0209 }, + { 0x47A, 0x05DF }, + { 0x47B, 0x00CF }, + { 0x47C, 0x05DF }, + { 0x47D, 0x0001 }, + { 0x47E, 0x07FF }, +}; + +static const struct reg_default marley_normal_impedance_patch[] = { + { 0x460, 0x0C40 }, + { 0x461, 0xCD1A }, + { 0x462, 0x0C40 }, + { 0x463, 0xB53B }, + { 0x464, 0x0C40 }, + { 0x465, 0x7503 }, + { 0x466, 0x0C40 }, + { 0x467, 0x4A41 }, + { 0x468, 0x0041 }, + { 0x469, 0x3491 }, + { 0x46A, 0x0841 }, + { 0x46B, 0x1F50 }, + { 0x46C, 0x0446 }, + { 0x46D, 0x14ED }, + { 0x46E, 0x0446 }, + { 0x46F, 0x1455 }, + { 0x470, 0x04C6 }, + { 0x471, 0x1220 }, + { 0x472, 0x04C6 }, + { 0x473, 0x040F }, + { 0x474, 0x04CE }, + { 0x475, 0x0339 }, + { 0x476, 0x05DF }, + { 0x477, 0x028F }, + { 0x478, 0x05DF }, + { 0x479, 0x0209 }, + { 0x47A, 0x05DF }, + { 0x47B, 0x00CF }, + { 0x47C, 0x05DF }, + { 0x47D, 0x0001 }, + { 0x47E, 0x07FF }, +}; + static const struct reg_default moon_low_impedance_patch[] = { { 0x460, 0x0C21 }, { 0x461, 0xB53C }, @@ -1520,6 +1588,47 @@ static int arizona_clearwater_tune_headphone(struct arizona_extcon_info *info, return 0; } +static int arizona_marley_tune_headphone(struct arizona_extcon_info *info, + int reading) +{ + struct arizona *arizona = info->arizona; + const struct reg_default *patch; + int i, ret, size; + + if (reading <= arizona->pdata.hpdet_short_circuit_imp) { + /* Headphones are always off here so just mark them */ + dev_warn(arizona->dev, "Possible HP short, disabling\n"); + return 0; + } else if (reading <= HP_LOW_IMPEDANCE_LIMIT) { + if (info->hp_imp_level == HP_LOW_IMPEDANCE) + return 0; + + info->hp_imp_level = HP_LOW_IMPEDANCE; + + patch = marley_low_impedance_patch; + size = ARRAY_SIZE(marley_low_impedance_patch); + } else { + if (info->hp_imp_level == HP_NORMAL_IMPEDANCE) + return 0; + + info->hp_imp_level = HP_NORMAL_IMPEDANCE; + + patch = marley_normal_impedance_patch; + size = ARRAY_SIZE(marley_normal_impedance_patch); + } + + for (i = 0; i < size; ++i) { + ret = regmap_write(arizona->regmap, + patch[i].reg, patch[i].def); + if (ret != 0) + dev_warn(arizona->dev, + "Failed to write headphone patch: %x <= %x\n", + patch[i].reg, patch[i].def); + } + + return 0; +} + static int arizona_moon_tune_headphone(struct arizona_extcon_info *info, int reading) { @@ -1589,6 +1698,9 @@ void arizona_set_headphone_imp(struct arizona_extcon_info *info, int imp) case WM1840: arizona_clearwater_tune_headphone(info, arizona->hp_impedance); break; + case CS47L35: + arizona_marley_tune_headphone(info, arizona->hp_impedance); + break; case CS47L90: case CS47L91: arizona_moon_tune_headphone(info, arizona->hp_impedance); From 5054edd2a0f158d32015522ce31b97b21883f0bb Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Wed, 3 Feb 2016 14:07:01 +0000 Subject: [PATCH 1091/1167] mfd: marley: add GPIO IRQs Change-Id: Ib7880ffd6bae3d8f161c5461efd5b347e9b4f115 Signed-off-by: Piotr Stankiewicz --- drivers/mfd/marley-tables.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/mfd/marley-tables.c b/drivers/mfd/marley-tables.c index 325987bfc5c..7b7f8539d99 100644 --- a/drivers/mfd/marley-tables.c +++ b/drivers/mfd/marley-tables.c @@ -128,6 +128,23 @@ static const struct regmap_irq marley_irqs[ARIZONA_NUM_IRQ] = { .mask = CLEARWATER_SPK_OVERHEAT_WARN_EINT1}, [ARIZONA_IRQ_SPK_OVERHEAT] = { .reg_offset = 14, .mask = CLEARWATER_SPK_SHUTDOWN_EINT1}, + + [ARIZONA_IRQ_GP1] = { .reg_offset = 16, + .mask = CLEARWATER_GP1_EINT1}, + [ARIZONA_IRQ_GP2] = { .reg_offset = 16, + .mask = CLEARWATER_GP2_EINT1}, + [ARIZONA_IRQ_GP3] = { .reg_offset = 16, + .mask = CLEARWATER_GP3_EINT1}, + [ARIZONA_IRQ_GP4] = { .reg_offset = 16, + .mask = CLEARWATER_GP4_EINT1}, + [ARIZONA_IRQ_GP5] = { .reg_offset = 16, + .mask = CLEARWATER_GP5_EINT1}, + [ARIZONA_IRQ_GP6] = { .reg_offset = 16, + .mask = CLEARWATER_GP6_EINT1}, + [ARIZONA_IRQ_GP7] = { .reg_offset = 16, + .mask = CLEARWATER_GP7_EINT1}, + [ARIZONA_IRQ_GP8] = { .reg_offset = 16, + .mask = CLEARWATER_GP8_EINT1}, }; const struct regmap_irq_chip marley_irq = { From be79ae15a298d68ddf644376ba855308464cf418 Mon Sep 17 00:00:00 2001 From: Piotr Stankiewicz Date: Wed, 3 Feb 2016 14:09:24 +0000 Subject: [PATCH 1092/1167] gpio: arizona: support for mapping GPIO->IRQ on marley Change-Id: Ia6896ad6555c360ffcd5a2a604568bca36a713bc Signed-off-by: Piotr Stankiewicz --- drivers/gpio/gpio-arizona.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpio/gpio-arizona.c b/drivers/gpio/gpio-arizona.c index d3303522a1c..1d82dceda18 100644 --- a/drivers/gpio/gpio-arizona.c +++ b/drivers/gpio/gpio-arizona.c @@ -279,6 +279,7 @@ static int arizona_gpio_probe(struct platform_device *pdev) arizona_gpio->gpio_chip.direction_output = clearwater_gpio_direction_out; arizona_gpio->gpio_chip.set = clearwater_gpio_set; + arizona_gpio->gpio_chip.to_irq = clearwater_gpio_to_irq; arizona_gpio->gpio_chip.ngpio = MARLEY_NUM_GPIOS; break; From d088fed8bcd338ec473f0f9cbb9b22da2aa36cc6 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 15 Mar 2016 10:17:42 +0000 Subject: [PATCH 1093/1167] ASoC: moon: Reduce headphone power up delay The headphone output enable sequence is much faster on Moon only requiring 6mS. This is applied only for Moon rather than for all chips newer than Moon incase the delay increases on future chips. It is safer to use the larger delay and reduce on a chip by chip basis. Change-Id: Iead6ddf516bbb1796d08ba87792004408fe9c8cd Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 1d4a5887b44..a1a4ad321ea 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2589,6 +2589,18 @@ int arizona_out_ev(struct snd_soc_dapm_widget *w, int event) { struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); + struct arizona *arizona = priv->arizona; + int out_up_delay; + + switch (arizona->type) { + case CS47L90: + case CS47L91: + out_up_delay = 6; + break; + default: + out_up_delay = 17; + break; + } switch (event) { case SND_SOC_DAPM_PRE_PMU: @@ -2600,7 +2612,7 @@ int arizona_out_ev(struct snd_soc_dapm_widget *w, case ARIZONA_OUT3L_ENA_SHIFT: case ARIZONA_OUT3R_ENA_SHIFT: priv->out_up_pending++; - priv->out_up_delay += 17; + priv->out_up_delay += out_up_delay; break; default: break; From e0594bdfac21e7741fad172ac080a858acb88bee Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 10 Mar 2016 16:46:20 +0000 Subject: [PATCH 1094/1167] ASoC: wm_adsp: Improve DSP error handling If we encounter an error on the DSP side whilst user-space is waiting on the poll we should call snd_compr_fragment_elapsed, although data is not actually available we want to wake user-space such that the error can be propagated out quickly. Change-Id: I0ed7476c04511009953ec82d0081330b1a729d1a Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 5ba781a0ebd..e90c901d8d6 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3538,7 +3538,7 @@ int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) ret = wm_adsp_buffer_has_error_locked(buf); if (ret) - goto out_buf_unlock; + goto out_notify; /* Wake the poll to report error */ ret = wm_adsp_host_buffer_read(buf, HOST_BUFFER_FIELD(irq_count), &buf->irq_ack); @@ -3562,6 +3562,7 @@ int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) goto out_buf_unlock; } +out_notify: if (compr->stream) snd_compr_fragment_elapsed(compr->stream); From 507059231f21599405a83e79e476fd174de27d69 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 18 Mar 2016 16:00:58 +0000 Subject: [PATCH 1095/1167] mfd: moon: Update register patch Change-Id: Ib54a362f8fb4aa296945f16312ce6e1948e64534 Signed-off-by: Charles Keepax --- drivers/mfd/moon-tables.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mfd/moon-tables.c b/drivers/mfd/moon-tables.c index 0977e51eaad..e5796db9e02 100644 --- a/drivers/mfd/moon-tables.c +++ b/drivers/mfd/moon-tables.c @@ -48,6 +48,9 @@ static const struct reg_default moon_reva_16_patch[] = { { 0x1391, 0xF6CA }, { 0x1392, 0x0637 }, { 0x1393, 0xFEC8 }, + { 0x281, 0x0000 }, + { 0x282, 0x0000 }, + { 0x4EA, 0x0100 }, { 0x8A, 0xCCCC }, { 0x8A, 0x3333 }, }; From 27c5fb3240c8dfbc1aff8af5d3e03e84ac3f0b9c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 18 Mar 2016 15:57:41 +0000 Subject: [PATCH 1096/1167] ASoC: moon: Remove code that controls EDRE_STEREO This is no longer necessary on Moon, it was a fix for issues on Clearwater. Change-Id: I57cd85b87e59f5683062fc80b901112647e2f270 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 107 ------------------------------------- sound/soc/codecs/arizona.h | 6 --- sound/soc/codecs/moon.c | 12 ++--- 3 files changed, 6 insertions(+), 119 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index a1a4ad321ea..351df127b5d 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2756,113 +2756,6 @@ int clearwater_hp_ev(struct snd_soc_dapm_widget *w, } EXPORT_SYMBOL_GPL(clearwater_hp_ev); -static void moon_analog_post_enable(struct snd_soc_dapm_widget *w) -{ - unsigned int mask, val; - - switch (w->shift) { - case ARIZONA_OUT1L_ENA_SHIFT: - case ARIZONA_OUT1R_ENA_SHIFT: - mask = ARIZONA_HP1_EDRE_STEREO_MASK; - val = ARIZONA_HP1_EDRE_STEREO; - break; - case ARIZONA_OUT2L_ENA_SHIFT: - case ARIZONA_OUT2R_ENA_SHIFT: - mask = ARIZONA_HP2_EDRE_STEREO_MASK; - val = ARIZONA_HP2_EDRE_STEREO; - break; - case ARIZONA_OUT3L_ENA_SHIFT: - case ARIZONA_OUT3R_ENA_SHIFT: - mask = ARIZONA_HP3_EDRE_STEREO_MASK; - val = ARIZONA_HP3_EDRE_STEREO; - break; - default: - return; - } - - snd_soc_update_bits(w->codec, - CLEARWATER_EDRE_HP_STEREO_CONTROL, - mask, val); -} - -static void moon_analog_post_disable(struct snd_soc_dapm_widget *w) -{ - unsigned int mask; - - switch (w->shift) { - case ARIZONA_OUT1L_ENA_SHIFT: - case ARIZONA_OUT1R_ENA_SHIFT: - mask = ARIZONA_HP1_EDRE_STEREO_MASK; - break; - case ARIZONA_OUT2L_ENA_SHIFT: - case ARIZONA_OUT2R_ENA_SHIFT: - mask = ARIZONA_HP2_EDRE_STEREO_MASK; - break; - case ARIZONA_OUT3L_ENA_SHIFT: - case ARIZONA_OUT3R_ENA_SHIFT: - mask = ARIZONA_HP3_EDRE_STEREO_MASK; - break; - default: - return; - } - - snd_soc_update_bits(w->codec, - CLEARWATER_EDRE_HP_STEREO_CONTROL, - mask, 0); -} - -int moon_hp_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) -{ - int ret; - - switch (event) { - case SND_SOC_DAPM_PRE_PMU: - case SND_SOC_DAPM_PRE_PMD: - return arizona_hp_ev(w, kcontrol, event); - case SND_SOC_DAPM_POST_PMU: - ret = arizona_hp_ev(w, kcontrol, event); - if (ret < 0) - return ret; - - moon_analog_post_enable(w); - return 0; - case SND_SOC_DAPM_POST_PMD: - ret = arizona_hp_ev(w, kcontrol, event); - moon_analog_post_disable(w); - return ret; - default: - return -EINVAL; - } -} -EXPORT_SYMBOL_GPL(moon_hp_ev); - -int moon_analog_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) -{ - int ret; - - switch (event) { - case SND_SOC_DAPM_PRE_PMU: - case SND_SOC_DAPM_PRE_PMD: - return arizona_out_ev(w, kcontrol, event); - case SND_SOC_DAPM_POST_PMU: - ret = arizona_out_ev(w, kcontrol, event); - if (ret < 0) - return ret; - - moon_analog_post_enable(w); - return 0; - case SND_SOC_DAPM_POST_PMD: - ret = arizona_out_ev(w, kcontrol, event); - moon_analog_post_disable(w); - return ret; - default: - return -EINVAL; - } -} -EXPORT_SYMBOL_GPL(moon_analog_ev); - int arizona_anc_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index c6c42d3e1ed..ca3dd3ab4ea 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -360,12 +360,6 @@ extern int arizona_hp_ev(struct snd_soc_dapm_widget *w, extern int clearwater_hp_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); -extern int moon_hp_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event); -extern int moon_analog_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event); extern int arizona_anc_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index ee21a0aa3e2..28e46d48a4e 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -1523,27 +1523,27 @@ SND_SOC_DAPM_AIF_OUT("AIF4TX2", NULL, 0, ARIZONA_AIF4_TX_ENABLES, ARIZONA_AIF4TX2_ENA_SHIFT, 0), SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, - ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, moon_hp_ev, + ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, - ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, moon_hp_ev, + ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT2L", ARIZONA_OUTPUT_ENABLES_1, - ARIZONA_OUT2L_ENA_SHIFT, 0, NULL, 0, moon_analog_ev, + ARIZONA_OUT2L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT2R", ARIZONA_OUTPUT_ENABLES_1, - ARIZONA_OUT2R_ENA_SHIFT, 0, NULL, 0, moon_analog_ev, + ARIZONA_OUT2R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT3L", ARIZONA_OUTPUT_ENABLES_1, - ARIZONA_OUT3L_ENA_SHIFT, 0, NULL, 0, moon_analog_ev, + ARIZONA_OUT3L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT3R", ARIZONA_OUTPUT_ENABLES_1, - ARIZONA_OUT3R_ENA_SHIFT, 0, NULL, 0, moon_analog_ev, + ARIZONA_OUT3R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_PGA_E("OUT5L", ARIZONA_OUTPUT_ENABLES_1, From 3bbd59594e0ccb35af8c4f8d05b29ba54a9b9fa9 Mon Sep 17 00:00:00 2001 From: Stuart Henderson Date: Wed, 2 Mar 2016 13:27:26 +0000 Subject: [PATCH 1097/1167] switch: arizona: Record impedances in hundredths of an ohm Sometimes the precision of impedance readings needed is higher than to the nearest ohm. Update functions that interact with the jds reading interface to use hundredths of an ohm instead of ohms. Change-Id: If2d8dd15f238bb9d6bca6c5a9be904ec341f5836 Signed-off-by: Stuart Henderson --- drivers/mfd/arizona-core.c | 2 +- drivers/switch/switch-arizona.c | 102 ++++++++++++++++++------------- include/linux/mfd/arizona/core.h | 8 ++- sound/soc/codecs/arizona.c | 5 +- sound/soc/codecs/marley.c | 5 +- 5 files changed, 72 insertions(+), 50 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 2f5d7a377d2..21ca77ea282 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -2219,7 +2219,7 @@ int arizona_dev_init(struct arizona *arizona) * Give us a sane default for the headphone impedance in case the * extcon driver is not used */ - arizona->hp_impedance = 32; + arizona->hp_impedance_x100 = 3200; switch (arizona->type) { case WM5102: diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 40e52aef8f5..6ad659b5520 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -56,7 +56,7 @@ #define ARIZONA_MICD_CLAMP_MODE_JDL_GP5H 0x9 #define ARIZONA_MICD_CLAMP_MODE_JDH_GP5H 0xb -#define ARIZONA_HPDET_MAX 10000 +#define ARIZONA_HPDET_MAX 1000000 /* 10,000 ohms */ #define HPDET_DEBOUNCE 500 #define DEFAULT_MICD_TIMEOUT 2000 @@ -462,7 +462,7 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, } /* Restore the desired state while not doing the clamp */ - if (!clamp && (arizona->hp_impedance > + if (!clamp && (HOHM_TO_OHM(arizona->hp_impedance_x100) > arizona->pdata.hpdet_short_circuit_imp) && !ep_sel) { ret = regmap_update_bits(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, @@ -849,39 +849,43 @@ static struct { int min; int max; } arizona_hpdet_c_ranges[] = { - { 0, 30 }, - { 8, 100 }, - { 100, 1000 }, - { 1000, 10000 }, + { 0, 3000 }, + { 800, 10000 }, + { 10000, 100000 }, + { 100000, 1000000 }, }; static const struct arizona_hpdet_calibration_data arizona_hpdet_d_ranges[] = { - { 0, 30, 1007000, -7200, 4003, 69300000, 381150, 250000, 1500000}, - { 8, 100, 1007000, -7200, 7975, 69600000, 382800, 250000, 1500000}, - { 100, 1000, 9696000, -79500, 7300, 62900000, 345950, 250000, 1500000}, - { 1000, 10000, 100684000, -949400, 7300, 63200000, 347600, 250000, 1500000}, + { 0, 3000, 1007000, -7200, 4003, 69300000, 381150, + 250000, 1500000}, + { 800, 10000, 1007000, -7200, 7975, 69600000, 382800, + 250000, 1500000}, + { 10000, 100000, 9696000, -79500, 7300, 62900000, 345950, + 250000, 1500000}, + { 100000, 1000000, 100684000, -949400, 7300, 63200000, 347600, + 250000, 1500000}, }; static const struct arizona_hpdet_calibration_data arizona_hpdet_clearwater_ranges[] = { - { 4, 30, 1007000, -7200, 4003, 69300000, 381150, - 250000, 500000}, - { 8, 100, 1007000, -7200, 7975, 69600000, 382800, - 250000, 500000}, - { 100, 1000, 9696000, -79500, 7300, 62900000, 345950, - 250000, 500000}, - { 1000, 10000, 100684000, -949400, 7300, 63200000, 347600, - 250000, 500000}, + { 400, 3000, 1007000, -7200, 4003, 69300000, 381150, + 250000, 500000}, + { 800, 10000, 1007000, -7200, 7975, 69600000, 382800, + 250000, 500000}, + { 10000, 100000, 9696000, -79500, 7300, 62900000, 345950, + 250000, 500000}, + { 100000, 1000000, 100684000, -949400, 7300, 63200000, 347600, + 250000, 500000}, }; static const struct arizona_hpdet_calibration_data arizona_hpdet_moon_ranges[] = { - { 4, 30, 1014000, -4300, 3950, 69300000, 381150, 700000, + { 400, 3000, 1014000, -4300, 3950, 69300000, 381150, 700000, 500000}, - { 8, 100, 1014000, -8600, 7975, 69600000, 382800, 700000, + { 800, 10000, 1014000, -8600, 7975, 69600000, 382800, 700000, 500000}, - { 100, 1000, 9744000, -79500, 7300, 62900000, 345950, 700000, + { 10000, 100000, 9744000, -79500, 7300, 62900000, 345950, 700000, 500000}, - { 1000, 10000, 101158000, -949400, 7300, 63200000, 347600, 700000, + { 100000, 1000000, 101158000, -949400, 7300, 63200000, 347600, 700000, 500000}, }; @@ -912,8 +916,8 @@ static int arizona_hpdet_d_calibrate(const struct arizona_extcon_info *info, val -= info->calib_data[range].C5; /* Round up */ - val += 500000; - val = div_s64(val, 1000000); + val += 5000; + val = div_s64(val, 10000); if (val < 0) return 0; @@ -966,6 +970,7 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) } val &= ARIZONA_HP_LVL_MASK; + val = OHM_TO_HOHM(val); break; case 1: @@ -1011,7 +1016,8 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) dev_dbg(arizona->dev, "HPDET read %d in range %d\n", val, range); - val = arizona_hpdet_b_ranges[range].factor_b + /* Multiply numerator to get hundredths of an ohm. */ + val = (arizona_hpdet_b_ranges[range].factor_b * 100) / ((val * 100) - arizona_hpdet_b_ranges[range].factor_a); break; @@ -1027,8 +1033,9 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) } val &= ARIZONA_HP_LVL_B_MASK; - /* Convert to ohms, the value is in 0.5 ohm increments */ - val /= 2; + /* Convert to hundredths of an ohm, the value is currently in + 0.5 ohm increments */ + val *= 50; if (is_jdx_micdetx_pin) goto exit; @@ -1053,7 +1060,8 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) return -EAGAIN; } - if (range && (val < arizona_hpdet_c_ranges[range].min)) { + if (range && + (val < arizona_hpdet_c_ranges[range].min)) { dev_dbg(arizona->dev, "Reporting range boundary %d\n", arizona_hpdet_c_ranges[range].min); val = arizona_hpdet_c_ranges[range].min; @@ -1069,7 +1077,9 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) } val &= ARIZONA_HP_LVL_B_MASK; - val /= 2; + /* Convert to hundredths of an ohm, the value is currently in + 0.5 ohm increments */ + val *= 50; if (is_jdx_micdetx_pin) goto exit; @@ -1134,22 +1144,23 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) if (info->arizona->pdata.hpdet_ext_res) { - if (info->arizona->pdata.hpdet_ext_res >= val) { + if (OHM_TO_HOHM(info->arizona->pdata.hpdet_ext_res) >= val) { dev_err(arizona->dev, "External resistor (%d) >= measurement (%d)\n", info->arizona->pdata.hpdet_ext_res, - val); + HOHM_TO_OHM(val)); } else { dev_dbg(arizona->dev, "Compensating for external %d ohm resistor\n", info->arizona->pdata.hpdet_ext_res); - val -= info->arizona->pdata.hpdet_ext_res; + val -= OHM_TO_HOHM(info->arizona->pdata.hpdet_ext_res); } } exit: - dev_dbg(arizona->dev, "HP impedance %d ohms\n", val); + dev_dbg(arizona->dev, "HP impedance %d.%02d ohms\n", (val / 100), + (val % 100)); return val; } @@ -1682,28 +1693,28 @@ void arizona_set_headphone_imp(struct arizona_extcon_info *info, int imp) { struct arizona *arizona = info->arizona; - arizona->hp_impedance = imp; + arizona->hp_impedance_x100 = imp; if (arizona->pdata.hpdet_cb) - arizona->pdata.hpdet_cb(arizona->hp_impedance); + arizona->pdata.hpdet_cb(HOHM_TO_OHM(imp)); switch (arizona->type) { case WM5110: - arizona_wm5110_tune_headphone(info, arizona->hp_impedance); + arizona_wm5110_tune_headphone(info, HOHM_TO_OHM(imp)); break; case WM1814: - arizona_wm1814_tune_headphone(info, arizona->hp_impedance); + arizona_wm1814_tune_headphone(info, HOHM_TO_OHM(imp)); break; case WM8285: case WM1840: - arizona_clearwater_tune_headphone(info, arizona->hp_impedance); + arizona_clearwater_tune_headphone(info, HOHM_TO_OHM(imp)); break; case CS47L35: - arizona_marley_tune_headphone(info, arizona->hp_impedance); + arizona_marley_tune_headphone(info, HOHM_TO_OHM(imp)); break; case CS47L90: case CS47L91: - arizona_moon_tune_headphone(info, arizona->hp_impedance); + arizona_moon_tune_headphone(info, HOHM_TO_OHM(imp)); break; default: break; @@ -1773,7 +1784,7 @@ int arizona_hpdet_start(struct arizona_extcon_info *info) if (info->arizona->pdata.fixed_hpdet_imp) { int imp = info->arizona->pdata.fixed_hpdet_imp; - arizona_set_headphone_imp(info, imp); + arizona_set_headphone_imp(info, OHM_TO_HOHM(imp)); ret = -EEXIST; goto skip; @@ -2304,6 +2315,8 @@ static int arizona_hpdet_acc_id_reading(struct arizona_extcon_info *info, if (reading < 0) return reading; + reading = HOHM_TO_OHM(reading); /* Extra precision not required. */ + /* * When we're using HPDET for accessory identification we need * to take multiple measurements, step through them in sequence. @@ -2333,7 +2346,7 @@ static int arizona_hpdet_acc_id_reading(struct arizona_extcon_info *info, reading = info->hpdet_res[0]; /* Sometimes we get false readings due to slow insert */ - if (reading >= ARIZONA_HPDET_MAX && !info->hpdet_retried) { + if (reading >= HOHM_TO_OHM(ARIZONA_HPDET_MAX) && !info->hpdet_retried) { dev_dbg(arizona->dev, "Retrying high impedance\n"); info->num_hpdet_res = 0; @@ -2409,7 +2422,7 @@ static int arizona_hpdet_acc_id_start(struct arizona_extcon_info *info) * If we are not identifying line outputs fake the first * reading at 32 ohms */ - arizona_hpdet_acc_id_reading(info, hp_reading); + arizona_hpdet_acc_id_reading(info, OHM_TO_HOHM(hp_reading)); } return 0; @@ -3050,7 +3063,8 @@ static ssize_t arizona_extcon_show(struct device *dev, struct platform_device *pdev = to_platform_device(dev); struct arizona_extcon_info *info = platform_get_drvdata(pdev); - return scnprintf(buf, PAGE_SIZE, "%d\n", info->arizona->hp_impedance); + return scnprintf(buf, PAGE_SIZE, "%d\n", + HOHM_TO_OHM(info->arizona->hp_impedance_x100)); } static void arizona_micd_manual_timeout(struct arizona_extcon_info *info) diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index 213e22ef57d..c6772915b4e 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -132,6 +132,12 @@ enum arizona_type { #define ARIZONA_NUM_IRQ 90 #define ARIZONA_HP_SHORT_IMPEDANCE 4 + +/* Conversion between ohms and hundredths of an ohm. */ +#define HOHM_TO_OHM(X) ((X == INT_MAX || X == ARIZONA_HP_Z_OPEN) ? \ + X : (X + 50) / 100) +#define OHM_TO_HOHM(X) (X * 100) + struct snd_soc_dapm_context; struct arizona_extcon_info; @@ -162,7 +168,7 @@ struct arizona { bool hpdet_clamp; unsigned int hp_ena; - unsigned int hp_impedance; + unsigned int hp_impedance_x100; struct arizona_extcon_info *extcon_info; struct mutex clk_lock; diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 351df127b5d..8b43f7dc072 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2720,8 +2720,9 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, /* Force off if HPDET clamp is active */ if ((priv->arizona->hpdet_clamp || - priv->arizona->hp_impedance <= - priv->arizona->pdata.hpdet_short_circuit_imp) && !ep_sel) + priv->arizona->hp_impedance_x100 <= + OHM_TO_HOHM(priv->arizona->pdata.hpdet_short_circuit_imp)) && + !ep_sel) val = 0; snd_soc_update_bits(w->codec, ARIZONA_OUTPUT_ENABLES_1, mask, val); diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index 4e2e8922f1c..b186fea7745 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -350,8 +350,9 @@ static int marley_put_demux(struct snd_kcontrol *kcontrol, /* [1] if HP detection clamp is applied while switching to HPOUT, OUT1 * should remain disabled and EDRE should be set to Manual */ - if (!ep_sel && (arizona->hpdet_clamp || (arizona->hp_impedance - <= arizona->pdata.hpdet_short_circuit_imp))) + if (!ep_sel && (arizona->hpdet_clamp || + (arizona->hp_impedance_x100 <= + OHM_TO_HOHM(arizona->pdata.hpdet_short_circuit_imp)))) restore_out = false; if (!ep_sel && arizona->hpdet_clamp) { From 933273fa9af757a26dad9c3e77446702e8624249 Mon Sep 17 00:00:00 2001 From: Stuart Henderson Date: Wed, 27 Jan 2016 16:37:23 +0000 Subject: [PATCH 1098/1167] ASoC: wm_adsp: Add WMFW_CTL_TYPE_HP_IMP control type Add support for WMFW_CTL_TYPE_HP_IMP type controls which will populate the control defined by the firmware with the current headphone impedance. This requires a new call back be set up by the codec driver for each known DSP. Change-Id: Ifb660a489b2cbe68c31017d4ab0d0bc3cfa2d5f5 Signed-off-by: Stuart Henderson --- sound/soc/codecs/wm_adsp.c | 84 ++++++++++++++++++++++++++++++++------ sound/soc/codecs/wm_adsp.h | 1 + sound/soc/codecs/wmfw.h | 5 +++ 3 files changed, 78 insertions(+), 12 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index e90c901d8d6..8d3a9af3d57 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -468,6 +468,7 @@ struct wm_coeff_ctl { struct snd_kcontrol *kcontrol; unsigned int flags; struct mutex lock; + unsigned int type; }; #ifdef CONFIG_DEBUG_FS @@ -1159,7 +1160,8 @@ static int wm_adsp_create_ctl_blk(struct wm_adsp *dsp, const struct wm_adsp_alg_region *alg_region, unsigned int offset, unsigned int len, const char *subname, unsigned int subname_len, - unsigned int flags, int block) + unsigned int flags, unsigned int type, + int block) { struct wm_coeff_ctl *ctl; struct wmfw_ctl_work *ctl_work; @@ -1167,9 +1169,6 @@ static int wm_adsp_create_ctl_blk(struct wm_adsp *dsp, char *region_name; int ret; - if (flags & WMFW_CTL_FLAG_SYS) - return 0; - switch (alg_region->type) { case WMFW_ADSP1_PM: region_name = "PM"; @@ -1242,6 +1241,7 @@ static int wm_adsp_create_ctl_blk(struct wm_adsp *dsp, ctl->dsp = dsp; ctl->flags = flags; + ctl->type = type; ctl->offset = offset; if (len > 512) { adsp_warn(dsp, "Truncating control %s from %d\n", @@ -1260,6 +1260,9 @@ static int wm_adsp_create_ctl_blk(struct wm_adsp *dsp, list_add(&ctl->list, &dsp->ctl_list); mutex_unlock(&dsp->ctl_lock); + if (flags & WMFW_CTL_FLAG_SYS) + return 0; + ctl_work = kzalloc(sizeof(*ctl_work), GFP_KERNEL); if (!ctl_work) { ret = -ENOMEM; @@ -1287,7 +1290,7 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, const struct wm_adsp_alg_region *alg_region, unsigned int offset, unsigned int len, const char *subname, unsigned int subname_len, - unsigned int flags) + unsigned int flags, unsigned int type) { unsigned int ctl_len; int block = 0; @@ -1300,7 +1303,7 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, ret = wm_adsp_create_ctl_blk(dsp, alg_region, offset, ctl_len, subname, subname_len, - flags, block); + flags, type, block); if (ret < 0) return ret; @@ -1313,6 +1316,38 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, return 0; } +static int wm_adsp_hpimp_update(struct wm_adsp *dsp) +{ + struct wm_coeff_ctl *ctl; + int ret = 0; + u32 tmp; + + list_for_each_entry(ctl, &dsp->ctl_list, list) { + if (ctl->type != WMFW_CTL_TYPE_HP_IMP) + continue; + if (!dsp->hpimp_cb) { + adsp_err(dsp, + "HP imp callback not registered: %s\n", + ctl->name); + return -EINVAL; + } + + mutex_lock(&ctl->lock); + + tmp = dsp->hpimp_cb(dsp->dev); + tmp = cpu_to_be32(tmp & 0x00ffffffu); + memcpy(ctl->cache, &tmp, sizeof(tmp)); + ret = wm_coeff_write_control(ctl, ctl->cache, ctl->len); + + mutex_unlock(&ctl->lock); + + if (ret < 0) + return ret; + } + + return 0; +} + struct wm_coeff_parsed_alg { int id; const u8 *name; @@ -1468,6 +1503,20 @@ static int wm_adsp_parse_coeff(struct wm_adsp *dsp, switch (coeff_blk.ctl_type) { case SNDRV_CTL_ELEM_TYPE_BYTES: break; + case WMFW_CTL_TYPE_HP_IMP: + if (!(coeff_blk.flags & WMFW_CTL_FLAG_WRITEABLE)) { + adsp_err(dsp, + "HP imp coeff not writeable: %.*s\n", + coeff_blk.name_len, + coeff_blk.name); + continue; + } + if (coeff_blk.len != WMFW_CTL_HP_IMP_LEN) { + adsp_err(dsp, "Bad HP imp coeff len: %d\n", + coeff_blk.len); + continue; + } + break; default: adsp_err(dsp, "Unknown control type: %d\n", coeff_blk.ctl_type); @@ -1482,7 +1531,8 @@ static int wm_adsp_parse_coeff(struct wm_adsp *dsp, coeff_blk.len, coeff_blk.name, coeff_blk.name_len, - coeff_blk.flags); + coeff_blk.flags, + coeff_blk.ctl_type); if (ret < 0) adsp_err(dsp, "Failed to create control: %.*s, %d\n", coeff_blk.name_len, coeff_blk.name, ret); @@ -1926,7 +1976,8 @@ static int wm_adsp1_setup_algs(struct wm_adsp *dsp) len -= be32_to_cpu(adsp1_alg[i].dm); len *= 4; wm_adsp_create_control(dsp, alg_region, 0, - len, NULL, 0, 0); + len, NULL, 0, 0, + SNDRV_CTL_ELEM_TYPE_BYTES); } else { adsp_warn(dsp, "Missing length info for region DM with ID %x\n", be32_to_cpu(adsp1_alg[i].alg.id)); @@ -1946,7 +1997,8 @@ static int wm_adsp1_setup_algs(struct wm_adsp *dsp) len -= be32_to_cpu(adsp1_alg[i].zm); len *= 4; wm_adsp_create_control(dsp, alg_region, 0, - len, NULL, 0, 0); + len, NULL, 0, 0, + SNDRV_CTL_ELEM_TYPE_BYTES); } else { adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", be32_to_cpu(adsp1_alg[i].alg.id)); @@ -2037,7 +2089,8 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) len -= be32_to_cpu(adsp2_alg[i].xm); len *= 4; wm_adsp_create_control(dsp, alg_region, 0, - len, NULL, 0, 0); + len, NULL, 0, 0, + SNDRV_CTL_ELEM_TYPE_BYTES); } else { adsp_warn(dsp, "Missing length info for region XM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); @@ -2057,7 +2110,8 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) len -= be32_to_cpu(adsp2_alg[i].ym); len *= 4; wm_adsp_create_control(dsp, alg_region, 0, - len, NULL, 0, 0); + len, NULL, 0, 0, + SNDRV_CTL_ELEM_TYPE_BYTES); } else { adsp_warn(dsp, "Missing length info for region YM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); @@ -2077,7 +2131,8 @@ static int wm_adsp2_setup_algs(struct wm_adsp *dsp) len -= be32_to_cpu(adsp2_alg[i].zm); len *= 4; wm_adsp_create_control(dsp, alg_region, 0, - len, NULL, 0, 0); + len, NULL, 0, 0, + SNDRV_CTL_ELEM_TYPE_BYTES); } else { adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", be32_to_cpu(adsp2_alg[i].alg.id)); @@ -2509,6 +2564,11 @@ static void wm_adsp2_boot_work(struct work_struct *work) if (ret != 0) goto err; + /* Populate HP impedance coefficients */ + ret = wm_adsp_hpimp_update(dsp); + if (ret != 0) + goto err; + dsp->running = true; return; diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index b91f078e80e..15a35797cab 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -167,6 +167,7 @@ struct wm_adsp { char *bin_file_name; #endif + unsigned int (*hpimp_cb)(struct device *dev); }; #define WM_ADSP1(wname, num) \ diff --git a/sound/soc/codecs/wmfw.h b/sound/soc/codecs/wmfw.h index 7613d60d62e..f4cccdfa0f1 100644 --- a/sound/soc/codecs/wmfw.h +++ b/sound/soc/codecs/wmfw.h @@ -26,6 +26,11 @@ #define WMFW_CTL_FLAG_WRITEABLE 0x0002 #define WMFW_CTL_FLAG_READABLE 0x0001 +/* Non-ALSA coefficient types start at 0x1000 */ +#define WMFW_CTL_TYPE_HP_IMP 0x1003 /* headphone impedance */ + +#define WMFW_CTL_HP_IMP_LEN 4 + struct wmfw_header { char magic[4]; __le32 len; From 2fa8f6728899394df546a2c515d43983f2f0d512 Mon Sep 17 00:00:00 2001 From: Stuart Henderson Date: Wed, 27 Jan 2016 16:58:26 +0000 Subject: [PATCH 1099/1167] AsoC: arizona: Add support for headphone impedance controls Add a generic headphone impedance call back function and use it to populate the hp imp call back function pointer for each arizona part. Change-Id: If20316aee0e4cd76a6e4e94c2c29f214cf7fdbee Signed-off-by: Stuart Henderson --- sound/soc/codecs/arizona.c | 8 ++++++++ sound/soc/codecs/arizona.h | 2 ++ sound/soc/codecs/clearwater.c | 2 ++ sound/soc/codecs/florida.c | 2 ++ sound/soc/codecs/largo.c | 2 ++ sound/soc/codecs/marley.c | 2 ++ sound/soc/codecs/moon.c | 2 ++ sound/soc/codecs/wm5102.c | 2 ++ 8 files changed, 22 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 8b43f7dc072..1d296cfbb3d 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2781,6 +2781,14 @@ int arizona_anc_ev(struct snd_soc_dapm_widget *w, } EXPORT_SYMBOL_GPL(arizona_anc_ev); +unsigned int arizona_hpimp_cb(struct device *dev) +{ + struct arizona *arizona = dev_get_drvdata(dev); + + return arizona->hp_impedance_x100; +} +EXPORT_SYMBOL_GPL(arizona_hpimp_cb); + static int arizona_dvfs_enable(struct snd_soc_codec *codec) { const struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index ca3dd3ab4ea..bdc0e0606d2 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -364,6 +364,8 @@ extern int arizona_anc_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); +extern unsigned int arizona_hpimp_cb(struct device *dev); + extern int arizona_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); extern int arizona_mux_event(struct snd_soc_dapm_widget *w, diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 3805bb9791e..6d8f9d564ec 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -3058,6 +3058,8 @@ static int clearwater_probe(struct platform_device *pdev) clearwater->core.adsp[i].rate_put_cb = clearwater_adsp_rate_put_cb; + clearwater->core.adsp[i].hpimp_cb = arizona_hpimp_cb; + ret = wm_adsp2_init(&clearwater->core.adsp[i], &clearwater->fw_lock); if (ret != 0) return ret; diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 5df239f0085..59430dee57e 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2517,6 +2517,8 @@ static int florida_probe(struct platform_device *pdev) = arizona->pdata.num_fw_defs[i]; } + florida->core.adsp[i].hpimp_cb = arizona_hpimp_cb; + ret = wm_adsp2_init(&florida->core.adsp[i], &florida->fw_lock); if (ret != 0) goto error; diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index 068da3b6293..344fbf5481b 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -1412,6 +1412,8 @@ static int largo_probe(struct platform_device *pdev) = arizona->pdata.num_fw_defs[i]; } + largo->core.adsp[i].hpimp_cb = arizona_hpimp_cb; + ret = wm_adsp2_init(&largo->core.adsp[i], &largo->fw_lock); if (ret != 0) goto error; diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index b186fea7745..351ef7c5f50 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -2250,6 +2250,8 @@ static int marley_probe(struct platform_device *pdev) marley->core.adsp[i].rate_put_cb = marley_adsp_rate_put_cb; + marley->core.adsp[i].hpimp_cb = arizona_hpimp_cb; + ret = wm_adsp2_init(&marley->core.adsp[i], &marley->fw_lock); if (ret != 0) return ret; diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 28e46d48a4e..8db0ce778fb 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -3010,6 +3010,8 @@ static int moon_probe(struct platform_device *pdev) moon->core.adsp[i].lock_regions = WM_ADSP2_REGION_1_9; + moon->core.adsp[i].hpimp_cb = arizona_hpimp_cb; + ret = wm_adsp2_init(&moon->core.adsp[i], &moon->fw_lock); if (ret != 0) return ret; diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 3cad6ce21a0..3884347515b 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -2185,6 +2185,8 @@ static int wm5102_probe(struct platform_device *pdev) = arizona->pdata.num_fw_defs[0]; } + wm5102->core.adsp[0].hpimp_cb = arizona_hpimp_cb; + ret = wm_adsp2_init(&wm5102->core.adsp[0], &wm5102->fw_lock); if (ret != 0) return ret; From 345875d5be6388b9427a9d1eefe11b84d8d47d1a Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 24 Mar 2016 13:26:32 +0000 Subject: [PATCH 1100/1167] switch: arizona: treat hpdet < series resistance as a short If there is an external series resistor on HPDET this must be subtracted from any reading to get the actual impedance. The code was trapping the case where the measurement was less than the external resistor but incorrectly just reporting the measured value. It's entirely possible that due to component tolerance and general variations a short or very low impedance could be slightly below the declared external resistance, but in those cases it would incorrectly be reported as a much larger impedance. If the measured value is less than the declared series resistance it should be treated as a short circuit. Change-Id: Ic3cd99f949c3c7dedef3bd5893d4a25f5c64c2b5 Signed-off-by: Richard Fitzgerald --- drivers/switch/switch-arizona.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 6ad659b5520..1f9136f4dd8 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -1145,10 +1145,11 @@ static int arizona_hpdet_read(struct arizona_extcon_info *info) if (info->arizona->pdata.hpdet_ext_res) { if (OHM_TO_HOHM(info->arizona->pdata.hpdet_ext_res) >= val) { - dev_err(arizona->dev, + dev_dbg(arizona->dev, "External resistor (%d) >= measurement (%d)\n", info->arizona->pdata.hpdet_ext_res, HOHM_TO_OHM(val)); + val = 0; /* treat as a short */ } else { dev_dbg(arizona->dev, "Compensating for external %d ohm resistor\n", From 20411011b02c4d882f3e58bce0e3a71521247428 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 29 Mar 2016 14:05:23 +0100 Subject: [PATCH 1101/1167] ASoC: wm8997: Remove bogus ASRC Rate control The wm8997 doesn't have any ASRCs Change-Id: I4c8cfdad7b480897caeac440133886d4cdb0c7c3 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm8997.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c index f9e24e7287e..36c3817efdd 100644 --- a/sound/soc/codecs/wm8997.c +++ b/sound/soc/codecs/wm8997.c @@ -243,7 +243,6 @@ ARIZONA_LHPF_CONTROL("LHPF4 Coefficients", ARIZONA_HPLPF4_2), SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), -SOC_VALUE_ENUM("ASRC RATE 1", arizona_asrc_rate1), ARIZONA_MIXER_CONTROLS("Mic", ARIZONA_MICMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("Noise", ARIZONA_NOISEMIX_INPUT_1_SOURCE), From b4e0901cad0810f5d6e7da5aff27b1d20bdcdb77 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 4 Apr 2016 09:43:40 +0100 Subject: [PATCH 1102/1167] ASoC: wm_adsp: Add Clearwater HotWords firmware Change-Id: Ia8ae8d2122431d0a7ee9d289e91b9a4d133b3adc Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 8d3a9af3d57..91646f5a04a 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2351,6 +2351,7 @@ static int wm_adsp_get_features(struct wm_adsp *dsp) case 0x5f003: case 0x6000d: case 0x60037: + case 0x60053: case 0x7000d: case 0x70036: case 0x8000d: From 3a5b1bc26c6383d569d1f1ff514888754e3ac52d Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 15 Feb 2016 14:50:47 +0000 Subject: [PATCH 1103/1167] mfd: arizona: Fix lockdep recursion warning on set_irq_wake Avoid a false recursive locking warning from lockdep by adding a lock class for the arizona IRQ chip. Change-Id: I8d520ad87fb1756cd7919d1f0f17c1dcc0edb142 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-irq.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index b28d1fd98e4..37e0a996d6e 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -214,12 +214,15 @@ static struct irq_chip arizona_irq_chip = { .irq_set_wake = arizona_irq_set_wake, }; +static struct lock_class_key arizona_irq_lock_class; + static int arizona_irq_map(struct irq_domain *h, unsigned int virq, irq_hw_number_t hw) { struct arizona *data = h->host_data; irq_set_chip_data(virq, data); + irq_set_lockdep_class(virq, &arizona_irq_lock_class); irq_set_chip_and_handler(virq, &arizona_irq_chip, handle_simple_irq); irq_set_nested_thread(virq, 1); From 9a14c058483fcb7a4dd88e7c20dd9669235530ce Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 4 Apr 2016 15:02:42 +0100 Subject: [PATCH 1104/1167] switch: arizona: Fix wm8997 configuration Change-Id: I0c74e5f309cc0d5b2ee960bb6dd69a7869698952 Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 1f9136f4dd8..000fe6980ce 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -3471,8 +3471,6 @@ static int arizona_extcon_probe(struct platform_device *pdev) switch (arizona->type) { case WM8997: - info->micd_clamp = true; - info->hpdet_ip_version = 1; break; case WM5102: switch (arizona->rev) { From ff927aab8ae59bcfd4de5e68956745f4b97deafd Mon Sep 17 00:00:00 2001 From: bsapthagiri Date: Mon, 18 Apr 2016 12:36:40 +0530 Subject: [PATCH 1105/1167] ASoC: largo: Add support for the debug firmware Change-Id: Ic8758225334b9f93e0ce2fd2029d284447bf7243 Signed-off-by: bsapthagiri --- sound/soc/codecs/largo.c | 32 +++++++++++++++++++++++++++++++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index 344fbf5481b..da5fd54210e 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -36,7 +36,7 @@ /* Number of compressed DAI hookups, each pair of DSP and dummy CPU * are counted as one DAI */ -#define LARGO_NUM_COMPR_DAI 1 +#define LARGO_NUM_COMPR_DAI 2 #define LARGO_DEFAULT_FRAGMENTS 1 #define LARGO_DEFAULT_FRAGMENT_SIZE 4096 @@ -64,6 +64,10 @@ static const struct { .dai_name = "largo-dsp-voicectrl", .adsp_num = 2, }, + { + .dai_name = "largo-dsp-trace", + .adsp_num = 1, + }, }; static const struct wm_adsp_region largo_dsp2_regions[] = { @@ -896,6 +900,11 @@ static const struct snd_soc_dapm_route largo_dapm_routes[] = { { "Voice Control CPU", NULL, "SYSCLK" }, { "Voice Control DSP", NULL, "SYSCLK" }, + { "Trace CPU", NULL, "Trace DSP" }, + { "Trace DSP", NULL, "DSP2" }, + { "Trace CPU", NULL, "SYSCLK" }, + { "Trace DSP", NULL, "SYSCLK" }, + { "IN1L PGA", NULL, "IN1L" }, { "IN1R PGA", NULL, "IN1R" }, @@ -1117,6 +1126,27 @@ static struct snd_soc_dai_driver largo_dai[] = { .formats = LARGO_FORMATS, }, }, + { + .name = "largo-cpu-trace", + .capture = { + .stream_name = "Trace CPU", + .channels_min = 1, + .channels_max = 6, + .rates = LARGO_RATES, + .formats = LARGO_FORMATS, + }, + .compress_dai = 1, + }, + { + .name = "largo-dsp-trace", + .capture = { + .stream_name = "Trace DSP", + .channels_min = 1, + .channels_max = 6, + .rates = LARGO_RATES, + .formats = LARGO_FORMATS, + }, + }, }; static void largo_compr_irq(struct largo_priv *largo, struct largo_compr *compr) From 0d10012cefbfd17966dc67a7484e247cc18529c3 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 10 Jun 2015 16:34:00 +0100 Subject: [PATCH 1106/1167] ASoC: arizona: No need to update_bits when writing AEC clock control The bits in the ARIZONA_CLOCK_CONTROL register only respond to writes of a '1', a write of '0' is ignored. So there's no need to use update_bits. We can do a simple write to set bits. Change-Id: I6b1a87822143ebe728fa8bfd7d2e17216e80b2bc Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 1d296cfbb3d..2d4a112811b 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2761,7 +2761,6 @@ int arizona_anc_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { - unsigned int mask = 0x3 << w->shift; unsigned int val; switch (event) { @@ -2775,7 +2774,7 @@ int arizona_anc_ev(struct snd_soc_dapm_widget *w, return 0; } - snd_soc_update_bits(w->codec, ARIZONA_CLOCK_CONTROL, mask, val); + snd_soc_write(w->codec, ARIZONA_CLOCK_CONTROL, val); return 0; } From e27f58685e9de6f5fc8550e030d9b6d6c0ef81ea Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 8 Jun 2015 17:22:33 +0100 Subject: [PATCH 1107/1167] mfd: arizona: ARIZONA_CLOCK_CONTROL should be volatile Change-Id: If5cf68b4c35e2f755198ac9f651fe0d62b140086 Signed-off-by: Richard Fitzgerald --- drivers/mfd/clearwater-tables.c | 2 +- drivers/mfd/florida-tables.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index ddf57855bfa..48a49318003 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -1504,7 +1504,6 @@ static const struct reg_default clearwater_reg_default[] = { { 0x00000ef9, 0x0000 }, /* R3833 - ISRC 4 CTRL 1 */ { 0x00000efa, 0x0001 }, /* R3834 - ISRC 4 CTRL 2 */ { 0x00000efb, 0x0000 }, /* R3835 - ISRC 4 CTRL 3 */ - { 0x00000f00, 0x0000 }, /* R3840 (0xF00) - Clock Control */ { 0x00000F01, 0x0000 }, /* R3841 - ANC_SRC */ { 0x00000F02, 0x0000 }, /* R3842 - Arizona DSP Status */ { 0x00000F08, 0x001c }, /* R3848 - ANC Coefficient */ @@ -3190,6 +3189,7 @@ static bool clearwater_16bit_volatile_register(struct device *dev, unsigned int case ARIZONA_FX_CTRL2: case CLEARWATER_ASRC2_STATUS: case CLEARWATER_ASRC1_STATUS: + case ARIZONA_CLOCK_CONTROL: case CLEARWATER_GPIO1_CTRL_1: case CLEARWATER_GPIO2_CTRL_1: case CLEARWATER_GPIO3_CTRL_1: diff --git a/drivers/mfd/florida-tables.c b/drivers/mfd/florida-tables.c index 12e3f90befd..b3fff9773a1 100644 --- a/drivers/mfd/florida-tables.c +++ b/drivers/mfd/florida-tables.c @@ -1660,7 +1660,6 @@ static const struct reg_default florida_reg_default[] = { { 0x00000EF6, 0x0000 }, /* R3830 - ISRC 3 CTRL 1 */ { 0x00000EF7, 0x0000 }, /* R3831 - ISRC 3 CTRL 2 */ { 0x00000EF8, 0x0000 }, /* R3832 - ISRC 3 CTRL 3 */ - { 0x00000F00, 0x0000 }, /* R3840 - Clock Control */ { 0x00000F01, 0x0000 }, /* R3841 - ANC_SRC */ { 0x00000F08, 0x001c }, /* R3848 - ANC Coefficient */ { 0x00000F09, 0x0000 }, /* R3849 - ANC Coefficient */ @@ -3129,6 +3128,7 @@ static bool florida_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_AOD_IRQ_RAW_STATUS: case ARIZONA_FX_CTRL2: case ARIZONA_ASRC_STATUS: + case ARIZONA_CLOCK_CONTROL: case ARIZONA_DSP_STATUS: case ARIZONA_DSP1_STATUS_1: case ARIZONA_DSP1_STATUS_2: From 07889cc738ccbc02a59e5e91a9855c5bc9f02251 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 18 Jan 2016 11:16:28 +0000 Subject: [PATCH 1108/1167] regulator: arizona-ldo1: Convert undefined pdata value to invalid GPIO In pdata we use 0 to mean undefined, since this is the default if that pdata entry is not explicitly set. However 0 is a valid GPIO value so this patch converts pdata 0 to an invalid GPIO number which means that gpio_is_valid() will return the correct answer. Change-Id: Iedbd4eacaeb39e713f336b529d404f7dac351366 Signed-off-by: Richard Fitzgerald --- drivers/regulator/arizona-ldo1.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/regulator/arizona-ldo1.c b/drivers/regulator/arizona-ldo1.c index eaae1d71146..9ae686f7e5e 100644 --- a/drivers/regulator/arizona-ldo1.c +++ b/drivers/regulator/arizona-ldo1.c @@ -277,6 +277,13 @@ static int arizona_ldo1_probe(struct platform_device *pdev) } } + /* Note - we use 0 to mean invalid in pdata so that if it's not + * explicitly set to a value we will ignore it. Convert this to an + * invalid value before using it + */ + if (arizona->pdata.ldoena == 0) + arizona->pdata.ldoena = -1; + config.ena_gpio = arizona->pdata.ldoena; config.ena_gpio_flags = GPIOF_OUT_INIT_LOW; From 72575e9fe11d69f76b9cd5c6d6acb47f96c1bce6 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 13 Oct 2015 11:24:32 +0100 Subject: [PATCH 1109/1167] ASoC: wm_adsp: factor out freeing of alg regions Add a function to delete and free the contents of the alg_regions list. Change-Id: I531fdf9ea1ea8e927904cbda2d2ef1c62d5781ca Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 91646f5a04a..0c72483e329 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1906,6 +1906,19 @@ static struct wm_adsp_alg_region *wm_adsp_create_region(struct wm_adsp *dsp, return alg_region; } +static void wm_adsp_free_alg_regions(struct wm_adsp *dsp) +{ + struct wm_adsp_alg_region *alg_region; + + while (!list_empty(&dsp->alg_regions)) { + alg_region = list_first_entry(&dsp->alg_regions, + struct wm_adsp_alg_region, + list); + list_del(&alg_region->list); + kfree(alg_region); + } +} + static int wm_adsp1_setup_algs(struct wm_adsp *dsp) { struct wmfw_adsp1_id_hdr adsp1_id; @@ -2466,6 +2479,8 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, list_for_each_entry(ctl, &dsp->ctl_list, list) ctl->enabled = 0; + + wm_adsp_free_alg_regions(dsp); break; default: @@ -2716,7 +2731,6 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, struct snd_soc_codec *codec = w->codec; struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); struct wm_adsp *dsp = &dsps[w->shift]; - struct wm_adsp_alg_region *alg_region; struct wm_coeff_ctl *ctl; int ret; @@ -2810,13 +2824,7 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, list_for_each_entry(ctl, &dsp->ctl_list, list) ctl->enabled = 0; - while (!list_empty(&dsp->alg_regions)) { - alg_region = list_first_entry(&dsp->alg_regions, - struct wm_adsp_alg_region, - list); - list_del(&alg_region->list); - kfree(alg_region); - } + wm_adsp_free_alg_regions(dsp); adsp_info(dsp, "Shutdown complete\n"); break; From 674173f4f9f9b2efa1715c14d75207cd991f03d0 Mon Sep 17 00:00:00 2001 From: jjassal Date: Fri, 15 Jul 2016 11:11:09 +0100 Subject: [PATCH 1110/1167] ASoC: moon: Make use of probe stage in wm_adsp driver This adds code from a patch that should have been added during moon development. The original patch was: ASoC: wm_adsp: Add codec_probe and codec_remove stubs Change-Id: I360b9adb2147d9ce5c74c33ea9dae1f65a417e32 Signed-off-by: jjassal --- sound/soc/codecs/moon.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 8db0ce778fb..215c8a6f52d 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -2802,6 +2802,12 @@ static int moon_codec_probe(struct snd_soc_codec *codec) regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_1, ARIZONA_SAMPLE_RATE_1_MASK, 0x03); + for (i = 0; i < MOON_NUM_ADSP; ++i) { + ret = wm_adsp2_codec_probe(&priv->core.adsp[i], codec); + if (ret) + return ret; + } + ret = snd_soc_add_codec_controls(codec, wm_adsp2v2_fw_controls, 14); if (ret != 0) return ret; @@ -2881,6 +2887,10 @@ static int moon_codec_remove(struct snd_soc_codec *codec) regmap_update_bits(arizona->regmap, CLEARWATER_IRQ2_MASK_9, CLEARWATER_DRC2_SIG_DET_EINT2, CLEARWATER_DRC2_SIG_DET_EINT2); + + for (i = 0; i < MOON_NUM_ADSP; ++i) + wm_adsp2_codec_remove(&priv->core.adsp[i], codec); + priv->core.arizona->dapm = NULL; return 0; From 452fcee62f855c770668e7ba61605518ad22c57f Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 11 Jun 2015 11:32:31 +0100 Subject: [PATCH 1111/1167] ASoC: wm_adsp: create ALSA controls from wm_adsp driver Now that we have a codec_probe stage initialization in the wm_adsp driver, we can make the wm_adsp driver create its own ALSA controls instead of having that responsibility pushed to every codec driver. Signed-off-by: Richard Fitzgerald Signed-off-by: Mark Brown (cherry picked from commit 218e508784b6d4d047fa25ce45761043c6840fec) Change-Id: I92c52691e88d30c9479f0228cee5af61ba1e49dd Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 4 -- sound/soc/codecs/florida.c | 4 -- sound/soc/codecs/largo.c | 4 -- sound/soc/codecs/marley.c | 4 -- sound/soc/codecs/moon.c | 4 -- sound/soc/codecs/wm5102.c | 4 -- sound/soc/codecs/wm_adsp.c | 122 +++++++++++++++++++++------------- sound/soc/codecs/wm_adsp.h | 2 - 8 files changed, 77 insertions(+), 71 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 6d8f9d564ec..3f604da3ad2 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2871,10 +2871,6 @@ static int clearwater_codec_probe(struct snd_soc_codec *codec) return ret; } - ret = snd_soc_add_codec_controls(codec, wm_adsp2v2_fw_controls, 14); - if (ret != 0) - return ret; - mutex_lock(&codec->card->dapm_mutex); snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); mutex_unlock(&codec->card->dapm_mutex); diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 59430dee57e..138e071dd00 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2338,10 +2338,6 @@ static int florida_codec_probe(struct snd_soc_codec *codec) return ret; } - ret = snd_soc_add_codec_controls(codec, wm_adsp2_fw_controls, 8); - if (ret != 0) - return ret; - mutex_lock(&codec->card->dapm_mutex); snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); mutex_unlock(&codec->card->dapm_mutex); diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index da5fd54210e..44a04c7fd86 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -1274,10 +1274,6 @@ static int largo_codec_probe(struct snd_soc_codec *codec) if (ret) return ret; - ret = snd_soc_add_codec_controls(codec, &wm_adsp2_fw_controls[2], 4); - if (ret != 0) - return ret; - mutex_lock(&codec->card->dapm_mutex); snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); mutex_unlock(&codec->card->dapm_mutex); diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index 351ef7c5f50..36d1eea7e16 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -2073,10 +2073,6 @@ static int marley_codec_probe(struct snd_soc_codec *codec) return ret; } - ret = snd_soc_add_codec_controls(codec, wm_adsp2v2_fw_controls, 6); - if (ret != 0) - return ret; - mutex_lock(&codec->card->dapm_mutex); snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); mutex_unlock(&codec->card->dapm_mutex); diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 215c8a6f52d..9e48bc27196 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -2808,10 +2808,6 @@ static int moon_codec_probe(struct snd_soc_codec *codec) return ret; } - ret = snd_soc_add_codec_controls(codec, wm_adsp2v2_fw_controls, 14); - if (ret != 0) - return ret; - mutex_lock(&codec->card->dapm_mutex); snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); mutex_unlock(&codec->card->dapm_mutex); diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 3884347515b..83577250666 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -2021,10 +2021,6 @@ static int wm5102_codec_probe(struct snd_soc_codec *codec) if (ret) return ret; - ret = snd_soc_add_codec_controls(codec, wm_adsp2_fw_controls, 2); - if (ret != 0) - return ret; - arizona_init_spk(codec); arizona_init_gpio(codec); diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 0c72483e329..58d2d62ca78 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -768,21 +768,28 @@ static const struct soc_enum wm_adsp2_rate_enum[] = { arizona_rate_text, arizona_rate_val), }; -const struct snd_kcontrol_new wm_adsp2_fw_controls[] = { - SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM("DSP1 Rate", wm_adsp2_rate_enum[0]), - SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM("DSP2 Rate", wm_adsp2_rate_enum[1]), - SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM("DSP3 Rate", wm_adsp2_rate_enum[2]), - SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM("DSP4 Rate", wm_adsp2_rate_enum[3]), +static const struct snd_kcontrol_new wm_adsp2_fw_controls[4][2] = { + { + SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0], + wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM("DSP1 Rate", wm_adsp2_rate_enum[0]), + }, + { + SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1], + wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM("DSP2 Rate", wm_adsp2_rate_enum[1]), + }, + { + SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2], + wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM("DSP3 Rate", wm_adsp2_rate_enum[2]), + }, + { + SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3], + wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM("DSP4 Rate", wm_adsp2_rate_enum[3]), + }, }; -EXPORT_SYMBOL_GPL(wm_adsp2_fw_controls); static const struct soc_enum wm_adsp2v2_rate_enum[] = { SOC_VALUE_ENUM_SINGLE(0, 0, 0xf, ARIZONA_RATE_ENUM_SIZE, @@ -801,37 +808,50 @@ static const struct soc_enum wm_adsp2v2_rate_enum[] = { arizona_rate_text, arizona_rate_val), }; -const struct snd_kcontrol_new wm_adsp2v2_fw_controls[] = { - SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM_EXT("DSP1 Rate", wm_adsp2v2_rate_enum[0], - wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), - SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM_EXT("DSP2 Rate", wm_adsp2v2_rate_enum[1], - wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), - SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM_EXT("DSP3 Rate", wm_adsp2v2_rate_enum[2], - wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), - SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM_EXT("DSP4 Rate", wm_adsp2v2_rate_enum[3], - wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), - SOC_ENUM_EXT("DSP5 Firmware", wm_adsp_fw_enum[4], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM_EXT("DSP5 Rate", wm_adsp2v2_rate_enum[4], - wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), - SOC_ENUM_EXT("DSP6 Firmware", wm_adsp_fw_enum[5], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM_EXT("DSP6 Rate", wm_adsp2v2_rate_enum[5], - wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), - SOC_ENUM_EXT("DSP7 Firmware", wm_adsp_fw_enum[6], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM_EXT("DSP7 Rate", wm_adsp2v2_rate_enum[6], - wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), +static const struct snd_kcontrol_new wm_adsp2v2_fw_controls[7][2] = { + { + SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0], + wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM_EXT("DSP1 Rate", wm_adsp2v2_rate_enum[0], + wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), + }, + { + SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1], + wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM_EXT("DSP2 Rate", wm_adsp2v2_rate_enum[1], + wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), + }, + { + SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2], + wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM_EXT("DSP3 Rate", wm_adsp2v2_rate_enum[2], + wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), + }, + { + SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3], + wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM_EXT("DSP4 Rate", wm_adsp2v2_rate_enum[3], + wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), + }, + { + SOC_ENUM_EXT("DSP5 Firmware", wm_adsp_fw_enum[4], + wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM_EXT("DSP5 Rate", wm_adsp2v2_rate_enum[4], + wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), + }, + { + SOC_ENUM_EXT("DSP6 Firmware", wm_adsp_fw_enum[5], + wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM_EXT("DSP6 Rate", wm_adsp2v2_rate_enum[5], + wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), + }, + { + SOC_ENUM_EXT("DSP7 Firmware", wm_adsp_fw_enum[6], + wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM_EXT("DSP7 Rate", wm_adsp2v2_rate_enum[6], + wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), + }, }; -EXPORT_SYMBOL_GPL(wm_adsp2v2_fw_controls); #endif static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp, @@ -2998,7 +3018,19 @@ static inline int wm_adsp_of_parse_adsp(struct wm_adsp *dsp) int wm_adsp2_codec_probe(struct wm_adsp *dsp, struct snd_soc_codec *codec) { wm_adsp2_init_debugfs(dsp, codec); - return 0; + +#if IS_ENABLED(CONFIG_SND_SOC_ARIZONA) + switch (dsp->rev) { + case 0: + return snd_soc_add_codec_controls(codec, + wm_adsp2_fw_controls[dsp->num - 1], + ARRAY_SIZE(wm_adsp2_fw_controls[0])); + default: + return snd_soc_add_codec_controls(codec, + wm_adsp2v2_fw_controls[dsp->num - 1], + ARRAY_SIZE(wm_adsp2v2_fw_controls[0])); + } +#endif } EXPORT_SYMBOL_GPL(wm_adsp2_codec_probe); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 15a35797cab..cd9338bf899 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -184,8 +184,6 @@ struct wm_adsp { .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD } extern const struct snd_kcontrol_new wm_adsp1_fw_controls[]; -extern const struct snd_kcontrol_new wm_adsp2_fw_controls[]; -extern const struct snd_kcontrol_new wm_adsp2v2_fw_controls[]; int wm_adsp1_init(struct wm_adsp *dsp); int wm_adsp2_init(struct wm_adsp *dsp, struct mutex *fw_lock); From 0dd3c5c1aa7cf178d78f95beb7056324769cdf68 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 18 Jun 2015 13:43:19 +0100 Subject: [PATCH 1112/1167] ASoC: wm_adsp: Move DSP Rate controls into the codec The rate controls are codec-specific, it's not possible to generically say what the range or the meaning of each control is (or even if they exist at all) - that depends on the particular codec. This is currently being handled for Arizona codecs by putting an Arizona-specific table of controls inside the wm_adsp driver. This creates a dependency between wm_adsp and arizona.c, and is an awkward solution if the ADSP is used in another family of codecs Fix this by moving the Arizona-specific rate controls into the Arizona codec drivers. Signed-off-by: Richard Fitzgerald Signed-off-by: Mark Brown (cherry picked from commit 336d0442b9f03a0389baaf09e39880fdd1873cc3) Also added support for ADSP2v2 rate controls on Clearwater, Marley, Moon. Change-Id: Ib9a548247dd176618bc247362e504e2b00b57078 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 121 ++++++++++++++++++++++ sound/soc/codecs/arizona.h | 3 + sound/soc/codecs/clearwater.c | 6 ++ sound/soc/codecs/florida.c | 6 ++ sound/soc/codecs/largo.c | 5 + sound/soc/codecs/marley.c | 6 ++ sound/soc/codecs/moon.c | 6 ++ sound/soc/codecs/wm2200.c | 2 +- sound/soc/codecs/wm5102.c | 5 + sound/soc/codecs/wm_adsp.c | 188 +++------------------------------- sound/soc/codecs/wm_adsp.h | 2 +- 11 files changed, 173 insertions(+), 177 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 2d4a112811b..5b5eca38e4e 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -73,6 +73,10 @@ #define ARIZONA_FMT_I2S_MODE 2 #define ARIZONA_FMT_LEFT_JUSTIFIED_MODE 3 +#define ADSP2V2_RATE_MASK 0x7800 /* DSP_RATE */ +#define ADSP2V2_RATE_SHIFT 11 /* DSP_RATE */ +#define ADSP2V2_RATE_WIDTH 4 /* DSP_RATE */ + #define arizona_fll_err(_fll, fmt, ...) \ dev_err(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__) #define arizona_fll_warn(_fll, fmt, ...) \ @@ -5199,6 +5203,123 @@ int arizona_lhpf_coeff_put(struct snd_kcontrol *kcontrol, } EXPORT_SYMBOL_GPL(arizona_lhpf_coeff_put); +static int arizona_adsp2v2_rate_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); + struct wm_adsp *dsp = &dsps[e->shift_l]; + unsigned int item; + + mutex_lock(&dsp->rate_lock); + + for (item = 0; item < e->max; item++) { + if (e->values[item] == dsp->rate_cache) { + ucontrol->value.enumerated.item[0] = item; + mutex_unlock(&dsp->rate_lock); + return 0; + } + } + + mutex_unlock(&dsp->rate_lock); + + return -EINVAL; +} + +static int arizona_adsp2v2_rate_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); + struct wm_adsp *dsp = &dsps[e->shift_l]; + unsigned int item = ucontrol->value.enumerated.item[0]; + unsigned int val; + int ret = 0; + + if (item >= e->max) + return -EINVAL; + + mutex_lock(&dsp->rate_lock); + + if (e->values[item] != dsp->rate_cache) { + val = e->values[item]; + dsp->rate_cache = val; + + if (dsp->running) { + ret = dsp->rate_put_cb(dsp, ADSP2V2_RATE_MASK, + val << ADSP2V2_RATE_SHIFT); + } + } + + mutex_unlock(&dsp->rate_lock); + + return ret; +} + +static const struct soc_enum arizona_adsp2_rate_enum[] = { + SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP1_CONTROL_1, + ARIZONA_DSP1_RATE_SHIFT, 0xf, + ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP2_CONTROL_1, + ARIZONA_DSP1_RATE_SHIFT, 0xf, + ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP3_CONTROL_1, + ARIZONA_DSP1_RATE_SHIFT, 0xf, + ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP4_CONTROL_1, + ARIZONA_DSP1_RATE_SHIFT, 0xf, + ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), +}; + +const struct snd_kcontrol_new arizona_adsp2_rate_controls[] = { + SOC_ENUM("DSP1 Rate", arizona_adsp2_rate_enum[0]), + SOC_ENUM("DSP2 Rate", arizona_adsp2_rate_enum[1]), + SOC_ENUM("DSP3 Rate", arizona_adsp2_rate_enum[2]), + SOC_ENUM("DSP4 Rate", arizona_adsp2_rate_enum[3]), +}; +EXPORT_SYMBOL_GPL(arizona_adsp2_rate_controls); + +static const struct soc_enum arizona_adsp2v2_rate_enum[] = { + SOC_VALUE_ENUM_SINGLE(0, 0, 0xf, ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(0, 1, 0xf, ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(0, 2, 0xf, ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(0, 3, 0xf, ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(0, 4, 0xf, ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(0, 5, 0xf, ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), + SOC_VALUE_ENUM_SINGLE(0, 6, 0xf, ARIZONA_RATE_ENUM_SIZE, + arizona_rate_text, arizona_rate_val), +}; + +const struct snd_kcontrol_new arizona_adsp2v2_rate_controls[] = { + SOC_ENUM_EXT("DSP1 Rate", arizona_adsp2v2_rate_enum[0], + arizona_adsp2v2_rate_get, arizona_adsp2v2_rate_put), + SOC_ENUM_EXT("DSP2 Rate", arizona_adsp2v2_rate_enum[1], + arizona_adsp2v2_rate_get, arizona_adsp2v2_rate_put), + SOC_ENUM_EXT("DSP3 Rate", arizona_adsp2v2_rate_enum[2], + arizona_adsp2v2_rate_get, arizona_adsp2v2_rate_put), + SOC_ENUM_EXT("DSP4 Rate", arizona_adsp2v2_rate_enum[3], + arizona_adsp2v2_rate_get, arizona_adsp2v2_rate_put), + SOC_ENUM_EXT("DSP5 Rate", arizona_adsp2v2_rate_enum[4], + arizona_adsp2v2_rate_get, arizona_adsp2v2_rate_put), + SOC_ENUM_EXT("DSP6 Rate", arizona_adsp2v2_rate_enum[5], + arizona_adsp2v2_rate_get, arizona_adsp2v2_rate_put), + SOC_ENUM_EXT("DSP7 Rate", arizona_adsp2v2_rate_enum[6], + arizona_adsp2v2_rate_get, arizona_adsp2v2_rate_put), +}; +EXPORT_SYMBOL_GPL(arizona_adsp2v2_rate_controls); + MODULE_DESCRIPTION("ASoC Wolfson Arizona class device support"); MODULE_AUTHOR("Mark Brown "); MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index bdc0e0606d2..d8946e5ff02 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -348,6 +348,9 @@ extern int moon_osr_put(struct snd_kcontrol *kcontrol, extern int moon_lp_mode_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); +extern const struct snd_kcontrol_new arizona_adsp2_rate_controls[]; +extern const struct snd_kcontrol_new arizona_adsp2v2_rate_controls[]; + extern int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 3f604da3ad2..34d76e4fd07 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2871,6 +2871,12 @@ static int clearwater_codec_probe(struct snd_soc_codec *codec) return ret; } + ret = snd_soc_add_codec_controls(codec, + arizona_adsp2v2_rate_controls, + CLEARWATER_NUM_ADSP); + if (ret) + return ret; + mutex_lock(&codec->card->dapm_mutex); snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); mutex_unlock(&codec->card->dapm_mutex); diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 138e071dd00..7f166bf5825 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2338,6 +2338,12 @@ static int florida_codec_probe(struct snd_soc_codec *codec) return ret; } + ret = snd_soc_add_codec_controls(codec, + arizona_adsp2_rate_controls, + FLORIDA_NUM_ADSP); + if (ret) + return ret; + mutex_lock(&codec->card->dapm_mutex); snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); mutex_unlock(&codec->card->dapm_mutex); diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index 44a04c7fd86..e2a2aad7231 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -1274,6 +1274,11 @@ static int largo_codec_probe(struct snd_soc_codec *codec) if (ret) return ret; + ret = snd_soc_add_codec_controls(codec, + &arizona_adsp2_rate_controls[1], 2); + if (ret) + return ret; + mutex_lock(&codec->card->dapm_mutex); snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); mutex_unlock(&codec->card->dapm_mutex); diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index 36d1eea7e16..7c6f792651f 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -2073,6 +2073,12 @@ static int marley_codec_probe(struct snd_soc_codec *codec) return ret; } + ret = snd_soc_add_codec_controls(codec, + arizona_adsp2v2_rate_controls, + MARLEY_NUM_ADSP); + if (ret) + return ret; + mutex_lock(&codec->card->dapm_mutex); snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); mutex_unlock(&codec->card->dapm_mutex); diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 9e48bc27196..164e73d14b6 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -2808,6 +2808,12 @@ static int moon_codec_probe(struct snd_soc_codec *codec) return ret; } + ret = snd_soc_add_codec_controls(codec, + arizona_adsp2v2_rate_controls, + MOON_NUM_ADSP); + if (ret) + return ret; + mutex_lock(&codec->card->dapm_mutex); snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); mutex_unlock(&codec->card->dapm_mutex); diff --git a/sound/soc/codecs/wm2200.c b/sound/soc/codecs/wm2200.c index 57ba315d0c8..ddc98f02ecb 100644 --- a/sound/soc/codecs/wm2200.c +++ b/sound/soc/codecs/wm2200.c @@ -1565,7 +1565,7 @@ static int wm2200_probe(struct snd_soc_codec *codec) return ret; } - ret = snd_soc_add_codec_controls(codec, wm_adsp1_fw_controls, 2); + ret = snd_soc_add_codec_controls(codec, wm_adsp_fw_controls, 2); if (ret != 0) return ret; diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 83577250666..1ccc78fc851 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -2021,6 +2021,11 @@ static int wm5102_codec_probe(struct snd_soc_codec *codec) if (ret) return ret; + ret = snd_soc_add_codec_controls(codec, + arizona_adsp2_rate_controls, 1); + if (ret) + return ret; + arizona_init_spk(codec); arizona_init_gpio(codec); diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 58d2d62ca78..875f5994dd5 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -673,61 +673,6 @@ static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol, return 0; } -static int wm_adsp2v2_rate_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); - struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; - struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); - struct wm_adsp *dsp = &dsps[e->shift_l]; - unsigned int item; - - mutex_lock(&dsp->rate_lock); - - for (item = 0; item < e->max; item++) { - if (e->values[item] == dsp->rate_cache) { - ucontrol->value.enumerated.item[0] = item; - mutex_unlock(&dsp->rate_lock); - return 0; - } - } - - mutex_unlock(&dsp->rate_lock); - - return -EINVAL; -} - -static int wm_adsp2v2_rate_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); - struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; - struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); - struct wm_adsp *dsp = &dsps[e->shift_l]; - unsigned int item = ucontrol->value.enumerated.item[0]; - unsigned int val; - int ret = 0; - - if (item >= e->max) - return -EINVAL; - - mutex_lock(&dsp->rate_lock); - - if (e->values[item] != dsp->rate_cache) { - val = e->values[item]; - dsp->rate_cache = val; - - if (dsp->running) { - ret = dsp->rate_put_cb(dsp, ADSP2V2_RATE_MASK, - val << ADSP2V2_RATE_SHIFT); - } - } - - mutex_unlock(&dsp->rate_lock); - - return ret; -} - static struct soc_enum wm_adsp_fw_enum[] = { SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), @@ -738,121 +683,23 @@ static struct soc_enum wm_adsp_fw_enum[] = { SOC_ENUM_SINGLE(0, 6, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), }; -const struct snd_kcontrol_new wm_adsp1_fw_controls[] = { +const struct snd_kcontrol_new wm_adsp_fw_controls[] = { SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0], wm_adsp_fw_get, wm_adsp_fw_put), SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1], wm_adsp_fw_get, wm_adsp_fw_put), SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2], wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3], + wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM_EXT("DSP5 Firmware", wm_adsp_fw_enum[4], + wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM_EXT("DSP6 Firmware", wm_adsp_fw_enum[5], + wm_adsp_fw_get, wm_adsp_fw_put), + SOC_ENUM_EXT("DSP7 Firmware", wm_adsp_fw_enum[6], + wm_adsp_fw_get, wm_adsp_fw_put), }; -EXPORT_SYMBOL_GPL(wm_adsp1_fw_controls); - -#if IS_ENABLED(CONFIG_SND_SOC_ARIZONA) -static const struct soc_enum wm_adsp2_rate_enum[] = { - SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP1_CONTROL_1, - ARIZONA_DSP1_RATE_SHIFT, 0xf, - ARIZONA_RATE_ENUM_SIZE, - arizona_rate_text, arizona_rate_val), - SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP2_CONTROL_1, - ARIZONA_DSP1_RATE_SHIFT, 0xf, - ARIZONA_RATE_ENUM_SIZE, - arizona_rate_text, arizona_rate_val), - SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP3_CONTROL_1, - ARIZONA_DSP1_RATE_SHIFT, 0xf, - ARIZONA_RATE_ENUM_SIZE, - arizona_rate_text, arizona_rate_val), - SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP4_CONTROL_1, - ARIZONA_DSP1_RATE_SHIFT, 0xf, - ARIZONA_RATE_ENUM_SIZE, - arizona_rate_text, arizona_rate_val), -}; - -static const struct snd_kcontrol_new wm_adsp2_fw_controls[4][2] = { - { - SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM("DSP1 Rate", wm_adsp2_rate_enum[0]), - }, - { - SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM("DSP2 Rate", wm_adsp2_rate_enum[1]), - }, - { - SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM("DSP3 Rate", wm_adsp2_rate_enum[2]), - }, - { - SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM("DSP4 Rate", wm_adsp2_rate_enum[3]), - }, -}; - -static const struct soc_enum wm_adsp2v2_rate_enum[] = { - SOC_VALUE_ENUM_SINGLE(0, 0, 0xf, ARIZONA_RATE_ENUM_SIZE, - arizona_rate_text, arizona_rate_val), - SOC_VALUE_ENUM_SINGLE(0, 1, 0xf, ARIZONA_RATE_ENUM_SIZE, - arizona_rate_text, arizona_rate_val), - SOC_VALUE_ENUM_SINGLE(0, 2, 0xf, ARIZONA_RATE_ENUM_SIZE, - arizona_rate_text, arizona_rate_val), - SOC_VALUE_ENUM_SINGLE(0, 3, 0xf, ARIZONA_RATE_ENUM_SIZE, - arizona_rate_text, arizona_rate_val), - SOC_VALUE_ENUM_SINGLE(0, 4, 0xf, ARIZONA_RATE_ENUM_SIZE, - arizona_rate_text, arizona_rate_val), - SOC_VALUE_ENUM_SINGLE(0, 5, 0xf, ARIZONA_RATE_ENUM_SIZE, - arizona_rate_text, arizona_rate_val), - SOC_VALUE_ENUM_SINGLE(0, 6, 0xf, ARIZONA_RATE_ENUM_SIZE, - arizona_rate_text, arizona_rate_val), -}; - -static const struct snd_kcontrol_new wm_adsp2v2_fw_controls[7][2] = { - { - SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM_EXT("DSP1 Rate", wm_adsp2v2_rate_enum[0], - wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), - }, - { - SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM_EXT("DSP2 Rate", wm_adsp2v2_rate_enum[1], - wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), - }, - { - SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM_EXT("DSP3 Rate", wm_adsp2v2_rate_enum[2], - wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), - }, - { - SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM_EXT("DSP4 Rate", wm_adsp2v2_rate_enum[3], - wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), - }, - { - SOC_ENUM_EXT("DSP5 Firmware", wm_adsp_fw_enum[4], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM_EXT("DSP5 Rate", wm_adsp2v2_rate_enum[4], - wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), - }, - { - SOC_ENUM_EXT("DSP6 Firmware", wm_adsp_fw_enum[5], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM_EXT("DSP6 Rate", wm_adsp2v2_rate_enum[5], - wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), - }, - { - SOC_ENUM_EXT("DSP7 Firmware", wm_adsp_fw_enum[6], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM_EXT("DSP7 Rate", wm_adsp2v2_rate_enum[6], - wm_adsp2v2_rate_get, wm_adsp2v2_rate_put), - }, -}; -#endif +EXPORT_SYMBOL_GPL(wm_adsp_fw_controls); static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp, int type) @@ -3019,18 +2866,9 @@ int wm_adsp2_codec_probe(struct wm_adsp *dsp, struct snd_soc_codec *codec) { wm_adsp2_init_debugfs(dsp, codec); -#if IS_ENABLED(CONFIG_SND_SOC_ARIZONA) - switch (dsp->rev) { - case 0: - return snd_soc_add_codec_controls(codec, - wm_adsp2_fw_controls[dsp->num - 1], - ARRAY_SIZE(wm_adsp2_fw_controls[0])); - default: - return snd_soc_add_codec_controls(codec, - wm_adsp2v2_fw_controls[dsp->num - 1], - ARRAY_SIZE(wm_adsp2v2_fw_controls[0])); - } -#endif + return snd_soc_add_codec_controls(codec, + &wm_adsp_fw_controls[dsp->num - 1], + 1); } EXPORT_SYMBOL_GPL(wm_adsp2_codec_probe); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index cd9338bf899..e7f493ef004 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -183,7 +183,7 @@ struct wm_adsp { .reg = SND_SOC_NOPM, .shift = num, .event = wm_adsp2_event, \ .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD } -extern const struct snd_kcontrol_new wm_adsp1_fw_controls[]; +extern const struct snd_kcontrol_new wm_adsp_fw_controls[]; int wm_adsp1_init(struct wm_adsp *dsp); int wm_adsp2_init(struct wm_adsp *dsp, struct mutex *fw_lock); From f3a4f5b0c98ba0b53226a0915b09d287e0848d9b Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 21 Jan 2016 14:09:37 +0000 Subject: [PATCH 1113/1167] ASoC: arizona: Unregister compressed platform when driver is removed The codec drivers were not unregistering the compressed platform in xxx_remove(). If the codec is built as a module, this would lead to a NULL pointer dereference if the module was unloaded and then re-probed. Change-Id: I4d251ee6d33330d1b93fdcc82eb53a2df6be78df Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 1 + sound/soc/codecs/florida.c | 1 + sound/soc/codecs/largo.c | 1 + sound/soc/codecs/marley.c | 1 + sound/soc/codecs/moon.c | 1 + 5 files changed, 5 insertions(+) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 34d76e4fd07..0dd0710fd8a 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -3127,6 +3127,7 @@ static int clearwater_remove(struct platform_device *pdev) { struct clearwater_priv *clearwater = platform_get_drvdata(pdev); + snd_soc_unregister_platform(&pdev->dev); snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 7f166bf5825..12024174542 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2580,6 +2580,7 @@ static int florida_remove(struct platform_device *pdev) { struct florida_priv *florida = platform_get_drvdata(pdev); + snd_soc_unregister_platform(&pdev->dev); snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index e2a2aad7231..1156592ae52 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -1504,6 +1504,7 @@ static int largo_remove(struct platform_device *pdev) { struct largo_priv *largo = platform_get_drvdata(pdev); + snd_soc_unregister_platform(&pdev->dev); snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index 7c6f792651f..a22fb063077 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -2314,6 +2314,7 @@ static int marley_remove(struct platform_device *pdev) { struct marley_priv *marley = platform_get_drvdata(pdev); + snd_soc_unregister_platform(&pdev->dev); snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 164e73d14b6..356df140ca9 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -3089,6 +3089,7 @@ static int moon_remove(struct platform_device *pdev) { struct moon_priv *moon = platform_get_drvdata(pdev); + snd_soc_unregister_platform(&pdev->dev); snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); From f21e4ab64867a55bc3b40ed2acd05d98810f13ca Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 19 Jan 2016 11:12:31 +0000 Subject: [PATCH 1114/1167] ASoC: wm_adsp: free memory when unloaded or closed The patch adds a wm_adsp2_remove() function to ensure that memory is freed when the driver is unloaded or shut down. Change-Id: Ic809c8e75349763fd5f4cb19077ff641f54afabe Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 27 +++++++++++++++++++++++++++ sound/soc/codecs/wm_adsp.h | 1 + 2 files changed, 28 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 875f5994dd5..e62af5f0b00 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1153,6 +1153,13 @@ static int wm_adsp_create_ctl_blk(struct wm_adsp *dsp, return ret; } +static void wm_adsp_free_ctl_blk(struct wm_coeff_ctl *ctl) +{ + kfree(ctl->cache); + kfree(ctl->name); + kfree(ctl); +} + static int wm_adsp_create_control(struct wm_adsp *dsp, const struct wm_adsp_alg_region *alg_region, unsigned int offset, unsigned int len, @@ -2941,6 +2948,26 @@ int wm_adsp2_init(struct wm_adsp *dsp, struct mutex *fw_lock) } EXPORT_SYMBOL_GPL(wm_adsp2_init); +void wm_adsp2_remove(struct wm_adsp *dsp) +{ + struct wm_coeff_ctl *ctl; + + while (!list_empty(&dsp->ctl_list)) { + ctl = list_first_entry(&dsp->ctl_list, struct wm_coeff_ctl, + list); + list_del(&ctl->list); + wm_adsp_free_ctl_blk(ctl); + } + + if (dsp->firmwares != wm_adsp_fw) { + if (wm_adsp_fw_enum[dsp->num - 1].texts != wm_adsp_fw_text) + kfree(wm_adsp_fw_enum[dsp->num - 1].texts); + + kfree(dsp->firmwares); + } +} +EXPORT_SYMBOL_GPL(wm_adsp2_remove); + static bool wm_adsp_compress_supported(const struct wm_adsp *dsp, const struct snd_compr_stream *stream) { diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index e7f493ef004..519443d68cd 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -187,6 +187,7 @@ extern const struct snd_kcontrol_new wm_adsp_fw_controls[]; int wm_adsp1_init(struct wm_adsp *dsp); int wm_adsp2_init(struct wm_adsp *dsp, struct mutex *fw_lock); +void wm_adsp2_remove(struct wm_adsp *dsp); int wm_adsp2_codec_probe(struct wm_adsp *dsp, struct snd_soc_codec *codec); int wm_adsp2_codec_remove(struct wm_adsp *dsp, struct snd_soc_codec *codec); int wm_adsp1_event(struct snd_soc_dapm_widget *w, From 8cf52c96f1129129d20350e954cd6d9e29f993f2 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 19 Jan 2016 11:12:31 +0000 Subject: [PATCH 1115/1167] ASoC: arizona: call wm_adsp2_remove when codec driver is removed Ensure that the wm_adsp driver cleans up when the codec driver is removed. Change-Id: Ic3dd11aa8cb907105df3e71d64fa0764792bd629 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 5 +++++ sound/soc/codecs/florida.c | 5 +++++ sound/soc/codecs/largo.c | 4 ++++ sound/soc/codecs/marley.c | 5 +++++ sound/soc/codecs/moon.c | 5 +++++ sound/soc/codecs/wm5102.c | 2 ++ 6 files changed, 26 insertions(+) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 0dd0710fd8a..50b70983169 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -3126,12 +3126,17 @@ static int clearwater_probe(struct platform_device *pdev) static int clearwater_remove(struct platform_device *pdev) { struct clearwater_priv *clearwater = platform_get_drvdata(pdev); + int i; snd_soc_unregister_platform(&pdev->dev); snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); clearwater_destroy_compr_info(clearwater); + + for (i = 0; i < CLEARWATER_NUM_ADSP; i++) + wm_adsp2_remove(&clearwater->core.adsp[i]); + mutex_destroy(&clearwater->fw_lock); return 0; diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 12024174542..0f3712d41f5 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2579,12 +2579,17 @@ static int florida_probe(struct platform_device *pdev) static int florida_remove(struct platform_device *pdev) { struct florida_priv *florida = platform_get_drvdata(pdev); + int i; snd_soc_unregister_platform(&pdev->dev); snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); florida_destroy_compr_info(florida); + + for (i = 0; i < FLORIDA_NUM_ADSP; i++) + wm_adsp2_remove(&florida->core.adsp[i]); + mutex_destroy(&florida->fw_lock); return 0; diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index 1156592ae52..debaa033b8a 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -1509,6 +1509,10 @@ static int largo_remove(struct platform_device *pdev) pm_runtime_disable(&pdev->dev); largo_destroy_compr_info(largo); + + wm_adsp2_remove(&largo->core.adsp[1]); + wm_adsp2_remove(&largo->core.adsp[2]); + mutex_destroy(&largo->fw_lock); return 0; diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index a22fb063077..d293231590c 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -2313,12 +2313,17 @@ static int marley_probe(struct platform_device *pdev) static int marley_remove(struct platform_device *pdev) { struct marley_priv *marley = platform_get_drvdata(pdev); + int i; snd_soc_unregister_platform(&pdev->dev); snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); marley_destroy_compr_info(marley); + + for (i = 0; i < MARLEY_NUM_ADSP; i++) + wm_adsp2_remove(&marley->core.adsp[i]); + mutex_destroy(&marley->fw_lock); return 0; diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 356df140ca9..a0103115784 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -3088,12 +3088,17 @@ static int moon_probe(struct platform_device *pdev) static int moon_remove(struct platform_device *pdev) { struct moon_priv *moon = platform_get_drvdata(pdev); + int i; snd_soc_unregister_platform(&pdev->dev); snd_soc_unregister_codec(&pdev->dev); pm_runtime_disable(&pdev->dev); moon_destroy_compr_info(moon); + + for (i = 0; i < MOON_NUM_ADSP; i++) + wm_adsp2_remove(&moon->core.adsp[i]); + mutex_destroy(&moon->fw_lock); return 0; diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 1ccc78fc851..156e85a442d 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -2251,6 +2251,8 @@ static int wm5102_remove(struct platform_device *pdev) wm5102_destroy_compr_info(wm5102); + wm_adsp2_remove(&wm5102->core.adsp[0]); + return 0; } From ced625d6cf3b7af8c080bb0fe1b36b5db6d90829 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 23 Feb 2016 15:22:52 +0000 Subject: [PATCH 1116/1167] extcon: arizona: Fix incorrect argument to extcon_dev_unregister The error path from probe was passing the wrong pointer to extcon_dev_unregister. Change-Id: Id590eb412e92c9d565d9bbb692e871f1b888104e Signed-off-by: Richard Fitzgerald --- drivers/extcon/extcon-arizona.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c index cff90e27cbb..6714aa2db22 100644 --- a/drivers/extcon/extcon-arizona.c +++ b/drivers/extcon/extcon-arizona.c @@ -1821,7 +1821,8 @@ static int arizona_extcon_probe(struct platform_device *pdev) err_input: err_register: pm_runtime_disable(&pdev->dev); - extcon_dev_unregister(&info->edev); + extcon_dev_unregister(info->edev); + return ret; } From 436f3e48d5b99f54e4f091610e7ea1b6704fa064 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 30 Nov 2015 17:35:12 +0000 Subject: [PATCH 1117/1167] ASoC: wm_adsp: Fix incorrect parameter naming in bus error functions The convention in the wm_adsp file is that pointers to struct wm_adsp are called *dsp. Change-Id: I97dd6db0efb3fa7e25b7df0d143f3aa0f08b7239 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 46 +++++++++++++++++++------------------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index e62af5f0b00..c437932e06a 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2586,15 +2586,15 @@ static void wm_adsp_edac_shutdown(struct wm_adsp *dsp) adsp_err(dsp, "Failed to shutdown eDAC firmware\n"); } -static inline void wm_adsp_stop_watchdog(struct wm_adsp *adsp) +static inline void wm_adsp_stop_watchdog(struct wm_adsp *dsp) { - switch (adsp->rev) { + switch (dsp->rev) { case 0: case 1: return; default: - regmap_update_bits(adsp->regmap, - adsp->base + ADSP2_WATCHDOG, + regmap_update_bits(dsp->regmap, + dsp->base + ADSP2_WATCHDOG, ADSP2_WDT_ENA_MASK, 0); } } @@ -3761,16 +3761,16 @@ EXPORT_SYMBOL_GPL(wm_adsp_compr_destroy); /* DSP lock region support */ -int wm_adsp2_lock(struct wm_adsp *adsp, unsigned int lock_regions) +int wm_adsp2_lock(struct wm_adsp *dsp, unsigned int lock_regions) { - struct regmap *regmap_32bit = adsp->regmap; + struct regmap *regmap_32bit = dsp->regmap; unsigned int lockcode0, lockcode1, lock_reg; if (!(lock_regions & WM_ADSP2_REGION_ALL)) return 0; lock_regions &= WM_ADSP2_REGION_ALL; - lock_reg = adsp->base + + lock_reg = dsp->base + ADSP2_LOCK_REGION_1_LOCK_REGION_0; while (lock_regions) { @@ -3797,60 +3797,60 @@ int wm_adsp2_lock(struct wm_adsp *adsp, unsigned int lock_regions) } EXPORT_SYMBOL_GPL(wm_adsp2_lock); -irqreturn_t wm_adsp2_bus_error(struct wm_adsp *adsp) +irqreturn_t wm_adsp2_bus_error(struct wm_adsp *dsp) { unsigned int reg_val; int ret = 0; - struct regmap *regmap = adsp->regmap; + struct regmap *regmap = dsp->regmap; - ret = regmap_read(regmap, adsp->base + + ret = regmap_read(regmap, dsp->base + ADSP2_LOCK_REGION_CTRL, ®_val); if (ret != 0) { - adsp_err(adsp, + adsp_err(dsp, "Failed to read Region Lock Ctrl register: %d\n", ret); goto exit; } if (reg_val & ADSP2_WDT_TIMEOUT_STS_MASK) { - adsp_err(adsp, "watchdog timeout error\n"); - wm_adsp_stop_watchdog(adsp); + adsp_err(dsp, "watchdog timeout error\n"); + wm_adsp_stop_watchdog(dsp); } if (reg_val & (ADSP2_SLAVE_ERR_MASK | ADSP2_REGION_LOCK_ERR_MASK)) { if (reg_val & ADSP2_SLAVE_ERR_MASK) - adsp_err(adsp, "bus error: slave error\n"); + adsp_err(dsp, "bus error: slave error\n"); else - adsp_err(adsp, "bus error: region lock error\n"); + adsp_err(dsp, "bus error: region lock error\n"); - ret = regmap_read(regmap, adsp->base + + ret = regmap_read(regmap, dsp->base + ADSP2_BUS_ERR_ADDR, ®_val); if (ret != 0) { - adsp_err(adsp, + adsp_err(dsp, "Failed to read Bus Err Addr register: %d\n", ret); goto exit; } - adsp_err(adsp, "bus error address = 0x%x\n", + adsp_err(dsp, "bus error address = 0x%x\n", (reg_val & ADSP2_BUS_ERR_ADDR_MASK)); - ret = regmap_read(regmap, adsp->base + + ret = regmap_read(regmap, dsp->base + ADSP2_PMEM_ERR_ADDR_XMEM_ERR_ADDR, ®_val); if (ret != 0) { - adsp_err(adsp, + adsp_err(dsp, "Failed to read Pmem Xmem Err Addr register: %d\n", ret); goto exit; } - adsp_err(adsp, "xmem error address = 0x%x\n", + adsp_err(dsp, "xmem error address = 0x%x\n", (reg_val & ADSP2_XMEM_ERR_ADDR_MASK)); - adsp_err(adsp, "pmem error address = 0x%x\n", + adsp_err(dsp, "pmem error address = 0x%x\n", (reg_val & ADSP2_PMEM_ERR_ADDR_MASK) >> ADSP2_PMEM_ERR_ADDR_SHIFT); } - regmap_write(regmap, adsp->base + ADSP2_LOCK_REGION_CTRL, + regmap_write(regmap, dsp->base + ADSP2_LOCK_REGION_CTRL, ADSP2_CTRL_ERR_EINT); exit: return IRQ_HANDLED; From cafb483290833731e5b6060f2be222807e4535a3 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Sun, 14 Jun 2015 15:41:50 +0100 Subject: [PATCH 1118/1167] mfd: arizona: Fix initialisation of the PM runtime The PM runtime core by default assumes a chip is suspended when runtime PM is enabled. Currently the arizona driver probe forcibly calls arizona_runtime_suspend and then enables runtime PM. This is an ugly workaround. This patch adds a call to pm_runtime_set_active to inform the PM core that the device is starting up active and moves the PM enabling to around the IRQ initialisation to avoid any PM callbacks happening until the IRQs are initialised so that it is safe for PM operation to enable/disable the IRQ. Signed-off-by: Charles Keepax Signed-off-by: Lee Jones (cherry picked from commit 72e43164fd472f6c2659c8313b87da962322dbcf) Change-Id: I21bef7499f996d0d935012d6f1cabf836388a49d Signed-off-by: Richard Fitzgerald --- drivers/mfd/arizona-core.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 21ca77ea282..cfb566d5dac 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -2014,14 +2014,6 @@ int arizona_dev_init(struct arizona *arizona) goto err_reset; } -#ifdef CONFIG_PM_RUNTIME - arizona_runtime_suspend(arizona->dev); -#endif - - pm_runtime_set_autosuspend_delay(arizona->dev, 100); - pm_runtime_use_autosuspend(arizona->dev); - pm_runtime_enable(arizona->dev); - arizona_get_num_micbias(arizona, &max_micbias, &num_child_micbias); for (i = 0; i < max_micbias; i++) { @@ -2203,11 +2195,17 @@ int arizona_dev_init(struct arizona *arizona) arizona->pdata.spk_fmt[i]); } + pm_runtime_set_active(arizona->dev); + pm_runtime_enable(arizona->dev); + /* Set up for interrupts */ ret = arizona_irq_init(arizona); if (ret != 0) goto err_reset; + pm_runtime_set_autosuspend_delay(arizona->dev, 100); + pm_runtime_use_autosuspend(arizona->dev); + arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", arizona_clkgen_err, arizona); arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", From 11210ea7bf63b42eb980f47ee34da595dcf48f42 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 18 Mar 2016 13:38:44 +0000 Subject: [PATCH 1119/1167] ASoC: arizona: Prefer lower FRATIO in pseudo-fractional mode When setting up an FLL in pseudo-fractional mode it is preferred to use a lower FRATIO if possible to give a higher reference clock frequency. This patch swaps the two loops in arizona_calc_fratio() so that lower FRATIOs are tried first. The decrementing loop is also changed to start from init_ratio because the original settings might already give a fractional value for N.K Change-Id: I543a4cf0b2e61123356c841f257fbb46d8c19507 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 5b5eca38e4e..79114b34e48 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -4311,7 +4311,21 @@ static int arizona_calc_fratio(struct arizona_fll *fll, init_ratio, fref, refdiv); while (div <= ARIZONA_FLL_MAX_REFDIV) { - for (ratio = init_ratio; ratio <= ARIZONA_FLL_MAX_FRATIO; + /* start from init_ratio because this may already give a + * fractional N.K + */ + for (ratio = init_ratio; ratio > 0; ratio--) { + if (fvco % (ratio * fref)) { + cfg->refdiv = refdiv; + cfg->fratio = ratio - 1; + arizona_fll_dbg(fll, + "pseudo: found fref=%u refdiv=%d(%d) ratio=%d\n", + fref, refdiv, div, ratio); + return ratio; + } + } + + for (ratio = init_ratio + 1; ratio <= ARIZONA_FLL_MAX_FRATIO; ratio++) { if ((ARIZONA_FLL_VCO_CORNER / 2) / (fll->vco_mult * ratio) < fref) { @@ -4337,17 +4351,6 @@ static int arizona_calc_fratio(struct arizona_fll *fll, } } - for (ratio = init_ratio - 1; ratio > 0; ratio--) { - if (fvco % (ratio * fref)) { - cfg->refdiv = refdiv; - cfg->fratio = ratio - 1; - arizona_fll_dbg(fll, - "pseudo: found fref=%u refdiv=%d(%d) ratio=%d\n", - fref, refdiv, div, ratio); - return ratio; - } - } - div *= 2; fref /= 2; refdiv++; From 08e07a4ef913eaa457c16033628417fb280a5629 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 11 Apr 2016 17:19:50 +0100 Subject: [PATCH 1120/1167] ASoC: largo: Delete unused compressed stream defines The code which used the fragment defines was removed many patches ago but the defines we accidentally left in the source. Change-Id: I79c97d7d03f479d3a5e478790470267a8504eb0e Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/largo.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index debaa033b8a..8842976f25e 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -38,9 +38,6 @@ */ #define LARGO_NUM_COMPR_DAI 2 -#define LARGO_DEFAULT_FRAGMENTS 1 -#define LARGO_DEFAULT_FRAGMENT_SIZE 4096 - struct largo_compr { struct wm_adsp_compr adsp_compr; const char *dai_name; From 6aaeb50ff0ed425e5cd61145ccba463da40c47ed Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 12 Apr 2016 09:41:21 +0100 Subject: [PATCH 1121/1167] ASoC: arizona: remove duplicated test of pdata.ez2ctrl_trigger Rewriting of the irq handlers in earlier patches left a duplicated test of pdata.ez2ctrl_trigger inside an if that already tested this. Change-Id: I6c8fa2a8bf6d175a1ff4b3913e983f3c0dcb5f2e Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 3 +-- sound/soc/codecs/florida.c | 3 +-- sound/soc/codecs/largo.c | 3 +-- sound/soc/codecs/marley.c | 3 +-- sound/soc/codecs/moon.c | 3 +-- 5 files changed, 5 insertions(+), 10 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 50b70983169..2dd1dbca2dc 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2759,8 +2759,7 @@ static void clearwater_compr_irq(struct clearwater_priv *clearwater, if (!compr->trig) { compr->trig = true; - if (arizona->pdata.ez2ctrl_trigger && - wm_adsp_fw_has_voice_trig(compr->adsp_compr.dsp)) + if (wm_adsp_fw_has_voice_trig(compr->adsp_compr.dsp)) arizona->pdata.ez2ctrl_trigger(); } mutex_unlock(&compr->trig_lock); diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 0f3712d41f5..2c96fb18590 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2230,8 +2230,7 @@ static void florida_compr_irq(struct florida_priv *florida, if (!compr->trig) { compr->trig = true; - if (arizona->pdata.ez2ctrl_trigger && - wm_adsp_fw_has_voice_trig(compr->adsp_compr.dsp)) + if (wm_adsp_fw_has_voice_trig(compr->adsp_compr.dsp)) arizona->pdata.ez2ctrl_trigger(); } mutex_unlock(&compr->trig_lock); diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index 8842976f25e..64f4e7fd0b9 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -1161,8 +1161,7 @@ static void largo_compr_irq(struct largo_priv *largo, struct largo_compr *compr) if (!compr->trig) { compr->trig = true; - if (arizona->pdata.ez2ctrl_trigger && - wm_adsp_fw_has_voice_trig(compr->adsp_compr.dsp)) + if (wm_adsp_fw_has_voice_trig(compr->adsp_compr.dsp)) arizona->pdata.ez2ctrl_trigger(); } mutex_unlock(&compr->trig_lock); diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index d293231590c..c44c07cda9a 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -1962,8 +1962,7 @@ static void marley_compr_irq(struct marley_priv *marley, if (!compr->trig) { compr->trig = true; - if (arizona->pdata.ez2ctrl_trigger && - wm_adsp_fw_has_voice_trig(compr->adsp_compr.dsp)) + if (wm_adsp_fw_has_voice_trig(compr->adsp_compr.dsp)) arizona->pdata.ez2ctrl_trigger(); } mutex_unlock(&compr->trig_lock); diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index a0103115784..f80bea2f8b8 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -2698,8 +2698,7 @@ static void moon_compr_irq(struct moon_priv *moon, if (!compr->trig) { compr->trig = true; - if (arizona->pdata.ez2ctrl_trigger && - wm_adsp_fw_has_voice_trig(compr->adsp_compr.dsp)) + if (wm_adsp_fw_has_voice_trig(compr->adsp_compr.dsp)) arizona->pdata.ez2ctrl_trigger(); } mutex_unlock(&compr->trig_lock); From 81346bf02c68ffce20eb55b6db795bd69d24978e Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 7 Mar 2016 16:21:51 +0000 Subject: [PATCH 1122/1167] ASoC: wm_adsp: Use regmap_update_bits to clear bus error interrupt There are other control bits in the register that we don't want to overwrite when clearing the interrupt, so use a regmap_update_bits to acknowledge the interrupt. Change-Id: I921858b58b6730d342c08c5e7e08c9cf2d0aa77d Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index c437932e06a..0f6c76a72ce 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3850,8 +3850,8 @@ irqreturn_t wm_adsp2_bus_error(struct wm_adsp *dsp) >> ADSP2_PMEM_ERR_ADDR_SHIFT); } - regmap_write(regmap, dsp->base + ADSP2_LOCK_REGION_CTRL, - ADSP2_CTRL_ERR_EINT); + regmap_update_bits(regmap, dsp->base + ADSP2_LOCK_REGION_CTRL, + ADSP2_CTRL_ERR_EINT, ADSP2_CTRL_ERR_EINT); exit: return IRQ_HANDLED; } From 61dad7919619f73a8fd024aed3ba2e8b28c79d9e Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 19 Apr 2016 13:16:36 +0100 Subject: [PATCH 1123/1167] mfd: moon: Fill gaps in IRQ registers Ensure the IRQ registers are read in a single bulk read by filling in the gaps with dummy registers, these will read a zeros in the hardware so there are no issues associated with doing this. Change-Id: Id075adb95607ffef80fd0179bf442c4ca5ac8332 Signed-off-by: Charles Keepax --- drivers/mfd/moon-tables.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/moon-tables.c b/drivers/mfd/moon-tables.c index e5796db9e02..5d8455ae18f 100644 --- a/drivers/mfd/moon-tables.c +++ b/drivers/mfd/moon-tables.c @@ -2785,6 +2785,7 @@ static bool moon_16bit_readable_register(struct device *dev, unsigned int reg) case CLEARWATER_IRQ1_STATUS_30: case CLEARWATER_IRQ1_STATUS_31: case CLEARWATER_IRQ1_STATUS_32: + case MOON_IRQ1_STATUS_33: case CLEARWATER_IRQ1_MASK_1: case CLEARWATER_IRQ1_MASK_2: case CLEARWATER_IRQ1_MASK_3: @@ -2843,7 +2844,6 @@ static bool moon_16bit_readable_register(struct device *dev, unsigned int reg) case CLEARWATER_IRQ2_RAW_STATUS_9: case CLEARWATER_INTERRUPT_DEBOUNCE_7: case CLEARWATER_IRQ1_CTRL: - case MOON_IRQ1_STATUS_33: return true; default: return false; @@ -2927,24 +2927,33 @@ static bool moon_16bit_volatile_register(struct device *dev, unsigned int reg) case CLEARWATER_GPIO38_CTRL_1: case CLEARWATER_IRQ1_STATUS_1: case CLEARWATER_IRQ1_STATUS_2: + case CLEARWATER_IRQ1_STATUS_3: + case CLEARWATER_IRQ1_STATUS_4: + case CLEARWATER_IRQ1_STATUS_5: case CLEARWATER_IRQ1_STATUS_6: case CLEARWATER_IRQ1_STATUS_7: + case CLEARWATER_IRQ1_STATUS_8: case CLEARWATER_IRQ1_STATUS_9: + case CLEARWATER_IRQ1_STATUS_10: case CLEARWATER_IRQ1_STATUS_11: case CLEARWATER_IRQ1_STATUS_12: case CLEARWATER_IRQ1_STATUS_13: case CLEARWATER_IRQ1_STATUS_14: case CLEARWATER_IRQ1_STATUS_15: + case CLEARWATER_IRQ1_STATUS_16: case CLEARWATER_IRQ1_STATUS_17: case CLEARWATER_IRQ1_STATUS_18: case CLEARWATER_IRQ1_STATUS_19: + case CLEARWATER_IRQ1_STATUS_20: case CLEARWATER_IRQ1_STATUS_21: case CLEARWATER_IRQ1_STATUS_22: case CLEARWATER_IRQ1_STATUS_23: case CLEARWATER_IRQ1_STATUS_24: case CLEARWATER_IRQ1_STATUS_25: + case CLEARWATER_IRQ1_STATUS_26: case CLEARWATER_IRQ1_STATUS_27: case CLEARWATER_IRQ1_STATUS_28: + case CLEARWATER_IRQ1_STATUS_29: case CLEARWATER_IRQ1_STATUS_30: case CLEARWATER_IRQ1_STATUS_31: case CLEARWATER_IRQ1_STATUS_32: From 984f8f67f1d73377fbf5af4d7e1a6e104e2b61d0 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 19 Apr 2016 13:49:11 +0100 Subject: [PATCH 1124/1167] ASoC: arizona: Move delay into clearwater_spin_sysclk Every invocation of clearwater_spin_sysclk is followed by a 300uS delay move that into the function itself. Change-Id: I23aae1e2280ed40c61564db85869be98a44ff23b Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 7 +++---- sound/soc/codecs/clearwater.c | 5 ----- sound/soc/codecs/marley.c | 4 ---- sound/soc/codecs/moon.c | 5 ----- 4 files changed, 3 insertions(+), 18 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 79114b34e48..c6da5dced0e 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -329,6 +329,8 @@ void clearwater_spin_sysclk(struct arizona *arizona) "%s Failed to read register: %d (%d)\n", __func__, ret, i); } + + udelay(300); } EXPORT_SYMBOL_GPL(clearwater_spin_sysclk); @@ -3728,7 +3730,6 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, } clearwater_spin_sysclk(priv->arizona); - udelay(300); } switch (dai_priv->clk) { @@ -3783,10 +3784,8 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, ret = -EINVAL; } - if (change_rate) { + if (change_rate) clearwater_spin_sysclk(priv->arizona); - udelay(300); - } out: if (change_rate) { diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 2dd1dbca2dc..8e51da26eb3 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -505,10 +505,8 @@ static int clearwater_rate_put(struct snd_kcontrol *kcontrol, /* Apply the rate through the original callback */ clearwater_spin_sysclk(arizona); - udelay(300); ret = snd_soc_update_bits_locked(codec, e->reg, mask, val); clearwater_spin_sysclk(arizona); - udelay(300); out: err = arizona_restore_sources(arizona, cur_sources, @@ -567,11 +565,9 @@ static int clearwater_adsp_rate_put_cb(struct wm_adsp *adsp, } clearwater_spin_sysclk(arizona); - udelay(300); /* Apply the rate */ ret = regmap_update_bits(adsp->regmap, adsp->base, mask, val); clearwater_spin_sysclk(arizona); - udelay(300); out: err = arizona_restore_sources(arizona, cur_sources, @@ -597,7 +593,6 @@ static int clearwater_sysclk_ev(struct snd_soc_dapm_widget *w, struct arizona *arizona = priv->arizona; clearwater_spin_sysclk(arizona); - udelay(300); return 0; } diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index c44c07cda9a..86f61016e76 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -573,10 +573,8 @@ static int marley_rate_put(struct snd_kcontrol *kcontrol, /* Apply the rate through the original callback */ clearwater_spin_sysclk(arizona); - udelay(300); ret = snd_soc_update_bits_locked(codec, e->reg, mask, val); clearwater_spin_sysclk(arizona); - udelay(300); out: err = arizona_restore_sources(arizona, cur_sources, @@ -634,11 +632,9 @@ static int marley_adsp_rate_put_cb(struct wm_adsp *adsp, unsigned int mask, } clearwater_spin_sysclk(arizona); - udelay(300); /* Apply the rate */ ret = regmap_update_bits(adsp->regmap, adsp->base, mask, val); clearwater_spin_sysclk(arizona); - udelay(300); out: err = arizona_restore_sources(arizona, cur_sources, diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index f80bea2f8b8..4bb783992fc 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -512,10 +512,8 @@ static int moon_rate_put(struct snd_kcontrol *kcontrol, /* Apply the rate through the original callback */ clearwater_spin_sysclk(arizona); - udelay(300); ret = snd_soc_update_bits_locked(codec, e->reg, mask, val); clearwater_spin_sysclk(arizona); - udelay(300); out: err = arizona_restore_sources(arizona, cur_sources, @@ -574,11 +572,9 @@ static int moon_adsp_rate_put_cb(struct wm_adsp *adsp, } clearwater_spin_sysclk(arizona); - udelay(300); /* Apply the rate */ ret = regmap_update_bits(adsp->regmap, adsp->base, mask, val); clearwater_spin_sysclk(arizona); - udelay(300); out: err = arizona_restore_sources(arizona, cur_sources, @@ -604,7 +600,6 @@ static int moon_sysclk_ev(struct snd_soc_dapm_widget *w, struct arizona *arizona = priv->arizona; clearwater_spin_sysclk(arizona); - udelay(300); return 0; } From 4d6f3a230d0d8c614f38404a688747f95c05cd05 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 19 Apr 2016 14:23:16 +0100 Subject: [PATCH 1125/1167] ASoC: arizona: Only save and restore registers if necessary Change-Id: Ia78850eff02e56d329345b4c16682823a0e02d85 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index c6da5dced0e..4509afe04b2 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -290,6 +290,10 @@ int arizona_cache_and_clear_sources(struct arizona *arizona, break; } + /* Don't bother to set to zero if it already is */ + if (!cache[i]) + continue; + ret = regmap_write(arizona->regmap, sources[i], 0); @@ -348,6 +352,10 @@ int arizona_restore_sources(struct arizona *arizona, "%s addr: 0x%04x value: 0x%04x\n", __func__, sources[i], cache[i]); + /* All mixers will be at zero no need to write to zero again */ + if (!cache[i]) + continue; + ret = regmap_write(arizona->regmap, sources[i], cache[i]); From 8ca288228af6b603254905ca553a389caebb00e1 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 19 Apr 2016 14:25:42 +0100 Subject: [PATCH 1126/1167] ASoC: arizona: Only clear the cache if we fail to read The mixer source cache each value is read from the regmap so there is no need to clear the cache before just clear any that experience an error. Change-Id: Ifabe0933e09d6c3e0712a31c17eb4c7da229b7b8 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 4509afe04b2..20691113a92 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -271,9 +271,6 @@ int arizona_cache_and_clear_sources(struct arizona *arizona, int ret = 0; int i; - for (i = 0; i < lim; i++) - cache[i] = 0; - for (i = 0; i < lim; i++) { ret = regmap_read(arizona->regmap, sources[i], @@ -287,7 +284,8 @@ int arizona_cache_and_clear_sources(struct arizona *arizona, dev_err(arizona->dev, "%s Failed to cache AIF:0x%04x inputs: %d\n", __func__, sources[i], ret); - break; + cache[i] = 0; + continue; } /* Don't bother to set to zero if it already is */ From 65e7facc750ceb8037b6ff271d3e4dfed28c4375 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 19 Apr 2016 13:51:44 +0100 Subject: [PATCH 1127/1167] ASoC: marley: We should spin SYSCLK after we power it up/down Change-Id: Ib17a59e4c82e0f9a737670518d30a0b04dd8e19b Signed-off-by: Charles Keepax --- sound/soc/codecs/marley.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index 86f61016e76..f868d3b6030 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -651,6 +651,19 @@ static int marley_adsp_rate_put_cb(struct wm_adsp *adsp, unsigned int mask, return ret; } +static int marley_sysclk_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + struct marley_priv *marley = snd_soc_codec_get_drvdata(codec); + struct arizona_priv *priv = &marley->core; + struct arizona *arizona = priv->arizona; + + clearwater_spin_sysclk(arizona); + + return 0; +} + static int marley_adsp_power_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) @@ -1125,7 +1138,8 @@ static const struct snd_kcontrol_new marley_aec_loopback_mux = static const struct snd_soc_dapm_widget marley_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT, - 0, NULL, SND_SOC_DAPM_POST_PMU), + 0, marley_sysclk_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK, ARIZONA_OPCLK_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("DSPCLK", CLEARWATER_DSP_CLOCK_1, 6, From e85270b24c72c0a5af55bcdcb44e508799b098c6 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 12 Apr 2016 13:51:30 +0100 Subject: [PATCH 1128/1167] ASoC: arizona: Optimise FLL wait polling Change-Id: I0ecf8d8ed8d68c24fec1aa787d007ebde7a7752d Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 20691113a92..ea06da97d98 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -4555,12 +4555,23 @@ static int arizona_wait_for_fll(struct arizona_fll *fll, bool requested) break; } - for (i = 0; i < 25; i++) { + for (i = 0; i < 30; i++) { regmap_read(arizona->regmap, reg, &val); status = val & (mask << (fll->id - 1)); if (status == requested) return 0; - msleep(10); + + switch (i) { + case 0 ... 5: + usleep_range(75, 125); + break; + case 11 ... 20: + usleep_range(750, 1250); + break; + case 21 ... 30: + msleep(20); + break; + } } arizona_fll_warn(fll, "Timed out waiting for lock\n"); From b481d83fe7ae9082801a2ad02fee23120f514b4e Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 12 Apr 2016 13:55:25 +0100 Subject: [PATCH 1129/1167] ASoC: arizona: Optimise output bootup delay handling Change-Id: I27ce18fdf8202724d994efaa39134493d1d0107c Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index ea06da97d98..c6342496dc6 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2641,7 +2641,13 @@ int arizona_out_ev(struct snd_soc_dapm_widget *w, case ARIZONA_OUT3R_ENA_SHIFT: priv->out_up_pending--; if (!priv->out_up_pending) { - msleep(priv->out_up_delay); + if (priv->out_up_pending < 20) { + int delay = priv->out_up_delay * 1000; + + usleep_range(delay, delay + 1000); + } else { + msleep(priv->out_up_delay); + } priv->out_up_delay = 0; } break; From e5d407b12b6fd5e140afbcf746d85da6a95bd90c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 21 Apr 2016 09:55:26 +0100 Subject: [PATCH 1130/1167] ASoC: arizona: Change default for init_input to no muxes Every chip being released with muxed inputs has a different configuration it makes more sense to make the vanilla no muxes the default and then always have to specify for new chips. Change-Id: Iff5d6d8616a6abcf73a26e6a67e06d6d6f227c05 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index c6342496dc6..e411e88b4e0 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -860,17 +860,6 @@ int arizona_init_input(struct snd_soc_codec *codec) } switch (arizona->type) { - case WM5102: - case WM5110: - case WM8997: - case WM8280: - case WM8998: - case WM1814: - case WM1831: - case CS47L24: - routes[0].sink = arizona_dmic_inputs[i * 2]; - routes[1].sink = arizona_dmic_inputs[(i * 2) + 1]; - break; case WM8285: case WM1840: routes[0].sink = clearwater_dmic_inputs[i * 2]; @@ -880,10 +869,15 @@ int arizona_init_input(struct snd_soc_codec *codec) routes[0].sink = marley_dmic_inputs[i * 2]; routes[1].sink = marley_dmic_inputs[(i * 2) + 1]; break; - default: + case CS47L90: + case CS47L91: routes[0].sink = moon_dmic_inputs[i * 2]; routes[1].sink = moon_dmic_inputs[(i * 2) + 1]; break; + default: + routes[0].sink = arizona_dmic_inputs[i * 2]; + routes[1].sink = arizona_dmic_inputs[(i * 2) + 1]; + break; } ret = snd_soc_dapm_add_routes(&codec->dapm, routes, 2); From 33abe61d69183987d5d9ac016c2c6fbcac22181c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 21 Apr 2016 10:05:16 +0100 Subject: [PATCH 1131/1167] ASoC: arizona: Remove manual set of sample rate User-space should ensure the correct sample rates are set or machine specific hacks should go in the machine driver. Change-Id: I05eddd89f12e77d28c73d843dc46c53b96fcf91b Signed-off-by: Charles Keepax --- sound/soc/codecs/clearwater.c | 4 ---- sound/soc/codecs/moon.c | 4 ---- 2 files changed, 8 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 8e51da26eb3..61fbddcc3f7 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2855,10 +2855,6 @@ static int clearwater_codec_probe(struct snd_soc_codec *codec) arizona_init_mono(codec); arizona_init_input(codec); - /* Update Sample Rate 1 to 48kHz for cases when no AIF1 hw_params */ - regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_1, - ARIZONA_SAMPLE_RATE_1_MASK, 0x03); - for (i = 0; i < CLEARWATER_NUM_ADSP; ++i) { ret = wm_adsp2_codec_probe(&priv->core.adsp[i], codec); if (ret) diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 4bb783992fc..54ab3d500d3 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -2792,10 +2792,6 @@ static int moon_codec_probe(struct snd_soc_codec *codec) arizona_init_mono(codec); arizona_init_input(codec); - /* Update Sample Rate 1 to 48kHz for cases when no AIF1 hw_params */ - regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_1, - ARIZONA_SAMPLE_RATE_1_MASK, 0x03); - for (i = 0; i < MOON_NUM_ADSP; ++i) { ret = wm_adsp2_codec_probe(&priv->core.adsp[i], codec); if (ret) From 68f369decb6b2f1b187b940d2783c45a7b6bf50a Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 21 Mar 2016 13:20:13 +0000 Subject: [PATCH 1132/1167] ASoC: wm_adsp: Force a read when we detect an error during avail As the AVAIL ioctl doesn't return error information to user-space we falsely report a fragment worth of available data which will cause user-space to issue a read and detect the issue. Change-Id: Ib24ea5af75e4ac22fab7479b7809148a11b5a585 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 0f6c76a72ce..3ca39872e84 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3560,6 +3560,9 @@ int wm_adsp_compr_pointer(struct snd_compr_stream *stream, mutex_lock(&buf->lock); + tstamp->copied_total = compr->copied_total; + tstamp->sampling_rate = compr->sample_rate; + if (!buf->host_buf_ptr) { adsp_warn(buf->dsp, "No host buffer info\n"); ret = -EIO; @@ -3592,14 +3595,19 @@ int wm_adsp_compr_pointer(struct snd_compr_stream *stream, } } - tstamp->copied_total = compr->copied_total; tstamp->copied_total += buf->avail * WM_ADSP_DATA_WORD_SIZE; - tstamp->sampling_rate = compr->sample_rate; adsp_dbg(compr->dsp, "tstamp->copied_total=%d (avail=%d)\n", tstamp->copied_total, buf->avail); + mutex_unlock(&buf->lock); + + return ret; + out_buf_unlock: + /* Get user-space to issue a read so it can detect the error */ + tstamp->copied_total += compr->irq_watermark * WM_ADSP_DATA_WORD_SIZE; + mutex_unlock(&buf->lock); return ret; From f26e9ec6d03ce9f73405d9134042ee87eead8509 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 29 Apr 2016 09:21:00 +0100 Subject: [PATCH 1133/1167] ASoC: wm_adsp: Use correct printf specifier for size_t Change-Id: I6061a7fbf0b06ea2ba26cb01fd9089a67f371576 Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 3ca39872e84..101969fd9bc 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3693,7 +3693,7 @@ static int wm_adsp_compr_read(struct wm_adsp_compr *compr, lockdep_assert_held(&compr->buf->lock); BUG_ON(!compr->buf->host_regions); - adsp_dbg(dsp, "Requested read of %d bytes\n", count); + adsp_dbg(dsp, "Requested read of %zu bytes\n", count); ret = wm_adsp_buffer_has_error_locked(compr->buf); if (ret) From 550e1cde818146cded8b538c09a921ec6e68bf8c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 29 Apr 2016 09:59:21 +0100 Subject: [PATCH 1134/1167] mfd: arizona: Combine IRQ handlers back into one function Having two IRQ handler functions can lead to defined but not used warnings when only some CODECs are enabled in the config. This patch combines these back into a single function to avoid having to pepper the code with more ifdefs. Change-Id: If820c77323bd67e486a304f69e96b194113b9886 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-irq.c | 72 +++++++++++---------------------------- 1 file changed, 19 insertions(+), 53 deletions(-) diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index 37e0a996d6e..c67e486f629 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -131,13 +131,9 @@ static irqreturn_t arizona_irq_thread(int irq, void *data) } do { - if (arizona->aod_irq_chip) { - /* - * Check the AOD status register to determine whether - * the nested IRQ handler should be called. - */ - ret = regmap_read(arizona->regmap, - ARIZONA_AOD_IRQ1, + if (arizona->aod_irq_chip && arizona->irq_chip) { + /* Only handle each domain if it has triggered an IRQ */ + ret = regmap_read(arizona->regmap, ARIZONA_AOD_IRQ1, &val); if (ret == 0 && val != 0) { nest_irq = irq_find_mapping(arizona->virq, 0); @@ -147,22 +143,22 @@ static irqreturn_t arizona_irq_thread(int irq, void *data) "Failed to read AOD IRQ1 %d\n", ret); } - } - /* - * Check if one of the main interrupts is asserted and - * only check that domain if it is. - */ - ret = regmap_read(arizona->regmap, - ARIZONA_IRQ_PIN_STATUS, - &val); - if (ret == 0 && val & ARIZONA_IRQ1_STS) { - nest_irq = irq_find_mapping(arizona->virq, 1); - handle_nested_irq(nest_irq); - } else if (ret != 0) { - dev_err(arizona->dev, - "Failed to read main IRQ status: %d\n", - ret); + ret = regmap_read(arizona->regmap, + ARIZONA_IRQ_PIN_STATUS, + &val); + if (ret == 0 && val & ARIZONA_IRQ1_STS) { + nest_irq = irq_find_mapping(arizona->virq, 1); + handle_nested_irq(nest_irq); + } else if (ret != 0) { + dev_err(arizona->dev, + "Failed to read main IRQ status: %d\n", + ret); + } + } else if (arizona->aod_irq_chip) { + handle_nested_irq(irq_find_mapping(arizona->virq, 0)); + } else if (arizona->irq_chip) { + handle_nested_irq(irq_find_mapping(arizona->virq, 1)); } } while (arizona_irq_still_pending(arizona)); @@ -172,27 +168,6 @@ static irqreturn_t arizona_irq_thread(int irq, void *data) return IRQ_HANDLED; } -static irqreturn_t arizona_aodonly_irq_thread(int irq, void *data) -{ - struct arizona *arizona = data; - int ret; - - ret = pm_runtime_get_sync(arizona->dev); - if (ret < 0) { - dev_err(arizona->dev, "Failed to resume device: %d\n", ret); - return IRQ_NONE; - } - - do { - handle_nested_irq(irq_find_mapping(arizona->virq, 0)); - } while (arizona_irq_still_pending(arizona)); - - pm_runtime_mark_last_busy(arizona->dev); - pm_runtime_put_autosuspend(arizona->dev); - - return IRQ_HANDLED; -} - static void arizona_irq_dummy(struct irq_data *data) { } @@ -250,12 +225,10 @@ int arizona_irq_init(struct arizona *arizona) bool ctrlif_error = true; struct irq_data *irq_data; unsigned int irq_ctrl_reg = ARIZONA_IRQ_CTRL_1; - irq_handler_t irq_thread_handler = NULL; switch (arizona->type) { #ifdef CONFIG_MFD_WM5102 case WM5102: - irq_thread_handler = arizona_irq_thread; aod = &wm5102_aod; irq = &wm5102_irq; @@ -265,7 +238,6 @@ int arizona_irq_init(struct arizona *arizona) #ifdef CONFIG_MFD_FLORIDA case WM8280: case WM5110: - irq_thread_handler = arizona_irq_thread; aod = &florida_aod; switch (arizona->rev) { @@ -283,7 +255,6 @@ int arizona_irq_init(struct arizona *arizona) #ifdef CONFIG_MFD_CLEARWATER case WM8285: case WM1840: - irq_thread_handler = arizona_aodonly_irq_thread; aod = &clearwater_irq; irq = NULL; @@ -294,7 +265,6 @@ int arizona_irq_init(struct arizona *arizona) #ifdef CONFIG_MFD_LARGO case WM1831: case CS47L24: - irq_thread_handler = arizona_irq_thread; aod = NULL; irq = &largo_irq; @@ -303,7 +273,6 @@ int arizona_irq_init(struct arizona *arizona) #endif #ifdef CONFIG_MFD_WM8997 case WM8997: - irq_thread_handler = arizona_irq_thread; aod = &wm8997_aod; irq = &wm8997_irq; @@ -313,7 +282,6 @@ int arizona_irq_init(struct arizona *arizona) #ifdef CONFIG_MFD_VEGAS case WM8998: case WM1814: - irq_thread_handler = arizona_irq_thread; aod = &vegas_aod; irq = &vegas_irq; @@ -322,7 +290,6 @@ int arizona_irq_init(struct arizona *arizona) #endif #ifdef CONFIG_MFD_MARLEY case CS47L35: - irq_thread_handler = arizona_aodonly_irq_thread; aod = &marley_irq; irq = NULL; @@ -333,7 +300,6 @@ int arizona_irq_init(struct arizona *arizona) #ifdef CONFIG_MFD_MOON case CS47L90: case CS47L91: - irq_thread_handler = arizona_aodonly_irq_thread; aod = &moon_irq; irq = NULL; @@ -450,7 +416,7 @@ int arizona_irq_init(struct arizona *arizona) } } - ret = request_threaded_irq(arizona->irq, NULL, irq_thread_handler, + ret = request_threaded_irq(arizona->irq, NULL, arizona_irq_thread, flags, "arizona", arizona); if (ret != 0) { From cc68d3cc95754fd6da73a01a7bfffd7d784032c4 Mon Sep 17 00:00:00 2001 From: Ajit Pandey Date: Wed, 4 May 2016 12:18:08 +0530 Subject: [PATCH 1135/1167] ASoC: florida: Add missing route from OUT3R to SYSCLK Change-Id: I852c35fc7772be194a838de3dee81f3107e67e2a Signed-off-by: Ajit Pandey --- sound/soc/codecs/florida.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index 2c96fb18590..e4e5740c062 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -1730,6 +1730,7 @@ static const struct snd_soc_dapm_route florida_dapm_routes[] = { { "OUT2L", NULL, "SYSCLK" }, { "OUT2R", NULL, "SYSCLK" }, { "OUT3L", NULL, "SYSCLK" }, + { "OUT3R", NULL, "SYSCLK" }, { "OUT4L", NULL, "SYSCLK" }, { "OUT4R", NULL, "SYSCLK" }, { "OUT5L", NULL, "SYSCLK" }, From dd4c01a3a5c17859790fc9e381b92606df52d4db Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 28 Apr 2016 09:52:07 +0100 Subject: [PATCH 1136/1167] ASoC: clearwater: Add missing route from OUT3R to SYSCLK Change-Id: I5ad6993064d492c1e94f2122ed0065b164f9f515 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/clearwater.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 61fbddcc3f7..45cc1f14ba2 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2147,6 +2147,7 @@ static const struct snd_soc_dapm_route clearwater_dapm_routes[] = { { "OUT2L", NULL, "SYSCLK" }, { "OUT2R", NULL, "SYSCLK" }, { "OUT3L", NULL, "SYSCLK" }, + { "OUT3R", NULL, "SYSCLK" }, { "OUT4L", NULL, "SYSCLK" }, { "OUT4R", NULL, "SYSCLK" }, { "OUT5L", NULL, "SYSCLK" }, From ea31c59523abbc8df74ea8b81e6e5bd7deb548d3 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 3 May 2016 14:41:43 +0100 Subject: [PATCH 1137/1167] ASoC: moon: Add missing route from OUT3R to SYSCLK Change-Id: I3fabb4f2e149bbd8654e104c0f47defcaa6d858d Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/moon.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 54ab3d500d3..7e06c1eb748 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -2108,6 +2108,7 @@ static const struct snd_soc_dapm_route moon_dapm_routes[] = { { "OUT2L", NULL, "SYSCLK" }, { "OUT2R", NULL, "SYSCLK" }, { "OUT3L", NULL, "SYSCLK" }, + { "OUT3R", NULL, "SYSCLK" }, { "OUT5L", NULL, "SYSCLK" }, { "OUT5R", NULL, "SYSCLK" }, From f64efafc89fa8198efd67f6157901c90d74a8776 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 22 Apr 2016 15:04:00 +0100 Subject: [PATCH 1138/1167] ASoC: wm_adsp: Only attempt to populate regions if there are compress caps If a firmware with a host buffer was named as a selection that does not define any compressed caps or host buffer regions the driver would attempt to initialize the host buffer and then hit a NULL pointer dereference when it tries to access the caps and host regions. This patch takes additional upstream check that there are valid caps before populating the buffer info. Change-Id: Ia22192e77f59a8870da8016c0edfe40a13280666 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 101969fd9bc..8f99a10ddaa 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2625,7 +2625,8 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, if (ret != 0) goto err; - if (dsp->fw_features.host_read_buf) { + if (dsp->fw_features.host_read_buf && + dsp->firmwares[dsp->fw].num_caps != 0) { ret = wm_adsp_init_host_buf_info(&dsp->compr_buf); if (ret < 0) { adsp_err(dsp, From f7b3943519c0af949e1032ff00b2cfdcfaeb1e9a Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 22 Feb 2016 12:42:03 +0000 Subject: [PATCH 1139/1167] ASoC: wm_adsp: factor out getting base register for a control The lookup of the base register corresponding to a control is duplicated in read and write so factor it out into a separate function. Change-Id: Iba6469323eed3683964134c280475e4febe6d816 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 46 ++++++++++++++++++++------------------ 1 file changed, 24 insertions(+), 22 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 8f99a10ddaa..d8c6d7aaed2 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -779,6 +779,24 @@ static void wm_adsp2v2_show_fw_status(struct wm_adsp *dsp) scratch[1] >> 16); } +static int wm_coeff_base_reg(struct wm_coeff_ctl *ctl, unsigned int *reg) +{ + const struct wm_adsp_alg_region *alg_region = &ctl->alg_region; + struct wm_adsp *dsp = ctl->dsp; + const struct wm_adsp_region *mem; + + mem = wm_adsp_find_region(dsp, alg_region->type); + if (!mem) { + adsp_err(dsp, "No base for region %x\n", + alg_region->type); + return -EINVAL; + } + + *reg = wm_adsp_region_to_reg(mem, ctl->alg_region.base + ctl->offset); + + return 0; +} + static int wm_coeff_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { @@ -792,22 +810,14 @@ static int wm_coeff_info(struct snd_kcontrol *kcontrol, static int wm_coeff_write_control(struct wm_coeff_ctl *ctl, const void *buf, size_t len) { - struct wm_adsp_alg_region *alg_region = &ctl->alg_region; - const struct wm_adsp_region *mem; struct wm_adsp *dsp = ctl->dsp; void *scratch; int ret; unsigned int reg; - mem = wm_adsp_find_region(dsp, alg_region->type); - if (!mem) { - adsp_err(dsp, "No base for region %x\n", - alg_region->type); - return -EINVAL; - } - - reg = ctl->alg_region.base + ctl->offset; - reg = wm_adsp_region_to_reg(mem, reg); + ret = wm_coeff_base_reg(ctl, ®); + if (ret) + return ret; scratch = kmemdup(buf, len, GFP_KERNEL | GFP_DMA); if (!scratch) @@ -853,22 +863,14 @@ static int wm_coeff_put(struct snd_kcontrol *kcontrol, static int wm_coeff_read_control(struct wm_coeff_ctl *ctl, void *buf, size_t len) { - struct wm_adsp_alg_region *alg_region = &ctl->alg_region; - const struct wm_adsp_region *mem; struct wm_adsp *dsp = ctl->dsp; void *scratch; int ret; unsigned int reg; - mem = wm_adsp_find_region(dsp, alg_region->type); - if (!mem) { - adsp_err(dsp, "No base for region %x\n", - alg_region->type); - return -EINVAL; - } - - reg = ctl->alg_region.base + ctl->offset; - reg = wm_adsp_region_to_reg(mem, reg); + ret = wm_coeff_base_reg(ctl, ®); + if (ret) + return ret; scratch = kmalloc(len, GFP_KERNEL | GFP_DMA); if (!scratch) From 665863e06b022b07f349e30f7d9b7844f899faa0 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 22 Feb 2016 13:21:29 +0000 Subject: [PATCH 1140/1167] ASoC: wm_adsp: rename feature flag for EDAC shutdown To avoid confusion with the new shutdown events, rename the feature flag that indicates legacy EDAC shutdown. Change-Id: Ia88a4b845bcb92855a5cae7fdc4c20716c879762 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 4 ++-- sound/soc/codecs/wm_adsp.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index d8c6d7aaed2..4396029a727 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2263,7 +2263,7 @@ static int wm_adsp_get_features(struct wm_adsp *dsp) case 0x4001f: case 0x5001f: case 0x7001f: - dsp->fw_features.shutdown = true; + dsp->fw_features.edac_shutdown = true; default: break; } @@ -2651,7 +2651,7 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, break; }; - if (dsp->fw_features.shutdown) + if (dsp->fw_features.edac_shutdown) wm_adsp_edac_shutdown(dsp); wm_adsp_stop_watchdog(dsp); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 519443d68cd..2b11fbcae60 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -81,7 +81,7 @@ struct wm_adsp_fw_defs { }; struct wm_adsp_fw_features { - bool shutdown:1; + bool edac_shutdown:1; bool ez2control_trigger:1; bool host_read_buf:1; }; From c3750c0ebe3b06cf5f3c2919c6c36bf279721188 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 22 Feb 2016 14:10:42 +0000 Subject: [PATCH 1141/1167] ASoC: wm_adsp: factor out getting region name from type This patch factors out converting a memory region type into a name string, mainly so that it can be used in log commands. Change-Id: I2ef645f70d31bc2edb6308f28e51b57feffd179c Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 57 +++++++++++++++----------------------- 1 file changed, 22 insertions(+), 35 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 4396029a727..037b6cca922 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -471,6 +471,24 @@ struct wm_coeff_ctl { unsigned int type; }; +static const char *wm_adsp_mem_region_name(unsigned int type) +{ + switch (type) { + case WMFW_ADSP1_PM: + return "PM"; + case WMFW_ADSP1_DM: + return "DM"; + case WMFW_ADSP2_XM: + return "XM"; + case WMFW_ADSP2_YM: + return "YM"; + case WMFW_ADSP1_ZM: + return "ZM"; + default: + return NULL; + } +} + #ifdef CONFIG_DEBUG_FS static void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, const char *s) { @@ -1035,26 +1053,11 @@ static int wm_adsp_create_ctl_blk(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl; struct wmfw_ctl_work *ctl_work; char name[WM_ADSP_CONTROL_MAX]; - char *region_name; + const char *region_name; int ret; - switch (alg_region->type) { - case WMFW_ADSP1_PM: - region_name = "PM"; - break; - case WMFW_ADSP1_DM: - region_name = "DM"; - break; - case WMFW_ADSP2_XM: - region_name = "XM"; - break; - case WMFW_ADSP2_YM: - region_name = "YM"; - break; - case WMFW_ADSP1_ZM: - region_name = "ZM"; - break; - default: + region_name = wm_adsp_mem_region_name(alg_region->type); + if (!region_name) { adsp_err(dsp, "Unknown region type: %d\n", alg_region->type); return -EINVAL; } @@ -1610,28 +1613,12 @@ static int wm_adsp_load(struct wm_adsp *dsp) reg = offset; break; case WMFW_ADSP1_PM: - BUG_ON(!mem); - region_name = "PM"; - reg = wm_adsp_region_to_reg(mem, offset); - break; case WMFW_ADSP1_DM: - BUG_ON(!mem); - region_name = "DM"; - reg = wm_adsp_region_to_reg(mem, offset); - break; case WMFW_ADSP2_XM: - BUG_ON(!mem); - region_name = "XM"; - reg = wm_adsp_region_to_reg(mem, offset); - break; case WMFW_ADSP2_YM: - BUG_ON(!mem); - region_name = "YM"; - reg = wm_adsp_region_to_reg(mem, offset); - break; case WMFW_ADSP1_ZM: BUG_ON(!mem); - region_name = "ZM"; + region_name = wm_adsp_mem_region_name(type); reg = wm_adsp_region_to_reg(mem, offset); break; default: From 62efdcf0efcdd942262a827140f4a13d501eea07 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 19 Feb 2016 16:46:51 +0000 Subject: [PATCH 1142/1167] ASoC: wm_adsp: parse event controls This patch parses event controls out of the firmware and adds them to the control list. Code for reading and writing them will be added in future patches. Change-Id: I84985347868e618dabb667cb882579d49ca07286 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 25 +++++++++++++++++++++++++ sound/soc/codecs/wmfw.h | 1 + 2 files changed, 26 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 037b6cca922..0741c19fe35 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1366,6 +1366,21 @@ static inline void wm_coeff_parse_coeff(struct wm_adsp *dsp, const u8 **data, adsp_dbg(dsp, "\tALSA control len: %#x\n", blk->len); } +static int wm_adsp_check_coeff_flags(struct wm_adsp *dsp, + const struct wm_coeff_parsed_coeff *coeff_blk, + unsigned int f_required, + unsigned int f_illegal) +{ + if ((coeff_blk->flags & f_illegal) || + ((coeff_blk->flags & f_required) != f_required)) { + adsp_err(dsp, "Illegal flags 0x%x for control type 0x%x\n", + coeff_blk->flags, coeff_blk->ctl_type); + return -EINVAL; + } + + return 0; +} + static int wm_adsp_parse_coeff(struct wm_adsp *dsp, const struct wmfw_region *region) { @@ -1396,6 +1411,16 @@ static int wm_adsp_parse_coeff(struct wm_adsp *dsp, continue; } break; + case WMFW_CTL_TYPE_HOSTEVENT: + ret = wm_adsp_check_coeff_flags(dsp, &coeff_blk, + WMFW_CTL_FLAG_SYS | + WMFW_CTL_FLAG_VOLATILE | + WMFW_CTL_FLAG_WRITEABLE | + WMFW_CTL_FLAG_READABLE, + 0); + if (ret) + return -EINVAL; + break; default: adsp_err(dsp, "Unknown control type: %d\n", coeff_blk.ctl_type); diff --git a/sound/soc/codecs/wmfw.h b/sound/soc/codecs/wmfw.h index f4cccdfa0f1..f3e65162e6e 100644 --- a/sound/soc/codecs/wmfw.h +++ b/sound/soc/codecs/wmfw.h @@ -27,6 +27,7 @@ #define WMFW_CTL_FLAG_READABLE 0x0001 /* Non-ALSA coefficient types start at 0x1000 */ +#define WMFW_CTL_TYPE_HOSTEVENT 0x1001 /* event control */ #define WMFW_CTL_TYPE_HP_IMP 0x1003 /* headphone impedance */ #define WMFW_CTL_HP_IMP_LEN 4 From 0ac91d82af1818541176918f07d90f3feffa4b3f Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 22 Feb 2016 10:43:44 +0000 Subject: [PATCH 1143/1167] ASoC: wm_adsp: Signal firmware shutdown through event control If the firmware has any event signalling controls, signal them during DSP PRE_PMD to tell the firmware it is about to be stopped. Change-Id: I960fa948394ef56b0201a348006046fa895f4ba9 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 88 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 88 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 0741c19fe35..a2d1427b83f 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -213,6 +213,14 @@ #define ADSP2_LOCK_REGION_SHIFT 16 +#define WM_ADSP_ACKED_CTL_TIMEOUT_MS 100 +#define WM_ADSP_ACKED_CTL_N_QUICKPOLLS 10 + +/* + * Event control messages + */ +#define WM_ADSP_FW_EVENT_SHUTDOWN 0x000001 + static int wm_adsp_init_host_buf_info(struct wm_adsp_compr_buf *buf); static void wm_adsp_free_host_buf_info(struct wm_adsp_compr_buf *buf); @@ -825,6 +833,65 @@ static int wm_coeff_info(struct snd_kcontrol *kcontrol, return 0; } +static int wm_coeff_write_acked_control(struct wm_coeff_ctl *ctl, + unsigned int event_id) +{ + struct wm_adsp *dsp = ctl->dsp; + u32 val = cpu_to_be32(event_id); + unsigned int reg; + int i, ret; + + ret = wm_coeff_base_reg(ctl, ®); + if (ret) + return ret; + + adsp_dbg(dsp, "Sending 0x%x to acked control alg 0x%x %s:0x%x\n", + event_id, ctl->alg_region.alg, + wm_adsp_mem_region_name(ctl->alg_region.type), ctl->offset); + + ret = regmap_raw_write(dsp->regmap, reg, &val, sizeof(val)); + if (ret) { + adsp_err(dsp, "Failed to write %x: %d\n", reg, ret); + return ret; + } + + /* Poll for ack, we initially poll at 1ms intervals for firmwares + * that respond quickly, then go to 10ms polls. A firmware is unlikely + * to ack instantly so we do the first 1ms delay before reading the + * control to avoid a pointless bus transaction + */ + for (i = 0; i < WM_ADSP_ACKED_CTL_TIMEOUT_MS;) { + switch (i) { + case 0 ... WM_ADSP_ACKED_CTL_N_QUICKPOLLS: + usleep_range(1000, 2000); + ++i; + break; + default: + usleep_range(10000, 20000); + i += 10; + break; + } + + ret = regmap_raw_read(dsp->regmap, reg, &val, sizeof(val)); + if (ret) { + adsp_err(dsp, "Failed to read %x: %d\n", reg, ret); + return ret; + } + + if (val == 0) { + adsp_dbg(dsp, "Acked control ACKED at poll %u\n", i); + return 0; + } + } + + adsp_warn(dsp, "Acked control @0x%x alg:0x%x %s:0x%x timed out\n", + reg, ctl->alg_region.alg, + wm_adsp_mem_region_name(ctl->alg_region.type), + ctl->offset); + + return -ETIMEDOUT; +} + static int wm_coeff_write_control(struct wm_coeff_ctl *ctl, const void *buf, size_t len) { @@ -1033,6 +1100,24 @@ static int wm_coeff_sync_controls(struct wm_adsp *dsp) return 0; } +static void wm_adsp_signal_event_controls(struct wm_adsp *dsp, + unsigned int event) +{ + struct wm_coeff_ctl *ctl; + int ret; + + list_for_each_entry(ctl, &dsp->ctl_list, list) { + if (ctl->type != WMFW_CTL_TYPE_HOSTEVENT) + continue; + + ret = wm_coeff_write_acked_control(ctl, event); + if (ret) + adsp_warn(dsp, + "Failed to send 0x%x event to alg 0x%x (%d)\n", + event, ctl->alg_region.alg, ret); + } +} + static void wm_adsp_ctl_work(struct work_struct *work) { struct wmfw_ctl_work *ctl_work = container_of(work, @@ -2665,6 +2750,9 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, if (dsp->fw_features.edac_shutdown) wm_adsp_edac_shutdown(dsp); + else + wm_adsp_signal_event_controls(dsp, + WM_ADSP_FW_EVENT_SHUTDOWN); wm_adsp_stop_watchdog(dsp); From cbb588c0ef26723c9b3f71a94f3fa9b2bdbba1f0 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 22 Feb 2016 16:51:36 +0000 Subject: [PATCH 1144/1167] ASoC: wm_adsp: Support acknowledged controls This patch handles publishing acknowledged controls through ALSA. These controls allow user-side to send events to the firmware and wait for the firmware to acknowledge it. Note that although acked controls only operate in the direction host->firmware, and therefore they are write-only as seen from user- side code, we have to make them readable to account for all the code out there that assumes that ALSA controls are always readable (amixer for example.) Change-Id: I72af6818fd2e5b0f8b4b7a91d055f31677573d51 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 85 ++++++++++++++++++++++++++++++++++++-- sound/soc/codecs/wmfw.h | 1 + 2 files changed, 82 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index a2d1427b83f..96648a43a88 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -215,6 +215,10 @@ #define WM_ADSP_ACKED_CTL_TIMEOUT_MS 100 #define WM_ADSP_ACKED_CTL_N_QUICKPOLLS 10 +#define WM_ADSP_ACKED_CTL_MIN_VALUE 0 +#define WM_ADSP_ACKED_CTL_MAX_VALUE 0xFFFFFF +/* ADSP2V1 accessed through 16-bit register map so only low 16-bits atomic */ +#define WM_ADSP_ACKED_CTL_MAX_VALUE_V1 0xFFFF /* * Event control messages @@ -828,8 +832,30 @@ static int wm_coeff_info(struct snd_kcontrol *kcontrol, { struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; - uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; - uinfo->count = ctl->len; + switch (ctl->type) { + case WMFW_CTL_TYPE_ACKED: + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.min = WM_ADSP_ACKED_CTL_MIN_VALUE; + + switch (ctl->dsp->rev) { + case 0: + uinfo->value.integer.max = + WM_ADSP_ACKED_CTL_MAX_VALUE_V1; + break; + default: + uinfo->value.integer.max = WM_ADSP_ACKED_CTL_MAX_VALUE; + break; + } + + uinfo->value.integer.step = 1; + uinfo->count = 1; + break; + default: + uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; + uinfo->count = ctl->len; + break; + } + return 0; } @@ -892,6 +918,22 @@ static int wm_coeff_write_acked_control(struct wm_coeff_ctl *ctl, return -ETIMEDOUT; } +static int wm_coeff_put_acked(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct wm_coeff_ctl *ctl = + (struct wm_coeff_ctl *)kcontrol->private_value; + unsigned int val = ucontrol->value.integer.value[0]; + + if (!ctl->enabled) + return -EPERM; + + if (val == 0) + return 0; /* 0 means no event */ + + return wm_coeff_write_acked_control(ctl, val); +} + static int wm_coeff_write_control(struct wm_coeff_ctl *ctl, const void *buf, size_t len) { @@ -1002,6 +1044,20 @@ static int wm_coeff_get(struct snd_kcontrol *kcontrol, return ret; } +static int wm_coeff_get_acked(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + /* Although it's not useful to read an acked control, we must satisfy + * user-side assumptions that all controls are readable and that a + * write of the same value should be filtered out (it's valid to send + * the same event number again to the firmware). We therefore return 0, + * meaning "no event" so valid event numbers will always be a change + */ + ucontrol->value.integer.value[0] = 0; + + return 0; +} + struct wmfw_ctl_work { struct wm_adsp *dsp; struct wm_coeff_ctl *ctl; @@ -1023,8 +1079,6 @@ static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl) kcontrol->name = ctl->name; kcontrol->info = wm_coeff_info; - kcontrol->get = wm_coeff_get; - kcontrol->put = wm_coeff_put; kcontrol->private_value = (unsigned long)ctl; if (ctl->flags) { @@ -1039,6 +1093,17 @@ static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl) kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_VOLATILE; } + switch (ctl->type) { + case WMFW_CTL_TYPE_ACKED: + kcontrol->get = wm_coeff_get_acked; + kcontrol->put = wm_coeff_put_acked; + break; + default: + kcontrol->get = wm_coeff_get; + kcontrol->put = wm_coeff_put; + break; + } + ret = snd_soc_add_card_controls(dsp->card, kcontrol, 1); if (ret < 0) goto err_kcontrol; @@ -1496,6 +1561,18 @@ static int wm_adsp_parse_coeff(struct wm_adsp *dsp, continue; } break; + case WMFW_CTL_TYPE_ACKED: + if (coeff_blk.flags & WMFW_CTL_FLAG_SYS) + continue; /* ignore */ + + ret = wm_adsp_check_coeff_flags(dsp, &coeff_blk, + WMFW_CTL_FLAG_VOLATILE | + WMFW_CTL_FLAG_WRITEABLE | + WMFW_CTL_FLAG_READABLE, + 0); + if (ret) + return -EINVAL; + break; case WMFW_CTL_TYPE_HOSTEVENT: ret = wm_adsp_check_coeff_flags(dsp, &coeff_blk, WMFW_CTL_FLAG_SYS | diff --git a/sound/soc/codecs/wmfw.h b/sound/soc/codecs/wmfw.h index f3e65162e6e..2b14800d109 100644 --- a/sound/soc/codecs/wmfw.h +++ b/sound/soc/codecs/wmfw.h @@ -27,6 +27,7 @@ #define WMFW_CTL_FLAG_READABLE 0x0001 /* Non-ALSA coefficient types start at 0x1000 */ +#define WMFW_CTL_TYPE_ACKED 0x1000 /* acked control */ #define WMFW_CTL_TYPE_HOSTEVENT 0x1001 /* event control */ #define WMFW_CTL_TYPE_HP_IMP 0x1003 /* headphone impedance */ From 0e4c493593f7fe1606d25a28af3f2e253134ac8a Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 16 May 2016 10:52:48 +0100 Subject: [PATCH 1145/1167] ASoC: arizona: Use compr_buf from DSP rather than stream in IRQ The trouble with using the wm_adsp_compr_buf pointer from the stream in the IRQ handler is that we only update the trigger variable when the stream is open. However, many use-cases require triggering before the stream is opened. This patch updates to using the pointer stored in the DSP such that we will always process the trigger event. Change-Id: I949717599e23731b8dbbcc5952a59171504d587b Signed-off-by: Charles Keepax --- sound/soc/codecs/clearwater.c | 2 +- sound/soc/codecs/florida.c | 2 +- sound/soc/codecs/largo.c | 2 +- sound/soc/codecs/marley.c | 2 +- sound/soc/codecs/moon.c | 2 +- sound/soc/codecs/wm_adsp.c | 4 ++-- 6 files changed, 7 insertions(+), 7 deletions(-) diff --git a/sound/soc/codecs/clearwater.c b/sound/soc/codecs/clearwater.c index 45cc1f14ba2..64ef6c64e7f 100644 --- a/sound/soc/codecs/clearwater.c +++ b/sound/soc/codecs/clearwater.c @@ -2743,7 +2743,7 @@ static void clearwater_compr_irq(struct clearwater_priv *clearwater, struct clearwater_compr *compr) { struct arizona *arizona = clearwater->core.arizona; - bool trigger; + bool trigger = false; int ret; ret = wm_adsp_compr_irq(&compr->adsp_compr, &trigger); diff --git a/sound/soc/codecs/florida.c b/sound/soc/codecs/florida.c index e4e5740c062..16c1ad0a303 100644 --- a/sound/soc/codecs/florida.c +++ b/sound/soc/codecs/florida.c @@ -2219,7 +2219,7 @@ static void florida_compr_irq(struct florida_priv *florida, struct florida_compr *compr) { struct arizona *arizona = florida->core.arizona; - bool trigger; + bool trigger = false; int ret; ret = wm_adsp_compr_irq(&compr->adsp_compr, &trigger); diff --git a/sound/soc/codecs/largo.c b/sound/soc/codecs/largo.c index 64f4e7fd0b9..0e4d1d0d537 100644 --- a/sound/soc/codecs/largo.c +++ b/sound/soc/codecs/largo.c @@ -1149,7 +1149,7 @@ static struct snd_soc_dai_driver largo_dai[] = { static void largo_compr_irq(struct largo_priv *largo, struct largo_compr *compr) { struct arizona *arizona = largo->core.arizona; - bool trigger; + bool trigger = false; int ret; ret = wm_adsp_compr_irq(&compr->adsp_compr, &trigger); diff --git a/sound/soc/codecs/marley.c b/sound/soc/codecs/marley.c index f868d3b6030..035286f912f 100644 --- a/sound/soc/codecs/marley.c +++ b/sound/soc/codecs/marley.c @@ -1960,7 +1960,7 @@ static void marley_compr_irq(struct marley_priv *marley, struct marley_compr *compr) { struct arizona *arizona = marley->core.arizona; - bool trigger; + bool trigger = false; int ret; ret = wm_adsp_compr_irq(&compr->adsp_compr, &trigger); diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 7e06c1eb748..0674f3c882c 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -2682,7 +2682,7 @@ static void moon_compr_irq(struct moon_priv *moon, struct moon_compr *compr) { struct arizona *arizona = moon->core.arizona; - bool trigger; + bool trigger = false; int ret; ret = wm_adsp_compr_irq(&compr->adsp_compr, &trigger); diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 96648a43a88..1146c223b25 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3668,11 +3668,11 @@ static int wm_adsp_buffer_has_error_locked(struct wm_adsp_compr_buf *buf) int wm_adsp_compr_irq(struct wm_adsp_compr *compr, bool *trigger) { - struct wm_adsp_compr_buf *buf = compr->buf; + struct wm_adsp_compr_buf *buf = &compr->dsp->compr_buf; int ret; if (!buf) - return 0; + return -ENODEV; mutex_lock(&buf->lock); From 02a7214c9a293be41f0a48431d818f89ba26d1da Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 2 Oct 2015 13:29:15 +0100 Subject: [PATCH 1146/1167] mfd: arizona: Use correct type ID for device tree config In the case of a device tree config the code uses the device ID from the DT entry to check which codec is required but when storing the ID into struct arizona it was always using the non-DT SPI device table to get an ID. This patch changes the code to store the correct ID into struct arizona. Signed-off-by: Richard Fitzgerald Acked-by: Lee Jones Signed-off-by: Charles Keepax Signed-off-by: Lee Jones (cherry picked from commit 2e44e28ad2628cd29a4829ffab06fe7e3b79469c) Change-Id: Iec4c0bc9df1603afc498d136e787fd3902210fe8 Signed-off-by: Charles Keepax --- drivers/mfd/arizona-i2c.c | 5 ++--- drivers/mfd/arizona-spi.c | 5 ++--- 2 files changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/mfd/arizona-i2c.c b/drivers/mfd/arizona-i2c.c index ac8de783700..529b611ebc2 100644 --- a/drivers/mfd/arizona-i2c.c +++ b/drivers/mfd/arizona-i2c.c @@ -80,8 +80,7 @@ static int arizona_i2c_probe(struct i2c_client *i2c, break; #endif default: - dev_err(&i2c->dev, "Unknown device type %ld\n", - id->driver_data); + dev_err(&i2c->dev, "Unknown device type %ld\n", type); return -EINVAL; } @@ -109,7 +108,7 @@ static int arizona_i2c_probe(struct i2c_client *i2c, } } - arizona->type = id->driver_data; + arizona->type = type; arizona->dev = &i2c->dev; arizona->irq = i2c->irq; diff --git a/drivers/mfd/arizona-spi.c b/drivers/mfd/arizona-spi.c index f2f473e158b..360ec58f21d 100644 --- a/drivers/mfd/arizona-spi.c +++ b/drivers/mfd/arizona-spi.c @@ -76,8 +76,7 @@ static int arizona_spi_probe(struct spi_device *spi) break; #endif default: - dev_err(&spi->dev, "Unknown device type %ld\n", - id->driver_data); + dev_err(&spi->dev, "Unknown device type %ld\n", type); return -EINVAL; } @@ -105,7 +104,7 @@ static int arizona_spi_probe(struct spi_device *spi) } } - arizona->type = id->driver_data; + arizona->type = type; arizona->dev = &spi->dev; arizona->irq = spi->irq; From 5892459e58377a1bab04c4d4bbb86ddf0ffdb0f8 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Mon, 13 Jun 2016 11:20:32 +0100 Subject: [PATCH 1147/1167] mfd: arizona: Remove some duplicate register defines Change-Id: I8ce51ccf5694be323453f0fa3bbd51937997d730 Signed-off-by: Charles Keepax --- include/linux/mfd/arizona/registers.h | 6 ------ 1 file changed, 6 deletions(-) diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 04e6cb48ba5..aeb01afc919 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -1042,12 +1042,6 @@ #define ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE 0xB38 #define ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE 0xB40 #define ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE 0xB48 -#define ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE 0xB60 -#define ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE 0xB68 -#define ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE 0xB30 -#define ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE 0xB38 -#define ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE 0xB40 -#define ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE 0xB48 #define ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE 0xB50 #define ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE 0xB58 #define ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE 0xB60 From cc1960597f6b9cc4714bf904edb3c6147b73c16a Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 4 May 2016 17:04:13 +0100 Subject: [PATCH 1148/1167] ASoC: arizona: Don't block input OSR changes The moon_osr_put() was returning -EINVAL and logging a kernel error if any write was made to the control for an analogue input, even if the value wasn't being changed. This leads to spurious kernel warnings when writing the control with a valid value. This was intended to prevent the user choosing low-power settings that would degrade audio performance, but we can leave the user to decide what trade-off to make between power and acceptable audio performance. Change-Id: I40b40b0439dc9320f1585da2708ab9c4d317cfe6 Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 19 ------------------- sound/soc/codecs/arizona.h | 3 --- sound/soc/codecs/moon.c | 6 ++---- 3 files changed, 2 insertions(+), 26 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index e411e88b4e0..93561ac357d 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2364,25 +2364,6 @@ int moon_dfc_put(struct snd_kcontrol *kcontrol, } EXPORT_SYMBOL_GPL(moon_dfc_put); -int moon_osr_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); - struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; - unsigned int mode; - - /* for analog mode osr is fixed */ - mode = snd_soc_read(codec, e->reg - 2); - if (!(mode & ARIZONA_IN1_MODE_MASK)) { - dev_err(codec->dev, - "OSR is fixed to 3.072MHz in analog mode\n"); - return -EINVAL; - } - - return snd_soc_put_value_enum_double(kcontrol, ucontrol); -} -EXPORT_SYMBOL_GPL(moon_osr_put); - int moon_lp_mode_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index d8946e5ff02..8949bfc6797 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -342,9 +342,6 @@ extern int moon_in_rate_put(struct snd_kcontrol *kcontrol, extern int moon_dfc_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); -extern int moon_osr_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); - extern int moon_lp_mode_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); diff --git a/sound/soc/codecs/moon.c b/sound/soc/codecs/moon.c index 0674f3c882c..1ebc0453715 100644 --- a/sound/soc/codecs/moon.c +++ b/sound/soc/codecs/moon.c @@ -687,10 +687,8 @@ static DECLARE_TLV_DB_SCALE(ng_tlv, -12000, 600, 0); { name " ANC Source", "RXANCR", "RXANCR" } static const struct snd_kcontrol_new moon_snd_controls[] = { -SOC_VALUE_ENUM_EXT("IN1 OSR", clearwater_in_dmic_osr[0], - snd_soc_get_value_enum_double, moon_osr_put), -SOC_VALUE_ENUM_EXT("IN2 OSR", clearwater_in_dmic_osr[1], - snd_soc_get_value_enum_double, moon_osr_put), +SOC_VALUE_ENUM("IN1 OSR", clearwater_in_dmic_osr[0]), +SOC_VALUE_ENUM("IN2 OSR", clearwater_in_dmic_osr[1]), SOC_VALUE_ENUM("IN3 OSR", clearwater_in_dmic_osr[2]), SOC_VALUE_ENUM("IN4 OSR", clearwater_in_dmic_osr[3]), SOC_VALUE_ENUM("IN5 OSR", clearwater_in_dmic_osr[4]), From e4972c235112fd860715f2d191e7932f5e452b78 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 18 May 2016 11:57:16 +0100 Subject: [PATCH 1149/1167] ASoC: arizona: Only handle rate change if we have a base register We should only do the source clearing and caching if we actually have a rate register for the audio interface, which basically means if we have a base address for that audio interface. Change-Id: If6996fcfb782c221145df71b72d9b96d801069d5 Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 99 ++++++++++++++++++++------------------ 1 file changed, 51 insertions(+), 48 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 93561ac357d..3f8705581a4 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -3624,7 +3624,7 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, int i, sr_val, lim = 0; const int *sources = NULL; unsigned int cur, tar; - bool change_rate = true; + bool change_rate = false; /* * We will need to be more flexible than this in future, @@ -3662,61 +3662,64 @@ static int arizona_hw_params_rate(struct snd_pcm_substream *substream, break; } - switch (dai_priv->clk) { - case ARIZONA_CLK_SYSCLK: - tar = 0 << ARIZONA_AIF1_RATE_SHIFT; - break; - case ARIZONA_CLK_SYSCLK_2: - tar = 1 << ARIZONA_AIF1_RATE_SHIFT; - break; - case ARIZONA_CLK_SYSCLK_3: - tar = 2 << ARIZONA_AIF1_RATE_SHIFT; - break; - case ARIZONA_CLK_ASYNCCLK: - tar = 8 << ARIZONA_AIF1_RATE_SHIFT; - break; - case ARIZONA_CLK_ASYNCCLK_2: - tar = 9 << ARIZONA_AIF1_RATE_SHIFT; - break; - default: - return -EINVAL; - } + if (base) { + switch (dai_priv->clk) { + case ARIZONA_CLK_SYSCLK: + tar = 0 << ARIZONA_AIF1_RATE_SHIFT; + break; + case ARIZONA_CLK_SYSCLK_2: + tar = 1 << ARIZONA_AIF1_RATE_SHIFT; + break; + case ARIZONA_CLK_SYSCLK_3: + tar = 2 << ARIZONA_AIF1_RATE_SHIFT; + break; + case ARIZONA_CLK_ASYNCCLK: + tar = 8 << ARIZONA_AIF1_RATE_SHIFT; + break; + case ARIZONA_CLK_ASYNCCLK_2: + tar = 9 << ARIZONA_AIF1_RATE_SHIFT; + break; + default: + return -EINVAL; + } - ret = regmap_read(priv->arizona->regmap, - base + ARIZONA_AIF_RATE_CTRL, &cur); - if (ret != 0) { - arizona_aif_err(dai, "Failed to check rate: %d\n", ret); - return ret; - } + ret = regmap_read(priv->arizona->regmap, + base + ARIZONA_AIF_RATE_CTRL, &cur); + if (ret != 0) { + arizona_aif_err(dai, "Failed to check rate: %d\n", ret); + return ret; + } - if ((cur & ARIZONA_AIF1_RATE_MASK) == (tar & ARIZONA_AIF1_RATE_MASK)) - change_rate = false; + if ((cur & ARIZONA_AIF1_RATE_MASK) != + (tar & ARIZONA_AIF1_RATE_MASK)) + change_rate = true; - if (change_rate) { - ret = arizona_get_sources(priv->arizona, - dai, - &sources, - &lim); - if (ret != 0) { - arizona_aif_err(dai, + if (change_rate) { + ret = arizona_get_sources(priv->arizona, dai, + &sources, &lim); + if (ret != 0) { + arizona_aif_err(dai, "Failed to get aif sources %d\n", ret); - return ret; - } + return ret; + } - mutex_lock(&priv->arizona->rate_lock); + mutex_lock(&priv->arizona->rate_lock); - ret = arizona_cache_and_clear_sources(priv->arizona, sources, - arizona_aif_sources_cache, - lim); - if (ret != 0) { - arizona_aif_err(dai, - "Failed to cache and clear aif sources: %d\n", - ret); - goto out; - } + ret = arizona_cache_and_clear_sources( + priv->arizona, + sources, + arizona_aif_sources_cache, + lim); + if (ret != 0) { + arizona_aif_err(dai, + "Failed to clear aif sources: %d\n", + ret); + goto out; + } - clearwater_spin_sysclk(priv->arizona); + clearwater_spin_sysclk(priv->arizona); + } } switch (dai_priv->clk) { From 65e50988d701ebecc2079329c6210c46f78323ac Mon Sep 17 00:00:00 2001 From: Simon Trimmer Date: Tue, 8 Mar 2016 16:05:44 +0000 Subject: [PATCH 1150/1167] ASoC: wm_adsp: Disable DMAs before clearing the transfer length This patch reorders the clearing of the DMA masks to avoid potential artefacts being introduced. Change-Id: Iaa77b37ccde39f5ce2e2877dd11c232ae37782f4 Signed-off-by: Simon Trimmer Signed-off-by: Charles Keepax --- sound/soc/codecs/wm_adsp.c | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 1146c223b25..c0ff3805de9 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2848,30 +2848,37 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, case 0: regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, - ADSP2_SYS_ENA | ADSP2_CORE_ENA | - ADSP2_START, 0); + ADSP2_CORE_ENA | ADSP2_START, 0); /* Make sure DMAs are quiesced */ + regmap_write(dsp->regmap, + dsp->base + ADSP2_RDMA_CONFIG_1, 0); regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0); regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0); - regmap_write(dsp->regmap, - dsp->base + ADSP2_RDMA_CONFIG_1, 0); + + regmap_update_bits(dsp->regmap, + dsp->base + ADSP2_CONTROL, + ADSP2_SYS_ENA, 0); break; default: regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, - ADSP2_MEM_ENA | ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0); /* Make sure DMAs are quiesced */ + regmap_write(dsp->regmap, + dsp->base + ADSP2_RDMA_CONFIG_1, 0); regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0); regmap_write(dsp->regmap, dsp->base + ADSP2V2_WDMA_CONFIG_2, 0); - regmap_write(dsp->regmap, - dsp->base + ADSP2_RDMA_CONFIG_1, 0); + + regmap_update_bits(dsp->regmap, + dsp->base + ADSP2_CONTROL, + ADSP2_SYS_ENA | ADSP2_MEM_ENA, 0); + break; } From 4c15b1de55abaab6155f94c1c932ddc85441986d Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 2 May 2016 11:32:35 +0100 Subject: [PATCH 1151/1167] mfd: arizona: Increase HPD_SENSE_SEL and HPD_FRC_SEL to 4 bits These fields are increased to 4 bits on new codecs, and since the extra 4th bit is unused on Moon just increase both field defines to 4 bits. Change-Id: I1bba0fdb73d798fd5e283e3b3b9840de10f25090 Signed-off-by: Richard Fitzgerald --- include/linux/mfd/arizona/registers.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index aeb01afc919..96786816683 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -4123,14 +4123,14 @@ #define MOON_HPD_GND_SEL_MASK 0x0007 /*HPD_GND_SEL[2:0]*/ #define MOON_HPD_GND_SEL_SHIFT 0 /*HPD_GND_SEL[2:0]*/ #define MOON_HPD_GND_SEL_WIDTH 3 /*HPD_GND_SEL[2:0]*/ -#define MOON_HPD_SENSE_SEL 0x0070 /*HPD_SENSE_SEL[4:6]*/ -#define MOON_HPD_SENSE_SEL_MASK 0x0070 /*HPD_SENSE_SEL[4:6]*/ -#define MOON_HPD_SENSE_SEL_SHIFT 4 /*HPD_SENSE_SEL[4:6]*/ -#define MOON_HPD_SENSE_SEL_WIDTH 3 /*HPD_SENSE_SEL[4:6]*/ -#define MOON_HPD_FRC_SEL 0x0700 /*HPD_FRC_SEL[8:10]*/ -#define MOON_HPD_FRC_SEL_MASK 0x0700 /*HPD_FRC_SEL[8:10]*/ -#define MOON_HPD_FRC_SEL_SHIFT 8 /*HPD_FRC_SEL[8:10]*/ -#define MOON_HPD_FRC_SEL_WIDTH 3 /*HPD_FRC_SEL[8:10]*/ +#define MOON_HPD_SENSE_SEL 0x00F0 /*HPD_SENSE_SEL[4:7]*/ +#define MOON_HPD_SENSE_SEL_MASK 0x00F0 /*HPD_SENSE_SEL[4:7]*/ +#define MOON_HPD_SENSE_SEL_SHIFT 4 /*HPD_SENSE_SEL[4:7]*/ +#define MOON_HPD_SENSE_SEL_WIDTH 4 /*HPD_SENSE_SEL[4:7]*/ +#define MOON_HPD_FRC_SEL 0x0F00 /*HPD_FRC_SEL[8:11]*/ +#define MOON_HPD_FRC_SEL_MASK 0x0F00 /*HPD_FRC_SEL[8:11]*/ +#define MOON_HPD_FRC_SEL_SHIFT 8 /*HPD_FRC_SEL[8:11]*/ +#define MOON_HPD_FRC_SEL_WIDTH 4 /*HPD_FRC_SEL[8:11]*/ #define MOON_HPD_OUT_SEL 0x7000 /*HPD_OUT_SEL[12:14]*/ #define MOON_HPD_OUT_SEL_MASK 0x7000 /*HPD_OUT_SEL[12:14]*/ #define MOON_HPD_OUT_SEL_SHIFT 12 /*HPD_OUT_SEL[12:14]*/ From 0987be9330de66c4ba94d9caebe67076eda0872e Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 2 May 2016 10:28:27 +0100 Subject: [PATCH 1152/1167] mfd: arizona: Add support for cs47l15 Change-Id: I41002bb326553be2c0ae4b5ca9d8354cd10784f0 Signed-off-by: Richard Fitzgerald --- .../devicetree/bindings/mfd/arizona.txt | 45 +- drivers/mfd/Kconfig | 9 + drivers/mfd/Makefile | 3 + drivers/mfd/arizona-core.c | 47 + drivers/mfd/arizona-i2c.c | 7 + drivers/mfd/arizona-irq.c | 9 + drivers/mfd/arizona-spi.c | 7 + drivers/mfd/arizona.h | 6 + drivers/mfd/cs47l15-tables.c | 1747 +++++++++++++++++ include/linux/mfd/arizona/core.h | 2 + include/linux/mfd/arizona/pdata.h | 17 +- 11 files changed, 1870 insertions(+), 29 deletions(-) create mode 100644 drivers/mfd/cs47l15-tables.c diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt index e19b5343510..34d737e1630 100644 --- a/Documentation/devicetree/bindings/mfd/arizona.txt +++ b/Documentation/devicetree/bindings/mfd/arizona.txt @@ -16,6 +16,7 @@ Required properties: "wlf,wm8285" "wlf,wm1840" "wlf,wm1831" + "cirrus,cs47l15" "cirrus,cs47l24" "cirrus,cs47l85" "cirrus,cs47l35" @@ -41,7 +42,8 @@ Required properties: - AVDD-supply, DBVDD1-supply, DBVDD2-supply, DBVDD3-supply (wm5102, wm5110), DBVDD4-supply (wm8285), CPVDD-supply, SPKVDDL-supply (wm5102, wm5110), - SPKVDDR-supply (wm5102, wm5110), SPKVDD-supply (wm8997, cs47l24, cs47l35) : + SPKVDDR-supply (wm5102, wm5110), + SPKVDD-supply (wm8997, cs47l15, cs47l24, cs47l35) : Power supplies for the device, as covered in Documentation/devicetree/bindings/regulator/regulator.txt @@ -91,12 +93,11 @@ Optional properties: for headphone impedance measurement else the left headphone channel is used - wlf,micd-clamp-mode : Specifies the logic of the micdetect clamp block - - wlf,hpd-left-pins : This field is only for moon (cs47l90, cs47l91) class - of arizona codecs. It is a 2 cell long field where the first cell - represents the pin that needs to be unclamped when measuring headphone - left channel impedance as per the HPD_OUT_SEL field of HEADPHONE_DETECT_0 - register and the second pin represents the impedance sense pin as per the - HPD_SENSE_SEL field of HEADPHONE_DETECT_0 register + - wlf,hpd-left-pins : (cs47l15, cs47l90, cs47l91) a 2 cell long field where + the first cell represents the pin that needs to be unclamped when measuring + headphone left channel impedance as per the HPD_OUT_SEL field of + HEADPHONE_DETECT_0 register and the second pin represents the impedance + sense pin as per the HPD_SENSE_SEL field of HEADPHONE_DETECT_0 register - wlf,hpd-right-pins : See wlf,hpd-left-pins which is for left headphone channel and this field is similar but for right headphone channel - wlf,micd-ranges : Microphone detection level and key configuration, this @@ -105,30 +106,30 @@ Optional properties: The first cell is the maximum impedance for this button in ohms The second cell the key that should be reported to the input layer - wlf,micd-configs : Headset polarity configurations, the field can be of - variable length. But is should always be a multiple of 4 cells long for Moon - class (cs47l90, cs47l91) of Arizona chips and should always be a multiple - of 3 cells long for other Arizona chips, each two cell group represents one - polarity configration - For Moon class (cs47l90, cs47l91) of Arizona chips the first cell is the + variable length. But is should always be a multiple of + 4 cells long for (cs47l15, cs47l90, cs47l91) + 3 cells long for other Arizona chips + Each two cell group represents one polarity configration + For cs47l15, cs47l90, cs47l91 the first cell is the accessory detection source as per the MICD_SENSE_SEL field of MIC_DETECT_1_CONTROL_0 regiser and for other Arizona chips its the accessory detection source as per the ACCDET_SRC bits in the ACCESSORY_DETECT_MODE_1 register - For Moon class (cs47l90, cs47l91) of Arizona chips the second cell is the accessory + For cs47l15, cs47l90, cs47l91 the second cell is the accessory detection ground as per the MICD_GND_SEL field of MIC_DETECT_1_CONTROL_0 regiser and for other Arizona chips the second cell represents the MICBIAS to be used as per the MICD_BIAS_SRC bits in the MIC_DETECT_1 register - For Moon class (cs47l90, cs47l91) of Arizona chips the third cell represents + For cs47l15, cs47l90, cs47l91 the third cell represents the MICBIAS to be used as per the MICD_BIAS_SRC bits in the MIC_DETECT_1_CONTROL_1 register and for other Arizona chips the third cell represents the value of the micd-pol-gpio pin, a non-zero value indicates this should be on - For Moon class (cs47l90, cs47l91) of Arizona chips the fourth cell represents + For cs47l15, cs47l90, cs47l91 the fourth cell represents the value of the micd-pol-gpio pin, a non-zero value indicates this should be on and for other Arizona chips there are only three cells and fourth cell should not be specified - wlf,micbias1 : Configuration for the micbias regulator, number of cells here will depend on the arizona chip and will be 4 + n (number of - children micbiases). For Marley (cs47l35) n is 2, for Moon - (cs47l90, cs47l91) n is 4 and for other arizona chips n is 1. + children micbiases). For Marley (cs47l35) n is 2, for cs47l15 n is 3, + for Moon (cs47l90, cs47l91) n is 4 and for other arizona chips n is 1. The first cell is the output voltage in millivolts The second cell a non-zero value indicates an external capacitor is fitted Starting from third cell the next n cells with a non-zero value indicates @@ -155,12 +156,12 @@ Optional properties: wm8998: entries are for cs47l85, wm8285, cs47l90, cs47l91: entries are for - cs47l35: entries are for + cs47l15, cs47l35: entries are for - - wlf,dmic-clksrc : DMIC clock source for each input. This field is only for - moon class of arizona codecs (cs47l90, cs47l91) and a value of 0 will source - DMIC from internally generated clock within the ADC subsystem and a value of - 1 will source DMIC and External digital speakers with same clock + - wlf,dmic-clksrc : (cs47l15, cs47l90, cs47l91) DMIC clock source for each + input. A value of 0 will source DMIC from internally generated clock within + the ADC subsystem and a value of 1 will source DMIC and External digital + speakers with same clock - wlf,gpio-defaults : A list of GPIO configuration register values. Defines for the appropriate values can found in . If diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 594554f2553..11ccb367a14 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1083,6 +1083,15 @@ config MFD_MARLEY help Support for Cirrus Logic Marley low power audio SoC +config MFD_CS47L15 + bool "Cirrus Logic CS47L15" + depends on MFD_ARIZONA + help + Support for Cirrus Logic CS47L15 low power audio SoC. + This driver provides common support for accessing the codec. + Additional drivers must be enabled in order to use the + functionality of the codec. + config MFD_WM8400 bool "Wolfson Microelectronics WM8400" select MFD_CORE diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 555222bd211..d3b9407e20f 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -61,6 +61,9 @@ endif ifeq ($(CONFIG_MFD_MOON), y) obj-$(CONFIG_MFD_ARIZONA) += moon-tables.o endif +ifeq ($(CONFIG_MFD_CS47L15),y) +obj-$(CONFIG_MFD_ARIZONA) += cs47l15-tables.o +endif obj-$(CONFIG_MFD_WM8400) += wm8400-core.o wm831x-objs := wm831x-core.o wm831x-irq.o wm831x-otp.o wm831x-objs += wm831x-auxadc.o diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index cfb566d5dac..3b219c9917d 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -681,6 +681,9 @@ static int arizona_runtime_resume(struct device *dev) case CS47L91: num_gpios = MOON_NUM_GPIOS; break; + case CS47L15: + num_gpios = CS47L15_NUM_GPIOS; + break; default: break; } @@ -1248,6 +1251,9 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) case CS47L24: num_micbias_outputs = 1; break; + case CS47L15: + num_micbias_outputs = CS47L15_NUM_CHILD_MICBIAS; + break; case CS47L35: num_micbias_outputs = MARLEY_NUM_CHILD_MICBIAS; break; @@ -1310,6 +1316,7 @@ const struct of_device_id arizona_of_match[] = { { .compatible = "wlf,wm8285", .data = (void *)WM8285 }, { .compatible = "wlf,wm1840", .data = (void *)WM1840 }, { .compatible = "wlf,wm1831", .data = (void *)WM1831 }, + { .compatible = "cirrus,cs47l15", .data = (void *)CS47L15 }, { .compatible = "cirrus,cs47l24", .data = (void *)CS47L24 }, { .compatible = "cirrus,cs47l35", .data = (void *)CS47L35 }, { .compatible = "cirrus,cs47l85", .data = (void *)WM8285 }, @@ -1399,6 +1406,14 @@ static struct mfd_cell moon_devs[] = { { .name = "moon-codec" }, }; +static struct mfd_cell cs47l15_devs[] = { + { .name = "arizona-extcon" }, + { .name = "arizona-gpio" }, + { .name = "arizona-haptics" }, + { .name = "arizona-pwm" }, + { .name = "cs47l15-codec" }, +}; + static const struct { unsigned int enable; unsigned int conf_reg; @@ -1558,6 +1573,10 @@ int arizona_get_num_micbias(struct arizona *arizona, num_micbiases = CLEARWATER_NUM_MICBIAS; num_child_micbiases = 0; break; + case CS47L15: + num_micbiases = CS47L15_NUM_MICBIAS; + num_child_micbiases = CS47L15_NUM_CHILD_MICBIAS; + break; case CS47L35: num_micbiases = MARLEY_NUM_MICBIAS; num_child_micbiases = MARLEY_NUM_CHILD_MICBIAS; @@ -1613,6 +1632,7 @@ int arizona_dev_init(struct arizona *arizona) case WM8285: case WM1840: case WM1831: + case CS47L15: case CS47L24: case CS47L35: case CS47L90: @@ -1633,6 +1653,7 @@ int arizona_dev_init(struct arizona *arizona) switch (arizona->type) { case WM1831: + case CS47L15: case CS47L24: case CS47L35: case CS47L90: @@ -1727,6 +1748,7 @@ int arizona_dev_init(struct arizona *arizona) case 0x6338: case 0x6360: case 0x6364: + case 0x6370: break; default: dev_err(arizona->dev, "Unknown device ID: %x\n", reg); @@ -1922,6 +1944,23 @@ int arizona_dev_init(struct arizona *arizona) apply_patch = moon_patch; break; +#endif +#ifdef CONFIG_MFD_CS47L15 + case 0x6370: + switch (arizona->type) { + case CS47L15: + type_name = "CS47L15"; + break; + default: + arizona->type = CS47L15; + dev_err(arizona->dev, + "CS47L15 codec registered as %d\n", + arizona->type); + break; + } + + apply_patch = cs47l15_patch; + break; #endif default: dev_err(arizona->dev, "Unknown device ID %x\n", reg); @@ -2087,6 +2126,9 @@ int arizona_dev_init(struct arizona *arizona) settings for INxL and INxR are different*/ max_inputs = 3; break; + case CS47L15: + max_inputs = 2; + break; default: /*DMIC Ref for IN3-5 is fixed for CS47L90 and settings for INxL and INxR are different*/ @@ -2126,6 +2168,7 @@ int arizona_dev_init(struct arizona *arizona) break; case WM8998: case WM1814: + case CS47L15: case CS47L35: val = arizona->pdata.dmic_ref[i] << ARIZONA_IN1_DMIC_SUP_SHIFT; @@ -2248,6 +2291,10 @@ int arizona_dev_init(struct arizona *arizona) ret = mfd_add_devices(arizona->dev, -1, clearwater_devs, ARRAY_SIZE(clearwater_devs), NULL, 0, NULL); break; + case CS47L15: + ret = mfd_add_devices(arizona->dev, -1, cs47l15_devs, + ARRAY_SIZE(cs47l15_devs), NULL, 0, NULL); + break; case CS47L35: ret = mfd_add_devices(arizona->dev, -1, marley_devs, ARRAY_SIZE(marley_devs), NULL, 0, NULL); diff --git a/drivers/mfd/arizona-i2c.c b/drivers/mfd/arizona-i2c.c index 529b611ebc2..fe211f2f1f7 100644 --- a/drivers/mfd/arizona-i2c.c +++ b/drivers/mfd/arizona-i2c.c @@ -78,6 +78,12 @@ static int arizona_i2c_probe(struct i2c_client *i2c, regmap_config = &moon_16bit_i2c_regmap; regmap_32bit_config = &moon_32bit_i2c_regmap; break; +#endif +#ifdef CONFIG_MFD_CS47L15 + case CS47L15: + regmap_config = &cs47l15_16bit_i2c_regmap; + regmap_32bit_config = &cs47l15_32bit_i2c_regmap; + break; #endif default: dev_err(&i2c->dev, "Unknown device type %ld\n", type); @@ -132,6 +138,7 @@ static const struct i2c_device_id arizona_i2c_id[] = { { "wm1814", WM1814 }, { "wm8285", WM8285 }, { "wm1840", WM1840 }, + { "cs47l15", CS47L15 }, { "cs47l35", CS47L35 }, { "cs47l85", WM8285 }, { "cs47l90", CS47L90 }, diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index c67e486f629..b034f98682a 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -307,6 +307,15 @@ int arizona_irq_init(struct arizona *arizona) irq_ctrl_reg = CLEARWATER_IRQ1_CTRL; break; #endif +#ifdef CONFIG_MFD_CS47L15 + case CS47L15: + aod = &cs47l15_irq; + irq = NULL; + + ctrlif_error = false; + irq_ctrl_reg = CLEARWATER_IRQ1_CTRL; + break; +#endif default: BUG_ON("Unknown Arizona class device" == NULL); return -EINVAL; diff --git a/drivers/mfd/arizona-spi.c b/drivers/mfd/arizona-spi.c index 360ec58f21d..6c7cc08ded1 100644 --- a/drivers/mfd/arizona-spi.c +++ b/drivers/mfd/arizona-spi.c @@ -74,6 +74,12 @@ static int arizona_spi_probe(struct spi_device *spi) regmap_config = &moon_16bit_spi_regmap; regmap_32bit_config = &moon_32bit_spi_regmap; break; +#endif +#ifdef CONFIG_MFD_CS47L15 + case CS47L15: + regmap_config = &cs47l15_16bit_spi_regmap; + regmap_32bit_config = &cs47l15_32bit_spi_regmap; + break; #endif default: dev_err(&spi->dev, "Unknown device type %ld\n", type); @@ -126,6 +132,7 @@ static const struct spi_device_id arizona_spi_ids[] = { { "wm8285", WM8285 }, { "wm1840", WM1840 }, { "wm1831", WM1831 }, + { "cs47l15", CS47L15 }, { "cs47l24", CS47L24 }, { "cs47l35", CS47L35 }, { "cs47l85", WM8285 }, diff --git a/drivers/mfd/arizona.h b/drivers/mfd/arizona.h index d78a9c2b7b0..9a54d089d7c 100644 --- a/drivers/mfd/arizona.h +++ b/drivers/mfd/arizona.h @@ -31,6 +31,11 @@ extern const struct regmap_config clearwater_16bit_spi_regmap; extern const struct regmap_config clearwater_32bit_spi_regmap; extern const struct regmap_config clearwater_32bit_i2c_regmap; +extern const struct regmap_config cs47l15_16bit_i2c_regmap; +extern const struct regmap_config cs47l15_16bit_spi_regmap; +extern const struct regmap_config cs47l15_32bit_spi_regmap; +extern const struct regmap_config cs47l15_32bit_i2c_regmap; + extern const struct regmap_config marley_16bit_i2c_regmap; extern const struct regmap_config marley_16bit_spi_regmap; extern const struct regmap_config marley_32bit_spi_regmap; @@ -58,6 +63,7 @@ extern const struct regmap_irq_chip florida_aod; extern const struct regmap_irq_chip florida_irq; extern const struct regmap_irq_chip florida_revd_irq; +extern const struct regmap_irq_chip cs47l15_irq; extern const struct regmap_irq_chip clearwater_irq; extern const struct regmap_irq_chip moon_irq; diff --git a/drivers/mfd/cs47l15-tables.c b/drivers/mfd/cs47l15-tables.c new file mode 100644 index 00000000000..3d4c5bf7028 --- /dev/null +++ b/drivers/mfd/cs47l15-tables.c @@ -0,0 +1,1747 @@ +/* + * cs47l15-tables.c -- data tables for CS47L15 + * + * Copyright 2015 Cirrus Logic + * + * Author: Richard Fitzgerald + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include + +#include +#include +#include + +#include "arizona.h" + +static const struct reg_default cs47l15_reva_16_patch[] = { + { 0x008C, 0x5555 }, + { 0x008C, 0xAAAA }, + { 0x0314, 0x0080 }, + { 0x04D4, 0x0028 }, + { 0x04CF, 0x0FF4 }, + { 0x008C, 0xCCCC }, + { 0x008C, 0x3333 }, +}; + +int cs47l15_patch(struct arizona *arizona) +{ + int ret; + + ret = regmap_register_patch(arizona->regmap, + cs47l15_reva_16_patch, + ARRAY_SIZE(cs47l15_reva_16_patch)); + if (ret < 0) { + dev_err(arizona->dev, + "Error in applying 16-bit patch: %d\n", ret); + return ret; + } + + return 0; +} +EXPORT_SYMBOL_GPL(cs47l15_patch); + +static const struct regmap_irq cs47l15_irqs[ARIZONA_NUM_IRQ] = { + [ARIZONA_IRQ_BOOT_DONE] = { .reg_offset = 0, + .mask = CLEARWATER_BOOT_DONE_EINT1 }, + [ARIZONA_IRQ_CTRLIF_ERR] = { .reg_offset = 0, + .mask = CLEARWATER_CTRLIF_ERR_EINT1 }, + + [ARIZONA_IRQ_FLL1_CLOCK_OK] = { .reg_offset = 1, + .mask = CLEARWATER_FLL1_LOCK_EINT1 }, + [MOON_IRQ_FLLAO_CLOCK_OK] = { .reg_offset = 1, + .mask = MOON_FLLAO_LOCK_EINT1}, + + [ARIZONA_IRQ_MICDET] = { .reg_offset = 5, + .mask = CLEARWATER_MICDET_EINT1 }, + [ARIZONA_IRQ_HPDET] = { .reg_offset = 5, + .mask = CLEARWATER_HPDET_EINT1}, + + [ARIZONA_IRQ_MICD_CLAMP_RISE] = { .reg_offset = 6, + .mask = CLEARWATER_MICD_CLAMP_RISE_EINT1 }, + [ARIZONA_IRQ_MICD_CLAMP_FALL] = { .reg_offset = 6, + .mask = CLEARWATER_MICD_CLAMP_FALL_EINT1 }, + [ARIZONA_IRQ_JD_FALL] = { .reg_offset = 6, + .mask = CLEARWATER_JD1_FALL_EINT1 }, + [ARIZONA_IRQ_JD_RISE] = { .reg_offset = 6, + .mask = CLEARWATER_JD1_RISE_EINT1 }, + + [ARIZONA_IRQ_DRC2_SIG_DET] = { .reg_offset = 8, + .mask = CLEARWATER_DRC2_SIG_DET_EINT1 }, + [ARIZONA_IRQ_DRC1_SIG_DET] = { .reg_offset = 8, + .mask = CLEARWATER_DRC1_SIG_DET_EINT1 }, + + [ARIZONA_IRQ_DSP_IRQ1] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ1_EINT1}, + [ARIZONA_IRQ_DSP_IRQ2] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ2_EINT1}, + [ARIZONA_IRQ_DSP_IRQ3] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ3_EINT1}, + [ARIZONA_IRQ_DSP_IRQ4] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ4_EINT1}, + [ARIZONA_IRQ_DSP_IRQ5] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ5_EINT1}, + [ARIZONA_IRQ_DSP_IRQ6] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ6_EINT1}, + [ARIZONA_IRQ_DSP_IRQ7] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ7_EINT1}, + [ARIZONA_IRQ_DSP_IRQ8] = { .reg_offset = 10, + .mask = CLEARWATER_DSP_IRQ8_EINT1}, + + [ARIZONA_IRQ_GP1] = { .reg_offset = 16, + .mask = CLEARWATER_GP1_EINT1}, + [ARIZONA_IRQ_GP2] = { .reg_offset = 16, + .mask = CLEARWATER_GP2_EINT1}, + [ARIZONA_IRQ_GP3] = { .reg_offset = 16, + .mask = CLEARWATER_GP3_EINT1}, + [ARIZONA_IRQ_GP4] = { .reg_offset = 16, + .mask = CLEARWATER_GP4_EINT1}, + [ARIZONA_IRQ_GP5] = { .reg_offset = 16, + .mask = CLEARWATER_GP5_EINT1}, + [ARIZONA_IRQ_GP6] = { .reg_offset = 16, + .mask = CLEARWATER_GP6_EINT1}, + [ARIZONA_IRQ_GP7] = { .reg_offset = 16, + .mask = CLEARWATER_GP7_EINT1}, + [ARIZONA_IRQ_GP8] = { .reg_offset = 16, + .mask = CLEARWATER_GP8_EINT1}, + + [MOON_IRQ_DSP1_BUS_ERROR] = { .reg_offset = 32, + .mask = MOON_ADSP_ERROR_STATUS_DSP1}, +}; + +const struct regmap_irq_chip cs47l15_irq = { + .name = "cs47l15 IRQ", + .status_base = CLEARWATER_IRQ1_STATUS_1, + .mask_base = CLEARWATER_IRQ1_MASK_1, + .ack_base = CLEARWATER_IRQ1_STATUS_1, + .num_regs = 33, + .irqs = cs47l15_irqs, + .num_irqs = ARRAY_SIZE(cs47l15_irqs), +}; +EXPORT_SYMBOL_GPL(cs47l15_irq); + +static const struct reg_default cs47l15_reg_default[] = { + { 0x00000008, 0x373B }, /* R8 (0x000008) - CTRL_IF_CFG_1 */ + { 0x00000016, 0x0000 }, /* R22 (0x000016) - WRITE_SEQUENCER_CTRL_0 */ + { 0x00000017, 0x0000 }, /* R23 (0x000017) - WRITE_SEQUENCER_CTRL_1 */ + { 0x00000018, 0x0000 }, /* R24 (0x000018) - WRITE_SEQUENCER_CTRL_2 */ + { 0x00000020, 0x0000 }, /* R32 (0x000020) - TONE_GENERATOR_1 */ + { 0x00000021, 0x1000 }, /* R33 (0x000021) - TONE_GENERATOR_2 */ + { 0x00000022, 0x0000 }, /* R34 (0x000022) - TONE_GENERATOR_3 */ + { 0x00000023, 0x1000 }, /* R35 (0x000023) - TONE_GENERATOR_4 */ + { 0x00000024, 0x0000 }, /* R36 (0x000024) - TONE_GENERATOR_5 */ + { 0x00000030, 0x0000 }, /* R48 (0x000030) - PWM_DRIVE_1 */ + { 0x00000031, 0x0100 }, /* R49 (0x000031) - PWM_DRIVE_2 */ + { 0x00000032, 0x0100 }, /* R50 (0x000032) - PWM_DRIVE_3 */ + { 0x00000041, 0x0000 }, /* R65 (0x000041) - SEQUENCE_CONTROL */ + { 0x00000061, 0x01FF }, /* R97 (0x000061) - SAMPLE_RATE_SEQUENCE_SELECT_1 */ + { 0x00000062, 0x01FF }, /* R98 (0x000062) - SAMPLE_RATE_SEQUENCE_SELECT_2 */ + { 0x00000063, 0x01FF }, /* R99 (0x000063) - SAMPLE_RATE_SEQUENCE_SELECT_3 */ + { 0x00000064, 0x01FF }, /* R100 (0x000064) - SSAMPLE_RATE_SEQUENCE_SELECT_4 */ + { 0x00000066, 0x01FF }, /* R102 (0x000066) - ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1 */ + { 0x00000067, 0x01FF }, /* R103 (0x000067) - ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2 */ + { 0x00000068, 0x01FF }, /* R104 (0x000068) - SPARE_SEQUENCE_SELECT_13 */ + { 0x00000069, 0x01FF }, /* R105 (0x000069) - SPARE_SEQUENCE_SELECT_14 */ + { 0x0000006A, 0x01FF }, /* R106 (0x00006A) - SPARE_SEQUENCE_SELECT_15 */ + { 0x0000006B, 0x01FF }, /* R107 (0x00006B) - SPARE_SEQUENCE_SELECT_16 */ + { 0x00000090, 0x0000 }, /* R144 (0x000090) - Haptics Control 1 */ + { 0x00000091, 0x7FFF }, /* R145 (0x000091) - Haptics Control 2 */ + { 0x00000092, 0x0000 }, /* R146 (0x000092) - HAPTICS_PHASE_1_INTENSITY */ + { 0x00000093, 0x0000 }, /* R147 (0x000093) - HAPTICS_PHASE_1_DURATION */ + { 0x00000094, 0x0000 }, /* R148 (0x000094) - HAPTICS_PHASE_2_INTENSITY */ + { 0x00000095, 0x0000 }, /* R149 (0x000095) - HAPTICS_PHASE_2_DURATION */ + { 0x00000096, 0x0000 }, /* R150 (0x000096) - HAPTICS_PHASE_3_INTENSITY */ + { 0x00000097, 0x0000 }, /* R151 (0x000097) - HAPTICS_PHASE_3_DURATION */ + { 0x000000A0, 0x0000 }, /* R160 (0x0000A0) - Comfort Noise Generator */ + { 0x00000100, 0x0002 }, /* R256 (0x000100) - CLOCK_32K_1 */ + { 0x00000101, 0x0404 }, /* R257 (0x000101) - SYSTEM_CLOCK_1 */ + { 0x00000102, 0x0011 }, /* R258 (0x000102) - SAMPLE_RATE_1 */ + { 0x00000103, 0x0011 }, /* R259 (0x000103) - SAMPLE_RATE_2 */ + { 0x00000104, 0x0011 }, /* R260 (0x000104) - SAMPLE_RATE_3 */ + { 0x00000120, 0x0304 }, /* R288 (0x000120) - DSP_CLOCK_1 */ + { 0x00000122, 0x0000 }, /* R290 (0x000122) - DSP_CLOCK_2 */ + { 0x00000149, 0x0000 }, /* R329 (0x000149) - OUTPUT_SYSTEM_CLOCK */ + { 0x00000152, 0x0000 }, /* R338 (0x000152) - RATE_ESTIMATOR_1 */ + { 0x00000153, 0x0000 }, /* R339 (0x000153) - RATE_ESTIMATOR_2 */ + { 0x00000154, 0x0000 }, /* R340 (0x000154) - RATE_ESTIMATOR_3 */ + { 0x00000155, 0x0000 }, /* R341 (0x000155) - RATE_ESTIMATOR_4 */ + { 0x00000156, 0x0000 }, /* R342 (0x000156) - RATE_ESTIMATOR_5 */ + { 0x00000171, 0x0002 }, /* R369 (0x000171) - FLL1_CONTROL_1 */ + { 0x00000172, 0x0008 }, /* R370 (0x000172) - FLL1_CONTROL_2 */ + { 0x00000173, 0x0018 }, /* R371 (0x000173) - FLL1_CONTROL_3 */ + { 0x00000174, 0x007D }, /* R372 (0x000174) - FLL1_CONTROL_4 */ + { 0x00000175, 0x0000 }, /* R373 (0x000175) - FLL1_CONTROL_5 */ + { 0x00000176, 0x0000 }, /* R374 (0x000176) - FLL1_CONTROL_6 */ + { 0x00000177, 0x0281 }, /* R375 (0x000177) - FLL1_LOOP_FILTER_TEST_1 */ + { 0x00000178, 0x0000 }, /* R376 (0x000178) - FLL1_NCO_TEST_0 */ + { 0x00000179, 0x0000 }, /* R377 (0x000179) - FLL1_CONTROL_7 */ + { 0x0000017A, 0x2906 }, /* R378 (0x00017A) - FLL1_EFS_2 */ + { 0x00000181, 0x0000 }, /* R385 (0x000181) - FLL1_SYNCHRONISER_1 */ + { 0x00000182, 0x0000 }, /* R386 (0x000182) - FLL1_SYNCHRONISER_2 */ + { 0x00000183, 0x0000 }, /* R387 (0x000183) - FLL1_SYNCHRONISER_3 */ + { 0x00000184, 0x0000 }, /* R388 (0x000184) - FLL1_SYNCHRONISER_4 */ + { 0x00000185, 0x0000 }, /* R389 (0x000185) - FLL1_SYNCHRONISER_5 */ + { 0x00000186, 0x0000 }, /* R390 (0x000186) - FLL1_SYNCHRONISER_6 */ + { 0x00000187, 0x0001 }, /* R391 (0x000187) - FLL1_SYNCHRONISER_7 */ + { 0x00000189, 0x0000 }, /* R393 (0x000189) - FLL1_SPREAD_SPECTRUM */ + { 0x0000018A, 0x0004 }, /* R394 (0x00018A) - FLL1_GPIO_CLOCK */ + { 0x000001D1, 0x0004 }, /* R465 (0x0001D1) - FLL_AO_CONTROL_1 */ + { 0x000001D2, 0x0004 }, /* R466 (0x0001D2) - FLL_AO_CONTROL_2 */ + { 0x000001D3, 0x0000 }, /* R467 (0x0001D3) - FLL_AO_CONTROL_3 */ + { 0x000001D4, 0x0000 }, /* R468 (0x0001D4) - FLL_AO_CONTROL_4 */ + { 0x000001D5, 0x0001 }, /* R469 (0x0001D5) - FLL_AO_CONTROL_5 */ + { 0x000001D6, 0x8004 }, /* R470 (0x0001D6) - FLL_AO_CONTROL_6 */ + { 0x000001D8, 0x0000 }, /* R472 (0x0001D8) - FLL_AO_CONTROL_7 */ + { 0x000001DA, 0x0077 }, /* R474 (0x0001DA) - FLL_AO_CONTROL_8 */ + { 0x000001DB, 0x0000 }, /* R475 (0x0001DB) - FLL_AO_CONTROL_9 */ + { 0x000001DC, 0x06DA }, /* R476 (0x0001DC) - FLL_AO_CONTROL_10 */ + { 0x000001DD, 0x0011 }, /* R477 (0x0001DD) - FLL_AO_CONTROL_11 */ + { 0x00000218, 0x00E6 }, /* R536 (0x000218) - MIC_BIAS_CTRL_1 */ + { 0x0000021C, 0x0222 }, /* R540 (0x00021C) - MIC_BIAS_CTRL_5 */ + { 0x00000299, 0x0000 }, /* R665 (0x000299) - HEADPHONE_DETECT_0 */ + { 0x0000029B, 0x0000 }, /* R667 (0x00029B) - HEADPHONE_DETECT_1 */ + { 0x000002A2, 0x0010 }, /* R674 (0x0002A2) - MIC_DETECT_1_CONTROL_0 */ + { 0x000002A3, 0x1102 }, /* R675 (0x0002A3) - MIC_DETECT_1_CONTROL_1 */ + { 0x000002A4, 0x009F }, /* R676 (0x0002A4) - MIC_DETECT_1_CONTROL_2 */ + { 0x000002A6, 0x3D3D }, /* R678 (0x0002A6) - MIC_DETECT_1_LEVEL_1 */ + { 0x000002A7, 0x3D3D }, /* R679 (0x0002A7) - MIC_DETECT_1_LEVEL_2 */ + { 0x000002A8, 0x333D }, /* R680 (0x0002A8) - MIC_DETECT_1_LEVEL_3 */ + { 0x000002A9, 0x202D }, /* R681 (0x0002A9) - MIC_DETECT_1_LEVEL_4 */ + { 0x000002C6, 0x0010 }, /* R710 (0x0002C6) - MICD_CLAMP_CONTROL */ + { 0x000002C8, 0x0000 }, /* R712 (0x0002C8) - GP_SWITCH_1 */ + { 0x000002D3, 0x0000 }, /* R723 (0x0002D3) - JACK_DETECT_ANALOGUE */ + { 0x00000300, 0x0000 }, /* R768 (0x000300) - INPUT_ENABLES */ + { 0x00000308, 0x0000 }, /* R776 (0x000308) - INPUT_RATE */ + { 0x00000309, 0x0022 }, /* R777 (0x000309) - INPUT_VOLUME_RAMP */ + { 0x0000030C, 0x0002 }, /* R780 (0x00030C) - HPF_CONTROL */ + { 0x00000310, 0x0080 }, /* R784 (0x000310) - IN1L_CONTROL */ + { 0x00000311, 0x0180 }, /* R785 (0x000311) - ADC_DIGITAL_VOLUME_1L */ + { 0x00000312, 0x0500 }, /* R786 (0x000312) - DMIC1L_CONTROL */ + { 0x00000313, 0x0000 }, /* R787 (0x000313) - IN1L_RATE_CONTROL */ + { 0x00000314, 0x0080 }, /* R788 (0x000314) - IN1R_CONTROL */ + { 0x00000315, 0x0180 }, /* R789 (0x000315) - ADC_DIGITAL_VOLUME_1R */ + { 0x00000316, 0x0000 }, /* R790 (0x000316) - DMIC1R_CONTROL */ + { 0x00000317, 0x0000 }, /* R791 (0x000317) - IN1R_RATE_CONTROL */ + { 0x00000318, 0x0000 }, /* R792 (0x000318) - IN2L_CONTROL */ + { 0x00000319, 0x0180 }, /* R793 (0x000319) - ADC_DIGITAL_VOLUME_2L */ + { 0x0000031A, 0x0500 }, /* R794 (0x00031A) - DMIC2L_CONTROL */ + { 0x0000031B, 0x0000 }, /* R795 (0x00031B) - IN2L_RATE_CONTROL */ + { 0x0000031C, 0x0800 }, /* R796 (0x00031C) - IN2R_CONTROL */ + { 0x0000031D, 0x0180 }, /* R797 (0x00031D) - ADC_DIGITAL_VOLUME_2R */ + { 0x0000031E, 0x0000 }, /* R798 (0x00031E) - DMIC2R_CONTROL */ + { 0x0000031F, 0x0000 }, /* R799 (0x00031F) - IN2R_RATE_CONTROL */ + { 0x00000400, 0x0000 }, /* R1024 (0x000400) - OUTPUT_ENABLES_1 */ + { 0x00000408, 0x0000 }, /* R1032 (0x000408) - OUTPUT_RATE_1 */ + { 0x00000409, 0x0022 }, /* R1033 (0x000409) - OUTPUT_VOLUME_RAMP */ + { 0x00000410, 0x0080 }, /* R1040 (0x000410) - OUTPUT_PATH_CONFIG_1L */ + { 0x00000411, 0x0180 }, /* R1041 (0x000411) - DAC_DIGITAL_VOLUME_1L */ + { 0x00000412, 0x0000 }, /* R1042 (0x000412) - OUTPUT_PATH_CONFIG_1 */ + { 0x00000413, 0x0001 }, /* R1043 (0x000413) - NOISE_GATE_SELECT_1L */ + { 0x00000414, 0x0080 }, /* R1044 (0x000414) - OUTPUT_PATH_CONFIG_1R */ + { 0x00000415, 0x0180 }, /* R1045 (0x000415) - DAC_DIGITAL_VOLUME_1R */ + { 0x00000417, 0x0002 }, /* R1047 (0x000417) - NOISE_GATE_SELECT_1R */ + { 0x0000041A, 0x0600 }, /* R1050 (0x00041A) - OUTPUT_PATH_CONFIG_2 */ + { 0x00000428, 0x0000 }, /* R1064 (0x000428) - OUTPUT_PATH_CONFIG_4L */ + { 0x00000429, 0x0180 }, /* R1065 (0x000429) - DAC_DIGITAL_VOLUME_4L */ + { 0x0000042B, 0x0040 }, /* R1067 (0x00042B) - NOISE_GATE_SELECT_4L */ + { 0x00000430, 0x0000 }, /* R1072 (0x000430) - OUTPUT_PATH_CONFIG_5L */ + { 0x00000431, 0x0180 }, /* R1073 (0x000431) - DAC_DIGITAL_VOLUME_5L */ + { 0x00000433, 0x0100 }, /* R1075 (0x000433) - NOISE_GATE_SELECT_5L */ + { 0x00000434, 0x0000 }, /* R1076 (0x000434) - OUTPUT_PATH_CONFIG_5R */ + { 0x00000435, 0x0180 }, /* R1077 (0x000435) - DAC_DIGITAL_VOLUME_5R */ + { 0x00000437, 0x0200 }, /* R1079 (0x000437) - NOISE_GATE_SELECT_5R */ + { 0x00000440, 0x0003 }, /* R1088 (0x000440) - DRE Enable */ + { 0x00000448, 0x0883 }, /* R1096 (0x000448) - eDRE Enable */ + { 0x00000450, 0x0000 }, /* R1104 (0x000450) - DAC_AEC_CONTROL_1 */ + { 0x00000458, 0x0000 }, /* R1112 (0x000458) - NOISE_GATE_CONTROL */ + { 0x00000490, 0x0069 }, /* R1168 (0x000490) - PDM_SPK1_CTRL_1 */ + { 0x00000491, 0x0000 }, /* R1169 (0x000491) - PDM_SPK1_CTRL_2 */ + { 0x000004A0, 0x3080 }, /* R1184 (0x0004A0) - HP1 Short Circuit Ctrl */ + { 0x000004A8, 0x7120 }, /* R1192 (0x0004A8) - HP Test Ctrl 5 */ + { 0x000004A9, 0x7120 }, /* R1193 (0x0004A9) - HP Test Ctrl 6 */ + { 0x00000500, 0x000C }, /* R1280 (0x000500) - AIF1_BCLK_CTRL */ + { 0x00000501, 0x0000 }, /* R1281 (0x000501) - AIF1_TX_PIN_CTRL */ + { 0x00000502, 0x0000 }, /* R1282 (0x000502) - AIF1_RX_PIN_CTRL */ + { 0x00000503, 0x0000 }, /* R1283 (0x000503) - AIF1_RATE_CTRL */ + { 0x00000504, 0x0000 }, /* R1284 (0x000504) - AIF1_FORMAT */ + { 0x00000506, 0x0040 }, /* R1286 (0x000506) - AIF1_RX_BCLK_RATE */ + { 0x00000507, 0x1818 }, /* R1287 (0x000507) - AIF1_FRAME_CTRL_1 */ + { 0x00000508, 0x1818 }, /* R1288 (0x000508) - AIF1_FRAME_CTRL_2 */ + { 0x00000509, 0x0000 }, /* R1289 (0x000509) - AIF1_FRAME_CTRL_3 */ + { 0x0000050A, 0x0001 }, /* R1290 (0x00050A) - AIF1_FRAME_CTRL_4 */ + { 0x0000050B, 0x0002 }, /* R1291 (0x00050B) - AIF1_FRAME_CTRL_5 */ + { 0x0000050C, 0x0003 }, /* R1292 (0x00050C) - AIF1_FRAME_CTRL_6 */ + { 0x0000050D, 0x0004 }, /* R1293 (0x00050D) - AIF1_FRAME_CTRL_7 */ + { 0x0000050E, 0x0005 }, /* R1294 (0x00050E) - AIF1_FRAME_CTRL_8 */ + { 0x00000511, 0x0000 }, /* R1297 (0x000511) - AIF1_FRAME_CTRL_11 */ + { 0x00000512, 0x0001 }, /* R1298 (0x000512) - AIF1_FRAME_CTRL_12 */ + { 0x00000513, 0x0002 }, /* R1299 (0x000513) - AIF1_FRAME_CTRL_13 */ + { 0x00000514, 0x0003 }, /* R1300 (0x000514) - AIF1_FRAME_CTRL_14 */ + { 0x00000515, 0x0004 }, /* R1301 (0x000515) - AIF1_FRAME_CTRL_15 */ + { 0x00000516, 0x0005 }, /* R1302 (0x000516) - AIF1_FRAME_CTRL_16 */ + { 0x00000519, 0x0000 }, /* R1305 (0x000519) - AIF1_TX_ENABLES */ + { 0x0000051A, 0x0000 }, /* R1306 (0x00051A) - AIF1_RX_ENABLES */ + { 0x00000540, 0x000C }, /* R1344 (0x000540) - AIF2_BCLK_CTRL */ + { 0x00000541, 0x0000 }, /* R1345 (0x000541) - AIF2_TX_PIN_CTRL */ + { 0x00000542, 0x0000 }, /* R1346 (0x000542) - AIF2_RX_PIN_CTRL */ + { 0x00000543, 0x0000 }, /* R1347 (0x000543) - AIF2_RATE_CTRL */ + { 0x00000544, 0x0000 }, /* R1348 (0x000544) - AIF2_FORMAT */ + { 0x00000546, 0x0040 }, /* R1350 (0x000546) - AIF2_RX_BCLK_RATE */ + { 0x00000547, 0x1818 }, /* R1351 (0x000547) - AIF2_FRAME_CTRL_1 */ + { 0x00000548, 0x1818 }, /* R1352 (0x000548) - AIF2_FRAME_CTRL_2 */ + { 0x00000549, 0x0000 }, /* R1353 (0x000549) - AIF2_FRAME_CTRL_3 */ + { 0x0000054A, 0x0001 }, /* R1354 (0x00054A) - AIF2_FRAME_CTRL_4 */ + { 0x0000054B, 0x0002 }, /* R1355 (0x00054B) - AIF2_FRAME_CTRL_5 */ + { 0x0000054C, 0x0003 }, /* R1356 (0x00054C) - AIF2_FRAME_CTRL_6 */ + { 0x00000551, 0x0000 }, /* R1361 (0x000551) - AIF2_FRAME_CTRL_11 */ + { 0x00000552, 0x0001 }, /* R1362 (0x000552) - AIF2_FRAME_CTRL_12 */ + { 0x00000553, 0x0002 }, /* R1363 (0x000553) - AIF2_FRAME_CTRL_13 */ + { 0x00000554, 0x0003 }, /* R1364 (0x000554) - AIF2_FRAME_CTRL_14 */ + { 0x00000559, 0x0000 }, /* R1369 (0x000559) - AIF2_TX_ENABLES */ + { 0x0000055A, 0x0000 }, /* R1370 (0x00055A) - AIF2_RX_ENABLES */ + { 0x00000580, 0x000C }, /* R1408 (0x000580) - AIF3_BCLK_CTRL */ + { 0x00000581, 0x0000 }, /* R1409 (0x000581) - AIF3_TX_PIN_CTRL */ + { 0x00000582, 0x0000 }, /* R1410 (0x000582) - AIF3_RX_PIN_CTRL */ + { 0x00000583, 0x0000 }, /* R1411 (0x000583) - AIF3_RATE_CTRL */ + { 0x00000584, 0x0000 }, /* R1412 (0x000584) - AIF3_FORMAT */ + { 0x00000586, 0x0040 }, /* R1414 (0x000586) - AIF3_RX_BCLK_RATE */ + { 0x00000587, 0x1818 }, /* R1415 (0x000587) - AIF3_FRAME_CTRL_1 */ + { 0x00000588, 0x1818 }, /* R1416 (0x000588) - AIF3_FRAME_CTRL_2 */ + { 0x00000589, 0x0000 }, /* R1417 (0x000589) - AIF3_FRAME_CTRL_3 */ + { 0x0000058A, 0x0001 }, /* R1418 (0x00058A) - AIF3_FRAME_CTRL_4 */ + { 0x00000591, 0x0000 }, /* R1425 (0x000591) - AIF3_FRAME_CTRL_11 */ + { 0x00000592, 0x0001 }, /* R1426 (0x000592) - AIF3_FRAME_CTRL_12 */ + { 0x00000599, 0x0000 }, /* R1433 (0x000599) - AIF3_TX_ENABLES */ + { 0x0000059A, 0x0000 }, /* R1434 (0x00059A) - AIF3_RX_ENABLES */ + { 0x000005C2, 0x0000 }, /* R1474 (0x0005C2) - SPD1_TX_CONTROL */ + { 0x00000640, 0x0000 }, /* R1600 (0x000640) - PWM1MIX_INPUT_1_SOURCE */ + { 0x00000641, 0x0080 }, /* R1601 (0x000641) - PWM1MIX_INPUT_1_VOLUME */ + { 0x00000642, 0x0000 }, /* R1602 (0x000642) - PWM1MIX_INPUT_2_SOURCE */ + { 0x00000643, 0x0080 }, /* R1603 (0x000643) - PWM1MIX_INPUT_2_VOLUME */ + { 0x00000644, 0x0000 }, /* R1604 (0x000644) - PWM1MIX_INPUT_3_SOURCE */ + { 0x00000645, 0x0080 }, /* R1605 (0x000645) - PWM1MIX_INPUT_3_VOLUME */ + { 0x00000646, 0x0000 }, /* R1606 (0x000646) - PWM1MIX_INPUT_4_SOURCE */ + { 0x00000647, 0x0080 }, /* R1607 (0x000647) - PWM1MIX_INPUT_4_VOLUME */ + { 0x00000648, 0x0000 }, /* R1608 (0x000648) - PWM2MIX_INPUT_1_SOURCE */ + { 0x00000649, 0x0080 }, /* R1609 (0x000649) - PWM2MIX_INPUT_1_VOLUME */ + { 0x0000064A, 0x0000 }, /* R1610 (0x00064A) - PWM2MIX_INPUT_2_SOURCE */ + { 0x0000064B, 0x0080 }, /* R1611 (0x00064B) - PWM2MIX_INPUT_2_VOLUME */ + { 0x0000064C, 0x0000 }, /* R1612 (0x00064C) - PWM2MIX_INPUT_3_SOURCE */ + { 0x0000064D, 0x0080 }, /* R1613 (0x00064D) - PWM2MIX_INPUT_3_VOLUME */ + { 0x0000064E, 0x0000 }, /* R1614 (0x00064E) - PWM2MIX_INPUT_4_SOURCE */ + { 0x0000064F, 0x0080 }, /* R1615 (0x00064F) - PWM2MIX_INPUT_4_VOLUME */ + { 0x00000680, 0x0000 }, /* R1664 (0x000680) - OUT1LMIX_INPUT_1_SOURCE */ + { 0x00000681, 0x0080 }, /* R1665 (0x000681) - OUT1LMIX_INPUT_1_VOLUME */ + { 0x00000682, 0x0000 }, /* R1666 (0x000682) - OUT1LMIX_INPUT_2_SOURCE */ + { 0x00000683, 0x0080 }, /* R1667 (0x000683) - OUT1LMIX_INPUT_2_VOLUME */ + { 0x00000684, 0x0000 }, /* R1668 (0x000684) - OUT1LMIX_INPUT_3_SOURCE */ + { 0x00000685, 0x0080 }, /* R1669 (0x000685) - OUT1LMIX_INPUT_3_VOLUME */ + { 0x00000686, 0x0000 }, /* R1670 (0x000686) - OUT1LMIX_INPUT_4_SOURCE */ + { 0x00000687, 0x0080 }, /* R1671 (0x000687) - OUT1LMIX_INPUT_4_VOLUME */ + { 0x00000688, 0x0000 }, /* R1672 (0x000688) - OUT1RMIX_INPUT_1_SOURCE */ + { 0x00000689, 0x0080 }, /* R1673 (0x000689) - OUT1RMIX_INPUT_1_VOLUME */ + { 0x0000068A, 0x0000 }, /* R1674 (0x00068A) - OUT1RMIX_INPUT_2_SOURCE */ + { 0x0000068B, 0x0080 }, /* R1675 (0x00068B) - OUT1RMIX_INPUT_2_VOLUME */ + { 0x0000068C, 0x0000 }, /* R1676 (0x00068C) - OUT1RMIX_INPUT_3_SOURCE */ + { 0x0000068D, 0x0080 }, /* R1677 (0x00068D) - OUT1RMIX_INPUT_3_VOLUME */ + { 0x0000068E, 0x0000 }, /* R1678 (0x00068E) - OUT1RMIX_INPUT_4_SOURCE */ + { 0x0000068F, 0x0080 }, /* R1679 (0x00068F) - OUT1RMIX_INPUT_4_VOLUME */ + { 0x000006B0, 0x0000 }, /* R1712 (0x0006B0) - OUT4LMIX_INPUT_1_SOURCE */ + { 0x000006B1, 0x0080 }, /* R1713 (0x0006B1) - OUT4LMIX_INPUT_1_VOLUME */ + { 0x000006B2, 0x0000 }, /* R1714 (0x0006B2) - OUT4LMIX_INPUT_2_SOURCE */ + { 0x000006B3, 0x0080 }, /* R1715 (0x0006B3) - OUT4LMIX_INPUT_2_VOLUME */ + { 0x000006B4, 0x0000 }, /* R1716 (0x0006B4) - OUT4LMIX_INPUT_3_SOURCE */ + { 0x000006B5, 0x0080 }, /* R1717 (0x0006B5) - OUT4LMIX_INPUT_3_VOLUME */ + { 0x000006B6, 0x0000 }, /* R1718 (0x0006B6) - OUT4LMIX_INPUT_4_SOURCE */ + { 0x000006B7, 0x0080 }, /* R1719 (0x0006B7) - OUT4LMIX_INPUT_4_VOLUME */ + { 0x000006C0, 0x0000 }, /* R1728 (0x0006C0) - OUT5LMIX_INPUT_1_SOURCE */ + { 0x000006C1, 0x0080 }, /* R1729 (0x0006C1) - OUT5LMIX_INPUT_1_VOLUME */ + { 0x000006C2, 0x0000 }, /* R1730 (0x0006C2) - OUT5LMIX_INPUT_2_SOURCE */ + { 0x000006C3, 0x0080 }, /* R1731 (0x0006C3) - OUT5LMIX_INPUT_2_VOLUME */ + { 0x000006C4, 0x0000 }, /* R1732 (0x0006C4) - OUT5LMIX_INPUT_3_SOURCE */ + { 0x000006C5, 0x0080 }, /* R1733 (0x0006C5) - OUT5LMIX_INPUT_3_VOLUME */ + { 0x000006C6, 0x0000 }, /* R1734 (0x0006C6) - OUT5LMIX_INPUT_4_SOURCE */ + { 0x000006C7, 0x0080 }, /* R1735 (0x0006C7) - OUT5LMIX_INPUT_4_VOLUME */ + { 0x000006C8, 0x0000 }, /* R1736 (0x0006C8) - OUT5RMIX_INPUT_1_SOURCE */ + { 0x000006C9, 0x0080 }, /* R1737 (0x0006C9) - OUT5RMIX_INPUT_1_VOLUME */ + { 0x000006CA, 0x0000 }, /* R1738 (0x0006CA) - OUT5RMIX_INPUT_2_SOURCE */ + { 0x000006CB, 0x0080 }, /* R1739 (0x0006CB) - OUT5RMIX_INPUT_2_VOLUME */ + { 0x000006CC, 0x0000 }, /* R1740 (0x0006CC) - OUT5RMIX_INPUT_3_SOURCE */ + { 0x000006CD, 0x0080 }, /* R1741 (0x0006CD) - OUT5RMIX_INPUT_3_VOLUME */ + { 0x000006CE, 0x0000 }, /* R1742 (0x0006CE) - OUT5RMIX_INPUT_4_SOURCE */ + { 0x000006CF, 0x0080 }, /* R1743 (0x0006CF) - OUT5RMIX_INPUT_4_VOLUME */ + { 0x00000700, 0x0000 }, /* R1792 (0x000700) - AIF1TX1MIX_INPUT_1_SOURCE */ + { 0x00000701, 0x0080 }, /* R1793 (0x000701) - AIF1TX1MIX_INPUT_1_VOLUME */ + { 0x00000702, 0x0000 }, /* R1794 (0x000702) - AIF1TX1MIX_INPUT_2_SOURCE */ + { 0x00000703, 0x0080 }, /* R1795 (0x000703) - AIF1TX1MIX_INPUT_2_VOLUME */ + { 0x00000704, 0x0000 }, /* R1796 (0x000704) - AIF1TX1MIX_INPUT_3_SOURCE */ + { 0x00000705, 0x0080 }, /* R1797 (0x000705) - AIF1TX1MIX_INPUT_3_VOLUME */ + { 0x00000706, 0x0000 }, /* R1798 (0x000706) - AIF1TX1MIX_INPUT_4_SOURCE */ + { 0x00000707, 0x0080 }, /* R1799 (0x000707) - AIF1TX1MIX_INPUT_4_VOLUME */ + { 0x00000708, 0x0000 }, /* R1800 (0x000708) - AIF1TX2MIX_INPUT_1_SOURCE */ + { 0x00000709, 0x0080 }, /* R1801 (0x000709) - AIF1TX2MIX_INPUT_1_VOLUME */ + { 0x0000070A, 0x0000 }, /* R1802 (0x00070A) - AIF1TX2MIX_INPUT_2_SOURCE */ + { 0x0000070B, 0x0080 }, /* R1803 (0x00070B) - AIF1TX2MIX_INPUT_2_VOLUME */ + { 0x0000070C, 0x0000 }, /* R1804 (0x00070C) - AIF1TX2MIX_INPUT_3_SOURCE */ + { 0x0000070D, 0x0080 }, /* R1805 (0x00070D) - AIF1TX2MIX_INPUT_3_VOLUME */ + { 0x0000070E, 0x0000 }, /* R1806 (0x00070E) - AIF1TX2MIX_INPUT_4_SOURCE */ + { 0x0000070F, 0x0080 }, /* R1807 (0x00070F) - AIF1TX2MIX_INPUT_4_VOLUME */ + { 0x00000710, 0x0000 }, /* R1808 (0x000710) - AIF1TX3MIX_INPUT_1_SOURCE */ + { 0x00000711, 0x0080 }, /* R1809 (0x000711) - AIF1TX3MIX_INPUT_1_VOLUME */ + { 0x00000712, 0x0000 }, /* R1810 (0x000712) - AIF1TX3MIX_INPUT_2_SOURCE */ + { 0x00000713, 0x0080 }, /* R1811 (0x000713) - AIF1TX3MIX_INPUT_2_VOLUME */ + { 0x00000714, 0x0000 }, /* R1812 (0x000714) - AIF1TX3MIX_INPUT_3_SOURCE */ + { 0x00000715, 0x0080 }, /* R1813 (0x000715) - AIF1TX3MIX_INPUT_3_VOLUME */ + { 0x00000716, 0x0000 }, /* R1814 (0x000716) - AIF1TX3MIX_INPUT_4_SOURCE */ + { 0x00000717, 0x0080 }, /* R1815 (0x000717) - AIF1TX3MIX_INPUT_4_VOLUME */ + { 0x00000718, 0x0000 }, /* R1816 (0x000718) - AIF1TX4MIX_INPUT_1_SOURCE */ + { 0x00000719, 0x0080 }, /* R1817 (0x000719) - AIF1TX4MIX_INPUT_1_VOLUME */ + { 0x0000071A, 0x0000 }, /* R1818 (0x00071A) - AIF1TX4MIX_INPUT_2_SOURCE */ + { 0x0000071B, 0x0080 }, /* R1819 (0x00071B) - AIF1TX4MIX_INPUT_2_VOLUME */ + { 0x0000071C, 0x0000 }, /* R1820 (0x00071C) - AIF1TX4MIX_INPUT_3_SOURCE */ + { 0x0000071D, 0x0080 }, /* R1821 (0x00071D) - AIF1TX4MIX_INPUT_3_VOLUME */ + { 0x0000071E, 0x0000 }, /* R1822 (0x00071E) - AIF1TX4MIX_INPUT_4_SOURCE */ + { 0x0000071F, 0x0080 }, /* R1823 (0x00071F) - AIF1TX4MIX_INPUT_4_VOLUME */ + { 0x00000720, 0x0000 }, /* R1824 (0x000720) - AIF1TX5MIX_INPUT_1_SOURCE */ + { 0x00000721, 0x0080 }, /* R1825 (0x000721) - AIF1TX5MIX_INPUT_1_VOLUME */ + { 0x00000722, 0x0000 }, /* R1826 (0x000722) - AIF1TX5MIX_INPUT_2_SOURCE */ + { 0x00000723, 0x0080 }, /* R1827 (0x000723) - AIF1TX5MIX_INPUT_2_VOLUME */ + { 0x00000724, 0x0000 }, /* R1828 (0x000724) - AIF1TX5MIX_INPUT_3_SOURCE */ + { 0x00000725, 0x0080 }, /* R1829 (0x000725) - AIF1TX5MIX_INPUT_3_VOLUME */ + { 0x00000726, 0x0000 }, /* R1830 (0x000726) - AIF1TX5MIX_INPUT_4_SOURCE */ + { 0x00000727, 0x0080 }, /* R1831 (0x000727) - AIF1TX5MIX_INPUT_4_VOLUME */ + { 0x00000728, 0x0000 }, /* R1832 (0x000728) - AIF1TX6MIX_INPUT_1_SOURCE */ + { 0x00000729, 0x0080 }, /* R1833 (0x000729) - AIF1TX6MIX_INPUT_1_VOLUME */ + { 0x0000072A, 0x0000 }, /* R1834 (0x00072A) - AIF1TX6MIX_INPUT_2_SOURCE */ + { 0x0000072B, 0x0080 }, /* R1835 (0x00072B) - AIF1TX6MIX_INPUT_2_VOLUME */ + { 0x0000072C, 0x0000 }, /* R1836 (0x00072C) - AIF1TX6MIX_INPUT_3_SOURCE */ + { 0x0000072D, 0x0080 }, /* R1837 (0x00072D) - AIF1TX6MIX_INPUT_3_VOLUME */ + { 0x0000072E, 0x0000 }, /* R1838 (0x00072E) - AIF1TX6MIX_INPUT_4_SOURCE */ + { 0x0000072F, 0x0080 }, /* R1839 (0x00072F) - AIF1TX6MIX_INPUT_4_VOLUME */ + { 0x00000740, 0x0000 }, /* R1856 (0x000740) - AIF2TX1MIX_INPUT_1_SOURCE */ + { 0x00000741, 0x0080 }, /* R1857 (0x000741) - AIF2TX1MIX_INPUT_1_VOLUME */ + { 0x00000742, 0x0000 }, /* R1858 (0x000742) - AIF2TX1MIX_INPUT_2_SOURCE */ + { 0x00000743, 0x0080 }, /* R1859 (0x000743) - AIF2TX1MIX_INPUT_2_VOLUME */ + { 0x00000744, 0x0000 }, /* R1860 (0x000744) - AIF2TX1MIX_INPUT_3_SOURCE */ + { 0x00000745, 0x0080 }, /* R1861 (0x000745) - AIF2TX1MIX_INPUT_3_VOLUME */ + { 0x00000746, 0x0000 }, /* R1862 (0x000746) - AIF2TX1MIX_INPUT_4_SOURCE */ + { 0x00000747, 0x0080 }, /* R1863 (0x000747) - AIF2TX1MIX_INPUT_4_VOLUME */ + { 0x00000748, 0x0000 }, /* R1864 (0x000748) - AIF2TX2MIX_INPUT_1_SOURCE */ + { 0x00000749, 0x0080 }, /* R1865 (0x000749) - AIF2TX2MIX_INPUT_1_VOLUME */ + { 0x0000074A, 0x0000 }, /* R1866 (0x00074A) - AIF2TX2MIX_INPUT_2_SOURCE */ + { 0x0000074B, 0x0080 }, /* R1867 (0x00074B) - AIF2TX2MIX_INPUT_2_VOLUME */ + { 0x0000074C, 0x0000 }, /* R1868 (0x00074C) - AIF2TX2MIX_INPUT_3_SOURCE */ + { 0x0000074D, 0x0080 }, /* R1869 (0x00074D) - AIF2TX2MIX_INPUT_3_VOLUME */ + { 0x0000074E, 0x0000 }, /* R1870 (0x00074E) - AIF2TX2MIX_INPUT_4_SOURCE */ + { 0x0000074F, 0x0080 }, /* R1871 (0x00074F) - AIF2TX2MIX_INPUT_4_VOLUME */ + { 0x00000750, 0x0000 }, /* R1872 (0x000750) - AIF2TX3MIX_INPUT_1_SOURCE */ + { 0x00000751, 0x0080 }, /* R1873 (0x000751) - AIF2TX3MIX_INPUT_1_VOLUME */ + { 0x00000752, 0x0000 }, /* R1874 (0x000752) - AIF2TX3MIX_INPUT_2_SOURCE */ + { 0x00000753, 0x0080 }, /* R1875 (0x000753) - AIF2TX3MIX_INPUT_2_VOLUME */ + { 0x00000754, 0x0000 }, /* R1876 (0x000754) - AIF2TX3MIX_INPUT_3_SOURCE */ + { 0x00000755, 0x0080 }, /* R1877 (0x000755) - AIF2TX3MIX_INPUT_3_VOLUME */ + { 0x00000756, 0x0000 }, /* R1878 (0x000756) - AIF2TX3MIX_INPUT_4_SOURCE */ + { 0x00000757, 0x0080 }, /* R1879 (0x000757) - AIF2TX3MIX_INPUT_4_VOLUME */ + { 0x00000758, 0x0000 }, /* R1880 (0x000758) - AIF2TX4MIX_INPUT_1_SOURCE */ + { 0x00000759, 0x0080 }, /* R1881 (0x000759) - AIF2TX4MIX_INPUT_1_VOLUME */ + { 0x0000075A, 0x0000 }, /* R1882 (0x00075A) - AIF2TX4MIX_INPUT_2_SOURCE */ + { 0x0000075B, 0x0080 }, /* R1883 (0x00075B) - AIF2TX4MIX_INPUT_2_VOLUME */ + { 0x0000075C, 0x0000 }, /* R1884 (0x00075C) - AIF2TX4MIX_INPUT_3_SOURCE */ + { 0x0000075D, 0x0080 }, /* R1885 (0x00075D) - AIF2TX4MIX_INPUT_3_VOLUME */ + { 0x0000075E, 0x0000 }, /* R1886 (0x00075E) - AIF2TX4MIX_INPUT_4_SOURCE */ + { 0x0000075F, 0x0080 }, /* R1887 (0x00075F) - AIF2TX4MIX_INPUT_4_VOLUME */ + { 0x00000780, 0x0000 }, /* R1920 (0x000780) - AIF3TX1MIX_INPUT_1_SOURCE */ + { 0x00000781, 0x0080 }, /* R1921 (0x000781) - AIF3TX1MIX_INPUT_1_VOLUME */ + { 0x00000782, 0x0000 }, /* R1922 (0x000782) - AIF3TX1MIX_INPUT_2_SOURCE */ + { 0x00000783, 0x0080 }, /* R1923 (0x000783) - AIF3TX1MIX_INPUT_2_VOLUME */ + { 0x00000784, 0x0000 }, /* R1924 (0x000784) - AIF3TX1MIX_INPUT_3_SOURCE */ + { 0x00000785, 0x0080 }, /* R1925 (0x000785) - AIF3TX1MIX_INPUT_3_VOLUME */ + { 0x00000786, 0x0000 }, /* R1926 (0x000786) - AIF3TX1MIX_INPUT_4_SOURCE */ + { 0x00000787, 0x0080 }, /* R1927 (0x000787) - AIF3TX1MIX_INPUT_4_VOLUME */ + { 0x00000788, 0x0000 }, /* R1928 (0x000788) - AIF3TX2MIX_INPUT_1_SOURCE */ + { 0x00000789, 0x0080 }, /* R1929 (0x000789) - AIF3TX2MIX_INPUT_1_VOLUME */ + { 0x0000078A, 0x0000 }, /* R1930 (0x00078A) - AIF3TX2MIX_INPUT_2_SOURCE */ + { 0x0000078B, 0x0080 }, /* R1931 (0x00078B) - AIF3TX2MIX_INPUT_2_VOLUME */ + { 0x0000078C, 0x0000 }, /* R1932 (0x00078C) - AIF3TX2MIX_INPUT_3_SOURCE */ + { 0x0000078D, 0x0080 }, /* R1933 (0x00078D) - AIF3TX2MIX_INPUT_3_VOLUME */ + { 0x0000078E, 0x0000 }, /* R1934 (0x00078E) - AIF3TX2MIX_INPUT_4_SOURCE */ + { 0x0000078F, 0x0080 }, /* R1935 (0x00078F) - AIF3TX2MIX_INPUT_4_VOLUME */ + { 0x00000800, 0x0000 }, /* R2048 (0x000800) - SPDIF1TX1MIX_INPUT_1_SOURCE */ + { 0x00000801, 0x0080 }, /* R2049 (0x000801) - SPDIF1TX1MIX_INPUT_1_VOLUME */ + { 0x00000808, 0x0000 }, /* R2056 (0x000808) - SPDIF1TX2MIX_INPUT_1_SOURCE */ + { 0x00000809, 0x0080 }, /* R2057 (0x000809) - SPDIF1TX2MIX_INPUT_1_VOLUME */ + { 0x00000880, 0x0000 }, /* R2176 (0x000880) - EQ1MIX_INPUT_1_SOURCE */ + { 0x00000881, 0x0080 }, /* R2177 (0x000881) - EQ1MIX_INPUT_1_VOLUME */ + { 0x00000882, 0x0000 }, /* R2178 (0x000882) - EQ1MIX_INPUT_2_SOURCE */ + { 0x00000883, 0x0080 }, /* R2179 (0x000883) - EQ1MIX_INPUT_2_VOLUME */ + { 0x00000884, 0x0000 }, /* R2180 (0x000884) - EQ1MIX_INPUT_3_SOURCE */ + { 0x00000885, 0x0080 }, /* R2181 (0x000885) - EQ1MIX_INPUT_3_VOLUME */ + { 0x00000886, 0x0000 }, /* R2182 (0x000886) - EQ1MIX_INPUT_4_SOURCE */ + { 0x00000887, 0x0080 }, /* R2183 (0x000887) - EQ1MIX_INPUT_4_VOLUME */ + { 0x00000888, 0x0000 }, /* R2184 (0x000888) - EQ2MIX_INPUT_1_SOURCE */ + { 0x00000889, 0x0080 }, /* R2185 (0x000889) - EQ2MIX_INPUT_1_VOLUME */ + { 0x0000088A, 0x0000 }, /* R2186 (0x00088A) - EQ2MIX_INPUT_2_SOURCE */ + { 0x0000088B, 0x0080 }, /* R2187 (0x00088B) - EQ2MIX_INPUT_2_VOLUME */ + { 0x0000088C, 0x0000 }, /* R2188 (0x00088C) - EQ2MIX_INPUT_3_SOURCE */ + { 0x0000088D, 0x0080 }, /* R2189 (0x00088D) - EQ2MIX_INPUT_3_VOLUME */ + { 0x0000088E, 0x0000 }, /* R2190 (0x00088E) - EQ2MIX_INPUT_4_SOURCE */ + { 0x0000088F, 0x0080 }, /* R2191 (0x00088F) - EQ2MIX_INPUT_4_VOLUME */ + { 0x00000890, 0x0000 }, /* R2192 (0x000890) - EQ3MIX_INPUT_1_SOURCE */ + { 0x00000891, 0x0080 }, /* R2193 (0x000891) - EQ3MIX_INPUT_1_VOLUME */ + { 0x00000892, 0x0000 }, /* R2194 (0x000892) - EQ3MIX_INPUT_2_SOURCE */ + { 0x00000893, 0x0080 }, /* R2195 (0x000893) - EQ3MIX_INPUT_2_VOLUME */ + { 0x00000894, 0x0000 }, /* R2196 (0x000894) - EQ3MIX_INPUT_3_SOURCE */ + { 0x00000895, 0x0080 }, /* R2197 (0x000895) - EQ3MIX_INPUT_3_VOLUME */ + { 0x00000896, 0x0000 }, /* R2198 (0x000896) - EQ3MIX_INPUT_4_SOURCE */ + { 0x00000897, 0x0080 }, /* R2199 (0x000897) - EQ3MIX_INPUT_4_VOLUME */ + { 0x00000898, 0x0000 }, /* R2200 (0x000898) - EQ4MIX_INPUT_1_SOURCE */ + { 0x00000899, 0x0080 }, /* R2201 (0x000899) - EQ4MIX_INPUT_1_VOLUME */ + { 0x0000089A, 0x0000 }, /* R2202 (0x00089A) - EQ4MIX_INPUT_2_SOURCE */ + { 0x0000089B, 0x0080 }, /* R2203 (0x00089B) - EQ4MIX_INPUT_2_VOLUME */ + { 0x0000089C, 0x0000 }, /* R2204 (0x00089C) - EQ4MIX_INPUT_3_SOURCE */ + { 0x0000089D, 0x0080 }, /* R2205 (0x00089D) - EQ4MIX_INPUT_3_VOLUME */ + { 0x0000089E, 0x0000 }, /* R2206 (0x00089E) - EQ4MIX_INPUT_4_SOURCE */ + { 0x0000089F, 0x0080 }, /* R2207 (0x00089F) - EQ4MIX_INPUT_4_VOLUME */ + { 0x000008C0, 0x0000 }, /* R2240 (0x0008C0) - DRC1LMIX_INPUT_1_SOURCE */ + { 0x000008C1, 0x0080 }, /* R2241 (0x0008C1) - DRC1LMIX_INPUT_1_VOLUME */ + { 0x000008C2, 0x0000 }, /* R2242 (0x0008C2) - DRC1LMIX_INPUT_2_SOURCE */ + { 0x000008C3, 0x0080 }, /* R2243 (0x0008C3) - DRC1LMIX_INPUT_2_VOLUME */ + { 0x000008C4, 0x0000 }, /* R2244 (0x0008C4) - DRC1LMIX_INPUT_3_SOURCE */ + { 0x000008C5, 0x0080 }, /* R2245 (0x0008C5) - DRC1LMIX_INPUT_3_VOLUME */ + { 0x000008C6, 0x0000 }, /* R2246 (0x0008C6) - DRC1LMIX_INPUT_4_SOURCE */ + { 0x000008C7, 0x0080 }, /* R2247 (0x0008C7) - DRC1LMIX_INPUT_4_VOLUME */ + { 0x000008C8, 0x0000 }, /* R2248 (0x0008C8) - DRC1RMIX_INPUT_1_SOURCE */ + { 0x000008C9, 0x0080 }, /* R2249 (0x0008C9) - DRC1RMIX_INPUT_1_VOLUME */ + { 0x000008CA, 0x0000 }, /* R2250 (0x0008CA) - DRC1RMIX_INPUT_2_SOURCE */ + { 0x000008CB, 0x0080 }, /* R2251 (0x0008CB) - DRC1RMIX_INPUT_2_VOLUME */ + { 0x000008CC, 0x0000 }, /* R2252 (0x0008CC) - DRC1RMIX_INPUT_3_SOURCE */ + { 0x000008CD, 0x0080 }, /* R2253 (0x0008CD) - DRC1RMIX_INPUT_3_VOLUME */ + { 0x000008CE, 0x0000 }, /* R2254 (0x0008CE) - DRC1RMIX_INPUT_4_SOURCE */ + { 0x000008CF, 0x0080 }, /* R2255 (0x0008CF) - DRC1RMIX_INPUT_4_VOLUME */ + { 0x000008D0, 0x0000 }, /* R2256 (0x0008D0) - DRC2LMIX_INPUT_1_SOURCE */ + { 0x000008D1, 0x0080 }, /* R2257 (0x0008D1) - DRC2LMIX_INPUT_1_VOLUME */ + { 0x000008D2, 0x0000 }, /* R2258 (0x0008D2) - DRC2LMIX_INPUT_2_SOURCE */ + { 0x000008D3, 0x0080 }, /* R2259 (0x0008D3) - DRC2LMIX_INPUT_2_VOLUME */ + { 0x000008D4, 0x0000 }, /* R2260 (0x0008D4) - DRC2LMIX_INPUT_3_SOURCE */ + { 0x000008D5, 0x0080 }, /* R2261 (0x0008D5) - DRC2LMIX_INPUT_3_VOLUME */ + { 0x000008D6, 0x0000 }, /* R2262 (0x0008D6) - DRC2LMIX_INPUT_4_SOURCE */ + { 0x000008D7, 0x0080 }, /* R2263 (0x0008D7) - DRC2LMIX_INPUT_4_VOLUME */ + { 0x000008D8, 0x0000 }, /* R2264 (0x0008D8) - DRC2RMIX_INPUT_1_SOURCE */ + { 0x000008D9, 0x0080 }, /* R2265 (0x0008D9) - DRC2RMIX_INPUT_1_VOLUME */ + { 0x000008DA, 0x0000 }, /* R2266 (0x0008DA) - DRC2RMIX_INPUT_2_SOURCE */ + { 0x000008DB, 0x0080 }, /* R2267 (0x0008DB) - DRC2RMIX_INPUT_2_VOLUME */ + { 0x000008DC, 0x0000 }, /* R2268 (0x0008DC) - DRC2RMIX_INPUT_3_SOURCE */ + { 0x000008DD, 0x0080 }, /* R2269 (0x0008DD) - DRC2RMIX_INPUT_3_VOLUME */ + { 0x000008DE, 0x0000 }, /* R2270 (0x0008DE) - DRC2RMIX_INPUT_4_SOURCE */ + { 0x000008DF, 0x0080 }, /* R2271 (0x0008DF) - DRC2RMIX_INPUT_4_VOLUME */ + { 0x00000900, 0x0000 }, /* R2304 (0x000900) - HPLP1MIX_INPUT_1_SOURCE */ + { 0x00000901, 0x0080 }, /* R2305 (0x000901) - HPLP1MIX_INPUT_1_VOLUME */ + { 0x00000902, 0x0000 }, /* R2306 (0x000902) - HPLP1MIX_INPUT_2_SOURCE */ + { 0x00000903, 0x0080 }, /* R2307 (0x000903) - HPLP1MIX_INPUT_2_VOLUME */ + { 0x00000904, 0x0000 }, /* R2308 (0x000904) - HPLP1MIX_INPUT_3_SOURCE */ + { 0x00000905, 0x0080 }, /* R2309 (0x000905) - HPLP1MIX_INPUT_3_VOLUME */ + { 0x00000906, 0x0000 }, /* R2310 (0x000906) - HPLP1MIX_INPUT_4_SOURCE */ + { 0x00000907, 0x0080 }, /* R2311 (0x000907) - HPLP1MIX_INPUT_4_VOLUME */ + { 0x00000908, 0x0000 }, /* R2312 (0x000908) - HPLP2MIX_INPUT_1_SOURCE */ + { 0x00000909, 0x0080 }, /* R2313 (0x000909) - HPLP2MIX_INPUT_1_VOLUME */ + { 0x0000090A, 0x0000 }, /* R2314 (0x00090A) - HPLP2MIX_INPUT_2_SOURCE */ + { 0x0000090B, 0x0080 }, /* R2315 (0x00090B) - HPLP2MIX_INPUT_2_VOLUME */ + { 0x0000090C, 0x0000 }, /* R2316 (0x00090C) - HPLP2MIX_INPUT_3_SOURCE */ + { 0x0000090D, 0x0080 }, /* R2317 (0x00090D) - HPLP2MIX_INPUT_3_VOLUME */ + { 0x0000090E, 0x0000 }, /* R2318 (0x00090E) - HPLP2MIX_INPUT_4_SOURCE */ + { 0x0000090F, 0x0080 }, /* R2319 (0x00090F) - HPLP2MIX_INPUT_4_VOLUME */ + { 0x00000910, 0x0000 }, /* R2320 (0x000910) - HPLP3MIX_INPUT_1_SOURCE */ + { 0x00000911, 0x0080 }, /* R2321 (0x000911) - HPLP3MIX_INPUT_1_VOLUME */ + { 0x00000912, 0x0000 }, /* R2322 (0x000912) - HPLP3MIX_INPUT_2_SOURCE */ + { 0x00000913, 0x0080 }, /* R2323 (0x000913) - HPLP3MIX_INPUT_2_VOLUME */ + { 0x00000914, 0x0000 }, /* R2324 (0x000914) - HPLP3MIX_INPUT_3_SOURCE */ + { 0x00000915, 0x0080 }, /* R2325 (0x000915) - HPLP3MIX_INPUT_3_VOLUME */ + { 0x00000916, 0x0000 }, /* R2326 (0x000916) - HPLP3MIX_INPUT_4_SOURCE */ + { 0x00000917, 0x0080 }, /* R2327 (0x000917) - HPLP3MIX_INPUT_4_VOLUME */ + { 0x00000918, 0x0000 }, /* R2328 (0x000918) - HPLP4MIX_INPUT_1_SOURCE */ + { 0x00000919, 0x0080 }, /* R2329 (0x000919) - HPLP4MIX_INPUT_1_VOLUME */ + { 0x0000091A, 0x0000 }, /* R2330 (0x00091A) - HPLP4MIX_INPUT_2_SOURCE */ + { 0x0000091B, 0x0080 }, /* R2331 (0x00091B) - HPLP4MIX_INPUT_2_VOLUME */ + { 0x0000091C, 0x0000 }, /* R2332 (0x00091C) - HPLP4MIX_INPUT_3_SOURCE */ + { 0x0000091D, 0x0080 }, /* R2333 (0x00091D) - HPLP4MIX_INPUT_3_VOLUME */ + { 0x0000091E, 0x0000 }, /* R2334 (0x00091E) - HPLP4MIX_INPUT_4_SOURCE */ + { 0x0000091F, 0x0080 }, /* R2335 (0x00091F) - HPLP4MIX_INPUT_4_VOLUME */ + { 0x00000940, 0x0000 }, /* R2368 (0x000940) - DSP1LMIX_INPUT_1_SOURCE */ + { 0x00000941, 0x0080 }, /* R2369 (0x000941) - DSP1LMIX_INPUT_1_VOLUME */ + { 0x00000942, 0x0000 }, /* R2370 (0x000942) - DSP1LMIX_INPUT_2_SOURCE */ + { 0x00000943, 0x0080 }, /* R2371 (0x000943) - DSP1LMIX_INPUT_2_VOLUME */ + { 0x00000944, 0x0000 }, /* R2372 (0x000944) - DSP1LMIX_INPUT_3_SOURCE */ + { 0x00000945, 0x0080 }, /* R2373 (0x000945) - DSP1LMIX_INPUT_3_VOLUME */ + { 0x00000946, 0x0000 }, /* R2374 (0x000946) - DSP1LMIX_INPUT_4_SOURCE */ + { 0x00000947, 0x0080 }, /* R2375 (0x000947) - DSP1LMIX_INPUT_4_VOLUME */ + { 0x00000948, 0x0000 }, /* R2376 (0x000948) - DSP1RMIX_INPUT_1_SOURCE */ + { 0x00000949, 0x0080 }, /* R2377 (0x000949) - DSP1RMIX_INPUT_1_VOLUME */ + { 0x0000094A, 0x0000 }, /* R2378 (0x00094A) - DSP1RMIX_INPUT_2_SOURCE */ + { 0x0000094B, 0x0080 }, /* R2379 (0x00094B) - DSP1RMIX_INPUT_2_VOLUME */ + { 0x0000094C, 0x0000 }, /* R2380 (0x00094C) - DSP1RMIX_INPUT_3_SOURCE */ + { 0x0000094D, 0x0080 }, /* R2381 (0x00094D) - DSP1RMIX_INPUT_3_VOLUME */ + { 0x0000094E, 0x0000 }, /* R2382 (0x00094E) - DSP1RMIX_INPUT_4_SOURCE */ + { 0x0000094F, 0x0080 }, /* R2383 (0x00094F) - DSP1RMIX_INPUT_4_VOLUME */ + { 0x00000950, 0x0000 }, /* R2384 (0x000950) - DSP1AUX1MIX_INPUT_1_SOURCE */ + { 0x00000958, 0x0000 }, /* R2392 (0x000958) - DSP1AUX2MIX_INPUT_1_SOURCE */ + { 0x00000960, 0x0000 }, /* R2400 (0x000960) - DSP1AUX3MIX_INPUT_1_SOURCE */ + { 0x00000968, 0x0000 }, /* R2408 (0x000968) - DSP1AUX4MIX_INPUT_1_SOURCE */ + { 0x00000970, 0x0000 }, /* R2416 (0x000970) - DSP1AUX5MIX_INPUT_1_SOURCE */ + { 0x00000978, 0x0000 }, /* R2424 (0x000978) - DSP1AUX6MIX_INPUT_1_SOURCE */ + { 0x00000B00, 0x0000 }, /* R2816 (0x000B00) - ISRC1DEC1MIX_INPUT_1_SOURCE */ + { 0x00000B08, 0x0000 }, /* R2824 (0x000B08) - ISRC1DEC2MIX_INPUT_1_SOURCE */ + { 0x00000B10, 0x0000 }, /* R2832 (0x000B10) - ISRC1DEC3MIX_INPUT_1_SOURCE */ + { 0x00000B18, 0x0000 }, /* R2840 (0x000B18) - ISRC1DEC4MIX_INPUT_1_SOURCE */ + { 0x00000B20, 0x0000 }, /* R2848 (0x000B20) - ISRC1INT1MIX_INPUT_1_SOURCE */ + { 0x00000B28, 0x0000 }, /* R2856 (0x000B28) - ISRC1INT2MIX_INPUT_1_SOURCE */ + { 0x00000B30, 0x0000 }, /* R2864 (0x000B30) - ISRC1INT3MIX_INPUT_1_SOURCE */ + { 0x00000B38, 0x0000 }, /* R2872 (0x000B38) - ISRC1INT4MIX_INPUT_1_SOURCE */ + { 0x00000B40, 0x0000 }, /* R2880 (0x000B40) - ISRC2DEC1MIX_INPUT_1_SOURCE */ + { 0x00000B48, 0x0000 }, /* R2888 (0x000B48) - ISRC2DEC2MIX_INPUT_1_SOURCE */ + { 0x00000B50, 0x0000 }, /* R2896 (0x000B50) - ISRC2DEC3MIX_INPUT_1_SOURCE */ + { 0x00000B58, 0x0000 }, /* R2904 (0x000B58) - ISRC2DEC4MIX_INPUT_1_SOURCE */ + { 0x00000B60, 0x0000 }, /* R2912 (0x000B60) - ISRC2INT1MIX_INPUT_1_SOURCE */ + { 0x00000B68, 0x0000 }, /* R2920 (0x000B68) - ISRC2INT2MIX_INPUT_1_SOURCE */ + { 0x00000B70, 0x0000 }, /* R2928 (0x000B70) - ISRC2INT3MIX_INPUT_1_SOURCE */ + { 0x00000B78, 0x0000 }, /* R2936 (0x000B78) - ISRC2INT4MIX_INPUT_1_SOURCE */ + { 0x00000E00, 0x0000 }, /* R3584 (0x000E00) - FX_CTRL1 */ + { 0x00000E10, 0x6318 }, /* R3600 (0x000E10) - EQ1_1 */ + { 0x00000E11, 0x6300 }, /* R3601 (0x000E11) - EQ1_2 */ + { 0x00000E12, 0x0FC8 }, /* R3602 (0x000E12) - EQ1_3 */ + { 0x00000E13, 0x03FE }, /* R3603 (0x000E13) - EQ1_4 */ + { 0x00000E14, 0x00E0 }, /* R3604 (0x000E14) - EQ1_5 */ + { 0x00000E15, 0x1EC4 }, /* R3605 (0x000E15) - EQ1_6 */ + { 0x00000E16, 0xF136 }, /* R3606 (0x000E16) - EQ1_7 */ + { 0x00000E17, 0x0409 }, /* R3607 (0x000E17) - EQ1_8 */ + { 0x00000E18, 0x04CC }, /* R3608 (0x000E18) - EQ1_9 */ + { 0x00000E19, 0x1C9B }, /* R3609 (0x000E19) - EQ1_10 */ + { 0x00000E1A, 0xF337 }, /* R3610 (0x000E1A) - EQ1_11 */ + { 0x00000E1B, 0x040B }, /* R3611 (0x000E1B) - EQ1_12 */ + { 0x00000E1C, 0x0CBB }, /* R3612 (0x000E1C) - EQ1_13 */ + { 0x00000E1D, 0x16F8 }, /* R3613 (0x000E1D) - EQ1_14 */ + { 0x00000E1E, 0xF7D9 }, /* R3614 (0x000E1E) - EQ1_15 */ + { 0x00000E1F, 0x040A }, /* R3615 (0x000E1F) - EQ1_16 */ + { 0x00000E20, 0x1F14 }, /* R3616 (0x000E20) - EQ1_17 */ + { 0x00000E21, 0x058C }, /* R3617 (0x000E21) - EQ1_18 */ + { 0x00000E22, 0x0563 }, /* R3618 (0x000E22) - EQ1_19 */ + { 0x00000E23, 0x4000 }, /* R3619 (0x000E23) - EQ1_20 */ + { 0x00000E24, 0x0B75 }, /* R3620 (0x000E24) - EQ1_21 */ + { 0x00000E26, 0x6318 }, /* R3622 (0x000E26) - EQ2_1 */ + { 0x00000E27, 0x6300 }, /* R3623 (0x000E27) - EQ2_2 */ + { 0x00000E28, 0x0FC8 }, /* R3624 (0x000E28) - EQ2_3 */ + { 0x00000E29, 0x03FE }, /* R3625 (0x000E29) - EQ2_4 */ + { 0x00000E2A, 0x00E0 }, /* R3626 (0x000E2A) - EQ2_5 */ + { 0x00000E2B, 0x1EC4 }, /* R3627 (0x000E2B) - EQ2_6 */ + { 0x00000E2C, 0xF136 }, /* R3628 (0x000E2C) - EQ2_7 */ + { 0x00000E2D, 0x0409 }, /* R3629 (0x000E2D) - EQ2_8 */ + { 0x00000E2E, 0x04CC }, /* R3630 (0x000E2E) - EQ2_9 */ + { 0x00000E2F, 0x1C9B }, /* R3631 (0x000E2F) - EQ2_10 */ + { 0x00000E30, 0xF337 }, /* R3632 (0x000E30) - EQ2_11 */ + { 0x00000E31, 0x040B }, /* R3633 (0x000E31) - EQ2_12 */ + { 0x00000E32, 0x0CBB }, /* R3634 (0x000E32) - EQ2_13 */ + { 0x00000E33, 0x16F8 }, /* R3635 (0x000E33) - EQ2_14 */ + { 0x00000E34, 0xF7D9 }, /* R3636 (0x000E34) - EQ2_15 */ + { 0x00000E35, 0x040A }, /* R3637 (0x000E35) - EQ2_16 */ + { 0x00000E36, 0x1F14 }, /* R3638 (0x000E36) - EQ2_17 */ + { 0x00000E37, 0x058C }, /* R3639 (0x000E37) - EQ2_18 */ + { 0x00000E38, 0x0563 }, /* R3640 (0x000E38) - EQ2_19 */ + { 0x00000E39, 0x4000 }, /* R3641 (0x000E39) - EQ2_20 */ + { 0x00000E3A, 0x0B75 }, /* R3642 (0x000E3A) - EQ2_21 */ + { 0x00000E3C, 0x6318 }, /* R3644 (0x000E3C) - EQ3_1 */ + { 0x00000E3D, 0x6300 }, /* R3645 (0x000E3D) - EQ3_2 */ + { 0x00000E3E, 0x0FC8 }, /* R3646 (0x000E3E) - EQ3_3 */ + { 0x00000E3F, 0x03FE }, /* R3647 (0x000E3F) - EQ3_4 */ + { 0x00000E40, 0x00E0 }, /* R3648 (0x000E40) - EQ3_5 */ + { 0x00000E41, 0x1EC4 }, /* R3649 (0x000E41) - EQ3_6 */ + { 0x00000E42, 0xF136 }, /* R3650 (0x000E42) - EQ3_7 */ + { 0x00000E43, 0x0409 }, /* R3651 (0x000E43) - EQ3_8 */ + { 0x00000E44, 0x04CC }, /* R3652 (0x000E44) - EQ3_9 */ + { 0x00000E45, 0x1C9B }, /* R3653 (0x000E45) - EQ3_10 */ + { 0x00000E46, 0xF337 }, /* R3654 (0x000E46) - EQ3_11 */ + { 0x00000E47, 0x040B }, /* R3655 (0x000E47) - EQ3_12 */ + { 0x00000E48, 0x0CBB }, /* R3656 (0x000E48) - EQ3_13 */ + { 0x00000E49, 0x16F8 }, /* R3657 (0x000E49) - EQ3_14 */ + { 0x00000E4A, 0xF7D9 }, /* R3658 (0x000E4A) - EQ3_15 */ + { 0x00000E4B, 0x040A }, /* R3659 (0x000E4B) - EQ3_16 */ + { 0x00000E4C, 0x1F14 }, /* R3660 (0x000E4C) - EQ3_17 */ + { 0x00000E4D, 0x058C }, /* R3661 (0x000E4D) - EQ3_18 */ + { 0x00000E4E, 0x0563 }, /* R3662 (0x000E4E) - EQ3_19 */ + { 0x00000E4F, 0x4000 }, /* R3663 (0x000E4F) - EQ3_20 */ + { 0x00000E50, 0x0B75 }, /* R3664 (0x000E50) - EQ3_21 */ + { 0x00000E52, 0x6318 }, /* R3666 (0x000E52) - EQ4_1 */ + { 0x00000E53, 0x6300 }, /* R3667 (0x000E53) - EQ4_2 */ + { 0x00000E54, 0x0FC8 }, /* R3668 (0x000E54) - EQ4_3 */ + { 0x00000E55, 0x03FE }, /* R3669 (0x000E55) - EQ4_4 */ + { 0x00000E56, 0x00E0 }, /* R3670 (0x000E56) - EQ4_5 */ + { 0x00000E57, 0x1EC4 }, /* R3671 (0x000E57) - EQ4_6 */ + { 0x00000E58, 0xF136 }, /* R3672 (0x000E58) - EQ4_7 */ + { 0x00000E59, 0x0409 }, /* R3673 (0x000E59) - EQ4_8 */ + { 0x00000E5A, 0x04CC }, /* R3674 (0x000E5A) - EQ4_9 */ + { 0x00000E5B, 0x1C9B }, /* R3675 (0x000E5B) - EQ4_10 */ + { 0x00000E5C, 0xF337 }, /* R3676 (0x000E5C) - EQ4_11 */ + { 0x00000E5D, 0x040B }, /* R3677 (0x000E5D) - EQ4_12 */ + { 0x00000E5E, 0x0CBB }, /* R3678 (0x000E5E) - EQ4_13 */ + { 0x00000E5F, 0x16F8 }, /* R3679 (0x000E5F) - EQ4_14 */ + { 0x00000E60, 0xF7D9 }, /* R3680 (0x000E60) - EQ4_15 */ + { 0x00000E61, 0x040A }, /* R3681 (0x000E61) - EQ4_16 */ + { 0x00000E62, 0x1F14 }, /* R3682 (0x000E62) - EQ4_17 */ + { 0x00000E63, 0x058C }, /* R3683 (0x000E63) - EQ4_18 */ + { 0x00000E64, 0x0563 }, /* R3684 (0x000E64) - EQ4_19 */ + { 0x00000E65, 0x4000 }, /* R3685 (0x000E65) - EQ4_20 */ + { 0x00000E66, 0x0B75 }, /* R3686 (0x000E66) - EQ4_21 */ + { 0x00000E80, 0x0018 }, /* R3712 (0x000E80) - DRC1_CTRL1 */ + { 0x00000E81, 0x0933 }, /* R3713 (0x000E81) - DRC1_CTRL2 */ + { 0x00000E82, 0x0018 }, /* R3714 (0x000E82) - DRC1_CTRL3 */ + { 0x00000E83, 0x0000 }, /* R3715 (0x000E83) - DRC1_CTRL4 */ + { 0x00000E84, 0x0000 }, /* R3716 (0x000E84) - DRC1_CTRL5 */ + { 0x00000E88, 0x0018 }, /* R3720 (0x000E88) - DRC2_CTRL1 */ + { 0x00000E89, 0x0933 }, /* R3721 (0x000E89) - DRC2_CTRL2 */ + { 0x00000E8A, 0x0018 }, /* R3722 (0x000E8A) - DRC2_CTRL3 */ + { 0x00000E8B, 0x0000 }, /* R3723 (0x000E8B) - DRC2_CTRL4 */ + { 0x00000E8C, 0x0000 }, /* R3724 (0x000E8C) - DRC2_CTRL5 */ + { 0x00000EC0, 0x0000 }, /* R3776 (0x000EC0) - HPLPF1_1 */ + { 0x00000EC1, 0x0000 }, /* R3777 (0x000EC1) - HPLPF1_2 */ + { 0x00000EC4, 0x0000 }, /* R3780 (0x000EC4) - HPLPF2_1 */ + { 0x00000EC5, 0x0000 }, /* R3781 (0x000EC5) - HPLPF2_2 */ + { 0x00000EC8, 0x0000 }, /* R3784 (0x000EC8) - HPLPF3_1 */ + { 0x00000EC9, 0x0000 }, /* R3785 (0x000EC9) - HPLPF3_2 */ + { 0x00000ECC, 0x0000 }, /* R3788 (0x000ECC) - HPLPF4_1 */ + { 0x00000ECD, 0x0000 }, /* R3789 (0x000ECD) - HPLPF4_2 */ + { 0x00000EF0, 0x0000 }, /* R3824 (0x000EF0) - ISRC1_CTRL_1 */ + { 0x00000EF1, 0x0001 }, /* R3825 (0x000EF1) - ISRC1_CTRL_2 */ + { 0x00000EF2, 0x0000 }, /* R3826 (0x000EF2) - ISRC1_CTRL_3 */ + { 0x00000EF3, 0x0000 }, /* R3827 (0x000EF3) - ISRC2_CTRL_1 */ + { 0x00000EF4, 0x0001 }, /* R3828 (0x000EF4) - ISRC2_CTRL_2 */ + { 0x00000EF5, 0x0000 }, /* R3829 (0x000EF5) - ISRC2_CTRL_3 */ + { 0x00001300, 0x0000 }, /* R4864 (0x001300) - DAC Comp 1 */ + { 0x00001302, 0x0000 }, /* R4866 (0x001302) - DAC Comp 2 */ + { 0x00001380, 0x0000 }, /* R4992 (0x001380) - FRF_COEFFICIENT_1L_1 */ + { 0x00001381, 0x0000 }, /* R4993 (0x001381) - FRF_COEFFICIENT_1L_2 */ + { 0x00001382, 0x0000 }, /* R4994 (0x001382) - FRF_COEFFICIENT_1L_3 */ + { 0x00001383, 0x0000 }, /* R4995 (0x001383) - FRF_COEFFICIENT_1L_4 */ + { 0x00001390, 0x0000 }, /* R5008 (0x001390) - FRF_COEFFICIENT_1R_1 */ + { 0x00001391, 0x0000 }, /* R5009 (0x001391) - FRF_COEFFICIENT_1R_2 */ + { 0x00001392, 0x0000 }, /* R5010 (0x001392) - FRF_COEFFICIENT_1R_3 */ + { 0x00001393, 0x0000 }, /* R5011 (0x001393) - FRF_COEFFICIENT_1R_4 */ + { 0x000013E0, 0x0000 }, /* R5088 (0x0013E0) - FRF_COEFFICIENT_4L_1 */ + { 0x000013E1, 0x0000 }, /* R5089 (0x0013E1) - FRF_COEFFICIENT_4L_2 */ + { 0x000013E2, 0x0000 }, /* R5090 (0x0013E2) - FRF_COEFFICIENT_4L_3 */ + { 0x000013E3, 0x0000 }, /* R5091 (0x0013E3) - FRF_COEFFICIENT_4L_4 */ + { 0x00001400, 0x0000 }, /* R5120 (0x001400) - FRF_COEFFICIENT_5L_1 */ + { 0x00001401, 0x0000 }, /* R5121 (0x001401) - FRF_COEFFICIENT_5L_2 */ + { 0x00001402, 0x0000 }, /* R5122 (0x001402) - FRF_COEFFICIENT_5L_3 */ + { 0x00001403, 0x0000 }, /* R5123 (0x001403) - FRF_COEFFICIENT_5L_4 */ + { 0x00001410, 0x0000 }, /* R5136 (0x001410) - FRF_COEFFICIENT_5R_1 */ + { 0x00001411, 0x0000 }, /* R5137 (0x001411) - FRF_COEFFICIENT_5R_2 */ + { 0x00001412, 0x0000 }, /* R5138 (0x001412) - FRF_COEFFICIENT_5R_3 */ + { 0x00001413, 0x0000 }, /* R5139 (0x001413) - FRF_COEFFICIENT_5R_4 */ + { 0x00001701, 0xE800 }, /* R5889 (0x001701) - GPIO1_CTRL_2 */ + { 0x00001703, 0xE800 }, /* R5891 (0x001703) - GPIO2_CTRL_2 */ + { 0x00001705, 0xE800 }, /* R5893 (0x001705) - GPIO3_CTRL_2 */ + { 0x00001707, 0xE800 }, /* R5895 (0x001707) - GPIO4_CTRL_2 */ + { 0x00001709, 0xE800 }, /* R5897 (0x001709) - GPIO5_CTRL_2 */ + { 0x0000170B, 0xE800 }, /* R5899 (0x00170B) - GPIO6_CTRL_2 */ + { 0x0000170D, 0xE800 }, /* R5901 (0x00170D) - GPIO7_CTRL_2 */ + { 0x0000170F, 0xE800 }, /* R5903 (0x00170F) - GPIO8_CTRL_2 */ + { 0x00001711, 0xE800 }, /* R5905 (0x001711) - GPIO9_CTRL_2 */ + { 0x00001713, 0xE800 }, /* R5907 (0x001713) - GPIO10_CTRL_2 */ + { 0x00001715, 0xE800 }, /* R5909 (0x001715) - GPIO11_CTRL_2 */ + { 0x00001717, 0xE800 }, /* R5911 (0x001717) - GPIO12_CTRL_2 */ + { 0x00001719, 0xE800 }, /* R5913 (0x001719) - GPIO13_CTRL_2 */ + { 0x0000171B, 0xE800 }, /* R5915 (0x00171B) - GPIO14_CTRL_2 */ + { 0x0000171D, 0xE800 }, /* R5917 (0x00171D) - GPIO15_CTRL_2 */ + { 0x00001840, 0xFFFF }, /* R6208 (0x001840) - IRQ1_MASK_1 */ + { 0x00001841, 0xFFFF }, /* R6209 (0x001841) - IRQ1_MASK_2 */ + { 0x00001842, 0xFFFF }, /* R6210 (0x001842) - IRQ1 MASK 3 */ + { 0x00001843, 0xFFFF }, /* R6211 (0x001843) - IRQ1 MASK 4 */ + { 0x00001844, 0xFFFF }, /* R6212 (0x001844) - IRQ1 MASK 5 */ + { 0x00001845, 0xFFFF }, /* R6213 (0x001845) - IRQ1_MASK_6 */ + { 0x00001846, 0xFFFF }, /* R6214 (0x001846) - IRQ1_MASK_7 */ + { 0x00001847, 0xFFFF }, /* R6215 (0x001847) - IRQ1 MASK 8 */ + { 0x00001848, 0xFFFF }, /* R6216 (0x001848) - IRQ1_MASK_9 */ + { 0x00001849, 0xFFFF }, /* R6217 (0x001849) - IRQ1 MASK 10 */ + { 0x0000184A, 0xFFFF }, /* R6218 (0x00184A) - IRQ1_MASK_11 */ + { 0x0000184B, 0xFFFF }, /* R6219 (0x00184B) - IRQ1_MASK_12 */ + { 0x0000184C, 0xFFFF }, /* R6220 (0x00184C) - IRQ1_MASK_13 */ + { 0x0000184D, 0xFFFF }, /* R6221 (0x00184D) - IRQ1_MASK_14 */ + { 0x0000184E, 0xFFFF }, /* R6222 (0x00184E) - IRQ1_MASK_15 */ + { 0x0000184F, 0xFFFF }, /* R6223 (0x00184F) - IRQ1_MASK_16 */ + { 0x00001850, 0xFFFF }, /* R6224 (0x001850) - IRQ1_MASK_17 */ + { 0x00001851, 0xFFFF }, /* R6225 (0x001851) - IRQ1 MASK 18 */ + { 0x00001852, 0xFFFF }, /* R6226 (0x001852) - IRQ1 MASK 19 */ + { 0x00001853, 0xFFFF }, /* R6227 (0x001853) - IRQ1 MASK 20 */ + { 0x00001854, 0xFFFF }, /* R6228 (0x001854) - IRQ1_MASK_21 */ + { 0x00001855, 0xFFFF }, /* R6229 (0x001855) - IRQ1_MASK_22 */ + { 0x00001856, 0xFFFF }, /* R6230 (0x001856) - IRQ1_MASK_23 */ + { 0x00001857, 0xFFFF }, /* R6231 (0x001857) - IRQ1_MASK_24 */ + { 0x00001858, 0xFFFF }, /* R6232 (0x001858) - IRQ1_MASK_25 */ + { 0x00001859, 0xFFFF }, /* R6233 (0x001859) - IRQ1 MASK 26 */ + { 0x0000185A, 0xFFFF }, /* R6234 (0x00185A) - IRQ1_MASK_27 */ + { 0x0000185B, 0xFFFF }, /* R6235 (0x00185B) - IRQ1_MASK_28 */ + { 0x0000185C, 0xFFFF }, /* R6236 (0x00185C) - IRQ1 MASK 29 */ + { 0x0000185D, 0xFFFF }, /* R6237 (0x00185D) - IRQ1_MASK_30 */ + { 0x0000185E, 0xFFFF }, /* R6238 (0x00185E) - IRQ1_MASK_31 */ + { 0x0000185F, 0xFFFF }, /* R6239 (0x00185F) - IRQ1_MASK_32 */ + { 0x00001860, 0xFFFF }, /* R6240 (0x001860) - IRQ1_MASK_33 */ + { 0x00001948, 0xFFFF }, /* R6472 (0x001948) - IRQ2_MASK_9 */ + { 0x00001A06, 0x0000 }, /* R6662 (0x001A06) - INTERRUPT_DEBOUNCE_7 */ + { 0x00001A80, 0x4400 }, /* R6784 (0x001A80) - IRQ1_CTRL */ +}; + +static bool cs47l15_is_adsp_memory(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0x080000 ... 0x088ffe: + case 0x0a0000 ... 0x0a9ffe: + case 0x0c0000 ... 0x0c1ffe: + case 0x0e0000 ... 0x0e1ffe: + return true; + default: + return false; + } +} + +static bool cs47l15_16bit_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_SOFTWARE_RESET: + case ARIZONA_DEVICE_REVISION: + case ARIZONA_CTRL_IF_SPI_CFG_1: + case ARIZONA_WRITE_SEQUENCER_CTRL_0: + case ARIZONA_WRITE_SEQUENCER_CTRL_1: + case ARIZONA_WRITE_SEQUENCER_CTRL_2: + case ARIZONA_TONE_GENERATOR_1: + case ARIZONA_TONE_GENERATOR_2: + case ARIZONA_TONE_GENERATOR_3: + case ARIZONA_TONE_GENERATOR_4: + case ARIZONA_TONE_GENERATOR_5: + case ARIZONA_PWM_DRIVE_1: + case ARIZONA_PWM_DRIVE_2: + case ARIZONA_PWM_DRIVE_3: + case ARIZONA_SEQUENCE_CONTROL: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_1: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3: + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_4: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5: + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6: + case ARIZONA_HAPTICS_CONTROL_1: + case ARIZONA_HAPTICS_CONTROL_2: + case ARIZONA_HAPTICS_PHASE_1_INTENSITY: + case ARIZONA_HAPTICS_PHASE_1_DURATION: + case ARIZONA_HAPTICS_PHASE_2_INTENSITY: + case ARIZONA_HAPTICS_PHASE_2_DURATION: + case ARIZONA_HAPTICS_PHASE_3_INTENSITY: + case ARIZONA_HAPTICS_PHASE_3_DURATION: + case ARIZONA_HAPTICS_STATUS: + case CLEARWATER_COMFORT_NOISE_GENERATOR: + case ARIZONA_CLOCK_32K_1: + case ARIZONA_SYSTEM_CLOCK_1: + case ARIZONA_SAMPLE_RATE_1: + case ARIZONA_SAMPLE_RATE_2: + case ARIZONA_SAMPLE_RATE_3: + case ARIZONA_SAMPLE_RATE_1_STATUS: + case ARIZONA_SAMPLE_RATE_2_STATUS: + case ARIZONA_SAMPLE_RATE_3_STATUS: + case CLEARWATER_DSP_CLOCK_1: + case CLEARWATER_DSP_CLOCK_2: + case ARIZONA_OUTPUT_SYSTEM_CLOCK: + case ARIZONA_RATE_ESTIMATOR_1: + case ARIZONA_RATE_ESTIMATOR_2: + case ARIZONA_RATE_ESTIMATOR_3: + case ARIZONA_RATE_ESTIMATOR_4: + case ARIZONA_RATE_ESTIMATOR_5: + case ARIZONA_FLL1_CONTROL_1: + case ARIZONA_FLL1_CONTROL_2: + case ARIZONA_FLL1_CONTROL_3: + case ARIZONA_FLL1_CONTROL_4: + case ARIZONA_FLL1_CONTROL_5: + case ARIZONA_FLL1_CONTROL_6: + case ARIZONA_FLL1_CONTROL_7: + case ARIZONA_FLL1_EFS_2: + case ARIZONA_FLL1_LOOP_FILTER_TEST_1: + case ARIZONA_FLL1_NCO_TEST_0: + case ARIZONA_FLL1_SYNCHRONISER_1: + case ARIZONA_FLL1_SYNCHRONISER_2: + case ARIZONA_FLL1_SYNCHRONISER_3: + case ARIZONA_FLL1_SYNCHRONISER_4: + case ARIZONA_FLL1_SYNCHRONISER_5: + case ARIZONA_FLL1_SYNCHRONISER_6: + case ARIZONA_FLL1_SYNCHRONISER_7: + case ARIZONA_FLL1_SPREAD_SPECTRUM: + case ARIZONA_FLL1_GPIO_CLOCK: + case MOON_FLLAO_CONTROL_1: + case MOON_FLLAO_CONTROL_2: + case MOON_FLLAO_CONTROL_3: + case MOON_FLLAO_CONTROL_4: + case MOON_FLLAO_CONTROL_5: + case MOON_FLLAO_CONTROL_6: + case MOON_FLLAO_CONTROL_7: + case MOON_FLLAO_CONTROL_8: + case MOON_FLLAO_CONTROL_9: + case MOON_FLLAO_CONTROL_10: + case MOON_FLLAO_CONTROL_11: + case ARIZONA_MIC_BIAS_CTRL_1: + case ARIZONA_MIC_BIAS_CTRL_5: + case MOON_HEADPHONE_DETECT_0: + case ARIZONA_HP_CTRL_1L: + case ARIZONA_HP_CTRL_1R: + case ARIZONA_HEADPHONE_DETECT_1: + case ARIZONA_HEADPHONE_DETECT_2: + case ARIZONA_HEADPHONE_DETECT_3: + case ARIZONA_HP_DACVAL: + case CLEARWATER_MICD_CLAMP_CONTROL: + case MOON_MIC_DETECT_0: + case ARIZONA_MIC_DETECT_1: + case ARIZONA_MIC_DETECT_2: + case ARIZONA_MIC_DETECT_3: + case ARIZONA_MIC_DETECT_4: + case ARIZONA_MIC_DETECT_LEVEL_1: + case ARIZONA_MIC_DETECT_LEVEL_2: + case ARIZONA_MIC_DETECT_LEVEL_3: + case ARIZONA_MIC_DETECT_LEVEL_4: + case CLEARWATER_GP_SWITCH_1: + case ARIZONA_JACK_DETECT_ANALOGUE: + case ARIZONA_INPUT_ENABLES: + case ARIZONA_INPUT_ENABLES_STATUS: + case ARIZONA_INPUT_RATE: + case ARIZONA_INPUT_VOLUME_RAMP: + case ARIZONA_HPF_CONTROL: + case ARIZONA_IN1L_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_1L: + case ARIZONA_DMIC1L_CONTROL: + case MOON_IN1L_RATE_CONTROL: + case ARIZONA_IN1R_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_1R: + case ARIZONA_DMIC1R_CONTROL: + case MOON_IN1R_RATE_CONTROL: + case ARIZONA_IN2L_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_2L: + case ARIZONA_DMIC2L_CONTROL: + case MOON_IN2L_RATE_CONTROL: + case ARIZONA_IN2R_CONTROL: + case ARIZONA_ADC_DIGITAL_VOLUME_2R: + case ARIZONA_DMIC2R_CONTROL: + case MOON_IN2R_RATE_CONTROL: + case ARIZONA_OUTPUT_ENABLES_1: + case ARIZONA_OUTPUT_STATUS_1: + case ARIZONA_RAW_OUTPUT_STATUS_1: + case ARIZONA_OUTPUT_RATE_1: + case ARIZONA_OUTPUT_VOLUME_RAMP: + case ARIZONA_OUTPUT_PATH_CONFIG_1L: + case ARIZONA_DAC_DIGITAL_VOLUME_1L: + case MOON_OUT1_CONFIG: + case ARIZONA_NOISE_GATE_SELECT_1L: + case ARIZONA_OUTPUT_PATH_CONFIG_1R: + case ARIZONA_DAC_DIGITAL_VOLUME_1R: + case ARIZONA_NOISE_GATE_SELECT_1R: + case MOON_OUT2_CONFIG: + case ARIZONA_OUTPUT_PATH_CONFIG_4L: + case ARIZONA_DAC_DIGITAL_VOLUME_4L: + case ARIZONA_NOISE_GATE_SELECT_4L: + case ARIZONA_OUTPUT_PATH_CONFIG_5L: + case ARIZONA_DAC_DIGITAL_VOLUME_5L: + case ARIZONA_NOISE_GATE_SELECT_5L: + case ARIZONA_OUTPUT_PATH_CONFIG_5R: + case ARIZONA_DAC_DIGITAL_VOLUME_5R: + case ARIZONA_NOISE_GATE_SELECT_5R: + case ARIZONA_DRE_ENABLE: + case CLEARWATER_EDRE_ENABLE: + case ARIZONA_DAC_AEC_CONTROL_1: + case ARIZONA_NOISE_GATE_CONTROL: + case ARIZONA_PDM_SPK1_CTRL_1: + case ARIZONA_PDM_SPK1_CTRL_2: + case ARIZONA_HP1_SHORT_CIRCUIT_CTRL: + case ARIZONA_HP_TEST_CTRL_5: + case ARIZONA_HP_TEST_CTRL_6: + case ARIZONA_AIF1_BCLK_CTRL: + case ARIZONA_AIF1_TX_PIN_CTRL: + case ARIZONA_AIF1_RX_PIN_CTRL: + case ARIZONA_AIF1_RATE_CTRL: + case ARIZONA_AIF1_FORMAT: + case ARIZONA_AIF1_RX_BCLK_RATE: + case ARIZONA_AIF1_FRAME_CTRL_1: + case ARIZONA_AIF1_FRAME_CTRL_2: + case ARIZONA_AIF1_FRAME_CTRL_3: + case ARIZONA_AIF1_FRAME_CTRL_4: + case ARIZONA_AIF1_FRAME_CTRL_5: + case ARIZONA_AIF1_FRAME_CTRL_6: + case ARIZONA_AIF1_FRAME_CTRL_7: + case ARIZONA_AIF1_FRAME_CTRL_8: + case ARIZONA_AIF1_FRAME_CTRL_11: + case ARIZONA_AIF1_FRAME_CTRL_12: + case ARIZONA_AIF1_FRAME_CTRL_13: + case ARIZONA_AIF1_FRAME_CTRL_14: + case ARIZONA_AIF1_FRAME_CTRL_15: + case ARIZONA_AIF1_FRAME_CTRL_16: + case ARIZONA_AIF1_TX_ENABLES: + case ARIZONA_AIF1_RX_ENABLES: + case ARIZONA_AIF2_BCLK_CTRL: + case ARIZONA_AIF2_TX_PIN_CTRL: + case ARIZONA_AIF2_RX_PIN_CTRL: + case ARIZONA_AIF2_RATE_CTRL: + case ARIZONA_AIF2_FORMAT: + case ARIZONA_AIF2_RX_BCLK_RATE: + case ARIZONA_AIF2_FRAME_CTRL_1: + case ARIZONA_AIF2_FRAME_CTRL_2: + case ARIZONA_AIF2_FRAME_CTRL_3: + case ARIZONA_AIF2_FRAME_CTRL_4: + case ARIZONA_AIF2_FRAME_CTRL_5: + case ARIZONA_AIF2_FRAME_CTRL_6: + case ARIZONA_AIF2_FRAME_CTRL_11: + case ARIZONA_AIF2_FRAME_CTRL_12: + case ARIZONA_AIF2_FRAME_CTRL_13: + case ARIZONA_AIF2_FRAME_CTRL_14: + case ARIZONA_AIF2_TX_ENABLES: + case ARIZONA_AIF2_RX_ENABLES: + case ARIZONA_AIF3_BCLK_CTRL: + case ARIZONA_AIF3_TX_PIN_CTRL: + case ARIZONA_AIF3_RX_PIN_CTRL: + case ARIZONA_AIF3_RATE_CTRL: + case ARIZONA_AIF3_FORMAT: + case ARIZONA_AIF3_RX_BCLK_RATE: + case ARIZONA_AIF3_FRAME_CTRL_1: + case ARIZONA_AIF3_FRAME_CTRL_2: + case ARIZONA_AIF3_FRAME_CTRL_3: + case ARIZONA_AIF3_FRAME_CTRL_4: + case ARIZONA_AIF3_FRAME_CTRL_11: + case ARIZONA_AIF3_FRAME_CTRL_12: + case ARIZONA_AIF3_TX_ENABLES: + case ARIZONA_AIF3_RX_ENABLES: + case ARIZONA_SPD1_TX_CONTROL: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_1: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_2: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_3: + case ARIZONA_PWM1MIX_INPUT_1_SOURCE: + case ARIZONA_PWM1MIX_INPUT_1_VOLUME: + case ARIZONA_PWM1MIX_INPUT_2_SOURCE: + case ARIZONA_PWM1MIX_INPUT_2_VOLUME: + case ARIZONA_PWM1MIX_INPUT_3_SOURCE: + case ARIZONA_PWM1MIX_INPUT_3_VOLUME: + case ARIZONA_PWM1MIX_INPUT_4_SOURCE: + case ARIZONA_PWM1MIX_INPUT_4_VOLUME: + case ARIZONA_PWM2MIX_INPUT_1_SOURCE: + case ARIZONA_PWM2MIX_INPUT_1_VOLUME: + case ARIZONA_PWM2MIX_INPUT_2_SOURCE: + case ARIZONA_PWM2MIX_INPUT_2_VOLUME: + case ARIZONA_PWM2MIX_INPUT_3_SOURCE: + case ARIZONA_PWM2MIX_INPUT_3_VOLUME: + case ARIZONA_PWM2MIX_INPUT_4_SOURCE: + case ARIZONA_PWM2MIX_INPUT_4_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT1LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT1LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_1_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_1_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_2_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_2_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_3_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_3_VOLUME: + case ARIZONA_OUT1RMIX_INPUT_4_SOURCE: + case ARIZONA_OUT1RMIX_INPUT_4_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT4LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT4LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_1_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_1_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_2_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_2_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_3_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_3_VOLUME: + case ARIZONA_OUT5LMIX_INPUT_4_SOURCE: + case ARIZONA_OUT5LMIX_INPUT_4_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_1_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_1_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_2_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_2_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_3_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_3_VOLUME: + case ARIZONA_OUT5RMIX_INPUT_4_SOURCE: + case ARIZONA_OUT5RMIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX2MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX3MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX3MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX4MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX4MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX5MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX5MIX_INPUT_4_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_1_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_2_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_2_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_3_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_3_VOLUME: + case ARIZONA_AIF1TX6MIX_INPUT_4_SOURCE: + case ARIZONA_AIF1TX6MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX3MIX_INPUT_4_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_1_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_2_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_3_VOLUME: + case ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE: + case ARIZONA_AIF2TX4MIX_INPUT_4_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_2_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_3_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_3_VOLUME: + case ARIZONA_AIF3TX1MIX_INPUT_4_SOURCE: + case ARIZONA_AIF3TX1MIX_INPUT_4_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_1_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_2_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_2_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_3_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_3_VOLUME: + case ARIZONA_AIF3TX2MIX_INPUT_4_SOURCE: + case ARIZONA_AIF3TX2MIX_INPUT_4_VOLUME: + case ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE: + case ARIZONA_SPDIFTX1MIX_INPUT_1_VOLUME: + case ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE: + case ARIZONA_SPDIFTX2MIX_INPUT_1_VOLUME: + case ARIZONA_EQ1MIX_INPUT_1_SOURCE: + case ARIZONA_EQ1MIX_INPUT_1_VOLUME: + case ARIZONA_EQ1MIX_INPUT_2_SOURCE: + case ARIZONA_EQ1MIX_INPUT_2_VOLUME: + case ARIZONA_EQ1MIX_INPUT_3_SOURCE: + case ARIZONA_EQ1MIX_INPUT_3_VOLUME: + case ARIZONA_EQ1MIX_INPUT_4_SOURCE: + case ARIZONA_EQ1MIX_INPUT_4_VOLUME: + case ARIZONA_EQ2MIX_INPUT_1_SOURCE: + case ARIZONA_EQ2MIX_INPUT_1_VOLUME: + case ARIZONA_EQ2MIX_INPUT_2_SOURCE: + case ARIZONA_EQ2MIX_INPUT_2_VOLUME: + case ARIZONA_EQ2MIX_INPUT_3_SOURCE: + case ARIZONA_EQ2MIX_INPUT_3_VOLUME: + case ARIZONA_EQ2MIX_INPUT_4_SOURCE: + case ARIZONA_EQ2MIX_INPUT_4_VOLUME: + case ARIZONA_EQ3MIX_INPUT_1_SOURCE: + case ARIZONA_EQ3MIX_INPUT_1_VOLUME: + case ARIZONA_EQ3MIX_INPUT_2_SOURCE: + case ARIZONA_EQ3MIX_INPUT_2_VOLUME: + case ARIZONA_EQ3MIX_INPUT_3_SOURCE: + case ARIZONA_EQ3MIX_INPUT_3_VOLUME: + case ARIZONA_EQ3MIX_INPUT_4_SOURCE: + case ARIZONA_EQ3MIX_INPUT_4_VOLUME: + case ARIZONA_EQ4MIX_INPUT_1_SOURCE: + case ARIZONA_EQ4MIX_INPUT_1_VOLUME: + case ARIZONA_EQ4MIX_INPUT_2_SOURCE: + case ARIZONA_EQ4MIX_INPUT_2_VOLUME: + case ARIZONA_EQ4MIX_INPUT_3_SOURCE: + case ARIZONA_EQ4MIX_INPUT_3_VOLUME: + case ARIZONA_EQ4MIX_INPUT_4_SOURCE: + case ARIZONA_EQ4MIX_INPUT_4_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_1_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_1_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_2_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_2_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_3_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_3_VOLUME: + case ARIZONA_DRC1LMIX_INPUT_4_SOURCE: + case ARIZONA_DRC1LMIX_INPUT_4_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_1_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_1_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_2_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_2_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_3_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_3_VOLUME: + case ARIZONA_DRC1RMIX_INPUT_4_SOURCE: + case ARIZONA_DRC1RMIX_INPUT_4_VOLUME: + case ARIZONA_DRC2LMIX_INPUT_1_SOURCE: + case ARIZONA_DRC2LMIX_INPUT_1_VOLUME: + case ARIZONA_DRC2LMIX_INPUT_2_SOURCE: + case ARIZONA_DRC2LMIX_INPUT_2_VOLUME: + case ARIZONA_DRC2LMIX_INPUT_3_SOURCE: + case ARIZONA_DRC2LMIX_INPUT_3_VOLUME: + case ARIZONA_DRC2LMIX_INPUT_4_SOURCE: + case ARIZONA_DRC2LMIX_INPUT_4_VOLUME: + case ARIZONA_DRC2RMIX_INPUT_1_SOURCE: + case ARIZONA_DRC2RMIX_INPUT_1_VOLUME: + case ARIZONA_DRC2RMIX_INPUT_2_SOURCE: + case ARIZONA_DRC2RMIX_INPUT_2_VOLUME: + case ARIZONA_DRC2RMIX_INPUT_3_SOURCE: + case ARIZONA_DRC2RMIX_INPUT_3_VOLUME: + case ARIZONA_DRC2RMIX_INPUT_4_SOURCE: + case ARIZONA_DRC2RMIX_INPUT_4_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP1MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP1MIX_INPUT_4_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP2MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP2MIX_INPUT_4_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP3MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP3MIX_INPUT_4_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_1_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_1_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_2_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_2_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_3_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_3_VOLUME: + case ARIZONA_HPLP4MIX_INPUT_4_SOURCE: + case ARIZONA_HPLP4MIX_INPUT_4_VOLUME: + case ARIZONA_DSP1LMIX_INPUT_1_SOURCE: + case ARIZONA_DSP1LMIX_INPUT_1_VOLUME: + case ARIZONA_DSP1LMIX_INPUT_2_SOURCE: + case ARIZONA_DSP1LMIX_INPUT_2_VOLUME: + case ARIZONA_DSP1LMIX_INPUT_3_SOURCE: + case ARIZONA_DSP1LMIX_INPUT_3_VOLUME: + case ARIZONA_DSP1LMIX_INPUT_4_SOURCE: + case ARIZONA_DSP1LMIX_INPUT_4_VOLUME: + case ARIZONA_DSP1RMIX_INPUT_1_SOURCE: + case ARIZONA_DSP1RMIX_INPUT_1_VOLUME: + case ARIZONA_DSP1RMIX_INPUT_2_SOURCE: + case ARIZONA_DSP1RMIX_INPUT_2_VOLUME: + case ARIZONA_DSP1RMIX_INPUT_3_SOURCE: + case ARIZONA_DSP1RMIX_INPUT_3_VOLUME: + case ARIZONA_DSP1RMIX_INPUT_4_SOURCE: + case ARIZONA_DSP1RMIX_INPUT_4_VOLUME: + case ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE: + case ARIZONA_DSP1AUX2MIX_INPUT_1_SOURCE: + case ARIZONA_DSP1AUX3MIX_INPUT_1_SOURCE: + case ARIZONA_DSP1AUX4MIX_INPUT_1_SOURCE: + case ARIZONA_DSP1AUX5MIX_INPUT_1_SOURCE: + case ARIZONA_DSP1AUX6MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE: + case ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE: + case ARIZONA_FX_CTRL1: + case ARIZONA_FX_CTRL2: + case ARIZONA_EQ1_1: + case ARIZONA_EQ1_2: + case ARIZONA_EQ1_3: + case ARIZONA_EQ1_4: + case ARIZONA_EQ1_5: + case ARIZONA_EQ1_6: + case ARIZONA_EQ1_7: + case ARIZONA_EQ1_8: + case ARIZONA_EQ1_9: + case ARIZONA_EQ1_10: + case ARIZONA_EQ1_11: + case ARIZONA_EQ1_12: + case ARIZONA_EQ1_13: + case ARIZONA_EQ1_14: + case ARIZONA_EQ1_15: + case ARIZONA_EQ1_16: + case ARIZONA_EQ1_17: + case ARIZONA_EQ1_18: + case ARIZONA_EQ1_19: + case ARIZONA_EQ1_20: + case ARIZONA_EQ1_21: + case ARIZONA_EQ2_1: + case ARIZONA_EQ2_2: + case ARIZONA_EQ2_3: + case ARIZONA_EQ2_4: + case ARIZONA_EQ2_5: + case ARIZONA_EQ2_6: + case ARIZONA_EQ2_7: + case ARIZONA_EQ2_8: + case ARIZONA_EQ2_9: + case ARIZONA_EQ2_10: + case ARIZONA_EQ2_11: + case ARIZONA_EQ2_12: + case ARIZONA_EQ2_13: + case ARIZONA_EQ2_14: + case ARIZONA_EQ2_15: + case ARIZONA_EQ2_16: + case ARIZONA_EQ2_17: + case ARIZONA_EQ2_18: + case ARIZONA_EQ2_19: + case ARIZONA_EQ2_20: + case ARIZONA_EQ2_21: + case ARIZONA_EQ3_1: + case ARIZONA_EQ3_2: + case ARIZONA_EQ3_3: + case ARIZONA_EQ3_4: + case ARIZONA_EQ3_5: + case ARIZONA_EQ3_6: + case ARIZONA_EQ3_7: + case ARIZONA_EQ3_8: + case ARIZONA_EQ3_9: + case ARIZONA_EQ3_10: + case ARIZONA_EQ3_11: + case ARIZONA_EQ3_12: + case ARIZONA_EQ3_13: + case ARIZONA_EQ3_14: + case ARIZONA_EQ3_15: + case ARIZONA_EQ3_16: + case ARIZONA_EQ3_17: + case ARIZONA_EQ3_18: + case ARIZONA_EQ3_19: + case ARIZONA_EQ3_20: + case ARIZONA_EQ3_21: + case ARIZONA_EQ4_1: + case ARIZONA_EQ4_2: + case ARIZONA_EQ4_3: + case ARIZONA_EQ4_4: + case ARIZONA_EQ4_5: + case ARIZONA_EQ4_6: + case ARIZONA_EQ4_7: + case ARIZONA_EQ4_8: + case ARIZONA_EQ4_9: + case ARIZONA_EQ4_10: + case ARIZONA_EQ4_11: + case ARIZONA_EQ4_12: + case ARIZONA_EQ4_13: + case ARIZONA_EQ4_14: + case ARIZONA_EQ4_15: + case ARIZONA_EQ4_16: + case ARIZONA_EQ4_17: + case ARIZONA_EQ4_18: + case ARIZONA_EQ4_19: + case ARIZONA_EQ4_20: + case ARIZONA_EQ4_21: + case ARIZONA_DRC1_CTRL1: + case ARIZONA_DRC1_CTRL2: + case ARIZONA_DRC1_CTRL3: + case ARIZONA_DRC1_CTRL4: + case ARIZONA_DRC1_CTRL5: + case CLEARWATER_DRC2_CTRL1: + case CLEARWATER_DRC2_CTRL2: + case CLEARWATER_DRC2_CTRL3: + case CLEARWATER_DRC2_CTRL4: + case CLEARWATER_DRC2_CTRL5: + case ARIZONA_HPLPF1_1: + case ARIZONA_HPLPF1_2: + case ARIZONA_HPLPF2_1: + case ARIZONA_HPLPF2_2: + case ARIZONA_HPLPF3_1: + case ARIZONA_HPLPF3_2: + case ARIZONA_HPLPF4_1: + case ARIZONA_HPLPF4_2: + case ARIZONA_ISRC_1_CTRL_1: + case ARIZONA_ISRC_1_CTRL_2: + case ARIZONA_ISRC_1_CTRL_3: + case ARIZONA_ISRC_2_CTRL_1: + case ARIZONA_ISRC_2_CTRL_2: + case ARIZONA_ISRC_2_CTRL_3: + case CLEARWATER_DAC_COMP_1: + case CLEARWATER_DAC_COMP_2: + case CLEARWATER_FRF_COEFFICIENT_1L_1: + case CLEARWATER_FRF_COEFFICIENT_1L_2: + case CLEARWATER_FRF_COEFFICIENT_1L_3: + case CLEARWATER_FRF_COEFFICIENT_1L_4: + case CLEARWATER_FRF_COEFFICIENT_1R_1: + case CLEARWATER_FRF_COEFFICIENT_1R_2: + case CLEARWATER_FRF_COEFFICIENT_1R_3: + case CLEARWATER_FRF_COEFFICIENT_1R_4: + case CLEARWATER_FRF_COEFFICIENT_4L_1: + case CLEARWATER_FRF_COEFFICIENT_4L_2: + case CLEARWATER_FRF_COEFFICIENT_4L_3: + case CLEARWATER_FRF_COEFFICIENT_4L_4: + case CLEARWATER_FRF_COEFFICIENT_5L_1: + case CLEARWATER_FRF_COEFFICIENT_5L_2: + case CLEARWATER_FRF_COEFFICIENT_5L_3: + case CLEARWATER_FRF_COEFFICIENT_5L_4: + case CLEARWATER_FRF_COEFFICIENT_5R_1: + case CLEARWATER_FRF_COEFFICIENT_5R_2: + case CLEARWATER_FRF_COEFFICIENT_5R_3: + case CLEARWATER_FRF_COEFFICIENT_5R_4: + case CLEARWATER_GPIO1_CTRL_1: + case CLEARWATER_GPIO1_CTRL_2: + case CLEARWATER_GPIO2_CTRL_1: + case CLEARWATER_GPIO2_CTRL_2: + case CLEARWATER_GPIO3_CTRL_1: + case CLEARWATER_GPIO3_CTRL_2: + case CLEARWATER_GPIO4_CTRL_1: + case CLEARWATER_GPIO4_CTRL_2: + case CLEARWATER_GPIO5_CTRL_1: + case CLEARWATER_GPIO5_CTRL_2: + case CLEARWATER_GPIO6_CTRL_1: + case CLEARWATER_GPIO6_CTRL_2: + case CLEARWATER_GPIO7_CTRL_1: + case CLEARWATER_GPIO7_CTRL_2: + case CLEARWATER_GPIO8_CTRL_1: + case CLEARWATER_GPIO8_CTRL_2: + case CLEARWATER_GPIO9_CTRL_1: + case CLEARWATER_GPIO9_CTRL_2: + case CLEARWATER_GPIO10_CTRL_1: + case CLEARWATER_GPIO10_CTRL_2: + case CLEARWATER_GPIO11_CTRL_1: + case CLEARWATER_GPIO11_CTRL_2: + case CLEARWATER_GPIO12_CTRL_1: + case CLEARWATER_GPIO12_CTRL_2: + case CLEARWATER_GPIO13_CTRL_1: + case CLEARWATER_GPIO13_CTRL_2: + case CLEARWATER_GPIO14_CTRL_1: + case CLEARWATER_GPIO14_CTRL_2: + case CLEARWATER_GPIO15_CTRL_1: + case CLEARWATER_GPIO15_CTRL_2: + case CLEARWATER_IRQ1_STATUS_1: + case CLEARWATER_IRQ1_STATUS_2: + case CLEARWATER_IRQ1_STATUS_3: + case CLEARWATER_IRQ1_STATUS_4: + case CLEARWATER_IRQ1_STATUS_5: + case CLEARWATER_IRQ1_STATUS_6: + case CLEARWATER_IRQ1_STATUS_7: + case CLEARWATER_IRQ1_STATUS_8: + case CLEARWATER_IRQ1_STATUS_9: + case CLEARWATER_IRQ1_STATUS_10: + case CLEARWATER_IRQ1_STATUS_11: + case CLEARWATER_IRQ1_STATUS_12: + case CLEARWATER_IRQ1_STATUS_13: + case CLEARWATER_IRQ1_STATUS_14: + case CLEARWATER_IRQ1_STATUS_15: + case CLEARWATER_IRQ1_STATUS_16: + case CLEARWATER_IRQ1_STATUS_17: + case CLEARWATER_IRQ1_STATUS_18: + case CLEARWATER_IRQ1_STATUS_19: + case CLEARWATER_IRQ1_STATUS_20: + case CLEARWATER_IRQ1_STATUS_21: + case CLEARWATER_IRQ1_STATUS_22: + case CLEARWATER_IRQ1_STATUS_23: + case CLEARWATER_IRQ1_STATUS_24: + case CLEARWATER_IRQ1_STATUS_25: + case CLEARWATER_IRQ1_STATUS_26: + case CLEARWATER_IRQ1_STATUS_27: + case CLEARWATER_IRQ1_STATUS_28: + case CLEARWATER_IRQ1_STATUS_29: + case CLEARWATER_IRQ1_STATUS_30: + case CLEARWATER_IRQ1_STATUS_31: + case CLEARWATER_IRQ1_STATUS_32: + case MOON_IRQ1_STATUS_33: + case CLEARWATER_IRQ1_MASK_1: + case CLEARWATER_IRQ1_MASK_2: + case CLEARWATER_IRQ1_MASK_3: + case CLEARWATER_IRQ1_MASK_4: + case CLEARWATER_IRQ1_MASK_5: + case CLEARWATER_IRQ1_MASK_6: + case CLEARWATER_IRQ1_MASK_7: + case CLEARWATER_IRQ1_MASK_8: + case CLEARWATER_IRQ1_MASK_9: + case CLEARWATER_IRQ1_MASK_10: + case CLEARWATER_IRQ1_MASK_11: + case CLEARWATER_IRQ1_MASK_12: + case CLEARWATER_IRQ1_MASK_13: + case CLEARWATER_IRQ1_MASK_14: + case CLEARWATER_IRQ1_MASK_15: + case MOON_IRQ1_MASK_16: + case CLEARWATER_IRQ1_MASK_17: + case CLEARWATER_IRQ1_MASK_18: + case CLEARWATER_IRQ1_MASK_19: + case MOON_IRQ1_MASK_20: + case CLEARWATER_IRQ1_MASK_21: + case CLEARWATER_IRQ1_MASK_22: + case CLEARWATER_IRQ1_MASK_23: + case CLEARWATER_IRQ1_MASK_24: + case CLEARWATER_IRQ1_MASK_25: + case MOON_IRQ1_MASK_26: + case CLEARWATER_IRQ1_MASK_27: + case CLEARWATER_IRQ1_MASK_28: + case MOON_IRQ1_MASK_29: + case CLEARWATER_IRQ1_MASK_30: + case CLEARWATER_IRQ1_MASK_31: + case CLEARWATER_IRQ1_MASK_32: + case MOON_IRQ1_MASK_33: + case CLEARWATER_IRQ1_RAW_STATUS_1: + case CLEARWATER_IRQ1_RAW_STATUS_2: + case CLEARWATER_IRQ1_RAW_STATUS_7: + case CLEARWATER_IRQ1_RAW_STATUS_9: + case CLEARWATER_IRQ1_RAW_STATUS_12: + case CLEARWATER_IRQ1_RAW_STATUS_13: + case CLEARWATER_IRQ1_RAW_STATUS_14: + case CLEARWATER_IRQ1_RAW_STATUS_15: + case CLEARWATER_IRQ1_RAW_STATUS_17: + case CLEARWATER_IRQ1_RAW_STATUS_21: + case CLEARWATER_IRQ1_RAW_STATUS_22: + case CLEARWATER_IRQ1_RAW_STATUS_23: + case CLEARWATER_IRQ1_RAW_STATUS_24: + case CLEARWATER_IRQ1_RAW_STATUS_25: + case CLEARWATER_IRQ1_RAW_STATUS_30: + case CLEARWATER_IRQ1_RAW_STATUS_31: + case CLEARWATER_IRQ1_RAW_STATUS_32: + case CLEARWATER_IRQ2_STATUS_9: + case CLEARWATER_IRQ2_MASK_9: + case CLEARWATER_IRQ2_RAW_STATUS_9: + case CLEARWATER_INTERRUPT_DEBOUNCE_7: + case CLEARWATER_IRQ1_CTRL: + return true; + default: + return false; + } +} + +static bool cs47l15_16bit_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_SOFTWARE_RESET: + case ARIZONA_DEVICE_REVISION: + case ARIZONA_HAPTICS_STATUS: + case ARIZONA_SAMPLE_RATE_1_STATUS: + case ARIZONA_SAMPLE_RATE_2_STATUS: + case ARIZONA_SAMPLE_RATE_3_STATUS: + case ARIZONA_HP_CTRL_1L: + case ARIZONA_HP_CTRL_1R: + case ARIZONA_MIC_DETECT_3: + case ARIZONA_MIC_DETECT_4: + case ARIZONA_HEADPHONE_DETECT_2: + case ARIZONA_HEADPHONE_DETECT_3: + case ARIZONA_HP_DACVAL: + case ARIZONA_INPUT_ENABLES_STATUS: + case ARIZONA_OUTPUT_STATUS_1: + case ARIZONA_RAW_OUTPUT_STATUS_1: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_1: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_2: + case ARIZONA_SPD1_TX_CHANNEL_STATUS_3: + case ARIZONA_FX_CTRL2: + case CLEARWATER_GPIO1_CTRL_1: + case CLEARWATER_GPIO2_CTRL_1: + case CLEARWATER_GPIO3_CTRL_1: + case CLEARWATER_GPIO4_CTRL_1: + case CLEARWATER_GPIO5_CTRL_1: + case CLEARWATER_GPIO6_CTRL_1: + case CLEARWATER_GPIO7_CTRL_1: + case CLEARWATER_GPIO8_CTRL_1: + case CLEARWATER_GPIO9_CTRL_1: + case CLEARWATER_GPIO10_CTRL_1: + case CLEARWATER_GPIO11_CTRL_1: + case CLEARWATER_GPIO12_CTRL_1: + case CLEARWATER_GPIO13_CTRL_1: + case CLEARWATER_GPIO14_CTRL_1: + case CLEARWATER_GPIO15_CTRL_1: + case CLEARWATER_IRQ1_STATUS_1: + case CLEARWATER_IRQ1_STATUS_2: + case CLEARWATER_IRQ1_STATUS_3: + case CLEARWATER_IRQ1_STATUS_4: + case CLEARWATER_IRQ1_STATUS_5: + case CLEARWATER_IRQ1_STATUS_6: + case CLEARWATER_IRQ1_STATUS_7: + case CLEARWATER_IRQ1_STATUS_8: + case CLEARWATER_IRQ1_STATUS_9: + case CLEARWATER_IRQ1_STATUS_10: + case CLEARWATER_IRQ1_STATUS_11: + case CLEARWATER_IRQ1_STATUS_12: + case CLEARWATER_IRQ1_STATUS_13: + case CLEARWATER_IRQ1_STATUS_14: + case CLEARWATER_IRQ1_STATUS_15: + case CLEARWATER_IRQ1_STATUS_16: + case CLEARWATER_IRQ1_STATUS_17: + case CLEARWATER_IRQ1_STATUS_18: + case CLEARWATER_IRQ1_STATUS_19: + case CLEARWATER_IRQ1_STATUS_20: + case CLEARWATER_IRQ1_STATUS_21: + case CLEARWATER_IRQ1_STATUS_22: + case CLEARWATER_IRQ1_STATUS_23: + case CLEARWATER_IRQ1_STATUS_24: + case CLEARWATER_IRQ1_STATUS_25: + case CLEARWATER_IRQ1_STATUS_26: + case CLEARWATER_IRQ1_STATUS_27: + case CLEARWATER_IRQ1_STATUS_28: + case CLEARWATER_IRQ1_STATUS_29: + case CLEARWATER_IRQ1_STATUS_30: + case CLEARWATER_IRQ1_STATUS_31: + case CLEARWATER_IRQ1_STATUS_32: + case MOON_IRQ1_STATUS_33: + case CLEARWATER_IRQ1_RAW_STATUS_1: + case CLEARWATER_IRQ1_RAW_STATUS_2: + case CLEARWATER_IRQ1_RAW_STATUS_7: + case CLEARWATER_IRQ1_RAW_STATUS_9: + case CLEARWATER_IRQ1_RAW_STATUS_12: + case CLEARWATER_IRQ1_RAW_STATUS_13: + case CLEARWATER_IRQ1_RAW_STATUS_14: + case CLEARWATER_IRQ1_RAW_STATUS_15: + case CLEARWATER_IRQ1_RAW_STATUS_17: + case CLEARWATER_IRQ1_RAW_STATUS_21: + case CLEARWATER_IRQ1_RAW_STATUS_22: + case CLEARWATER_IRQ1_RAW_STATUS_23: + case CLEARWATER_IRQ1_RAW_STATUS_24: + case CLEARWATER_IRQ1_RAW_STATUS_25: + case CLEARWATER_IRQ1_RAW_STATUS_30: + case CLEARWATER_IRQ1_RAW_STATUS_31: + case CLEARWATER_IRQ1_RAW_STATUS_32: + case CLEARWATER_IRQ2_STATUS_9: + case CLEARWATER_IRQ2_RAW_STATUS_9: + return true; + default: + return false; + } +} + +static bool cs47l15_32bit_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_WSEQ_SEQUENCE_1 ... ARIZONA_WSEQ_SEQUENCE_225: + case MOON_OTP_HPDET_CALIB_1 ... MOON_OTP_HPDET_CALIB_2: + case CLEARWATER_DSP1_CONFIG ... MOON_DSP1_PMEM_ERR_ADDR_XMEM_ERR_ADDR: + return true; + default: + return cs47l15_is_adsp_memory(dev, reg); + } +} + +static bool cs47l15_32bit_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ARIZONA_WSEQ_SEQUENCE_1 ... ARIZONA_WSEQ_SEQUENCE_225: + case MOON_OTP_HPDET_CALIB_1 ... MOON_OTP_HPDET_CALIB_2: + case CLEARWATER_DSP1_CONFIG ... MOON_DSP1_PMEM_ERR_ADDR_XMEM_ERR_ADDR: + return true; + default: + return cs47l15_is_adsp_memory(dev, reg); + } +} + +const struct regmap_config cs47l15_16bit_spi_regmap = { + .name = "cs47l15_16bit", + .reg_bits = 32, + .pad_bits = 16, + .val_bits = 16, + + .max_register = CLEARWATER_INTERRUPT_RAW_STATUS_1, + .readable_reg = cs47l15_16bit_readable_register, + .volatile_reg = cs47l15_16bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = cs47l15_reg_default, + .num_reg_defaults = ARRAY_SIZE(cs47l15_reg_default), +}; +EXPORT_SYMBOL_GPL(cs47l15_16bit_spi_regmap); + +const struct regmap_config cs47l15_16bit_i2c_regmap = { + .name = "cs47l15_16bit", + .reg_bits = 32, + .val_bits = 16, + + .max_register = CLEARWATER_INTERRUPT_RAW_STATUS_1, + .readable_reg = cs47l15_16bit_readable_register, + .volatile_reg = cs47l15_16bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = cs47l15_reg_default, + .num_reg_defaults = ARRAY_SIZE(cs47l15_reg_default), +}; +EXPORT_SYMBOL_GPL(cs47l15_16bit_i2c_regmap); + +const struct regmap_config cs47l15_32bit_spi_regmap = { + .name = "cs47l15_32bit", + .reg_bits = 32, + .reg_stride = 2, + .pad_bits = 16, + .val_bits = 32, + + .max_register = MOON_DSP1_PMEM_ERR_ADDR_XMEM_ERR_ADDR, + .readable_reg = cs47l15_32bit_readable_register, + .volatile_reg = cs47l15_32bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, +}; +EXPORT_SYMBOL_GPL(cs47l15_32bit_spi_regmap); + +const struct regmap_config cs47l15_32bit_i2c_regmap = { + .name = "cs47l15_32bit", + .reg_bits = 32, + .reg_stride = 2, + .val_bits = 32, + + .max_register = MOON_DSP1_PMEM_ERR_ADDR_XMEM_ERR_ADDR, + .readable_reg = cs47l15_32bit_readable_register, + .volatile_reg = cs47l15_32bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, +}; +EXPORT_SYMBOL_GPL(cs47l15_32bit_i2c_regmap); diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index c6772915b4e..d5ac69eae42 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -36,6 +36,7 @@ enum arizona_type { CS47L35 = 11, CS47L90 = 12, CS47L91 = 13, + CS47L15 = 16, }; #define ARIZONA_IRQ_GP1 0 @@ -215,6 +216,7 @@ int clearwater_patch(struct arizona *arizona); int largo_patch(struct arizona *arizona); int marley_patch(struct arizona *arizona); int moon_patch(struct arizona *arizona); +int cs47l15_patch(struct arizona *arizona); extern int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, bool mandatory); diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index a29e9e416b9..74f52ef4a63 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -51,19 +51,22 @@ #define CLEARWATER_NUM_GPIOS 40 #define MARLEY_NUM_GPIOS 16 #define MOON_NUM_GPIOS 38 +#define CS47L15_NUM_GPIOS 15 #define ARIZONA_MAX_INPUT 12 #define ARIZONA_MAX_MICBIAS 4 #define ARIZONA_MAX_CHILD_MICBIAS 4 -#define WM5102_NUM_MICBIAS 3 -#define CLEARWATER_NUM_MICBIAS 4 -#define LARGO_NUM_MICBIAS 2 -#define MARLEY_NUM_MICBIAS 2 -#define MARLEY_NUM_CHILD_MICBIAS 2 -#define MOON_NUM_MICBIAS 2 -#define MOON_NUM_CHILD_MICBIAS 4 +#define WM5102_NUM_MICBIAS 3 +#define CLEARWATER_NUM_MICBIAS 4 +#define LARGO_NUM_MICBIAS 2 +#define MARLEY_NUM_MICBIAS 2 +#define MARLEY_NUM_CHILD_MICBIAS 2 +#define MOON_NUM_MICBIAS 2 +#define MOON_NUM_CHILD_MICBIAS 4 +#define CS47L15_NUM_MICBIAS 1 +#define CS47L15_NUM_CHILD_MICBIAS 3 #define ARIZONA_MAX_OUTPUT 6 From 7a98309eac0aeee40cbeaac0d99399075050f6d6 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 3 May 2016 13:18:28 +0100 Subject: [PATCH 1153/1167] gpio: arizona: Add support for cs47l15 Change-Id: Id1c8b16dd8b088637b62d765a9bad29c5ab97801 Signed-off-by: Richard Fitzgerald --- drivers/gpio/gpio-arizona.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpio/gpio-arizona.c b/drivers/gpio/gpio-arizona.c index 1d82dceda18..4a682a34016 100644 --- a/drivers/gpio/gpio-arizona.c +++ b/drivers/gpio/gpio-arizona.c @@ -295,6 +295,17 @@ static int arizona_gpio_probe(struct platform_device *pdev) arizona_gpio->gpio_chip.ngpio = MOON_NUM_GPIOS; break; + case CS47L15: + arizona_gpio->gpio_chip.direction_input = + clearwater_gpio_direction_in; + arizona_gpio->gpio_chip.get = clearwater_gpio_get; + arizona_gpio->gpio_chip.direction_output = + clearwater_gpio_direction_out; + arizona_gpio->gpio_chip.set = clearwater_gpio_set; + arizona_gpio->gpio_chip.to_irq = clearwater_gpio_to_irq; + + arizona_gpio->gpio_chip.ngpio = CS47L15_NUM_GPIOS; + break; default: dev_err(&pdev->dev, "Unknown chip variant %d\n", arizona->type); From c86b5967fbc40c88a84d9f480808df97f239a134 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Wed, 1 Jun 2016 14:39:30 +0100 Subject: [PATCH 1154/1167] switch: arizona: Support CS47L15 The CS47L15 accessory detect is similar to CS47L90 ACCDET1, but has a 33 ohm offset and detection range 00 is not used. Change-Id: I0dcacb3261ea8e4b85a3703edd04416e72741093 Signed-off-by: Richard Fitzgerald --- drivers/switch/switch-arizona.c | 73 +++++++++++++++++++++++++++++---- 1 file changed, 64 insertions(+), 9 deletions(-) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 000fe6980ce..666e65b575f 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -400,6 +400,10 @@ static void arizona_extcon_hp_clamp(struct arizona_extcon_info *info, edre_val = 0; } break; + case CS47L15: + regmap_read(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, &ep_sel); + ep_sel &= ARIZONA_EP_SEL_MASK; + /* fall through to CS47L90 case to set common variables */ case CS47L90: case CS47L91: mask = MOON_HPD_OVD_ENA_SEL_MASK; @@ -483,6 +487,16 @@ static const char *arizona_extcon_get_micbias_src( struct arizona *arizona = info->arizona; switch (arizona->type) { + case CS47L15: + switch (bias) { + case 0: + case 1: + case 2: + return "MICBIAS1"; + default: + return "MICVDD"; + } + break; case CS47L90: case CS47L91: switch (bias) { @@ -518,6 +532,7 @@ static int arizona_extcon_set_micd_bias(struct arizona_extcon_info *info, int ret = 0; switch (arizona->type) { + case CS47L15: case CS47L90: case CS47L91: break; @@ -612,6 +627,18 @@ static const char *arizona_extcon_get_micbias(struct arizona_extcon_info *info) struct arizona *arizona = info->arizona; switch (arizona->type) { + case CS47L15: + switch (info->micd_modes[info->micd_mode].bias) { + case 0: + return "MICBIAS1A"; + case 1: + return "MICBIAS1B"; + case 2: + return "MICBIAS1C"; + default: + return "MICVDD"; + } + break; case CS47L35: switch (info->micd_modes[info->micd_mode].bias) { case 1: @@ -1773,6 +1800,30 @@ static void arizona_hpdet_stop_micd(struct arizona_extcon_info *info) CLEARWATER_IM_MICDET_EINT1, 0); } +static void arizona_hpdet_reset(struct arizona_extcon_info *info) +{ + struct arizona *arizona = info->arizona; + int init_range; + + switch (arizona->type) { + case CS47L15: + /* all measurements are offset by 33 ohms + * so can never be in range 0 + */ + init_range = 1 << ARIZONA_HP_IMPEDANCE_RANGE_SHIFT; + break; + default: + init_range = 0; + break; + } + + /* Stop HPDET and reset to starting range */ + regmap_update_bits(arizona->regmap, + ARIZONA_HEADPHONE_DETECT_1, + ARIZONA_HP_IMPEDANCE_RANGE_MASK | + ARIZONA_HP_POLL, init_range); +} + int arizona_hpdet_start(struct arizona_extcon_info *info) { struct arizona *arizona = info->arizona; @@ -1867,10 +1918,7 @@ void arizona_hpdet_restart(struct arizona_extcon_info *info) /* Reset back to starting range */ regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1, ARIZONA_MICD_ENA, 0); - regmap_update_bits(arizona->regmap, - ARIZONA_HEADPHONE_DETECT_1, - ARIZONA_HP_IMPEDANCE_RANGE_MASK | - ARIZONA_HP_POLL, 0); + arizona_hpdet_reset(info); switch (info->accdet_ip) { case 0: @@ -1893,11 +1941,7 @@ void arizona_hpdet_stop(struct arizona_extcon_info *info) /* Reset back to starting range */ arizona_hpdet_stop_micd(info); - - regmap_update_bits(arizona->regmap, - ARIZONA_HEADPHONE_DETECT_1, - ARIZONA_HP_IMPEDANCE_RANGE_MASK | - ARIZONA_HP_POLL, 0); + arizona_hpdet_reset(info); switch (info->accdet_ip) { case 0: @@ -3683,6 +3727,17 @@ static int arizona_extcon_probe(struct platform_device *pdev) arizona_hpdet_clearwater_read_calibration(info); if (!info->hpdet_d_trims) { info->hpdet_ip_version = 2; + + switch (arizona->type) { + case CS47L15: + /* if uncalibratied we must compensate for + * the internal 33 ohm offset + */ + pdata->hpdet_ext_res += 33; + break; + default: + break; + } } else { switch (arizona->type) { case CS47L35: From b2e3ec1e722c7e15f5e52459c2722db797adfd8b Mon Sep 17 00:00:00 2001 From: jjassal Date: Fri, 10 Jun 2016 14:20:51 +0100 Subject: [PATCH 1155/1167] ASoC: cs47l15: Add codec driver for CS47L15 Change-Id: I8b67a477c359b5b1eb740fb6c789e9455a2df4b3 Signed-off-by: jjassal Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/Kconfig | 6 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/arizona.c | 27 +- sound/soc/codecs/cs47l15.c | 1995 ++++++++++++++++++++++++++++++++++++ sound/soc/codecs/cs47l15.h | 22 + sound/soc/codecs/wm_adsp.h | 2 + 6 files changed, 2052 insertions(+), 2 deletions(-) create mode 100644 sound/soc/codecs/cs47l15.c create mode 100644 sound/soc/codecs/cs47l15.h diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index bb11faf14f0..f626393d020 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -87,6 +87,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_CLEARWATER if MFD_CLEARWATER select SND_SOC_MARLEY if MFD_MARLEY select SND_SOC_MOON if MFD_MOON + select SND_SOC_CS47L15 if MFD_CS47L15 select SND_SOC_WM8350 if MFD_WM8350 select SND_SOC_WM8400 if MFD_WM8400 select SND_SOC_WM8510 if SND_SOC_I2C_AND_SPI @@ -155,6 +156,7 @@ config SND_SOC_ARIZONA default y if SND_SOC_WM8997=y default y if SND_SOC_VEGAS=y default y if SND_SOC_LARGO=y + default y if SND_SOC_CS47L15=y default m if SND_SOC_WM5102=m default m if SND_SOC_FLORIDA=m default m if SND_SOC_CLEARWATER=m @@ -163,6 +165,7 @@ config SND_SOC_ARIZONA default m if SND_SOC_WM8997=m default m if SND_SOC_VEGAS=m default m if SND_SOC_LARGO=m + default m if SND_SOC_CS47L15=m config SND_SOC_WM_HUBS tristate @@ -421,6 +424,9 @@ config SND_SOC_MARLEY config SND_SOC_MOON tristate +config SND_SOC_CS47L15 + tristate + config SND_SOC_WM8350 tristate diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index c8c0055a162..d216a157183 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -79,6 +79,7 @@ snd-soc-florida-objs := florida.o snd-soc-clearwater-objs := clearwater.o snd-soc-marley-objs := marley.o snd-soc-moon-objs := moon.o +snd-soc-cs47l15-objs := cs47l15.o snd-soc-wm8350-objs := wm8350.o snd-soc-wm8400-objs := wm8400.o snd-soc-wm8510-objs := wm8510.o @@ -208,6 +209,7 @@ obj-$(CONFIG_SND_SOC_FLORIDA) += snd-soc-florida.o obj-$(CONFIG_SND_SOC_CLEARWATER) += snd-soc-clearwater.o obj-$(CONFIG_SND_SOC_MARLEY) += snd-soc-marley.o obj-$(CONFIG_SND_SOC_MOON) += snd-soc-moon.o +obj-$(CONFIG_SND_SOC_CS47L15) += snd-soc-cs47l15.o obj-$(CONFIG_SND_SOC_WM8350) += snd-soc-wm8350.o obj-$(CONFIG_SND_SOC_WM8400) += snd-soc-wm8400.o obj-$(CONFIG_SND_SOC_WM8510) += snd-soc-wm8510.o diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 3f8705581a4..d755d190e50 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -658,6 +658,7 @@ int arizona_init_spk(struct snd_soc_codec *codec) case WM8997: case WM1831: case CS47L24: + case CS47L15: case CS47L35: break; default: @@ -782,6 +783,13 @@ static const char * const arizona_dmic_refs[] = { "MICBIAS3", }; +static const char * const cs47l15_dmic_refs[] = { + "MICVDD", + "MICBIAS1A", + "MICBIAS1B", + "MICBIAS1C", +}; + static const char * const marley_dmic_refs[] = { "MICVDD", "MICBIAS1B", @@ -835,6 +843,12 @@ static const char * const moon_dmic_inputs[] = { "IN5R", }; +static const char * const cs47l15_dmic_inputs[] = { + "IN1L Mux", + "IN1R Mux", + "IN2L", +}; + int arizona_init_input(struct snd_soc_codec *codec) { struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); @@ -847,6 +861,10 @@ int arizona_init_input(struct snd_soc_codec *codec) for (i = 0; i < priv->num_inputs / 2; ++i) { switch (arizona->type) { + case CS47L15: + routes[0].source = cs47l15_dmic_refs[pdata->dmic_ref[i]]; + routes[1].source = cs47l15_dmic_refs[pdata->dmic_ref[i]]; + break; case CS47L35: routes[0].source = marley_dmic_refs[pdata->dmic_ref[i]]; routes[1].source = marley_dmic_refs[pdata->dmic_ref[i]]; @@ -874,6 +892,10 @@ int arizona_init_input(struct snd_soc_codec *codec) routes[0].sink = moon_dmic_inputs[i * 2]; routes[1].sink = moon_dmic_inputs[(i * 2) + 1]; break; + case CS47L15: + routes[0].sink = cs47l15_dmic_inputs[i * 2]; + routes[1].sink = cs47l15_dmic_inputs[(i * 2) + 1]; + break; default: routes[0].sink = arizona_dmic_inputs[i * 2]; routes[1].sink = arizona_dmic_inputs[(i * 2) + 1]; @@ -2699,9 +2721,10 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, priv->arizona->hp_ena &= ~mask; priv->arizona->hp_ena |= val; - /* in case of Marley check if OUT1 is routed to EPOUT, do not disable - * OUT1 in this case */ + /* in case of Marley and Gaines check if OUT1 is routed to EPOUT, + * do not disable OUT1 in this case */ switch (priv->arizona->type) { + case CS47L15: case CS47L35: regmap_read(priv->arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, &ep_sel); diff --git a/sound/soc/codecs/cs47l15.c b/sound/soc/codecs/cs47l15.c new file mode 100644 index 00000000000..0ef9b5cd0eb --- /dev/null +++ b/sound/soc/codecs/cs47l15.c @@ -0,0 +1,1995 @@ +/* + * cs47l15.c -- ALSA SoC Audio driver for CS47L15 + * + * Copyright 2016 Cirrus Logic + * + * Author: Jaswinder Jassal + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "arizona.h" +#include "wm_adsp.h" +#include "cs47l15.h" + +#define CS47L15_NUM_ADSP 1 + +/* Number of compressed DAI hookups, each pair of DSP and dummy CPU + * are counted as one DAI + */ +#define CS47L15_NUM_COMPR_DAI 1 + +#define CS47L15_FRF_COEFFICIENT_LEN 4 + +#define CS47L15_FLL_COUNT 2 + +/* 2 mixer inputs with a stride of n in the register address */ +#define CS47L15_MIXER_INPUTS_2_N(_reg, n) \ + (_reg), \ + (_reg) + (1 * (n)) + +/* 4 mixer inputs with a stride of n in the register address */ +#define CS47L15_MIXER_INPUTS_4_N(_reg, n) \ + CS47L15_MIXER_INPUTS_2_N(_reg, n), \ + CS47L15_MIXER_INPUTS_2_N(_reg + (2 * n), n) + +#define CS47L15_DSP_MIXER_INPUTS(_reg) \ + CS47L15_MIXER_INPUTS_4_N(_reg, 2), \ + CS47L15_MIXER_INPUTS_4_N(_reg + 8, 2), \ + CS47L15_MIXER_INPUTS_4_N(_reg + 16, 8), \ + CS47L15_MIXER_INPUTS_2_N(_reg + 48, 8) + +static const int cs47l15_fx_inputs[] = { + CS47L15_MIXER_INPUTS_4_N(ARIZONA_EQ1MIX_INPUT_1_SOURCE, 2), + CS47L15_MIXER_INPUTS_4_N(ARIZONA_EQ2MIX_INPUT_1_SOURCE, 2), + CS47L15_MIXER_INPUTS_4_N(ARIZONA_EQ3MIX_INPUT_1_SOURCE, 2), + CS47L15_MIXER_INPUTS_4_N(ARIZONA_EQ4MIX_INPUT_1_SOURCE, 2), + CS47L15_MIXER_INPUTS_4_N(ARIZONA_DRC1LMIX_INPUT_1_SOURCE, 2), + CS47L15_MIXER_INPUTS_4_N(ARIZONA_DRC1RMIX_INPUT_1_SOURCE, 2), + CS47L15_MIXER_INPUTS_4_N(ARIZONA_DRC2LMIX_INPUT_1_SOURCE, 2), + CS47L15_MIXER_INPUTS_4_N(ARIZONA_DRC2RMIX_INPUT_1_SOURCE, 2), + CS47L15_MIXER_INPUTS_4_N(ARIZONA_HPLP1MIX_INPUT_1_SOURCE, 2), + CS47L15_MIXER_INPUTS_4_N(ARIZONA_HPLP2MIX_INPUT_1_SOURCE, 2), + CS47L15_MIXER_INPUTS_4_N(ARIZONA_HPLP3MIX_INPUT_1_SOURCE, 2), + CS47L15_MIXER_INPUTS_4_N(ARIZONA_HPLP4MIX_INPUT_1_SOURCE, 2), +}; + +static const int cs47l15_isrc1_fsl_inputs[] = { + CS47L15_MIXER_INPUTS_4_N(ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE, 8), +}; + +static const int cs47l15_isrc1_fsh_inputs[] = { + CS47L15_MIXER_INPUTS_4_N(ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE, 8), +}; + +static const int cs47l15_isrc2_fsl_inputs[] = { + CS47L15_MIXER_INPUTS_4_N(ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE, 8), +}; + +static const int cs47l15_isrc2_fsh_inputs[] = { + CS47L15_MIXER_INPUTS_4_N(ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE, 8), +}; + +static const int cs47l15_out_inputs[] = { + CS47L15_MIXER_INPUTS_4_N(ARIZONA_OUT1LMIX_INPUT_1_SOURCE, 2), + CS47L15_MIXER_INPUTS_4_N(ARIZONA_OUT1RMIX_INPUT_1_SOURCE, 2), + CS47L15_MIXER_INPUTS_4_N(ARIZONA_OUT4LMIX_INPUT_1_SOURCE, 2), + CS47L15_MIXER_INPUTS_4_N(ARIZONA_OUT5LMIX_INPUT_1_SOURCE, 2), + CS47L15_MIXER_INPUTS_4_N(ARIZONA_OUT5RMIX_INPUT_1_SOURCE, 2), +}; + +static const int cs47l15_spd1_inputs[] = { + CS47L15_MIXER_INPUTS_2_N(ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE, 8), +}; + +static const int cs47l15_dsp1_inputs[] = { + CS47L15_DSP_MIXER_INPUTS(ARIZONA_DSP1LMIX_INPUT_1_SOURCE), +}; + +static int cs47l15_rate_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); + +#define CS47L15_RATE_ENUM(xname, xenum) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\ + .info = snd_soc_info_enum_double, \ + .get = snd_soc_get_enum_double, .put = cs47l15_rate_put, \ + .private_value = (unsigned long)&xenum } + +struct cs47l15_priv; + +struct cs47l15_compr { + struct wm_adsp_compr adsp_compr; + const char *dai_name; + struct cs47l15_priv *priv; +}; + +struct cs47l15_priv { + struct arizona_priv core; + struct arizona_fll fll[CS47L15_FLL_COUNT]; + struct cs47l15_compr compr_info[CS47L15_NUM_COMPR_DAI]; + + bool trig; + struct mutex trig_lock; + struct mutex fw_lock; +}; + +static const struct { + const char *dai_name; + int adsp_num; +} compr_dai_mapping[CS47L15_NUM_COMPR_DAI] = { + { + .dai_name = "cs47l15-dsp-trace", + .adsp_num = 0, + }, +}; + +static const struct wm_adsp_region cs47l15_dsp1_regions[] = { + { .type = WMFW_ADSP2_PM, .base = 0x080000 }, + { .type = WMFW_ADSP2_ZM, .base = 0x0e0000 }, + { .type = WMFW_ADSP2_XM, .base = 0x0a0000 }, + { .type = WMFW_ADSP2_YM, .base = 0x0c0000 }, +}; + +static const char * const cs47l15_inmux_texts[] = { + "A", + "B", +}; + +static int cs47l15_in1mux_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol); + struct snd_soc_dapm_widget *widget = wlist->widgets[0]; + struct snd_soc_codec *codec = widget->codec; + struct cs47l15_priv *cs47l15 = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = cs47l15->core.arizona; + struct soc_enum *e = (struct soc_enum *) kcontrol->private_value; + unsigned int mux, inmode; + unsigned int mode_val, src_val; + bool changed = false; + int ret; + + mux = ucontrol->value.enumerated.item[0]; + if (mux > 1) + return -EINVAL; + + /* L and R registers have same shift and mask */ + inmode = arizona->pdata.inmode[2 * mux]; + src_val = mux << ARIZONA_IN1L_SRC_SHIFT; + if (inmode & ARIZONA_INMODE_SE) + src_val |= 1 << ARIZONA_IN1L_SRC_SE_SHIFT; + + switch (arizona->pdata.inmode[0]) { + case ARIZONA_INMODE_DMIC: + if (mux) + mode_val = 0; /* B always analogue */ + else + mode_val = 1 << ARIZONA_IN1_MODE_SHIFT; + + ret = snd_soc_update_bits(codec, + ARIZONA_IN1L_CONTROL, + ARIZONA_IN1_MODE_MASK, + mode_val); + if (ret < 0) + return ret; + else if (ret) + changed = true; + + /* IN1A is digital so L and R must change together */ + /* src_val setting same for both registers */ + ret = snd_soc_update_bits(codec, + ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_SRC_MASK | + ARIZONA_IN1L_SRC_SE_MASK, + src_val); + if (ret < 0) + return ret; + else if (ret) + changed = true; + + ret = snd_soc_update_bits(codec, + ARIZONA_ADC_DIGITAL_VOLUME_1R, + ARIZONA_IN1R_SRC_MASK | + ARIZONA_IN1R_SRC_SE_MASK, + src_val); + + if (ret < 0) + return ret; + else if (ret) + changed = true; + break; + default: + /* both analogue */ + ret = snd_soc_update_bits(codec, + e->reg, + ARIZONA_IN1L_SRC_MASK | + ARIZONA_IN1L_SRC_SE_MASK, + src_val); + if (ret < 0) + return ret; + else if (ret) + changed = true; + break; + } + + if (changed) + return snd_soc_dapm_mux_update_power(widget, kcontrol, + mux, e); + else + return 0; +} + +static const SOC_ENUM_SINGLE_DECL(cs47l15_in1muxl_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_SRC_SHIFT, + cs47l15_inmux_texts); + +static const SOC_ENUM_SINGLE_DECL(cs47l15_in1muxr_enum, + ARIZONA_ADC_DIGITAL_VOLUME_1R, + ARIZONA_IN1R_SRC_SHIFT, + cs47l15_inmux_texts); + +static const struct snd_kcontrol_new cs47l15_in1mux[2] = { + SOC_DAPM_ENUM_EXT("IN1L Mux", cs47l15_in1muxl_enum, + snd_soc_dapm_get_enum_double, cs47l15_in1mux_put), + SOC_DAPM_ENUM_EXT("IN1R Mux", cs47l15_in1muxr_enum, + snd_soc_dapm_get_enum_double, cs47l15_in1mux_put), +}; + +static const char * const cs47l15_outdemux_texts[] = { + "HPOUT", + "EPOUT", +}; + +static int cs47l15_put_demux(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol); + struct snd_soc_dapm_widget *widget = wlist->widgets[0]; + struct snd_soc_codec *codec = widget->codec; + struct snd_soc_card *card = codec->card; + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + unsigned int ep_sel, mux, change; + unsigned int mask; + int ret, demux_change_ret; + bool restore_out = true, out_mono; + + if (ucontrol->value.enumerated.item[0] > e->max - 1) + return -EINVAL; + mux = ucontrol->value.enumerated.item[0]; + ep_sel = mux << e->shift_l; + mask = e->mask << e->shift_l; + + mutex_lock_nested(&card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); + + change = snd_soc_test_bits(codec, e->reg, mask, ep_sel); + /* if no change is required, skip */ + if (!change) + goto end; + + /* EP_SEL and OUT1_MONO should not be modified while HP or EP driver + * is enabled + */ + ret = regmap_update_bits(arizona->regmap, + ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT1L_ENA | + ARIZONA_OUT1R_ENA, 0); + if (ret) + dev_warn(arizona->dev, + "Failed to disable outputs: %d\n", ret); + + usleep_range(2000, 3000); /* wait for wseq to complete */ + + /* [1] if HP detection clamp is applied while switching to HPOUT, OUT1 + * should remain disabled + */ + if (!ep_sel && (arizona->hpdet_clamp || + (arizona->hp_impedance_x100 <= + OHM_TO_HOHM(arizona->pdata.hpdet_short_circuit_imp)))) + restore_out = false; + + /* change demux setting */ + demux_change_ret = regmap_update_bits(arizona->regmap, + ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_EP_SEL, ep_sel); + if (demux_change_ret) { + dev_err(arizona->dev, "Failed to set EP_SEL: %d\n", + demux_change_ret); + } else { /* provided the switch to HP/EP was successful, update output + mode accordingly */ + /* when switching to stereo headphone */ + if (!ep_sel && !arizona->pdata.out_mono[0]) + out_mono = false; + /* when switching to mono headphone, or any earpiece */ + else + out_mono = true; + + ret = arizona_set_output_mode(codec, 1, out_mono); + if (ret < 0) + dev_warn(arizona->dev, + "Failed to set output mode: %d\n", ret); + } + + /* restore outputs to the desired state, or keep them disabled provided + * condition [1] arose + */ + if (restore_out) { + ret = regmap_update_bits(arizona->regmap, + ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT1L_ENA | + ARIZONA_OUT1R_ENA, + arizona->hp_ena); + if (ret) { + dev_warn(arizona->dev, + "Failed to restore outputs: %d\n", ret); + } else { + /* wait for wseq */ + if (arizona->hp_ena) + msleep(34); /* enable delay */ + else + usleep_range(2000, 3000); /* disable delay */ + } + } + +end: + mutex_unlock(&card->dapm_mutex); + + return snd_soc_dapm_put_enum_virt(kcontrol, ucontrol); +} + +static const SOC_ENUM_SINGLE_DECL(cs47l15_outdemux_enum, + ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_EP_SEL_SHIFT, + cs47l15_outdemux_texts); + +static const struct snd_kcontrol_new cs47l15_outdemux = + SOC_DAPM_ENUM_EXT("HPOUT1 Demux", cs47l15_outdemux_enum, + snd_soc_dapm_get_enum_double, cs47l15_put_demux); + +/* Allow the worst case number of sources (FX Rate currently) */ +static unsigned int mixer_sources_cache[ARRAY_SIZE(cs47l15_fx_inputs)]; + +static int cs47l15_get_sources(unsigned int reg, + const int **cur_sources, int *lim) +{ + int ret = 0; + + switch (reg) { + case ARIZONA_FX_CTRL1: + *cur_sources = cs47l15_fx_inputs; + *lim = ARRAY_SIZE(cs47l15_fx_inputs); + break; + case ARIZONA_ISRC_1_CTRL_1: + *cur_sources = cs47l15_isrc1_fsh_inputs; + *lim = ARRAY_SIZE(cs47l15_isrc1_fsh_inputs); + break; + case ARIZONA_ISRC_1_CTRL_2: + *cur_sources = cs47l15_isrc1_fsl_inputs; + *lim = ARRAY_SIZE(cs47l15_isrc1_fsl_inputs); + break; + case ARIZONA_ISRC_2_CTRL_1: + *cur_sources = cs47l15_isrc2_fsh_inputs; + *lim = ARRAY_SIZE(cs47l15_isrc2_fsh_inputs); + break; + case ARIZONA_ISRC_2_CTRL_2: + *cur_sources = cs47l15_isrc2_fsl_inputs; + *lim = ARRAY_SIZE(cs47l15_isrc2_fsl_inputs); + break; + case ARIZONA_OUTPUT_RATE_1: + *cur_sources = cs47l15_out_inputs; + *lim = ARRAY_SIZE(cs47l15_out_inputs); + break; + case ARIZONA_SPD1_TX_CONTROL: + *cur_sources = cs47l15_spd1_inputs; + *lim = ARRAY_SIZE(cs47l15_spd1_inputs); + break; + case CLEARWATER_DSP1_CONFIG: + *cur_sources = cs47l15_dsp1_inputs; + *lim = ARRAY_SIZE(cs47l15_dsp1_inputs); + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static int cs47l15_rate_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int ret, err; + int lim; + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + + struct cs47l15_priv *cs47l15 = snd_soc_codec_get_drvdata(codec); + struct arizona_priv *priv = &cs47l15->core; + struct arizona *arizona = priv->arizona; + + const int *cur_sources; + + unsigned int val, cur; + unsigned int mask; + + if (ucontrol->value.enumerated.item[0] > e->max - 1) + return -EINVAL; + + val = e->values[ucontrol->value.enumerated.item[0]] << e->shift_l; + mask = e->mask << e->shift_l; + + ret = regmap_read(arizona->regmap, e->reg, &cur); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read current reg: %d\n", ret); + return ret; + } + + if ((cur & mask) == (val & mask)) + return 0; + + ret = cs47l15_get_sources((int)e->reg, &cur_sources, &lim); + if (ret != 0) { + dev_err(arizona->dev, "Failed to get sources for 0x%08x: %d\n", + e->reg, + ret); + return ret; + } + + mutex_lock(&arizona->rate_lock); + + ret = arizona_cache_and_clear_sources(arizona, cur_sources, + mixer_sources_cache, lim); + if (ret != 0) { + dev_err(arizona->dev, + "%s Failed to cache and clear sources %d\n", + __func__, + ret); + goto out; + } + + /* Apply the rate through the original callback */ + clearwater_spin_sysclk(arizona); + ret = snd_soc_update_bits_locked(codec, e->reg, mask, val); + clearwater_spin_sysclk(arizona); + +out: + err = arizona_restore_sources(arizona, cur_sources, + mixer_sources_cache, lim); + if (err != 0) { + dev_err(arizona->dev, + "%s Failed to restore sources %d\n", + __func__, + err); + } + + mutex_unlock(&arizona->rate_lock); + return ret; +} + +static int cs47l15_adsp_rate_put_cb(struct wm_adsp *adsp, + unsigned int mask, + unsigned int val) +{ + int ret, err; + int lim; + const int *cur_sources; + struct arizona *arizona = dev_get_drvdata(adsp->dev); + unsigned int cur; + + ret = regmap_read(adsp->regmap, adsp->base, &cur); + if (ret != 0) { + dev_err(arizona->dev, "Failed to read current: %d\n", ret); + return ret; + } + + if ((val & mask) == (cur & mask)) + return 0; + + ret = cs47l15_get_sources(adsp->base, &cur_sources, &lim); + if (ret != 0) { + dev_err(arizona->dev, "Failed to get sources for 0x%08x: %d\n", + adsp->base, + ret); + return ret; + } + + dev_dbg(arizona->dev, "%s for DSP%d\n", __func__, adsp->num); + + mutex_lock(&arizona->rate_lock); + + ret = arizona_cache_and_clear_sources(arizona, cur_sources, + mixer_sources_cache, lim); + + if (ret != 0) { + dev_err(arizona->dev, + "%s Failed to cache and clear sources %d\n", + __func__, + ret); + goto out; + } + + clearwater_spin_sysclk(arizona); + /* Apply the rate */ + ret = regmap_update_bits(adsp->regmap, adsp->base, mask, val); + clearwater_spin_sysclk(arizona); + +out: + err = arizona_restore_sources(arizona, cur_sources, + mixer_sources_cache, lim); + + if (err != 0) { + dev_err(arizona->dev, + "%s Failed to restore sources %d\n", + __func__, + err); + } + + mutex_unlock(&arizona->rate_lock); + return ret; +} + +static int cs47l15_sysclk_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_codec *codec = w->codec; + struct cs47l15_priv *cs47l15 = snd_soc_codec_get_drvdata(codec); + struct arizona_priv *priv = &cs47l15->core; + struct arizona *arizona = priv->arizona; + + clearwater_spin_sysclk(arizona); + + return 0; +} + +static int cs47l15_adsp_power_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_codec *codec = w->codec; + struct cs47l15_priv *cs47l15 = snd_soc_codec_get_drvdata(codec); + struct arizona_priv *priv = &cs47l15->core; + struct arizona *arizona = priv->arizona; + unsigned int freq; + int ret; + + ret = regmap_read(arizona->regmap, CLEARWATER_DSP_CLOCK_2, &freq); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to read CLEARWATER_DSP_CLOCK_2: %d\n", ret); + return ret; + } + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + mutex_lock(&cs47l15->trig_lock); + cs47l15->trig = false; + mutex_unlock(&cs47l15->trig_lock); + break; + default: + break; + } + + return wm_adsp2_early_event(w, kcontrol, event, freq); +} + +static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); +static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); +static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); +static DECLARE_TLV_DB_SCALE(noise_tlv, -13200, 600, 0); +static DECLARE_TLV_DB_SCALE(ng_tlv, -12000, 600, 0); + +#define CS47L15_NG_SRC(name, base) \ + SOC_SINGLE(name " NG HPOUT1L Switch", base, 0, 1, 0), \ + SOC_SINGLE(name " NG HPOUT1R Switch", base, 1, 1, 0), \ + SOC_SINGLE(name " NG SPKOUTL Switch", base, 6, 1, 0), \ + SOC_SINGLE(name " NG SPKDAT1L Switch", base, 8, 1, 0), \ + SOC_SINGLE(name " NG SPKDAT1R Switch", base, 9, 1, 0) + +static const struct snd_kcontrol_new cs47l15_snd_controls[] = { +SOC_VALUE_ENUM("IN1 OSR", clearwater_in_dmic_osr[0]), +SOC_VALUE_ENUM("IN2 OSR", clearwater_in_dmic_osr[1]), + +SOC_SINGLE_RANGE_TLV("IN1L Volume", ARIZONA_IN1L_CONTROL, + ARIZONA_IN1L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), +SOC_SINGLE_RANGE_TLV("IN1R Volume", ARIZONA_IN1R_CONTROL, + ARIZONA_IN1R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), + +SOC_ENUM("IN HPF Cutoff Frequency", arizona_in_hpf_cut_enum), + +SOC_SINGLE("IN1L HPF Switch", ARIZONA_IN1L_CONTROL, + ARIZONA_IN1L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN1R HPF Switch", ARIZONA_IN1R_CONTROL, + ARIZONA_IN1R_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN2L HPF Switch", ARIZONA_IN2L_CONTROL, + ARIZONA_IN2L_HPF_SHIFT, 1, 0), +SOC_SINGLE("IN2R HPF Switch", ARIZONA_IN2R_CONTROL, + ARIZONA_IN2R_HPF_SHIFT, 1, 0), + +SOC_SINGLE_TLV("IN1L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1L, + ARIZONA_IN1L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN1R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1R, + ARIZONA_IN1R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN2L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_2L, + ARIZONA_IN2L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), +SOC_SINGLE_TLV("IN2R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_2R, + ARIZONA_IN2R_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), + +SOC_ENUM("Input Ramp Up", arizona_in_vi_ramp), +SOC_ENUM("Input Ramp Down", arizona_in_vd_ramp), + +SND_SOC_BYTES("FRF COEFF 1L", CLEARWATER_FRF_COEFFICIENT_1L_1, + CS47L15_FRF_COEFFICIENT_LEN), +SND_SOC_BYTES("FRF COEFF 1R", CLEARWATER_FRF_COEFFICIENT_1R_1, + CS47L15_FRF_COEFFICIENT_LEN), +SND_SOC_BYTES("FRF COEFF 4L", CLEARWATER_FRF_COEFFICIENT_4L_1, + CS47L15_FRF_COEFFICIENT_LEN), +SND_SOC_BYTES("FRF COEFF 5L", CLEARWATER_FRF_COEFFICIENT_5L_1, + CS47L15_FRF_COEFFICIENT_LEN), +SND_SOC_BYTES("FRF COEFF 5R", CLEARWATER_FRF_COEFFICIENT_5R_1, + CS47L15_FRF_COEFFICIENT_LEN), + +SND_SOC_BYTES("DAC COMP 1", CLEARWATER_DAC_COMP_1, 1), +SND_SOC_BYTES("DAC COMP 2", CLEARWATER_DAC_COMP_2, 1), + +ARIZONA_MIXER_CONTROLS("EQ1", ARIZONA_EQ1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("EQ4", ARIZONA_EQ4MIX_INPUT_1_SOURCE), + +ARIZONA_EQ_CONTROL("EQ1 Coefficients", ARIZONA_EQ1_2), +SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B2 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B3 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B4 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ1 B5 Volume", ARIZONA_EQ1_2, ARIZONA_EQ1_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +ARIZONA_EQ_CONTROL("EQ2 Coefficients", ARIZONA_EQ2_2), +SOC_SINGLE_TLV("EQ2 B1 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B2 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B3 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B4 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ2 B5 Volume", ARIZONA_EQ2_2, ARIZONA_EQ2_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +ARIZONA_EQ_CONTROL("EQ3 Coefficients", ARIZONA_EQ3_2), +SOC_SINGLE_TLV("EQ3 B1 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B2 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B3 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B4 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ3 B5 Volume", ARIZONA_EQ3_2, ARIZONA_EQ3_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +ARIZONA_EQ_CONTROL("EQ4 Coefficients", ARIZONA_EQ4_2), +SOC_SINGLE_TLV("EQ4 B1 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B1_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B2 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B2_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B3 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B3_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B4 Volume", ARIZONA_EQ4_2, ARIZONA_EQ4_B4_GAIN_SHIFT, + 24, 0, eq_tlv), +SOC_SINGLE_TLV("EQ4 B5 Volume", ARIZONA_EQ4_2, ARIZONA_EQ4_B5_GAIN_SHIFT, + 24, 0, eq_tlv), + +ARIZONA_MIXER_CONTROLS("DRC1L", ARIZONA_DRC1LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DRC1R", ARIZONA_DRC1RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DRC2L", ARIZONA_DRC2LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DRC2R", ARIZONA_DRC2RMIX_INPUT_1_SOURCE), + +SND_SOC_BYTES_MASK("DRC1", ARIZONA_DRC1_CTRL1, 5, + ARIZONA_DRC1R_ENA | ARIZONA_DRC1L_ENA), +SND_SOC_BYTES_MASK("DRC2", CLEARWATER_DRC2_CTRL1, 5, + ARIZONA_DRC2R_ENA | ARIZONA_DRC2L_ENA), + +ARIZONA_MIXER_CONTROLS("LHPF1", ARIZONA_HPLP1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LHPF2", ARIZONA_HPLP2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LHPF3", ARIZONA_HPLP3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("LHPF4", ARIZONA_HPLP4MIX_INPUT_1_SOURCE), + +SND_SOC_BYTES("LHPF1 Coefficients", ARIZONA_HPLPF1_2, 1), +SND_SOC_BYTES("LHPF2 Coefficients", ARIZONA_HPLPF2_2, 1), +SND_SOC_BYTES("LHPF3 Coefficients", ARIZONA_HPLPF3_2, 1), +SND_SOC_BYTES("LHPF4 Coefficients", ARIZONA_HPLPF4_2, 1), + +SOC_ENUM("LHPF1 Mode", arizona_lhpf1_mode), +SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode), +SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode), +SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), + +SOC_VALUE_ENUM("Sample Rate 2", arizona_sample_rate[0]), +SOC_VALUE_ENUM("Sample Rate 3", arizona_sample_rate[1]), + +CS47L15_RATE_ENUM("FX Rate", arizona_fx_rate), + +CS47L15_RATE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), +CS47L15_RATE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), +CS47L15_RATE_ENUM("ISRC1 FSH", arizona_isrc_fsh[0]), +CS47L15_RATE_ENUM("ISRC2 FSH", arizona_isrc_fsh[1]), + +ARIZONA_MIXER_CONTROLS("DSP1L", ARIZONA_DSP1LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("DSP1R", ARIZONA_DSP1RMIX_INPUT_1_SOURCE), + +SOC_SINGLE_TLV("Noise Generator Volume", CLEARWATER_COMFORT_NOISE_GENERATOR, + CLEARWATER_NOISE_GEN_GAIN_SHIFT, 0x16, 0, noise_tlv), + +ARIZONA_MIXER_CONTROLS("HPOUT1L", ARIZONA_OUT1LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("HPOUT1R", ARIZONA_OUT1RMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SPKOUTL", ARIZONA_OUT4LMIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("SPKDAT1L", ARIZONA_OUT5LMIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("SPKDAT1R", ARIZONA_OUT5RMIX_INPUT_1_SOURCE), + +SOC_SINGLE("HPOUT1 SC Protect Switch", ARIZONA_HP1_SHORT_CIRCUIT_CTRL, + ARIZONA_HP1_SC_ENA_SHIFT, 1, 0), + +SOC_SINGLE("SPKDAT1 High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_5L, + ARIZONA_OUT5_OSR_SHIFT, 1, 0), + +SOC_DOUBLE_R("HPOUT1 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_1L, + ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_MUTE_SHIFT, 1, 1), +SOC_DOUBLE_R("SPKDAT1 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_5L, + ARIZONA_DAC_DIGITAL_VOLUME_5R, ARIZONA_OUT5L_MUTE_SHIFT, 1, 1), + +SOC_SINGLE("Speaker Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_4L, + ARIZONA_OUT4L_MUTE_SHIFT, 1, 1), + +SOC_DOUBLE_R_TLV("HPOUT1 Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_1L, + ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_VOL_SHIFT, + 0xbf, 0, digital_tlv), + +SOC_SINGLE_TLV("Speaker Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_4L, + ARIZONA_OUT4L_VOL_SHIFT, 0xbf, 0, digital_tlv), + +SOC_DOUBLE_R_TLV("SPKDAT1 Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_5L, + ARIZONA_DAC_DIGITAL_VOLUME_5R, ARIZONA_OUT5L_VOL_SHIFT, + 0xbf, 0, digital_tlv), + +SOC_DOUBLE("SPKDAT1 Switch", ARIZONA_PDM_SPK1_CTRL_1, ARIZONA_SPK1L_MUTE_SHIFT, + ARIZONA_SPK1R_MUTE_SHIFT, 1, 1), + +SOC_DOUBLE_EXT("HPOUT1 DRE Switch", ARIZONA_DRE_ENABLE, + VEGAS_DRE1L_ENA_SHIFT, VEGAS_DRE1R_ENA_SHIFT, 1, 0, + snd_soc_get_volsw, clearwater_put_dre), +SOC_DOUBLE("HPOUT1 EDRE Switch", CLEARWATER_EDRE_ENABLE, + CLEARWATER_EDRE_OUT1L_THR1_ENA_SHIFT, + CLEARWATER_EDRE_OUT1R_THR1_ENA_SHIFT, 1, 0), + +SOC_SINGLE("Speaker THR1 EDRE Switch", CLEARWATER_EDRE_ENABLE, + CLEARWATER_EDRE_OUT4L_THR1_ENA_SHIFT, 1, 0), + +SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp), +SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp), + +CS47L15_RATE_ENUM("SPDIF Rate", arizona_spdif_rate), + +SOC_SINGLE("Noise Gate Switch", ARIZONA_NOISE_GATE_CONTROL, + ARIZONA_NGATE_ENA_SHIFT, 1, 0), +SOC_SINGLE_TLV("Noise Gate Threshold Volume", ARIZONA_NOISE_GATE_CONTROL, + ARIZONA_NGATE_THR_SHIFT, 7, 1, ng_tlv), +SOC_ENUM("Noise Gate Hold", arizona_ng_hold), + +CS47L15_RATE_ENUM("Output Rate 1", arizona_output_rate), + +SOC_ENUM_EXT("IN1L Rate", moon_input_rate[0], + snd_soc_get_enum_double, moon_in_rate_put), +SOC_ENUM_EXT("IN1R Rate", moon_input_rate[1], + snd_soc_get_enum_double, moon_in_rate_put), +SOC_ENUM_EXT("IN2L Rate", moon_input_rate[2], + snd_soc_get_enum_double, moon_in_rate_put), +SOC_ENUM_EXT("IN2R Rate", moon_input_rate[3], + snd_soc_get_enum_double, moon_in_rate_put), + +CS47L15_NG_SRC("HPOUT1L", ARIZONA_NOISE_GATE_SELECT_1L), +CS47L15_NG_SRC("HPOUT1R", ARIZONA_NOISE_GATE_SELECT_1R), + +CS47L15_NG_SRC("SPKOUTL", ARIZONA_NOISE_GATE_SELECT_4L), + +CS47L15_NG_SRC("SPKDAT1L", ARIZONA_NOISE_GATE_SELECT_5L), +CS47L15_NG_SRC("SPKDAT1R", ARIZONA_NOISE_GATE_SELECT_5R), + +ARIZONA_MIXER_CONTROLS("AIF1TX1", ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX2", ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX3", ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX4", ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX5", ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF1TX6", ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("AIF2TX1", ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX2", ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX3", ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX4", ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE), + +ARIZONA_MIXER_CONTROLS("AIF3TX1", ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF3TX2", ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE), + +ARIZONA_GAINMUX_CONTROLS("SPDIFTX1", ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE), +ARIZONA_GAINMUX_CONTROLS("SPDIFTX2", ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE), +}; + +CLEARWATER_MIXER_ENUMS(EQ1, ARIZONA_EQ1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(EQ2, ARIZONA_EQ2MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(EQ3, ARIZONA_EQ3MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(EQ4, ARIZONA_EQ4MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DRC1L, ARIZONA_DRC1LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DRC1R, ARIZONA_DRC1RMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DRC2L, ARIZONA_DRC2LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DRC2R, ARIZONA_DRC2RMIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(LHPF1, ARIZONA_HPLP1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(LHPF2, ARIZONA_HPLP2MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(LHPF3, ARIZONA_HPLP3MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(LHPF4, ARIZONA_HPLP4MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(DSP1L, ARIZONA_DSP1LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(DSP1R, ARIZONA_DSP1RMIX_INPUT_1_SOURCE); +CLEARWATER_DSP_AUX_ENUMS(DSP1, ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(PWM1, ARIZONA_PWM1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(PWM2, ARIZONA_PWM2MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(OUT1L, ARIZONA_OUT1LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(OUT1R, ARIZONA_OUT1RMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SPKOUTL, ARIZONA_OUT4LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SPKDAT1L, ARIZONA_OUT5LMIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(SPKDAT1R, ARIZONA_OUT5RMIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(AIF1TX1, ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX2, ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX3, ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX4, ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX5, ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF1TX6, ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(AIF2TX1, ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF2TX2, ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF2TX3, ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF2TX4, ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE); + +CLEARWATER_MIXER_ENUMS(AIF3TX1, ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE); +CLEARWATER_MIXER_ENUMS(AIF3TX2, ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(SPD1TX1, ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(SPD1TX2, ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC1INT1, ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1INT2, ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1INT3, ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1INT4, ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC1DEC1, ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1DEC2, ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1DEC3, ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC1DEC4, ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC2INT1, ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2INT2, ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2INT3, ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2INT4, ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE); + +CLEARWATER_MUX_ENUMS(ISRC2DEC1, ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2DEC2, ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2DEC3, ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE); +CLEARWATER_MUX_ENUMS(ISRC2DEC4, ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE); + +static const char * const cs47l15_dsp_output_texts[] = { + "None", + "DSP1", +}; + +static const struct soc_enum cs47l15_dsp_output_enum = + SOC_ENUM_SINGLE(SND_SOC_NOPM, 0, ARRAY_SIZE(cs47l15_dsp_output_texts), + cs47l15_dsp_output_texts); + +static const struct snd_kcontrol_new cs47l15_dsp_output_mux[] = { + SOC_DAPM_ENUM_VIRT("DSP Virtual Output Mux", cs47l15_dsp_output_enum), +}; + +static const char * const cs47l15_aec_loopback_texts[] = { + "HPOUT1L", "HPOUT1R", "SPKOUTL", "SPKDAT1L", "SPKDAT1R", +}; + +static const unsigned int cs47l15_aec_loopback_values[] = { + 0, 1, 6, 8, 9, +}; + +static const struct soc_enum cs47l15_aec_loopback = + SOC_VALUE_ENUM_SINGLE(ARIZONA_DAC_AEC_CONTROL_1, + ARIZONA_AEC_LOOPBACK_SRC_SHIFT, 0xf, + ARRAY_SIZE(cs47l15_aec_loopback_texts), + cs47l15_aec_loopback_texts, + cs47l15_aec_loopback_values); + +static const struct snd_kcontrol_new cs47l15_aec_loopback_mux = + SOC_DAPM_VALUE_ENUM("AEC Loopback", cs47l15_aec_loopback); + +static const struct snd_soc_dapm_widget cs47l15_dapm_widgets[] = { +SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT, + 0, cs47l15_sysclk_ev, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), +SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK, + ARIZONA_OPCLK_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("DSPCLK", CLEARWATER_DSP_CLOCK_1, 6, + 0, NULL, 0), + +SND_SOC_DAPM_REGULATOR_SUPPLY("CPVDD", 20, 0), +SND_SOC_DAPM_REGULATOR_SUPPLY("MICVDD", 0, SND_SOC_DAPM_REGULATOR_BYPASS), +SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDD", 0, 0), + +SND_SOC_DAPM_SIGGEN("TONE"), +SND_SOC_DAPM_SIGGEN("NOISE"), + +SND_SOC_DAPM_INPUT("IN1AL"), +SND_SOC_DAPM_INPUT("IN1BL"), +SND_SOC_DAPM_INPUT("IN1AR"), +SND_SOC_DAPM_INPUT("IN1BR"), +SND_SOC_DAPM_INPUT("IN2L"), +SND_SOC_DAPM_INPUT("IN2R"), + +SND_SOC_DAPM_MUX("IN1L Mux", SND_SOC_NOPM, 0, 0, &cs47l15_in1mux[0]), +SND_SOC_DAPM_MUX("IN1R Mux", SND_SOC_NOPM, 0, 0, &cs47l15_in1mux[1]), + +SND_SOC_DAPM_DEMUX("HPOUT1 Demux", SND_SOC_NOPM, 0, 0, &cs47l15_outdemux), + +SND_SOC_DAPM_OUTPUT("DRC1 Signal Activity"), +SND_SOC_DAPM_OUTPUT("DRC2 Signal Activity"), + +SND_SOC_DAPM_OUTPUT("DSP Virtual Output"), + +SND_SOC_DAPM_SUPPLY("MICBIAS1", ARIZONA_MIC_BIAS_CTRL_1, + ARIZONA_MICB1_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_SUPPLY("MICBIAS1A", ARIZONA_MIC_BIAS_CTRL_5, + ARIZONA_MICB1A_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS1B", ARIZONA_MIC_BIAS_CTRL_5, + ARIZONA_MICB1B_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS1C", ARIZONA_MIC_BIAS_CTRL_5, + ARIZONA_MICB1C_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("PWM1 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM1_ENA_SHIFT, + 0, NULL, 0), +SND_SOC_DAPM_PGA("PWM2 Driver", ARIZONA_PWM_DRIVE_1, ARIZONA_PWM2_ENA_SHIFT, + 0, NULL, 0), + +SND_SOC_DAPM_AIF_OUT("AIF1TX1", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX2", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX3", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX4", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX5", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX6", NULL, 0, + ARIZONA_AIF1_TX_ENABLES, ARIZONA_AIF1TX6_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("AIF2TX1", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX2", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX3", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX4", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX4_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("AIF3TX1", NULL, 0, + ARIZONA_AIF3_TX_ENABLES, ARIZONA_AIF3TX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF3TX2", NULL, 0, + ARIZONA_AIF3_TX_ENABLES, ARIZONA_AIF3TX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, + ARIZONA_OUT1L_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, + ARIZONA_OUT1R_ENA_SHIFT, 0, NULL, 0, arizona_hp_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), + +SND_SOC_DAPM_PGA_E("OUT5L", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT5L_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("OUT5R", ARIZONA_OUTPUT_ENABLES_1, + ARIZONA_OUT5R_ENA_SHIFT, 0, NULL, 0, arizona_out_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + +SND_SOC_DAPM_PGA("SPD1TX1", ARIZONA_SPD1_TX_CONTROL, + ARIZONA_SPD1_VAL1_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("SPD1TX2", ARIZONA_SPD1_TX_CONTROL, + ARIZONA_SPD1_VAL2_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_OUT_DRV("SPD1", ARIZONA_SPD1_TX_CONTROL, + ARIZONA_SPD1_ENA_SHIFT, 0, NULL, 0), + +/* mux_in widgets : arranged in the order of sources + specified in ARIZONA_MIXER_INPUT_ROUTES */ + +SND_SOC_DAPM_PGA("Noise Generator", CLEARWATER_COMFORT_NOISE_GENERATOR, + CLEARWATER_NOISE_GEN_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("Tone Generator 1", ARIZONA_TONE_GENERATOR_1, + ARIZONA_TONE1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("Tone Generator 2", ARIZONA_TONE_GENERATOR_1, + ARIZONA_TONE2_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_MIC("HAPTICS", NULL), + +SND_SOC_DAPM_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, + ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, + &cs47l15_aec_loopback_mux), + +SND_SOC_DAPM_PGA_E("IN1L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN1L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN1R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN1R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN2L PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN2L_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), +SND_SOC_DAPM_PGA_E("IN2R PGA", ARIZONA_INPUT_ENABLES, ARIZONA_IN2R_ENA_SHIFT, + 0, NULL, 0, arizona_in_ev, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), + +SND_SOC_DAPM_AIF_IN("AIF1RX1", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX2", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX3", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX4", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX5", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX6", NULL, 0, + ARIZONA_AIF1_RX_ENABLES, ARIZONA_AIF1RX6_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX2", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX3", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX4", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX4_ENA_SHIFT, 0), + +SND_SOC_DAPM_AIF_IN("AIF3RX1", NULL, 0, + ARIZONA_AIF3_RX_ENABLES, ARIZONA_AIF3RX1_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF3RX2", NULL, 0, + ARIZONA_AIF3_RX_ENABLES, ARIZONA_AIF3RX2_ENA_SHIFT, 0), + +SND_SOC_DAPM_PGA("EQ1", ARIZONA_EQ1_1, ARIZONA_EQ1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ2", ARIZONA_EQ2_1, ARIZONA_EQ2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ3", ARIZONA_EQ3_1, ARIZONA_EQ3_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("EQ4", ARIZONA_EQ4_1, ARIZONA_EQ4_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("DRC1L", ARIZONA_DRC1_CTRL1, ARIZONA_DRC1L_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("DRC1R", ARIZONA_DRC1_CTRL1, ARIZONA_DRC1R_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("DRC2L", CLEARWATER_DRC2_CTRL1, ARIZONA_DRC2L_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("DRC2R", CLEARWATER_DRC2_CTRL1, ARIZONA_DRC2R_ENA_SHIFT, 0, + NULL, 0), + +SND_SOC_DAPM_PGA("LHPF1", ARIZONA_HPLPF1_1, ARIZONA_LHPF1_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF2", ARIZONA_HPLPF2_1, ARIZONA_LHPF2_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF3", ARIZONA_HPLPF3_1, ARIZONA_LHPF3_ENA_SHIFT, 0, + NULL, 0), +SND_SOC_DAPM_PGA("LHPF4", ARIZONA_HPLPF4_1, ARIZONA_LHPF4_ENA_SHIFT, 0, + NULL, 0), + +SND_SOC_DAPM_PGA("ISRC1DEC1", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC2", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC3", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1DEC4", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_DEC3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT2", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT3", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC1INT4", ARIZONA_ISRC_1_CTRL_3, + ARIZONA_ISRC1_INT3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC2DEC1", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC2", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC3", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2DEC4", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_DEC3_ENA_SHIFT, 0, NULL, 0), + +SND_SOC_DAPM_PGA("ISRC2INT1", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT0_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT2", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT1_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT3", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT2_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_PGA("ISRC2INT4", ARIZONA_ISRC_2_CTRL_3, + ARIZONA_ISRC2_INT3_ENA_SHIFT, 0, NULL, 0), + +WM_ADSP2("DSP1", 0, cs47l15_adsp_power_ev), + +ARIZONA_MIXER_WIDGETS(EQ1, "EQ1"), +ARIZONA_MIXER_WIDGETS(EQ2, "EQ2"), +ARIZONA_MIXER_WIDGETS(EQ3, "EQ3"), +ARIZONA_MIXER_WIDGETS(EQ4, "EQ4"), + +ARIZONA_MIXER_WIDGETS(DRC1L, "DRC1L"), +ARIZONA_MIXER_WIDGETS(DRC1R, "DRC1R"), +ARIZONA_MIXER_WIDGETS(DRC2L, "DRC2L"), +ARIZONA_MIXER_WIDGETS(DRC2R, "DRC2R"), + +ARIZONA_MIXER_WIDGETS(LHPF1, "LHPF1"), +ARIZONA_MIXER_WIDGETS(LHPF2, "LHPF2"), +ARIZONA_MIXER_WIDGETS(LHPF3, "LHPF3"), +ARIZONA_MIXER_WIDGETS(LHPF4, "LHPF4"), + +ARIZONA_MIXER_WIDGETS(PWM1, "PWM1"), +ARIZONA_MIXER_WIDGETS(PWM2, "PWM2"), + +ARIZONA_MIXER_WIDGETS(OUT1L, "HPOUT1L"), +ARIZONA_MIXER_WIDGETS(OUT1R, "HPOUT1R"), + +ARIZONA_MIXER_WIDGETS(SPKOUTL, "SPKOUTL"), + +ARIZONA_MIXER_WIDGETS(SPKDAT1L, "SPKDAT1L"), +ARIZONA_MIXER_WIDGETS(SPKDAT1R, "SPKDAT1R"), + +ARIZONA_MIXER_WIDGETS(AIF1TX1, "AIF1TX1"), +ARIZONA_MIXER_WIDGETS(AIF1TX2, "AIF1TX2"), +ARIZONA_MIXER_WIDGETS(AIF1TX3, "AIF1TX3"), +ARIZONA_MIXER_WIDGETS(AIF1TX4, "AIF1TX4"), +ARIZONA_MIXER_WIDGETS(AIF1TX5, "AIF1TX5"), +ARIZONA_MIXER_WIDGETS(AIF1TX6, "AIF1TX6"), + +ARIZONA_MIXER_WIDGETS(AIF2TX1, "AIF2TX1"), +ARIZONA_MIXER_WIDGETS(AIF2TX2, "AIF2TX2"), +ARIZONA_MIXER_WIDGETS(AIF2TX3, "AIF2TX3"), +ARIZONA_MIXER_WIDGETS(AIF2TX4, "AIF2TX4"), + +ARIZONA_MIXER_WIDGETS(AIF3TX1, "AIF3TX1"), +ARIZONA_MIXER_WIDGETS(AIF3TX2, "AIF3TX2"), + +ARIZONA_MUX_WIDGETS(SPD1TX1, "SPDIFTX1"), +ARIZONA_MUX_WIDGETS(SPD1TX2, "SPDIFTX2"), + +ARIZONA_DSP_WIDGETS(DSP1, "DSP1"), + +SND_SOC_DAPM_VIRT_MUX("DSP Virtual Output Mux", SND_SOC_NOPM, 0, 0, + &cs47l15_dsp_output_mux[0]), + +ARIZONA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), +ARIZONA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"), +ARIZONA_MUX_WIDGETS(ISRC1DEC3, "ISRC1DEC3"), +ARIZONA_MUX_WIDGETS(ISRC1DEC4, "ISRC1DEC4"), + +ARIZONA_MUX_WIDGETS(ISRC1INT1, "ISRC1INT1"), +ARIZONA_MUX_WIDGETS(ISRC1INT2, "ISRC1INT2"), +ARIZONA_MUX_WIDGETS(ISRC1INT3, "ISRC1INT3"), +ARIZONA_MUX_WIDGETS(ISRC1INT4, "ISRC1INT4"), + +ARIZONA_MUX_WIDGETS(ISRC2DEC1, "ISRC2DEC1"), +ARIZONA_MUX_WIDGETS(ISRC2DEC2, "ISRC2DEC2"), +ARIZONA_MUX_WIDGETS(ISRC2DEC3, "ISRC2DEC3"), +ARIZONA_MUX_WIDGETS(ISRC2DEC4, "ISRC2DEC4"), + +ARIZONA_MUX_WIDGETS(ISRC2INT1, "ISRC2INT1"), +ARIZONA_MUX_WIDGETS(ISRC2INT2, "ISRC2INT2"), +ARIZONA_MUX_WIDGETS(ISRC2INT3, "ISRC2INT3"), +ARIZONA_MUX_WIDGETS(ISRC2INT4, "ISRC2INT4"), + +SND_SOC_DAPM_OUTPUT("HPOUT1L"), +SND_SOC_DAPM_OUTPUT("HPOUT1R"), + +SND_SOC_DAPM_OUTPUT("EPOUTP"), +SND_SOC_DAPM_OUTPUT("EPOUTN"), + +SND_SOC_DAPM_OUTPUT("SPKOUTLN"), +SND_SOC_DAPM_OUTPUT("SPKOUTLP"), + +SND_SOC_DAPM_OUTPUT("SPKDAT1L"), +SND_SOC_DAPM_OUTPUT("SPKDAT1R"), +SND_SOC_DAPM_OUTPUT("SPDIF"), + +SND_SOC_DAPM_OUTPUT("MICSUPP"), +}; + +#define ARIZONA_MIXER_INPUT_ROUTES(name) \ + { name, "Noise Generator", "Noise Generator" }, \ + { name, "Tone Generator 1", "Tone Generator 1" }, \ + { name, "Tone Generator 2", "Tone Generator 2" }, \ + { name, "Haptics", "HAPTICS" }, \ + { name, "AEC", "AEC Loopback" }, \ + { name, "IN1L", "IN1L PGA" }, \ + { name, "IN1R", "IN1R PGA" }, \ + { name, "IN2L", "IN2L PGA" }, \ + { name, "IN2R", "IN2R PGA" }, \ + { name, "AIF1RX1", "AIF1RX1" }, \ + { name, "AIF1RX2", "AIF1RX2" }, \ + { name, "AIF1RX3", "AIF1RX3" }, \ + { name, "AIF1RX4", "AIF1RX4" }, \ + { name, "AIF1RX5", "AIF1RX5" }, \ + { name, "AIF1RX6", "AIF1RX6" }, \ + { name, "AIF2RX1", "AIF2RX1" }, \ + { name, "AIF2RX2", "AIF2RX2" }, \ + { name, "AIF2RX3", "AIF2RX3" }, \ + { name, "AIF2RX4", "AIF2RX4" }, \ + { name, "AIF3RX1", "AIF3RX1" }, \ + { name, "AIF3RX2", "AIF3RX2" }, \ + { name, "EQ1", "EQ1" }, \ + { name, "EQ2", "EQ2" }, \ + { name, "EQ3", "EQ3" }, \ + { name, "EQ4", "EQ4" }, \ + { name, "DRC1L", "DRC1L" }, \ + { name, "DRC1R", "DRC1R" }, \ + { name, "DRC2L", "DRC2L" }, \ + { name, "DRC2R", "DRC2R" }, \ + { name, "LHPF1", "LHPF1" }, \ + { name, "LHPF2", "LHPF2" }, \ + { name, "LHPF3", "LHPF3" }, \ + { name, "LHPF4", "LHPF4" }, \ + { name, "ISRC1DEC1", "ISRC1DEC1" }, \ + { name, "ISRC1DEC2", "ISRC1DEC2" }, \ + { name, "ISRC1DEC3", "ISRC1DEC3" }, \ + { name, "ISRC1DEC4", "ISRC1DEC4" }, \ + { name, "ISRC1INT1", "ISRC1INT1" }, \ + { name, "ISRC1INT2", "ISRC1INT2" }, \ + { name, "ISRC1INT3", "ISRC1INT3" }, \ + { name, "ISRC1INT4", "ISRC1INT4" }, \ + { name, "ISRC2DEC1", "ISRC2DEC1" }, \ + { name, "ISRC2DEC2", "ISRC2DEC2" }, \ + { name, "ISRC2DEC3", "ISRC2DEC3" }, \ + { name, "ISRC2DEC4", "ISRC2DEC4" }, \ + { name, "ISRC2INT1", "ISRC2INT1" }, \ + { name, "ISRC2INT2", "ISRC2INT2" }, \ + { name, "ISRC2INT3", "ISRC2INT3" }, \ + { name, "ISRC2INT4", "ISRC2INT4" }, \ + { name, "DSP1.1", "DSP1" }, \ + { name, "DSP1.2", "DSP1" }, \ + { name, "DSP1.3", "DSP1" }, \ + { name, "DSP1.4", "DSP1" }, \ + { name, "DSP1.5", "DSP1" }, \ + { name, "DSP1.6", "DSP1" } + +static const struct snd_soc_dapm_route cs47l15_dapm_routes[] = { + { "OUT1L", NULL, "CPVDD" }, + { "OUT1R", NULL, "CPVDD" }, + + { "OUT4L", NULL, "SPKVDD" }, + + { "OUT1L", NULL, "SYSCLK" }, + { "OUT1R", NULL, "SYSCLK" }, + { "OUT4L", NULL, "SYSCLK" }, + { "OUT5L", NULL, "SYSCLK" }, + { "OUT5R", NULL, "SYSCLK" }, + + { "SPD1", NULL, "SYSCLK" }, + { "SPD1", NULL, "SPD1TX1" }, + { "SPD1", NULL, "SPD1TX2" }, + + { "IN1AL", NULL, "SYSCLK" }, + { "IN1BL", NULL, "SYSCLK" }, + { "IN1AR", NULL, "SYSCLK" }, + { "IN1BR", NULL, "SYSCLK" }, + + { "IN2L", NULL, "SYSCLK" }, + { "IN2R", NULL, "SYSCLK" }, + + { "DSP1", NULL, "DSPCLK"}, + + { "MICBIAS1", NULL, "MICVDD" }, + + { "MICBIAS1A", NULL, "MICBIAS1" }, + { "MICBIAS1B", NULL, "MICBIAS1" }, + { "MICBIAS1C", NULL, "MICBIAS1" }, + + { "Noise Generator", NULL, "SYSCLK" }, + { "Tone Generator 1", NULL, "SYSCLK" }, + { "Tone Generator 2", NULL, "SYSCLK" }, + + { "Noise Generator", NULL, "NOISE" }, + { "Tone Generator 1", NULL, "TONE" }, + { "Tone Generator 2", NULL, "TONE" }, + + { "AIF1 Capture", NULL, "AIF1TX1" }, + { "AIF1 Capture", NULL, "AIF1TX2" }, + { "AIF1 Capture", NULL, "AIF1TX3" }, + { "AIF1 Capture", NULL, "AIF1TX4" }, + { "AIF1 Capture", NULL, "AIF1TX5" }, + { "AIF1 Capture", NULL, "AIF1TX6" }, + + { "AIF1RX1", NULL, "AIF1 Playback" }, + { "AIF1RX2", NULL, "AIF1 Playback" }, + { "AIF1RX3", NULL, "AIF1 Playback" }, + { "AIF1RX4", NULL, "AIF1 Playback" }, + { "AIF1RX5", NULL, "AIF1 Playback" }, + { "AIF1RX6", NULL, "AIF1 Playback" }, + + { "AIF2 Capture", NULL, "AIF2TX1" }, + { "AIF2 Capture", NULL, "AIF2TX2" }, + { "AIF2 Capture", NULL, "AIF2TX3" }, + { "AIF2 Capture", NULL, "AIF2TX4" }, + + { "AIF2RX1", NULL, "AIF2 Playback" }, + { "AIF2RX2", NULL, "AIF2 Playback" }, + { "AIF2RX3", NULL, "AIF2 Playback" }, + { "AIF2RX4", NULL, "AIF2 Playback" }, + + { "AIF3 Capture", NULL, "AIF3TX1" }, + { "AIF3 Capture", NULL, "AIF3TX2" }, + + { "AIF3RX1", NULL, "AIF3 Playback" }, + { "AIF3RX2", NULL, "AIF3 Playback" }, + + { "AIF1 Playback", NULL, "SYSCLK" }, + { "AIF2 Playback", NULL, "SYSCLK" }, + { "AIF3 Playback", NULL, "SYSCLK" }, + + { "AIF1 Capture", NULL, "SYSCLK" }, + { "AIF2 Capture", NULL, "SYSCLK" }, + { "AIF3 Capture", NULL, "SYSCLK" }, + + { "Trace CPU", NULL, "Trace DSP" }, + { "Trace DSP", NULL, "DSP1" }, + { "Trace CPU", NULL, "SYSCLK" }, + { "Trace DSP", NULL, "SYSCLK" }, + + { "IN1L Mux", "A", "IN1AL" }, + { "IN1L Mux", "B", "IN1BL" }, + { "IN1R Mux", "A", "IN1AR" }, + { "IN1R Mux", "B", "IN1BR" }, + + { "IN1L PGA", NULL, "IN1L Mux" }, + { "IN1R PGA", NULL, "IN1R Mux" }, + + { "IN2L PGA", NULL, "IN2L" }, + { "IN2R PGA", NULL, "IN2R" }, + + ARIZONA_MIXER_ROUTES("OUT1L", "HPOUT1L"), + ARIZONA_MIXER_ROUTES("OUT1R", "HPOUT1R"), + + ARIZONA_MIXER_ROUTES("OUT4L", "SPKOUTL"), + + ARIZONA_MIXER_ROUTES("OUT5L", "SPKDAT1L"), + ARIZONA_MIXER_ROUTES("OUT5R", "SPKDAT1R"), + + ARIZONA_MIXER_ROUTES("PWM1 Driver", "PWM1"), + ARIZONA_MIXER_ROUTES("PWM2 Driver", "PWM2"), + + ARIZONA_MIXER_ROUTES("AIF1TX1", "AIF1TX1"), + ARIZONA_MIXER_ROUTES("AIF1TX2", "AIF1TX2"), + ARIZONA_MIXER_ROUTES("AIF1TX3", "AIF1TX3"), + ARIZONA_MIXER_ROUTES("AIF1TX4", "AIF1TX4"), + ARIZONA_MIXER_ROUTES("AIF1TX5", "AIF1TX5"), + ARIZONA_MIXER_ROUTES("AIF1TX6", "AIF1TX6"), + + ARIZONA_MIXER_ROUTES("AIF2TX1", "AIF2TX1"), + ARIZONA_MIXER_ROUTES("AIF2TX2", "AIF2TX2"), + ARIZONA_MIXER_ROUTES("AIF2TX3", "AIF2TX3"), + ARIZONA_MIXER_ROUTES("AIF2TX4", "AIF2TX4"), + + ARIZONA_MIXER_ROUTES("AIF3TX1", "AIF3TX1"), + ARIZONA_MIXER_ROUTES("AIF3TX2", "AIF3TX2"), + + ARIZONA_MUX_ROUTES("SPD1TX1", "SPDIFTX1"), + ARIZONA_MUX_ROUTES("SPD1TX2", "SPDIFTX2"), + + ARIZONA_MIXER_ROUTES("EQ1", "EQ1"), + ARIZONA_MIXER_ROUTES("EQ2", "EQ2"), + ARIZONA_MIXER_ROUTES("EQ3", "EQ3"), + ARIZONA_MIXER_ROUTES("EQ4", "EQ4"), + + ARIZONA_MIXER_ROUTES("DRC1L", "DRC1L"), + ARIZONA_MIXER_ROUTES("DRC1R", "DRC1R"), + ARIZONA_MIXER_ROUTES("DRC2L", "DRC2L"), + ARIZONA_MIXER_ROUTES("DRC2R", "DRC2R"), + + ARIZONA_MIXER_ROUTES("LHPF1", "LHPF1"), + ARIZONA_MIXER_ROUTES("LHPF2", "LHPF2"), + ARIZONA_MIXER_ROUTES("LHPF3", "LHPF3"), + ARIZONA_MIXER_ROUTES("LHPF4", "LHPF4"), + + ARIZONA_DSP_ROUTES("DSP1"), + + { "DSP Virtual Output", NULL, "DSP Virtual Output Mux" }, + { "DSP Virtual Output Mux", "DSP1", "DSP1" }, + { "DSP Virtual Output", NULL, "SYSCLK" }, + + ARIZONA_MUX_ROUTES("ISRC1INT1", "ISRC1INT1"), + ARIZONA_MUX_ROUTES("ISRC1INT2", "ISRC1INT2"), + ARIZONA_MUX_ROUTES("ISRC1INT3", "ISRC1INT3"), + ARIZONA_MUX_ROUTES("ISRC1INT4", "ISRC1INT4"), + + ARIZONA_MUX_ROUTES("ISRC1DEC1", "ISRC1DEC1"), + ARIZONA_MUX_ROUTES("ISRC1DEC2", "ISRC1DEC2"), + ARIZONA_MUX_ROUTES("ISRC1DEC3", "ISRC1DEC3"), + ARIZONA_MUX_ROUTES("ISRC1DEC4", "ISRC1DEC4"), + + ARIZONA_MUX_ROUTES("ISRC2INT1", "ISRC2INT1"), + ARIZONA_MUX_ROUTES("ISRC2INT2", "ISRC2INT2"), + ARIZONA_MUX_ROUTES("ISRC2INT3", "ISRC2INT3"), + ARIZONA_MUX_ROUTES("ISRC2INT4", "ISRC2INT4"), + + ARIZONA_MUX_ROUTES("ISRC2DEC1", "ISRC2DEC1"), + ARIZONA_MUX_ROUTES("ISRC2DEC2", "ISRC2DEC2"), + ARIZONA_MUX_ROUTES("ISRC2DEC3", "ISRC2DEC3"), + ARIZONA_MUX_ROUTES("ISRC2DEC4", "ISRC2DEC4"), + + { "AEC Loopback", "HPOUT1L", "OUT1L" }, + { "AEC Loopback", "HPOUT1R", "OUT1R" }, + { "HPOUT1 Demux", NULL, "OUT1L" }, + { "HPOUT1 Demux", NULL, "OUT1R" }, + + + { "HPOUT1L", "HPOUT", "HPOUT1 Demux" }, + { "HPOUT1R", "HPOUT", "HPOUT1 Demux" }, + { "EPOUTP", "EPOUT", "HPOUT1 Demux" }, + { "EPOUTN", "EPOUT", "HPOUT1 Demux" }, + + { "AEC Loopback", "SPKOUTL", "OUT4L" }, + { "SPKOUTLN", NULL, "OUT4L" }, + { "SPKOUTLP", NULL, "OUT4L" }, + + { "AEC Loopback", "SPKDAT1L", "OUT5L" }, + { "AEC Loopback", "SPKDAT1R", "OUT5R" }, + { "SPKDAT1L", NULL, "OUT5L" }, + { "SPKDAT1R", NULL, "OUT5R" }, + + { "SPDIF", NULL, "SPD1" }, + + { "MICSUPP", NULL, "SYSCLK" }, + + { "DRC1 Signal Activity", NULL, "DRC1L" }, + { "DRC1 Signal Activity", NULL, "DRC1R" }, + { "DRC2 Signal Activity", NULL, "DRC2L" }, + { "DRC2 Signal Activity", NULL, "DRC2R" }, +}; + +static int cs47l15_set_fll(struct snd_soc_codec *codec, int fll_id, int source, + unsigned int Fref, unsigned int Fout) +{ + struct cs47l15_priv *cs47l15 = snd_soc_codec_get_drvdata(codec); + + switch (fll_id) { + case CS47L15_FLL1: + return arizona_set_fll(&cs47l15->fll[0], source, Fref, Fout); + case CS47L15_FLLAO: + return arizona_set_fll_ao(&cs47l15->fll[1], source, Fref, Fout); + case CS47L15_FLL1_REFCLK: + return arizona_set_fll_refclk(&cs47l15->fll[0], source, Fref, + Fout); + default: + return -EINVAL; + } +} + +#define CS47L15_RATES SNDRV_PCM_RATE_KNOT + +#define CS47L15_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_driver cs47l15_dai[] = { + { + .name = "cs47l15-aif1", + .id = 1, + .base = ARIZONA_AIF1_BCLK_CTRL, + .playback = { + .stream_name = "AIF1 Playback", + .channels_min = 1, + .channels_max = 6, + .rates = CS47L15_RATES, + .formats = CS47L15_FORMATS, + }, + .capture = { + .stream_name = "AIF1 Capture", + .channels_min = 1, + .channels_max = 6, + .rates = CS47L15_RATES, + .formats = CS47L15_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "cs47l15-aif2", + .id = 2, + .base = ARIZONA_AIF2_BCLK_CTRL, + .playback = { + .stream_name = "AIF2 Playback", + .channels_min = 1, + .channels_max = 4, + .rates = CS47L15_RATES, + .formats = CS47L15_FORMATS, + }, + .capture = { + .stream_name = "AIF2 Capture", + .channels_min = 1, + .channels_max = 4, + .rates = CS47L15_RATES, + .formats = CS47L15_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "cs47l15-aif3", + .id = 3, + .base = ARIZONA_AIF3_BCLK_CTRL, + .playback = { + .stream_name = "AIF3 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = CS47L15_RATES, + .formats = CS47L15_FORMATS, + }, + .capture = { + .stream_name = "AIF3 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = CS47L15_RATES, + .formats = CS47L15_FORMATS, + }, + .ops = &arizona_dai_ops, + .symmetric_rates = 1, + }, + { + .name = "cs47l15-cpu-trace", + .capture = { + .stream_name = "Trace CPU", + .channels_min = 2, + .channels_max = 6, + .rates = CS47L15_RATES, + .formats = CS47L15_FORMATS, + }, + .compress_dai = 1, + }, + { + .name = "cs47l15-dsp-trace", + .capture = { + .stream_name = "Trace DSP", + .channels_min = 2, + .channels_max = 6, + .rates = CS47L15_RATES, + .formats = CS47L15_FORMATS, + }, + }, +}; + +static irqreturn_t cs47l15_adsp_bus_error(int irq, void *data) +{ + struct wm_adsp *adsp = (struct wm_adsp *)data; + return wm_adsp2_bus_error(adsp); +} + +static void cs47l15_compr_irq(struct cs47l15_priv *cs47l15, + struct cs47l15_compr *compr) +{ + bool trigger = false; + int ret; + + ret = wm_adsp_compr_irq(&compr->adsp_compr, &trigger); + if (ret < 0) + return; +} + +static irqreturn_t cs47l15_adsp2_irq(int irq, void *data) +{ + struct cs47l15_priv *cs47l15 = data; + struct arizona *arizona = cs47l15->core.arizona; + struct cs47l15_compr *compr; + int i; + + for (i = 0; i < ARRAY_SIZE(cs47l15->compr_info); ++i) { + if (!cs47l15->compr_info[i].adsp_compr.dsp->running) + continue; + + compr = &cs47l15->compr_info[i]; + cs47l15_compr_irq(cs47l15, compr); + } + + if (arizona->pdata.ez2ctrl_trigger) { + mutex_lock(&cs47l15->trig_lock); + if (!cs47l15->trig) { + cs47l15->trig = true; + + if (wm_adsp_fw_has_voice_trig(&cs47l15->core.adsp[0])) + arizona->pdata.ez2ctrl_trigger(); + } + mutex_unlock(&cs47l15->trig_lock); + } + return IRQ_HANDLED; +} + +static struct cs47l15_compr *cs47l15_get_compr(struct snd_soc_pcm_runtime *rtd, + struct cs47l15_priv *cs47l15) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(cs47l15->compr_info); ++i) { + if (strcmp(rtd->codec_dai->name, + cs47l15->compr_info[i].dai_name) == 0) + return &cs47l15->compr_info[i]; + } + + return NULL; +} + +static int cs47l15_compr_open(struct snd_compr_stream *stream) +{ + struct snd_soc_pcm_runtime *rtd = stream->private_data; + struct cs47l15_priv *cs47l15 = snd_soc_codec_get_drvdata(rtd->codec); + struct cs47l15_compr *compr; + + compr = cs47l15_get_compr(rtd, cs47l15); + if (!compr) { + dev_err(cs47l15->core.arizona->dev, + "No compressed stream for dai '%s'\n", + rtd->codec_dai->name); + return -EINVAL; + } + + return wm_adsp_compr_open(&compr->adsp_compr, stream); +} + +static int cs47l15_codec_probe(struct snd_soc_codec *codec) +{ + struct cs47l15_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->core.arizona; + int ret; + + codec->control_data = priv->core.arizona->regmap; + priv->core.arizona->dapm = &codec->dapm; + + ret = snd_soc_codec_set_cache_io(codec, 32, 16, SND_SOC_REGMAP); + if (ret != 0) + return ret; + + arizona_init_spk(codec); + arizona_init_gpio(codec); + arizona_init_mono(codec); + arizona_init_input(codec); + + ret = wm_adsp2_codec_probe(&priv->core.adsp[0], codec); + if (ret) + return ret; + + ret = snd_soc_add_codec_controls(codec, + arizona_adsp2v2_rate_controls, 1); + if (ret != 0) + return ret; + + mutex_lock(&codec->card->dapm_mutex); + snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); + mutex_unlock(&codec->card->dapm_mutex); + + priv->core.arizona->dapm = &codec->dapm; + + ret = arizona_request_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, + "ADSP2 interrupt 1", cs47l15_adsp2_irq, priv); + if (ret != 0) { + dev_err(arizona->dev, "Failed to request DSP IRQ: %d\n", ret); + return ret; + } + + ret = irq_set_irq_wake(arizona->irq, 1); + if (ret) + dev_err(arizona->dev, + "Failed to set DSP IRQ to wake source: %d\n", + ret); + + ret = arizona_request_irq(arizona, + MOON_IRQ_DSP1_BUS_ERROR, + "ADSP2 bus error", + cs47l15_adsp_bus_error, + &priv->core.adsp[0]); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to request DSP Lock region IRQ: %d\n", + ret); + irq_set_irq_wake(arizona->irq, 0); + arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); + return ret; + } + + mutex_lock(&codec->card->dapm_mutex); + snd_soc_dapm_enable_pin(&codec->dapm, "DRC2 Signal Activity"); + mutex_unlock(&codec->card->dapm_mutex); + + ret = regmap_update_bits(arizona->regmap, CLEARWATER_IRQ2_MASK_9, + CLEARWATER_DRC2_SIG_DET_EINT2, + 0); + if (ret != 0) { + dev_err(arizona->dev, + "Failed to unmask DRC2 IRQ for DSP: %d\n", + ret); + goto err_drc; + } + + return 0; + +err_drc: + arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); + arizona_free_irq(arizona, MOON_IRQ_DSP1_BUS_ERROR, + &priv->core.adsp[0]); + return ret; +} + +static int cs47l15_codec_remove(struct snd_soc_codec *codec) +{ + struct cs47l15_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->core.arizona; + + irq_set_irq_wake(arizona->irq, 0); + arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); + arizona_free_irq(arizona, MOON_IRQ_DSP1_BUS_ERROR, + &priv->core.adsp[0]); + regmap_update_bits(arizona->regmap, CLEARWATER_IRQ2_MASK_9, + CLEARWATER_DRC2_SIG_DET_EINT2, + CLEARWATER_DRC2_SIG_DET_EINT2); + + wm_adsp2_codec_remove(&priv->core.adsp[0], codec); + + priv->core.arizona->dapm = NULL; + + return 0; +} + +#define CS47L15_DIG_VU 0x0200 + +static unsigned int cs47l15_digital_vu[] = { + ARIZONA_DAC_DIGITAL_VOLUME_1L, + ARIZONA_DAC_DIGITAL_VOLUME_1R, + ARIZONA_DAC_DIGITAL_VOLUME_4L, + ARIZONA_DAC_DIGITAL_VOLUME_5L, + ARIZONA_DAC_DIGITAL_VOLUME_5R, +}; + +static struct snd_soc_codec_driver soc_codec_dev_cs47l15 = { + .probe = cs47l15_codec_probe, + .remove = cs47l15_codec_remove, + + .idle_bias_off = true, + + .set_sysclk = arizona_set_sysclk, + .set_pll = cs47l15_set_fll, + + .controls = cs47l15_snd_controls, + .num_controls = ARRAY_SIZE(cs47l15_snd_controls), + .dapm_widgets = cs47l15_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(cs47l15_dapm_widgets), + .dapm_routes = cs47l15_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(cs47l15_dapm_routes), +}; + +static struct snd_compr_ops cs47l15_compr_ops = { + .open = cs47l15_compr_open, + .free = wm_adsp_compr_free, + .set_params = wm_adsp_compr_set_params, + .trigger = wm_adsp_compr_trigger, + .pointer = wm_adsp_compr_pointer, + .copy = wm_adsp_compr_copy, + .get_caps = wm_adsp_compr_get_caps, +}; + +static struct snd_soc_platform_driver cs47l15_compr_platform = { + .compr_ops = &cs47l15_compr_ops, +}; + +static void cs47l15_init_compr_info(struct cs47l15_priv *cs47l15) +{ + struct wm_adsp *dsp; + int i; + + BUILD_BUG_ON(ARRAY_SIZE(cs47l15->compr_info) != + ARRAY_SIZE(compr_dai_mapping)); + + for (i = 0; i < ARRAY_SIZE(cs47l15->compr_info); ++i) { + cs47l15->compr_info[i].priv = cs47l15; + + cs47l15->compr_info[i].dai_name = + compr_dai_mapping[i].dai_name; + + dsp = &cs47l15->core.adsp[compr_dai_mapping[i].adsp_num], + wm_adsp_compr_init(dsp, &cs47l15->compr_info[i].adsp_compr); + } +} + +static void cs47l15_destroy_compr_info(struct cs47l15_priv *cs47l15) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(cs47l15->compr_info); ++i) + wm_adsp_compr_destroy(&cs47l15->compr_info[i].adsp_compr); +} + +static int cs47l15_probe(struct platform_device *pdev) +{ + struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); + struct cs47l15_priv *cs47l15; + int i, ret; + + BUILD_BUG_ON(ARRAY_SIZE(cs47l15_dai) > ARIZONA_MAX_DAI); + + cs47l15 = devm_kzalloc(&pdev->dev, sizeof(struct cs47l15_priv), + GFP_KERNEL); + if (cs47l15 == NULL) + return -ENOMEM; + platform_set_drvdata(pdev, cs47l15); + + /* Set of_node to parent from the SPI device to allow DAPM to + * locate regulator supplies */ + pdev->dev.of_node = arizona->dev->of_node; + + mutex_init(&cs47l15->fw_lock); + mutex_init(&cs47l15->trig_lock); + + cs47l15->core.arizona = arizona; + cs47l15->core.num_inputs = 4; + + cs47l15->core.adsp[0].part = "cs47l15"; + if (arizona->pdata.rev_specific_fw) + cs47l15->core.adsp[0].part_rev = 'a' + arizona->rev; + cs47l15->core.adsp[0].num = 1; + cs47l15->core.adsp[0].type = WMFW_ADSP2; + cs47l15->core.adsp[0].rev = 2; + cs47l15->core.adsp[0].dev = arizona->dev; + cs47l15->core.adsp[0].regmap = arizona->regmap_32bit; + + cs47l15->core.adsp[0].base = CLEARWATER_DSP1_CONFIG; + cs47l15->core.adsp[0].mem = cs47l15_dsp1_regions; + cs47l15->core.adsp[0].num_mems + = ARRAY_SIZE(cs47l15_dsp1_regions); + + if (arizona->pdata.num_fw_defs[0]) { + cs47l15->core.adsp[0].firmwares + = arizona->pdata.fw_defs[0]; + + cs47l15->core.adsp[0].num_firmwares + = arizona->pdata.num_fw_defs[0]; + } + + cs47l15->core.adsp[0].rate_put_cb = + cs47l15_adsp_rate_put_cb; + + cs47l15->core.adsp[0].lock_regions = WM_ADSP2_REGION_1_3; + + cs47l15->core.adsp[0].hpimp_cb = arizona_hpimp_cb; + + ret = wm_adsp2_init(&cs47l15->core.adsp[0], &cs47l15->fw_lock); + if (ret != 0) + return ret; + + cs47l15_init_compr_info(cs47l15); + + for (i = 0; i < ARRAY_SIZE(cs47l15->fll); i++) { + cs47l15->fll[i].vco_mult = 3; + cs47l15->fll[i].min_outdiv = 3; + cs47l15->fll[i].max_outdiv = 3; + } + + arizona_init_fll(arizona, 1, ARIZONA_FLL1_CONTROL_1 - 1, + ARIZONA_IRQ_FLL1_LOCK, ARIZONA_IRQ_FLL1_CLOCK_OK, + &cs47l15->fll[0]); + arizona_init_fll(arizona, 4, MOON_FLLAO_CONTROL_1 - 1, + MOON_IRQ_FLLAO_CLOCK_OK, MOON_IRQ_FLLAO_CLOCK_OK, + &cs47l15->fll[1]); + + for (i = 0; i < ARRAY_SIZE(cs47l15_dai); i++) + arizona_init_dai(&cs47l15->core, i); + + /* Latch volume update bits */ + for (i = 0; i < ARRAY_SIZE(cs47l15_digital_vu); i++) + regmap_update_bits(arizona->regmap, cs47l15_digital_vu[i], + CS47L15_DIG_VU, CS47L15_DIG_VU); + + pm_runtime_enable(&pdev->dev); + pm_runtime_idle(&pdev->dev); + + ret = snd_soc_register_platform(&pdev->dev, &cs47l15_compr_platform); + if (ret < 0) { + dev_err(&pdev->dev, + "Failed to register platform: %d\n", + ret); + goto error; + } + + ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_cs47l15, + cs47l15_dai, ARRAY_SIZE(cs47l15_dai)); + if (ret < 0) { + dev_err(&pdev->dev, + "Failed to register codec: %d\n", + ret); + snd_soc_unregister_platform(&pdev->dev); + goto error; + } + + return ret; + +error: + cs47l15_destroy_compr_info(cs47l15); + mutex_destroy(&cs47l15->fw_lock); + + return ret; +} + +static int cs47l15_remove(struct platform_device *pdev) +{ + struct cs47l15_priv *cs47l15 = platform_get_drvdata(pdev); + + snd_soc_unregister_platform(&pdev->dev); + snd_soc_unregister_codec(&pdev->dev); + pm_runtime_disable(&pdev->dev); + + cs47l15_destroy_compr_info(cs47l15); + + wm_adsp2_remove(&cs47l15->core.adsp[0]); + + mutex_destroy(&cs47l15->fw_lock); + + return 0; +} + +static struct platform_driver cs47l15_codec_driver = { + .driver = { + .name = "cs47l15-codec", + .owner = THIS_MODULE, + }, + .probe = cs47l15_probe, + .remove = cs47l15_remove, +}; + +module_platform_driver(cs47l15_codec_driver); + +MODULE_DESCRIPTION("ASoC CS47L15 driver"); +MODULE_AUTHOR("Jaswinder Jassal "); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:cs47l15-codec"); diff --git a/sound/soc/codecs/cs47l15.h b/sound/soc/codecs/cs47l15.h new file mode 100644 index 00000000000..8e27dfb0056 --- /dev/null +++ b/sound/soc/codecs/cs47l15.h @@ -0,0 +1,22 @@ +/* + * cs47l15.h -- ALSA SoC Audio driver for CS47L15 + * + * Copyright 2016 Cirrus Logic + * + * Author: Jaswinder Jassal + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _CS47L15_H +#define _CS47L15_H + +#include "arizona.h" + +#define CS47L15_FLL1 1 +#define CS47L15_FLL1_REFCLK 3 +#define CS47L15_FLLAO 5 + +#endif diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 2b11fbcae60..351b491eb5c 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -30,6 +30,8 @@ #define WM_ADSP2_REGION_7 BIT(7) #define WM_ADSP2_REGION_8 BIT(8) #define WM_ADSP2_REGION_9 BIT(9) +#define WM_ADSP2_REGION_1_3 (WM_ADSP2_REGION_1 | \ + WM_ADSP2_REGION_2 | WM_ADSP2_REGION_3) #define WM_ADSP2_REGION_1_9 (WM_ADSP2_REGION_1 | \ WM_ADSP2_REGION_2 | WM_ADSP2_REGION_3 | \ WM_ADSP2_REGION_4 | WM_ADSP2_REGION_5 | \ From f68a9c869bad93911faf0e9fa6ceee421978baee Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Thu, 7 Jul 2016 12:41:00 +0100 Subject: [PATCH 1156/1167] ASoC: wm_adsp: Add ID for cs47l15 trace firmware Change-Id: Idded69fac669cb3c3d47d08d4f74373a76acc33a Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index c0ff3805de9..310e1949716 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2430,6 +2430,7 @@ static int wm_adsp_get_features(struct wm_adsp *dsp) case 0x7001e: case 0x8001e: case 0x9001e: + case 0xd001e: /* trace firmware */ dsp->fw_features.host_read_buf = true; break; From dd642656bed310b1f0f5f44e2ba8e6ba6d083558 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 25 Jul 2016 14:37:07 +0100 Subject: [PATCH 1157/1167] ASoC: gaines: Fix missing IN2R dmicref input The table cs47l15_dmic_inputs[] was missing IN2R Change-Id: I72d8688322f28ca9718fff1f3903c0e9bc46e88c Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/arizona.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index d755d190e50..616911af141 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -847,6 +847,7 @@ static const char * const cs47l15_dmic_inputs[] = { "IN1L Mux", "IN1R Mux", "IN2L", + "IN2R", }; int arizona_init_input(struct snd_soc_codec *codec) From a5ecaa7bce68f09a18d69cc58aa44f74ee166036 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 25 Jul 2016 14:45:31 +0100 Subject: [PATCH 1158/1167] mfd: cs47l15: Fix missing speaker interrupts Change-Id: I3be0b80b4e5eac3ed96da9b5d27ecbe2cdf69b21 Signed-off-by: Richard Fitzgerald --- drivers/mfd/cs47l15-tables.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/mfd/cs47l15-tables.c b/drivers/mfd/cs47l15-tables.c index 3d4c5bf7028..951df20659f 100644 --- a/drivers/mfd/cs47l15-tables.c +++ b/drivers/mfd/cs47l15-tables.c @@ -92,6 +92,11 @@ static const struct regmap_irq cs47l15_irqs[ARIZONA_NUM_IRQ] = { [ARIZONA_IRQ_DSP_IRQ8] = { .reg_offset = 10, .mask = CLEARWATER_DSP_IRQ8_EINT1}, + [ARIZONA_IRQ_SPK_OVERHEAT_WARN] = { .reg_offset = 14, + .mask = CLEARWATER_SPK_OVERHEAT_WARN_EINT1}, + [ARIZONA_IRQ_SPK_OVERHEAT] = { .reg_offset = 14, + .mask = CLEARWATER_SPK_SHUTDOWN_EINT1}, + [ARIZONA_IRQ_GP1] = { .reg_offset = 16, .mask = CLEARWATER_GP1_EINT1}, [ARIZONA_IRQ_GP2] = { .reg_offset = 16, From 27336e7bf4f88fff527c388d32baea957c825264 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 8 Aug 2016 10:06:55 +0100 Subject: [PATCH 1159/1167] ASoC: wm_adsp: Use correct name in v2 firmware controls Controls for v2 firmwares include the name of the selected firmware. This can be overridden with custom names so we should be using the dsp->firmware list, not the table of default names. Change-Id: Ib4c68150cac04655135fcf8b5f62db5d6841982a Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/wm_adsp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 310e1949716..0821e0b5b53 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1220,7 +1220,8 @@ static int wm_adsp_create_ctl_blk(struct wm_adsp *dsp, break; default: ret = snprintf(name, WM_ADSP_CONTROL_MAX, "DSP%d%c %.10s %x:%d", - dsp->num, *region_name, wm_adsp_fw_text[dsp->fw], + dsp->num, *region_name, + dsp->firmwares[dsp->fw].name, alg_region->alg, block); /* Truncate the subname from the start if it is too long */ From 164edd1c78a911692f515d9117f95e0c4c3a39f9 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 16 Aug 2016 13:22:31 +0100 Subject: [PATCH 1160/1167] switch: arizona: Add tuning for cs47l15 based on HP impedance Change-Id: Ib135b5dfe2be8faeda375777bf078a2c952f847e Signed-off-by: Charles Keepax --- drivers/switch/switch-arizona.c | 157 ++++++++++++++++++++++++++++++++ 1 file changed, 157 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index 666e65b575f..e706b192c6d 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -78,6 +78,9 @@ #define MOON_HP_LOW_IMPEDANCE_LIMIT 14 #define MOON_HP_MEDIUM_IMPEDANCE_LIMIT 24 +#define CS47L15_HP_LOW_IMPEDANCE_LIMIT 16 +#define CS47L15_HP_MEDIUM_IMPEDANCE_LIMIT 32 + #define MOON_HPD_SENSE_MICDET1 0 #define MOON_HPD_SENSE_MICDET2 1 #define MOON_HPD_SENSE_MICDET3 2 @@ -1464,6 +1467,108 @@ static const struct reg_default moon_high_impedance_patch[] = { { 0x47E, 0x0430 }, }; +static const struct reg_default cs47l15_low_impedance_patch[] = { + { 0x460, 0x0C00 }, + { 0x461, 0xCB59 }, + { 0x462, 0x0C00 }, + { 0x463, 0x6037 }, + { 0x464, 0x0C01 }, + { 0x465, 0x2D86 }, + { 0x466, 0x0801 }, + { 0x467, 0x264E }, + { 0x468, 0x0801 }, + { 0x469, 0x1E6D }, + { 0x46A, 0x0802 }, + { 0x46B, 0x199A }, + { 0x46C, 0x0802 }, + { 0x46D, 0x1220 }, + { 0x46E, 0x0802 }, + { 0x46F, 0x0E65 }, + { 0x470, 0x0806 }, + { 0x471, 0x0A31 }, + { 0x472, 0x080E }, + { 0x473, 0x040F }, + { 0x474, 0x080E }, + { 0x475, 0x0339 }, + { 0x476, 0x080E }, + { 0x477, 0x028F }, + { 0x478, 0x080E }, + { 0x479, 0x0209 }, + { 0x47A, 0x080E }, + { 0x47B, 0x00CF }, + { 0x47C, 0x080E }, + { 0x47D, 0x0001 }, + { 0x47E, 0x081F }, +}; + +static const struct reg_default cs47l15_normal_impedance_patch[] = { + { 0x460, 0x0C00 }, + { 0x461, 0xCB59 }, + { 0x462, 0x0C00 }, + { 0x463, 0xB53C }, + { 0x464, 0x0C01 }, + { 0x465, 0x4827 }, + { 0x466, 0x0801 }, + { 0x467, 0x3950 }, + { 0x468, 0x0801 }, + { 0x469, 0x264E }, + { 0x46A, 0x0802 }, + { 0x46B, 0x1E6D }, + { 0x46C, 0x0802 }, + { 0x46D, 0x199A }, + { 0x46E, 0x0802 }, + { 0x46F, 0x1456 }, + { 0x470, 0x0806 }, + { 0x471, 0x1220 }, + { 0x472, 0x080E }, + { 0x473, 0x040F }, + { 0x474, 0x080E }, + { 0x475, 0x0339 }, + { 0x476, 0x080E }, + { 0x477, 0x028F }, + { 0x478, 0x080E }, + { 0x479, 0x0209 }, + { 0x47A, 0x080E }, + { 0x47B, 0x00CF }, + { 0x47C, 0x080E }, + { 0x47D, 0x0001 }, + { 0x47E, 0x081F }, +}; + +static const struct reg_default cs47l15_high_impedance_patch[] = { + { 0x460, 0x0C00 }, + { 0x461, 0xCB59 }, + { 0x462, 0x0C00 }, + { 0x463, 0xB53C }, + { 0x464, 0x0C01 }, + { 0x465, 0x6037 }, + { 0x466, 0x0801 }, + { 0x467, 0x4827 }, + { 0x468, 0x0801 }, + { 0x469, 0x3950 }, + { 0x46A, 0x0802 }, + { 0x46B, 0x264E }, + { 0x46C, 0x0802 }, + { 0x46D, 0x1E6D }, + { 0x46E, 0x0802 }, + { 0x46F, 0x199A }, + { 0x470, 0x0806 }, + { 0x471, 0x1220 }, + { 0x472, 0x080E }, + { 0x473, 0x040F }, + { 0x474, 0x080E }, + { 0x475, 0x0339 }, + { 0x476, 0x080E }, + { 0x477, 0x028F }, + { 0x478, 0x080E }, + { 0x479, 0x0209 }, + { 0x47A, 0x080E }, + { 0x47B, 0x00CF }, + { 0x47C, 0x080E }, + { 0x47D, 0x0001 }, + { 0x47E, 0x081F }, +}; + static void arizona_hs_mic_control(struct arizona *arizona, int state) { unsigned int addr = ARIZONA_ADC_DIGITAL_VOLUME_1L; @@ -1717,6 +1822,55 @@ static int arizona_moon_tune_headphone(struct arizona_extcon_info *info, return 0; } +static int arizona_cs47l15_tune_headphone(struct arizona_extcon_info *info, + int reading) +{ + struct arizona *arizona = info->arizona; + const struct reg_default *patch; + int i, ret, size; + + if (reading <= arizona->pdata.hpdet_short_circuit_imp) { + /* Headphones are always off here so just mark them */ + dev_warn(arizona->dev, "Possible HP short, disabling\n"); + return 0; + } else if (reading <= CS47L15_HP_LOW_IMPEDANCE_LIMIT) { + if (info->hp_imp_level == HP_LOW_IMPEDANCE) + return 0; + + info->hp_imp_level = HP_LOW_IMPEDANCE; + + patch = cs47l15_low_impedance_patch; + size = ARRAY_SIZE(cs47l15_low_impedance_patch); + } else if (reading <= CS47L15_HP_MEDIUM_IMPEDANCE_LIMIT) { + if (info->hp_imp_level == HP_NORMAL_IMPEDANCE) + return 0; + + info->hp_imp_level = HP_NORMAL_IMPEDANCE; + + patch = cs47l15_normal_impedance_patch; + size = ARRAY_SIZE(cs47l15_normal_impedance_patch); + } else { + if (info->hp_imp_level == HP_HIGH_IMPEDANCE) + return 0; + + info->hp_imp_level = HP_HIGH_IMPEDANCE; + + patch = cs47l15_high_impedance_patch; + size = ARRAY_SIZE(cs47l15_high_impedance_patch); + } + + for (i = 0; i < size; ++i) { + ret = regmap_write(arizona->regmap, + patch[i].reg, patch[i].def); + if (ret != 0) + dev_warn(arizona->dev, + "Failed to write headphone patch: %x <= %x\n", + patch[i].reg, patch[i].def); + } + + return 0; +} + void arizona_set_headphone_imp(struct arizona_extcon_info *info, int imp) { struct arizona *arizona = info->arizona; @@ -1744,6 +1898,9 @@ void arizona_set_headphone_imp(struct arizona_extcon_info *info, int imp) case CS47L91: arizona_moon_tune_headphone(info, HOHM_TO_OHM(imp)); break; + case CS47L15: + arizona_cs47l15_tune_headphone(info, HOHM_TO_OHM(imp)); + break; default: break; } From 2db1d0a9eb178c0ac8353e5e2430da15085651e3 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 17 Aug 2016 16:19:30 +0100 Subject: [PATCH 1161/1167] mfd: cs47l15: Update patch file Update with the latest device tuning. Change-Id: I6dc4d55ec480f7d1faa794b4cbaf8ac88ae12007 Signed-off-by: Charles Keepax --- drivers/mfd/cs47l15-tables.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/mfd/cs47l15-tables.c b/drivers/mfd/cs47l15-tables.c index 951df20659f..47717d0e73c 100644 --- a/drivers/mfd/cs47l15-tables.c +++ b/drivers/mfd/cs47l15-tables.c @@ -19,13 +19,16 @@ #include "arizona.h" static const struct reg_default cs47l15_reva_16_patch[] = { - { 0x008C, 0x5555 }, - { 0x008C, 0xAAAA }, - { 0x0314, 0x0080 }, - { 0x04D4, 0x0028 }, - { 0x04CF, 0x0FF4 }, - { 0x008C, 0xCCCC }, - { 0x008C, 0x3333 }, + { 0x8C, 0x5555 }, + { 0x8C, 0xAAAA }, + { 0x314, 0x0081 }, + { 0x4D4, 0x0008 }, + { 0x4CF, 0x0F00 }, + { 0x4A8, 0x6020 }, + { 0x4A9, 0x6020 }, + { 0x4D7, 0x1B2B }, + { 0x8C, 0xCCCC }, + { 0x8C, 0x3333 }, }; int cs47l15_patch(struct arizona *arizona) From d395dab1697dc5deee976512f56a17a80a378e0c Mon Sep 17 00:00:00 2001 From: jjassal Date: Fri, 26 Aug 2016 20:09:33 +0100 Subject: [PATCH 1162/1167] switch: arizona: Add HPDET calibrations for Gaines Change-Id: I13c35810f168ce380eeba5d0874e91d97256185b Signed-off-by: Jaswinder Jassal --- drivers/switch/switch-arizona.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/switch/switch-arizona.c b/drivers/switch/switch-arizona.c index e706b192c6d..a4ef9a2583f 100644 --- a/drivers/switch/switch-arizona.c +++ b/drivers/switch/switch-arizona.c @@ -919,6 +919,17 @@ static const struct arizona_hpdet_calibration_data 500000}, }; +static const struct arizona_hpdet_calibration_data + arizona_hpdet_gaines_ranges[] = { + {}, + { 3300, 12300, 1000000, -4300, 7975, 69600000, 382800, 33350000, + 500000}, + { 12300, 103300, 9633000, -79500, 7300, 62900000, 283050, 33350000, + 500000}, + { 103300, 1003300, 100684000, -949400, 7300, 63200000, 284400, 33350000, + 500000}, +}; + static int arizona_hpdet_d_calibrate(const struct arizona_extcon_info *info, int dacval, int range) { @@ -3508,6 +3519,11 @@ static int arizona_hpdet_clearwater_read_calibration(struct arizona_extcon_info info->calib_data_size = ARRAY_SIZE(arizona_hpdet_clearwater_ranges); break; + case CS47L15: + info->calib_data = arizona_hpdet_gaines_ranges; + info->calib_data_size = + ARRAY_SIZE(arizona_hpdet_gaines_ranges); + break; default: info->calib_data = arizona_hpdet_moon_ranges; info->calib_data_size = From c7b98a5fc760f3c0a7101cb34564fa545acf8dd8 Mon Sep 17 00:00:00 2001 From: Jaswinder Jassal Date: Sat, 27 Aug 2016 20:09:42 +0100 Subject: [PATCH 1163/1167] mfd: cs47l15: Add registers for mid-mode support Change-Id: I530e18f377dba79253ed3ddef8160933c983bebf Signed-off-by: Jaswinder Jassal --- drivers/mfd/cs47l15-tables.c | 4 ++++ include/linux/mfd/arizona/registers.h | 2 ++ 2 files changed, 6 insertions(+) diff --git a/drivers/mfd/cs47l15-tables.c b/drivers/mfd/cs47l15-tables.c index 47717d0e73c..211dfe2abdd 100644 --- a/drivers/mfd/cs47l15-tables.c +++ b/drivers/mfd/cs47l15-tables.c @@ -242,6 +242,8 @@ static const struct reg_default cs47l15_reg_default[] = { { 0x0000031D, 0x0180 }, /* R797 (0x00031D) - ADC_DIGITAL_VOLUME_2R */ { 0x0000031E, 0x0000 }, /* R798 (0x00031E) - DMIC2R_CONTROL */ { 0x0000031F, 0x0000 }, /* R799 (0x00031F) - IN2R_RATE_CONTROL */ + { 0x000003A8, 0x2000 }, /* R936 (0x0003A8) - CS47L15_ADC_INT_BIAS */ + { 0x000003C4, 0x0000 }, /* R964 (0x0003C4) - CS47L15_PGA_BIAS_SEL */ { 0x00000400, 0x0000 }, /* R1024 (0x000400) - OUTPUT_ENABLES_1 */ { 0x00000408, 0x0000 }, /* R1032 (0x000408) - OUTPUT_RATE_1 */ { 0x00000409, 0x0022 }, /* R1033 (0x000409) - OUTPUT_VOLUME_RAMP */ @@ -939,6 +941,8 @@ static bool cs47l15_16bit_readable_register(struct device *dev, unsigned int reg case ARIZONA_ADC_DIGITAL_VOLUME_2R: case ARIZONA_DMIC2R_CONTROL: case MOON_IN2R_RATE_CONTROL: + case CS47L15_ADC_INT_BIAS: + case CS47L15_PGA_BIAS_SEL: case ARIZONA_OUTPUT_ENABLES_1: case ARIZONA_OUTPUT_STATUS_1: case ARIZONA_RAW_OUTPUT_STATUS_1: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 96786816683..d04d9c5a582 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -270,6 +270,8 @@ #define ARIZONA_ADC_VCO_CAL_7 0x396 #define ARIZONA_ADC_VCO_CAL_8 0x397 #define ARIZONA_ADC_VCO_CAL_9 0x398 +#define CS47L15_ADC_INT_BIAS 0x3A8 +#define CS47L15_PGA_BIAS_SEL 0x3C4 #define ARIZONA_OUTPUT_ENABLES_1 0x400 #define ARIZONA_OUTPUT_STATUS_1 0x401 #define ARIZONA_OUTPUT_STANDBY_1 0x405 From ca7ffeebfd8b586f7efd1120aa6fd2e31ded0fd4 Mon Sep 17 00:00:00 2001 From: jjassal Date: Thu, 7 Jul 2016 10:45:51 +0100 Subject: [PATCH 1164/1167] ASoC: cs47l15: Add IN1 mid-mode support Change-Id: I9ae0b2b717022c719d6c9f976ee9166c485b25b1 Signed-off-by: jjassal --- sound/soc/codecs/cs47l15.c | 60 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/sound/soc/codecs/cs47l15.c b/sound/soc/codecs/cs47l15.c index 0ef9b5cd0eb..79fe93eb2f1 100644 --- a/sound/soc/codecs/cs47l15.c +++ b/sound/soc/codecs/cs47l15.c @@ -44,6 +44,12 @@ #define CS47L15_FLL_COUNT 2 +/* Mid-mode registers */ +#define CS47L15_ADC_INT_BIAS_MASK 0x3800 +#define CS47L15_ADC_INT_BIAS_SHIFT 11 +#define CS47L15_PGA_BIAS_SEL_MASK 0x03 +#define CS47L15_PGA_BIAS_SEL_SHIFT 0 + /* 2 mixer inputs with a stride of n in the register address */ #define CS47L15_MIXER_INPUTS_2_N(_reg, n) \ (_reg), \ @@ -132,6 +138,7 @@ struct cs47l15_priv { bool trig; struct mutex trig_lock; struct mutex fw_lock; + bool in1_lp_mode; }; static const struct { @@ -607,6 +614,55 @@ static DECLARE_TLV_DB_SCALE(ng_tlv, -12000, 600, 0); SOC_SINGLE(name " NG SPKDAT1L Switch", base, 8, 1, 0), \ SOC_SINGLE(name " NG SPKDAT1R Switch", base, 9, 1, 0) +static int cs47l15_in1_adc_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct cs47l15_priv *cs47l15 = snd_soc_codec_get_drvdata(codec); + + ucontrol->value.integer.value[0] = cs47l15->in1_lp_mode ? 1 : 0; + + return 0; +} + +static int cs47l15_in1_adc_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct cs47l15_priv *cs47l15 = snd_soc_codec_get_drvdata(codec); + + switch (ucontrol->value.integer.value[0]) { + case 0: + /* Set IN1 to normal mode */ + snd_soc_update_bits(codec, ARIZONA_DMIC1L_CONTROL, + CLEARWATER_IN1_OSR_MASK, + 5 << CLEARWATER_IN1_OSR_SHIFT); + snd_soc_update_bits(codec, CS47L15_ADC_INT_BIAS, + CS47L15_ADC_INT_BIAS_MASK, + 4 << CS47L15_ADC_INT_BIAS_SHIFT); + snd_soc_update_bits(codec, CS47L15_PGA_BIAS_SEL, + CS47L15_PGA_BIAS_SEL_MASK, + 0); + cs47l15->in1_lp_mode = false; + break; + default: + /* Set IN1 to LP mode */ + snd_soc_update_bits(codec, ARIZONA_DMIC1L_CONTROL, + CLEARWATER_IN1_OSR_MASK, + 4 << CLEARWATER_IN1_OSR_SHIFT); + snd_soc_update_bits(codec, CS47L15_ADC_INT_BIAS, + CS47L15_ADC_INT_BIAS_MASK, + 1 << CS47L15_ADC_INT_BIAS_SHIFT); + snd_soc_update_bits(codec, CS47L15_PGA_BIAS_SEL, + CS47L15_PGA_BIAS_SEL_MASK, + 3 << CS47L15_PGA_BIAS_SEL_SHIFT); + cs47l15->in1_lp_mode = true; + break; + } + + return 0; +} + static const struct snd_kcontrol_new cs47l15_snd_controls[] = { SOC_VALUE_ENUM("IN1 OSR", clearwater_in_dmic_osr[0]), SOC_VALUE_ENUM("IN2 OSR", clearwater_in_dmic_osr[1]), @@ -809,6 +865,10 @@ SOC_ENUM_EXT("IN1L Rate", moon_input_rate[0], snd_soc_get_enum_double, moon_in_rate_put), SOC_ENUM_EXT("IN1R Rate", moon_input_rate[1], snd_soc_get_enum_double, moon_in_rate_put), + +SOC_SINGLE_BOOL_EXT("IN1 LP Mode Switch", 0, + cs47l15_in1_adc_get, cs47l15_in1_adc_put), + SOC_ENUM_EXT("IN2L Rate", moon_input_rate[2], snd_soc_get_enum_double, moon_in_rate_put), SOC_ENUM_EXT("IN2R Rate", moon_input_rate[3], From 82e63802994d5244e87af3d8203c831d9fa89358 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Fri, 9 Sep 2016 15:20:51 +0100 Subject: [PATCH 1165/1167] mfd: cs47l15: Fix incorrect register defaults Update the register defaults for patched registers to be the patch value. Change-Id: If509efff07580345123758521e7cd654603c28a3 Signed-off-by: Richard Fitzgerald --- drivers/mfd/cs47l15-tables.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/cs47l15-tables.c b/drivers/mfd/cs47l15-tables.c index 211dfe2abdd..349da41b919 100644 --- a/drivers/mfd/cs47l15-tables.c +++ b/drivers/mfd/cs47l15-tables.c @@ -230,7 +230,7 @@ static const struct reg_default cs47l15_reg_default[] = { { 0x00000311, 0x0180 }, /* R785 (0x000311) - ADC_DIGITAL_VOLUME_1L */ { 0x00000312, 0x0500 }, /* R786 (0x000312) - DMIC1L_CONTROL */ { 0x00000313, 0x0000 }, /* R787 (0x000313) - IN1L_RATE_CONTROL */ - { 0x00000314, 0x0080 }, /* R788 (0x000314) - IN1R_CONTROL */ + { 0x00000314, 0x0081 }, /* R788 (0x000314) - IN1R_CONTROL */ { 0x00000315, 0x0180 }, /* R789 (0x000315) - ADC_DIGITAL_VOLUME_1R */ { 0x00000316, 0x0000 }, /* R790 (0x000316) - DMIC1R_CONTROL */ { 0x00000317, 0x0000 }, /* R791 (0x000317) - IN1R_RATE_CONTROL */ @@ -271,8 +271,8 @@ static const struct reg_default cs47l15_reg_default[] = { { 0x00000490, 0x0069 }, /* R1168 (0x000490) - PDM_SPK1_CTRL_1 */ { 0x00000491, 0x0000 }, /* R1169 (0x000491) - PDM_SPK1_CTRL_2 */ { 0x000004A0, 0x3080 }, /* R1184 (0x0004A0) - HP1 Short Circuit Ctrl */ - { 0x000004A8, 0x7120 }, /* R1192 (0x0004A8) - HP Test Ctrl 5 */ - { 0x000004A9, 0x7120 }, /* R1193 (0x0004A9) - HP Test Ctrl 6 */ + { 0x000004A8, 0x6020 }, /* R1192 (0x0004A8) - HP Test Ctrl 5 */ + { 0x000004A9, 0x6020 }, /* R1193 (0x0004A9) - HP Test Ctrl 6 */ { 0x00000500, 0x000C }, /* R1280 (0x000500) - AIF1_BCLK_CTRL */ { 0x00000501, 0x0000 }, /* R1281 (0x000501) - AIF1_TX_PIN_CTRL */ { 0x00000502, 0x0000 }, /* R1282 (0x000502) - AIF1_RX_PIN_CTRL */ From d666d6f34aa2ca2b9d8061dc66e6abb0e150c7cf Mon Sep 17 00:00:00 2001 From: Jaswinder Jassal Date: Fri, 9 Sep 2016 18:24:17 +0100 Subject: [PATCH 1166/1167] mfd: cs47l15: Fix an update made to patch file Change-Id: I4592d3ba6521d6ad714ced9df05b2e92d3e2f41e Signed-off-by: Jaswinder Jassal --- drivers/mfd/cs47l15-tables.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/cs47l15-tables.c b/drivers/mfd/cs47l15-tables.c index 349da41b919..0746578f047 100644 --- a/drivers/mfd/cs47l15-tables.c +++ b/drivers/mfd/cs47l15-tables.c @@ -21,7 +21,7 @@ static const struct reg_default cs47l15_reva_16_patch[] = { { 0x8C, 0x5555 }, { 0x8C, 0xAAAA }, - { 0x314, 0x0081 }, + { 0x314, 0x0080 }, { 0x4D4, 0x0008 }, { 0x4CF, 0x0F00 }, { 0x4A8, 0x6020 }, @@ -230,7 +230,7 @@ static const struct reg_default cs47l15_reg_default[] = { { 0x00000311, 0x0180 }, /* R785 (0x000311) - ADC_DIGITAL_VOLUME_1L */ { 0x00000312, 0x0500 }, /* R786 (0x000312) - DMIC1L_CONTROL */ { 0x00000313, 0x0000 }, /* R787 (0x000313) - IN1L_RATE_CONTROL */ - { 0x00000314, 0x0081 }, /* R788 (0x000314) - IN1R_CONTROL */ + { 0x00000314, 0x0080 }, /* R788 (0x000314) - IN1R_CONTROL */ { 0x00000315, 0x0180 }, /* R789 (0x000315) - ADC_DIGITAL_VOLUME_1R */ { 0x00000316, 0x0000 }, /* R790 (0x000316) - DMIC1R_CONTROL */ { 0x00000317, 0x0000 }, /* R791 (0x000317) - IN1R_RATE_CONTROL */ From b9eae6bbe0613cb6e93b5f791a4fca0ca8904d31 Mon Sep 17 00:00:00 2001 From: Stuart Henderson Date: Wed, 31 Aug 2016 15:28:21 +0100 Subject: [PATCH 1167/1167] mfd: arizona: Make write sequencer control registers volatile These registers contain volatile fields and also should never be written back to hardware as this could trigger a write sequence. Change-Id: Ib40cad212f6359f95f41b6dba780079377fcad61 Signed-off-by: Stuart Henderson --- drivers/mfd/clearwater-tables.c | 6 +++--- drivers/mfd/cs47l15-tables.c | 6 +++--- drivers/mfd/marley-tables.c | 6 +++--- drivers/mfd/moon-tables.c | 6 +++--- 4 files changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/mfd/clearwater-tables.c b/drivers/mfd/clearwater-tables.c index 48a49318003..b08c3830df2 100644 --- a/drivers/mfd/clearwater-tables.c +++ b/drivers/mfd/clearwater-tables.c @@ -449,9 +449,6 @@ static const struct reg_default clearwater_reg_default[] = { { 0x00000008, 0x0309 }, /* R8 - Ctrl IF CFG 1 */ { 0x00000009, 0x0200 }, /* R9 - Ctrl IF CFG 2 */ { 0x0000000A, 0x0309 }, /* R10 - Ctrl IF CFG 3 */ - { 0x00000016, 0x0000 }, /* R22 (0x16) - Write Sequencer Ctrl 0 */ - { 0x00000017, 0x0000 }, /* R23 (0x17) - Write Sequencer Ctrl 1 */ - { 0x00000018, 0x0000 }, /* R24 (0x18) - Write Sequencer Ctrl 2 */ { 0x00000020, 0x0000 }, /* R32 (0x20) - Tone Generator 1 */ { 0x00000021, 0x1000 }, /* R33 (0x21) - Tone Generator 2 */ { 0x00000022, 0x0000 }, /* R34 (0x22) - Tone Generator 3 */ @@ -3159,6 +3156,9 @@ static bool clearwater_16bit_volatile_register(struct device *dev, unsigned int case 0x2C2: case ARIZONA_SOFTWARE_RESET: case ARIZONA_DEVICE_REVISION: + case ARIZONA_WRITE_SEQUENCER_CTRL_0: + case ARIZONA_WRITE_SEQUENCER_CTRL_1: + case ARIZONA_WRITE_SEQUENCER_CTRL_2: case ARIZONA_HAPTICS_STATUS: case ARIZONA_SAMPLE_RATE_1_STATUS: case ARIZONA_SAMPLE_RATE_2_STATUS: diff --git a/drivers/mfd/cs47l15-tables.c b/drivers/mfd/cs47l15-tables.c index 0746578f047..13321bb4aa9 100644 --- a/drivers/mfd/cs47l15-tables.c +++ b/drivers/mfd/cs47l15-tables.c @@ -134,9 +134,6 @@ EXPORT_SYMBOL_GPL(cs47l15_irq); static const struct reg_default cs47l15_reg_default[] = { { 0x00000008, 0x373B }, /* R8 (0x000008) - CTRL_IF_CFG_1 */ - { 0x00000016, 0x0000 }, /* R22 (0x000016) - WRITE_SEQUENCER_CTRL_0 */ - { 0x00000017, 0x0000 }, /* R23 (0x000017) - WRITE_SEQUENCER_CTRL_1 */ - { 0x00000018, 0x0000 }, /* R24 (0x000018) - WRITE_SEQUENCER_CTRL_2 */ { 0x00000020, 0x0000 }, /* R32 (0x000020) - TONE_GENERATOR_1 */ { 0x00000021, 0x1000 }, /* R33 (0x000021) - TONE_GENERATOR_2 */ { 0x00000022, 0x0000 }, /* R34 (0x000022) - TONE_GENERATOR_3 */ @@ -1583,6 +1580,9 @@ static bool cs47l15_16bit_volatile_register(struct device *dev, unsigned int reg switch (reg) { case ARIZONA_SOFTWARE_RESET: case ARIZONA_DEVICE_REVISION: + case ARIZONA_WRITE_SEQUENCER_CTRL_0: + case ARIZONA_WRITE_SEQUENCER_CTRL_1: + case ARIZONA_WRITE_SEQUENCER_CTRL_2: case ARIZONA_HAPTICS_STATUS: case ARIZONA_SAMPLE_RATE_1_STATUS: case ARIZONA_SAMPLE_RATE_2_STATUS: diff --git a/drivers/mfd/marley-tables.c b/drivers/mfd/marley-tables.c index 7b7f8539d99..cb6fa7aa38f 100644 --- a/drivers/mfd/marley-tables.c +++ b/drivers/mfd/marley-tables.c @@ -161,9 +161,6 @@ EXPORT_SYMBOL_GPL(marley_irq); static const struct reg_default marley_reg_default[] = { { 0x00000008, 0x0308 }, /* R8 (0x8) - Ctrl IF CFG 1 */ { 0x00000009, 0x0200 }, /* R9 (0x9) - Ctrl IF CFG 2 */ - { 0x00000016, 0x0000 }, /* R22 (0x16) - Write Sequencer Ctrl 0 */ - { 0x00000017, 0x0000 }, /* R23 (0x17) - Write Sequencer Ctrl 1 */ - { 0x00000018, 0x0000 }, /* R24 (0x18) - Write Sequencer Ctrl 2 */ { 0x00000020, 0x0000 }, /* R32 (0x20) - Tone Generator 1 */ { 0x00000021, 0x1000 }, /* R33 (0x21) - Tone Generator 2 */ { 0x00000022, 0x0000 }, /* R34 (0x22) - Tone Generator 3 */ @@ -1768,6 +1765,9 @@ static bool marley_16bit_volatile_register(struct device *dev, unsigned int reg) switch (reg) { case ARIZONA_SOFTWARE_RESET: case ARIZONA_DEVICE_REVISION: + case ARIZONA_WRITE_SEQUENCER_CTRL_0: + case ARIZONA_WRITE_SEQUENCER_CTRL_1: + case ARIZONA_WRITE_SEQUENCER_CTRL_2: case ARIZONA_HAPTICS_STATUS: case ARIZONA_SAMPLE_RATE_1_STATUS: case ARIZONA_SAMPLE_RATE_2_STATUS: diff --git a/drivers/mfd/moon-tables.c b/drivers/mfd/moon-tables.c index 5d8455ae18f..e402866998b 100644 --- a/drivers/mfd/moon-tables.c +++ b/drivers/mfd/moon-tables.c @@ -181,9 +181,6 @@ static const struct reg_default moon_reg_default[] = { { 0x00000008, 0x0308 }, /* R8 - Ctrl IF CFG 1 */ { 0x00000009, 0x0200 }, /* R9 - Ctrl IF CFG 2 */ { 0x0000000A, 0x0308 }, /* R10 - Ctrl IF CFG 3 */ - { 0x00000016, 0x0000 }, /* R22 (0x16) - Write Sequencer Ctrl 0 */ - { 0x00000017, 0x0000 }, /* R23 (0x17) - Write Sequencer Ctrl 1 */ - { 0x00000018, 0x0000 }, /* R24 (0x18) - Write Sequencer Ctrl 2 */ { 0x00000020, 0x0000 }, /* R32 (0x20) - Tone Generator 1 */ { 0x00000021, 0x1000 }, /* R33 (0x21) - Tone Generator 2 */ { 0x00000022, 0x0000 }, /* R34 (0x22) - Tone Generator 3 */ @@ -2855,6 +2852,9 @@ static bool moon_16bit_volatile_register(struct device *dev, unsigned int reg) switch (reg) { case ARIZONA_SOFTWARE_RESET: case ARIZONA_DEVICE_REVISION: + case ARIZONA_WRITE_SEQUENCER_CTRL_0: + case ARIZONA_WRITE_SEQUENCER_CTRL_1: + case ARIZONA_WRITE_SEQUENCER_CTRL_2: case ARIZONA_HAPTICS_STATUS: case ARIZONA_SAMPLE_RATE_1_STATUS: case ARIZONA_SAMPLE_RATE_2_STATUS: