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beamforming3D_GPU_cuda.ptx
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beamforming3D_GPU_cuda.ptx
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//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31057947
// Cuda compilation tools, release 11.6, V11.6.124
// Based on NVVM 7.0.1
//
.version 7.6
.target sm_52
.address_size 64
// .globl _Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6_
.const .align 4 .f32 invSpeedOfSound;
.const .align 4 .u32 xPixLen;
.const .align 4 .u32 yPixLen;
.const .align 4 .u32 zPixLen;
.const .align 4 .u32 xPiezoLen;
.const .align 4 .u32 yPiezoLen;
.const .align 4 .u32 receiveLen;
.const .align 4 .f32 freq;
.const .align 4 .f32 pi;
.const .align 4 .u32 sampleDim;
.const .align 4 .f32 sensCutoff;
.const .align 4 .b8 elementSens[404];
.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
.visible .entry _Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6_(
.param .u64 _Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_0,
.param .u64 _Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_1,
.param .u64 _Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_2,
.param .u64 _Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_3,
.param .u64 _Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_4,
.param .u64 _Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_5,
.param .u64 _Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_6,
.param .u64 _Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_7,
.param .u64 _Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_8,
.param .u64 _Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_9,
.param .u64 _Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_10,
.param .u64 _Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_11,
.param .u64 _Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_12
)
{
.local .align 4 .b8 __local_depot0[28];
.reg .b64 %SP;
.reg .b64 %SPL;
.reg .pred %p<62>;
.reg .b16 %rs<3>;
.reg .f32 %f<243>;
.reg .b32 %r<248>;
.reg .f64 %fd<5>;
.reg .b64 %rd<162>;
mov.u64 %SPL, __local_depot0;
ld.param.u64 %rd41, [_Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_0];
ld.param.u64 %rd42, [_Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_1];
ld.param.u64 %rd43, [_Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_2];
ld.param.u64 %rd44, [_Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_3];
ld.param.u64 %rd45, [_Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_4];
ld.param.u64 %rd52, [_Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_5];
ld.param.u64 %rd53, [_Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_6];
ld.param.u64 %rd46, [_Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_7];
ld.param.u64 %rd47, [_Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_8];
ld.param.u64 %rd48, [_Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_9];
ld.param.u64 %rd49, [_Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_10];
cvta.to.global.u64 %rd1, %rd53;
cvta.to.global.u64 %rd2, %rd52;
add.u64 %rd3, %SPL, 0;
mov.u32 %r82, %ntid.x;
mov.u32 %r83, %ctaid.x;
mov.u32 %r84, %tid.x;
mad.lo.s32 %r1, %r83, %r82, %r84;
mov.u32 %r85, %ntid.y;
mov.u32 %r86, %ctaid.y;
mov.u32 %r87, %tid.y;
mad.lo.s32 %r2, %r86, %r85, %r87;
mov.u32 %r88, %ntid.z;
mov.u32 %r89, %ctaid.z;
mov.u32 %r90, %tid.z;
mad.lo.s32 %r3, %r89, %r88, %r90;
ld.const.u32 %r4, [xPixLen];
setp.ge.u32 %p1, %r1, %r4;
ld.const.u32 %r5, [yPixLen];
setp.ge.u32 %p2, %r2, %r5;
or.pred %p3, %p1, %p2;
ld.const.u32 %r91, [zPixLen];
setp.ge.u32 %p4, %r3, %r91;
or.pred %p5, %p3, %p4;
ld.const.u32 %r6, [receiveLen];
setp.lt.s32 %p6, %r6, 1;
or.pred %p7, %p5, %p6;
@%p7 bra $L__BB0_50;
cvta.to.global.u64 %rd55, %rd41;
cvta.to.global.u64 %rd4, %rd42;
cvta.to.global.u64 %rd56, %rd43;
mul.wide.u32 %rd57, %r1, 4;
add.s64 %rd5, %rd56, %rd57;
cvta.to.global.u64 %rd58, %rd44;
mul.wide.u32 %rd59, %r2, 4;
add.s64 %rd6, %rd58, %rd59;
cvta.to.global.u64 %rd60, %rd45;
mul.wide.u32 %rd61, %r3, 4;
add.s64 %rd7, %rd60, %rd61;
ld.const.f32 %f42, [pi];
mul.f32 %f2, %f42, 0f3F000000;
div.rn.f32 %f3, %f42, 0f42C80000;
add.f32 %f6, %f42, %f42;
mad.lo.s32 %r93, %r5, %r3, %r2;
mul.lo.s32 %r94, %r93, %r4;
not.b32 %r95, %r1;
add.s32 %r96, %r4, %r95;
add.s32 %r97, %r96, %r94;
mul.wide.u32 %rd62, %r97, 8;
add.s64 %rd8, %rd55, %rd62;
add.s32 %r98, %r94, %r1;
mul.wide.u32 %rd63, %r98, 8;
add.s64 %rd9, %rd55, %rd63;
ld.const.u32 %r8, [xPiezoLen];
add.s32 %r9, %r8, -1;
and.b32 %r10, %r8, 3;
sub.s32 %r11, %r8, %r10;
cvta.to.global.u64 %rd10, %rd46;
cvta.to.global.u64 %rd11, %rd47;
cvta.to.global.u64 %rd12, %rd48;
cvta.to.global.u64 %rd13, %rd49;
mov.u32 %r231, 0;
setp.lt.s32 %p8, %r8, 1;
setp.lt.u32 %p14, %r9, 3;
setp.eq.s32 %p20, %r10, 0;
$L__BB0_2:
cvt.s64.s32 %rd16, %r231;
@%p8 bra $L__BB0_49;
shl.b64 %rd64, %rd16, 2;
add.s64 %rd65, %rd10, %rd64;
ld.global.nc.u32 %r100, [%rd65];
add.s64 %rd66, %rd12, %rd64;
ld.global.nc.u32 %r101, [%rd66];
mul.wide.u32 %rd67, %r100, 4;
add.s64 %rd68, %rd11, %rd67;
ld.global.nc.u32 %r103, [%rd68];
shl.b32 %r18, %r100, 10;
mov.u32 %r232, 0;
$L__BB0_4:
shl.b32 %r217, %r101, 3;
setp.eq.s32 %p9, %r217, 0;
@%p9 bra $L__BB0_48;
shl.b32 %r219, %r101, 3;
add.s32 %r233, %r219, -8;
mul.wide.s32 %rd71, %r232, 4;
add.s64 %rd72, %rd2, %rd71;
ld.global.nc.f32 %f7, [%rd5];
ld.global.nc.f32 %f8, [%rd72];
ld.global.nc.f32 %f9, [%rd6];
ld.global.nc.f32 %f10, [%rd7];
$L__BB0_6:
mul.f32 %f234, %f10, %f10;
sub.f32 %f43, %f7, %f8;
mul.wide.s32 %rd73, %r233, 4;
add.s64 %rd74, %rd1, %rd73;
ld.global.nc.f32 %f44, [%rd74];
sub.f32 %f45, %f9, %f44;
mul.f32 %f46, %f45, %f45;
fma.rn.f32 %f47, %f43, %f43, %f46;
add.f32 %f12, %f234, %f47;
sqrt.rn.f32 %f48, %f47;
div.rn.f32 %f13, %f48, %f10;
abs.f32 %f14, %f13;
setp.leu.f32 %p10, %f14, 0f3F800000;
mov.f32 %f236, %f14;
@%p10 bra $L__BB0_8;
rcp.rn.f32 %f236, %f14;
$L__BB0_8:
ld.const.f32 %f235, [sensCutoff];
mul.rn.f32 %f49, %f236, %f236;
mov.f32 %f50, 0fC0B59883;
mov.f32 %f51, 0fBF52C7EA;
fma.rn.f32 %f52, %f49, %f51, %f50;
mov.f32 %f53, 0fC0D21907;
fma.rn.f32 %f54, %f52, %f49, %f53;
mul.f32 %f55, %f49, %f54;
mul.f32 %f56, %f236, %f55;
add.f32 %f57, %f49, 0f41355DC0;
mov.f32 %f58, 0f41E6BD60;
fma.rn.f32 %f59, %f57, %f49, %f58;
mov.f32 %f60, 0f419D92C8;
fma.rn.f32 %f61, %f59, %f49, %f60;
rcp.rn.f32 %f62, %f61;
fma.rn.f32 %f63, %f56, %f62, %f236;
mov.f32 %f64, 0f3FC90FDB;
sub.f32 %f65, %f64, %f63;
setp.gt.f32 %p11, %f14, 0f3F800000;
selp.f32 %f66, %f65, %f63, %p11;
mov.b32 %r104, %f66;
mov.b32 %r105, %f13;
and.b32 %r106, %r105, -2147483648;
or.b32 %r107, %r106, %r104;
mov.b32 %f67, %r107;
setp.le.f32 %p12, %f14, 0f7F800000;
selp.f32 %f68, %f67, %f66, %p12;
add.f32 %f69, %f2, %f68;
div.rn.f32 %f70, %f69, %f3;
mov.b32 %r108, %f70;
and.b32 %r109, %r108, -2147483648;
or.b32 %r110, %r109, 1056964608;
mov.b32 %f71, %r110;
add.rz.f32 %f72, %f70, %f71;
cvt.rzi.f32.f32 %f73, %f72;
cvt.rzi.u32.f32 %r111, %f73;
mul.wide.u32 %rd75, %r111, 4;
mov.u64 %rd76, elementSens;
add.s64 %rd77, %rd76, %rd75;
ld.const.f32 %f74, [%rd77];
setp.ltu.f32 %p13, %f74, %f235;
@%p13 bra $L__BB0_47;
mov.u32 %r238, 0;
mov.u32 %r240, %r238;
@%p14 bra $L__BB0_12;
mov.u64 %rd154, %rd2;
mov.u32 %r236, %r11;
$L__BB0_11:
ld.global.nc.f32 %f75, [%rd154];
sub.f32 %f76, %f7, %f75;
abs.f32 %f77, %f76;
mul.wide.s32 %rd78, %r240, 4;
add.s64 %rd79, %rd2, %rd78;
ld.global.nc.f32 %f78, [%rd79];
sub.f32 %f79, %f7, %f78;
abs.f32 %f80, %f79;
setp.lt.f32 %p15, %f77, %f80;
selp.b32 %r117, %r238, %r240, %p15;
ld.global.nc.f32 %f81, [%rd154+4];
sub.f32 %f82, %f7, %f81;
abs.f32 %f83, %f82;
mul.wide.s32 %rd80, %r117, 4;
add.s64 %rd81, %rd2, %rd80;
ld.global.nc.f32 %f84, [%rd81];
sub.f32 %f85, %f7, %f84;
abs.f32 %f86, %f85;
setp.lt.f32 %p16, %f83, %f86;
add.s32 %r118, %r238, 1;
selp.b32 %r119, %r118, %r117, %p16;
ld.global.nc.f32 %f87, [%rd154+8];
sub.f32 %f88, %f7, %f87;
abs.f32 %f89, %f88;
mul.wide.s32 %rd82, %r119, 4;
add.s64 %rd83, %rd2, %rd82;
ld.global.nc.f32 %f90, [%rd83];
sub.f32 %f91, %f7, %f90;
abs.f32 %f92, %f91;
setp.lt.f32 %p17, %f89, %f92;
add.s32 %r120, %r238, 2;
selp.b32 %r121, %r120, %r119, %p17;
ld.global.nc.f32 %f93, [%rd154+12];
sub.f32 %f94, %f7, %f93;
abs.f32 %f95, %f94;
mul.wide.s32 %rd84, %r121, 4;
add.s64 %rd85, %rd2, %rd84;
ld.global.nc.f32 %f96, [%rd85];
sub.f32 %f97, %f7, %f96;
abs.f32 %f98, %f97;
setp.lt.f32 %p18, %f95, %f98;
add.s32 %r122, %r238, 3;
selp.b32 %r240, %r122, %r121, %p18;
add.s32 %r238, %r238, 4;
add.s64 %rd154, %rd154, 16;
add.s32 %r236, %r236, -4;
setp.ne.s32 %p19, %r236, 0;
@%p19 bra $L__BB0_11;
$L__BB0_12:
@%p20 bra $L__BB0_16;
setp.eq.s32 %p21, %r10, 1;
mul.wide.s32 %rd86, %r238, 4;
add.s64 %rd23, %rd2, %rd86;
ld.global.nc.f32 %f99, [%rd23];
sub.f32 %f100, %f7, %f99;
abs.f32 %f101, %f100;
mul.wide.s32 %rd87, %r240, 4;
add.s64 %rd88, %rd2, %rd87;
ld.global.nc.f32 %f102, [%rd88];
sub.f32 %f103, %f7, %f102;
abs.f32 %f104, %f103;
setp.lt.f32 %p22, %f101, %f104;
selp.b32 %r240, %r238, %r240, %p22;
@%p21 bra $L__BB0_16;
setp.eq.s32 %p23, %r10, 2;
ld.global.nc.f32 %f105, [%rd23+4];
sub.f32 %f106, %f7, %f105;
abs.f32 %f107, %f106;
mul.wide.s32 %rd89, %r240, 4;
add.s64 %rd90, %rd2, %rd89;
ld.global.nc.f32 %f108, [%rd90];
sub.f32 %f109, %f7, %f108;
abs.f32 %f110, %f109;
setp.lt.f32 %p24, %f107, %f110;
add.s32 %r123, %r238, 1;
selp.b32 %r240, %r123, %r240, %p24;
@%p23 bra $L__BB0_16;
ld.global.nc.f32 %f111, [%rd23+8];
sub.f32 %f112, %f7, %f111;
abs.f32 %f113, %f112;
mul.wide.s32 %rd91, %r240, 4;
add.s64 %rd92, %rd2, %rd91;
ld.global.nc.f32 %f114, [%rd92];
sub.f32 %f115, %f7, %f114;
abs.f32 %f116, %f115;
setp.lt.f32 %p25, %f113, %f116;
add.s32 %r124, %r238, 2;
selp.b32 %r240, %r124, %r240, %p25;
$L__BB0_16:
shl.b32 %r221, %r103, 3;
add.s32 %r241, %r221, -8;
mul.wide.s32 %rd151, %r241, 4;
add.s64 %rd155, %rd1, %rd151;
setp.eq.s32 %p26, %r221, 0;
@%p26 bra $L__BB0_18;
shl.b32 %r230, %r103, 3;
add.s32 %r229, %r230, -1;
add.s32 %r228, %r230, -2;
add.s32 %r227, %r230, -3;
add.s32 %r226, %r230, -4;
add.s32 %r225, %r230, -5;
add.s32 %r224, %r230, -6;
add.s32 %r223, %r230, -8;
add.s32 %r222, %r230, -7;
mul.wide.s32 %rd153, %r230, 4;
add.s64 %rd152, %rd1, %rd153;
ld.global.nc.f32 %f117, [%rd152+-28];
sub.f32 %f118, %f9, %f117;
abs.f32 %f119, %f118;
ld.global.nc.f32 %f120, [%rd152+-32];
sub.f32 %f121, %f9, %f120;
abs.f32 %f122, %f121;
setp.lt.f32 %p27, %f119, %f122;
selp.b32 %r125, %r222, %r223, %p27;
mul.wide.s32 %rd93, %r125, 4;
add.s64 %rd94, %rd1, %rd93;
ld.global.nc.f32 %f123, [%rd152+-24];
sub.f32 %f124, %f9, %f123;
abs.f32 %f125, %f124;
ld.global.nc.f32 %f126, [%rd94];
sub.f32 %f127, %f9, %f126;
abs.f32 %f128, %f127;
setp.lt.f32 %p28, %f125, %f128;
selp.b32 %r126, %r224, %r125, %p28;
mul.wide.s32 %rd95, %r126, 4;
add.s64 %rd96, %rd1, %rd95;
ld.global.nc.f32 %f129, [%rd152+-20];
sub.f32 %f130, %f9, %f129;
abs.f32 %f131, %f130;
ld.global.nc.f32 %f132, [%rd96];
sub.f32 %f133, %f9, %f132;
abs.f32 %f134, %f133;
setp.lt.f32 %p29, %f131, %f134;
selp.b32 %r127, %r225, %r126, %p29;
mul.wide.s32 %rd97, %r127, 4;
add.s64 %rd98, %rd1, %rd97;
ld.global.nc.f32 %f135, [%rd152+-16];
sub.f32 %f136, %f9, %f135;
abs.f32 %f137, %f136;
ld.global.nc.f32 %f138, [%rd98];
sub.f32 %f139, %f9, %f138;
abs.f32 %f140, %f139;
setp.lt.f32 %p30, %f137, %f140;
selp.b32 %r128, %r226, %r127, %p30;
mul.wide.s32 %rd99, %r128, 4;
add.s64 %rd100, %rd1, %rd99;
ld.global.nc.f32 %f141, [%rd152+-12];
sub.f32 %f142, %f9, %f141;
abs.f32 %f143, %f142;
ld.global.nc.f32 %f144, [%rd100];
sub.f32 %f145, %f9, %f144;
abs.f32 %f146, %f145;
setp.lt.f32 %p31, %f143, %f146;
selp.b32 %r129, %r227, %r128, %p31;
mul.wide.s32 %rd101, %r129, 4;
add.s64 %rd102, %rd1, %rd101;
ld.global.nc.f32 %f147, [%rd152+-8];
sub.f32 %f148, %f9, %f147;
abs.f32 %f149, %f148;
ld.global.nc.f32 %f150, [%rd102];
sub.f32 %f151, %f9, %f150;
abs.f32 %f152, %f151;
setp.lt.f32 %p32, %f149, %f152;
selp.b32 %r130, %r228, %r129, %p32;
mul.wide.s32 %rd103, %r130, 4;
add.s64 %rd104, %rd1, %rd103;
ld.global.nc.f32 %f153, [%rd152+-4];
sub.f32 %f154, %f9, %f153;
abs.f32 %f155, %f154;
ld.global.nc.f32 %f156, [%rd104];
sub.f32 %f157, %f9, %f156;
abs.f32 %f158, %f157;
setp.lt.f32 %p33, %f155, %f158;
selp.b32 %r241, %r229, %r130, %p33;
mul.wide.s32 %rd105, %r241, 4;
add.s64 %rd155, %rd1, %rd105;
$L__BB0_18:
ld.param.u64 %rd145, [_Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_11];
shl.b64 %rd144, %rd16, 2;
cvta.to.global.u64 %rd143, %rd145;
add.s64 %rd142, %rd143, %rd144;
ld.const.f32 %f233, [freq];
ld.const.f32 %f232, [invSpeedOfSound];
mul.f32 %f231, %f10, %f10;
mul.wide.s32 %rd106, %r240, 4;
add.s64 %rd107, %rd2, %rd106;
ld.global.nc.f32 %f159, [%rd107];
sub.f32 %f160, %f7, %f159;
ld.global.nc.f32 %f161, [%rd155];
sub.f32 %f162, %f9, %f161;
mul.f32 %f163, %f162, %f162;
fma.rn.f32 %f164, %f160, %f160, %f163;
add.f32 %f165, %f231, %f164;
sqrt.rn.f32 %f166, %f165;
mul.f32 %f167, %f166, %f232;
add.s32 %r131, %r240, %r18;
shl.b32 %r132, %r241, 5;
add.s32 %r133, %r131, %r132;
mul.wide.u32 %rd108, %r133, 4;
add.s64 %rd109, %rd13, %rd108;
ld.global.nc.f32 %f168, [%rd109];
div.rn.f32 %f169, %f168, %f233;
sqrt.rn.f32 %f170, %f12;
fma.rn.f32 %f171, %f170, %f232, %f167;
add.f32 %f172, %f171, %f169;
ld.global.nc.u32 %r134, [%rd142];
cvt.rn.f32.s32 %f173, %r134;
mul.f32 %f174, %f172, %f233;
fma.rn.f32 %f175, %f172, %f233, %f174;
cvt.rmi.f32.f32 %f176, %f175;
add.f32 %f177, %f176, %f173;
cvt.rzi.u32.f32 %r45, %f177;
mul.f32 %f178, %f172, %f6;
mul.f32 %f17, %f233, %f178;
setp.lt.u32 %p34, %r45, %r134;
@%p34 bra $L__BB0_47;
ld.param.u64 %rd149, [_Z22beamforming3D_GPU_cudaP6float2PKsPKfS4_S4_S4_S4_PKiS6_S6_S4_S6_S6__param_12];
shl.b64 %rd148, %rd16, 2;
cvta.to.global.u64 %rd147, %rd149;
add.s64 %rd146, %rd147, %rd148;
add.s32 %r46, %r45, 1;
ld.global.nc.u32 %r135, [%rd146];
setp.gt.u32 %p35, %r46, %r135;
@%p35 bra $L__BB0_47;
shl.b32 %r210, %r101, 3;
mov.u32 %r209, 8;
sub.s32 %r208, %r209, %r210;
ld.const.u32 %r207, [sampleDim];
add.s32 %r136, %r208, %r233;
shl.b32 %r137, %r136, 5;
add.s32 %r138, %r137, %r232;
mul.lo.s32 %r139, %r207, %r138;
add.s32 %r140, %r139, %r45;
mul.wide.u32 %rd110, %r140, 2;
add.s64 %rd111, %rd4, %rd110;
ld.global.nc.u16 %rs1, [%rd111];
add.s32 %r141, %r139, %r46;
mul.wide.u32 %rd112, %r141, 2;
add.s64 %rd113, %rd4, %rd112;
ld.global.nc.u16 %rs2, [%rd113];
mul.f32 %f179, %f17, 0f3F22F983;
cvt.rni.s32.f32 %r247, %f179;
cvt.rn.f32.s32 %f180, %r247;
mov.f32 %f181, 0fBFC90FDA;
fma.rn.f32 %f182, %f180, %f181, %f17;
mov.f32 %f183, 0fB3A22168;
fma.rn.f32 %f184, %f180, %f183, %f182;
mov.f32 %f185, 0fA7C234C5;
fma.rn.f32 %f240, %f180, %f185, %f184;
abs.f32 %f19, %f17;
setp.leu.f32 %p36, %f19, 0f47CE4780;
add.s64 %rd26, %rd3, 24;
mov.u32 %r244, %r247;
mov.f32 %f237, %f240;
@%p36 bra $L__BB0_28;
setp.eq.f32 %p37, %f19, 0f7F800000;
@%p37 bra $L__BB0_27;
bra.uni $L__BB0_22;
$L__BB0_27:
mov.f32 %f188, 0f00000000;
mul.rn.f32 %f237, %f17, %f188;
mov.u32 %r244, 0;
bra.uni $L__BB0_28;
$L__BB0_22:
mov.b32 %r48, %f17;
bfe.u32 %r142, %r48, 23, 8;
add.s32 %r49, %r142, -128;
shl.b32 %r143, %r48, 8;
or.b32 %r50, %r143, -2147483648;
shr.u32 %r51, %r49, 5;
mov.u64 %rd157, 0;
mov.u64 %rd156, %rd3;
mov.u64 %rd158, %rd157;
$L__BB0_23:
.pragma "nounroll";
shl.b64 %rd116, %rd157, 2;
mov.u64 %rd117, __cudart_i2opi_f;
add.s64 %rd118, %rd117, %rd116;
ld.global.nc.u32 %r144, [%rd118];
mad.wide.u32 %rd119, %r144, %r50, %rd158;
shr.u64 %rd158, %rd119, 32;
st.local.u32 [%rd156], %rd119;
cvt.u32.u64 %r145, %rd157;
add.s32 %r146, %r145, 1;
cvt.s64.s32 %rd157, %r146;
mul.wide.s32 %rd120, %r146, 4;
add.s64 %rd156, %rd3, %rd120;
setp.ne.s32 %p38, %r146, 6;
@%p38 bra $L__BB0_23;
st.local.u32 [%rd26], %rd158;
mov.u32 %r147, 4;
sub.s32 %r52, %r147, %r51;
mov.u32 %r148, 6;
sub.s32 %r149, %r148, %r51;
mul.wide.s32 %rd121, %r149, 4;
add.s64 %rd122, %rd3, %rd121;
ld.local.u32 %r242, [%rd122];
ld.local.u32 %r243, [%rd122+-4];
and.b32 %r55, %r49, 31;
setp.eq.s32 %p39, %r55, 0;
@%p39 bra $L__BB0_26;
mov.u32 %r150, 32;
sub.s32 %r151, %r150, %r55;
shr.u32 %r152, %r243, %r151;
shl.b32 %r153, %r242, %r55;
add.s32 %r242, %r152, %r153;
mul.wide.s32 %rd123, %r52, 4;
add.s64 %rd124, %rd3, %rd123;
ld.local.u32 %r154, [%rd124];
shr.u32 %r155, %r154, %r151;
shl.b32 %r156, %r243, %r55;
add.s32 %r243, %r155, %r156;
$L__BB0_26:
and.b32 %r157, %r48, -2147483648;
shr.u32 %r158, %r243, 30;
shl.b32 %r159, %r242, 2;
or.b32 %r160, %r158, %r159;
shr.u32 %r161, %r160, 31;
shr.u32 %r162, %r242, 30;
add.s32 %r163, %r161, %r162;
neg.s32 %r164, %r163;
setp.eq.s32 %p40, %r157, 0;
selp.b32 %r244, %r163, %r164, %p40;
setp.ne.s32 %p41, %r161, 0;
xor.b32 %r165, %r157, -2147483648;
selp.b32 %r166, %r165, %r157, %p41;
selp.b32 %r167, -1, 0, %p41;
xor.b32 %r168, %r160, %r167;
shl.b32 %r169, %r243, 2;
xor.b32 %r170, %r169, %r167;
cvt.u64.u32 %rd125, %r168;
cvt.u64.u32 %rd126, %r170;
bfi.b64 %rd127, %rd125, %rd126, 32, 32;
cvt.rn.f64.s64 %fd1, %rd127;
mul.f64 %fd2, %fd1, 0d3BF921FB54442D19;
cvt.rn.f32.f64 %f186, %fd2;
setp.eq.s32 %p42, %r166, 0;
neg.f32 %f187, %f186;
selp.f32 %f237, %f186, %f187, %p42;
$L__BB0_28:
add.s32 %r62, %r244, 1;
and.b32 %r63, %r62, 1;
setp.eq.s32 %p43, %r63, 0;
selp.f32 %f23, %f237, 0f3F800000, %p43;
mul.rn.f32 %f24, %f237, %f237;
mov.f32 %f238, 0fB94D4153;
@%p43 bra $L__BB0_30;
mov.f32 %f190, 0fBAB607ED;
mov.f32 %f191, 0f37CBAC00;
fma.rn.f32 %f238, %f191, %f24, %f190;
$L__BB0_30:
selp.f32 %f192, 0f3C0885E4, 0f3D2AAABB, %p43;
fma.rn.f32 %f193, %f238, %f24, %f192;
selp.f32 %f194, 0fBE2AAAA8, 0fBEFFFFFF, %p43;
fma.rn.f32 %f195, %f193, %f24, %f194;
mov.f32 %f196, 0f00000000;
fma.rn.f32 %f197, %f24, %f23, %f196;
fma.rn.f32 %f239, %f195, %f197, %f23;
and.b32 %r172, %r62, 2;
setp.eq.s32 %p45, %r172, 0;
@%p45 bra $L__BB0_32;
mov.f32 %f199, 0fBF800000;
fma.rn.f32 %f239, %f239, %f199, %f196;
$L__BB0_32:
@%p36 bra $L__BB0_40;
setp.eq.f32 %p47, %f19, 0f7F800000;
@%p47 bra $L__BB0_39;
bra.uni $L__BB0_34;
$L__BB0_39:
mul.rn.f32 %f240, %f17, %f196;
mov.u32 %r247, 0;
bra.uni $L__BB0_40;
$L__BB0_34:
mov.b32 %r64, %f17;
bfe.u32 %r173, %r64, 23, 8;
add.s32 %r65, %r173, -128;
shl.b32 %r174, %r64, 8;
or.b32 %r66, %r174, -2147483648;
shr.u32 %r67, %r65, 5;
mov.u64 %rd160, 0;
mov.u64 %rd159, %rd3;
mov.u64 %rd161, %rd160;
$L__BB0_35:
.pragma "nounroll";
shl.b64 %rd130, %rd160, 2;
mov.u64 %rd131, __cudart_i2opi_f;
add.s64 %rd132, %rd131, %rd130;
ld.global.nc.u32 %r175, [%rd132];
mad.wide.u32 %rd133, %r175, %r66, %rd161;
shr.u64 %rd161, %rd133, 32;
st.local.u32 [%rd159], %rd133;
cvt.u32.u64 %r176, %rd160;
add.s32 %r177, %r176, 1;
cvt.s64.s32 %rd160, %r177;
mul.wide.s32 %rd134, %r177, 4;
add.s64 %rd159, %rd3, %rd134;
setp.ne.s32 %p48, %r177, 6;
@%p48 bra $L__BB0_35;
st.local.u32 [%rd26], %rd161;
mov.u32 %r178, 4;
sub.s32 %r68, %r178, %r67;
mov.u32 %r179, 6;
sub.s32 %r180, %r179, %r67;
mul.wide.s32 %rd135, %r180, 4;
add.s64 %rd136, %rd3, %rd135;
ld.local.u32 %r245, [%rd136];
ld.local.u32 %r246, [%rd136+-4];
and.b32 %r71, %r65, 31;
setp.eq.s32 %p49, %r71, 0;
@%p49 bra $L__BB0_38;
mov.u32 %r181, 32;
sub.s32 %r182, %r181, %r71;
shr.u32 %r183, %r246, %r182;
shl.b32 %r184, %r245, %r71;
add.s32 %r245, %r183, %r184;
mul.wide.s32 %rd137, %r68, 4;
add.s64 %rd138, %rd3, %rd137;
ld.local.u32 %r185, [%rd138];
shr.u32 %r186, %r185, %r182;
shl.b32 %r187, %r246, %r71;
add.s32 %r246, %r186, %r187;
$L__BB0_38:
and.b32 %r188, %r64, -2147483648;
shr.u32 %r189, %r246, 30;
shl.b32 %r190, %r245, 2;
or.b32 %r191, %r189, %r190;
shr.u32 %r192, %r191, 31;
shr.u32 %r193, %r245, 30;
add.s32 %r194, %r192, %r193;
neg.s32 %r195, %r194;
setp.eq.s32 %p50, %r188, 0;
selp.b32 %r247, %r194, %r195, %p50;
setp.ne.s32 %p51, %r192, 0;
xor.b32 %r196, %r188, -2147483648;
selp.b32 %r197, %r196, %r188, %p51;
selp.b32 %r198, -1, 0, %p51;
xor.b32 %r199, %r191, %r198;
shl.b32 %r200, %r246, 2;
xor.b32 %r201, %r200, %r198;
cvt.u64.u32 %rd139, %r199;
cvt.u64.u32 %rd140, %r201;
bfi.b64 %rd141, %rd139, %rd140, 32, 32;
cvt.rn.f64.s64 %fd3, %rd141;
mul.f64 %fd4, %fd3, 0d3BF921FB54442D19;
cvt.rn.f32.f64 %f200, %fd4;
setp.eq.s32 %p52, %r197, 0;
neg.f32 %f201, %f200;
selp.f32 %f240, %f200, %f201, %p52;
$L__BB0_40:
and.b32 %r78, %r247, 1;
setp.eq.s32 %p53, %r78, 0;
selp.f32 %f33, %f240, 0f3F800000, %p53;
mul.rn.f32 %f34, %f240, %f240;
mov.f32 %f241, 0fB94D4153;
@%p53 bra $L__BB0_42;
mov.f32 %f204, 0fBAB607ED;
mov.f32 %f205, 0f37CBAC00;
fma.rn.f32 %f241, %f205, %f34, %f204;
$L__BB0_42:
selp.f32 %f206, 0f3C0885E4, 0f3D2AAABB, %p53;
fma.rn.f32 %f207, %f241, %f34, %f206;
selp.f32 %f208, 0fBE2AAAA8, 0fBEFFFFFF, %p53;
fma.rn.f32 %f209, %f207, %f34, %f208;
fma.rn.f32 %f211, %f34, %f33, %f196;
fma.rn.f32 %f242, %f209, %f211, %f33;
and.b32 %r203, %r247, 2;
setp.eq.s32 %p55, %r203, 0;
@%p55 bra $L__BB0_44;
mov.f32 %f213, 0fBF800000;
fma.rn.f32 %f242, %f242, %f213, %f196;
$L__BB0_44:
shl.b32 %r213, %r101, 3;
add.s32 %r212, %r213, -6;
add.s32 %r211, %r213, -2;
setp.lt.u32 %p56, %r233, %r211;
setp.ge.u32 %p57, %r233, %r212;
and.pred %p58, %p56, %p57;
cvt.rn.f32.s16 %f214, %rs1;
cvt.rn.f32.s16 %f215, %rs2;
mul.f32 %f216, %f242, %f215;
fma.rn.f32 %f40, %f239, %f214, %f216;
cvt.s32.s16 %r204, %rs1;
neg.s32 %r205, %r204;
cvt.rn.f32.s32 %f217, %r205;
mul.f32 %f218, %f242, %f217;
fma.rn.f32 %f41, %f239, %f215, %f218;
@%p58 bra $L__BB0_46;
bra.uni $L__BB0_45;
$L__BB0_46:
ld.global.v2.f32 {%f225, %f226}, [%rd8];
add.f32 %f229, %f41, %f226;
add.f32 %f230, %f40, %f225;
st.global.v2.f32 [%rd8], {%f230, %f229};
bra.uni $L__BB0_47;
$L__BB0_45:
ld.global.v2.f32 {%f219, %f220}, [%rd9];
add.f32 %f223, %f41, %f220;
add.f32 %f224, %f40, %f219;
st.global.v2.f32 [%rd9], {%f224, %f223};
$L__BB0_47:
shl.b32 %r214, %r101, 3;
add.s32 %r233, %r233, 1;
setp.lt.u32 %p59, %r233, %r214;
@%p59 bra $L__BB0_6;
$L__BB0_48:
ld.const.u32 %r215, [xPiezoLen];
add.s32 %r232, %r232, 1;
setp.lt.s32 %p60, %r232, %r215;
@%p60 bra $L__BB0_4;
$L__BB0_49:
ld.const.u32 %r216, [receiveLen];
cvt.u32.u64 %r206, %rd16;
add.s32 %r231, %r206, 1;
setp.lt.s32 %p61, %r231, %r216;
@%p61 bra $L__BB0_2;
$L__BB0_50:
ret;
}