-
Notifications
You must be signed in to change notification settings - Fork 0
/
stm32_svd-dmamux.ads
1019 lines (935 loc) · 35.1 KB
/
stm32_svd-dmamux.ads
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
pragma Style_Checks (Off);
-- This spec has been automatically generated from STM32L4R9.svd
pragma Restrictions (No_Elaboration_Code);
with HAL;
with System;
package STM32_SVD.DMAMUX is
pragma Preelaborate;
---------------
-- Registers --
---------------
subtype C0CR_DMAREQ_ID_Field is HAL.UInt7;
subtype C0CR_SPOL_Field is HAL.UInt2;
subtype C0CR_NBREQ_Field is HAL.UInt5;
subtype C0CR_SYNC_ID_Field is HAL.UInt5;
-- channel 0 configuration register
type C0CR_Register is record
DMAREQ_ID : C0CR_DMAREQ_ID_Field := 16#0#;
-- DMA request identification
Reserved_7_7 : HAL.Bit := 16#0#;
-- unspecified
SOIE : Boolean := False;
-- Synchronization overrun interrupt enable
EGE : Boolean := False;
-- Event generation enable
Reserved_10_15 : HAL.UInt6 := 16#0#;
-- unspecified
SE : Boolean := False;
-- Synchronization enable
SPOL : C0CR_SPOL_Field := 16#0#;
-- Synchronization polarity
NBREQ : C0CR_NBREQ_Field := 16#0#;
-- Number of DMA requests minus 1 to forward
SYNC_ID : C0CR_SYNC_ID_Field := 16#0#;
-- Synchronization identification
Reserved_29_31 : HAL.UInt3 := 16#0#;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C0CR_Register use record
DMAREQ_ID at 0 range 0 .. 6;
Reserved_7_7 at 0 range 7 .. 7;
SOIE at 0 range 8 .. 8;
EGE at 0 range 9 .. 9;
Reserved_10_15 at 0 range 10 .. 15;
SE at 0 range 16 .. 16;
SPOL at 0 range 17 .. 18;
NBREQ at 0 range 19 .. 23;
SYNC_ID at 0 range 24 .. 28;
Reserved_29_31 at 0 range 29 .. 31;
end record;
subtype C1CR_DMAREQ_ID_Field is HAL.UInt7;
subtype C1CR_SPOL_Field is HAL.UInt2;
subtype C1CR_NBREQ_Field is HAL.UInt5;
subtype C1CR_SYNC_ID_Field is HAL.UInt5;
-- channel 1 configuration register
type C1CR_Register is record
DMAREQ_ID : C1CR_DMAREQ_ID_Field := 16#0#;
-- DMA request identification
Reserved_7_7 : HAL.Bit := 16#0#;
-- unspecified
SOIE : Boolean := False;
-- Synchronization overrun interrupt enable
EGE : Boolean := False;
-- Event generation enable
Reserved_10_15 : HAL.UInt6 := 16#0#;
-- unspecified
SE : Boolean := False;
-- Synchronization enable
SPOL : C1CR_SPOL_Field := 16#0#;
-- Synchronization polarity
NBREQ : C1CR_NBREQ_Field := 16#0#;
-- Number of DMA requests minus 1 to forward
SYNC_ID : C1CR_SYNC_ID_Field := 16#0#;
-- Synchronization identification
Reserved_29_31 : HAL.UInt3 := 16#0#;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C1CR_Register use record
DMAREQ_ID at 0 range 0 .. 6;
Reserved_7_7 at 0 range 7 .. 7;
SOIE at 0 range 8 .. 8;
EGE at 0 range 9 .. 9;
Reserved_10_15 at 0 range 10 .. 15;
SE at 0 range 16 .. 16;
SPOL at 0 range 17 .. 18;
NBREQ at 0 range 19 .. 23;
SYNC_ID at 0 range 24 .. 28;
Reserved_29_31 at 0 range 29 .. 31;
end record;
subtype C2CR_DMAREQ_ID_Field is HAL.UInt7;
subtype C2CR_SPOL_Field is HAL.UInt2;
subtype C2CR_NBREQ_Field is HAL.UInt5;
subtype C2CR_SYNC_ID_Field is HAL.UInt5;
-- channel 2 configuration register
type C2CR_Register is record
DMAREQ_ID : C2CR_DMAREQ_ID_Field := 16#0#;
-- DMA request identification
Reserved_7_7 : HAL.Bit := 16#0#;
-- unspecified
SOIE : Boolean := False;
-- Synchronization overrun interrupt enable
EGE : Boolean := False;
-- Event generation enable
Reserved_10_15 : HAL.UInt6 := 16#0#;
-- unspecified
SE : Boolean := False;
-- Synchronization enable
SPOL : C2CR_SPOL_Field := 16#0#;
-- Synchronization polarity
NBREQ : C2CR_NBREQ_Field := 16#0#;
-- Number of DMA requests minus 1 to forward
SYNC_ID : C2CR_SYNC_ID_Field := 16#0#;
-- Synchronization identification
Reserved_29_31 : HAL.UInt3 := 16#0#;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C2CR_Register use record
DMAREQ_ID at 0 range 0 .. 6;
Reserved_7_7 at 0 range 7 .. 7;
SOIE at 0 range 8 .. 8;
EGE at 0 range 9 .. 9;
Reserved_10_15 at 0 range 10 .. 15;
SE at 0 range 16 .. 16;
SPOL at 0 range 17 .. 18;
NBREQ at 0 range 19 .. 23;
SYNC_ID at 0 range 24 .. 28;
Reserved_29_31 at 0 range 29 .. 31;
end record;
subtype C3CR_DMAREQ_ID_Field is HAL.UInt7;
subtype C3CR_SPOL_Field is HAL.UInt2;
subtype C3CR_NBREQ_Field is HAL.UInt5;
subtype C3CR_SYNC_ID_Field is HAL.UInt5;
-- channel 3 configuration register
type C3CR_Register is record
DMAREQ_ID : C3CR_DMAREQ_ID_Field := 16#0#;
-- DMA request identification
Reserved_7_7 : HAL.Bit := 16#0#;
-- unspecified
SOIE : Boolean := False;
-- Synchronization overrun interrupt enable
EGE : Boolean := False;
-- Event generation enable
Reserved_10_15 : HAL.UInt6 := 16#0#;
-- unspecified
SE : Boolean := False;
-- Synchronization enable
SPOL : C3CR_SPOL_Field := 16#0#;
-- Synchronization polarity
NBREQ : C3CR_NBREQ_Field := 16#0#;
-- Number of DMA requests minus 1 to forward
SYNC_ID : C3CR_SYNC_ID_Field := 16#0#;
-- Synchronization identification
Reserved_29_31 : HAL.UInt3 := 16#0#;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C3CR_Register use record
DMAREQ_ID at 0 range 0 .. 6;
Reserved_7_7 at 0 range 7 .. 7;
SOIE at 0 range 8 .. 8;
EGE at 0 range 9 .. 9;
Reserved_10_15 at 0 range 10 .. 15;
SE at 0 range 16 .. 16;
SPOL at 0 range 17 .. 18;
NBREQ at 0 range 19 .. 23;
SYNC_ID at 0 range 24 .. 28;
Reserved_29_31 at 0 range 29 .. 31;
end record;
subtype C4CR_DMAREQ_ID_Field is HAL.UInt7;
subtype C4CR_SPOL_Field is HAL.UInt2;
subtype C4CR_NBREQ_Field is HAL.UInt5;
subtype C4CR_SYNC_ID_Field is HAL.UInt5;
-- channel 4 configuration register
type C4CR_Register is record
DMAREQ_ID : C4CR_DMAREQ_ID_Field := 16#0#;
-- DMA request identification
Reserved_7_7 : HAL.Bit := 16#0#;
-- unspecified
SOIE : Boolean := False;
-- Synchronization overrun interrupt enable
EGE : Boolean := False;
-- Event generation enable
Reserved_10_15 : HAL.UInt6 := 16#0#;
-- unspecified
SE : Boolean := False;
-- Synchronization enable
SPOL : C4CR_SPOL_Field := 16#0#;
-- Synchronization polarity
NBREQ : C4CR_NBREQ_Field := 16#0#;
-- Number of DMA requests minus 1 to forward
SYNC_ID : C4CR_SYNC_ID_Field := 16#0#;
-- Synchronization identification
Reserved_29_31 : HAL.UInt3 := 16#0#;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C4CR_Register use record
DMAREQ_ID at 0 range 0 .. 6;
Reserved_7_7 at 0 range 7 .. 7;
SOIE at 0 range 8 .. 8;
EGE at 0 range 9 .. 9;
Reserved_10_15 at 0 range 10 .. 15;
SE at 0 range 16 .. 16;
SPOL at 0 range 17 .. 18;
NBREQ at 0 range 19 .. 23;
SYNC_ID at 0 range 24 .. 28;
Reserved_29_31 at 0 range 29 .. 31;
end record;
subtype C5CR_DMAREQ_ID_Field is HAL.UInt7;
subtype C5CR_SPOL_Field is HAL.UInt2;
subtype C5CR_NBREQ_Field is HAL.UInt5;
subtype C5CR_SYNC_ID_Field is HAL.UInt5;
-- channel 5 configuration register
type C5CR_Register is record
DMAREQ_ID : C5CR_DMAREQ_ID_Field := 16#0#;
-- DMA request identification
Reserved_7_7 : HAL.Bit := 16#0#;
-- unspecified
SOIE : Boolean := False;
-- Synchronization overrun interrupt enable
EGE : Boolean := False;
-- Event generation enable
Reserved_10_15 : HAL.UInt6 := 16#0#;
-- unspecified
SE : Boolean := False;
-- Synchronization enable
SPOL : C5CR_SPOL_Field := 16#0#;
-- Synchronization polarity
NBREQ : C5CR_NBREQ_Field := 16#0#;
-- Number of DMA requests minus 1 to forward
SYNC_ID : C5CR_SYNC_ID_Field := 16#0#;
-- Synchronization identification
Reserved_29_31 : HAL.UInt3 := 16#0#;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C5CR_Register use record
DMAREQ_ID at 0 range 0 .. 6;
Reserved_7_7 at 0 range 7 .. 7;
SOIE at 0 range 8 .. 8;
EGE at 0 range 9 .. 9;
Reserved_10_15 at 0 range 10 .. 15;
SE at 0 range 16 .. 16;
SPOL at 0 range 17 .. 18;
NBREQ at 0 range 19 .. 23;
SYNC_ID at 0 range 24 .. 28;
Reserved_29_31 at 0 range 29 .. 31;
end record;
subtype C6CR_DMAREQ_ID_Field is HAL.UInt7;
subtype C6CR_SPOL_Field is HAL.UInt2;
subtype C6CR_NBREQ_Field is HAL.UInt5;
subtype C6CR_SYNC_ID_Field is HAL.UInt5;
-- channel 6 configuration register
type C6CR_Register is record
DMAREQ_ID : C6CR_DMAREQ_ID_Field := 16#0#;
-- DMA request identification
Reserved_7_7 : HAL.Bit := 16#0#;
-- unspecified
SOIE : Boolean := False;
-- Synchronization overrun interrupt enable
EGE : Boolean := False;
-- Event generation enable
Reserved_10_15 : HAL.UInt6 := 16#0#;
-- unspecified
SE : Boolean := False;
-- Synchronization enable
SPOL : C6CR_SPOL_Field := 16#0#;
-- Synchronization polarity
NBREQ : C6CR_NBREQ_Field := 16#0#;
-- Number of DMA requests minus 1 to forward
SYNC_ID : C6CR_SYNC_ID_Field := 16#0#;
-- Synchronization identification
Reserved_29_31 : HAL.UInt3 := 16#0#;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C6CR_Register use record
DMAREQ_ID at 0 range 0 .. 6;
Reserved_7_7 at 0 range 7 .. 7;
SOIE at 0 range 8 .. 8;
EGE at 0 range 9 .. 9;
Reserved_10_15 at 0 range 10 .. 15;
SE at 0 range 16 .. 16;
SPOL at 0 range 17 .. 18;
NBREQ at 0 range 19 .. 23;
SYNC_ID at 0 range 24 .. 28;
Reserved_29_31 at 0 range 29 .. 31;
end record;
subtype C7CR_DMAREQ_ID_Field is HAL.UInt7;
subtype C7CR_SPOL_Field is HAL.UInt2;
subtype C7CR_NBREQ_Field is HAL.UInt5;
subtype C7CR_SYNC_ID_Field is HAL.UInt5;
-- channel 7 configuration register
type C7CR_Register is record
DMAREQ_ID : C7CR_DMAREQ_ID_Field := 16#0#;
-- DMA request identification
Reserved_7_7 : HAL.Bit := 16#0#;
-- unspecified
SOIE : Boolean := False;
-- Synchronization overrun interrupt enable
EGE : Boolean := False;
-- Event generation enable
Reserved_10_15 : HAL.UInt6 := 16#0#;
-- unspecified
SE : Boolean := False;
-- Synchronization enable
SPOL : C7CR_SPOL_Field := 16#0#;
-- Synchronization polarity
NBREQ : C7CR_NBREQ_Field := 16#0#;
-- Number of DMA requests minus 1 to forward
SYNC_ID : C7CR_SYNC_ID_Field := 16#0#;
-- Synchronization identification
Reserved_29_31 : HAL.UInt3 := 16#0#;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C7CR_Register use record
DMAREQ_ID at 0 range 0 .. 6;
Reserved_7_7 at 0 range 7 .. 7;
SOIE at 0 range 8 .. 8;
EGE at 0 range 9 .. 9;
Reserved_10_15 at 0 range 10 .. 15;
SE at 0 range 16 .. 16;
SPOL at 0 range 17 .. 18;
NBREQ at 0 range 19 .. 23;
SYNC_ID at 0 range 24 .. 28;
Reserved_29_31 at 0 range 29 .. 31;
end record;
subtype C8CR_DMAREQ_ID_Field is HAL.UInt7;
subtype C8CR_SPOL_Field is HAL.UInt2;
subtype C8CR_NBREQ_Field is HAL.UInt5;
subtype C8CR_SYNC_ID_Field is HAL.UInt5;
-- channel 8 configuration register
type C8CR_Register is record
DMAREQ_ID : C8CR_DMAREQ_ID_Field := 16#0#;
-- DMA request identification
Reserved_7_7 : HAL.Bit := 16#0#;
-- unspecified
SOIE : Boolean := False;
-- Synchronization overrun interrupt enable
EGE : Boolean := False;
-- Event generation enable
Reserved_10_15 : HAL.UInt6 := 16#0#;
-- unspecified
SE : Boolean := False;
-- Synchronization enable
SPOL : C8CR_SPOL_Field := 16#0#;
-- Synchronization polarity
NBREQ : C8CR_NBREQ_Field := 16#0#;
-- Number of DMA requests minus 1 to forward
SYNC_ID : C8CR_SYNC_ID_Field := 16#0#;
-- Synchronization identification
Reserved_29_31 : HAL.UInt3 := 16#0#;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C8CR_Register use record
DMAREQ_ID at 0 range 0 .. 6;
Reserved_7_7 at 0 range 7 .. 7;
SOIE at 0 range 8 .. 8;
EGE at 0 range 9 .. 9;
Reserved_10_15 at 0 range 10 .. 15;
SE at 0 range 16 .. 16;
SPOL at 0 range 17 .. 18;
NBREQ at 0 range 19 .. 23;
SYNC_ID at 0 range 24 .. 28;
Reserved_29_31 at 0 range 29 .. 31;
end record;
subtype C9CR_DMAREQ_ID_Field is HAL.UInt7;
subtype C9CR_SPOL_Field is HAL.UInt2;
subtype C9CR_NBREQ_Field is HAL.UInt5;
subtype C9CR_SYNC_ID_Field is HAL.UInt5;
-- channel 9 configuration register
type C9CR_Register is record
DMAREQ_ID : C9CR_DMAREQ_ID_Field := 16#0#;
-- DMA request identification
Reserved_7_7 : HAL.Bit := 16#0#;
-- unspecified
SOIE : Boolean := False;
-- Synchronization overrun interrupt enable
EGE : Boolean := False;
-- Event generation enable
Reserved_10_15 : HAL.UInt6 := 16#0#;
-- unspecified
SE : Boolean := False;
-- Synchronization enable
SPOL : C9CR_SPOL_Field := 16#0#;
-- Synchronization polarity
NBREQ : C9CR_NBREQ_Field := 16#0#;
-- Number of DMA requests minus 1 to forward
SYNC_ID : C9CR_SYNC_ID_Field := 16#0#;
-- Synchronization identification
Reserved_29_31 : HAL.UInt3 := 16#0#;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C9CR_Register use record
DMAREQ_ID at 0 range 0 .. 6;
Reserved_7_7 at 0 range 7 .. 7;
SOIE at 0 range 8 .. 8;
EGE at 0 range 9 .. 9;
Reserved_10_15 at 0 range 10 .. 15;
SE at 0 range 16 .. 16;
SPOL at 0 range 17 .. 18;
NBREQ at 0 range 19 .. 23;
SYNC_ID at 0 range 24 .. 28;
Reserved_29_31 at 0 range 29 .. 31;
end record;
subtype C10CR_DMAREQ_ID_Field is HAL.UInt7;
subtype C10CR_SPOL_Field is HAL.UInt2;
subtype C10CR_NBREQ_Field is HAL.UInt5;
subtype C10CR_SYNC_ID_Field is HAL.UInt5;
-- channel 10 configuration register
type C10CR_Register is record
DMAREQ_ID : C10CR_DMAREQ_ID_Field := 16#0#;
-- DMA request identification
Reserved_7_7 : HAL.Bit := 16#0#;
-- unspecified
SOIE : Boolean := False;
-- Synchronization overrun interrupt enable
EGE : Boolean := False;
-- Event generation enable
Reserved_10_15 : HAL.UInt6 := 16#0#;
-- unspecified
SE : Boolean := False;
-- Synchronization enable
SPOL : C10CR_SPOL_Field := 16#0#;
-- Synchronization polarity
NBREQ : C10CR_NBREQ_Field := 16#0#;
-- Number of DMA requests minus 1 to forward
SYNC_ID : C10CR_SYNC_ID_Field := 16#0#;
-- Synchronization identification
Reserved_29_31 : HAL.UInt3 := 16#0#;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C10CR_Register use record
DMAREQ_ID at 0 range 0 .. 6;
Reserved_7_7 at 0 range 7 .. 7;
SOIE at 0 range 8 .. 8;
EGE at 0 range 9 .. 9;
Reserved_10_15 at 0 range 10 .. 15;
SE at 0 range 16 .. 16;
SPOL at 0 range 17 .. 18;
NBREQ at 0 range 19 .. 23;
SYNC_ID at 0 range 24 .. 28;
Reserved_29_31 at 0 range 29 .. 31;
end record;
subtype C11CR_DMAREQ_ID_Field is HAL.UInt7;
subtype C11CR_SPOL_Field is HAL.UInt2;
subtype C11CR_NBREQ_Field is HAL.UInt5;
subtype C11CR_SYNC_ID_Field is HAL.UInt5;
-- channel 11 configuration register
type C11CR_Register is record
DMAREQ_ID : C11CR_DMAREQ_ID_Field := 16#0#;
-- DMA request identification
Reserved_7_7 : HAL.Bit := 16#0#;
-- unspecified
SOIE : Boolean := False;
-- Synchronization overrun interrupt enable
EGE : Boolean := False;
-- Event generation enable
Reserved_10_15 : HAL.UInt6 := 16#0#;
-- unspecified
SE : Boolean := False;
-- Synchronization enable
SPOL : C11CR_SPOL_Field := 16#0#;
-- Synchronization polarity
NBREQ : C11CR_NBREQ_Field := 16#0#;
-- Number of DMA requests minus 1 to forward
SYNC_ID : C11CR_SYNC_ID_Field := 16#0#;
-- Synchronization identification
Reserved_29_31 : HAL.UInt3 := 16#0#;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C11CR_Register use record
DMAREQ_ID at 0 range 0 .. 6;
Reserved_7_7 at 0 range 7 .. 7;
SOIE at 0 range 8 .. 8;
EGE at 0 range 9 .. 9;
Reserved_10_15 at 0 range 10 .. 15;
SE at 0 range 16 .. 16;
SPOL at 0 range 17 .. 18;
NBREQ at 0 range 19 .. 23;
SYNC_ID at 0 range 24 .. 28;
Reserved_29_31 at 0 range 29 .. 31;
end record;
subtype C12CR_DMAREQ_ID_Field is HAL.UInt7;
subtype C12CR_SPOL_Field is HAL.UInt2;
subtype C12CR_NBREQ_Field is HAL.UInt5;
subtype C12CR_SYNC_ID_Field is HAL.UInt5;
-- channel 12 configuration register
type C12CR_Register is record
DMAREQ_ID : C12CR_DMAREQ_ID_Field := 16#0#;
-- DMA request identification
Reserved_7_7 : HAL.Bit := 16#0#;
-- unspecified
SOIE : Boolean := False;
-- Synchronization overrun interrupt enable
EGE : Boolean := False;
-- Event generation enable
Reserved_10_15 : HAL.UInt6 := 16#0#;
-- unspecified
SE : Boolean := False;
-- Synchronization enable
SPOL : C12CR_SPOL_Field := 16#0#;
-- Synchronization polarity
NBREQ : C12CR_NBREQ_Field := 16#0#;
-- Number of DMA requests minus 1 to forward
SYNC_ID : C12CR_SYNC_ID_Field := 16#0#;
-- Synchronization identification
Reserved_29_31 : HAL.UInt3 := 16#0#;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C12CR_Register use record
DMAREQ_ID at 0 range 0 .. 6;
Reserved_7_7 at 0 range 7 .. 7;
SOIE at 0 range 8 .. 8;
EGE at 0 range 9 .. 9;
Reserved_10_15 at 0 range 10 .. 15;
SE at 0 range 16 .. 16;
SPOL at 0 range 17 .. 18;
NBREQ at 0 range 19 .. 23;
SYNC_ID at 0 range 24 .. 28;
Reserved_29_31 at 0 range 29 .. 31;
end record;
subtype C13CR_DMAREQ_ID_Field is HAL.UInt7;
subtype C13CR_SPOL_Field is HAL.UInt2;
subtype C13CR_NBREQ_Field is HAL.UInt5;
subtype C13CR_SYNC_ID_Field is HAL.UInt5;
-- channel 13 configuration register
type C13CR_Register is record
DMAREQ_ID : C13CR_DMAREQ_ID_Field := 16#0#;
-- DMA request identification
Reserved_7_7 : HAL.Bit := 16#0#;
-- unspecified
SOIE : Boolean := False;
-- Synchronization overrun interrupt enable
EGE : Boolean := False;
-- Event generation enable
Reserved_10_15 : HAL.UInt6 := 16#0#;
-- unspecified
SE : Boolean := False;
-- Synchronization enable
SPOL : C13CR_SPOL_Field := 16#0#;
-- Synchronization polarity
NBREQ : C13CR_NBREQ_Field := 16#0#;
-- Number of DMA requests minus 1 to forward
SYNC_ID : C13CR_SYNC_ID_Field := 16#0#;
-- Synchronization identification
Reserved_29_31 : HAL.UInt3 := 16#0#;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C13CR_Register use record
DMAREQ_ID at 0 range 0 .. 6;
Reserved_7_7 at 0 range 7 .. 7;
SOIE at 0 range 8 .. 8;
EGE at 0 range 9 .. 9;
Reserved_10_15 at 0 range 10 .. 15;
SE at 0 range 16 .. 16;
SPOL at 0 range 17 .. 18;
NBREQ at 0 range 19 .. 23;
SYNC_ID at 0 range 24 .. 28;
Reserved_29_31 at 0 range 29 .. 31;
end record;
-- CSR_SOF array
type CSR_SOF_Field_Array is array (0 .. 13) of Boolean
with Component_Size => 1, Size => 14;
-- Type definition for CSR_SOF
type CSR_SOF_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
Val : HAL.UInt14;
-- SOF as a value
when True =>
Arr : CSR_SOF_Field_Array;
-- SOF as an array
end case;
end record
with Unchecked_Union, Size => 14;
for CSR_SOF_Field use record
Val at 0 range 0 .. 13;
Arr at 0 range 0 .. 13;
end record;
-- channel status register
type CSR_Register is record
SOF : CSR_SOF_Field;
-- Read-only. Synchronization overrun event flag
Reserved_14_31 : HAL.UInt18;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for CSR_Register use record
SOF at 0 range 0 .. 13;
Reserved_14_31 at 0 range 14 .. 31;
end record;
-- CFR_CSOF array
type CFR_CSOF_Field_Array is array (0 .. 13) of Boolean
with Component_Size => 1, Size => 14;
-- Type definition for CFR_CSOF
type CFR_CSOF_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
Val : HAL.UInt14;
-- CSOF as a value
when True =>
Arr : CFR_CSOF_Field_Array;
-- CSOF as an array
end case;
end record
with Unchecked_Union, Size => 14;
for CFR_CSOF_Field use record
Val at 0 range 0 .. 13;
Arr at 0 range 0 .. 13;
end record;
-- clear flag register
type CFR_Register is record
CSOF : CFR_CSOF_Field := (As_Array => False, Val => 16#0#);
-- Write-only. Clear synchronization overrun event flag
Reserved_14_31 : HAL.UInt18 := 16#0#;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for CFR_Register use record
CSOF at 0 range 0 .. 13;
Reserved_14_31 at 0 range 14 .. 31;
end record;
subtype RG0CR_SIG_ID_Field is HAL.UInt5;
subtype RG0CR_GPOL_Field is HAL.UInt2;
subtype RG0CR_GNBREQ_Field is HAL.UInt5;
-- request generator channel 0 configuration register
type RG0CR_Register is record
SIG_ID : RG0CR_SIG_ID_Field := 16#0#;
-- Signal identification
Reserved_5_7 : HAL.UInt3 := 16#0#;
-- unspecified
OIE : Boolean := False;
-- Trigger overrun interrupt enable
Reserved_9_15 : HAL.UInt7 := 16#0#;
-- unspecified
GE : Boolean := False;
-- DMA request generator channel 0 enable
GPOL : RG0CR_GPOL_Field := 16#0#;
-- DMA request generator trigger polarity
GNBREQ : RG0CR_GNBREQ_Field := 16#0#;
-- Number of DMA requests to be generated minus 1
Reserved_24_31 : HAL.UInt8 := 16#0#;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for RG0CR_Register use record
SIG_ID at 0 range 0 .. 4;
Reserved_5_7 at 0 range 5 .. 7;
OIE at 0 range 8 .. 8;
Reserved_9_15 at 0 range 9 .. 15;
GE at 0 range 16 .. 16;
GPOL at 0 range 17 .. 18;
GNBREQ at 0 range 19 .. 23;
Reserved_24_31 at 0 range 24 .. 31;
end record;
subtype RG1CR_SIG_ID_Field is HAL.UInt5;
subtype RG1CR_GPOL_Field is HAL.UInt2;
subtype RG1CR_GNBREQ_Field is HAL.UInt5;
-- request generator channel 1 configuration register
type RG1CR_Register is record
SIG_ID : RG1CR_SIG_ID_Field := 16#0#;
-- Signal identification
Reserved_5_7 : HAL.UInt3 := 16#0#;
-- unspecified
OIE : Boolean := False;
-- Trigger overrun interrupt enable
Reserved_9_15 : HAL.UInt7 := 16#0#;
-- unspecified
GE : Boolean := False;
-- DMA request generator channel 1 enable
GPOL : RG1CR_GPOL_Field := 16#0#;
-- DMA request generator trigger polarity
GNBREQ : RG1CR_GNBREQ_Field := 16#0#;
-- Number of DMA requests to be generated minus 1
Reserved_24_31 : HAL.UInt8 := 16#0#;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for RG1CR_Register use record
SIG_ID at 0 range 0 .. 4;
Reserved_5_7 at 0 range 5 .. 7;
OIE at 0 range 8 .. 8;
Reserved_9_15 at 0 range 9 .. 15;
GE at 0 range 16 .. 16;
GPOL at 0 range 17 .. 18;
GNBREQ at 0 range 19 .. 23;
Reserved_24_31 at 0 range 24 .. 31;
end record;
subtype RG2CR_SIG_ID_Field is HAL.UInt5;
subtype RG2CR_GPOL_Field is HAL.UInt2;
subtype RG2CR_GNBREQ_Field is HAL.UInt5;
-- request generator channel 2 configuration register
type RG2CR_Register is record
SIG_ID : RG2CR_SIG_ID_Field := 16#0#;
-- Signal identification
Reserved_5_7 : HAL.UInt3 := 16#0#;
-- unspecified
OIE : Boolean := False;
-- Trigger overrun interrupt enable
Reserved_9_15 : HAL.UInt7 := 16#0#;
-- unspecified
GE : Boolean := False;
-- DMA request generator channel 2 enable
GPOL : RG2CR_GPOL_Field := 16#0#;
-- DMA request generator trigger polarity
GNBREQ : RG2CR_GNBREQ_Field := 16#0#;
-- Number of DMA requests to be generated minus 1
Reserved_24_31 : HAL.UInt8 := 16#0#;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for RG2CR_Register use record
SIG_ID at 0 range 0 .. 4;
Reserved_5_7 at 0 range 5 .. 7;
OIE at 0 range 8 .. 8;
Reserved_9_15 at 0 range 9 .. 15;
GE at 0 range 16 .. 16;
GPOL at 0 range 17 .. 18;
GNBREQ at 0 range 19 .. 23;
Reserved_24_31 at 0 range 24 .. 31;
end record;
subtype RG3CR_SIG_ID_Field is HAL.UInt5;
subtype RG3CR_GPOL_Field is HAL.UInt2;
subtype RG3CR_GNBREQ_Field is HAL.UInt5;
-- request generator channel 3 configuration register
type RG3CR_Register is record
SIG_ID : RG3CR_SIG_ID_Field := 16#0#;
-- Signal identification
Reserved_5_7 : HAL.UInt3 := 16#0#;
-- unspecified
OIE : Boolean := False;
-- Trigger overrun interrupt enable
Reserved_9_15 : HAL.UInt7 := 16#0#;
-- unspecified
GE : Boolean := False;
-- DMA request generator channel 3 enable
GPOL : RG3CR_GPOL_Field := 16#0#;
-- DMA request generator trigger polarity
GNBREQ : RG3CR_GNBREQ_Field := 16#0#;
-- Number of DMA requests to be generated minus 1
Reserved_24_31 : HAL.UInt8 := 16#0#;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for RG3CR_Register use record
SIG_ID at 0 range 0 .. 4;
Reserved_5_7 at 0 range 5 .. 7;
OIE at 0 range 8 .. 8;
Reserved_9_15 at 0 range 9 .. 15;
GE at 0 range 16 .. 16;
GPOL at 0 range 17 .. 18;
GNBREQ at 0 range 19 .. 23;
Reserved_24_31 at 0 range 24 .. 31;
end record;
-- RGSR_OF array
type RGSR_OF_Field_Array is array (0 .. 3) of Boolean
with Component_Size => 1, Size => 4;
-- Type definition for RGSR_OF
type RGSR_OF_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
Val : HAL.UInt4;
-- OF as a value
when True =>
Arr : RGSR_OF_Field_Array;
-- OF as an array
end case;
end record
with Unchecked_Union, Size => 4;
for RGSR_OF_Field use record
Val at 0 range 0 .. 3;
Arr at 0 range 0 .. 3;
end record;
-- request generator interrupt status register
type RGSR_Register is record
OF_k : RGSR_OF_Field;
-- Read-only. Trigger overrun event flag
Reserved_4_31 : HAL.UInt28;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for RGSR_Register use record
OF_k at 0 range 0 .. 3;
Reserved_4_31 at 0 range 4 .. 31;
end record;
-- RGCFR_COF array
type RGCFR_COF_Field_Array is array (0 .. 3) of Boolean
with Component_Size => 1, Size => 4;
-- Type definition for RGCFR_COF
type RGCFR_COF_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
Val : HAL.UInt4;
-- COF as a value
when True =>
Arr : RGCFR_COF_Field_Array;
-- COF as an array
end case;
end record
with Unchecked_Union, Size => 4;
for RGCFR_COF_Field use record
Val at 0 range 0 .. 3;
Arr at 0 range 0 .. 3;
end record;
-- request generator interrupt clear flag register
type RGCFR_Register is record
COF : RGCFR_COF_Field := (As_Array => False, Val => 16#0#);
-- Write-only. Clear trigger overrun event flag
Reserved_4_31 : HAL.UInt28 := 16#0#;
-- unspecified
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for RGCFR_Register use record
COF at 0 range 0 .. 3;
Reserved_4_31 at 0 range 4 .. 31;
end record;
-----------------
-- Peripherals --
-----------------
-- DMA request multiplexer
type DMAMUX1_Peripheral is record
C0CR : aliased C0CR_Register;
-- channel 0 configuration register
C1CR : aliased C1CR_Register;
-- channel 1 configuration register
C2CR : aliased C2CR_Register;
-- channel 2 configuration register
C3CR : aliased C3CR_Register;
-- channel 3 configuration register
C4CR : aliased C4CR_Register;
-- channel 4 configuration register
C5CR : aliased C5CR_Register;
-- channel 5 configuration register
C6CR : aliased C6CR_Register;
-- channel 6 configuration register
C7CR : aliased C7CR_Register;
-- channel 7 configuration register
C8CR : aliased C8CR_Register;
-- channel 8 configuration register
C9CR : aliased C9CR_Register;
-- channel 9 configuration register
C10CR : aliased C10CR_Register;
-- channel 10 configuration register
C11CR : aliased C11CR_Register;
-- channel 11 configuration register
C12CR : aliased C12CR_Register;
-- channel 12 configuration register
C13CR : aliased C13CR_Register;
-- channel 13 configuration register
CSR : aliased CSR_Register;
-- channel status register
CFR : aliased CFR_Register;
-- clear flag register
RG0CR : aliased RG0CR_Register;
-- request generator channel 0 configuration register
RG1CR : aliased RG1CR_Register;
-- request generator channel 1 configuration register
RG2CR : aliased RG2CR_Register;
-- request generator channel 2 configuration register
RG3CR : aliased RG3CR_Register;
-- request generator channel 3 configuration register
RGSR : aliased RGSR_Register;
-- request generator interrupt status register
RGCFR : aliased RGCFR_Register;
-- request generator interrupt clear flag register
end record
with Volatile;
for DMAMUX1_Peripheral use record
C0CR at 16#0# range 0 .. 31;
C1CR at 16#4# range 0 .. 31;
C2CR at 16#8# range 0 .. 31;
C3CR at 16#C# range 0 .. 31;
C4CR at 16#10# range 0 .. 31;
C5CR at 16#14# range 0 .. 31;
C6CR at 16#18# range 0 .. 31;
C7CR at 16#1C# range 0 .. 31;
C8CR at 16#20# range 0 .. 31;
C9CR at 16#24# range 0 .. 31;