From de3e736926c6098d45cdf1b29d483d18efe71ccf Mon Sep 17 00:00:00 2001 From: Carl Johnsen Date: Thu, 18 Feb 2021 12:57:05 +0100 Subject: [PATCH] Updated and pushed version 0.4.3 --- RELEASE_NOTES.txt | 51 ++++++++---------------- src/SME.AST/SME.AST.csproj | 6 +-- src/SME.CPP/SME.CPP.csproj | 6 +-- src/SME.Components/SME.Components.csproj | 4 +- src/SME.GraphViz/SME.GraphViz.csproj | 4 +- src/SME.Tracer/SME.Tracer.csproj | 6 +-- src/SME.VHDL/SME.VHDL.csproj | 8 ++-- src/SME/SME.csproj | 4 +- 8 files changed, 35 insertions(+), 54 deletions(-) diff --git a/RELEASE_NOTES.txt b/RELEASE_NOTES.txt index 6e07f23..4c97de2 100644 --- a/RELEASE_NOTES.txt +++ b/RELEASE_NOTES.txt @@ -1,43 +1,24 @@ -New in version 0.4.2 since 0.4.1-beta +New in version 0.4.3 since 0.4.2 *********** * Changes * *********** -- Updated to .NET Core 3.1.102. Newer versions won't work with VHDL code - generation. -- Processes are now run concurrently. There is still some false dependency - between them, due to buses, which results in processes not always running in - parallel. -- Changed when an SME simulation stops. The new default is to stop when all of - the simulation processes have finished. Stopping a simulation can also be - triggered by invoking `Simulation.Current.RequestStop()`. -- Processes can now inherit from an abstract class. -- Updated RAM components to give a warning, instead of throwing an exception, - when doing both a read and a write on the same address. +- Added the option to not render the buses, when generating the dot graph. This + allows for a much cleaner graph. +- Inferred true dual port memory are now more portable. The old definition + produced inconsistent behaviour, depending on which VHDL simulator was being + used. +- Moved function definitions in VHDL into the process definition. This allows + the functions to access variables and buses, which are local to the process. ********* * Fixes * ********* -- Fixed error with arrays containing default values being expanded into huge - initializations instead of using `others => `. -- Updated unit tests to correctly do testing. -- Updated examples to reflect proper SME. -- All examples are now also run as unit tests, as in they now verify their - output is correct. -- Removed GHDL warning about redundant `others` case. -- Updated Travis for continoues integration of the updated SME on the Debug - build. -- Fixed VHDL simulation, where a `RDY` flag wasn't properly set. -- Fixed overflow error when generating bit strings -- Flipped how arrays are initialized in the RAM templates. -- Added intermediate signals for buses in VHDL, which are both input for - processes and top-level output. -- Fixed handling of non-continoues enums. -- Removed unused flag in state machines. -- Reworked state machine transformations so they are more stable. -- Fixed premature bus loading performed by the .NET debugger. -- Fixed triggering of processes in VHDL. -- Fixed error with generating too many type definitions in VHDL. -- Fixed redundant variable definition for loop invariants. -- Fixed error with inner exceptions silently being "handled". -- Fixed export of arrays in VHDL. +- Fixed error when initializing multidimensional arrays. +- Fixed triggering of unclocked processes. Before, clocked processes wouldn't + properly set the signal triggering unclocked processes. +- Fixed Windows line endings not being stripped in csv_util.vhdl. +- Fixed wrong name generation, when the first instance of a process came from + a different namespace. E.g. when the first process was a + SME.Components.TrueDualPortRAM, all names would start with SME_Components + instead of the proper namespace of the process. \ No newline at end of file diff --git a/src/SME.AST/SME.AST.csproj b/src/SME.AST/SME.AST.csproj index 7856100..6c0f0fe 100644 --- a/src/SME.AST/SME.AST.csproj +++ b/src/SME.AST/SME.AST.csproj @@ -3,7 +3,7 @@ - + @@ -20,10 +20,10 @@ SME.AST Synchronous Message Exchange (SME) - 0.4.2 + 0.4.3 Kenneth Skovhede, Carl-Johannes Johnsen Abstract syntax tree builder for SME networks - Copyright ©2020 - The SME team + Copyright ©2021 - The SME team false false SME;hardware simulation diff --git a/src/SME.CPP/SME.CPP.csproj b/src/SME.CPP/SME.CPP.csproj index f15d657..ce29c1d 100644 --- a/src/SME.CPP/SME.CPP.csproj +++ b/src/SME.CPP/SME.CPP.csproj @@ -4,7 +4,7 @@ - + @@ -24,10 +24,10 @@ SME.CPP Synchronous Message Exchange (SME) - 0.4.2 + 0.4.3 Kenneth Skovhede, Carl-Johannes Johnsen C++ transpiler for SME networks - Copyright ©2020 - The SME team + Copyright ©2021 - The SME team false false SME;hardware simulation diff --git a/src/SME.Components/SME.Components.csproj b/src/SME.Components/SME.Components.csproj index 713980d..ddecb89 100644 --- a/src/SME.Components/SME.Components.csproj +++ b/src/SME.Components/SME.Components.csproj @@ -16,10 +16,10 @@ SME.Components Synchronous Message Exchange (SME) - 0.4.2 + 0.4.3 Kenneth Skovhede, Carl-Johannes Johnsen Optional hardware components SME networks - Copyright ©2020 - The SME team + Copyright ©2021 - The SME team false false SME;hardware simulation diff --git a/src/SME.GraphViz/SME.GraphViz.csproj b/src/SME.GraphViz/SME.GraphViz.csproj index 4bfe46e..90281b5 100644 --- a/src/SME.GraphViz/SME.GraphViz.csproj +++ b/src/SME.GraphViz/SME.GraphViz.csproj @@ -16,10 +16,10 @@ SME.GraphViz Synchronous Message Exchange (SME) - 0.4.2 + 0.4.3 Kenneth Skovhede, Carl-Johannes Johnsen GraphViz renderer for Synchronous Message Exchange - Copyright ©2020 - The SME team + Copyright ©2021 - The SME team false false SME;hardware simulation diff --git a/src/SME.Tracer/SME.Tracer.csproj b/src/SME.Tracer/SME.Tracer.csproj index 881ce88..213d78c 100644 --- a/src/SME.Tracer/SME.Tracer.csproj +++ b/src/SME.Tracer/SME.Tracer.csproj @@ -3,7 +3,7 @@ - + @@ -18,10 +18,10 @@ SME.Tracer Synchronous Message Exchange (SME) - 0.4.2 + 0.4.3 Kenneth Skovhede, Carl-Johannes Johnsen Tracing module for SME networks - Copyright ©2020 - The SME team + Copyright ©2021 - The SME team false false SME;hardware simulation diff --git a/src/SME.VHDL/SME.VHDL.csproj b/src/SME.VHDL/SME.VHDL.csproj index 6953157..77a0951 100644 --- a/src/SME.VHDL/SME.VHDL.csproj +++ b/src/SME.VHDL/SME.VHDL.csproj @@ -6,11 +6,11 @@ - + - + @@ -25,10 +25,10 @@ SME.VHDL Synchronous Message Exchange (SME) - 0.4.2 + 0.4.3 Kenneth Skovhede, Carl-Johannes Johnsen VHDL transpiler for SME networks - Copyright ©2020 - The SME team + Copyright ©2021 - The SME team false false SME;hardware simulation diff --git a/src/SME/SME.csproj b/src/SME/SME.csproj index e9b94e6..3c7b9e5 100644 --- a/src/SME/SME.csproj +++ b/src/SME/SME.csproj @@ -16,10 +16,10 @@ SME Synchronous Message Exchange (SME) - 0.4.2 + 0.4.3 Kenneth Skovhede, Carl-Johannes Johnsen Synchronous Message Exchange simulation and component library - Copyright ©2020 - The SME team + Copyright ©2021 - The SME team false false SME;hardware simulation