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Releases: jotego/jt12

Turrican!

27 Oct 20:42
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Turrican! Pre-release
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-More robust implementation of MMR interface: Turrican works!
-MSB FNUM -> latch behaviour implemented as original hardware
-AM modulation is precise now

Hispanorusa

12 Oct 19:52
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This release fixes several bugs and also is capable of working with an external clock enable signal, which is very useful for FPGA implementations.
Alexey Melnikov helped identify and solve many bugs for this release. Hence the release name.

CE test

07 Oct 18:20
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CE test Pre-release
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Punisher sounds right.

CE test

07 Oct 16:49
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CE test Pre-release
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This version supports a clock enable input and does not require different clocks for synthesizer and CPU. Still under test.