-
Notifications
You must be signed in to change notification settings - Fork 0
/
impl-h83069-h83052-en.txt
814 lines (659 loc) · 20.7 KB
/
impl-h83069-h83052-en.txt
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
UNOFFICIAL micro T-Kernel Implementation Specification (H8/3069, H8/3052)
Version 1.01.01
January, 2012
1 CPU
1.1 Hardware Specifications
- H8/3069 edition
CPU: Renesas H8/3069 @20MHz
ROM: 512kB (On-chip FlashROM)
RAM: 16kB (On-chip SRAM)
Target board: Akizuki Denshi AKI-H8/3069F micom LAN board [K-00168]
(http://akizukidenshi.com/catalog/g/gK-00168/)
* RAM kernel requires K-00168's on-board RAM(2MB) with H8 Monitor
(http://www.mit.pref.miyagi.jp/embedded/consortium/h8mon.html).
* ROM kernel requires on-chip resources only.
Other boards are expected to work (but not tested).
- H8/3052 edition
CPU: Renesas H8/3052 @25MHz
ROM: 512kB (On-chip FlashROM)
RAM: 8kB (On-chip SRAM)
Target board: Akizuki Denshi AKI-H8/3052LAN board [K-00211]
(http://akizukidenshi.com/catalog/g/gK-00211/)
* RAM kernel requires K-00211's on-board SRAM(128kB) with H8 Monitor
(http://www.mit.pref.miyagi.jp/embedded/consortium/h8mon.html).
* ROM kernel requires on-chip resources only.
Other boards are expected to work (but not tested).
1.2 Protection Levels and Operating Modes
Since this system operates in single CPU operating mode, there is no switch-
over of the protection level. Even if any of the protection level is specified,
it shall be treated as protection level 0.
2 Memory
2.1 H8/3069 edition
2.1.1 Overall Memory Map
Supported CPU operating mode:
Mode 5 (16Mbyte expanded mode with on-chip ROM enabled)
Mode 7 (single-chip advanced mode)
In any CPU operating mode, the EMC bit in BCR register must be '1'.
0x000000 +-----------------------+
|On-chip ROM (512kB) | 0x000000-0x07ffff
0x080000 +-----------------------+
:(External :
: address space)(*):
0x400000 +-----------------------+
|External RAM (2MB) (*)| 0x400000-0x5fffff
0x600000 +-----------------------+
:(External :
: address space)(*):
0xfee000 +-----------------------+
|Internal |
| I/O registers(1)|
0xfee100 +-----------------------+
:(External :
: address space)(*):
0xffbf20 +-----------------------+
|On-chip RAM (16kB) | 0xffbf20-0xffff1f
0xffff20 +-----------------------+
|Internal |
| I/O registers(2)|
0xffffea +-----------------------+
:(External :
: address space)(*):
0xffffff +-----------------------+
(*) Available when Mode 5
2.1.2 ROM Memory Map and External RAM Memory Map
Space of 512kB is implemented in on-chip ROM, and space of 2MB is implemented
in external RAM. The on-chip ROM/external RAM memory map is shown below.
- ROM kernel
0x000000 +-----------------------+
|Interrupt Exception | 0x000000-0x0000ff
| Handling Vector Table|
0x000100 +-----------------------+
|micro T-Kernel code |
+- - - - - - - - - - - -+
|(unused) |
0x080000 +-----------------------+
0x400000 +-----------------------+
|(unused) | 0x400000-0x5fffff
0x600000 +-----------------------+
Vector table and micro T-Kernel code shall be located in the on-chip ROM.
- RAM kernel
0x000000 +-----------------------+
|H8 Monitor | 0x000000-0x07ffff
0x080000 +-----------------------+
0x400000 +-----------------------+
|micro T-Kernel code | 0x400000-0x5fffff
+- - - - - - - - - - - -+
|(unused) |
0x600000 +-----------------------+
H8 Monitor occupies on-chip ROM, and it provides interrupt exception handling
vector table in on-chip RAM. micro T-Kernel code shall be located in the
external RAM.
2.1.3 On-chip RAM Memory Map
Space of 16kB is implemented in on-chip RAM. The on-chip RAM memory map is
shown below.
0xffbf20 +-----------------------+
|H8 Monitor: (*)|
| work area|
0xffc000 +-----------------------+
|H8 Monitor: (*)|
|Interrupt Exception |
| Handling Vector Table|
0xffc100 +-----------------------+
|.data |
+- - - - - - - - - - - -+
|.bss (NoInit) |
+- - - - - - - - - - - -+
|.bss |
+- - - - - - - - - - - -+ <-SYSTEMAREA_TOP
|micro T-Kernel |
| management area|
0xfffe60 +-----------------------+ <-SYSTEMAREA_END
|Interrupt stack |
| (192byte)|
0xffff20 +-----------------------+ <-sp initial value
(*) ROM kernel: unused
NoInit: .bss is not cleared to zero in initialization.
.data and .bss are located in ascending order from the lower byte of the
on-chip RAM.
The micro T-Kernel management area is memory space dynamically managed by the
micro T-Kernel memory management function.
Normally, all unused memory spaces are allocated to the micro T-Kernel
management area, but this can be changed in system configuration.
micro T-Kernel management area is allocated to the designated area between
"SYSTEMAREA_TOP" and "SYSTEMAREA_END" in configuration file,
utk_config_depend.h.
2.2 H8/3052 edition
2.2.1 Overall Memory Map
Supported CPU operating mode:
Mode 6 (16Mbyte expanded mode with on-chip ROM enabled)
Mode 7 (single-chip advanced mode)
0x000000 +-----------------------+
|On-chip ROM (512kB) | 0x000000-0x07ffff
0x080000 +-----------------------+
:(External :
: address space)(*):
0x220000 +-----------------------+
|External RAM (128kB)(*)| 0x220000-0x23ffff
0x240000 +-----------------------+
:(External :
: address space)(*):
0xffdf10 +-----------------------+
|On-chip RAM (8kB) | 0xffdf10-0xffff0f
0xffff10 +-----------------------+
:(External :
: address space)(*):
0xffff1c +-----------------------+
|Internal I/O registers |
0xffffff +-----------------------+
(*) Available when Mode 6
2.2.2 ROM Memory Map and External RAM Memory Map
Space of 512kB is implemented in on-chip ROM, and space of 128kB is implemented
in external RAM. The on-chip ROM/external RAM memory map is shown below.
- ROM kernel
0x000000 +-----------------------+
|Interrupt Exception | 0x000000-0x0000ff
| Handling Vector Table|
0x000100 +-----------------------+
|micro T-Kernel code |
+- - - - - - - - - - - -+
|(unused) |
0x080000 +-----------------------+
0x220000 +-----------------------+
|(unused) | 0x220000-0x23ffff
0x240000 +-----------------------+
Vector table and micro T-Kernel code shall be located in the on-chip ROM.
- RAM kernel
0x000000 +-----------------------+
|H8 Monitor | 0x000000-0x07ffff
0x080000 +-----------------------+
0x220000 +-----------------------+
|micro T-Kernel code | 0x220000-0x23ffff
+- - - - - - - - - - - -+
|(unused) |
0x240000 +-----------------------+
H8 Monitor occupies on-chip ROM, and it provides interrupt exception handling
vector table in on-chip RAM. micro T-Kernel code shall be located in the
external RAM.
2.2.3 On-chip RAM Memory Map
Space of 8kB is implemented in on-chip RAM. The on-chip RAM memory map is
shown below.
0xffdf10 +-----------------------+
|H8 Monitor: (*)|
| work area|
0xffe000 +-----------------------+
|H8 Monitor: (*)|
|Interrupt Exception |
| Handling Vector Table|
0xffe100 +-----------------------+
|.data |
+- - - - - - - - - - - -+
|.bss (NoInit) |
+- - - - - - - - - - - -+
|.bss |
+- - - - - - - - - - - -+ <-SYSTEMAREA_TOP
|micro T-Kernel |
| management area|
0xfffe50 +-----------------------+ <-SYSTEMAREA_END
|Interrupt stack |
| (192byte)|
0xffff10 +-----------------------+ <-sp initial value
(*) ROM kernel: unused
NoInit: .bss is not cleared to zero in initialization.
.data and .bss are located in ascending order from the lower byte of the
on-chip RAM.
The micro T-Kernel management area is memory space dynamically managed by the
micro T-Kernel memory management function.
Normally, all unused memory spaces are allocated to the micro T-Kernel
management area, but this can be changed in system configuration.
micro T-Kernel management area is allocated to the designated area between
"SYSTEMAREA_TOP" and "SYSTEMAREA_END" in configuration file,
utk_config_depend.h.
2.3 Stacks
micro T-Kernel has the following two kinds of stacks.
(1) System stack
(2) Interrupt stack
For details, see "micro T-Kernel Implementation Specification for H8S/2212".
3 Interrupts and Exceptions
3.1 Interrupt Definition Numbers
The immediate values of vector number shall be used by dintno, the interrupt
definition numbers defined with tk_def_int().
Following is the Interrupt Exception Handling Vector Table.
(H8/3069 edition)
Vector Address Vector No Interrupt Sources
0x000000 0 reset
0x000004 1 reserved
0x000008 2 reserved
0x00000c 3 reserved
0x000010 4 reserved
0x000014 5 reserved
0x000018 6 reserved
0x00001c 7 NMI
0x000020 8 trap (#0)
0x000024 9 trap (#1)
0x000028 10 trap (#2)
0x00002c 11 trap (#3)
0x000030 12 IRQ0
0x000034 13 IRQ1
0x000038 14 IRQ2
0x00003c 15 IRQ3
0x000040 16 IRQ4
0x000044 17 IRQ5
0x000048 18 reserved
0x00004c 19 reserved
0x000050 20 WOVI
0x000054 21 CMI
0x000058 22 reserved
0x00005c 23 ADI
0x000060 24 IMIA0
0x000064 25 IMIB0
0x000068 26 OVI0
0x00006c 27 reserved
0x000070 28 IMIA1
0x000074 29 IMIB1
0x000078 30 OVI1
0x00007c 31 reserved
0x000080 32 IMIA2
0x000084 33 IMIB2
0x000088 34 OVI2
0x00008c 35 reserved
0x000090 36 CMIA0
0x000094 37 CMIB0
0x000098 38 CMIA1/CMIB1
0x00009c 39 TOVI0/TOVI1
0x0000a0 40 CMIA2
0x0000a4 41 CMIB2
0x0000a8 42 CMIA3/CMIB3
0x0000ac 43 TOVI2/TOVI3
0x0000b0 44 DEND0A
0x0000b4 45 DEND0B
0x0000b8 46 DEND1A
0x0000bc 47 DEND1B
0x0000c0 48 reserved
0x0000c4 49 reserved
0x0000c8 50 reserved
0x0000cc 51 reserved
0x0000d0 52 ERI0
0x0000d4 53 RXI0
0x0000d8 54 TXI0
0x0000dc 55 TEI0
0x0000e0 56 ERI1
0x0000e4 57 RXI1
0x0000e8 58 TXI1
0x0000ec 59 TEI1
0x0000f0 60 ERI2
0x0000f4 61 RXI2
0x0000f8 62 TXI2
0x0000fc 63 TEI2
(H8/3052 edition)
Vector Address Vector No Interrupt Sources
0x000000 0 reset
0x000004 1 reserved
0x000008 2 reserved
0x00000c 3 reserved
0x000010 4 reserved
0x000014 5 reserved
0x000018 6 reserved
0x00001c 7 NMI
0x000020 8 trap (#0)
0x000024 9 trap (#1)
0x000028 10 trap (#2)
0x00002c 11 trap (#3)
0x000030 12 IRQ0
0x000034 13 IRQ1
0x000038 14 IRQ2
0x00003c 15 IRQ3
0x000040 16 IRQ4
0x000044 17 IRQ5
0x000048 18 reserved
0x00004c 19 reserved
0x000050 20 WOVI
0x000054 21 CMI
0x000058 22 reserved
0x00005c 23 reserved
0x000060 24 IMIA0
0x000064 25 IMIB0
0x000068 26 OVI0
0x00006c 27 reserved
0x000070 28 IMIA1
0x000074 29 IMIB1
0x000078 30 OVI1
0x00007c 31 reserved
0x000080 32 IMIA2
0x000084 33 IMIB2
0x000088 34 OVI2
0x00008c 35 reserved
0x000090 36 IMIA3
0x000094 37 IMIB3
0x000098 38 OVI3
0x00009c 39 reserved
0x0000a0 40 IMIA4
0x0000a4 41 IMIB4
0x0000a8 42 OVI4
0x0000ac 43 reserved
0x0000b0 44 DEND0A
0x0000b4 45 DEND0B
0x0000b8 46 DEND1A
0x0000bc 47 DEND1B
0x0000c0 48 reserved
0x0000c4 49 reserved
0x0000c8 50 reserved
0x0000cc 51 reserved
0x0000d0 52 ERI0
0x0000d4 53 RXI0
0x0000d8 54 TXI0
0x0000dc 55 TEI0
0x0000e0 56 ERI1
0x0000e4 57 RXI1
0x0000e8 58 TXI1
0x0000ec 59 TEI1
0x0000f0 60 ADI
0x0000f4 -- ----
0x0000f8 -- ----
0x0000fc -- ----
3.2 TRAPA exception assignments
The TRAPA instruction uses trapa 0 to trapa 2, and is assigned to the
definition numbers 8 to 10.
Each TRAPA instruction is used as follows.
trapa 0 micro T-Kernel system call/extended SVC
trapa 1 "tk_ret_int()" system call
trapa 2 Task dispatcher call
trapa 3 (unused)
3.3 Interrupt handler
See "micro T-Kernel Implementation Specification for H8S/2212".
4 Initialization and Startup Processing
4.1 micro T-Kernel Startup Procedure
When system is reset, micro T-Kernel starts up.
The procedures from the startup of micro T-Kernel to the call of main function
are as follows.
icrt0.S
(1) Set the stack pointer [start:]
(2) Initialize CCR [start:]
(3) (RAM kernel only)
Set the initial value of .vector (ROM->RAM) [vector_loop:]
(4) Set the initial value of .data (ROM->RAM) [data_loop:]
(5) Clear .bss to 0 [bss_loop:]
(6) Calculate the range of micro T-Kernel management area [bss_done:]
(7) Call "main" function (sysinit_main.c) [kernel_start:]
4.2 User initialization program
See "micro T-Kernel Implementation Specification for H8S/2212".
5 micro T-Kernel Implementation Definitions
5.1 System State Detection
(1) Task-independent portion (interrupt hander or time event handler)
Detection is made based on a software flag set in micro T-Kernel.
knl_taskindp = 0 Task portion
knl_taskindp > 0 Task-independent portion
(2) Quasi-task portion (extended SVC handler)
Detection is made based on a software flag set in micro T-Kernel.
sysmode of TCB = 0 Task portion
sysmode of TCB > 0 Quasi-task portion
5.2 Exceptions/Interrupts Used by micro T-Kernel
trapa 0 micro T-Kernel system calls/extended SVC
trapa 1 "tk_ret_int()" system call
trapa 2 Task dispatcher call
trapa 3 (unused)
dintno 24 IMIA0
5.3 System Call/Extended SVC Interface
The basics, see "micro T-Kernel Implementation Specification for H8S/2212".
The differencies of H8/300H edition is shown below.
(Note: No EXR register operation.)
(1) System call interface
Parameters of up to third are set to registers, and the ones of fourth
or more are saved onto the stack. A system call is invoked by TRAPA #1
(trapa #TRAP_SVC).
An example of system call interface implementation is shown as follows.
ER tk_xxx_yyy(p1, p2, p3, p4, p5)
// stack state
// High Address +-------------------+
// | 5th arg (low) |
// | 5th arg (high) |
// | 4th arg (low) |
// | 4th arg (high) |
// | PC (low) | saved by I/F call
// | PC (high) |
// | R0 |
// | PC (low) | saved by trapa
// er7, er5 => | CCR:PC (high) |
// Low Address +-------------------+
// <-- 16bit width -->
//
Csym(tk_xxx_yyy):
push.w r0
mov.w function_code, r0
#if USE_TRAP
trapa #TRAP_SVC
#else
jsr Csym(knl_call_entry)
#endif
inc.l #2, er7
rts
(2) Extended SVC interface library
Regarding an extended SVC, arguments are wrapped in a packet by the caller,
and the start address of packet is set in ER1 register. An extended SVC call
is invoked by TRAPA #1 (trapa #TRAP_SVC).
Normally, the packet is created in a stack area, but can be used in other
areas as well. There are no restrictions on the number or types of arguments
since argument is wrapped into packet.
An example of extended SVC interface implementation is shown below.
W zxxx_yyy(p1, p2, p3, p4, p5, p6)
Csym(${func}):
push.l er1 // Save register arguments on stack
push.l er0
mov.l er7, er1
push.l er2
mov.w @zxxx_yyy, r0 // er1 = arguments packet address
trapa #TRAP_SVC
add.l #12, er7
rts
(3) Debugger Support Functions system call interface
Debugger support functions are not supported.
5.4 The stack when system call is invoked
(1) C language I/F (func(arg1, arg2, ...))
High Address +-------------------+
| ... |
| 5th arg (low) |
| 5th arg (high) |
| 4th arg (low) |
| 4th arg (high) |
| PC (low) | saved by I/F call
| PC (high) |
Low Address +-------------------+
<-- 16bit width -->
er0 = 1st arg
er1 = 2nd arg
er2 = 3rd arg
(2) knl_call_entry top (Immediately after trapa #TRAP_SVC is executed)
High Address +-------------------+
| ... |
| 5th arg (low) |
| 5th arg (high) |
| 4th arg (low) |
| 4th arg (high) |
| PC (low) | saved by I/F call
| PC (high) |
| R0 |
| PC (low) | saved by trapa
SP => | CCR:PC (high) |
Low Address +-------------------+
<-- 16bit width -->
r0 = fncd
e0 = Higher 16bit of 1st arg
r0 which was saved to stack = Lower 16bit of 1st arg
er1 = 2nd arg
er2 = 3rd arg
(3) Immediately after bpl l_esvc_function is executed
High Address +-------------------+
| ... |
| 5th arg (low) |
| 5th arg (high) |
| 4th arg (low) |
| 4th arg (high) |
| PC (low) | saved by I/F call
| PC (high) |
| R0 |
| PC (low) | saved by trapa
| CCR:PC (high) |
| R4 |
| E4 |
| R5 |
| E5 |
| R6 |
er5, SP => | E6 |
Low Address +-------------------+
<-- 16bit width -->
r0 = fncd
e0 = Higher 16bit of 1st arg
r0 which was saved to stack = Lower 16bit of 1st arg
er1 = 2nd arg
er2 = 3rd arg
r4 = fncd
(4) Immediately before system call is invoked
High Address +-------------------+
| ... |
| 5th arg (low) |
| 5th arg (high) |
| 4th arg (low) |
| 4th arg (high) |
| PC (low) | saved by I/F call
| PC (high) |
| R0 |
| PC (low) | saved by trapa
| CCR:PC (high) |
| R4 |
| E4 |
| R5 |
| E5 |
| R6 |
er5 => | E6 |
| (5th arg (low)) |
| (5th arg (high)) |
| (4th arg (low)) |
| (4th arg (high)) |
Low Address +-------------------+
<-- 16bit width -->
er0 = 1st arg
er1 = 2nd arg
er2 = 3rd arg
5.5 Stack when the extended SVC is invoked
(1) C language I/F (func(arg1, arg2, ...))
High Address +-------------------+
| ... |
| 5th arg (low) |
| 5th arg (high) |
| 4th arg (low) |
| 4th arg (high) |
| PC (low) | saved by I/F call
| PC (high) |
Low Address +-------------------+
<-- 16bit width -->
er0 = 1st arg
er1 = 2nd arg
er3 = 3rd arg
(2) knl_call_entry top (immediately after trapa #TRAP_SVC is executed)
High Address +-------------------+
| ... |
| 5th arg (low) |
| 5th arg (high) |
| 4th arg (low) |
| 4th arg (high) |
| PC (low) | saved by I/F call
| PC (high) |
| 2nd arg (low) |
| 2nd arg (high) |
| 1st arg (low) |
er1 => | 1st arg (high) |
| 3rd arg (low) |
| 3rd arg (high) |
| PC (low) | saved by trapa
SP => | CCR:PC (high) |
Low Address +-------------------+
<-- 16bit width -->
r0 = fncd
er1 = pk_para
(3) l_esvc_function top
High Address +-------------------+
| ... |
| 5th arg (low) |
| 5th arg (high) |
| 4th arg (low) |
| 4th arg (high) |
| PC (low) | saved by I/F call
| PC (high) |
| 2nd arg (low) |
| 2nd arg (high) |
| 1st arg (low) |
er1 => | 1st arg (high) |
| 3rd arg (low) |
| 3rd arg (high) |
| PC (low) | saved by trapa
| CCR:PC (high) |
| R4 |
| E4 |
| R5 |
| E5 |
| R6 |
er5, SP => | E6 |
Low Address +-------------------+
<-- 16bit width -->
r0 = fncd
er1 = pk_para
(4) knl_svc_ientry top
High Address +-------------------+
| ... |
| 5th arg (low) |
| 5th arg (high) |
| 4th arg (low) |
| 4th arg (high) |
| 3rd arg (low) |
| 3rd arg (high) |
| 2nd arg (low) |
| 2nd arg (high) |
| 1st arg (low) |
er0 => | 1st arg (high) |
| 3rd arg (low) |
| 3rd arg (high) |
| PC (low) | saved by trapa
| CCR:PC (high) |
| R4 |
| E4 |
| R5 |
| E5 |
| R6 |
er5, SP => | E6 |
Low Address +-------------------+
<-- 16bit width -->
er0 = pk_para
r1 = fncd
er4 = ret_addr (saved by I/F call)
5.6 Stack when an interrupt is raised
See "micro T-Kernel Implementation Specification for H8S/2212".
5.7 Task implementation-dependent definitions
See "micro T-Kernel Implementation Specification for H8S/2212".
5.8 Task registers
See "micro T-Kernel Implementation Specification for H8S/2212".
6 System Configuration Data
6.1 Setting value of utk_config_depend.h
See "micro T-Kernel Implementation Specification for H8S/2212".
These values are modified to fit each CPU. To save memory usage, some kinds of
task objects are disabled. User needs to adjust these values to use disabled
objects.
- SYSTEMAREA_TOP, SYSTEMAREA_END, RI_USERAREA_TOP, RI_INTSTACK
- CFN_TIMER_PERIOD
- CFN_MAX_TSKID, CFN_MAX_SEMID, CFN_MAX_FLGID, CFN_MAX_MBXID,
CFN_MAX_MTXID, CFN_MAX_MBFID, CFN_MAX_PORID, CFN_MAX_MPLID,
CFN_MAX_MPFID, CFN_MAX_CYCID, CFN_MAX_ALMID, CFN_MAX_SSYID,
CFN_MAX_REGDEV, CFN_MAX_OPNDEV, CFN_MAX_REQDEV
6.2 makerules
See "micro T-Kernel Implementation Specification for H8S/2212".
7. Hints for Make
Remember to set environmental variables. Here is a sample :-
$ export BD=/home/user/utkernel_source
$ export GNU_BD=/usr/local
$ export TOOL_ORIGIN=GNUh8300
$ export GNUh8300=/usr/local/h8300-elf
To make, change working directory to $(BD)/kernel/sysmain/build/app_h83069 or
$(BD)/kernel/sysmain/build/app_h83052 and type "make". Of course "make clean"
cleans old-objects.
(Note for BSD users: use GNU Make, not BSD Make.)
You will obtain "kernel-ram.mot" and "kernel-rom.mot".
"kernel-ram.mot" is RAM kernel. This kernel runs with the monitor program.
"kernel-rom.mot" is ROM kernel. You have to write this object to H8's FlashROM.