Seems to be possible to convert some pieces into hardware implementation

[Piedone]

Several core pieces of Encog seems to be almost completely possible to convert into an FPGA-based hardware implementation with our Hastlayer project. Hastlayer can automatically convert a subset of .NET into hardware implementations, providing significantly better performance in massively parallelizable compute-bound algorithms with lower power consumption.

The only issue is that some algorithms (particularly the neural networks) use floats or doubles, which are not supported by Hastlayer. Nevertheless floating point will be soon with posits, which are more accurate. Also, fixed point computations are supported. Would this be sufficient?

Also, FPGAs are only feasibly if a high degree of parallelization is possible, which I don't yet see where would be possible here.

As a test suite is there, it seems the hardware implementation could be also tested to see if it works the same.

Would be quite cool. What do you think?

BTW a few years back I created a little university project to detect traditional stock broker hand signals with a Kinect. It worked pretty well and it used some Encog SVMs in the background.