jackchen-git
diff --git a/‎hw/ip/clint/data/clint.hjson.tpl
Lines changed: 3 additions & 1 deletion b/‎hw/ip/clint/data/clint.hjson.tpl
Lines changed: 3 additions & 1 deletion
diff --git a/‎hw/ip/clint/src/clint.hjson
Lines changed: 18 additions & 12 deletions b/‎hw/ip/clint/src/clint.hjson
Lines changed: 18 additions & 12 deletions
diff --git a/‎hw/ip/clint/src/clint.sv
Lines changed: 2 additions & 4 deletions b/‎hw/ip/clint/src/clint.sv
Lines changed: 2 additions & 4 deletions
diff --git a/‎hw/ip/clint/src/clint_reg_pkg.sv
Lines changed: 37 additions & 44 deletions b/‎hw/ip/clint/src/clint_reg_pkg.sv
Lines changed: 37 additions & 44 deletions
@@ -7,7 +7,9 @@
 {
   name: "CLINT",
   clock_primary: "clk_i",
-  bus_device: "reg",
+  bus_interfaces: [
+    { protocol: "reg_iface", direction: "device" }
+  ],
   regwidth: "32",
   param_list: [
     { name: "NumCores",
 
@@ -7,24 +7,30 @@
 {
   name: "CLINT",
   clock_primary: "clk_i",
-  bus_device: "reg",
+  bus_interfaces: [
+    { protocol: "reg_iface", direction: "device" }
+  ],
   regwidth: "32",
+  param_list: [
+    { name: "NumCores",
+      desc: "Number of cores",
+      type: "int",
+      default: "2",
+      local: "true"
+    }
+  ],
   registers: [
-    {   name: "MSIP0",
-        desc: "Machine Software Interrupt Pending Core 0",
+    { multireg: {
+        name: "MSIP",
+        desc: "Machine Software Interrupt Pending ",
+        count: "NumCores",
+        cname: "MSIP",
         swaccess: "rw",
         hwaccess: "hro",
         fields: [
-          { bits: "0", name: "MSIP", desc: "Machine Software Interrupt Pending of Core 0" },
-        ]
-    },
-    {   name: "MSIP1",
-        desc: "Machine Software Interrupt Pending Core 1",
-        swaccess: "rw",
-        hwaccess: "hro",
-        fields: [
-          { bits: "0", name: "MSIP", desc: "Machine Software Interrupt Pending of Core 1" },
+          { bits: "0", name: "P", desc: "Machine Software Interrupt Pending" }
         ]
+      }
     },
     { skipto: "0x4000" },
     {   name: "MTIMECMP_LOW0",
 
@@ -28,7 +28,6 @@ module clint import clint_reg_pkg::*; #(
 
     logic [63:0]               mtime_q;
     logic [1:0][63:0] mtimecmp_q;
-    logic [1:0]       msip_q;
     // increase the timer
     logic increase_timer;
 
@@ -50,9 +49,9 @@ module clint import clint_reg_pkg::*; #(
 
     assign mtime_q = {reg2hw.mtime_high.q, reg2hw.mtime_low.q};
     assign mtimecmp_q[0] = {reg2hw.mtimecmp_high0.q, reg2hw.mtimecmp_low0.q};
-    assign msip_q[0] = reg2hw.msip0.q;
+    assign ipi_o[0] = reg2hw.msip[0].q;
     assign mtimecmp_q[1] = {reg2hw.mtimecmp_high1.q, reg2hw.mtimecmp_low1.q};
-    assign msip_q[1] = reg2hw.msip1.q;
+    assign ipi_o[1] = reg2hw.msip[1].q;
 
     assign {hw2reg.mtime_high.d, hw2reg.mtime_low.d} = mtime_q + 1;
     assign hw2reg.mtime_low.de = increase_timer;
@@ -91,7 +90,6 @@ module clint import clint_reg_pkg::*; #(
         .serial_o  (                )  // left open
     );
 
-    assign ipi_o = msip_q;
 
 endmodule
 
 
@@ -6,16 +6,19 @@
 
 package clint_reg_pkg;
 
+  // Param list
+  parameter int NumCores = 2;
+
+  // Address widths within the block
+  parameter int BlockAw = 16;
+
   ////////////////////////////
   // Typedefs for registers //
   ////////////////////////////
-  typedef struct packed {
-    logic        q;
-  } clint_reg2hw_msip0_reg_t;
 
   typedef struct packed {
     logic        q;
-  } clint_reg2hw_msip1_reg_t;
+  } clint_reg2hw_msip_mreg_t;
 
   typedef struct packed {
     logic [31:0] q;
@@ -41,7 +44,6 @@ package clint_reg_pkg;
     logic [31:0] q;
   } clint_reg2hw_mtime_high_reg_t;
 
-
   typedef struct packed {
     logic [31:0] d;
     logic        de;
@@ -52,44 +54,35 @@ package clint_reg_pkg;
     logic        de;
   } clint_hw2reg_mtime_high_reg_t;
 
-
-  ///////////////////////////////////////
-  // Register to internal design logic //
-  ///////////////////////////////////////
+  // Register -> HW type
   typedef struct packed {
-    clint_reg2hw_msip0_reg_t msip0; // [194:194]
-    clint_reg2hw_msip1_reg_t msip1; // [193:193]
-    clint_reg2hw_mtimecmp_low0_reg_t mtimecmp_low0; // [192:161]
-    clint_reg2hw_mtimecmp_high0_reg_t mtimecmp_high0; // [160:129]
-    clint_reg2hw_mtimecmp_low1_reg_t mtimecmp_low1; // [128:97]
-    clint_reg2hw_mtimecmp_high1_reg_t mtimecmp_high1; // [96:65]
-    clint_reg2hw_mtime_low_reg_t mtime_low; // [64:33]
-    clint_reg2hw_mtime_high_reg_t mtime_high; // [32:1]
+    clint_reg2hw_msip_mreg_t [1:0] msip; // [193:192]
+    clint_reg2hw_mtimecmp_low0_reg_t mtimecmp_low0; // [191:160]
+    clint_reg2hw_mtimecmp_high0_reg_t mtimecmp_high0; // [159:128]
+    clint_reg2hw_mtimecmp_low1_reg_t mtimecmp_low1; // [127:96]
+    clint_reg2hw_mtimecmp_high1_reg_t mtimecmp_high1; // [95:64]
+    clint_reg2hw_mtime_low_reg_t mtime_low; // [63:32]
+    clint_reg2hw_mtime_high_reg_t mtime_high; // [31:0]
   } clint_reg2hw_t;
 
-  ///////////////////////////////////////
-  // Internal design logic to register //
-  ///////////////////////////////////////
+  // HW -> register type
   typedef struct packed {
-    clint_hw2reg_mtime_low_reg_t mtime_low; // [66:35]
-    clint_hw2reg_mtime_high_reg_t mtime_high; // [34:3]
+    clint_hw2reg_mtime_low_reg_t mtime_low; // [65:33]
+    clint_hw2reg_mtime_high_reg_t mtime_high; // [32:0]
   } clint_hw2reg_t;
 
-  // Register Address
-  parameter logic [15:0] CLINT_MSIP0_OFFSET = 16'h 0;
-  parameter logic [15:0] CLINT_MSIP1_OFFSET = 16'h 4;
-  parameter logic [15:0] CLINT_MTIMECMP_LOW0_OFFSET = 16'h 4000;
-  parameter logic [15:0] CLINT_MTIMECMP_HIGH0_OFFSET = 16'h 4004;
-  parameter logic [15:0] CLINT_MTIMECMP_LOW1_OFFSET = 16'h 4008;
-  parameter logic [15:0] CLINT_MTIMECMP_HIGH1_OFFSET = 16'h 400c;
-  parameter logic [15:0] CLINT_MTIME_LOW_OFFSET = 16'h bff8;
-  parameter logic [15:0] CLINT_MTIME_HIGH_OFFSET = 16'h bffc;
+  // Register offsets
+  parameter logic [BlockAw-1:0] CLINT_MSIP_OFFSET = 16'h 0;
+  parameter logic [BlockAw-1:0] CLINT_MTIMECMP_LOW0_OFFSET = 16'h 4000;
+  parameter logic [BlockAw-1:0] CLINT_MTIMECMP_HIGH0_OFFSET = 16'h 4004;
+  parameter logic [BlockAw-1:0] CLINT_MTIMECMP_LOW1_OFFSET = 16'h 4008;
+  parameter logic [BlockAw-1:0] CLINT_MTIMECMP_HIGH1_OFFSET = 16'h 400c;
+  parameter logic [BlockAw-1:0] CLINT_MTIME_LOW_OFFSET = 16'h bff8;
+  parameter logic [BlockAw-1:0] CLINT_MTIME_HIGH_OFFSET = 16'h bffc;
 
-
-  // Register Index
+  // Register index
   typedef enum int {
-    CLINT_MSIP0,
-    CLINT_MSIP1,
+    CLINT_MSIP,
     CLINT_MTIMECMP_LOW0,
     CLINT_MTIMECMP_HIGH0,
     CLINT_MTIMECMP_LOW1,
@@ -99,15 +92,15 @@ package clint_reg_pkg;
   } clint_id_e;
 
   // Register width information to check illegal writes
-  parameter logic [3:0] CLINT_PERMIT [8] = '{
-    4'b 0001, // index[0] CLINT_MSIP0
-    4'b 0001, // index[1] CLINT_MSIP1
-    4'b 1111, // index[2] CLINT_MTIMECMP_LOW0
-    4'b 1111, // index[3] CLINT_MTIMECMP_HIGH0
-    4'b 1111, // index[4] CLINT_MTIMECMP_LOW1
-    4'b 1111, // index[5] CLINT_MTIMECMP_HIGH1
-    4'b 1111, // index[6] CLINT_MTIME_LOW
-    4'b 1111  // index[7] CLINT_MTIME_HIGH
+  parameter logic [3:0] CLINT_PERMIT [7] = '{
+    4'b 0001, // index[0] CLINT_MSIP
+    4'b 1111, // index[1] CLINT_MTIMECMP_LOW0
+    4'b 1111, // index[2] CLINT_MTIMECMP_HIGH0
+    4'b 1111, // index[3] CLINT_MTIMECMP_LOW1
+    4'b 1111, // index[4] CLINT_MTIMECMP_HIGH1
+    4'b 1111, // index[5] CLINT_MTIME_LOW
+    4'b 1111  // index[6] CLINT_MTIME_HIGH
   };
+
 endpackage