Releases: intel/llvm
Releases · intel/llvm
DPC++ daily 2022-01-10
[SYCL][Doc] Add ComplexAlgorithms extension (#5108) Provides limited support for std::complex types in SYCL 2020 group functions and group algorithms. Signed-off-by: John Pennycook <[email protected]>
DPC++ daily 2022-01-08
[SYCL] Diagnose unresolved symbols in L0 modules (#5267) Diagnose an error in the Level Zero version of `piProgramBuild` and `piProgramLink` if the built program has any unresolved symbols. Also, include an error message with a list of the unresolved symbols in the build log, which is incorporated into the `what` string of the exception that the runtime throws. As a result, the user will see a list of the unresolved symbols when the exception terminates the application. Previously, no error was diagnosed from `piProgramBuild` or `piProgramLink` when there were unresolved symbols, but the first call to `piKernelCreate` would fail (without any indication about the cause of the failure).
DPC++ daily 2022-01-07
[SYCL] Static linking support in Level Zero plugin (#5266) The Level Zero driver now has "static linking" support, the ability to create a single Level Zero module from a list of SPIR-V modules. Use this feature to implement `piProgramLink`, replacing the previous implementation that relied on "dynamic linking" of Level Zero modules. There are two main improvements: * Static linking provides more optimizations because the compiler sees the SPIR-V for all modules, which enables cross-module optimizations. * The previous implementation was mostly using mock driver APIs, and it didn't work in the general case when `piProgramLink` tried to link more than one input module together. This is mostly an infrastructure improvement, which does not provide any new features or bug fixes. Since there is no Level Zero interop API that can create a `kernel_bundle` in `object` or `input` state, there is no need currently to link multiple Level Zero modules together with `piProgramLink`. However, this commit provides the infrastructure we need to enable online linking of the "device library" into device code. That feature will be enabled in a future commit. Note that a temporary environment variable has also been added (`SYCL_FORCE_LINK=[0|1]`), which was added to help test this change. Defining this variable to `1` forces the runtime to call `piProgramCompile` / `piProgramLink` instead of `piProgramBuild` even if the program is created from a single SPIR-V module. This is usually safe, but it sometimes results in false errors, so only enable this variable if you know what you are doing. We expect support for this environment variable to removed soon.
DPC++ daily 2022-01-06
[SYCL] Add assert for event impl existence in addEvent (#5257) Minor change to ensure the existence of event implementation before dereferencing it in `queue_impl::addEvent`. Signed-off-by: Steffen Larsen <[email protected]>
DPC++ daily 2022-01-05
[ESIMD] Add basic operations code generation test for half type. (#5241) * [ESIMD] Add basic operations code generation test for half type. Signed-off-by: Konstantin S Bobrovsky <[email protected]>
DPC++ daily 2022-01-04
[SYCL][XPTI] Add accessor events (#5249) - Accessor construction events using the following APIs covering all targets and modes: - sycl::buffer::get_access(); - sycl::accessor constructors; - Fixed XPTI hash generation (added previously missed dependency on source code location line number). E2E tests: intel/llvm-test-suite#700
DPC++ daily 2021-12-31
[SYCL][CUDA] Add -fcuda-prec-sqrt flag (#5141) This patch add `__nvvm_reflect` support for `__CUDA_PREC_SQRT` and adds a `-Xclang -fcuda-prec-sqrt` flag which is equivalent to the `nvcc` `-prec-sqrt` flag, except that it defaults to `false` for `clang++` and to `true` for `nvcc`. The reason for that is that the SYCL specification doesn't require a correctly rounded `sqrt` so we likely want to keep the fast `sqrt` as a default and use the flag when higher precision is required. See additional discussion on #4041 and #5116
DPC++ daily 2021-12-30
sycl-nightly/20211230 [ESIMD] Revise log/exp implementation to be consistent with std/sycl …
DPC++ daily 2021-12-29
LLVM and SPIRV-LLVM-Translator pulldown (WW01) LLVM: llvm/llvm-project@bb84dd81590b SPIRV-LLVM-Translator: KhronosGroup/SPIRV-LLVM-Translator@987a1ab37f2260742ccb18b261339d497929dd90
DPC++ daily 2021-12-28
sycl-nightly/20211228 [ESIMD] Add infra to support half, bfloat, etc, support sycl::half. (…