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[SYCL][ESIMD] Move rounding functions out of experimental namespace (#5785)
Signed-off-by: Sergey Dmitriev <[email protected]>
1 parent e200720 commit b2ee289

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+244
-220
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5 files changed

+244
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‎sycl/include/sycl/ext/intel/esimd/detail/math_intrin.hpp

+86
Original file line numberDiff line numberDiff line change
@@ -123,6 +123,19 @@ __ESIMD_INTRIN __ESIMD_raw_vec_t(T, SZ)
123123
__esimd_ieee_div(__ESIMD_raw_vec_t(T, SZ) src0,
124124
__ESIMD_raw_vec_t(T, SZ) src1);
125125

126+
template <int SZ>
127+
__ESIMD_INTRIN __ESIMD_DNS::vector_type_t<float, SZ>
128+
__esimd_rndd(__ESIMD_DNS::vector_type_t<float, SZ> src0);
129+
template <int SZ>
130+
__ESIMD_INTRIN __ESIMD_DNS::vector_type_t<float, SZ>
131+
__esimd_rndu(__ESIMD_DNS::vector_type_t<float, SZ> src0);
132+
template <int SZ>
133+
__ESIMD_INTRIN __ESIMD_DNS::vector_type_t<float, SZ>
134+
__esimd_rnde(__ESIMD_DNS::vector_type_t<float, SZ> src0);
135+
template <int SZ>
136+
__ESIMD_INTRIN __ESIMD_DNS::vector_type_t<float, SZ>
137+
__esimd_rndz(__ESIMD_DNS::vector_type_t<float, SZ> src0);
138+
126139
template <int N>
127140
__ESIMD_INTRIN uint32_t
128141
__esimd_pack_mask(__ESIMD_DNS::vector_type_t<uint16_t, N> src0);
@@ -605,6 +618,79 @@ __ESIMD_INTRIN __ESIMD_raw_vec_t(T, SZ)
605618
return __ESIMD_DNS::convert_vector<T, CppT, SZ>(cpp_res);
606619
}
607620

621+
template <int SZ>
622+
__ESIMD_INTRIN __ESIMD_DNS::vector_type_t<float, SZ>
623+
__esimd_rndd(__ESIMD_DNS::vector_type_t<float, SZ> src0) {
624+
__ESIMD_DNS::vector_type_t<float, SZ> retv;
625+
626+
for (int i = 0; i < SZ; i++) {
627+
SIMDCF_ELEMENT_SKIP(i);
628+
retv[i] = floor(src0[i]);
629+
}
630+
return retv;
631+
}
632+
633+
template <int SZ>
634+
__ESIMD_INTRIN __ESIMD_DNS::vector_type_t<float, SZ>
635+
__esimd_rndu(__ESIMD_DNS::vector_type_t<float, SZ> src0) {
636+
__ESIMD_DNS::vector_type_t<float, SZ> retv;
637+
int increment;
638+
639+
for (int i = 0; i < SZ; i++) {
640+
SIMDCF_ELEMENT_SKIP(i);
641+
if (src0[i] - floor(src0[i]) > 0.0f) {
642+
increment = 1;
643+
} else {
644+
increment = 0;
645+
}
646+
647+
retv[i] = floor(src0[i]) + increment;
648+
}
649+
650+
return retv;
651+
}
652+
653+
template <int SZ>
654+
__ESIMD_INTRIN __ESIMD_DNS::vector_type_t<float, SZ>
655+
__esimd_rnde(__ESIMD_DNS::vector_type_t<float, SZ> src0) {
656+
__ESIMD_DNS::vector_type_t<float, SZ> retv;
657+
int increment;
658+
659+
for (int i = 0; i < SZ; i++) {
660+
SIMDCF_ELEMENT_SKIP(i);
661+
if (src0[i] - floor(src0[i]) > 0.5f) {
662+
increment = 1;
663+
} else if (src0[i] - floor(src0[i]) < 0.5f) {
664+
increment = 0;
665+
} else {
666+
increment = (int(floor(src0[i])) % 2 == 1);
667+
}
668+
669+
retv[i] = floor(src0[i]) + increment;
670+
}
671+
672+
return retv;
673+
}
674+
675+
template <int SZ>
676+
__ESIMD_INTRIN __ESIMD_DNS::vector_type_t<float, SZ>
677+
__esimd_rndz(__ESIMD_DNS::vector_type_t<float, SZ> src0) {
678+
__ESIMD_DNS::vector_type_t<float, SZ> retv;
679+
int increment;
680+
681+
for (int i = 0; i < SZ; i++) {
682+
SIMDCF_ELEMENT_SKIP(i);
683+
if (fabs(src0[i]) < fabs(floor(src0[i]))) {
684+
increment = 1;
685+
} else {
686+
increment = 0;
687+
}
688+
retv[i] = floor(src0[i]) + increment;
689+
}
690+
691+
return retv;
692+
}
693+
608694
template <int N>
609695
__ESIMD_INTRIN uint32_t
610696
__esimd_pack_mask(__ESIMD_DNS::vector_type_t<uint16_t, N> src0) {

‎sycl/include/sycl/ext/intel/esimd/math.hpp

+130
Original file line numberDiff line numberDiff line change
@@ -502,6 +502,136 @@ ESIMD_NODEBUG ESIMD_INLINE T exp(T src0, Sat sat = {}) {
502502

503503
/// @} sycl_esimd_math
504504

505+
/// @addtogroup sycl_esimd_conv
506+
/// @{
507+
508+
////////////////////////////////////////////////////////////////////////////////
509+
// Rounding intrinsics.
510+
////////////////////////////////////////////////////////////////////////////////
511+
512+
#define __ESIMD_INTRINSIC_DEF(name) \
513+
/** @tparam T Element type. */ \
514+
/** @tparam SZ Number of elements in the input vector. */ \
515+
/** @tparam Sat Saturation control. Default is \c \
516+
* __ESIMD_NS::saturation_off_tag */ \
517+
/** @param src0 The argument to perform rounding on. */ \
518+
/** @param sat The type tag object to auto-deduce saturation control. */ \
519+
/** can be \c saturation_off or \c saturation_on */ \
520+
template <typename T, int SZ, class Sat = __ESIMD_NS::saturation_off_tag> \
521+
__ESIMD_API __ESIMD_NS::simd<T, SZ> name(__ESIMD_NS::simd<float, SZ> src0, \
522+
Sat sat = {}) { \
523+
__ESIMD_NS::simd<float, SZ> Result = __esimd_##name<SZ>(src0.data()); \
524+
if constexpr (std::is_same_v<Sat, __ESIMD_NS::saturation_off_tag>) \
525+
return Result; \
526+
else if constexpr (!std::is_same_v<float, T>) { \
527+
auto RawRes = __ESIMD_NS::saturate<float>(Result).data(); \
528+
return __ESIMD_DNS::convert_vector<T, float, SZ>(std::move(RawRes)); \
529+
} else { \
530+
return __ESIMD_NS::saturate<T>(Result); \
531+
} \
532+
} \
533+
/** Scalar version. */ \
534+
template <typename T, class Sat = __ESIMD_NS::saturation_off_tag> \
535+
__ESIMD_API T name(float src0, Sat sat = {}) { \
536+
__ESIMD_NS::simd<float, 1> Src0 = src0; \
537+
__ESIMD_NS::simd<T, 1> Result = name<T>(Src0, sat); \
538+
return Result[0]; \
539+
}
540+
541+
/// Round-down (also known as \c floor). Supports only \c float.
542+
/// Corner cases:
543+
/// | _ | _ | _ | _ | _ | _ | _ | _
544+
/// |----------|------|---------|----|----|---------|------|----
545+
/// | **src0** | -inf | -denorm | -0 | +0 | +denorm | +inf | NaN
546+
/// | **dst** | -inf | \* | -0 | +0 | +0 | +inf | NaN
547+
/// - \* \c -1 or \c -0 depending on the Single Precision Denorm Mode.
548+
__ESIMD_INTRINSIC_DEF(rndd)
549+
550+
/// Round-up (also known as \c ceil). Supports only \c float.
551+
/// Corner cases:
552+
/// | _ | _ | _ | _ | _ | _ | _ | _
553+
/// |----------|------|---------|----|----|---------|------|----
554+
/// | **src0** | -inf | -denorm | -0 | +0 | +denorm | +inf | NaN
555+
/// | **dst** | -inf | -0 | -0 | +0 | \* | +inf | NaN
556+
/// - \* \c +1 or \c +0 depending on the Single Precision Denorm Mode.
557+
__ESIMD_INTRINSIC_DEF(rndu)
558+
559+
/// Round-to-even (also known as \c round). Supports only \c float.
560+
/// Corner cases:
561+
/// | _ | _ | _ | _ | _ | _ | _ | _
562+
/// |----------|------|---------|----|----|---------|------|----
563+
/// | **src0** | -inf | -denorm | -0 | +0 | +denorm | +inf | NaN
564+
/// | **dst** | -inf | -0 | -0 | +0 | +0 | +inf | NaN
565+
__ESIMD_INTRINSIC_DEF(rnde)
566+
567+
/// Round-to-zero (also known as \c trunc). Supports only \c float.
568+
/// Corner cases:
569+
/// | _ | _ | _ | _ | _ | _ | _ | _
570+
/// |----------|------|---------|----|----|---------|------|----
571+
/// | **src0** | -inf | -denorm | -0 | +0 | +denorm | +inf | NaN
572+
/// | **dst** | -inf | -0 | -0 | +0 | +0 | +inf | NaN
573+
__ESIMD_INTRINSIC_DEF(rndz)
574+
575+
#undef __ESIMD_INTRINSIC_DEF
576+
/// @} sycl_esimd_conv
577+
578+
/// @addtogroup sycl_esimd_conv
579+
/// @{
580+
581+
/// "Floor" operation, vector version - alias of \c rndd.
582+
template <typename RT, int SZ, class Sat = __ESIMD_NS::saturation_off_tag>
583+
ESIMD_INLINE __ESIMD_NS::simd<RT, SZ>
584+
floor(const __ESIMD_NS::simd<float, SZ> src0, Sat sat = {}) {
585+
return esimd::rndd<RT, SZ>(src0, sat);
586+
}
587+
588+
/// "Floor" operation, scalar version - alias of \c rndd.
589+
template <typename RT, class Sat = __ESIMD_NS::saturation_off_tag>
590+
ESIMD_INLINE RT floor(float src0, Sat sat = {}) {
591+
return esimd::rndd<RT, 1U>(src0, sat)[0];
592+
}
593+
594+
/// "Ceiling" operation, vector version - alias of \c rndu.
595+
template <typename RT, int SZ, class Sat = __ESIMD_NS::saturation_off_tag>
596+
ESIMD_INLINE __ESIMD_NS::simd<RT, SZ>
597+
ceil(const __ESIMD_NS::simd<float, SZ> src0, Sat sat = {}) {
598+
return esimd::rndu<RT, SZ>(src0, sat);
599+
}
600+
601+
/// "Ceiling" operation, scalar version - alias of \c rndu.
602+
template <typename RT, class Sat = __ESIMD_NS::saturation_off_tag>
603+
ESIMD_INLINE RT ceil(float src0, Sat sat = {}) {
604+
return esimd::rndu<RT, 1U>(src0, sat);
605+
}
606+
607+
/// Round to integral value using the round to zero rounding mode (vector
608+
/// version). Alias of \c rndz.
609+
/// @tparam RT element type of the return vector.
610+
/// @tparam SZ size of the input and returned vectors.
611+
/// @param src0 the input vector.
612+
/// @param sat enables/disables the saturation (off by default). Possible
613+
/// values: saturation_on/saturation_off.
614+
/// @return vector of rounded values.
615+
template <typename RT, int SZ, class Sat = __ESIMD_NS::saturation_off_tag>
616+
__ESIMD_API __ESIMD_NS::simd<RT, SZ>
617+
trunc(const __ESIMD_NS::simd<float, SZ> &src0, Sat sat = {}) {
618+
return esimd::rndz<RT, SZ>(src0, sat);
619+
}
620+
621+
/// Round to integral value using the round to zero rounding mode (scalar
622+
/// version). Alias of \c rndz.
623+
/// @tparam RT type of the return value.
624+
/// @param src0 the input operand.
625+
/// @param sat enables/disables the saturation (off by default). Possible
626+
/// values: saturation_on/saturation_off.
627+
/// @return rounded value.
628+
template <typename RT, class Sat = __ESIMD_NS::saturation_off_tag>
629+
__ESIMD_API RT trunc(float src0, Sat sat = {}) {
630+
return esimd::rndz<RT, 1U>(src0, sat)[0];
631+
}
632+
633+
/// @} sycl_esimd_conv
634+
505635
/// @addtogroup sycl_esimd_bitmanip
506636
/// @{
507637

‎sycl/include/sycl/ext/intel/experimental/esimd/detail/math_intrin.hpp

-86
Original file line numberDiff line numberDiff line change
@@ -88,19 +88,6 @@ __ESIMD_INTRIN __ESIMD_raw_vec_t(T0, SZ)
8888
__esimd_sbfe(__ESIMD_raw_vec_t(T0, SZ) src0, __ESIMD_raw_vec_t(T0, SZ) src1,
8989
__ESIMD_raw_vec_t(T0, SZ) src2);
9090

91-
template <int SZ>
92-
__ESIMD_INTRIN __ESIMD_DNS::vector_type_t<float, SZ>
93-
__esimd_rndd(__ESIMD_DNS::vector_type_t<float, SZ> src0);
94-
template <int SZ>
95-
__ESIMD_INTRIN __ESIMD_DNS::vector_type_t<float, SZ>
96-
__esimd_rndu(__ESIMD_DNS::vector_type_t<float, SZ> src0);
97-
template <int SZ>
98-
__ESIMD_INTRIN __ESIMD_DNS::vector_type_t<float, SZ>
99-
__esimd_rnde(__ESIMD_DNS::vector_type_t<float, SZ> src0);
100-
template <int SZ>
101-
__ESIMD_INTRIN __ESIMD_DNS::vector_type_t<float, SZ>
102-
__esimd_rndz(__ESIMD_DNS::vector_type_t<float, SZ> src0);
103-
10491
template <typename T, int N>
10592
__ESIMD_INTRIN __ESIMD_raw_vec_t(T, N)
10693
__esimd_dp4(__ESIMD_raw_vec_t(T, N) v1, __ESIMD_raw_vec_t(T, N) v2)
@@ -452,79 +439,6 @@ __ESIMD_INTRIN __ESIMD_raw_vec_t(T, SZ)
452439
return retv;
453440
}
454441

455-
template <int SZ>
456-
__ESIMD_INTRIN __ESIMD_DNS::vector_type_t<float, SZ>
457-
__esimd_rndd(__ESIMD_DNS::vector_type_t<float, SZ> src0) {
458-
__ESIMD_DNS::vector_type_t<float, SZ> retv;
459-
460-
for (int i = 0; i < SZ; i++) {
461-
SIMDCF_ELEMENT_SKIP(i);
462-
retv[i] = floor(src0[i]);
463-
}
464-
return retv;
465-
}
466-
467-
template <int SZ>
468-
__ESIMD_INTRIN __ESIMD_DNS::vector_type_t<float, SZ>
469-
__esimd_rndu(__ESIMD_DNS::vector_type_t<float, SZ> src0) {
470-
__ESIMD_DNS::vector_type_t<float, SZ> retv;
471-
int increment;
472-
473-
for (int i = 0; i < SZ; i++) {
474-
SIMDCF_ELEMENT_SKIP(i);
475-
if (src0[i] - floor(src0[i]) > 0.0f) {
476-
increment = 1;
477-
} else {
478-
increment = 0;
479-
}
480-
481-
retv[i] = floor(src0[i]) + increment;
482-
}
483-
484-
return retv;
485-
}
486-
487-
template <int SZ>
488-
__ESIMD_INTRIN __ESIMD_DNS::vector_type_t<float, SZ>
489-
__esimd_rnde(__ESIMD_DNS::vector_type_t<float, SZ> src0) {
490-
__ESIMD_DNS::vector_type_t<float, SZ> retv;
491-
int increment;
492-
493-
for (int i = 0; i < SZ; i++) {
494-
SIMDCF_ELEMENT_SKIP(i);
495-
if (src0[i] - floor(src0[i]) > 0.5f) {
496-
increment = 1;
497-
} else if (src0[i] - floor(src0[i]) < 0.5f) {
498-
increment = 0;
499-
} else {
500-
increment = (int(floor(src0[i])) % 2 == 1);
501-
}
502-
503-
retv[i] = floor(src0[i]) + increment;
504-
}
505-
506-
return retv;
507-
}
508-
509-
template <int SZ>
510-
__ESIMD_INTRIN __ESIMD_DNS::vector_type_t<float, SZ>
511-
__esimd_rndz(__ESIMD_DNS::vector_type_t<float, SZ> src0) {
512-
__ESIMD_DNS::vector_type_t<float, SZ> retv;
513-
int increment;
514-
515-
for (int i = 0; i < SZ; i++) {
516-
SIMDCF_ELEMENT_SKIP(i);
517-
if (fabs(src0[i]) < fabs(floor(src0[i]))) {
518-
increment = 1;
519-
} else {
520-
increment = 0;
521-
}
522-
retv[i] = floor(src0[i]) + increment;
523-
}
524-
525-
return retv;
526-
}
527-
528442
inline constexpr __ESIMD_NS::uint
529443
__esimd_dpas_bits_precision(__ESIMD_ENS::argument_type precisionType) {
530444
return precisionType == __ESIMD_ENS::argument_type::TF32 ? 32

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