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SEDI driver sync with ISH on June, 06, 2024 #44

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merged 10 commits into from
Jun 7, 2024
Merged

SEDI driver sync with ISH on June, 06, 2024 #44

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235ea96
i2c: enable rx dma
helen741 Oct 25, 2023
1f99bb1
hpet: add new get_us api
kwd-doodling Dec 2, 2023
deff84d
hpet: enhance timer killing function
kwd-doodling Dec 10, 2023
b6c45d5
i2c: operate register after power full during init
helen741 Feb 1, 2024
e2244bd
sedi: add poll wait SEDI API with timeout parameter
kwd-doodling Oct 16, 2023
ae95d98
VNN: disable interrupt only for critical area manipulation
Wu-Sisi Mar 12, 2024
5fb2b02
dma: vnn: add lock for dma vnn req and dereq
inteljiangwe1 Apr 11, 2024
43f973f
spi: define dma max block size in header file
xiaolusu May 15, 2024
5162344
ipc: remove definitions for BT and CNVI
kwd-doodling Jun 4, 2024
10600e6
i2c: Update i2c calibration data to align with LNL code base
kwd-doodling Jun 4, 2024
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14 changes: 10 additions & 4 deletions bsp_sedi/drivers/dma/sedi_dma_ann_1p0.c
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2023 Intel Corporation
* Copyright (c) 2023-2024 Intel Corporation
*
* SPDX-License-Identifier: BSD-3-Clause
*/
Expand Down Expand Up @@ -113,20 +113,26 @@ int sedi_dma_get_capabilities(IN sedi_dma_t dma_device,

static inline void dma_vnn_req(sedi_dma_t dma_device, int channel_id)
{
unsigned int key = sedi_core_irq_lock();

if (dma_context[dma_device].vnn_status == 0) {
PM_VNN_DRIVER_REQ(VNN_ID_DMA0 + dma_device);
}
dma_context[dma_device].vnn_status |= BIT(channel_id);
sedi_core_irq_unlock(key);
}

static inline void dma_vnn_dereq(sedi_dma_t dma_device, int channel_id)
{
unsigned int key = sedi_core_irq_lock();

if (dma_context[dma_device].vnn_status & (BIT(channel_id))) {
dma_context[dma_device].vnn_status &= (~BIT(channel_id));
if (dma_context[dma_device].vnn_status == 0) {
PM_VNN_DRIVER_DEREQ(VNN_ID_DMA0 + dma_device);
}
}
if (dma_context[dma_device].vnn_status == 0) {
PM_VNN_DRIVER_DEREQ(VNN_ID_DMA0 + dma_device);
}
sedi_core_irq_unlock(key);
}

static void dma_set_default_channel_config(OUT channel_config_t *config)
Expand Down
14 changes: 11 additions & 3 deletions bsp_sedi/drivers/hpet/sedi_hpet.c
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2023 Intel Corporation
* Copyright (c) 2023 - 2024 Intel Corporation
*
* SPDX-License-Identifier: BSD-3-Clause
*/
Expand Down Expand Up @@ -62,8 +62,7 @@ static const sedi_hpet_capabilities_t hpet_cap = { 0 };

static inline void wait_for_idle(uint32_t bits)
{
while (SEDI_REG_GET(HPET, HPET_CTRL_STS) & bits)
;
SEDI_POLL_WAIT(SEDI_REG_GET(HPET, HPET_CTRL_STS) & bits, 10);
}

uint32_t sedi_hpet_get_min_delay(void)
Expand Down Expand Up @@ -166,6 +165,11 @@ uint64_t sedi_hpet_get_main_counter(void)
return ((uint64_t)highBits << 32) | lowBits;
}

uint64_t sedi_hpet_get_us(void)
{
return HPET_CYCLE_TO_US(sedi_hpet_get_main_counter());
}

void sedi_hpet_enable_interrupt(IN sedi_hpet_t timer_id)
{
switch (timer_id) {
Expand Down Expand Up @@ -216,6 +220,9 @@ int32_t sedi_hpet_init(uint32_t clk_divisor, uint32_t min_delay)
* Initial state of HPET is unknown, so put it back in a reset-like
* state (i.e. set main counter to 0 and disable interrupts)
*/
sedi_hpet_update_comparator(HPET_0, (uint64_t)-1);
sedi_hpet_update_comparator(HPET_1, (uint64_t)-1);
sedi_hpet_update_comparator(HPET_2, (uint64_t)-1);
SEDI_REG_RBFV_SET(HPET, GCFG_LOW, EN, 0);
SEDI_REG_SET(HPET, GIS_LOW, SEDI_REG_GET(HPET, GIS_LOW));
SEDI_REG_SET(HPET, MCV, (uint64_t)0x0);
Expand Down Expand Up @@ -307,6 +314,7 @@ int32_t sedi_hpet_kill_timer(IN sedi_hpet_t timer_id)

/* Disable interrupt */
sedi_hpet_disable_interrupt(timer_id);
sedi_hpet_set_int_status(BIT(timer_id));

/* Set comparator all bits as 1 */
sedi_hpet_update_comparator(timer_id, (uint64_t)-1);
Expand Down
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