diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 4d2464f..abd94c0 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -1,31 +1,23 @@ name: Build & Test -on: - [pull_request,push] +on: [pull_request, push] jobs: build: - runs-on: ubuntu-latest - strategy: - fail-fast: false - matrix: - python-version: [3.9] - + runs-on: ubuntu-20.04 steps: - - uses: actions/checkout@v2 - - name: Set up Python ${{ matrix.python-version }} - uses: actions/setup-python@v2 - with: - python-version: ${{ matrix.python-version }} - - name: Install dependencies + - uses: actions/checkout@v3 + - name: install dependencies run: | - python -m pip install --upgrade pip - pip install flake8 pytest - if [ -f requirements.txt ]; then pip install -r requirements.txt; fi - - name: Edit memory config - run: sed -i '10 i \ --memory-swap -1 \\' builder/build - - name: Build binaries - run: ./build.sh - - name: Validate with pytest + sudo apt update + sudo apt install -y python3 + sudo snap install go --classic + pip3 install -r requirements.txt + - name: build run: | - builder/test + make dist + - name: upload artifact + uses: actions/upload-artifact@v3 + with: + name: perfspect + path: dist/perfspect*.tgz diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..1f0a1a1 --- /dev/null +++ b/.gitignore @@ -0,0 +1,4 @@ +build/* +dist/* +pmu-checker/pmu-checker +src/libtsc.so diff --git a/CODE_OF_CONDUCT.md b/CODE_OF_CONDUCT.md new file mode 100644 index 0000000..1735498 --- /dev/null +++ b/CODE_OF_CONDUCT.md @@ -0,0 +1,131 @@ +# Contributor Covenant Code of Conduct + +## Our Pledge + +We as members, contributors, and leaders pledge to make participation in our +community a harassment-free experience for everyone, regardless of age, body +size, visible or invisible disability, ethnicity, sex characteristics, gender +identity and expression, level of experience, education, socio-economic status, +nationality, personal appearance, race, caste, color, religion, or sexual +identity and orientation. + +We pledge to act and interact in ways that contribute to an open, welcoming, +diverse, inclusive, and healthy community. + +## Our Standards + +Examples of behavior that contributes to a positive environment for our +community include: + +* Demonstrating empathy and kindness toward other people +* Being respectful of differing opinions, viewpoints, and experiences +* Giving and gracefully accepting constructive feedback +* Accepting responsibility and apologizing to those affected by our mistakes, + and learning from the experience +* Focusing on what is best not just for us as individuals, but for the overall + community + +Examples of unacceptable behavior include: + +* The use of sexualized language or imagery, and sexual attention or advances of + any kind +* Trolling, insulting or derogatory comments, and personal or political attacks +* Public or private harassment +* Publishing others' private information, such as a physical or email address, + without their explicit permission +* Other conduct which could reasonably be considered inappropriate in a + professional setting + +## Enforcement Responsibilities + +Community leaders are responsible for clarifying and enforcing our standards of +acceptable behavior and will take appropriate and fair corrective action in +response to any behavior that they deem inappropriate, threatening, offensive, +or harmful. + +Community leaders have the right and responsibility to remove, edit, or reject +comments, commits, code, wiki edits, issues, and other contributions that are +not aligned to this Code of Conduct, and will communicate reasons for moderation +decisions when appropriate. + +## Scope + +This Code of Conduct applies within all community spaces, and also applies when +an individual is officially representing the community in public spaces. +Examples of representing our community include using an official e-mail address, +posting via an official social media account, or acting as an appointed +representative at an online or offline event. + +## Enforcement + +Instances of abusive, harassing, or otherwise unacceptable behavior may be +reported to the community leaders responsible for enforcement at +CommunityCodeOfConduct AT intel DOT com. +All complaints will be reviewed and investigated promptly and fairly. + +All community leaders are obligated to respect the privacy and security of the +reporter of any incident. + +## Enforcement Guidelines + +Community leaders will follow these Community Impact Guidelines in determining +the consequences for any action they deem in violation of this Code of Conduct: + +### 1. Correction + +**Community Impact**: Use of inappropriate language or other behavior deemed +unprofessional or unwelcome in the community. + +**Consequence**: A private, written warning from community leaders, providing +clarity around the nature of the violation and an explanation of why the +behavior was inappropriate. A public apology may be requested. + +### 2. Warning + +**Community Impact**: A violation through a single incident or series of +actions. + +**Consequence**: A warning with consequences for continued behavior. No +interaction with the people involved, including unsolicited interaction with +those enforcing the Code of Conduct, for a specified period of time. This +includes avoiding interactions in community spaces as well as external channels +like social media. Violating these terms may lead to a temporary or permanent +ban. + +### 3. Temporary Ban + +**Community Impact**: A serious violation of community standards, including +sustained inappropriate behavior. + +**Consequence**: A temporary ban from any sort of interaction or public +communication with the community for a specified period of time. No public or +private interaction with the people involved, including unsolicited interaction +with those enforcing the Code of Conduct, is allowed during this period. +Violating these terms may lead to a permanent ban. + +### 4. Permanent Ban + +**Community Impact**: Demonstrating a pattern of violation of community +standards, including sustained inappropriate behavior, harassment of an +individual, or aggression toward or disparagement of classes of individuals. + +**Consequence**: A permanent ban from any sort of public interaction within the +community. + +## Attribution + +This Code of Conduct is adapted from the [Contributor Covenant][homepage], +version 2.1, available at +[https://www.contributor-covenant.org/version/2/1/code_of_conduct.html][v2.1]. + +Community Impact Guidelines were inspired by +[Mozilla's code of conduct enforcement ladder][Mozilla CoC]. + +For answers to common questions about this code of conduct, see the FAQ at +[https://www.contributor-covenant.org/faq][FAQ]. Translations are available at +[https://www.contributor-covenant.org/translations][translations]. + +[homepage]: https://www.contributor-covenant.org +[v2.1]: https://www.contributor-covenant.org/version/2/1/code_of_conduct.html +[Mozilla CoC]: https://github.com/mozilla/diversity +[FAQ]: https://www.contributor-covenant.org/faq \ No newline at end of file diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md new file mode 100644 index 0000000..12059c8 --- /dev/null +++ b/CONTRIBUTING.md @@ -0,0 +1,57 @@ +# Contributing + +### License + +PerfSpect is licensed under the terms in [LICENSE](./LICENSE). By contributing to the project, you agree to the license and copyright terms therein and release your contribution under these terms. + +### Sign your work + +Please use the sign-off line at the end of the patch. Your signature certifies that you wrote the patch or otherwise have the right to pass it on as an open-source patch. The rules are pretty simple: if you can certify +the below (from [developercertificate.org](http://developercertificate.org/)): + +``` +Developer Certificate of Origin +Version 1.1 + +Copyright (C) 2004, 2006 The Linux Foundation and its contributors. +660 York Street, Suite 102, +San Francisco, CA 94110 USA + +Everyone is permitted to copy and distribute verbatim copies of this +license document, but changing it is not allowed. + +Developer's Certificate of Origin 1.1 + +By making a contribution to this project, I certify that: + +(a) The contribution was created in whole or in part by me and I + have the right to submit it under the open source license + indicated in the file; or + +(b) The contribution is based upon previous work that, to the best + of my knowledge, is covered under an appropriate open source + license and I have the right under that license to submit that + work with modifications, whether created in whole or in part + by me, under the same open source license (unless I am + permitted to submit under a different license), as indicated + in the file; or + +(c) The contribution was provided directly to me by some other + person who certified (a), (b) or (c) and I have not modified + it. + +(d) I understand and agree that this project and the contribution + are public and that a record of the contribution (including all + personal information I submit with it, including my sign-off) is + maintained indefinitely and may be redistributed consistent with + this project or the open source license(s) involved. +``` + +Then you just add a line to every git commit message: + + Signed-off-by: Joe Smith + +Use your real name (sorry, no pseudonyms or anonymous contributions.) + +If you set your `user.name` and `user.email` git configs, you can sign your +commit automatically with `git commit -s`. \ No newline at end of file diff --git a/Makefile b/Makefile index 9262c90..e292b1f 100644 --- a/Makefile +++ b/Makefile @@ -1,24 +1,25 @@ +COMMIT_ID := $(shell git rev-parse --short=8 HEAD) +COMMIT_DATE := $(shell git show -s --format=%cd --date=short HEAD) VERSION_FILE := _version.txt +VERSION_BASE := $(COMMIT_DATE)_$(COMMIT_ID) VERSION_NUMBER := $(shell cat ${VERSION_FILE}) VERSION_PUBLIC := $(VERSION_NUMBER) -PACKAGE := perfspect_$(VERSION_NUMBER).tgz +PACKAGE_EXTERNAL := perfspect_$(VERSION_NUMBER).tgz BINARY_FINAL := perfspect BINARY_COLLECT := perf-collect BINARY_POSTPROCESS := perf-postprocess - default: all -.PHONY: all test default dist clean format format_check security_scan flakes mypy pytype source_check checkmake dist/$(PACKAGE) +.PHONY: all test default dist clean format format_check security_scan flakes source_check checkmake dist/version_file dist/$(SOURCE_PACKAGE) clean_dir: rm -rf build/* rm -rf dist/* - sudo rm -rf test/perf* + #sudo rm -rf test/$(BINARY_FINAL) rm -rf src/__pycache__ build_dir: clean_dir mkdir -p build - mkdir -p dist build/pmu-checker: cd pmu-checker && make @@ -26,76 +27,78 @@ build/pmu-checker: strip -s -p --strip-unneeded build/pmu-checker build/libtsc: - cd src && gcc -shared -o libtsc.so -fPIC calibrate.c + gcc -fno-strict-overflow -fno-delete-null-pointer-checks -fwrapv -fPIC -shared -o src/libtsc.so src/calibrate.c -build/collect: +build-public/collect: $(eval TMPDIR := $(shell mktemp -d build.XXXXXX)) mkdir -p $(TMPDIR)/src mkdir -p $(TMPDIR)/events cp src/* $(TMPDIR)/src && cp events/* $(TMPDIR)/events && cp *.py $(TMPDIR) - sed -i 's/PerfSpect_DEV_VERSION/$(VERSION_PUBLIC)/g' $(TMPDIR)/src/perf_helpers.py + sed -i 's/PerfSpect_DEV_VERSION/$(VERSION_PUBLIC)/g' $(TMPDIR)/src/perf_helpers.py cd $(TMPDIR) && pyinstaller -F perf-collect.py -n $(BINARY_COLLECT) \ --add-data "./src/libtsc.so:." \ --add-data "./events/bdx.txt:." \ --add-data "./events/skx.txt:." \ - --add-data "./events/skx_aws.txt:." \ - --add-data "./events/skx_oci.txt:." \ --add-data "./events/clx.txt:." \ - --add-data "./events/clx_aws.txt:." \ --add-data "./events/icx.txt:." \ + --add-data "./events/spr.txt:." \ --add-data "./events/icx_aws.txt:." \ - --add-data "./events/icx_oci.txt:." \ + --add-data "./events/spr_aws.txt:." \ + --add-data "./events/clx_aws.txt:." \ + --add-data "./events/skx_aws.txt:." \ --add-binary "../build/pmu-checker:." \ - --runtime-tmpdir . + --runtime-tmpdir . \ + --exclude-module readline + cp $(TMPDIR)/dist/$(BINARY_COLLECT) build/ rm -rf $(TMPDIR) -build/postprocess: +build-public/postprocess: $(eval TMPDIR := $(shell mktemp -d build.XXXXXX)) - git clone https://github.com/danthedeckie/simpleeval.git - cp simpleeval/simpleeval.py . mkdir -p $(TMPDIR)/src mkdir -p $(TMPDIR)/events cp src/* $(TMPDIR)/src && cp events/* $(TMPDIR)/events && cp *.py $(TMPDIR) - sed -i 's/PerfSpect_DEV_VERSION/$(VERSION_PUBLIC)/g' $(TMPDIR)/src/perf_helpers.py + sed -i 's/PerfSpect_DEV_VERSION/$(VERSION_PUBLIC)/g' $(TMPDIR)/src/perf_helpers.py cd $(TMPDIR) && pyinstaller -F perf-postprocess.py -n perf-postprocess \ --add-data "./events/metric_skx_clx.json:." \ --add-data "./events/metric_bdx.json:." \ --add-data "./events/metric_icx.json:." \ - --add-data="simpleeval.py:." \ - --runtime-tmpdir . + --add-data "./events/metric_spr.json:." \ + --add-data "./events/metric_icx_aws.json:." \ + --add-data "./events/metric_spr_aws.json:." \ + --runtime-tmpdir . \ + --exclude-module readline cp $(TMPDIR)/dist/perf-postprocess build/ - rm -rf simpleeval && rm -f simpleeval.py rm -rf $(TMPDIR) -dist/$(PACKAGE): build_dir build/pmu-checker build/libtsc build/collect build/postprocess - rm -rf dist/* - cp build/$(BINARY_COLLECT) dist/$(BINARY_COLLECT) - cp build/$(BINARY_POSTPROCESS) dist/$(BINARY_POSTPROCESS) - rm -rf build - +dist/$(PACKAGE_EXTERNAL): build_dir build/pmu-checker build/libtsc build-public/collect build-public/postprocess + rm -rf dist/$(BINARY_FINAL)/ + mkdir -p dist/$(BINARY_FINAL) + cp build/$(BINARY_COLLECT) dist/$(BINARY_FINAL)/$(BINARY_COLLECT) + cp build/$(BINARY_POSTPROCESS) dist/$(BINARY_FINAL)/$(BINARY_POSTPROCESS) + cp LICENSE dist/$(BINARY_FINAL)/ + cp README.md dist/$(BINARY_FINAL)/README.md + cd dist && tar -czf $(PACKAGE_EXTERNAL) $(BINARY_FINAL) + cd dist && cp -r $(BINARY_FINAL) ../build/ + rm -rf dist/$(BINARY_FINAL)/ + cd dist && md5sum $(PACKAGE_EXTERNAL) > $(PACKAGE_EXTERNAL).md5 test: - cp dist/$(BINARY_COLLECT) dist/$(BINARY_POSTPROCESS) test/ + cd dist && tar -xvf perfspect_$(VERSION_PUBLIC).tgz && cp -r $(BINARY_FINAL) ../test/. cd test && pytest -security_scan: src/*.py - bandit src - bandit *.py - format: black src black *.py format_check: black --check src - black --check *.py + black --check perf-collect.py perf-postprocess.py error_check: # ignore false positives - flake8 --ignore=E501,W503,F403,F405 src - flake8 --ignore=E203,E501,E722,W503,F403,F405 *.py + flake8 --ignore=E501,W503,F403,F405,E741 src + flake8 --ignore=E203,E501,E722,W503,F403,F405 *.py --exclude simpleeval.py,perfmon.py,average.py source_check: security_scan format_check error_check -dist: source_check dist/$(PACKAGE) - +dist: source_check dist/$(PACKAGE_EXTERNAL) diff --git a/Makefile_non_container b/Makefile_non_container deleted file mode 100644 index 6f17725..0000000 --- a/Makefile_non_container +++ /dev/null @@ -1,95 +0,0 @@ -VERSION_FILE := _version.txt -VERSION_NUMBER := $(shell cat ${VERSION_FILE}) -VERSION_PUBLIC := $(VERSION_NUMBER) -PACKAGE := perfspect_$(VERSION_NUMBER).tgz -BINARY_FINAL := perfspect -BINARY_COLLECT := perf-collect -BINARY_POSTPROCESS := perf-postprocess - -default: all - -.PHONY: all test default dist clean format format_check security_scan flakes mypy pytype source_check checkmake dist/$(PACKAGE) - -clean_dir: - sudo rm -rf build/* - rm -rf dist/* - sudo rm -rf test/perf* - rm -rf src/__pycache__ - -build_dir: clean_dir - mkdir -p build - mkdir -p dist - -build/pmu-checker: - cd pmu-checker && make - cp pmu-checker/pmu-checker build/ - strip -s -p --strip-unneeded build/pmu-checker - -build/libtsc: - cd src && gcc -shared -o libtsc.so -fPIC calibrate.c - -build/collect: - sed -i 's/PerfSpect_DEV_VERSION/$(VERSION_PUBLIC)/g' src/perf_helpers.py - pyinstaller -F perf-collect.py -n $(BINARY_COLLECT) \ - --add-data "./src/libtsc.so:." \ - --add-data "./events/bdx.txt:." \ - --add-data "./events/skx.txt:." \ - --add-data "./events/skx_aws.txt:." \ - --add-data "./events/skx_oci.txt:." \ - --add-data "./events/clx.txt:." \ - --add-data "./events/clx_aws.txt:." \ - --add-data "./events/icx.txt:." \ - --add-data "./events/icx_aws.txt:." \ - --add-data "./events/icx_oci.txt:." \ - --add-binary "./build/pmu-checker:." \ - --runtime-tmpdir . - rm -rf build/$(BINARY_COLLECT) - cp dist/$(BINARY_COLLECT) build/ - rm -rf $(TMPDIR) - -build/postprocess: - git clone https://github.com/danthedeckie/simpleeval.git - cp simpleeval/simpleeval.py . - sed -i 's/PerfSpect_DEV_VERSION/$(VERSION_PUBLIC)/g' src/perf_helpers.py - pyinstaller -F perf-postprocess.py -n perf-postprocess \ - --add-data "./events/metric_skx_clx.json:." \ - --add-data "./events/metric_bdx.json:." \ - --add-data "./events/metric_icx.json:." \ - --add-data="simpleeval.py:." \ - --runtime-tmpdir . - rm -rf build/$(BINARY_POSTPROCESS) - cp dist/$(BINARY_POSTPROCESS) build/ - rm -rf simpleeval && rm -f simpleeval.py - rm -rf $(TMPDIR) - -dist/$(PACKAGE): build_dir build/pmu-checker build/libtsc build/collect build/postprocess - rm -rf dist/* - cp build/$(BINARY_COLLECT) dist/$(BINARY_COLLECT) - cp build/$(BINARY_POSTPROCESS) dist/$(BINARY_POSTPROCESS) - rm -rf build - - -test: - cp dist/$(BINARY_COLLECT) dist/$(BINARY_POSTPROCESS) test/ - cd test && pytest - -security_scan: src/*.py - bandit src - bandit *.py - -format: - black src - black perf*.py - -format_check: - black --check src - black --check perf*.py - -error_check: # ignore false positives - flake8 --ignore=E501,W503,F403,F405 src - flake8 --ignore=E203,E501,E722,W503,F403,F405 perf*.py - -source_check: format_check error_check - -dist: source_check dist/$(PACKAGE) - diff --git a/README.md b/README.md index bc3921d..6c2a24a 100644 --- a/README.md +++ b/README.md @@ -5,6 +5,7 @@ PerfSpect is a system performance characterization tool based on linux perf targeting Intel microarchitectures. The tool has two parts + 1. perf collection to collect underlying PMU (Performance Monitoring Unit) counters 2. post processing that generates csv output of performance metrics. @@ -16,123 +17,122 @@ The tool has two parts ### Prerequisites 1. Linux perf -2. Python3+ +2. Linux cgroup-tools ## Building binaries from source code -### Containerized build -#### pre-requisites - 1. Install docker - 2. Ensure docker commands execute without sudo (for example - `docker run hello-world` runs successfully) +Requires recent python and golang. -execute build.sh -`./build.sh` -### Non-containerized build -`./non_container_build.sh` +``` +pip3 install -r requirements.txt +make dist +``` On successful build, binaries will be created in "dist" folder ### 1. Perf collection: -`(sudo) ./perf-collect (options) -- Some options can be used only with root privileges ` - ``` -Options: - -h, --help (show this help message and exit) - - -v, --version display version info - - -e EVENTFILE, --eventfile EVENTFILE (Event file containing events to collect, default=events/) +(sudo) ./perf-collect (options) -- Some options can be used only with root privileges - -i INTERVAL, --interval INTERVAL (interval in seconds for time series dump, default=1) - - -m MUXINTERVAL, --muxinterval MUXINTERVAL (event mux interval for events in ms, default=0 i.e., will use the system default. Requires root privileges) - - -o OUTCSV, --outcsv OUTCSV (perf stat output in csv format, default=results/perfstat.csv) - - -a APP, --app APP (Application to run with perf-collect, perf collection ends after workload completion) - - -p PID, --pid PID perf-collect on selected PID(s) - - -c CID, --cid CID perf-collect on selected container id(s) - - -t TIMEOUT, --timeout TIMEOUT ( perf event collection time) - - --percore (Enable per core event collection) - - --nogroups (Disable perf event grouping, events are grouped by default as in the event file) - - --dryrun (Test if Performance Monitoring Counters are in-use, and collect stats for 10sec) - - --metadata (collect system info only, does not run perf) - - -csp CLOUD, --cloud CLOUD (Name of the Cloud Service Provider(ex- AWS), if collecting on cloud instances) - - -ct CLOUDTYPE, --cloudtype CLOUDTYPE (Instance type: Options include - VM/BM depending on the instance if it's baremetal or virtual system) +Options: + -h, --help show this help message and exit + -v, --version display version info + -e EVENTFILE, --eventfile EVENTFILE + Event file containing events to collect, + default=events/ + -i INTERVAL, --interval INTERVAL + interval in seconds for time series dump, default=1 + -m MUXINTERVAL, --muxinterval MUXINTERVAL + event mux interval in milli seconds, default=0 i.e. will + use the system default + -o OUTCSV, --outcsv OUTCSV + perf stat output in csv format, + default=results/perfstat.csv + -a APP, --app APP Application to run with perf-collect, perf collection ends + after workload completion + -p PID, --pid PID perf-collect on selected PID(s) + -c CID, --cid CID perf-collect on selected container ids + -t TIMEOUT, --timeout TIMEOUT + perf event collection time + --percore Enable per core event collection + --nogroups Disable perf event grouping, events are grouped by default + as in the event file + --dryrun Test if Performance Monitoring Counters are in-use, and + collect stats for 10sec to validate event file correctness + --metadata collect system info only, does not run perf + -csp CLOUD, --cloud CLOUD + Name of the Cloud Service Provider(AWS), if collecting on + cloud instances. Currently supporting AWS and OCI + -ct CLOUDTYPE, --cloudtype CLOUDTYPE + Instance type: Options include - VM,BM +``` - ``` #### Examples + 1. sudo ./perf-collect (collect PMU counters using predefined architecture specific event file until collection is terminated) -2. sudo ./perf-collect -m 10 -t 30 (sets event multiplexing interval to 10ms and collects PMU counters for 30 seconds using default architecture specific event file) +2. sudo ./perf-collect -m 10 -t 30 (sets event multiplexing interval to 10ms and collects PMU counters for 30 seconds using default architecture specific event file) 3. sudo ./perf-collect -a "myapp.sh myparameter" (collect perf for myapp.sh) 4. sudo ./perf-collect --dryrun (checks PMU usage, and collects PMU counters for 10 seconds using default architecture specific event file) 5. sudo ./perf-collect --metadata (collect system info and PMU event info without running perf, uses default outputfile if -o option is not used) +6. sudo ./perf-collect --cid "one or more container IDs from docker or kubernetes seperated by semicolon" #### Notes 1. Intel CPUs (until Cascadelake) have 3 fixed PMUs (cpu-cycles, ref-cycles, instructions) and 4 programmable PMUs. The events are grouped in event files with this assumption. However, some of the counters may not be available on some CPUs. You can check the correctness of the event file with dryrun and check the output for anamolies. Typically output will have "not counted", "unsuppported" or zero values for cpu-cycles if number of available counters are less than events in a group. 2. Globally pinned events can limit the number of counters available for perf event groups. On X86 systems NMI watchdog pins a fixed counter by default. NMI watchdog is disabled during perf collection if run as a sudo user. If NMI watchdog can't be disabled, event grouping will be forcefully disabled to let perf driver handle event multiplexing. -### 2. Perf Postprocessing: - -`./perf-postprocess (options)` +### 2. Perf Post Processing: ``` -Options: - - -h, --help (show this help message and exit) - - -v, --version display version info - - -m METRICFILE, --metricfile METRICFILE (formula file, default=events/metric.json) - - -o OUTFILE, --outcsv OUTFILE (perf stat output file, csv or xlsx format is supported, default=results/metric_out.csv) - - --keepall (keep all intermediate csv files) - - -html HTML, --html HTML generate static HTML report - - --persocket (generate persocket metrics) +./perf-postprocess (options) - --percore (generate percore metrics) - - --epoch (time series in epoch format, default is sample count) +Options: + -h, --help show this help message and exit + --version, -v display version information + -m METRICFILE, --metricfile METRICFILE + formula file, default metric file for the architecture + -o OUTFILE, --outfile OUTFILE + perf stat outputs in csv format, + default=results/metric_out.csv + --persocket generate per socket metrics + --percore generate per core metrics + --keepall keep all intermediate csv files, use it for debug purpose + only + --epoch time series in epoch format, default is sample count + -csp CLOUD, --cloud CLOUD + Name of Cloud Service Provider(AWS), if you're intending + to postprocess on cloud instances + -html HTML, --html HTML + Static HTML report required arguments: - - -r RAWFILE, --rawfile RAWFILE (Raw CSV output from perf-collect) -``` + -r RAWFILE, --rawfile RAWFILE + Raw CSV output from perf-collect +``` #### Examples ./perf-postprocess -r results/perfstat.csv (post processes perfstat.csv and creates metric_out.csv, metric_out.average.csv, metric_out.raw.csv) +./perf-postprocess -r results/perfstat.csv --html perfstat.html (creates a report for TMA analysis and system level metric charts.) #### Notes 1. metric_out.csv : Time series dump of the metrics. The metrics are defined in events/metric.json 2. metric_out.averags.csv: Average of metrics over the collection period -3. metric_out.raw.csv: csv file with raw events normalized per second -4. Socket/core level metrics: Additonal csv files .socket.csv/.core.csv will be generated. Socket/core level data will be in added as new sheets if excel output is chosen - -## Things to note +3. metric_out.raw.csv: csv file with raw events normalized per second +4. Socket/core level metrics: Additonal csv files outputfile.socket.csv/outputfile.core.csv will be generated. Socket/core level data will be added as new sheets if excel output is chosen -1. The tool can collect only the counters supported by underlying linux perf version. -2. Current version supports Intel Icelake, Cascadelake, Skylake and Broadwell microarchitectures only. -3. Perf collection overhead will increase with increase in number of counters and/or dump interval. Using the right perf multiplexing (check perf-collection.py Notes for more details) interval to reduce overhead -4. If you run into locale issues - `UnicodeDecodeError: 'ascii' codec can't decode byte 0xc2 in position 4519: ordinal not in range(128)`, more likely the locales needs to be set appropriately. You could also try running post-process step with `LC_ALL=C.UTF-8 LANG=C.UTF-8 ./perf-postprocess -r result.csv` +## Caveats -Special thanks to Vaishali Karanth for her fantastic contributions to the project. +1. The tool can collect only the counters supported by underlying linux perf version. +2. Current version supports Intel Sapphire Rapids, Icelake, Cascadelake, Skylake and Broadwell microarchitectures only. +3. Perf collection overhead will increase with increase in number of counters and/or dump interval. Using the right perf multiplexing (check perf-collection.py Notes for more details) interval to reduce overhead +4. If you run into locale issues - `UnicodeDecodeError: 'ascii' codec can't decode byte 0xc2 in position 4519: ordinal not in range(128)`, more than likely the locales needs to be set appropriately. You could also try running post-process step with `LC_ALL=C.UTF-8 LANG=C.UTF-8 ./perf-postprocess -r result.csv` +5. The percore option is not supported while using cid. +6. The html report creation is not yet supported for cid collection. ## How to contribute + Create a pull request on github.com/intel/PerfSpect with your patch. Please make sure your patch is building without errors. A maintainer will contact you if there are questions or concerns. diff --git a/_version.txt b/_version.txt index 781dcb0..26aaba0 100644 --- a/_version.txt +++ b/_version.txt @@ -1 +1 @@ -1.1.3 +1.2.0 diff --git a/build.sh b/build.sh deleted file mode 100755 index 9720109..0000000 --- a/build.sh +++ /dev/null @@ -1,52 +0,0 @@ -#!/bin/bash - -user_in_group() -{ - groups $1 | grep -q "\b$2\b" -} - -validate_user() -{ - if user_in_group $USER docker; then - echo "The user $USER is part of docker group; continue building....." - else - printf "The user $USER isn't part of the docker group, please add, verify the group membership is re-evaluated and re-run build.sh; exiting...\n" - exit 1 - fi -} - -#check if docker is installed; exit if otherwise -if [ -x "$(command -v docker)" ]; then - #check docker engine is running - if ! docker info > /dev/null 2>&1; then - echo "This build script uses docker, and it isn't running - please start docker and try again!" - exit 1 - fi - if grep -q docker /etc/group; - then - validate_user - else - printf "The docker group doesn't exist, please create docker group, add $USER to the docker group, verify the group membership is re-evaluated and re-run build.sh; exiting...\n" - exit 1 - fi - -else - echo "please install docker on your system and re-run build.sh; exiting....\n" - exit 1 -fi - - -printf "\n ***** If you are behind proxies, please ensure proxy settings are configured at builder/Dockerfile *****\n " - -#build docker image -if ! builder/build_docker_image ; then - echo "docker image build failed" - exit 1 -fi -#build binaries -if ! builder/build ; then - echo "build failed" - exit 1 -fi - -printf "\n ***** Build successful, the binaries are located in dist folder *****\n " diff --git a/builder/Dockerfile b/builder/Dockerfile deleted file mode 100644 index a2fd19e..0000000 --- a/builder/Dockerfile +++ /dev/null @@ -1,68 +0,0 @@ -FROM ubuntu:18.04 -# if using proxy please uncomment and edit proxy config below -# ENV http_proxy -# ENV https_proxy - -ENV LANG en_US.UTF-8 -RUN rm -rf /etc/apt/sources.list.d/ubuntu-esm-infra-trusty.list -ARG DEBIAN_FRONTEND=noninteractive -RUN apt-get update && apt-get install -y sudo software-properties-common locales -RUN locale-gen en_US.UTF-8 -RUN echo "LANG=en_US.UTF-8" > /etc/default/locale - -ARG USERNAME -ARG USERID -RUN adduser --disabled-password --uid ${USERID} --gecos '' ${USERNAME} \ - && adduser ${USERNAME} sudo \ - && echo "${USERNAME} ALL=(ALL) NOPASSWD: ALL" >> /etc/sudoers - -# set up volumes -VOLUME /scripts -VOLUME /workdir - - -# USER root -RUN apt-get update --fix-missing -RUN apt-get install -y software-properties-common curl git wget build-essential autotools-dev automake gawk zlib1g-dev libtool libaio-dev libaio1 pandoc pkgconf libcap-dev -RUN add-apt-repository -y ppa:deadsnakes/ppa -RUN apt-get update && apt-get install -y python3.7 python3.7-dev python3-distutils -RUN apt-get install -y netcat-openbsd -RUN wget https://golang.org/dl/go1.13.4.linux-amd64.tar.gz -RUN tar -C /usr/local -xzf go1.13.4.linux-amd64.tar.gz -ENV PATH="$PATH:/usr/local/go/bin" -RUN wget https://storage.googleapis.com/shellcheck/shellcheck-v0.7.0.linux.x86_64.tar.xz -RUN tar -xf shellcheck-v0.7.0.linux.x86_64.tar.xz -RUN cp shellcheck-v0.7.0/shellcheck /usr/bin/ -RUN go get github.com/mrtazz/checkmake -ENV BUILDER_NAME="builder" -ENV BUILDER_EMAIL="builder@company.com" -RUN cd /root/go/src/github.com/mrtazz/checkmake && make && cp checkmake /usr/local/bin/ -RUN curl https://bootstrap.pypa.io/get-pip.py | python3.7 -RUN rm -rf /usr/lib/python3/dist-packages/yaml -RUN rm -rf /usr/lib/python3/dist-packages/PyYAML-* -RUN pip3 install PyYaml>=5.1.2 -RUN pip3 install pandas -RUN pip3 install pyinstaller==4.5.1 -RUN pip3 install black -RUN pip3 install bandit -RUN pip3 install flake8 -RUN pip3 install mypy -RUN pip3 install pytype -RUN pip3 install pytest -RUN pip3 install xlsxwriter -RUN pip3 install python-dateutil -COPY requirements.txt / -RUN pip3 install -r requirements.txt -RUN pip3 install --upgrade 'setuptools<45.0.0' -RUN apt-get update && apt-get install -y linux-tools-generic -RUN go get github.com/markbates/pkger/cmd/pkger -RUN cd /root/go/bin && cp pkger /usr/local/bin/ -ENV GOCACHE=/tmp -ENV GOPATH=/tmp - -# Run container as non-root user from here onwards -# so that build output files have the correct owner -USER ${USERNAME} - -# run bash script and process the input command -ENTRYPOINT [ "/bin/bash", "/scripts/entrypoint"] diff --git a/builder/build b/builder/build deleted file mode 100755 index 981de1e..0000000 --- a/builder/build +++ /dev/null @@ -1,11 +0,0 @@ -#!/usr/bin/env bash - -docker container run \ - --volume "$(pwd)"/builder/scripts:/scripts \ - --volume "$(pwd)":/workdir \ - --volume $HOME:$HOME:ro \ - --user $(id -u):$(id -g) \ - --rm \ - --name build_perfspect \ - perfspect_builder:v1 \ - build diff --git a/builder/build_docker_image b/builder/build_docker_image deleted file mode 100755 index 4637bd5..0000000 --- a/builder/build_docker_image +++ /dev/null @@ -1,9 +0,0 @@ -#!/usr/bin/env bash -# command to build: provide architecture(x86/arm) as a parameter to build - -docker image build \ - --build-arg USERNAME="${USER}" \ - --build-arg USERID="$(id -u ${USER})" \ - --file builder/Dockerfile \ - --tag perfspect_builder:v1 \ - . diff --git a/builder/scripts/entrypoint b/builder/scripts/entrypoint deleted file mode 100644 index 1703fec..0000000 --- a/builder/scripts/entrypoint +++ /dev/null @@ -1,10 +0,0 @@ -if [ "$1" = "shell" ]; then - echo "Starting Bash Shell" - /bin/bash -elif [ "$1" = "build" ]; then - echo "Starting Build" - cd workdir && make dist -elif [ "$1" = "test" ]; then - echo "Starting Tests" - cd workdir && make test -fi diff --git a/builder/shell b/builder/shell deleted file mode 100755 index 993229f..0000000 --- a/builder/shell +++ /dev/null @@ -1,12 +0,0 @@ -#!/usr/bin/env bash - -docker container run \ - --volume "$(pwd)"/builder/scripts:/scripts \ - --volume "$(pwd)":/workdir \ - --volume $HOME:$HOME:ro \ - --user $(id -u):$(id -g) \ - --rm \ - -it \ - --name build_perfspect \ - perfspect_builder:v1 \ - shell \ No newline at end of file diff --git a/builder/test b/builder/test deleted file mode 100755 index 800f261..0000000 --- a/builder/test +++ /dev/null @@ -1,9 +0,0 @@ -#!/usr/bin/env bash - -docker container run \ - --volume "$(pwd)"/builder/scripts:/scripts \ - --volume "$(pwd)":/workdir \ - --rm \ - --name build_perfspect \ - perfspect_builder:v1 \ - test \ No newline at end of file diff --git a/events/bdx.txt b/events/bdx.txt index 01fe10c..8ce30bc 100644 --- a/events/bdx.txt +++ b/events/bdx.txt @@ -1,5 +1,5 @@ ########################################################################################################### -# Copyright (C) 2021 Intel Corporation +# Copyright (C) 2021-2023 Intel Corporation # SPDX-License-Identifier: BSD-3-Clause ########################################################################################################### diff --git a/events/clx.txt b/events/clx.txt index 069ed7e..e0b18ee 100644 --- a/events/clx.txt +++ b/events/clx.txt @@ -1,5 +1,5 @@ ########################################################################################################### -# Copyright (C) 2021 Intel Corporation +# Copyright (C) 2021-2023 Intel Corporation # SPDX-License-Identifier: BSD-3-Clause ########################################################################################################### diff --git a/events/clx_aws.txt b/events/clx_aws.txt index a527208..d963db1 100644 --- a/events/clx_aws.txt +++ b/events/clx_aws.txt @@ -1,3 +1,8 @@ +########################################################################################################### +# Copyright (C) 2021-2023 Intel Corporation +# SPDX-License-Identifier: BSD-3-Clause +########################################################################################################### + # Cascadelake event list for AWS instances, includes events needed for TMAM metrics cpu/event=0x51,umask=0x01,period=2000003,name='L1D.REPLACEMENT'/, diff --git a/events/icx.txt b/events/icx.txt index ff4e094..fdbb182 100644 --- a/events/icx.txt +++ b/events/icx.txt @@ -1,5 +1,5 @@ ########################################################################################################### -# Copyright (C) 2021 Intel Corporation +# Copyright (C) 2021-2023 Intel Corporation # SPDX-License-Identifier: BSD-3-Clause ########################################################################################################### @@ -118,8 +118,11 @@ cpu/event=0xb7,umask=0x01,offcore_rsp=0x8003C0001,name='OCR.DEMAND_DATA_RD.L3_HI cpu-cycles, ref-cycles; +# OCR group 1 (ICX PMU supports a maximum of two OCR counters per group) cpu/event=0xb7,umask=0x01,offcore_rsp=0x104000477,name='OCR.READS_TO_CORE.LOCAL_DRAM'/, -cpu/event=0xb7,umask=0x01,offcore_rsp=0x730000477,name='OCR.READS_TO_CORE.REMOTE_DRAM'/, +cpu/event=0xb7,umask=0x01,offcore_rsp=0x730000477,name='OCR.READS_TO_CORE.REMOTE_DRAM'/; + +# OCR group 2 (ICX PMU supports a maximum of two OCR counters per group) cpu/event=0xb7,umask=0x01,offcore_rsp=0x84002380,name='OCR.HWPF_L3.L3_MISS_LOCAL'/, cpu/event=0xb7,umask=0x01,offcore_rsp=0x90002380,name='OCR.HWPF_L3.REMOTE'/; @@ -157,4 +160,4 @@ cha/event=0x00,umask=0x00,name='UNC_CHA_CLOCKTICKS'/; #memory read/writes imc/event=0x04,umask=0x0f,name='UNC_M_CAS_COUNT.RD'/, -imc/event=0x04,umask=0x30,name='UNC_M_CAS_COUNT.WR'/; +imc/event=0x04,umask=0x30,name='UNC_M_CAS_COUNT.WR'/; \ No newline at end of file diff --git a/events/icx_aws.txt b/events/icx_aws.txt index a846a97..043383f 100644 --- a/events/icx_aws.txt +++ b/events/icx_aws.txt @@ -1,5 +1,5 @@ ########################################################################################################### -# Copyright (C) 2021 Intel Corporation +# Copyright (C) 2021-2023 Intel Corporation # SPDX-License-Identifier: BSD-3-Clause ########################################################################################################### diff --git a/events/icx_oci.txt b/events/icx_oci.txt index 125c505..b4ab72f 100644 --- a/events/icx_oci.txt +++ b/events/icx_oci.txt @@ -1,3 +1,8 @@ +########################################################################################################### +# Copyright (C) 2021-2023 Intel Corporation +# SPDX-License-Identifier: BSD-3-Clause +########################################################################################################### + # Icelake event list for OCI instances cpu/event=0x51,umask=0x01,period=100003,name='L1D.REPLACEMENT'/, diff --git a/events/metric_bdx.json b/events/metric_bdx.json index 0415866..a606a23 100644 --- a/events/metric_bdx.json +++ b/events/metric_bdx.json @@ -1,333 +1,331 @@ [ - { - "name" : "metric_CPU operating frequency (in GHz)", - "expression" : "([cpu-cycles] / [ref-cycles]) * ([const_tsc_freq] / 1000000000)" - }, - { - "name" : "metric_CPU utilization %", - "expression" : "100 * [ref-cycles] / [const_TSC]" - }, - { - "name" : "metric_CPU utilization% in kernel mode", - "expression" : "100 * [ref-cycles:k] / [const_TSC]" - }, - { - "name" : "metric_CPI", - "expression" : "[cpu-cycles] / [instructions]" - }, - { - "name" : "metric_kernel_CPI", - "expression" : "[cpu-cycles:k] / [instructions:k]" - }, - { - "name" : "metric_L1D MPI (includes data+rfo w/ prefetches)", - "tags" : "transaction", - "expression" : "[L1D.REPLACEMENT] / [instructions]" - }, - { - "name" : "metric_L1D demand data read hits per instr", - "expression" : "[MEM_LOAD_RETIRED.L1_HIT] / [instructions]" - }, - { - "name" : "metric_L1-I code read misses (w/ prefetches) per instr", - "expression" : "[L2_RQSTS.ALL_CODE_RD] / [instructions]" - }, - { - "name" : "metric_L2 demand data read hits per instr", - "expression" : "[MEM_LOAD_UOPS_RETIRED.L2_HIT] / [instructions]" - }, - { - "name" : "metric_L2 MPI (includes code+data+rfo w/ prefetches)", - "expression" : "[L2_LINES_IN.ALL] / [instructions]" - }, - { - "name" : "metric_L2 demand data read MPI", - "expression" : "[MEM_LOAD_UOPS_RETIRED.L2_MISS] / [instructions]" - }, - { - "name" : "metric_L2 demand code MPI", - "expression" : "[L2_RQSTS.CODE_RD_MISS] / [instructions]" - }, - { - "name" : "metric_LLC MPI", - "expression" : "([UNC_C_TOR_INSERTS.MISS_OPCODE.0x180] + [UNC_C_TOR_INSERTS.MISS_OPCODE.0x181] + [UNC_C_TOR_INSERTS.MISS_OPCODE.0x182] + [UNC_C_TOR_INSERTS.MISS_OPCODE.0x190] + [UNC_C_TOR_INSERTS.MISS_OPCODE.0x191] + [UNC_C_TOR_INSERTS.MISS_OPCODE.0x192] - [UNC_C_TOR_INSERTS.MISS_OPCODE.tid.0x180]) / [instructions]" - }, - { - "name" : "metric_LLC code read MPI (demand+prefetch)", - "expression" : "([UNC_C_TOR_INSERTS.MISS_OPCODE.0x181] + [UNC_C_TOR_INSERTS.MISS_OPCODE.0x191]) / [instructions]" - }, - { - "name" : "metric_LLC data read MPI (demand+prefetch)", - "expression" : "([UNC_C_TOR_INSERTS.MISS_OPCODE.0x182] + [UNC_C_TOR_INSERTS.MISS_OPCODE.0x192]) / [instructions]" - }, - { - "name" : "metric_LLC total HITM (per instr)", - "expression" : "[OCR.ALL_READS.L3_MISS.REMOTE_HITM] / [instructions]" - }, - { - "name" : "metric_LLC total HIT clean line forwards (per instr)", - "expression" : "[OCR.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD] / [instructions]" - }, - { - "name" : "metric_Average LLC data read miss latency (in clks)", - "expression" : "[UNC_C_TOR_OCCUPANCY.MISS_OPCODE.0x182] / [UNC_C_TOR_INSERTS.MISS_OPCODE.0x182]" - }, - { - "name" : "metric_Average LLC data read miss latency (in ns)", - "expression" : "(1000000000 * [UNC_C_TOR_OCCUPANCY.MISS_OPCODE.0x182] / [UNC_C_TOR_INSERTS.MISS_OPCODE.0x182]) / ([UNC_C_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]) )" - }, - { - "name" : "metric_Average LLC data read miss latency for LOCAL requests (in ns)", - "expression" : "(1000000000 * [UNC_C_TOR_OCCUPANCY.MISS_LOCAL_OPCODE.0x182] / [UNC_C_TOR_INSERTS.MISS_LOCAL_OPCODE.0x182]) / ([UNC_C_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]))" - }, - { - "name" : "metric_Average LLC data read miss latency for REMOTE requests (in ns)", - "expression" : "(1000000000 * [UNC_C_TOR_OCCUPANCY.MISS_REMOTE_OPCODE.0x182] / [UNC_C_TOR_INSERTS.MISS_REMOTE_OPCODE.0x182]) / ([UNC_C_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]))" - }, - { - "name" : "metric_ITLB MPI", - "expression" : "[ITLB_MISSES.WALK_COMPLETED] / [instructions]" - }, - { - "name" : "metric_ITLB large page MPI", - "expression" : "[ITLB_MISSES.WALK_COMPLETED_2M_4M] / [instructions]" - }, - { - "name" : "metric_DTLB load MPI", - "expression" : "[DTLB_LOAD_MISSES.WALK_COMPLETED] / [instructions]" - }, - { - "name" : "metric_DTLB 2MB large page load MPI", - "expression" : "[DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M] / [instructions]" - }, - { - "name" : "metric_DTLB store MPI", - "expression" : "[DTLB_STORE_MISSES.WALK_COMPLETED] / [instructions]" - }, - { - "name" : "metric_DTLB load miss latency (in core clks)", - "expression" : "[DTLB_LOAD_MISSES.WALK_DURATION] / [DTLB_LOAD_MISSES.WALK_COMPLETED]" - }, - { - "name" : "metric_DTLB store miss latency (in core clks)", - "expression" : "[DTLB_STORE_MISSES.WALK_DURATION] / [DTLB_STORE_MISSES.WALK_COMPLETED]" - }, - { - "name" : "metric_NUMA %_Reads addressed to local DRAM", - "expression" : "100 * [UNC_C_TOR_INSERTS.MISS_LOCAL_OPCODE.0x182] / ([UNC_C_TOR_INSERTS.MISS_LOCAL_OPCODE.0x182] + [UNC_C_TOR_INSERTS.MISS_REMOTE_OPCODE.0x182])" - }, - { - "name" : "metric_NUMA %_Reads addressed to remote DRAM", - "expression" : "100 * [UNC_C_TOR_INSERTS.MISS_REMOTE_OPCODE.0x182] / ([UNC_C_TOR_INSERTS.MISS_LOCAL_OPCODE.0x182] + [UNC_C_TOR_INSERTS.MISS_REMOTE_OPCODE.0x182])" - }, - { - "name" : "metric_uncore frequency GHz", - "expression" : "[UNC_C_CLOCKTICKS] / ([const_core_count] * [const_socket_count]) / 1000000000" - }, - { - "name" : "metric_package power (watts)", - "expression" : "[power/energy-pkg/]" - }, - { - "name" : "metric_DRAM power (watts)", - "expression" : "[power/energy-ram/]" - }, - { - "name" : "metric_core c6 residency %", - "expression" : "100 * [cstate_core/c6-residency/] / [const_TSC]" - }, - { - "name" : "metric_package c6 residency %", - "expression" : "100 * [cstate_pkg/c6-residency/] * [const_core_count] / [const_TSC]" - }, - { - "name" : "metric_memory bandwidth read (MB/sec)", - "expression" : "[UNC_M_CAS_COUNT.RD] * 64 / 1000000" - }, - { - "name" : "metric_memory bandwidth write (MB/sec)", - "expression" : "[UNC_M_CAS_COUNT.WR] * 64 / 1000000" - }, - { - "name" : "metric_memory bandwidth total (MB/sec)", - "expression" : "([UNC_M_CAS_COUNT.RD] + [UNC_M_CAS_COUNT.WR]) * 64 / 1000000" - }, - { - "name" : "metric_UPI Data transmit BW (MB/sec) (only data)", - "expression" : "([UNC_Q_TxL_FLITS_G0.DATA]) * 8 / 1000000" - }, - { - "name" : "metric_UPI Data transmit BW (MB/sec) (includes control)", - "expression" : "([UNC_Q_TxL_FLITS_G0.DATA] + [UNC_Q_TxL_FLITS_G0.NON_DATA]) * 8 / 1000000" - }, - { - "name" : "metric_UPI Transmit utilization_% (includes control)", - "expression" : "([UNC_Q_TxL_FLITS_G0.DATA] + [UNC_Q_TxL_FLITS_G0.NON_DATA]) * 100 / [UNC_Q_CLOCKTICKS]" - }, - { - "name" : "metric_IO_bandwidth_disk_or_network_writes (MB/sec)", - "expression" : "[UNC_C_TOR_INSERTS.OPCODE.0x19e] * 64 / 1000000" - }, - { - "name" : "metric_IO_bandwidth_disk_or_network_reads (MB/sec)", - "expression" : "([UNC_C_TOR_INSERTS.OPCODE.0x1c8] + [UNC_C_TOR_INSERTS.OPCODE.0x180]) * 64 / 1000000" - }, - { - "name" : "metric_TMAM_Info_cycles_both_threads_active(%)", - "expression" : "100 * ( (1 - ([CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE] / ([CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY] / 2)) ) if [const_thread_count] > 1 else 0)" - }, - { - "name" : "metric_TMAM_Info_CoreIPC", - "expression" : "[instructions] / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" - }, - { - "name" : "metric_TMAM_Frontend_Bound(%)", - "expression" : "100 * [IDQ_UOPS_NOT_DELIVERED.CORE] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))" - }, - { - "name" : "metric_TMAM_..Frontend_Latency(%)", - "expression" : "100 * [IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" - }, - { - "name" : "metric_TMAM_....ICache_Misses(%)", - "expression" : "100 * [ICACHE.IFDATA_STALL] / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_....ITLB_Misses(%)", - "expression" : "100 * ((14 * [ITLB_MISSES.STLB_HIT]) + [ITLB_MISSES.WALK_DURATION_c1] + (7 * [ITLB_MISSES.WALK_COMPLETED] )) / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_....Branch_Resteers(%)", - "expression" : "100 * (([RS_EVENTS.EMPTY_CYCLES] - [ICACHE.IFDATA_STALL] - (14 * [ITLB_MISSES.STLB_HIT] + [ITLB_MISSES.WALK_DURATION_c1] + 7 * [ITLB_MISSES.WALK_COMPLETED])) / [RS_EVENTS.EMPTY_END]) * ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT] + [BACLEARS.ANY]) / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_....DSB_Switches(%)", - "expression" : "100 * 2 * [DSB2MITE_SWITCHES.PENALTY_CYCLES] / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_....MS_Switches(%)", - "expression" : "100 * 2 * [IDQ.MS_SWITCHES] / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_..Frontend_Bandwidth(%)", - "expression" : "100 * ([IDQ_UOPS_NOT_DELIVERED.CORE] - (4 * [IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE])) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" - }, - { - "name" : "metric_TMAM_Bad_Speculation(%)", - "expression" : "100 * ([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + ((4 * [INT_MISC.RECOVERY_CYCLES_ANY]) / [const_thread_count])) / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])) " - }, - { - "name" : "metric_TMAM_..Branch_Mispredicts(%)", - "expression" : "([BR_MISP_RETIRED.ALL_BRANCHES] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT])) * 100 * ([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + (4 * [INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count])) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" - }, - { - "name" : "metric_TMAM_..Machine_Clears(%)", - "expression" : "([MACHINE_CLEARS.COUNT] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT])) * 100 * ([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + (4 * [INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count])) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" - }, - { - "name" : "metric_TMAM_Backend_bound(%)", - "expression" : "100 - (100 * ([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + 4 * ([INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count]) + [IDQ_UOPS_NOT_DELIVERED.CORE] + [UOPS_RETIRED.RETIRE_SLOTS]) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])) " - }, - { - "name" : "metric_TMAM_..Memory_Bound(%)", - "expression" : "100 * (1 - (([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + 4 * ([INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count]) + [IDQ_UOPS_NOT_DELIVERED.CORE] + [UOPS_RETIRED.RETIRE_SLOTS]) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))) * ([CYCLE_ACTIVITY.STALLS_MEM_ANY] + [RESOURCE_STALLS.SB]) / ([CYCLE_ACTIVITY.STALLS_TOTAL] + [UOPS_EXECUTED.CYCLES_GE_1_UOPS_EXEC] - ( [UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC] if ([instructions] / [cpu-cycles]) > 1.8 else [UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC]) - ( [RS_EVENTS.EMPTY_CYCLES] if ([IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / [CPU_CLK_UNHALTED.THREAD_ANY]) > 0.1 else 0) + [RESOURCE_STALLS.SB])" - }, - { - "name" : "metric_TMAM_....L1_Bound(%)", - "expression" : "100 * ([CYCLE_ACTIVITY.STALLS_MEM_ANY] - [CYCLE_ACTIVITY.STALLS_L1D_MISS]) / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_......DTLB_Load(%)", - "expression" : "100 * ([DTLB_LOAD_MISSES.STLB_HIT] * 8 + [DTLB_LOAD_MISSES.WALK_DURATION_c1] + 7 * [DTLB_LOAD_MISSES.WALK_COMPLETED]) / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_......Store_Fwd_Blk(%)", - "expression" : "100 * (13 * [LD_BLOCKS.STORE_FORWARD]) / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_....L2_Bound(%)", - "expression" : "100 * ([CYCLE_ACTIVITY.STALLS_L1D_MISS] - [CYCLE_ACTIVITY.STALLS_L2_MISS]) / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_....L3_Bound(%)", - "expression" : "100 * [MEM_LOAD_UOPS_RETIRED.L3_HIT] / ([MEM_LOAD_UOPS_RETIRED.L3_HIT] + 7 * [MEM_LOAD_UOPS_RETIRED.L3_MISS]) * ([CYCLE_ACTIVITY.STALLS_L2_MISS] / [cpu-cycles])" - }, - { - "name" : "metric_TMAM_......L3_Latency(%)", - "expression" : "100 * 41 * [MEM_LOAD_UOPS_RETIRED.L3_HIT] * ( 1 + [MEM_LOAD_UOPS_RETIRED.HIT_LFB] / ( [MEM_LOAD_UOPS_RETIRED.L2_HIT] + [MEM_LOAD_UOPS_RETIRED.L3_HIT] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HIT] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HITM] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_MISS] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.LOCAL_DRAM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_DRAM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_HITM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_FWD] ) ) / [cpu-cycles] " - }, - { - "name" : "metric_TMAM_......Contested_Accesses(%)", - "expression" : "100 * 60 * ([MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HITM] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_MISS]) * ( 1 + [MEM_LOAD_UOPS_RETIRED.HIT_LFB] / ( [MEM_LOAD_UOPS_RETIRED.L2_HIT] + [MEM_LOAD_UOPS_RETIRED.L3_HIT] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HIT] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HITM] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_MISS] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.LOCAL_DRAM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_DRAM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_HITM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_FWD] ) ) / [cpu-cycles] " - }, - { - "name" : "metric_TMAM_......Data_Sharing(%)", - "expression" : "100 * 43 * [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HIT] * ( 1 + [MEM_LOAD_UOPS_RETIRED.HIT_LFB] / ( [MEM_LOAD_UOPS_RETIRED.L2_HIT] + [MEM_LOAD_UOPS_RETIRED.L3_HIT] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HIT] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HITM] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_MISS] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.LOCAL_DRAM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_DRAM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_HITM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_FWD] ) ) / [cpu-cycles] " - }, - { - "name" : "metric_TMAM_......SQ_Full(%)", - "expression" : "100 * ([OFFCORE_REQUESTS_BUFFER.SQ_FULL] / [const_thread_count]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" - }, - { - "name" : "metric_TMAM_....MEM_Bound(%)", - "expression" : "100 * (1 - ( [MEM_LOAD_UOPS_RETIRED.L3_HIT] / ([MEM_LOAD_UOPS_RETIRED.L3_HIT] + 7 * [MEM_LOAD_UOPS_RETIRED.L3_MISS])) ) * ([CYCLE_ACTIVITY.STALLS_L2_MISS] / [cpu-cycles])" - }, - { - "name" : "metric_TMAM_......MEM_Bandwidth(%)", - "expression" : "100 * (min([OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD_c4], [cpu-cycles])) / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_......MEM_Latency(%)", - "expression" : "100 * (min([OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD], [cpu-cycles]) - min([OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD_c4], [cpu-cycles])) / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_....Stores_Bound(%)", - "expression" : "100 * [RESOURCE_STALLS.SB] / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_......DTLB_Store(%)", - "expression" : "100 * (7 * [DTLB_STORE_MISSES.STLB_HIT] + [DTLB_STORE_MISSES.WALK_DURATION_c1]) / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_..Core_Bound(%)", - "expression" : "100 * ( 1 - (( [UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + 4 * ([INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count]) + [IDQ_UOPS_NOT_DELIVERED.CORE] + [UOPS_RETIRED.RETIRE_SLOTS] ) / ( 4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))) * (1 - (([CYCLE_ACTIVITY.STALLS_MEM_ANY] + [RESOURCE_STALLS.SB]) / ([CYCLE_ACTIVITY.STALLS_TOTAL] + [UOPS_EXECUTED.CYCLES_GE_1_UOPS_EXEC] - ( [UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC] if ([instructions] / [cpu-cycles]) > 1.8 else [UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC]) - ([RS_EVENTS.EMPTY_CYCLES] if ([IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / [CPU_CLK_UNHALTED.THREAD_ANY]) > 0.1 else 0) + [RESOURCE_STALLS.SB])))" - }, - { - "name" : "metric_TMAM_....Divider(%)", - "expression" : "100 * [ARITH.FPU_DIV_ACTIVE] / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" - }, - { - "name" : "metric_TMAM_....Ports_Utilization(%)", - "expression" : "100 * (( [CYCLE_ACTIVITY.STALLS_TOTAL] + [UOPS_EXECUTED.CYCLES_GE_1_UOPS_EXEC] - ([UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC] if ([instructions] / [cpu-cycles]) > 1.8 else [UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC]) - ([RS_EVENTS.EMPTY_CYCLES] if ([IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / [CPU_CLK_UNHALTED.THREAD_ANY]) > 0.1 else 0) + [RESOURCE_STALLS.SB]) - [RESOURCE_STALLS.SB] - [CYCLE_ACTIVITY.STALLS_MEM_ANY] ) /[cpu-cycles]" - }, - { - "name" : "metric_TMAM_......0_Port_Utilized(%)", - "expression" : "100 * (([UOPS_EXECUTED.CORE_i1_c1] / [const_thread_count]) if ([const_thread_count] > 1) else ([RS_EVENTS.EMPTY_CYCLES] if ([CYCLE_ACTIVITY.STALLS_TOTAL] - ([IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])) ) > 0.1 else 0)) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]) " - }, - { - "name" : "metric_TMAM_......1_Port_Utilized(%)", - "expression" : "100 * (([UOPS_EXECUTED.CORE_c1] - [UOPS_EXECUTED.CORE_c2]) / [const_thread_count]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" - }, - { - "name" : "metric_TMAM_......2_Port_Utilized(%)", - "expression" : "100 * (([UOPS_EXECUTED.CORE_c2] - [UOPS_EXECUTED.CORE_c3]) / [const_thread_count]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" - }, - { - "name" : "metric_TMAM_......3m_Ports_Utilized(%)", - "expression" : "100 * ([UOPS_EXECUTED.CORE_c3] / [const_thread_count]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" - }, - { - "name" : "metric_TMAM_Retiring(%)", - "expression" : "100 * [UOPS_RETIRED.RETIRE_SLOTS] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))" - }, - { - "name" : "metric_TMAM_..Base(%)", - "expression" : "100 *(([UOPS_RETIRED.RETIRE_SLOTS] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))) - (([UOPS_RETIRED.RETIRE_SLOTS] / [UOPS_ISSUED.ANY]) * [IDQ.MS_UOPS] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))))" - }, - { - "name" : "metric_TMAM_..Microcode_Sequencer(%)", - "expression" : "100 * (([UOPS_RETIRED.RETIRE_SLOTS] / [UOPS_ISSUED.ANY]) * [IDQ.MS_UOPS] )/ (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))" - } - -] - + { + "name": "metric_CPU operating frequency (in GHz)", + "expression": "([cpu-cycles] / [ref-cycles]) * ([const_tsc_freq] / 1000000000)" + }, + { + "name": "metric_CPU utilization %", + "expression": "100 * [ref-cycles] / [const_TSC]" + }, + { + "name": "metric_CPU utilization% in kernel mode", + "expression": "100 * [ref-cycles:k] / [const_TSC]" + }, + { + "name": "metric_CPI", + "expression": "[cpu-cycles] / [instructions]" + }, + { + "name": "metric_kernel_CPI", + "expression": "[cpu-cycles:k] / [instructions:k]" + }, + { + "name": "metric_L1D MPI (includes data+rfo w/ prefetches)", + "tags": "transaction", + "expression": "[L1D.REPLACEMENT] / [instructions]" + }, + { + "name": "metric_L1D demand data read hits per instr", + "expression": "[MEM_LOAD_RETIRED.L1_HIT] / [instructions]" + }, + { + "name": "metric_L1-I code read misses (w/ prefetches) per instr", + "expression": "[L2_RQSTS.ALL_CODE_RD] / [instructions]" + }, + { + "name": "metric_L2 demand data read hits per instr", + "expression": "[MEM_LOAD_UOPS_RETIRED.L2_HIT] / [instructions]" + }, + { + "name": "metric_L2 MPI (includes code+data+rfo w/ prefetches)", + "expression": "[L2_LINES_IN.ALL] / [instructions]" + }, + { + "name": "metric_L2 demand data read MPI", + "expression": "[MEM_LOAD_UOPS_RETIRED.L2_MISS] / [instructions]" + }, + { + "name": "metric_L2 demand code MPI", + "expression": "[L2_RQSTS.CODE_RD_MISS] / [instructions]" + }, + { + "name": "metric_LLC MPI", + "expression": "([UNC_C_TOR_INSERTS.MISS_OPCODE.0x180] + [UNC_C_TOR_INSERTS.MISS_OPCODE.0x181] + [UNC_C_TOR_INSERTS.MISS_OPCODE.0x182] + [UNC_C_TOR_INSERTS.MISS_OPCODE.0x190] + [UNC_C_TOR_INSERTS.MISS_OPCODE.0x191] + [UNC_C_TOR_INSERTS.MISS_OPCODE.0x192] - [UNC_C_TOR_INSERTS.MISS_OPCODE.tid.0x180]) / [instructions]" + }, + { + "name": "metric_LLC code read MPI (demand+prefetch)", + "expression": "([UNC_C_TOR_INSERTS.MISS_OPCODE.0x181] + [UNC_C_TOR_INSERTS.MISS_OPCODE.0x191]) / [instructions]" + }, + { + "name": "metric_LLC data read MPI (demand+prefetch)", + "expression": "([UNC_C_TOR_INSERTS.MISS_OPCODE.0x182] + [UNC_C_TOR_INSERTS.MISS_OPCODE.0x192]) / [instructions]" + }, + { + "name": "metric_LLC total HITM (per instr)", + "expression": "[OCR.ALL_READS.L3_MISS.REMOTE_HITM] / [instructions]" + }, + { + "name": "metric_LLC total HIT clean line forwards (per instr)", + "expression": "[OCR.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD] / [instructions]" + }, + { + "name": "metric_Average LLC data read miss latency (in clks)", + "expression": "[UNC_C_TOR_OCCUPANCY.MISS_OPCODE.0x182] / [UNC_C_TOR_INSERTS.MISS_OPCODE.0x182]" + }, + { + "name": "metric_Average LLC data read miss latency (in ns)", + "expression": "(1000000000 * [UNC_C_TOR_OCCUPANCY.MISS_OPCODE.0x182] / [UNC_C_TOR_INSERTS.MISS_OPCODE.0x182]) / ([UNC_C_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]) )" + }, + { + "name": "metric_Average LLC data read miss latency for LOCAL requests (in ns)", + "expression": "(1000000000 * [UNC_C_TOR_OCCUPANCY.MISS_LOCAL_OPCODE.0x182] / [UNC_C_TOR_INSERTS.MISS_LOCAL_OPCODE.0x182]) / ([UNC_C_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]))" + }, + { + "name": "metric_Average LLC data read miss latency for REMOTE requests (in ns)", + "expression": "(1000000000 * [UNC_C_TOR_OCCUPANCY.MISS_REMOTE_OPCODE.0x182] / [UNC_C_TOR_INSERTS.MISS_REMOTE_OPCODE.0x182]) / ([UNC_C_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]))" + }, + { + "name": "metric_ITLB MPI", + "expression": "[ITLB_MISSES.WALK_COMPLETED] / [instructions]" + }, + { + "name": "metric_ITLB large page MPI", + "expression": "[ITLB_MISSES.WALK_COMPLETED_2M_4M] / [instructions]" + }, + { + "name": "metric_DTLB load MPI", + "expression": "[DTLB_LOAD_MISSES.WALK_COMPLETED] / [instructions]" + }, + { + "name": "metric_DTLB 2MB large page load MPI", + "expression": "[DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M] / [instructions]" + }, + { + "name": "metric_DTLB store MPI", + "expression": "[DTLB_STORE_MISSES.WALK_COMPLETED] / [instructions]" + }, + { + "name": "metric_DTLB load miss latency (in core clks)", + "expression": "[DTLB_LOAD_MISSES.WALK_DURATION] / [DTLB_LOAD_MISSES.WALK_COMPLETED]" + }, + { + "name": "metric_DTLB store miss latency (in core clks)", + "expression": "[DTLB_STORE_MISSES.WALK_DURATION] / [DTLB_STORE_MISSES.WALK_COMPLETED]" + }, + { + "name": "metric_NUMA %_Reads addressed to local DRAM", + "expression": "100 * [UNC_C_TOR_INSERTS.MISS_LOCAL_OPCODE.0x182] / ([UNC_C_TOR_INSERTS.MISS_LOCAL_OPCODE.0x182] + [UNC_C_TOR_INSERTS.MISS_REMOTE_OPCODE.0x182])" + }, + { + "name": "metric_NUMA %_Reads addressed to remote DRAM", + "expression": "100 * [UNC_C_TOR_INSERTS.MISS_REMOTE_OPCODE.0x182] / ([UNC_C_TOR_INSERTS.MISS_LOCAL_OPCODE.0x182] + [UNC_C_TOR_INSERTS.MISS_REMOTE_OPCODE.0x182])" + }, + { + "name": "metric_uncore frequency GHz", + "expression": "[UNC_C_CLOCKTICKS] / ([const_core_count] * [const_socket_count]) / 1000000000" + }, + { + "name": "metric_package power (watts)", + "expression": "[power/energy-pkg/]" + }, + { + "name": "metric_DRAM power (watts)", + "expression": "[power/energy-ram/]" + }, + { + "name": "metric_core c6 residency %", + "expression": "100 * [cstate_core/c6-residency/] / [const_TSC]" + }, + { + "name": "metric_package c6 residency %", + "expression": "100 * [cstate_pkg/c6-residency/] * [const_core_count] / [const_TSC]" + }, + { + "name": "metric_memory bandwidth read (MB/sec)", + "expression": "[UNC_M_CAS_COUNT.RD] * 64 / 1000000" + }, + { + "name": "metric_memory bandwidth write (MB/sec)", + "expression": "[UNC_M_CAS_COUNT.WR] * 64 / 1000000" + }, + { + "name": "metric_memory bandwidth total (MB/sec)", + "expression": "([UNC_M_CAS_COUNT.RD] + [UNC_M_CAS_COUNT.WR]) * 64 / 1000000" + }, + { + "name": "metric_UPI Data transmit BW (MB/sec) (only data)", + "expression": "([UNC_Q_TxL_FLITS_G0.DATA]) * 8 / 1000000" + }, + { + "name": "metric_UPI Data transmit BW (MB/sec) (includes control)", + "expression": "([UNC_Q_TxL_FLITS_G0.DATA] + [UNC_Q_TxL_FLITS_G0.NON_DATA]) * 8 / 1000000" + }, + { + "name": "metric_UPI Transmit utilization_% (includes control)", + "expression": "([UNC_Q_TxL_FLITS_G0.DATA] + [UNC_Q_TxL_FLITS_G0.NON_DATA]) * 100 / [UNC_Q_CLOCKTICKS]" + }, + { + "name": "metric_IO_bandwidth_disk_or_network_writes (MB/sec)", + "expression": "[UNC_C_TOR_INSERTS.OPCODE.0x19e] * 64 / 1000000" + }, + { + "name": "metric_IO_bandwidth_disk_or_network_reads (MB/sec)", + "expression": "([UNC_C_TOR_INSERTS.OPCODE.0x1c8] + [UNC_C_TOR_INSERTS.OPCODE.0x180]) * 64 / 1000000" + }, + { + "name": "metric_TMAM_Info_cycles_both_threads_active(%)", + "expression": "100 * ( (1 - ([CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE] / ([CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY] / 2)) ) if [const_thread_count] > 1 else 0)" + }, + { + "name": "metric_TMAM_Info_CoreIPC", + "expression": "[instructions] / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" + }, + { + "name": "metric_TMAM_Frontend_Bound(%)", + "expression": "100 * [IDQ_UOPS_NOT_DELIVERED.CORE] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))" + }, + { + "name": "metric_TMAM_..Frontend_Latency(%)", + "expression": "100 * [IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" + }, + { + "name": "metric_TMAM_....ICache_Misses(%)", + "expression": "100 * [ICACHE.IFDATA_STALL] / [cpu-cycles]" + }, + { + "name": "metric_TMAM_....ITLB_Misses(%)", + "expression": "100 * ((14 * [ITLB_MISSES.STLB_HIT]) + [ITLB_MISSES.WALK_DURATION_c1] + (7 * [ITLB_MISSES.WALK_COMPLETED] )) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_....Branch_Resteers(%)", + "expression": "100 * (([RS_EVENTS.EMPTY_CYCLES] - [ICACHE.IFDATA_STALL] - (14 * [ITLB_MISSES.STLB_HIT] + [ITLB_MISSES.WALK_DURATION_c1] + 7 * [ITLB_MISSES.WALK_COMPLETED])) / [RS_EVENTS.EMPTY_END]) * ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT] + [BACLEARS.ANY]) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_....DSB_Switches(%)", + "expression": "100 * 2 * [DSB2MITE_SWITCHES.PENALTY_CYCLES] / [cpu-cycles]" + }, + { + "name": "metric_TMAM_....MS_Switches(%)", + "expression": "100 * 2 * [IDQ.MS_SWITCHES] / [cpu-cycles]" + }, + { + "name": "metric_TMAM_..Frontend_Bandwidth(%)", + "expression": "100 * ([IDQ_UOPS_NOT_DELIVERED.CORE] - (4 * [IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE])) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" + }, + { + "name": "metric_TMAM_Bad_Speculation(%)", + "expression": "100 * ([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + ((4 * [INT_MISC.RECOVERY_CYCLES_ANY]) / [const_thread_count])) / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])) " + }, + { + "name": "metric_TMAM_..Branch_Mispredicts(%)", + "expression": "([BR_MISP_RETIRED.ALL_BRANCHES] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT])) * 100 * ([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + (4 * [INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count])) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" + }, + { + "name": "metric_TMAM_..Machine_Clears(%)", + "expression": "([MACHINE_CLEARS.COUNT] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT])) * 100 * ([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + (4 * [INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count])) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" + }, + { + "name": "metric_TMAM_Backend_bound(%)", + "expression": "100 - (100 * ([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + 4 * ([INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count]) + [IDQ_UOPS_NOT_DELIVERED.CORE] + [UOPS_RETIRED.RETIRE_SLOTS]) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])) " + }, + { + "name": "metric_TMAM_..Memory_Bound(%)", + "expression": "100 * (1 - (([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + 4 * ([INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count]) + [IDQ_UOPS_NOT_DELIVERED.CORE] + [UOPS_RETIRED.RETIRE_SLOTS]) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))) * ([CYCLE_ACTIVITY.STALLS_MEM_ANY] + [RESOURCE_STALLS.SB]) / ([CYCLE_ACTIVITY.STALLS_TOTAL] + [UOPS_EXECUTED.CYCLES_GE_1_UOPS_EXEC] - ( [UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC] if ([instructions] / [cpu-cycles]) > 1.8 else [UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC]) - ( [RS_EVENTS.EMPTY_CYCLES] if ([IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / [CPU_CLK_UNHALTED.THREAD_ANY]) > 0.1 else 0) + [RESOURCE_STALLS.SB])" + }, + { + "name": "metric_TMAM_....L1_Bound(%)", + "expression": "100 * ([CYCLE_ACTIVITY.STALLS_MEM_ANY] - [CYCLE_ACTIVITY.STALLS_L1D_MISS]) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_......DTLB_Load(%)", + "expression": "100 * ([DTLB_LOAD_MISSES.STLB_HIT] * 8 + [DTLB_LOAD_MISSES.WALK_DURATION_c1] + 7 * [DTLB_LOAD_MISSES.WALK_COMPLETED]) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_......Store_Fwd_Blk(%)", + "expression": "100 * (13 * [LD_BLOCKS.STORE_FORWARD]) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_....L2_Bound(%)", + "expression": "100 * ([CYCLE_ACTIVITY.STALLS_L1D_MISS] - [CYCLE_ACTIVITY.STALLS_L2_MISS]) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_....L3_Bound(%)", + "expression": "100 * [MEM_LOAD_UOPS_RETIRED.L3_HIT] / ([MEM_LOAD_UOPS_RETIRED.L3_HIT] + 7 * [MEM_LOAD_UOPS_RETIRED.L3_MISS]) * ([CYCLE_ACTIVITY.STALLS_L2_MISS] / [cpu-cycles])" + }, + { + "name": "metric_TMAM_......L3_Latency(%)", + "expression": "100 * 41 * [MEM_LOAD_UOPS_RETIRED.L3_HIT] * ( 1 + [MEM_LOAD_UOPS_RETIRED.HIT_LFB] / ( [MEM_LOAD_UOPS_RETIRED.L2_HIT] + [MEM_LOAD_UOPS_RETIRED.L3_HIT] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HIT] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HITM] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_MISS] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.LOCAL_DRAM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_DRAM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_HITM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_FWD] ) ) / [cpu-cycles] " + }, + { + "name": "metric_TMAM_......Contested_Accesses(%)", + "expression": "100 * 60 * ([MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HITM] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_MISS]) * ( 1 + [MEM_LOAD_UOPS_RETIRED.HIT_LFB] / ( [MEM_LOAD_UOPS_RETIRED.L2_HIT] + [MEM_LOAD_UOPS_RETIRED.L3_HIT] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HIT] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HITM] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_MISS] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.LOCAL_DRAM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_DRAM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_HITM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_FWD] ) ) / [cpu-cycles] " + }, + { + "name": "metric_TMAM_......Data_Sharing(%)", + "expression": "100 * 43 * [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HIT] * ( 1 + [MEM_LOAD_UOPS_RETIRED.HIT_LFB] / ( [MEM_LOAD_UOPS_RETIRED.L2_HIT] + [MEM_LOAD_UOPS_RETIRED.L3_HIT] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HIT] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HITM] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_MISS] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.LOCAL_DRAM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_DRAM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_HITM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_FWD] ) ) / [cpu-cycles] " + }, + { + "name": "metric_TMAM_......SQ_Full(%)", + "expression": "100 * ([OFFCORE_REQUESTS_BUFFER.SQ_FULL] / [const_thread_count]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" + }, + { + "name": "metric_TMAM_....MEM_Bound(%)", + "expression": "100 * (1 - ( [MEM_LOAD_UOPS_RETIRED.L3_HIT] / ([MEM_LOAD_UOPS_RETIRED.L3_HIT] + 7 * [MEM_LOAD_UOPS_RETIRED.L3_MISS])) ) * ([CYCLE_ACTIVITY.STALLS_L2_MISS] / [cpu-cycles])" + }, + { + "name": "metric_TMAM_......MEM_Bandwidth(%)", + "expression": "100 * (min([OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD_c4], [cpu-cycles])) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_......MEM_Latency(%)", + "expression": "100 * (min([OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD], [cpu-cycles]) - min([OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD_c4], [cpu-cycles])) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_....Stores_Bound(%)", + "expression": "100 * [RESOURCE_STALLS.SB] / [cpu-cycles]" + }, + { + "name": "metric_TMAM_......DTLB_Store(%)", + "expression": "100 * (7 * [DTLB_STORE_MISSES.STLB_HIT] + [DTLB_STORE_MISSES.WALK_DURATION_c1]) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_..Core_Bound(%)", + "expression": "100 * ( 1 - (( [UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + 4 * ([INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count]) + [IDQ_UOPS_NOT_DELIVERED.CORE] + [UOPS_RETIRED.RETIRE_SLOTS] ) / ( 4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))) * (1 - (([CYCLE_ACTIVITY.STALLS_MEM_ANY] + [RESOURCE_STALLS.SB]) / ([CYCLE_ACTIVITY.STALLS_TOTAL] + [UOPS_EXECUTED.CYCLES_GE_1_UOPS_EXEC] - ( [UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC] if ([instructions] / [cpu-cycles]) > 1.8 else [UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC]) - ([RS_EVENTS.EMPTY_CYCLES] if ([IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / [CPU_CLK_UNHALTED.THREAD_ANY]) > 0.1 else 0) + [RESOURCE_STALLS.SB])))" + }, + { + "name": "metric_TMAM_....Divider(%)", + "expression": "100 * [ARITH.FPU_DIV_ACTIVE] / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" + }, + { + "name": "metric_TMAM_....Ports_Utilization(%)", + "expression": "100 * (( [CYCLE_ACTIVITY.STALLS_TOTAL] + [UOPS_EXECUTED.CYCLES_GE_1_UOPS_EXEC] - ([UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC] if ([instructions] / [cpu-cycles]) > 1.8 else [UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC]) - ([RS_EVENTS.EMPTY_CYCLES] if ([IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / [CPU_CLK_UNHALTED.THREAD_ANY]) > 0.1 else 0) + [RESOURCE_STALLS.SB]) - [RESOURCE_STALLS.SB] - [CYCLE_ACTIVITY.STALLS_MEM_ANY] ) /[cpu-cycles]" + }, + { + "name": "metric_TMAM_......0_Port_Utilized(%)", + "expression": "100 * (([UOPS_EXECUTED.CORE_i1_c1] / [const_thread_count]) if ([const_thread_count] > 1) else ([RS_EVENTS.EMPTY_CYCLES] if ([CYCLE_ACTIVITY.STALLS_TOTAL] - ([IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])) ) > 0.1 else 0)) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]) " + }, + { + "name": "metric_TMAM_......1_Port_Utilized(%)", + "expression": "100 * (([UOPS_EXECUTED.CORE_c1] - [UOPS_EXECUTED.CORE_c2]) / [const_thread_count]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" + }, + { + "name": "metric_TMAM_......2_Port_Utilized(%)", + "expression": "100 * (([UOPS_EXECUTED.CORE_c2] - [UOPS_EXECUTED.CORE_c3]) / [const_thread_count]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" + }, + { + "name": "metric_TMAM_......3m_Ports_Utilized(%)", + "expression": "100 * ([UOPS_EXECUTED.CORE_c3] / [const_thread_count]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" + }, + { + "name": "metric_TMAM_Retiring(%)", + "expression": "100 * [UOPS_RETIRED.RETIRE_SLOTS] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))" + }, + { + "name": "metric_TMAM_..Base(%)", + "expression": "100 *(([UOPS_RETIRED.RETIRE_SLOTS] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))) - (([UOPS_RETIRED.RETIRE_SLOTS] / [UOPS_ISSUED.ANY]) * [IDQ.MS_UOPS] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))))" + }, + { + "name": "metric_TMAM_..Microcode_Sequencer(%)", + "expression": "100 * (([UOPS_RETIRED.RETIRE_SLOTS] / [UOPS_ISSUED.ANY]) * [IDQ.MS_UOPS] )/ (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))" + } +] \ No newline at end of file diff --git a/events/metric_icx.json b/events/metric_icx.json index 99e4c44..e3d36e0 100644 --- a/events/metric_icx.json +++ b/events/metric_icx.json @@ -1,344 +1,343 @@ [ { - "name" : "metric_CPU operating frequency (in GHz)", - "expression" : "([cpu-cycles] / [ref-cycles]) * ([const_tsc_freq] / 1000000000)" + "name": "metric_CPU operating frequency (in GHz)", + "expression": "([cpu-cycles] / [ref-cycles]) * ([const_tsc_freq] / 1000000000)" }, { - "name" : "metric_CPU utilization %", - "expression" : "100 * [ref-cycles] / [const_TSC]" + "name": "metric_CPU utilization %", + "expression": "100 * [ref-cycles] / [const_TSC]" }, { - "name" : "metric_CPU utilization% in kernel mode", - "expression" : "100 * [ref-cycles:k] / [const_TSC]" + "name": "metric_CPU utilization% in kernel mode", + "expression": "100 * [ref-cycles:k] / [const_TSC]" }, { - "name" : "metric_CPI", - "expression" : "[cpu-cycles] / [instructions]" + "name": "metric_CPI", + "expression": "[cpu-cycles] / [instructions]" }, { - "name" : "metric_kernel_CPI", - "expression" : "[cpu-cycles:k] / [instructions:k]" + "name": "metric_kernel_CPI", + "expression": "[cpu-cycles:k] / [instructions:k]" }, { - "name" : "metric_IPC", - "expression" : "[instructions] / [cpu-cycles]" + "name": "metric_IPC", + "expression": "[instructions] / [cpu-cycles]" }, { - "name" : "metric_giga_instructions_per_sec", - "expression" : "[instructions] / 1000000000" + "name": "metric_giga_instructions_per_sec", + "expression": "[instructions] / 1000000000" }, { - "name" : "metric_L1D MPI (includes data+rfo w/ prefetches)", - "tags" : "transaction", - "expression" : "[L1D.REPLACEMENT] / [instructions]" + "name": "metric_L1D MPI (includes data+rfo w/ prefetches)", + "tags": "transaction", + "expression": "[L1D.REPLACEMENT] / [instructions]" }, { - "name" : "metric_L1D demand data read hits per instr", - "expression" : "[MEM_LOAD_RETIRED.L1_HIT] / [instructions]" + "name": "metric_L1D demand data read hits per instr", + "expression": "[MEM_LOAD_RETIRED.L1_HIT] / [instructions]" }, { - "name" : "metric_L1-I code read misses (w/ prefetches) per instr", - "expression" : "[L2_RQSTS.ALL_CODE_RD] / [instructions]" + "name": "metric_L1-I code read misses (w/ prefetches) per instr", + "expression": "[L2_RQSTS.ALL_CODE_RD] / [instructions]" }, { - "name" : "metric_L2 demand data read hits per instr", - "expression" : "[MEM_LOAD_RETIRED.L2_HIT] / [instructions]" + "name": "metric_L2 demand data read hits per instr", + "expression": "[MEM_LOAD_RETIRED.L2_HIT] / [instructions]" }, { - "name" : "metric_L2 MPI (includes code+data+rfo w/ prefetches)", - "expression" : "[L2_LINES_IN.ALL] / [instructions]" - }, + "name": "metric_L2 MPI (includes code+data+rfo w/ prefetches)", + "expression": "[L2_LINES_IN.ALL] / [instructions]" + }, { - "name" : "metric_L2 demand data read MPI", - "expression" : "[MEM_LOAD_RETIRED.L2_MISS] / [instructions]" + "name": "metric_L2 demand data read MPI", + "expression": "[MEM_LOAD_RETIRED.L2_MISS] / [instructions]" }, { - "name" : "metric_L2 demand code MPI", - "expression" : "[L2_RQSTS.CODE_RD_MISS] / [instructions]" + "name": "metric_L2 demand code MPI", + "expression": "[L2_RQSTS.CODE_RD_MISS] / [instructions]" }, { - "name" : "metric_Average LLC data read miss latency (in clks)", - "expression" : "[OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD] / [OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD]" + "name": "metric_Average LLC data read miss latency (in clks)", + "expression": "[OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD] / [OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD]" }, { - "name" : "metric_UPI Data transmit BW (MB/sec) (only data)", - "expression" : "[UNC_UPI_TxL_FLITS.ALL_DATA] * (64 / 9) / 1000000" + "name": "metric_UPI Data transmit BW (MB/sec) (only data)", + "expression": "[UNC_UPI_TxL_FLITS.ALL_DATA] * (64 / 9) / 1000000" }, - { - "name" : "metric_package power (watts)", - "expression" : "[power/energy-pkg/]" + { + "name": "metric_package power (watts)", + "expression": "[power/energy-pkg/]" }, - { - "name" : "metric_DRAM power (watts)", - "expression" : "[power/energy-ram/]" + { + "name": "metric_DRAM power (watts)", + "expression": "[power/energy-ram/]" }, { - "name" : "metric_core c6 residency %", - "expression" : "100 * [cstate_core/c6-residency/] / [const_TSC]" + "name": "metric_core c6 residency %", + "expression": "100 * [cstate_core/c6-residency/] / [const_TSC]" }, { - "name" : "metric_package c6 residency %", - "expression" : "100 * [cstate_pkg/c6-residency/] * [const_core_count] / [const_TSC]" + "name": "metric_package c6 residency %", + "expression": "100 * [cstate_pkg/c6-residency/] * [const_core_count] / [const_TSC]" }, - { - "name" : "metric_core % cycles in non AVX license", - "expression" : "(100 * [CORE_POWER.LVL0_TURBO_LICENSE]) / ([CORE_POWER.LVL0_TURBO_LICENSE] + [CORE_POWER.LVL1_TURBO_LICENSE] + [CORE_POWER.LVL2_TURBO_LICENSE])" + { + "name": "metric_core % cycles in non AVX license", + "expression": "(100 * [CORE_POWER.LVL0_TURBO_LICENSE]) / ([CORE_POWER.LVL0_TURBO_LICENSE] + [CORE_POWER.LVL1_TURBO_LICENSE] + [CORE_POWER.LVL2_TURBO_LICENSE])" }, - { - "name" : "metric_core % cycles in AVX2 license", - "expression" : "(100 * [CORE_POWER.LVL1_TURBO_LICENSE]) / ([CORE_POWER.LVL0_TURBO_LICENSE] + [CORE_POWER.LVL1_TURBO_LICENSE] + [CORE_POWER.LVL2_TURBO_LICENSE])" + { + "name": "metric_core % cycles in AVX2 license", + "expression": "(100 * [CORE_POWER.LVL1_TURBO_LICENSE]) / ([CORE_POWER.LVL0_TURBO_LICENSE] + [CORE_POWER.LVL1_TURBO_LICENSE] + [CORE_POWER.LVL2_TURBO_LICENSE])" }, - { - "name" : "metric_core % cycles in AVX-512 license", - "expression" : "(100 * [CORE_POWER.LVL2_TURBO_LICENSE]) / ([CORE_POWER.LVL0_TURBO_LICENSE] + [CORE_POWER.LVL1_TURBO_LICENSE] + [CORE_POWER.LVL2_TURBO_LICENSE])" + { + "name": "metric_core % cycles in AVX-512 license", + "expression": "(100 * [CORE_POWER.LVL2_TURBO_LICENSE]) / ([CORE_POWER.LVL0_TURBO_LICENSE] + [CORE_POWER.LVL1_TURBO_LICENSE] + [CORE_POWER.LVL2_TURBO_LICENSE])" }, { - "name" : "metric_core initiated local dram read bandwidth(MB/sec)", - "expression" : "([OCR.READS_TO_CORE.LOCAL_DRAM] + [OCR.HWPF_L3.L3_MISS_LOCAL]) * 64 / 1000000" + "name": "metric_core initiated local dram read bandwidth (MB/sec)", + "expression": "([OCR.READS_TO_CORE.LOCAL_DRAM] + [OCR.HWPF_L3.L3_MISS_LOCAL]) * 64 / 1000000" }, { - "name" : "metric_core initiated remote dram read bandwidth(MB/sec)", - "expression" : "([OCR.READS_TO_CORE.REMOTE_DRAM] + [OCR.HWPF_L3.REMOTE]) * 64 / 1000000" + "name": "metric_core initiated remote dram read bandwidth (MB/sec)", + "expression": "([OCR.READS_TO_CORE.REMOTE_DRAM] + [OCR.HWPF_L3.REMOTE]) * 64 / 1000000" }, - { - "name" : "metric_memory bandwidth read (MB/sec)", - "expression" : "[UNC_M_CAS_COUNT.RD] * 64 / 1000000" + { + "name": "metric_memory bandwidth read (MB/sec)", + "expression": "[UNC_M_CAS_COUNT.RD] * 64 / 1000000" }, - { - "name" : "metric_memory bandwidth write (MB/sec)", - "expression" : "[UNC_M_CAS_COUNT.WR] * 64 / 1000000" + { + "name": "metric_memory bandwidth write (MB/sec)", + "expression": "[UNC_M_CAS_COUNT.WR] * 64 / 1000000" }, - { - "name" : "metric_memory bandwidth total (MB/sec)", - "expression" : "([UNC_M_CAS_COUNT.RD] + [UNC_M_CAS_COUNT.WR]) * 64 / 1000000" + { + "name": "metric_memory bandwidth total (MB/sec)", + "expression": "([UNC_M_CAS_COUNT.RD] + [UNC_M_CAS_COUNT.WR]) * 64 / 1000000" }, { - "name" : "metric_DCPMEM_memory_mode near memory cache read miss rate%", - "expression" : "100 * ([UNC_M_TAGCHK.MISS_CLEAN] + [UNC_M_TAGCHK.MISS_DIRTY]) / ([UNC_M_TAGCHK.HIT] + [UNC_M_TAGCHK.MISS_CLEAN] + [UNC_M_TAGCHK.MISS_DIRTY])" + "name": "metric_DCPMEM_memory_mode near memory cache read miss rate%", + "expression": "100 * ([UNC_M_TAGCHK.MISS_CLEAN] + [UNC_M_TAGCHK.MISS_DIRTY]) / ([UNC_M_TAGCHK.HIT] + [UNC_M_TAGCHK.MISS_CLEAN] + [UNC_M_TAGCHK.MISS_DIRTY])" }, { - "name" : "metric_3DXP_memory bandwidth read (MB/sec)", - "expression" : "[UNC_M_PMM_RPQ_INSERTS] * 64 / 1000000" + "name": "metric_3DXP_memory bandwidth read (MB/sec)", + "expression": "[UNC_M_PMM_RPQ_INSERTS] * 64 / 1000000" }, { - "name" : "metric_3DXP_memory bandwidth write (MB/sec)", - "expression" : "[UNC_M_PMM_WPQ_INSERTS] * 64 / 1000000" + "name": "metric_3DXP_memory bandwidth write (MB/sec)", + "expression": "[UNC_M_PMM_WPQ_INSERTS] * 64 / 1000000" }, { - "name" : "metric_3DXP_memory bandwidth total (MB/sec)", - "expression" : "([UNC_M_PMM_RPQ_INSERTS] + [UNC_M_PMM_WPQ_INSERTS]) * 64 / 1000000" + "name": "metric_3DXP_memory bandwidth total (MB/sec)", + "expression": "([UNC_M_PMM_RPQ_INSERTS] + [UNC_M_PMM_WPQ_INSERTS]) * 64 / 1000000" }, { - "name" : "metric_LLC code read MPI (demand+prefetch)", - "expression" : "([UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFCODE] + [UNC_CHA_TOR_INSERTS.IA_MISS_CRD] + [UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF]) / [instructions]" + "name": "metric_LLC code read MPI (demand+prefetch)", + "expression": "([UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFCODE] + [UNC_CHA_TOR_INSERTS.IA_MISS_CRD] + [UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF]) / [instructions]" }, { - "name" : "metric_LLC data read MPI (demand+prefetch)", - "expression" : "([UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF]) / [instructions]" + "name": "metric_LLC data read MPI (demand+prefetch)", + "expression": "([UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF]) / [instructions]" }, { - "name" : "metric_LLC total HITM (per instr) (excludes LLC prefetches)", - "expression" : "[OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_HITM] / [instructions]" + "name": "metric_LLC total HITM (per instr) (excludes LLC prefetches)", + "expression": "[OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_HITM] / [instructions]" }, { - "name" : "metric_LLC total HIT clean line forwards (per instr) (excludes LLC prefetches)", - "expression" : "[OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_HIT_WITH_FWD] / [instructions]" + "name": "metric_LLC total HIT clean line forwards (per instr) (excludes LLC prefetches)", + "expression": "[OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_HIT_WITH_FWD] / [instructions]" }, { - "name" : "metric_Average LLC demand data read miss latency (in ns)", - "expression" : "(1000000000 * [UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD] / [UNC_CHA_TOR_INSERTS.IA_MISS_DRD]) / ([UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]))" + "name": "metric_Average LLC demand data read miss latency (in ns)", + "expression": "(1000000000 * [UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD] / [UNC_CHA_TOR_INSERTS.IA_MISS_DRD]) / ([UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]))" }, { - "name" : "metric_Average LLC demand data read miss latency for LOCAL requests (in ns)", - "expression" : "(1000000000 * [UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL] / [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL]) / ([UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [socket_count]))" + "name": "metric_Average LLC demand data read miss latency for LOCAL requests (in ns)", + "expression": "(1000000000 * [UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL] / [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL]) / ([UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]))" }, { - "name" : "metric_Average LLC demand data read miss latency for REMOTE requests (in ns)", - "expression" : "(1000000000 * [UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE] / [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE]) / ([UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [socket_count]))" + "name": "metric_Average LLC demand data read miss latency for REMOTE requests (in ns)", + "expression": "(1000000000 * [UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE] / [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE]) / ([UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]))" }, { - "name" : "metric_ITLB (2nd level) MPI", - "expression" : "[ITLB_MISSES.WALK_COMPLETED] / [instructions]" + "name": "metric_ITLB (2nd level) MPI", + "expression": "[ITLB_MISSES.WALK_COMPLETED] / [instructions]" }, { - "name" : "metric_DTLB (2nd level) load MPI", - "expression" : "[DTLB_LOAD_MISSES.WALK_COMPLETED] / [instructions]" + "name": "metric_DTLB (2nd level) load MPI", + "expression": "[DTLB_LOAD_MISSES.WALK_COMPLETED] / [instructions]" }, { - "name" : "metric_DTLB (2nd level) 2MB large page load MPI", - "expression" : "[DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M] / [instructions]" + "name": "metric_DTLB (2nd level) 2MB large page load MPI", + "expression": "[DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M] / [instructions]" }, { - "name" : "metric_DTLB (2nd level) store MPI", - "expression" : "[DTLB_STORE_MISSES.WALK_COMPLETED] / [instructions]" + "name": "metric_DTLB (2nd level) store MPI", + "expression": "[DTLB_STORE_MISSES.WALK_COMPLETED] / [instructions]" }, { - "name" : "metric_NUMA %_Reads addressed to local DRAM", - "expression" : "100 * ([UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL]) / ([UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE])" + "name": "metric_NUMA %_Reads addressed to local DRAM", + "expression": "100 * ([UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL]) / ([UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE])" }, { - "name" : "metric_NUMA %_Reads addressed to remote DRAM", - "expression" : "100 * ([UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE]) / ([UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE])" + "name": "metric_NUMA %_Reads addressed to remote DRAM", + "expression": "100 * ([UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE]) / ([UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE])" }, { - "name" : "metric_uncore frequency GHz", - "expression" : "[UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]) / 1000000000" + "name": "metric_uncore frequency GHz", + "expression": "[UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]) / 1000000000" }, { - "name" : "metric_TMA_Frontend_Bound(%)", - "expression" : "100 * ([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / ([slots]))" + "name": "metric_TMA_Frontend_Bound(%)", + "expression": "100 * ([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / ([slots]))" }, { - "name" : "metric_TMA_..Fetch_Latency(%)", - "expression" : "100 * (5 * [IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / [slots])" + "name": "metric_TMA_..Fetch_Latency(%)", + "expression": "100 * (5 * [IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / [slots])" }, { - "name" : "metric_TMA_....ICache_Misses(%)", - "expression" : "100 * ([ICACHE_16B.IFDATA_STALL] / [cpu-cycles])" + "name": "metric_TMA_....ICache_Misses(%)", + "expression": "100 * ([ICACHE_16B.IFDATA_STALL] / [cpu-cycles])" }, { - "name" : "metric_TMA_....ITLB_Misses(%)", - "expression" : "100 * ([ICACHE_64B.IFTAG_STALL] / [cpu-cycles])" + "name": "metric_TMA_....ITLB_Misses(%)", + "expression": "100 * ([ICACHE_64B.IFTAG_STALL] / [cpu-cycles])" }, { - "name" : "metric_TMA_....Branch_Resteers(%)", - "expression" : "100 * ([INT_MISC.CLEAR_RESTEER_CYCLES] / [cpu-cycles] + (10 * [BACLEARS.ANY] / [cpu-cycles]))" + "name": "metric_TMA_....Branch_Resteers(%)", + "expression": "100 * ([INT_MISC.CLEAR_RESTEER_CYCLES] / [cpu-cycles] + (10 * [BACLEARS.ANY] / [cpu-cycles]))" }, { - "name" : "metric_TMA_......Mispredicts_Resteers(%)", - "expression" : "100 * (([BR_MISP_RETIRED.ALL_BRANCHES] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT])) * [INT_MISC.CLEAR_RESTEER_CYCLES] / [cpu-cycles])" + "name": "metric_TMA_......Mispredicts_Resteers(%)", + "expression": "100 * (([BR_MISP_RETIRED.ALL_BRANCHES] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT])) * [INT_MISC.CLEAR_RESTEER_CYCLES] / [cpu-cycles])" }, { - "name" : "metric_TMA_......Clears_Resteers(%)", - "expression" : "100 * ((1 - ([BR_MISP_RETIRED.ALL_BRANCHES] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT]))) * [INT_MISC.CLEAR_RESTEER_CYCLES] / [cpu-cycles])" + "name": "metric_TMA_......Clears_Resteers(%)", + "expression": "100 * ((1 - ([BR_MISP_RETIRED.ALL_BRANCHES] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT]))) * [INT_MISC.CLEAR_RESTEER_CYCLES] / [cpu-cycles])" }, { - "name" : "metric_TMA_......Unknown_Branches(%)", - "expression" : "100 * (10 * [BACLEARS.ANY] / [cpu-cycles])" + "name": "metric_TMA_......Unknown_Branches(%)", + "expression": "100 * (10 * [BACLEARS.ANY] / [cpu-cycles])" }, { - "name" : "metric_TMA_..Fetch_Bandwidth(%)", - "expression" : "100 * max(0, (([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [slots]) - (5 * [IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / [slots])))" + "name": "metric_TMA_..Fetch_Bandwidth(%)", + "expression": "100 * max(0, (([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [slots]) - (5 * [IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / [slots])))" }, { - "name" : "metric_TMA_Bad_Speculation(%)", - "expression" : "100 * (max((1 - (([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [slots]) + ([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) + (5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [slots]) + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))))), 0))" + "name": "metric_TMA_Bad_Speculation(%)", + "expression": "100 * (max((1 - (([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [slots]) + ([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) + (5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [slots]) + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))))), 0))" }, { - "name" : "metric_TMA_..Branch_Mispredicts(%)", - "expression" : "100 * (([BR_MISP_RETIRED.ALL_BRANCHES] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT])) * (max((1 - (([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [slots]) + ([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) + (5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [slots]) + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))))), 0)))" + "name": "metric_TMA_..Branch_Mispredicts(%)", + "expression": "100 * (([BR_MISP_RETIRED.ALL_BRANCHES] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT])) * (max((1 - (([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [slots]) + ([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) + (5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [slots]) + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))))), 0)))" }, { - "name" : "metric_TMA_..Machine_Clears(%)", - "expression" : "100 * (max(0, ((max((1 - (([topdown-fe-bound] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring])) - [INT_MISC.UOP_DROPPING] / [slots]) + ([topdown-be-bound] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring])) + (5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [slots]) + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))))), 0)) - (([BR_MISP_RETIRED.ALL_BRANCHES] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT])) * (max((1 - (([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [slots]) + ([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) + (5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [slots]) + ([topdown-retiring] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring]))))), 0))))))" + "name": "metric_TMA_..Machine_Clears(%)", + "expression": "100 * (max(0, ((max((1 - (([topdown-fe-bound] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring])) - [INT_MISC.UOP_DROPPING] / [slots]) + ([topdown-be-bound] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring])) + (5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [slots]) + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))))), 0)) - (([BR_MISP_RETIRED.ALL_BRANCHES] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT])) * (max((1 - (([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [slots]) + ([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) + (5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [slots]) + ([topdown-retiring] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring]))))), 0))))))" }, { - "name" : "metric_TMA_Backend_Bound(%)", - "expression" : "100 * ([topdown-be-bound] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring])) + ( 5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [slots])" + "name": "metric_TMA_Backend_Bound(%)", + "expression": "100 * ([topdown-be-bound] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring])) + ( 5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [slots])" }, { - "name" : "metric_TMA_..Memory_Bound(%)", - "expression" : "100 * ((([CYCLE_ACTIVITY.STALLS_MEM_ANY] + [EXE_ACTIVITY.BOUND_ON_STORES]) / ([CYCLE_ACTIVITY.STALLS_Total] + ([EXE_ACTIVITY.1_PORTS_UTIL] + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) * [EXE_ACTIVITY.2_PORTS_UTIL]) + [EXE_ACTIVITY.BOUND_ON_STORES])) * ([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) + (5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [slots]))" + "name": "metric_TMA_..Memory_Bound(%)", + "expression": "100 * ((([CYCLE_ACTIVITY.STALLS_MEM_ANY] + [EXE_ACTIVITY.BOUND_ON_STORES]) / ([CYCLE_ACTIVITY.STALLS_Total] + ([EXE_ACTIVITY.1_PORTS_UTIL] + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) * [EXE_ACTIVITY.2_PORTS_UTIL]) + [EXE_ACTIVITY.BOUND_ON_STORES])) * ([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) + (5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [slots]))" }, { - "name" : "metric_TMA_....L1_Bound(%)", - "expression" : "100 * max((([CYCLE_ACTIVITY.STALLS_MEM_ANY] - [CYCLE_ACTIVITY.STALLS_L1D_MISS]) / [cpu-cycles]), 0)" + "name": "metric_TMA_....L1_Bound(%)", + "expression": "100 * max((([CYCLE_ACTIVITY.STALLS_MEM_ANY] - [CYCLE_ACTIVITY.STALLS_L1D_MISS]) / [cpu-cycles]), 0)" }, { - "name" : "metric_TMA_......DTLB_Load(%)", - "expression" : "100 * ((min((7 * [DTLB_LOAD_MISSES.STLB_HIT] + [DTLB_LOAD_MISSES.WALK_ACTIVE]), (max(([CYCLE_ACTIVITY.CYCLES_MEM_ANY] - [CYCLE_ACTIVITY.CYCLES_L1D_MISS]), 0))) / [cpu-cycles]) - ([DTLB_LOAD_MISSES.WALK_ACTIVE] / [cpu-cycles]))" + "name": "metric_TMA_......DTLB_Load(%)", + "expression": "100 * ((min((7 * [DTLB_LOAD_MISSES.STLB_HIT] + [DTLB_LOAD_MISSES.WALK_ACTIVE]), (max(([CYCLE_ACTIVITY.CYCLES_MEM_ANY] - [CYCLE_ACTIVITY.CYCLES_L1D_MISS]), 0))) / [cpu-cycles]) - ([DTLB_LOAD_MISSES.WALK_ACTIVE] / [cpu-cycles]))" }, { - "name" : "metric_TMA_......Store_Fwd_Blk(%)", - "expression" : "100 * (13 * [LD_BLOCKS.STORE_FORWARD] / [cpu-cycles])" + "name": "metric_TMA_......Store_Fwd_Blk(%)", + "expression": "100 * (13 * [LD_BLOCKS.STORE_FORWARD] / [cpu-cycles])" }, { - "name" : "metric_TMA_....L2_Bound(%)", - "expression" : "100 * ((([MEM_LOAD_RETIRED.L2_HIT] * (1 + ([MEM_LOAD_RETIRED.FB_HIT] / [MEM_LOAD_RETIRED.L1_MISS]))) / (([MEM_LOAD_RETIRED.L2_HIT] * (1 + ([MEM_LOAD_RETIRED.FB_HIT] / [MEM_LOAD_RETIRED.L1_MISS]))) + [L1D_PEND_MISS.FB_FULL_PERIODS])) * (([CYCLE_ACTIVITY.STALLS_L1D_MISS] - [CYCLE_ACTIVITY.STALLS_L2_MISS]) / [cpu-cycles]))" + "name": "metric_TMA_....L2_Bound(%)", + "expression": "100 * ((([MEM_LOAD_RETIRED.L2_HIT] * (1 + ([MEM_LOAD_RETIRED.FB_HIT] / [MEM_LOAD_RETIRED.L1_MISS]))) / (([MEM_LOAD_RETIRED.L2_HIT] * (1 + ([MEM_LOAD_RETIRED.FB_HIT] / [MEM_LOAD_RETIRED.L1_MISS]))) + [L1D_PEND_MISS.FB_FULL_PERIODS])) * (([CYCLE_ACTIVITY.STALLS_L1D_MISS] - [CYCLE_ACTIVITY.STALLS_L2_MISS]) / [cpu-cycles]))" }, { - "name" : "metric_TMA_....L3_Bound(%)", - "expression" : "100 * (([CYCLE_ACTIVITY.STALLS_L2_MISS] - [CYCLE_ACTIVITY.STALLS_L3_Miss]) / [cpu-cycles])" + "name": "metric_TMA_....L3_Bound(%)", + "expression": "100 * (([CYCLE_ACTIVITY.STALLS_L2_MISS] - [CYCLE_ACTIVITY.STALLS_L3_Miss]) / [cpu-cycles])" }, { - "name" : "metric_TMA_......Contested_Accesses(%)", - "expression" : "100 * ((((48 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000)) -(4 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000))) * ([MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD] * ([OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM] / ([OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM] + [OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD]))) + ((47.5 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000)) - (4 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000))) * [MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS]) * (1 + ([MEM_LOAD_RETIRED.FB_HIT] / [MEM_LOAD_RETIRED.L1_MISS]) / 2) / [cpu-cycles])" + "name": "metric_TMA_......Contested_Accesses(%)", + "expression": "100 * ((((48 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000)) -(4 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000))) * ([MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD] * ([OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM] / ([OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM] + [OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD]))) + ((47.5 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000)) - (4 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000))) * [MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS]) * (1 + ([MEM_LOAD_RETIRED.FB_HIT] / [MEM_LOAD_RETIRED.L1_MISS]) / 2) / [cpu-cycles])" }, { - "name" : "metric_TMA_......Data_Sharing(%)", - "expression" : "100 * (((47.5 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000)) - (4 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000))) * ([MEM_LOAD_L3_HIT_RETIRED.XSNP_NO_FWD] + [MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD] * (1 - ([OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM] / ([OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM] + [OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD])))) * (1 + ([MEM_LOAD_RETIRED.FB_HIT] / [MEM_LOAD_RETIRED.L1_MISS]) / 2) / [cpu-cycles])" + "name": "metric_TMA_......Data_Sharing(%)", + "expression": "100 * (((47.5 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000)) - (4 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000))) * ([MEM_LOAD_L3_HIT_RETIRED.XSNP_NO_FWD] + [MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD] * (1 - ([OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM] / ([OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM] + [OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD])))) * (1 + ([MEM_LOAD_RETIRED.FB_HIT] / [MEM_LOAD_RETIRED.L1_MISS]) / 2) / [cpu-cycles])" }, { - "name" : "metric_TMA_......L3_Hit_Latency(%)", - "expression" : "100 * (((23 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000)) - (4 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000))) * [MEM_LOAD_RETIRED.L3_HIT] * (1 + ([MEM_LOAD_RETIRED.FB_HIT] / [MEM_LOAD_RETIRED.L1_MISS]) / 2) / [cpu-cycles])" + "name": "metric_TMA_......L3_Hit_Latency(%)", + "expression": "100 * (((23 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000)) - (4 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000))) * [MEM_LOAD_RETIRED.L3_HIT] * (1 + ([MEM_LOAD_RETIRED.FB_HIT] / [MEM_LOAD_RETIRED.L1_MISS]) / 2) / [cpu-cycles])" }, { - "name" : "metric_TMA_......SQ_Full(%)", - "expression" : "100 * ([L1D_PEND_MISS.L2_STALL] / [cpu-cycles])" + "name": "metric_TMA_......SQ_Full(%)", + "expression": "100 * ([L1D_PEND_MISS.L2_STALL] / [cpu-cycles])" }, { - "name" : "metric_TMA_......MEM_Bandwidth(%)", - "expression" : "100 * ((min(([cpu-cycles] - 0), ([OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD_c4] - 0))) / [cpu-cycles])" + "name": "metric_TMA_......MEM_Bandwidth(%)", + "expression": "100 * ((min(([cpu-cycles] - 0), ([OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD_c4] - 0))) / [cpu-cycles])" }, { - "name" : "metric_TMA_......Mem_Latency(%)", - "expression" : "100 * ((min(([cpu-cycles] - 0), ([OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD] - 0))) / [cpu-cycles] - ((min(([cpu-cycles] - 0), ([OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD_c4] - 0))) / [cpu-cycles]))" + "name": "metric_TMA_......MEM_Latency(%)", + "expression": "100 * ((min(([cpu-cycles] - 0), ([OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD] - 0))) / [cpu-cycles] - ((min(([cpu-cycles] - 0), ([OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD_c4] - 0))) / [cpu-cycles]))" }, { - "name" : "metric_TMA_....Store_Bound(%)", - "expression" : "100 * ([EXE_ACTIVITY.BOUND_ON_STORES] / [cpu-cycles])" + "name": "metric_TMA_....Store_Bound(%)", + "expression": "100 * ([EXE_ACTIVITY.BOUND_ON_STORES] / [cpu-cycles])" }, { - "name" : "metric_TMA_..Core_Bound(%)", - "expression" : "100 * (max(0, (([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) + (5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [slots]) - ((([CYCLE_ACTIVITY.CYCLES_MEM_ANY] + [EXE_ACTIVITY.BOUND_ON_STORES]) / ([CYCLE_ACTIVITY.STALLS_Total] + ([EXE_ACTIVITY.1_PORTS_UTIL] + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) * [EXE_ACTIVITY.2_PORTS_UTIL]) + [EXE_ACTIVITY.BOUND_ON_STORES])) * ([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) + (5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [slots])))))" + "name": "metric_TMA_..Core_Bound(%)", + "expression": "100 * (max(0, (([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) + (5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [slots]) - ((([CYCLE_ACTIVITY.CYCLES_MEM_ANY] + [EXE_ACTIVITY.BOUND_ON_STORES]) / ([CYCLE_ACTIVITY.STALLS_Total] + ([EXE_ACTIVITY.1_PORTS_UTIL] + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) * [EXE_ACTIVITY.2_PORTS_UTIL]) + [EXE_ACTIVITY.BOUND_ON_STORES])) * ([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) + (5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [slots])))))" }, { - "name" : "metric_TMA_....Divider(%)", - "expression" : "100 * ([ARITH.DIVIDER_ACTIVE] / [cpu-cycles])" + "name": "metric_TMA_....Divider(%)", + "expression": "100 * ([ARITH.DIVIDER_ACTIVE] / [cpu-cycles])" }, { - "name" : "metric_TMA_....Ports_Utilization(%)", - "expression" : "100 * ((([CYCLE_ACTIVITY.STALLS_Total] - [CYCLE_ACTIVITY.CYCLES_MEM_ANY] + ([EXE_ACTIVITY.1_PORTS_UTIL] + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) * [EXE_ACTIVITY.2_PORTS_UTIL])) / [cpu-cycles]) if ([ARITH.DIVIDER_ACTIVE] - 0) < ([CYCLE_ACTIVITY.STALLS_Total] - [CYCLE_ACTIVITY.CYCLES_MEM_ANY]) else (([EXE_ACTIVITY.1_PORTS_UTIL] + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) * [EXE_ACTIVITY.2_PORTS_UTIL]) / [cpu-cycles]))" + "name": "metric_TMA_....Ports_Utilization(%)", + "expression": "100 * ((([CYCLE_ACTIVITY.STALLS_Total] - [CYCLE_ACTIVITY.CYCLES_MEM_ANY] + ([EXE_ACTIVITY.1_PORTS_UTIL] + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) * [EXE_ACTIVITY.2_PORTS_UTIL])) / [cpu-cycles]) if ([ARITH.DIVIDER_ACTIVE] - 0) < ([CYCLE_ACTIVITY.STALLS_Total] - [CYCLE_ACTIVITY.CYCLES_MEM_ANY]) else (([EXE_ACTIVITY.1_PORTS_UTIL] + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) * [EXE_ACTIVITY.2_PORTS_UTIL]) / [cpu-cycles]))" }, { - "name" : "metric_TMA_......Ports_Utilized_0(%)", - "expression" : "100 * max(0, (([CYCLE_ACTIVITY.STALLS_Total] - [CYCLE_ACTIVITY.CYCLES_MEM_ANY]) / [cpu-cycles]))" + "name": "metric_TMA_......Ports_Utilized_0(%)", + "expression": "100 * max(0, (([CYCLE_ACTIVITY.STALLS_Total] - [CYCLE_ACTIVITY.CYCLES_MEM_ANY]) / [cpu-cycles]))" }, { - "name" : "metric_TMA_......Ports_Utilized_1(%)", - "expression" : "100 * ([EXE_ACTIVITY.1_PORTS_UTIL] / [cpu-cycles])" + "name": "metric_TMA_......Ports_Utilized_1(%)", + "expression": "100 * ([EXE_ACTIVITY.1_PORTS_UTIL] / [cpu-cycles])" }, { - "name" : "metric_TMA_......Ports_Utilized_2(%)", - "expression" : "100 * ([EXE_ACTIVITY.2_PORTS_UTIL] / [cpu-cycles])" + "name": "metric_TMA_......Ports_Utilized_2(%)", + "expression": "100 * ([EXE_ACTIVITY.2_PORTS_UTIL] / [cpu-cycles])" }, { - "name" : "metric_TMA_......Ports_Utilized_3m(%)", - "expression" : "100 * [UOPS_EXECUTED.CYCLES_GE_3] / [cpu-cycles]" + "name": "metric_TMA_......Ports_Utilized_3m(%)", + "expression": "100 * [UOPS_EXECUTED.CYCLES_GE_3] / [cpu-cycles]" }, { - "name" : "metric_TMA_Retiring(%)", - "expression" : "100 * ([topdown-retiring] / ([topdown-retiring] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-be-bound]))" + "name": "metric_TMA_Retiring(%)", + "expression": "100 * ([topdown-retiring] / ([topdown-retiring] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-be-bound]))" }, { - "name" : "metric_TMA_..Light_Operations(%)", - "expression" : "100 * (max(0, (([topdown-retiring] / (([topdown-retiring] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-be-bound]))) - ((((([topdown-retiring] / (([topdown-retiring] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-be-bound]))) * [slots]) / [UOPS_ISSUED.ANY]) * [IDQ.MS_UOPS] / [slots])))))" + "name": "metric_TMA_..Light_Operations(%)", + "expression": "100 * (max(0, (([topdown-retiring] / (([topdown-retiring] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-be-bound]))) - ((((([topdown-retiring] / (([topdown-retiring] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-be-bound]))) * [slots]) / [UOPS_ISSUED.ANY]) * [IDQ.MS_UOPS] / [slots])))))" }, { - "name" : "metric_TMA_..Heavy_Operations(%)", - "expression" : "100 * ((((([topdown-retiring] / (([topdown-retiring] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-be-bound]))) * [slots]) / [UOPS_ISSUED.ANY]) * [IDQ.MS_UOPS] / [slots]))" + "name": "metric_TMA_..Heavy_Operations(%)", + "expression": "100 * ((((([topdown-retiring] / (([topdown-retiring] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-be-bound]))) * [slots]) / [UOPS_ISSUED.ANY]) * [IDQ.MS_UOPS] / [slots]))" }, { - "name" : "metric_TMA_....Microcode_Sequencer(%)", - "expression" : "100 * (((([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-found]))) * [slots]) / [UOPS_ISSUED.ANY]) * [IDQ.MS_UOPS] / [slots])" + "name": "metric_TMA_....Microcode_Sequencer(%)", + "expression": "100 * (((([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-found]))) * [slots]) / [UOPS_ISSUED.ANY]) * [IDQ.MS_UOPS] / [slots])" }, { - "name" : "metric_TMA_Info_CoreIPC", - "expression" : "[instructions] / [CPU_CLK_UNHALTED.DISTRIBUTED]" + "name": "metric_TMA_Info_CoreIPC", + "expression": "[instructions] / [CPU_CLK_UNHALTED.DISTRIBUTED]" }, { - "name" : "metric_TMA_Info_System_SMT_2T_Utilization", - "expression" : "(1 - [CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE] / [CPU_CLK_UNHALTED.REF_DISTRIBUTED]) if [const_socket_count] > 1 else 0" + "name": "metric_TMA_Info_System_SMT_2T_Utilization", + "expression": "(1 - [CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE] / [CPU_CLK_UNHALTED.REF_DISTRIBUTED]) if [const_socket_count] > 1 else 0" } - -] +] \ No newline at end of file diff --git a/events/metric_icx_aws.json b/events/metric_icx_aws.json new file mode 100644 index 0000000..0538672 --- /dev/null +++ b/events/metric_icx_aws.json @@ -0,0 +1,311 @@ +[ + { + "name": "metric_CPU operating frequency (in GHz)", + "expression": "([cpu-cycles] / [ref-cycles]) * ([const_tsc_freq] / 1000000000)" + }, + { + "name": "metric_CPU utilization %", + "expression": "100 * [ref-cycles] / [const_TSC]" + }, + { + "name": "metric_CPU utilization% in kernel mode", + "expression": "100 * [ref-cycles:k] / [const_TSC]" + }, + { + "name": "metric_CPI", + "expression": "[cpu-cycles] / [instructions]" + }, + { + "name": "metric_kernel_CPI", + "expression": "[cpu-cycles:k] / [instructions:k]" + }, + { + "name": "metric_IPC", + "expression": "[instructions] / [cpu-cycles]" + }, + { + "name": "metric_giga_instructions_per_sec", + "expression": "[instructions] / 1000000000" + }, + { + "name": "metric_L1D MPI (includes data+rfo w/ prefetches)", + "tags": "transaction", + "expression": "[L1D.REPLACEMENT] / [instructions]" + }, + { + "name": "metric_L1D demand data read hits per instr", + "expression": "[MEM_LOAD_RETIRED.L1_HIT] / [instructions]" + }, + { + "name": "metric_L1-I code read misses (w/ prefetches) per instr", + "expression": "[L2_RQSTS.ALL_CODE_RD] / [instructions]" + }, + { + "name": "metric_L2 demand data read hits per instr", + "expression": "[MEM_LOAD_RETIRED.L2_HIT] / [instructions]" + }, + { + "name": "metric_L2 MPI (includes code+data+rfo w/ prefetches)", + "expression": "[L2_LINES_IN.ALL] / [instructions]" + }, + { + "name": "metric_L2 demand data read MPI", + "expression": "[MEM_LOAD_RETIRED.L2_MISS] / [instructions]" + }, + { + "name": "metric_L2 demand code MPI", + "expression": "[L2_RQSTS.CODE_RD_MISS] / [instructions]" + }, + { + "name": "metric_UPI Data transmit BW (MB/sec) (only data)", + "expression": "[UNC_UPI_TxL_FLITS.ALL_DATA] * (64 / 9) / 1000000" + }, + { + "name": "metric_package power (watts)", + "expression": "[power/energy-pkg/]" + }, + { + "name": "metric_DRAM power (watts)", + "expression": "[power/energy-ram/]" + }, + { + "name": "metric_core % cycles in non AVX license", + "expression": "(100 * [CORE_POWER.LVL0_TURBO_LICENSE]) / ([CORE_POWER.LVL0_TURBO_LICENSE] + [CORE_POWER.LVL1_TURBO_LICENSE] + [CORE_POWER.LVL2_TURBO_LICENSE])" + }, + { + "name": "metric_core % cycles in AVX2 license", + "expression": "(100 * [CORE_POWER.LVL1_TURBO_LICENSE]) / ([CORE_POWER.LVL0_TURBO_LICENSE] + [CORE_POWER.LVL1_TURBO_LICENSE] + [CORE_POWER.LVL2_TURBO_LICENSE])" + }, + { + "name": "metric_core % cycles in AVX-512 license", + "expression": "(100 * [CORE_POWER.LVL2_TURBO_LICENSE]) / ([CORE_POWER.LVL0_TURBO_LICENSE] + [CORE_POWER.LVL1_TURBO_LICENSE] + [CORE_POWER.LVL2_TURBO_LICENSE])" + }, + { + "name": "metric_DCPMEM_memory_mode near memory cache read miss rate%", + "expression": "100 * ([UNC_M_TAGCHK.MISS_CLEAN] + [UNC_M_TAGCHK.MISS_DIRTY]) / ([UNC_M_TAGCHK.HIT] + [UNC_M_TAGCHK.MISS_CLEAN] + [UNC_M_TAGCHK.MISS_DIRTY])" + }, + { + "name": "metric_3DXP_memory bandwidth read (MB/sec)", + "expression": "[UNC_M_PMM_RPQ_INSERTS] * 64 / 1000000" + }, + { + "name": "metric_3DXP_memory bandwidth write (MB/sec)", + "expression": "[UNC_M_PMM_WPQ_INSERTS] * 64 / 1000000" + }, + { + "name": "metric_3DXP_memory bandwidth total (MB/sec)", + "expression": "([UNC_M_PMM_RPQ_INSERTS] + [UNC_M_PMM_WPQ_INSERTS]) * 64 / 1000000" + }, + { + "name": "metric_LLC code read MPI (demand+prefetch)", + "expression": "([UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFCODE] + [UNC_CHA_TOR_INSERTS.IA_MISS_CRD] + [UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF]) / [instructions]" + }, + { + "name": "metric_LLC data read MPI (demand+prefetch)", + "expression": "([UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF]) / [instructions]" + }, + { + "name": "metric_LLC total HITM (per instr) (excludes LLC prefetches)", + "expression": "[OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_HITM] / [instructions]" + }, + { + "name": "metric_LLC total HIT clean line forwards (per instr) (excludes LLC prefetches)", + "expression": "[OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_HIT_WITH_FWD] / [instructions]" + }, + { + "name": "metric_Average LLC demand data read miss latency (in ns)", + "expression": "(1000000000 * [UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD] / [UNC_CHA_TOR_INSERTS.IA_MISS_DRD]) / ([UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]))" + }, + { + "name": "metric_Average LLC demand data read miss latency for LOCAL requests (in ns)", + "expression": "(1000000000 * [UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL] / [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL]) / ([UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]))" + }, + { + "name": "metric_Average LLC demand data read miss latency for REMOTE requests (in ns)", + "expression": "(1000000000 * [UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE] / [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE]) / ([UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]))" + }, + { + "name": "metric_ITLB (2nd level) MPI", + "expression": "[ITLB_MISSES.WALK_COMPLETED] / [instructions]" + }, + { + "name": "metric_DTLB (2nd level) load MPI", + "expression": "[DTLB_LOAD_MISSES.WALK_COMPLETED] / [instructions]" + }, + { + "name": "metric_DTLB (2nd level) 2MB large page load MPI", + "expression": "[DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M] / [instructions]" + }, + { + "name": "metric_DTLB (2nd level) store MPI", + "expression": "[DTLB_STORE_MISSES.WALK_COMPLETED] / [instructions]" + }, + { + "name": "metric_NUMA %_Reads addressed to local DRAM", + "expression": "100 * ([UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL]) / ([UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE])" + }, + { + "name": "metric_NUMA %_Reads addressed to remote DRAM", + "expression": "100 * ([UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE]) / ([UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE])" + }, + { + "name": "metric_uncore frequency GHz", + "expression": "[UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]) / 1000000000" + }, + { + "name": "metric_TMA_Frontend_Bound(%)", + "expression": "100 * ([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / ([topdown.slots]))" + }, + { + "name": "metric_TMA_..Fetch_Latency(%)", + "expression": "100 * (5 * [IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / [topdown.slots])" + }, + { + "name": "metric_TMA_....ICache_Misses(%)", + "expression": "100 * ([ICACHE_16B.IFDATA_STALL] / [cpu-cycles])" + }, + { + "name": "metric_TMA_....ITLB_Misses(%)", + "expression": "100 * ([ICACHE_64B.IFTAG_STALL] / [cpu-cycles])" + }, + { + "name": "metric_TMA_....Branch_Resteers(%)", + "expression": "100 * ([INT_MISC.CLEAR_RESTEER_CYCLES] / [cpu-cycles] + (10 * [BACLEARS.ANY] / [cpu-cycles]))" + }, + { + "name": "metric_TMA_......Mispredicts_Resteers(%)", + "expression": "100 * (([BR_MISP_RETIRED.ALL_BRANCHES] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT])) * [INT_MISC.CLEAR_RESTEER_CYCLES] / [cpu-cycles])" + }, + { + "name": "metric_TMA_......Clears_Resteers(%)", + "expression": "100 * ((1 - ([BR_MISP_RETIRED.ALL_BRANCHES] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT]))) * [INT_MISC.CLEAR_RESTEER_CYCLES] / [cpu-cycles])" + }, + { + "name": "metric_TMA_......Unknown_Branches(%)", + "expression": "100 * (10 * [BACLEARS.ANY] / [cpu-cycles])" + }, + { + "name": "metric_TMA_..Fetch_Bandwidth(%)", + "expression": "100 * max(0, (([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [topdown.slots]) - (5 * [IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / [topdown.slots])))" + }, + { + "name": "metric_TMA_Bad_Speculation(%)", + "expression": "100 * (max((1 - (([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [topdown.slots]) + ([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) + (5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [topdown.slots]) + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))))), 0))" + }, + { + "name": "metric_TMA_..Branch_Mispredicts(%)", + "expression": "100 * (([BR_MISP_RETIRED.ALL_BRANCHES] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT])) * (max((1 - (([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [topdown.slots]) + ([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) + (5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [topdown.slots]) + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))))), 0)))" + }, + { + "name": "metric_TMA_..Machine_Clears(%)", + "expression": "100 * (max(0, ((max((1 - (([topdown-fe-bound] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring])) - [INT_MISC.UOP_DROPPING] / [topdown.slots]) + ([topdown-be-bound] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring])) + (5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [topdown.slots]) + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))))), 0)) - (([BR_MISP_RETIRED.ALL_BRANCHES] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT])) * (max((1 - (([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [topdown.slots]) + ([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) + (5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [topdown.slots]) + ([topdown-retiring] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring]))))), 0))))))" + }, + { + "name": "metric_TMA_Backend_Bound(%)", + "expression": "100 * ([topdown-be-bound] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring])) + ( 5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [topdown.slots])" + }, + { + "name": "metric_TMA_..Memory_Bound(%)", + "expression": "100 * ((([CYCLE_ACTIVITY.STALLS_MEM_ANY] + [EXE_ACTIVITY.BOUND_ON_STORES]) / ([CYCLE_ACTIVITY.STALLS_Total] + ([EXE_ACTIVITY.1_PORTS_UTIL] + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) * [EXE_ACTIVITY.2_PORTS_UTIL]) + [EXE_ACTIVITY.BOUND_ON_STORES])) * ([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) + (5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [topdown.slots]))" + }, + { + "name": "metric_TMA_....L1_Bound(%)", + "expression": "100 * max((([CYCLE_ACTIVITY.STALLS_MEM_ANY] - [CYCLE_ACTIVITY.STALLS_L1D_MISS]) / [cpu-cycles]), 0)" + }, + { + "name": "metric_TMA_......DTLB_Load(%)", + "expression": "100 * ((min((7 * [DTLB_LOAD_MISSES.STLB_HIT] + [DTLB_LOAD_MISSES.WALK_ACTIVE]), (max(([CYCLE_ACTIVITY.CYCLES_MEM_ANY] - [CYCLE_ACTIVITY.CYCLES_L1D_MISS]), 0))) / [cpu-cycles]) - ([DTLB_LOAD_MISSES.WALK_ACTIVE] / [cpu-cycles]))" + }, + { + "name": "metric_TMA_......Store_Fwd_Blk(%)", + "expression": "100 * (13 * [LD_BLOCKS.STORE_FORWARD] / [cpu-cycles])" + }, + { + "name": "metric_TMA_....L2_Bound(%)", + "expression": "100 * ((([MEM_LOAD_RETIRED.L2_HIT] * (1 + ([MEM_LOAD_RETIRED.FB_HIT] / [MEM_LOAD_RETIRED.L1_MISS]))) / (([MEM_LOAD_RETIRED.L2_HIT] * (1 + ([MEM_LOAD_RETIRED.FB_HIT] / [MEM_LOAD_RETIRED.L1_MISS]))) + [L1D_PEND_MISS.FB_FULL_PERIODS])) * (([CYCLE_ACTIVITY.STALLS_L1D_MISS] - [CYCLE_ACTIVITY.STALLS_L2_MISS]) / [cpu-cycles]))" + }, + { + "name": "metric_TMA_....L3_Bound(%)", + "expression": "100 * (([CYCLE_ACTIVITY.STALLS_L2_MISS] - [CYCLE_ACTIVITY.STALLS_L3_Miss]) / [cpu-cycles])" + }, + { + "name": "metric_TMA_......Contested_Accesses(%)", + "expression": "100 * ((((48 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000)) -(4 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000))) * ([MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD] * ([OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM] / ([OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM] + [OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD]))) + ((47.5 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000)) - (4 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000))) * [MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS]) * (1 + ([MEM_LOAD_RETIRED.FB_HIT] / [MEM_LOAD_RETIRED.L1_MISS]) / 2) / [cpu-cycles])" + }, + { + "name": "metric_TMA_......Data_Sharing(%)", + "expression": "100 * (((47.5 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000)) - (4 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000))) * ([MEM_LOAD_L3_HIT_RETIRED.XSNP_NO_FWD] + [MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD] * (1 - ([OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM] / ([OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM] + [OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD])))) * (1 + ([MEM_LOAD_RETIRED.FB_HIT] / [MEM_LOAD_RETIRED.L1_MISS]) / 2) / [cpu-cycles])" + }, + { + "name": "metric_TMA_......L3_Hit_Latency(%)", + "expression": "100 * (((23 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000)) - (4 * (([cpu-cycles] / [ref-cycles]) * [const_tsc_freq] / 1000000000))) * [MEM_LOAD_RETIRED.L3_HIT] * (1 + ([MEM_LOAD_RETIRED.FB_HIT] / [MEM_LOAD_RETIRED.L1_MISS]) / 2) / [cpu-cycles])" + }, + { + "name": "metric_TMA_......SQ_Full(%)", + "expression": "100 * ([L1D_PEND_MISS.L2_STALL] / [cpu-cycles])" + }, + { + "name": "metric_TMA_......MEM_Bandwidth(%)", + "expression": "100 * ((min(([cpu-cycles] - 0), ([OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD_c4] - 0))) / [cpu-cycles])" + }, + { + "name": "metric_TMA_......MEM_Latency(%)", + "expression": "100 * ((min(([cpu-cycles] - 0), ([OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD] - 0))) / [cpu-cycles] - ((min(([cpu-cycles] - 0), ([OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD_c4] - 0))) / [cpu-cycles]))" + }, + { + "name": "metric_TMA_....Store_Bound(%)", + "expression": "100 * ([EXE_ACTIVITY.BOUND_ON_STORES] / [cpu-cycles])" + }, + { + "name": "metric_TMA_..Core_Bound(%)", + "expression": "100 * (max(0, (([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) + (5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [topdown.slots]) - ((([CYCLE_ACTIVITY.CYCLES_MEM_ANY] + [EXE_ACTIVITY.BOUND_ON_STORES]) / ([CYCLE_ACTIVITY.STALLS_Total] + ([EXE_ACTIVITY.1_PORTS_UTIL] + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) * [EXE_ACTIVITY.2_PORTS_UTIL]) + [EXE_ACTIVITY.BOUND_ON_STORES])) * ([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) + (5 * [INT_MISC.RECOVERY_CYCLES_c1_e1]) / [topdown.slots])))))" + }, + { + "name": "metric_TMA_....Divider(%)", + "expression": "100 * ([ARITH.DIVIDER_ACTIVE] / [cpu-cycles])" + }, + { + "name": "metric_TMA_....Ports_Utilization(%)", + "expression": "100 * ((([CYCLE_ACTIVITY.STALLS_Total] - [CYCLE_ACTIVITY.CYCLES_MEM_ANY] + ([EXE_ACTIVITY.1_PORTS_UTIL] + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) * [EXE_ACTIVITY.2_PORTS_UTIL])) / [cpu-cycles]) if ([ARITH.DIVIDER_ACTIVE] - 0) < ([CYCLE_ACTIVITY.STALLS_Total] - [CYCLE_ACTIVITY.CYCLES_MEM_ANY]) else (([EXE_ACTIVITY.1_PORTS_UTIL] + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) * [EXE_ACTIVITY.2_PORTS_UTIL]) / [cpu-cycles]))" + }, + { + "name": "metric_TMA_......Ports_Utilized_0(%)", + "expression": "100 * max(0, (([CYCLE_ACTIVITY.STALLS_Total] - [CYCLE_ACTIVITY.CYCLES_MEM_ANY]) / [cpu-cycles]))" + }, + { + "name": "metric_TMA_......Ports_Utilized_1(%)", + "expression": "100 * ([EXE_ACTIVITY.1_PORTS_UTIL] / [cpu-cycles])" + }, + { + "name": "metric_TMA_......Ports_Utilized_2(%)", + "expression": "100 * ([EXE_ACTIVITY.2_PORTS_UTIL] / [cpu-cycles])" + }, + { + "name": "metric_TMA_......Ports_Utilized_3m(%)", + "expression": "100 * [UOPS_EXECUTED.CYCLES_GE_3] / [cpu-cycles]" + }, + { + "name": "metric_TMA_Retiring(%)", + "expression": "100 * ([topdown-retiring] / ([topdown-retiring] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-be-bound]))" + }, + { + "name": "metric_TMA_..Light_Operations(%)", + "expression": "100 * (max(0, (([topdown-retiring] / (([topdown-retiring] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-be-bound]))) - ((((([topdown-retiring] / (([topdown-retiring] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-be-bound]))) * [topdown.slots]) / [UOPS_ISSUED.ANY]) * [IDQ.MS_UOPS] / [topdown.slots])))))" + }, + { + "name": "metric_TMA_..Heavy_Operations(%)", + "expression": "100 * ((((([topdown-retiring] / (([topdown-retiring] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-be-bound]))) * [topdown.slots]) / [UOPS_ISSUED.ANY]) * [IDQ.MS_UOPS] / [topdown.slots]))" + }, + { + "name": "metric_TMA_....Microcode_Sequencer(%)", + "expression": "100 * (((([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-found]))) * [topdown.slots]) / [UOPS_ISSUED.ANY]) * [IDQ.MS_UOPS] / [topdown.slots])" + }, + { + "name": "metric_TMA_Info_CoreIPC", + "expression": "[instructions] / [CPU_CLK_UNHALTED.DISTRIBUTED]" + }, + { + "name": "metric_TMA_Info_System_SMT_2T_Utilization", + "expression": "(1 - [CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE] / [CPU_CLK_UNHALTED.REF_DISTRIBUTED]) if [const_socket_count] > 1 else 0" + } +] \ No newline at end of file diff --git a/events/metric_skx_clx.json b/events/metric_skx_clx.json index 2847130..85189bd 100644 --- a/events/metric_skx_clx.json +++ b/events/metric_skx_clx.json @@ -1,383 +1,383 @@ [ - { - "name" : "metric_CPU operating frequency (in GHz)", - "expression" : "([cpu-cycles] / [ref-cycles]) * ([const_tsc_freq] / 1000000000)" - }, - { - "name" : "metric_CPU utilization %", - "expression" : "100 * [ref-cycles] / [const_TSC]" - }, - { - "name" : "metric_CPU utilization% in kernel mode", - "expression" : "100 * [ref-cycles:k] / [const_TSC]" - }, - { - "name" : "metric_CPI", - "expression" : "[cpu-cycles] / [instructions]" - }, - { - "name" : "metric_kernel_CPI", - "expression" : "[cpu-cycles:k] / [instructions:k]" - }, - { - "name" : "metric_L1D MPI (includes data+rfo w/ prefetches)", - "tags" : "transaction", - "expression" : "[L1D.REPLACEMENT] / [instructions]" - }, - { - "name" : "metric_L1D demand data read hits per instr", - "expression" : "[MEM_LOAD_RETIRED.L1_HIT] / [instructions]" - }, - { - "name" : "metric_L1-I code read misses (w/ prefetches) per instr", - "expression" : "[L2_RQSTS.ALL_CODE_RD] / [instructions]" - }, - { - "name" : "metric_L2 demand data read hits per instr", - "expression" : "[MEM_LOAD_RETIRED.L2_HIT] / [instructions]" - }, - { - "name" : "metric_L2 MPI (includes code+data+rfo w/ prefetches)", - "expression" : "[L2_LINES_IN.ALL] / [instructions]" - }, - { - "name" : "metric_L2 demand data read MPI", - "expression" : "[MEM_LOAD_RETIRED.L2_MISS] / [instructions]" - }, - { - "name" : "metric_L2 demand code MPI", - "expression" : "[L2_RQSTS.CODE_RD_MISS] / [instructions]" - }, - { - "name" : "metric_LLC MPI (includes code+data+rfo w/ prefetches)", - "expression" : "([UNC_CHA_TOR_INSERTS.IA_MISS.0x12CC0233] + [UNC_CHA_TOR_INSERTS.IA_MISS.0x12D40433] + [UNC_CHA_TOR_INSERTS.IA_MISS.0x12C40033]) / [instructions]" - }, - { - "name" : "metric_LLC code read MPI (demand+prefetch)", - "expression" : "[UNC_CHA_TOR_INSERTS.IA_MISS.0x12CC0233] / [instructions]" - }, - { - "name" : "metric_LLC data read MPI (demand+prefetch)", - "expression" : "[UNC_CHA_TOR_INSERTS.IA_MISS.0x12D40433] / [instructions]" - }, - { - "name" : "metric_LLC total HITM (per instr)", - "expression" : "[OCR.ALL_READS.L3_MISS.REMOTE_HITM] / [instructions]" - }, - { - "name" : "metric_LLC total HIT clean line forwards (per instr)", - "expression" : "[OCR.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD] / [instructions]" - }, - { - "name" : "metric_Average LLC data read miss latency (in clks)", - "expression" : "[OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD] / [OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD]" - }, - { - "name" : "metric_Average LLC data read miss latency (in ns)", - "expression" : "(1000000000 * [UNC_CHA_TOR_OCCUPANCY.IA_MISS.0x40433] / [UNC_CHA_TOR_INSERTS.IA_MISS.0x40433]) / ( [UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]) )" - }, - { - "name" : "metric_Average LLC data read miss latency for LOCAL requests (in ns)", - "expression" : "(1000000000 * [UNC_CHA_TOR_OCCUPANCY.IA_MISS.0x40432] / [UNC_CHA_TOR_INSERTS.IA_MISS.0x40432]) / ( [UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]) )" - }, - { - "name" : "metric_Average LLC data read miss latency for REMOTE requests (in ns)", - "expression" : "(1000000000 * [UNC_CHA_TOR_OCCUPANCY.IA_MISS.0x40431] / [UNC_CHA_TOR_INSERTS.IA_MISS.0x40431]) / ( [UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]) )" - }, - { - "name" : "metric_ITLB MPI", - "expression" : "[ITLB_MISSES.WALK_COMPLETED] / [instructions]" - }, - { - "name" : "metric_ITLB large page MPI", - "expression" : "[ITLB_MISSES.WALK_COMPLETED_2M_4M] / [instructions]" - }, - { - "name" : "metric_DTLB load MPI", - "expression" : "[DTLB_LOAD_MISSES.WALK_COMPLETED] / [instructions]" - }, - { - "name" : "metric_DTLB 4KB page load MPI", - "expression" : "[DTLB_LOAD_MISSES.WALK_COMPLETED_4K] / [instructions]" - }, - { - "name" : "metric_DTLB 2MB large page load MPI", - "expression" : "[DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M] / [instructions]" - }, - { - "name" : "metric_DTLB 1GB large page load MPI", - "expression" : "[DTLB_LOAD_MISSES.WALK_COMPLETED_1G] / [instructions]" - }, - { - "name" : "metric_DTLB store MPI", - "expression" : "[DTLB_STORE_MISSES.WALK_COMPLETED] / [instructions]" - }, - { - "name" : "metric_DTLB load miss latency (in core clks)", - "expression" : "[DTLB_LOAD_MISSES.WALK_ACTIVE] / [DTLB_LOAD_MISSES.WALK_COMPLETED]" - }, - { - "name" : "metric_DTLB store miss latency (in core clks)", - "expression" : "[DTLB_STORE_MISSES.WALK_ACTIVE] / [DTLB_STORE_MISSES.WALK_COMPLETED]" - }, - { - "name" : "metric_ITLB miss latency (in core clks)", - "expression" : "[ITLB_MISSES.WALK_ACTIVE] / [ITLB_MISSES.WALK_COMPLETED]" - }, - { - "name" : "metric_NUMA %_Reads addressed to local DRAM", - "expression" : "100 * [UNC_CHA_TOR_INSERTS.IA_MISS.0x40432] / ([UNC_CHA_TOR_INSERTS.IA_MISS.0x40432] + [UNC_CHA_TOR_INSERTS.IA_MISS.0x40431])" - }, - { - "name" : "metric_NUMA %_Reads addressed to remote DRAM", - "expression" : "100 * [UNC_CHA_TOR_INSERTS.IA_MISS.0x40431] / ([UNC_CHA_TOR_INSERTS.IA_MISS.0x40432] + [UNC_CHA_TOR_INSERTS.IA_MISS.0x40431])" - }, - { - "name" : "metric_UPI Data transmit BW (MB/sec) (only data)", - "expression" : "[UNC_UPI_TxL_FLITS.ALL_DATA] * (64 / 9) / 1000000" - }, - { - "name" : "metric_UPI Transmit utilization_% (includes control)", - "expression" : "100 * (([UNC_UPI_TxL_FLITS.ALL_DATA] + [UNC_UPI_TxL_FLITS.NON_DATA]) / 3) / ((((([const_tsc_freq] / ([const_cha_count] * [const_thread_count])) / (([const_tsc_freq] / ([const_cha_count] * [const_thread_count])) - [FREERUN_CORE_C6_RESIDENCY])) * ([UNC_UPI_CLOCKTICKS] - [UNC_UPI_L1_POWER_CYCLES])) * 5 / 6))" - }, - { - "name" : "metric_uncore frequency GHz", - "expression" : "[UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]) / 1000000000" - }, - { - "name" : "metric_package power (watts)", - "expression" : "[power/energy-pkg/]" - }, - { - "name" : "metric_DRAM power (watts)", - "expression" : "[power/energy-ram/]" - }, - { - "name" : "metric_core c6 residency %", - "expression" : "100 * [cstate_core/c6-residency/] / [const_TSC]" - }, - { - "name" : "metric_package c6 residency %", - "expression" : "100 * [cstate_pkg/c6-residency/] * [const_core_count] / [const_TSC]" - }, - { - "name" : "metric_core % cycles in non AVX license", - "expression" : "(100 * [CORE_POWER.LVL0_TURBO_LICENSE]) / ([CORE_POWER.LVL0_TURBO_LICENSE] + [CORE_POWER.LVL1_TURBO_LICENSE] + [CORE_POWER.LVL2_TURBO_LICENSE])" - }, - { - "name" : "metric_core % cycles in AVX2 license", - "expression" : "(100 * [CORE_POWER.LVL1_TURBO_LICENSE]) / ([CORE_POWER.LVL0_TURBO_LICENSE] + [CORE_POWER.LVL1_TURBO_LICENSE] + [CORE_POWER.LVL2_TURBO_LICENSE])" - }, - { - "name" : "metric_core % cycles in AVX-512 license", - "expression" : "(100 * [CORE_POWER.LVL2_TURBO_LICENSE]) / ([CORE_POWER.LVL0_TURBO_LICENSE] + [CORE_POWER.LVL1_TURBO_LICENSE] + [CORE_POWER.LVL2_TURBO_LICENSE])" - }, - { - "name" : "metric_core initiated local dram read bandwidth(MB/sec)", - "expression" : "[OCR.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP] * 64 / 1000000" - }, - { - "name" : "metric_core initiated remote dram read bandwidth(MB/sec)", - "expression" : "[OCR.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP_ocr_msr_3fB80007f7] * 64 / 1000000" - }, - { - "name" : "metric_memory bandwidth read (MB/sec)", - "expression" : "[UNC_M_CAS_COUNT.RD] * 64 / 1000000" - }, - { - "name" : "metric_memory bandwidth write (MB/sec)", - "expression" : "[UNC_M_CAS_COUNT.WR] * 64 / 1000000" - }, - { - "name" : "metric_memory bandwidth total (MB/sec)", - "expression" : "([UNC_M_CAS_COUNT.RD] + [UNC_M_CAS_COUNT.WR]) * 64 / 1000000" - }, - { - "name" : "metric_DCPMEM_memory_mode near memory cache read miss rate%", - "expression" : "100 * ([UNC_M_PMM_RPQ_INSERTS] / ([UNC_M2M_TAG_HIT.NM_RD_HIT_CLEAN] + [UNC_M2M_TAG_HIT.NM_RD_HIT_DIRTY] + [UNC_M_PMM_RPQ_INSERTS]))" - }, - { - "name" : "metric_3DXP_memory bandwidth read (MB/sec)", - "expression" : "[UNC_M_PMM_RPQ_INSERTS] * 64 / 1000000" - }, - { - "name" : "metric_3DXP_memory bandwidth write (MB/sec)", - "expression" : "[UNC_M_PMM_WPQ_INSERTS] * 64 / 1000000" - }, - { - "name" : "metric_3DXP_memory bandwidth total (MB/sec)", - "expression" : "([UNC_M_PMM_RPQ_INSERTS] + [UNC_M_PMM_WPQ_INSERTS]) * 64 / 1000000" - }, - { - "name" : "metric_3DXP memory RPQ read latency (ns)", - "expression" : "(([UNC_M_PMM_RPQ_OCCUPANCY.ALL] / [UNC_M_PMM_RPQ_INSERTS]) / ([UNC_M_CLOCKTICKS] / ([const_socket_count] * 6))) * 1000000000" - }, - { - "name" : "metric_3DXP memory WPQ write latency (ns)", - "expression" : "(([UNC_M_PMM_WPQ_OCCUPANCY.ALL] / [UNC_M_PMM_WPQ_INSERTS]) / ([UNC_M_CLOCKTICKS] / ([const_socket_count] * 6))) * 1000000000" - }, - { - "name" : "metric_IO_bandwidth_disk_or_network_writes (MB/sec)", - "expression" : "([UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0] + [UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1] + [UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2] + [UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3]) * 4 / 1000000" - }, - { - "name" : "metric_IO_bandwidth_disk_or_network_reads (MB/sec)", - "expression" : "([UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0] + [UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1] + [UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2] + [UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3]) * 4 / 1000000" - }, - { - "name" : "metric_TMAM_Info_cycles_both_threads_active(%)", - "expression" : "100 * ( (1 - ([CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE] / ([CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY] / 2)) ) if [const_thread_count] > 1 else 0)" - }, - { - "name" : "metric_TMAM_Info_CoreIPC", - "expression" : "[instructions] / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" - }, - { - "name" : "metric_TMAM_Frontend_Bound(%)", - "expression" : "100 * [IDQ_UOPS_NOT_DELIVERED.CORE] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))" - }, - { - "name" : "metric_TMAM_..Frontend_Latency(%)", - "expression" : "100 * [IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / ([CPU_CLK_UNHALTED.THREAD_ANY] /[const_thread_count])" - }, - { - "name" : "metric_TMAM_....ICache_Misses(%)", - "expression" : "100 * ([ICACHE_16B.IFDATA_STALL] + 2 * [ICACHE_16B.c1_e1_IFDATA_STALL]) / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_....ITLB_Misses(%)", - "expression" : "100 * [ICACHE_64B.IFTAG_STALL] / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_....Branch_Resteers(%)", - "expression" : "100 * ([INT_MISC.CLEAR_RESTEER_CYCLES] + 9 * [BACLEARS.ANY]) / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_......Mispredicts_Resteers(%)", - "expression" : "100 * [INT_MISC.CLEAR_RESTEER_CYCLES] * ([BR_MISP_RETIRED.ALL_BRANCHES] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT])) / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_......Clears_Resteers(%)", - "expression" : "100 * [INT_MISC.CLEAR_RESTEER_CYCLES] * (1 - ([BR_MISP_RETIRED.ALL_BRANCHES] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT]))) / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_......Unknown_Branches_Resteers(%)", - "expression" : "100 * (9 * [BACLEARS.ANY]) / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_..Frontend_Bandwidth(%)", - "expression" : "100 * ([IDQ_UOPS_NOT_DELIVERED.CORE] - 4 * [IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE]) / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))" - }, - { - "name" : "metric_TMAM_Bad_Speculation(%)", - "expression" : "100 * ([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + ((4 * [INT_MISC.RECOVERY_CYCLES_ANY]) / [const_thread_count])) / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])) " - }, - { - "name" : "metric_TMAM_..Branch_Mispredicts(%)", - "expression" : "100 * ([BR_MISP_RETIRED.ALL_BRANCHES] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT])) * ([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + (4 * [INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count])) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]) " - }, - { - "name" : "metric_TMAM_..Machine_Clears(%)", - "expression" : "100 * ([MACHINE_CLEARS.COUNT] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT])) * ([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + (4 * [INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count])) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" - }, - { - "name" : "metric_TMAM_Backend_bound(%)", - "expression" : "100 - (100 * ([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + 4 * ([INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count]) + [IDQ_UOPS_NOT_DELIVERED.CORE] + [UOPS_RETIRED.RETIRE_SLOTS]) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])) " - }, - { - "name" : "metric_TMAM_..Memory_Bound(%)", - "expression" : "100 * (1 - (([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + 4 * ([INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count]) + [IDQ_UOPS_NOT_DELIVERED.CORE] + [UOPS_RETIRED.RETIRE_SLOTS]) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))) * ([CYCLE_ACTIVITY.STALLS_MEM_ANY] + [EXE_ACTIVITY.BOUND_ON_STORES]) / ([EXE_ACTIVITY.EXE_BOUND_0_PORTS] + [EXE_ACTIVITY.1_PORTS_UTIL] + ([EXE_ACTIVITY.2_PORTS_UTIL] if ([instructions] / [cpu-cycles]) > 1.8 else 0) + [CYCLE_ACTIVITY.STALLS_MEM_ANY] + [EXE_ACTIVITY.BOUND_ON_STORES])" - }, - { "name" : "metric_TMAM_....L1_Bound(%)", - "expression" : "100 * ([CYCLE_ACTIVITY.STALLS_MEM_ANY] - [CYCLE_ACTIVITY.STALLS_L1D_MISS]) / [cpu-cycles]" - }, - { "name" : "metric_TMAM_......DTLB_Load(%)", - "expression" : "100 * (7 * [DTLB_LOAD_MISSES.STLB_HIT] + [DTLB_LOAD_MISSES.WALK_ACTIVE]) / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_......Store_Fwd_Blk(%)", - "expression" : "100 * (13 * [LD_BLOCKS.STORE_FORWARD]) / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_....L2_Bound(%)", - "expression" : "100 * ([CYCLE_ACTIVITY.STALLS_L1D_MISS] - [CYCLE_ACTIVITY.STALLS_L2_MISS]) / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_....L3_Bound(%)", - "expression" : "100 * ([CYCLE_ACTIVITY.STALLS_L2_MISS] - [CYCLE_ACTIVITY.STALLS_L3_MISS]) / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_......L3_Latency(%)", - "expression" : "100 * (((min([OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_DATA_RD], [cpu-cycles]) - min([OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_L3_MISS_DEMAND_DATA_RD], [cpu-cycles])) / [cpu-cycles]) - ((min([OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD_GE_6], [cpu-cycles]) - min([OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD_GE_6] , [cpu-cycles])) / [cpu-cycles]))" - }, - { - "name" : "metric_TMAM_......L3_Bandwidth(%)", - "expression" : "100 * (min([OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD_GE_6], [cpu-cycles]) - min([OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD_GE_6], [cpu-cycles])) / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_......SQ_Full(%)", - "expression" : "100 * ([OFFCORE_REQUESTS_BUFFER.SQ_FULL] / [const_thread_count]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" - }, - { - "name" : "metric_TMAM_....MEM_Bound(%)", - "expression" : "100 * [CYCLE_ACTIVITY.STALLS_L3_MISS] / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_......MEM_Bandwidth(%)", - "expression" : "100 * min([OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD_GE_6] , [cpu-cycles]) / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_......MEM_Latency(%)", - "expression" : "100 * (min([OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_L3_MISS_DEMAND_DATA_RD] , [cpu-cycles]) - min([OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD_GE_6] , [cpu-cycles]))/ [cpu-cycles]" - }, - { - "name" : "metric_TMAM_....Stores_Bound(%)", - "expression" : "100 * [EXE_ACTIVITY.BOUND_ON_STORES] / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_......DTLB_Store(%)", - "expression" : "100 * (7 * [DTLB_STORE_MISSES.STLB_HIT] + [DTLB_STORE_MISSES.WALK_ACTIVE]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" - }, - { - "name" : "metric_TMAM_..Core_Bound(%)", - "expression" : "100 * (1 - (([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + (4 * ([INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count])) + [IDQ_UOPS_NOT_DELIVERED.CORE] + [UOPS_RETIRED.RETIRE_SLOTS]) / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])))) * (1 - (([CYCLE_ACTIVITY.STALLS_MEM_ANY] + [EXE_ACTIVITY.BOUND_ON_STORES]) / ([EXE_ACTIVITY.EXE_BOUND_0_PORTS] + [EXE_ACTIVITY.1_PORTS_UTIL] + ([EXE_ACTIVITY.2_PORTS_UTIL] if ([instructions] / [cpu-cycles]) > 1.8 else 0) + [CYCLE_ACTIVITY.STALLS_MEM_ANY] + [EXE_ACTIVITY.BOUND_ON_STORES])))" - }, - { - "name" : "metric_TMAM_....Divider(%)", - "expression" : "100 * [ARITH.DIVIDER_ACTIVE] / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_....Ports_Utilization(%)", - "expression" : "100 * (([EXE_ACTIVITY.EXE_BOUND_0_PORTS] + [EXE_ACTIVITY.1_PORTS_UTIL] + ([EXE_ACTIVITY.2_PORTS_UTIL] if ([instructions] / [cpu-cycles]) > 1.8 else 0) + [CYCLE_ACTIVITY.STALLS_MEM_ANY] + [EXE_ACTIVITY.BOUND_ON_STORES]) - [CYCLE_ACTIVITY.STALLS_MEM_ANY] - [EXE_ACTIVITY.BOUND_ON_STORES]) / [cpu-cycles]" - }, - { - "name" : "metric_TMAM_......0_Port_Utilized(%)", - "expression" : "100 * (([UOPS_EXECUTED.CORE_CYCLES_NONE] / 2) if ([const_thread_count] > 1) else [EXE_ACTIVITY.EXE_BOUND_0_PORTS]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" - }, - { - "name" : "metric_TMAM_......1_Port_Utilized(%)", - "expression" : "100 * ((([UOPS_EXECUTED.CORE_CYCLES_GE_1] - [UOPS_EXECUTED.CORE_CYCLES_GE_2]) / 2) if ([const_thread_count] > 1) else [EXE_ACTIVITY.1_PORTS_UTIL]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" - }, - { - "name" : "metric_TMAM_......2_Port_Utilized(%)", - "expression" : "100 * ((([UOPS_EXECUTED.CORE_CYCLES_GE_2] - [UOPS_EXECUTED.CORE_CYCLES_GE_3]) / 2) if ([const_thread_count] > 1) else [EXE_ACTIVITY.2_PORTS_UTIL]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" - }, - { - "name" : "metric_TMAM_......3m_Ports_Utilized(%)", - "expression" : "100 * [UOPS_EXECUTED.CORE_CYCLES_GE_3] / [CPU_CLK_UNHALTED.THREAD_ANY]" - }, - { - "name" : "metric_TMAM_Retiring(%)", - "expression" : "100 * [UOPS_RETIRED.RETIRE_SLOTS] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))" - }, - { - "name" : "metric_TMAM_..Base(%)", - "expression" : "100 * (([UOPS_RETIRED.RETIRE_SLOTS] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))) - (([UOPS_RETIRED.RETIRE_SLOTS] / [UOPS_ISSUED.ANY]) * [IDQ.MS_UOPS] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))))" - }, - { - "name" : "metric_TMAM_..Microcode_Sequencer(%)", - "expression" : "100 * (([UOPS_RETIRED.RETIRE_SLOTS] / [UOPS_ISSUED.ANY]) * [IDQ.MS_UOPS] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])))" - } -] - - + { + "name": "metric_CPU operating frequency (in GHz)", + "expression": "([cpu-cycles] / [ref-cycles]) * ([const_tsc_freq] / 1000000000)" + }, + { + "name": "metric_CPU utilization %", + "expression": "100 * [ref-cycles] / [const_TSC]" + }, + { + "name": "metric_CPU utilization% in kernel mode", + "expression": "100 * [ref-cycles:k] / [const_TSC]" + }, + { + "name": "metric_CPI", + "expression": "[cpu-cycles] / [instructions]" + }, + { + "name": "metric_kernel_CPI", + "expression": "[cpu-cycles:k] / [instructions:k]" + }, + { + "name": "metric_L1D MPI (includes data+rfo w/ prefetches)", + "tags": "transaction", + "expression": "[L1D.REPLACEMENT] / [instructions]" + }, + { + "name": "metric_L1D demand data read hits per instr", + "expression": "[MEM_LOAD_RETIRED.L1_HIT] / [instructions]" + }, + { + "name": "metric_L1-I code read misses (w/ prefetches) per instr", + "expression": "[L2_RQSTS.ALL_CODE_RD] / [instructions]" + }, + { + "name": "metric_L2 demand data read hits per instr", + "expression": "[MEM_LOAD_RETIRED.L2_HIT] / [instructions]" + }, + { + "name": "metric_L2 MPI (includes code+data+rfo w/ prefetches)", + "expression": "[L2_LINES_IN.ALL] / [instructions]" + }, + { + "name": "metric_L2 demand data read MPI", + "expression": "[MEM_LOAD_RETIRED.L2_MISS] / [instructions]" + }, + { + "name": "metric_L2 demand code MPI", + "expression": "[L2_RQSTS.CODE_RD_MISS] / [instructions]" + }, + { + "name": "metric_LLC MPI (includes code+data+rfo w/ prefetches)", + "expression": "([UNC_CHA_TOR_INSERTS.IA_MISS.0x12CC0233] + [UNC_CHA_TOR_INSERTS.IA_MISS.0x12D40433] + [UNC_CHA_TOR_INSERTS.IA_MISS.0x12C40033]) / [instructions]" + }, + { + "name": "metric_LLC code read MPI (demand+prefetch)", + "expression": "[UNC_CHA_TOR_INSERTS.IA_MISS.0x12CC0233] / [instructions]" + }, + { + "name": "metric_LLC data read MPI (demand+prefetch)", + "expression": "[UNC_CHA_TOR_INSERTS.IA_MISS.0x12D40433] / [instructions]" + }, + { + "name": "metric_LLC total HITM (per instr)", + "expression": "[OCR.ALL_READS.L3_MISS.REMOTE_HITM] / [instructions]" + }, + { + "name": "metric_LLC total HIT clean line forwards (per instr)", + "expression": "[OCR.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD] / [instructions]" + }, + { + "name": "metric_Average LLC data read miss latency (in clks)", + "expression": "[OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD] / [OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD]" + }, + { + "name": "metric_Average LLC data read miss latency (in ns)", + "expression": "(1000000000 * [UNC_CHA_TOR_OCCUPANCY.IA_MISS.0x40433] / [UNC_CHA_TOR_INSERTS.IA_MISS.0x40433]) / ( [UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]) )" + }, + { + "name": "metric_Average LLC data read miss latency for LOCAL requests (in ns)", + "expression": "(1000000000 * [UNC_CHA_TOR_OCCUPANCY.IA_MISS.0x40432] / [UNC_CHA_TOR_INSERTS.IA_MISS.0x40432]) / ( [UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]) )" + }, + { + "name": "metric_Average LLC data read miss latency for REMOTE requests (in ns)", + "expression": "(1000000000 * [UNC_CHA_TOR_OCCUPANCY.IA_MISS.0x40431] / [UNC_CHA_TOR_INSERTS.IA_MISS.0x40431]) / ( [UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]) )" + }, + { + "name": "metric_ITLB MPI", + "expression": "[ITLB_MISSES.WALK_COMPLETED] / [instructions]" + }, + { + "name": "metric_ITLB large page MPI", + "expression": "[ITLB_MISSES.WALK_COMPLETED_2M_4M] / [instructions]" + }, + { + "name": "metric_DTLB load MPI", + "expression": "[DTLB_LOAD_MISSES.WALK_COMPLETED] / [instructions]" + }, + { + "name": "metric_DTLB 4KB page load MPI", + "expression": "[DTLB_LOAD_MISSES.WALK_COMPLETED_4K] / [instructions]" + }, + { + "name": "metric_DTLB 2MB large page load MPI", + "expression": "[DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M] / [instructions]" + }, + { + "name": "metric_DTLB 1GB large page load MPI", + "expression": "[DTLB_LOAD_MISSES.WALK_COMPLETED_1G] / [instructions]" + }, + { + "name": "metric_DTLB store MPI", + "expression": "[DTLB_STORE_MISSES.WALK_COMPLETED] / [instructions]" + }, + { + "name": "metric_DTLB load miss latency (in core clks)", + "expression": "[DTLB_LOAD_MISSES.WALK_ACTIVE] / [DTLB_LOAD_MISSES.WALK_COMPLETED]" + }, + { + "name": "metric_DTLB store miss latency (in core clks)", + "expression": "[DTLB_STORE_MISSES.WALK_ACTIVE] / [DTLB_STORE_MISSES.WALK_COMPLETED]" + }, + { + "name": "metric_ITLB miss latency (in core clks)", + "expression": "[ITLB_MISSES.WALK_ACTIVE] / [ITLB_MISSES.WALK_COMPLETED]" + }, + { + "name": "metric_NUMA %_Reads addressed to local DRAM", + "expression": "100 * [UNC_CHA_TOR_INSERTS.IA_MISS.0x40432] / ([UNC_CHA_TOR_INSERTS.IA_MISS.0x40432] + [UNC_CHA_TOR_INSERTS.IA_MISS.0x40431])" + }, + { + "name": "metric_NUMA %_Reads addressed to remote DRAM", + "expression": "100 * [UNC_CHA_TOR_INSERTS.IA_MISS.0x40431] / ([UNC_CHA_TOR_INSERTS.IA_MISS.0x40432] + [UNC_CHA_TOR_INSERTS.IA_MISS.0x40431])" + }, + { + "name": "metric_UPI Data transmit BW (MB/sec) (only data)", + "expression": "[UNC_UPI_TxL_FLITS.ALL_DATA] * (64 / 9) / 1000000" + }, + { + "name": "metric_UPI Transmit utilization_% (includes control)", + "expression": "100 * (([UNC_UPI_TxL_FLITS.ALL_DATA] + [UNC_UPI_TxL_FLITS.NON_DATA]) / 3) / ((((([const_tsc_freq] / ([const_cha_count] * [const_thread_count])) / (([const_tsc_freq] / ([const_cha_count] * [const_thread_count])) - [FREERUN_CORE_C6_RESIDENCY])) * ([UNC_UPI_CLOCKTICKS] - [UNC_UPI_L1_POWER_CYCLES])) * 5 / 6))" + }, + { + "name": "metric_uncore frequency GHz", + "expression": "[UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]) / 1000000000" + }, + { + "name": "metric_package power (watts)", + "expression": "[power/energy-pkg/]" + }, + { + "name": "metric_DRAM power (watts)", + "expression": "[power/energy-ram/]" + }, + { + "name": "metric_core c6 residency %", + "expression": "100 * [cstate_core/c6-residency/] / [const_TSC]" + }, + { + "name": "metric_package c6 residency %", + "expression": "100 * [cstate_pkg/c6-residency/] * [const_core_count] / [const_TSC]" + }, + { + "name": "metric_core % cycles in non AVX license", + "expression": "(100 * [CORE_POWER.LVL0_TURBO_LICENSE]) / ([CORE_POWER.LVL0_TURBO_LICENSE] + [CORE_POWER.LVL1_TURBO_LICENSE] + [CORE_POWER.LVL2_TURBO_LICENSE])" + }, + { + "name": "metric_core % cycles in AVX2 license", + "expression": "(100 * [CORE_POWER.LVL1_TURBO_LICENSE]) / ([CORE_POWER.LVL0_TURBO_LICENSE] + [CORE_POWER.LVL1_TURBO_LICENSE] + [CORE_POWER.LVL2_TURBO_LICENSE])" + }, + { + "name": "metric_core % cycles in AVX-512 license", + "expression": "(100 * [CORE_POWER.LVL2_TURBO_LICENSE]) / ([CORE_POWER.LVL0_TURBO_LICENSE] + [CORE_POWER.LVL1_TURBO_LICENSE] + [CORE_POWER.LVL2_TURBO_LICENSE])" + }, + { + "name": "metric_core initiated local dram read bandwidth (MB/sec)", + "expression": "[OCR.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP] * 64 / 1000000" + }, + { + "name": "metric_core initiated remote dram read bandwidth (MB/sec)", + "expression": "[OCR.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP_ocr_msr_3fB80007f7] * 64 / 1000000" + }, + { + "name": "metric_memory bandwidth read (MB/sec)", + "expression": "[UNC_M_CAS_COUNT.RD] * 64 / 1000000" + }, + { + "name": "metric_memory bandwidth write (MB/sec)", + "expression": "[UNC_M_CAS_COUNT.WR] * 64 / 1000000" + }, + { + "name": "metric_memory bandwidth total (MB/sec)", + "expression": "([UNC_M_CAS_COUNT.RD] + [UNC_M_CAS_COUNT.WR]) * 64 / 1000000" + }, + { + "name": "metric_DCPMEM_memory_mode near memory cache read miss rate%", + "expression": "100 * ([UNC_M_PMM_RPQ_INSERTS] / ([UNC_M2M_TAG_HIT.NM_RD_HIT_CLEAN] + [UNC_M2M_TAG_HIT.NM_RD_HIT_DIRTY] + [UNC_M_PMM_RPQ_INSERTS]))" + }, + { + "name": "metric_3DXP_memory bandwidth read (MB/sec)", + "expression": "[UNC_M_PMM_RPQ_INSERTS] * 64 / 1000000" + }, + { + "name": "metric_3DXP_memory bandwidth write (MB/sec)", + "expression": "[UNC_M_PMM_WPQ_INSERTS] * 64 / 1000000" + }, + { + "name": "metric_3DXP_memory bandwidth total (MB/sec)", + "expression": "([UNC_M_PMM_RPQ_INSERTS] + [UNC_M_PMM_WPQ_INSERTS]) * 64 / 1000000" + }, + { + "name": "metric_3DXP memory RPQ read latency (ns)", + "expression": "(([UNC_M_PMM_RPQ_OCCUPANCY.ALL] / [UNC_M_PMM_RPQ_INSERTS]) / ([UNC_M_CLOCKTICKS] / ([const_socket_count] * 6))) * 1000000000" + }, + { + "name": "metric_3DXP memory WPQ write latency (ns)", + "expression": "(([UNC_M_PMM_WPQ_OCCUPANCY.ALL] / [UNC_M_PMM_WPQ_INSERTS]) / ([UNC_M_CLOCKTICKS] / ([const_socket_count] * 6))) * 1000000000" + }, + { + "name": "metric_IO_bandwidth_disk_or_network_writes (MB/sec)", + "expression": "([UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0] + [UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1] + [UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2] + [UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3]) * 4 / 1000000" + }, + { + "name": "metric_IO_bandwidth_disk_or_network_reads (MB/sec)", + "expression": "([UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0] + [UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1] + [UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2] + [UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3]) * 4 / 1000000" + }, + { + "name": "metric_TMAM_Info_cycles_both_threads_active(%)", + "expression": "100 * ( (1 - ([CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE] / ([CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY] / 2)) ) if [const_thread_count] > 1 else 0)" + }, + { + "name": "metric_TMAM_Info_CoreIPC", + "expression": "[instructions] / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" + }, + { + "name": "metric_TMAM_Frontend_Bound(%)", + "expression": "100 * [IDQ_UOPS_NOT_DELIVERED.CORE] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))" + }, + { + "name": "metric_TMAM_..Frontend_Latency(%)", + "expression": "100 * [IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / ([CPU_CLK_UNHALTED.THREAD_ANY] /[const_thread_count])" + }, + { + "name": "metric_TMAM_....ICache_Misses(%)", + "expression": "100 * ([ICACHE_16B.IFDATA_STALL] + 2 * [ICACHE_16B.c1_e1_IFDATA_STALL]) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_....ITLB_Misses(%)", + "expression": "100 * [ICACHE_64B.IFTAG_STALL] / [cpu-cycles]" + }, + { + "name": "metric_TMAM_....Branch_Resteers(%)", + "expression": "100 * ([INT_MISC.CLEAR_RESTEER_CYCLES] + 9 * [BACLEARS.ANY]) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_......Mispredicts_Resteers(%)", + "expression": "100 * [INT_MISC.CLEAR_RESTEER_CYCLES] * ([BR_MISP_RETIRED.ALL_BRANCHES] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT])) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_......Clears_Resteers(%)", + "expression": "100 * [INT_MISC.CLEAR_RESTEER_CYCLES] * (1 - ([BR_MISP_RETIRED.ALL_BRANCHES] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT]))) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_......Unknown_Branches_Resteers(%)", + "expression": "100 * (9 * [BACLEARS.ANY]) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_..Frontend_Bandwidth(%)", + "expression": "100 * ([IDQ_UOPS_NOT_DELIVERED.CORE] - 4 * [IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE]) / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))" + }, + { + "name": "metric_TMAM_Bad_Speculation(%)", + "expression": "100 * ([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + ((4 * [INT_MISC.RECOVERY_CYCLES_ANY]) / [const_thread_count])) / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])) " + }, + { + "name": "metric_TMAM_..Branch_Mispredicts(%)", + "expression": "100 * ([BR_MISP_RETIRED.ALL_BRANCHES] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT])) * ([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + (4 * [INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count])) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]) " + }, + { + "name": "metric_TMAM_..Machine_Clears(%)", + "expression": "100 * ([MACHINE_CLEARS.COUNT] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT])) * ([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + (4 * [INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count])) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" + }, + { + "name": "metric_TMAM_Backend_bound(%)", + "expression": "100 - (100 * ([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + 4 * ([INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count]) + [IDQ_UOPS_NOT_DELIVERED.CORE] + [UOPS_RETIRED.RETIRE_SLOTS]) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])) " + }, + { + "name": "metric_TMAM_..Memory_Bound(%)", + "expression": "100 * (1 - (([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + 4 * ([INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count]) + [IDQ_UOPS_NOT_DELIVERED.CORE] + [UOPS_RETIRED.RETIRE_SLOTS]) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))) * ([CYCLE_ACTIVITY.STALLS_MEM_ANY] + [EXE_ACTIVITY.BOUND_ON_STORES]) / ([EXE_ACTIVITY.EXE_BOUND_0_PORTS] + [EXE_ACTIVITY.1_PORTS_UTIL] + ([EXE_ACTIVITY.2_PORTS_UTIL] if ([instructions] / [cpu-cycles]) > 1.8 else 0) + [CYCLE_ACTIVITY.STALLS_MEM_ANY] + [EXE_ACTIVITY.BOUND_ON_STORES])" + }, + { + "name": "metric_TMAM_....L1_Bound(%)", + "expression": "100 * ([CYCLE_ACTIVITY.STALLS_MEM_ANY] - [CYCLE_ACTIVITY.STALLS_L1D_MISS]) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_......DTLB_Load(%)", + "expression": "100 * (7 * [DTLB_LOAD_MISSES.STLB_HIT] + [DTLB_LOAD_MISSES.WALK_ACTIVE]) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_......Store_Fwd_Blk(%)", + "expression": "100 * (13 * [LD_BLOCKS.STORE_FORWARD]) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_....L2_Bound(%)", + "expression": "100 * ([CYCLE_ACTIVITY.STALLS_L1D_MISS] - [CYCLE_ACTIVITY.STALLS_L2_MISS]) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_....L3_Bound(%)", + "expression": "100 * ([CYCLE_ACTIVITY.STALLS_L2_MISS] - [CYCLE_ACTIVITY.STALLS_L3_MISS]) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_......L3_Latency(%)", + "expression": "100 * (((min([OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_DATA_RD], [cpu-cycles]) - min([OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_L3_MISS_DEMAND_DATA_RD], [cpu-cycles])) / [cpu-cycles]) - ((min([OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD_GE_6], [cpu-cycles]) - min([OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD_GE_6] , [cpu-cycles])) / [cpu-cycles]))" + }, + { + "name": "metric_TMAM_......L3_Bandwidth(%)", + "expression": "100 * (min([OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD_GE_6], [cpu-cycles]) - min([OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD_GE_6], [cpu-cycles])) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_......SQ_Full(%)", + "expression": "100 * ([OFFCORE_REQUESTS_BUFFER.SQ_FULL] / [const_thread_count]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" + }, + { + "name": "metric_TMAM_....MEM_Bound(%)", + "expression": "100 * [CYCLE_ACTIVITY.STALLS_L3_MISS] / [cpu-cycles]" + }, + { + "name": "metric_TMAM_......MEM_Bandwidth(%)", + "expression": "100 * min([OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD_GE_6] , [cpu-cycles]) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_......MEM_Latency(%)", + "expression": "100 * (min([OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_L3_MISS_DEMAND_DATA_RD] , [cpu-cycles]) - min([OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD_GE_6] , [cpu-cycles]))/ [cpu-cycles]" + }, + { + "name": "metric_TMAM_....Stores_Bound(%)", + "expression": "100 * [EXE_ACTIVITY.BOUND_ON_STORES] / [cpu-cycles]" + }, + { + "name": "metric_TMAM_......DTLB_Store(%)", + "expression": "100 * (7 * [DTLB_STORE_MISSES.STLB_HIT] + [DTLB_STORE_MISSES.WALK_ACTIVE]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" + }, + { + "name": "metric_TMAM_..Core_Bound(%)", + "expression": "100 * (1 - (([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + (4 * ([INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count])) + [IDQ_UOPS_NOT_DELIVERED.CORE] + [UOPS_RETIRED.RETIRE_SLOTS]) / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])))) * (1 - (([CYCLE_ACTIVITY.STALLS_MEM_ANY] + [EXE_ACTIVITY.BOUND_ON_STORES]) / ([EXE_ACTIVITY.EXE_BOUND_0_PORTS] + [EXE_ACTIVITY.1_PORTS_UTIL] + ([EXE_ACTIVITY.2_PORTS_UTIL] if ([instructions] / [cpu-cycles]) > 1.8 else 0) + [CYCLE_ACTIVITY.STALLS_MEM_ANY] + [EXE_ACTIVITY.BOUND_ON_STORES])))" + }, + { + "name": "metric_TMAM_....Divider(%)", + "expression": "100 * [ARITH.DIVIDER_ACTIVE] / [cpu-cycles]" + }, + { + "name": "metric_TMAM_....Ports_Utilization(%)", + "expression": "100 * (([EXE_ACTIVITY.EXE_BOUND_0_PORTS] + [EXE_ACTIVITY.1_PORTS_UTIL] + ([EXE_ACTIVITY.2_PORTS_UTIL] if ([instructions] / [cpu-cycles]) > 1.8 else 0) + [CYCLE_ACTIVITY.STALLS_MEM_ANY] + [EXE_ACTIVITY.BOUND_ON_STORES]) - [CYCLE_ACTIVITY.STALLS_MEM_ANY] - [EXE_ACTIVITY.BOUND_ON_STORES]) / [cpu-cycles]" + }, + { + "name": "metric_TMAM_......0_Port_Utilized(%)", + "expression": "100 * (([UOPS_EXECUTED.CORE_CYCLES_NONE] / 2) if ([const_thread_count] > 1) else [EXE_ACTIVITY.EXE_BOUND_0_PORTS]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" + }, + { + "name": "metric_TMAM_......1_Port_Utilized(%)", + "expression": "100 * ((([UOPS_EXECUTED.CORE_CYCLES_GE_1] - [UOPS_EXECUTED.CORE_CYCLES_GE_2]) / 2) if ([const_thread_count] > 1) else [EXE_ACTIVITY.1_PORTS_UTIL]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" + }, + { + "name": "metric_TMAM_......2_Port_Utilized(%)", + "expression": "100 * ((([UOPS_EXECUTED.CORE_CYCLES_GE_2] - [UOPS_EXECUTED.CORE_CYCLES_GE_3]) / 2) if ([const_thread_count] > 1) else [EXE_ACTIVITY.2_PORTS_UTIL]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])" + }, + { + "name": "metric_TMAM_......3m_Ports_Utilized(%)", + "expression": "100 * [UOPS_EXECUTED.CORE_CYCLES_GE_3] / [CPU_CLK_UNHALTED.THREAD_ANY]" + }, + { + "name": "metric_TMAM_Retiring(%)", + "expression": "100 * [UOPS_RETIRED.RETIRE_SLOTS] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))" + }, + { + "name": "metric_TMAM_..Base(%)", + "expression": "100 * (([UOPS_RETIRED.RETIRE_SLOTS] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))) - (([UOPS_RETIRED.RETIRE_SLOTS] / [UOPS_ISSUED.ANY]) * [IDQ.MS_UOPS] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))))" + }, + { + "name": "metric_TMAM_..Microcode_Sequencer(%)", + "expression": "100 * (([UOPS_RETIRED.RETIRE_SLOTS] / [UOPS_ISSUED.ANY]) * [IDQ.MS_UOPS] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])))" + } +] \ No newline at end of file diff --git a/events/metric_spr.json b/events/metric_spr.json new file mode 100644 index 0000000..718872e --- /dev/null +++ b/events/metric_spr.json @@ -0,0 +1,311 @@ +[ + { + "name": "metric_CPU operating frequency (in GHz)", + "expression": "([cpu-cycles] / [ref-cycles]) * ([const_tsc_freq] / 1000000000)" + }, + { + "name": "metric_CPU utilization %", + "expression": "100 * [ref-cycles] / [const_TSC]" + }, + { + "name": "metric_CPU utilization% in kernel mode", + "expression": "100 * [ref-cycles:k] / [const_TSC]" + }, + { + "name": "metric_CPI", + "expression": "[cpu-cycles] / [instructions]" + }, + { + "name": "metric_kernel_CPI", + "expression": "[cpu-cycles:k] / [instructions:k]" + }, + { + "name": "metric_IPC", + "expression": "[instructions] / [cpu-cycles]" + }, + { + "name": "metric_giga_instructions_per_sec", + "expression": "[instructions] / 1000000000" + }, + { + "name": "metric_L1D MPI (includes data+rfo w/ prefetches)", + "tags": "transaction", + "expression": "[L1D.REPLACEMENT] / [instructions]" + }, + { + "name": "metric_L1D demand data read hits per instr", + "expression": "[MEM_LOAD_RETIRED.L1_HIT] / [instructions]" + }, + { + "name": "metric_L1-I code read misses (w/ prefetches) per instr", + "expression": "[L2_RQSTS.ALL_CODE_RD] / [instructions]" + }, + { + "name": "metric_L2 demand data read hits per instr", + "expression": "[MEM_LOAD_RETIRED.L2_HIT] / [instructions]" + }, + { + "name": "metric_L2 MPI (includes code+data+rfo w/ prefetches)", + "expression": "[L2_LINES_IN.ALL] / [instructions]" + }, + { + "name": "metric_L2 demand data read MPI", + "expression": "[MEM_LOAD_RETIRED.L2_MISS] / [instructions]" + }, + { + "name": "metric_L2 demand code MPI", + "expression": "[L2_RQSTS.CODE_RD_MISS] / [instructions]" + }, + { + "name": "metric_UPI Data transmit BW (MB/sec) (only data)", + "expression": "[UNC_UPI_TxL_FLITS.ALL_DATA] * (64 / 9) / 1000000" + }, + { + "name": "metric_package power (watts)", + "expression": "[power/energy-pkg/]" + }, + { + "name": "metric_DRAM power (watts)", + "expression": "[power/energy-ram/]" + }, + { + "name": "metric_core c6 residency %", + "expression": "100 * [cstate_core/c6-residency/] / [const_TSC]" + }, + { + "name": "metric_package c6 residency %", + "expression": "100 * [cstate_pkg/c6-residency/] * [const_core_count] / [const_TSC]" + }, + { + "name": "metric_core initiated local dram read bandwidth (MB/sec)", + "expression": "([OCR.READS_TO_CORE.LOCAL_DRAM] + [OCR.HWPF_L3.L3_MISS_LOCAL]) * 64 / 1000000" + }, + { + "name": "metric_core initiated remote dram read bandwidth (MB/sec)", + "expression": "([OCR.READS_TO_CORE.REMOTE_DRAM] + [OCR.HWPF_L3.REMOTE]) * 64 / 1000000" + }, + { + "name": "metric_memory bandwidth read (MB/sec)", + "expression": "[UNC_M_CAS_COUNT.RD] * 64 / 1000000" + }, + { + "name": "metric_memory bandwidth write (MB/sec)", + "expression": "[UNC_M_CAS_COUNT.WR] * 64 / 1000000" + }, + { + "name": "metric_memory bandwidth total (MB/sec)", + "expression": "([UNC_M_CAS_COUNT.RD] + [UNC_M_CAS_COUNT.WR]) * 64 / 1000000" + }, + { + "name": "metric_DCPMEM_memory_mode near memory cache read miss rate%", + "expression": "100 * ([UNC_M_TAGCHK.MISS_CLEAN] + [UNC_M_TAGCHK.MISS_DIRTY]) / ([UNC_M_TAGCHK.HIT] + [UNC_M_TAGCHK.MISS_CLEAN] + [UNC_M_TAGCHK.MISS_DIRTY])" + }, + { + "name": "metric_LLC code read MPI (demand+prefetch)", + "expression": "[UNC_CHA_TOR_INSERTS.IA_MISS_CRD] / [instructions]" + }, + { + "name": "metric_LLC data read MPI (demand+prefetch)", + "expression": "([UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF]) / [instructions]" + }, + { + "name": "metric_LLC total HITM (per instr) (excludes LLC prefetches)", + "expression": "[OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_HITM] / [instructions]" + }, + { + "name": "metric_LLC total HIT clean line forwards (per instr) (excludes LLC prefetches)", + "expression": "[OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_HIT_WITH_FWD] / [instructions]" + }, + { + "name": "metric_Average LLC demand data read miss latency (in ns)", + "expression": "1000000000 * ([UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD] / [UNC_CHA_TOR_INSERTS.IA_MISS_DRD]) / ([UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]))" + }, + { + "name": "metric_Average LLC demand data read miss latency for LOCAL requests (in ns)", + "expression": "(1000000000 * [UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL] / [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL]) / ([UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]))" + }, + { + "name": "metric_Average LLC demand data read miss latency for REMOTE requests (in ns)", + "expression": "(1000000000 * [UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE] / [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE]) / ([UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]))" + }, + { + "name": "metric_ITLB (2nd level) MPI", + "expression": "[ITLB_MISSES.WALK_COMPLETED] / [instructions]" + }, + { + "name": "metric_DTLB (2nd level) load MPI", + "expression": "[DTLB_LOAD_MISSES.WALK_COMPLETED] / [instructions]" + }, + { + "name": "metric_DTLB (2nd level) 2MB large page load MPI", + "expression": "[DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M] / [instructions]" + }, + { + "name": "metric_DTLB (2nd level) store MPI", + "expression": "[DTLB_STORE_MISSES.WALK_COMPLETED] / [instructions]" + }, + { + "name": "metric_NUMA %_Reads addressed to local DRAM", + "expression": "100 * ([UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL]) / ([UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE])" + }, + { + "name": "metric_NUMA %_Reads addressed to remote DRAM", + "expression": "100 * ([UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE]) / ([UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE] + [UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE])" + }, + { + "name": "metric_uncore frequency GHz", + "expression": "[UNC_CHA_CLOCKTICKS] / ([const_cha_count] * [const_socket_count]) / 1000000000" + }, + { + "name": "metric_IO_bandwidth_disk_or_network_writes (MB/sec)", + "expression": "[UNC_CHA_TOR_INSERTS.IO_PCIRDCUR] * 64 / 1000000" + }, + { + "name": "metric_IO_bandwidth_disk_or_network_reads (MB/sec)", + "expression": "([UNC_CHA_TOR_INSERTS.IO_ITOM] + [UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR]) * 64 / 1000000" + }, + { + "name": "metric_TMA_Frontend_Bound(%)", + "expression": "100 * ([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / ([slots]))" + }, + { + "name": "metric_TMA_..Fetch_Latency(%)", + "expression": "100 * (([topdown-fetch-lat] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / ([slots])))" + }, + { + "name": "metric_TMA_....ICache_Misses(%)", + "expression": "100 * ([ICACHE_DATA.STALLS] / [cpu-cycles])" + }, + { + "name": "metric_TMA_....ITLB_Misses(%)", + "expression": "100 * ([ICACHE_TAG.STALLS] / [cpu-cycles])" + }, + { + "name": "metric_TMA_....Branch_Resteers(%)", + "expression": "100 * ([INT_MISC.CLEAR_RESTEER_CYCLES] / [cpu-cycles] + ([INT_MISC.UNKNOWN_BRANCH_CYCLES] / [cpu-cycles]))" + }, + { + "name": "metric_TMA_......Mispredicts_Resteers(%)", + "expression": "100 * ((([topdown-br-mispredict] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) / (max(0, (1 - (([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [slots]) + ([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])))))))) * [INT_MISC.CLEAR_RESTEER_CYCLES] / [cpu-cycles])" + }, + { + "name": "metric_TMA_......Clears_Resteers(%)", + "expression": "100 * ((1 - (([topdown-br-mispredict] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) / (max(0, (1 - (([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [slots]) + ([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))))))))) * [INT_MISC.CLEAR_RESTEER_CYCLES] / [cpu-cycles])" + }, + { + "name": "metric_TMA_......Unknown_Branches(%)", + "expression": "100 * ([INT_MISC.UNKNOWN_BRANCH_CYCLES] / [cpu-cycles])" + }, + { + "name": "metric_TMA_..Fetch_Bandwidth(%)", + "expression": "100 * (max(0, (([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [slots]) - (([topdown-fetch-lat] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [slots])))))" + }, + { + "name": "metric_TMA_Bad_Speculation(%)", + "expression": "100 * (max((1 - (([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [slots]) + ([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))))), 0))" + }, + { + "name": "metric_TMA_..Branch_Mispredicts(%)", + "expression": "100 * ([topdown-br-mispredict] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])))" + }, + { + "name": "metric_TMA_..Machine_Clears(%)", + "expression": "100 * (max(0, ((max(0, (1 - (([topdown-fe-bound] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring])) - [INT_MISC.UOP_DROPPING] / [slots]) + ([topdown-be-bound] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring]))) + ([topdown-retiring] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring]))))))) - ([topdown-br-mispredict] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring]))))))" + }, + { + "name": "metric_TMA_Backend_Bound(%)", + "expression": "100 * ([topdown-be-bound] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring])))" + }, + { + "name": "metric_TMA_..Memory_Bound(%)", + "expression": "100 * ([topdown-mem-bound] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring])))" + }, + { + "name": "metric_TMA_....L1_Bound(%)", + "expression": "100 * (max(0, (([EXE_ACTIVITY.BOUND_ON_LOADS] - [MEMORY_ACTIVITY.STALLS_L1D_MISS]) / [cpu-cycles])))" + }, + { + "name": "metric_TMA_......DTLB_Load(%)", + "expression": "100 * (min((7) * [DTLB_LOAD_MISSES.STLB_HIT:c1] + [DTLB_LOAD_MISSES.WALK_ACTIVE], max([CYCLE_ACTIVITY.CYCLES_MEM_ANY] - [CYCLE_ACTIVITY.CYCLES_L1D_MISS], 0)) / ( [cpu-cycles]))" + }, + { + "name": "metric_TMA_......Split_Loads(%)", + "expression": "100 * (min(1, ((([L1D_PEND_MISS.PENDING] / ([MEM_LOAD_COMPLETED.L1_MISS_ANY])) * [LD_BLOCKS.NO_SR] / [cpu-cycles]))))" + }, + { + "name": "metric_TMA_....L2_Bound(%)", + "expression": "100 * (([MEMORY_ACTIVITY.STALLS_L1D_MISS] - [MEMORY_ACTIVITY.STALLS_L2_MISS]) / [cpu-cycles])" + }, + { + "name": "metric_TMA_....L3_Bound(%)", + "expression": "100 * (([MEMORY_ACTIVITY.STALLS_L2_MISS] - [MEMORY_ACTIVITY.STALLS_L3_MISS]) / [cpu-cycles])" + }, + { + "name": "metric_TMA_......MEM_Bandwidth(%)", + "expression": "100 * ((min(([cpu-cycles] - 0), ([OFFCORE_REQUESTS_OUTSTANDING.DATA_RD:c4] - 0))) / [cpu-cycles])" + }, + { + "name": "metric_TMA_......MEM_Latency(%)", + "expression": "100 * ( ( min( [cpu-cycles], [OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD] ) ) / ( [cpu-cycles] ) - ( ( min([cpu-cycles], [OFFCORE_REQUESTS_OUTSTANDING.DATA_RD:c4] ) ) / ( [cpu-cycles] ) ) )" + }, + { + "name": "metric_TMA_....Store_Bound(%)", + "expression": "100 * ([EXE_ACTIVITY.BOUND_ON_STORES] / [cpu-cycles])" + }, + { + "name": "metric_TMA_..Core_Bound(%)", + "expression": "100 * (max(0, (([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) - ([topdown-mem-bound] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring]))))))" + }, + { + "name": "metric_TMA_....Divider(%)", + "expression": "100 * ([ARITH.DIV_ACTIVE] / [cpu-cycles])" + }, + { + "name": "metric_TMA_....Ports_Utilization(%)", + "expression": "100 * ( ( [EXE_ACTIVITY.3_PORTS_UTIL:u0x80] + ( [RESOURCE_STALLS.SCOREBOARD] / ( [cpu-cycles] ) ) * ( [CYCLE_ACTIVITY.STALLS_TOTAL] - [EXE_ACTIVITY.BOUND_ON_LOADS] ) + ( [EXE_ACTIVITY.1_PORTS_UTIL] + ( [topdown-retiring] / ( [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound] ) ) * [EXE_ACTIVITY.2_PORTS_UTIL:u0xc] ) ) / ( [cpu-cycles] ) if ( [ARITH.DIV_ACTIVE] < ( [CYCLE_ACTIVITY.STALLS_TOTAL] - [EXE_ACTIVITY.BOUND_ON_LOADS] ) ) else ( [EXE_ACTIVITY.1_PORTS_UTIL] + ( [topdown-retiring] / ( [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound] ) ) * [EXE_ACTIVITY.2_PORTS_UTIL:u0xc] ) / ( [cpu-cycles] ) )" + }, + { + "name": "metric_TMA_......Ports_Utilized_0(%)", + "expression": "100 * ( [EXE_ACTIVITY.3_PORTS_UTIL:u0x80] / ( [cpu-cycles] ) + ( [RESOURCE_STALLS.SCOREBOARD] / ( [cpu-cycles] ) ) * ( [CYCLE_ACTIVITY.STALLS_TOTAL] - [EXE_ACTIVITY.BOUND_ON_LOADS] ) / ( [cpu-cycles] ) )" + }, + { + "name": "metric_TMA_......Ports_Utilized_1(%)", + "expression": "100 * ([EXE_ACTIVITY.1_PORTS_UTIL] / [cpu-cycles])" + }, + { + "name": "metric_TMA_......Ports_Utilized_2(%)", + "expression": "100 * ([EXE_ACTIVITY.2_PORTS_UTIL] / [cpu-cycles])" + }, + { + "name": "metric_TMA_......Ports_Utilized_3m(%)", + "expression": "100 * [UOPS_EXECUTED.CYCLES_GE_3] / [cpu-cycles]" + }, + { + "name": "metric_TMA_Retiring(%)", + "expression": "100 * ([topdown-retiring] / ([topdown-retiring] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-be-bound]))" + }, + { + "name": "metric_TMA_..Light_Operations(%)", + "expression": "100 * (max(0, (([topdown-retiring] / (([topdown-retiring] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-be-bound]))) - ([topdown-heavy-ops] / (([topdown-retiring] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-be-bound]))))))" + }, + { + "name": "metric_TMA_..Heavy_Operations(%)", + "expression": "100 * ([topdown-heavy-ops] / (([topdown-retiring] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-be-bound])))" + }, + { + "name": "metric_TMA_....Microcode_Sequencer(%)", + "expression": "100 * ([UOPS_RETIRED.MS] / [slots])" + }, + { + "name": "metric_TMA_Info_Thread_IPC", + "expression": "[instructions] / [cpu-cycles]" + }, + { + "name": "metric_TMA_Info_Core_ILP", + "expression": "[instructions] / [CPU_CLK_UNHALTED.DISTRIBUTED]" + }, + { + "name": "metric_TMA_Info_System_SMT_2T_Utilization", + "expression": "(1 - [CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE] / [CPU_CLK_UNHALTED.REF_DISTRIBUTED]) if [const_socket_count] > 1 else 0" + } +] \ No newline at end of file diff --git a/events/metric_spr_aws.json b/events/metric_spr_aws.json new file mode 100644 index 0000000..331cc26 --- /dev/null +++ b/events/metric_spr_aws.json @@ -0,0 +1,247 @@ +[ + { + "name": "metric_CPU operating frequency (in GHz)", + "expression": "([cpu-cycles] / [ref-cycles]) * ([const_tsc_freq] / 1000000000)" + }, + { + "name": "metric_CPU utilization %", + "expression": "100 * [ref-cycles] / [const_TSC]" + }, + { + "name": "metric_CPU utilization% in kernel mode", + "expression": "100 * [ref-cycles:k] / [const_TSC]" + }, + { + "name": "metric_CPI", + "expression": "[cpu-cycles] / [instructions]" + }, + { + "name": "metric_kernel_CPI", + "expression": "[cpu-cycles:k] / [instructions:k]" + }, + { + "name": "metric_IPC", + "expression": "[instructions] / [cpu-cycles]" + }, + { + "name": "metric_giga_instructions_per_sec", + "expression": "[instructions] / 1000000000" + }, + { + "name": "metric_L1D MPI (includes data+rfo w/ prefetches)", + "tags": "transaction", + "expression": "[L1D.REPLACEMENT] / [instructions]" + }, + { + "name": "metric_L1D demand data read hits per instr", + "expression": "[MEM_LOAD_RETIRED.L1_HIT] / [instructions]" + }, + { + "name": "metric_L1-I code read misses (w/ prefetches) per instr", + "expression": "[L2_RQSTS.ALL_CODE_RD] / [instructions]" + }, + { + "name": "metric_L2 demand data read hits per instr", + "expression": "[MEM_LOAD_RETIRED.L2_HIT] / [instructions]" + }, + { + "name": "metric_L2 MPI (includes code+data+rfo w/ prefetches)", + "expression": "[L2_LINES_IN.ALL] / [instructions]" + }, + { + "name": "metric_L2 demand data read MPI", + "expression": "[MEM_LOAD_RETIRED.L2_MISS] / [instructions]" + }, + { + "name": "metric_L2 demand code MPI", + "expression": "[L2_RQSTS.CODE_RD_MISS] / [instructions]" + }, + { + "name": "metric_package power (watts)", + "expression": "[power/energy-pkg/]" + }, + { + "name": "metric_DRAM power (watts)", + "expression": "[power/energy-ram/]" + }, + { + "name": "metric_core c6 residency %", + "expression": "100 * [cstate_core/c6-residency/] / [const_TSC]" + }, + { + "name": "metric_package c6 residency %", + "expression": "100 * [cstate_pkg/c6-residency/] * [const_core_count] / [const_TSC]" + }, + { + "name": "metric_core initiated local dram read bandwidth (MB/sec)", + "expression": "([OCR.READS_TO_CORE.LOCAL_DRAM] + [OCR.HWPF_L3.L3_MISS_LOCAL]) * 64 / 1000000" + }, + { + "name": "metric_core initiated remote dram read bandwidth (MB/sec)", + "expression": "([OCR.READS_TO_CORE.REMOTE_DRAM] + [OCR.HWPF_L3.REMOTE]) * 64 / 1000000" + }, + { + "name": "metric_LLC total HITM (per instr) (excludes LLC prefetches)", + "expression": "[OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_HITM] / [instructions]" + }, + { + "name": "metric_LLC total HIT clean line forwards (per instr) (excludes LLC prefetches)", + "expression": "[OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_HIT_WITH_FWD] / [instructions]" + }, + { + "name": "metric_ITLB (2nd level) MPI", + "expression": "[ITLB_MISSES.WALK_COMPLETED] / [instructions]" + }, + { + "name": "metric_DTLB (2nd level) load MPI", + "expression": "[DTLB_LOAD_MISSES.WALK_COMPLETED] / [instructions]" + }, + { + "name": "metric_DTLB (2nd level) 2MB large page load MPI", + "expression": "[DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M] / [instructions]" + }, + { + "name": "metric_DTLB (2nd level) store MPI", + "expression": "[DTLB_STORE_MISSES.WALK_COMPLETED] / [instructions]" + }, + { + "name": "metric_TMA_Frontend_Bound(%)", + "expression": "100 * ([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / ([topdown.slots]))" + }, + { + "name": "metric_TMA_..Fetch_Latency(%)", + "expression": "100 * (([topdown-fetch-lat] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / ([topdown.slots])))" + }, + { + "name": "metric_TMA_....ICache_Misses(%)", + "expression": "100 * ([ICACHE_DATA.STALLS] / [cpu-cycles])" + }, + { + "name": "metric_TMA_....ITLB_Misses(%)", + "expression": "100 * ([ICACHE_TAG.STALLS] / [cpu-cycles])" + }, + { + "name": "metric_TMA_....Branch_Resteers(%)", + "expression": "100 * ([INT_MISC.CLEAR_RESTEER_CYCLES] / [cpu-cycles] + ([INT_MISC.UNKNOWN_BRANCH_CYCLES] / [cpu-cycles]))" + }, + { + "name": "metric_TMA_......Mispredicts_Resteers(%)", + "expression": "100 * ((([topdown-br-mispredict] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) / (max(0, (1 - (([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [topdown.slots]) + ([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])))))))) * [INT_MISC.CLEAR_RESTEER_CYCLES] / [cpu-cycles])" + }, + { + "name": "metric_TMA_......Clears_Resteers(%)", + "expression": "100 * ((1 - (([topdown-br-mispredict] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) / (max(0, (1 - (([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [topdown.slots]) + ([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))))))))) * [INT_MISC.CLEAR_RESTEER_CYCLES] / [cpu-cycles])" + }, + { + "name": "metric_TMA_......Unknown_Branches(%)", + "expression": "100 * ([INT_MISC.UNKNOWN_BRANCH_CYCLES] / [cpu-cycles])" + }, + { + "name": "metric_TMA_..Fetch_Bandwidth(%)", + "expression": "100 * (max(0, (([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [topdown.slots]) - (([topdown-fetch-lat] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [topdown.slots])))))" + }, + { + "name": "metric_TMA_Bad_Speculation(%)", + "expression": "100 * (max((1 - (([topdown-fe-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])) - [INT_MISC.UOP_DROPPING] / [topdown.slots]) + ([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) + ([topdown-retiring] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))))), 0))" + }, + { + "name": "metric_TMA_..Branch_Mispredicts(%)", + "expression": "100 * ([topdown-br-mispredict] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound])))" + }, + { + "name": "metric_TMA_..Machine_Clears(%)", + "expression": "100 * (max(0, ((max(0, (1 - (([topdown-fe-bound] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring])) - [INT_MISC.UOP_DROPPING] / [topdown.slots]) + ([topdown-be-bound] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring]))) + ([topdown-retiring] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring]))))))) - ([topdown-br-mispredict] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring]))))))" + }, + { + "name": "metric_TMA_Backend_Bound(%)", + "expression": "100 * ([topdown-be-bound] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring])))" + }, + { + "name": "metric_TMA_..Memory_Bound(%)", + "expression": "100 * ([topdown-mem-bound] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring])))" + }, + { + "name": "metric_TMA_....L1_Bound(%)", + "expression": "100 * (max(0, (([EXE_ACTIVITY.BOUND_ON_LOADS] - [MEMORY_ACTIVITY.STALLS_L1D_MISS]) / [cpu-cycles])))" + }, + { + "name": "metric_TMA_......DTLB_Load(%)", + "expression": "100 * (min((7) * [DTLB_LOAD_MISSES.STLB_HIT:c1] + [DTLB_LOAD_MISSES.WALK_ACTIVE], max([CYCLE_ACTIVITY.CYCLES_MEM_ANY] - [CYCLE_ACTIVITY.CYCLES_L1D_MISS], 0)) / ( [cpu-cycles]))" + }, + { + "name": "metric_TMA_......Split_Loads(%)", + "expression": "100 * (min(1, ((([L1D_PEND_MISS.PENDING] / ([MEM_LOAD_COMPLETED.L1_MISS_ANY])) * [LD_BLOCKS.NO_SR] / [cpu-cycles]))))" + }, + { + "name": "metric_TMA_....L2_Bound(%)", + "expression": "100 * (([MEMORY_ACTIVITY.STALLS_L1D_MISS] - [MEMORY_ACTIVITY.STALLS_L2_MISS]) / [cpu-cycles])" + }, + { + "name": "metric_TMA_....L3_Bound(%)", + "expression": "100 * (([MEMORY_ACTIVITY.STALLS_L2_MISS] - [MEMORY_ACTIVITY.STALLS_L3_MISS]) / [cpu-cycles])" + }, + { + "name": "metric_TMA_......MEM_Bandwidth(%)", + "expression": "100 * ((min(([cpu-cycles] - 0), ([OFFCORE_REQUESTS_OUTSTANDING.DATA_RD:c4] - 0))) / [cpu-cycles])" + }, + { + "name": "metric_TMA_......MEM_Latency(%)", + "expression": "100 * ( ( min( [cpu-cycles], [OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD] ) ) / ( [cpu-cycles] ) - ( ( min([cpu-cycles], [OFFCORE_REQUESTS_OUTSTANDING.DATA_RD:c4] ) ) / ( [cpu-cycles] ) ) )" + }, + { + "name": "metric_TMA_....Store_Bound(%)", + "expression": "100 * ([EXE_ACTIVITY.BOUND_ON_STORES] / [cpu-cycles])" + }, + { + "name": "metric_TMA_..Core_Bound(%)", + "expression": "100 * (max(0, (([topdown-be-bound] / (([topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound]))) - ([topdown-mem-bound] / (([topdown-be-bound] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring]))))))" + }, + { + "name": "metric_TMA_....Divider(%)", + "expression": "100 * ([ARITH.DIV_ACTIVE] / [cpu-cycles])" + }, + { + "name": "metric_TMA_....Ports_Utilization(%)", + "expression": "100 * ( ( [EXE_ACTIVITY.3_PORTS_UTIL:u0x80] + ( [RESOURCE_STALLS.SCOREBOARD] / ( [cpu-cycles] ) ) * ( [CYCLE_ACTIVITY.STALLS_TOTAL] - [EXE_ACTIVITY.BOUND_ON_LOADS] ) + ( [EXE_ACTIVITY.1_PORTS_UTIL] + ( [topdown-retiring] / ( [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound] ) ) * [EXE_ACTIVITY.2_PORTS_UTIL:u0xc] ) ) / ( [cpu-cycles] ) if ( [ARITH.DIV_ACTIVE] < ( [CYCLE_ACTIVITY.STALLS_TOTAL] - [EXE_ACTIVITY.BOUND_ON_LOADS] ) ) else ( [EXE_ACTIVITY.1_PORTS_UTIL] + ( [topdown-retiring] / ( [topdown-fe-bound] + [topdown-bad-spec] + [topdown-retiring] + [topdown-be-bound] ) ) * [EXE_ACTIVITY.2_PORTS_UTIL:u0xc] ) / ( [cpu-cycles] ) )" + }, + { + "name": "metric_TMA_......Ports_Utilized_0(%)", + "expression": "100 * ( [EXE_ACTIVITY.3_PORTS_UTIL:u0x80] / ( [cpu-cycles] ) + ( [RESOURCE_STALLS.SCOREBOARD] / ( [cpu-cycles] ) ) * ( [CYCLE_ACTIVITY.STALLS_TOTAL] - [EXE_ACTIVITY.BOUND_ON_LOADS] ) / ( [cpu-cycles] ) )" + }, + { + "name": "metric_TMA_......Ports_Utilized_1(%)", + "expression": "100 * ([EXE_ACTIVITY.1_PORTS_UTIL] / [cpu-cycles])" + }, + { + "name": "metric_TMA_......Ports_Utilized_2(%)", + "expression": "100 * ([EXE_ACTIVITY.2_PORTS_UTIL] / [cpu-cycles])" + }, + { + "name": "metric_TMA_......Ports_Utilized_3m(%)", + "expression": "100 * [UOPS_EXECUTED.CYCLES_GE_3] / [cpu-cycles]" + }, + { + "name": "metric_TMA_Retiring(%)", + "expression": "100 * ([topdown-retiring] / ([topdown-retiring] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-be-bound]))" + }, + { + "name": "metric_TMA_..Light_Operations(%)", + "expression": "100 * (max(0, (([topdown-retiring] / (([topdown-retiring] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-be-bound]))) - ([topdown-heavy-ops] / (([topdown-retiring] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-be-bound]))))))" + }, + { + "name": "metric_TMA_..Heavy_Operations(%)", + "expression": "100 * ([topdown-heavy-ops] / (([topdown-retiring] + [topdown-fe-bound] + [topdown-bad-spec] + [topdown-be-bound])))" + }, + { + "name": "metric_TMA_Info_Thread_IPC", + "expression": "[instructions] / [cpu-cycles]" + }, + { + "name": "metric_TMA_Info_Core_ILP", + "expression": "[instructions] / [CPU_CLK_UNHALTED.DISTRIBUTED]" + }, + { + "name": "metric_TMA_Info_System_SMT_2T_Utilization", + "expression": "(1 - [CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE] / [CPU_CLK_UNHALTED.REF_DISTRIBUTED]) if [const_socket_count] > 1 else 0" + } +] \ No newline at end of file diff --git a/events/skx.txt b/events/skx.txt index b561a0a..32806c2 100644 --- a/events/skx.txt +++ b/events/skx.txt @@ -1,5 +1,5 @@ ########################################################################################################### -# Copyright (C) 2021 Intel Corporation +# Copyright (C) 2021-2023 Intel Corporation # SPDX-License-Identifier: BSD-3-Clause ########################################################################################################### diff --git a/events/skx_aws.txt b/events/skx_aws.txt index 36bd767..a3c5d4d 100644 --- a/events/skx_aws.txt +++ b/events/skx_aws.txt @@ -1,3 +1,8 @@ +########################################################################################################### +# Copyright (C) 2021-2023 Intel Corporation +# SPDX-License-Identifier: BSD-3-Clause +########################################################################################################### + # Skylake event list for AWS instances cpu/event=0x51,umask=0x01,period=2000003,name='L1D.REPLACEMENT'/, diff --git a/events/skx_oci.txt b/events/skx_oci.txt index fcc5db3..79aaee1 100644 --- a/events/skx_oci.txt +++ b/events/skx_oci.txt @@ -1,3 +1,8 @@ +########################################################################################################### +# Copyright (C) 2021-2023 Intel Corporation +# SPDX-License-Identifier: BSD-3-Clause +########################################################################################################### + # Skylake event list for OCI instances cpu/event=0x51,umask=0x01,period=2000003,name='L1D.REPLACEMENT'/, diff --git a/events/spr.txt b/events/spr.txt new file mode 100644 index 0000000..c0d02a6 --- /dev/null +++ b/events/spr.txt @@ -0,0 +1,149 @@ +########################################################################################################### +# Copyright (C) 2021-2023 Intel Corporation +# SPDX-License-Identifier: BSD-3-Clause +########################################################################################################### + +# SapphireRapids event list (default) + +cpu/event=0x51,umask=0x01,period=100003,name='L1D.REPLACEMENT'/, +cpu/event=0x24,umask=0xe4,period=200003,name='L2_RQSTS.ALL_CODE_RD'/, +cpu/event=0xd1,umask=0x01,period=1000003,name='MEM_LOAD_RETIRED.L1_HIT'/, +cpu/event=0xa3,umask=0x04,cmask=0x04,period=1000003,name='CYCLE_ACTIVITY.STALLS_TOTAL'/, +cpu-cycles, +ref-cycles, +instructions; + +cpu/event=0x80,umask=0x04,period=500009,name='ICACHE_DATA.STALLS'/, +cpu/event=0x83,umask=0x04,period=200003,name='ICACHE_TAG.STALLS'/, +cpu/event=0xa3,umask=0x08,cmask=0x08,period=1000003,name='CYCLE_ACTIVITY.CYCLES_L1D_MISS'/, +cpu/event=0xa3,umask=0x10,cmask=0x10,period=1000003,name='CYCLE_ACTIVITY.CYCLES_MEM_ANY'/, +cpu-cycles; + + +cpu/event=0x25,umask=0x1f,period=100003,name='L2_LINES_IN.ALL'/, +cpu/event=0xd1,umask=0x10,period=100021,name='MEM_LOAD_RETIRED.L2_MISS'/, +cpu/event=0x24,umask=0x24,period=200003,name='L2_RQSTS.CODE_RD_MISS'/, +cpu/event=0x11,umask=0x0e,period=100003,name='ITLB_MISSES.WALK_COMPLETED'/, +cpu-cycles, +ref-cycles, +instructions; + +cpu/event=0x12,umask=0x0e,period=100003,name='DTLB_LOAD_MISSES.WALK_COMPLETED'/, +cpu/event=0x12,umask=0x04,period=100003,name='DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M'/, +cpu/event=0x13,umask=0x0e,period=100003,name='DTLB_STORE_MISSES.WALK_COMPLETED'/, +cpu/event=0xd1,umask=0x02,period=200003,name='MEM_LOAD_RETIRED.L2_HIT'/, +cpu-cycles:k, +ref-cycles:k, +instructions:k; + +#C6 +cstate_core/c6-residency/; +cstate_pkg/c6-residency/; + +cpu/event=0x20,umask=0x08,cmask=0x01,period=1000003,name='OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD'/, +cpu/event=0x20,umask=0x08,cmask=0x04,period=1000003,name='OFFCORE_REQUESTS_OUTSTANDING.DATA_RD:c4'/, +cpu-cycles, +ref-cycles, +instructions; + +#TMA related +slots, +topdown-bad-spec, +topdown-be-bound, +topdown-fe-bound, +topdown-retiring, +topdown-fetch-lat, +topdown-mem-bound, +topdown-br-mispredict, +topdown-heavy-ops; + +cpu/event=0xad,umask=0x10,period=1000003,name='INT_MISC.UOP_DROPPING'/, +cpu/event=0xad,umask=0x40,frontend=0x7,period=1000003,name='INT_MISC.UNKNOWN_BRANCH_CYCLES'/, +cpu/event=0xa6,umask=0x21,cmask=0x05,period=2000003,name='EXE_ACTIVITY.BOUND_ON_LOADS'/, +cpu-cycles; + +cpu/event=0x47,umask=0x03,cmask=0x03,period=1000003,name='MEMORY_ACTIVITY.STALLS_L1D_MISS'/, +cpu/event=0x12,umask=0x20,cmask=0x01,period=100003,name='DTLB_LOAD_MISSES.STLB_HIT:c1'/, +cpu/event=0x12,umask=0x10,cmask=0x01,period=100003,name='DTLB_LOAD_MISSES.WALK_ACTIVE'/, +cpu/event=0x47,umask=0x05,cmask=0x05,period=1000003,name='MEMORY_ACTIVITY.STALLS_L2_MISS'/, +cpu-cycles, +instructions; + +cpu/event=0x47,umask=0x09,cmask=0x09,period=1000003,name='MEMORY_ACTIVITY.STALLS_L3_MISS'/, +cpu/event=0xa6,umask=0x40,cmask=0x02,period=1000003,name='EXE_ACTIVITY.BOUND_ON_STORES'/, +cpu/event=0xa6,umask=0x02,period=2000003,name='EXE_ACTIVITY.1_PORTS_UTIL'/, +cpu/event=0xa6,umask=0x04,period=2000003,name='EXE_ACTIVITY.2_PORTS_UTIL'/, +cpu-cycles, +instructions; + +cpu/event=0x43,umask=0xfd,period=2000003,name='MEM_LOAD_COMPLETED.L1_MISS_ANY'/, +cpu/event=0xa2,umask=0x02,period=2000003,name='RESOURCE_STALLS.SCOREBOARD'/, +cpu/event=0xa6,umask=0x80,period=2000003,name='EXE_ACTIVITY.3_PORTS_UTIL:u0x80'/, +cpu/event=0xa6,umask=0xc,period=2000003,name='EXE_ACTIVITY.2_PORTS_UTIL:u0xc'/, +cpu-cycles, +instructions; + +cpu/event=0xad,umask=0x80,period=500009,name='INT_MISC.CLEAR_RESTEER_CYCLES'/, +cpu/event=0xb1,umask=0x01,cmask=0x03,period=2000003,name='UOPS_EXECUTED.CYCLES_GE_3'/, +cpu/event=0x48,umask=0x01,period=1000003,name='L1D_PEND_MISS.PENDING'/, +cpu/event=0x03,umask=0x88,period=100003,name='LD_BLOCKS.NO_SR'/, +cpu-cycles; + +cpu/event=0xc2,umask=0x04,frontend=0x8,period=2000003,name='UOPS_RETIRED.MS'/, +cpu/event=0xec,umask=0x02,period=2000003,name='CPU_CLK_UNHALTED.DISTRIBUTED'/, +cpu-cycles; + +cpu/event=0x3c,umask=0x02,period=25003,name='CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE'/, +cpu/event=0x3c,umask=0x08,period=2000003,name='CPU_CLK_UNHALTED.REF_DISTRIBUTED'/, +cpu/event=0xb0,umask=0x09,cmask=0x01,period=1000003,name='ARITH.DIV_ACTIVE'/; + +#offcore response +cpu/event=0x2a,umask=0x01,offcore_rsp=0x104004477,name='OCR.READS_TO_CORE.LOCAL_DRAM'/, +cpu/event=0x2a,umask=0x01,offcore_rsp=0x730004477,name='OCR.READS_TO_CORE.REMOTE_DRAM'/; + +cpu/event=0x2a,umask=0x01,offcore_rsp=0x1030004477,name='OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_HITM'/, +cpu/event=0x2a,umask=0x01,offcore_rsp=0x830004477,name='OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_HIT_WITH_FWD'/; + +cpu/event=0x2a,umask=0x01,offcore_rsp=0x84002380,name='OCR.HWPF_L3.L3_MISS_LOCAL'/, +cpu/event=0x2a,umask=0x01,offcore_rsp=0x90002380,name='OCR.HWPF_L3.REMOTE'/; + +#power related +power/energy-pkg/, +power/energy-ram/; + +#UPI related +upi/event=0x02,umask=0x0f,name='UNC_UPI_TxL_FLITS.ALL_DATA'/, +upi/event=0x02,umask=0x97,name='UNC_UPI_TxL_FLITS.NON_DATA'/, +upi/event=0x1,umask=0x0,name='UNC_UPI_CLOCKTICKS'/; + +cha/event=0x35,umask=0xc80ffe01,name='UNC_CHA_TOR_INSERTS.IA_MISS_CRD'/; + +cha/event=0x35,umask=0xc8177e01,name='UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE'/, +cha/event=0x36,umask=0xc8177e01,name='UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE'/; + +cha/event=0x35,umask=0xC816FE01,name='UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL'/, +cha/event=0x36,umask=0xc816fe01,name='UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL'/; + +cha/event=0x35,umask=0xC896FE01,name='UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL'/, +cha/event=0x35,umask=0xC8977E01,name='UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE'/; + +cha/event=0x35,umask=0xccd7fe01,name='UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA'/, +cha/event=0x35,umask=0xc817fe01,name='UNC_CHA_TOR_INSERTS.IA_MISS_DRD'/, +cha/event=0x35,umask=0xc897fe01,name='UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF'/, +cha/event=0x36,umask=0xC817fe01,name='UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD'/; + + +#IO Bandwidth +cha/event=0x35,umask=0xc8f3ff04,name='UNC_CHA_TOR_INSERTS.IO_PCIRDCUR'/, +cha/event=0x35,umask=0xCC43FF04,name='UNC_CHA_TOR_INSERTS.IO_ITOM'/, +cha/event=0x35,umask=0xCD43FF04,name='UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR'/, +cha/event=0x01,umask=0x00,name='UNC_CHA_CLOCKTICKS'/; + +#PMEM +imc/event=0xd3,umask=0x01,name='UNC_M_TAGCHK.HIT'/, +imc/event=0xd3,umask=0x02,name='UNC_M_TAGCHK.MISS_CLEAN'/, +imc/event=0xd3,umask=0x04,name='UNC_M_TAGCHK.MISS_DIRTY'/; + +#memory read/writes +imc/event=0x05,umask=0xcf,name='UNC_M_CAS_COUNT.RD'/, +imc/event=0x05,umask=0xf0,name='UNC_M_CAS_COUNT.WR'/; \ No newline at end of file diff --git a/events/spr_aws.txt b/events/spr_aws.txt new file mode 100644 index 0000000..83f48a6 --- /dev/null +++ b/events/spr_aws.txt @@ -0,0 +1,94 @@ +########################################################################################################### +# Copyright (C) 2021-2023 Intel Corporation +# SPDX-License-Identifier: BSD-3-Clause +########################################################################################################### + +# SapphireRapids event list for AWS instances (default) + +cpu/event=0x51,umask=0x01,period=100003,name='L1D.REPLACEMENT'/, +cpu/event=0x24,umask=0xe4,period=200003,name='L2_RQSTS.ALL_CODE_RD'/, +cpu/event=0xd1,umask=0x01,period=1000003,name='MEM_LOAD_RETIRED.L1_HIT'/, +cpu/event=0xa3,umask=0x04,cmask=0x04,period=1000003,name='CYCLE_ACTIVITY.STALLS_TOTAL'/, +cpu-cycles, +ref-cycles, +instructions; + +cpu/event=0x80,umask=0x04,period=500009,name='ICACHE_DATA.STALLS'/, +cpu/event=0x83,umask=0x04,period=200003,name='ICACHE_TAG.STALLS'/, +cpu/event=0xa3,umask=0x08,cmask=0x08,period=1000003,name='CYCLE_ACTIVITY.CYCLES_L1D_MISS'/, +cpu/event=0xa3,umask=0x10,cmask=0x10,period=1000003,name='CYCLE_ACTIVITY.CYCLES_MEM_ANY'/, +cpu-cycles; + + +cpu/event=0x25,umask=0x1f,period=100003,name='L2_LINES_IN.ALL'/, +cpu/event=0xd1,umask=0x10,period=100021,name='MEM_LOAD_RETIRED.L2_MISS'/, +cpu/event=0x24,umask=0x24,period=200003,name='L2_RQSTS.CODE_RD_MISS'/, +cpu/event=0x11,umask=0x0e,period=100003,name='ITLB_MISSES.WALK_COMPLETED'/, +cpu-cycles, +ref-cycles, +instructions; + +cpu/event=0x12,umask=0x0e,period=100003,name='DTLB_LOAD_MISSES.WALK_COMPLETED'/, +cpu/event=0x12,umask=0x04,period=100003,name='DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M'/, +cpu/event=0x13,umask=0x0e,period=100003,name='DTLB_STORE_MISSES.WALK_COMPLETED'/, +cpu/event=0xd1,umask=0x02,period=200003,name='MEM_LOAD_RETIRED.L2_HIT'/, +cpu-cycles:k, +ref-cycles:k, +instructions:k; + +cpu/event=0x20,umask=0x08,cmask=0x01,period=1000003,name='OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD'/, +cpu/event=0x20,umask=0x08,cmask=0x04,period=1000003,name='OFFCORE_REQUESTS_OUTSTANDING.DATA_RD:c4'/, +cpu-cycles, +ref-cycles, +instructions; + +#TMA related +cycles, +slots, +topdown-bad-spec, +topdown-be-bound, +topdown-fe-bound, +topdown-retiring, +topdown-fetch-lat, +topdown-mem-bound, +topdown-br-mispredict, +topdown-heavy-ops; + +cpu/event=0xad,umask=0x10,period=1000003,name='INT_MISC.UOP_DROPPING'/, +cpu/event=0xad,umask=0x40,frontend=0x7,period=1000003,name='INT_MISC.UNKNOWN_BRANCH_CYCLES'/, +cpu/event=0xa6,umask=0x21,cmask=0x05,period=2000003,name='EXE_ACTIVITY.BOUND_ON_LOADS'/, +cpu-cycles; + +cpu/event=0x47,umask=0x03,cmask=0x03,period=1000003,name='MEMORY_ACTIVITY.STALLS_L1D_MISS'/, +cpu/event=0x12,umask=0x20,cmask=0x01,period=100003,name='DTLB_LOAD_MISSES.STLB_HIT:c1'/, +cpu/event=0x12,umask=0x10,cmask=0x01,period=100003,name='DTLB_LOAD_MISSES.WALK_ACTIVE'/, +cpu/event=0x47,umask=0x05,cmask=0x05,period=1000003,name='MEMORY_ACTIVITY.STALLS_L2_MISS'/, +cpu-cycles, +instructions; + +cpu/event=0x47,umask=0x09,cmask=0x09,period=1000003,name='MEMORY_ACTIVITY.STALLS_L3_MISS'/, +cpu/event=0xa6,umask=0x40,cmask=0x02,period=1000003,name='EXE_ACTIVITY.BOUND_ON_STORES'/, +cpu/event=0xa6,umask=0x02,period=2000003,name='EXE_ACTIVITY.1_PORTS_UTIL'/, +cpu/event=0xa6,umask=0x04,period=2000003,name='EXE_ACTIVITY.2_PORTS_UTIL'/, +cpu-cycles, +instructions; + +cpu/event=0x43,umask=0xfd,period=2000003,name='MEM_LOAD_COMPLETED.L1_MISS_ANY'/, +cpu/event=0xa2,umask=0x02,period=2000003,name='RESOURCE_STALLS.SCOREBOARD'/, +cpu/event=0xa6,umask=0x80,period=2000003,name='EXE_ACTIVITY.3_PORTS_UTIL:u0x80'/, +cpu/event=0xa6,umask=0xc,period=2000003,name='EXE_ACTIVITY.2_PORTS_UTIL:u0xc'/, +cpu-cycles, +instructions; + +cpu/event=0xad,umask=0x80,period=500009,name='INT_MISC.CLEAR_RESTEER_CYCLES'/, +cpu/event=0xb1,umask=0x01,cmask=0x03,period=2000003,name='UOPS_EXECUTED.CYCLES_GE_3'/, +cpu/event=0x48,umask=0x01,period=1000003,name='L1D_PEND_MISS.PENDING'/, +cpu/event=0x03,umask=0x88,period=100003,name='LD_BLOCKS.NO_SR'/, +cpu-cycles; + +cpu/event=0xec,umask=0x02,period=2000003,name='CPU_CLK_UNHALTED.DISTRIBUTED'/, +cpu-cycles; + +cpu/event=0x3c,umask=0x02,period=25003,name='CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE'/, +cpu/event=0x3c,umask=0x08,period=2000003,name='CPU_CLK_UNHALTED.REF_DISTRIBUTED'/, +cpu/event=0xb0,umask=0x09,cmask=0x01,period=1000003,name='ARITH.DIV_ACTIVE'/; diff --git a/non_container_build.sh b/non_container_build.sh deleted file mode 100755 index 4c2decb..0000000 --- a/non_container_build.sh +++ /dev/null @@ -1,18 +0,0 @@ -#!/bin/bash - -### non container build script -### Assumes the following are installed - #python3.6 or above - #golang1.13 or above -rm -rf build -rm -rf dist -pip3 install -r requirements.txt -pip3 install pyinstaller==4.5.1 -pip3 install flake8 -pip3 install black -pip3 install bandit -go get github.com/markbates/pkger/cmd/pkger -make dist -f Makefile_non_container -rm -rf __pycache* -rm -f *.spec - diff --git a/perf-collect.py b/perf-collect.py index 432812f..a8a456f 100644 --- a/perf-collect.py +++ b/perf-collect.py @@ -1,7 +1,7 @@ #!/usr/bin/env python3 ########################################################################################################### -# Copyright (C) 2021 Intel Corporation +# Copyright (C) 2021-2023 Intel Corporation # SPDX-License-Identifier: BSD-3-Clause ########################################################################################################### @@ -100,11 +100,11 @@ def write_metadata( modified.write("### PERF DATA ###" + ",\n") if time_stamp: zone = subprocess.check_output( # nosec - ["date"], universal_newlines=True # nosec + ["date", "+%Z"], universal_newlines=True # nosec ).split() # nosec epoch = str(perf_helpers.get_epoch(time_stamp)) modified.write( - time_stamp.rstrip() + " " + zone[4] + " EPOCH " + epoch + "\n" + time_stamp.rstrip() + " " + zone[0] + " EPOCH " + epoch + "\n" ) modified.write(data) @@ -134,7 +134,6 @@ def is_safe_file(fname, substr): if __name__ == "__main__": - script_path = os.path.dirname(os.path.realpath(__file__)) # fix the pyinstaller path if "_MEI" in script_path: @@ -218,7 +217,7 @@ def is_safe_file(fname, substr): "--cloud", type=str, default=None, - help="Name of the Cloud Service Provider(AWS), if collecting on cloud instances", + help="Name of the Cloud Service Provider(AWS), if collecting on cloud instances. Currently supporting AWS and OCI", ) parser.add_argument( "-ct", @@ -227,7 +226,6 @@ def is_safe_file(fname, substr): default="VM", help="Instance type: Options include - VM,BM", ) - args = parser.parse_args() if args.version: @@ -237,9 +235,7 @@ def is_safe_file(fname, substr): interval = int(args.interval * 1000) if args.app and args.timeout: - raise SystemExit( - "Please provide either time duration or application parameter but" - ) + raise SystemExit("Please provide time duration or application parameter") if args.cid and args.pid: raise SystemExit("Cannot combine cgroup with pid in same collection") @@ -289,9 +285,13 @@ def is_safe_file(fname, substr): eventfile = "icx_aws.txt" elif is_oci_vm: eventfile = "icx_oci.txt" + elif arch == "sapphirerapids": + eventfile = "spr.txt" + if is_aws_vm: + eventfile = "spr_aws.txt" else: raise SystemExit( - "Unsupported architecture (currently supports Broadwell, Skylake, CascadeLake and Icelake Intel Xeon processors)" + "Unsupported architecture (currently supports IA -> Broadwell, Skylake, CascadeLake Icelake and SapphireRapids)" ) # Convert path of event file to relative path if being packaged by pyInstaller into a binary @@ -352,7 +352,7 @@ def is_safe_file(fname, substr): print("Warning: nmi_watchdog enabled, perf grouping will be disabled") args.nogroups = True - # disable grouping if more than 1 cgroups are being monitored + # disable grouping if more than 1 cgroups are being monitored -- not relevant anymore cgroups = [] if args.cid is not None: cgroups = perf_helpers.get_cgroups_from_cids(args.cid.split(",")) @@ -418,7 +418,6 @@ def is_safe_file(fname, substr): events, args.outcsv, ) - elif args.cid and args.timeout: print("Info: Only CPU/core events will be enabled with cid option") perf_format = prep_events.get_cgroup_events_format( @@ -485,6 +484,7 @@ def is_safe_file(fname, substr): validate_perfargs(perfargs) try: print("Collecting perf stat for events in : %s" % eventfilename) + # PerfSpect isn't aware of the actual instance cloudtype if args.cloud and args.cloudtype != "BM": print( "If you're on baremetal cloud instance, consider using cloudtype flag (options:VM/BM, default is VM)" diff --git a/perf-postprocess.py b/perf-postprocess.py index 8765897..7faffab 100644 --- a/perf-postprocess.py +++ b/perf-postprocess.py @@ -1,7 +1,7 @@ #!/usr/bin/env python3 ########################################################################################################### -# Copyright (C) 2021 Intel Corporation +# Copyright (C) 2021-2023 Intel Corporation # SPDX-License-Identifier: BSD-3-Clause ########################################################################################################### @@ -21,16 +21,14 @@ # fix the pyinstaller path if "_MEI" in script_path: script_path = script_path.rsplit("/", 1)[0] - # temporary output :time series dump of raw events output_file = script_path + "/_tmp_perf_/tmp_perf_out.csv" -output_files = [] +output_files = [] # For per cgroup tmp_perf_out files # temporary output :time series dump of raw events at socket level tmp_socket_file = script_path + "/_tmp_perf_/tmp_socket_out.csv" - # temporary output:trasposed view of perf-collect output time_dump_file = script_path + "/_tmp_perf_/time_dump.csv" -time_dump_files = [] +time_dump_files = [] # For per cgroup time-dump file # final output of post-process out_metric_file = script_path + "/results/metric_out.csv" out_metric_files = [] # For per cgroup metrics @@ -38,6 +36,8 @@ html_input = "metric_out.average.csv" +# globals +# excel output related class workbook: def __init__(self): self.book = None @@ -267,6 +267,7 @@ def evaluate_expression( "{:.8f}".format(simple_eval(formula, functions={"min": min, "max": max})) ) except ZeroDivisionError: + # ignore the systems with no PMEM if "UNC_M_PMM" not in temp_formula and "UNC_M_TAGC" not in temp_formula: zero_division_errcount += 1 result = "0" @@ -300,7 +301,7 @@ def validate_file(fname): def is_safe_file(fname, substr): if not fname.endswith(substr): - raise SystemExit(str(fname) + " not a valid file") + raise SystemExit(str(fname) + " not a valid file, expecting " + str(substr)) return 1 @@ -374,6 +375,7 @@ def get_extra_out_file(out_file, t, excelsheet=False): # level: 0-> system, 1->socket, 2->thread def load_metrics(infile, outfile, level=0): global CGROUPS + event_list, event_dict = get_perf_events(level) metrics = {} validate_file(metric_file) @@ -439,12 +441,14 @@ def load_metrics(infile, outfile, level=0): OUT_WORKBOOK.writerow(0, metric_row, sheet_type) f_pmu = open(input_file, "r") pmucsv = csv.reader(f_pmu, delimiter=",") + if CGROUPS == "enabled": const_TSC = CONST_TSC_FREQ * CPUSETS[infile.rsplit("_", 1)[1].split(".")[0]] else: const_TSC = ( CONST_TSC_FREQ * CONST_CORE_COUNT * CONST_HT_COUNT * CONST_SOCKET_COUNT ) + const_dict = { "const_tsc_freq": CONST_TSC_FREQ, "const_core_count": CONST_CORE_COUNT, @@ -543,7 +547,7 @@ def write_summary(level=0): for h in reader.fieldnames: metrics.append(h) first_row = False - for (k, v) in row.items(): + for k, v in row.items(): columns[k].append(float(v)) sheet_type = "" @@ -587,6 +591,7 @@ def write_summary(level=0): if EXCEL_OUT: OUT_WORKBOOK.writerow(i, [h, avg, p95, minval, maxval], sheet_type) elif level == 1: + # [metric, S0.avg, S1.avg, S0.p95, S1.p95] socket_id = (i - 1) % int( CONST_SOCKET_COUNT ) # -1 for first column in metrics - time @@ -646,6 +651,7 @@ def get_metadata(): raise SystemExit( "The perf raw file doesn't contain metadata, please re-collect perf raw data" ) + f_dat = open(dat_file, "r") for line in f_dat: if start_events: @@ -699,6 +705,7 @@ def get_metadata(): int(docker_SET.split("-")[1]) - int(docker_SET.split("-")[0]) + 1 ) CPUSETS[docker_HASH[i]] = docker_SET + elif line.startswith("Percore mode"): PERCORE_MODE = True if (str(line.split(",")[1]) == "enabled") else False elif line.startswith("# started on"): @@ -1312,7 +1319,6 @@ def is_safe_path(base_dir, path, follow_symlinks=True): if __name__ == "__main__": - from argparse import ArgumentParser parser = ArgumentParser(description="perf-postprocess: perf post process") @@ -1408,10 +1414,9 @@ def is_safe_path(base_dir, path, follow_symlinks=True): html_input = out_metric_file.split("/")[-1] if "/" in out_metric_file: res_dir = out_metric_file.rpartition("/")[0] - # print(res_dir) - # exit() else: res_dir = script_path + if args.metricfile: metric_file = args.metricfile if dat_file and not os.path.isfile(dat_file): @@ -1437,6 +1442,7 @@ def is_safe_path(base_dir, path, follow_symlinks=True): raise SystemExit( args.html + " isn't a valid html file name, .html files are accepted" ) + # parse header get_metadata() zero_division_errcount = 0 @@ -1450,6 +1456,10 @@ def is_safe_path(base_dir, path, follow_symlinks=True): metric_file = "metric_icx_aws.json" elif CONST_ARCH == "icelake": metric_file = "metric_icx.json" + elif CONST_ARCH == "sapphirerapids" and args.cloud == "aws": + metric_file = "metric_spr_aws.json" + elif CONST_ARCH == "sapphirerapids": + metric_file = "metric_spr.json" else: raise SystemExit("Suitable metric file not found") @@ -1485,7 +1495,6 @@ def is_safe_path(base_dir, path, follow_symlinks=True): OUT_WORKBOOK.initialize(args.outfile, persocket_output, percore_output) samples = write_perf_tmp_output(args.epoch) - # levels: 0->system 1->socket 2->core if percore_output or persocket_output: write_socket_view(1, samples) @@ -1514,6 +1523,7 @@ def is_safe_path(base_dir, path, follow_symlinks=True): infile = time_dump_file outfile = output_file write_system_view(infile, outfile) + # Load metrics from raw data and summarize if CGROUPS == "enabled": for infile in output_files: @@ -1530,8 +1540,11 @@ def is_safe_path(base_dir, path, follow_symlinks=True): cleanup() if EXCEL_OUT: OUT_WORKBOOK.close() - if "res_dir" in locals(): + try: + res_dir perf_helpers.fix_path_ownership(res_dir, True) + except NameError: + pass if zero_division_errcount > 0: print( "Warning:" @@ -1541,6 +1554,7 @@ def is_safe_path(base_dir, path, follow_symlinks=True): + " samples were used" ) print("Post processing done, result file:%s" % args.outfile) + if args.html: from src import report diff --git a/pmu-checker/README.md b/pmu-checker/README.md index 8ae9729..5da4ba4 100644 --- a/pmu-checker/README.md +++ b/pmu-checker/README.md @@ -2,18 +2,24 @@ Allows us to verify if the system is running any drivers/daemons that may be programming the PMU. -pmu-checker specifically checks if the following MSRs are actively being programmed/used : +pmu-checker specifically checks if the following MSRs are actively being programmed/used: + 1. 0x309 2. 0x30a -3. 0x30b -4. 0xc1 -5. 0xc2 -6. 0xc3 -7. 0xc4 +3. 0x30b +4. 0x30c (SPR) +5. 0xc1 +6. 0xc2 +7. 0xc3 +8. 0xc4 +9. 0xc5 (SPR) +10. 0xc6 (SPR) +11. 0xc7 (SPR) +12. 0xc8 (SPR) ## Usage -Usage: sudo ./pmu-checker [OPTION ...] +Usage: sudo ./pmu-checker [OPTION ...] Options: diff --git a/pmu-checker/go.mod b/pmu-checker/go.mod index dbcc2a9..fb53138 100644 --- a/pmu-checker/go.mod +++ b/pmu-checker/go.mod @@ -1,13 +1,10 @@ module github.com/intel/perfspect/pmu-checker -go 1.17 +go 1.18 require ( - github.com/davecgh/go-spew v1.1.1 // indirect github.com/pkg/errors v0.9.1 - github.com/pmezard/go-difflib v1.0.0 // indirect - github.com/sirupsen/logrus v1.8.1 - github.com/stretchr/testify v1.7.0 - golang.org/x/sys v0.0.0-20191026070338-33540a1f6037 // indirect - gopkg.in/yaml.v3 v3.0.0-20210107192922-496545a6307b // indirect + github.com/sirupsen/logrus v1.9.0 + github.com/stretchr/testify v1.8.2 + golang.org/x/sys v0.5.0 // indirect ) diff --git a/pmu-checker/go.sum b/pmu-checker/go.sum index c1dd677..de09d3f 100644 --- a/pmu-checker/go.sum +++ b/pmu-checker/go.sum @@ -7,14 +7,28 @@ github.com/pmezard/go-difflib v1.0.0 h1:4DBwDE0NGyQoBHbLQYPwSUPoCMWR5BEzIk/f1lZb github.com/pmezard/go-difflib v1.0.0/go.mod h1:iKH77koFhYxTK1pcRnkKkqfTogsbg7gZNVY4sRDYZ/4= github.com/sirupsen/logrus v1.8.1 h1:dJKuHgqk1NNQlqoA6BTlM1Wf9DOH3NBjQyu0h9+AZZE= github.com/sirupsen/logrus v1.8.1/go.mod h1:yWOB1SBYBC5VeMP7gHvWumXLIWorT60ONWic61uBYv0= +github.com/sirupsen/logrus v1.9.0 h1:trlNQbNUG3OdDrDil03MCb1H2o9nJ1x4/5LYw7byDE0= +github.com/sirupsen/logrus v1.9.0/go.mod h1:naHLuLoDiP4jHNo9R0sCBMtWGeIprob74mVsIT4qYEQ= github.com/stretchr/objx v0.1.0/go.mod h1:HFkY916IF+rwdDfMAkV7OtwuqBVzrE8GR6GFx+wExME= +github.com/stretchr/objx v0.4.0/go.mod h1:YvHI0jy2hoMjB+UWwv71VJQ9isScKT/TqJzVSSt89Yw= +github.com/stretchr/objx v0.5.0 h1:1zr/of2m5FGMsad5YfcqgdqdWrIhu+EBEJRhR1U7z/c= +github.com/stretchr/objx v0.5.0/go.mod h1:Yh+to48EsGEfYuaHDzXPcE3xhTkx73EhmCGUpEOglKo= github.com/stretchr/testify v1.2.2/go.mod h1:a8OnRcib4nhh0OaRAV+Yts87kKdq0PP7pXfy6kDkUVs= github.com/stretchr/testify v1.7.0 h1:nwc3DEeHmmLAfoZucVR881uASk0Mfjw8xYJ99tb5CcY= github.com/stretchr/testify v1.7.0/go.mod h1:6Fq8oRcR53rry900zMqJjRRixrwX3KX962/h/Wwjteg= +github.com/stretchr/testify v1.7.1/go.mod h1:6Fq8oRcR53rry900zMqJjRRixrwX3KX962/h/Wwjteg= +github.com/stretchr/testify v1.8.0/go.mod h1:yNjHg4UonilssWZ8iaSj1OCr/vHnekPRkoO+kdMU+MU= +github.com/stretchr/testify v1.8.2 h1:+h33VjcLVPDHtOdpUCuF+7gSuG3yGIftsP1YvFihtJ8= +github.com/stretchr/testify v1.8.2/go.mod h1:w2LPCIKwWwSfY2zedu0+kehJoqGctiVI29o6fzry7u4= golang.org/x/sys v0.0.0-20191026070338-33540a1f6037 h1:YyJpGZS1sBuBCzLAR1VEpK193GlqGZbnPFnPV/5Rsb4= golang.org/x/sys v0.0.0-20191026070338-33540a1f6037/go.mod h1:h1NjWce9XRLGQEsW7wpKNCjG9DtNlClVuFLEZdDNbEs= +golang.org/x/sys v0.0.0-20220715151400-c0bba94af5f8/go.mod h1:oPkhp1MJrh7nUepCBck5+mAzfO9JrbApNNgaTdGDITg= +golang.org/x/sys v0.5.0 h1:MUK/U/4lj1t1oPg0HfuXDN/Z1wv31ZJ/YcPiGccS4DU= +golang.org/x/sys v0.5.0/go.mod h1:oPkhp1MJrh7nUepCBck5+mAzfO9JrbApNNgaTdGDITg= gopkg.in/check.v1 v0.0.0-20161208181325-20d25e280405 h1:yhCVgyC4o1eVCa2tZl7eS0r+SDo693bJlVdllGtEeKM= gopkg.in/check.v1 v0.0.0-20161208181325-20d25e280405/go.mod h1:Co6ibVJAznAaIkqp8huTwlJQCZ016jof/cbN4VW5Yz0= gopkg.in/yaml.v3 v3.0.0-20200313102051-9f266ea9e77c/go.mod h1:K4uyk7z7BCEPqu6E+C64Yfv1cQ7kz7rIZviUmN+EgEM= gopkg.in/yaml.v3 v3.0.0-20210107192922-496545a6307b h1:h8qDotaEPuJATrMmW04NCwg7v22aHH28wwpauUhK9Oo= gopkg.in/yaml.v3 v3.0.0-20210107192922-496545a6307b/go.mod h1:K4uyk7z7BCEPqu6E+C64Yfv1cQ7kz7rIZviUmN+EgEM= +gopkg.in/yaml.v3 v3.0.1 h1:fxVm/GzAzEWqLHuvctI91KS9hhNmmWOoWu0XTYJS7CA= +gopkg.in/yaml.v3 v3.0.1/go.mod h1:K4uyk7z7BCEPqu6E+C64Yfv1cQ7kz7rIZviUmN+EgEM= diff --git a/pmu-checker/msr/msr.go b/pmu-checker/msr/msr.go index 041458c..591ddf6 100644 --- a/pmu-checker/msr/msr.go +++ b/pmu-checker/msr/msr.go @@ -29,10 +29,15 @@ var ( "0x309": "instructions", "0x30a": "cpu_cycles", "0x30b": "ref_cycles", + "0x30c": "topdown_slots", "0xc1": generalPurposePMU, "0xc2": generalPurposePMU, "0xc3": generalPurposePMU, "0xc4": generalPurposePMU, + "0xc5": generalPurposePMU, + "0xc6": generalPurposePMU, + "0xc7": generalPurposePMU, + "0xc8": generalPurposePMU, } ) diff --git a/release_notes b/release_notes index 04fd920..8454414 100644 --- a/release_notes +++ b/release_notes @@ -1,26 +1,27 @@ RELEASE NOTES PerfSpect -Support structure(Tested internally): +Xeon Micro-Architectures: +- Broadwell (minimum kernel 4.15) +- Skylake (minimum kernel 4.15) +- Cascadelake (minimum kernel 4.15) +- Icelake (minimum kernel 5.9) +- Sapphire Rapids (minimum kernel 5.12) -| BigCores (server) | +Operating Systems: +- Ubuntu 16.04 and newer +- centos 7 and newer +- Amazon Linux 2 +- RHEL 9 +- Debian 11 -------------------------------------------------------------- -| Arch | OS | Kernel | -------------------------------------------------------------- -| Broadwell | >= Ubuntu 16.04 | >=4.15 | -| Broadwell | >= centos 7 | >=3.10 | -| Skylake | >= centos 7 | >=3.10 | -| Skylake | >= Ubuntu 16.04 | >=4.15 | -| Cascadelake | >= Ubuntu 16.04 | >=4.15 | -| Cascadelake | >= centos 7 | >=3.10 | -| Icelake | >= Ubuntu 16.04 | >=5.9 | -| Icelake | >= centos 7 | >=5.9 | -------------------------------------------------------------- +Note: PerfSpect may work on other Linux distributions, but has not been thoroughly tested - -* v1.1.0 -PerfSpect supports BDX, SKX, CLX and ICX +* v1.2.0 +PerfSpect supports BDX, SKX, CLX, ICX and SPR * v1.1.1 Added support for AWS instances using cloud and cloudtype flag + +* v1.1.0 +PerfSpect supports BDX, SKX, CLX and ICX \ No newline at end of file diff --git a/requirements.txt b/requirements.txt index 966766c..d4ee382 100644 --- a/requirements.txt +++ b/requirements.txt @@ -1,8 +1,11 @@ -simpleeval==0.9.11 -python-dateutil -xlsxwriter +black +flake8 +simpleeval +pandas plotly -kaleido -scipy -yattag psutil +pyinstaller +pytest +python-dateutil +XlsxWriter +yattag \ No newline at end of file diff --git a/security.md b/security.md new file mode 100644 index 0000000..f14ba1e --- /dev/null +++ b/security.md @@ -0,0 +1,5 @@ +# Security Policy +Intel is committed to rapidly addressing security vulnerabilities affecting our customers and providing clear guidance on the solution, impact, severity and mitigation. + +## Reporting a Vulnerability +Please report any security vulnerabilities in this project utilizing the guidelines [here](https://www.intel.com/content/www/us/en/security-center/vulnerability-handling-guidelines.html). \ No newline at end of file diff --git a/similarity-analyzer/README.md b/similarity-analyzer/README.md index 04abbfd..52d09ec 100644 --- a/similarity-analyzer/README.md +++ b/similarity-analyzer/README.md @@ -54,5 +54,3 @@ It also produces a combined CSV file comprising: * Kindly use "--debug" flag if you wish to log PCA components used for plotting. * Due to mathematical limitation with underlying PCA library, one can perform similarity analysis for 42 workload profiles at the same time. - -Authors: Karan Kamatgi, Harshad Sane diff --git a/similarity-analyzer/Reference/ICX/500.csv b/similarity-analyzer/Reference/ICX/500.csv index 0565e03..90afa61 100644 --- a/similarity-analyzer/Reference/ICX/500.csv +++ b/similarity-analyzer/Reference/ICX/500.csv @@ -54,7 +54,7 @@ metric_TMA_......Data_Sharing(%),0.004423982068965517,0.005649421999999999,0.001 metric_TMA_......L3_Hit_Latency(%),0.17783907310344826,0.6775015679999997,0.02283305,0.8332183 metric_TMA_......SQ_Full(%),0.13579130551724136,0.19015179399999993,0.05768861,0.22856939 metric_TMA_......MEM_Bandwidth(%),0.6546436393103446,2.581028779999998,0.0757437,3.4958891 -metric_TMA_......Mem_Latency(%),4.377492249310345,13.773500661999991,1.68238782,15.58695667 +metric_TMA_......MEM_Latency(%),4.377492249310345,13.773500661999991,1.68238782,15.58695667 metric_TMA_....Store_Bound(%),1.3670219672413795,5.152926585999998,0.5561879,6.8985576 metric_TMA_..Core_Bound(%),0.0,0.0,0.0,0.0 metric_TMA_....Divider(%),0.06122536034482759,0.12383227,0.03009665,0.14975621 diff --git a/similarity-analyzer/Reference/ICX/502.csv b/similarity-analyzer/Reference/ICX/502.csv index 0e43c60..9175527 100644 --- a/similarity-analyzer/Reference/ICX/502.csv +++ b/similarity-analyzer/Reference/ICX/502.csv @@ -54,7 +54,7 @@ metric_TMA_......Data_Sharing(%),0.02604648827586207,0.04833127199999998,0.00974 metric_TMA_......L3_Hit_Latency(%),3.4066045358620687,3.915886632,2.35309752,6.34434381 metric_TMA_......SQ_Full(%),1.244770408965517,1.841267276,0.73991051,2.10920923 metric_TMA_......MEM_Bandwidth(%),30.542444001034486,36.07468290999999,13.23755847,37.14292175 -metric_TMA_......Mem_Latency(%),45.32318453551724,48.595298434,35.1794058,48.98968563 +metric_TMA_......MEM_Latency(%),45.32318453551724,48.595298434,35.1794058,48.98968563 metric_TMA_....Store_Bound(%),4.1001735551724146,6.646127149999994,3.08095423,15.31000799 metric_TMA_..Core_Bound(%),0.13471021,0.0,0.0,3.90659609 metric_TMA_....Divider(%),0.11673475758620691,0.18485510599999985,0.05909057,0.25240928 diff --git a/similarity-analyzer/Reference/ICX/505.csv b/similarity-analyzer/Reference/ICX/505.csv index b1b3ba6..53612ac 100644 --- a/similarity-analyzer/Reference/ICX/505.csv +++ b/similarity-analyzer/Reference/ICX/505.csv @@ -54,7 +54,7 @@ metric_TMA_......Data_Sharing(%),0.0021323586206896555,0.0026338259999999997,0.0 metric_TMA_......L3_Hit_Latency(%),13.804415213448275,16.110765256,6.66674729,16.86034053 metric_TMA_......SQ_Full(%),5.746837990344828,7.2978420559999995,3.35180605,8.07614195 metric_TMA_......MEM_Bandwidth(%),55.24995918344828,64.33875130999999,42.84893133,65.06153742 -metric_TMA_......Mem_Latency(%),23.334137649655176,24.257483082,21.21271285,24.33349113 +metric_TMA_......MEM_Latency(%),23.334137649655176,24.257483082,21.21271285,24.33349113 metric_TMA_....Store_Bound(%),2.714802168965517,4.465818585999999,0.94244553,4.72990458 metric_TMA_..Core_Bound(%),0.0,0.0,0.0,0.0 metric_TMA_....Divider(%),0.07134564724137932,0.101767134,0.03375385,0.11868516 diff --git a/similarity-analyzer/Reference/ICX/520.csv b/similarity-analyzer/Reference/ICX/520.csv index 39c56cc..7d81411 100644 --- a/similarity-analyzer/Reference/ICX/520.csv +++ b/similarity-analyzer/Reference/ICX/520.csv @@ -54,7 +54,7 @@ metric_TMA_......Data_Sharing(%),0.001862514482758621,0.002404974,0.00144132,0.0 metric_TMA_......L3_Hit_Latency(%),3.4175575886206895,3.4458402579999996,3.32120746,3.4464033 metric_TMA_......SQ_Full(%),0.05413051275862069,0.05560140599999999,0.04956643,0.05597805 metric_TMA_......MEM_Bandwidth(%),21.75205649586207,21.830844182,21.41846617,21.84911648 -metric_TMA_......Mem_Latency(%),58.97937940344828,59.1235348,58.80365823,59.48694834 +metric_TMA_......MEM_Latency(%),58.97937940344828,59.1235348,58.80365823,59.48694834 metric_TMA_....Store_Bound(%),10.64102896586207,10.838106419999999,10.14949775,10.87884375 metric_TMA_..Core_Bound(%),0.0,0.0,0.0,0.0 metric_TMA_....Divider(%),0.005735969999999998,0.005781396,0.0057065,0.00579553 diff --git a/similarity-analyzer/Reference/ICX/523.csv b/similarity-analyzer/Reference/ICX/523.csv index e8f3570..044ec7d 100644 --- a/similarity-analyzer/Reference/ICX/523.csv +++ b/similarity-analyzer/Reference/ICX/523.csv @@ -54,7 +54,7 @@ metric_TMA_......Data_Sharing(%),0.004410422105263157,0.005510369999999999,0.003 metric_TMA_......L3_Hit_Latency(%),0.8846972984210526,0.948886217,0.79388984,0.96475472 metric_TMA_......SQ_Full(%),0.3537605010526316,0.378839263,0.32216732,0.38193817 metric_TMA_......MEM_Bandwidth(%),2.1597949236842107,2.639450936,1.9670796,2.84048831 -metric_TMA_......Mem_Latency(%),13.538248633684208,14.074509026999998,12.93828235,15.2470623 +metric_TMA_......MEM_Latency(%),13.538248633684208,14.074509026999998,12.93828235,15.2470623 metric_TMA_....Store_Bound(%),1.5689664915789472,1.611220796,1.51165253,1.61138996 metric_TMA_..Core_Bound(%),0.0,0.0,0.0,0.0 metric_TMA_....Divider(%),0.04397925578947368,0.1211737639999998,0.0218285,0.2034671 diff --git a/similarity-analyzer/Reference/ICX/525.csv b/similarity-analyzer/Reference/ICX/525.csv index 67d8a86..8ff6ae5 100644 --- a/similarity-analyzer/Reference/ICX/525.csv +++ b/similarity-analyzer/Reference/ICX/525.csv @@ -54,7 +54,7 @@ metric_TMA_......Data_Sharing(%),0.002560914736842105,0.00391123,0.00160419,0.00 metric_TMA_......L3_Hit_Latency(%),0.41934530368421047,0.5256358649999999,0.33197021,0.5427954 metric_TMA_......SQ_Full(%),0.18615972578947368,0.24927978499999998,0.15936838,0.25991099 metric_TMA_......MEM_Bandwidth(%),2.50889254,2.7365203379999996,2.22620022,2.80423884 -metric_TMA_......Mem_Latency(%),8.343931622631578,9.064821177999999,7.5212437,9.09604882 +metric_TMA_......MEM_Latency(%),8.343931622631578,9.064821177999999,7.5212437,9.09604882 metric_TMA_....Store_Bound(%),0.8195709184210527,1.1313420639999998,0.71449247,1.18916863 metric_TMA_..Core_Bound(%),0.0,0.0,0.0,0.0 metric_TMA_....Divider(%),0.08459899368421052,0.10682484,0.06760873,0.10702203 diff --git a/similarity-analyzer/Reference/ICX/531.csv b/similarity-analyzer/Reference/ICX/531.csv index a552397..582c01c 100644 --- a/similarity-analyzer/Reference/ICX/531.csv +++ b/similarity-analyzer/Reference/ICX/531.csv @@ -54,7 +54,7 @@ metric_TMA_......Data_Sharing(%),0.000991595,0.001294612,0.0006534,0.00164725 metric_TMA_......L3_Hit_Latency(%),0.101113219,0.117515922,0.08245768,0.12270369 metric_TMA_......SQ_Full(%),0.040799977,0.180390682,0.01019106,0.21058348 metric_TMA_......MEM_Bandwidth(%),0.104621263,0.399264732,0.02614526,0.58967582 -metric_TMA_......Mem_Latency(%),11.07007529,14.12880043,8.08128263,14.26036389 +metric_TMA_......MEM_Latency(%),11.07007529,14.12880043,8.08128263,14.26036389 metric_TMA_....Store_Bound(%),0.242391785,1.062604758,0.03371587,1.26593562 metric_TMA_..Core_Bound(%),0,0,0,0 metric_TMA_....Divider(%),0.467286231,0.499833534,0.40820648,0.5076326 diff --git a/similarity-analyzer/Reference/ICX/541.csv b/similarity-analyzer/Reference/ICX/541.csv index 3153c6d..77b5f2b 100644 --- a/similarity-analyzer/Reference/ICX/541.csv +++ b/similarity-analyzer/Reference/ICX/541.csv @@ -54,7 +54,7 @@ metric_TMA_......Data_Sharing(%),0.0024918885,0.0029596615000000003,0.00193797,0 metric_TMA_......L3_Hit_Latency(%),0.6816311425,0.9247876685,0.2599712,1.10517383 metric_TMA_......SQ_Full(%),0.22741931600000004,0.2829461435,0.13929831,0.37201973 metric_TMA_......MEM_Bandwidth(%),0.6157485285000001,0.8310658635,0.33944481,0.89255221 -metric_TMA_......Mem_Latency(%),2.7987915935000003,3.2468984885000003,2.13469038,3.36966848 +metric_TMA_......MEM_Latency(%),2.7987915935000003,3.2468984885000003,2.13469038,3.36966848 metric_TMA_....Store_Bound(%),0.1899499405,0.2417374145,0.12135474,0.25696144 metric_TMA_..Core_Bound(%),0.0163698,0.016369800000000233,0.0,0.327396 metric_TMA_....Divider(%),1.1819574750000001,1.2611423765,1.09573466,1.33649384 diff --git a/similarity-analyzer/Reference/ICX/548.csv b/similarity-analyzer/Reference/ICX/548.csv index 422e876..80d784e 100644 --- a/similarity-analyzer/Reference/ICX/548.csv +++ b/similarity-analyzer/Reference/ICX/548.csv @@ -54,7 +54,7 @@ metric_TMA_......Data_Sharing(%),0.0013530644827586206,0.0017697239999999999,0.0 metric_TMA_......L3_Hit_Latency(%),0.009592303793103451,0.019207871999999987,0.0077605,0.02532769 metric_TMA_......SQ_Full(%),0.00031174103448275864,0.0006027259999999999,0.0001749,0.00066019 metric_TMA_......MEM_Bandwidth(%),22.582366972413794,26.69991116,15.82866801,27.8154729 -metric_TMA_......Mem_Latency(%),34.41457712275862,35.646741385999995,32.75673371,37.24999391 +metric_TMA_......MEM_Latency(%),34.41457712275862,35.646741385999995,32.75673371,37.24999391 metric_TMA_....Store_Bound(%),0.5726192951724137,0.88938586,0.42424125,0.98933402 metric_TMA_..Core_Bound(%),0.0,0.0,0.0,0.0 metric_TMA_....Divider(%),0.009902247241379312,0.021105585999999992,0.00612324,0.0262728 diff --git a/similarity-analyzer/Reference/ICX/557.csv b/similarity-analyzer/Reference/ICX/557.csv index c244cc5..2904284 100644 --- a/similarity-analyzer/Reference/ICX/557.csv +++ b/similarity-analyzer/Reference/ICX/557.csv @@ -54,7 +54,7 @@ metric_TMA_......Data_Sharing(%),0.0011725957894736846,0.0016735469999999996,0.0 metric_TMA_......L3_Hit_Latency(%),4.03971422,5.192479599,2.61800292,5.23195458 metric_TMA_......SQ_Full(%),0.05883785473684212,0.06699107699999998,0.04567624,0.07047999 metric_TMA_......MEM_Bandwidth(%),2.441540811052632,2.592008976,2.27400335,2.64467838 -metric_TMA_......Mem_Latency(%),35.57819142368421,36.383872172,34.86833026,36.4072874 +metric_TMA_......MEM_Latency(%),35.57819142368421,36.383872172,34.86833026,36.4072874 metric_TMA_....Store_Bound(%),0.4187662873684211,0.490900434,0.31080914,0.51047268 metric_TMA_..Core_Bound(%),0.0,0.0,0.0,0.0 metric_TMA_....Divider(%),0.005642168947368421,0.0056625059999999994,0.00561741,0.00567732 diff --git a/similarity-analyzer/_version.txt b/similarity-analyzer/_version.txt deleted file mode 100644 index 1cc5f65..0000000 --- a/similarity-analyzer/_version.txt +++ /dev/null @@ -1 +0,0 @@ -1.1.0 \ No newline at end of file diff --git a/similarity-analyzer/data_formatter/README.md b/similarity-analyzer/data_formatter/README.md new file mode 100644 index 0000000..93ad61e --- /dev/null +++ b/similarity-analyzer/data_formatter/README.md @@ -0,0 +1,13 @@ +# data_formatter + +Formats csv/xlsx data into json and helps comparing metrics from multiple csv's. + +## Example usage + +1. To compare TMA and basic metrics + +`python3 main.py -f "summary_resnet.xlsx,summary_specjbb.xlsx" -m d ` + +2. To compare all compatible metrics + +`python3 main.py -f "summary_resnet.xlsx,summary_specjbb.xlsx" -o comp1.csv` diff --git a/similarity-analyzer/data_formatter/main.py b/similarity-analyzer/data_formatter/main.py index a61f55d..a8d3b16 100644 --- a/similarity-analyzer/data_formatter/main.py +++ b/similarity-analyzer/data_formatter/main.py @@ -1,7 +1,7 @@ #!/usr/bin/env python3 ########################################################################################################### -# Copyright (C) 2021 Intel Corporation +# Copyright (C) 2021-2023 Intel Corporation # SPDX-License-Identifier: BSD-3-Clause ########################################################################################################### diff --git a/similarity-analyzer/data_formatter/requirements.txt b/similarity-analyzer/data_formatter/requirements.txt new file mode 100644 index 0000000..75a0ba0 --- /dev/null +++ b/similarity-analyzer/data_formatter/requirements.txt @@ -0,0 +1,2 @@ +xlrd +simplejson diff --git a/similarity-analyzer/dopca.py b/similarity-analyzer/dopca.py index d638185..8bbdf0c 100644 --- a/similarity-analyzer/dopca.py +++ b/similarity-analyzer/dopca.py @@ -1,7 +1,7 @@ #!/usr/bin/env python3 ########################################################################################################### -# Copyright (C) 2021 Intel Corporation +# Copyright (C) 2021-2023 Intel Corporation # SPDX-License-Identifier: BSD-3-Clause ########################################################################################################### diff --git a/similarity-analyzer/requirements.txt b/similarity-analyzer/requirements.txt index 66174e4..2a2e4d5 100644 --- a/similarity-analyzer/requirements.txt +++ b/similarity-analyzer/requirements.txt @@ -1,6 +1,5 @@ -numpy>=1.16 -matplotlib==3.3.4 -pandas==1.1.5 -scikit_learn==0.24.2 -simplejson==3.17.2 -xlrd==1.2.0 +matplotlib +pandas +scikit_learn +simplejson +xlrd diff --git a/src/__init__.py b/src/__init__.py index e43414e..38bbf18 100644 --- a/src/__init__.py +++ b/src/__init__.py @@ -1,5 +1,7 @@ +#!/usr/bin/env python3 + ########################################################################################################### -# Copyright (C) 2021 Intel Corporation +# Copyright (C) 2020-2023 Intel Corporation # SPDX-License-Identifier: BSD-3-Clause ########################################################################################################### diff --git a/src/basic_stats.py b/src/basic_stats.py index 771f7fb..6bbe4ea 100644 --- a/src/basic_stats.py +++ b/src/basic_stats.py @@ -1,3 +1,10 @@ +#!/usr/bin/env python3 + +########################################################################################################### +# Copyright (C) 2020-2023 Intel Corporation +# SPDX-License-Identifier: BSD-3-Clause +########################################################################################################### + import plotly.graph_objects as go import plotly import pandas as pd diff --git a/src/calibrate.c b/src/calibrate.c index 035faf9..e4de248 100644 --- a/src/calibrate.c +++ b/src/calibrate.c @@ -1,6 +1,6 @@ -//########################################################################################################### -//# Copyright (C) 2021 Intel Corporation -//# SPDX-License-Identifier: BSD-3-Clause +//########################################################################################################## +// Copyright (C) 2020-2023 Intel Corporation +// SPDX-License-Identifier: BSD-3-Clause //########################################################################################################### #include @@ -38,4 +38,3 @@ unsigned Calibrate(void){ } - diff --git a/src/icicle.py b/src/icicle.py index a6345da..840f24b 100644 --- a/src/icicle.py +++ b/src/icicle.py @@ -1,11 +1,15 @@ +#!/usr/bin/env python3 + +########################################################################################################### +# Copyright (C) 2020-2023 Intel Corporation +# SPDX-License-Identifier: BSD-3-Clause +########################################################################################################### + from yattag import Doc import plotly.graph_objects as go import pandas as pd import numpy as np -import warnings -from pandas.core.common import SettingWithCopyWarning -warnings.simplefilter(action="ignore", category=SettingWithCopyWarning) doc, tag, text = Doc().tagtext() metric_parent = {} diff --git a/src/perf_helpers.py b/src/perf_helpers.py index a802928..86607ed 100644 --- a/src/perf_helpers.py +++ b/src/perf_helpers.py @@ -1,5 +1,7 @@ +#!/usr/bin/env python3 + ########################################################################################################### -# Copyright (C) 2021 Intel Corporation +# Copyright (C) 2020-2023 Intel Corporation # SPDX-License-Identifier: BSD-3-Clause ########################################################################################################### @@ -8,7 +10,6 @@ import re import fnmatch import time -import struct import math import collections import psutil @@ -159,70 +160,6 @@ def enumerate_uncore(event, n): return event_list -# read the MSR register and return the value in dec format -def readmsr(msr, cpu=0): - f = os.open("/dev/cpu/%d/msr" % (cpu,), os.O_RDONLY) - os.lseek(f, msr, os.SEEK_SET) - val = struct.unpack("Q", os.read(f, 8))[0] - os.close(f) - return val - - -# parse hex to int -def parse_hex(s): - try: - return int(s, 16) - except ValueError: - raise argparse.ArgumentError("Bad hex number %s" % (s)) - - -# detect if PMU counters are in use -def pmu_contention_detect(iterations=6): - - interval = 10 - msrregs = ["0x309", "0x30a", "0x30b", "0xc1", "0xc2", "0xc3", "0xc4"] - values = [0] * len(msrregs) - prev_values = [0] * len(msrregs) - - for count in range(iterations): - for i, reg in enumerate(msrregs): - msrreg = parse_hex(reg) - values[i] = readmsr(msrreg) - - in_use = 0 - if count > 0: - for j, val in enumerate(values): - if val != prev_values[j]: - in_use = 1 - if msrregs[j] == "0x309": - print("PMU in use, hint: instructions") - if msrregs[j] == "0x30a": - print( - "PMU in use, hint: cpu-cycles or Check NMI watchdog. Try: echo 0 > /proc/sys/kernel/nmi_watchdog as sudo" - ) - if msrregs[j] == "0x30b": - print("PMU in use, hint: ref-cycles") - if ( - msrregs[j] == "0xc1" - or msrregs[j] == "0xc2" - or msrregs[j] == "0xc3" - or msrregs[j] == "0xc4" - ): - print("Some PMUs in use") - if in_use != 0: - print("FAIL: PMUs in use") - return True - - print( - "checking iteration= %d waiting for %d seconds " % ((count + 1), interval) - ) - time.sleep(interval) - prev_values = values[:] - - print("PASS: PMUs not in use") - return False - - # get linux kernel version def get_version(): version = "" @@ -279,7 +216,7 @@ def not_suported(): sys.exit() -# Check if arch is broadwell/skyalke/cascadelake +# Check if arch is broadwell/skyalke/cascadelake/icelake/sapphirerapids def check_architecture(procinfo): try: model = int(procinfo[0]["model"].strip()) @@ -304,9 +241,11 @@ def check_architecture(procinfo): arch = "broadwell" elif model == 106 and cpufamily == 6 and stepping >= 4: arch = "icelake" + elif model == 143 and cpufamily == 6 and stepping >= 3: + arch = "sapphirerapids" else: - arch = "unknown" not_suported() + else: not_suported() return arch, modelname @@ -323,7 +262,6 @@ def get_cpuid_info(procinfo): if vendor == "GenuineIntel": key = proc["physical id"] else: - # assuming single socket (ARM) key = 0 val = proc["processor"] if socketinfo.get(key) is None: @@ -340,7 +278,7 @@ def validate_outfile(filename, xlsx=False): outfile = os.path.basename(filename) if resdir and not os.path.exists(resdir): return False - regx = r"[@!#$%^&*()<>?/\|}{~:]" + regx = r"[@!#$%^&*()<>?\|}{~:]" # regex = re.compile("[@!#$%^&*()<>?/\|}{~:]") regex = re.compile(regx) if regex.search(outfile) is None: diff --git a/src/prepare_perf_events.py b/src/prepare_perf_events.py index 8b31bf2..edbedb3 100644 --- a/src/prepare_perf_events.py +++ b/src/prepare_perf_events.py @@ -1,5 +1,7 @@ +#!/usr/bin/env python3 + ########################################################################################################### -# Copyright (C) 2021 Intel Corporation +# Copyright (C) 2020-2023 Intel Corporation # SPDX-License-Identifier: BSD-3-Clause ########################################################################################################### @@ -58,51 +60,11 @@ def check_cpu_event(line): line = line.strip() tmp_list = line.split("/") # assumes event name without a PMU qualifier is a core event - if len(tmp_list) == 1 or tmp_list[0] == "cpu": + if len(tmp_list) == 1 or tmp_list[0] == "cpu" or tmp_list[0].startswith("cstate"): return True return False -# expand event names - deprecated -def expand_event_name(line, grouping): - line = line.strip() - loop_imc = False - loop_cha = False - loop_cbox = False - loop_upi = False - if grouping and line.startswith("imc"): - line = line.replace("imc", "uncore_imc_0") - if "name=" in line: - name = (line.split("'"))[1] - line = line.replace(name, name + ".0") - loop_imc = True - if grouping and line.startswith("cha"): - if "name=" in line: - name = (line.split("'"))[1] - line = line.replace(name, name + ".0") - line = line.replace("cha", "uncore_cha_0") - loop_cha = True - if grouping and line.startswith("cbox"): - if "name=" in line: - name = (line.split("'"))[1] - line = line.replace(name, name + ".0") - line = line.replace("cbox", "uncore_cbox_0") - loop_cbox = True - if grouping and line.startswith("upi"): - if "name=" in line: - name = (line.split("'"))[1] - line = line.replace(name, name + ".0") - line = line.replace("upi", "uncore_upi_0") - loop_upi = True - if grouping and line.startswith("qpi"): - if "name=" in line: - name = (line.split("'"))[1] - line = line.replace(name, name + ".0") - line = line.replace("qpi", "uncore_qpi_0") - loop_upi = True - return (line, loop_imc, loop_cha, loop_cbox, loop_upi) - - # save the last group names in a list when it is cha or imc # test for cha or imc event. append with count value # once reaches new group, start looping through all imc/cha counts to finish up @@ -131,11 +93,6 @@ def enumerate_uncore(group, pattern, n, default_range=True): return uncore_group -# get number of cgroups in the list -def get_num_cgroups(cgroups): - return len(cgroups.split(",")) - - # fix events that aren't compatible with older kernels def fix_events_for_older_kernels(eventfile, kernel_version): reg = r".*?\-(\d*)(\.|\-).*" @@ -186,7 +143,6 @@ def get_cgroup_events_format(cgroups, events, num_events): def prepare_perf_events(event_file, grouping, cpu_only): - if not os.path.isfile(event_file): raise SystemExit("event file not found") @@ -210,6 +166,10 @@ def prepare_perf_events(event_file, grouping, cpu_only): ) except FileNotFoundError: raise SystemExit("perf not found; please install linux perf utility") + + except subprocess.CalledProcessError: + raise SystemExit("perf not found; please install linux perf utility") + unsupported_events = [] for line in fin: if (line != "\n") and (not line.startswith("#")): @@ -223,6 +183,10 @@ def prepare_perf_events(event_file, grouping, cpu_only): collection_events[-1] = end_event[:-1] + ";" else: collection_events.append(line) + if any("cpu-cycles" in event for event in unsupported_events): + raise SystemExit( + "Fixed counters not supported, unable to collect PMUs on this platform" + ) if len(unsupported_events) > 0: print( "These events are not supported with current version of perf, will not be collected!" @@ -238,11 +202,22 @@ def prepare_perf_events(event_file, grouping, cpu_only): templist.append(e) collection_events = templist + core_event = [] + uncore_event = [] event_names = [] for line in collection_events: - event = line + ":c" if check_cpu_event(line) else line + ":u" + if cpu_only: + if check_cpu_event(line): + event = line + ":c" + core_event.append(event) + else: + if check_cpu_event(line): + event = line + ":c" + core_event.append(event) + else: + event = line + ":u" + uncore_event.append(event) event_names.append(event) - # line, loop_imc, loop_cha, loop_cbox, loop_upi = expand_event_name(line, grouping) line, unc_count = expand_unc(line, grouping) if new_group: group += start_group @@ -264,5 +239,11 @@ def prepare_perf_events(event_file, grouping, cpu_only): fin.close() group = group[:-1] - + if len(event_names) == 0: + raise SystemExit("No supported events found on this platform.") + # being conservative not letting the collection to proceed if fixed counters aren't suported on the platform + if len(unsupported_events) >= len(core_event): + raise SystemExit( + "Most core counters aren't supported on this platform, unable to collect PMUs" + ) return group, event_names diff --git a/src/report.py b/src/report.py index 005cb04..bd9066e 100644 --- a/src/report.py +++ b/src/report.py @@ -1,3 +1,10 @@ +#!/usr/bin/env python3 + +########################################################################################################### +# Copyright (C) 2020-2023 Intel Corporation +# SPDX-License-Identifier: BSD-3-Clause +########################################################################################################### + from src import basic_stats from src import icicle import os @@ -51,8 +58,6 @@ def write_html(res_dir, base_input_file, arch, html_report_out, type="both"): doc.stag("br") doc.asis(fig2) result = indent(doc.getvalue()) - if "/" in html_report_out: - html_report_out = html_report_out.rpartition("/")[-1] out_html = os.path.join(res_dir, html_report_out) with open(out_html, "w") as file: file.write(result) diff --git a/test/test_application.py b/test/test_application.py old mode 100755 new mode 100644 index 52d3b87..8a13aae --- a/test/test_application.py +++ b/test/test_application.py @@ -1,30 +1,32 @@ - -#! /usr/bin/python - +#!/usr/bin/env python3 ########################################################################################################### -# Copyright (C) 2021 Intel Corporation +# Copyright (C) 2020-2023 Intel Corporation # SPDX-License-Identifier: BSD-3-Clause ########################################################################################################### import os import re +import sys +import glob import tarfile +import pytest import subprocess #nosec def _run_command(command, cwd=""): - proc = subprocess.Popen(command, stdout=subprocess.PIPE, cwd=cwd) #nosec + proc = subprocess.Popen(command, stdout=subprocess.PIPE, stderr=subprocess.STDOUT, cwd=cwd) #nosec try: stdout, stderr = proc.communicate(timeout=10) except: proc.kill() stdout, stderr = proc.communicate() retcode = proc.returncode + return stdout, stderr, retcode def _test_run_regex( - command, expected_retcode, capsys, stdout_regex=None, stderr_regex=None, regex_flags=0, cwd="." + command, expected_retcode, capsys, stdout_regex=None, stderr_regex=None, regex_flags=0, cwd="perfspect" ): stdout, stderr, retcode = _run_command(command, cwd) @@ -39,44 +41,47 @@ def _test_run_regex( assert re.search(stdout_regex, stdout, regex_flags) -def _test_run_output(command, expected_output_extensions): - proc = subprocess.Popen(command, stdout=subprocess.PIPE) #nosec +def _test_run_output(command, cwd, expected_output_extensions,collect=True): + proc = subprocess.Popen(command, cwd=cwd,stdout=subprocess.PIPE) #nosec try: - stdout, stderr = proc.communicate(timeout=10) + stdout, stderr = proc.communicate(timeout=20) except: proc.kill() stdout, stderr = proc.communicate() - retcode = proc.returncode + retcode = proc.returncode assert retcode == 0 # get output dir from stdout - matches = re.findall(r"Output archive: (.*)", stdout) + if collect: + matches = re.findall(r"perf stat dumped to (.*)", stdout.decode()) + else: + matches = re.findall(r"Post processing done, result file:(.*)", stdout.decode()) assert matches - relative_output_tar = matches[0] - assert os.path.exists(relative_output_tar) + relative_output_path = matches[0].split("/")[:-1] + relative_output_path = '/'.join(relative_output_path) + assert os.path.exists(relative_output_path) # make sure all expected files are present - tar = tarfile.open(relative_output_tar, "r") + # tar = tarfile.open(relative_output_tar, "r") extension_present = {k: False for k in expected_output_extensions} - for filename in tar.getnames(): + for filename in glob.iglob(f'{relative_output_path}/*'): ext = os.path.splitext(filename)[1] if ext in extension_present.keys(): extension_present[ext] = True for ext in extension_present.keys(): assert extension_present[ext] - -def test_version(capsys): - _test_run_regex( - ["./perf-collect", "--version"], - 0, - capsys, - stdout_regex=r"^[0-9]*.[0-9]*.[0-9]*$", - ) - _test_run_regex( - ["./perf-postprocess", "--version"], - 0, - capsys, - stdout_regex=r"^[0-9]*.[0-9]*.[0-9]*$", - ) +# def test_version(capsys): +# _test_run_regex( +# ["./perf-collect", "--version"], +# 0, +# capsys, +# stdout_regex=r"^[0-9]*.[0-9]*.[0-9]*$", +# ) +# _test_run_regex( +# ["./perf-postprocess", "--version"], +# 0, +# capsys, +# stdout_regex=r"^[0-9]*.[0-9]*.[0-9]*$", +# ) def test_help_collect(capsys): @@ -92,3 +97,158 @@ def test_help_postprocess(capsys): def test_help2_postprocess(capsys): _test_run_regex(["./perf-postprocess", "-h"], 0, capsys, stdout_regex=r"optional arguments:") +def test_run_no_options(): + # no arguments passed + stdout,_,_ = _run_command(["sudo", "./perf-postprocess"],"perfspect") + matches = re.findall(r"usage: (.*)", stdout.decode()) + assert matches + + # no HTML filename provided + _,_,retcode = _run_command(["sudo", "./perf-postprocess" ,"--html"],"perfspect") + assert retcode == 2 + + #no options to pid + _,_,retcode = _run_command(["sudo", "./perf-collect" ,"--pid"],"perfspect") + assert retcode == 2 + + #no options to cid + _,_,retcode = _run_command(["sudo", "./perf-collect" ,"--cid"],"perfspect") + assert retcode == 2 + + #no options to app + _,_,retcode = _run_command(["sudo", "./perf-collect" ,"--app"],"perfspect") + assert retcode == 2 + + #no options to timeout + _,_,retcode = _run_command(["sudo", "./perf-collect" ,"-t"],"perfspect") + assert retcode == 2 + + #no options to csp + _,_,retcode = _run_command(["sudo", "./perf-collect" ,"-csp"],"perfspect") + assert retcode == 2 + + #no options to eventfile + _,_,retcode = _run_command(["sudo", "./perf-collect" ,"-e"],"perfspect") + assert retcode == 2 + + #no options to outcsv + _,_,retcode = _run_command(["sudo", "./perf-collect" ,"-o"],"perfspect") + assert retcode == 2 + + + + +def test_invalid_arguments(): + #perf-collect + #invalid csp name + stdout,_,retcode = _run_command(["sudo", "./perf-collect","-csp", "bad_cspname"],"perfspect") + hit = re.search(r"Invalid csp/cloud", stdout.decode()) + assert hit + assert retcode == 1 + + #invalid eventfile + stdout,_,retcode = _run_command(["sudo", "./perf-collect","-e", "bad_eventfile"],"perfspect") + hit = re.search(r"event file not found", stdout.decode()) + assert hit + assert retcode == 1 + + #invalid interval + stdout,_,retcode = _run_command(["sudo", "./perf-collect","-i", "invalid_interval"],"perfspect") + hit = re.search(r"invalid float value", stdout.decode()) + assert hit + assert retcode == 2 + + #invalid interval range + stdout,_,retcode = _run_command(["sudo", "./perf-collect","-i", "-.007"],"perfspect") + hit = re.search(r"dump interval is too large or too small", stdout.decode()) + assert hit + assert retcode == 1 + + #invalid interval range + stdout,_,retcode = _run_command(["sudo", "./perf-collect","-i", "1001"],"perfspect") + hit = re.search(r"dump interval is too large or too small", stdout.decode()) + assert hit + assert retcode == 1 + + #invalid outcsv + stdout,_,retcode = _run_command(["sudo", "./perf-collect","-o", "bad_outcsv"],"perfspect") + hit = re.search(r"Output filename not accepted", stdout.decode()) + assert hit + assert retcode == 1 + + #uncomment if testing outside of containers + #invalid app argument + # stdout,_,retcode = _run_command(["sudo", "./perf-collect","-a", "bad_app_argument", "-m", "0"],"perfspect") + # hit = re.search(r"Workload failed", stdout.decode()) + # print("--app",stdout) + # assert hit + + #invalid pid argument + # stdout,_,retcode = _run_command(["sudo", "./perf-collect","-p", "bad_pid"],"perfspect") + # hit = re.search(r"Problems finding threads of monitor", stdout.decode()) + # assert hit + + #invalid cid argument + # stdout,_,retcode = _run_command(["sudo", "./perf-collect","--cid", "bad_cid"],"perfspect") + # hit = re.search(r"invalid container ID", stdout.decode()) + # # print("cid",stdout) + # assert hit + # assert retcode == 1 + + #invalid timeout + stdout,_,retcode = _run_command(["sudo", "./perf-collect","--timeout", "bad_timeout"],"perfspect") + # print(stdout) + hit = re.search(r"invalid int value", stdout.decode()) + assert hit + assert retcode == 2 + + #perf-postprocess + #invalid HTML filename provided + stdout,_,retcode = _run_command(["sudo", "./perf-postprocess","-r","../data/perfstat.csv","--html", "bad.filename"],"perfspect") + matches = re.findall(r"isn't a valid html file (.*)", stdout.decode()) + # print("html_matches",stdout) + assert matches + assert retcode == 1 + + #invalid metricfile + stdout,_,retcode = _run_command(["sudo", "./perf-postprocess","-r","../data/perfstat.csv", "-m", "bad_metricfile.name"],"perfspect") + matches = re.findall(r"metric file not found (.*)", stdout.decode()) + assert matches + assert retcode == 1 + + + #invalid raw file + stdout,_,retcode = _run_command(["sudo", "./perf-postprocess","-r", "bad_raw_file"],"perfspect") + hit = re.search(r"perf raw data file not found", stdout.decode()) + assert hit + assert retcode == 1 + + +def test_no_raw_perf_data(): + #invalid perf raw file provided + stdout,_,_ = _run_command(["sudo", "./perf-postprocess" ,"-r", "perfstat.badfilename"],"perfspect") + matches = re.findall(r"usage: (.*)", stdout.decode()) + assert matches + + #empty perf raw file provided + stdout,_,retcode = _run_command(["sudo", "./perf-postprocess" ,"-r", "../data/perfstat_empty.csv"],"perfspect") + hit = re.search(r"The perf raw file doesn't contain metadata", stdout.decode()) + assert hit + assert retcode == 1 + +def test_perf_data_without_metadata(): + #empty perf raw file provided + stdout,_,retcode = _run_command(["sudo", "./perf-postprocess" ,"-r", "../data/perfstat_without_metadata.csv"],"perfspect") + hit = re.search(r"The perf raw file doesn't contain metadata", stdout.decode()) + assert hit + assert retcode == 1 + +def test_valid_perf_postprocess(): + #empty perf raw file provided + _test_run_output(["sudo", "./perf-postprocess" ,"-r", "../data/perfstat.csv"],"perfspect",[".csv"], False) + _test_run_output(["sudo", "./perf-postprocess" ,"-r", "../data/perfstat.csv", "--html", "abc.html"],"perfspect",[".csv", ".html"], False) + +# uncomment if testing outside of container +# def test_valid_perf_collect(): +# #empty perf raw file provided +# _test_run_output(["sudo", "./perf-collect", "-m", "0", "-t", "5"],"perfspect",[".csv"])