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assembler.cpp
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//
// Created by Lars Ott on 8/24/17.
//
#include "Assembler.h"
#include <iostream>
#include <fstream>
#include <QFileDialog>
#include <QFile>
#include "GlobalTypes.h"
using namespace std;
#define addOpCode 0x1000
#define andOpCode 0x5000
#define brOpCode 0x0000
#define jmpOpCode 0xC000
#define jmptOpCode 0xC000 // same as jmp
#define jsrOpCode 0x4000
#define jsrrOpCode 0x4000 //special version of jsr
#define ldOpCode 0x2000
#define ldiOpCode 0xA000
#define ldrOpCode 0x6000
#define leaOpCode 0xE000
#define notOpCode 0x9000
#define retOpCode 0xC000 // same as jmp
#define rttOpCode 0xC000 // same as jmp
#define rtiOpCode 0x8000
#define stOpCode 0x3000
#define stiOpCode 0xB000
#define strOpCode 0x7000
#define trapOpCode 0xF000
#define mulOpCode 0xD000
#define putsTrap 0xF022
#define getcTrap 0xF020
#define outTrap 0xF021
#define inTrap 0xF023
#define putspTrap 0xF024
#define haltTrap 0xF025
Assembler::Assembler() : parserRegex(regex(
R"abc([ \t]*((?!(?:ADD|SUB|AND|(?:BR[nzp]{0,3})|JMP|JMPT|JSRR|JSR|LDI|LDR|LD|LEA|NOT|RET|RTT|RTI|STI|STR|ST|TRAP|MUL|GETC|OUT|IN|PUTSP|PUTS|HALT)(?:\W|$))\w*)?[ \t]*(?:(?:(ADD|SUB|AND|(?:BR[nzp]{0,3})|JMP|JMPT|JSRR|JSR|LDI|LDR|LD|LEA|NOT|RET|RTT|RTI|STI|STR|ST|TRAP|MUL|\.FILL|\.STRINGZ?|\.ORIG|\.END|\.BLKW|PUTS|GETC|OUT|IN|PUTSP|HALT)(?:\W|$))[ \t]*(?:r(\d),?)?[ \t]*(?:r(\d),?)?[ \t]*(?:(?:r(\d))|((?:#|x|b|o|-(?!-))?-?[0-9A-F]+\.?[0-9]*)|(\w*)|((?:".*")|(?:'.*')))?)?[ \t]*((?:(?:;+.*))?))abc",
regex_constants::icase)),
programLength(0),
startingAddress(0xFFFF),
endingAddress(0),
annotatedComment(QString()),
hitDotEND(false)
{
labelDict = map<QString, uint16_t> ();
commentDict = map<mem_addr_t, QString> ();
dataDict = map<mem_addr_t,data_t> ();
}
void Assembler::assembleFileButForSomeReasonTheOtherOneDoesntWork(const char * infile, const char * outFile)
{
MASK
QFile inFileDumb(infile);
inFileDumb.open(QIODevice::ReadOnly);
std::ifstream iStream(infile,std::ios_base::in);
iStream.open(infile,std::ios_base::in);
try{
iStream.seekg(0,ios_base::beg);
}
catch(...)
{
std::cout<<"The file should be open"<<std::endl;
}
QFile outFileDumb(outFile);
if(!inFileDumb.isOpen())
{
std::cout<<"infile doesn't work"<<std::endl;
UNMASK
throw "This program has an actual reason for not working and that reason is that the in file has some problem.";
}
if(!outFileDumb.isOpen())
{
std::cout<<"outfile doesn't work"<<std::endl;
UNMASK
throw "This program has an actual reason for not working and that reason is that the out file has some problem.";
}
for(int runNum = 1; runNum <= 2; runNum++)
{
QTextStream inFileDumbStream(&inFileDumb);
// inFileDumbStream.reset();
int i = 0;
qDebug("Did you even look at the file");
while(!inFileDumbStream.atEnd())
{
inFileDumbStream.pos();
// inFileDumbStream.readLine(1000);
std::cout<< i++<<std::endl;
}
// inFileDumbStream.
// qDebug(inFileDumbStream.readAll().toLocal8Bit());
}
UNMASK
}
void Assembler::assembleFile(const char *inFile, const char *outFile) {
MASK
qDebug("time to try any old ifstream");
// std::ifstream iStream2;
// iStream2.open("C:/Users/Joseph Melberg/Documents/GitHub/LC3-Simulator/loadSaveTests.asm",std::ios_base::in);
qDebug("time to make the iStream");
std::ifstream iStreamNotPointer;
iStreamNotPointer.open(inFile, std::ifstream::in);
if(iStreamNotPointer.fail())
{
qDebug("I don't know how to open files...for some reason");
cerr<<strerror(errno);
}
if(iStreamNotPointer.is_open())
{
qDebug(QString("I was able to open %1").arg(inFile).toLocal8Bit());
}
std::ifstream* iStream = &iStreamNotPointer;
qDebug("time to make the oStream");
// std::ifstream iStream("C:\Users\Joseph Melberg\Documents\GitHub\LC3-Simulator\lc3os.asm",std::ios_base::in);
std::ofstream* oStream = new std::ofstream(outFile, std::ios_base::out | std::ios_base::binary);
qDebug(QString("I am attempting to assemble the file" + QString(inFile) + " into " + QString(outFile)).toLocal8Bit());
if(iStream->is_open())
{
qDebug("IStream is good");
}
else
{
qDebug("IStream is bad");
iStream->fail();
qDebug("I don't know how to open files...for some reason");
cerr<<strerror(errno);
}
if(oStream->is_open())
{
qDebug("OStream is good");
}
else
{
qDebug("OStream is bad");
}
iStream->seekg(0,ios_base::end);
qDebug(QString("I have found the file to be of size :%1").arg(iStream->tellg()).toLocal8Bit());
iStream->seekg(0,ios_base::beg);
qDebug("I am going to the beginning");
qDebug(QString("I am now at %1").arg(iStream->tellg()).toLocal8Bit());
qDebug("I am going to the end");
iStream->seekg(0,ios_base::end);
qDebug(QString("I am now at %1").arg(iStream->tellg()).toLocal8Bit());
qDebug(QString("I have found the file to be of size :%1").arg(iStream->tellg()).toLocal8Bit());
try {
for (int runNum = 1; runNum <= 2; runNum++) {
iStream = new std::ifstream(inFile, std::ios_base::in);
if(iStream->is_open())
{
qDebug("IStream is good");
}
else
{
qDebug("IStream is bad");
}
if(oStream->is_open())
{
qDebug("OStream is good");
}
else
{
qDebug("OStream is bad");
}
// std::ifstream iStream("C:/Users/Jedadiah/Documents/GitHub/LC3-Sim/lc3os.asm",std::ifstream::in);
qDebug("Preparing to seek");
if(runNum == 1)
{
}
qDebug(QString("I am now at %1").arg(iStream->tellg()).toLocal8Bit());
qDebug("Going to the beginning of the file");
qDebug("Wasting time");
iStream->seekg(0,ios_base::beg);
qDebug("Seeked");
qDebug(QString("I am now at %1").arg(iStream->tellg()).toLocal8Bit());
if (!iStream->is_open()) {
UNMASK
qDebug("Could not open file");
throw "Could not open in File";
}
qDebug("=========================");
qDebug("✔️ Was able to open the input file.");
if (!oStream->is_open()) {
UNMASK
qDebug("Could not open file");
throw "Could not open out file";
}
qDebug("✔️ Was able to open the output file.");
// iStream.seekg(0,ios_base::beg);
std::string line;
RunType runType = MainRun;
uint16_t pc = 0xFFFF;
switch (runNum) {
case 1:
runType = PreRun;
break;
case 2:
runType = MainRun;
break;
default:
break;
}
qDebug("=========================");
qDebug(QString("This is run #%1").arg(runNum).toLocal8Bit());
hitDotEND = false;
while (std::getline(*iStream, line) && !hitDotEND) {
int lineLength = line.length();
char dumbConversion[lineLength+1];
strcpy(dumbConversion,line.c_str());
QString lineNumber = getHexString(pc);
qDebug(getHexString(pc).append(": ").append(QString(dumbConversion)).toLocal8Bit());
pc = processLine(line, runType, pc, *oStream);
}
qDebug(QString("I am now at %1").arg(iStream->tellg()).toLocal8Bit());
iStream->clear();
if(runType == PreRun)
{
endingAddress = pc;
}
programLength = endingAddress - startingAddress;
qDebug(QString("The number of lines is %1").arg(programLength).toLocal8Bit());
}
}
catch(...){
qDebug("Time to close the iStream");
iStream->close();
delete iStream;
qDebug("Time to close the oStream");
oStream->close();
delete oStream;
}
iStream->close();
oStream->close();
if(iStream->is_open())
{
qDebug("something weird");
}
else{
qDebug("it's closed");
}
qDebug("HMM?");
UNMASK
}
std::map<QString, uint16_t>* Assembler::labelDictCopy()
{
return new std::map<QString, uint16_t>(labelDict);
}
QString Assembler::labelForAddress(mem_addr_t addr)
{
QString label = QString();
foreach (const auto n, labelDict) {
if (n.second == addr) {
label.append( n.first + " ");
}
}
return label;
}
void Assembler::passLabelsToComputer(Computer *comp)
{
MASK
if (startingAddress == 0xFFFF) {
qDebug("It is not yet time for labels");
return;
}
qDebug("Label Time!");
if (!comp)
{
qDebug("Argument exception: comp");
throw "Argument exception: comp";
}
qDebug("Computer exists!");
qDebug(QString("Starting at ").append(getHexString(startingAddress)).toLocal8Bit());
qDebug(QString("Ending at ").append(getHexString(endingAddress)).toLocal8Bit());
for (mem_addr_t addr = startingAddress; addr <= endingAddress && addr >= startingAddress; addr ++) {
QString text = labelForAddress(addr);
if (text.isEmpty()) {
qDebug(QString("setting label at ").append(getHexString(addr).append("to ''")).toLocal8Bit());
comp->setMemLabelText(addr,"");
} else {
qDebug(QString("setting label at ").append(getHexString(addr)).append(" to ").append(text).toLocal8Bit());
comp->setMemLabelText(addr,text);
}
qDebug("Time for the next label!");
}
UNMASK
}
QString Assembler::commentForAddress(mem_addr_t addr)
{
auto match = commentDict.find(addr);
if (match != commentDict.end()) {
return commentDict[addr];
} else {
return QString();
}
}
void Assembler::passCommentsToComputer(Computer *comp)
{
cleanComments();
MASK
foreach (const auto n, commentDict) {
qDebug(QString(n.second).toLocal8Bit());
comp->setMemComment(n.first,n.second);
}
UNMASK
}
void Assembler::cleanComments()
{
commentDict[startingAddress-1] = commentDict[0xFFFE] + commentDict[startingAddress-1] ;
commentDict[0xFFFE] = "";
}
data_t Assembler::dataTypeForAddress(mem_addr_t addr)
{
auto match = dataDict.find(addr);
if (match != dataDict.end()) {
return dataDict[addr];
} else {
return INSTRUCTION;//default
}
}
void Assembler::passDataTypesToComputer(Computer *comp)
{
MASK
foreach (const auto n, dataDict)
{
comp->setMemDataType(n.first,n.second);
}
UNMASK
}
//val_t Assembler::singleLineAssemble(QString machineCode, mem_addr_t addr)
//{
//}
uint16_t Assembler::processLine(string &line, RunType runType, uint16_t pc, ofstream &oStream) {
std::smatch match;
if (!regex_match(line, match, parserRegex)) {
throw "Could not parse line: " + getHexString(pc).toStdString()+ ":"+ line;
}
std::string label = match[1];
std::string instruction = match[2];
transform(instruction.begin(), instruction.end(), instruction.begin(), ::toupper);
std::string firstReg = match[3];
std::string secondReg = match[4];
std::string thirdReg = match[5];
std::string opNumber = match[6];
string opLabel = match[7];
string opString = match[8];
if (!opString.empty()) {
opString = opString.substr(1, opString.length() - 2);
}
string comment = match[9];
int nOfRegs = 0;
NumOrLabel nOrL = none;
determineArgumentsOfOp(instruction, thirdReg.empty(), nOfRegs, nOrL);
if (runType == PreRun) {
// input checking
// .ORIG not set yet
if (pc == 0xFFFF && !instruction.empty() && instruction != ".ORIG") {
oStream.close();
throw "ERROR: .ORIG must be the first instruction >> " + line;
}
if (pc != 0xFFFF && instruction == ".ORIG") {
oStream.close();
throw "ERROR: .ORIG cannot appear twice >> " + line;
}
string e = checkInput(instruction, firstReg, secondReg, thirdReg, opNumber, opLabel, opString, nOfRegs,
nOrL);
if (!e.empty()) {
oStream.close();
throw getHexString(pc).toStdString() + ": " +e + " >> " + line;
}
}
// .END
if (instruction == ".END") {
hitDotEND = true;
commentDict[pc] = annotatedComment;
return pc;
}
// .ORIG
if (instruction == ".ORIG") {
pc = (uint16_t) parseNumber(opNumber);
startingAddress = pc;
cout << "Origin set to x" << hex << pc << endl;
if (runType == MainRun) {
writeWord(oStream, pc);
}
}
// set label
if (runType == PreRun && !label.empty()) {
labelDict[QString::fromStdString(label)] = pc;
}
// if no op -> skip
if (!instruction.empty()) {
QString comm = annotatedComment.append(QString::fromStdString(comment));
commentDict[pc] = comm;
annotatedComment = QString();
pc = writeInstruction(runType, instruction, firstReg, secondReg, thirdReg, opNumber, opLabel, opString,
nOfRegs, nOrL, oStream, pc);
} else {
if( runType != PreRun)
{
// annotatedComment;
//
if(!comment.empty() && label.empty())
{
commentDict[pc-1] = commentDict[pc-1] + "";
}
if(comment.empty() && !label.empty())
{
commentDict[pc-1] = commentDict[pc-1] + "\b";
}
commentDict[pc-1] = commentDict[pc-1] + QString::fromStdString(comment+"\n");
}
}
return pc;
}
uint16_t Assembler::writeInstruction(RunType runType, string &instruction, string &firstReg, string &secondReg, string &thirdReg,
string &opNumber, string &opLabel, string &opString,
int nOfRegs, NumOrLabel nOrL,
ofstream &oStream, uint16_t pc) {
// .FILL
if (instruction == ".FILL") {
if (runType == MainRun) {
data_t fillData = getNumberType(opNumber);
dataDict[pc] = fillData;
writeFill(oStream, opNumber, opLabel);
}
pc += 1;
}
// .BLKW
else if (instruction == ".BLKW") {
uint16_t size = (uint16_t) parseNumber(opNumber);
if (runType == MainRun) {
for (int i = 0; i < size; i++) {
dataDict[pc + i] = HEX;
writeWord(oStream, 0);
}
}
pc += size;
}
// .STRINGZ
else if (instruction == ".STRINGZ" || instruction == ".STRING") {
string unescaped = unescapeString(opString);
auto strLen = (uint16_t) unescaped.length();
if (runType == MainRun) {
for (int i = 0; i < strLen; i++) {
char c = unescaped[i];
writeWord(oStream, (uint16_t) c);
dataDict[pc + i] = CHAR;
}
if(instruction == ".STRINGZ")
{
dataDict[pc + strLen] = CHAR;
pc+=1;
writeWord(oStream, 0);
}
}
pc += strLen;
}
// main instructions
else if (instruction != ".ORIG") {
pc += 1;
if (runType == MainRun) {
// everything left but .ORIG goes here
uint16_t op = OpCodeForInstruction(instruction);
op |= getConstantBits(instruction, nOfRegs, nOrL);
op |= getRegisters(instruction, nOfRegs, firstReg, secondReg, thirdReg);
op |= getNumberOrOffset(instruction, nOrL, opNumber, opLabel, pc);
writeWord(oStream, op);
}
}
return pc;
}
void Assembler::writeFill(ofstream &oStream, const string &opNumber, const string &opLabel) {
if (!opNumber.empty()) {
double value = parseNumber(opNumber);
if (value < 0) {
writeWord(oStream, static_cast<uint16_t>((int16_t) value));
} else {
writeWord(oStream, (uint16_t) value);
}
} else {
// label
uint16_t labelPos = labelDict[QString::fromStdString(opLabel)];
writeWord(oStream, labelPos);
}
}
uint16_t Assembler::getRegisters(string &instruction, int nOfRegs, string &firstReg, string &secondReg, string &thirdReg) {
uint16_t op = 0;
uint16_t regOne;
uint16_t regTwo;
uint16_t regThree;
switch (nOfRegs) {
case 3:
regThree = (uint16_t) stoi(thirdReg);
op |= regThree;
case 2:
regTwo = (uint16_t) stoi(secondReg);
regTwo <<= 6;
op |= regTwo;
case 1:
regOne = (uint16_t) stoi(firstReg);
if (instruction == "JMP" || instruction == "JMPT" || instruction == "JSRR") {
regOne <<= 6;
} else {
regOne <<= 9;
}
op |= regOne;
break;
case 0:
break;
default:
throw "ERROR: invalid number of registers";
}
return op;
}
// returns null for no error, else error string
string Assembler::checkInput(const string &instruction, const string &firstReg, const string &secondReg, const string &thirdReg,
const string &opNumber, const string &opLabel, const string &opString, int nOfRegs, NumOrLabel nOrL) {
// no op but inputs
if (instruction.empty() &&
!(firstReg.empty() || secondReg.empty() || thirdReg.empty() || opNumber.empty() ||
opLabel.empty())) {
return "ERROR: Missing op";
}
// check number of registers
switch (nOfRegs) {
case 0:
if (!firstReg.empty() || !secondReg.empty() || !thirdReg.empty()) {
return instruction + " needs " + to_string(nOfRegs) + " registers";
}
break;
case 1:
if (firstReg.empty() || !secondReg.empty() || !thirdReg.empty()) {
return instruction + " needs " + to_string(nOfRegs) + " registers";
}
break;
case 2:
if (firstReg.empty() || secondReg.empty() || !thirdReg.empty()) {
return instruction + " needs " + to_string(nOfRegs) + " registers";
}
break;
case 3:
if (firstReg.empty() || secondReg.empty() || thirdReg.empty()) {
return instruction + " needs " + to_string(nOfRegs) + " registers";
}
break;
default:
return "ERROR: Invalid number of registers";
}
// check number or label
if (nOrL == stringOnly) {
if (opString.empty()) {
return instruction + " needs a string argument";
}
if (!firstReg.empty() || !secondReg.empty() || !thirdReg.empty() || !opLabel.empty() ||
!opNumber.empty()) {
return instruction + " should have only a string argument";
}
} else {
if (!opString.empty()) {
return instruction + " should not have a string argument";
}
switch (nOrL) {
case none:
if (!opLabel.empty() || !opNumber.empty()) {
return instruction + " should have no label and no number";
}
break;
case numberOnly:
if (!opLabel.empty() || opNumber.empty()) {
return instruction + " should have no label but a number";
}
break;
case labelOnly:
if (opLabel.empty() || !opNumber.empty()) {
return instruction + " should have a label but no number";
}
break;
case numberOrLabel:
if (opLabel.empty() == opNumber.empty()) {
return instruction + " should have either label or number";
}
break;
default:
return "Default should never be reached";
}
}
return string();
}
uint16_t Assembler::getNumberOrOffset(const string &instruction, NumOrLabel nOrL, const string &opNumber, const string &opLabel,
uint16_t pc) {
uint16_t op = 0;
if (nOrL == numberOnly) {
int16_t num = (int16_t) parseNumber(opNumber);
if (instruction == "TRAP") {
// trap8
if (num > 0x00FF) {
throw "ERROR: trap vector exceeds 8 bit at pc" + to_string(pc) + ")";
}
op |= num;
} else if (instruction == "STR" || instruction == "LDR") {
// offset6
if (num > 0x001F || (~num + 1) > 0x0020) {
// boundary check for offset6
throw "ERROR: offset6 out of bounds at pc" + to_string(pc) + ")";
}
op |= (num & 0x003F);
} else {
if (instruction == "SUB") {
num = -num; // flip sign since we add the negative to subtract...
}
// imm5
if (num > 0x000F || (~num + 1) > 0x0010) {
// boundary check for imm5
throw "ERROR: imm5 out of bounds at pc" + to_string(pc) + ")";
}
op |= (num & 0x001F);
}
} else if (nOrL == numberOrLabel) {
int16_t offset = 0;
if (!opNumber.empty()) {
offset = (int16_t) parseNumber(opNumber);
} else {
try {
uint16_t labelAddr = labelDict[QString::fromStdString(opLabel)];
if (labelAddr == 0)
throw "Empty label exception";
offset = labelAddr - pc;
} catch (...) {
throw "ERROR: label '" + opLabel + "' not found";
}
}
if (instruction == "JSR") {
// PCoffset11
if (offset > 0x03FF || (~offset + 1) > 0x0400) {
// boundary check for PCoffset11
throw "ERROR: PCoffset11 out of bounds at pc" + to_string(pc) + ")";
}
op |= (offset & 0x07FF);
} else {
// PCoffset9
if (offset > 0x00FF || (~offset + 1) > 0x0100) {
// boundary check for PCoffset9
throw "ERROR: PCoffset9 out of bounds (" + to_string(offset) + ")";
} else {
op |= (offset & 0x01FF);
}
}
} else if (nOrL == labelOnly) {
throw "ERROR: labelOnly should never happen";
}
return op;
}
uint16_t Assembler::getConstantBits(const string &instruction, int nOfRegs, NumOrLabel nOrL) {
uint16_t op = 0;
switch (nOfRegs) {
case 0:
if (instruction == "RET") {
op |= 0x01C0;
} else if (instruction == "RTT") {
op |= 0x01C1;
} else if (instruction == "JSR") {
op |= 0x0800;
} else if (instruction.compare(0, 2, "BR") == 0) {
string modeFlags = instruction.substr(2, instruction.length() - 2);
sort(modeFlags.begin(), modeFlags.end());
if (modeFlags.length() == 0) {
op |= 0x0E00;
} else if (modeFlags.length() >= 1) {
if (modeFlags[0] == 'N') {
op |= 0x0800;
}
if (modeFlags[0] == 'Z') {
op |= 0x0400;
}
if (modeFlags[0] == 'P') {
op |= 0x0200;
}
}
if (modeFlags.length() >= 2) {
if (modeFlags[1] == 'N') {
throw "ERROR: duplicate flag";
}
if (modeFlags[1] == 'Z') {
op |= 0x0400;
}
if (modeFlags[1] == 'P') {
op |= 0x0200;
}
}
if (modeFlags.length() == 3) {
if (modeFlags[2] == 'N') {
throw "ERROR: duplicate flag";
}
if (modeFlags[2] == 'Z') {
op |= 0x0400;
}
if (modeFlags[2] == 'P') {
throw "ERROR: duplicate flag";
}
}
}
break;
case 1:
if (instruction == "JMPT") {
op |= 0x0001;
}
else
{
}
break;
case 2:
if (instruction == "NOT") {
op |= 0x003F;
} else if (instruction == "AND") {
if (nOrL != none) {
// add, and, mul with number not register
op |= 0x0020;
}
} else {
if (nOrL != none &&
(instruction == "ADD" ||
instruction == "MUL")) {
// add, and, mul with number not register
op |= 0x0020;
}
}
break;
case 3:
if (instruction == "SUB") {
op |= 0x0010; // bit 4 set makes an add on 3 registers a sub
}
default:
break;
}
return op;
}
uint16_t Assembler::OpCodeForInstruction(string &op) {
if (op == "ADD") {
return addOpCode;
}
if (op == "SUB") {
return addOpCode;
}
if (op == "AND") {
return andOpCode;
}
if (op.compare(0, 2, "BR") == 0) {
return brOpCode;
}
if (op == "JMP") {
return jmpOpCode;
}
if (op == "JMPT") {
return jmptOpCode;
}
if (op == "JSR") {
return jsrOpCode;
}
if (op == "JSRR") {
return jsrrOpCode;
}
if (op == "LD") {
return ldOpCode;
}
if (op == "LDI") {
return ldiOpCode;
}
if (op == "LDR") {
return ldrOpCode;
}
if (op == "LEA") {
return leaOpCode;
}
if (op == "MUL") {
return mulOpCode;
}
if (op == "NOT") {
return notOpCode;
}
if (op == "RET") {
return retOpCode;
}
if (op == "RTT") {
return rttOpCode;
}
if (op == "RTI") {
return rtiOpCode;
}
if (op == "ST") {
return stOpCode;
}
if (op == "STI") {
return stiOpCode;
}
if (op == "STR") {
return strOpCode;
}
if (op == "TRAP") {
return trapOpCode;
}
if (op == "PUTS") {
return putsTrap;
}
if (op == "GETC") {
return getcTrap;
}
if (op == "OUT") {
return outTrap;
}
if (op == "IN") {
return inTrap;
}
if (op == "PUTSP") {
return putspTrap;
}
if (op == "HALT") {
return haltTrap;
}
throw "NOT AN OP: " + op;
return 0xFFFF;
}
void Assembler::writeWord(ostream &stream, uint16_t value) {
auto *p = reinterpret_cast<char *>(&value);
// we want big endian
stream.write(&p[1], sizeof(uint8_t));
stream.write(&p[0], sizeof(uint8_t));
}
void Assembler::determineArgumentsOfOp(const string &instruction, bool thirdRegEmpty, int &nOfRegs, NumOrLabel &nOrL) {
// no args at all
if (instruction == "RET" || instruction == "RTI" || instruction == ".END" || instruction == "PUTS" || instruction == "GETC" ||
instruction == "RTT" ||instruction == "OUT" || instruction == "IN" || instruction == "PUTSP" || instruction == "HALT") {
nOfRegs = 0;
nOrL = none;
}
// one register instructions
else if (instruction == "JMP" || instruction == "JMPT" || instruction == "JSRR") {
nOfRegs = 1;
nOrL = none;
}
// one number instruction
else if (instruction == "TRAP" || instruction == ".ORIG" || instruction == ".BLKW") {
nOfRegs = 0;
nOrL = numberOnly;
}
// num or label instructions
else if (instruction.compare(0, 2, "BR") == 0 || instruction == "JSR" || instruction == ".FILL") {
nOfRegs = 0;
nOrL = numberOrLabel;
}
// two register instructions
else if (instruction == "NOT") {
nOfRegs = 2;
nOrL = none;
}
// one register plus number or label
else if (instruction == "ST" || instruction == "STI" || instruction == "LEA" || instruction == "LD" || instruction == "LDI") {
nOfRegs = 1;
nOrL = numberOrLabel;
}
// two reg + num or label
else if (instruction == "LDR" || instruction == "STR") {
nOfRegs = 2;
nOrL = numberOnly;
}
// two + num or three
else if (instruction == "ADD" || instruction == "AND" || instruction == "SUB" || instruction == "MUL") {
if (thirdRegEmpty) {
nOfRegs = 2;
nOrL = numberOnly;
} else {
nOfRegs = 3;
nOrL = none;
}
}
// string only
else if (instruction == ".STRINGZ" || instruction == ".STRING") {
nOfRegs = 0;
nOrL = stringOnly;
}