Fix SPI comunication

This fixes VersBinarii#25.

Any try to call the `init` function will fail with an `UnsupportedChip`
error without this (using the defautl `sync` feature).

Previous attempts were made to fix this (VersBinarii#28 and VersBinarii#38) but these where
made before `embedded-hal` `1.0.0` and currently have conflicts
preventing their merge (and can't directly be used in a project using
`embedded-hal` `1.0.0`

closes VersBinarii#28

Author: fredszaq

src/spi.rs

@@ -4,6 +4,7 @@
 use core::future::Future;
 #[cfg(feature = "sync")]
 use embedded_hal::delay::DelayNs;
+use embedded_hal::spi::Operation;
 #[cfg(feature = "sync")]
 use embedded_hal::spi::SpiDevice;
 #[cfg(feature = "async")]
@@ -157,9 +158,9 @@ where
 
     fn write_register(&mut self, register: u8, payload: u8) -> Result<(), Error<Self::Error>> {
         // If the first bit is 0, the register is written.
-        let transfer = [register & 0x7f, payload];
+        let data = [register & 0x7f, payload];
         self.spi
-            .transfer(&mut [], &transfer)
+            .write(&data)
             .map_err(|e| Error::Bus(SPIError::SPI(e)))?;
         Ok(())
     }
@@ -251,8 +252,11 @@ where
         register: u8,
         data: &mut [u8],
     ) -> Result<(), Error<SPIError<SPI::Error>>> {
-        self.spi
-            .transfer(data, &[register])
+       self.spi
+            .transaction(&mut [
+                Operation::Write(&[register]),
+                Operation::Read(data)
+            ])
             .await
             .map_err(|e| Error::Bus(SPIError::SPI(e)))?;
         Ok(())