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mcpwm_foc.c
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mcpwm_foc.c
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/*
Copyright 2016 - 2020 Benjamin Vedder [email protected]
This file is part of the VESC firmware.
The VESC firmware is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
The VESC firmware is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _GNU_SOURCE
#define _GNU_SOURCE
#endif
#include "mcpwm_foc.h"
#include "mc_interface.h"
#include "ch.h"
#include "hal.h"
#include "stm32f4xx_conf.h"
#include "digital_filter.h"
#include "utils.h"
#include "ledpwm.h"
#include "terminal.h"
#include "encoder.h"
#include "commands.h"
#include "timeout.h"
#include "timer.h"
#include <math.h>
#include <string.h>
#include <stdlib.h>
#include <stdio.h>
#include "virtual_motor.h"
#include "digital_filter.h"
// Private types
typedef struct {
float id_target;
float iq_target;
float max_duty;
float duty_now;
float phase;
float i_alpha;
float i_beta;
float i_abs;
float i_abs_filter;
float i_bus;
float v_bus;
float v_alpha;
float v_beta;
float mod_d;
float mod_q;
float id;
float iq;
float id_filter;
float iq_filter;
float vd;
float vq;
float vd_int;
float vq_int;
float speed_rad_s;
uint32_t svm_sector;
} motor_state_t;
typedef struct {
int sample_num;
float avg_current_tot;
float avg_voltage_tot;
} mc_sample_t;
typedef struct {
void(*fft_bin0_func)(float*, float*, float*);
void(*fft_bin1_func)(float*, float*, float*);
void(*fft_bin2_func)(float*, float*, float*);
int samples;
int table_fact;
float buffer[32];
float buffer_current[32];
bool ready;
int ind;
bool is_samp_n;
float prev_sample;
float angle;
int est_done_cnt;
float observer_zero_time;
int flip_cnt;
} hfi_state_t;
typedef struct {
volatile mc_configuration *m_conf;
mc_state m_state;
mc_control_mode m_control_mode;
motor_state_t m_motor_state;
int m_curr_unbalance;
bool m_phase_override;
float m_phase_now_override;
float m_duty_cycle_set;
float m_id_set;
float m_iq_set;
float m_openloop_speed;
float m_openloop_phase;
bool m_output_on;
float m_pos_pid_set;
float m_speed_pid_set_rpm;
float m_phase_now_observer;
float m_phase_now_observer_override;
bool m_phase_observer_override;
float m_phase_now_encoder;
float m_phase_now_encoder_no_index;
float m_observer_x1;
float m_observer_x2;
float m_pll_phase;
float m_pll_speed;
mc_sample_t m_samples;
int m_tachometer;
int m_tachometer_abs;
float m_pos_pid_now;
float m_gamma_now;
bool m_using_encoder;
float m_speed_est_fast;
float m_speed_est_faster;
int m_curr_samples;
int m_curr_sum[3];
int m_curr_ofs[3];
int m_duty1_next, m_duty2_next, m_duty3_next;
bool m_duty_next_set;
hfi_state_t m_hfi;
int m_hfi_plot_en;
float m_hfi_plot_sample;
float m_phase_before;
float m_duty_filtered;
bool m_was_full_brake;
bool m_was_control_duty;
float m_duty_i_term;
float m_openloop_angle;
float m_x1_prev;
float m_x2_prev;
float m_phase_before_speed_est;
int m_tacho_step_last;
float m_pid_div_angle_last;
float m_min_rpm_hyst_timer;
float m_min_rpm_timer;
bool m_cc_was_hfi;
float m_pos_i_term;
float m_pos_prev_error;
float m_pos_dt_int;
float m_pos_d_filter;
float m_speed_i_term;
float m_speed_prev_error;
float m_speed_d_filter;
int m_ang_hall_int_prev;
bool m_using_hall;
float m_ang_hall;
float m_hall_dt_diff_last;
float m_hall_dt_diff_now;
} motor_all_state_t;
// Private variables
static volatile bool m_dccal_done = false;
static volatile float m_last_adc_isr_duration;
static volatile bool m_init_done = false;
static volatile motor_all_state_t m_motor_1;
#ifdef HW_HAS_DUAL_MOTORS
static volatile motor_all_state_t m_motor_2;
#endif
static volatile int m_isr_motor = 0;
// Private functions
static void do_dc_cal(void);
void observer_update(float v_alpha, float v_beta, float i_alpha, float i_beta,
float dt, volatile float *x1, volatile float *x2, volatile float *phase, volatile motor_all_state_t *motor);
static void pll_run(float phase, float dt, volatile float *phase_var,
volatile float *speed_var, volatile mc_configuration *conf);
static void control_current(volatile motor_all_state_t *motor, float dt);
static void svm(float alpha, float beta, uint32_t PWMHalfPeriod,
uint32_t* tAout, uint32_t* tBout, uint32_t* tCout, uint32_t *svm_sector);
static void run_pid_control_pos(float angle_now, float angle_set, float dt, volatile motor_all_state_t *motor);
static void run_pid_control_speed(float dt, volatile motor_all_state_t *motor);
static void stop_pwm_hw(volatile motor_all_state_t *motor);
static void start_pwm_hw(volatile motor_all_state_t *motor);
static float correct_encoder(float obs_angle, float enc_angle, float speed, float sl_erpm, volatile motor_all_state_t *motor);
static float correct_hall(float angle, float dt, volatile motor_all_state_t *motor);
static void terminal_plot_hfi(int argc, const char **argv);
static void timer_update(volatile motor_all_state_t *motor, float dt);
static void hfi_update(volatile motor_all_state_t *motor);
// Threads
static THD_WORKING_AREA(timer_thread_wa, 1024);
static THD_FUNCTION(timer_thread, arg);
static volatile bool timer_thd_stop;
static THD_WORKING_AREA(hfi_thread_wa, 1024);
static THD_FUNCTION(hfi_thread, arg);
static volatile bool hfi_thd_stop;
// Macros
#ifdef HW_HAS_3_SHUNTS
#define TIMER_UPDATE_DUTY_M1(duty1, duty2, duty3) \
TIM1->CR1 |= TIM_CR1_UDIS; \
TIM1->CCR1 = duty1; \
TIM1->CCR2 = duty2; \
TIM1->CCR3 = duty3; \
TIM1->CR1 &= ~TIM_CR1_UDIS;
#define TIMER_UPDATE_DUTY_M2(duty1, duty2, duty3) \
TIM8->CR1 |= TIM_CR1_UDIS; \
TIM8->CCR1 = duty1; \
TIM8->CCR2 = duty2; \
TIM8->CCR3 = duty3; \
TIM8->CR1 &= ~TIM_CR1_UDIS;
#else
#define TIMER_UPDATE_DUTY_M1(duty1, duty2, duty3) \
TIM1->CR1 |= TIM_CR1_UDIS; \
TIM1->CCR1 = duty1; \
TIM1->CCR2 = duty3; \
TIM1->CCR3 = duty2; \
TIM1->CR1 &= ~TIM_CR1_UDIS;
#define TIMER_UPDATE_DUTY_M2(duty1, duty2, duty3) \
TIM8->CR1 |= TIM_CR1_UDIS; \
TIM8->CCR1 = duty1; \
TIM8->CCR2 = duty3; \
TIM8->CCR3 = duty2; \
TIM8->CR1 &= ~TIM_CR1_UDIS;
#endif
#define TIMER_UPDATE_SAMP(samp) \
TIM2->CCR2 = (samp / 2);
#define TIMER_UPDATE_SAMP_TOP_M1(samp, top) \
TIM1->CR1 |= TIM_CR1_UDIS; \
TIM2->CR1 |= TIM_CR1_UDIS; \
TIM1->ARR = top; \
TIM2->CCR2 = samp / 2; \
TIM1->CR1 &= ~TIM_CR1_UDIS; \
TIM2->CR1 &= ~TIM_CR1_UDIS;
#define TIMER_UPDATE_SAMP_TOP_M2(samp, top) \
TIM8->CR1 |= TIM_CR1_UDIS; \
TIM2->CR1 |= TIM_CR1_UDIS; \
TIM8->ARR = top; \
TIM2->CCR2 = samp / 2; \
TIM8->CR1 &= ~TIM_CR1_UDIS; \
TIM2->CR1 &= ~TIM_CR1_UDIS;
#ifdef HW_HAS_3_SHUNTS
#define TIMER_UPDATE_DUTY_SAMP_M1(duty1, duty2, duty3, samp) \
TIM1->CR1 |= TIM_CR1_UDIS; \
TIM2->CR1 |= TIM_CR1_UDIS; \
TIM1->CCR1 = duty1; \
TIM1->CCR2 = duty2; \
TIM1->CCR3 = duty3; \
TIM2->CCR2 = samp / 2; \
TIM1->CR1 &= ~TIM_CR1_UDIS; \
TIM2->CR1 &= ~TIM_CR1_UDIS;
#define TIMER_UPDATE_DUTY_SAMP_M2(duty1, duty2, duty3, samp) \
TIM8->CR1 |= TIM_CR1_UDIS; \
TIM2->CR1 |= TIM_CR1_UDIS; \
TIM8->CCR1 = duty1; \
TIM8->CCR2 = duty2; \
TIM8->CCR3 = duty3; \
TIM2->CCR2 = samp / 2; \
TIM8->CR1 &= ~TIM_CR1_UDIS; \
TIM2->CR1 &= ~TIM_CR1_UDIS;
#else
#define TIMER_UPDATE_DUTY_SAMP_M1(duty1, duty2, duty3, samp) \
TIM1->CR1 |= TIM_CR1_UDIS; \
TIM2->CR1 |= TIM_CR1_UDIS; \
TIM1->CCR1 = duty1; \
TIM1->CCR2 = duty3; \
TIM1->CCR3 = duty2; \
TIM2->CCR2 = samp / 2; \
TIM1->CR1 &= ~TIM_CR1_UDIS; \
TIM2->CR1 &= ~TIM_CR1_UDIS;
#define TIMER_UPDATE_DUTY_SAMP_M2(duty1, duty2, duty3, samp) \
TIM8->CR1 |= TIM_CR1_UDIS; \
TIM2->CR1 |= TIM_CR1_UDIS; \
TIM8->CCR1 = duty1; \
TIM8->CCR2 = duty3; \
TIM8->CCR3 = duty2; \
TIM2->CCR2 = samp / 2; \
TIM8->CR1 &= ~TIM_CR1_UDIS; \
TIM2->CR1 &= ~TIM_CR1_UDIS;
#endif
static void update_hfi_samples(foc_hfi_samples samples, volatile motor_all_state_t *motor) {
utils_sys_lock_cnt();
memset((void*)&motor->m_hfi, 0, sizeof(motor->m_hfi));
switch (samples) {
case HFI_SAMPLES_8:
motor->m_hfi.samples = 8;
motor->m_hfi.table_fact = 4;
motor->m_hfi.fft_bin0_func = utils_fft8_bin0;
motor->m_hfi.fft_bin1_func = utils_fft8_bin1;
motor->m_hfi.fft_bin2_func = utils_fft8_bin2;
break;
case HFI_SAMPLES_16:
motor->m_hfi.samples = 16;
motor->m_hfi.table_fact = 2;
motor->m_hfi.fft_bin0_func = utils_fft16_bin0;
motor->m_hfi.fft_bin1_func = utils_fft16_bin1;
motor->m_hfi.fft_bin2_func = utils_fft16_bin2;
break;
case HFI_SAMPLES_32:
motor->m_hfi.samples = 32;
motor->m_hfi.table_fact = 1;
motor->m_hfi.fft_bin0_func = utils_fft32_bin0;
motor->m_hfi.fft_bin1_func = utils_fft32_bin1;
motor->m_hfi.fft_bin2_func = utils_fft32_bin2;
break;
}
utils_sys_unlock_cnt();
}
static void timer_reinit(int f_sw) {
utils_sys_lock_cnt();
TIM_DeInit(TIM1);
TIM_DeInit(TIM8);
TIM_DeInit(TIM2);
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
TIM_OCInitTypeDef TIM_OCInitStructure;
TIM_BDTRInitTypeDef TIM_BDTRInitStructure;
TIM1->CNT = 0;
TIM2->CNT = 0;
TIM8->CNT = 0;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM8, ENABLE);
// Time Base configuration
TIM_TimeBaseStructure.TIM_Prescaler = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_CenterAligned1;
TIM_TimeBaseStructure.TIM_Period = (SYSTEM_CORE_CLOCK / f_sw);
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);
TIM_TimeBaseInit(TIM8, &TIM_TimeBaseStructure);
// Channel 1, 2 and 3 Configuration in PWM mode
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
TIM_OCInitStructure.TIM_Pulse = TIM1->ARR / 2;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High;
TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCNIdleState_Set;
TIM_OC1Init(TIM1, &TIM_OCInitStructure);
TIM_OC2Init(TIM1, &TIM_OCInitStructure);
TIM_OC3Init(TIM1, &TIM_OCInitStructure);
TIM_OC4Init(TIM1, &TIM_OCInitStructure);
TIM_OC1PreloadConfig(TIM1, TIM_OCPreload_Enable);
TIM_OC2PreloadConfig(TIM1, TIM_OCPreload_Enable);
TIM_OC3PreloadConfig(TIM1, TIM_OCPreload_Enable);
TIM_OC4PreloadConfig(TIM1, TIM_OCPreload_Enable);
TIM_OC1Init(TIM8, &TIM_OCInitStructure);
TIM_OC2Init(TIM8, &TIM_OCInitStructure);
TIM_OC3Init(TIM8, &TIM_OCInitStructure);
TIM_OC4Init(TIM8, &TIM_OCInitStructure);
TIM_OC1PreloadConfig(TIM8, TIM_OCPreload_Enable);
TIM_OC2PreloadConfig(TIM8, TIM_OCPreload_Enable);
TIM_OC3PreloadConfig(TIM8, TIM_OCPreload_Enable);
TIM_OC4PreloadConfig(TIM8, TIM_OCPreload_Enable);
// Automatic Output enable, Break, dead time and lock configuration
TIM_BDTRInitStructure.TIM_OSSRState = TIM_OSSRState_Enable;
TIM_BDTRInitStructure.TIM_OSSIState = TIM_OSSIState_Enable;
TIM_BDTRInitStructure.TIM_LOCKLevel = TIM_LOCKLevel_OFF;
TIM_BDTRInitStructure.TIM_DeadTime = conf_general_calculate_deadtime(HW_DEAD_TIME_NSEC, SYSTEM_CORE_CLOCK);
TIM_BDTRInitStructure.TIM_AutomaticOutput = TIM_AutomaticOutput_Disable;
#ifdef HW_USE_BRK
// Enable BRK function. Hardware will asynchronously stop any PWM activity upon an
// external fault signal. PWM outputs remain disabled until MCU is reset.
// software will catch the BRK flag to report the fault code
TIM_BDTRInitStructure.TIM_Break = TIM_Break_Enable;
TIM_BDTRInitStructure.TIM_BreakPolarity = TIM_BreakPolarity_Low;
#else
TIM_BDTRInitStructure.TIM_Break = TIM_Break_Disable;
TIM_BDTRInitStructure.TIM_BreakPolarity = TIM_BreakPolarity_High;
#endif
TIM_BDTRConfig(TIM1, &TIM_BDTRInitStructure);
TIM_CCPreloadControl(TIM1, ENABLE);
TIM_ARRPreloadConfig(TIM1, ENABLE);
TIM_BDTRConfig(TIM8, &TIM_BDTRInitStructure);
TIM_CCPreloadControl(TIM8, ENABLE);
TIM_ARRPreloadConfig(TIM8, ENABLE);
// ------------- Timer2 for ADC sampling ------------- //
// Time Base configuration
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
TIM_TimeBaseStructure.TIM_Prescaler = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseStructure.TIM_Period = 0xFFFF;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure);
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = 250;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High;
TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCNIdleState_Set;
TIM_OC1Init(TIM2, &TIM_OCInitStructure);
TIM_OC1PreloadConfig(TIM2, TIM_OCPreload_Enable);
TIM_OC2Init(TIM2, &TIM_OCInitStructure);
TIM_OC2PreloadConfig(TIM2, TIM_OCPreload_Enable);
TIM_OC3Init(TIM2, &TIM_OCInitStructure);
TIM_OC3PreloadConfig(TIM2, TIM_OCPreload_Enable);
TIM_ARRPreloadConfig(TIM2, ENABLE);
TIM_CCPreloadControl(TIM2, ENABLE);
// PWM outputs have to be enabled in order to trigger ADC on CCx
TIM_CtrlPWMOutputs(TIM2, ENABLE);
// TIM1 Master and TIM8 slave
#if defined HW_HAS_DUAL_MOTORS || defined HW_HAS_DUAL_PARALLEL
// TODO: Explain. See: https://www.cnblogs.com/shangdawei/p/4758988.html
TIM_SelectOutputTrigger(TIM1, TIM_TRGOSource_Enable);
TIM_SelectMasterSlaveMode(TIM1, TIM_MasterSlaveMode_Enable);
TIM_SelectInputTrigger(TIM8, TIM_TS_ITR0);
TIM_SelectSlaveMode(TIM8, TIM_SlaveMode_Trigger);
TIM_SelectOutputTrigger(TIM8, TIM_TRGOSource_Enable);
TIM_SelectOutputTrigger(TIM8, TIM_TRGOSource_Update);
TIM_SelectInputTrigger(TIM2, TIM_TS_ITR1);
TIM_SelectSlaveMode(TIM2, TIM_SlaveMode_Reset);
#else
TIM_SelectOutputTrigger(TIM1, TIM_TRGOSource_Update);
TIM_SelectMasterSlaveMode(TIM1, TIM_MasterSlaveMode_Enable);
TIM_SelectInputTrigger(TIM2, TIM_TS_ITR0);
TIM_SelectSlaveMode(TIM2, TIM_SlaveMode_Reset);
#endif
// Enable TIM1 and TIM2
#ifdef HW_HAS_DUAL_MOTORS
TIM8->CNT = TIM1->ARR;
#else
TIM8->CNT = 0;
#endif
TIM1->CNT = 0;
TIM_Cmd(TIM1, ENABLE);
TIM_Cmd(TIM2, ENABLE);
// Prevent all low side FETs from switching on
stop_pwm_hw(&m_motor_1);
#ifdef HW_HAS_DUAL_MOTORS
stop_pwm_hw(&m_motor_2);
#endif
// Main Output Enable
TIM_CtrlPWMOutputs(TIM1, ENABLE);
TIM_CtrlPWMOutputs(TIM8, ENABLE);
// Sample intervals
TIMER_UPDATE_SAMP(MCPWM_FOC_CURRENT_SAMP_OFFSET);
// Enable CC2 interrupt, which will be fired in V0 and V7
TIM_ITConfig(TIM2, TIM_IT_CC2, ENABLE);
utils_sys_unlock_cnt();
nvicEnableVector(TIM2_IRQn, 6);
}
void mcpwm_foc_init(volatile mc_configuration *conf_m1, volatile mc_configuration *conf_m2) {
utils_sys_lock_cnt();
#ifndef HW_HAS_DUAL_MOTORS
(void)conf_m2;
#endif
m_init_done = false;
// Initialize variables
memset((void*)&m_motor_1, 0, sizeof(motor_all_state_t));
m_isr_motor = 0;
m_motor_1.m_conf = conf_m1;
m_motor_1.m_state = MC_STATE_OFF;
m_motor_1.m_control_mode = CONTROL_MODE_NONE;
m_motor_1.m_hall_dt_diff_last = 1.0;
#ifdef HW_HAS_DUAL_PARALLEL
m_motor_1.m_curr_ofs[0] = 4096;
m_motor_1.m_curr_ofs[1] = 4096;
m_motor_1.m_curr_ofs[2] = 4096;
#else
m_motor_1.m_curr_ofs[0] = 2048;
m_motor_1.m_curr_ofs[1] = 2048;
m_motor_1.m_curr_ofs[2] = 2048;
#endif
update_hfi_samples(m_motor_1.m_conf->foc_hfi_samples, &m_motor_1);
#ifdef HW_HAS_DUAL_MOTORS
memset((void*)&m_motor_2, 0, sizeof(motor_all_state_t));
m_motor_2.m_conf = conf_m2;
m_motor_2.m_state = MC_STATE_OFF;
m_motor_2.m_control_mode = CONTROL_MODE_NONE;
m_motor_2.m_hall_dt_diff_last = 1.0;
m_motor_2.m_curr_ofs[0] = 2048;
m_motor_2.m_curr_ofs[1] = 2048;
m_motor_2.m_curr_ofs[2] = 2048;
update_hfi_samples(m_motor_2.m_conf->foc_hfi_samples, &m_motor_2);
#endif
virtual_motor_init();
TIM_DeInit(TIM1);
TIM_DeInit(TIM2);
TIM_DeInit(TIM8);
TIM1->CNT = 0;
TIM2->CNT = 0;
TIM8->CNT = 0;
// ADC
ADC_CommonInitTypeDef ADC_CommonInitStructure;
DMA_InitTypeDef DMA_InitStructure;
ADC_InitTypeDef ADC_InitStructure;
// Clock
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2 | RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOC, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2 | RCC_APB2Periph_ADC3, ENABLE);
dmaStreamAllocate(STM32_DMA_STREAM(STM32_DMA_STREAM_ID(2, 4)),
5,
(stm32_dmaisr_t)mcpwm_foc_adc_int_handler,
(void *)0);
// DMA for the ADC
DMA_InitStructure.DMA_Channel = DMA_Channel_0;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&ADC_Value;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&ADC->CDR;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = HW_ADC_CHANNELS;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA2_Stream4, &DMA_InitStructure);
DMA_Cmd(DMA2_Stream4, ENABLE);
DMA_ITConfig(DMA2_Stream4, DMA_IT_TC, ENABLE);
// ADC Common Init
// Note that the ADC is running at 42MHz, which is higher than the
// specified 36MHz in the data sheet, but it works.
ADC_CommonInitStructure.ADC_Mode = ADC_TripleMode_RegSimult;
ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2;
ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_1;
ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;
ADC_CommonInit(&ADC_CommonInitStructure);
// Channel-specific settings
ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
ADC_InitStructure.ADC_ScanConvMode = ENABLE;
ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_Falling;
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T2_CC2;
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NbrOfConversion = HW_ADC_NBR_CONV;
ADC_Init(ADC1, &ADC_InitStructure);
ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;
ADC_InitStructure.ADC_ExternalTrigConv = 0;
ADC_Init(ADC2, &ADC_InitStructure);
ADC_Init(ADC3, &ADC_InitStructure);
ADC_TempSensorVrefintCmd(ENABLE);
ADC_MultiModeDMARequestAfterLastTransferCmd(ENABLE);
hw_setup_adc_channels();
ADC_Cmd(ADC1, ENABLE);
ADC_Cmd(ADC2, ENABLE);
ADC_Cmd(ADC3, ENABLE);
timer_reinit((int)m_motor_1.m_conf->foc_f_sw);
stop_pwm_hw(&m_motor_1);
#ifdef HW_HAS_DUAL_MOTORS
stop_pwm_hw(&m_motor_2);
#endif
// Sample intervals. For now they are fixed with voltage samples in the center of V7
// and current samples in the center of V0
TIMER_UPDATE_SAMP(MCPWM_FOC_CURRENT_SAMP_OFFSET);
// Enable CC2 interrupt, which will be fired in V0 and V7
TIM_ITConfig(TIM2, TIM_IT_CC2, ENABLE);
nvicEnableVector(TIM2_IRQn, 6);
utils_sys_unlock_cnt();
CURRENT_FILTER_ON();
// Calibrate current offset
ENABLE_GATE();
DCCAL_OFF();
do_dc_cal();
// Start threads
timer_thd_stop = false;
chThdCreateStatic(timer_thread_wa, sizeof(timer_thread_wa), NORMALPRIO, timer_thread, NULL);
hfi_thd_stop = false;
chThdCreateStatic(hfi_thread_wa, sizeof(hfi_thread_wa), NORMALPRIO, hfi_thread, NULL);
// Check if the system has resumed from IWDG reset
if (timeout_had_IWDG_reset()) {
mc_interface_fault_stop(FAULT_CODE_BOOTING_FROM_WATCHDOG_RESET, false, false);
}
terminal_register_command_callback(
"foc_plot_hfi_en",
"Enable HFI plotting. 0: off, 1: DFT, 2: Raw",
"[en]",
terminal_plot_hfi);
m_init_done = true;
}
void mcpwm_foc_deinit(void) {
if (!m_init_done) {
return;
}
m_init_done = false;
timer_thd_stop = true;
while (timer_thd_stop) {
chThdSleepMilliseconds(1);
}
hfi_thd_stop = true;
while (hfi_thd_stop) {
chThdSleepMilliseconds(1);
}
TIM_DeInit(TIM1);
TIM_DeInit(TIM2);
TIM_DeInit(TIM8);
ADC_DeInit();
DMA_DeInit(DMA2_Stream4);
nvicDisableVector(ADC_IRQn);
dmaStreamRelease(STM32_DMA_STREAM(STM32_DMA_STREAM_ID(2, 4)));
}
static volatile motor_all_state_t *motor_now(void) {
#ifdef HW_HAS_DUAL_MOTORS
return mc_interface_motor_now() == 1 ? &m_motor_1 : &m_motor_2;
#else
return &m_motor_1;
#endif
}
bool mcpwm_foc_init_done(void) {
return m_init_done;
}
void mcpwm_foc_set_configuration(volatile mc_configuration *configuration) {
motor_now()->m_conf = configuration;
// Below we check if anything in the configuration changed that requires stopping the motor.
uint32_t top = SYSTEM_CORE_CLOCK / (int)configuration->foc_f_sw;
if (TIM1->ARR != top) {
#ifdef HW_HAS_DUAL_MOTORS
m_motor_1.m_control_mode = CONTROL_MODE_NONE;
m_motor_1.m_state = MC_STATE_OFF;
stop_pwm_hw(&m_motor_1);
m_motor_2.m_control_mode = CONTROL_MODE_NONE;
m_motor_2.m_state = MC_STATE_OFF;
stop_pwm_hw(&m_motor_2);
timer_reinit((int)configuration->foc_f_sw);
#else
motor_now()->m_control_mode = CONTROL_MODE_NONE;
motor_now()->m_state = MC_STATE_OFF;
stop_pwm_hw(motor_now());
TIMER_UPDATE_SAMP_TOP_M1(MCPWM_FOC_CURRENT_SAMP_OFFSET, top);
#ifdef HW_HAS_DUAL_PARALLEL
TIMER_UPDATE_SAMP_TOP_M2(MCPWM_FOC_CURRENT_SAMP_OFFSET, top);
#endif
#endif
}
if (((1 << motor_now()->m_conf->foc_hfi_samples) * 8) != motor_now()->m_hfi.samples) {
motor_now()->m_control_mode = CONTROL_MODE_NONE;
motor_now()->m_state = MC_STATE_OFF;
stop_pwm_hw(motor_now());
update_hfi_samples(motor_now()->m_conf->foc_hfi_samples, motor_now());
}
}
mc_state mcpwm_foc_get_state(void) {
return motor_now()->m_state;
}
bool mcpwm_foc_is_dccal_done(void) {
return m_dccal_done;
}
/**
* Get the current motor used in the mcpwm ISR
*
* @return
* 0: Not in ISR
* 1: Motor 1
* 2: Motor 2
*/
int mcpwm_foc_isr_motor(void) {
return m_isr_motor;
}
/**
* Switch off all FETs.
*/
void mcpwm_foc_stop_pwm(bool is_second_motor) {
#ifdef HW_HAS_DUAL_MOTORS
volatile motor_all_state_t *motor = is_second_motor ? &m_motor_2 : &m_motor_1;
#else
(void)is_second_motor;
volatile motor_all_state_t *motor = &m_motor_1;
#endif
motor->m_control_mode = CONTROL_MODE_NONE;
motor->m_state = MC_STATE_OFF;
stop_pwm_hw(motor);
}
/**
* Use duty cycle control. Absolute values less than MCPWM_MIN_DUTY_CYCLE will
* stop the motor.
*
* @param dutyCycle
* The duty cycle to use.
*/
void mcpwm_foc_set_duty(float dutyCycle) {
motor_now()->m_control_mode = CONTROL_MODE_DUTY;
motor_now()->m_duty_cycle_set = dutyCycle;
if (motor_now()->m_state != MC_STATE_RUNNING) {
motor_now()->m_state = MC_STATE_RUNNING;
}
}
/**
* Use duty cycle control. Absolute values less than MCPWM_MIN_DUTY_CYCLE will
* stop the motor.
*
* WARNING: This function does not use ramping. A too large step with a large motor
* can destroy hardware.
*
* @param dutyCycle
* The duty cycle to use.
*/
void mcpwm_foc_set_duty_noramp(float dutyCycle) {
// TODO: Actually do this without ramping
mcpwm_foc_set_duty(dutyCycle);
}
/**
* Use PID rpm control. Note that this value has to be multiplied by half of
* the number of motor poles.
*
* @param rpm
* The electrical RPM goal value to use.
*/
void mcpwm_foc_set_pid_speed(float rpm) {
motor_now()->m_control_mode = CONTROL_MODE_SPEED;
motor_now()->m_speed_pid_set_rpm = rpm;
if (motor_now()->m_state != MC_STATE_RUNNING) {
motor_now()->m_state = MC_STATE_RUNNING;
}
}
/**
* Use PID position control. Note that this only works when encoder support
* is enabled.
*
* @param pos
* The desired position of the motor in degrees.
*/
void mcpwm_foc_set_pid_pos(float pos) {
motor_now()->m_control_mode = CONTROL_MODE_POS;
motor_now()->m_pos_pid_set = pos;
if (motor_now()->m_state != MC_STATE_RUNNING) {
motor_now()->m_state = MC_STATE_RUNNING;
}
}
/**
* Use current control and specify a goal current to use. The sign determines
* the direction of the torque. Absolute values less than
* conf->cc_min_current will release the motor.
*
* @param current
* The current to use.
*/
void mcpwm_foc_set_current(float current) {
if (fabsf(current) < motor_now()->m_conf->cc_min_current) {
motor_now()->m_control_mode = CONTROL_MODE_NONE;
motor_now()->m_state = MC_STATE_OFF;
stop_pwm_hw(motor_now());
return;
}
motor_now()->m_control_mode = CONTROL_MODE_CURRENT;
motor_now()->m_iq_set = current;
if (motor_now()->m_state != MC_STATE_RUNNING) {
motor_now()->m_state = MC_STATE_RUNNING;
}
}
/**
* Brake the motor with a desired current. Absolute values less than
* conf->cc_min_current will release the motor.
*
* @param current
* The current to use. Positive and negative values give the same effect.
*/
void mcpwm_foc_set_brake_current(float current) {
if (fabsf(current) < motor_now()->m_conf->cc_min_current) {
motor_now()->m_control_mode = CONTROL_MODE_NONE;
motor_now()->m_state = MC_STATE_OFF;
stop_pwm_hw(motor_now());
return;
}
motor_now()->m_control_mode = CONTROL_MODE_CURRENT_BRAKE;
motor_now()->m_iq_set = current;
if (motor_now()->m_state != MC_STATE_RUNNING) {
motor_now()->m_state = MC_STATE_RUNNING;
}
}
/**
* Apply a fixed static current vector in open loop to emulate an electric
* handbrake.
*
* @param current
* The brake current to use.
*/
void mcpwm_foc_set_handbrake(float current) {
if (fabsf(current) < motor_now()->m_conf->cc_min_current) {
motor_now()->m_control_mode = CONTROL_MODE_NONE;
motor_now()->m_state = MC_STATE_OFF;
stop_pwm_hw(motor_now());
return;
}
motor_now()->m_control_mode = CONTROL_MODE_HANDBRAKE;
motor_now()->m_iq_set = current;
if (motor_now()->m_state != MC_STATE_RUNNING) {
motor_now()->m_state = MC_STATE_RUNNING;
}
}
/**
* Produce an openloop rotating current.
*
* @param current
* The current to use.
*
* @param rpm
* The RPM to use.
*/
void mcpwm_foc_set_openloop(float current, float rpm) {
if (fabsf(current) < motor_now()->m_conf->cc_min_current) {
motor_now()->m_control_mode = CONTROL_MODE_NONE;
motor_now()->m_state = MC_STATE_OFF;
stop_pwm_hw(motor_now());
return;
}
utils_truncate_number(¤t, -motor_now()->m_conf->l_current_max * motor_now()->m_conf->l_current_max_scale,
motor_now()->m_conf->l_current_max * motor_now()->m_conf->l_current_max_scale);
motor_now()->m_control_mode = CONTROL_MODE_OPENLOOP;
motor_now()->m_iq_set = current;
motor_now()->m_openloop_speed = rpm * ((2.0 * M_PI) / 60.0);
if (motor_now()->m_state != MC_STATE_RUNNING) {
motor_now()->m_state = MC_STATE_RUNNING;
}
}
/**
* Produce an openloop current at a fixed phase.
*
* @param current
* The current to use.
*
* @param phase
* The phase to use in degrees, range [0.0 360.0]
*/
void mcpwm_foc_set_openloop_phase(float current, float phase) {
if (fabsf(current) < motor_now()->m_conf->cc_min_current) {
motor_now()->m_control_mode = CONTROL_MODE_NONE;
motor_now()->m_state = MC_STATE_OFF;
stop_pwm_hw(motor_now());
return;
}
utils_truncate_number(¤t, -motor_now()->m_conf->l_current_max * motor_now()->m_conf->l_current_max_scale,
motor_now()->m_conf->l_current_max * motor_now()->m_conf->l_current_max_scale);
motor_now()->m_control_mode = CONTROL_MODE_OPENLOOP_PHASE;
motor_now()->m_iq_set = current;
motor_now()->m_openloop_phase = phase * M_PI / 180.0;
utils_norm_angle_rad((float*)&motor_now()->m_openloop_phase);
if (motor_now()->m_state != MC_STATE_RUNNING) {
motor_now()->m_state = MC_STATE_RUNNING;
}
}
/**
* Set current offsets values,
* this is used by the virtual motor to set the previously saved offsets back,
* when it is disconnected
*/
void mcpwm_foc_set_current_offsets(volatile int curr0_offset,
volatile int curr1_offset,
volatile int curr2_offset) {
motor_now()->m_curr_ofs[0] = curr0_offset;
motor_now()->m_curr_ofs[1] = curr1_offset;
motor_now()->m_curr_ofs[2] = curr2_offset;
}
/**
* Produce an openloop rotating voltage.
*
* @param dutyCycle
* The duty cycle to use.
*
* @param rpm
* The RPM to use.
*/
void mcpwm_foc_set_openloop_duty(float dutyCycle, float rpm) {
motor_now()->m_control_mode = CONTROL_MODE_OPENLOOP_DUTY;
motor_now()->m_duty_cycle_set = dutyCycle;
motor_now()->m_openloop_speed = rpm * ((2.0 * M_PI) / 60.0);
if (motor_now()->m_state != MC_STATE_RUNNING) {
motor_now()->m_state = MC_STATE_RUNNING;
}
}
/**
* Produce an openloop voltage at a fixed phase.
*
* @param dutyCycle
* The duty cycle to use.
*
* @param phase
* The phase to use in degrees, range [0.0 360.0]
*/
void mcpwm_foc_set_openloop_duty_phase(float dutyCycle, float phase) {
motor_now()->m_control_mode = CONTROL_MODE_OPENLOOP_DUTY_PHASE;
motor_now()->m_duty_cycle_set = dutyCycle;
motor_now()->m_openloop_phase = phase * M_PI / 180.0;
utils_norm_angle_rad((float*)&motor_now()->m_openloop_phase);