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ppc64le support
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‎.github/workflows/unit-tests.yaml

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@@ -179,6 +179,7 @@ jobs:
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arch:
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- s390x
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- riscv64
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- ppc64le
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steps:
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- name: Checkout Fluent Bit code
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uses: actions/checkout@v4

‎CMakeLists.txt

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@@ -316,6 +316,11 @@ if (FLB_SYSTEM_MACOS)
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include(cmake/macos-setup.cmake)
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endif()
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# Tweak build targets for Linux on ppc64le
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if (FLB_SYSTEM_LINUX)
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include(cmake/ppc64le.cmake)
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endif ()
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# Build for SystemZ - s390x arch
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if (FLB_SYSTEM_LINUX)
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include(cmake/s390x.cmake)

‎README.md

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@@ -104,6 +104,10 @@ Fluent Bit is fully supported on Windows environments, get started with [these i
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Fluent Bit runs on Linux on IBM Z(s390x), but the WASM filter plugin is not. For the LUA filter plugin, it runs when `libluajit` is installed on the system and fluent bit is built with `FLB_LUAJIT` and `FLB_PREFER_SYSTEM_LIB_LUAJIT` on.
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#### Running on ppc64le
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Fluent Bit runs on Linux on IBM Power(ppc64le), but the WASM filter plugin and the LUA filter plugin do not.
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### Plugins: Inputs, Filters and Outputs
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[Fluent Bit](http://fluentbit.io) is based in a pluggable architecture where different plugins plays a major role in the data pipeline:

‎cmake/ppc64le.cmake

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if(CMAKE_SYSTEM_PROCESSOR MATCHES "^(powerpc|ppc)64le")
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message(STATUS "Forcing characters to be signed, as on x86_64.")
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set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -fsigned-char")
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message(STATUS "This platform does not support WAMR building so disabled.")
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set(FLB_WASM OFF)
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message(STATUS "This platform does not support LuaJIT so disabled.")
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set(FLB_LUAJIT OFF)
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endif ()

‎dockerfiles/Dockerfile

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@@ -10,7 +10,7 @@
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# docker buildx rm builder
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# docker buildx create --name builder --use
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# docker buildx inspect --bootstrap
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# docker buildx build --platform "linux/amd64,linux/arm64,linux/arm/v7,linux/s390x" -f ./dockerfiles/Dockerfile.multiarch --build-arg FLB_TARBALL=https://github.com/fluent/fluent-bit/archive/v1.8.11.tar.gz ./dockerfiles/
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# docker buildx build --platform "linux/amd64,linux/arm64,linux/arm/v7,linux/s390x,linux/ppc64le" -f ./dockerfiles/Dockerfile.multiarch --build-arg FLB_TARBALL=https://github.com/fluent/fluent-bit/archive/v1.8.11.tar.gz ./dockerfiles/
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# Set this to the current release version: it gets done so as part of the release.
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ARG RELEASE_VERSION=3.2.4

‎dockerfiles/README.md

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@@ -40,7 +40,7 @@ docker buildx inspect --bootstrap
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```
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4. Build Fluent Bit from the **root of the Git repo (not from this directory)**:
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```
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docker buildx build --platform "linux/amd64,linux/arm64,linux/arm/v7,linux/s390x" --target=production -f dockerfiles/Dockerfile .
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docker buildx build --platform "linux/amd64,linux/arm64,linux/arm/v7,linux/s390x,linux/ppc64le" --target=production -f dockerfiles/Dockerfile .
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```
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## Build and test

‎lib/monkey/deps/flb_libco/libco.c

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@@ -16,8 +16,9 @@
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#include "arm.c"
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#elif defined(__aarch64__)
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#include "aarch64.c"
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#elif defined(_ARCH_PPC)
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#include "ppc.c"
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#elif defined(__powerpc64__) && defined(_CALL_ELF) && _CALL_ELF == 2
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#include "ppc64le.c"
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#elif defined(_ARCH_PPC) && !defined(__LITTLE_ENDIAN__) #include "ppc.c"
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#elif defined(_WIN32)
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#include "fiber.c"
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#else

‎lib/monkey/deps/flb_libco/ppc64le.c

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/*
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libco.ppc (2016-09-14)
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author: blargg
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license: public domain
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*/
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#define LIBCO_C
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#include "libco.h"
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#include "settings.h"
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#include <stdlib.h>
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#include <stdint.h>
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#include <string.h>
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/* state format (offsets in 32-bit words)
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+0 pointer to swap code
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rest of function descriptor for entry function
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+8 PC
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+10 SP
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special registers
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GPRs
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FPRs
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VRs
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stack
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*/
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enum { state_size = 1024 };
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enum { above_stack = 2048 };
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enum { stack_align = 256 };
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static thread_local cothread_t co_active_handle = 0;
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/* determine environment */
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#define LIBCO_PPC64 (_ARCH_PPC64 || __PPC64__ || __ppc64__ || __powerpc64__)
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text_section
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static const uint32_t libco_ppc_code[1024] = {
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0xf8240008, /* std r1, 8(4) */
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0xf8440010, /* std r2, 16(4) */
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0xf9840060, /* std r12, 96(4) */
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0xf9a40068, /* std r13, 104(4) */
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0xf9c40070, /* std r14, 112(4) */
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0xf9e40078, /* std r15, 120(4) */
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0xfa040080, /* std r16, 128(4) */
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0xfa240088, /* std r17, 136(4) */
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0xfa440090, /* std r18, 144(4) */
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0xfa640098, /* std r19, 152(4) */
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0xfa8400a0, /* std r20, 160(4) */
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0xfaa400a8, /* std r21, 168(4) */
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0xfac400b0, /* std r22, 176(4) */
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0xfae400b8, /* std r23, 184(4) */
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0xfb0400c0, /* std r24, 192(4) */
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0xfb2400c8, /* std r25, 200(4) */
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0xfb4400d0, /* std r26, 208(4) */
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0xfb6400d8, /* std r27, 216(4) */
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0xfb8400e0, /* std r28, 224(4) */
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0xfba400e8, /* std r29, 232(4) */
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0xfbc400f0, /* std r30, 240(4) */
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0xfbe400f8, /* std r31, 248(4) */
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0x7ca802a6, /* mflr r5 */
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0xf8a40100, /* std r5, 256(4) */
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0x7ca00026, /* mfcr r5 */
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0xf8a40108, /* std r5, 264(4) */
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0xe8230008, /* ld r1, 8(3) */
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0xe8430010, /* ld r2, 16(3) */
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0xe9830060, /* ld r12, 96(3) */
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0xe9a30068, /* ld r13, 104(3) */
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0xe9c30070, /* ld r14, 112(3) */
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0xe9e30078, /* ld r15, 120(3) */
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0xea030080, /* ld r16, 128(3) */
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0xea230088, /* ld r17, 136(3) */
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0xea430090, /* ld r18, 144(3) */
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0xea630098, /* ld r19, 152(3) */
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0xea8300a0, /* ld r20, 160(3) */
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0xeaa300a8, /* ld r21, 168(3) */
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0xeac300b0, /* ld r22, 176(3) */
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0xeae300b8, /* ld r23, 184(3) */
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0xeb0300c0, /* ld r24, 192(3) */
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0xeb2300c8, /* ld r25, 200(3) */
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0xeb4300d0, /* ld r26, 208(3) */
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0xeb6300d8, /* ld r27, 216(3) */
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0xeb8300e0, /* ld r28, 224(3) */
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0xeba300e8, /* ld r29, 232(3) */
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0xebc300f0, /* ld r30, 240(3) */
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0xebe300f8, /* ld r31, 248(3) */
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0xe8a30100, /* ld r5, 256(3) */
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0x7ca803a6, /* mtlr r5 */
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0xe8a30108, /* ld r5, 264(3) */
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0x7caff120, /* mtcr r5 */
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#ifndef LIBCO_PPC_NOFP
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0xd9c40180, /* stfd r14, 384(4) */
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0xd9e40188, /* stfd r15, 392(4) */
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0xda040190, /* stfd r16, 400(4) */
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0xda240198, /* stfd r17, 408(4) */
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0xda4401a0, /* stfd r18, 416(4) */
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0xda6401a8, /* stfd r19, 424(4) */
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0xda8401b0, /* stfd r20, 432(4) */
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0xdaa401b8, /* stfd r21, 440(4) */
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0xdac401c0, /* stfd r22, 448(4) */
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0xdae401c8, /* stfd r23, 456(4) */
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0xdb0401d0, /* stfd r24, 464(4) */
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0xdb2401d8, /* stfd r25, 472(4) */
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0xdb4401e0, /* stfd r26, 480(4) */
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0xdb6401e8, /* stfd r27, 488(4) */
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0xdb8401f0, /* stfd r28, 496(4) */
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0xdba401f8, /* stfd r29, 504(4) */
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0xdbc40200, /* stfd r30, 512(4) */
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0xdbe40208, /* stfd r31, 520(4) */
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0xc9c30180, /* lfd r14, 384(3) */
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0xc9e30188, /* lfd r15, 392(3) */
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0xca030190, /* lfd r16, 400(3) */
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0xca230198, /* lfd r17, 408(3) */
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0xca4301a0, /* lfd r18, 416(3) */
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0xca6301a8, /* lfd r19, 424(3) */
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0xca8301b0, /* lfd r20, 432(3) */
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0xcaa301b8, /* lfd r21, 440(3) */
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0xcac301c0, /* lfd r22, 448(3) */
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0xcae301c8, /* lfd r23, 456(3) */
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0xcb0301d0, /* lfd r24, 464(3) */
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0xcb2301d8, /* lfd r25, 472(3) */
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0xcb4301e0, /* lfd r26, 480(3) */
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0xcb6301e8, /* lfd r27, 488(3) */
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0xcb8301f0, /* lfd r28, 496(3) */
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0xcba301f8, /* lfd r29, 504(3) */
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0xcbc30200, /* lfd r30, 512(3) */
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0xcbe30208, /* lfd r31, 520(3) */
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#endif
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#ifdef __ALTIVEC__
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0x38a00210, /* li r5, 528 */
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0x7e842bce, /* stvxl v20, r4, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7ea42bce, /* stvxl v21, r4, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7ec42bce, /* stvxl v22, r4, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7ee42bce, /* stvxl v23, r4, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7f042bce, /* stvxl v24, r4, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7f242bce, /* stvxl v25, r4, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7f442bce, /* stvxl v26, r4, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7f642bce, /* stvxl v27, r4, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7f842bce, /* stvxl v28, r4, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7fa42bce, /* stvxl v29, r4, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7fc42bce, /* stvxl v30, r4, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7fe42bce, /* stvxl v31, r4, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7ca042a6, /* mfvrsave r5 */
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0x90a402e0, /* stw r5, 736(4) */
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0x38a00210, /* li r5, 528 */
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0x7e832ace, /* lvxl v20, r3, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7ea32ace, /* lvxl v21, r3, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7ec32ace, /* lvxl v22, r3, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7ee32ace, /* lvxl v23, r3, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7f032ace, /* lvxl v24, r3, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7f232ace, /* lvxl v25, r3, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7f432ace, /* lvxl v26, r3, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7f632ace, /* lvxl v27, r3, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7f832ace, /* lvxl v28, r3, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7fa32ace, /* lvxl v29, r3, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7fc32ace, /* lvxl v30, r3, r5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x7fe32ace, /* lvxl v31, r3, 5 */
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0x38a50010, /* addi r5, r5, 16 */
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0x80a302d0, /* lwz r5, 720(3) */
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0x7ca043a6, /* mtvrsave r5 */
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#endif
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188+
0x4e800020 /* blr */
189+
};
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/* function call goes directly to code */
192+
#define CO_SWAP_ASM(x, y) ((void (*)(cothread_t, cothread_t))(uintptr_t)libco_ppc_code)(x, y)
193+
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cothread_t co_active() {
195+
if(!co_active_handle) co_active_handle = (uint64_t*)malloc(state_size);
196+
return co_active_handle;
197+
}
198+
199+
cothread_t co_create(unsigned int size, void (*entry_)(void),
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size_t *out_size) {
201+
202+
uintptr_t entry = (uintptr_t)entry_;
203+
uint64_t* t = 0;
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uintptr_t sp;
205+
int shift;
206+
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/* be sure main thread was successfully allocated */
208+
if(co_active()) {
209+
size += state_size + above_stack + stack_align;
210+
t = (uint64_t*)malloc(size);
211+
}
212+
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if(t) {
214+
/* save current registers into new thread, so that any special ones will have proper values when thread is begun */
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CO_SWAP_ASM(t, t);
216+
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/* put stack near end of block, and align */
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sp = (uintptr_t)t + size - above_stack;
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sp -= sp % stack_align;
220+
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/* set up sp and entry will be called on next swap */
222+
t[1] = (uint64_t)sp;
223+
t[12] = (uint64_t)entry;
224+
t[32] = (uint64_t)entry;
225+
}
226+
*out_size = size;
227+
return t;
228+
}
229+
230+
void co_delete(cothread_t t) {
231+
free(t);
232+
}
233+
234+
void co_switch(cothread_t t) {
235+
cothread_t old = co_active_handle;
236+
co_active_handle = t;
237+
238+
CO_SWAP_ASM(t, old);
239+
}

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