ref_designs

Intel® FPGA Partial Reconfiguration Reference Designs

This directory contains reference designs related to the Intel FPGA Partial Reconfiguration design flow.

Table of Contents

• Arria 10 PCIe Devkit PR over PCIe Reference Design - Traditional PR reference design
• Arria 10 PCIe Devkit HPR over PCIe Reference Design - Hierarchical PR (HPR) reference design
• Stratix 10 PCIe Devkit PR over PCIe Reference Design - Traditional PR reference design
• Stratix 10 PCIe Devkit HPR over PCIe Reference Design - Hierarchical PR (HPR) reference design