diff --git a/src/4.x/drivers/net/ethernet/realtek/r8125/Makefile b/src/4.x/drivers/net/ethernet/realtek/r8125/Makefile
old mode 100644
new mode 100755
index 0eb6ffe17..10a002a36
--- a/src/4.x/drivers/net/ethernet/realtek/r8125/Makefile
+++ b/src/4.x/drivers/net/ethernet/realtek/r8125/Makefile
@@ -1,9 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0-only
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# controllers with PCI-Express interface.
#
-# Copyright(c) 2018 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@@ -30,27 +31,44 @@
################################################################################
CONFIG_SOC_LAN = n
+ENABLE_REALWOW_SUPPORT = n
ENABLE_DASH_SUPPORT = n
ENABLE_DASH_PRINTER_SUPPORT = n
CONFIG_DOWN_SPEED_100 = n
CONFIG_ASPM = y
ENABLE_S5WOL = y
ENABLE_S5_KEEP_CURR_MAC = n
-ENABLE_EEE = n
+ENABLE_EEE = y
ENABLE_S0_MAGIC_PACKET = n
+ENABLE_TX_NO_CLOSE = y
+ENABLE_MULTIPLE_TX_QUEUE = n
+ENABLE_PTP_SUPPORT = n
+ENABLE_PTP_MASTER_MODE = n
+ENABLE_RSS_SUPPORT = n
+ENABLE_LIB_SUPPORT = n
+ENABLE_USE_FIRMWARE_FILE = n
+DISABLE_PM_SUPPORT = n
+DISABLE_MULTI_MSIX_VECTOR = n
+ENABLE_DOUBLE_VLAN = n
+ENABLE_PAGE_REUSE = n
+ENABLE_RX_PACKET_FRAGMENT = n
ifneq ($(KERNELRELEASE),)
- obj-$(CONFIG_R8125) := r8125.o
+ obj-m := r8125.o
r8125-objs := r8125_n.o rtl_eeprom.o rtltool.o
ifeq ($(CONFIG_SOC_LAN), y)
EXTRA_CFLAGS += -DCONFIG_SOC_LAN
endif
+ ifeq ($(ENABLE_REALWOW_SUPPORT), y)
+ r8125-objs += r8125_realwow.o
+ EXTRA_CFLAGS += -DENABLE_REALWOW_SUPPORT
+ endif
ifeq ($(ENABLE_DASH_SUPPORT), y)
- r8125-objs += r8125_dash.o
+ r8125-objs += r8125_dash.o
EXTRA_CFLAGS += -DENABLE_DASH_SUPPORT
endif
ifeq ($(ENABLE_DASH_PRINTER_SUPPORT), y)
- r8125-objs += r8125_dash.o
+ r8125-objs += r8125_dash.o
EXTRA_CFLAGS += -DENABLE_DASH_SUPPORT -DENABLE_DASH_PRINTER_SUPPORT
endif
EXTRA_CFLAGS += -DCONFIG_R8125_NAPI
@@ -73,6 +91,46 @@ ifneq ($(KERNELRELEASE),)
ifeq ($(ENABLE_S0_MAGIC_PACKET), y)
EXTRA_CFLAGS += -DENABLE_S0_MAGIC_PACKET
endif
+ ifeq ($(ENABLE_TX_NO_CLOSE), y)
+ EXTRA_CFLAGS += -DENABLE_TX_NO_CLOSE
+ endif
+ ifeq ($(ENABLE_MULTIPLE_TX_QUEUE), y)
+ EXTRA_CFLAGS += -DENABLE_MULTIPLE_TX_QUEUE
+ endif
+ ifeq ($(ENABLE_PTP_SUPPORT), y)
+ r8125-objs += r8125_ptp.o
+ EXTRA_CFLAGS += -DENABLE_PTP_SUPPORT
+ endif
+ ifeq ($(ENABLE_PTP_MASTER_MODE), y)
+ EXTRA_CFLAGS += -DENABLE_PTP_MASTER_MODE
+ endif
+ ifeq ($(ENABLE_RSS_SUPPORT), y)
+ r8125-objs += r8125_rss.o
+ EXTRA_CFLAGS += -DENABLE_RSS_SUPPORT
+ endif
+ ifeq ($(ENABLE_LIB_SUPPORT), y)
+ r8125-objs += r8125_lib.o
+ EXTRA_CFLAGS += -DENABLE_LIB_SUPPORT
+ endif
+ ifeq ($(ENABLE_USE_FIRMWARE_FILE), y)
+ r8125-objs += r8125_firmware.o
+ EXTRA_CFLAGS += -DENABLE_USE_FIRMWARE_FILE
+ endif
+ ifeq ($(DISABLE_PM_SUPPORT), y)
+ EXTRA_CFLAGS += -DDISABLE_PM_SUPPORT
+ endif
+ ifeq ($(DISABLE_MULTI_MSIX_VECTOR), y)
+ EXTRA_CFLAGS += -DDISABLE_MULTI_MSIX_VECTOR
+ endif
+ ifeq ($(ENABLE_DOUBLE_VLAN), y)
+ EXTRA_CFLAGS += -DENABLE_DOUBLE_VLAN
+ endif
+ ifeq ($(ENABLE_PAGE_REUSE), y)
+ EXTRA_CFLAGS += -DENABLE_PAGE_REUSE
+ endif
+ ifeq ($(ENABLE_RX_PACKET_FRAGMENT), y)
+ EXTRA_CFLAGS += -DENABLE_RX_PACKET_FRAGMENT
+ endif
else
BASEDIR := /lib/modules/$(shell uname -r)
KERNELDIR ?= $(BASEDIR)/build
@@ -86,19 +144,66 @@ else
endif
RTKDIR := $(subst $(BASEDIR)/,,$(DRIVERDIR))
+ KERNEL_GCC_VERSION := $(shell cat /proc/version | sed -n 's/.*gcc version \([[:digit:]]\.[[:digit:]]\.[[:digit:]]\).*/\1/p')
+ CCVERSION = $(shell $(CC) -dumpversion)
+
+ KVER = $(shell uname -r)
+ KMAJ = $(shell echo $(KVER) | \
+ sed -e 's/^\([0-9][0-9]*\)\.[0-9][0-9]*\.[0-9][0-9]*.*/\1/')
+ KMIN = $(shell echo $(KVER) | \
+ sed -e 's/^[0-9][0-9]*\.\([0-9][0-9]*\)\.[0-9][0-9]*.*/\1/')
+ KREV = $(shell echo $(KVER) | \
+ sed -e 's/^[0-9][0-9]*\.[0-9][0-9]*\.\([0-9][0-9]*\).*/\1/')
+
+ kver_ge = $(shell \
+ echo test | awk '{if($(KMAJ) < $(1)) {print 0} else { \
+ if($(KMAJ) > $(1)) {print 1} else { \
+ if($(KMIN) < $(2)) {print 0} else { \
+ if($(KMIN) > $(2)) {print 1} else { \
+ if($(KREV) < $(3)) {print 0} else { print 1 } \
+ }}}}}' \
+ )
+
.PHONY: all
-all: clean modules install
+all: print_vars clean modules install
+
+print_vars:
+ @echo
+ @echo "CC: " $(CC)
+ @echo "CCVERSION: " $(CCVERSION)
+ @echo "KERNEL_GCC_VERSION: " $(KERNEL_GCC_VERSION)
+ @echo "KVER: " $(KVER)
+ @echo "KMAJ: " $(KMAJ)
+ @echo "KMIN: " $(KMIN)
+ @echo "KREV: " $(KREV)
+ @echo "BASEDIR: " $(BASEDIR)
+ @echo "DRIVERDIR: " $(DRIVERDIR)
+ @echo "PWD: " $(PWD)
+ @echo "RTKDIR: " $(RTKDIR)
+ @echo
.PHONY:modules
modules:
- $(MAKE) -C $(KERNELDIR) SUBDIRS=$(PWD) modules
+#ifeq ($(call kver_ge,5,0,0),1)
+ $(MAKE) -C $(KERNELDIR) M=$(PWD) modules
+#else
+# $(MAKE) -C $(KERNELDIR) SUBDIRS=$(PWD) modules
+#endif
.PHONY:clean
clean:
- $(MAKE) -C $(KERNELDIR) SUBDIRS=$(PWD) clean
+#ifeq ($(call kver_ge,5,0,0),1)
+ $(MAKE) -C $(KERNELDIR) M=$(PWD) clean
+#else
+# $(MAKE) -C $(KERNELDIR) SUBDIRS=$(PWD) clean
+#endif
.PHONY:install
install:
- $(MAKE) -C $(KERNELDIR) SUBDIRS=$(PWD) INSTALL_MOD_DIR=$(RTKDIR) modules_install
+#ifeq ($(call kver_ge,5,0,0),1)
+ $(MAKE) -C $(KERNELDIR) M=$(PWD) INSTALL_MOD_DIR=$(RTKDIR) modules_install
+#else
+# $(MAKE) -C $(KERNELDIR) SUBDIRS=$(PWD) INSTALL_MOD_DIR=$(RTKDIR) modules_install
+#endif
endif
diff --git a/src/4.x/drivers/net/ethernet/realtek/r8125/Makefile_linux24x b/src/4.x/drivers/net/ethernet/realtek/r8125/Makefile_linux24x
deleted file mode 100644
index 40d023551..000000000
--- a/src/4.x/drivers/net/ethernet/realtek/r8125/Makefile_linux24x
+++ /dev/null
@@ -1,74 +0,0 @@
-################################################################################
-#
-# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
-# controllers with PCI-Express interface.
-#
-# Copyright(c) 2018 Realtek Semiconductor Corp. All rights reserved.
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License as published by the Free
-# Software Foundation; either version 2 of the License, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-# more details.
-#
-# You should have received a copy of the GNU General Public License along with
-# this program; if not, see .
-#
-# Author:
-# Realtek NIC software team
-# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
-#
-################################################################################
-
-################################################################################
-# This product is covered by one or more of the following patents:
-# US6,570,884, US6,115,776, and US6,327,625.
-################################################################################
-
-CC := gcc
-LD := ld
-ARCH := $(shell uname -m | sed 's/i.86/i386/')
-KSRC := /lib/modules/$(shell uname -r)/build
-CONFIG_FILE := $(KSRC)/include/linux/autoconf.h
-KMISC := /lib/modules/$(shell uname -r)/kernel/drivers/net/
-
-
-ifeq ($(ARCH),x86_64)
- MODCFLAGS += -mcmodel=kernel -mno-red-zone
-endif
-
-#standard flags for module builds
-MODCFLAGS += -DLINUX -D__KERNEL__ -DMODULE -O2 -pipe -Wall
-MODCFLAGS += -I$(KSRC)/include -I.
-MODCFLAGS += -DMODVERSIONS -DEXPORT_SYMTAB -include $(KSRC)/include/linux/modversions.h
-SOURCE := r8125_n.c rtl_eeprom.c rtltool.c
-OBJS := $(SOURCE:.c=.o)
-
-
-SMP := $(shell $(CC) $(MODCFLAGS) -E -dM $(CONFIG_FILE) | \
- grep CONFIG_SMP | awk '{print $$3}')
-
-ifneq ($(SMP),1)
- SMP := 0
-endif
-
-ifeq ($(SMP),1)
- MODCFLAGS += -D__SMP__
-endif
-
-modules: $(OBJS)
- $(LD) -r $^ -o r8125.o
- strip --strip-debug r8125.o
-
-%.o: %.c
- $(CC) $(MODCFLAGS) -c $< -o $@
-
-clean:
- rm *.o -f
-
-install:
- install -m 744 -c r8125.o $(KMISC)
diff --git a/src/4.x/drivers/net/ethernet/realtek/r8125/r8125.h b/src/4.x/drivers/net/ethernet/realtek/r8125/r8125.h
old mode 100644
new mode 100755
index f6474a375..9eac0eb7a
--- a/src/4.x/drivers/net/ethernet/realtek/r8125/r8125.h
+++ b/src/4.x/drivers/net/ethernet/realtek/r8125/r8125.h
@@ -1,10 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# controllers with PCI-Express interface.
#
-# Copyright(c) 2018 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@@ -31,8 +32,53 @@
* US6,570,884, US6,115,776, and US6,327,625.
***********************************************************************************/
+#ifndef __R8125_H
+#define __R8125_H
+
+//#include
#include
+#include
+#include
#include "r8125_dash.h"
+#include "r8125_realwow.h"
+#include "r8125_ptp.h"
+#include "r8125_rss.h"
+#ifdef ENABLE_LIB_SUPPORT
+#include "r8125_lib.h"
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32)
+typedef int netdev_tx_t;
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
+static inline bool dev_page_is_reusable(const struct page *page)
+{
+ return likely(page_to_nid(page) == numa_mem_id() &&
+ !page_is_pfmemalloc(page));
+}
+#endif
+
+/*
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0)&& !defined(ENABLE_LIB_SUPPORT)
+#define RTL_USE_NEW_INTR_API
+#endif
+*/
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0)
+#define dma_map_page_attrs(dev, page, offset, size, dir, attrs) \
+ dma_map_page(dev, page, offset, size, dir)
+#define dma_unmap_page_attrs(dev, page, size, dir, attrs) \
+ dma_unmap_page(dev, page, size, dir)
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0)
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
+#define page_ref_inc(page) atomic_inc(&page->_count)
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,4,216)
+#define page_ref_count(page) atomic_read(&page->_count)
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,4,216)
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
#define skb_transport_offset(skb) (skb->h.raw - skb->data)
@@ -123,14 +169,26 @@ do { \
#endif
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0)
-#define RTL_ALLOC_SKB_INTR(tp, length) dev_alloc_skb(length)
+#define RTL_ALLOC_SKB_INTR(napi, length) dev_alloc_skb(length)
#ifdef CONFIG_R8125_NAPI
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,19,0)
#undef RTL_ALLOC_SKB_INTR
-#define RTL_ALLOC_SKB_INTR(tp, length) napi_alloc_skb(&tp->napi, length)
+#define RTL_ALLOC_SKB_INTR(napi, length) napi_alloc_skb(napi, length)
+#endif
+#endif
+
+#define RTL_BUILD_SKB_INTR(data, frag_size) build_skb(data, frag_size)
+#ifdef CONFIG_R8125_NAPI
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,12,0)
+#undef RTL_BUILD_SKB_INTR
+#define RTL_BUILD_SKB_INTR(data, frag_size) napi_build_skb(data, frag_size)
#endif
#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)
+#define eth_random_addr(addr) random_ether_addr(addr)
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)
+
#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)
#define netdev_features_t u32
@@ -179,7 +237,7 @@ do { \
#define NETIF_F_RXFCS 0
#endif
-#ifndef HAVE_FREE_NETDEV
+#if !defined(HAVE_FREE_NETDEV) && (LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0))
#define free_netdev(x) kfree(x)
#endif
@@ -248,6 +306,14 @@ do { \
#define SUPPORTED_Asym_Pause (1 << 14)
#endif
+#ifndef MDIO_EEE_100TX
+#define MDIO_EEE_100TX 0x0002
+#endif
+
+#ifndef MDIO_EEE_1000T
+#define MDIO_EEE_1000T 0x0004
+#endif
+
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
#ifdef CONFIG_NET_POLL_CONTROLLER
#define RTL_NET_POLL_CONTROLLER dev->poll_controller=rtl8125_netpoll
@@ -299,7 +365,7 @@ do { \
#ifndef NET_IP_ALIGN
#define NET_IP_ALIGN 2
#endif
-#define RTK_RX_ALIGN 8
+#define R8125_RX_ALIGN NET_IP_ALIGN
#ifdef CONFIG_R8125_NAPI
#define NAPI_SUFFIX "-NAPI"
@@ -314,12 +380,30 @@ do { \
#define DASH_SUFFIX ""
#endif
-#define RTL8125_VERSION "9.001.RC18" NAPI_SUFFIX DASH_SUFFIX
+#if defined(ENABLE_REALWOW_SUPPORT)
+#define REALWOW_SUFFIX "-REALWOW"
+#else
+#define REALWOW_SUFFIX ""
+#endif
+
+#if defined(ENABLE_PTP_SUPPORT)
+#define PTP_SUFFIX "-PTP"
+#else
+#define PTP_SUFFIX ""
+#endif
+
+#if defined(ENABLE_RSS_SUPPORT)
+#define RSS_SUFFIX "-RSS"
+#else
+#define RSS_SUFFIX ""
+#endif
+
+#define RTL8125_VERSION "9.011.00" NAPI_SUFFIX DASH_SUFFIX REALWOW_SUFFIX PTP_SUFFIX RSS_SUFFIX
#define MODULENAME "r8125"
#define PFX MODULENAME ": "
#define GPL_CLAIM "\
-r8125 Copyright (C) 2018 Realtek NIC software team \n \
+r8125 Copyright (C) 2022 Realtek NIC software team \n \
This program comes with ABSOLUTELY NO WARRANTY; for details, please see . \n \
This is free software, and you are welcome to redistribute it under certain conditions; see . \n"
@@ -338,9 +422,6 @@ This is free software, and you are welcome to redistribute it under certain cond
#define R8125_MSG_DEFAULT \
(NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
-#define TX_BUFFS_AVAIL(tp) \
- (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
-
#ifdef CONFIG_R8125_NAPI
#define rtl8125_rx_hwaccel_skb vlan_hwaccel_receive_skb
#define rtl8125_rx_quota(count, quota) min(count, quota)
@@ -367,7 +448,7 @@ This is free software, and you are welcome to redistribute it under certain cond
#endif
#define Reserved2_data 7
-#define RX_DMA_BURST 7 /* Maximum PCI burst, '6' is 1024 */
+#define RX_DMA_BURST 7 /* Maximum PCI burst, '7' is unlimited */
#define TX_DMA_BURST_unlimited 7
#define TX_DMA_BURST_1024 6
#define TX_DMA_BURST_512 5
@@ -401,28 +482,58 @@ This is free software, and you are welcome to redistribute it under certain cond
#define R8125_PCI_REGS_SIZE (0x100)
#define R8125_NAPI_WEIGHT 64
+#define R8125_MAX_MSIX_VEC_8125B 32
+#define R8125_MIN_MSIX_VEC_8125B 17
+#define R8125_MAX_MSIX_VEC 32
+#define R8125_MAX_RX_QUEUES_VEC_V3 (16)
+
#define RTL8125_TX_TIMEOUT (6 * HZ)
#define RTL8125_LINK_TIMEOUT (1 * HZ)
#define RTL8125_ESD_TIMEOUT (2 * HZ)
-#define NUM_TX_DESC 1024 /* Number of Tx descriptor registers */
-#define NUM_RX_DESC 1024 /* Number of Rx descriptor registers */
+#define rtl8125_rx_page_size(order) (PAGE_SIZE << order)
+
+#define MAX_NUM_TX_DESC 1024 /* Maximum number of Tx descriptor registers */
+#define MAX_NUM_RX_DESC 1024 /* Maximum number of Rx descriptor registers */
+
+#define MIN_NUM_TX_DESC 256 /* Minimum number of Tx descriptor registers */
+#define MIN_NUM_RX_DESC 256 /* Minimum number of Rx descriptor registers */
+
+#define NUM_TX_DESC MAX_NUM_TX_DESC /* Number of Tx descriptor registers */
+#define NUM_RX_DESC MAX_NUM_RX_DESC /* Number of Rx descriptor registers */
#define RX_BUF_SIZE 0x05F3 /* 0x05F3 = 1522bye + 1 */
-#define R8125_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
-#define R8125_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
+
+#define R8125_MAX_TX_QUEUES (2)
+#define R8125_MAX_RX_QUEUES (4)
+#define R8125_MAX_QUEUES R8125_MAX_RX_QUEUES
+
+#define OCP_STD_PHY_BASE 0xa400
+
+//Channel Wait Count
+#define R8125_CHANNEL_WAIT_COUNT (20000)
+#define R8125_CHANNEL_WAIT_TIME (1) // 1us
+#define R8125_CHANNEL_EXIT_DELAY_TIME (20) //20us
+
+#ifdef ENABLE_LIB_SUPPORT
+#define R8125_MULTI_RX_Q(tp) 0
+#else
+#define R8125_MULTI_RX_Q(tp) (tp->num_rx_rings > 1)
+#endif
#define NODE_ADDRESS_SIZE 6
#define SHORT_PACKET_PADDING_BUF_SIZE 256
+#define RTK_MAGIC_DEBUG_VALUE 0x0badbeef
+
/* write/read MMIO register */
-#define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
-#define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
-#define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
-#define RTL_R8(reg) readb (ioaddr + (reg))
-#define RTL_R16(reg) readw (ioaddr + (reg))
-#define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg)))
+#define RTL_W8(tp, reg, val8) writeb((val8), tp->mmio_addr + (reg))
+#define RTL_W16(tp, reg, val16) writew((val16), tp->mmio_addr + (reg))
+#define RTL_W32(tp, reg, val32) writel((val32), tp->mmio_addr + (reg))
+#define RTL_R8(tp, reg) readb(tp->mmio_addr + (reg))
+#define RTL_R16(tp, reg) readw(tp->mmio_addr + (reg))
+#define RTL_R32(tp, reg) ((unsigned long) readl(tp->mmio_addr + (reg)))
#ifndef DMA_64BIT_MASK
#define DMA_64BIT_MASK 0xffffffffffffffffULL
@@ -441,7 +552,7 @@ This is free software, and you are welcome to redistribute it under certain cond
#endif
#ifndef NETDEV_TX_LOCKED
-#define NETDEV_TX_LOCKED -1 /* driver tx lock was already taken */
+#define NETDEV_TX_LOCKED -1t /* driver tx lock was already taken */
#endif
#ifndef ADVERTISED_Pause
@@ -475,8 +586,45 @@ This is free software, and you are welcome to redistribute it under certain cond
#ifndef ADVERTISED_2500baseX_Full
#define ADVERTISED_2500baseX_Full 0x8000
#endif
+#define RTK_ADVERTISED_5000baseX_Full BIT(48)
#define RTK_ADVERTISE_2500FULL 0x80
+#define RTK_ADVERTISE_5000FULL 0x100
+#define RTK_ADVERTISE_10000FULL 0x1000
+#define RTK_LPA_ADVERTISE_2500FULL 0x20
+#define RTK_LPA_ADVERTISE_5000FULL 0x40
+#define RTK_LPA_ADVERTISE_10000FULL 0x800
+
+#define RTK_EEE_ADVERTISE_2500FULL 0x01
+#define RTK_LPA_EEE_ADVERTISE_2500FULL 0x01
+
+/* Tx NO CLOSE */
+#define MAX_TX_NO_CLOSE_DESC_PTR_V2 0x10000
+#define MAX_TX_NO_CLOSE_DESC_PTR_MASK_V2 0xFFFF
+#define MAX_TX_NO_CLOSE_DESC_PTR_V3 0x100000000
+#define MAX_TX_NO_CLOSE_DESC_PTR_MASK_V3 0xFFFFFFFF
+#define TX_NO_CLOSE_SW_PTR_MASK_V2 0x1FFFF
+
+#ifndef ETH_MIN_MTU
+#define ETH_MIN_MTU 68
+#endif
+
+#define D0_SPEED_UP_SPEED_DISABLE 0
+#define D0_SPEED_UP_SPEED_1000 1
+#define D0_SPEED_UP_SPEED_2500 2
+
+#define RTL8125_MAC_MCU_PAGE_SIZE 256 //256 words
+
+#ifndef WRITE_ONCE
+#define WRITE_ONCE(var, val) (*((volatile typeof(val) *)(&(var))) = (val))
+#endif
+#ifndef READ_ONCE
+#define READ_ONCE(var) (*((volatile typeof(var) *)(&(var))))
+#endif
+
+#ifndef SPEED_5000
+#define SPEED_5000 5000
+#endif
/*****************************************************************************/
@@ -564,6 +712,23 @@ typedef int napi_budget;
#define RTL_NAPI_DEL(priv) netif_napi_del(&priv->napi)
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)
+/*****************************************************************************/
+#ifdef CONFIG_R8125_NAPI
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)
+#define RTL_NAPI_CONSUME_SKB_ANY(skb, budget) napi_consume_skb(skb, budget)
+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)
+#define RTL_NAPI_CONSUME_SKB_ANY(skb, budget) dev_consume_skb_any(skb);
+#else
+#define RTL_NAPI_CONSUME_SKB_ANY(skb, budget) dev_kfree_skb_any(skb);
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)
+#else //CONFIG_R8125_NAPI
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)
+#define RTL_NAPI_CONSUME_SKB_ANY(skb, budget) dev_consume_skb_any(skb);
+#else
+#define RTL_NAPI_CONSUME_SKB_ANY(skb, budget) dev_kfree_skb_any(skb);
+#endif
+#endif //CONFIG_R8125_NAPI
+
/*****************************************************************************/
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9)
#ifdef __CHECKER__
@@ -1008,14 +1173,6 @@ struct _kc_ethtool_pauseparam {
/*****************************************************************************/
-enum RTL8125_DSM_STATE {
- DSM_MAC_INIT = 1,
- DSM_NIC_GOTO_D3 = 2,
- DSM_IF_DOWN = 3,
- DSM_NIC_RESUME_D3 = 4,
- DSM_IF_UP = 5,
-};
-
enum RTL8125_registers {
MAC0 = 0x00, /* Ethernet hardware address. */
MAC4 = 0x04,
@@ -1028,6 +1185,7 @@ enum RTL8125_registers {
TxHDescStartAddrLow = 0x28,
TxHDescStartAddrHigh = 0x2c,
FLASH = 0x30,
+ INT_CFG0_8125 = 0x34,
ERSR = 0x36,
ChipCmd = 0x37,
TxPoll = 0x38,
@@ -1055,6 +1213,7 @@ enum RTL8125_registers {
PMCH = 0x6F,
ERIDR = 0x70,
ERIAR = 0x74,
+ INT_CFG1_8125 = 0x7A,
EPHY_RXER_NUM = 0x7C,
EPHYAR = 0x80,
TimeInt2 = 0x8C,
@@ -1088,6 +1247,12 @@ enum RTL8125_registers {
IMR0_8125 = 0x38,
ISR0_8125 = 0x3C,
TPPOLL_8125 = 0x90,
+ IMR1_8125 = 0x800,
+ ISR1_8125 = 0x802,
+ IMR2_8125 = 0x804,
+ ISR2_8125 = 0x806,
+ IMR3_8125 = 0x808,
+ ISR3_8125 = 0x80A,
BACKUP_ADDR0_8125 = 0x19E0,
BACKUP_ADDR1_8125 = 0X19E4,
TCTR0_8125 = 0x0048,
@@ -1098,6 +1263,43 @@ enum RTL8125_registers {
TIMER_INT1_8125 = 0x005C,
TIMER_INT2_8125 = 0x008C,
TIMER_INT3_8125 = 0x00F4,
+ INT_MITI_V2_0_RX = 0x0A00,
+ INT_MITI_V2_0_TX = 0x0A02,
+ INT_MITI_V2_1_RX = 0x0A08,
+ INT_MITI_V2_1_TX = 0x0A0A,
+ IMR_V2_CLEAR_REG_8125 = 0x0D00,
+ ISR_V2_8125 = 0x0D04,
+ IMR_V2_SET_REG_8125 = 0x0D0C,
+ TDU_STA_8125 = 0x0D08,
+ RDU_STA_8125 = 0x0D0A,
+ DOUBLE_VLAN_CONFIG = 0x1000,
+ TX_NEW_CTRL = 0x203E,
+ TNPDS_Q1_LOW_8125 = 0x2100,
+ PLA_TXQ0_IDLE_CREDIT = 0x2500,
+ PLA_TXQ1_IDLE_CREDIT = 0x2504,
+ SW_TAIL_PTR0_8125 = 0x2800,
+ HW_CLO_PTR0_8125 = 0x2802,
+ SW_TAIL_PTR0_8126 = 0x2800,
+ HW_CLO_PTR0_8126 = 0x2800,
+ RDSAR_Q1_LOW_8125 = 0x4000,
+ RSS_CTRL_8125 = 0x4500,
+ Q_NUM_CTRL_8125 = 0x4800,
+ RSS_KEY_8125 = 0x4600,
+ RSS_INDIRECTION_TBL_8125_V2 = 0x4700,
+ EEE_TXIDLE_TIMER_8125 = 0x6048,
+ PTP_CTRL_8125 = 0x6800,
+ PTP_STATUS_8125 = 0x6802,
+ PTP_ISR_8125 = 0x6804,
+ PTP_IMR_8125 = 0x6805,
+ PTP_TIME_CORRECT_CMD_8125 = 0x6806,
+ PTP_SOFT_CONFIG_Time_NS_8125 = 0x6808,
+ PTP_SOFT_CONFIG_Time_S_8125 = 0x680C,
+ PTP_LOCAL_Time_SUB_NS_8125 = 0x6814,
+ PTP_LOCAL_Time_NS_8125 = 0x6818,
+ PTP_LOCAL_Time_S_8125 = 0x681C,
+ PTP_Time_SHIFTER_S_8125 = 0x6856,
+ PPS_RISE_TIME_NS_8125 = 0x68A0,
+ PPS_RISE_TIME_S_8125 = 0x68A4,
};
enum RTL8125_register_content {
@@ -1113,6 +1315,8 @@ enum RTL8125_register_content {
TxOK = 0x0004,
RxErr = 0x0002,
RxOK = 0x0001,
+ RxDU1 = 0x0002,
+ RxOK1 = 0x0001,
/* RxStatusDesc */
RxRWT = (1 << 22),
@@ -1120,6 +1324,11 @@ enum RTL8125_register_content {
RxRUNT = (1 << 20),
RxCRC = (1 << 19),
+ RxRWT_V3 = (1 << 18),
+ RxRES_V3 = (1 << 20),
+ RxRUNT_V3 = (1 << 19),
+ RxCRC_V3 = (1 << 17),
+
/* ChipCmdBits */
StopReq = 0x80,
CmdReset = 0x10,
@@ -1153,9 +1362,13 @@ enum RTL8125_register_content {
/* RxConfigBits */
Reserved2_shift = 13,
RxCfgDMAShift = 8,
+ EnableRxDescV3 = (1 << 24),
+ EnableOuterVlan = (1 << 23),
+ EnableInnerVlan = (1 << 22),
RxCfg_128_int_en = (1 << 15),
RxCfg_fet_multi_en = (1 << 14),
RxCfg_half_refetch = (1 << 13),
+ RxCfg_pause_slot_en = (1 << 11),
RxCfg_9356SEL = (1 << 6),
/* TxConfigBits */
@@ -1215,6 +1428,7 @@ enum RTL8125_register_content {
/* rtl8125_PHYstatus */
PowerSaveStatus = 0x80,
+ _5000bpsF = 0x1000,
_2500bpsF = 0x400,
TxFlowCtrl = 0x40,
RxFlowCtrl = 0x20,
@@ -1310,6 +1524,24 @@ enum RTL8125_register_content {
/* GPIO */
GPIO_en = (1 << 0),
+ /* PTP */
+ PTP_ISR_TOK = (1 << 1),
+ PTP_ISR_TER = (1 << 2),
+ PTP_EXEC_CMD = (1 << 7),
+ PTP_ADJUST_TIME_NS_NEGATIVE = (1 << 30),
+ PTP_ADJUST_TIME_S_NEGATIVE = (1ULL << 48),
+
+ /* New Interrupt Bits */
+ INT_CFG0_ENABLE_8125 = (1 << 0),
+ INT_CFG0_TIMEOUT0_BYPASS_8125 = (1 << 1),
+ INT_CFG0_MITIGATION_BYPASS_8125 = (1 << 2),
+ ISRIMR_V2_ROK_Q0 = (1 << 0),
+ ISRIMR_TOK_Q0 = (1 << 16),
+ ISRIMR_TOK_Q1 = (1 << 18),
+ ISRIMR_V2_LINKCHG = (1 << 21),
+
+ /* Magic Number */
+ RTL8125_MAGIC_NUMBER = 0x0badbadbadbadbadull,
};
enum _DescStatusBit {
@@ -1318,6 +1550,11 @@ enum _DescStatusBit {
FirstFrag = (1 << 29), /* First segment of a packet */
LastFrag = (1 << 28), /* Final segment of a packet */
+ DescOwn_V3 = (DescOwn), /* Descriptor is owned by NIC */
+ RingEnd_V3 = (RingEnd), /* End of descriptor ring */
+ FirstFrag_V3 = (1 << 25), /* First segment of a packet */
+ LastFrag_V3 = (1 << 24), /* Final segment of a packet */
+
/* Tx private */
/*------ offset 0 of tx descriptor ------*/
LargeSend = (1 << 27), /* TCP Large Send Offload (TSO) */
@@ -1331,12 +1568,12 @@ enum _DescStatusBit {
TxTCPCS = (1 << 16), /* Calculate TCP/IP checksum */
TxVlanTag = (1 << 17), /* Add VLAN tag */
- /*@@@@@@ offset 4 of tx descriptor => bits for RTL8125C/CP only begin @@@@@@*/
+ /*@@@@@@ offset 4 of tx descriptor => bits for RTL8125 only begin @@@@@@*/
TxUDPCS_C = (1 << 31), /* Calculate UDP/IP checksum */
TxTCPCS_C = (1 << 30), /* Calculate TCP/IP checksum */
TxIPCS_C = (1 << 29), /* Calculate IP checksum */
TxIPV6F_C = (1 << 28), /* Indicate it is an IPv6 packet */
- /*@@@@@@ offset 4 of tx descriptor => bits for RTL8125C/CP only end @@@@@@*/
+ /*@@@@@@ offset 4 of tx descriptor => bits for RTL8125 only end @@@@@@*/
/* Rx private */
@@ -1354,20 +1591,47 @@ enum _DescStatusBit {
RxTCPF = (1 << 14), /* TCP/IP checksum failed */
RxVlanTag = (1 << 16), /* VLAN tag available */
- /*@@@@@@ offset 0 of rx descriptor => bits for RTL8125C/CP only begin @@@@@@*/
+ /*@@@@@@ offset 0 of rx descriptor => bits for RTL8125 only begin @@@@@@*/
RxUDPT = (1 << 18),
RxTCPT = (1 << 17),
- /*@@@@@@ offset 0 of rx descriptor => bits for RTL8125C/CP only end @@@@@@*/
+ /*@@@@@@ offset 0 of rx descriptor => bits for RTL8125 only end @@@@@@*/
- /*@@@@@@ offset 4 of rx descriptor => bits for RTL8125C/CP only begin @@@@@@*/
+ /*@@@@@@ offset 4 of rx descriptor => bits for RTL8125 only begin @@@@@@*/
RxV6F = (1 << 31),
RxV4F = (1 << 30),
- /*@@@@@@ offset 4 of rx descriptor => bits for RTL8125C/CP only end @@@@@@*/
+ /*@@@@@@ offset 4 of rx descriptor => bits for RTL8125 only end @@@@@@*/
+
+
+ PID1_v3 = (1 << 29), /* Protocol ID bit 1/2 */
+ PID0_v3 = (1 << 28), /* Protocol ID bit 2/2 */
+
+#define RxProtoUDP_v3 (PID1_v3)
+#define RxProtoTCP_v3 (PID0_v3)
+#define RxProtoIP_v3 (PID1_v3 | PID0_v3)
+#define RxProtoMask_v3 RxProtoIP_v3
+
+ RxIPF_v3 = (1 << 26), /* IP checksum failed */
+ RxUDPF_v3 = (1 << 25), /* UDP/IP checksum failed */
+ RxTCPF_v3 = (1 << 24), /* TCP/IP checksum failed */
+ RxSCTPF_v3 = (1 << 23), /* TCP/IP checksum failed */
+ RxVlanTag_v3 = (RxVlanTag), /* VLAN tag available */
+
+ /*@@@@@@ offset 0 of rx descriptor => bits for RTL8125 only begin @@@@@@*/
+ RxUDPT_v3 = (1 << 29),
+ RxTCPT_v3 = (1 << 28),
+ RxSCTP_v3 = (1 << 27),
+ /*@@@@@@ offset 0 of rx descriptor => bits for RTL8125 only end @@@@@@*/
+
+ /*@@@@@@ offset 4 of rx descriptor => bits for RTL8125 only begin @@@@@@*/
+ RxV6F_v3 = (RxV6F),
+ RxV4F_v3 = (RxV4F),
+ /*@@@@@@ offset 4 of rx descriptor => bits for RTL8125 only end @@@@@@*/
};
enum features {
// RTL_FEATURE_WOL = (1 << 0),
RTL_FEATURE_MSI = (1 << 1),
+ RTL_FEATURE_MSIX = (1 << 2),
};
enum wol_capability {
@@ -1410,7 +1674,17 @@ enum bits {
BIT_31 = (1 << 31)
};
-enum effuse {
+#define RTL8125_CP_NUM 4
+#define RTL8125_MAX_SUPPORT_cp_len 110
+
+enum rtl8125_cp_status {
+ rtl8125_cp_normal = 0,
+ rtl8125_cp_short,
+ rtl8125_cp_open,
+ rtl8125_cp_unknown
+};
+
+enum efuse {
EFUSE_NOT_SUPPORT = 0,
EFUSE_SUPPORT_V1,
EFUSE_SUPPORT_V2,
@@ -1418,6 +1692,7 @@ enum effuse {
EFUSE_SUPPORT_V4,
};
#define RsvdMask 0x3fffc000
+#define RsvdMaskV3 0x3fff8000
struct TxDesc {
u32 opts1;
@@ -1435,6 +1710,76 @@ struct RxDesc {
u64 addr;
};
+struct RxDescV3 {
+ union {
+ struct {
+ u32 rsv1;
+ u32 rsv2;
+ } RxDescDDWord1;
+ };
+
+ union {
+ struct {
+ u32 RSSResult;
+ u16 HeaderBufferLen;
+ u16 HeaderInfo;
+ } RxDescNormalDDWord2;
+
+ struct {
+ u32 rsv5;
+ u32 rsv6;
+ } RxDescDDWord2;
+ };
+
+ union {
+ u64 addr;
+
+ struct {
+ u32 TimeStampLow;
+ u32 TimeStampHigh;
+ } RxDescTimeStamp;
+
+ struct {
+ u32 rsv8;
+ u32 rsv9;
+ } RxDescDDWord3;
+ };
+
+ union {
+ struct {
+ u32 opts2;
+ u32 opts1;
+ } RxDescNormalDDWord4;
+
+ struct {
+ u16 TimeStampHHigh;
+ u16 rsv11;
+ u32 opts1;
+ } RxDescPTPDDWord4;
+ };
+};
+
+enum rxdesc_type {
+ RXDESC_TYPE_NORMAL=0,
+ RXDESC_TYPE_NEXT,
+ RXDESC_TYPE_PTP,
+ RXDESC_TYPE_MAX
+};
+
+//Rx Desc Type
+enum rx_desc_ring_type {
+ RX_DESC_RING_TYPE_UNKNOWN=0,
+ RX_DESC_RING_TYPE_1,
+ RX_DESC_RING_TYPE_2,
+ RX_DESC_RING_TYPE_3,
+ RX_DESC_RING_TYPE_MAX
+};
+
+enum rx_desc_len {
+ RX_DESC_LEN_TYPE_1 = (sizeof(struct RxDesc)),
+ RX_DESC_LEN_TYPE_3 = (sizeof(struct RxDescV3))
+};
+
struct ring_info {
struct sk_buff *skb;
u32 len;
@@ -1461,17 +1806,306 @@ struct pci_resource {
u32 pci_sn_h;
};
-struct rtl8125_private {
- void __iomem *mmio_addr; /* memory map physical address */
- struct pci_dev *pci_dev; /* Index of PCI device */
- struct net_device *dev;
+enum r8125_flag {
+ R8125_FLAG_DOWN = 0,
+ R8125_FLAG_TASK_RESET_PENDING,
+ R8125_FLAG_TASK_ESD_CHECK_PENDING,
+ R8125_FLAG_TASK_LINKCHG_CHECK_PENDING,
+ R8125_FLAG_MAX
+};
+
+struct rtl8125_tx_ring {
+ void* priv;
+ u32 index;
+ u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
+ u32 dirty_tx;
+ u32 num_tx_desc; /* Number of Tx descriptor registers */
+ struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */
+ dma_addr_t TxPhyAddr;
+ u32 TxDescAllocSize;
+ struct ring_info tx_skb[MAX_NUM_TX_DESC]; /* Tx data buffers */
+
+ u32 NextHwDesCloPtr;
+ u32 BeginHwDesCloPtr;
+
+ u16 hw_clo_ptr_reg;
+ u16 sw_tail_ptr_reg;
+
+ u16 tdsar_reg; /* Transmit Descriptor Start Address */
+};
+
+struct rtl8125_rx_buffer {
+ struct page *page;
+ u32 page_offset;
+ dma_addr_t dma;
+ void* data;
+ struct sk_buff *skb;
+};
+
+struct rtl8125_rx_ring {
+ void* priv;
+ u32 index;
+ u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
+ u32 dirty_rx;
+ u32 num_rx_desc; /* Number of Rx descriptor registers */
+ struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
+ u32 RxDescAllocSize;
+ u64 RxDescPhyAddr[MAX_NUM_RX_DESC]; /* Rx desc physical address*/
+ dma_addr_t RxPhyAddr;
+#ifdef ENABLE_PAGE_REUSE
+ struct rtl8125_rx_buffer rx_buffer[MAX_NUM_RX_DESC];
+ u16 rx_offset;
+#else
+ struct sk_buff *Rx_skbuff[MAX_NUM_RX_DESC]; /* Rx data buffers */
+#endif //ENABLE_PAGE_REUSE
+
+ u16 rdsar_reg; /* Receive Descriptor Start Address */
+};
+
+struct r8125_napi {
#ifdef CONFIG_R8125_NAPI
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
struct napi_struct napi;
#endif
#endif
+ void* priv;
+ int index;
+};
+
+struct r8125_irq {
+ irq_handler_t handler;
+ unsigned int vector;
+ u8 requested;
+ char name[IFNAMSIZ + 10];
+};
+
+#pragma pack(1)
+struct rtl8125_regs {
+ //00
+ u8 mac_id[6];
+ u16 reg_06;
+ u8 mar[8];
+ //10
+ u64 dtccr;
+ u16 ledsel0;
+ u16 legreg;
+ u32 tctr3;
+ //20
+ u32 txq0_dsc_st_addr_0;
+ u32 txq0_dsc_st_addr_2;
+ u64 reg_28;
+ //30
+ u16 rit;
+ u16 ritc;
+ u16 reg_34;
+ u8 reg_36;
+ u8 command;
+ u32 imr0;
+ u32 isr0;
+ //40
+ u32 tcr;
+ u32 rcr;
+ u32 tctr0;
+ u32 tctr1;
+ //50
+ u8 cr93c46;
+ u8 config0;
+ u8 config1;
+ u8 config2;
+ u8 config3;
+ u8 config4;
+ u8 config5;
+ u8 tdfnr;
+ u32 timer_int0;
+ u32 timer_int1;
+ //60
+ u32 gphy_mdcmdio;
+ u32 csidr;
+ u32 csiar;
+ u16 phy_status;
+ u8 config6;
+ u8 pmch;
+ //70
+ u32 eridr;
+ u32 eriar;
+ u16 config7;
+ u16 reg_7a;
+ u32 ephy_rxerr_cnt;
+ //80
+ u32 ephy_mdcmdio;
+ u16 ledsel2;
+ u16 ledsel1;
+ u32 tctr2;
+ u32 timer_int2;
+ //90
+ u8 tppoll0;
+ u8 reg_91;
+ u16 reg_92;
+ u16 led_feature;
+ u16 ledsel3;
+ u16 eee_led_config;
+ u16 reg_9a;
+ u32 reg_9c;
+ //a0
+ u32 reg_a0;
+ u32 reg_a4;
+ u32 reg_a8;
+ u32 reg_ac;
+ //b0
+ u32 patch_dbg;
+ u32 reg_b4;
+ u32 gphy_ocp;
+ u32 reg_bc;
+ //c0
+ u32 reg_c0;
+ u32 reg_c4;
+ u32 reg_c8;
+ u16 otp_cmd;
+ u16 otp_pg_config;
+ //d0
+ u16 phy_pwr;
+ u8 twsi_ctrl;
+ u8 oob_ctrl;
+ u16 mac_dbgo;
+ u16 mac_dbg;
+ u16 reg_d8;
+ u16 rms;
+ u32 efuse_data;
+ //e0
+ u16 cplus_cmd;
+ u16 reg_e2;
+ u32 rxq0_dsc_st_addr_0;
+ u32 rxq0_dsc_st_addr_2;
+ u16 reg_ec;
+ u16 tx10midle_cnt;
+ //f0
+ u16 misc0;
+ u16 misc1;
+ u32 timer_int3;
+ u32 cmac_ib;
+ u16 reg_fc;
+ u16 sw_rst;
+};
+#pragma pack()
+
+struct rtl8125_regs_save {
+ union {
+ u8 mac_io[R8125_MAC_REGS_SIZE];
+
+ struct rtl8125_regs mac_reg;
+ };
+ u16 pcie_phy[R8125_EPHY_REGS_SIZE/2];
+ u16 eth_phy[R8125_PHY_REGS_SIZE/2];
+ u32 eri_reg[R8125_ERI_REGS_SIZE/4];
+ u32 pci_reg[R8125_PCI_REGS_SIZE/4];
+ u16 sw_tail_ptr_reg[R8125_MAX_TX_QUEUES];
+ u16 hw_clo_ptr_reg[R8125_MAX_TX_QUEUES];
+
+ //ktime_t begin_ktime;
+ //ktime_t end_ktime;
+ //u64 duration_ns;
+
+ u16 sw0_tail_ptr;
+ u16 next_hwq0_clo_ptr;
+ u16 sw1_tail_ptr;
+ u16 next_hwq1_clo_ptr;
+
+ u16 int_miti_rxq0;
+ u16 int_miti_txq0;
+ u16 int_miti_rxq1;
+ u16 int_miti_txq1;
+ u8 int_config;
+ u32 imr_new;
+ u32 isr_new;
+
+ u8 tdu_status;
+ u16 rdu_status;
+
+ u16 tc_mode;
+
+ u32 txq1_dsc_st_addr_0;
+ u32 txq1_dsc_st_addr_2;
+
+ u32 pla_tx_q0_idle_credit;
+ u32 pla_tx_q1_idle_credit;
+
+ u32 rxq1_dsc_st_addr_0;
+ u32 rxq1_dsc_st_addr_2;
+
+ u32 rss_ctrl;
+ u8 rss_key[RTL8125_RSS_KEY_SIZE];
+ u8 rss_i_table[RTL8125_MAX_INDIRECTION_TABLE_ENTRIES];
+ u16 rss_queue_num_sel_r;
+};
+
+struct rtl8125_counters {
+ /* legacy */
+ u64 tx_packets;
+ u64 rx_packets;
+ u64 tx_errors;
+ u32 rx_errors;
+ u16 rx_missed;
+ u16 align_errors;
+ u32 tx_one_collision;
+ u32 tx_multi_collision;
+ u64 rx_unicast;
+ u64 rx_broadcast;
+ u32 rx_multicast;
+ u16 tx_aborted;
+ u16 tx_underrun;
+
+ /* extended */
+ u64 tx_octets;
+ u64 rx_octets;
+ u64 rx_multicast64;
+ u64 tx_unicast64;
+ u64 tx_broadcast64;
+ u64 tx_multicast64;
+ u32 tx_pause_on;
+ u32 tx_pause_off;
+ u32 tx_pause_all;
+ u32 tx_deferred;
+ u32 tx_late_collision;
+ u32 tx_all_collision;
+ u32 tx_aborted32;
+ u32 align_errors32;
+ u32 rx_frame_too_long;
+ u32 rx_runt;
+ u32 rx_pause_on;
+ u32 rx_pause_off;
+ u32 rx_pause_all;
+ u32 rx_unknown_opcode;
+ u32 rx_mac_error;
+ u32 tx_underrun32;
+ u32 rx_mac_missed;
+ u32 rx_tcam_dropped;
+ u32 tdu;
+ u32 rdu;
+};
+
+/* Flow Control Settings */
+enum rtl8125_fc_mode {
+ rtl8125_fc_none = 0,
+ rtl8125_fc_rx_pause,
+ rtl8125_fc_tx_pause,
+ rtl8125_fc_full,
+ rtl8125_fc_default
+};
+
+struct rtl8125_private {
+ void __iomem *mmio_addr; /* memory map physical address */
+ struct pci_dev *pci_dev; /* Index of PCI device */
+ struct net_device *dev;
+ struct r8125_napi r8125napi[R8125_MAX_MSIX_VEC];
+ struct r8125_irq irq_tbl[R8125_MAX_MSIX_VEC];
+ unsigned int irq_nvecs;
+ unsigned int max_irq_nvecs;
+ unsigned int min_irq_nvecs;
+ //struct msix_entry msix_entries[R8125_MAX_MSIX_VEC];
struct net_device_stats stats; /* statistics of net device */
+#ifdef ENABLE_PTP_SUPPORT
spinlock_t lock; /* spin lock flag */
+#endif
u32 msg_enable;
u32 tx_tcp_csum_cmd;
u32 tx_udp_csum_cmd;
@@ -1480,26 +2114,45 @@ struct rtl8125_private {
int max_jumbo_frame_size;
int chipset;
u32 mcfg;
- u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
- u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
- u32 dirty_rx;
- u32 dirty_tx;
- struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */
- struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
- dma_addr_t TxPhyAddr;
- dma_addr_t RxPhyAddr;
- struct sk_buff *Rx_skbuff[NUM_RX_DESC]; /* Rx data buffers */
- struct ring_info tx_skb[NUM_TX_DESC]; /* Tx data buffers */
+ //u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
+ //u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
+ //u32 dirty_rx;
+ //u32 dirty_tx;
+ //struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */
+ //struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
+ //dma_addr_t TxPhyAddr;
+ //dma_addr_t RxPhyAddr;
+ //struct sk_buff *Rx_skbuff[MAX_NUM_RX_DESC]; /* Rx data buffers */
+ //struct ring_info tx_skb[MAX_NUM_TX_DESC]; /* Tx data buffers */
unsigned rx_buf_sz;
- struct timer_list esd_timer;
- struct timer_list link_timer;
+#ifdef ENABLE_PAGE_REUSE
+ unsigned rx_buf_page_order;
+ unsigned rx_buf_page_size;
+ u32 page_reuse_fail_cnt;
+#endif //ENABLE_PAGE_REUSE
+ u16 HwSuppNumTxQueues;
+ u16 HwSuppNumRxQueues;
+ unsigned int num_tx_rings;
+ unsigned int num_rx_rings;
+ struct rtl8125_tx_ring tx_ring[R8125_MAX_TX_QUEUES];
+ struct rtl8125_rx_ring rx_ring[R8125_MAX_RX_QUEUES];
+#ifdef ENABLE_LIB_SUPPORT
+ struct atomic_notifier_head lib_nh;
+ struct rtl8125_ring lib_tx_ring[R8125_MAX_TX_QUEUES];
+ struct rtl8125_ring lib_rx_ring[R8125_MAX_RX_QUEUES];
+#endif
+ //struct timer_list esd_timer;
+ //struct timer_list link_timer;
struct pci_resource pci_cfg_space;
unsigned int esd_flag;
unsigned int pci_cfg_is_read;
unsigned int rtl8125_rx_config;
+ u16 rms;
u16 cp_cmd;
u32 intr_mask;
- u16 timer_intr_mask;
+ u32 timer_intr_mask;
+ u16 isr_reg[R8125_MAX_QUEUES];
+ u16 imr_reg[R8125_MAX_QUEUES];
int phy_auto_nego_reg;
int phy_1000_ctrl_reg;
int phy_2500_ctrl_reg;
@@ -1517,12 +2170,14 @@ struct rtl8125_private {
u8 autoneg;
u8 duplex;
u32 speed;
- u32 advertising;
+ u64 advertising;
+ enum rtl8125_fc_mode fcpause;
+ u32 HwSuppMaxPhyLinkSpeed;
u16 eeprom_len;
u16 cur_page;
u32 bios_setting;
- int (*set_speed)(struct net_device *, u8 autoneg, u32 speed, u8 duplex, u32 adv);
+ int (*set_speed)(struct net_device *, u8 autoneg, u32 speed, u8 duplex, u64 adv);
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
void (*get_settings)(struct net_device *, struct ethtool_cmd *);
#else
@@ -1532,10 +2187,15 @@ struct rtl8125_private {
unsigned int (*phy_reset_pending)(struct net_device *);
unsigned int (*link_ok)(struct net_device *);
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
- struct work_struct task;
+ struct work_struct reset_task;
+ struct work_struct esd_task;
+ struct work_struct linkchg_task;
#else
- struct delayed_work task;
+ struct delayed_work reset_task;
+ struct delayed_work esd_task;
+ struct delayed_work linkchg_task;
#endif
+ DECLARE_BITMAP(task_flags, R8125_FLAG_MAX);
unsigned features;
u8 org_pci_offset_99;
@@ -1556,6 +2216,8 @@ struct rtl8125_private {
u16 sw_ram_code_ver;
u16 hw_ram_code_ver;
+ u8 RequireRduNonStopPatch;
+
u8 rtk_enable_diag;
u8 ShortPacketSwChecksum;
@@ -1575,6 +2237,10 @@ struct rtl8125_private {
u8 RequiredSecLanDonglePatch;
+ u8 RequirePhyMdiSwapPatch;
+
+ u8 RequireLSOPatch;
+
u32 HwFiberModeVer;
u32 HwFiberStat;
u8 HwSwitchMdiToFiber;
@@ -1583,13 +2249,41 @@ struct rtl8125_private {
u8 HwSuppMagicPktVer;
+ u8 HwSuppLinkChgWakeUpVer;
+
u8 HwSuppCheckPhyDisableModeVer;
u8 random_mac;
- u8 HwSuppGigaForceMode;
-
+ u16 phy_reg_aner;
u16 phy_reg_anlpar;
+ u16 phy_reg_gbsr;
+ u16 phy_reg_status_2500;
+
+ u32 HwPcieSNOffset;
+
+ u32 MaxTxDescPtrMask;
+ u8 HwSuppTxNoCloseVer;
+ u8 EnableTxNoClose;
+
+ u8 HwSuppIsrVer;
+ u8 HwCurrIsrVer;
+
+ u8 HwSuppIntMitiVer;
+
+ u8 HwSuppExtendTallyCounterVer;
+
+ u8 check_keep_link_speed;
+ u8 resume_not_chg_speed;
+
+ u8 HwSuppD0SpeedUpVer;
+ u8 D0SpeedUpSpeed;
+
+ u8 ring_lib_enabled;
+
+ const char *fw_name;
+ struct rtl8125_fw *rtl_fw;
+ u32 ocp_base;
//Dash+++++++++++++++++
u8 HwSuppDashVer;
@@ -1674,13 +2368,102 @@ struct rtl8125_private {
u8 EnableDhcpTimeoutWake;
u8 EnableTeredoOffload;
u8 EnableKCPOffload;
+#ifdef ENABLE_REALWOW_SUPPORT
+ u32 DhcpTimeout;
+ MP_KCP_INFO MpKCPInfo;
+ //Realwow--------------
+#endif //ENABLE_REALWOW_SUPPORT
+
+ struct ethtool_eee eee;
#ifdef ENABLE_R8125_PROCFS
//Procfs support
struct proc_dir_entry *proc_dir;
#endif
+ u8 InitRxDescType;
+ u16 RxDescLength; //V1 16 Byte V2 32 Bytes
+
+ u8 HwSuppPtpVer;
+ u8 EnablePtp;
+ u8 ptp_master_mode;
+ s64 ptp_adjust;
+#ifdef ENABLE_PTP_SUPPORT
+ u32 tx_hwtstamp_timeouts;
+ u32 tx_hwtstamp_skipped;
+ struct work_struct ptp_tx_work;
+ struct sk_buff *ptp_tx_skb;
+ struct hwtstamp_config hwtstamp_config;
+ unsigned long ptp_tx_start;
+ struct ptp_clock_info ptp_clock_info;
+ struct ptp_clock *ptp_clock;
+#endif
+
+ u8 HwSuppRssVer;
+ u8 EnableRss;
+ u16 HwSuppIndirTblEntries;
+#ifdef ENABLE_RSS_SUPPORT
+ u32 rss_flags;
+ /* Receive Side Scaling settings */
+ u8 rss_key[RTL8125_RSS_KEY_SIZE];
+ u8 rss_indir_tbl[RTL8125_MAX_INDIRECTION_TABLE_ENTRIES];
+ u32 rss_options;
+#endif
+
+ u8 HwSuppMacMcuVer;
+ u16 MacMcuPageSize;
};
+#ifdef ENABLE_LIB_SUPPORT
+static inline unsigned int
+rtl8125_num_lib_tx_rings(struct rtl8125_private *tp)
+{
+ int count, i;
+
+ for (count = 0, i = tp->num_tx_rings; i < tp->HwSuppNumTxQueues; i++)
+ if(tp->lib_tx_ring[i].enabled)
+ count++;
+
+ return count;
+}
+
+static inline unsigned int
+rtl8125_num_lib_rx_rings(struct rtl8125_private *tp)
+{
+ int count, i;
+
+ for (count = 0, i = tp->num_rx_rings; i < tp->HwSuppNumRxQueues; i++)
+ if(tp->lib_rx_ring[i].enabled)
+ count++;
+
+ return count;
+}
+
+#else
+static inline unsigned int
+rtl8125_num_lib_tx_rings(struct rtl8125_private *tp)
+{
+ return 0;
+}
+
+static inline unsigned int
+rtl8125_num_lib_rx_rings(struct rtl8125_private *tp)
+{
+ return 0;
+}
+#endif
+
+static inline unsigned int
+rtl8125_tot_tx_rings(struct rtl8125_private *tp)
+{
+ return tp->num_tx_rings + rtl8125_num_lib_tx_rings(tp);
+}
+
+static inline unsigned int
+rtl8125_tot_rx_rings(struct rtl8125_private *tp)
+{
+ return tp->num_rx_rings + rtl8125_num_lib_rx_rings(tp);
+}
+
enum eetype {
EEPROM_TYPE_NONE=0,
EEPROM_TYPE_93C46,
@@ -1689,10 +2472,15 @@ enum eetype {
};
enum mcfg {
- CFG_METHOD_2=0,
+ CFG_METHOD_2=2,
CFG_METHOD_3,
- CFG_METHOD_MAX,
- CFG_METHOD_DEFAULT = 0xFF
+ CFG_METHOD_4,
+ CFG_METHOD_5,
+ CFG_METHOD_6,
+ CFG_METHOD_7,
+ CFG_METHOD_8,
+ CFG_METHOD_DEFAULT,
+ CFG_METHOD_MAX
};
#define LSO_32K 32000
@@ -1703,7 +2491,7 @@ enum mcfg {
#define NIC_MAX_PHYS_BUF_COUNT_LSO2 (16*4)
#define GTTCPHO_SHIFT 18
-#define GTTCPHO_MAX 0x7fU
+#define GTTCPHO_MAX 0x70U
#define GTPKTSIZE_MAX 0x3ffffU
#define TCPHO_SHIFT 18
#define TCPHO_MAX 0x3ffU
@@ -1722,36 +2510,41 @@ enum mcfg {
//Ram Code Version
#define NIC_RAMCODE_VERSION_CFG_METHOD_2 (0x0b11)
-#define NIC_RAMCODE_VERSION_CFG_METHOD_3 (0x0b26)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_3 (0x0b33)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_4 (0x0b17)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_5 (0x0b74)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_8 (0x0023)
//hwoptimize
#define HW_PATCH_SOC_LAN (BIT_0)
#define HW_PATCH_SAMSUNG_LAN_DONGLE (BIT_2)
-void rtl8125_mdio_write(struct rtl8125_private *tp, u32 RegAddr, u32 value);
+static const u16 other_q_intr_mask = (RxOK1 | RxDU1);
+
+void rtl8125_mdio_write(struct rtl8125_private *tp, u16 RegAddr, u16 value);
void rtl8125_mdio_prot_write(struct rtl8125_private *tp, u32 RegAddr, u32 value);
void rtl8125_mdio_prot_direct_write_phy_ocp(struct rtl8125_private *tp, u32 RegAddr, u32 value);
-u32 rtl8125_mdio_read(struct rtl8125_private *tp, u32 RegAddr);
+u32 rtl8125_mdio_read(struct rtl8125_private *tp, u16 RegAddr);
u32 rtl8125_mdio_prot_read(struct rtl8125_private *tp, u32 RegAddr);
u32 rtl8125_mdio_prot_direct_read_phy_ocp(struct rtl8125_private *tp, u32 RegAddr);
-void rtl8125_ephy_write(void __iomem *ioaddr, int RegAddr, int value);
+void rtl8125_ephy_write(struct rtl8125_private *tp, int RegAddr, int value);
void rtl8125_mac_ocp_write(struct rtl8125_private *tp, u16 reg_addr, u16 value);
-u16 rtl8125_mac_ocp_read(struct rtl8125_private *tp, u16 reg_addr);
+u32 rtl8125_mac_ocp_read(struct rtl8125_private *tp, u16 reg_addr);
void rtl8125_clear_eth_phy_bit(struct rtl8125_private *tp, u8 addr, u16 mask);
void rtl8125_set_eth_phy_bit(struct rtl8125_private *tp, u8 addr, u16 mask);
void rtl8125_ocp_write(struct rtl8125_private *tp, u16 addr, u8 len, u32 data);
void rtl8125_oob_notify(struct rtl8125_private *tp, u8 cmd);
void rtl8125_init_ring_indexes(struct rtl8125_private *tp);
-int rtl8125_eri_write(void __iomem *ioaddr, int addr, int len, u32 value, int type);
+int rtl8125_eri_write(struct rtl8125_private *tp, int addr, int len, u32 value, int type);
void rtl8125_oob_mutex_lock(struct rtl8125_private *tp);
-u32 rtl8125_mdio_read(struct rtl8125_private *tp, u32 RegAddr);
u32 rtl8125_ocp_read(struct rtl8125_private *tp, u16 addr, u8 len);
u32 rtl8125_ocp_read_with_oob_base_address(struct rtl8125_private *tp, u16 addr, u8 len, u32 base_address);
u32 rtl8125_ocp_write_with_oob_base_address(struct rtl8125_private *tp, u16 addr, u8 len, u32 value, u32 base_address);
-u32 rtl8125_eri_read(void __iomem *ioaddr, int addr, int len, int type);
-u32 rtl8125_eri_read_with_oob_base_address(void __iomem *ioaddr, int addr, int len, int type, u32 base_address);
-int rtl8125_eri_write_with_oob_base_address(void __iomem *ioaddr, int addr, int len, u32 value, int type, u32 base_address);
-u16 rtl8125_ephy_read(void __iomem *ioaddr, int RegAddr);
+u32 rtl8125_eri_read(struct rtl8125_private *tp, int addr, int len, int type);
+u32 rtl8125_eri_read_with_oob_base_address(struct rtl8125_private *tp, int addr, int len, int type, u32 base_address);
+int rtl8125_eri_write(struct rtl8125_private *tp, int addr, int len, u32 value, int type);
+int rtl8125_eri_write_with_oob_base_address(struct rtl8125_private *tp, int addr, int len, u32 value, int type, u32 base_address);
+u16 rtl8125_ephy_read(struct rtl8125_private *tp, int RegAddr);
void rtl8125_wait_txrx_fifo_empty(struct net_device *dev);
void rtl8125_enable_now_is_oob(struct rtl8125_private *tp);
void rtl8125_disable_now_is_oob(struct rtl8125_private *tp);
@@ -1761,8 +2554,70 @@ void rtl8125_dash2_enable_tx(struct rtl8125_private *tp);
void rtl8125_dash2_disable_rx(struct rtl8125_private *tp);
void rtl8125_dash2_enable_rx(struct rtl8125_private *tp);
void rtl8125_hw_disable_mac_mcu_bps(struct net_device *dev);
+void rtl8125_mark_to_asic(struct rtl8125_private *tp, struct RxDesc *desc, u32 rx_buf_sz);
+
+static inline void
+rtl8125_make_unusable_by_asic(struct rtl8125_private *tp,
+ struct RxDesc *desc)
+{
+ if (tp->InitRxDescType == RX_DESC_RING_TYPE_3) {
+ ((struct RxDescV3 *)desc)->addr = RTL8125_MAGIC_NUMBER;
+ ((struct RxDescV3 *)desc)->RxDescNormalDDWord4.opts1 &= ~cpu_to_le32(DescOwn | RsvdMaskV3);
+ } else {
+ desc->addr = RTL8125_MAGIC_NUMBER;
+ desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
+ }
+}
+
+static inline struct RxDesc*
+rtl8125_get_rxdesc(struct rtl8125_private *tp, struct RxDesc *RxDescBase, u32 const cur_rx)
+{
+ return (struct RxDesc*)((u8*)RxDescBase + (cur_rx * tp->RxDescLength));
+}
+
+static inline void
+rtl8125_disable_hw_interrupt_v2(struct rtl8125_private *tp,
+ u32 message_id)
+{
+ RTL_W32(tp, IMR_V2_CLEAR_REG_8125, BIT(message_id));
+}
+
+static inline void
+rtl8125_enable_hw_interrupt_v2(struct rtl8125_private *tp, u32 message_id)
+{
+ RTL_W32(tp, IMR_V2_SET_REG_8125, BIT(message_id));
+}
+
+int rtl8125_open(struct net_device *dev);
+int rtl8125_close(struct net_device *dev);
+void rtl8125_hw_config(struct net_device *dev);
+void rtl8125_hw_set_timer_int_8125(struct rtl8125_private *tp, u32 message_id, u8 timer_intmiti_val);
+void rtl8125_set_rx_q_num(struct rtl8125_private *tp, unsigned int num_rx_queues);
+void rtl8125_set_tx_q_num(struct rtl8125_private *tp, unsigned int num_tx_queues);
+void rtl8125_hw_start(struct net_device *dev);
+void rtl8125_hw_reset(struct net_device *dev);
+void rtl8125_tx_clear(struct rtl8125_private *tp);
+void rtl8125_rx_clear(struct rtl8125_private *tp);
+int rtl8125_init_ring(struct net_device *dev);
+void rtl8125_hw_set_rx_packet_filter(struct net_device *dev);
+void rtl8125_enable_hw_linkchg_interrupt(struct rtl8125_private *tp);
+int rtl8125_dump_tally_counter(struct rtl8125_private *tp, dma_addr_t paddr);
+void rtl8125_enable_napi(struct rtl8125_private *tp);
+void _rtl8125_wait_for_quiescence(struct net_device *dev);
+
+#ifndef ENABLE_LIB_SUPPORT
+static inline void rtl8125_lib_reset_prepare(struct rtl8125_private *tp) { }
+static inline void rtl8125_lib_reset_complete(struct rtl8125_private *tp) { }
+#endif
#define HW_SUPPORT_CHECK_PHY_DISABLE_MODE(_M) ((_M)->HwSuppCheckPhyDisableModeVer > 0 )
+#define HW_HAS_WRITE_PHY_MCU_RAM_CODE(_M) (((_M)->HwHasWrRamCodeToMicroP == TRUE) ? 1 : 0)
+#define HW_SUPPORT_D0_SPEED_UP(_M) ((_M)->HwSuppD0SpeedUpVer > 0)
+#define HW_SUPPORT_MAC_MCU(_M) ((_M)->HwSuppMacMcuVer > 0)
+
+#define HW_SUPP_PHY_LINK_SPEED_GIGA(_M) ((_M)->HwSuppMaxPhyLinkSpeed >= 1000)
+#define HW_SUPP_PHY_LINK_SPEED_2500M(_M) ((_M)->HwSuppMaxPhyLinkSpeed >= 2500)
+#define HW_SUPP_PHY_LINK_SPEED_5000M(_M) ((_M)->HwSuppMaxPhyLinkSpeed >= 5000)
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
#define netdev_mc_count(dev) ((dev)->mc_count)
@@ -1770,3 +2625,5 @@ void rtl8125_hw_disable_mac_mcu_bps(struct net_device *dev);
#define netdev_for_each_mc_addr(mclist, dev) \
for (mclist = dev->mc_list; mclist; mclist = mclist->next)
#endif
+
+#endif /* __R8125_H */
diff --git a/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_dash.h b/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_dash.h
old mode 100644
new mode 100755
index fb87f5ff3..6819370df
--- a/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_dash.h
+++ b/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_dash.h
@@ -1,10 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# controllers with PCI-Express interface.
#
-# Copyright(c) 2017 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@@ -34,6 +35,8 @@
#ifndef _LINUX_R8125_DASH_H
#define _LINUX_R8125_DASH_H
+#include
+
#define SIOCDEVPRIVATE_RTLDASH SIOCDEVPRIVATE+2
enum rtl_dash_cmd {
@@ -241,12 +244,12 @@ RX_DASH_BUFFER_TYPE_2, *PRX_DASH_BUFFER_TYPE_2;
#define CMAC_TXDESC_OFFSET 0x98 //TX: 0x98 - 0x9F
/* cmac write/read MMIO register */
-#define RTL_CMAC_W8(reg, val8) writeb ((val8), tp->cmac_ioaddr + (reg))
-#define RTL_CMAC_W16(reg, val16) writew ((val16), tp->cmac_ioaddr + (reg))
-#define RTL_CMAC_W32(reg, val32) writel ((val32), tp->cmac_ioaddr + (reg))
-#define RTL_CMAC_R8(reg) readb (tp->cmac_ioaddr + (reg))
-#define RTL_CMAC_R16(reg) readw (tp->cmac_ioaddr + (reg))
-#define RTL_CMAC_R32(reg) ((unsigned long) readl (tp->cmac_ioaddr + (reg)))
+#define RTL_CMAC_W8(tp, reg, val8) writeb ((val8), tp->cmac_ioaddr + (reg))
+#define RTL_CMAC_W16(tp, reg, val16) writew ((val16), tp->cmac_ioaddr + (reg))
+#define RTL_CMAC_W32(tp, reg, val32) writel ((val32), tp->cmac_ioaddr + (reg))
+#define RTL_CMAC_R8(tp, reg) readb (tp->cmac_ioaddr + (reg))
+#define RTL_CMAC_R16(tp, reg) readw (tp->cmac_ioaddr + (reg))
+#define RTL_CMAC_R32(tp, reg) ((unsigned long) readl (tp->cmac_ioaddr + (reg)))
int rtl8125_dash_ioctl(struct net_device *dev, struct ifreq *ifr);
void HandleDashInterrupt(struct net_device *dev);
diff --git a/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_firmware.c b/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_firmware.c
new file mode 100755
index 000000000..61b92d11c
--- /dev/null
+++ b/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_firmware.c
@@ -0,0 +1,264 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+################################################################################
+#
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see .
+#
+# Author:
+# Realtek NIC software team
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ * This product is covered by one or more of the following patents:
+ * US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+#include
+#include
+#include
+
+#include "r8125_firmware.h"
+
+enum rtl_fw_opcode {
+ PHY_READ = 0x0,
+ PHY_DATA_OR = 0x1,
+ PHY_DATA_AND = 0x2,
+ PHY_BJMPN = 0x3,
+ PHY_MDIO_CHG = 0x4,
+ PHY_CLEAR_READCOUNT = 0x7,
+ PHY_WRITE = 0x8,
+ PHY_READCOUNT_EQ_SKIP = 0x9,
+ PHY_COMP_EQ_SKIPN = 0xa,
+ PHY_COMP_NEQ_SKIPN = 0xb,
+ PHY_WRITE_PREVIOUS = 0xc,
+ PHY_SKIPN = 0xd,
+ PHY_DELAY_MS = 0xe,
+};
+
+struct fw_info {
+ u32 magic;
+ char version[RTL8125_VER_SIZE];
+ __le32 fw_start;
+ __le32 fw_len;
+ u8 chksum;
+} __packed;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,16,0)
+#define sizeof_field(TYPE, MEMBER) sizeof((((TYPE *)0)->MEMBER))
+#endif
+#define FW_OPCODE_SIZE sizeof_field(struct rtl8125_fw_phy_action, code[0])
+
+static bool rtl8125_fw_format_ok(struct rtl8125_fw *rtl_fw)
+{
+ const struct firmware *fw = rtl_fw->fw;
+ struct fw_info *fw_info = (struct fw_info *)fw->data;
+ struct rtl8125_fw_phy_action *pa = &rtl_fw->phy_action;
+
+ if (fw->size < FW_OPCODE_SIZE)
+ return false;
+
+ if (!fw_info->magic) {
+ size_t i, size, start;
+ u8 checksum = 0;
+
+ if (fw->size < sizeof(*fw_info))
+ return false;
+
+ for (i = 0; i < fw->size; i++)
+ checksum += fw->data[i];
+ if (checksum != 0)
+ return false;
+
+ start = le32_to_cpu(fw_info->fw_start);
+ if (start > fw->size)
+ return false;
+
+ size = le32_to_cpu(fw_info->fw_len);
+ if (size > (fw->size - start) / FW_OPCODE_SIZE)
+ return false;
+
+ strscpy(rtl_fw->version, fw_info->version, RTL8125_VER_SIZE);
+
+ pa->code = (__le32 *)(fw->data + start);
+ pa->size = size;
+ } else {
+ if (fw->size % FW_OPCODE_SIZE)
+ return false;
+
+ strscpy(rtl_fw->version, rtl_fw->fw_name, RTL8125_VER_SIZE);
+
+ pa->code = (__le32 *)fw->data;
+ pa->size = fw->size / FW_OPCODE_SIZE;
+ }
+
+ return true;
+}
+
+static bool rtl8125_fw_data_ok(struct rtl8125_fw *rtl_fw)
+{
+ struct rtl8125_fw_phy_action *pa = &rtl_fw->phy_action;
+ size_t index;
+
+ for (index = 0; index < pa->size; index++) {
+ u32 action = le32_to_cpu(pa->code[index]);
+ u32 val = action & 0x0000ffff;
+ u32 regno = (action & 0x0fff0000) >> 16;
+
+ switch (action >> 28) {
+ case PHY_READ:
+ case PHY_DATA_OR:
+ case PHY_DATA_AND:
+ case PHY_CLEAR_READCOUNT:
+ case PHY_WRITE:
+ case PHY_WRITE_PREVIOUS:
+ case PHY_DELAY_MS:
+ break;
+
+ case PHY_MDIO_CHG:
+ if (val > 1)
+ goto out;
+ break;
+
+ case PHY_BJMPN:
+ if (regno > index)
+ goto out;
+ break;
+ case PHY_READCOUNT_EQ_SKIP:
+ if (index + 2 >= pa->size)
+ goto out;
+ break;
+ case PHY_COMP_EQ_SKIPN:
+ case PHY_COMP_NEQ_SKIPN:
+ case PHY_SKIPN:
+ if (index + 1 + regno >= pa->size)
+ goto out;
+ break;
+
+ default:
+ dev_err(rtl_fw->dev, "Invalid action 0x%08x\n", action);
+ return false;
+ }
+ }
+
+ return true;
+out:
+ dev_err(rtl_fw->dev, "Out of range of firmware\n");
+ return false;
+}
+
+void rtl8125_fw_write_firmware(struct rtl8125_private *tp, struct rtl8125_fw *rtl_fw)
+{
+ struct rtl8125_fw_phy_action *pa = &rtl_fw->phy_action;
+ rtl8125_fw_write_t fw_write = rtl_fw->phy_write;
+ rtl8125_fw_read_t fw_read = rtl_fw->phy_read;
+ int predata = 0, count = 0;
+ size_t index;
+
+ for (index = 0; index < pa->size; index++) {
+ u32 action = le32_to_cpu(pa->code[index]);
+ u32 data = action & 0x0000ffff;
+ u32 regno = (action & 0x0fff0000) >> 16;
+ enum rtl_fw_opcode opcode = action >> 28;
+
+ if (!action)
+ break;
+
+ switch (opcode) {
+ case PHY_READ:
+ predata = fw_read(tp, regno);
+ count++;
+ break;
+ case PHY_DATA_OR:
+ predata |= data;
+ break;
+ case PHY_DATA_AND:
+ predata &= data;
+ break;
+ case PHY_BJMPN:
+ index -= (regno + 1);
+ break;
+ case PHY_MDIO_CHG:
+ if (data) {
+ fw_write = rtl_fw->mac_mcu_write;
+ fw_read = rtl_fw->mac_mcu_read;
+ } else {
+ fw_write = rtl_fw->phy_write;
+ fw_read = rtl_fw->phy_read;
+ }
+
+ break;
+ case PHY_CLEAR_READCOUNT:
+ count = 0;
+ break;
+ case PHY_WRITE:
+ fw_write(tp, regno, data);
+ break;
+ case PHY_READCOUNT_EQ_SKIP:
+ if (count == data)
+ index++;
+ break;
+ case PHY_COMP_EQ_SKIPN:
+ if (predata == data)
+ index += regno;
+ break;
+ case PHY_COMP_NEQ_SKIPN:
+ if (predata != data)
+ index += regno;
+ break;
+ case PHY_WRITE_PREVIOUS:
+ fw_write(tp, regno, predata);
+ break;
+ case PHY_SKIPN:
+ index += regno;
+ break;
+ case PHY_DELAY_MS:
+ mdelay(data);
+ break;
+ }
+ }
+}
+
+void rtl8125_fw_release_firmware(struct rtl8125_fw *rtl_fw)
+{
+ release_firmware(rtl_fw->fw);
+}
+
+int rtl8125_fw_request_firmware(struct rtl8125_fw *rtl_fw)
+{
+ int rc;
+
+ rc = request_firmware(&rtl_fw->fw, rtl_fw->fw_name, rtl_fw->dev);
+ if (rc < 0)
+ goto out;
+
+ if (!rtl8125_fw_format_ok(rtl_fw) || !rtl8125_fw_data_ok(rtl_fw)) {
+ release_firmware(rtl_fw->fw);
+ rc = -EINVAL;
+ goto out;
+ }
+
+ return 0;
+out:
+ dev_err(rtl_fw->dev, "Unable to load firmware %s (%d)\n",
+ rtl_fw->fw_name, rc);
+ return rc;
+}
diff --git a/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_firmware.h b/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_firmware.h
new file mode 100755
index 000000000..df97bf9b1
--- /dev/null
+++ b/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_firmware.h
@@ -0,0 +1,68 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+################################################################################
+#
+# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see .
+#
+# Author:
+# Realtek NIC software team
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ * This product is covered by one or more of the following patents:
+ * US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+#ifndef _LINUX_rtl8125_FIRMWARE_H
+#define _LINUX_rtl8125_FIRMWARE_H
+
+#include
+#include
+
+struct rtl8125_private;
+typedef void (*rtl8125_fw_write_t)(struct rtl8125_private *tp, u16 reg, u16 val);
+typedef u32 (*rtl8125_fw_read_t)(struct rtl8125_private *tp, u16 reg);
+
+#define RTL8125_VER_SIZE 32
+
+struct rtl8125_fw {
+ rtl8125_fw_write_t phy_write;
+ rtl8125_fw_read_t phy_read;
+ rtl8125_fw_write_t mac_mcu_write;
+ rtl8125_fw_read_t mac_mcu_read;
+ const struct firmware *fw;
+ const char *fw_name;
+ struct device *dev;
+
+ char version[RTL8125_VER_SIZE];
+
+ struct rtl8125_fw_phy_action {
+ __le32 *code;
+ size_t size;
+ } phy_action;
+};
+
+int rtl8125_fw_request_firmware(struct rtl8125_fw *rtl_fw);
+void rtl8125_fw_release_firmware(struct rtl8125_fw *rtl_fw);
+void rtl8125_fw_write_firmware(struct rtl8125_private *tp, struct rtl8125_fw *rtl_fw);
+
+#endif /* _LINUX_rtl8125_FIRMWARE_H */
diff --git a/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_n.c b/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_n.c
old mode 100644
new mode 100755
index a83f3f128..6ca720137
--- a/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_n.c
+++ b/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_n.c
@@ -1,10 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# controllers with PCI-Express interface.
#
-# Copyright(c) 2018 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@@ -57,8 +58,10 @@
#include
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0)
#include
#endif
+#endif
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37)
#include
#endif
@@ -80,17 +83,37 @@
#include "r8125.h"
#include "rtl_eeprom.h"
#include "rtltool.h"
+#include "r8125_firmware.h"
#ifdef ENABLE_R8125_PROCFS
#include
#include
#endif
+#define FIRMWARE_8125A_3 "rtl_nic/rtl8125a-3.fw"
+#define FIRMWARE_8125B_2 "rtl_nic/rtl8125b-2.fw"
+#define FIRMWARE_8126A_1 "rtl_nic/rtl8126a-1.fw"
+
/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
The RTL chips use a 64 element hash table based on the Ethernet CRC. */
static const int multicast_filter_limit = 32;
-#define _R(NAME,MAC,RCR,MASK, JumFrameSz) \
+static const struct {
+ const char *name;
+ const char *fw_name;
+} rtl_chip_fw_infos[] = {
+ /* PCI-E devices. */
+ [CFG_METHOD_2] = {"RTL8125A" },
+ [CFG_METHOD_3] = {"RTL8125A", FIRMWARE_8125A_3},
+ [CFG_METHOD_4] = {"RTL8125B", },
+ [CFG_METHOD_5] = {"RTL8125B", FIRMWARE_8125B_2},
+ [CFG_METHOD_6] = {"RTL8168KB", FIRMWARE_8125A_3},
+ [CFG_METHOD_7] = {"RTL8168KB", FIRMWARE_8125B_2},
+ [CFG_METHOD_8] = {"RTL8126A", FIRMWARE_8126A_1},
+ [CFG_METHOD_DEFAULT] = {"Unknown", },
+};
+
+#define _R(NAME,MAC,RCR,MASK,JumFrameSz) \
{ .name = NAME, .mcfg = MAC, .RCR_Cfg = RCR, .RxConfigMask = MASK, .jumbo_frame_sz = JumFrameSz }
static const struct {
@@ -100,15 +123,45 @@ static const struct {
u32 RxConfigMask; /* Clears the bits supported by this chip */
u32 jumbo_frame_sz;
} rtl_chip_info[] = {
- _R("RTL8125",
+ _R("RTL8125A",
CFG_METHOD_2,
- BIT_30 | BIT_22 | BIT_23 | (RX_DMA_BURST << RxCfgDMAShift),
+ BIT_30 | EnableInnerVlan | EnableOuterVlan | (RX_DMA_BURST << RxCfgDMAShift),
0xff7e5880,
Jumbo_Frame_9k),
- _R("RTL8125",
+ _R("RTL8125A",
CFG_METHOD_3,
- BIT_30 | BIT_22 | BIT_23 | (RX_DMA_BURST << RxCfgDMAShift),
+ BIT_30 | EnableInnerVlan | EnableOuterVlan | (RX_DMA_BURST << RxCfgDMAShift),
+ 0xff7e5880,
+ Jumbo_Frame_9k),
+
+ _R("RTL8125B",
+ CFG_METHOD_4,
+ BIT_30 | RxCfg_pause_slot_en | EnableInnerVlan | EnableOuterVlan | (RX_DMA_BURST << RxCfgDMAShift),
+ 0xff7e5880,
+ Jumbo_Frame_9k),
+
+ _R("RTL8125B",
+ CFG_METHOD_5,
+ BIT_30 | RxCfg_pause_slot_en | EnableInnerVlan | EnableOuterVlan | (RX_DMA_BURST << RxCfgDMAShift),
+ 0xff7e5880,
+ Jumbo_Frame_9k),
+
+ _R("RTL8168KB",
+ CFG_METHOD_6,
+ BIT_30 | EnableInnerVlan | EnableOuterVlan | (RX_DMA_BURST << RxCfgDMAShift),
+ 0xff7e5880,
+ Jumbo_Frame_9k),
+
+ _R("RTL8168KB",
+ CFG_METHOD_7,
+ BIT_30 | RxCfg_pause_slot_en | EnableInnerVlan | EnableOuterVlan | (RX_DMA_BURST << RxCfgDMAShift),
+ 0xff7e5880,
+ Jumbo_Frame_9k),
+
+ _R("RTL8126A",
+ CFG_METHOD_8,
+ BIT_30 | RxCfg_pause_slot_en | EnableInnerVlan | EnableOuterVlan | (RX_DMA_BURST << RxCfgDMAShift),
0xff7e5880,
Jumbo_Frame_9k),
@@ -120,27 +173,31 @@ static const struct {
};
#undef _R
+
#ifndef PCI_VENDOR_ID_DLINK
#define PCI_VENDOR_ID_DLINK 0x1186
#endif
static struct pci_device_id rtl8125_pci_tbl[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8125), },
+ { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8162), },
{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x3000), },
+ { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8126), },
+ { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x5000), },
{0,},
};
MODULE_DEVICE_TABLE(pci, rtl8125_pci_tbl);
-static int rx_copybreak = 0;
static int use_dac = 1;
static int timer_count = 0x2600;
+static int timer_count_v2 = (0x2600 / 0x100);
static struct {
u32 msg_enable;
} debug = { -1 };
-static unsigned int speed_mode = SPEED_2500;
+static unsigned int speed_mode = SPEED_5000;
static unsigned int duplex_mode = DUPLEX_FULL;
static unsigned int autoneg_mode = AUTONEG_ENABLE;
static unsigned int advertising_mode = ADVERTISED_10baseT_Half |
@@ -180,9 +237,30 @@ static int s0_magic_packet = 1;
#else
static int s0_magic_packet = 0;
#endif
+#ifdef ENABLE_TX_NO_CLOSE
+static int tx_no_close_enable = 1;
+#else
+static int tx_no_close_enable = 0;
+#endif
+#ifdef ENABLE_PTP_MASTER_MODE
+static int enable_ptp_master_mode = 1;
+#else
+static int enable_ptp_master_mode = 0;
+#endif
+#ifdef DISABLE_PM_SUPPORT
+static int disable_pm_support = 1;
+#else
+static int disable_pm_support = 0;
+#endif
+
+#ifdef ENABLE_DOUBLE_VLAN
+static int enable_double_vlan = 1;
+#else
+static int enable_double_vlan = 0;
+#endif
MODULE_AUTHOR("Realtek and the Linux r8125 crew ");
-MODULE_DESCRIPTION("RealTek RTL8125 2.5Gigabit Ethernet driver");
+MODULE_DESCRIPTION("Realtek RTL8125 2.5Gigabit Ethernet driver");
module_param(speed_mode, uint, 0);
MODULE_PARM_DESC(speed_mode, "force phy operation. Deprecated by ethtool (8).");
@@ -205,9 +283,6 @@ MODULE_PARM_DESC(s5wol, "Enable Shutdown Wake On Lan.");
module_param(s5_keep_curr_mac, int, 0);
MODULE_PARM_DESC(s5_keep_curr_mac, "Enable Shutdown Keep Current MAC Address.");
-module_param(rx_copybreak, int, 0);
-MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
-
module_param(use_dac, int, 0);
MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
@@ -223,57 +298,81 @@ MODULE_PARM_DESC(hwoptimize, "Enable HW optimization function.");
module_param(s0_magic_packet, int, 0);
MODULE_PARM_DESC(s0_magic_packet, "Enable S0 Magic Packet.");
+module_param(tx_no_close_enable, int, 0);
+MODULE_PARM_DESC(tx_no_close_enable, "Enable TX No Close.");
+
+module_param(enable_ptp_master_mode, int, 0);
+MODULE_PARM_DESC(enable_ptp_master_mode, "Enable PTP Master Mode.");
+
+module_param(disable_pm_support, int, 0);
+MODULE_PARM_DESC(disable_pm_support, "Disable PM support.");
+
+module_param(enable_double_vlan, int, 0);
+MODULE_PARM_DESC(enable_double_vlan, "Enable Double VLAN.");
+
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
module_param_named(debug, debug.msg_enable, int, 0);
MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
#endif//LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
MODULE_LICENSE("GPL");
+#ifdef ENABLE_USE_FIRMWARE_FILE
+MODULE_FIRMWARE(FIRMWARE_8125A_3);
+MODULE_FIRMWARE(FIRMWARE_8125B_2);
+#endif
MODULE_VERSION(RTL8125_VERSION);
+/*
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
static void rtl8125_esd_timer(unsigned long __opaque);
#else
static void rtl8125_esd_timer(struct timer_list *t);
#endif
+*/
+/*
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
static void rtl8125_link_timer(unsigned long __opaque);
#else
static void rtl8125_link_timer(struct timer_list *t);
#endif
-static void rtl8125_tx_clear(struct rtl8125_private *tp);
-static void rtl8125_rx_clear(struct rtl8125_private *tp);
+*/
-static int rtl8125_open(struct net_device *dev);
-static int rtl8125_start_xmit(struct sk_buff *skb, struct net_device *dev);
+static netdev_tx_t rtl8125_start_xmit(struct sk_buff *skb, struct net_device *dev);
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
static irqreturn_t rtl8125_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
#else
static irqreturn_t rtl8125_interrupt(int irq, void *dev_instance);
#endif
-static int rtl8125_init_ring(struct net_device *dev);
-static void rtl8125_hw_config(struct net_device *dev);
-static void rtl8125_hw_start(struct net_device *dev);
-static int rtl8125_close(struct net_device *dev);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+static irqreturn_t rtl8125_interrupt_msix(int irq, void *dev_instance, struct pt_regs *regs);
+#else
+static irqreturn_t rtl8125_interrupt_msix(int irq, void *dev_instance);
+#endif
static void rtl8125_set_rx_mode(struct net_device *dev);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0)
+static void rtl8125_tx_timeout(struct net_device *dev, unsigned int txqueue);
+#else
static void rtl8125_tx_timeout(struct net_device *dev);
-static struct net_device_stats *rtl8125_get_stats(struct net_device *dev);
-static int rtl8125_rx_interrupt(struct net_device *, struct rtl8125_private *, void __iomem *, napi_budget);
+#endif
+static int rtl8125_rx_interrupt(struct net_device *, struct rtl8125_private *, struct rtl8125_rx_ring *, napi_budget);
+static int rtl8125_tx_interrupt(struct rtl8125_tx_ring *ring, int budget);
+static int rtl8125_tx_interrupt_with_vector(struct rtl8125_private *tp, const int message_id, int budget);
+static void rtl8125_wait_for_quiescence(struct net_device *dev);
static int rtl8125_change_mtu(struct net_device *dev, int new_mtu);
static void rtl8125_down(struct net_device *dev);
static int rtl8125_set_mac_address(struct net_device *dev, void *p);
-static void rtl8125_rar_set(struct rtl8125_private *tp, uint8_t *addr);
+static void rtl8125_rar_set(struct rtl8125_private *tp, const u8 *addr);
static void rtl8125_desc_addr_fill(struct rtl8125_private *);
static void rtl8125_tx_desc_init(struct rtl8125_private *tp);
static void rtl8125_rx_desc_init(struct rtl8125_private *tp);
-static void rtl8125_hw_reset(struct net_device *dev);
-
+static u32 mdio_direct_read_phy_ocp(struct rtl8125_private *tp, u16 RegAddr);
+static u16 rtl8125_get_hw_phy_mcu_code_ver(struct rtl8125_private *tp);
static void rtl8125_phy_power_up(struct net_device *dev);
static void rtl8125_phy_power_down(struct net_device *dev);
-static int rtl8125_set_speed(struct net_device *dev, u8 autoneg, u32 speed, u8 duplex, u32 adv);
+static int rtl8125_set_speed(struct net_device *dev, u8 autoneg, u32 speed, u8 duplex, u64 adv);
static bool rtl8125_set_phy_mcu_patch_request(struct rtl8125_private *tp);
static bool rtl8125_clear_phy_mcu_patch_request(struct rtl8125_private *tp);
@@ -281,6 +380,26 @@ static bool rtl8125_clear_phy_mcu_patch_request(struct rtl8125_private *tp);
static int rtl8125_poll(napi_ptr napi, napi_budget budget);
#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
+static void rtl8125_reset_task(void *_data);
+static void rtl8125_esd_task(void *_data);
+static void rtl8125_linkchg_task(void *_data);
+#else
+static void rtl8125_reset_task(struct work_struct *work);
+static void rtl8125_esd_task(struct work_struct *work);
+static void rtl8125_linkchg_task(struct work_struct *work);
+#endif
+static void rtl8125_schedule_reset_work(struct rtl8125_private *tp);
+static void rtl8125_schedule_esd_work(struct rtl8125_private *tp);
+static void rtl8125_schedule_linkchg_work(struct rtl8125_private *tp);
+static void rtl8125_init_all_schedule_work(struct rtl8125_private *tp);
+static void rtl8125_cancel_all_schedule_work(struct rtl8125_private *tp);
+
+static inline struct device *tp_to_dev(struct rtl8125_private *tp)
+{
+ return &tp->pci_dev->dev;
+}
+
#if ((LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) && \
LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,00)))
void ethtool_convert_legacy_u32_to_link_mode(unsigned long *dst,
@@ -410,7 +529,7 @@ static inline void eth_copy_and_sum (struct sk_buff *dest,
const unsigned char *src,
int len, int base)
{
- memcpy (dest->data, src, len);
+ skb_copy_to_linear_data(dest, src, len);
}
#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22)
@@ -550,21 +669,202 @@ static inline struct mii_ioctl_data *if_mii(struct ifreq *rq)
}
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7)
-struct rtl8125_counters {
- u64 tx_packets;
- u64 rx_packets;
- u64 tx_errors;
- u32 rx_errors;
- u16 rx_missed;
- u16 align_errors;
- u32 tx_one_collision;
- u32 tx_multi_collision;
- u64 rx_unicast;
- u64 rx_broadcast;
- u32 rx_multicast;
- u16 tx_aborted;
- u16 tx_underun;
-};
+static u32 rtl8125_read_thermal_sensor(struct rtl8125_private *tp)
+{
+ u16 ts_digout;
+
+ switch (tp->mcfg) {
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
+ ts_digout = mdio_direct_read_phy_ocp(tp, 0xBD84);
+ ts_digout &= 0x3ff;
+ break;
+ default:
+ ts_digout = 0xffff;
+ break;
+ }
+
+ return ts_digout;
+}
+
+int rtl8125_dump_tally_counter(struct rtl8125_private *tp, dma_addr_t paddr)
+{
+ u32 cmd;
+ u32 WaitCnt;
+ int retval = -1;
+
+ RTL_W32(tp, CounterAddrHigh, (u64)paddr >> 32);
+ cmd = (u64)paddr & DMA_BIT_MASK(32);
+ RTL_W32(tp, CounterAddrLow, cmd);
+ RTL_W32(tp, CounterAddrLow, cmd | CounterDump);
+
+ WaitCnt = 0;
+ while (RTL_R32(tp, CounterAddrLow) & CounterDump) {
+ udelay(10);
+
+ WaitCnt++;
+ if (WaitCnt > 20)
+ break;
+ }
+
+ if (WaitCnt <= 20)
+ retval = 0;
+
+ return retval;
+}
+
+static u32 rtl8125_convert_link_speed(u16 status)
+{
+ u32 speed = SPEED_UNKNOWN;
+
+ if (status & LinkStatus) {
+ if (status & _5000bpsF)
+ speed = SPEED_5000;
+ else if (status & _2500bpsF)
+ speed = SPEED_2500;
+ else if (status & _1000bpsF)
+ speed = SPEED_1000;
+ else if (status & _100bps)
+ speed = SPEED_100;
+ else if (status & _10bps)
+ speed = SPEED_10;
+ }
+
+ return speed;
+}
+
+static void rtl8125_get_cp_len(struct rtl8125_private *tp,
+ u16 cp_len[RTL8125_CP_NUM])
+{
+ int i;
+ int count;
+ u16 status;
+ u16 tmp_cp_len = 0;
+
+ status = RTL_R16(tp, PHYstatus);
+ if (status & LinkStatus) {
+ if (status & _10bps) {
+ tmp_cp_len = 0;
+ goto no_cpdr;
+ } else if (status & _1000bpsF) {
+ rtl8125_mdio_write(tp, 0x1f, 0x0a88);
+ tmp_cp_len = rtl8125_mdio_read(tp, 0x10);
+ goto no_cpdr;
+ } else if (status & _2500bpsF) {
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_6:
+ rtl8125_mdio_write(tp, 0x1f, 0x0ac5);
+ tmp_cp_len = rtl8125_mdio_read(tp, 0x14) >> 4;
+ break;
+ default:
+ rtl8125_mdio_write(tp, 0x1f, 0x0acb);
+ tmp_cp_len = rtl8125_mdio_read(tp, 0x15) >> 2;
+ break;
+ }
+ goto no_cpdr;
+ }
+ }
+
+ rtl8125_mdio_write(tp, 0x1f, 0x0a42);
+ rtl8125_mdio_write(tp, 0x11, 0x0000);
+ rtl8125_set_eth_phy_bit(tp, 0x11, 0xf0);
+ rtl8125_set_eth_phy_bit(tp, 0x11, 0x01);
+
+ count = 0;
+ while (!(rtl8125_mdio_read(tp, 0x11) & BIT_15) &&
+ (count++ < 200))
+ msleep(100);
+
+ rtl8125_mdio_write(tp, 0x1f, 0x0a43);
+ for (i=0; i 200)
+ tmp_cp_len = 0;
+ cp_len[i] = tmp_cp_len;
+ }
+
+ goto exit;
+
+no_cpdr:
+ tmp_cp_len &= 0xff;
+ for (i=0; i RTL8125_MAX_SUPPORT_cp_len)
+ cp_len[i] = RTL8125_MAX_SUPPORT_cp_len;
+
+ return;
+}
+
+static int _rtl8125_get_cp_status(u16 val)
+{
+ switch (val) {
+ case 0x0060:
+ return rtl8125_cp_normal;
+ case 0x0042:
+ case 0x0048:
+ return rtl8125_cp_open;
+ case 0x0044:
+ case 0x0050:
+ return rtl8125_cp_short;
+ default:
+ return rtl8125_cp_normal;
+ }
+}
+
+static int rtl8125_get_cp_status(struct rtl8125_private *tp, u8 pair_num)
+{
+ u16 val;
+ int cp_status = rtl8125_cp_unknown;
+
+ if (pair_num > 3)
+ goto exit;
+
+ rtl8125_mdio_write(tp, 0x1f, 0x0a43);
+ rtl8125_mdio_write(tp, 0x13, 0x8027 + 4 * pair_num);
+ val = rtl8125_mdio_read(tp, 0x14);
+ rtl8125_mdio_write(tp, 0x1f, 0x0000);
+
+ cp_status = _rtl8125_get_cp_status(val);
+
+exit:
+ return cp_status;
+}
+
+static const char * rtl8125_get_cp_status_string(int cp_status)
+{
+ switch(cp_status) {
+ case rtl8125_cp_normal:
+ return "normal";
+ case rtl8125_cp_short:
+ return "short";
+ case rtl8125_cp_open:
+ return "open";
+ default:
+ return "unknown";
+ }
+}
+
+static void rtl8125_get_cp(struct rtl8125_private *tp,
+ u16 cp_len[RTL8125_CP_NUM],
+ int cp_status[RTL8125_CP_NUM])
+{
+ int i;
+
+ rtl8125_get_cp_len(tp, cp_len);
+ for (i =0; iprivate;
struct rtl8125_private *tp = netdev_priv(dev);
- unsigned long flags;
seq_puts(m, "\nDump Driver Variable\n");
- spin_lock_irqsave(&tp->lock, flags);
+ rtnl_lock();
+
seq_puts(m, "Variable\tValue\n----------\t-----\n");
seq_printf(m, "MODULENAME\t%s\n", MODULENAME);
seq_printf(m, "driver version\t%s\n", RTL8125_VERSION);
+ seq_printf(m, "mcfg\t%d\n", tp->mcfg);
seq_printf(m, "chipset\t%d\n", tp->chipset);
seq_printf(m, "chipset_name\t%s\n", rtl_chip_info[tp->chipset].name);
seq_printf(m, "mtu\t%d\n", dev->mtu);
- seq_printf(m, "NUM_RX_DESC\t0x%x\n", NUM_RX_DESC);
- seq_printf(m, "cur_rx\t0x%x\n", tp->cur_rx);
- seq_printf(m, "dirty_rx\t0x%x\n", tp->dirty_rx);
- seq_printf(m, "NUM_TX_DESC\t0x%x\n", NUM_TX_DESC);
- seq_printf(m, "cur_tx\t0x%x\n", tp->cur_tx);
- seq_printf(m, "dirty_tx\t0x%x\n", tp->dirty_tx);
+ seq_printf(m, "NUM_RX_DESC\t0x%x\n", tp->rx_ring[0].num_rx_desc);
+ seq_printf(m, "cur_rx0\t0x%x\n", tp->rx_ring[0].cur_rx);
+ seq_printf(m, "dirty_rx0\t0x%x\n", tp->rx_ring[0].dirty_rx);
+ seq_printf(m, "cur_rx1\t0x%x\n", tp->rx_ring[1].cur_rx);
+ seq_printf(m, "dirty_rx1\t0x%x\n", tp->rx_ring[1].dirty_rx);
+ seq_printf(m, "cur_rx2\t0x%x\n", tp->rx_ring[2].cur_rx);
+ seq_printf(m, "dirty_rx2\t0x%x\n", tp->rx_ring[2].dirty_rx);
+ seq_printf(m, "cur_rx3\t0x%x\n", tp->rx_ring[3].cur_rx);
+ seq_printf(m, "dirty_rx3\t0x%x\n", tp->rx_ring[3].dirty_rx);
+ seq_printf(m, "NUM_TX_DESC\t0x%x\n", tp->tx_ring[0].num_tx_desc);
+ seq_printf(m, "cur_tx0\t0x%x\n", tp->tx_ring[0].cur_tx);
+ seq_printf(m, "dirty_tx0\t0x%x\n", tp->tx_ring[0].dirty_tx);
+ seq_printf(m, "cur_tx1\t0x%x\n", tp->tx_ring[1].cur_tx);
+ seq_printf(m, "dirty_tx1\t0x%x\n", tp->tx_ring[1].dirty_tx);
seq_printf(m, "rx_buf_sz\t0x%x\n", tp->rx_buf_sz);
+#ifdef ENABLE_PAGE_REUSE
+ seq_printf(m, "rx_buf_page_order\t0x%x\n", tp->rx_buf_page_order);
+ seq_printf(m, "rx_buf_page_size\t0x%x\n", tp->rx_buf_page_size);
+ seq_printf(m, "page_reuse_fail_cnt\t0x%x\n", tp->page_reuse_fail_cnt);
+#endif //ENABLE_PAGE_REUSE
seq_printf(m, "esd_flag\t0x%x\n", tp->esd_flag);
seq_printf(m, "pci_cfg_is_read\t0x%x\n", tp->pci_cfg_is_read);
seq_printf(m, "rtl8125_rx_config\t0x%x\n", tp->rtl8125_rx_config);
@@ -611,7 +925,7 @@ static int proc_get_driver_variable(struct seq_file *m, void *v)
seq_printf(m, "autoneg\t0x%x\n", tp->autoneg);
seq_printf(m, "duplex\t0x%x\n", tp->duplex);
seq_printf(m, "speed\t%d\n", tp->speed);
- seq_printf(m, "advertising\t0x%x\n", tp->advertising);
+ seq_printf(m, "advertising\t0x%llx\n", tp->advertising);
seq_printf(m, "eeprom_len\t0x%x\n", tp->eeprom_len);
seq_printf(m, "cur_page\t0x%x\n", tp->cur_page);
seq_printf(m, "bios_setting\t0x%x\n", tp->bios_setting);
@@ -631,6 +945,7 @@ static int proc_get_driver_variable(struct seq_file *m, void *v)
seq_printf(m, "rtk_enable_diag\t0x%x\n", tp->rtk_enable_diag);
seq_printf(m, "ShortPacketSwChecksum\t0x%x\n", tp->ShortPacketSwChecksum);
seq_printf(m, "UseSwPaddingShortPkt\t0x%x\n", tp->UseSwPaddingShortPkt);
+ seq_printf(m, "RequireRduNonStopPatch\t0x%x\n", tp->RequireRduNonStopPatch);
seq_printf(m, "RequireAdcBiasPatch\t0x%x\n", tp->RequireAdcBiasPatch);
seq_printf(m, "AdcBiasPatchIoffset\t0x%x\n", tp->AdcBiasPatchIoffset);
seq_printf(m, "RequireAdjustUpsTxLinkPulseTiming\t0x%x\n", tp->RequireAdjustUpsTxLinkPulseTiming);
@@ -652,21 +967,50 @@ static int proc_get_driver_variable(struct seq_file *m, void *v)
seq_printf(m, "aspm\t0x%x\n", aspm);
seq_printf(m, "s5wol\t0x%x\n", s5wol);
seq_printf(m, "s5_keep_curr_mac\t0x%x\n", s5_keep_curr_mac);
- seq_printf(m, "eee_enable\t0x%x\n", eee_enable);
+ seq_printf(m, "eee_enable\t0x%x\n", tp->eee.eee_enabled);
seq_printf(m, "hwoptimize\t0x%lx\n", hwoptimize);
seq_printf(m, "proc_init_num\t0x%x\n", proc_init_num);
seq_printf(m, "s0_magic_packet\t0x%x\n", s0_magic_packet);
+ seq_printf(m, "disable_pm_support\t0x%x\n", disable_pm_support);
+ seq_printf(m, "enable_double_vlan\t0x%x\n", enable_double_vlan);
seq_printf(m, "HwSuppMagicPktVer\t0x%x\n", tp->HwSuppMagicPktVer);
+ seq_printf(m, "HwSuppLinkChgWakeUpVer\t0x%x\n", tp->HwSuppLinkChgWakeUpVer);
+ seq_printf(m, "HwSuppD0SpeedUpVer\t0x%x\n", tp->HwSuppD0SpeedUpVer);
+ seq_printf(m, "D0SpeedUpSpeed\t0x%x\n", tp->D0SpeedUpSpeed);
seq_printf(m, "HwSuppCheckPhyDisableModeVer\t0x%x\n", tp->HwSuppCheckPhyDisableModeVer);
seq_printf(m, "HwPkgDet\t0x%x\n", tp->HwPkgDet);
- seq_printf(m, "HwSuppGigaForceMode\t0x%x\n", tp->HwSuppGigaForceMode);
+ seq_printf(m, "HwSuppTxNoCloseVer\t0x%x\n", tp->HwSuppTxNoCloseVer);
+ seq_printf(m, "EnableTxNoClose\t0x%x\n", tp->EnableTxNoClose);
+ seq_printf(m, "NextHwDesCloPtr0\t0x%x\n", tp->tx_ring[0].NextHwDesCloPtr);
+ seq_printf(m, "BeginHwDesCloPtr0\t0x%x\n", tp->tx_ring[0].BeginHwDesCloPtr);
+ seq_printf(m, "NextHwDesCloPtr1\t0x%x\n", tp->tx_ring[1].NextHwDesCloPtr);
+ seq_printf(m, "BeginHwDesCloPtr1\t0x%x\n", tp->tx_ring[1].BeginHwDesCloPtr);
+ seq_printf(m, "InitRxDescType\t0x%x\n", tp->InitRxDescType);
+ seq_printf(m, "RxDescLength\t0x%x\n", tp->RxDescLength);
+ seq_printf(m, "num_rx_rings\t0x%x\n", tp->num_rx_rings);
+ seq_printf(m, "num_tx_rings\t0x%x\n", tp->num_tx_rings);
+ seq_printf(m, "tot_rx_rings\t0x%x\n", rtl8125_tot_rx_rings(tp));
+ seq_printf(m, "tot_tx_rings\t0x%x\n", rtl8125_tot_tx_rings(tp));
+ seq_printf(m, "EnableRss\t0x%x\n", tp->EnableRss);
+ seq_printf(m, "EnablePtp\t0x%x\n", tp->EnablePtp);
+ seq_printf(m, "ptp_master_mode\t0x%x\n", tp->ptp_master_mode);
+ seq_printf(m, "min_irq_nvecs\t0x%x\n", tp->min_irq_nvecs);
+ seq_printf(m, "irq_nvecs\t0x%x\n", tp->irq_nvecs);
+ seq_printf(m, "ring_lib_enabled\t0x%x\n", tp->ring_lib_enabled);
+ seq_printf(m, "HwSuppIsrVer\t0x%x\n", tp->HwSuppIsrVer);
+ seq_printf(m, "HwCurrIsrVer\t0x%x\n", tp->HwCurrIsrVer);
+#ifdef ENABLE_PTP_SUPPORT
+ seq_printf(m, "tx_hwtstamp_timeouts\t0x%x\n", tp->tx_hwtstamp_timeouts);
+ seq_printf(m, "tx_hwtstamp_skipped\t0x%x\n", tp->tx_hwtstamp_skipped);
+#endif
seq_printf(m, "random_mac\t0x%x\n", tp->random_mac);
seq_printf(m, "org_mac_addr\t%pM\n", tp->org_mac_addr);
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
seq_printf(m, "perm_addr\t%pM\n", dev->perm_addr);
#endif
seq_printf(m, "dev_addr\t%pM\n", dev->dev_addr);
- spin_unlock_irqrestore(&tp->lock, flags);
+
+ rtnl_unlock();
seq_putc(m, '\n');
return 0;
@@ -676,55 +1020,69 @@ static int proc_get_tally_counter(struct seq_file *m, void *v)
{
struct net_device *dev = m->private;
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
struct rtl8125_counters *counters;
dma_addr_t paddr;
- u32 cmd;
- u32 WaitCnt;
- unsigned long flags;
seq_puts(m, "\nDump Tally Counter\n");
- //ASSERT_RTNL();
+ rtnl_lock();
counters = tp->tally_vaddr;
paddr = tp->tally_paddr;
if (!counters) {
seq_puts(m, "\nDump Tally Counter Fail\n");
- return 0;
+ goto out_unlock;
}
- spin_lock_irqsave(&tp->lock, flags);
- RTL_W32(CounterAddrHigh, (u64)paddr >> 32);
- cmd = (u64)paddr & DMA_BIT_MASK(32);
- RTL_W32(CounterAddrLow, cmd);
- RTL_W32(CounterAddrLow, cmd | CounterDump);
-
- WaitCnt = 0;
- while (RTL_R32(CounterAddrLow) & CounterDump) {
- udelay(10);
-
- WaitCnt++;
- if (WaitCnt > 20)
- break;
- }
- spin_unlock_irqrestore(&tp->lock, flags);
+ rtl8125_dump_tally_counter(tp, paddr);
seq_puts(m, "Statistics\tValue\n----------\t-----\n");
seq_printf(m, "tx_packets\t%lld\n", le64_to_cpu(counters->tx_packets));
seq_printf(m, "rx_packets\t%lld\n", le64_to_cpu(counters->rx_packets));
seq_printf(m, "tx_errors\t%lld\n", le64_to_cpu(counters->tx_errors));
- seq_printf(m, "rx_missed\t%lld\n", le64_to_cpu(counters->rx_missed));
- seq_printf(m, "align_errors\t%lld\n", le64_to_cpu(counters->align_errors));
- seq_printf(m, "tx_one_collision\t%lld\n", le64_to_cpu(counters->tx_one_collision));
- seq_printf(m, "tx_multi_collision\t%lld\n", le64_to_cpu(counters->tx_multi_collision));
+ seq_printf(m, "rx_errors\t%d\n", le32_to_cpu(counters->rx_errors));
+ seq_printf(m, "rx_missed\t%d\n", le16_to_cpu(counters->rx_missed));
+ seq_printf(m, "align_errors\t%d\n", le16_to_cpu(counters->align_errors));
+ seq_printf(m, "tx_one_collision\t%d\n", le32_to_cpu(counters->tx_one_collision));
+ seq_printf(m, "tx_multi_collision\t%d\n", le32_to_cpu(counters->tx_multi_collision));
seq_printf(m, "rx_unicast\t%lld\n", le64_to_cpu(counters->rx_unicast));
seq_printf(m, "rx_broadcast\t%lld\n", le64_to_cpu(counters->rx_broadcast));
- seq_printf(m, "rx_multicast\t%lld\n", le64_to_cpu(counters->rx_multicast));
- seq_printf(m, "tx_aborted\t%lld\n", le64_to_cpu(counters->tx_aborted));
- seq_printf(m, "tx_underun\t%lld\n", le64_to_cpu(counters->tx_underun));
+ seq_printf(m, "rx_multicast\t%d\n", le32_to_cpu(counters->rx_multicast));
+ seq_printf(m, "tx_aborted\t%d\n", le16_to_cpu(counters->tx_aborted));
+ seq_printf(m, "tx_underrun\t%d\n", le16_to_cpu(counters->tx_underrun));
+
+ seq_printf(m, "tx_octets\t%lld\n", le64_to_cpu(counters->tx_octets));
+ seq_printf(m, "rx_octets\t%lld\n", le64_to_cpu(counters->rx_octets));
+ seq_printf(m, "rx_multicast64\t%lld\n", le64_to_cpu(counters->rx_multicast64));
+ seq_printf(m, "tx_unicast64\t%lld\n", le64_to_cpu(counters->tx_unicast64));
+ seq_printf(m, "tx_broadcast64\t%lld\n", le64_to_cpu(counters->tx_broadcast64));
+ seq_printf(m, "tx_multicast64\t%lld\n", le64_to_cpu(counters->tx_multicast64));
+ seq_printf(m, "tx_pause_on\t%d\n", le32_to_cpu(counters->tx_pause_on));
+ seq_printf(m, "tx_pause_off\t%d\n", le32_to_cpu(counters->tx_pause_off));
+ seq_printf(m, "tx_pause_all\t%d\n", le32_to_cpu(counters->tx_pause_all));
+ seq_printf(m, "tx_deferred\t%d\n", le32_to_cpu(counters->tx_deferred));
+ seq_printf(m, "tx_late_collision\t%d\n", le32_to_cpu(counters->tx_late_collision));
+ seq_printf(m, "tx_all_collision\t%d\n", le32_to_cpu(counters->tx_all_collision));
+ seq_printf(m, "tx_aborted32\t%d\n", le32_to_cpu(counters->tx_aborted32));
+ seq_printf(m, "align_errors32\t%d\n", le32_to_cpu(counters->align_errors32));
+ seq_printf(m, "rx_frame_too_long\t%d\n", le32_to_cpu(counters->rx_frame_too_long));
+ seq_printf(m, "rx_runt\t%d\n", le32_to_cpu(counters->rx_runt));
+ seq_printf(m, "rx_pause_on\t%d\n", le32_to_cpu(counters->rx_pause_on));
+ seq_printf(m, "rx_pause_off\t%d\n", le32_to_cpu(counters->rx_pause_off));
+ seq_printf(m, "rx_pause_all\t%d\n", le32_to_cpu(counters->rx_pause_all));
+ seq_printf(m, "rx_unknown_opcode\t%d\n", le32_to_cpu(counters->rx_unknown_opcode));
+ seq_printf(m, "rx_mac_error\t%d\n", le32_to_cpu(counters->rx_mac_error));
+ seq_printf(m, "tx_underrun32\t%d\n", le32_to_cpu(counters->tx_underrun32));
+ seq_printf(m, "rx_mac_missed\t%d\n", le32_to_cpu(counters->rx_mac_missed));
+ seq_printf(m, "rx_tcam_dropped\t%d\n", le32_to_cpu(counters->rx_tcam_dropped));
+ seq_printf(m, "tdu\t%d\n", le32_to_cpu(counters->tdu));
+ seq_printf(m, "rdu\t%d\n", le32_to_cpu(counters->rdu));
seq_putc(m, '\n');
+
+out_unlock:
+ rtnl_unlock();
+
return 0;
}
@@ -735,12 +1093,12 @@ static int proc_get_registers(struct seq_file *m, void *v)
u8 byte_rd;
struct rtl8125_private *tp = netdev_priv(dev);
void __iomem *ioaddr = tp->mmio_addr;
- unsigned long flags;
seq_puts(m, "\nDump MAC Registers\n");
seq_puts(m, "Offset\tValue\n------\t-----\n");
- spin_lock_irqsave(&tp->lock, flags);
+ rtnl_lock();
+
for (n = 0; n < max;) {
seq_printf(m, "\n0x%02x:\t", n);
@@ -749,7 +1107,8 @@ static int proc_get_registers(struct seq_file *m, void *v)
seq_printf(m, "%02x ", byte_rd);
}
}
- spin_unlock_irqrestore(&tp->lock, flags);
+
+ rtnl_unlock();
seq_putc(m, '\n');
return 0;
@@ -761,22 +1120,22 @@ static int proc_get_pcie_phy(struct seq_file *m, void *v)
int i, n, max = R8125_EPHY_REGS_SIZE/2;
u16 word_rd;
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
- unsigned long flags;
seq_puts(m, "\nDump PCIE PHY\n");
seq_puts(m, "\nOffset\tValue\n------\t-----\n ");
- spin_lock_irqsave(&tp->lock, flags);
+ rtnl_lock();
+
for (n = 0; n < max;) {
seq_printf(m, "\n0x%02x:\t", n);
for (i = 0; i < 8 && n < max; i++, n++) {
- word_rd = rtl8125_ephy_read(ioaddr, n);
+ word_rd = rtl8125_ephy_read(tp, n);
seq_printf(m, "%04x ", word_rd);
}
}
- spin_unlock_irqrestore(&tp->lock, flags);
+
+ rtnl_unlock();
seq_putc(m, '\n');
return 0;
@@ -788,12 +1147,12 @@ static int proc_get_eth_phy(struct seq_file *m, void *v)
int i, n, max = R8125_PHY_REGS_SIZE/2;
u16 word_rd;
struct rtl8125_private *tp = netdev_priv(dev);
- unsigned long flags;
seq_puts(m, "\nDump Ethernet PHY\n");
seq_puts(m, "\nOffset\tValue\n------\t-----\n ");
- spin_lock_irqsave(&tp->lock, flags);
+ rtnl_lock();
+
seq_puts(m, "\n####################page 0##################\n ");
rtl8125_mdio_write(tp, 0x1f, 0x0000);
for (n = 0; n < max;) {
@@ -804,7 +1163,8 @@ static int proc_get_eth_phy(struct seq_file *m, void *v)
seq_printf(m, "%04x ", word_rd);
}
}
- spin_unlock_irqrestore(&tp->lock, flags);
+
+ rtnl_unlock();
seq_putc(m, '\n');
return 0;
@@ -816,22 +1176,22 @@ static int proc_get_extended_registers(struct seq_file *m, void *v)
int i, n, max = R8125_ERI_REGS_SIZE;
u32 dword_rd;
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
- unsigned long flags;
seq_puts(m, "\nDump Extended Registers\n");
seq_puts(m, "\nOffset\tValue\n------\t-----\n ");
- spin_lock_irqsave(&tp->lock, flags);
+ rtnl_lock();
+
for (n = 0; n < max;) {
seq_printf(m, "\n0x%02x:\t", n);
for (i = 0; i < 4 && n < max; i++, n+=4) {
- dword_rd = rtl8125_eri_read(ioaddr, n, 4, ERIAR_ExGMAC);
+ dword_rd = rtl8125_eri_read(tp, n, 4, ERIAR_ExGMAC);
seq_printf(m, "%08x ", dword_rd);
}
}
- spin_unlock_irqrestore(&tp->lock, flags);
+
+ rtnl_unlock();
seq_putc(m, '\n');
return 0;
@@ -843,12 +1203,12 @@ static int proc_get_pci_registers(struct seq_file *m, void *v)
int i, n, max = R8125_PCI_REGS_SIZE;
u32 dword_rd;
struct rtl8125_private *tp = netdev_priv(dev);
- unsigned long flags;
seq_puts(m, "\nDump PCI Registers\n");
seq_puts(m, "\nOffset\tValue\n------\t-----\n ");
- spin_lock_irqsave(&tp->lock, flags);
+ rtnl_lock();
+
for (n = 0; n < max;) {
seq_printf(m, "\n0x%03x:\t", n);
@@ -865,7 +1225,84 @@ static int proc_get_pci_registers(struct seq_file *m, void *v)
pci_read_config_dword(tp->pci_dev, n, &dword_rd);
seq_printf(m, "\n0x%03x:\t%08x ", n, dword_rd);
- spin_unlock_irqrestore(&tp->lock, flags);
+ rtnl_unlock();
+
+ seq_putc(m, '\n');
+ return 0;
+}
+
+static int proc_get_temperature(struct seq_file *m, void *v)
+{
+ struct net_device *dev = m->private;
+ struct rtl8125_private *tp = netdev_priv(dev);
+ u16 ts_digout, tj, fah;
+
+ switch (tp->mcfg) {
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
+ seq_puts(m, "\nChip Temperature\n");
+ break;
+ default:
+ return -EOPNOTSUPP;
+ }
+
+ rtnl_lock();
+ ts_digout = rtl8125_read_thermal_sensor(tp);
+ rtnl_unlock();
+
+ tj = ts_digout / 2;
+ if (ts_digout <= 512) {
+ tj = ts_digout / 2;
+ seq_printf(m, "Cel:%d\n", tj);
+ fah = tj * (9/5) + 32;
+ seq_printf(m, "Fah:%d\n", fah);
+ } else {
+ tj = (512 - ((ts_digout / 2) - 512)) / 2;
+ seq_printf(m, "Cel:-%d\n", tj);
+ fah = tj * (9/5) + 32;
+ seq_printf(m, "Fah:-%d\n", fah);
+ }
+
+ seq_putc(m, '\n');
+ return 0;
+}
+
+static int proc_get_cable_info(struct seq_file *m, void *v)
+{
+ int i;
+ u16 status;
+ int cp_status[RTL8125_CP_NUM];
+ u16 cp_len[RTL8125_CP_NUM] = {0};
+ struct net_device *dev = m->private;
+ struct rtl8125_private *tp = netdev_priv(dev);
+
+ switch (tp->mcfg) {
+ case CFG_METHOD_2 ... CFG_METHOD_7:
+ /* support */
+ break;
+ default:
+ return -EOPNOTSUPP;
+ }
+
+ rtnl_lock();
+
+ status = RTL_R16(tp, PHYstatus);
+ if (status & LinkStatus)
+ seq_printf(m, "\nlink speed:%d",
+ rtl8125_convert_link_speed(status));
+ else
+ seq_puts(m, "\nlink status:off");
+
+ rtl8125_get_cp(tp, cp_len, cp_status);
+
+ rtnl_unlock();
+
+ seq_puts(m, "\npair\tlength\tstaus\n");
+
+ for (i =0; ilock, flags);
+ rtnl_lock();
+
len += snprintf(page + len, count - len,
"Variable\tValue\n----------\t-----\n");
len += snprintf(page + len, count - len,
"MODULENAME\t%s\n"
"driver version\t%s\n"
+ "mcfg\t%d\n"
"chipset\t%d\n"
"chipset_name\t%s\n"
"mtu\t%d\n"
"NUM_RX_DESC\t0x%x\n"
- "cur_rx\t0x%x\n"
- "dirty_rx\t0x%x\n"
+ "cur_rx0\t0x%x\n"
+ "dirty_rx0\t0x%x\n"
+ "cur_rx1\t0x%x\n"
+ "dirty_rx1\t0x%x\n"
+ "cur_rx2\t0x%x\n"
+ "dirty_rx2\t0x%x\n"
+ "cur_rx3\t0x%x\n"
+ "dirty_rx3\t0x%x\n"
"NUM_TX_DESC\t0x%x\n"
- "cur_tx\t0x%x\n"
- "dirty_tx\t0x%x\n"
+ "cur_tx0\t0x%x\n"
+ "dirty_tx0\t0x%x\n"
+ "cur_tx1\t0x%x\n"
+ "dirty_tx1\t0x%x\n"
"rx_buf_sz\t0x%x\n"
+#ifdef ENABLE_PAGE_REUSE
+ "rx_buf_page_order\t0x%x\n"
+ "rx_buf_page_size\t0x%x\n"
+ "page_reuse_fail_cnt\t0x%x\n"
+#endif //ENABLE_PAGE_REUSE
"esd_flag\t0x%x\n"
"pci_cfg_is_read\t0x%x\n"
"rtl8125_rx_config\t0x%x\n"
@@ -914,7 +1365,7 @@ static int proc_get_driver_variable(char *page, char **start,
"autoneg\t0x%x\n"
"duplex\t0x%x\n"
"speed\t%d\n"
- "advertising\t0x%x\n"
+ "advertising\t0x%llx\n"
"eeprom_len\t0x%x\n"
"cur_page\t0x%x\n"
"bios_setting\t0x%x\n"
@@ -934,6 +1385,7 @@ static int proc_get_driver_variable(char *page, char **start,
"rtk_enable_diag\t0x%x\n"
"ShortPacketSwChecksum\t0x%x\n"
"UseSwPaddingShortPkt\t0x%x\n"
+ "RequireRduNonStopPatch\t0x%x\n"
"RequireAdcBiasPatch\t0x%x\n"
"AdcBiasPatchIoffset\t0x%x\n"
"RequireAdjustUpsTxLinkPulseTiming\t0x%x\n"
@@ -959,10 +1411,38 @@ static int proc_get_driver_variable(char *page, char **start,
"hwoptimize\t0x%lx\n"
"proc_init_num\t0x%x\n"
"s0_magic_packet\t0x%x\n"
+ "disable_pm_support\t0x%x\n"
+ "enable_double_vlan\t0x%x\n"
"HwSuppMagicPktVer\t0x%x\n"
+ "HwSuppLinkChgWakeUpVer\t0x%x\n"
+ "HwSuppD0SpeedUpVer\t0x%x\n"
+ "D0SpeedUpSpeed\t0x%x\n"
"HwSuppCheckPhyDisableModeVer\t0x%x\n"
"HwPkgDet\t0x%x\n"
- "HwSuppGigaForceMode\t0x%x\n"
+ "HwSuppTxNoCloseVer\t0x%x\n"
+ "EnableTxNoClose\t0x%x\n"
+ "NextHwDesCloPtr0\t0x%x\n"
+ "BeginHwDesCloPtr0\t0x%x\n"
+ "NextHwDesCloPtr1\t0x%x\n"
+ "BeginHwDesCloPtr1\t0x%x\n"
+ "InitRxDescType\t0x%x\n"
+ "RxDescLength\t0x%x\n"
+ "num_rx_rings\t0x%x\n"
+ "num_tx_rings\t0x%x\n"
+ "tot_rx_rings\t0x%x\n"
+ "tot_tx_rings\t0x%x\n"
+ "EnableRss\t0x%x\n"
+ "EnablePtp\t0x%x\n"
+ "ptp_master_mode\t0x%x\n"
+ "min_irq_nvecs\t0x%x\n"
+ "irq_nvecs\t0x%x\n"
+ "ring_lib_enabled\t0x%x\n"
+ "HwSuppIsrVer\t0x%x\n"
+ "HwCurrIsrVer\t0x%x\n"
+#ifdef ENABLE_PTP_SUPPORT
+ "tx_hwtstamp_timeouts\t0x%x\n"
+ "tx_hwtstamp_skipped\t0x%x\n"
+#endif
"random_mac\t0x%x\n"
"org_mac_addr\t%pM\n"
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
@@ -971,16 +1451,30 @@ static int proc_get_driver_variable(char *page, char **start,
"dev_addr\t%pM\n",
MODULENAME,
RTL8125_VERSION,
+ tp->mcfg,
tp->chipset,
rtl_chip_info[tp->chipset].name,
dev->mtu,
- NUM_RX_DESC,
- tp->cur_rx,
- tp->dirty_rx,
- NUM_TX_DESC,
- tp->cur_tx,
- tp->dirty_tx,
+ tp->rx_ring[0].num_rx_desc,
+ tp->rx_ring[0].cur_rx,
+ tp->rx_ring[0].dirty_rx,
+ tp->rx_ring[1].cur_rx,
+ tp->rx_ring[1].dirty_rx,
+ tp->rx_ring[2].cur_rx,
+ tp->rx_ring[2].dirty_rx,
+ tp->rx_ring[3].cur_rx,
+ tp->rx_ring[3].dirty_rx,
+ tp->tx_ring[0].num_tx_desc,
+ tp->tx_ring[0].cur_tx,
+ tp->tx_ring[0].dirty_tx,
+ tp->tx_ring[1].cur_tx,
+ tp->tx_ring[1].dirty_tx,
tp->rx_buf_sz,
+#ifdef ENABLE_PAGE_REUSE
+ tp->rx_buf_page_order,
+ tp->rx_buf_page_size,
+ tp->page_reuse_fail_cnt,
+#endif //ENABLE_PAGE_REUSE
tp->esd_flag,
tp->pci_cfg_is_read,
tp->rtl8125_rx_config,
@@ -1014,6 +1508,7 @@ static int proc_get_driver_variable(char *page, char **start,
tp->rtk_enable_diag,
tp->ShortPacketSwChecksum,
tp->UseSwPaddingShortPkt,
+ tp->RequireRduNonStopPatch,
tp->RequireAdcBiasPatch,
tp->AdcBiasPatchIoffset,
tp->RequireAdjustUpsTxLinkPulseTiming,
@@ -1035,14 +1530,42 @@ static int proc_get_driver_variable(char *page, char **start,
aspm,
s5wol,
s5_keep_curr_mac,
- eee_enable,
+ tp->eee.eee_enabled,
hwoptimize,
proc_init_num,
s0_magic_packet,
+ disable_pm_support,
+ enable_double_vlan,
tp->HwSuppMagicPktVer,
+ tp->HwSuppLinkChgWakeUpVer,
+ tp->HwSuppD0SpeedUpVer,
+ tp->D0SpeedUpSpeed,
tp->HwSuppCheckPhyDisableModeVer,
tp->HwPkgDet,
- tp->HwSuppGigaForceMode,
+ tp->HwSuppTxNoCloseVer,
+ tp->EnableTxNoClose,
+ tp->tx_ring[0].NextHwDesCloPtr,
+ tp->tx_ring[0].BeginHwDesCloPtr,
+ tp->tx_ring[1].NextHwDesCloPtr,
+ tp->tx_ring[1].BeginHwDesCloPtr,
+ tp->InitRxDescType,
+ tp->RxDescLength,
+ tp->num_rx_rings,
+ tp->num_tx_rings,
+ tp->tot_rx_rings,
+ tp->tot_tx_rings,
+ tp->EnableRss,
+ tp->EnablePtp,
+ tp->ptp_master_mode,
+ tp->min_irq_nvecs,
+ tp->irq_nvecs,
+ tp->ring_lib_enabled,
+ tp->HwSuppIsrVer,
+ tp->HwCurrIsrVer,
+#ifdef ENABLE_PTP_SUPPORT
+ tp->tx_hwtstamp_timeouts,
+ tp->tx_hwtstamp_skipped,
+#endif
tp->random_mac,
tp->org_mac_addr,
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
@@ -1050,7 +1573,8 @@ static int proc_get_driver_variable(char *page, char **start,
#endif
dev->dev_addr
);
- spin_unlock_irqrestore(&tp->lock, flags);
+
+ rtnl_unlock();
len += snprintf(page + len, count - len, "\n");
@@ -1064,42 +1588,24 @@ static int proc_get_tally_counter(char *page, char **start,
{
struct net_device *dev = data;
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
struct rtl8125_counters *counters;
dma_addr_t paddr;
- u32 cmd;
- u32 WaitCnt;
- unsigned long flags;
int len = 0;
len += snprintf(page + len, count - len,
"\nDump Tally Counter\n");
- //ASSERT_RTNL();
+ rtnl_lock();
counters = tp->tally_vaddr;
paddr = tp->tally_paddr;
if (!counters) {
len += snprintf(page + len, count - len,
"\nDump Tally Counter Fail\n");
- goto out;
+ goto out_unlock;
}
- spin_lock_irqsave(&tp->lock, flags);
- RTL_W32(CounterAddrHigh, (u64)paddr >> 32);
- cmd = (u64)paddr & DMA_BIT_MASK(32);
- RTL_W32(CounterAddrLow, cmd);
- RTL_W32(CounterAddrLow, cmd | CounterDump);
-
- WaitCnt = 0;
- while (RTL_R32(CounterAddrLow) & CounterDump) {
- udelay(10);
-
- WaitCnt++;
- if (WaitCnt > 20)
- break;
- }
- spin_unlock_irqrestore(&tp->lock, flags);
+ rtl8125_dump_tally_counter(tp, paddr);
len += snprintf(page + len, count - len,
"Statistics\tValue\n----------\t-----\n");
@@ -1108,31 +1614,89 @@ static int proc_get_tally_counter(char *page, char **start,
"tx_packets\t%lld\n"
"rx_packets\t%lld\n"
"tx_errors\t%lld\n"
- "rx_missed\t%lld\n"
- "align_errors\t%lld\n"
- "tx_one_collision\t%lld\n"
- "tx_multi_collision\t%lld\n"
+ "rx_errors\t%d\n"
+ "rx_missed\t%d\n"
+ "align_errors\t%d\n"
+ "tx_one_collision\t%d\n"
+ "tx_multi_collision\t%d\n"
"rx_unicast\t%lld\n"
"rx_broadcast\t%lld\n"
- "rx_multicast\t%lld\n"
- "tx_aborted\t%lld\n"
- "tx_underun\t%lld\n",
+ "rx_multicast\t%d\n"
+ "tx_aborted\t%d\n"
+ "tx_underrun\t%d\n",
+
+ "tx_octets\t%lld\n",
+ "rx_octets\t%lld\n",
+ "rx_multicast64\t%lld\n",
+ "tx_unicast64\t%lld\n",
+ "tx_broadcast64\t%lld\n",
+ "tx_multicast64\t%lld\n",
+ "tx_pause_on\t%d\n",
+ "tx_pause_off\t%d\n",
+ "tx_pause_all\t%d\n",
+ "tx_deferred\t%d\n",
+ "tx_late_collision\t%d\n",
+ "tx_all_collision\t%d\n",
+ "tx_aborted32\t%d\n",
+ "align_errors32\t%d\n",
+ "rx_frame_too_long\t%d\n",
+ "rx_runt\t%d\n",
+ "rx_pause_on\t%d\n",
+ "rx_pause_off\t%d\n",
+ "rx_pause_all\t%d\n",
+ "rx_unknown_opcode\t%d\n",
+ "rx_mac_error\t%d\n",
+ "tx_underrun32\t%d\n",
+ "rx_mac_missed\t%d\n",
+ "rx_tcam_dropped\t%d\n",
+ "tdu\t%d\n",
+ "rdu\t%d\n",
le64_to_cpu(counters->tx_packets),
le64_to_cpu(counters->rx_packets),
le64_to_cpu(counters->tx_errors),
- le64_to_cpu(counters->rx_missed),
- le64_to_cpu(counters->align_errors),
- le64_to_cpu(counters->tx_one_collision),
- le64_to_cpu(counters->tx_multi_collision),
+ le32_to_cpu(counters->rx_errors),
+ le16_to_cpu(counters->rx_missed),
+ le16_to_cpu(counters->align_errors),
+ le32_to_cpu(counters->tx_one_collision),
+ le32_to_cpu(counters->tx_multi_collision),
le64_to_cpu(counters->rx_unicast),
le64_to_cpu(counters->rx_broadcast),
- le64_to_cpu(counters->rx_multicast),
- le64_to_cpu(counters->tx_aborted),
- le64_to_cpu(counters->tx_underun)
+ le32_to_cpu(counters->rx_multicast),
+ le16_to_cpu(counters->tx_aborted),
+ le16_to_cpu(counters->tx_underrun),
+
+ le64_to_cpu(counters->tx_octets),
+ le64_to_cpu(counters->rx_octets),
+ le64_to_cpu(counters->rx_multicast64),
+ le64_to_cpu(counters->tx_unicast64),
+ le64_to_cpu(counters->tx_broadcast64),
+ le64_to_cpu(counters->tx_multicast64),
+ le32_to_cpu(counters->tx_pause_on),
+ le32_to_cpu(counters->tx_pause_off),
+ le32_to_cpu(counters->tx_pause_all),
+ le32_to_cpu(counters->tx_deferred),
+ le32_to_cpu(counters->tx_late_collision),
+ le32_to_cpu(counters->tx_all_collision),
+ le32_to_cpu(counters->tx_aborted32),
+ le32_to_cpu(counters->align_errors32),
+ le32_to_cpu(counters->rx_frame_too_long),
+ le32_to_cpu(counters->rx_runt),
+ le32_to_cpu(counters->rx_pause_on),
+ le32_to_cpu(counters->rx_pause_off),
+ le32_to_cpu(counters->rx_pause_all),
+ le32_to_cpu(counters->rx_unknown_opcode),
+ le32_to_cpu(counters->rx_mac_error),
+ le32_to_cpu(counters->tx_underrun32),
+ le32_to_cpu(counters->rx_mac_missed),
+ le32_to_cpu(counters->rx_tcam_dropped),
+ le32_to_cpu(counters->tdu),
+ le32_to_cpu(counters->rdu),
);
len += snprintf(page + len, count - len, "\n");
-out:
+out_unlock:
+ rtnl_unlock();
+
*eof = 1;
return len;
}
@@ -1146,14 +1710,14 @@ static int proc_get_registers(char *page, char **start,
u8 byte_rd;
struct rtl8125_private *tp = netdev_priv(dev);
void __iomem *ioaddr = tp->mmio_addr;
- unsigned long flags;
int len = 0;
len += snprintf(page + len, count - len,
"\nDump MAC Registers\n"
"Offset\tValue\n------\t-----\n");
- spin_lock_irqsave(&tp->lock, flags);
+ rtnl_lock();
+
for (n = 0; n < max;) {
len += snprintf(page + len, count - len,
"\n0x%02x:\t",
@@ -1166,7 +1730,8 @@ static int proc_get_registers(char *page, char **start,
byte_rd);
}
}
- spin_unlock_irqrestore(&tp->lock, flags);
+
+ rtnl_unlock();
len += snprintf(page + len, count - len, "\n");
@@ -1182,28 +1747,28 @@ static int proc_get_pcie_phy(char *page, char **start,
int i, n, max = R8125_EPHY_REGS_SIZE/2;
u16 word_rd;
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
- unsigned long flags;
int len = 0;
len += snprintf(page + len, count - len,
"\nDump PCIE PHY\n"
"Offset\tValue\n------\t-----\n");
- spin_lock_irqsave(&tp->lock, flags);
+ rtnl_lock();
+
for (n = 0; n < max;) {
len += snprintf(page + len, count - len,
"\n0x%02x:\t",
n);
for (i = 0; i < 8 && n < max; i++, n++) {
- word_rd = rtl8125_ephy_read(ioaddr, n);
+ word_rd = rtl8125_ephy_read(tp, n);
len += snprintf(page + len, count - len,
"%04x ",
word_rd);
}
}
- spin_unlock_irqrestore(&tp->lock, flags);
+
+ rtnl_unlock();
len += snprintf(page + len, count - len, "\n");
@@ -1219,14 +1784,14 @@ static int proc_get_eth_phy(char *page, char **start,
int i, n, max = R8125_PHY_REGS_SIZE/2;
u16 word_rd;
struct rtl8125_private *tp = netdev_priv(dev);
- unsigned long flags;
int len = 0;
len += snprintf(page + len, count - len,
"\nDump Ethernet PHY\n"
"Offset\tValue\n------\t-----\n");
- spin_lock_irqsave(&tp->lock, flags);
+ rtnl_lock();
+
len += snprintf(page + len, count - len,
"\n####################page 0##################\n");
rtl8125_mdio_write(tp, 0x1f, 0x0000);
@@ -1242,7 +1807,8 @@ static int proc_get_eth_phy(char *page, char **start,
word_rd);
}
}
- spin_unlock_irqrestore(&tp->lock, flags);
+
+ rtnl_unlock();
len += snprintf(page + len, count - len, "\n");
@@ -1258,31 +1824,31 @@ static int proc_get_extended_registers(char *page, char **start,
int i, n, max = R8125_ERI_REGS_SIZE;
u32 dword_rd;
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
- unsigned long flags;
int len = 0;
len += snprintf(page + len, count - len,
"\nDump Extended Registers\n"
"Offset\tValue\n------\t-----\n");
- spin_lock_irqsave(&tp->lock, flags);
+ rtnl_lock();
+
for (n = 0; n < max;) {
len += snprintf(page + len, count - len,
"\n0x%02x:\t",
n);
for (i = 0; i < 4 && n < max; i++, n+=4) {
- dword_rd = rtl8125_eri_read(ioaddr, n, 4, ERIAR_ExGMAC);
+ dword_rd = rtl8125_eri_read(tp, n, 4, ERIAR_ExGMAC);
len += snprintf(page + len, count - len,
"%08x ",
dword_rd);
}
}
- spin_unlock_irqrestore(&tp->lock, flags);
+
+ rtnl_unlock();
len += snprintf(page + len, count - len, "\n");
-out:
+
*eof = 1;
return len;
}
@@ -1295,14 +1861,14 @@ static int proc_get_pci_registers(char *page, char **start,
int i, n, max = R8125_PCI_REGS_SIZE;
u32 dword_rd;
struct rtl8125_private *tp = netdev_priv(dev);
- unsigned long flags;
int len = 0;
len += snprintf(page + len, count - len,
"\nDump PCI Registers\n"
"Offset\tValue\n------\t-----\n");
- spin_lock_irqsave(&tp->lock, flags);
+ rtnl_lock();
+
for (n = 0; n < max;) {
len += snprintf(page + len, count - len,
"\n0x%03x:\t",
@@ -1328,21 +1894,124 @@ static int proc_get_pci_registers(char *page, char **start,
"\n0x%03x:\t%08x ",
n,
dword_rd);
- spin_unlock_irqrestore(&tp->lock, flags);
+
+ rtnl_unlock();
len += snprintf(page + len, count - len, "\n");
*eof = 1;
return len;
}
-#endif
-static void rtl8125_proc_module_init(void)
+
+static int proc_get_temperature(char *page, char **start,
+ off_t offset, int count,
+ int *eof, void *data)
{
- //create /proc/net/r8125
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)
- rtl8125_proc = proc_mkdir(MODULENAME, init_net.proc_net);
-#else
- rtl8125_proc = proc_mkdir(MODULENAME, proc_net);
+ struct net_device *dev = data;
+ struct rtl8125_private *tp = netdev_priv(dev);
+ u16 ts_digout, tj, fah;
+ int len = 0;
+
+ switch (tp->mcfg) {
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
+ len += snprintf(page + len, count - len,
+ "\nChip Temperature\n");
+ break;
+ default:
+ return -EOPNOTSUPP;
+ }
+
+ rtnl_lock();
+ ts_digout = rtl8125_read_thermal_sensor(tp);
+ rtnl_unlock();
+
+ tj = ts_digout / 2;
+ if (ts_digout <= 512) {
+ tj = ts_digout / 2;
+ len += snprintf(page + len, count - len,
+ "Cel:%d\n",
+ tj);
+ fah = tj * (9/5) + 32;
+ len += snprintf(page + len, count - len,
+ "Fah:%d\n",
+ fah);
+
+ } else {
+ tj = (512 - ((ts_digout / 2) - 512)) / 2;
+ len += snprintf(page + len, count - len,
+ "Cel:-%d\n",
+ tj);
+ fah = tj * (9/5) + 32;
+ len += snprintf(page + len, count - len,
+ "Fah:-%d\n",
+ fah);
+ }
+
+ len += snprintf(page + len, count - len, "\n");
+
+ *eof = 1;
+ return len;
+}
+
+static int proc_get_cable_info(char *page, char **start,
+ off_t offset, int count,
+ int *eof, void *data)
+{
+ int i;
+ u16 status;
+ int len = 0;
+ struct net_device *dev = data;
+ int cp_status[RTL8125_CP_NUM] = {0};
+ u16 cp_len[RTL8125_CP_NUM] = {0};
+ struct rtl8125_private *tp = netdev_priv(dev);
+
+ switch (tp->mcfg) {
+ case CFG_METHOD_2 ... CFG_METHOD_7:
+ /* support */
+ break;
+ default:
+ return -EOPNOTSUPP;
+ }
+
+ rtnl_lock();
+
+ status = RTL_R16(tp, PHYstatus);
+ if (status & LinkStatus)
+ len += snprintf(page + len, count - len,
+ "\nlink speed:%d",
+ rtl8125_convert_link_speed(status));
+ else
+ len += snprintf(page + len, count - len,
+ "\nlink status:off");
+
+ rtl8125_get_cp(tp, cp_len, cp_status);
+
+ rtnl_unlock();
+
+ len += snprintf(page + len, count - len,
+ "\npair\tlength\tstaus\n");
+
+ for (i =0; i= KERNEL_VERSION(2,6,32)
+ rtl8125_proc = proc_mkdir(MODULENAME, init_net.proc_net);
+#else
+ rtl8125_proc = proc_mkdir(MODULENAME, proc_net);
#endif
if (!rtl8125_proc)
dprintk("cannot create %s proc entry \n", MODULENAME);
@@ -1355,11 +2024,23 @@ static void rtl8125_proc_module_init(void)
static int rtl8125_proc_open(struct inode *inode, struct file *file)
{
struct net_device *dev = proc_get_parent_data(inode);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+ int (*show)(struct seq_file *, void *) = pde_data(inode);
+#else
int (*show)(struct seq_file *, void *) = PDE_DATA(inode);
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
return single_open(file, show, dev);
}
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0)
+static const struct proc_ops rtl8125_proc_fops = {
+ .proc_open = rtl8125_proc_open,
+ .proc_read = seq_read,
+ .proc_lseek = seq_lseek,
+ .proc_release = single_release,
+};
+#else
static const struct file_operations rtl8125_proc_fops = {
.open = rtl8125_proc_open,
.read = seq_read,
@@ -1368,6 +2049,8 @@ static const struct file_operations rtl8125_proc_fops = {
};
#endif
+#endif
+
/*
* Table of proc files we need to create.
*/
@@ -1388,7 +2071,9 @@ static const struct rtl8125_proc_file rtl8125_proc_files[] = {
{ "eth_phy", &proc_get_eth_phy },
{ "ext_regs", &proc_get_extended_registers },
{ "pci_regs", &proc_get_pci_registers },
- { "" }
+ { "temp", &proc_get_temperature },
+ { "cdt", &proc_get_cable_info },
+ { "", NULL }
};
static void rtl8125_proc_init(struct net_device *dev)
@@ -1500,7 +2185,6 @@ static void mdio_real_direct_write_phy_ocp(struct rtl8125_private *tp,
u16 RegAddr,
u16 value)
{
- void __iomem *ioaddr = tp->mmio_addr;
u32 data32;
int i;
@@ -1511,11 +2195,11 @@ static void mdio_real_direct_write_phy_ocp(struct rtl8125_private *tp,
data32 <<= OCPR_Addr_Reg_shift;
data32 |= OCPR_Write | value;
- RTL_W32(PHYOCP, data32);
- for (i = 0; i < 100; i++) {
- udelay(1);
+ RTL_W32(tp, PHYOCP, data32);
+ for (i = 0; i < R8125_CHANNEL_WAIT_COUNT; i++) {
+ udelay(R8125_CHANNEL_WAIT_TIME);
- if (!(RTL_R32(PHYOCP) & OCPR_Flag))
+ if (!(RTL_R32(tp, PHYOCP) & OCPR_Flag))
break;
}
}
@@ -1529,6 +2213,7 @@ static void mdio_direct_write_phy_ocp(struct rtl8125_private *tp,
mdio_real_direct_write_phy_ocp(tp, RegAddr, value);
}
+/*
static void rtl8125_mdio_write_phy_ocp(struct rtl8125_private *tp,
u16 PageNum,
u32 RegAddr,
@@ -1536,12 +2221,11 @@ static void rtl8125_mdio_write_phy_ocp(struct rtl8125_private *tp,
{
u16 ocp_addr;
- if (tp->rtk_enable_diag) return;
-
ocp_addr = map_phy_ocp_addr(PageNum, RegAddr);
mdio_direct_write_phy_ocp(tp, ocp_addr, value);
}
+*/
static void rtl8125_mdio_real_write_phy_ocp(struct rtl8125_private *tp,
u16 PageNum,
@@ -1552,12 +2236,12 @@ static void rtl8125_mdio_real_write_phy_ocp(struct rtl8125_private *tp,
ocp_addr = map_phy_ocp_addr(PageNum, RegAddr);
- mdio_direct_write_phy_ocp(tp, ocp_addr, value);
+ mdio_real_direct_write_phy_ocp(tp, ocp_addr, value);
}
static void mdio_real_write(struct rtl8125_private *tp,
- u32 RegAddr,
- u32 value)
+ u16 RegAddr,
+ u16 value)
{
if (RegAddr == 0x1F) {
tp->cur_page = value;
@@ -1567,8 +2251,8 @@ static void mdio_real_write(struct rtl8125_private *tp,
}
void rtl8125_mdio_write(struct rtl8125_private *tp,
- u32 RegAddr,
- u32 value)
+ u16 RegAddr,
+ u16 value)
{
if (tp->rtk_enable_diag) return;
@@ -1592,7 +2276,6 @@ void rtl8125_mdio_prot_direct_write_phy_ocp(struct rtl8125_private *tp,
static u32 mdio_real_direct_read_phy_ocp(struct rtl8125_private *tp,
u16 RegAddr)
{
- void __iomem *ioaddr = tp->mmio_addr;
u32 data32;
int i, value = 0;
@@ -1602,14 +2285,14 @@ static u32 mdio_real_direct_read_phy_ocp(struct rtl8125_private *tp,
data32 = RegAddr/2;
data32 <<= OCPR_Addr_Reg_shift;
- RTL_W32(PHYOCP, data32);
- for (i = 0; i < 100; i++) {
- udelay(1);
+ RTL_W32(tp, PHYOCP, data32);
+ for (i = 0; i < R8125_CHANNEL_WAIT_COUNT; i++) {
+ udelay(R8125_CHANNEL_WAIT_TIME);
- if (RTL_R32(PHYOCP) & OCPR_Flag)
+ if (RTL_R32(tp, PHYOCP) & OCPR_Flag)
break;
}
- value = RTL_R32(PHYOCP) & OCPDR_Data_Mask;
+ value = RTL_R32(tp, PHYOCP) & OCPDR_Data_Mask;
return value;
}
@@ -1622,18 +2305,18 @@ static u32 mdio_direct_read_phy_ocp(struct rtl8125_private *tp,
return mdio_real_direct_read_phy_ocp(tp, RegAddr);
}
+/*
static u32 rtl8125_mdio_read_phy_ocp(struct rtl8125_private *tp,
u16 PageNum,
u32 RegAddr)
{
u16 ocp_addr;
- if (tp->rtk_enable_diag) return 0xffffffff;
-
ocp_addr = map_phy_ocp_addr(PageNum, RegAddr);
- return mdio_real_direct_read_phy_ocp(tp, ocp_addr);
+ return mdio_direct_read_phy_ocp(tp, ocp_addr);
}
+*/
static u32 rtl8125_mdio_real_read_phy_ocp(struct rtl8125_private *tp,
u16 PageNum,
@@ -1647,13 +2330,13 @@ static u32 rtl8125_mdio_real_read_phy_ocp(struct rtl8125_private *tp,
}
static u32 mdio_real_read(struct rtl8125_private *tp,
- u32 RegAddr)
+ u16 RegAddr)
{
return rtl8125_mdio_real_read_phy_ocp(tp, tp->cur_page, RegAddr);
}
u32 rtl8125_mdio_read(struct rtl8125_private *tp,
- u32 RegAddr)
+ u16 RegAddr)
{
if (tp->rtk_enable_diag) return 0xffffffff;
@@ -1730,7 +2413,6 @@ void SetEthPhyOcpBit(struct rtl8125_private *tp, u16 addr, u16 mask)
void rtl8125_mac_ocp_write(struct rtl8125_private *tp, u16 reg_addr, u16 value)
{
- void __iomem *ioaddr = tp->mmio_addr;
u32 data32;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
@@ -1742,12 +2424,11 @@ void rtl8125_mac_ocp_write(struct rtl8125_private *tp, u16 reg_addr, u16 value)
data32 += value;
data32 |= OCPR_Write;
- RTL_W32(MACOCP, data32);
+ RTL_W32(tp, MACOCP, data32);
}
-u16 rtl8125_mac_ocp_read(struct rtl8125_private *tp, u16 reg_addr)
+u32 rtl8125_mac_ocp_read(struct rtl8125_private *tp, u16 reg_addr)
{
- void __iomem *ioaddr = tp->mmio_addr;
u32 data32;
u16 data16 = 0;
@@ -1758,13 +2439,30 @@ u16 rtl8125_mac_ocp_read(struct rtl8125_private *tp, u16 reg_addr)
data32 = reg_addr/2;
data32 <<= OCPR_Addr_Reg_shift;
- RTL_W32(MACOCP, data32);
- data16 = (u16)RTL_R32(MACOCP);
+ RTL_W32(tp, MACOCP, data32);
+ data16 = (u16)RTL_R32(tp, MACOCP);
return data16;
}
-void
+#ifdef ENABLE_USE_FIRMWARE_FILE
+static void mac_mcu_write(struct rtl8125_private *tp, u16 reg, u16 value)
+{
+ if (reg == 0x1f) {
+ tp->ocp_base = value << 4;
+ return;
+ }
+
+ rtl8125_mac_ocp_write(tp, tp->ocp_base + reg, value);
+}
+
+static u32 mac_mcu_read(struct rtl8125_private *tp, u16 reg)
+{
+ return rtl8125_mac_ocp_read(tp, tp->ocp_base + reg);
+}
+#endif
+
+static void
ClearAndSetMcuAccessRegBit(
struct rtl8125_private *tp,
u16 addr,
@@ -1780,7 +2478,7 @@ ClearAndSetMcuAccessRegBit(
rtl8125_mac_ocp_write(tp, addr, PhyRegValue);
}
-void
+static void
ClearMcuAccessRegBit(
struct rtl8125_private *tp,
u16 addr,
@@ -1794,7 +2492,7 @@ ClearMcuAccessRegBit(
);
}
-void
+static void
SetMcuAccessRegBit(
struct rtl8125_private *tp,
u16 addr,
@@ -1810,9 +2508,7 @@ SetMcuAccessRegBit(
u32 rtl8125_ocp_read_with_oob_base_address(struct rtl8125_private *tp, u16 addr, u8 len, const u32 base_address)
{
- void __iomem *ioaddr = tp->mmio_addr;
-
- return rtl8125_eri_read_with_oob_base_address(ioaddr, addr, len, ERIAR_OOB, base_address);
+ return rtl8125_eri_read_with_oob_base_address(tp, addr, len, ERIAR_OOB, base_address);
}
u32 rtl8125_ocp_read(struct rtl8125_private *tp, u16 addr, u8 len)
@@ -1829,9 +2525,7 @@ u32 rtl8125_ocp_read(struct rtl8125_private *tp, u16 addr, u8 len)
u32 rtl8125_ocp_write_with_oob_base_address(struct rtl8125_private *tp, u16 addr, u8 len, u32 value, const u32 base_address)
{
- void __iomem *ioaddr = tp->mmio_addr;
-
- return rtl8125_eri_write_with_oob_base_address(ioaddr, addr, len, value, ERIAR_OOB, base_address);
+ return rtl8125_eri_write_with_oob_base_address(tp, addr, len, value, ERIAR_OOB, base_address);
}
void rtl8125_ocp_write(struct rtl8125_private *tp, u16 addr, u8 len, u32 value)
@@ -1855,11 +2549,13 @@ void rtl8125_oob_mutex_lock(struct rtl8125_private *tp)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- default:
+ case CFG_METHOD_6:
ocp_reg_mutex_oob = 0x110;
ocp_reg_mutex_ib = 0x114;
ocp_reg_mutex_prio = 0x11C;
break;
+ default:
+ return;
}
rtl8125_ocp_write(tp, ocp_reg_mutex_ib, 1, BIT_0);
@@ -1902,11 +2598,13 @@ void rtl8125_oob_mutex_unlock(struct rtl8125_private *tp)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- default:
+ case CFG_METHOD_6:
ocp_reg_mutex_oob = 0x110;
ocp_reg_mutex_ib = 0x114;
ocp_reg_mutex_prio = 0x11C;
break;
+ default:
+ return;
}
rtl8125_ocp_write(tp, ocp_reg_mutex_prio, 1, BIT_0);
@@ -1915,9 +2613,7 @@ void rtl8125_oob_mutex_unlock(struct rtl8125_private *tp)
void rtl8125_oob_notify(struct rtl8125_private *tp, u8 cmd)
{
- void __iomem *ioaddr = tp->mmio_addr;
-
- rtl8125_eri_write(ioaddr, 0xE8, 1, cmd, ERIAR_ExGMAC);
+ rtl8125_eri_write(tp, 0xE8, 1, cmd, ERIAR_ExGMAC);
rtl8125_ocp_write(tp, 0x30, 1, 0x01);
}
@@ -1941,12 +2637,12 @@ void rtl8125_dash2_disable_tx(struct rtl8125_private *tp)
u8 TmpUchar;
//Disable oob Tx
- RTL_CMAC_W8(CMAC_IBCR2, RTL_CMAC_R8(CMAC_IBCR2) & ~( BIT_0 ));
+ RTL_CMAC_W8(tp, CMAC_IBCR2, RTL_CMAC_R8(tp, CMAC_IBCR2) & ~( BIT_0 ));
WaitCnt = 0;
//wait oob tx disable
do {
- TmpUchar = RTL_CMAC_R8(CMAC_IBISR0);
+ TmpUchar = RTL_CMAC_R8(tp, CMAC_IBISR0);
if ( TmpUchar & ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE ) {
break;
@@ -1957,7 +2653,7 @@ void rtl8125_dash2_disable_tx(struct rtl8125_private *tp)
} while(WaitCnt < 2000);
//Clear ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE
- RTL_CMAC_W8(CMAC_IBISR0, RTL_CMAC_R8(CMAC_IBISR0) | ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE);
+ RTL_CMAC_W8(tp, CMAC_IBISR0, RTL_CMAC_R8(tp, CMAC_IBISR0) | ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE);
}
}
@@ -1966,7 +2662,7 @@ void rtl8125_dash2_enable_tx(struct rtl8125_private *tp)
if (!tp->DASH) return;
if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
- RTL_CMAC_W8(CMAC_IBCR2, RTL_CMAC_R8(CMAC_IBCR2) | BIT_0);
+ RTL_CMAC_W8(tp, CMAC_IBCR2, RTL_CMAC_R8(tp, CMAC_IBCR2) | BIT_0);
}
}
@@ -1975,7 +2671,7 @@ void rtl8125_dash2_disable_rx(struct rtl8125_private *tp)
if (!tp->DASH) return;
if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
- RTL_CMAC_W8(CMAC_IBCR0, RTL_CMAC_R8(CMAC_IBCR0) & ~( BIT_0 ));
+ RTL_CMAC_W8(tp, CMAC_IBCR0, RTL_CMAC_R8(tp, CMAC_IBCR0) & ~( BIT_0 ));
}
}
@@ -1984,7 +2680,7 @@ void rtl8125_dash2_enable_rx(struct rtl8125_private *tp)
if (!tp->DASH) return;
if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
- RTL_CMAC_W8(CMAC_IBCR0, RTL_CMAC_R8(CMAC_IBCR0) | BIT_0);
+ RTL_CMAC_W8(tp, CMAC_IBCR0, RTL_CMAC_R8(tp, CMAC_IBCR0) | BIT_0);
}
}
@@ -1998,106 +2694,118 @@ static void rtl8125_dash2_disable_txrx(struct net_device *dev)
}
}
-static void rtl8125_driver_start(struct rtl8125_private *tp)
+static int rtl8125_wait_dash_fw_ready(struct rtl8125_private *tp)
{
- if (!tp->DASH)
- return;
+ int rc = -1;
+ int timeout;
- if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
- int timeout;
- u32 tmp_value;
+ if (HW_DASH_SUPPORT_TYPE_2(tp) == FALSE &&
+ HW_DASH_SUPPORT_TYPE_3(tp) == FALSE)
+ goto out;
- rtl8125_ocp_write(tp, 0x180, 1, OOB_CMD_DRIVER_START);
- tmp_value = rtl8125_ocp_read(tp, 0x30, 1);
- tmp_value |= BIT_0;
- rtl8125_ocp_write(tp, 0x30, 1, tmp_value);
+ if (!tp->DASH)
+ goto out;
- for (timeout = 0; timeout < 10; timeout++) {
- mdelay(10);
- if (rtl8125_ocp_read(tp, 0x124, 1) & BIT_0)
- break;
+ for (timeout = 0; timeout < 10; timeout++) {
+ mdelay(10);
+ if (rtl8125_ocp_read(tp, 0x124, 1) & BIT_0) {
+ rc = 1;
+ goto out;
}
}
+
+ rc = 0;
+
+out:
+ return rc;
}
-static void rtl8125_driver_stop(struct rtl8125_private *tp)
+static void rtl8125_driver_start(struct rtl8125_private *tp)
{
- if (!tp->DASH)
+ u32 tmp_value;
+
+ if (HW_DASH_SUPPORT_TYPE_2(tp) == FALSE &&
+ HW_DASH_SUPPORT_TYPE_3(tp) == FALSE)
return;
- if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
- struct net_device *dev = tp->dev;
- int timeout;
- u32 tmp_value;
+ rtl8125_ocp_write(tp, 0x180, 1, OOB_CMD_DRIVER_START);
+ tmp_value = rtl8125_ocp_read(tp, 0x30, 1);
+ tmp_value |= BIT_0;
+ rtl8125_ocp_write(tp, 0x30, 1, tmp_value);
- rtl8125_dash2_disable_txrx(dev);
+ rtl8125_wait_dash_fw_ready(tp);
+}
- rtl8125_ocp_write(tp, 0x180, 1, OOB_CMD_DRIVER_STOP);
- tmp_value = rtl8125_ocp_read(tp, 0x30, 1);
- tmp_value |= BIT_0;
- rtl8125_ocp_write(tp, 0x30, 1, tmp_value);
+static void rtl8125_driver_stop(struct rtl8125_private *tp)
+{
+ u32 tmp_value;
+ struct net_device *dev = tp->dev;
- for (timeout = 0; timeout < 10; timeout++) {
- mdelay(10);
- if (!(rtl8125_ocp_read(tp, 0x124, 1) & BIT_0))
- break;
- }
- }
+ if (HW_DASH_SUPPORT_TYPE_2(tp) == FALSE &&
+ HW_DASH_SUPPORT_TYPE_3(tp) == FALSE)
+ return;
+
+ rtl8125_dash2_disable_txrx(dev);
+
+ rtl8125_ocp_write(tp, 0x180, 1, OOB_CMD_DRIVER_STOP);
+ tmp_value = rtl8125_ocp_read(tp, 0x30, 1);
+ tmp_value |= BIT_0;
+ rtl8125_ocp_write(tp, 0x30, 1, tmp_value);
+
+ rtl8125_wait_dash_fw_ready(tp);
}
-void rtl8125_ephy_write(void __iomem *ioaddr, int RegAddr, int value)
+void rtl8125_ephy_write(struct rtl8125_private *tp, int RegAddr, int value)
{
int i;
- RTL_W32(EPHYAR,
+ RTL_W32(tp, EPHYAR,
EPHYAR_Write |
(RegAddr & EPHYAR_Reg_Mask_v2) << EPHYAR_Reg_shift |
(value & EPHYAR_Data_Mask));
- for (i = 0; i < 10; i++) {
- udelay(100);
+ for (i = 0; i < R8125_CHANNEL_WAIT_COUNT; i++) {
+ udelay(R8125_CHANNEL_WAIT_TIME);
/* Check if the RTL8125 has completed EPHY write */
- if (!(RTL_R32(EPHYAR) & EPHYAR_Flag))
+ if (!(RTL_R32(tp, EPHYAR) & EPHYAR_Flag))
break;
}
- udelay(20);
+ udelay(R8125_CHANNEL_EXIT_DELAY_TIME);
}
-u16 rtl8125_ephy_read(void __iomem *ioaddr, int RegAddr)
+u16 rtl8125_ephy_read(struct rtl8125_private *tp, int RegAddr)
{
int i;
u16 value = 0xffff;
- RTL_W32(EPHYAR,
+ RTL_W32(tp, EPHYAR,
EPHYAR_Read | (RegAddr & EPHYAR_Reg_Mask_v2) << EPHYAR_Reg_shift);
- for (i = 0; i < 10; i++) {
- udelay(100);
+ for (i = 0; i < R8125_CHANNEL_WAIT_COUNT; i++) {
+ udelay(R8125_CHANNEL_WAIT_TIME);
/* Check if the RTL8125 has completed EPHY read */
- if (RTL_R32(EPHYAR) & EPHYAR_Flag) {
- value = (u16) (RTL_R32(EPHYAR) & EPHYAR_Data_Mask);
+ if (RTL_R32(tp, EPHYAR) & EPHYAR_Flag) {
+ value = (u16) (RTL_R32(tp, EPHYAR) & EPHYAR_Data_Mask);
break;
}
}
- udelay(20);
+ udelay(R8125_CHANNEL_EXIT_DELAY_TIME);
return value;
}
-/*
static void ClearAndSetPCIePhyBit(struct rtl8125_private *tp, u8 addr, u16 clearmask, u16 setmask)
{
- void __iomem *ioaddr = tp->mmio_addr;
u16 EphyValue;
- EphyValue = rtl8125_ephy_read( ioaddr, addr );
+ EphyValue = rtl8125_ephy_read(tp, addr);
EphyValue &= ~clearmask;
EphyValue |= setmask;
- rtl8125_ephy_write( ioaddr, addr, EphyValue);
+ rtl8125_ephy_write(tp, addr, EphyValue);
}
static void ClearPCIePhyBit(struct rtl8125_private *tp, u8 addr, u16 mask)
@@ -2117,17 +2825,15 @@ static void SetPCIePhyBit( struct rtl8125_private *tp, u8 addr, u16 mask)
mask
);
}
-*/
static u32
rtl8125_csi_other_fun_read(struct rtl8125_private *tp,
u8 multi_fun_sel_bit,
u32 addr)
{
- void __iomem *ioaddr = tp->mmio_addr;
u32 cmd;
int i;
- u32 value = 0;
+ u32 value = 0xffffffff;
cmd = CSIAR_Read | CSIAR_ByteEn << CSIAR_ByteEn_shift | (addr & CSIAR_Addr_Mask);
@@ -2135,24 +2841,25 @@ rtl8125_csi_other_fun_read(struct rtl8125_private *tp,
multi_fun_sel_bit = 0;
if (multi_fun_sel_bit > 7)
- return 0xffffffff;
+ goto exit;
cmd |= multi_fun_sel_bit << 16;
- RTL_W32(CSIAR, cmd);
+ RTL_W32(tp, CSIAR, cmd);
- for (i = 0; i < 10; i++) {
- udelay(100);
+ for (i = 0; i < R8125_CHANNEL_WAIT_COUNT; i++) {
+ udelay(R8125_CHANNEL_WAIT_TIME);
/* Check if the RTL8125 has completed CSI read */
- if (RTL_R32(CSIAR) & CSIAR_Flag) {
- value = (u32)RTL_R32(CSIDR);
+ if (RTL_R32(tp, CSIAR) & CSIAR_Flag) {
+ value = (u32)RTL_R32(tp, CSIDR);
break;
}
}
- udelay(20);
+ udelay(R8125_CHANNEL_EXIT_DELAY_TIME);
+exit:
return value;
}
@@ -2162,11 +2869,10 @@ rtl8125_csi_other_fun_write(struct rtl8125_private *tp,
u32 addr,
u32 value)
{
- void __iomem *ioaddr = tp->mmio_addr;
u32 cmd;
int i;
- RTL_W32(CSIDR, value);
+ RTL_W32(tp, CSIDR, value);
cmd = CSIAR_Write | CSIAR_ByteEn << CSIAR_ByteEn_shift | (addr & CSIAR_Addr_Mask);
if (tp->mcfg == CFG_METHOD_DEFAULT)
multi_fun_sel_bit = 0;
@@ -2176,17 +2882,17 @@ rtl8125_csi_other_fun_write(struct rtl8125_private *tp,
cmd |= multi_fun_sel_bit << 16;
- RTL_W32(CSIAR, cmd);
+ RTL_W32(tp, CSIAR, cmd);
- for (i = 0; i < 10; i++) {
- udelay(100);
+ for (i = 0; i < R8125_CHANNEL_WAIT_COUNT; i++) {
+ udelay(R8125_CHANNEL_WAIT_TIME);
/* Check if the RTL8125 has completed CSI write */
- if (!(RTL_R32(CSIAR) & CSIAR_Flag))
+ if (!(RTL_R32(tp, CSIAR) & CSIAR_Flag))
break;
}
- udelay(20);
+ udelay(R8125_CHANNEL_EXIT_DELAY_TIME);
}
static u32
@@ -2195,10 +2901,7 @@ rtl8125_csi_read(struct rtl8125_private *tp,
{
u8 multi_fun_sel_bit;
- if (tp->mcfg == CFG_METHOD_DEFAULT)
- multi_fun_sel_bit = 0;
- else
- multi_fun_sel_bit = 1;
+ multi_fun_sel_bit = 0;
return rtl8125_csi_other_fun_read(tp, multi_fun_sel_bit, addr);
}
@@ -2210,10 +2913,7 @@ rtl8125_csi_write(struct rtl8125_private *tp,
{
u8 multi_fun_sel_bit;
- if (tp->mcfg == CFG_METHOD_DEFAULT)
- multi_fun_sel_bit = 0;
- else
- multi_fun_sel_bit = 1;
+ multi_fun_sel_bit = 0;
rtl8125_csi_other_fun_write(tp, multi_fun_sel_bit, addr, value);
}
@@ -2235,12 +2935,12 @@ rtl8125_csi_fun0_read_byte(struct rtl8125_private *tp,
RegAlignAddr = addr & ~(0x3);
ShiftByte = addr & (0x3);
- TmpUlong = rtl8125_csi_other_fun_read(tp, 0, addr);
+ TmpUlong = rtl8125_csi_other_fun_read(tp, 0, RegAlignAddr);
TmpUlong >>= (8*ShiftByte);
RetVal = (u8)TmpUlong;
}
- udelay(20);
+ udelay(R8125_CHANNEL_EXIT_DELAY_TIME);
return RetVal;
}
@@ -2267,10 +2967,10 @@ rtl8125_csi_fun0_write_byte(struct rtl8125_private *tp,
rtl8125_csi_other_fun_write( tp, 0, RegAlignAddr, TmpUlong );
}
- udelay(20);
+ udelay(R8125_CHANNEL_EXIT_DELAY_TIME);
}
-u32 rtl8125_eri_read_with_oob_base_address(void __iomem *ioaddr, int addr, int len, int type, const u32 base_address)
+u32 rtl8125_eri_read_with_oob_base_address(struct rtl8125_private *tp, int addr, int len, int type, const u32 base_address)
{
int i, val_shift, shift = 0;
u32 value1 = 0, value2 = 0, mask;
@@ -2297,13 +2997,13 @@ u32 rtl8125_eri_read_with_oob_base_address(void __iomem *ioaddr, int addr, int l
eri_cmd |= (tmp << 20) & 0x00F00000;
}
- RTL_W32(ERIAR, eri_cmd);
+ RTL_W32(tp, ERIAR, eri_cmd);
- for (i = 0; i < 10; i++) {
- udelay(100);
+ for (i = 0; i < R8125_CHANNEL_WAIT_COUNT; i++) {
+ udelay(R8125_CHANNEL_WAIT_TIME);
/* Check if the RTL8125 has completed ERI read */
- if (RTL_R32(ERIAR) & ERIAR_Flag)
+ if (RTL_R32(tp, ERIAR) & ERIAR_Flag)
break;
}
@@ -2312,7 +3012,7 @@ u32 rtl8125_eri_read_with_oob_base_address(void __iomem *ioaddr, int addr, int l
else if (len == 3) mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
else mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
- value1 = RTL_R32(ERIDR) & mask;
+ value1 = RTL_R32(tp, ERIDR) & mask;
value2 |= (value1 >> val_shift * 8) << shift * 8;
if (len <= 4 - val_shift) {
@@ -2324,17 +3024,17 @@ u32 rtl8125_eri_read_with_oob_base_address(void __iomem *ioaddr, int addr, int l
}
}
- udelay(20);
+ udelay(R8125_CHANNEL_EXIT_DELAY_TIME);
return value2;
}
-u32 rtl8125_eri_read(void __iomem *ioaddr, int addr, int len, int type)
+u32 rtl8125_eri_read(struct rtl8125_private *tp, int addr, int len, int type)
{
- return rtl8125_eri_read_with_oob_base_address(ioaddr, addr, len, type, 0);
+ return rtl8125_eri_read_with_oob_base_address(tp, addr, len, type, 0);
}
-int rtl8125_eri_write_with_oob_base_address(void __iomem *ioaddr, int addr, int len, u32 value, int type, const u32 base_address)
+int rtl8125_eri_write_with_oob_base_address(struct rtl8125_private *tp, int addr, int len, u32 value, int type, const u32 base_address)
{
int i, val_shift, shift = 0;
u32 value1 = 0, mask;
@@ -2353,10 +3053,10 @@ int rtl8125_eri_write_with_oob_base_address(void __iomem *ioaddr, int addr, int
else if (len == 3) mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
else mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
- value1 = rtl8125_eri_read_with_oob_base_address(ioaddr, addr, 4, type, base_address) & ~mask;
+ value1 = rtl8125_eri_read_with_oob_base_address(tp, addr, 4, type, base_address) & ~mask;
value1 |= ((value << val_shift * 8) >> shift * 8);
- RTL_W32(ERIDR, value1);
+ RTL_W32(tp, ERIDR, value1);
eri_cmd = ERIAR_Write |
transformed_base_address |
@@ -2371,13 +3071,13 @@ int rtl8125_eri_write_with_oob_base_address(void __iomem *ioaddr, int addr, int
eri_cmd |= (tmp << 20) & 0x00F00000;
}
- RTL_W32(ERIAR, eri_cmd);
+ RTL_W32(tp, ERIAR, eri_cmd);
- for (i = 0; i < 10; i++) {
- udelay(100);
+ for (i = 0; i < R8125_CHANNEL_WAIT_COUNT; i++) {
+ udelay(R8125_CHANNEL_WAIT_TIME);
/* Check if the RTL8125 has completed ERI write */
- if (!(RTL_R32(ERIAR) & ERIAR_Flag))
+ if (!(RTL_R32(tp, ERIAR) & ERIAR_Flag))
break;
}
@@ -2390,26 +3090,30 @@ int rtl8125_eri_write_with_oob_base_address(void __iomem *ioaddr, int addr, int
}
}
- udelay(20);
+ udelay(R8125_CHANNEL_EXIT_DELAY_TIME);
return 0;
}
-int rtl8125_eri_write(void __iomem *ioaddr, int addr, int len, u32 value, int type)
+int rtl8125_eri_write(struct rtl8125_private *tp, int addr, int len, u32 value, int type)
{
- return rtl8125_eri_write_with_oob_base_address(ioaddr, addr, len, value, type, NO_BASE_ADDRESS);
+ return rtl8125_eri_write_with_oob_base_address(tp, addr, len, value, type, NO_BASE_ADDRESS);
}
static void
rtl8125_enable_rxdvgate(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- RTL_W8(0xF2, RTL_R8(0xF2) | BIT_3);
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_3);
mdelay(2);
break;
}
@@ -2419,12 +3123,16 @@ static void
rtl8125_disable_rxdvgate(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- RTL_W8(0xF2, RTL_R8(0xF2) & ~BIT_3);
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_3);
mdelay(2);
break;
}
@@ -2453,12 +3161,11 @@ static u8
rtl8125_is_phy_disable_mode_enabled(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
u8 phy_disable_mode_enabled = FALSE;
switch (tp->HwSuppCheckPhyDisableModeVer) {
case 3:
- if (RTL_R8(0xF2) & BIT_5)
+ if (RTL_R8(tp, 0xF2) & BIT_5)
phy_disable_mode_enabled = TRUE;
break;
}
@@ -2483,53 +3190,71 @@ rtl8125_is_in_phy_disable_mode(struct net_device *dev)
return in_phy_disable_mode;
}
-static void
-rtl8125_enable_phy_disable_mode(struct net_device *dev)
+static bool
+rtl8125_stop_all_request(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
-
- switch (tp->HwSuppCheckPhyDisableModeVer) {
- case 3:
- RTL_W8(0xF2, RTL_R8(0xF2) | BIT_5);
- break;
- }
+ int i;
- dprintk("enable phy disable mode.\n");
-}
+ RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
-static void
-rtl8125_disable_phy_disable_mode(struct net_device *dev)
-{
- struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_6:
+ for (i = 0; i < 20; i++) {
+ udelay(10);
+ if (!(RTL_R8(tp, ChipCmd) & StopReq)) break;
+ }
- switch (tp->HwSuppCheckPhyDisableModeVer) {
- case 3:
- RTL_W8(0xF2, RTL_R8(0xF2) & ~BIT_5);
+ if (i == 20)
+ return 0;
break;
}
- mdelay(1);
-
- dprintk("disable phy disable mode.\n");
+ return 1;
}
void
rtl8125_wait_txrx_fifo_empty(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
int i;
+ switch (tp->mcfg) {
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ rtl8125_stop_all_request(dev);
+ break;
+ }
+
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- for (i = 0; i < 10; i++) {
- udelay(100);
- if ((RTL_R8(MCUCmd_reg) & (Txfifo_empty | Rxfifo_empty)) == (Txfifo_empty | Rxfifo_empty))
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ for (i = 0; i < 3000; i++) {
+ udelay(50);
+ if ((RTL_R8(tp, MCUCmd_reg) & (Txfifo_empty | Rxfifo_empty)) == (Txfifo_empty | Rxfifo_empty))
break;
+ }
+ break;
+ }
+ switch (tp->mcfg) {
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ for (i = 0; i < 3000; i++) {
+ udelay(50);
+ if ((RTL_R16(tp, IntrMitigate) & (BIT_0 | BIT_1 | BIT_8)) == (BIT_0 | BIT_1 | BIT_8))
+ break;
}
break;
}
@@ -2537,142 +3262,222 @@ rtl8125_wait_txrx_fifo_empty(struct net_device *dev)
#ifdef ENABLE_DASH_SUPPORT
-inline void
-rtl8125_enable_dash2_interrupt(struct rtl8125_private *tp, void __iomem *ioaddr)
+static inline void
+rtl8125_enable_dash2_interrupt(struct rtl8125_private *tp)
{
if (!tp->DASH) return;
if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
- RTL_CMAC_W8(CMAC_IBIMR0, ( ISRIMR_DASH_TYPE2_ROK | ISRIMR_DASH_TYPE2_TOK | ISRIMR_DASH_TYPE2_TDU | ISRIMR_DASH_TYPE2_RDU | ISRIMR_DASH_TYPE2_RX_DISABLE_IDLE ));
+ RTL_CMAC_W8(tp, CMAC_IBIMR0, ( ISRIMR_DASH_TYPE2_ROK | ISRIMR_DASH_TYPE2_TOK | ISRIMR_DASH_TYPE2_TDU | ISRIMR_DASH_TYPE2_RDU | ISRIMR_DASH_TYPE2_RX_DISABLE_IDLE ));
}
}
static inline void
-rtl8125_disable_dash2_interrupt(struct rtl8125_private *tp, void __iomem *ioaddr)
+rtl8125_disable_dash2_interrupt(struct rtl8125_private *tp)
{
if (!tp->DASH) return;
if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
- RTL_CMAC_W8(CMAC_IBIMR0, 0);
+ RTL_CMAC_W8(tp, CMAC_IBIMR0, 0);
}
}
#endif
-static inline void
-rtl8125_enable_hw_interrupt(struct rtl8125_private *tp, void __iomem *ioaddr)
+void
+rtl8125_enable_hw_linkchg_interrupt(struct rtl8125_private *tp)
{
- RTL_W32(IMR0_8125, tp->intr_mask);
+ switch (tp->HwCurrIsrVer) {
+ case 2:
+ RTL_W32(tp, IMR_V2_SET_REG_8125, ISRIMR_V2_LINKCHG);
+ break;
+ case 1:
+ RTL_W32(tp, tp->imr_reg[0], LinkChg | RTL_R32(tp, tp->imr_reg[0]));
+ break;
+ }
#ifdef ENABLE_DASH_SUPPORT
if (tp->DASH)
- rtl8125_enable_dash2_interrupt(tp, ioaddr);
+ rtl8125_enable_dash2_interrupt(tp);
#endif
}
static inline void
-rtl8125_disable_hw_interrupt(struct rtl8125_private *tp, void __iomem *ioaddr)
+rtl8125_enable_hw_interrupt(struct rtl8125_private *tp)
{
- RTL_W32(IMR0_8125, 0x0000);
+ switch (tp->HwCurrIsrVer) {
+ case 2:
+ RTL_W32(tp, IMR_V2_SET_REG_8125, tp->intr_mask);
+ break;
+ case 1:
+ RTL_W32(tp, tp->imr_reg[0], tp->intr_mask);
+
+ if (R8125_MULTI_RX_Q(tp)) {
+ int i;
+ for (i=1; inum_rx_rings; i++)
+ RTL_W16(tp, tp->imr_reg[i], other_q_intr_mask);
+ }
+ break;
+ }
#ifdef ENABLE_DASH_SUPPORT
if (tp->DASH)
- rtl8125_disable_dash2_interrupt(tp, ioaddr);
+ rtl8125_enable_dash2_interrupt(tp);
#endif
}
+static inline void rtl8125_clear_hw_isr_v2(struct rtl8125_private *tp,
+ u32 message_id)
+{
+ RTL_W32(tp, ISR_V2_8125, BIT(message_id));
+}
+
+static inline void
+rtl8125_disable_hw_interrupt(struct rtl8125_private *tp)
+{
+ if (tp->HwCurrIsrVer == 2) {
+ RTL_W32(tp, IMR_V2_CLEAR_REG_8125, 0xFFFFFFFF);
+ } else {
+ RTL_W32(tp, tp->imr_reg[0], 0x0000);
+
+ if (R8125_MULTI_RX_Q(tp)) {
+ int i;
+ for (i=1; inum_rx_rings; i++)
+ RTL_W16(tp, tp->imr_reg[i], 0);
+ }
+
+#ifdef ENABLE_DASH_SUPPORT
+ if (tp->DASH)
+ rtl8125_disable_dash2_interrupt(tp);
+#endif
+ }
+}
static inline void
-rtl8125_switch_to_hw_interrupt(struct rtl8125_private *tp, void __iomem *ioaddr)
+rtl8125_switch_to_hw_interrupt(struct rtl8125_private *tp)
{
- RTL_W32(TIMER_INT0_8125, 0x0000);
+ RTL_W32(tp, TIMER_INT0_8125, 0x0000);
- rtl8125_enable_hw_interrupt(tp, ioaddr);
+ rtl8125_enable_hw_interrupt(tp);
}
static inline void
-rtl8125_switch_to_timer_interrupt(struct rtl8125_private *tp, void __iomem *ioaddr)
+rtl8125_switch_to_timer_interrupt(struct rtl8125_private *tp)
{
if (tp->use_timer_interrrupt) {
- RTL_W32(TIMER_INT0_8125, timer_count);
- RTL_W32(TCTR0_8125, timer_count);
- RTL_W32(IMR0_8125, tp->intr_mask);
+ RTL_W32(tp, TIMER_INT0_8125, timer_count);
+ RTL_W32(tp, TCTR0_8125, timer_count);
+ RTL_W32(tp, tp->imr_reg[0], tp->timer_intr_mask);
#ifdef ENABLE_DASH_SUPPORT
if (tp->DASH)
- rtl8125_enable_dash2_interrupt(tp, ioaddr);
+ rtl8125_enable_dash2_interrupt(tp);
#endif
} else {
- rtl8125_switch_to_hw_interrupt(tp, ioaddr);
+ rtl8125_switch_to_hw_interrupt(tp);
}
}
static void
-rtl8125_irq_mask_and_ack(struct rtl8125_private *tp, void __iomem *ioaddr)
+rtl8125_irq_mask_and_ack(struct rtl8125_private *tp)
{
- rtl8125_disable_hw_interrupt(tp, ioaddr);
+ rtl8125_disable_hw_interrupt(tp);
+
+ if (tp->HwCurrIsrVer == 2) {
+ RTL_W32(tp, ISR_V2_8125, 0xFFFFFFFF);
+ } else {
#ifdef ENABLE_DASH_SUPPORT
- if (tp->DASH) {
- if (tp->dash_printer_enabled) {
- RTL_W16(IntrStatus, RTL_R16(IntrStatus) &
- ~(ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET));
- } else {
- if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
- RTL_CMAC_W8(CMAC_IBISR0, RTL_CMAC_R8(CMAC_IBISR0));
+ if (tp->DASH) {
+ if (tp->dash_printer_enabled) {
+ RTL_W32(tp, tp->isr_reg[0], RTL_R32(tp, tp->isr_reg[0]) &
+ ~(ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET));
+ } else {
+ if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
+ RTL_CMAC_W8(tp, CMAC_IBISR0, RTL_CMAC_R8(tp, CMAC_IBISR0));
+ }
}
+ } else {
+ RTL_W32(tp, tp->isr_reg[0], RTL_R32(tp, tp->isr_reg[0]));
}
- } else {
- RTL_W16(IntrStatus, RTL_R16(IntrStatus));
- }
#else
- RTL_W16(IntrStatus, RTL_R16(IntrStatus));
+ RTL_W32(tp, tp->isr_reg[0], RTL_R32(tp, tp->isr_reg[0]));
#endif
+ if (R8125_MULTI_RX_Q(tp)) {
+ int i;
+ for (i=1; inum_rx_rings; i++)
+ RTL_W16(tp, tp->isr_reg[i], RTL_R16(tp, tp->isr_reg[i]));
+ }
+ }
+}
+
+static void
+rtl8125_disable_rx_packet_filter(struct rtl8125_private *tp)
+{
+
+ RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) &
+ ~(AcceptErr | AcceptRunt |AcceptBroadcast | AcceptMulticast |
+ AcceptMyPhys | AcceptAllPhys));
}
static void
rtl8125_nic_reset(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
int i;
- RTL_W32(RxConfig, (RX_DMA_BURST << RxCfgDMAShift));
+ rtl8125_disable_rx_packet_filter(tp);
rtl8125_enable_rxdvgate(dev);
+ rtl8125_stop_all_request(dev);
+
rtl8125_wait_txrx_fifo_empty(dev);
- switch (tp->mcfg) {
- case CFG_METHOD_2:
- case CFG_METHOD_3:
- default:
- mdelay(2);
- break;
- }
+ mdelay(2);
/* Soft reset the chip. */
- RTL_W8(ChipCmd, CmdReset);
+ RTL_W8(tp, ChipCmd, CmdReset);
/* Check that the chip has finished the reset. */
for (i = 100; i > 0; i--) {
udelay(100);
- if ((RTL_R8(ChipCmd) & CmdReset) == 0)
+ if ((RTL_R8(tp, ChipCmd) & CmdReset) == 0)
break;
}
}
+static void
+rtl8125_hw_set_interrupt_type(struct rtl8125_private *tp, u8 isr_ver)
+{
+ u8 tmp;
+
+ switch (tp->HwSuppIsrVer) {
+ case 2:
+ tmp = RTL_R8(tp, INT_CFG0_8125);
+ tmp &= ~(INT_CFG0_ENABLE_8125);
+ if (isr_ver == 2)
+ tmp |= INT_CFG0_ENABLE_8125;
+ RTL_W8(tp, INT_CFG0_8125, tmp);
+ break;
+ }
+}
+
static void
rtl8125_hw_clear_timer_int(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- RTL_W32(TIMER_INT0_8125, 0x0000);
- RTL_W32(TIMER_INT1_8125, 0x0000);
- RTL_W32(TIMER_INT2_8125, 0x0000);
- RTL_W32(TIMER_INT3_8125, 0x0000);
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ RTL_W32(tp, TIMER_INT0_8125, 0x0000);
+ RTL_W32(tp, TIMER_INT1_8125, 0x0000);
+ RTL_W32(tp, TIMER_INT2_8125, 0x0000);
+ RTL_W32(tp, TIMER_INT3_8125, 0x0000);
break;
}
}
@@ -2681,28 +3486,60 @@ static void
rtl8125_hw_clear_int_miti(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
int i;
- switch (tp->mcfg) {
- case CFG_METHOD_2:
- case CFG_METHOD_3:
+ switch (tp->HwSuppIntMitiVer) {
+ case 3:
//IntMITI_0-IntMITI_31
- for (i=0xA00; i<0xB00; i+=4) {
- RTL_W32(i, 0x0000);
- }
+ for (i=0xA00; i<0xB00; i+=4)
+ RTL_W32(tp, i, 0x0000);
+ break;
+ case 4:
+ //IntMITI_0-IntMITI_15
+ for (i = 0xA00; i < 0xA80; i += 4)
+ RTL_W32(tp, i, 0x0000);
+
+ RTL_W8(tp, INT_CFG0_8125, RTL_R8(tp, INT_CFG0_8125) &
+ ~(INT_CFG0_TIMEOUT0_BYPASS_8125 | INT_CFG0_MITIGATION_BYPASS_8125));
+
+ RTL_W16(tp, INT_CFG1_8125, 0x0000);
break;
}
}
-static void
+void
+rtl8125_hw_set_timer_int_8125(struct rtl8125_private *tp,
+ u32 message_id,
+ u8 timer_intmiti_val)
+{
+ switch (tp->HwSuppIntMitiVer) {
+ case 4:
+#ifdef ENABLE_LIB_SUPPORT
+ if (message_id < R8125_MAX_RX_QUEUES_VEC_V3)
+ timer_intmiti_val = 0;
+#else
+ if (tp->EnableRss && (message_id < R8125_MAX_RX_QUEUES_VEC_V3))
+ timer_intmiti_val = 0;
+#endif //ENABLE_LIB_SUPPORT
+ if (message_id < R8125_MAX_RX_QUEUES_VEC_V3) //ROK
+ RTL_W8(tp,INT_MITI_V2_0_RX + 8 * message_id, timer_intmiti_val);
+ else if (message_id == 16) //TOK
+ RTL_W8(tp,INT_MITI_V2_0_TX, timer_intmiti_val);
+ else if (message_id == 18) //TOK
+ RTL_W8(tp,INT_MITI_V2_1_TX, timer_intmiti_val);
+ break;
+ }
+}
+
+void
rtl8125_hw_reset(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
+
+ rtl8125_lib_reset_prepare(tp);
/* Disable interrupts */
- rtl8125_irq_mask_and_ack(tp, ioaddr);
+ rtl8125_irq_mask_and_ack(tp);
rtl8125_hw_clear_timer_int(dev);
@@ -2725,19 +3562,33 @@ static unsigned int
rtl8125_xmii_link_ok(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
unsigned int retval;
- retval = (RTL_R16(PHYstatus) & LinkStatus) ? 1 : 0;
+ retval = (RTL_R16(tp, PHYstatus) & LinkStatus) ? 1 : 0;
return retval;
}
+static int
+rtl8125_wait_phy_reset_complete(struct rtl8125_private *tp)
+{
+ int i, val;
+
+ for (i = 0; i < 2500; i++) {
+ val = rtl8125_mdio_read(tp, MII_BMCR) & BMCR_RESET;
+ if (!val)
+ return 0;
+
+ mdelay(1);
+ }
+
+ return -1;
+}
+
static void
rtl8125_xmii_reset_enable(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- int i, val = 0;
if (rtl8125_is_in_phy_disable_mode(dev)) {
return;
@@ -2752,26 +3603,48 @@ rtl8125_xmii_reset_enable(struct net_device *dev)
mdio_direct_write_phy_ocp(tp, 0xA5D4, mdio_direct_read_phy_ocp(tp, 0xA5D4) & ~(RTK_ADVERTISE_2500FULL));
rtl8125_mdio_write(tp, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
- for (i = 0; i < 2500; i++) {
- val = rtl8125_mdio_read(tp, MII_BMCR) & BMCR_RESET;
-
- if (!val) {
- return;
- }
-
- mdelay(1);
- }
+ if (rtl8125_wait_phy_reset_complete(tp) == 0) return;
if (netif_msg_link(tp))
printk(KERN_ERR "%s: PHY reset failed.\n", dev->name);
}
-void rtl8125_init_ring_indexes(struct rtl8125_private *tp)
+void
+rtl8125_init_ring_indexes(struct rtl8125_private *tp)
{
- tp->dirty_tx = 0;
- tp->dirty_rx = 0;
- tp->cur_tx = 0;
- tp->cur_rx = 0;
+ int i;
+
+ for (i = 0; i < tp->HwSuppNumTxQueues; i++) {
+ struct rtl8125_tx_ring *ring = &tp->tx_ring[i];
+ ring->dirty_tx = ring->cur_tx = 0;
+ ring->NextHwDesCloPtr = 0;
+ ring->BeginHwDesCloPtr = 0;
+ ring->index = i;
+ ring->priv = tp;
+ }
+
+ for (i = 0; i < tp->HwSuppNumRxQueues; i++) {
+ struct rtl8125_rx_ring *ring = &tp->rx_ring[i];
+ ring->dirty_rx = ring->cur_rx = 0;
+ ring->index = i;
+ ring->priv = tp;
+ }
+
+#ifdef ENABLE_LIB_SUPPORT
+ for (i = 0; i < tp->HwSuppNumTxQueues; i++) {
+ struct rtl8125_ring *ring = &tp->lib_tx_ring[i];
+ ring->direction = RTL8125_CH_DIR_TX;
+ ring->queue_num = i;
+ ring->private = tp;
+ }
+
+ for (i = 0; i < tp->HwSuppNumRxQueues; i++) {
+ struct rtl8125_ring *ring = &tp->lib_rx_ring[i];
+ ring->direction = RTL8125_CH_DIR_RX;
+ ring->queue_num = i;
+ ring->private = tp;
+ }
+#endif
}
static void
@@ -2780,6 +3653,11 @@ rtl8125_issue_offset_99_event(struct rtl8125_private *tp)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
rtl8125_mac_ocp_write(tp, 0xE09A, rtl8125_mac_ocp_read(tp, 0xE09A) | BIT_0);
break;
}
@@ -2789,15 +3667,13 @@ rtl8125_issue_offset_99_event(struct rtl8125_private *tp)
static void
NICChkTypeEnableDashInterrupt(struct rtl8125_private *tp)
{
- void __iomem *ioaddr = tp->mmio_addr;
-
if (tp->DASH) {
//
// even disconnected, enable 3 dash interrupt mask bits for in-band/out-band communication
//
if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
- rtl8125_enable_dash2_interrupt(tp, ioaddr);
- RTL_W16(IntrMask, (ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET));
+ rtl8125_enable_dash2_interrupt(tp);
+ RTL_W16(tp, IntrMask, (ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET));
}
}
}
@@ -2811,11 +3687,16 @@ static int rtl8125_enable_eee_plus(struct rtl8125_private *tp)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
rtl8125_mac_ocp_write(tp, 0xE080, rtl8125_mac_ocp_read(tp, 0xE080)|BIT_1);
break;
default:
-// dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support EEEPlus\n");
+// dev_printk(KERN_DEBUG, tp_to_dev(tp), "Not Support EEEPlus\n");
ret = -EOPNOTSUPP;
break;
}
@@ -2831,11 +3712,15 @@ static int rtl8125_disable_eee_plus(struct rtl8125_private *tp)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
rtl8125_mac_ocp_write(tp, 0xE080, rtl8125_mac_ocp_read(tp, 0xE080)&~BIT_1);
break;
-
default:
-// dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support EEEPlus\n");
+// dev_printk(KERN_DEBUG, tp_to_dev(tp), "Not Support EEEPlus\n");
ret = -EOPNOTSUPP;
break;
}
@@ -2843,74 +3728,189 @@ static int rtl8125_disable_eee_plus(struct rtl8125_private *tp)
return ret;
}
+static void rtl8125_enable_double_vlan(struct rtl8125_private *tp)
+{
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ RTL_W16(tp, DOUBLE_VLAN_CONFIG, 0xf002);
+ break;
+ default:
+ break;
+ }
+}
+
+static void rtl8125_disable_double_vlan(struct rtl8125_private *tp)
+{
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ RTL_W16(tp, DOUBLE_VLAN_CONFIG, 0);
+ break;
+ default:
+ break;
+ }
+}
+
static void
-rtl8125_check_link_status(struct net_device *dev)
+rtl8125_link_on_patch(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
- int link_status_on;
- link_status_on = tp->link_ok(dev);
+ rtl8125_hw_config(dev);
- if (netif_carrier_ok(dev) != link_status_on) {
- if (link_status_on) {
- rtl8125_hw_config(dev);
+ if ((tp->mcfg == CFG_METHOD_2) &&
+ netif_running(dev)) {
+ if (RTL_R16(tp, PHYstatus)&FullDup)
+ RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) | (BIT_24 | BIT_25)) & ~BIT_19);
+ else
+ RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) | BIT_25) & ~(BIT_19 | BIT_24));
+ }
- if ((tp->mcfg == CFG_METHOD_2) &&
- netif_running(dev)) {
- if (RTL_R16(PHYstatus)&FullDup)
- RTL_W32(TxConfig, (RTL_R32(TxConfig) | (BIT_24 | BIT_25)) & ~BIT_19);
- else
- RTL_W32(TxConfig, (RTL_R32(TxConfig) | BIT_25) & ~(BIT_19 | BIT_24));
- }
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ if (RTL_R8(tp, PHYstatus) & _10bps)
+ rtl8125_enable_eee_plus(tp);
+ break;
+ default:
+ break;
+ }
- if ((tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3) &&
- (RTL_R8(PHYstatus) & _10bps))
- rtl8125_enable_eee_plus(tp);
+ rtl8125_hw_start(dev);
- rtl8125_hw_start(dev);
+ netif_carrier_on(dev);
- netif_carrier_on(dev);
+ netif_tx_wake_all_queues(dev);
- netif_wake_queue(dev);
+ tp->phy_reg_aner = rtl8125_mdio_read(tp, MII_EXPANSION);
+ tp->phy_reg_anlpar = rtl8125_mdio_read(tp, MII_LPA);
+ tp->phy_reg_gbsr = rtl8125_mdio_read(tp, MII_STAT1000);
+ tp->phy_reg_status_2500 = mdio_direct_read_phy_ocp(tp, 0xA5D6);
+}
- rtl8125_mdio_write(tp, 0x1F, 0x0000);
- tp->phy_reg_anlpar = rtl8125_mdio_read(tp, MII_LPA);
+static void
+rtl8125_link_down_patch(struct net_device *dev)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
- if (netif_msg_ifup(tp))
- printk(KERN_INFO PFX "%s: link up\n", dev->name);
- } else {
- if (netif_msg_ifdown(tp))
- printk(KERN_INFO PFX "%s: link down\n", dev->name);
+ tp->phy_reg_aner = 0;
+ tp->phy_reg_anlpar = 0;
+ tp->phy_reg_gbsr = 0;
+ tp->phy_reg_status_2500 = 0;
- tp->phy_reg_anlpar = 0;
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ rtl8125_disable_eee_plus(tp);
+ break;
+ default:
+ break;
+ }
- if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3)
- rtl8125_disable_eee_plus(tp);
+ netif_carrier_off(dev);
- netif_stop_queue(dev);
+ netif_tx_disable(dev);
- netif_carrier_off(dev);
+ rtl8125_hw_reset(dev);
- rtl8125_hw_reset(dev);
+ rtl8125_tx_clear(tp);
- rtl8125_tx_clear(tp);
+ rtl8125_rx_clear(tp);
- rtl8125_rx_clear(tp);
+ rtl8125_init_ring(dev);
- rtl8125_init_ring(dev);
+ rtl8125_enable_hw_linkchg_interrupt(tp);
- rtl8125_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
+ //rtl8125_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
#ifdef ENABLE_DASH_SUPPORT
- if (tp->DASH) {
- NICChkTypeEnableDashInterrupt(tp);
- }
+ if (tp->DASH) {
+ NICChkTypeEnableDashInterrupt(tp);
+ }
#endif
- }
+}
+
+static void
+_rtl8125_check_link_status(struct net_device *dev)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+
+ if (tp->link_ok(dev)) {
+ rtl8125_link_on_patch(dev);
+
+ if (netif_msg_ifup(tp))
+ printk(KERN_INFO PFX "%s: link up\n", dev->name);
+ } else {
+ if (netif_msg_ifdown(tp))
+ printk(KERN_INFO PFX "%s: link down\n", dev->name);
+
+ rtl8125_link_down_patch(dev);
}
}
+static void
+rtl8125_check_link_status(struct net_device *dev)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+
+ _rtl8125_check_link_status(dev);
+
+ tp->resume_not_chg_speed = 0;
+}
+
+static void
+rtl8125_link_option_giga(u8 *aut,
+ u32 *spd,
+ u8 *dup,
+ u32 *adv)
+{
+ if ((*spd != SPEED_1000) &&
+ (*spd != SPEED_100) &&
+ (*spd != SPEED_10))
+ *spd = SPEED_1000;
+
+ if ((*dup != DUPLEX_FULL) && (*dup != DUPLEX_HALF))
+ *dup = DUPLEX_FULL;
+
+ if ((*aut != AUTONEG_ENABLE) && (*aut != AUTONEG_DISABLE))
+ *aut = AUTONEG_ENABLE;
+
+ *adv &= (ADVERTISED_10baseT_Half |
+ ADVERTISED_10baseT_Full |
+ ADVERTISED_100baseT_Half |
+ ADVERTISED_100baseT_Full |
+ ADVERTISED_1000baseT_Half |
+ ADVERTISED_1000baseT_Full);
+ if (*adv == 0)
+ *adv = (ADVERTISED_10baseT_Half |
+ ADVERTISED_10baseT_Full |
+ ADVERTISED_100baseT_Half |
+ ADVERTISED_100baseT_Full |
+ ADVERTISED_1000baseT_Half |
+ ADVERTISED_1000baseT_Full);
+}
+
static void
rtl8125_link_option(u8 *aut,
u32 *spd,
@@ -2951,7 +3951,13 @@ rtl8125_enable_ocp_phy_power_saving(struct net_device *dev)
struct rtl8125_private *tp = netdev_priv(dev);
u16 val;
- if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3) {
+ if (tp->mcfg == CFG_METHOD_2 ||
+ tp->mcfg == CFG_METHOD_3 ||
+ tp->mcfg == CFG_METHOD_4 ||
+ tp->mcfg == CFG_METHOD_5 ||
+ tp->mcfg == CFG_METHOD_6 ||
+ tp->mcfg == CFG_METHOD_7 ||
+ tp->mcfg == CFG_METHOD_8) {
val = mdio_direct_read_phy_ocp(tp, 0xC416);
if (val != 0x0050) {
rtl8125_set_phy_mcu_patch_request(tp);
@@ -2969,7 +3975,13 @@ rtl8125_disable_ocp_phy_power_saving(struct net_device *dev)
struct rtl8125_private *tp = netdev_priv(dev);
u16 val;
- if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3) {
+ if (tp->mcfg == CFG_METHOD_2 ||
+ tp->mcfg == CFG_METHOD_3 ||
+ tp->mcfg == CFG_METHOD_4 ||
+ tp->mcfg == CFG_METHOD_5 ||
+ tp->mcfg == CFG_METHOD_6 ||
+ tp->mcfg == CFG_METHOD_7 ||
+ tp->mcfg == CFG_METHOD_8) {
val = mdio_direct_read_phy_ocp(tp, 0xC416);
if (val != 0x0500) {
rtl8125_set_phy_mcu_patch_request(tp);
@@ -2984,12 +3996,11 @@ static void
rtl8125_wait_ll_share_fifo_ready(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
int i;
for (i = 0; i < 10; i++) {
udelay(100);
- if (RTL_R16(0xD2) & BIT_9)
+ if (RTL_R16(tp, 0xD2) & BIT_9)
break;
}
}
@@ -3000,6 +4011,11 @@ rtl8125_disable_pci_offset_99(struct rtl8125_private *tp)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
rtl8125_mac_ocp_write(tp, 0xE032, rtl8125_mac_ocp_read(tp, 0xE032) & ~(BIT_0 | BIT_1));
break;
}
@@ -3007,6 +4023,11 @@ rtl8125_disable_pci_offset_99(struct rtl8125_private *tp)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
rtl8125_csi_fun0_write_byte(tp, 0x99, 0x00);
break;
}
@@ -3020,6 +4041,11 @@ rtl8125_enable_pci_offset_99(struct rtl8125_private *tp)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
rtl8125_csi_fun0_write_byte(tp, 0x99, tp->org_pci_offset_99);
break;
}
@@ -3027,11 +4053,16 @@ rtl8125_enable_pci_offset_99(struct rtl8125_private *tp)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
csi_tmp = rtl8125_mac_ocp_read(tp, 0xE032);
csi_tmp &= ~(BIT_0 | BIT_1);
- if (!(tp->org_pci_offset_99 & (BIT_5 | BIT_6)))
+ if (tp->org_pci_offset_99 & (BIT_5 | BIT_6))
csi_tmp |= BIT_1;
- if (!(tp->org_pci_offset_99 & BIT_2))
+ if (tp->org_pci_offset_99 & BIT_2)
csi_tmp |= BIT_0;
rtl8125_mac_ocp_write(tp, 0xE032, csi_tmp);
break;
@@ -3046,16 +4077,27 @@ rtl8125_init_pci_offset_99(struct rtl8125_private *tp)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
rtl8125_mac_ocp_write(tp, 0xCDD0, 0x9003);
csi_tmp = rtl8125_mac_ocp_read(tp, 0xE034);
- csi_tmp |= (BIT_15|BIT_14);
+ csi_tmp |= (BIT_15 | BIT_14);
rtl8125_mac_ocp_write(tp, 0xE034, csi_tmp);
+ rtl8125_mac_ocp_write(tp, 0xCDD2, 0x889C);
rtl8125_mac_ocp_write(tp, 0xCDD8, 0x9003);
+ rtl8125_mac_ocp_write(tp, 0xCDD4, 0x8C30);
rtl8125_mac_ocp_write(tp, 0xCDDA, 0x9003);
- rtl8125_mac_ocp_write(tp, 0xCDDC, 0x9003);
- rtl8125_mac_ocp_write(tp, 0xCDD2, 0x883C);
- rtl8125_mac_ocp_write(tp, 0xCDD4, 0x8C12);
rtl8125_mac_ocp_write(tp, 0xCDD6, 0x9003);
+ rtl8125_mac_ocp_write(tp, 0xCDDC, 0x9003);
+ rtl8125_mac_ocp_write(tp, 0xCDE8, 0x883E);
+ rtl8125_mac_ocp_write(tp, 0xCDEA, 0x9003);
+ rtl8125_mac_ocp_write(tp, 0xCDEC, 0x889C);
+ rtl8125_mac_ocp_write(tp, 0xCDEE, 0x9003);
+ rtl8125_mac_ocp_write(tp, 0xCDF0, 0x8C09);
+ rtl8125_mac_ocp_write(tp, 0xCDF2, 0x9003);
csi_tmp = rtl8125_mac_ocp_read(tp, 0xE032);
csi_tmp |= (BIT_14);
rtl8125_mac_ocp_write(tp, 0xE032, csi_tmp);
@@ -3076,7 +4118,11 @@ rtl8125_disable_pci_offset_180(struct rtl8125_private *tp)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- csi_tmp = rtl8125_mac_ocp_read(tp, 0xE032);
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
csi_tmp = rtl8125_mac_ocp_read(tp, 0xE092);
csi_tmp &= 0xFF00;
rtl8125_mac_ocp_write(tp, 0xE092, csi_tmp);
@@ -3092,11 +4138,11 @@ rtl8125_enable_pci_offset_180(struct rtl8125_private *tp)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- csi_tmp = rtl8125_mac_ocp_read(tp, 0xE098);
- csi_tmp &= 0x000F;
- csi_tmp |= (0x0640);
- rtl8125_mac_ocp_write(tp, 0xE098, csi_tmp);
-
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
csi_tmp = rtl8125_mac_ocp_read(tp, 0xE094);
csi_tmp &= 0x00FF;
rtl8125_mac_ocp_write(tp, 0xE094, csi_tmp);
@@ -3106,24 +4152,23 @@ rtl8125_enable_pci_offset_180(struct rtl8125_private *tp)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- csi_tmp = rtl8125_mac_ocp_read(tp, 0xE032);
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
csi_tmp = rtl8125_mac_ocp_read(tp, 0xE092);
csi_tmp &= 0xFF00;
csi_tmp |= BIT_2;
rtl8125_mac_ocp_write(tp, 0xE092, csi_tmp);
break;
}
-
- rtl8125_mac_ocp_write(tp, 0xE094, 0x0000);
}
static void
rtl8125_init_pci_offset_180(struct rtl8125_private *tp)
{
- if (tp->org_pci_offset_180 & (BIT_0|BIT_1))
- rtl8125_enable_pci_offset_180(tp);
- else
- rtl8125_disable_pci_offset_180(tp);
+ rtl8125_enable_pci_offset_180(tp);
}
static void
@@ -3134,19 +4179,25 @@ rtl8125_set_pci_99_180_exit_driver_para(struct net_device *dev)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- rtl8125_issue_offset_99_event(tp);
- break;
- }
-
- switch (tp->mcfg) {
- case CFG_METHOD_2:
- case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ if (tp->org_pci_offset_99 & BIT_2)
+ rtl8125_issue_offset_99_event(tp);
rtl8125_disable_pci_offset_99(tp);
break;
}
+
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
rtl8125_disable_pci_offset_180(tp);
break;
}
@@ -3155,50 +4206,105 @@ rtl8125_set_pci_99_180_exit_driver_para(struct net_device *dev)
static void
rtl8125_enable_cfg9346_write(struct rtl8125_private *tp)
{
- void __iomem *ioaddr = tp->mmio_addr;
-
- RTL_W8(Cfg9346, RTL_R8(Cfg9346) | Cfg9346_Unlock);
+ RTL_W8(tp, Cfg9346, RTL_R8(tp, Cfg9346) | Cfg9346_Unlock);
}
static void
rtl8125_disable_cfg9346_write(struct rtl8125_private *tp)
{
- void __iomem *ioaddr = tp->mmio_addr;
+ RTL_W8(tp, Cfg9346, RTL_R8(tp, Cfg9346) & ~Cfg9346_Unlock);
+}
+
+static void
+rtl8125_enable_exit_l1_mask(struct rtl8125_private *tp)
+{
+ //(1)ERI(0xD4)(OCP 0xC0AC).bit[7:12]=6'b111111, L1 Mask
+ SetMcuAccessRegBit(tp, 0xC0AC, (BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12));
+}
+
+static void
+rtl8125_disable_exit_l1_mask(struct rtl8125_private *tp)
+{
+ //(1)ERI(0xD4)(OCP 0xC0AC).bit[7:12]=6'b000000, L1 Mask
+ ClearMcuAccessRegBit(tp, 0xC0AC, (BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12));
+}
+
+static void
+rtl8125_enable_extend_tally_couter(struct rtl8125_private *tp)
+{
+ switch (tp->HwSuppExtendTallyCounterVer) {
+ case 1:
+ SetMcuAccessRegBit(tp, 0xEA84, (BIT_1 | BIT_0));
+ break;
+ }
+}
- RTL_W8(Cfg9346, RTL_R8(Cfg9346) & ~Cfg9346_Unlock);
+static void
+rtl8125_disable_extend_tally_couter(struct rtl8125_private *tp)
+{
+ switch (tp->HwSuppExtendTallyCounterVer) {
+ case 1:
+ ClearMcuAccessRegBit(tp, 0xEA84, (BIT_1 | BIT_0));
+ break;
+ }
}
static void
rtl8125_hw_d3_para(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
- RTL_W16(RxMaxSize, RX_BUF_SIZE);
+ RTL_W16(tp, RxMaxSize, RX_BUF_SIZE);
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- RTL_W8(0xF1, RTL_R8(0xF1) & ~BIT_7);
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7);
rtl8125_enable_cfg9346_write(tp);
- RTL_W8(Config2, RTL_R8(Config2) & ~BIT_7);
- RTL_W8(Config5, RTL_R8(Config5) & ~BIT_0);
+ RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7);
+ RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0);
rtl8125_disable_cfg9346_write(tp);
break;
}
- if (tp->mcfg == CFG_METHOD_2 ||
- tp->mcfg == CFG_METHOD_3) {
+ rtl8125_disable_exit_l1_mask(tp);
+
+#ifdef ENABLE_REALWOW_SUPPORT
+ rtl8125_set_realwow_d3_para(dev);
+#endif
+
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
rtl8125_mac_ocp_write(tp, 0xEA18, 0x0064);
+ break;
}
rtl8125_set_pci_99_180_exit_driver_para(dev);
/*disable ocp phy power saving*/
- if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3)
+ if (tp->mcfg == CFG_METHOD_2 ||
+ tp->mcfg == CFG_METHOD_3 ||
+ tp->mcfg == CFG_METHOD_4 ||
+ tp->mcfg == CFG_METHOD_5 ||
+ tp->mcfg == CFG_METHOD_6 ||
+ tp->mcfg == CFG_METHOD_7 ||
+ tp->mcfg == CFG_METHOD_8)
rtl8125_disable_ocp_phy_power_saving(dev);
rtl8125_disable_rxdvgate(dev);
+
+ rtl8125_disable_extend_tally_couter(tp);
}
static void
@@ -3224,55 +4330,111 @@ rtl8125_disable_magic_packet(struct net_device *dev)
}
}
-#define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
+static void
+rtl8125_enable_linkchg_wakeup(struct net_device *dev)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+
+ switch (tp->HwSuppLinkChgWakeUpVer) {
+ case 3:
+ RTL_W8(tp, Config3, RTL_R8(tp, Config3) | LinkUp);
+ ClearAndSetMcuAccessRegBit(tp, 0xE0C6, (BIT_5 | BIT_3 | BIT_2), (BIT_4 | BIT_1 | BIT_0));
+ break;
+ }
+}
static void
-rtl8125_get_hw_wol(struct net_device *dev)
+rtl8125_disable_linkchg_wakeup(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
+
+ switch (tp->HwSuppLinkChgWakeUpVer) {
+ case 3:
+ RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~LinkUp);
+ ClearMcuAccessRegBit(tp, 0xE0C6, (BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0));
+ break;
+ }
+}
+
+#define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
+
+static u32
+rtl8125_get_hw_wol(struct rtl8125_private *tp)
+{
u8 options;
u32 csi_tmp;
- unsigned long flags;
+ u32 wol_opts = 0;
- spin_lock_irqsave(&tp->lock, flags);
+ if (disable_pm_support)
+ goto out;
- tp->wol_opts = 0;
- options = RTL_R8(Config1);
+ options = RTL_R8(tp, Config1);
if (!(options & PMEnable))
- goto out_unlock;
+ goto out;
- options = RTL_R8(Config3);
+ options = RTL_R8(tp, Config3);
if (options & LinkUp)
- tp->wol_opts |= WAKE_PHY;
+ wol_opts |= WAKE_PHY;
switch (tp->HwSuppMagicPktVer) {
case WAKEUP_MAGIC_PACKET_V3:
csi_tmp = rtl8125_mac_ocp_read(tp, 0xC0B6);
if (csi_tmp & BIT_0)
- tp->wol_opts |= WAKE_MAGIC;
+ wol_opts |= WAKE_MAGIC;
break;
}
- options = RTL_R8(Config5);
+ options = RTL_R8(tp, Config5);
if (options & UWF)
- tp->wol_opts |= WAKE_UCAST;
+ wol_opts |= WAKE_UCAST;
if (options & BWF)
- tp->wol_opts |= WAKE_BCAST;
+ wol_opts |= WAKE_BCAST;
if (options & MWF)
- tp->wol_opts |= WAKE_MCAST;
+ wol_opts |= WAKE_MCAST;
-out_unlock:
- tp->wol_enabled = (tp->wol_opts) ? WOL_ENABLED : WOL_DISABLED;
+out:
+ return wol_opts;
+}
+
+static void
+rtl8125_enable_d0_speedup(struct rtl8125_private *tp)
+{
+ if (FALSE == HW_SUPPORT_D0_SPEED_UP(tp)) return;
+ if (tp->D0SpeedUpSpeed == D0_SPEED_UP_SPEED_DISABLE) return;
+
+ if (tp->HwSuppD0SpeedUpVer == 1) {
+ u16 mac_ocp_data;
+
+ RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_3);
+
+ //speed up speed
+ mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xE10A);
+ mac_ocp_data &= ~(BIT_10 | BIT_9 | BIT_8 | BIT_7);
+ if (tp->D0SpeedUpSpeed == D0_SPEED_UP_SPEED_2500) {
+ mac_ocp_data |= BIT_7;
+ }
+ rtl8125_mac_ocp_write(tp, 0xE10A, mac_ocp_data);
+
+ //speed up flowcontrol
+ mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xE860);
+ mac_ocp_data |= (BIT_15 | BIT_14);
+ rtl8125_mac_ocp_write(tp, 0xE860, mac_ocp_data);
+ }
+}
+
+static void
+rtl8125_disable_d0_speedup(struct rtl8125_private *tp)
+{
+ if (FALSE == HW_SUPPORT_D0_SPEED_UP(tp)) return;
- spin_unlock_irqrestore(&tp->lock, flags);
+ if (tp->HwSuppD0SpeedUpVer == 1)
+ RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_7);
}
static void
rtl8125_set_hw_wol(struct net_device *dev, u32 wolopts)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
int i,tmp;
static struct {
u32 opt;
@@ -3289,6 +4451,7 @@ rtl8125_set_hw_wol(struct net_device *dev, u32 wolopts)
switch (tp->HwSuppMagicPktVer) {
case WAKEUP_MAGIC_PACKET_V3:
+ default:
tmp = ARRAY_SIZE(cfg) - 1;
if (wolopts & WAKE_MAGIC)
@@ -3301,10 +4464,19 @@ rtl8125_set_hw_wol(struct net_device *dev, u32 wolopts)
rtl8125_enable_cfg9346_write(tp);
for (i = 0; i < tmp; i++) {
- u8 options = RTL_R8(cfg[i].reg) & ~cfg[i].mask;
+ u8 options = RTL_R8(tp, cfg[i].reg) & ~cfg[i].mask;
if (wolopts & cfg[i].opt)
options |= cfg[i].mask;
- RTL_W8(cfg[i].reg, options);
+ RTL_W8(tp, cfg[i].reg, options);
+ }
+
+ switch (tp->HwSuppLinkChgWakeUpVer) {
+ case 3:
+ if (wolopts & WAKE_PHY)
+ rtl8125_enable_linkchg_wakeup(dev);
+ else
+ rtl8125_disable_linkchg_wakeup(dev);
+ break;
}
rtl8125_disable_cfg9346_write(tp);
@@ -3337,9 +4509,6 @@ rtl8125_phy_setup_force_mode(struct net_device *dev, u32 speed, u8 duplex)
bmcr_true_force = BMCR_SPEED100;
} else if ((speed == SPEED_100) && (duplex == DUPLEX_FULL)) {
bmcr_true_force = BMCR_SPEED100 | BMCR_FULLDPLX;
- } else if ((speed == SPEED_1000) && (duplex == DUPLEX_FULL) &&
- tp->HwSuppGigaForceMode) {
- bmcr_true_force = BMCR_SPEED1000 | BMCR_FULLDPLX;
} else {
netif_err(tp, drv, dev, "Failed to set phy force mode!\n");
return;
@@ -3350,61 +4519,165 @@ rtl8125_phy_setup_force_mode(struct net_device *dev, u32 speed, u8 duplex)
}
static void
-rtl8125_powerdown_pll(struct net_device *dev)
+rtl8125_set_pci_pme(struct rtl8125_private *tp, int set)
+{
+ struct pci_dev *pdev = tp->pci_dev;
+ u16 pmc;
+
+ if (!pdev->pm_cap)
+ return;
+
+ pci_read_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, &pmc);
+ pmc |= PCI_PM_CTRL_PME_STATUS;
+ if (set)
+ pmc |= PCI_PM_CTRL_PME_ENABLE;
+ else
+ pmc &= ~PCI_PM_CTRL_PME_ENABLE;
+ pci_write_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, pmc);
+}
+
+static void
+rtl8125_set_wol_link_speed(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
+ int auto_nego;
+ int giga_ctrl;
+ int ctrl_2500;
+ u32 adv;
+ u16 anlpar;
+ u16 gbsr;
+ u16 status_2500;
+ u16 aner;
+
+ if (tp->autoneg != AUTONEG_ENABLE)
+ goto exit;
- if (tp->wol_enabled == WOL_ENABLED || tp->DASH || tp->EnableKCPOffload) {
- int auto_nego;
- int giga_ctrl;
- u16 anlpar;
+ rtl8125_mdio_write(tp, 0x1F, 0x0000);
- rtl8125_set_hw_wol(dev, tp->wol_opts);
+ auto_nego = rtl8125_mdio_read(tp, MII_ADVERTISE);
+ auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL
+ | ADVERTISE_100HALF | ADVERTISE_100FULL);
- if (tp->mcfg == CFG_METHOD_2 ||
- tp->mcfg == CFG_METHOD_3) {
- rtl8125_enable_cfg9346_write(tp);
- RTL_W8(Config2, RTL_R8(Config2) | PMSTS_En);
- rtl8125_disable_cfg9346_write(tp);
- }
+ giga_ctrl = rtl8125_mdio_read(tp, MII_CTRL1000);
+ giga_ctrl &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL);
- rtl8125_mdio_write(tp, 0x1F, 0x0000);
- auto_nego = rtl8125_mdio_read(tp, MII_ADVERTISE);
- auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL
- | ADVERTISE_100HALF | ADVERTISE_100FULL);
+ ctrl_2500 = mdio_direct_read_phy_ocp(tp, 0xA5D4);
+ ctrl_2500 &= ~(RTK_ADVERTISE_2500FULL);
- if (netif_running(dev))
- anlpar = tp->phy_reg_anlpar;
- else
- anlpar = rtl8125_mdio_read(tp, MII_LPA);
+ aner = tp->phy_reg_aner;
+ anlpar = tp->phy_reg_anlpar;
+ gbsr = tp->phy_reg_gbsr;
+ status_2500 = tp->phy_reg_status_2500;
+ if (tp->link_ok(dev)) {
+ aner = rtl8125_mdio_read(tp, MII_EXPANSION);
+ anlpar = rtl8125_mdio_read(tp, MII_LPA);
+ gbsr = rtl8125_mdio_read(tp, MII_STAT1000);
+ status_2500 = mdio_direct_read_phy_ocp(tp, 0xA5D6);
+ }
-#ifdef CONFIG_DOWN_SPEED_100
+ adv = tp->advertising;
+ if ((aner | anlpar | gbsr | status_2500) == 0) {
+ int auto_nego_tmp = 0;
+ if (adv & ADVERTISED_10baseT_Half)
+ auto_nego_tmp |= ADVERTISE_10HALF;
+ if (adv & ADVERTISED_10baseT_Full)
+ auto_nego_tmp |= ADVERTISE_10FULL;
+ if (adv & ADVERTISED_100baseT_Half)
+ auto_nego_tmp |= ADVERTISE_100HALF;
+ if (adv & ADVERTISED_100baseT_Full)
+ auto_nego_tmp |= ADVERTISE_100FULL;
+
+ if (auto_nego_tmp == 0)
+ goto exit;
+
+ auto_nego |= auto_nego_tmp;
+ goto skip_check_lpa;
+ }
+ if (!(aner & EXPANSION_NWAY)) goto exit;
+
+ if ((adv & ADVERTISED_10baseT_Half) && (anlpar & LPA_10HALF))
+ auto_nego |= ADVERTISE_10HALF;
+ else if ((adv & ADVERTISED_10baseT_Full) && (anlpar & LPA_10FULL))
+ auto_nego |= ADVERTISE_10FULL;
+ else if ((adv & ADVERTISED_100baseT_Half) && (anlpar & LPA_100HALF))
+ auto_nego |= ADVERTISE_100HALF;
+ else if ((adv & ADVERTISED_100baseT_Full) && (anlpar & LPA_100FULL))
+ auto_nego |= ADVERTISE_100FULL;
+ else if (adv & ADVERTISED_1000baseT_Half && (gbsr & LPA_1000HALF))
+ giga_ctrl |= ADVERTISE_1000HALF;
+ else if (adv & ADVERTISED_1000baseT_Full && (gbsr & LPA_1000FULL))
+ giga_ctrl |= ADVERTISE_1000FULL;
+ else if (adv & ADVERTISED_2500baseX_Full && (status_2500 & RTK_LPA_ADVERTISE_2500FULL))
+ ctrl_2500 |= RTK_ADVERTISE_2500FULL;
+ else
+ goto exit;
+
+skip_check_lpa:
+ if (tp->DASH)
auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL);
-#else
- if (anlpar & (LPA_10HALF | LPA_10FULL))
- auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL);
- else
- auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL);
+
+#ifdef CONFIG_DOWN_SPEED_100
+ auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL);
#endif
- if (tp->DASH)
- auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL);
+ rtl8125_mdio_write(tp, MII_ADVERTISE, auto_nego);
+ rtl8125_mdio_write(tp, MII_CTRL1000, giga_ctrl);
+ mdio_direct_write_phy_ocp(tp, 0xA5D4, ctrl_2500);
+
+ rtl8125_phy_restart_nway(dev);
+
+exit:
+ return;
+}
+
+static bool
+rtl8125_keep_wol_link_speed(struct net_device *dev, u8 from_suspend)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+
+ if ((from_suspend && !tp->link_ok(dev)) ||
+ (!from_suspend && tp->resume_not_chg_speed))
+ return 1;
+
+ return 0;
+}
+static void
+rtl8125_powerdown_pll(struct net_device *dev, u8 from_suspend)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+
+ tp->check_keep_link_speed = 0;
+ if (tp->wol_enabled == WOL_ENABLED || tp->DASH || tp->EnableKCPOffload) {
+ rtl8125_set_hw_wol(dev, tp->wol_opts);
- giga_ctrl = rtl8125_mdio_read(tp, MII_CTRL1000) & ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL);
- rtl8125_mdio_write(tp, MII_ADVERTISE, auto_nego);
- rtl8125_mdio_write(tp, MII_CTRL1000, giga_ctrl);
if (tp->mcfg == CFG_METHOD_2 ||
- tp->mcfg == CFG_METHOD_3) {
- int ctrl_2500;
+ tp->mcfg == CFG_METHOD_3 ||
+ tp->mcfg == CFG_METHOD_4 ||
+ tp->mcfg == CFG_METHOD_5 ||
+ tp->mcfg == CFG_METHOD_6 ||
+ tp->mcfg == CFG_METHOD_7 ||
+ tp->mcfg == CFG_METHOD_8) {
+ rtl8125_enable_cfg9346_write(tp);
+ RTL_W8(tp, Config2, RTL_R8(tp, Config2) | PMSTS_En);
+ rtl8125_disable_cfg9346_write(tp);
+ }
+
+ /* Enable the PME and clear the status */
+ rtl8125_set_pci_pme(tp, 1);
+
+ if (rtl8125_keep_wol_link_speed(dev, from_suspend)) {
+ if (tp->wol_opts & WAKE_PHY)
+ tp->check_keep_link_speed = 1;
+ } else {
+ if (HW_SUPPORT_D0_SPEED_UP(tp)) {
+ rtl8125_enable_d0_speedup(tp);
+ tp->check_keep_link_speed = 1;
+ }
- ctrl_2500 = mdio_direct_read_phy_ocp(tp, 0xA5D4);
- ctrl_2500 &= ~(RTK_ADVERTISE_2500FULL);
- mdio_direct_write_phy_ocp(tp, 0xA5D4, ctrl_2500);
+ rtl8125_set_wol_link_speed(dev);
}
- rtl8125_phy_restart_nway(dev);
- RTL_W32(RxConfig, RTL_R32(RxConfig) | AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
+ RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) | AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
return;
}
@@ -3414,17 +4687,29 @@ rtl8125_powerdown_pll(struct net_device *dev)
rtl8125_phy_power_down(dev);
- switch (tp->mcfg) {
- case CFG_METHOD_2:
- case CFG_METHOD_3:
- RTL_W8(PMCH, RTL_R8(PMCH) & ~BIT_7);
- break;
+ if (!tp->HwIcVerUnknown) {
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~BIT_7);
+ break;
+ }
}
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- RTL_W8(0xF2, RTL_R8(0xF2) & ~BIT_6);
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_6);
break;
}
}
@@ -3432,15 +4717,21 @@ rtl8125_powerdown_pll(struct net_device *dev)
static void rtl8125_powerup_pll(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- RTL_W8(PMCH, RTL_R8(PMCH) | BIT_7 | BIT_6);
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | BIT_7 | BIT_6);
break;
}
+ if (tp->resume_not_chg_speed) return;
+
rtl8125_phy_power_up(dev);
}
@@ -3450,29 +4741,22 @@ rtl8125_get_wol(struct net_device *dev,
struct ethtool_wolinfo *wol)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
u8 options;
- unsigned long flags;
wol->wolopts = 0;
- if (tp->mcfg == CFG_METHOD_DEFAULT) {
+ if (tp->mcfg == CFG_METHOD_DEFAULT || disable_pm_support) {
wol->supported = 0;
return;
} else {
wol->supported = WAKE_ANY;
}
- spin_lock_irqsave(&tp->lock, flags);
-
- options = RTL_R8(Config1);
+ options = RTL_R8(tp, Config1);
if (!(options & PMEnable))
- goto out_unlock;
+ return;
wol->wolopts = tp->wol_opts;
-
-out_unlock:
- spin_unlock_irqrestore(&tp->lock, flags);
}
static int
@@ -3480,20 +4764,15 @@ rtl8125_set_wol(struct net_device *dev,
struct ethtool_wolinfo *wol)
{
struct rtl8125_private *tp = netdev_priv(dev);
- unsigned long flags;
- if (tp->mcfg == CFG_METHOD_DEFAULT)
+ if (tp->mcfg == CFG_METHOD_DEFAULT || disable_pm_support)
return -EOPNOTSUPP;
- spin_lock_irqsave(&tp->lock, flags);
-
tp->wol_opts = wol->wolopts;
tp->wol_enabled = (tp->wol_opts) ? WOL_ENABLED : WOL_DISABLED;
- spin_unlock_irqrestore(&tp->lock, flags);
-
- device_set_wakeup_enable(&tp->pci_dev->dev, wol->wolopts);
+ device_set_wakeup_enable(tp_to_dev(tp), wol->wolopts);
return 0;
}
@@ -3503,12 +4782,17 @@ rtl8125_get_drvinfo(struct net_device *dev,
struct ethtool_drvinfo *info)
{
struct rtl8125_private *tp = netdev_priv(dev);
+ struct rtl8125_fw *rtl_fw = tp->rtl_fw;
strcpy(info->driver, MODULENAME);
strcpy(info->version, RTL8125_VERSION);
strcpy(info->bus_info, pci_name(tp->pci_dev));
info->regdump_len = R8125_REGS_DUMP_SIZE;
info->eedump_len = tp->eeprom_len;
+ BUILD_BUG_ON(sizeof(info->fw_version) < sizeof(rtl_fw->version));
+ if (rtl_fw)
+ strlcpy(info->fw_version, rtl_fw->version,
+ sizeof(info->fw_version));
}
static int
@@ -3518,12 +4802,26 @@ rtl8125_get_regs_len(struct net_device *dev)
}
#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
+static void
+rtl8125_set_d0_speedup_speed(struct rtl8125_private *tp)
+{
+ if (FALSE == HW_SUPPORT_D0_SPEED_UP(tp)) return;
+
+ tp->D0SpeedUpSpeed = D0_SPEED_UP_SPEED_DISABLE;
+ if (tp->autoneg == AUTONEG_ENABLE) {
+ if (tp->speed == SPEED_2500)
+ tp->D0SpeedUpSpeed = D0_SPEED_UP_SPEED_2500;
+ else if(tp->speed == SPEED_1000)
+ tp->D0SpeedUpSpeed = D0_SPEED_UP_SPEED_1000;
+ }
+}
+
static int
rtl8125_set_speed_xmii(struct net_device *dev,
u8 autoneg,
u32 speed,
u8 duplex,
- u32 adv)
+ u64 adv)
{
struct rtl8125_private *tp = netdev_priv(dev);
int auto_nego = 0;
@@ -3535,7 +4833,8 @@ rtl8125_set_speed_xmii(struct net_device *dev,
ClearEthPhyOcpBit(tp, 0xA428, BIT_9);
ClearEthPhyOcpBit(tp, 0xA5EA, BIT_0);
- if (speed != SPEED_2500 &&
+ if (speed != SPEED_5000 &&
+ speed != SPEED_2500 &&
(speed != SPEED_1000) &&
(speed != SPEED_100) &&
(speed != SPEED_10)) {
@@ -3546,7 +4845,7 @@ rtl8125_set_speed_xmii(struct net_device *dev,
giga_ctrl = rtl8125_mdio_read(tp, MII_CTRL1000);
giga_ctrl &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL);
ctrl_2500 = mdio_direct_read_phy_ocp(tp, 0xA5D4);
- ctrl_2500 &= ~(RTK_ADVERTISE_2500FULL);
+ ctrl_2500 &= ~(RTK_ADVERTISE_2500FULL | RTK_ADVERTISE_5000FULL);
if (autoneg == AUTONEG_ENABLE) {
/*n-way force*/
@@ -3569,10 +4868,14 @@ rtl8125_set_speed_xmii(struct net_device *dev,
giga_ctrl |= ADVERTISE_1000FULL;
if (adv & ADVERTISED_2500baseX_Full)
ctrl_2500 |= RTK_ADVERTISE_2500FULL;
+ if (HW_SUPP_PHY_LINK_SPEED_5000M(tp)) {
+ if (adv & RTK_ADVERTISED_5000baseX_Full)
+ ctrl_2500 |= RTK_ADVERTISE_5000FULL;
+ }
//flow control
- if (dev->mtu <= ETH_DATA_LEN)
- auto_nego |= ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM;
+ if (dev->mtu <= ETH_DATA_LEN && tp->fcpause == rtl8125_fc_full)
+ auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
tp->phy_auto_nego_reg = auto_nego;
tp->phy_1000_ctrl_reg = giga_ctrl;
@@ -3587,11 +4890,9 @@ rtl8125_set_speed_xmii(struct net_device *dev,
mdelay(20);
} else {
/*true force*/
- if (speed == SPEED_10 || speed == SPEED_100 ||
- (speed == SPEED_1000 && duplex == DUPLEX_FULL &&
- tp->HwSuppGigaForceMode)) {
+ if (speed == SPEED_10 || speed == SPEED_100)
rtl8125_phy_setup_force_mode(dev, speed, duplex);
- } else
+ else
goto out;
}
@@ -3600,6 +4901,8 @@ rtl8125_set_speed_xmii(struct net_device *dev,
tp->duplex = duplex;
tp->advertising = adv;
+ rtl8125_set_d0_speedup_speed(tp);
+
rc = 0;
out:
return rc;
@@ -3610,11 +4913,13 @@ rtl8125_set_speed(struct net_device *dev,
u8 autoneg,
u32 speed,
u8 duplex,
- u32 adv)
+ u64 adv)
{
struct rtl8125_private *tp = netdev_priv(dev);
int ret;
+ if (tp->resume_not_chg_speed) return 0;
+
ret = tp->set_speed(dev, autoneg, speed, duplex, adv);
return ret;
@@ -3630,13 +4935,11 @@ rtl8125_set_settings(struct net_device *dev,
#endif
)
{
- struct rtl8125_private *tp = netdev_priv(dev);
int ret;
- unsigned long flags;
u8 autoneg;
u32 speed;
u8 duplex;
- u32 supported, advertising;
+ u64 supported = 0, advertising = 0;
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
autoneg = cmd->autoneg;
@@ -3645,21 +4948,34 @@ rtl8125_set_settings(struct net_device *dev,
supported = cmd->supported;
advertising = cmd->advertising;
#else
+ struct rtl8125_private *tp = netdev_priv(dev);
const struct ethtool_link_settings *base = &cmd->base;
autoneg = base->autoneg;
speed = base->speed;
duplex = base->duplex;
- ethtool_convert_link_mode_to_legacy_u32(&supported,
+ ethtool_convert_link_mode_to_legacy_u32((u32*)&supported,
cmd->link_modes.supported);
- ethtool_convert_link_mode_to_legacy_u32(&advertising,
+ ethtool_convert_link_mode_to_legacy_u32((u32*)&advertising,
cmd->link_modes.advertising);
+ if (test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+ cmd->link_modes.supported))
+ supported |= ADVERTISED_2500baseX_Full;
+ if (test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+ cmd->link_modes.advertising))
+ advertising |= ADVERTISED_2500baseX_Full;
+ if (HW_SUPP_PHY_LINK_SPEED_5000M(tp)) {
+ if (test_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
+ cmd->link_modes.supported))
+ supported |= RTK_ADVERTISED_5000baseX_Full;
+ if (test_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
+ cmd->link_modes.advertising))
+ advertising |= RTK_ADVERTISED_5000baseX_Full;
+ }
#endif
if (advertising & ~supported)
return -EINVAL;
- spin_lock_irqsave(&tp->lock, flags);
ret = rtl8125_set_speed(dev, autoneg, speed, duplex, advertising);
- spin_unlock_irqrestore(&tp->lock, flags);
return ret;
}
@@ -3670,15 +4986,12 @@ rtl8125_get_tx_csum(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
u32 ret;
- unsigned long flags;
- spin_lock_irqsave(&tp->lock, flags);
#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
ret = ((dev->features & NETIF_F_IP_CSUM) != 0);
#else
ret = ((dev->features & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)) != 0);
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
- spin_unlock_irqrestore(&tp->lock, flags);
return ret;
}
@@ -3688,11 +5001,8 @@ rtl8125_get_rx_csum(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
u32 ret;
- unsigned long flags;
- spin_lock_irqsave(&tp->lock, flags);
ret = tp->cp_cmd & RxChkSum;
- spin_unlock_irqrestore(&tp->lock, flags);
return ret;
}
@@ -3702,13 +5012,10 @@ rtl8125_set_tx_csum(struct net_device *dev,
u32 data)
{
struct rtl8125_private *tp = netdev_priv(dev);
- unsigned long flags;
if (tp->mcfg == CFG_METHOD_DEFAULT)
return -EOPNOTSUPP;
- spin_lock_irqsave(&tp->lock, flags);
-
#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
if (data)
dev->features |= NETIF_F_IP_CSUM;
@@ -3721,8 +5028,6 @@ rtl8125_set_tx_csum(struct net_device *dev,
dev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
- spin_unlock_irqrestore(&tp->lock, flags);
-
return 0;
}
@@ -3731,48 +5036,70 @@ rtl8125_set_rx_csum(struct net_device *dev,
u32 data)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
- unsigned long flags;
if (tp->mcfg == CFG_METHOD_DEFAULT)
return -EOPNOTSUPP;
- spin_lock_irqsave(&tp->lock, flags);
-
if (data)
tp->cp_cmd |= RxChkSum;
else
tp->cp_cmd &= ~RxChkSum;
- RTL_W16(CPlusCmd, tp->cp_cmd);
-
- spin_unlock_irqrestore(&tp->lock, flags);
+ RTL_W16(tp, CPlusCmd, tp->cp_cmd);
return 0;
}
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
+static u32
+rtl8125_rx_desc_opts1(struct rtl8125_private *tp,
+ struct RxDesc *desc)
+{
+ if (tp->InitRxDescType == RX_DESC_RING_TYPE_3)
+ return ((struct RxDescV3 *)desc)->RxDescNormalDDWord4.opts1;
+ else
+ return desc->opts1;
+}
+
+static u32
+rtl8125_rx_desc_opts2(struct rtl8125_private *tp,
+ struct RxDesc *desc)
+{
+ if (tp->InitRxDescType == RX_DESC_RING_TYPE_3)
+ return ((struct RxDescV3 *)desc)->RxDescNormalDDWord4.opts2;
+ else
+ return desc->opts2;
+}
+
#ifdef CONFIG_R8125_VLAN
+static void
+rtl8125_clear_rx_desc_opts2(struct rtl8125_private *tp,
+ struct RxDesc *desc)
+{
+ if (tp->InitRxDescType == RX_DESC_RING_TYPE_3)
+ ((struct RxDescV3 *)desc)->RxDescNormalDDWord4.opts2 = 0;
+ else
+ desc->opts2 = 0;
+}
+
static inline u32
rtl8125_tx_vlan_tag(struct rtl8125_private *tp,
struct sk_buff *skb)
{
- u32 tag;
-
#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
- tag = (tp->vlgrp && vlan_tx_tag_present(skb)) ?
- TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
+ return (tp->vlgrp && vlan_tx_tag_present(skb)) ?
+ TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
#elif LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0)
- tag = (vlan_tx_tag_present(skb)) ?
- TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
+ return (vlan_tx_tag_present(skb)) ?
+ TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
#else
- tag = (skb_vlan_tag_present(skb)) ?
- TxVlanTag | swab16(skb_vlan_tag_get(skb)) : 0x00;
+ return (skb_vlan_tag_present(skb)) ?
+ TxVlanTag | swab16(skb_vlan_tag_get(skb)) : 0x00;
#endif
- return tag;
+ return 0;
}
#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
@@ -3782,22 +5109,23 @@ rtl8125_vlan_rx_register(struct net_device *dev,
struct vlan_group *grp)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
- unsigned long flags;
- spin_lock_irqsave(&tp->lock, flags);
tp->vlgrp = grp;
if (tp->mcfg == CFG_METHOD_2 ||
- tp->mcfg == CFG_METHOD_3) {
+ tp->mcfg == CFG_METHOD_3 ||
+ tp->mcfg == CFG_METHOD_4 ||
+ tp->mcfg == CFG_METHOD_5 ||
+ tp->mcfg == CFG_METHOD_6 ||
+ tp->mcfg == CFG_METHOD_7 ||
+ tp->mcfg == CFG_METHOD_8) {
if (tp->vlgrp) {
- tp->rtl8125_rx_config |= (BIT_22 | BIT_23);
- RTL_W32(RxConfig, RTL_R32(RxConfig) | (BIT_22 | BIT_23))
+ tp->rtl8125_rx_config |= (EnableInnerVlan | EnableOuterVlan);
+ RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) | (EnableInnerVlan | EnableOuterVlan))
} else {
- tp->rtl8125_rx_config &= ~(BIT_22 | BIT_23);
- RTL_W32(RxConfig, RTL_R32(RxConfig) & ~(BIT_22 | BIT_23))
+ tp->rtl8125_rx_config &= ~(EnableInnerVlan | EnableOuterVlan);
+ RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) & ~(EnableInnerVlan | EnableOuterVlan))
}
}
- spin_unlock_irqrestore(&tp->lock, flags);
}
#endif
@@ -3808,16 +5136,13 @@ rtl8125_vlan_rx_kill_vid(struct net_device *dev,
unsigned short vid)
{
struct rtl8125_private *tp = netdev_priv(dev);
- unsigned long flags;
- spin_lock_irqsave(&tp->lock, flags);
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)
if (tp->vlgrp)
tp->vlgrp->vlan_devices[vid] = NULL;
#else
vlan_group_set_device(tp->vlgrp, vid, NULL);
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)
- spin_unlock_irqrestore(&tp->lock, flags);
}
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
@@ -3826,7 +5151,7 @@ rtl8125_rx_vlan_skb(struct rtl8125_private *tp,
struct RxDesc *desc,
struct sk_buff *skb)
{
- u32 opts2 = le32_to_cpu(desc->opts2);
+ u32 opts2 = le32_to_cpu(rtl8125_rx_desc_opts2(tp, desc));
int ret = -1;
#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
@@ -3843,7 +5168,7 @@ rtl8125_rx_vlan_skb(struct rtl8125_private *tp,
__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), swab16(opts2 & 0xffff));
#endif
- desc->opts2 = 0;
+ rtl8125_clear_rx_desc_opts2(tp, desc);
return ret;
}
@@ -3871,17 +5196,15 @@ rtl8125_rx_vlan_skb(struct rtl8125_private *tp,
static netdev_features_t rtl8125_fix_features(struct net_device *dev,
netdev_features_t features)
{
- struct rtl8125_private *tp = netdev_priv(dev);
- unsigned long flags;
-
- spin_lock_irqsave(&tp->lock, flags);
if (dev->mtu > MSS_MAX)
features &= ~NETIF_F_ALL_TSO;
if (dev->mtu > ETH_DATA_LEN) {
features &= ~NETIF_F_ALL_TSO;
features &= ~NETIF_F_ALL_CSUM;
}
- spin_unlock_irqrestore(&tp->lock, flags);
+#ifndef CONFIG_R8125_VLAN
+ features &= ~NETIF_F_ALL_CSUM;
+#endif
return features;
}
@@ -3890,29 +5213,34 @@ static int rtl8125_hw_set_features(struct net_device *dev,
netdev_features_t features)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
u32 rx_config;
- rx_config = RTL_R32(RxConfig);
- if (features & NETIF_F_RXALL)
+ rx_config = RTL_R32(tp, RxConfig);
+ if (features & NETIF_F_RXALL) {
+ tp->rtl8125_rx_config |= (AcceptErr | AcceptRunt);
rx_config |= (AcceptErr | AcceptRunt);
- else
+ } else {
+ tp->rtl8125_rx_config &= ~(AcceptErr | AcceptRunt);
rx_config &= ~(AcceptErr | AcceptRunt);
+ }
- if (dev->features & NETIF_F_HW_VLAN_RX)
- rx_config |= (BIT_22 | BIT_23);
- else
- rx_config &= ~(BIT_22 | BIT_23);
+ if (features & NETIF_F_HW_VLAN_RX) {
+ tp->rtl8125_rx_config |= (EnableInnerVlan | EnableOuterVlan);
+ rx_config |= (EnableInnerVlan | EnableOuterVlan);
+ } else {
+ tp->rtl8125_rx_config &= ~(EnableInnerVlan | EnableOuterVlan);
+ rx_config &= ~(EnableInnerVlan | EnableOuterVlan);
+ }
- RTL_W32(RxConfig, rx_config);
+ RTL_W32(tp, RxConfig, rx_config);
if (features & NETIF_F_RXCSUM)
tp->cp_cmd |= RxChkSum;
else
tp->cp_cmd &= ~RxChkSum;
- RTL_W16(CPlusCmd, tp->cp_cmd);
- RTL_R16(CPlusCmd);
+ RTL_W16(tp, CPlusCmd, tp->cp_cmd);
+ RTL_R16(tp, CPlusCmd);
return 0;
}
@@ -3920,15 +5248,9 @@ static int rtl8125_hw_set_features(struct net_device *dev,
static int rtl8125_set_features(struct net_device *dev,
netdev_features_t features)
{
- struct rtl8125_private *tp = netdev_priv(dev);
- unsigned long flags;
-
features &= NETIF_F_RXALL | NETIF_F_RXCSUM | NETIF_F_HW_VLAN_RX;
- spin_lock_irqsave(&tp->lock, flags);
- if (features ^ dev->features)
- rtl8125_hw_set_features(dev, features);
- spin_unlock_irqrestore(&tp->lock, flags);
+ rtl8125_hw_set_features(dev, features);
return 0;
}
@@ -3944,13 +5266,17 @@ static void rtl8125_gset_xmii(struct net_device *dev,
)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
+ u16 aner = tp->phy_reg_aner;
+ u16 anlpar = tp->phy_reg_anlpar;
+ u16 gbsr = tp->phy_reg_gbsr;
+ u16 status_2500 = tp->phy_reg_status_2500;
+ u32 lpa_adv = 0;
u16 status;
u8 autoneg, duplex;
u32 speed = 0;
u16 bmcr;
- u32 supported, advertising;
- unsigned long flags;
+ u64 supported, advertising;
+ u8 report_lpa = 0;
supported = SUPPORTED_10baseT_Half |
SUPPORTED_10baseT_Full |
@@ -3963,12 +5289,13 @@ static void rtl8125_gset_xmii(struct net_device *dev,
SUPPORTED_Pause |
SUPPORTED_Asym_Pause;
+ if (!HW_SUPP_PHY_LINK_SPEED_2500M(tp))
+ supported &= ~SUPPORTED_2500baseX_Full;
+
advertising = ADVERTISED_TP;
- spin_lock_irqsave(&tp->lock, flags);
rtl8125_mdio_write(tp, 0x1F, 0x0000);
bmcr = rtl8125_mdio_read(tp, MII_BMCR);
- spin_unlock_irqrestore(&tp->lock, flags);
if (bmcr & BMCR_ANENABLE) {
advertising |= ADVERTISED_Autoneg;
@@ -3984,24 +5311,17 @@ static void rtl8125_gset_xmii(struct net_device *dev,
advertising |= ADVERTISED_100baseT_Full;
if (tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL)
advertising |= ADVERTISED_1000baseT_Full;
- if (tp->phy_2500_ctrl_reg & RTK_ADVERTISE_2500FULL)
- advertising |= ADVERTISED_2500baseX_Full;
} else {
autoneg = AUTONEG_DISABLE;
}
- status = RTL_R16(PHYstatus);
+ status = RTL_R16(tp, PHYstatus);
+ if (netif_running(dev) && (status & LinkStatus))
+ report_lpa = 1;
- if (status & LinkStatus) {
+ if (report_lpa) {
/*link on*/
- if (status & _2500bpsF)
- speed = SPEED_2500;
- else if (status & _1000bpsF)
- speed = SPEED_1000;
- else if (status & _100bps)
- speed = SPEED_100;
- else if (status & _10bps)
- speed = SPEED_10;
+ speed = rtl8125_convert_link_speed(status);
if (status & TxFlowCtrl)
advertising |= ADVERTISED_Asym_Pause;
@@ -4009,26 +5329,87 @@ static void rtl8125_gset_xmii(struct net_device *dev,
if (status & RxFlowCtrl)
advertising |= ADVERTISED_Pause;
- duplex = ((status & (_1000bpsF | _2500bpsF)) || (status & FullDup)) ?
+ duplex = ((status & (_1000bpsF | _2500bpsF | _5000bpsF)) ||
+ (status & FullDup)) ?
DUPLEX_FULL : DUPLEX_HALF;
+
+ /*link partner*/
+ if (aner & EXPANSION_NWAY)
+ lpa_adv |= ADVERTISED_Autoneg;
+ if (anlpar & LPA_10HALF)
+ lpa_adv |= ADVERTISED_10baseT_Half;
+ if (anlpar & LPA_10FULL)
+ lpa_adv |= ADVERTISED_10baseT_Full;
+ if (anlpar & LPA_100HALF)
+ lpa_adv |= ADVERTISED_100baseT_Half;
+ if (anlpar & LPA_100FULL)
+ lpa_adv |= ADVERTISED_100baseT_Full;
+ if (anlpar & LPA_PAUSE_CAP)
+ lpa_adv |= ADVERTISED_Pause;
+ if (anlpar & LPA_PAUSE_ASYM)
+ lpa_adv |= ADVERTISED_Asym_Pause;
+ if (gbsr & LPA_1000HALF)
+ lpa_adv |= ADVERTISED_1000baseT_Half;
+ if (gbsr & LPA_1000FULL)
+ lpa_adv |= ADVERTISED_1000baseT_Full;
+ if (status_2500 & RTK_LPA_ADVERTISE_2500FULL)
+ lpa_adv |= ADVERTISED_2500baseX_Full;
} else {
/*link down*/
speed = SPEED_UNKNOWN;
duplex = DUPLEX_UNKNOWN;
+ lpa_adv = 0;
}
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
- cmd->supported = supported;
- cmd->advertising = advertising;
+ cmd->supported = (u32)supported;
+ cmd->advertising = (u32)advertising;
cmd->autoneg = autoneg;
cmd->speed = speed;
cmd->duplex = duplex;
cmd->port = PORT_TP;
+ cmd->lp_advertising = lpa_adv;
#else
ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
supported);
ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
advertising);
+ ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.lp_advertising,
+ lpa_adv);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,0,0)
+ if (supported & SUPPORTED_2500baseX_Full) {
+ linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT,
+ cmd->link_modes.supported, 0);
+ linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+ cmd->link_modes.supported, 1);
+ }
+ if (advertising & ADVERTISED_2500baseX_Full) {
+ linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT,
+ cmd->link_modes.advertising, 0);
+ linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+ cmd->link_modes.advertising, 1);
+ }
+ if (HW_SUPP_PHY_LINK_SPEED_5000M(tp)) {
+ linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
+ cmd->link_modes.supported, 1);
+ linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
+ cmd->link_modes.advertising, tp->phy_2500_ctrl_reg & RTK_ADVERTISE_5000FULL);
+ }
+ if (report_lpa) {
+ if (lpa_adv & ADVERTISED_2500baseX_Full) {
+ linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT,
+ cmd->link_modes.lp_advertising, 0);
+ linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+ cmd->link_modes.lp_advertising, 1);
+ }
+ if (status_2500 & RTK_LPA_ADVERTISE_5000FULL)
+ linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
+ cmd->link_modes.lp_advertising, 1);
+ if (status_2500 & RTK_LPA_ADVERTISE_10000FULL)
+ linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
+ cmd->link_modes.lp_advertising, 1);
+ }
+#endif
cmd->base.autoneg = autoneg;
cmd->base.speed = speed;
cmd->base.duplex = duplex;
@@ -4060,14 +5441,12 @@ static void rtl8125_get_regs(struct net_device *dev, struct ethtool_regs *regs,
void __iomem *ioaddr = tp->mmio_addr;
unsigned int i;
u8 *data = p;
- unsigned long flags;
if (regs->len < R8125_REGS_DUMP_SIZE)
return /* -EINVAL */;
memset(p, 0, regs->len);
- spin_lock_irqsave(&tp->lock, flags);
for (i = 0; i < R8125_MAC_REGS_SIZE; i++)
*data++ = readb(ioaddr + i);
data = (u8*)p + 256;
@@ -4080,7 +5459,7 @@ static void rtl8125_get_regs(struct net_device *dev, struct ethtool_regs *regs,
data = (u8*)p + 256 * 2;
for (i = 0; i < R8125_EPHY_REGS_SIZE/2; i++) {
- *(u16*)data = rtl8125_ephy_read(ioaddr, i);
+ *(u16*)data = rtl8125_ephy_read(tp, i);
data += 2;
}
data = (u8*)p + 256 * 3;
@@ -4088,14 +5467,55 @@ static void rtl8125_get_regs(struct net_device *dev, struct ethtool_regs *regs,
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
default:
for (i = 0; i < R8125_ERI_REGS_SIZE; i+=4) {
- *(u32*)data = rtl8125_eri_read(ioaddr, i , 4, ERIAR_ExGMAC);
+ *(u32*)data = rtl8125_eri_read(tp, i , 4, ERIAR_ExGMAC);
data += 4;
}
break;
}
- spin_unlock_irqrestore(&tp->lock, flags);
+}
+
+static void rtl8125_get_pauseparam(struct net_device *dev,
+ struct ethtool_pauseparam *pause)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+
+ pause->autoneg = (tp->autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
+ if (tp->fcpause == rtl8125_fc_rx_pause)
+ pause->rx_pause = 1;
+ else if (tp->fcpause == rtl8125_fc_tx_pause)
+ pause->tx_pause = 1;
+ else if (tp->fcpause == rtl8125_fc_full) {
+ pause->rx_pause = 1;
+ pause->tx_pause = 1;
+ }
+}
+
+static int rtl8125_set_pauseparam(struct net_device *dev,
+ struct ethtool_pauseparam *pause)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+ enum rtl8125_fc_mode newfc;
+
+ if (pause->tx_pause || pause->rx_pause)
+ newfc = rtl8125_fc_full;
+ else
+ newfc = rtl8125_fc_none;
+
+ if (tp->fcpause != newfc) {
+ tp->fcpause = newfc;
+
+ rtl8125_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
+ }
+
+ return 0;
+
}
static u32
@@ -4116,6 +5536,7 @@ rtl8125_set_msglevel(struct net_device *dev,
}
static const char rtl8125_gstrings[][ETH_GSTRING_LEN] = {
+ /* legacy */
"tx_packets",
"rx_packets",
"tx_errors",
@@ -4129,8 +5550,36 @@ static const char rtl8125_gstrings[][ETH_GSTRING_LEN] = {
"multicast",
"tx_aborted",
"tx_underrun",
+
+ /* extended */
+ "tx_octets",
+ "rx_octets",
+ "rx_multicast64",
+ "tx_unicast64",
+ "tx_broadcast64",
+ "tx_multicast64",
+ "tx_pause_on",
+ "tx_pause_off",
+ "tx_pause_all",
+ "tx_deferred",
+ "tx_late_collision",
+ "tx_all_collision",
+ "tx_aborted32",
+ "align_errors32",
+ "rx_frame_too_long",
+ "rx_runt",
+ "rx_pause_on",
+ "rx_pause_off",
+ "rx_pause_all",
+ "rx_unknown_opcode",
+ "rx_mac_error",
+ "tx_underrun32",
+ "rx_mac_missed",
+ "rx_tcam_dropped",
+ "tdu",
+ "rdu",
};
-#endif //#LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
@@ -4138,7 +5587,7 @@ static int rtl8125_get_stats_count(struct net_device *dev)
{
return ARRAY_SIZE(rtl8125_gstrings);
}
-#endif //#LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
#else
static int rtl8125_get_sset_count(struct net_device *dev, int sset)
{
@@ -4151,6 +5600,80 @@ static int rtl8125_get_sset_count(struct net_device *dev, int sset)
}
#endif
+static void
+rtl8125_set_ring_size(struct rtl8125_private *tp, u32 rx, u32 tx)
+{
+ int i;
+
+ for (i = 0; i < tp->num_rx_rings; i++)
+ tp->rx_ring[i].num_rx_desc = rx;
+
+ for (i = 0; i < tp->num_tx_rings; i++)
+ tp->tx_ring[i].num_tx_desc = tx;
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+static void rtl8125_get_ringparam(struct net_device *dev,
+ struct ethtool_ringparam *ring,
+ struct kernel_ethtool_ringparam *kernel_ring,
+ struct netlink_ext_ack *extack)
+#else
+static void rtl8125_get_ringparam(struct net_device *dev,
+ struct ethtool_ringparam *ring)
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+
+ ring->rx_max_pending = MAX_NUM_TX_DESC;
+ ring->tx_max_pending = MAX_NUM_RX_DESC;
+ ring->rx_pending = tp->rx_ring[0].num_rx_desc;
+ ring->tx_pending = tp->tx_ring[0].num_tx_desc;
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+static int rtl8125_set_ringparam(struct net_device *dev,
+ struct ethtool_ringparam *ring,
+ struct kernel_ethtool_ringparam *kernel_ring,
+ struct netlink_ext_ack *extack)
+#else
+static int rtl8125_set_ringparam(struct net_device *dev,
+ struct ethtool_ringparam *ring)
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+ u32 new_rx_count, new_tx_count;
+ int rc = 0;
+
+ if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
+ return -EINVAL;
+
+ new_tx_count = clamp_t(u32, ring->tx_pending,
+ MIN_NUM_TX_DESC, MAX_NUM_TX_DESC);
+
+ new_rx_count = clamp_t(u32, ring->rx_pending,
+ MIN_NUM_RX_DESC, MAX_NUM_RX_DESC);
+
+ if ((new_rx_count == tp->rx_ring[0].num_rx_desc) &&
+ (new_tx_count == tp->tx_ring[0].num_tx_desc)) {
+ /* nothing to do */
+ return 0;
+ }
+
+ if (netif_running(dev)) {
+ rtl8125_wait_for_quiescence(dev);
+ rtl8125_close(dev);
+ }
+
+ rtl8125_set_ring_size(tp, new_rx_count, new_tx_count);
+
+ if (netif_running(dev))
+ rc = rtl8125_open(dev);
+
+ return rc;
+}
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
static void
rtl8125_get_ethtool_stats(struct net_device *dev,
@@ -4158,12 +5681,8 @@ rtl8125_get_ethtool_stats(struct net_device *dev,
u64 *data)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
struct rtl8125_counters *counters;
dma_addr_t paddr;
- u32 cmd;
- u32 WaitCnt;
- unsigned long flags;
ASSERT_RTNL();
@@ -4172,21 +5691,7 @@ rtl8125_get_ethtool_stats(struct net_device *dev,
if (!counters)
return;
- spin_lock_irqsave(&tp->lock, flags);
- RTL_W32(CounterAddrHigh, (u64)paddr >> 32);
- cmd = (u64)paddr & DMA_BIT_MASK(32);
- RTL_W32(CounterAddrLow, cmd);
- RTL_W32(CounterAddrLow, cmd | CounterDump);
-
- WaitCnt = 0;
- while (RTL_R32(CounterAddrLow) & CounterDump) {
- udelay(10);
-
- WaitCnt++;
- if (WaitCnt > 20)
- break;
- }
- spin_unlock_irqrestore(&tp->lock, flags);
+ rtl8125_dump_tally_counter(tp, paddr);
data[0] = le64_to_cpu(counters->tx_packets);
data[1] = le64_to_cpu(counters->rx_packets);
@@ -4200,7 +5705,34 @@ rtl8125_get_ethtool_stats(struct net_device *dev,
data[9] = le64_to_cpu(counters->rx_broadcast);
data[10] = le32_to_cpu(counters->rx_multicast);
data[11] = le16_to_cpu(counters->tx_aborted);
- data[12] = le16_to_cpu(counters->tx_underun);
+ data[12] = le16_to_cpu(counters->tx_underrun);
+
+ data[13] = le64_to_cpu(counters->tx_octets);
+ data[14] = le64_to_cpu(counters->rx_octets);
+ data[15] = le64_to_cpu(counters->rx_multicast64);
+ data[16] = le64_to_cpu(counters->tx_unicast64);
+ data[17] = le64_to_cpu(counters->tx_broadcast64);
+ data[18] = le64_to_cpu(counters->tx_multicast64);
+ data[19] = le32_to_cpu(counters->tx_pause_on);
+ data[20] = le32_to_cpu(counters->tx_pause_off);
+ data[21] = le32_to_cpu(counters->tx_pause_all);
+ data[22] = le32_to_cpu(counters->tx_deferred);
+ data[23] = le32_to_cpu(counters->tx_late_collision);
+ data[24] = le32_to_cpu(counters->tx_all_collision);
+ data[25] = le32_to_cpu(counters->tx_aborted32);
+ data[26] = le32_to_cpu(counters->align_errors32);
+ data[27] = le32_to_cpu(counters->rx_frame_too_long);
+ data[28] = le32_to_cpu(counters->rx_runt);
+ data[29] = le32_to_cpu(counters->rx_pause_on);
+ data[30] = le32_to_cpu(counters->rx_pause_off);
+ data[31] = le32_to_cpu(counters->rx_pause_all);
+ data[32] = le32_to_cpu(counters->rx_unknown_opcode);
+ data[33] = le32_to_cpu(counters->rx_mac_error);
+ data[34] = le32_to_cpu(counters->tx_underrun32);
+ data[35] = le32_to_cpu(counters->rx_mac_missed);
+ data[36] = le32_to_cpu(counters->rx_tcam_dropped);
+ data[37] = le32_to_cpu(counters->tdu);
+ data[38] = le32_to_cpu(counters->rdu);
}
static void
@@ -4210,11 +5742,11 @@ rtl8125_get_strings(struct net_device *dev,
{
switch (stringset) {
case ETH_SS_STATS:
- memcpy(data, *rtl8125_gstrings, sizeof(rtl8125_gstrings));
+ memcpy(data, rtl8125_gstrings, sizeof(rtl8125_gstrings));
break;
}
}
-#endif //#LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
static int rtl_get_eeprom_len(struct net_device *dev)
{
@@ -4233,16 +5765,21 @@ static int rtl_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
u16 tmp;
if (tp->eeprom_type == EEPROM_TYPE_NONE) {
- dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Detect none EEPROM\n");
+ dev_printk(KERN_DEBUG, tp_to_dev(tp), "Detect none EEPROM\n");
return -EOPNOTSUPP;
} else if (eeprom->len == 0 || (eeprom->offset+eeprom->len) > tp->eeprom_len) {
- dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Invalid parameter\n");
+ dev_printk(KERN_DEBUG, tp_to_dev(tp), "Invalid parameter\n");
return -EINVAL;
}
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
default:
VPD_addr = 0xD2;
VPD_data = 0xD4;
@@ -4324,118 +5861,151 @@ static int _kc_ethtool_op_set_sg(struct net_device *dev, u32 data)
}
#endif
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)
-static int
-rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *eee)
+static int rtl8125_enable_eee(struct rtl8125_private *tp)
{
- struct rtl8125_private *tp = netdev_priv(net);
- void __iomem *ioaddr = tp->mmio_addr;
- u32 lp, adv, supported = 0;
- unsigned long flags;
- u16 val;
+ struct ethtool_eee *eee = &tp->eee;
+ u16 eee_adv_t = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
+ int ret;
+ ret = 0;
switch (tp->mcfg) {
- default:
- return -EOPNOTSUPP;
- }
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_6:
+ RTL_W16(tp, EEE_TXIDLE_TIMER_8125, eee->tx_lpi_timer);
- if (unlikely(tp->rtk_enable_diag))
- return -EBUSY;
+ SetMcuAccessRegBit(tp, 0xE040, (BIT_1|BIT_0));
+ SetMcuAccessRegBit(tp, 0xEB62, (BIT_2|BIT_1));
- spin_lock_irqsave(&tp->lock, flags);
+ SetEthPhyOcpBit(tp, 0xA432, BIT_4);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA5D0,
+ MDIO_EEE_100TX | MDIO_EEE_1000T,
+ eee_adv_t);
+ ClearEthPhyOcpBit(tp, 0xA6D4, BIT_0);
- rtl8125_mdio_write(tp, 0x1F, 0x0A5C);
- val = rtl8125_mdio_read(tp, 0x12);
- supported = mmd_eee_cap_to_ethtool_sup_t(val);
+ ClearEthPhyOcpBit(tp, 0xA6D8, BIT_4);
+ ClearEthPhyOcpBit(tp, 0xA428, BIT_7);
+ ClearEthPhyOcpBit(tp, 0xA4A2, BIT_9);
+ break;
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ RTL_W16(tp, EEE_TXIDLE_TIMER_8125, eee->tx_lpi_timer);
- rtl8125_mdio_write(tp, 0x1F, 0x0A5D);
- val = rtl8125_mdio_read(tp, 0x10);
- adv = mmd_eee_adv_to_ethtool_adv_t(val);
-
- val = rtl8125_mdio_read(tp, 0x11);
- lp = mmd_eee_adv_to_ethtool_adv_t(val);
-
- val = rtl8125_eri_read(ioaddr, 0x1B0, 2, ERIAR_ExGMAC);
- val &= BIT_1 | BIT_0;
+ SetMcuAccessRegBit(tp, 0xE040, (BIT_1|BIT_0));
- rtl8125_mdio_write(tp, 0x1F, 0x0000);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA5D0,
+ MDIO_EEE_100TX | MDIO_EEE_1000T,
+ eee_adv_t);
+ if (eee->advertised & SUPPORTED_2500baseX_Full)
+ SetEthPhyOcpBit(tp, 0xA6D4, BIT_0);
+ else
+ ClearEthPhyOcpBit(tp, 0xA6D4, BIT_0);
+ if (HW_SUPP_PHY_LINK_SPEED_5000M(tp))
+ ClearEthPhyOcpBit(tp, 0xA6D4, BIT_1);
- spin_unlock_irqrestore(&tp->lock, flags);
+ ClearEthPhyOcpBit(tp, 0xA6D8, BIT_4);
+ ClearEthPhyOcpBit(tp, 0xA428, BIT_7);
+ ClearEthPhyOcpBit(tp, 0xA4A2, BIT_9);
+ break;
+ default:
+// dev_printk(KERN_DEBUG, tp_to_dev(tp), "Not Support EEE\n");
+ ret = -EOPNOTSUPP;
+ break;
+ }
- eee->eee_enabled = !!val;
- eee->eee_active = !!(supported & adv & lp);
- eee->supported = supported;
- eee->advertised = adv;
- eee->lp_advertised = lp;
+ /*Advanced EEE*/
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ rtl8125_set_phy_mcu_patch_request(tp);
+ ClearMcuAccessRegBit(tp, 0xE052, BIT_0);
+ ClearEthPhyOcpBit(tp, 0xA442, BIT_12 | BIT_13);
+ ClearEthPhyOcpBit(tp, 0xA430, BIT_15);
+ rtl8125_clear_phy_mcu_patch_request(tp);
+ break;
+ }
- return 0;
+ return ret;
}
-static int
-rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *eee)
+static int rtl8125_disable_eee(struct rtl8125_private *tp)
{
- struct rtl8125_private *tp = netdev_priv(net);
- unsigned long flags;
- u32 data;
+ int ret;
+ ret = 0;
switch (tp->mcfg) {
- default:
- return -EOPNOTSUPP;
- }
-
- if (unlikely(tp->rtk_enable_diag))
- return -EBUSY;
-
- spin_lock_irqsave(&tp->lock, flags);
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_6:
+ ClearMcuAccessRegBit(tp, 0xE040, (BIT_1|BIT_0));
+ ClearMcuAccessRegBit(tp, 0xEB62, (BIT_2|BIT_1));
- if (eee->eee_enabled) {
- data = rtl8125_mac_ocp_read(tp, 0xE040);
- data &= ~(BIT_1 | BIT_0);
- rtl8125_mac_ocp_write(tp, 0xE040, data);
ClearEthPhyOcpBit(tp, 0xA432, BIT_4);
ClearEthPhyOcpBit(tp, 0xA5D0, (BIT_2 | BIT_1));
- ClearEthPhyOcpBit(tp, 0xA428, BIT_7);
ClearEthPhyOcpBit(tp, 0xA6D4, BIT_0);
ClearEthPhyOcpBit(tp, 0xA6D8, BIT_4);
ClearEthPhyOcpBit(tp, 0xA428, BIT_7);
ClearEthPhyOcpBit(tp, 0xA4A2, BIT_9);
- } else {
- data = rtl8125_mac_ocp_read(tp, 0xE040);
- data &= ~(BIT_1 | BIT_0);
- rtl8125_mac_ocp_write(tp, 0xE040, data);
- ClearEthPhyOcpBit(tp, 0xA432, BIT_4);
+ break;
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ ClearMcuAccessRegBit(tp, 0xE040, (BIT_1|BIT_0));
+
ClearEthPhyOcpBit(tp, 0xA5D0, (BIT_2 | BIT_1));
- ClearEthPhyOcpBit(tp, 0xA428, BIT_7);
ClearEthPhyOcpBit(tp, 0xA6D4, BIT_0);
+ if (HW_SUPP_PHY_LINK_SPEED_5000M(tp))
+ ClearEthPhyOcpBit(tp, 0xA6D4, BIT_1);
ClearEthPhyOcpBit(tp, 0xA6D8, BIT_4);
ClearEthPhyOcpBit(tp, 0xA428, BIT_7);
ClearEthPhyOcpBit(tp, 0xA4A2, BIT_9);
+ break;
+ default:
+// dev_printk(KERN_DEBUG, tp_to_dev(tp), "Not Support EEE\n");
+ ret = -EOPNOTSUPP;
+ break;
}
- rtl8125_mdio_write(tp, 0x1F, 0x0000);
- data = rtl8125_mdio_read(tp, MII_BMCR);
- data |= BMCR_RESET;
- rtl8125_mdio_write(tp, MII_BMCR, data);
-
- spin_unlock_irqrestore(&tp->lock, flags);
+ /*Advanced EEE*/
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ rtl8125_set_phy_mcu_patch_request(tp);
+ ClearMcuAccessRegBit(tp, 0xE052, BIT_0);
+ ClearEthPhyOcpBit(tp, 0xA442, BIT_12 | BIT_13);
+ ClearEthPhyOcpBit(tp, 0xA430, BIT_15);
+ rtl8125_clear_phy_mcu_patch_request(tp);
+ break;
+ }
- return 0;
+ return ret;
}
-#endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0) */
static int rtl_nway_reset(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- unsigned long flags;
int ret, bmcr;
if (unlikely(tp->rtk_enable_diag))
return -EBUSY;
- spin_lock_irqsave(&tp->lock, flags);
-
/* if autoneg is off, it's an error */
rtl8125_mdio_write(tp, 0x1F, 0x0000);
bmcr = rtl8125_mdio_read(tp, MII_BMCR);
@@ -4448,23 +6018,192 @@ static int rtl_nway_reset(struct net_device *dev)
ret = -EINVAL;
}
- spin_unlock_irqrestore(&tp->lock, flags);
-
return ret;
}
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)
+static u32
+rtl8125_tx_lpi_timer_to_us(struct rtl8125_private *tp , u32 tx_lpi_timer)
+{
+ u32 to_us;
+ u16 status;
+
+ to_us = tx_lpi_timer * 80;
+ status = RTL_R16(tp, PHYstatus);
+ if (status & LinkStatus) {
+ /*link on*/
+ if (HW_SUPP_PHY_LINK_SPEED_5000M(tp)) {
+ //5G : tx_lpi_timer * 12.8ns
+ //2.5G : tx_lpi_timer * 25.6ns
+ //Giga: tx_lpi_timer * 8ns
+ //100M : tx_lpi_timer * 80ns
+ if (status & (_5000bpsF))
+ to_us = (tx_lpi_timer * 128) / 10;
+ else if (status & _2500bpsF)
+ to_us = (tx_lpi_timer * 256) / 10;
+ else if (status & _1000bpsF)
+ to_us = tx_lpi_timer * 8;
+ } else {
+ //2.5G : tx_lpi_timer * 3.2ns
+ //Giga: tx_lpi_timer * 8ns
+ //100M : tx_lpi_timer * 80ns
+ if (status & _2500bpsF)
+ to_us = (tx_lpi_timer * 32) / 10;
+ else if (status & _1000bpsF)
+ to_us = tx_lpi_timer * 8;
+ }
+ }
+
+ //ns to us
+ to_us /= 1000;
+
+ return to_us;
+}
+
+static int
+rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
+{
+ struct rtl8125_private *tp = netdev_priv(net);
+ struct ethtool_eee *eee = &tp->eee;
+ u32 lp, adv, tx_lpi_timer, supported = 0;
+ u16 val;
+
+ if (unlikely(tp->rtk_enable_diag))
+ return -EBUSY;
+
+ /* Get Supported EEE */
+ //val = mdio_direct_read_phy_ocp(tp, 0xA5C4);
+ //supported = mmd_eee_cap_to_ethtool_sup_t(val);
+ supported = eee->supported;
+
+ /* Get advertisement EEE */
+ val = mdio_direct_read_phy_ocp(tp, 0xA5D0);
+ adv = mmd_eee_adv_to_ethtool_adv_t(val);
+ val = mdio_direct_read_phy_ocp(tp, 0xA6D4);
+ if (val & RTK_EEE_ADVERTISE_2500FULL)
+ adv |= ADVERTISED_2500baseX_Full;
+
+ /* Get LP advertisement EEE */
+ val = mdio_direct_read_phy_ocp(tp, 0xA5D2);
+ lp = mmd_eee_adv_to_ethtool_adv_t(val);
+ val = mdio_direct_read_phy_ocp(tp, 0xA6D0);
+ if (val & RTK_LPA_EEE_ADVERTISE_2500FULL)
+ lp |= ADVERTISED_2500baseX_Full;
+
+ /* Get EEE Tx LPI timer*/
+ tx_lpi_timer = RTL_R16(tp, EEE_TXIDLE_TIMER_8125);
+
+ val = rtl8125_mac_ocp_read(tp, 0xE040);
+ val &= BIT_1 | BIT_0;
+
+ edata->eee_enabled = !!val;
+ edata->eee_active = !!(supported & adv & lp);
+ edata->supported = supported;
+ edata->advertised = adv;
+ edata->lp_advertised = lp;
+ edata->tx_lpi_enabled = edata->eee_enabled;
+ edata->tx_lpi_timer = rtl8125_tx_lpi_timer_to_us(tp, tx_lpi_timer);
+
+ return 0;
+}
+
+static int
+rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
+{
+ struct rtl8125_private *tp = netdev_priv(net);
+ struct ethtool_eee *eee = &tp->eee;
+ u32 advertising;
+ int rc = 0;
+
+ if (!HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp) ||
+ tp->DASH)
+ return -EOPNOTSUPP;
+
+ if (unlikely(tp->rtk_enable_diag)) {
+ dev_printk(KERN_WARNING, tp_to_dev(tp), "Diag Enabled\n");
+ rc = -EBUSY;
+ goto out;
+ }
+
+ if (tp->autoneg != AUTONEG_ENABLE) {
+ dev_printk(KERN_WARNING, tp_to_dev(tp), "EEE requires autoneg\n");
+ rc = -EINVAL;
+ goto out;
+ }
+
+ if (edata->tx_lpi_enabled) {
+ if (edata->tx_lpi_timer > tp->max_jumbo_frame_size ||
+ edata->tx_lpi_timer < ETH_MIN_MTU) {
+ dev_printk(KERN_WARNING, tp_to_dev(tp), "Valid LPI timer range is %d to %d. \n",
+ ETH_MIN_MTU, tp->max_jumbo_frame_size);
+ rc = -EINVAL;
+ goto out;
+ }
+ }
+
+ advertising = tp->advertising;
+ if (!edata->advertised) {
+ edata->advertised = advertising & eee->supported;
+ } else if (edata->advertised & ~advertising) {
+ dev_printk(KERN_WARNING, tp_to_dev(tp), "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
+ edata->advertised, advertising);
+ rc = -EINVAL;
+ goto out;
+ }
+
+ if (edata->advertised & ~eee->supported) {
+ dev_printk(KERN_WARNING, tp_to_dev(tp), "EEE advertised %x must be a subset of support %x\n",
+ edata->advertised, eee->supported);
+ rc = -EINVAL;
+ goto out;
+ }
+
+ //tp->eee.eee_enabled = edata->eee_enabled;
+ //tp->eee_adv_t = ethtool_adv_to_mmd_eee_adv_t(edata->advertised);
+
+ dev_printk(KERN_WARNING, tp_to_dev(tp), "EEE tx_lpi_timer %x must be a subset of support %x\n",
+ edata->tx_lpi_timer, eee->tx_lpi_timer);
+
+ eee->advertised = edata->advertised;
+ eee->tx_lpi_enabled = edata->tx_lpi_enabled;
+ eee->tx_lpi_timer = edata->tx_lpi_timer;
+ eee->eee_enabled = edata->eee_enabled;
+
+ if (eee->eee_enabled)
+ rtl8125_enable_eee(tp);
+ else
+ rtl8125_disable_eee(tp);
+
+ rtl_nway_reset(net);
+
+ return rc;
+
+out:
+
+ return rc;
+}
+#endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0) */
+
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
static const struct ethtool_ops rtl8125_ethtool_ops = {
.get_drvinfo = rtl8125_get_drvinfo,
.get_regs_len = rtl8125_get_regs_len,
.get_link = ethtool_op_get_link,
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+ .get_ringparam = rtl8125_get_ringparam,
+ .set_ringparam = rtl8125_set_ringparam,
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
.get_settings = rtl8125_get_settings,
.set_settings = rtl8125_set_settings,
#else
.get_link_ksettings = rtl8125_get_settings,
.set_link_ksettings = rtl8125_set_settings,
-#endif
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+ .get_pauseparam = rtl8125_get_pauseparam,
+ .set_pauseparam = rtl8125_set_pauseparam,
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
.get_msglevel = rtl8125_get_msglevel,
.set_msglevel = rtl8125_set_msglevel,
#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
@@ -4477,8 +6216,8 @@ static const struct ethtool_ops rtl8125_ethtool_ops = {
#ifdef NETIF_F_TSO
.get_tso = ethtool_op_get_tso,
.set_tso = ethtool_op_set_tso,
-#endif
-#endif
+#endif //NETIF_F_TSO
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
.get_regs = rtl8125_get_regs,
.get_wol = rtl8125_get_wol,
.set_wol = rtl8125_set_wol,
@@ -4487,124 +6226,59 @@ static const struct ethtool_ops rtl8125_ethtool_ops = {
.get_stats_count = rtl8125_get_stats_count,
#else
.get_sset_count = rtl8125_get_sset_count,
-#endif
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
.get_ethtool_stats = rtl8125_get_ethtool_stats,
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
#ifdef ETHTOOL_GPERMADDR
.get_perm_addr = ethtool_op_get_perm_addr,
-#endif
+#endif //ETHTOOL_GPERMADDR
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
.get_eeprom = rtl_get_eeprom,
.get_eeprom_len = rtl_get_eeprom_len,
+#ifdef ENABLE_RSS_SUPPORT
+ .get_rxnfc = rtl8125_get_rxnfc,
+ .set_rxnfc = rtl8125_set_rxnfc,
+ .get_rxfh_indir_size = rtl8125_rss_indir_size,
+ .get_rxfh_key_size = rtl8125_get_rxfh_key_size,
+ .get_rxfh = rtl8125_get_rxfh,
+ .set_rxfh = rtl8125_set_rxfh,
+#endif //ENABLE_RSS_SUPPORT
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0)
+#ifdef ENABLE_PTP_SUPPORT
+ .get_ts_info = rtl8125_get_ts_info,
+#else
.get_ts_info = ethtool_op_get_ts_info,
+#endif //ENABLE_PTP_SUPPORT
#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0)
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)
.get_eee = rtl_ethtool_get_eee,
.set_eee = rtl_ethtool_set_eee,
#endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0) */
.nway_reset = rtl_nway_reset,
+
};
#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
-static int rtl8125_enable_eee(struct rtl8125_private *tp)
-{
- int ret;
-
- ret = 0;
- switch (tp->mcfg) {
- case CFG_METHOD_2:
- case CFG_METHOD_3:
- SetMcuAccessRegBit(tp, 0xE040, (BIT_1|BIT_0));
- SetMcuAccessRegBit(tp, 0xEB62, (BIT_2|BIT_1));
-
- SetEthPhyOcpBit(tp, 0xA432, BIT_4);
- SetEthPhyOcpBit(tp, 0xA5D0, (BIT_2 | BIT_1));
- ClearEthPhyOcpBit(tp, 0xA6D4, BIT_0);
-
- ClearEthPhyOcpBit(tp, 0xA6D8, BIT_4);
- SetEthPhyOcpBit(tp, 0xA4A2, BIT_9);
- SetEthPhyOcpBit(tp, 0xA428, BIT_7);
- break;
-
- default:
-// dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support EEE\n");
- ret = -EOPNOTSUPP;
- break;
- }
-
- /*Advanced EEE*/
- switch (tp->mcfg) {
- case CFG_METHOD_2:
- case CFG_METHOD_3:
- rtl8125_set_phy_mcu_patch_request(tp);
- SetMcuAccessRegBit(tp, 0xE052, BIT_0);
- ClearEthPhyOcpBit(tp, 0xA442, BIT_12 | BIT_13);
- ClearEthPhyOcpBit(tp, 0xA430, BIT_15);
- rtl8125_clear_phy_mcu_patch_request(tp);
- break;
- }
-
- return ret;
-}
-
-static int rtl8125_disable_eee(struct rtl8125_private *tp)
-{
- int ret;
-
- ret = 0;
- switch (tp->mcfg) {
- case CFG_METHOD_2:
- case CFG_METHOD_3:
- ClearMcuAccessRegBit(tp, 0xE040, (BIT_1|BIT_0));
- ClearMcuAccessRegBit(tp, 0xEB62, (BIT_2|BIT_1));
-
- ClearEthPhyOcpBit(tp, 0xA432, BIT_4);
- ClearEthPhyOcpBit(tp, 0xA5D0, (BIT_2 | BIT_1));
- ClearEthPhyOcpBit(tp, 0xA6D4, BIT_0);
-
- ClearEthPhyOcpBit(tp, 0xA6D8, BIT_4);
- ClearEthPhyOcpBit(tp, 0xA428, BIT_7);
- ClearEthPhyOcpBit(tp, 0xA4A2, BIT_9);
- break;
-
- default:
-// dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support EEE\n");
- ret = -EOPNOTSUPP;
- break;
- }
-
- /*Advanced EEE*/
- switch (tp->mcfg) {
- case CFG_METHOD_2:
- case CFG_METHOD_3:
- rtl8125_set_phy_mcu_patch_request(tp);
- ClearMcuAccessRegBit(tp, 0xE052, BIT_0);
- ClearEthPhyOcpBit(tp, 0xA442, BIT_12 | BIT_13);
- ClearEthPhyOcpBit(tp, 0xA430, BIT_15);
- rtl8125_clear_phy_mcu_patch_request(tp);
- break;
- }
-
- return ret;
-}
-
#if 0
static int rtl8125_enable_green_feature(struct rtl8125_private *tp)
{
u16 gphy_val;
- unsigned long flags;
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
mdio_direct_write_phy_ocp(tp, 0xA436, 0x8011);
SetEthPhyOcpBit(tp, 0xA438, BIT_15);
rtl8125_mdio_write(tp, 0x00, 0x9200);
break;
default:
- dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support Green Feature\n");
+ dev_printk(KERN_DEBUG, tp_to_dev(tp), "Not Support Green Feature\n");
break;
}
@@ -4614,17 +6288,21 @@ static int rtl8125_enable_green_feature(struct rtl8125_private *tp)
static int rtl8125_disable_green_feature(struct rtl8125_private *tp)
{
u16 gphy_val;
- unsigned long flags;
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
mdio_direct_write_phy_ocp(tp, 0xA436, 0x8011);
ClearEthPhyOcpBit(tp, 0xA438, BIT_15);
rtl8125_mdio_write(tp, 0x00, 0x9200);
break;
default:
- dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support Green Feature\n");
+ dev_printk(KERN_DEBUG, tp_to_dev(tp), "Not Support Green Feature\n");
break;
}
@@ -4633,12 +6311,13 @@ static int rtl8125_disable_green_feature(struct rtl8125_private *tp)
#endif
-static void rtl8125_get_mac_version(struct rtl8125_private *tp, void __iomem *ioaddr)
+static void rtl8125_get_mac_version(struct rtl8125_private *tp)
{
u32 reg,val32;
u32 ICVerID;
+ struct pci_dev *pdev = tp->pci_dev;
- val32 = RTL_R32(TxConfig);
+ val32 = RTL_R32(tp, TxConfig);
reg = val32 & 0x7c800000;
ICVerID = val32 & 0x00700000;
@@ -4653,6 +6332,23 @@ static void rtl8125_get_mac_version(struct rtl8125_private *tp, void __iomem *io
tp->HwIcVerUnknown = TRUE;
}
+ tp->efuse_ver = EFUSE_SUPPORT_V4;
+ break;
+ case 0x64000000:
+ if (ICVerID == 0x00000000) {
+ tp->mcfg = CFG_METHOD_4;
+ } else if (ICVerID == 0x100000) {
+ tp->mcfg = CFG_METHOD_5;
+ } else {
+ tp->mcfg = CFG_METHOD_5;
+ tp->HwIcVerUnknown = TRUE;
+ }
+
+ tp->efuse_ver = EFUSE_SUPPORT_V4;
+ break;
+ case 0x64800000:
+ tp->mcfg = CFG_METHOD_8;
+
tp->efuse_ver = EFUSE_SUPPORT_V4;
break;
default:
@@ -4662,6 +6358,13 @@ static void rtl8125_get_mac_version(struct rtl8125_private *tp, void __iomem *io
tp->efuse_ver = EFUSE_NOT_SUPPORT;
break;
}
+
+ if (pdev->subsystem_vendor == 0x8162) {
+ if (tp->mcfg == CFG_METHOD_3)
+ tp->mcfg = CFG_METHOD_6;
+ else if (tp->mcfg == CFG_METHOD_5)
+ tp->mcfg = CFG_METHOD_7;
+ }
}
static void
@@ -4682,25 +6385,21 @@ rtl8125_print_mac_version(struct rtl8125_private *tp)
static void
rtl8125_tally_counter_addr_fill(struct rtl8125_private *tp)
{
- void __iomem *ioaddr = tp->mmio_addr;
-
if (!tp->tally_paddr)
return;
- RTL_W32(CounterAddrHigh, (u64)tp->tally_paddr >> 32);
- RTL_W32(CounterAddrLow, (u64)tp->tally_paddr & (DMA_BIT_MASK(32)));
+ RTL_W32(tp, CounterAddrHigh, (u64)tp->tally_paddr >> 32);
+ RTL_W32(tp, CounterAddrLow, (u64)tp->tally_paddr & (DMA_BIT_MASK(32)));
}
static void
rtl8125_tally_counter_clear(struct rtl8125_private *tp)
{
- void __iomem *ioaddr = tp->mmio_addr;
-
if (!tp->tally_paddr)
return;
- RTL_W32(CounterAddrHigh, (u64)tp->tally_paddr >> 32);
- RTL_W32(CounterAddrLow, ((u64)tp->tally_paddr & (DMA_BIT_MASK(32))) | CounterReset);
+ RTL_W32(tp, CounterAddrHigh, (u64)tp->tally_paddr >> 32);
+ RTL_W32(tp, CounterAddrLow, ((u64)tp->tally_paddr & (DMA_BIT_MASK(32))) | CounterReset);
}
static void
@@ -4708,6 +6407,14 @@ rtl8125_clear_phy_ups_reg(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
+ switch (tp->mcfg) {
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ ClearEthPhyOcpBit(tp, 0xA466, BIT_0);
+ break;
+ };
ClearEthPhyOcpBit(tp, 0xA468, BIT_3 | BIT_1);
}
@@ -4717,7 +6424,12 @@ rtl8125_is_ups_resume(struct net_device *dev)
struct rtl8125_private *tp = netdev_priv(dev);
if (tp->mcfg == CFG_METHOD_2 ||
- tp->mcfg == CFG_METHOD_3)
+ tp->mcfg == CFG_METHOD_3 ||
+ tp->mcfg == CFG_METHOD_4 ||
+ tp->mcfg == CFG_METHOD_5 ||
+ tp->mcfg == CFG_METHOD_6 ||
+ tp->mcfg == CFG_METHOD_7 ||
+ tp->mcfg == CFG_METHOD_8)
return (rtl8125_mac_ocp_read(tp, 0xD42C) & BIT_8);
return 0;
@@ -4729,7 +6441,11 @@ rtl8125_clear_ups_resume_bit(struct net_device *dev)
struct rtl8125_private *tp = netdev_priv(dev);
if (tp->mcfg == CFG_METHOD_2 ||
- tp->mcfg == CFG_METHOD_3)
+ tp->mcfg == CFG_METHOD_3 ||
+ tp->mcfg == CFG_METHOD_4 ||
+ tp->mcfg == CFG_METHOD_5 ||
+ tp->mcfg == CFG_METHOD_6 ||
+ tp->mcfg == CFG_METHOD_7)
rtl8125_mac_ocp_write(tp, 0xD408, rtl8125_mac_ocp_read(tp, 0xD408) & ~(BIT_8));
}
@@ -4741,7 +6457,12 @@ rtl8125_wait_phy_ups_resume(struct net_device *dev, u16 PhyState)
int i=0;
if (tp->mcfg == CFG_METHOD_2 ||
- tp->mcfg == CFG_METHOD_3) {
+ tp->mcfg == CFG_METHOD_3 ||
+ tp->mcfg == CFG_METHOD_4 ||
+ tp->mcfg == CFG_METHOD_5 ||
+ tp->mcfg == CFG_METHOD_6 ||
+ tp->mcfg == CFG_METHOD_7 ||
+ tp->mcfg == CFG_METHOD_8) {
do {
TmpPhyState = mdio_direct_read_phy_ocp(tp, 0xA420);
TmpPhyState &= 0x7;
@@ -4758,20 +6479,16 @@ rtl8125_wait_phy_ups_resume(struct net_device *dev, u16 PhyState)
void
rtl8125_enable_now_is_oob(struct rtl8125_private *tp)
{
- void __iomem *ioaddr = tp->mmio_addr;
-
if ( tp->HwSuppNowIsOobVer == 1 ) {
- RTL_W8(MCUCmd_reg, RTL_R8(MCUCmd_reg) | Now_is_oob);
+ RTL_W8(tp, MCUCmd_reg, RTL_R8(tp, MCUCmd_reg) | Now_is_oob);
}
}
void
rtl8125_disable_now_is_oob(struct rtl8125_private *tp)
{
- void __iomem *ioaddr = tp->mmio_addr;
-
if ( tp->HwSuppNowIsOobVer == 1 ) {
- RTL_W8(MCUCmd_reg, RTL_R8(MCUCmd_reg) & ~Now_is_oob);
+ RTL_W8(tp, MCUCmd_reg, RTL_R8(tp, MCUCmd_reg) & ~Now_is_oob);
}
}
@@ -4779,31 +6496,45 @@ static void
rtl8125_exit_oob(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
u16 data16;
- RTL_W32(RxConfig, RTL_R32(RxConfig) & ~(AcceptErr | AcceptRunt | AcceptBroadcast | AcceptMulticast | AcceptMyPhys | AcceptAllPhys));
+ rtl8125_disable_rx_packet_filter(tp);
- switch (tp->mcfg) {
- case CFG_METHOD_2:
- case CFG_METHOD_3:
- rtl8125_dash2_disable_txrx(dev);
- break;
- }
-
- if (tp->DASH) {
- rtl8125_driver_stop(tp);
+ if (HW_DASH_SUPPORT_DASH(tp)) {
rtl8125_driver_start(tp);
+ rtl8125_dash2_disable_txrx(dev);
#ifdef ENABLE_DASH_SUPPORT
DashHwInit(dev);
#endif
}
+#ifdef ENABLE_REALWOW_SUPPORT
+ rtl8125_realwow_hw_init(dev);
+#else
+ //Disable realwow function
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ rtl8125_mac_ocp_write(tp, 0xC0BC, 0x00FF);
+ break;
+ }
+#endif //ENABLE_REALWOW_SUPPORT
+
rtl8125_nic_reset(dev);
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
rtl8125_disable_now_is_oob(tp);
data16 = rtl8125_mac_ocp_read(tp, 0xE8DE) & ~BIT_14;
@@ -4811,7 +6542,7 @@ rtl8125_exit_oob(struct net_device *dev)
rtl8125_wait_ll_share_fifo_ready(dev);
rtl8125_mac_ocp_write(tp, 0xC0AA, 0x07D0);
- rtl8125_mac_ocp_write(tp, 0xC0A6, 0x0150);
+ rtl8125_mac_ocp_write(tp, 0xC0A6, 0x01B5);
rtl8125_mac_ocp_write(tp, 0xC01E, 0x5555);
rtl8125_wait_ll_share_fifo_ready(dev);
@@ -4822,6 +6553,11 @@ rtl8125_exit_oob(struct net_device *dev)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
if (rtl8125_is_ups_resume(dev)) {
rtl8125_wait_phy_ups_resume(dev, 2);
rtl8125_clear_ups_resume_bit(dev);
@@ -4829,22 +6565,26 @@ rtl8125_exit_oob(struct net_device *dev)
}
break;
};
-
- tp->phy_reg_anlpar = 0;
}
void
rtl8125_hw_disable_mac_mcu_bps(struct net_device *dev)
{
+ u16 regAddr;
+
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
rtl8125_enable_cfg9346_write(tp);
- RTL_W8(Config5, RTL_R8(Config5) & ~BIT_0);
- RTL_W8(Config2, RTL_R8(Config2) & ~BIT_7);
+ RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0);
+ RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7);
rtl8125_disable_cfg9346_write(tp);
break;
}
@@ -4852,27 +6592,274 @@ rtl8125_hw_disable_mac_mcu_bps(struct net_device *dev)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- rtl8125_mac_ocp_write(tp, 0xFC38, 0x0000);
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ rtl8125_mac_ocp_write(tp, 0xFC48, 0x0000);
break;
}
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- rtl8125_mac_ocp_write(tp, 0xFC28, 0x0000);
- rtl8125_mac_ocp_write(tp, 0xFC2A, 0x0000);
- rtl8125_mac_ocp_write(tp, 0xFC2C, 0x0000);
- rtl8125_mac_ocp_write(tp, 0xFC2E, 0x0000);
- rtl8125_mac_ocp_write(tp, 0xFC30, 0x0000);
- rtl8125_mac_ocp_write(tp, 0xFC32, 0x0000);
- rtl8125_mac_ocp_write(tp, 0xFC34, 0x0000);
- rtl8125_mac_ocp_write(tp, 0xFC36, 0x0000);
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ for (regAddr = 0xFC28; regAddr < 0xFC48; regAddr += 2) {
+ rtl8125_mac_ocp_write(tp, regAddr, 0x0000);
+ }
+
mdelay(3);
+
rtl8125_mac_ocp_write(tp, 0xFC26, 0x0000);
break;
}
}
+#ifndef ENABLE_USE_FIRMWARE_FILE
+static void
+rtl8125_switch_mac_mcu_ram_code_page(struct rtl8125_private *tp, u16 page)
+{
+ u16 tmpUshort;
+
+ page &= (BIT_1 | BIT_0);
+ tmpUshort = rtl8125_mac_ocp_read(tp, 0xE446);
+ tmpUshort &= ~(BIT_1 | BIT_0);
+ tmpUshort |= page;
+ rtl8125_mac_ocp_write(tp, 0xE446, tmpUshort);
+}
+
+static void
+_rtl8125_write_mac_mcu_ram_code(struct rtl8125_private *tp, const u16 *entry, u16 entry_cnt)
+{
+ u16 i;
+
+ for (i = 0; i < entry_cnt; i++) {
+ rtl8125_mac_ocp_write(tp, 0xF800 + i * 2, entry[i]);
+ }
+}
+
+static void
+_rtl8125_write_mac_mcu_ram_code_with_page(struct rtl8125_private *tp, const u16 *entry, u16 entry_cnt, u16 page_size)
+{
+ u16 i;
+ u16 offset;
+
+ if (page_size == 0) return;
+
+ for (i = 0; i < entry_cnt; i++) {
+ offset = i % page_size;
+ if (offset == 0) {
+ u16 page = (i / page_size);
+ rtl8125_switch_mac_mcu_ram_code_page(tp, page);
+ }
+ rtl8125_mac_ocp_write(tp, 0xF800 + offset * 2, entry[i]);
+ }
+}
+
+static void
+rtl8125_write_mac_mcu_ram_code(struct rtl8125_private *tp, const u16 *entry, u16 entry_cnt)
+{
+ if (FALSE == HW_SUPPORT_MAC_MCU(tp)) return;
+ if (entry == NULL || entry_cnt == 0) return;
+
+ if (tp->MacMcuPageSize > 0)
+ _rtl8125_write_mac_mcu_ram_code_with_page(tp, entry, entry_cnt, tp->MacMcuPageSize);
+ else
+ _rtl8125_write_mac_mcu_ram_code(tp, entry, entry_cnt);
+}
+
+static void
+rtl8125_set_mac_mcu_8125a_1(struct net_device *dev)
+{
+ rtl8125_hw_disable_mac_mcu_bps(dev);
+}
+
+static void
+rtl8125_set_mac_mcu_8125a_2(struct net_device *dev)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+ static const u16 mcu_patch_code_8125a_2[] = {
+ 0xE010, 0xE012, 0xE022, 0xE024, 0xE029, 0xE02B, 0xE094, 0xE09D, 0xE09F,
+ 0xE0AA, 0xE0B5, 0xE0C6, 0xE0CC, 0xE0D1, 0xE0D6, 0xE0D8, 0xC602, 0xBE00,
+ 0x0000, 0xC60F, 0x73C4, 0x49B3, 0xF106, 0x73C2, 0xC608, 0xB406, 0xC609,
+ 0xFF80, 0xC605, 0xB406, 0xC605, 0xFF80, 0x0544, 0x0568, 0xE906, 0xCDE8,
+ 0xC602, 0xBE00, 0x0000, 0x48C1, 0x48C2, 0x9C46, 0xC402, 0xBC00, 0x0A12,
+ 0xC602, 0xBE00, 0x0EBA, 0x1501, 0xF02A, 0x1500, 0xF15D, 0xC661, 0x75C8,
+ 0x49D5, 0xF00A, 0x49D6, 0xF008, 0x49D7, 0xF006, 0x49D8, 0xF004, 0x75D2,
+ 0x49D9, 0xF150, 0xC553, 0x77A0, 0x75C8, 0x4855, 0x4856, 0x4857, 0x4858,
+ 0x48DA, 0x48DB, 0x49FE, 0xF002, 0x485A, 0x49FF, 0xF002, 0x485B, 0x9DC8,
+ 0x75D2, 0x4859, 0x9DD2, 0xC643, 0x75C0, 0x49D4, 0xF033, 0x49D0, 0xF137,
+ 0xE030, 0xC63A, 0x75C8, 0x49D5, 0xF00E, 0x49D6, 0xF00C, 0x49D7, 0xF00A,
+ 0x49D8, 0xF008, 0x75D2, 0x49D9, 0xF005, 0xC62E, 0x75C0, 0x49D7, 0xF125,
+ 0xC528, 0x77A0, 0xC627, 0x75C8, 0x4855, 0x4856, 0x4857, 0x4858, 0x48DA,
+ 0x48DB, 0x49FE, 0xF002, 0x485A, 0x49FF, 0xF002, 0x485B, 0x9DC8, 0x75D2,
+ 0x4859, 0x9DD2, 0xC616, 0x75C0, 0x4857, 0x9DC0, 0xC613, 0x75C0, 0x49DA,
+ 0xF003, 0x49D0, 0xF107, 0xC60B, 0xC50E, 0x48D9, 0x9DC0, 0x4859, 0x9DC0,
+ 0xC608, 0xC702, 0xBF00, 0x3AE0, 0xE860, 0xB400, 0xB5D4, 0xE908, 0xE86C,
+ 0x1200, 0xC409, 0x6780, 0x48F1, 0x8F80, 0xC404, 0xC602, 0xBE00, 0x10AA,
+ 0xC010, 0xEA7C, 0xC602, 0xBE00, 0x0000, 0x740A, 0x4846, 0x4847, 0x9C0A,
+ 0xC607, 0x74C0, 0x48C6, 0x9CC0, 0xC602, 0xBE00, 0x13FE, 0xE054, 0x72CA,
+ 0x4826, 0x4827, 0x9ACA, 0xC607, 0x72C0, 0x48A6, 0x9AC0, 0xC602, 0xBE00,
+ 0x07DC, 0xE054, 0xC60F, 0x74C4, 0x49CC, 0xF109, 0xC60C, 0x74CA, 0x48C7,
+ 0x9CCA, 0xC609, 0x74C0, 0x4846, 0x9CC0, 0xC602, 0xBE00, 0x2480, 0xE092,
+ 0xE0C0, 0xE054, 0x7420, 0x48C0, 0x9C20, 0x7444, 0xC602, 0xBE00, 0x12F8,
+ 0x1BFF, 0x46EB, 0x1BFF, 0xC102, 0xB900, 0x0D5A, 0x1BFF, 0x46EB, 0x1BFF,
+ 0xC102, 0xB900, 0x0E2A, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x6486,
+ 0x0B15, 0x090E, 0x1139
+ };
+
+ rtl8125_hw_disable_mac_mcu_bps(dev);
+
+ rtl8125_write_mac_mcu_ram_code(tp, mcu_patch_code_8125a_2, ARRAY_SIZE(mcu_patch_code_8125a_2));
+
+ rtl8125_mac_ocp_write(tp, 0xFC26, 0x8000);
+
+ rtl8125_mac_ocp_write(tp, 0xFC2A, 0x0540);
+ rtl8125_mac_ocp_write(tp, 0xFC2E, 0x0A06);
+ rtl8125_mac_ocp_write(tp, 0xFC30, 0x0EB8);
+ rtl8125_mac_ocp_write(tp, 0xFC32, 0x3A5C);
+ rtl8125_mac_ocp_write(tp, 0xFC34, 0x10A8);
+ rtl8125_mac_ocp_write(tp, 0xFC40, 0x0D54);
+ rtl8125_mac_ocp_write(tp, 0xFC42, 0x0E24);
+
+ rtl8125_mac_ocp_write(tp, 0xFC48, 0x307A);
+}
+
+static void
+rtl8125_set_mac_mcu_8125b_1(struct net_device *dev)
+{
+ rtl8125_hw_disable_mac_mcu_bps(dev);
+}
+
+static void
+rtl8125_set_mac_mcu_8125b_2(struct net_device *dev)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+ static const u16 mcu_patch_code_8125b_2[] = {
+ 0xE010, 0xE01B, 0xE026, 0xE037, 0xE03D, 0xE057, 0xE05B, 0xE060, 0xE062,
+ 0xE064, 0xE066, 0xE068, 0xE06A, 0xE06C, 0xE06E, 0xE070, 0x740A, 0x4846,
+ 0x4847, 0x9C0A, 0xC607, 0x74C0, 0x48C6, 0x9CC0, 0xC602, 0xBE00, 0x13F0,
+ 0xE054, 0x72CA, 0x4826, 0x4827, 0x9ACA, 0xC607, 0x72C0, 0x48A6, 0x9AC0,
+ 0xC602, 0xBE00, 0x081C, 0xE054, 0xC60F, 0x74C4, 0x49CC, 0xF109, 0xC60C,
+ 0x74CA, 0x48C7, 0x9CCA, 0xC609, 0x74C0, 0x4846, 0x9CC0, 0xC602, 0xBE00,
+ 0x2494, 0xE092, 0xE0C0, 0xE054, 0x7420, 0x48C0, 0x9C20, 0x7444, 0xC602,
+ 0xBE00, 0x12DC, 0x733A, 0x21B5, 0x25BC, 0x1304, 0xF111, 0x1B12, 0x1D2A,
+ 0x3168, 0x3ADA, 0x31AB, 0x1A00, 0x9AC0, 0x1300, 0xF1FB, 0x7620, 0x236E,
+ 0x276F, 0x1A3C, 0x22A1, 0x41B5, 0x9EE2, 0x76E4, 0x486F, 0x9EE4, 0xC602,
+ 0xBE00, 0x4A26, 0x733A, 0x49BB, 0xC602, 0xBE00, 0x47A2, 0x48C1, 0x48C2,
+ 0x9C46, 0xC402, 0xBC00, 0x0A52, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
+ 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
+ 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
+ 0x0000, 0xC602, 0xBE00, 0x0000
+ };
+
+ rtl8125_hw_disable_mac_mcu_bps(dev);
+
+ rtl8125_write_mac_mcu_ram_code(tp, mcu_patch_code_8125b_2, ARRAY_SIZE(mcu_patch_code_8125b_2));
+
+ rtl8125_mac_ocp_write(tp, 0xFC26, 0x8000);
+
+ rtl8125_mac_ocp_write(tp, 0xFC28, 0x13E6);
+ rtl8125_mac_ocp_write(tp, 0xFC2A, 0x0812);
+ rtl8125_mac_ocp_write(tp, 0xFC2C, 0x248C);
+ rtl8125_mac_ocp_write(tp, 0xFC2E, 0x12DA);
+ rtl8125_mac_ocp_write(tp, 0xFC30, 0x4A20);
+ rtl8125_mac_ocp_write(tp, 0xFC32, 0x47A0);
+ //rtl8125_mac_ocp_write(tp, 0xFC34, 0x0A46);
+
+ rtl8125_mac_ocp_write(tp, 0xFC48, 0x003F);
+}
+
+static void
+rtl8125_set_mac_mcu_8126a_1(struct net_device *dev)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+ static const u16 mcu_patch_code_8126a_1[] = {
+ 0xE010, 0xE019, 0xE01B, 0xE01D, 0xE01F, 0xE021, 0xE023, 0xE025, 0xE027,
+ 0xE029, 0xE02B, 0xE02D, 0xE02F, 0xE031, 0xE033, 0xE035, 0x48C0, 0x9C66,
+ 0x7446, 0x4840, 0x48C1, 0x48C2, 0x9C46, 0xC402, 0xBC00, 0x0AD6, 0xC602,
+ 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
+ 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
+ 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
+ 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
+ 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
+ };
+
+ rtl8125_hw_disable_mac_mcu_bps(dev);
+
+ rtl8125_write_mac_mcu_ram_code(tp, mcu_patch_code_8126a_1, ARRAY_SIZE(mcu_patch_code_8126a_1));
+
+ rtl8125_mac_ocp_write(tp, 0xFC26, 0x8000);
+
+ rtl8125_mac_ocp_write(tp, 0xFC28, 0x0AAA);
+
+ rtl8125_mac_ocp_write(tp, 0xFC48, 0x0001);
+}
+
static void
rtl8125_hw_mac_mcu_config(struct net_device *dev)
{
@@ -4882,27 +6869,76 @@ rtl8125_hw_mac_mcu_config(struct net_device *dev)
switch (tp->mcfg) {
case CFG_METHOD_2:
+ rtl8125_set_mac_mcu_8125a_1(dev);
+ break;
case CFG_METHOD_3:
- rtl8125_hw_disable_mac_mcu_bps(dev);
+ case CFG_METHOD_6:
+ rtl8125_set_mac_mcu_8125a_2(dev);
+ break;
+ case CFG_METHOD_4:
+ rtl8125_set_mac_mcu_8125b_1(dev);
+ break;
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
+ rtl8125_set_mac_mcu_8125b_2(dev);
+ break;
+ case CFG_METHOD_8:
+ rtl8125_set_mac_mcu_8126a_1(dev);
break;
}
}
+#endif
+
+#ifdef ENABLE_USE_FIRMWARE_FILE
+static void rtl8125_release_firmware(struct rtl8125_private *tp)
+{
+ if (tp->rtl_fw) {
+ rtl8125_fw_release_firmware(tp->rtl_fw);
+ kfree(tp->rtl_fw);
+ tp->rtl_fw = NULL;
+ }
+}
+
+void rtl8125_apply_firmware(struct rtl8125_private *tp)
+{
+ /* TODO: release firmware if rtl_fw_write_firmware signals failure. */
+ if (tp->rtl_fw) {
+ rtl8125_fw_write_firmware(tp, tp->rtl_fw);
+ /* At least one firmware doesn't reset tp->ocp_base. */
+ tp->ocp_base = OCP_STD_PHY_BASE;
+
+ /* PHY soft reset may still be in progress */
+ //phy_read_poll_timeout(tp->phydev, MII_BMCR, val,
+ // !(val & BMCR_RESET),
+ // 50000, 600000, true);
+ rtl8125_wait_phy_reset_complete(tp);
+
+ tp->hw_ram_code_ver = rtl8125_get_hw_phy_mcu_code_ver(tp);
+ tp->sw_ram_code_ver = tp->hw_ram_code_ver;
+ tp->HwHasWrRamCodeToMicroP = TRUE;
+ }
+}
+#endif
static void
rtl8125_hw_init(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
u32 csi_tmp;
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
rtl8125_enable_cfg9346_write(tp);
- RTL_W8(Config5, RTL_R8(Config5) & ~BIT_0);
- RTL_W8(Config2, RTL_R8(Config2) & ~BIT_7);
+ RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0);
+ RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7);
rtl8125_disable_cfg9346_write(tp);
- RTL_W8(0xF1, RTL_R8(0xF1) & ~BIT_7);
+ RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7);
break;
}
@@ -4910,14 +6946,28 @@ rtl8125_hw_init(struct net_device *dev)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
rtl8125_mac_ocp_write(tp, 0xD40A, rtl8125_mac_ocp_read( tp, 0xD40A) & ~(BIT_4));
break;
}
- rtl8125_hw_mac_mcu_config(dev);
+#ifndef ENABLE_USE_FIRMWARE_FILE
+ if (!tp->rtl_fw)
+ rtl8125_hw_mac_mcu_config(dev);
+#endif
/*disable ocp phy power saving*/
- if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3)
+ if (tp->mcfg == CFG_METHOD_2 ||
+ tp->mcfg == CFG_METHOD_3 ||
+ tp->mcfg == CFG_METHOD_4 ||
+ tp->mcfg == CFG_METHOD_5 ||
+ tp->mcfg == CFG_METHOD_6 ||
+ tp->mcfg == CFG_METHOD_7 ||
+ tp->mcfg == CFG_METHOD_8)
rtl8125_disable_ocp_phy_power_saving(dev);
//Set PCIE uncorrectable error status mask pcie 0x108
@@ -4925,80 +6975,173 @@ rtl8125_hw_init(struct net_device *dev)
csi_tmp |= BIT_20;
rtl8125_csi_write(tp, 0x108, csi_tmp);
+ rtl8125_enable_cfg9346_write(tp);
+ rtl8125_disable_linkchg_wakeup(dev);
+ rtl8125_disable_cfg9346_write(tp);
+ rtl8125_disable_magic_packet(dev);
+ rtl8125_disable_d0_speedup(tp);
+ rtl8125_set_pci_pme(tp, 0);
if (s0_magic_packet == 1)
rtl8125_enable_magic_packet(dev);
+
+#ifdef ENABLE_USE_FIRMWARE_FILE
+ if (tp->rtl_fw &&
+ !tp->resume_not_chg_speed &&
+ !(HW_DASH_SUPPORT_TYPE_3(tp) &&
+ tp->HwPkgDet == 0x06))
+ rtl8125_apply_firmware(tp);
+#endif
}
static void
rtl8125_hw_ephy_config(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
switch (tp->mcfg) {
case CFG_METHOD_2:
- rtl8125_ephy_write(ioaddr, 0x01, 0xA812);
- rtl8125_ephy_write(ioaddr, 0x09, 0x520C);
- rtl8125_ephy_write(ioaddr, 0x04, 0xD000);
- rtl8125_ephy_write(ioaddr, 0x0D, 0xF702);
- rtl8125_ephy_write(ioaddr, 0x0A, 0x8653);
- rtl8125_ephy_write(ioaddr, 0x06, 0x001E);
- rtl8125_ephy_write(ioaddr, 0x08, 0x3595);
- rtl8125_ephy_write(ioaddr, 0x20, 0x9455);
- rtl8125_ephy_write(ioaddr, 0x21, 0x99FF);
- rtl8125_ephy_write(ioaddr, 0x02, 0x6046);
- rtl8125_ephy_write(ioaddr, 0x29, 0xFE00);
- rtl8125_ephy_write(ioaddr, 0x23, 0xAB62);
-
- rtl8125_ephy_write(ioaddr, 0x41, 0xA80C);
- rtl8125_ephy_write(ioaddr, 0x49, 0x520C);
- rtl8125_ephy_write(ioaddr, 0x44, 0xD000);
- rtl8125_ephy_write(ioaddr, 0x4D, 0xF702);
- rtl8125_ephy_write(ioaddr, 0x4A, 0x8653);
- rtl8125_ephy_write(ioaddr, 0x46, 0x001E);
- rtl8125_ephy_write(ioaddr, 0x48, 0x3595);
- rtl8125_ephy_write(ioaddr, 0x60, 0x9455);
- rtl8125_ephy_write(ioaddr, 0x61, 0x99FF);
- rtl8125_ephy_write(ioaddr, 0x42, 0x6046);
- rtl8125_ephy_write(ioaddr, 0x69, 0xFE00);
- rtl8125_ephy_write(ioaddr, 0x63, 0xAB62);
+ rtl8125_ephy_write(tp, 0x01, 0xA812);
+ rtl8125_ephy_write(tp, 0x09, 0x520C);
+ rtl8125_ephy_write(tp, 0x04, 0xD000);
+ rtl8125_ephy_write(tp, 0x0D, 0xF702);
+ rtl8125_ephy_write(tp, 0x0A, 0x8653);
+ rtl8125_ephy_write(tp, 0x06, 0x001E);
+ rtl8125_ephy_write(tp, 0x08, 0x3595);
+ rtl8125_ephy_write(tp, 0x20, 0x9455);
+ rtl8125_ephy_write(tp, 0x21, 0x99FF);
+ rtl8125_ephy_write(tp, 0x02, 0x6046);
+ rtl8125_ephy_write(tp, 0x29, 0xFE00);
+ rtl8125_ephy_write(tp, 0x23, 0xAB62);
+
+ rtl8125_ephy_write(tp, 0x41, 0xA80C);
+ rtl8125_ephy_write(tp, 0x49, 0x520C);
+ rtl8125_ephy_write(tp, 0x44, 0xD000);
+ rtl8125_ephy_write(tp, 0x4D, 0xF702);
+ rtl8125_ephy_write(tp, 0x4A, 0x8653);
+ rtl8125_ephy_write(tp, 0x46, 0x001E);
+ rtl8125_ephy_write(tp, 0x48, 0x3595);
+ rtl8125_ephy_write(tp, 0x60, 0x9455);
+ rtl8125_ephy_write(tp, 0x61, 0x99FF);
+ rtl8125_ephy_write(tp, 0x42, 0x6046);
+ rtl8125_ephy_write(tp, 0x69, 0xFE00);
+ rtl8125_ephy_write(tp, 0x63, 0xAB62);
break;
case CFG_METHOD_3:
- rtl8125_ephy_write(ioaddr, 0x04, 0xD000);
- rtl8125_ephy_write(ioaddr, 0x0A, 0x8653);
- rtl8125_ephy_write(ioaddr, 0x23, 0xAB66);
- rtl8125_ephy_write(ioaddr, 0x20, 0x9455);
- rtl8125_ephy_write(ioaddr, 0x21, 0x99FF);
- rtl8125_ephy_write(ioaddr, 0x29, 0xFE04);
-
- rtl8125_ephy_write(ioaddr, 0x44, 0xD000);
- rtl8125_ephy_write(ioaddr, 0x4A, 0x8653);
- rtl8125_ephy_write(ioaddr, 0x63, 0xAB66);
- rtl8125_ephy_write(ioaddr, 0x60, 0x9455);
- rtl8125_ephy_write(ioaddr, 0x61, 0x99FF);
- rtl8125_ephy_write(ioaddr, 0x69, 0xFE04);
+ case CFG_METHOD_6:
+ rtl8125_ephy_write(tp, 0x04, 0xD000);
+ rtl8125_ephy_write(tp, 0x0A, 0x8653);
+ rtl8125_ephy_write(tp, 0x23, 0xAB66);
+ rtl8125_ephy_write(tp, 0x20, 0x9455);
+ rtl8125_ephy_write(tp, 0x21, 0x99FF);
+ rtl8125_ephy_write(tp, 0x29, 0xFE04);
+
+ rtl8125_ephy_write(tp, 0x44, 0xD000);
+ rtl8125_ephy_write(tp, 0x4A, 0x8653);
+ rtl8125_ephy_write(tp, 0x63, 0xAB66);
+ rtl8125_ephy_write(tp, 0x60, 0x9455);
+ rtl8125_ephy_write(tp, 0x61, 0x99FF);
+ rtl8125_ephy_write(tp, 0x69, 0xFE04);
+
+ ClearAndSetPCIePhyBit(tp,
+ 0x2A,
+ (BIT_14 | BIT_13 | BIT_12),
+ (BIT_13 | BIT_12)
+ );
+ ClearPCIePhyBit(tp, 0x19, BIT_6);
+ SetPCIePhyBit(tp, 0x1B, (BIT_11 | BIT_10 | BIT_9));
+ ClearPCIePhyBit(tp, 0x1B, (BIT_14 | BIT_13 | BIT_12));
+ rtl8125_ephy_write(tp, 0x02, 0x6042);
+ rtl8125_ephy_write(tp, 0x06, 0x0014);
+
+ ClearAndSetPCIePhyBit(tp,
+ 0x6A,
+ (BIT_14 | BIT_13 | BIT_12),
+ (BIT_13 | BIT_12)
+ );
+ ClearPCIePhyBit(tp, 0x59, BIT_6);
+ SetPCIePhyBit(tp, 0x5B, (BIT_11 | BIT_10 | BIT_9));
+ ClearPCIePhyBit(tp, 0x5B, (BIT_14 | BIT_13 | BIT_12));
+ rtl8125_ephy_write(tp, 0x42, 0x6042);
+ rtl8125_ephy_write(tp, 0x46, 0x0014);
+ break;
+ case CFG_METHOD_4:
+ rtl8125_ephy_write(tp, 0x06, 0x001F);
+ rtl8125_ephy_write(tp, 0x0A, 0xB66B);
+ rtl8125_ephy_write(tp, 0x01, 0xA852);
+ rtl8125_ephy_write(tp, 0x24, 0x0008);
+ rtl8125_ephy_write(tp, 0x2F, 0x6052);
+ rtl8125_ephy_write(tp, 0x0D, 0xF716);
+ rtl8125_ephy_write(tp, 0x20, 0xD477);
+ rtl8125_ephy_write(tp, 0x21, 0x4477);
+ rtl8125_ephy_write(tp, 0x22, 0x0013);
+ rtl8125_ephy_write(tp, 0x23, 0xBB66);
+ rtl8125_ephy_write(tp, 0x0B, 0xA909);
+ rtl8125_ephy_write(tp, 0x29, 0xFF04);
+ rtl8125_ephy_write(tp, 0x1B, 0x1EA0);
+
+ rtl8125_ephy_write(tp, 0x46, 0x001F);
+ rtl8125_ephy_write(tp, 0x4A, 0xB66B);
+ rtl8125_ephy_write(tp, 0x41, 0xA84A);
+ rtl8125_ephy_write(tp, 0x64, 0x000C);
+ rtl8125_ephy_write(tp, 0x6F, 0x604A);
+ rtl8125_ephy_write(tp, 0x4D, 0xF716);
+ rtl8125_ephy_write(tp, 0x60, 0xD477);
+ rtl8125_ephy_write(tp, 0x61, 0x4477);
+ rtl8125_ephy_write(tp, 0x62, 0x0013);
+ rtl8125_ephy_write(tp, 0x63, 0xBB66);
+ rtl8125_ephy_write(tp, 0x4B, 0xA909);
+ rtl8125_ephy_write(tp, 0x69, 0xFF04);
+ rtl8125_ephy_write(tp, 0x5B, 0x1EA0);
+ break;
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
+ rtl8125_ephy_write(tp, 0x0B, 0xA908);
+ rtl8125_ephy_write(tp, 0x1E, 0x20EB);
+ rtl8125_ephy_write(tp, 0x22, 0x0023);
+ rtl8125_ephy_write(tp, 0x02, 0x60C2);
+ rtl8125_ephy_write(tp, 0x29, 0xFF00);
+
+ rtl8125_ephy_write(tp, 0x4B, 0xA908);
+ rtl8125_ephy_write(tp, 0x5E, 0x28EB);
+ rtl8125_ephy_write(tp, 0x62, 0x0023);
+ rtl8125_ephy_write(tp, 0x42, 0x60C2);
+ rtl8125_ephy_write(tp, 0x69, 0xFF00);
+ break;
+ case CFG_METHOD_8:
break;
}
}
-static int
-rtl8125_check_hw_phy_mcu_code_ver(struct net_device *dev)
+static u16
+rtl8125_get_hw_phy_mcu_code_ver(struct rtl8125_private *tp)
{
- struct rtl8125_private *tp = netdev_priv(dev);
- int ram_code_ver_match = 0;
+ u16 hw_ram_code_ver = ~0;
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
mdio_direct_write_phy_ocp(tp, 0xA436, 0x801E);
- tp->hw_ram_code_ver = mdio_direct_read_phy_ocp(tp, 0xA438);
- break;
- default:
- tp->hw_ram_code_ver = ~0;
+ hw_ram_code_ver = mdio_direct_read_phy_ocp(tp, 0xA438);
break;
}
- if ( tp->hw_ram_code_ver == tp->sw_ram_code_ver) {
+ return hw_ram_code_ver;
+}
+
+static int
+rtl8125_check_hw_phy_mcu_code_ver(struct net_device *dev)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+ int ram_code_ver_match = 0;
+
+ tp->hw_ram_code_ver = rtl8125_get_hw_phy_mcu_code_ver(tp);
+
+ if (tp->hw_ram_code_ver == tp->sw_ram_code_ver) {
ram_code_ver_match = 1;
tp->HwHasWrRamCodeToMicroP = TRUE;
}
@@ -5006,6 +7149,55 @@ rtl8125_check_hw_phy_mcu_code_ver(struct net_device *dev)
return ram_code_ver_match;
}
+bool
+rtl8125_set_phy_mcu_patch_request(struct rtl8125_private *tp)
+{
+ u16 gphy_val;
+ u16 WaitCount;
+ bool bSuccess = TRUE;
+
+ SetEthPhyOcpBit(tp, 0xB820, BIT_4);
+
+ WaitCount = 0;
+ do {
+ gphy_val = mdio_direct_read_phy_ocp(tp, 0xB800);
+ udelay(100);
+ WaitCount++;
+ } while (!(gphy_val & BIT_6) && (WaitCount < 1000));
+
+ if (!(gphy_val & BIT_6) && (WaitCount == 1000)) bSuccess = FALSE;
+
+ if (!bSuccess)
+ dprintk("rtl8125_set_phy_mcu_patch_request fail.\n");
+
+ return bSuccess;
+}
+
+bool
+rtl8125_clear_phy_mcu_patch_request(struct rtl8125_private *tp)
+{
+ u16 gphy_val;
+ u16 WaitCount;
+ bool bSuccess = TRUE;
+
+ ClearEthPhyOcpBit(tp, 0xB820, BIT_4);
+
+ WaitCount = 0;
+ do {
+ gphy_val = mdio_direct_read_phy_ocp(tp, 0xB800);
+ udelay(100);
+ WaitCount++;
+ } while ((gphy_val & BIT_6) && (WaitCount < 1000));
+
+ if ((gphy_val & BIT_6) && (WaitCount == 1000)) bSuccess = FALSE;
+
+ if (!bSuccess)
+ dprintk("rtl8125_clear_phy_mcu_patch_request fail.\n");
+
+ return bSuccess;
+}
+
+#ifndef ENABLE_USE_FIRMWARE_FILE
static void
rtl8125_write_hw_phy_mcu_code_ver(struct net_device *dev)
{
@@ -5014,6 +7206,11 @@ rtl8125_write_hw_phy_mcu_code_ver(struct net_device *dev)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
mdio_direct_write_phy_ocp(tp, 0xA436, 0x801E);
mdio_direct_write_phy_ocp(tp, 0xA438, tp->sw_ram_code_ver);
tp->hw_ram_code_ver = tp->sw_ram_code_ver;
@@ -5031,8 +7228,16 @@ rtl8125_acquire_phy_mcu_patch_key_lock(struct rtl8125_private *tp)
PatchKey = 0x8600;
break;
case CFG_METHOD_3:
+ case CFG_METHOD_6:
PatchKey = 0x8601;
break;
+ case CFG_METHOD_4:
+ PatchKey = 0x3700;
+ break;
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
+ PatchKey = 0x3701;
+ break;
default:
return;
}
@@ -5048,6 +7253,10 @@ rtl8125_release_phy_mcu_patch_key_lock(struct rtl8125_private *tp)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
mdio_direct_write_phy_ocp(tp, 0xA436, 0x0000);
mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
ClearEthPhyOcpBit(tp, 0xB82E, BIT_0);
@@ -5059,56 +7268,96 @@ rtl8125_release_phy_mcu_patch_key_lock(struct rtl8125_private *tp)
}
}
-bool
-rtl8125_set_phy_mcu_patch_request(struct rtl8125_private *tp)
+static void
+rtl8125_set_phy_mcu_ram_code(struct net_device *dev, const u16 *ramcode, u16 codesize)
{
- u16 gphy_val;
- u16 WaitCount = 0;
- int i;
- bool bSuccess = TRUE;
+ struct rtl8125_private *tp = netdev_priv(dev);
+ u16 i;
+ u16 addr;
+ u16 val;
- SetEthPhyOcpBit(tp, 0xB820, BIT_4);
+ if (ramcode == NULL || codesize % 2) {
+ goto out;
+ }
- i = 0;
- do {
- gphy_val = mdio_direct_read_phy_ocp(tp, 0xB800);
- gphy_val &= BIT_6;
- udelay(50);
- udelay(50);
- i++;
- } while(gphy_val != BIT_6 && i < 1000);
+ for (i = 0; i < codesize; i += 2) {
+ addr = ramcode[i];
+ val = ramcode[i + 1];
+ if (addr == 0xFFFF && val == 0xFFFF) {
+ break;
+ }
+ mdio_direct_write_phy_ocp(tp, addr, val);
+ }
- if (gphy_val != BIT_6 && WaitCount == 1000) bSuccess = FALSE;
+out:
+ return;
+}
- return bSuccess;
+static void
+rtl8125_enable_phy_disable_mode(struct net_device *dev)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+
+ switch (tp->HwSuppCheckPhyDisableModeVer) {
+ case 3:
+ RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_5);
+ break;
+ }
+
+ dprintk("enable phy disable mode.\n");
}
-bool
-rtl8125_clear_phy_mcu_patch_request(struct rtl8125_private *tp)
+static void
+rtl8125_disable_phy_disable_mode(struct net_device *dev)
{
- u16 gphy_val;
- u16 WaitCount = 0;
- int i;
- bool bSuccess = TRUE;
+ struct rtl8125_private *tp = netdev_priv(dev);
- ClearEthPhyOcpBit(tp, 0xB820, BIT_4);
+ switch (tp->HwSuppCheckPhyDisableModeVer) {
+ case 3:
+ RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_5);
+ break;
+ }
- i = 0;
- do {
- gphy_val = mdio_direct_read_phy_ocp(tp, 0xB800);
- gphy_val &= BIT_6;
- udelay(50);
- udelay(50);
- i++;
- } while(gphy_val != BIT_6 && i < 1000);
+ mdelay(1);
- if (gphy_val != BIT_6 && WaitCount == 1000) bSuccess = FALSE;
+ dprintk("disable phy disable mode.\n");
+}
- return bSuccess;
+static void
+rtl8125_set_hw_phy_before_init_phy_mcu(struct net_device *dev)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+ u16 PhyRegValue;
+
+ switch (tp->mcfg) {
+ case CFG_METHOD_4:
+ mdio_direct_write_phy_ocp(tp, 0xBF86, 0x9000);
+
+ SetEthPhyOcpBit(tp, 0xC402, BIT_10);
+ ClearEthPhyOcpBit(tp, 0xC402, BIT_10);
+
+ PhyRegValue = mdio_direct_read_phy_ocp(tp, 0xBF86);
+ PhyRegValue &= (BIT_1 | BIT_0);
+ if (PhyRegValue != 0)
+ dprintk("PHY watch dog not clear, value = 0x%x \n", PhyRegValue);
+
+ mdio_direct_write_phy_ocp(tp, 0xBD86, 0x1010);
+ mdio_direct_write_phy_ocp(tp, 0xBD88, 0x1010);
+
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xBD4E,
+ BIT_11 | BIT_10,
+ BIT_11);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xBF46,
+ BIT_11 | BIT_10 | BIT_9 | BIT_8,
+ BIT_10 | BIT_9 | BIT_8);
+ break;
+ }
}
static void
-rtl8125_real_set_phy_mcu_8125_2(struct net_device *dev)
+rtl8125_real_set_phy_mcu_8125a_1(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
@@ -5941,19 +8190,19 @@ rtl8125_real_set_phy_mcu_8125_2(struct net_device *dev)
}
static void
-rtl8125_set_phy_mcu_8125_2(struct net_device *dev)
+rtl8125_set_phy_mcu_8125a_1(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
rtl8125_set_phy_mcu_patch_request(tp);
- rtl8125_real_set_phy_mcu_8125_2(dev);
+ rtl8125_real_set_phy_mcu_8125a_1(dev);
rtl8125_clear_phy_mcu_patch_request(tp);
}
static void
-rtl8125_real_set_phy_mcu_8125_3(struct net_device *dev)
+rtl8125_real_set_phy_mcu_8125a_2(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
@@ -5983,7 +8232,7 @@ rtl8125_real_set_phy_mcu_8125_3(struct net_device *dev)
mdio_direct_write_phy_ocp(tp, 0xA438, 0x1800);
mdio_direct_write_phy_ocp(tp, 0xA438, 0x80a1);
mdio_direct_write_phy_ocp(tp, 0xA438, 0x1800);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x80a4);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x80aa);
mdio_direct_write_phy_ocp(tp, 0xA438, 0xd718);
mdio_direct_write_phy_ocp(tp, 0xA438, 0x607b);
mdio_direct_write_phy_ocp(tp, 0xA438, 0x40da);
@@ -6129,15 +8378,21 @@ rtl8125_real_set_phy_mcu_8125_3(struct net_device *dev)
mdio_direct_write_phy_ocp(tp, 0xA438, 0xa301);
mdio_direct_write_phy_ocp(tp, 0xA438, 0x1800);
mdio_direct_write_phy_ocp(tp, 0xA438, 0x0648);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0xc306);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0xc520);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0xa201);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0xd701);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x252d);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x1646);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0xd708);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x4006);
mdio_direct_write_phy_ocp(tp, 0xA438, 0x1800);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x15f8);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x1646);
mdio_direct_write_phy_ocp(tp, 0xA438, 0x1800);
mdio_direct_write_phy_ocp(tp, 0xA438, 0x0308);
mdio_direct_write_phy_ocp(tp, 0xA436, 0xA026);
mdio_direct_write_phy_ocp(tp, 0xA438, 0x0307);
mdio_direct_write_phy_ocp(tp, 0xA436, 0xA024);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x15f7);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x1645);
mdio_direct_write_phy_ocp(tp, 0xA436, 0xA022);
mdio_direct_write_phy_ocp(tp, 0xA438, 0x0647);
mdio_direct_write_phy_ocp(tp, 0xA436, 0xA020);
@@ -6522,38 +8777,1558 @@ rtl8125_real_set_phy_mcu_8125_3(struct net_device *dev)
}
static void
-rtl8125_set_phy_mcu_8125_3(struct net_device *dev)
+rtl8125_set_phy_mcu_8125a_2(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
rtl8125_set_phy_mcu_patch_request(tp);
- rtl8125_real_set_phy_mcu_8125_3(dev);
+ rtl8125_real_set_phy_mcu_8125a_2(dev);
rtl8125_clear_phy_mcu_patch_request(tp);
}
+static const u16 phy_mcu_ram_code_8125b_1[] = {
+ 0xa436, 0x8024, 0xa438, 0x3700, 0xa436, 0xB82E, 0xa438, 0x0001,
+ 0xb820, 0x0090, 0xa436, 0xA016, 0xa438, 0x0000, 0xa436, 0xA012,
+ 0xa438, 0x0000, 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010,
+ 0xa438, 0x1800, 0xa438, 0x8025, 0xa438, 0x1800, 0xa438, 0x803a,
+ 0xa438, 0x1800, 0xa438, 0x8044, 0xa438, 0x1800, 0xa438, 0x8083,
+ 0xa438, 0x1800, 0xa438, 0x808d, 0xa438, 0x1800, 0xa438, 0x808d,
+ 0xa438, 0x1800, 0xa438, 0x808d, 0xa438, 0xd712, 0xa438, 0x4077,
+ 0xa438, 0xd71e, 0xa438, 0x4159, 0xa438, 0xd71e, 0xa438, 0x6099,
+ 0xa438, 0x7f44, 0xa438, 0x1800, 0xa438, 0x1a14, 0xa438, 0x9040,
+ 0xa438, 0x9201, 0xa438, 0x1800, 0xa438, 0x1b1a, 0xa438, 0xd71e,
+ 0xa438, 0x2425, 0xa438, 0x1a14, 0xa438, 0xd71f, 0xa438, 0x3ce5,
+ 0xa438, 0x1afb, 0xa438, 0x1800, 0xa438, 0x1b00, 0xa438, 0xd712,
+ 0xa438, 0x4077, 0xa438, 0xd71e, 0xa438, 0x4159, 0xa438, 0xd71e,
+ 0xa438, 0x60b9, 0xa438, 0x2421, 0xa438, 0x1c17, 0xa438, 0x1800,
+ 0xa438, 0x1a14, 0xa438, 0x9040, 0xa438, 0x1800, 0xa438, 0x1c2c,
+ 0xa438, 0xd71e, 0xa438, 0x2425, 0xa438, 0x1a14, 0xa438, 0xd71f,
+ 0xa438, 0x3ce5, 0xa438, 0x1c0f, 0xa438, 0x1800, 0xa438, 0x1c13,
+ 0xa438, 0xd702, 0xa438, 0xd501, 0xa438, 0x6072, 0xa438, 0x8401,
+ 0xa438, 0xf002, 0xa438, 0xa401, 0xa438, 0x1000, 0xa438, 0x146e,
+ 0xa438, 0x1800, 0xa438, 0x0b77, 0xa438, 0xd703, 0xa438, 0x665d,
+ 0xa438, 0x653e, 0xa438, 0x641f, 0xa438, 0xd700, 0xa438, 0x62c4,
+ 0xa438, 0x6185, 0xa438, 0x6066, 0xa438, 0x1800, 0xa438, 0x165a,
+ 0xa438, 0xc101, 0xa438, 0xcb00, 0xa438, 0x1000, 0xa438, 0x1945,
+ 0xa438, 0xd700, 0xa438, 0x7fa6, 0xa438, 0x1800, 0xa438, 0x807d,
+ 0xa438, 0xc102, 0xa438, 0xcb00, 0xa438, 0x1000, 0xa438, 0x1945,
+ 0xa438, 0xd700, 0xa438, 0x2569, 0xa438, 0x8058, 0xa438, 0x1800,
+ 0xa438, 0x807d, 0xa438, 0xc104, 0xa438, 0xcb00, 0xa438, 0x1000,
+ 0xa438, 0x1945, 0xa438, 0xd700, 0xa438, 0x7fa4, 0xa438, 0x1800,
+ 0xa438, 0x807d, 0xa438, 0xc120, 0xa438, 0xcb00, 0xa438, 0x1000,
+ 0xa438, 0x1945, 0xa438, 0xd703, 0xa438, 0x7fbf, 0xa438, 0x1800,
+ 0xa438, 0x807d, 0xa438, 0xc140, 0xa438, 0xcb00, 0xa438, 0x1000,
+ 0xa438, 0x1945, 0xa438, 0xd703, 0xa438, 0x7fbe, 0xa438, 0x1800,
+ 0xa438, 0x807d, 0xa438, 0xc180, 0xa438, 0xcb00, 0xa438, 0x1000,
+ 0xa438, 0x1945, 0xa438, 0xd703, 0xa438, 0x7fbd, 0xa438, 0xc100,
+ 0xa438, 0xcb00, 0xa438, 0xd708, 0xa438, 0x6018, 0xa438, 0x1800,
+ 0xa438, 0x165a, 0xa438, 0x1000, 0xa438, 0x14f6, 0xa438, 0xd014,
+ 0xa438, 0xd1e3, 0xa438, 0x1000, 0xa438, 0x1356, 0xa438, 0xd705,
+ 0xa438, 0x5fbe, 0xa438, 0x1800, 0xa438, 0x1559, 0xa436, 0xA026,
+ 0xa438, 0xffff, 0xa436, 0xA024, 0xa438, 0xffff, 0xa436, 0xA022,
+ 0xa438, 0xffff, 0xa436, 0xA020, 0xa438, 0x1557, 0xa436, 0xA006,
+ 0xa438, 0x1677, 0xa436, 0xA004, 0xa438, 0x0b75, 0xa436, 0xA002,
+ 0xa438, 0x1c17, 0xa436, 0xA000, 0xa438, 0x1b04, 0xa436, 0xA008,
+ 0xa438, 0x1f00, 0xa436, 0xA016, 0xa438, 0x0020, 0xa436, 0xA012,
+ 0xa438, 0x0000, 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010,
+ 0xa438, 0x1800, 0xa438, 0x817f, 0xa438, 0x1800, 0xa438, 0x82ab,
+ 0xa438, 0x1800, 0xa438, 0x83f8, 0xa438, 0x1800, 0xa438, 0x8444,
+ 0xa438, 0x1800, 0xa438, 0x8454, 0xa438, 0x1800, 0xa438, 0x8459,
+ 0xa438, 0x1800, 0xa438, 0x8465, 0xa438, 0xcb11, 0xa438, 0xa50c,
+ 0xa438, 0x8310, 0xa438, 0xd701, 0xa438, 0x4076, 0xa438, 0x0c03,
+ 0xa438, 0x0903, 0xa438, 0xd700, 0xa438, 0x6083, 0xa438, 0x0c1f,
+ 0xa438, 0x0d00, 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d00,
+ 0xa438, 0x1000, 0xa438, 0x0a7d, 0xa438, 0x1000, 0xa438, 0x0a4d,
+ 0xa438, 0xcb12, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f,
+ 0xa438, 0x5f84, 0xa438, 0xd102, 0xa438, 0xd040, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xd701,
+ 0xa438, 0x60f3, 0xa438, 0xd413, 0xa438, 0x1000, 0xa438, 0x0a37,
+ 0xa438, 0xd410, 0xa438, 0x1000, 0xa438, 0x0a37, 0xa438, 0xcb13,
+ 0xa438, 0xa108, 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8108,
+ 0xa438, 0xa00a, 0xa438, 0xa910, 0xa438, 0xa780, 0xa438, 0xd14a,
+ 0xa438, 0xd048, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd701,
+ 0xa438, 0x6255, 0xa438, 0xd700, 0xa438, 0x5f74, 0xa438, 0x6326,
+ 0xa438, 0xd702, 0xa438, 0x5f07, 0xa438, 0x800a, 0xa438, 0xa004,
+ 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8004, 0xa438, 0xa001,
+ 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8001, 0xa438, 0x0c03,
+ 0xa438, 0x0902, 0xa438, 0xffe2, 0xa438, 0x1000, 0xa438, 0x0a5e,
+ 0xa438, 0xd71f, 0xa438, 0x5fab, 0xa438, 0xba08, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x7f8b, 0xa438, 0x9a08,
+ 0xa438, 0x800a, 0xa438, 0xd702, 0xa438, 0x6535, 0xa438, 0xd40d,
+ 0xa438, 0x1000, 0xa438, 0x0a37, 0xa438, 0xcb14, 0xa438, 0xa004,
+ 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8004, 0xa438, 0xa001,
+ 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8001, 0xa438, 0xa00a,
+ 0xa438, 0xa780, 0xa438, 0xd14a, 0xa438, 0xd048, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0x6206,
+ 0xa438, 0xd702, 0xa438, 0x5f47, 0xa438, 0x800a, 0xa438, 0xa004,
+ 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8004, 0xa438, 0xa001,
+ 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8001, 0xa438, 0x0c03,
+ 0xa438, 0x0902, 0xa438, 0x1800, 0xa438, 0x8064, 0xa438, 0x800a,
+ 0xa438, 0xd40e, 0xa438, 0x1000, 0xa438, 0x0a37, 0xa438, 0xb920,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5fac,
+ 0xa438, 0x9920, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f,
+ 0xa438, 0x7f8c, 0xa438, 0xd701, 0xa438, 0x6073, 0xa438, 0xd701,
+ 0xa438, 0x4216, 0xa438, 0xa004, 0xa438, 0x1000, 0xa438, 0x0a42,
+ 0xa438, 0x8004, 0xa438, 0xa001, 0xa438, 0x1000, 0xa438, 0x0a42,
+ 0xa438, 0x8001, 0xa438, 0xd120, 0xa438, 0xd040, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0x8504,
+ 0xa438, 0xcb21, 0xa438, 0xa301, 0xa438, 0x1000, 0xa438, 0x0a5e,
+ 0xa438, 0xd700, 0xa438, 0x5f9f, 0xa438, 0x8301, 0xa438, 0xd704,
+ 0xa438, 0x40e0, 0xa438, 0xd196, 0xa438, 0xd04d, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xcb22,
+ 0xa438, 0x1000, 0xa438, 0x0a6d, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0xa640, 0xa438, 0x9503, 0xa438, 0x8910, 0xa438, 0x8720,
+ 0xa438, 0xd700, 0xa438, 0x6083, 0xa438, 0x0c1f, 0xa438, 0x0d01,
+ 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d01, 0xa438, 0x1000,
+ 0xa438, 0x0a7d, 0xa438, 0x0c1f, 0xa438, 0x0f14, 0xa438, 0xcb23,
+ 0xa438, 0x8fc0, 0xa438, 0x1000, 0xa438, 0x0a25, 0xa438, 0xaf40,
+ 0xa438, 0x1000, 0xa438, 0x0a25, 0xa438, 0x0cc0, 0xa438, 0x0f80,
+ 0xa438, 0x1000, 0xa438, 0x0a25, 0xa438, 0xafc0, 0xa438, 0x1000,
+ 0xa438, 0x0a25, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd701,
+ 0xa438, 0x5dee, 0xa438, 0xcb24, 0xa438, 0x8f1f, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd701, 0xa438, 0x7f6e, 0xa438, 0xa111,
+ 0xa438, 0xa215, 0xa438, 0xa401, 0xa438, 0x8404, 0xa438, 0xa720,
+ 0xa438, 0xcb25, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8640,
+ 0xa438, 0x9503, 0xa438, 0x1000, 0xa438, 0x0b43, 0xa438, 0x1000,
+ 0xa438, 0x0b86, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xb920,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5fac,
+ 0xa438, 0x9920, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f,
+ 0xa438, 0x7f8c, 0xa438, 0xcb26, 0xa438, 0x1000, 0xa438, 0x0a5e,
+ 0xa438, 0xd71f, 0xa438, 0x5f82, 0xa438, 0x8111, 0xa438, 0x8205,
+ 0xa438, 0x8404, 0xa438, 0xcb27, 0xa438, 0xd404, 0xa438, 0x1000,
+ 0xa438, 0x0a37, 0xa438, 0xd700, 0xa438, 0x6083, 0xa438, 0x0c1f,
+ 0xa438, 0x0d02, 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d02,
+ 0xa438, 0x1000, 0xa438, 0x0a7d, 0xa438, 0xa710, 0xa438, 0xa104,
+ 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8104, 0xa438, 0xa001,
+ 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8001, 0xa438, 0xa120,
+ 0xa438, 0xaa0f, 0xa438, 0x8110, 0xa438, 0xa284, 0xa438, 0xa404,
+ 0xa438, 0xa00a, 0xa438, 0xd193, 0xa438, 0xd046, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xcb28,
+ 0xa438, 0xa110, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700,
+ 0xa438, 0x5fa8, 0xa438, 0x8110, 0xa438, 0x8284, 0xa438, 0xa404,
+ 0xa438, 0x800a, 0xa438, 0x8710, 0xa438, 0xb804, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x7f82, 0xa438, 0x9804,
+ 0xa438, 0xcb29, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f,
+ 0xa438, 0x5f85, 0xa438, 0xa710, 0xa438, 0xb820, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x7f65, 0xa438, 0x9820,
+ 0xa438, 0xcb2a, 0xa438, 0xa190, 0xa438, 0xa284, 0xa438, 0xa404,
+ 0xa438, 0xa00a, 0xa438, 0xd13d, 0xa438, 0xd04a, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x3444, 0xa438, 0x8149,
+ 0xa438, 0xa220, 0xa438, 0xd1a0, 0xa438, 0xd040, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x3444, 0xa438, 0x8151,
+ 0xa438, 0xd702, 0xa438, 0x5f51, 0xa438, 0xcb2f, 0xa438, 0xa302,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd708, 0xa438, 0x5f63,
+ 0xa438, 0xd411, 0xa438, 0x1000, 0xa438, 0x0a37, 0xa438, 0x8302,
+ 0xa438, 0xd409, 0xa438, 0x1000, 0xa438, 0x0a37, 0xa438, 0xb920,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5fac,
+ 0xa438, 0x9920, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f,
+ 0xa438, 0x7f8c, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f,
+ 0xa438, 0x5fa3, 0xa438, 0x8190, 0xa438, 0x82a4, 0xa438, 0x8404,
+ 0xa438, 0x800a, 0xa438, 0xb808, 0xa438, 0x1000, 0xa438, 0x0a5e,
+ 0xa438, 0xd71f, 0xa438, 0x7fa3, 0xa438, 0x9808, 0xa438, 0x1800,
+ 0xa438, 0x0433, 0xa438, 0xcb15, 0xa438, 0xa508, 0xa438, 0xd700,
+ 0xa438, 0x6083, 0xa438, 0x0c1f, 0xa438, 0x0d01, 0xa438, 0xf003,
+ 0xa438, 0x0c1f, 0xa438, 0x0d01, 0xa438, 0x1000, 0xa438, 0x0a7d,
+ 0xa438, 0x1000, 0xa438, 0x0a4d, 0xa438, 0xa301, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5f9f, 0xa438, 0x8301,
+ 0xa438, 0xd704, 0xa438, 0x40e0, 0xa438, 0xd115, 0xa438, 0xd04f,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fb4,
+ 0xa438, 0xd413, 0xa438, 0x1000, 0xa438, 0x0a37, 0xa438, 0xcb16,
+ 0xa438, 0x1000, 0xa438, 0x0a6d, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0xa640, 0xa438, 0x9503, 0xa438, 0x8720, 0xa438, 0xd17a,
+ 0xa438, 0xd04c, 0xa438, 0x0c1f, 0xa438, 0x0f14, 0xa438, 0xcb17,
+ 0xa438, 0x8fc0, 0xa438, 0x1000, 0xa438, 0x0a25, 0xa438, 0xaf40,
+ 0xa438, 0x1000, 0xa438, 0x0a25, 0xa438, 0x0cc0, 0xa438, 0x0f80,
+ 0xa438, 0x1000, 0xa438, 0x0a25, 0xa438, 0xafc0, 0xa438, 0x1000,
+ 0xa438, 0x0a25, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd701,
+ 0xa438, 0x61ce, 0xa438, 0xd700, 0xa438, 0x5db4, 0xa438, 0xcb18,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8640, 0xa438, 0x9503,
+ 0xa438, 0xa720, 0xa438, 0x1000, 0xa438, 0x0b43, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xffd6, 0xa438, 0x8f1f, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd701, 0xa438, 0x7f8e, 0xa438, 0xa131,
+ 0xa438, 0xaa0f, 0xa438, 0xa2d5, 0xa438, 0xa407, 0xa438, 0xa720,
+ 0xa438, 0x8310, 0xa438, 0xa308, 0xa438, 0x8308, 0xa438, 0xcb19,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8640, 0xa438, 0x9503,
+ 0xa438, 0x1000, 0xa438, 0x0b43, 0xa438, 0x1000, 0xa438, 0x0b86,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xb920, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5fac, 0xa438, 0x9920,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x7f8c,
+ 0xa438, 0xcb1a, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f,
+ 0xa438, 0x5f82, 0xa438, 0x8111, 0xa438, 0x82c5, 0xa438, 0xa404,
+ 0xa438, 0x8402, 0xa438, 0xb804, 0xa438, 0x1000, 0xa438, 0x0a5e,
+ 0xa438, 0xd71f, 0xa438, 0x7f82, 0xa438, 0x9804, 0xa438, 0xcb1b,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5f85,
+ 0xa438, 0xa710, 0xa438, 0xb820, 0xa438, 0x1000, 0xa438, 0x0a5e,
+ 0xa438, 0xd71f, 0xa438, 0x7f65, 0xa438, 0x9820, 0xa438, 0xcb1c,
+ 0xa438, 0xd700, 0xa438, 0x6083, 0xa438, 0x0c1f, 0xa438, 0x0d02,
+ 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d02, 0xa438, 0x1000,
+ 0xa438, 0x0a7d, 0xa438, 0xa110, 0xa438, 0xa284, 0xa438, 0xa404,
+ 0xa438, 0x8402, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700,
+ 0xa438, 0x5fa8, 0xa438, 0xcb1d, 0xa438, 0xa180, 0xa438, 0xa402,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fa8,
+ 0xa438, 0xa220, 0xa438, 0xd1f5, 0xa438, 0xd049, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x3444, 0xa438, 0x8221,
+ 0xa438, 0xd702, 0xa438, 0x5f51, 0xa438, 0xb920, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5fac, 0xa438, 0x9920,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x7f8c,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5fa3,
+ 0xa438, 0xa504, 0xa438, 0xd700, 0xa438, 0x6083, 0xa438, 0x0c1f,
+ 0xa438, 0x0d00, 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d00,
+ 0xa438, 0x1000, 0xa438, 0x0a7d, 0xa438, 0xa00a, 0xa438, 0x8190,
+ 0xa438, 0x82a4, 0xa438, 0x8402, 0xa438, 0xa404, 0xa438, 0xb808,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x7fa3,
+ 0xa438, 0x9808, 0xa438, 0xcb2b, 0xa438, 0xcb2c, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5f84, 0xa438, 0xd14a,
+ 0xa438, 0xd048, 0xa438, 0xa780, 0xa438, 0xcb2d, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5f94, 0xa438, 0x6208,
+ 0xa438, 0xd702, 0xa438, 0x5f27, 0xa438, 0x800a, 0xa438, 0xa004,
+ 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8004, 0xa438, 0xa001,
+ 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8001, 0xa438, 0x0c03,
+ 0xa438, 0x0902, 0xa438, 0xa00a, 0xa438, 0xffe9, 0xa438, 0xcb2e,
+ 0xa438, 0xd700, 0xa438, 0x6083, 0xa438, 0x0c1f, 0xa438, 0x0d02,
+ 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d02, 0xa438, 0x1000,
+ 0xa438, 0x0a7d, 0xa438, 0xa190, 0xa438, 0xa284, 0xa438, 0xa406,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fa8,
+ 0xa438, 0xa220, 0xa438, 0xd1a0, 0xa438, 0xd040, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x3444, 0xa438, 0x827d,
+ 0xa438, 0xd702, 0xa438, 0x5f51, 0xa438, 0xcb2f, 0xa438, 0xa302,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd708, 0xa438, 0x5f63,
+ 0xa438, 0xd411, 0xa438, 0x1000, 0xa438, 0x0a37, 0xa438, 0x8302,
+ 0xa438, 0xd409, 0xa438, 0x1000, 0xa438, 0x0a37, 0xa438, 0xb920,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5fac,
+ 0xa438, 0x9920, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f,
+ 0xa438, 0x7f8c, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f,
+ 0xa438, 0x5fa3, 0xa438, 0x8190, 0xa438, 0x82a4, 0xa438, 0x8406,
+ 0xa438, 0x800a, 0xa438, 0xb808, 0xa438, 0x1000, 0xa438, 0x0a5e,
+ 0xa438, 0xd71f, 0xa438, 0x7fa3, 0xa438, 0x9808, 0xa438, 0x1800,
+ 0xa438, 0x0433, 0xa438, 0xcb30, 0xa438, 0x8380, 0xa438, 0xcb31,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5f86,
+ 0xa438, 0x9308, 0xa438, 0xb204, 0xa438, 0xb301, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd701, 0xa438, 0x5fa2, 0xa438, 0xb302,
+ 0xa438, 0x9204, 0xa438, 0xcb32, 0xa438, 0xd408, 0xa438, 0x1000,
+ 0xa438, 0x0a37, 0xa438, 0xd141, 0xa438, 0xd043, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xd704,
+ 0xa438, 0x4ccc, 0xa438, 0xd700, 0xa438, 0x4c81, 0xa438, 0xd702,
+ 0xa438, 0x609e, 0xa438, 0xd1e5, 0xa438, 0xd04d, 0xa438, 0xf003,
+ 0xa438, 0xd1e5, 0xa438, 0xd04d, 0xa438, 0x1000, 0xa438, 0x0a5e,
+ 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xd700, 0xa438, 0x6083,
+ 0xa438, 0x0c1f, 0xa438, 0x0d01, 0xa438, 0xf003, 0xa438, 0x0c1f,
+ 0xa438, 0x0d01, 0xa438, 0x1000, 0xa438, 0x0a7d, 0xa438, 0x8710,
+ 0xa438, 0xa108, 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8108,
+ 0xa438, 0xa203, 0xa438, 0x8120, 0xa438, 0x8a0f, 0xa438, 0xa111,
+ 0xa438, 0x8204, 0xa438, 0xa140, 0xa438, 0x1000, 0xa438, 0x0a42,
+ 0xa438, 0x8140, 0xa438, 0xd17a, 0xa438, 0xd04b, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xa204,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fa7,
+ 0xa438, 0xb920, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f,
+ 0xa438, 0x5fac, 0xa438, 0x9920, 0xa438, 0x1000, 0xa438, 0x0a5e,
+ 0xa438, 0xd71f, 0xa438, 0x7f8c, 0xa438, 0xd404, 0xa438, 0x1000,
+ 0xa438, 0x0a37, 0xa438, 0xd700, 0xa438, 0x6083, 0xa438, 0x0c1f,
+ 0xa438, 0x0d02, 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d02,
+ 0xa438, 0x1000, 0xa438, 0x0a7d, 0xa438, 0xa710, 0xa438, 0x8101,
+ 0xa438, 0x8201, 0xa438, 0xa104, 0xa438, 0x1000, 0xa438, 0x0a42,
+ 0xa438, 0x8104, 0xa438, 0xa120, 0xa438, 0xaa0f, 0xa438, 0x8110,
+ 0xa438, 0xa284, 0xa438, 0xa404, 0xa438, 0xa00a, 0xa438, 0xd193,
+ 0xa438, 0xd047, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700,
+ 0xa438, 0x5fb4, 0xa438, 0xa110, 0xa438, 0x1000, 0xa438, 0x0a5e,
+ 0xa438, 0xd700, 0xa438, 0x5fa8, 0xa438, 0xa180, 0xa438, 0xd13d,
+ 0xa438, 0xd04a, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700,
+ 0xa438, 0x5fb4, 0xa438, 0xf024, 0xa438, 0xa710, 0xa438, 0xa00a,
+ 0xa438, 0x8190, 0xa438, 0x8204, 0xa438, 0xa280, 0xa438, 0xa404,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fa7,
+ 0xa438, 0x8710, 0xa438, 0xb920, 0xa438, 0x1000, 0xa438, 0x0a5e,
+ 0xa438, 0xd71f, 0xa438, 0x5fac, 0xa438, 0x9920, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x7f8c, 0xa438, 0x800a,
+ 0xa438, 0x8190, 0xa438, 0x8284, 0xa438, 0x8406, 0xa438, 0xd700,
+ 0xa438, 0x4121, 0xa438, 0xd701, 0xa438, 0x60f3, 0xa438, 0xd1e5,
+ 0xa438, 0xd04d, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700,
+ 0xa438, 0x5fb4, 0xa438, 0x8710, 0xa438, 0xa00a, 0xa438, 0x8190,
+ 0xa438, 0x8204, 0xa438, 0xa280, 0xa438, 0xa404, 0xa438, 0xb920,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x5fac,
+ 0xa438, 0x9920, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f,
+ 0xa438, 0x7f8c, 0xa438, 0xcb33, 0xa438, 0x1000, 0xa438, 0x0a5e,
+ 0xa438, 0xd71f, 0xa438, 0x5f85, 0xa438, 0xa710, 0xa438, 0xb820,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd71f, 0xa438, 0x7f65,
+ 0xa438, 0x9820, 0xa438, 0xcb34, 0xa438, 0xa00a, 0xa438, 0xa190,
+ 0xa438, 0xa284, 0xa438, 0xa404, 0xa438, 0x1000, 0xa438, 0x0a5e,
+ 0xa438, 0xd700, 0xa438, 0x5fa9, 0xa438, 0xd701, 0xa438, 0x6853,
+ 0xa438, 0xd700, 0xa438, 0x6083, 0xa438, 0x0c1f, 0xa438, 0x0d00,
+ 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d00, 0xa438, 0x1000,
+ 0xa438, 0x0a7d, 0xa438, 0x8190, 0xa438, 0x8284, 0xa438, 0xcb35,
+ 0xa438, 0xd407, 0xa438, 0x1000, 0xa438, 0x0a37, 0xa438, 0x8110,
+ 0xa438, 0x8204, 0xa438, 0xa280, 0xa438, 0xa00a, 0xa438, 0xd704,
+ 0xa438, 0x4215, 0xa438, 0xa304, 0xa438, 0x1000, 0xa438, 0x0a5e,
+ 0xa438, 0xd700, 0xa438, 0x5fb8, 0xa438, 0xd1c3, 0xa438, 0xd043,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fb4,
+ 0xa438, 0x8304, 0xa438, 0xd700, 0xa438, 0x4109, 0xa438, 0xf01e,
+ 0xa438, 0xcb36, 0xa438, 0xd412, 0xa438, 0x1000, 0xa438, 0x0a37,
+ 0xa438, 0xd700, 0xa438, 0x6309, 0xa438, 0xd702, 0xa438, 0x42c7,
+ 0xa438, 0x800a, 0xa438, 0x8180, 0xa438, 0x8280, 0xa438, 0x8404,
+ 0xa438, 0xa004, 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8004,
+ 0xa438, 0xa001, 0xa438, 0x1000, 0xa438, 0x0a42, 0xa438, 0x8001,
+ 0xa438, 0x0c03, 0xa438, 0x0902, 0xa438, 0xa00a, 0xa438, 0xd14a,
+ 0xa438, 0xd048, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700,
+ 0xa438, 0x5fb4, 0xa438, 0xd700, 0xa438, 0x6083, 0xa438, 0x0c1f,
+ 0xa438, 0x0d02, 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d02,
+ 0xa438, 0x1000, 0xa438, 0x0a7d, 0xa438, 0xcc55, 0xa438, 0xcb37,
+ 0xa438, 0xa00a, 0xa438, 0xa190, 0xa438, 0xa2a4, 0xa438, 0xa404,
+ 0xa438, 0xd700, 0xa438, 0x6041, 0xa438, 0xa402, 0xa438, 0xd13d,
+ 0xa438, 0xd04a, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700,
+ 0xa438, 0x5fb4, 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700,
+ 0xa438, 0x5fa9, 0xa438, 0xd702, 0xa438, 0x5f71, 0xa438, 0xcb38,
+ 0xa438, 0x8224, 0xa438, 0xa288, 0xa438, 0x8180, 0xa438, 0xa110,
+ 0xa438, 0xa404, 0xa438, 0x800a, 0xa438, 0xd700, 0xa438, 0x6041,
+ 0xa438, 0x8402, 0xa438, 0xd415, 0xa438, 0x1000, 0xa438, 0x0a37,
+ 0xa438, 0xd13d, 0xa438, 0xd04a, 0xa438, 0x1000, 0xa438, 0x0a5e,
+ 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xcb39, 0xa438, 0xa00a,
+ 0xa438, 0xa190, 0xa438, 0xa2a0, 0xa438, 0xa404, 0xa438, 0xd700,
+ 0xa438, 0x6041, 0xa438, 0xa402, 0xa438, 0xd17a, 0xa438, 0xd047,
+ 0xa438, 0x1000, 0xa438, 0x0a5e, 0xa438, 0xd700, 0xa438, 0x5fb4,
+ 0xa438, 0x1800, 0xa438, 0x0560, 0xa438, 0xa111, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0xd3f5,
+ 0xa438, 0xd219, 0xa438, 0x1000, 0xa438, 0x0c31, 0xa438, 0xd708,
+ 0xa438, 0x5fa5, 0xa438, 0xa215, 0xa438, 0xd30e, 0xa438, 0xd21a,
+ 0xa438, 0x1000, 0xa438, 0x0c31, 0xa438, 0xd708, 0xa438, 0x63e9,
+ 0xa438, 0xd708, 0xa438, 0x5f65, 0xa438, 0xd708, 0xa438, 0x7f36,
+ 0xa438, 0xa004, 0xa438, 0x1000, 0xa438, 0x0c35, 0xa438, 0x8004,
+ 0xa438, 0xa001, 0xa438, 0x1000, 0xa438, 0x0c35, 0xa438, 0x8001,
+ 0xa438, 0xd708, 0xa438, 0x4098, 0xa438, 0xd102, 0xa438, 0x9401,
+ 0xa438, 0xf003, 0xa438, 0xd103, 0xa438, 0xb401, 0xa438, 0x1000,
+ 0xa438, 0x0c27, 0xa438, 0xa108, 0xa438, 0x1000, 0xa438, 0x0c35,
+ 0xa438, 0x8108, 0xa438, 0x8110, 0xa438, 0x8294, 0xa438, 0xa202,
+ 0xa438, 0x1800, 0xa438, 0x0bdb, 0xa438, 0xd39c, 0xa438, 0xd210,
+ 0xa438, 0x1000, 0xa438, 0x0c31, 0xa438, 0xd708, 0xa438, 0x5fa5,
+ 0xa438, 0xd39c, 0xa438, 0xd210, 0xa438, 0x1000, 0xa438, 0x0c31,
+ 0xa438, 0xd708, 0xa438, 0x5fa5, 0xa438, 0x1000, 0xa438, 0x0c31,
+ 0xa438, 0xd708, 0xa438, 0x29b5, 0xa438, 0x840e, 0xa438, 0xd708,
+ 0xa438, 0x5f4a, 0xa438, 0x0c1f, 0xa438, 0x1014, 0xa438, 0x1000,
+ 0xa438, 0x0c31, 0xa438, 0xd709, 0xa438, 0x7fa4, 0xa438, 0x901f,
+ 0xa438, 0x1800, 0xa438, 0x0c23, 0xa438, 0xcb43, 0xa438, 0xa508,
+ 0xa438, 0xd701, 0xa438, 0x3699, 0xa438, 0x844a, 0xa438, 0xa504,
+ 0xa438, 0xa190, 0xa438, 0xa2a0, 0xa438, 0xa404, 0xa438, 0xa00a,
+ 0xa438, 0xd700, 0xa438, 0x2109, 0xa438, 0x05ea, 0xa438, 0xa402,
+ 0xa438, 0x1800, 0xa438, 0x05ea, 0xa438, 0xcb90, 0xa438, 0x0cf0,
+ 0xa438, 0x0ca0, 0xa438, 0x1800, 0xa438, 0x06db, 0xa438, 0xd1ff,
+ 0xa438, 0xd052, 0xa438, 0xa508, 0xa438, 0x8718, 0xa438, 0xa00a,
+ 0xa438, 0xa190, 0xa438, 0xa2a0, 0xa438, 0xa404, 0xa438, 0x0cf0,
+ 0xa438, 0x0c50, 0xa438, 0x1800, 0xa438, 0x09ef, 0xa438, 0x1000,
+ 0xa438, 0x0a5e, 0xa438, 0xd704, 0xa438, 0x2e70, 0xa438, 0x06da,
+ 0xa438, 0xd700, 0xa438, 0x5f55, 0xa438, 0xa90c, 0xa438, 0x1800,
+ 0xa438, 0x0645, 0xa436, 0xA10E, 0xa438, 0x0644, 0xa436, 0xA10C,
+ 0xa438, 0x09e9, 0xa436, 0xA10A, 0xa438, 0x06da, 0xa436, 0xA108,
+ 0xa438, 0x05e1, 0xa436, 0xA106, 0xa438, 0x0be4, 0xa436, 0xA104,
+ 0xa438, 0x0435, 0xa436, 0xA102, 0xa438, 0x0141, 0xa436, 0xA100,
+ 0xa438, 0x026d, 0xa436, 0xA110, 0xa438, 0x00ff, 0xa436, 0xb87c,
+ 0xa438, 0x85fe, 0xa436, 0xb87e, 0xa438, 0xaf86, 0xa438, 0x16af,
+ 0xa438, 0x8699, 0xa438, 0xaf86, 0xa438, 0xe5af, 0xa438, 0x86f9,
+ 0xa438, 0xaf87, 0xa438, 0x7aaf, 0xa438, 0x883a, 0xa438, 0xaf88,
+ 0xa438, 0x58af, 0xa438, 0x8b6c, 0xa438, 0xd48b, 0xa438, 0x7c02,
+ 0xa438, 0x8644, 0xa438, 0x2c00, 0xa438, 0x503c, 0xa438, 0xffd6,
+ 0xa438, 0xac27, 0xa438, 0x18e1, 0xa438, 0x82fe, 0xa438, 0xad28,
+ 0xa438, 0x0cd4, 0xa438, 0x8b84, 0xa438, 0x0286, 0xa438, 0x442c,
+ 0xa438, 0x003c, 0xa438, 0xac27, 0xa438, 0x06ee, 0xa438, 0x8299,
+ 0xa438, 0x01ae, 0xa438, 0x04ee, 0xa438, 0x8299, 0xa438, 0x00af,
+ 0xa438, 0x23dc, 0xa438, 0xf9fa, 0xa438, 0xcefa, 0xa438, 0xfbef,
+ 0xa438, 0x79fb, 0xa438, 0xc4bf, 0xa438, 0x8b76, 0xa438, 0x026c,
+ 0xa438, 0x6dac, 0xa438, 0x2804, 0xa438, 0xd203, 0xa438, 0xae02,
+ 0xa438, 0xd201, 0xa438, 0xbdd8, 0xa438, 0x19d9, 0xa438, 0xef94,
+ 0xa438, 0x026c, 0xa438, 0x6d78, 0xa438, 0x03ef, 0xa438, 0x648a,
+ 0xa438, 0x0002, 0xa438, 0xbdd8, 0xa438, 0x19d9, 0xa438, 0xef94,
+ 0xa438, 0x026c, 0xa438, 0x6d78, 0xa438, 0x03ef, 0xa438, 0x7402,
+ 0xa438, 0x72cd, 0xa438, 0xac50, 0xa438, 0x02ef, 0xa438, 0x643a,
+ 0xa438, 0x019f, 0xa438, 0xe4ef, 0xa438, 0x4678, 0xa438, 0x03ac,
+ 0xa438, 0x2002, 0xa438, 0xae02, 0xa438, 0xd0ff, 0xa438, 0xffef,
+ 0xa438, 0x97ff, 0xa438, 0xfec6, 0xa438, 0xfefd, 0xa438, 0x041f,
+ 0xa438, 0x771f, 0xa438, 0x221c, 0xa438, 0x450d, 0xa438, 0x481f,
+ 0xa438, 0x00ac, 0xa438, 0x7f04, 0xa438, 0x1a94, 0xa438, 0xae08,
+ 0xa438, 0x1a94, 0xa438, 0xac7f, 0xa438, 0x03d7, 0xa438, 0x0100,
+ 0xa438, 0xef46, 0xa438, 0x0d48, 0xa438, 0x1f00, 0xa438, 0x1c45,
+ 0xa438, 0xef69, 0xa438, 0xef57, 0xa438, 0xef74, 0xa438, 0x0272,
+ 0xa438, 0xe8a7, 0xa438, 0xffff, 0xa438, 0x0d1a, 0xa438, 0x941b,
+ 0xa438, 0x979e, 0xa438, 0x072d, 0xa438, 0x0100, 0xa438, 0x1a64,
+ 0xa438, 0xef76, 0xa438, 0xef97, 0xa438, 0x0d98, 0xa438, 0xd400,
+ 0xa438, 0xff1d, 0xa438, 0x941a, 0xa438, 0x89cf, 0xa438, 0x1a75,
+ 0xa438, 0xaf74, 0xa438, 0xf9bf, 0xa438, 0x8b79, 0xa438, 0x026c,
+ 0xa438, 0x6da1, 0xa438, 0x0005, 0xa438, 0xe180, 0xa438, 0xa0ae,
+ 0xa438, 0x03e1, 0xa438, 0x80a1, 0xa438, 0xaf26, 0xa438, 0x9aac,
+ 0xa438, 0x284d, 0xa438, 0xe08f, 0xa438, 0xffef, 0xa438, 0x10c0,
+ 0xa438, 0xe08f, 0xa438, 0xfe10, 0xa438, 0x1b08, 0xa438, 0xa000,
+ 0xa438, 0x04c8, 0xa438, 0xaf40, 0xa438, 0x67c8, 0xa438, 0xbf8b,
+ 0xa438, 0x8c02, 0xa438, 0x6c4e, 0xa438, 0xc4bf, 0xa438, 0x8b8f,
+ 0xa438, 0x026c, 0xa438, 0x6def, 0xa438, 0x74e0, 0xa438, 0x830c,
+ 0xa438, 0xad20, 0xa438, 0x0302, 0xa438, 0x74ac, 0xa438, 0xccef,
+ 0xa438, 0x971b, 0xa438, 0x76ad, 0xa438, 0x5f02, 0xa438, 0xae13,
+ 0xa438, 0xef69, 0xa438, 0xef30, 0xa438, 0x1b32, 0xa438, 0xc4ef,
+ 0xa438, 0x46e4, 0xa438, 0x8ffb, 0xa438, 0xe58f, 0xa438, 0xfce7,
+ 0xa438, 0x8ffd, 0xa438, 0xcc10, 0xa438, 0x11ae, 0xa438, 0xb8d1,
+ 0xa438, 0x00a1, 0xa438, 0x1f03, 0xa438, 0xaf40, 0xa438, 0x4fbf,
+ 0xa438, 0x8b8c, 0xa438, 0x026c, 0xa438, 0x4ec4, 0xa438, 0xbf8b,
+ 0xa438, 0x8f02, 0xa438, 0x6c6d, 0xa438, 0xef74, 0xa438, 0xe083,
+ 0xa438, 0x0cad, 0xa438, 0x2003, 0xa438, 0x0274, 0xa438, 0xaccc,
+ 0xa438, 0xef97, 0xa438, 0x1b76, 0xa438, 0xad5f, 0xa438, 0x02ae,
+ 0xa438, 0x04ef, 0xa438, 0x69ef, 0xa438, 0x3111, 0xa438, 0xaed1,
+ 0xa438, 0x0287, 0xa438, 0x80af, 0xa438, 0x2293, 0xa438, 0xf8f9,
+ 0xa438, 0xfafb, 0xa438, 0xef59, 0xa438, 0xe080, 0xa438, 0x13ad,
+ 0xa438, 0x252f, 0xa438, 0xbf88, 0xa438, 0x2802, 0xa438, 0x6c6d,
+ 0xa438, 0xef64, 0xa438, 0x1f44, 0xa438, 0xe18f, 0xa438, 0xb91b,
+ 0xa438, 0x64ad, 0xa438, 0x4f1d, 0xa438, 0xd688, 0xa438, 0x2bd7,
+ 0xa438, 0x882e, 0xa438, 0x0274, 0xa438, 0x73ad, 0xa438, 0x5008,
+ 0xa438, 0xbf88, 0xa438, 0x3102, 0xa438, 0x737c, 0xa438, 0xae03,
+ 0xa438, 0x0287, 0xa438, 0xd0bf, 0xa438, 0x882b, 0xa438, 0x0273,
+ 0xa438, 0x73e0, 0xa438, 0x824c, 0xa438, 0xf621, 0xa438, 0xe482,
+ 0xa438, 0x4cbf, 0xa438, 0x8834, 0xa438, 0x0273, 0xa438, 0x7cef,
+ 0xa438, 0x95ff, 0xa438, 0xfefd, 0xa438, 0xfc04, 0xa438, 0xf8f9,
+ 0xa438, 0xfafb, 0xa438, 0xef79, 0xa438, 0xbf88, 0xa438, 0x1f02,
+ 0xa438, 0x737c, 0xa438, 0x1f22, 0xa438, 0xac32, 0xa438, 0x31ef,
+ 0xa438, 0x12bf, 0xa438, 0x8822, 0xa438, 0x026c, 0xa438, 0x4ed6,
+ 0xa438, 0x8fba, 0xa438, 0x1f33, 0xa438, 0xac3c, 0xa438, 0x1eef,
+ 0xa438, 0x13bf, 0xa438, 0x8837, 0xa438, 0x026c, 0xa438, 0x4eef,
+ 0xa438, 0x96d8, 0xa438, 0x19d9, 0xa438, 0xbf88, 0xa438, 0x2502,
+ 0xa438, 0x6c4e, 0xa438, 0xbf88, 0xa438, 0x2502, 0xa438, 0x6c4e,
+ 0xa438, 0x1616, 0xa438, 0x13ae, 0xa438, 0xdf12, 0xa438, 0xaecc,
+ 0xa438, 0xbf88, 0xa438, 0x1f02, 0xa438, 0x7373, 0xa438, 0xef97,
+ 0xa438, 0xfffe, 0xa438, 0xfdfc, 0xa438, 0x0466, 0xa438, 0xac88,
+ 0xa438, 0x54ac, 0xa438, 0x88f0, 0xa438, 0xac8a, 0xa438, 0x92ac,
+ 0xa438, 0xbadd, 0xa438, 0xac6c, 0xa438, 0xeeac, 0xa438, 0x6cff,
+ 0xa438, 0xad02, 0xa438, 0x99ac, 0xa438, 0x0030, 0xa438, 0xac88,
+ 0xa438, 0xd4c3, 0xa438, 0x5000, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x00b4, 0xa438, 0xecee,
+ 0xa438, 0x8298, 0xa438, 0x00af, 0xa438, 0x1412, 0xa438, 0xf8bf,
+ 0xa438, 0x8b5d, 0xa438, 0x026c, 0xa438, 0x6d58, 0xa438, 0x03e1,
+ 0xa438, 0x8fb8, 0xa438, 0x2901, 0xa438, 0xe58f, 0xa438, 0xb8a0,
+ 0xa438, 0x0049, 0xa438, 0xef47, 0xa438, 0xe483, 0xa438, 0x02e5,
+ 0xa438, 0x8303, 0xa438, 0xbfc2, 0xa438, 0x5f1a, 0xa438, 0x95f7,
+ 0xa438, 0x05ee, 0xa438, 0xffd2, 0xa438, 0x00d8, 0xa438, 0xf605,
+ 0xa438, 0x1f11, 0xa438, 0xef60, 0xa438, 0xbf8b, 0xa438, 0x3002,
+ 0xa438, 0x6c4e, 0xa438, 0xbf8b, 0xa438, 0x3302, 0xa438, 0x6c6d,
+ 0xa438, 0xf728, 0xa438, 0xbf8b, 0xa438, 0x3302, 0xa438, 0x6c4e,
+ 0xa438, 0xf628, 0xa438, 0xbf8b, 0xa438, 0x3302, 0xa438, 0x6c4e,
+ 0xa438, 0x0c64, 0xa438, 0xef46, 0xa438, 0xbf8b, 0xa438, 0x6002,
+ 0xa438, 0x6c4e, 0xa438, 0x0289, 0xa438, 0x9902, 0xa438, 0x3920,
+ 0xa438, 0xaf89, 0xa438, 0x96a0, 0xa438, 0x0149, 0xa438, 0xef47,
+ 0xa438, 0xe483, 0xa438, 0x04e5, 0xa438, 0x8305, 0xa438, 0xbfc2,
+ 0xa438, 0x5f1a, 0xa438, 0x95f7, 0xa438, 0x05ee, 0xa438, 0xffd2,
+ 0xa438, 0x00d8, 0xa438, 0xf605, 0xa438, 0x1f11, 0xa438, 0xef60,
+ 0xa438, 0xbf8b, 0xa438, 0x3002, 0xa438, 0x6c4e, 0xa438, 0xbf8b,
+ 0xa438, 0x3302, 0xa438, 0x6c6d, 0xa438, 0xf729, 0xa438, 0xbf8b,
+ 0xa438, 0x3302, 0xa438, 0x6c4e, 0xa438, 0xf629, 0xa438, 0xbf8b,
+ 0xa438, 0x3302, 0xa438, 0x6c4e, 0xa438, 0x0c64, 0xa438, 0xef46,
+ 0xa438, 0xbf8b, 0xa438, 0x6302, 0xa438, 0x6c4e, 0xa438, 0x0289,
+ 0xa438, 0x9902, 0xa438, 0x3920, 0xa438, 0xaf89, 0xa438, 0x96a0,
+ 0xa438, 0x0249, 0xa438, 0xef47, 0xa438, 0xe483, 0xa438, 0x06e5,
+ 0xa438, 0x8307, 0xa438, 0xbfc2, 0xa438, 0x5f1a, 0xa438, 0x95f7,
+ 0xa438, 0x05ee, 0xa438, 0xffd2, 0xa438, 0x00d8, 0xa438, 0xf605,
+ 0xa438, 0x1f11, 0xa438, 0xef60, 0xa438, 0xbf8b, 0xa438, 0x3002,
+ 0xa438, 0x6c4e, 0xa438, 0xbf8b, 0xa438, 0x3302, 0xa438, 0x6c6d,
+ 0xa438, 0xf72a, 0xa438, 0xbf8b, 0xa438, 0x3302, 0xa438, 0x6c4e,
+ 0xa438, 0xf62a, 0xa438, 0xbf8b, 0xa438, 0x3302, 0xa438, 0x6c4e,
+ 0xa438, 0x0c64, 0xa438, 0xef46, 0xa438, 0xbf8b, 0xa438, 0x6602,
+ 0xa438, 0x6c4e, 0xa438, 0x0289, 0xa438, 0x9902, 0xa438, 0x3920,
+ 0xa438, 0xaf89, 0xa438, 0x96ef, 0xa438, 0x47e4, 0xa438, 0x8308,
+ 0xa438, 0xe583, 0xa438, 0x09bf, 0xa438, 0xc25f, 0xa438, 0x1a95,
+ 0xa438, 0xf705, 0xa438, 0xeeff, 0xa438, 0xd200, 0xa438, 0xd8f6,
+ 0xa438, 0x051f, 0xa438, 0x11ef, 0xa438, 0x60bf, 0xa438, 0x8b30,
+ 0xa438, 0x026c, 0xa438, 0x4ebf, 0xa438, 0x8b33, 0xa438, 0x026c,
+ 0xa438, 0x6df7, 0xa438, 0x2bbf, 0xa438, 0x8b33, 0xa438, 0x026c,
+ 0xa438, 0x4ef6, 0xa438, 0x2bbf, 0xa438, 0x8b33, 0xa438, 0x026c,
+ 0xa438, 0x4e0c, 0xa438, 0x64ef, 0xa438, 0x46bf, 0xa438, 0x8b69,
+ 0xa438, 0x026c, 0xa438, 0x4e02, 0xa438, 0x8999, 0xa438, 0x0239,
+ 0xa438, 0x20af, 0xa438, 0x8996, 0xa438, 0xaf39, 0xa438, 0x1ef8,
+ 0xa438, 0xf9fa, 0xa438, 0xe08f, 0xa438, 0xb838, 0xa438, 0x02ad,
+ 0xa438, 0x2702, 0xa438, 0xae03, 0xa438, 0xaf8b, 0xa438, 0x201f,
+ 0xa438, 0x66ef, 0xa438, 0x65bf, 0xa438, 0xc21f, 0xa438, 0x1a96,
+ 0xa438, 0xf705, 0xa438, 0xeeff, 0xa438, 0xd200, 0xa438, 0xdaf6,
+ 0xa438, 0x05bf, 0xa438, 0xc22f, 0xa438, 0x1a96, 0xa438, 0xf705,
+ 0xa438, 0xeeff, 0xa438, 0xd200, 0xa438, 0xdbf6, 0xa438, 0x05ef,
+ 0xa438, 0x021f, 0xa438, 0x110d, 0xa438, 0x42bf, 0xa438, 0x8b3c,
+ 0xa438, 0x026c, 0xa438, 0x4eef, 0xa438, 0x021b, 0xa438, 0x031f,
+ 0xa438, 0x110d, 0xa438, 0x42bf, 0xa438, 0x8b36, 0xa438, 0x026c,
+ 0xa438, 0x4eef, 0xa438, 0x021a, 0xa438, 0x031f, 0xa438, 0x110d,
+ 0xa438, 0x42bf, 0xa438, 0x8b39, 0xa438, 0x026c, 0xa438, 0x4ebf,
+ 0xa438, 0xc23f, 0xa438, 0x1a96, 0xa438, 0xf705, 0xa438, 0xeeff,
+ 0xa438, 0xd200, 0xa438, 0xdaf6, 0xa438, 0x05bf, 0xa438, 0xc24f,
+ 0xa438, 0x1a96, 0xa438, 0xf705, 0xa438, 0xeeff, 0xa438, 0xd200,
+ 0xa438, 0xdbf6, 0xa438, 0x05ef, 0xa438, 0x021f, 0xa438, 0x110d,
+ 0xa438, 0x42bf, 0xa438, 0x8b45, 0xa438, 0x026c, 0xa438, 0x4eef,
+ 0xa438, 0x021b, 0xa438, 0x031f, 0xa438, 0x110d, 0xa438, 0x42bf,
+ 0xa438, 0x8b3f, 0xa438, 0x026c, 0xa438, 0x4eef, 0xa438, 0x021a,
+ 0xa438, 0x031f, 0xa438, 0x110d, 0xa438, 0x42bf, 0xa438, 0x8b42,
+ 0xa438, 0x026c, 0xa438, 0x4eef, 0xa438, 0x56d0, 0xa438, 0x201f,
+ 0xa438, 0x11bf, 0xa438, 0x8b4e, 0xa438, 0x026c, 0xa438, 0x4ebf,
+ 0xa438, 0x8b48, 0xa438, 0x026c, 0xa438, 0x4ebf, 0xa438, 0x8b4b,
+ 0xa438, 0x026c, 0xa438, 0x4ee1, 0xa438, 0x8578, 0xa438, 0xef03,
+ 0xa438, 0x480a, 0xa438, 0x2805, 0xa438, 0xef20, 0xa438, 0x1b01,
+ 0xa438, 0xad27, 0xa438, 0x3f1f, 0xa438, 0x44e0, 0xa438, 0x8560,
+ 0xa438, 0xe185, 0xa438, 0x61bf, 0xa438, 0x8b51, 0xa438, 0x026c,
+ 0xa438, 0x4ee0, 0xa438, 0x8566, 0xa438, 0xe185, 0xa438, 0x67bf,
+ 0xa438, 0x8b54, 0xa438, 0x026c, 0xa438, 0x4ee0, 0xa438, 0x856c,
+ 0xa438, 0xe185, 0xa438, 0x6dbf, 0xa438, 0x8b57, 0xa438, 0x026c,
+ 0xa438, 0x4ee0, 0xa438, 0x8572, 0xa438, 0xe185, 0xa438, 0x73bf,
+ 0xa438, 0x8b5a, 0xa438, 0x026c, 0xa438, 0x4ee1, 0xa438, 0x8fb8,
+ 0xa438, 0x5900, 0xa438, 0xf728, 0xa438, 0xe58f, 0xa438, 0xb8af,
+ 0xa438, 0x8b2c, 0xa438, 0xe185, 0xa438, 0x791b, 0xa438, 0x21ad,
+ 0xa438, 0x373e, 0xa438, 0x1f44, 0xa438, 0xe085, 0xa438, 0x62e1,
+ 0xa438, 0x8563, 0xa438, 0xbf8b, 0xa438, 0x5102, 0xa438, 0x6c4e,
+ 0xa438, 0xe085, 0xa438, 0x68e1, 0xa438, 0x8569, 0xa438, 0xbf8b,
+ 0xa438, 0x5402, 0xa438, 0x6c4e, 0xa438, 0xe085, 0xa438, 0x6ee1,
+ 0xa438, 0x856f, 0xa438, 0xbf8b, 0xa438, 0x5702, 0xa438, 0x6c4e,
+ 0xa438, 0xe085, 0xa438, 0x74e1, 0xa438, 0x8575, 0xa438, 0xbf8b,
+ 0xa438, 0x5a02, 0xa438, 0x6c4e, 0xa438, 0xe18f, 0xa438, 0xb859,
+ 0xa438, 0x00f7, 0xa438, 0x28e5, 0xa438, 0x8fb8, 0xa438, 0xae4a,
+ 0xa438, 0x1f44, 0xa438, 0xe085, 0xa438, 0x64e1, 0xa438, 0x8565,
+ 0xa438, 0xbf8b, 0xa438, 0x5102, 0xa438, 0x6c4e, 0xa438, 0xe085,
+ 0xa438, 0x6ae1, 0xa438, 0x856b, 0xa438, 0xbf8b, 0xa438, 0x5402,
+ 0xa438, 0x6c4e, 0xa438, 0xe085, 0xa438, 0x70e1, 0xa438, 0x8571,
+ 0xa438, 0xbf8b, 0xa438, 0x5702, 0xa438, 0x6c4e, 0xa438, 0xe085,
+ 0xa438, 0x76e1, 0xa438, 0x8577, 0xa438, 0xbf8b, 0xa438, 0x5a02,
+ 0xa438, 0x6c4e, 0xa438, 0xe18f, 0xa438, 0xb859, 0xa438, 0x00f7,
+ 0xa438, 0x28e5, 0xa438, 0x8fb8, 0xa438, 0xae0c, 0xa438, 0xe18f,
+ 0xa438, 0xb839, 0xa438, 0x04ac, 0xa438, 0x2f04, 0xa438, 0xee8f,
+ 0xa438, 0xb800, 0xa438, 0xfefd, 0xa438, 0xfc04, 0xa438, 0xf0ac,
+ 0xa438, 0x8efc, 0xa438, 0xac8c, 0xa438, 0xf0ac, 0xa438, 0xfaf0,
+ 0xa438, 0xacf8, 0xa438, 0xf0ac, 0xa438, 0xf6f0, 0xa438, 0xad00,
+ 0xa438, 0xf0ac, 0xa438, 0xfef0, 0xa438, 0xacfc, 0xa438, 0xf0ac,
+ 0xa438, 0xf4f0, 0xa438, 0xacf2, 0xa438, 0xf0ac, 0xa438, 0xf0f0,
+ 0xa438, 0xacb0, 0xa438, 0xf0ac, 0xa438, 0xaef0, 0xa438, 0xacac,
+ 0xa438, 0xf0ac, 0xa438, 0xaaf0, 0xa438, 0xacee, 0xa438, 0xf0b0,
+ 0xa438, 0x24f0, 0xa438, 0xb0a4, 0xa438, 0xf0b1, 0xa438, 0x24f0,
+ 0xa438, 0xb1a4, 0xa438, 0xee8f, 0xa438, 0xb800, 0xa438, 0xd400,
+ 0xa438, 0x00af, 0xa438, 0x3976, 0xa438, 0x66ac, 0xa438, 0xeabb,
+ 0xa438, 0xa430, 0xa438, 0x6e50, 0xa438, 0x6e53, 0xa438, 0x6e56,
+ 0xa438, 0x6e59, 0xa438, 0x6e5c, 0xa438, 0x6e5f, 0xa438, 0x6e62,
+ 0xa438, 0x6e65, 0xa438, 0xd9ac, 0xa438, 0x70f0, 0xa438, 0xac6a,
+ 0xa436, 0xb85e, 0xa438, 0x23b7, 0xa436, 0xb860, 0xa438, 0x74db,
+ 0xa436, 0xb862, 0xa438, 0x268c, 0xa436, 0xb864, 0xa438, 0x3FE5,
+ 0xa436, 0xb886, 0xa438, 0x2250, 0xa436, 0xb888, 0xa438, 0x140e,
+ 0xa436, 0xb88a, 0xa438, 0x3696, 0xa436, 0xb88c, 0xa438, 0x3973,
+ 0xa436, 0xb838, 0xa438, 0x00ff, 0xb820, 0x0010, 0xa436, 0x8464,
+ 0xa438, 0xaf84, 0xa438, 0x7caf, 0xa438, 0x8485, 0xa438, 0xaf85,
+ 0xa438, 0x13af, 0xa438, 0x851e, 0xa438, 0xaf85, 0xa438, 0xb9af,
+ 0xa438, 0x8684, 0xa438, 0xaf87, 0xa438, 0x01af, 0xa438, 0x8701,
+ 0xa438, 0xac38, 0xa438, 0x03af, 0xa438, 0x38bb, 0xa438, 0xaf38,
+ 0xa438, 0xc302, 0xa438, 0x4618, 0xa438, 0xbf85, 0xa438, 0x0a02,
+ 0xa438, 0x54b7, 0xa438, 0xbf85, 0xa438, 0x1002, 0xa438, 0x54c0,
+ 0xa438, 0xd400, 0xa438, 0x0fbf, 0xa438, 0x8507, 0xa438, 0x024f,
+ 0xa438, 0x48bf, 0xa438, 0x8504, 0xa438, 0x024f, 0xa438, 0x6759,
+ 0xa438, 0xf0a1, 0xa438, 0x3008, 0xa438, 0xbf85, 0xa438, 0x0d02,
+ 0xa438, 0x54c0, 0xa438, 0xae06, 0xa438, 0xbf85, 0xa438, 0x0d02,
+ 0xa438, 0x54b7, 0xa438, 0xbf85, 0xa438, 0x0402, 0xa438, 0x4f67,
+ 0xa438, 0xa183, 0xa438, 0x02ae, 0xa438, 0x15a1, 0xa438, 0x8502,
+ 0xa438, 0xae10, 0xa438, 0x59f0, 0xa438, 0xa180, 0xa438, 0x16bf,
+ 0xa438, 0x8501, 0xa438, 0x024f, 0xa438, 0x67a1, 0xa438, 0x381b,
+ 0xa438, 0xae0b, 0xa438, 0xe18f, 0xa438, 0xffbf, 0xa438, 0x84fe,
+ 0xa438, 0x024f, 0xa438, 0x48ae, 0xa438, 0x17bf, 0xa438, 0x84fe,
+ 0xa438, 0x0254, 0xa438, 0xb7bf, 0xa438, 0x84fb, 0xa438, 0x0254,
+ 0xa438, 0xb7ae, 0xa438, 0x09a1, 0xa438, 0x5006, 0xa438, 0xbf84,
+ 0xa438, 0xfb02, 0xa438, 0x54c0, 0xa438, 0xaf04, 0xa438, 0x4700,
+ 0xa438, 0xad34, 0xa438, 0xfdad, 0xa438, 0x0670, 0xa438, 0xae14,
+ 0xa438, 0xf0a6, 0xa438, 0x00b8, 0xa438, 0xbd32, 0xa438, 0x30bd,
+ 0xa438, 0x30aa, 0xa438, 0xbd2c, 0xa438, 0xccbd, 0xa438, 0x2ca1,
+ 0xa438, 0x0705, 0xa438, 0xec80, 0xa438, 0xaf40, 0xa438, 0xf7af,
+ 0xa438, 0x40f5, 0xa438, 0xd101, 0xa438, 0xbf85, 0xa438, 0xa402,
+ 0xa438, 0x4f48, 0xa438, 0xbf85, 0xa438, 0xa702, 0xa438, 0x54c0,
+ 0xa438, 0xd10f, 0xa438, 0xbf85, 0xa438, 0xaa02, 0xa438, 0x4f48,
+ 0xa438, 0x024d, 0xa438, 0x6abf, 0xa438, 0x85ad, 0xa438, 0x024f,
+ 0xa438, 0x67bf, 0xa438, 0x8ff7, 0xa438, 0xddbf, 0xa438, 0x85b0,
+ 0xa438, 0x024f, 0xa438, 0x67bf, 0xa438, 0x8ff8, 0xa438, 0xddbf,
+ 0xa438, 0x85b3, 0xa438, 0x024f, 0xa438, 0x67bf, 0xa438, 0x8ff9,
+ 0xa438, 0xddbf, 0xa438, 0x85b6, 0xa438, 0x024f, 0xa438, 0x67bf,
+ 0xa438, 0x8ffa, 0xa438, 0xddd1, 0xa438, 0x00bf, 0xa438, 0x85aa,
+ 0xa438, 0x024f, 0xa438, 0x4802, 0xa438, 0x4d6a, 0xa438, 0xbf85,
+ 0xa438, 0xad02, 0xa438, 0x4f67, 0xa438, 0xbf8f, 0xa438, 0xfbdd,
+ 0xa438, 0xbf85, 0xa438, 0xb002, 0xa438, 0x4f67, 0xa438, 0xbf8f,
+ 0xa438, 0xfcdd, 0xa438, 0xbf85, 0xa438, 0xb302, 0xa438, 0x4f67,
+ 0xa438, 0xbf8f, 0xa438, 0xfddd, 0xa438, 0xbf85, 0xa438, 0xb602,
+ 0xa438, 0x4f67, 0xa438, 0xbf8f, 0xa438, 0xfedd, 0xa438, 0xbf85,
+ 0xa438, 0xa702, 0xa438, 0x54b7, 0xa438, 0xbf85, 0xa438, 0xa102,
+ 0xa438, 0x54b7, 0xa438, 0xaf3c, 0xa438, 0x2066, 0xa438, 0xb800,
+ 0xa438, 0xb8bd, 0xa438, 0x30ee, 0xa438, 0xbd2c, 0xa438, 0xb8bd,
+ 0xa438, 0x7040, 0xa438, 0xbd86, 0xa438, 0xc8bd, 0xa438, 0x8640,
+ 0xa438, 0xbd88, 0xa438, 0xc8bd, 0xa438, 0x8802, 0xa438, 0x1929,
+ 0xa438, 0xa202, 0xa438, 0x02ae, 0xa438, 0x03a2, 0xa438, 0x032e,
+ 0xa438, 0xd10f, 0xa438, 0xbf85, 0xa438, 0xaa02, 0xa438, 0x4f48,
+ 0xa438, 0xe18f, 0xa438, 0xf7bf, 0xa438, 0x85ad, 0xa438, 0x024f,
+ 0xa438, 0x48e1, 0xa438, 0x8ff8, 0xa438, 0xbf85, 0xa438, 0xb002,
+ 0xa438, 0x4f48, 0xa438, 0xe18f, 0xa438, 0xf9bf, 0xa438, 0x85b3,
+ 0xa438, 0x024f, 0xa438, 0x48e1, 0xa438, 0x8ffa, 0xa438, 0xbf85,
+ 0xa438, 0xb602, 0xa438, 0x4f48, 0xa438, 0xae2c, 0xa438, 0xd100,
+ 0xa438, 0xbf85, 0xa438, 0xaa02, 0xa438, 0x4f48, 0xa438, 0xe18f,
+ 0xa438, 0xfbbf, 0xa438, 0x85ad, 0xa438, 0x024f, 0xa438, 0x48e1,
+ 0xa438, 0x8ffc, 0xa438, 0xbf85, 0xa438, 0xb002, 0xa438, 0x4f48,
+ 0xa438, 0xe18f, 0xa438, 0xfdbf, 0xa438, 0x85b3, 0xa438, 0x024f,
+ 0xa438, 0x48e1, 0xa438, 0x8ffe, 0xa438, 0xbf85, 0xa438, 0xb602,
+ 0xa438, 0x4f48, 0xa438, 0xbf86, 0xa438, 0x7e02, 0xa438, 0x4f67,
+ 0xa438, 0xa100, 0xa438, 0x02ae, 0xa438, 0x25a1, 0xa438, 0x041d,
+ 0xa438, 0xe18f, 0xa438, 0xf1bf, 0xa438, 0x8675, 0xa438, 0x024f,
+ 0xa438, 0x48e1, 0xa438, 0x8ff2, 0xa438, 0xbf86, 0xa438, 0x7802,
+ 0xa438, 0x4f48, 0xa438, 0xe18f, 0xa438, 0xf3bf, 0xa438, 0x867b,
+ 0xa438, 0x024f, 0xa438, 0x48ae, 0xa438, 0x29a1, 0xa438, 0x070b,
+ 0xa438, 0xae24, 0xa438, 0xbf86, 0xa438, 0x8102, 0xa438, 0x4f67,
+ 0xa438, 0xad28, 0xa438, 0x1be1, 0xa438, 0x8ff4, 0xa438, 0xbf86,
+ 0xa438, 0x7502, 0xa438, 0x4f48, 0xa438, 0xe18f, 0xa438, 0xf5bf,
+ 0xa438, 0x8678, 0xa438, 0x024f, 0xa438, 0x48e1, 0xa438, 0x8ff6,
+ 0xa438, 0xbf86, 0xa438, 0x7b02, 0xa438, 0x4f48, 0xa438, 0xaf09,
+ 0xa438, 0x8420, 0xa438, 0xbc32, 0xa438, 0x20bc, 0xa438, 0x3e76,
+ 0xa438, 0xbc08, 0xa438, 0xfda6, 0xa438, 0x1a00, 0xa438, 0xb64e,
+ 0xa438, 0xd101, 0xa438, 0xbf85, 0xa438, 0xa402, 0xa438, 0x4f48,
+ 0xa438, 0xbf85, 0xa438, 0xa702, 0xa438, 0x54c0, 0xa438, 0xd10f,
+ 0xa438, 0xbf85, 0xa438, 0xaa02, 0xa438, 0x4f48, 0xa438, 0x024d,
+ 0xa438, 0x6abf, 0xa438, 0x85ad, 0xa438, 0x024f, 0xa438, 0x67bf,
+ 0xa438, 0x8ff7, 0xa438, 0xddbf, 0xa438, 0x85b0, 0xa438, 0x024f,
+ 0xa438, 0x67bf, 0xa438, 0x8ff8, 0xa438, 0xddbf, 0xa438, 0x85b3,
+ 0xa438, 0x024f, 0xa438, 0x67bf, 0xa438, 0x8ff9, 0xa438, 0xddbf,
+ 0xa438, 0x85b6, 0xa438, 0x024f, 0xa438, 0x67bf, 0xa438, 0x8ffa,
+ 0xa438, 0xddd1, 0xa438, 0x00bf, 0xa438, 0x85aa, 0xa438, 0x024f,
+ 0xa438, 0x4802, 0xa438, 0x4d6a, 0xa438, 0xbf85, 0xa438, 0xad02,
+ 0xa438, 0x4f67, 0xa438, 0xbf8f, 0xa438, 0xfbdd, 0xa438, 0xbf85,
+ 0xa438, 0xb002, 0xa438, 0x4f67, 0xa438, 0xbf8f, 0xa438, 0xfcdd,
+ 0xa438, 0xbf85, 0xa438, 0xb302, 0xa438, 0x4f67, 0xa438, 0xbf8f,
+ 0xa438, 0xfddd, 0xa438, 0xbf85, 0xa438, 0xb602, 0xa438, 0x4f67,
+ 0xa438, 0xbf8f, 0xa438, 0xfedd, 0xa438, 0xbf85, 0xa438, 0xa702,
+ 0xa438, 0x54b7, 0xa438, 0xaf00, 0xa438, 0x8800, 0xa436, 0xb818,
+ 0xa438, 0x38b8, 0xa436, 0xb81a, 0xa438, 0x0444, 0xa436, 0xb81c,
+ 0xa438, 0x40ee, 0xa436, 0xb81e, 0xa438, 0x3C1A, 0xa436, 0xb850,
+ 0xa438, 0x0981, 0xa436, 0xb852, 0xa438, 0x0085, 0xa436, 0xb878,
+ 0xa438, 0xffff, 0xa436, 0xb884, 0xa438, 0xffff, 0xa436, 0xb832,
+ 0xa438, 0x003f, 0xa436, 0x0000, 0xa438, 0x0000, 0xa436, 0xB82E,
+ 0xa438, 0x0000, 0xa436, 0x8024, 0xa438, 0x0000, 0xb820, 0x0000,
+ 0xa436, 0x801E, 0xa438, 0x0021, 0xFFFF, 0xFFFF
+};
+
+static const u16 phy_mcu_ram_code_8125b_2[] = {
+ 0xa436, 0x8024, 0xa438, 0x3701, 0xa436, 0xB82E, 0xa438, 0x0001,
+ 0xb820, 0x0090, 0xa436, 0xA016, 0xa438, 0x0000, 0xa436, 0xA012,
+ 0xa438, 0x0000, 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010,
+ 0xa438, 0x1800, 0xa438, 0x801a, 0xa438, 0x1800, 0xa438, 0x803f,
+ 0xa438, 0x1800, 0xa438, 0x8045, 0xa438, 0x1800, 0xa438, 0x8067,
+ 0xa438, 0x1800, 0xa438, 0x806d, 0xa438, 0x1800, 0xa438, 0x8071,
+ 0xa438, 0x1800, 0xa438, 0x80b1, 0xa438, 0xd093, 0xa438, 0xd1c4,
+ 0xa438, 0x1000, 0xa438, 0x135c, 0xa438, 0xd704, 0xa438, 0x5fbc,
+ 0xa438, 0xd504, 0xa438, 0xc9f1, 0xa438, 0x1800, 0xa438, 0x0fc9,
+ 0xa438, 0xbb50, 0xa438, 0xd505, 0xa438, 0xa202, 0xa438, 0xd504,
+ 0xa438, 0x8c0f, 0xa438, 0xd500, 0xa438, 0x1000, 0xa438, 0x1519,
+ 0xa438, 0x1000, 0xa438, 0x135c, 0xa438, 0xd75e, 0xa438, 0x5fae,
+ 0xa438, 0x9b50, 0xa438, 0x1000, 0xa438, 0x135c, 0xa438, 0xd75e,
+ 0xa438, 0x7fae, 0xa438, 0x1000, 0xa438, 0x135c, 0xa438, 0xd707,
+ 0xa438, 0x40a7, 0xa438, 0xd719, 0xa438, 0x4071, 0xa438, 0x1800,
+ 0xa438, 0x1557, 0xa438, 0xd719, 0xa438, 0x2f70, 0xa438, 0x803b,
+ 0xa438, 0x2f73, 0xa438, 0x156a, 0xa438, 0x5e70, 0xa438, 0x1800,
+ 0xa438, 0x155d, 0xa438, 0xd505, 0xa438, 0xa202, 0xa438, 0xd500,
+ 0xa438, 0xffed, 0xa438, 0xd709, 0xa438, 0x4054, 0xa438, 0xa788,
+ 0xa438, 0xd70b, 0xa438, 0x1800, 0xa438, 0x172a, 0xa438, 0xc0c1,
+ 0xa438, 0xc0c0, 0xa438, 0xd05a, 0xa438, 0xd1ba, 0xa438, 0xd701,
+ 0xa438, 0x2529, 0xa438, 0x022a, 0xa438, 0xd0a7, 0xa438, 0xd1b9,
+ 0xa438, 0xa208, 0xa438, 0x1000, 0xa438, 0x080e, 0xa438, 0xd701,
+ 0xa438, 0x408b, 0xa438, 0x1000, 0xa438, 0x0a65, 0xa438, 0xf003,
+ 0xa438, 0x1000, 0xa438, 0x0a6b, 0xa438, 0xd701, 0xa438, 0x1000,
+ 0xa438, 0x0920, 0xa438, 0x1000, 0xa438, 0x0915, 0xa438, 0x1000,
+ 0xa438, 0x0909, 0xa438, 0x228f, 0xa438, 0x804e, 0xa438, 0x9801,
+ 0xa438, 0xd71e, 0xa438, 0x5d61, 0xa438, 0xd701, 0xa438, 0x1800,
+ 0xa438, 0x022a, 0xa438, 0x2005, 0xa438, 0x091a, 0xa438, 0x3bd9,
+ 0xa438, 0x0919, 0xa438, 0x1800, 0xa438, 0x0916, 0xa438, 0xd090,
+ 0xa438, 0xd1c9, 0xa438, 0x1800, 0xa438, 0x1064, 0xa438, 0xd096,
+ 0xa438, 0xd1a9, 0xa438, 0xd503, 0xa438, 0xa104, 0xa438, 0x0c07,
+ 0xa438, 0x0902, 0xa438, 0xd500, 0xa438, 0xbc10, 0xa438, 0xd501,
+ 0xa438, 0xce01, 0xa438, 0xa201, 0xa438, 0x8201, 0xa438, 0xce00,
+ 0xa438, 0xd500, 0xa438, 0xc484, 0xa438, 0xd503, 0xa438, 0xcc02,
+ 0xa438, 0xcd0d, 0xa438, 0xaf01, 0xa438, 0xd500, 0xa438, 0xd703,
+ 0xa438, 0x4371, 0xa438, 0xbd08, 0xa438, 0x1000, 0xa438, 0x135c,
+ 0xa438, 0xd75e, 0xa438, 0x5fb3, 0xa438, 0xd503, 0xa438, 0xd0f5,
+ 0xa438, 0xd1c6, 0xa438, 0x0cf0, 0xa438, 0x0e50, 0xa438, 0xd704,
+ 0xa438, 0x401c, 0xa438, 0xd0f5, 0xa438, 0xd1c6, 0xa438, 0x0cf0,
+ 0xa438, 0x0ea0, 0xa438, 0x401c, 0xa438, 0xd07b, 0xa438, 0xd1c5,
+ 0xa438, 0x8ef0, 0xa438, 0x401c, 0xa438, 0x9d08, 0xa438, 0x1000,
+ 0xa438, 0x135c, 0xa438, 0xd75e, 0xa438, 0x7fb3, 0xa438, 0x1000,
+ 0xa438, 0x135c, 0xa438, 0xd75e, 0xa438, 0x5fad, 0xa438, 0x1000,
+ 0xa438, 0x14c5, 0xa438, 0xd703, 0xa438, 0x3181, 0xa438, 0x80af,
+ 0xa438, 0x60ad, 0xa438, 0x1000, 0xa438, 0x135c, 0xa438, 0xd703,
+ 0xa438, 0x5fba, 0xa438, 0x1800, 0xa438, 0x0cc7, 0xa438, 0xa802,
+ 0xa438, 0xa301, 0xa438, 0xa801, 0xa438, 0xc004, 0xa438, 0xd710,
+ 0xa438, 0x4000, 0xa438, 0x1800, 0xa438, 0x1e79, 0xa436, 0xA026,
+ 0xa438, 0x1e78, 0xa436, 0xA024, 0xa438, 0x0c93, 0xa436, 0xA022,
+ 0xa438, 0x1062, 0xa436, 0xA020, 0xa438, 0x0915, 0xa436, 0xA006,
+ 0xa438, 0x020a, 0xa436, 0xA004, 0xa438, 0x1726, 0xa436, 0xA002,
+ 0xa438, 0x1542, 0xa436, 0xA000, 0xa438, 0x0fc7, 0xa436, 0xA008,
+ 0xa438, 0xff00, 0xa436, 0xA016, 0xa438, 0x0010, 0xa436, 0xA012,
+ 0xa438, 0x0000, 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010,
+ 0xa438, 0x1800, 0xa438, 0x801d, 0xa438, 0x1800, 0xa438, 0x802c,
+ 0xa438, 0x1800, 0xa438, 0x802c, 0xa438, 0x1800, 0xa438, 0x802c,
+ 0xa438, 0x1800, 0xa438, 0x802c, 0xa438, 0x1800, 0xa438, 0x802c,
+ 0xa438, 0x1800, 0xa438, 0x802c, 0xa438, 0xd700, 0xa438, 0x6090,
+ 0xa438, 0x60d1, 0xa438, 0xc95c, 0xa438, 0xf007, 0xa438, 0x60b1,
+ 0xa438, 0xc95a, 0xa438, 0xf004, 0xa438, 0xc956, 0xa438, 0xf002,
+ 0xa438, 0xc94e, 0xa438, 0x1800, 0xa438, 0x00cd, 0xa438, 0xd700,
+ 0xa438, 0x6090, 0xa438, 0x60d1, 0xa438, 0xc95c, 0xa438, 0xf007,
+ 0xa438, 0x60b1, 0xa438, 0xc95a, 0xa438, 0xf004, 0xa438, 0xc956,
+ 0xa438, 0xf002, 0xa438, 0xc94e, 0xa438, 0x1000, 0xa438, 0x022a,
+ 0xa438, 0x1800, 0xa438, 0x0132, 0xa436, 0xA08E, 0xa438, 0xffff,
+ 0xa436, 0xA08C, 0xa438, 0xffff, 0xa436, 0xA08A, 0xa438, 0xffff,
+ 0xa436, 0xA088, 0xa438, 0xffff, 0xa436, 0xA086, 0xa438, 0xffff,
+ 0xa436, 0xA084, 0xa438, 0xffff, 0xa436, 0xA082, 0xa438, 0x012f,
+ 0xa436, 0xA080, 0xa438, 0x00cc, 0xa436, 0xA090, 0xa438, 0x0103,
+ 0xa436, 0xA016, 0xa438, 0x0020, 0xa436, 0xA012, 0xa438, 0x0000,
+ 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010, 0xa438, 0x1800,
+ 0xa438, 0x8020, 0xa438, 0x1800, 0xa438, 0x802a, 0xa438, 0x1800,
+ 0xa438, 0x8035, 0xa438, 0x1800, 0xa438, 0x803c, 0xa438, 0x1800,
+ 0xa438, 0x803c, 0xa438, 0x1800, 0xa438, 0x803c, 0xa438, 0x1800,
+ 0xa438, 0x803c, 0xa438, 0xd107, 0xa438, 0xd042, 0xa438, 0xa404,
+ 0xa438, 0x1000, 0xa438, 0x09df, 0xa438, 0xd700, 0xa438, 0x5fb4,
+ 0xa438, 0x8280, 0xa438, 0xd700, 0xa438, 0x6065, 0xa438, 0xd125,
+ 0xa438, 0xf002, 0xa438, 0xd12b, 0xa438, 0xd040, 0xa438, 0x1800,
+ 0xa438, 0x077f, 0xa438, 0x0cf0, 0xa438, 0x0c50, 0xa438, 0xd104,
+ 0xa438, 0xd040, 0xa438, 0x1000, 0xa438, 0x0aa8, 0xa438, 0xd700,
+ 0xa438, 0x5fb4, 0xa438, 0x1800, 0xa438, 0x0a2e, 0xa438, 0xcb9b,
+ 0xa438, 0xd110, 0xa438, 0xd040, 0xa438, 0x1000, 0xa438, 0x0b7b,
+ 0xa438, 0x1000, 0xa438, 0x09df, 0xa438, 0xd700, 0xa438, 0x5fb4,
+ 0xa438, 0x1800, 0xa438, 0x081b, 0xa438, 0x1000, 0xa438, 0x09df,
+ 0xa438, 0xd704, 0xa438, 0x7fb8, 0xa438, 0xa718, 0xa438, 0x1800,
+ 0xa438, 0x074e, 0xa436, 0xA10E, 0xa438, 0xffff, 0xa436, 0xA10C,
+ 0xa438, 0xffff, 0xa436, 0xA10A, 0xa438, 0xffff, 0xa436, 0xA108,
+ 0xa438, 0xffff, 0xa436, 0xA106, 0xa438, 0x074d, 0xa436, 0xA104,
+ 0xa438, 0x0818, 0xa436, 0xA102, 0xa438, 0x0a2c, 0xa436, 0xA100,
+ 0xa438, 0x077e, 0xa436, 0xA110, 0xa438, 0x000f, 0xa436, 0xb87c,
+ 0xa438, 0x8625, 0xa436, 0xb87e, 0xa438, 0xaf86, 0xa438, 0x3daf,
+ 0xa438, 0x8689, 0xa438, 0xaf88, 0xa438, 0x69af, 0xa438, 0x8887,
+ 0xa438, 0xaf88, 0xa438, 0x9caf, 0xa438, 0x889c, 0xa438, 0xaf88,
+ 0xa438, 0x9caf, 0xa438, 0x889c, 0xa438, 0xbf86, 0xa438, 0x49d7,
+ 0xa438, 0x0040, 0xa438, 0x0277, 0xa438, 0x7daf, 0xa438, 0x2727,
+ 0xa438, 0x0000, 0xa438, 0x7205, 0xa438, 0x0000, 0xa438, 0x7208,
+ 0xa438, 0x0000, 0xa438, 0x71f3, 0xa438, 0x0000, 0xa438, 0x71f6,
+ 0xa438, 0x0000, 0xa438, 0x7229, 0xa438, 0x0000, 0xa438, 0x722c,
+ 0xa438, 0x0000, 0xa438, 0x7217, 0xa438, 0x0000, 0xa438, 0x721a,
+ 0xa438, 0x0000, 0xa438, 0x721d, 0xa438, 0x0000, 0xa438, 0x7211,
+ 0xa438, 0x0000, 0xa438, 0x7220, 0xa438, 0x0000, 0xa438, 0x7214,
+ 0xa438, 0x0000, 0xa438, 0x722f, 0xa438, 0x0000, 0xa438, 0x7223,
+ 0xa438, 0x0000, 0xa438, 0x7232, 0xa438, 0x0000, 0xa438, 0x7226,
+ 0xa438, 0xf8f9, 0xa438, 0xfae0, 0xa438, 0x85b3, 0xa438, 0x3802,
+ 0xa438, 0xad27, 0xa438, 0x02ae, 0xa438, 0x03af, 0xa438, 0x8830,
+ 0xa438, 0x1f66, 0xa438, 0xef65, 0xa438, 0xbfc2, 0xa438, 0x1f1a,
+ 0xa438, 0x96f7, 0xa438, 0x05ee, 0xa438, 0xffd2, 0xa438, 0x00da,
+ 0xa438, 0xf605, 0xa438, 0xbfc2, 0xa438, 0x2f1a, 0xa438, 0x96f7,
+ 0xa438, 0x05ee, 0xa438, 0xffd2, 0xa438, 0x00db, 0xa438, 0xf605,
+ 0xa438, 0xef02, 0xa438, 0x1f11, 0xa438, 0x0d42, 0xa438, 0xbf88,
+ 0xa438, 0x4202, 0xa438, 0x6e7d, 0xa438, 0xef02, 0xa438, 0x1b03,
+ 0xa438, 0x1f11, 0xa438, 0x0d42, 0xa438, 0xbf88, 0xa438, 0x4502,
+ 0xa438, 0x6e7d, 0xa438, 0xef02, 0xa438, 0x1a03, 0xa438, 0x1f11,
+ 0xa438, 0x0d42, 0xa438, 0xbf88, 0xa438, 0x4802, 0xa438, 0x6e7d,
+ 0xa438, 0xbfc2, 0xa438, 0x3f1a, 0xa438, 0x96f7, 0xa438, 0x05ee,
+ 0xa438, 0xffd2, 0xa438, 0x00da, 0xa438, 0xf605, 0xa438, 0xbfc2,
+ 0xa438, 0x4f1a, 0xa438, 0x96f7, 0xa438, 0x05ee, 0xa438, 0xffd2,
+ 0xa438, 0x00db, 0xa438, 0xf605, 0xa438, 0xef02, 0xa438, 0x1f11,
+ 0xa438, 0x0d42, 0xa438, 0xbf88, 0xa438, 0x4b02, 0xa438, 0x6e7d,
+ 0xa438, 0xef02, 0xa438, 0x1b03, 0xa438, 0x1f11, 0xa438, 0x0d42,
+ 0xa438, 0xbf88, 0xa438, 0x4e02, 0xa438, 0x6e7d, 0xa438, 0xef02,
+ 0xa438, 0x1a03, 0xa438, 0x1f11, 0xa438, 0x0d42, 0xa438, 0xbf88,
+ 0xa438, 0x5102, 0xa438, 0x6e7d, 0xa438, 0xef56, 0xa438, 0xd020,
+ 0xa438, 0x1f11, 0xa438, 0xbf88, 0xa438, 0x5402, 0xa438, 0x6e7d,
+ 0xa438, 0xbf88, 0xa438, 0x5702, 0xa438, 0x6e7d, 0xa438, 0xbf88,
+ 0xa438, 0x5a02, 0xa438, 0x6e7d, 0xa438, 0xe185, 0xa438, 0xa0ef,
+ 0xa438, 0x0348, 0xa438, 0x0a28, 0xa438, 0x05ef, 0xa438, 0x201b,
+ 0xa438, 0x01ad, 0xa438, 0x2735, 0xa438, 0x1f44, 0xa438, 0xe085,
+ 0xa438, 0x88e1, 0xa438, 0x8589, 0xa438, 0xbf88, 0xa438, 0x5d02,
+ 0xa438, 0x6e7d, 0xa438, 0xe085, 0xa438, 0x8ee1, 0xa438, 0x858f,
+ 0xa438, 0xbf88, 0xa438, 0x6002, 0xa438, 0x6e7d, 0xa438, 0xe085,
+ 0xa438, 0x94e1, 0xa438, 0x8595, 0xa438, 0xbf88, 0xa438, 0x6302,
+ 0xa438, 0x6e7d, 0xa438, 0xe085, 0xa438, 0x9ae1, 0xa438, 0x859b,
+ 0xa438, 0xbf88, 0xa438, 0x6602, 0xa438, 0x6e7d, 0xa438, 0xaf88,
+ 0xa438, 0x3cbf, 0xa438, 0x883f, 0xa438, 0x026e, 0xa438, 0x9cad,
+ 0xa438, 0x2835, 0xa438, 0x1f44, 0xa438, 0xe08f, 0xa438, 0xf8e1,
+ 0xa438, 0x8ff9, 0xa438, 0xbf88, 0xa438, 0x5d02, 0xa438, 0x6e7d,
+ 0xa438, 0xe08f, 0xa438, 0xfae1, 0xa438, 0x8ffb, 0xa438, 0xbf88,
+ 0xa438, 0x6002, 0xa438, 0x6e7d, 0xa438, 0xe08f, 0xa438, 0xfce1,
+ 0xa438, 0x8ffd, 0xa438, 0xbf88, 0xa438, 0x6302, 0xa438, 0x6e7d,
+ 0xa438, 0xe08f, 0xa438, 0xfee1, 0xa438, 0x8fff, 0xa438, 0xbf88,
+ 0xa438, 0x6602, 0xa438, 0x6e7d, 0xa438, 0xaf88, 0xa438, 0x3ce1,
+ 0xa438, 0x85a1, 0xa438, 0x1b21, 0xa438, 0xad37, 0xa438, 0x341f,
+ 0xa438, 0x44e0, 0xa438, 0x858a, 0xa438, 0xe185, 0xa438, 0x8bbf,
+ 0xa438, 0x885d, 0xa438, 0x026e, 0xa438, 0x7de0, 0xa438, 0x8590,
+ 0xa438, 0xe185, 0xa438, 0x91bf, 0xa438, 0x8860, 0xa438, 0x026e,
+ 0xa438, 0x7de0, 0xa438, 0x8596, 0xa438, 0xe185, 0xa438, 0x97bf,
+ 0xa438, 0x8863, 0xa438, 0x026e, 0xa438, 0x7de0, 0xa438, 0x859c,
+ 0xa438, 0xe185, 0xa438, 0x9dbf, 0xa438, 0x8866, 0xa438, 0x026e,
+ 0xa438, 0x7dae, 0xa438, 0x401f, 0xa438, 0x44e0, 0xa438, 0x858c,
+ 0xa438, 0xe185, 0xa438, 0x8dbf, 0xa438, 0x885d, 0xa438, 0x026e,
+ 0xa438, 0x7de0, 0xa438, 0x8592, 0xa438, 0xe185, 0xa438, 0x93bf,
+ 0xa438, 0x8860, 0xa438, 0x026e, 0xa438, 0x7de0, 0xa438, 0x8598,
+ 0xa438, 0xe185, 0xa438, 0x99bf, 0xa438, 0x8863, 0xa438, 0x026e,
+ 0xa438, 0x7de0, 0xa438, 0x859e, 0xa438, 0xe185, 0xa438, 0x9fbf,
+ 0xa438, 0x8866, 0xa438, 0x026e, 0xa438, 0x7dae, 0xa438, 0x0ce1,
+ 0xa438, 0x85b3, 0xa438, 0x3904, 0xa438, 0xac2f, 0xa438, 0x04ee,
+ 0xa438, 0x85b3, 0xa438, 0x00af, 0xa438, 0x39d9, 0xa438, 0x22ac,
+ 0xa438, 0xeaf0, 0xa438, 0xacf6, 0xa438, 0xf0ac, 0xa438, 0xfaf0,
+ 0xa438, 0xacf8, 0xa438, 0xf0ac, 0xa438, 0xfcf0, 0xa438, 0xad00,
+ 0xa438, 0xf0ac, 0xa438, 0xfef0, 0xa438, 0xacf0, 0xa438, 0xf0ac,
+ 0xa438, 0xf4f0, 0xa438, 0xacf2, 0xa438, 0xf0ac, 0xa438, 0xb0f0,
+ 0xa438, 0xacae, 0xa438, 0xf0ac, 0xa438, 0xacf0, 0xa438, 0xacaa,
+ 0xa438, 0xa100, 0xa438, 0x0ce1, 0xa438, 0x8ff7, 0xa438, 0xbf88,
+ 0xa438, 0x8402, 0xa438, 0x6e7d, 0xa438, 0xaf26, 0xa438, 0xe9e1,
+ 0xa438, 0x8ff6, 0xa438, 0xbf88, 0xa438, 0x8402, 0xa438, 0x6e7d,
+ 0xa438, 0xaf26, 0xa438, 0xf520, 0xa438, 0xac86, 0xa438, 0xbf88,
+ 0xa438, 0x3f02, 0xa438, 0x6e9c, 0xa438, 0xad28, 0xa438, 0x03af,
+ 0xa438, 0x3324, 0xa438, 0xad38, 0xa438, 0x03af, 0xa438, 0x32e6,
+ 0xa438, 0xaf32, 0xa438, 0xfb00, 0xa436, 0xb87c, 0xa438, 0x8ff6,
+ 0xa436, 0xb87e, 0xa438, 0x0705, 0xa436, 0xb87c, 0xa438, 0x8ff8,
+ 0xa436, 0xb87e, 0xa438, 0x19cc, 0xa436, 0xb87c, 0xa438, 0x8ffa,
+ 0xa436, 0xb87e, 0xa438, 0x28e3, 0xa436, 0xb87c, 0xa438, 0x8ffc,
+ 0xa436, 0xb87e, 0xa438, 0x1047, 0xa436, 0xb87c, 0xa438, 0x8ffe,
+ 0xa436, 0xb87e, 0xa438, 0x0a45, 0xa436, 0xb85e, 0xa438, 0x271E,
+ 0xa436, 0xb860, 0xa438, 0x3846, 0xa436, 0xb862, 0xa438, 0x26E6,
+ 0xa436, 0xb864, 0xa438, 0x32E3, 0xa436, 0xb886, 0xa438, 0xffff,
+ 0xa436, 0xb888, 0xa438, 0xffff, 0xa436, 0xb88a, 0xa438, 0xffff,
+ 0xa436, 0xb88c, 0xa438, 0xffff, 0xa436, 0xb838, 0xa438, 0x000f,
+ 0xb820, 0x0010, 0xa436, 0x846e, 0xa438, 0xaf84, 0xa438, 0x86af,
+ 0xa438, 0x8690, 0xa438, 0xaf86, 0xa438, 0xa4af, 0xa438, 0x86a4,
+ 0xa438, 0xaf86, 0xa438, 0xa4af, 0xa438, 0x86a4, 0xa438, 0xaf86,
+ 0xa438, 0xa4af, 0xa438, 0x86a4, 0xa438, 0xee82, 0xa438, 0x5f00,
+ 0xa438, 0x0284, 0xa438, 0x90af, 0xa438, 0x0441, 0xa438, 0xf8e0,
+ 0xa438, 0x8ff3, 0xa438, 0xa000, 0xa438, 0x0502, 0xa438, 0x84a4,
+ 0xa438, 0xae06, 0xa438, 0xa001, 0xa438, 0x0302, 0xa438, 0x84c8,
+ 0xa438, 0xfc04, 0xa438, 0xf8f9, 0xa438, 0xef59, 0xa438, 0xe080,
+ 0xa438, 0x15ad, 0xa438, 0x2702, 0xa438, 0xae03, 0xa438, 0xaf84,
+ 0xa438, 0xc3bf, 0xa438, 0x53ca, 0xa438, 0x0252, 0xa438, 0xc8ad,
+ 0xa438, 0x2807, 0xa438, 0x0285, 0xa438, 0x2cee, 0xa438, 0x8ff3,
+ 0xa438, 0x01ef, 0xa438, 0x95fd, 0xa438, 0xfc04, 0xa438, 0xf8f9,
+ 0xa438, 0xfaef, 0xa438, 0x69bf, 0xa438, 0x53ca, 0xa438, 0x0252,
+ 0xa438, 0xc8ac, 0xa438, 0x2822, 0xa438, 0xd480, 0xa438, 0x00bf,
+ 0xa438, 0x8684, 0xa438, 0x0252, 0xa438, 0xa9bf, 0xa438, 0x8687,
+ 0xa438, 0x0252, 0xa438, 0xa9bf, 0xa438, 0x868a, 0xa438, 0x0252,
+ 0xa438, 0xa9bf, 0xa438, 0x868d, 0xa438, 0x0252, 0xa438, 0xa9ee,
+ 0xa438, 0x8ff3, 0xa438, 0x00af, 0xa438, 0x8526, 0xa438, 0xe08f,
+ 0xa438, 0xf4e1, 0xa438, 0x8ff5, 0xa438, 0xe28f, 0xa438, 0xf6e3,
+ 0xa438, 0x8ff7, 0xa438, 0x1b45, 0xa438, 0xac27, 0xa438, 0x0eee,
+ 0xa438, 0x8ff4, 0xa438, 0x00ee, 0xa438, 0x8ff5, 0xa438, 0x0002,
+ 0xa438, 0x852c, 0xa438, 0xaf85, 0xa438, 0x26e0, 0xa438, 0x8ff4,
+ 0xa438, 0xe18f, 0xa438, 0xf52c, 0xa438, 0x0001, 0xa438, 0xe48f,
+ 0xa438, 0xf4e5, 0xa438, 0x8ff5, 0xa438, 0xef96, 0xa438, 0xfefd,
+ 0xa438, 0xfc04, 0xa438, 0xf8f9, 0xa438, 0xef59, 0xa438, 0xbf53,
+ 0xa438, 0x2202, 0xa438, 0x52c8, 0xa438, 0xa18b, 0xa438, 0x02ae,
+ 0xa438, 0x03af, 0xa438, 0x85da, 0xa438, 0xbf57, 0xa438, 0x7202,
+ 0xa438, 0x52c8, 0xa438, 0xe48f, 0xa438, 0xf8e5, 0xa438, 0x8ff9,
+ 0xa438, 0xbf57, 0xa438, 0x7502, 0xa438, 0x52c8, 0xa438, 0xe48f,
+ 0xa438, 0xfae5, 0xa438, 0x8ffb, 0xa438, 0xbf57, 0xa438, 0x7802,
+ 0xa438, 0x52c8, 0xa438, 0xe48f, 0xa438, 0xfce5, 0xa438, 0x8ffd,
+ 0xa438, 0xbf57, 0xa438, 0x7b02, 0xa438, 0x52c8, 0xa438, 0xe48f,
+ 0xa438, 0xfee5, 0xa438, 0x8fff, 0xa438, 0xbf57, 0xa438, 0x6c02,
+ 0xa438, 0x52c8, 0xa438, 0xa102, 0xa438, 0x13ee, 0xa438, 0x8ffc,
+ 0xa438, 0x80ee, 0xa438, 0x8ffd, 0xa438, 0x00ee, 0xa438, 0x8ffe,
+ 0xa438, 0x80ee, 0xa438, 0x8fff, 0xa438, 0x00af, 0xa438, 0x8599,
+ 0xa438, 0xa101, 0xa438, 0x0cbf, 0xa438, 0x534c, 0xa438, 0x0252,
+ 0xa438, 0xc8a1, 0xa438, 0x0303, 0xa438, 0xaf85, 0xa438, 0x77bf,
+ 0xa438, 0x5322, 0xa438, 0x0252, 0xa438, 0xc8a1, 0xa438, 0x8b02,
+ 0xa438, 0xae03, 0xa438, 0xaf86, 0xa438, 0x64e0, 0xa438, 0x8ff8,
+ 0xa438, 0xe18f, 0xa438, 0xf9bf, 0xa438, 0x8684, 0xa438, 0x0252,
+ 0xa438, 0xa9e0, 0xa438, 0x8ffa, 0xa438, 0xe18f, 0xa438, 0xfbbf,
+ 0xa438, 0x8687, 0xa438, 0x0252, 0xa438, 0xa9e0, 0xa438, 0x8ffc,
+ 0xa438, 0xe18f, 0xa438, 0xfdbf, 0xa438, 0x868a, 0xa438, 0x0252,
+ 0xa438, 0xa9e0, 0xa438, 0x8ffe, 0xa438, 0xe18f, 0xa438, 0xffbf,
+ 0xa438, 0x868d, 0xa438, 0x0252, 0xa438, 0xa9af, 0xa438, 0x867f,
+ 0xa438, 0xbf53, 0xa438, 0x2202, 0xa438, 0x52c8, 0xa438, 0xa144,
+ 0xa438, 0x3cbf, 0xa438, 0x547b, 0xa438, 0x0252, 0xa438, 0xc8e4,
+ 0xa438, 0x8ff8, 0xa438, 0xe58f, 0xa438, 0xf9bf, 0xa438, 0x547e,
+ 0xa438, 0x0252, 0xa438, 0xc8e4, 0xa438, 0x8ffa, 0xa438, 0xe58f,
+ 0xa438, 0xfbbf, 0xa438, 0x5481, 0xa438, 0x0252, 0xa438, 0xc8e4,
+ 0xa438, 0x8ffc, 0xa438, 0xe58f, 0xa438, 0xfdbf, 0xa438, 0x5484,
+ 0xa438, 0x0252, 0xa438, 0xc8e4, 0xa438, 0x8ffe, 0xa438, 0xe58f,
+ 0xa438, 0xffbf, 0xa438, 0x5322, 0xa438, 0x0252, 0xa438, 0xc8a1,
+ 0xa438, 0x4448, 0xa438, 0xaf85, 0xa438, 0xa7bf, 0xa438, 0x5322,
+ 0xa438, 0x0252, 0xa438, 0xc8a1, 0xa438, 0x313c, 0xa438, 0xbf54,
+ 0xa438, 0x7b02, 0xa438, 0x52c8, 0xa438, 0xe48f, 0xa438, 0xf8e5,
+ 0xa438, 0x8ff9, 0xa438, 0xbf54, 0xa438, 0x7e02, 0xa438, 0x52c8,
+ 0xa438, 0xe48f, 0xa438, 0xfae5, 0xa438, 0x8ffb, 0xa438, 0xbf54,
+ 0xa438, 0x8102, 0xa438, 0x52c8, 0xa438, 0xe48f, 0xa438, 0xfce5,
+ 0xa438, 0x8ffd, 0xa438, 0xbf54, 0xa438, 0x8402, 0xa438, 0x52c8,
+ 0xa438, 0xe48f, 0xa438, 0xfee5, 0xa438, 0x8fff, 0xa438, 0xbf53,
+ 0xa438, 0x2202, 0xa438, 0x52c8, 0xa438, 0xa131, 0xa438, 0x03af,
+ 0xa438, 0x85a7, 0xa438, 0xd480, 0xa438, 0x00bf, 0xa438, 0x8684,
+ 0xa438, 0x0252, 0xa438, 0xa9bf, 0xa438, 0x8687, 0xa438, 0x0252,
+ 0xa438, 0xa9bf, 0xa438, 0x868a, 0xa438, 0x0252, 0xa438, 0xa9bf,
+ 0xa438, 0x868d, 0xa438, 0x0252, 0xa438, 0xa9ef, 0xa438, 0x95fd,
+ 0xa438, 0xfc04, 0xa438, 0xf0d1, 0xa438, 0x2af0, 0xa438, 0xd12c,
+ 0xa438, 0xf0d1, 0xa438, 0x44f0, 0xa438, 0xd146, 0xa438, 0xbf86,
+ 0xa438, 0xa102, 0xa438, 0x52c8, 0xa438, 0xbf86, 0xa438, 0xa102,
+ 0xa438, 0x52c8, 0xa438, 0xd101, 0xa438, 0xaf06, 0xa438, 0xa570,
+ 0xa438, 0xce42, 0xa436, 0xb818, 0xa438, 0x043d, 0xa436, 0xb81a,
+ 0xa438, 0x06a3, 0xa436, 0xb81c, 0xa438, 0xffff, 0xa436, 0xb81e,
+ 0xa438, 0xffff, 0xa436, 0xb850, 0xa438, 0xffff, 0xa436, 0xb852,
+ 0xa438, 0xffff, 0xa436, 0xb878, 0xa438, 0xffff, 0xa436, 0xb884,
+ 0xa438, 0xffff, 0xa436, 0xb832, 0xa438, 0x0003, 0xa436, 0x0000,
+ 0xa438, 0x0000, 0xa436, 0xB82E, 0xa438, 0x0000, 0xa436, 0x8024,
+ 0xa438, 0x0000, 0xa436, 0x801E, 0xa438, 0x0021, 0xb820, 0x0000,
+ 0xFFFF, 0xFFFF
+};
+
+static const u16 phy_mcu_ram_code_8126a_1_1[] = {
+ 0xa436, 0x8023, 0xa438, 0x4900, 0xa436, 0xB82E, 0xa438, 0x0001,
+ 0xBFBA, 0xE000, 0xBF1A, 0xC1B9, 0xBFA8, 0x10F0, 0xBFB0, 0x0210,
+ 0xBFB4, 0xE7E4, 0xb820, 0x0090, 0xa436, 0xA016, 0xa438, 0x0000,
+ 0xa436, 0xA012, 0xa438, 0x0000, 0xa436, 0xA014, 0xa438, 0x1800,
+ 0xa438, 0x8010, 0xa438, 0x1800, 0xa438, 0x8062, 0xa438, 0x1800,
+ 0xa438, 0x8069, 0xa438, 0x1800, 0xa438, 0x80e2, 0xa438, 0x1800,
+ 0xa438, 0x80eb, 0xa438, 0x1800, 0xa438, 0x80f5, 0xa438, 0x1800,
+ 0xa438, 0x811b, 0xa438, 0x1800, 0xa438, 0x8120, 0xa438, 0xd500,
+ 0xa438, 0xd049, 0xa438, 0xd1b9, 0xa438, 0xa208, 0xa438, 0x8208,
+ 0xa438, 0xd503, 0xa438, 0xa104, 0xa438, 0x0c07, 0xa438, 0x0902,
+ 0xa438, 0xd500, 0xa438, 0xbc10, 0xa438, 0xc484, 0xa438, 0xd503,
+ 0xa438, 0xcc02, 0xa438, 0xcd0d, 0xa438, 0xaf01, 0xa438, 0xd500,
+ 0xa438, 0xd703, 0xa438, 0x4531, 0xa438, 0xbd08, 0xa438, 0x1000,
+ 0xa438, 0x16bb, 0xa438, 0xd75e, 0xa438, 0x5fb3, 0xa438, 0xd503,
+ 0xa438, 0xd04d, 0xa438, 0xd1c7, 0xa438, 0x0cf0, 0xa438, 0x0e10,
+ 0xa438, 0xd704, 0xa438, 0x5ffc, 0xa438, 0xd04d, 0xa438, 0xd1c7,
+ 0xa438, 0x0cf0, 0xa438, 0x0e20, 0xa438, 0xd704, 0xa438, 0x5ffc,
+ 0xa438, 0xd04d, 0xa438, 0xd1c7, 0xa438, 0x0cf0, 0xa438, 0x0e40,
+ 0xa438, 0xd704, 0xa438, 0x5ffc, 0xa438, 0xd04d, 0xa438, 0xd1c7,
+ 0xa438, 0x0cf0, 0xa438, 0x0e80, 0xa438, 0xd704, 0xa438, 0x5ffc,
+ 0xa438, 0xd07b, 0xa438, 0xd1c5, 0xa438, 0x8ef0, 0xa438, 0xd704,
+ 0xa438, 0x5ffc, 0xa438, 0x9d08, 0xa438, 0x1000, 0xa438, 0x16bb,
+ 0xa438, 0xd75e, 0xa438, 0x7fb3, 0xa438, 0x1000, 0xa438, 0x16bb,
+ 0xa438, 0xd75e, 0xa438, 0x5fad, 0xa438, 0x1000, 0xa438, 0x181f,
+ 0xa438, 0xd703, 0xa438, 0x3181, 0xa438, 0x8059, 0xa438, 0x60ad,
+ 0xa438, 0x1000, 0xa438, 0x16bb, 0xa438, 0xd703, 0xa438, 0x5fbb,
+ 0xa438, 0x1000, 0xa438, 0x16bb, 0xa438, 0xd719, 0xa438, 0x7fa8,
+ 0xa438, 0xd500, 0xa438, 0xd049, 0xa438, 0xd1b9, 0xa438, 0x1800,
+ 0xa438, 0x0f0b, 0xa438, 0xd500, 0xa438, 0xd07b, 0xa438, 0xd1b5,
+ 0xa438, 0xd0f6, 0xa438, 0xd1c5, 0xa438, 0x1800, 0xa438, 0x1049,
+ 0xa438, 0xd707, 0xa438, 0x4121, 0xa438, 0xd706, 0xa438, 0x40fa,
+ 0xa438, 0xd099, 0xa438, 0xd1c6, 0xa438, 0x1000, 0xa438, 0x16bb,
+ 0xa438, 0xd704, 0xa438, 0x5fbc, 0xa438, 0xbc80, 0xa438, 0xc489,
+ 0xa438, 0xd503, 0xa438, 0xcc08, 0xa438, 0xcd46, 0xa438, 0xaf01,
+ 0xa438, 0xd500, 0xa438, 0x1000, 0xa438, 0x0903, 0xa438, 0x1000,
+ 0xa438, 0x16bb, 0xa438, 0xd75e, 0xa438, 0x5f6d, 0xa438, 0x1000,
+ 0xa438, 0x181f, 0xa438, 0xd504, 0xa438, 0xa210, 0xa438, 0xd500,
+ 0xa438, 0x1000, 0xa438, 0x16bb, 0xa438, 0xd719, 0xa438, 0x5fbc,
+ 0xa438, 0xd504, 0xa438, 0x8210, 0xa438, 0xd503, 0xa438, 0xc6d0,
+ 0xa438, 0xa521, 0xa438, 0xcd49, 0xa438, 0xaf01, 0xa438, 0xd504,
+ 0xa438, 0xa220, 0xa438, 0xd500, 0xa438, 0x1000, 0xa438, 0x16bb,
+ 0xa438, 0xd75e, 0xa438, 0x5fad, 0xa438, 0x1000, 0xa438, 0x181f,
+ 0xa438, 0xd503, 0xa438, 0xa704, 0xa438, 0x0c07, 0xa438, 0x0904,
+ 0xa438, 0xd504, 0xa438, 0xa102, 0xa438, 0xd500, 0xa438, 0x1000,
+ 0xa438, 0x16bb, 0xa438, 0xd718, 0xa438, 0x5fab, 0xa438, 0xd503,
+ 0xa438, 0xc6f0, 0xa438, 0xa521, 0xa438, 0xd505, 0xa438, 0xa404,
+ 0xa438, 0xd500, 0xa438, 0xd701, 0xa438, 0x6085, 0xa438, 0xd504,
+ 0xa438, 0xc9f1, 0xa438, 0xf003, 0xa438, 0xd504, 0xa438, 0xc9f0,
+ 0xa438, 0xd503, 0xa438, 0xcd4a, 0xa438, 0xaf01, 0xa438, 0xd500,
+ 0xa438, 0xd504, 0xa438, 0xa802, 0xa438, 0xd500, 0xa438, 0x1000,
+ 0xa438, 0x16bb, 0xa438, 0xd707, 0xa438, 0x5fb1, 0xa438, 0xd707,
+ 0xa438, 0x5f10, 0xa438, 0xd505, 0xa438, 0xa402, 0xa438, 0xd503,
+ 0xa438, 0xd707, 0xa438, 0x41a1, 0xa438, 0xd706, 0xa438, 0x60ba,
+ 0xa438, 0x60fc, 0xa438, 0x0c07, 0xa438, 0x0204, 0xa438, 0xf009,
+ 0xa438, 0x0c07, 0xa438, 0x0202, 0xa438, 0xf006, 0xa438, 0x0c07,
+ 0xa438, 0x0206, 0xa438, 0xf003, 0xa438, 0x0c07, 0xa438, 0x0202,
+ 0xa438, 0xd500, 0xa438, 0xd703, 0xa438, 0x3181, 0xa438, 0x80e0,
+ 0xa438, 0x616d, 0xa438, 0xd701, 0xa438, 0x6065, 0xa438, 0x1800,
+ 0xa438, 0x1229, 0xa438, 0x1000, 0xa438, 0x16bb, 0xa438, 0xd707,
+ 0xa438, 0x6061, 0xa438, 0xd704, 0xa438, 0x5f7c, 0xa438, 0x1800,
+ 0xa438, 0x124a, 0xa438, 0xd504, 0xa438, 0x8c0f, 0xa438, 0xd505,
+ 0xa438, 0xa20e, 0xa438, 0xd500, 0xa438, 0x1000, 0xa438, 0x1871,
+ 0xa438, 0x1800, 0xa438, 0x1899, 0xa438, 0xd70b, 0xa438, 0x60b0,
+ 0xa438, 0xd05a, 0xa438, 0xd19a, 0xa438, 0x1800, 0xa438, 0x1aef,
+ 0xa438, 0xd0ef, 0xa438, 0xd19a, 0xa438, 0x1800, 0xa438, 0x1aef,
+ 0xa438, 0x1000, 0xa438, 0x1d09, 0xa438, 0xd708, 0xa438, 0x3399,
+ 0xa438, 0x1b63, 0xa438, 0xd709, 0xa438, 0x5f5d, 0xa438, 0xd70b,
+ 0xa438, 0x6130, 0xa438, 0xd70d, 0xa438, 0x6163, 0xa438, 0xd709,
+ 0xa438, 0x430b, 0xa438, 0xd71e, 0xa438, 0x62c2, 0xa438, 0xb401,
+ 0xa438, 0xf014, 0xa438, 0xc901, 0xa438, 0x1000, 0xa438, 0x810e,
+ 0xa438, 0xf010, 0xa438, 0xc902, 0xa438, 0x1000, 0xa438, 0x810e,
+ 0xa438, 0xf00c, 0xa438, 0xce04, 0xa438, 0xcf01, 0xa438, 0xd70a,
+ 0xa438, 0x5fe2, 0xa438, 0xce04, 0xa438, 0xcf02, 0xa438, 0xc900,
+ 0xa438, 0xd70a, 0xa438, 0x4057, 0xa438, 0xb401, 0xa438, 0x0800,
+ 0xa438, 0x1800, 0xa438, 0x1b5d, 0xa438, 0xa480, 0xa438, 0xa2b0,
+ 0xa438, 0xa806, 0xa438, 0x1800, 0xa438, 0x225c, 0xa438, 0xa7e8,
+ 0xa438, 0xac08, 0xa438, 0x1800, 0xa438, 0x1a4e, 0xa436, 0xA026,
+ 0xa438, 0x1a4d, 0xa436, 0xA024, 0xa438, 0x225a, 0xa436, 0xA022,
+ 0xa438, 0x1b53, 0xa436, 0xA020, 0xa438, 0x1aed, 0xa436, 0xA006,
+ 0xa438, 0x1892, 0xa436, 0xA004, 0xa438, 0x11a4, 0xa436, 0xA002,
+ 0xa438, 0x103c, 0xa436, 0xA000, 0xa438, 0x0ea6, 0xa436, 0xA008,
+ 0xa438, 0xff00, 0xa436, 0xA016, 0xa438, 0x0000, 0xa436, 0xA012,
+ 0xa438, 0x0ff8, 0xa436, 0xA014, 0xa438, 0x0000, 0xa438, 0xD098,
+ 0xa438, 0xc483, 0xa438, 0xc483, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa436, 0xA152, 0xa438, 0x3fff,
+ 0xa436, 0xA154, 0xa438, 0x0413, 0xa436, 0xA156, 0xa438, 0x1A32,
+ 0xa436, 0xA158, 0xa438, 0x1CC0, 0xa436, 0xA15A, 0xa438, 0x3fff,
+ 0xa436, 0xA15C, 0xa438, 0x3fff, 0xa436, 0xA15E, 0xa438, 0x3fff,
+ 0xa436, 0xA160, 0xa438, 0x3fff, 0xa436, 0xA150, 0xa438, 0x000E,
+ 0xa436, 0xA016, 0xa438, 0x0020, 0xa436, 0xA012, 0xa438, 0x0000,
+ 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010, 0xa438, 0x1800,
+ 0xa438, 0x8021, 0xa438, 0x1800, 0xa438, 0x8037, 0xa438, 0x1800,
+ 0xa438, 0x803f, 0xa438, 0x1800, 0xa438, 0x8084, 0xa438, 0x1800,
+ 0xa438, 0x80c5, 0xa438, 0x1800, 0xa438, 0x80cc, 0xa438, 0x1800,
+ 0xa438, 0x80d5, 0xa438, 0xa00a, 0xa438, 0xa280, 0xa438, 0xa404,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x1800, 0xa438, 0x099b, 0xa438, 0x1000, 0xa438, 0x1021,
+ 0xa438, 0xd700, 0xa438, 0x5fab, 0xa438, 0xa208, 0xa438, 0x8204,
+ 0xa438, 0xcb38, 0xa438, 0xaa40, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x1800, 0xa438, 0x0b2a,
+ 0xa438, 0x82a0, 0xa438, 0x8404, 0xa438, 0xa110, 0xa438, 0xd706,
+ 0xa438, 0x4041, 0xa438, 0xa180, 0xa438, 0x1800, 0xa438, 0x0e7f,
+ 0xa438, 0x8190, 0xa438, 0xcb93, 0xa438, 0x1000, 0xa438, 0x0ef4,
+ 0xa438, 0xd704, 0xa438, 0x7fb8, 0xa438, 0xa008, 0xa438, 0xd706,
+ 0xa438, 0x4040, 0xa438, 0xa002, 0xa438, 0xd705, 0xa438, 0x4079,
+ 0xa438, 0x1000, 0xa438, 0x10ad, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0x85f0, 0xa438, 0x9503, 0xa438, 0xd705, 0xa438, 0x40d9,
+ 0xa438, 0xd70c, 0xa438, 0x6083, 0xa438, 0x0c1f, 0xa438, 0x0d09,
+ 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d0a, 0xa438, 0x0cc0,
+ 0xa438, 0x0d80, 0xa438, 0x1000, 0xa438, 0x104f, 0xa438, 0x1000,
+ 0xa438, 0x0ef4, 0xa438, 0x8020, 0xa438, 0xd705, 0xa438, 0x40d9,
+ 0xa438, 0xd704, 0xa438, 0x609f, 0xa438, 0xd70c, 0xa438, 0x6043,
+ 0xa438, 0x8504, 0xa438, 0xcb94, 0xa438, 0x1000, 0xa438, 0x0ef4,
+ 0xa438, 0xd706, 0xa438, 0x7fa2, 0xa438, 0x800a, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0x0cf0, 0xa438, 0x05a0, 0xa438, 0x9503,
+ 0xa438, 0xd705, 0xa438, 0x40b9, 0xa438, 0x0c1f, 0xa438, 0x0d00,
+ 0xa438, 0x8dc0, 0xa438, 0xf005, 0xa438, 0xa190, 0xa438, 0x0c1f,
+ 0xa438, 0x0d17, 0xa438, 0x8dc0, 0xa438, 0x1000, 0xa438, 0x104f,
+ 0xa438, 0xd705, 0xa438, 0x39cc, 0xa438, 0x0c7d, 0xa438, 0x1800,
+ 0xa438, 0x0e67, 0xa438, 0xcb96, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0xab05, 0xa438, 0xac04, 0xa438, 0xac08, 0xa438, 0x9503,
+ 0xa438, 0x0c1f, 0xa438, 0x0d00, 0xa438, 0x8dc0, 0xa438, 0x1000,
+ 0xa438, 0x104f, 0xa438, 0x1000, 0xa438, 0x1021, 0xa438, 0xd706,
+ 0xa438, 0x2215, 0xa438, 0x8099, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0xae02, 0xa438, 0x9503, 0xa438, 0xd706, 0xa438, 0x6451,
+ 0xa438, 0xd71f, 0xa438, 0x2e70, 0xa438, 0x0f00, 0xa438, 0xd706,
+ 0xa438, 0x3290, 0xa438, 0x80be, 0xa438, 0xd704, 0xa438, 0x2e70,
+ 0xa438, 0x8090, 0xa438, 0xd706, 0xa438, 0x339c, 0xa438, 0x8090,
+ 0xa438, 0x8718, 0xa438, 0x8910, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0xc500, 0xa438, 0x9503, 0xa438, 0x0c1f, 0xa438, 0x0d17,
+ 0xa438, 0x8dc0, 0xa438, 0x1000, 0xa438, 0x104f, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0x8c04, 0xa438, 0x9503, 0xa438, 0xa00a,
+ 0xa438, 0xa190, 0xa438, 0xa280, 0xa438, 0xa404, 0xa438, 0x1800,
+ 0xa438, 0x0f35, 0xa438, 0x1800, 0xa438, 0x0f07, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0x8c08, 0xa438, 0x8c04, 0xa438, 0x9503,
+ 0xa438, 0x1800, 0xa438, 0x0f02, 0xa438, 0x1000, 0xa438, 0x1021,
+ 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xaa10, 0xa438, 0x1800,
+ 0xa438, 0x0c6b, 0xa438, 0x82a0, 0xa438, 0x8406, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0xac04, 0xa438, 0x8602, 0xa438, 0x9503,
+ 0xa438, 0x1800, 0xa438, 0x0e09, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x8308, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0xc555, 0xa438, 0x9503, 0xa438, 0xa728,
+ 0xa438, 0x8440, 0xa438, 0x0c03, 0xa438, 0x0901, 0xa438, 0x8801,
+ 0xa438, 0xd700, 0xa438, 0x4040, 0xa438, 0xa801, 0xa438, 0xd701,
+ 0xa438, 0x4052, 0xa438, 0xa810, 0xa438, 0xd701, 0xa438, 0x4054,
+ 0xa438, 0xa820, 0xa438, 0xd701, 0xa438, 0x4057, 0xa438, 0xa640,
+ 0xa438, 0xd704, 0xa438, 0x4046, 0xa438, 0xa840, 0xa438, 0xd706,
+ 0xa438, 0x40b5, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xae20,
+ 0xa438, 0x9503, 0xa438, 0xd401, 0xa438, 0x1000, 0xa438, 0x0fcf,
+ 0xa438, 0x1000, 0xa438, 0x0fda, 0xa438, 0x1000, 0xa438, 0x1008,
+ 0xa438, 0x1000, 0xa438, 0x0fe3, 0xa438, 0xcc00, 0xa438, 0x80c0,
+ 0xa438, 0x8103, 0xa438, 0x83e0, 0xa438, 0xd71e, 0xa438, 0x2318,
+ 0xa438, 0x01ae, 0xa438, 0xd704, 0xa438, 0x40bc, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0x8302, 0xa438, 0x9503, 0xa438, 0xb801,
+ 0xa438, 0xd706, 0xa438, 0x2b59, 0xa438, 0x07f8, 0xa438, 0xd700,
+ 0xa438, 0x2109, 0xa438, 0x04ab, 0xa438, 0xa508, 0xa438, 0xcb15,
+ 0xa438, 0xd70c, 0xa438, 0x430c, 0xa438, 0x1000, 0xa438, 0x10ca,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xa108, 0xa438, 0x9503,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x0c1f, 0xa438, 0x0f13,
+ 0xa438, 0x9503, 0xa438, 0x1000, 0xa438, 0x1021, 0xa438, 0xd70c,
+ 0xa438, 0x5fb3, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8f1f,
+ 0xa438, 0x9503, 0xa438, 0x1000, 0xa438, 0x1021, 0xa438, 0xd70c,
+ 0xa438, 0x7f33, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x0c0f,
+ 0xa438, 0x0d00, 0xa438, 0x0c70, 0xa438, 0x0b00, 0xa438, 0xab08,
+ 0xa438, 0x9503, 0xa438, 0xd704, 0xa438, 0x3cf1, 0xa438, 0x01f9,
+ 0xa438, 0x0c1f, 0xa438, 0x0d11, 0xa438, 0xf003, 0xa438, 0x0c1f,
+ 0xa438, 0x0d0d, 0xa438, 0x0cc0, 0xa438, 0x0d40, 0xa438, 0x1000,
+ 0xa438, 0x104f, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xab80,
+ 0xa438, 0x9503, 0xa438, 0x1000, 0xa438, 0x1021, 0xa438, 0xa940,
+ 0xa438, 0xd700, 0xa438, 0x5f99, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0x8b80, 0xa438, 0x9503, 0xa438, 0x8940, 0xa438, 0xd700,
+ 0xa438, 0x5bbf, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8b08,
+ 0xa438, 0x9503, 0xa438, 0xba20, 0xa438, 0xd704, 0xa438, 0x4100,
+ 0xa438, 0xd115, 0xa438, 0xd04f, 0xa438, 0xf001, 0xa438, 0x1000,
+ 0xa438, 0x1021, 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0x0c0f, 0xa438, 0x0d00, 0xa438, 0x0c70,
+ 0xa438, 0x0b10, 0xa438, 0xab08, 0xa438, 0x9503, 0xa438, 0xd704,
+ 0xa438, 0x3cf1, 0xa438, 0x8178, 0xa438, 0x0c1f, 0xa438, 0x0d11,
+ 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d0d, 0xa438, 0x0cc0,
+ 0xa438, 0x0d40, 0xa438, 0x1000, 0xa438, 0x104f, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0xab80, 0xa438, 0x9503, 0xa438, 0x1000,
+ 0xa438, 0x1021, 0xa438, 0xd706, 0xa438, 0x5fad, 0xa438, 0xd407,
+ 0xa438, 0x1000, 0xa438, 0x0fcf, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0x8b88, 0xa438, 0x9503, 0xa438, 0x1000, 0xa438, 0x1021,
+ 0xa438, 0xd702, 0xa438, 0x7fa4, 0xa438, 0xd706, 0xa438, 0x61bf,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x0c30, 0xa438, 0x0110,
+ 0xa438, 0xa304, 0xa438, 0x9503, 0xa438, 0xd199, 0xa438, 0xd04b,
+ 0xa438, 0x1000, 0xa438, 0x1021, 0xa438, 0xd700, 0xa438, 0x5fb4,
+ 0xa438, 0xd704, 0xa438, 0x3cf1, 0xa438, 0x81a5, 0xa438, 0x0c1f,
+ 0xa438, 0x0d02, 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d01,
+ 0xa438, 0x0cc0, 0xa438, 0x0d40, 0xa438, 0xa420, 0xa438, 0x8720,
+ 0xa438, 0x1000, 0xa438, 0x104f, 0xa438, 0x1000, 0xa438, 0x0fda,
+ 0xa438, 0xd70c, 0xa438, 0x41ac, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0x8108, 0xa438, 0x9503, 0xa438, 0x0cc0, 0xa438, 0x0040,
+ 0xa438, 0x0c03, 0xa438, 0x0102, 0xa438, 0x0ce0, 0xa438, 0x03e0,
+ 0xa438, 0xccce, 0xa438, 0xf008, 0xa438, 0x0cc0, 0xa438, 0x0040,
+ 0xa438, 0x0c03, 0xa438, 0x0100, 0xa438, 0x0ce0, 0xa438, 0x0380,
+ 0xa438, 0xcc9c, 0xa438, 0x1000, 0xa438, 0x103f, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0xa640, 0xa438, 0x9503, 0xa438, 0xcb16,
+ 0xa438, 0xd706, 0xa438, 0x6129, 0xa438, 0xd70c, 0xa438, 0x608c,
+ 0xa438, 0xd17a, 0xa438, 0xd04a, 0xa438, 0xf006, 0xa438, 0xd17a,
+ 0xa438, 0xd04b, 0xa438, 0xf003, 0xa438, 0xd13d, 0xa438, 0xd04b,
+ 0xa438, 0x0c1f, 0xa438, 0x0f14, 0xa438, 0xcb17, 0xa438, 0x8fc0,
+ 0xa438, 0x1000, 0xa438, 0x0fbd, 0xa438, 0xaf40, 0xa438, 0x1000,
+ 0xa438, 0x0fbd, 0xa438, 0x0cc0, 0xa438, 0x0f80, 0xa438, 0x1000,
+ 0xa438, 0x0fbd, 0xa438, 0xafc0, 0xa438, 0x1000, 0xa438, 0x0fbd,
+ 0xa438, 0x1000, 0xa438, 0x1021, 0xa438, 0xd701, 0xa438, 0x652e,
+ 0xa438, 0xd700, 0xa438, 0x5db4, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0x8640, 0xa438, 0xa702, 0xa438, 0x9503, 0xa438, 0xa720,
+ 0xa438, 0x1000, 0xa438, 0x0fda, 0xa438, 0xa108, 0xa438, 0x1000,
+ 0xa438, 0x0fec, 0xa438, 0x8108, 0xa438, 0x1000, 0xa438, 0x0fe3,
+ 0xa438, 0xa202, 0xa438, 0xa308, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x8308, 0xa438, 0xcb18,
+ 0xa438, 0x1000, 0xa438, 0x10c2, 0xa438, 0x1000, 0xa438, 0x1021,
+ 0xa438, 0xd70c, 0xa438, 0x2c60, 0xa438, 0x02bd, 0xa438, 0xff58,
+ 0xa438, 0x8f1f, 0xa438, 0x1000, 0xa438, 0x1021, 0xa438, 0xd701,
+ 0xa438, 0x7f8e, 0xa438, 0x1000, 0xa438, 0x0fe3, 0xa438, 0xa130,
+ 0xa438, 0xaa2f, 0xa438, 0xa2d5, 0xa438, 0xa407, 0xa438, 0xa720,
+ 0xa438, 0x8310, 0xa438, 0xa308, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x8308, 0xa438, 0x1800,
+ 0xa438, 0x02d2, 0xa436, 0xA10E, 0xa438, 0x017f, 0xa436, 0xA10C,
+ 0xa438, 0x0e04, 0xa436, 0xA10A, 0xa438, 0x0c67, 0xa436, 0xA108,
+ 0xa438, 0x0f13, 0xa436, 0xA106, 0xa438, 0x0eb1, 0xa436, 0xA104,
+ 0xa438, 0x0e79, 0xa436, 0xA102, 0xa438, 0x0b23, 0xa436, 0xA100,
+ 0xa438, 0x0908, 0xa436, 0xA110, 0xa438, 0x00ff, 0xa436, 0xb87c,
+ 0xa438, 0x8ad8, 0xa436, 0xb87e, 0xa438, 0xaf8a, 0xa438, 0xf0af,
+ 0xa438, 0x8af9, 0xa438, 0xaf8d, 0xa438, 0xdaaf, 0xa438, 0x8e1c,
+ 0xa438, 0xaf8f, 0xa438, 0x03af, 0xa438, 0x8f06, 0xa438, 0xaf8f,
+ 0xa438, 0x06af, 0xa438, 0x8f06, 0xa438, 0x0265, 0xa438, 0xa002,
+ 0xa438, 0x8d78, 0xa438, 0xaf23, 0xa438, 0x47a1, 0xa438, 0x0d06,
+ 0xa438, 0x028b, 0xa438, 0x05af, 0xa438, 0x225a, 0xa438, 0xaf22,
+ 0xa438, 0x66f8, 0xa438, 0xe08a, 0xa438, 0x33a0, 0xa438, 0x0005,
+ 0xa438, 0x028b, 0xa438, 0x21ae, 0xa438, 0x0ea0, 0xa438, 0x0105,
+ 0xa438, 0x028b, 0xa438, 0xb3ae, 0xa438, 0x06a0, 0xa438, 0x0203,
+ 0xa438, 0x028c, 0xa438, 0x9dfc, 0xa438, 0x04f8, 0xa438, 0xfbfa,
+ 0xa438, 0xef69, 0xa438, 0xe080, 0xa438, 0x13ad, 0xa438, 0x267e,
+ 0xa438, 0xd067, 0xa438, 0xe48a, 0xa438, 0x34e4, 0xa438, 0x8a36,
+ 0xa438, 0xe48a, 0xa438, 0x38e4, 0xa438, 0x8a3a, 0xa438, 0xd0ae,
+ 0xa438, 0xe48a, 0xa438, 0x35e4, 0xa438, 0x8a37, 0xa438, 0xe48a,
+ 0xa438, 0x39e4, 0xa438, 0x8a3b, 0xa438, 0xd000, 0xa438, 0xe48a,
+ 0xa438, 0x3ce4, 0xa438, 0x8a3d, 0xa438, 0xe48a, 0xa438, 0x3ee4,
+ 0xa438, 0x8a3f, 0xa438, 0xe48a, 0xa438, 0x40e4, 0xa438, 0x8a41,
+ 0xa438, 0xe48a, 0xa438, 0x42e4, 0xa438, 0x8a43, 0xa438, 0xe48a,
+ 0xa438, 0x44d0, 0xa438, 0x02e4, 0xa438, 0x8a45, 0xa438, 0xd00a,
+ 0xa438, 0xe48a, 0xa438, 0x46d0, 0xa438, 0x16e4, 0xa438, 0x8a47,
+ 0xa438, 0xd01e, 0xa438, 0xe48a, 0xa438, 0x48d1, 0xa438, 0x02bf,
+ 0xa438, 0x8dce, 0xa438, 0x026b, 0xa438, 0xd0d1, 0xa438, 0x0abf,
+ 0xa438, 0x8dd1, 0xa438, 0x026b, 0xa438, 0xd0d1, 0xa438, 0x16bf,
+ 0xa438, 0x8dd4, 0xa438, 0x026b, 0xa438, 0xd0d1, 0xa438, 0x1ebf,
+ 0xa438, 0x8dd7, 0xa438, 0x026b, 0xa438, 0xd002, 0xa438, 0x73ab,
+ 0xa438, 0xef47, 0xa438, 0xe585, 0xa438, 0x5de4, 0xa438, 0x855c,
+ 0xa438, 0xee8a, 0xa438, 0x3301, 0xa438, 0xae03, 0xa438, 0x0224,
+ 0xa438, 0x95ef, 0xa438, 0x96fe, 0xa438, 0xfffc, 0xa438, 0x04f8,
+ 0xa438, 0xf9fa, 0xa438, 0xcefa, 0xa438, 0xef69, 0xa438, 0xfb02,
+ 0xa438, 0x8dab, 0xa438, 0xad50, 0xa438, 0x2ee1, 0xa438, 0x8a44,
+ 0xa438, 0xa104, 0xa438, 0x2bee, 0xa438, 0x8a33, 0xa438, 0x02e1,
+ 0xa438, 0x8a45, 0xa438, 0xbf8d, 0xa438, 0xce02, 0xa438, 0x6bd0,
+ 0xa438, 0xe18a, 0xa438, 0x46bf, 0xa438, 0x8dd1, 0xa438, 0x026b,
+ 0xa438, 0xd0e1, 0xa438, 0x8a47, 0xa438, 0xbf8d, 0xa438, 0xd402,
+ 0xa438, 0x6bd0, 0xa438, 0xe18a, 0xa438, 0x48bf, 0xa438, 0x8dd7,
+ 0xa438, 0x026b, 0xa438, 0xd0af, 0xa438, 0x8c94, 0xa438, 0xd200,
+ 0xa438, 0xbe00, 0xa438, 0x0002, 0xa438, 0x8ca5, 0xa438, 0x12a2,
+ 0xa438, 0x04f6, 0xa438, 0xe18a, 0xa438, 0x44a1, 0xa438, 0x0020,
+ 0xa438, 0xd129, 0xa438, 0xbf8d, 0xa438, 0xce02, 0xa438, 0x6bd0,
+ 0xa438, 0xd121, 0xa438, 0xbf8d, 0xa438, 0xd102, 0xa438, 0x6bd0,
+ 0xa438, 0xd125, 0xa438, 0xbf8d, 0xa438, 0xd402, 0xa438, 0x6bd0,
+ 0xa438, 0xbf8d, 0xa438, 0xd702, 0xa438, 0x6bd0, 0xa438, 0xae44,
+ 0xa438, 0xa101, 0xa438, 0x1ed1, 0xa438, 0x31bf, 0xa438, 0x8dce,
+ 0xa438, 0x026b, 0xa438, 0xd0bf, 0xa438, 0x8dd1, 0xa438, 0x026b,
+ 0xa438, 0xd0d1, 0xa438, 0x2dbf, 0xa438, 0x8dd4, 0xa438, 0x026b,
+ 0xa438, 0xd0bf, 0xa438, 0x8dd7, 0xa438, 0x026b, 0xa438, 0xd0ae,
+ 0xa438, 0x23a1, 0xa438, 0x0220, 0xa438, 0xd139, 0xa438, 0xbf8d,
+ 0xa438, 0xce02, 0xa438, 0x6bd0, 0xa438, 0xbf8d, 0xa438, 0xd102,
+ 0xa438, 0x6bd0, 0xa438, 0xd13d, 0xa438, 0xbf8d, 0xa438, 0xd402,
+ 0xa438, 0x6bd0, 0xa438, 0xd135, 0xa438, 0xbf8d, 0xa438, 0xd702,
+ 0xa438, 0x6bd0, 0xa438, 0xae00, 0xa438, 0xe18a, 0xa438, 0x4411,
+ 0xa438, 0xe58a, 0xa438, 0x44d0, 0xa438, 0x00e4, 0xa438, 0x8a3c,
+ 0xa438, 0xe48a, 0xa438, 0x3de4, 0xa438, 0x8a3e, 0xa438, 0xe48a,
+ 0xa438, 0x3fe4, 0xa438, 0x8a40, 0xa438, 0xe48a, 0xa438, 0x41e4,
+ 0xa438, 0x8a42, 0xa438, 0xe48a, 0xa438, 0x4302, 0xa438, 0x73ab,
+ 0xa438, 0xef47, 0xa438, 0xe585, 0xa438, 0x5de4, 0xa438, 0x855c,
+ 0xa438, 0xffef, 0xa438, 0x96fe, 0xa438, 0xc6fe, 0xa438, 0xfdfc,
+ 0xa438, 0x0402, 0xa438, 0x2495, 0xa438, 0xee8a, 0xa438, 0x3300,
+ 0xa438, 0x04f8, 0xa438, 0xf9fa, 0xa438, 0xfbef, 0xa438, 0x79fb,
+ 0xa438, 0xcffb, 0xa438, 0xd300, 0xa438, 0xa200, 0xa438, 0x09bf,
+ 0xa438, 0x8dc2, 0xa438, 0x026b, 0xa438, 0xefaf, 0xa438, 0x8cda,
+ 0xa438, 0xa201, 0xa438, 0x09bf, 0xa438, 0x8dc5, 0xa438, 0x026b,
+ 0xa438, 0xefaf, 0xa438, 0x8cda, 0xa438, 0xa202, 0xa438, 0x09bf,
+ 0xa438, 0x8dc8, 0xa438, 0x026b, 0xa438, 0xefaf, 0xa438, 0x8cda,
+ 0xa438, 0xbf8d, 0xa438, 0xcb02, 0xa438, 0x6bef, 0xa438, 0xef64,
+ 0xa438, 0xbf8a, 0xa438, 0x3c1a, 0xa438, 0x921a, 0xa438, 0x92d8,
+ 0xa438, 0x19d9, 0xa438, 0xef74, 0xa438, 0x0273, 0xa438, 0x93ef,
+ 0xa438, 0x47bf, 0xa438, 0x8a3c, 0xa438, 0x1a92, 0xa438, 0x1a92,
+ 0xa438, 0xdc19, 0xa438, 0xddd1, 0xa438, 0x0011, 0xa438, 0xa1ff,
+ 0xa438, 0xfc13, 0xa438, 0xa310, 0xa438, 0xaf02, 0xa438, 0x8d0e,
+ 0xa438, 0xffc7, 0xa438, 0xffef, 0xa438, 0x97ff, 0xa438, 0xfefd,
+ 0xa438, 0xfc04, 0xa438, 0xf8fa, 0xa438, 0xfbef, 0xa438, 0x79fb,
+ 0xa438, 0xcffb, 0xa438, 0xbf8a, 0xa438, 0x3c1a, 0xa438, 0x921a,
+ 0xa438, 0x92d8, 0xa438, 0x19d9, 0xa438, 0xef64, 0xa438, 0xbf8a,
+ 0xa438, 0x341a, 0xa438, 0x921a, 0xa438, 0x92d8, 0xa438, 0x19d9,
+ 0xa438, 0xef74, 0xa438, 0x0273, 0xa438, 0x78a2, 0xa438, 0x0005,
+ 0xa438, 0xbe8d, 0xa438, 0xceae, 0xa438, 0x13a2, 0xa438, 0x0105,
+ 0xa438, 0xbe8d, 0xa438, 0xd1ae, 0xa438, 0x0ba2, 0xa438, 0x0205,
+ 0xa438, 0xbe8d, 0xa438, 0xd4ae, 0xa438, 0x03be, 0xa438, 0x8dd7,
+ 0xa438, 0xad50, 0xa438, 0x17bf, 0xa438, 0x8a45, 0xa438, 0x1a92,
+ 0xa438, 0x0702, 0xa438, 0x6bef, 0xa438, 0x07dd, 0xa438, 0xef46,
+ 0xa438, 0xbf8a, 0xa438, 0x341a, 0xa438, 0x921a, 0xa438, 0x92dc,
+ 0xa438, 0x19dd, 0xa438, 0xffc7, 0xa438, 0xffef, 0xa438, 0x97ff,
+ 0xa438, 0xfefc, 0xa438, 0x04ee, 0xa438, 0x8a33, 0xa438, 0x00ee,
+ 0xa438, 0x8a32, 0xa438, 0x0404, 0xa438, 0xf8fa, 0xa438, 0xef69,
+ 0xa438, 0xe080, 0xa438, 0x13ad, 0xa438, 0x2624, 0xa438, 0xd102,
+ 0xa438, 0xbf8d, 0xa438, 0xce02, 0xa438, 0x6bd0, 0xa438, 0xd10a,
+ 0xa438, 0xbf8d, 0xa438, 0xd102, 0xa438, 0x6bd0, 0xa438, 0xd116,
+ 0xa438, 0xbf8d, 0xa438, 0xd402, 0xa438, 0x6bd0, 0xa438, 0xd11e,
+ 0xa438, 0xbf8d, 0xa438, 0xd702, 0xa438, 0x6bd0, 0xa438, 0xee8a,
+ 0xa438, 0x3300, 0xa438, 0xef96, 0xa438, 0xfefc, 0xa438, 0x04f8,
+ 0xa438, 0xfae0, 0xa438, 0x855c, 0xa438, 0xe185, 0xa438, 0x5def,
+ 0xa438, 0x64d0, 0xa438, 0x00e1, 0xa438, 0x8a32, 0xa438, 0xef74,
+ 0xa438, 0x0273, 0xa438, 0xc6fe, 0xa438, 0xfc04, 0xa438, 0xf0b2,
+ 0xa438, 0x02f0, 0xa438, 0xb282, 0xa438, 0xf0b3, 0xa438, 0x02f0,
+ 0xa438, 0xb382, 0xa438, 0x50ac, 0xa438, 0xd450, 0xa438, 0xacd6,
+ 0xa438, 0xb6ac, 0xa438, 0xd4b6, 0xa438, 0xacd6, 0xa438, 0xbf8e,
+ 0xa438, 0x0d02, 0xa438, 0x6bd0, 0xa438, 0xd0ff, 0xa438, 0xd1fe,
+ 0xa438, 0xbf8e, 0xa438, 0x1002, 0xa438, 0x6bd0, 0xa438, 0xd004,
+ 0xa438, 0xd14d, 0xa438, 0xbf8e, 0xa438, 0x1302, 0xa438, 0x6bd0,
+ 0xa438, 0xd0fc, 0xa438, 0xd1c6, 0xa438, 0xbf8e, 0xa438, 0x1602,
+ 0xa438, 0x6bd0, 0xa438, 0xd009, 0xa438, 0xd146, 0xa438, 0xbf8e,
+ 0xa438, 0x1902, 0xa438, 0x6bd0, 0xa438, 0xef13, 0xa438, 0xaf2d,
+ 0xa438, 0xbdf0, 0xa438, 0xac1c, 0xa438, 0xf0ac, 0xa438, 0x2af0,
+ 0xa438, 0xac2c, 0xa438, 0xf0ac, 0xa438, 0x2ef0, 0xa438, 0xac30,
+ 0xa438, 0xbf8e, 0xa438, 0xf102, 0xa438, 0x6bef, 0xa438, 0xac28,
+ 0xa438, 0x70bf, 0xa438, 0x8eeb, 0xa438, 0x026b, 0xa438, 0xefac,
+ 0xa438, 0x2867, 0xa438, 0xbf8e, 0xa438, 0xee02, 0xa438, 0x6bef,
+ 0xa438, 0xad28, 0xa438, 0x5bbf, 0xa438, 0x8ff2, 0xa438, 0xd8bf,
+ 0xa438, 0x8ff3, 0xa438, 0xd9bf, 0xa438, 0x8ef4, 0xa438, 0x026b,
+ 0xa438, 0xd0bf, 0xa438, 0x8ff0, 0xa438, 0xd8bf, 0xa438, 0x8ff1,
+ 0xa438, 0xd9bf, 0xa438, 0x8ef7, 0xa438, 0x026b, 0xa438, 0xd0bf,
+ 0xa438, 0x8fee, 0xa438, 0xd8bf, 0xa438, 0x8fef, 0xa438, 0xd9bf,
+ 0xa438, 0x8efa, 0xa438, 0x026b, 0xa438, 0xd0bf, 0xa438, 0x8fec,
+ 0xa438, 0xd8bf, 0xa438, 0x8fed, 0xa438, 0xd9bf, 0xa438, 0x8efd,
+ 0xa438, 0x026b, 0xa438, 0xd0bf, 0xa438, 0x8fea, 0xa438, 0xd8bf,
+ 0xa438, 0x8feb, 0xa438, 0xd9bf, 0xa438, 0x8f00, 0xa438, 0x026b,
+ 0xa438, 0xd0bf, 0xa438, 0x8fe8, 0xa438, 0xd8bf, 0xa438, 0x8fe9,
+ 0xa438, 0xd9bf, 0xa438, 0x8e0d, 0xa438, 0x026b, 0xa438, 0xd01f,
+ 0xa438, 0x00e1, 0xa438, 0x86ee, 0xa438, 0x1b64, 0xa438, 0xaf3d,
+ 0xa438, 0x7abf, 0xa438, 0x8ffe, 0xa438, 0xd8bf, 0xa438, 0x8fff,
+ 0xa438, 0xd9bf, 0xa438, 0x8ef4, 0xa438, 0x026b, 0xa438, 0xd0bf,
+ 0xa438, 0x8ffc, 0xa438, 0xd8bf, 0xa438, 0x8ffd, 0xa438, 0xd9bf,
+ 0xa438, 0x8ef7, 0xa438, 0x026b, 0xa438, 0xd0bf, 0xa438, 0x8ffa,
+ 0xa438, 0xd8bf, 0xa438, 0x8ffb, 0xa438, 0xd9bf, 0xa438, 0x8efa,
+ 0xa438, 0x026b, 0xa438, 0xd0bf, 0xa438, 0x8ff8, 0xa438, 0xd8bf,
+ 0xa438, 0x8ff9, 0xa438, 0xd9bf, 0xa438, 0x8efd, 0xa438, 0x026b,
+ 0xa438, 0xd0bf, 0xa438, 0x8ff6, 0xa438, 0xd8bf, 0xa438, 0x8ff7,
+ 0xa438, 0xd9bf, 0xa438, 0x8f00, 0xa438, 0x026b, 0xa438, 0xd0bf,
+ 0xa438, 0x8ff4, 0xa438, 0xd8bf, 0xa438, 0x8ff5, 0xa438, 0xd9bf,
+ 0xa438, 0x8e0d, 0xa438, 0x026b, 0xa438, 0xd0ae, 0xa438, 0xa766,
+ 0xa438, 0xac5c, 0xa438, 0xbbac, 0xa438, 0x5c99, 0xa438, 0xac5c,
+ 0xa438, 0xf0ac, 0xa438, 0x26f0, 0xa438, 0xac24, 0xa438, 0xf0ac,
+ 0xa438, 0x22f0, 0xa438, 0xac20, 0xa438, 0xf0ac, 0xa438, 0x1eaf,
+ 0xa438, 0x44f8, 0xa436, 0xb85e, 0xa438, 0x2344, 0xa436, 0xb860,
+ 0xa438, 0x2254, 0xa436, 0xb862, 0xa438, 0x2DB5, 0xa436, 0xb864,
+ 0xa438, 0x3D6C, 0xa436, 0xb886, 0xa438, 0x44ED, 0xa436, 0xb888,
+ 0xa438, 0xffff, 0xa436, 0xb88a, 0xa438, 0xffff, 0xa436, 0xb88c,
+ 0xa438, 0xffff, 0xa436, 0xb838, 0xa438, 0x001f, 0xb820, 0x0010,
+ 0xa436, 0x87ad, 0xa438, 0xaf87, 0xa438, 0xc5af, 0xa438, 0x87e4,
+ 0xa438, 0xaf8a, 0xa438, 0x3daf, 0xa438, 0x8a62, 0xa438, 0xaf8a,
+ 0xa438, 0x62af, 0xa438, 0x8a62, 0xa438, 0xaf8a, 0xa438, 0x62af,
+ 0xa438, 0x8a62, 0xa438, 0x2810, 0xa438, 0x0d01, 0xa438, 0xe484,
+ 0xa438, 0xbf29, 0xa438, 0x100d, 0xa438, 0x11e5, 0xa438, 0x84c0,
+ 0xa438, 0x2a10, 0xa438, 0x0d21, 0xa438, 0xe684, 0xa438, 0xc12b,
+ 0xa438, 0x100d, 0xa438, 0x31e7, 0xa438, 0x84c2, 0xa438, 0xaf3f,
+ 0xa438, 0x7cf8, 0xa438, 0xe080, 0xa438, 0x4cac, 0xa438, 0x222c,
+ 0xa438, 0xe080, 0xa438, 0x40ad, 0xa438, 0x2232, 0xa438, 0xbf8a,
+ 0xa438, 0x2502, 0xa438, 0x6752, 0xa438, 0xad29, 0xa438, 0x0502,
+ 0xa438, 0x8827, 0xa438, 0xae0d, 0xa438, 0xad28, 0xa438, 0x0502,
+ 0xa438, 0x8961, 0xa438, 0xae05, 0xa438, 0x0214, 0xa438, 0x04ae,
+ 0xa438, 0x00e0, 0xa438, 0x8040, 0xa438, 0xac22, 0xa438, 0x1102,
+ 0xa438, 0x13e1, 0xa438, 0xae0c, 0xa438, 0x0288, 0xa438, 0x7c02,
+ 0xa438, 0x8a10, 0xa438, 0x0214, 0xa438, 0x2502, 0xa438, 0x1404,
+ 0xa438, 0xfcaf, 0xa438, 0x13c6, 0xa438, 0xf8f8, 0xa438, 0xccf9,
+ 0xa438, 0xfaef, 0xa438, 0x69fb, 0xa438, 0xe080, 0xa438, 0x18ad,
+ 0xa438, 0x223b, 0xa438, 0xbf8a, 0xa438, 0x2b02, 0xa438, 0x6752,
+ 0xa438, 0xad28, 0xa438, 0x32bf, 0xa438, 0x8a28, 0xa438, 0x026f,
+ 0xa438, 0x17ee, 0xa438, 0x8ff3, 0xa438, 0x00bf, 0xa438, 0x6854,
+ 0xa438, 0x0267, 0xa438, 0x52ad, 0xa438, 0x281f, 0xa438, 0xbf68,
+ 0xa438, 0x5d02, 0xa438, 0x6752, 0xa438, 0xad28, 0xa438, 0x16e0,
+ 0xa438, 0x8ff4, 0xa438, 0xe18f, 0xa438, 0xf502, 0xa438, 0x8891,
+ 0xa438, 0xad50, 0xa438, 0x0abf, 0xa438, 0x8a28, 0xa438, 0x026f,
+ 0xa438, 0x20ee, 0xa438, 0x8ff3, 0xa438, 0x0102, 0xa438, 0x1404,
+ 0xa438, 0xffef, 0xa438, 0x96fe, 0xa438, 0xfdc4, 0xa438, 0xfcfc,
+ 0xa438, 0x04f8, 0xa438, 0xf9ef, 0xa438, 0x59e0, 0xa438, 0x8018,
+ 0xa438, 0xad22, 0xa438, 0x06bf, 0xa438, 0x8a28, 0xa438, 0x026f,
+ 0xa438, 0x17ef, 0xa438, 0x95fd, 0xa438, 0xfc04, 0xa438, 0xf8f9,
+ 0xa438, 0xf9ef, 0xa438, 0x59fa, 0xa438, 0xface, 0xa438, 0xe48f,
+ 0xa438, 0xfee5, 0xa438, 0x8fff, 0xa438, 0xbf6e, 0xa438, 0x1b02,
+ 0xa438, 0x6f20, 0xa438, 0xbf6e, 0xa438, 0x1802, 0xa438, 0x6f17,
+ 0xa438, 0xd102, 0xa438, 0xbf6e, 0xa438, 0x1202, 0xa438, 0x6733,
+ 0xa438, 0xbf6e, 0xa438, 0x1502, 0xa438, 0x6f17, 0xa438, 0xbe00,
+ 0xa438, 0x00cc, 0xa438, 0xbf69, 0xa438, 0xcb02, 0xa438, 0x6733,
+ 0xa438, 0xbf69, 0xa438, 0xce02, 0xa438, 0x6f17, 0xa438, 0xbf69,
+ 0xa438, 0xce02, 0xa438, 0x6f20, 0xa438, 0xbf69, 0xa438, 0xd102,
+ 0xa438, 0x6752, 0xa438, 0xad28, 0xa438, 0xf70c, 0xa438, 0x81bf,
+ 0xa438, 0x8ff6, 0xa438, 0x1a98, 0xa438, 0xef59, 0xa438, 0xbf69,
+ 0xa438, 0xd402, 0xa438, 0x6752, 0xa438, 0xef95, 0xa438, 0xdc19,
+ 0xa438, 0xdd0d, 0xa438, 0x8118, 0xa438, 0xa800, 0xa438, 0x04c9,
+ 0xa438, 0xbf69, 0xa438, 0xce02, 0xa438, 0x6f17, 0xa438, 0xe08f,
+ 0xa438, 0xfce1, 0xa438, 0x8ffd, 0xa438, 0xef74, 0xa438, 0xe08f,
+ 0xa438, 0xfae1, 0xa438, 0x8ffb, 0xa438, 0xef64, 0xa438, 0x026e,
+ 0xa438, 0x57ad, 0xa438, 0x5008, 0xa438, 0xe08f, 0xa438, 0xfce1,
+ 0xa438, 0x8ffd, 0xa438, 0xae06, 0xa438, 0xe08f, 0xa438, 0xfae1,
+ 0xa438, 0x8ffb, 0xa438, 0xe28f, 0xa438, 0xf8e3, 0xa438, 0x8ff9,
+ 0xa438, 0xef75, 0xa438, 0xe28f, 0xa438, 0xf6e3, 0xa438, 0x8ff7,
+ 0xa438, 0xef65, 0xa438, 0x026e, 0xa438, 0x57ad, 0xa438, 0x5008,
+ 0xa438, 0xe28f, 0xa438, 0xf8e3, 0xa438, 0x8ff9, 0xa438, 0xae06,
+ 0xa438, 0xe28f, 0xa438, 0xf6e3, 0xa438, 0x8ff7, 0xa438, 0x1b45,
+ 0xa438, 0xad27, 0xa438, 0x05d7, 0xa438, 0x0000, 0xa438, 0xae0d,
+ 0xa438, 0xef74, 0xa438, 0xe08f, 0xa438, 0xfee1, 0xa438, 0x8fff,
+ 0xa438, 0xef64, 0xa438, 0x026e, 0xa438, 0x57c6, 0xa438, 0xfefe,
+ 0xa438, 0xef95, 0xa438, 0xfdfd, 0xa438, 0xfc04, 0xa438, 0xf8f9,
+ 0xa438, 0xfaef, 0xa438, 0x69fb, 0xa438, 0xe080, 0xa438, 0x18ac,
+ 0xa438, 0x2103, 0xa438, 0xaf8a, 0xa438, 0x06bf, 0xa438, 0x8a2b,
+ 0xa438, 0xac21, 0xa438, 0x03af, 0xa438, 0x8a06, 0xa438, 0xbf8a,
+ 0xa438, 0x2802, 0xa438, 0x6f17, 0xa438, 0xee8f, 0xa438, 0xee00,
+ 0xa438, 0xee8f, 0xa438, 0xed00, 0xa438, 0xbf8a, 0xa438, 0x2e02,
+ 0xa438, 0x6752, 0xa438, 0xad28, 0xa438, 0x03af, 0xa438, 0x8a06,
+ 0xa438, 0xe28f, 0xa438, 0xefe3, 0xa438, 0x8ff0, 0xa438, 0xbf68,
+ 0xa438, 0x5102, 0xa438, 0x6752, 0xa438, 0xac28, 0xa438, 0x11e2,
+ 0xa438, 0x8ff1, 0xa438, 0xe38f, 0xa438, 0xf2bf, 0xa438, 0x6848,
+ 0xa438, 0x0267, 0xa438, 0x52ac, 0xa438, 0x2802, 0xa438, 0xae53,
+ 0xa438, 0xbf68, 0xa438, 0x5a02, 0xa438, 0x6752, 0xa438, 0xad28,
+ 0xa438, 0x0aef, 0xa438, 0x4502, 0xa438, 0x8891, 0xa438, 0xac50,
+ 0xa438, 0x38ae, 0xa438, 0x40bf, 0xa438, 0x8a31, 0xa438, 0x0267,
+ 0xa438, 0x52ef, 0xa438, 0x31bf, 0xa438, 0x8a34, 0xa438, 0x0267,
+ 0xa438, 0x520c, 0xa438, 0x311e, 0xa438, 0x31bf, 0xa438, 0x8a37,
+ 0xa438, 0x0267, 0xa438, 0x520c, 0xa438, 0x311e, 0xa438, 0x31bf,
+ 0xa438, 0x8a3a, 0xa438, 0x0267, 0xa438, 0x520c, 0xa438, 0x311e,
+ 0xa438, 0x31e7, 0xa438, 0x8fee, 0xa438, 0xa30c, 0xa438, 0x02ae,
+ 0xa438, 0x08a3, 0xa438, 0x0e02, 0xa438, 0xae03, 0xa438, 0xa30d,
+ 0xa438, 0x0aee, 0xa438, 0x8fed, 0xa438, 0x01bf, 0xa438, 0x8a28,
+ 0xa438, 0x026f, 0xa438, 0x2002, 0xa438, 0x1404, 0xa438, 0xffef,
+ 0xa438, 0x96fe, 0xa438, 0xfdfc, 0xa438, 0x04f8, 0xa438, 0xfaef,
+ 0xa438, 0x69e0, 0xa438, 0x8018, 0xa438, 0xad21, 0xa438, 0x06bf,
+ 0xa438, 0x8a28, 0xa438, 0x026f, 0xa438, 0x17ef, 0xa438, 0x96fe,
+ 0xa438, 0xfc04, 0xa438, 0xf8a4, 0xa438, 0xb677, 0xa438, 0xa4b6,
+ 0xa438, 0x22a4, 0xa438, 0x4222, 0xa438, 0xa668, 0xa438, 0x00b2,
+ 0xa438, 0x3e00, 0xa438, 0xb2be, 0xa438, 0x00b3, 0xa438, 0x3e00,
+ 0xa438, 0xb3be, 0xa438, 0xd10f, 0xa438, 0xbf8a, 0xa438, 0x5c02,
+ 0xa438, 0x6733, 0xa438, 0xbf8a, 0xa438, 0x5f02, 0xa438, 0x6733,
+ 0xa438, 0xbf8a, 0xa438, 0x5c02, 0xa438, 0x6f17, 0xa438, 0xbf8a,
+ 0xa438, 0x5f02, 0xa438, 0x6f17, 0xa438, 0x1f00, 0xa438, 0xaf3d,
+ 0xa438, 0x0c30, 0xa438, 0xa85a, 0xa438, 0xfcad, 0xa438, 0x0e00,
+ 0xa436, 0xb818, 0xa438, 0x3f31, 0xa436, 0xb81a, 0xa438, 0x13a4,
+ 0xa436, 0xb81c, 0xa438, 0x3d0a, 0xa436, 0xb81e, 0xa438, 0xffff,
+ 0xa436, 0xb850, 0xa438, 0xffff, 0xa436, 0xb852, 0xa438, 0xffff,
+ 0xa436, 0xb878, 0xa438, 0xffff, 0xa436, 0xb884, 0xa438, 0xffff,
+ 0xa436, 0xb832, 0xa438, 0x0007, 0xa436, 0x84cf, 0xa438, 0x0101,
+ 0xa466, 0x0002, 0xa436, 0x86a7, 0xa438, 0x0000, 0xa436, 0x0000,
+ 0xa438, 0x0000, 0xa436, 0xB82E, 0xa438, 0x0000, 0xa436, 0x8023,
+ 0xa438, 0x0000, 0xa436, 0x801E, 0xa438, 0x0023, 0xb820, 0x0000,
+ 0xFFFF, 0xFFFF
+};
+
+static const u16 phy_mcu_ram_code_8126a_1_2[] = {
+ 0xB87C, 0x8a32, 0xB87E, 0x0400, 0xB87C, 0x8376, 0xB87E, 0x0300,
+ 0xce00, 0x6CAF, 0xB87C, 0x8301, 0xB87E, 0x1133, 0xB87C, 0x8105,
+ 0xB87E, 0xa000, 0xB87C, 0x8148, 0xB87E, 0xa000, 0xa436, 0x81d8,
+ 0xa438, 0x5865, 0xacf8, 0xCCC0, 0xac90, 0x52B0, 0xad2C, 0x8000,
+ 0xB87C, 0x83e6, 0xB87E, 0x4A0E, 0xB87C, 0x83d2, 0xB87E, 0x0A0E,
+ 0xB87C, 0x80a0, 0xB87E, 0xB8B6, 0xB87C, 0x805e, 0xB87E, 0xB8B6,
+ 0xB87C, 0x8057, 0xB87E, 0x305A, 0xB87C, 0x8099, 0xB87E, 0x305A,
+ 0xB87C, 0x8052, 0xB87E, 0x3333, 0xB87C, 0x8094, 0xB87E, 0x3333,
+ 0xB87C, 0x807F, 0xB87E, 0x7975, 0xB87C, 0x803D, 0xB87E, 0x7975,
+ 0xB87C, 0x8036, 0xB87E, 0x305A, 0xB87C, 0x8078, 0xB87E, 0x305A,
+ 0xB87C, 0x8031, 0xB87E, 0x3335, 0xB87C, 0x8073, 0xB87E, 0x3335,
+ 0xa436, 0x81D8, 0xa438, 0x5865, 0xB87C, 0x867c, 0xB87E, 0x0617,
+ 0xad94, 0x0092, 0xB87C, 0x89B1, 0xB87E, 0x5050, 0xB87C, 0x86E0,
+ 0xB87E, 0x809A, 0xB87C, 0x86E2, 0xB87E, 0xB34D, 0xB87C, 0x8FD2,
+ 0xB87E, 0x004B, 0xB87C, 0x8691, 0xB87E, 0x007D, 0xB87E, 0x00AF,
+ 0xB87E, 0x00E1, 0xB87E, 0x00FF, 0xB87C, 0x867F, 0xB87E, 0x0201,
+ 0xB87E, 0x0201, 0xB87E, 0x0201, 0xB87E, 0x0201, 0xB87E, 0x0201,
+ 0xB87E, 0x0201, 0xB87C, 0x86DA, 0xB87E, 0xCDCD, 0xB87E, 0xE6CD,
+ 0xB87E, 0xCDCD, 0xB87C, 0x8FE8, 0xB87E, 0x0368, 0xB87E, 0x033F,
+ 0xB87E, 0x1046, 0xB87E, 0x147D, 0xB87E, 0x147D, 0xB87E, 0x147D,
+ 0xB87E, 0x0368, 0xB87E, 0x033F, 0xB87E, 0x1046, 0xB87E, 0x147D,
+ 0xB87E, 0x147D, 0xB87E, 0x147D, 0xa436, 0x80dd, 0xa438, 0xf0AB,
+ 0xa436, 0x80df, 0xa438, 0xC009, 0xa436, 0x80e7, 0xa438, 0x401E,
+ 0xa436, 0x80e1, 0xa438, 0x120A, 0xa436, 0x86f2, 0xa438, 0x5094,
+ 0xa436, 0x8701, 0xa438, 0x5094, 0xa436, 0x80f1, 0xa438, 0x30CC,
+ 0xa436, 0x80f3, 0xa438, 0x0001, 0xa436, 0x80f5, 0xa438, 0x330B,
+ 0xa436, 0x80f8, 0xa438, 0xCB76, 0xa436, 0x8105, 0xa438, 0xf0D3,
+ 0xa436, 0x8107, 0xa438, 0x0002, 0xa436, 0x8109, 0xa438, 0xff0B,
+ 0xa436, 0x810c, 0xa438, 0xC86D, 0xB87C, 0x8a32, 0xB87E, 0x0400,
+ 0xa6f8, 0x0000, 0xa6f8, 0x0000, 0xa436, 0x81bc, 0xa438, 0x1300,
+ 0xa846, 0x2410, 0xa86A, 0x0801, 0xa85C, 0x9680, 0xa436, 0x841D,
+ 0xa438, 0x4A28, 0xa436, 0x8016, 0xa438, 0xBE05, 0xBF9C, 0x004A,
+ 0xBF96, 0x41FA, 0xBF9A, 0xDC81, 0xa436, 0x8018, 0xa438, 0x0700,
+ 0xa436, 0x8ff4, 0xa438, 0x01AE, 0xa436, 0x8fef, 0xa438, 0x0172,
+ 0xa438, 0x00dc, 0xc842, 0x0002, 0xFFFF, 0xFFFF
+};
+
+static const u16 phy_mcu_ram_code_8126a_1_3[] = {
+ 0xb892, 0x0000, 0xB88E, 0xC236, 0xB890, 0x1A1C, 0xB88E, 0xC238,
+ 0xB890, 0x1C1C, 0xB890, 0x1C1C, 0xB890, 0x2D2D, 0xB890, 0x2D2D,
+ 0xB890, 0x2D2A, 0xB890, 0x2A2A, 0xB890, 0x2A2A, 0xB890, 0x2A19,
+ 0xB88E, 0xC272, 0xB890, 0x8484, 0xB890, 0x8484, 0xB890, 0x84B4,
+ 0xB890, 0xB4B4, 0xB890, 0xB4B4, 0xB890, 0xF8F8, 0xB890, 0xF8F8,
+ 0xB890, 0xF8F8, 0xB88E, 0xC000, 0xB890, 0x0303, 0xB890, 0x0405,
+ 0xB890, 0x0608, 0xB890, 0x0A0B, 0xB890, 0x0E11, 0xB890, 0x1519,
+ 0xB890, 0x2028, 0xB890, 0x3503, 0xB890, 0x0304, 0xB890, 0x0405,
+ 0xB890, 0x0606, 0xB890, 0x0708, 0xB890, 0x090A, 0xB890, 0x0B0D,
+ 0xB890, 0x0F11, 0xB890, 0x1315, 0xB890, 0x181A, 0xB890, 0x2029,
+ 0xB890, 0x2F36, 0xB890, 0x3D43, 0xB890, 0x0101, 0xB890, 0x0102,
+ 0xB890, 0x0202, 0xB890, 0x0303, 0xB890, 0x0405, 0xB890, 0x0607,
+ 0xB890, 0x090A, 0xB890, 0x0C0E, 0xB88E, 0xC038, 0xB890, 0x6AE1,
+ 0xB890, 0x8E6B, 0xB890, 0xA767, 0xB890, 0x01EF, 0xB890, 0x5A63,
+ 0xB890, 0x2B99, 0xB890, 0x7F5D, 0xB890, 0x361F, 0xB890, 0xA127,
+ 0xB890, 0xB558, 0xB890, 0x11C3, 0xB890, 0x7D85, 0xB890, 0xBAC5,
+ 0xB890, 0xE691, 0xB890, 0x8F79, 0xB890, 0x3164, 0xB890, 0x3293,
+ 0xB890, 0xB80D, 0xB890, 0xE2B7, 0xB890, 0x0D62, 0xB890, 0x4F85,
+ 0xB890, 0xC919, 0xB890, 0x78F3, 0xB890, 0x77FF, 0xB890, 0xBD9E,
+ 0xB890, 0x69D6, 0xB890, 0x6DA4, 0xB890, 0x0CC5, 0xB88E, 0xC1D2,
+ 0xB890, 0x2425, 0xB890, 0x2627, 0xB890, 0x2829, 0xB890, 0x2A2B,
+ 0xB890, 0x2C2D, 0xB890, 0x2E2F, 0xB890, 0x3031, 0xB890, 0x3233,
+ 0xB890, 0x2323, 0xB890, 0x2424, 0xB890, 0x2525, 0xB890, 0x2626,
+ 0xB890, 0x2727, 0xB890, 0x2828, 0xB890, 0x2929, 0xB890, 0x2A2A,
+ 0xB890, 0x2B2C, 0xB890, 0x2C2D, 0xB890, 0x2D2E, 0xB890, 0x2E2F,
+ 0xB890, 0x2F30, 0xB890, 0x1A1B, 0xB890, 0x1D1E, 0xB890, 0x1F20,
+ 0xB890, 0x2123, 0xB890, 0x2425, 0xB890, 0x2628, 0xB890, 0x292A,
+ 0xB890, 0x2B2C, 0xB890, 0x2E12, 0xB88E, 0xC09A, 0xB890, 0xD3D3,
+ 0xB890, 0xD3D3, 0xB890, 0xD3D3, 0xB890, 0xD3D3, 0xB890, 0xD3D3,
+ 0xB890, 0xD3D3, 0xB890, 0xD3D3, 0xB890, 0xD3D3, 0xFFFF, 0xFFFF
+};
+
+static void
+rtl8125_real_set_phy_mcu_8125b_1(struct net_device *dev)
+{
+ rtl8125_set_phy_mcu_ram_code(dev,
+ phy_mcu_ram_code_8125b_1,
+ ARRAY_SIZE(phy_mcu_ram_code_8125b_1)
+ );
+}
+
static void
-rtl8125_init_hw_phy_mcu(struct net_device *dev)
+rtl8125_set_phy_mcu_8125b_1(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- u8 require_disable_phy_disable_mode = FALSE;
- if (tp->NotWrRamCodeToMicroP == TRUE) return;
- if (rtl8125_check_hw_phy_mcu_code_ver(dev)) return;
+ rtl8125_set_phy_mcu_patch_request(tp);
- if (HW_SUPPORT_CHECK_PHY_DISABLE_MODE(tp) && rtl8125_is_in_phy_disable_mode(dev))
- require_disable_phy_disable_mode = TRUE;
+ rtl8125_real_set_phy_mcu_8125b_1(dev);
- if (require_disable_phy_disable_mode)
+ rtl8125_clear_phy_mcu_patch_request(tp);
+}
+
+static void
+rtl8125_real_set_phy_mcu_8125b_2(struct net_device *dev)
+{
+ rtl8125_set_phy_mcu_ram_code(dev,
+ phy_mcu_ram_code_8125b_2,
+ ARRAY_SIZE(phy_mcu_ram_code_8125b_2)
+ );
+}
+
+static void
+rtl8125_set_phy_mcu_8125b_2(struct net_device *dev)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+
+ rtl8125_set_phy_mcu_patch_request(tp);
+
+ rtl8125_real_set_phy_mcu_8125b_2(dev);
+
+ rtl8125_clear_phy_mcu_patch_request(tp);
+}
+
+static void
+rtl8125_real_set_phy_mcu_8126a_1_1(struct net_device *dev)
+{
+ rtl8125_set_phy_mcu_ram_code(dev,
+ phy_mcu_ram_code_8126a_1_1,
+ ARRAY_SIZE(phy_mcu_ram_code_8126a_1_1)
+ );
+}
+
+static void
+rtl8125_real_set_phy_mcu_8126a_1_2(struct net_device *dev)
+{
+ rtl8125_set_phy_mcu_ram_code(dev,
+ phy_mcu_ram_code_8126a_1_2,
+ ARRAY_SIZE(phy_mcu_ram_code_8126a_1_2)
+ );
+}
+
+static void
+rtl8125_real_set_phy_mcu_8126a_1_3(struct net_device *dev)
+{
+ rtl8125_set_phy_mcu_ram_code(dev,
+ phy_mcu_ram_code_8126a_1_3,
+ ARRAY_SIZE(phy_mcu_ram_code_8126a_1_3)
+ );
+}
+
+static void
+rtl8125_set_phy_mcu_8126a_1(struct net_device *dev)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+
+ rtl8125_set_phy_mcu_patch_request(tp);
+
+ rtl8125_real_set_phy_mcu_8126a_1_1(dev);
+
+ rtl8125_clear_phy_mcu_patch_request(tp);
+
+ rtl8125_set_phy_mcu_patch_request(tp);
+
+ rtl8125_real_set_phy_mcu_8126a_1_2(dev);
+
+ rtl8125_clear_phy_mcu_patch_request(tp);
+
+ rtl8125_set_phy_mcu_patch_request(tp);
+
+ rtl8125_real_set_phy_mcu_8126a_1_3(dev);
+
+ rtl8125_clear_phy_mcu_patch_request(tp);
+}
+
+static void
+rtl8125_init_hw_phy_mcu(struct net_device *dev)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+ u8 require_disable_phy_disable_mode = FALSE;
+
+ if (tp->NotWrRamCodeToMicroP == TRUE) return;
+ if (rtl8125_check_hw_phy_mcu_code_ver(dev)) return;
+
+ if (HW_SUPPORT_CHECK_PHY_DISABLE_MODE(tp) && rtl8125_is_in_phy_disable_mode(dev))
+ require_disable_phy_disable_mode = TRUE;
+
+ if (require_disable_phy_disable_mode)
rtl8125_disable_phy_disable_mode(dev);
switch (tp->mcfg) {
case CFG_METHOD_2:
- rtl8125_set_phy_mcu_8125_2(dev);
+ rtl8125_set_phy_mcu_8125a_1(dev);
break;
case CFG_METHOD_3:
- rtl8125_set_phy_mcu_8125_3(dev);
+ case CFG_METHOD_6:
+ rtl8125_set_phy_mcu_8125a_2(dev);
+ break;
+ case CFG_METHOD_4:
+ rtl8125_set_phy_mcu_8125b_1(dev);
+ break;
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
+ rtl8125_set_phy_mcu_8125b_2(dev);
+ break;
+ case CFG_METHOD_8:
+ rtl8125_set_phy_mcu_8126a_1(dev);
break;
}
@@ -6566,353 +10341,1002 @@ rtl8125_init_hw_phy_mcu(struct net_device *dev)
tp->HwHasWrRamCodeToMicroP = TRUE;
}
+#endif
static void
-rtl8125_hw_phy_config(struct net_device *dev)
+rtl8125_enable_phy_aldps(struct rtl8125_private *tp)
+{
+ //enable aldps
+ //GPHY OCP 0xA430 bit[2] = 0x1 (en_aldps)
+ SetEthPhyOcpBit(tp, 0xA430, BIT_2);
+}
+
+static void
+rtl8125_hw_phy_config_8125a_1(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- tp->phy_reset_enable(dev);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xAD40,
+ 0x03FF,
+ 0x84
+ );
- if (HW_DASH_SUPPORT_TYPE_3(tp) && tp->HwPkgDet == 0x06) return;
+ SetEthPhyOcpBit(tp, 0xAD4E, BIT_4);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xAD16,
+ 0x03FF,
+ 0x0006
+ );
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xAD32,
+ 0x003F,
+ 0x0006
+ );
+ ClearEthPhyOcpBit(tp, 0xAC08, BIT_12);
+ ClearEthPhyOcpBit(tp, 0xAC08, BIT_8);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xAC8A,
+ BIT_15|BIT_14|BIT_13|BIT_12,
+ BIT_14|BIT_13|BIT_12
+ );
+ SetEthPhyOcpBit(tp, 0xAD18, BIT_10);
+ SetEthPhyOcpBit(tp, 0xAD1A, 0x3FF);
+ SetEthPhyOcpBit(tp, 0xAD1C, 0x3FF);
- rtl8125_init_hw_phy_mcu(dev);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80EA);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ 0xFF00,
+ 0xC400
+ );
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80EB);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ 0x0700,
+ 0x0300
+ );
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80F8);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ 0xFF00,
+ 0x1C00
+ );
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80F1);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ 0xFF00,
+ 0x3000
+ );
- if (tp->mcfg == CFG_METHOD_2) {
- ClearAndSetEthPhyOcpBit(tp,
- 0xAD40,
- 0x03FF,
- 0x84
- );
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80FE);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ 0xFF00,
+ 0xA500
+ );
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x8102);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ 0xFF00,
+ 0x5000
+ );
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x8105);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ 0xFF00,
+ 0x3300
+ );
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x8100);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ 0xFF00,
+ 0x7000
+ );
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x8104);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ 0xFF00,
+ 0xF000
+ );
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x8106);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ 0xFF00,
+ 0x6500
+ );
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80DC);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ 0xFF00,
+ 0xED00
+ );
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80DF);
+ SetEthPhyOcpBit(tp, 0xA438, BIT_8);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80E1);
+ ClearEthPhyOcpBit(tp, 0xA438, BIT_8);
+
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xBF06,
+ 0x003F,
+ 0x38
+ );
+
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x819F);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0xD0B6);
+
+ mdio_direct_write_phy_ocp(tp, 0xBC34, 0x5555);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xBF0A,
+ BIT_11|BIT_10|BIT_9,
+ BIT_11|BIT_9
+ );
+
+ ClearEthPhyOcpBit(tp, 0xA5C0, BIT_10);
+
+ SetEthPhyOcpBit(tp, 0xA442, BIT_11);
+
+ //enable aldps
+ //GPHY OCP 0xA430 bit[2] = 0x1 (en_aldps)
+ if (aspm) {
+ if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+ rtl8125_enable_phy_aldps(tp);
+ }
+ }
+}
+
+static void
+rtl8125_hw_phy_config_8125a_2(struct net_device *dev)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+
+ SetEthPhyOcpBit(tp, 0xAD4E, BIT_4);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xAD16,
+ 0x03FF,
+ 0x03FF
+ );
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xAD32,
+ 0x003F,
+ 0x0006
+ );
+ ClearEthPhyOcpBit(tp, 0xAC08, BIT_12);
+ ClearEthPhyOcpBit(tp, 0xAC08, BIT_8);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xACC0,
+ BIT_1|BIT_0,
+ BIT_1
+ );
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xAD40,
+ BIT_7|BIT_6|BIT_5,
+ BIT_6
+ );
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xAD40,
+ BIT_2|BIT_1|BIT_0,
+ BIT_2
+ );
+ ClearEthPhyOcpBit(tp, 0xAC14, BIT_7);
+ ClearEthPhyOcpBit(tp, 0xAC80, BIT_9|BIT_8);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xAC5E,
+ BIT_2|BIT_1|BIT_0,
+ BIT_1
+ );
+ mdio_direct_write_phy_ocp(tp, 0xAD4C, 0x00A8);
+ mdio_direct_write_phy_ocp(tp, 0xAC5C, 0x01FF);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xAC8A,
+ BIT_7|BIT_6|BIT_5|BIT_4,
+ BIT_5|BIT_4
+ );
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8157);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xB87E,
+ 0xFF00,
+ 0x0500
+ );
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8159);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xB87E,
+ 0xFF00,
+ 0x0700
+ );
+
+
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x80A2);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0153);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x809C);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0153);
+
+
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x81B3);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0043);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x00A7);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x00D6);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x00EC);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x00F6);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x00FB);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x00FD);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x00FF);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x00BB);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0058);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0029);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0013);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0009);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0004);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0002);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+
+
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x8257);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x020F);
+
+
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80EA);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x7843);
+
+
+ rtl8125_set_phy_mcu_patch_request(tp);
+
+ ClearEthPhyOcpBit(tp, 0xB896, BIT_0);
+ ClearEthPhyOcpBit(tp, 0xB892, 0xFF00);
+
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC091);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x6E12);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC092);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x1214);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC094);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x1516);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC096);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x171B);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC098);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x1B1C);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC09A);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x1F1F);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC09C);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x2021);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC09E);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x2224);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC0A0);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x2424);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC0A2);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x2424);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC0A4);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x2424);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC018);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x0AF2);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC01A);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x0D4A);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC01C);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x0F26);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC01E);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x118D);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC020);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x14F3);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC022);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x175A);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC024);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x19C0);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC026);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x1C26);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC089);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x6050);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC08A);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x5F6E);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC08C);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x6E6E);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC08E);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x6E6E);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC090);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x6E12);
+
+ SetEthPhyOcpBit(tp, 0xB896, BIT_0);
+
+ rtl8125_clear_phy_mcu_patch_request(tp);
+
+
+ SetEthPhyOcpBit(tp, 0xD068, BIT_13);
+
+
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x81A2);
+ SetEthPhyOcpBit(tp, 0xA438, BIT_8);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xB54C,
+ 0xFF00,
+ 0xDB00);
+
+
+ ClearEthPhyOcpBit(tp, 0xA454, BIT_0);
+
+
+ SetEthPhyOcpBit(tp, 0xA5D4, BIT_5);
+ ClearEthPhyOcpBit(tp, 0xAD4E, BIT_4);
+ ClearEthPhyOcpBit(tp, 0xA86A, BIT_0);
+
+
+ SetEthPhyOcpBit(tp, 0xA442, BIT_11);
+
+
+ if (tp->RequirePhyMdiSwapPatch) {
+ u16 adccal_offset_p0;
+ u16 adccal_offset_p1;
+ u16 adccal_offset_p2;
+ u16 adccal_offset_p3;
+ u16 rg_lpf_cap_xg_p0;
+ u16 rg_lpf_cap_xg_p1;
+ u16 rg_lpf_cap_xg_p2;
+ u16 rg_lpf_cap_xg_p3;
+ u16 rg_lpf_cap_p0;
+ u16 rg_lpf_cap_p1;
+ u16 rg_lpf_cap_p2;
+ u16 rg_lpf_cap_p3;
- SetEthPhyOcpBit(tp, 0xAD4E, BIT_4);
- ClearAndSetEthPhyOcpBit(tp,
- 0xAD16,
- 0x03FF,
- 0x0006
- );
- ClearAndSetEthPhyOcpBit(tp,
- 0xAD32,
- 0x003F,
- 0x0006
- );
- ClearEthPhyOcpBit(tp, 0xAC08, BIT_12);
- ClearEthPhyOcpBit(tp, 0xAC08, BIT_8);
ClearAndSetEthPhyOcpBit(tp,
- 0xAC8A,
- BIT_15|BIT_14|BIT_13|BIT_12,
- BIT_14|BIT_13|BIT_12
+ 0xD068,
+ 0x0007,
+ 0x0001
);
- SetEthPhyOcpBit(tp, 0xAD18, BIT_10);
- SetEthPhyOcpBit(tp, 0xAD1A, 0x3FF);
- SetEthPhyOcpBit(tp, 0xAD1C, 0x3FF);
-
- mdio_direct_write_phy_ocp(tp, 0xA436, 0x80EA);
ClearAndSetEthPhyOcpBit(tp,
- 0xA438,
- 0xFF00,
- 0xC400
+ 0xD068,
+ 0x0018,
+ 0x0000
);
- mdio_direct_write_phy_ocp(tp, 0xA436, 0x80EB);
+ adccal_offset_p0 = mdio_direct_read_phy_ocp(tp, 0xD06A);
+ adccal_offset_p0 &= 0x07FF;
ClearAndSetEthPhyOcpBit(tp,
- 0xA438,
- 0x0700,
- 0x0300
+ 0xD068,
+ 0x0018,
+ 0x0008
);
- mdio_direct_write_phy_ocp(tp, 0xA436, 0x80F8);
+ adccal_offset_p1 = mdio_direct_read_phy_ocp(tp, 0xD06A);
+ adccal_offset_p1 &= 0x07FF;
ClearAndSetEthPhyOcpBit(tp,
- 0xA438,
- 0xFF00,
- 0x1C00
+ 0xD068,
+ 0x0018,
+ 0x0010
);
- mdio_direct_write_phy_ocp(tp, 0xA436, 0x80F1);
+ adccal_offset_p2 = mdio_direct_read_phy_ocp(tp, 0xD06A);
+ adccal_offset_p2 &= 0x07FF;
ClearAndSetEthPhyOcpBit(tp,
- 0xA438,
- 0xFF00,
- 0x3000
+ 0xD068,
+ 0x0018,
+ 0x0018
);
+ adccal_offset_p3 = mdio_direct_read_phy_ocp(tp, 0xD06A);
+ adccal_offset_p3 &= 0x07FF;
+
- mdio_direct_write_phy_ocp(tp, 0xA436, 0x80FE);
ClearAndSetEthPhyOcpBit(tp,
- 0xA438,
- 0xFF00,
- 0xA500
+ 0xD068,
+ 0x0018,
+ 0x0000
);
- mdio_direct_write_phy_ocp(tp, 0xA436, 0x8102);
ClearAndSetEthPhyOcpBit(tp,
- 0xA438,
- 0xFF00,
- 0x5000
+ 0xD06A,
+ 0x07FF,
+ adccal_offset_p3
);
- mdio_direct_write_phy_ocp(tp, 0xA436, 0x8105);
ClearAndSetEthPhyOcpBit(tp,
- 0xA438,
- 0xFF00,
- 0x3300
+ 0xD068,
+ 0x0018,
+ 0x0008
);
- mdio_direct_write_phy_ocp(tp, 0xA436, 0x8100);
ClearAndSetEthPhyOcpBit(tp,
- 0xA438,
- 0xFF00,
- 0x7000
+ 0xD06A,
+ 0x07FF,
+ adccal_offset_p2
);
- mdio_direct_write_phy_ocp(tp, 0xA436, 0x8104);
ClearAndSetEthPhyOcpBit(tp,
- 0xA438,
- 0xFF00,
- 0xF000
+ 0xD068,
+ 0x0018,
+ 0x0010
);
- mdio_direct_write_phy_ocp(tp, 0xA436, 0x8106);
ClearAndSetEthPhyOcpBit(tp,
- 0xA438,
- 0xFF00,
- 0x6500
+ 0xD06A,
+ 0x07FF,
+ adccal_offset_p1
);
- mdio_direct_write_phy_ocp(tp, 0xA436, 0x80DC);
ClearAndSetEthPhyOcpBit(tp,
- 0xA438,
- 0xFF00,
- 0xED00
+ 0xD068,
+ 0x0018,
+ 0x0018
);
- mdio_direct_write_phy_ocp(tp, 0xA436, 0x80DF);
- SetEthPhyOcpBit(tp, 0xA438, BIT_8);
- mdio_direct_write_phy_ocp(tp, 0xA436, 0x80E1);
- ClearEthPhyOcpBit(tp, 0xA438, BIT_8);
-
ClearAndSetEthPhyOcpBit(tp,
- 0xBF06,
- 0x003F,
- 0x38
+ 0xD06A,
+ 0x07FF,
+ adccal_offset_p0
);
- mdio_direct_write_phy_ocp(tp, 0xA436, 0x819F);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0xD0B6);
- mdio_direct_write_phy_ocp(tp, 0xBC34, 0x5555);
- ClearAndSetEthPhyOcpBit(tp,
- 0xBF0A,
- BIT_11|BIT_10|BIT_9,
- BIT_11|BIT_9
- );
+ rg_lpf_cap_xg_p0 = mdio_direct_read_phy_ocp(tp, 0xBD5A);
+ rg_lpf_cap_xg_p0 &= 0x001F;
+ rg_lpf_cap_xg_p1 = mdio_direct_read_phy_ocp(tp, 0xBD5A);
+ rg_lpf_cap_xg_p1 &= 0x1F00;
+ rg_lpf_cap_xg_p2 = mdio_direct_read_phy_ocp(tp, 0xBD5C);
+ rg_lpf_cap_xg_p2 &= 0x001F;
+ rg_lpf_cap_xg_p3 = mdio_direct_read_phy_ocp(tp, 0xBD5C);
+ rg_lpf_cap_xg_p3 &= 0x1F00;
+ rg_lpf_cap_p0 = mdio_direct_read_phy_ocp(tp, 0xBC18);
+ rg_lpf_cap_p0 &= 0x001F;
+ rg_lpf_cap_p1 = mdio_direct_read_phy_ocp(tp, 0xBC18);
+ rg_lpf_cap_p1 &= 0x1F00;
+ rg_lpf_cap_p2 = mdio_direct_read_phy_ocp(tp, 0xBC1A);
+ rg_lpf_cap_p2 &= 0x001F;
+ rg_lpf_cap_p3 = mdio_direct_read_phy_ocp(tp, 0xBC1A);
+ rg_lpf_cap_p3 &= 0x1F00;
- ClearEthPhyOcpBit(tp, 0xA5C0, BIT_10);
- SetEthPhyOcpBit(tp, 0xA442, BIT_11);
-
- //enable aldps
- //GPHY OCP 0xA430 bit[2] = 0x1 (en_aldps)
- if (aspm) {
- if (tp->HwHasWrRamCodeToMicroP == TRUE) {
- SetEthPhyOcpBit(tp, 0xA430, BIT_2);
- }
- }
- } else if (tp->mcfg == CFG_METHOD_3) {
- SetEthPhyOcpBit(tp, 0xAD4E, BIT_4);
ClearAndSetEthPhyOcpBit(tp,
- 0xAD16,
- 0x03FF,
- 0x03FF
+ 0xBD5A,
+ 0x001F,
+ rg_lpf_cap_xg_p3 >> 8
);
ClearAndSetEthPhyOcpBit(tp,
- 0xAD32,
- 0x003F,
- 0x0006
+ 0xBD5A,
+ 0x1F00,
+ rg_lpf_cap_xg_p2 << 8
);
- ClearEthPhyOcpBit(tp, 0xAC08, BIT_12);
- ClearEthPhyOcpBit(tp, 0xAC08, BIT_8);
ClearAndSetEthPhyOcpBit(tp,
- 0xACC0,
- BIT_1|BIT_0,
- BIT_1
+ 0xBD5C,
+ 0x001F,
+ rg_lpf_cap_xg_p1 >> 8
);
ClearAndSetEthPhyOcpBit(tp,
- 0xAD40,
- BIT_7|BIT_6|BIT_5,
- BIT_6
+ 0xBD5C,
+ 0x1F00,
+ rg_lpf_cap_xg_p0 << 8
);
ClearAndSetEthPhyOcpBit(tp,
- 0xAD40,
- BIT_2|BIT_1|BIT_0,
- BIT_2
+ 0xBC18,
+ 0x001F,
+ rg_lpf_cap_p3 >> 8
);
- ClearEthPhyOcpBit(tp, 0xAC14, BIT_7);
- ClearEthPhyOcpBit(tp, 0xAC80, BIT_9|BIT_8);
ClearAndSetEthPhyOcpBit(tp,
- 0xAC5E,
- BIT_2|BIT_1|BIT_0,
- BIT_1
+ 0xBC18,
+ 0x1F00,
+ rg_lpf_cap_p2 << 8
);
- mdio_direct_write_phy_ocp(tp, 0xAD4C, 0x00A8);
ClearAndSetEthPhyOcpBit(tp,
- 0xAC5C,
- BIT_5|BIT_4|BIT_3,
- BIT_3
+ 0xBC1A,
+ 0x001F,
+ rg_lpf_cap_p1 >> 8
);
ClearAndSetEthPhyOcpBit(tp,
- 0xAC8A,
- BIT_7|BIT_6|BIT_5|BIT_4,
- BIT_5|BIT_4
+ 0xBC1A,
+ 0x1F00,
+ rg_lpf_cap_p0 << 8
);
+ }
- mdio_direct_write_phy_ocp(tp, 0xB87C, 0x80A2);
- mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0153);
- mdio_direct_write_phy_ocp(tp, 0xB87C, 0x809C);
- mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0153);
-
-
- mdio_direct_write_phy_ocp(tp, 0xA436, 0x81B3);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0043);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x00A7);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x00D6);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x00EC);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x00F6);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x00FB);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x00FD);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x00FF);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x00BB);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0058);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0029);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0013);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0009);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0004);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0002);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000);
+ SetEthPhyOcpBit(tp, 0xA424, BIT_3);
- mdio_direct_write_phy_ocp(tp, 0xA436, 0x8257);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x020F);
+ if (aspm) {
+ if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+ rtl8125_enable_phy_aldps(tp);
+ }
+ }
+}
- mdio_direct_write_phy_ocp(tp, 0xA436, 0x80EA);
- mdio_direct_write_phy_ocp(tp, 0xA438, 0x7843);
+static void
+rtl8125_hw_phy_config_8125b_1(struct net_device *dev)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+ SetEthPhyOcpBit(tp, 0xA442, BIT_11);
- rtl8125_set_phy_mcu_patch_request(tp);
- ClearEthPhyOcpBit(tp, 0xB896, BIT_0);
- ClearEthPhyOcpBit(tp, 0xB892, 0xFF00);
-
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC091);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x6E12);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC092);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x1214);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC094);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x1516);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC096);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x171B);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC098);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x1B1C);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC09A);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x1F1F);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC09C);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x2021);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC09E);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x2224);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC0A0);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x2424);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC0A2);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x2424);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC0A4);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x2424);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC018);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x0AF2);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC01A);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x0D4A);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC01C);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x0F26);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC01E);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x118D);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC020);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x14F3);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC022);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x175A);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC024);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x19C0);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC026);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x1C26);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC089);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x6050);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC08A);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x5F6E);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC08C);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x6E6E);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC08E);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x6E6E);
- mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC090);
- mdio_direct_write_phy_ocp(tp, 0xB890, 0x6E12);
-
- SetEthPhyOcpBit(tp, 0xB896, BIT_0);
+ SetEthPhyOcpBit(tp, 0xBC08, (BIT_3 | BIT_2));
- rtl8125_clear_phy_mcu_patch_request(tp);
+ if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x8FFF);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ 0xFF00,
+ 0x0400
+ );
+ }
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8560);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x19CC);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8562);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x19CC);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8564);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x19CC);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8566);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x147D);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8568);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x147D);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x856A);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x147D);
+ if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FFE);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0907);
+ }
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xACDA,
+ 0xFF00,
+ 0xFF00
+ );
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xACDE,
+ 0xF000,
+ 0xF000
+ );
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x80D6);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x2801);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x80F2);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x2801);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x80F4);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x6077);
+ mdio_direct_write_phy_ocp(tp, 0xB506, 0x01E7);
+ mdio_direct_write_phy_ocp(tp, 0xAC8C, 0x0FFC);
+ mdio_direct_write_phy_ocp(tp, 0xAC46, 0xB7B4);
+ mdio_direct_write_phy_ocp(tp, 0xAC50, 0x0FBC);
+ mdio_direct_write_phy_ocp(tp, 0xAC3C, 0x9240);
+ mdio_direct_write_phy_ocp(tp, 0xAC4E, 0x0DB4);
+ mdio_direct_write_phy_ocp(tp, 0xACC6, 0x0707);
+ mdio_direct_write_phy_ocp(tp, 0xACC8, 0xA0D3);
+ mdio_direct_write_phy_ocp(tp, 0xAD08, 0x0007);
+
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8013);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0700);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FB9);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x2801);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FBA);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0100);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FBC);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x1900);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FBE);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0xE100);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FC0);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0800);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FC2);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0xE500);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FC4);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0F00);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FC6);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0xF100);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FC8);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0400);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FCa);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0xF300);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FCc);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0xFD00);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FCe);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0xFF00);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FD0);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0xFB00);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FD2);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0100);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FD4);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0xF400);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FD6);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0xFF00);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FD8);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0xF600);
+
+
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x813D);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x390E);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x814F);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x790E);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x80B0);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0F31);
+ SetEthPhyOcpBit(tp, 0xBF4C, BIT_1);
+ SetEthPhyOcpBit(tp, 0xBCCA, (BIT_9 | BIT_8));
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8141);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x320E);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8153);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x720E);
+ ClearEthPhyOcpBit(tp, 0xA432, BIT_6);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8529);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x050E);
+
+
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x816C);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0xC4A0);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x8170);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0xC4A0);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x8174);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x04A0);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x8178);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x04A0);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x817C);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0719);
+ if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x8FF4);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0400);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x8FF1);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0404);
+ }
+ mdio_direct_write_phy_ocp(tp, 0xBF4A, 0x001B);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8033);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x7C13);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8037);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x7C13);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x803B);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0xFC32);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x803F);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x7C13);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8043);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x7C13);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8047);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x7C13);
+
+
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8145);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x370E);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8157);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x770E);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8169);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0D0A);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x817B);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x1D0A);
+
+
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x8217);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ 0xFF00,
+ 0x5000
+ );
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x821A);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ 0xFF00,
+ 0x5000
+ );
- SetEthPhyOcpBit(tp, 0xD068, BIT_13);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80DA);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0403);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80DC);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ 0xFF00,
+ 0x1000
+ );
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80B3);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x0384);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80B7);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x2007);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80BA);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ 0xFF00,
+ 0x6C00
+ );
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80B5);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0xF009);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80BD);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ 0xFF00,
+ 0x9F00
+ );
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80C7);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0xf083);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80DD);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x03f0);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80DF);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ 0xFF00,
+ 0x1000
+ );
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80CB);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x2007);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80CE);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ 0xFF00,
+ 0x6C00
+ );
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80C9);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x8009);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80D1);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ 0xFF00,
+ 0x8000
+ );
- mdio_direct_write_phy_ocp(tp, 0xA436, 0x81A2);
- SetEthPhyOcpBit(tp, 0xA438, BIT_8);
- ClearAndSetEthPhyOcpBit(tp,
- 0xB54C,
- 0xFF00,
- 0xDB00);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80A3);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x200A);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80A5);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0xF0AD);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x809F);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x6073);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80A1);
+ mdio_direct_write_phy_ocp(tp, 0xA438, 0x000B);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x80A9);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ 0xFF00,
+ 0xC000
+ );
+ rtl8125_set_phy_mcu_patch_request(tp);
- ClearEthPhyOcpBit(tp, 0xA454, BIT_0);
+ ClearEthPhyOcpBit(tp, 0xB896, BIT_0);
+ ClearEthPhyOcpBit(tp, 0xB892, 0xFF00);
+
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC23E);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x0000);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC240);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x0103);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC242);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x0507);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC244);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x090B);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC246);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x0C0E);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC248);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x1012);
+ mdio_direct_write_phy_ocp(tp, 0xB88E, 0xC24A);
+ mdio_direct_write_phy_ocp(tp, 0xB890, 0x1416);
+
+ SetEthPhyOcpBit(tp, 0xB896, BIT_0);
+ rtl8125_clear_phy_mcu_patch_request(tp);
- SetEthPhyOcpBit(tp, 0xA442, BIT_11);
- //enable aldps
- //GPHY OCP 0xA430 bit[2] = 0x1 (en_aldps)
- if (aspm) {
- if (tp->HwHasWrRamCodeToMicroP == TRUE) {
- SetEthPhyOcpBit(tp, 0xA430, BIT_2);
- }
+ SetEthPhyOcpBit(tp, 0xA86A, BIT_0);
+ SetEthPhyOcpBit(tp, 0xA6F0, BIT_0);
+
+
+ mdio_direct_write_phy_ocp(tp, 0xBFA0, 0xD70D);
+ mdio_direct_write_phy_ocp(tp, 0xBFA2, 0x4100);
+ mdio_direct_write_phy_ocp(tp, 0xBFA4, 0xE868);
+ mdio_direct_write_phy_ocp(tp, 0xBFA6, 0xDC59);
+ mdio_direct_write_phy_ocp(tp, 0xB54C, 0x3C18);
+ ClearEthPhyOcpBit(tp, 0xBFA4, BIT_5);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x817D);
+ SetEthPhyOcpBit(tp, 0xA438, BIT_12);
+
+
+ if (aspm) {
+ if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+ rtl8125_enable_phy_aldps(tp);
}
}
+}
+
+static void
+rtl8125_hw_phy_config_8125b_2(struct net_device *dev)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+
+ SetEthPhyOcpBit(tp, 0xA442, BIT_11);
+
+
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xAC46,
+ 0x00F0,
+ 0x0090
+ );
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xAD30,
+ 0x0003,
+ 0x0001
+ );
+
+
+ RTL_W16(tp, EEE_TXIDLE_TIMER_8125, tp->eee.tx_lpi_timer);
+
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x80F5);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x760E);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8107);
+ mdio_direct_write_phy_ocp(tp, 0xB87E, 0x360E);
+ mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8551);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xB87E,
+ BIT_15 | BIT_14 | BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_9 | BIT_8,
+ BIT_11
+ );
+
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xbf00,
+ 0xE000,
+ 0xA000
+ );
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xbf46,
+ 0x0F00,
+ 0x0300
+ );
+ mdio_direct_write_phy_ocp(tp, 0xa436, 0x8044);
+ mdio_direct_write_phy_ocp(tp, 0xa438, 0x2417);
+ mdio_direct_write_phy_ocp(tp, 0xa436, 0x804A);
+ mdio_direct_write_phy_ocp(tp, 0xa438, 0x2417);
+ mdio_direct_write_phy_ocp(tp, 0xa436, 0x8050);
+ mdio_direct_write_phy_ocp(tp, 0xa438, 0x2417);
+ mdio_direct_write_phy_ocp(tp, 0xa436, 0x8056);
+ mdio_direct_write_phy_ocp(tp, 0xa438, 0x2417);
+ mdio_direct_write_phy_ocp(tp, 0xa436, 0x805C);
+ mdio_direct_write_phy_ocp(tp, 0xa438, 0x2417);
+ mdio_direct_write_phy_ocp(tp, 0xa436, 0x8062);
+ mdio_direct_write_phy_ocp(tp, 0xa438, 0x2417);
+ mdio_direct_write_phy_ocp(tp, 0xa436, 0x8068);
+ mdio_direct_write_phy_ocp(tp, 0xa438, 0x2417);
+ mdio_direct_write_phy_ocp(tp, 0xa436, 0x806E);
+ mdio_direct_write_phy_ocp(tp, 0xa438, 0x2417);
+ mdio_direct_write_phy_ocp(tp, 0xa436, 0x8074);
+ mdio_direct_write_phy_ocp(tp, 0xa438, 0x2417);
+ mdio_direct_write_phy_ocp(tp, 0xa436, 0x807A);
+ mdio_direct_write_phy_ocp(tp, 0xa438, 0x2417);
+
+
+ SetEthPhyOcpBit(tp, 0xA4CA, BIT_6);
+
+
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xBF84,
+ BIT_15 | BIT_14 | BIT_13,
+ BIT_15 | BIT_13
+ );
+
+
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x8170);
+ ClearAndSetEthPhyOcpBit(tp,
+ 0xA438,
+ BIT_13 | BIT_10 | BIT_9 | BIT_8,
+ BIT_15 | BIT_14 | BIT_12 | BIT_11
+ );
+
+
+ SetEthPhyOcpBit(tp, 0xA424, BIT_3);
+
+ /*
+ mdio_direct_write_phy_ocp(tp, 0xBFA0, 0xD70D);
+ mdio_direct_write_phy_ocp(tp, 0xBFA2, 0x4100);
+ mdio_direct_write_phy_ocp(tp, 0xBFA4, 0xE868);
+ mdio_direct_write_phy_ocp(tp, 0xBFA6, 0xDC59);
+ mdio_direct_write_phy_ocp(tp, 0xB54C, 0x3C18);
+ ClearEthPhyOcpBit(tp, 0xBFA4, BIT_5);
+ mdio_direct_write_phy_ocp(tp, 0xA436, 0x817D);
+ SetEthPhyOcpBit(tp, 0xA438, BIT_12);
+ */
+
+
+ if (aspm) {
+ if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+ rtl8125_enable_phy_aldps(tp);
+ }
+ }
+}
+
+static void
+rtl8125_hw_phy_config_8126a_1(struct net_device *dev)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+
+ SetEthPhyOcpBit(tp, 0xA442, BIT_11);
+
+ RTL_W16(tp, EEE_TXIDLE_TIMER_8125, tp->eee.tx_lpi_timer);
+
+ if (aspm) {
+ if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+ rtl8125_enable_phy_aldps(tp);
+ }
+ }
+}
+
+static void
+rtl8125_hw_phy_config(struct net_device *dev)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+
+ if (tp->resume_not_chg_speed) return;
+
+ tp->phy_reset_enable(dev);
+
+ if (HW_DASH_SUPPORT_TYPE_3(tp) && tp->HwPkgDet == 0x06) return;
+
+#ifndef ENABLE_USE_FIRMWARE_FILE
+ if (!tp->rtl_fw) {
+ rtl8125_set_hw_phy_before_init_phy_mcu(dev);
+
+ rtl8125_init_hw_phy_mcu(dev);
+ }
+#endif
+
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ rtl8125_hw_phy_config_8125a_1(dev);
+ break;
+ case CFG_METHOD_3:
+ case CFG_METHOD_6:
+ rtl8125_hw_phy_config_8125a_2(dev);
+ break;
+ case CFG_METHOD_4:
+ rtl8125_hw_phy_config_8125b_1(dev);
+ break;
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
+ rtl8125_hw_phy_config_8125b_2(dev);
+ break;
+ case CFG_METHOD_8:
+ rtl8125_hw_phy_config_8126a_1(dev);
+ break;
+ }
+
+ //legacy force mode(Chap 22)
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ default:
+ rtl8125_mdio_write(tp, 0x1F, 0x0A5B);
+ rtl8125_clear_eth_phy_bit(tp, 0x12, BIT_15);
+ rtl8125_mdio_write(tp, 0x1F, 0x0000);
+ break;
+ }
/*ocp phy power saving*/
/*
if (aspm) {
- if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3)
+ if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3 ||
+ tp->mcfg == CFG_METHOD_6)
rtl8125_enable_ocp_phy_power_saving(dev);
}
*/
rtl8125_mdio_write(tp, 0x1F, 0x0000);
- if (tp->HwHasWrRamCodeToMicroP == TRUE) {
- if (eee_enable == 1)
+ if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+ if (tp->eee.eee_enabled)
rtl8125_enable_eee(tp);
else
rtl8125_disable_eee(tp);
}
}
+static void
+rtl8125_up(struct net_device *dev)
+{
+ rtl8125_hw_init(dev);
+ rtl8125_hw_reset(dev);
+ rtl8125_powerup_pll(dev);
+ rtl8125_hw_ephy_config(dev);
+ rtl8125_hw_phy_config(dev);
+ rtl8125_hw_config(dev);
+}
+
+/*
static inline void rtl8125_delete_esd_timer(struct net_device *dev, struct timer_list *timer)
{
del_timer_sync(timer);
@@ -6929,7 +11353,9 @@ static inline void rtl8125_request_esd_timer(struct net_device *dev)
#endif
mod_timer(timer, jiffies + RTL8125_ESD_TIMEOUT);
}
+*/
+/*
static inline void rtl8125_delete_link_timer(struct net_device *dev, struct timer_list *timer)
{
del_timer_sync(timer);
@@ -6947,6 +11373,7 @@ static inline void rtl8125_request_link_timer(struct net_device *dev)
#endif
mod_timer(timer, jiffies + RTL8125_LINK_TIMEOUT);
}
+*/
#ifdef CONFIG_NET_POLL_CONTROLLER
/*
@@ -6958,28 +11385,40 @@ static void
rtl8125_netpoll(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- struct pci_dev *pdev = tp->pci_dev;
+ int i;
+ for (i = 0; i < tp->irq_nvecs; i++) {
+ struct r8125_irq *irq = &tp->irq_tbl[i];
+ struct r8125_napi *r8125napi = &tp->r8125napi[i];
- disable_irq(pdev->irq);
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
- rtl8125_interrupt(pdev->irq, dev, NULL);
+ disable_irq(irq->vector);
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0)
+ irq->handler(irq->vector, r8125napi);
+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+ irq->handler(irq->vector, r8125napi, NULL);
#else
- rtl8125_interrupt(pdev->irq, dev);
+ irq->handler(irq->vector, r8125napi);
#endif
- enable_irq(pdev->irq);
+
+ enable_irq(irq->vector);
+ }
}
-#endif
+#endif //CONFIG_NET_POLL_CONTROLLER
static void
rtl8125_get_bios_setting(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- tp->bios_setting = RTL_R32(TimeInt2);
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ tp->bios_setting = RTL_R32(tp, TimeInt2);
break;
}
}
@@ -6988,25 +11427,70 @@ static void
rtl8125_set_bios_setting(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- RTL_W32(TimeInt2, tp->bios_setting);
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ RTL_W32(tp, TimeInt2, tp->bios_setting);
break;
}
}
+static void
+rtl8125_setup_mqs_reg(struct rtl8125_private *tp)
+{
+ int i;
+
+ //tx
+ tp->tx_ring[0].tdsar_reg = TxDescStartAddrLow;
+ for (i = 1; i < R8125_MAX_TX_QUEUES; i++) {
+ tp->tx_ring[i].tdsar_reg = (u16)(TNPDS_Q1_LOW_8125 + (i - 1) * 8);
+ }
+
+ for (i = 0; i < R8125_MAX_TX_QUEUES; i++) {
+ if (tp->HwSuppTxNoCloseVer == 4) {
+ tp->tx_ring[i].hw_clo_ptr_reg = (u16)(HW_CLO_PTR0_8126 + i * 4);
+ tp->tx_ring[i].sw_tail_ptr_reg = (u16)(SW_TAIL_PTR0_8126 + i * 4);
+ } else {
+ tp->tx_ring[i].hw_clo_ptr_reg = (u16)(HW_CLO_PTR0_8125 + i * 4);
+ tp->tx_ring[i].sw_tail_ptr_reg = (u16)(SW_TAIL_PTR0_8125 + i * 4);
+ }
+ }
+
+ //rx
+ tp->rx_ring[0].rdsar_reg = RxDescAddrLow;
+ for (i = 1; i < R8125_MAX_RX_QUEUES; i++) {
+ tp->rx_ring[i].rdsar_reg = (u16)(RDSAR_Q1_LOW_8125 + (i - 1) * 8);
+ }
+
+ tp->isr_reg[0] = ISR0_8125;
+ for (i = 1; i < R8125_MAX_QUEUES; i++) {
+ tp->isr_reg[i] = (u16)(ISR1_8125 + (i - 1) * 4);
+ }
+
+ tp->imr_reg[0] = IMR0_8125;
+ for (i = 1; i < R8125_MAX_QUEUES; i++) {
+ tp->imr_reg[i] = (u16)(IMR1_8125 + (i - 1) * 4);
+ }
+}
+
static void
rtl8125_init_software_variable(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
struct pci_dev *pdev = tp->pci_dev;
- void __iomem *ioaddr = tp->mmio_addr;
rtl8125_get_bios_setting(dev);
+#ifdef ENABLE_LIB_SUPPORT
+ tp->ring_lib_enabled = 1;
+#endif
+
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
@@ -7020,6 +11504,11 @@ rtl8125_init_software_variable(struct net_device *dev)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
tp->HwPkgDet = rtl8125_mac_ocp_read(tp, 0xDC00);
tp->HwPkgDet = (tp->HwPkgDet >> 3) & 0x07;
break;
@@ -7031,10 +11520,31 @@ rtl8125_init_software_variable(struct net_device *dev)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- tp->HwSuppNowIsOobVer = 1;
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ tp->HwSuppNowIsOobVer = 1;
+ break;
+ }
+
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ tp->HwPcieSNOffset = 0x16C;
break;
}
+#ifdef ENABLE_REALWOW_SUPPORT
+ rtl8125_get_realwow_hw_version(dev);
+#endif //ENABLE_REALWOW_SUPPORT
+
if (HW_DASH_SUPPORT_DASH(tp) && rtl8125_check_dash(tp))
tp->DASH = 1;
else
@@ -7069,32 +11579,22 @@ rtl8125_init_software_variable(struct net_device *dev)
tp->mapped_cmac_ioaddr = cmac_ioaddr;
}
}
+
+ eee_enable = 0;
}
- if (HW_DASH_SUPPORT_TYPE_3(tp))
+ if (HW_DASH_SUPPORT_TYPE_3(tp))
tp->cmac_ioaddr = tp->mapped_cmac_ioaddr;
- switch (tp->mcfg) {
- case CFG_METHOD_2:
- case CFG_METHOD_3:
- default:
- tp->intr_mask = RxDescUnavail | TxOK | RxOK | SWInt;
- tp->timer_intr_mask = PCSTimeout;
- break;
- }
-
-#ifdef ENABLE_DASH_SUPPORT
- if (tp->DASH) {
- if (HW_DASH_SUPPORT_TYPE_3(tp)) {
- tp->timer_intr_mask |= ( ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET);
- tp->intr_mask |= ( ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET);
- }
- }
-#endif
if (aspm) {
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
tp->org_pci_offset_99 = rtl8125_csi_fun0_read_byte(tp, 0x99);
tp->org_pci_offset_99 &= ~(BIT_5|BIT_6);
break;
@@ -7103,8 +11603,17 @@ rtl8125_init_software_variable(struct net_device *dev)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_6:
+ tp->org_pci_offset_180 = rtl8125_csi_fun0_read_byte(tp, 0x264);
+ break;
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
tp->org_pci_offset_180 = rtl8125_csi_fun0_read_byte(tp, 0x214);
break;
+ case CFG_METHOD_8:
+ tp->org_pci_offset_180 = rtl8125_csi_fun0_read_byte(tp, 0x22c);
+ break;
}
}
@@ -7114,17 +11623,42 @@ rtl8125_init_software_variable(struct net_device *dev)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
default:
tp->use_timer_interrrupt = TRUE;
break;
}
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ tp->HwSuppMaxPhyLinkSpeed = 2500;
+ break;
+ case CFG_METHOD_8:
+ tp->HwSuppMaxPhyLinkSpeed = 5000;
+ break;
+ default:
+ tp->HwSuppMaxPhyLinkSpeed = 1000;
+ break;
+ }
+
if (timer_count == 0 || tp->mcfg == CFG_METHOD_DEFAULT)
tp->use_timer_interrrupt = FALSE;
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
tp->HwSuppMagicPktVer = WAKEUP_MAGIC_PACKET_V3;
break;
default:
@@ -7135,6 +11669,34 @@ rtl8125_init_software_variable(struct net_device *dev)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ tp->HwSuppLinkChgWakeUpVer = 3;
+ break;
+ }
+
+ switch (tp->mcfg) {
+ case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ tp->HwSuppD0SpeedUpVer = 1;
+ break;
+ }
+
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
tp->HwSuppCheckPhyDisableModeVer = 3;
break;
}
@@ -7142,7 +11704,32 @@ rtl8125_init_software_variable(struct net_device *dev)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- tp->HwSuppGigaForceMode = TRUE;
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ tp->HwSuppTxNoCloseVer = 3;
+ break;
+ case CFG_METHOD_8:
+ tp->HwSuppTxNoCloseVer = 4;
+ break;
+ }
+
+ if (tp->HwSuppTxNoCloseVer == 4)
+ tp->MaxTxDescPtrMask = MAX_TX_NO_CLOSE_DESC_PTR_MASK_V3;
+ else if (tp->HwSuppTxNoCloseVer == 3)
+ tp->MaxTxDescPtrMask = MAX_TX_NO_CLOSE_DESC_PTR_MASK_V2;
+ else
+ tx_no_close_enable = 0;
+
+ if (tp->HwSuppTxNoCloseVer > 0 && tx_no_close_enable == 1)
+ tp->EnableTxNoClose = TRUE;
+
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_6:
+ tp->RequireLSOPatch = TRUE;
break;
}
@@ -7151,8 +11738,19 @@ rtl8125_init_software_variable(struct net_device *dev)
tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_2;
break;
case CFG_METHOD_3:
+ case CFG_METHOD_6:
tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_3;
break;
+ case CFG_METHOD_4:
+ tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_4;
+ break;
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
+ tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_5;
+ break;
+ case CFG_METHOD_8:
+ tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_8;
+ break;
}
if (tp->HwIcVerUnknown) {
@@ -7160,31 +11758,261 @@ rtl8125_init_software_variable(struct net_device *dev)
tp->NotWrMcuPatchCode = TRUE;
}
- tp->NicCustLedValue = RTL_R16(CustomLED);
+ switch (tp->mcfg) {
+ case CFG_METHOD_3:
+ case CFG_METHOD_6:
+ if ((rtl8125_mac_ocp_read(tp, 0xD442) & BIT_5) &&
+ (mdio_direct_read_phy_ocp(tp, 0xD068) & BIT_1))
+ tp->RequirePhyMdiSwapPatch = TRUE;
+ break;
+ }
+
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ tp->HwSuppMacMcuVer = 2;
+ break;
+ }
+
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ tp->MacMcuPageSize = RTL8125_MAC_MCU_PAGE_SIZE;
+ break;
+ }
+
+ switch (tp->mcfg) {
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ tp->HwSuppNumTxQueues = 2;
+ tp->HwSuppNumRxQueues = 4;
+ break;
+ default:
+ tp->HwSuppNumTxQueues = 1;
+ tp->HwSuppNumRxQueues = 1;
+ break;
+ }
+
+ tp->num_tx_rings = 1;
+#ifdef ENABLE_MULTIPLE_TX_QUEUE
+#ifndef ENABLE_LIB_SUPPORT
+ tp->num_tx_rings = tp->HwSuppNumTxQueues;
+#endif
+#endif
+
+ switch (tp->mcfg) {
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ tp->HwSuppRssVer = 5;
+ tp->HwSuppIndirTblEntries = 128;
+ break;
+ }
+
+ tp->num_rx_rings = 1;
+#ifdef ENABLE_RSS_SUPPORT
+#ifdef ENABLE_LIB_SUPPORT
+ if (tp->HwSuppRssVer > 0)
+ tp->EnableRss = 1;
+#else
+ if (tp->HwSuppRssVer > 0) {
+ u8 rss_queue_num = netif_get_num_default_rss_queues();
+ tp->num_rx_rings = (tp->HwSuppNumRxQueues > rss_queue_num)?
+ rss_queue_num : tp->HwSuppNumRxQueues;
+
+ if (!(tp->num_rx_rings >= 2 && tp->irq_nvecs >= tp->num_rx_rings))
+ tp->num_rx_rings = 1;
+
+ if (tp->num_rx_rings >= 2)
+ tp->EnableRss = 1;
+ }
+#endif
+#endif
+
+ rtl8125_setup_mqs_reg(tp);
+
+ rtl8125_set_ring_size(tp, NUM_RX_DESC, NUM_TX_DESC);
+
+ switch (tp->mcfg) {
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
+ tp->HwSuppPtpVer = 1;
+ break;
+ }
+#ifdef ENABLE_PTP_SUPPORT
+ if (tp->HwSuppPtpVer > 0)
+ tp->EnablePtp = 1;
+#endif
+
+ //init interrupt
+ switch (tp->mcfg) {
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ tp->HwSuppIsrVer = 2;
+ break;
+ default:
+ tp->HwSuppIsrVer = 1;
+ break;
+ }
+
+ tp->HwCurrIsrVer = tp->HwSuppIsrVer;
+ if (tp->HwSuppIsrVer == 2) {
+ if (!(tp->features & RTL_FEATURE_MSIX) ||
+ tp->irq_nvecs < R8125_MIN_MSIX_VEC_8125B)
+ tp->HwCurrIsrVer = 1;
+ }
+
+ if (tp->HwCurrIsrVer < 2 || tp->irq_nvecs < 19)
+ tp->num_tx_rings = 1;
+
+ if (tp->HwCurrIsrVer == 2) {
+ int i;
+
+ tp->intr_mask = ISRIMR_V2_LINKCHG | ISRIMR_TOK_Q0;
+ if (tp->num_tx_rings > 1)
+ tp->intr_mask |= ISRIMR_TOK_Q1;
+
+ for (i = 0; i < tp->num_rx_rings; i++)
+ tp->intr_mask |= ISRIMR_V2_ROK_Q0 << i;
+ } else {
+ tp->intr_mask = LinkChg | RxDescUnavail | TxOK | RxOK | SWInt;
+ tp->timer_intr_mask = LinkChg | PCSTimeout;
+
+#ifdef ENABLE_DASH_SUPPORT
+ if (tp->DASH) {
+ if (HW_DASH_SUPPORT_TYPE_3(tp)) {
+ tp->timer_intr_mask |= ( ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET);
+ tp->intr_mask |= ( ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET);
+ }
+ }
+#endif
+ }
+
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_6:
+ tp->HwSuppIntMitiVer = 3;
+ break;
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ tp->HwSuppIntMitiVer = 4;
+ break;
+ }
+
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ tp->HwSuppExtendTallyCounterVer = 1;
+ break;
+ }
+
+ timer_count_v2 = (timer_count / 0x100);
+
+#ifndef ENABLE_LIB_SUPPORT
+ switch (tp->mcfg) {
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
+ if (tp->HwSuppIsrVer == 2) {
+ tp->RequireRduNonStopPatch = 1;
+ tp->EnableRss = 0;
+ }
+ break;
+ }
+#endif
+
+ tp->InitRxDescType = RX_DESC_RING_TYPE_1;
+ if (tp->EnableRss || tp->EnablePtp)
+ tp->InitRxDescType = RX_DESC_RING_TYPE_3;
+
+ tp->RxDescLength = RX_DESC_LEN_TYPE_1;
+ if (tp->InitRxDescType == RX_DESC_RING_TYPE_3)
+ tp->RxDescLength = RX_DESC_LEN_TYPE_3;
+
+ tp->rtl8125_rx_config = rtl_chip_info[tp->chipset].RCR_Cfg;
+ if (tp->InitRxDescType == RX_DESC_RING_TYPE_3)
+ tp->rtl8125_rx_config |= EnableRxDescV3;
+
+ tp->NicCustLedValue = RTL_R16(tp, CustomLED);
- rtl8125_get_hw_wol(dev);
+ tp->wol_opts = rtl8125_get_hw_wol(tp);
+ tp->wol_enabled = (tp->wol_opts) ? WOL_ENABLED : WOL_DISABLED;
- rtl8125_link_option((u8*)&autoneg_mode, (u32*)&speed_mode, (u8*)&duplex_mode, (u32*)&advertising_mode);
+ if (HW_SUPP_PHY_LINK_SPEED_2500M(tp))
+ rtl8125_link_option((u8*)&autoneg_mode, (u32*)&speed_mode, (u8*)&duplex_mode, (u32*)&advertising_mode);
+ else
+ rtl8125_link_option_giga((u8*)&autoneg_mode, (u32*)&speed_mode, (u8*)&duplex_mode, (u32*)&advertising_mode);
tp->autoneg = autoneg_mode;
tp->speed = speed_mode;
tp->duplex = duplex_mode;
tp->advertising = advertising_mode;
+ if (HW_SUPP_PHY_LINK_SPEED_5000M(tp))
+ tp->advertising |= RTK_ADVERTISED_5000baseX_Full;
+ tp->fcpause = rtl8125_fc_full;
tp->max_jumbo_frame_size = rtl_chip_info[tp->chipset].jumbo_frame_sz;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0)
/* MTU range: 60 - hw-specific max */
- dev->min_mtu = ETH_ZLEN;
+ dev->min_mtu = ETH_MIN_MTU;
dev->max_mtu = tp->max_jumbo_frame_size;
#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0)
+
+ if (tp->mcfg != CFG_METHOD_DEFAULT) {
+ struct ethtool_eee *eee = &tp->eee;
+
+ eee->eee_enabled = eee_enable;
+ eee->supported = SUPPORTED_100baseT_Full |
+ SUPPORTED_1000baseT_Full;
+ switch (tp->mcfg) {
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_8:
+ eee->supported |= SUPPORTED_2500baseX_Full;
+ break;
+ }
+ eee->advertised = mmd_eee_adv_to_ethtool_adv_t(MDIO_EEE_1000T | MDIO_EEE_100TX);
+ eee->tx_lpi_timer = dev->mtu + ETH_HLEN + 0x20;
+ }
+
+ tp->ptp_master_mode = enable_ptp_master_mode;
+
+#ifdef ENABLE_RSS_SUPPORT
+ if (tp->EnableRss)
+ rtl8125_init_rss(tp);
+#endif
}
static void
rtl8125_release_board(struct pci_dev *pdev,
- struct net_device *dev,
- void __iomem *ioaddr)
+ struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
+ void __iomem *ioaddr = tp->mmio_addr;
rtl8125_set_bios_setting(dev);
rtl8125_rar_set(tp, tp->org_mac_addr);
@@ -7203,48 +12031,60 @@ rtl8125_release_board(struct pci_dev *pdev,
iounmap(ioaddr);
pci_release_regions(pdev);
+ pci_clear_mwi(pdev);
pci_disable_device(pdev);
free_netdev(dev);
}
+static void
+rtl8125_hw_address_set(struct net_device *dev, u8 mac_addr[MAC_ADDR_LEN])
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+ eth_hw_addr_set(dev, mac_addr);
+#else
+ memcpy(dev->dev_addr, mac_addr, MAC_ADDR_LEN);
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+}
+
static int
rtl8125_get_mac_address(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
int i;
u8 mac_addr[MAC_ADDR_LEN];
for (i = 0; i < MAC_ADDR_LEN; i++)
- mac_addr[i] = RTL_R8(MAC0 + i);
+ mac_addr[i] = RTL_R8(tp, MAC0 + i);
if(tp->mcfg == CFG_METHOD_2 ||
- tp->mcfg == CFG_METHOD_3) {
- *(u32*)&mac_addr[0] = RTL_R32(BACKUP_ADDR0_8125);
- *(u16*)&mac_addr[4] = RTL_R16(BACKUP_ADDR1_8125);
+ tp->mcfg == CFG_METHOD_3 ||
+ tp->mcfg == CFG_METHOD_4 ||
+ tp->mcfg == CFG_METHOD_5 ||
+ tp->mcfg == CFG_METHOD_6 ||
+ tp->mcfg == CFG_METHOD_7 ||
+ tp->mcfg == CFG_METHOD_8) {
+ *(u32*)&mac_addr[0] = RTL_R32(tp, BACKUP_ADDR0_8125);
+ *(u16*)&mac_addr[4] = RTL_R16(tp, BACKUP_ADDR1_8125);
}
if (!is_valid_ether_addr(mac_addr)) {
netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
mac_addr);
- eth_hw_addr_random(dev);
- ether_addr_copy(mac_addr, dev->dev_addr);
+ eth_random_addr(mac_addr);
+ dev->addr_assign_type = NET_ADDR_RANDOM;
netif_info(tp, probe, dev, "Random ether addr %pM\n",
mac_addr);
tp->random_mac = 1;
}
+ rtl8125_hw_address_set(dev, mac_addr);
rtl8125_rar_set(tp, mac_addr);
- for (i = 0; i < MAC_ADDR_LEN; i++) {
- dev->dev_addr[i] = RTL_R8(MAC0 + i);
- tp->org_mac_addr[i] = dev->dev_addr[i]; /* keep the original MAC address */
- }
+ /* keep the original MAC address */
+ memcpy(tp->org_mac_addr, dev->dev_addr, MAC_ADDR_LEN);
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
#endif
-// memcpy(dev->dev_addr, dev->dev_addr, dev->addr_len);
-
return 0;
}
@@ -7261,19 +12101,14 @@ rtl8125_set_mac_address(struct net_device *dev,
{
struct rtl8125_private *tp = netdev_priv(dev);
struct sockaddr *addr = p;
- unsigned long flags;
if (!is_valid_ether_addr(addr->sa_data))
return -EADDRNOTAVAIL;
- spin_lock_irqsave(&tp->lock, flags);
-
- memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
+ rtl8125_hw_address_set(dev, addr->sa_data);
rtl8125_rar_set(tp, dev->dev_addr);
- spin_unlock_irqrestore(&tp->lock, flags);
-
return 0;
}
@@ -7285,9 +12120,8 @@ rtl8125_set_mac_address(struct net_device *dev,
*****************************************************************************/
void
rtl8125_rar_set(struct rtl8125_private *tp,
- uint8_t *addr)
+ const u8 *addr)
{
- void __iomem *ioaddr = tp->mmio_addr;
uint32_t rar_low = 0;
uint32_t rar_high = 0;
@@ -7300,8 +12134,8 @@ rtl8125_rar_set(struct rtl8125_private *tp,
((uint32_t) addr[5] << 8));
rtl8125_enable_cfg9346_write(tp);
- RTL_W32(MAC0, rar_low);
- RTL_W32(MAC4, rar_high);
+ RTL_W32(tp, MAC0, rar_low);
+ RTL_W32(tp, MAC4, rar_high);
rtl8125_disable_cfg9346_write(tp);
}
@@ -7966,6 +12800,57 @@ static int ethtool_ioctl(struct ifreq *ifr)
}
#endif //ETHTOOL_OPS_COMPAT
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)
+static int rtl8125_siocdevprivate(struct net_device *dev, struct ifreq *ifr,
+ void __user *data, int cmd)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+ int ret = 0;
+
+ switch (cmd) {
+#ifdef ENABLE_DASH_SUPPORT
+ case SIOCDEVPRIVATE_RTLDASH:
+ if (!netif_running(dev)) {
+ ret = -ENODEV;
+ break;
+ }
+ if (!capable(CAP_NET_ADMIN)) {
+ ret = -EPERM;
+ break;
+ }
+
+ ret = rtl8125_dash_ioctl(dev, ifr);
+ break;
+#endif
+
+#ifdef ENABLE_REALWOW_SUPPORT
+ case SIOCDEVPRIVATE_RTLREALWOW:
+ if (!netif_running(dev)) {
+ ret = -ENODEV;
+ break;
+ }
+
+ ret = rtl8125_realwow_ioctl(dev, ifr);
+ break;
+#endif
+
+ case SIOCRTLTOOL:
+ if (!capable(CAP_NET_ADMIN)) {
+ ret = -EPERM;
+ break;
+ }
+
+ ret = rtl8125_tool_ioctl(tp, ifr);
+ break;
+
+ default:
+ ret = -EOPNOTSUPP;
+ }
+
+ return ret;
+}
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)
+
static int
rtl8125_do_ioctl(struct net_device *dev,
struct ifreq *ifr,
@@ -7973,29 +12858,23 @@ rtl8125_do_ioctl(struct net_device *dev,
{
struct rtl8125_private *tp = netdev_priv(dev);
struct mii_ioctl_data *data = if_mii(ifr);
- int ret;
- unsigned long flags;
+ int ret = 0;
- ret = 0;
switch (cmd) {
case SIOCGMIIPHY:
data->phy_id = 32; /* Internal PHY */
break;
case SIOCGMIIREG:
- spin_lock_irqsave(&tp->lock, flags);
rtl8125_mdio_write(tp, 0x1F, 0x0000);
data->val_out = rtl8125_mdio_read(tp, data->reg_num);
- spin_unlock_irqrestore(&tp->lock, flags);
break;
case SIOCSMIIREG:
if (!capable(CAP_NET_ADMIN))
return -EPERM;
- spin_lock_irqsave(&tp->lock, flags);
rtl8125_mdio_write(tp, 0x1F, 0x0000);
rtl8125_mdio_write(tp, data->reg_num, data->val_in);
- spin_unlock_irqrestore(&tp->lock, flags);
break;
#ifdef ETHTOOL_OPS_COMPAT
@@ -8004,6 +12883,16 @@ rtl8125_do_ioctl(struct net_device *dev,
break;
#endif
+#ifdef ENABLE_PTP_SUPPORT
+ case SIOCSHWTSTAMP:
+ case SIOCGHWTSTAMP:
+ if (tp->EnablePtp)
+ ret = rtl8125_ptp_ioctl(dev, ifr, cmd);
+ else
+ ret = -EOPNOTSUPP;
+ break;
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)
#ifdef ENABLE_DASH_SUPPORT
case SIOCDEVPRIVATE_RTLDASH:
if (!netif_running(dev)) {
@@ -8018,9 +12907,32 @@ rtl8125_do_ioctl(struct net_device *dev,
ret = rtl8125_dash_ioctl(dev, ifr);
break;
#endif
+
+#ifdef ENABLE_REALWOW_SUPPORT
+ case SIOCDEVPRIVATE_RTLREALWOW:
+ if (!netif_running(dev)) {
+ ret = -ENODEV;
+ break;
+ }
+
+ if (!capable(CAP_NET_ADMIN)) {
+ ret = -EPERM;
+ break;
+ }
+
+ ret = rtl8125_realwow_ioctl(dev, ifr);
+ break;
+#endif
+
case SIOCRTLTOOL:
+ if (!capable(CAP_NET_ADMIN)) {
+ ret = -EPERM;
+ break;
+ }
+
ret = rtl8125_tool_ioctl(tp, ifr);
break;
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)
default:
ret = -EOPNOTSUPP;
@@ -8046,6 +12958,11 @@ rtl8125_phy_power_up(struct net_device *dev)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
rtl8125_wait_phy_ups_resume(dev, 3);
break;
};
@@ -8073,7 +12990,7 @@ rtl8125_init_board(struct pci_dev *pdev,
assert(ioaddr_out != NULL);
/* dev zeroed in alloc_etherdev */
- dev = alloc_etherdev(sizeof (*tp));
+ dev = alloc_etherdev_mq(sizeof (*tp), R8125_MAX_QUEUES);
if (dev == NULL) {
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
if (netif_msg_drv(&debug))
@@ -8086,6 +13003,7 @@ rtl8125_init_board(struct pci_dev *pdev,
SET_NETDEV_DEV(dev, &pdev->dev);
tp = netdev_priv(dev);
tp->dev = dev;
+ tp->pci_dev = pdev;
tp->msg_enable = netif_msg_init(debug.msg_enable, R8125_MSG_DEFAULT);
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
@@ -8104,9 +13022,12 @@ rtl8125_init_board(struct pci_dev *pdev,
goto err_out_free_dev;
}
- rc = pci_set_mwi(pdev);
- if (rc < 0)
- goto err_out_disable;
+ if (pci_set_mwi(pdev) < 0) {
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+ if (netif_msg_drv(&debug))
+ dev_info(&pdev->dev, "Mem-Wr-Inval unavailable.\n");
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+ }
/* save power state before pci_enable_device overwrites it */
pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
@@ -8155,11 +13076,11 @@ rtl8125_init_board(struct pci_dev *pdev,
if ((sizeof(dma_addr_t) > 4) &&
use_dac &&
- !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
- !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
+ !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
+ !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
dev->features |= NETIF_F_HIGHDMA;
} else {
- rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc < 0) {
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
if (netif_msg_probe(tp))
@@ -8169,8 +13090,6 @@ rtl8125_init_board(struct pci_dev *pdev,
}
}
- pci_set_master(pdev);
-
/* ioremap MMIO region */
ioaddr = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
if (ioaddr == NULL) {
@@ -8182,8 +13101,10 @@ rtl8125_init_board(struct pci_dev *pdev,
goto err_out_free_res;
}
+ tp->mmio_addr = ioaddr;
+
/* Identify chip attached to board */
- rtl8125_get_mac_version(tp, ioaddr);
+ rtl8125_get_mac_version(tp);
rtl8125_print_mac_version(tp);
@@ -8212,13 +13133,9 @@ rtl8125_init_board(struct pci_dev *pdev,
err_out_free_res:
pci_release_regions(pdev);
-
err_out_mwi:
pci_clear_mwi(pdev);
-
-err_out_disable:
pci_disable_device(pdev);
-
err_out_free_dev:
free_netdev(dev);
err_out:
@@ -8227,27 +13144,11 @@ rtl8125_init_board(struct pci_dev *pdev,
goto out;
}
-#define PCI_DEVICE_SERIAL_NUMBER (0x0164)
-
-static void
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
-rtl8125_esd_timer(unsigned long __opaque)
-#else
-rtl8125_esd_timer(struct timer_list *t)
-#endif
+static void
+rtl8125_esd_checker(struct rtl8125_private *tp)
{
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
- struct net_device *dev = (struct net_device *)__opaque;
- struct rtl8125_private *tp = netdev_priv(dev);
- struct timer_list *timer = &tp->esd_timer;
-#else
- struct rtl8125_private *tp = from_timer(tp, t, esd_timer);
struct net_device *dev = tp->dev;
- struct timer_list *timer = t;
-#endif
struct pci_dev *pdev = tp->pci_dev;
- unsigned long timeout = RTL8125_ESD_TIMEOUT;
- unsigned long flags;
u8 cmd;
u16 io_base_l;
u16 mem_base_l;
@@ -8264,200 +13165,639 @@ rtl8125_esd_timer(struct timer_list *t)
u32 pci_sn_l;
u32 pci_sn_h;
- spin_lock_irqsave(&tp->lock, flags);
+ if (unlikely(tp->rtk_enable_diag))
+ goto exit;
tp->esd_flag = 0;
pci_read_config_byte(pdev, PCI_COMMAND, &cmd);
if (cmd != tp->pci_cfg_space.cmd) {
+ printk(KERN_ERR "%s: cmd = 0x%02x, should be 0x%02x \n.", dev->name, cmd, tp->pci_cfg_space.cmd);
pci_write_config_byte(pdev, PCI_COMMAND, tp->pci_cfg_space.cmd);
tp->esd_flag |= BIT_0;
+
+ pci_read_config_byte(pdev, PCI_COMMAND, &cmd);
+ if (cmd == 0xff) {
+ printk(KERN_ERR "%s: pci link is down \n.", dev->name);
+ goto exit;
+ }
}
pci_read_config_word(pdev, PCI_BASE_ADDRESS_0, &io_base_l);
if (io_base_l != tp->pci_cfg_space.io_base_l) {
+ printk(KERN_ERR "%s: io_base_l = 0x%04x, should be 0x%04x \n.", dev->name, io_base_l, tp->pci_cfg_space.io_base_l);
pci_write_config_word(pdev, PCI_BASE_ADDRESS_0, tp->pci_cfg_space.io_base_l);
tp->esd_flag |= BIT_1;
}
pci_read_config_word(pdev, PCI_BASE_ADDRESS_2, &mem_base_l);
if (mem_base_l != tp->pci_cfg_space.mem_base_l) {
+ printk(KERN_ERR "%s: mem_base_l = 0x%04x, should be 0x%04x \n.", dev->name, mem_base_l, tp->pci_cfg_space.mem_base_l);
pci_write_config_word(pdev, PCI_BASE_ADDRESS_2, tp->pci_cfg_space.mem_base_l);
tp->esd_flag |= BIT_2;
}
pci_read_config_word(pdev, PCI_BASE_ADDRESS_2 + 2, &mem_base_h);
if (mem_base_h!= tp->pci_cfg_space.mem_base_h) {
+ printk(KERN_ERR "%s: mem_base_h = 0x%04x, should be 0x%04x \n.", dev->name, mem_base_h, tp->pci_cfg_space.mem_base_h);
pci_write_config_word(pdev, PCI_BASE_ADDRESS_2 + 2, tp->pci_cfg_space.mem_base_h);
tp->esd_flag |= BIT_3;
}
pci_read_config_word(pdev, PCI_BASE_ADDRESS_3, &resv_0x1c_l);
if (resv_0x1c_l != tp->pci_cfg_space.resv_0x1c_l) {
+ printk(KERN_ERR "%s: resv_0x1c_l = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x1c_l, tp->pci_cfg_space.resv_0x1c_l);
pci_write_config_word(pdev, PCI_BASE_ADDRESS_3, tp->pci_cfg_space.resv_0x1c_l);
tp->esd_flag |= BIT_4;
}
pci_read_config_word(pdev, PCI_BASE_ADDRESS_3 + 2, &resv_0x1c_h);
if (resv_0x1c_h != tp->pci_cfg_space.resv_0x1c_h) {
+ printk(KERN_ERR "%s: resv_0x1c_h = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x1c_h, tp->pci_cfg_space.resv_0x1c_h);
pci_write_config_word(pdev, PCI_BASE_ADDRESS_3 + 2, tp->pci_cfg_space.resv_0x1c_h);
tp->esd_flag |= BIT_5;
}
pci_read_config_word(pdev, PCI_BASE_ADDRESS_4, &resv_0x20_l);
if (resv_0x20_l != tp->pci_cfg_space.resv_0x20_l) {
+ printk(KERN_ERR "%s: resv_0x20_l = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x20_l, tp->pci_cfg_space.resv_0x20_l);
pci_write_config_word(pdev, PCI_BASE_ADDRESS_4, tp->pci_cfg_space.resv_0x20_l);
tp->esd_flag |= BIT_6;
}
pci_read_config_word(pdev, PCI_BASE_ADDRESS_4 + 2, &resv_0x20_h);
if (resv_0x20_h != tp->pci_cfg_space.resv_0x20_h) {
+ printk(KERN_ERR "%s: resv_0x20_h = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x20_h, tp->pci_cfg_space.resv_0x20_h);
pci_write_config_word(pdev, PCI_BASE_ADDRESS_4 + 2, tp->pci_cfg_space.resv_0x20_h);
tp->esd_flag |= BIT_7;
}
pci_read_config_word(pdev, PCI_BASE_ADDRESS_5, &resv_0x24_l);
if (resv_0x24_l != tp->pci_cfg_space.resv_0x24_l) {
+ printk(KERN_ERR "%s: resv_0x24_l = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x24_l, tp->pci_cfg_space.resv_0x24_l);
pci_write_config_word(pdev, PCI_BASE_ADDRESS_5, tp->pci_cfg_space.resv_0x24_l);
tp->esd_flag |= BIT_8;
}
pci_read_config_word(pdev, PCI_BASE_ADDRESS_5 + 2, &resv_0x24_h);
if (resv_0x24_h != tp->pci_cfg_space.resv_0x24_h) {
+ printk(KERN_ERR "%s: resv_0x24_h = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x24_h, tp->pci_cfg_space.resv_0x24_h);
pci_write_config_word(pdev, PCI_BASE_ADDRESS_5 + 2, tp->pci_cfg_space.resv_0x24_h);
tp->esd_flag |= BIT_9;
}
pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ilr);
if (ilr != tp->pci_cfg_space.ilr) {
+ printk(KERN_ERR "%s: ilr = 0x%02x, should be 0x%02x \n.", dev->name, ilr, tp->pci_cfg_space.ilr);
pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, tp->pci_cfg_space.ilr);
tp->esd_flag |= BIT_10;
}
pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &resv_0x2c_l);
if (resv_0x2c_l != tp->pci_cfg_space.resv_0x2c_l) {
+ printk(KERN_ERR "%s: resv_0x2c_l = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x2c_l, tp->pci_cfg_space.resv_0x2c_l);
pci_write_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, tp->pci_cfg_space.resv_0x2c_l);
tp->esd_flag |= BIT_11;
}
pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID + 2, &resv_0x2c_h);
if (resv_0x2c_h != tp->pci_cfg_space.resv_0x2c_h) {
+ printk(KERN_ERR "%s: resv_0x2c_h = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x2c_h, tp->pci_cfg_space.resv_0x2c_h);
pci_write_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID + 2, tp->pci_cfg_space.resv_0x2c_h);
tp->esd_flag |= BIT_12;
}
- pci_sn_l = rtl8125_csi_read(tp, PCI_DEVICE_SERIAL_NUMBER);
- if (pci_sn_l != tp->pci_cfg_space.pci_sn_l) {
- rtl8125_csi_write(tp, PCI_DEVICE_SERIAL_NUMBER, tp->pci_cfg_space.pci_sn_l);
- tp->esd_flag |= BIT_13;
- }
+ if (tp->HwPcieSNOffset > 0) {
+ pci_sn_l = rtl8125_csi_read(tp, tp->HwPcieSNOffset);
+ if (pci_sn_l != tp->pci_cfg_space.pci_sn_l) {
+ printk(KERN_ERR "%s: pci_sn_l = 0x%08x, should be 0x%08x \n.", dev->name, pci_sn_l, tp->pci_cfg_space.pci_sn_l);
+ rtl8125_csi_write(tp, tp->HwPcieSNOffset, tp->pci_cfg_space.pci_sn_l);
+ tp->esd_flag |= BIT_13;
+ }
- pci_sn_h = rtl8125_csi_read(tp, PCI_DEVICE_SERIAL_NUMBER + 4);
- if (pci_sn_h != tp->pci_cfg_space.pci_sn_h) {
- rtl8125_csi_write(tp, PCI_DEVICE_SERIAL_NUMBER + 4, tp->pci_cfg_space.pci_sn_h);
- tp->esd_flag |= BIT_14;
+ pci_sn_h = rtl8125_csi_read(tp, tp->HwPcieSNOffset + 4);
+ if (pci_sn_h != tp->pci_cfg_space.pci_sn_h) {
+ printk(KERN_ERR "%s: pci_sn_h = 0x%08x, should be 0x%08x \n.", dev->name, pci_sn_h, tp->pci_cfg_space.pci_sn_h);
+ rtl8125_csi_write(tp, tp->HwPcieSNOffset + 4, tp->pci_cfg_space.pci_sn_h);
+ tp->esd_flag |= BIT_14;
+ }
}
if (tp->esd_flag != 0) {
- printk("esd_flag = 0x%04x\n", tp->esd_flag);
- netif_stop_queue(dev);
+ printk(KERN_ERR "%s: esd_flag = 0x%04x\n.\n", dev->name, tp->esd_flag);
netif_carrier_off(dev);
+ netif_tx_disable(dev);
rtl8125_hw_reset(dev);
rtl8125_tx_clear(tp);
rtl8125_rx_clear(tp);
rtl8125_init_ring(dev);
- rtl8125_hw_init(dev);
- rtl8125_powerup_pll(dev);
- rtl8125_hw_ephy_config(dev);
- rtl8125_hw_phy_config(dev);
- rtl8125_hw_config(dev);
+ rtl8125_up(dev);
+ rtl8125_enable_hw_linkchg_interrupt(tp);
rtl8125_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
tp->esd_flag = 0;
}
- spin_unlock_irqrestore(&tp->lock, flags);
+exit:
+ return;
+}
+/*
+static void
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
+rtl8125_esd_timer(unsigned long __opaque)
+#else
+rtl8125_esd_timer(struct timer_list *t)
+#endif
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
+ struct net_device *dev = (struct net_device *)__opaque;
+ struct rtl8125_private *tp = netdev_priv(dev);
+ struct timer_list *timer = &tp->esd_timer;
+#else
+ struct rtl8125_private *tp = from_timer(tp, t, esd_timer);
+ //struct net_device *dev = tp->dev;
+ struct timer_list *timer = t;
+#endif
+ rtl8125_esd_checker(tp);
+
+ mod_timer(timer, jiffies + timeout);
+}
+*/
+
+/*
+static void
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
+rtl8125_link_timer(unsigned long __opaque)
+#else
+rtl8125_link_timer(struct timer_list *t)
+#endif
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
+ struct net_device *dev = (struct net_device *)__opaque;
+ struct rtl8125_private *tp = netdev_priv(dev);
+ struct timer_list *timer = &tp->link_timer;
+#else
+ struct rtl8125_private *tp = from_timer(tp, t, link_timer);
+ struct net_device *dev = tp->dev;
+ struct timer_list *timer = t;
+#endif
+ rtl8125_check_link_status(dev);
+
+ mod_timer(timer, jiffies + RTL8125_LINK_TIMEOUT);
+}
+*/
+
+int
+rtl8125_enable_msix(struct rtl8125_private *tp)
+{
+ int i, nvecs = 0;
+ struct msix_entry msix_ent[R8125_MAX_MSIX_VEC];
+ //struct net_device *dev = tp->dev;
+ //const int len = sizeof(tp->irq_tbl[0].name);
+
+ for (i = 0; i < R8125_MAX_MSIX_VEC; i++) {
+ msix_ent[i].entry = i;
+ msix_ent[i].vector = 0;
+ }
+
+ nvecs = pci_enable_msix_range(tp->pci_dev, msix_ent,
+ tp->min_irq_nvecs, tp->max_irq_nvecs);
+ if (nvecs < 0)
+ goto out;
+
+ for (i = 0; i < nvecs; i++) {
+ struct r8125_irq *irq = &tp->irq_tbl[i];
+ irq->vector = msix_ent[i].vector;
+ //snprintf(irq->name, len, "%s-%d", dev->name, i);
+ //irq->handler = rtl8125_interrupt_msix;
+ }
+
+out:
+ return nvecs;
+}
+
+void rtl8125_dump_msix_tbl(struct rtl8125_private *tp)
+{
+ void __iomem *ioaddr;
+
+ /* ioremap MMIO region */
+ ioaddr = ioremap(pci_resource_start(tp->pci_dev, 4), pci_resource_len(tp->pci_dev, 4));
+ if (ioaddr) {
+ int i = 0;
+ for (i=0; iirq_nvecs; i++) {
+ printk("entry 0x%d %08X %08X %08X %08X \n",
+ i,
+ readl(ioaddr + 16 * i),
+ readl(ioaddr + 16 * i + 4),
+ readl(ioaddr + 16 * i + 8),
+ readl(ioaddr + 16 * i + 12));
+ }
+ iounmap(ioaddr);
+ }
+}
+
+/* Cfg9346_Unlock assumed. */
+static int rtl8125_try_msi(struct rtl8125_private *tp)
+{
+ struct pci_dev *pdev = tp->pci_dev;
+ unsigned msi = 0;
+ int nvecs = 1;
+
+ tp->max_irq_nvecs = 1;
+ tp->min_irq_nvecs = 1;
+#ifndef DISABLE_MULTI_MSIX_VECTOR
+ switch (tp->mcfg) {
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ tp->max_irq_nvecs = R8125_MAX_MSIX_VEC_8125B;
+ tp->min_irq_nvecs = R8125_MIN_MSIX_VEC_8125B;
+ break;
+ }
+#endif
+
+#if defined(RTL_USE_NEW_INTR_API)
+ if ((nvecs = pci_alloc_irq_vectors(pdev, tp->min_irq_nvecs, tp->max_irq_nvecs, PCI_IRQ_MSIX)) > 0)
+ msi |= RTL_FEATURE_MSIX;
+ else if ((nvecs = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES)) > 0 &&
+ pci_dev_msi_enabled(pdev))
+ msi |= RTL_FEATURE_MSI;
+#elif LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
+ if ((nvecs = rtl8125_enable_msix(tp)) > 0)
+ msi |= RTL_FEATURE_MSIX;
+ else if (!pci_enable_msi(pdev))
+ msi |= RTL_FEATURE_MSI;
+#endif
+ if (!(msi & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX)))
+ dev_info(&pdev->dev, "no MSI/MSI-X. Back to INTx.\n");
+
+ if (!(msi & RTL_FEATURE_MSIX) || nvecs < 1)
+ nvecs = 1;
+
+ tp->irq_nvecs = nvecs;
+
+ tp->features |= msi;
+
+ return nvecs;
+}
+
+static void rtl8125_disable_msi(struct pci_dev *pdev, struct rtl8125_private *tp)
+{
+#if defined(RTL_USE_NEW_INTR_API)
+ if (tp->features & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX))
+ pci_free_irq_vectors(pdev);
+#elif LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
+ if (tp->features & (RTL_FEATURE_MSIX))
+ pci_disable_msix(pdev);
+ else if (tp->features & (RTL_FEATURE_MSI))
+ pci_disable_msi(pdev);
+#endif
+ tp->features &= ~(RTL_FEATURE_MSI | RTL_FEATURE_MSIX);
+}
+
+static int rtl8125_get_irq(struct pci_dev *pdev)
+{
+#if defined(RTL_USE_NEW_INTR_API)
+ return pci_irq_vector(pdev, 0);
+#else
+ return pdev->irq;
+#endif
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,11,0)
+static void
+rtl8125_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+ struct rtl8125_counters *counters = tp->tally_vaddr;
+ dma_addr_t paddr = tp->tally_paddr;
+
+ if (!counters)
+ return;
+
+ netdev_stats_to_stats64(stats, &dev->stats);
+ dev_fetch_sw_netstats(stats, dev->tstats);
+
+ /*
+ * Fetch additional counter values missing in stats collected by driver
+ * from tally counters.
+ */
+ rtl8125_dump_tally_counter(tp, paddr);
+
+ stats->tx_errors = le64_to_cpu(counters->tx_errors);
+ stats->collisions = le32_to_cpu(counters->tx_multi_collision);
+ stats->tx_aborted_errors = le16_to_cpu(counters->tx_aborted) ;
+ stats->rx_missed_errors = le16_to_cpu(counters->rx_missed);
+}
+#else
+/**
+ * rtl8125_get_stats - Get rtl8125 read/write statistics
+ * @dev: The Ethernet Device to get statistics for
+ *
+ * Get TX/RX statistics for rtl8125
+ */
+static struct
+net_device_stats *rtl8125_get_stats(struct net_device *dev)
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
+ struct rtl8125_private *tp = netdev_priv(dev);
+#endif
+ return &RTLDEV->stats;
+}
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
+static const struct net_device_ops rtl8125_netdev_ops = {
+ .ndo_open = rtl8125_open,
+ .ndo_stop = rtl8125_close,
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,11,0)
+ .ndo_get_stats64 = rtl8125_get_stats64,
+#else
+ .ndo_get_stats = rtl8125_get_stats,
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,11,0)
+ .ndo_start_xmit = rtl8125_start_xmit,
+ .ndo_tx_timeout = rtl8125_tx_timeout,
+ .ndo_change_mtu = rtl8125_change_mtu,
+ .ndo_set_mac_address = rtl8125_set_mac_address,
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)
+ .ndo_do_ioctl = rtl8125_do_ioctl,
+#else
+ .ndo_siocdevprivate = rtl8125_siocdevprivate,
+ .ndo_eth_ioctl = rtl8125_do_ioctl,
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)
+ .ndo_set_multicast_list = rtl8125_set_rx_mode,
+#else
+ .ndo_set_rx_mode = rtl8125_set_rx_mode,
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+#ifdef CONFIG_R8125_VLAN
+ .ndo_vlan_rx_register = rtl8125_vlan_rx_register,
+#endif
+#else
+ .ndo_fix_features = rtl8125_fix_features,
+ .ndo_set_features = rtl8125_set_features,
+#endif
+#ifdef CONFIG_NET_POLL_CONTROLLER
+ .ndo_poll_controller = rtl8125_netpoll,
+#endif
+};
+#endif
+
+
+#ifdef CONFIG_R8125_NAPI
+
+static int rtl8125_poll(napi_ptr napi, napi_budget budget)
+{
+ struct r8125_napi *r8125napi = RTL_GET_PRIV(napi, struct r8125_napi);
+ struct rtl8125_private *tp = r8125napi->priv;
+ RTL_GET_NETDEV(tp)
+ unsigned int work_to_do = RTL_NAPI_QUOTA(budget, dev);
+ unsigned int work_done = 0;
+ int i;
+
+ for (i = 0; i < tp->num_tx_rings; i++)
+ rtl8125_tx_interrupt(&tp->tx_ring[i], budget);
+
+ for (i = 0; i < tp->num_rx_rings; i++)
+ work_done += rtl8125_rx_interrupt(dev, tp, &tp->rx_ring[i], budget);
+
+ RTL_NAPI_QUOTA_UPDATE(dev, work_done, budget);
+
+ if (work_done < work_to_do) {
+#ifdef ENABLE_DASH_SUPPORT
+ if (tp->DASH)
+ HandleDashInterrupt(tp->dev);
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0)
+ if (RTL_NETIF_RX_COMPLETE(dev, napi, work_done) == FALSE) return RTL_NAPI_RETURN_VALUE;
+#else
+ RTL_NETIF_RX_COMPLETE(dev, napi, work_done);
+#endif
+ /*
+ * 20040426: the barrier is not strictly required but the
+ * behavior of the irq handler could be less predictable
+ * without it. Btw, the lack of flush for the posted pci
+ * write is safe - FR
+ */
+ smp_wmb();
+
+ rtl8125_switch_to_timer_interrupt(tp);
+ }
+
+ return RTL_NAPI_RETURN_VALUE;
+}
+
+#if 0
+static int rtl8125_poll_msix_ring(napi_ptr napi, napi_budget budget)
+{
+ struct r8125_napi *r8125napi = RTL_GET_PRIV(napi, struct r8125_napi);
+ struct rtl8125_private *tp = r8125napi->priv;
+ RTL_GET_NETDEV(tp)
+ unsigned int work_to_do = RTL_NAPI_QUOTA(budget, dev);
+ unsigned int work_done = 0;
+ const int message_id = r8125napi->index;
+
+ rtl8125_tx_interrupt_with_vector(tp, message_id, budget);
+
+ work_done += rtl8125_rx_interrupt(dev, tp, &tp->rx_ring[message_id], budget);
+
+ RTL_NAPI_QUOTA_UPDATE(dev, work_done, budget);
+
+ if (work_done < work_to_do) {
+#ifdef ENABLE_DASH_SUPPORT
+ if (tp->DASH && message_id == 0)
+ HandleDashInterrupt(tp->dev);
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0)
+ if (RTL_NETIF_RX_COMPLETE(dev, napi, work_done) == FALSE) return RTL_NAPI_RETURN_VALUE;
+#else
+ RTL_NETIF_RX_COMPLETE(dev, napi, work_done);
+#endif
+ /*
+ * 20040426: the barrier is not strictly required but the
+ * behavior of the irq handler could be less predictable
+ * without it. Btw, the lack of flush for the posted pci
+ * write is safe - FR
+ */
+ smp_wmb();
+
+ rtl8125_enable_hw_interrupt_v2(tp, message_id);
+ }
+
+ return RTL_NAPI_RETURN_VALUE;
+}
+#endif
+
+static int rtl8125_poll_msix_tx(napi_ptr napi, napi_budget budget)
+{
+ struct r8125_napi *r8125napi = RTL_GET_PRIV(napi, struct r8125_napi);
+ struct rtl8125_private *tp = r8125napi->priv;
+ RTL_GET_NETDEV(tp)
+ unsigned int work_to_do = RTL_NAPI_QUOTA(budget, dev);
+ unsigned int work_done = 0;
+ const int message_id = r8125napi->index;
+
+ //suppress unused variable
+ (void)(dev);
+
+ rtl8125_tx_interrupt_with_vector(tp, message_id, budget);
+
+ RTL_NAPI_QUOTA_UPDATE(dev, work_done, budget);
+
+ if (work_done < work_to_do) {
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0)
+ if (RTL_NETIF_RX_COMPLETE(dev, napi, work_done) == FALSE) return RTL_NAPI_RETURN_VALUE;
+#else
+ RTL_NETIF_RX_COMPLETE(dev, napi, work_done);
+#endif
+ /*
+ * 20040426: the barrier is not strictly required but the
+ * behavior of the irq handler could be less predictable
+ * without it. Btw, the lack of flush for the posted pci
+ * write is safe - FR
+ */
+ smp_wmb();
+
+ rtl8125_enable_hw_interrupt_v2(tp, message_id);
+ }
- mod_timer(timer, jiffies + timeout);
+ return RTL_NAPI_RETURN_VALUE;
}
-static void
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
-rtl8125_link_timer(unsigned long __opaque)
-#else
-rtl8125_link_timer(struct timer_list *t)
-#endif
+static int rtl8125_poll_msix_other(napi_ptr napi, napi_budget budget)
{
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
- struct net_device *dev = (struct net_device *)__opaque;
- struct rtl8125_private *tp = netdev_priv(dev);
- struct timer_list *timer = &tp->link_timer;
+ struct r8125_napi *r8125napi = RTL_GET_PRIV(napi, struct r8125_napi);
+ struct rtl8125_private *tp = r8125napi->priv;
+ RTL_GET_NETDEV(tp)
+ unsigned int work_to_do = RTL_NAPI_QUOTA(budget, dev);
+ const int message_id = r8125napi->index;
+
+ //suppress unused variable
+ (void)(dev);
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0)
+ RTL_NETIF_RX_COMPLETE(dev, napi, work_to_do);
#else
- struct rtl8125_private *tp = from_timer(tp, t, link_timer);
- struct net_device *dev = tp->dev;
- struct timer_list *timer = t;
+ RTL_NETIF_RX_COMPLETE(dev, napi, work_to_do);
#endif
- unsigned long flags;
- spin_lock_irqsave(&tp->lock, flags);
- rtl8125_check_link_status(dev);
- spin_unlock_irqrestore(&tp->lock, flags);
+ rtl8125_enable_hw_interrupt_v2(tp, message_id);
- mod_timer(timer, jiffies + RTL8125_LINK_TIMEOUT);
+ return 1;
}
-/* Cfg9346_Unlock assumed. */
-static unsigned rtl8125_try_msi(struct pci_dev *pdev, struct rtl8125_private *tp)
+static int rtl8125_poll_msix_rx(napi_ptr napi, napi_budget budget)
{
- unsigned msi = 0;
+ struct r8125_napi *r8125napi = RTL_GET_PRIV(napi, struct r8125_napi);
+ struct rtl8125_private *tp = r8125napi->priv;
+ RTL_GET_NETDEV(tp)
+ unsigned int work_to_do = RTL_NAPI_QUOTA(budget, dev);
+ unsigned int work_done = 0;
+ const int message_id = r8125napi->index;
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
- if (pci_enable_msi(pdev))
- dev_info(&pdev->dev, "no MSI. Back to INTx.\n");
- else
- msi |= RTL_FEATURE_MSI;
+ work_done += rtl8125_rx_interrupt(dev, tp, &tp->rx_ring[message_id], budget);
+
+ RTL_NAPI_QUOTA_UPDATE(dev, work_done, budget);
+
+ if (work_done < work_to_do) {
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0)
+ if (RTL_NETIF_RX_COMPLETE(dev, napi, work_done) == FALSE) return RTL_NAPI_RETURN_VALUE;
+#else
+ RTL_NETIF_RX_COMPLETE(dev, napi, work_done);
#endif
+ /*
+ * 20040426: the barrier is not strictly required but the
+ * behavior of the irq handler could be less predictable
+ * without it. Btw, the lack of flush for the posted pci
+ * write is safe - FR
+ */
+ smp_wmb();
+
+ rtl8125_enable_hw_interrupt_v2(tp, message_id);
+ }
- return msi;
+ return RTL_NAPI_RETURN_VALUE;
}
-static void rtl8125_disable_msi(struct pci_dev *pdev, struct rtl8125_private *tp)
+void rtl8125_enable_napi(struct rtl8125_private *tp)
{
- if (tp->features & RTL_FEATURE_MSI) {
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
- pci_disable_msi(pdev);
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+ int i;
+
+ for (i = 0; i < tp->irq_nvecs; i++)
+ RTL_NAPI_ENABLE(tp->dev, &tp->r8125napi[i].napi);
#endif
- tp->features &= ~RTL_FEATURE_MSI;
- }
}
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
-static const struct net_device_ops rtl8125_netdev_ops = {
- .ndo_open = rtl8125_open,
- .ndo_stop = rtl8125_close,
- .ndo_get_stats = rtl8125_get_stats,
- .ndo_start_xmit = rtl8125_start_xmit,
- .ndo_tx_timeout = rtl8125_tx_timeout,
- .ndo_change_mtu = rtl8125_change_mtu,
- .ndo_set_mac_address = rtl8125_set_mac_address,
- .ndo_do_ioctl = rtl8125_do_ioctl,
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)
- .ndo_set_multicast_list = rtl8125_set_rx_mode,
-#else
- .ndo_set_rx_mode = rtl8125_set_rx_mode,
-#endif
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
-#ifdef CONFIG_R8125_VLAN
- .ndo_vlan_rx_register = rtl8125_vlan_rx_register,
-#endif
-#else
- .ndo_fix_features = rtl8125_fix_features,
- .ndo_set_features = rtl8125_set_features,
+static void rtl8125_disable_napi(struct rtl8125_private *tp)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+ int i;
+
+ for (i = 0; i < tp->irq_nvecs; i++)
+ RTL_NAPI_DISABLE(tp->dev, &tp->r8125napi[i].napi);
#endif
-#ifdef CONFIG_NET_POLL_CONTROLLER
- .ndo_poll_controller = rtl8125_netpoll,
+}
+
+static void rtl8125_del_napi(struct rtl8125_private *tp)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+ int i;
+
+ for (i = 0; i < tp->irq_nvecs; i++)
+ RTL_NAPI_DEL((&tp->r8125napi[i]));
#endif
-};
+}
+#endif //CONFIG_R8125_NAPI
+
+static void rtl8125_init_napi(struct rtl8125_private *tp)
+{
+ int i;
+
+ for (i=0; iirq_nvecs; i++) {
+ struct r8125_napi *r8125napi = &tp->r8125napi[i];
+#ifdef CONFIG_R8125_NAPI
+ int (*poll)(struct napi_struct *, int);
+
+ if (tp->features & RTL_FEATURE_MSIX &&
+ tp->HwCurrIsrVer == 2) {
+ if (i < R8125_MAX_RX_QUEUES_VEC_V3)
+ poll = rtl8125_poll_msix_rx;
+ else if (i == 16 || i == 18)
+ poll = rtl8125_poll_msix_tx;
+ else
+ poll = rtl8125_poll_msix_other;
+ } else {
+ poll = rtl8125_poll;
+ }
+
+ RTL_NAPI_CONFIG(tp->dev, r8125napi, poll, R8125_NAPI_WEIGHT);
#endif
+ r8125napi->priv = tp;
+ r8125napi->index = i;
+ }
+}
+
+static int
+rtl8125_set_real_num_queue(struct rtl8125_private *tp)
+{
+ int retval = 0;
+
+ retval = netif_set_real_num_tx_queues(tp->dev, tp->num_tx_rings);
+ if (retval < 0)
+ goto exit;
+
+ retval = netif_set_real_num_rx_queues(tp->dev, tp->num_rx_rings);
+ if (retval < 0)
+ goto exit;
+
+exit:
+ return retval;
+}
+
static int __devinit
rtl8125_init_one(struct pci_dev *pdev,
const struct pci_device_id *ent)
@@ -8485,14 +13825,28 @@ rtl8125_init_one(struct pci_dev *pdev,
tp = netdev_priv(dev);
assert(ioaddr != NULL);
- tp->mmio_addr = ioaddr;
tp->set_speed = rtl8125_set_speed_xmii;
tp->get_settings = rtl8125_gset_xmii;
tp->phy_reset_enable = rtl8125_xmii_reset_enable;
tp->phy_reset_pending = rtl8125_xmii_reset_pending;
tp->link_ok = rtl8125_xmii_link_ok;
- tp->features |= rtl8125_try_msi(pdev, tp);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,11,0)
+ dev->tstats = devm_netdev_alloc_pcpu_stats(&pdev->dev,
+ struct pcpu_sw_netstats);
+ if (!dev->tstats)
+ goto err_out_1;
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,11,0)
+
+ rc = rtl8125_try_msi(tp);
+ if (rc < 0) {
+ dev_err(&pdev->dev, "Can't allocate interrupt\n");
+ goto err_out_1;
+ }
+#ifdef ENABLE_PTP_SUPPORT
+ spin_lock_init(&tp->lock);
+#endif
+ rtl8125_init_software_variable(dev);
RTL_NET_DEVICE_OPS(rtl8125_netdev_ops);
@@ -8501,12 +13855,10 @@ rtl8125_init_one(struct pci_dev *pdev,
#endif
dev->watchdog_timeo = RTL8125_TX_TIMEOUT;
- dev->irq = pdev->irq;
+ dev->irq = rtl8125_get_irq(pdev);
dev->base_addr = (unsigned long) ioaddr;
-#ifdef CONFIG_R8125_NAPI
- RTL_NAPI_CONFIG(dev, tp, rtl8125_poll, R8125_NAPI_WEIGHT);
-#endif
+ rtl8125_init_napi(tp);
#ifdef CONFIG_R8125_VLAN
if (tp->mcfg != CFG_METHOD_DEFAULT) {
@@ -8517,13 +13869,18 @@ rtl8125_init_one(struct pci_dev *pdev,
}
#endif
- tp->cp_cmd |= RTL_R16(CPlusCmd);
+ /* There has been a number of reports that using SG/TSO results in
+ * tx timeouts. However for a lot of people SG/TSO works fine.
+ * Therefore disable both features by default, but allow users to
+ * enable them. Use at own risk!
+ */
+ tp->cp_cmd |= RTL_R16(tp, CPlusCmd);
if (tp->mcfg != CFG_METHOD_DEFAULT) {
dev->features |= NETIF_F_IP_CSUM;
#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
tp->cp_cmd |= RxChkSum;
#else
- dev->features |= NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_TSO;
+ dev->features |= NETIF_F_RXCSUM;
dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
NETIF_F_RXCSUM | NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
dev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
@@ -8535,7 +13892,11 @@ rtl8125_init_one(struct pci_dev *pdev,
dev->hw_features |= NETIF_F_RXFCS;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
dev->hw_features |= NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
- dev->features |= NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
+ dev->features |= NETIF_F_IPV6_CSUM;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0)
+ netif_set_tso_max_size(dev, LSO_64K);
+ netif_set_tso_max_segs(dev, NIC_MAX_PHYS_BUF_COUNT_LSO2);
+#else //LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0)
netif_set_gso_max_size(dev, LSO_64K);
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,0)
dev->gso_max_segs = NIC_MAX_PHYS_BUF_COUNT_LSO2;
@@ -8543,24 +13904,37 @@ rtl8125_init_one(struct pci_dev *pdev,
dev->gso_min_segs = NIC_MIN_PHYS_BUF_COUNT;
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0)
#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,0)
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0)
#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
- }
-
- tp->pci_dev = pdev;
- spin_lock_init(&tp->lock);
-
- rtl8125_init_software_variable(dev);
+#ifdef ENABLE_RSS_SUPPORT
+ if (tp->EnableRss) {
+ dev->hw_features |= NETIF_F_RXHASH;
+ dev->features |= NETIF_F_RXHASH;
+ }
+#endif
+ }
#ifdef ENABLE_DASH_SUPPORT
if (tp->DASH)
AllocateDashShareMemory(dev);
#endif
+#ifdef ENABLE_LIB_SUPPORT
+ ATOMIC_INIT_NOTIFIER_HEAD(&tp->lib_nh);
+#endif
+ rtl8125_init_all_schedule_work(tp);
+
+ rc = rtl8125_set_real_num_queue(tp);
+ if (rc < 0)
+ goto err_out;
+
rtl8125_exit_oob(dev);
+ rtl8125_powerup_pll(dev);
+
rtl8125_hw_init(dev);
rtl8125_hw_reset(dev);
@@ -8569,11 +13943,14 @@ rtl8125_init_one(struct pci_dev *pdev,
rtl8125_eeprom_type(tp);
if (tp->eeprom_type == EEPROM_TYPE_93C46 || tp->eeprom_type == EEPROM_TYPE_93C56)
- rtl8125_set_eeprom_sel_low(ioaddr);
+ rtl8125_set_eeprom_sel_low(tp);
rtl8125_get_mac_address(dev);
- tp->tally_vaddr = pci_alloc_consistent(pdev, sizeof(*tp->tally_vaddr), &tp->tally_paddr);
+ tp->fw_name = rtl_chip_fw_infos[tp->mcfg].fw_name;
+
+ tp->tally_vaddr = dma_alloc_coherent(&pdev->dev, sizeof(*tp->tally_vaddr),
+ &tp->tally_paddr, GFP_KERNEL);
if (!tp->tally_vaddr) {
rc = -ENOMEM;
goto err_out;
@@ -8589,6 +13966,8 @@ rtl8125_init_one(struct pci_dev *pdev,
printk(KERN_INFO "%s: This product is covered by one or more of the following patents: US6,570,884, US6,115,776, and US6,327,625.\n", MODULENAME);
+ rtl8125_disable_rxdvgate(dev);
+
device_set_wakeup_enable(&pdev->dev, tp->wol_enabled);
netif_carrier_off(dev);
@@ -8600,63 +13979,321 @@ rtl8125_init_one(struct pci_dev *pdev,
err_out:
if (tp->tally_vaddr != NULL) {
- pci_free_consistent(pdev, sizeof(*tp->tally_vaddr), tp->tally_vaddr,
- tp->tally_paddr);
+ dma_free_coherent(&pdev->dev, sizeof(*tp->tally_vaddr), tp->tally_vaddr,
+ tp->tally_paddr);
tp->tally_vaddr = NULL;
}
#ifdef CONFIG_R8125_NAPI
- RTL_NAPI_DEL(tp);
+ rtl8125_del_napi(tp);
+#endif
+ rtl8125_disable_msi(pdev, tp);
+
+err_out_1:
+ rtl8125_release_board(pdev, dev);
+
+ goto out;
+}
+
+static void __devexit
+rtl8125_remove_one(struct pci_dev *pdev)
+{
+ struct net_device *dev = pci_get_drvdata(pdev);
+ struct rtl8125_private *tp = netdev_priv(dev);
+
+ assert(dev != NULL);
+ assert(tp != NULL);
+
+ set_bit(R8125_FLAG_DOWN, tp->task_flags);
+
+ rtl8125_cancel_all_schedule_work(tp);
+
+#ifdef CONFIG_R8125_NAPI
+ rtl8125_del_napi(tp);
#endif
+ if (HW_DASH_SUPPORT_DASH(tp))
+ rtl8125_driver_stop(tp);
+
+ unregister_netdev(dev);
rtl8125_disable_msi(pdev, tp);
- rtl8125_release_board(pdev, dev, ioaddr);
+#ifdef ENABLE_R8125_PROCFS
+ rtl8125_proc_remove(dev);
+#endif
+ if (tp->tally_vaddr != NULL) {
+ dma_free_coherent(&pdev->dev, sizeof(*tp->tally_vaddr), tp->tally_vaddr, tp->tally_paddr);
+ tp->tally_vaddr = NULL;
+ }
+
+ rtl8125_release_board(pdev, dev);
+
+#ifdef ENABLE_USE_FIRMWARE_FILE
+ rtl8125_release_firmware(tp);
+#endif
+
+ pci_set_drvdata(pdev, NULL);
+}
+
+#ifdef ENABLE_PAGE_REUSE
+static inline unsigned int rtl8125_rx_page_order(unsigned rx_buf_sz, unsigned page_size)
+{
+ unsigned truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
+ SKB_DATA_ALIGN(rx_buf_sz + R8125_RX_ALIGN);
+
+ return get_order(truesize * 2);
+}
+#endif //ENABLE_PAGE_REUSE
+
+static void
+rtl8125_set_rxbufsize(struct rtl8125_private *tp,
+ struct net_device *dev)
+{
+ unsigned int mtu = dev->mtu;
+
+ tp->rms = (mtu > ETH_DATA_LEN) ? mtu + ETH_HLEN + 8 + 1 : RX_BUF_SIZE;
+ tp->rx_buf_sz = tp->rms;
+#ifdef ENABLE_RX_PACKET_FRAGMENT
+ tp->rx_buf_sz = SKB_DATA_ALIGN(RX_BUF_SIZE);
+#endif //ENABLE_RX_PACKET_FRAGMENT
+#ifdef ENABLE_PAGE_REUSE
+ tp->rx_buf_page_order = rtl8125_rx_page_order(tp->rx_buf_sz, PAGE_SIZE);
+ tp->rx_buf_page_size = rtl8125_rx_page_size(tp->rx_buf_page_order);
+#endif //ENABLE_PAGE_REUSE
+}
+
+static void rtl8125_free_irq(struct rtl8125_private *tp)
+{
+ int i;
+
+ for (i=0; iirq_nvecs; i++) {
+ struct r8125_irq *irq = &tp->irq_tbl[i];
+ struct r8125_napi *r8125napi = &tp->r8125napi[i];
+
+ if (irq->requested) {
+ irq->requested = 0;
+#if defined(RTL_USE_NEW_INTR_API)
+ pci_free_irq(tp->pci_dev, i, r8125napi);
+#else
+ free_irq(irq->vector, r8125napi);
+#endif
+ }
+ }
+}
+
+static int rtl8125_alloc_irq(struct rtl8125_private *tp)
+{
+ struct net_device *dev = tp->dev;
+ int rc = 0;
+ struct r8125_irq *irq;
+ struct r8125_napi *r8125napi;
+ int i = 0;
+ const int len = sizeof(tp->irq_tbl[0].name);
+
+#if defined(RTL_USE_NEW_INTR_API)
+ for (i=0; iirq_nvecs; i++) {
+ irq = &tp->irq_tbl[i];
+ if (tp->features & RTL_FEATURE_MSIX &&
+ tp->HwCurrIsrVer == 2)
+ irq->handler = rtl8125_interrupt_msix;
+ else
+ irq->handler = rtl8125_interrupt;
+
+ r8125napi = &tp->r8125napi[i];
+ snprintf(irq->name, len, "%s-%d", dev->name, i);
+ rc = pci_request_irq(tp->pci_dev, i, irq->handler, NULL, r8125napi,
+ irq->name);
+ if (rc)
+ break;
+
+ irq->vector = pci_irq_vector(tp->pci_dev, i);
+ irq->requested = 1;
+ }
+#else
+ unsigned long irq_flags = 0;
+#ifdef ENABLE_LIB_SUPPORT
+ irq_flags |= IRQF_NO_SUSPEND;
+#endif
+ if (tp->features & RTL_FEATURE_MSIX &&
+ tp->HwCurrIsrVer == 2) {
+ for (i=0; iirq_nvecs; i++) {
+ irq = &tp->irq_tbl[i];
+ irq->handler = rtl8125_interrupt_msix;
+ r8125napi = &tp->r8125napi[i];
+ snprintf(irq->name, len, "%s-%d", dev->name, i);
+ rc = request_irq(irq->vector, irq->handler, irq_flags, irq->name, r8125napi);
+
+ if (rc)
+ break;
+
+ irq->requested = 1;
+ }
+ } else {
+ irq = &tp->irq_tbl[0];
+ irq->handler = rtl8125_interrupt;
+ r8125napi = &tp->r8125napi[0];
+ snprintf(irq->name, len, "%s-0", dev->name);
+ if (!(tp->features & RTL_FEATURE_MSIX))
+ irq->vector = dev->irq;
+ irq_flags |= (tp->features & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX)) ? 0 : SA_SHIRQ;
+ rc = request_irq(irq->vector, irq->handler, irq_flags, irq->name, r8125napi);
+
+ if (rc == 0)
+ irq->requested = 1;
+ }
+#endif
+ if (rc)
+ rtl8125_free_irq(tp);
+
+ return rc;
+}
+
+static int rtl8125_alloc_tx_desc(struct rtl8125_private *tp)
+{
+ struct rtl8125_tx_ring *ring;
+ struct pci_dev *pdev = tp->pci_dev;
+ int i;
+
+ for (i = 0; i < tp->num_tx_rings; i++) {
+ ring = &tp->tx_ring[i];
+ ring->TxDescAllocSize = (ring->num_tx_desc + 1) * sizeof(struct TxDesc);
+ ring->TxDescArray = dma_alloc_coherent(&pdev->dev,
+ ring->TxDescAllocSize,
+ &ring->TxPhyAddr,
+ GFP_KERNEL);
+
+ if (!ring->TxDescArray)
+ return -1;
+ }
+
+ return 0;
+}
+
+static int rtl8125_alloc_rx_desc(struct rtl8125_private *tp)
+{
+ struct rtl8125_rx_ring *ring;
+ struct pci_dev *pdev = tp->pci_dev;
+ int i;
+
+ for (i = 0; i < tp->num_rx_rings; i++) {
+ ring = &tp->rx_ring[i];
+ ring->RxDescAllocSize = (ring->num_rx_desc + 1) * tp->RxDescLength;
+ ring->RxDescArray = dma_alloc_coherent(&pdev->dev,
+ ring->RxDescAllocSize,
+ &ring->RxPhyAddr,
+ GFP_KERNEL);
+
+ if (!ring->RxDescArray)
+ return -1;
+ }
+
+ return 0;
+}
+
+static int rtl8125_alloc_patch_mem(struct rtl8125_private *tp)
+{
+ struct pci_dev *pdev = tp->pci_dev;
+
+ if (tp->RequireRduNonStopPatch) {
+ tp->ShortPacketEmptyBuffer = dma_alloc_coherent(&pdev->dev,
+ SHORT_PACKET_PADDING_BUF_SIZE,
+ &tp->ShortPacketEmptyBufferPhy,
+ GFP_KERNEL);
+ if (!tp->ShortPacketEmptyBuffer)
+ return -1;
+
+ memset(tp->ShortPacketEmptyBuffer, 0x0, SHORT_PACKET_PADDING_BUF_SIZE);
+ }
+
+ return 0;
+}
+
+static void rtl8125_free_tx_desc(struct rtl8125_private *tp)
+{
+ struct rtl8125_tx_ring *ring;
+ struct pci_dev *pdev = tp->pci_dev;
+ int i;
- goto out;
+ for (i = 0; i < tp->num_tx_rings; i++) {
+ ring = &tp->tx_ring[i];
+ if (ring->TxDescArray) {
+ dma_free_coherent(&pdev->dev,
+ ring->TxDescAllocSize,
+ ring->TxDescArray,
+ ring->TxPhyAddr);
+ ring->TxDescArray = NULL;
+ }
+ }
}
-static void __devexit
-rtl8125_remove_one(struct pci_dev *pdev)
+static void rtl8125_free_rx_desc(struct rtl8125_private *tp)
{
- struct net_device *dev = pci_get_drvdata(pdev);
- struct rtl8125_private *tp = netdev_priv(dev);
+ struct rtl8125_rx_ring *ring;
+ struct pci_dev *pdev = tp->pci_dev;
+ int i;
- assert(dev != NULL);
- assert(tp != NULL);
+ for (i = 0; i < tp->num_rx_rings; i++) {
+ ring = &tp->rx_ring[i];
+ if (ring->RxDescArray) {
+ dma_free_coherent(&pdev->dev,
+ ring->RxDescAllocSize,
+ ring->RxDescArray,
+ ring->RxPhyAddr);
+ ring->RxDescArray = NULL;
+ }
+ }
+}
-#ifdef CONFIG_R8125_NAPI
- RTL_NAPI_DEL(tp);
-#endif
- if (tp->DASH)
- rtl8125_driver_stop(tp);
+static void rtl8125_free_patch_mem(struct rtl8125_private *tp)
+{
+ struct pci_dev *pdev = tp->pci_dev;
- unregister_netdev(dev);
- rtl8125_disable_msi(pdev, tp);
-#ifdef ENABLE_R8125_PROCFS
- rtl8125_proc_remove(dev);
-#endif
- if (tp->tally_vaddr != NULL) {
- pci_free_consistent(pdev, sizeof(*tp->tally_vaddr), tp->tally_vaddr, tp->tally_paddr);
- tp->tally_vaddr = NULL;
+ if (tp->ShortPacketEmptyBuffer) {
+ dma_free_coherent(&pdev->dev,
+ SHORT_PACKET_PADDING_BUF_SIZE,
+ tp->ShortPacketEmptyBuffer,
+ tp->ShortPacketEmptyBufferPhy);
+ tp->ShortPacketEmptyBuffer = NULL;
}
+}
- rtl8125_release_board(pdev, dev, tp->mmio_addr);
- pci_set_drvdata(pdev, NULL);
+static void rtl8125_free_alloc_resources(struct rtl8125_private *tp)
+{
+ rtl8125_free_rx_desc(tp);
+
+ rtl8125_free_tx_desc(tp);
+
+ rtl8125_free_patch_mem(tp);
}
-static void
-rtl8125_set_rxbufsize(struct rtl8125_private *tp,
- struct net_device *dev)
+#ifdef ENABLE_USE_FIRMWARE_FILE
+static void rtl8125_request_firmware(struct rtl8125_private *tp)
{
- unsigned int mtu = dev->mtu;
+ struct rtl8125_fw *rtl_fw;
+
+ /* firmware loaded already or no firmware available */
+ if (tp->rtl_fw || !tp->fw_name)
+ return;
+
+ rtl_fw = kzalloc(sizeof(*rtl_fw), GFP_KERNEL);
+ if (!rtl_fw)
+ return;
+
+ rtl_fw->phy_write = rtl8125_mdio_write;
+ rtl_fw->phy_read = rtl8125_mdio_read;
+ rtl_fw->mac_mcu_write = mac_mcu_write;
+ rtl_fw->mac_mcu_read = mac_mcu_read;
+ rtl_fw->fw_name = tp->fw_name;
+ rtl_fw->dev = tp_to_dev(tp);
- tp->rx_buf_sz = (mtu > ETH_DATA_LEN) ? mtu + ETH_HLEN + 8 + 1 : RX_BUF_SIZE;
+ if (rtl8125_fw_request_firmware(rtl_fw))
+ kfree(rtl_fw);
+ else
+ tp->rtl_fw = rtl_fw;
}
+#endif
-static int rtl8125_open(struct net_device *dev)
+int rtl8125_open(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- struct pci_dev *pdev = tp->pci_dev;
- unsigned long flags;
int retval;
retval = -ENOMEM;
@@ -8669,26 +14306,18 @@ static int rtl8125_open(struct net_device *dev)
* Rx and Tx descriptors needs 256 bytes alignment.
* pci_alloc_consistent provides more.
*/
- tp->TxDescArray = pci_alloc_consistent(pdev, R8125_TX_RING_BYTES,
- &tp->TxPhyAddr);
- if (!tp->TxDescArray)
+ if (rtl8125_alloc_tx_desc(tp) < 0 || rtl8125_alloc_rx_desc(tp) < 0)
goto err_free_all_allocated_mem;
- tp->RxDescArray = pci_alloc_consistent(pdev, R8125_RX_RING_BYTES,
- &tp->RxPhyAddr);
- if (!tp->RxDescArray)
+ retval = rtl8125_init_ring(dev);
+ if (retval < 0)
goto err_free_all_allocated_mem;
- if (tp->UseSwPaddingShortPkt) {
- tp->ShortPacketEmptyBuffer = pci_alloc_consistent(pdev, SHORT_PACKET_PADDING_BUF_SIZE,
- &tp->ShortPacketEmptyBufferPhy);
- if (!tp->ShortPacketEmptyBuffer)
- goto err_free_all_allocated_mem;
-
- memset(tp->ShortPacketEmptyBuffer, 0x0, SHORT_PACKET_PADDING_BUF_SIZE);
- }
+ retval = rtl8125_alloc_patch_mem(tp);
+ if (retval < 0)
+ goto err_free_all_allocated_mem;
- retval = rtl8125_init_ring(dev);
+ retval = rtl8125_alloc_irq(tp);
if (retval < 0)
goto err_free_all_allocated_mem;
@@ -8703,69 +14332,46 @@ static int rtl8125_open(struct net_device *dev)
dev->dev_addr[4], dev->dev_addr[5], dev->irq);
}
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
- INIT_WORK(&tp->task, NULL, dev);
-#else
- INIT_DELAYED_WORK(&tp->task, NULL);
+#ifdef ENABLE_USE_FIRMWARE_FILE
+ rtl8125_request_firmware(tp);
#endif
+ pci_set_master(tp->pci_dev);
#ifdef CONFIG_R8125_NAPI
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
- RTL_NAPI_ENABLE(dev, &tp->napi);
-#endif
+ rtl8125_enable_napi(tp);
#endif
- spin_lock_irqsave(&tp->lock, flags);
-
rtl8125_exit_oob(dev);
- rtl8125_hw_init(dev);
-
- rtl8125_hw_reset(dev);
-
- rtl8125_powerup_pll(dev);
-
- rtl8125_hw_ephy_config(dev);
-
- rtl8125_hw_phy_config(dev);
+ rtl8125_up(dev);
- rtl8125_hw_config(dev);
+#ifdef ENABLE_PTP_SUPPORT
+ if (tp->EnablePtp)
+ rtl8125_ptp_init(tp);
+#endif
+ clear_bit(R8125_FLAG_DOWN, tp->task_flags);
- rtl8125_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
+ if (tp->resume_not_chg_speed)
+ rtl8125_check_link_status(dev);
+ else
+ rtl8125_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
- spin_unlock_irqrestore(&tp->lock, flags);
+ if (tp->esd_flag == 0) {
+ //rtl8125_request_esd_timer(dev);
- retval = request_irq(dev->irq, rtl8125_interrupt, (tp->features & RTL_FEATURE_MSI) ? 0 : SA_SHIRQ, dev->name, dev);
- if (retval<0)
- goto err_free_all_allocated_mem;
+ rtl8125_schedule_esd_work(tp);
+ }
- if (tp->esd_flag == 0)
- rtl8125_request_esd_timer(dev);
+ //rtl8125_request_link_timer(dev);
- rtl8125_request_link_timer(dev);
+ rtl8125_enable_hw_linkchg_interrupt(tp);
out:
return retval;
err_free_all_allocated_mem:
- if (tp->RxDescArray != NULL) {
- pci_free_consistent(pdev, R8125_RX_RING_BYTES, tp->RxDescArray,
- tp->RxPhyAddr);
- tp->RxDescArray = NULL;
- }
-
- if (tp->TxDescArray != NULL) {
- pci_free_consistent(pdev, R8125_TX_RING_BYTES, tp->TxDescArray,
- tp->TxPhyAddr);
- tp->TxDescArray = NULL;
- }
-
- if (tp->ShortPacketEmptyBuffer != NULL) {
- pci_free_consistent(pdev, ETH_ZLEN, tp->ShortPacketEmptyBuffer,
- tp->ShortPacketEmptyBufferPhy);
- tp->ShortPacketEmptyBuffer = NULL;
- }
+ rtl8125_free_alloc_resources(tp);
goto out;
}
@@ -8799,11 +14405,10 @@ set_offset79(struct rtl8125_private *tp, u8 setting)
pci_write_config_byte(pdev, 0x79, device_control);
}
-static void
+void
rtl8125_hw_set_rx_packet_filter(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
u32 mc_filter[2]; /* Multicast hash filter */
int rx_mode;
u32 tmp = 0;
@@ -8856,45 +14461,55 @@ rtl8125_hw_set_rx_packet_filter(struct net_device *dev)
mc_filter[0] = swab32(mc_filter[1]);
mc_filter[1] = swab32(tmp);
- tp->rtl8125_rx_config = rtl_chip_info[tp->chipset].RCR_Cfg;
- tmp = tp->rtl8125_rx_config | rx_mode | (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
+ tmp = tp->rtl8125_rx_config | rx_mode | (RTL_R32(tp, RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
- RTL_W32(RxConfig, tmp);
- RTL_W32(MAR0 + 0, mc_filter[0]);
- RTL_W32(MAR0 + 4, mc_filter[1]);
+ RTL_W32(tp, RxConfig, tmp);
+ RTL_W32(tp, MAR0 + 0, mc_filter[0]);
+ RTL_W32(tp, MAR0 + 4, mc_filter[1]);
}
static void
rtl8125_set_rx_mode(struct net_device *dev)
{
- struct rtl8125_private *tp = netdev_priv(dev);
- unsigned long flags;
+ rtl8125_hw_set_rx_packet_filter(dev);
+}
- spin_lock_irqsave(&tp->lock, flags);
+void
+rtl8125_set_rx_q_num(struct rtl8125_private *tp,
+ unsigned int num_rx_queues)
+{
+ u16 q_ctrl;
+ u16 rx_q_num;
- rtl8125_hw_set_rx_packet_filter(dev);
+ rx_q_num = (u16)ilog2(num_rx_queues);
+ rx_q_num &= (BIT_0 | BIT_1 | BIT_2);
+ rx_q_num <<= 2;
+ q_ctrl = RTL_R16(tp, Q_NUM_CTRL_8125);
+ q_ctrl &= ~(BIT_2 | BIT_3 | BIT_4);
+ q_ctrl |= rx_q_num;
+ RTL_W16(tp, Q_NUM_CTRL_8125, q_ctrl);
+}
+
+void
+rtl8125_set_tx_q_num(struct rtl8125_private *tp,
+ unsigned int num_tx_queues)
+{
+ u16 mac_ocp_data;
- spin_unlock_irqrestore(&tp->lock, flags);
+ mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xE63E);
+ mac_ocp_data &= ~(BIT_11 | BIT_10);
+ mac_ocp_data |= ((ilog2(num_tx_queues) & 0x03) << 10);
+ rtl8125_mac_ocp_write(tp, 0xE63E, mac_ocp_data);
}
-static void
+void
rtl8125_hw_config(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
struct pci_dev *pdev = tp->pci_dev;
u16 mac_ocp_data;
- int i;
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
- if (dev->mtu > ETH_DATA_LEN) {
- dev->features &= ~(NETIF_F_IP_CSUM);
- } else {
- dev->features |= NETIF_F_IP_CSUM;
- }
-#endif
- RTL_W32(RxConfig, (RX_DMA_BURST << RxCfgDMAShift));
+ RTL_W32(tp, RxConfig, (RX_DMA_BURST << RxCfgDMAShift));
rtl8125_hw_reset(dev);
@@ -8902,9 +14517,14 @@ rtl8125_hw_config(struct net_device *dev)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- RTL_W8(0xF1, RTL_R8(0xF1) & ~BIT_7);
- RTL_W8(Config2, RTL_R8(Config2) & ~BIT_7);
- RTL_W8(Config5, RTL_R8(Config5) & ~BIT_0);
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7);
+ RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7);
+ RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0);
break;
}
@@ -8912,55 +14532,71 @@ rtl8125_hw_config(struct net_device *dev)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- RTL_W8(Config3, RTL_R8(Config3) & ~BIT_1);
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~BIT_1);
break;
}
+ //keep magic packet only
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
- //IntMITI_0-IntMITI_31
- for (i=0xA00; i<0xB00; i+=4)
- RTL_W32(i, 0x00000000);
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xC0B6);
+ mac_ocp_data &= BIT_0;
+ rtl8125_mac_ocp_write(tp, 0xC0B6, mac_ocp_data);
break;
}
rtl8125_tally_counter_addr_fill(tp);
+ rtl8125_enable_extend_tally_couter(tp);
+
rtl8125_desc_addr_fill(tp);
/* Set DMA burst size and Interframe Gap Time */
- RTL_W32(TxConfig, (TX_DMA_BURST_unlimited << TxDMAShift) |
+ RTL_W32(tp, TxConfig, (TX_DMA_BURST_unlimited << TxDMAShift) |
(InterFrameGap << TxInterFrameGapShift));
+ if (tp->EnableTxNoClose)
+ RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) | BIT_6));
+
+ if (enable_double_vlan)
+ rtl8125_enable_double_vlan(tp);
+ else
+ rtl8125_disable_double_vlan(tp);
+
if (tp->mcfg == CFG_METHOD_2 ||
- tp->mcfg == CFG_METHOD_3) {
+ tp->mcfg == CFG_METHOD_3 ||
+ tp->mcfg == CFG_METHOD_4 ||
+ tp->mcfg == CFG_METHOD_5 ||
+ tp->mcfg == CFG_METHOD_6 ||
+ tp->mcfg == CFG_METHOD_7 ||
+ tp->mcfg == CFG_METHOD_8) {
set_offset70F(tp, 0x27);
set_offset79(tp, 0x50);
- RTL_W16(0x382, 0x221B);
+ RTL_W16(tp, 0x382, 0x221B);
- RTL_W8(0x4500, 0x00);
- RTL_W16(0x4800, 0x0000);
+#ifdef ENABLE_RSS_SUPPORT
+ rtl8125_config_rss(tp);
+#else
+ RTL_W32(tp, RSS_CTRL_8125, 0x00);
+#endif
+ rtl8125_set_rx_q_num(tp, rtl8125_tot_rx_rings(tp));
- RTL_W8(Config1, RTL_R8(Config1) & ~0x10);
+ RTL_W8(tp, Config1, RTL_R8(tp, Config1) & ~0x10);
rtl8125_mac_ocp_write(tp, 0xC140, 0xFFFF);
rtl8125_mac_ocp_write(tp, 0xC142, 0xFFFF);
- mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xD3E2);
- mac_ocp_data &= 0xF000;
- mac_ocp_data |= 0x3A9;
- rtl8125_mac_ocp_write(tp, 0xD3E2, mac_ocp_data);
-
- mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xD3E4);
- mac_ocp_data &= 0xFF00;
- rtl8125_mac_ocp_write(tp, 0xD3E4, mac_ocp_data);
-
- mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xE860);
- mac_ocp_data |= (BIT_7);
- rtl8125_mac_ocp_write(tp, 0xE860, mac_ocp_data);
-
//new tx desc format
mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xEB58);
mac_ocp_data |= (BIT_0);
@@ -8968,22 +14604,30 @@ rtl8125_hw_config(struct net_device *dev)
mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xE614);
mac_ocp_data &= ~( BIT_10 | BIT_9 | BIT_8);
- if (tp->DASH && !(rtl8125_csi_fun0_read_byte(tp, 0x79) & BIT_0))
- mac_ocp_data |= ((3 & 0x07) << 8);
- else
+ if (tp->mcfg == CFG_METHOD_4 || tp->mcfg == CFG_METHOD_5 ||
+ tp->mcfg == CFG_METHOD_7)
+ mac_ocp_data |= ((2 & 0x07) << 8);
+ else if (tp->mcfg == CFG_METHOD_8)
mac_ocp_data |= ((4 & 0x07) << 8);
+ else
+ mac_ocp_data |= ((3 & 0x07) << 8);
rtl8125_mac_ocp_write(tp, 0xE614, mac_ocp_data);
- mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xE63E);
- mac_ocp_data &= ~(BIT_11 | BIT_10);
- mac_ocp_data |= ((0 & 0x03) << 10);
- rtl8125_mac_ocp_write(tp, 0xE63E, mac_ocp_data);
+ rtl8125_set_tx_q_num(tp, rtl8125_tot_tx_rings(tp));
mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xE63E);
mac_ocp_data &= ~(BIT_5 | BIT_4);
- mac_ocp_data |= ((0x02 & 0x03) << 4);
+ if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3 ||
+ tp->mcfg == CFG_METHOD_6 || tp->mcfg == CFG_METHOD_8)
+ mac_ocp_data |= ((0x02 & 0x03) << 4);
rtl8125_mac_ocp_write(tp, 0xE63E, mac_ocp_data);
+ mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xC0B4);
+ mac_ocp_data &= ~BIT_0;
+ rtl8125_mac_ocp_write(tp, 0xC0B4, mac_ocp_data);
+ mac_ocp_data |= BIT_0;
+ rtl8125_mac_ocp_write(tp, 0xC0B4, mac_ocp_data);
+
mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xC0B4);
mac_ocp_data |= (BIT_3|BIT_2);
rtl8125_mac_ocp_write(tp, 0xC0B4, mac_ocp_data);
@@ -9000,39 +14644,41 @@ rtl8125_hw_config(struct net_device *dev)
mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xE056);
mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4);
- mac_ocp_data |= (BIT_4 | BIT_5);
+ //mac_ocp_data |= (BIT_4 | BIT_5);
rtl8125_mac_ocp_write(tp, 0xE056, mac_ocp_data);
- RTL_W8(TDFNR, 0x10);
+ RTL_W8(tp, TDFNR, 0x10);
- //RTL_W8(0xD0, RTL_R8(0xD0) | BIT_7);
+ RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_7);
mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xE040);
mac_ocp_data &= ~(BIT_12);
rtl8125_mac_ocp_write(tp, 0xE040, mac_ocp_data);
- mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xE0C0);
- mac_ocp_data &= ~(BIT_14 | BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
- mac_ocp_data |= (BIT_14 | BIT_10 | BIT_1 | BIT_0);
- rtl8125_mac_ocp_write(tp, 0xE0C0, mac_ocp_data);
+ mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xEA1C);
+ mac_ocp_data &= ~(BIT_1 | BIT_0);
+ mac_ocp_data |= (BIT_0);
+ rtl8125_mac_ocp_write(tp, 0xEA1C, mac_ocp_data);
- SetMcuAccessRegBit(tp, 0xE052, (BIT_6|BIT_5|BIT_3));
- ClearMcuAccessRegBit(tp, 0xE052, BIT_7);
+ rtl8125_mac_ocp_write(tp, 0xE0C0, 0x4000);
- mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xC0AC);
- mac_ocp_data &= ~(BIT_7);
- mac_ocp_data |= (BIT_8|BIT_9|BIT_10|BIT_11|BIT_12);
- rtl8125_mac_ocp_write(tp, 0xC0AC, mac_ocp_data);
+ SetMcuAccessRegBit(tp, 0xE052, (BIT_6 | BIT_5));
+ ClearMcuAccessRegBit(tp, 0xE052, BIT_3 | BIT_7);
mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xD430);
mac_ocp_data &= ~(BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
- mac_ocp_data |= 0x47F;
+ mac_ocp_data |= 0x45F;
rtl8125_mac_ocp_write(tp, 0xD430, mac_ocp_data);
//rtl8125_mac_ocp_write(tp, 0xE0C0, 0x4F87);
- mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xE84C);
- mac_ocp_data |= (BIT_7 | BIT_6);
- rtl8125_mac_ocp_write(tp, 0xE84C, mac_ocp_data);
+ if (!tp->DASH)
+ RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_6 | BIT_7);
+ else
+ RTL_W8(tp, 0xD0, (RTL_R8(tp, 0xD0) & ~BIT_6) | BIT_7);
+
+ if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3 ||
+ tp->mcfg == CFG_METHOD_6)
+ RTL_W8(tp, MCUCmd_reg, RTL_R8(tp, MCUCmd_reg) | BIT_0);
rtl8125_disable_eee_plus(tp);
@@ -9043,7 +14689,7 @@ rtl8125_hw_config(struct net_device *dev)
SetMcuAccessRegBit(tp, 0xEB54, BIT_0);
udelay(1);
ClearMcuAccessRegBit(tp, 0xEB54, BIT_0);
- RTL_W16(0x1880, RTL_R16(0x1880)&~(BIT_4 | BIT_5));
+ RTL_W16(tp, 0x1880, RTL_R16(tp, 0x1880) & ~(BIT_4 | BIT_5));
}
/* csum offload command for RTL8125 */
@@ -9052,25 +14698,71 @@ rtl8125_hw_config(struct net_device *dev)
tp->tx_ip_csum_cmd = TxIPCS_C;
tp->tx_ipv6_csum_cmd = TxIPV6F_C;
+ /* config interrupt type for RTL8125B */
+ if (tp->HwSuppIsrVer == 2)
+ rtl8125_hw_set_interrupt_type(tp, tp->HwCurrIsrVer);
//other hw parameters
rtl8125_hw_clear_timer_int(dev);
rtl8125_hw_clear_int_miti(dev);
+ if (tp->RequireRduNonStopPatch &&
+ tp->ShortPacketEmptyBuffer) {
+ RTL_W32(tp, RSS_INDIRECTION_TBL_8125_V2, ((u64)tp->ShortPacketEmptyBufferPhy & DMA_BIT_MASK(32)));
+ RTL_W32(tp, RSS_INDIRECTION_TBL_8125_V2 + 4, ((u64)tp->ShortPacketEmptyBufferPhy >> 32));
+ }
+
+ if (tp->use_timer_interrrupt &&
+ (tp->HwCurrIsrVer == 2) &&
+ (tp->HwSuppIntMitiVer == 4) &&
+ (tp->features & RTL_FEATURE_MSIX)) {
+ int i;
+ for (i = 0; i < tp->irq_nvecs; i++)
+ rtl8125_hw_set_timer_int_8125(tp, i, timer_count_v2);
+ }
+
+ rtl8125_enable_exit_l1_mask(tp);
+
+ switch (tp->mcfg) {
+ case CFG_METHOD_2:
+ case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ rtl8125_mac_ocp_write(tp, 0xE098, 0xC302);
+ break;
+ }
+
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ rtl8125_disable_pci_offset_99(tp);
if (aspm) {
- rtl8125_init_pci_offset_99(tp);
+ if (tp->org_pci_offset_99 & (BIT_2 | BIT_5 | BIT_6))
+ rtl8125_init_pci_offset_99(tp);
}
break;
}
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
+ rtl8125_disable_pci_offset_180(tp);
if (aspm) {
- rtl8125_init_pci_offset_180(tp);
+ if (tp->org_pci_offset_180 & (BIT_0|BIT_1))
+ rtl8125_init_pci_offset_180(tp);
}
break;
}
@@ -9080,14 +14772,18 @@ rtl8125_hw_config(struct net_device *dev)
ASF | Macdbgo_sel);
#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
- RTL_W16(CPlusCmd, tp->cp_cmd);
+ RTL_W16(tp, CPlusCmd, tp->cp_cmd);
#else
rtl8125_hw_set_features(dev, dev->features);
#endif
switch (tp->mcfg) {
case CFG_METHOD_2:
- case CFG_METHOD_3: {
+ case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7: {
int timeout;
for (timeout = 0; timeout < 10; timeout++) {
if ((rtl8125_mac_ocp_read(tp, 0xE00E) & BIT_13)==0)
@@ -9098,7 +14794,7 @@ rtl8125_hw_config(struct net_device *dev)
break;
}
- RTL_W16(RxMaxSize, tp->rx_buf_sz);
+ RTL_W16(tp, RxMaxSize, tp->rms);
rtl8125_disable_rxdvgate(dev);
@@ -9117,8 +14813,10 @@ rtl8125_hw_config(struct net_device *dev)
pci_read_config_word(pdev, PCI_BASE_ADDRESS_5 + 2, &tp->pci_cfg_space.resv_0x24_h);
pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &tp->pci_cfg_space.resv_0x2c_l);
pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID + 2, &tp->pci_cfg_space.resv_0x2c_h);
- tp->pci_cfg_space.pci_sn_l = rtl8125_csi_read(tp, PCI_DEVICE_SERIAL_NUMBER);
- tp->pci_cfg_space.pci_sn_h = rtl8125_csi_read(tp, PCI_DEVICE_SERIAL_NUMBER + 4);
+ if (tp->HwPcieSNOffset > 0) {
+ tp->pci_cfg_space.pci_sn_l = rtl8125_csi_read(tp, tp->HwPcieSNOffset);
+ tp->pci_cfg_space.pci_sn_h = rtl8125_csi_read(tp, tp->HwPcieSNOffset + 4);
+ }
tp->pci_cfg_is_read = 1;
}
@@ -9134,12 +14832,17 @@ rtl8125_hw_config(struct net_device *dev)
switch (tp->mcfg) {
case CFG_METHOD_2:
case CFG_METHOD_3:
+ case CFG_METHOD_4:
+ case CFG_METHOD_5:
+ case CFG_METHOD_6:
+ case CFG_METHOD_7:
+ case CFG_METHOD_8:
if (aspm) {
- RTL_W8(Config5, RTL_R8(Config5) | BIT_0);
- RTL_W8(Config2, RTL_R8(Config2) | BIT_7);
+ RTL_W8(tp, Config5, RTL_R8(tp, Config5) | BIT_0);
+ RTL_W8(tp, Config2, RTL_R8(tp, Config2) | BIT_7);
} else {
- RTL_W8(Config2, RTL_R8(Config2) & ~BIT_7);
- RTL_W8(Config5, RTL_R8(Config5) & ~BIT_0);
+ RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7);
+ RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0);
}
break;
}
@@ -9149,17 +14852,21 @@ rtl8125_hw_config(struct net_device *dev)
udelay(10);
}
-static void
+void
rtl8125_hw_start(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
- RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
+#ifdef ENABLE_LIB_SUPPORT
+ rtl8125_init_lib_ring(tp);
+#endif
+
+ RTL_W8(tp, ChipCmd, CmdTxEnb | CmdRxEnb);
- rtl8125_enable_hw_interrupt(tp, ioaddr);
-}
+ rtl8125_enable_hw_interrupt(tp);
+ rtl8125_lib_reset_complete(tp);
+}
static int
rtl8125_change_mtu(struct net_device *dev,
@@ -9167,50 +14874,41 @@ rtl8125_change_mtu(struct net_device *dev,
{
struct rtl8125_private *tp = netdev_priv(dev);
int ret = 0;
- unsigned long flags;
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0)
- if (new_mtu < ETH_ZLEN)
+ if (new_mtu < ETH_MIN_MTU)
return -EINVAL;
else if (new_mtu > tp->max_jumbo_frame_size)
new_mtu = tp->max_jumbo_frame_size;
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0)
- spin_lock_irqsave(&tp->lock, flags);
dev->mtu = new_mtu;
- spin_unlock_irqrestore(&tp->lock, flags);
if (!netif_running(dev))
goto out;
rtl8125_down(dev);
- spin_lock_irqsave(&tp->lock, flags);
-
rtl8125_set_rxbufsize(tp, dev);
ret = rtl8125_init_ring(dev);
- if (ret < 0) {
- spin_unlock_irqrestore(&tp->lock, flags);
+ if (ret < 0)
goto err_out;
- }
#ifdef CONFIG_R8125_NAPI
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
- RTL_NAPI_ENABLE(dev, &tp->napi);
-#endif
+ rtl8125_enable_napi(tp);
#endif//CONFIG_R8125_NAPI
- netif_stop_queue(dev);
- netif_carrier_off(dev);
+ //netif_carrier_off(dev);
+ //netif_tx_disable(dev);
rtl8125_hw_config(dev);
- spin_unlock_irqrestore(&tp->lock, flags);
+ rtl8125_enable_hw_linkchg_interrupt(tp);
rtl8125_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
- mod_timer(&tp->esd_timer, jiffies + RTL8125_ESD_TIMEOUT);
- mod_timer(&tp->link_timer, jiffies + RTL8125_LINK_TIMEOUT);
+ //mod_timer(&tp->esd_timer, jiffies + RTL8125_ESD_TIMEOUT);
+ //mod_timer(&tp->link_timer, jiffies + RTL8125_LINK_TIMEOUT);
out:
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)
netdev_update_features(dev);
@@ -9221,50 +14919,171 @@ rtl8125_change_mtu(struct net_device *dev,
}
static inline void
-rtl8125_make_unusable_by_asic(struct RxDesc *desc)
-{
- desc->addr = 0x0badbadbadbadbadull;
- desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
-}
-
-static void
-rtl8125_free_rx_skb(struct rtl8125_private *tp,
- struct sk_buff **sk_buff,
- struct RxDesc *desc)
+rtl8125_mark_to_asic_v3(struct RxDescV3 *descv3,
+ u32 rx_buf_sz)
{
- struct pci_dev *pdev = tp->pci_dev;
+ u32 eor = le32_to_cpu(descv3->RxDescNormalDDWord4.opts1) & RingEnd;
- pci_unmap_single(pdev, le64_to_cpu(desc->addr), tp->rx_buf_sz,
- PCI_DMA_FROMDEVICE);
- dev_kfree_skb(*sk_buff);
- *sk_buff = NULL;
- rtl8125_make_unusable_by_asic(desc);
+ WRITE_ONCE(descv3->RxDescNormalDDWord4.opts1, cpu_to_le32(DescOwn | eor | rx_buf_sz));
}
-static inline void
-rtl8125_mark_to_asic(struct RxDesc *desc,
+void
+rtl8125_mark_to_asic(struct rtl8125_private *tp,
+ struct RxDesc *desc,
u32 rx_buf_sz)
{
- u32 eor = le32_to_cpu(desc->opts1) & RingEnd;
+ if (tp->InitRxDescType == RX_DESC_RING_TYPE_3)
+ rtl8125_mark_to_asic_v3((struct RxDescV3 *)desc, rx_buf_sz);
+ else {
+ u32 eor = le32_to_cpu(desc->opts1) & RingEnd;
- desc->opts1 = cpu_to_le32(DescOwn | eor | rx_buf_sz);
+ WRITE_ONCE(desc->opts1, cpu_to_le32(DescOwn | eor | rx_buf_sz));
+ }
}
static inline void
-rtl8125_map_to_asic(struct RxDesc *desc,
+rtl8125_map_to_asic(struct rtl8125_private *tp,
+ struct rtl8125_rx_ring *ring,
+ struct RxDesc *desc,
dma_addr_t mapping,
- u32 rx_buf_sz)
+ u32 rx_buf_sz,
+ const u32 cur_rx)
{
- desc->addr = cpu_to_le64(mapping);
+ ring->RxDescPhyAddr[cur_rx] = mapping;
+ if (tp->InitRxDescType == RX_DESC_RING_TYPE_3)
+ ((struct RxDescV3 *)desc)->addr = cpu_to_le64(mapping);
+ else
+ desc->addr = cpu_to_le64(mapping);
wmb();
- rtl8125_mark_to_asic(desc, rx_buf_sz);
+ rtl8125_mark_to_asic(tp, desc, rx_buf_sz);
+}
+
+#ifdef ENABLE_PAGE_REUSE
+
+static int
+rtl8125_alloc_rx_page(struct rtl8125_private *tp, struct rtl8125_rx_ring *ring,
+ struct rtl8125_rx_buffer *rxb)
+{
+ struct page *page;
+ dma_addr_t dma;
+ unsigned int order = tp->rx_buf_page_order;
+
+ //get free page
+ page = dev_alloc_pages(order);
+
+ if (unlikely(!page))
+ return -ENOMEM;
+
+ dma = dma_map_page_attrs(&tp->pci_dev->dev, page, 0,
+ tp->rx_buf_page_size,
+ DMA_FROM_DEVICE,
+ (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING));
+
+ if (unlikely(dma_mapping_error(&tp->pci_dev->dev, dma))) {
+ __free_pages(page, order);
+ return -ENOMEM;
+ }
+
+ rxb->page = page;
+ rxb->data = page_address(page);
+ rxb->page_offset = ring->rx_offset;
+ rxb->dma = dma;
+
+ //after page alloc, page refcount already = 1
+
+ return 0;
+}
+
+static void
+rtl8125_free_rx_page(struct rtl8125_private *tp, struct rtl8125_rx_buffer *rxb)
+{
+ if (!rxb->page)
+ return;
+
+ dma_unmap_page_attrs(&tp->pci_dev->dev, rxb->dma,
+ tp->rx_buf_page_size,
+ DMA_FROM_DEVICE,
+ (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING));
+ __free_pages(rxb->page, tp->rx_buf_page_order);
+ rxb->page = NULL;
+}
+
+static void
+_rtl8125_rx_clear(struct rtl8125_private *tp, struct rtl8125_rx_ring *ring)
+{
+ int i;
+ struct rtl8125_rx_buffer *rxb;
+
+ for (i = 0; i < ring->num_rx_desc; i++) {
+ rxb = &ring->rx_buffer[i];
+ if (rxb->skb) {
+ dev_kfree_skb(rxb->skb);
+ rxb->skb = NULL;
+ }
+ rtl8125_free_rx_page(tp, rxb);
+ }
+}
+
+static u32
+rtl8125_rx_fill(struct rtl8125_private *tp,
+ struct rtl8125_rx_ring *ring,
+ struct net_device *dev,
+ u32 start,
+ u32 end,
+ u8 in_intr)
+{
+ u32 cur;
+ struct rtl8125_rx_buffer *rxb;
+
+ for (cur = start; end - cur > 0; cur++) {
+ int ret, i = cur % ring->num_rx_desc;
+
+ rxb = &ring->rx_buffer[i];
+ if (rxb->page)
+ continue;
+
+ ret = rtl8125_alloc_rx_page(tp, ring, rxb);
+ if (ret)
+ break;
+
+ dma_sync_single_range_for_device(tp_to_dev(tp),
+ rxb->dma,
+ rxb->page_offset,
+ tp->rx_buf_sz,
+ DMA_FROM_DEVICE);
+
+ rtl8125_map_to_asic(tp, ring, ring->RxDescArray + i,
+ rxb->dma + rxb->page_offset,
+ tp->rx_buf_sz, i);
+ }
+ return cur - start;
+}
+
+#else //ENABLE_PAGE_REUSE
+
+static void
+rtl8125_free_rx_skb(struct rtl8125_private *tp,
+ struct rtl8125_rx_ring *ring,
+ struct sk_buff **sk_buff,
+ struct RxDesc *desc,
+ const u32 cur_rx)
+{
+ struct pci_dev *pdev = tp->pci_dev;
+
+ dma_unmap_single(&pdev->dev, ring->RxDescPhyAddr[cur_rx], tp->rx_buf_sz,
+ DMA_FROM_DEVICE);
+ dev_kfree_skb(*sk_buff);
+ *sk_buff = NULL;
+ rtl8125_make_unusable_by_asic(tp, desc);
}
static int
rtl8125_alloc_rx_skb(struct rtl8125_private *tp,
+ struct rtl8125_rx_ring *ring,
struct sk_buff **sk_buff,
struct RxDesc *desc,
int rx_buf_sz,
+ const u32 cur_rx,
u8 in_intr)
{
struct sk_buff *skb;
@@ -9272,25 +15091,25 @@ rtl8125_alloc_rx_skb(struct rtl8125_private *tp,
int ret = 0;
if (in_intr)
- skb = RTL_ALLOC_SKB_INTR(tp, rx_buf_sz + RTK_RX_ALIGN);
+ skb = RTL_ALLOC_SKB_INTR(&tp->r8125napi[ring->index].napi, rx_buf_sz + R8125_RX_ALIGN);
else
- skb = dev_alloc_skb(rx_buf_sz + RTK_RX_ALIGN);
+ skb = dev_alloc_skb(rx_buf_sz + R8125_RX_ALIGN);
if (unlikely(!skb))
goto err_out;
- skb_reserve(skb, RTK_RX_ALIGN);
+ skb_reserve(skb, R8125_RX_ALIGN);
- mapping = pci_map_single(tp->pci_dev, skb->data, rx_buf_sz,
- PCI_DMA_FROMDEVICE);
- if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) {
+ mapping = dma_map_single(tp_to_dev(tp), skb->data, rx_buf_sz,
+ DMA_FROM_DEVICE);
+ if (unlikely(dma_mapping_error(tp_to_dev(tp), mapping))) {
if (unlikely(net_ratelimit()))
netif_err(tp, drv, tp->dev, "Failed to map RX DMA!\n");
goto err_out;
}
*sk_buff = skb;
- rtl8125_map_to_asic(desc, mapping, rx_buf_sz);
+ rtl8125_map_to_asic(tp, ring, desc, mapping, rx_buf_sz, cur_rx);
out:
return ret;
@@ -9298,24 +15117,30 @@ rtl8125_alloc_rx_skb(struct rtl8125_private *tp,
if (skb)
dev_kfree_skb(skb);
ret = -ENOMEM;
- rtl8125_make_unusable_by_asic(desc);
+ rtl8125_make_unusable_by_asic(tp, desc);
goto out;
}
static void
-rtl8125_rx_clear(struct rtl8125_private *tp)
+_rtl8125_rx_clear(struct rtl8125_private *tp, struct rtl8125_rx_ring *ring)
{
int i;
- for (i = 0; i < NUM_RX_DESC; i++) {
- if (tp->Rx_skbuff[i])
- rtl8125_free_rx_skb(tp, tp->Rx_skbuff + i,
- tp->RxDescArray + i);
+ for (i = 0; i < ring->num_rx_desc; i++) {
+ if (ring->Rx_skbuff[i]) {
+ rtl8125_free_rx_skb(tp,
+ ring,
+ ring->Rx_skbuff + i,
+ rtl8125_get_rxdesc(tp, ring->RxDescArray, i),
+ i);
+ ring->Rx_skbuff[i] = NULL;
+ }
}
}
static u32
rtl8125_rx_fill(struct rtl8125_private *tp,
+ struct rtl8125_rx_ring *ring,
struct net_device *dev,
u32 start,
u32 end,
@@ -9324,39 +15149,71 @@ rtl8125_rx_fill(struct rtl8125_private *tp,
u32 cur;
for (cur = start; end - cur > 0; cur++) {
- int ret, i = cur % NUM_RX_DESC;
+ int ret, i = cur % ring->num_rx_desc;
- if (tp->Rx_skbuff[i])
+ if (ring->Rx_skbuff[i])
continue;
- ret = rtl8125_alloc_rx_skb(tp, tp->Rx_skbuff + i,
- tp->RxDescArray + i,
+ ret = rtl8125_alloc_rx_skb(tp,
+ ring,
+ ring->Rx_skbuff + i,
+ rtl8125_get_rxdesc(tp, ring->RxDescArray, i),
tp->rx_buf_sz,
- in_intr);
+ i,
+ in_intr
+ );
if (ret < 0)
break;
}
return cur - start;
}
+#endif //ENABLE_PAGE_REUSE
+
+void
+rtl8125_rx_clear(struct rtl8125_private *tp)
+{
+ int i;
+
+ for (i = 0; i < tp->num_rx_rings; i++) {
+ struct rtl8125_rx_ring *ring = &tp->rx_ring[i];
+
+ _rtl8125_rx_clear(tp, ring);
+ }
+}
+
+static inline void
+rtl8125_mark_as_last_descriptor_8125(struct RxDescV3 *descv3)
+{
+ descv3->RxDescNormalDDWord4.opts1 |= cpu_to_le32(RingEnd);
+}
+
static inline void
-rtl8125_mark_as_last_descriptor(struct RxDesc *desc)
+rtl8125_mark_as_last_descriptor(struct rtl8125_private *tp,
+ struct RxDesc *desc)
{
- desc->opts1 |= cpu_to_le32(RingEnd);
+ if (tp->InitRxDescType == RX_DESC_RING_TYPE_3)
+ rtl8125_mark_as_last_descriptor_8125((struct RxDescV3 *)desc);
+ else
+ desc->opts1 |= cpu_to_le32(RingEnd);
}
static void
rtl8125_desc_addr_fill(struct rtl8125_private *tp)
{
- void __iomem *ioaddr = tp->mmio_addr;
+ int i;
- if (!tp->TxPhyAddr || !tp->RxPhyAddr)
- return;
+ for (i = 0; i < tp->num_tx_rings; i++) {
+ struct rtl8125_tx_ring *ring = &tp->tx_ring[i];
+ RTL_W32(tp, ring->tdsar_reg, ((u64)ring->TxPhyAddr & DMA_BIT_MASK(32)));
+ RTL_W32(tp, ring->tdsar_reg + 4, ((u64)ring->TxPhyAddr >> 32));
+ }
- RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_BIT_MASK(32)));
- RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32));
- RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_BIT_MASK(32)));
- RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32));
+ for (i = 0; i < tp->num_rx_rings; i++) {
+ struct rtl8125_rx_ring *ring = &tp->rx_ring[i];
+ RTL_W32(tp, ring->rdsar_reg, ((u64)ring->RxPhyAddr & DMA_BIT_MASK(32)));
+ RTL_W32(tp, ring->rdsar_reg + 4, ((u64)ring->RxPhyAddr >> 32));
+ }
}
static void
@@ -9364,37 +15221,53 @@ rtl8125_tx_desc_init(struct rtl8125_private *tp)
{
int i = 0;
- memset(tp->TxDescArray, 0x0, NUM_TX_DESC * sizeof(struct TxDesc));
+ for (i = 0; i < tp->num_tx_rings; i++) {
+ struct rtl8125_tx_ring *ring = &tp->tx_ring[i];
+ memset(ring->TxDescArray, 0x0, ring->TxDescAllocSize);
- for (i = 0; i < NUM_TX_DESC; i++) {
- if (i == (NUM_TX_DESC - 1))
- tp->TxDescArray[i].opts1 = cpu_to_le32(RingEnd);
+ ring->TxDescArray[ring->num_tx_desc - 1].opts1 = cpu_to_le32(RingEnd);
}
}
static void
rtl8125_rx_desc_init(struct rtl8125_private *tp)
{
- memset(tp->RxDescArray, 0x0, NUM_RX_DESC * sizeof(struct RxDesc));
+ int i;
+
+ for (i = 0; i < tp->num_rx_rings; i++) {
+ struct rtl8125_rx_ring *ring = &tp->rx_ring[i];
+ memset(ring->RxDescArray, 0x0, ring->RxDescAllocSize);
+ }
}
-static int
+int
rtl8125_init_ring(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
+ int i;
rtl8125_init_ring_indexes(tp);
- memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info));
- memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *));
-
rtl8125_tx_desc_init(tp);
rtl8125_rx_desc_init(tp);
- if (rtl8125_rx_fill(tp, dev, 0, NUM_RX_DESC, 0) != NUM_RX_DESC)
- goto err_out;
+ for (i = 0; i < tp->num_tx_rings; i++) {
+ struct rtl8125_tx_ring *ring = &tp->tx_ring[i];
+ memset(ring->tx_skb, 0x0, sizeof(ring->tx_skb));
+ }
+
+ for (i = 0; i < tp->num_rx_rings; i++) {
+ struct rtl8125_rx_ring *ring = &tp->rx_ring[i];
+#ifdef ENABLE_PAGE_REUSE
+ ring->rx_offset = R8125_RX_ALIGN;
+#else
+ memset(ring->Rx_skbuff, 0x0, sizeof(ring->Rx_skbuff));
+#endif //ENABLE_PAGE_REUSE
+ if (rtl8125_rx_fill(tp, ring, dev, 0, ring->num_rx_desc, 0) != ring->num_rx_desc)
+ goto err_out;
- rtl8125_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1);
+ rtl8125_mark_as_last_descriptor(tp, rtl8125_get_rxdesc(tp, ring->RxDescArray, ring->num_rx_desc - 1));
+ }
return 0;
@@ -9410,15 +15283,19 @@ rtl8125_unmap_tx_skb(struct pci_dev *pdev,
{
unsigned int len = tx_skb->len;
- pci_unmap_single(pdev, le64_to_cpu(desc->addr), len, PCI_DMA_TODEVICE);
- desc->opts1 = 0x00;
+ dma_unmap_single(&pdev->dev, le64_to_cpu(desc->addr), len, DMA_TO_DEVICE);
+
+ desc->opts1 = cpu_to_le32(RTK_MAGIC_DEBUG_VALUE);
desc->opts2 = 0x00;
- desc->addr = 0x00;
+ desc->addr = RTL8125_MAGIC_NUMBER;
tx_skb->len = 0;
}
-static void rtl8125_tx_clear_range(struct rtl8125_private *tp, u32 start,
- unsigned int n)
+static void
+rtl8125_tx_clear_range(struct rtl8125_private *tp,
+ struct rtl8125_tx_ring *ring,
+ u32 start,
+ unsigned int n)
{
unsigned int i;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
@@ -9426,15 +15303,15 @@ static void rtl8125_tx_clear_range(struct rtl8125_private *tp, u32 start,
#endif
for (i = 0; i < n; i++) {
- unsigned int entry = (start + i) % NUM_TX_DESC;
- struct ring_info *tx_skb = tp->tx_skb + entry;
+ unsigned int entry = (start + i) % ring->num_tx_desc;
+ struct ring_info *tx_skb = ring->tx_skb + entry;
unsigned int len = tx_skb->len;
if (len) {
struct sk_buff *skb = tx_skb->skb;
rtl8125_unmap_tx_skb(tp->pci_dev, tx_skb,
- tp->TxDescArray + entry);
+ ring->TxDescArray + entry);
if (skb) {
RTLDEV->stats.tx_dropped++;
dev_kfree_skb_any(skb);
@@ -9444,103 +15321,168 @@ static void rtl8125_tx_clear_range(struct rtl8125_private *tp, u32 start,
}
}
-static void
+void
rtl8125_tx_clear(struct rtl8125_private *tp)
{
- rtl8125_tx_clear_range(tp, tp->dirty_tx, NUM_TX_DESC);
- tp->cur_tx = tp->dirty_tx = 0;
+ int i;
+
+ for (i = 0; i < tp->num_tx_rings; i++) {
+ struct rtl8125_tx_ring *ring = &tp->tx_ring[i];
+ rtl8125_tx_clear_range(tp, ring, ring->dirty_tx, ring->num_tx_desc);
+ ring->cur_tx = ring->dirty_tx = 0;
+ }
}
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
-static void rtl8125_schedule_work(struct net_device *dev, void (*task)(void *))
+static void rtl8125_schedule_reset_work(struct rtl8125_private *tp)
{
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
- struct rtl8125_private *tp = netdev_priv(dev);
+ set_bit(R8125_FLAG_TASK_RESET_PENDING, tp->task_flags);
+ schedule_delayed_work(&tp->reset_task, 4);
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+}
+
+static void rtl8125_schedule_esd_work(struct rtl8125_private *tp)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+ set_bit(R8125_FLAG_TASK_ESD_CHECK_PENDING, tp->task_flags);
+ schedule_delayed_work(&tp->esd_task, RTL8125_ESD_TIMEOUT);
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+}
- INIT_WORK(&tp->task, task, dev);
- schedule_delayed_work(&tp->task, 4);
+static void rtl8125_schedule_linkchg_work(struct rtl8125_private *tp)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+ set_bit(R8125_FLAG_TASK_LINKCHG_CHECK_PENDING, tp->task_flags);
+ schedule_delayed_work(&tp->linkchg_task, 4);
#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
}
-#define rtl8125_cancel_schedule_work(a)
+#define rtl8125_cancel_schedule_reset_work(a)
+#define rtl8125_cancel_schedule_esd_work(a)
+#define rtl8125_cancel_schedule_linkchg_work(a)
#else
-static void rtl8125_schedule_work(struct net_device *dev, work_func_t task)
+static void rtl8125_schedule_reset_work(struct rtl8125_private *tp)
{
- struct rtl8125_private *tp = netdev_priv(dev);
+ set_bit(R8125_FLAG_TASK_RESET_PENDING, tp->task_flags);
+ schedule_delayed_work(&tp->reset_task, 4);
+}
+
+static void rtl8125_cancel_schedule_reset_work(struct rtl8125_private *tp)
+{
+ struct work_struct *work = &tp->reset_task.work;
+
+ if (!work->func) return;
- INIT_DELAYED_WORK(&tp->task, task);
- schedule_delayed_work(&tp->task, 4);
+ cancel_delayed_work_sync(&tp->reset_task);
}
-static void rtl8125_cancel_schedule_work(struct net_device *dev)
+static void rtl8125_schedule_esd_work(struct rtl8125_private *tp)
{
- struct rtl8125_private *tp = netdev_priv(dev);
+ set_bit(R8125_FLAG_TASK_ESD_CHECK_PENDING, tp->task_flags);
+ schedule_delayed_work(&tp->esd_task, RTL8125_ESD_TIMEOUT);
+}
+
+static void rtl8125_cancel_schedule_esd_work(struct rtl8125_private *tp)
+{
+ struct work_struct *work = &tp->esd_task.work;
+
+ if (!work->func) return;
+
+ cancel_delayed_work_sync(&tp->esd_task);
+}
+
+static void rtl8125_schedule_linkchg_work(struct rtl8125_private *tp)
+{
+ set_bit(R8125_FLAG_TASK_LINKCHG_CHECK_PENDING, tp->task_flags);
+ schedule_delayed_work(&tp->linkchg_task, 4);
+}
+
+static void rtl8125_cancel_schedule_linkchg_work(struct rtl8125_private *tp)
+{
+ struct work_struct *work = &tp->linkchg_task.work;
- cancel_delayed_work_sync(&tp->task);
+ if (!work->func) return;
+
+ cancel_delayed_work_sync(&tp->linkchg_task);
}
#endif
+static void rtl8125_init_all_schedule_work(struct rtl8125_private *tp)
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
+ INIT_WORK(&tp->reset_task, rtl8125_reset_task, dev);
+ INIT_WORK(&tp->esd_task, rtl8125_esd_task, dev);
+ INIT_WORK(&tp->linkchg_task, rtl8125_linkchg_task, dev);
+#else
+ INIT_DELAYED_WORK(&tp->reset_task, rtl8125_reset_task);
+ INIT_DELAYED_WORK(&tp->esd_task, rtl8125_esd_task);
+ INIT_DELAYED_WORK(&tp->linkchg_task, rtl8125_linkchg_task);
+#endif
+}
+
+static void rtl8125_cancel_all_schedule_work(struct rtl8125_private *tp)
+{
+ rtl8125_cancel_schedule_reset_work(tp);
+ rtl8125_cancel_schedule_esd_work(tp);
+ rtl8125_cancel_schedule_linkchg_work(tp);
+}
+
static void
-rtl8125_wait_for_quiescence(struct net_device *dev)
+rtl8125_wait_for_irq_complete(struct rtl8125_private *tp)
{
- struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
+ if (tp->features & RTL_FEATURE_MSIX) {
+ int i;
+ for (i = 0; i < tp->irq_nvecs; i++)
+ synchronize_irq(tp->irq_tbl[i].vector);
+ } else {
+ synchronize_irq(tp->dev->irq);
+ }
+}
- synchronize_irq(dev->irq);
+void
+_rtl8125_wait_for_quiescence(struct net_device *dev)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
/* Wait for any pending NAPI task to complete */
#ifdef CONFIG_R8125_NAPI
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
- RTL_NAPI_DISABLE(dev, &tp->napi);
-#endif
+ rtl8125_disable_napi(tp);
#endif//CONFIG_R8125_NAPI
- rtl8125_irq_mask_and_ack(tp, ioaddr);
-
-#ifdef CONFIG_R8125_NAPI
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
- RTL_NAPI_ENABLE(dev, &tp->napi);
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,67)
+ /* Give a racing hard_start_xmit a few cycles to complete. */
+ synchronize_net();
#endif
-#endif//CONFIG_R8125_NAPI
+
+ rtl8125_irq_mask_and_ack(tp);
+
+ rtl8125_wait_for_irq_complete(tp);
}
-#if 0
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
-static void rtl8125_reinit_task(void *_data)
-#else
-static void rtl8125_reinit_task(struct work_struct *work)
-#endif
+static void
+rtl8125_wait_for_quiescence(struct net_device *dev)
{
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
- struct net_device *dev = _data;
-#else
- struct rtl8125_private *tp =
- container_of(work, struct rtl8125_private, task.work);
- struct net_device *dev = tp->dev;
-#endif
- int ret;
+ struct rtl8125_private *tp = netdev_priv(dev);
- if (netif_running(dev)) {
- rtl8125_wait_for_quiescence(dev);
- rtl8125_close(dev);
- }
+ //suppress unused variable
+ (void)(tp);
- ret = rtl8125_open(dev);
- if (unlikely(ret < 0)) {
- if (unlikely(net_ratelimit())) {
- struct rtl8125_private *tp = netdev_priv(dev);
+ _rtl8125_wait_for_quiescence(dev);
- if (netif_msg_drv(tp)) {
- printk(PFX KERN_ERR
- "%s: reinit failure (status = %d)."
- " Rescheduling.\n", dev->name, ret);
- }
- }
- rtl8125_schedule_work(dev, rtl8125_reinit_task);
- }
+#ifdef CONFIG_R8125_NAPI
+ rtl8125_enable_napi(tp);
+#endif//CONFIG_R8125_NAPI
+}
+
+static int rtl8125_rx_nostuck(struct rtl8125_private *tp)
+{
+ int i, ret = 1;
+ for (i = 0; i < tp->num_rx_rings; i++)
+ ret &= (tp->rx_ring[i].dirty_rx == tp->rx_ring[i].cur_rx);
+ return ret;
}
-#endif
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
static void rtl8125_reset_task(void *_data)
@@ -9551,34 +15493,51 @@ static void rtl8125_reset_task(void *_data)
static void rtl8125_reset_task(struct work_struct *work)
{
struct rtl8125_private *tp =
- container_of(work, struct rtl8125_private, task.work);
+ container_of(work, struct rtl8125_private, reset_task.work);
struct net_device *dev = tp->dev;
#endif
u32 budget = ~(u32)0;
- unsigned long flags;
+ int i;
- if (!netif_running(dev))
- return;
+ rtnl_lock();
+
+ if (!netif_running(dev) ||
+ test_bit(R8125_FLAG_DOWN, tp->task_flags) ||
+ !test_and_clear_bit(R8125_FLAG_TASK_RESET_PENDING, tp->task_flags))
+ goto out_unlock;
rtl8125_wait_for_quiescence(dev);
+ for (i = 0; i < tp->num_rx_rings; i++) {
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
- rtl8125_rx_interrupt(dev, tp, tp->mmio_addr, &budget);
+ rtl8125_rx_interrupt(dev, tp, &tp->rx_ring[i], &budget);
#else
- rtl8125_rx_interrupt(dev, tp, tp->mmio_addr, budget);
+ rtl8125_rx_interrupt(dev, tp, &tp->rx_ring[i], budget);
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+ }
- spin_lock_irqsave(&tp->lock, flags);
+ netif_carrier_off(dev);
+ netif_tx_disable(dev);
+ rtl8125_hw_reset(dev);
rtl8125_tx_clear(tp);
- if (tp->dirty_rx == tp->cur_rx) {
+ if (rtl8125_rx_nostuck(tp)) {
rtl8125_rx_clear(tp);
rtl8125_init_ring(dev);
- rtl8125_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
- spin_unlock_irqrestore(&tp->lock, flags);
+#ifdef ENABLE_PTP_SUPPORT
+ rtl8125_ptp_reset(tp);
+#endif
+ if (tp->resume_not_chg_speed) {
+ _rtl8125_check_link_status(dev);
+
+ tp->resume_not_chg_speed = 0;
+ } else {
+ rtl8125_enable_hw_linkchg_interrupt(tp);
+
+ rtl8125_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
+ }
} else {
- spin_unlock_irqrestore(&tp->lock, flags);
if (unlikely(net_ratelimit())) {
struct rtl8125_private *tp = netdev_priv(dev);
@@ -9587,48 +15546,116 @@ static void rtl8125_reset_task(struct work_struct *work)
"%s: Rx buffers shortage\n", dev->name);
}
}
- rtl8125_schedule_work(dev, rtl8125_reset_task);
+ rtl8125_schedule_reset_work(tp);
}
+
+out_unlock:
+ rtnl_unlock();
}
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
+static void rtl8125_esd_task(void *_data)
+{
+ struct net_device *dev = _data;
+ struct rtl8125_private *tp = netdev_priv(dev);
+#else
+static void rtl8125_esd_task(struct work_struct *work)
+{
+ struct rtl8125_private *tp =
+ container_of(work, struct rtl8125_private, esd_task.work);
+ struct net_device *dev = tp->dev;
+#endif
+ rtnl_lock();
+
+ if (!netif_running(dev) ||
+ test_bit(R8125_FLAG_DOWN, tp->task_flags) ||
+ !test_and_clear_bit(R8125_FLAG_TASK_ESD_CHECK_PENDING, tp->task_flags))
+ goto out_unlock;
+
+ rtl8125_esd_checker(tp);
+
+ rtl8125_schedule_esd_work(tp);
+
+out_unlock:
+ rtnl_unlock();
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
+static void rtl8125_linkchg_task(void *_data)
+{
+ struct net_device *dev = _data;
+ //struct rtl8125_private *tp = netdev_priv(dev);
+#else
+static void rtl8125_linkchg_task(struct work_struct *work)
+{
+ struct rtl8125_private *tp =
+ container_of(work, struct rtl8125_private, linkchg_task.work);
+ struct net_device *dev = tp->dev;
+#endif
+ rtnl_lock();
+
+ if (!netif_running(dev) ||
+ test_bit(R8125_FLAG_DOWN, tp->task_flags) ||
+ !test_and_clear_bit(R8125_FLAG_TASK_LINKCHG_CHECK_PENDING, tp->task_flags))
+ goto out_unlock;
+
+ rtl8125_check_link_status(dev);
+
+out_unlock:
+ rtnl_unlock();
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0)
+static void
+rtl8125_tx_timeout(struct net_device *dev, unsigned int txqueue)
+#else
static void
rtl8125_tx_timeout(struct net_device *dev)
+#endif
{
struct rtl8125_private *tp = netdev_priv(dev);
- unsigned long flags;
-
- spin_lock_irqsave(&tp->lock, flags);
- netif_stop_queue(dev);
- netif_carrier_off(dev);
- rtl8125_hw_reset(dev);
- spin_unlock_irqrestore(&tp->lock, flags);
/* Let's wait a bit while any (async) irq lands on */
- rtl8125_schedule_work(dev, rtl8125_reset_task);
+ rtl8125_schedule_reset_work(tp);
+}
+
+static u32
+rtl8125_get_txd_opts1(struct rtl8125_tx_ring *ring,
+ u32 opts1,
+ u32 len,
+ unsigned int entry)
+{
+ u32 status = opts1 | len;
+
+ if (entry == ring->num_tx_desc - 1)
+ status |= RingEnd;
+
+ return status;
}
static int
rtl8125_xmit_frags(struct rtl8125_private *tp,
+ struct rtl8125_tx_ring *ring,
struct sk_buff *skb,
- u32 opts1,
- u32 opts2)
+ const u32 *opts)
{
struct skb_shared_info *info = skb_shinfo(skb);
unsigned int cur_frag, entry;
struct TxDesc *txd = NULL;
const unsigned char nr_frags = info->nr_frags;
unsigned long PktLenCnt = 0;
+ bool LsoPatchEnabled = FALSE;
- entry = tp->cur_tx;
+ entry = ring->cur_tx;
for (cur_frag = 0; cur_frag < nr_frags; cur_frag++) {
skb_frag_t *frag = info->frags + cur_frag;
dma_addr_t mapping;
u32 status, len;
void *addr;
- entry = (entry + 1) % NUM_TX_DESC;
+ entry = (entry + 1) % ring->num_tx_desc;
- txd = tp->TxDescArray + entry;
+ txd = ring->TxDescArray + entry;
#if LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0)
len = frag->size;
addr = ((void *) page_address(frag->page)) + frag->page_offset;
@@ -9636,14 +15663,15 @@ rtl8125_xmit_frags(struct rtl8125_private *tp,
len = skb_frag_size(frag);
addr = skb_frag_address(frag);
#endif
- if ((cur_frag == nr_frags - 1) &&
- (opts1 & (GiantSendv4|GiantSendv6)) &&
+ if (tp->RequireLSOPatch &&
+ (cur_frag == nr_frags - 1) &&
+ (opts[0] & (GiantSendv4|GiantSendv6)) &&
PktLenCnt < ETH_FRAME_LEN &&
len > 1) {
len -= 1;
- mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE);
+ mapping = dma_map_single(tp_to_dev(tp), addr, len, DMA_TO_DEVICE);
- if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) {
+ if (unlikely(dma_mapping_error(tp_to_dev(tp), mapping))) {
if (unlikely(net_ratelimit()))
netif_err(tp, drv, tp->dev,
"Failed to map TX fragments DMA!\n");
@@ -9651,26 +15679,29 @@ rtl8125_xmit_frags(struct rtl8125_private *tp,
}
/* anti gcc 2.95.3 bugware (sic) */
- status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
+ status = rtl8125_get_txd_opts1(ring, opts[0], len, entry);
txd->addr = cpu_to_le64(mapping);
- tp->tx_skb[entry].len = len;
+ ring->tx_skb[entry].len = len;
+ txd->opts2 = cpu_to_le32(opts[1]);
+ wmb();
txd->opts1 = cpu_to_le32(status);
- txd->opts2 = cpu_to_le32(opts2);
//second txd
addr += len;
len = 1;
- entry = (entry + 1) % NUM_TX_DESC;
- txd = tp->TxDescArray + entry;
+ entry = (entry + 1) % ring->num_tx_desc;
+ txd = ring->TxDescArray + entry;
cur_frag += 1;
+
+ LsoPatchEnabled = TRUE;
}
- mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE);
+ mapping = dma_map_single(tp_to_dev(tp), addr, len, DMA_TO_DEVICE);
- if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) {
+ if (unlikely(dma_mapping_error(tp_to_dev(tp), mapping))) {
if (unlikely(net_ratelimit()))
netif_err(tp, drv, tp->dev,
"Failed to map TX fragments DMA!\n");
@@ -9678,34 +15709,36 @@ rtl8125_xmit_frags(struct rtl8125_private *tp,
}
/* anti gcc 2.95.3 bugware (sic) */
- status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
+ status = rtl8125_get_txd_opts1(ring, opts[0], len, entry);
+ if (cur_frag == (nr_frags - 1) || LsoPatchEnabled == TRUE) {
+ //ring->tx_skb[entry].skb = skb;
+ status |= LastFrag;
+ }
txd->addr = cpu_to_le64(mapping);
- tp->tx_skb[entry].len = len;
+ ring->tx_skb[entry].len = len;
+ txd->opts2 = cpu_to_le32(opts[1]);
+ wmb();
txd->opts1 = cpu_to_le32(status);
- txd->opts2 = cpu_to_le32(opts2);
PktLenCnt += len;
}
- if (cur_frag) {
- tp->tx_skb[entry].skb = skb;
- wmb();
- txd->opts1 |= cpu_to_le32(LastFrag);
- }
-
return cur_frag;
err_out:
- rtl8125_tx_clear_range(tp, tp->cur_tx + 1, cur_frag);
+ rtl8125_tx_clear_range(tp, ring, ring->cur_tx + 1, cur_frag);
return -EIO;
}
static inline
__be16 get_protocol(struct sk_buff *skb)
{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)
+ return vlan_get_protocol(skb);
+#else
__be16 protocol;
if (skb->protocol == htons(ETH_P_8021Q))
@@ -9713,16 +15746,187 @@ __be16 get_protocol(struct sk_buff *skb)
else
protocol = skb->protocol;
- return protocol;
-}
+ return protocol;
+#endif
+}
+
+static inline
+u8 rtl8125_get_l4_protocol(struct sk_buff *skb)
+{
+ int no = skb_network_offset(skb);
+ struct ipv6hdr *i6h, _i6h;
+ struct iphdr *ih, _ih;
+ u8 ip_protocol = IPPROTO_RAW;
+
+ switch (get_protocol(skb)) {
+ case __constant_htons(ETH_P_IP):
+ ih = skb_header_pointer(skb, no, sizeof(_ih), &_ih);
+ if (ih)
+ ip_protocol = ih->protocol;
+ break;
+ case __constant_htons(ETH_P_IPV6):
+ i6h = skb_header_pointer(skb, no, sizeof(_i6h), &_i6h);
+ if (i6h)
+ ip_protocol = i6h->nexthdr;
+ break;
+ }
+
+ return ip_protocol;
+}
+
+static bool rtl8125_skb_pad_with_len(struct sk_buff *skb, unsigned int len)
+{
+ if (skb_padto(skb, len))
+ return false;
+ skb_put(skb, len - skb->len);
+ return true;
+}
+
+static bool rtl8125_skb_pad(struct sk_buff *skb)
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,19,0)
+ return rtl8125_skb_pad_with_len(skb, ETH_ZLEN);
+#else
+ return !eth_skb_pad(skb);
+#endif
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)
+/* msdn_giant_send_check()
+ * According to the document of microsoft, the TCP Pseudo Header excludes the
+ * packet length for IPv6 TCP large packets.
+ */
+static int msdn_giant_send_check(struct sk_buff *skb)
+{
+ const struct ipv6hdr *ipv6h;
+ struct tcphdr *th;
+ int ret;
+
+ ret = skb_cow_head(skb, 0);
+ if (ret)
+ return ret;
+
+ ipv6h = ipv6_hdr(skb);
+ th = tcp_hdr(skb);
+
+ th->check = 0;
+ th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
+
+ return ret;
+}
+#endif
+
+#define MIN_PATCH_LEN (47)
+static u32
+rtl8125_get_patch_pad_len(struct sk_buff *skb)
+{
+ u32 pad_len = 0;
+ int trans_data_len;
+ u32 hdr_len;
+ u32 pkt_len = skb->len;
+ u8 ip_protocol;
+ bool has_trans = skb_transport_header_was_set(skb);
+
+ if (!(has_trans && (pkt_len < 175))) //128 + MIN_PATCH_LEN
+ goto no_padding;
+
+ ip_protocol = rtl8125_get_l4_protocol(skb);
+ if (!(ip_protocol == IPPROTO_TCP || ip_protocol == IPPROTO_UDP))
+ goto no_padding;
+
+ trans_data_len = pkt_len -
+ (skb->transport_header -
+ skb_headroom(skb));
+ if (ip_protocol == IPPROTO_UDP) {
+ if (trans_data_len > 3 && trans_data_len < MIN_PATCH_LEN) {
+ u16 dest_port = 0;
+
+ skb_copy_bits(skb, skb->transport_header - skb_headroom(skb) + 2, &dest_port, 2);
+ dest_port = ntohs(dest_port);
+
+ if (dest_port == 0x13f ||
+ dest_port == 0x140) {
+ pad_len = MIN_PATCH_LEN - trans_data_len;
+ goto out;
+ }
+ }
+ }
+
+ hdr_len = 0;
+ if (ip_protocol == IPPROTO_TCP)
+ hdr_len = 20;
+ else if (ip_protocol == IPPROTO_UDP)
+ hdr_len = 8;
+ if (trans_data_len < hdr_len)
+ pad_len = hdr_len - trans_data_len;
+
+out:
+ if ((pkt_len + pad_len) < ETH_ZLEN)
+ pad_len = ETH_ZLEN - pkt_len;
+
+ return pad_len;
+
+no_padding:
+
+ return 0;
+}
+
+static bool
+rtl8125_tso_csum(struct sk_buff *skb,
+ struct net_device *dev,
+ u32 *opts)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+ unsigned long large_send = 0;
+ u32 csum_cmd = 0;
+ u8 sw_calc_csum = false;
+ u8 check_patch_required = true;
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+ if (dev->features & (NETIF_F_TSO | NETIF_F_TSO6)) {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
+ u32 mss = skb_shinfo(skb)->tso_size;
+#else
+ u32 mss = skb_shinfo(skb)->gso_size;
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
+
+ /* TCP Segmentation Offload (or TCP Large Send) */
+ if (mss) {
+ assert((skb_transport_offset(skb)%2) == 0);
+ switch (get_protocol(skb)) {
+ case __constant_htons(ETH_P_IP):
+ if (skb_transport_offset(skb) <= GTTCPHO_MAX) {
+ opts[0] |= GiantSendv4;
+ opts[0] |= skb_transport_offset(skb) << GTTCPHO_SHIFT;
+ opts[1] |= min(mss, MSS_MAX) << 18;
+ large_send = 1;
+ }
+ break;
+ case __constant_htons(ETH_P_IPV6):
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)
+ if (msdn_giant_send_check(skb))
+ return false;
+#endif
+ if (skb_transport_offset(skb) <= GTTCPHO_MAX) {
+ opts[0] |= GiantSendv6;
+ opts[0] |= skb_transport_offset(skb) << GTTCPHO_SHIFT;
+ opts[1] |= min(mss, MSS_MAX) << 18;
+ large_send = 1;
+ }
+ break;
+ default:
+ if (unlikely(net_ratelimit()))
+ dprintk("tso proto=%x!\n", skb->protocol);
+ break;
+ }
+
+ if (large_send == 0)
+ return false;
-static inline u32
-rtl8125_tx_csum(struct sk_buff *skb,
- struct net_device *dev)
-{
- struct rtl8125_private *tp = netdev_priv(dev);
- u32 csum_cmd = 0;
- u8 sw_calc_csum = FALSE;
+ return true;
+ }
+ }
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
if (skb->ip_summed == CHECKSUM_PARTIAL) {
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
@@ -9748,11 +15952,10 @@ rtl8125_tx_csum(struct sk_buff *skb,
break;
case __constant_htons(ETH_P_IPV6):
if (dev->features & NETIF_F_IPV6_CSUM) {
- u32 transport_offset = (u32)skb_transport_offset(skb);
- if (transport_offset > 0 && transport_offset <= TCPHO_MAX) {
+ if (skb_transport_offset(skb) > 0 && skb_transport_offset(skb) <= TCPHO_MAX) {
ip_protocol = ipv6_hdr(skb)->nexthdr;
csum_cmd = tp->tx_ipv6_csum_cmd;
- csum_cmd |= transport_offset << TCPHO_SHIFT;
+ csum_cmd |= skb_transport_offset(skb) << TCPHO_SHIFT;
}
}
break;
@@ -9768,15 +15971,38 @@ rtl8125_tx_csum(struct sk_buff *skb,
csum_cmd |= tp->tx_udp_csum_cmd;
#endif
if (csum_cmd == 0) {
- sw_calc_csum = TRUE;
+ sw_calc_csum = true;
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
WARN_ON(1); /* we need a WARN() */
#endif
}
+
+ if (ip_protocol == IPPROTO_TCP)
+ check_patch_required = false;
+ }
+
+ if (check_patch_required) {
+ u32 pad_len = rtl8125_get_patch_pad_len(skb);
+
+ if (pad_len > 0) {
+ if (!rtl8125_skb_pad_with_len(skb, skb->len + pad_len))
+ return false;
+
+ if (csum_cmd != 0)
+ sw_calc_csum = true;
+ }
}
- if (tp->ShortPacketSwChecksum && skb->len < 60 && csum_cmd != 0)
- sw_calc_csum = TRUE;
+ if (skb->len < ETH_ZLEN) {
+ if (tp->UseSwPaddingShortPkt ||
+ (tp->ShortPacketSwChecksum && csum_cmd != 0)) {
+ if (!rtl8125_skb_pad(skb))
+ return false;
+
+ if (csum_cmd != 0)
+ sw_calc_csum = true;
+ }
+ }
if (sw_calc_csum) {
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) && LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,7)
@@ -9786,245 +16012,120 @@ rtl8125_tx_csum(struct sk_buff *skb,
#else
skb_checksum_help(skb);
#endif
- csum_cmd = 0;
- }
+ } else
+ opts[1] |= csum_cmd;
- return csum_cmd;
+ return true;
}
-static int
-rtl8125_sw_padding_short_pkt(struct rtl8125_private *tp,
- struct sk_buff *skb,
- u32 opts1,
- u32 opts2)
+static bool rtl8125_tx_slots_avail(struct rtl8125_private *tp,
+ struct rtl8125_tx_ring *ring)
{
- unsigned int entry;
- dma_addr_t mapping;
- u32 status, len;
- void *addr;
- struct TxDesc *txd = NULL;
- int ret = 0;
-
- if (skb->len >= ETH_ZLEN)
- goto out;
-
- entry = tp->cur_tx;
-
- entry = (entry + 1) % NUM_TX_DESC;
-
- txd = tp->TxDescArray + entry;
- len = ETH_ZLEN - skb->len;
- addr = tp->ShortPacketEmptyBuffer;
- mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE);
- if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) {
- if (unlikely(net_ratelimit()))
- netif_err(tp, drv, tp->dev,
- "Failed to map Short Packet Buffer DMA!\n");
- ret = -ENOMEM;
- goto out;
- }
- status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
-
- txd->addr = cpu_to_le64(mapping);
-
- txd->opts1 = cpu_to_le32(status);
- txd->opts2 = cpu_to_le32(opts2);
-
- wmb();
- txd->opts1 |= cpu_to_le32(LastFrag);
-out:
- return ret;
-}
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)
-/* r8169_csum_workaround()
- * The hw limites the value the transport offset. When the offset is out of the
- * range, calculate the checksum by sw.
- */
-static void r8125_csum_workaround(struct rtl8125_private *tp,
- struct sk_buff *skb)
-{
- if (skb_shinfo(skb)->gso_size) {
- netdev_features_t features = tp->dev->features;
- struct sk_buff *segs, *nskb;
-
- features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
- segs = skb_gso_segment(skb, features);
- if (IS_ERR(segs) || !segs)
- goto drop;
-
- do {
- nskb = segs;
- segs = segs->next;
- nskb->next = NULL;
- rtl8125_start_xmit(nskb, tp->dev);
- } while (segs);
-
- dev_consume_skb_any(skb);
- } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
- if (skb_checksum_help(skb) < 0)
- goto drop;
-
- rtl8125_start_xmit(skb, tp->dev);
- } else {
- struct net_device_stats *stats;
+ unsigned int slots_avail = READ_ONCE(ring->dirty_tx) + ring->num_tx_desc
+ - READ_ONCE(ring->cur_tx);
-drop:
- stats = &tp->dev->stats;
- stats->tx_dropped++;
- dev_kfree_skb_any(skb);
- }
+ /* A skbuff with nr_frags needs nr_frags+1 entries in the tx queue */
+ return slots_avail > MAX_SKB_FRAGS;
}
-/* msdn_giant_send_check()
- * According to the document of microsoft, the TCP Pseudo Header excludes the
- * packet length for IPv6 TCP large packets.
- */
-static int msdn_giant_send_check(struct sk_buff *skb)
+static inline u32
+rtl8125_fast_mod_mask(const u32 input, const u32 mask)
{
- const struct ipv6hdr *ipv6h;
- struct tcphdr *th;
- int ret;
-
- ret = skb_cow_head(skb, 0);
- if (ret)
- return ret;
-
- ipv6h = ipv6_hdr(skb);
- th = tcp_hdr(skb);
-
- th->check = 0;
- th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
-
- return ret;
+ return input > mask ? input & mask : input;
}
-#endif
-static int
+static netdev_tx_t
rtl8125_start_xmit(struct sk_buff *skb,
struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
unsigned int entry;
struct TxDesc *txd;
- void __iomem *ioaddr = tp->mmio_addr;
dma_addr_t mapping;
u32 len;
- u32 opts1;
- u32 opts2;
- int ret = NETDEV_TX_OK;
- unsigned long flags, large_send;
+ u32 opts[2];
+ netdev_tx_t ret = NETDEV_TX_OK;
int frags;
+ u8 EnableTxNoClose = tp->EnableTxNoClose;
+ const u16 queue_mapping = skb_get_queue_mapping(skb);
+ struct rtl8125_tx_ring *ring;
+ bool stop_queue;
+
+ assert(queue_mapping < tp->num_tx_rings);
- spin_lock_irqsave(&tp->lock, flags);
+ ring = &tp->tx_ring[queue_mapping];
- if (unlikely(TX_BUFFS_AVAIL(tp) < skb_shinfo(skb)->nr_frags)) {
+ if (unlikely(!rtl8125_tx_slots_avail(tp, ring))) {
if (netif_msg_drv(tp)) {
printk(KERN_ERR
- "%s: BUG! Tx Ring full when queue awake!\n",
- dev->name);
+ "%s: BUG! Tx Ring[%d] full when queue awake!\n",
+ dev->name,
+ queue_mapping);
}
goto err_stop;
}
- entry = tp->cur_tx % NUM_TX_DESC;
- txd = tp->TxDescArray + entry;
-
- if (unlikely(le32_to_cpu(txd->opts1) & DescOwn))
- goto err_stop;
-
- opts1 = DescOwn;
- opts2 = rtl8125_tx_vlan_tag(tp, skb);
-
- large_send = 0;
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
- if (dev->features & (NETIF_F_TSO | NETIF_F_TSO6)) {
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
- u32 mss = skb_shinfo(skb)->tso_size;
-#else
- u32 mss = skb_shinfo(skb)->gso_size;
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
+ entry = ring->cur_tx % ring->num_tx_desc;
+ txd = ring->TxDescArray + entry;
- /* TCP Segmentation Offload (or TCP Large Send) */
- if (mss) {
- u32 transport_offset = (u32)skb_transport_offset(skb);
- assert((transport_offset%2) == 0);
- switch (get_protocol(skb)) {
- case __constant_htons(ETH_P_IP):
- if (transport_offset <= 128) {
- opts1 |= GiantSendv4;
- opts1 |= transport_offset << GTTCPHO_SHIFT;
- opts2 |= min(mss, MSS_MAX) << 18;
- large_send = 1;
- }
- break;
- case __constant_htons(ETH_P_IPV6):
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)
- if (msdn_giant_send_check(skb)) {
- spin_unlock_irqrestore(&tp->lock, flags);
- r8125_csum_workaround(tp, skb);
- goto out;
- }
-#endif
- if (transport_offset <= 128) {
- opts1 |= GiantSendv6;
- opts1 |= transport_offset << GTTCPHO_SHIFT;
- opts2 |= min(mss, MSS_MAX) << 18;
- large_send = 1;
- }
- break;
- default:
- if (unlikely(net_ratelimit()))
- dprintk("tso proto=%x!\n", skb->protocol);
- break;
+ if (!EnableTxNoClose) {
+ if (unlikely(le32_to_cpu(txd->opts1) & DescOwn)) {
+ if (netif_msg_drv(tp)) {
+ printk(KERN_ERR
+ "%s: BUG! Tx Desc is own by hardware!\n",
+ dev->name);
}
-
- if (large_send == 0)
- goto err_dma_0;
+ goto err_stop;
}
}
-#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
- if (large_send == 0) {
- if (skb->ip_summed == CHECKSUM_PARTIAL) {
- opts2 |= rtl8125_tx_csum(skb, dev);
- }
- }
+ opts[0] = DescOwn;
+ opts[1] = rtl8125_tx_vlan_tag(tp, skb);
+
+ if (unlikely(!rtl8125_tso_csum(skb, dev, opts)))
+ goto err_dma_0;
- frags = rtl8125_xmit_frags(tp, skb, opts1, opts2);
+ frags = rtl8125_xmit_frags(tp, ring, skb, opts);
if (unlikely(frags < 0))
goto err_dma_0;
if (frags) {
len = skb_headlen(skb);
- opts1 |= FirstFrag;
+ opts[0] |= FirstFrag;
} else {
len = skb->len;
- tp->tx_skb[entry].skb = skb;
+ //ring->tx_skb[entry].skb = skb;
- if (tp->UseSwPaddingShortPkt && len < 60) {
- if (unlikely(rtl8125_sw_padding_short_pkt(tp, skb, opts1, opts2)))
- goto err_dma_1;
- opts1 |= FirstFrag;
- frags++;
- } else {
- opts1 |= FirstFrag | LastFrag;
- }
+ opts[0] |= FirstFrag | LastFrag;
}
- opts1 |= len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
- mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
- if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) {
+ opts[0] = rtl8125_get_txd_opts1(ring, opts[0], len, entry);
+ mapping = dma_map_single(tp_to_dev(tp), skb->data, len, DMA_TO_DEVICE);
+ if (unlikely(dma_mapping_error(tp_to_dev(tp), mapping))) {
if (unlikely(net_ratelimit()))
netif_err(tp, drv, dev, "Failed to map TX DMA!\n");
goto err_dma_1;
}
- tp->tx_skb[entry].len = len;
+ ring->tx_skb[entry].len = len;
+#ifdef ENABLE_PTP_SUPPORT
+ if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
+ if (tp->hwtstamp_config.tx_type == HWTSTAMP_TX_ON &&
+ !tp->ptp_tx_skb) {
+ skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
+
+ tp->ptp_tx_skb = skb_get(skb);
+ tp->ptp_tx_start = jiffies;
+ schedule_work(&tp->ptp_tx_work);
+ } else {
+ tp->tx_hwtstamp_skipped++;
+ }
+ }
+#endif
+ ring->tx_skb[entry].skb = skb;
txd->addr = cpu_to_le64(mapping);
- txd->opts2 = cpu_to_le32(opts2);
- txd->opts1 = cpu_to_le32(opts1&~DescOwn);
+ txd->opts2 = cpu_to_le32(opts[1]);
wmb();
- txd->opts1 = cpu_to_le32(opts1);
+ txd->opts1 = cpu_to_le32(opts[0]);
#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0)
dev->trans_start = jiffies;
@@ -10032,201 +16133,427 @@ rtl8125_start_xmit(struct sk_buff *skb,
skb_tx_timestamp(skb);
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0)
- tp->cur_tx += frags + 1;
-
- wmb();
+ /* rtl_tx needs to see descriptor changes before updated tp->cur_tx */
+ smp_wmb();
- RTL_W16(TPPOLL_8125, BIT_0); /* set polling bit */
+ WRITE_ONCE(ring->cur_tx, ring->cur_tx + frags + 1);
- if (TX_BUFFS_AVAIL(tp) < MAX_SKB_FRAGS) {
- netif_stop_queue(dev);
- smp_rmb();
- if (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)
- netif_wake_queue(dev);
+ stop_queue = !rtl8125_tx_slots_avail(tp, ring);
+ if (unlikely(stop_queue)) {
+ /* Avoid wrongly optimistic queue wake-up: rtl_tx thread must
+ * not miss a ring update when it notices a stopped queue.
+ */
+ smp_wmb();
+ netif_stop_subqueue(dev, queue_mapping);
}
- spin_unlock_irqrestore(&tp->lock, flags);
+ if (EnableTxNoClose) {
+ if (tp->HwSuppTxNoCloseVer == 4)
+ RTL_W32(tp, ring->sw_tail_ptr_reg, ring->cur_tx);
+ else
+ RTL_W16(tp, ring->sw_tail_ptr_reg, ring->cur_tx);
+ } else
+ RTL_W16(tp, TPPOLL_8125, BIT(ring->index)); /* set polling bit */
+
+ if (unlikely(stop_queue)) {
+ /* Sync with rtl_tx:
+ * - publish queue status and cur_tx ring index (write barrier)
+ * - refresh dirty_tx ring index (read barrier).
+ * May the current thread have a pessimistic view of the ring
+ * status and forget to wake up queue, a racing rtl_tx thread
+ * can't.
+ */
+ smp_mb();
+ if (rtl8125_tx_slots_avail(tp, ring))
+ netif_start_subqueue(dev, queue_mapping);
+ }
out:
return ret;
err_dma_1:
- tp->tx_skb[entry].skb = NULL;
- rtl8125_tx_clear_range(tp, tp->cur_tx + 1, frags);
+ ring->tx_skb[entry].skb = NULL;
+ rtl8125_tx_clear_range(tp, ring, ring->cur_tx + 1, frags);
err_dma_0:
RTLDEV->stats.tx_dropped++;
- spin_unlock_irqrestore(&tp->lock, flags);
dev_kfree_skb_any(skb);
ret = NETDEV_TX_OK;
goto out;
err_stop:
- netif_stop_queue(dev);
+ netif_stop_subqueue(dev, queue_mapping);
ret = NETDEV_TX_BUSY;
RTLDEV->stats.tx_dropped++;
-
- spin_unlock_irqrestore(&tp->lock, flags);
goto out;
}
-static void
-rtl8125_tx_interrupt(struct net_device *dev,
- struct rtl8125_private *tp,
- void __iomem *ioaddr)
+static u32
+rtl8125_get_hw_clo_ptr(struct rtl8125_tx_ring *ring)
{
- unsigned int dirty_tx, tx_left;
+ struct rtl8125_private *tp = ring->priv;
- assert(dev != NULL);
- assert(tp != NULL);
- assert(ioaddr != NULL);
+ switch (tp->HwSuppTxNoCloseVer) {
+ case 3:
+ return RTL_R16(tp, ring->hw_clo_ptr_reg);
+ case 4:
+ return RTL_R32(tp, ring->hw_clo_ptr_reg);
+ default:
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+ WARN_ON(1);
+#endif
+ return 0;
+ }
+}
+
+static int
+rtl8125_tx_interrupt(struct rtl8125_tx_ring *ring, int budget)
+{
+ struct rtl8125_private *tp = ring->priv;
+ struct net_device *dev = tp->dev;
+ unsigned int dirty_tx, tx_left;
+ unsigned int count = 0;
+ u8 EnableTxNoClose = tp->EnableTxNoClose;
- dirty_tx = tp->dirty_tx;
+ dirty_tx = ring->dirty_tx;
smp_rmb();
- tx_left = tp->cur_tx - dirty_tx;
+ tx_left = READ_ONCE(ring->cur_tx) - dirty_tx;
+ if (EnableTxNoClose) {
+ unsigned int tx_desc_closed;
+ u32 NextHwDesCloPtr = rtl8125_get_hw_clo_ptr(ring);
+ ring->NextHwDesCloPtr = NextHwDesCloPtr;
+ smp_rmb();
+ tx_desc_closed = rtl8125_fast_mod_mask(NextHwDesCloPtr - ring->BeginHwDesCloPtr, tp->MaxTxDescPtrMask);
+ if(tx_left > tx_desc_closed) tx_left = tx_desc_closed;
+ ring->BeginHwDesCloPtr = NextHwDesCloPtr;
+ }
while (tx_left > 0) {
- unsigned int entry = dirty_tx % NUM_TX_DESC;
- struct ring_info *tx_skb = tp->tx_skb + entry;
- u32 len = tx_skb->len;
- u32 status;
+ unsigned int entry = dirty_tx % ring->num_tx_desc;
+ struct ring_info *tx_skb = ring->tx_skb + entry;
- rmb();
- status = le32_to_cpu(tp->TxDescArray[entry].opts1);
- if (status & DescOwn)
+ if (!EnableTxNoClose &&
+ (le32_to_cpu(ring->TxDescArray[entry].opts1) & DescOwn))
break;
- RTLDEV->stats.tx_bytes += len;
+ RTLDEV->stats.tx_bytes += tx_skb->len;
RTLDEV->stats.tx_packets++;
rtl8125_unmap_tx_skb(tp->pci_dev,
tx_skb,
- tp->TxDescArray + entry);
+ ring->TxDescArray + entry);
- if (tx_skb->skb!=NULL) {
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)
- dev_consume_skb_any(tx_skb->skb);
-#else
- dev_kfree_skb_any(tx_skb->skb);
-#endif
+ if (tx_skb->skb != NULL) {
+ RTL_NAPI_CONSUME_SKB_ANY(tx_skb->skb, budget);
tx_skb->skb = NULL;
}
dirty_tx++;
tx_left--;
}
- if (tp->dirty_tx != dirty_tx) {
- tp->dirty_tx = dirty_tx;
+ if (ring->dirty_tx != dirty_tx) {
+ count = dirty_tx - ring->dirty_tx;
+ WRITE_ONCE(ring->dirty_tx, dirty_tx);
smp_wmb();
- if (netif_queue_stopped(dev) &&
- (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)) {
- netif_wake_queue(dev);
+ if (__netif_subqueue_stopped(dev, ring->index) &&
+ (rtl8125_tx_slots_avail(tp, ring))) {
+ netif_start_subqueue(dev, ring->index);
}
smp_rmb();
- if (tp->cur_tx != dirty_tx) {
- RTL_W16(TPPOLL_8125, BIT_0);
+ if (!EnableTxNoClose && (ring->cur_tx != dirty_tx)) {
+ RTL_W16(tp, TPPOLL_8125, BIT(ring->index));
}
}
+
+ return count;
+}
+
+static int
+rtl8125_tx_interrupt_with_vector(struct rtl8125_private *tp,
+ const int message_id,
+ int budget)
+{
+ int count = 0;
+
+ if (message_id == 16)
+ count += rtl8125_tx_interrupt(&tp->tx_ring[0], budget);
+#ifdef ENABLE_MULTIPLE_TX_QUEUE
+ else if (message_id == 18)
+ count += rtl8125_tx_interrupt(&tp->tx_ring[1], budget);
+#endif
+
+ return count;
}
static inline int
-rtl8125_fragmented_frame(u32 status)
+rtl8125_fragmented_frame(struct rtl8125_private *tp, u32 status)
{
- return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag);
+ if (tp->InitRxDescType == RX_DESC_RING_TYPE_3)
+ return (status & (FirstFrag_V3 | LastFrag_V3)) != (FirstFrag_V3 | LastFrag_V3);
+ else
+ return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag);
+}
+
+static inline int
+rtl8125_is_non_eop(struct rtl8125_private *tp, u32 status)
+{
+ if (tp->InitRxDescType == RX_DESC_RING_TYPE_3)
+ return !(status & LastFrag_V3);
+ else
+ return !(status & LastFrag);
+}
+
+static inline int
+rtl8125_rx_desc_type(u32 status)
+{
+ return ((status >> 26) & 0x0F);
}
static inline void
-rtl8125_rx_csum(struct rtl8125_private *tp,
- struct sk_buff *skb,
- struct RxDesc *desc)
+rtl8125_rx_v3_csum(struct rtl8125_private *tp,
+ struct sk_buff *skb,
+ struct RxDescV3 *descv3)
{
- u32 opts1 = le32_to_cpu(desc->opts1);
- u32 opts2 = le32_to_cpu(desc->opts2);
+ u32 opts2 = le32_to_cpu(descv3->RxDescNormalDDWord4.opts2);
/* rx csum offload for RTL8125 */
- if (((opts2 & RxV4F) && !(opts1 & RxIPF)) || (opts2 & RxV6F)) {
+ if (((opts2 & RxTCPT_v3) && !(opts2 & RxTCPF_v3)) ||
+ ((opts2 & RxUDPT_v3) && !(opts2 & RxUDPF_v3)))
+ skb->ip_summed = CHECKSUM_UNNECESSARY;
+ else
+ skb_checksum_none_assert(skb);
+}
+
+static inline void
+rtl8125_rx_csum(struct rtl8125_private *tp,
+ struct sk_buff *skb,
+ struct RxDesc *desc,
+ u32 opts1)
+{
+ if (tp->InitRxDescType == RX_DESC_RING_TYPE_3)
+ rtl8125_rx_v3_csum(tp, skb, (struct RxDescV3 *)desc);
+ else {
+ /* rx csum offload for RTL8125 */
if (((opts1 & RxTCPT) && !(opts1 & RxTCPF)) ||
((opts1 & RxUDPT) && !(opts1 & RxUDPF)))
skb->ip_summed = CHECKSUM_UNNECESSARY;
else
- skb->ip_summed = CHECKSUM_NONE;
- } else
- skb->ip_summed = CHECKSUM_NONE;
+ skb_checksum_none_assert(skb);
+ }
+}
+
+/*
+static inline int
+rtl8125_try_rx_copy(struct rtl8125_private *tp,
+ struct rtl8125_rx_ring *ring,
+ struct sk_buff **sk_buff,
+ int pkt_size,
+ struct RxDesc *desc,
+ int rx_buf_sz)
+{
+ int ret = -1;
+
+ struct sk_buff *skb;
+
+ skb = RTL_ALLOC_SKB_INTR(&tp->r8125napi[ring->index].napi, pkt_size + R8125_RX_ALIGN);
+ if (skb) {
+ u8 *data;
+
+ data = sk_buff[0]->data;
+ skb_reserve(skb, R8125_RX_ALIGN);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37)
+ prefetch(data - R8125_RX_ALIGN);
+#endif
+ eth_copy_and_sum(skb, data, pkt_size, 0);
+ *sk_buff = skb;
+ rtl8125_mark_to_asic(tp, desc, rx_buf_sz);
+ ret = 0;
+ }
+
+ return ret;
+}
+*/
+
+static inline void
+rtl8125_rx_skb(struct rtl8125_private *tp,
+ struct sk_buff *skb,
+ u32 ring_index)
+{
+#ifdef CONFIG_R8125_NAPI
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
+ netif_receive_skb(skb);
+#else
+ napi_gro_receive(&tp->r8125napi[ring_index].napi, skb);
+#endif
+#else
+ netif_rx(skb);
+#endif
+}
+
+static int
+rtl8125_check_rx_desc_error(struct net_device *dev,
+ struct rtl8125_private *tp,
+ u32 status)
+{
+ int ret = 0;
+
+ if (tp->InitRxDescType == RX_DESC_RING_TYPE_3) {
+ if (unlikely(status & RxRES_V3)) {
+ if (status & (RxRWT_V3 | RxRUNT_V3))
+ RTLDEV->stats.rx_length_errors++;
+ if (status & RxCRC_V3)
+ RTLDEV->stats.rx_crc_errors++;
+
+ ret = -1;
+ }
+ } else {
+ if (unlikely(status & RxRES)) {
+ if (status & (RxRWT | RxRUNT))
+ RTLDEV->stats.rx_length_errors++;
+ if (status & RxCRC)
+ RTLDEV->stats.rx_crc_errors++;
+
+ ret = -1;
+ }
+ }
+
+ return ret;
+}
+
+#ifdef ENABLE_PAGE_REUSE
+
+static inline bool
+rtl8125_reuse_rx_ok(struct page *page)
+{
+ /* avoid re-using remote pages */
+ if (!dev_page_is_reusable(page)) {
+ //printk(KERN_INFO "r8125 page pfmemalloc, can't reuse!\n");
+ return false;
+ }
+ /* if we are only owner of page we can reuse it */
+ if (unlikely(page_ref_count(page) != 1)) {
+ //printk(KERN_INFO "r8125 page refcnt %d, can't reuse!\n", page_ref_count(page));
+ return false;
+ }
+
+ return true;
}
-static inline int
-rtl8125_try_rx_copy(struct rtl8125_private *tp,
- struct sk_buff **sk_buff,
- int pkt_size,
- struct RxDesc *desc,
- int rx_buf_sz)
+static void
+rtl8125_reuse_rx_buffer(struct rtl8125_private *tp, struct rtl8125_rx_ring *ring, u32 cur_rx, struct rtl8125_rx_buffer *rxb)
{
- int ret = -1;
+ struct page *page = rxb->page;
- if (pkt_size < rx_copybreak) {
- struct sk_buff *skb;
+ u32 dirty_rx = ring->dirty_rx;
+ u32 entry = dirty_rx % ring->num_rx_desc;
+ struct rtl8125_rx_buffer *nrxb = &ring->rx_buffer[entry];
- skb = RTL_ALLOC_SKB_INTR(tp, pkt_size + RTK_RX_ALIGN);
- if (skb) {
- u8 *data;
+ u32 noffset;
- data = sk_buff[0]->data;
- skb_reserve(skb, RTK_RX_ALIGN);
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37)
- prefetch(data - RTK_RX_ALIGN);
-#endif
- eth_copy_and_sum(skb, data, pkt_size, 0);
- *sk_buff = skb;
- rtl8125_mark_to_asic(desc, rx_buf_sz);
- ret = 0;
- }
+ //the page gonna be shared by us and kernel, keep page ref = 2
+ page_ref_inc(page);
+
+ //flip the buffer in page to use next
+ noffset = rxb->page_offset ^ (tp->rx_buf_page_size / 2); //one page, two buffer, ping-pong
+
+ nrxb->dma = rxb->dma;
+ nrxb->page_offset = noffset;
+ nrxb->data = rxb->data;
+
+ if (cur_rx != dirty_rx) {
+ //move the buffer to other slot
+ nrxb->page = page;
+ rxb->page = NULL;
}
- return ret;
}
-static inline void
-rtl8125_rx_skb(struct rtl8125_private *tp,
- struct sk_buff *skb)
+static void rtl8125_put_rx_buffer(struct rtl8125_private *tp,
+ struct rtl8125_rx_ring *ring,
+ u32 cur_rx,
+ struct rtl8125_rx_buffer *rxb)
{
-#ifdef CONFIG_R8125_NAPI
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
- netif_receive_skb(skb);
-#else
- napi_gro_receive(&tp->napi, skb);
-#endif
-#else
- netif_rx(skb);
-#endif
+ struct rtl8125_rx_buffer *nrxb;
+ struct page *page = rxb->page;
+ u32 entry;
+
+ entry = ring->dirty_rx % ring->num_rx_desc;
+ nrxb = &ring->rx_buffer[entry];
+ if (likely(rtl8125_reuse_rx_ok(page))) {
+ /* hand second half of page back to the ring */
+ rtl8125_reuse_rx_buffer(tp, ring, cur_rx, rxb);
+ } else {
+ tp->page_reuse_fail_cnt++;
+
+ dma_unmap_page_attrs(&tp->pci_dev->dev, rxb->dma,
+ tp->rx_buf_page_size,
+ DMA_FROM_DEVICE,
+ (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING));
+ //the page ref is kept 1, uniquely owned by kernel now
+ rxb->page = NULL;
+
+ return;
+ }
+
+ dma_sync_single_range_for_device(tp_to_dev(tp),
+ nrxb->dma,
+ nrxb->page_offset,
+ tp->rx_buf_sz,
+ DMA_FROM_DEVICE);
+
+ rtl8125_map_to_asic(tp, ring, ring->RxDescArray + entry,
+ nrxb->dma + nrxb->page_offset,
+ tp->rx_buf_sz, entry);
+
+ ring->dirty_rx++;
}
+#endif //ENABLE_PAGE_REUSE
+
static int
rtl8125_rx_interrupt(struct net_device *dev,
struct rtl8125_private *tp,
- void __iomem *ioaddr, napi_budget budget)
+ struct rtl8125_rx_ring *ring,
+ napi_budget budget)
{
unsigned int cur_rx, rx_left;
unsigned int delta, count = 0;
unsigned int entry;
struct RxDesc *desc;
+ struct sk_buff *skb;
u32 status;
u32 rx_quota;
+ u32 ring_index = ring->index;
+#ifdef ENABLE_PAGE_REUSE
+ struct rtl8125_rx_buffer *rxb;
+#else //ENABLE_PAGE_REUSE
+ u64 rx_buf_phy_addr;
+#endif //ENABLE_PAGE_REUSE
+ unsigned int total_rx_multicast_packets = 0;
+ unsigned int total_rx_bytes = 0, total_rx_packets = 0;
assert(dev != NULL);
assert(tp != NULL);
- assert(ioaddr != NULL);
- if ((tp->RxDescArray == NULL) || (tp->Rx_skbuff == NULL))
+ if (ring->RxDescArray == NULL)
goto rx_out;
rx_quota = RTL_RX_QUOTA(budget);
- cur_rx = tp->cur_rx;
- entry = cur_rx % NUM_RX_DESC;
- desc = tp->RxDescArray + entry;
- rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
+ cur_rx = ring->cur_rx;
+ rx_left = ring->num_rx_desc + ring->dirty_rx - cur_rx;
rx_left = rtl8125_rx_quota(rx_left, (u32)rx_quota);
- for (; rx_left > 0; rx_left--) {
- rmb();
- status = le32_to_cpu(desc->opts1);
+ for (; rx_left > 0; rx_left--, cur_rx++) {
+ int pkt_size;
+#ifndef ENABLE_PAGE_REUSE
+ const void *rx_buf;
+#endif //!ENABLE_PAGE_REUSE
+
+ entry = cur_rx % ring->num_rx_desc;
+ desc = rtl8125_get_rxdesc(tp, ring->RxDescArray, entry);
+ status = le32_to_cpu(rtl8125_rx_desc_opts1(tp, desc));
+
if (status & DescOwn)
break;
- if (unlikely(status & RxRES)) {
+
+ rmb();
+
+ if (unlikely(rtl8125_check_rx_desc_error(dev, tp, status) < 0)) {
if (netif_msg_rx_err(tp)) {
printk(KERN_INFO
"%s: Rx ERROR. status = %08x\n",
@@ -10235,87 +16562,179 @@ rtl8125_rx_interrupt(struct net_device *dev,
RTLDEV->stats.rx_errors++;
- if (status & (RxRWT | RxRUNT))
- RTLDEV->stats.rx_length_errors++;
- if (status & RxCRC)
- RTLDEV->stats.rx_crc_errors++;
- if (dev->features & NETIF_F_RXALL)
- goto process_pkt;
-
- rtl8125_mark_to_asic(desc, tp->rx_buf_sz);
- } else {
- struct sk_buff *skb;
- int pkt_size;
- void (*pci_action)(struct pci_dev *, dma_addr_t,
- size_t, int);
-
-process_pkt:
- if (likely(!(dev->features & NETIF_F_RXFCS)))
- pkt_size = (status & 0x00003fff) - 4;
- else
- pkt_size = status & 0x00003fff;
-
- /*
- * The driver does not support incoming fragmented
- * frames. They are seen as a symptom of over-mtu
- * sized frames.
- */
- if (unlikely(rtl8125_fragmented_frame(status))) {
- RTLDEV->stats.rx_dropped++;
- RTLDEV->stats.rx_length_errors++;
- rtl8125_mark_to_asic(desc, tp->rx_buf_sz);
- continue;
- }
+ if (!(dev->features & NETIF_F_RXALL))
+ goto release_descriptor;
+ }
+ pkt_size = status & 0x00003fff;
+ if (likely(!(dev->features & NETIF_F_RXFCS)) &&
+ !rtl8125_is_non_eop(tp, status))
+ pkt_size -= ETH_FCS_LEN;
- skb = tp->Rx_skbuff[entry];
- if (tp->cp_cmd & RxChkSum)
- rtl8125_rx_csum(tp, skb, desc);
+ if (unlikely(pkt_size > tp->rx_buf_sz))
+ goto drop_packet;
- pci_dma_sync_single_for_cpu(tp->pci_dev,
- le64_to_cpu(desc->addr), tp->rx_buf_sz,
- PCI_DMA_FROMDEVICE);
+#if !defined(ENABLE_RX_PACKET_FRAGMENT) || !defined(ENABLE_PAGE_REUSE)
+ /*
+ * The driver does not support incoming fragmented
+ * frames. They are seen as a symptom of over-mtu
+ * sized frames.
+ */
+ if (unlikely(rtl8125_fragmented_frame(tp, status)))
+ goto drop_packet;
+#endif //!ENABLE_RX_PACKET_FRAGMENT || !ENABLE_PAGE_REUSE
+
+#ifdef ENABLE_PTP_SUPPORT
+ if (tp->EnablePtp) {
+ u8 desc_type;
+
+ desc_type = rtl8125_rx_desc_type(status);
+ if (desc_type == RXDESC_TYPE_NEXT && rx_left > 0) {
+ u32 status_next;
+ struct RxDescV3 *desc_next;
+ unsigned int entry_next;
+ struct sk_buff *skb_next;
+
+ entry_next = (cur_rx + 1) % ring->num_rx_desc;
+ desc_next = (struct RxDescV3 *)rtl8125_get_rxdesc(tp, ring->RxDescArray, entry_next);
+ rmb();
+ status_next = le32_to_cpu(desc_next->RxDescNormalDDWord4.opts1);
+ if (unlikely(status_next & DescOwn)) {
+ udelay(1);
+ rmb();
+ status_next = le32_to_cpu(desc_next->RxDescNormalDDWord4.opts1);
+ if (unlikely(status_next & DescOwn)) {
+ if (netif_msg_rx_err(tp)) {
+ printk(KERN_ERR
+ "%s: Rx Next Desc ERROR. status = %08x\n",
+ dev->name, status_next);
+ }
+ break;
+ }
+ }
- pci_action = pci_dma_sync_single_for_device;
- if (rtl8125_try_rx_copy(tp, &skb, pkt_size,
- desc, tp->rx_buf_sz)) {
- pci_action = pci_unmap_single;
- tp->Rx_skbuff[entry] = NULL;
+ cur_rx++;
+ rx_left--;
+ desc_type = rtl8125_rx_desc_type(status_next);
+ if (desc_type == RXDESC_TYPE_PTP)
+ rtl8125_rx_ptp_pktstamp(tp, skb, desc_next);
+ else
+ WARN_ON(1);
+
+ rx_buf_phy_addr = ring->RxDescPhyAddr[entry_next];
+ dma_unmap_single(tp_to_dev(tp), rx_buf_phy_addr,
+ tp->rx_buf_sz, DMA_FROM_DEVICE);
+ skb_next = ring->Rx_skbuff[entry_next];
+ dev_kfree_skb_any(skb_next);
+ ring->Rx_skbuff[entry_next] = NULL;
+ } else
+ WARN_ON(desc_type != RXDESC_TYPE_NORMAL);
+ }
+#endif
+#ifdef ENABLE_PAGE_REUSE
+ rxb = &ring->rx_buffer[entry];
+ skb = rxb->skb;
+ rxb->skb = NULL;
+ if (!skb) {
+ skb = RTL_BUILD_SKB_INTR(rxb->data + rxb->page_offset - ring->rx_offset, tp->rx_buf_page_size / 2);
+ if (!skb) {
+ //netdev_err(tp->dev, "Failed to allocate RX skb!\n");
+ goto drop_packet;
}
- pci_action(tp->pci_dev, le64_to_cpu(desc->addr),
- tp->rx_buf_sz, PCI_DMA_FROMDEVICE);
-
skb->dev = dev;
+ skb_reserve(skb, R8125_RX_ALIGN);
skb_put(skb, pkt_size);
- skb->protocol = eth_type_trans(skb, dev);
+ } else
+ skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rxb->page,
+ rxb->page_offset, pkt_size, tp->rx_buf_page_size / 2);
+
+ //recycle desc
+ rtl8125_put_rx_buffer(tp, ring, cur_rx, rxb);
+
+ dma_sync_single_range_for_cpu(tp_to_dev(tp),
+ rxb->dma,
+ rxb->page_offset,
+ tp->rx_buf_sz,
+ DMA_FROM_DEVICE);
+#else //ENABLE_PAGE_REUSE
+ skb = RTL_ALLOC_SKB_INTR(&tp->r8125napi[ring->index].napi, pkt_size + R8125_RX_ALIGN);
+ if (!skb) {
+ //netdev_err(tp->dev, "Failed to allocate RX skb!\n");
+ goto drop_packet;
+ }
+
+ skb->dev = dev;
+ skb_reserve(skb, R8125_RX_ALIGN);
+ skb_put(skb, pkt_size);
+
+ rx_buf_phy_addr = ring->RxDescPhyAddr[entry];
+ dma_sync_single_for_cpu(tp_to_dev(tp),
+ rx_buf_phy_addr, tp->rx_buf_sz,
+ DMA_FROM_DEVICE);
+ rx_buf = ring->Rx_skbuff[entry]->data;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37)
+ prefetch(rx_buf - R8125_RX_ALIGN);
+#endif
+ eth_copy_and_sum(skb, rx_buf, pkt_size, 0);
+
+ dma_sync_single_for_device(tp_to_dev(tp), rx_buf_phy_addr,
+ tp->rx_buf_sz, DMA_FROM_DEVICE);
+#endif //ENABLE_PAGE_REUSE
+
+#ifdef ENABLE_RX_PACKET_FRAGMENT
+ if (rtl8125_is_non_eop(tp, status)) {
+ unsigned int entry_next;
+ entry_next = (entry + 1) % ring->num_rx_desc;
+ rxb = &ring->rx_buffer[entry_next];
+ rxb->skb = skb;
+ continue;
+ }
+#endif //ENABLE_RX_PACKET_FRAGMENT
+
+#ifdef ENABLE_RSS_SUPPORT
+ rtl8125_rx_hash(tp, (struct RxDescV3 *)desc, skb);
+#endif
+ rtl8125_rx_csum(tp, skb, desc, status);
- if (skb->pkt_type == PACKET_MULTICAST)
- RTLDEV->stats.multicast++;
+ skb->protocol = eth_type_trans(skb, dev);
+
+ if (skb->pkt_type == PACKET_MULTICAST)
+ total_rx_multicast_packets++;
+
+ if (rtl8125_rx_vlan_skb(tp, desc, skb) < 0)
+ rtl8125_rx_skb(tp, skb, ring_index);
- if (rtl8125_rx_vlan_skb(tp, desc, skb) < 0)
- rtl8125_rx_skb(tp, skb);
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,11,0)
- dev->last_rx = jiffies;
+ dev->last_rx = jiffies;
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,11,0)
- RTLDEV->stats.rx_bytes += pkt_size;
- RTLDEV->stats.rx_packets++;
- }
+ total_rx_bytes += skb->len;
+ total_rx_packets++;
- cur_rx++;
- entry = cur_rx % NUM_RX_DESC;
- desc = tp->RxDescArray + entry;
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37)
- prefetch(desc);
+#ifdef ENABLE_PAGE_REUSE
+ rxb->skb = NULL;
+ continue;
#endif
+
+release_descriptor:
+ rtl8125_mark_to_asic(tp, desc, tp->rx_buf_sz);
+ continue;
+drop_packet:
+ RTLDEV->stats.rx_dropped++;
+ RTLDEV->stats.rx_length_errors++;
+ goto release_descriptor;
}
- count = cur_rx - tp->cur_rx;
- tp->cur_rx = cur_rx;
+ count = cur_rx - ring->cur_rx;
+ ring->cur_rx = cur_rx;
- delta = rtl8125_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx, 1);
+ delta = rtl8125_rx_fill(tp, ring, dev, ring->dirty_rx, ring->cur_rx, 1);
if (!delta && count && netif_msg_intr(tp))
printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name);
- tp->dirty_rx += delta;
+ ring->dirty_rx += delta;
+
+ RTLDEV->stats.rx_bytes += total_rx_bytes;
+ RTLDEV->stats.rx_packets += total_rx_packets;
+ RTLDEV->stats.multicast += total_rx_multicast_packets;
/*
* FIXME: until there is periodic timer to try and refill the ring,
@@ -10324,11 +16743,20 @@ rtl8125_rx_interrupt(struct net_device *dev,
* after refill ?
* - how do others driver handle this condition (Uh oh...).
*/
- if ((tp->dirty_rx + NUM_RX_DESC == tp->cur_rx) && netif_msg_intr(tp))
+ if ((ring->dirty_rx + ring->num_rx_desc == ring->cur_rx) && netif_msg_intr(tp))
printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name);
rx_out:
- return count;
+ return total_rx_packets;
+}
+
+static bool
+rtl8125_linkchg_interrupt(struct rtl8125_private *tp, u32 status)
+{
+ if (tp->HwCurrIsrVer == 2)
+ return status & ISRIMR_V2_LINKCHG;
+
+ return status & LinkChg;
}
/*
@@ -10341,21 +16769,21 @@ static irqreturn_t rtl8125_interrupt(int irq, void *dev_instance, struct pt_regs
static irqreturn_t rtl8125_interrupt(int irq, void *dev_instance)
#endif
{
- struct net_device *dev = (struct net_device *) dev_instance;
- struct rtl8125_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->mmio_addr;
+ struct r8125_napi *r8125napi = dev_instance;
+ struct rtl8125_private *tp = r8125napi->priv;
+ struct net_device *dev = tp->dev;
u32 status;
int handled = 0;
do {
- status = RTL_R32(ISR0_8125);
+ status = RTL_R32(tp, tp->isr_reg[0]);
- if (!(tp->features & RTL_FEATURE_MSI)) {
+ if (!(tp->features & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX))) {
/* hotplug/major error/no more work/shared irq */
if (!status)
break;
- if ((status == 0xFFFFFFFF))
+ if (status == 0xFFFFFFFF)
break;
if (!(status & (tp->intr_mask | tp->timer_intr_mask)))
@@ -10364,9 +16792,16 @@ static irqreturn_t rtl8125_interrupt(int irq, void *dev_instance)
handled = 1;
- rtl8125_disable_hw_interrupt(tp, ioaddr);
+#if defined(RTL_USE_NEW_INTR_API)
+ if (!tp->irq_tbl[0].requested)
+ break;
+#endif
+ rtl8125_disable_hw_interrupt(tp);
+
+ RTL_W32(tp, tp->isr_reg[0], status&~RxFIFOOver);
- RTL_W32(ISR0_8125, status&~RxFIFOOver);
+ if (rtl8125_linkchg_interrupt(tp, status))
+ rtl8125_schedule_linkchg_work(tp);
#ifdef ENABLE_DASH_SUPPORT
if (tp->DASH) {
@@ -10376,7 +16811,7 @@ static irqreturn_t rtl8125_interrupt(int irq, void *dev_instance)
if (status & ISRIMR_DASH_INTR_CMAC_RESET)
tp->CmacResetIntr = TRUE;
- DashIntType2Status = RTL_CMAC_R8(CMAC_IBISR0);
+ DashIntType2Status = RTL_CMAC_R8(tp, CMAC_IBISR0);
if (DashIntType2Status & ISRIMR_DASH_TYPE2_ROK) {
tp->RcvFwDashOkEvt = TRUE;
}
@@ -10387,7 +16822,7 @@ static irqreturn_t rtl8125_interrupt(int irq, void *dev_instance)
tp->DashFwDisableRx = TRUE;
}
- RTL_CMAC_W8(CMAC_IBISR0, DashIntType2Status);
+ RTL_CMAC_W8(tp, CMAC_IBISR0, DashIntType2Status);
}
}
#endif
@@ -10397,27 +16832,31 @@ static irqreturn_t rtl8125_interrupt(int irq, void *dev_instance)
if (status & tp->intr_mask)
tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT;
- if (likely(RTL_NETIF_RX_SCHEDULE_PREP(dev, &tp->napi)))
- __RTL_NETIF_RX_SCHEDULE(dev, &tp->napi);
+ if (likely(RTL_NETIF_RX_SCHEDULE_PREP(dev, &tp->r8125napi[0].napi)))
+ __RTL_NETIF_RX_SCHEDULE(dev, &tp->r8125napi[0].napi);
else if (netif_msg_intr(tp))
printk(KERN_INFO "%s: interrupt %04x in poll\n",
dev->name, status);
} else {
tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT;
- rtl8125_switch_to_hw_interrupt(tp, ioaddr);
+ rtl8125_switch_to_hw_interrupt(tp);
}
#else
if (status & tp->intr_mask || tp->keep_intr_cnt-- > 0) {
u32 budget = ~(u32)0;
+ int i;
if (status & tp->intr_mask)
tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT;
+
+ for (i = 0; i < tp->num_tx_rings; i++)
+ rtl8125_tx_interrupt(&tp->tx_ring[i], ~(u32)0);
+
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
- rtl8125_rx_interrupt(dev, tp, tp->mmio_addr, &budget);
+ rtl8125_rx_interrupt(dev, tp, &tp->rx_ring[0], &budget);
#else
- rtl8125_rx_interrupt(dev, tp, tp->mmio_addr, budget);
+ rtl8125_rx_interrupt(dev, tp, &tp->rx_ring[0], budget);
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
- rtl8125_tx_interrupt(dev, tp, ioaddr);
#ifdef ENABLE_DASH_SUPPORT
if (tp->DASH) {
@@ -10427,141 +16866,130 @@ static irqreturn_t rtl8125_interrupt(int irq, void *dev_instance)
}
#endif
- rtl8125_switch_to_timer_interrupt(tp, ioaddr);
+ rtl8125_switch_to_timer_interrupt(tp);
} else {
tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT;
- rtl8125_switch_to_hw_interrupt(tp, ioaddr);
+ rtl8125_switch_to_hw_interrupt(tp);
}
#endif
-
} while (false);
return IRQ_RETVAL(handled);
}
-#ifdef CONFIG_R8125_NAPI
-static int rtl8125_poll(napi_ptr napi, napi_budget budget)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+static irqreturn_t rtl8125_interrupt_msix(int irq, void *dev_instance, struct pt_regs *regs)
+#else
+static irqreturn_t rtl8125_interrupt_msix(int irq, void *dev_instance)
+#endif
{
- struct rtl8125_private *tp = RTL_GET_PRIV(napi, struct rtl8125_private);
- void __iomem *ioaddr = tp->mmio_addr;
- RTL_GET_NETDEV(tp)
- unsigned int work_to_do = RTL_NAPI_QUOTA(budget, dev);
- unsigned int work_done;
- unsigned long flags;
+ struct r8125_napi *r8125napi = dev_instance;
+ struct rtl8125_private *tp = r8125napi->priv;
+ struct net_device *dev = tp->dev;
+ int message_id = r8125napi->index;
+#ifndef CONFIG_R8125_NAPI
+ u32 budget = ~(u32)0;
+#endif
- work_done = rtl8125_rx_interrupt(dev, tp, ioaddr, budget);
+ do {
+#if defined(RTL_USE_NEW_INTR_API)
+ if (!tp->irq_tbl[message_id].requested)
+ break;
+#endif
+ rtl8125_disable_hw_interrupt_v2(tp, message_id);
- spin_lock_irqsave(&tp->lock, flags);
- rtl8125_tx_interrupt(dev, tp, ioaddr);
- spin_unlock_irqrestore(&tp->lock, flags);
+ rtl8125_clear_hw_isr_v2(tp, message_id);
- RTL_NAPI_QUOTA_UPDATE(dev, work_done, budget);
+ //link change
+ if (message_id == 21) {
+ rtl8125_schedule_linkchg_work(tp);
+ break;
+ }
- if (work_done < work_to_do) {
-#ifdef ENABLE_DASH_SUPPORT
- if (tp->DASH) {
- struct net_device *dev = tp->dev;
+#ifdef CONFIG_R8125_NAPI
+ if (likely(RTL_NETIF_RX_SCHEDULE_PREP(dev, &r8125napi->napi)))
+ __RTL_NETIF_RX_SCHEDULE(dev, &r8125napi->napi);
+ else if (netif_msg_intr(tp))
+ printk(KERN_INFO "%s: interrupt message id %d in poll_msix\n",
+ dev->name, message_id);
+#else
+ rtl8125_tx_interrupt_with_vector(tp, message_id, ~(u32)0);
- spin_lock_irqsave(&tp->lock, flags);
- HandleDashInterrupt(dev);
- spin_unlock_irqrestore(&tp->lock, flags);
+ if (message_id < tp->num_rx_rings) {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+ rtl8125_rx_interrupt(dev, tp, &tp->rx_ring[message_id], &budget);
+#else
+ rtl8125_rx_interrupt(dev, tp, &tp->rx_ring[message_id], budget);
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
}
-#endif
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0)
- if (RTL_NETIF_RX_COMPLETE(dev, napi, work_done) == FALSE) return RTL_NAPI_RETURN_VALUE;
-#else
- RTL_NETIF_RX_COMPLETE(dev, napi, work_done);
+ rtl8125_enable_hw_interrupt_v2(tp, message_id);
#endif
- /*
- * 20040426: the barrier is not strictly required but the
- * behavior of the irq handler could be less predictable
- * without it. Btw, the lack of flush for the posted pci
- * write is safe - FR
- */
- smp_wmb();
- rtl8125_switch_to_timer_interrupt(tp, ioaddr);
- }
+ } while (false);
- return RTL_NAPI_RETURN_VALUE;
+ return IRQ_HANDLED;
}
-#endif//CONFIG_R8125_NAPI
static void rtl8125_down(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- unsigned long flags;
-
- rtl8125_delete_esd_timer(dev, &tp->esd_timer);
- rtl8125_delete_link_timer(dev, &tp->link_timer);
-
-#ifdef CONFIG_R8125_NAPI
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
- RTL_NAPI_DISABLE(dev, &tp->napi);
-#endif
-#endif//CONFIG_R8125_NAPI
+ //rtl8125_delete_esd_timer(dev, &tp->esd_timer);
- netif_stop_queue(dev);
+ //rtl8125_delete_link_timer(dev, &tp->link_timer);
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,11)
- /* Give a racing hard_start_xmit a few cycles to complete. */
- synchronize_sched(); /* FIXME: should this be synchronize_irq()? */
-#endif
+ netif_carrier_off(dev);
- spin_lock_irqsave(&tp->lock, flags);
+ netif_tx_disable(dev);
- netif_carrier_off(dev);
+ _rtl8125_wait_for_quiescence(dev);
rtl8125_hw_reset(dev);
- spin_unlock_irqrestore(&tp->lock, flags);
+ rtl8125_tx_clear(tp);
- synchronize_irq(dev->irq);
+ rtl8125_rx_clear(tp);
+}
- spin_lock_irqsave(&tp->lock, flags);
+static int rtl8125_resource_freed(struct rtl8125_private *tp)
+{
+ int i;
- rtl8125_tx_clear(tp);
+ for (i = 0; i < tp->num_tx_rings; i++)
+ if (tp->tx_ring[i].TxDescArray) return 0;
- rtl8125_rx_clear(tp);
+ for (i = 0; i < tp->num_rx_rings; i++)
+ if (tp->rx_ring[i].RxDescArray) return 0;
- spin_unlock_irqrestore(&tp->lock, flags);
+ return 1;
}
-static int rtl8125_close(struct net_device *dev)
+int rtl8125_close(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
- struct pci_dev *pdev = tp->pci_dev;
- unsigned long flags;
- if (tp->TxDescArray!=NULL && tp->RxDescArray!=NULL) {
- rtl8125_cancel_schedule_work(dev);
+ if (!rtl8125_resource_freed(tp)) {
+ set_bit(R8125_FLAG_DOWN, tp->task_flags);
rtl8125_down(dev);
- spin_lock_irqsave(&tp->lock, flags);
+ pci_clear_master(tp->pci_dev);
+#ifdef ENABLE_PTP_SUPPORT
+ rtl8125_ptp_stop(tp);
+#endif
rtl8125_hw_d3_para(dev);
- rtl8125_powerdown_pll(dev);
-
- spin_unlock_irqrestore(&tp->lock, flags);
+ rtl8125_powerdown_pll(dev, 0);
- free_irq(dev->irq, dev);
+ rtl8125_free_irq(tp);
- pci_free_consistent(pdev, R8125_RX_RING_BYTES, tp->RxDescArray,
- tp->RxPhyAddr);
- pci_free_consistent(pdev, R8125_TX_RING_BYTES, tp->TxDescArray,
- tp->TxPhyAddr);
- tp->TxDescArray = NULL;
- tp->RxDescArray = NULL;
+ rtl8125_free_alloc_resources(tp);
+ } else {
+ rtl8125_hw_d3_para(dev);
- if (tp->ShortPacketEmptyBuffer != NULL) {
- pci_free_consistent(pdev, SHORT_PACKET_PADDING_BUF_SIZE, tp->ShortPacketEmptyBuffer,
- tp->ShortPacketEmptyBufferPhy);
- tp->ShortPacketEmptyBuffer = NULL;
- }
+ rtl8125_powerdown_pll(dev, 0);
}
return 0;
@@ -10573,7 +17001,9 @@ static void rtl8125_shutdown(struct pci_dev *pdev)
struct net_device *dev = pci_get_drvdata(pdev);
struct rtl8125_private *tp = netdev_priv(dev);
- if (tp->DASH)
+ rtnl_lock();
+
+ if (HW_DASH_SUPPORT_DASH(tp))
rtl8125_driver_stop(tp);
rtl8125_set_bios_setting(dev);
@@ -10585,97 +17015,140 @@ static void rtl8125_shutdown(struct pci_dev *pdev)
rtl8125_close(dev);
rtl8125_disable_msi(pdev, tp);
-}
-#endif
-/**
- * rtl8125_get_stats - Get rtl8125 read/write statistics
- * @dev: The Ethernet Device to get statistics for
- *
- * Get TX/RX statistics for rtl8125
- */
-static struct
-net_device_stats *rtl8125_get_stats(struct net_device *dev)
-{
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
- struct rtl8125_private *tp = netdev_priv(dev);
-#endif
- if (netif_running(dev)) {
-// spin_lock_irqsave(&tp->lock, flags);
-// spin_unlock_irqrestore(&tp->lock, flags);
- }
+ rtnl_unlock();
- return &RTLDEV->stats;
+ if (system_state == SYSTEM_POWER_OFF) {
+ pci_clear_master(tp->pci_dev);
+ pci_wake_from_d3(pdev, tp->wol_enabled);
+ pci_set_power_state(pdev, PCI_D3hot);
+ }
}
+#endif
#ifdef CONFIG_PM
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11)
static int
rtl8125_suspend(struct pci_dev *pdev, u32 state)
+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
+static int
+rtl8125_suspend(struct device *device)
#else
static int
rtl8125_suspend(struct pci_dev *pdev, pm_message_t state)
#endif
{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
+ struct pci_dev *pdev = to_pci_dev(device);
struct net_device *dev = pci_get_drvdata(pdev);
+#else
+ struct net_device *dev = pci_get_drvdata(pdev);
+#endif
struct rtl8125_private *tp = netdev_priv(dev);
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
u32 pci_pm_state = pci_choose_state(pdev, state);
#endif
- unsigned long flags;
-
if (!netif_running(dev))
goto out;
- rtl8125_cancel_schedule_work(dev);
+ //rtl8125_cancel_all_schedule_work(tp);
- rtl8125_delete_esd_timer(dev, &tp->esd_timer);
+ //rtl8125_delete_esd_timer(dev, &tp->esd_timer);
- rtl8125_delete_link_timer(dev, &tp->link_timer);
+ //rtl8125_delete_link_timer(dev, &tp->link_timer);
- netif_stop_queue(dev);
+ rtnl_lock();
+
+ set_bit(R8125_FLAG_DOWN, tp->task_flags);
netif_carrier_off(dev);
- netif_device_detach(dev);
+ netif_tx_disable(dev);
- spin_lock_irqsave(&tp->lock, flags);
+ netif_device_detach(dev);
+#ifdef ENABLE_PTP_SUPPORT
+ rtl8125_ptp_suspend(tp);
+#endif
rtl8125_hw_reset(dev);
- rtl8125_hw_d3_para(dev);
+ pci_clear_master(pdev);
- rtl8125_powerdown_pll(dev);
+ rtl8125_hw_d3_para(dev);
- spin_unlock_irqrestore(&tp->lock, flags);
+ rtl8125_powerdown_pll(dev, 1);
- if (tp->DASH)
+ if (HW_DASH_SUPPORT_DASH(tp))
rtl8125_driver_stop(tp);
+
+ rtnl_unlock();
out:
+ pci_disable_device(pdev);
+
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
pci_save_state(pdev, &pci_pm_state);
#else
pci_save_state(pdev);
#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
pci_enable_wake(pdev, pci_choose_state(pdev, state), tp->wol_enabled);
-// pci_set_power_state(pdev, pci_choose_state(pdev, state));
+#endif
+
+ pci_prepare_to_sleep(pdev);
return 0;
}
+static int
+rtl8125_hw_d3_not_power_off(struct net_device *dev)
+{
+ return rtl8125_check_hw_phy_mcu_code_ver(dev);
+}
+
+static int rtl8125_wait_phy_nway_complete_sleep(struct rtl8125_private *tp)
+{
+ int i, val;
+
+ for (i = 0; i < 30; i++) {
+ val = rtl8125_mdio_read(tp, MII_BMSR) & BMSR_ANEGCOMPLETE;
+ if (val)
+ return 0;
+
+ msleep(100);
+ }
+
+ return -1;
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
static int
rtl8125_resume(struct pci_dev *pdev)
+#else
+static int
+rtl8125_resume(struct device *device)
+#endif
{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
+ struct pci_dev *pdev = to_pci_dev(device);
+ struct net_device *dev = pci_get_drvdata(pdev);
+#else
struct net_device *dev = pci_get_drvdata(pdev);
+#endif
struct rtl8125_private *tp = netdev_priv(dev);
- unsigned long flags;
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
u32 pci_pm_state = PCI_D0;
#endif
+ u32 err;
+
+ rtnl_lock();
- pci_set_power_state(pdev, PCI_D0);
+ err = pci_enable_device(pdev);
+ if (err) {
+ dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
+ goto out_unlock;
+ }
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
pci_restore_state(pdev, &pci_pm_state);
#else
@@ -10683,40 +17156,60 @@ rtl8125_resume(struct pci_dev *pdev)
#endif
pci_enable_wake(pdev, PCI_D0, 0);
- spin_lock_irqsave(&tp->lock, flags);
-
/* restore last modified mac address */
rtl8125_rar_set(tp, dev->dev_addr);
- spin_unlock_irqrestore(&tp->lock, flags);
+ tp->resume_not_chg_speed = 0;
+ if (tp->check_keep_link_speed &&
+ //tp->link_ok(dev) &&
+ rtl8125_hw_d3_not_power_off(dev) &&
+ rtl8125_wait_phy_nway_complete_sleep(tp) == 0)
+ tp->resume_not_chg_speed = 1;
if (!netif_running(dev))
- goto out;
+ goto out_unlock;
- spin_lock_irqsave(&tp->lock, flags);
+ pci_set_master(pdev);
rtl8125_exit_oob(dev);
- rtl8125_hw_init(dev);
-
- rtl8125_powerup_pll(dev);
-
- rtl8125_hw_ephy_config(dev);
+ rtl8125_up(dev);
- rtl8125_hw_phy_config(dev);
+ clear_bit(R8125_FLAG_DOWN, tp->task_flags);
- rtl8125_schedule_work(dev, rtl8125_reset_task);
+ rtl8125_schedule_reset_work(tp);
- spin_unlock_irqrestore(&tp->lock, flags);
+ rtl8125_schedule_esd_work(tp);
+ //mod_timer(&tp->esd_timer, jiffies + RTL8125_ESD_TIMEOUT);
+ //mod_timer(&tp->link_timer, jiffies + RTL8125_LINK_TIMEOUT);
+out_unlock:
netif_device_attach(dev);
- mod_timer(&tp->esd_timer, jiffies + RTL8125_ESD_TIMEOUT);
- mod_timer(&tp->link_timer, jiffies + RTL8125_LINK_TIMEOUT);
-out:
- return 0;
+ rtnl_unlock();
+
+ return err;
}
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
+
+static struct dev_pm_ops rtl8125_pm_ops = {
+ .suspend = rtl8125_suspend,
+ .resume = rtl8125_resume,
+ .freeze = rtl8125_suspend,
+ .thaw = rtl8125_resume,
+ .poweroff = rtl8125_suspend,
+ .restore = rtl8125_resume,
+};
+
+#define RTL8125_PM_OPS (&rtl8125_pm_ops)
+
+#endif
+
+#else /* !CONFIG_PM */
+
+#define RTL8125_PM_OPS NULL
+
#endif /* CONFIG_PM */
static struct pci_driver rtl8125_pci_driver = {
@@ -10728,28 +17221,38 @@ static struct pci_driver rtl8125_pci_driver = {
.shutdown = rtl8125_shutdown,
#endif
#ifdef CONFIG_PM
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
.suspend = rtl8125_suspend,
.resume = rtl8125_resume,
+#else
+ .driver.pm = RTL8125_PM_OPS,
+#endif
#endif
};
static int __init
rtl8125_init_module(void)
{
+ int ret = 0;
#ifdef ENABLE_R8125_PROCFS
rtl8125_proc_module_init();
#endif
+
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
- return pci_register_driver(&rtl8125_pci_driver);
+
+ ret = pci_register_driver(&rtl8125_pci_driver);
#else
- return pci_module_init(&rtl8125_pci_driver);
+ ret = pci_module_init(&rtl8125_pci_driver);
#endif
+
+ return ret;
}
static void __exit
rtl8125_cleanup_module(void)
{
pci_unregister_driver(&rtl8125_pci_driver);
+
#ifdef ENABLE_R8125_PROCFS
if (rtl8125_proc) {
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
diff --git a/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_ptp.c b/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_ptp.c
new file mode 100755
index 000000000..6010a1809
--- /dev/null
+++ b/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_ptp.c
@@ -0,0 +1,594 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+################################################################################
+#
+# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see .
+#
+# Author:
+# Realtek NIC software team
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ * This product is covered by one or more of the following patents:
+ * US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "r8125.h"
+#include "r8125_ptp.h"
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0)
+static inline struct timespec timespec64_to_timespec(const struct timespec64 ts64)
+{
+ return *(const struct timespec *)&ts64;
+}
+
+static inline struct timespec64 timespec_to_timespec64(const struct timespec ts)
+{
+ return *(const struct timespec64 *)&ts;
+}
+#endif
+
+static int _rtl8125_phc_gettime(struct rtl8125_private *tp, struct timespec64 *ts64)
+{
+ //get local time
+ RTL_W16(tp, PTP_TIME_CORRECT_CMD_8125, (PTP_CMD_LATCHED_LOCAL_TIME | PTP_EXEC_CMD));
+
+ /* nanoseconds */
+ //0x6808[29:0]
+ ts64->tv_nsec = (RTL_R32(tp, PTP_SOFT_CONFIG_Time_NS_8125) & 0x3fffffff) +
+ tp->ptp_adjust;
+
+ /* seconds */
+ //0x680C[47:0]
+ ts64->tv_sec = RTL_R16(tp, PTP_SOFT_CONFIG_Time_S_8125 + 4);
+ ts64->tv_sec <<= 32;
+ ts64->tv_sec |= RTL_R32(tp, PTP_SOFT_CONFIG_Time_S_8125);
+
+ return 0;
+}
+
+static int _rtl8125_phc_settime(struct rtl8125_private *tp, const struct timespec64 *ts64)
+{
+ /* nanoseconds */
+ //0x6808[29:0]
+ RTL_W32(tp, PTP_SOFT_CONFIG_Time_NS_8125, (ts64->tv_nsec & 0x3fffffff));
+
+ /* seconds */
+ //0x680C[47:0]
+ RTL_W32(tp, PTP_SOFT_CONFIG_Time_S_8125, ts64->tv_sec);
+ RTL_W16(tp, PTP_SOFT_CONFIG_Time_S_8125 + 4, (ts64->tv_sec >> 32));
+
+ //set local time
+ RTL_W16(tp, PTP_TIME_CORRECT_CMD_8125, (PTP_CMD_SET_LOCAL_TIME | PTP_EXEC_CMD));
+
+ return 0;
+}
+
+#if 0
+static int _rtl8125_phc_adjtime(struct rtl8125_private *tp, s64 delta)
+{
+ struct timespec64 now, then = ns_to_timespec64(delta);
+ u32 nsec;
+ u64 sec;
+
+ _rtl8125_phc_gettime(tp, &now);
+ now = timespec64_add(now, then);
+
+ nsec = now.tv_nsec & 0x3fffffff;
+ sec = now.tv_sec & 0x0000ffffffffffff;
+
+ /* nanoseconds */
+ //0x6808[29:0]
+ RTL_W32(tp, PTP_SOFT_CONFIG_Time_NS_8125, nsec);
+
+ /* seconds */
+ //0x680C[47:0]
+ RTL_W32(tp, PTP_SOFT_CONFIG_Time_S_8125, sec);
+ RTL_W16(tp, PTP_SOFT_CONFIG_Time_S_8125 + 4, (sec >> 32));
+
+ //adjust local time
+ //RTL_W16(tp, PTP_TIME_CORRECT_CMD_8125, (PTP_CMD_DRIFT_LOCAL_TIME | PTP_EXEC_CMD));
+ RTL_W16(tp, PTP_TIME_CORRECT_CMD_8125, (PTP_CMD_SET_LOCAL_TIME | PTP_EXEC_CMD));
+
+ return 0;
+}
+#endif
+
+static int rtl8125_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
+{
+ struct rtl8125_private *tp = container_of(ptp, struct rtl8125_private, ptp_clock_info);
+ unsigned long flags;
+ //int ret = 0;
+
+ //netif_info(tp, drv, tp->dev, "phc adjust time\n");
+
+ spin_lock_irqsave(&tp->lock, flags);
+ //ret = _rtl8125_phc_adjtime(tp, delta);
+ tp->ptp_adjust += delta;
+ spin_unlock_irqrestore(&tp->lock, flags);
+
+ return 0;
+}
+
+/*
+1ppm means every 125MHz plus 125Hz. It also means every 8ns minus 8ns*10^(-6)
+
+1ns=2^30 sub_ns
+
+8ns*10^(-6) = 8 * 2^30 sub_ns * 10^(-6) = 2^33 sub_ns * 10^(-6) = 8590 = 0x218E sub_ns
+
+1ppb means every 125MHz plus 0.125Hz. It also means every 8ns minus 8ns*10^(-9)
+
+1ns=2^30 sub_ns
+
+8ns*10^(-9) = 8 * 2^30 sub_ns * 10^(-9) = 2^33 sub_ns * 10^(-9) = 8.59 sub_ns = 9 sub_ns
+*/
+static int _rtl8125_phc_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
+{
+ struct rtl8125_private *tp = container_of(ptp, struct rtl8125_private, ptp_clock_info);
+ bool negative = false;
+ u32 sub_ns;
+
+ if (ppb < 0) {
+ negative = true;
+ ppb = -ppb;
+ }
+
+ sub_ns = ppb * 9;
+ if (negative) {
+ sub_ns = -sub_ns;
+ sub_ns &= 0x3fffffff;
+ sub_ns |= PTP_ADJUST_TIME_NS_NEGATIVE;
+ } else
+ sub_ns &= 0x3fffffff;
+
+ /* nanoseconds */
+ //0x6808[29:0]
+ RTL_W32(tp, PTP_SOFT_CONFIG_Time_NS_8125, sub_ns);
+
+ //adjust local time
+ RTL_W16(tp, PTP_TIME_CORRECT_CMD_8125, (PTP_CMD_DRIFT_LOCAL_TIME | PTP_EXEC_CMD));
+ //RTL_W16(tp, PTP_TIME_CORRECT_CMD_8125, (PTP_CMD_SET_LOCAL_TIME | PTP_EXEC_CMD));
+
+ return 0;
+}
+
+static int rtl8125_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
+{
+ //struct rtl8125_private *tp = container_of(ptp, struct rtl8125_private, ptp_clock_info);
+
+ //netif_info(tp, drv, tp->dev, "phc adjust freq\n");
+
+ if (delta > ptp->max_adj || delta < -ptp->max_adj)
+ return -EINVAL;
+
+ _rtl8125_phc_adjfreq(ptp, delta);
+
+ return 0;
+}
+
+static int rtl8125_phc_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts64)
+{
+ struct rtl8125_private *tp = container_of(ptp, struct rtl8125_private, ptp_clock_info);
+ unsigned long flags;
+ int ret;
+
+ //netif_info(tp, drv, tp->dev, "phc get ts\n");
+
+ spin_lock_irqsave(&tp->lock, flags);
+ ret = _rtl8125_phc_gettime(tp, ts64);
+ spin_unlock_irqrestore(&tp->lock, flags);
+
+ return ret;
+}
+
+static int rtl8125_phc_settime(struct ptp_clock_info *ptp,
+ const struct timespec64 *ts64)
+{
+ struct rtl8125_private *tp = container_of(ptp, struct rtl8125_private, ptp_clock_info);
+ unsigned long flags;
+ int ret;
+
+ //netif_info(tp, drv, tp->dev, "phc set ts\n");
+
+ spin_lock_irqsave(&tp->lock, flags);
+ ret = _rtl8125_phc_settime(tp, ts64);
+ tp->ptp_adjust = 0;
+ spin_unlock_irqrestore(&tp->lock, flags);
+
+ return ret;
+}
+
+static int rtl8125_phc_enable(struct ptp_clock_info *ptp,
+ struct ptp_clock_request *rq, int on)
+{
+ struct rtl8125_private *tp = container_of(ptp, struct rtl8125_private, ptp_clock_info);
+ unsigned long flags;
+ u16 ptp_ctrl;
+
+ //netif_info(tp, drv, tp->dev, "phc enable type %x on %d\n", rq->type, on);
+
+ switch (rq->type) {
+ case PTP_CLK_REQ_PPS:
+ spin_lock_irqsave(&tp->lock, flags);
+ ptp_ctrl = RTL_R16(tp, PTP_CTRL_8125);
+ ptp_ctrl &= ~BIT_15;
+ if (on)
+ ptp_ctrl |= BIT_14;
+ else
+ ptp_ctrl &= ~BIT_14;
+ RTL_W16(tp, PTP_CTRL_8125, ptp_ctrl);
+ spin_unlock_irqrestore(&tp->lock, flags);
+ return 0;
+ default:
+ return -EOPNOTSUPP;
+ }
+}
+
+int rtl8125_get_ts_info(struct net_device *netdev,
+ struct ethtool_ts_info *info)
+{
+ struct rtl8125_private *tp = netdev_priv(netdev);
+
+ /* we always support timestamping disabled */
+ info->rx_filters = BIT(HWTSTAMP_FILTER_NONE);
+
+ if (tp->HwSuppPtpVer == 0)
+ return ethtool_op_get_ts_info(netdev, info);
+
+ info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
+ SOF_TIMESTAMPING_RX_SOFTWARE |
+ SOF_TIMESTAMPING_SOFTWARE |
+ SOF_TIMESTAMPING_TX_HARDWARE |
+ SOF_TIMESTAMPING_RX_HARDWARE |
+ SOF_TIMESTAMPING_RAW_HARDWARE;
+
+ if (tp->ptp_clock)
+ info->phc_index = ptp_clock_index(tp->ptp_clock);
+ else
+ info->phc_index = -1;
+
+ info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
+
+ info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
+ BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
+ BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
+ BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) |
+ BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
+ BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
+ BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
+
+ return 0;
+}
+
+static const struct ptp_clock_info rtl_ptp_clock_info = {
+ .owner = THIS_MODULE,
+ .n_alarm = 0,
+ .n_ext_ts = 0,
+ .n_per_out = 0,
+ .n_pins = 0,
+ .pps = 1,
+ .adjfreq = rtl8125_phc_adjfreq,
+ .adjtime = rtl8125_phc_adjtime,
+ .gettime64 = rtl8125_phc_gettime,
+ .settime64 = rtl8125_phc_settime,
+ .enable = rtl8125_phc_enable,
+};
+
+static int rtl8125_get_tx_ptp_pkt_tstamp(struct rtl8125_private *tp, struct timespec64 *ts64)
+{
+ return _rtl8125_phc_gettime(tp, ts64);
+}
+
+static void rtl8125_ptp_tx_hwtstamp(struct rtl8125_private *tp)
+{
+ struct sk_buff *skb = tp->ptp_tx_skb;
+ struct skb_shared_hwtstamps shhwtstamps = {0};
+ struct timespec64 ts64;
+
+ RTL_W8(tp, PTP_ISR_8125, PTP_ISR_TOK | PTP_ISR_TER);
+
+ rtl8125_get_tx_ptp_pkt_tstamp(tp, &ts64);
+
+ /* Upper 32 bits contain s, lower 32 bits contain ns. */
+ shhwtstamps.hwtstamp = ktime_set(ts64.tv_sec,
+ ts64.tv_nsec);
+
+ /* Clear the lock early before calling skb_tstamp_tx so that
+ * applications are not woken up before the lock bit is clear. We use
+ * a copy of the skb pointer to ensure other threads can't change it
+ * while we're notifying the stack.
+ */
+ tp->ptp_tx_skb = NULL;
+
+ /* Notify the stack and free the skb after we've unlocked */
+ skb_tstamp_tx(skb, &shhwtstamps);
+ dev_kfree_skb_any(skb);
+}
+
+#define RTL8125_PTP_TX_TIMEOUT (HZ * 15)
+static void rtl8125_ptp_tx_work(struct work_struct *work)
+{
+ struct rtl8125_private *tp = container_of(work, struct rtl8125_private,
+ ptp_tx_work);
+ unsigned long flags;
+
+ spin_lock_irqsave(&tp->lock, flags);
+
+ if (!tp->ptp_tx_skb)
+ goto Exit;
+
+ if (time_is_before_jiffies(tp->ptp_tx_start +
+ RTL8125_PTP_TX_TIMEOUT)) {
+ dev_kfree_skb_any(tp->ptp_tx_skb);
+ tp->ptp_tx_skb = NULL;
+ tp->tx_hwtstamp_timeouts++;
+ /* Clear the tx valid bit in TSYNCTXCTL register to enable
+ * interrupt
+ */
+ RTL_W8(tp, PTP_ISR_8125, PTP_ISR_TOK | PTP_ISR_TER);
+ goto Exit;
+ }
+
+ if (RTL_R8(tp, PTP_ISR_8125) & (PTP_ISR_TOK))
+ rtl8125_ptp_tx_hwtstamp(tp);
+ else
+ /* reschedule to check later */
+ schedule_work(&tp->ptp_tx_work);
+
+Exit:
+ spin_unlock_irqrestore(&tp->lock, flags);
+}
+
+static int rtl8125_hwtstamp_enable(struct rtl8125_private *tp, bool enable)
+{
+ RTL_W16(tp, PTP_CTRL_8125, 0);
+ if (enable) {
+ u16 ptp_ctrl;
+ struct timespec64 ts64;
+
+ //clear ptp isr
+ RTL_W8(tp, PTP_ISR_8125, 0xff);
+ //ptp source 0:gphy 1:mac
+ rtl8125_mac_ocp_write(tp, 0xDC00, rtl8125_mac_ocp_read(tp, 0xDC00) | BIT_6);
+ //enable ptp
+ ptp_ctrl = (BIT_0 | BIT_3 | BIT_4 | BIT_6 | BIT_10 | BIT_12 | BIT_13);
+ if (tp->ptp_master_mode) {
+ ptp_ctrl &= ~BIT_13;
+ ptp_ctrl |= BIT_1;
+ }
+ RTL_W16(tp, PTP_CTRL_8125, ptp_ctrl);
+
+ //set system time
+ /*
+ if (ktime_to_timespec64_cond(ktime_get_real(), &ts64))
+ _rtl8125_phc_settime(tp, timespec64_to_timespec(ts64));
+ */
+ ktime_get_real_ts64(&ts64);
+ ts64.tv_nsec += tp->ptp_adjust;
+ _rtl8125_phc_settime(tp, &ts64);
+ tp->ptp_adjust = 0;
+ }
+
+ return 0;
+}
+
+static long rtl8125_ptp_create_clock(struct rtl8125_private *tp)
+{
+ struct net_device *netdev = tp->dev;
+ long err;
+
+ if (!IS_ERR_OR_NULL(tp->ptp_clock))
+ return 0;
+
+ if (tp->HwSuppPtpVer == 0) {
+ tp->ptp_clock = NULL;
+ return -EOPNOTSUPP;
+ }
+
+ tp->ptp_clock_info = rtl_ptp_clock_info;
+ snprintf(tp->ptp_clock_info.name, sizeof(tp->ptp_clock_info.name),
+ "%pm", tp->dev->dev_addr);
+ tp->ptp_clock_info.max_adj = 119304647;
+ tp->ptp_clock = ptp_clock_register(&tp->ptp_clock_info, &tp->pci_dev->dev);
+ if (IS_ERR(tp->ptp_clock)) {
+ err = PTR_ERR(tp->ptp_clock);
+ tp->ptp_clock = NULL;
+ netif_err(tp, drv, tp->dev, "ptp_clock_register failed\n");
+ return err;
+ } else
+ netif_info(tp, drv, tp->dev, "registered PHC device on %s\n", netdev->name);
+
+ return 0;
+}
+
+void rtl8125_ptp_reset(struct rtl8125_private *tp)
+{
+ if (!tp->ptp_clock)
+ return;
+
+ netif_info(tp, drv, tp->dev, "reset PHC clock\n");
+
+ rtl8125_hwtstamp_enable(tp, false);
+}
+
+void rtl8125_ptp_init(struct rtl8125_private *tp)
+{
+ /* obtain a PTP device, or re-use an existing device */
+ if (rtl8125_ptp_create_clock(tp))
+ return;
+
+ /* we have a clock so we can initialize work now */
+ INIT_WORK(&tp->ptp_tx_work, rtl8125_ptp_tx_work);
+
+ tp->ptp_adjust = 0;
+
+ /* reset the PTP related hardware bits */
+ rtl8125_ptp_reset(tp);
+
+ return;
+}
+
+void rtl8125_ptp_suspend(struct rtl8125_private *tp)
+{
+ if (!tp->ptp_clock)
+ return;
+
+ netif_info(tp, drv, tp->dev, "suspend PHC clock\n");
+
+ rtl8125_hwtstamp_enable(tp, false);
+
+ /* ensure that we cancel any pending PTP Tx work item in progress */
+ cancel_work_sync(&tp->ptp_tx_work);
+}
+
+void rtl8125_ptp_stop(struct rtl8125_private *tp)
+{
+ struct net_device *netdev = tp->dev;
+
+ netif_info(tp, drv, tp->dev, "stop PHC clock\n");
+
+ /* first, suspend PTP activity */
+ rtl8125_ptp_suspend(tp);
+
+ /* disable the PTP clock device */
+ if (tp->ptp_clock) {
+ ptp_clock_unregister(tp->ptp_clock);
+ tp->ptp_clock = NULL;
+ netif_info(tp, drv, tp->dev, "removed PHC on %s\n",
+ netdev->name);
+ }
+}
+
+static int rtl8125_set_tstamp(struct net_device *netdev, struct ifreq *ifr)
+{
+ struct rtl8125_private *tp = netdev_priv(netdev);
+ struct hwtstamp_config config;
+ bool hwtstamp = 0;
+
+ //netif_info(tp, drv, tp->dev, "ptp set ts\n");
+
+ if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
+ return -EFAULT;
+
+ if (config.flags)
+ return -EINVAL;
+
+ switch (config.tx_type) {
+ case HWTSTAMP_TX_ON:
+ hwtstamp = 1;
+ case HWTSTAMP_TX_OFF:
+ break;
+ case HWTSTAMP_TX_ONESTEP_SYNC:
+ default:
+ return -ERANGE;
+ }
+
+ switch (config.rx_filter) {
+ case HWTSTAMP_FILTER_PTP_V2_EVENT:
+ case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
+ case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
+ case HWTSTAMP_FILTER_PTP_V2_SYNC:
+ case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
+ case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
+ case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
+ case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
+ case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
+ config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
+ hwtstamp = 1;
+ case HWTSTAMP_FILTER_NONE:
+ break;
+ default:
+ return -ERANGE;
+ }
+
+ if (tp->hwtstamp_config.tx_type != config.tx_type ||
+ tp->hwtstamp_config.rx_filter != config.rx_filter) {
+ tp->hwtstamp_config = config;
+ rtl8125_hwtstamp_enable(tp, hwtstamp);
+ }
+
+ return copy_to_user(ifr->ifr_data, &config,
+ sizeof(config)) ? -EFAULT : 0;
+}
+
+static int rtl8125_get_tstamp(struct net_device *netdev, struct ifreq *ifr)
+{
+ struct rtl8125_private *tp = netdev_priv(netdev);
+
+ //netif_info(tp, drv, tp->dev, "ptp get ts\n");
+
+ return copy_to_user(ifr->ifr_data, &tp->hwtstamp_config,
+ sizeof(tp->hwtstamp_config)) ? -EFAULT : 0;
+}
+
+int rtl8125_ptp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
+{
+ struct rtl8125_private *tp = netdev_priv(netdev);
+ int ret;
+ unsigned long flags;
+
+ //netif_info(tp, drv, tp->dev, "ptp ioctl\n");
+
+ ret = 0;
+ switch (cmd) {
+#ifdef ENABLE_PTP_SUPPORT
+ case SIOCSHWTSTAMP:
+ spin_lock_irqsave(&tp->lock, flags);
+ ret = rtl8125_set_tstamp(netdev, ifr);
+ spin_unlock_irqrestore(&tp->lock, flags);
+ break;
+ case SIOCGHWTSTAMP:
+ spin_lock_irqsave(&tp->lock, flags);
+ ret = rtl8125_get_tstamp(netdev, ifr);
+ spin_unlock_irqrestore(&tp->lock, flags);
+ break;
+#endif
+ default:
+ ret = -EOPNOTSUPP;
+ break;
+ }
+
+ return ret;
+}
+
+void rtl8125_rx_ptp_pktstamp(struct rtl8125_private *tp, struct sk_buff *skb,
+ struct RxDescV3 *descv3)
+{
+ time64_t tv_sec;
+ long tv_nsec;
+
+ tv_sec = le32_to_cpu(descv3->RxDescTimeStamp.TimeStampHigh) +
+ ((u64)le32_to_cpu(descv3->RxDescPTPDDWord4.TimeStampHHigh) << 32);
+ tv_nsec = le32_to_cpu(descv3->RxDescTimeStamp.TimeStampLow) + tp->ptp_adjust;
+
+ skb_hwtstamps(skb)->hwtstamp = ktime_set(tv_sec, tv_nsec);
+}
diff --git a/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_ptp.h b/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_ptp.h
new file mode 100755
index 000000000..7a1fe83b9
--- /dev/null
+++ b/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_ptp.h
@@ -0,0 +1,81 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+################################################################################
+#
+# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see .
+#
+# Author:
+# Realtek NIC software team
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ * This product is covered by one or more of the following patents:
+ * US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+#ifndef _LINUX_rtl8125_PTP_H
+#define _LINUX_rtl8125_PTP_H
+
+#include
+#include
+#include
+#include
+#include
+
+struct rtl8125_ptp_info {
+ s64 time_sec;
+ u32 time_ns;
+ u16 ts_info;
+};
+
+#ifndef _STRUCT_TIMESPEC
+#define _STRUCT_TIMESPEC
+struct timespec {
+ __kernel_old_time_t tv_sec; /* seconds */
+ long tv_nsec; /* nanoseconds */
+};
+#endif
+
+enum PTP_CMD_TYPE {
+ PTP_CMD_SET_LOCAL_TIME = 0,
+ PTP_CMD_DRIFT_LOCAL_TIME,
+ PTP_CMD_LATCHED_LOCAL_TIME,
+};
+
+
+struct rtl8125_private;
+struct RxDescV3;
+
+int rtl8125_get_ts_info(struct net_device *netdev,
+ struct ethtool_ts_info *info);
+
+void rtl8125_ptp_reset(struct rtl8125_private *tp);
+void rtl8125_ptp_init(struct rtl8125_private *tp);
+void rtl8125_ptp_suspend(struct rtl8125_private *tp);
+void rtl8125_ptp_stop(struct rtl8125_private *tp);
+
+int rtl8125_ptp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
+
+void rtl8125_rx_ptp_pktstamp(struct rtl8125_private *tp, struct sk_buff *skb,
+ struct RxDescV3 *descv3);
+
+#endif /* _LINUX_rtl8125_PTP_H */
diff --git a/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_realwow.h b/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_realwow.h
new file mode 100755
index 000000000..e5e9b46d6
--- /dev/null
+++ b/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_realwow.h
@@ -0,0 +1,118 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+################################################################################
+#
+# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see .
+#
+# Author:
+# Realtek NIC software team
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ * This product is covered by one or more of the following patents:
+ * US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+#ifndef _LINUX_R8125_REALWOW_H
+#define _LINUX_R8125_REALWOW_H
+
+#define SIOCDEVPRIVATE_RTLREALWOW SIOCDEVPRIVATE+3
+
+#define MAX_RealWoW_KCP_SIZE (100)
+#define MAX_RealWoW_Payload (64)
+
+#define KA_TX_PACKET_SIZE (100)
+#define KA_WAKEUP_PATTERN_SIZE (120)
+
+//HwSuppKeepAliveOffloadVer
+#define HW_SUPPORT_KCP_OFFLOAD(_M) ((_M)->HwSuppKCPOffloadVer > 0)
+
+enum rtl_realwow_cmd {
+
+ RTL_REALWOW_SET_KCP_DISABLE=0,
+ RTL_REALWOW_SET_KCP_INFO,
+ RTL_REALWOW_SET_KCP_CONTENT,
+
+ RTL_REALWOW_SET_KCP_ACKPKTINFO,
+ RTL_REALWOW_SET_KCP_WPINFO,
+ RTL_REALWOW_SET_KCPDHCP_TIMEOUT,
+
+ RTLT_REALWOW_COMMAND_INVALID
+};
+
+struct rtl_realwow_ioctl_struct {
+ __u32 cmd;
+ __u32 offset;
+ __u32 len;
+ union {
+ __u32 data;
+ void *data_buffer;
+ };
+};
+
+typedef struct _MP_KCPInfo {
+ u8 DIPv4[4];
+ u8 MacID[6];
+ u16 UdpPort[2];
+ u8 PKTLEN[2];
+
+ u16 ackLostCnt;
+ u8 KCP_WakePattern[MAX_RealWoW_Payload];
+ u8 KCP_AckPacket[MAX_RealWoW_Payload];
+ u32 KCP_interval;
+ u8 KCP_WakePattern_Len;
+ u8 KCP_AckPacket_Len;
+ u8 KCP_TxPacket[2][KA_TX_PACKET_SIZE];
+} MP_KCP_INFO, *PMP_KCP_INFO;
+
+typedef struct _KCPInfo {
+ u32 nId; // = id
+ u8 DIPv4[4];
+ u8 MacID[6];
+ u16 UdpPort;
+ u16 PKTLEN;
+} KCPInfo, *PKCPInfo;
+
+typedef struct _KCPContent {
+ u32 id; // = id
+ u32 mSec; // = msec
+ u32 size; // =size
+ u8 bPacket[MAX_RealWoW_KCP_SIZE]; // put packet here
+} KCPContent, *PKCPContent;
+
+typedef struct _RealWoWAckPktInfo {
+ u16 ackLostCnt;
+ u16 patterntSize;
+ u8 pattern[MAX_RealWoW_Payload];
+} RealWoWAckPktInfo,*PRealWoWAckPktInfo;
+
+typedef struct _RealWoWWPInfo {
+ u16 patterntSize;
+ u8 pattern[MAX_RealWoW_Payload];
+} RealWoWWPInfo,*PRealWoWWPInfo;
+
+int rtl8125_realwow_ioctl(struct net_device *dev, struct ifreq *ifr);
+void rtl8125_realwow_hw_init(struct net_device *dev);
+void rtl8125_get_realwow_hw_version(struct net_device *dev);
+void rtl8125_set_realwow_d3_para(struct net_device *dev);
+
+#endif /* _LINUX_R8125_REALWOW_H */
diff --git a/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_rss.c b/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_rss.c
new file mode 100755
index 000000000..1f55c4477
--- /dev/null
+++ b/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_rss.c
@@ -0,0 +1,481 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+################################################################################
+#
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see .
+#
+# Author:
+# Realtek NIC software team
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ * This product is covered by one or more of the following patents:
+ * US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+#include
+#include "r8125.h"
+
+enum rtl8125_rss_register_content {
+ /* RSS */
+ RSS_CTRL_TCP_IPV4_SUPP = (1 << 0),
+ RSS_CTRL_IPV4_SUPP = (1 << 1),
+ RSS_CTRL_TCP_IPV6_SUPP = (1 << 2),
+ RSS_CTRL_IPV6_SUPP = (1 << 3),
+ RSS_HALF_SUPP = (1 << 7),
+ RSS_CTRL_UDP_IPV4_SUPP = (1 << 11),
+ RSS_CTRL_UDP_IPV6_SUPP = (1 << 12),
+ RSS_QUAD_CPU_EN = (1 << 16),
+ RSS_HQ_Q_SUP_R = (1 << 31),
+};
+
+static int rtl8125_get_rss_hash_opts(struct rtl8125_private *tp,
+ struct ethtool_rxnfc *cmd)
+{
+ cmd->data = 0;
+
+ /* Report default options for RSS */
+ switch (cmd->flow_type) {
+ case TCP_V4_FLOW:
+ cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
+ /* fallthrough */
+ case UDP_V4_FLOW:
+ if (tp->rss_flags & RTL_8125_RSS_FLAG_HASH_UDP_IPV4)
+ cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
+ /* fallthrough */
+ case IPV4_FLOW:
+ cmd->data |= RXH_IP_SRC | RXH_IP_DST;
+ break;
+ case TCP_V6_FLOW:
+ cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
+ /* fallthrough */
+ case UDP_V6_FLOW:
+ if (tp->rss_flags & RTL_8125_RSS_FLAG_HASH_UDP_IPV6)
+ cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
+ /* fallthrough */
+ case IPV6_FLOW:
+ cmd->data |= RXH_IP_SRC | RXH_IP_DST;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+int rtl8125_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
+ u32 *rule_locs)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+ int ret = -EOPNOTSUPP;
+
+ netif_info(tp, drv, tp->dev, "rss get rxnfc\n");
+
+ if (!(dev->features & NETIF_F_RXHASH))
+ return ret;
+
+ switch (cmd->cmd) {
+ case ETHTOOL_GRXRINGS:
+ cmd->data = rtl8125_tot_rx_rings(tp);
+ ret = 0;
+ break;
+ case ETHTOOL_GRXFH:
+ ret = rtl8125_get_rss_hash_opts(tp, cmd);
+ break;
+ default:
+ break;
+ }
+
+ return ret;
+}
+
+u32 rtl8125_rss_indir_tbl_entries(struct rtl8125_private *tp)
+{
+ return tp->HwSuppIndirTblEntries;
+}
+
+#define RSS_MASK_BITS_OFFSET (8)
+#define RSS_CPU_NUM_OFFSET (16)
+#define RTL8125_UDP_RSS_FLAGS (RTL_8125_RSS_FLAG_HASH_UDP_IPV4 | \
+ RTL_8125_RSS_FLAG_HASH_UDP_IPV6)
+static int _rtl8125_set_rss_hash_opt(struct rtl8125_private *tp)
+{
+ u32 rss_flags = tp->rss_flags;
+ u32 hash_mask_len;
+ u32 rss_ctrl;
+
+ rss_ctrl = ilog2(rtl8125_tot_rx_rings(tp));
+ rss_ctrl &= (BIT_0 | BIT_1 | BIT_2);
+ rss_ctrl <<= RSS_CPU_NUM_OFFSET;
+
+ /* Perform hash on these packet types */
+ rss_ctrl |= RSS_CTRL_TCP_IPV4_SUPP
+ | RSS_CTRL_IPV4_SUPP
+ | RSS_CTRL_IPV6_SUPP
+ | RSS_CTRL_TCP_IPV6_SUPP;
+
+ if (rss_flags & RTL_8125_RSS_FLAG_HASH_UDP_IPV4)
+ rss_ctrl |= RSS_CTRL_UDP_IPV4_SUPP;
+
+ if (rss_flags & RTL_8125_RSS_FLAG_HASH_UDP_IPV6)
+ rss_ctrl |= RSS_CTRL_UDP_IPV6_SUPP;
+
+ hash_mask_len = ilog2(rtl8125_rss_indir_tbl_entries(tp));
+ hash_mask_len &= (BIT_0 | BIT_1 | BIT_2);
+ rss_ctrl |= hash_mask_len << RSS_MASK_BITS_OFFSET;
+
+ RTL_W32(tp, RSS_CTRL_8125, rss_ctrl);
+
+ return 0;
+}
+
+static int rtl8125_set_rss_hash_opt(struct rtl8125_private *tp,
+ struct ethtool_rxnfc *nfc)
+{
+ u32 rss_flags = tp->rss_flags;
+
+ netif_info(tp, drv, tp->dev, "rss set hash\n");
+
+ /*
+ * RSS does not support anything other than hashing
+ * to queues on src and dst IPs and ports
+ */
+ if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
+ RXH_L4_B_0_1 | RXH_L4_B_2_3))
+ return -EINVAL;
+
+ switch (nfc->flow_type) {
+ case TCP_V4_FLOW:
+ case TCP_V6_FLOW:
+ if (!(nfc->data & RXH_IP_SRC) ||
+ !(nfc->data & RXH_IP_DST) ||
+ !(nfc->data & RXH_L4_B_0_1) ||
+ !(nfc->data & RXH_L4_B_2_3))
+ return -EINVAL;
+ break;
+ case UDP_V4_FLOW:
+ if (!(nfc->data & RXH_IP_SRC) ||
+ !(nfc->data & RXH_IP_DST))
+ return -EINVAL;
+ switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
+ case 0:
+ rss_flags &= ~RTL_8125_RSS_FLAG_HASH_UDP_IPV4;
+ break;
+ case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
+ rss_flags |= RTL_8125_RSS_FLAG_HASH_UDP_IPV4;
+ break;
+ default:
+ return -EINVAL;
+ }
+ break;
+ case UDP_V6_FLOW:
+ if (!(nfc->data & RXH_IP_SRC) ||
+ !(nfc->data & RXH_IP_DST))
+ return -EINVAL;
+ switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
+ case 0:
+ rss_flags &= ~RTL_8125_RSS_FLAG_HASH_UDP_IPV6;
+ break;
+ case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
+ rss_flags |= RTL_8125_RSS_FLAG_HASH_UDP_IPV6;
+ break;
+ default:
+ return -EINVAL;
+ }
+ break;
+ case SCTP_V4_FLOW:
+ case AH_ESP_V4_FLOW:
+ case AH_V4_FLOW:
+ case ESP_V4_FLOW:
+ case SCTP_V6_FLOW:
+ case AH_ESP_V6_FLOW:
+ case AH_V6_FLOW:
+ case ESP_V6_FLOW:
+ case IP_USER_FLOW:
+ case ETHER_FLOW:
+ /* RSS is not supported for these protocols */
+ if (nfc->data) {
+ netif_err(tp, drv, tp->dev, "Command parameters not supported\n");
+ return -EINVAL;
+ }
+ return 0;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ /* if we changed something we need to update flags */
+ if (rss_flags != tp->rss_flags) {
+ u32 rss_ctrl = RTL_R32(tp, RSS_CTRL_8125);
+
+ if ((rss_flags & RTL8125_UDP_RSS_FLAGS) &&
+ !(tp->rss_flags & RTL8125_UDP_RSS_FLAGS))
+ netdev_warn(tp->dev,
+ "enabling UDP RSS: fragmented packets may "
+ "arrive out of order to the stack above\n");
+
+ tp->rss_flags = rss_flags;
+
+ /* Perform hash on these packet types */
+ rss_ctrl |= RSS_CTRL_TCP_IPV4_SUPP
+ | RSS_CTRL_IPV4_SUPP
+ | RSS_CTRL_IPV6_SUPP
+ | RSS_CTRL_TCP_IPV6_SUPP;
+
+ rss_ctrl &= ~(RSS_CTRL_UDP_IPV4_SUPP |
+ RSS_CTRL_UDP_IPV6_SUPP);
+
+ if (rss_flags & RTL_8125_RSS_FLAG_HASH_UDP_IPV4)
+ rss_ctrl |= RSS_CTRL_UDP_IPV4_SUPP;
+
+ if (rss_flags & RTL_8125_RSS_FLAG_HASH_UDP_IPV6)
+ rss_ctrl |= RSS_CTRL_UDP_IPV6_SUPP;
+
+ RTL_W32(tp, RSS_CTRL_8125, rss_ctrl);
+ }
+
+ return 0;
+}
+
+int rtl8125_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+ int ret = -EOPNOTSUPP;
+
+ netif_info(tp, drv, tp->dev, "rss set rxnfc\n");
+
+ if (!(dev->features & NETIF_F_RXHASH))
+ return ret;
+
+ switch (cmd->cmd) {
+ case ETHTOOL_SRXFH:
+ ret = rtl8125_set_rss_hash_opt(tp, cmd);
+ break;
+ default:
+ break;
+ }
+
+ return ret;
+}
+
+static u32 _rtl8125_get_rxfh_key_size(struct rtl8125_private *tp)
+{
+ return sizeof(tp->rss_key);
+}
+
+u32 rtl8125_get_rxfh_key_size(struct net_device *dev)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+
+ netif_info(tp, drv, tp->dev, "rss get key size\n");
+
+ if (!(dev->features & NETIF_F_RXHASH))
+ return 0;
+
+ return _rtl8125_get_rxfh_key_size(tp);
+}
+
+u32 rtl8125_rss_indir_size(struct net_device *dev)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+
+ netif_info(tp, drv, tp->dev, "rss get indir tbl size\n");
+
+ if (!(dev->features & NETIF_F_RXHASH))
+ return 0;
+
+ return rtl8125_rss_indir_tbl_entries(tp);
+}
+
+static void rtl8125_get_reta(struct rtl8125_private *tp, u32 *indir)
+{
+ int i, reta_size = rtl8125_rss_indir_tbl_entries(tp);
+
+ for (i = 0; i < reta_size; i++)
+ indir[i] = tp->rss_indir_tbl[i];
+}
+
+int rtl8125_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
+ u8 *hfunc)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+
+ netif_info(tp, drv, tp->dev, "rss get rxfh\n");
+
+ if (!(dev->features & NETIF_F_RXHASH))
+ return -EOPNOTSUPP;
+
+ if (hfunc)
+ *hfunc = ETH_RSS_HASH_TOP;
+
+ if (indir)
+ rtl8125_get_reta(tp, indir);
+
+ if (key)
+ memcpy(key, tp->rss_key, rtl8125_get_rxfh_key_size(dev));
+
+ return 0;
+}
+
+static u32 rtl8125_rss_key_reg(struct rtl8125_private *tp)
+{
+ return RSS_KEY_8125;
+}
+
+static u32 rtl8125_rss_indir_tbl_reg(struct rtl8125_private *tp)
+{
+ return RSS_INDIRECTION_TBL_8125_V2;
+}
+
+static void rtl8125_store_reta(struct rtl8125_private *tp)
+{
+ u16 indir_tbl_reg = rtl8125_rss_indir_tbl_reg(tp);
+ u32 i, reta_entries = rtl8125_rss_indir_tbl_entries(tp);
+ u32 reta = 0;
+ u8 *indir_tbl = tp->rss_indir_tbl;
+
+ /* Write redirection table to HW */
+ for (i = 0; i < reta_entries; i++) {
+ reta |= indir_tbl[i] << (i & 0x3) * 8;
+ if ((i & 3) == 3) {
+ RTL_W32(tp, indir_tbl_reg, reta);
+
+ indir_tbl_reg += 4;
+ reta = 0;
+ }
+ }
+}
+
+static void rtl8125_store_rss_key(struct rtl8125_private *tp)
+{
+ const u16 rss_key_reg = rtl8125_rss_key_reg(tp);
+ u32 i, rss_key_size = _rtl8125_get_rxfh_key_size(tp);
+ u32 *rss_key = (u32*)tp->rss_key;
+
+ /* Write redirection table to HW */
+ for (i = 0; i < rss_key_size; i+=4)
+ RTL_W32(tp, rss_key_reg + i, *rss_key++);
+}
+
+int rtl8125_set_rxfh(struct net_device *dev, const u32 *indir,
+ const u8 *key, const u8 hfunc)
+{
+ struct rtl8125_private *tp = netdev_priv(dev);
+ int i;
+ u32 reta_entries = rtl8125_rss_indir_tbl_entries(tp);
+
+ netif_info(tp, drv, tp->dev, "rss set rxfh\n");
+
+ /* We require at least one supported parameter to be changed and no
+ * change in any of the unsupported parameters
+ */
+ if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
+ return -EOPNOTSUPP;
+
+ /* Fill out the redirection table */
+ if (indir) {
+ int max_queues = tp->num_rx_rings;
+
+ /* Verify user input. */
+ for (i = 0; i < reta_entries; i++)
+ if (indir[i] >= max_queues)
+ return -EINVAL;
+
+ for (i = 0; i < reta_entries; i++)
+ tp->rss_indir_tbl[i] = indir[i];
+ }
+
+ /* Fill out the rss hash key */
+ if (key)
+ memcpy(tp->rss_key, key, rtl8125_get_rxfh_key_size(dev));
+
+ rtl8125_store_reta(tp);
+
+ rtl8125_store_rss_key(tp);
+
+ return 0;
+}
+
+static u32 rtl8125_get_rx_desc_hash(struct rtl8125_private *tp,
+ struct RxDescV3 *descv3)
+{
+ return le32_to_cpu(descv3->RxDescNormalDDWord2.RSSResult);
+}
+
+#define RXS_8125B_RSS_UDP BIT(9)
+#define RXS_8125_RSS_IPV4 BIT(10)
+#define RXS_8125_RSS_IPV6 BIT(12)
+#define RXS_8125_RSS_TCP BIT(13)
+#define RTL8125_RXS_RSS_L3_TYPE_MASK (RXS_8125_RSS_IPV4 | RXS_8125_RSS_IPV6)
+#define RTL8125_RXS_RSS_L4_TYPE_MASK (RXS_8125_RSS_TCP | RXS_8125B_RSS_UDP)
+void rtl8125_rx_hash(struct rtl8125_private *tp,
+ struct RxDescV3 *descv3,
+ struct sk_buff *skb)
+{
+ u16 rss_header_info;
+
+ if (!(tp->dev->features & NETIF_F_RXHASH))
+ return;
+
+ rss_header_info = le16_to_cpu(descv3->RxDescNormalDDWord2.HeaderInfo);
+
+ if (!(rss_header_info & RTL8125_RXS_RSS_L3_TYPE_MASK))
+ return;
+
+ skb_set_hash(skb, rtl8125_get_rx_desc_hash(tp, descv3),
+ (RTL8125_RXS_RSS_L4_TYPE_MASK & rss_header_info) ?
+ PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
+}
+
+void rtl8125_disable_rss(struct rtl8125_private *tp)
+{
+ RTL_W32(tp, RSS_CTRL_8125, 0x00);
+}
+
+void _rtl8125_config_rss(struct rtl8125_private *tp)
+{
+ _rtl8125_set_rss_hash_opt(tp);
+
+ rtl8125_store_reta(tp);
+
+ rtl8125_store_rss_key(tp);
+}
+
+void rtl8125_config_rss(struct rtl8125_private *tp)
+{
+ if (!tp->EnableRss) {
+ rtl8125_disable_rss(tp);
+ return;
+ }
+
+ _rtl8125_config_rss(tp);
+}
+
+void rtl8125_init_rss(struct rtl8125_private *tp)
+{
+ int i;
+
+ for (i = 0; i < rtl8125_rss_indir_tbl_entries(tp); i++)
+ tp->rss_indir_tbl[i] = ethtool_rxfh_indir_default(i, tp->num_rx_rings);
+
+ netdev_rss_key_fill(tp->rss_key, RTL8125_RSS_KEY_SIZE);
+}
diff --git a/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_rss.h b/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_rss.h
new file mode 100755
index 000000000..886413950
--- /dev/null
+++ b/src/4.x/drivers/net/ethernet/realtek/r8125/r8125_rss.h
@@ -0,0 +1,69 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+################################################################################
+#
+# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see .
+#
+# Author:
+# Realtek NIC software team
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ * This product is covered by one or more of the following patents:
+ * US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+#ifndef _LINUX_rtl8125_RSS_H
+#define _LINUX_rtl8125_RSS_H
+
+#include
+#include
+
+#define RTL8125_RSS_KEY_SIZE 40 /* size of RSS Hash Key in bytes */
+#define RTL8125_MAX_INDIRECTION_TABLE_ENTRIES 128
+
+enum rtl8125_rss_flag {
+ RTL_8125_RSS_FLAG_HASH_UDP_IPV4 = (1 << 0),
+ RTL_8125_RSS_FLAG_HASH_UDP_IPV6 = (1 << 1),
+};
+
+struct rtl8125_private;
+
+int rtl8125_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
+ u32 *rule_locs);
+int rtl8125_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd);
+u32 rtl8125_get_rxfh_key_size(struct net_device *netdev);
+u32 rtl8125_rss_indir_size(struct net_device *netdev);
+int rtl8125_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
+ u8 *hfunc);
+int rtl8125_set_rxfh(struct net_device *netdev, const u32 *indir,
+ const u8 *key, const u8 hfunc);
+void rtl8125_rx_hash(struct rtl8125_private *tp,
+ struct RxDescV3 *descv3,
+ struct sk_buff *skb);
+void _rtl8125_config_rss(struct rtl8125_private *tp);
+void rtl8125_config_rss(struct rtl8125_private *tp);
+void rtl8125_init_rss(struct rtl8125_private *tp);
+u32 rtl8125_rss_indir_tbl_entries(struct rtl8125_private *tp);
+void rtl8125_disable_rss(struct rtl8125_private *tp);
+
+#endif /* _LINUX_rtl8125_RSS_H */
diff --git a/src/4.x/drivers/net/ethernet/realtek/r8125/rtl_eeprom.c b/src/4.x/drivers/net/ethernet/realtek/r8125/rtl_eeprom.c
old mode 100644
new mode 100755
index be1080b33..03660ddaf
--- a/src/4.x/drivers/net/ethernet/realtek/r8125/rtl_eeprom.c
+++ b/src/4.x/drivers/net/ethernet/realtek/r8125/rtl_eeprom.c
@@ -1,10 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# controllers with PCI-Express interface.
#
-# Copyright(c) 2018 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@@ -52,18 +53,17 @@
//-------------------------------------------------------------------
void rtl8125_eeprom_type(struct rtl8125_private *tp)
{
- void __iomem *ioaddr=tp->mmio_addr;
u16 magic = 0;
if (tp->mcfg == CFG_METHOD_DEFAULT)
goto out_no_eeprom;
- if(RTL_R8(0xD2)&0x04) {
+ if(RTL_R8(tp, 0xD2)&0x04) {
//not support
//tp->eeprom_type = EEPROM_TWSI;
//tp->eeprom_len = 256;
goto out_no_eeprom;
- } else if(RTL_R32(RxConfig) & RxCfg_9356SEL) {
+ } else if(RTL_R32(tp, RxConfig) & RxCfg_9356SEL) {
tp->eeprom_type = EEPROM_TYPE_93C56;
tp->eeprom_len = 256;
} else {
@@ -80,28 +80,28 @@ void rtl8125_eeprom_type(struct rtl8125_private *tp)
}
}
-void rtl8125_eeprom_cleanup(void __iomem *ioaddr)
+void rtl8125_eeprom_cleanup(struct rtl8125_private *tp)
{
u8 x;
- x = RTL_R8(Cfg9346);
+ x = RTL_R8(tp, Cfg9346);
x &= ~(Cfg9346_EEDI | Cfg9346_EECS);
- RTL_W8(Cfg9346, x);
+ RTL_W8(tp, Cfg9346, x);
- rtl8125_raise_clock(&x, ioaddr);
- rtl8125_lower_clock(&x, ioaddr);
+ rtl8125_raise_clock(tp, &x);
+ rtl8125_lower_clock(tp, &x);
}
-int rtl8125_eeprom_cmd_done(void __iomem *ioaddr)
+int rtl8125_eeprom_cmd_done(struct rtl8125_private *tp)
{
u8 x;
int i;
- rtl8125_stand_by(ioaddr);
+ rtl8125_stand_by(tp);
for (i = 0; i < 50000; i++) {
- x = RTL_R8(Cfg9346);
+ x = RTL_R8(tp, Cfg9346);
if (x & Cfg9346_EEDO) {
udelay(RTL_CLOCK_RATE * 2 * 3);
@@ -119,7 +119,6 @@ int rtl8125_eeprom_cmd_done(void __iomem *ioaddr)
//-------------------------------------------------------------------
u16 rtl8125_eeprom_read_sc(struct rtl8125_private *tp, u16 reg)
{
- void __iomem *ioaddr=tp->mmio_addr;
int addr_sz = 6;
u8 x;
u16 data;
@@ -134,16 +133,16 @@ u16 rtl8125_eeprom_read_sc(struct rtl8125_private *tp, u16 reg)
addr_sz = 8;
x = Cfg9346_EEM1 | Cfg9346_EECS;
- RTL_W8(Cfg9346, x);
+ RTL_W8(tp, Cfg9346, x);
- rtl8125_shift_out_bits(RTL_EEPROM_READ_OPCODE, 3, ioaddr);
- rtl8125_shift_out_bits(reg, addr_sz, ioaddr);
+ rtl8125_shift_out_bits(tp, RTL_EEPROM_READ_OPCODE, 3);
+ rtl8125_shift_out_bits(tp, reg, addr_sz);
- data = rtl8125_shift_in_bits(ioaddr);
+ data = rtl8125_shift_in_bits(tp);
- rtl8125_eeprom_cleanup(ioaddr);
+ rtl8125_eeprom_cleanup(tp);
- RTL_W8(Cfg9346, 0);
+ RTL_W8(tp, Cfg9346, 0);
return data;
}
@@ -154,7 +153,6 @@ u16 rtl8125_eeprom_read_sc(struct rtl8125_private *tp, u16 reg)
//-------------------------------------------------------------------
void rtl8125_eeprom_write_sc(struct rtl8125_private *tp, u16 reg, u16 data)
{
- void __iomem *ioaddr=tp->mmio_addr;
u8 x;
int addr_sz = 6;
int w_dummy_addr = 4;
@@ -172,56 +170,56 @@ void rtl8125_eeprom_write_sc(struct rtl8125_private *tp, u16 reg, u16 data)
}
x = Cfg9346_EEM1 | Cfg9346_EECS;
- RTL_W8(Cfg9346, x);
+ RTL_W8(tp, Cfg9346, x);
- rtl8125_shift_out_bits(RTL_EEPROM_EWEN_OPCODE, 5, ioaddr);
- rtl8125_shift_out_bits(reg, w_dummy_addr, ioaddr);
- rtl8125_stand_by(ioaddr);
+ rtl8125_shift_out_bits(tp, RTL_EEPROM_EWEN_OPCODE, 5);
+ rtl8125_shift_out_bits(tp, reg, w_dummy_addr);
+ rtl8125_stand_by(tp);
- rtl8125_shift_out_bits(RTL_EEPROM_ERASE_OPCODE, 3, ioaddr);
- rtl8125_shift_out_bits(reg, addr_sz, ioaddr);
- if (rtl8125_eeprom_cmd_done(ioaddr) < 0) {
+ rtl8125_shift_out_bits(tp, RTL_EEPROM_ERASE_OPCODE, 3);
+ rtl8125_shift_out_bits(tp, reg, addr_sz);
+ if (rtl8125_eeprom_cmd_done(tp) < 0) {
return;
}
- rtl8125_stand_by(ioaddr);
+ rtl8125_stand_by(tp);
- rtl8125_shift_out_bits(RTL_EEPROM_WRITE_OPCODE, 3, ioaddr);
- rtl8125_shift_out_bits(reg, addr_sz, ioaddr);
- rtl8125_shift_out_bits(data, 16, ioaddr);
- if (rtl8125_eeprom_cmd_done(ioaddr) < 0) {
+ rtl8125_shift_out_bits(tp, RTL_EEPROM_WRITE_OPCODE, 3);
+ rtl8125_shift_out_bits(tp, reg, addr_sz);
+ rtl8125_shift_out_bits(tp, data, 16);
+ if (rtl8125_eeprom_cmd_done(tp) < 0) {
return;
}
- rtl8125_stand_by(ioaddr);
+ rtl8125_stand_by(tp);
- rtl8125_shift_out_bits(RTL_EEPROM_EWDS_OPCODE, 5, ioaddr);
- rtl8125_shift_out_bits(reg, w_dummy_addr, ioaddr);
+ rtl8125_shift_out_bits(tp, RTL_EEPROM_EWDS_OPCODE, 5);
+ rtl8125_shift_out_bits(tp, reg, w_dummy_addr);
- rtl8125_eeprom_cleanup(ioaddr);
- RTL_W8(Cfg9346, 0);
+ rtl8125_eeprom_cleanup(tp);
+ RTL_W8(tp, Cfg9346, 0);
}
-void rtl8125_raise_clock(u8 *x, void __iomem *ioaddr)
+void rtl8125_raise_clock(struct rtl8125_private *tp, u8 *x)
{
*x = *x | Cfg9346_EESK;
- RTL_W8(Cfg9346, *x);
+ RTL_W8(tp, Cfg9346, *x);
udelay(RTL_CLOCK_RATE);
}
-void rtl8125_lower_clock(u8 *x, void __iomem *ioaddr)
+void rtl8125_lower_clock(struct rtl8125_private *tp, u8 *x)
{
*x = *x & ~Cfg9346_EESK;
- RTL_W8(Cfg9346, *x);
+ RTL_W8(tp, Cfg9346, *x);
udelay(RTL_CLOCK_RATE);
}
-void rtl8125_shift_out_bits(int data, int count, void __iomem *ioaddr)
+void rtl8125_shift_out_bits(struct rtl8125_private *tp, int data, int count)
{
u8 x;
int mask;
mask = 0x01 << (count - 1);
- x = RTL_R8(Cfg9346);
+ x = RTL_R8(tp, Cfg9346);
x &= ~(Cfg9346_EEDI | Cfg9346_EEDO);
do {
@@ -230,62 +228,62 @@ void rtl8125_shift_out_bits(int data, int count, void __iomem *ioaddr)
else
x &= ~Cfg9346_EEDI;
- RTL_W8(Cfg9346, x);
+ RTL_W8(tp, Cfg9346, x);
udelay(RTL_CLOCK_RATE);
- rtl8125_raise_clock(&x, ioaddr);
- rtl8125_lower_clock(&x, ioaddr);
+ rtl8125_raise_clock(tp, &x);
+ rtl8125_lower_clock(tp, &x);
mask = mask >> 1;
} while(mask);
x &= ~Cfg9346_EEDI;
- RTL_W8(Cfg9346, x);
+ RTL_W8(tp, Cfg9346, x);
}
-u16 rtl8125_shift_in_bits(void __iomem *ioaddr)
+u16 rtl8125_shift_in_bits(struct rtl8125_private *tp)
{
u8 x;
u16 d, i;
- x = RTL_R8(Cfg9346);
+ x = RTL_R8(tp, Cfg9346);
x &= ~(Cfg9346_EEDI | Cfg9346_EEDO);
d = 0;
for (i = 0; i < 16; i++) {
d = d << 1;
- rtl8125_raise_clock(&x, ioaddr);
+ rtl8125_raise_clock(tp, &x);
- x = RTL_R8(Cfg9346);
+ x = RTL_R8(tp, Cfg9346);
x &= ~Cfg9346_EEDI;
if (x & Cfg9346_EEDO)
d |= 1;
- rtl8125_lower_clock(&x, ioaddr);
+ rtl8125_lower_clock(tp, &x);
}
return d;
}
-void rtl8125_stand_by(void __iomem *ioaddr)
+void rtl8125_stand_by(struct rtl8125_private *tp)
{
u8 x;
- x = RTL_R8(Cfg9346);
+ x = RTL_R8(tp, Cfg9346);
x &= ~(Cfg9346_EECS | Cfg9346_EESK);
- RTL_W8(Cfg9346, x);
+ RTL_W8(tp, Cfg9346, x);
udelay(RTL_CLOCK_RATE);
x |= Cfg9346_EECS;
- RTL_W8(Cfg9346, x);
+ RTL_W8(tp, Cfg9346, x);
}
-void rtl8125_set_eeprom_sel_low(void __iomem *ioaddr)
+void rtl8125_set_eeprom_sel_low(struct rtl8125_private *tp)
{
- RTL_W8(Cfg9346, Cfg9346_EEM1);
- RTL_W8(Cfg9346, Cfg9346_EEM1 | Cfg9346_EESK);
+ RTL_W8(tp, Cfg9346, Cfg9346_EEM1);
+ RTL_W8(tp, Cfg9346, Cfg9346_EEM1 | Cfg9346_EESK);
udelay(20);
- RTL_W8(Cfg9346, Cfg9346_EEM1);
+ RTL_W8(tp, Cfg9346, Cfg9346_EEM1);
}
diff --git a/src/4.x/drivers/net/ethernet/realtek/r8125/rtl_eeprom.h b/src/4.x/drivers/net/ethernet/realtek/r8125/rtl_eeprom.h
old mode 100644
new mode 100755
index 80683ed28..8faed17cf
--- a/src/4.x/drivers/net/ethernet/realtek/r8125/rtl_eeprom.h
+++ b/src/4.x/drivers/net/ethernet/realtek/r8125/rtl_eeprom.h
@@ -1,10 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# controllers with PCI-Express interface.
#
-# Copyright(c) 2018 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@@ -41,12 +42,12 @@
#define RTL_CLOCK_RATE 3
void rtl8125_eeprom_type(struct rtl8125_private *tp);
-void rtl8125_eeprom_cleanup(void __iomem *ioaddr);
+void rtl8125_eeprom_cleanup(struct rtl8125_private *tp);
u16 rtl8125_eeprom_read_sc(struct rtl8125_private *tp, u16 reg);
void rtl8125_eeprom_write_sc(struct rtl8125_private *tp, u16 reg, u16 data);
-void rtl8125_shift_out_bits(int data, int count, void __iomem *ioaddr);
-u16 rtl8125_shift_in_bits(void __iomem *ioaddr);
-void rtl8125_raise_clock(u8 *x, void __iomem *ioaddr);
-void rtl8125_lower_clock(u8 *x, void __iomem *ioaddr);
-void rtl8125_stand_by(void __iomem *ioaddr);
-void rtl8125_set_eeprom_sel_low(void __iomem *ioaddr);
+void rtl8125_shift_out_bits(struct rtl8125_private *tp, int data, int count);
+u16 rtl8125_shift_in_bits(struct rtl8125_private *tp);
+void rtl8125_raise_clock(struct rtl8125_private *tp, u8 *x);
+void rtl8125_lower_clock(struct rtl8125_private *tp, u8 *x);
+void rtl8125_stand_by(struct rtl8125_private *tp);
+void rtl8125_set_eeprom_sel_low(struct rtl8125_private *tp);
diff --git a/src/4.x/drivers/net/ethernet/realtek/r8125/rtltool.c b/src/4.x/drivers/net/ethernet/realtek/r8125/rtltool.c
old mode 100644
new mode 100755
index c34d9f466..f40df6fe3
--- a/src/4.x/drivers/net/ethernet/realtek/r8125/rtltool.c
+++ b/src/4.x/drivers/net/ethernet/realtek/r8125/rtltool.c
@@ -1,3 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+################################################################################
+#
+# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see .
+#
+# Author:
+# Realtek NIC software team
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ * This product is covered by one or more of the following patents:
+ * US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
#include
#include
#include
@@ -13,7 +47,6 @@
int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
{
struct rtltool_cmd my_cmd;
- unsigned long flags;
int ret;
if (copy_from_user(&my_cmd, ifr->ifr_data, sizeof(my_cmd)))
@@ -22,9 +55,6 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
ret = 0;
switch (my_cmd.cmd) {
case RTLTOOL_READ_MAC:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
if (my_cmd.len==1)
my_cmd.data = readb(tp->mmio_addr+my_cmd.offset);
else if (my_cmd.len==2)
@@ -43,9 +73,6 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
break;
case RTLTOOL_WRITE_MAC:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
if (my_cmd.len==1)
writeb(my_cmd.data, tp->mmio_addr+my_cmd.offset);
else if (my_cmd.len==2)
@@ -60,13 +87,7 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
break;
case RTLTOOL_READ_PHY:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
- spin_lock_irqsave(&tp->lock, flags);
my_cmd.data = rtl8125_mdio_prot_read(tp, my_cmd.offset);
- spin_unlock_irqrestore(&tp->lock, flags);
-
if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
ret = -EFAULT;
break;
@@ -75,22 +96,11 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
break;
case RTLTOOL_WRITE_PHY:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
- spin_lock_irqsave(&tp->lock, flags);
rtl8125_mdio_prot_write(tp, my_cmd.offset, my_cmd.data);
- spin_unlock_irqrestore(&tp->lock, flags);
break;
case RTLTOOL_READ_EPHY:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
- spin_lock_irqsave(&tp->lock, flags);
- my_cmd.data = rtl8125_ephy_read(tp->mmio_addr, my_cmd.offset);
- spin_unlock_irqrestore(&tp->lock, flags);
-
+ my_cmd.data = rtl8125_ephy_read(tp, my_cmd.offset);
if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
ret = -EFAULT;
break;
@@ -99,20 +109,13 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
break;
case RTLTOOL_WRITE_EPHY:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
- spin_lock_irqsave(&tp->lock, flags);
- rtl8125_ephy_write(tp->mmio_addr, my_cmd.offset, my_cmd.data);
- spin_unlock_irqrestore(&tp->lock, flags);
+ rtl8125_ephy_write(tp, my_cmd.offset, my_cmd.data);
break;
case RTLTOOL_READ_ERI:
my_cmd.data = 0;
if (my_cmd.len==1 || my_cmd.len==2 || my_cmd.len==4) {
- spin_lock_irqsave(&tp->lock, flags);
- my_cmd.data = rtl8125_eri_read(tp->mmio_addr, my_cmd.offset, my_cmd.len, ERIAR_ExGMAC);
- spin_unlock_irqrestore(&tp->lock, flags);
+ my_cmd.data = rtl8125_eri_read(tp, my_cmd.offset, my_cmd.len, ERIAR_ExGMAC);
} else {
ret = -EOPNOTSUPP;
break;
@@ -126,16 +129,8 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
break;
case RTLTOOL_WRITE_ERI:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
if (my_cmd.len==1 || my_cmd.len==2 || my_cmd.len==4) {
- spin_lock_irqsave(&tp->lock, flags);
- rtl8125_eri_write(tp->mmio_addr, my_cmd.offset, my_cmd.len, my_cmd.data, ERIAR_ExGMAC);
- spin_unlock_irqrestore(&tp->lock, flags);
+ rtl8125_eri_write(tp, my_cmd.offset, my_cmd.len, my_cmd.data, ERIAR_ExGMAC);
} else {
ret = -EOPNOTSUPP;
break;
@@ -143,9 +138,6 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
break;
case RTLTOOL_READ_PCI:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
my_cmd.data = 0;
if (my_cmd.len==1)
pci_read_config_byte(tp->pci_dev, my_cmd.offset,
@@ -168,9 +160,6 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
break;
case RTLTOOL_WRITE_PCI:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
if (my_cmd.len==1)
pci_write_config_byte(tp->pci_dev, my_cmd.offset,
my_cmd.data);
@@ -188,13 +177,7 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
break;
case RTLTOOL_READ_EEPROM:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
- spin_lock_irqsave(&tp->lock, flags);
my_cmd.data = rtl8125_eeprom_read_sc(tp, my_cmd.offset);
- spin_unlock_irqrestore(&tp->lock, flags);
-
if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
ret = -EFAULT;
break;
@@ -203,24 +186,13 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
break;
case RTLTOOL_WRITE_EEPROM:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
- spin_lock_irqsave(&tp->lock, flags);
rtl8125_eeprom_write_sc(tp, my_cmd.offset, my_cmd.data);
- spin_unlock_irqrestore(&tp->lock, flags);
break;
case RTL_READ_OOB_MAC:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
- spin_lock_irqsave(&tp->lock, flags);
rtl8125_oob_mutex_lock(tp);
my_cmd.data = rtl8125_ocp_read(tp, my_cmd.offset, 4);
rtl8125_oob_mutex_unlock(tp);
- spin_unlock_irqrestore(&tp->lock, flags);
-
if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
ret = -EFAULT;
break;
@@ -228,52 +200,31 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
break;
case RTL_WRITE_OOB_MAC:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
if (my_cmd.len == 0 || my_cmd.len > 4)
return -EOPNOTSUPP;
- spin_lock_irqsave(&tp->lock, flags);
rtl8125_oob_mutex_lock(tp);
rtl8125_ocp_write(tp, my_cmd.offset, my_cmd.len, my_cmd.data);
rtl8125_oob_mutex_unlock(tp);
- spin_unlock_irqrestore(&tp->lock, flags);
break;
case RTL_ENABLE_PCI_DIAG:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
- spin_lock_irqsave(&tp->lock, flags);
tp->rtk_enable_diag = 1;
- spin_unlock_irqrestore(&tp->lock, flags);
dprintk("enable rtk diag\n");
break;
case RTL_DISABLE_PCI_DIAG:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
- spin_lock_irqsave(&tp->lock, flags);
tp->rtk_enable_diag = 0;
- spin_unlock_irqrestore(&tp->lock, flags);
dprintk("disable rtk diag\n");
break;
case RTL_READ_MAC_OCP:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
if (my_cmd.offset % 2)
return -EOPNOTSUPP;
- spin_lock_irqsave(&tp->lock, flags);
my_cmd.data = rtl8125_mac_ocp_read(tp, my_cmd.offset);
- spin_unlock_irqrestore(&tp->lock, flags);
-
if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
ret = -EFAULT;
break;
@@ -281,25 +232,14 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
break;
case RTL_WRITE_MAC_OCP:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
if ((my_cmd.offset % 2) || (my_cmd.len != 2))
return -EOPNOTSUPP;
- spin_lock_irqsave(&tp->lock, flags);
rtl8125_mac_ocp_write(tp, my_cmd.offset, (u16)my_cmd.data);
- spin_unlock_irqrestore(&tp->lock, flags);
break;
case RTL_DIRECT_READ_PHY_OCP:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
- spin_lock_irqsave(&tp->lock, flags);
my_cmd.data = rtl8125_mdio_prot_direct_read_phy_ocp(tp, my_cmd.offset);
- spin_unlock_irqrestore(&tp->lock, flags);
-
if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
ret = -EFAULT;
break;
@@ -308,12 +248,7 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
break;
case RTL_DIRECT_WRITE_PHY_OCP:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
- spin_lock_irqsave(&tp->lock, flags);
rtl8125_mdio_prot_direct_write_phy_ocp(tp, my_cmd.offset, my_cmd.data);
- spin_unlock_irqrestore(&tp->lock, flags);
break;
default:
diff --git a/src/4.x/drivers/net/ethernet/realtek/r8125/rtltool.h b/src/4.x/drivers/net/ethernet/realtek/r8125/rtltool.h
old mode 100644
new mode 100755
index 16aa50697..a54f8e6ab
--- a/src/4.x/drivers/net/ethernet/realtek/r8125/rtltool.h
+++ b/src/4.x/drivers/net/ethernet/realtek/r8125/rtltool.h
@@ -1,3 +1,37 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+################################################################################
+#
+# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see .
+#
+# Author:
+# Realtek NIC software team
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ * This product is covered by one or more of the following patents:
+ * US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
#ifndef _LINUX_RTLTOOL_H
#define _LINUX_RTLTOOL_H