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How to set U280 QSFP pins? #201
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i'm also trying to do this and you can refer to this: #62 |
I'm working on migrating this project onto U55C, but I just got the board and haven't tried it yet. will let you know if I find any clue. |
@Nicole-H-u Hello, I am also having the issue with the wierd uart output. Did you manage to solve it? My guess is that is a main clk issue (porting the design to u280 and u55c for example) |
I am using U280, and I found the problem is not related to the soft core, but due to the some unknown problems on the board, so just flash the memory and the uart will be normal. Or email me at [email protected] |
Hello, can someone who implemented design on U280 please comment, how to handle IIC interface issue, as IIC interface is not available on board level in u280 unlike u250. For U250, no error reported: Create instance: IIC, and set propertiesset IIC [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_iic:2.1 IIC ] |
Hi, @eugene-tarassov
I am trying to use U280, but the QSFP pins of U280 is very different from those of U250(according to alveo-u280-xdc, u280 does not have qsfp0_fs[1:0], qsfp0_resetl, qsfp0_refclk_reset, qsfp0_modsell, and qsfp0_lpmode). I am not sure how to modify the constraints.
Here is the error I met:
First, I met error
Actually, I have tried to delete the undefined qsfp0_fs[1:0], qsfp0_resetl, qsfp0_refclk_reset, qsfp0_modsell, and qsfp0_lpmode,
but it seems causing other errors
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