@@ -632,6 +632,13 @@ void dcd_sof_enable(uint8_t rhport, bool en)
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#if TU_CHECK_MCU (OPT_MCU_ESP32S2 , OPT_MCU_ESP32S3 , OPT_MCU_ESP32P4 )
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+ // Reset opened IN/OUT opeded endpoint counter
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+ static void dcd_edpt_reset (uint8_t rhport )
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+ {
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+ dwc_ep_config [rhport ].in_ep = 0 ;
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+ dwc_ep_config [rhport ].out_ep = 0 ;
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+ }
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+
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// Check if IN/OUT endpoint is available before opening it
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static bool dcd_edpt_available (uint8_t rhport , uint8_t dir )
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{
@@ -671,7 +678,7 @@ static bool dcd_edpt_release(uint8_t rhport, uint8_t dir)
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}
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return true;
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}
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- #endif
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+ #endif // OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_ESP32P4
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bool dcd_edpt_open (uint8_t rhport , tusb_desc_endpoint_t const * desc_edpt )
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{
@@ -688,7 +695,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
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TU_LOG (1 , "No endpoints available (ep_max=%d) \r\n" , dwc_ep_config [rhport ].ep_max_count );
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return false;
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}
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- #endif
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+ #endif // OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_ESP32P4
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xfer_ctl_t * xfer = XFER_CTL_BASE (epnum , dir );
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xfer -> max_size = tu_edpt_packet_size (desc_edpt );
@@ -1290,6 +1297,9 @@ void dcd_int_handler(uint8_t rhport)
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// USBRST is start of reset.
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dwc2 -> gintsts = GINTSTS_USBRST ;
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bus_reset (rhport );
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+ #if TU_CHECK_MCU (OPT_MCU_ESP32S2 , OPT_MCU_ESP32S3 , OPT_MCU_ESP32P4 )
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+ dcd_edpt_reset (rhport );
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+ #endif // OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_ESP32P4
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}
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if (int_status & GINTSTS_ENUMDNE )
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