@@ -630,6 +630,27 @@ void dcd_sof_enable(uint8_t rhport, bool en)
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/* DCD Endpoint port
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*------------------------------------------------------------------*/
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+ // Check is IN/OUT endpoint is avaliable before opening it
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+ static bool dcd_edpt_check_if_avaliable (uint8_t rhport , uint8_t direction )
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+ {
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+ if (direction ) { // IN direction
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+ if (ep_avaliable_count [rhport ].in_ep < 1 ) {
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+ TU_LOG (1 , "Trying to open IN endpoint, but max number of IN endpoints already opened on this target \r\n" );
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+ return false;
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+ }
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+ } else { // OUT direction
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+ if (ep_avaliable_count [rhport ].out_ep < 1 ) {
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+ TU_LOG (1 , "Trying to open OUT endpoint, but max number of OUT endpoints already opened on this target \r\n" );
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+ return false;
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+ }
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+ }
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+
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+ ep_avaliable_count [rhport ].in_ep -- ;
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+ ep_avaliable_count [rhport ].out_ep -- ;
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+
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+ return true;
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+ }
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+
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bool dcd_edpt_open (uint8_t rhport , tusb_desc_endpoint_t const * desc_edpt )
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{
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(void ) rhport ;
@@ -640,7 +661,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
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uint8_t const epnum = tu_edpt_number (desc_edpt -> bEndpointAddress );
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uint8_t const dir = tu_edpt_dir (desc_edpt -> bEndpointAddress );
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- TU_ASSERT (epnum < ep_count );
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+ TU_ASSERT (dcd_edpt_check_if_avaliable ( rhport , dir ) );
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xfer_ctl_t * xfer = XFER_CTL_BASE (epnum , dir );
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xfer -> max_size = tu_edpt_packet_size (desc_edpt );
@@ -923,19 +944,6 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
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}
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}
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- void dcd_get_edpt_max_count (uint8_t rhport , uint8_t * in_edpt_max_count , uint8_t * out_edpt_max_count )
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- {
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- uint8_t const max_ep_count = _dwc2_controller [rhport ].ep_count ;
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-
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- #if TU_CHECK_MCU (OPT_MCU_ESP32S2 , OPT_MCU_ESP32S3 )
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- * in_edpt_max_count = max_ep_count - 1 ; // esp32Sx has only 5 IN endpoints
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- * out_edpt_max_count = max_ep_count ;
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- #else
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- * in_edpt_max_count = max_ep_count ;
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- * out_edpt_max_count = max_ep_count ;
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- #endif
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- }
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-
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/*------------------------------------------------------------------*/
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// Read a single data packet from receive FIFO
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