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feature(dcd): Check avaliable endpoints:
- get IN/OUT endpoints max count - check avaliable endpoints while opening them
1 parent ecc8c70 commit 3c141f2

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3 files changed

+45
-2
lines changed

3 files changed

+45
-2
lines changed

src/portable/synopsys/dwc2/dcd_dwc2.c

+22-1
Original file line numberDiff line numberDiff line change
@@ -630,6 +630,27 @@ void dcd_sof_enable(uint8_t rhport, bool en)
630630
/* DCD Endpoint port
631631
*------------------------------------------------------------------*/
632632

633+
// Check is IN/OUT endpoint is avaliable before opening it
634+
static bool dcd_edpt_check_if_avaliable(uint8_t rhport, uint8_t direction)
635+
{
636+
if (direction) { // IN direction
637+
if (ep_avaliable_count[rhport].in_ep < 1) {
638+
TU_LOG(1, "Trying to open IN endpoint, but max number of IN endpoints already opened on this target \r\n");
639+
return false;
640+
}
641+
} else { // OUT direction
642+
if (ep_avaliable_count[rhport].out_ep < 1) {
643+
TU_LOG(1, "Trying to open OUT endpoint, but max number of OUT endpoints already opened on this target \r\n");
644+
return false;
645+
}
646+
}
647+
648+
ep_avaliable_count[rhport].in_ep--;
649+
ep_avaliable_count[rhport].out_ep--;
650+
651+
return true;
652+
}
653+
633654
bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
634655
{
635656
(void) rhport;
@@ -640,7 +661,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
640661
uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress);
641662
uint8_t const dir = tu_edpt_dir(desc_edpt->bEndpointAddress);
642663

643-
TU_ASSERT(epnum < ep_count);
664+
TU_ASSERT(dcd_edpt_check_if_avaliable(rhport, dir));
644665

645666
xfer_ctl_t * xfer = XFER_CTL_BASE(epnum, dir);
646667
xfer->max_size = tu_edpt_packet_size(desc_edpt);

src/portable/synopsys/dwc2/dwc2_esp32.h

+17-1
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,7 @@
5555
#endif
5656

5757
#if DWC2_FS_PERIPH_BASE
58-
#define DWC2_FS_EP_MAX 6 // USB_OUT_EP_NUM. TODO ESP32Sx only has 5 tx fifo (5 endpoint IN)
58+
#define DWC2_FS_EP_MAX 6 // USB_OUT_EP_NUM
5959
#define DWC2_FS_EP_FIFO_SIZE 1024
6060
#endif
6161

@@ -82,6 +82,22 @@ static const dwc2_controller_t _dwc2_controller[] =
8282
#endif
8383
};
8484

85+
static ep_avaliable_count_t ep_avaliable_count[] =
86+
{
87+
#ifdef DWC2_FS_PERIPH_BASE
88+
// ESP32Sx has 6 endpoints, from which only 5 can be confiugred as IN
89+
#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
90+
{ .out_ep = DWC2_FS_EP_MAX, .in_ep = DWC2_FS_EP_MAX - 1},
91+
#else
92+
{ .out_ep = DWC2_FS_EP_MAX, .in_ep = DWC2_FS_EP_MAX},
93+
#endif
94+
#endif
95+
96+
#ifdef DWC2_HS_PERIPH_BASE
97+
{ .out_ep = DWC2_HS_EP_MAX, .in_ep = DWC2_HS_EP_MAX},
98+
#endif
99+
};
100+
85101
static intr_handle_t usb_ih[DWC2_PERIPH_COUNT];
86102

87103
static void dcd_int_handler_wrap(void* arg)

src/portable/synopsys/dwc2/dwc2_type.h

+6
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,12 @@ typedef struct
3232
uint32_t ep_fifo_size;
3333
}dwc2_controller_t;
3434

35+
typedef struct
36+
{
37+
int8_t out_ep;
38+
int8_t in_ep;
39+
}ep_avaliable_count_t;
40+
3541
/* DWC OTG HW Release versions */
3642
#define DWC2_CORE_REV_2_71a 0x4f54271a
3743
#define DWC2_CORE_REV_2_72a 0x4f54272a

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