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synth.def
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synth.def
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/* Recursively investigate all possible instruction sequences for the
current target.
SEQUENCE contains the instructions defined so far.
N_INSNS is the number of instructions, including the one we will
generate this time, in SEQUENCE.
VALUES contains the values in register 0..N_VALUES.
N_VALUES is the number of registers that have been assigned values by
the insns so far.
GOAL_VALUE is the value we aim at, when the sequence is ready.
ALLOWED_COST is the maximum allowed cost of the remaining sequence.
CY_IN is the carry flag. It is negative if no instruction has yet
defined it (this to pruning the search tree), and otherwise takes the
values 0 or 1 according to the conventions of the current target.
PRUNE_HINT contains flags to assist pruning of the search tree. */
#if SPARC || POWER || M88000 || AM29K || ALPHA || XCORE
void
MAKENAME(synth) (insn_t *sequence,
int n_insns,
word *values,
int n_values,
word goal_value,
int allowed_cost,
int ci,
int prune_hint)
{
int s1, s2;
word v, r1, r2;
int co;
int last_dest;
#ifdef TIMING
unsigned long time_start = cputime();
#endif
if (n_insns > 0)
last_dest = sequence[n_insns - 1].d;
else
last_dest = -1;
/* Binary operations with carry-in. */
if (ci >= 0 && flag_use_carry)
{
for (s1 = n_values - 1; s1 >= 0; s1--)
{
r1 = values[s1];
for (s2 = s1 - 1; s2 >= 0; s2--)
{
r2 = values[s2];
if (allowed_cost <= 1 && (prune_hint & CY_JUST_SET) == 0)
{
/* We are in a leaf node. CY was not set (to 0, 1 or to
a data dependent value) by the previous insn.
So one of the input operands has to be the result
operand of the previous insn for that insn to be
meaningful. */
if (last_dest >= 0 && s1 != last_dest && s2 != last_dest)
continue;
}
#if SPARC || POWER || M88000 || AM29K
/* sparc: addxcc
rs6000: ae
m88000: addu.cio
am29k: addc */
PERFORM_ADD_CIO(v, co, r1, r2, ci);
RECURSE(ADD_CIO, s1, s2, CY_JUST_SET);
#endif
#if SPARC || M88000
/* sparc: addx
m88000: addu.ci */
PERFORM_ADD_CI(v, co, r1, r2, ci);
RECURSE(ADD_CI, s1, s2, prune_hint & ~CY_JUST_SET);
#endif
#if SPARC
/* sparc: subxcc */
PERFORM_SUB_CIO(v, co, r1, r2, ci);
RECURSE(SUB_CIO, s1, s2, CY_JUST_SET);
PERFORM_SUB_CIO(v, co, r2, r1, ci);
RECURSE(SUB_CIO, s2, s1, CY_JUST_SET);
#endif
#if SPARC
/* sparc: subx */
PERFORM_SUB_CI(v, co, r1, r2, ci);
RECURSE(SUB_CI, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_SUB_CI(v, co, r2, r1, ci);
RECURSE(SUB_CI, s2, s1, prune_hint & ~CY_JUST_SET);
#endif
#if POWER || M88000 || AM29K
/* rs6000: sfe
m88000: subu.cio
am29k: subc */
PERFORM_ADC_CIO(v, co, r1, r2, ci);
RECURSE(ADC_CIO, s1, s2, CY_JUST_SET);
PERFORM_ADC_CIO(v, co, r2, r1, ci);
RECURSE(ADC_CIO, s2, s1, CY_JUST_SET);
#endif
#if M88000
/* m88000: subu.ci */
PERFORM_ADC_CI(v, co, r1, r2, ci);
RECURSE(ADC_CI, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_ADC_CI(v, co, r2, r1, ci);
RECURSE(ADC_CI, s2, s1, prune_hint & ~CY_JUST_SET);
#endif
}
}
}
/* Binary operations without carry-in. */
for (s1 = n_values - 1; s1 >= 0; s1--)
{
r1 = values[s1];
// TODO this should be s2 = s1 to shl d,s,1 <=> add d, s, s
for (s2 = s1 - 1; s2 >= 0; s2--)
{
r2 = values[s2];
if (allowed_cost <= 1)
{
/* We are in a leaf node.
So one of the input operands has to be the result operand
of the previous insn for that insn to be meaningful. */
if (last_dest >= 0 && s1 != last_dest && s2 != last_dest)
continue;
}
#ifdef DM
PERFORM_UMULWIDEN_HI(v, co, r1, r2, ci);
RECURSE(UMULWIDEN_HI, s1, s2, prune_hint & ~CY_JUST_SET);
#endif
#if defined (DM) || defined (MM)
PERFORM_MUL(v, co, r1, r2, ci);
RECURSE(MUL, s1, s2, prune_hint & ~CY_JUST_SET);
#endif
#ifdef UDIV_WITH_SDIV
PERFORM_SDIV (v, co, r1, r2, ci);
RECURSE(SDIV, s1, s2, prune_hint & ~CY_JUST_SET);
#endif
#if SPARC || POWER || M88000 || AM29K
/* sparc: addcc
rs6000: a
m88000: addu.co
am29k: add */
PERFORM_ADD_CO(v, co, r1, r2, ci);
RECURSE(ADD_CO, s1, s2, CY_JUST_SET);
#endif
#if SPARC || POWER || M88000 || ALPHA || XCORE
/* sparc: add
rs6000: cax
m88000: addu
alpha: addq */
PERFORM_ADD(v, co, r1, r2, ci);
RECURSE(ADD, s1, s2, prune_hint & ~CY_JUST_SET);
#endif
#if SPARC
/* sparc: subcc */
PERFORM_SUB_CO(v, co, r1, r2, ci);
RECURSE(SUB_CO, s1, s2, CY_JUST_SET);
PERFORM_SUB_CO(v, co, r2, r1, ci);
RECURSE(SUB_CO, s2, s1, CY_JUST_SET);
#endif
#if SPARC || POWERPC || M88000 || ALPHA || XCORE
/* sparc: sub
powerpc: subf
m88000: subu
alpha: subq */
PERFORM_SUB(v, co, r1, r2, ci);
RECURSE(SUB, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_SUB(v, co, r2, r1, ci);
RECURSE(SUB, s2, s1, prune_hint & ~CY_JUST_SET);
#endif
#if POWER || M88000 || AM29K
/* rs6000: sf
m88000: subu.co
am29k: sub */
PERFORM_ADC_CO(v, co, r1, r2, ci);
RECURSE(ADC_CO, s1, s2, CY_JUST_SET);
PERFORM_ADC_CO(v, co, r2, r1, ci);
RECURSE(ADC_CO, s2, s1, CY_JUST_SET);
#endif
#if SPARC || POWER || M88000 || AM29K || ALPHA || XCORE
PERFORM_AND(v, co, r1, r2, ci);
RECURSE(AND, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_IOR(v, co, r1, r2, ci);
RECURSE(IOR, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_XOR(v, co, r1, r2, ci);
RECURSE(XOR, s1, s2, prune_hint & ~CY_JUST_SET);
#endif
#if SPARC || POWER || M88000 || AM29K || ALPHA
PERFORM_ANDC(v, co, r1, r2, ci);
RECURSE(ANDC, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_ANDC(v, co, r2, r1, ci);
RECURSE(ANDC, s2, s1, prune_hint & ~CY_JUST_SET);
#endif
#if XCORE
PERFORM_LDA16F(v, co, r1, r2, ci);
RECURSE(LDA16F, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_LDA16F(v, co, r2, r1, ci);
RECURSE(LDA16F, s2, s1, prune_hint & ~CY_JUST_SET);
PERFORM_LDA16B(v, co, r1, r2, ci);
RECURSE(LDA16B, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_LDA16B(v, co, r2, r1, ci);
RECURSE(LDA16B, s2, s1, prune_hint & ~CY_JUST_SET);
PERFORM_LDAWF(v, co, r1, r2, ci);
RECURSE(LDAWF, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_LDAWF(v, co, r2, r1, ci);
RECURSE(LDAWF, s2, s1, prune_hint & ~CY_JUST_SET);
PERFORM_LDAWB(v, co, r1, r2, ci);
RECURSE(LDAWB, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_LDAWB(v, co, r2, r1, ci);
RECURSE(LDAWB, s2, s1, prune_hint & ~CY_JUST_SET);
PERFORM_ANDC(v, co, r1, r2, ci);
CRECURSE_2OP(ANDC, s1, s1, s2, 1, prune_hint & ~CY_JUST_SET);
PERFORM_ANDC(v, co, r2, r1, ci);
CRECURSE_2OP(ANDC, s2, s2, s1, 1, prune_hint & ~CY_JUST_SET);
#endif
#if SPARC || POWER || M88000 || ALPHA
PERFORM_IORC(v, co, r1, r2, ci);
RECURSE(IORC, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_IORC(v, co, r2, r1, ci);
RECURSE(IORC, s2, s1, prune_hint & ~CY_JUST_SET);
#endif
#if SPARC || POWER || M88000 || AM29K || ALPHA
PERFORM_EQV(v, co, r1, r2, ci);
RECURSE(EQV, s1, s2, prune_hint & ~CY_JUST_SET);
#endif
#if POWER || AM29K
PERFORM_NAND(v, co, r1, r2, ci);
RECURSE(NAND, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_NOR(v, co, r1, r2, ci);
RECURSE(NOR, s1, s2, prune_hint & ~CY_JUST_SET);
#endif
#if POWER && !defined (POWERPC)
PERFORM_DOZ(v, co, r1, r2, ci);
RECURSE(DOZ, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_DOZ(v, co, r2, r1, ci);
RECURSE(DOZ, s2, s1, prune_hint & ~CY_JUST_SET);
#endif
#if XCORE
PERFORM_ZEXT(v, co, r1, r2, ci);
CRECURSE_2OP(ZEXT, s1, s1, s2, 1, prune_hint & ~CY_JUST_SET);
PERFORM_ZEXT(v, co, r2, r1, ci);
CRECURSE_2OP(ZEXT, s2, s2, s1, 1, prune_hint & ~CY_JUST_SET);
PERFORM_SEXT(v, co, r1, r2, ci);
CRECURSE_2OP(SEXT, s1, s1, s2, 1, prune_hint & ~CY_JUST_SET);
PERFORM_SEXT(v, co, r2, r1, ci);
CRECURSE_2OP(SEXT, s2, s2, s1, 1, prune_hint & ~CY_JUST_SET);
#endif
#if AM29K
PERFORM_CPEQ(v, co, r1, r2, ci);
RECURSE(CPEQ, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_CPGE(v, co, r1, r2, ci);
RECURSE(CPGE, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_CPGEU(v, co, r1, r2, ci);
RECURSE(CPGEU, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_CPGT(v, co, r1, r2, ci);
RECURSE(CPGT, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_CPGTU(v, co, r1, r2, ci);
RECURSE(CPGTU, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_CPLE(v, co, r1, r2, ci);
RECURSE(CPLE, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_CPLEU(v, co, r1, r2, ci);
RECURSE(CPLEU, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_CPLT(v, co, r1, r2, ci);
RECURSE(CPLT, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_CPLTU(v, co, r1, r2, ci);
RECURSE(CPLTU, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_CPNEQ(v, co, r1, r2, ci);
RECURSE(CPNEQ, s1, s2, prune_hint & ~CY_JUST_SET);
#endif
#if ALPHA || XCORE
PERFORM_CMPEQ(v, co, r1, r2, ci);
RECURSE(CMPEQ, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_CMPLT(v, co, r1, r2, ci);
RECURSE(CMPLT, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_CMPLT(v, co, r2, r1, ci);
RECURSE(CMPLT, s2, s1, prune_hint & ~CY_JUST_SET);
PERFORM_CMPLTU(v, co, r1, r2, ci);
RECURSE(CMPLTU, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_CMPLTU(v, co, r2, r1, ci);
RECURSE(CMPLTU, s2, s1, prune_hint & ~CY_JUST_SET);
#endif
#if ALPHA
PERFORM_CMPLE(v, co, r1, r2, ci);
RECURSE(CMPLE, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_CMPLE(v, co, r2, r1, ci);
RECURSE(CMPLE, s2, s1, prune_hint & ~CY_JUST_SET);
PERFORM_CMPLEU(v, co, r1, r2, ci);
RECURSE(CMPLEU, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_CMPLEU(v, co, r2, r1, ci);
RECURSE(CMPLEU, s2, s1, prune_hint & ~CY_JUST_SET);
#endif
#if M88000
PERFORM_CMPPAR (v, co, r1, r2, ci);
RECURSE(CMPPAR, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_CMPPAR (v, co, r2, r1, ci);
RECURSE(CMPPAR, s2, s1, prune_hint & ~CY_JUST_SET);
#endif
#if SPARC || POWER || AM29K || ALPHA
/* ??? Does POWER really have shifts that truncate the count? */
/* ??? Should add these to other synth variants!! */
PERFORM_SHIFTL (v, co, r1, r2, ci);
RECURSE(SHIFTL, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_SHIFTL (v, co, r2, r1, ci);
RECURSE(SHIFTL, s2, s1, prune_hint & ~CY_JUST_SET);
PERFORM_LSHIFTR (v, co, r1, r2, ci);
RECURSE(LSHIFTR, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_LSHIFTR (v, co, r2, r1, ci);
RECURSE(LSHIFTR, s2, s1, prune_hint & ~CY_JUST_SET);
#endif
#if SPARC || AM29K || ALPHA
PERFORM_ASHIFTR (v, co, r1, r2, ci);
RECURSE(ASHIFTR, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_ASHIFTR (v, co, r2, r1, ci);
RECURSE(ASHIFTR, s2, s1, prune_hint & ~CY_JUST_SET);
#endif
#if POWER
PERFORM_ASHIFTR_CON (v, co, r1, r2, ci);
RECURSE(ASHIFTR_CON, s1, s2, CY_JUST_SET);
PERFORM_ASHIFTR_CON (v, co, r2, r1, ci);
RECURSE(ASHIFTR_CON, s2, s1, CY_JUST_SET);
#endif
#if XCORE
PERFORM_SHIFTL_NT (v, co, r1, r2, ci);
RECURSE(SHIFTL_NT, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_SHIFTL_NT (v, co, r2, r1, ci);
RECURSE(SHIFTL_NT, s2, s1, prune_hint & ~CY_JUST_SET);
PERFORM_LSHIFTR_NT (v, co, r1, r2, ci);
RECURSE(LSHIFTR_NT, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_LSHIFTR_NT (v, co, r2, r1, ci);
RECURSE(LSHIFTR_NT, s2, s1, prune_hint & ~CY_JUST_SET);
PERFORM_ASHIFTR_NT (v, co, r1, r2, ci);
RECURSE(ASHIFTR_NT, s1, s2, prune_hint & ~CY_JUST_SET);
PERFORM_ASHIFTR_NT (v, co, r2, r1, ci);
RECURSE(ASHIFTR_NT, s2, s1, prune_hint & ~CY_JUST_SET);
#endif
}
}
/* Unary operations with carry-in. */
if (ci >= 0 && flag_use_carry)
{
for (s1 = n_values - 1; s1 >= 0; s1--)
{
r1 = values[s1];
if (allowed_cost <= 1 && (prune_hint & CY_JUST_SET) == 0)
{
/* We are in a leaf node and CY was not set (to 1 or to a
data dependent value) by the previous insn.
The input operand has to be the result operand of the
previous insn for that insn to be meaningful. */
if (last_dest >= 0 && s1 != last_dest)
continue;
}
#if SPARC || POWER || M88000 || AM29K
/* d,cy = 2*r1 + cy
sparc: addxcc s1,s1,d
rs6000: ae d,s1,s1
m88000: addu.cio d,s1,s1
am29k: addc d,s1,s1 */
PERFORM_ADD_CIO(v, co, r1, r1, ci);
RECURSE(ADD_CIO, s1, s1, CY_JUST_SET);
#endif
#if SPARC || M88000
/* d = 2*r1 + cy
sparc: addx s1,s1,d
m88000: addu.ci d,s1,s1 */
PERFORM_ADD_CI(v, co, r1, r1, ci);
RECURSE(ADD_CI, s1, s1, prune_hint & ~CY_JUST_SET);
#endif
#if SPARC || POWER || M88000 || AM29K
/* d,cy = r1 + cy - 1
sparc: addxcc s1,-1,d
rs6000: ame d,s1
m88000: subu.cio d,s1,r0
am29k: subc d,s1,0 */
PERFORM_ADD_CIO(v, co, r1, VALUE(-1), ci);
RECURSE(ADD_CIO, s1, CNST(-1), CY_JUST_SET);
#endif
#if SPARC || POWER || M88000 || AM29K
/* d,cy = r1 + cy
sparc: addxcc s1,0,d
rs6000: aze d,s1
m88000: addu.cio d,s1,r0
am29k: addc d,s1,0 */
PERFORM_ADD_CIO(v, co, r1, VALUE(0), ci);
RECURSE(ADD_CIO, s1, CNST(0), CY_JUST_SET);
#endif
#if SPARC
/* d,cy = 0 - r1 - cy
sparc: subxcc %g0,s1,d */
PERFORM_SUB_CIO(v, co, VALUE(0), r1, ci);
RECURSE(SUB_CIO, CNST(0), s1, CY_JUST_SET);
#endif
#if SPARC
/* d = r1 + 1 - cy
sparc: subx s1,-1,d */
PERFORM_SUB_CI(v, co, r1, VALUE(-1), ci);
RECURSE(SUB_CI, s1, CNST(-1), prune_hint & ~CY_JUST_SET);
#endif
#if SPARC
/* d,cy = r1 + 1 - cy
sparc: subxcc s1,-1,d */
PERFORM_SUB_CIO(v, co, r1, VALUE(-1), ci);
RECURSE(SUB_CIO, s1, CNST(-1), CY_JUST_SET);
#endif
#if POWER
/* d,cy = -1 + ~r1 + cy
rs6000: sfme d,s1 */
PERFORM_ADC_CIO(v, co, VALUE(-1), r1, ci);
RECURSE(ADC_CIO, CNST(-1), s1, CY_JUST_SET);
#endif
#if POWER || M88000 || AM29K
/* d,cy = ~r1 + cy
m88000: subu.cio d,r0,s1
rs6000: sfze d,s1
am29k: subrc d,s1,0 */
PERFORM_ADC_CIO(v, co, VALUE(0), r1, ci);
RECURSE(ADC_CIO, CNST(0), s1, CY_JUST_SET);
#endif
}
}
/* Unary operations without carry-in. */
for (s1 = n_values - 1; s1 >= 0; s1--)
{
r1 = values[s1];
if (allowed_cost <= 1)
{
/* We are in a leaf node.
The input operand has to be the result operand of the
previous insns for that insn to be meaningful. */
if (last_dest >= 0 && s1 != last_dest)
continue;
}
#ifdef DM
PERFORM_INVDIV(v, co, r1, ci);
RECURSE(INVDIV, s1, 0, prune_hint & ~CY_JUST_SET);
PERFORM_INVMOD(v, co, r1, ci);
RECURSE(INVMOD, s1, 0, prune_hint & ~CY_JUST_SET);
#endif
#if SPARC || POWER || M88000 || AM29K
/* d,cy = 2*r1
sparc: addcc s1,s1,d
rs6000: a d,s1,s1
m88000: addu.co d,s1,s1
am29k: add d,s1,s1 */
PERFORM_ADD_CO(v, co, r1, r1, ci);
RECURSE(ADD_CO, s1, s1, CY_JUST_SET);
#endif
#if SPARC || POWER || M88000 || AM29K || ALPHA
/* d = r1 & 1
sparc: and s1,1,d
rs6000: rlinm d,s1,0,31,31
m88000: mask d,s1,1
am29k: and d,s1,1
alpha: and s1,1,d */
PERFORM_AND(v, co, r1, VALUE(1), ci);
RECURSE(AND, s1, CNST(1), prune_hint & ~CY_JUST_SET);
#endif
#if XCORE
/* xcore: zext s1, 1 */
PERFORM_AND(v, co, r1, VALUE(1), ci);
CRECURSE_2OP(AND, s1, s1, CNST(1), 1, prune_hint & ~CY_JUST_SET);
/* xcore: sext s1, 1 */
PERFORM_SEXT(v, co, r1, VALUE(1), ci);
CRECURSE_2OP(SEXT, s1, s1, CNST(1), 1, prune_hint & ~CY_JUST_SET);
#endif
#if POWER || M88000
/* d = r1 & 0x80000000
rs6000: rlinm d,s1,0,0,0
m88000: mask.u d,s1,0x8000 */
PERFORM_AND(v, co, r1, VALUE_MIN_SIGNED, ci);
RECURSE(AND, s1, CNST_0x80000000, prune_hint & ~CY_JUST_SET);
/* d = r1 & 0x7fffffff
rs6000: rlinm d,s1,0,1,31
m88000: and.u d,s1,0x7fff */
PERFORM_AND(v, co, r1, VALUE_MAX_SIGNED, ci);
RECURSE(AND, s1, CNST_0x7FFFFFFF, prune_hint & ~CY_JUST_SET);
#endif
#if POWER || M88000
PERFORM_XOR(v, co, r1, VALUE_MIN_SIGNED, ci);
RECURSE(XOR, s1, CNST_0x80000000, prune_hint & ~CY_JUST_SET);
PERFORM_IOR(v, co, r1, VALUE_MIN_SIGNED, ci);
RECURSE(IOR, s1, CNST_0x80000000, prune_hint & ~CY_JUST_SET);
#endif
#if SPARC || POWER || M88000 || AM29K || ALPHA
/* d = r1 ^ 1
sparc: xor s1,1,d
rs6000: xoril d,s1,1
m88000: xor d,s1,1
am29k: xor d,s1,1
alpha: xor s1,1,d */
PERFORM_XOR(v, co, r1, VALUE(1), ci);
RECURSE(XOR, s1, CNST(1), prune_hint & ~CY_JUST_SET);
#endif
#if SPARC || POWER || M88000 || AM29K || ALPHA || XCORE
/* d = ~r1
sparc: xnor %g0,s1,d
rs6000: nand d,s1,s1
m88000: xor.c d,s1,r0
am29k: nand d,s1,s1
alpha: ornot $31,s1,d
xcore: not d,s1 */
PERFORM_SUB(v, co, VALUE(-1), r1, ci);
RECURSE(SUB, CNST(-1), s1, prune_hint & ~CY_JUST_SET);
#endif
#if POWER
/* d,cy = -1 + ~r1 + 1 (i.e. one's complement and set carry.)
rs6000: sfi d,s1,-1 */
PERFORM_ADC_CO(v, co, VALUE(-1), r1, ci);
RECURSE(ADC_CO, CNST(-1), s1, CY_JUST_SET | CY_1);
#endif
#if SPARC || POWER || AM29K
/* d,cy = r1 + 1
sparc: addcc s1,1,d
rs6000: ai d,s1,1
am29k: add d,s1,1 */
PERFORM_ADD_CO(v, co, r1, VALUE(1), ci);
RECURSE(ADD_CO, s1, CNST(1), CY_JUST_SET);
#endif
#if SPARC || POWER || M88000 || ALPHA || XCORE
/* d = r1 + 1
sparc: add s1,1,d
rs6000: cal d,1(s1)
m88000: addu d,s1,1
alpha: addq s1,1,d */
PERFORM_ADD(v, co, r1, VALUE(1), ci);
RECURSE(ADD, s1, CNST(1), prune_hint & ~CY_JUST_SET);
#endif
#if 0 && POWER /* This has the same effect as a "xoriu". */
/* d = r1 + 0x80000000
rs6000: cau d,s1,0x8000 */
PERFORM_ADD(v, co, r1, VALUE_MIN_SIGNED, ci);
RECURSE(ADD, s1, CNST_0x80000000, CY_JUST_SET);
#endif
#if SPARC || POWER || AM29K /* not M88000 */
/* d,cy = r1 + -1
sparc: addcc s1,-1,d
rs6000: ai d,s1,-1
am29k: sub d,s1,1 */
PERFORM_ADD_CO(v, co, r1, VALUE(-1), ci);
RECURSE(ADD_CO, s1, CNST(-1), CY_JUST_SET);
#endif
#if SPARC || POWER || M88000 || ALPHA || XCORE
/* d = r1 + -1
sparc: sub s1,1,d
rs6000: cal d,-1(s1)
m88000: subu d,s1,1
alpha: subq s1,1,d
xcore: sub d,s1,1 */
PERFORM_ADD(v, co, r1, VALUE(-1), ci);
RECURSE(ADD, s1, CNST(-1), prune_hint & ~CY_JUST_SET);
#endif
#if SPARC
/* d,cy = r1 - 1. [This isn't redundant, in spite we add -1 above.]
sparc: subcc s1,1,d */
PERFORM_SUB_CO(v, co, r1, VALUE(1), ci);
RECURSE(SUB_CO, s1, CNST(1), CY_JUST_SET);
#endif
#if SPARC
/* d,cy = -r1
sparc: subcc %g0,s1,d */
PERFORM_SUB_CO(v, co, VALUE(0), r1, ci);
RECURSE(SUB_CO, CNST(0), s1, CY_JUST_SET);
#endif
#if SPARC || POWER || M88000 || ALPHA || XCORE
/* d = -r1
sparc: sub %g0,s1,d
rs6000: neg d,s1
m88000: subu d,r0,s1
alpha: subq $31,s1,d
xcore: neg d,s1 */
PERFORM_SUB(v, co, VALUE(0), r1, ci);
RECURSE(SUB, CNST(0), s1, prune_hint & ~CY_JUST_SET);
#endif
#if POWER || M88000 || AM29K
/* d,cy = -r1
rs6000: sf d,s1,0
m88000: subu.co d,r0,s1
am29k: subr d,s1,0 */
PERFORM_ADC_CO(v, co, VALUE(0), r1, ci);
RECURSE(ADC_CO, CNST(0), s1, CY_JUST_SET);
#endif
#if POWER && !defined (POWERPC)
/* d = abs(r1)
rs6000: abs d,s1 */
PERFORM_ABSVAL(v, co, r1, ci);
RECURSE(ABSVAL, s1, 0, prune_hint & ~CY_JUST_SET);
/* d = -abs(r1)
rs6000: nabs d,s1 */
PERFORM_NABSVAL(v, co, r1, ci);
RECURSE(NABSVAL, s1, 0, prune_hint & ~CY_JUST_SET);
#endif
#if POWER && !defined (POWERPC)
PERFORM_DOZ(v, co, VALUE(0), r1, ci);
RECURSE(DOZ, CNST(0), s1, prune_hint & ~CY_JUST_SET);
PERFORM_DOZ(v, co, VALUE(-1), r1, ci);
RECURSE(DOZ, CNST(-1), s1, prune_hint & ~CY_JUST_SET);
#endif
#if SPARC || POWER || M88000 || AM29K || ALPHA
{
int cnt;
for (cnt = 1; cnt < BITS_PER_WORD; cnt += (flag_shifts ? 1 : BITS_PER_WORD - 2))
{
#if SPARC || POWER || M88000 || AM29K || ALPHA
PERFORM_LSHIFTR(v, co, r1, VALUE(cnt), ci);
RECURSE(LSHIFTR, s1, CNST(cnt), prune_hint & ~CY_JUST_SET);
#endif
#if SPARC || M88000 || AM29K || ALPHA
PERFORM_ASHIFTR(v, co, r1, VALUE(cnt), ci);
RECURSE(ASHIFTR, s1, CNST(cnt), prune_hint & ~CY_JUST_SET);
#endif
#if POWER
PERFORM_ASHIFTR_CON(v, co, r1, VALUE(cnt), ci);
RECURSE(ASHIFTR_CON, s1, CNST(cnt), CY_JUST_SET);
#endif
#if SPARC || POWER || M88000 || AM29K || ALPHA
PERFORM_SHIFTL(v, co, r1, VALUE(cnt), ci);
RECURSE(SHIFTL, s1, CNST(cnt), prune_hint & ~CY_JUST_SET);
#endif
#if POWER || M88000
PERFORM_ROTATEL(v, co, r1, VALUE(cnt), ci);
RECURSE(ROTATEL, s1, CNST(cnt), prune_hint & ~CY_JUST_SET);
#endif
}
}
#endif
#if XCORE
{
int cnt;
static unsigned int shift_tab[] = { 1, 2, 3, 4, 5, 6, 7, 8, 16, 24 };
for (cnt = 0; cnt < (flag_shifts ? 10 : 1); cnt++)
{
PERFORM_LSHIFTR_NT(v, co, r1, VALUE(shift_tab[cnt]), ci);
RECURSE(LSHIFTR_NT, s1, CNST(shift_tab[cnt]), prune_hint & ~CY_JUST_SET);
PERFORM_ASHIFTR_NT(v, co, r1, VALUE(shift_tab[cnt]), ci);
RECURSE(ASHIFTR_NT, s1, CNST(shift_tab[cnt]), prune_hint & ~CY_JUST_SET);
PERFORM_SHIFTL_NT(v, co, r1, VALUE(shift_tab[cnt]), ci);
RECURSE(SHIFTL_NT, s1, CNST(shift_tab[cnt]), prune_hint & ~CY_JUST_SET);
}
}
PERFORM_ASHIFTR_NT(v, co, r1, VALUE(BITS_PER_WORD - 1), ci);
RECURSE(ASHIFTR_NT, s1, CNST(BITS_PER_WORD - 1), prune_hint & ~CY_JUST_SET);
#endif
#if M88000
if (flag_extracts)
{
int cnt;
/* Loop to 30, not 31, since 31 would generate operations
identical to shifts by 31. */
for (cnt = 1; cnt < BITS_PER_WORD - 1; cnt++)
{
PERFORM_EXTS1(v, co, r1, VALUE(cnt), ci);
RECURSE(EXTS1, s1, CNST(cnt), prune_hint & ~CY_JUST_SET);
PERFORM_EXTU1(v, co, r1, VALUE(cnt), ci);
RECURSE(EXTU1, s1, CNST(cnt), prune_hint & ~CY_JUST_SET);
}
/* Loop to 29, not 31, since 30 and 31 would generate operations
identical to shifts by 30 and 31. */
for (cnt = 1; cnt < BITS_PER_WORD - 2; cnt++)
{
PERFORM_EXTS2(v, co, r1, VALUE(cnt), ci);
RECURSE(EXTS2, s1, CNST(cnt), prune_hint & ~CY_JUST_SET);
PERFORM_EXTU2(v, co, r1, VALUE(cnt), ci);
RECURSE(EXTU2, s1, CNST(cnt), prune_hint & ~CY_JUST_SET);
}
}
#endif
#if AM29K
PERFORM_CPEQ(v, co, r1, VALUE(0), ci);
RECURSE(CPEQ, s1, CNST(0), prune_hint & ~CY_JUST_SET);
PERFORM_CPGE(v, co, r1, VALUE(0), ci);
RECURSE(CPGE, s1, CNST(0), prune_hint & ~CY_JUST_SET);
PERFORM_CPGEU(v, co, r1, VALUE(0), ci);
RECURSE(CPGEU, s1, CNST(0), prune_hint & ~CY_JUST_SET);
PERFORM_CPGT(v, co, r1, VALUE(0), ci);
RECURSE(CPGT, s1, CNST(0), prune_hint & ~CY_JUST_SET);
PERFORM_CPGTU(v, co, r1, VALUE(0), ci);
RECURSE(CPGTU, s1, CNST(0), prune_hint & ~CY_JUST_SET);
PERFORM_CPLE(v, co, r1, VALUE(0), ci);
RECURSE(CPLE, s1, CNST(0), prune_hint & ~CY_JUST_SET);
PERFORM_CPLEU(v, co, r1, VALUE(0), ci);
RECURSE(CPLEU, s1, CNST(0), prune_hint & ~CY_JUST_SET);
PERFORM_CPLT(v, co, r1, VALUE(0), ci);
RECURSE(CPLT, s1, CNST(0), prune_hint & ~CY_JUST_SET);
PERFORM_CPLTU(v, co, r1, VALUE(0), ci);
RECURSE(CPLTU, s1, CNST(0), prune_hint & ~CY_JUST_SET);
PERFORM_CPNEQ(v, co, r1, VALUE(0), ci);
RECURSE(CPNEQ, s1, CNST(0), prune_hint & ~CY_JUST_SET);
#endif
#if ALPHA || XCORE
PERFORM_CMPEQ(v, co, r1, VALUE(0), ci);
RECURSE(CMPEQ, s1, CNST(0), prune_hint & ~CY_JUST_SET);
#endif
#if ALPHA
PERFORM_CMPLE(v, co, r1, VALUE(0), ci);
RECURSE(CMPLE, s1, CNST(0), prune_hint & ~CY_JUST_SET);
PERFORM_CMPLE(v, co, VALUE(0), r1, ci);
RECURSE(CMPLE, CNST(0), s1, prune_hint & ~CY_JUST_SET);
PERFORM_CMPLEU(v, co, r1, VALUE(0), ci);
RECURSE(CMPLEU, s1, CNST(0), prune_hint & ~CY_JUST_SET);
/* PERFORM_CMPLEU(v, co, VALUE(0), r1, ci); == 1 */
/* RECURSE(CMPLEU, CNST(0), s1, prune_hint & ~CY_JUST_SET); */
/* PERFORM_CMPLT(v, co, r1, VALUE(0), ci); == srl r,63,d */
/* RECURSE(CMPLT, s1, CNST(0), prune_hint & ~CY_JUST_SET); */
PERFORM_CMPLT(v, co, VALUE(0), r1, ci);
RECURSE(CMPLT, CNST(0), s1, prune_hint & ~CY_JUST_SET);
/* PERFORM_CMPLTU(v, co, r1, VALUE(0), ci); == 0 */
/* RECURSE(CMPLTU, s1, CNST(0), prune_hint & ~CY_JUST_SET); */
PERFORM_CMPLTU(v, co, VALUE(0), r1, ci);
RECURSE(CMPLTU, CNST(0), s1, prune_hint & ~CY_JUST_SET);
#endif
#if POWER || AM29K || XCORE
PERFORM_CLZ(v, co, r1, ci);
RECURSE(CLZ, s1, 0, prune_hint & ~CY_JUST_SET);
#endif
#if XCORE
PERFORM_BITREV(v, co, r1, ci);
RECURSE(BITREV, s1, 0, prune_hint & ~CY_JUST_SET);
PERFORM_BYTEREV(v, co, r1, ci);
RECURSE(BYTEREV, s1, 0, prune_hint & ~CY_JUST_SET);
PERFORM_MKMSK(v, co, r1, ci);
RECURSE(MKMSK, s1, 0, prune_hint & ~CY_JUST_SET);
#endif
#if M88000
PERFORM_FF1(v, co, r1, ci);
RECURSE(FF1, s1, 0, prune_hint & ~CY_JUST_SET);
#endif
#if M88000
PERFORM_CMPPAR (v, co, r1, VALUE(0), ci);
RECURSE(CMPPAR, s1, CNST(0), prune_hint & ~CY_JUST_SET);
PERFORM_CMPPAR (v, co, VALUE(0), r1, ci);
RECURSE(CMPPAR, CNST(0), s1, prune_hint & ~CY_JUST_SET);
#endif
#if ALPHA /* Copy register->register because of cmov. */
/* d = r1
alpha: bis r1,r1,d */
PERFORM_COPY(v, co, r1, ci);
RECURSE(COPY, s1, 0, prune_hint & ~CY_JUST_SET);
#endif
}
#if ALPHA
/* Alpha conditional move instructions need special treatment. We let all
other instructions assign the next higher-numbered register, but we
can't do that here since cmov insns leave the register unchanged if the
instruction condition is not satisfied. Instead we let the cmov
instructions non-deterministically overwrite all already-defined
registers. */
for (s1 = n_values - 1; s1 >= 0; s1--)
{
r1 = values[s1];
for (s2 = s1 - 1; s2 >= 0; s2--)
{
int dr;
r2 = values[s2];
for (dr = n_values - 1; dr >= 0; dr--)
{
if (allowed_cost <= 1)
{
/* We are in a leaf node. */
/* One of the input operands has to be the result operand
of the previous insn for that insn to be meaningful.
For CMOVE, we have to consider the destination as an input
operand, since its result is not dying here. */
if (last_dest >= 0
&& s1 != last_dest && s2 != last_dest && dr != last_dest)
continue;
}
v = values[dr];
PERFORM_CMOVEQ (v, co, r1, r2, ci);
CRECURSE_2OP(CMOVEQ, dr, s1, s2, 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVEQ (v, co, r2, r1, ci);
CRECURSE_2OP(CMOVEQ, dr, s2, s1, 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVNE (v, co, r1, r2, ci);
CRECURSE_2OP(CMOVNE, dr, s1, s2, 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVNE (v, co, r2, r1, ci);
CRECURSE_2OP(CMOVNE, dr, s2, s1, 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVLT (v, co, r1, r2, ci);
CRECURSE_2OP(CMOVLT, dr, s1, s2, 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVLT (v, co, r2, r1, ci);
CRECURSE_2OP(CMOVLT, dr, s2, s1, 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVGE (v, co, r1, r2, ci);
CRECURSE_2OP(CMOVGE, dr, s1, s2, 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVGE (v, co, r2, r1, ci);
CRECURSE_2OP(CMOVGE, dr, s2, s1, 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVLE (v, co, r1, r2, ci);
CRECURSE_2OP(CMOVLE, dr, s1, s2, 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVLE (v, co, r2, r1, ci);
CRECURSE_2OP(CMOVLE, dr, s2, s1, 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVGT (v, co, r1, r2, ci);
CRECURSE_2OP(CMOVGT, dr, s1, s2, 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVGT (v, co, r2, r1, ci);
CRECURSE_2OP(CMOVGT, dr, s2, s1, 1, prune_hint & ~CY_JUST_SET);
}
}
}
for (s1 = n_values - 1; s1 >= 0; s1--)
{
int dr;
r1 = values[s1];
for (dr = n_values - 1; dr >= 0; dr--)
{
if (allowed_cost <= 1)
{
/* We are in a leaf node.
The input operand has to be the result operand of the
previous insns for that insn to be meaningful.
For CMOVE, we have to consider the destination as an input
operand, since its result is not dying here. */
if (last_dest >= 0 && s1 != last_dest && dr != last_dest)
continue;
}
v = values[dr];
PERFORM_CMOVEQ (v, co, r1, VALUE(0), ci);
CRECURSE_2OP(CMOVEQ, dr, s1, CNST(0), 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVNE (v, co, r1, VALUE(0), ci);
CRECURSE_2OP(CMOVNE, dr, s1, CNST(0), 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVLT (v, co, r1, VALUE(0), ci);
CRECURSE_2OP(CMOVLT, dr, s1, CNST(0), 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVGE (v, co, r1, VALUE(0), ci);
CRECURSE_2OP(CMOVGE, dr, s1, CNST(0), 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVLE (v, co, r1, VALUE(0), ci);
CRECURSE_2OP(CMOVLE, dr, s1, CNST(0), 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVGT (v, co, r1, VALUE(0), ci);
CRECURSE_2OP(CMOVGT, dr, s1, CNST(0), 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVEQ (v, co, r1, VALUE(1), ci);
CRECURSE_2OP(CMOVEQ, dr, s1, CNST(1), 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVNE (v, co, r1, VALUE(1), ci);
CRECURSE_2OP(CMOVNE, dr, s1, CNST(1), 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVLT (v, co, r1, VALUE(1), ci);
CRECURSE_2OP(CMOVLT, dr, s1, CNST(1), 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVGE (v, co, r1, VALUE(1), ci);
CRECURSE_2OP(CMOVGE, dr, s1, CNST(1), 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVLE (v, co, r1, VALUE(1), ci);
CRECURSE_2OP(CMOVLE, dr, s1, CNST(1), 1, prune_hint & ~CY_JUST_SET);
v = values[dr];
PERFORM_CMOVGT (v, co, r1, VALUE(1), ci);
CRECURSE_2OP(CMOVGT, dr, s1, CNST(1), 1, prune_hint & ~CY_JUST_SET);
}
}
#endif /* ALPHA */
/* 0-ary instructions, just dependent on carry. */
if (ci >= 0 && flag_use_carry
&& (allowed_cost <= 1 ? ((prune_hint & CY_JUST_SET) != 0) : 1))
{
/* We don't do "0 - 1 - cy" or "0 + 1 + cy" here. It would
probably give very few new sequences. */
#if SPARC || M88000
/* d = cy.
sparc: addx %g0,0,d
m88000: addu.ci d,r0,r0 */
PERFORM_ADD_CI(v, co, VALUE(0), VALUE(0), ci);
RECURSE(ADD_CI, CNST(0), CNST(0), prune_hint & ~CY_JUST_SET);
#endif
#if SPARC || M88000
/* d = cy, cy = 0.
sparc: addxcc %g0,0,d
m88000: addu.cio d,r0,r0 */
PERFORM_ADD_CIO(v, co, VALUE(0), VALUE(0), ci);
RECURSE(ADD_CIO, CNST(0), CNST(0), CY_JUST_SET | CY_0);
#endif
#if SPARC
/* Using SUB_CIO instead would make no difference.
It'd just set carry to it's old value. */
/* d = -cy.
sparc: subx %g0,0,d */
PERFORM_SUB_CI(v, co, VALUE(0), VALUE(0), ci);
RECURSE(SUB_CI, CNST(0), CNST(0), prune_hint & ~CY_JUST_SET);
#endif
#if SPARC
/* d = 1 - cy.
sparc: subx %g0,-1,d */
PERFORM_SUB_CI(v, co, VALUE(0), VALUE(-1), ci);
RECURSE(SUB_CI, CNST(0), CNST(-1), CY_JUST_SET | CY_1);
#endif
#if SPARC
/* d = 1 - cy, cy = 1.
sparc: subxcc %g0,-1,d */
PERFORM_SUB_CIO(v, co, VALUE(0), VALUE(-1), ci);
RECURSE(SUB_CIO, CNST(0), CNST(-1), CY_JUST_SET | CY_1);
#endif
#if SPARC
/* Using ADD_CIO instead would make no difference.
It'd just set carry to it's old value. */
/* d = -1 + cy.
sparc: addx %g0,-1,d */
PERFORM_ADD_CI(v, co, VALUE(0), VALUE(-1), ci);
RECURSE(ADD_CI, CNST(0), CNST(-1), prune_hint & ~CY_JUST_SET);
#endif
#if POWER || AM29K /* Use subu.ci on 88k instead with same result */
/* d = -1 + cy, cy = cy
rs6000: sfe d,d,d
am29k: subc d,d,d */
PERFORM_ADC_CIO(v, co, VALUE(0), VALUE(0), ci);
RECURSE(ADC_CIO, n_values, n_values, prune_hint & ~CY_JUST_SET);
#endif
#if M88000
/* d = -1 + cy
m88000: subu.ci d,r0,r0 */
PERFORM_ADC_CI(v, co, VALUE(0), VALUE(0), ci);
RECURSE(ADC_CI, CNST(0), CNST(0), prune_hint & ~CY_JUST_SET);
#endif
}
/* Move instructions.
Don't do this if we are just permitted to do one more instruction. */
if (allowed_cost > 1)
{
#if SPARC || POWER || M88000 || AM29K
/* d = 0x80000000
sparc: sethi %hi(0x80000000),d
rs6000: liu d,0x8000
m88000: or.u d,r0,0x8000
am29k: cpeq d,gr1,gr1 */
PERFORM_COPY(v, co, VALUE_MIN_SIGNED, ci);
RECURSE(COPY, CNST_0x80000000, 0, prune_hint & ~CY_JUST_SET);
#endif
#if SPARC || POWER || M88000 || AM29K || ALPHA || XCORE
/* d = -1
sparc: mov -1,d
rs6000: lil d,-1
m88000: subu d,r0,1
am29k: constn d,1
alpha: lda d,-1
xcore: mkmsk d,32 */
PERFORM_COPY(v, co, VALUE(-1), ci);
RECURSE(COPY, CNST(-1), 0, prune_hint & ~CY_JUST_SET);