diff --git a/src/nesper/esp/driver/esp32/io_mux_reg.nim b/src/nesper/esp/driver/esp32/io_mux_reg.nim index 947554d..8e264f7 100644 --- a/src/nesper/esp/driver/esp32/io_mux_reg.nim +++ b/src/nesper/esp/driver/esp32/io_mux_reg.nim @@ -1,6 +1,7 @@ ### # ESP32 specific io_mux_reg.h port ## +arsoienieonrstg const hdr = "soc/io_mux_reg.h" diff --git a/src/nesper/esp/driver/esp32c3/io_mux_reg.h b/src/nesper/esp/driver/esp32c3/io_mux_reg.h new file mode 100644 index 0000000..704ea17 --- /dev/null +++ b/src/nesper/esp/driver/esp32c3/io_mux_reg.h @@ -0,0 +1,551 @@ +/* +// + * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD +// + * +// + * SPDX-License-Identifier: Apache-2.0 +// + */ +// +#ifndef _SOC_IO_MUX_REG_H_ +// +#define _SOC_IO_MUX_REG_H_ +// + +// +#include "soc.h" +// + +// +///* The following are the bit fields for PERIPHS_IO_MUX_x_U registers */ +// +///* Output enable in sleep mode */ +// +// +// +// +// +// +// +#define SLP_OE (BIT(0)) +// +#define SLP_OE_M (BIT(0)) +// +#define SLP_OE_V 1 +// +#define SLP_OE_S 0 +// +/* Pin used for wakeup from sleep */ +// +#define SLP_SEL (BIT(1)) +// +#define SLP_SEL_M (BIT(1)) +// +#define SLP_SEL_V 1 +// +#define SLP_SEL_S 1 +// +/* Pulldown enable in sleep mode */ +// +#define SLP_PD (BIT(2)) +// +#define SLP_PD_M (BIT(2)) +// +#define SLP_PD_V 1 +// +#define SLP_PD_S 2 +// +/* Pullup enable in sleep mode */ +// +#define SLP_PU (BIT(3)) +// +#define SLP_PU_M (BIT(3)) +// +#define SLP_PU_V 1 +// +#define SLP_PU_S 3 +// +/* Input enable in sleep mode */ +// +#define SLP_IE (BIT(4)) +// +#define SLP_IE_M (BIT(4)) +// +#define SLP_IE_V 1 +// +#define SLP_IE_S 4 +// +/* Drive strength in sleep mode */ +// +#define SLP_DRV 0x3 +// +#define SLP_DRV_M (SLP_DRV_V << SLP_DRV_S) +// +#define SLP_DRV_V 0x3 +// +#define SLP_DRV_S 5 +// +/* Pulldown enable */ +// +#define FUN_PD (BIT(7)) +// +#define FUN_PD_M (BIT(7)) +// +#define FUN_PD_V 1 +// +#define FUN_PD_S 7 +// +/* Pullup enable */ +// +#define FUN_PU (BIT(8)) +// +#define FUN_PU_M (BIT(8)) +// +#define FUN_PU_V 1 +// +#define FUN_PU_S 8 +// +/* Input enable */ +// +#define FUN_IE (BIT(9)) +// +#define FUN_IE_M (FUN_IE_V << FUN_IE_S) +// +#define FUN_IE_V 1 +// +#define FUN_IE_S 9 +// +/* Drive strength */ +// +#define FUN_DRV 0x3 +// +#define FUN_DRV_M (FUN_DRV_V << FUN_DRV_S) +// +#define FUN_DRV_V 0x3 +// +#define FUN_DRV_S 10 +// +/* Function select (possible values are defined for each pin as FUNC_pinname_function below) */ +// +#define MCU_SEL 0x7 +// +#define MCU_SEL_M (MCU_SEL_V << MCU_SEL_S) +// +#define MCU_SEL_V 0x7 +// +#define MCU_SEL_S 12 +// +/* Pin filter (Pulse width shorter than 2 clock cycles will be filtered out) */ +// +#define FILTER_EN (BIT(15)) +// +#define FILTER_EN_M (FILTER_EN_V << FILTER_EN_S) +// +#define FILTER_EN_V 1 +// +#define FILTER_EN_S 15 +// + +// +#define PIN_SLP_INPUT_ENABLE(PIN_NAME) SET_PERI_REG_MASK(PIN_NAME,SLP_IE) +// +#define PIN_SLP_INPUT_DISABLE(PIN_NAME) CLEAR_PERI_REG_MASK(PIN_NAME,SLP_IE) +// +#define PIN_SLP_OUTPUT_ENABLE(PIN_NAME) SET_PERI_REG_MASK(PIN_NAME,SLP_OE) +// +#define PIN_SLP_OUTPUT_DISABLE(PIN_NAME) CLEAR_PERI_REG_MASK(PIN_NAME,SLP_OE) +// +#define PIN_SLP_PULLUP_ENABLE(PIN_NAME) SET_PERI_REG_MASK(PIN_NAME,SLP_PU) +// +#define PIN_SLP_PULLUP_DISABLE(PIN_NAME) CLEAR_PERI_REG_MASK(PIN_NAME,SLP_PU) +// +#define PIN_SLP_PULLDOWN_ENABLE(PIN_NAME) SET_PERI_REG_MASK(PIN_NAME,SLP_PD) +// +#define PIN_SLP_PULLDOWN_DISABLE(PIN_NAME) CLEAR_PERI_REG_MASK(PIN_NAME,SLP_PD) +// +#define PIN_SLP_SEL_ENABLE(PIN_NAME) SET_PERI_REG_MASK(PIN_NAME,SLP_SEL) +// +#define PIN_SLP_SEL_DISABLE(PIN_NAME) CLEAR_PERI_REG_MASK(PIN_NAME,SLP_SEL) +// + +// + +// +#define PIN_INPUT_ENABLE(PIN_NAME) SET_PERI_REG_MASK(PIN_NAME,FUN_IE) +// +#define PIN_INPUT_DISABLE(PIN_NAME) CLEAR_PERI_REG_MASK(PIN_NAME,FUN_IE) +// +#define PIN_SET_DRV(PIN_NAME, drv) REG_SET_FIELD(PIN_NAME, FUN_DRV, (drv)); +// +#define PIN_PULLUP_DIS(PIN_NAME) REG_CLR_BIT(PIN_NAME, FUN_PU) +// +#define PIN_PULLUP_EN(PIN_NAME) REG_SET_BIT(PIN_NAME, FUN_PU) +// +#define PIN_PULLDWN_DIS(PIN_NAME) REG_CLR_BIT(PIN_NAME, FUN_PD) +// +#define PIN_PULLDWN_EN(PIN_NAME) REG_SET_BIT(PIN_NAME, FUN_PD) +// +#define PIN_FUNC_SELECT(PIN_NAME, FUNC) REG_SET_FIELD(PIN_NAME, MCU_SEL, FUNC) +// +#define PIN_FILTER_EN(PIN_NAME) REG_SET_BIT(PIN_NAME, FILTER_EN) +// +#define PIN_FILTER_DIS(PIN_NAME) REG_CLR_BIT(PIN_NAME, FILTER_EN) +// + +// +#define IO_MUX_GPIO0_REG PERIPHS_IO_MUX_XTAL_32K_P_U +// +#define IO_MUX_GPIO1_REG PERIPHS_IO_MUX_XTAL_32K_N_U +// +#define IO_MUX_GPIO2_REG PERIPHS_IO_MUX_GPIO2_U +// +#define IO_MUX_GPIO3_REG PERIPHS_IO_MUX_GPIO3_U +// +#define IO_MUX_GPIO4_REG PERIPHS_IO_MUX_MTMS_U +// +#define IO_MUX_GPIO5_REG PERIPHS_IO_MUX_MTDI_U +// +#define IO_MUX_GPIO6_REG PERIPHS_IO_MUX_MTCK_U +// +#define IO_MUX_GPIO7_REG PERIPHS_IO_MUX_MTDO_U +// +#define IO_MUX_GPIO8_REG PERIPHS_IO_MUX_GPIO8_U +// +#define IO_MUX_GPIO9_REG PERIPHS_IO_MUX_GPIO9_U +// +#define IO_MUX_GPIO10_REG PERIPHS_IO_MUX_GPIO10_U +// +#define IO_MUX_GPIO11_REG PERIPHS_IO_MUX_VDD_SPI_U +// +#define IO_MUX_GPIO12_REG PERIPHS_IO_MUX_SPIHD_U +// +#define IO_MUX_GPIO13_REG PERIPHS_IO_MUX_SPIWP_U +// +#define IO_MUX_GPIO14_REG PERIPHS_IO_MUX_SPICS0_U +// +#define IO_MUX_GPIO15_REG PERIPHS_IO_MUX_SPICLK_U +// +#define IO_MUX_GPIO16_REG PERIPHS_IO_MUX_SPID_U +// +#define IO_MUX_GPIO17_REG PERIPHS_IO_MUX_SPIQ_U +// +#define IO_MUX_GPIO18_REG PERIPHS_IO_MUX_GPIO18_U +// +#define IO_MUX_GPIO19_REG PERIPHS_IO_MUX_GPIO19_U +// +#define IO_MUX_GPIO20_REG PERIPHS_IO_MUX_U0RXD_U +// +#define IO_MUX_GPIO21_REG PERIPHS_IO_MUX_U0TXD_U +// + +// +/* Value to set in IO Mux to use a pin as GPIO. */ +// +#define PIN_FUNC_GPIO 1 +// + +// +#define GPIO_PAD_PULLUP(num) do{PIN_PULLDWN_DIS(IOMUX_REG_GPIO##num);PIN_PULLUP_EN(IOMUX_REG_GPIO##num);}while(0) +// +#define GPIO_PAD_PULLDOWN(num) do{PIN_PULLUP_DIS(IOMUX_REG_GPIO##num);PIN_PULLDWN_EN(IOMUX_REG_GPIO##num);}while(0) +// +#define GPIO_PAD_SET_DRV(num, drv) PIN_SET_DRV(IOMUX_REG_GPIO##num, drv) +// + +// +#define SPI_HD_GPIO_NUM 12 +// +#define SPI_WP_GPIO_NUM 13 +// +#define SPI_CS0_GPIO_NUM 14 +// +#define SPI_CLK_GPIO_NUM 15 +// +#define SPI_D_GPIO_NUM 16 +// +#define SPI_Q_GPIO_NUM 17 +// + +// +#define SD_CLK_GPIO_NUM 12 +// +#define SD_CMD_GPIO_NUM 11 +// +#define SD_DATA0_GPIO_NUM 13 +// +#define SD_DATA1_GPIO_NUM 14 +// +#define SD_DATA2_GPIO_NUM 9 +// +#define SD_DATA3_GPIO_NUM 10 +// + +// +#define USB_DM_GPIO_NUM 18 +// +#define USB_DP_GPIO_NUM 19 +// + +// +#define MAX_RTC_GPIO_NUM 5 +// +#define MAX_PAD_GPIO_NUM 21 +// +#define MAX_GPIO_NUM 25 +// + +// +#define REG_IO_MUX_BASE DR_REG_IO_MUX_BASE +// +#define PIN_CTRL (REG_IO_MUX_BASE +0x00) +// +#define PAD_POWER_SEL BIT(15) +// +#define PAD_POWER_SEL_V 0x1 +// +#define PAD_POWER_SEL_M BIT(15) +// +#define PAD_POWER_SEL_S 15 +// + +// + +// +#define PAD_POWER_SWITCH_DELAY 0x7 +// +#define PAD_POWER_SWITCH_DELAY_V 0x7 +// +#define PAD_POWER_SWITCH_DELAY_M (PAD_POWER_SWITCH_DELAY_V << PAD_POWER_SWITCH_DELAY_S) +// +#define PAD_POWER_SWITCH_DELAY_S 12 +// + +// + +// +#define CLK_OUT3 0xf +// +#define CLK_OUT3_V CLK_OUT3 +// +#define CLK_OUT3_S 8 +// +#define CLK_OUT3_M (CLK_OUT3_V << CLK_OUT3_S) +// +#define CLK_OUT2 0xf +// +#define CLK_OUT2_V CLK_OUT2 +// +#define CLK_OUT2_S 4 +// +#define CLK_OUT2_M (CLK_OUT2_V << CLK_OUT2_S) +// +#define CLK_OUT1 0xf +// +#define CLK_OUT1_V CLK_OUT1 +// +#define CLK_OUT1_S 0 +// +#define CLK_OUT1_M (CLK_OUT1_V << CLK_OUT1_S) +// + +// +#define PERIPHS_IO_MUX_XTAL_32K_P_U (REG_IO_MUX_BASE +0x04) +// +#define FUNC_XTAL_32K_P_GPIO0 1 +// +#define FUNC_XTAL_32K_P_GPIO0_0 0 +// + +// +#define PERIPHS_IO_MUX_XTAL_32K_N_U (REG_IO_MUX_BASE +0x08) +// +#define FUNC_XTAL_32K_N_GPIO1 1 +// +#define FUNC_XTAL_32K_N_GPIO1_0 0 +// + +// +#define PERIPHS_IO_MUX_GPIO2_U (REG_IO_MUX_BASE +0x0c) +// +#define FUNC_GPIO2_FSPIQ 2 +// +#define FUNC_GPIO2_GPIO2 1 +// +#define FUNC_GPIO2_GPIO2_0 0 +// + +// +#define PERIPHS_IO_MUX_GPIO3_U (REG_IO_MUX_BASE +0x10) +// +#define FUNC_GPIO3_GPIO3 1 +// +#define FUNC_GPIO3_GPIO3_0 0 +// + +// +#define PERIPHS_IO_MUX_MTMS_U (REG_IO_MUX_BASE +0x14) +// +#define FUNC_MTMS_FSPIHD 2 +// +#define FUNC_MTMS_GPIO4 1 +// +#define FUNC_MTMS_MTMS 0 +// + +// +#define PERIPHS_IO_MUX_MTDI_U (REG_IO_MUX_BASE +0x18) +// +#define FUNC_MTDI_FSPIWP 2 +// +#define FUNC_MTDI_GPIO5 1 +// +#define FUNC_MTDI_MTDI 0 +// + +// +#define PERIPHS_IO_MUX_MTCK_U (REG_IO_MUX_BASE +0x1c) +// +#define FUNC_MTCK_FSPICLK 2 +// +#define FUNC_MTCK_GPIO6 1 +// +#define FUNC_MTCK_MTCK 0 +// + +// +#define PERIPHS_IO_MUX_MTDO_U (REG_IO_MUX_BASE +0x20) +// +#define FUNC_MTDO_FSPID 2 +// +#define FUNC_MTDO_GPIO7 1 +// +#define FUNC_MTDO_MTDO 0 +// + +// +#define PERIPHS_IO_MUX_GPIO8_U (REG_IO_MUX_BASE +0x24) +// +#define FUNC_GPIO8_GPIO8 1 +// +#define FUNC_GPIO8_GPIO8_0 0 +// + +// +#define PERIPHS_IO_MUX_GPIO9_U (REG_IO_MUX_BASE +0x28) +// +#define FUNC_GPIO9_GPIO9 1 +// +#define FUNC_GPIO9_GPIO9_0 0 +// + +// +#define PERIPHS_IO_MUX_GPIO10_U (REG_IO_MUX_BASE +0x2c) +// +#define FUNC_GPIO10_FSPICS0 2 +// +#define FUNC_GPIO10_GPIO10 1 +// +#define FUNC_GPIO10_GPIO10_0 0 +// + +// +#define PERIPHS_IO_MUX_VDD_SPI_U (REG_IO_MUX_BASE +0x30) +// +#define FUNC_VDD_SPI_GPIO11 1 +// +#define FUNC_VDD_SPI_GPIO11_0 0 +// + +// +#define PERIPHS_IO_MUX_SPIHD_U (REG_IO_MUX_BASE +0x34) +// +#define FUNC_SPIHD_GPIO12 1 +// +#define FUNC_SPIHD_SPIHD 0 +// + +// +#define PERIPHS_IO_MUX_SPIWP_U (REG_IO_MUX_BASE +0x38) +// +#define FUNC_SPIWP_GPIO13 1 +// +#define FUNC_SPIWP_SPIWP 0 +// + +// +#define PERIPHS_IO_MUX_SPICS0_U (REG_IO_MUX_BASE +0x3c) +// +#define FUNC_SPICS0_GPIO14 1 +// +#define FUNC_SPICS0_SPICS0 0 +// + +// +#define PERIPHS_IO_MUX_SPICLK_U (REG_IO_MUX_BASE +0x40) +// +#define FUNC_SPICLK_GPIO15 1 +// +#define FUNC_SPICLK_SPICLK 0 +// + +// +#define PERIPHS_IO_MUX_SPID_U (REG_IO_MUX_BASE +0x44) +// +#define FUNC_SPID_GPIO16 1 +// +#define FUNC_SPID_SPID 0 +// + +// +#define PERIPHS_IO_MUX_SPIQ_U (REG_IO_MUX_BASE +0x48) +// +#define FUNC_SPIQ_GPIO17 1 +// +#define FUNC_SPIQ_SPIQ 0 +// + +// +#define PERIPHS_IO_MUX_GPIO18_U (REG_IO_MUX_BASE +0x4c) +// +#define FUNC_GPIO18_GPIO18 1 +// +#define FUNC_GPIO18_GPIO18_0 0 +// + +// +#define PERIPHS_IO_MUX_GPIO19_U (REG_IO_MUX_BASE +0x50) +// +#define FUNC_GPIO19_GPIO19 1 +// +#define FUNC_GPIO19_GPIO19_0 0 +// + +// +#define PERIPHS_IO_MUX_U0RXD_U (REG_IO_MUX_BASE +0x54) +// +#define FUNC_U0RXD_GPIO20 1 +// +#define FUNC_U0RXD_U0RXD 0 +// + +// +#define PERIPHS_IO_MUX_U0TXD_U (REG_IO_MUX_BASE +0x58) +// +#define FUNC_U0TXD_GPIO21 1 +// +#define FUNC_U0TXD_U0TXD 0 +// + +// +#define IO_MUX_DATE_REG (REG_IO_MUX_BASE + 0xfc) +// +#define IO_MUX_DATE 0xFFFFFFFF +// +#define IO_MUX_DATE_S 0 +// +#define IO_MUX_DATE_VERSION 0x2006050 +// + +// +#endif \ No newline at end of file diff --git a/src/nesper/esp/driver/esp32c3/io_mux_reg.nim b/src/nesper/esp/driver/esp32c3/io_mux_reg.nim new file mode 100644 index 0000000..da09c7a --- /dev/null +++ b/src/nesper/esp/driver/esp32c3/io_mux_reg.nim @@ -0,0 +1,265 @@ +## +## // +## SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD +## // +## +## // +## SPDX-License-Identifier: Apache-2.0 +## // +## +## + + +const hdr = "soc/io_mux_reg.h" + +var SLP_OE* {.importcpp: "SLP_OE", header: hdr.}: int +var SLP_OE_M* {.importcpp: "SLP_OE_M", header: hdr.}: int +var SLP_OE_V* {.importcpp: "SLP_OE_V", header: hdr.}: int +var SLP_OE_S* {.importcpp: "SLP_OE_S", header: hdr.}: int +## Pin used for wakeup from sleep +## +var SLP_SEL* {.importcpp: "SLP_SEL", header: hdr.}: int +var SLP_SEL_M* {.importcpp: "SLP_SEL_M", header: hdr.}: int +var SLP_SEL_V* {.importcpp: "SLP_SEL_V", header: hdr.}: int +var SLP_SEL_S* {.importcpp: "SLP_SEL_S", header: hdr.}: int +## Pulldown enable in sleep mode +## +var SLP_PD* {.importcpp: "SLP_PD", header: hdr.}: int +var SLP_PD_M* {.importcpp: "SLP_PD_M", header: hdr.}: int +var SLP_PD_V* {.importcpp: "SLP_PD_V", header: hdr.}: int +var SLP_PD_S* {.importcpp: "SLP_PD_S", header: hdr.}: int +## Pullup enable in sleep mode +## +var SLP_PU* {.importcpp: "SLP_PU", header: hdr.}: int +var SLP_PU_M* {.importcpp: "SLP_PU_M", header: hdr.}: int +var SLP_PU_V* {.importcpp: "SLP_PU_V", header: hdr.}: int +var SLP_PU_S* {.importcpp: "SLP_PU_S", header: hdr.}: int +## Input enable in sleep mode +## +var SLP_IE* {.importcpp: "SLP_IE", header: hdr.}: int +var SLP_IE_M* {.importcpp: "SLP_IE_M", header: hdr.}: int +var SLP_IE_V* {.importcpp: "SLP_IE_V", header: hdr.}: int +var SLP_IE_S* {.importcpp: "SLP_IE_S", header: hdr.}: int +## Drive strength in sleep mode +## +var SLP_DRV* {.importcpp: "SLP_DRV", header: hdr.}: int +var SLP_DRV_M* {.importcpp: "SLP_DRV_M", header: hdr.}: int +var SLP_DRV_V* {.importcpp: "SLP_DRV_V", header: hdr.}: int +var SLP_DRV_S* {.importcpp: "SLP_DRV_S", header: hdr.}: int +## Pulldown enable +## +var FUN_PD* {.importcpp: "FUN_PD", header: hdr.}: int +var FUN_PD_M* {.importcpp: "FUN_PD_M", header: hdr.}: int +var FUN_PD_V* {.importcpp: "FUN_PD_V", header: hdr.}: int +var FUN_PD_S* {.importcpp: "FUN_PD_S", header: hdr.}: int +## Pullup enable +## +var FUN_PU* {.importcpp: "FUN_PU", header: hdr.}: int +var FUN_PU_M* {.importcpp: "FUN_PU_M", header: hdr.}: int +var FUN_PU_V* {.importcpp: "FUN_PU_V", header: hdr.}: int +var FUN_PU_S* {.importcpp: "FUN_PU_S", header: hdr.}: int +## Input enable +## +var FUN_IE* {.importcpp: "FUN_IE", header: hdr.}: int +var FUN_IE_M* {.importcpp: "FUN_IE_M", header: hdr.}: int +var FUN_IE_V* {.importcpp: "FUN_IE_V", header: hdr.}: int +var FUN_IE_S* {.importcpp: "FUN_IE_S", header: hdr.}: int +## Drive strength +## +var FUN_DRV* {.importcpp: "FUN_DRV", header: hdr.}: int +var FUN_DRV_M* {.importcpp: "FUN_DRV_M", header: hdr.}: int +var FUN_DRV_V* {.importcpp: "FUN_DRV_V", header: hdr.}: int +var FUN_DRV_S* {.importcpp: "FUN_DRV_S", header: hdr.}: int +## Function select (possible values are defined for each pin as FUNC_pinname_function below) +## +var MCU_SEL* {.importcpp: "MCU_SEL", header: hdr.}: int +var MCU_SEL_M* {.importcpp: "MCU_SEL_M", header: hdr.}: int +var MCU_SEL_V* {.importcpp: "MCU_SEL_V", header: hdr.}: int +var MCU_SEL_S* {.importcpp: "MCU_SEL_S", header: hdr.}: int +## Pin filter (Pulse width shorter than 2 clock cycles will be filtered out) +## +var FILTER_EN* {.importcpp: "FILTER_EN", header: hdr.}: int +var FILTER_EN_M* {.importcpp: "FILTER_EN_M", header: hdr.}: int +var FILTER_EN_V* {.importcpp: "FILTER_EN_V", header: hdr.}: int +var FILTER_EN_S* {.importcpp: "FILTER_EN_S", header: hdr.}: int +# proc PIN_SLP_INPUT_ENABLE*(PIN_NAME: untyped) {. +# importcpp: "PIN_SLP_INPUT_ENABLE", header: hdr.} +# proc PIN_SLP_INPUT_DISABLE*(PIN_NAME: untyped) {. +# importcpp: "PIN_SLP_INPUT_DISABLE", header: hdr.} +# proc PIN_SLP_OUTPUT_ENABLE*(PIN_NAME: untyped) {. +# importcpp: "PIN_SLP_OUTPUT_ENABLE", header: hdr.} +# proc PIN_SLP_OUTPUT_DISABLE*(PIN_NAME: untyped) {. +# importcpp: "PIN_SLP_OUTPUT_DISABLE", header: hdr.} +# proc PIN_SLP_PULLUP_ENABLE*(PIN_NAME: untyped) {. +# importcpp: "PIN_SLP_PULLUP_ENABLE", header: hdr.} +# proc PIN_SLP_PULLUP_DISABLE*(PIN_NAME: untyped) {. +# importcpp: "PIN_SLP_PULLUP_DISABLE", header: hdr.} +# proc PIN_SLP_PULLDOWN_ENABLE*(PIN_NAME: untyped) {. +# importcpp: "PIN_SLP_PULLDOWN_ENABLE", header: hdr.} +# proc PIN_SLP_PULLDOWN_DISABLE*(PIN_NAME: untyped) {. +# importcpp: "PIN_SLP_PULLDOWN_DISABLE", header: hdr.} +# proc PIN_SLP_SEL_ENABLE*(PIN_NAME: untyped) {.importcpp: "PIN_SLP_SEL_ENABLE", +# header: hdr.} +# proc PIN_SLP_SEL_DISABLE*(PIN_NAME: untyped) {.importcpp: "PIN_SLP_SEL_DISABLE", +# header: hdr.} +# proc PIN_INPUT_ENABLE*(PIN_NAME: untyped) {.importcpp: "PIN_INPUT_ENABLE", +# header: hdr.} +# proc PIN_INPUT_DISABLE*(PIN_NAME: untyped) {.importcpp: "PIN_INPUT_DISABLE", +# header: hdr.} +# proc PIN_SET_DRV*(PIN_NAME: untyped; drv: untyped) {.importcpp: "PIN_SET_DRV", +# header: hdr.} +# proc PIN_PULLUP_DIS*(PIN_NAME: untyped) {.importcpp: "PIN_PULLUP_DIS", header: hdr.} +# proc PIN_PULLUP_EN*(PIN_NAME: untyped) {.importcpp: "PIN_PULLUP_EN", header: hdr.} +# proc PIN_PULLDWN_DIS*(PIN_NAME: untyped) {.importcpp: "PIN_PULLDWN_DIS", +# header: hdr.} +# proc PIN_PULLDWN_EN*(PIN_NAME: untyped) {.importcpp: "PIN_PULLDWN_EN", header: hdr.} +# proc PIN_FUNC_SELECT*(PIN_NAME: untyped; FUNC: untyped) {. +# importcpp: "PIN_FUNC_SELECT", header: hdr.} +# proc PIN_FILTER_EN*(PIN_NAME: untyped) {.importcpp: "PIN_FILTER_EN", header: hdr.} +# proc PIN_FILTER_DIS*(PIN_NAME: untyped) {.importcpp: "PIN_FILTER_DIS", header: hdr.} +var IO_MUX_GPIO0_REG* {.importcpp: "IO_MUX_GPIO0_REG", header: hdr.}: int +var IO_MUX_GPIO1_REG* {.importcpp: "IO_MUX_GPIO1_REG", header: hdr.}: int +var IO_MUX_GPIO2_REG* {.importcpp: "IO_MUX_GPIO2_REG", header: hdr.}: int +var IO_MUX_GPIO3_REG* {.importcpp: "IO_MUX_GPIO3_REG", header: hdr.}: int +var IO_MUX_GPIO4_REG* {.importcpp: "IO_MUX_GPIO4_REG", header: hdr.}: int +var IO_MUX_GPIO5_REG* {.importcpp: "IO_MUX_GPIO5_REG", header: hdr.}: int +var IO_MUX_GPIO6_REG* {.importcpp: "IO_MUX_GPIO6_REG", header: hdr.}: int +var IO_MUX_GPIO7_REG* {.importcpp: "IO_MUX_GPIO7_REG", header: hdr.}: int +var IO_MUX_GPIO8_REG* {.importcpp: "IO_MUX_GPIO8_REG", header: hdr.}: int +var IO_MUX_GPIO9_REG* {.importcpp: "IO_MUX_GPIO9_REG", header: hdr.}: int +var IO_MUX_GPIO10_REG* {.importcpp: "IO_MUX_GPIO10_REG", header: hdr.}: int +var IO_MUX_GPIO11_REG* {.importcpp: "IO_MUX_GPIO11_REG", header: hdr.}: int +var IO_MUX_GPIO12_REG* {.importcpp: "IO_MUX_GPIO12_REG", header: hdr.}: int +var IO_MUX_GPIO13_REG* {.importcpp: "IO_MUX_GPIO13_REG", header: hdr.}: int +var IO_MUX_GPIO14_REG* {.importcpp: "IO_MUX_GPIO14_REG", header: hdr.}: int +var IO_MUX_GPIO15_REG* {.importcpp: "IO_MUX_GPIO15_REG", header: hdr.}: int +var IO_MUX_GPIO16_REG* {.importcpp: "IO_MUX_GPIO16_REG", header: hdr.}: int +var IO_MUX_GPIO17_REG* {.importcpp: "IO_MUX_GPIO17_REG", header: hdr.}: int +var IO_MUX_GPIO18_REG* {.importcpp: "IO_MUX_GPIO18_REG", header: hdr.}: int +var IO_MUX_GPIO19_REG* {.importcpp: "IO_MUX_GPIO19_REG", header: hdr.}: int +var IO_MUX_GPIO20_REG* {.importcpp: "IO_MUX_GPIO20_REG", header: hdr.}: int +var IO_MUX_GPIO21_REG* {.importcpp: "IO_MUX_GPIO21_REG", header: hdr.}: int +## Value to set in IO Mux to use a pin as GPIO. +## +var PIN_FUNC_GPIO* {.importcpp: "PIN_FUNC_GPIO", header: hdr.}: int +# proc GPIO_PAD_PULLUP*(num: untyped) {.importcpp: "GPIO_PAD_PULLUP", header: hdr.} +# proc GPIO_PAD_PULLDOWN*(num: untyped) {.importcpp: "GPIO_PAD_PULLDOWN", header: hdr.} +# proc GPIO_PAD_SET_DRV*(num: untyped; drv: untyped) {.importcpp: "GPIO_PAD_SET_DRV", +# header: hdr.} +var SPI_HD_GPIO_NUM* {.importcpp: "SPI_HD_GPIO_NUM", header: hdr.}: int +var SPI_WP_GPIO_NUM* {.importcpp: "SPI_WP_GPIO_NUM", header: hdr.}: int +var SPI_CS0_GPIO_NUM* {.importcpp: "SPI_CS0_GPIO_NUM", header: hdr.}: int +var SPI_CLK_GPIO_NUM* {.importcpp: "SPI_CLK_GPIO_NUM", header: hdr.}: int +var SPI_D_GPIO_NUM* {.importcpp: "SPI_D_GPIO_NUM", header: hdr.}: int +var SPI_Q_GPIO_NUM* {.importcpp: "SPI_Q_GPIO_NUM", header: hdr.}: int +var SD_CLK_GPIO_NUM* {.importcpp: "SD_CLK_GPIO_NUM", header: hdr.}: int +var SD_CMD_GPIO_NUM* {.importcpp: "SD_CMD_GPIO_NUM", header: hdr.}: int +var SD_DATA0_GPIO_NUM* {.importcpp: "SD_DATA0_GPIO_NUM", header: hdr.}: int +var SD_DATA1_GPIO_NUM* {.importcpp: "SD_DATA1_GPIO_NUM", header: hdr.}: int +var SD_DATA2_GPIO_NUM* {.importcpp: "SD_DATA2_GPIO_NUM", header: hdr.}: int +var SD_DATA3_GPIO_NUM* {.importcpp: "SD_DATA3_GPIO_NUM", header: hdr.}: int +var USB_DM_GPIO_NUM* {.importcpp: "USB_DM_GPIO_NUM", header: hdr.}: int +var USB_DP_GPIO_NUM* {.importcpp: "USB_DP_GPIO_NUM", header: hdr.}: int +var MAX_RTC_GPIO_NUM* {.importcpp: "MAX_RTC_GPIO_NUM", header: hdr.}: int +var MAX_PAD_GPIO_NUM* {.importcpp: "MAX_PAD_GPIO_NUM", header: hdr.}: int +var MAX_GPIO_NUM* {.importcpp: "MAX_GPIO_NUM", header: hdr.}: int +var REG_IO_MUX_BASE* {.importcpp: "REG_IO_MUX_BASE", header: hdr.}: int +var PIN_CTRL* {.importcpp: "PIN_CTRL", header: hdr.}: int +var PAD_POWER_SEL* {.importcpp: "PAD_POWER_SEL", header: hdr.}: int +var PAD_POWER_SEL_V* {.importcpp: "PAD_POWER_SEL_V", header: hdr.}: int +var PAD_POWER_SEL_M* {.importcpp: "PAD_POWER_SEL_M", header: hdr.}: int +var PAD_POWER_SEL_S* {.importcpp: "PAD_POWER_SEL_S", header: hdr.}: int +var PAD_POWER_SWITCH_DELAY* {.importcpp: "PAD_POWER_SWITCH_DELAY", header: hdr.}: int +var PAD_POWER_SWITCH_DELAY_V* {.importcpp: "PAD_POWER_SWITCH_DELAY_V", header: hdr.}: int +var PAD_POWER_SWITCH_DELAY_M* {.importcpp: "PAD_POWER_SWITCH_DELAY_M", header: hdr.}: int +var PAD_POWER_SWITCH_DELAY_S* {.importcpp: "PAD_POWER_SWITCH_DELAY_S", header: hdr.}: int +var CLK_OUT3* {.importcpp: "CLK_OUT3", header: hdr.}: int +var CLK_OUT3_V* {.importcpp: "CLK_OUT3_V", header: hdr.}: int +var CLK_OUT3_S* {.importcpp: "CLK_OUT3_S", header: hdr.}: int +var CLK_OUT3_M* {.importcpp: "CLK_OUT3_M", header: hdr.}: int +var CLK_OUT2* {.importcpp: "CLK_OUT2", header: hdr.}: int +var CLK_OUT2_V* {.importcpp: "CLK_OUT2_V", header: hdr.}: int +var CLK_OUT2_S* {.importcpp: "CLK_OUT2_S", header: hdr.}: int +var CLK_OUT2_M* {.importcpp: "CLK_OUT2_M", header: hdr.}: int +var CLK_OUT1* {.importcpp: "CLK_OUT1", header: hdr.}: int +var CLK_OUT1_V* {.importcpp: "CLK_OUT1_V", header: hdr.}: int +var CLK_OUT1_S* {.importcpp: "CLK_OUT1_S", header: hdr.}: int +var CLK_OUT1_M* {.importcpp: "CLK_OUT1_M", header: hdr.}: int +var PERIPHS_IO_MUX_XTAL_32K_P_U* {.importcpp: "PERIPHS_IO_MUX_XTAL_32K_P_U", + header: hdr.}: int +var FUNC_XTAL_32K_P_GPIO0* {.importcpp: "FUNC_XTAL_32K_P_GPIO0", header: hdr.}: int +var FUNC_XTAL_32K_P_GPIO0_0* {.importcpp: "FUNC_XTAL_32K_P_GPIO0_0", header: hdr.}: int +var PERIPHS_IO_MUX_XTAL_32K_N_U* {.importcpp: "PERIPHS_IO_MUX_XTAL_32K_N_U", + header: hdr.}: int +var FUNC_XTAL_32K_N_GPIO1* {.importcpp: "FUNC_XTAL_32K_N_GPIO1", header: hdr.}: int +var FUNC_XTAL_32K_N_GPIO1_0* {.importcpp: "FUNC_XTAL_32K_N_GPIO1_0", header: hdr.}: int +var PERIPHS_IO_MUX_GPIO2_U* {.importcpp: "PERIPHS_IO_MUX_GPIO2_U", header: hdr.}: int +var FUNC_GPIO2_FSPIQ* {.importcpp: "FUNC_GPIO2_FSPIQ", header: hdr.}: int +var FUNC_GPIO2_GPIO2* {.importcpp: "FUNC_GPIO2_GPIO2", header: hdr.}: int +var FUNC_GPIO2_GPIO2_0* {.importcpp: "FUNC_GPIO2_GPIO2_0", header: hdr.}: int +var PERIPHS_IO_MUX_GPIO3_U* {.importcpp: "PERIPHS_IO_MUX_GPIO3_U", header: hdr.}: int +var FUNC_GPIO3_GPIO3* {.importcpp: "FUNC_GPIO3_GPIO3", header: hdr.}: int +var FUNC_GPIO3_GPIO3_0* {.importcpp: "FUNC_GPIO3_GPIO3_0", header: hdr.}: int +var PERIPHS_IO_MUX_MTMS_U* {.importcpp: "PERIPHS_IO_MUX_MTMS_U", header: hdr.}: int +var FUNC_MTMS_FSPIHD* {.importcpp: "FUNC_MTMS_FSPIHD", header: hdr.}: int +var FUNC_MTMS_GPIO4* {.importcpp: "FUNC_MTMS_GPIO4", header: hdr.}: int +var FUNC_MTMS_MTMS* {.importcpp: "FUNC_MTMS_MTMS", header: hdr.}: int +var PERIPHS_IO_MUX_MTDI_U* {.importcpp: "PERIPHS_IO_MUX_MTDI_U", header: hdr.}: int +var FUNC_MTDI_FSPIWP* {.importcpp: "FUNC_MTDI_FSPIWP", header: hdr.}: int +var FUNC_MTDI_GPIO5* {.importcpp: "FUNC_MTDI_GPIO5", header: hdr.}: int +var FUNC_MTDI_MTDI* {.importcpp: "FUNC_MTDI_MTDI", header: hdr.}: int +var PERIPHS_IO_MUX_MTCK_U* {.importcpp: "PERIPHS_IO_MUX_MTCK_U", header: hdr.}: int +var FUNC_MTCK_FSPICLK* {.importcpp: "FUNC_MTCK_FSPICLK", header: hdr.}: int +var FUNC_MTCK_GPIO6* {.importcpp: "FUNC_MTCK_GPIO6", header: hdr.}: int +var FUNC_MTCK_MTCK* {.importcpp: "FUNC_MTCK_MTCK", header: hdr.}: int +var PERIPHS_IO_MUX_MTDO_U* {.importcpp: "PERIPHS_IO_MUX_MTDO_U", header: hdr.}: int +var FUNC_MTDO_FSPID* {.importcpp: "FUNC_MTDO_FSPID", header: hdr.}: int +var FUNC_MTDO_GPIO7* {.importcpp: "FUNC_MTDO_GPIO7", header: hdr.}: int +var FUNC_MTDO_MTDO* {.importcpp: "FUNC_MTDO_MTDO", header: hdr.}: int +var PERIPHS_IO_MUX_GPIO8_U* {.importcpp: "PERIPHS_IO_MUX_GPIO8_U", header: hdr.}: int +var FUNC_GPIO8_GPIO8* {.importcpp: "FUNC_GPIO8_GPIO8", header: hdr.}: int +var FUNC_GPIO8_GPIO8_0* {.importcpp: "FUNC_GPIO8_GPIO8_0", header: hdr.}: int +var PERIPHS_IO_MUX_GPIO9_U* {.importcpp: "PERIPHS_IO_MUX_GPIO9_U", header: hdr.}: int +var FUNC_GPIO9_GPIO9* {.importcpp: "FUNC_GPIO9_GPIO9", header: hdr.}: int +var FUNC_GPIO9_GPIO9_0* {.importcpp: "FUNC_GPIO9_GPIO9_0", header: hdr.}: int +var PERIPHS_IO_MUX_GPIO10_U* {.importcpp: "PERIPHS_IO_MUX_GPIO10_U", header: hdr.}: int +var FUNC_GPIO10_FSPICS0* {.importcpp: "FUNC_GPIO10_FSPICS0", header: hdr.}: int +var FUNC_GPIO10_GPIO10* {.importcpp: "FUNC_GPIO10_GPIO10", header: hdr.}: int +var FUNC_GPIO10_GPIO10_0* {.importcpp: "FUNC_GPIO10_GPIO10_0", header: hdr.}: int +var PERIPHS_IO_MUX_VDD_SPI_U* {.importcpp: "PERIPHS_IO_MUX_VDD_SPI_U", header: hdr.}: int +var FUNC_VDD_SPI_GPIO11* {.importcpp: "FUNC_VDD_SPI_GPIO11", header: hdr.}: int +var FUNC_VDD_SPI_GPIO11_0* {.importcpp: "FUNC_VDD_SPI_GPIO11_0", header: hdr.}: int +var PERIPHS_IO_MUX_SPIHD_U* {.importcpp: "PERIPHS_IO_MUX_SPIHD_U", header: hdr.}: int +var FUNC_SPIHD_GPIO12* {.importcpp: "FUNC_SPIHD_GPIO12", header: hdr.}: int +var FUNC_SPIHD_SPIHD* {.importcpp: "FUNC_SPIHD_SPIHD", header: hdr.}: int +var PERIPHS_IO_MUX_SPIWP_U* {.importcpp: "PERIPHS_IO_MUX_SPIWP_U", header: hdr.}: int +var FUNC_SPIWP_GPIO13* {.importcpp: "FUNC_SPIWP_GPIO13", header: hdr.}: int +var FUNC_SPIWP_SPIWP* {.importcpp: "FUNC_SPIWP_SPIWP", header: hdr.}: int +var PERIPHS_IO_MUX_SPICS0_U* {.importcpp: "PERIPHS_IO_MUX_SPICS0_U", header: hdr.}: int +var FUNC_SPICS0_GPIO14* {.importcpp: "FUNC_SPICS0_GPIO14", header: hdr.}: int +var FUNC_SPICS0_SPICS0* {.importcpp: "FUNC_SPICS0_SPICS0", header: hdr.}: int +var PERIPHS_IO_MUX_SPICLK_U* {.importcpp: "PERIPHS_IO_MUX_SPICLK_U", header: hdr.}: int +var FUNC_SPICLK_GPIO15* {.importcpp: "FUNC_SPICLK_GPIO15", header: hdr.}: int +var FUNC_SPICLK_SPICLK* {.importcpp: "FUNC_SPICLK_SPICLK", header: hdr.}: int +var PERIPHS_IO_MUX_SPID_U* {.importcpp: "PERIPHS_IO_MUX_SPID_U", header: hdr.}: int +var FUNC_SPID_GPIO16* {.importcpp: "FUNC_SPID_GPIO16", header: hdr.}: int +var FUNC_SPID_SPID* {.importcpp: "FUNC_SPID_SPID", header: hdr.}: int +var PERIPHS_IO_MUX_SPIQ_U* {.importcpp: "PERIPHS_IO_MUX_SPIQ_U", header: hdr.}: int +var FUNC_SPIQ_GPIO17* {.importcpp: "FUNC_SPIQ_GPIO17", header: hdr.}: int +var FUNC_SPIQ_SPIQ* {.importcpp: "FUNC_SPIQ_SPIQ", header: hdr.}: int +var PERIPHS_IO_MUX_GPIO18_U* {.importcpp: "PERIPHS_IO_MUX_GPIO18_U", header: hdr.}: int +var FUNC_GPIO18_GPIO18* {.importcpp: "FUNC_GPIO18_GPIO18", header: hdr.}: int +var FUNC_GPIO18_GPIO18_0* {.importcpp: "FUNC_GPIO18_GPIO18_0", header: hdr.}: int +var PERIPHS_IO_MUX_GPIO19_U* {.importcpp: "PERIPHS_IO_MUX_GPIO19_U", header: hdr.}: int +var FUNC_GPIO19_GPIO19* {.importcpp: "FUNC_GPIO19_GPIO19", header: hdr.}: int +var FUNC_GPIO19_GPIO19_0* {.importcpp: "FUNC_GPIO19_GPIO19_0", header: hdr.}: int +var PERIPHS_IO_MUX_U0RXD_U* {.importcpp: "PERIPHS_IO_MUX_U0RXD_U", header: hdr.}: int +var FUNC_U0RXD_GPIO20* {.importcpp: "FUNC_U0RXD_GPIO20", header: hdr.}: int +var FUNC_U0RXD_U0RXD* {.importcpp: "FUNC_U0RXD_U0RXD", header: hdr.}: int +var PERIPHS_IO_MUX_U0TXD_U* {.importcpp: "PERIPHS_IO_MUX_U0TXD_U", header: hdr.}: int +var FUNC_U0TXD_GPIO21* {.importcpp: "FUNC_U0TXD_GPIO21", header: hdr.}: int +var FUNC_U0TXD_U0TXD* {.importcpp: "FUNC_U0TXD_U0TXD", header: hdr.}: int +var IO_MUX_DATE_REG* {.importcpp: "IO_MUX_DATE_REG", header: hdr.}: int +var IO_MUX_DATE* {.importcpp: "IO_MUX_DATE", header: hdr.}: int +var IO_MUX_DATE_S* {.importcpp: "IO_MUX_DATE_S", header: hdr.}: int +var IO_MUX_DATE_VERSION* {.importcpp: "IO_MUX_DATE_VERSION", header: hdr.}: int \ No newline at end of file diff --git a/src/nesper/esp/driver/gpio_driver.nim b/src/nesper/esp/driver/gpio_driver.nim old mode 100644 new mode 100755 index a88a2a1..a1ded5d --- a/src/nesper/esp/driver/gpio_driver.nim +++ b/src/nesper/esp/driver/gpio_driver.nim @@ -14,18 +14,13 @@ import ../../consts import io_mux_reg -when not defined(esp32s3): +when defined(esp32s3): type gpio_num_t* {.size: sizeof(cint).} = enum GPIO_NUM_NC = -1, ## !< Use to signal not connected to S/W GPIO_NUM_0 = 0, ## !< GPIO0, input and output GPIO_NUM_1 = 1, ## !< GPIO1, input and output - GPIO_NUM_2 = 2, ## !< GPIO2, input and output - ## @note There are more enumerations like that - ## up to GPIO39, excluding GPIO20, GPIO24 and GPIO28..31. - ## They are not shown here to reduce redundant information. - ## @note GPIO34..39 are input mode only. - ## * @cond + GPIO_NUM_2 = 2, ## !< GPIO2, input and output GPIO_NUM_3 = 3, ## !< GPIO3, input and output GPIO_NUM_4 = 4, ## !< GPIO4, input and output GPIO_NUM_5 = 5, ## !< GPIO5, input and output @@ -43,22 +38,33 @@ when not defined(esp32s3): GPIO_NUM_17 = 17, ## !< GPIO17, input and output GPIO_NUM_18 = 18, ## !< GPIO18, input and output GPIO_NUM_19 = 19, ## !< GPIO19, input and output + GPIO_NUM_20 = 20, ## !< GPIO20, input and output GPIO_NUM_21 = 21, ## !< GPIO21, input and output - GPIO_NUM_22 = 22, ## !< GPIO22, input and output - GPIO_NUM_23 = 23, ## !< GPIO23, input and output - GPIO_NUM_25 = 25, ## !< GPIO25, input and output GPIO_NUM_26 = 26, ## !< GPIO26, input and output GPIO_NUM_27 = 27, ## !< GPIO27, input and output + GPIO_NUM_28 = 28, ## !< GPIO28, input and output + GPIO_NUM_29 = 29, ## !< GPIO29, input and output + GPIO_NUM_30 = 30, ## !< GPIO30, input and output + GPIO_NUM_31 = 31, ## !< GPIO31, input and output GPIO_NUM_32 = 32, ## !< GPIO32, input and output GPIO_NUM_33 = 33, ## !< GPIO33, input and output - GPIO_NUM_34 = 34, ## !< GPIO34, input mode only - GPIO_NUM_35 = 35, ## !< GPIO35, input mode only - GPIO_NUM_36 = 36, ## !< GPIO36, input mode only - GPIO_NUM_37 = 37, ## !< GPIO37, input mode only - GPIO_NUM_38 = 38, ## !< GPIO38, input mode only - GPIO_NUM_39 = 39, ## !< GPIO39, input mode only - GPIO_NUM_MAX = 40 ## * @endcond -else: + GPIO_NUM_34 = 34, ## !< GPIO34, input and output + GPIO_NUM_35 = 35, ## !< GPIO35, input and output + GPIO_NUM_36 = 36, ## !< GPIO36, input and output + GPIO_NUM_37 = 37, ## !< GPIO37, input and output + GPIO_NUM_38 = 38, ## !< GPIO38, input and output + GPIO_NUM_39 = 39, ## !< GPIO39, input and output + GPIO_NUM_40 = 40, ## !< GPIO40, input and output + GPIO_NUM_41 = 41, ## !< GPIO41, input and output + GPIO_NUM_42 = 42, ## !< GPIO42, input and output + GPIO_NUM_43 = 43, ## !< GPIO43, input and output + GPIO_NUM_44 = 44, ## !< GPIO44, input and output + GPIO_NUM_45 = 45, ## !< GPIO45, input and output + GPIO_NUM_46 = 46, ## !< GPIO46, input and output + GPIO_NUM_47 = 47, ## !< GPIO47, input and output + GPIO_NUM_48 = 48, ## !< GPIO48, input and output + GPIO_NUM_MAX = 49 ## * @endcond +elif defined(esp32c3): type gpio_num_t* {.size: sizeof(cint).} = enum GPIO_NUM_NC = -1, ## !< Use to signal not connected to S/W @@ -82,32 +88,54 @@ else: GPIO_NUM_17 = 17, ## !< GPIO17, input and output GPIO_NUM_18 = 18, ## !< GPIO18, input and output GPIO_NUM_19 = 19, ## !< GPIO19, input and output - GPIO_NUM_20 = 20, ## !< GPIO20, input and output + GPIO_NUM_20 = 20, ## !< GPIO19, input and output + GPIO_NUM_21 = 21, ## !< GPIO21, input and output + GPIO_NUM_MAX = 22 ## * @endcond +else: + type + gpio_num_t* {.size: sizeof(cint).} = enum + GPIO_NUM_NC = -1, ## !< Use to signal not connected to S/W + GPIO_NUM_0 = 0, ## !< GPIO0, input and output + GPIO_NUM_1 = 1, ## !< GPIO1, input and output + GPIO_NUM_2 = 2, ## !< GPIO2, input and output + ## @note There are more enumerations like that + ## up to GPIO39, excluding GPIO20, GPIO24 and GPIO28..31. + ## They are not shown here to reduce redundant information. + ## @note GPIO34..39 are input mode only. + ## * @cond + GPIO_NUM_3 = 3, ## !< GPIO3, input and output + GPIO_NUM_4 = 4, ## !< GPIO4, input and output + GPIO_NUM_5 = 5, ## !< GPIO5, input and output + GPIO_NUM_6 = 6, ## !< GPIO6, input and output + GPIO_NUM_7 = 7, ## !< GPIO7, input and output + GPIO_NUM_8 = 8, ## !< GPIO8, input and output + GPIO_NUM_9 = 9, ## !< GPIO9, input and output + GPIO_NUM_10 = 10, ## !< GPIO10, input and output + GPIO_NUM_11 = 11, ## !< GPIO11, input and output + GPIO_NUM_12 = 12, ## !< GPIO12, input and output + GPIO_NUM_13 = 13, ## !< GPIO13, input and output + GPIO_NUM_14 = 14, ## !< GPIO14, input and output + GPIO_NUM_15 = 15, ## !< GPIO15, input and output + GPIO_NUM_16 = 16, ## !< GPIO16, input and output + GPIO_NUM_17 = 17, ## !< GPIO17, input and output + GPIO_NUM_18 = 18, ## !< GPIO18, input and output + GPIO_NUM_19 = 19, ## !< GPIO19, input and output GPIO_NUM_21 = 21, ## !< GPIO21, input and output + GPIO_NUM_22 = 22, ## !< GPIO22, input and output + GPIO_NUM_23 = 23, ## !< GPIO23, input and output + GPIO_NUM_25 = 25, ## !< GPIO25, input and output GPIO_NUM_26 = 26, ## !< GPIO26, input and output GPIO_NUM_27 = 27, ## !< GPIO27, input and output - GPIO_NUM_28 = 28, ## !< GPIO28, input and output - GPIO_NUM_29 = 29, ## !< GPIO29, input and output - GPIO_NUM_30 = 30, ## !< GPIO30, input and output - GPIO_NUM_31 = 31, ## !< GPIO31, input and output GPIO_NUM_32 = 32, ## !< GPIO32, input and output GPIO_NUM_33 = 33, ## !< GPIO33, input and output - GPIO_NUM_34 = 34, ## !< GPIO34, input and output - GPIO_NUM_35 = 35, ## !< GPIO35, input and output - GPIO_NUM_36 = 36, ## !< GPIO36, input and output - GPIO_NUM_37 = 37, ## !< GPIO37, input and output - GPIO_NUM_38 = 38, ## !< GPIO38, input and output - GPIO_NUM_39 = 39, ## !< GPIO39, input and output - GPIO_NUM_40 = 40, ## !< GPIO40, input and output - GPIO_NUM_41 = 41, ## !< GPIO41, input and output - GPIO_NUM_42 = 42, ## !< GPIO42, input and output - GPIO_NUM_43 = 43, ## !< GPIO43, input and output - GPIO_NUM_44 = 44, ## !< GPIO44, input and output - GPIO_NUM_45 = 45, ## !< GPIO45, input and output - GPIO_NUM_46 = 46, ## !< GPIO46, input and output - GPIO_NUM_47 = 47, ## !< GPIO47, input and output - GPIO_NUM_48 = 48, ## !< GPIO48, input and output - GPIO_NUM_MAX = 49 ## * @endcond + GPIO_NUM_34 = 34, ## !< GPIO34, input mode only + GPIO_NUM_35 = 35, ## !< GPIO35, input mode only + GPIO_NUM_36 = 36, ## !< GPIO36, input mode only + GPIO_NUM_37 = 37, ## !< GPIO37, input mode only + GPIO_NUM_38 = 38, ## !< GPIO38, input mode only + GPIO_NUM_39 = 39, ## !< GPIO39, input mode only + GPIO_NUM_MAX = 40 ## * @endcond + const GPIO_SEL_0* = (BIT(0)) ## !< Pin 0 selected @@ -131,19 +159,22 @@ const GPIO_SEL_18* = (BIT(18)) ## !< Pin 18 selected GPIO_SEL_19* = (BIT(19)) ## !< Pin 19 selected GPIO_SEL_21* = (BIT(21)) ## !< Pin 21 selected - GPIO_SEL_22* = (BIT(22)) ## !< Pin 22 selected - GPIO_SEL_23* = (BIT(23)) ## !< Pin 23 selected - GPIO_SEL_25* = (BIT(25)) ## !< Pin 25 selected - GPIO_SEL_26* = (BIT(26)) ## !< Pin 26 selected - GPIO_SEL_27* = (BIT(27)) ## !< Pin 27 selected - GPIO_SEL_32* = ((uint64)((cast[uint64](1)) shl 32)) ## !< Pin 32 selected - GPIO_SEL_33* = ((uint64)((cast[uint64](1)) shl 33)) ## !< Pin 33 selected - GPIO_SEL_34* = ((uint64)((cast[uint64](1)) shl 34)) ## !< Pin 34 selected - GPIO_SEL_35* = ((uint64)((cast[uint64](1)) shl 35)) ## !< Pin 35 selected - GPIO_SEL_36* = ((uint64)((cast[uint64](1)) shl 36)) ## !< Pin 36 selected - GPIO_SEL_37* = ((uint64)((cast[uint64](1)) shl 37)) ## !< Pin 37 selected - GPIO_SEL_38* = ((uint64)((cast[uint64](1)) shl 38)) ## !< Pin 38 selected - GPIO_SEL_39* = ((uint64)((cast[uint64](1)) shl 39)) ## !< Pin 39 selected + +when not defined(esp32c3): + const + GPIO_SEL_22* = (BIT(22)) ## !< Pin 22 selected + GPIO_SEL_23* = (BIT(23)) ## !< Pin 23 selected + GPIO_SEL_25* = (BIT(25)) ## !< Pin 25 selected + GPIO_SEL_26* = (BIT(26)) ## !< Pin 26 selected + GPIO_SEL_27* = (BIT(27)) ## !< Pin 27 selected + GPIO_SEL_32* = ((uint64)((cast[uint64](1)) shl 32)) ## !< Pin 32 selected + GPIO_SEL_33* = ((uint64)((cast[uint64](1)) shl 33)) ## !< Pin 33 selected + GPIO_SEL_34* = ((uint64)((cast[uint64](1)) shl 34)) ## !< Pin 34 selected + GPIO_SEL_35* = ((uint64)((cast[uint64](1)) shl 35)) ## !< Pin 35 selected + GPIO_SEL_36* = ((uint64)((cast[uint64](1)) shl 36)) ## !< Pin 36 selected + GPIO_SEL_37* = ((uint64)((cast[uint64](1)) shl 37)) ## !< Pin 37 selected + GPIO_SEL_38* = ((uint64)((cast[uint64](1)) shl 38)) ## !< Pin 38 selected + GPIO_SEL_39* = ((uint64)((cast[uint64](1)) shl 39)) ## !< Pin 39 selected # Adds the extra pin sels when defined(esp32s3): @@ -158,7 +189,7 @@ when defined(esp32s3): GPIO_SEL_47* = ((uint64)((cast[uint64](1)) shl 47)) GPIO_SEL_48* = ((uint64)((cast[uint64](1)) shl 48)) -when not defined(esp32s3): +when defined(esp32s3): var GPIO_PIN_REG_0* = IO_MUX_GPIO0_REG GPIO_PIN_REG_1* = IO_MUX_GPIO1_REG @@ -182,11 +213,12 @@ when not defined(esp32s3): GPIO_PIN_REG_19* = IO_MUX_GPIO19_REG GPIO_PIN_REG_20* = IO_MUX_GPIO20_REG GPIO_PIN_REG_21* = IO_MUX_GPIO21_REG - GPIO_PIN_REG_22* = IO_MUX_GPIO22_REG - GPIO_PIN_REG_23* = IO_MUX_GPIO23_REG - GPIO_PIN_REG_25* = IO_MUX_GPIO25_REG GPIO_PIN_REG_26* = IO_MUX_GPIO26_REG GPIO_PIN_REG_27* = IO_MUX_GPIO27_REG + GPIO_PIN_REG_28* = IO_MUX_GPIO28_REG + GPIO_PIN_REG_29* = IO_MUX_GPIO29_REG + GPIO_PIN_REG_30* = IO_MUX_GPIO30_REG + GPIO_PIN_REG_31* = IO_MUX_GPIO31_REG GPIO_PIN_REG_32* = IO_MUX_GPIO32_REG GPIO_PIN_REG_33* = IO_MUX_GPIO33_REG GPIO_PIN_REG_34* = IO_MUX_GPIO34_REG @@ -195,6 +227,40 @@ when not defined(esp32s3): GPIO_PIN_REG_37* = IO_MUX_GPIO37_REG GPIO_PIN_REG_38* = IO_MUX_GPIO38_REG GPIO_PIN_REG_39* = IO_MUX_GPIO39_REG + GPIO_PIN_REG_40* = IO_MUX_GPIO40_REG + GPIO_PIN_REG_41* = IO_MUX_GPIO41_REG + GPIO_PIN_REG_42* = IO_MUX_GPIO42_REG + GPIO_PIN_REG_43* = IO_MUX_GPIO43_REG + GPIO_PIN_REG_44* = IO_MUX_GPIO44_REG + GPIO_PIN_REG_45* = IO_MUX_GPIO45_REG + GPIO_PIN_REG_46* = IO_MUX_GPIO46_REG + GPIO_PIN_REG_47* = IO_MUX_GPIO47_REG + GPIO_PIN_REG_48* = IO_MUX_GPIO48_REG +elif defined(esp32c3): + var + GPIO_PIN_REG_0* = IO_MUX_GPIO0_REG + GPIO_PIN_REG_1* = IO_MUX_GPIO1_REG + GPIO_PIN_REG_2* = IO_MUX_GPIO2_REG + GPIO_PIN_REG_3* = IO_MUX_GPIO3_REG + GPIO_PIN_REG_4* = IO_MUX_GPIO4_REG + GPIO_PIN_REG_5* = IO_MUX_GPIO5_REG + GPIO_PIN_REG_6* = IO_MUX_GPIO6_REG + GPIO_PIN_REG_7* = IO_MUX_GPIO7_REG + GPIO_PIN_REG_8* = IO_MUX_GPIO8_REG + GPIO_PIN_REG_9* = IO_MUX_GPIO9_REG + GPIO_PIN_REG_10* = IO_MUX_GPIO10_REG + GPIO_PIN_REG_11* = IO_MUX_GPIO11_REG + GPIO_PIN_REG_12* = IO_MUX_GPIO12_REG + GPIO_PIN_REG_13* = IO_MUX_GPIO13_REG + GPIO_PIN_REG_14* = IO_MUX_GPIO14_REG + GPIO_PIN_REG_15* = IO_MUX_GPIO15_REG + GPIO_PIN_REG_16* = IO_MUX_GPIO16_REG + GPIO_PIN_REG_17* = IO_MUX_GPIO17_REG + GPIO_PIN_REG_18* = IO_MUX_GPIO18_REG + GPIO_PIN_REG_19* = IO_MUX_GPIO19_REG + GPIO_PIN_REG_20* = IO_MUX_GPIO20_REG + GPIO_PIN_REG_21* = IO_MUX_GPIO21_REG + else: var GPIO_PIN_REG_0* = IO_MUX_GPIO0_REG @@ -219,12 +285,11 @@ else: GPIO_PIN_REG_19* = IO_MUX_GPIO19_REG GPIO_PIN_REG_20* = IO_MUX_GPIO20_REG GPIO_PIN_REG_21* = IO_MUX_GPIO21_REG + GPIO_PIN_REG_22* = IO_MUX_GPIO22_REG + GPIO_PIN_REG_23* = IO_MUX_GPIO23_REG + GPIO_PIN_REG_25* = IO_MUX_GPIO25_REG GPIO_PIN_REG_26* = IO_MUX_GPIO26_REG GPIO_PIN_REG_27* = IO_MUX_GPIO27_REG - GPIO_PIN_REG_28* = IO_MUX_GPIO28_REG - GPIO_PIN_REG_29* = IO_MUX_GPIO29_REG - GPIO_PIN_REG_30* = IO_MUX_GPIO30_REG - GPIO_PIN_REG_31* = IO_MUX_GPIO31_REG GPIO_PIN_REG_32* = IO_MUX_GPIO32_REG GPIO_PIN_REG_33* = IO_MUX_GPIO33_REG GPIO_PIN_REG_34* = IO_MUX_GPIO34_REG @@ -233,15 +298,6 @@ else: GPIO_PIN_REG_37* = IO_MUX_GPIO37_REG GPIO_PIN_REG_38* = IO_MUX_GPIO38_REG GPIO_PIN_REG_39* = IO_MUX_GPIO39_REG - GPIO_PIN_REG_40* = IO_MUX_GPIO40_REG - GPIO_PIN_REG_41* = IO_MUX_GPIO41_REG - GPIO_PIN_REG_42* = IO_MUX_GPIO42_REG - GPIO_PIN_REG_43* = IO_MUX_GPIO43_REG - GPIO_PIN_REG_44* = IO_MUX_GPIO44_REG - GPIO_PIN_REG_45* = IO_MUX_GPIO45_REG - GPIO_PIN_REG_46* = IO_MUX_GPIO46_REG - GPIO_PIN_REG_47* = IO_MUX_GPIO47_REG - GPIO_PIN_REG_48* = IO_MUX_GPIO48_REG const GPIO_APP_CPU_INTR_ENA* = BIT(0) diff --git a/src/nesper/esp/driver/io_mux_reg.nim b/src/nesper/esp/driver/io_mux_reg.nim index b0acb1b..434e9d9 100644 --- a/src/nesper/esp/driver/io_mux_reg.nim +++ b/src/nesper/esp/driver/io_mux_reg.nim @@ -1,6 +1,8 @@ # Entry-point for the board-specific io_mux_reg.h ports - -when not defined(esp32s3): - include ./esp32/io_mux_reg +const esp32c3=true +when defined(esp32s3): + include ./esp32s3/io_mux_reg +elif defined(esp32c3): + include ./esp32c3/io_mux_reg else: - include ./esp32s3/io_mux_reg \ No newline at end of file + include ./esp32/io_mux_reg \ No newline at end of file