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Cannot parse 5.99 footprints #40

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CatoLynx opened this issue Nov 21, 2021 · 1 comment
Open

Cannot parse 5.99 footprints #40

CatoLynx opened this issue Nov 21, 2021 · 1 comment

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@CatoLynx
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When trying to open a .kicad_mod footprint generated with KiCad 5.99 nightly, I get the exception pyparsing.exceptions.ParseException: Expected 'module', found 'footprint' (at char 1), (line:1, col:2). Even when I rename "footprint" to "module" in the .kicad_mod file, I get different errors. It seems that there has been a change in the file format which should be supported in this library.

@sequoia-hope
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Hmm yeah, here is a working older .kicad_mod file versus a non working newer file.

Older:

(module R_0805_2012Metric (layer F.Cu) (tedit 5F68FEEE)
  (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
  (tags resistor)
  (attr smd)
  (fp_text reference REF** (at 0 -1.65) (layer F.SilkS)
    (effects (font (size 1 1) (thickness 0.15)))
  )
  (fp_text value R_0805_2012Metric (at 0 1.65) (layer F.Fab)
    (effects (font (size 1 1) (thickness 0.15)))
  )
  (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1))
  (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1))
  (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1))
  (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1))
  (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12))
  (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12))
  (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
  (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
  (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
  (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
  (pad 1 smd roundrect (at -0.9125 0) (size 1.025 1.4) (layers F.Cu F.Mask F.Paste) (roundrect_rratio 0.243902))
  (pad 2 smd roundrect (at 0.9125 0) (size 1.025 1.4) (layers F.Cu F.Mask F.Paste) (roundrect_rratio 0.243902))
  (fp_text user %R (at 0 0) (layer F.Fab)
    (effects (font (size 0.5 0.5) (thickness 0.08)))
  )
  (model ${KICAD6_3DMODEL_DIR}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
    (at (xyz 0 0 0))
    (scale (xyz 1 1 1))
    (rotate (xyz 0 0 0))
  )
)

Non working:

(footprint "R_0805_2012Metric" (version 20211014) (generator pcbnew)
  (layer "F.Cu")
  (tedit 5F68FEEE)
  (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
  (tags "resistor")
  (attr smd)
  (fp_text reference "REF**" (at 0 -1.65) (layer "F.SilkS")
    (effects (font (size 1 1) (thickness 0.15)))
    (tstamp effead60-2b17-4463-91cf-34792a2b459a)
  )
  (fp_text value "R_0805_2012Metric" (at 0 1.65) (layer "F.Fab")
    (effects (font (size 1 1) (thickness 0.15)))
    (tstamp 83cd9c78-75b4-4eec-9501-2ff4a6e7a26e)
  )
  (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab")
    (effects (font (size 0.5 0.5) (thickness 0.08)))
    (tstamp b5354c63-16aa-4898-aa0c-eeb3d035fc5f)
  )
  (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer "F.SilkS") (width 0.12) (tstamp 1d1dfe66-8d95-48c7-9468-1437fe352fc9))
  (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer "F.SilkS") (width 0.12) (tstamp 9aaa9150-dbb8-4657-a223-476b55b89dae))
  (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer "F.CrtYd") (width 0.05) (tstamp 245c0818-3ccc-4969-b35b-0d4f8723400e))
  (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer "F.CrtYd") (width 0.05) (tstamp 5b983e02-1ada-4414-ad21-290f1424bf3d))
  (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer "F.CrtYd") (width 0.05) (tstamp c9825373-da58-4067-816d-465cdf887dc6))
  (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer "F.CrtYd") (width 0.05) (tstamp f3d9ee21-ffbd-4620-abbf-7bc99e9f4420))
  (fp_line (start -1 0.625) (end -1 -0.625) (layer "F.Fab") (width 0.1) (tstamp 37f98079-19ff-4dd9-ac60-76d47722b840))
  (fp_line (start 1 0.625) (end -1 0.625) (layer "F.Fab") (width 0.1) (tstamp b0e87530-3bac-4895-be8c-fdb50669192d))
  (fp_line (start 1 -0.625) (end 1 0.625) (layer "F.Fab") (width 0.1) (tstamp b1a33891-38ab-48fb-8542-eb6b9260c23c))
  (fp_line (start -1 -0.625) (end 1 -0.625) (layer "F.Fab") (width 0.1) (tstamp e73c85cd-37bc-422b-91a3-e268ce9a1281))
  (pad "1" smd roundrect (at -0.9125 0) (size 1.025 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.243902) (tstamp 9702d628-9b91-4d58-9130-9271bd872f5b))
  (pad "2" smd roundrect (at 0.9125 0) (size 1.025 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.243902) (tstamp 1ad1544b-7ba3-4927-93fd-ab9c0a8dba06))
  (model "${KICAD6_3DMODEL_DIR}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl"
    (offset (xyz 0 0 0))
    (scale (xyz 1 1 1))
    (rotate (xyz 0 0 0))
  )
)

And as we can see from the error message, the first line in the working one starts with "module" while the new one starts with "footprint".
This seems to correspond to this line of code:
https://github.com/dvc94ch/pykicad/blob/master/pykicad/module.py#L474
I ran a quick test just changing "module" to "footprint" in that line but I got other errors, which is understandable since there are other subtle changes.
I am going to work around this by importing older kicad footprints to generate a board, then adding my other stuff in Kicad6 once the board is generated. But it would be great to support Kicad6! And now Kicad7 is upon us, and I wonder if that will change anything.

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