-
Notifications
You must be signed in to change notification settings - Fork 20
/
Cypress_PSoC.lib
203 lines (203 loc) · 7.29 KB
/
Cypress_PSoC.lib
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# CY8C52??AXI-LP
#
DEF CY8C52??AXI-LP U 0 40 Y Y 8 L N
F0 "U" 200 250 60 H V L CNN
F1 "CY8C52??AXI-LP" 200 150 60 H V L CNN
F2 "" -1025 -125 60 H V C CNN
F3 "" -1025 -125 60 H V C CNN
DRAW
S 200 100 600 -500 1 1 12 N
X VSSD* 14 0 -400 200 R 50 50 1 1 W
X VSSD 66 0 -400 200 R 50 50 1 1 W N
X VCCD 86 0 -200 200 R 50 50 1 1 w N
X VSSD 87 0 -400 200 R 50 50 1 1 W N
X VSSD 38 0 -400 200 R 50 50 1 1 W N
X VDDD 88 0 0 200 R 50 50 1 1 W
X VCCD* 39 0 -200 200 R 50 50 1 1 W
S 200 100 1500 -300 2 1 12 N
X P15[6](D+,SWDIO) 35 0 0 200 R 50 50 2 1 B
X P15[7](D-,SWDCK) 36 0 -100 200 R 50 50 2 1 B
X VDDD 37 0 -200 200 R 50 50 2 1 W
S 200 100 1500 -2000 3 1 12 N
X P1[0](TMS,SWDIO) 20 0 -500 200 R 50 50 3 1 B
X P12[7] 30 0 -1400 200 R 50 50 3 1 B
X P1[1](TCK,SWDCK) 21 0 -600 200 R 50 50 3 1 B
X P5[4] 31 0 -1500 200 R 50 50 3 1 B
X P1[2](~XRES) 22 0 -700 200 R 50 50 3 1 B
X P5[5] 32 0 -1600 200 R 50 50 3 1 B
X P1[3](TDO,SWV) 23 0 -800 200 R 50 50 3 1 B
X P5[6] 33 0 -1700 200 R 50 50 3 1 B
X P1[4](TDI) 24 0 -900 200 R 50 50 3 1 B
X P5[7] 34 0 -1800 200 R 50 50 3 1 B
X ~XRES 15 0 0 200 R 50 50 3 1 I
X P1[5](NTRST) 25 0 -1000 200 R 50 50 3 1 B
X P5[0] 16 0 -100 200 R 50 50 3 1 B
X VDDIO1 26 0 -1900 200 R 50 50 3 1 W
X P5[1] 17 0 -200 200 R 50 50 3 1 B
X P1[6] 27 0 -1100 200 R 50 50 3 1 B
X P5[2] 18 0 -300 200 R 50 50 3 1 B
X P1[7] 28 0 -1200 200 R 50 50 3 1 B
X P5[3] 19 0 -400 200 R 50 50 3 1 B
X P12[6] 29 0 -1300 200 R 50 50 3 1 B
S 200 100 1500 -1500 4 1 12 N
X VDDIO3 50 0 -1400 200 R 50 50 4 1 W
X P3[6](OPAMP1OUT) 51 0 -800 200 R 50 50 4 1 B
X P15[0](MHZ_XTAL:XO) 42 0 0 200 R 50 50 4 1 B
X P3[7](OPAMP3OUT) 52 0 -900 200 R 50 50 4 1 B
X P15[1](MHZ_XTAL:XI) 43 0 -100 200 R 50 50 4 1 B
X P12[0](SIO,I2C1:SCL) 53 0 -1000 200 R 50 50 4 1 B
X P3[0](IDAC1) 44 0 -200 200 R 50 50 4 1 B
X P12[1](SIO,I2C1:SDA) 54 0 -1100 200 R 50 50 4 1 B
X P3[1](IDAC3) 45 0 -300 200 R 50 50 4 1 B
X P15[2](KHZ_XTAL:XO) 55 0 -1200 200 R 50 50 4 1 B
X P3[2](OPAMP3-/EXTREF1) 46 0 -400 200 R 50 50 4 1 B
X P15[3](KHZ_XTAL:XI) 56 0 -1300 200 R 50 50 4 1 B
X P3[3](OPAMP3+) 47 0 -500 200 R 50 50 4 1 B
X P3[4](OPAMP1-) 48 0 -600 200 R 50 50 4 1 B
X P3[5](OPAMP1+) 49 0 -700 200 R 50 50 4 1 B
S 200 100 1500 -1900 5 1 12 N
X P4[1] 70 0 -300 200 R 50 50 5 1 B
X P4[2] 80 0 -1200 200 R 50 50 5 1 B
X P0[0](OPAMP2OUT) 71 0 -400 200 R 50 50 5 1 B
X P4[3] 81 0 -1300 200 R 50 50 5 1 B
X P0[1](OPAMP0OUT) 72 0 -500 200 R 50 50 5 1 B
X P4[4] 82 0 -1400 200 R 50 50 5 1 B
X P0[2](OPAMP0+/SAR1_EXTREF) 73 0 -600 200 R 50 50 5 1 B
X P4[5] 83 0 -1500 200 R 50 50 5 1 B
X P0[3](OPAMP0-/EXTREF0) 74 0 -700 200 R 50 50 5 1 B
X P4[6] 84 0 -1600 200 R 50 50 5 1 B
X VDDIO0 75 0 -1800 200 R 50 50 5 1 W
X P4[7] 85 0 -1700 200 R 50 50 5 1 B
X P0[4](OPAMP2+/SAR0_EXTREF) 76 0 -800 200 R 50 50 5 1 B
X P12[2](SIO) 67 0 0 200 R 50 50 5 1 B
X P0[5](OPAMP2-) 77 0 -900 200 R 50 50 5 1 B
X P12[3](SIO) 68 0 -100 200 R 50 50 5 1 B
X P0[6](IDAC0) 78 0 -1000 200 R 50 50 5 1 B
X P4[0] 69 0 -200 200 R 50 50 5 1 B
X P0[7](IDAC2) 79 0 -1100 200 R 50 50 5 1 B
S 200 100 1500 -2100 6 1 12 N
X P2[5](TRACEDATA[1]) 1 0 -1100 200 R 50 50 6 1 B
X P2[6](TRACEDATA[2]) 2 0 -1200 200 R 50 50 6 1 B
X P2[7](TRACEDATA[3]) 3 0 -1300 200 R 50 50 6 1 B
X P12[4](SIO,I2C0:SCL) 4 0 -1400 200 R 50 50 6 1 B
X P12[5](SIO,I2C0:SDA) 5 0 -1500 200 R 50 50 6 1 B
X P6[4] 6 0 -1600 200 R 50 50 6 1 B
X P6[5] 7 0 -1700 200 R 50 50 6 1 B
X P6[6] 8 0 -1800 200 R 50 50 6 1 B
X P6[7] 9 0 -1900 200 R 50 50 6 1 B
X P6[1] 90 0 -100 200 R 50 50 6 1 B
X P6[2] 91 0 -200 200 R 50 50 6 1 B
X P6[3] 92 0 -300 200 R 50 50 6 1 B
X P15[4] 93 0 -400 200 R 50 50 6 1 B
X P15[5] 94 0 -500 200 R 50 50 6 1 B
X P2[0] 95 0 -600 200 R 50 50 6 1 B
X P2[1] 96 0 -700 200 R 50 50 6 1 B
X P2[2] 97 0 -800 200 R 50 50 6 1 B
X P2[3](TRACECLK) 98 0 -900 200 R 50 50 6 1 B
X P6[0] 89 0 0 200 R 50 50 6 1 B
X P2[4](TRACEDATA[0]) 99 0 -1000 200 R 50 50 6 1 B
X VDDIO2 100 0 -2000 200 R 50 50 6 1 W
S 200 100 600 -500 7 1 12 N
X VCCA 63 0 -200 200 R 50 50 7 1 w
X VSSA 64 0 -400 200 R 50 50 7 1 W
X VDDA 65 0 0 200 R 50 50 7 1 W
S 200 100 600 -700 8 1 12 N
X VSSB 10 0 -600 200 R 50 50 8 1 W
X IND 11 0 -200 200 R 50 50 8 1 P
X VBOOST 12 0 0 200 R 50 50 8 1 I
X VBAT 13 0 -400 200 R 50 50 8 1 W
ENDDRAW
ENDDEF
#
# CY8C52??LTI-LP
#
DEF CY8C52??LTI-LP U 0 40 Y Y 8 L N
F0 "U" 200 250 60 H V L CNN
F1 "CY8C52??LTI-LP" 200 150 60 H V L CNN
F2 "" -1025 -125 60 H V C CNN
F3 "" -1025 -125 60 H V C CNN
DRAW
S 200 100 600 -500 1 1 12 N
X VSSD* 9 0 -400 200 R 50 50 1 1 W
X VSSD 25 0 -400 200 R 50 50 1 1 W N
X VSSD 45 0 -400 200 R 50 50 1 1 W N
X VCCD* 26 0 -200 200 R 50 50 1 1 w
X VCCD 57 0 -200 200 R 50 50 1 1 W N
X VSSD 58 0 -400 200 R 50 50 1 1 W N
X VDDD 59 0 0 200 R 50 50 1 1 W
X VSSD DPAD 0 -400 200 R 50 50 1 1 W N
S 200 100 1500 -300 2 1 12 N
X P15[6](D+,SWDIO) 22 0 0 200 R 50 50 2 1 B
X P15[7](D-,SWDCK) 23 0 -100 200 R 50 50 2 1 B
X VDDD 24 0 -200 200 R 50 50 2 1 W
S 200 100 1500 -1200 3 1 12 N
X ~XRES 10 0 0 200 R 50 50 3 1 I
X P12[6] 20 0 -900 200 R 50 50 3 1 B
X P1[0](TMS,SWDIO) 11 0 -100 200 R 50 50 3 1 B
X P12[7] 21 0 -1000 200 R 50 50 3 1 B
X P1[1](TCK,SWDCK) 12 0 -200 200 R 50 50 3 1 B
X P1[2](~XRES) 13 0 -300 200 R 50 50 3 1 B
X P1[3](TDO,SWV) 14 0 -400 200 R 50 50 3 1 B
X P1[4](TDI) 15 0 -500 200 R 50 50 3 1 B
X P1[5](NTRST) 16 0 -600 200 R 50 50 3 1 B
X VDDIO1 17 0 -1100 200 R 50 50 3 1 W
X P1[6] 18 0 -700 200 R 50 50 3 1 B
X P1[7] 19 0 -800 200 R 50 50 3 1 B
S 200 100 1500 -1500 4 1 12 N
X P3[1] 30 0 -300 200 R 50 50 4 1 B
X P15[2](KHZ_XTAL:XO) 40 0 -1200 200 R 50 50 4 1 B
X P3[2](EXTREF1) 31 0 -400 200 R 50 50 4 1 B
X P15[3](KHZ_XTAL:XI) 41 0 -1300 200 R 50 50 4 1 B
X P3[3] 32 0 -500 200 R 50 50 4 1 B
X P3[4] 33 0 -600 200 R 50 50 4 1 B
X P3[5] 34 0 -700 200 R 50 50 4 1 B
X VDDIO3 35 0 -1400 200 R 50 50 4 1 W
X P3[6] 36 0 -800 200 R 50 50 4 1 B
X P15[0](MHZ_XTAL:XO) 27 0 0 200 R 50 50 4 1 B
X P3[7] 37 0 -900 200 R 50 50 4 1 B
X P15[1](MHZ_XTAL:XI) 28 0 -100 200 R 50 50 4 1 B
X P12[0](SIO,I2C1:SCL) 38 0 -1000 200 R 50 50 4 1 B
X P3[0] 29 0 -200 200 R 50 50 4 1 B
X P12[1](SIO,I2C1:SDA) 39 0 -1100 200 R 50 50 4 1 B
S 200 100 1500 -1100 5 1 12 N
X P0[2] 50 0 -400 200 R 50 50 5 1 B
X P0[3](EXTREF0) 51 0 -500 200 R 50 50 5 1 B
X VDDIO0 52 0 -1000 200 R 50 50 5 1 W
X P0[4] 53 0 -600 200 R 50 50 5 1 B
X P0[5] 54 0 -700 200 R 50 50 5 1 B
X P0[6](IDAC0) 55 0 -800 200 R 50 50 5 1 B
X P12[2](SIO) 46 0 0 200 R 50 50 5 1 B
X P0[7] 56 0 -900 200 R 50 50 5 1 B
X P12[3] 47 0 -100 200 R 50 50 5 1 B
X P0[0] 48 0 -200 200 R 50 50 5 1 B
X P0[1] 49 0 -300 200 R 50 50 5 1 B
S 200 100 1500 -1300 6 1 12 N
X P2[6](TRACEDATA[2]) 1 0 -800 200 R 50 50 6 1 B
X P2[7](TRACEDATA[3]) 2 0 -900 200 R 50 50 6 1 B
X P12[4](SIO,I2C0:SCL) 3 0 -1000 200 R 50 50 6 1 B
X P12[5](SIO,I2C0:SDA) 4 0 -1100 200 R 50 50 6 1 B
X P15[4] 60 0 0 200 R 50 50 6 1 B
X P15[5] 61 0 -100 200 R 50 50 6 1 B
X P2[0] 62 0 -200 200 R 50 50 6 1 B
X P2[1] 63 0 -300 200 R 50 50 6 1 B
X P2[2] 64 0 -400 200 R 50 50 6 1 B
X P2[3](TRACECLK) 65 0 -500 200 R 50 50 6 1 B
X P2[4](TRACEDATA[0]) 66 0 -600 200 R 50 50 6 1 B
X VDDIO2 67 0 -1200 200 R 50 50 6 1 W
X P2[5](TRACEDATA[1]) 68 0 -700 200 R 50 50 6 1 B
S 200 100 600 -500 7 1 12 N
X VCCA 42 0 -200 200 R 50 50 7 1 w
X VSSA 43 0 -400 200 R 50 50 7 1 W
X VDDA 44 0 0 200 R 50 50 7 1 W
S 200 100 600 -700 8 1 12 N
X VSSB 5 0 -600 200 R 50 50 8 1 W
X IND 6 0 -200 200 R 50 50 8 1 P
X VBOOST 7 0 0 200 R 50 50 8 1 I
X VBAT 8 0 -400 200 R 50 50 8 1 W
ENDDRAW
ENDDEF
#
#End Library