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Tests: Fix last commit on width (verilator#4781).
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test_regress/t/t_math_wide_bad.out

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@@ -2,10 +2,10 @@
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23 | assign r = real'(a);
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| ^~~~
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... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
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%Error-UNSUPPORTED: t/t_math_wide_bad.v:22:18: Unsupported: operator POWSS operator of 576 bits exceeds hardcoded limit VL_MULS_MAX_WORDS in verilatedos.h
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%Error-UNSUPPORTED: t/t_math_wide_bad.v:22:18: Unsupported: operator POWSS operator of 5472 bits exceeds hardcoded limit VL_MULS_MAX_WORDS in verilatedos.h
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22 | assign z2 = a ** 3;
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| ^~
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%Error-UNSUPPORTED: t/t_math_wide_bad.v:21:17: Unsupported: operator MULS operator of 576 bits exceeds hardcoded limit VL_MULS_MAX_WORDS in verilatedos.h
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%Error-UNSUPPORTED: t/t_math_wide_bad.v:21:17: Unsupported: operator MULS operator of 5472 bits exceeds hardcoded limit VL_MULS_MAX_WORDS in verilatedos.h
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21 | assign z = a * b;
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| ^
1111
%Error: Exiting due to

test_regress/t/t_math_wide_bad.v

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@@ -11,11 +11,11 @@ module t (/*AUTOARG*/
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a, b
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);
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input signed [17*32 : 0] a;
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input signed [17*32 : 0] b;
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input signed [170*32 : 0] a;
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input signed [170*32 : 0] b;
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output signed [17*32 : 0] z;
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output signed [17*32 : 0] z2;
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output signed [170*32 : 0] z;
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output signed [170*32 : 0] z2;
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output real r;
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assign z = a * b;

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