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Welcome to Compute General Lab (CGL)

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CGL Research Areas

A brief Record for the CGL's recent to do list (check CGL SCHEDULE for more detials and progress)

General Computing

CPU ARCH CG0

• CG0 RISC-V GV based Superscalar CPU Modeling.
• CG0 Compiler
  • Dragon book backend study

GPU ARCH CG1

• Compute API Notes
• Compute Notes
• CG1 Compute Specification
  • CG1 Scalar GPU ISA Specification( Memory Model Study)
  • SIMT Unified Shader Arch/MicroArch Specification (Work Distributer,fused Stream Processor)
• CG1 Modeling
  • High-level Analytical Performance Model(PMDL) and Energy Model(EMDL)
  • Highly abstracted behavior model (BMDL)
  • Low Level Algorithm Sharing between Functional CModel(CMDL) and Architecture/Cycle Model(AMDL)
  • HLS flow to generate Verilog Model (VMDL), and EDA flow for power and area estimation. (MatchLib integrate into CG1 )
• CG1 Compiler
  • Compiler backend code study

Compute Graphics

• Graphics API Notes
• Graphics Notes
• CG1 Graphics Specification
  • Raster based module Specification
  • Ray Tracing based module Specification
• CG1 Modeling
  • Algorithm sharing between CMDL and AMDL.

Deep Learning

• DeepLearning Framework Notes
• DeepLearning Notes
• NVDLA $\to$ CG2

Analysis TOOLs

• GPUVIS update for trace/statistics visualization
• API Trace and playback
• CMD Trace and playback system (Verification)
• Compute/Graphic Execution Trace
• Probe Statistics profiling (driver)
• R Language Study

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