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1 | 1 | #include <ATen/cuda/CUDAConfig.h> // for the definition of AT_CUDNN_ENABLED |
2 | 2 |
|
3 | | -#if AT_CUDNN_ENABLED() && defined(CUDNN_VERSION) && CUDNN_VERSION >= 8000 |
4 | | -// Coming soon |
5 | | -#endif // AT_CUDNN_ENABLED and CUDNN_VERSION |
| 3 | +#if AT_CUDNN_ENABLED() |
| 4 | + |
| 5 | +#include <ATen/native/cudnn/Macros.h> |
| 6 | + |
| 7 | +#if HAS_CUDNN_V8() |
| 8 | + |
| 9 | +#include <ATen/cudnn/cudnn-wrapper.h> |
| 10 | +#include <cudnn_frontend.h> |
| 11 | +#include <ATen/ATen.h> |
| 12 | +#include <ATen/TensorUtils.h> |
| 13 | +#include <ATen/cuda/Exceptions.h> |
| 14 | +#include <ATen/native/ConvUtils.h> |
| 15 | +#include <ATen/native/cudnn/ConvShared.h> |
| 16 | +#include <ATen/native/utils/ParamsHash.h> |
| 17 | +#include <ATen/cudnn/Handle.h> |
| 18 | +#include <ATen/TensorUtils.h> |
| 19 | + |
| 20 | +#include <unordered_map> |
| 21 | + |
| 22 | +namespace at { namespace native{ |
| 23 | + |
| 24 | +namespace { |
| 25 | + |
| 26 | +uint8_t getAlignment(const Tensor &t) { |
| 27 | + // alignment are in bytes |
| 28 | + uint8_t alignment = 1; |
| 29 | + uint64_t address = reinterpret_cast<uint64_t>(t.data_ptr()); |
| 30 | + while (address % alignment == 0 && alignment < 16) alignment *= 2; |
| 31 | + return alignment; |
| 32 | +} |
| 33 | + |
| 34 | +cudnn_frontend::Tensor getTensorDescriptor(const Tensor &t, int64_t id, uint8_t alignment) { |
| 35 | + auto shape = t.sizes(); |
| 36 | + auto strides = t.strides(); |
| 37 | + return cudnn_frontend::TensorBuilder() |
| 38 | + .setDim(shape.size(), shape.data()) |
| 39 | + .setStrides(strides.size(), strides.data()) |
| 40 | + .setId(id) |
| 41 | + .setAlignment(alignment) |
| 42 | + .setDataType(getCudnnDataType(t)) |
| 43 | + .build(); |
| 44 | +} |
| 45 | + |
| 46 | +cudnn_frontend::ConvDesc_v8 getConvDescriptor(cudnnDataType_t dataType, IntArrayRef padding, IntArrayRef stride, IntArrayRef dilation) { |
| 47 | + uint64_t convDim = stride.size(); |
| 48 | + return cudnn_frontend::ConvDescBuilder() |
| 49 | + .setDataType(dataType) |
| 50 | + .setMathMode(CUDNN_CROSS_CORRELATION) |
| 51 | + .setNDims(convDim) |
| 52 | + .setStrides(convDim, stride.data()) |
| 53 | + .setPrePadding(convDim, padding.data()) |
| 54 | + .setPostPadding(convDim, padding.data()) |
| 55 | + .setDilation(convDim, dilation.data()) |
| 56 | + .build(); |
| 57 | +} |
| 58 | + |
| 59 | +void filterEngineConfigs( |
| 60 | + cudnn_frontend::EngineConfigList &from, |
| 61 | + cudnn_frontend::EngineConfigList &to, |
| 62 | + bool deterministic, bool allow_tf32, c10::ScalarType scalar_type) |
| 63 | +{ |
| 64 | + auto filter = [=](cudnnBackendDescriptor_t c) { |
| 65 | + if (deterministic) { |
| 66 | + if (cudnn_frontend::hasNumericalNote<CUDNN_NUMERICAL_NOTE_NONDETERMINISTIC>(c)) return true; |
| 67 | + } |
| 68 | + if (scalar_type == kFloat || !allow_tf32) { |
| 69 | + if (cudnn_frontend::hasNumericalNote<CUDNN_NUMERICAL_NOTE_DOWN_CONVERT_INPUTS>(c)) return true; |
| 70 | + if (cudnn_frontend::hasNumericalNote<CUDNN_NUMERICAL_NOTE_TENSOR_CORE>(c)) return true; |
| 71 | + } |
| 72 | + return false; |
| 73 | + }; |
| 74 | + cudnn_frontend::filter(from, to, filter); |
| 75 | +} |
| 76 | + |
| 77 | +struct CacheKey { |
| 78 | + ConvolutionParams params; |
| 79 | + uint8_t input_alignment; |
| 80 | + uint8_t weight_alignment; |
| 81 | + uint8_t output_alignment; |
| 82 | +}; |
| 83 | + |
| 84 | +// FIXME: make this thread-safe by reusing the benchmark cache in Conv_v7.cpp |
| 85 | +std::unordered_map<CacheKey, cudnn_frontend::ManagedOpaqueDescriptor, ParamsHash<CacheKey>, ParamsEqual<CacheKey>> engine_cache; |
| 86 | + |
| 87 | +} |
| 88 | + |
| 89 | +void raw_cudnn_convolution_forward_out( |
| 90 | + const Tensor& output, const Tensor& input, const Tensor& weight, |
| 91 | + IntArrayRef padding, IntArrayRef stride, IntArrayRef dilation, int64_t groups, |
| 92 | + bool benchmark, bool deterministic, bool allow_tf32) |
| 93 | +{ |
| 94 | + TORCH_CHECK(!benchmark, "not supported yet"); |
| 95 | + if (output.numel() == 0) { |
| 96 | + return; |
| 97 | + } |
| 98 | + |
| 99 | + cudnnHandle_t handle = getCudnnHandle(); |
| 100 | + |
| 101 | + CacheKey key; |
| 102 | + setConvolutionParams(&key.params, input, weight, padding, stride, dilation, groups, deterministic, allow_tf32); |
| 103 | + key.input_alignment = getAlignment(input); |
| 104 | + key.output_alignment = getAlignment(output); |
| 105 | + key.weight_alignment = getAlignment(weight); |
| 106 | + |
| 107 | + auto run = [&](cudnn_frontend::ManagedOpaqueDescriptor cfg) { |
| 108 | + auto plan = cudnn_frontend::ExecutionPlanBuilder() |
| 109 | + .setHandle(handle) |
| 110 | + .setEngineConfig(cfg) |
| 111 | + .build(); |
| 112 | + |
| 113 | + auto workspace_size = plan.getWorkspaceSize(); |
| 114 | + auto workspace = at::empty({workspace_size}, input.options().dtype(kByte)); |
| 115 | + void *data_ptrs[] = {input.data_ptr(), output.data_ptr(), weight.data_ptr()}; |
| 116 | + // std::cout << plan.describe() << " requires workspace " << workspace_size << std::endl; |
| 117 | + int64_t uids[] = {'x', 'y', 'w'}; |
| 118 | + auto variantPack = cudnn_frontend::VariantPackBuilder() |
| 119 | + .setWorkspacePointer(workspace.data_ptr()) |
| 120 | + .setDataPointers(3, data_ptrs) |
| 121 | + .setUids(3, uids) |
| 122 | + .build(); |
| 123 | + AT_CUDNN_CHECK(cudnnBackendExecute(handle, plan.get_raw_desc(), variantPack.get_raw_desc())); |
| 124 | + }; |
| 125 | + |
| 126 | + auto search = engine_cache.find(key); |
| 127 | + if (search != engine_cache.end()) { |
| 128 | + run(search->second); |
| 129 | + return; |
| 130 | + } |
| 131 | + |
| 132 | + auto op = cudnn_frontend::OperationBuilder(CUDNN_BACKEND_OPERATION_CONVOLUTION_FORWARD_DESCRIPTOR) |
| 133 | + .setxDesc(getTensorDescriptor(input, 'x', key.input_alignment)) |
| 134 | + .setyDesc(getTensorDescriptor(output, 'y', key.output_alignment)) |
| 135 | + .setwDesc(getTensorDescriptor(weight, 'w', key.weight_alignment)) |
| 136 | + .setcDesc(getConvDescriptor(key.params.dataType, padding, stride, dilation)) |
| 137 | + .build(); |
| 138 | + // std::cout << op.describe() << std::endl; |
| 139 | + |
| 140 | + std::array<cudnn_frontend::Operation const *, 1> ops = {&op}; |
| 141 | + |
| 142 | + auto opGraph = cudnn_frontend::OperationGraphBuilder() |
| 143 | + .setHandle(handle) |
| 144 | + .setOperationGraph(1, ops.data()) |
| 145 | + .build(); |
| 146 | + // std::cout << opGraph.describe() << std::endl; |
| 147 | + |
| 148 | + auto heuristics = cudnn_frontend::EngineHeuristicsBuilder() |
| 149 | + .setOperationGraph(opGraph) |
| 150 | + .setHeurMode(CUDNN_HEUR_MODE_INSTANT) |
| 151 | + .build(); |
| 152 | + auto fallback = cudnn_frontend::EngineFallbackListBuilder() |
| 153 | + .setOperationGraph(opGraph) |
| 154 | + .setOperation(CUDNN_BACKEND_OPERATION_CONVOLUTION_FORWARD_DESCRIPTOR) |
| 155 | + .build(); |
| 156 | + |
| 157 | + auto& engine_configs = heuristics.getEngineConfig(heuristics.getEngineConfigCount()); |
| 158 | + auto& fallback_list = fallback.getFallbackList(); |
| 159 | + |
| 160 | + cudnn_frontend::EngineConfigList filtered_configs; |
| 161 | + filterEngineConfigs(engine_configs, filtered_configs, deterministic, allow_tf32, input.scalar_type()); |
| 162 | + filterEngineConfigs(fallback_list, filtered_configs, deterministic, allow_tf32, input.scalar_type()); |
| 163 | + |
| 164 | + for (auto &cfg : filtered_configs) { |
| 165 | + try { |
| 166 | + run(cfg); |
| 167 | + engine_cache[key] = cfg; |
| 168 | + return; |
| 169 | + } catch (cudnn_frontend::cudnnException &e) {} catch(CuDNNError &e) {} |
| 170 | + } |
| 171 | + TORCH_CHECK(false, "Unable to find an engine to execute this computation"); |
| 172 | +} |
| 173 | + |
| 174 | +}} // at::native |
| 175 | + |
| 176 | +#endif // HAS_CUDNN_V8 |
| 177 | +#endif // AT_CUDNN_ENABLED |
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