From 38fdb1b892e8cc59ca669b2eba7fb79736b7b754 Mon Sep 17 00:00:00 2001 From: calebmkim <55243755+calebmkim@users.noreply.github.com> Date: Sun, 29 Sep 2024 13:19:50 -0400 Subject: [PATCH] Improve Static FSM Compilation (#2215) Implements the ideas from #2207. Apologies for the gigantic PR, there are a couple reasons why it is so big: 1) It represents a big change in the compiler 2) I didn't know if it was going to even be worth it to implement these changes to the compiler, so I implemented some improvements to the compilation process that complicated the code (but [improved](https://github.com/orgs/calyxir/discussions/2202#discussioncomment-10014608) results). There are some minor changes to `static_inline.rs` (in particular, inlining `static par` blocks is more complicated now because we can't merge always just merge all threads of a `static par` into the same group). There are some changes to `compile_static.rs`, but the main contribution of this PR is the file `static_tree.rs`. I'm still going to write some tests to make sure I'm getting all edge cases for this new tree-looking FSM compilation. --- calyx-frontend/src/attribute.rs | 8 +- calyx-opt/src/analysis/graph_coloring.rs | 11 + calyx-opt/src/analysis/mod.rs | 6 +- calyx-opt/src/analysis/static_fsm.rs | 253 + calyx-opt/src/analysis/static_schedule.rs | 608 -- calyx-opt/src/analysis/static_tree.rs | 1606 +++++ calyx-opt/src/default_passes.rs | 2 +- calyx-opt/src/passes/add_guard.rs | 34 +- calyx-opt/src/passes/compile_static.rs | 1180 ++-- calyx-opt/src/passes/static_inliner.rs | 450 +- examples/futil/dot-product.expect | 26 +- examples/futil/simple.expect | 12 +- examples/futil/vectorized-add.expect | 26 +- runt.toml | 4 +- .../static-control/par-repeat.expect | 8 + .../static-control/par-repeat.futil | 73 + .../static-control/par-repeat.futil.data | 12 + .../query-end-interval-normal.expect | 8 + .../query-end-interval-normal.futil | 53 + .../query-end-interval-normal.futil.data | 12 + .../query-end-interval-offload.expect | 8 + .../query-end-interval-offload.futil | 53 + .../query-end-interval-offload.futil.data | 12 + .../static-tree-edge/query-three-iters.expect | 8 + .../static-tree-edge/query-three-iters.futil | 53 + .../query-three-iters.futil.data | 12 + .../static-tree-edge/query-two-iters.expect | 8 + .../static-tree-edge/query-two-iters.futil | 53 + .../query-two-iters.futil.data | 12 + .../static-par-same-len.expect | 8 + .../static-par-same-len.futil | 56 + .../static-par-same-len.futil.data | 12 + .../compile-static-interface-one-cycle.expect | 19 +- .../compile-static-interface-repeat.expect | 76 +- .../compile-static-interface.expect | 46 +- .../interface-one-hot.expect | 120 +- .../compile-static/interface-and-cs.expect | 76 +- .../interface-static-par.expect | 98 + .../compile-static/interface-static-par.futil | 43 + tests/passes/compile-static/one-hot.expect | 77 +- .../query-complicated-interval.expect | 83 + .../query-complicated-interval.futil | 29 + .../query-complicated-iter.expect | 81 + .../query-complicated-iter.futil | 27 + .../compile-static/rewrite-group-go.expect | 38 +- .../rewrite-static-while-nested.expect | 35 +- .../rewrite-static-while.expect | 35 +- .../compile-static/separate-fsms.expect | 114 +- tests/passes/static-inliner/par-if.expect | 4 +- tests/passes/tdcc/while.expect | 12 +- .../dyn-mem-vec-add-axi-wrapped.expect | 4148 ++++++------ .../seq-mem-vec-add-axi-wrapped.expect | 5776 ++++++++--------- 52 files changed, 8818 insertions(+), 6806 deletions(-) create mode 100644 calyx-opt/src/analysis/static_fsm.rs delete mode 100644 calyx-opt/src/analysis/static_schedule.rs create mode 100644 calyx-opt/src/analysis/static_tree.rs create mode 100644 tests/correctness/static-control/par-repeat.expect create mode 100644 tests/correctness/static-control/par-repeat.futil create mode 100644 tests/correctness/static-control/par-repeat.futil.data create mode 100644 tests/correctness/static-tree-edge/query-end-interval-normal.expect create mode 100644 tests/correctness/static-tree-edge/query-end-interval-normal.futil create mode 100644 tests/correctness/static-tree-edge/query-end-interval-normal.futil.data create mode 100644 tests/correctness/static-tree-edge/query-end-interval-offload.expect create mode 100644 tests/correctness/static-tree-edge/query-end-interval-offload.futil create mode 100644 tests/correctness/static-tree-edge/query-end-interval-offload.futil.data create mode 100644 tests/correctness/static-tree-edge/query-three-iters.expect create mode 100644 tests/correctness/static-tree-edge/query-three-iters.futil create mode 100644 tests/correctness/static-tree-edge/query-three-iters.futil.data create mode 100644 tests/correctness/static-tree-edge/query-two-iters.expect create mode 100644 tests/correctness/static-tree-edge/query-two-iters.futil create mode 100644 tests/correctness/static-tree-edge/query-two-iters.futil.data create mode 100644 tests/correctness/static-tree-edge/static-par-same-len.expect create mode 100644 tests/correctness/static-tree-edge/static-par-same-len.futil create mode 100644 tests/correctness/static-tree-edge/static-par-same-len.futil.data create mode 100644 tests/passes/compile-static/interface-static-par.expect create mode 100644 tests/passes/compile-static/interface-static-par.futil create mode 100644 tests/passes/compile-static/query-complicated-interval.expect create mode 100644 tests/passes/compile-static/query-complicated-interval.futil create mode 100644 tests/passes/compile-static/query-complicated-iter.expect create mode 100644 tests/passes/compile-static/query-complicated-iter.futil diff --git a/calyx-frontend/src/attribute.rs b/calyx-frontend/src/attribute.rs index 7db2a9078f..b860005dac 100644 --- a/calyx-frontend/src/attribute.rs +++ b/calyx-frontend/src/attribute.rs @@ -69,6 +69,10 @@ pub enum BoolAttr { #[strum(serialize = "promoted")] /// denotes a static component or control promoted from dynamic Promoted, + #[strum(serialize = "par")] + /// Denotes a group that was generated from a `staticpar` during static + /// inlining. + ParCtrl, #[strum(serialize = "fast")] /// https://github.com/calyxir/calyx/issues/1828 Fast, @@ -202,8 +206,8 @@ impl FromStr for Attribute { #[derive(Default, Debug, Clone, PartialEq, Eq)] /// Inline storage for boolean attributes. pub(super) struct InlineAttributes { - /// Boolean attributes stored in a 16-bit number. - attrs: u16, + /// Boolean attributes stored in a 32-bit number. + attrs: u32, } impl InlineAttributes { diff --git a/calyx-opt/src/analysis/graph_coloring.rs b/calyx-opt/src/analysis/graph_coloring.rs index dcea4f6f24..cd36af4027 100644 --- a/calyx-opt/src/analysis/graph_coloring.rs +++ b/calyx-opt/src/analysis/graph_coloring.rs @@ -169,6 +169,17 @@ where .collect() } + // Reverses a coloring by mapping color C -> vec of nodes colored C. + pub fn reverse_coloring(coloring: &HashMap) -> HashMap> { + let mut rev_coloring: HashMap> = HashMap::new(); + for (node, color) in coloring { + rev_coloring + .entry(color.clone()) + .or_default() + .push(node.clone()); + } + rev_coloring + } pub fn welsh_powell_coloring(&self) -> HashMap { let mut coloring: HashMap = HashMap::new(); diff --git a/calyx-opt/src/analysis/mod.rs b/calyx-opt/src/analysis/mod.rs index 7406537655..78d213fa3c 100644 --- a/calyx-opt/src/analysis/mod.rs +++ b/calyx-opt/src/analysis/mod.rs @@ -20,8 +20,9 @@ pub mod reaching_defns; mod read_write_set; mod schedule_conflicts; mod share_set; +mod static_fsm; mod static_par_timing; -mod static_schedule; +mod static_tree; mod variable_detection; pub use compaction_analysis::CompactionAnalysis; @@ -42,6 +43,7 @@ pub use promotion_analysis::PromotionAnalysis; pub use read_write_set::{AssignmentAnalysis, ReadWriteSet}; pub use schedule_conflicts::ScheduleConflicts; pub use share_set::ShareSet; +pub use static_fsm::{FSMEncoding, StaticFSM}; pub use static_par_timing::StaticParTiming; -pub use static_schedule::{StaticFSM, StaticSchedule}; +pub use static_tree::{Node, ParNodes, SingleNode, StateType}; pub use variable_detection::VariableDetection; diff --git a/calyx-opt/src/analysis/static_fsm.rs b/calyx-opt/src/analysis/static_fsm.rs new file mode 100644 index 0000000000..d9a16feaf8 --- /dev/null +++ b/calyx-opt/src/analysis/static_fsm.rs @@ -0,0 +1,253 @@ +use crate::passes::math_utilities::get_bit_width_from; +use calyx_ir::{self as ir}; +use calyx_ir::{build_assignments, Nothing}; +use calyx_ir::{guard, structure}; +use std::collections::HashMap; +use std::rc::Rc; + +#[derive(Debug, Clone, Copy, Default)] +// Define an FSMEncoding Enum +pub enum FSMEncoding { + #[default] + Binary, + OneHot, +} + +#[derive(Debug)] +/// Represents a static FSM (i.e., the actual register in hardware that counts) +pub struct StaticFSM { + /// The actual register cell + fsm_cell: ir::RRC, + /// Type of encoding (binary or one-hot) + encoding: FSMEncoding, + /// The fsm's bitwidth (this redundant information bc we have `cell`) + /// but makes it easier if we easily have access to this. + bitwidth: u64, + /// Mapping of queries: (u64, u64) -> Port + queries: HashMap<(u64, u64), ir::RRC>, +} +impl StaticFSM { + // Builds a static_fsm from: num_states and encoding type. + pub fn from_basic_info( + num_states: u64, + encoding: FSMEncoding, + builder: &mut ir::Builder, + ) -> Self { + // Determine number of bits needed in the register. + let fsm_size = match encoding { + /* represent 0..latency */ + FSMEncoding::Binary => get_bit_width_from(num_states + 1), + FSMEncoding::OneHot => num_states, + }; + // OHE needs an initial value of 1. + let register = match encoding { + FSMEncoding::Binary => { + builder.add_primitive("fsm", "std_reg", &[fsm_size]) + } + FSMEncoding::OneHot => { + builder.add_primitive("fsm", "init_one_reg", &[fsm_size]) + } + }; + + StaticFSM { + encoding, + fsm_cell: register, + bitwidth: fsm_size, + queries: HashMap::new(), + } + } + + // Builds an incrementer, and returns the assignments and incrementer cell itself. + // assignments are: + // adder.left = fsm.out; adder.right = 1; + // Returns tuple: (assignments, adder) + pub fn build_incrementer( + &self, + builder: &mut ir::Builder, + ) -> (Vec>, ir::RRC) { + let fsm_cell = Rc::clone(&self.fsm_cell); + // For OHE, the "adder" can just be a shifter. + // For OHE the first_state = 1 rather than 0. + // Final state is encoded differently for OHE vs. Binary + let adder = match self.encoding { + FSMEncoding::Binary => { + builder.add_primitive("adder", "std_add", &[self.bitwidth]) + } + FSMEncoding::OneHot => { + builder.add_primitive("lsh", "std_lsh", &[self.bitwidth]) + } + }; + let const_one = builder.add_constant(1, self.bitwidth); + let incr_assigns = build_assignments!( + builder; + // increments the fsm + adder["left"] = ? fsm_cell["out"]; + adder["right"] = ? const_one["out"]; + ) + .to_vec(); + (incr_assigns, adder) + } + + // Returns the assignments that conditionally increment the fsm, + // based on guard. + // The assignments are: + // fsm.in = guard ? adder.out; + // fsm.write_en = guard ? 1'd1; + // Returns a vec of these assignments. + pub fn conditional_increment( + &self, + guard: ir::Guard, + adder: ir::RRC, + builder: &mut ir::Builder, + ) -> Vec> { + let fsm_cell = Rc::clone(&self.fsm_cell); + let signal_on = builder.add_constant(1, 1); + let my_assigns = build_assignments!( + builder; + // increments the fsm + fsm_cell["in"] = guard ? adder["out"]; + fsm_cell["write_en"] = guard ? signal_on["out"]; + ); + my_assigns.to_vec() + } + + // Returns the assignments that conditionally resets the fsm to 0, + // but only if guard is true. + // The assignments are: + // fsm.in = guard ? 0; + // fsm.write_en = guard ? 1'd1; + // Returns a vec of these assignments. + pub fn conditional_reset( + &self, + guard: ir::Guard, + builder: &mut ir::Builder, + ) -> Vec> { + let fsm_cell = Rc::clone(&self.fsm_cell); + let signal_on = builder.add_constant(1, 1); + let const_0 = match self.encoding { + FSMEncoding::Binary => builder.add_constant(0, self.bitwidth), + FSMEncoding::OneHot => builder.add_constant(1, self.bitwidth), + }; + let assigns = build_assignments!( + builder; + fsm_cell["in"] = guard ? const_0["out"]; + fsm_cell["write_en"] = guard ? signal_on["out"]; + ); + assigns.to_vec() + } + + // Returns a guard that takes a (beg, end) `query`, and returns the equivalent + // guard to `beg <= fsm.out < end`. + pub fn query_between( + &mut self, + builder: &mut ir::Builder, + query: (u64, u64), + ) -> Box> { + let (beg, end) = query; + // Querying OHE is easy, since we already have `self.get_one_hot_query()` + let fsm_cell = Rc::clone(&self.fsm_cell); + if matches!(self.encoding, FSMEncoding::OneHot) { + let g = self.get_one_hot_query(fsm_cell, (beg, end), builder); + return Box::new(g); + } + + if beg + 1 == end { + // if beg + 1 == end then we only need to check if fsm == beg + let interval_const = builder.add_constant(beg, self.bitwidth); + let g = guard!(fsm_cell["out"] == interval_const["out"]); + Box::new(g) + } else if beg == 0 { + // if beg == 0, then we only need to check if fsm < end + let end_const = builder.add_constant(end, self.bitwidth); + let lt: ir::Guard = + guard!(fsm_cell["out"] < end_const["out"]); + Box::new(lt) + } else { + // otherwise, check if fsm >= beg & fsm < end + let beg_const = builder.add_constant(beg, self.bitwidth); + let end_const = builder.add_constant(end, self.bitwidth); + let beg_guard: ir::Guard = + guard!(fsm_cell["out"] >= beg_const["out"]); + let end_guard: ir::Guard = + guard!(fsm_cell["out"] < end_const["out"]); + Box::new(ir::Guard::And(Box::new(beg_guard), Box::new(end_guard))) + } + } + + // Given a one-hot query, it will return a guard corresponding to that query. + // If it has already built the query (i.e., added the wires/continuous assigments), + // it just uses the same port. + // Otherwise it will build the query. + fn get_one_hot_query( + &mut self, + fsm_cell: ir::RRC, + (lb, ub): (u64, u64), + builder: &mut ir::Builder, + ) -> ir::Guard { + match self.queries.get(&(lb, ub)) { + None => { + let port = Self::build_one_hot_query( + Rc::clone(&fsm_cell), + self.bitwidth, + (lb, ub), + builder, + ); + self.queries.insert((lb, ub), Rc::clone(&port)); + ir::Guard::port(port) + } + Some(port) => ir::Guard::port(Rc::clone(port)), + } + } + + // Given a (lb, ub) query, and an fsm (and for convenience, a bitwidth), + // Returns a `port`: port is a `wire.out`, where `wire` holds + // whether or not the query is true, i.e., whether the FSM really is + // between [lb, ub). + fn build_one_hot_query( + fsm_cell: ir::RRC, + fsm_bitwidth: u64, + (lb, ub): (u64, u64), + builder: &mut ir::Builder, + ) -> ir::RRC { + // The wire that holds the query + let formatted_name = format!("bw_{}_{}", lb, ub); + let wire: ir::RRC = + builder.add_primitive(formatted_name, "std_wire", &[1]); + let wire_out = wire.borrow().get("out"); + + // Continuous assignments to check the FSM + let assigns = { + let in_width = fsm_bitwidth; + // Since 00...00 is the initial state, we need to check lb-1. + let start_index = lb; + // Since verilog slices are inclusive. + let end_index = ub - 1; + let out_width = ub - lb; // == (end_index - start_index + 1) + structure!(builder; + let slicer = prim std_bit_slice(in_width, start_index, end_index, out_width); + let const_slice_0 = constant(0, out_width); + let signal_on = constant(1,1); + ); + let slicer_neq_0 = guard!(slicer["out"] != const_slice_0["out"]); + // Extend the continuous assignmments to include this particular query for FSM state; + let my_assigns = build_assignments!(builder; + slicer["in"] = ? fsm_cell["out"]; + wire["in"] = slicer_neq_0 ? signal_on["out"]; + ); + my_assigns.to_vec() + }; + builder.add_continuous_assignments(assigns); + wire_out + } + + // Return a unique id (i.e., get_unique_id for each FSM in the same component + // will be different). + pub fn get_unique_id(&self) -> ir::Id { + self.fsm_cell.borrow().name() + } + + // Return the bitwidth of an FSM object + pub fn get_bitwidth(&self) -> u64 { + self.bitwidth + } +} diff --git a/calyx-opt/src/analysis/static_schedule.rs b/calyx-opt/src/analysis/static_schedule.rs deleted file mode 100644 index 5155255176..0000000000 --- a/calyx-opt/src/analysis/static_schedule.rs +++ /dev/null @@ -1,608 +0,0 @@ -use crate::passes::math_utilities::get_bit_width_from; -use calyx_ir::{self as ir}; -use calyx_ir::{build_assignments, Nothing}; -use calyx_ir::{guard, structure}; -use ir::Guard; -use itertools::Itertools; -use std::collections::{HashMap, HashSet, VecDeque}; -use std::ops::Not; -use std::rc::Rc; - -#[derive(Debug, Clone, Copy, Default)] -// Define an FSMEncoding Enum -enum FSMEncoding { - #[default] - Binary, - OneHot, -} - -#[derive(Debug)] -enum FSMImplementationSpec { - Single, - // How many duplicates - _Duplicate(u64), - // How many times to split - _Split(u64), -} - -#[derive(Debug)] -// Define an enum called FSMType -enum FSMImplementation { - // Default option: just a single register - Single(ir::RRC), - // Duplicate the register to reduce fanout when querying - // (all FSMs in this vec still have all of the states) - _Duplicate(Vec>), - // Split the FSM to reduce fanout when querying. - // (the FSMs partition the states exactly). - // Each FSM has fewer bits but I suspect the logic might be more complicated. - _Split(Vec>), -} - -impl FSMImplementation { - fn get_single_cell(&self) -> ir::RRC { - match self { - FSMImplementation::Single(cell) => Rc::clone(cell), - _ => unreachable!( - "called `get_single_cell()` on non-single FSM implementation " - ), - } - } -} - -#[derive(Debug)] -pub struct StaticFSM { - encoding: FSMEncoding, - // The fsm's bitwidth (this redundant information bc we have `cell`) - // but makes it easier if we easily have access to this. - bitwidth: u64, - // The actual register(s) used to implement the FSM - implementation: FSMImplementation, - // Mapping of queries from (u64, u64) -> Port - queries: HashMap<(u64, u64), ir::RRC>, -} -impl StaticFSM { - // Builds a static_fsm from: num_states and encoding type. - fn from_basic_info( - num_states: u64, - encoding: FSMEncoding, - _implementation: FSMImplementationSpec, - builder: &mut ir::Builder, - ) -> Self { - // Determine number of bits needed in the register. - let fsm_size = match encoding { - /* represent 0..latency */ - FSMEncoding::Binary => get_bit_width_from(num_states + 1), - FSMEncoding::OneHot => num_states, - }; - // OHE needs an initial value of 1. - let register = match encoding { - FSMEncoding::Binary => { - builder.add_primitive("fsm", "std_reg", &[fsm_size]) - } - FSMEncoding::OneHot => { - builder.add_primitive("fsm", "init_one_reg", &[fsm_size]) - } - }; - let fsm = FSMImplementation::Single(register); - - StaticFSM { - encoding, - bitwidth: fsm_size, - implementation: fsm, - queries: HashMap::new(), - } - } - - // Returns assignments that make the current fsm count to n - // and then reset back to 0. - // `incr_condition`` is an optional guard: if it is none, then the fsm will - // unconditionally increment. - // If it actually holds a `guard`, then we will only start counting once - // the condition holds. - // (NOTE: if the guard is true while we are counting up we will just - // ignore that guard and keep on counting-- we don't reset or anything. - // The guard is just there to make sure we only go from 0->1 when appropriate.) - // (IMPORTANT WEIRD PRECONDITION): if `incr_cond` is Some(_), we assume n > 0. - pub fn count_to_n( - &mut self, - builder: &mut ir::Builder, - n: u64, - incr_condition: Option>, - ) -> Vec> { - { - assert!(matches!( - self.implementation, - FSMImplementation::Single(_) - )); - let fsm_cell: Rc> = - self.implementation.get_single_cell(); - // For OHE, the "adder" can just be a shifter. - // For OHE the first_state = 1 rather than 0. - // Final state is encoded differently for OHE vs. Binary - let (adder, first_state, final_state_guard) = match self.encoding { - FSMEncoding::Binary => ( - builder.add_primitive("adder", "std_add", &[self.bitwidth]), - builder.add_constant(0, self.bitwidth), - { - let const_n = builder.add_constant(n, self.bitwidth); - let g = guard!(fsm_cell["out"] == const_n["out"]); - g - }, - ), - FSMEncoding::OneHot => ( - builder.add_primitive("lsh", "std_lsh", &[self.bitwidth]), - builder.add_constant(1, self.bitwidth), - self.get_one_hot_query( - Rc::clone(&fsm_cell), - (n, n + 1), - builder, - ), - ), - }; - structure!( builder; - let signal_on = constant(1,1); - let const_one = constant(1, self.bitwidth); - ); - let not_final_state_guard = - ir::Guard::Not(Box::new(final_state_guard.clone())); - match incr_condition { - None => { - // Unconditionally increment FSM. - build_assignments!( - builder; - // increments the fsm - adder["left"] = ? fsm_cell["out"]; - adder["right"] = ? const_one["out"]; - fsm_cell["write_en"] = ? signal_on["out"]; - fsm_cell["in"] = not_final_state_guard ? adder["out"]; - // resets the fsm early - fsm_cell["in"] = final_state_guard ? first_state["out"]; - ) - .to_vec() - } - Some(condition_guard) => { - // Only start incrementing when FSM == first_state and - // conditiona_guard is true. - // After that, we can unconditionally increment. - let first_state_guard = match self.encoding { - FSMEncoding::Binary => { - let g = - guard!(fsm_cell["out"] == first_state["out"]); - g - } - // This is better than checking if FSM == first_state - // be this is only checking a single bit. - FSMEncoding::OneHot => self.get_one_hot_query( - Rc::clone(&fsm_cell), - (0, 1), - builder, - ), - }; - let not_first_state: ir::Guard = - ir::Guard::Not(Box::new(first_state_guard.clone())); - let cond_and_first_state = ir::Guard::and( - condition_guard.clone(), - first_state_guard.clone(), - ); - let not_cond_and_first_state = - ir::Guard::not(condition_guard.clone()) - .and(first_state_guard); - let in_between_guard = - ir::Guard::and(not_first_state, not_final_state_guard); - let my_assigns = build_assignments!( - builder; - // Incrementsthe fsm - adder["left"] = ? fsm_cell["out"]; - adder["right"] = ? const_one["out"]; - // Always write into fsm. - fsm_cell["write_en"] = ? signal_on["out"]; - // If fsm == first_state and cond is high, then we start an execution. - fsm_cell["in"] = cond_and_first_state ? adder["out"]; - // If first_state < fsm < n, then we unconditionally increment the fsm. - fsm_cell["in"] = in_between_guard ? adder["out"]; - // If fsm == n, then we reset the FSM. - fsm_cell["in"] = final_state_guard ? first_state["out"]; - // Otherwise we set the FSM equal to first_state. - fsm_cell["in"] = not_cond_and_first_state ? first_state["out"]; - ); - my_assigns.to_vec() - } - } - } - } - - // Returns a guard that takes a (beg, end) `query`, and returns the equivalent - // guard to `beg <= fsm.out < end`. - pub fn query_between( - &mut self, - builder: &mut ir::Builder, - query: (u64, u64), - ) -> Box> { - assert!(matches!(self.implementation, FSMImplementation::Single(_))); - - let (beg, end) = query; - if matches!(self.encoding, FSMEncoding::OneHot) { - // Querying OHE is easy, since we already have `self.get_one_hot_query()` - let fsm_cell = self.implementation.get_single_cell(); - let g = self.get_one_hot_query(fsm_cell, (beg, end), builder); - return Box::new(g); - } - - let fsm_cell = self.implementation.get_single_cell(); - if beg + 1 == end { - // if beg + 1 == end then we only need to check if fsm == beg - let interval_const = builder.add_constant(beg, self.bitwidth); - let g = guard!(fsm_cell["out"] == interval_const["out"]); - Box::new(g) - } else if beg == 0 { - // if beg == 0, then we only need to check if fsm < end - let end_const = builder.add_constant(end, self.bitwidth); - let lt: ir::Guard = - guard!(fsm_cell["out"] < end_const["out"]); - Box::new(lt) - } else { - // otherwise, check if fsm >= beg & fsm < end - let beg_const = builder.add_constant(beg, self.bitwidth); - let end_const = builder.add_constant(end, self.bitwidth); - let beg_guard: ir::Guard = - guard!(fsm_cell["out"] >= beg_const["out"]); - let end_guard: ir::Guard = - guard!(fsm_cell["out"] < end_const["out"]); - Box::new(ir::Guard::And(Box::new(beg_guard), Box::new(end_guard))) - } - } - - // Given a one-hot query, it will return a guard corresponding to that query. - // If it has already built the query (i.e., added the wires/continuous assigments), - // it just uses the same port. - // Otherwise it will build the query. - fn get_one_hot_query( - &mut self, - fsm_cell: ir::RRC, - (lb, ub): (u64, u64), - builder: &mut ir::Builder, - ) -> ir::Guard { - match self.queries.get(&(lb, ub)) { - None => { - let port = Self::build_one_hot_query( - Rc::clone(&fsm_cell), - self.bitwidth, - (lb, ub), - builder, - ); - self.queries.insert((lb, ub), Rc::clone(&port)); - ir::Guard::port(port) - } - Some(port) => ir::Guard::port(Rc::clone(port)), - } - } - - // Given a (lb, ub) query, and an fsm (and for convenience, a bitwidth), - // Returns a `port`: port is a `wire.out`, where `wire` holds - // whether or not the query is true, i.e., whether the FSM really is - // between [lb, ub). - fn build_one_hot_query( - fsm_cell: ir::RRC, - fsm_bitwidth: u64, - (lb, ub): (u64, u64), - builder: &mut ir::Builder, - ) -> ir::RRC { - // The wire that holds the query - let formatted_name = format!("bw_{}_{}", lb, ub); - let wire: ir::RRC = - builder.add_primitive(formatted_name, "std_wire", &[1]); - let wire_out = wire.borrow().get("out"); - - // Continuous assignments to check the FSM - let assigns = { - let in_width = fsm_bitwidth; - // Since 00...00 is the initial state, we need to check lb-1. - let start_index = lb; - // Since verilog slices are inclusive. - let end_index = ub - 1; - let out_width = ub - lb; // == (end_index - start_index + 1) - structure!(builder; - let slicer = prim std_bit_slice(in_width, start_index, end_index, out_width); - let const_slice_0 = constant(0, out_width); - let signal_on = constant(1,1); - ); - let slicer_neq_0 = guard!(slicer["out"] != const_slice_0["out"]); - // Extend the continuous assignmments to include this particular query for FSM state; - let my_assigns = build_assignments!(builder; - slicer["in"] = ? fsm_cell["out"]; - wire["in"] = slicer_neq_0 ? signal_on["out"]; - ); - my_assigns.to_vec() - }; - builder.add_continuous_assignments(assigns); - wire_out - } - - // Return a unique id (i.e., get_unique_id for each FSM in the same component - // will be different). - pub fn get_unique_id(&self) -> ir::Id { - assert!(matches!(self.implementation, FSMImplementation::Single(_))); - self.implementation.get_single_cell().borrow().name() - } - - // Return the bitwidth of an FSM object - pub fn get_bitwidth(&self) -> u64 { - assert!(matches!(self.implementation, FSMImplementation::Single(_))); - self.bitwidth - } -} - -/// Represents a static schedule. -#[derive(Debug, Default)] -pub struct StaticSchedule { - /// Number of states for the FSM - /// (this is just the latency of the static island-- or that of the largest - /// static island, if there are multiple islands) - num_states: u64, - /// The queries that the FSM needs to support. - /// E.g., `lhs = %[2:3] ? rhs` corresponds to (2,3). - queries: HashSet<(u64, u64)>, - /// Encoding type for the FSM - encoding: FSMEncoding, - /// The static groups the FSM will schedule. It is a vec because sometimes - /// the same FSM will handle two different static islands. - pub static_groups: Vec>, -} - -impl From>> for StaticSchedule { - /// Builds a StaticSchedule object from a vec of static groups. - fn from(static_groups: Vec>) -> Self { - let mut schedule = StaticSchedule { - static_groups, - ..Default::default() - }; - schedule.num_states = 0; - // iter().any() or iter().all() should both work, since our coloring - // algorithm inserts conflicts if the @one_hot attribute doesn't match. - schedule.encoding = - if schedule.static_groups.iter().any(|sgroup| { - sgroup.borrow().attributes.has(ir::BoolAttr::OneHot) - }) { - FSMEncoding::OneHot - } else { - FSMEncoding::Binary - }; - for static_group in &schedule.static_groups { - // Getting self.queries - for static_assign in &static_group.borrow().assignments { - for query in Self::queries_from_guard(&static_assign.guard) { - schedule.queries.insert(query); - } - } - // Getting self.num_states - schedule.num_states = std::cmp::max( - schedule.num_states, - static_group.borrow().get_latency(), - ); - } - schedule - } -} - -impl StaticSchedule { - /// Given a guard, returns the queries that the static FSM (i.e., counter) - /// will make. - fn queries_from_guard( - guard: &ir::Guard, - ) -> Vec<(u64, u64)> { - match guard { - ir::Guard::Or(l, r) | ir::Guard::And(l, r) => { - let mut lvec = Self::queries_from_guard(l); - let rvec = Self::queries_from_guard(r); - lvec.extend(rvec); - lvec - } - ir::Guard::Not(g) => Self::queries_from_guard(g), - ir::Guard::Port(_) - | ir::Guard::CompOp(_, _, _) - | ir::Guard::True => vec![], - ir::Guard::Info(static_timing) => { - vec![static_timing.get_interval()] - } - } - } - - /// Realizes a StaticSchedule (i.e., instantiates the FSMs) - /// If `self.static_groups = vec![group1, group2, group3, ...]`` - /// Then `realize_schedule()` returns vecdeque![a1, a2, a3] - /// Where a1 are the assignments for group1, a2 are the assignments - /// to group2, etc. - /// It also returns the StaticFSM object. - /// - /// We also have a bool argument `static_component_interface`. - /// If you are the entire control of a static component, it is slightly different, - /// because we need to separate the first cycle (%[0:n] -> %0 | [%1:n]) and - /// replace %0 with `comp.go & %0`. (We do `comp.go & %0` rather than `%0` bc - /// we want the clients to be able to assert `go` for n cycles and the - /// component still works as expected). - pub fn realize_schedule( - &mut self, - builder: &mut ir::Builder, - static_component_interface: bool, - ) -> (VecDeque>>, StaticFSM) { - // First build the fsm we will use to realize the schedule. - let mut fsm_object = StaticFSM::from_basic_info( - self.num_states, - self.encoding, - FSMImplementationSpec::Single, - builder, - ); - - // Instantiate the vecdeque. - let mut res = VecDeque::new(); - for static_group in &mut self.static_groups { - let mut static_group_ref = static_group.borrow_mut(); - // Separate the first cycle (if necessary) and then realize the - // static timing guards (e.g., %[2:3] -> 2 <= fsm < 3). - let group_assigns = - static_group_ref.assignments.drain(..).collect_vec(); - let static_assigns = if static_component_interface { - group_assigns - .into_iter() - .map(|assign| { - if static_component_interface { - Self::handle_static_interface( - assign, - Rc::clone(&builder.component.signature), - ) - } else { - assign - } - }) - .collect_vec() - } else { - group_assigns - }; - let mut assigns: Vec> = static_assigns - .into_iter() - .map(|static_assign| { - Self::make_assign_dyn( - static_assign, - &mut fsm_object, - builder, - ) - }) - .collect(); - // For static components, we don't unconditionally start counting. - // We must only start counting when `comp.go` is high. - let fsm_incr_condition = if static_component_interface { - let comp_sig = Rc::clone(&builder.component.signature); - let g = guard!(comp_sig["go"]); - Some(g) - } else { - None - }; - // We need to add assignments that makes the FSM count to n. - assigns.extend(fsm_object.count_to_n( - builder, - static_group_ref.get_latency() - 1, - fsm_incr_condition, - )); - - res.push_back(assigns); - } - (res, fsm_object) - } - - // Takes in a static guard `guard`, and returns equivalent dynamic guard - // The only thing that actually changes is the Guard::Info case - // We need to turn static_timing to dynamic guards using `fsm`. - // E.g.: %[2:3] gets turned into fsm.out >= 2 & fsm.out < 3 - // is_static_comp is necessary becasue it ... - fn make_guard_dyn( - guard: ir::Guard, - fsm_object: &mut StaticFSM, - builder: &mut ir::Builder, - ) -> Box> { - match guard { - ir::Guard::Or(l, r) => Box::new(ir::Guard::Or( - Self::make_guard_dyn(*l, fsm_object, builder), - Self::make_guard_dyn(*r, fsm_object, builder), - )), - ir::Guard::And(l, r) => Box::new(ir::Guard::And( - Self::make_guard_dyn(*l, fsm_object, builder), - Self::make_guard_dyn(*r, fsm_object, builder), - )), - ir::Guard::Not(g) => Box::new(ir::Guard::Not( - Self::make_guard_dyn(*g, fsm_object, builder), - )), - ir::Guard::CompOp(op, l, r) => { - Box::new(ir::Guard::CompOp(op, l, r)) - } - ir::Guard::Port(p) => Box::new(ir::Guard::Port(p)), - ir::Guard::True => Box::new(ir::Guard::True), - ir::Guard::Info(static_timing) => { - fsm_object.query_between(builder, static_timing.get_interval()) - } - } - } - - // Takes in static assignment `assign` and returns a dynamic assignments - // Mainly transforms the guards from %[2:3] -> fsm.out >= 2 & fsm.out <= 3 - fn make_assign_dyn( - assign: ir::Assignment, - fsm_object: &mut StaticFSM, - builder: &mut ir::Builder, - ) -> ir::Assignment { - ir::Assignment { - src: assign.src, - dst: assign.dst, - attributes: assign.attributes, - guard: Self::make_guard_dyn(*assign.guard, fsm_object, builder), - } - } - - // Looks recursively thru guard to transform %[0:n] into %0 | %[1:n]. - fn handle_static_interface_guard( - guard: ir::Guard, - comp_sig: ir::RRC, - ) -> ir::Guard { - match guard { - ir::Guard::Info(st) => { - let (beg, end) = st.get_interval(); - if beg == 0 { - // Replace %[0:n] -> (%0 & comp.go) | %[1:n] - // Cannot just do comp.go | %[1:n] because we want - // clients to be able to assert `comp.go` even after the first - // cycle w/o affecting correctness. - let first_cycle = - ir::Guard::Info(ir::StaticTiming::new((0, 1))); - let comp_go = guard!(comp_sig["go"]); - let first_and_go = ir::Guard::and(comp_go, first_cycle); - if end == 1 { - return first_and_go; - } else { - let after = - ir::Guard::Info(ir::StaticTiming::new((1, end))); - let cong = ir::Guard::or(first_and_go, after); - return cong; - } - } - guard - } - ir::Guard::And(l, r) => { - let left = Self::handle_static_interface_guard( - *l, - Rc::clone(&comp_sig), - ); - let right = Self::handle_static_interface_guard(*r, comp_sig); - ir::Guard::and(left, right) - } - ir::Guard::Or(l, r) => { - let left = Self::handle_static_interface_guard( - *l, - Rc::clone(&comp_sig), - ); - let right = Self::handle_static_interface_guard(*r, comp_sig); - ir::Guard::or(left, right) - } - ir::Guard::Not(g) => { - let a = Self::handle_static_interface_guard(*g, comp_sig); - ir::Guard::Not(Box::new(a)) - } - _ => guard, - } - } - - // Looks recursively thru assignment's guard to %[0:n] into %0 | %[1:n]. - fn handle_static_interface( - assign: ir::Assignment, - comp_sig: ir::RRC, - ) -> ir::Assignment { - ir::Assignment { - src: assign.src, - dst: assign.dst, - attributes: assign.attributes, - guard: Box::new(Self::handle_static_interface_guard( - *assign.guard, - comp_sig, - )), - } - } -} diff --git a/calyx-opt/src/analysis/static_tree.rs b/calyx-opt/src/analysis/static_tree.rs new file mode 100644 index 0000000000..0c7d3b7b11 --- /dev/null +++ b/calyx-opt/src/analysis/static_tree.rs @@ -0,0 +1,1606 @@ +use super::{FSMEncoding, StaticFSM}; +use calyx_ir::{self as ir}; +use calyx_ir::{build_assignments, Nothing}; +use calyx_ir::{guard, structure}; +use itertools::Itertools; +use std::collections::{BTreeMap, HashMap}; +use std::ops::Not; +use std::rc::Rc; + +use super::GraphColoring; + +/// Optional Rc of a RefCell of a StaticFSM object. +type OptionalStaticFSM = Option>; +/// Query (i ,(j,k)) that corresponds to: +/// Am I in iteration i, and between cylces j and k within +/// that query? +type SingleIterQuery = (u64, (u64, u64)); +/// Query (i,j) that corresponds to: +/// Am I between iterations i and j, inclusive? +type ItersQuery = (u64, u64); + +/// Helpful for translating queries for the FSMTree structure. +/// Because of the tree structure, %[i:j] is no longer is always equal to i <= fsm < j. +/// Offload(i) means the FSM is offloading when fsm == i: so if the fsm == i, +/// we need to look at the children to know what cycle we are in exactly. +/// Normal(i,j) means the FSM is outputing (i..j), incrementing each cycle (i.e., +/// like normal) and not offloading. Note that even though the FSM is outputting +/// i..j each cycle, that does not necesarily mean we are in cycles i..j (due +/// to offloading performed in the past.) +#[derive(Debug)] +pub enum StateType { + Normal((u64, u64)), + Offload(u64), +} + +/// Node can either be a SingleNode (i.e., a single node) or ParNodes (i.e., a group of +/// nodes that are executing in parallel). +/// Most methods in `Node` simply call the equivalent methods for each +/// of the two possible variants. +/// Perhaps could be more compactly implemented as a Trait. +pub enum Node { + Single(SingleNode), + Par(ParNodes), +} + +// The following methods are used to actually instantiate the FSMTree structure +// and compile static groups/control to dynamic groups/control. +impl Node { + /// Instantiate the necessary registers. + /// The equivalent methods for the two variants contain more implementation + /// details. + /// `coloring`, `colors_to_max_values`, and `colors_to_fsm` are necessary + /// to know whether we actually need to instantiate a new FSM, or we can + /// juse use another node's FSM. + pub fn instantiate_fsms( + &mut self, + builder: &mut ir::Builder, + coloring: &HashMap, + colors_to_max_values: &HashMap, + colors_to_fsm: &mut HashMap< + ir::Id, + (OptionalStaticFSM, OptionalStaticFSM), + >, + one_hot_cutoff: u64, + ) { + match self { + Node::Single(single_node) => single_node.instantiate_fsms( + builder, + coloring, + colors_to_max_values, + colors_to_fsm, + one_hot_cutoff, + ), + Node::Par(par_nodes) => par_nodes.instantiate_fsms( + builder, + coloring, + colors_to_max_values, + colors_to_fsm, + one_hot_cutoff, + ), + } + } + + /// Count to n. Need to call `instantiate_fsms` before calling `count_to_n`. + /// The equivalent methods for the two variants contain more implementation + /// details. + /// `incr_start_cond` can optionally guard the 0->1 transition. + pub fn count_to_n( + &mut self, + builder: &mut ir::Builder, + incr_start_cond: Option>, + ) { + match self { + Node::Single(single_node) => { + single_node.count_to_n(builder, incr_start_cond) + } + Node::Par(par_nodes) => { + par_nodes.count_to_n(builder, incr_start_cond) + } + } + } + + /// "Realize" the static groups into dynamic groups. + /// The main challenge is converting %[i:j] into fsm guards. + /// Need to call `instantiate_fsms` and + /// `count_to_n` before calling `realize`. + /// The equivalent methods for the two variants contain more implementation + /// details. + /// `reset_early_map`, `fsm_info_map`, and `group_rewrites` are just metadata + /// to make it easier to rewrite control, add wrappers, etc. + pub fn realize( + &mut self, + ignore_timing_guards: bool, + static_groups: &Vec>, + reset_early_map: &mut HashMap, + fsm_info_map: &mut HashMap< + ir::Id, + (ir::Id, ir::Guard, ir::Guard), + >, + group_rewrites: &mut ir::rewriter::PortRewriteMap, + builder: &mut ir::Builder, + ) { + match self { + Node::Single(single_node) => single_node.realize( + ignore_timing_guards, + static_groups, + reset_early_map, + fsm_info_map, + group_rewrites, + builder, + ), + Node::Par(par_nodes) => par_nodes.realize( + ignore_timing_guards, + static_groups, + reset_early_map, + fsm_info_map, + group_rewrites, + builder, + ), + } + } + + /// Get the equivalent fsm guard when the tree is between cycles i and j, i.e., + /// when i <= cycle_count < j. + /// The equivalent methods for the two variants contain more implementation + /// details. + pub fn query_between( + &mut self, + query: (u64, u64), + builder: &mut ir::Builder, + ) -> ir::Guard { + match self { + Node::Single(single_node) => { + single_node.query_between(query, builder) + } + Node::Par(par_nodes) => par_nodes.query_between(query, builder), + } + } +} + +/// The following methods are used to help build the conflict graph for coloring +/// to share FSMs +impl Node { + /// Get the names of all nodes (i.e., the names of the groups for each node + /// in the tree). + pub fn get_all_nodes(&self) -> Vec { + match self { + Node::Single(single_node) => single_node.get_all_nodes(), + Node::Par(par_nodes) => par_nodes.get_all_nodes(), + } + } + + /// Adds conflicts between nodes in the tree that execute at the same time. + pub fn add_conflicts(&self, conflict_graph: &mut GraphColoring) { + match self { + Node::Single(single_node) => { + single_node.add_conflicts(conflict_graph) + } + Node::Par(par_nodes) => par_nodes.add_conflicts(conflict_graph), + } + } + + /// Get max value of all nodes in the tree, according to some function f. + /// `f` takes in a Tree (i.e., a node type) and returns a `u64`. + pub fn get_max_value(&self, name: &ir::Id, f: &F) -> u64 + where + F: Fn(&SingleNode) -> u64, + { + match self { + Node::Single(single_node) => single_node.get_max_value(name, f), + Node::Par(par_nodes) => par_nodes.get_max_value(name, f), + } + } +} + +// Used to compile static component interface. This is really annoying to do, since +// for static components, they only need to be guarded for %0, while for static +// groups, they need to be guarded for %[0:n]. This creates some annoying `if` +// statements. +impl Node { + // Helper to `preprocess_static_interface_assigns` + // Looks recursively thru guard to transform %[0:n] into %0 | %[1:n]. + fn preprocess_static_interface_guard( + guard: ir::Guard, + comp_sig: ir::RRC, + ) -> ir::Guard { + match guard { + ir::Guard::Info(st) => { + let (beg, end) = st.get_interval(); + if beg == 0 { + // Replace %[0:n] -> (%0 & comp.go) | %[1:n] + // Cannot just do comp.go | %[1:n] because we want + // clients to be able to assert `comp.go` even after the first + // cycle w/o affecting correctness. + let first_cycle = + ir::Guard::Info(ir::StaticTiming::new((0, 1))); + let comp_go = guard!(comp_sig["go"]); + let first_and_go = ir::Guard::and(comp_go, first_cycle); + if end == 1 { + return first_and_go; + } else { + let after = + ir::Guard::Info(ir::StaticTiming::new((1, end))); + let cong = ir::Guard::or(first_and_go, after); + return cong; + } + } + guard + } + ir::Guard::And(l, r) => { + let left = Self::preprocess_static_interface_guard( + *l, + Rc::clone(&comp_sig), + ); + let right = + Self::preprocess_static_interface_guard(*r, comp_sig); + ir::Guard::and(left, right) + } + ir::Guard::Or(l, r) => { + let left = Self::preprocess_static_interface_guard( + *l, + Rc::clone(&comp_sig), + ); + let right = + Self::preprocess_static_interface_guard(*r, comp_sig); + ir::Guard::or(left, right) + } + ir::Guard::Not(g) => { + let a = Self::preprocess_static_interface_guard(*g, comp_sig); + ir::Guard::Not(Box::new(a)) + } + _ => guard, + } + } + + // Looks recursively thru assignment's guard to %[0:n] into %0 | %[1:n]. + pub fn preprocess_static_interface_assigns( + assign: &mut ir::Assignment, + comp_sig: ir::RRC, + ) { + assign + .guard + .update(|g| Self::preprocess_static_interface_guard(g, comp_sig)); + } +} + +// The following are just standard `getter` methods. +impl Node { + /// Take the assignments of the root of the tree and return them. + /// This only works on a single node (i.e., the `Tree`` variant). + pub fn take_root_assigns(&mut self) -> Vec> { + match self { + Node::Single(single_node) => { + std::mem::take(&mut single_node.root.1) + } + Node::Par(_) => { + unreachable!( + "Cannot take root assignments of Node::Par variant" + ) + } + } + } + + /// Get the name of the root of the tree and return them. + /// This only works on a single node (i.e., the `Tree`` variant). + pub fn get_root_name(&mut self) -> ir::Id { + match self { + Node::Single(single_node) => single_node.root.0, + Node::Par(_) => { + unreachable!("Cannot take root name of Node::Par variant") + } + } + } + + /// Get the name of the group at the root of the tree (if a `Tree` variant) or + /// of the equivalent `par` group (i.e., the name of the group that triggers + /// execution of all the trees) if a `Par` variant. + pub fn get_group_name(&self) -> ir::Id { + match self { + Node::Single(single_node) => single_node.root.0, + Node::Par(par_nodes) => par_nodes.group_name, + } + } + + /// Gets latency of the overall tree. + pub fn get_latency(&self) -> u64 { + match self { + Node::Single(single_node) => single_node.latency, + Node::Par(par_nodes) => par_nodes.latency, + } + } + + /// Gets the children of root of the tree (if a `Tree` variant) or + /// of the threads (i.e., trees) that are scheduled to execute (if a `Par` + /// variant.) + pub fn get_children(&mut self) -> &mut Vec<(Node, (u64, u64))> { + match self { + Node::Single(single_node) => &mut single_node.children, + Node::Par(par_nodes) => &mut par_nodes.threads, + } + } + + /// Get number of repeats. + fn get_num_repeats(&self) -> u64 { + match self { + Node::Single(single_node) => single_node.num_repeats, + Node::Par(par_nodes) => par_nodes.num_repeats, + } + } +} + +/// `SingleNode` struct. +pub struct SingleNode { + /// latency of one iteration. + pub latency: u64, + /// number of repeats. (So "total" latency = `latency` x `num_repeats`) + pub num_repeats: u64, + /// number of states in this node + pub num_states: u64, + /// (name of static group, assignments to build a corresponding dynamic group) + pub root: (ir::Id, Vec>), + /// maps cycles (i,j) -> fsm state type. + /// Here is an example FSM schedule: + /// Cycles FSM State (i.e., `fsm.out`) + /// (0..10) -> Normal[0,10) + /// (10..30) -> Offload(10) // Offloading to child + /// (30..40) -> Normal[11, 21) + /// (40,80) -> Offload(21) + /// (80,100)-> Normal[22, 42) + pub fsm_schedule: BTreeMap<(u64, u64), StateType>, + /// vec of (Node Object, cycles for which that child is executing). + /// Note that you can build `fsm_schedule` from just this information, + /// but it's convenient to have `fsm_schedule` avaialable. + pub children: Vec<(Node, (u64, u64))>, + /// Keep track of where we are within a single iteration. + /// If `latency` == 1, then we don't need an `fsm_cell`. + pub fsm_cell: Option>, + /// Keep track of which iteration we are on. If iteration count == 1, then + /// we don't need an `iter_count_cell`. + pub iter_count_cell: Option>, +} + +impl SingleNode { + /// Instantiates the necessary registers. + /// Because we share FSM registers, it's possible that this register has already + /// been instantiated. + /// Therefore we take in a bunch of data structures to keep track of coloring: + /// - `coloring` that maps group names -> colors, + /// - `colors_to_max_values` which maps colors -> (max latency, max_num_repeats) + /// (we need to make sure that when we instantiate a color, + /// we give enough bits to support the maximum latency/num_repeats that will be + /// used for that color) + /// - `colors_to_fsm` + /// which maps colors to (fsm_register, iter_count_register): fsm_register counts + /// up for a single iteration, iter_count_register counts the number of iterations + /// that have passed. + /// + /// Note that it is not always necessary to instantiate one or both registers (e.g., + /// if num_repeats == 1 then you don't need an iter_count_register). + /// + /// `one_hot_cutoff` is the cutoff to choose between binary and one hot encoding. + /// Any number of states greater than the cutoff will get binary encoding. + fn instantiate_fsms( + &mut self, + builder: &mut ir::Builder, + coloring: &HashMap, + colors_to_max_values: &HashMap, + colors_to_fsm: &mut HashMap< + ir::Id, + (OptionalStaticFSM, OptionalStaticFSM), + >, + one_hot_cutoff: u64, + ) { + // Get color assigned to this node. + let color = coloring.get(&self.root.0).expect("couldn't find group"); + // Check if we've already instantiated the registers for this color. + match colors_to_fsm.get(color) { + // We need to create the registers for the colors. + None => { + // First we get the maximum num_states and num_repeats + // for this color so we know how many bits each register needs. + let (num_states, num_repeats) = colors_to_max_values + .get(color) + .expect("Couldn't find color"); + // Only need a `self.fsm_cell` if num_states > 1. + if *num_states != 1 { + // Choose encoding based on one_hot_cutoff. + let encoding = if *num_states > one_hot_cutoff { + FSMEncoding::Binary + } else { + FSMEncoding::OneHot + }; + let fsm_cell = ir::rrc(StaticFSM::from_basic_info( + *num_states, + encoding, + builder, + )); + self.fsm_cell = Some(fsm_cell); + } + // Only need a `self.iter_count_cell` if num_states > 1. + if *num_repeats != 1 { + let encoding = if *num_repeats > one_hot_cutoff { + FSMEncoding::Binary + } else { + FSMEncoding::OneHot + }; + let repeat_counter = ir::rrc(StaticFSM::from_basic_info( + *num_repeats, + encoding, + builder, + )); + self.iter_count_cell = Some(repeat_counter); + } + + // Insert into `colors_to_fsms` so the next time we call this method + // we see we've already instantiated the registers. + colors_to_fsm.insert( + *color, + ( + self.fsm_cell.as_ref().map(Rc::clone), + self.iter_count_cell.as_ref().map(Rc::clone), + ), + ); + } + Some((fsm_option, repeat_option)) => { + // Trivially assign to `self.fsm_cell` and `self.iter_count_cell` since + // we've already created it. + self.fsm_cell = fsm_option.as_ref().map(Rc::clone); + self.iter_count_cell = repeat_option.as_ref().map(Rc::clone); + } + } + + // Recursively instantiate fsms for all the children. + for (child, _) in &mut self.children { + child.instantiate_fsms( + builder, + coloring, + colors_to_max_values, + colors_to_fsm, + one_hot_cutoff, + ); + } + } + + /// Counts to n. + /// If `incr_start_cond.is_some()`, then we will add it as an extra + /// guard guarding the 0->1 transition. + fn count_to_n( + &mut self, + builder: &mut ir::Builder, + incr_start_cond: Option>, + ) { + // res_vec will contain the assignments that count to n. + let mut res_vec: Vec> = Vec::new(); + + // Only need to count up to n if self.num_states > 1. + // If self.num_states == 1, then either a) latency is 1 cycle or b) + // we're just offloading the entire time (so the child will count). + // Either way, there's no need to instantiate a self.fsm_cell to count. + if self.num_states > 1 { + // `offload_states` are the fsm_states that last >1 cycles (i.e., states + // where children are executing, unless the child only lasts one cycle--- + // then we can discount it as an "offload" state). + let offload_states: Vec = self + .fsm_schedule + .iter() + .filter_map(|((beg, end), state_type)| match state_type { + StateType::Normal(_) => None, + StateType::Offload(offload_state) => { + // Only need to include the children that last more than one cycle. + if beg + 1 == *end { + None + } else { + Some(*offload_state) + } + } + }) + .collect(); + + // There are two conditions under which we increment the FSM. + // 1) Increment when we are NOT in an offload state + // 2) Increment when we ARE in an offload state, but the child being offloaded + // is in its final state. (intuitively, we need to increment because + // we know the control is being passed back to parent in the next cycle). + // (when we are in the final state, we obviously should not increment: + // we should reset back to 0.) + + let parent_fsm = Rc::clone( + self.fsm_cell + .as_mut() + .expect("should have set self.fsm_cell"), + ); + + // Build an adder to increment the parent fsm. + let (adder_asssigns, adder) = + parent_fsm.borrow_mut().build_incrementer(builder); + res_vec.extend(adder_asssigns); + + // Handle situation 1). Increment when we are NOT in an offload state + res_vec.extend(self.increment_if_not_offloading( + incr_start_cond.clone(), + &offload_states, + Rc::clone(&adder), + Rc::clone(&parent_fsm), + builder, + )); + + // Handle situation 2): Increment when we ARE in an offload state + // but the child being offloaded is in its final state. + res_vec.extend(self.increment_if_child_final_state( + &offload_states, + adder, + Rc::clone(&parent_fsm), + builder, + )); + + // Reset the FSM when it is at its final fsm_state. + let final_fsm_state = + self.get_fsm_query((self.latency - 1, self.latency), builder); + res_vec.extend( + parent_fsm + .borrow_mut() + .conditional_reset(final_fsm_state, builder), + ); + } + + // If self.num_states > 1, then it's guaranteed that self.latency > 1. + // However, even if self.num_states == 1, self.latency might still be + // greater than 1 if we're just offloading the computation for the entire time. + // In this case, we still need the children to count to n. + if self.latency > 1 { + for (child, (beg, end)) in self.children.iter_mut() { + // If beg == 0 and end > 1 then we need to "transfer" the incr_start_condition + // to the child so it guards the 0->1 transition. + let cond = if *beg == 0 && *end > 1 { + incr_start_cond.clone() + } else { + None + }; + // Recursively call `count_to_n` + child.count_to_n(builder, cond); + } + } + + // Handle repeats (i.e., make sure we actually interate `self.num_repeats` times). + if self.num_repeats != 1 { + // If self.latency == 10, then we should increment the self.iter_count_cell + // each time fsm == 9, i.e., `final_fsm_state`. + let final_fsm_state = + self.get_fsm_query((self.latency - 1, self.latency), builder); + + // `repeat_fsm` store number of iterations. + let repeat_fsm = Rc::clone( + self.iter_count_cell + .as_mut() + .expect("should have set self.iter_count_cell"), + ); + // Build an incrementer to increment `self.iter_count_cell`. + let (repeat_adder_assigns, repeat_adder) = + repeat_fsm.borrow_mut().build_incrementer(builder); + // We shouldn't increment `self.iter_count_cell` if we are in the final iteration: + // we should reset it instead. + let final_repeat_state = *repeat_fsm.borrow_mut().query_between( + builder, + (self.num_repeats - 1, self.num_repeats), + ); + let not_final_repeat_state = final_repeat_state.clone().not(); + res_vec.extend(repeat_adder_assigns); + // Incrementing self.iter_count_cell when appropriate. + res_vec.extend(repeat_fsm.borrow_mut().conditional_increment( + final_fsm_state.clone().and(not_final_repeat_state), + repeat_adder, + builder, + )); + // Resetting self.iter_count_cell when appropriate. + res_vec.extend(repeat_fsm.borrow_mut().conditional_reset( + final_fsm_state.clone().and(final_repeat_state), + builder, + )); + } + + // Extend root assigns to include `res_vec` (which counts to n). + self.root.1.extend(res_vec); + } + + /// Helper to `count_to_n` + /// Increment when we are NOT in an offload state + /// e.g., if `offload_states` == [2,4,6] then + /// We should increment when !(fsm == 2 | fsm == 4 | fsm == 6). + /// There are a couple corner cases we need to think about (in particular, + /// we should guard the 0->1 transition differently if `incr_start_cond` is + /// some(), and we should reset rather than increment when we are in the final + /// fsm state). + fn increment_if_not_offloading( + &mut self, + incr_start_cond: Option>, + offload_states: &[u64], + adder: ir::RRC, + parent_fsm: ir::RRC, + builder: &mut ir::Builder, + ) -> Vec> { + let mut res_vec = vec![]; + let mut offload_state_guard: ir::Guard = + ir::Guard::Not(Box::new(ir::Guard::True)); + for offload_state in offload_states { + // Creating a guard that checks whether the parent fsm is + // in an offload state. + offload_state_guard.update(|g| { + g.or(*parent_fsm.borrow_mut().query_between( + builder, + (*offload_state, offload_state + 1), + )) + }); + } + let not_offload_state = offload_state_guard.not(); + + let mut incr_guard = not_offload_state; + + // If incr_start_cond.is_some(), then we have to specially take into + // account this scenario when incrementing the FSM. + if let Some(g) = incr_start_cond.clone() { + // If we offload during the transition from cycle 0->1 transition + // then we don't need a special first transition guard. + // (we will make sure the child will add this guard when + // it is counting to n.) + if let Some(((beg, end), state_type)) = + self.fsm_schedule.iter().next() + { + if !(matches!(state_type, StateType::Offload(_)) + && *beg == 0 + && *end > 1) + { + let first_state = self.get_fsm_query((0, 1), builder); + // We must handle the 0->1 transition separately. + // fsm.in = fsm == 0 & incr_start_cond ? fsm + 1; + // fsm.write_en = fsm == 0 & incr_start_cond ? 1'd1; + res_vec.extend( + parent_fsm.borrow_mut().conditional_increment( + first_state.clone().and(g), + Rc::clone(&adder), + builder, + ), + ); + // We also have to add fsm != 0 to incr_guard since + // we have just added assignments to handle this situation + // separately + incr_guard = incr_guard.and(first_state.not()) + } + } + }; + + // We shouldn't increment when we are in the final state + // (we should be resetting instead). + // So we need to `& !in_final_state` to the guard. + let final_fsm_state = + self.get_fsm_query((self.latency - 1, self.latency), builder); + let not_final_state = final_fsm_state.not(); + + // However, if the final state is an offload state, then there's no need + // to make this extra check of not being in the last state. + if let Some((_, (_, end_final_child))) = self.children.last() { + // If the final state is not an offload state, then + // we need to add this check. + if *end_final_child != self.latency { + incr_guard = incr_guard.and(not_final_state); + } + } else { + // Also, if there is just no offloading, then we need to add this check. + incr_guard = incr_guard.and(not_final_state); + }; + + // Conditionally increment based on `incr_guard` + res_vec.extend(parent_fsm.borrow_mut().conditional_increment( + incr_guard, + Rc::clone(&adder), + builder, + )); + + res_vec + } + + /// Helper to `count_to_n` + /// Increment when we ARE in an offload state, but the child being + /// offloaded is in its final state. + fn increment_if_child_final_state( + &mut self, + offload_states: &[u64], + adder: ir::RRC, + parent_fsm: ir::RRC, + builder: &mut ir::Builder, + ) -> Vec> { + let mut res_vec = vec![]; + for (i, (child, (_, end))) in self + .children + .iter_mut() + // If child only lasts a single cycle, then we can just unconditionally increment. + // We handle that case above (since `offload_states` only includes children that + // last more than one cycle). + .filter(|(_, (beg, end))| beg + 1 != *end) + .enumerate() + { + // We need to increment parent when child is in final state. + // For example, if the parent is offloading to `child_x` when it + // is in state 5, the guard would look like + // fsm.in = fsm == 5 && child_x_fsm_in_final_state ? fsm + 1; + // fsm.write_en == 5 && child_x_fsm_in_final_state ? 1'd1; + + // The one exception: + // If the offload state is the last state (end == self.latency) then we don't + // increment, we need to reset to 0 (which we handle separately). + if *end != self.latency { + // We know each offload state corresponds to exactly one child. + let child_state = offload_states[i]; + // Checking that we are in child state, e.g., `(fsm == 5)` + // in the above example. + let in_child_state = parent_fsm + .borrow_mut() + .query_between(builder, (child_state, child_state + 1)); + // now we need to check `child_fsm_in_final_state` + let total_child_latency = + child.get_latency() * child.get_num_repeats(); + let child_final_state = child.query_between( + (total_child_latency - 1, total_child_latency), + builder, + ); + // Conditionally increment when `fsm==5 & child_final_state` + let parent_fsm_incr = + parent_fsm.borrow_mut().conditional_increment( + in_child_state.and(child_final_state), + Rc::clone(&adder), + builder, + ); + res_vec.extend(parent_fsm_incr); + } + } + res_vec + } + + /// `Realize` each static group in the tree into a dynamic group. + /// In particular, this involves converting %[i:j] guards into actual + /// fsm register queries (which can get complicated with out tree structure: + /// it's not just i <= fsm < j anymore). + /// + /// `reset_early_map`, `fsm_info_map`, and `group_rewrites` are all + /// metadata to make it more easier later on when we are rewriting control, + /// adding wrapper groups when necessary, etc. + fn realize( + &mut self, + ignore_timing_guards: bool, + static_groups: &Vec>, + reset_early_map: &mut HashMap, + fsm_info_map: &mut HashMap< + ir::Id, + (ir::Id, ir::Guard, ir::Guard), + >, + group_rewrites: &mut ir::rewriter::PortRewriteMap, + builder: &mut ir::Builder, + ) { + // Get static group we are "realizing". + let static_group = Rc::clone( + static_groups + .iter() + .find(|sgroup| sgroup.borrow().name() == self.root.0) + .expect("couldn't find static group"), + ); + // Create the dynamic "early reset group" that will replace the static group. + let static_group_name = static_group.borrow().name(); + let mut early_reset_name = static_group_name.to_string(); + early_reset_name.insert_str(0, "early_reset_"); + let early_reset_group = builder.add_group(early_reset_name); + + // Realize the static %[i:j] guards to fsm queries. + // *This is the most of the difficult thing the function does*. + // This is significantly more complicated with a tree structure. + let mut assigns = static_group + .borrow() + .assignments + .clone() + .into_iter() + .map(|assign| { + self.make_assign_dyn( + assign, + false, + ignore_timing_guards, + builder, + ) + }) + .collect_vec(); + + // Add assignment `group[done] = ud.out`` to the new group. + structure!( builder; let ud = prim undef(1);); + let early_reset_done_assign = build_assignments!( + builder; + early_reset_group["done"] = ? ud["out"]; + ); + assigns.extend(early_reset_done_assign); + + // Adding the assignments of `self.root` (mainly the `count_to_n` + // assignments). + assigns.extend(std::mem::take(&mut self.root.1)); + self.root.1 = assigns.clone(); + + early_reset_group.borrow_mut().assignments = assigns; + early_reset_group.borrow_mut().attributes = + static_group.borrow().attributes.clone(); + + // Now we have to update the fields with a bunch of information. + // This makes it easier when we have to build wrappers, rewrite ports, etc. + + // Map the static group name -> early reset group name. + reset_early_map + .insert(static_group_name, early_reset_group.borrow().name()); + // self.group_rewrite_map helps write static_group[go] to early_reset_group[go] + // Technically we could do this w/ early_reset_map but is easier w/ + // group_rewrite, which is explicitly of type `PortRewriterMap` + group_rewrites.insert( + ir::Canonical::new(static_group_name, ir::Id::from("go")), + early_reset_group.borrow().find("go").unwrap_or_else(|| { + unreachable!( + "group {} has no go port", + early_reset_group.borrow().name() + ) + }), + ); + + let fsm_identifier = match self.fsm_cell.as_ref() { + // If the tree does not have an fsm cell, then we can err on the + // side of giving it its own unique identifier. + None => self.root.0, + Some(fsm_rc) => fsm_rc.borrow().get_unique_id(), + }; + let total_latency = self.latency * self.num_repeats; + fsm_info_map.insert( + early_reset_group.borrow().name(), + ( + fsm_identifier, + self.query_between((0, 1), builder), + self.query_between((total_latency - 1, total_latency), builder), + ), + ); + + // Recursively realize each child. + self.children.iter_mut().for_each(|(child, _)| { + child.realize( + ignore_timing_guards, + static_groups, + reset_early_map, + fsm_info_map, + group_rewrites, + builder, + ) + }) + } + + // Rephrasing an (i,j) query: this breaks up the guard and makes it easier + // to figure out what logic we need to instantiate to perform the query. + // Restructure an (i,j) query into: + // (beg, middle, end) query. + // This is best explained by example. + // Suppose latency = 5, num repeats = 10. + // Suppose we query %[3:32]. + // beg = Some(0, 3-5). 0 bc we are on the 0th iteration, + // and only cycles 3-5 of that iteration. + // middle = Some([1,6)). These are the iterations for which the query is true + // throughout the entire iteration. + // end = Some(6,0-2). 6 bc 6th iteration, 0-2 because only cycles 0-2 of that + // iteration. + fn restructure_query( + &self, + query: (u64, u64), + ) -> ( + Option, + Option, + Option, + ) { + // Splitting the query into an fsm query and and iteration query. + // (beg_iter_query, end_iter_query) is an inclusive (both sides) query + // on the iterations we are active for. + // (beg_fsm_query, end_fsm_query) is the fsm query we should be supporting. + let (beg_query, end_query) = query; + let (beg_iter_query, beg_fsm_query) = + (beg_query / self.latency, beg_query % self.latency); + let (end_iter_query, mut end_fsm_query) = + ((end_query - 1) / self.latency, (end_query) % self.latency); + if end_fsm_query == 0 { + end_fsm_query = self.latency; + } + + // Scenario 1: the query spans only a single iteration. + // In this case, we set beg_query to + // `Some(, (beg_fsm_query->end_fsm_query))`` + // and set middle and end to None. + if beg_iter_query == end_iter_query { + let repeat_query = beg_iter_query; + let fsm_query = (beg_fsm_query, end_fsm_query); + let res = Some((repeat_query, fsm_query)); + (res, None, None) + } + // Scenario 2: the query spans only 2 iterations. + // In this case, we only need a beg_query and an end_query, but no + // middle query. + else if beg_iter_query + 1 == end_iter_query { + let middle_res = None; + + let repeat_query0 = beg_iter_query; + // We know the beg_query stretches into the next iteration, + // so we can end it at self.latency. + let fsm_query0 = (beg_fsm_query, self.latency); + let beg_res = Some((repeat_query0, fsm_query0)); + + let repeat_query1 = end_iter_query; + // We know the end_query stretches backwards into the previous iteration, + // so we can start it at 0. + let fsm_query1 = (0, end_fsm_query); + let end_res = Some((repeat_query1, fsm_query1)); + + (beg_res, middle_res, end_res) + } + // Scenario 3: the query spans 3 or more iterations. + // In this case, we need the middle_query for the middle iterations, + // and the beg and end queries for (parts of) the + // first and last iterations for this query. + else { + let mut unconditional_repeat_query = + (beg_iter_query + 1, end_iter_query); + + let repeat_query0 = beg_iter_query; + // We know the beg_query stretches into the next iteration, + // so we can end it at self.latency. + let fsm_query0 = (beg_fsm_query, self.latency); + let mut beg_res = Some((repeat_query0, fsm_query0)); + // if beg_fsm_query == 0, then beg_query spans the entire iterations, + // so we can just add it the unconditional_repeat_query (i.e., the middle_query). + if beg_fsm_query == 0 { + beg_res = None; + unconditional_repeat_query.0 -= 1; + } + + let repeat_query1 = end_iter_query; + // We know the end_query stretches backwards into the previous iteration, + // so we can start it at 0. + let fsm_query1 = (0, end_fsm_query); + let mut end_res = Some((repeat_query1, fsm_query1)); + // If end_fsm_query == self.latency, then end_res spans the entire iterations, + // so we can just add it the unconditional_repeat_query (i.e., the middle_query). + if end_fsm_query == self.latency { + end_res = None; + unconditional_repeat_query.1 += 1; + } + + (beg_res, Some(unconditional_repeat_query), end_res) + } + } + + // Given query (i,j), get the fsm query for cycles (i,j). + // Does NOT check the iteration number. + // This is greatly complicated by the offloading to children. + // We use a resturcturing that organizes the query into (beg, middle, end), + // similar to (but not the same as) self.restructure_query(). + fn get_fsm_query( + &mut self, + query: (u64, u64), + builder: &mut ir::Builder, + ) -> ir::Guard { + // If guard is true the entire execution, then return `true`. + if 0 == query.0 && self.latency == query.1 { + return ir::Guard::True; + } + + let fsm_cell_opt = self.fsm_cell.as_ref(); + if fsm_cell_opt.is_none() { + // If there is no fsm cell even though latency > 1, then we must + // have offloaded the entire latency. Therefore we just need + // to query the child. + assert!(self.offload_entire_latency()); + let (only_child, _) = self.children.iter_mut().next().unwrap(); + return only_child.query_between(query, builder); + } + + let fsm_cell: Rc> = + Rc::clone(fsm_cell_opt.expect("just checked if None")); + + let (query_beg, query_end) = query; + let mut beg_interval = ir::Guard::True.not(); + let mut end_interval = ir::Guard::True.not(); + let mut middle_interval = None; + let mut child_index = 0; + // Suppose fsm_schedule = Cycles FSM State (i.e., `fsm.out`) + // (0..10) -> Normal[0,10) + // (10..30) -> Offload(10) // Offloading to child + // (30..40) -> Normal[11, 21) + // (40,80) -> Offload(21) + // (80,100)-> Normal[22, 42) + // And query = (15,95). + // Then at the end of the following `for` loop we want: + // `beg_interval` should be fsm == 10 && + // `middle_interval` should be (11, 22) + // `end_interval` should be 22 <= fsm < 37 + for ((beg, end), state_type) in self.fsm_schedule.iter() { + // Check if the query encompasses the entire interval. + // If so, we add it to the "middle" interval. + if query_beg <= *beg && *end <= query_end { + // Get the interval we have to add, based on `state_type`. + let interval_to_add = match state_type { + StateType::Normal(fsm_interval) => *fsm_interval, + StateType::Offload(offload_state) => { + (*offload_state, offload_state + 1) + } + }; + // Add `interval_to_add` to `middle_interval`. + match middle_interval { + None => middle_interval = Some(interval_to_add), + Some((cur_start, cur_end)) => { + assert!(cur_end == interval_to_add.0); + middle_interval = Some((cur_start, interval_to_add.1)); + } + } + } + // Otherwise check if the beginning of the query lies within the + // interval (This should only happen once). Add to `beg_interval`. + else if *beg <= query_beg && query_beg < *end { + assert!(beg_interval.is_false()); + // This is the query, but relativized to the start of the current interval. + let relative_query = (query_beg - beg, query_end - beg); + match state_type { + // If we are not offloading, then we can just produce a normal + // query. + StateType::Normal((beg_fsm_interval, end_fsm_interval)) => { + let translated_query = ( + beg_fsm_interval + relative_query.0, + // This query either stretches into the next interval, or + // ends within the interval: we want to capture both of these choices. + std::cmp::min( + beg_fsm_interval + relative_query.1, + *end_fsm_interval, + ), + ); + beg_interval = *fsm_cell + .borrow_mut() + .query_between(builder, translated_query); + } + // If we are not offloading, then we first check the state, + // then we must query the corresponding child. + StateType::Offload(offload_state) => { + let in_offload_state = + *fsm_cell.borrow_mut().query_between( + builder, + (*offload_state, offload_state + 1), + ); + let (child, _) = + self.children.get_mut(child_index).unwrap(); + let child_query = child.query_between( + ( + relative_query.0, + // This query either stretches into another interval, or + // ends within the interval: we want to capture both of these choices. + std::cmp::min( + relative_query.1, + child.get_latency() + * child.get_num_repeats(), + ), + ), + builder, + ); + beg_interval = in_offload_state.and(child_query); + } + }; + } + // Check if the end of the query lies within the + // interval (This should only happen once) Add to `end_interval`. + else if *beg < query_end && query_end <= *end { + // We only need the end of the relative query. + // If we try to get the beginning then we could get overflow error. + let relative_query_end = query_end - beg; + assert!(end_interval.is_false()); + match state_type { + StateType::Normal((beg_fsm_interval, _)) => { + end_interval = *fsm_cell.borrow_mut().query_between( + builder, + // This query must stretch backwards into a preiouvs interval + // Otherwise it would have been caught by the + // So beg_fsm_interval is a safe start. + ( + *beg_fsm_interval, + beg_fsm_interval + relative_query_end, + ), + ); + } + StateType::Offload(offload_state) => { + let in_offload_state = + *fsm_cell.borrow_mut().query_between( + builder, + (*offload_state, offload_state + 1), + ); + let (child, _) = + self.children.get_mut(child_index).unwrap(); + // We know this must stretch backwards + // into a previous interval: otherwise, it + // would have been caught by the previous elif condition. + // therefore, we can start the child query at 0. + let child_query = child + .query_between((0, relative_query_end), builder); + end_interval = in_offload_state.and(child_query); + } + }; + } + if matches!(state_type, StateType::Offload(_)) { + child_index += 1; + } + } + + // Turn `middle_interval` into an actual `ir::Guard`. + let middle_query = match middle_interval { + None => Box::new(ir::Guard::True.not()), + Some((i, j)) => self + .fsm_cell + .as_mut() + .unwrap() + .borrow_mut() + .query_between(builder, (i, j)), + }; + + beg_interval.or(end_interval.or(*middle_query)) + } + + // Produces a guard that checks whether query.0 <= self.iter_count_cell < query.1 + fn get_repeat_query( + &mut self, + query: (u64, u64), + builder: &mut ir::Builder, + ) -> Box> { + // If self.num_repeats == 1, then no need for a complicated query. + match self.num_repeats { + 1 => { + assert!(query.0 == 0 && query.1 == 1); + Box::new(ir::Guard::True) + } + _ => self + .iter_count_cell + .as_mut() + .expect("querying repeat implies cell exists") + .borrow_mut() + .query_between(builder, (query.0, query.1)), + } + } + + // Produce a guard that checks: + // - whether iteration == repeat_query AND + // - whether %[fsm_query.0:fsm_query.1] + fn check_iteration_and_fsm_state( + &mut self, + (repeat_query, fsm_query): (u64, (u64, u64)), + builder: &mut ir::Builder, + ) -> ir::Guard { + let fsm_guard = self.get_fsm_query(fsm_query, builder); + + // Checks `self.iter_count_cell`. + let counter_guard = + self.get_repeat_query((repeat_query, repeat_query + 1), builder); + ir::Guard::And(Box::new(fsm_guard), counter_guard) + } + + // Converts a %[i:j] query into a query of `self`'s and its childrens + // iteration registers. + fn query_between( + &mut self, + query: (u64, u64), + builder: &mut ir::Builder, + ) -> ir::Guard { + // See `restructure_query` to see what we're doing. + // But basically: + // beg_iter_query = Option(iteration number, cycles during that iteration the query is true). + // middle_iter_query = Option(iterations during which the query is true the entire iteration). + // end_iter_query = Option(iteration number, cycles during that iteration the query is true). + let (beg_iter_query, middle_iter_query, end_iter_query) = + self.restructure_query(query); + + // Call `check_iteration_and_fsm_state` for beg and end queries. + let g0 = match beg_iter_query { + None => ir::Guard::True.not(), + Some(q0) => self.check_iteration_and_fsm_state(q0, builder), + }; + let g1 = match end_iter_query { + None => ir::Guard::True.not(), + Some(q1) => self.check_iteration_and_fsm_state(q1, builder), + }; + + // Call `get_repeat_query` for middle_iter_queries. + let rep_query = match middle_iter_query { + None => Box::new(ir::Guard::True.not()), + Some(rq) => self.get_repeat_query(rq, builder), + }; + g0.or(g1.or(*rep_query)) + } + + // Takes in a static guard `guard`, and returns equivalent dynamic guard + // The only thing that actually changes is the Guard::Info case + // We need to turn static_timing to dynamic guards using `fsm`. + // See `make_assign_dyn` for explanations of `global_view` and `ignore_timing` + // variable. + fn make_guard_dyn( + &mut self, + guard: ir::Guard, + global_view: bool, + ignore_timing: bool, + builder: &mut ir::Builder, + ) -> Box> { + match guard { + ir::Guard::Or(l, r) => Box::new(ir::Guard::Or( + self.make_guard_dyn(*l, global_view, ignore_timing, builder), + self.make_guard_dyn(*r, global_view, ignore_timing, builder), + )), + ir::Guard::And(l, r) => Box::new(ir::Guard::And( + self.make_guard_dyn(*l, global_view, ignore_timing, builder), + self.make_guard_dyn(*r, global_view, ignore_timing, builder), + )), + ir::Guard::Not(g) => Box::new(ir::Guard::Not(self.make_guard_dyn( + *g, + global_view, + ignore_timing, + builder, + ))), + ir::Guard::CompOp(op, l, r) => { + Box::new(ir::Guard::CompOp(op, l, r)) + } + ir::Guard::Port(p) => Box::new(ir::Guard::Port(p)), + ir::Guard::True => Box::new(ir::Guard::True), + ir::Guard::Info(static_timing) => { + // If `ignore_timing` is true, then just return a true guard. + if ignore_timing { + assert!(static_timing.get_interval() == (0, 1)); + return Box::new(ir::Guard::True); + } + if global_view { + // For global_view we call `query_between` + Box::new( + self.query_between( + static_timing.get_interval(), + builder, + ), + ) + } else { + // For local_view we call `get_fsm_query` + Box::new( + self.get_fsm_query( + static_timing.get_interval(), + builder, + ), + ) + } + } + } + } + + /// Takes in static assignment `assign` and returns a dynamic assignments + /// For example, it could transform the guard %[2:3] -> fsm.out >= 2 & fsm.out <= 3 + /// `global_view`: are you just querying for a given iteration, or are + /// you querying for the entire tree's execution? + /// - if `global_view` is true, then you have to include the iteration + /// count register in the assignment's guard. + /// - if `global_view` is false, then you dont' have to include it + /// `ignore_timing`: remove static timing guards instead of transforming them + /// into an FSM query. Note that in order to do this, the timing guard must + /// equal %[0:1], otherwise we will throw an error. This option is here + /// mainly to save resource usage. + pub fn make_assign_dyn( + &mut self, + assign: ir::Assignment, + global_view: bool, + ignore_timing: bool, + builder: &mut ir::Builder, + ) -> ir::Assignment { + ir::Assignment { + src: assign.src, + dst: assign.dst, + attributes: assign.attributes, + guard: self.make_guard_dyn( + *assign.guard, + global_view, + ignore_timing, + builder, + ), + } + } + + // Helper function: checks + // whether the tree offloads its entire latency, and returns the + // appropriate `bool`. + fn offload_entire_latency(&self) -> bool { + self.children.len() == 1 + && self + .children + .iter() + .any(|(_, (beg, end))| *beg == 0 && *end == self.latency) + // This last check is prob unnecessary since it follows from the first two. + && self.num_states == 1 + } +} + +/// These methods handle adding conflicts to the tree (to help coloring for +/// sharing FSMs) +impl SingleNode { + // Get names of groups corresponding to all nodes + pub fn get_all_nodes(&self) -> Vec { + let mut res = vec![self.root.0]; + for (child, _) in &self.children { + res.extend(child.get_all_nodes()) + } + res + } + + // Adds conflicts between children and any descendents. + // Also add conflicts between any overlapping children. XXX(Caleb): normally + // there shouldn't be overlapping children, but when we are doing the traditional + // method in we don't offload (and therefore don't need this tree structure) + // I have created dummy trees for the sole purpose of drawing conflicts + pub fn add_conflicts(&self, conflict_graph: &mut GraphColoring) { + let root_name = self.root.0; + for (child, _) in &self.children { + for sgroup in &child.get_all_nodes() { + conflict_graph.insert_conflict(&root_name, sgroup); + } + child.add_conflicts(conflict_graph); + } + // Adding conflicts between overlapping children. + for ((child_a, (beg_a, end_a)), (child_b, (beg_b, end_b))) in + self.children.iter().tuple_combinations() + { + // Checking if children overlap: either b begins within a, it + // ends within a, or it encompasses a's entire interval. + if ((beg_a <= beg_b) & (beg_b < end_a)) + | ((beg_a < end_b) & (end_b <= end_a)) + | (beg_b <= beg_a && end_a <= end_b) + { + // Adding conflicts between all nodes of the children if + // the children overlap. + for a_node in child_a.get_all_nodes() { + for b_node in child_b.get_all_nodes() { + conflict_graph.insert_conflict(&a_node, &b_node); + } + } + } + } + } + + // Gets max value according to some function f. + pub fn get_max_value(&self, name: &ir::Id, f: &F) -> u64 + where + F: Fn(&SingleNode) -> u64, + { + let mut cur_max = 0; + if self.root.0 == name { + cur_max = std::cmp::max(cur_max, f(self)); + } + for (child, _) in &self.children { + cur_max = std::cmp::max(cur_max, child.get_max_value(name, f)); + } + cur_max + } +} + +/// Represents a group of `Nodes` that execute in parallel. +pub struct ParNodes { + /// Name of the `par_group` that fires off the threads + pub group_name: ir::Id, + /// Latency + pub latency: u64, + /// Num Repeats + pub num_repeats: u64, + /// (Thread, interval thread is active). + /// Interval thread is active should always start at 0. + pub threads: Vec<(Node, (u64, u64))>, +} + +impl ParNodes { + /// Instantiates FSMs by recursively instantiating FSM for each thread. + pub fn instantiate_fsms( + &mut self, + builder: &mut ir::Builder, + coloring: &HashMap, + colors_to_max_values: &HashMap, + colors_to_fsm: &mut HashMap< + ir::Id, + (OptionalStaticFSM, OptionalStaticFSM), + >, + one_hot_cutoff: u64, + ) { + for (thread, _) in &mut self.threads { + thread.instantiate_fsms( + builder, + coloring, + colors_to_max_values, + colors_to_fsm, + one_hot_cutoff, + ); + } + } + + /// Counts to N by recursively calling `count_to_n` on each thread. + pub fn count_to_n( + &mut self, + builder: &mut ir::Builder, + incr_start_cond: Option>, + ) { + for (thread, _) in &mut self.threads { + thread.count_to_n(builder, incr_start_cond.clone()); + } + } + + /// Realizes static groups into dynamic group. + pub fn realize( + &mut self, + ignore_timing_guards: bool, + static_groups: &Vec>, + reset_early_map: &mut HashMap, + fsm_info_map: &mut HashMap< + ir::Id, + (ir::Id, ir::Guard, ir::Guard), + >, + group_rewrites: &mut ir::rewriter::PortRewriteMap, + builder: &mut ir::Builder, + ) { + // Get static grouo we are "realizing". + let static_group = Rc::clone( + static_groups + .iter() + .find(|sgroup| sgroup.borrow().name() == self.group_name) + .expect("couldn't find static group"), + ); + // Create the dynamic "early reset group" that will replace the static group. + let static_group_name = static_group.borrow().name(); + let mut early_reset_name = static_group_name.to_string(); + early_reset_name.insert_str(0, "early_reset_"); + let early_reset_group = builder.add_group(early_reset_name); + + // Get the longest node. + let longest_node = self.get_longest_node(); + + // If one thread lasts 10 cycles, and another lasts 5 cycles, then the par_group + // will look like this: + // static<10> group par_group { + // thread1[go] = 1'd1; + // thread2[go] = %[0:5] ? 1'd1; + // } + // Therefore the %[0:5] needs to be realized using the FSMs from thread1 (the + // longest FSM). + let mut assigns = static_group + .borrow() + .assignments + .clone() + .into_iter() + .map(|assign| { + longest_node.make_assign_dyn( + assign, + true, + ignore_timing_guards, + builder, + ) + }) + .collect_vec(); + + // Add assignment `group[done] = ud.out`` to the new group. + structure!( builder; let ud = prim undef(1);); + let early_reset_done_assign = build_assignments!( + builder; + early_reset_group["done"] = ? ud["out"]; + ); + assigns.extend(early_reset_done_assign); + + early_reset_group.borrow_mut().assignments = assigns; + early_reset_group.borrow_mut().attributes = + static_group.borrow().attributes.clone(); + + // Now we have to update the fields with a bunch of information. + // This makes it easier when we have to build wrappers, rewrite ports, etc. + + // Map the static group name -> early reset group name. + // This is helpful for rewriting control + reset_early_map + .insert(static_group_name, early_reset_group.borrow().name()); + // self.group_rewrite_map helps write static_group[go] to early_reset_group[go] + // Technically we could do this w/ early_reset_map but is easier w/ + // group_rewrite, which is explicitly of type `PortRewriterMap` + group_rewrites.insert( + ir::Canonical::new(static_group_name, ir::Id::from("go")), + early_reset_group.borrow().find("go").unwrap_or_else(|| { + unreachable!( + "group {} has no go port", + early_reset_group.borrow().name() + ) + }), + ); + + let fsm_identifier = match longest_node.fsm_cell.as_ref() { + // If the tree does not have an fsm cell, then we can err on the + // side of giving it its own unique identifier. + None => longest_node.root.0, + Some(fsm_rc) => fsm_rc.borrow().get_unique_id(), + }; + + let total_latency = self.latency * self.num_repeats; + fsm_info_map.insert( + early_reset_group.borrow().name(), + ( + fsm_identifier, + self.query_between((0, 1), builder), + self.query_between((total_latency - 1, total_latency), builder), + ), + ); + + // Recursively realize each child. + self.threads.iter_mut().for_each(|(child, _)| { + child.realize( + ignore_timing_guards, + static_groups, + reset_early_map, + fsm_info_map, + group_rewrites, + builder, + ) + }) + } + + /// Recursively searches each thread to get the longest (in terms of + /// cycle counts) SingleNode. + pub fn get_longest_node(&mut self) -> &mut SingleNode { + let max = self.threads.iter_mut().max_by_key(|(child, _)| { + (child.get_latency() * child.get_num_repeats()) as i64 + }); + if let Some((max_child, _)) = max { + match max_child { + Node::Par(par_nodes) => par_nodes.get_longest_node(), + Node::Single(single_node) => single_node, + } + } else { + unreachable!("self.children is empty/no maximum value found"); + } + } + + /// Use the longest node to query between. + pub fn query_between( + &mut self, + query: (u64, u64), + builder: &mut ir::Builder, + ) -> ir::Guard { + let longest_node = self.get_longest_node(); + longest_node.query_between(query, builder) + } +} + +/// Used to add conflicts for graph coloring for sharing FSMs. +/// See the equivalent SingleNode implementation for more details. +impl ParNodes { + pub fn get_all_nodes(&self) -> Vec { + let mut res = vec![]; + for (thread, _) in &self.threads { + res.extend(thread.get_all_nodes()) + } + res + } + + pub fn add_conflicts(&self, conflict_graph: &mut GraphColoring) { + for ((thread1, _), (thread2, _)) in + self.threads.iter().tuple_combinations() + { + for sgroup1 in thread1.get_all_nodes() { + for sgroup2 in thread2.get_all_nodes() { + conflict_graph.insert_conflict(&sgroup1, &sgroup2); + } + } + thread1.add_conflicts(conflict_graph); + thread2.add_conflicts(conflict_graph); + } + } + + pub fn get_max_value(&self, name: &ir::Id, f: &F) -> u64 + where + F: Fn(&SingleNode) -> u64, + { + let mut cur_max = 0; + for (thread, _) in &self.threads { + cur_max = std::cmp::max(cur_max, thread.get_max_value(name, f)); + } + cur_max + } +} diff --git a/calyx-opt/src/default_passes.rs b/calyx-opt/src/default_passes.rs index e4518dd365..bf2c2f210c 100644 --- a/calyx-opt/src/default_passes.rs +++ b/calyx-opt/src/default_passes.rs @@ -111,8 +111,8 @@ impl PassManager { StaticInliner, MergeAssign, // Static inliner generates lots of assigns DeadGroupRemoval, // Static inliner generates lots of dead groups - SimplifyStaticGuards, AddGuard, + SimplifyStaticGuards, StaticFSMOpts, CompileStatic, DeadGroupRemoval, diff --git a/calyx-opt/src/passes/add_guard.rs b/calyx-opt/src/passes/add_guard.rs index 157b2f53be..0dd9367ba7 100644 --- a/calyx-opt/src/passes/add_guard.rs +++ b/calyx-opt/src/passes/add_guard.rs @@ -22,20 +22,26 @@ impl Visitor for AddGuard { _sigs: &ir::LibrarySignatures, _comps: &[ir::Component], ) -> VisResult { - if comp.is_static() { - let latency = s.get_latency(); - if let ir::StaticControl::Enable(sen) = s { - for assign in sen.group.borrow_mut().assignments.iter_mut() { - let g = - ir::Guard::Info(ir::StaticTiming::new((0, latency))); - let new_g = ir::Guard::And( - Box::new(g), - std::mem::replace( - &mut assign.guard, - Box::new(ir::Guard::True), - ), - ); - assign.guard = Box::new(new_g); + if let Some(latency) = comp.latency { + let lat_u64: u64 = latency.into(); + if lat_u64 > 1 { + if let ir::StaticControl::Enable(sen) = s { + for assign in sen.group.borrow_mut().assignments.iter_mut() + { + let g = ir::Guard::Info(ir::StaticTiming::new(( + 0, lat_u64, + ))); + let new_g = ir::Guard::And( + Box::new(g), + std::mem::replace( + &mut assign.guard, + Box::new(ir::Guard::True), + ), + ); + assign.guard = Box::new(new_g); + } + } else { + unreachable!("Non-Enable Static Control should have been compiled away. Run {} to do this", crate::passes::StaticInliner::name()); } } } diff --git a/calyx-opt/src/passes/compile_static.rs b/calyx-opt/src/passes/compile_static.rs index 7a0db6b86a..4c150f2d48 100644 --- a/calyx-opt/src/passes/compile_static.rs +++ b/calyx-opt/src/passes/compile_static.rs @@ -1,16 +1,23 @@ -use crate::analysis::{GraphColoring, StaticFSM, StaticSchedule}; -use crate::traversal::{Action, Named, ParseVal, PassOpt, VisResult, Visitor}; -use calyx_ir as ir; +use crate::analysis::{ + GraphColoring, Node, ParNodes, SingleNode, StateType, StaticFSM, +}; +use crate::traversal::{ + Action, ConstructVisitor, Named, ParseVal, PassOpt, VisResult, Visitor, +}; +use calyx_ir::{self as ir, Nothing, PortParent}; use calyx_ir::{guard, structure, GetAttributes}; -use calyx_utils::Error; +use calyx_utils::{CalyxResult, Error}; +use core::panic; use ir::{build_assignments, RRC}; use itertools::Itertools; -use std::collections::{HashMap, HashSet}; +use std::collections::{BTreeMap, HashMap, HashSet}; use std::ops::Not; use std::rc::Rc; +use std::vec; + +type OptionalStaticFSM = Option>; /// Compiles Static Islands -#[derive(Default)] pub struct CompileStatic { /// maps original static group names to the corresponding group that has an FSM that reset early reset_early_map: HashMap, @@ -18,8 +25,25 @@ pub struct CompileStatic { wrapper_map: HashMap, /// maps fsm names to their corresponding signal_reg signal_reg_map: HashMap, - /// maps reset_early_group names to StaticFSM object - fsm_info_map: HashMap>, + /// maps reset_early_group names to (fsm_identifier, fsm_first_state, final_fsm_state); + /// The "fsm identifier" is just the name of the fsm (if it exists) and + /// some other unique identifier if it doesn't exist (this works because + /// it is always fine to give each entry group its own completely unique identifier.) + fsm_info_map: + HashMap, ir::Guard)>, + /// Maps `static_group[go]` to `early_reset_group[go]`. + group_rewrites: ir::rewriter::PortRewriteMap, + + /// Command line arguments: + /// Cutoff for one hot encoding. Anything larger than the cutoff becomes + /// binary. + one_hot_cutoff: u64, + /// Bool indicating whether to make the FSM pause (i.e., stop counting) when + /// offloading. In order for compilation to make sense, this parameter must + /// match the parameter for `static-inline`. + offload_pause: bool, + /// Bool indicating whether to greedily share the FSM registers + greedy_share: bool, } impl Named for CompileStatic { @@ -34,23 +58,65 @@ impl Named for CompileStatic { fn opts() -> Vec { vec![PassOpt::new( "one-hot-cutoff", - "The upper limit on the number of states the static FSM must have before we pick binary \ + "The upper limit on the number of states the static FSM must have before we pick binary encoding over one-hot. Defaults to 0 (i.e., always choose binary encoding)", ParseVal::Num(0), PassOpt::parse_num, - )] + ), + PassOpt::new( + "offload-pause", + "Whether to pause the static FSM when offloading. Note that this + parameter must be in sync with the static-inliner's offload-pause + parameter for compilation to work correctly", + ParseVal::Bool(true), + PassOpt::parse_bool, + ), + PassOpt::new( + "greedy-share", + "Whether to greedily share the FSMs", + ParseVal::Bool(true), + PassOpt::parse_bool, + ) + + ] + } +} + +impl ConstructVisitor for CompileStatic { + fn from(ctx: &ir::Context) -> CalyxResult { + let opts = Self::get_opts(ctx); + + Ok(CompileStatic { + one_hot_cutoff: opts["one-hot-cutoff"].pos_num().unwrap(), + offload_pause: opts["offload-pause"].bool(), + greedy_share: opts["greedy-share"].bool(), + reset_early_map: HashMap::new(), + wrapper_map: HashMap::new(), + signal_reg_map: HashMap::new(), + fsm_info_map: HashMap::new(), + group_rewrites: ir::rewriter::PortRewriteMap::default(), + }) + } + + fn clear_data(&mut self) { + self.reset_early_map = HashMap::new(); + self.wrapper_map = HashMap::new(); + self.signal_reg_map = HashMap::new(); + self.fsm_info_map = HashMap::new(); + self.group_rewrites = ir::rewriter::PortRewriteMap::default(); } } impl CompileStatic { - /// Builds a wrapper group for group named group_name using fsm and + /// Builds a wrapper group for group named group_name using fsm_final_state /// and a signal_reg. - /// Both the group and FSM (and the signal_reg) should already exist. + /// We set the signal_reg high on the final fsm state, since we know the + /// `done` signal should be high the next cycle after that. /// `add_resetting_logic` is a bool; since the same FSM/signal_reg pairing /// may be used for multiple static islands, and we only add resetting logic /// for the signal_reg once. fn build_wrapper_group( - fsm_object: ir::RRC, + fsm_final_state: ir::Guard, group_name: &ir::Id, signal_reg: ir::RRC, builder: &mut ir::Builder, @@ -68,9 +134,6 @@ impl CompileStatic { ) }); - // fsm.out == 0 - let first_state = - *fsm_object.borrow_mut().query_between(builder, (0, 1)); structure!( builder; let signal_on = constant(1, 1); let signal_off = constant(0, 1); @@ -81,10 +144,9 @@ impl CompileStatic { guard!(signal_reg["out"]); // !signal_reg.out let not_signal_reg = signal_reg_guard.clone().not(); - // fsm.out == 0 & signal_reg.out - let first_state_and_signal = first_state.clone() & signal_reg_guard; - // fsm.out == 0 & ! signal_reg.out - let first_state_and_not_signal = first_state & not_signal_reg; + // & ! signal_reg.out + let final_state_not_signal = fsm_final_state & not_signal_reg; + // create the wrapper group for early_reset_group let mut wrapper_name = group_name.clone().to_string(); wrapper_name.insert_str(0, "wrapper_"); @@ -93,11 +155,11 @@ impl CompileStatic { builder; // early_reset_group[go] = 1'd1 early_reset_group["go"] = ? signal_on["out"]; - // when fsm == 0, and !signal_reg, then set signal_reg to high - signal_reg["write_en"] = first_state_and_not_signal ? signal_on["out"]; - signal_reg["in"] = first_state_and_not_signal ? signal_on["out"]; - // group[done] = fsm.out == 0 & signal_reg.out ? 1'd1 - g["done"] = first_state_and_signal ? signal_on["out"]; + // when and !signal_reg, then set signal_reg to high + signal_reg["write_en"] = final_state_not_signal ? signal_on["out"]; + signal_reg["in"] = final_state_not_signal ? signal_on["out"]; + // group[done] = signal_reg.out ? 1'd1 + g["done"] = signal_reg_guard ? signal_on["out"]; ); if add_reseting_logic { // continuous assignments to reset signal_reg back to 0 when the wrapper is done @@ -105,8 +167,8 @@ impl CompileStatic { builder; // when (fsm == 0 & signal_reg is high), which is the done condition of the wrapper, // reset the signal_reg back to low - signal_reg["write_en"] = first_state_and_signal ? signal_on["out"]; - signal_reg["in"] = first_state_and_signal ? signal_off["out"]; + signal_reg["write_en"] = signal_reg_guard ? signal_on["out"]; + signal_reg["in"] = signal_reg_guard ? signal_off["out"]; ); builder.add_continuous_assignments(continuous_assigns.to_vec()); } @@ -126,7 +188,7 @@ impl CompileStatic { /// Note: this only works if the port for the while condition is `@stable`. fn build_wrapper_group_while( &self, - fsm_object: ir::RRC, + fsm_first_state: ir::Guard, group_name: &ir::Id, port: RRC, builder: &mut ir::Builder, @@ -141,8 +203,6 @@ impl CompileStatic { ) }); - let fsm_eq_0 = *fsm_object.borrow_mut().query_between(builder, (0, 1)); - let wrapper_group = builder.add_group(format!("while_wrapper_{}", group_name)); @@ -153,12 +213,10 @@ impl CompileStatic { let port_parent = port.borrow().cell_parent(); let port_name = port.borrow().name; - let done_guard = guard!(port_parent[port_name]).not() & fsm_eq_0; + let done_guard = guard!(port_parent[port_name]).not() & fsm_first_state; let assignments = build_assignments!( builder; - // reset_early_group[go] = 1'd1; - // wrapper_group[done] = !port ? 1'd1; reset_early_group["go"] = ? one["out"]; wrapper_group["done"] = done_guard ? one["out"]; ); @@ -167,41 +225,6 @@ impl CompileStatic { wrapper_group } - // Given a `coloring` of static group names, along with the actual `static_groups`, - // it builds one StaticSchedule per color. - fn build_schedule_objects( - coloring: HashMap, - mut static_groups: Vec>, - _builder: &mut ir::Builder, - ) -> Vec { - // "reverse" the coloring to map colors -> static group_names - let mut color_to_groups: HashMap> = - HashMap::new(); - for (group, color) in coloring { - color_to_groups.entry(color).or_default().insert(group); - } - // Need deterministic ordering for testing. - let mut vec_color_to_groups: Vec<(ir::Id, HashSet)> = - color_to_groups.into_iter().collect(); - vec_color_to_groups - .sort_by(|(color1, _), (color2, _)| color1.cmp(color2)); - vec_color_to_groups - .into_iter() - .map(|(_, group_names)| { - // For each color, build a StaticSchedule object. - // We first have to figure out out which groups we need to - // build the static_schedule object for. - let (matching_groups, other_groups) = - static_groups.drain(..).partition(|group| { - group_names.contains(&group.borrow().name()) - }); - let sch = StaticSchedule::from(matching_groups); - static_groups = other_groups; - sch - }) - .collect() - } - // Get early reset group name from static control (we assume the static control // is an enable). fn get_reset_group_name(&self, sc: &mut ir::StaticControl) -> &ir::Id { @@ -227,7 +250,8 @@ impl CompileStatic { } } -// These are the functions used to allocate FSMs to static islands +// These are the functions used to allocate FSMs to static islands through a +// greedy coloring algorithm. impl CompileStatic { // Given a list of `static_groups`, find the group named `name`. // If there is no such group, then there is an unreachable! error. @@ -245,80 +269,12 @@ impl CompileStatic { ) } - // Given an input static_group `sgroup`, finds the names of all of the groups - // that it triggers through their go hole. - // E.g., if `sgroup` has assignments that write to `sgroup1[go]` and `sgroup2[go]` - // then return `{sgroup1, sgroup2}` - // Assumes that static groups will only write the go holes of other static - // groups, and never dynamic groups (which seems like a reasonable assumption). - fn get_go_writes(sgroup: &ir::RRC) -> HashSet { - let mut uses = HashSet::new(); - for asgn in &sgroup.borrow().assignments { - let dst = asgn.dst.borrow(); - if dst.is_hole() && dst.name == "go" { - uses.insert(dst.get_parent_name()); - } - } - uses - } - - // Gets all of the triggered static groups within `c`, and adds it to `cur_names`. - // Relies on sgroup_uses_map to take into account groups that are triggered through - // their `go` hole. - fn get_used_sgroups( - c: &ir::Control, - cur_names: &mut HashSet, - sgroup_uses_map: &HashMap>, - ) { - match c { - ir::Control::Empty(_) - | ir::Control::Enable(_) - | ir::Control::Invoke(_) => (), - ir::Control::Static(sc) => { - let ir::StaticControl::Enable(s) = sc else { - unreachable!("Non-Enable Static Control should have been compiled away. Run {} to do this", crate::passes::StaticInliner::name()); - }; - let group_name = s.group.borrow().name(); - if let Some(sgroup_uses) = sgroup_uses_map.get(&group_name) { - cur_names.extend(sgroup_uses); - } - cur_names.insert(group_name); - } - ir::Control::Par(ir::Par { stmts, .. }) - | ir::Control::Seq(ir::Seq { stmts, .. }) => { - for stmt in stmts { - Self::get_used_sgroups(stmt, cur_names, sgroup_uses_map); - } - } - ir::Control::Repeat(ir::Repeat { body, .. }) - | ir::Control::While(ir::While { body, .. }) => { - Self::get_used_sgroups(body, cur_names, sgroup_uses_map); - } - ir::Control::If(if_stmt) => { - Self::get_used_sgroups( - &if_stmt.tbranch, - cur_names, - sgroup_uses_map, - ); - Self::get_used_sgroups( - &if_stmt.fbranch, - cur_names, - sgroup_uses_map, - ); - } - } - } - - /// Given control `c`, adds conflicts to `conflict_graph` between all - /// static groups that are executed in separate threads of the same par block. - /// `sgroup_uses_map` maps: - /// static group names -> all of the static groups that it triggers the go ports - /// of (even recursively). - /// Example: group A {B[go] = 1;} group B {C[go] = 1} group C{} - /// Would map: A -> {B,C} and B -> {C} + /// Add conflicts between all nodes of `fsm_trees` which are executing + /// on separate threads of a dynamic `par` block. + /// This function adds conflicts between nodes of separate trees. fn add_par_conflicts( c: &ir::Control, - sgroup_uses_map: &HashMap>, + fsm_trees: &Vec, conflict_graph: &mut GraphColoring, ) { match c { @@ -328,189 +284,540 @@ impl CompileStatic { | ir::Control::Static(_) => (), ir::Control::Seq(seq) => { for stmt in &seq.stmts { - Self::add_par_conflicts( - stmt, - sgroup_uses_map, - conflict_graph, - ); + Self::add_par_conflicts(stmt, fsm_trees, conflict_graph); } } ir::Control::Repeat(ir::Repeat { body, .. }) | ir::Control::While(ir::While { body, .. }) => { - Self::add_par_conflicts(body, sgroup_uses_map, conflict_graph) + Self::add_par_conflicts(body, fsm_trees, conflict_graph) } ir::Control::If(if_stmt) => { Self::add_par_conflicts( &if_stmt.tbranch, - sgroup_uses_map, + fsm_trees, conflict_graph, ); Self::add_par_conflicts( &if_stmt.fbranch, - sgroup_uses_map, + fsm_trees, conflict_graph, ); } ir::Control::Par(par) => { - // sgroup_conflict_vec is a vec of HashSets. - // Each entry of the vec corresponds to a par thread, and holds + // `sgroup_conflict_vec` is a vec of HashSets. + // Each item in the vec corresponds to a par thread, and holds // all of the groups executed in that thread. - let mut sgroup_conflict_vec = Vec::new(); + let mut sgroup_conflict_vec: Vec> = Vec::new(); for stmt in &par.stmts { - let mut used_sgroups = HashSet::new(); - Self::get_used_sgroups( - stmt, - &mut used_sgroups, - sgroup_uses_map, - ); - sgroup_conflict_vec.push(used_sgroups); + sgroup_conflict_vec.push(HashSet::from_iter( + Self::get_static_enables(stmt), + )); } - for (thread1_sgroups, thread2_sgroups) in + for (thread1_st_enables, thread2_st_enables) in sgroup_conflict_vec.iter().tuple_combinations() { - for sgroup1 in thread1_sgroups { - for sgroup2 in thread2_sgroups { - conflict_graph.insert_conflict(sgroup1, sgroup2); + // For each static group g1 enabled in thread1 and static + // group g2 enabled in thread2 respectively, add a conflict + // each node in g1 and g2's corresponding trees. + for static_enable1 in thread1_st_enables { + for static_enable2 in thread2_st_enables { + // Getting tree1 + let tree1 = fsm_trees + .iter() + .find(|tree| { + tree.get_group_name() == static_enable1 + }) + .expect("couldn't find FSM tree"); + // Getting tree2 + let tree2 = fsm_trees + .iter() + .find(|tree| { + tree.get_group_name() == static_enable2 + }) + .expect("couldn't find tree"); + // Add conflict between each node in tree1 and tree2 + for sgroup1 in tree1.get_all_nodes() { + for sgroup2 in tree2.get_all_nodes() { + conflict_graph + .insert_conflict(&sgroup1, &sgroup2) + } + } } } } // Necessary to add conflicts between nested pars for stmt in &par.stmts { - Self::add_par_conflicts( - stmt, - sgroup_uses_map, - conflict_graph, - ); + Self::add_par_conflicts(stmt, fsm_trees, conflict_graph); } } } } - /// Given an `sgroup_uses_map`, which maps: - /// static group names -> all of the static groups that it triggers the go ports - /// of (even recursively). - /// Example: group A {B[go] = 1;} group B {C[go] = 1} group C{} - /// Would map: A -> {B,C} and B -> {C} - /// Adds conflicts between any groups triggered at the same time based on - /// `go` port triggering. - fn add_go_port_conflicts( - sgroup_uses_map: &HashMap>, - conflict_graph: &mut GraphColoring, - ) { - for (sgroup, sgroup_uses) in sgroup_uses_map { - for sgroup_use in sgroup_uses { - conflict_graph.insert_conflict(sgroup_use, sgroup); + // Gets the maximum number of repeats for the static group named + // `sgroup` among all trees in `tree_objects`. Most of the time, `sgroup` + // will only appear once but it is possible that the same group appears + // in more than one tree. + fn get_max_num_repeats(sgroup: ir::Id, tree_objects: &Vec) -> u64 { + let mut cur_max = 1; + for tree in tree_objects { + cur_max = std::cmp::max( + cur_max, + tree.get_max_value(&sgroup, &(|tree| tree.num_repeats)), + ) + } + cur_max + } + + // Gets the maximum number of repeats for the static group named + // `sgroup` among all trees in `tree_objects`. Most of the time, `sgroup` + // will only appear once but it is possible that the same group appears + // in more than one tree. + fn get_max_num_states(sgroup: ir::Id, tree_objects: &Vec) -> u64 { + let mut cur_max = 1; + for tree in tree_objects { + cur_max = std::cmp::max( + cur_max, + tree.get_max_value(&sgroup, &(|tree| tree.num_states)), + ) + } + cur_max + } + + /// Creates a graph (one node per item in `sgroup` where nodes are the `sgroup`'s + /// names). + /// Use `tree_objects` and `control` to draw conflicts between any two nodes + /// that could be executing in parallel, and returns a greedy coloring of the + /// graph. + pub fn get_coloring( + &self, + tree_objects: &Vec, + sgroups: &[ir::RRC], + control: &mut ir::Control, + ) -> HashMap { + if !self.greedy_share { + // If !greedy_share just give each sgroup its own color. + return sgroups + .iter() + .map(|g| (g.borrow().name(), g.borrow().name())) + .collect(); + } + let mut conflict_graph: GraphColoring = + GraphColoring::from(sgroups.iter().map(|g| g.borrow().name())); + + // Necessary conflicts to ensure correctness + + // Self::add_par_conflicts adds necessary conflicts between all nodes of + // trees that execute in separate threads of the same `par` block: this is + // adding conflicts between nodes of separate trees. + Self::add_par_conflicts(control, tree_objects, &mut conflict_graph); + for tree in tree_objects { + // tree.add_conflicts adds the necessary conflicts within nodes of + // same tree. + tree.add_conflicts(&mut conflict_graph); + } + // Optional conflicts to ?potentially? improve QoR + // for (sgroup1, sgroup2) in sgroups.iter().tuple_combinations() { + // let max_num_states1 = + // Self::get_max_num_states(sgroup1.borrow().name(), tree_objects); + // let max_num_repeats1 = Self::get_max_num_repeats( + // sgroup1.borrow().name(), + // tree_objects, + // ); + // let max_num_states2 = + // Self::get_max_num_states(sgroup2.borrow().name(), tree_objects); + // let max_num_repeats2 = Self::get_max_num_repeats( + // sgroup2.borrow().name(), + // tree_objects, + // ); + // if ((max_num_states1 == 1) != (max_num_states2 == 1)) + // || ((max_num_repeats1) != (max_num_repeats2)) + // { + // conflict_graph.insert_conflict( + // &sgroup1.borrow().name(), + // &sgroup2.borrow().name(), + // ); + // } + // } + + conflict_graph.color_greedy(None, true) + } + + /// Given a coloring of group names, returns a Hashmap that maps: + /// colors -> (max num states for that color, max num repeats for color). + pub fn get_color_max_values( + coloring: &HashMap, + tree_objects: &Vec, + ) -> HashMap { + let mut colors_to_sgroups: HashMap> = + HashMap::new(); + // "Reverse" the coloring: instead of maping group names->colors, + // map colors -> group names. + for (group_name, color) in coloring { + colors_to_sgroups + .entry(*color) + .or_default() + .push(*group_name); + } + colors_to_sgroups + .into_iter() + .map(|(name, colors_sgroups)| { + // Get max num states for this color + let max_num_states = colors_sgroups + .iter() + .map(|gname| Self::get_max_num_states(*gname, tree_objects)) + .max() + .expect("color is empty"); + // Get max num repeats for this color + let max_num_repeats = colors_sgroups + .iter() + .map(|gname| { + Self::get_max_num_repeats(*gname, tree_objects) + }) + .max() + .expect("color is empty"); + (name, (max_num_states, max_num_repeats)) + }) + .collect() + } +} + +impl CompileStatic { + /// `get_interval_from_guard` returns the interval found within guard `g`. + /// The tricky part is that sometimes there can be an implicit latency + /// `lat` that is not explicitly stated (i.e., every assignment in a + /// group with latency n has an implicit guard of %[0:n]). `lat` is `n`. + fn get_interval_from_guard( + g: &ir::Guard, + lat: u64, + ) -> (u64, u64) { + match g { + calyx_ir::Guard::Info(static_timing_interval) => { + static_timing_interval.get_interval() } - // If multiple groups are triggered by the same group, then - // we conservatively add a conflict between such groups - for (sgroup_use1, sgroup_use2) in - sgroup_uses.iter().tuple_combinations() - { - conflict_graph.insert_conflict(sgroup_use1, sgroup_use2); + calyx_ir::Guard::Not(_) + | calyx_ir::Guard::CompOp(_, _, _) + | calyx_ir::Guard::Port(_) + | calyx_ir::Guard::True => (0, lat), + calyx_ir::Guard::And(l, r) => { + let ((beg1, end1), (beg2, end2)) = ( + Self::get_interval_from_guard(l, lat), + Self::get_interval_from_guard(r, lat), + ); + assert!(end1 - beg1 == lat || end2 - beg2 == lat); + if end1 - beg1 == lat { + (beg2, end2) + } else { + (beg1, end1) + } + } + ir::Guard::Or(_, _) => unreachable!("Shouldn't try to get interval from guard if there is an 'or' in the guard"), } } - /// Adds conflicts between static groups that require different encodings. - /// For example: if one group is one-hot and another is binary, then - /// we insert a conflict between those two groups. - fn add_encoding_conflicts( - sgroups: &[ir::RRC], - conflict_graph: &mut GraphColoring, - ) { - for (sgroup1, sgroup2) in sgroups.iter().tuple_combinations() { - if sgroup1.borrow().attributes.has(ir::BoolAttr::OneHot) - != sgroup2.borrow().attributes.has(ir::BoolAttr::OneHot) - { - conflict_graph.insert_conflict( - &sgroup1.borrow().name(), - &sgroup2.borrow().name(), + // Given a children_sched (a sorted vec of intervals for which + // the children are active), builds an FSM schedule and returns it, + // along with the number of states the resulting FSM will have (42 in the + // example given below). + // Schedule maps cycles (i,j) -> fsm state type (i.e., what the fsm outputs). + // Here is an example FSM schedule: + // Cycles FSM State (i.e., `fsm.out`) + // (0..10) -> Normal[0,10) // FSM counting from 0..10 + // (10..30) -> Offload(10) // Offloading to child + // (30..40) -> Normal[11, 21) + // (40,80) -> Offload(21) + // (80,100)-> Normal[22, 42) + // + // `target_latency` is the latency of the entire tree (100 in this case). + fn build_tree_schedule( + children_sched: &[(u64, u64)], + target_latency: u64, + ) -> (BTreeMap<(u64, u64), StateType>, u64) { + let mut fsm_schedule = BTreeMap::new(); + let mut cur_num_states = 0; + let mut cur_lat = 0; + for (beg, end) in children_sched { + // Filling in the gap between children, if necessary with a + // `Normal` StateType. + if cur_lat != *beg { + fsm_schedule.insert( + (cur_lat, *beg), + StateType::Normal(( + cur_num_states, + cur_num_states + (beg - cur_lat), + )), ); + cur_num_states += beg - cur_lat; + // cur_lat = *beg; assignment is unnecessary } + // Inserting an Offload StateType to the schedule. + fsm_schedule + .insert((*beg, *end), StateType::Offload(cur_num_states)); + cur_lat = *end; + cur_num_states += 1; + } + // Filling in the gap between the final child and the end of the group + // with a Normal StateType. + if cur_lat != target_latency { + fsm_schedule.insert( + (cur_lat, target_latency), + StateType::Normal(( + cur_num_states, + cur_num_states + (target_latency - cur_lat), + )), + ); + cur_num_states += target_latency - cur_lat; } + (fsm_schedule, cur_num_states) } - // helper to `build_sgroup_uses_map` - // `parent_group` is the group that we are "currently" analyzing - // `full_group_ancestry` is the "ancestry of the group we are analyzing" - // Example: group A {B[go] = 1;} group B {C[go] = 1} group C{}, and `parent_group` - // is B, then ancestry would be B and A. - // `cur_mapping` is the current_mapping for `sgroup_uses_map` - // `group_names` is a vec of group_names. Once we analyze a group, we should - // remove it from group_names - // `sgroups` is a vec of static groups. - fn update_sgroup_uses_map( - parent_group: &ir::Id, - full_group_ancestry: &mut HashSet, - cur_mapping: &mut HashMap>, - group_names: &mut HashSet, - sgroups: &Vec>, - ) { - let group_uses = Self::get_go_writes(&Self::find_static_group( - parent_group, - sgroups, - )); - for group_use in group_uses { - for ancestor in full_group_ancestry.iter() { - cur_mapping.entry(*ancestor).or_default().insert(group_use); + /// Given a static group `target_name` and vec of `static_groups`, builds a + /// `tree_object` for group `target_name` that repeats itself `num_repeat` + /// times. + fn build_tree_object( + target_name: ir::Id, + static_groups: &[ir::RRC], + num_repeats: u64, + ) -> Node { + // Find the group that will serve as the root of the tree. + let target_group = static_groups + .iter() + .find(|sgroup| sgroup.borrow().name() == target_name) + .unwrap(); + // Children of the root of the tree. + let mut children_vec = vec![]; + + let target_group_ref = target_group.borrow(); + for assign in &target_group_ref.assignments { + // Looking for static_child[go] = %[i:j] ? 1'd1; to build children. + // This lets us know that `static_child` is executing from cycles + // i through j. + match &assign.dst.borrow().parent { + PortParent::Cell(_) => { + if target_group_ref.attributes.has(ir::BoolAttr::ParCtrl) { + panic!("") + } + } + PortParent::Group(_) => panic!(""), + PortParent::StaticGroup(sgroup) => { + assert!(assign.src.borrow().is_constant(1, 1)); + let (beg, end) = Self::get_interval_from_guard( + &assign.guard, + target_group.borrow().get_latency(), + ); + let name: calyx_ir::Id = sgroup.upgrade().borrow().name(); + // Need the following lines to determine `num_repeats` + // for the child. + let target_child_latency = + Self::get_sgroup_latency(name, static_groups); + let child_execution_time = end - beg; + assert!( + child_execution_time % target_child_latency == 0, + "child will execute only part of an iteration" + ); + let child_num_repeats = + child_execution_time / target_child_latency; + // Recursively build a tree for the child. + children_vec.push(( + Self::build_tree_object( + name, + static_groups, + child_num_repeats, + ), + (beg, end), + )); + } } - full_group_ancestry.insert(group_use); - Self::update_sgroup_uses_map( - &group_use, - full_group_ancestry, - cur_mapping, - group_names, - sgroups, + } + + if target_group_ref.attributes.has(ir::BoolAttr::ParCtrl) { + // If we are in a par group, then the "children" are actually + // threads that should all start at 0. + assert!(children_vec.iter().all(|(_, (beg, _))| *beg == 0)); + Node::Par(ParNodes { + group_name: target_name, + threads: children_vec, + latency: target_group_ref.latency, + num_repeats, + }) + } else { + // If we are in a regular group, then the children should be + // non-overlapping. + children_vec.sort_by_key(|(_, interval)| *interval); + assert!(Self::are_ranges_non_overlapping(&children_vec)); + let (fsm_schedule, num_states) = Self::build_tree_schedule( + &children_vec + .iter() + .map(|(_, interval)| *interval) + .collect_vec(), + target_group_ref.latency, ); - full_group_ancestry.remove(&group_use); + Node::Single(SingleNode { + latency: target_group_ref.latency, + fsm_cell: None, + iter_count_cell: None, + root: (target_name, vec![]), + fsm_schedule, + children: children_vec, + num_repeats, + num_states, + }) } - group_names.remove(parent_group); - } - - /// Builds an `sgroup_uses_map`, which maps: - /// static group names -> all of the static groups that it triggers the go ports - /// of (even recursively). - /// Example: group A {B[go] = 1;} group B {C[go] = 1} group C{} - /// Would map: A -> {B,C} and B -> {C} - fn build_sgroup_uses_map( - sgroups: &Vec>, - ) -> HashMap> { - let mut names: HashSet = sgroups + } + + /// Builds a dummy tree, solely for the purposes of determining conflicts + /// so we can greedily color when assigning FSMs. This should only be occuring + /// when we count during offloading (i.e., don't pause). + /// This tree should never actually be turned into hardware!! (Thd trees that we + /// build here do not make sense if you want to actually do that.) + /// We can't call `build_tree_object` on this because that looks for the + /// `par` attribute, which isn't present when we're counting. + fn build_dummy_tree( + target_name: ir::Id, + static_groups: &[ir::RRC], + ) -> Node { + // Find the group that will serve as the root of the tree. + let target_group = static_groups .iter() - .map(|sgroup| sgroup.borrow().name()) - .collect(); - let mut cur_mapping = HashMap::new(); - while !names.is_empty() { - let random_group = *names.iter().next().unwrap(); - Self::update_sgroup_uses_map( - &random_group, - &mut HashSet::from([random_group]), - &mut cur_mapping, - &mut names, - sgroups, - ) + .find(|sgroup| sgroup.borrow().name() == target_name) + .unwrap(); + let mut children_vec = vec![]; + let target_group_ref = target_group.borrow(); + assert!( + !target_group_ref.attributes.has(ir::BoolAttr::ParCtrl), + "ParCtrl attribute is not compatible with building dummy trees" + ); + for assign in &target_group_ref.assignments { + // Looking for static_child[go] = %[i:j] ? 1'd1; to build children. + match &assign.dst.borrow().parent { + PortParent::Cell(_) => (), + PortParent::Group(_) => unreachable!(""), + PortParent::StaticGroup(sgroup) => { + assert!(assign.src.borrow().is_constant(1, 1)); + let (beg, end) = Self::get_interval_from_guard( + &assign.guard, + target_group.borrow().get_latency(), + ); + + let name: calyx_ir::Id = sgroup.upgrade().borrow().name(); + children_vec.push(( + Self::build_dummy_tree(name, static_groups), + (beg, end), + )); + } + } } - cur_mapping + + children_vec.sort_by_key(|(_, interval)| *interval); + Node::Single(SingleNode { + latency: target_group_ref.latency, + fsm_cell: None, + iter_count_cell: None, + root: (target_name, vec![]), + fsm_schedule: BTreeMap::new(), + children: children_vec, + num_repeats: 1, + num_states: target_group_ref.latency, + }) } - pub fn get_coloring( - sgroups: &Vec>, - control: &ir::Control, - ) -> HashMap { - // `sgroup_uses_map` builds a mapping of static groups -> groups that - // it (even indirectly) triggers the `go` port of. - let sgroup_uses_map = Self::build_sgroup_uses_map(sgroups); - // Build conflict graph and get coloring. - let mut conflict_graph: GraphColoring = - GraphColoring::from(sgroups.iter().map(|g| g.borrow().name())); - Self::add_par_conflicts(control, &sgroup_uses_map, &mut conflict_graph); - Self::add_go_port_conflicts(&sgroup_uses_map, &mut conflict_graph); - Self::add_encoding_conflicts(sgroups, &mut conflict_graph); - conflict_graph.color_greedy(None, true) + /// Builds "trees" but just make them single nodes that never offload. + /// This is the original strategy that we used. + fn build_single_node( + name: ir::Id, + static_groups: &[ir::RRC], + ) -> Node { + let target_group = static_groups + .iter() + .find(|sgroup| sgroup.borrow().name() == name) + .unwrap(); + let target_group_ref = target_group.borrow(); + assert!( + !target_group_ref.attributes.has(ir::BoolAttr::ParCtrl), + "ParCtrl attribute is not compatible with building a single node" + ); + + Node::Single(SingleNode { + latency: target_group_ref.latency, + fsm_cell: None, + iter_count_cell: None, + root: (name, vec![]), + fsm_schedule: vec![( + (0, target_group_ref.latency), + StateType::Normal((0, target_group_ref.latency)), + )] + .into_iter() + .collect(), + children: vec![], + num_repeats: 1, + num_states: target_group_ref.latency, + }) + } + + /// Search through `static_groups` and get latency of sgroup named `name` + fn get_sgroup_latency( + name: ir::Id, + static_groups: &[ir::RRC], + ) -> u64 { + static_groups + .iter() + .find(|sgroup| sgroup.borrow().name() == name) + .expect("couldn't find static group") + .borrow() + .get_latency() + } + + // Given a vec of tuples (i,j) sorted by the first element (i.e., `i`) checks + // whether the ranges do not overlap. + fn are_ranges_non_overlapping(ranges: &[(Node, (u64, u64))]) -> bool { + if ranges.is_empty() { + return true; + } + for i in 0..ranges.len() - 1 { + let (_, (_, end1)) = ranges[i]; + let (_, (start2, _)) = ranges[i + 1]; + // Ensure that the current range's end is less than or equal to the next range's start + if end1 > start2 { + return false; + } + } + true + } + + // Get a vec of all static groups that were "enabled" in `ctrl`. + fn get_static_enables(ctrl: &ir::Control) -> Vec { + match ctrl { + ir::Control::Seq(ir::Seq { stmts, .. }) + | ir::Control::Par(ir::Par { stmts, .. }) => stmts + .iter() + .flat_map(Self::get_static_enables) + .collect_vec(), + ir::Control::Empty(_) + | ir::Control::Enable(_) + | ir::Control::Invoke(_) => vec![], + ir::Control::If(c) => { + let mut tbranch_res = Self::get_static_enables(&c.tbranch); + let fbranch_res = Self::get_static_enables(&c.fbranch); + tbranch_res.extend(fbranch_res); + tbranch_res + } + ir::Control::Repeat(ir::Repeat { body, .. }) + | ir::Control::While(ir::While { body, .. }) => { + Self::get_static_enables(body) + } + ir::Control::Static(sc) => { + let ir::StaticControl::Enable(s) = sc else { + unreachable!("Non-Enable Static Control should have been compiled away. Run {} to do this", crate::passes::StaticInliner::name()); + }; + vec![s.group.borrow().name()] + } + } } } -// These are the functions used to compile for the static *component* interface +// These are the functions used to compile for the static *component* interface, +// which (annoyingly) only needs a go signal fro %0, compared to %[0:n] for +// static groups. impl CompileStatic { // Used for guards in a one cycle static component. // Replaces %0 with comp.go. @@ -566,11 +873,11 @@ impl CompileStatic { // Makes `done` signal for promoted static component. fn make_done_signal_for_promoted_component( - fsm: &mut StaticFSM, + fsm_tree: &mut Node, builder: &mut ir::Builder, comp_sig: RRC, ) -> Vec> { - let first_state_guard = *fsm.query_between(builder, (0, 1)); + let first_state_guard = fsm_tree.query_between((0, 1), builder); structure!(builder; let sig_reg = prim std_reg(1); let one = constant(1, 1); @@ -624,29 +931,82 @@ impl CompileStatic { assigns.to_vec() } - // Compiles `sgroup` according to the static component interface. + // `fsm_tree` should be the top-level tree in the components. + // `static_groups` are the component's static groups. // The assignments are removed from `sgroup` and placed into // `builder.component`'s continuous assignments. fn compile_static_interface( - &self, - sgroup: ir::RRC, + &mut self, + fsm_tree: &mut Node, + static_groups: &mut Vec>, + coloring: &HashMap, + colors_to_max_values: &HashMap, + colors_to_fsm: &mut HashMap< + ir::Id, + (OptionalStaticFSM, OptionalStaticFSM), + >, builder: &mut ir::Builder, - ) { - if sgroup.borrow().get_latency() > 1 { - // Build a StaticSchedule object, realize it and add assignments - // as continuous assignments. - let mut sch = StaticSchedule::from(vec![Rc::clone(&sgroup)]); - let (mut assigns, mut fsm) = sch.realize_schedule(builder, true); - builder - .component - .continuous_assignments - .extend(assigns.pop_front().unwrap()); + ) -> calyx_utils::CalyxResult<()> { + if fsm_tree.get_latency() > 1 { + // Find top-level static group. + let sgroup = Self::find_static_group( + &fsm_tree.get_root_name(), + static_groups, + ); + // Perform some preprocessing on the assignments + // (in particular, transform %[0:n] into %0 | %[1:n]) + for assign in &mut sgroup.borrow_mut().assignments { + Node::preprocess_static_interface_assigns( + assign, + Rc::clone(&builder.component.signature), + ); + } + + let comp_go = ir::Guard::port( + builder + .component + .signature + .borrow() + .find_unique_with_attr(ir::NumAttr::Go)? + .unwrap(), + ); + + // Realize the fsm tree in hardware. + fsm_tree.instantiate_fsms( + builder, + coloring, + colors_to_max_values, + colors_to_fsm, + self.one_hot_cutoff, + ); + fsm_tree.count_to_n(builder, Some(comp_go)); + fsm_tree.realize( + false, + static_groups, + &mut self.reset_early_map, + &mut self.fsm_info_map, + &mut self.group_rewrites, + builder, + ); + // Add root's assignments as continuous assignments, execpt for the + // `group[done]` assignments. + builder.component.continuous_assignments.extend( + fsm_tree.take_root_assigns().into_iter().filter(|assign| { + let dst = assign.dst.borrow(); + match dst.parent { + PortParent::Cell(_) => true, + // Don't add assignment to `group[done]` + PortParent::Group(_) => dst.name != "done", + PortParent::StaticGroup(_) => true, + } + }), + ); let comp_sig = Rc::clone(&builder.component.signature); if builder.component.attributes.has(ir::BoolAttr::Promoted) { // If necessary, add the logic to produce a done signal. let done_assigns = Self::make_done_signal_for_promoted_component( - &mut fsm, builder, comp_sig, + fsm_tree, builder, comp_sig, ); builder .component @@ -657,10 +1017,29 @@ impl CompileStatic { // Handle components with latency == 1. // In this case, we don't need an FSM; we just guard the assignments // with comp.go. + let sgroup = Self::find_static_group( + &fsm_tree.get_root_name(), + static_groups, + ); + for (child, _) in fsm_tree.get_children() { + // We can ignore any static timing guards in the children, + // since we know the latency is 1. That is why we call + // `convert_assignments_type`. + child.realize( + true, + static_groups, + &mut self.reset_early_map, + &mut self.fsm_info_map, + &mut self.group_rewrites, + builder, + ) + } let assignments = std::mem::take(&mut sgroup.borrow_mut().assignments); - for assign in assignments { + for mut assign in assignments { + // Make `assignments` continuous and replace %[0:1] with `comp.go` let comp_sig = Rc::clone(&builder.component.signature); + assign.guard.update(|g| g.and(guard!(comp_sig["go"]))); builder.component.continuous_assignments.push( Self::make_assign_dyn_one_cycle_static_comp( assign, comp_sig, @@ -668,6 +1047,7 @@ impl CompileStatic { ); } if builder.component.attributes.has(ir::BoolAttr::Promoted) { + // Need to add a done signal if this component was promoted. let comp_sig = Rc::clone(&builder.component.signature); let done_assigns = Self::make_done_signal_for_promoted_component_one_cycle( @@ -677,8 +1057,9 @@ impl CompileStatic { .component .continuous_assignments .extend(done_assigns); - } - } + }; + }; + Ok(()) } } @@ -689,14 +1070,77 @@ impl Visitor for CompileStatic { sigs: &ir::LibrarySignatures, _comps: &[ir::Component], ) -> VisResult { + // Drain static groups of component + let mut sgroups: Vec> = + comp.get_static_groups_mut().drain().collect(); + + let mut builder = ir::Builder::new(comp, sigs); + // Get a vec of all groups that are enabled in comp's control. + let static_enable_ids = + Self::get_static_enables(&builder.component.control.borrow()); + // Build one tree object per static enable. + // Even if we don't offload, we still need to build trees to + // determine coloring. + let default_tree_objects = static_enable_ids + .iter() + .map(|id| { + if self.offload_pause { + Self::build_tree_object(*id, &sgroups, 1) + } else { + // If we're not offloading, then we should build dummy trees + // that are just used to determine coloring. + // This is basically the same thing as `build_tree_object`, + // but doesn't check the `ParCtrl` attribute. I think + // we could reduce code size by merging this function with + // `build_tree_object`. + Self::build_dummy_tree(*id, &sgroups) + } + }) + .collect_vec(); + + // The first thing is to assign FSMs -> static islands. + // We sometimes assign the same FSM to different static islands + // to reduce register usage. We do this by getting greedy coloring. + let coloring: HashMap = self.get_coloring( + &default_tree_objects, + &sgroups, + &mut builder.component.control.borrow_mut(), + ); + // We need the max_num_states and max_num_repeats for each + // color so we know how many bits the corresponding registers should get. + let colors_to_max_values = + Self::get_color_max_values(&coloring, &default_tree_objects); + let mut colors_to_fsms: HashMap< + ir::Id, + (OptionalStaticFSM, OptionalStaticFSM), + > = HashMap::new(); + + let mut tree_objects = if self.offload_pause { + default_tree_objects + } else { + // Build simple trees if we're not offloading (i.e., build trees + // that just consist of a single node.) + // Note that these trees would not correctly draw conflicts between + // nodes for coloring. + let mut simple_trees = vec![]; + let sgroup_names = sgroups + .iter() + .map(|sgroup| sgroup.borrow().name()) + .collect_vec(); + for name in sgroup_names { + simple_trees.push(Self::build_single_node(name, &sgroups)) + } + simple_trees + }; + // Static components have a different interface than static groups. // If we have a static component, we have to compile the top-level // island (this island should be a group by now and corresponds // to the the entire control of the component) differently. // This island might invoke other static groups-- these static groups // should still follow the group interface. - let top_level_sgroup = if comp.is_static() { - let comp_control = comp.control.borrow(); + let top_level_sgroup = if builder.component.is_static() { + let comp_control = builder.component.control.borrow(); match &*comp_control { ir::Control::Static(ir::StaticControl::Enable(sen)) => { Some(sen.group.borrow().name()) @@ -706,101 +1150,46 @@ impl Visitor for CompileStatic { } else { None }; - - // Drain static groups of component - let sgroups: Vec> = - comp.get_static_groups_mut().drain().collect(); - - // The first thing is to assign FSMs -> static islands. - // We sometimes assign the same FSM to different static islands - // to reduce register usage. We do this by getting greedy coloring. - let coloring = Self::get_coloring(&sgroups, &comp.control.borrow()); - - let mut builder = ir::Builder::new(comp, sigs); - // Build one StaticSchedule object per color - let mut schedule_objects = - Self::build_schedule_objects(coloring, sgroups, &mut builder); - - // Map so we can rewrite `static_group[go]` to `early_reset_group[go]` - let mut group_rewrites = ir::rewriter::PortRewriteMap::default(); - - // Realize an fsm for each StaticSchedule object. - for sch in &mut schedule_objects { + // Make each tree count to n. + for tree in &mut tree_objects { // Check whether we are compiling the top level static island. let static_component_interface = match top_level_sgroup { None => false, // For the top level group, sch.static_groups should really only - // have group--the top level group. - Some(top_level_group) => sch - .static_groups - .iter() - .any(|g| g.borrow().name() == top_level_group), + // have one group--the top level group. + Some(top_level_group) => { + tree.get_group_name() == top_level_group + } }; // Static component/groups have different interfaces if static_component_interface { // Compile top level static group differently. - // We know that the top level static island has its own - // unique FSM so we can do `.pop().unwrap()` self.compile_static_interface( - sch.static_groups.pop().unwrap(), + tree, + &mut sgroups, + &coloring, + &colors_to_max_values, + &mut colors_to_fsms, &mut builder, - ) + )?; } else { - let (mut static_group_assigns, fsm) = sch - .realize_schedule(&mut builder, static_component_interface); - let fsm_ref = ir::rrc(fsm); - for static_group in sch.static_groups.iter() { - // Create the dynamic "early reset group" that will replace the static group. - let static_group_name = static_group.borrow().name(); - let mut early_reset_name = static_group_name.to_string(); - early_reset_name.insert_str(0, "early_reset_"); - let early_reset_group = builder.add_group(early_reset_name); - let mut assigns = static_group_assigns.pop_front().unwrap(); - - // Add assignment `group[done] = ud.out`` to the new group. - structure!( builder; let ud = prim undef(1);); - let early_reset_done_assign = build_assignments!( - builder; - early_reset_group["done"] = ? ud["out"]; - ); - assigns.extend(early_reset_done_assign); - - early_reset_group.borrow_mut().assignments = assigns; - early_reset_group.borrow_mut().attributes = - static_group.borrow().attributes.clone(); - - // Now we have to update the fields with a bunch of information. - // This makes it easier when we have to build wrappers, rewrite ports, etc. - - // Map the static group name -> early reset group name. - // This is helpful for rewriting control - self.reset_early_map.insert( - static_group_name, - early_reset_group.borrow().name(), - ); - // self.group_rewrite_map helps write static_group[go] to early_reset_group[go] - // Technically we could do this w/ early_reset_map but is easier w/ - // group_rewrite, which is explicitly of type `PortRewriterMap` - group_rewrites.insert( - ir::Canonical::new( - static_group_name, - ir::Id::from("go"), - ), - early_reset_group.borrow().find("go").unwrap_or_else( - || { - unreachable!( - "group {} has no go port", - early_reset_group.borrow().name() - ) - }, - ), - ); - - self.fsm_info_map.insert( - early_reset_group.borrow().name(), - Rc::clone(&fsm_ref), - ); - } + // Otherwise just instantiate the tree to hardware. + tree.instantiate_fsms( + &mut builder, + &coloring, + &colors_to_max_values, + &mut colors_to_fsms, + self.one_hot_cutoff, + ); + tree.count_to_n(&mut builder, None); + tree.realize( + false, + &sgroups, + &mut self.reset_early_map, + &mut self.fsm_info_map, + &mut self.group_rewrites, + &mut builder, + ); } } @@ -809,17 +1198,14 @@ impl Visitor for CompileStatic { // groups don't have done holes. comp.for_each_assignment(|assign| { assign.for_each_port(|port| { - group_rewrites + self.group_rewrites .get(&port.borrow().canonical()) .map(Rc::clone) }) }); // Add the static groups back to the component. - for schedule in schedule_objects { - comp.get_static_groups_mut() - .append(schedule.static_groups.into_iter()); - } + comp.get_static_groups_mut().append(sgroups.into_iter()); Ok(Action::Continue) } @@ -832,6 +1218,9 @@ impl Visitor for CompileStatic { sigs: &ir::LibrarySignatures, _comps: &[ir::Component], ) -> VisResult { + // The main purpose of this method is inserting wrappers / singal registers + // when appropriate. + // No need to build wrapper for static component interface if comp.is_static() { return Ok(Action::Continue); @@ -859,12 +1248,11 @@ impl Visitor for CompileStatic { None => { // create the builder/cells that we need to create wrapper group let mut builder = ir::Builder::new(comp, sigs); - let fsm_object = self.fsm_info_map.get(early_reset_name).unwrap_or_else(|| unreachable!("group {} has no correspondoing fsm in self.fsm_map", early_reset_name)); + let (fsm_name, _, fsm_final_state) = self.fsm_info_map.get(early_reset_name).unwrap_or_else(|| unreachable!("group {} has no correspondoing fsm in self.fsm_map", early_reset_name)); // If we've already made a wrapper for a group that uses the same // FSM, we can reuse the signal_reg. Otherwise, we must // instantiate a new signal_reg. - let fsm_name = fsm_object.borrow().get_unique_id(); - let wrapper = match self.signal_reg_map.get(&fsm_name) { + let wrapper = match self.signal_reg_map.get(fsm_name) { None => { // Need to build the signal_reg and the continuous // assignment that resets the signal_reg @@ -872,9 +1260,9 @@ impl Visitor for CompileStatic { let signal_reg = prim std_reg(1); ); self.signal_reg_map - .insert(fsm_name, signal_reg.borrow().name()); + .insert(*fsm_name, signal_reg.borrow().name()); Self::build_wrapper_group( - Rc::clone(fsm_object), + fsm_final_state.clone(), early_reset_name, signal_reg, &mut builder, @@ -892,7 +1280,7 @@ impl Visitor for CompileStatic { unreachable!("signal reg {reg_name} found") }); Self::build_wrapper_group( - Rc::clone(fsm_object), + fsm_final_state.clone(), early_reset_name, signal_reg, &mut builder, @@ -964,9 +1352,9 @@ impl Visitor for CompileStatic { let reset_group_name = self.get_reset_group_name(sc); // Get fsm for reset_group - let fsm_object = self.fsm_info_map.get(reset_group_name).unwrap_or_else(|| unreachable!("group {} has no correspondoing fsm in self.fsm_map", reset_group_name)); + let (_, fsm_first_state, _) = self.fsm_info_map.get(reset_group_name).unwrap_or_else(|| unreachable!("group {} has no correspondoing fsm in self.fsm_map", reset_group_name)); let wrapper_group = self.build_wrapper_group_while( - Rc::clone(fsm_object), + fsm_first_state.clone(), reset_group_name, Rc::clone(&s.port), &mut builder, @@ -987,11 +1375,11 @@ impl Visitor for CompileStatic { ) -> VisResult { // make sure static groups have no assignments, since // we should have already drained the assignments in static groups - for g in comp.get_static_groups() { - if !g.borrow().assignments.is_empty() { - unreachable!("Should have converted all static groups to dynamic. {} still has assignments in it. It's possible that you may need to run {} to remove dead groups and get rid of this error.", g.borrow().name(), crate::passes::DeadGroupRemoval::name()); - } - } + // for g in comp.get_static_groups() { + // if !g.borrow().assignments.is_empty() { + // unreachable!("Should have converted all static groups to dynamic. {} still has assignments in it. It's possible that you may need to run {} to remove dead groups and get rid of this error.", g.borrow().name(), crate::passes::DeadGroupRemoval::name()); + // } + // } // remove all static groups comp.get_static_groups_mut().retain(|_| false); diff --git a/calyx-opt/src/passes/static_inliner.rs b/calyx-opt/src/passes/static_inliner.rs index d5faa0397c..ca8a5f3a30 100644 --- a/calyx-opt/src/passes/static_inliner.rs +++ b/calyx-opt/src/passes/static_inliner.rs @@ -1,12 +1,19 @@ -use crate::traversal::{Action, Named, VisResult, Visitor}; -use calyx_ir as ir; +use crate::analysis::GraphColoring; +use crate::traversal::{ + Action, ConstructVisitor, Named, ParseVal, PassOpt, VisResult, Visitor, +}; use calyx_ir::structure; use calyx_ir::LibrarySignatures; +use calyx_ir::{self as ir, StaticTiming}; +use calyx_utils::CalyxResult; use ir::build_assignments; +use itertools::Itertools; +use std::collections::{BTreeMap, HashMap}; use std::rc::Rc; -#[derive(Default)] -pub struct StaticInliner; +pub struct StaticInliner { + offload_pause: bool, +} impl Named for StaticInliner { fn name() -> &'static str { @@ -16,6 +23,29 @@ impl Named for StaticInliner { fn description() -> &'static str { "Compiles Static Control into a single Static Enable" } + + fn opts() -> Vec { + vec![PassOpt::new( + "offload-pause", + "Whether to pause the static FSM when offloading. Note that this + parameter must be in sync with the static-inliner's offload-pause + parameter for compilation to work correctly", + ParseVal::Bool(true), + PassOpt::parse_bool, + )] + } +} + +impl ConstructVisitor for StaticInliner { + fn from(ctx: &ir::Context) -> CalyxResult { + let opts = Self::get_opts(ctx); + + Ok(StaticInliner { + offload_pause: opts["offload-pause"].bool(), + }) + } + + fn clear_data(&mut self) {} } impl StaticInliner { @@ -116,8 +146,175 @@ impl StaticInliner { cond_assigns } + // Given a static control block `sc`, and the current latency returns a + // vec of tuples (i,j) which represents all of the intervals (relative to + // the current latency) for which the corresponding fsm will be offloading. + // There are two scenarios in the fsm will be offloading: + // 1) All static repeat bodies. + // 2) If there is a static par in which different threads have overlapping + // offloads, then we offload the entire static par. + fn get_offload_latencies( + sc: &ir::StaticControl, + cur_latency: u64, + ) -> Vec<(u64, u64)> { + match sc { + ir::StaticControl::Enable(_) | ir::StaticControl::Empty(_) => { + vec![] + } + ir::StaticControl::Seq(ir::StaticSeq { stmts, .. }) => { + let mut lat = cur_latency; + let mut res = vec![]; + for stmt in stmts { + res.extend(Self::get_offload_latencies(stmt, lat)); + lat += stmt.get_latency(); + } + res + } + ir::StaticControl::Par(ir::StaticPar { stmts, .. }) => { + let mut res = vec![]; + // If the current static par has overlapping offload intervals, + // then push the entire par. + if Self::have_overlapping_offloads(sc) { + res.push((cur_latency, cur_latency + sc.get_latency())) + } else { + // Othwerwise just recursively look into each statement + // for possible offloads. + for stmt in stmts { + res.extend(Self::get_offload_latencies( + stmt, + cur_latency, + )); + } + } + res + } + ir::StaticControl::If(ir::StaticIf { + tbranch, fbranch, .. + }) => { + let mut res = Self::get_offload_latencies(tbranch, cur_latency); + res.extend(Self::get_offload_latencies(fbranch, cur_latency)); + res + } + ir::StaticControl::Repeat(ir::StaticRepeat { + num_repeats, + body, + .. + }) => { + let res = vec![( + cur_latency, + cur_latency + num_repeats * body.get_latency(), + )]; + res + } + ir::StaticControl::Invoke(inv) => { + dbg!(inv.comp.borrow().name()); + todo!("implement static inlining for invokes") + } + } + } + + // Checks whether a given static control block `sc` contains a static + // par in which different threads have overlapping offload intervals. + // Note that this only checks one layer of nesting once it finds a static par. + // So if you want to check a deeper layer of nesting you have to call this + // function again on the nested static par. + fn have_overlapping_offloads(sc: &ir::StaticControl) -> bool { + match sc { + ir::StaticControl::Enable(_) | ir::StaticControl::Empty(_) => false, + ir::StaticControl::Seq(ir::StaticSeq { stmts, .. }) => { + stmts.iter().any(Self::have_overlapping_offloads) + } + ir::StaticControl::Par(ir::StaticPar { stmts, .. }) => { + // For each thread, add vec of offload intervals to the vec. + // So we have a vec of (vec of tuples/intervals) + let intervals: Vec<_> = stmts + .iter() + .map(|stmt| Self::get_offload_latencies(stmt, 0)) + .collect(); + for (intervals1, intervals2) in + intervals.iter().tuple_combinations() + { + for &(start1, end1) in intervals1.iter() { + for &(start2, end2) in intervals2.iter() { + // Overlap if either: interval1 a) starts within + // interval2, b) ends within interval2, or c) + // encompasses interval2 entirely. + if (start2 <= end1 && end1 <= end2) + || (start2 <= start1 && start1 <= end2) + || (start1 <= start2 && end2 <= start2) + { + return true; + } + } + } + } + false + // We don't have to check this + // stmts.iter().any(|stmt| Self::have_overlapping_repeats(stmt)) + // because we will check this later on. + } + ir::StaticControl::If(ir::StaticIf { + tbranch, fbranch, .. + }) => { + Self::have_overlapping_offloads(tbranch) + || Self::have_overlapping_offloads(fbranch) + } + ir::StaticControl::Repeat(ir::StaticRepeat { body, .. }) => { + Self::have_overlapping_offloads(body) + } + ir::StaticControl::Invoke(inv) => { + dbg!(inv.comp.borrow().name()); + todo!("implement static inlining for invokes") + } + } + } + + // Increases the latency of static group `sg` to `new_lat`. + // `new_lat` must be longer than the existing latency. + // Useful to make `static par` threads all have the same latency. + fn increase_sgroup_latency(sg: ir::RRC, new_lat: u64) { + assert!( + new_lat >= sg.borrow().get_latency(), + "New latency must be bigger than existing latency" + ); + sg.borrow_mut().latency = new_lat; + sg.borrow_mut().assignments.iter_mut().for_each(|asssign| { + asssign.guard.add_interval(StaticTiming::new((0, new_lat))) + }); + } + + fn get_coloring(par_stmts: &[ir::StaticControl]) -> HashMap { + let mut conflict_graph: GraphColoring = + GraphColoring::from(0..par_stmts.len()); + // Getting the offload intervals for each thread. + let offload_interval_info = par_stmts + .iter() + .map(|stmt| Self::get_offload_latencies(stmt, 0)) + .collect_vec(); + // Build conflict graph, where each thread is represented + // by its index in `stmts` + for (i, j) in (0..par_stmts.len()).tuple_combinations() { + let intervals1 = &offload_interval_info[i]; + let intervals2 = &offload_interval_info[j]; + for &(start1, end1) in intervals1.iter() { + for &(start2, end2) in intervals2.iter() { + if (start2 <= end1 && end1 <= end2) + || (start2 <= start1 && start1 <= end2) + || (start1 <= start2 && end2 <= end1) + { + // If intervals overlap then insert conflict. + conflict_graph.insert_conflict(&i, &j); + } + } + } + } + + conflict_graph.color_greedy(None, true) + } + // inlines the static control `sc` and returns an equivalent single static group fn inline_static_control( + &self, sc: &ir::StaticControl, builder: &mut ir::Builder, ) -> ir::RRC { @@ -140,7 +337,7 @@ impl StaticInliner { let stmt_latency = stmt.get_latency(); // first recursively call each stmt in seq, and turn each stmt // into static group g. - let g = StaticInliner::inline_static_control(stmt, builder); + let g = self.inline_static_control(stmt, builder); assert!( g.borrow().get_latency() == stmt_latency, "static group latency doesn't match static stmt latency" @@ -179,37 +376,206 @@ impl StaticInliner { latency, attributes, }) => { - let par_group = - builder.add_static_group("static_par", *latency); - let mut par_group_assigns: Vec< - ir::Assignment, - > = vec![]; - for stmt in stmts { - let stmt_latency = stmt.get_latency(); - // recursively turn each stmt in the par block into a group g - let g = StaticInliner::inline_static_control(stmt, builder); - assert!( - g.borrow().get_latency() == stmt_latency, - "static group latency doesn't match static stmt latency" - ); - // get the assignments from g - // see note on the StaticControl::Seq(..) case abt why we need to clone - let mut g_assigns: Vec> = - g.borrow_mut().assignments.clone(); - // offset = 0 (all start at beginning of par), - // but still should add %[0:stmt_latency] to beginning of group - StaticInliner::update_assignments_timing( - &mut g_assigns, - 0, - stmt_latency, - *latency, - ); - // add g_assigns to par_group_assigns - par_group_assigns.extend(g_assigns.into_iter()); + if !self.offload_pause { + // If we don't pause on offload, we can just do things + // conventionally, similar to static seq. + let par_group = + builder.add_static_group("static_par", *latency); + let mut par_group_assigns: Vec< + ir::Assignment, + > = vec![]; + for stmt in stmts { + let stmt_latency = stmt.get_latency(); + // first recursively call each stmt in par, and turn each stmt + // into static group g. + let g = self.inline_static_control(stmt, builder); + assert!(g.borrow().get_latency() == stmt_latency, "static group latency doesn't match static stmt latency"); + // get the assignments from g + let mut g_assigns: Vec< + ir::Assignment, + > = g.borrow_mut().assignments.clone(); + // and add %[0, group_latency] to each assignment in g_assigns + StaticInliner::update_assignments_timing( + &mut g_assigns, + 0, + stmt_latency, + *latency, + ); + // add g_assigns to par_group_assigns + par_group_assigns.extend(g_assigns.into_iter()); + } + par_group.borrow_mut().assignments = par_group_assigns; + par_group.borrow_mut().attributes = attributes.clone(); + par_group + } else { + // We build a conflict graph to figure out which + // `static par` threads can share an FSM (they can do so + // so long as they never offload at the same time). + // To do this we perform a greedy coloring, where nodes=threads + // and threads are represented by their index in `stmts`. + let threads_to_colors = Self::get_coloring(stmts); + let colors_to_threads = + GraphColoring::reverse_coloring(&threads_to_colors); + // Need to know the latency of each color (i.e., the + // maximum latency among all threads of that color.) + let colors_to_latencies: BTreeMap = + colors_to_threads + .into_iter() + .map(|(color, threads)| { + ( + color, + threads + .iter() + .map(|thread| { + stmts + .get(*thread) + .expect("coloring shouldn't produce unkown threads") + .get_latency() + }) + .max() + .expect("par.stmts shouldn't be empty"), + ) + }) + .collect(); + + // `thread_assigns` maps colors to the assignments corresponding to the + // color (i.e., the assignments corresponding to the color's + // group of threads.) + let mut color_assigns: BTreeMap< + usize, + Vec>, + > = BTreeMap::new(); + // iterate through stmts to build `color_assigns`. + for (index, stmt) in stmts.iter().enumerate() { + // color_latency should be >= stmt_latency + // (color_latency is max of all threads of the color). + let stmt_latency = stmt.get_latency(); + let color_latency = *colors_to_latencies + .get(&threads_to_colors[&index]) + .expect("coloring has gone wrong somehow"); + + // recursively turn each stmt in the par block into a group g + // and take its assignments. + let stmt_group = + self.inline_static_control(stmt, builder); + assert!( + stmt_group.borrow().get_latency() == stmt_latency, + "static group latency doesn't match static stmt latency" + ); + let mut group_assigns = + stmt_group.borrow().assignments.clone(); + + // If we are combining threads with uneven latencies, then + // for the smaller threads we have to add an implicit guard from + // %[0:smaller latency]. + if stmt_latency < color_latency { + group_assigns.iter_mut().for_each(|assign| { + assign.guard.add_interval(StaticTiming::new(( + 0, + stmt_latency, + ))) + }) + } + + color_assigns + .entry(*threads_to_colors.get(&index).unwrap()) + .or_default() + .extend(group_assigns); + } + + // Now turn `color_assigns` into `groups` (each color gets + // one group). + let mut color_groups = color_assigns + .into_iter() + .map(|(index, assigns)| { + let thread_group = builder.add_static_group( + "static_par_thread", + *colors_to_latencies.get(&index).expect("something has gone wrong merging par threads")); + thread_group.borrow_mut().assignments = assigns; + thread_group + }) + .collect_vec(); + + if color_groups.len() == 1 { + // If we only have one group, no need for a wrapper. + let par_group = color_groups.pop().unwrap(); + par_group.borrow_mut().attributes = attributes.clone(); + par_group + } else { + // We need a wrapper to fire off each thread independently. + let par_group = + builder.add_static_group("static_par", *latency); + let mut par_group_assigns: Vec< + ir::Assignment, + > = vec![]; + for group in color_groups { + // If color_latency < latency we need to add guard + // color_group[go] = %[0:color_latency] ? 1'd1; + // However, if color_latency will take the same + // number of bits as latency, then we might as + // well just increase the latency of the group to + // avoid making this guard. + // XXX(Caleb): we don't know whether this will be + // one-hot or binary... should encode some way to + // do this. + if group.borrow().latency + 1 == *latency + || group.borrow().latency + 2 == *latency + { + Self::increase_sgroup_latency( + Rc::clone(&group), + *latency, + ); + } + + structure!( builder; + let signal_on = constant(1,1); + ); + + // Making assignment: + // color_group[go] = %[0:color_latency] ? 1'd1; + let stmt_guard = + if group.borrow().latency == *latency { + ir::Guard::True + } else { + ir::Guard::Info(ir::StaticTiming::new(( + 0, + group.borrow().get_latency(), + ))) + }; + + let trigger_body = build_assignments!(builder; + group["go"] = stmt_guard ? signal_on["out"]; + ); + par_group_assigns.extend(trigger_body); + } + + par_group.borrow_mut().assignments = par_group_assigns; + par_group.borrow_mut().attributes = attributes.clone(); + par_group + .borrow_mut() + .attributes + .insert(ir::BoolAttr::ParCtrl, 1); + + // Building a wrapper that just simply executes `par_group`. + // This group could get thrown away, but thats fine, because + // we've guaranteed that `par_group` will never get thrown + // out. + let par_wrapper = builder + .add_static_group("static_par_wrapper", *latency); + structure!( builder; + let signal_on = constant(1,1); + ); + let trigger_body = build_assignments!(builder; + par_group["go"] = ? signal_on["out"]; + ); + // par_wrapper triggers par_group[go] + par_wrapper + .borrow_mut() + .assignments + .extend(trigger_body); + par_wrapper + } } - par_group.borrow_mut().assignments = par_group_assigns; - par_group.borrow_mut().attributes = attributes.clone(); - par_group } ir::StaticControl::If(ir::StaticIf { port, @@ -228,8 +594,7 @@ impl StaticInliner { // Inline assignments in tbranch and fbranch, and get resulting // tgroup_assigns and fgroup_assigns - let tgroup = - StaticInliner::inline_static_control(tbranch, builder); + let tgroup = self.inline_static_control(tbranch, builder); let mut tgroup_assigns: Vec> = tgroup.borrow_mut().assignments.clone(); assert_eq!( @@ -242,9 +607,8 @@ impl StaticInliner { match **fbranch { ir::StaticControl::Empty(_) => vec![], _ => { - let fgroup = StaticInliner::inline_static_control( - fbranch, builder, - ); + let fgroup = + self.inline_static_control(fbranch, builder); assert_eq!(fbranch_latency, fgroup.borrow().get_latency(), "false branch and false branch group latency do not match"); let fgroup_assigns: Vec< ir::Assignment, @@ -345,8 +709,7 @@ impl StaticInliner { let repeat_group = builder.add_static_group("static_repeat", *latency); // turn body into a group body_group by recursively calling inline_static_control - let body_group = - StaticInliner::inline_static_control(body, builder); + let body_group = self.inline_static_control(body, builder); assert_eq!(*latency, (num_repeats * body_group.borrow().get_latency()), "latency of static repeat is not equal to num_repeats * latency of body"); // the assignments in the repeat group should simply trigger the // body group. So the static group will literally look like: @@ -382,8 +745,7 @@ impl Visitor for StaticInliner { _comps: &[ir::Component], ) -> VisResult { let mut builder = ir::Builder::new(comp, sigs); - let replacement_group = - StaticInliner::inline_static_control(s, &mut builder); + let replacement_group = self.inline_static_control(s, &mut builder); Ok(Action::Change(Box::new(ir::Control::from( ir::StaticControl::from(replacement_group), )))) diff --git a/examples/futil/dot-product.expect b/examples/futil/dot-product.expect index 023e819353..7fb3274211 100644 --- a/examples/futil/dot-product.expect +++ b/examples/futil/dot-product.expect @@ -19,9 +19,8 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { @external @data v0 = comb_mem_d1(32, 1, 1); @generated comb_reg = std_reg(1); @generated fsm = std_reg(4); - @generated adder = std_add(4); - @generated adder0 = std_add(4); @generated ud = undef(1); + @generated adder = std_add(4); @generated ud0 = undef(1); @generated signal_reg = std_reg(1); @generated fsm0 = std_reg(2); @@ -48,14 +47,13 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { add1.left = fsm.out == 4'd1 & early_reset_static_seq_go.out ? i0.out; add1.right = fsm.out == 4'd1 & early_reset_static_seq_go.out ? const3.out; done = tdcc_done.out ? 1'd1; - fsm.write_en = early_reset_cond00_go.out | early_reset_static_seq_go.out ? 1'd1; + fsm.write_en = fsm.out != 4'd7 & early_reset_static_seq_go.out | fsm.out == 4'd7 & early_reset_static_seq_go.out ? 1'd1; fsm.clk = clk; fsm.reset = reset; - fsm.in = !(fsm.out == 4'd0) & early_reset_cond00_go.out ? adder.out; - fsm.in = fsm.out == 4'd0 & early_reset_cond00_go.out | fsm.out == 4'd7 & early_reset_static_seq_go.out ? 4'd0; - fsm.in = !(fsm.out == 4'd7) & early_reset_static_seq_go.out ? adder0.out; - adder.left = early_reset_cond00_go.out ? fsm.out; - adder.right = early_reset_cond00_go.out ? 4'd1; + fsm.in = fsm.out != 4'd7 & early_reset_static_seq_go.out ? adder.out; + fsm.in = fsm.out == 4'd7 & early_reset_static_seq_go.out ? 4'd0; + adder.left = early_reset_static_seq_go.out ? fsm.out; + adder.right = early_reset_static_seq_go.out ? 4'd1; add0.left = fsm.out == 4'd6 & early_reset_static_seq_go.out ? v0.read_data; add0.right = fsm.out == 4'd6 & early_reset_static_seq_go.out ? B_read0_0.out; v0.write_en = fsm.out == 4'd6 & early_reset_static_seq_go.out ? 1'd1; @@ -86,17 +84,15 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { mult_pipe0.go = fsm.out >= 4'd1 & fsm.out < 4'd4 & early_reset_static_seq_go.out ? 1'd1; mult_pipe0.reset = reset; mult_pipe0.right = fsm.out >= 4'd1 & fsm.out < 4'd4 & early_reset_static_seq_go.out ? B_read0_0.out; - adder0.left = early_reset_static_seq_go.out ? fsm.out; - adder0.right = early_reset_static_seq_go.out ? 4'd1; invoke0_done.in = i0.done; early_reset_static_seq_go.in = while_wrapper_early_reset_static_seq_go.out ? 1'd1; le0.left = early_reset_cond00_go.out | fsm.out == 4'd7 & early_reset_static_seq_go.out ? i0.out; le0.right = early_reset_cond00_go.out | fsm.out == 4'd7 & early_reset_static_seq_go.out ? const1.out; - signal_reg.write_en = fsm.out == 4'd0 & signal_reg.out | fsm.out == 4'd0 & !signal_reg.out & wrapper_early_reset_cond00_go.out ? 1'd1; + signal_reg.write_en = signal_reg.out | 1'b1 & 1'b1 & !signal_reg.out & wrapper_early_reset_cond00_go.out ? 1'd1; signal_reg.clk = clk; signal_reg.reset = reset; - signal_reg.in = fsm.out == 4'd0 & !signal_reg.out & wrapper_early_reset_cond00_go.out ? 1'd1; - signal_reg.in = fsm.out == 4'd0 & signal_reg.out ? 1'd0; + signal_reg.in = 1'b1 & 1'b1 & !signal_reg.out & wrapper_early_reset_cond00_go.out ? 1'd1; + signal_reg.in = signal_reg.out ? 1'd0; B0.clk = clk; B0.addr0 = fsm.out == 4'd0 & early_reset_static_seq_go.out ? i0.out; B0.reset = reset; @@ -106,10 +102,10 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { B_read0_0.in = fsm.out == 4'd0 & early_reset_static_seq_go.out ? B0.read_data; B_read0_0.in = fsm.out == 4'd5 & early_reset_static_seq_go.out ? A_read0_0.out; wrapper_early_reset_cond00_go.in = !wrapper_early_reset_cond00_done.out & fsm0.out == 2'd1 & tdcc_go.out ? 1'd1; - wrapper_early_reset_cond00_done.in = fsm.out == 4'd0 & signal_reg.out ? 1'd1; + wrapper_early_reset_cond00_done.in = signal_reg.out ? 1'd1; early_reset_static_seq_done.in = ud0.out; tdcc_done.in = fsm0.out == 2'd3 ? 1'd1; - while_wrapper_early_reset_static_seq_done.in = !comb_reg.out & fsm.out == 4'd0 ? 1'd1; + while_wrapper_early_reset_static_seq_done.in = !comb_reg.out & fsm.out == 4'd0 & 1'b1 ? 1'd1; A_read0_0.write_en = (fsm.out == 4'd0 | fsm.out == 4'd4) & early_reset_static_seq_go.out ? 1'd1; A_read0_0.clk = clk; A_read0_0.reset = reset; diff --git a/examples/futil/simple.expect b/examples/futil/simple.expect index f8e7a61ec9..3ad39a6719 100644 --- a/examples/futil/simple.expect +++ b/examples/futil/simple.expect @@ -14,20 +14,20 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { } wires { done = wrapper_early_reset_static_seq_done.out ? 1'd1; - fsm.write_en = early_reset_static_seq_go.out ? 1'd1; + fsm.write_en = fsm.out != 3'd4 & early_reset_static_seq_go.out | fsm.out == 3'd4 & early_reset_static_seq_go.out ? 1'd1; fsm.clk = clk; fsm.reset = reset; - fsm.in = !(fsm.out == 3'd4) & early_reset_static_seq_go.out ? adder.out; + fsm.in = fsm.out != 3'd4 & early_reset_static_seq_go.out ? adder.out; fsm.in = fsm.out == 3'd4 & early_reset_static_seq_go.out ? 3'd0; adder.left = early_reset_static_seq_go.out ? fsm.out; adder.right = early_reset_static_seq_go.out ? 3'd1; - wrapper_early_reset_static_seq_done.in = fsm.out == 3'd0 & signal_reg.out ? 1'd1; + wrapper_early_reset_static_seq_done.in = signal_reg.out ? 1'd1; early_reset_static_seq_go.in = wrapper_early_reset_static_seq_go.out ? 1'd1; - signal_reg.write_en = fsm.out == 3'd0 & signal_reg.out | fsm.out == 3'd0 & !signal_reg.out & wrapper_early_reset_static_seq_go.out ? 1'd1; + signal_reg.write_en = signal_reg.out | fsm.out == 3'd4 & 1'b1 & !signal_reg.out & wrapper_early_reset_static_seq_go.out ? 1'd1; signal_reg.clk = clk; signal_reg.reset = reset; - signal_reg.in = fsm.out == 3'd0 & !signal_reg.out & wrapper_early_reset_static_seq_go.out ? 1'd1; - signal_reg.in = fsm.out == 3'd0 & signal_reg.out ? 1'd0; + signal_reg.in = fsm.out == 3'd4 & 1'b1 & !signal_reg.out & wrapper_early_reset_static_seq_go.out ? 1'd1; + signal_reg.in = signal_reg.out ? 1'd0; early_reset_static_seq_done.in = ud.out; wrapper_early_reset_static_seq_go.in = go; } diff --git a/examples/futil/vectorized-add.expect b/examples/futil/vectorized-add.expect index 93ac592370..c189735543 100644 --- a/examples/futil/vectorized-add.expect +++ b/examples/futil/vectorized-add.expect @@ -16,9 +16,8 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { @control le0 = std_le(4); @generated comb_reg = std_reg(1); @generated fsm = std_reg(3); - @generated adder = std_add(3); - @generated adder0 = std_add(3); @generated ud = undef(1); + @generated adder = std_add(3); @generated ud0 = undef(1); @generated signal_reg = std_reg(1); @generated fsm0 = std_reg(2); @@ -45,14 +44,13 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { add1.left = fsm.out == 3'd2 & early_reset_static_seq_go.out ? i0.out; add1.right = fsm.out == 3'd2 & early_reset_static_seq_go.out ? const2.out; done = tdcc_done.out ? 1'd1; - fsm.write_en = early_reset_cond00_go.out | early_reset_static_seq_go.out ? 1'd1; + fsm.write_en = fsm.out != 3'd3 & early_reset_static_seq_go.out | fsm.out == 3'd3 & early_reset_static_seq_go.out ? 1'd1; fsm.clk = clk; fsm.reset = reset; - fsm.in = !(fsm.out == 3'd0) & early_reset_cond00_go.out ? adder.out; - fsm.in = !(fsm.out == 3'd3) & early_reset_static_seq_go.out ? adder0.out; - fsm.in = fsm.out == 3'd0 & early_reset_cond00_go.out | fsm.out == 3'd3 & early_reset_static_seq_go.out ? 3'd0; - adder.left = early_reset_cond00_go.out ? fsm.out; - adder.right = early_reset_cond00_go.out ? 3'd1; + fsm.in = fsm.out != 3'd3 & early_reset_static_seq_go.out ? adder.out; + fsm.in = fsm.out == 3'd3 & early_reset_static_seq_go.out ? 3'd0; + adder.left = early_reset_static_seq_go.out ? fsm.out; + adder.right = early_reset_static_seq_go.out ? 3'd1; add0.left = fsm.out == 3'd1 & early_reset_static_seq_go.out ? A_read0_0.out; add0.right = fsm.out == 3'd1 & early_reset_static_seq_go.out ? B_read0_0.out; comb_reg.write_en = early_reset_cond00_go.out | fsm.out == 3'd3 & early_reset_static_seq_go.out ? 1'd1; @@ -78,17 +76,15 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { fsm0.in = fsm0.out == 2'd3 ? 2'd0; fsm0.in = fsm0.out == 2'd2 & while_wrapper_early_reset_static_seq_done.out & tdcc_go.out ? 2'd3; fsm0.in = fsm0.out == 2'd1 & wrapper_early_reset_cond00_done.out & tdcc_go.out ? 2'd2; - adder0.left = early_reset_static_seq_go.out ? fsm.out; - adder0.right = early_reset_static_seq_go.out ? 3'd1; invoke0_done.in = i0.done; early_reset_static_seq_go.in = while_wrapper_early_reset_static_seq_go.out ? 1'd1; le0.left = early_reset_cond00_go.out | fsm.out == 3'd3 & early_reset_static_seq_go.out ? i0.out; le0.right = early_reset_cond00_go.out | fsm.out == 3'd3 & early_reset_static_seq_go.out ? const1.out; - signal_reg.write_en = fsm.out == 3'd0 & signal_reg.out | fsm.out == 3'd0 & !signal_reg.out & wrapper_early_reset_cond00_go.out ? 1'd1; + signal_reg.write_en = signal_reg.out | 1'b1 & 1'b1 & !signal_reg.out & wrapper_early_reset_cond00_go.out ? 1'd1; signal_reg.clk = clk; signal_reg.reset = reset; - signal_reg.in = fsm.out == 3'd0 & !signal_reg.out & wrapper_early_reset_cond00_go.out ? 1'd1; - signal_reg.in = fsm.out == 3'd0 & signal_reg.out ? 1'd0; + signal_reg.in = 1'b1 & 1'b1 & !signal_reg.out & wrapper_early_reset_cond00_go.out ? 1'd1; + signal_reg.in = signal_reg.out ? 1'd0; B0.clk = clk; B0.addr0 = fsm.out == 3'd0 & early_reset_static_seq_go.out ? i0.out; B0.reset = reset; @@ -97,10 +93,10 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { B_read0_0.reset = reset; B_read0_0.in = fsm.out == 3'd0 & early_reset_static_seq_go.out ? B0.read_data; wrapper_early_reset_cond00_go.in = !wrapper_early_reset_cond00_done.out & fsm0.out == 2'd1 & tdcc_go.out ? 1'd1; - wrapper_early_reset_cond00_done.in = fsm.out == 3'd0 & signal_reg.out ? 1'd1; + wrapper_early_reset_cond00_done.in = signal_reg.out ? 1'd1; early_reset_static_seq_done.in = ud0.out; tdcc_done.in = fsm0.out == 2'd3 ? 1'd1; - while_wrapper_early_reset_static_seq_done.in = !comb_reg.out & fsm.out == 3'd0 ? 1'd1; + while_wrapper_early_reset_static_seq_done.in = !comb_reg.out & fsm.out == 3'd0 & 1'b1 ? 1'd1; A_read0_0.write_en = fsm.out == 3'd0 & early_reset_static_seq_go.out ? 1'd1; A_read0_0.clk = clk; A_read0_0.reset = reset; diff --git a/runt.toml b/runt.toml index 0001d0fd10..961093cbdf 100644 --- a/runt.toml +++ b/runt.toml @@ -325,6 +325,7 @@ timeout = 120 name = "correctness static control" paths = [ "tests/correctness/static-control/*.futil", + "tests/correctness/static-tree-edge/*.futil", "tests/correctness/group-static-promotion/*.futil", ] cmd = """ @@ -344,6 +345,7 @@ timeout = 120 name = "correctness static control, one-hot fsms" paths = [ "tests/correctness/static-control/*.futil", + "tests/correctness/static-tree-edge/*.futil", "tests/correctness/group-static-promotion/*.futil", ] cmd = """ @@ -351,7 +353,7 @@ fud exec --from calyx --to jq \ --through verilog \ --through dat \ -s calyx.exec './target/debug/calyx' \ - -s calyx.flags '-p all -d group2invoke -x static-fsm-opts:one-hot-cutoff=500' \ + -s calyx.flags '-p all -d group2invoke -x compile-static:one-hot-cutoff=500' \ -s verilog.cycle_limit 500 \ -s verilog.data {}.data \ {} -q diff --git a/tests/correctness/static-control/par-repeat.expect b/tests/correctness/static-control/par-repeat.expect new file mode 100644 index 0000000000..29bcd8e80a --- /dev/null +++ b/tests/correctness/static-control/par-repeat.expect @@ -0,0 +1,8 @@ +{ + "cycles": 35, + "memories": { + "m": [ + 214 + ] + } +} diff --git a/tests/correctness/static-control/par-repeat.futil b/tests/correctness/static-control/par-repeat.futil new file mode 100644 index 0000000000..eb0878a042 --- /dev/null +++ b/tests/correctness/static-control/par-repeat.futil @@ -0,0 +1,73 @@ +import "primitives/core.futil"; +import "primitives/memories/seq.futil"; +import "primitives/binary_operators.futil"; + +component main() -> () { + cells { + res1 = std_reg(32); + res2 = std_reg(32); + add1 = std_add(32); + add2 = std_add(32); + mult1 = std_mult_pipe(32); + mult2 = std_mult_pipe(32); + @external(1) m = seq_mem_d1(32,1,1); + } + wires { + static<1> group incr_res1 { + res1.write_en = 1'd1; + res1.in = add1.out; + add1.left = res1.out; + add1.right = 32'd1; + } + static<4> group double_res1 { + res1.write_en = %3 ? 1'd1; + res1.in = %3 ? mult1.out; + mult1.go = %[0:3] ? 1'd1; + mult1.left = %[0:3] ? res1.out; + mult1.right = %[0:3] ? 32'd2; + } + static<1> group incr_res2 { + res2.write_en = 1'd1; + res2.in = add2.out; + add2.left = res2.out; + add2.right = 32'd1; + } + static<4> group double_res2 { + res2.write_en = %3 ? 1'd1; + res2.in = %3 ? mult2.out; + mult2.go = %[0:3] ? 1'd1; + mult2.left = %[0:3] ? res2.out; + mult2.right = %[0:3] ? 32'd2; + } + static<1> group write_mem { + m.addr0 = 1'd0; + m.content_en = 1'd1; + m.write_en = 1'd1; + m.write_data = add1.out; + add1.left = res1.out; + add1.right = res2.out; + } + } + control { + static seq { + incr_res1; incr_res2; + static par { + static seq { + incr_res1; double_res1; + static repeat 5 { + static seq { incr_res1; double_res1;} + } + } + static seq { + double_res2; + static repeat 20 { + incr_res2; + } + } + } + incr_res1; + incr_res2; + write_mem; + } + } +} diff --git a/tests/correctness/static-control/par-repeat.futil.data b/tests/correctness/static-control/par-repeat.futil.data new file mode 100644 index 0000000000..ea79143799 --- /dev/null +++ b/tests/correctness/static-control/par-repeat.futil.data @@ -0,0 +1,12 @@ +{ + "m": { + "data": [ + 10 + ], + "format": { + "numeric_type": "bitnum", + "is_signed": false, + "width": 32 + } + } +} \ No newline at end of file diff --git a/tests/correctness/static-tree-edge/query-end-interval-normal.expect b/tests/correctness/static-tree-edge/query-end-interval-normal.expect new file mode 100644 index 0000000000..3194df3b24 --- /dev/null +++ b/tests/correctness/static-tree-edge/query-end-interval-normal.expect @@ -0,0 +1,8 @@ +{ + "cycles": 36, + "memories": { + "out_mem": [ + 67 + ] + } +} diff --git a/tests/correctness/static-tree-edge/query-end-interval-normal.futil b/tests/correctness/static-tree-edge/query-end-interval-normal.futil new file mode 100644 index 0000000000..b2b5ffb1b1 --- /dev/null +++ b/tests/correctness/static-tree-edge/query-end-interval-normal.futil @@ -0,0 +1,53 @@ +import "primitives/core.futil"; +import "primitives/memories/seq.futil"; + +component main() -> () { + cells { + @external(1) out_mem = seq_mem_d1(32, 1, 1); + r1 = std_reg(32); + add1 = std_add(32); + r2 = std_reg(32); + add2 = std_add(32); + } + wires { + static<1> group incr_r1 { + r1.write_en = 1'd1; + r1.in = add1.out; + add1.left = 32'd1; + add1.right = r1.out; + } + static<1> group incr_r2 { + r2.write_en = 1'd1; + r2.in = add1.out; + add2.left = 32'd1; + add2.right = r2.out; + } + static<1> group write_res { + add1.left = r1.out; + add1.right = r2.out; + out_mem.write_en = 1'd1; + out_mem.write_data = add1.out; + out_mem.addr0 = 1'd0; + out_mem.content_en = 1'd1; + } + } + control { + static seq { + static par { + static seq { + incr_r1; incr_r1; incr_r1; incr_r1; incr_r1; + static repeat 5 {static seq {incr_r1; incr_r1;}} + incr_r1; incr_r1; incr_r1; incr_r1; incr_r1; + static repeat 5 {static seq {incr_r1; incr_r1;}} + incr_r1; incr_r1; incr_r1; incr_r1; incr_r1; + } + static seq { + static repeat 8 { + static seq {incr_r2; incr_r2; incr_r2; incr_r2;} + } + } + } + write_res; + } + } +} diff --git a/tests/correctness/static-tree-edge/query-end-interval-normal.futil.data b/tests/correctness/static-tree-edge/query-end-interval-normal.futil.data new file mode 100644 index 0000000000..70e49435e6 --- /dev/null +++ b/tests/correctness/static-tree-edge/query-end-interval-normal.futil.data @@ -0,0 +1,12 @@ +{ + "out_mem": { + "data": [ + 0 + ], + "format": { + "numeric_type": "bitnum", + "is_signed": false, + "width": 32 + } + } +} \ No newline at end of file diff --git a/tests/correctness/static-tree-edge/query-end-interval-offload.expect b/tests/correctness/static-tree-edge/query-end-interval-offload.expect new file mode 100644 index 0000000000..dd7a4d2a6b --- /dev/null +++ b/tests/correctness/static-tree-edge/query-end-interval-offload.expect @@ -0,0 +1,8 @@ +{ + "cycles": 36, + "memories": { + "out_mem": [ + 59 + ] + } +} diff --git a/tests/correctness/static-tree-edge/query-end-interval-offload.futil b/tests/correctness/static-tree-edge/query-end-interval-offload.futil new file mode 100644 index 0000000000..836e136b63 --- /dev/null +++ b/tests/correctness/static-tree-edge/query-end-interval-offload.futil @@ -0,0 +1,53 @@ +import "primitives/core.futil"; +import "primitives/memories/seq.futil"; + +component main() -> () { + cells { + @external(1) out_mem = seq_mem_d1(32, 1, 1); + r1 = std_reg(32); + add1 = std_add(32); + r2 = std_reg(32); + add2 = std_add(32); + } + wires { + static<1> group incr_r1 { + r1.write_en = 1'd1; + r1.in = add1.out; + add1.left = 32'd1; + add1.right = r1.out; + } + static<1> group incr_r2 { + r2.write_en = 1'd1; + r2.in = add1.out; + add2.left = 32'd1; + add2.right = r2.out; + } + static<1> group write_res { + add1.left = r1.out; + add1.right = r2.out; + out_mem.write_en = 1'd1; + out_mem.write_data = add1.out; + out_mem.addr0 = 1'd0; + out_mem.content_en = 1'd1; + } + } + control { + static seq { + static par { + static seq { + incr_r1; incr_r1; incr_r1; incr_r1; incr_r1; + static repeat 5 {static seq {incr_r1; incr_r1;}} + incr_r1; incr_r1; incr_r1; incr_r1; incr_r1; + static repeat 5 {static seq {incr_r1; incr_r1;}} + incr_r1; incr_r1; incr_r1; incr_r1; incr_r1; + } + static seq { + static repeat 6 { + static seq {incr_r2; incr_r2; incr_r2; incr_r2;} + } + } + } + write_res; + } + } +} diff --git a/tests/correctness/static-tree-edge/query-end-interval-offload.futil.data b/tests/correctness/static-tree-edge/query-end-interval-offload.futil.data new file mode 100644 index 0000000000..70e49435e6 --- /dev/null +++ b/tests/correctness/static-tree-edge/query-end-interval-offload.futil.data @@ -0,0 +1,12 @@ +{ + "out_mem": { + "data": [ + 0 + ], + "format": { + "numeric_type": "bitnum", + "is_signed": false, + "width": 32 + } + } +} \ No newline at end of file diff --git a/tests/correctness/static-tree-edge/query-three-iters.expect b/tests/correctness/static-tree-edge/query-three-iters.expect new file mode 100644 index 0000000000..2595e20cc2 --- /dev/null +++ b/tests/correctness/static-tree-edge/query-three-iters.expect @@ -0,0 +1,8 @@ +{ + "cycles": 51, + "memories": { + "out_mem": [ + 93 + ] + } +} diff --git a/tests/correctness/static-tree-edge/query-three-iters.futil b/tests/correctness/static-tree-edge/query-three-iters.futil new file mode 100644 index 0000000000..e4f5aaf0e6 --- /dev/null +++ b/tests/correctness/static-tree-edge/query-three-iters.futil @@ -0,0 +1,53 @@ +import "primitives/core.futil"; +import "primitives/memories/seq.futil"; + +component main() -> () { + cells { + @external(1) out_mem = seq_mem_d1(32, 1, 1); + r1 = std_reg(32); + add1 = std_add(32); + r2 = std_reg(32); + add2 = std_add(32); + } + wires { + static<1> group incr_r1 { + r1.write_en = 1'd1; + r1.in = add1.out; + add1.left = 32'd1; + add1.right = r1.out; + } + static<1> group incr_r2 { + r2.write_en = 1'd1; + r2.in = add1.out; + add2.left = 32'd1; + add2.right = r2.out; + } + static<1> group write_res { + add1.left = r1.out; + add1.right = r2.out; + out_mem.write_en = 1'd1; + out_mem.write_data = add1.out; + out_mem.addr0 = 1'd0; + out_mem.content_en = 1'd1; + } + } + control { + static seq { + static par { + static repeat 5 {static seq { + incr_r1;incr_r1;incr_r1;incr_r1;incr_r1; + incr_r1;incr_r1;incr_r1;incr_r1;incr_r1; + }} + static seq { + incr_r2; + incr_r2; + static repeat 20 { + static seq { incr_r2; incr_r2;} + } + incr_r2; + } + } + write_res; + } + } +} diff --git a/tests/correctness/static-tree-edge/query-three-iters.futil.data b/tests/correctness/static-tree-edge/query-three-iters.futil.data new file mode 100644 index 0000000000..70e49435e6 --- /dev/null +++ b/tests/correctness/static-tree-edge/query-three-iters.futil.data @@ -0,0 +1,12 @@ +{ + "out_mem": { + "data": [ + 0 + ], + "format": { + "numeric_type": "bitnum", + "is_signed": false, + "width": 32 + } + } +} \ No newline at end of file diff --git a/tests/correctness/static-tree-edge/query-two-iters.expect b/tests/correctness/static-tree-edge/query-two-iters.expect new file mode 100644 index 0000000000..e9a998403d --- /dev/null +++ b/tests/correctness/static-tree-edge/query-two-iters.expect @@ -0,0 +1,8 @@ +{ + "cycles": 51, + "memories": { + "out_mem": [ + 63 + ] + } +} diff --git a/tests/correctness/static-tree-edge/query-two-iters.futil b/tests/correctness/static-tree-edge/query-two-iters.futil new file mode 100644 index 0000000000..fba170b322 --- /dev/null +++ b/tests/correctness/static-tree-edge/query-two-iters.futil @@ -0,0 +1,53 @@ +import "primitives/core.futil"; +import "primitives/memories/seq.futil"; + +component main() -> () { + cells { + @external(1) out_mem = seq_mem_d1(32, 1, 1); + r1 = std_reg(32); + add1 = std_add(32); + r2 = std_reg(32); + add2 = std_add(32); + } + wires { + static<1> group incr_r1 { + r1.write_en = 1'd1; + r1.in = add1.out; + add1.left = 32'd1; + add1.right = r1.out; + } + static<1> group incr_r2 { + r2.write_en = 1'd1; + r2.in = add1.out; + add2.left = 32'd1; + add2.right = r2.out; + } + static<1> group write_res { + add1.left = r1.out; + add1.right = r2.out; + out_mem.write_en = 1'd1; + out_mem.write_data = add1.out; + out_mem.addr0 = 1'd0; + out_mem.content_en = 1'd1; + } + } + control { + static seq { + static par { + static repeat 5 {static seq { + incr_r1;incr_r1;incr_r1;incr_r1;incr_r1; + incr_r1;incr_r1;incr_r1;incr_r1;incr_r1; + }} + static seq { + incr_r2; + incr_r2; + static repeat 5 { + static seq { incr_r2; incr_r2;} + } + incr_r2; + } + } + write_res; + } + } +} diff --git a/tests/correctness/static-tree-edge/query-two-iters.futil.data b/tests/correctness/static-tree-edge/query-two-iters.futil.data new file mode 100644 index 0000000000..70e49435e6 --- /dev/null +++ b/tests/correctness/static-tree-edge/query-two-iters.futil.data @@ -0,0 +1,12 @@ +{ + "out_mem": { + "data": [ + 0 + ], + "format": { + "numeric_type": "bitnum", + "is_signed": false, + "width": 32 + } + } +} \ No newline at end of file diff --git a/tests/correctness/static-tree-edge/static-par-same-len.expect b/tests/correctness/static-tree-edge/static-par-same-len.expect new file mode 100644 index 0000000000..e136a05a09 --- /dev/null +++ b/tests/correctness/static-tree-edge/static-par-same-len.expect @@ -0,0 +1,8 @@ +{ + "cycles": 51, + "memories": { + "out_mem": [ + 100 + ] + } +} diff --git a/tests/correctness/static-tree-edge/static-par-same-len.futil b/tests/correctness/static-tree-edge/static-par-same-len.futil new file mode 100644 index 0000000000..79f7284950 --- /dev/null +++ b/tests/correctness/static-tree-edge/static-par-same-len.futil @@ -0,0 +1,56 @@ +import "primitives/core.futil"; +import "primitives/memories/seq.futil"; + +component main() -> () { + cells { + @external(1) out_mem = seq_mem_d1(32, 1, 1); + r1 = std_reg(32); + add1 = std_add(32); + r2 = std_reg(32); + add2 = std_add(32); + } + wires { + static<1> group incr_r1 { + r1.write_en = 1'd1; + r1.in = add1.out; + add1.left = 32'd1; + add1.right = r1.out; + } + static<1> group incr_r2 { + r2.write_en = 1'd1; + r2.in = add1.out; + add2.left = 32'd1; + add2.right = r2.out; + } + static<1> group write_res { + add1.left = r1.out; + add1.right = r2.out; + out_mem.write_en = 1'd1; + out_mem.write_data = add1.out; + out_mem.addr0 = 1'd0; + out_mem.content_en = 1'd1; + } + } + control { + static seq { + static par { + static repeat 5 {static seq { + incr_r1;incr_r1;incr_r1;incr_r1;incr_r1; + incr_r1;incr_r1;incr_r1;incr_r1;incr_r1; + }} + static seq { + incr_r2; + incr_r2; + incr_r2; + incr_r2; + static repeat 22 { + static seq { incr_r2; incr_r2;} + } + incr_r2; + incr_r2; + } + } + write_res; + } + } +} diff --git a/tests/correctness/static-tree-edge/static-par-same-len.futil.data b/tests/correctness/static-tree-edge/static-par-same-len.futil.data new file mode 100644 index 0000000000..70e49435e6 --- /dev/null +++ b/tests/correctness/static-tree-edge/static-par-same-len.futil.data @@ -0,0 +1,12 @@ +{ + "out_mem": { + "data": [ + 0 + ], + "format": { + "numeric_type": "bitnum", + "is_signed": false, + "width": 32 + } + } +} \ No newline at end of file diff --git a/tests/passes/compile-static-interface/compile-static-interface-one-cycle.expect b/tests/passes/compile-static-interface/compile-static-interface-one-cycle.expect index ea2f340f9f..06fab00114 100644 --- a/tests/passes/compile-static-interface/compile-static-interface-one-cycle.expect +++ b/tests/passes/compile-static-interface/compile-static-interface-one-cycle.expect @@ -16,31 +16,24 @@ static<1> component do_add(left: 32, right: 32, @go go: 1, @clk clk: 1, @reset r component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { cells { a = do_add(); - @generated fsm = std_reg(1); - @generated adder = std_add(1); @generated ud = undef(1); @generated signal_reg = std_reg(1); } wires { group early_reset_static_invoke { - a.go = fsm.out == 1'd0 ? 1'd1; + a.go = 1'd1; a.left = 32'd5; a.right = 32'd6; - adder.left = fsm.out; - adder.right = 1'd1; - fsm.write_en = 1'd1; - fsm.in = !(fsm.out == 1'd0) ? adder.out; - fsm.in = fsm.out == 1'd0 ? 1'd0; early_reset_static_invoke[done] = ud.out; } group wrapper_early_reset_static_invoke { early_reset_static_invoke[go] = 1'd1; - signal_reg.write_en = fsm.out == 1'd0 & !signal_reg.out ? 1'd1; - signal_reg.in = fsm.out == 1'd0 & !signal_reg.out ? 1'd1; - wrapper_early_reset_static_invoke[done] = fsm.out == 1'd0 & signal_reg.out ? 1'd1; + signal_reg.write_en = 1'b1 & 1'b1 & !signal_reg.out ? 1'd1; + signal_reg.in = 1'b1 & 1'b1 & !signal_reg.out ? 1'd1; + wrapper_early_reset_static_invoke[done] = signal_reg.out ? 1'd1; } - signal_reg.write_en = fsm.out == 1'd0 & signal_reg.out ? 1'd1; - signal_reg.in = fsm.out == 1'd0 & signal_reg.out ? 1'd0; + signal_reg.write_en = signal_reg.out ? 1'd1; + signal_reg.in = signal_reg.out ? 1'd0; } control { wrapper_early_reset_static_invoke; diff --git a/tests/passes/compile-static-interface/compile-static-interface-repeat.expect b/tests/passes/compile-static-interface/compile-static-interface-repeat.expect index 28c8dd37ff..90a0ece589 100644 --- a/tests/passes/compile-static-interface/compile-static-interface-repeat.expect +++ b/tests/passes/compile-static-interface/compile-static-interface-repeat.expect @@ -4,37 +4,56 @@ static<6> component do_add(left: 32, right: 32, @go go: 1, @clk clk: 1, @reset r cells { add = std_add(32); r = std_reg(32); - @generated fsm = std_reg(3); - @generated adder = std_add(3); - @generated fsm0 = std_reg(1); - @generated adder0 = std_add(1); + @generated fsm = std_reg(2); + @generated fsm0 = std_reg(3); + @generated adder = std_add(2); + @generated adder0 = std_add(3); @generated ud = undef(1); + @generated ud0 = undef(1); } wires { + group early_reset_static_seq { + r.write_en = go & fsm.out == 2'd0 ? 1'd1; + add.right = go & fsm.out == 2'd0 ? right; + add.left = go & fsm.out == 2'd0 ? left; + r.in = go & fsm.out == 2'd0 ? add.out; + early_reset_a[go] = fsm.out == 2'd1 ? 1'd1; + early_reset_static_seq[done] = ud.out; + adder.left = fsm.out; + adder.right = 2'd1; + fsm.in = fsm.out == 2'd0 & go ? adder.out; + fsm.write_en = fsm.out == 2'd0 & go ? 1'd1; + fsm.in = fsm.out != 2'd1 & fsm.out != 2'd0 ? adder.out; + fsm.write_en = fsm.out != 2'd1 & fsm.out != 2'd0 ? 1'd1; + fsm.in = fsm.out == 2'd1 & 1'b1 & fsm0.out == 3'd4 ? 2'd0; + fsm.write_en = fsm.out == 2'd1 & 1'b1 & fsm0.out == 3'd4 ? 1'd1; + } group early_reset_a { r.write_en = 1'd1; add.right = right; add.left = r.out; r.in = add.out; + early_reset_a[done] = ud0.out; adder0.left = fsm0.out; - adder0.right = 1'd1; - fsm0.write_en = 1'd1; - fsm0.in = !(fsm0.out == 1'd0) ? adder0.out; - fsm0.in = fsm0.out == 1'd0 ? 1'd0; - early_reset_a[done] = ud.out; + adder0.right = 3'd1; + fsm0.in = fsm0.out != 3'd4 ? adder0.out; + fsm0.write_en = fsm0.out != 3'd4 ? 1'd1; + fsm0.in = fsm0.out == 3'd4 ? 3'd0; + fsm0.write_en = fsm0.out == 3'd4 ? 1'd1; } - r.write_en = go & fsm.out == 3'd0 ? 1'd1; - add.right = go & fsm.out == 3'd0 ? right; - add.left = go & fsm.out == 3'd0 ? left; - r.in = go & fsm.out == 3'd0 ? add.out; - early_reset_a[go] = fsm.out >= 3'd1 & fsm.out < 3'd6 ? 1'd1; + r.write_en = go & fsm.out == 2'd0 ? 1'd1; + add.right = go & fsm.out == 2'd0 ? right; + add.left = go & fsm.out == 2'd0 ? left; + r.in = go & fsm.out == 2'd0 ? add.out; + early_reset_a[go] = fsm.out == 2'd1 ? 1'd1; adder.left = fsm.out; - adder.right = 3'd1; - fsm.write_en = 1'd1; - fsm.in = go & fsm.out == 3'd0 ? adder.out; - fsm.in = !(fsm.out == 3'd0) & !(fsm.out == 3'd5) ? adder.out; - fsm.in = fsm.out == 3'd5 ? 3'd0; - fsm.in = !go & fsm.out == 3'd0 ? 3'd0; + adder.right = 2'd1; + fsm.in = fsm.out == 2'd0 & go ? adder.out; + fsm.write_en = fsm.out == 2'd0 & go ? 1'd1; + fsm.in = fsm.out != 2'd1 & fsm.out != 2'd0 ? adder.out; + fsm.write_en = fsm.out != 2'd1 & fsm.out != 2'd0 ? 1'd1; + fsm.in = fsm.out == 2'd1 & 1'b1 & fsm0.out == 3'd4 ? 2'd0; + fsm.write_en = fsm.out == 2'd1 & 1'b1 & fsm0.out == 3'd4 ? 1'd1; } control {} } @@ -51,21 +70,22 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { a.go = fsm.out == 3'd0 ? 1'd1; a.left = 32'd5; a.right = 32'd6; + early_reset_static_invoke[done] = ud.out; adder.left = fsm.out; adder.right = 3'd1; - fsm.write_en = 1'd1; - fsm.in = !(fsm.out == 3'd5) ? adder.out; + fsm.in = fsm.out != 3'd5 ? adder.out; + fsm.write_en = fsm.out != 3'd5 ? 1'd1; fsm.in = fsm.out == 3'd5 ? 3'd0; - early_reset_static_invoke[done] = ud.out; + fsm.write_en = fsm.out == 3'd5 ? 1'd1; } group wrapper_early_reset_static_invoke { early_reset_static_invoke[go] = 1'd1; - signal_reg.write_en = fsm.out == 3'd0 & !signal_reg.out ? 1'd1; - signal_reg.in = fsm.out == 3'd0 & !signal_reg.out ? 1'd1; - wrapper_early_reset_static_invoke[done] = fsm.out == 3'd0 & signal_reg.out ? 1'd1; + signal_reg.write_en = fsm.out == 3'd5 & 1'b1 & !signal_reg.out ? 1'd1; + signal_reg.in = fsm.out == 3'd5 & 1'b1 & !signal_reg.out ? 1'd1; + wrapper_early_reset_static_invoke[done] = signal_reg.out ? 1'd1; } - signal_reg.write_en = fsm.out == 3'd0 & signal_reg.out ? 1'd1; - signal_reg.in = fsm.out == 3'd0 & signal_reg.out ? 1'd0; + signal_reg.write_en = signal_reg.out ? 1'd1; + signal_reg.in = signal_reg.out ? 1'd0; } control { wrapper_early_reset_static_invoke; diff --git a/tests/passes/compile-static-interface/compile-static-interface.expect b/tests/passes/compile-static-interface/compile-static-interface.expect index 66098d210c..8f08310169 100644 --- a/tests/passes/compile-static-interface/compile-static-interface.expect +++ b/tests/passes/compile-static-interface/compile-static-interface.expect @@ -6,8 +6,28 @@ static<2> component do_add(left: 32, right: 32, @go go: 1, @clk clk: 1, @reset r r = std_reg(32); @generated fsm = std_reg(2); @generated adder = std_add(2); + @generated ud = undef(1); } wires { + group early_reset_static_seq { + r.write_en = go & fsm.out == 2'd0 ? 1'd1; + add.right = go & fsm.out == 2'd0 ? right; + add.left = go & fsm.out == 2'd0 ? left; + r.in = go & fsm.out == 2'd0 ? add.out; + r.write_en = fsm.out == 2'd1 ? 1'd1; + add.right = fsm.out == 2'd1 ? right; + add.left = fsm.out == 2'd1 ? r.out; + r.in = fsm.out == 2'd1 ? add.out; + early_reset_static_seq[done] = ud.out; + adder.left = fsm.out; + adder.right = 2'd1; + fsm.in = fsm.out == 2'd0 & go ? adder.out; + fsm.write_en = fsm.out == 2'd0 & go ? 1'd1; + fsm.in = fsm.out != 2'd0 & fsm.out != 2'd1 ? adder.out; + fsm.write_en = fsm.out != 2'd0 & fsm.out != 2'd1 ? 1'd1; + fsm.in = fsm.out == 2'd1 ? 2'd0; + fsm.write_en = fsm.out == 2'd1 ? 1'd1; + } r.write_en = go & fsm.out == 2'd0 ? 1'd1; add.right = go & fsm.out == 2'd0 ? right; add.left = go & fsm.out == 2'd0 ? left; @@ -18,11 +38,12 @@ static<2> component do_add(left: 32, right: 32, @go go: 1, @clk clk: 1, @reset r r.in = fsm.out == 2'd1 ? add.out; adder.left = fsm.out; adder.right = 2'd1; - fsm.write_en = 1'd1; - fsm.in = go & fsm.out == 2'd0 ? adder.out; - fsm.in = !(fsm.out == 2'd0) & !(fsm.out == 2'd1) ? adder.out; + fsm.in = fsm.out == 2'd0 & go ? adder.out; + fsm.write_en = fsm.out == 2'd0 & go ? 1'd1; + fsm.in = fsm.out != 2'd0 & fsm.out != 2'd1 ? adder.out; + fsm.write_en = fsm.out != 2'd0 & fsm.out != 2'd1 ? 1'd1; fsm.in = fsm.out == 2'd1 ? 2'd0; - fsm.in = !go & fsm.out == 2'd0 ? 2'd0; + fsm.write_en = fsm.out == 2'd1 ? 1'd1; } control {} } @@ -39,21 +60,22 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { a.go = fsm.out == 2'd0 ? 1'd1; a.left = 32'd5; a.right = 32'd6; + early_reset_static_invoke[done] = ud.out; adder.left = fsm.out; adder.right = 2'd1; - fsm.write_en = 1'd1; - fsm.in = !(fsm.out == 2'd1) ? adder.out; + fsm.in = fsm.out != 2'd1 ? adder.out; + fsm.write_en = fsm.out != 2'd1 ? 1'd1; fsm.in = fsm.out == 2'd1 ? 2'd0; - early_reset_static_invoke[done] = ud.out; + fsm.write_en = fsm.out == 2'd1 ? 1'd1; } group wrapper_early_reset_static_invoke { early_reset_static_invoke[go] = 1'd1; - signal_reg.write_en = fsm.out == 2'd0 & !signal_reg.out ? 1'd1; - signal_reg.in = fsm.out == 2'd0 & !signal_reg.out ? 1'd1; - wrapper_early_reset_static_invoke[done] = fsm.out == 2'd0 & signal_reg.out ? 1'd1; + signal_reg.write_en = fsm.out == 2'd1 & 1'b1 & !signal_reg.out ? 1'd1; + signal_reg.in = fsm.out == 2'd1 & 1'b1 & !signal_reg.out ? 1'd1; + wrapper_early_reset_static_invoke[done] = signal_reg.out ? 1'd1; } - signal_reg.write_en = fsm.out == 2'd0 & signal_reg.out ? 1'd1; - signal_reg.in = fsm.out == 2'd0 & signal_reg.out ? 1'd0; + signal_reg.write_en = signal_reg.out ? 1'd1; + signal_reg.in = signal_reg.out ? 1'd0; } control { wrapper_early_reset_static_invoke; diff --git a/tests/passes/compile-static-interface/interface-one-hot.expect b/tests/passes/compile-static-interface/interface-one-hot.expect index 7b5375da35..a93e8d2034 100644 --- a/tests/passes/compile-static-interface/interface-one-hot.expect +++ b/tests/passes/compile-static-interface/interface-one-hot.expect @@ -4,97 +4,93 @@ static<6> component do_add<"promoted"=1>(left: 32, right: 32, @go go: 1, @clk cl cells { add = std_add(32); r = std_reg(32); - @generated fsm = init_one_reg(6); - @generated bw_0_1 = std_wire(1); - @generated slicer = std_bit_slice(6, 0, 0, 1); - @generated bw_1_6 = std_wire(1); - @generated slicer0 = std_bit_slice(6, 1, 5, 5); - @generated lsh = std_lsh(6); - @generated bw_5_6 = std_wire(1); - @generated slicer1 = std_bit_slice(6, 5, 5, 1); - @generated sig_reg = std_reg(1); - @generated fsm0 = init_one_reg(1); - @generated lsh0 = std_lsh(1); - @generated bw_0_10 = std_wire(1); - @generated slicer2 = std_bit_slice(1, 0, 0, 1); + @generated fsm = std_reg(2); + @generated fsm0 = std_reg(3); + @generated adder = std_add(2); + @generated adder0 = std_add(3); @generated ud = undef(1); + @generated ud0 = undef(1); + @generated sig_reg = std_reg(1); } wires { + group early_reset_static_seq<"one_hot"=1> { + r.write_en = go & fsm.out == 2'd0 ? 1'd1; + add.right = go & fsm.out == 2'd0 ? right; + add.left = go & fsm.out == 2'd0 ? left; + r.in = go & fsm.out == 2'd0 ? add.out; + early_reset_a[go] = fsm.out == 2'd1 ? 1'd1; + early_reset_static_seq[done] = ud.out; + adder.left = fsm.out; + adder.right = 2'd1; + fsm.in = fsm.out == 2'd0 & go ? adder.out; + fsm.write_en = fsm.out == 2'd0 & go ? 1'd1; + fsm.in = fsm.out != 2'd1 & fsm.out != 2'd0 ? adder.out; + fsm.write_en = fsm.out != 2'd1 & fsm.out != 2'd0 ? 1'd1; + fsm.in = fsm.out == 2'd1 & 1'b1 & fsm0.out == 3'd4 ? 2'd0; + fsm.write_en = fsm.out == 2'd1 & 1'b1 & fsm0.out == 3'd4 ? 1'd1; + } group early_reset_a<"one_hot"=1> { r.write_en = 1'd1; add.right = right; add.left = r.out; r.in = add.out; - lsh0.left = fsm0.out; - lsh0.right = 1'd1; - fsm0.write_en = 1'd1; - fsm0.in = !bw_0_10.out ? lsh0.out; - fsm0.in = bw_0_10.out ? 1'd1; - early_reset_a[done] = ud.out; + early_reset_a[done] = ud0.out; + adder0.left = fsm0.out; + adder0.right = 3'd1; + fsm0.in = fsm0.out != 3'd4 ? adder0.out; + fsm0.write_en = fsm0.out != 3'd4 ? 1'd1; + fsm0.in = fsm0.out == 3'd4 ? 3'd0; + fsm0.write_en = fsm0.out == 3'd4 ? 1'd1; } - slicer.in = fsm.out; - bw_0_1.in = slicer.out != 1'd0 ? 1'd1; - slicer0.in = fsm.out; - bw_1_6.in = slicer0.out != 5'd0 ? 1'd1; - slicer1.in = fsm.out; - bw_5_6.in = slicer1.out != 1'd0 ? 1'd1; - r.write_en = go & bw_0_1.out ? 1'd1; - add.right = go & bw_0_1.out ? right; - add.left = go & bw_0_1.out ? left; - r.in = go & bw_0_1.out ? add.out; - early_reset_a[go] = bw_1_6.out ? 1'd1; - lsh.left = fsm.out; - lsh.right = 6'd1; - fsm.write_en = 1'd1; - fsm.in = go & bw_0_1.out ? lsh.out; - fsm.in = !bw_0_1.out & !bw_5_6.out ? lsh.out; - fsm.in = bw_5_6.out ? 6'd1; - fsm.in = !go & bw_0_1.out ? 6'd1; - sig_reg.write_en = bw_0_1.out ? 1'd1; + r.write_en = go & fsm.out == 2'd0 ? 1'd1; + add.right = go & fsm.out == 2'd0 ? right; + add.left = go & fsm.out == 2'd0 ? left; + r.in = go & fsm.out == 2'd0 ? add.out; + early_reset_a[go] = fsm.out == 2'd1 ? 1'd1; + adder.left = fsm.out; + adder.right = 2'd1; + fsm.in = fsm.out == 2'd0 & go ? adder.out; + fsm.write_en = fsm.out == 2'd0 & go ? 1'd1; + fsm.in = fsm.out != 2'd1 & fsm.out != 2'd0 ? adder.out; + fsm.write_en = fsm.out != 2'd1 & fsm.out != 2'd0 ? 1'd1; + fsm.in = fsm.out == 2'd1 & 1'b1 & fsm0.out == 3'd4 ? 2'd0; + fsm.write_en = fsm.out == 2'd1 & 1'b1 & fsm0.out == 3'd4 ? 1'd1; + sig_reg.write_en = fsm.out == 2'd0 & 1'b1 ? 1'd1; sig_reg.in = go ? 1'd1; sig_reg.in = !go ? 1'd0; - done = bw_0_1.out & sig_reg.out ? 1'd1; - slicer2.in = fsm0.out; - bw_0_10.in = slicer2.out != 1'd0 ? 1'd1; + done = fsm.out == 2'd0 & 1'b1 & sig_reg.out ? 1'd1; } control {} } component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { cells { a = do_add(); - @generated fsm = init_one_reg(6); - @generated bw_0_1 = std_wire(1); - @generated slicer = std_bit_slice(6, 0, 0, 1); - @generated lsh = std_lsh(6); - @generated bw_5_6 = std_wire(1); - @generated slicer0 = std_bit_slice(6, 5, 5, 1); + @generated fsm = std_reg(3); + @generated adder = std_add(3); @generated ud = undef(1); @generated signal_reg = std_reg(1); } wires { group early_reset_static_invoke<"one_hot"=1> { - a.go = bw_0_1.out ? 1'd1; + a.go = fsm.out == 3'd0 ? 1'd1; a.left = 32'd5; a.right = 32'd6; - lsh.left = fsm.out; - lsh.right = 6'd1; - fsm.write_en = 1'd1; - fsm.in = !bw_5_6.out ? lsh.out; - fsm.in = bw_5_6.out ? 6'd1; early_reset_static_invoke[done] = ud.out; + adder.left = fsm.out; + adder.right = 3'd1; + fsm.in = fsm.out != 3'd5 ? adder.out; + fsm.write_en = fsm.out != 3'd5 ? 1'd1; + fsm.in = fsm.out == 3'd5 ? 3'd0; + fsm.write_en = fsm.out == 3'd5 ? 1'd1; } group wrapper_early_reset_static_invoke<"one_hot"=1> { early_reset_static_invoke[go] = 1'd1; - signal_reg.write_en = bw_0_1.out & !signal_reg.out ? 1'd1; - signal_reg.in = bw_0_1.out & !signal_reg.out ? 1'd1; - wrapper_early_reset_static_invoke[done] = bw_0_1.out & signal_reg.out ? 1'd1; + signal_reg.write_en = fsm.out == 3'd5 & 1'b1 & !signal_reg.out ? 1'd1; + signal_reg.in = fsm.out == 3'd5 & 1'b1 & !signal_reg.out ? 1'd1; + wrapper_early_reset_static_invoke[done] = signal_reg.out ? 1'd1; } - slicer.in = fsm.out; - bw_0_1.in = slicer.out != 1'd0 ? 1'd1; - slicer0.in = fsm.out; - bw_5_6.in = slicer0.out != 1'd0 ? 1'd1; - signal_reg.write_en = bw_0_1.out & signal_reg.out ? 1'd1; - signal_reg.in = bw_0_1.out & signal_reg.out ? 1'd0; + signal_reg.write_en = signal_reg.out ? 1'd1; + signal_reg.in = signal_reg.out ? 1'd0; } control { wrapper_early_reset_static_invoke; diff --git a/tests/passes/compile-static/interface-and-cs.expect b/tests/passes/compile-static/interface-and-cs.expect index 28c8dd37ff..90a0ece589 100644 --- a/tests/passes/compile-static/interface-and-cs.expect +++ b/tests/passes/compile-static/interface-and-cs.expect @@ -4,37 +4,56 @@ static<6> component do_add(left: 32, right: 32, @go go: 1, @clk clk: 1, @reset r cells { add = std_add(32); r = std_reg(32); - @generated fsm = std_reg(3); - @generated adder = std_add(3); - @generated fsm0 = std_reg(1); - @generated adder0 = std_add(1); + @generated fsm = std_reg(2); + @generated fsm0 = std_reg(3); + @generated adder = std_add(2); + @generated adder0 = std_add(3); @generated ud = undef(1); + @generated ud0 = undef(1); } wires { + group early_reset_static_seq { + r.write_en = go & fsm.out == 2'd0 ? 1'd1; + add.right = go & fsm.out == 2'd0 ? right; + add.left = go & fsm.out == 2'd0 ? left; + r.in = go & fsm.out == 2'd0 ? add.out; + early_reset_a[go] = fsm.out == 2'd1 ? 1'd1; + early_reset_static_seq[done] = ud.out; + adder.left = fsm.out; + adder.right = 2'd1; + fsm.in = fsm.out == 2'd0 & go ? adder.out; + fsm.write_en = fsm.out == 2'd0 & go ? 1'd1; + fsm.in = fsm.out != 2'd1 & fsm.out != 2'd0 ? adder.out; + fsm.write_en = fsm.out != 2'd1 & fsm.out != 2'd0 ? 1'd1; + fsm.in = fsm.out == 2'd1 & 1'b1 & fsm0.out == 3'd4 ? 2'd0; + fsm.write_en = fsm.out == 2'd1 & 1'b1 & fsm0.out == 3'd4 ? 1'd1; + } group early_reset_a { r.write_en = 1'd1; add.right = right; add.left = r.out; r.in = add.out; + early_reset_a[done] = ud0.out; adder0.left = fsm0.out; - adder0.right = 1'd1; - fsm0.write_en = 1'd1; - fsm0.in = !(fsm0.out == 1'd0) ? adder0.out; - fsm0.in = fsm0.out == 1'd0 ? 1'd0; - early_reset_a[done] = ud.out; + adder0.right = 3'd1; + fsm0.in = fsm0.out != 3'd4 ? adder0.out; + fsm0.write_en = fsm0.out != 3'd4 ? 1'd1; + fsm0.in = fsm0.out == 3'd4 ? 3'd0; + fsm0.write_en = fsm0.out == 3'd4 ? 1'd1; } - r.write_en = go & fsm.out == 3'd0 ? 1'd1; - add.right = go & fsm.out == 3'd0 ? right; - add.left = go & fsm.out == 3'd0 ? left; - r.in = go & fsm.out == 3'd0 ? add.out; - early_reset_a[go] = fsm.out >= 3'd1 & fsm.out < 3'd6 ? 1'd1; + r.write_en = go & fsm.out == 2'd0 ? 1'd1; + add.right = go & fsm.out == 2'd0 ? right; + add.left = go & fsm.out == 2'd0 ? left; + r.in = go & fsm.out == 2'd0 ? add.out; + early_reset_a[go] = fsm.out == 2'd1 ? 1'd1; adder.left = fsm.out; - adder.right = 3'd1; - fsm.write_en = 1'd1; - fsm.in = go & fsm.out == 3'd0 ? adder.out; - fsm.in = !(fsm.out == 3'd0) & !(fsm.out == 3'd5) ? adder.out; - fsm.in = fsm.out == 3'd5 ? 3'd0; - fsm.in = !go & fsm.out == 3'd0 ? 3'd0; + adder.right = 2'd1; + fsm.in = fsm.out == 2'd0 & go ? adder.out; + fsm.write_en = fsm.out == 2'd0 & go ? 1'd1; + fsm.in = fsm.out != 2'd1 & fsm.out != 2'd0 ? adder.out; + fsm.write_en = fsm.out != 2'd1 & fsm.out != 2'd0 ? 1'd1; + fsm.in = fsm.out == 2'd1 & 1'b1 & fsm0.out == 3'd4 ? 2'd0; + fsm.write_en = fsm.out == 2'd1 & 1'b1 & fsm0.out == 3'd4 ? 1'd1; } control {} } @@ -51,21 +70,22 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { a.go = fsm.out == 3'd0 ? 1'd1; a.left = 32'd5; a.right = 32'd6; + early_reset_static_invoke[done] = ud.out; adder.left = fsm.out; adder.right = 3'd1; - fsm.write_en = 1'd1; - fsm.in = !(fsm.out == 3'd5) ? adder.out; + fsm.in = fsm.out != 3'd5 ? adder.out; + fsm.write_en = fsm.out != 3'd5 ? 1'd1; fsm.in = fsm.out == 3'd5 ? 3'd0; - early_reset_static_invoke[done] = ud.out; + fsm.write_en = fsm.out == 3'd5 ? 1'd1; } group wrapper_early_reset_static_invoke { early_reset_static_invoke[go] = 1'd1; - signal_reg.write_en = fsm.out == 3'd0 & !signal_reg.out ? 1'd1; - signal_reg.in = fsm.out == 3'd0 & !signal_reg.out ? 1'd1; - wrapper_early_reset_static_invoke[done] = fsm.out == 3'd0 & signal_reg.out ? 1'd1; + signal_reg.write_en = fsm.out == 3'd5 & 1'b1 & !signal_reg.out ? 1'd1; + signal_reg.in = fsm.out == 3'd5 & 1'b1 & !signal_reg.out ? 1'd1; + wrapper_early_reset_static_invoke[done] = signal_reg.out ? 1'd1; } - signal_reg.write_en = fsm.out == 3'd0 & signal_reg.out ? 1'd1; - signal_reg.in = fsm.out == 3'd0 & signal_reg.out ? 1'd0; + signal_reg.write_en = signal_reg.out ? 1'd1; + signal_reg.in = signal_reg.out ? 1'd0; } control { wrapper_early_reset_static_invoke; diff --git a/tests/passes/compile-static/interface-static-par.expect b/tests/passes/compile-static/interface-static-par.expect new file mode 100644 index 0000000000..8e61f8b696 --- /dev/null +++ b/tests/passes/compile-static/interface-static-par.expect @@ -0,0 +1,98 @@ +import "primitives/core.futil"; +import "primitives/memories/comb.futil"; +static<10> component do_add(left: 32, right: 32, @go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { + cells { + add = std_add(32); + r = std_reg(32); + r1 = std_reg(32); + @generated fsm = std_reg(4); + @generated fsm0 = std_reg(3); + @generated adder = std_add(4); + @generated adder0 = std_add(3); + @generated ud = undef(1); + @generated ud0 = undef(1); + @generated ud1 = undef(1); + @generated ud2 = undef(1); + @generated ud3 = undef(1); + @generated ud4 = undef(1); + } + wires { + group early_reset_static_par_wrapper { + early_reset_static_par[go] = 1'd1; + early_reset_static_par_wrapper[done] = ud.out; + } + group early_reset_static_par<"par"=1> { + early_reset_static_par_thread[go] = 1'd1; + early_reset_static_par_thread0[go] = fsm.out < 4'd5 & 1'b1 ? 1'd1; + early_reset_static_par[done] = ud0.out; + } + group early_reset_static_par_thread { + early_reset_a[go] = 1'd1; + early_reset_static_par_thread[done] = ud1.out; + } + group early_reset_a { + r.write_en = 1'd1; + add.right = right; + add.left = r.out; + r.in = add.out; + early_reset_a[done] = ud2.out; + adder.left = fsm.out; + adder.right = 4'd1; + fsm.in = fsm.out != 4'd9 ? adder.out; + fsm.write_en = fsm.out != 4'd9 ? 1'd1; + fsm.in = fsm.out == 4'd9 ? 4'd0; + fsm.write_en = fsm.out == 4'd9 ? 1'd1; + } + group early_reset_static_par_thread0 { + early_reset_c[go] = 1'd1; + early_reset_static_par_thread0[done] = ud3.out; + } + group early_reset_c { + r1.write_en = 1'd1; + r1.in = 32'd2; + early_reset_c[done] = ud4.out; + adder0.left = fsm0.out; + adder0.right = 3'd1; + fsm0.in = fsm0.out != 3'd4 ? adder0.out; + fsm0.write_en = fsm0.out != 3'd4 ? 1'd1; + fsm0.in = fsm0.out == 3'd4 ? 3'd0; + fsm0.write_en = fsm0.out == 3'd4 ? 1'd1; + } + early_reset_static_par[go] = 1'd1; + } + control {} +} +component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { + cells { + a = do_add(); + @generated fsm = std_reg(4); + @generated adder = std_add(4); + @generated ud = undef(1); + @generated signal_reg = std_reg(1); + } + wires { + group early_reset_static_invoke { + a.go = fsm.out == 4'd0 ? 1'd1; + a.left = 32'd5; + a.right = 32'd6; + early_reset_static_invoke[done] = ud.out; + adder.left = fsm.out; + adder.right = 4'd1; + fsm.in = fsm.out != 4'd9 ? adder.out; + fsm.write_en = fsm.out != 4'd9 ? 1'd1; + fsm.in = fsm.out == 4'd9 ? 4'd0; + fsm.write_en = fsm.out == 4'd9 ? 1'd1; + } + group wrapper_early_reset_static_invoke { + early_reset_static_invoke[go] = 1'd1; + signal_reg.write_en = fsm.out == 4'd9 & 1'b1 & !signal_reg.out ? 1'd1; + signal_reg.in = fsm.out == 4'd9 & 1'b1 & !signal_reg.out ? 1'd1; + wrapper_early_reset_static_invoke[done] = signal_reg.out ? 1'd1; + } + signal_reg.write_en = signal_reg.out ? 1'd1; + signal_reg.in = signal_reg.out ? 1'd0; + } + control { + wrapper_early_reset_static_invoke; + } +} diff --git a/tests/passes/compile-static/interface-static-par.futil b/tests/passes/compile-static/interface-static-par.futil new file mode 100644 index 0000000000..d67091c86b --- /dev/null +++ b/tests/passes/compile-static/interface-static-par.futil @@ -0,0 +1,43 @@ +// -p validate -p compile-invoke -p static-inline -p dead-group-removal -p add-guard -p simplify-static-guards -p compile-static +// This test case is needed to test how the `compile-static` pass works in tandem +// with components that have been compiled using the static interface (i.e., +// components that separated %[0:n] -> %[0] | %[1:n]). +// Previous test cases had missed this interaction leading us to catching bugs late. +import "primitives/core.futil"; +import "primitives/memories/comb.futil"; + +static<10> component do_add(left: 32, right: 32) -> () { + cells { + add = std_add(32); + r = std_reg(32); + r1 = std_reg(32); + } + wires { + static<1> group a { + add.left = r.out; + add.right = right; + r.in = add.out; + r.write_en = 1'd1; + } + + static<1> group c { + r1.in = 32'd2; + r1.write_en = 1'd1; + } + } + control { + static par {static repeat 10 {a;} static repeat 5 {c;}} + } + +} + +component main () -> () { + cells { + a = do_add(); + } + wires {} + + control { + static invoke a(left=32'd5, right = 32'd6)(); + } +} \ No newline at end of file diff --git a/tests/passes/compile-static/one-hot.expect b/tests/passes/compile-static/one-hot.expect index bb18664122..f085684be2 100644 --- a/tests/passes/compile-static/one-hot.expect +++ b/tests/passes/compile-static/one-hot.expect @@ -7,68 +7,41 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { b = std_reg(2); c = std_reg(2); d = std_reg(2); - @generated fsm = init_one_reg(10); - @generated bw_0_2 = std_wire(1); - @generated slicer = std_bit_slice(10, 0, 1, 2); - @generated bw_1_2 = std_wire(1); - @generated slicer0 = std_bit_slice(10, 1, 1, 1); - @generated bw_7_10 = std_wire(1); - @generated slicer1 = std_bit_slice(10, 7, 9, 3); - @generated bw_6_8 = std_wire(1); - @generated slicer2 = std_bit_slice(10, 6, 7, 2); - @generated bw_3_7 = std_wire(1); - @generated slicer3 = std_bit_slice(10, 3, 6, 4); - @generated bw_0_1 = std_wire(1); - @generated slicer4 = std_bit_slice(10, 0, 0, 1); - @generated lsh = std_lsh(10); - @generated bw_9_10 = std_wire(1); - @generated slicer5 = std_bit_slice(10, 9, 9, 1); + @generated fsm = std_reg(4); + @generated adder = std_add(4); @generated ud = undef(1); @generated signal_reg = std_reg(1); } wires { group early_reset_static_seq<"one_hot"=1> { - a.in = bw_0_2.out ? 2'd0; - a.write_en = bw_0_2.out ? 1'd1; - b.in = bw_1_2.out ? 2'd1; - b.write_en = bw_1_2.out ? 1'd1; - b.write_en = bw_7_10.out ? 1'd1; - b.in = bw_7_10.out ? 2'd1; - c.write_en = bw_6_8.out ? 1'd1; - c.in = bw_6_8.out ? 2'd1; - d.write_en = bw_3_7.out ? 1'd1; - d.in = bw_3_7.out ? 2'd1; - d.write_en = bw_0_1.out ? 1'd1; - d.in = bw_0_1.out ? 2'd1; - lsh.left = fsm.out; - lsh.right = 10'd1; - fsm.write_en = 1'd1; - fsm.in = !bw_9_10.out ? lsh.out; - fsm.in = bw_9_10.out ? 10'd1; + a.in = fsm.out < 4'd2 ? 2'd0; + a.write_en = fsm.out < 4'd2 ? 1'd1; + b.in = fsm.out == 4'd1 ? 2'd1; + b.write_en = fsm.out == 4'd1 ? 1'd1; + b.write_en = fsm.out >= 4'd7 & fsm.out < 4'd10 ? 1'd1; + b.in = fsm.out >= 4'd7 & fsm.out < 4'd10 ? 2'd1; + c.write_en = fsm.out >= 4'd6 & fsm.out < 4'd8 ? 1'd1; + c.in = fsm.out >= 4'd6 & fsm.out < 4'd8 ? 2'd1; + d.write_en = fsm.out >= 4'd3 & fsm.out < 4'd7 ? 1'd1; + d.in = fsm.out >= 4'd3 & fsm.out < 4'd7 ? 2'd1; + d.write_en = fsm.out == 4'd0 ? 1'd1; + d.in = fsm.out == 4'd0 ? 2'd1; early_reset_static_seq[done] = ud.out; + adder.left = fsm.out; + adder.right = 4'd1; + fsm.in = fsm.out != 4'd9 ? adder.out; + fsm.write_en = fsm.out != 4'd9 ? 1'd1; + fsm.in = fsm.out == 4'd9 ? 4'd0; + fsm.write_en = fsm.out == 4'd9 ? 1'd1; } group wrapper_early_reset_static_seq<"one_hot"=1> { early_reset_static_seq[go] = 1'd1; - signal_reg.write_en = bw_0_1.out & !signal_reg.out ? 1'd1; - signal_reg.in = bw_0_1.out & !signal_reg.out ? 1'd1; - wrapper_early_reset_static_seq[done] = bw_0_1.out & signal_reg.out ? 1'd1; + signal_reg.write_en = fsm.out == 4'd9 & 1'b1 & !signal_reg.out ? 1'd1; + signal_reg.in = fsm.out == 4'd9 & 1'b1 & !signal_reg.out ? 1'd1; + wrapper_early_reset_static_seq[done] = signal_reg.out ? 1'd1; } - slicer.in = fsm.out; - bw_0_2.in = slicer.out != 2'd0 ? 1'd1; - slicer0.in = fsm.out; - bw_1_2.in = slicer0.out != 1'd0 ? 1'd1; - slicer1.in = fsm.out; - bw_7_10.in = slicer1.out != 3'd0 ? 1'd1; - slicer2.in = fsm.out; - bw_6_8.in = slicer2.out != 2'd0 ? 1'd1; - slicer3.in = fsm.out; - bw_3_7.in = slicer3.out != 4'd0 ? 1'd1; - slicer4.in = fsm.out; - bw_0_1.in = slicer4.out != 1'd0 ? 1'd1; - slicer5.in = fsm.out; - bw_9_10.in = slicer5.out != 1'd0 ? 1'd1; - signal_reg.write_en = bw_0_1.out & signal_reg.out ? 1'd1; - signal_reg.in = bw_0_1.out & signal_reg.out ? 1'd0; + signal_reg.write_en = signal_reg.out ? 1'd1; + signal_reg.in = signal_reg.out ? 1'd0; } control { wrapper_early_reset_static_seq; diff --git a/tests/passes/compile-static/query-complicated-interval.expect b/tests/passes/compile-static/query-complicated-interval.expect new file mode 100644 index 0000000000..a03675b077 --- /dev/null +++ b/tests/passes/compile-static/query-complicated-interval.expect @@ -0,0 +1,83 @@ +import "primitives/core.futil"; +import "primitives/memories/comb.futil"; +import "primitives/pipelined.futil"; +component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { + cells { + r1 = std_reg(32); + r2 = std_reg(32); + @generated fsm = std_reg(6); + @generated fsm0 = std_reg(4); + @generated fsm1 = std_reg(3); + @generated adder = std_add(6); + @generated adder0 = std_add(4); + @generated adder1 = std_add(3); + @generated adder2 = std_add(4); + @generated adder3 = std_add(3); + @generated ud = undef(1); + @generated ud0 = undef(1); + @generated ud1 = undef(1); + @generated signal_reg = std_reg(1); + } + wires { + group early_reset_ctrl { + early_reset_offload0[go] = fsm.out == 6'd20 ? 1'd1; + early_reset_offload1[go] = fsm.out == 6'd41 ? 1'd1; + r1.write_en = fsm.out == 6'd20 & (fsm0.out >= 4'd2 & fsm0.out < 4'd5 & fsm1.out == 3'd1 | fsm1.out >= 3'd2 & fsm1.out < 3'd4) | fsm.out >= 6'd42 & fsm.out < 6'd52 | fsm.out >= 6'd21 & fsm.out < 6'd42 ? 1'd1; + r1.in = fsm.out == 6'd20 & (fsm0.out >= 4'd2 & fsm0.out < 4'd5 & fsm1.out == 3'd1 | fsm1.out >= 3'd2 & fsm1.out < 3'd4) | fsm.out >= 6'd42 & fsm.out < 6'd52 | fsm.out >= 6'd21 & fsm.out < 6'd42 ? 32'd2; + r2.write_en = fsm.out >= 6'd10 & fsm.out < 6'd20 | fsm.out == 6'd41 & (1'b1 & fsm1.out == 3'd0 | fsm0.out < 4'd2 & fsm1.out == 3'd1) | fsm.out >= 6'd20 & fsm.out < 6'd41 ? 1'd1; + r2.in = fsm.out >= 6'd10 & fsm.out < 6'd20 | fsm.out == 6'd41 & (1'b1 & fsm1.out == 3'd0 | fsm0.out < 4'd2 & fsm1.out == 3'd1) | fsm.out >= 6'd20 & fsm.out < 6'd41 ? 32'd2; + early_reset_ctrl[done] = ud.out; + adder.left = fsm.out; + adder.right = 6'd1; + fsm.in = !(fsm.out == 6'd20 | fsm.out == 6'd41) & fsm.out != 6'd61 ? adder.out; + fsm.write_en = !(fsm.out == 6'd20 | fsm.out == 6'd41) & fsm.out != 6'd61 ? 1'd1; + fsm.in = fsm.out == 6'd20 & fsm0.out == 4'd4 & fsm1.out == 3'd3 ? adder.out; + fsm.write_en = fsm.out == 6'd20 & fsm0.out == 4'd4 & fsm1.out == 3'd3 ? 1'd1; + fsm.in = fsm.out == 6'd41 & fsm0.out == 4'd9 & fsm1.out == 3'd1 ? adder.out; + fsm.write_en = fsm.out == 6'd41 & fsm0.out == 4'd9 & fsm1.out == 3'd1 ? 1'd1; + fsm.in = fsm.out == 6'd61 ? 6'd0; + fsm.write_en = fsm.out == 6'd61 ? 1'd1; + } + group early_reset_offload0 { + early_reset_offload0[done] = ud0.out; + adder0.left = fsm0.out; + adder0.right = 4'd1; + fsm0.in = fsm0.out != 4'd4 ? adder0.out; + fsm0.write_en = fsm0.out != 4'd4 ? 1'd1; + fsm0.in = fsm0.out == 4'd4 ? 4'd0; + fsm0.write_en = fsm0.out == 4'd4 ? 1'd1; + adder1.left = fsm1.out; + adder1.right = 3'd1; + fsm1.in = fsm0.out == 4'd4 & fsm1.out != 3'd3 ? adder1.out; + fsm1.write_en = fsm0.out == 4'd4 & fsm1.out != 3'd3 ? 1'd1; + fsm1.in = fsm0.out == 4'd4 & fsm1.out == 3'd3 ? 3'd0; + fsm1.write_en = fsm0.out == 4'd4 & fsm1.out == 3'd3 ? 1'd1; + } + group early_reset_offload1 { + early_reset_offload1[done] = ud1.out; + adder2.left = fsm0.out; + adder2.right = 4'd1; + fsm0.in = fsm0.out != 4'd9 ? adder2.out; + fsm0.write_en = fsm0.out != 4'd9 ? 1'd1; + fsm0.in = fsm0.out == 4'd9 ? 4'd0; + fsm0.write_en = fsm0.out == 4'd9 ? 1'd1; + adder3.left = fsm1.out; + adder3.right = 3'd1; + fsm1.in = fsm0.out == 4'd9 & fsm1.out != 3'd1 ? adder3.out; + fsm1.write_en = fsm0.out == 4'd9 & fsm1.out != 3'd1 ? 1'd1; + fsm1.in = fsm0.out == 4'd9 & fsm1.out == 3'd1 ? 3'd0; + fsm1.write_en = fsm0.out == 4'd9 & fsm1.out == 3'd1 ? 1'd1; + } + group wrapper_early_reset_ctrl { + early_reset_ctrl[go] = 1'd1; + signal_reg.write_en = fsm.out == 6'd61 & 1'b1 & !signal_reg.out ? 1'd1; + signal_reg.in = fsm.out == 6'd61 & 1'b1 & !signal_reg.out ? 1'd1; + wrapper_early_reset_ctrl[done] = signal_reg.out ? 1'd1; + } + signal_reg.write_en = signal_reg.out ? 1'd1; + signal_reg.in = signal_reg.out ? 1'd0; + } + control { + wrapper_early_reset_ctrl; + } +} diff --git a/tests/passes/compile-static/query-complicated-interval.futil b/tests/passes/compile-static/query-complicated-interval.futil new file mode 100644 index 0000000000..d8a085fc7c --- /dev/null +++ b/tests/passes/compile-static/query-complicated-interval.futil @@ -0,0 +1,29 @@ +// -p compile-static + +import "primitives/core.futil"; +import "primitives/memories/comb.futil"; +import "primitives/pipelined.futil"; + +component main() -> () { + cells { + r1 = std_reg(32); + r2 = std_reg(32); + } + + wires { + static<5> group offload0 {} + static<10> group offload1 {} + static<100> group ctrl { + offload0[go] = %[20:40] ? 1'd1; + offload1[go] = %[60:80] ? 1'd1; + r1.write_en = %[27:90] ? 1'd1; + r1.in = %[27:90] ? 32'd2; + r2.write_en = %[10:72] ? 1'd1; + r2.in = %[10:72] ? 32'd2; + } + } + + control { + ctrl; + } +} \ No newline at end of file diff --git a/tests/passes/compile-static/query-complicated-iter.expect b/tests/passes/compile-static/query-complicated-iter.expect new file mode 100644 index 0000000000..a5faa4d2cb --- /dev/null +++ b/tests/passes/compile-static/query-complicated-iter.expect @@ -0,0 +1,81 @@ +import "primitives/core.futil"; +import "primitives/memories/comb.futil"; +import "primitives/pipelined.futil"; +component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { + cells { + r1 = std_reg(32); + r2 = std_reg(32); + @generated fsm = std_reg(7); + @generated fsm0 = std_reg(4); + @generated fsm1 = std_reg(4); + @generated adder = std_add(7); + @generated adder0 = std_add(4); + @generated adder1 = std_add(4); + @generated adder2 = std_add(4); + @generated adder3 = std_add(4); + @generated ud = undef(1); + @generated ud0 = undef(1); + @generated ud1 = undef(1); + @generated signal_reg = std_reg(1); + } + wires { + group early_reset_ctrl { + early_reset_offload0[go] = fsm.out == 7'd20 ? 1'd1; + early_reset_offload1[go] = fsm.out == 7'd41 ? 1'd1; + r1.write_en = fsm.out == 7'd20 & (fsm0.out >= 4'd2 & fsm0.out < 4'd5 & fsm1.out == 4'd1 | fsm0.out < 4'd2 & fsm1.out == 4'd10 | fsm1.out >= 4'd2 & fsm1.out < 4'd10) ? 1'd1; + r1.in = fsm.out == 7'd41 & (fsm0.out >= 4'd5 & fsm0.out < 4'd10 & fsm1.out == 4'd0 | fsm0.out < 4'd5 & fsm1.out == 4'd1) ? 32'd2; + early_reset_ctrl[done] = ud.out; + adder.left = fsm.out; + adder.right = 7'd1; + fsm.in = !(fsm.out == 7'd20 | fsm.out == 7'd41) & fsm.out != 7'd81 ? adder.out; + fsm.write_en = !(fsm.out == 7'd20 | fsm.out == 7'd41) & fsm.out != 7'd81 ? 1'd1; + fsm.in = fsm.out == 7'd20 & fsm0.out == 4'd4 & fsm1.out == 4'd11 ? adder.out; + fsm.write_en = fsm.out == 7'd20 & fsm0.out == 4'd4 & fsm1.out == 4'd11 ? 1'd1; + fsm.in = fsm.out == 7'd41 & fsm0.out == 4'd9 & fsm1.out == 4'd5 ? adder.out; + fsm.write_en = fsm.out == 7'd41 & fsm0.out == 4'd9 & fsm1.out == 4'd5 ? 1'd1; + fsm.in = fsm.out == 7'd81 ? 7'd0; + fsm.write_en = fsm.out == 7'd81 ? 1'd1; + } + group early_reset_offload0 { + early_reset_offload0[done] = ud0.out; + adder0.left = fsm0.out; + adder0.right = 4'd1; + fsm0.in = fsm0.out != 4'd4 ? adder0.out; + fsm0.write_en = fsm0.out != 4'd4 ? 1'd1; + fsm0.in = fsm0.out == 4'd4 ? 4'd0; + fsm0.write_en = fsm0.out == 4'd4 ? 1'd1; + adder1.left = fsm1.out; + adder1.right = 4'd1; + fsm1.in = fsm0.out == 4'd4 & fsm1.out != 4'd11 ? adder1.out; + fsm1.write_en = fsm0.out == 4'd4 & fsm1.out != 4'd11 ? 1'd1; + fsm1.in = fsm0.out == 4'd4 & fsm1.out == 4'd11 ? 4'd0; + fsm1.write_en = fsm0.out == 4'd4 & fsm1.out == 4'd11 ? 1'd1; + } + group early_reset_offload1 { + early_reset_offload1[done] = ud1.out; + adder2.left = fsm0.out; + adder2.right = 4'd1; + fsm0.in = fsm0.out != 4'd9 ? adder2.out; + fsm0.write_en = fsm0.out != 4'd9 ? 1'd1; + fsm0.in = fsm0.out == 4'd9 ? 4'd0; + fsm0.write_en = fsm0.out == 4'd9 ? 1'd1; + adder3.left = fsm1.out; + adder3.right = 4'd1; + fsm1.in = fsm0.out == 4'd9 & fsm1.out != 4'd5 ? adder3.out; + fsm1.write_en = fsm0.out == 4'd9 & fsm1.out != 4'd5 ? 1'd1; + fsm1.in = fsm0.out == 4'd9 & fsm1.out == 4'd5 ? 4'd0; + fsm1.write_en = fsm0.out == 4'd9 & fsm1.out == 4'd5 ? 1'd1; + } + group wrapper_early_reset_ctrl { + early_reset_ctrl[go] = 1'd1; + signal_reg.write_en = fsm.out == 7'd81 & 1'b1 & !signal_reg.out ? 1'd1; + signal_reg.in = fsm.out == 7'd81 & 1'b1 & !signal_reg.out ? 1'd1; + wrapper_early_reset_ctrl[done] = signal_reg.out ? 1'd1; + } + signal_reg.write_en = signal_reg.out ? 1'd1; + signal_reg.in = signal_reg.out ? 1'd0; + } + control { + wrapper_early_reset_ctrl; + } +} diff --git a/tests/passes/compile-static/query-complicated-iter.futil b/tests/passes/compile-static/query-complicated-iter.futil new file mode 100644 index 0000000000..32f5af7557 --- /dev/null +++ b/tests/passes/compile-static/query-complicated-iter.futil @@ -0,0 +1,27 @@ +// -p compile-static + +import "primitives/core.futil"; +import "primitives/memories/comb.futil"; +import "primitives/pipelined.futil"; + +component main() -> () { + cells { + r1 = std_reg(32); + r2 = std_reg(32); + } + + wires { + static<5> group offload0 {} + static<10> group offload1 {} + static<200> group ctrl { + offload0[go] = %[20:80] ? 1'd1; + offload1[go] = %[100:160] ? 1'd1; + r1.write_en = %[27:72] ? 1'd1; + r1.in = %[105:115] ? 32'd2; + } + } + + control { + ctrl; + } +} \ No newline at end of file diff --git a/tests/passes/compile-static/rewrite-group-go.expect b/tests/passes/compile-static/rewrite-group-go.expect index fa281b5fd4..5c070f7c25 100644 --- a/tests/passes/compile-static/rewrite-group-go.expect +++ b/tests/passes/compile-static/rewrite-group-go.expect @@ -7,10 +7,10 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { b = std_reg(2); c = std_reg(2); @generated fsm = std_reg(2); + @generated fsm0 = std_reg(2); @generated adder = std_add(2); + @generated adder0 = std_add(2); @generated ud = undef(1); - @generated fsm0 = std_reg(3); - @generated adder0 = std_add(3); @generated ud0 = undef(1); @generated signal_reg = std_reg(1); } @@ -25,35 +25,37 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { c.in = 2'd1; dyn_C[done] = c.done; } + group early_reset_run_A_thrice { + early_reset_A[go] = 1'd1; + early_reset_run_A_thrice[done] = ud.out; + } group early_reset_A { a.in = 2'd0; a.write_en = fsm.out == 2'd0 ? 1'd1; b.in = 2'd1; b.write_en = fsm.out == 2'd1 ? 1'd1; + early_reset_A[done] = ud0.out; adder.left = fsm.out; adder.right = 2'd1; - fsm.write_en = 1'd1; - fsm.in = !(fsm.out == 2'd1) ? adder.out; + fsm.in = fsm.out != 2'd1 ? adder.out; + fsm.write_en = fsm.out != 2'd1 ? 1'd1; fsm.in = fsm.out == 2'd1 ? 2'd0; - early_reset_A[done] = ud.out; - } - group early_reset_run_A_thrice { - early_reset_A[go] = 1'd1; + fsm.write_en = fsm.out == 2'd1 ? 1'd1; adder0.left = fsm0.out; - adder0.right = 3'd1; - fsm0.write_en = 1'd1; - fsm0.in = !(fsm0.out == 3'd5) ? adder0.out; - fsm0.in = fsm0.out == 3'd5 ? 3'd0; - early_reset_run_A_thrice[done] = ud0.out; + adder0.right = 2'd1; + fsm0.in = fsm.out == 2'd1 & fsm0.out != 2'd2 ? adder0.out; + fsm0.write_en = fsm.out == 2'd1 & fsm0.out != 2'd2 ? 1'd1; + fsm0.in = fsm.out == 2'd1 & fsm0.out == 2'd2 ? 2'd0; + fsm0.write_en = fsm.out == 2'd1 & fsm0.out == 2'd2 ? 1'd1; } group wrapper_early_reset_run_A_thrice { early_reset_run_A_thrice[go] = 1'd1; - signal_reg.write_en = fsm0.out == 3'd0 & !signal_reg.out ? 1'd1; - signal_reg.in = fsm0.out == 3'd0 & !signal_reg.out ? 1'd1; - wrapper_early_reset_run_A_thrice[done] = fsm0.out == 3'd0 & signal_reg.out ? 1'd1; + signal_reg.write_en = fsm.out == 2'd1 & fsm0.out == 2'd2 & 1'b1 & !signal_reg.out ? 1'd1; + signal_reg.in = fsm.out == 2'd1 & fsm0.out == 2'd2 & 1'b1 & !signal_reg.out ? 1'd1; + wrapper_early_reset_run_A_thrice[done] = signal_reg.out ? 1'd1; } - signal_reg.write_en = fsm0.out == 3'd0 & signal_reg.out ? 1'd1; - signal_reg.in = fsm0.out == 3'd0 & signal_reg.out ? 1'd0; + signal_reg.write_en = signal_reg.out ? 1'd1; + signal_reg.in = signal_reg.out ? 1'd0; } control { seq { diff --git a/tests/passes/compile-static/rewrite-static-while-nested.expect b/tests/passes/compile-static/rewrite-static-while-nested.expect index f54d011737..4d00073bf0 100644 --- a/tests/passes/compile-static/rewrite-static-while-nested.expect +++ b/tests/passes/compile-static/rewrite-static-while-nested.expect @@ -10,12 +10,9 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { l2 = std_lt(3); r_cond = std_reg(1); @generated fsm = std_reg(2); - @generated adder = std_add(2); - @generated adder0 = std_add(2); - @generated adder1 = std_add(2); @generated ud = undef(1); + @generated adder = std_add(2); @generated ud0 = undef(1); - @generated ud1 = undef(1); @generated signal_reg = std_reg(1); } wires { @@ -38,12 +35,7 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { r_cond.in = l.out; r_cond.write_en = 1'd1; p.addr0 = 1'd0; - adder0.left = fsm.out; - adder0.right = 2'd1; - fsm.write_en = 1'd1; - fsm.in = !(fsm.out == 2'd0) ? adder0.out; - fsm.in = fsm.out == 2'd0 ? 2'd0; - early_reset_A2[done] = ud0.out; + early_reset_A2[done] = ud.out; } group early_reset_static_seq { incr.left = fsm.out == 2'd0 ? p.read_data; @@ -56,29 +48,30 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { r_cond.in = fsm.out == 2'd1 ? l.out; r_cond.write_en = fsm.out == 2'd1 ? 1'd1; p.addr0 = fsm.out == 2'd1 ? 1'd0; - adder1.left = fsm.out; - adder1.right = 2'd1; - fsm.write_en = 1'd1; - fsm.in = !(fsm.out == 2'd1) ? adder1.out; + early_reset_static_seq[done] = ud0.out; + adder.left = fsm.out; + adder.right = 2'd1; + fsm.in = fsm.out != 2'd1 ? adder.out; + fsm.write_en = fsm.out != 2'd1 ? 1'd1; fsm.in = fsm.out == 2'd1 ? 2'd0; - early_reset_static_seq[done] = ud1.out; + fsm.write_en = fsm.out == 2'd1 ? 1'd1; } group wrapper_early_reset_A2 { early_reset_A2[go] = 1'd1; - signal_reg.write_en = fsm.out == 2'd0 & !signal_reg.out ? 1'd1; - signal_reg.in = fsm.out == 2'd0 & !signal_reg.out ? 1'd1; - wrapper_early_reset_A2[done] = fsm.out == 2'd0 & signal_reg.out ? 1'd1; + signal_reg.write_en = 1'b1 & 1'b1 & !signal_reg.out ? 1'd1; + signal_reg.in = 1'b1 & 1'b1 & !signal_reg.out ? 1'd1; + wrapper_early_reset_A2[done] = signal_reg.out ? 1'd1; } group while_wrapper_early_reset_static_seq { early_reset_static_seq[go] = 1'd1; - while_wrapper_early_reset_static_seq[done] = !r_cond.out & fsm.out == 2'd0 ? 1'd1; + while_wrapper_early_reset_static_seq[done] = !r_cond.out & fsm.out == 2'd0 & 1'b1 ? 1'd1; } comb group comp { l2.left = r.out; l2.right = 3'd3; } - signal_reg.write_en = fsm.out == 2'd0 & signal_reg.out ? 1'd1; - signal_reg.in = fsm.out == 2'd0 & signal_reg.out ? 1'd0; + signal_reg.write_en = signal_reg.out ? 1'd1; + signal_reg.in = signal_reg.out ? 1'd0; } control { while l2.out with comp { diff --git a/tests/passes/compile-static/rewrite-static-while.expect b/tests/passes/compile-static/rewrite-static-while.expect index b0d5e77611..3a0e0b6ca6 100644 --- a/tests/passes/compile-static/rewrite-static-while.expect +++ b/tests/passes/compile-static/rewrite-static-while.expect @@ -8,12 +8,9 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { l = std_lt(3); r = std_reg(1); @generated fsm = std_reg(2); - @generated adder = std_add(2); - @generated adder0 = std_add(2); - @generated adder1 = std_add(2); @generated ud = undef(1); + @generated adder = std_add(2); @generated ud0 = undef(1); - @generated ud1 = undef(1); @generated signal_reg = std_reg(1); } wires { @@ -22,12 +19,7 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { l.right = 3'd6; r.in = l.out; r.write_en = 1'd1; - adder0.left = fsm.out; - adder0.right = 2'd1; - fsm.write_en = 1'd1; - fsm.in = !(fsm.out == 2'd0) ? adder0.out; - fsm.in = fsm.out == 2'd0 ? 2'd0; - early_reset_B[done] = ud0.out; + early_reset_B[done] = ud.out; } group early_reset_static_seq { incr.left = fsm.out == 2'd0 ? p.out; @@ -38,25 +30,26 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { l.right = fsm.out == 2'd1 ? 3'd6; r.in = fsm.out == 2'd1 ? l.out; r.write_en = fsm.out == 2'd1 ? 1'd1; - adder1.left = fsm.out; - adder1.right = 2'd1; - fsm.write_en = 1'd1; - fsm.in = !(fsm.out == 2'd1) ? adder1.out; + early_reset_static_seq[done] = ud0.out; + adder.left = fsm.out; + adder.right = 2'd1; + fsm.in = fsm.out != 2'd1 ? adder.out; + fsm.write_en = fsm.out != 2'd1 ? 1'd1; fsm.in = fsm.out == 2'd1 ? 2'd0; - early_reset_static_seq[done] = ud1.out; + fsm.write_en = fsm.out == 2'd1 ? 1'd1; } group wrapper_early_reset_B { early_reset_B[go] = 1'd1; - signal_reg.write_en = fsm.out == 2'd0 & !signal_reg.out ? 1'd1; - signal_reg.in = fsm.out == 2'd0 & !signal_reg.out ? 1'd1; - wrapper_early_reset_B[done] = fsm.out == 2'd0 & signal_reg.out ? 1'd1; + signal_reg.write_en = 1'b1 & 1'b1 & !signal_reg.out ? 1'd1; + signal_reg.in = 1'b1 & 1'b1 & !signal_reg.out ? 1'd1; + wrapper_early_reset_B[done] = signal_reg.out ? 1'd1; } group while_wrapper_early_reset_static_seq { early_reset_static_seq[go] = 1'd1; - while_wrapper_early_reset_static_seq[done] = !r.out & fsm.out == 2'd0 ? 1'd1; + while_wrapper_early_reset_static_seq[done] = !r.out & fsm.out == 2'd0 & 1'b1 ? 1'd1; } - signal_reg.write_en = fsm.out == 2'd0 & signal_reg.out ? 1'd1; - signal_reg.in = fsm.out == 2'd0 & signal_reg.out ? 1'd0; + signal_reg.write_en = signal_reg.out ? 1'd1; + signal_reg.in = signal_reg.out ? 1'd0; } control { seq { diff --git a/tests/passes/compile-static/separate-fsms.expect b/tests/passes/compile-static/separate-fsms.expect index df96899593..c753399b6a 100644 --- a/tests/passes/compile-static/separate-fsms.expect +++ b/tests/passes/compile-static/separate-fsms.expect @@ -7,100 +7,90 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { b = std_reg(2); c = std_reg(2); d = std_reg(2); - @generated fsm = std_reg(1); - @generated adder = std_add(1); + @generated fsm = std_reg(2); + @generated fsm0 = std_reg(3); + @generated adder = std_add(2); + @generated adder0 = std_add(3); + @generated adder1 = std_add(3); @generated ud = undef(1); - @generated fsm0 = std_reg(1); - @generated adder0 = std_add(1); @generated ud0 = undef(1); - @generated fsm1 = std_reg(1); - @generated adder1 = std_add(1); @generated ud1 = undef(1); - @generated fsm2 = std_reg(1); - @generated adder2 = std_add(1); @generated ud2 = undef(1); - @generated fsm3 = std_reg(3); - @generated adder3 = std_add(3); @generated ud3 = undef(1); @generated signal_reg = std_reg(1); @generated signal_reg0 = std_reg(1); @generated signal_reg1 = std_reg(1); } wires { - group early_reset_A { - a.in = 2'd0; - a.write_en = fsm.out == 1'd0 ? 1'd1; + group early_reset_run_A_and_D { + early_reset_A[go] = fsm.out == 2'd0 ? 1'd1; + early_reset_D[go] = fsm.out == 2'd1 ? 1'd1; + early_reset_run_A_and_D[done] = ud.out; adder.left = fsm.out; - adder.right = 1'd1; - fsm.write_en = 1'd1; - fsm.in = !(fsm.out == 1'd0) ? adder.out; - fsm.in = fsm.out == 1'd0 ? 1'd0; - early_reset_A[done] = ud.out; + adder.right = 2'd1; + fsm.in = !(fsm.out == 2'd0 | fsm.out == 2'd1) ? adder.out; + fsm.write_en = !(fsm.out == 2'd0 | fsm.out == 2'd1) ? 1'd1; + fsm.in = fsm.out == 2'd0 & 1'b1 & fsm0.out == 3'd3 ? adder.out; + fsm.write_en = fsm.out == 2'd0 & 1'b1 & fsm0.out == 3'd3 ? 1'd1; + fsm.in = fsm.out == 2'd1 & 1'b1 & fsm0.out == 3'd1 ? 2'd0; + fsm.write_en = fsm.out == 2'd1 & 1'b1 & fsm0.out == 3'd1 ? 1'd1; } - group early_reset_C { - c.in = 2'd0; - c.write_en = fsm0.out == 1'd0 ? 1'd1; + group early_reset_A { + a.in = 2'd0; + a.write_en = 1'd1; + early_reset_A[done] = ud0.out; adder0.left = fsm0.out; - adder0.right = 1'd1; - fsm0.write_en = 1'd1; - fsm0.in = !(fsm0.out == 1'd0) ? adder0.out; - fsm0.in = fsm0.out == 1'd0 ? 1'd0; - early_reset_C[done] = ud0.out; + adder0.right = 3'd1; + fsm0.in = fsm0.out != 3'd3 ? adder0.out; + fsm0.write_en = fsm0.out != 3'd3 ? 1'd1; + fsm0.in = fsm0.out == 3'd3 ? 3'd0; + fsm0.write_en = fsm0.out == 3'd3 ? 1'd1; } group early_reset_D { d.in = 2'd0; - d.write_en = fsm1.out == 1'd0 ? 1'd1; - adder1.left = fsm1.out; - adder1.right = 1'd1; - fsm1.write_en = 1'd1; - fsm1.in = !(fsm1.out == 1'd0) ? adder1.out; - fsm1.in = fsm1.out == 1'd0 ? 1'd0; + d.write_en = 1'd1; early_reset_D[done] = ud1.out; + adder1.left = fsm0.out; + adder1.right = 3'd1; + fsm0.in = fsm0.out != 3'd1 ? adder1.out; + fsm0.write_en = fsm0.out != 3'd1 ? 1'd1; + fsm0.in = fsm0.out == 3'd1 ? 3'd0; + fsm0.write_en = fsm0.out == 3'd1 ? 1'd1; } group early_reset_B { b.in = 2'd0; - b.write_en = fsm2.out == 1'd0 ? 1'd1; - adder2.left = fsm2.out; - adder2.right = 1'd1; - fsm2.write_en = 1'd1; - fsm2.in = !(fsm2.out == 1'd0) ? adder2.out; - fsm2.in = fsm2.out == 1'd0 ? 1'd0; + b.write_en = 1'd1; early_reset_B[done] = ud2.out; } - group early_reset_run_A_and_D { - early_reset_A[go] = fsm3.out < 3'd4 ? 1'd1; - early_reset_D[go] = fsm3.out >= 3'd4 & fsm3.out < 3'd6 ? 1'd1; - adder3.left = fsm3.out; - adder3.right = 3'd1; - fsm3.write_en = 1'd1; - fsm3.in = !(fsm3.out == 3'd5) ? adder3.out; - fsm3.in = fsm3.out == 3'd5 ? 3'd0; - early_reset_run_A_and_D[done] = ud3.out; + group early_reset_C { + c.in = 2'd0; + c.write_en = 1'd1; + early_reset_C[done] = ud3.out; } group wrapper_early_reset_run_A_and_D { early_reset_run_A_and_D[go] = 1'd1; - signal_reg.write_en = fsm3.out == 3'd0 & !signal_reg.out ? 1'd1; - signal_reg.in = fsm3.out == 3'd0 & !signal_reg.out ? 1'd1; - wrapper_early_reset_run_A_and_D[done] = fsm3.out == 3'd0 & signal_reg.out ? 1'd1; + signal_reg.write_en = fsm.out == 2'd1 & 1'b1 & fsm0.out == 3'd1 & 1'b1 & !signal_reg.out ? 1'd1; + signal_reg.in = fsm.out == 2'd1 & 1'b1 & fsm0.out == 3'd1 & 1'b1 & !signal_reg.out ? 1'd1; + wrapper_early_reset_run_A_and_D[done] = signal_reg.out ? 1'd1; } group wrapper_early_reset_B { early_reset_B[go] = 1'd1; - signal_reg0.write_en = fsm2.out == 1'd0 & !signal_reg0.out ? 1'd1; - signal_reg0.in = fsm2.out == 1'd0 & !signal_reg0.out ? 1'd1; - wrapper_early_reset_B[done] = fsm2.out == 1'd0 & signal_reg0.out ? 1'd1; + signal_reg0.write_en = 1'b1 & 1'b1 & !signal_reg0.out ? 1'd1; + signal_reg0.in = 1'b1 & 1'b1 & !signal_reg0.out ? 1'd1; + wrapper_early_reset_B[done] = signal_reg0.out ? 1'd1; } group wrapper_early_reset_C { early_reset_C[go] = 1'd1; - signal_reg1.write_en = fsm0.out == 1'd0 & !signal_reg1.out ? 1'd1; - signal_reg1.in = fsm0.out == 1'd0 & !signal_reg1.out ? 1'd1; - wrapper_early_reset_C[done] = fsm0.out == 1'd0 & signal_reg1.out ? 1'd1; + signal_reg1.write_en = 1'b1 & 1'b1 & !signal_reg1.out ? 1'd1; + signal_reg1.in = 1'b1 & 1'b1 & !signal_reg1.out ? 1'd1; + wrapper_early_reset_C[done] = signal_reg1.out ? 1'd1; } - signal_reg.write_en = fsm3.out == 3'd0 & signal_reg.out ? 1'd1; - signal_reg.in = fsm3.out == 3'd0 & signal_reg.out ? 1'd0; - signal_reg0.write_en = fsm2.out == 1'd0 & signal_reg0.out ? 1'd1; - signal_reg0.in = fsm2.out == 1'd0 & signal_reg0.out ? 1'd0; - signal_reg1.write_en = fsm0.out == 1'd0 & signal_reg1.out ? 1'd1; - signal_reg1.in = fsm0.out == 1'd0 & signal_reg1.out ? 1'd0; + signal_reg.write_en = signal_reg.out ? 1'd1; + signal_reg.in = signal_reg.out ? 1'd0; + signal_reg0.write_en = signal_reg0.out ? 1'd1; + signal_reg0.in = signal_reg0.out ? 1'd0; + signal_reg1.write_en = signal_reg1.out ? 1'd1; + signal_reg1.in = signal_reg1.out ? 1'd0; } control { par { diff --git a/tests/passes/static-inliner/par-if.expect b/tests/passes/static-inliner/par-if.expect index 50b19d9580..bd44f6fd66 100644 --- a/tests/passes/static-inliner/par-if.expect +++ b/tests/passes/static-inliner/par-if.expect @@ -13,7 +13,7 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { @generated cond_wire = std_wire(1); } wires { - static<4> group static_par { + static<4> group static_par_thread { cond.in = %[0:2] ? r1.out; cond_wire.in = %0 ? r1.out; cond.write_en = %0 ? 1'd1; @@ -32,6 +32,6 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { } } control { - static_par; + static_par_thread; } } diff --git a/tests/passes/tdcc/while.expect b/tests/passes/tdcc/while.expect index 900fc37811..345c992f4b 100644 --- a/tests/passes/tdcc/while.expect +++ b/tests/passes/tdcc/while.expect @@ -1,15 +1,15 @@ ======== main:tdcc ========= 0: - wrapper_early_reset_cond0[go] = !wrapper_early_reset_cond0[done] ? 1'd1; + wrapper_early_reset_cond00[go] = !wrapper_early_reset_cond00[done] ? 1'd1; 1: do_add[go] = !do_add[done] ? 1'd1; 2: - wrapper_early_reset_cond0[go] = !wrapper_early_reset_cond0[done] ? 1'd1; + wrapper_early_reset_cond00[go] = !wrapper_early_reset_cond00[done] ? 1'd1; 3: transitions: - (0, 1): wrapper_early_reset_cond0[done] & comb_reg.out - (0, 3): wrapper_early_reset_cond0[done] & !comb_reg.out + (0, 1): wrapper_early_reset_cond00[done] & comb_reg.out + (0, 3): wrapper_early_reset_cond00[done] & !comb_reg.out (1, 2): do_add[done] - (2, 1): wrapper_early_reset_cond0[done] & comb_reg.out - (2, 3): wrapper_early_reset_cond0[done] & !comb_reg.out + (2, 1): wrapper_early_reset_cond00[done] & comb_reg.out + (2, 3): wrapper_early_reset_cond00[done] & !comb_reg.out diff --git a/yxi/tests/axi/dynamic/dyn-mem-vec-add-axi-wrapped.expect b/yxi/tests/axi/dynamic/dyn-mem-vec-add-axi-wrapped.expect index ce3cbaa9b2..a39b1c5179 100644 --- a/yxi/tests/axi/dynamic/dyn-mem-vec-add-axi-wrapped.expect +++ b/yxi/tests/axi/dynamic/dyn-mem-vec-add-axi-wrapped.expect @@ -1318,15 +1318,6 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; logic ud_out; logic signal_reg_in; logic signal_reg_write_en; @@ -1334,12 +1325,12 @@ logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic do_ar_transfer_go_in; logic do_ar_transfer_go_out; logic do_ar_transfer_done_in; @@ -1348,14 +1339,14 @@ logic invoke2_go_in; logic invoke2_go_out; logic invoke2_done_in; logic invoke2_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -1390,23 +1381,6 @@ std_reg # ( .reset(bt_reg_reset), .write_en(bt_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) ) ud ( @@ -1424,13 +1398,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -1458,27 +1432,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) @@ -1495,7 +1469,7 @@ std_wire # ( wire _guard0 = 1; wire _guard1 = do_ar_transfer_done_out; wire _guard2 = ~_guard1; -wire _guard3 = fsm0_out == 2'd1; +wire _guard3 = fsm_out == 2'd1; wire _guard4 = _guard2 & _guard3; wire _guard5 = tdcc_go_out; wire _guard6 = _guard4 & _guard5; @@ -1505,136 +1479,120 @@ wire _guard9 = do_ar_transfer_go_out; wire _guard10 = do_ar_transfer_go_out; wire _guard11 = do_ar_transfer_go_out; wire _guard12 = do_ar_transfer_go_out; -wire _guard13 = early_reset_static_par_go_out; -wire _guard14 = fsm_out == 1'd0; -wire _guard15 = ~_guard14; -wire _guard16 = early_reset_static_par_go_out; -wire _guard17 = _guard15 & _guard16; -wire _guard18 = fsm_out == 1'd0; -wire _guard19 = early_reset_static_par_go_out; -wire _guard20 = _guard18 & _guard19; -wire _guard21 = early_reset_static_par_go_out; -wire _guard22 = early_reset_static_par_go_out; -wire _guard23 = ar_handshake_occurred_out; -wire _guard24 = ~_guard23; -wire _guard25 = do_ar_transfer_go_out; -wire _guard26 = _guard24 & _guard25; -wire _guard27 = early_reset_static_par_go_out; -wire _guard28 = _guard26 | _guard27; -wire _guard29 = arvalid_out; -wire _guard30 = ARREADY; -wire _guard31 = _guard29 & _guard30; -wire _guard32 = do_ar_transfer_go_out; -wire _guard33 = _guard31 & _guard32; -wire _guard34 = early_reset_static_par_go_out; -wire _guard35 = invoke2_done_out; -wire _guard36 = ~_guard35; -wire _guard37 = fsm0_out == 2'd2; -wire _guard38 = _guard36 & _guard37; -wire _guard39 = tdcc_go_out; +wire _guard13 = fsm_out == 2'd3; +wire _guard14 = fsm_out == 2'd0; +wire _guard15 = wrapper_early_reset_static_par_thread_done_out; +wire _guard16 = _guard14 & _guard15; +wire _guard17 = tdcc_go_out; +wire _guard18 = _guard16 & _guard17; +wire _guard19 = _guard13 | _guard18; +wire _guard20 = fsm_out == 2'd1; +wire _guard21 = do_ar_transfer_done_out; +wire _guard22 = _guard20 & _guard21; +wire _guard23 = tdcc_go_out; +wire _guard24 = _guard22 & _guard23; +wire _guard25 = _guard19 | _guard24; +wire _guard26 = fsm_out == 2'd2; +wire _guard27 = invoke2_done_out; +wire _guard28 = _guard26 & _guard27; +wire _guard29 = tdcc_go_out; +wire _guard30 = _guard28 & _guard29; +wire _guard31 = _guard25 | _guard30; +wire _guard32 = fsm_out == 2'd0; +wire _guard33 = wrapper_early_reset_static_par_thread_done_out; +wire _guard34 = _guard32 & _guard33; +wire _guard35 = tdcc_go_out; +wire _guard36 = _guard34 & _guard35; +wire _guard37 = fsm_out == 2'd3; +wire _guard38 = fsm_out == 2'd2; +wire _guard39 = invoke2_done_out; wire _guard40 = _guard38 & _guard39; -wire _guard41 = wrapper_early_reset_static_par_done_out; -wire _guard42 = ~_guard41; -wire _guard43 = fsm0_out == 2'd0; -wire _guard44 = _guard42 & _guard43; -wire _guard45 = tdcc_go_out; -wire _guard46 = _guard44 & _guard45; -wire _guard47 = fsm_out == 1'd0; -wire _guard48 = signal_reg_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = fsm0_out == 2'd3; -wire _guard51 = fsm0_out == 2'd0; -wire _guard52 = wrapper_early_reset_static_par_done_out; -wire _guard53 = _guard51 & _guard52; -wire _guard54 = tdcc_go_out; -wire _guard55 = _guard53 & _guard54; -wire _guard56 = _guard50 | _guard55; -wire _guard57 = fsm0_out == 2'd1; -wire _guard58 = do_ar_transfer_done_out; -wire _guard59 = _guard57 & _guard58; -wire _guard60 = tdcc_go_out; -wire _guard61 = _guard59 & _guard60; -wire _guard62 = _guard56 | _guard61; -wire _guard63 = fsm0_out == 2'd2; -wire _guard64 = invoke2_done_out; +wire _guard41 = tdcc_go_out; +wire _guard42 = _guard40 & _guard41; +wire _guard43 = fsm_out == 2'd1; +wire _guard44 = do_ar_transfer_done_out; +wire _guard45 = _guard43 & _guard44; +wire _guard46 = tdcc_go_out; +wire _guard47 = _guard45 & _guard46; +wire _guard48 = ar_handshake_occurred_out; +wire _guard49 = ~_guard48; +wire _guard50 = do_ar_transfer_go_out; +wire _guard51 = _guard49 & _guard50; +wire _guard52 = early_reset_static_par_thread_go_out; +wire _guard53 = _guard51 | _guard52; +wire _guard54 = arvalid_out; +wire _guard55 = ARREADY; +wire _guard56 = _guard54 & _guard55; +wire _guard57 = do_ar_transfer_go_out; +wire _guard58 = _guard56 & _guard57; +wire _guard59 = early_reset_static_par_thread_go_out; +wire _guard60 = invoke2_done_out; +wire _guard61 = ~_guard60; +wire _guard62 = fsm_out == 2'd2; +wire _guard63 = _guard61 & _guard62; +wire _guard64 = tdcc_go_out; wire _guard65 = _guard63 & _guard64; -wire _guard66 = tdcc_go_out; -wire _guard67 = _guard65 & _guard66; -wire _guard68 = _guard62 | _guard67; -wire _guard69 = fsm0_out == 2'd0; -wire _guard70 = wrapper_early_reset_static_par_done_out; +wire _guard66 = wrapper_early_reset_static_par_thread_done_out; +wire _guard67 = ~_guard66; +wire _guard68 = fsm_out == 2'd0; +wire _guard69 = _guard67 & _guard68; +wire _guard70 = tdcc_go_out; wire _guard71 = _guard69 & _guard70; -wire _guard72 = tdcc_go_out; -wire _guard73 = _guard71 & _guard72; -wire _guard74 = fsm0_out == 2'd3; -wire _guard75 = fsm0_out == 2'd2; -wire _guard76 = invoke2_done_out; +wire _guard72 = do_ar_transfer_go_out; +wire _guard73 = early_reset_static_par_thread_go_out; +wire _guard74 = _guard72 | _guard73; +wire _guard75 = ARREADY; +wire _guard76 = arvalid_out; wire _guard77 = _guard75 & _guard76; -wire _guard78 = tdcc_go_out; +wire _guard78 = do_ar_transfer_go_out; wire _guard79 = _guard77 & _guard78; -wire _guard80 = fsm0_out == 2'd1; -wire _guard81 = do_ar_transfer_done_out; +wire _guard80 = ARREADY; +wire _guard81 = arvalid_out; wire _guard82 = _guard80 & _guard81; -wire _guard83 = tdcc_go_out; -wire _guard84 = _guard82 & _guard83; -wire _guard85 = do_ar_transfer_go_out; -wire _guard86 = early_reset_static_par_go_out; +wire _guard83 = ~_guard82; +wire _guard84 = do_ar_transfer_go_out; +wire _guard85 = _guard83 & _guard84; +wire _guard86 = early_reset_static_par_thread_go_out; wire _guard87 = _guard85 | _guard86; -wire _guard88 = ARREADY; -wire _guard89 = arvalid_out; -wire _guard90 = _guard88 & _guard89; -wire _guard91 = do_ar_transfer_go_out; -wire _guard92 = _guard90 & _guard91; -wire _guard93 = ARREADY; -wire _guard94 = arvalid_out; -wire _guard95 = _guard93 & _guard94; -wire _guard96 = ~_guard95; -wire _guard97 = do_ar_transfer_go_out; -wire _guard98 = _guard96 & _guard97; -wire _guard99 = early_reset_static_par_go_out; -wire _guard100 = _guard98 | _guard99; -wire _guard101 = fsm_out == 1'd0; +wire _guard88 = signal_reg_out; +wire _guard89 = _guard0 & _guard0; +wire _guard90 = signal_reg_out; +wire _guard91 = ~_guard90; +wire _guard92 = _guard89 & _guard91; +wire _guard93 = wrapper_early_reset_static_par_thread_go_out; +wire _guard94 = _guard92 & _guard93; +wire _guard95 = _guard88 | _guard94; +wire _guard96 = _guard0 & _guard0; +wire _guard97 = signal_reg_out; +wire _guard98 = ~_guard97; +wire _guard99 = _guard96 & _guard98; +wire _guard100 = wrapper_early_reset_static_par_thread_go_out; +wire _guard101 = _guard99 & _guard100; wire _guard102 = signal_reg_out; -wire _guard103 = _guard101 & _guard102; -wire _guard104 = fsm_out == 1'd0; -wire _guard105 = signal_reg_out; -wire _guard106 = ~_guard105; -wire _guard107 = _guard104 & _guard106; -wire _guard108 = wrapper_early_reset_static_par_go_out; -wire _guard109 = _guard107 & _guard108; -wire _guard110 = _guard103 | _guard109; -wire _guard111 = fsm_out == 1'd0; -wire _guard112 = signal_reg_out; +wire _guard103 = wrapper_early_reset_static_par_thread_go_out; +wire _guard104 = signal_reg_out; +wire _guard105 = do_ar_transfer_go_out; +wire _guard106 = invoke2_go_out; +wire _guard107 = _guard105 | _guard106; +wire _guard108 = arvalid_out; +wire _guard109 = ARREADY; +wire _guard110 = _guard108 & _guard109; +wire _guard111 = ~_guard110; +wire _guard112 = ar_handshake_occurred_out; wire _guard113 = ~_guard112; wire _guard114 = _guard111 & _guard113; -wire _guard115 = wrapper_early_reset_static_par_go_out; +wire _guard115 = do_ar_transfer_go_out; wire _guard116 = _guard114 & _guard115; -wire _guard117 = fsm_out == 1'd0; -wire _guard118 = signal_reg_out; +wire _guard117 = arvalid_out; +wire _guard118 = ARREADY; wire _guard119 = _guard117 & _guard118; -wire _guard120 = do_ar_transfer_go_out; -wire _guard121 = invoke2_go_out; -wire _guard122 = _guard120 | _guard121; -wire _guard123 = arvalid_out; -wire _guard124 = ARREADY; -wire _guard125 = _guard123 & _guard124; -wire _guard126 = ~_guard125; -wire _guard127 = ar_handshake_occurred_out; -wire _guard128 = ~_guard127; -wire _guard129 = _guard126 & _guard128; -wire _guard130 = do_ar_transfer_go_out; -wire _guard131 = _guard129 & _guard130; -wire _guard132 = arvalid_out; -wire _guard133 = ARREADY; -wire _guard134 = _guard132 & _guard133; -wire _guard135 = ar_handshake_occurred_out; -wire _guard136 = _guard134 | _guard135; -wire _guard137 = do_ar_transfer_go_out; -wire _guard138 = _guard136 & _guard137; -wire _guard139 = invoke2_go_out; -wire _guard140 = _guard138 | _guard139; -wire _guard141 = fsm0_out == 2'd3; -wire _guard142 = wrapper_early_reset_static_par_go_out; +wire _guard120 = ar_handshake_occurred_out; +wire _guard121 = _guard119 | _guard120; +wire _guard122 = do_ar_transfer_go_out; +wire _guard123 = _guard121 & _guard122; +wire _guard124 = invoke2_go_out; +wire _guard125 = _guard123 | _guard124; +wire _guard126 = fsm_out == 2'd3; assign do_ar_transfer_go_in = _guard6; assign done = _guard7; assign ARPROT = @@ -1653,62 +1611,51 @@ assign ARBURST = _guard12 ? 2'd1 : 2'd0; assign ARVALID = arvalid_out; -assign fsm_write_en = _guard13; +assign fsm_write_en = _guard31; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard17 ? adder_out : - _guard20 ? 1'd0 : - 1'd0; -assign adder_left = - _guard21 ? fsm_out : - 1'd0; -assign adder_right = _guard22; -assign ar_handshake_occurred_write_en = _guard28; + _guard36 ? 2'd1 : + _guard37 ? 2'd0 : + _guard42 ? 2'd3 : + _guard47 ? 2'd2 : + 2'd0; +assign ar_handshake_occurred_write_en = _guard53; assign ar_handshake_occurred_clk = clk; assign ar_handshake_occurred_reset = reset; assign ar_handshake_occurred_in = - _guard33 ? 1'd1 : - _guard34 ? 1'd0 : + _guard58 ? 1'd1 : + _guard59 ? 1'd0 : 'x; -assign invoke2_go_in = _guard40; -assign wrapper_early_reset_static_par_go_in = _guard46; -assign wrapper_early_reset_static_par_done_in = _guard49; +assign invoke2_go_in = _guard65; +assign wrapper_early_reset_static_par_thread_go_in = _guard71; assign tdcc_go_in = go; -assign fsm0_write_en = _guard68; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard73 ? 2'd1 : - _guard74 ? 2'd0 : - _guard79 ? 2'd3 : - _guard84 ? 2'd2 : - 2'd0; -assign early_reset_static_par_done_in = ud_out; -assign bt_reg_write_en = _guard87; +assign bt_reg_write_en = _guard74; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard92 ? 1'd1 : - _guard100 ? 1'd0 : + _guard79 ? 1'd1 : + _guard87 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard110; +assign signal_reg_write_en = _guard95; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard116 ? 1'd1 : - _guard119 ? 1'd0 : + _guard101 ? 1'd1 : + _guard102 ? 1'd0 : 1'd0; assign invoke2_done_in = arvalid_done; -assign arvalid_write_en = _guard122; +assign early_reset_static_par_thread_go_in = _guard103; +assign wrapper_early_reset_static_par_thread_done_in = _guard104; +assign arvalid_write_en = _guard107; assign arvalid_clk = clk; assign arvalid_reset = reset; assign arvalid_in = - _guard131 ? 1'd1 : - _guard140 ? 1'd0 : + _guard116 ? 1'd1 : + _guard125 ? 1'd0 : 'x; -assign tdcc_done_in = _guard141; -assign early_reset_static_par_go_in = _guard142; +assign tdcc_done_in = _guard126; +assign early_reset_static_par_thread_done_in = ud_out; assign do_ar_transfer_done_in = bt_reg_out; // COMPONENT END: m_ar_channel_A0 endmodule @@ -1746,15 +1693,6 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; logic ud_out; logic signal_reg_in; logic signal_reg_write_en; @@ -1762,12 +1700,12 @@ logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic do_aw_transfer_go_in; logic do_aw_transfer_go_out; logic do_aw_transfer_done_in; @@ -1776,14 +1714,14 @@ logic invoke2_go_in; logic invoke2_go_out; logic invoke2_done_in; logic invoke2_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -1818,23 +1756,6 @@ std_reg # ( .reset(bt_reg_reset), .write_en(bt_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) ) ud ( @@ -1852,13 +1773,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -1886,27 +1807,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) @@ -1927,142 +1848,126 @@ wire _guard3 = do_aw_transfer_go_out; wire _guard4 = do_aw_transfer_go_out; wire _guard5 = do_aw_transfer_go_out; wire _guard6 = do_aw_transfer_go_out; -wire _guard7 = early_reset_static_par_go_out; -wire _guard8 = fsm_out == 1'd0; -wire _guard9 = ~_guard8; -wire _guard10 = early_reset_static_par_go_out; -wire _guard11 = _guard9 & _guard10; -wire _guard12 = fsm_out == 1'd0; -wire _guard13 = early_reset_static_par_go_out; -wire _guard14 = _guard12 & _guard13; -wire _guard15 = early_reset_static_par_go_out; -wire _guard16 = early_reset_static_par_go_out; -wire _guard17 = invoke2_done_out; -wire _guard18 = ~_guard17; -wire _guard19 = fsm0_out == 2'd2; -wire _guard20 = _guard18 & _guard19; -wire _guard21 = tdcc_go_out; +wire _guard7 = fsm_out == 2'd3; +wire _guard8 = fsm_out == 2'd0; +wire _guard9 = wrapper_early_reset_static_par_thread_done_out; +wire _guard10 = _guard8 & _guard9; +wire _guard11 = tdcc_go_out; +wire _guard12 = _guard10 & _guard11; +wire _guard13 = _guard7 | _guard12; +wire _guard14 = fsm_out == 2'd1; +wire _guard15 = do_aw_transfer_done_out; +wire _guard16 = _guard14 & _guard15; +wire _guard17 = tdcc_go_out; +wire _guard18 = _guard16 & _guard17; +wire _guard19 = _guard13 | _guard18; +wire _guard20 = fsm_out == 2'd2; +wire _guard21 = invoke2_done_out; wire _guard22 = _guard20 & _guard21; -wire _guard23 = wrapper_early_reset_static_par_done_out; -wire _guard24 = ~_guard23; -wire _guard25 = fsm0_out == 2'd0; -wire _guard26 = _guard24 & _guard25; -wire _guard27 = tdcc_go_out; +wire _guard23 = tdcc_go_out; +wire _guard24 = _guard22 & _guard23; +wire _guard25 = _guard19 | _guard24; +wire _guard26 = fsm_out == 2'd0; +wire _guard27 = wrapper_early_reset_static_par_thread_done_out; wire _guard28 = _guard26 & _guard27; -wire _guard29 = fsm_out == 1'd0; -wire _guard30 = signal_reg_out; -wire _guard31 = _guard29 & _guard30; -wire _guard32 = fsm0_out == 2'd3; -wire _guard33 = fsm0_out == 2'd0; -wire _guard34 = wrapper_early_reset_static_par_done_out; -wire _guard35 = _guard33 & _guard34; -wire _guard36 = tdcc_go_out; -wire _guard37 = _guard35 & _guard36; -wire _guard38 = _guard32 | _guard37; -wire _guard39 = fsm0_out == 2'd1; -wire _guard40 = do_aw_transfer_done_out; +wire _guard29 = tdcc_go_out; +wire _guard30 = _guard28 & _guard29; +wire _guard31 = fsm_out == 2'd3; +wire _guard32 = fsm_out == 2'd2; +wire _guard33 = invoke2_done_out; +wire _guard34 = _guard32 & _guard33; +wire _guard35 = tdcc_go_out; +wire _guard36 = _guard34 & _guard35; +wire _guard37 = fsm_out == 2'd1; +wire _guard38 = do_aw_transfer_done_out; +wire _guard39 = _guard37 & _guard38; +wire _guard40 = tdcc_go_out; wire _guard41 = _guard39 & _guard40; -wire _guard42 = tdcc_go_out; -wire _guard43 = _guard41 & _guard42; -wire _guard44 = _guard38 | _guard43; -wire _guard45 = fsm0_out == 2'd2; -wire _guard46 = invoke2_done_out; +wire _guard42 = invoke2_done_out; +wire _guard43 = ~_guard42; +wire _guard44 = fsm_out == 2'd2; +wire _guard45 = _guard43 & _guard44; +wire _guard46 = tdcc_go_out; wire _guard47 = _guard45 & _guard46; -wire _guard48 = tdcc_go_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = _guard44 | _guard49; -wire _guard51 = fsm0_out == 2'd0; -wire _guard52 = wrapper_early_reset_static_par_done_out; +wire _guard48 = wrapper_early_reset_static_par_thread_done_out; +wire _guard49 = ~_guard48; +wire _guard50 = fsm_out == 2'd0; +wire _guard51 = _guard49 & _guard50; +wire _guard52 = tdcc_go_out; wire _guard53 = _guard51 & _guard52; -wire _guard54 = tdcc_go_out; -wire _guard55 = _guard53 & _guard54; -wire _guard56 = fsm0_out == 2'd3; -wire _guard57 = fsm0_out == 2'd2; -wire _guard58 = invoke2_done_out; +wire _guard54 = do_aw_transfer_done_out; +wire _guard55 = ~_guard54; +wire _guard56 = fsm_out == 2'd1; +wire _guard57 = _guard55 & _guard56; +wire _guard58 = tdcc_go_out; wire _guard59 = _guard57 & _guard58; -wire _guard60 = tdcc_go_out; -wire _guard61 = _guard59 & _guard60; -wire _guard62 = fsm0_out == 2'd1; -wire _guard63 = do_aw_transfer_done_out; -wire _guard64 = _guard62 & _guard63; -wire _guard65 = tdcc_go_out; -wire _guard66 = _guard64 & _guard65; -wire _guard67 = do_aw_transfer_done_out; -wire _guard68 = ~_guard67; -wire _guard69 = fsm0_out == 2'd1; +wire _guard60 = do_aw_transfer_go_out; +wire _guard61 = early_reset_static_par_thread_go_out; +wire _guard62 = _guard60 | _guard61; +wire _guard63 = AWREADY; +wire _guard64 = awvalid_out; +wire _guard65 = _guard63 & _guard64; +wire _guard66 = do_aw_transfer_go_out; +wire _guard67 = _guard65 & _guard66; +wire _guard68 = AWREADY; +wire _guard69 = awvalid_out; wire _guard70 = _guard68 & _guard69; -wire _guard71 = tdcc_go_out; -wire _guard72 = _guard70 & _guard71; -wire _guard73 = do_aw_transfer_go_out; -wire _guard74 = early_reset_static_par_go_out; +wire _guard71 = ~_guard70; +wire _guard72 = do_aw_transfer_go_out; +wire _guard73 = _guard71 & _guard72; +wire _guard74 = early_reset_static_par_thread_go_out; wire _guard75 = _guard73 | _guard74; -wire _guard76 = AWREADY; -wire _guard77 = awvalid_out; -wire _guard78 = _guard76 & _guard77; -wire _guard79 = do_aw_transfer_go_out; -wire _guard80 = _guard78 & _guard79; -wire _guard81 = AWREADY; -wire _guard82 = awvalid_out; -wire _guard83 = _guard81 & _guard82; -wire _guard84 = ~_guard83; -wire _guard85 = do_aw_transfer_go_out; -wire _guard86 = _guard84 & _guard85; -wire _guard87 = early_reset_static_par_go_out; -wire _guard88 = _guard86 | _guard87; -wire _guard89 = fsm_out == 1'd0; +wire _guard76 = signal_reg_out; +wire _guard77 = _guard0 & _guard0; +wire _guard78 = signal_reg_out; +wire _guard79 = ~_guard78; +wire _guard80 = _guard77 & _guard79; +wire _guard81 = wrapper_early_reset_static_par_thread_go_out; +wire _guard82 = _guard80 & _guard81; +wire _guard83 = _guard76 | _guard82; +wire _guard84 = _guard0 & _guard0; +wire _guard85 = signal_reg_out; +wire _guard86 = ~_guard85; +wire _guard87 = _guard84 & _guard86; +wire _guard88 = wrapper_early_reset_static_par_thread_go_out; +wire _guard89 = _guard87 & _guard88; wire _guard90 = signal_reg_out; -wire _guard91 = _guard89 & _guard90; -wire _guard92 = fsm_out == 1'd0; -wire _guard93 = signal_reg_out; +wire _guard91 = wrapper_early_reset_static_par_thread_go_out; +wire _guard92 = signal_reg_out; +wire _guard93 = aw_handshake_occurred_out; wire _guard94 = ~_guard93; -wire _guard95 = _guard92 & _guard94; -wire _guard96 = wrapper_early_reset_static_par_go_out; -wire _guard97 = _guard95 & _guard96; -wire _guard98 = _guard91 | _guard97; -wire _guard99 = fsm_out == 1'd0; -wire _guard100 = signal_reg_out; -wire _guard101 = ~_guard100; -wire _guard102 = _guard99 & _guard101; -wire _guard103 = wrapper_early_reset_static_par_go_out; -wire _guard104 = _guard102 & _guard103; -wire _guard105 = fsm_out == 1'd0; -wire _guard106 = signal_reg_out; -wire _guard107 = _guard105 & _guard106; -wire _guard108 = aw_handshake_occurred_out; -wire _guard109 = ~_guard108; -wire _guard110 = do_aw_transfer_go_out; +wire _guard95 = do_aw_transfer_go_out; +wire _guard96 = _guard94 & _guard95; +wire _guard97 = early_reset_static_par_thread_go_out; +wire _guard98 = _guard96 | _guard97; +wire _guard99 = awvalid_out; +wire _guard100 = AWREADY; +wire _guard101 = _guard99 & _guard100; +wire _guard102 = do_aw_transfer_go_out; +wire _guard103 = _guard101 & _guard102; +wire _guard104 = early_reset_static_par_thread_go_out; +wire _guard105 = fsm_out == 2'd3; +wire _guard106 = do_aw_transfer_go_out; +wire _guard107 = invoke2_go_out; +wire _guard108 = _guard106 | _guard107; +wire _guard109 = awvalid_out; +wire _guard110 = AWREADY; wire _guard111 = _guard109 & _guard110; -wire _guard112 = early_reset_static_par_go_out; -wire _guard113 = _guard111 | _guard112; -wire _guard114 = awvalid_out; -wire _guard115 = AWREADY; -wire _guard116 = _guard114 & _guard115; -wire _guard117 = do_aw_transfer_go_out; -wire _guard118 = _guard116 & _guard117; -wire _guard119 = early_reset_static_par_go_out; -wire _guard120 = fsm0_out == 2'd3; -wire _guard121 = do_aw_transfer_go_out; -wire _guard122 = invoke2_go_out; -wire _guard123 = _guard121 | _guard122; -wire _guard124 = awvalid_out; -wire _guard125 = AWREADY; -wire _guard126 = _guard124 & _guard125; -wire _guard127 = ~_guard126; -wire _guard128 = aw_handshake_occurred_out; -wire _guard129 = ~_guard128; -wire _guard130 = _guard127 & _guard129; -wire _guard131 = do_aw_transfer_go_out; -wire _guard132 = _guard130 & _guard131; -wire _guard133 = awvalid_out; -wire _guard134 = AWREADY; -wire _guard135 = _guard133 & _guard134; -wire _guard136 = aw_handshake_occurred_out; -wire _guard137 = _guard135 | _guard136; -wire _guard138 = do_aw_transfer_go_out; -wire _guard139 = _guard137 & _guard138; -wire _guard140 = invoke2_go_out; -wire _guard141 = _guard139 | _guard140; -wire _guard142 = wrapper_early_reset_static_par_go_out; +wire _guard112 = ~_guard111; +wire _guard113 = aw_handshake_occurred_out; +wire _guard114 = ~_guard113; +wire _guard115 = _guard112 & _guard114; +wire _guard116 = do_aw_transfer_go_out; +wire _guard117 = _guard115 & _guard116; +wire _guard118 = awvalid_out; +wire _guard119 = AWREADY; +wire _guard120 = _guard118 & _guard119; +wire _guard121 = aw_handshake_occurred_out; +wire _guard122 = _guard120 | _guard121; +wire _guard123 = do_aw_transfer_go_out; +wire _guard124 = _guard122 & _guard123; +wire _guard125 = invoke2_go_out; +wire _guard126 = _guard124 | _guard125; assign done = _guard1; assign AWADDR = _guard2 ? axi_address : @@ -2080,64 +1985,53 @@ assign AWBURST = assign AWLEN = _guard6 ? 8'd0 : 8'd0; -assign fsm_write_en = _guard7; +assign fsm_write_en = _guard25; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard11 ? adder_out : - _guard14 ? 1'd0 : - 1'd0; -assign adder_left = - _guard15 ? fsm_out : - 1'd0; -assign adder_right = _guard16; -assign invoke2_go_in = _guard22; -assign wrapper_early_reset_static_par_go_in = _guard28; -assign wrapper_early_reset_static_par_done_in = _guard31; -assign tdcc_go_in = go; -assign fsm0_write_en = _guard50; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard55 ? 2'd1 : - _guard56 ? 2'd0 : - _guard61 ? 2'd3 : - _guard66 ? 2'd2 : + _guard30 ? 2'd1 : + _guard31 ? 2'd0 : + _guard36 ? 2'd3 : + _guard41 ? 2'd2 : 2'd0; -assign do_aw_transfer_go_in = _guard72; +assign invoke2_go_in = _guard47; +assign wrapper_early_reset_static_par_thread_go_in = _guard53; +assign tdcc_go_in = go; +assign do_aw_transfer_go_in = _guard59; assign do_aw_transfer_done_in = bt_reg_out; -assign early_reset_static_par_done_in = ud_out; -assign bt_reg_write_en = _guard75; +assign bt_reg_write_en = _guard62; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard80 ? 1'd1 : - _guard88 ? 1'd0 : + _guard67 ? 1'd1 : + _guard75 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard98; +assign signal_reg_write_en = _guard83; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard104 ? 1'd1 : - _guard107 ? 1'd0 : + _guard89 ? 1'd1 : + _guard90 ? 1'd0 : 1'd0; assign invoke2_done_in = awvalid_done; -assign aw_handshake_occurred_write_en = _guard113; +assign early_reset_static_par_thread_go_in = _guard91; +assign wrapper_early_reset_static_par_thread_done_in = _guard92; +assign aw_handshake_occurred_write_en = _guard98; assign aw_handshake_occurred_clk = clk; assign aw_handshake_occurred_reset = reset; assign aw_handshake_occurred_in = - _guard118 ? 1'd1 : - _guard119 ? 1'd0 : + _guard103 ? 1'd1 : + _guard104 ? 1'd0 : 'x; -assign tdcc_done_in = _guard120; -assign awvalid_write_en = _guard123; +assign tdcc_done_in = _guard105; +assign awvalid_write_en = _guard108; assign awvalid_clk = clk; assign awvalid_reset = reset; assign awvalid_in = - _guard132 ? 1'd1 : - _guard141 ? 1'd0 : + _guard117 ? 1'd1 : + _guard126 ? 1'd0 : 'x; -assign early_reset_static_par_go_in = _guard142; +assign early_reset_static_par_thread_done_in = ud_out; // COMPONENT END: m_aw_channel_A0 endmodule module m_read_channel_A0( @@ -2456,15 +2350,6 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; logic ud_out; logic signal_reg_in; logic signal_reg_write_en; @@ -2472,24 +2357,24 @@ logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic service_write_transfer_go_in; logic service_write_transfer_go_out; logic service_write_transfer_done_in; logic service_write_transfer_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -2524,23 +2409,6 @@ std_reg # ( .reset(bt_reg_reset), .write_en(bt_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) ) ud ( @@ -2558,13 +2426,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -2580,27 +2448,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) @@ -2618,189 +2486,162 @@ wire _guard0 = 1; wire _guard1 = tdcc_done_out; wire _guard2 = service_write_transfer_go_out; wire _guard3 = service_write_transfer_go_out; -wire _guard4 = early_reset_static_par_go_out; -wire _guard5 = fsm_out == 1'd0; -wire _guard6 = ~_guard5; -wire _guard7 = early_reset_static_par_go_out; -wire _guard8 = _guard6 & _guard7; -wire _guard9 = fsm_out == 1'd0; -wire _guard10 = early_reset_static_par_go_out; -wire _guard11 = _guard9 & _guard10; -wire _guard12 = early_reset_static_par_go_out; -wire _guard13 = early_reset_static_par_go_out; -wire _guard14 = service_write_transfer_go_out; -wire _guard15 = wvalid_out; -wire _guard16 = WREADY; -wire _guard17 = _guard15 & _guard16; -wire _guard18 = ~_guard17; -wire _guard19 = w_handshake_occurred_out; -wire _guard20 = ~_guard19; -wire _guard21 = _guard18 & _guard20; -wire _guard22 = service_write_transfer_go_out; -wire _guard23 = _guard21 & _guard22; -wire _guard24 = wvalid_out; -wire _guard25 = WREADY; -wire _guard26 = _guard24 & _guard25; -wire _guard27 = w_handshake_occurred_out; -wire _guard28 = _guard26 | _guard27; -wire _guard29 = service_write_transfer_go_out; -wire _guard30 = _guard28 & _guard29; -wire _guard31 = wrapper_early_reset_static_par_done_out; -wire _guard32 = ~_guard31; -wire _guard33 = fsm0_out == 2'd0; -wire _guard34 = _guard32 & _guard33; -wire _guard35 = tdcc_go_out; -wire _guard36 = _guard34 & _guard35; -wire _guard37 = fsm_out == 1'd0; -wire _guard38 = signal_reg_out; -wire _guard39 = _guard37 & _guard38; -wire _guard40 = fsm0_out == 2'd2; -wire _guard41 = fsm0_out == 2'd0; -wire _guard42 = wrapper_early_reset_static_par_done_out; +wire _guard4 = fsm_out == 2'd2; +wire _guard5 = fsm_out == 2'd0; +wire _guard6 = wrapper_early_reset_static_par_thread_done_out; +wire _guard7 = _guard5 & _guard6; +wire _guard8 = tdcc_go_out; +wire _guard9 = _guard7 & _guard8; +wire _guard10 = _guard4 | _guard9; +wire _guard11 = fsm_out == 2'd1; +wire _guard12 = service_write_transfer_done_out; +wire _guard13 = _guard11 & _guard12; +wire _guard14 = tdcc_go_out; +wire _guard15 = _guard13 & _guard14; +wire _guard16 = _guard10 | _guard15; +wire _guard17 = fsm_out == 2'd0; +wire _guard18 = wrapper_early_reset_static_par_thread_done_out; +wire _guard19 = _guard17 & _guard18; +wire _guard20 = tdcc_go_out; +wire _guard21 = _guard19 & _guard20; +wire _guard22 = fsm_out == 2'd2; +wire _guard23 = fsm_out == 2'd1; +wire _guard24 = service_write_transfer_done_out; +wire _guard25 = _guard23 & _guard24; +wire _guard26 = tdcc_go_out; +wire _guard27 = _guard25 & _guard26; +wire _guard28 = wrapper_early_reset_static_par_thread_done_out; +wire _guard29 = ~_guard28; +wire _guard30 = fsm_out == 2'd0; +wire _guard31 = _guard29 & _guard30; +wire _guard32 = tdcc_go_out; +wire _guard33 = _guard31 & _guard32; +wire _guard34 = service_write_transfer_go_out; +wire _guard35 = wvalid_out; +wire _guard36 = WREADY; +wire _guard37 = _guard35 & _guard36; +wire _guard38 = ~_guard37; +wire _guard39 = w_handshake_occurred_out; +wire _guard40 = ~_guard39; +wire _guard41 = _guard38 & _guard40; +wire _guard42 = service_write_transfer_go_out; wire _guard43 = _guard41 & _guard42; -wire _guard44 = tdcc_go_out; -wire _guard45 = _guard43 & _guard44; -wire _guard46 = _guard40 | _guard45; -wire _guard47 = fsm0_out == 2'd1; -wire _guard48 = service_write_transfer_done_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = tdcc_go_out; -wire _guard51 = _guard49 & _guard50; -wire _guard52 = _guard46 | _guard51; -wire _guard53 = fsm0_out == 2'd0; -wire _guard54 = wrapper_early_reset_static_par_done_out; -wire _guard55 = _guard53 & _guard54; -wire _guard56 = tdcc_go_out; -wire _guard57 = _guard55 & _guard56; -wire _guard58 = fsm0_out == 2'd2; -wire _guard59 = fsm0_out == 2'd1; -wire _guard60 = service_write_transfer_done_out; -wire _guard61 = _guard59 & _guard60; -wire _guard62 = tdcc_go_out; -wire _guard63 = _guard61 & _guard62; -wire _guard64 = service_write_transfer_done_out; -wire _guard65 = ~_guard64; -wire _guard66 = fsm0_out == 2'd1; +wire _guard44 = wvalid_out; +wire _guard45 = WREADY; +wire _guard46 = _guard44 & _guard45; +wire _guard47 = w_handshake_occurred_out; +wire _guard48 = _guard46 | _guard47; +wire _guard49 = service_write_transfer_go_out; +wire _guard50 = _guard48 & _guard49; +wire _guard51 = service_write_transfer_done_out; +wire _guard52 = ~_guard51; +wire _guard53 = fsm_out == 2'd1; +wire _guard54 = _guard52 & _guard53; +wire _guard55 = tdcc_go_out; +wire _guard56 = _guard54 & _guard55; +wire _guard57 = service_write_transfer_go_out; +wire _guard58 = early_reset_static_par_thread_go_out; +wire _guard59 = _guard57 | _guard58; +wire _guard60 = wvalid_out; +wire _guard61 = WREADY; +wire _guard62 = _guard60 & _guard61; +wire _guard63 = service_write_transfer_go_out; +wire _guard64 = _guard62 & _guard63; +wire _guard65 = wvalid_out; +wire _guard66 = WREADY; wire _guard67 = _guard65 & _guard66; -wire _guard68 = tdcc_go_out; -wire _guard69 = _guard67 & _guard68; -wire _guard70 = service_write_transfer_go_out; -wire _guard71 = early_reset_static_par_go_out; +wire _guard68 = ~_guard67; +wire _guard69 = service_write_transfer_go_out; +wire _guard70 = _guard68 & _guard69; +wire _guard71 = early_reset_static_par_thread_go_out; wire _guard72 = _guard70 | _guard71; -wire _guard73 = wvalid_out; -wire _guard74 = WREADY; -wire _guard75 = _guard73 & _guard74; -wire _guard76 = service_write_transfer_go_out; -wire _guard77 = _guard75 & _guard76; -wire _guard78 = wvalid_out; -wire _guard79 = WREADY; -wire _guard80 = _guard78 & _guard79; -wire _guard81 = ~_guard80; -wire _guard82 = service_write_transfer_go_out; -wire _guard83 = _guard81 & _guard82; -wire _guard84 = early_reset_static_par_go_out; -wire _guard85 = _guard83 | _guard84; -wire _guard86 = fsm_out == 1'd0; +wire _guard73 = signal_reg_out; +wire _guard74 = _guard0 & _guard0; +wire _guard75 = signal_reg_out; +wire _guard76 = ~_guard75; +wire _guard77 = _guard74 & _guard76; +wire _guard78 = wrapper_early_reset_static_par_thread_go_out; +wire _guard79 = _guard77 & _guard78; +wire _guard80 = _guard73 | _guard79; +wire _guard81 = _guard0 & _guard0; +wire _guard82 = signal_reg_out; +wire _guard83 = ~_guard82; +wire _guard84 = _guard81 & _guard83; +wire _guard85 = wrapper_early_reset_static_par_thread_go_out; +wire _guard86 = _guard84 & _guard85; wire _guard87 = signal_reg_out; -wire _guard88 = _guard86 & _guard87; -wire _guard89 = fsm_out == 1'd0; -wire _guard90 = signal_reg_out; +wire _guard88 = wrapper_early_reset_static_par_thread_go_out; +wire _guard89 = signal_reg_out; +wire _guard90 = w_handshake_occurred_out; wire _guard91 = ~_guard90; -wire _guard92 = _guard89 & _guard91; -wire _guard93 = wrapper_early_reset_static_par_go_out; -wire _guard94 = _guard92 & _guard93; -wire _guard95 = _guard88 | _guard94; -wire _guard96 = fsm_out == 1'd0; -wire _guard97 = signal_reg_out; -wire _guard98 = ~_guard97; -wire _guard99 = _guard96 & _guard98; -wire _guard100 = wrapper_early_reset_static_par_go_out; -wire _guard101 = _guard99 & _guard100; -wire _guard102 = fsm_out == 1'd0; -wire _guard103 = signal_reg_out; -wire _guard104 = _guard102 & _guard103; -wire _guard105 = w_handshake_occurred_out; -wire _guard106 = ~_guard105; -wire _guard107 = service_write_transfer_go_out; -wire _guard108 = _guard106 & _guard107; -wire _guard109 = early_reset_static_par_go_out; -wire _guard110 = _guard108 | _guard109; -wire _guard111 = wvalid_out; -wire _guard112 = WREADY; -wire _guard113 = _guard111 & _guard112; -wire _guard114 = service_write_transfer_go_out; -wire _guard115 = _guard113 & _guard114; -wire _guard116 = wvalid_out; -wire _guard117 = WREADY; -wire _guard118 = _guard116 & _guard117; -wire _guard119 = ~_guard118; -wire _guard120 = service_write_transfer_go_out; -wire _guard121 = _guard119 & _guard120; -wire _guard122 = early_reset_static_par_go_out; -wire _guard123 = _guard121 | _guard122; -wire _guard124 = fsm0_out == 2'd2; -wire _guard125 = wrapper_early_reset_static_par_go_out; +wire _guard92 = service_write_transfer_go_out; +wire _guard93 = _guard91 & _guard92; +wire _guard94 = early_reset_static_par_thread_go_out; +wire _guard95 = _guard93 | _guard94; +wire _guard96 = wvalid_out; +wire _guard97 = WREADY; +wire _guard98 = _guard96 & _guard97; +wire _guard99 = service_write_transfer_go_out; +wire _guard100 = _guard98 & _guard99; +wire _guard101 = wvalid_out; +wire _guard102 = WREADY; +wire _guard103 = _guard101 & _guard102; +wire _guard104 = ~_guard103; +wire _guard105 = service_write_transfer_go_out; +wire _guard106 = _guard104 & _guard105; +wire _guard107 = early_reset_static_par_thread_go_out; +wire _guard108 = _guard106 | _guard107; +wire _guard109 = fsm_out == 2'd2; assign done = _guard1; assign WVALID = wvalid_out; assign WDATA = _guard2 ? write_data : 32'd0; assign WLAST = _guard3; -assign fsm_write_en = _guard4; +assign fsm_write_en = _guard16; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard8 ? adder_out : - _guard11 ? 1'd0 : - 1'd0; -assign adder_left = - _guard12 ? fsm_out : - 1'd0; -assign adder_right = _guard13; -assign wvalid_write_en = _guard14; + _guard21 ? 2'd1 : + _guard22 ? 2'd0 : + _guard27 ? 2'd2 : + 2'd0; +assign wrapper_early_reset_static_par_thread_go_in = _guard33; +assign wvalid_write_en = _guard34; assign wvalid_clk = clk; assign wvalid_reset = reset; assign wvalid_in = - _guard23 ? 1'd1 : - _guard30 ? 1'd0 : + _guard43 ? 1'd1 : + _guard50 ? 1'd0 : 'x; -assign wrapper_early_reset_static_par_go_in = _guard36; -assign wrapper_early_reset_static_par_done_in = _guard39; assign tdcc_go_in = go; assign service_write_transfer_done_in = bt_reg_out; -assign fsm0_write_en = _guard52; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard57 ? 2'd1 : - _guard58 ? 2'd0 : - _guard63 ? 2'd2 : - 2'd0; -assign service_write_transfer_go_in = _guard69; -assign early_reset_static_par_done_in = ud_out; -assign bt_reg_write_en = _guard72; +assign service_write_transfer_go_in = _guard56; +assign bt_reg_write_en = _guard59; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard77 ? 1'd1 : - _guard85 ? 1'd0 : + _guard64 ? 1'd1 : + _guard72 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard95; +assign signal_reg_write_en = _guard80; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard101 ? 1'd1 : - _guard104 ? 1'd0 : + _guard86 ? 1'd1 : + _guard87 ? 1'd0 : 1'd0; -assign w_handshake_occurred_write_en = _guard110; +assign early_reset_static_par_thread_go_in = _guard88; +assign wrapper_early_reset_static_par_thread_done_in = _guard89; +assign w_handshake_occurred_write_en = _guard95; assign w_handshake_occurred_clk = clk; assign w_handshake_occurred_reset = reset; assign w_handshake_occurred_in = - _guard115 ? 1'd1 : - _guard123 ? 1'd0 : + _guard100 ? 1'd1 : + _guard108 ? 1'd0 : 'x; -assign tdcc_done_in = _guard124; -assign early_reset_static_par_go_in = _guard125; +assign tdcc_done_in = _guard109; +assign early_reset_static_par_thread_done_in = ud_out; // COMPONENT END: m_write_channel_A0 endmodule module m_bresp_channel_A0( @@ -4061,15 +3902,6 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; logic ud_out; logic signal_reg_in; logic signal_reg_write_en; @@ -4077,12 +3909,12 @@ logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic do_ar_transfer_go_in; logic do_ar_transfer_go_out; logic do_ar_transfer_done_in; @@ -4091,14 +3923,14 @@ logic invoke2_go_in; logic invoke2_go_out; logic invoke2_done_in; logic invoke2_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -4133,23 +3965,6 @@ std_reg # ( .reset(bt_reg_reset), .write_en(bt_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) ) ud ( @@ -4167,13 +3982,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -4201,27 +4016,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) @@ -4238,7 +4053,7 @@ std_wire # ( wire _guard0 = 1; wire _guard1 = do_ar_transfer_done_out; wire _guard2 = ~_guard1; -wire _guard3 = fsm0_out == 2'd1; +wire _guard3 = fsm_out == 2'd1; wire _guard4 = _guard2 & _guard3; wire _guard5 = tdcc_go_out; wire _guard6 = _guard4 & _guard5; @@ -4248,136 +4063,120 @@ wire _guard9 = do_ar_transfer_go_out; wire _guard10 = do_ar_transfer_go_out; wire _guard11 = do_ar_transfer_go_out; wire _guard12 = do_ar_transfer_go_out; -wire _guard13 = early_reset_static_par_go_out; -wire _guard14 = fsm_out == 1'd0; -wire _guard15 = ~_guard14; -wire _guard16 = early_reset_static_par_go_out; -wire _guard17 = _guard15 & _guard16; -wire _guard18 = fsm_out == 1'd0; -wire _guard19 = early_reset_static_par_go_out; -wire _guard20 = _guard18 & _guard19; -wire _guard21 = early_reset_static_par_go_out; -wire _guard22 = early_reset_static_par_go_out; -wire _guard23 = ar_handshake_occurred_out; -wire _guard24 = ~_guard23; -wire _guard25 = do_ar_transfer_go_out; -wire _guard26 = _guard24 & _guard25; -wire _guard27 = early_reset_static_par_go_out; -wire _guard28 = _guard26 | _guard27; -wire _guard29 = arvalid_out; -wire _guard30 = ARREADY; -wire _guard31 = _guard29 & _guard30; -wire _guard32 = do_ar_transfer_go_out; -wire _guard33 = _guard31 & _guard32; -wire _guard34 = early_reset_static_par_go_out; -wire _guard35 = invoke2_done_out; -wire _guard36 = ~_guard35; -wire _guard37 = fsm0_out == 2'd2; -wire _guard38 = _guard36 & _guard37; -wire _guard39 = tdcc_go_out; +wire _guard13 = fsm_out == 2'd3; +wire _guard14 = fsm_out == 2'd0; +wire _guard15 = wrapper_early_reset_static_par_thread_done_out; +wire _guard16 = _guard14 & _guard15; +wire _guard17 = tdcc_go_out; +wire _guard18 = _guard16 & _guard17; +wire _guard19 = _guard13 | _guard18; +wire _guard20 = fsm_out == 2'd1; +wire _guard21 = do_ar_transfer_done_out; +wire _guard22 = _guard20 & _guard21; +wire _guard23 = tdcc_go_out; +wire _guard24 = _guard22 & _guard23; +wire _guard25 = _guard19 | _guard24; +wire _guard26 = fsm_out == 2'd2; +wire _guard27 = invoke2_done_out; +wire _guard28 = _guard26 & _guard27; +wire _guard29 = tdcc_go_out; +wire _guard30 = _guard28 & _guard29; +wire _guard31 = _guard25 | _guard30; +wire _guard32 = fsm_out == 2'd0; +wire _guard33 = wrapper_early_reset_static_par_thread_done_out; +wire _guard34 = _guard32 & _guard33; +wire _guard35 = tdcc_go_out; +wire _guard36 = _guard34 & _guard35; +wire _guard37 = fsm_out == 2'd3; +wire _guard38 = fsm_out == 2'd2; +wire _guard39 = invoke2_done_out; wire _guard40 = _guard38 & _guard39; -wire _guard41 = wrapper_early_reset_static_par_done_out; -wire _guard42 = ~_guard41; -wire _guard43 = fsm0_out == 2'd0; -wire _guard44 = _guard42 & _guard43; -wire _guard45 = tdcc_go_out; -wire _guard46 = _guard44 & _guard45; -wire _guard47 = fsm_out == 1'd0; -wire _guard48 = signal_reg_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = fsm0_out == 2'd3; -wire _guard51 = fsm0_out == 2'd0; -wire _guard52 = wrapper_early_reset_static_par_done_out; -wire _guard53 = _guard51 & _guard52; -wire _guard54 = tdcc_go_out; -wire _guard55 = _guard53 & _guard54; -wire _guard56 = _guard50 | _guard55; -wire _guard57 = fsm0_out == 2'd1; -wire _guard58 = do_ar_transfer_done_out; -wire _guard59 = _guard57 & _guard58; -wire _guard60 = tdcc_go_out; -wire _guard61 = _guard59 & _guard60; -wire _guard62 = _guard56 | _guard61; -wire _guard63 = fsm0_out == 2'd2; -wire _guard64 = invoke2_done_out; +wire _guard41 = tdcc_go_out; +wire _guard42 = _guard40 & _guard41; +wire _guard43 = fsm_out == 2'd1; +wire _guard44 = do_ar_transfer_done_out; +wire _guard45 = _guard43 & _guard44; +wire _guard46 = tdcc_go_out; +wire _guard47 = _guard45 & _guard46; +wire _guard48 = ar_handshake_occurred_out; +wire _guard49 = ~_guard48; +wire _guard50 = do_ar_transfer_go_out; +wire _guard51 = _guard49 & _guard50; +wire _guard52 = early_reset_static_par_thread_go_out; +wire _guard53 = _guard51 | _guard52; +wire _guard54 = arvalid_out; +wire _guard55 = ARREADY; +wire _guard56 = _guard54 & _guard55; +wire _guard57 = do_ar_transfer_go_out; +wire _guard58 = _guard56 & _guard57; +wire _guard59 = early_reset_static_par_thread_go_out; +wire _guard60 = invoke2_done_out; +wire _guard61 = ~_guard60; +wire _guard62 = fsm_out == 2'd2; +wire _guard63 = _guard61 & _guard62; +wire _guard64 = tdcc_go_out; wire _guard65 = _guard63 & _guard64; -wire _guard66 = tdcc_go_out; -wire _guard67 = _guard65 & _guard66; -wire _guard68 = _guard62 | _guard67; -wire _guard69 = fsm0_out == 2'd0; -wire _guard70 = wrapper_early_reset_static_par_done_out; +wire _guard66 = wrapper_early_reset_static_par_thread_done_out; +wire _guard67 = ~_guard66; +wire _guard68 = fsm_out == 2'd0; +wire _guard69 = _guard67 & _guard68; +wire _guard70 = tdcc_go_out; wire _guard71 = _guard69 & _guard70; -wire _guard72 = tdcc_go_out; -wire _guard73 = _guard71 & _guard72; -wire _guard74 = fsm0_out == 2'd3; -wire _guard75 = fsm0_out == 2'd2; -wire _guard76 = invoke2_done_out; +wire _guard72 = do_ar_transfer_go_out; +wire _guard73 = early_reset_static_par_thread_go_out; +wire _guard74 = _guard72 | _guard73; +wire _guard75 = ARREADY; +wire _guard76 = arvalid_out; wire _guard77 = _guard75 & _guard76; -wire _guard78 = tdcc_go_out; +wire _guard78 = do_ar_transfer_go_out; wire _guard79 = _guard77 & _guard78; -wire _guard80 = fsm0_out == 2'd1; -wire _guard81 = do_ar_transfer_done_out; +wire _guard80 = ARREADY; +wire _guard81 = arvalid_out; wire _guard82 = _guard80 & _guard81; -wire _guard83 = tdcc_go_out; -wire _guard84 = _guard82 & _guard83; -wire _guard85 = do_ar_transfer_go_out; -wire _guard86 = early_reset_static_par_go_out; +wire _guard83 = ~_guard82; +wire _guard84 = do_ar_transfer_go_out; +wire _guard85 = _guard83 & _guard84; +wire _guard86 = early_reset_static_par_thread_go_out; wire _guard87 = _guard85 | _guard86; -wire _guard88 = ARREADY; -wire _guard89 = arvalid_out; -wire _guard90 = _guard88 & _guard89; -wire _guard91 = do_ar_transfer_go_out; -wire _guard92 = _guard90 & _guard91; -wire _guard93 = ARREADY; -wire _guard94 = arvalid_out; -wire _guard95 = _guard93 & _guard94; -wire _guard96 = ~_guard95; -wire _guard97 = do_ar_transfer_go_out; -wire _guard98 = _guard96 & _guard97; -wire _guard99 = early_reset_static_par_go_out; -wire _guard100 = _guard98 | _guard99; -wire _guard101 = fsm_out == 1'd0; +wire _guard88 = signal_reg_out; +wire _guard89 = _guard0 & _guard0; +wire _guard90 = signal_reg_out; +wire _guard91 = ~_guard90; +wire _guard92 = _guard89 & _guard91; +wire _guard93 = wrapper_early_reset_static_par_thread_go_out; +wire _guard94 = _guard92 & _guard93; +wire _guard95 = _guard88 | _guard94; +wire _guard96 = _guard0 & _guard0; +wire _guard97 = signal_reg_out; +wire _guard98 = ~_guard97; +wire _guard99 = _guard96 & _guard98; +wire _guard100 = wrapper_early_reset_static_par_thread_go_out; +wire _guard101 = _guard99 & _guard100; wire _guard102 = signal_reg_out; -wire _guard103 = _guard101 & _guard102; -wire _guard104 = fsm_out == 1'd0; -wire _guard105 = signal_reg_out; -wire _guard106 = ~_guard105; -wire _guard107 = _guard104 & _guard106; -wire _guard108 = wrapper_early_reset_static_par_go_out; -wire _guard109 = _guard107 & _guard108; -wire _guard110 = _guard103 | _guard109; -wire _guard111 = fsm_out == 1'd0; -wire _guard112 = signal_reg_out; +wire _guard103 = wrapper_early_reset_static_par_thread_go_out; +wire _guard104 = signal_reg_out; +wire _guard105 = do_ar_transfer_go_out; +wire _guard106 = invoke2_go_out; +wire _guard107 = _guard105 | _guard106; +wire _guard108 = arvalid_out; +wire _guard109 = ARREADY; +wire _guard110 = _guard108 & _guard109; +wire _guard111 = ~_guard110; +wire _guard112 = ar_handshake_occurred_out; wire _guard113 = ~_guard112; wire _guard114 = _guard111 & _guard113; -wire _guard115 = wrapper_early_reset_static_par_go_out; +wire _guard115 = do_ar_transfer_go_out; wire _guard116 = _guard114 & _guard115; -wire _guard117 = fsm_out == 1'd0; -wire _guard118 = signal_reg_out; +wire _guard117 = arvalid_out; +wire _guard118 = ARREADY; wire _guard119 = _guard117 & _guard118; -wire _guard120 = do_ar_transfer_go_out; -wire _guard121 = invoke2_go_out; -wire _guard122 = _guard120 | _guard121; -wire _guard123 = arvalid_out; -wire _guard124 = ARREADY; -wire _guard125 = _guard123 & _guard124; -wire _guard126 = ~_guard125; -wire _guard127 = ar_handshake_occurred_out; -wire _guard128 = ~_guard127; -wire _guard129 = _guard126 & _guard128; -wire _guard130 = do_ar_transfer_go_out; -wire _guard131 = _guard129 & _guard130; -wire _guard132 = arvalid_out; -wire _guard133 = ARREADY; -wire _guard134 = _guard132 & _guard133; -wire _guard135 = ar_handshake_occurred_out; -wire _guard136 = _guard134 | _guard135; -wire _guard137 = do_ar_transfer_go_out; -wire _guard138 = _guard136 & _guard137; -wire _guard139 = invoke2_go_out; -wire _guard140 = _guard138 | _guard139; -wire _guard141 = fsm0_out == 2'd3; -wire _guard142 = wrapper_early_reset_static_par_go_out; +wire _guard120 = ar_handshake_occurred_out; +wire _guard121 = _guard119 | _guard120; +wire _guard122 = do_ar_transfer_go_out; +wire _guard123 = _guard121 & _guard122; +wire _guard124 = invoke2_go_out; +wire _guard125 = _guard123 | _guard124; +wire _guard126 = fsm_out == 2'd3; assign do_ar_transfer_go_in = _guard6; assign done = _guard7; assign ARPROT = @@ -4396,62 +4195,51 @@ assign ARBURST = _guard12 ? 2'd1 : 2'd0; assign ARVALID = arvalid_out; -assign fsm_write_en = _guard13; +assign fsm_write_en = _guard31; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard17 ? adder_out : - _guard20 ? 1'd0 : - 1'd0; -assign adder_left = - _guard21 ? fsm_out : - 1'd0; -assign adder_right = _guard22; -assign ar_handshake_occurred_write_en = _guard28; + _guard36 ? 2'd1 : + _guard37 ? 2'd0 : + _guard42 ? 2'd3 : + _guard47 ? 2'd2 : + 2'd0; +assign ar_handshake_occurred_write_en = _guard53; assign ar_handshake_occurred_clk = clk; assign ar_handshake_occurred_reset = reset; assign ar_handshake_occurred_in = - _guard33 ? 1'd1 : - _guard34 ? 1'd0 : + _guard58 ? 1'd1 : + _guard59 ? 1'd0 : 'x; -assign invoke2_go_in = _guard40; -assign wrapper_early_reset_static_par_go_in = _guard46; -assign wrapper_early_reset_static_par_done_in = _guard49; +assign invoke2_go_in = _guard65; +assign wrapper_early_reset_static_par_thread_go_in = _guard71; assign tdcc_go_in = go; -assign fsm0_write_en = _guard68; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard73 ? 2'd1 : - _guard74 ? 2'd0 : - _guard79 ? 2'd3 : - _guard84 ? 2'd2 : - 2'd0; -assign early_reset_static_par_done_in = ud_out; -assign bt_reg_write_en = _guard87; +assign bt_reg_write_en = _guard74; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard92 ? 1'd1 : - _guard100 ? 1'd0 : + _guard79 ? 1'd1 : + _guard87 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard110; +assign signal_reg_write_en = _guard95; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard116 ? 1'd1 : - _guard119 ? 1'd0 : + _guard101 ? 1'd1 : + _guard102 ? 1'd0 : 1'd0; assign invoke2_done_in = arvalid_done; -assign arvalid_write_en = _guard122; +assign early_reset_static_par_thread_go_in = _guard103; +assign wrapper_early_reset_static_par_thread_done_in = _guard104; +assign arvalid_write_en = _guard107; assign arvalid_clk = clk; assign arvalid_reset = reset; assign arvalid_in = - _guard131 ? 1'd1 : - _guard140 ? 1'd0 : + _guard116 ? 1'd1 : + _guard125 ? 1'd0 : 'x; -assign tdcc_done_in = _guard141; -assign early_reset_static_par_go_in = _guard142; +assign tdcc_done_in = _guard126; +assign early_reset_static_par_thread_done_in = ud_out; assign do_ar_transfer_done_in = bt_reg_out; // COMPONENT END: m_ar_channel_B0 endmodule @@ -4489,15 +4277,6 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; logic ud_out; logic signal_reg_in; logic signal_reg_write_en; @@ -4505,12 +4284,12 @@ logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic do_aw_transfer_go_in; logic do_aw_transfer_go_out; logic do_aw_transfer_done_in; @@ -4519,14 +4298,14 @@ logic invoke2_go_in; logic invoke2_go_out; logic invoke2_done_in; logic invoke2_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -4561,23 +4340,6 @@ std_reg # ( .reset(bt_reg_reset), .write_en(bt_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) ) ud ( @@ -4595,13 +4357,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -4629,27 +4391,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) @@ -4670,142 +4432,126 @@ wire _guard3 = do_aw_transfer_go_out; wire _guard4 = do_aw_transfer_go_out; wire _guard5 = do_aw_transfer_go_out; wire _guard6 = do_aw_transfer_go_out; -wire _guard7 = early_reset_static_par_go_out; -wire _guard8 = fsm_out == 1'd0; -wire _guard9 = ~_guard8; -wire _guard10 = early_reset_static_par_go_out; -wire _guard11 = _guard9 & _guard10; -wire _guard12 = fsm_out == 1'd0; -wire _guard13 = early_reset_static_par_go_out; -wire _guard14 = _guard12 & _guard13; -wire _guard15 = early_reset_static_par_go_out; -wire _guard16 = early_reset_static_par_go_out; -wire _guard17 = invoke2_done_out; -wire _guard18 = ~_guard17; -wire _guard19 = fsm0_out == 2'd2; -wire _guard20 = _guard18 & _guard19; -wire _guard21 = tdcc_go_out; +wire _guard7 = fsm_out == 2'd3; +wire _guard8 = fsm_out == 2'd0; +wire _guard9 = wrapper_early_reset_static_par_thread_done_out; +wire _guard10 = _guard8 & _guard9; +wire _guard11 = tdcc_go_out; +wire _guard12 = _guard10 & _guard11; +wire _guard13 = _guard7 | _guard12; +wire _guard14 = fsm_out == 2'd1; +wire _guard15 = do_aw_transfer_done_out; +wire _guard16 = _guard14 & _guard15; +wire _guard17 = tdcc_go_out; +wire _guard18 = _guard16 & _guard17; +wire _guard19 = _guard13 | _guard18; +wire _guard20 = fsm_out == 2'd2; +wire _guard21 = invoke2_done_out; wire _guard22 = _guard20 & _guard21; -wire _guard23 = wrapper_early_reset_static_par_done_out; -wire _guard24 = ~_guard23; -wire _guard25 = fsm0_out == 2'd0; -wire _guard26 = _guard24 & _guard25; -wire _guard27 = tdcc_go_out; +wire _guard23 = tdcc_go_out; +wire _guard24 = _guard22 & _guard23; +wire _guard25 = _guard19 | _guard24; +wire _guard26 = fsm_out == 2'd0; +wire _guard27 = wrapper_early_reset_static_par_thread_done_out; wire _guard28 = _guard26 & _guard27; -wire _guard29 = fsm_out == 1'd0; -wire _guard30 = signal_reg_out; -wire _guard31 = _guard29 & _guard30; -wire _guard32 = fsm0_out == 2'd3; -wire _guard33 = fsm0_out == 2'd0; -wire _guard34 = wrapper_early_reset_static_par_done_out; -wire _guard35 = _guard33 & _guard34; -wire _guard36 = tdcc_go_out; -wire _guard37 = _guard35 & _guard36; -wire _guard38 = _guard32 | _guard37; -wire _guard39 = fsm0_out == 2'd1; -wire _guard40 = do_aw_transfer_done_out; +wire _guard29 = tdcc_go_out; +wire _guard30 = _guard28 & _guard29; +wire _guard31 = fsm_out == 2'd3; +wire _guard32 = fsm_out == 2'd2; +wire _guard33 = invoke2_done_out; +wire _guard34 = _guard32 & _guard33; +wire _guard35 = tdcc_go_out; +wire _guard36 = _guard34 & _guard35; +wire _guard37 = fsm_out == 2'd1; +wire _guard38 = do_aw_transfer_done_out; +wire _guard39 = _guard37 & _guard38; +wire _guard40 = tdcc_go_out; wire _guard41 = _guard39 & _guard40; -wire _guard42 = tdcc_go_out; -wire _guard43 = _guard41 & _guard42; -wire _guard44 = _guard38 | _guard43; -wire _guard45 = fsm0_out == 2'd2; -wire _guard46 = invoke2_done_out; +wire _guard42 = invoke2_done_out; +wire _guard43 = ~_guard42; +wire _guard44 = fsm_out == 2'd2; +wire _guard45 = _guard43 & _guard44; +wire _guard46 = tdcc_go_out; wire _guard47 = _guard45 & _guard46; -wire _guard48 = tdcc_go_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = _guard44 | _guard49; -wire _guard51 = fsm0_out == 2'd0; -wire _guard52 = wrapper_early_reset_static_par_done_out; +wire _guard48 = wrapper_early_reset_static_par_thread_done_out; +wire _guard49 = ~_guard48; +wire _guard50 = fsm_out == 2'd0; +wire _guard51 = _guard49 & _guard50; +wire _guard52 = tdcc_go_out; wire _guard53 = _guard51 & _guard52; -wire _guard54 = tdcc_go_out; -wire _guard55 = _guard53 & _guard54; -wire _guard56 = fsm0_out == 2'd3; -wire _guard57 = fsm0_out == 2'd2; -wire _guard58 = invoke2_done_out; +wire _guard54 = do_aw_transfer_done_out; +wire _guard55 = ~_guard54; +wire _guard56 = fsm_out == 2'd1; +wire _guard57 = _guard55 & _guard56; +wire _guard58 = tdcc_go_out; wire _guard59 = _guard57 & _guard58; -wire _guard60 = tdcc_go_out; -wire _guard61 = _guard59 & _guard60; -wire _guard62 = fsm0_out == 2'd1; -wire _guard63 = do_aw_transfer_done_out; -wire _guard64 = _guard62 & _guard63; -wire _guard65 = tdcc_go_out; -wire _guard66 = _guard64 & _guard65; -wire _guard67 = do_aw_transfer_done_out; -wire _guard68 = ~_guard67; -wire _guard69 = fsm0_out == 2'd1; +wire _guard60 = do_aw_transfer_go_out; +wire _guard61 = early_reset_static_par_thread_go_out; +wire _guard62 = _guard60 | _guard61; +wire _guard63 = AWREADY; +wire _guard64 = awvalid_out; +wire _guard65 = _guard63 & _guard64; +wire _guard66 = do_aw_transfer_go_out; +wire _guard67 = _guard65 & _guard66; +wire _guard68 = AWREADY; +wire _guard69 = awvalid_out; wire _guard70 = _guard68 & _guard69; -wire _guard71 = tdcc_go_out; -wire _guard72 = _guard70 & _guard71; -wire _guard73 = do_aw_transfer_go_out; -wire _guard74 = early_reset_static_par_go_out; +wire _guard71 = ~_guard70; +wire _guard72 = do_aw_transfer_go_out; +wire _guard73 = _guard71 & _guard72; +wire _guard74 = early_reset_static_par_thread_go_out; wire _guard75 = _guard73 | _guard74; -wire _guard76 = AWREADY; -wire _guard77 = awvalid_out; -wire _guard78 = _guard76 & _guard77; -wire _guard79 = do_aw_transfer_go_out; -wire _guard80 = _guard78 & _guard79; -wire _guard81 = AWREADY; -wire _guard82 = awvalid_out; -wire _guard83 = _guard81 & _guard82; -wire _guard84 = ~_guard83; -wire _guard85 = do_aw_transfer_go_out; -wire _guard86 = _guard84 & _guard85; -wire _guard87 = early_reset_static_par_go_out; -wire _guard88 = _guard86 | _guard87; -wire _guard89 = fsm_out == 1'd0; +wire _guard76 = signal_reg_out; +wire _guard77 = _guard0 & _guard0; +wire _guard78 = signal_reg_out; +wire _guard79 = ~_guard78; +wire _guard80 = _guard77 & _guard79; +wire _guard81 = wrapper_early_reset_static_par_thread_go_out; +wire _guard82 = _guard80 & _guard81; +wire _guard83 = _guard76 | _guard82; +wire _guard84 = _guard0 & _guard0; +wire _guard85 = signal_reg_out; +wire _guard86 = ~_guard85; +wire _guard87 = _guard84 & _guard86; +wire _guard88 = wrapper_early_reset_static_par_thread_go_out; +wire _guard89 = _guard87 & _guard88; wire _guard90 = signal_reg_out; -wire _guard91 = _guard89 & _guard90; -wire _guard92 = fsm_out == 1'd0; -wire _guard93 = signal_reg_out; +wire _guard91 = wrapper_early_reset_static_par_thread_go_out; +wire _guard92 = signal_reg_out; +wire _guard93 = aw_handshake_occurred_out; wire _guard94 = ~_guard93; -wire _guard95 = _guard92 & _guard94; -wire _guard96 = wrapper_early_reset_static_par_go_out; -wire _guard97 = _guard95 & _guard96; -wire _guard98 = _guard91 | _guard97; -wire _guard99 = fsm_out == 1'd0; -wire _guard100 = signal_reg_out; -wire _guard101 = ~_guard100; -wire _guard102 = _guard99 & _guard101; -wire _guard103 = wrapper_early_reset_static_par_go_out; -wire _guard104 = _guard102 & _guard103; -wire _guard105 = fsm_out == 1'd0; -wire _guard106 = signal_reg_out; -wire _guard107 = _guard105 & _guard106; -wire _guard108 = aw_handshake_occurred_out; -wire _guard109 = ~_guard108; -wire _guard110 = do_aw_transfer_go_out; +wire _guard95 = do_aw_transfer_go_out; +wire _guard96 = _guard94 & _guard95; +wire _guard97 = early_reset_static_par_thread_go_out; +wire _guard98 = _guard96 | _guard97; +wire _guard99 = awvalid_out; +wire _guard100 = AWREADY; +wire _guard101 = _guard99 & _guard100; +wire _guard102 = do_aw_transfer_go_out; +wire _guard103 = _guard101 & _guard102; +wire _guard104 = early_reset_static_par_thread_go_out; +wire _guard105 = fsm_out == 2'd3; +wire _guard106 = do_aw_transfer_go_out; +wire _guard107 = invoke2_go_out; +wire _guard108 = _guard106 | _guard107; +wire _guard109 = awvalid_out; +wire _guard110 = AWREADY; wire _guard111 = _guard109 & _guard110; -wire _guard112 = early_reset_static_par_go_out; -wire _guard113 = _guard111 | _guard112; -wire _guard114 = awvalid_out; -wire _guard115 = AWREADY; -wire _guard116 = _guard114 & _guard115; -wire _guard117 = do_aw_transfer_go_out; -wire _guard118 = _guard116 & _guard117; -wire _guard119 = early_reset_static_par_go_out; -wire _guard120 = fsm0_out == 2'd3; -wire _guard121 = do_aw_transfer_go_out; -wire _guard122 = invoke2_go_out; -wire _guard123 = _guard121 | _guard122; -wire _guard124 = awvalid_out; -wire _guard125 = AWREADY; -wire _guard126 = _guard124 & _guard125; -wire _guard127 = ~_guard126; -wire _guard128 = aw_handshake_occurred_out; -wire _guard129 = ~_guard128; -wire _guard130 = _guard127 & _guard129; -wire _guard131 = do_aw_transfer_go_out; -wire _guard132 = _guard130 & _guard131; -wire _guard133 = awvalid_out; -wire _guard134 = AWREADY; -wire _guard135 = _guard133 & _guard134; -wire _guard136 = aw_handshake_occurred_out; -wire _guard137 = _guard135 | _guard136; -wire _guard138 = do_aw_transfer_go_out; -wire _guard139 = _guard137 & _guard138; -wire _guard140 = invoke2_go_out; -wire _guard141 = _guard139 | _guard140; -wire _guard142 = wrapper_early_reset_static_par_go_out; +wire _guard112 = ~_guard111; +wire _guard113 = aw_handshake_occurred_out; +wire _guard114 = ~_guard113; +wire _guard115 = _guard112 & _guard114; +wire _guard116 = do_aw_transfer_go_out; +wire _guard117 = _guard115 & _guard116; +wire _guard118 = awvalid_out; +wire _guard119 = AWREADY; +wire _guard120 = _guard118 & _guard119; +wire _guard121 = aw_handshake_occurred_out; +wire _guard122 = _guard120 | _guard121; +wire _guard123 = do_aw_transfer_go_out; +wire _guard124 = _guard122 & _guard123; +wire _guard125 = invoke2_go_out; +wire _guard126 = _guard124 | _guard125; assign done = _guard1; assign AWADDR = _guard2 ? axi_address : @@ -4823,64 +4569,53 @@ assign AWBURST = assign AWLEN = _guard6 ? 8'd0 : 8'd0; -assign fsm_write_en = _guard7; +assign fsm_write_en = _guard25; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard11 ? adder_out : - _guard14 ? 1'd0 : - 1'd0; -assign adder_left = - _guard15 ? fsm_out : - 1'd0; -assign adder_right = _guard16; -assign invoke2_go_in = _guard22; -assign wrapper_early_reset_static_par_go_in = _guard28; -assign wrapper_early_reset_static_par_done_in = _guard31; -assign tdcc_go_in = go; -assign fsm0_write_en = _guard50; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard55 ? 2'd1 : - _guard56 ? 2'd0 : - _guard61 ? 2'd3 : - _guard66 ? 2'd2 : + _guard30 ? 2'd1 : + _guard31 ? 2'd0 : + _guard36 ? 2'd3 : + _guard41 ? 2'd2 : 2'd0; -assign do_aw_transfer_go_in = _guard72; +assign invoke2_go_in = _guard47; +assign wrapper_early_reset_static_par_thread_go_in = _guard53; +assign tdcc_go_in = go; +assign do_aw_transfer_go_in = _guard59; assign do_aw_transfer_done_in = bt_reg_out; -assign early_reset_static_par_done_in = ud_out; -assign bt_reg_write_en = _guard75; +assign bt_reg_write_en = _guard62; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard80 ? 1'd1 : - _guard88 ? 1'd0 : + _guard67 ? 1'd1 : + _guard75 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard98; +assign signal_reg_write_en = _guard83; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard104 ? 1'd1 : - _guard107 ? 1'd0 : + _guard89 ? 1'd1 : + _guard90 ? 1'd0 : 1'd0; assign invoke2_done_in = awvalid_done; -assign aw_handshake_occurred_write_en = _guard113; +assign early_reset_static_par_thread_go_in = _guard91; +assign wrapper_early_reset_static_par_thread_done_in = _guard92; +assign aw_handshake_occurred_write_en = _guard98; assign aw_handshake_occurred_clk = clk; assign aw_handshake_occurred_reset = reset; assign aw_handshake_occurred_in = - _guard118 ? 1'd1 : - _guard119 ? 1'd0 : + _guard103 ? 1'd1 : + _guard104 ? 1'd0 : 'x; -assign tdcc_done_in = _guard120; -assign awvalid_write_en = _guard123; +assign tdcc_done_in = _guard105; +assign awvalid_write_en = _guard108; assign awvalid_clk = clk; assign awvalid_reset = reset; assign awvalid_in = - _guard132 ? 1'd1 : - _guard141 ? 1'd0 : + _guard117 ? 1'd1 : + _guard126 ? 1'd0 : 'x; -assign early_reset_static_par_go_in = _guard142; +assign early_reset_static_par_thread_done_in = ud_out; // COMPONENT END: m_aw_channel_B0 endmodule module m_read_channel_B0( @@ -5199,15 +4934,6 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; logic ud_out; logic signal_reg_in; logic signal_reg_write_en; @@ -5215,24 +4941,24 @@ logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic service_write_transfer_go_in; logic service_write_transfer_go_out; logic service_write_transfer_done_in; logic service_write_transfer_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -5267,23 +4993,6 @@ std_reg # ( .reset(bt_reg_reset), .write_en(bt_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) ) ud ( @@ -5301,13 +5010,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -5323,27 +5032,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) @@ -5361,189 +5070,162 @@ wire _guard0 = 1; wire _guard1 = tdcc_done_out; wire _guard2 = service_write_transfer_go_out; wire _guard3 = service_write_transfer_go_out; -wire _guard4 = early_reset_static_par_go_out; -wire _guard5 = fsm_out == 1'd0; -wire _guard6 = ~_guard5; -wire _guard7 = early_reset_static_par_go_out; -wire _guard8 = _guard6 & _guard7; -wire _guard9 = fsm_out == 1'd0; -wire _guard10 = early_reset_static_par_go_out; -wire _guard11 = _guard9 & _guard10; -wire _guard12 = early_reset_static_par_go_out; -wire _guard13 = early_reset_static_par_go_out; -wire _guard14 = service_write_transfer_go_out; -wire _guard15 = wvalid_out; -wire _guard16 = WREADY; -wire _guard17 = _guard15 & _guard16; -wire _guard18 = ~_guard17; -wire _guard19 = w_handshake_occurred_out; -wire _guard20 = ~_guard19; -wire _guard21 = _guard18 & _guard20; -wire _guard22 = service_write_transfer_go_out; -wire _guard23 = _guard21 & _guard22; -wire _guard24 = wvalid_out; -wire _guard25 = WREADY; -wire _guard26 = _guard24 & _guard25; -wire _guard27 = w_handshake_occurred_out; -wire _guard28 = _guard26 | _guard27; -wire _guard29 = service_write_transfer_go_out; -wire _guard30 = _guard28 & _guard29; -wire _guard31 = wrapper_early_reset_static_par_done_out; -wire _guard32 = ~_guard31; -wire _guard33 = fsm0_out == 2'd0; -wire _guard34 = _guard32 & _guard33; -wire _guard35 = tdcc_go_out; -wire _guard36 = _guard34 & _guard35; -wire _guard37 = fsm_out == 1'd0; -wire _guard38 = signal_reg_out; -wire _guard39 = _guard37 & _guard38; -wire _guard40 = fsm0_out == 2'd2; -wire _guard41 = fsm0_out == 2'd0; -wire _guard42 = wrapper_early_reset_static_par_done_out; +wire _guard4 = fsm_out == 2'd2; +wire _guard5 = fsm_out == 2'd0; +wire _guard6 = wrapper_early_reset_static_par_thread_done_out; +wire _guard7 = _guard5 & _guard6; +wire _guard8 = tdcc_go_out; +wire _guard9 = _guard7 & _guard8; +wire _guard10 = _guard4 | _guard9; +wire _guard11 = fsm_out == 2'd1; +wire _guard12 = service_write_transfer_done_out; +wire _guard13 = _guard11 & _guard12; +wire _guard14 = tdcc_go_out; +wire _guard15 = _guard13 & _guard14; +wire _guard16 = _guard10 | _guard15; +wire _guard17 = fsm_out == 2'd0; +wire _guard18 = wrapper_early_reset_static_par_thread_done_out; +wire _guard19 = _guard17 & _guard18; +wire _guard20 = tdcc_go_out; +wire _guard21 = _guard19 & _guard20; +wire _guard22 = fsm_out == 2'd2; +wire _guard23 = fsm_out == 2'd1; +wire _guard24 = service_write_transfer_done_out; +wire _guard25 = _guard23 & _guard24; +wire _guard26 = tdcc_go_out; +wire _guard27 = _guard25 & _guard26; +wire _guard28 = wrapper_early_reset_static_par_thread_done_out; +wire _guard29 = ~_guard28; +wire _guard30 = fsm_out == 2'd0; +wire _guard31 = _guard29 & _guard30; +wire _guard32 = tdcc_go_out; +wire _guard33 = _guard31 & _guard32; +wire _guard34 = service_write_transfer_go_out; +wire _guard35 = wvalid_out; +wire _guard36 = WREADY; +wire _guard37 = _guard35 & _guard36; +wire _guard38 = ~_guard37; +wire _guard39 = w_handshake_occurred_out; +wire _guard40 = ~_guard39; +wire _guard41 = _guard38 & _guard40; +wire _guard42 = service_write_transfer_go_out; wire _guard43 = _guard41 & _guard42; -wire _guard44 = tdcc_go_out; -wire _guard45 = _guard43 & _guard44; -wire _guard46 = _guard40 | _guard45; -wire _guard47 = fsm0_out == 2'd1; -wire _guard48 = service_write_transfer_done_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = tdcc_go_out; -wire _guard51 = _guard49 & _guard50; -wire _guard52 = _guard46 | _guard51; -wire _guard53 = fsm0_out == 2'd0; -wire _guard54 = wrapper_early_reset_static_par_done_out; -wire _guard55 = _guard53 & _guard54; -wire _guard56 = tdcc_go_out; -wire _guard57 = _guard55 & _guard56; -wire _guard58 = fsm0_out == 2'd2; -wire _guard59 = fsm0_out == 2'd1; -wire _guard60 = service_write_transfer_done_out; -wire _guard61 = _guard59 & _guard60; -wire _guard62 = tdcc_go_out; -wire _guard63 = _guard61 & _guard62; -wire _guard64 = service_write_transfer_done_out; -wire _guard65 = ~_guard64; -wire _guard66 = fsm0_out == 2'd1; +wire _guard44 = wvalid_out; +wire _guard45 = WREADY; +wire _guard46 = _guard44 & _guard45; +wire _guard47 = w_handshake_occurred_out; +wire _guard48 = _guard46 | _guard47; +wire _guard49 = service_write_transfer_go_out; +wire _guard50 = _guard48 & _guard49; +wire _guard51 = service_write_transfer_done_out; +wire _guard52 = ~_guard51; +wire _guard53 = fsm_out == 2'd1; +wire _guard54 = _guard52 & _guard53; +wire _guard55 = tdcc_go_out; +wire _guard56 = _guard54 & _guard55; +wire _guard57 = service_write_transfer_go_out; +wire _guard58 = early_reset_static_par_thread_go_out; +wire _guard59 = _guard57 | _guard58; +wire _guard60 = wvalid_out; +wire _guard61 = WREADY; +wire _guard62 = _guard60 & _guard61; +wire _guard63 = service_write_transfer_go_out; +wire _guard64 = _guard62 & _guard63; +wire _guard65 = wvalid_out; +wire _guard66 = WREADY; wire _guard67 = _guard65 & _guard66; -wire _guard68 = tdcc_go_out; -wire _guard69 = _guard67 & _guard68; -wire _guard70 = service_write_transfer_go_out; -wire _guard71 = early_reset_static_par_go_out; +wire _guard68 = ~_guard67; +wire _guard69 = service_write_transfer_go_out; +wire _guard70 = _guard68 & _guard69; +wire _guard71 = early_reset_static_par_thread_go_out; wire _guard72 = _guard70 | _guard71; -wire _guard73 = wvalid_out; -wire _guard74 = WREADY; -wire _guard75 = _guard73 & _guard74; -wire _guard76 = service_write_transfer_go_out; -wire _guard77 = _guard75 & _guard76; -wire _guard78 = wvalid_out; -wire _guard79 = WREADY; -wire _guard80 = _guard78 & _guard79; -wire _guard81 = ~_guard80; -wire _guard82 = service_write_transfer_go_out; -wire _guard83 = _guard81 & _guard82; -wire _guard84 = early_reset_static_par_go_out; -wire _guard85 = _guard83 | _guard84; -wire _guard86 = fsm_out == 1'd0; +wire _guard73 = signal_reg_out; +wire _guard74 = _guard0 & _guard0; +wire _guard75 = signal_reg_out; +wire _guard76 = ~_guard75; +wire _guard77 = _guard74 & _guard76; +wire _guard78 = wrapper_early_reset_static_par_thread_go_out; +wire _guard79 = _guard77 & _guard78; +wire _guard80 = _guard73 | _guard79; +wire _guard81 = _guard0 & _guard0; +wire _guard82 = signal_reg_out; +wire _guard83 = ~_guard82; +wire _guard84 = _guard81 & _guard83; +wire _guard85 = wrapper_early_reset_static_par_thread_go_out; +wire _guard86 = _guard84 & _guard85; wire _guard87 = signal_reg_out; -wire _guard88 = _guard86 & _guard87; -wire _guard89 = fsm_out == 1'd0; -wire _guard90 = signal_reg_out; +wire _guard88 = wrapper_early_reset_static_par_thread_go_out; +wire _guard89 = signal_reg_out; +wire _guard90 = w_handshake_occurred_out; wire _guard91 = ~_guard90; -wire _guard92 = _guard89 & _guard91; -wire _guard93 = wrapper_early_reset_static_par_go_out; -wire _guard94 = _guard92 & _guard93; -wire _guard95 = _guard88 | _guard94; -wire _guard96 = fsm_out == 1'd0; -wire _guard97 = signal_reg_out; -wire _guard98 = ~_guard97; -wire _guard99 = _guard96 & _guard98; -wire _guard100 = wrapper_early_reset_static_par_go_out; -wire _guard101 = _guard99 & _guard100; -wire _guard102 = fsm_out == 1'd0; -wire _guard103 = signal_reg_out; -wire _guard104 = _guard102 & _guard103; -wire _guard105 = w_handshake_occurred_out; -wire _guard106 = ~_guard105; -wire _guard107 = service_write_transfer_go_out; -wire _guard108 = _guard106 & _guard107; -wire _guard109 = early_reset_static_par_go_out; -wire _guard110 = _guard108 | _guard109; -wire _guard111 = wvalid_out; -wire _guard112 = WREADY; -wire _guard113 = _guard111 & _guard112; -wire _guard114 = service_write_transfer_go_out; -wire _guard115 = _guard113 & _guard114; -wire _guard116 = wvalid_out; -wire _guard117 = WREADY; -wire _guard118 = _guard116 & _guard117; -wire _guard119 = ~_guard118; -wire _guard120 = service_write_transfer_go_out; -wire _guard121 = _guard119 & _guard120; -wire _guard122 = early_reset_static_par_go_out; -wire _guard123 = _guard121 | _guard122; -wire _guard124 = fsm0_out == 2'd2; -wire _guard125 = wrapper_early_reset_static_par_go_out; +wire _guard92 = service_write_transfer_go_out; +wire _guard93 = _guard91 & _guard92; +wire _guard94 = early_reset_static_par_thread_go_out; +wire _guard95 = _guard93 | _guard94; +wire _guard96 = wvalid_out; +wire _guard97 = WREADY; +wire _guard98 = _guard96 & _guard97; +wire _guard99 = service_write_transfer_go_out; +wire _guard100 = _guard98 & _guard99; +wire _guard101 = wvalid_out; +wire _guard102 = WREADY; +wire _guard103 = _guard101 & _guard102; +wire _guard104 = ~_guard103; +wire _guard105 = service_write_transfer_go_out; +wire _guard106 = _guard104 & _guard105; +wire _guard107 = early_reset_static_par_thread_go_out; +wire _guard108 = _guard106 | _guard107; +wire _guard109 = fsm_out == 2'd2; assign done = _guard1; assign WVALID = wvalid_out; assign WDATA = _guard2 ? write_data : 32'd0; assign WLAST = _guard3; -assign fsm_write_en = _guard4; +assign fsm_write_en = _guard16; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard8 ? adder_out : - _guard11 ? 1'd0 : - 1'd0; -assign adder_left = - _guard12 ? fsm_out : - 1'd0; -assign adder_right = _guard13; -assign wvalid_write_en = _guard14; + _guard21 ? 2'd1 : + _guard22 ? 2'd0 : + _guard27 ? 2'd2 : + 2'd0; +assign wrapper_early_reset_static_par_thread_go_in = _guard33; +assign wvalid_write_en = _guard34; assign wvalid_clk = clk; assign wvalid_reset = reset; assign wvalid_in = - _guard23 ? 1'd1 : - _guard30 ? 1'd0 : + _guard43 ? 1'd1 : + _guard50 ? 1'd0 : 'x; -assign wrapper_early_reset_static_par_go_in = _guard36; -assign wrapper_early_reset_static_par_done_in = _guard39; assign tdcc_go_in = go; assign service_write_transfer_done_in = bt_reg_out; -assign fsm0_write_en = _guard52; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard57 ? 2'd1 : - _guard58 ? 2'd0 : - _guard63 ? 2'd2 : - 2'd0; -assign service_write_transfer_go_in = _guard69; -assign early_reset_static_par_done_in = ud_out; -assign bt_reg_write_en = _guard72; +assign service_write_transfer_go_in = _guard56; +assign bt_reg_write_en = _guard59; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard77 ? 1'd1 : - _guard85 ? 1'd0 : + _guard64 ? 1'd1 : + _guard72 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard95; +assign signal_reg_write_en = _guard80; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard101 ? 1'd1 : - _guard104 ? 1'd0 : + _guard86 ? 1'd1 : + _guard87 ? 1'd0 : 1'd0; -assign w_handshake_occurred_write_en = _guard110; +assign early_reset_static_par_thread_go_in = _guard88; +assign wrapper_early_reset_static_par_thread_done_in = _guard89; +assign w_handshake_occurred_write_en = _guard95; assign w_handshake_occurred_clk = clk; assign w_handshake_occurred_reset = reset; assign w_handshake_occurred_in = - _guard115 ? 1'd1 : - _guard123 ? 1'd0 : + _guard100 ? 1'd1 : + _guard108 ? 1'd0 : 'x; -assign tdcc_done_in = _guard124; -assign early_reset_static_par_go_in = _guard125; +assign tdcc_done_in = _guard109; +assign early_reset_static_par_thread_done_in = ud_out; // COMPONENT END: m_write_channel_B0 endmodule module m_bresp_channel_B0( @@ -6804,15 +6486,6 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; logic ud_out; logic signal_reg_in; logic signal_reg_write_en; @@ -6820,12 +6493,12 @@ logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic do_ar_transfer_go_in; logic do_ar_transfer_go_out; logic do_ar_transfer_done_in; @@ -6834,14 +6507,14 @@ logic invoke2_go_in; logic invoke2_go_out; logic invoke2_done_in; logic invoke2_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -6876,23 +6549,6 @@ std_reg # ( .reset(bt_reg_reset), .write_en(bt_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) ) ud ( @@ -6910,13 +6566,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -6944,27 +6600,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) @@ -6981,7 +6637,7 @@ std_wire # ( wire _guard0 = 1; wire _guard1 = do_ar_transfer_done_out; wire _guard2 = ~_guard1; -wire _guard3 = fsm0_out == 2'd1; +wire _guard3 = fsm_out == 2'd1; wire _guard4 = _guard2 & _guard3; wire _guard5 = tdcc_go_out; wire _guard6 = _guard4 & _guard5; @@ -6991,136 +6647,120 @@ wire _guard9 = do_ar_transfer_go_out; wire _guard10 = do_ar_transfer_go_out; wire _guard11 = do_ar_transfer_go_out; wire _guard12 = do_ar_transfer_go_out; -wire _guard13 = early_reset_static_par_go_out; -wire _guard14 = fsm_out == 1'd0; -wire _guard15 = ~_guard14; -wire _guard16 = early_reset_static_par_go_out; -wire _guard17 = _guard15 & _guard16; -wire _guard18 = fsm_out == 1'd0; -wire _guard19 = early_reset_static_par_go_out; -wire _guard20 = _guard18 & _guard19; -wire _guard21 = early_reset_static_par_go_out; -wire _guard22 = early_reset_static_par_go_out; -wire _guard23 = ar_handshake_occurred_out; -wire _guard24 = ~_guard23; -wire _guard25 = do_ar_transfer_go_out; -wire _guard26 = _guard24 & _guard25; -wire _guard27 = early_reset_static_par_go_out; -wire _guard28 = _guard26 | _guard27; -wire _guard29 = arvalid_out; -wire _guard30 = ARREADY; -wire _guard31 = _guard29 & _guard30; -wire _guard32 = do_ar_transfer_go_out; -wire _guard33 = _guard31 & _guard32; -wire _guard34 = early_reset_static_par_go_out; -wire _guard35 = invoke2_done_out; -wire _guard36 = ~_guard35; -wire _guard37 = fsm0_out == 2'd2; -wire _guard38 = _guard36 & _guard37; -wire _guard39 = tdcc_go_out; +wire _guard13 = fsm_out == 2'd3; +wire _guard14 = fsm_out == 2'd0; +wire _guard15 = wrapper_early_reset_static_par_thread_done_out; +wire _guard16 = _guard14 & _guard15; +wire _guard17 = tdcc_go_out; +wire _guard18 = _guard16 & _guard17; +wire _guard19 = _guard13 | _guard18; +wire _guard20 = fsm_out == 2'd1; +wire _guard21 = do_ar_transfer_done_out; +wire _guard22 = _guard20 & _guard21; +wire _guard23 = tdcc_go_out; +wire _guard24 = _guard22 & _guard23; +wire _guard25 = _guard19 | _guard24; +wire _guard26 = fsm_out == 2'd2; +wire _guard27 = invoke2_done_out; +wire _guard28 = _guard26 & _guard27; +wire _guard29 = tdcc_go_out; +wire _guard30 = _guard28 & _guard29; +wire _guard31 = _guard25 | _guard30; +wire _guard32 = fsm_out == 2'd0; +wire _guard33 = wrapper_early_reset_static_par_thread_done_out; +wire _guard34 = _guard32 & _guard33; +wire _guard35 = tdcc_go_out; +wire _guard36 = _guard34 & _guard35; +wire _guard37 = fsm_out == 2'd3; +wire _guard38 = fsm_out == 2'd2; +wire _guard39 = invoke2_done_out; wire _guard40 = _guard38 & _guard39; -wire _guard41 = wrapper_early_reset_static_par_done_out; -wire _guard42 = ~_guard41; -wire _guard43 = fsm0_out == 2'd0; -wire _guard44 = _guard42 & _guard43; -wire _guard45 = tdcc_go_out; -wire _guard46 = _guard44 & _guard45; -wire _guard47 = fsm_out == 1'd0; -wire _guard48 = signal_reg_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = fsm0_out == 2'd3; -wire _guard51 = fsm0_out == 2'd0; -wire _guard52 = wrapper_early_reset_static_par_done_out; -wire _guard53 = _guard51 & _guard52; -wire _guard54 = tdcc_go_out; -wire _guard55 = _guard53 & _guard54; -wire _guard56 = _guard50 | _guard55; -wire _guard57 = fsm0_out == 2'd1; -wire _guard58 = do_ar_transfer_done_out; -wire _guard59 = _guard57 & _guard58; -wire _guard60 = tdcc_go_out; -wire _guard61 = _guard59 & _guard60; -wire _guard62 = _guard56 | _guard61; -wire _guard63 = fsm0_out == 2'd2; -wire _guard64 = invoke2_done_out; +wire _guard41 = tdcc_go_out; +wire _guard42 = _guard40 & _guard41; +wire _guard43 = fsm_out == 2'd1; +wire _guard44 = do_ar_transfer_done_out; +wire _guard45 = _guard43 & _guard44; +wire _guard46 = tdcc_go_out; +wire _guard47 = _guard45 & _guard46; +wire _guard48 = ar_handshake_occurred_out; +wire _guard49 = ~_guard48; +wire _guard50 = do_ar_transfer_go_out; +wire _guard51 = _guard49 & _guard50; +wire _guard52 = early_reset_static_par_thread_go_out; +wire _guard53 = _guard51 | _guard52; +wire _guard54 = arvalid_out; +wire _guard55 = ARREADY; +wire _guard56 = _guard54 & _guard55; +wire _guard57 = do_ar_transfer_go_out; +wire _guard58 = _guard56 & _guard57; +wire _guard59 = early_reset_static_par_thread_go_out; +wire _guard60 = invoke2_done_out; +wire _guard61 = ~_guard60; +wire _guard62 = fsm_out == 2'd2; +wire _guard63 = _guard61 & _guard62; +wire _guard64 = tdcc_go_out; wire _guard65 = _guard63 & _guard64; -wire _guard66 = tdcc_go_out; -wire _guard67 = _guard65 & _guard66; -wire _guard68 = _guard62 | _guard67; -wire _guard69 = fsm0_out == 2'd0; -wire _guard70 = wrapper_early_reset_static_par_done_out; +wire _guard66 = wrapper_early_reset_static_par_thread_done_out; +wire _guard67 = ~_guard66; +wire _guard68 = fsm_out == 2'd0; +wire _guard69 = _guard67 & _guard68; +wire _guard70 = tdcc_go_out; wire _guard71 = _guard69 & _guard70; -wire _guard72 = tdcc_go_out; -wire _guard73 = _guard71 & _guard72; -wire _guard74 = fsm0_out == 2'd3; -wire _guard75 = fsm0_out == 2'd2; -wire _guard76 = invoke2_done_out; +wire _guard72 = do_ar_transfer_go_out; +wire _guard73 = early_reset_static_par_thread_go_out; +wire _guard74 = _guard72 | _guard73; +wire _guard75 = ARREADY; +wire _guard76 = arvalid_out; wire _guard77 = _guard75 & _guard76; -wire _guard78 = tdcc_go_out; +wire _guard78 = do_ar_transfer_go_out; wire _guard79 = _guard77 & _guard78; -wire _guard80 = fsm0_out == 2'd1; -wire _guard81 = do_ar_transfer_done_out; +wire _guard80 = ARREADY; +wire _guard81 = arvalid_out; wire _guard82 = _guard80 & _guard81; -wire _guard83 = tdcc_go_out; -wire _guard84 = _guard82 & _guard83; -wire _guard85 = do_ar_transfer_go_out; -wire _guard86 = early_reset_static_par_go_out; +wire _guard83 = ~_guard82; +wire _guard84 = do_ar_transfer_go_out; +wire _guard85 = _guard83 & _guard84; +wire _guard86 = early_reset_static_par_thread_go_out; wire _guard87 = _guard85 | _guard86; -wire _guard88 = ARREADY; -wire _guard89 = arvalid_out; -wire _guard90 = _guard88 & _guard89; -wire _guard91 = do_ar_transfer_go_out; -wire _guard92 = _guard90 & _guard91; -wire _guard93 = ARREADY; -wire _guard94 = arvalid_out; -wire _guard95 = _guard93 & _guard94; -wire _guard96 = ~_guard95; -wire _guard97 = do_ar_transfer_go_out; -wire _guard98 = _guard96 & _guard97; -wire _guard99 = early_reset_static_par_go_out; -wire _guard100 = _guard98 | _guard99; -wire _guard101 = fsm_out == 1'd0; +wire _guard88 = signal_reg_out; +wire _guard89 = _guard0 & _guard0; +wire _guard90 = signal_reg_out; +wire _guard91 = ~_guard90; +wire _guard92 = _guard89 & _guard91; +wire _guard93 = wrapper_early_reset_static_par_thread_go_out; +wire _guard94 = _guard92 & _guard93; +wire _guard95 = _guard88 | _guard94; +wire _guard96 = _guard0 & _guard0; +wire _guard97 = signal_reg_out; +wire _guard98 = ~_guard97; +wire _guard99 = _guard96 & _guard98; +wire _guard100 = wrapper_early_reset_static_par_thread_go_out; +wire _guard101 = _guard99 & _guard100; wire _guard102 = signal_reg_out; -wire _guard103 = _guard101 & _guard102; -wire _guard104 = fsm_out == 1'd0; -wire _guard105 = signal_reg_out; -wire _guard106 = ~_guard105; -wire _guard107 = _guard104 & _guard106; -wire _guard108 = wrapper_early_reset_static_par_go_out; -wire _guard109 = _guard107 & _guard108; -wire _guard110 = _guard103 | _guard109; -wire _guard111 = fsm_out == 1'd0; -wire _guard112 = signal_reg_out; +wire _guard103 = wrapper_early_reset_static_par_thread_go_out; +wire _guard104 = signal_reg_out; +wire _guard105 = do_ar_transfer_go_out; +wire _guard106 = invoke2_go_out; +wire _guard107 = _guard105 | _guard106; +wire _guard108 = arvalid_out; +wire _guard109 = ARREADY; +wire _guard110 = _guard108 & _guard109; +wire _guard111 = ~_guard110; +wire _guard112 = ar_handshake_occurred_out; wire _guard113 = ~_guard112; wire _guard114 = _guard111 & _guard113; -wire _guard115 = wrapper_early_reset_static_par_go_out; +wire _guard115 = do_ar_transfer_go_out; wire _guard116 = _guard114 & _guard115; -wire _guard117 = fsm_out == 1'd0; -wire _guard118 = signal_reg_out; +wire _guard117 = arvalid_out; +wire _guard118 = ARREADY; wire _guard119 = _guard117 & _guard118; -wire _guard120 = do_ar_transfer_go_out; -wire _guard121 = invoke2_go_out; -wire _guard122 = _guard120 | _guard121; -wire _guard123 = arvalid_out; -wire _guard124 = ARREADY; -wire _guard125 = _guard123 & _guard124; -wire _guard126 = ~_guard125; -wire _guard127 = ar_handshake_occurred_out; -wire _guard128 = ~_guard127; -wire _guard129 = _guard126 & _guard128; -wire _guard130 = do_ar_transfer_go_out; -wire _guard131 = _guard129 & _guard130; -wire _guard132 = arvalid_out; -wire _guard133 = ARREADY; -wire _guard134 = _guard132 & _guard133; -wire _guard135 = ar_handshake_occurred_out; -wire _guard136 = _guard134 | _guard135; -wire _guard137 = do_ar_transfer_go_out; -wire _guard138 = _guard136 & _guard137; -wire _guard139 = invoke2_go_out; -wire _guard140 = _guard138 | _guard139; -wire _guard141 = fsm0_out == 2'd3; -wire _guard142 = wrapper_early_reset_static_par_go_out; +wire _guard120 = ar_handshake_occurred_out; +wire _guard121 = _guard119 | _guard120; +wire _guard122 = do_ar_transfer_go_out; +wire _guard123 = _guard121 & _guard122; +wire _guard124 = invoke2_go_out; +wire _guard125 = _guard123 | _guard124; +wire _guard126 = fsm_out == 2'd3; assign do_ar_transfer_go_in = _guard6; assign done = _guard7; assign ARPROT = @@ -7139,62 +6779,51 @@ assign ARBURST = _guard12 ? 2'd1 : 2'd0; assign ARVALID = arvalid_out; -assign fsm_write_en = _guard13; +assign fsm_write_en = _guard31; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard17 ? adder_out : - _guard20 ? 1'd0 : - 1'd0; -assign adder_left = - _guard21 ? fsm_out : - 1'd0; -assign adder_right = _guard22; -assign ar_handshake_occurred_write_en = _guard28; + _guard36 ? 2'd1 : + _guard37 ? 2'd0 : + _guard42 ? 2'd3 : + _guard47 ? 2'd2 : + 2'd0; +assign ar_handshake_occurred_write_en = _guard53; assign ar_handshake_occurred_clk = clk; assign ar_handshake_occurred_reset = reset; assign ar_handshake_occurred_in = - _guard33 ? 1'd1 : - _guard34 ? 1'd0 : + _guard58 ? 1'd1 : + _guard59 ? 1'd0 : 'x; -assign invoke2_go_in = _guard40; -assign wrapper_early_reset_static_par_go_in = _guard46; -assign wrapper_early_reset_static_par_done_in = _guard49; +assign invoke2_go_in = _guard65; +assign wrapper_early_reset_static_par_thread_go_in = _guard71; assign tdcc_go_in = go; -assign fsm0_write_en = _guard68; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard73 ? 2'd1 : - _guard74 ? 2'd0 : - _guard79 ? 2'd3 : - _guard84 ? 2'd2 : - 2'd0; -assign early_reset_static_par_done_in = ud_out; -assign bt_reg_write_en = _guard87; +assign bt_reg_write_en = _guard74; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard92 ? 1'd1 : - _guard100 ? 1'd0 : + _guard79 ? 1'd1 : + _guard87 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard110; +assign signal_reg_write_en = _guard95; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard116 ? 1'd1 : - _guard119 ? 1'd0 : + _guard101 ? 1'd1 : + _guard102 ? 1'd0 : 1'd0; assign invoke2_done_in = arvalid_done; -assign arvalid_write_en = _guard122; +assign early_reset_static_par_thread_go_in = _guard103; +assign wrapper_early_reset_static_par_thread_done_in = _guard104; +assign arvalid_write_en = _guard107; assign arvalid_clk = clk; assign arvalid_reset = reset; assign arvalid_in = - _guard131 ? 1'd1 : - _guard140 ? 1'd0 : + _guard116 ? 1'd1 : + _guard125 ? 1'd0 : 'x; -assign tdcc_done_in = _guard141; -assign early_reset_static_par_go_in = _guard142; +assign tdcc_done_in = _guard126; +assign early_reset_static_par_thread_done_in = ud_out; assign do_ar_transfer_done_in = bt_reg_out; // COMPONENT END: m_ar_channel_Sum0 endmodule @@ -7232,15 +6861,6 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; logic ud_out; logic signal_reg_in; logic signal_reg_write_en; @@ -7248,12 +6868,12 @@ logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic do_aw_transfer_go_in; logic do_aw_transfer_go_out; logic do_aw_transfer_done_in; @@ -7262,14 +6882,14 @@ logic invoke2_go_in; logic invoke2_go_out; logic invoke2_done_in; logic invoke2_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -7304,23 +6924,6 @@ std_reg # ( .reset(bt_reg_reset), .write_en(bt_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) ) ud ( @@ -7338,13 +6941,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -7372,27 +6975,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) @@ -7413,142 +7016,126 @@ wire _guard3 = do_aw_transfer_go_out; wire _guard4 = do_aw_transfer_go_out; wire _guard5 = do_aw_transfer_go_out; wire _guard6 = do_aw_transfer_go_out; -wire _guard7 = early_reset_static_par_go_out; -wire _guard8 = fsm_out == 1'd0; -wire _guard9 = ~_guard8; -wire _guard10 = early_reset_static_par_go_out; -wire _guard11 = _guard9 & _guard10; -wire _guard12 = fsm_out == 1'd0; -wire _guard13 = early_reset_static_par_go_out; -wire _guard14 = _guard12 & _guard13; -wire _guard15 = early_reset_static_par_go_out; -wire _guard16 = early_reset_static_par_go_out; -wire _guard17 = invoke2_done_out; -wire _guard18 = ~_guard17; -wire _guard19 = fsm0_out == 2'd2; -wire _guard20 = _guard18 & _guard19; -wire _guard21 = tdcc_go_out; +wire _guard7 = fsm_out == 2'd3; +wire _guard8 = fsm_out == 2'd0; +wire _guard9 = wrapper_early_reset_static_par_thread_done_out; +wire _guard10 = _guard8 & _guard9; +wire _guard11 = tdcc_go_out; +wire _guard12 = _guard10 & _guard11; +wire _guard13 = _guard7 | _guard12; +wire _guard14 = fsm_out == 2'd1; +wire _guard15 = do_aw_transfer_done_out; +wire _guard16 = _guard14 & _guard15; +wire _guard17 = tdcc_go_out; +wire _guard18 = _guard16 & _guard17; +wire _guard19 = _guard13 | _guard18; +wire _guard20 = fsm_out == 2'd2; +wire _guard21 = invoke2_done_out; wire _guard22 = _guard20 & _guard21; -wire _guard23 = wrapper_early_reset_static_par_done_out; -wire _guard24 = ~_guard23; -wire _guard25 = fsm0_out == 2'd0; -wire _guard26 = _guard24 & _guard25; -wire _guard27 = tdcc_go_out; +wire _guard23 = tdcc_go_out; +wire _guard24 = _guard22 & _guard23; +wire _guard25 = _guard19 | _guard24; +wire _guard26 = fsm_out == 2'd0; +wire _guard27 = wrapper_early_reset_static_par_thread_done_out; wire _guard28 = _guard26 & _guard27; -wire _guard29 = fsm_out == 1'd0; -wire _guard30 = signal_reg_out; -wire _guard31 = _guard29 & _guard30; -wire _guard32 = fsm0_out == 2'd3; -wire _guard33 = fsm0_out == 2'd0; -wire _guard34 = wrapper_early_reset_static_par_done_out; -wire _guard35 = _guard33 & _guard34; -wire _guard36 = tdcc_go_out; -wire _guard37 = _guard35 & _guard36; -wire _guard38 = _guard32 | _guard37; -wire _guard39 = fsm0_out == 2'd1; -wire _guard40 = do_aw_transfer_done_out; +wire _guard29 = tdcc_go_out; +wire _guard30 = _guard28 & _guard29; +wire _guard31 = fsm_out == 2'd3; +wire _guard32 = fsm_out == 2'd2; +wire _guard33 = invoke2_done_out; +wire _guard34 = _guard32 & _guard33; +wire _guard35 = tdcc_go_out; +wire _guard36 = _guard34 & _guard35; +wire _guard37 = fsm_out == 2'd1; +wire _guard38 = do_aw_transfer_done_out; +wire _guard39 = _guard37 & _guard38; +wire _guard40 = tdcc_go_out; wire _guard41 = _guard39 & _guard40; -wire _guard42 = tdcc_go_out; -wire _guard43 = _guard41 & _guard42; -wire _guard44 = _guard38 | _guard43; -wire _guard45 = fsm0_out == 2'd2; -wire _guard46 = invoke2_done_out; +wire _guard42 = invoke2_done_out; +wire _guard43 = ~_guard42; +wire _guard44 = fsm_out == 2'd2; +wire _guard45 = _guard43 & _guard44; +wire _guard46 = tdcc_go_out; wire _guard47 = _guard45 & _guard46; -wire _guard48 = tdcc_go_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = _guard44 | _guard49; -wire _guard51 = fsm0_out == 2'd0; -wire _guard52 = wrapper_early_reset_static_par_done_out; +wire _guard48 = wrapper_early_reset_static_par_thread_done_out; +wire _guard49 = ~_guard48; +wire _guard50 = fsm_out == 2'd0; +wire _guard51 = _guard49 & _guard50; +wire _guard52 = tdcc_go_out; wire _guard53 = _guard51 & _guard52; -wire _guard54 = tdcc_go_out; -wire _guard55 = _guard53 & _guard54; -wire _guard56 = fsm0_out == 2'd3; -wire _guard57 = fsm0_out == 2'd2; -wire _guard58 = invoke2_done_out; +wire _guard54 = do_aw_transfer_done_out; +wire _guard55 = ~_guard54; +wire _guard56 = fsm_out == 2'd1; +wire _guard57 = _guard55 & _guard56; +wire _guard58 = tdcc_go_out; wire _guard59 = _guard57 & _guard58; -wire _guard60 = tdcc_go_out; -wire _guard61 = _guard59 & _guard60; -wire _guard62 = fsm0_out == 2'd1; -wire _guard63 = do_aw_transfer_done_out; -wire _guard64 = _guard62 & _guard63; -wire _guard65 = tdcc_go_out; -wire _guard66 = _guard64 & _guard65; -wire _guard67 = do_aw_transfer_done_out; -wire _guard68 = ~_guard67; -wire _guard69 = fsm0_out == 2'd1; +wire _guard60 = do_aw_transfer_go_out; +wire _guard61 = early_reset_static_par_thread_go_out; +wire _guard62 = _guard60 | _guard61; +wire _guard63 = AWREADY; +wire _guard64 = awvalid_out; +wire _guard65 = _guard63 & _guard64; +wire _guard66 = do_aw_transfer_go_out; +wire _guard67 = _guard65 & _guard66; +wire _guard68 = AWREADY; +wire _guard69 = awvalid_out; wire _guard70 = _guard68 & _guard69; -wire _guard71 = tdcc_go_out; -wire _guard72 = _guard70 & _guard71; -wire _guard73 = do_aw_transfer_go_out; -wire _guard74 = early_reset_static_par_go_out; +wire _guard71 = ~_guard70; +wire _guard72 = do_aw_transfer_go_out; +wire _guard73 = _guard71 & _guard72; +wire _guard74 = early_reset_static_par_thread_go_out; wire _guard75 = _guard73 | _guard74; -wire _guard76 = AWREADY; -wire _guard77 = awvalid_out; -wire _guard78 = _guard76 & _guard77; -wire _guard79 = do_aw_transfer_go_out; -wire _guard80 = _guard78 & _guard79; -wire _guard81 = AWREADY; -wire _guard82 = awvalid_out; -wire _guard83 = _guard81 & _guard82; -wire _guard84 = ~_guard83; -wire _guard85 = do_aw_transfer_go_out; -wire _guard86 = _guard84 & _guard85; -wire _guard87 = early_reset_static_par_go_out; -wire _guard88 = _guard86 | _guard87; -wire _guard89 = fsm_out == 1'd0; +wire _guard76 = signal_reg_out; +wire _guard77 = _guard0 & _guard0; +wire _guard78 = signal_reg_out; +wire _guard79 = ~_guard78; +wire _guard80 = _guard77 & _guard79; +wire _guard81 = wrapper_early_reset_static_par_thread_go_out; +wire _guard82 = _guard80 & _guard81; +wire _guard83 = _guard76 | _guard82; +wire _guard84 = _guard0 & _guard0; +wire _guard85 = signal_reg_out; +wire _guard86 = ~_guard85; +wire _guard87 = _guard84 & _guard86; +wire _guard88 = wrapper_early_reset_static_par_thread_go_out; +wire _guard89 = _guard87 & _guard88; wire _guard90 = signal_reg_out; -wire _guard91 = _guard89 & _guard90; -wire _guard92 = fsm_out == 1'd0; -wire _guard93 = signal_reg_out; +wire _guard91 = wrapper_early_reset_static_par_thread_go_out; +wire _guard92 = signal_reg_out; +wire _guard93 = aw_handshake_occurred_out; wire _guard94 = ~_guard93; -wire _guard95 = _guard92 & _guard94; -wire _guard96 = wrapper_early_reset_static_par_go_out; -wire _guard97 = _guard95 & _guard96; -wire _guard98 = _guard91 | _guard97; -wire _guard99 = fsm_out == 1'd0; -wire _guard100 = signal_reg_out; -wire _guard101 = ~_guard100; -wire _guard102 = _guard99 & _guard101; -wire _guard103 = wrapper_early_reset_static_par_go_out; -wire _guard104 = _guard102 & _guard103; -wire _guard105 = fsm_out == 1'd0; -wire _guard106 = signal_reg_out; -wire _guard107 = _guard105 & _guard106; -wire _guard108 = aw_handshake_occurred_out; -wire _guard109 = ~_guard108; -wire _guard110 = do_aw_transfer_go_out; +wire _guard95 = do_aw_transfer_go_out; +wire _guard96 = _guard94 & _guard95; +wire _guard97 = early_reset_static_par_thread_go_out; +wire _guard98 = _guard96 | _guard97; +wire _guard99 = awvalid_out; +wire _guard100 = AWREADY; +wire _guard101 = _guard99 & _guard100; +wire _guard102 = do_aw_transfer_go_out; +wire _guard103 = _guard101 & _guard102; +wire _guard104 = early_reset_static_par_thread_go_out; +wire _guard105 = fsm_out == 2'd3; +wire _guard106 = do_aw_transfer_go_out; +wire _guard107 = invoke2_go_out; +wire _guard108 = _guard106 | _guard107; +wire _guard109 = awvalid_out; +wire _guard110 = AWREADY; wire _guard111 = _guard109 & _guard110; -wire _guard112 = early_reset_static_par_go_out; -wire _guard113 = _guard111 | _guard112; -wire _guard114 = awvalid_out; -wire _guard115 = AWREADY; -wire _guard116 = _guard114 & _guard115; -wire _guard117 = do_aw_transfer_go_out; -wire _guard118 = _guard116 & _guard117; -wire _guard119 = early_reset_static_par_go_out; -wire _guard120 = fsm0_out == 2'd3; -wire _guard121 = do_aw_transfer_go_out; -wire _guard122 = invoke2_go_out; -wire _guard123 = _guard121 | _guard122; -wire _guard124 = awvalid_out; -wire _guard125 = AWREADY; -wire _guard126 = _guard124 & _guard125; -wire _guard127 = ~_guard126; -wire _guard128 = aw_handshake_occurred_out; -wire _guard129 = ~_guard128; -wire _guard130 = _guard127 & _guard129; -wire _guard131 = do_aw_transfer_go_out; -wire _guard132 = _guard130 & _guard131; -wire _guard133 = awvalid_out; -wire _guard134 = AWREADY; -wire _guard135 = _guard133 & _guard134; -wire _guard136 = aw_handshake_occurred_out; -wire _guard137 = _guard135 | _guard136; -wire _guard138 = do_aw_transfer_go_out; -wire _guard139 = _guard137 & _guard138; -wire _guard140 = invoke2_go_out; -wire _guard141 = _guard139 | _guard140; -wire _guard142 = wrapper_early_reset_static_par_go_out; +wire _guard112 = ~_guard111; +wire _guard113 = aw_handshake_occurred_out; +wire _guard114 = ~_guard113; +wire _guard115 = _guard112 & _guard114; +wire _guard116 = do_aw_transfer_go_out; +wire _guard117 = _guard115 & _guard116; +wire _guard118 = awvalid_out; +wire _guard119 = AWREADY; +wire _guard120 = _guard118 & _guard119; +wire _guard121 = aw_handshake_occurred_out; +wire _guard122 = _guard120 | _guard121; +wire _guard123 = do_aw_transfer_go_out; +wire _guard124 = _guard122 & _guard123; +wire _guard125 = invoke2_go_out; +wire _guard126 = _guard124 | _guard125; assign done = _guard1; assign AWADDR = _guard2 ? axi_address : @@ -7566,64 +7153,53 @@ assign AWBURST = assign AWLEN = _guard6 ? 8'd0 : 8'd0; -assign fsm_write_en = _guard7; +assign fsm_write_en = _guard25; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard11 ? adder_out : - _guard14 ? 1'd0 : - 1'd0; -assign adder_left = - _guard15 ? fsm_out : - 1'd0; -assign adder_right = _guard16; -assign invoke2_go_in = _guard22; -assign wrapper_early_reset_static_par_go_in = _guard28; -assign wrapper_early_reset_static_par_done_in = _guard31; -assign tdcc_go_in = go; -assign fsm0_write_en = _guard50; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard55 ? 2'd1 : - _guard56 ? 2'd0 : - _guard61 ? 2'd3 : - _guard66 ? 2'd2 : + _guard30 ? 2'd1 : + _guard31 ? 2'd0 : + _guard36 ? 2'd3 : + _guard41 ? 2'd2 : 2'd0; -assign do_aw_transfer_go_in = _guard72; +assign invoke2_go_in = _guard47; +assign wrapper_early_reset_static_par_thread_go_in = _guard53; +assign tdcc_go_in = go; +assign do_aw_transfer_go_in = _guard59; assign do_aw_transfer_done_in = bt_reg_out; -assign early_reset_static_par_done_in = ud_out; -assign bt_reg_write_en = _guard75; +assign bt_reg_write_en = _guard62; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard80 ? 1'd1 : - _guard88 ? 1'd0 : + _guard67 ? 1'd1 : + _guard75 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard98; +assign signal_reg_write_en = _guard83; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard104 ? 1'd1 : - _guard107 ? 1'd0 : + _guard89 ? 1'd1 : + _guard90 ? 1'd0 : 1'd0; assign invoke2_done_in = awvalid_done; -assign aw_handshake_occurred_write_en = _guard113; +assign early_reset_static_par_thread_go_in = _guard91; +assign wrapper_early_reset_static_par_thread_done_in = _guard92; +assign aw_handshake_occurred_write_en = _guard98; assign aw_handshake_occurred_clk = clk; assign aw_handshake_occurred_reset = reset; assign aw_handshake_occurred_in = - _guard118 ? 1'd1 : - _guard119 ? 1'd0 : + _guard103 ? 1'd1 : + _guard104 ? 1'd0 : 'x; -assign tdcc_done_in = _guard120; -assign awvalid_write_en = _guard123; +assign tdcc_done_in = _guard105; +assign awvalid_write_en = _guard108; assign awvalid_clk = clk; assign awvalid_reset = reset; assign awvalid_in = - _guard132 ? 1'd1 : - _guard141 ? 1'd0 : + _guard117 ? 1'd1 : + _guard126 ? 1'd0 : 'x; -assign early_reset_static_par_go_in = _guard142; +assign early_reset_static_par_thread_done_in = ud_out; // COMPONENT END: m_aw_channel_Sum0 endmodule module m_read_channel_Sum0( @@ -7942,15 +7518,6 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; logic ud_out; logic signal_reg_in; logic signal_reg_write_en; @@ -7958,24 +7525,24 @@ logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic service_write_transfer_go_in; logic service_write_transfer_go_out; logic service_write_transfer_done_in; logic service_write_transfer_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -8010,23 +7577,6 @@ std_reg # ( .reset(bt_reg_reset), .write_en(bt_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) ) ud ( @@ -8044,13 +7594,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -8066,27 +7616,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) @@ -8104,189 +7654,162 @@ wire _guard0 = 1; wire _guard1 = tdcc_done_out; wire _guard2 = service_write_transfer_go_out; wire _guard3 = service_write_transfer_go_out; -wire _guard4 = early_reset_static_par_go_out; -wire _guard5 = fsm_out == 1'd0; -wire _guard6 = ~_guard5; -wire _guard7 = early_reset_static_par_go_out; -wire _guard8 = _guard6 & _guard7; -wire _guard9 = fsm_out == 1'd0; -wire _guard10 = early_reset_static_par_go_out; -wire _guard11 = _guard9 & _guard10; -wire _guard12 = early_reset_static_par_go_out; -wire _guard13 = early_reset_static_par_go_out; -wire _guard14 = service_write_transfer_go_out; -wire _guard15 = wvalid_out; -wire _guard16 = WREADY; -wire _guard17 = _guard15 & _guard16; -wire _guard18 = ~_guard17; -wire _guard19 = w_handshake_occurred_out; -wire _guard20 = ~_guard19; -wire _guard21 = _guard18 & _guard20; -wire _guard22 = service_write_transfer_go_out; -wire _guard23 = _guard21 & _guard22; -wire _guard24 = wvalid_out; -wire _guard25 = WREADY; -wire _guard26 = _guard24 & _guard25; -wire _guard27 = w_handshake_occurred_out; -wire _guard28 = _guard26 | _guard27; -wire _guard29 = service_write_transfer_go_out; -wire _guard30 = _guard28 & _guard29; -wire _guard31 = wrapper_early_reset_static_par_done_out; -wire _guard32 = ~_guard31; -wire _guard33 = fsm0_out == 2'd0; -wire _guard34 = _guard32 & _guard33; -wire _guard35 = tdcc_go_out; -wire _guard36 = _guard34 & _guard35; -wire _guard37 = fsm_out == 1'd0; -wire _guard38 = signal_reg_out; -wire _guard39 = _guard37 & _guard38; -wire _guard40 = fsm0_out == 2'd2; -wire _guard41 = fsm0_out == 2'd0; -wire _guard42 = wrapper_early_reset_static_par_done_out; +wire _guard4 = fsm_out == 2'd2; +wire _guard5 = fsm_out == 2'd0; +wire _guard6 = wrapper_early_reset_static_par_thread_done_out; +wire _guard7 = _guard5 & _guard6; +wire _guard8 = tdcc_go_out; +wire _guard9 = _guard7 & _guard8; +wire _guard10 = _guard4 | _guard9; +wire _guard11 = fsm_out == 2'd1; +wire _guard12 = service_write_transfer_done_out; +wire _guard13 = _guard11 & _guard12; +wire _guard14 = tdcc_go_out; +wire _guard15 = _guard13 & _guard14; +wire _guard16 = _guard10 | _guard15; +wire _guard17 = fsm_out == 2'd0; +wire _guard18 = wrapper_early_reset_static_par_thread_done_out; +wire _guard19 = _guard17 & _guard18; +wire _guard20 = tdcc_go_out; +wire _guard21 = _guard19 & _guard20; +wire _guard22 = fsm_out == 2'd2; +wire _guard23 = fsm_out == 2'd1; +wire _guard24 = service_write_transfer_done_out; +wire _guard25 = _guard23 & _guard24; +wire _guard26 = tdcc_go_out; +wire _guard27 = _guard25 & _guard26; +wire _guard28 = wrapper_early_reset_static_par_thread_done_out; +wire _guard29 = ~_guard28; +wire _guard30 = fsm_out == 2'd0; +wire _guard31 = _guard29 & _guard30; +wire _guard32 = tdcc_go_out; +wire _guard33 = _guard31 & _guard32; +wire _guard34 = service_write_transfer_go_out; +wire _guard35 = wvalid_out; +wire _guard36 = WREADY; +wire _guard37 = _guard35 & _guard36; +wire _guard38 = ~_guard37; +wire _guard39 = w_handshake_occurred_out; +wire _guard40 = ~_guard39; +wire _guard41 = _guard38 & _guard40; +wire _guard42 = service_write_transfer_go_out; wire _guard43 = _guard41 & _guard42; -wire _guard44 = tdcc_go_out; -wire _guard45 = _guard43 & _guard44; -wire _guard46 = _guard40 | _guard45; -wire _guard47 = fsm0_out == 2'd1; -wire _guard48 = service_write_transfer_done_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = tdcc_go_out; -wire _guard51 = _guard49 & _guard50; -wire _guard52 = _guard46 | _guard51; -wire _guard53 = fsm0_out == 2'd0; -wire _guard54 = wrapper_early_reset_static_par_done_out; -wire _guard55 = _guard53 & _guard54; -wire _guard56 = tdcc_go_out; -wire _guard57 = _guard55 & _guard56; -wire _guard58 = fsm0_out == 2'd2; -wire _guard59 = fsm0_out == 2'd1; -wire _guard60 = service_write_transfer_done_out; -wire _guard61 = _guard59 & _guard60; -wire _guard62 = tdcc_go_out; -wire _guard63 = _guard61 & _guard62; -wire _guard64 = service_write_transfer_done_out; -wire _guard65 = ~_guard64; -wire _guard66 = fsm0_out == 2'd1; +wire _guard44 = wvalid_out; +wire _guard45 = WREADY; +wire _guard46 = _guard44 & _guard45; +wire _guard47 = w_handshake_occurred_out; +wire _guard48 = _guard46 | _guard47; +wire _guard49 = service_write_transfer_go_out; +wire _guard50 = _guard48 & _guard49; +wire _guard51 = service_write_transfer_done_out; +wire _guard52 = ~_guard51; +wire _guard53 = fsm_out == 2'd1; +wire _guard54 = _guard52 & _guard53; +wire _guard55 = tdcc_go_out; +wire _guard56 = _guard54 & _guard55; +wire _guard57 = service_write_transfer_go_out; +wire _guard58 = early_reset_static_par_thread_go_out; +wire _guard59 = _guard57 | _guard58; +wire _guard60 = wvalid_out; +wire _guard61 = WREADY; +wire _guard62 = _guard60 & _guard61; +wire _guard63 = service_write_transfer_go_out; +wire _guard64 = _guard62 & _guard63; +wire _guard65 = wvalid_out; +wire _guard66 = WREADY; wire _guard67 = _guard65 & _guard66; -wire _guard68 = tdcc_go_out; -wire _guard69 = _guard67 & _guard68; -wire _guard70 = service_write_transfer_go_out; -wire _guard71 = early_reset_static_par_go_out; +wire _guard68 = ~_guard67; +wire _guard69 = service_write_transfer_go_out; +wire _guard70 = _guard68 & _guard69; +wire _guard71 = early_reset_static_par_thread_go_out; wire _guard72 = _guard70 | _guard71; -wire _guard73 = wvalid_out; -wire _guard74 = WREADY; -wire _guard75 = _guard73 & _guard74; -wire _guard76 = service_write_transfer_go_out; -wire _guard77 = _guard75 & _guard76; -wire _guard78 = wvalid_out; -wire _guard79 = WREADY; -wire _guard80 = _guard78 & _guard79; -wire _guard81 = ~_guard80; -wire _guard82 = service_write_transfer_go_out; -wire _guard83 = _guard81 & _guard82; -wire _guard84 = early_reset_static_par_go_out; -wire _guard85 = _guard83 | _guard84; -wire _guard86 = fsm_out == 1'd0; +wire _guard73 = signal_reg_out; +wire _guard74 = _guard0 & _guard0; +wire _guard75 = signal_reg_out; +wire _guard76 = ~_guard75; +wire _guard77 = _guard74 & _guard76; +wire _guard78 = wrapper_early_reset_static_par_thread_go_out; +wire _guard79 = _guard77 & _guard78; +wire _guard80 = _guard73 | _guard79; +wire _guard81 = _guard0 & _guard0; +wire _guard82 = signal_reg_out; +wire _guard83 = ~_guard82; +wire _guard84 = _guard81 & _guard83; +wire _guard85 = wrapper_early_reset_static_par_thread_go_out; +wire _guard86 = _guard84 & _guard85; wire _guard87 = signal_reg_out; -wire _guard88 = _guard86 & _guard87; -wire _guard89 = fsm_out == 1'd0; -wire _guard90 = signal_reg_out; +wire _guard88 = wrapper_early_reset_static_par_thread_go_out; +wire _guard89 = signal_reg_out; +wire _guard90 = w_handshake_occurred_out; wire _guard91 = ~_guard90; -wire _guard92 = _guard89 & _guard91; -wire _guard93 = wrapper_early_reset_static_par_go_out; -wire _guard94 = _guard92 & _guard93; -wire _guard95 = _guard88 | _guard94; -wire _guard96 = fsm_out == 1'd0; -wire _guard97 = signal_reg_out; -wire _guard98 = ~_guard97; -wire _guard99 = _guard96 & _guard98; -wire _guard100 = wrapper_early_reset_static_par_go_out; -wire _guard101 = _guard99 & _guard100; -wire _guard102 = fsm_out == 1'd0; -wire _guard103 = signal_reg_out; -wire _guard104 = _guard102 & _guard103; -wire _guard105 = w_handshake_occurred_out; -wire _guard106 = ~_guard105; -wire _guard107 = service_write_transfer_go_out; -wire _guard108 = _guard106 & _guard107; -wire _guard109 = early_reset_static_par_go_out; -wire _guard110 = _guard108 | _guard109; -wire _guard111 = wvalid_out; -wire _guard112 = WREADY; -wire _guard113 = _guard111 & _guard112; -wire _guard114 = service_write_transfer_go_out; -wire _guard115 = _guard113 & _guard114; -wire _guard116 = wvalid_out; -wire _guard117 = WREADY; -wire _guard118 = _guard116 & _guard117; -wire _guard119 = ~_guard118; -wire _guard120 = service_write_transfer_go_out; -wire _guard121 = _guard119 & _guard120; -wire _guard122 = early_reset_static_par_go_out; -wire _guard123 = _guard121 | _guard122; -wire _guard124 = fsm0_out == 2'd2; -wire _guard125 = wrapper_early_reset_static_par_go_out; +wire _guard92 = service_write_transfer_go_out; +wire _guard93 = _guard91 & _guard92; +wire _guard94 = early_reset_static_par_thread_go_out; +wire _guard95 = _guard93 | _guard94; +wire _guard96 = wvalid_out; +wire _guard97 = WREADY; +wire _guard98 = _guard96 & _guard97; +wire _guard99 = service_write_transfer_go_out; +wire _guard100 = _guard98 & _guard99; +wire _guard101 = wvalid_out; +wire _guard102 = WREADY; +wire _guard103 = _guard101 & _guard102; +wire _guard104 = ~_guard103; +wire _guard105 = service_write_transfer_go_out; +wire _guard106 = _guard104 & _guard105; +wire _guard107 = early_reset_static_par_thread_go_out; +wire _guard108 = _guard106 | _guard107; +wire _guard109 = fsm_out == 2'd2; assign done = _guard1; assign WVALID = wvalid_out; assign WDATA = _guard2 ? write_data : 32'd0; assign WLAST = _guard3; -assign fsm_write_en = _guard4; +assign fsm_write_en = _guard16; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard8 ? adder_out : - _guard11 ? 1'd0 : - 1'd0; -assign adder_left = - _guard12 ? fsm_out : - 1'd0; -assign adder_right = _guard13; -assign wvalid_write_en = _guard14; + _guard21 ? 2'd1 : + _guard22 ? 2'd0 : + _guard27 ? 2'd2 : + 2'd0; +assign wrapper_early_reset_static_par_thread_go_in = _guard33; +assign wvalid_write_en = _guard34; assign wvalid_clk = clk; assign wvalid_reset = reset; assign wvalid_in = - _guard23 ? 1'd1 : - _guard30 ? 1'd0 : + _guard43 ? 1'd1 : + _guard50 ? 1'd0 : 'x; -assign wrapper_early_reset_static_par_go_in = _guard36; -assign wrapper_early_reset_static_par_done_in = _guard39; assign tdcc_go_in = go; assign service_write_transfer_done_in = bt_reg_out; -assign fsm0_write_en = _guard52; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard57 ? 2'd1 : - _guard58 ? 2'd0 : - _guard63 ? 2'd2 : - 2'd0; -assign service_write_transfer_go_in = _guard69; -assign early_reset_static_par_done_in = ud_out; -assign bt_reg_write_en = _guard72; +assign service_write_transfer_go_in = _guard56; +assign bt_reg_write_en = _guard59; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard77 ? 1'd1 : - _guard85 ? 1'd0 : + _guard64 ? 1'd1 : + _guard72 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard95; +assign signal_reg_write_en = _guard80; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard101 ? 1'd1 : - _guard104 ? 1'd0 : + _guard86 ? 1'd1 : + _guard87 ? 1'd0 : 1'd0; -assign w_handshake_occurred_write_en = _guard110; +assign early_reset_static_par_thread_go_in = _guard88; +assign wrapper_early_reset_static_par_thread_done_in = _guard89; +assign w_handshake_occurred_write_en = _guard95; assign w_handshake_occurred_clk = clk; assign w_handshake_occurred_reset = reset; assign w_handshake_occurred_in = - _guard115 ? 1'd1 : - _guard123 ? 1'd0 : + _guard100 ? 1'd1 : + _guard108 ? 1'd0 : 'x; -assign tdcc_done_in = _guard124; -assign early_reset_static_par_go_in = _guard125; +assign tdcc_done_in = _guard109; +assign early_reset_static_par_thread_done_in = ud_out; // COMPONENT END: m_write_channel_Sum0 endmodule module m_bresp_channel_Sum0( @@ -10118,52 +9641,43 @@ logic comb_reg_clk; logic comb_reg_reset; logic comb_reg_out; logic comb_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; -logic ud_out; +logic ud0_out; logic signal_reg_in; logic signal_reg_write_en; logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic pd_in; logic pd_write_en; logic pd_clk; logic pd_reset; logic pd_out; logic pd_done; -logic [1:0] fsm1_in; -logic fsm1_write_en; -logic fsm1_clk; -logic fsm1_reset; -logic [1:0] fsm1_out; -logic fsm1_done; +logic [1:0] fsm0_in; +logic fsm0_write_en; +logic fsm0_clk; +logic fsm0_reset; +logic [1:0] fsm0_out; +logic fsm0_done; logic pd0_in; logic pd0_write_en; logic pd0_clk; logic pd0_reset; logic pd0_out; logic pd0_done; -logic [2:0] fsm2_in; -logic fsm2_write_en; -logic fsm2_clk; -logic fsm2_reset; -logic [2:0] fsm2_out; -logic fsm2_done; +logic [2:0] fsm1_in; +logic fsm1_write_en; +logic fsm1_clk; +logic fsm1_reset; +logic [2:0] fsm1_out; +logic fsm1_done; logic beg_spl_upd0_go_in; logic beg_spl_upd0_go_out; logic beg_spl_upd0_done_in; @@ -10192,14 +9706,14 @@ logic invoke3_go_in; logic invoke3_go_out; logic invoke3_done_in; logic invoke3_done_out; -logic early_reset_cond00_go_in; -logic early_reset_cond00_go_out; -logic early_reset_cond00_done_in; -logic early_reset_cond00_done_out; -logic wrapper_early_reset_cond00_go_in; -logic wrapper_early_reset_cond00_go_out; -logic wrapper_early_reset_cond00_done_in; -logic wrapper_early_reset_cond00_done_out; +logic early_reset_cond000_go_in; +logic early_reset_cond000_go_out; +logic early_reset_cond000_done_in; +logic early_reset_cond000_done_out; +logic wrapper_early_reset_cond000_go_in; +logic wrapper_early_reset_cond000_go_out; +logic wrapper_early_reset_cond000_done_in; +logic wrapper_early_reset_cond000_done_out; logic par0_go_in; logic par0_go_out; logic par0_done_in; @@ -10304,27 +9818,10 @@ std_reg # ( .reset(comb_reg_reset), .write_en(comb_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) -) ud ( - .out(ud_out) +) ud0 ( + .out(ud0_out) ); std_reg # ( .WIDTH(1) @@ -10338,13 +9835,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_reg # ( .WIDTH(1) @@ -10358,13 +9855,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm1 ( - .clk(fsm1_clk), - .done(fsm1_done), - .in(fsm1_in), - .out(fsm1_out), - .reset(fsm1_reset), - .write_en(fsm1_write_en) +) fsm0 ( + .clk(fsm0_clk), + .done(fsm0_done), + .in(fsm0_in), + .out(fsm0_out), + .reset(fsm0_reset), + .write_en(fsm0_write_en) ); std_reg # ( .WIDTH(1) @@ -10378,13 +9875,13 @@ std_reg # ( ); std_reg # ( .WIDTH(3) -) fsm2 ( - .clk(fsm2_clk), - .done(fsm2_done), - .in(fsm2_in), - .out(fsm2_out), - .reset(fsm2_reset), - .write_en(fsm2_write_en) +) fsm1 ( + .clk(fsm1_clk), + .done(fsm1_done), + .in(fsm1_in), + .out(fsm1_out), + .reset(fsm1_reset), + .write_en(fsm1_write_en) ); std_wire # ( .WIDTH(1) @@ -10472,27 +9969,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_cond00_go ( - .in(early_reset_cond00_go_in), - .out(early_reset_cond00_go_out) +) early_reset_cond000_go ( + .in(early_reset_cond000_go_in), + .out(early_reset_cond000_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_cond00_done ( - .in(early_reset_cond00_done_in), - .out(early_reset_cond00_done_out) +) early_reset_cond000_done ( + .in(early_reset_cond000_done_in), + .out(early_reset_cond000_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_cond00_go ( - .in(wrapper_early_reset_cond00_go_in), - .out(wrapper_early_reset_cond00_go_out) +) wrapper_early_reset_cond000_go ( + .in(wrapper_early_reset_cond000_go_in), + .out(wrapper_early_reset_cond000_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_cond00_done ( - .in(wrapper_early_reset_cond00_done_in), - .out(wrapper_early_reset_cond00_done_out) +) wrapper_early_reset_cond000_done ( + .in(wrapper_early_reset_cond000_done_in), + .out(wrapper_early_reset_cond000_done_out) ); std_wire # ( .WIDTH(1) @@ -10548,260 +10045,260 @@ wire _guard2 = invoke3_go_out; wire _guard3 = _guard1 | _guard2; wire _guard4 = invoke3_go_out; wire _guard5 = invoke0_go_out; -wire _guard6 = wrapper_early_reset_cond00_go_out; +wire _guard6 = invoke3_go_out; wire _guard7 = invoke3_go_out; -wire _guard8 = invoke3_go_out; -wire _guard9 = tdcc1_done_out; -wire _guard10 = upd2_go_out; +wire _guard8 = tdcc1_done_out; +wire _guard9 = upd2_go_out; +wire _guard10 = beg_spl_upd1_go_out; wire _guard11 = beg_spl_upd1_go_out; -wire _guard12 = beg_spl_upd1_go_out; -wire _guard13 = beg_spl_upd0_go_out; +wire _guard12 = beg_spl_upd0_go_out; +wire _guard13 = upd2_go_out; wire _guard14 = upd2_go_out; wire _guard15 = upd2_go_out; -wire _guard16 = upd2_go_out; -wire _guard17 = beg_spl_upd0_go_out; -wire _guard18 = early_reset_cond00_go_out; -wire _guard19 = fsm_out == 1'd0; -wire _guard20 = ~_guard19; -wire _guard21 = early_reset_cond00_go_out; +wire _guard16 = beg_spl_upd0_go_out; +wire _guard17 = fsm_out == 2'd2; +wire _guard18 = fsm_out == 2'd0; +wire _guard19 = beg_spl_upd0_done_out; +wire _guard20 = _guard18 & _guard19; +wire _guard21 = tdcc_go_out; wire _guard22 = _guard20 & _guard21; -wire _guard23 = fsm_out == 1'd0; -wire _guard24 = early_reset_cond00_go_out; -wire _guard25 = _guard23 & _guard24; -wire _guard26 = early_reset_cond00_go_out; -wire _guard27 = early_reset_cond00_go_out; -wire _guard28 = beg_spl_upd0_done_out; -wire _guard29 = ~_guard28; -wire _guard30 = fsm0_out == 2'd0; -wire _guard31 = _guard29 & _guard30; -wire _guard32 = tdcc_go_out; -wire _guard33 = _guard31 & _guard32; -wire _guard34 = upd2_go_out; -wire _guard35 = upd2_go_out; -wire _guard36 = invoke2_done_out; -wire _guard37 = ~_guard36; -wire _guard38 = fsm1_out == 2'd1; -wire _guard39 = _guard37 & _guard38; -wire _guard40 = tdcc0_go_out; -wire _guard41 = _guard39 & _guard40; -wire _guard42 = fsm1_out == 2'd2; -wire _guard43 = early_reset_cond00_go_out; -wire _guard44 = early_reset_cond00_go_out; -wire _guard45 = fsm1_out == 2'd2; -wire _guard46 = fsm1_out == 2'd0; -wire _guard47 = beg_spl_upd1_done_out; -wire _guard48 = _guard46 & _guard47; -wire _guard49 = tdcc0_go_out; -wire _guard50 = _guard48 & _guard49; -wire _guard51 = _guard45 | _guard50; -wire _guard52 = fsm1_out == 2'd1; -wire _guard53 = invoke2_done_out; +wire _guard23 = _guard17 | _guard22; +wire _guard24 = fsm_out == 2'd1; +wire _guard25 = invoke1_done_out; +wire _guard26 = _guard24 & _guard25; +wire _guard27 = tdcc_go_out; +wire _guard28 = _guard26 & _guard27; +wire _guard29 = _guard23 | _guard28; +wire _guard30 = fsm_out == 2'd0; +wire _guard31 = beg_spl_upd0_done_out; +wire _guard32 = _guard30 & _guard31; +wire _guard33 = tdcc_go_out; +wire _guard34 = _guard32 & _guard33; +wire _guard35 = fsm_out == 2'd2; +wire _guard36 = fsm_out == 2'd1; +wire _guard37 = invoke1_done_out; +wire _guard38 = _guard36 & _guard37; +wire _guard39 = tdcc_go_out; +wire _guard40 = _guard38 & _guard39; +wire _guard41 = beg_spl_upd0_done_out; +wire _guard42 = ~_guard41; +wire _guard43 = fsm_out == 2'd0; +wire _guard44 = _guard42 & _guard43; +wire _guard45 = tdcc_go_out; +wire _guard46 = _guard44 & _guard45; +wire _guard47 = upd2_go_out; +wire _guard48 = upd2_go_out; +wire _guard49 = invoke2_done_out; +wire _guard50 = ~_guard49; +wire _guard51 = fsm0_out == 2'd1; +wire _guard52 = _guard50 & _guard51; +wire _guard53 = tdcc0_go_out; wire _guard54 = _guard52 & _guard53; -wire _guard55 = tdcc0_go_out; -wire _guard56 = _guard54 & _guard55; -wire _guard57 = _guard51 | _guard56; -wire _guard58 = fsm1_out == 2'd0; -wire _guard59 = beg_spl_upd1_done_out; -wire _guard60 = _guard58 & _guard59; -wire _guard61 = tdcc0_go_out; -wire _guard62 = _guard60 & _guard61; -wire _guard63 = fsm1_out == 2'd2; -wire _guard64 = fsm1_out == 2'd1; -wire _guard65 = invoke2_done_out; -wire _guard66 = _guard64 & _guard65; -wire _guard67 = tdcc0_go_out; -wire _guard68 = _guard66 & _guard67; -wire _guard69 = pd_out; -wire _guard70 = tdcc_done_out; -wire _guard71 = _guard69 | _guard70; -wire _guard72 = ~_guard71; -wire _guard73 = par0_go_out; +wire _guard55 = fsm0_out == 2'd2; +wire _guard56 = early_reset_cond000_go_out; +wire _guard57 = early_reset_cond000_go_out; +wire _guard58 = wrapper_early_reset_cond000_done_out; +wire _guard59 = ~_guard58; +wire _guard60 = fsm1_out == 3'd1; +wire _guard61 = _guard59 & _guard60; +wire _guard62 = tdcc1_go_out; +wire _guard63 = _guard61 & _guard62; +wire _guard64 = wrapper_early_reset_cond000_done_out; +wire _guard65 = ~_guard64; +wire _guard66 = fsm1_out == 3'd5; +wire _guard67 = _guard65 & _guard66; +wire _guard68 = tdcc1_go_out; +wire _guard69 = _guard67 & _guard68; +wire _guard70 = _guard63 | _guard69; +wire _guard71 = fsm1_out == 3'd6; +wire _guard72 = fsm1_out == 3'd0; +wire _guard73 = invoke0_done_out; wire _guard74 = _guard72 & _guard73; -wire _guard75 = invoke0_done_out; -wire _guard76 = ~_guard75; -wire _guard77 = fsm2_out == 3'd0; -wire _guard78 = _guard76 & _guard77; -wire _guard79 = tdcc1_go_out; -wire _guard80 = _guard78 & _guard79; -wire _guard81 = fsm0_out == 2'd2; -wire _guard82 = fsm0_out == 2'd0; -wire _guard83 = beg_spl_upd0_done_out; +wire _guard75 = tdcc1_go_out; +wire _guard76 = _guard74 & _guard75; +wire _guard77 = _guard71 | _guard76; +wire _guard78 = fsm1_out == 3'd1; +wire _guard79 = wrapper_early_reset_cond000_done_out; +wire _guard80 = comb_reg_out; +wire _guard81 = _guard79 & _guard80; +wire _guard82 = _guard78 & _guard81; +wire _guard83 = tdcc1_go_out; wire _guard84 = _guard82 & _guard83; -wire _guard85 = tdcc_go_out; -wire _guard86 = _guard84 & _guard85; -wire _guard87 = _guard81 | _guard86; -wire _guard88 = fsm0_out == 2'd1; -wire _guard89 = invoke1_done_out; -wire _guard90 = _guard88 & _guard89; -wire _guard91 = tdcc_go_out; +wire _guard85 = _guard77 | _guard84; +wire _guard86 = fsm1_out == 3'd5; +wire _guard87 = wrapper_early_reset_cond000_done_out; +wire _guard88 = comb_reg_out; +wire _guard89 = _guard87 & _guard88; +wire _guard90 = _guard86 & _guard89; +wire _guard91 = tdcc1_go_out; wire _guard92 = _guard90 & _guard91; -wire _guard93 = _guard87 | _guard92; -wire _guard94 = fsm0_out == 2'd0; -wire _guard95 = beg_spl_upd0_done_out; +wire _guard93 = _guard85 | _guard92; +wire _guard94 = fsm1_out == 3'd2; +wire _guard95 = par0_done_out; wire _guard96 = _guard94 & _guard95; -wire _guard97 = tdcc_go_out; +wire _guard97 = tdcc1_go_out; wire _guard98 = _guard96 & _guard97; -wire _guard99 = fsm0_out == 2'd2; -wire _guard100 = fsm0_out == 2'd1; -wire _guard101 = invoke1_done_out; +wire _guard99 = _guard93 | _guard98; +wire _guard100 = fsm1_out == 3'd3; +wire _guard101 = upd2_done_out; wire _guard102 = _guard100 & _guard101; -wire _guard103 = tdcc_go_out; +wire _guard103 = tdcc1_go_out; wire _guard104 = _guard102 & _guard103; -wire _guard105 = fsm2_out == 3'd6; -wire _guard106 = fsm2_out == 3'd0; -wire _guard107 = invoke0_done_out; +wire _guard105 = _guard99 | _guard104; +wire _guard106 = fsm1_out == 3'd4; +wire _guard107 = invoke3_done_out; wire _guard108 = _guard106 & _guard107; wire _guard109 = tdcc1_go_out; wire _guard110 = _guard108 & _guard109; wire _guard111 = _guard105 | _guard110; -wire _guard112 = fsm2_out == 3'd1; -wire _guard113 = wrapper_early_reset_cond00_done_out; +wire _guard112 = fsm1_out == 3'd1; +wire _guard113 = wrapper_early_reset_cond000_done_out; wire _guard114 = comb_reg_out; -wire _guard115 = _guard113 & _guard114; -wire _guard116 = _guard112 & _guard115; -wire _guard117 = tdcc1_go_out; -wire _guard118 = _guard116 & _guard117; -wire _guard119 = _guard111 | _guard118; -wire _guard120 = fsm2_out == 3'd5; -wire _guard121 = wrapper_early_reset_cond00_done_out; -wire _guard122 = comb_reg_out; -wire _guard123 = _guard121 & _guard122; -wire _guard124 = _guard120 & _guard123; -wire _guard125 = tdcc1_go_out; -wire _guard126 = _guard124 & _guard125; -wire _guard127 = _guard119 | _guard126; -wire _guard128 = fsm2_out == 3'd2; -wire _guard129 = par0_done_out; -wire _guard130 = _guard128 & _guard129; -wire _guard131 = tdcc1_go_out; -wire _guard132 = _guard130 & _guard131; -wire _guard133 = _guard127 | _guard132; -wire _guard134 = fsm2_out == 3'd3; -wire _guard135 = upd2_done_out; -wire _guard136 = _guard134 & _guard135; -wire _guard137 = tdcc1_go_out; -wire _guard138 = _guard136 & _guard137; -wire _guard139 = _guard133 | _guard138; -wire _guard140 = fsm2_out == 3'd4; -wire _guard141 = invoke3_done_out; -wire _guard142 = _guard140 & _guard141; -wire _guard143 = tdcc1_go_out; -wire _guard144 = _guard142 & _guard143; -wire _guard145 = _guard139 | _guard144; -wire _guard146 = fsm2_out == 3'd1; -wire _guard147 = wrapper_early_reset_cond00_done_out; -wire _guard148 = comb_reg_out; -wire _guard149 = ~_guard148; -wire _guard150 = _guard147 & _guard149; -wire _guard151 = _guard146 & _guard150; -wire _guard152 = tdcc1_go_out; -wire _guard153 = _guard151 & _guard152; -wire _guard154 = _guard145 | _guard153; -wire _guard155 = fsm2_out == 3'd5; -wire _guard156 = wrapper_early_reset_cond00_done_out; -wire _guard157 = comb_reg_out; -wire _guard158 = ~_guard157; -wire _guard159 = _guard156 & _guard158; -wire _guard160 = _guard155 & _guard159; -wire _guard161 = tdcc1_go_out; +wire _guard115 = ~_guard114; +wire _guard116 = _guard113 & _guard115; +wire _guard117 = _guard112 & _guard116; +wire _guard118 = tdcc1_go_out; +wire _guard119 = _guard117 & _guard118; +wire _guard120 = _guard111 | _guard119; +wire _guard121 = fsm1_out == 3'd5; +wire _guard122 = wrapper_early_reset_cond000_done_out; +wire _guard123 = comb_reg_out; +wire _guard124 = ~_guard123; +wire _guard125 = _guard122 & _guard124; +wire _guard126 = _guard121 & _guard125; +wire _guard127 = tdcc1_go_out; +wire _guard128 = _guard126 & _guard127; +wire _guard129 = _guard120 | _guard128; +wire _guard130 = fsm1_out == 3'd1; +wire _guard131 = wrapper_early_reset_cond000_done_out; +wire _guard132 = comb_reg_out; +wire _guard133 = ~_guard132; +wire _guard134 = _guard131 & _guard133; +wire _guard135 = _guard130 & _guard134; +wire _guard136 = tdcc1_go_out; +wire _guard137 = _guard135 & _guard136; +wire _guard138 = fsm1_out == 3'd5; +wire _guard139 = wrapper_early_reset_cond000_done_out; +wire _guard140 = comb_reg_out; +wire _guard141 = ~_guard140; +wire _guard142 = _guard139 & _guard141; +wire _guard143 = _guard138 & _guard142; +wire _guard144 = tdcc1_go_out; +wire _guard145 = _guard143 & _guard144; +wire _guard146 = _guard137 | _guard145; +wire _guard147 = fsm1_out == 3'd4; +wire _guard148 = invoke3_done_out; +wire _guard149 = _guard147 & _guard148; +wire _guard150 = tdcc1_go_out; +wire _guard151 = _guard149 & _guard150; +wire _guard152 = fsm1_out == 3'd1; +wire _guard153 = wrapper_early_reset_cond000_done_out; +wire _guard154 = comb_reg_out; +wire _guard155 = _guard153 & _guard154; +wire _guard156 = _guard152 & _guard155; +wire _guard157 = tdcc1_go_out; +wire _guard158 = _guard156 & _guard157; +wire _guard159 = fsm1_out == 3'd5; +wire _guard160 = wrapper_early_reset_cond000_done_out; +wire _guard161 = comb_reg_out; wire _guard162 = _guard160 & _guard161; -wire _guard163 = _guard154 | _guard162; -wire _guard164 = fsm2_out == 3'd1; -wire _guard165 = wrapper_early_reset_cond00_done_out; -wire _guard166 = comb_reg_out; -wire _guard167 = ~_guard166; -wire _guard168 = _guard165 & _guard167; -wire _guard169 = _guard164 & _guard168; +wire _guard163 = _guard159 & _guard162; +wire _guard164 = tdcc1_go_out; +wire _guard165 = _guard163 & _guard164; +wire _guard166 = _guard158 | _guard165; +wire _guard167 = fsm1_out == 3'd3; +wire _guard168 = upd2_done_out; +wire _guard169 = _guard167 & _guard168; wire _guard170 = tdcc1_go_out; wire _guard171 = _guard169 & _guard170; -wire _guard172 = fsm2_out == 3'd5; -wire _guard173 = wrapper_early_reset_cond00_done_out; -wire _guard174 = comb_reg_out; -wire _guard175 = ~_guard174; -wire _guard176 = _guard173 & _guard175; -wire _guard177 = _guard172 & _guard176; -wire _guard178 = tdcc1_go_out; -wire _guard179 = _guard177 & _guard178; -wire _guard180 = _guard171 | _guard179; -wire _guard181 = fsm2_out == 3'd4; -wire _guard182 = invoke3_done_out; -wire _guard183 = _guard181 & _guard182; -wire _guard184 = tdcc1_go_out; -wire _guard185 = _guard183 & _guard184; -wire _guard186 = fsm2_out == 3'd1; -wire _guard187 = wrapper_early_reset_cond00_done_out; -wire _guard188 = comb_reg_out; -wire _guard189 = _guard187 & _guard188; -wire _guard190 = _guard186 & _guard189; -wire _guard191 = tdcc1_go_out; +wire _guard172 = fsm1_out == 3'd6; +wire _guard173 = fsm1_out == 3'd0; +wire _guard174 = invoke0_done_out; +wire _guard175 = _guard173 & _guard174; +wire _guard176 = tdcc1_go_out; +wire _guard177 = _guard175 & _guard176; +wire _guard178 = fsm1_out == 3'd2; +wire _guard179 = par0_done_out; +wire _guard180 = _guard178 & _guard179; +wire _guard181 = tdcc1_go_out; +wire _guard182 = _guard180 & _guard181; +wire _guard183 = pd_out; +wire _guard184 = tdcc_done_out; +wire _guard185 = _guard183 | _guard184; +wire _guard186 = ~_guard185; +wire _guard187 = par0_go_out; +wire _guard188 = _guard186 & _guard187; +wire _guard189 = invoke0_done_out; +wire _guard190 = ~_guard189; +wire _guard191 = fsm1_out == 3'd0; wire _guard192 = _guard190 & _guard191; -wire _guard193 = fsm2_out == 3'd5; -wire _guard194 = wrapper_early_reset_cond00_done_out; -wire _guard195 = comb_reg_out; -wire _guard196 = _guard194 & _guard195; -wire _guard197 = _guard193 & _guard196; -wire _guard198 = tdcc1_go_out; -wire _guard199 = _guard197 & _guard198; -wire _guard200 = _guard192 | _guard199; -wire _guard201 = fsm2_out == 3'd3; -wire _guard202 = upd2_done_out; -wire _guard203 = _guard201 & _guard202; -wire _guard204 = tdcc1_go_out; -wire _guard205 = _guard203 & _guard204; -wire _guard206 = fsm2_out == 3'd6; -wire _guard207 = fsm2_out == 3'd0; -wire _guard208 = invoke0_done_out; -wire _guard209 = _guard207 & _guard208; -wire _guard210 = tdcc1_go_out; -wire _guard211 = _guard209 & _guard210; -wire _guard212 = fsm2_out == 3'd2; -wire _guard213 = par0_done_out; -wire _guard214 = _guard212 & _guard213; -wire _guard215 = tdcc1_go_out; +wire _guard193 = tdcc1_go_out; +wire _guard194 = _guard192 & _guard193; +wire _guard195 = fsm0_out == 2'd2; +wire _guard196 = fsm0_out == 2'd0; +wire _guard197 = beg_spl_upd1_done_out; +wire _guard198 = _guard196 & _guard197; +wire _guard199 = tdcc0_go_out; +wire _guard200 = _guard198 & _guard199; +wire _guard201 = _guard195 | _guard200; +wire _guard202 = fsm0_out == 2'd1; +wire _guard203 = invoke2_done_out; +wire _guard204 = _guard202 & _guard203; +wire _guard205 = tdcc0_go_out; +wire _guard206 = _guard204 & _guard205; +wire _guard207 = _guard201 | _guard206; +wire _guard208 = fsm0_out == 2'd0; +wire _guard209 = beg_spl_upd1_done_out; +wire _guard210 = _guard208 & _guard209; +wire _guard211 = tdcc0_go_out; +wire _guard212 = _guard210 & _guard211; +wire _guard213 = fsm0_out == 2'd2; +wire _guard214 = fsm0_out == 2'd1; +wire _guard215 = invoke2_done_out; wire _guard216 = _guard214 & _guard215; -wire _guard217 = pd0_out; -wire _guard218 = tdcc0_done_out; -wire _guard219 = _guard217 | _guard218; -wire _guard220 = ~_guard219; -wire _guard221 = par0_go_out; -wire _guard222 = _guard220 & _guard221; -wire _guard223 = pd_out; -wire _guard224 = pd0_out; +wire _guard217 = tdcc0_go_out; +wire _guard218 = _guard216 & _guard217; +wire _guard219 = wrapper_early_reset_cond000_go_out; +wire _guard220 = pd0_out; +wire _guard221 = tdcc0_done_out; +wire _guard222 = _guard220 | _guard221; +wire _guard223 = ~_guard222; +wire _guard224 = par0_go_out; wire _guard225 = _guard223 & _guard224; -wire _guard226 = invoke1_done_out; -wire _guard227 = ~_guard226; -wire _guard228 = fsm0_out == 2'd1; -wire _guard229 = _guard227 & _guard228; -wire _guard230 = tdcc_go_out; -wire _guard231 = _guard229 & _guard230; -wire _guard232 = beg_spl_upd1_done_out; -wire _guard233 = ~_guard232; -wire _guard234 = fsm1_out == 2'd0; -wire _guard235 = _guard233 & _guard234; -wire _guard236 = tdcc0_go_out; -wire _guard237 = _guard235 & _guard236; -wire _guard238 = early_reset_cond00_go_out; -wire _guard239 = early_reset_cond00_go_out; -wire _guard240 = fsm_out == 1'd0; +wire _guard226 = pd_out; +wire _guard227 = pd0_out; +wire _guard228 = _guard226 & _guard227; +wire _guard229 = invoke1_done_out; +wire _guard230 = ~_guard229; +wire _guard231 = fsm_out == 2'd1; +wire _guard232 = _guard230 & _guard231; +wire _guard233 = tdcc_go_out; +wire _guard234 = _guard232 & _guard233; +wire _guard235 = beg_spl_upd1_done_out; +wire _guard236 = ~_guard235; +wire _guard237 = fsm0_out == 2'd0; +wire _guard238 = _guard236 & _guard237; +wire _guard239 = tdcc0_go_out; +wire _guard240 = _guard238 & _guard239; wire _guard241 = signal_reg_out; -wire _guard242 = _guard240 & _guard241; -wire _guard243 = fsm_out == 1'd0; +wire _guard242 = early_reset_cond000_go_out; +wire _guard243 = early_reset_cond000_go_out; wire _guard244 = signal_reg_out; -wire _guard245 = ~_guard244; -wire _guard246 = _guard243 & _guard245; -wire _guard247 = wrapper_early_reset_cond00_go_out; -wire _guard248 = _guard246 & _guard247; -wire _guard249 = _guard242 | _guard248; -wire _guard250 = fsm_out == 1'd0; -wire _guard251 = signal_reg_out; -wire _guard252 = ~_guard251; -wire _guard253 = _guard250 & _guard252; -wire _guard254 = wrapper_early_reset_cond00_go_out; -wire _guard255 = _guard253 & _guard254; -wire _guard256 = fsm_out == 1'd0; -wire _guard257 = signal_reg_out; -wire _guard258 = _guard256 & _guard257; -wire _guard259 = fsm2_out == 3'd6; +wire _guard245 = _guard0 & _guard0; +wire _guard246 = signal_reg_out; +wire _guard247 = ~_guard246; +wire _guard248 = _guard245 & _guard247; +wire _guard249 = wrapper_early_reset_cond000_go_out; +wire _guard250 = _guard248 & _guard249; +wire _guard251 = _guard244 | _guard250; +wire _guard252 = _guard0 & _guard0; +wire _guard253 = signal_reg_out; +wire _guard254 = ~_guard253; +wire _guard255 = _guard252 & _guard254; +wire _guard256 = wrapper_early_reset_cond000_go_out; +wire _guard257 = _guard255 & _guard256; +wire _guard258 = signal_reg_out; +wire _guard259 = fsm1_out == 3'd6; wire _guard260 = invoke2_go_out; wire _guard261 = invoke2_go_out; wire _guard262 = pd_out; @@ -10830,43 +10327,27 @@ wire _guard284 = _guard282 & _guard283; wire _guard285 = pd_out; wire _guard286 = pd0_out; wire _guard287 = _guard285 & _guard286; -wire _guard288 = wrapper_early_reset_cond00_done_out; -wire _guard289 = ~_guard288; -wire _guard290 = fsm2_out == 3'd1; -wire _guard291 = _guard289 & _guard290; -wire _guard292 = tdcc1_go_out; -wire _guard293 = _guard291 & _guard292; -wire _guard294 = wrapper_early_reset_cond00_done_out; -wire _guard295 = ~_guard294; -wire _guard296 = fsm2_out == 3'd5; -wire _guard297 = _guard295 & _guard296; -wire _guard298 = tdcc1_go_out; -wire _guard299 = _guard297 & _guard298; -wire _guard300 = _guard293 | _guard299; -wire _guard301 = fsm_out == 1'd0; -wire _guard302 = signal_reg_out; -wire _guard303 = _guard301 & _guard302; -wire _guard304 = fsm0_out == 2'd2; -wire _guard305 = upd2_done_out; -wire _guard306 = ~_guard305; -wire _guard307 = fsm2_out == 3'd3; +wire _guard288 = fsm_out == 2'd2; +wire _guard289 = upd2_done_out; +wire _guard290 = ~_guard289; +wire _guard291 = fsm1_out == 3'd3; +wire _guard292 = _guard290 & _guard291; +wire _guard293 = tdcc1_go_out; +wire _guard294 = _guard292 & _guard293; +wire _guard295 = invoke3_done_out; +wire _guard296 = ~_guard295; +wire _guard297 = fsm1_out == 3'd4; +wire _guard298 = _guard296 & _guard297; +wire _guard299 = tdcc1_go_out; +wire _guard300 = _guard298 & _guard299; +wire _guard301 = invoke1_go_out; +wire _guard302 = invoke1_go_out; +wire _guard303 = par0_done_out; +wire _guard304 = ~_guard303; +wire _guard305 = fsm1_out == 3'd2; +wire _guard306 = _guard304 & _guard305; +wire _guard307 = tdcc1_go_out; wire _guard308 = _guard306 & _guard307; -wire _guard309 = tdcc1_go_out; -wire _guard310 = _guard308 & _guard309; -wire _guard311 = invoke3_done_out; -wire _guard312 = ~_guard311; -wire _guard313 = fsm2_out == 3'd4; -wire _guard314 = _guard312 & _guard313; -wire _guard315 = tdcc1_go_out; -wire _guard316 = _guard314 & _guard315; -wire _guard317 = invoke1_go_out; -wire _guard318 = invoke1_go_out; -wire _guard319 = par0_done_out; -wire _guard320 = ~_guard319; -wire _guard321 = fsm2_out == 3'd2; -wire _guard322 = _guard320 & _guard321; -wire _guard323 = tdcc1_go_out; -wire _guard324 = _guard322 & _guard323; assign i0_write_en = _guard3; assign i0_clk = clk; assign i0_reset = reset; @@ -10875,92 +10356,83 @@ assign i0_in = _guard5 ? const0_out : 'x; assign upd2_done_in = Sum0_done; -assign early_reset_cond00_go_in = _guard6; assign add1_left = i0_out; assign add1_right = const2_out; -assign done = _guard9; +assign done = _guard8; assign B0_write_en = 1'd0; assign Sum0_addr0 = bit_slice_out; assign A0_write_en = 1'd0; assign B0_addr0 = bit_slice_out; -assign B0_content_en = _guard12; +assign B0_content_en = _guard11; assign A0_addr0 = bit_slice_out; -assign Sum0_write_en = _guard14; -assign Sum0_content_en = _guard15; +assign Sum0_write_en = _guard13; +assign Sum0_content_en = _guard14; assign Sum0_write_data = add0_out; -assign A0_content_en = _guard17; -assign fsm_write_en = _guard18; +assign A0_content_en = _guard16; +assign fsm_write_en = _guard29; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard22 ? adder_out : - _guard25 ? 1'd0 : - 1'd0; -assign adder_left = - _guard26 ? fsm_out : - 1'd0; -assign adder_right = _guard27; -assign beg_spl_upd0_go_in = _guard33; + _guard34 ? 2'd1 : + _guard35 ? 2'd0 : + _guard40 ? 2'd2 : + 2'd0; +assign beg_spl_upd0_go_in = _guard46; +assign early_reset_cond000_done_in = ud0_out; assign add0_left = B_read0_0_out; assign add0_right = A_read0_0_out; -assign invoke2_go_in = _guard41; -assign tdcc0_done_in = _guard42; -assign comb_reg_write_en = _guard43; +assign invoke2_go_in = _guard54; +assign tdcc0_done_in = _guard55; +assign comb_reg_write_en = _guard56; assign comb_reg_clk = clk; assign comb_reg_reset = reset; assign comb_reg_in = - _guard44 ? le0_out : + _guard57 ? le0_out : 1'd0; -assign early_reset_cond00_done_in = ud_out; -assign fsm1_write_en = _guard57; +assign wrapper_early_reset_cond000_go_in = _guard70; +assign fsm1_write_en = _guard129; assign fsm1_clk = clk; assign fsm1_reset = reset; assign fsm1_in = - _guard62 ? 2'd1 : - _guard63 ? 2'd0 : - _guard68 ? 2'd2 : - 2'd0; -assign tdcc_go_in = _guard74; -assign invoke0_go_in = _guard80; + _guard146 ? 3'd6 : + _guard151 ? 3'd5 : + _guard166 ? 3'd2 : + _guard171 ? 3'd4 : + _guard172 ? 3'd0 : + _guard177 ? 3'd1 : + _guard182 ? 3'd3 : + 3'd0; +assign tdcc_go_in = _guard188; +assign invoke0_go_in = _guard194; assign beg_spl_upd0_done_in = A0_done; assign bit_slice_in = i0_out; -assign fsm0_write_en = _guard93; +assign fsm0_write_en = _guard207; assign fsm0_clk = clk; assign fsm0_reset = reset; assign fsm0_in = - _guard98 ? 2'd1 : - _guard99 ? 2'd0 : - _guard104 ? 2'd2 : + _guard212 ? 2'd1 : + _guard213 ? 2'd0 : + _guard218 ? 2'd2 : 2'd0; -assign fsm2_write_en = _guard163; -assign fsm2_clk = clk; -assign fsm2_reset = reset; -assign fsm2_in = - _guard180 ? 3'd6 : - _guard185 ? 3'd5 : - _guard200 ? 3'd2 : - _guard205 ? 3'd4 : - _guard206 ? 3'd0 : - _guard211 ? 3'd1 : - _guard216 ? 3'd3 : - 3'd0; assign invoke3_done_in = i0_done; -assign tdcc0_go_in = _guard222; -assign par0_done_in = _guard225; +assign early_reset_cond000_go_in = _guard219; +assign tdcc0_go_in = _guard225; +assign par0_done_in = _guard228; assign invoke0_done_in = i0_done; -assign invoke1_go_in = _guard231; -assign beg_spl_upd1_go_in = _guard237; +assign invoke1_go_in = _guard234; +assign beg_spl_upd1_go_in = _guard240; +assign wrapper_early_reset_cond000_done_in = _guard241; assign le0_left = - _guard238 ? i0_out : + _guard242 ? i0_out : 4'd0; assign le0_right = - _guard239 ? const1_out : + _guard243 ? const1_out : 4'd0; -assign signal_reg_write_en = _guard249; +assign signal_reg_write_en = _guard251; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard255 ? 1'd1 : + _guard257 ? 1'd1 : _guard258 ? 1'd0 : 1'd0; assign invoke2_done_in = B_read0_0_done; @@ -10984,17 +10456,15 @@ assign pd0_in = _guard284 ? 1'd1 : _guard287 ? 1'd0 : 1'd0; -assign wrapper_early_reset_cond00_go_in = _guard300; -assign wrapper_early_reset_cond00_done_in = _guard303; -assign tdcc_done_in = _guard304; -assign upd2_go_in = _guard310; -assign invoke3_go_in = _guard316; +assign tdcc_done_in = _guard288; +assign upd2_go_in = _guard294; +assign invoke3_go_in = _guard300; assign invoke1_done_in = A_read0_0_done; assign tdcc1_go_in = go; -assign A_read0_0_write_en = _guard317; +assign A_read0_0_write_en = _guard301; assign A_read0_0_clk = clk; assign A_read0_0_reset = reset; assign A_read0_0_in = A0_read_data; -assign par0_go_in = _guard324; +assign par0_go_in = _guard308; // COMPONENT END: main endmodule diff --git a/yxi/tests/axi/read-compute-write/seq-mem-vec-add-axi-wrapped.expect b/yxi/tests/axi/read-compute-write/seq-mem-vec-add-axi-wrapped.expect index 8baa0b908c..d6f77e56a9 100644 --- a/yxi/tests/axi/read-compute-write/seq-mem-vec-add-axi-wrapped.expect +++ b/yxi/tests/axi/read-compute-write/seq-mem-vec-add-axi-wrapped.expect @@ -1338,76 +1338,76 @@ logic comb_reg_clk; logic comb_reg_reset; logic comb_reg_out; logic comb_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; -logic adder0_left; -logic adder0_right; -logic adder0_out; -logic adder1_left; -logic adder1_right; -logic adder1_out; -logic adder2_left; -logic adder2_right; -logic adder2_out; logic ud_out; -logic ud0_out; logic ud1_out; logic ud2_out; +logic ud3_out; logic signal_reg_in; logic signal_reg_write_en; logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [2:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [2:0] fsm0_out; -logic fsm0_done; +logic signal_reg0_in; +logic signal_reg0_write_en; +logic signal_reg0_clk; +logic signal_reg0_reset; +logic signal_reg0_out; +logic signal_reg0_done; +logic signal_reg1_in; +logic signal_reg1_write_en; +logic signal_reg1_clk; +logic signal_reg1_reset; +logic signal_reg1_out; +logic signal_reg1_done; +logic signal_reg2_in; +logic signal_reg2_write_en; +logic signal_reg2_clk; +logic signal_reg2_reset; +logic signal_reg2_out; +logic signal_reg2_done; +logic [2:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [2:0] fsm_out; +logic fsm_done; logic do_ar_transfer_go_in; logic do_ar_transfer_go_out; logic do_ar_transfer_done_in; logic do_ar_transfer_done_out; -logic early_reset_perform_reads_group0_go_in; -logic early_reset_perform_reads_group0_go_out; -logic early_reset_perform_reads_group0_done_in; -logic early_reset_perform_reads_group0_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic early_reset_static_par0_go_in; -logic early_reset_static_par0_go_out; -logic early_reset_static_par0_done_in; -logic early_reset_static_par0_done_out; -logic early_reset_static_par1_go_in; -logic early_reset_static_par1_go_out; -logic early_reset_static_par1_done_in; -logic early_reset_static_par1_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; -logic wrapper_early_reset_perform_reads_group0_go_in; -logic wrapper_early_reset_perform_reads_group0_go_out; -logic wrapper_early_reset_perform_reads_group0_done_in; -logic wrapper_early_reset_perform_reads_group0_done_out; -logic wrapper_early_reset_static_par0_go_in; -logic wrapper_early_reset_static_par0_go_out; -logic wrapper_early_reset_static_par0_done_in; -logic wrapper_early_reset_static_par0_done_out; -logic wrapper_early_reset_static_par1_go_in; -logic wrapper_early_reset_static_par1_go_out; -logic wrapper_early_reset_static_par1_done_in; -logic wrapper_early_reset_static_par1_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic early_reset_static_par_thread0_go_in; +logic early_reset_static_par_thread0_go_out; +logic early_reset_static_par_thread0_done_in; +logic early_reset_static_par_thread0_done_out; +logic early_reset_static_par_thread1_go_in; +logic early_reset_static_par_thread1_go_out; +logic early_reset_static_par_thread1_done_in; +logic early_reset_static_par_thread1_done_out; +logic early_reset_perform_reads_group00_go_in; +logic early_reset_perform_reads_group00_go_out; +logic early_reset_perform_reads_group00_done_in; +logic early_reset_perform_reads_group00_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; +logic wrapper_early_reset_perform_reads_group00_go_in; +logic wrapper_early_reset_perform_reads_group00_go_out; +logic wrapper_early_reset_perform_reads_group00_done_in; +logic wrapper_early_reset_perform_reads_group00_done_out; +logic wrapper_early_reset_static_par_thread0_go_in; +logic wrapper_early_reset_static_par_thread0_go_out; +logic wrapper_early_reset_static_par_thread0_done_in; +logic wrapper_early_reset_static_par_thread0_done_out; +logic wrapper_early_reset_static_par_thread1_go_in; +logic wrapper_early_reset_static_par_thread1_go_out; +logic wrapper_early_reset_static_par_thread1_done_in; +logic wrapper_early_reset_static_par_thread1_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -1492,54 +1492,11 @@ std_reg # ( .reset(comb_reg_reset), .write_en(comb_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); -std_add # ( - .WIDTH(1) -) adder0 ( - .left(adder0_left), - .out(adder0_out), - .right(adder0_right) -); -std_add # ( - .WIDTH(1) -) adder1 ( - .left(adder1_left), - .out(adder1_out), - .right(adder1_right) -); -std_add # ( - .WIDTH(1) -) adder2 ( - .left(adder2_left), - .out(adder2_out), - .right(adder2_right) -); undef # ( .WIDTH(1) ) ud ( .out(ud_out) ); -undef # ( - .WIDTH(1) -) ud0 ( - .out(ud0_out) -); undef # ( .WIDTH(1) ) ud1 ( @@ -1550,6 +1507,11 @@ undef # ( ) ud2 ( .out(ud2_out) ); +undef # ( + .WIDTH(1) +) ud3 ( + .out(ud3_out) +); std_reg # ( .WIDTH(1) ) signal_reg ( @@ -1560,15 +1522,45 @@ std_reg # ( .reset(signal_reg_reset), .write_en(signal_reg_write_en) ); +std_reg # ( + .WIDTH(1) +) signal_reg0 ( + .clk(signal_reg0_clk), + .done(signal_reg0_done), + .in(signal_reg0_in), + .out(signal_reg0_out), + .reset(signal_reg0_reset), + .write_en(signal_reg0_write_en) +); +std_reg # ( + .WIDTH(1) +) signal_reg1 ( + .clk(signal_reg1_clk), + .done(signal_reg1_done), + .in(signal_reg1_in), + .out(signal_reg1_out), + .reset(signal_reg1_reset), + .write_en(signal_reg1_write_en) +); +std_reg # ( + .WIDTH(1) +) signal_reg2 ( + .clk(signal_reg2_clk), + .done(signal_reg2_done), + .in(signal_reg2_in), + .out(signal_reg2_out), + .reset(signal_reg2_reset), + .write_en(signal_reg2_write_en) +); std_reg # ( .WIDTH(3) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -1584,99 +1576,99 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_perform_reads_group0_go ( - .in(early_reset_perform_reads_group0_go_in), - .out(early_reset_perform_reads_group0_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_perform_reads_group0_done ( - .in(early_reset_perform_reads_group0_done_in), - .out(early_reset_perform_reads_group0_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread0_go ( + .in(early_reset_static_par_thread0_go_in), + .out(early_reset_static_par_thread0_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread0_done ( + .in(early_reset_static_par_thread0_done_in), + .out(early_reset_static_par_thread0_done_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par0_go ( - .in(early_reset_static_par0_go_in), - .out(early_reset_static_par0_go_out) +) early_reset_static_par_thread1_go ( + .in(early_reset_static_par_thread1_go_in), + .out(early_reset_static_par_thread1_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par0_done ( - .in(early_reset_static_par0_done_in), - .out(early_reset_static_par0_done_out) +) early_reset_static_par_thread1_done ( + .in(early_reset_static_par_thread1_done_in), + .out(early_reset_static_par_thread1_done_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par1_go ( - .in(early_reset_static_par1_go_in), - .out(early_reset_static_par1_go_out) +) early_reset_perform_reads_group00_go ( + .in(early_reset_perform_reads_group00_go_in), + .out(early_reset_perform_reads_group00_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par1_done ( - .in(early_reset_static_par1_done_in), - .out(early_reset_static_par1_done_out) +) early_reset_perform_reads_group00_done ( + .in(early_reset_perform_reads_group00_done_in), + .out(early_reset_perform_reads_group00_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_perform_reads_group0_go ( - .in(wrapper_early_reset_perform_reads_group0_go_in), - .out(wrapper_early_reset_perform_reads_group0_go_out) +) wrapper_early_reset_perform_reads_group00_go ( + .in(wrapper_early_reset_perform_reads_group00_go_in), + .out(wrapper_early_reset_perform_reads_group00_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_perform_reads_group0_done ( - .in(wrapper_early_reset_perform_reads_group0_done_in), - .out(wrapper_early_reset_perform_reads_group0_done_out) +) wrapper_early_reset_perform_reads_group00_done ( + .in(wrapper_early_reset_perform_reads_group00_done_in), + .out(wrapper_early_reset_perform_reads_group00_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par0_go ( - .in(wrapper_early_reset_static_par0_go_in), - .out(wrapper_early_reset_static_par0_go_out) +) wrapper_early_reset_static_par_thread0_go ( + .in(wrapper_early_reset_static_par_thread0_go_in), + .out(wrapper_early_reset_static_par_thread0_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par0_done ( - .in(wrapper_early_reset_static_par0_done_in), - .out(wrapper_early_reset_static_par0_done_out) +) wrapper_early_reset_static_par_thread0_done ( + .in(wrapper_early_reset_static_par_thread0_done_in), + .out(wrapper_early_reset_static_par_thread0_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par1_go ( - .in(wrapper_early_reset_static_par1_go_in), - .out(wrapper_early_reset_static_par1_go_out) +) wrapper_early_reset_static_par_thread1_go ( + .in(wrapper_early_reset_static_par_thread1_go_in), + .out(wrapper_early_reset_static_par_thread1_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par1_done ( - .in(wrapper_early_reset_static_par1_done_in), - .out(wrapper_early_reset_static_par1_done_out) +) wrapper_early_reset_static_par_thread1_done ( + .in(wrapper_early_reset_static_par_thread1_done_in), + .out(wrapper_early_reset_static_par_thread1_done_out) ); std_wire # ( .WIDTH(1) @@ -1691,475 +1683,415 @@ std_wire # ( .out(tdcc_done_out) ); wire _guard0 = 1; -wire _guard1 = early_reset_static_par0_go_out; -wire _guard2 = early_reset_static_par0_go_out; -wire _guard3 = do_ar_transfer_done_out; +wire _guard1 = signal_reg1_out; +wire _guard2 = _guard0 & _guard0; +wire _guard3 = signal_reg1_out; wire _guard4 = ~_guard3; -wire _guard5 = fsm0_out == 3'd3; -wire _guard6 = _guard4 & _guard5; -wire _guard7 = tdcc_go_out; -wire _guard8 = _guard6 & _guard7; -wire _guard9 = tdcc_done_out; -wire _guard10 = do_ar_transfer_go_out; -wire _guard11 = do_ar_transfer_go_out; -wire _guard12 = do_ar_transfer_go_out; -wire _guard13 = do_ar_transfer_go_out; -wire _guard14 = do_ar_transfer_go_out; -wire _guard15 = early_reset_perform_reads_group0_go_out; -wire _guard16 = early_reset_static_par_go_out; -wire _guard17 = _guard15 | _guard16; -wire _guard18 = early_reset_static_par0_go_out; -wire _guard19 = _guard17 | _guard18; -wire _guard20 = early_reset_static_par1_go_out; -wire _guard21 = _guard19 | _guard20; -wire _guard22 = fsm_out == 1'd0; -wire _guard23 = ~_guard22; -wire _guard24 = early_reset_static_par0_go_out; -wire _guard25 = _guard23 & _guard24; -wire _guard26 = fsm_out == 1'd0; -wire _guard27 = ~_guard26; -wire _guard28 = early_reset_perform_reads_group0_go_out; -wire _guard29 = _guard27 & _guard28; -wire _guard30 = fsm_out == 1'd0; -wire _guard31 = ~_guard30; -wire _guard32 = early_reset_static_par1_go_out; +wire _guard5 = _guard2 & _guard4; +wire _guard6 = wrapper_early_reset_static_par_thread0_go_out; +wire _guard7 = _guard5 & _guard6; +wire _guard8 = _guard1 | _guard7; +wire _guard9 = _guard0 & _guard0; +wire _guard10 = signal_reg1_out; +wire _guard11 = ~_guard10; +wire _guard12 = _guard9 & _guard11; +wire _guard13 = wrapper_early_reset_static_par_thread0_go_out; +wire _guard14 = _guard12 & _guard13; +wire _guard15 = signal_reg1_out; +wire _guard16 = do_ar_transfer_done_out; +wire _guard17 = ~_guard16; +wire _guard18 = fsm_out == 3'd3; +wire _guard19 = _guard17 & _guard18; +wire _guard20 = tdcc_go_out; +wire _guard21 = _guard19 & _guard20; +wire _guard22 = tdcc_done_out; +wire _guard23 = do_ar_transfer_go_out; +wire _guard24 = do_ar_transfer_go_out; +wire _guard25 = do_ar_transfer_go_out; +wire _guard26 = do_ar_transfer_go_out; +wire _guard27 = do_ar_transfer_go_out; +wire _guard28 = fsm_out == 3'd6; +wire _guard29 = fsm_out == 3'd0; +wire _guard30 = wrapper_early_reset_static_par_thread_done_out; +wire _guard31 = _guard29 & _guard30; +wire _guard32 = tdcc_go_out; wire _guard33 = _guard31 & _guard32; -wire _guard34 = fsm_out == 1'd0; -wire _guard35 = early_reset_perform_reads_group0_go_out; -wire _guard36 = _guard34 & _guard35; -wire _guard37 = fsm_out == 1'd0; -wire _guard38 = early_reset_static_par_go_out; -wire _guard39 = _guard37 & _guard38; -wire _guard40 = _guard36 | _guard39; -wire _guard41 = fsm_out == 1'd0; -wire _guard42 = early_reset_static_par0_go_out; -wire _guard43 = _guard41 & _guard42; -wire _guard44 = _guard40 | _guard43; -wire _guard45 = fsm_out == 1'd0; -wire _guard46 = early_reset_static_par1_go_out; -wire _guard47 = _guard45 & _guard46; -wire _guard48 = _guard44 | _guard47; -wire _guard49 = fsm_out == 1'd0; -wire _guard50 = ~_guard49; -wire _guard51 = early_reset_static_par_go_out; -wire _guard52 = _guard50 & _guard51; -wire _guard53 = early_reset_perform_reads_group0_go_out; -wire _guard54 = early_reset_perform_reads_group0_go_out; -wire _guard55 = wrapper_early_reset_static_par0_go_out; -wire _guard56 = fsm_out == 1'd0; -wire _guard57 = signal_reg_out; -wire _guard58 = _guard56 & _guard57; -wire _guard59 = ar_handshake_occurred_out; -wire _guard60 = ~_guard59; -wire _guard61 = do_ar_transfer_go_out; -wire _guard62 = _guard60 & _guard61; -wire _guard63 = early_reset_static_par0_go_out; -wire _guard64 = _guard62 | _guard63; -wire _guard65 = arvalid_out; -wire _guard66 = ARREADY; +wire _guard34 = _guard28 | _guard33; +wire _guard35 = fsm_out == 3'd1; +wire _guard36 = wrapper_early_reset_perform_reads_group00_done_out; +wire _guard37 = comb_reg_out; +wire _guard38 = _guard36 & _guard37; +wire _guard39 = _guard35 & _guard38; +wire _guard40 = tdcc_go_out; +wire _guard41 = _guard39 & _guard40; +wire _guard42 = _guard34 | _guard41; +wire _guard43 = fsm_out == 3'd5; +wire _guard44 = wrapper_early_reset_perform_reads_group00_done_out; +wire _guard45 = comb_reg_out; +wire _guard46 = _guard44 & _guard45; +wire _guard47 = _guard43 & _guard46; +wire _guard48 = tdcc_go_out; +wire _guard49 = _guard47 & _guard48; +wire _guard50 = _guard42 | _guard49; +wire _guard51 = fsm_out == 3'd2; +wire _guard52 = wrapper_early_reset_static_par_thread0_done_out; +wire _guard53 = _guard51 & _guard52; +wire _guard54 = tdcc_go_out; +wire _guard55 = _guard53 & _guard54; +wire _guard56 = _guard50 | _guard55; +wire _guard57 = fsm_out == 3'd3; +wire _guard58 = do_ar_transfer_done_out; +wire _guard59 = _guard57 & _guard58; +wire _guard60 = tdcc_go_out; +wire _guard61 = _guard59 & _guard60; +wire _guard62 = _guard56 | _guard61; +wire _guard63 = fsm_out == 3'd4; +wire _guard64 = wrapper_early_reset_static_par_thread1_done_out; +wire _guard65 = _guard63 & _guard64; +wire _guard66 = tdcc_go_out; wire _guard67 = _guard65 & _guard66; -wire _guard68 = do_ar_transfer_go_out; -wire _guard69 = _guard67 & _guard68; -wire _guard70 = early_reset_static_par0_go_out; -wire _guard71 = early_reset_perform_reads_group0_go_out; -wire _guard72 = early_reset_perform_reads_group0_go_out; -wire _guard73 = early_reset_perform_reads_group0_go_out; -wire _guard74 = early_reset_perform_reads_group0_go_out; -wire _guard75 = early_reset_static_par_go_out; -wire _guard76 = early_reset_static_par_go_out; -wire _guard77 = wrapper_early_reset_static_par1_go_out; -wire _guard78 = wrapper_early_reset_static_par_done_out; -wire _guard79 = ~_guard78; -wire _guard80 = fsm0_out == 3'd0; -wire _guard81 = _guard79 & _guard80; -wire _guard82 = tdcc_go_out; -wire _guard83 = _guard81 & _guard82; -wire _guard84 = fsm_out == 1'd0; -wire _guard85 = signal_reg_out; -wire _guard86 = _guard84 & _guard85; -wire _guard87 = early_reset_static_par_go_out; -wire _guard88 = early_reset_static_par1_go_out; -wire _guard89 = _guard87 | _guard88; -wire _guard90 = early_reset_static_par_go_out; -wire _guard91 = early_reset_static_par1_go_out; -wire _guard92 = fsm_out == 1'd0; -wire _guard93 = signal_reg_out; +wire _guard68 = _guard62 | _guard67; +wire _guard69 = fsm_out == 3'd1; +wire _guard70 = wrapper_early_reset_perform_reads_group00_done_out; +wire _guard71 = comb_reg_out; +wire _guard72 = ~_guard71; +wire _guard73 = _guard70 & _guard72; +wire _guard74 = _guard69 & _guard73; +wire _guard75 = tdcc_go_out; +wire _guard76 = _guard74 & _guard75; +wire _guard77 = _guard68 | _guard76; +wire _guard78 = fsm_out == 3'd5; +wire _guard79 = wrapper_early_reset_perform_reads_group00_done_out; +wire _guard80 = comb_reg_out; +wire _guard81 = ~_guard80; +wire _guard82 = _guard79 & _guard81; +wire _guard83 = _guard78 & _guard82; +wire _guard84 = tdcc_go_out; +wire _guard85 = _guard83 & _guard84; +wire _guard86 = _guard77 | _guard85; +wire _guard87 = fsm_out == 3'd1; +wire _guard88 = wrapper_early_reset_perform_reads_group00_done_out; +wire _guard89 = comb_reg_out; +wire _guard90 = ~_guard89; +wire _guard91 = _guard88 & _guard90; +wire _guard92 = _guard87 & _guard91; +wire _guard93 = tdcc_go_out; wire _guard94 = _guard92 & _guard93; -wire _guard95 = early_reset_static_par1_go_out; -wire _guard96 = early_reset_static_par1_go_out; -wire _guard97 = fsm0_out == 3'd6; -wire _guard98 = fsm0_out == 3'd0; -wire _guard99 = wrapper_early_reset_static_par_done_out; -wire _guard100 = _guard98 & _guard99; +wire _guard95 = fsm_out == 3'd5; +wire _guard96 = wrapper_early_reset_perform_reads_group00_done_out; +wire _guard97 = comb_reg_out; +wire _guard98 = ~_guard97; +wire _guard99 = _guard96 & _guard98; +wire _guard100 = _guard95 & _guard99; wire _guard101 = tdcc_go_out; wire _guard102 = _guard100 & _guard101; -wire _guard103 = _guard97 | _guard102; -wire _guard104 = fsm0_out == 3'd1; -wire _guard105 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard106 = comb_reg_out; -wire _guard107 = _guard105 & _guard106; -wire _guard108 = _guard104 & _guard107; -wire _guard109 = tdcc_go_out; -wire _guard110 = _guard108 & _guard109; -wire _guard111 = _guard103 | _guard110; -wire _guard112 = fsm0_out == 3'd5; -wire _guard113 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard114 = comb_reg_out; +wire _guard103 = _guard94 | _guard102; +wire _guard104 = fsm_out == 3'd4; +wire _guard105 = wrapper_early_reset_static_par_thread1_done_out; +wire _guard106 = _guard104 & _guard105; +wire _guard107 = tdcc_go_out; +wire _guard108 = _guard106 & _guard107; +wire _guard109 = fsm_out == 3'd1; +wire _guard110 = wrapper_early_reset_perform_reads_group00_done_out; +wire _guard111 = comb_reg_out; +wire _guard112 = _guard110 & _guard111; +wire _guard113 = _guard109 & _guard112; +wire _guard114 = tdcc_go_out; wire _guard115 = _guard113 & _guard114; -wire _guard116 = _guard112 & _guard115; -wire _guard117 = tdcc_go_out; -wire _guard118 = _guard116 & _guard117; -wire _guard119 = _guard111 | _guard118; -wire _guard120 = fsm0_out == 3'd2; -wire _guard121 = wrapper_early_reset_static_par0_done_out; +wire _guard116 = fsm_out == 3'd5; +wire _guard117 = wrapper_early_reset_perform_reads_group00_done_out; +wire _guard118 = comb_reg_out; +wire _guard119 = _guard117 & _guard118; +wire _guard120 = _guard116 & _guard119; +wire _guard121 = tdcc_go_out; wire _guard122 = _guard120 & _guard121; -wire _guard123 = tdcc_go_out; -wire _guard124 = _guard122 & _guard123; -wire _guard125 = _guard119 | _guard124; -wire _guard126 = fsm0_out == 3'd3; -wire _guard127 = do_ar_transfer_done_out; +wire _guard123 = _guard115 | _guard122; +wire _guard124 = fsm_out == 3'd3; +wire _guard125 = do_ar_transfer_done_out; +wire _guard126 = _guard124 & _guard125; +wire _guard127 = tdcc_go_out; wire _guard128 = _guard126 & _guard127; -wire _guard129 = tdcc_go_out; -wire _guard130 = _guard128 & _guard129; -wire _guard131 = _guard125 | _guard130; -wire _guard132 = fsm0_out == 3'd4; -wire _guard133 = wrapper_early_reset_static_par1_done_out; -wire _guard134 = _guard132 & _guard133; -wire _guard135 = tdcc_go_out; -wire _guard136 = _guard134 & _guard135; -wire _guard137 = _guard131 | _guard136; -wire _guard138 = fsm0_out == 3'd1; -wire _guard139 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard140 = comb_reg_out; -wire _guard141 = ~_guard140; -wire _guard142 = _guard139 & _guard141; -wire _guard143 = _guard138 & _guard142; -wire _guard144 = tdcc_go_out; -wire _guard145 = _guard143 & _guard144; -wire _guard146 = _guard137 | _guard145; -wire _guard147 = fsm0_out == 3'd5; -wire _guard148 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard149 = comb_reg_out; -wire _guard150 = ~_guard149; -wire _guard151 = _guard148 & _guard150; -wire _guard152 = _guard147 & _guard151; -wire _guard153 = tdcc_go_out; -wire _guard154 = _guard152 & _guard153; -wire _guard155 = _guard146 | _guard154; -wire _guard156 = fsm0_out == 3'd1; -wire _guard157 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard158 = comb_reg_out; -wire _guard159 = ~_guard158; -wire _guard160 = _guard157 & _guard159; -wire _guard161 = _guard156 & _guard160; -wire _guard162 = tdcc_go_out; -wire _guard163 = _guard161 & _guard162; -wire _guard164 = fsm0_out == 3'd5; -wire _guard165 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard166 = comb_reg_out; -wire _guard167 = ~_guard166; -wire _guard168 = _guard165 & _guard167; -wire _guard169 = _guard164 & _guard168; -wire _guard170 = tdcc_go_out; +wire _guard129 = fsm_out == 3'd0; +wire _guard130 = wrapper_early_reset_static_par_thread_done_out; +wire _guard131 = _guard129 & _guard130; +wire _guard132 = tdcc_go_out; +wire _guard133 = _guard131 & _guard132; +wire _guard134 = fsm_out == 3'd6; +wire _guard135 = fsm_out == 3'd2; +wire _guard136 = wrapper_early_reset_static_par_thread0_done_out; +wire _guard137 = _guard135 & _guard136; +wire _guard138 = tdcc_go_out; +wire _guard139 = _guard137 & _guard138; +wire _guard140 = wrapper_early_reset_static_par_thread1_go_out; +wire _guard141 = ar_handshake_occurred_out; +wire _guard142 = ~_guard141; +wire _guard143 = do_ar_transfer_go_out; +wire _guard144 = _guard142 & _guard143; +wire _guard145 = early_reset_static_par_thread0_go_out; +wire _guard146 = _guard144 | _guard145; +wire _guard147 = arvalid_out; +wire _guard148 = ARREADY; +wire _guard149 = _guard147 & _guard148; +wire _guard150 = do_ar_transfer_go_out; +wire _guard151 = _guard149 & _guard150; +wire _guard152 = early_reset_static_par_thread0_go_out; +wire _guard153 = signal_reg0_out; +wire _guard154 = _guard0 & _guard0; +wire _guard155 = signal_reg0_out; +wire _guard156 = ~_guard155; +wire _guard157 = _guard154 & _guard156; +wire _guard158 = wrapper_early_reset_perform_reads_group00_go_out; +wire _guard159 = _guard157 & _guard158; +wire _guard160 = _guard153 | _guard159; +wire _guard161 = _guard0 & _guard0; +wire _guard162 = signal_reg0_out; +wire _guard163 = ~_guard162; +wire _guard164 = _guard161 & _guard163; +wire _guard165 = wrapper_early_reset_perform_reads_group00_go_out; +wire _guard166 = _guard164 & _guard165; +wire _guard167 = signal_reg0_out; +wire _guard168 = wrapper_early_reset_static_par_thread_done_out; +wire _guard169 = ~_guard168; +wire _guard170 = fsm_out == 3'd0; wire _guard171 = _guard169 & _guard170; -wire _guard172 = _guard163 | _guard171; -wire _guard173 = fsm0_out == 3'd4; -wire _guard174 = wrapper_early_reset_static_par1_done_out; -wire _guard175 = _guard173 & _guard174; -wire _guard176 = tdcc_go_out; -wire _guard177 = _guard175 & _guard176; -wire _guard178 = fsm0_out == 3'd1; -wire _guard179 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard180 = comb_reg_out; -wire _guard181 = _guard179 & _guard180; -wire _guard182 = _guard178 & _guard181; -wire _guard183 = tdcc_go_out; -wire _guard184 = _guard182 & _guard183; -wire _guard185 = fsm0_out == 3'd5; -wire _guard186 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard187 = comb_reg_out; -wire _guard188 = _guard186 & _guard187; -wire _guard189 = _guard185 & _guard188; +wire _guard172 = tdcc_go_out; +wire _guard173 = _guard171 & _guard172; +wire _guard174 = early_reset_perform_reads_group00_go_out; +wire _guard175 = early_reset_perform_reads_group00_go_out; +wire _guard176 = early_reset_perform_reads_group00_go_out; +wire _guard177 = early_reset_perform_reads_group00_go_out; +wire _guard178 = early_reset_static_par_thread_go_out; +wire _guard179 = early_reset_static_par_thread_go_out; +wire _guard180 = wrapper_early_reset_perform_reads_group00_done_out; +wire _guard181 = ~_guard180; +wire _guard182 = fsm_out == 3'd1; +wire _guard183 = _guard181 & _guard182; +wire _guard184 = tdcc_go_out; +wire _guard185 = _guard183 & _guard184; +wire _guard186 = wrapper_early_reset_perform_reads_group00_done_out; +wire _guard187 = ~_guard186; +wire _guard188 = fsm_out == 3'd5; +wire _guard189 = _guard187 & _guard188; wire _guard190 = tdcc_go_out; wire _guard191 = _guard189 & _guard190; -wire _guard192 = _guard184 | _guard191; -wire _guard193 = fsm0_out == 3'd3; -wire _guard194 = do_ar_transfer_done_out; -wire _guard195 = _guard193 & _guard194; -wire _guard196 = tdcc_go_out; -wire _guard197 = _guard195 & _guard196; -wire _guard198 = fsm0_out == 3'd0; -wire _guard199 = wrapper_early_reset_static_par_done_out; -wire _guard200 = _guard198 & _guard199; -wire _guard201 = tdcc_go_out; -wire _guard202 = _guard200 & _guard201; -wire _guard203 = fsm0_out == 3'd6; -wire _guard204 = fsm0_out == 3'd2; -wire _guard205 = wrapper_early_reset_static_par0_done_out; +wire _guard192 = _guard185 | _guard191; +wire _guard193 = early_reset_static_par_thread_go_out; +wire _guard194 = early_reset_static_par_thread1_go_out; +wire _guard195 = _guard193 | _guard194; +wire _guard196 = early_reset_static_par_thread_go_out; +wire _guard197 = early_reset_static_par_thread1_go_out; +wire _guard198 = signal_reg0_out; +wire _guard199 = wrapper_early_reset_perform_reads_group00_go_out; +wire _guard200 = signal_reg2_out; +wire _guard201 = _guard0 & _guard0; +wire _guard202 = signal_reg2_out; +wire _guard203 = ~_guard202; +wire _guard204 = _guard201 & _guard203; +wire _guard205 = wrapper_early_reset_static_par_thread1_go_out; wire _guard206 = _guard204 & _guard205; -wire _guard207 = tdcc_go_out; -wire _guard208 = _guard206 & _guard207; -wire _guard209 = early_reset_static_par_go_out; -wire _guard210 = early_reset_static_par_go_out; -wire _guard211 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard212 = ~_guard211; -wire _guard213 = fsm0_out == 3'd1; -wire _guard214 = _guard212 & _guard213; -wire _guard215 = tdcc_go_out; -wire _guard216 = _guard214 & _guard215; -wire _guard217 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard218 = ~_guard217; -wire _guard219 = fsm0_out == 3'd5; +wire _guard207 = _guard200 | _guard206; +wire _guard208 = _guard0 & _guard0; +wire _guard209 = signal_reg2_out; +wire _guard210 = ~_guard209; +wire _guard211 = _guard208 & _guard210; +wire _guard212 = wrapper_early_reset_static_par_thread1_go_out; +wire _guard213 = _guard211 & _guard212; +wire _guard214 = signal_reg2_out; +wire _guard215 = wrapper_early_reset_static_par_thread0_done_out; +wire _guard216 = ~_guard215; +wire _guard217 = fsm_out == 3'd2; +wire _guard218 = _guard216 & _guard217; +wire _guard219 = tdcc_go_out; wire _guard220 = _guard218 & _guard219; -wire _guard221 = tdcc_go_out; -wire _guard222 = _guard220 & _guard221; -wire _guard223 = _guard216 | _guard222; -wire _guard224 = do_ar_transfer_go_out; -wire _guard225 = early_reset_static_par0_go_out; -wire _guard226 = _guard224 | _guard225; -wire _guard227 = ARREADY; -wire _guard228 = arvalid_out; -wire _guard229 = _guard227 & _guard228; -wire _guard230 = do_ar_transfer_go_out; +wire _guard221 = do_ar_transfer_go_out; +wire _guard222 = early_reset_static_par_thread0_go_out; +wire _guard223 = _guard221 | _guard222; +wire _guard224 = ARREADY; +wire _guard225 = arvalid_out; +wire _guard226 = _guard224 & _guard225; +wire _guard227 = do_ar_transfer_go_out; +wire _guard228 = _guard226 & _guard227; +wire _guard229 = ARREADY; +wire _guard230 = arvalid_out; wire _guard231 = _guard229 & _guard230; -wire _guard232 = ARREADY; -wire _guard233 = arvalid_out; +wire _guard232 = ~_guard231; +wire _guard233 = do_ar_transfer_go_out; wire _guard234 = _guard232 & _guard233; -wire _guard235 = ~_guard234; -wire _guard236 = do_ar_transfer_go_out; -wire _guard237 = _guard235 & _guard236; -wire _guard238 = early_reset_static_par0_go_out; -wire _guard239 = _guard237 | _guard238; -wire _guard240 = fsm_out == 1'd0; -wire _guard241 = signal_reg_out; -wire _guard242 = _guard240 & _guard241; -wire _guard243 = fsm_out == 1'd0; -wire _guard244 = signal_reg_out; -wire _guard245 = ~_guard244; -wire _guard246 = _guard243 & _guard245; -wire _guard247 = wrapper_early_reset_static_par_go_out; -wire _guard248 = _guard246 & _guard247; -wire _guard249 = _guard242 | _guard248; -wire _guard250 = fsm_out == 1'd0; +wire _guard235 = early_reset_static_par_thread0_go_out; +wire _guard236 = _guard234 | _guard235; +wire _guard237 = signal_reg_out; +wire _guard238 = _guard0 & _guard0; +wire _guard239 = signal_reg_out; +wire _guard240 = ~_guard239; +wire _guard241 = _guard238 & _guard240; +wire _guard242 = wrapper_early_reset_static_par_thread_go_out; +wire _guard243 = _guard241 & _guard242; +wire _guard244 = _guard237 | _guard243; +wire _guard245 = _guard0 & _guard0; +wire _guard246 = signal_reg_out; +wire _guard247 = ~_guard246; +wire _guard248 = _guard245 & _guard247; +wire _guard249 = wrapper_early_reset_static_par_thread_go_out; +wire _guard250 = _guard248 & _guard249; wire _guard251 = signal_reg_out; -wire _guard252 = ~_guard251; -wire _guard253 = _guard250 & _guard252; -wire _guard254 = wrapper_early_reset_perform_reads_group0_go_out; -wire _guard255 = _guard253 & _guard254; -wire _guard256 = _guard249 | _guard255; -wire _guard257 = fsm_out == 1'd0; -wire _guard258 = signal_reg_out; -wire _guard259 = ~_guard258; -wire _guard260 = _guard257 & _guard259; -wire _guard261 = wrapper_early_reset_static_par0_go_out; -wire _guard262 = _guard260 & _guard261; -wire _guard263 = _guard256 | _guard262; -wire _guard264 = fsm_out == 1'd0; -wire _guard265 = signal_reg_out; -wire _guard266 = ~_guard265; -wire _guard267 = _guard264 & _guard266; -wire _guard268 = wrapper_early_reset_static_par1_go_out; -wire _guard269 = _guard267 & _guard268; -wire _guard270 = _guard263 | _guard269; -wire _guard271 = fsm_out == 1'd0; -wire _guard272 = signal_reg_out; -wire _guard273 = ~_guard272; -wire _guard274 = _guard271 & _guard273; -wire _guard275 = wrapper_early_reset_static_par_go_out; +wire _guard252 = wrapper_early_reset_static_par_thread_go_out; +wire _guard253 = signal_reg1_out; +wire _guard254 = wrapper_early_reset_static_par_thread1_done_out; +wire _guard255 = ~_guard254; +wire _guard256 = fsm_out == 3'd4; +wire _guard257 = _guard255 & _guard256; +wire _guard258 = tdcc_go_out; +wire _guard259 = _guard257 & _guard258; +wire _guard260 = wrapper_early_reset_static_par_thread0_go_out; +wire _guard261 = signal_reg_out; +wire _guard262 = do_ar_transfer_go_out; +wire _guard263 = early_reset_static_par_thread1_go_out; +wire _guard264 = _guard262 | _guard263; +wire _guard265 = arvalid_out; +wire _guard266 = ARREADY; +wire _guard267 = _guard265 & _guard266; +wire _guard268 = ~_guard267; +wire _guard269 = ar_handshake_occurred_out; +wire _guard270 = ~_guard269; +wire _guard271 = _guard268 & _guard270; +wire _guard272 = do_ar_transfer_go_out; +wire _guard273 = _guard271 & _guard272; +wire _guard274 = arvalid_out; +wire _guard275 = ARREADY; wire _guard276 = _guard274 & _guard275; -wire _guard277 = fsm_out == 1'd0; -wire _guard278 = signal_reg_out; -wire _guard279 = ~_guard278; -wire _guard280 = _guard277 & _guard279; -wire _guard281 = wrapper_early_reset_perform_reads_group0_go_out; -wire _guard282 = _guard280 & _guard281; -wire _guard283 = _guard276 | _guard282; -wire _guard284 = fsm_out == 1'd0; -wire _guard285 = signal_reg_out; -wire _guard286 = ~_guard285; -wire _guard287 = _guard284 & _guard286; -wire _guard288 = wrapper_early_reset_static_par0_go_out; -wire _guard289 = _guard287 & _guard288; -wire _guard290 = _guard283 | _guard289; -wire _guard291 = fsm_out == 1'd0; -wire _guard292 = signal_reg_out; -wire _guard293 = ~_guard292; -wire _guard294 = _guard291 & _guard293; -wire _guard295 = wrapper_early_reset_static_par1_go_out; -wire _guard296 = _guard294 & _guard295; -wire _guard297 = _guard290 | _guard296; -wire _guard298 = fsm_out == 1'd0; -wire _guard299 = signal_reg_out; -wire _guard300 = _guard298 & _guard299; -wire _guard301 = wrapper_early_reset_perform_reads_group0_go_out; -wire _guard302 = do_ar_transfer_go_out; -wire _guard303 = early_reset_static_par1_go_out; -wire _guard304 = _guard302 | _guard303; -wire _guard305 = arvalid_out; -wire _guard306 = ARREADY; -wire _guard307 = _guard305 & _guard306; -wire _guard308 = ~_guard307; -wire _guard309 = ar_handshake_occurred_out; -wire _guard310 = ~_guard309; -wire _guard311 = _guard308 & _guard310; -wire _guard312 = do_ar_transfer_go_out; -wire _guard313 = _guard311 & _guard312; -wire _guard314 = arvalid_out; -wire _guard315 = ARREADY; -wire _guard316 = _guard314 & _guard315; -wire _guard317 = ar_handshake_occurred_out; -wire _guard318 = _guard316 | _guard317; -wire _guard319 = do_ar_transfer_go_out; -wire _guard320 = _guard318 & _guard319; -wire _guard321 = early_reset_static_par1_go_out; -wire _guard322 = _guard320 | _guard321; -wire _guard323 = early_reset_static_par1_go_out; -wire _guard324 = early_reset_static_par1_go_out; -wire _guard325 = wrapper_early_reset_static_par0_done_out; -wire _guard326 = ~_guard325; -wire _guard327 = fsm0_out == 3'd2; -wire _guard328 = _guard326 & _guard327; -wire _guard329 = tdcc_go_out; -wire _guard330 = _guard328 & _guard329; -wire _guard331 = fsm_out == 1'd0; -wire _guard332 = signal_reg_out; -wire _guard333 = _guard331 & _guard332; -wire _guard334 = wrapper_early_reset_static_par1_done_out; -wire _guard335 = ~_guard334; -wire _guard336 = fsm0_out == 3'd4; -wire _guard337 = _guard335 & _guard336; -wire _guard338 = tdcc_go_out; -wire _guard339 = _guard337 & _guard338; -wire _guard340 = fsm0_out == 3'd6; -wire _guard341 = wrapper_early_reset_static_par_go_out; -assign adder1_left = - _guard1 ? fsm_out : +wire _guard277 = ar_handshake_occurred_out; +wire _guard278 = _guard276 | _guard277; +wire _guard279 = do_ar_transfer_go_out; +wire _guard280 = _guard278 & _guard279; +wire _guard281 = early_reset_static_par_thread1_go_out; +wire _guard282 = _guard280 | _guard281; +wire _guard283 = early_reset_static_par_thread1_go_out; +wire _guard284 = early_reset_static_par_thread1_go_out; +wire _guard285 = fsm_out == 3'd6; +wire _guard286 = signal_reg2_out; +assign signal_reg1_write_en = _guard8; +assign signal_reg1_clk = clk; +assign signal_reg1_reset = reset; +assign signal_reg1_in = + _guard14 ? 1'd1 : + _guard15 ? 1'd0 : 1'd0; -assign adder1_right = _guard2; -assign do_ar_transfer_go_in = _guard8; -assign done = _guard9; +assign do_ar_transfer_go_in = _guard21; +assign done = _guard22; assign ARPROT = - _guard10 ? 3'd6 : + _guard23 ? 3'd6 : 3'd0; assign ARSIZE = - _guard11 ? 3'd2 : + _guard24 ? 3'd2 : 3'd0; assign ARLEN = - _guard12 ? arlen_out : + _guard25 ? arlen_out : 8'd0; assign ARADDR = - _guard13 ? curr_addr_axi_out : + _guard26 ? curr_addr_axi_out : 64'd0; assign ARBURST = - _guard14 ? 2'd1 : + _guard27 ? 2'd1 : 2'd0; assign ARVALID = arvalid_out; -assign fsm_write_en = _guard21; +assign fsm_write_en = _guard86; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard25 ? adder1_out : - _guard29 ? adder_out : - _guard33 ? adder2_out : - _guard48 ? 1'd0 : - _guard52 ? adder0_out : - 1'd0; -assign adder_left = - _guard53 ? fsm_out : - 1'd0; -assign adder_right = _guard54; -assign early_reset_static_par0_go_in = _guard55; -assign wrapper_early_reset_static_par1_done_in = _guard58; -assign ar_handshake_occurred_write_en = _guard64; + _guard103 ? 3'd6 : + _guard108 ? 3'd5 : + _guard123 ? 3'd2 : + _guard128 ? 3'd4 : + _guard133 ? 3'd1 : + _guard134 ? 3'd0 : + _guard139 ? 3'd3 : + 3'd0; +assign early_reset_static_par_thread1_go_in = _guard140; +assign ar_handshake_occurred_write_en = _guard146; assign ar_handshake_occurred_clk = clk; assign ar_handshake_occurred_reset = reset; assign ar_handshake_occurred_in = - _guard69 ? 1'd1 : - _guard70 ? 1'd0 : + _guard151 ? 1'd1 : + _guard152 ? 1'd0 : 'x; -assign comb_reg_write_en = _guard71; +assign signal_reg0_write_en = _guard160; +assign signal_reg0_clk = clk; +assign signal_reg0_reset = reset; +assign signal_reg0_in = + _guard166 ? 1'd1 : + _guard167 ? 1'd0 : + 1'd0; +assign wrapper_early_reset_static_par_thread_go_in = _guard173; +assign comb_reg_write_en = _guard174; assign comb_reg_clk = clk; assign comb_reg_reset = reset; assign comb_reg_in = - _guard72 ? perform_reads_out : + _guard175 ? perform_reads_out : 1'd0; -assign early_reset_perform_reads_group0_done_in = ud_out; +assign early_reset_static_par_thread0_done_in = ud1_out; assign perform_reads_left = - _guard73 ? txn_count_out : + _guard176 ? txn_count_out : 32'd0; assign perform_reads_right = - _guard74 ? txn_n_out : + _guard177 ? txn_n_out : 32'd0; -assign arlen_write_en = _guard75; +assign arlen_write_en = _guard178; assign arlen_clk = clk; assign arlen_reset = reset; assign arlen_in = 8'd7; -assign early_reset_static_par1_go_in = _guard77; -assign wrapper_early_reset_static_par_go_in = _guard83; -assign wrapper_early_reset_perform_reads_group0_done_in = _guard86; -assign txn_count_write_en = _guard89; +assign wrapper_early_reset_perform_reads_group00_go_in = _guard192; +assign txn_count_write_en = _guard195; assign txn_count_clk = clk; assign txn_count_reset = reset; assign txn_count_in = - _guard90 ? 32'd0 : - _guard91 ? txn_adder_out : + _guard196 ? 32'd0 : + _guard197 ? txn_adder_out : 'x; -assign early_reset_static_par0_done_in = ud1_out; -assign wrapper_early_reset_static_par_done_in = _guard94; +assign wrapper_early_reset_perform_reads_group00_done_in = _guard198; assign tdcc_go_in = go; -assign adder2_left = - _guard95 ? fsm_out : - 1'd0; -assign adder2_right = _guard96; -assign fsm0_write_en = _guard155; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard172 ? 3'd6 : - _guard177 ? 3'd5 : - _guard192 ? 3'd2 : - _guard197 ? 3'd4 : - _guard202 ? 3'd1 : - _guard203 ? 3'd0 : - _guard208 ? 3'd3 : - 3'd0; -assign adder0_left = - _guard209 ? fsm_out : +assign early_reset_static_par_thread1_done_in = ud2_out; +assign early_reset_perform_reads_group00_go_in = _guard199; +assign signal_reg2_write_en = _guard207; +assign signal_reg2_clk = clk; +assign signal_reg2_reset = reset; +assign signal_reg2_in = + _guard213 ? 1'd1 : + _guard214 ? 1'd0 : 1'd0; -assign adder0_right = _guard210; -assign early_reset_static_par_done_in = ud0_out; -assign wrapper_early_reset_perform_reads_group0_go_in = _guard223; -assign bt_reg_write_en = _guard226; +assign wrapper_early_reset_static_par_thread0_go_in = _guard220; +assign bt_reg_write_en = _guard223; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard231 ? 1'd1 : - _guard239 ? 1'd0 : + _guard228 ? 1'd1 : + _guard236 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard270; +assign signal_reg_write_en = _guard244; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard297 ? 1'd1 : - _guard300 ? 1'd0 : + _guard250 ? 1'd1 : + _guard251 ? 1'd0 : 1'd0; -assign early_reset_perform_reads_group0_go_in = _guard301; -assign arvalid_write_en = _guard304; +assign early_reset_static_par_thread_go_in = _guard252; +assign wrapper_early_reset_static_par_thread0_done_in = _guard253; +assign wrapper_early_reset_static_par_thread1_go_in = _guard259; +assign early_reset_static_par_thread0_go_in = _guard260; +assign wrapper_early_reset_static_par_thread_done_in = _guard261; +assign arvalid_write_en = _guard264; assign arvalid_clk = clk; assign arvalid_reset = reset; assign arvalid_in = - _guard313 ? 1'd1 : - _guard322 ? 1'd0 : + _guard273 ? 1'd1 : + _guard282 ? 1'd0 : 'x; assign txn_adder_left = txn_count_out; assign txn_adder_right = 32'd1; -assign wrapper_early_reset_static_par0_go_in = _guard330; -assign wrapper_early_reset_static_par0_done_in = _guard333; -assign wrapper_early_reset_static_par1_go_in = _guard339; -assign tdcc_done_in = _guard340; -assign early_reset_static_par_go_in = _guard341; +assign tdcc_done_in = _guard285; +assign early_reset_perform_reads_group00_done_in = ud3_out; +assign wrapper_early_reset_static_par_thread1_done_in = _guard286; +assign early_reset_static_par_thread_done_in = ud_out; assign do_ar_transfer_done_in = bt_reg_out; -assign early_reset_static_par1_done_in = ud2_out; // COMPONENT END: m_ar_channel endmodule module m_aw_channel( @@ -2228,76 +2160,76 @@ logic comb_reg_clk; logic comb_reg_reset; logic comb_reg_out; logic comb_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; -logic adder0_left; -logic adder0_right; -logic adder0_out; -logic adder1_left; -logic adder1_right; -logic adder1_out; -logic adder2_left; -logic adder2_right; -logic adder2_out; logic ud_out; -logic ud0_out; logic ud1_out; logic ud2_out; +logic ud3_out; logic signal_reg_in; logic signal_reg_write_en; logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [2:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [2:0] fsm0_out; -logic fsm0_done; +logic signal_reg0_in; +logic signal_reg0_write_en; +logic signal_reg0_clk; +logic signal_reg0_reset; +logic signal_reg0_out; +logic signal_reg0_done; +logic signal_reg1_in; +logic signal_reg1_write_en; +logic signal_reg1_clk; +logic signal_reg1_reset; +logic signal_reg1_out; +logic signal_reg1_done; +logic signal_reg2_in; +logic signal_reg2_write_en; +logic signal_reg2_clk; +logic signal_reg2_reset; +logic signal_reg2_out; +logic signal_reg2_done; +logic [2:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [2:0] fsm_out; +logic fsm_done; logic do_aw_transfer_go_in; logic do_aw_transfer_go_out; logic do_aw_transfer_done_in; logic do_aw_transfer_done_out; -logic early_reset_perform_writes_group0_go_in; -logic early_reset_perform_writes_group0_go_out; -logic early_reset_perform_writes_group0_done_in; -logic early_reset_perform_writes_group0_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic early_reset_static_par0_go_in; -logic early_reset_static_par0_go_out; -logic early_reset_static_par0_done_in; -logic early_reset_static_par0_done_out; -logic early_reset_static_par1_go_in; -logic early_reset_static_par1_go_out; -logic early_reset_static_par1_done_in; -logic early_reset_static_par1_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; -logic wrapper_early_reset_perform_writes_group0_go_in; -logic wrapper_early_reset_perform_writes_group0_go_out; -logic wrapper_early_reset_perform_writes_group0_done_in; -logic wrapper_early_reset_perform_writes_group0_done_out; -logic wrapper_early_reset_static_par0_go_in; -logic wrapper_early_reset_static_par0_go_out; -logic wrapper_early_reset_static_par0_done_in; -logic wrapper_early_reset_static_par0_done_out; -logic wrapper_early_reset_static_par1_go_in; -logic wrapper_early_reset_static_par1_go_out; -logic wrapper_early_reset_static_par1_done_in; -logic wrapper_early_reset_static_par1_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic early_reset_static_par_thread0_go_in; +logic early_reset_static_par_thread0_go_out; +logic early_reset_static_par_thread0_done_in; +logic early_reset_static_par_thread0_done_out; +logic early_reset_static_par_thread1_go_in; +logic early_reset_static_par_thread1_go_out; +logic early_reset_static_par_thread1_done_in; +logic early_reset_static_par_thread1_done_out; +logic early_reset_perform_writes_group00_go_in; +logic early_reset_perform_writes_group00_go_out; +logic early_reset_perform_writes_group00_done_in; +logic early_reset_perform_writes_group00_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; +logic wrapper_early_reset_perform_writes_group00_go_in; +logic wrapper_early_reset_perform_writes_group00_go_out; +logic wrapper_early_reset_perform_writes_group00_done_in; +logic wrapper_early_reset_perform_writes_group00_done_out; +logic wrapper_early_reset_static_par_thread0_go_in; +logic wrapper_early_reset_static_par_thread0_go_out; +logic wrapper_early_reset_static_par_thread0_done_in; +logic wrapper_early_reset_static_par_thread0_done_out; +logic wrapper_early_reset_static_par_thread1_go_in; +logic wrapper_early_reset_static_par_thread1_go_out; +logic wrapper_early_reset_static_par_thread1_done_in; +logic wrapper_early_reset_static_par_thread1_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -2382,54 +2314,11 @@ std_reg # ( .reset(comb_reg_reset), .write_en(comb_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); -std_add # ( - .WIDTH(1) -) adder0 ( - .left(adder0_left), - .out(adder0_out), - .right(adder0_right) -); -std_add # ( - .WIDTH(1) -) adder1 ( - .left(adder1_left), - .out(adder1_out), - .right(adder1_right) -); -std_add # ( - .WIDTH(1) -) adder2 ( - .left(adder2_left), - .out(adder2_out), - .right(adder2_right) -); undef # ( .WIDTH(1) ) ud ( .out(ud_out) ); -undef # ( - .WIDTH(1) -) ud0 ( - .out(ud0_out) -); undef # ( .WIDTH(1) ) ud1 ( @@ -2440,6 +2329,11 @@ undef # ( ) ud2 ( .out(ud2_out) ); +undef # ( + .WIDTH(1) +) ud3 ( + .out(ud3_out) +); std_reg # ( .WIDTH(1) ) signal_reg ( @@ -2450,15 +2344,45 @@ std_reg # ( .reset(signal_reg_reset), .write_en(signal_reg_write_en) ); +std_reg # ( + .WIDTH(1) +) signal_reg0 ( + .clk(signal_reg0_clk), + .done(signal_reg0_done), + .in(signal_reg0_in), + .out(signal_reg0_out), + .reset(signal_reg0_reset), + .write_en(signal_reg0_write_en) +); +std_reg # ( + .WIDTH(1) +) signal_reg1 ( + .clk(signal_reg1_clk), + .done(signal_reg1_done), + .in(signal_reg1_in), + .out(signal_reg1_out), + .reset(signal_reg1_reset), + .write_en(signal_reg1_write_en) +); +std_reg # ( + .WIDTH(1) +) signal_reg2 ( + .clk(signal_reg2_clk), + .done(signal_reg2_done), + .in(signal_reg2_in), + .out(signal_reg2_out), + .reset(signal_reg2_reset), + .write_en(signal_reg2_write_en) +); std_reg # ( .WIDTH(3) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -2474,99 +2398,99 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_perform_writes_group0_go ( - .in(early_reset_perform_writes_group0_go_in), - .out(early_reset_perform_writes_group0_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_perform_writes_group0_done ( - .in(early_reset_perform_writes_group0_done_in), - .out(early_reset_perform_writes_group0_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread0_go ( + .in(early_reset_static_par_thread0_go_in), + .out(early_reset_static_par_thread0_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread0_done ( + .in(early_reset_static_par_thread0_done_in), + .out(early_reset_static_par_thread0_done_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par0_go ( - .in(early_reset_static_par0_go_in), - .out(early_reset_static_par0_go_out) +) early_reset_static_par_thread1_go ( + .in(early_reset_static_par_thread1_go_in), + .out(early_reset_static_par_thread1_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par0_done ( - .in(early_reset_static_par0_done_in), - .out(early_reset_static_par0_done_out) +) early_reset_static_par_thread1_done ( + .in(early_reset_static_par_thread1_done_in), + .out(early_reset_static_par_thread1_done_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par1_go ( - .in(early_reset_static_par1_go_in), - .out(early_reset_static_par1_go_out) +) early_reset_perform_writes_group00_go ( + .in(early_reset_perform_writes_group00_go_in), + .out(early_reset_perform_writes_group00_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par1_done ( - .in(early_reset_static_par1_done_in), - .out(early_reset_static_par1_done_out) +) early_reset_perform_writes_group00_done ( + .in(early_reset_perform_writes_group00_done_in), + .out(early_reset_perform_writes_group00_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_perform_writes_group0_go ( - .in(wrapper_early_reset_perform_writes_group0_go_in), - .out(wrapper_early_reset_perform_writes_group0_go_out) +) wrapper_early_reset_perform_writes_group00_go ( + .in(wrapper_early_reset_perform_writes_group00_go_in), + .out(wrapper_early_reset_perform_writes_group00_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_perform_writes_group0_done ( - .in(wrapper_early_reset_perform_writes_group0_done_in), - .out(wrapper_early_reset_perform_writes_group0_done_out) +) wrapper_early_reset_perform_writes_group00_done ( + .in(wrapper_early_reset_perform_writes_group00_done_in), + .out(wrapper_early_reset_perform_writes_group00_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par0_go ( - .in(wrapper_early_reset_static_par0_go_in), - .out(wrapper_early_reset_static_par0_go_out) +) wrapper_early_reset_static_par_thread0_go ( + .in(wrapper_early_reset_static_par_thread0_go_in), + .out(wrapper_early_reset_static_par_thread0_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par0_done ( - .in(wrapper_early_reset_static_par0_done_in), - .out(wrapper_early_reset_static_par0_done_out) +) wrapper_early_reset_static_par_thread0_done ( + .in(wrapper_early_reset_static_par_thread0_done_in), + .out(wrapper_early_reset_static_par_thread0_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par1_go ( - .in(wrapper_early_reset_static_par1_go_in), - .out(wrapper_early_reset_static_par1_go_out) +) wrapper_early_reset_static_par_thread1_go ( + .in(wrapper_early_reset_static_par_thread1_go_in), + .out(wrapper_early_reset_static_par_thread1_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par1_done ( - .in(wrapper_early_reset_static_par1_done_in), - .out(wrapper_early_reset_static_par1_done_out) +) wrapper_early_reset_static_par_thread1_done ( + .in(wrapper_early_reset_static_par_thread1_done_in), + .out(wrapper_early_reset_static_par_thread1_done_out) ); std_wire # ( .WIDTH(1) @@ -2581,479 +2505,419 @@ std_wire # ( .out(tdcc_done_out) ); wire _guard0 = 1; -wire _guard1 = early_reset_static_par0_go_out; -wire _guard2 = early_reset_static_par0_go_out; -wire _guard3 = tdcc_done_out; -wire _guard4 = do_aw_transfer_go_out; -wire _guard5 = do_aw_transfer_go_out; -wire _guard6 = do_aw_transfer_go_out; -wire _guard7 = do_aw_transfer_go_out; -wire _guard8 = do_aw_transfer_go_out; -wire _guard9 = do_aw_transfer_go_out; -wire _guard10 = do_aw_transfer_go_out; -wire _guard11 = early_reset_perform_writes_group0_go_out; -wire _guard12 = early_reset_static_par_go_out; -wire _guard13 = _guard11 | _guard12; -wire _guard14 = early_reset_static_par0_go_out; -wire _guard15 = _guard13 | _guard14; -wire _guard16 = early_reset_static_par1_go_out; -wire _guard17 = _guard15 | _guard16; -wire _guard18 = fsm_out == 1'd0; -wire _guard19 = ~_guard18; -wire _guard20 = early_reset_static_par0_go_out; -wire _guard21 = _guard19 & _guard20; -wire _guard22 = fsm_out == 1'd0; -wire _guard23 = ~_guard22; -wire _guard24 = early_reset_perform_writes_group0_go_out; -wire _guard25 = _guard23 & _guard24; -wire _guard26 = fsm_out == 1'd0; -wire _guard27 = ~_guard26; -wire _guard28 = early_reset_static_par1_go_out; +wire _guard1 = signal_reg1_out; +wire _guard2 = _guard0 & _guard0; +wire _guard3 = signal_reg1_out; +wire _guard4 = ~_guard3; +wire _guard5 = _guard2 & _guard4; +wire _guard6 = wrapper_early_reset_static_par_thread0_go_out; +wire _guard7 = _guard5 & _guard6; +wire _guard8 = _guard1 | _guard7; +wire _guard9 = _guard0 & _guard0; +wire _guard10 = signal_reg1_out; +wire _guard11 = ~_guard10; +wire _guard12 = _guard9 & _guard11; +wire _guard13 = wrapper_early_reset_static_par_thread0_go_out; +wire _guard14 = _guard12 & _guard13; +wire _guard15 = signal_reg1_out; +wire _guard16 = tdcc_done_out; +wire _guard17 = do_aw_transfer_go_out; +wire _guard18 = do_aw_transfer_go_out; +wire _guard19 = do_aw_transfer_go_out; +wire _guard20 = do_aw_transfer_go_out; +wire _guard21 = do_aw_transfer_go_out; +wire _guard22 = do_aw_transfer_go_out; +wire _guard23 = do_aw_transfer_go_out; +wire _guard24 = fsm_out == 3'd6; +wire _guard25 = fsm_out == 3'd0; +wire _guard26 = wrapper_early_reset_static_par_thread_done_out; +wire _guard27 = _guard25 & _guard26; +wire _guard28 = tdcc_go_out; wire _guard29 = _guard27 & _guard28; -wire _guard30 = fsm_out == 1'd0; -wire _guard31 = early_reset_perform_writes_group0_go_out; -wire _guard32 = _guard30 & _guard31; -wire _guard33 = fsm_out == 1'd0; -wire _guard34 = early_reset_static_par_go_out; -wire _guard35 = _guard33 & _guard34; -wire _guard36 = _guard32 | _guard35; -wire _guard37 = fsm_out == 1'd0; -wire _guard38 = early_reset_static_par0_go_out; -wire _guard39 = _guard37 & _guard38; -wire _guard40 = _guard36 | _guard39; -wire _guard41 = fsm_out == 1'd0; -wire _guard42 = early_reset_static_par1_go_out; -wire _guard43 = _guard41 & _guard42; -wire _guard44 = _guard40 | _guard43; -wire _guard45 = fsm_out == 1'd0; -wire _guard46 = ~_guard45; -wire _guard47 = early_reset_static_par_go_out; -wire _guard48 = _guard46 & _guard47; -wire _guard49 = early_reset_perform_writes_group0_go_out; -wire _guard50 = early_reset_perform_writes_group0_go_out; -wire _guard51 = wrapper_early_reset_static_par0_go_out; -wire _guard52 = fsm_out == 1'd0; -wire _guard53 = signal_reg_out; -wire _guard54 = _guard52 & _guard53; -wire _guard55 = early_reset_perform_writes_group0_go_out; -wire _guard56 = early_reset_perform_writes_group0_go_out; -wire _guard57 = wrapper_early_reset_static_par1_go_out; -wire _guard58 = wrapper_early_reset_static_par_done_out; -wire _guard59 = ~_guard58; -wire _guard60 = fsm0_out == 3'd0; +wire _guard30 = _guard24 | _guard29; +wire _guard31 = fsm_out == 3'd1; +wire _guard32 = wrapper_early_reset_perform_writes_group00_done_out; +wire _guard33 = comb_reg_out; +wire _guard34 = _guard32 & _guard33; +wire _guard35 = _guard31 & _guard34; +wire _guard36 = tdcc_go_out; +wire _guard37 = _guard35 & _guard36; +wire _guard38 = _guard30 | _guard37; +wire _guard39 = fsm_out == 3'd5; +wire _guard40 = wrapper_early_reset_perform_writes_group00_done_out; +wire _guard41 = comb_reg_out; +wire _guard42 = _guard40 & _guard41; +wire _guard43 = _guard39 & _guard42; +wire _guard44 = tdcc_go_out; +wire _guard45 = _guard43 & _guard44; +wire _guard46 = _guard38 | _guard45; +wire _guard47 = fsm_out == 3'd2; +wire _guard48 = wrapper_early_reset_static_par_thread0_done_out; +wire _guard49 = _guard47 & _guard48; +wire _guard50 = tdcc_go_out; +wire _guard51 = _guard49 & _guard50; +wire _guard52 = _guard46 | _guard51; +wire _guard53 = fsm_out == 3'd3; +wire _guard54 = do_aw_transfer_done_out; +wire _guard55 = _guard53 & _guard54; +wire _guard56 = tdcc_go_out; +wire _guard57 = _guard55 & _guard56; +wire _guard58 = _guard52 | _guard57; +wire _guard59 = fsm_out == 3'd4; +wire _guard60 = wrapper_early_reset_static_par_thread1_done_out; wire _guard61 = _guard59 & _guard60; wire _guard62 = tdcc_go_out; wire _guard63 = _guard61 & _guard62; -wire _guard64 = early_reset_static_par_go_out; -wire _guard65 = early_reset_static_par1_go_out; -wire _guard66 = _guard64 | _guard65; -wire _guard67 = early_reset_static_par_go_out; -wire _guard68 = early_reset_static_par1_go_out; -wire _guard69 = fsm_out == 1'd0; -wire _guard70 = signal_reg_out; -wire _guard71 = _guard69 & _guard70; -wire _guard72 = early_reset_static_par1_go_out; -wire _guard73 = early_reset_static_par1_go_out; -wire _guard74 = fsm0_out == 3'd6; -wire _guard75 = fsm0_out == 3'd0; -wire _guard76 = wrapper_early_reset_static_par_done_out; -wire _guard77 = _guard75 & _guard76; -wire _guard78 = tdcc_go_out; -wire _guard79 = _guard77 & _guard78; -wire _guard80 = _guard74 | _guard79; -wire _guard81 = fsm0_out == 3'd1; -wire _guard82 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard83 = comb_reg_out; -wire _guard84 = _guard82 & _guard83; -wire _guard85 = _guard81 & _guard84; -wire _guard86 = tdcc_go_out; -wire _guard87 = _guard85 & _guard86; -wire _guard88 = _guard80 | _guard87; -wire _guard89 = fsm0_out == 3'd5; -wire _guard90 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard91 = comb_reg_out; -wire _guard92 = _guard90 & _guard91; -wire _guard93 = _guard89 & _guard92; -wire _guard94 = tdcc_go_out; -wire _guard95 = _guard93 & _guard94; -wire _guard96 = _guard88 | _guard95; -wire _guard97 = fsm0_out == 3'd2; -wire _guard98 = wrapper_early_reset_static_par0_done_out; -wire _guard99 = _guard97 & _guard98; -wire _guard100 = tdcc_go_out; -wire _guard101 = _guard99 & _guard100; -wire _guard102 = _guard96 | _guard101; -wire _guard103 = fsm0_out == 3'd3; -wire _guard104 = do_aw_transfer_done_out; -wire _guard105 = _guard103 & _guard104; -wire _guard106 = tdcc_go_out; -wire _guard107 = _guard105 & _guard106; -wire _guard108 = _guard102 | _guard107; -wire _guard109 = fsm0_out == 3'd4; -wire _guard110 = wrapper_early_reset_static_par1_done_out; +wire _guard64 = _guard58 | _guard63; +wire _guard65 = fsm_out == 3'd1; +wire _guard66 = wrapper_early_reset_perform_writes_group00_done_out; +wire _guard67 = comb_reg_out; +wire _guard68 = ~_guard67; +wire _guard69 = _guard66 & _guard68; +wire _guard70 = _guard65 & _guard69; +wire _guard71 = tdcc_go_out; +wire _guard72 = _guard70 & _guard71; +wire _guard73 = _guard64 | _guard72; +wire _guard74 = fsm_out == 3'd5; +wire _guard75 = wrapper_early_reset_perform_writes_group00_done_out; +wire _guard76 = comb_reg_out; +wire _guard77 = ~_guard76; +wire _guard78 = _guard75 & _guard77; +wire _guard79 = _guard74 & _guard78; +wire _guard80 = tdcc_go_out; +wire _guard81 = _guard79 & _guard80; +wire _guard82 = _guard73 | _guard81; +wire _guard83 = fsm_out == 3'd1; +wire _guard84 = wrapper_early_reset_perform_writes_group00_done_out; +wire _guard85 = comb_reg_out; +wire _guard86 = ~_guard85; +wire _guard87 = _guard84 & _guard86; +wire _guard88 = _guard83 & _guard87; +wire _guard89 = tdcc_go_out; +wire _guard90 = _guard88 & _guard89; +wire _guard91 = fsm_out == 3'd5; +wire _guard92 = wrapper_early_reset_perform_writes_group00_done_out; +wire _guard93 = comb_reg_out; +wire _guard94 = ~_guard93; +wire _guard95 = _guard92 & _guard94; +wire _guard96 = _guard91 & _guard95; +wire _guard97 = tdcc_go_out; +wire _guard98 = _guard96 & _guard97; +wire _guard99 = _guard90 | _guard98; +wire _guard100 = fsm_out == 3'd4; +wire _guard101 = wrapper_early_reset_static_par_thread1_done_out; +wire _guard102 = _guard100 & _guard101; +wire _guard103 = tdcc_go_out; +wire _guard104 = _guard102 & _guard103; +wire _guard105 = fsm_out == 3'd1; +wire _guard106 = wrapper_early_reset_perform_writes_group00_done_out; +wire _guard107 = comb_reg_out; +wire _guard108 = _guard106 & _guard107; +wire _guard109 = _guard105 & _guard108; +wire _guard110 = tdcc_go_out; wire _guard111 = _guard109 & _guard110; -wire _guard112 = tdcc_go_out; -wire _guard113 = _guard111 & _guard112; -wire _guard114 = _guard108 | _guard113; -wire _guard115 = fsm0_out == 3'd1; -wire _guard116 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard117 = comb_reg_out; -wire _guard118 = ~_guard117; -wire _guard119 = _guard116 & _guard118; -wire _guard120 = _guard115 & _guard119; -wire _guard121 = tdcc_go_out; +wire _guard112 = fsm_out == 3'd5; +wire _guard113 = wrapper_early_reset_perform_writes_group00_done_out; +wire _guard114 = comb_reg_out; +wire _guard115 = _guard113 & _guard114; +wire _guard116 = _guard112 & _guard115; +wire _guard117 = tdcc_go_out; +wire _guard118 = _guard116 & _guard117; +wire _guard119 = _guard111 | _guard118; +wire _guard120 = fsm_out == 3'd3; +wire _guard121 = do_aw_transfer_done_out; wire _guard122 = _guard120 & _guard121; -wire _guard123 = _guard114 | _guard122; -wire _guard124 = fsm0_out == 3'd5; -wire _guard125 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard126 = comb_reg_out; -wire _guard127 = ~_guard126; -wire _guard128 = _guard125 & _guard127; -wire _guard129 = _guard124 & _guard128; -wire _guard130 = tdcc_go_out; -wire _guard131 = _guard129 & _guard130; -wire _guard132 = _guard123 | _guard131; -wire _guard133 = fsm0_out == 3'd1; -wire _guard134 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard135 = comb_reg_out; -wire _guard136 = ~_guard135; -wire _guard137 = _guard134 & _guard136; -wire _guard138 = _guard133 & _guard137; -wire _guard139 = tdcc_go_out; -wire _guard140 = _guard138 & _guard139; -wire _guard141 = fsm0_out == 3'd5; -wire _guard142 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard143 = comb_reg_out; -wire _guard144 = ~_guard143; -wire _guard145 = _guard142 & _guard144; -wire _guard146 = _guard141 & _guard145; -wire _guard147 = tdcc_go_out; -wire _guard148 = _guard146 & _guard147; -wire _guard149 = _guard140 | _guard148; -wire _guard150 = fsm0_out == 3'd4; -wire _guard151 = wrapper_early_reset_static_par1_done_out; -wire _guard152 = _guard150 & _guard151; -wire _guard153 = tdcc_go_out; -wire _guard154 = _guard152 & _guard153; -wire _guard155 = fsm0_out == 3'd1; -wire _guard156 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard157 = comb_reg_out; -wire _guard158 = _guard156 & _guard157; -wire _guard159 = _guard155 & _guard158; -wire _guard160 = tdcc_go_out; -wire _guard161 = _guard159 & _guard160; -wire _guard162 = fsm0_out == 3'd5; -wire _guard163 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard164 = comb_reg_out; +wire _guard123 = tdcc_go_out; +wire _guard124 = _guard122 & _guard123; +wire _guard125 = fsm_out == 3'd0; +wire _guard126 = wrapper_early_reset_static_par_thread_done_out; +wire _guard127 = _guard125 & _guard126; +wire _guard128 = tdcc_go_out; +wire _guard129 = _guard127 & _guard128; +wire _guard130 = fsm_out == 3'd6; +wire _guard131 = fsm_out == 3'd2; +wire _guard132 = wrapper_early_reset_static_par_thread0_done_out; +wire _guard133 = _guard131 & _guard132; +wire _guard134 = tdcc_go_out; +wire _guard135 = _guard133 & _guard134; +wire _guard136 = wrapper_early_reset_static_par_thread1_go_out; +wire _guard137 = signal_reg0_out; +wire _guard138 = _guard0 & _guard0; +wire _guard139 = signal_reg0_out; +wire _guard140 = ~_guard139; +wire _guard141 = _guard138 & _guard140; +wire _guard142 = wrapper_early_reset_perform_writes_group00_go_out; +wire _guard143 = _guard141 & _guard142; +wire _guard144 = _guard137 | _guard143; +wire _guard145 = _guard0 & _guard0; +wire _guard146 = signal_reg0_out; +wire _guard147 = ~_guard146; +wire _guard148 = _guard145 & _guard147; +wire _guard149 = wrapper_early_reset_perform_writes_group00_go_out; +wire _guard150 = _guard148 & _guard149; +wire _guard151 = signal_reg0_out; +wire _guard152 = wrapper_early_reset_static_par_thread_done_out; +wire _guard153 = ~_guard152; +wire _guard154 = fsm_out == 3'd0; +wire _guard155 = _guard153 & _guard154; +wire _guard156 = tdcc_go_out; +wire _guard157 = _guard155 & _guard156; +wire _guard158 = early_reset_perform_writes_group00_go_out; +wire _guard159 = early_reset_perform_writes_group00_go_out; +wire _guard160 = wrapper_early_reset_perform_writes_group00_done_out; +wire _guard161 = ~_guard160; +wire _guard162 = fsm_out == 3'd1; +wire _guard163 = _guard161 & _guard162; +wire _guard164 = tdcc_go_out; wire _guard165 = _guard163 & _guard164; -wire _guard166 = _guard162 & _guard165; -wire _guard167 = tdcc_go_out; -wire _guard168 = _guard166 & _guard167; -wire _guard169 = _guard161 | _guard168; -wire _guard170 = fsm0_out == 3'd3; -wire _guard171 = do_aw_transfer_done_out; -wire _guard172 = _guard170 & _guard171; -wire _guard173 = tdcc_go_out; -wire _guard174 = _guard172 & _guard173; -wire _guard175 = fsm0_out == 3'd0; -wire _guard176 = wrapper_early_reset_static_par_done_out; -wire _guard177 = _guard175 & _guard176; -wire _guard178 = tdcc_go_out; -wire _guard179 = _guard177 & _guard178; -wire _guard180 = fsm0_out == 3'd6; -wire _guard181 = fsm0_out == 3'd2; -wire _guard182 = wrapper_early_reset_static_par0_done_out; +wire _guard166 = wrapper_early_reset_perform_writes_group00_done_out; +wire _guard167 = ~_guard166; +wire _guard168 = fsm_out == 3'd5; +wire _guard169 = _guard167 & _guard168; +wire _guard170 = tdcc_go_out; +wire _guard171 = _guard169 & _guard170; +wire _guard172 = _guard165 | _guard171; +wire _guard173 = early_reset_static_par_thread_go_out; +wire _guard174 = early_reset_static_par_thread1_go_out; +wire _guard175 = _guard173 | _guard174; +wire _guard176 = early_reset_static_par_thread_go_out; +wire _guard177 = early_reset_static_par_thread1_go_out; +wire _guard178 = do_aw_transfer_done_out; +wire _guard179 = ~_guard178; +wire _guard180 = fsm_out == 3'd3; +wire _guard181 = _guard179 & _guard180; +wire _guard182 = tdcc_go_out; wire _guard183 = _guard181 & _guard182; -wire _guard184 = tdcc_go_out; -wire _guard185 = _guard183 & _guard184; -wire _guard186 = do_aw_transfer_done_out; -wire _guard187 = ~_guard186; -wire _guard188 = fsm0_out == 3'd3; -wire _guard189 = _guard187 & _guard188; -wire _guard190 = tdcc_go_out; -wire _guard191 = _guard189 & _guard190; -wire _guard192 = early_reset_perform_writes_group0_go_out; -wire _guard193 = early_reset_perform_writes_group0_go_out; -wire _guard194 = early_reset_static_par_go_out; -wire _guard195 = early_reset_static_par_go_out; -wire _guard196 = fsm_out == 1'd0; -wire _guard197 = signal_reg_out; -wire _guard198 = _guard196 & _guard197; -wire _guard199 = do_aw_transfer_go_out; -wire _guard200 = early_reset_static_par0_go_out; -wire _guard201 = _guard199 | _guard200; -wire _guard202 = AWREADY; -wire _guard203 = awvalid_out; -wire _guard204 = _guard202 & _guard203; -wire _guard205 = do_aw_transfer_go_out; -wire _guard206 = _guard204 & _guard205; -wire _guard207 = AWREADY; -wire _guard208 = awvalid_out; -wire _guard209 = _guard207 & _guard208; -wire _guard210 = ~_guard209; -wire _guard211 = do_aw_transfer_go_out; -wire _guard212 = _guard210 & _guard211; -wire _guard213 = early_reset_static_par0_go_out; -wire _guard214 = _guard212 | _guard213; -wire _guard215 = early_reset_static_par_go_out; -wire _guard216 = early_reset_static_par_go_out; -wire _guard217 = fsm_out == 1'd0; -wire _guard218 = signal_reg_out; -wire _guard219 = _guard217 & _guard218; -wire _guard220 = fsm_out == 1'd0; -wire _guard221 = signal_reg_out; -wire _guard222 = ~_guard221; -wire _guard223 = _guard220 & _guard222; -wire _guard224 = wrapper_early_reset_static_par_go_out; -wire _guard225 = _guard223 & _guard224; -wire _guard226 = _guard219 | _guard225; -wire _guard227 = fsm_out == 1'd0; +wire _guard184 = signal_reg0_out; +wire _guard185 = early_reset_perform_writes_group00_go_out; +wire _guard186 = early_reset_perform_writes_group00_go_out; +wire _guard187 = signal_reg2_out; +wire _guard188 = _guard0 & _guard0; +wire _guard189 = signal_reg2_out; +wire _guard190 = ~_guard189; +wire _guard191 = _guard188 & _guard190; +wire _guard192 = wrapper_early_reset_static_par_thread1_go_out; +wire _guard193 = _guard191 & _guard192; +wire _guard194 = _guard187 | _guard193; +wire _guard195 = _guard0 & _guard0; +wire _guard196 = signal_reg2_out; +wire _guard197 = ~_guard196; +wire _guard198 = _guard195 & _guard197; +wire _guard199 = wrapper_early_reset_static_par_thread1_go_out; +wire _guard200 = _guard198 & _guard199; +wire _guard201 = signal_reg2_out; +wire _guard202 = wrapper_early_reset_static_par_thread0_done_out; +wire _guard203 = ~_guard202; +wire _guard204 = fsm_out == 3'd2; +wire _guard205 = _guard203 & _guard204; +wire _guard206 = tdcc_go_out; +wire _guard207 = _guard205 & _guard206; +wire _guard208 = do_aw_transfer_go_out; +wire _guard209 = early_reset_static_par_thread0_go_out; +wire _guard210 = _guard208 | _guard209; +wire _guard211 = AWREADY; +wire _guard212 = awvalid_out; +wire _guard213 = _guard211 & _guard212; +wire _guard214 = do_aw_transfer_go_out; +wire _guard215 = _guard213 & _guard214; +wire _guard216 = AWREADY; +wire _guard217 = awvalid_out; +wire _guard218 = _guard216 & _guard217; +wire _guard219 = ~_guard218; +wire _guard220 = do_aw_transfer_go_out; +wire _guard221 = _guard219 & _guard220; +wire _guard222 = early_reset_static_par_thread0_go_out; +wire _guard223 = _guard221 | _guard222; +wire _guard224 = early_reset_static_par_thread_go_out; +wire _guard225 = early_reset_static_par_thread_go_out; +wire _guard226 = signal_reg_out; +wire _guard227 = _guard0 & _guard0; wire _guard228 = signal_reg_out; wire _guard229 = ~_guard228; wire _guard230 = _guard227 & _guard229; -wire _guard231 = wrapper_early_reset_perform_writes_group0_go_out; +wire _guard231 = wrapper_early_reset_static_par_thread_go_out; wire _guard232 = _guard230 & _guard231; wire _guard233 = _guard226 | _guard232; -wire _guard234 = fsm_out == 1'd0; +wire _guard234 = _guard0 & _guard0; wire _guard235 = signal_reg_out; wire _guard236 = ~_guard235; wire _guard237 = _guard234 & _guard236; -wire _guard238 = wrapper_early_reset_static_par0_go_out; +wire _guard238 = wrapper_early_reset_static_par_thread_go_out; wire _guard239 = _guard237 & _guard238; -wire _guard240 = _guard233 | _guard239; -wire _guard241 = fsm_out == 1'd0; -wire _guard242 = signal_reg_out; -wire _guard243 = ~_guard242; -wire _guard244 = _guard241 & _guard243; -wire _guard245 = wrapper_early_reset_static_par1_go_out; +wire _guard240 = signal_reg_out; +wire _guard241 = wrapper_early_reset_static_par_thread_go_out; +wire _guard242 = signal_reg1_out; +wire _guard243 = wrapper_early_reset_static_par_thread1_done_out; +wire _guard244 = ~_guard243; +wire _guard245 = fsm_out == 3'd4; wire _guard246 = _guard244 & _guard245; -wire _guard247 = _guard240 | _guard246; -wire _guard248 = fsm_out == 1'd0; -wire _guard249 = signal_reg_out; -wire _guard250 = ~_guard249; -wire _guard251 = _guard248 & _guard250; -wire _guard252 = wrapper_early_reset_static_par_go_out; -wire _guard253 = _guard251 & _guard252; -wire _guard254 = fsm_out == 1'd0; -wire _guard255 = signal_reg_out; -wire _guard256 = ~_guard255; -wire _guard257 = _guard254 & _guard256; -wire _guard258 = wrapper_early_reset_perform_writes_group0_go_out; -wire _guard259 = _guard257 & _guard258; -wire _guard260 = _guard253 | _guard259; -wire _guard261 = fsm_out == 1'd0; -wire _guard262 = signal_reg_out; -wire _guard263 = ~_guard262; -wire _guard264 = _guard261 & _guard263; -wire _guard265 = wrapper_early_reset_static_par0_go_out; -wire _guard266 = _guard264 & _guard265; -wire _guard267 = _guard260 | _guard266; -wire _guard268 = fsm_out == 1'd0; -wire _guard269 = signal_reg_out; -wire _guard270 = ~_guard269; -wire _guard271 = _guard268 & _guard270; -wire _guard272 = wrapper_early_reset_static_par1_go_out; -wire _guard273 = _guard271 & _guard272; -wire _guard274 = _guard267 | _guard273; -wire _guard275 = fsm_out == 1'd0; -wire _guard276 = signal_reg_out; -wire _guard277 = _guard275 & _guard276; -wire _guard278 = wrapper_early_reset_perform_writes_group0_go_out; -wire _guard279 = early_reset_static_par1_go_out; -wire _guard280 = early_reset_static_par1_go_out; -wire _guard281 = aw_handshake_occurred_out; -wire _guard282 = ~_guard281; -wire _guard283 = do_aw_transfer_go_out; -wire _guard284 = _guard282 & _guard283; -wire _guard285 = early_reset_static_par0_go_out; -wire _guard286 = _guard284 | _guard285; -wire _guard287 = awvalid_out; -wire _guard288 = AWREADY; -wire _guard289 = _guard287 & _guard288; -wire _guard290 = do_aw_transfer_go_out; -wire _guard291 = _guard289 & _guard290; -wire _guard292 = early_reset_static_par0_go_out; -wire _guard293 = wrapper_early_reset_static_par0_done_out; -wire _guard294 = ~_guard293; -wire _guard295 = fsm0_out == 3'd2; -wire _guard296 = _guard294 & _guard295; -wire _guard297 = tdcc_go_out; -wire _guard298 = _guard296 & _guard297; -wire _guard299 = fsm_out == 1'd0; -wire _guard300 = signal_reg_out; -wire _guard301 = _guard299 & _guard300; -wire _guard302 = wrapper_early_reset_static_par1_done_out; -wire _guard303 = ~_guard302; -wire _guard304 = fsm0_out == 3'd4; -wire _guard305 = _guard303 & _guard304; -wire _guard306 = tdcc_go_out; -wire _guard307 = _guard305 & _guard306; -wire _guard308 = fsm0_out == 3'd6; -wire _guard309 = do_aw_transfer_go_out; -wire _guard310 = early_reset_static_par1_go_out; -wire _guard311 = _guard309 | _guard310; -wire _guard312 = awvalid_out; -wire _guard313 = AWREADY; -wire _guard314 = _guard312 & _guard313; -wire _guard315 = ~_guard314; -wire _guard316 = aw_handshake_occurred_out; -wire _guard317 = ~_guard316; -wire _guard318 = _guard315 & _guard317; -wire _guard319 = do_aw_transfer_go_out; -wire _guard320 = _guard318 & _guard319; -wire _guard321 = awvalid_out; -wire _guard322 = AWREADY; -wire _guard323 = _guard321 & _guard322; -wire _guard324 = aw_handshake_occurred_out; -wire _guard325 = _guard323 | _guard324; -wire _guard326 = do_aw_transfer_go_out; -wire _guard327 = _guard325 & _guard326; -wire _guard328 = early_reset_static_par1_go_out; -wire _guard329 = _guard327 | _guard328; -wire _guard330 = wrapper_early_reset_static_par_go_out; -wire _guard331 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard332 = ~_guard331; -wire _guard333 = fsm0_out == 3'd1; -wire _guard334 = _guard332 & _guard333; -wire _guard335 = tdcc_go_out; -wire _guard336 = _guard334 & _guard335; -wire _guard337 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard338 = ~_guard337; -wire _guard339 = fsm0_out == 3'd5; -wire _guard340 = _guard338 & _guard339; -wire _guard341 = tdcc_go_out; -wire _guard342 = _guard340 & _guard341; -wire _guard343 = _guard336 | _guard342; -assign adder1_left = - _guard1 ? fsm_out : +wire _guard247 = tdcc_go_out; +wire _guard248 = _guard246 & _guard247; +wire _guard249 = wrapper_early_reset_static_par_thread0_go_out; +wire _guard250 = signal_reg_out; +wire _guard251 = early_reset_static_par_thread1_go_out; +wire _guard252 = early_reset_static_par_thread1_go_out; +wire _guard253 = aw_handshake_occurred_out; +wire _guard254 = ~_guard253; +wire _guard255 = do_aw_transfer_go_out; +wire _guard256 = _guard254 & _guard255; +wire _guard257 = early_reset_static_par_thread0_go_out; +wire _guard258 = _guard256 | _guard257; +wire _guard259 = awvalid_out; +wire _guard260 = AWREADY; +wire _guard261 = _guard259 & _guard260; +wire _guard262 = do_aw_transfer_go_out; +wire _guard263 = _guard261 & _guard262; +wire _guard264 = early_reset_static_par_thread0_go_out; +wire _guard265 = fsm_out == 3'd6; +wire _guard266 = wrapper_early_reset_perform_writes_group00_go_out; +wire _guard267 = do_aw_transfer_go_out; +wire _guard268 = early_reset_static_par_thread1_go_out; +wire _guard269 = _guard267 | _guard268; +wire _guard270 = awvalid_out; +wire _guard271 = AWREADY; +wire _guard272 = _guard270 & _guard271; +wire _guard273 = ~_guard272; +wire _guard274 = aw_handshake_occurred_out; +wire _guard275 = ~_guard274; +wire _guard276 = _guard273 & _guard275; +wire _guard277 = do_aw_transfer_go_out; +wire _guard278 = _guard276 & _guard277; +wire _guard279 = awvalid_out; +wire _guard280 = AWREADY; +wire _guard281 = _guard279 & _guard280; +wire _guard282 = aw_handshake_occurred_out; +wire _guard283 = _guard281 | _guard282; +wire _guard284 = do_aw_transfer_go_out; +wire _guard285 = _guard283 & _guard284; +wire _guard286 = early_reset_static_par_thread1_go_out; +wire _guard287 = _guard285 | _guard286; +wire _guard288 = signal_reg2_out; +assign signal_reg1_write_en = _guard8; +assign signal_reg1_clk = clk; +assign signal_reg1_reset = reset; +assign signal_reg1_in = + _guard14 ? 1'd1 : + _guard15 ? 1'd0 : 1'd0; -assign adder1_right = _guard2; -assign done = _guard3; +assign done = _guard16; assign AWADDR = - _guard4 ? curr_addr_axi_out : + _guard17 ? curr_addr_axi_out : 64'd0; assign AWPROT = - _guard5 ? 3'd6 : + _guard18 ? 3'd6 : 3'd0; assign AWSIZE = - _guard6 ? 3'd2 : + _guard19 ? 3'd2 : 3'd0; assign max_transfers_in = 8'd7; assign AWVALID = awvalid_out; assign AWBURST = - _guard8 ? 2'd1 : + _guard21 ? 2'd1 : 2'd0; assign AWLEN = - _guard9 ? awlen_out : + _guard22 ? awlen_out : 8'd0; -assign max_transfers_write_en = _guard10; -assign fsm_write_en = _guard17; +assign max_transfers_write_en = _guard23; +assign fsm_write_en = _guard82; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard21 ? adder1_out : - _guard25 ? adder_out : - _guard29 ? adder2_out : - _guard44 ? 1'd0 : - _guard48 ? adder0_out : - 1'd0; -assign adder_left = - _guard49 ? fsm_out : + _guard99 ? 3'd6 : + _guard104 ? 3'd5 : + _guard119 ? 3'd2 : + _guard124 ? 3'd4 : + _guard129 ? 3'd1 : + _guard130 ? 3'd0 : + _guard135 ? 3'd3 : + 3'd0; +assign early_reset_static_par_thread1_go_in = _guard136; +assign signal_reg0_write_en = _guard144; +assign signal_reg0_clk = clk; +assign signal_reg0_reset = reset; +assign signal_reg0_in = + _guard150 ? 1'd1 : + _guard151 ? 1'd0 : 1'd0; -assign adder_right = _guard50; -assign early_reset_static_par0_go_in = _guard51; -assign wrapper_early_reset_static_par1_done_in = _guard54; -assign comb_reg_write_en = _guard55; +assign wrapper_early_reset_static_par_thread_go_in = _guard157; +assign comb_reg_write_en = _guard158; assign comb_reg_clk = clk; assign comb_reg_reset = reset; assign comb_reg_in = - _guard56 ? perform_writes_out : + _guard159 ? perform_writes_out : 1'd0; -assign early_reset_static_par1_go_in = _guard57; -assign wrapper_early_reset_static_par_go_in = _guard63; -assign early_reset_perform_writes_group0_done_in = ud_out; -assign txn_count_write_en = _guard66; +assign early_reset_static_par_thread0_done_in = ud1_out; +assign wrapper_early_reset_perform_writes_group00_go_in = _guard172; +assign txn_count_write_en = _guard175; assign txn_count_clk = clk; assign txn_count_reset = reset; assign txn_count_in = - _guard67 ? 32'd0 : - _guard68 ? txn_adder_out : + _guard176 ? 32'd0 : + _guard177 ? txn_adder_out : 'x; -assign early_reset_static_par0_done_in = ud1_out; -assign wrapper_early_reset_static_par_done_in = _guard71; assign tdcc_go_in = go; -assign adder2_left = - _guard72 ? fsm_out : - 1'd0; -assign adder2_right = _guard73; -assign fsm0_write_en = _guard132; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard149 ? 3'd6 : - _guard154 ? 3'd5 : - _guard169 ? 3'd2 : - _guard174 ? 3'd4 : - _guard179 ? 3'd1 : - _guard180 ? 3'd0 : - _guard185 ? 3'd3 : - 3'd0; -assign do_aw_transfer_go_in = _guard191; +assign early_reset_static_par_thread1_done_in = ud2_out; +assign do_aw_transfer_go_in = _guard183; assign do_aw_transfer_done_in = bt_reg_out; +assign wrapper_early_reset_perform_writes_group00_done_in = _guard184; assign perform_writes_left = - _guard192 ? txn_count_out : + _guard185 ? txn_count_out : 32'd0; assign perform_writes_right = - _guard193 ? txn_n_out : + _guard186 ? txn_n_out : 32'd0; -assign adder0_left = - _guard194 ? fsm_out : +assign signal_reg2_write_en = _guard194; +assign signal_reg2_clk = clk; +assign signal_reg2_reset = reset; +assign signal_reg2_in = + _guard200 ? 1'd1 : + _guard201 ? 1'd0 : 1'd0; -assign adder0_right = _guard195; -assign early_reset_static_par_done_in = ud0_out; -assign wrapper_early_reset_perform_writes_group0_done_in = _guard198; -assign bt_reg_write_en = _guard201; +assign wrapper_early_reset_static_par_thread0_go_in = _guard207; +assign bt_reg_write_en = _guard210; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard206 ? 1'd1 : - _guard214 ? 1'd0 : + _guard215 ? 1'd1 : + _guard223 ? 1'd0 : 'x; -assign awlen_write_en = _guard215; +assign awlen_write_en = _guard224; assign awlen_clk = clk; assign awlen_reset = reset; assign awlen_in = 8'd7; -assign signal_reg_write_en = _guard247; +assign signal_reg_write_en = _guard233; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard274 ? 1'd1 : - _guard277 ? 1'd0 : + _guard239 ? 1'd1 : + _guard240 ? 1'd0 : 1'd0; -assign early_reset_perform_writes_group0_go_in = _guard278; +assign early_reset_static_par_thread_go_in = _guard241; +assign wrapper_early_reset_static_par_thread0_done_in = _guard242; +assign wrapper_early_reset_static_par_thread1_go_in = _guard248; +assign early_reset_static_par_thread0_go_in = _guard249; +assign wrapper_early_reset_static_par_thread_done_in = _guard250; assign txn_adder_left = txn_count_out; assign txn_adder_right = 32'd1; -assign aw_handshake_occurred_write_en = _guard286; +assign aw_handshake_occurred_write_en = _guard258; assign aw_handshake_occurred_clk = clk; assign aw_handshake_occurred_reset = reset; assign aw_handshake_occurred_in = - _guard291 ? 1'd1 : - _guard292 ? 1'd0 : + _guard263 ? 1'd1 : + _guard264 ? 1'd0 : 'x; -assign wrapper_early_reset_static_par0_go_in = _guard298; -assign wrapper_early_reset_static_par0_done_in = _guard301; -assign wrapper_early_reset_static_par1_go_in = _guard307; -assign tdcc_done_in = _guard308; -assign awvalid_write_en = _guard311; +assign tdcc_done_in = _guard265; +assign early_reset_perform_writes_group00_go_in = _guard266; +assign awvalid_write_en = _guard269; assign awvalid_clk = clk; assign awvalid_reset = reset; assign awvalid_in = - _guard320 ? 1'd1 : - _guard329 ? 1'd0 : + _guard278 ? 1'd1 : + _guard287 ? 1'd0 : 'x; -assign early_reset_static_par_go_in = _guard330; -assign early_reset_static_par1_done_in = ud2_out; -assign wrapper_early_reset_perform_writes_group0_go_in = _guard343; +assign wrapper_early_reset_static_par_thread1_done_in = _guard288; +assign early_reset_static_par_thread_done_in = ud_out; +assign early_reset_perform_writes_group00_done_in = ud3_out; // COMPONENT END: m_aw_channel endmodule module m_read_channel( @@ -3740,15 +3604,6 @@ logic [63:0] curr_addr_axi_incr_out; logic [7:0] curr_transfer_count_incr_left; logic [7:0] curr_transfer_count_incr_right; logic [7:0] curr_transfer_count_incr_out; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; logic ud_out; logic signal_reg_in; logic signal_reg_write_en; @@ -3774,12 +3629,12 @@ logic pd1_clk; logic pd1_reset; logic pd1_out; logic pd1_done; -logic [2:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [2:0] fsm0_out; -logic fsm0_done; +logic [2:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [2:0] fsm_out; +logic fsm_done; logic service_write_transfer_go_in; logic service_write_transfer_go_out; logic service_write_transfer_done_in; @@ -3804,14 +3659,14 @@ logic invoke2_go_in; logic invoke2_go_out; logic invoke2_done_in; logic invoke2_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; logic par0_go_in; logic par0_go_out; logic par0_done_in; @@ -3891,23 +3746,6 @@ std_add # ( .out(curr_transfer_count_incr_out), .right(curr_transfer_count_incr_right) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) ) ud ( @@ -3955,13 +3793,13 @@ std_reg # ( ); std_reg # ( .WIDTH(3) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -4037,27 +3875,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) @@ -4109,314 +3947,298 @@ wire _guard22 = _guard20 & _guard21; wire _guard23 = service_write_transfer_go_out; wire _guard24 = curr_addr_internal_mem_incr_group_go_out; wire _guard25 = invoke0_go_out; -wire _guard26 = early_reset_static_par_go_out; -wire _guard27 = fsm_out == 1'd0; -wire _guard28 = ~_guard27; -wire _guard29 = early_reset_static_par_go_out; -wire _guard30 = _guard28 & _guard29; -wire _guard31 = fsm_out == 1'd0; -wire _guard32 = early_reset_static_par_go_out; -wire _guard33 = _guard31 & _guard32; -wire _guard34 = early_reset_static_par_go_out; -wire _guard35 = early_reset_static_par_go_out; -wire _guard36 = invoke2_done_out; -wire _guard37 = ~_guard36; -wire _guard38 = fsm0_out == 3'd2; +wire _guard26 = fsm_out == 3'd5; +wire _guard27 = fsm_out == 3'd0; +wire _guard28 = invoke0_done_out; +wire _guard29 = _guard27 & _guard28; +wire _guard30 = tdcc_go_out; +wire _guard31 = _guard29 & _guard30; +wire _guard32 = _guard26 | _guard31; +wire _guard33 = fsm_out == 3'd1; +wire _guard34 = invoke1_done_out; +wire _guard35 = n_finished_last_transfer_out; +wire _guard36 = _guard34 & _guard35; +wire _guard37 = _guard33 & _guard36; +wire _guard38 = tdcc_go_out; wire _guard39 = _guard37 & _guard38; -wire _guard40 = tdcc_go_out; -wire _guard41 = _guard39 & _guard40; -wire _guard42 = early_reset_static_par_go_out; -wire _guard43 = early_reset_static_par_go_out; -wire _guard44 = service_write_transfer_go_out; -wire _guard45 = wvalid_out; -wire _guard46 = WREADY; +wire _guard40 = _guard32 | _guard39; +wire _guard41 = fsm_out == 3'd4; +wire _guard42 = par0_done_out; +wire _guard43 = n_finished_last_transfer_out; +wire _guard44 = _guard42 & _guard43; +wire _guard45 = _guard41 & _guard44; +wire _guard46 = tdcc_go_out; wire _guard47 = _guard45 & _guard46; -wire _guard48 = ~_guard47; -wire _guard49 = w_handshake_occurred_out; -wire _guard50 = ~_guard49; -wire _guard51 = _guard48 & _guard50; -wire _guard52 = service_write_transfer_go_out; +wire _guard48 = _guard40 | _guard47; +wire _guard49 = fsm_out == 3'd2; +wire _guard50 = invoke2_done_out; +wire _guard51 = _guard49 & _guard50; +wire _guard52 = tdcc_go_out; wire _guard53 = _guard51 & _guard52; -wire _guard54 = wvalid_out; -wire _guard55 = WREADY; -wire _guard56 = _guard54 & _guard55; -wire _guard57 = w_handshake_occurred_out; -wire _guard58 = _guard56 | _guard57; -wire _guard59 = service_write_transfer_go_out; -wire _guard60 = _guard58 & _guard59; -wire _guard61 = pd_out; -wire _guard62 = wrapper_early_reset_static_par_done_out; -wire _guard63 = _guard61 | _guard62; +wire _guard54 = _guard48 | _guard53; +wire _guard55 = fsm_out == 3'd3; +wire _guard56 = service_write_transfer_done_out; +wire _guard57 = _guard55 & _guard56; +wire _guard58 = tdcc_go_out; +wire _guard59 = _guard57 & _guard58; +wire _guard60 = _guard54 | _guard59; +wire _guard61 = fsm_out == 3'd1; +wire _guard62 = invoke1_done_out; +wire _guard63 = n_finished_last_transfer_out; wire _guard64 = ~_guard63; -wire _guard65 = par0_go_out; -wire _guard66 = _guard64 & _guard65; -wire _guard67 = max_transfers_out == curr_transfer_count_out; -wire _guard68 = wvalid_out; -wire _guard69 = WREADY; -wire _guard70 = _guard68 & _guard69; -wire _guard71 = _guard67 & _guard70; -wire _guard72 = service_write_transfer_go_out; -wire _guard73 = _guard71 & _guard72; -wire _guard74 = invoke1_go_out; -wire _guard75 = _guard73 | _guard74; -wire _guard76 = invoke1_go_out; -wire _guard77 = max_transfers_out == curr_transfer_count_out; -wire _guard78 = wvalid_out; -wire _guard79 = WREADY; -wire _guard80 = _guard78 & _guard79; -wire _guard81 = _guard77 & _guard80; -wire _guard82 = service_write_transfer_go_out; -wire _guard83 = _guard81 & _guard82; -wire _guard84 = early_reset_static_par_go_out; -wire _guard85 = early_reset_static_par_go_out; -wire _guard86 = pd_out; -wire _guard87 = pd0_out; -wire _guard88 = _guard86 & _guard87; -wire _guard89 = pd1_out; -wire _guard90 = _guard88 & _guard89; -wire _guard91 = curr_addr_axi_incr_group_done_out; -wire _guard92 = par0_go_out; -wire _guard93 = _guard91 & _guard92; -wire _guard94 = _guard90 | _guard93; -wire _guard95 = curr_addr_axi_incr_group_done_out; -wire _guard96 = par0_go_out; -wire _guard97 = _guard95 & _guard96; -wire _guard98 = pd_out; -wire _guard99 = pd0_out; -wire _guard100 = _guard98 & _guard99; -wire _guard101 = pd1_out; +wire _guard65 = _guard62 & _guard64; +wire _guard66 = _guard61 & _guard65; +wire _guard67 = tdcc_go_out; +wire _guard68 = _guard66 & _guard67; +wire _guard69 = _guard60 | _guard68; +wire _guard70 = fsm_out == 3'd4; +wire _guard71 = par0_done_out; +wire _guard72 = n_finished_last_transfer_out; +wire _guard73 = ~_guard72; +wire _guard74 = _guard71 & _guard73; +wire _guard75 = _guard70 & _guard74; +wire _guard76 = tdcc_go_out; +wire _guard77 = _guard75 & _guard76; +wire _guard78 = _guard69 | _guard77; +wire _guard79 = fsm_out == 3'd1; +wire _guard80 = invoke1_done_out; +wire _guard81 = n_finished_last_transfer_out; +wire _guard82 = ~_guard81; +wire _guard83 = _guard80 & _guard82; +wire _guard84 = _guard79 & _guard83; +wire _guard85 = tdcc_go_out; +wire _guard86 = _guard84 & _guard85; +wire _guard87 = fsm_out == 3'd4; +wire _guard88 = par0_done_out; +wire _guard89 = n_finished_last_transfer_out; +wire _guard90 = ~_guard89; +wire _guard91 = _guard88 & _guard90; +wire _guard92 = _guard87 & _guard91; +wire _guard93 = tdcc_go_out; +wire _guard94 = _guard92 & _guard93; +wire _guard95 = _guard86 | _guard94; +wire _guard96 = fsm_out == 3'd1; +wire _guard97 = invoke1_done_out; +wire _guard98 = n_finished_last_transfer_out; +wire _guard99 = _guard97 & _guard98; +wire _guard100 = _guard96 & _guard99; +wire _guard101 = tdcc_go_out; wire _guard102 = _guard100 & _guard101; -wire _guard103 = fsm_out == 1'd0; -wire _guard104 = signal_reg_out; -wire _guard105 = _guard103 & _guard104; -wire _guard106 = invoke0_done_out; -wire _guard107 = ~_guard106; -wire _guard108 = fsm0_out == 3'd0; +wire _guard103 = fsm_out == 3'd4; +wire _guard104 = par0_done_out; +wire _guard105 = n_finished_last_transfer_out; +wire _guard106 = _guard104 & _guard105; +wire _guard107 = _guard103 & _guard106; +wire _guard108 = tdcc_go_out; wire _guard109 = _guard107 & _guard108; -wire _guard110 = tdcc_go_out; -wire _guard111 = _guard109 & _guard110; -wire _guard112 = fsm0_out == 3'd5; -wire _guard113 = fsm0_out == 3'd0; -wire _guard114 = invoke0_done_out; +wire _guard110 = _guard102 | _guard109; +wire _guard111 = fsm_out == 3'd3; +wire _guard112 = service_write_transfer_done_out; +wire _guard113 = _guard111 & _guard112; +wire _guard114 = tdcc_go_out; wire _guard115 = _guard113 & _guard114; -wire _guard116 = tdcc_go_out; -wire _guard117 = _guard115 & _guard116; -wire _guard118 = _guard112 | _guard117; -wire _guard119 = fsm0_out == 3'd1; -wire _guard120 = invoke1_done_out; -wire _guard121 = n_finished_last_transfer_out; -wire _guard122 = _guard120 & _guard121; -wire _guard123 = _guard119 & _guard122; -wire _guard124 = tdcc_go_out; -wire _guard125 = _guard123 & _guard124; -wire _guard126 = _guard118 | _guard125; -wire _guard127 = fsm0_out == 3'd4; -wire _guard128 = par0_done_out; -wire _guard129 = n_finished_last_transfer_out; -wire _guard130 = _guard128 & _guard129; -wire _guard131 = _guard127 & _guard130; -wire _guard132 = tdcc_go_out; -wire _guard133 = _guard131 & _guard132; -wire _guard134 = _guard126 | _guard133; -wire _guard135 = fsm0_out == 3'd2; -wire _guard136 = invoke2_done_out; -wire _guard137 = _guard135 & _guard136; -wire _guard138 = tdcc_go_out; -wire _guard139 = _guard137 & _guard138; -wire _guard140 = _guard134 | _guard139; -wire _guard141 = fsm0_out == 3'd3; -wire _guard142 = service_write_transfer_done_out; -wire _guard143 = _guard141 & _guard142; -wire _guard144 = tdcc_go_out; -wire _guard145 = _guard143 & _guard144; -wire _guard146 = _guard140 | _guard145; -wire _guard147 = fsm0_out == 3'd1; -wire _guard148 = invoke1_done_out; -wire _guard149 = n_finished_last_transfer_out; -wire _guard150 = ~_guard149; -wire _guard151 = _guard148 & _guard150; -wire _guard152 = _guard147 & _guard151; -wire _guard153 = tdcc_go_out; -wire _guard154 = _guard152 & _guard153; -wire _guard155 = _guard146 | _guard154; -wire _guard156 = fsm0_out == 3'd4; -wire _guard157 = par0_done_out; -wire _guard158 = n_finished_last_transfer_out; -wire _guard159 = ~_guard158; -wire _guard160 = _guard157 & _guard159; -wire _guard161 = _guard156 & _guard160; -wire _guard162 = tdcc_go_out; -wire _guard163 = _guard161 & _guard162; -wire _guard164 = _guard155 | _guard163; -wire _guard165 = fsm0_out == 3'd1; -wire _guard166 = invoke1_done_out; -wire _guard167 = n_finished_last_transfer_out; -wire _guard168 = ~_guard167; -wire _guard169 = _guard166 & _guard168; -wire _guard170 = _guard165 & _guard169; -wire _guard171 = tdcc_go_out; -wire _guard172 = _guard170 & _guard171; -wire _guard173 = fsm0_out == 3'd4; -wire _guard174 = par0_done_out; -wire _guard175 = n_finished_last_transfer_out; -wire _guard176 = ~_guard175; -wire _guard177 = _guard174 & _guard176; -wire _guard178 = _guard173 & _guard177; -wire _guard179 = tdcc_go_out; -wire _guard180 = _guard178 & _guard179; -wire _guard181 = _guard172 | _guard180; -wire _guard182 = fsm0_out == 3'd1; -wire _guard183 = invoke1_done_out; -wire _guard184 = n_finished_last_transfer_out; -wire _guard185 = _guard183 & _guard184; -wire _guard186 = _guard182 & _guard185; -wire _guard187 = tdcc_go_out; +wire _guard116 = fsm_out == 3'd0; +wire _guard117 = invoke0_done_out; +wire _guard118 = _guard116 & _guard117; +wire _guard119 = tdcc_go_out; +wire _guard120 = _guard118 & _guard119; +wire _guard121 = fsm_out == 3'd5; +wire _guard122 = fsm_out == 3'd2; +wire _guard123 = invoke2_done_out; +wire _guard124 = _guard122 & _guard123; +wire _guard125 = tdcc_go_out; +wire _guard126 = _guard124 & _guard125; +wire _guard127 = pd_out; +wire _guard128 = wrapper_early_reset_static_par_thread_done_out; +wire _guard129 = _guard127 | _guard128; +wire _guard130 = ~_guard129; +wire _guard131 = par0_go_out; +wire _guard132 = _guard130 & _guard131; +wire _guard133 = invoke2_done_out; +wire _guard134 = ~_guard133; +wire _guard135 = fsm_out == 3'd2; +wire _guard136 = _guard134 & _guard135; +wire _guard137 = tdcc_go_out; +wire _guard138 = _guard136 & _guard137; +wire _guard139 = early_reset_static_par_thread_go_out; +wire _guard140 = early_reset_static_par_thread_go_out; +wire _guard141 = service_write_transfer_go_out; +wire _guard142 = wvalid_out; +wire _guard143 = WREADY; +wire _guard144 = _guard142 & _guard143; +wire _guard145 = ~_guard144; +wire _guard146 = w_handshake_occurred_out; +wire _guard147 = ~_guard146; +wire _guard148 = _guard145 & _guard147; +wire _guard149 = service_write_transfer_go_out; +wire _guard150 = _guard148 & _guard149; +wire _guard151 = wvalid_out; +wire _guard152 = WREADY; +wire _guard153 = _guard151 & _guard152; +wire _guard154 = w_handshake_occurred_out; +wire _guard155 = _guard153 | _guard154; +wire _guard156 = service_write_transfer_go_out; +wire _guard157 = _guard155 & _guard156; +wire _guard158 = max_transfers_out == curr_transfer_count_out; +wire _guard159 = wvalid_out; +wire _guard160 = WREADY; +wire _guard161 = _guard159 & _guard160; +wire _guard162 = _guard158 & _guard161; +wire _guard163 = service_write_transfer_go_out; +wire _guard164 = _guard162 & _guard163; +wire _guard165 = invoke1_go_out; +wire _guard166 = _guard164 | _guard165; +wire _guard167 = invoke1_go_out; +wire _guard168 = max_transfers_out == curr_transfer_count_out; +wire _guard169 = wvalid_out; +wire _guard170 = WREADY; +wire _guard171 = _guard169 & _guard170; +wire _guard172 = _guard168 & _guard171; +wire _guard173 = service_write_transfer_go_out; +wire _guard174 = _guard172 & _guard173; +wire _guard175 = early_reset_static_par_thread_go_out; +wire _guard176 = early_reset_static_par_thread_go_out; +wire _guard177 = pd_out; +wire _guard178 = pd0_out; +wire _guard179 = _guard177 & _guard178; +wire _guard180 = pd1_out; +wire _guard181 = _guard179 & _guard180; +wire _guard182 = curr_addr_axi_incr_group_done_out; +wire _guard183 = par0_go_out; +wire _guard184 = _guard182 & _guard183; +wire _guard185 = _guard181 | _guard184; +wire _guard186 = curr_addr_axi_incr_group_done_out; +wire _guard187 = par0_go_out; wire _guard188 = _guard186 & _guard187; -wire _guard189 = fsm0_out == 3'd4; -wire _guard190 = par0_done_out; -wire _guard191 = n_finished_last_transfer_out; -wire _guard192 = _guard190 & _guard191; -wire _guard193 = _guard189 & _guard192; -wire _guard194 = tdcc_go_out; -wire _guard195 = _guard193 & _guard194; -wire _guard196 = _guard188 | _guard195; -wire _guard197 = fsm0_out == 3'd3; -wire _guard198 = service_write_transfer_done_out; +wire _guard189 = pd_out; +wire _guard190 = pd0_out; +wire _guard191 = _guard189 & _guard190; +wire _guard192 = pd1_out; +wire _guard193 = _guard191 & _guard192; +wire _guard194 = invoke0_done_out; +wire _guard195 = ~_guard194; +wire _guard196 = fsm_out == 3'd0; +wire _guard197 = _guard195 & _guard196; +wire _guard198 = tdcc_go_out; wire _guard199 = _guard197 & _guard198; -wire _guard200 = tdcc_go_out; -wire _guard201 = _guard199 & _guard200; -wire _guard202 = fsm0_out == 3'd0; -wire _guard203 = invoke0_done_out; +wire _guard200 = curr_addr_axi_incr_group_go_out; +wire _guard201 = curr_addr_axi_incr_group_go_out; +wire _guard202 = pd_out; +wire _guard203 = pd0_out; wire _guard204 = _guard202 & _guard203; -wire _guard205 = tdcc_go_out; +wire _guard205 = pd1_out; wire _guard206 = _guard204 & _guard205; -wire _guard207 = fsm0_out == 3'd5; -wire _guard208 = fsm0_out == 3'd2; -wire _guard209 = invoke2_done_out; +wire _guard207 = service_write_transfer_done_out; +wire _guard208 = ~_guard207; +wire _guard209 = fsm_out == 3'd3; wire _guard210 = _guard208 & _guard209; wire _guard211 = tdcc_go_out; wire _guard212 = _guard210 & _guard211; -wire _guard213 = curr_addr_axi_incr_group_go_out; -wire _guard214 = curr_addr_axi_incr_group_go_out; -wire _guard215 = pd_out; -wire _guard216 = pd0_out; -wire _guard217 = _guard215 & _guard216; -wire _guard218 = pd1_out; -wire _guard219 = _guard217 & _guard218; -wire _guard220 = service_write_transfer_done_out; -wire _guard221 = ~_guard220; -wire _guard222 = fsm0_out == 3'd3; -wire _guard223 = _guard221 & _guard222; -wire _guard224 = tdcc_go_out; -wire _guard225 = _guard223 & _guard224; -wire _guard226 = invoke1_done_out; -wire _guard227 = ~_guard226; -wire _guard228 = fsm0_out == 3'd1; +wire _guard213 = invoke1_done_out; +wire _guard214 = ~_guard213; +wire _guard215 = fsm_out == 3'd1; +wire _guard216 = _guard214 & _guard215; +wire _guard217 = tdcc_go_out; +wire _guard218 = _guard216 & _guard217; +wire _guard219 = service_write_transfer_go_out; +wire _guard220 = invoke2_go_out; +wire _guard221 = _guard219 | _guard220; +wire _guard222 = wvalid_out; +wire _guard223 = WREADY; +wire _guard224 = _guard222 & _guard223; +wire _guard225 = service_write_transfer_go_out; +wire _guard226 = _guard224 & _guard225; +wire _guard227 = wvalid_out; +wire _guard228 = WREADY; wire _guard229 = _guard227 & _guard228; -wire _guard230 = tdcc_go_out; -wire _guard231 = _guard229 & _guard230; -wire _guard232 = service_write_transfer_go_out; +wire _guard230 = ~_guard229; +wire _guard231 = service_write_transfer_go_out; +wire _guard232 = _guard230 & _guard231; wire _guard233 = invoke2_go_out; wire _guard234 = _guard232 | _guard233; -wire _guard235 = wvalid_out; -wire _guard236 = WREADY; -wire _guard237 = _guard235 & _guard236; -wire _guard238 = service_write_transfer_go_out; -wire _guard239 = _guard237 & _guard238; -wire _guard240 = wvalid_out; -wire _guard241 = WREADY; -wire _guard242 = _guard240 & _guard241; -wire _guard243 = ~_guard242; -wire _guard244 = service_write_transfer_go_out; -wire _guard245 = _guard243 & _guard244; -wire _guard246 = invoke2_go_out; -wire _guard247 = _guard245 | _guard246; -wire _guard248 = fsm_out == 1'd0; -wire _guard249 = signal_reg_out; -wire _guard250 = _guard248 & _guard249; -wire _guard251 = fsm_out == 1'd0; -wire _guard252 = signal_reg_out; -wire _guard253 = ~_guard252; -wire _guard254 = _guard251 & _guard253; -wire _guard255 = wrapper_early_reset_static_par_go_out; -wire _guard256 = _guard254 & _guard255; -wire _guard257 = _guard250 | _guard256; -wire _guard258 = fsm_out == 1'd0; -wire _guard259 = signal_reg_out; -wire _guard260 = ~_guard259; -wire _guard261 = _guard258 & _guard260; -wire _guard262 = wrapper_early_reset_static_par_go_out; -wire _guard263 = _guard261 & _guard262; -wire _guard264 = fsm_out == 1'd0; -wire _guard265 = signal_reg_out; -wire _guard266 = _guard264 & _guard265; -wire _guard267 = pd_out; -wire _guard268 = pd0_out; -wire _guard269 = _guard267 & _guard268; -wire _guard270 = pd1_out; -wire _guard271 = _guard269 & _guard270; -wire _guard272 = wrapper_early_reset_static_par_done_out; -wire _guard273 = par0_go_out; -wire _guard274 = _guard272 & _guard273; -wire _guard275 = _guard271 | _guard274; -wire _guard276 = wrapper_early_reset_static_par_done_out; -wire _guard277 = par0_go_out; -wire _guard278 = _guard276 & _guard277; -wire _guard279 = pd_out; -wire _guard280 = pd0_out; -wire _guard281 = _guard279 & _guard280; -wire _guard282 = pd1_out; -wire _guard283 = _guard281 & _guard282; -wire _guard284 = pd_out; -wire _guard285 = pd0_out; -wire _guard286 = _guard284 & _guard285; -wire _guard287 = pd1_out; -wire _guard288 = _guard286 & _guard287; -wire _guard289 = curr_addr_internal_mem_incr_group_done_out; -wire _guard290 = par0_go_out; -wire _guard291 = _guard289 & _guard290; -wire _guard292 = _guard288 | _guard291; -wire _guard293 = curr_addr_internal_mem_incr_group_done_out; -wire _guard294 = par0_go_out; -wire _guard295 = _guard293 & _guard294; -wire _guard296 = pd_out; -wire _guard297 = pd0_out; -wire _guard298 = _guard296 & _guard297; -wire _guard299 = pd1_out; -wire _guard300 = _guard298 & _guard299; -wire _guard301 = w_handshake_occurred_out; -wire _guard302 = ~_guard301; -wire _guard303 = service_write_transfer_go_out; -wire _guard304 = _guard302 & _guard303; -wire _guard305 = early_reset_static_par_go_out; -wire _guard306 = _guard304 | _guard305; -wire _guard307 = wvalid_out; -wire _guard308 = WREADY; -wire _guard309 = _guard307 & _guard308; -wire _guard310 = service_write_transfer_go_out; +wire _guard235 = signal_reg_out; +wire _guard236 = _guard0 & _guard0; +wire _guard237 = signal_reg_out; +wire _guard238 = ~_guard237; +wire _guard239 = _guard236 & _guard238; +wire _guard240 = wrapper_early_reset_static_par_thread_go_out; +wire _guard241 = _guard239 & _guard240; +wire _guard242 = _guard235 | _guard241; +wire _guard243 = _guard0 & _guard0; +wire _guard244 = signal_reg_out; +wire _guard245 = ~_guard244; +wire _guard246 = _guard243 & _guard245; +wire _guard247 = wrapper_early_reset_static_par_thread_go_out; +wire _guard248 = _guard246 & _guard247; +wire _guard249 = signal_reg_out; +wire _guard250 = wrapper_early_reset_static_par_thread_go_out; +wire _guard251 = pd_out; +wire _guard252 = pd0_out; +wire _guard253 = _guard251 & _guard252; +wire _guard254 = pd1_out; +wire _guard255 = _guard253 & _guard254; +wire _guard256 = wrapper_early_reset_static_par_thread_done_out; +wire _guard257 = par0_go_out; +wire _guard258 = _guard256 & _guard257; +wire _guard259 = _guard255 | _guard258; +wire _guard260 = wrapper_early_reset_static_par_thread_done_out; +wire _guard261 = par0_go_out; +wire _guard262 = _guard260 & _guard261; +wire _guard263 = pd_out; +wire _guard264 = pd0_out; +wire _guard265 = _guard263 & _guard264; +wire _guard266 = pd1_out; +wire _guard267 = _guard265 & _guard266; +wire _guard268 = pd_out; +wire _guard269 = pd0_out; +wire _guard270 = _guard268 & _guard269; +wire _guard271 = pd1_out; +wire _guard272 = _guard270 & _guard271; +wire _guard273 = curr_addr_internal_mem_incr_group_done_out; +wire _guard274 = par0_go_out; +wire _guard275 = _guard273 & _guard274; +wire _guard276 = _guard272 | _guard275; +wire _guard277 = curr_addr_internal_mem_incr_group_done_out; +wire _guard278 = par0_go_out; +wire _guard279 = _guard277 & _guard278; +wire _guard280 = pd_out; +wire _guard281 = pd0_out; +wire _guard282 = _guard280 & _guard281; +wire _guard283 = pd1_out; +wire _guard284 = _guard282 & _guard283; +wire _guard285 = signal_reg_out; +wire _guard286 = w_handshake_occurred_out; +wire _guard287 = ~_guard286; +wire _guard288 = service_write_transfer_go_out; +wire _guard289 = _guard287 & _guard288; +wire _guard290 = early_reset_static_par_thread_go_out; +wire _guard291 = _guard289 | _guard290; +wire _guard292 = wvalid_out; +wire _guard293 = WREADY; +wire _guard294 = _guard292 & _guard293; +wire _guard295 = service_write_transfer_go_out; +wire _guard296 = _guard294 & _guard295; +wire _guard297 = wvalid_out; +wire _guard298 = WREADY; +wire _guard299 = _guard297 & _guard298; +wire _guard300 = ~_guard299; +wire _guard301 = service_write_transfer_go_out; +wire _guard302 = _guard300 & _guard301; +wire _guard303 = early_reset_static_par_thread_go_out; +wire _guard304 = _guard302 | _guard303; +wire _guard305 = fsm_out == 3'd5; +wire _guard306 = pd0_out; +wire _guard307 = curr_addr_internal_mem_incr_group_done_out; +wire _guard308 = _guard306 | _guard307; +wire _guard309 = ~_guard308; +wire _guard310 = par0_go_out; wire _guard311 = _guard309 & _guard310; -wire _guard312 = wvalid_out; -wire _guard313 = WREADY; -wire _guard314 = _guard312 & _guard313; -wire _guard315 = ~_guard314; -wire _guard316 = service_write_transfer_go_out; +wire _guard312 = par0_done_out; +wire _guard313 = ~_guard312; +wire _guard314 = fsm_out == 3'd4; +wire _guard315 = _guard313 & _guard314; +wire _guard316 = tdcc_go_out; wire _guard317 = _guard315 & _guard316; -wire _guard318 = early_reset_static_par_go_out; -wire _guard319 = _guard317 | _guard318; -wire _guard320 = fsm0_out == 3'd5; -wire _guard321 = wrapper_early_reset_static_par_go_out; -wire _guard322 = pd0_out; -wire _guard323 = curr_addr_internal_mem_incr_group_done_out; -wire _guard324 = _guard322 | _guard323; -wire _guard325 = ~_guard324; -wire _guard326 = par0_go_out; -wire _guard327 = _guard325 & _guard326; -wire _guard328 = par0_done_out; -wire _guard329 = ~_guard328; -wire _guard330 = fsm0_out == 3'd4; -wire _guard331 = _guard329 & _guard330; -wire _guard332 = tdcc_go_out; -wire _guard333 = _guard331 & _guard332; assign curr_addr_axi_incr_group_go_in = _guard6; assign curr_addr_internal_mem_incr_left = curr_addr_internal_mem_out; assign curr_addr_internal_mem_incr_right = 3'd1; @@ -4439,111 +4261,100 @@ assign curr_addr_internal_mem_in = _guard24 ? curr_addr_internal_mem_incr_out : _guard25 ? 3'd0 : 'x; -assign fsm_write_en = _guard26; +assign fsm_write_en = _guard78; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard30 ? adder_out : - _guard33 ? 1'd0 : - 1'd0; -assign adder_left = - _guard34 ? fsm_out : - 1'd0; -assign adder_right = _guard35; -assign invoke2_go_in = _guard41; -assign curr_transfer_count_write_en = _guard42; + _guard95 ? 3'd5 : + _guard110 ? 3'd2 : + _guard115 ? 3'd4 : + _guard120 ? 3'd1 : + _guard121 ? 3'd0 : + _guard126 ? 3'd3 : + 3'd0; +assign wrapper_early_reset_static_par_thread_go_in = _guard132; +assign invoke2_go_in = _guard138; +assign curr_transfer_count_write_en = _guard139; assign curr_transfer_count_clk = clk; assign curr_transfer_count_reset = reset; assign curr_transfer_count_in = curr_transfer_count_incr_out; -assign wvalid_write_en = _guard44; +assign wvalid_write_en = _guard141; assign wvalid_clk = clk; assign wvalid_reset = reset; assign wvalid_in = - _guard53 ? 1'd1 : - _guard60 ? 1'd0 : + _guard150 ? 1'd1 : + _guard157 ? 1'd0 : 'x; -assign wrapper_early_reset_static_par_go_in = _guard66; -assign n_finished_last_transfer_write_en = _guard75; +assign n_finished_last_transfer_write_en = _guard166; assign n_finished_last_transfer_clk = clk; assign n_finished_last_transfer_reset = reset; assign n_finished_last_transfer_in = - _guard76 ? 1'd1 : - _guard83 ? 1'd0 : + _guard167 ? 1'd1 : + _guard174 ? 1'd0 : 'x; assign curr_transfer_count_incr_left = curr_transfer_count_out; assign curr_transfer_count_incr_right = 8'd1; -assign pd1_write_en = _guard94; +assign pd1_write_en = _guard185; assign pd1_clk = clk; assign pd1_reset = reset; assign pd1_in = - _guard97 ? 1'd1 : - _guard102 ? 1'd0 : + _guard188 ? 1'd1 : + _guard193 ? 1'd0 : 1'd0; -assign wrapper_early_reset_static_par_done_in = _guard105; assign tdcc_go_in = go; -assign invoke0_go_in = _guard111; +assign invoke0_go_in = _guard199; assign service_write_transfer_done_in = bt_reg_out; -assign fsm0_write_en = _guard164; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard181 ? 3'd5 : - _guard196 ? 3'd2 : - _guard201 ? 3'd4 : - _guard206 ? 3'd1 : - _guard207 ? 3'd0 : - _guard212 ? 3'd3 : - 3'd0; assign curr_addr_axi_incr_left = curr_addr_axi_out; assign curr_addr_axi_incr_right = 64'd4; assign curr_addr_internal_mem_incr_group_done_in = curr_addr_internal_mem_done; -assign par0_done_in = _guard219; -assign service_write_transfer_go_in = _guard225; -assign early_reset_static_par_done_in = ud_out; +assign par0_done_in = _guard206; +assign service_write_transfer_go_in = _guard212; assign invoke0_done_in = curr_addr_internal_mem_done; -assign invoke1_go_in = _guard231; -assign bt_reg_write_en = _guard234; +assign invoke1_go_in = _guard218; +assign bt_reg_write_en = _guard221; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard239 ? 1'd1 : - _guard247 ? 1'd0 : + _guard226 ? 1'd1 : + _guard234 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard257; +assign signal_reg_write_en = _guard242; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard263 ? 1'd1 : - _guard266 ? 1'd0 : + _guard248 ? 1'd1 : + _guard249 ? 1'd0 : 1'd0; +assign early_reset_static_par_thread_go_in = _guard250; assign invoke2_done_in = bt_reg_done; -assign pd_write_en = _guard275; +assign pd_write_en = _guard259; assign pd_clk = clk; assign pd_reset = reset; assign pd_in = - _guard278 ? 1'd1 : - _guard283 ? 1'd0 : + _guard262 ? 1'd1 : + _guard267 ? 1'd0 : 1'd0; -assign pd0_write_en = _guard292; +assign pd0_write_en = _guard276; assign pd0_clk = clk; assign pd0_reset = reset; assign pd0_in = - _guard295 ? 1'd1 : - _guard300 ? 1'd0 : + _guard279 ? 1'd1 : + _guard284 ? 1'd0 : 1'd0; -assign w_handshake_occurred_write_en = _guard306; +assign wrapper_early_reset_static_par_thread_done_in = _guard285; +assign w_handshake_occurred_write_en = _guard291; assign w_handshake_occurred_clk = clk; assign w_handshake_occurred_reset = reset; assign w_handshake_occurred_in = - _guard311 ? 1'd1 : - _guard319 ? 1'd0 : + _guard296 ? 1'd1 : + _guard304 ? 1'd0 : 'x; -assign tdcc_done_in = _guard320; -assign early_reset_static_par_go_in = _guard321; -assign curr_addr_internal_mem_incr_group_go_in = _guard327; +assign tdcc_done_in = _guard305; +assign early_reset_static_par_thread_done_in = ud_out; +assign curr_addr_internal_mem_incr_group_go_in = _guard311; assign invoke1_done_in = n_finished_last_transfer_done; assign curr_addr_axi_incr_group_done_in = curr_addr_axi_done; -assign par0_go_in = _guard333; +assign par0_go_in = _guard317; // COMPONENT END: m_write_channel endmodule module m_bresp_channel( @@ -5236,18 +5047,6 @@ logic bresp_channel_Sum0_go; logic bresp_channel_Sum0_clk; logic bresp_channel_Sum0_reset; logic bresp_channel_Sum0_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; -logic adder0_left; -logic adder0_right; -logic adder0_out; logic ud_out; logic ud0_out; logic signal_reg_in; @@ -5256,84 +5055,90 @@ logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic signal_reg0_in; +logic signal_reg0_write_en; +logic signal_reg0_clk; +logic signal_reg0_reset; +logic signal_reg0_out; +logic signal_reg0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic pd_in; logic pd_write_en; logic pd_clk; logic pd_reset; logic pd_out; logic pd_done; -logic [1:0] fsm1_in; -logic fsm1_write_en; -logic fsm1_clk; -logic fsm1_reset; -logic [1:0] fsm1_out; -logic fsm1_done; +logic [1:0] fsm0_in; +logic fsm0_write_en; +logic fsm0_clk; +logic fsm0_reset; +logic [1:0] fsm0_out; +logic fsm0_done; logic pd0_in; logic pd0_write_en; logic pd0_clk; logic pd0_reset; logic pd0_out; logic pd0_done; -logic [1:0] fsm2_in; -logic fsm2_write_en; -logic fsm2_clk; -logic fsm2_reset; -logic [1:0] fsm2_out; -logic fsm2_done; +logic [1:0] fsm1_in; +logic fsm1_write_en; +logic fsm1_clk; +logic fsm1_reset; +logic [1:0] fsm1_out; +logic fsm1_done; logic pd1_in; logic pd1_write_en; logic pd1_clk; logic pd1_reset; logic pd1_out; logic pd1_done; -logic [1:0] fsm3_in; -logic fsm3_write_en; -logic fsm3_clk; -logic fsm3_reset; -logic [1:0] fsm3_out; -logic fsm3_done; +logic [1:0] fsm2_in; +logic fsm2_write_en; +logic fsm2_clk; +logic fsm2_reset; +logic [1:0] fsm2_out; +logic fsm2_done; logic pd2_in; logic pd2_write_en; logic pd2_clk; logic pd2_reset; logic pd2_out; logic pd2_done; -logic [1:0] fsm4_in; -logic fsm4_write_en; -logic fsm4_clk; -logic fsm4_reset; -logic [1:0] fsm4_out; -logic fsm4_done; +logic [1:0] fsm3_in; +logic fsm3_write_en; +logic fsm3_clk; +logic fsm3_reset; +logic [1:0] fsm3_out; +logic fsm3_done; logic pd3_in; logic pd3_write_en; logic pd3_clk; logic pd3_reset; logic pd3_out; logic pd3_done; -logic [1:0] fsm5_in; -logic fsm5_write_en; -logic fsm5_clk; -logic fsm5_reset; -logic [1:0] fsm5_out; -logic fsm5_done; +logic [1:0] fsm4_in; +logic fsm4_write_en; +logic fsm4_clk; +logic fsm4_reset; +logic [1:0] fsm4_out; +logic fsm4_done; logic pd4_in; logic pd4_write_en; logic pd4_clk; logic pd4_reset; logic pd4_out; logic pd4_done; -logic [2:0] fsm6_in; -logic fsm6_write_en; -logic fsm6_clk; -logic fsm6_reset; -logic [2:0] fsm6_out; -logic fsm6_done; +logic [2:0] fsm5_in; +logic fsm5_write_en; +logic fsm5_clk; +logic fsm5_reset; +logic [2:0] fsm5_out; +logic fsm5_done; logic invoke6_go_in; logic invoke6_go_out; logic invoke6_done_in; @@ -5398,22 +5203,22 @@ logic invoke24_go_in; logic invoke24_go_out; logic invoke24_done_in; logic invoke24_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic early_reset_static_par0_go_in; -logic early_reset_static_par0_go_out; -logic early_reset_static_par0_done_in; -logic early_reset_static_par0_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; -logic wrapper_early_reset_static_par0_go_in; -logic wrapper_early_reset_static_par0_go_out; -logic wrapper_early_reset_static_par0_done_in; -logic wrapper_early_reset_static_par0_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic early_reset_static_par_thread0_go_in; +logic early_reset_static_par_thread0_go_out; +logic early_reset_static_par_thread0_done_in; +logic early_reset_static_par_thread0_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread0_go_in; +logic wrapper_early_reset_static_par_thread0_go_out; +logic wrapper_early_reset_static_par_thread0_done_in; +logic wrapper_early_reset_static_par_thread0_done_out; logic par0_go_in; logic par0_go_out; logic par0_done_in; @@ -5918,30 +5723,6 @@ m_bresp_channel bresp_channel_Sum0 ( .go(bresp_channel_Sum0_go), .reset(bresp_channel_Sum0_reset) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); -std_add # ( - .WIDTH(1) -) adder0 ( - .left(adder0_left), - .out(adder0_out), - .right(adder0_right) -); undef # ( .WIDTH(1) ) ud ( @@ -5962,15 +5743,25 @@ std_reg # ( .reset(signal_reg_reset), .write_en(signal_reg_write_en) ); +std_reg # ( + .WIDTH(1) +) signal_reg0 ( + .clk(signal_reg0_clk), + .done(signal_reg0_done), + .in(signal_reg0_in), + .out(signal_reg0_out), + .reset(signal_reg0_reset), + .write_en(signal_reg0_write_en) +); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_reg # ( .WIDTH(1) @@ -5984,13 +5775,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm1 ( - .clk(fsm1_clk), - .done(fsm1_done), - .in(fsm1_in), - .out(fsm1_out), - .reset(fsm1_reset), - .write_en(fsm1_write_en) +) fsm0 ( + .clk(fsm0_clk), + .done(fsm0_done), + .in(fsm0_in), + .out(fsm0_out), + .reset(fsm0_reset), + .write_en(fsm0_write_en) ); std_reg # ( .WIDTH(1) @@ -6004,13 +5795,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm2 ( - .clk(fsm2_clk), - .done(fsm2_done), - .in(fsm2_in), - .out(fsm2_out), - .reset(fsm2_reset), - .write_en(fsm2_write_en) +) fsm1 ( + .clk(fsm1_clk), + .done(fsm1_done), + .in(fsm1_in), + .out(fsm1_out), + .reset(fsm1_reset), + .write_en(fsm1_write_en) ); std_reg # ( .WIDTH(1) @@ -6024,13 +5815,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm3 ( - .clk(fsm3_clk), - .done(fsm3_done), - .in(fsm3_in), - .out(fsm3_out), - .reset(fsm3_reset), - .write_en(fsm3_write_en) +) fsm2 ( + .clk(fsm2_clk), + .done(fsm2_done), + .in(fsm2_in), + .out(fsm2_out), + .reset(fsm2_reset), + .write_en(fsm2_write_en) ); std_reg # ( .WIDTH(1) @@ -6044,13 +5835,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm4 ( - .clk(fsm4_clk), - .done(fsm4_done), - .in(fsm4_in), - .out(fsm4_out), - .reset(fsm4_reset), - .write_en(fsm4_write_en) +) fsm3 ( + .clk(fsm3_clk), + .done(fsm3_done), + .in(fsm3_in), + .out(fsm3_out), + .reset(fsm3_reset), + .write_en(fsm3_write_en) ); std_reg # ( .WIDTH(1) @@ -6064,13 +5855,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm5 ( - .clk(fsm5_clk), - .done(fsm5_done), - .in(fsm5_in), - .out(fsm5_out), - .reset(fsm5_reset), - .write_en(fsm5_write_en) +) fsm4 ( + .clk(fsm4_clk), + .done(fsm4_done), + .in(fsm4_in), + .out(fsm4_out), + .reset(fsm4_reset), + .write_en(fsm4_write_en) ); std_reg # ( .WIDTH(1) @@ -6084,13 +5875,13 @@ std_reg # ( ); std_reg # ( .WIDTH(3) -) fsm6 ( - .clk(fsm6_clk), - .done(fsm6_done), - .in(fsm6_in), - .out(fsm6_out), - .reset(fsm6_reset), - .write_en(fsm6_write_en) +) fsm5 ( + .clk(fsm5_clk), + .done(fsm5_done), + .in(fsm5_in), + .out(fsm5_out), + .reset(fsm5_reset), + .write_en(fsm5_write_en) ); std_wire # ( .WIDTH(1) @@ -6286,51 +6077,51 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par0_go ( - .in(early_reset_static_par0_go_in), - .out(early_reset_static_par0_go_out) +) early_reset_static_par_thread0_go ( + .in(early_reset_static_par_thread0_go_in), + .out(early_reset_static_par_thread0_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par0_done ( - .in(early_reset_static_par0_done_in), - .out(early_reset_static_par0_done_out) +) early_reset_static_par_thread0_done ( + .in(early_reset_static_par_thread0_done_in), + .out(early_reset_static_par_thread0_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par0_go ( - .in(wrapper_early_reset_static_par0_go_in), - .out(wrapper_early_reset_static_par0_go_out) +) wrapper_early_reset_static_par_thread0_go ( + .in(wrapper_early_reset_static_par_thread0_go_in), + .out(wrapper_early_reset_static_par_thread0_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par0_done ( - .in(wrapper_early_reset_static_par0_done_in), - .out(wrapper_early_reset_static_par0_done_out) +) wrapper_early_reset_static_par_thread0_done ( + .in(wrapper_early_reset_static_par_thread0_done_in), + .out(wrapper_early_reset_static_par_thread0_done_out) ); std_wire # ( .WIDTH(1) @@ -6441,19 +6232,19 @@ std_wire # ( .out(tdcc5_done_out) ); wire _guard0 = 1; -wire _guard1 = early_reset_static_par_go_out; +wire _guard1 = early_reset_static_par_thread_go_out; wire _guard2 = invoke7_go_out; wire _guard3 = invoke17_go_out; wire _guard4 = invoke7_go_out; wire _guard5 = invoke17_go_out; -wire _guard6 = early_reset_static_par_go_out; +wire _guard6 = early_reset_static_par_thread_go_out; wire _guard7 = invoke9_done_out; wire _guard8 = ~_guard7; -wire _guard9 = fsm1_out == 2'd1; +wire _guard9 = fsm0_out == 2'd1; wire _guard10 = _guard8 & _guard9; wire _guard11 = tdcc0_go_out; wire _guard12 = _guard10 & _guard11; -wire _guard13 = fsm3_out == 2'd3; +wire _guard13 = fsm2_out == 2'd3; wire _guard14 = invoke11_go_out; wire _guard15 = invoke11_go_out; wire _guard16 = invoke11_go_out; @@ -6514,735 +6305,706 @@ wire _guard70 = invoke16_go_out; wire _guard71 = invoke19_go_out; wire _guard72 = invoke19_go_out; wire _guard73 = invoke6_go_out; -wire _guard74 = early_reset_static_par_go_out; -wire _guard75 = early_reset_static_par0_go_out; -wire _guard76 = _guard74 | _guard75; -wire _guard77 = fsm_out == 1'd0; -wire _guard78 = ~_guard77; -wire _guard79 = early_reset_static_par_go_out; -wire _guard80 = _guard78 & _guard79; -wire _guard81 = fsm_out == 1'd0; -wire _guard82 = early_reset_static_par_go_out; +wire _guard74 = fsm_out == 2'd2; +wire _guard75 = fsm_out == 2'd0; +wire _guard76 = invoke6_done_out; +wire _guard77 = _guard75 & _guard76; +wire _guard78 = tdcc_go_out; +wire _guard79 = _guard77 & _guard78; +wire _guard80 = _guard74 | _guard79; +wire _guard81 = fsm_out == 2'd1; +wire _guard82 = invoke7_done_out; wire _guard83 = _guard81 & _guard82; -wire _guard84 = fsm_out == 1'd0; -wire _guard85 = early_reset_static_par0_go_out; -wire _guard86 = _guard84 & _guard85; -wire _guard87 = _guard83 | _guard86; -wire _guard88 = fsm_out == 1'd0; -wire _guard89 = ~_guard88; -wire _guard90 = early_reset_static_par0_go_out; +wire _guard84 = tdcc_go_out; +wire _guard85 = _guard83 & _guard84; +wire _guard86 = _guard80 | _guard85; +wire _guard87 = fsm_out == 2'd0; +wire _guard88 = invoke6_done_out; +wire _guard89 = _guard87 & _guard88; +wire _guard90 = tdcc_go_out; wire _guard91 = _guard89 & _guard90; -wire _guard92 = early_reset_static_par_go_out; -wire _guard93 = early_reset_static_par_go_out; -wire _guard94 = fsm6_out == 3'd5; -wire _guard95 = fsm6_out == 3'd0; -wire _guard96 = wrapper_early_reset_static_par_done_out; +wire _guard92 = fsm_out == 2'd2; +wire _guard93 = fsm_out == 2'd1; +wire _guard94 = invoke7_done_out; +wire _guard95 = _guard93 & _guard94; +wire _guard96 = tdcc_go_out; wire _guard97 = _guard95 & _guard96; -wire _guard98 = tdcc5_go_out; -wire _guard99 = _guard97 & _guard98; -wire _guard100 = _guard94 | _guard99; -wire _guard101 = fsm6_out == 3'd1; -wire _guard102 = par0_done_out; +wire _guard98 = invoke18_done_out; +wire _guard99 = ~_guard98; +wire _guard100 = fsm2_out == 2'd2; +wire _guard101 = _guard99 & _guard100; +wire _guard102 = tdcc2_go_out; wire _guard103 = _guard101 & _guard102; -wire _guard104 = tdcc5_go_out; -wire _guard105 = _guard103 & _guard104; -wire _guard106 = _guard100 | _guard105; -wire _guard107 = fsm6_out == 3'd2; -wire _guard108 = invoke12_done_out; +wire _guard104 = pd2_out; +wire _guard105 = tdcc2_done_out; +wire _guard106 = _guard104 | _guard105; +wire _guard107 = ~_guard106; +wire _guard108 = par1_go_out; wire _guard109 = _guard107 & _guard108; -wire _guard110 = tdcc5_go_out; -wire _guard111 = _guard109 & _guard110; -wire _guard112 = _guard106 | _guard111; -wire _guard113 = fsm6_out == 3'd3; -wire _guard114 = wrapper_early_reset_static_par0_done_out; -wire _guard115 = _guard113 & _guard114; -wire _guard116 = tdcc5_go_out; -wire _guard117 = _guard115 & _guard116; -wire _guard118 = _guard112 | _guard117; -wire _guard119 = fsm6_out == 3'd4; -wire _guard120 = par1_done_out; -wire _guard121 = _guard119 & _guard120; -wire _guard122 = tdcc5_go_out; -wire _guard123 = _guard121 & _guard122; -wire _guard124 = _guard118 | _guard123; -wire _guard125 = fsm6_out == 3'd4; -wire _guard126 = par1_done_out; -wire _guard127 = _guard125 & _guard126; -wire _guard128 = tdcc5_go_out; -wire _guard129 = _guard127 & _guard128; -wire _guard130 = fsm6_out == 3'd1; -wire _guard131 = par0_done_out; -wire _guard132 = _guard130 & _guard131; -wire _guard133 = tdcc5_go_out; -wire _guard134 = _guard132 & _guard133; -wire _guard135 = fsm6_out == 3'd3; -wire _guard136 = wrapper_early_reset_static_par0_done_out; -wire _guard137 = _guard135 & _guard136; -wire _guard138 = tdcc5_go_out; -wire _guard139 = _guard137 & _guard138; -wire _guard140 = fsm6_out == 3'd0; -wire _guard141 = wrapper_early_reset_static_par_done_out; -wire _guard142 = _guard140 & _guard141; -wire _guard143 = tdcc5_go_out; -wire _guard144 = _guard142 & _guard143; -wire _guard145 = fsm6_out == 3'd5; -wire _guard146 = fsm6_out == 3'd2; -wire _guard147 = invoke12_done_out; -wire _guard148 = _guard146 & _guard147; -wire _guard149 = tdcc5_go_out; -wire _guard150 = _guard148 & _guard149; -wire _guard151 = wrapper_early_reset_static_par0_go_out; -wire _guard152 = invoke18_done_out; -wire _guard153 = ~_guard152; -wire _guard154 = fsm3_out == 2'd2; -wire _guard155 = _guard153 & _guard154; -wire _guard156 = tdcc2_go_out; +wire _guard110 = invoke9_go_out; +wire _guard111 = early_reset_static_par_thread_go_out; +wire _guard112 = invoke20_go_out; +wire _guard113 = invoke9_go_out; +wire _guard114 = invoke20_go_out; +wire _guard115 = early_reset_static_par_thread_go_out; +wire _guard116 = invoke9_go_out; +wire _guard117 = invoke9_go_out; +wire _guard118 = invoke9_go_out; +wire _guard119 = invoke9_go_out; +wire _guard120 = invoke9_go_out; +wire _guard121 = invoke9_go_out; +wire _guard122 = invoke9_go_out; +wire _guard123 = invoke9_go_out; +wire _guard124 = invoke9_go_out; +wire _guard125 = invoke9_go_out; +wire _guard126 = invoke9_go_out; +wire _guard127 = invoke9_go_out; +wire _guard128 = invoke12_go_out; +wire _guard129 = invoke20_go_out; +wire _guard130 = invoke9_go_out; +wire _guard131 = invoke12_go_out; +wire _guard132 = invoke20_go_out; +wire _guard133 = invoke9_go_out; +wire _guard134 = invoke12_go_out; +wire _guard135 = invoke20_go_out; +wire _guard136 = invoke9_go_out; +wire _guard137 = invoke24_go_out; +wire _guard138 = invoke24_go_out; +wire _guard139 = signal_reg0_out; +wire _guard140 = _guard0 & _guard0; +wire _guard141 = signal_reg0_out; +wire _guard142 = ~_guard141; +wire _guard143 = _guard140 & _guard142; +wire _guard144 = wrapper_early_reset_static_par_thread0_go_out; +wire _guard145 = _guard143 & _guard144; +wire _guard146 = _guard139 | _guard145; +wire _guard147 = _guard0 & _guard0; +wire _guard148 = signal_reg0_out; +wire _guard149 = ~_guard148; +wire _guard150 = _guard147 & _guard149; +wire _guard151 = wrapper_early_reset_static_par_thread0_go_out; +wire _guard152 = _guard150 & _guard151; +wire _guard153 = signal_reg0_out; +wire _guard154 = fsm3_out == 2'd3; +wire _guard155 = fsm3_out == 2'd0; +wire _guard156 = invoke19_done_out; wire _guard157 = _guard155 & _guard156; -wire _guard158 = pd2_out; -wire _guard159 = tdcc2_done_out; -wire _guard160 = _guard158 | _guard159; -wire _guard161 = ~_guard160; -wire _guard162 = par1_go_out; +wire _guard158 = tdcc3_go_out; +wire _guard159 = _guard157 & _guard158; +wire _guard160 = _guard154 | _guard159; +wire _guard161 = fsm3_out == 2'd1; +wire _guard162 = invoke20_done_out; wire _guard163 = _guard161 & _guard162; -wire _guard164 = invoke9_go_out; -wire _guard165 = early_reset_static_par_go_out; -wire _guard166 = invoke20_go_out; -wire _guard167 = invoke9_go_out; -wire _guard168 = invoke20_go_out; -wire _guard169 = early_reset_static_par_go_out; -wire _guard170 = invoke9_go_out; -wire _guard171 = invoke9_go_out; -wire _guard172 = invoke9_go_out; -wire _guard173 = invoke9_go_out; -wire _guard174 = invoke9_go_out; -wire _guard175 = invoke9_go_out; -wire _guard176 = invoke9_go_out; -wire _guard177 = invoke9_go_out; -wire _guard178 = invoke9_go_out; -wire _guard179 = invoke9_go_out; -wire _guard180 = invoke9_go_out; -wire _guard181 = invoke9_go_out; -wire _guard182 = invoke12_go_out; -wire _guard183 = invoke20_go_out; -wire _guard184 = invoke9_go_out; -wire _guard185 = invoke12_go_out; -wire _guard186 = invoke20_go_out; -wire _guard187 = invoke9_go_out; -wire _guard188 = invoke12_go_out; -wire _guard189 = invoke20_go_out; -wire _guard190 = invoke9_go_out; -wire _guard191 = invoke24_go_out; -wire _guard192 = invoke24_go_out; -wire _guard193 = fsm3_out == 2'd3; -wire _guard194 = fsm3_out == 2'd0; -wire _guard195 = invoke16_done_out; -wire _guard196 = _guard194 & _guard195; -wire _guard197 = tdcc2_go_out; +wire _guard164 = tdcc3_go_out; +wire _guard165 = _guard163 & _guard164; +wire _guard166 = _guard160 | _guard165; +wire _guard167 = fsm3_out == 2'd2; +wire _guard168 = invoke21_done_out; +wire _guard169 = _guard167 & _guard168; +wire _guard170 = tdcc3_go_out; +wire _guard171 = _guard169 & _guard170; +wire _guard172 = _guard166 | _guard171; +wire _guard173 = fsm3_out == 2'd0; +wire _guard174 = invoke19_done_out; +wire _guard175 = _guard173 & _guard174; +wire _guard176 = tdcc3_go_out; +wire _guard177 = _guard175 & _guard176; +wire _guard178 = fsm3_out == 2'd3; +wire _guard179 = fsm3_out == 2'd2; +wire _guard180 = invoke21_done_out; +wire _guard181 = _guard179 & _guard180; +wire _guard182 = tdcc3_go_out; +wire _guard183 = _guard181 & _guard182; +wire _guard184 = fsm3_out == 2'd1; +wire _guard185 = invoke20_done_out; +wire _guard186 = _guard184 & _guard185; +wire _guard187 = tdcc3_go_out; +wire _guard188 = _guard186 & _guard187; +wire _guard189 = fsm5_out == 3'd5; +wire _guard190 = fsm5_out == 3'd0; +wire _guard191 = wrapper_early_reset_static_par_thread_done_out; +wire _guard192 = _guard190 & _guard191; +wire _guard193 = tdcc5_go_out; +wire _guard194 = _guard192 & _guard193; +wire _guard195 = _guard189 | _guard194; +wire _guard196 = fsm5_out == 3'd1; +wire _guard197 = par0_done_out; wire _guard198 = _guard196 & _guard197; -wire _guard199 = _guard193 | _guard198; -wire _guard200 = fsm3_out == 2'd1; -wire _guard201 = invoke17_done_out; -wire _guard202 = _guard200 & _guard201; -wire _guard203 = tdcc2_go_out; +wire _guard199 = tdcc5_go_out; +wire _guard200 = _guard198 & _guard199; +wire _guard201 = _guard195 | _guard200; +wire _guard202 = fsm5_out == 3'd2; +wire _guard203 = invoke12_done_out; wire _guard204 = _guard202 & _guard203; -wire _guard205 = _guard199 | _guard204; -wire _guard206 = fsm3_out == 2'd2; -wire _guard207 = invoke18_done_out; -wire _guard208 = _guard206 & _guard207; -wire _guard209 = tdcc2_go_out; +wire _guard205 = tdcc5_go_out; +wire _guard206 = _guard204 & _guard205; +wire _guard207 = _guard201 | _guard206; +wire _guard208 = fsm5_out == 3'd3; +wire _guard209 = wrapper_early_reset_static_par_thread0_done_out; wire _guard210 = _guard208 & _guard209; -wire _guard211 = _guard205 | _guard210; -wire _guard212 = fsm3_out == 2'd0; -wire _guard213 = invoke16_done_out; -wire _guard214 = _guard212 & _guard213; -wire _guard215 = tdcc2_go_out; +wire _guard211 = tdcc5_go_out; +wire _guard212 = _guard210 & _guard211; +wire _guard213 = _guard207 | _guard212; +wire _guard214 = fsm5_out == 3'd4; +wire _guard215 = par1_done_out; wire _guard216 = _guard214 & _guard215; -wire _guard217 = fsm3_out == 2'd3; -wire _guard218 = fsm3_out == 2'd2; -wire _guard219 = invoke18_done_out; -wire _guard220 = _guard218 & _guard219; -wire _guard221 = tdcc2_go_out; +wire _guard217 = tdcc5_go_out; +wire _guard218 = _guard216 & _guard217; +wire _guard219 = _guard213 | _guard218; +wire _guard220 = fsm5_out == 3'd4; +wire _guard221 = par1_done_out; wire _guard222 = _guard220 & _guard221; -wire _guard223 = fsm3_out == 2'd1; -wire _guard224 = invoke17_done_out; -wire _guard225 = _guard223 & _guard224; -wire _guard226 = tdcc2_go_out; +wire _guard223 = tdcc5_go_out; +wire _guard224 = _guard222 & _guard223; +wire _guard225 = fsm5_out == 3'd1; +wire _guard226 = par0_done_out; wire _guard227 = _guard225 & _guard226; -wire _guard228 = fsm5_out == 2'd3; -wire _guard229 = fsm5_out == 2'd0; -wire _guard230 = invoke22_done_out; -wire _guard231 = _guard229 & _guard230; -wire _guard232 = tdcc4_go_out; -wire _guard233 = _guard231 & _guard232; -wire _guard234 = _guard228 | _guard233; -wire _guard235 = fsm5_out == 2'd1; -wire _guard236 = invoke23_done_out; +wire _guard228 = tdcc5_go_out; +wire _guard229 = _guard227 & _guard228; +wire _guard230 = fsm5_out == 3'd3; +wire _guard231 = wrapper_early_reset_static_par_thread0_done_out; +wire _guard232 = _guard230 & _guard231; +wire _guard233 = tdcc5_go_out; +wire _guard234 = _guard232 & _guard233; +wire _guard235 = fsm5_out == 3'd0; +wire _guard236 = wrapper_early_reset_static_par_thread_done_out; wire _guard237 = _guard235 & _guard236; -wire _guard238 = tdcc4_go_out; +wire _guard238 = tdcc5_go_out; wire _guard239 = _guard237 & _guard238; -wire _guard240 = _guard234 | _guard239; -wire _guard241 = fsm5_out == 2'd2; -wire _guard242 = invoke24_done_out; +wire _guard240 = fsm5_out == 3'd5; +wire _guard241 = fsm5_out == 3'd2; +wire _guard242 = invoke12_done_out; wire _guard243 = _guard241 & _guard242; -wire _guard244 = tdcc4_go_out; +wire _guard244 = tdcc5_go_out; wire _guard245 = _guard243 & _guard244; -wire _guard246 = _guard240 | _guard245; -wire _guard247 = fsm5_out == 2'd0; -wire _guard248 = invoke22_done_out; +wire _guard246 = wrapper_early_reset_static_par_thread_done_out; +wire _guard247 = ~_guard246; +wire _guard248 = fsm5_out == 3'd0; wire _guard249 = _guard247 & _guard248; -wire _guard250 = tdcc4_go_out; +wire _guard250 = tdcc5_go_out; wire _guard251 = _guard249 & _guard250; -wire _guard252 = fsm5_out == 2'd3; -wire _guard253 = fsm5_out == 2'd2; -wire _guard254 = invoke24_done_out; -wire _guard255 = _guard253 & _guard254; -wire _guard256 = tdcc4_go_out; -wire _guard257 = _guard255 & _guard256; -wire _guard258 = fsm5_out == 2'd1; -wire _guard259 = invoke23_done_out; -wire _guard260 = _guard258 & _guard259; -wire _guard261 = tdcc4_go_out; -wire _guard262 = _guard260 & _guard261; -wire _guard263 = fsm1_out == 2'd2; -wire _guard264 = invoke9_go_out; -wire _guard265 = early_reset_static_par_go_out; -wire _guard266 = early_reset_static_par0_go_out; -wire _guard267 = _guard265 | _guard266; -wire _guard268 = invoke20_go_out; -wire _guard269 = invoke9_go_out; -wire _guard270 = invoke20_go_out; -wire _guard271 = early_reset_static_par_go_out; -wire _guard272 = early_reset_static_par0_go_out; -wire _guard273 = _guard271 | _guard272; -wire _guard274 = invoke22_go_out; -wire _guard275 = invoke22_go_out; -wire _guard276 = invoke12_go_out; -wire _guard277 = invoke12_go_out; -wire _guard278 = invoke12_go_out; -wire _guard279 = invoke12_go_out; -wire _guard280 = invoke12_go_out; -wire _guard281 = invoke12_go_out; -wire _guard282 = fsm1_out == 2'd2; -wire _guard283 = fsm1_out == 2'd0; -wire _guard284 = invoke8_done_out; -wire _guard285 = _guard283 & _guard284; -wire _guard286 = tdcc0_go_out; -wire _guard287 = _guard285 & _guard286; -wire _guard288 = _guard282 | _guard287; -wire _guard289 = fsm1_out == 2'd1; -wire _guard290 = invoke9_done_out; -wire _guard291 = _guard289 & _guard290; -wire _guard292 = tdcc0_go_out; -wire _guard293 = _guard291 & _guard292; -wire _guard294 = _guard288 | _guard293; -wire _guard295 = fsm1_out == 2'd0; -wire _guard296 = invoke8_done_out; -wire _guard297 = _guard295 & _guard296; -wire _guard298 = tdcc0_go_out; -wire _guard299 = _guard297 & _guard298; -wire _guard300 = fsm1_out == 2'd2; -wire _guard301 = fsm1_out == 2'd1; -wire _guard302 = invoke9_done_out; -wire _guard303 = _guard301 & _guard302; -wire _guard304 = tdcc0_go_out; -wire _guard305 = _guard303 & _guard304; -wire _guard306 = fsm4_out == 2'd3; -wire _guard307 = fsm4_out == 2'd0; -wire _guard308 = invoke19_done_out; -wire _guard309 = _guard307 & _guard308; -wire _guard310 = tdcc3_go_out; -wire _guard311 = _guard309 & _guard310; -wire _guard312 = _guard306 | _guard311; -wire _guard313 = fsm4_out == 2'd1; -wire _guard314 = invoke20_done_out; -wire _guard315 = _guard313 & _guard314; -wire _guard316 = tdcc3_go_out; -wire _guard317 = _guard315 & _guard316; -wire _guard318 = _guard312 | _guard317; -wire _guard319 = fsm4_out == 2'd2; -wire _guard320 = invoke21_done_out; -wire _guard321 = _guard319 & _guard320; -wire _guard322 = tdcc3_go_out; -wire _guard323 = _guard321 & _guard322; -wire _guard324 = _guard318 | _guard323; -wire _guard325 = fsm4_out == 2'd0; -wire _guard326 = invoke19_done_out; +wire _guard252 = fsm0_out == 2'd2; +wire _guard253 = invoke9_go_out; +wire _guard254 = early_reset_static_par_thread_go_out; +wire _guard255 = early_reset_static_par_thread0_go_out; +wire _guard256 = _guard254 | _guard255; +wire _guard257 = invoke20_go_out; +wire _guard258 = invoke9_go_out; +wire _guard259 = invoke20_go_out; +wire _guard260 = early_reset_static_par_thread_go_out; +wire _guard261 = early_reset_static_par_thread0_go_out; +wire _guard262 = _guard260 | _guard261; +wire _guard263 = invoke22_go_out; +wire _guard264 = invoke22_go_out; +wire _guard265 = invoke12_go_out; +wire _guard266 = invoke12_go_out; +wire _guard267 = invoke12_go_out; +wire _guard268 = invoke12_go_out; +wire _guard269 = invoke12_go_out; +wire _guard270 = invoke12_go_out; +wire _guard271 = fsm1_out == 2'd2; +wire _guard272 = fsm1_out == 2'd0; +wire _guard273 = invoke10_done_out; +wire _guard274 = _guard272 & _guard273; +wire _guard275 = tdcc1_go_out; +wire _guard276 = _guard274 & _guard275; +wire _guard277 = _guard271 | _guard276; +wire _guard278 = fsm1_out == 2'd1; +wire _guard279 = invoke11_done_out; +wire _guard280 = _guard278 & _guard279; +wire _guard281 = tdcc1_go_out; +wire _guard282 = _guard280 & _guard281; +wire _guard283 = _guard277 | _guard282; +wire _guard284 = fsm1_out == 2'd0; +wire _guard285 = invoke10_done_out; +wire _guard286 = _guard284 & _guard285; +wire _guard287 = tdcc1_go_out; +wire _guard288 = _guard286 & _guard287; +wire _guard289 = fsm1_out == 2'd2; +wire _guard290 = fsm1_out == 2'd1; +wire _guard291 = invoke11_done_out; +wire _guard292 = _guard290 & _guard291; +wire _guard293 = tdcc1_go_out; +wire _guard294 = _guard292 & _guard293; +wire _guard295 = fsm4_out == 2'd3; +wire _guard296 = fsm4_out == 2'd0; +wire _guard297 = invoke22_done_out; +wire _guard298 = _guard296 & _guard297; +wire _guard299 = tdcc4_go_out; +wire _guard300 = _guard298 & _guard299; +wire _guard301 = _guard295 | _guard300; +wire _guard302 = fsm4_out == 2'd1; +wire _guard303 = invoke23_done_out; +wire _guard304 = _guard302 & _guard303; +wire _guard305 = tdcc4_go_out; +wire _guard306 = _guard304 & _guard305; +wire _guard307 = _guard301 | _guard306; +wire _guard308 = fsm4_out == 2'd2; +wire _guard309 = invoke24_done_out; +wire _guard310 = _guard308 & _guard309; +wire _guard311 = tdcc4_go_out; +wire _guard312 = _guard310 & _guard311; +wire _guard313 = _guard307 | _guard312; +wire _guard314 = fsm4_out == 2'd0; +wire _guard315 = invoke22_done_out; +wire _guard316 = _guard314 & _guard315; +wire _guard317 = tdcc4_go_out; +wire _guard318 = _guard316 & _guard317; +wire _guard319 = fsm4_out == 2'd3; +wire _guard320 = fsm4_out == 2'd2; +wire _guard321 = invoke24_done_out; +wire _guard322 = _guard320 & _guard321; +wire _guard323 = tdcc4_go_out; +wire _guard324 = _guard322 & _guard323; +wire _guard325 = fsm4_out == 2'd1; +wire _guard326 = invoke23_done_out; wire _guard327 = _guard325 & _guard326; -wire _guard328 = tdcc3_go_out; +wire _guard328 = tdcc4_go_out; wire _guard329 = _guard327 & _guard328; -wire _guard330 = fsm4_out == 2'd3; -wire _guard331 = fsm4_out == 2'd2; -wire _guard332 = invoke21_done_out; +wire _guard330 = invoke11_done_out; +wire _guard331 = ~_guard330; +wire _guard332 = fsm1_out == 2'd1; wire _guard333 = _guard331 & _guard332; -wire _guard334 = tdcc3_go_out; +wire _guard334 = tdcc1_go_out; wire _guard335 = _guard333 & _guard334; -wire _guard336 = fsm4_out == 2'd1; -wire _guard337 = invoke20_done_out; -wire _guard338 = _guard336 & _guard337; -wire _guard339 = tdcc3_go_out; -wire _guard340 = _guard338 & _guard339; -wire _guard341 = wrapper_early_reset_static_par_done_out; -wire _guard342 = ~_guard341; -wire _guard343 = fsm6_out == 3'd0; -wire _guard344 = _guard342 & _guard343; -wire _guard345 = tdcc5_go_out; -wire _guard346 = _guard344 & _guard345; -wire _guard347 = invoke11_done_out; -wire _guard348 = ~_guard347; -wire _guard349 = fsm2_out == 2'd1; -wire _guard350 = _guard348 & _guard349; -wire _guard351 = tdcc1_go_out; -wire _guard352 = _guard350 & _guard351; -wire _guard353 = invoke23_done_out; -wire _guard354 = ~_guard353; -wire _guard355 = fsm5_out == 2'd1; -wire _guard356 = _guard354 & _guard355; -wire _guard357 = tdcc4_go_out; -wire _guard358 = _guard356 & _guard357; -wire _guard359 = par1_done_out; -wire _guard360 = ~_guard359; -wire _guard361 = fsm6_out == 3'd4; -wire _guard362 = _guard360 & _guard361; -wire _guard363 = tdcc5_go_out; -wire _guard364 = _guard362 & _guard363; -wire _guard365 = early_reset_static_par_go_out; -wire _guard366 = early_reset_static_par0_go_out; -wire _guard367 = _guard365 | _guard366; +wire _guard336 = invoke23_done_out; +wire _guard337 = ~_guard336; +wire _guard338 = fsm4_out == 2'd1; +wire _guard339 = _guard337 & _guard338; +wire _guard340 = tdcc4_go_out; +wire _guard341 = _guard339 & _guard340; +wire _guard342 = par1_done_out; +wire _guard343 = ~_guard342; +wire _guard344 = fsm5_out == 3'd4; +wire _guard345 = _guard343 & _guard344; +wire _guard346 = tdcc5_go_out; +wire _guard347 = _guard345 & _guard346; +wire _guard348 = early_reset_static_par_thread_go_out; +wire _guard349 = early_reset_static_par_thread0_go_out; +wire _guard350 = _guard348 | _guard349; +wire _guard351 = invoke7_go_out; +wire _guard352 = invoke17_go_out; +wire _guard353 = invoke7_go_out; +wire _guard354 = early_reset_static_par_thread_go_out; +wire _guard355 = early_reset_static_par_thread0_go_out; +wire _guard356 = _guard354 | _guard355; +wire _guard357 = invoke17_go_out; +wire _guard358 = invoke7_go_out; +wire _guard359 = invoke7_go_out; +wire _guard360 = invoke7_go_out; +wire _guard361 = invoke7_go_out; +wire _guard362 = invoke7_go_out; +wire _guard363 = invoke7_go_out; +wire _guard364 = invoke7_go_out; +wire _guard365 = invoke7_go_out; +wire _guard366 = invoke7_go_out; +wire _guard367 = invoke7_go_out; wire _guard368 = invoke7_go_out; -wire _guard369 = invoke17_go_out; +wire _guard369 = invoke12_go_out; wire _guard370 = invoke7_go_out; -wire _guard371 = early_reset_static_par_go_out; -wire _guard372 = early_reset_static_par0_go_out; -wire _guard373 = _guard371 | _guard372; +wire _guard371 = invoke17_go_out; +wire _guard372 = invoke12_go_out; +wire _guard373 = invoke7_go_out; wire _guard374 = invoke17_go_out; -wire _guard375 = invoke7_go_out; +wire _guard375 = invoke12_go_out; wire _guard376 = invoke7_go_out; -wire _guard377 = invoke7_go_out; +wire _guard377 = invoke17_go_out; wire _guard378 = invoke7_go_out; -wire _guard379 = invoke7_go_out; -wire _guard380 = invoke7_go_out; -wire _guard381 = invoke7_go_out; -wire _guard382 = invoke7_go_out; -wire _guard383 = invoke7_go_out; -wire _guard384 = invoke7_go_out; -wire _guard385 = invoke7_go_out; -wire _guard386 = invoke12_go_out; -wire _guard387 = invoke7_go_out; -wire _guard388 = invoke17_go_out; -wire _guard389 = invoke12_go_out; -wire _guard390 = invoke7_go_out; -wire _guard391 = invoke17_go_out; -wire _guard392 = invoke12_go_out; -wire _guard393 = invoke7_go_out; -wire _guard394 = invoke17_go_out; -wire _guard395 = invoke7_go_out; -wire _guard396 = invoke20_go_out; -wire _guard397 = invoke20_go_out; -wire _guard398 = invoke20_go_out; -wire _guard399 = invoke20_go_out; -wire _guard400 = invoke20_go_out; -wire _guard401 = invoke20_go_out; -wire _guard402 = invoke20_go_out; -wire _guard403 = invoke20_go_out; -wire _guard404 = invoke20_go_out; -wire _guard405 = invoke11_go_out; -wire _guard406 = early_reset_static_par_go_out; -wire _guard407 = early_reset_static_par0_go_out; -wire _guard408 = _guard406 | _guard407; -wire _guard409 = invoke23_go_out; -wire _guard410 = invoke11_go_out; -wire _guard411 = early_reset_static_par_go_out; -wire _guard412 = early_reset_static_par0_go_out; -wire _guard413 = _guard411 | _guard412; -wire _guard414 = invoke23_go_out; -wire _guard415 = invoke10_go_out; -wire _guard416 = invoke10_go_out; -wire _guard417 = invoke10_go_out; -wire _guard418 = invoke10_go_out; +wire _guard379 = invoke20_go_out; +wire _guard380 = invoke20_go_out; +wire _guard381 = invoke20_go_out; +wire _guard382 = invoke20_go_out; +wire _guard383 = invoke20_go_out; +wire _guard384 = invoke20_go_out; +wire _guard385 = invoke20_go_out; +wire _guard386 = invoke20_go_out; +wire _guard387 = invoke20_go_out; +wire _guard388 = invoke11_go_out; +wire _guard389 = early_reset_static_par_thread_go_out; +wire _guard390 = early_reset_static_par_thread0_go_out; +wire _guard391 = _guard389 | _guard390; +wire _guard392 = invoke23_go_out; +wire _guard393 = invoke11_go_out; +wire _guard394 = early_reset_static_par_thread_go_out; +wire _guard395 = early_reset_static_par_thread0_go_out; +wire _guard396 = _guard394 | _guard395; +wire _guard397 = invoke23_go_out; +wire _guard398 = invoke10_go_out; +wire _guard399 = invoke10_go_out; +wire _guard400 = invoke10_go_out; +wire _guard401 = invoke10_go_out; +wire _guard402 = pd_out; +wire _guard403 = pd0_out; +wire _guard404 = _guard402 & _guard403; +wire _guard405 = pd1_out; +wire _guard406 = _guard404 & _guard405; +wire _guard407 = tdcc1_done_out; +wire _guard408 = par0_go_out; +wire _guard409 = _guard407 & _guard408; +wire _guard410 = _guard406 | _guard409; +wire _guard411 = tdcc1_done_out; +wire _guard412 = par0_go_out; +wire _guard413 = _guard411 & _guard412; +wire _guard414 = pd_out; +wire _guard415 = pd0_out; +wire _guard416 = _guard414 & _guard415; +wire _guard417 = pd1_out; +wire _guard418 = _guard416 & _guard417; wire _guard419 = pd_out; -wire _guard420 = pd0_out; -wire _guard421 = _guard419 & _guard420; -wire _guard422 = pd1_out; -wire _guard423 = _guard421 & _guard422; -wire _guard424 = tdcc1_done_out; -wire _guard425 = par0_go_out; -wire _guard426 = _guard424 & _guard425; -wire _guard427 = _guard423 | _guard426; -wire _guard428 = tdcc1_done_out; -wire _guard429 = par0_go_out; +wire _guard420 = tdcc_done_out; +wire _guard421 = _guard419 | _guard420; +wire _guard422 = ~_guard421; +wire _guard423 = par0_go_out; +wire _guard424 = _guard422 & _guard423; +wire _guard425 = invoke12_done_out; +wire _guard426 = ~_guard425; +wire _guard427 = fsm5_out == 3'd2; +wire _guard428 = _guard426 & _guard427; +wire _guard429 = tdcc5_go_out; wire _guard430 = _guard428 & _guard429; -wire _guard431 = pd_out; -wire _guard432 = pd0_out; -wire _guard433 = _guard431 & _guard432; -wire _guard434 = pd1_out; -wire _guard435 = _guard433 & _guard434; -wire _guard436 = fsm_out == 1'd0; -wire _guard437 = signal_reg_out; -wire _guard438 = _guard436 & _guard437; -wire _guard439 = pd_out; -wire _guard440 = tdcc_done_out; -wire _guard441 = _guard439 | _guard440; -wire _guard442 = ~_guard441; -wire _guard443 = par0_go_out; -wire _guard444 = _guard442 & _guard443; -wire _guard445 = invoke12_done_out; -wire _guard446 = ~_guard445; -wire _guard447 = fsm6_out == 3'd2; -wire _guard448 = _guard446 & _guard447; -wire _guard449 = tdcc5_go_out; -wire _guard450 = _guard448 & _guard449; -wire _guard451 = pd3_out; -wire _guard452 = tdcc3_done_out; -wire _guard453 = _guard451 | _guard452; -wire _guard454 = ~_guard453; -wire _guard455 = par1_go_out; -wire _guard456 = _guard454 & _guard455; -wire _guard457 = fsm4_out == 2'd3; -wire _guard458 = invoke19_go_out; -wire _guard459 = invoke19_go_out; -wire _guard460 = invoke19_go_out; -wire _guard461 = invoke19_go_out; -wire _guard462 = fsm0_out == 2'd2; -wire _guard463 = fsm0_out == 2'd0; -wire _guard464 = invoke6_done_out; +wire _guard431 = pd3_out; +wire _guard432 = tdcc3_done_out; +wire _guard433 = _guard431 | _guard432; +wire _guard434 = ~_guard433; +wire _guard435 = par1_go_out; +wire _guard436 = _guard434 & _guard435; +wire _guard437 = fsm3_out == 2'd3; +wire _guard438 = invoke19_go_out; +wire _guard439 = invoke19_go_out; +wire _guard440 = invoke19_go_out; +wire _guard441 = invoke19_go_out; +wire _guard442 = fsm0_out == 2'd2; +wire _guard443 = fsm0_out == 2'd0; +wire _guard444 = invoke8_done_out; +wire _guard445 = _guard443 & _guard444; +wire _guard446 = tdcc0_go_out; +wire _guard447 = _guard445 & _guard446; +wire _guard448 = _guard442 | _guard447; +wire _guard449 = fsm0_out == 2'd1; +wire _guard450 = invoke9_done_out; +wire _guard451 = _guard449 & _guard450; +wire _guard452 = tdcc0_go_out; +wire _guard453 = _guard451 & _guard452; +wire _guard454 = _guard448 | _guard453; +wire _guard455 = fsm0_out == 2'd0; +wire _guard456 = invoke8_done_out; +wire _guard457 = _guard455 & _guard456; +wire _guard458 = tdcc0_go_out; +wire _guard459 = _guard457 & _guard458; +wire _guard460 = fsm0_out == 2'd2; +wire _guard461 = fsm0_out == 2'd1; +wire _guard462 = invoke9_done_out; +wire _guard463 = _guard461 & _guard462; +wire _guard464 = tdcc0_go_out; wire _guard465 = _guard463 & _guard464; -wire _guard466 = tdcc_go_out; -wire _guard467 = _guard465 & _guard466; -wire _guard468 = _guard462 | _guard467; -wire _guard469 = fsm0_out == 2'd1; -wire _guard470 = invoke7_done_out; +wire _guard466 = fsm2_out == 2'd3; +wire _guard467 = fsm2_out == 2'd0; +wire _guard468 = invoke16_done_out; +wire _guard469 = _guard467 & _guard468; +wire _guard470 = tdcc2_go_out; wire _guard471 = _guard469 & _guard470; -wire _guard472 = tdcc_go_out; -wire _guard473 = _guard471 & _guard472; -wire _guard474 = _guard468 | _guard473; -wire _guard475 = fsm0_out == 2'd0; -wire _guard476 = invoke6_done_out; +wire _guard472 = _guard466 | _guard471; +wire _guard473 = fsm2_out == 2'd1; +wire _guard474 = invoke17_done_out; +wire _guard475 = _guard473 & _guard474; +wire _guard476 = tdcc2_go_out; wire _guard477 = _guard475 & _guard476; -wire _guard478 = tdcc_go_out; -wire _guard479 = _guard477 & _guard478; -wire _guard480 = fsm0_out == 2'd2; -wire _guard481 = fsm0_out == 2'd1; -wire _guard482 = invoke7_done_out; +wire _guard478 = _guard472 | _guard477; +wire _guard479 = fsm2_out == 2'd2; +wire _guard480 = invoke18_done_out; +wire _guard481 = _guard479 & _guard480; +wire _guard482 = tdcc2_go_out; wire _guard483 = _guard481 & _guard482; -wire _guard484 = tdcc_go_out; -wire _guard485 = _guard483 & _guard484; -wire _guard486 = fsm2_out == 2'd2; -wire _guard487 = fsm2_out == 2'd0; -wire _guard488 = invoke10_done_out; +wire _guard484 = _guard478 | _guard483; +wire _guard485 = fsm2_out == 2'd0; +wire _guard486 = invoke16_done_out; +wire _guard487 = _guard485 & _guard486; +wire _guard488 = tdcc2_go_out; wire _guard489 = _guard487 & _guard488; -wire _guard490 = tdcc1_go_out; -wire _guard491 = _guard489 & _guard490; -wire _guard492 = _guard486 | _guard491; -wire _guard493 = fsm2_out == 2'd1; -wire _guard494 = invoke11_done_out; +wire _guard490 = fsm2_out == 2'd3; +wire _guard491 = fsm2_out == 2'd2; +wire _guard492 = invoke18_done_out; +wire _guard493 = _guard491 & _guard492; +wire _guard494 = tdcc2_go_out; wire _guard495 = _guard493 & _guard494; -wire _guard496 = tdcc1_go_out; -wire _guard497 = _guard495 & _guard496; -wire _guard498 = _guard492 | _guard497; -wire _guard499 = fsm2_out == 2'd0; -wire _guard500 = invoke10_done_out; -wire _guard501 = _guard499 & _guard500; -wire _guard502 = tdcc1_go_out; -wire _guard503 = _guard501 & _guard502; -wire _guard504 = fsm2_out == 2'd2; -wire _guard505 = fsm2_out == 2'd1; -wire _guard506 = invoke11_done_out; -wire _guard507 = _guard505 & _guard506; -wire _guard508 = tdcc1_go_out; -wire _guard509 = _guard507 & _guard508; -wire _guard510 = invoke8_done_out; -wire _guard511 = ~_guard510; -wire _guard512 = fsm1_out == 2'd0; -wire _guard513 = _guard511 & _guard512; -wire _guard514 = tdcc0_go_out; -wire _guard515 = _guard513 & _guard514; -wire _guard516 = pd0_out; -wire _guard517 = tdcc0_done_out; -wire _guard518 = _guard516 | _guard517; -wire _guard519 = ~_guard518; -wire _guard520 = par0_go_out; -wire _guard521 = _guard519 & _guard520; -wire _guard522 = invoke6_go_out; -wire _guard523 = invoke6_go_out; -wire _guard524 = invoke6_go_out; -wire _guard525 = invoke6_go_out; -wire _guard526 = invoke16_go_out; -wire _guard527 = invoke16_go_out; -wire _guard528 = invoke16_go_out; -wire _guard529 = invoke16_go_out; -wire _guard530 = pd_out; -wire _guard531 = pd0_out; -wire _guard532 = _guard530 & _guard531; -wire _guard533 = pd1_out; -wire _guard534 = _guard532 & _guard533; -wire _guard535 = invoke17_done_out; -wire _guard536 = ~_guard535; -wire _guard537 = fsm3_out == 2'd1; -wire _guard538 = _guard536 & _guard537; -wire _guard539 = tdcc2_go_out; +wire _guard496 = fsm2_out == 2'd1; +wire _guard497 = invoke17_done_out; +wire _guard498 = _guard496 & _guard497; +wire _guard499 = tdcc2_go_out; +wire _guard500 = _guard498 & _guard499; +wire _guard501 = invoke8_done_out; +wire _guard502 = ~_guard501; +wire _guard503 = fsm0_out == 2'd0; +wire _guard504 = _guard502 & _guard503; +wire _guard505 = tdcc0_go_out; +wire _guard506 = _guard504 & _guard505; +wire _guard507 = pd0_out; +wire _guard508 = tdcc0_done_out; +wire _guard509 = _guard507 | _guard508; +wire _guard510 = ~_guard509; +wire _guard511 = par0_go_out; +wire _guard512 = _guard510 & _guard511; +wire _guard513 = invoke6_go_out; +wire _guard514 = invoke6_go_out; +wire _guard515 = invoke6_go_out; +wire _guard516 = invoke6_go_out; +wire _guard517 = invoke16_go_out; +wire _guard518 = invoke16_go_out; +wire _guard519 = invoke16_go_out; +wire _guard520 = invoke16_go_out; +wire _guard521 = pd_out; +wire _guard522 = pd0_out; +wire _guard523 = _guard521 & _guard522; +wire _guard524 = pd1_out; +wire _guard525 = _guard523 & _guard524; +wire _guard526 = invoke17_done_out; +wire _guard527 = ~_guard526; +wire _guard528 = fsm2_out == 2'd1; +wire _guard529 = _guard527 & _guard528; +wire _guard530 = tdcc2_go_out; +wire _guard531 = _guard529 & _guard530; +wire _guard532 = invoke21_done_out; +wire _guard533 = ~_guard532; +wire _guard534 = fsm3_out == 2'd2; +wire _guard535 = _guard533 & _guard534; +wire _guard536 = tdcc3_go_out; +wire _guard537 = _guard535 & _guard536; +wire _guard538 = pd2_out; +wire _guard539 = pd3_out; wire _guard540 = _guard538 & _guard539; -wire _guard541 = invoke21_done_out; -wire _guard542 = ~_guard541; -wire _guard543 = fsm4_out == 2'd2; -wire _guard544 = _guard542 & _guard543; -wire _guard545 = tdcc3_go_out; -wire _guard546 = _guard544 & _guard545; -wire _guard547 = early_reset_static_par0_go_out; -wire _guard548 = early_reset_static_par0_go_out; -wire _guard549 = pd2_out; -wire _guard550 = pd3_out; -wire _guard551 = _guard549 & _guard550; -wire _guard552 = pd4_out; -wire _guard553 = _guard551 & _guard552; -wire _guard554 = tdcc2_done_out; -wire _guard555 = par1_go_out; -wire _guard556 = _guard554 & _guard555; -wire _guard557 = _guard553 | _guard556; -wire _guard558 = tdcc2_done_out; -wire _guard559 = par1_go_out; +wire _guard541 = pd4_out; +wire _guard542 = _guard540 & _guard541; +wire _guard543 = tdcc2_done_out; +wire _guard544 = par1_go_out; +wire _guard545 = _guard543 & _guard544; +wire _guard546 = _guard542 | _guard545; +wire _guard547 = tdcc2_done_out; +wire _guard548 = par1_go_out; +wire _guard549 = _guard547 & _guard548; +wire _guard550 = pd2_out; +wire _guard551 = pd3_out; +wire _guard552 = _guard550 & _guard551; +wire _guard553 = pd4_out; +wire _guard554 = _guard552 & _guard553; +wire _guard555 = wrapper_early_reset_static_par_thread0_done_out; +wire _guard556 = ~_guard555; +wire _guard557 = fsm5_out == 3'd3; +wire _guard558 = _guard556 & _guard557; +wire _guard559 = tdcc5_go_out; wire _guard560 = _guard558 & _guard559; -wire _guard561 = pd2_out; -wire _guard562 = pd3_out; -wire _guard563 = _guard561 & _guard562; -wire _guard564 = pd4_out; -wire _guard565 = _guard563 & _guard564; -wire _guard566 = invoke16_done_out; -wire _guard567 = ~_guard566; -wire _guard568 = fsm3_out == 2'd0; -wire _guard569 = _guard567 & _guard568; -wire _guard570 = tdcc2_go_out; -wire _guard571 = _guard569 & _guard570; +wire _guard561 = invoke16_done_out; +wire _guard562 = ~_guard561; +wire _guard563 = fsm2_out == 2'd0; +wire _guard564 = _guard562 & _guard563; +wire _guard565 = tdcc2_go_out; +wire _guard566 = _guard564 & _guard565; +wire _guard567 = invoke17_go_out; +wire _guard568 = invoke17_go_out; +wire _guard569 = invoke17_go_out; +wire _guard570 = invoke17_go_out; +wire _guard571 = invoke17_go_out; wire _guard572 = invoke17_go_out; wire _guard573 = invoke17_go_out; wire _guard574 = invoke17_go_out; wire _guard575 = invoke17_go_out; -wire _guard576 = invoke17_go_out; -wire _guard577 = invoke17_go_out; -wire _guard578 = invoke17_go_out; -wire _guard579 = invoke17_go_out; -wire _guard580 = invoke17_go_out; -wire _guard581 = invoke8_go_out; -wire _guard582 = invoke8_go_out; -wire _guard583 = invoke8_go_out; -wire _guard584 = invoke8_go_out; -wire _guard585 = fsm_out == 1'd0; -wire _guard586 = signal_reg_out; -wire _guard587 = _guard585 & _guard586; -wire _guard588 = fsm_out == 1'd0; +wire _guard576 = invoke8_go_out; +wire _guard577 = invoke8_go_out; +wire _guard578 = invoke8_go_out; +wire _guard579 = invoke8_go_out; +wire _guard580 = signal_reg_out; +wire _guard581 = _guard0 & _guard0; +wire _guard582 = signal_reg_out; +wire _guard583 = ~_guard582; +wire _guard584 = _guard581 & _guard583; +wire _guard585 = wrapper_early_reset_static_par_thread_go_out; +wire _guard586 = _guard584 & _guard585; +wire _guard587 = _guard580 | _guard586; +wire _guard588 = _guard0 & _guard0; wire _guard589 = signal_reg_out; wire _guard590 = ~_guard589; wire _guard591 = _guard588 & _guard590; -wire _guard592 = wrapper_early_reset_static_par_go_out; +wire _guard592 = wrapper_early_reset_static_par_thread_go_out; wire _guard593 = _guard591 & _guard592; -wire _guard594 = _guard587 | _guard593; -wire _guard595 = fsm_out == 1'd0; -wire _guard596 = signal_reg_out; -wire _guard597 = ~_guard596; -wire _guard598 = _guard595 & _guard597; -wire _guard599 = wrapper_early_reset_static_par0_go_out; +wire _guard594 = signal_reg_out; +wire _guard595 = wrapper_early_reset_static_par_thread_go_out; +wire _guard596 = signal_reg0_out; +wire _guard597 = fsm1_out == 2'd2; +wire _guard598 = pd2_out; +wire _guard599 = pd3_out; wire _guard600 = _guard598 & _guard599; -wire _guard601 = _guard594 | _guard600; -wire _guard602 = fsm_out == 1'd0; -wire _guard603 = signal_reg_out; -wire _guard604 = ~_guard603; -wire _guard605 = _guard602 & _guard604; -wire _guard606 = wrapper_early_reset_static_par_go_out; -wire _guard607 = _guard605 & _guard606; -wire _guard608 = fsm_out == 1'd0; -wire _guard609 = signal_reg_out; -wire _guard610 = ~_guard609; -wire _guard611 = _guard608 & _guard610; -wire _guard612 = wrapper_early_reset_static_par0_go_out; -wire _guard613 = _guard611 & _guard612; -wire _guard614 = _guard607 | _guard613; -wire _guard615 = fsm_out == 1'd0; -wire _guard616 = signal_reg_out; -wire _guard617 = _guard615 & _guard616; -wire _guard618 = fsm2_out == 2'd2; -wire _guard619 = pd2_out; -wire _guard620 = pd3_out; -wire _guard621 = _guard619 & _guard620; -wire _guard622 = pd4_out; +wire _guard601 = pd4_out; +wire _guard602 = _guard600 & _guard601; +wire _guard603 = invoke21_go_out; +wire _guard604 = invoke21_go_out; +wire _guard605 = invoke11_go_out; +wire _guard606 = invoke12_go_out; +wire _guard607 = invoke23_go_out; +wire _guard608 = invoke11_go_out; +wire _guard609 = invoke12_go_out; +wire _guard610 = invoke23_go_out; +wire _guard611 = invoke11_go_out; +wire _guard612 = invoke12_go_out; +wire _guard613 = invoke23_go_out; +wire _guard614 = invoke11_go_out; +wire _guard615 = invoke12_go_out; +wire _guard616 = pd_out; +wire _guard617 = pd0_out; +wire _guard618 = _guard616 & _guard617; +wire _guard619 = pd1_out; +wire _guard620 = _guard618 & _guard619; +wire _guard621 = tdcc_done_out; +wire _guard622 = par0_go_out; wire _guard623 = _guard621 & _guard622; -wire _guard624 = invoke21_go_out; -wire _guard625 = invoke21_go_out; -wire _guard626 = invoke11_go_out; -wire _guard627 = invoke12_go_out; -wire _guard628 = invoke23_go_out; -wire _guard629 = invoke11_go_out; -wire _guard630 = invoke12_go_out; -wire _guard631 = invoke23_go_out; -wire _guard632 = invoke11_go_out; -wire _guard633 = invoke12_go_out; -wire _guard634 = invoke23_go_out; -wire _guard635 = invoke11_go_out; -wire _guard636 = invoke12_go_out; -wire _guard637 = pd_out; -wire _guard638 = pd0_out; -wire _guard639 = _guard637 & _guard638; -wire _guard640 = pd1_out; -wire _guard641 = _guard639 & _guard640; -wire _guard642 = tdcc_done_out; +wire _guard624 = _guard620 | _guard623; +wire _guard625 = tdcc_done_out; +wire _guard626 = par0_go_out; +wire _guard627 = _guard625 & _guard626; +wire _guard628 = pd_out; +wire _guard629 = pd0_out; +wire _guard630 = _guard628 & _guard629; +wire _guard631 = pd1_out; +wire _guard632 = _guard630 & _guard631; +wire _guard633 = pd_out; +wire _guard634 = pd0_out; +wire _guard635 = _guard633 & _guard634; +wire _guard636 = pd1_out; +wire _guard637 = _guard635 & _guard636; +wire _guard638 = tdcc0_done_out; +wire _guard639 = par0_go_out; +wire _guard640 = _guard638 & _guard639; +wire _guard641 = _guard637 | _guard640; +wire _guard642 = tdcc0_done_out; wire _guard643 = par0_go_out; wire _guard644 = _guard642 & _guard643; -wire _guard645 = _guard641 | _guard644; -wire _guard646 = tdcc_done_out; -wire _guard647 = par0_go_out; -wire _guard648 = _guard646 & _guard647; -wire _guard649 = pd_out; -wire _guard650 = pd0_out; -wire _guard651 = _guard649 & _guard650; -wire _guard652 = pd1_out; -wire _guard653 = _guard651 & _guard652; -wire _guard654 = pd_out; -wire _guard655 = pd0_out; -wire _guard656 = _guard654 & _guard655; -wire _guard657 = pd1_out; -wire _guard658 = _guard656 & _guard657; -wire _guard659 = tdcc0_done_out; -wire _guard660 = par0_go_out; +wire _guard645 = pd_out; +wire _guard646 = pd0_out; +wire _guard647 = _guard645 & _guard646; +wire _guard648 = pd1_out; +wire _guard649 = _guard647 & _guard648; +wire _guard650 = pd2_out; +wire _guard651 = pd3_out; +wire _guard652 = _guard650 & _guard651; +wire _guard653 = pd4_out; +wire _guard654 = _guard652 & _guard653; +wire _guard655 = tdcc4_done_out; +wire _guard656 = par1_go_out; +wire _guard657 = _guard655 & _guard656; +wire _guard658 = _guard654 | _guard657; +wire _guard659 = tdcc4_done_out; +wire _guard660 = par1_go_out; wire _guard661 = _guard659 & _guard660; -wire _guard662 = _guard658 | _guard661; -wire _guard663 = tdcc0_done_out; -wire _guard664 = par0_go_out; -wire _guard665 = _guard663 & _guard664; -wire _guard666 = pd_out; -wire _guard667 = pd0_out; -wire _guard668 = _guard666 & _guard667; -wire _guard669 = pd1_out; -wire _guard670 = _guard668 & _guard669; -wire _guard671 = pd2_out; -wire _guard672 = pd3_out; -wire _guard673 = _guard671 & _guard672; -wire _guard674 = pd4_out; -wire _guard675 = _guard673 & _guard674; -wire _guard676 = tdcc4_done_out; -wire _guard677 = par1_go_out; -wire _guard678 = _guard676 & _guard677; -wire _guard679 = _guard675 | _guard678; -wire _guard680 = tdcc4_done_out; -wire _guard681 = par1_go_out; -wire _guard682 = _guard680 & _guard681; -wire _guard683 = pd2_out; -wire _guard684 = pd3_out; -wire _guard685 = _guard683 & _guard684; -wire _guard686 = pd4_out; +wire _guard662 = pd2_out; +wire _guard663 = pd3_out; +wire _guard664 = _guard662 & _guard663; +wire _guard665 = pd4_out; +wire _guard666 = _guard664 & _guard665; +wire _guard667 = wrapper_early_reset_static_par_thread0_go_out; +wire _guard668 = signal_reg_out; +wire _guard669 = pd4_out; +wire _guard670 = tdcc4_done_out; +wire _guard671 = _guard669 | _guard670; +wire _guard672 = ~_guard671; +wire _guard673 = par1_go_out; +wire _guard674 = _guard672 & _guard673; +wire _guard675 = invoke18_go_out; +wire _guard676 = invoke18_go_out; +wire _guard677 = fsm_out == 2'd2; +wire _guard678 = invoke19_done_out; +wire _guard679 = ~_guard678; +wire _guard680 = fsm3_out == 2'd0; +wire _guard681 = _guard679 & _guard680; +wire _guard682 = tdcc3_go_out; +wire _guard683 = _guard681 & _guard682; +wire _guard684 = invoke20_done_out; +wire _guard685 = ~_guard684; +wire _guard686 = fsm3_out == 2'd1; wire _guard687 = _guard685 & _guard686; -wire _guard688 = pd4_out; -wire _guard689 = tdcc4_done_out; -wire _guard690 = _guard688 | _guard689; -wire _guard691 = ~_guard690; -wire _guard692 = par1_go_out; -wire _guard693 = _guard691 & _guard692; -wire _guard694 = invoke18_go_out; -wire _guard695 = invoke18_go_out; -wire _guard696 = wrapper_early_reset_static_par0_done_out; -wire _guard697 = ~_guard696; -wire _guard698 = fsm6_out == 3'd3; -wire _guard699 = _guard697 & _guard698; -wire _guard700 = tdcc5_go_out; -wire _guard701 = _guard699 & _guard700; -wire _guard702 = fsm_out == 1'd0; -wire _guard703 = signal_reg_out; -wire _guard704 = _guard702 & _guard703; -wire _guard705 = fsm0_out == 2'd2; -wire _guard706 = invoke19_done_out; -wire _guard707 = ~_guard706; -wire _guard708 = fsm4_out == 2'd0; +wire _guard688 = tdcc3_go_out; +wire _guard689 = _guard687 & _guard688; +wire _guard690 = invoke16_go_out; +wire _guard691 = invoke16_go_out; +wire _guard692 = invoke22_go_out; +wire _guard693 = invoke22_go_out; +wire _guard694 = invoke22_go_out; +wire _guard695 = invoke22_go_out; +wire _guard696 = invoke23_go_out; +wire _guard697 = invoke23_go_out; +wire _guard698 = invoke23_go_out; +wire _guard699 = invoke23_go_out; +wire _guard700 = invoke23_go_out; +wire _guard701 = invoke23_go_out; +wire _guard702 = invoke23_go_out; +wire _guard703 = invoke23_go_out; +wire _guard704 = invoke23_go_out; +wire _guard705 = pd2_out; +wire _guard706 = pd3_out; +wire _guard707 = _guard705 & _guard706; +wire _guard708 = pd4_out; wire _guard709 = _guard707 & _guard708; -wire _guard710 = tdcc3_go_out; -wire _guard711 = _guard709 & _guard710; -wire _guard712 = invoke20_done_out; -wire _guard713 = ~_guard712; -wire _guard714 = fsm4_out == 2'd1; -wire _guard715 = _guard713 & _guard714; -wire _guard716 = tdcc3_go_out; -wire _guard717 = _guard715 & _guard716; -wire _guard718 = invoke16_go_out; -wire _guard719 = invoke16_go_out; -wire _guard720 = invoke22_go_out; -wire _guard721 = invoke22_go_out; -wire _guard722 = invoke22_go_out; -wire _guard723 = invoke22_go_out; -wire _guard724 = invoke23_go_out; -wire _guard725 = invoke23_go_out; -wire _guard726 = invoke23_go_out; +wire _guard710 = tdcc3_done_out; +wire _guard711 = par1_go_out; +wire _guard712 = _guard710 & _guard711; +wire _guard713 = _guard709 | _guard712; +wire _guard714 = tdcc3_done_out; +wire _guard715 = par1_go_out; +wire _guard716 = _guard714 & _guard715; +wire _guard717 = pd2_out; +wire _guard718 = pd3_out; +wire _guard719 = _guard717 & _guard718; +wire _guard720 = pd4_out; +wire _guard721 = _guard719 & _guard720; +wire _guard722 = fsm4_out == 2'd3; +wire _guard723 = invoke19_go_out; +wire _guard724 = invoke19_go_out; +wire _guard725 = invoke11_go_out; +wire _guard726 = early_reset_static_par_thread_go_out; wire _guard727 = invoke23_go_out; -wire _guard728 = invoke23_go_out; +wire _guard728 = invoke11_go_out; wire _guard729 = invoke23_go_out; -wire _guard730 = invoke23_go_out; -wire _guard731 = invoke23_go_out; -wire _guard732 = invoke23_go_out; -wire _guard733 = pd2_out; -wire _guard734 = pd3_out; -wire _guard735 = _guard733 & _guard734; -wire _guard736 = pd4_out; -wire _guard737 = _guard735 & _guard736; -wire _guard738 = tdcc3_done_out; -wire _guard739 = par1_go_out; +wire _guard730 = early_reset_static_par_thread_go_out; +wire _guard731 = invoke6_done_out; +wire _guard732 = ~_guard731; +wire _guard733 = fsm_out == 2'd0; +wire _guard734 = _guard732 & _guard733; +wire _guard735 = tdcc_go_out; +wire _guard736 = _guard734 & _guard735; +wire _guard737 = invoke24_done_out; +wire _guard738 = ~_guard737; +wire _guard739 = fsm4_out == 2'd2; wire _guard740 = _guard738 & _guard739; -wire _guard741 = _guard737 | _guard740; -wire _guard742 = tdcc3_done_out; -wire _guard743 = par1_go_out; -wire _guard744 = _guard742 & _guard743; -wire _guard745 = pd2_out; -wire _guard746 = pd3_out; -wire _guard747 = _guard745 & _guard746; -wire _guard748 = pd4_out; -wire _guard749 = _guard747 & _guard748; -wire _guard750 = wrapper_early_reset_static_par_go_out; -wire _guard751 = fsm5_out == 2'd3; -wire _guard752 = invoke19_go_out; -wire _guard753 = invoke19_go_out; -wire _guard754 = invoke11_go_out; -wire _guard755 = early_reset_static_par_go_out; -wire _guard756 = invoke23_go_out; -wire _guard757 = invoke11_go_out; -wire _guard758 = invoke23_go_out; -wire _guard759 = early_reset_static_par_go_out; -wire _guard760 = invoke6_done_out; -wire _guard761 = ~_guard760; -wire _guard762 = fsm0_out == 2'd0; -wire _guard763 = _guard761 & _guard762; -wire _guard764 = tdcc_go_out; -wire _guard765 = _guard763 & _guard764; -wire _guard766 = invoke24_done_out; -wire _guard767 = ~_guard766; -wire _guard768 = fsm5_out == 2'd2; -wire _guard769 = _guard767 & _guard768; -wire _guard770 = tdcc4_go_out; -wire _guard771 = _guard769 & _guard770; -wire _guard772 = pd1_out; -wire _guard773 = tdcc1_done_out; -wire _guard774 = _guard772 | _guard773; -wire _guard775 = ~_guard774; -wire _guard776 = par0_go_out; -wire _guard777 = _guard775 & _guard776; -wire _guard778 = par0_done_out; -wire _guard779 = ~_guard778; -wire _guard780 = fsm6_out == 3'd1; -wire _guard781 = _guard779 & _guard780; -wire _guard782 = tdcc5_go_out; -wire _guard783 = _guard781 & _guard782; -wire _guard784 = invoke7_done_out; -wire _guard785 = ~_guard784; -wire _guard786 = fsm0_out == 2'd1; -wire _guard787 = _guard785 & _guard786; -wire _guard788 = tdcc_go_out; -wire _guard789 = _guard787 & _guard788; -wire _guard790 = invoke10_done_out; -wire _guard791 = ~_guard790; -wire _guard792 = fsm2_out == 2'd0; -wire _guard793 = _guard791 & _guard792; -wire _guard794 = tdcc1_go_out; -wire _guard795 = _guard793 & _guard794; -wire _guard796 = invoke22_done_out; -wire _guard797 = ~_guard796; -wire _guard798 = fsm5_out == 2'd0; -wire _guard799 = _guard797 & _guard798; -wire _guard800 = tdcc4_go_out; -wire _guard801 = _guard799 & _guard800; -wire _guard802 = fsm6_out == 3'd5; +wire _guard741 = tdcc4_go_out; +wire _guard742 = _guard740 & _guard741; +wire _guard743 = pd1_out; +wire _guard744 = tdcc1_done_out; +wire _guard745 = _guard743 | _guard744; +wire _guard746 = ~_guard745; +wire _guard747 = par0_go_out; +wire _guard748 = _guard746 & _guard747; +wire _guard749 = par0_done_out; +wire _guard750 = ~_guard749; +wire _guard751 = fsm5_out == 3'd1; +wire _guard752 = _guard750 & _guard751; +wire _guard753 = tdcc5_go_out; +wire _guard754 = _guard752 & _guard753; +wire _guard755 = invoke7_done_out; +wire _guard756 = ~_guard755; +wire _guard757 = fsm_out == 2'd1; +wire _guard758 = _guard756 & _guard757; +wire _guard759 = tdcc_go_out; +wire _guard760 = _guard758 & _guard759; +wire _guard761 = invoke10_done_out; +wire _guard762 = ~_guard761; +wire _guard763 = fsm1_out == 2'd0; +wire _guard764 = _guard762 & _guard763; +wire _guard765 = tdcc1_go_out; +wire _guard766 = _guard764 & _guard765; +wire _guard767 = invoke22_done_out; +wire _guard768 = ~_guard767; +wire _guard769 = fsm4_out == 2'd0; +wire _guard770 = _guard768 & _guard769; +wire _guard771 = tdcc4_go_out; +wire _guard772 = _guard770 & _guard771; +wire _guard773 = fsm5_out == 3'd5; assign curr_addr_internal_mem_A0_write_en = _guard1 ? 1'd1 : _guard2 ? read_channel_A0_curr_addr_internal_mem_write_en : @@ -7449,577 +7211,568 @@ assign A0_ARLEN = _guard73 ? ar_channel_A0_ARLEN : 8'd0; assign A0_AWID = 1'd0; -assign fsm_write_en = _guard76; +assign fsm_write_en = _guard86; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard80 ? adder_out : - _guard87 ? 1'd0 : - _guard91 ? adder0_out : - 1'd0; -assign adder_left = - _guard92 ? fsm_out : - 1'd0; -assign adder_right = _guard93; -assign fsm6_write_en = _guard124; -assign fsm6_clk = clk; -assign fsm6_reset = reset; -assign fsm6_in = - _guard129 ? 3'd5 : - _guard134 ? 3'd2 : - _guard139 ? 3'd4 : - _guard144 ? 3'd1 : - _guard145 ? 3'd0 : - _guard150 ? 3'd3 : - 3'd0; -assign early_reset_static_par0_go_in = _guard151; + _guard91 ? 2'd1 : + _guard92 ? 2'd0 : + _guard97 ? 2'd2 : + 2'd0; assign invoke11_done_in = read_channel_Sum0_done; -assign invoke18_go_in = _guard157; -assign tdcc2_go_in = _guard163; +assign invoke18_go_in = _guard103; +assign tdcc2_go_in = _guard109; assign curr_addr_internal_mem_B0_write_en = - _guard164 ? read_channel_B0_curr_addr_internal_mem_write_en : - _guard165 ? 1'd1 : - _guard166 ? write_channel_B0_curr_addr_internal_mem_write_en : + _guard110 ? read_channel_B0_curr_addr_internal_mem_write_en : + _guard111 ? 1'd1 : + _guard112 ? write_channel_B0_curr_addr_internal_mem_write_en : 1'd0; assign curr_addr_internal_mem_B0_clk = clk; assign curr_addr_internal_mem_B0_reset = reset; assign curr_addr_internal_mem_B0_in = - _guard167 ? read_channel_B0_curr_addr_internal_mem_in : - _guard168 ? write_channel_B0_curr_addr_internal_mem_in : - _guard169 ? 3'd0 : + _guard113 ? read_channel_B0_curr_addr_internal_mem_in : + _guard114 ? write_channel_B0_curr_addr_internal_mem_in : + _guard115 ? 3'd0 : 'x; assign read_channel_B0_curr_addr_internal_mem_out = - _guard170 ? curr_addr_internal_mem_B0_out : + _guard116 ? curr_addr_internal_mem_B0_out : 3'd0; assign read_channel_B0_curr_addr_axi_out = - _guard171 ? curr_addr_axi_B0_out : + _guard117 ? curr_addr_axi_B0_out : 64'd0; assign read_channel_B0_RVALID = - _guard172 ? B0_RVALID : + _guard118 ? B0_RVALID : 1'd0; assign read_channel_B0_RLAST = - _guard173 ? B0_RLAST : + _guard119 ? B0_RLAST : 1'd0; assign read_channel_B0_RDATA = - _guard174 ? B0_RDATA : + _guard120 ? B0_RDATA : 32'd0; assign read_channel_B0_clk = clk; -assign read_channel_B0_go = _guard175; +assign read_channel_B0_go = _guard121; assign read_channel_B0_reset = reset; assign read_channel_B0_RRESP = - _guard176 ? B0_RRESP : + _guard122 ? B0_RRESP : 2'd0; assign read_channel_B0_mem_ref_done = - _guard177 ? internal_mem_B0_done : + _guard123 ? internal_mem_B0_done : 1'd0; assign read_channel_B0_ARESETn = - _guard178 ? B0_ARESETn : + _guard124 ? B0_ARESETn : 1'd0; assign read_channel_B0_curr_addr_internal_mem_done = - _guard179 ? curr_addr_internal_mem_B0_done : + _guard125 ? curr_addr_internal_mem_B0_done : 1'd0; assign read_channel_B0_curr_addr_axi_done = - _guard180 ? curr_addr_axi_B0_done : + _guard126 ? curr_addr_axi_B0_done : 1'd0; assign internal_mem_B0_write_en = - _guard181 ? read_channel_B0_mem_ref_write_en : - _guard182 ? main_compute_B0_write_en : - _guard183 ? write_channel_B0_mem_ref_write_en : + _guard127 ? read_channel_B0_mem_ref_write_en : + _guard128 ? main_compute_B0_write_en : + _guard129 ? write_channel_B0_mem_ref_write_en : 1'd0; assign internal_mem_B0_clk = clk; assign internal_mem_B0_addr0 = - _guard184 ? read_channel_B0_mem_ref_addr0 : - _guard185 ? main_compute_B0_addr0 : - _guard186 ? write_channel_B0_mem_ref_addr0 : + _guard130 ? read_channel_B0_mem_ref_addr0 : + _guard131 ? main_compute_B0_addr0 : + _guard132 ? write_channel_B0_mem_ref_addr0 : 'x; assign internal_mem_B0_content_en = - _guard187 ? read_channel_B0_mem_ref_content_en : - _guard188 ? main_compute_B0_content_en : - _guard189 ? write_channel_B0_mem_ref_content_en : + _guard133 ? read_channel_B0_mem_ref_content_en : + _guard134 ? main_compute_B0_content_en : + _guard135 ? write_channel_B0_mem_ref_content_en : 1'd0; assign internal_mem_B0_reset = reset; assign internal_mem_B0_write_data = read_channel_B0_mem_ref_write_data; assign bresp_channel_Sum0_clk = clk; -assign bresp_channel_Sum0_go = _guard191; +assign bresp_channel_Sum0_go = _guard137; assign bresp_channel_Sum0_reset = reset; assign bresp_channel_Sum0_BVALID = - _guard192 ? Sum0_BVALID : + _guard138 ? Sum0_BVALID : + 1'd0; +assign signal_reg0_write_en = _guard146; +assign signal_reg0_clk = clk; +assign signal_reg0_reset = reset; +assign signal_reg0_in = + _guard152 ? 1'd1 : + _guard153 ? 1'd0 : 1'd0; -assign fsm3_write_en = _guard211; +assign fsm3_write_en = _guard172; assign fsm3_clk = clk; assign fsm3_reset = reset; assign fsm3_in = - _guard216 ? 2'd1 : - _guard217 ? 2'd0 : - _guard222 ? 2'd3 : - _guard227 ? 2'd2 : + _guard177 ? 2'd1 : + _guard178 ? 2'd0 : + _guard183 ? 2'd3 : + _guard188 ? 2'd2 : 2'd0; -assign fsm5_write_en = _guard246; +assign fsm5_write_en = _guard219; assign fsm5_clk = clk; assign fsm5_reset = reset; assign fsm5_in = - _guard251 ? 2'd1 : - _guard252 ? 2'd0 : - _guard257 ? 2'd3 : - _guard262 ? 2'd2 : - 2'd0; -assign tdcc0_done_in = _guard263; + _guard224 ? 3'd5 : + _guard229 ? 3'd2 : + _guard234 ? 3'd4 : + _guard239 ? 3'd1 : + _guard240 ? 3'd0 : + _guard245 ? 3'd3 : + 3'd0; +assign wrapper_early_reset_static_par_thread_go_in = _guard251; +assign tdcc0_done_in = _guard252; +assign early_reset_static_par_thread0_done_in = ud0_out; assign curr_addr_axi_B0_write_en = - _guard264 ? read_channel_B0_curr_addr_axi_write_en : - _guard267 ? 1'd1 : - _guard268 ? write_channel_B0_curr_addr_axi_write_en : + _guard253 ? read_channel_B0_curr_addr_axi_write_en : + _guard256 ? 1'd1 : + _guard257 ? write_channel_B0_curr_addr_axi_write_en : 1'd0; assign curr_addr_axi_B0_clk = clk; assign curr_addr_axi_B0_reset = reset; assign curr_addr_axi_B0_in = - _guard269 ? read_channel_B0_curr_addr_axi_in : - _guard270 ? write_channel_B0_curr_addr_axi_in : - _guard273 ? 64'd4096 : + _guard258 ? read_channel_B0_curr_addr_axi_in : + _guard259 ? write_channel_B0_curr_addr_axi_in : + _guard262 ? 64'd4096 : 'x; assign max_transfers_Sum0_write_en = - _guard274 ? aw_channel_Sum0_max_transfers_write_en : + _guard263 ? aw_channel_Sum0_max_transfers_write_en : 1'd0; assign max_transfers_Sum0_clk = clk; assign max_transfers_Sum0_reset = reset; assign max_transfers_Sum0_in = aw_channel_Sum0_max_transfers_in; assign main_compute_A0_read_data = - _guard276 ? internal_mem_A0_read_data : + _guard265 ? internal_mem_A0_read_data : 32'd0; assign main_compute_B0_read_data = - _guard277 ? internal_mem_B0_read_data : + _guard266 ? internal_mem_B0_read_data : 32'd0; assign main_compute_Sum0_done = - _guard278 ? internal_mem_Sum0_done : + _guard267 ? internal_mem_Sum0_done : 1'd0; assign main_compute_clk = clk; assign main_compute_B0_done = - _guard279 ? internal_mem_B0_done : + _guard268 ? internal_mem_B0_done : 1'd0; -assign main_compute_go = _guard280; +assign main_compute_go = _guard269; assign main_compute_reset = reset; assign main_compute_A0_done = - _guard281 ? internal_mem_A0_done : + _guard270 ? internal_mem_A0_done : 1'd0; -assign fsm1_write_en = _guard294; +assign fsm1_write_en = _guard283; assign fsm1_clk = clk; assign fsm1_reset = reset; assign fsm1_in = - _guard299 ? 2'd1 : - _guard300 ? 2'd0 : - _guard305 ? 2'd2 : + _guard288 ? 2'd1 : + _guard289 ? 2'd0 : + _guard294 ? 2'd2 : 2'd0; -assign fsm4_write_en = _guard324; +assign fsm4_write_en = _guard313; assign fsm4_clk = clk; assign fsm4_reset = reset; assign fsm4_in = - _guard329 ? 2'd1 : - _guard330 ? 2'd0 : - _guard335 ? 2'd3 : - _guard340 ? 2'd2 : + _guard318 ? 2'd1 : + _guard319 ? 2'd0 : + _guard324 ? 2'd3 : + _guard329 ? 2'd2 : 2'd0; -assign wrapper_early_reset_static_par_go_in = _guard346; -assign invoke11_go_in = _guard352; +assign invoke11_go_in = _guard335; assign invoke20_done_in = write_channel_B0_done; -assign invoke23_go_in = _guard358; -assign par1_go_in = _guard364; +assign invoke23_go_in = _guard341; +assign par1_go_in = _guard347; assign curr_addr_axi_A0_write_en = - _guard367 ? 1'd1 : - _guard368 ? read_channel_A0_curr_addr_axi_write_en : - _guard369 ? write_channel_A0_curr_addr_axi_write_en : + _guard350 ? 1'd1 : + _guard351 ? read_channel_A0_curr_addr_axi_write_en : + _guard352 ? write_channel_A0_curr_addr_axi_write_en : 1'd0; assign curr_addr_axi_A0_clk = clk; assign curr_addr_axi_A0_reset = reset; assign curr_addr_axi_A0_in = - _guard370 ? read_channel_A0_curr_addr_axi_in : - _guard373 ? 64'd4096 : - _guard374 ? write_channel_A0_curr_addr_axi_in : + _guard353 ? read_channel_A0_curr_addr_axi_in : + _guard356 ? 64'd4096 : + _guard357 ? write_channel_A0_curr_addr_axi_in : 'x; assign read_channel_A0_curr_addr_internal_mem_out = - _guard375 ? curr_addr_internal_mem_A0_out : + _guard358 ? curr_addr_internal_mem_A0_out : 3'd0; assign read_channel_A0_curr_addr_axi_out = - _guard376 ? curr_addr_axi_A0_out : + _guard359 ? curr_addr_axi_A0_out : 64'd0; assign read_channel_A0_RVALID = - _guard377 ? A0_RVALID : + _guard360 ? A0_RVALID : 1'd0; assign read_channel_A0_RLAST = - _guard378 ? A0_RLAST : + _guard361 ? A0_RLAST : 1'd0; assign read_channel_A0_RDATA = - _guard379 ? A0_RDATA : + _guard362 ? A0_RDATA : 32'd0; assign read_channel_A0_clk = clk; -assign read_channel_A0_go = _guard380; +assign read_channel_A0_go = _guard363; assign read_channel_A0_reset = reset; assign read_channel_A0_RRESP = - _guard381 ? A0_RRESP : + _guard364 ? A0_RRESP : 2'd0; assign read_channel_A0_mem_ref_done = - _guard382 ? internal_mem_A0_done : + _guard365 ? internal_mem_A0_done : 1'd0; assign read_channel_A0_ARESETn = - _guard383 ? A0_ARESETn : + _guard366 ? A0_ARESETn : 1'd0; assign read_channel_A0_curr_addr_internal_mem_done = - _guard384 ? curr_addr_internal_mem_A0_done : + _guard367 ? curr_addr_internal_mem_A0_done : 1'd0; assign read_channel_A0_curr_addr_axi_done = - _guard385 ? curr_addr_axi_A0_done : + _guard368 ? curr_addr_axi_A0_done : 1'd0; assign internal_mem_A0_write_en = - _guard386 ? main_compute_A0_write_en : - _guard387 ? read_channel_A0_mem_ref_write_en : - _guard388 ? write_channel_A0_mem_ref_write_en : + _guard369 ? main_compute_A0_write_en : + _guard370 ? read_channel_A0_mem_ref_write_en : + _guard371 ? write_channel_A0_mem_ref_write_en : 1'd0; assign internal_mem_A0_clk = clk; assign internal_mem_A0_addr0 = - _guard389 ? main_compute_A0_addr0 : - _guard390 ? read_channel_A0_mem_ref_addr0 : - _guard391 ? write_channel_A0_mem_ref_addr0 : + _guard372 ? main_compute_A0_addr0 : + _guard373 ? read_channel_A0_mem_ref_addr0 : + _guard374 ? write_channel_A0_mem_ref_addr0 : 'x; assign internal_mem_A0_content_en = - _guard392 ? main_compute_A0_content_en : - _guard393 ? read_channel_A0_mem_ref_content_en : - _guard394 ? write_channel_A0_mem_ref_content_en : + _guard375 ? main_compute_A0_content_en : + _guard376 ? read_channel_A0_mem_ref_content_en : + _guard377 ? write_channel_A0_mem_ref_content_en : 1'd0; assign internal_mem_A0_reset = reset; assign internal_mem_A0_write_data = read_channel_A0_mem_ref_write_data; assign write_channel_B0_WREADY = - _guard396 ? B0_WREADY : + _guard379 ? B0_WREADY : 1'd0; assign write_channel_B0_curr_addr_internal_mem_out = - _guard397 ? curr_addr_internal_mem_B0_out : + _guard380 ? curr_addr_internal_mem_B0_out : 3'd0; assign write_channel_B0_curr_addr_axi_out = - _guard398 ? curr_addr_axi_B0_out : + _guard381 ? curr_addr_axi_B0_out : 64'd0; assign write_channel_B0_max_transfers_out = - _guard399 ? max_transfers_B0_out : + _guard382 ? max_transfers_B0_out : 8'd0; assign write_channel_B0_clk = clk; assign write_channel_B0_mem_ref_read_data = - _guard400 ? internal_mem_B0_read_data : + _guard383 ? internal_mem_B0_read_data : 32'd0; -assign write_channel_B0_go = _guard401; +assign write_channel_B0_go = _guard384; assign write_channel_B0_reset = reset; assign write_channel_B0_ARESETn = - _guard402 ? B0_ARESETn : + _guard385 ? B0_ARESETn : 1'd0; assign write_channel_B0_curr_addr_internal_mem_done = - _guard403 ? curr_addr_internal_mem_B0_done : + _guard386 ? curr_addr_internal_mem_B0_done : 1'd0; assign write_channel_B0_curr_addr_axi_done = - _guard404 ? curr_addr_axi_B0_done : + _guard387 ? curr_addr_axi_B0_done : 1'd0; assign curr_addr_axi_Sum0_write_en = - _guard405 ? read_channel_Sum0_curr_addr_axi_write_en : - _guard408 ? 1'd1 : - _guard409 ? write_channel_Sum0_curr_addr_axi_write_en : + _guard388 ? read_channel_Sum0_curr_addr_axi_write_en : + _guard391 ? 1'd1 : + _guard392 ? write_channel_Sum0_curr_addr_axi_write_en : 1'd0; assign curr_addr_axi_Sum0_clk = clk; assign curr_addr_axi_Sum0_reset = reset; assign curr_addr_axi_Sum0_in = - _guard410 ? read_channel_Sum0_curr_addr_axi_in : - _guard413 ? 64'd4096 : - _guard414 ? write_channel_Sum0_curr_addr_axi_in : + _guard393 ? read_channel_Sum0_curr_addr_axi_in : + _guard396 ? 64'd4096 : + _guard397 ? write_channel_Sum0_curr_addr_axi_in : 'x; assign ar_channel_Sum0_curr_addr_axi_out = - _guard415 ? curr_addr_axi_Sum0_out : + _guard398 ? curr_addr_axi_Sum0_out : 64'd0; assign ar_channel_Sum0_clk = clk; -assign ar_channel_Sum0_go = _guard416; +assign ar_channel_Sum0_go = _guard399; assign ar_channel_Sum0_reset = reset; assign ar_channel_Sum0_ARREADY = - _guard417 ? Sum0_ARREADY : + _guard400 ? Sum0_ARREADY : 1'd0; assign ar_channel_Sum0_ARESETn = - _guard418 ? Sum0_ARESETn : + _guard401 ? Sum0_ARESETn : 1'd0; -assign pd1_write_en = _guard427; +assign pd1_write_en = _guard410; assign pd1_clk = clk; assign pd1_reset = reset; assign pd1_in = - _guard430 ? 1'd1 : - _guard435 ? 1'd0 : + _guard413 ? 1'd1 : + _guard418 ? 1'd0 : 1'd0; -assign early_reset_static_par0_done_in = ud0_out; -assign wrapper_early_reset_static_par_done_in = _guard438; -assign tdcc_go_in = _guard444; -assign invoke12_go_in = _guard450; +assign tdcc_go_in = _guard424; +assign invoke12_go_in = _guard430; assign invoke16_done_in = aw_channel_A0_done; assign invoke18_done_in = bresp_channel_A0_done; assign invoke23_done_in = write_channel_Sum0_done; -assign tdcc3_go_in = _guard456; -assign tdcc3_done_in = _guard457; +assign tdcc3_go_in = _guard436; +assign tdcc3_done_in = _guard437; assign aw_channel_B0_curr_addr_axi_out = - _guard458 ? curr_addr_axi_B0_out : + _guard438 ? curr_addr_axi_B0_out : 64'd0; assign aw_channel_B0_clk = clk; assign aw_channel_B0_AWREADY = - _guard459 ? B0_AWREADY : + _guard439 ? B0_AWREADY : 1'd0; -assign aw_channel_B0_go = _guard460; +assign aw_channel_B0_go = _guard440; assign aw_channel_B0_reset = reset; assign aw_channel_B0_ARESETn = - _guard461 ? B0_ARESETn : + _guard441 ? B0_ARESETn : 1'd0; -assign fsm0_write_en = _guard474; +assign fsm0_write_en = _guard454; assign fsm0_clk = clk; assign fsm0_reset = reset; assign fsm0_in = - _guard479 ? 2'd1 : - _guard480 ? 2'd0 : - _guard485 ? 2'd2 : + _guard459 ? 2'd1 : + _guard460 ? 2'd0 : + _guard465 ? 2'd2 : 2'd0; -assign fsm2_write_en = _guard498; +assign fsm2_write_en = _guard484; assign fsm2_clk = clk; assign fsm2_reset = reset; assign fsm2_in = - _guard503 ? 2'd1 : - _guard504 ? 2'd0 : - _guard509 ? 2'd2 : + _guard489 ? 2'd1 : + _guard490 ? 2'd0 : + _guard495 ? 2'd3 : + _guard500 ? 2'd2 : 2'd0; -assign invoke8_go_in = _guard515; +assign invoke8_go_in = _guard506; assign invoke10_done_in = ar_channel_Sum0_done; -assign tdcc0_go_in = _guard521; +assign tdcc0_go_in = _guard512; assign ar_channel_A0_curr_addr_axi_out = - _guard522 ? curr_addr_axi_A0_out : + _guard513 ? curr_addr_axi_A0_out : 64'd0; assign ar_channel_A0_clk = clk; -assign ar_channel_A0_go = _guard523; +assign ar_channel_A0_go = _guard514; assign ar_channel_A0_reset = reset; assign ar_channel_A0_ARREADY = - _guard524 ? A0_ARREADY : + _guard515 ? A0_ARREADY : 1'd0; assign ar_channel_A0_ARESETn = - _guard525 ? A0_ARESETn : + _guard516 ? A0_ARESETn : 1'd0; assign aw_channel_A0_curr_addr_axi_out = - _guard526 ? curr_addr_axi_A0_out : + _guard517 ? curr_addr_axi_A0_out : 64'd0; assign aw_channel_A0_clk = clk; assign aw_channel_A0_AWREADY = - _guard527 ? A0_AWREADY : + _guard518 ? A0_AWREADY : 1'd0; -assign aw_channel_A0_go = _guard528; +assign aw_channel_A0_go = _guard519; assign aw_channel_A0_reset = reset; assign aw_channel_A0_ARESETn = - _guard529 ? A0_ARESETn : + _guard520 ? A0_ARESETn : 1'd0; -assign par0_done_in = _guard534; +assign par0_done_in = _guard525; assign invoke8_done_in = ar_channel_B0_done; assign invoke12_done_in = main_compute_done; -assign invoke17_go_in = _guard540; -assign invoke21_go_in = _guard546; -assign adder0_left = - _guard547 ? fsm_out : - 1'd0; -assign adder0_right = _guard548; -assign pd2_write_en = _guard557; +assign invoke17_go_in = _guard531; +assign invoke21_go_in = _guard537; +assign pd2_write_en = _guard546; assign pd2_clk = clk; assign pd2_reset = reset; assign pd2_in = - _guard560 ? 1'd1 : - _guard565 ? 1'd0 : + _guard549 ? 1'd1 : + _guard554 ? 1'd0 : 1'd0; -assign early_reset_static_par_done_in = ud_out; +assign wrapper_early_reset_static_par_thread0_go_in = _guard560; assign invoke6_done_in = ar_channel_A0_done; -assign invoke16_go_in = _guard571; +assign invoke16_go_in = _guard566; assign invoke19_done_in = aw_channel_B0_done; assign write_channel_A0_WREADY = - _guard572 ? A0_WREADY : + _guard567 ? A0_WREADY : 1'd0; assign write_channel_A0_curr_addr_internal_mem_out = - _guard573 ? curr_addr_internal_mem_A0_out : + _guard568 ? curr_addr_internal_mem_A0_out : 3'd0; assign write_channel_A0_curr_addr_axi_out = - _guard574 ? curr_addr_axi_A0_out : + _guard569 ? curr_addr_axi_A0_out : 64'd0; assign write_channel_A0_max_transfers_out = - _guard575 ? max_transfers_A0_out : + _guard570 ? max_transfers_A0_out : 8'd0; assign write_channel_A0_clk = clk; assign write_channel_A0_mem_ref_read_data = - _guard576 ? internal_mem_A0_read_data : + _guard571 ? internal_mem_A0_read_data : 32'd0; -assign write_channel_A0_go = _guard577; +assign write_channel_A0_go = _guard572; assign write_channel_A0_reset = reset; assign write_channel_A0_ARESETn = - _guard578 ? A0_ARESETn : + _guard573 ? A0_ARESETn : 1'd0; assign write_channel_A0_curr_addr_internal_mem_done = - _guard579 ? curr_addr_internal_mem_A0_done : + _guard574 ? curr_addr_internal_mem_A0_done : 1'd0; assign write_channel_A0_curr_addr_axi_done = - _guard580 ? curr_addr_axi_A0_done : + _guard575 ? curr_addr_axi_A0_done : 1'd0; assign ar_channel_B0_curr_addr_axi_out = - _guard581 ? curr_addr_axi_B0_out : + _guard576 ? curr_addr_axi_B0_out : 64'd0; assign ar_channel_B0_clk = clk; -assign ar_channel_B0_go = _guard582; +assign ar_channel_B0_go = _guard577; assign ar_channel_B0_reset = reset; assign ar_channel_B0_ARREADY = - _guard583 ? B0_ARREADY : + _guard578 ? B0_ARREADY : 1'd0; assign ar_channel_B0_ARESETn = - _guard584 ? B0_ARESETn : + _guard579 ? B0_ARESETn : 1'd0; -assign signal_reg_write_en = _guard601; +assign signal_reg_write_en = _guard587; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard614 ? 1'd1 : - _guard617 ? 1'd0 : + _guard593 ? 1'd1 : + _guard594 ? 1'd0 : 1'd0; +assign early_reset_static_par_thread_go_in = _guard595; +assign wrapper_early_reset_static_par_thread0_done_in = _guard596; assign invoke24_done_in = bresp_channel_Sum0_done; -assign tdcc1_done_in = _guard618; -assign par1_done_in = _guard623; +assign tdcc1_done_in = _guard597; +assign par1_done_in = _guard602; assign bresp_channel_B0_clk = clk; -assign bresp_channel_B0_go = _guard624; +assign bresp_channel_B0_go = _guard603; assign bresp_channel_B0_reset = reset; assign bresp_channel_B0_BVALID = - _guard625 ? B0_BVALID : + _guard604 ? B0_BVALID : 1'd0; assign internal_mem_Sum0_write_en = - _guard626 ? read_channel_Sum0_mem_ref_write_en : - _guard627 ? main_compute_Sum0_write_en : - _guard628 ? write_channel_Sum0_mem_ref_write_en : + _guard605 ? read_channel_Sum0_mem_ref_write_en : + _guard606 ? main_compute_Sum0_write_en : + _guard607 ? write_channel_Sum0_mem_ref_write_en : 1'd0; assign internal_mem_Sum0_clk = clk; assign internal_mem_Sum0_addr0 = - _guard629 ? read_channel_Sum0_mem_ref_addr0 : - _guard630 ? main_compute_Sum0_addr0 : - _guard631 ? write_channel_Sum0_mem_ref_addr0 : + _guard608 ? read_channel_Sum0_mem_ref_addr0 : + _guard609 ? main_compute_Sum0_addr0 : + _guard610 ? write_channel_Sum0_mem_ref_addr0 : 'x; assign internal_mem_Sum0_content_en = - _guard632 ? read_channel_Sum0_mem_ref_content_en : - _guard633 ? main_compute_Sum0_content_en : - _guard634 ? write_channel_Sum0_mem_ref_content_en : + _guard611 ? read_channel_Sum0_mem_ref_content_en : + _guard612 ? main_compute_Sum0_content_en : + _guard613 ? write_channel_Sum0_mem_ref_content_en : 1'd0; assign internal_mem_Sum0_reset = reset; assign internal_mem_Sum0_write_data = - _guard635 ? read_channel_Sum0_mem_ref_write_data : - _guard636 ? main_compute_Sum0_write_data : + _guard614 ? read_channel_Sum0_mem_ref_write_data : + _guard615 ? main_compute_Sum0_write_data : 'x; -assign pd_write_en = _guard645; +assign pd_write_en = _guard624; assign pd_clk = clk; assign pd_reset = reset; assign pd_in = - _guard648 ? 1'd1 : - _guard653 ? 1'd0 : + _guard627 ? 1'd1 : + _guard632 ? 1'd0 : 1'd0; -assign pd0_write_en = _guard662; +assign pd0_write_en = _guard641; assign pd0_clk = clk; assign pd0_reset = reset; assign pd0_in = - _guard665 ? 1'd1 : - _guard670 ? 1'd0 : + _guard644 ? 1'd1 : + _guard649 ? 1'd0 : 1'd0; -assign pd4_write_en = _guard679; +assign pd4_write_en = _guard658; assign pd4_clk = clk; assign pd4_reset = reset; assign pd4_in = - _guard682 ? 1'd1 : - _guard687 ? 1'd0 : + _guard661 ? 1'd1 : + _guard666 ? 1'd0 : 1'd0; +assign early_reset_static_par_thread0_go_in = _guard667; +assign wrapper_early_reset_static_par_thread_done_in = _guard668; assign invoke22_done_in = aw_channel_Sum0_done; -assign tdcc4_go_in = _guard693; +assign tdcc4_go_in = _guard674; assign bresp_channel_A0_clk = clk; -assign bresp_channel_A0_go = _guard694; +assign bresp_channel_A0_go = _guard675; assign bresp_channel_A0_reset = reset; assign bresp_channel_A0_BVALID = - _guard695 ? A0_BVALID : + _guard676 ? A0_BVALID : 1'd0; -assign wrapper_early_reset_static_par0_go_in = _guard701; -assign wrapper_early_reset_static_par0_done_in = _guard704; -assign tdcc_done_in = _guard705; +assign tdcc_done_in = _guard677; assign invoke17_done_in = write_channel_A0_done; -assign invoke19_go_in = _guard711; -assign invoke20_go_in = _guard717; +assign invoke19_go_in = _guard683; +assign invoke20_go_in = _guard689; assign invoke21_done_in = bresp_channel_B0_done; assign max_transfers_A0_write_en = - _guard718 ? aw_channel_A0_max_transfers_write_en : + _guard690 ? aw_channel_A0_max_transfers_write_en : 1'd0; assign max_transfers_A0_clk = clk; assign max_transfers_A0_reset = reset; assign max_transfers_A0_in = aw_channel_A0_max_transfers_in; assign aw_channel_Sum0_curr_addr_axi_out = - _guard720 ? curr_addr_axi_Sum0_out : + _guard692 ? curr_addr_axi_Sum0_out : 64'd0; assign aw_channel_Sum0_clk = clk; assign aw_channel_Sum0_AWREADY = - _guard721 ? Sum0_AWREADY : + _guard693 ? Sum0_AWREADY : 1'd0; -assign aw_channel_Sum0_go = _guard722; +assign aw_channel_Sum0_go = _guard694; assign aw_channel_Sum0_reset = reset; assign aw_channel_Sum0_ARESETn = - _guard723 ? Sum0_ARESETn : + _guard695 ? Sum0_ARESETn : 1'd0; assign write_channel_Sum0_WREADY = - _guard724 ? Sum0_WREADY : + _guard696 ? Sum0_WREADY : 1'd0; assign write_channel_Sum0_curr_addr_internal_mem_out = - _guard725 ? curr_addr_internal_mem_Sum0_out : + _guard697 ? curr_addr_internal_mem_Sum0_out : 3'd0; assign write_channel_Sum0_curr_addr_axi_out = - _guard726 ? curr_addr_axi_Sum0_out : + _guard698 ? curr_addr_axi_Sum0_out : 64'd0; assign write_channel_Sum0_max_transfers_out = - _guard727 ? max_transfers_Sum0_out : + _guard699 ? max_transfers_Sum0_out : 8'd0; assign write_channel_Sum0_clk = clk; assign write_channel_Sum0_mem_ref_read_data = - _guard728 ? internal_mem_Sum0_read_data : + _guard700 ? internal_mem_Sum0_read_data : 32'd0; -assign write_channel_Sum0_go = _guard729; +assign write_channel_Sum0_go = _guard701; assign write_channel_Sum0_reset = reset; assign write_channel_Sum0_ARESETn = - _guard730 ? Sum0_ARESETn : + _guard702 ? Sum0_ARESETn : 1'd0; assign write_channel_Sum0_curr_addr_internal_mem_done = - _guard731 ? curr_addr_internal_mem_Sum0_done : + _guard703 ? curr_addr_internal_mem_Sum0_done : 1'd0; assign write_channel_Sum0_curr_addr_axi_done = - _guard732 ? curr_addr_axi_Sum0_done : + _guard704 ? curr_addr_axi_Sum0_done : 1'd0; -assign pd3_write_en = _guard741; +assign pd3_write_en = _guard713; assign pd3_clk = clk; assign pd3_reset = reset; assign pd3_in = - _guard744 ? 1'd1 : - _guard749 ? 1'd0 : + _guard716 ? 1'd1 : + _guard721 ? 1'd0 : 1'd0; -assign early_reset_static_par_go_in = _guard750; -assign tdcc4_done_in = _guard751; +assign tdcc4_done_in = _guard722; assign max_transfers_B0_write_en = - _guard752 ? aw_channel_B0_max_transfers_write_en : + _guard723 ? aw_channel_B0_max_transfers_write_en : 1'd0; assign max_transfers_B0_clk = clk; assign max_transfers_B0_reset = reset; assign max_transfers_B0_in = aw_channel_B0_max_transfers_in; assign curr_addr_internal_mem_Sum0_write_en = - _guard754 ? read_channel_Sum0_curr_addr_internal_mem_write_en : - _guard755 ? 1'd1 : - _guard756 ? write_channel_Sum0_curr_addr_internal_mem_write_en : + _guard725 ? read_channel_Sum0_curr_addr_internal_mem_write_en : + _guard726 ? 1'd1 : + _guard727 ? write_channel_Sum0_curr_addr_internal_mem_write_en : 1'd0; assign curr_addr_internal_mem_Sum0_clk = clk; assign curr_addr_internal_mem_Sum0_reset = reset; assign curr_addr_internal_mem_Sum0_in = - _guard757 ? read_channel_Sum0_curr_addr_internal_mem_in : - _guard758 ? write_channel_Sum0_curr_addr_internal_mem_in : - _guard759 ? 3'd0 : + _guard728 ? read_channel_Sum0_curr_addr_internal_mem_in : + _guard729 ? write_channel_Sum0_curr_addr_internal_mem_in : + _guard730 ? 3'd0 : 'x; -assign invoke6_go_in = _guard765; -assign invoke24_go_in = _guard771; -assign tdcc1_go_in = _guard777; -assign par0_go_in = _guard783; -assign invoke7_go_in = _guard789; -assign invoke10_go_in = _guard795; -assign invoke22_go_in = _guard801; +assign early_reset_static_par_thread_done_in = ud_out; +assign invoke6_go_in = _guard736; +assign invoke24_go_in = _guard742; +assign tdcc1_go_in = _guard748; +assign par0_go_in = _guard754; +assign invoke7_go_in = _guard760; +assign invoke10_go_in = _guard766; +assign invoke22_go_in = _guard772; assign tdcc5_go_in = go; -assign tdcc5_done_in = _guard802; +assign tdcc5_done_in = _guard773; // COMPONENT END: wrapper endmodule module main( @@ -8085,52 +7838,43 @@ logic comb_reg_clk; logic comb_reg_reset; logic comb_reg_out; logic comb_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; -logic ud_out; +logic ud0_out; logic signal_reg_in; logic signal_reg_write_en; logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic pd_in; logic pd_write_en; logic pd_clk; logic pd_reset; logic pd_out; logic pd_done; -logic [1:0] fsm1_in; -logic fsm1_write_en; -logic fsm1_clk; -logic fsm1_reset; -logic [1:0] fsm1_out; -logic fsm1_done; +logic [1:0] fsm0_in; +logic fsm0_write_en; +logic fsm0_clk; +logic fsm0_reset; +logic [1:0] fsm0_out; +logic fsm0_done; logic pd0_in; logic pd0_write_en; logic pd0_clk; logic pd0_reset; logic pd0_out; logic pd0_done; -logic [2:0] fsm2_in; -logic fsm2_write_en; -logic fsm2_clk; -logic fsm2_reset; -logic [2:0] fsm2_out; -logic fsm2_done; +logic [2:0] fsm1_in; +logic fsm1_write_en; +logic fsm1_clk; +logic fsm1_reset; +logic [2:0] fsm1_out; +logic fsm1_done; logic beg_spl_upd0_go_in; logic beg_spl_upd0_go_out; logic beg_spl_upd0_done_in; @@ -8159,14 +7903,14 @@ logic invoke3_go_in; logic invoke3_go_out; logic invoke3_done_in; logic invoke3_done_out; -logic early_reset_cond00_go_in; -logic early_reset_cond00_go_out; -logic early_reset_cond00_done_in; -logic early_reset_cond00_done_out; -logic wrapper_early_reset_cond00_go_in; -logic wrapper_early_reset_cond00_go_out; -logic wrapper_early_reset_cond00_done_in; -logic wrapper_early_reset_cond00_done_out; +logic early_reset_cond000_go_in; +logic early_reset_cond000_go_out; +logic early_reset_cond000_done_in; +logic early_reset_cond000_done_out; +logic wrapper_early_reset_cond000_go_in; +logic wrapper_early_reset_cond000_go_out; +logic wrapper_early_reset_cond000_done_in; +logic wrapper_early_reset_cond000_done_out; logic par0_go_in; logic par0_go_out; logic par0_done_in; @@ -8271,27 +8015,10 @@ std_reg # ( .reset(comb_reg_reset), .write_en(comb_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) -) ud ( - .out(ud_out) +) ud0 ( + .out(ud0_out) ); std_reg # ( .WIDTH(1) @@ -8305,13 +8032,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_reg # ( .WIDTH(1) @@ -8325,13 +8052,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm1 ( - .clk(fsm1_clk), - .done(fsm1_done), - .in(fsm1_in), - .out(fsm1_out), - .reset(fsm1_reset), - .write_en(fsm1_write_en) +) fsm0 ( + .clk(fsm0_clk), + .done(fsm0_done), + .in(fsm0_in), + .out(fsm0_out), + .reset(fsm0_reset), + .write_en(fsm0_write_en) ); std_reg # ( .WIDTH(1) @@ -8345,13 +8072,13 @@ std_reg # ( ); std_reg # ( .WIDTH(3) -) fsm2 ( - .clk(fsm2_clk), - .done(fsm2_done), - .in(fsm2_in), - .out(fsm2_out), - .reset(fsm2_reset), - .write_en(fsm2_write_en) +) fsm1 ( + .clk(fsm1_clk), + .done(fsm1_done), + .in(fsm1_in), + .out(fsm1_out), + .reset(fsm1_reset), + .write_en(fsm1_write_en) ); std_wire # ( .WIDTH(1) @@ -8439,27 +8166,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_cond00_go ( - .in(early_reset_cond00_go_in), - .out(early_reset_cond00_go_out) +) early_reset_cond000_go ( + .in(early_reset_cond000_go_in), + .out(early_reset_cond000_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_cond00_done ( - .in(early_reset_cond00_done_in), - .out(early_reset_cond00_done_out) +) early_reset_cond000_done ( + .in(early_reset_cond000_done_in), + .out(early_reset_cond000_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_cond00_go ( - .in(wrapper_early_reset_cond00_go_in), - .out(wrapper_early_reset_cond00_go_out) +) wrapper_early_reset_cond000_go ( + .in(wrapper_early_reset_cond000_go_in), + .out(wrapper_early_reset_cond000_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_cond00_done ( - .in(wrapper_early_reset_cond00_done_in), - .out(wrapper_early_reset_cond00_done_out) +) wrapper_early_reset_cond000_done ( + .in(wrapper_early_reset_cond000_done_in), + .out(wrapper_early_reset_cond000_done_out) ); std_wire # ( .WIDTH(1) @@ -8515,268 +8242,268 @@ wire _guard2 = invoke3_go_out; wire _guard3 = _guard1 | _guard2; wire _guard4 = invoke3_go_out; wire _guard5 = invoke0_go_out; -wire _guard6 = wrapper_early_reset_cond00_go_out; +wire _guard6 = invoke3_go_out; wire _guard7 = invoke3_go_out; -wire _guard8 = invoke3_go_out; -wire _guard9 = tdcc1_done_out; -wire _guard10 = upd2_go_out; -wire _guard11 = beg_spl_upd1_go_out; -wire _guard12 = upd2_go_out; -wire _guard13 = _guard11 | _guard12; -wire _guard14 = beg_spl_upd1_go_out; -wire _guard15 = upd2_go_out; -wire _guard16 = _guard14 | _guard15; -wire _guard17 = beg_spl_upd0_go_out; -wire _guard18 = upd2_go_out; -wire _guard19 = _guard17 | _guard18; +wire _guard8 = tdcc1_done_out; +wire _guard9 = upd2_go_out; +wire _guard10 = beg_spl_upd1_go_out; +wire _guard11 = upd2_go_out; +wire _guard12 = _guard10 | _guard11; +wire _guard13 = beg_spl_upd1_go_out; +wire _guard14 = upd2_go_out; +wire _guard15 = _guard13 | _guard14; +wire _guard16 = beg_spl_upd0_go_out; +wire _guard17 = upd2_go_out; +wire _guard18 = _guard16 | _guard17; +wire _guard19 = upd2_go_out; wire _guard20 = upd2_go_out; wire _guard21 = upd2_go_out; -wire _guard22 = upd2_go_out; -wire _guard23 = beg_spl_upd0_go_out; -wire _guard24 = upd2_go_out; -wire _guard25 = _guard23 | _guard24; -wire _guard26 = early_reset_cond00_go_out; -wire _guard27 = fsm_out == 1'd0; -wire _guard28 = ~_guard27; -wire _guard29 = early_reset_cond00_go_out; +wire _guard22 = beg_spl_upd0_go_out; +wire _guard23 = upd2_go_out; +wire _guard24 = _guard22 | _guard23; +wire _guard25 = fsm_out == 2'd2; +wire _guard26 = fsm_out == 2'd0; +wire _guard27 = beg_spl_upd0_done_out; +wire _guard28 = _guard26 & _guard27; +wire _guard29 = tdcc_go_out; wire _guard30 = _guard28 & _guard29; -wire _guard31 = fsm_out == 1'd0; -wire _guard32 = early_reset_cond00_go_out; -wire _guard33 = _guard31 & _guard32; -wire _guard34 = early_reset_cond00_go_out; -wire _guard35 = early_reset_cond00_go_out; -wire _guard36 = beg_spl_upd0_done_out; -wire _guard37 = ~_guard36; -wire _guard38 = fsm0_out == 2'd0; -wire _guard39 = _guard37 & _guard38; -wire _guard40 = tdcc_go_out; -wire _guard41 = _guard39 & _guard40; -wire _guard42 = upd2_go_out; -wire _guard43 = upd2_go_out; -wire _guard44 = invoke2_done_out; -wire _guard45 = ~_guard44; -wire _guard46 = fsm1_out == 2'd1; -wire _guard47 = _guard45 & _guard46; -wire _guard48 = tdcc0_go_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = fsm1_out == 2'd2; -wire _guard51 = early_reset_cond00_go_out; -wire _guard52 = early_reset_cond00_go_out; -wire _guard53 = fsm1_out == 2'd2; -wire _guard54 = fsm1_out == 2'd0; -wire _guard55 = beg_spl_upd1_done_out; -wire _guard56 = _guard54 & _guard55; -wire _guard57 = tdcc0_go_out; -wire _guard58 = _guard56 & _guard57; -wire _guard59 = _guard53 | _guard58; -wire _guard60 = fsm1_out == 2'd1; -wire _guard61 = invoke2_done_out; +wire _guard31 = _guard25 | _guard30; +wire _guard32 = fsm_out == 2'd1; +wire _guard33 = invoke1_done_out; +wire _guard34 = _guard32 & _guard33; +wire _guard35 = tdcc_go_out; +wire _guard36 = _guard34 & _guard35; +wire _guard37 = _guard31 | _guard36; +wire _guard38 = fsm_out == 2'd0; +wire _guard39 = beg_spl_upd0_done_out; +wire _guard40 = _guard38 & _guard39; +wire _guard41 = tdcc_go_out; +wire _guard42 = _guard40 & _guard41; +wire _guard43 = fsm_out == 2'd2; +wire _guard44 = fsm_out == 2'd1; +wire _guard45 = invoke1_done_out; +wire _guard46 = _guard44 & _guard45; +wire _guard47 = tdcc_go_out; +wire _guard48 = _guard46 & _guard47; +wire _guard49 = beg_spl_upd0_done_out; +wire _guard50 = ~_guard49; +wire _guard51 = fsm_out == 2'd0; +wire _guard52 = _guard50 & _guard51; +wire _guard53 = tdcc_go_out; +wire _guard54 = _guard52 & _guard53; +wire _guard55 = upd2_go_out; +wire _guard56 = upd2_go_out; +wire _guard57 = invoke2_done_out; +wire _guard58 = ~_guard57; +wire _guard59 = fsm0_out == 2'd1; +wire _guard60 = _guard58 & _guard59; +wire _guard61 = tdcc0_go_out; wire _guard62 = _guard60 & _guard61; -wire _guard63 = tdcc0_go_out; -wire _guard64 = _guard62 & _guard63; -wire _guard65 = _guard59 | _guard64; -wire _guard66 = fsm1_out == 2'd0; -wire _guard67 = beg_spl_upd1_done_out; -wire _guard68 = _guard66 & _guard67; -wire _guard69 = tdcc0_go_out; -wire _guard70 = _guard68 & _guard69; -wire _guard71 = fsm1_out == 2'd2; -wire _guard72 = fsm1_out == 2'd1; -wire _guard73 = invoke2_done_out; -wire _guard74 = _guard72 & _guard73; -wire _guard75 = tdcc0_go_out; -wire _guard76 = _guard74 & _guard75; -wire _guard77 = pd_out; -wire _guard78 = tdcc_done_out; -wire _guard79 = _guard77 | _guard78; -wire _guard80 = ~_guard79; -wire _guard81 = par0_go_out; +wire _guard63 = fsm0_out == 2'd2; +wire _guard64 = early_reset_cond000_go_out; +wire _guard65 = early_reset_cond000_go_out; +wire _guard66 = wrapper_early_reset_cond000_done_out; +wire _guard67 = ~_guard66; +wire _guard68 = fsm1_out == 3'd1; +wire _guard69 = _guard67 & _guard68; +wire _guard70 = tdcc1_go_out; +wire _guard71 = _guard69 & _guard70; +wire _guard72 = wrapper_early_reset_cond000_done_out; +wire _guard73 = ~_guard72; +wire _guard74 = fsm1_out == 3'd5; +wire _guard75 = _guard73 & _guard74; +wire _guard76 = tdcc1_go_out; +wire _guard77 = _guard75 & _guard76; +wire _guard78 = _guard71 | _guard77; +wire _guard79 = fsm1_out == 3'd6; +wire _guard80 = fsm1_out == 3'd0; +wire _guard81 = invoke0_done_out; wire _guard82 = _guard80 & _guard81; -wire _guard83 = invoke0_done_out; -wire _guard84 = ~_guard83; -wire _guard85 = fsm2_out == 3'd0; -wire _guard86 = _guard84 & _guard85; -wire _guard87 = tdcc1_go_out; -wire _guard88 = _guard86 & _guard87; -wire _guard89 = fsm0_out == 2'd2; -wire _guard90 = fsm0_out == 2'd0; -wire _guard91 = beg_spl_upd0_done_out; +wire _guard83 = tdcc1_go_out; +wire _guard84 = _guard82 & _guard83; +wire _guard85 = _guard79 | _guard84; +wire _guard86 = fsm1_out == 3'd1; +wire _guard87 = wrapper_early_reset_cond000_done_out; +wire _guard88 = comb_reg_out; +wire _guard89 = _guard87 & _guard88; +wire _guard90 = _guard86 & _guard89; +wire _guard91 = tdcc1_go_out; wire _guard92 = _guard90 & _guard91; -wire _guard93 = tdcc_go_out; -wire _guard94 = _guard92 & _guard93; -wire _guard95 = _guard89 | _guard94; -wire _guard96 = fsm0_out == 2'd1; -wire _guard97 = invoke1_done_out; -wire _guard98 = _guard96 & _guard97; -wire _guard99 = tdcc_go_out; +wire _guard93 = _guard85 | _guard92; +wire _guard94 = fsm1_out == 3'd5; +wire _guard95 = wrapper_early_reset_cond000_done_out; +wire _guard96 = comb_reg_out; +wire _guard97 = _guard95 & _guard96; +wire _guard98 = _guard94 & _guard97; +wire _guard99 = tdcc1_go_out; wire _guard100 = _guard98 & _guard99; -wire _guard101 = _guard95 | _guard100; -wire _guard102 = fsm0_out == 2'd0; -wire _guard103 = beg_spl_upd0_done_out; +wire _guard101 = _guard93 | _guard100; +wire _guard102 = fsm1_out == 3'd2; +wire _guard103 = par0_done_out; wire _guard104 = _guard102 & _guard103; -wire _guard105 = tdcc_go_out; +wire _guard105 = tdcc1_go_out; wire _guard106 = _guard104 & _guard105; -wire _guard107 = fsm0_out == 2'd2; -wire _guard108 = fsm0_out == 2'd1; -wire _guard109 = invoke1_done_out; +wire _guard107 = _guard101 | _guard106; +wire _guard108 = fsm1_out == 3'd3; +wire _guard109 = upd2_done_out; wire _guard110 = _guard108 & _guard109; -wire _guard111 = tdcc_go_out; +wire _guard111 = tdcc1_go_out; wire _guard112 = _guard110 & _guard111; -wire _guard113 = fsm2_out == 3'd6; -wire _guard114 = fsm2_out == 3'd0; -wire _guard115 = invoke0_done_out; +wire _guard113 = _guard107 | _guard112; +wire _guard114 = fsm1_out == 3'd4; +wire _guard115 = invoke3_done_out; wire _guard116 = _guard114 & _guard115; wire _guard117 = tdcc1_go_out; wire _guard118 = _guard116 & _guard117; wire _guard119 = _guard113 | _guard118; -wire _guard120 = fsm2_out == 3'd1; -wire _guard121 = wrapper_early_reset_cond00_done_out; +wire _guard120 = fsm1_out == 3'd1; +wire _guard121 = wrapper_early_reset_cond000_done_out; wire _guard122 = comb_reg_out; -wire _guard123 = _guard121 & _guard122; -wire _guard124 = _guard120 & _guard123; -wire _guard125 = tdcc1_go_out; -wire _guard126 = _guard124 & _guard125; -wire _guard127 = _guard119 | _guard126; -wire _guard128 = fsm2_out == 3'd5; -wire _guard129 = wrapper_early_reset_cond00_done_out; -wire _guard130 = comb_reg_out; -wire _guard131 = _guard129 & _guard130; -wire _guard132 = _guard128 & _guard131; -wire _guard133 = tdcc1_go_out; -wire _guard134 = _guard132 & _guard133; -wire _guard135 = _guard127 | _guard134; -wire _guard136 = fsm2_out == 3'd2; -wire _guard137 = par0_done_out; -wire _guard138 = _guard136 & _guard137; -wire _guard139 = tdcc1_go_out; -wire _guard140 = _guard138 & _guard139; -wire _guard141 = _guard135 | _guard140; -wire _guard142 = fsm2_out == 3'd3; -wire _guard143 = upd2_done_out; -wire _guard144 = _guard142 & _guard143; -wire _guard145 = tdcc1_go_out; -wire _guard146 = _guard144 & _guard145; -wire _guard147 = _guard141 | _guard146; -wire _guard148 = fsm2_out == 3'd4; -wire _guard149 = invoke3_done_out; -wire _guard150 = _guard148 & _guard149; -wire _guard151 = tdcc1_go_out; -wire _guard152 = _guard150 & _guard151; -wire _guard153 = _guard147 | _guard152; -wire _guard154 = fsm2_out == 3'd1; -wire _guard155 = wrapper_early_reset_cond00_done_out; -wire _guard156 = comb_reg_out; -wire _guard157 = ~_guard156; -wire _guard158 = _guard155 & _guard157; -wire _guard159 = _guard154 & _guard158; -wire _guard160 = tdcc1_go_out; -wire _guard161 = _guard159 & _guard160; -wire _guard162 = _guard153 | _guard161; -wire _guard163 = fsm2_out == 3'd5; -wire _guard164 = wrapper_early_reset_cond00_done_out; -wire _guard165 = comb_reg_out; -wire _guard166 = ~_guard165; -wire _guard167 = _guard164 & _guard166; -wire _guard168 = _guard163 & _guard167; -wire _guard169 = tdcc1_go_out; +wire _guard123 = ~_guard122; +wire _guard124 = _guard121 & _guard123; +wire _guard125 = _guard120 & _guard124; +wire _guard126 = tdcc1_go_out; +wire _guard127 = _guard125 & _guard126; +wire _guard128 = _guard119 | _guard127; +wire _guard129 = fsm1_out == 3'd5; +wire _guard130 = wrapper_early_reset_cond000_done_out; +wire _guard131 = comb_reg_out; +wire _guard132 = ~_guard131; +wire _guard133 = _guard130 & _guard132; +wire _guard134 = _guard129 & _guard133; +wire _guard135 = tdcc1_go_out; +wire _guard136 = _guard134 & _guard135; +wire _guard137 = _guard128 | _guard136; +wire _guard138 = fsm1_out == 3'd1; +wire _guard139 = wrapper_early_reset_cond000_done_out; +wire _guard140 = comb_reg_out; +wire _guard141 = ~_guard140; +wire _guard142 = _guard139 & _guard141; +wire _guard143 = _guard138 & _guard142; +wire _guard144 = tdcc1_go_out; +wire _guard145 = _guard143 & _guard144; +wire _guard146 = fsm1_out == 3'd5; +wire _guard147 = wrapper_early_reset_cond000_done_out; +wire _guard148 = comb_reg_out; +wire _guard149 = ~_guard148; +wire _guard150 = _guard147 & _guard149; +wire _guard151 = _guard146 & _guard150; +wire _guard152 = tdcc1_go_out; +wire _guard153 = _guard151 & _guard152; +wire _guard154 = _guard145 | _guard153; +wire _guard155 = fsm1_out == 3'd4; +wire _guard156 = invoke3_done_out; +wire _guard157 = _guard155 & _guard156; +wire _guard158 = tdcc1_go_out; +wire _guard159 = _guard157 & _guard158; +wire _guard160 = fsm1_out == 3'd1; +wire _guard161 = wrapper_early_reset_cond000_done_out; +wire _guard162 = comb_reg_out; +wire _guard163 = _guard161 & _guard162; +wire _guard164 = _guard160 & _guard163; +wire _guard165 = tdcc1_go_out; +wire _guard166 = _guard164 & _guard165; +wire _guard167 = fsm1_out == 3'd5; +wire _guard168 = wrapper_early_reset_cond000_done_out; +wire _guard169 = comb_reg_out; wire _guard170 = _guard168 & _guard169; -wire _guard171 = _guard162 | _guard170; -wire _guard172 = fsm2_out == 3'd1; -wire _guard173 = wrapper_early_reset_cond00_done_out; -wire _guard174 = comb_reg_out; -wire _guard175 = ~_guard174; -wire _guard176 = _guard173 & _guard175; -wire _guard177 = _guard172 & _guard176; +wire _guard171 = _guard167 & _guard170; +wire _guard172 = tdcc1_go_out; +wire _guard173 = _guard171 & _guard172; +wire _guard174 = _guard166 | _guard173; +wire _guard175 = fsm1_out == 3'd3; +wire _guard176 = upd2_done_out; +wire _guard177 = _guard175 & _guard176; wire _guard178 = tdcc1_go_out; wire _guard179 = _guard177 & _guard178; -wire _guard180 = fsm2_out == 3'd5; -wire _guard181 = wrapper_early_reset_cond00_done_out; -wire _guard182 = comb_reg_out; -wire _guard183 = ~_guard182; -wire _guard184 = _guard181 & _guard183; -wire _guard185 = _guard180 & _guard184; -wire _guard186 = tdcc1_go_out; -wire _guard187 = _guard185 & _guard186; -wire _guard188 = _guard179 | _guard187; -wire _guard189 = fsm2_out == 3'd4; -wire _guard190 = invoke3_done_out; -wire _guard191 = _guard189 & _guard190; -wire _guard192 = tdcc1_go_out; -wire _guard193 = _guard191 & _guard192; -wire _guard194 = fsm2_out == 3'd1; -wire _guard195 = wrapper_early_reset_cond00_done_out; -wire _guard196 = comb_reg_out; -wire _guard197 = _guard195 & _guard196; -wire _guard198 = _guard194 & _guard197; -wire _guard199 = tdcc1_go_out; +wire _guard180 = fsm1_out == 3'd0; +wire _guard181 = invoke0_done_out; +wire _guard182 = _guard180 & _guard181; +wire _guard183 = tdcc1_go_out; +wire _guard184 = _guard182 & _guard183; +wire _guard185 = fsm1_out == 3'd6; +wire _guard186 = fsm1_out == 3'd2; +wire _guard187 = par0_done_out; +wire _guard188 = _guard186 & _guard187; +wire _guard189 = tdcc1_go_out; +wire _guard190 = _guard188 & _guard189; +wire _guard191 = pd_out; +wire _guard192 = tdcc_done_out; +wire _guard193 = _guard191 | _guard192; +wire _guard194 = ~_guard193; +wire _guard195 = par0_go_out; +wire _guard196 = _guard194 & _guard195; +wire _guard197 = invoke0_done_out; +wire _guard198 = ~_guard197; +wire _guard199 = fsm1_out == 3'd0; wire _guard200 = _guard198 & _guard199; -wire _guard201 = fsm2_out == 3'd5; -wire _guard202 = wrapper_early_reset_cond00_done_out; -wire _guard203 = comb_reg_out; -wire _guard204 = _guard202 & _guard203; -wire _guard205 = _guard201 & _guard204; -wire _guard206 = tdcc1_go_out; -wire _guard207 = _guard205 & _guard206; -wire _guard208 = _guard200 | _guard207; -wire _guard209 = fsm2_out == 3'd3; -wire _guard210 = upd2_done_out; -wire _guard211 = _guard209 & _guard210; -wire _guard212 = tdcc1_go_out; -wire _guard213 = _guard211 & _guard212; -wire _guard214 = fsm2_out == 3'd0; -wire _guard215 = invoke0_done_out; -wire _guard216 = _guard214 & _guard215; -wire _guard217 = tdcc1_go_out; +wire _guard201 = tdcc1_go_out; +wire _guard202 = _guard200 & _guard201; +wire _guard203 = fsm0_out == 2'd2; +wire _guard204 = fsm0_out == 2'd0; +wire _guard205 = beg_spl_upd1_done_out; +wire _guard206 = _guard204 & _guard205; +wire _guard207 = tdcc0_go_out; +wire _guard208 = _guard206 & _guard207; +wire _guard209 = _guard203 | _guard208; +wire _guard210 = fsm0_out == 2'd1; +wire _guard211 = invoke2_done_out; +wire _guard212 = _guard210 & _guard211; +wire _guard213 = tdcc0_go_out; +wire _guard214 = _guard212 & _guard213; +wire _guard215 = _guard209 | _guard214; +wire _guard216 = fsm0_out == 2'd0; +wire _guard217 = beg_spl_upd1_done_out; wire _guard218 = _guard216 & _guard217; -wire _guard219 = fsm2_out == 3'd6; -wire _guard220 = fsm2_out == 3'd2; -wire _guard221 = par0_done_out; -wire _guard222 = _guard220 & _guard221; -wire _guard223 = tdcc1_go_out; +wire _guard219 = tdcc0_go_out; +wire _guard220 = _guard218 & _guard219; +wire _guard221 = fsm0_out == 2'd2; +wire _guard222 = fsm0_out == 2'd1; +wire _guard223 = invoke2_done_out; wire _guard224 = _guard222 & _guard223; -wire _guard225 = pd0_out; -wire _guard226 = tdcc0_done_out; -wire _guard227 = _guard225 | _guard226; -wire _guard228 = ~_guard227; -wire _guard229 = par0_go_out; -wire _guard230 = _guard228 & _guard229; -wire _guard231 = pd_out; -wire _guard232 = pd0_out; -wire _guard233 = _guard231 & _guard232; -wire _guard234 = invoke1_done_out; -wire _guard235 = ~_guard234; -wire _guard236 = fsm0_out == 2'd1; -wire _guard237 = _guard235 & _guard236; -wire _guard238 = tdcc_go_out; -wire _guard239 = _guard237 & _guard238; -wire _guard240 = beg_spl_upd1_done_out; -wire _guard241 = ~_guard240; -wire _guard242 = fsm1_out == 2'd0; -wire _guard243 = _guard241 & _guard242; -wire _guard244 = tdcc0_go_out; -wire _guard245 = _guard243 & _guard244; -wire _guard246 = early_reset_cond00_go_out; -wire _guard247 = early_reset_cond00_go_out; -wire _guard248 = fsm_out == 1'd0; +wire _guard225 = tdcc0_go_out; +wire _guard226 = _guard224 & _guard225; +wire _guard227 = pd0_out; +wire _guard228 = tdcc0_done_out; +wire _guard229 = _guard227 | _guard228; +wire _guard230 = ~_guard229; +wire _guard231 = par0_go_out; +wire _guard232 = _guard230 & _guard231; +wire _guard233 = wrapper_early_reset_cond000_go_out; +wire _guard234 = pd_out; +wire _guard235 = pd0_out; +wire _guard236 = _guard234 & _guard235; +wire _guard237 = invoke1_done_out; +wire _guard238 = ~_guard237; +wire _guard239 = fsm_out == 2'd1; +wire _guard240 = _guard238 & _guard239; +wire _guard241 = tdcc_go_out; +wire _guard242 = _guard240 & _guard241; +wire _guard243 = beg_spl_upd1_done_out; +wire _guard244 = ~_guard243; +wire _guard245 = fsm0_out == 2'd0; +wire _guard246 = _guard244 & _guard245; +wire _guard247 = tdcc0_go_out; +wire _guard248 = _guard246 & _guard247; wire _guard249 = signal_reg_out; -wire _guard250 = _guard248 & _guard249; -wire _guard251 = fsm_out == 1'd0; +wire _guard250 = early_reset_cond000_go_out; +wire _guard251 = early_reset_cond000_go_out; wire _guard252 = signal_reg_out; -wire _guard253 = ~_guard252; -wire _guard254 = _guard251 & _guard253; -wire _guard255 = wrapper_early_reset_cond00_go_out; -wire _guard256 = _guard254 & _guard255; -wire _guard257 = _guard250 | _guard256; -wire _guard258 = fsm_out == 1'd0; -wire _guard259 = signal_reg_out; -wire _guard260 = ~_guard259; -wire _guard261 = _guard258 & _guard260; -wire _guard262 = wrapper_early_reset_cond00_go_out; -wire _guard263 = _guard261 & _guard262; -wire _guard264 = fsm_out == 1'd0; -wire _guard265 = signal_reg_out; -wire _guard266 = _guard264 & _guard265; -wire _guard267 = fsm2_out == 3'd6; +wire _guard253 = _guard0 & _guard0; +wire _guard254 = signal_reg_out; +wire _guard255 = ~_guard254; +wire _guard256 = _guard253 & _guard255; +wire _guard257 = wrapper_early_reset_cond000_go_out; +wire _guard258 = _guard256 & _guard257; +wire _guard259 = _guard252 | _guard258; +wire _guard260 = _guard0 & _guard0; +wire _guard261 = signal_reg_out; +wire _guard262 = ~_guard261; +wire _guard263 = _guard260 & _guard262; +wire _guard264 = wrapper_early_reset_cond000_go_out; +wire _guard265 = _guard263 & _guard264; +wire _guard266 = signal_reg_out; +wire _guard267 = fsm1_out == 3'd6; wire _guard268 = invoke2_go_out; wire _guard269 = invoke2_go_out; wire _guard270 = pd_out; @@ -8805,43 +8532,27 @@ wire _guard292 = _guard290 & _guard291; wire _guard293 = pd_out; wire _guard294 = pd0_out; wire _guard295 = _guard293 & _guard294; -wire _guard296 = wrapper_early_reset_cond00_done_out; -wire _guard297 = ~_guard296; -wire _guard298 = fsm2_out == 3'd1; -wire _guard299 = _guard297 & _guard298; -wire _guard300 = tdcc1_go_out; -wire _guard301 = _guard299 & _guard300; -wire _guard302 = wrapper_early_reset_cond00_done_out; -wire _guard303 = ~_guard302; -wire _guard304 = fsm2_out == 3'd5; -wire _guard305 = _guard303 & _guard304; -wire _guard306 = tdcc1_go_out; -wire _guard307 = _guard305 & _guard306; -wire _guard308 = _guard301 | _guard307; -wire _guard309 = fsm_out == 1'd0; -wire _guard310 = signal_reg_out; -wire _guard311 = _guard309 & _guard310; -wire _guard312 = fsm0_out == 2'd2; -wire _guard313 = upd2_done_out; -wire _guard314 = ~_guard313; -wire _guard315 = fsm2_out == 3'd3; +wire _guard296 = fsm_out == 2'd2; +wire _guard297 = upd2_done_out; +wire _guard298 = ~_guard297; +wire _guard299 = fsm1_out == 3'd3; +wire _guard300 = _guard298 & _guard299; +wire _guard301 = tdcc1_go_out; +wire _guard302 = _guard300 & _guard301; +wire _guard303 = invoke3_done_out; +wire _guard304 = ~_guard303; +wire _guard305 = fsm1_out == 3'd4; +wire _guard306 = _guard304 & _guard305; +wire _guard307 = tdcc1_go_out; +wire _guard308 = _guard306 & _guard307; +wire _guard309 = invoke1_go_out; +wire _guard310 = invoke1_go_out; +wire _guard311 = par0_done_out; +wire _guard312 = ~_guard311; +wire _guard313 = fsm1_out == 3'd2; +wire _guard314 = _guard312 & _guard313; +wire _guard315 = tdcc1_go_out; wire _guard316 = _guard314 & _guard315; -wire _guard317 = tdcc1_go_out; -wire _guard318 = _guard316 & _guard317; -wire _guard319 = invoke3_done_out; -wire _guard320 = ~_guard319; -wire _guard321 = fsm2_out == 3'd4; -wire _guard322 = _guard320 & _guard321; -wire _guard323 = tdcc1_go_out; -wire _guard324 = _guard322 & _guard323; -wire _guard325 = invoke1_go_out; -wire _guard326 = invoke1_go_out; -wire _guard327 = par0_done_out; -wire _guard328 = ~_guard327; -wire _guard329 = fsm2_out == 3'd2; -wire _guard330 = _guard328 & _guard329; -wire _guard331 = tdcc1_go_out; -wire _guard332 = _guard330 & _guard331; assign i0_write_en = _guard3; assign i0_clk = clk; assign i0_reset = reset; @@ -8850,92 +8561,83 @@ assign i0_in = _guard5 ? const0_out : 'x; assign upd2_done_in = Sum0_done; -assign early_reset_cond00_go_in = _guard6; assign add1_left = i0_out; assign add1_right = const2_out; -assign done = _guard9; +assign done = _guard8; assign B0_write_en = 1'd0; assign Sum0_addr0 = bit_slice_out; assign A0_write_en = 1'd0; assign B0_addr0 = bit_slice_out; -assign B0_content_en = _guard16; +assign B0_content_en = _guard15; assign A0_addr0 = bit_slice_out; -assign Sum0_write_en = _guard20; -assign Sum0_content_en = _guard21; +assign Sum0_write_en = _guard19; +assign Sum0_content_en = _guard20; assign Sum0_write_data = add0_out; -assign A0_content_en = _guard25; -assign fsm_write_en = _guard26; +assign A0_content_en = _guard24; +assign fsm_write_en = _guard37; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard30 ? adder_out : - _guard33 ? 1'd0 : - 1'd0; -assign adder_left = - _guard34 ? fsm_out : - 1'd0; -assign adder_right = _guard35; -assign beg_spl_upd0_go_in = _guard41; + _guard42 ? 2'd1 : + _guard43 ? 2'd0 : + _guard48 ? 2'd2 : + 2'd0; +assign beg_spl_upd0_go_in = _guard54; +assign early_reset_cond000_done_in = ud0_out; assign add0_left = B_read0_0_out; assign add0_right = A_read0_0_out; -assign invoke2_go_in = _guard49; -assign tdcc0_done_in = _guard50; -assign comb_reg_write_en = _guard51; +assign invoke2_go_in = _guard62; +assign tdcc0_done_in = _guard63; +assign comb_reg_write_en = _guard64; assign comb_reg_clk = clk; assign comb_reg_reset = reset; assign comb_reg_in = - _guard52 ? le0_out : + _guard65 ? le0_out : 1'd0; -assign early_reset_cond00_done_in = ud_out; -assign fsm1_write_en = _guard65; +assign wrapper_early_reset_cond000_go_in = _guard78; +assign fsm1_write_en = _guard137; assign fsm1_clk = clk; assign fsm1_reset = reset; assign fsm1_in = - _guard70 ? 2'd1 : - _guard71 ? 2'd0 : - _guard76 ? 2'd2 : - 2'd0; -assign tdcc_go_in = _guard82; -assign invoke0_go_in = _guard88; + _guard154 ? 3'd6 : + _guard159 ? 3'd5 : + _guard174 ? 3'd2 : + _guard179 ? 3'd4 : + _guard184 ? 3'd1 : + _guard185 ? 3'd0 : + _guard190 ? 3'd3 : + 3'd0; +assign tdcc_go_in = _guard196; +assign invoke0_go_in = _guard202; assign beg_spl_upd0_done_in = A0_done; assign bit_slice_in = i0_out; -assign fsm0_write_en = _guard101; +assign fsm0_write_en = _guard215; assign fsm0_clk = clk; assign fsm0_reset = reset; assign fsm0_in = - _guard106 ? 2'd1 : - _guard107 ? 2'd0 : - _guard112 ? 2'd2 : + _guard220 ? 2'd1 : + _guard221 ? 2'd0 : + _guard226 ? 2'd2 : 2'd0; -assign fsm2_write_en = _guard171; -assign fsm2_clk = clk; -assign fsm2_reset = reset; -assign fsm2_in = - _guard188 ? 3'd6 : - _guard193 ? 3'd5 : - _guard208 ? 3'd2 : - _guard213 ? 3'd4 : - _guard218 ? 3'd1 : - _guard219 ? 3'd0 : - _guard224 ? 3'd3 : - 3'd0; -assign tdcc0_go_in = _guard230; +assign tdcc0_go_in = _guard232; assign invoke3_done_in = i0_done; -assign par0_done_in = _guard233; +assign early_reset_cond000_go_in = _guard233; +assign par0_done_in = _guard236; assign invoke0_done_in = i0_done; -assign invoke1_go_in = _guard239; -assign beg_spl_upd1_go_in = _guard245; +assign invoke1_go_in = _guard242; +assign beg_spl_upd1_go_in = _guard248; +assign wrapper_early_reset_cond000_done_in = _guard249; assign le0_left = - _guard246 ? i0_out : + _guard250 ? i0_out : 4'd0; assign le0_right = - _guard247 ? const1_out : + _guard251 ? const1_out : 4'd0; -assign signal_reg_write_en = _guard257; +assign signal_reg_write_en = _guard259; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard263 ? 1'd1 : + _guard265 ? 1'd1 : _guard266 ? 1'd0 : 1'd0; assign invoke2_done_in = B_read0_0_done; @@ -8959,17 +8661,15 @@ assign pd0_in = _guard292 ? 1'd1 : _guard295 ? 1'd0 : 1'd0; -assign wrapper_early_reset_cond00_go_in = _guard308; -assign wrapper_early_reset_cond00_done_in = _guard311; -assign tdcc_done_in = _guard312; -assign upd2_go_in = _guard318; -assign invoke3_go_in = _guard324; +assign tdcc_done_in = _guard296; +assign upd2_go_in = _guard302; +assign invoke3_go_in = _guard308; assign invoke1_done_in = A_read0_0_done; assign tdcc1_go_in = go; -assign A_read0_0_write_en = _guard325; +assign A_read0_0_write_en = _guard309; assign A_read0_0_clk = clk; assign A_read0_0_reset = reset; assign A_read0_0_in = A0_read_data; -assign par0_go_in = _guard332; +assign par0_go_in = _guard316; // COMPONENT END: main endmodule