From 31ad17fa1acdc90378bb633a02841f23bd5b5364 Mon Sep 17 00:00:00 2001 From: Allen Ho Date: Wed, 20 Sep 2023 14:23:47 +0800 Subject: [PATCH 01/33] add abc9RecoverBoundary --- src/aig/gia/giaDup.c | 133 +++++++++++++++++++++++++++++++++++++++++++ src/base/abci/abc.c | 129 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 262 insertions(+) diff --git a/src/aig/gia/giaDup.c b/src/aig/gia/giaDup.c index db4072d71b..665164eb27 100644 --- a/src/aig/gia/giaDup.c +++ b/src/aig/gia/giaDup.c @@ -5719,6 +5719,139 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose ) return pNew; } +/**Function************************************************************* + Synopsis [Duplicates AIG while putting objects in the DFS order.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +Gia_Man_t * Gia_ManImplFromBMiter( Gia_Man_t * p, int nPo, int nBInput ) +{ + Gia_Man_t * pNew, *pTemp; + Gia_Obj_t * pObj, *pObj2; + int i; + int nBoundI = 0, nBoundO = 0; + int nExtra; + Gia_ManFillValue( p ); + pNew = Gia_ManStart( Gia_ManObjNum(p) ); + // pNew->pName = Abc_UtilStrsav( p->pName ); + // pNew->pSpec = Abc_UtilStrsav( p->pSpec ); + Gia_ManConst0(p)->Value = 0; + + // add po of impl + Gia_ManForEachCo( p, pObj, i ) + { + if ( i < nPo ) + { + Gia_ManDupOrderDfs_rec( pNew, p, pObj ); + } + } + nExtra = Gia_ManAndNum( pNew ); + + // add boundary as buf + Gia_ManForEachCo( p, pObj, i ) + { + if ( i >= 2 * nPo ) + { + pObj2 = Gia_ObjFanin0(pObj); + if (~pObj2->Value) // visited boundary + { + if ( i >= 2 * nPo + nBInput ) + { + nBoundO ++; + } + else nBoundI ++; + } + + Gia_ManDupOrderDfs_rec( pNew, p, pObj2 ); + Gia_ManAppendBuf( pNew, Gia_ObjFanin0Copy(pObj) ); + } + } + nExtra = Gia_ManAndNum( pNew ) - nExtra - Gia_ManBufNum( pNew ); + + Gia_ManForEachCi( p, pObj, i ) + if ( !~pObj->Value ) + pObj->Value = Gia_ManAppendCi(pNew); + assert( Gia_ManCiNum(pNew) == Gia_ManCiNum(p) ); + + Gia_ManDupRemapCis( pNew, p ); + pNew = Gia_ManCleanup( pTemp = pNew ); + Gia_ManStop( pTemp ); + + + printf( "synthesized implementation:\n" ); + printf( "\t%d / %d input boundary recovered.\n", nBoundI, nBInput ); + printf( "\t%d / %d output boundary recovered.\n", nBoundO, Gia_ManCoNum(p)-2*nPo-nBInput ); + printf( "\t%d / %d unused nodes in the box.\n", nExtra, Gia_ManAndNum(pNew) - Gia_ManBufNum( pNew ) ); + + return pNew; +} + +/**Function************************************************************* + + Synopsis [Duplicates AIG while putting objects in the DFS order.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +Gia_Man_t * Gia_ManMiterFromBMiter( Gia_Man_t * p, int nPo ) +{ + Gia_Man_t * pNew, *pTemp; + Gia_Obj_t * pObj, *pObj2; + int i, iXor, iPo, i1, i2; + pNew = Gia_ManStart( Gia_ManObjNum(p) ); + pNew->pName = Abc_UtilStrsav( "miter" ); + Gia_ManFillValue( p ); + Gia_ManConst0(p)->Value = 0; + + // create primary inputs + Gia_ManForEachCi( p, pObj, i ) + if ( !~pObj->Value ) + pObj->Value = Gia_ManAppendCi(pNew); + + Gia_ManForEachCo( p, pObj, i ) + { + if ( i == nPo ) + { + break; + } + else + { + pObj2 = Gia_ManCo( p, i + nPo ); + + i1 = Gia_ManDupOrderDfs_rec( pNew, p, Gia_ObjFanin0(pObj) ); + i2 = Gia_ManDupOrderDfs_rec( pNew, p, Gia_ObjFanin0(pObj2) ); + + iXor = Gia_ManAppendXor2( pNew, Gia_ObjFaninC0(pObj) ? i1+1 : i1 , Gia_ObjFaninC0(pObj2 ) ? i2+1 : i2 ); + if ( i > 0 ) + { + iPo = Gia_ManAppendOr2( pNew, iPo, iXor ); + } + else + { + iPo = iXor; + } + } + } + Gia_ManAppendCo( pNew, iPo ); + + + pNew = Gia_ManCleanup( pTemp = pNew ); + Gia_ManStop( pTemp ); + pNew = Gia_ManDupNormalize( pTemp = pNew, 0 ); + Gia_ManStop( pTemp ); + + return pNew; +} + //////////////////////////////////////////////////////////////////////// /// END OF FILE /// //////////////////////////////////////////////////////////////////////// diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c index 5bc50032ce..906b456ad6 100644 --- a/src/base/abci/abc.c +++ b/src/base/abci/abc.c @@ -597,6 +597,7 @@ static int Abc_CommandAbc9ProdAdd ( Abc_Frame_t * pAbc, int argc, cha static int Abc_CommandAbc9AddFlop ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandAbc9BMiter ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandAbc9GenHie ( Abc_Frame_t * pAbc, int argc, char ** argv ); +static int Abc_CommandAbc9RecoverBoundary ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandAbc9Test ( Abc_Frame_t * pAbc, int argc, char ** argv ); @@ -1376,6 +1377,7 @@ void Abc_Init( Abc_Frame_t * pAbc ) Cmd_CommandAdd( pAbc, "ABC9", "&addflop", Abc_CommandAbc9AddFlop, 0 ); Cmd_CommandAdd( pAbc, "ABC9", "&bmiter", Abc_CommandAbc9BMiter, 0 ); Cmd_CommandAdd( pAbc, "ABC9", "&gen_hie", Abc_CommandAbc9GenHie, 0 ); + Cmd_CommandAdd( pAbc, "ABC9", "&rb", Abc_CommandAbc9RecoverBoundary, 0 ); Cmd_CommandAdd( pAbc, "ABC9", "&test", Abc_CommandAbc9Test, 0 ); { @@ -51809,6 +51811,133 @@ int Abc_CommandAbc9GenHie( Abc_Frame_t * pAbc, int argc, char ** argv ) Abc_Print( -2, "\t (the PO count of should not be less than the PI count of )\n"); return 1;} +/**Function************************************************************* + + Synopsis [] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +int Abc_CommandAbc9RecoverBoundary( Abc_Frame_t * pAbc, int argc, char ** argv ) +{ + extern Gia_Man_t * Gia_ManDeepSyn( Gia_Man_t * pGia, int nIters, int nNoImpr, int TimeOut, int nAnds, int Seed, int fUseTwo, int fVerbose ); + extern Gia_Man_t * Gia_ManImplFromBMiter( Gia_Man_t * p, int nPo, int nBInput ); + extern Gia_Man_t * Gia_ManMiterFromBMiter( Gia_Man_t * p, int nPo ); + int c, nIters = 1, nNoImpr = ABC_INFINITY, TimeOut = 20, nAnds = 0, Seed = 0, fUseTwo = 0, fVerbose = 0; + + int fKeepBMiter = 0; + Gia_Man_t * pMiter; + Gia_Man_t * pImpl; + Gia_Man_t * pDup; + Gia_Obj_t* pObj; + Gia_Man_t * pSpec = NULL; + char ** pArgvNew; + int i, nArgcNew, nPo; + int nBInput = -1; + char *FileName; + Extra_UtilGetoptReset(); + while ( ( c = Extra_UtilGetopt( argc, argv, "vkhI," ) ) != EOF ) + { + switch ( c ) + { + case 'I': + if ( globalUtilOptind >= argc ) + { + Abc_Print( -1, "Command line switch \"-I\" should be followed by an integer.\n" ); + goto usage; + } + nBInput = atoi(argv[globalUtilOptind]); + globalUtilOptind++; + if ( nBInput < 0 ) + goto usage; + break; + case 'k': + fKeepBMiter ^= 1; + break; + case 'v': + fVerbose ^= 1; + break; + case 'h': + goto usage; + default: + goto usage; + } + } + pArgvNew = argv + globalUtilOptind; + nArgcNew = argc - globalUtilOptind; + if ( nArgcNew != 1 ) + { + Abc_Print( -1, "There is no file name.\n" ); + return 1; + } + + if ( pAbc->pGia == NULL ) + { + Abc_Print( -1, "Abc_CommandAbc9RecoverBoundary(): There is no AIG.\n" ); + return 0; + } + FileName = pArgvNew[0]; + + + // printing + + // Gia_ManForEachCo( pAbc->pGia, pObj, i ){ + // printf("Original node: %s id: %i\n", Gia_ObjCoName(pAbc->pGia, i), i); + // } + + + /* + // perform heavy synthesis + pTemp = Gia_ManDeepSyn( pAbc->pGia, nIters, nNoImpr, TimeOut, nAnds, Seed, fUseTwo, fVerbose ); + Abc_FrameUpdateGia( pAbc, pTemp ); + // print spec/impl and boundary information + Gia_ManForEachCo( pAbc->pGia, pObj, i ){ + printf("Output node: %s id: %i\n", Gia_ObjCoName(pAbc->pGia, i), i); + } + */ + + + + // check boundary recovery status + pSpec = Gia_AigerRead( FileName, false, true, 0 ); + if ( !pSpec ) + { + Abc_Print( -1, "Abc_CommandAbc9RecoverBoundary(): fail to read spec.\n" ); + return 1; + } + nPo = Gia_ManCoNum( pSpec ); + + // duplicate + pDup = Gia_ManDup( pAbc->pGia ); + + // option 1: remove po and keep the buffers + // default nbinput: + if ( nBInput == -1 ) nBInput = (Gia_ManCoNum(pDup)-2*nPo)/2; + pImpl = Gia_ManImplFromBMiter( pDup, nPo, nBInput ); + + // option 2: build miter (with uif?) + if (!fKeepBMiter ) + { + pMiter = Gia_ManMiterFromBMiter( pAbc->pGia, nPo ); + Abc_FrameUpdateGia( pAbc, pMiter ); + } + + return 0; + +usage: + Abc_Print( -2, "usage: &rb [-vkh] \n" ); + Abc_Print( -2, "\t generate an implementation aig with specification boundary\n" ); + Abc_Print( -2, "\t-v : toggles printing verbose information [default = %s]\n", fVerbose? "yes": "no" ); + Abc_Print( -2, "\t-k : keep the bmiter and print the boundary status only.\n"); + Abc_Print( -2, "\t-I num : the number of inputs in the boundary\n"); + Abc_Print( -2, "\t-h : print the command usage\n"); + Abc_Print( -2, "\t : the specification file\n"); + return 1; +} /**Function************************************************************* From ba64d6118b16f4f405b65affb0b04797e5b665e1 Mon Sep 17 00:00:00 2001 From: Allen Ho Date: Mon, 30 Oct 2023 15:09:01 -0700 Subject: [PATCH 02/33] out-side box matching --- Makefile | 3 +- src/aig/gia/giaDup.c | 96 ++++++++++++++++++++++++++++++++++++++++ src/proof/cec/cecSatG2.c | 57 ++++++++++++++++++++++++ 3 files changed, 155 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 3976cf7b15..e6c0f44538 100644 --- a/Makefile +++ b/Makefile @@ -33,7 +33,8 @@ MODULES := \ src/proof/pdr src/proof/abs src/proof/live src/proof/ssc src/proof/int \ src/proof/cec src/proof/acec src/proof/dch src/proof/fraig src/proof/fra src/proof/ssw \ src/aig/aig src/aig/saig src/aig/gia src/aig/ioa src/aig/ivy src/aig/hop \ - src/aig/miniaig + src/aig/miniaig \ + src/sat/bsat2 all: $(PROG) default: $(PROG) diff --git a/src/aig/gia/giaDup.c b/src/aig/gia/giaDup.c index 665164eb27..4efbe90dc9 100644 --- a/src/aig/gia/giaDup.c +++ b/src/aig/gia/giaDup.c @@ -30,6 +30,8 @@ ABC_NAMESPACE_IMPL_START /// DECLARATIONS /// //////////////////////////////////////////////////////////////////////// +Vec_Int_t* vLitBmiter; + //////////////////////////////////////////////////////////////////////// /// FUNCTION DEFINITIONS /// //////////////////////////////////////////////////////////////////////// @@ -5699,13 +5701,107 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose ) Gia_ManConst0(p2)->Value = 0; Gia_ManForEachCi( p1, pObj, i ) pObj->Value = Gia_ManCi(p2, i)->Value = Gia_ManAppendCi( pNew ); + + // TODO: record the corresponding impl node of each lit + vLitBmiter = Vec_IntAlloc( Gia_ManObjNum(p2) ); + Vec_IntFill( vLitBmiter, Gia_ManObjNum(p2) + Gia_ManObjNum(p1), 0 ); + Gia_ManForEachAnd( p2, pObj, i ) + { pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); + Vec_IntUpdateEntry( vLitBmiter, pObj->Value, 3 ); + } + + // TODO: find nodes in spec + + Vec_Int_t * vTypeSpec = Vec_IntAlloc( 16 ); + Vec_IntFill( vTypeSpec, Gia_ManObjNum(p1), 0 ); + int n = Gia_ManBufNum(p1) / 2; + + Gia_ManStaticFanoutStart( p1 ); + Vec_Ptr_t * vQ = Vec_PtrAlloc(16); + Gia_Obj_t * pObj2; + int c1 = 0; + int c2 = 0; + int count; + Gia_ManForEachBuf( p1, pObj, i ) + { + if ( count < n ) + { + Vec_IntSetEntry( vTypeSpec, Gia_ObjId( p1, pObj ), 1 ); + c1++; + count ++; + + Vec_PtrPush( vQ, Gia_ObjFanin0(pObj) ); + Vec_PtrPush( vQ, Gia_ObjFanin1(pObj) ); + while ( Vec_PtrSize(vQ) != 0 ) + { + pObj2 = Vec_PtrPop(vQ); + if ( Vec_IntEntry( vTypeSpec, Gia_ObjId(p1, pObj2) ) != 0 ) continue; + c1 ++; + Vec_IntSetEntry( vTypeSpec, Gia_ObjId(p1, pObj2), 1 ); + if ( Gia_ObjFaninNum(p1, pObj2) > 0 ) Vec_PtrPush( vQ, Gia_ObjFanin0(pObj2) ); + if ( Gia_ObjFaninNum(p1, pObj2) > 1 ) Vec_PtrPush( vQ, Gia_ObjFanin1(pObj2) ); + } + + } + else + { + Vec_IntSetEntry( vTypeSpec, Gia_ObjId( p1, pObj ), 2 ); + c2 ++; + + int j; + // pObj = Gia_ObjFanin0(pObj); + Gia_ObjForEachFanoutStatic(p1, pObj, pObj2, j) + { + Vec_PtrPush( vQ, pObj2 ); + } + while ( Vec_PtrSize(vQ) != 0 ) + { + pObj2 = Vec_PtrPop(vQ); + if ( Vec_IntEntry( vTypeSpec, Gia_ObjId(p1, pObj2) ) != 0 ) continue; + Vec_IntSetEntry( vTypeSpec, Gia_ObjId(p1, pObj2), 2 ); + c2 ++; + for( int j = 0; j < Gia_ObjFanoutNum(p1, pObj2); j++ ) + { + Vec_PtrPush( vQ, Gia_ObjFanout(p1, pObj2, j) ); + } + } + + } + } + + Gia_ManStaticFanoutStop( p1 ); + + printf( "category %d %d %d\n", c1, c2, Gia_ManObjNum(p1) ); + + + // TODO: record hashed equivalent nodes + Gia_ManForEachAnd( p1, pObj, i ) { pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); + if ( Vec_IntEntry( vTypeSpec, Gia_ObjId( p1, pObj) ) > 0 ) + { + if ( Vec_IntGetEntry( vLitBmiter, pObj->Value ) == 3 ) // eq node in impl + { + Vec_IntUpdateEntry( vLitBmiter, pObj->Value, 3 + Vec_IntEntry( vTypeSpec, Gia_ObjId( p1, pObj) ) ); + } + else + { + Vec_IntUpdateEntry( vLitBmiter, pObj->Value, Vec_IntEntry( vTypeSpec, Gia_ObjId( p1, pObj) ) ); + } + } if ( Gia_ObjIsBuf(pObj) ) Vec_IntPush( vLits, pObj->Value ); } + + // int e; + // Vec_IntForEachEntry( vLitBmiter, e, i ) + // { + // printf( "%d ", e ); + // } + // printf("\n"); + Gia_ManForEachCo( p2, pObj, i ) Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ); //Gia_ManForEachCo( p1, pObj, i ) diff --git a/src/proof/cec/cecSatG2.c b/src/proof/cec/cecSatG2.c index 281deb0e9c..d641704f76 100644 --- a/src/proof/cec/cecSatG2.c +++ b/src/proof/cec/cecSatG2.c @@ -143,6 +143,9 @@ static inline int Cec4_ObjSatId( Gia_Man_t * p, Gia_Obj_t * pObj ) static inline int Cec4_ObjSetSatId( Gia_Man_t * p, Gia_Obj_t * pObj, int Num ) { assert(Cec4_ObjSatId(p, pObj) == -1); Gia_ObjSetCopy2Array(p, Gia_ObjId(p, pObj), Num); Vec_IntPush(&p->vSuppVars, Gia_ObjId(p, pObj)); if ( Gia_ObjIsCi(pObj) ) Vec_IntPushTwo(&p->vCopiesTwo, Gia_ObjId(p, pObj), Num); assert(Vec_IntSize(&p->vVarMap) == Num); Vec_IntPush(&p->vVarMap, Gia_ObjId(p, pObj)); return Num; } static inline void Cec4_ObjCleanSatId( Gia_Man_t * p, Gia_Obj_t * pObj ) { assert(Cec4_ObjSatId(p, pObj) != -1); Gia_ObjSetCopy2Array(p, Gia_ObjId(p, pObj), -1); } + +extern Vec_Int_t* vLitBmiter; + //////////////////////////////////////////////////////////////////////// /// FUNCTION DEFINITIONS /// //////////////////////////////////////////////////////////////////////// @@ -1887,7 +1890,43 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p continue; } if ( Cec4_ManSweepNode(pMan, i, Gia_ObjId(p, pRepr)) && Gia_ObjProved(p, i) ) + { + if ( Vec_IntEntry( vLitBmiter, pRepr->Value ) == 3 ) + { + switch ( Vec_IntEntry( vLitBmiter, pObj -> Value ) ) + { + case 1: + case 4: + Vec_IntUpdateEntry( vLitBmiter, pRepr->Value, 4 ); + break; + case 2: + case 5: + Vec_IntUpdateEntry( vLitBmiter, pRepr->Value, 5 ); + break; + default: + break; + } + } + else + { + if ( Vec_IntEntry(vLitBmiter, pObj->Value ) == 3 ) + switch ( Vec_IntEntry( vLitBmiter, pRepr -> Value ) ) + { + case 1: + case 4: + Vec_IntUpdateEntry( vLitBmiter, pObj->Value, 4 ); + break; + case 2: + case 5: + Vec_IntUpdateEntry( vLitBmiter, pObj->Value, 5 ); + break; + default: + break; + + } + } pObj->Value = Abc_LitNotCond( pRepr->Value, pObj->fPhase ^ pRepr->fPhase ); + } } if ( p->iPatsPi > 0 ) { @@ -1933,10 +1972,28 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p Gia_ManRemoveWrongChoices( p ); return p->pCexSeq ? 0 : 1; } +extern Vec_Int_t * vLitBmiter; Gia_Man_t * Cec4_ManSimulateTest( Gia_Man_t * p, Cec_ParFra_t * pPars ) { Gia_Man_t * pNew = NULL; Cec4_ManPerformSweeping( p, pPars, &pNew, 0 ); + + int e, i, c1=0, c2=0, c3=0, c4=0, c5=0; + Vec_IntForEachEntry( vLitBmiter, e, i ) + { + if ( i%2 ) continue; + switch (e) + { + case 1: c1++; break; + case 2: c2++; break; + case 3: c3++; break; + case 4: c4++; break; + case 5: c5++; break; + default: + break; + } + } + printf("category %d %d %d %d %d\n", c1, c2, c3+c4+c5, c4, c5); return pNew; } void Cec4_ManSimulateTest2( Gia_Man_t * p, int nConfs, int fVerbose ) From 50010139ef9b41040d902bad898458c59424771f Mon Sep 17 00:00:00 2001 From: Allen Ho Date: Mon, 6 Nov 2023 18:37:40 +0800 Subject: [PATCH 03/33] why --- src/proof/cec/cecSatG2.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/proof/cec/cecSatG2.c b/src/proof/cec/cecSatG2.c index d641704f76..1a6309ebe7 100644 --- a/src/proof/cec/cecSatG2.c +++ b/src/proof/cec/cecSatG2.c @@ -1978,6 +1978,7 @@ Gia_Man_t * Cec4_ManSimulateTest( Gia_Man_t * p, Cec_ParFra_t * pPars ) Gia_Man_t * pNew = NULL; Cec4_ManPerformSweeping( p, pPars, &pNew, 0 ); + // TODO int e, i, c1=0, c2=0, c3=0, c4=0, c5=0; Vec_IntForEachEntry( vLitBmiter, e, i ) { From 67a2b97cf0f5437198f01cea2d99b54d77a6491e Mon Sep 17 00:00:00 2001 From: WWFUG Date: Wed, 8 Nov 2023 19:00:03 +0800 Subject: [PATCH 04/33] added -I options in &bmiter --- .gitignore | 6 ++++ src/aig/gia/giaDup.c | 5 ++- src/base/abci/abc.c | 24 ++++++++++--- src/base/abci/abcMiter.c | 1 + src/proof/cec/cec.h | 1 + src/proof/cec/cecSatG2.c | 75 +++++++++++++++++++++------------------- 6 files changed, 71 insertions(+), 41 deletions(-) diff --git a/.gitignore b/.gitignore index cbb4241526..f0c5201c6d 100644 --- a/.gitignore +++ b/.gitignore @@ -8,6 +8,12 @@ ReleaseExt/ _/ _TEST/ +_sandwich/ +_scripts/ +*.aig +*.vcproj +*.sh +*.v lib/abc* lib/m114* lib/bip* diff --git a/src/aig/gia/giaDup.c b/src/aig/gia/giaDup.c index 4efbe90dc9..24c1d3b0ed 100644 --- a/src/aig/gia/giaDup.c +++ b/src/aig/gia/giaDup.c @@ -5669,7 +5669,7 @@ Gia_Man_t * Gia_ManDupAddFlop( Gia_Man_t * p ) SeeAlso [] ***********************************************************************/ -Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose ) +Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, int biNum) { Vec_Int_t * vLits; Gia_Man_t * pNew, * pTemp; @@ -5717,6 +5717,9 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose ) Vec_Int_t * vTypeSpec = Vec_IntAlloc( 16 ); Vec_IntFill( vTypeSpec, Gia_ManObjNum(p1), 0 ); int n = Gia_ManBufNum(p1) / 2; + if(biNum > 0){ + n = biNum; + } Gia_ManStaticFanoutStart( p1 ); Vec_Ptr_t * vQ = Vec_PtrAlloc(16); diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c index 906b456ad6..dab809c254 100644 --- a/src/base/abci/abc.c +++ b/src/base/abci/abc.c @@ -37921,7 +37921,7 @@ int Abc_CommandAbc9Fraig( Abc_Frame_t * pAbc, int argc, char ** argv ) int fCbs = 1, approxLim = 600, subBatchSz = 1, adaRecycle = 500, nMaxNodes = 0; Cec4_ManSetParams( pPars ); Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "JWRILDCNPMrmdckngxysopwvh" ) ) != EOF ) + while ( ( c = Extra_UtilGetopt( argc, argv, "JWRILDCNPMrmdckngxysopwqvh" ) ) != EOF ) { switch ( c ) { @@ -38074,6 +38074,9 @@ int Abc_CommandAbc9Fraig( Abc_Frame_t * pAbc, int argc, char ** argv ) case 'w': pPars->fVeryVerbose ^= 1; break; + case 'q': + pPars->fBMiterInfo ^= 1; + break; case 'v': pPars->fVerbose ^= 1; break; @@ -38138,6 +38141,7 @@ int Abc_CommandAbc9Fraig( Abc_Frame_t * pAbc, int argc, char ** argv ) Abc_Print( -2, "\t-o : toggle using the old SAT sweeper [default = %s]\n", fUseIvy? "yes": "no" ); Abc_Print( -2, "\t-p : toggle trying to prove when running the old SAT sweeper [default = %s]\n", fUseProve? "yes": "no" ); Abc_Print( -2, "\t-w : toggle printing even more verbose information [default = %s]\n", pPars->fVeryVerbose? "yes": "no" ); + Abc_Print( -2, "\t-q : toggle printing additional information for boundary miters [default = %s]\n", pPars->fVeryVerbose? "yes": "no" ); Abc_Print( -2, "\t-v : toggle printing verbose information [default = %s]\n", pPars->fVerbose? "yes": "no" ); Abc_Print( -2, "\t-h : print the command usage\n"); return 1; @@ -51689,16 +51693,25 @@ int Abc_CommandAbc9AddFlop( Abc_Frame_t * pAbc, int argc, char ** argv ) ***********************************************************************/ int Abc_CommandAbc9BMiter( Abc_Frame_t * pAbc, int argc, char ** argv ) { - extern Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose ); + extern Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, int biNum); Gia_Man_t * pTemp, * pSecond; char * FileName = NULL; FILE * pFile = NULL; int c, fVerbose = 0; + int bi = 0; Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "vh" ) ) != EOF ) + while ( ( c = Extra_UtilGetopt( argc, argv, "Ivh" ) ) != EOF ) { switch ( c ) { + case 'I': + if ( globalUtilOptind >= argc ) + { + Abc_Print( -1, "Command line switch \"-I\" should be followed by an integer.\n" ); + goto usage; + } + bi = atoi(argv[globalUtilOptind++]); + break; case 'v': fVerbose ^= 1; break; @@ -51737,14 +51750,15 @@ int Abc_CommandAbc9BMiter( Abc_Frame_t * pAbc, int argc, char ** argv ) Abc_Print( -1, "Abc_CommandAbc9BMiter(): Cannot read the file name on the command line.\n" ); return 0; } - pTemp = Gia_ManBoundaryMiter( pAbc->pGia, pSecond, fVerbose ); + pTemp = Gia_ManBoundaryMiter( pAbc->pGia, pSecond, fVerbose, bi); Gia_ManStop( pSecond ); Abc_FrameUpdateGia( pAbc, pTemp ); return 0; usage: - Abc_Print( -2, "usage: &bmiter [-vh] \n" ); + Abc_Print( -2, "usage: &bmiter -I [-vh] \n" ); Abc_Print( -2, "\t creates the boundary miter\n" ); + Abc_Print( -2, "\t-I : number of boundary inputs\n" ); Abc_Print( -2, "\t-v : toggles printing verbose information [default = %s]\n", fVerbose? "yes": "no" ); Abc_Print( -2, "\t-h : print the command usage\n"); Abc_Print( -2, "\t : the implementation file\n"); diff --git a/src/base/abci/abcMiter.c b/src/base/abci/abcMiter.c index 6086fc6162..6077a20c25 100644 --- a/src/base/abci/abcMiter.c +++ b/src/base/abci/abcMiter.c @@ -789,6 +789,7 @@ Abc_Ntk_t * Abc_NtkFrames( Abc_Ntk_t * pNtk, int nFrames, int fInitial, int fVer pNtkFrames->pName = Extra_UtilStrsav(Buffer); // map the constant nodes Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkFrames); + // create new latches (or their initial values) and remember them in the new latches if ( !fInitial ) { diff --git a/src/proof/cec/cec.h b/src/proof/cec/cec.h index d11bca3c3a..ca4ac9abab 100644 --- a/src/proof/cec/cec.h +++ b/src/proof/cec/cec.h @@ -120,6 +120,7 @@ struct Cec_ParFra_t_ int fVeryVerbose; // verbose stats int fVerbose; // verbose stats int iOutFail; // the failed output + int fBMiterInfo; // printing BMiter information }; // combinational equivalence checking parameters diff --git a/src/proof/cec/cecSatG2.c b/src/proof/cec/cecSatG2.c index 1a6309ebe7..424369b8cd 100644 --- a/src/proof/cec/cecSatG2.c +++ b/src/proof/cec/cecSatG2.c @@ -222,6 +222,7 @@ void Cec4_ManSetParams( Cec_ParFra_t * pPars ) pPars->nSatVarMax = 1000; // the max number of SAT variables before recycling SAT solver pPars->nCallsRecycle = 500; // calls to perform before recycling SAT solver pPars->nGenIters = 100; // pattern generation iterations + pPars->fBMiterInfo = 0; // printing BMiter information } /**Function************************************************************* @@ -1891,39 +1892,41 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p } if ( Cec4_ManSweepNode(pMan, i, Gia_ObjId(p, pRepr)) && Gia_ObjProved(p, i) ) { - if ( Vec_IntEntry( vLitBmiter, pRepr->Value ) == 3 ) - { - switch ( Vec_IntEntry( vLitBmiter, pObj -> Value ) ) + if (pPars->fBMiterInfo){ + if ( Vec_IntEntry( vLitBmiter, pRepr->Value ) == 3 ) { - case 1: - case 4: - Vec_IntUpdateEntry( vLitBmiter, pRepr->Value, 4 ); - break; - case 2: - case 5: - Vec_IntUpdateEntry( vLitBmiter, pRepr->Value, 5 ); - break; - default: - break; - } - } - else - { - if ( Vec_IntEntry(vLitBmiter, pObj->Value ) == 3 ) - switch ( Vec_IntEntry( vLitBmiter, pRepr -> Value ) ) + switch ( Vec_IntEntry( vLitBmiter, pObj -> Value ) ) { case 1: case 4: - Vec_IntUpdateEntry( vLitBmiter, pObj->Value, 4 ); + Vec_IntUpdateEntry( vLitBmiter, pRepr->Value, 4 ); break; case 2: case 5: - Vec_IntUpdateEntry( vLitBmiter, pObj->Value, 5 ); + Vec_IntUpdateEntry( vLitBmiter, pRepr->Value, 5 ); break; default: break; - } + } + else + { + if ( Vec_IntEntry(vLitBmiter, pObj->Value ) == 3 ) + switch ( Vec_IntEntry( vLitBmiter, pRepr -> Value ) ) + { + case 1: + case 4: + Vec_IntUpdateEntry( vLitBmiter, pObj->Value, 4 ); + break; + case 2: + case 5: + Vec_IntUpdateEntry( vLitBmiter, pObj->Value, 5 ); + break; + default: + break; + + } + } } pObj->Value = Abc_LitNotCond( pRepr->Value, pObj->fPhase ^ pRepr->fPhase ); } @@ -1979,22 +1982,24 @@ Gia_Man_t * Cec4_ManSimulateTest( Gia_Man_t * p, Cec_ParFra_t * pPars ) Cec4_ManPerformSweeping( p, pPars, &pNew, 0 ); // TODO - int e, i, c1=0, c2=0, c3=0, c4=0, c5=0; - Vec_IntForEachEntry( vLitBmiter, e, i ) - { - if ( i%2 ) continue; - switch (e) + if (pPars -> fBMiterInfo){ + int e, i, c1=0, c2=0, c3=0, c4=0, c5=0; + Vec_IntForEachEntry( vLitBmiter, e, i ) { - case 1: c1++; break; - case 2: c2++; break; - case 3: c3++; break; - case 4: c4++; break; - case 5: c5++; break; - default: - break; + if ( i%2 ) continue; + switch (e) + { + case 1: c1++; break; + case 2: c2++; break; + case 3: c3++; break; + case 4: c4++; break; + case 5: c5++; break; + default: + break; + } } + printf("category %d %d %d %d %d\n", c1, c2, c3+c4+c5, c4, c5); } - printf("category %d %d %d %d %d\n", c1, c2, c3+c4+c5, c4, c5); return pNew; } void Cec4_ManSimulateTest2( Gia_Man_t * p, int nConfs, int fVerbose ) From a31684734192df82d5a135e2e0d263e83dfdf54e Mon Sep 17 00:00:00 2001 From: Allen Ho Date: Thu, 23 Nov 2023 19:33:05 +0800 Subject: [PATCH 05/33] correct fanout count --- src/aig/gia/giaDup.c | 36 +++++++++++++++++-------- src/proof/cec/cecSatG2.c | 57 +++++++++++++++++++++++++++++++++------- 2 files changed, 73 insertions(+), 20 deletions(-) diff --git a/src/aig/gia/giaDup.c b/src/aig/gia/giaDup.c index 24c1d3b0ed..9d9b56a1c8 100644 --- a/src/aig/gia/giaDup.c +++ b/src/aig/gia/giaDup.c @@ -5703,8 +5703,9 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, pObj->Value = Gia_ManCi(p2, i)->Value = Gia_ManAppendCi( pNew ); // TODO: record the corresponding impl node of each lit - vLitBmiter = Vec_IntAlloc( Gia_ManObjNum(p2) ); - Vec_IntFill( vLitBmiter, Gia_ManObjNum(p2) + Gia_ManObjNum(p1), 0 ); + vLitBmiter = Vec_IntAlloc( (Gia_ManObjNum(p2) + Gia_ManObjNum(p1)) * 2 ); + Vec_IntFill( vLitBmiter, (Gia_ManObjNum(p2) + Gia_ManObjNum(p1)) * 2, 0 ); + printf( "allocated size: %d\n", Vec_IntSize(vLitBmiter) ); Gia_ManForEachAnd( p2, pObj, i ) { @@ -5776,7 +5777,7 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, Gia_ManStaticFanoutStop( p1 ); - printf( "category %d %d %d\n", c1, c2, Gia_ManObjNum(p1) ); + printf( "spec: fanin: %d / fanout: %d / total %d\n", c1, c2, Gia_ManObjNum(p1) ); // TODO: record hashed equivalent nodes @@ -5798,17 +5799,30 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, Vec_IntPush( vLits, pObj->Value ); } - // int e; - // Vec_IntForEachEntry( vLitBmiter, e, i ) - // { - // printf( "%d ", e ); - // } - // printf("\n"); + + int e, c3=0, c4=0, c5=0; + c1 = 0; c2 = 0; + + Vec_IntForEachEntry( vLitBmiter, e, i ) + { + if ( i%2 ) continue; + switch (e) + { + case 1: c1++; break; + case 2: c2++; break; + case 3: c3++; break; + case 4: c4++; break; + case 5: c5++; break; + default: + break; + } + } + printf("(strash) impl: eq_fanin: %d / eq_fanout: %d / total: %d\n", c4, c5, c3+c4+c5); Gia_ManForEachCo( p2, pObj, i ) Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ); - //Gia_ManForEachCo( p1, pObj, i ) - // Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ); + Gia_ManForEachCo( p1, pObj, i ) + Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ); Vec_IntForEachEntry( vLits, iLit, i ) Gia_ManAppendCo( pNew, iLit ); Vec_IntFree( vLits ); diff --git a/src/proof/cec/cecSatG2.c b/src/proof/cec/cecSatG2.c index 424369b8cd..4a39e95d35 100644 --- a/src/proof/cec/cecSatG2.c +++ b/src/proof/cec/cecSatG2.c @@ -1882,8 +1882,46 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p if ( pRepr == NULL ) continue; } + int lit_obj = Gia_ObjId( p, pObj ) << 1; + int lit_repr = Gia_ObjId( p, pRepr ) << 1; + if ( Abc_Lit2Var(pObj->Value) == Abc_Lit2Var(pRepr->Value) ) { + // printf( "*node %d (%d) merged into node %d (%d)\n", lit_obj >> 1, Vec_IntEntry( vLitBmiter, lit_obj ), lit_repr >> 1, Vec_IntEntry( vLitBmiter, lit_repr) ); + if ( Vec_IntEntry( vLitBmiter, lit_repr ) == 3 ) + { + switch ( Vec_IntEntry( vLitBmiter, lit_obj ) ) + { + case 1: + case 4: + Vec_IntUpdateEntry( vLitBmiter, lit_repr, 4 ); + break; + case 2: + case 5: + Vec_IntUpdateEntry( vLitBmiter, lit_repr, 5 ); + break; + default: + break; + } + } + else + { + if ( Vec_IntEntry(vLitBmiter, lit_obj ) == 3 ) + switch ( Vec_IntEntry( vLitBmiter, lit_repr ) ) + { + case 1: + case 4: + Vec_IntUpdateEntry( vLitBmiter, lit_obj, 4 ); + break; + case 2: + case 5: + Vec_IntUpdateEntry( vLitBmiter, lit_obj, 5 ); + break; + default: + break; + + } + } assert( (pObj->Value ^ pRepr->Value) == (pObj->fPhase ^ pRepr->fPhase) ); Gia_ObjSetProved( p, i ); if ( Gia_ObjId(p, pRepr) == 0 ) @@ -1893,17 +1931,18 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p if ( Cec4_ManSweepNode(pMan, i, Gia_ObjId(p, pRepr)) && Gia_ObjProved(p, i) ) { if (pPars->fBMiterInfo){ - if ( Vec_IntEntry( vLitBmiter, pRepr->Value ) == 3 ) + // printf( "node %d (%d) merged into node %d (%d)\n", lit_obj, Vec_IntEntry( vLitBmiter, lit_obj ), lit_repr, Vec_IntEntry( vLitBmiter, lit_repr ) ); + if ( Vec_IntEntry( vLitBmiter, lit_repr ) == 3 ) { - switch ( Vec_IntEntry( vLitBmiter, pObj -> Value ) ) + switch ( Vec_IntEntry( vLitBmiter, lit_obj ) ) { case 1: case 4: - Vec_IntUpdateEntry( vLitBmiter, pRepr->Value, 4 ); + Vec_IntUpdateEntry( vLitBmiter, lit_repr, 4 ); break; case 2: case 5: - Vec_IntUpdateEntry( vLitBmiter, pRepr->Value, 5 ); + Vec_IntUpdateEntry( vLitBmiter, lit_repr, 5 ); break; default: break; @@ -1911,16 +1950,16 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p } else { - if ( Vec_IntEntry(vLitBmiter, pObj->Value ) == 3 ) - switch ( Vec_IntEntry( vLitBmiter, pRepr -> Value ) ) + if ( Vec_IntEntry(vLitBmiter, lit_obj ) == 3 ) + switch ( Vec_IntEntry( vLitBmiter, lit_repr ) ) { case 1: case 4: - Vec_IntUpdateEntry( vLitBmiter, pObj->Value, 4 ); + Vec_IntUpdateEntry( vLitBmiter, lit_obj, 4 ); break; case 2: case 5: - Vec_IntUpdateEntry( vLitBmiter, pObj->Value, 5 ); + Vec_IntUpdateEntry( vLitBmiter, lit_obj, 5 ); break; default: break; @@ -1998,7 +2037,7 @@ Gia_Man_t * Cec4_ManSimulateTest( Gia_Man_t * p, Cec_ParFra_t * pPars ) break; } } - printf("category %d %d %d %d %d\n", c1, c2, c3+c4+c5, c4, c5); + printf("(fraig) impl: eq_fanin: %d / eq_fanout: %d / total: %d\n", c4, c5, c3+c4+c5); } return pNew; } From 9bb5333f6210a49d7e0895139ef30386585b2594 Mon Sep 17 00:00:00 2001 From: Allen Ho Date: Thu, 7 Dec 2023 19:07:52 +0800 Subject: [PATCH 06/33] extend bo --- abc.rc | 148 --------------------------------------- src/aig/gia/giaDup.c | 19 +++++ src/base/abci/abc.c | 14 +++- src/proof/cec/cec.h | 1 + src/proof/cec/cecSatG2.c | 126 +++++++++++++++++++++++++++------ 5 files changed, 136 insertions(+), 172 deletions(-) delete mode 100644 abc.rc diff --git a/abc.rc b/abc.rc deleted file mode 100644 index a3efc0b09a..0000000000 --- a/abc.rc +++ /dev/null @@ -1,148 +0,0 @@ -# global parameters -set check # checks intermediate networks -#set checkfio # prints warnings when fanins/fanouts are duplicated -#unset checkread # does not check new networks after reading from file -#set backup # saves backup networks retrived by "undo" and "recall" -#set savesteps 1 # sets the maximum number of backup networks to save -#set progressbar # display the progress bar - -# program names for internal calls -set dotwin dot.exe -set dotunix dot -set gsviewwin gsview32.exe -set gsviewunix gv -set siswin sis.exe -set sisunix sis -set mvsiswin mvsis.exe -set mvsisunix mvsis -set capowin MetaPl-Capo10.1-Win32.exe -set capounix MetaPl-Capo10.1 -set gnuplotwin wgnuplot.exe -set gnuplotunix gnuplot - -# Niklas Een's commands -#load_plugin C:\_projects\abc\lib\bip_win.exe "BIP" - -# standard aliases -alias hi history -alias b balance -alias cg clockgate -alias cl cleanup -alias clp collapse -alias cs care_set -alias el eliminate -alias esd ext_seq_dcs -alias f fraig -alias fs fraig_sweep -alias fsto fraig_store -alias fres fraig_restore -alias fr fretime -alias ft fraig_trust -alias ic indcut -alias lp lutpack -alias pcon print_cone -alias pd print_dsd -alias pex print_exdc -d -alias pf print_factor -alias pfan print_fanio -alias pg print_gates -alias pl print_level -alias plat print_latch -alias pio print_io -alias pk print_kmap -alias pm print_miter -alias ps print_stats -alias psb print_stats -b -alias psu print_supp -alias psy print_symm -alias pun print_unate -alias q quit -alias r read -alias ra read_aiger -alias r3 retime -M 3 -alias r3f retime -M 3 -f -alias r3b retime -M 3 -b -alias ren renode -alias rh read_hie -alias ri read_init -alias rl read_blif -alias rb read_bench -alias ret retime -alias dret dretime -alias rp read_pla -alias rt read_truth -alias rv read_verilog -alias rvl read_verlib -alias rsup read_super mcnc5_old.super -alias rlib read_library -alias rlibc read_library cadence.genlib -alias rty read_liberty -alias rlut read_lut -alias rw rewrite -alias rwz rewrite -z -alias rf refactor -alias rfz refactor -z -alias re restructure -alias rez restructure -z -alias rs resub -alias rsz resub -z -alias sa set autoexec ps -alias scl scleanup -alias sif if -s -alias so source -x -alias st strash -alias sw sweep -alias ssw ssweep -alias tr0 trace_start -alias tr1 trace_check -alias trt "r c.blif; st; tr0; b; tr1" -alias u undo -alias w write -alias wa write_aiger -alias wb write_bench -alias wc write_cnf -alias wh write_hie -alias wl write_blif -alias wp write_pla -alias wv write_verilog - -# standard scripts -alias resyn "b; rw; rwz; b; rwz; b" -alias resyn2 "b; rw; rf; b; rw; rwz; b; rfz; rwz; b" -alias resyn2a "b; rw; b; rw; rwz; b; rwz; b" -alias resyn3 "b; rs; rs -K 6; b; rsz; rsz -K 6; b; rsz -K 5; b" -alias compress "b -l; rw -l; rwz -l; b -l; rwz -l; b -l" -alias compress2 "b -l; rw -l; rf -l; b -l; rw -l; rwz -l; b -l; rfz -l; rwz -l; b -l" -alias choice "fraig_store; resyn; fraig_store; resyn2; fraig_store; fraig_restore" -alias choice2 "fraig_store; balance; fraig_store; resyn; fraig_store; resyn2; fraig_store; resyn2; fraig_store; fraig_restore" -alias rwsat "st; rw -l; b -l; rw -l; rf -l" -alias drwsat2 "st; drw; b -l; drw; drf; ifraig -C 20; drw; b -l; drw; drf" -alias share "st; multi -m; sop; fx; resyn2" -alias addinit "read_init; undc; strash; zero" -alias blif2aig "undc; strash; zero" -alias v2p "&vta_gla; &ps; &gla_derive; &put; w 1.aig; pdr -v" -alias g2p "&ps; &gla_derive; &put; w 2.aig; pdr -v" -alias &sw_ "&put; sweep; st; &get" -alias &fx_ "&put; sweep; sop; fx; st; &get" -alias &dc3 "&b; &jf -K 6; &b; &jf -K 4; &b" -alias &dc4 "&b; &jf -K 7; &fx; &b; &jf -K 5; &fx; &b" - -# resubstitution scripts for the IWLS paper -alias src_rw "st; rw -l; rwz -l; rwz -l" -alias src_rs "st; rs -K 6 -N 2 -l; rs -K 9 -N 2 -l; rs -K 12 -N 2 -l" -alias src_rws "st; rw -l; rs -K 6 -N 2 -l; rwz -l; rs -K 9 -N 2 -l; rwz -l; rs -K 12 -N 2 -l" -alias resyn2rs "b; rs -K 6; rw; rs -K 6 -N 2; rf; rs -K 8; b; rs -K 8 -N 2; rw; rs -K 10; rwz; rs -K 10 -N 2; b; rs -K 12; rfz; rs -K 12 -N 2; rwz; b" -alias r2rs "b; rs -K 6; rw; rs -K 6 -N 2; rf; rs -K 8; b; rs -K 8 -N 2; rw; rs -K 10; rwz; rs -K 10 -N 2; b; rs -K 12; rfz; rs -K 12 -N 2; rwz; b" -alias compress2rs "b -l; rs -K 6 -l; rw -l; rs -K 6 -N 2 -l; rf -l; rs -K 8 -l; b -l; rs -K 8 -N 2 -l; rw -l; rs -K 10 -l; rwz -l; rs -K 10 -N 2 -l; b -l; rs -K 12 -l; rfz -l; rs -K 12 -N 2 -l; rwz -l; b -l" -alias c2rs "b -l; rs -K 6 -l; rw -l; rs -K 6 -N 2 -l; rf -l; rs -K 8 -l; b -l; rs -K 8 -N 2 -l; rw -l; rs -K 10 -l; rwz -l; rs -K 10 -N 2 -l; b -l; rs -K 12 -l; rfz -l; rs -K 12 -N 2 -l; rwz -l; b -l" - -# use this script to convert 1-valued and DC-valued flops for an AIG -alias fix_aig "logic; undc; strash; zero" - -# use this script to convert 1-valued and DC-valued flops for a logic network coming from BLIF -alias fix_blif "undc; strash; zero" - -# lazy man's synthesis -alias recadd3 "st; rec_add3; b; rec_add3; dc2; rec_add3; if -K 8; bidec; st; rec_add3; dc2; rec_add3; if -g -K 6; st; rec_add3" - - diff --git a/src/aig/gia/giaDup.c b/src/aig/gia/giaDup.c index 9d9b56a1c8..ffd776cc4e 100644 --- a/src/aig/gia/giaDup.c +++ b/src/aig/gia/giaDup.c @@ -31,6 +31,8 @@ ABC_NAMESPACE_IMPL_START //////////////////////////////////////////////////////////////////////// Vec_Int_t* vLitBmiter; +Vec_Int_t* vIdBI; +Vec_Int_t* vIdBO; //////////////////////////////////////////////////////////////////////// /// FUNCTION DEFINITIONS /// @@ -5728,6 +5730,11 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, int c1 = 0; int c2 = 0; int count; + int val; + + vIdBI = Vec_IntAlloc(16); + vIdBO = Vec_IntAlloc(16); + Gia_ManForEachBuf( p1, pObj, i ) { if ( count < n ) @@ -5782,6 +5789,7 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, // TODO: record hashed equivalent nodes + count = 0; Gia_ManForEachAnd( p1, pObj, i ) { pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); if ( Vec_IntEntry( vTypeSpec, Gia_ObjId( p1, pObj) ) > 0 ) @@ -5796,7 +5804,18 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, } } if ( Gia_ObjIsBuf(pObj) ) + { Vec_IntPush( vLits, pObj->Value ); + if ( count < n ) + { + Vec_IntPush( vIdBI, (pObj->Value) >> 1 ); + } + else + { + Vec_IntPush( vIdBO, (pObj->Value) >> 1 ); + } + count ++; + } } diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c index dab809c254..755aeaea09 100644 --- a/src/base/abci/abc.c +++ b/src/base/abci/abc.c @@ -37921,7 +37921,7 @@ int Abc_CommandAbc9Fraig( Abc_Frame_t * pAbc, int argc, char ** argv ) int fCbs = 1, approxLim = 600, subBatchSz = 1, adaRecycle = 500, nMaxNodes = 0; Cec4_ManSetParams( pPars ); Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "JWRILDCNPMrmdckngxysopwqvh" ) ) != EOF ) + while ( ( c = Extra_UtilGetopt( argc, argv, "OJWRILDCNPMrmdckngxysopwqvh" ) ) != EOF ) { switch ( c ) { @@ -37969,6 +37969,18 @@ int Abc_CommandAbc9Fraig( Abc_Frame_t * pAbc, int argc, char ** argv ) if ( pPars->nItersMax < 0 ) goto usage; break; + case 'O': + if ( globalUtilOptind >= argc ) + { + Abc_Print( -1, "Command line switch \"-O\" should be followed by an integer.\n" ); + goto usage; + } + pPars->nPO = atoi(argv[globalUtilOptind]); + globalUtilOptind++; + if ( pPars->nPO < 1 ) + goto usage; + break; + case 'L': if ( globalUtilOptind >= argc ) { diff --git a/src/proof/cec/cec.h b/src/proof/cec/cec.h index ca4ac9abab..c9aa966581 100644 --- a/src/proof/cec/cec.h +++ b/src/proof/cec/cec.h @@ -121,6 +121,7 @@ struct Cec_ParFra_t_ int fVerbose; // verbose stats int iOutFail; // the failed output int fBMiterInfo; // printing BMiter information + int nPO; // number of po in original design given a bmiter }; // combinational equivalence checking parameters diff --git a/src/proof/cec/cecSatG2.c b/src/proof/cec/cecSatG2.c index 4a39e95d35..a01cc74458 100644 --- a/src/proof/cec/cecSatG2.c +++ b/src/proof/cec/cecSatG2.c @@ -145,6 +145,9 @@ static inline void Cec4_ObjCleanSatId( Gia_Man_t * p, Gia_Obj_t * pObj ) extern Vec_Int_t* vLitBmiter; +extern Vec_Int_t* vIdBI; +extern Vec_Int_t* vIdBO; + //////////////////////////////////////////////////////////////////////// /// FUNCTION DEFINITIONS /// @@ -1887,40 +1890,45 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p if ( Abc_Lit2Var(pObj->Value) == Abc_Lit2Var(pRepr->Value) ) { - // printf( "*node %d (%d) merged into node %d (%d)\n", lit_obj >> 1, Vec_IntEntry( vLitBmiter, lit_obj ), lit_repr >> 1, Vec_IntEntry( vLitBmiter, lit_repr) ); - if ( Vec_IntEntry( vLitBmiter, lit_repr ) == 3 ) + printf( "*node %d (%d) merged into node %d (%d)\n", lit_obj >> 1, Vec_IntEntry( vLitBmiter, lit_obj ), lit_repr >> 1, Vec_IntEntry( vLitBmiter, lit_repr) ); + if ( pPars->fBMiterInfo ) { - switch ( Vec_IntEntry( vLitBmiter, lit_obj ) ) + if ( Vec_IntEntry( vLitBmiter, lit_repr ) == 3 ) { - case 1: - case 4: - Vec_IntUpdateEntry( vLitBmiter, lit_repr, 4 ); - break; - case 2: - case 5: - Vec_IntUpdateEntry( vLitBmiter, lit_repr, 5 ); - break; - default: - break; - } - } - else - { - if ( Vec_IntEntry(vLitBmiter, lit_obj ) == 3 ) - switch ( Vec_IntEntry( vLitBmiter, lit_repr ) ) + switch ( Vec_IntEntry( vLitBmiter, lit_obj ) ) { case 1: case 4: - Vec_IntUpdateEntry( vLitBmiter, lit_obj, 4 ); + Vec_IntUpdateEntry( vLitBmiter, lit_repr, 4 ); break; case 2: case 5: - Vec_IntUpdateEntry( vLitBmiter, lit_obj, 5 ); + Vec_IntUpdateEntry( vLitBmiter, lit_repr, 5 ); break; default: break; - } + } + else + { + if ( Vec_IntEntry(vLitBmiter, lit_obj ) == 3 ) + switch ( Vec_IntEntry( vLitBmiter, lit_repr ) ) + { + case 1: + case 4: + Vec_IntUpdateEntry( vLitBmiter, lit_obj, 4 ); + break; + case 2: + case 5: + Vec_IntUpdateEntry( vLitBmiter, lit_obj, 5 ); + break; + default: + break; + + } + } + // TODO + Vec_IntSetEntry( vLitBmiter, lit_obj, Vec_IntEntry( vLitBmiter, lit_repr) ); } assert( (pObj->Value ^ pRepr->Value) == (pObj->fPhase ^ pRepr->fPhase) ); Gia_ObjSetProved( p, i ); @@ -1931,7 +1939,7 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p if ( Cec4_ManSweepNode(pMan, i, Gia_ObjId(p, pRepr)) && Gia_ObjProved(p, i) ) { if (pPars->fBMiterInfo){ - // printf( "node %d (%d) merged into node %d (%d)\n", lit_obj, Vec_IntEntry( vLitBmiter, lit_obj ), lit_repr, Vec_IntEntry( vLitBmiter, lit_repr ) ); + printf( "node %d (%d) merged into node %d (%d)\n", lit_obj >> 1, Vec_IntEntry( vLitBmiter, lit_obj ), lit_repr >> 1, Vec_IntEntry( vLitBmiter, lit_repr ) ); if ( Vec_IntEntry( vLitBmiter, lit_repr ) == 3 ) { switch ( Vec_IntEntry( vLitBmiter, lit_obj ) ) @@ -1966,10 +1974,82 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p } } + // TODO + Vec_IntSetEntry( vLitBmiter, lit_obj, Vec_IntEntry( vLitBmiter, lit_repr) ); } pObj->Value = Abc_LitNotCond( pRepr->Value, pObj->fPhase ^ pRepr->fPhase ); } } + + + if ( pPars->fBMiterInfo ) + { + + // check bi, bo + Vec_Ptr_t* vBO = Vec_PtrAlloc( 16 ); + Vec_Ptr_t * vQ = Vec_PtrAlloc(16); + + int val; + printf("BI:"); + Vec_IntForEachEntry( vIdBI, val, i ) + { + printf( " %d (%d)", val, Vec_IntEntry( vLitBmiter, val << 1) ); + } + printf("\nBO:"); + Vec_IntForEachEntry( vIdBO, val, i ) + { + printf( " %d (%d)", val, Vec_IntEntry( vLitBmiter, val << 1) ); + if ( Vec_IntEntry( vLitBmiter, val << 1) != 5 ) + { + Vec_PtrPush(vQ, &((p->pObjs)[val]) ); + } + } + printf("\n"); + + // find bound + + Gia_ManStaticFanoutStart( p ); + + Vec_Int_t* vFlag = Vec_IntAlloc( p->nObjs ); + Vec_IntFill( vFlag, p->nObjs, 0 ); + Gia_Obj_t * pObj2; + int cnt_node = 0; + int cnt_newBo = 0; + + while ( Vec_PtrSize(vQ) != 0 ) + { + pObj2 = Vec_PtrPop(vQ); + if ( Vec_IntEntry( vFlag, Gia_ObjId(p, pObj2) ) != 0 ) continue; + cnt_node ++; + Vec_IntSetEntry( vFlag, Gia_ObjId(p, pObj2), 1 ); + + val = Vec_IntEntry(vLitBmiter, Gia_ObjId(p, pObj2) << 1); + if ( val == 5 || Gia_ObjIsCo( pObj2 ) ) // boundary found + { + cnt_newBo ++; + Vec_PtrPush( vBO, pObj2 ); + continue; + } + + for( int j = 0; j < Gia_ObjFanoutNum(p, pObj2); j++ ) + { + Vec_PtrPush( vQ, Gia_ObjFanout(p, pObj2, j) ); + printf( "add fanout\n"); + } + } + + Gia_ManStaticFanoutStop(p); + + + printf("extended BO with %d extra nodes:", cnt_node); + Vec_PtrForEachEntry( Gia_Obj_t*, vBO, pObj, i ) + { + printf( " %d", Gia_ObjId(p, pObj) ); + } + printf("\n"); + } + + if ( p->iPatsPi > 0 ) { abctime clk2 = Abc_Clock(); From 284b9d6a9c01c7df0636a696fc35a47d10f10f0a Mon Sep 17 00:00:00 2001 From: Allen Ho Date: Sun, 10 Dec 2023 21:30:46 +0800 Subject: [PATCH 07/33] extended box report; --- src/aig/gia/giaDup.c | 68 ++++++++++++++---- src/base/abci/abc.c | 14 +--- src/proof/cec/cecSatG2.c | 150 +++++++++++++++++++++++++++------------ 3 files changed, 160 insertions(+), 72 deletions(-) diff --git a/src/aig/gia/giaDup.c b/src/aig/gia/giaDup.c index ffd776cc4e..aa8f1c0530 100644 --- a/src/aig/gia/giaDup.c +++ b/src/aig/gia/giaDup.c @@ -30,7 +30,7 @@ ABC_NAMESPACE_IMPL_START /// DECLARATIONS /// //////////////////////////////////////////////////////////////////////// -Vec_Int_t* vLitBmiter; +Vec_Int_t* vMarkBmiter; Vec_Int_t* vIdBI; Vec_Int_t* vIdBO; @@ -5701,18 +5701,24 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, Gia_ManHashStart( pNew ); Gia_ManConst0(p1)->Value = 0; Gia_ManConst0(p2)->Value = 0; + + // allocate vMarkBmiter + vMarkBmiter = Vec_IntAlloc( (Gia_ManObjNum(p2) + Gia_ManObjNum(p1)) ); + Vec_IntFill( vMarkBmiter, (Gia_ManObjNum(p2) + Gia_ManObjNum(p1)), 0 ); + printf( "allocated size: %d\n", Vec_IntSize(vMarkBmiter) ); + Gia_ManForEachCi( p1, pObj, i ) - pObj->Value = Gia_ManCi(p2, i)->Value = Gia_ManAppendCi( pNew ); + { + int id = pObj->Value = Gia_ManCi(p2, i)->Value = Gia_ManAppendCi( pNew ); + Vec_IntSetEntry( vMarkBmiter, id >> 1, 4 ); + } // TODO: record the corresponding impl node of each lit - vLitBmiter = Vec_IntAlloc( (Gia_ManObjNum(p2) + Gia_ManObjNum(p1)) * 2 ); - Vec_IntFill( vLitBmiter, (Gia_ManObjNum(p2) + Gia_ManObjNum(p1)) * 2, 0 ); - printf( "allocated size: %d\n", Vec_IntSize(vLitBmiter) ); Gia_ManForEachAnd( p2, pObj, i ) { pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); - Vec_IntUpdateEntry( vLitBmiter, pObj->Value, 3 ); + Vec_IntUpdateEntry( vMarkBmiter, pObj->Value >> 1, 3 ); } // TODO: find nodes in spec @@ -5726,11 +5732,11 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, Gia_ManStaticFanoutStart( p1 ); Vec_Ptr_t * vQ = Vec_PtrAlloc(16); + Vec_Ptr_t * vBO = Vec_PtrAlloc(16); Gia_Obj_t * pObj2; int c1 = 0; int c2 = 0; - int count; - int val; + int count = 0; vIdBI = Vec_IntAlloc(16); vIdBO = Vec_IntAlloc(16); @@ -5759,6 +5765,7 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, else { Vec_IntSetEntry( vTypeSpec, Gia_ObjId( p1, pObj ), 2 ); + Vec_PtrPush( vBO, pObj ); c2 ++; int j; @@ -5782,6 +5789,37 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, } } + Vec_Int_t* vFlag = Vec_IntAlloc( Gia_ManObjNum(p1) ); + Vec_IntFill( vFlag, Gia_ManObjNum(p1), 0 ); + int id; + int count_node = 0; + + // count nodes + Vec_PtrForEachEntry( Gia_Obj_t*, vBO, pObj, i ) + { + Vec_PtrPush( vQ, pObj ); + } + while( Vec_PtrSize(vQ) > 0 ) + { + pObj = Vec_PtrPop(vQ); + id = Gia_ObjId( p1, pObj ); + if ( Vec_IntEntry( vFlag, Gia_ObjId(p1, pObj) ) != 0 ) continue; + Vec_IntSetEntry( vFlag, Gia_ObjId(p1, pObj), 1 ); + count_node ++; + + if ( Vec_IntEntry( vTypeSpec, id ) == 1 ) + { + continue; + } + else + { + if ( Gia_ObjFaninNum(p1, pObj) > 0 ) Vec_PtrPush( vQ, Gia_ObjFanin0(pObj) ); + if ( Gia_ObjFaninNum(p1, pObj) > 1 ) Vec_PtrPush( vQ, Gia_ObjFanin1(pObj) ); + } + } + printf( "BI: %d, BO: %d, Box Size: %d\n", n, Gia_ManBufNum(p1)-n, count_node ); + + Gia_ManStaticFanoutStop( p1 ); printf( "spec: fanin: %d / fanout: %d / total %d\n", c1, c2, Gia_ManObjNum(p1) ); @@ -5794,13 +5832,13 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); if ( Vec_IntEntry( vTypeSpec, Gia_ObjId( p1, pObj) ) > 0 ) { - if ( Vec_IntGetEntry( vLitBmiter, pObj->Value ) == 3 ) // eq node in impl + if ( Vec_IntGetEntry( vMarkBmiter, pObj->Value >> 1 ) == 3 ) // eq node in impl { - Vec_IntUpdateEntry( vLitBmiter, pObj->Value, 3 + Vec_IntEntry( vTypeSpec, Gia_ObjId( p1, pObj) ) ); + Vec_IntUpdateEntry( vMarkBmiter, pObj->Value >> 1, 3 + Vec_IntEntry( vTypeSpec, Gia_ObjId( p1, pObj) ) ); } else { - Vec_IntUpdateEntry( vLitBmiter, pObj->Value, Vec_IntEntry( vTypeSpec, Gia_ObjId( p1, pObj) ) ); + Vec_IntUpdateEntry( vMarkBmiter, pObj->Value >> 1, Vec_IntEntry( vTypeSpec, Gia_ObjId( p1, pObj) ) ); } } if ( Gia_ObjIsBuf(pObj) ) @@ -5822,9 +5860,8 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, int e, c3=0, c4=0, c5=0; c1 = 0; c2 = 0; - Vec_IntForEachEntry( vLitBmiter, e, i ) + Vec_IntForEachEntry( vMarkBmiter, e, i ) { - if ( i%2 ) continue; switch (e) { case 1: c1++; break; @@ -5839,7 +5876,10 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, printf("(strash) impl: eq_fanin: %d / eq_fanout: %d / total: %d\n", c4, c5, c3+c4+c5); Gia_ManForEachCo( p2, pObj, i ) - Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ); + { + int id = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ) << 1; + Vec_IntSetEntry( vMarkBmiter, id, 5 ); + } Gia_ManForEachCo( p1, pObj, i ) Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ); Vec_IntForEachEntry( vLits, iLit, i ) diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c index 755aeaea09..dab809c254 100644 --- a/src/base/abci/abc.c +++ b/src/base/abci/abc.c @@ -37921,7 +37921,7 @@ int Abc_CommandAbc9Fraig( Abc_Frame_t * pAbc, int argc, char ** argv ) int fCbs = 1, approxLim = 600, subBatchSz = 1, adaRecycle = 500, nMaxNodes = 0; Cec4_ManSetParams( pPars ); Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "OJWRILDCNPMrmdckngxysopwqvh" ) ) != EOF ) + while ( ( c = Extra_UtilGetopt( argc, argv, "JWRILDCNPMrmdckngxysopwqvh" ) ) != EOF ) { switch ( c ) { @@ -37969,18 +37969,6 @@ int Abc_CommandAbc9Fraig( Abc_Frame_t * pAbc, int argc, char ** argv ) if ( pPars->nItersMax < 0 ) goto usage; break; - case 'O': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-O\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nPO = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nPO < 1 ) - goto usage; - break; - case 'L': if ( globalUtilOptind >= argc ) { diff --git a/src/proof/cec/cecSatG2.c b/src/proof/cec/cecSatG2.c index a01cc74458..7377367e21 100644 --- a/src/proof/cec/cecSatG2.c +++ b/src/proof/cec/cecSatG2.c @@ -144,7 +144,7 @@ static inline int Cec4_ObjSetSatId( Gia_Man_t * p, Gia_Obj_t * pObj, int Num static inline void Cec4_ObjCleanSatId( Gia_Man_t * p, Gia_Obj_t * pObj ) { assert(Cec4_ObjSatId(p, pObj) != -1); Gia_ObjSetCopy2Array(p, Gia_ObjId(p, pObj), -1); } -extern Vec_Int_t* vLitBmiter; +extern Vec_Int_t* vMarkBmiter; extern Vec_Int_t* vIdBI; extern Vec_Int_t* vIdBO; @@ -1885,25 +1885,25 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p if ( pRepr == NULL ) continue; } - int lit_obj = Gia_ObjId( p, pObj ) << 1; - int lit_repr = Gia_ObjId( p, pRepr ) << 1; + int id_obj = Gia_ObjId( p, pObj ); + int id_repr = Gia_ObjId( p, pRepr ); if ( Abc_Lit2Var(pObj->Value) == Abc_Lit2Var(pRepr->Value) ) { - printf( "*node %d (%d) merged into node %d (%d)\n", lit_obj >> 1, Vec_IntEntry( vLitBmiter, lit_obj ), lit_repr >> 1, Vec_IntEntry( vLitBmiter, lit_repr) ); + // printf( "*node %d (%d) merged into node %d (%d)\n", id_obj, Vec_IntEntry( vMarkBmiter, id_obj ), id_repr, Vec_IntEntry( vMarkBmiter, id_repr) ); if ( pPars->fBMiterInfo ) { - if ( Vec_IntEntry( vLitBmiter, lit_repr ) == 3 ) + if ( Vec_IntEntry( vMarkBmiter, id_repr ) == 3 ) { - switch ( Vec_IntEntry( vLitBmiter, lit_obj ) ) + switch ( Vec_IntEntry( vMarkBmiter, id_obj ) ) { case 1: case 4: - Vec_IntUpdateEntry( vLitBmiter, lit_repr, 4 ); + Vec_IntUpdateEntry( vMarkBmiter, id_repr, 4 ); break; case 2: case 5: - Vec_IntUpdateEntry( vLitBmiter, lit_repr, 5 ); + Vec_IntUpdateEntry( vMarkBmiter, id_repr, 5 ); break; default: break; @@ -1911,16 +1911,16 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p } else { - if ( Vec_IntEntry(vLitBmiter, lit_obj ) == 3 ) - switch ( Vec_IntEntry( vLitBmiter, lit_repr ) ) + if ( Vec_IntEntry(vMarkBmiter, id_obj ) == 3 ) + switch ( Vec_IntEntry( vMarkBmiter, id_repr ) ) { case 1: case 4: - Vec_IntUpdateEntry( vLitBmiter, lit_obj, 4 ); + Vec_IntUpdateEntry( vMarkBmiter, id_obj, 4 ); break; case 2: case 5: - Vec_IntUpdateEntry( vLitBmiter, lit_obj, 5 ); + Vec_IntUpdateEntry( vMarkBmiter, id_obj, 5 ); break; default: break; @@ -1928,7 +1928,7 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p } } // TODO - Vec_IntSetEntry( vLitBmiter, lit_obj, Vec_IntEntry( vLitBmiter, lit_repr) ); + Vec_IntSetEntry( vMarkBmiter, id_obj, Vec_IntEntry( vMarkBmiter, id_repr) ); } assert( (pObj->Value ^ pRepr->Value) == (pObj->fPhase ^ pRepr->fPhase) ); Gia_ObjSetProved( p, i ); @@ -1939,18 +1939,18 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p if ( Cec4_ManSweepNode(pMan, i, Gia_ObjId(p, pRepr)) && Gia_ObjProved(p, i) ) { if (pPars->fBMiterInfo){ - printf( "node %d (%d) merged into node %d (%d)\n", lit_obj >> 1, Vec_IntEntry( vLitBmiter, lit_obj ), lit_repr >> 1, Vec_IntEntry( vLitBmiter, lit_repr ) ); - if ( Vec_IntEntry( vLitBmiter, lit_repr ) == 3 ) + // printf( "node %d (%d) merged into node %d (%d)\n", id_obj, Vec_IntEntry( vMarkBmiter, id_obj ), id_repr, Vec_IntEntry( vMarkBmiter, id_repr ) ); + if ( Vec_IntEntry( vMarkBmiter, id_repr ) == 3 ) { - switch ( Vec_IntEntry( vLitBmiter, lit_obj ) ) + switch ( Vec_IntEntry( vMarkBmiter, id_obj ) ) { case 1: case 4: - Vec_IntUpdateEntry( vLitBmiter, lit_repr, 4 ); + Vec_IntUpdateEntry( vMarkBmiter, id_repr, 4 ); break; case 2: case 5: - Vec_IntUpdateEntry( vLitBmiter, lit_repr, 5 ); + Vec_IntUpdateEntry( vMarkBmiter, id_repr, 5 ); break; default: break; @@ -1958,16 +1958,16 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p } else { - if ( Vec_IntEntry(vLitBmiter, lit_obj ) == 3 ) - switch ( Vec_IntEntry( vLitBmiter, lit_repr ) ) + if ( Vec_IntEntry(vMarkBmiter, id_obj ) == 3 ) + switch ( Vec_IntEntry( vMarkBmiter, id_repr ) ) { case 1: case 4: - Vec_IntUpdateEntry( vLitBmiter, lit_obj, 4 ); + Vec_IntUpdateEntry( vMarkBmiter, id_obj, 4 ); break; case 2: case 5: - Vec_IntUpdateEntry( vLitBmiter, lit_obj, 5 ); + Vec_IntUpdateEntry( vMarkBmiter, id_obj, 5 ); break; default: break; @@ -1975,7 +1975,7 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p } } // TODO - Vec_IntSetEntry( vLitBmiter, lit_obj, Vec_IntEntry( vLitBmiter, lit_repr) ); + Vec_IntSetEntry( vMarkBmiter, id_obj, Vec_IntEntry( vMarkBmiter, id_repr) ); } pObj->Value = Abc_LitNotCond( pRepr->Value, pObj->fPhase ^ pRepr->fPhase ); } @@ -1986,67 +1986,128 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p { // check bi, bo - Vec_Ptr_t* vBO = Vec_PtrAlloc( 16 ); - Vec_Ptr_t * vQ = Vec_PtrAlloc(16); - + Vec_Ptr_t* vAO = Vec_PtrAlloc( 16 ); // additioal output boundary + Vec_Ptr_t* vAI = Vec_PtrAlloc( 16 ); // additional input boundary + Vec_Ptr_t* vMI = Vec_PtrAlloc(16); // missing input boundary + Vec_Ptr_t* vMO = Vec_PtrAlloc(16); // missing input boundary + Vec_Ptr_t* vQ = Vec_PtrAlloc(16); // queue for fanout traversal int val; + int cnt_TO = 0; + int cnt_TI = 0; + int cnt_SIDE = 0; + int cnt_MI = 0; + int cnt_MO = 0; + Vec_Int_t* vFlag = Vec_IntAlloc( p->nObjs ); + Vec_IntFill( vFlag, p->nObjs, 0 ); + printf("BI:"); Vec_IntForEachEntry( vIdBI, val, i ) { - printf( " %d (%d)", val, Vec_IntEntry( vLitBmiter, val << 1) ); + printf( " %d (%d)", val, Vec_IntEntry( vMarkBmiter, val) ); + if ( Vec_IntEntry( vMarkBmiter, val) <= 3 ) + { + Vec_PtrPush(vMI, &((p->pObjs)[val]) ); + } + else cnt_MI ++; } printf("\nBO:"); Vec_IntForEachEntry( vIdBO, val, i ) { - printf( " %d (%d)", val, Vec_IntEntry( vLitBmiter, val << 1) ); - if ( Vec_IntEntry( vLitBmiter, val << 1) != 5 ) + printf( " %d (%d)", val, Vec_IntEntry( vMarkBmiter, val) ); + if ( Vec_IntEntry( vMarkBmiter, val) <= 3 ) { Vec_PtrPush(vQ, &((p->pObjs)[val]) ); + Vec_PtrPush(vMO, &((p->pObjs)[val]) ); + Vec_IntSetEntry( vFlag, val, 2 ); } + else cnt_MO ++; } printf("\n"); - // find bound + // find extended output boundary Gia_ManStaticFanoutStart( p ); - Vec_Int_t* vFlag = Vec_IntAlloc( p->nObjs ); - Vec_IntFill( vFlag, p->nObjs, 0 ); Gia_Obj_t * pObj2; - int cnt_node = 0; - int cnt_newBo = 0; + cnt_TO -= Vec_PtrSize(vQ); while ( Vec_PtrSize(vQ) != 0 ) { pObj2 = Vec_PtrPop(vQ); - if ( Vec_IntEntry( vFlag, Gia_ObjId(p, pObj2) ) != 0 ) continue; - cnt_node ++; + if ( Vec_IntEntry( vFlag, Gia_ObjId(p, pObj2) ) == 1 ) continue; Vec_IntSetEntry( vFlag, Gia_ObjId(p, pObj2), 1 ); + cnt_TO ++; - val = Vec_IntEntry(vLitBmiter, Gia_ObjId(p, pObj2) << 1); + val = Vec_IntEntry(vMarkBmiter, Gia_ObjId(p, pObj2)); if ( val == 5 || Gia_ObjIsCo( pObj2 ) ) // boundary found { - cnt_newBo ++; - Vec_PtrPush( vBO, pObj2 ); + Vec_PtrPush( vAO, pObj2 ); continue; } for( int j = 0; j < Gia_ObjFanoutNum(p, pObj2); j++ ) { Vec_PtrPush( vQ, Gia_ObjFanout(p, pObj2, j) ); - printf( "add fanout\n"); } } Gia_ManStaticFanoutStop(p); - printf("extended BO with %d extra nodes:", cnt_node); - Vec_PtrForEachEntry( Gia_Obj_t*, vBO, pObj, i ) + // find extneded input boundary + + Vec_PtrForEachEntry( Gia_Obj_t*, vMO, pObj, i ) + { + Vec_IntSetEntry( vFlag, Gia_ObjId(p, pObj), 2 ); + } + + int id; + Vec_PtrForEachEntry( Gia_Obj_t*, vMI, pObj, i ) Vec_PtrPush( vQ, pObj ); + Vec_PtrForEachEntry( Gia_Obj_t*, vAO, pObj, i ) Vec_PtrPush( vQ, pObj ); + cnt_TI -= Vec_PtrSize(vQ); + while ( Vec_PtrSize(vQ) > 0 ) + { + pObj = Vec_PtrPop(vQ); + id = Gia_ObjId( p, pObj ); + if ( Vec_IntEntry( vFlag, id ) == 2 ) continue; + printf( "backtrace to node %d\n", id ); + if ( Vec_IntEntry(vMarkBmiter, id ) != 2 ) cnt_TI ++; + Vec_IntSetEntry( vFlag, id, 2 ); + + + if ( Vec_IntEntry( vMarkBmiter, id ) >= 3 || Gia_ObjIsCi( pObj ) ) // matched + { + if ( Vec_IntEntry( vMarkBmiter, id ) < 5 || Gia_ObjIsCi( pObj ) ) + { + Vec_PtrPush( vAI, pObj ); + } + continue; + } + else + { + if ( Gia_ObjFaninNum(p, pObj) > 0 ) Vec_PtrPush( vQ, Gia_ObjFanin0(pObj) ); + if ( Gia_ObjFaninNum(p, pObj) > 1 ) Vec_PtrPush( vQ, Gia_ObjFanin1(pObj) ); + } + } + + + // print result + printf("extended BO with %d extra nodes:", cnt_TO); + Vec_PtrForEachEntry( Gia_Obj_t*, vAO, pObj, i ) { printf( " %d", Gia_ObjId(p, pObj) ); } printf("\n"); + + printf("extended BI with %d extra nodes:", cnt_TI); + Vec_PtrForEachEntry( Gia_Obj_t*, vAI, pObj, i ) + { + printf( " %d", Gia_ObjId(p, pObj) ); + } + printf("\n"); + + printf("matched BI: %d / matched BO: %d / AI: %d / AO: %d / Extra nodes: %d\n", cnt_MI, cnt_MO, Vec_PtrSize(vAI), Vec_PtrSize(vAO), cnt_TO + cnt_TI ); + } @@ -2094,7 +2155,7 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p Gia_ManRemoveWrongChoices( p ); return p->pCexSeq ? 0 : 1; } -extern Vec_Int_t * vLitBmiter; +extern Vec_Int_t * vMarkBmiter; Gia_Man_t * Cec4_ManSimulateTest( Gia_Man_t * p, Cec_ParFra_t * pPars ) { Gia_Man_t * pNew = NULL; @@ -2103,9 +2164,8 @@ Gia_Man_t * Cec4_ManSimulateTest( Gia_Man_t * p, Cec_ParFra_t * pPars ) // TODO if (pPars -> fBMiterInfo){ int e, i, c1=0, c2=0, c3=0, c4=0, c5=0; - Vec_IntForEachEntry( vLitBmiter, e, i ) + Vec_IntForEachEntry( vMarkBmiter, e, i ) { - if ( i%2 ) continue; switch (e) { case 1: c1++; break; From c74144c6eb75095bfd280022f1e7a3ddca28f7f3 Mon Sep 17 00:00:00 2001 From: Allen Ho Date: Thu, 1 Feb 2024 07:25:46 +0800 Subject: [PATCH 08/33] str_eco ver1 --- src/aig/gia/giaDup.c | 728 ++++++++++++++++++++++++++++++--------- src/base/abci/abc.c | 107 ++++++ src/proof/cec/cecSatG2.c | 295 +++++----------- 3 files changed, 766 insertions(+), 364 deletions(-) diff --git a/src/aig/gia/giaDup.c b/src/aig/gia/giaDup.c index aa8f1c0530..37b3e8e3b8 100644 --- a/src/aig/gia/giaDup.c +++ b/src/aig/gia/giaDup.c @@ -30,9 +30,12 @@ ABC_NAMESPACE_IMPL_START /// DECLARATIONS /// //////////////////////////////////////////////////////////////////////// -Vec_Int_t* vMarkBmiter; -Vec_Int_t* vIdBI; -Vec_Int_t* vIdBO; +Vec_Ptr_t* vBmiter2Spec; +Vec_Ptr_t* vBmiter2Impl; +Vec_Int_t* vPatch2Impl; +Vec_Bit_t* vImpl2Spec_phase; +Vec_Int_t* vBI_patch; +Vec_Int_t* vBO_patch; //////////////////////////////////////////////////////////////////////// /// FUNCTION DEFINITIONS /// @@ -5702,186 +5705,55 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, Gia_ManConst0(p1)->Value = 0; Gia_ManConst0(p2)->Value = 0; - // allocate vMarkBmiter - vMarkBmiter = Vec_IntAlloc( (Gia_ManObjNum(p2) + Gia_ManObjNum(p1)) ); - Vec_IntFill( vMarkBmiter, (Gia_ManObjNum(p2) + Gia_ManObjNum(p1)), 0 ); - printf( "allocated size: %d\n", Vec_IntSize(vMarkBmiter) ); + // allocate vImpl2Spec_phase; + vImpl2Spec_phase = Vec_BitAlloc( Gia_ManObjNum(p2) ); + Vec_BitFill( vImpl2Spec_phase, Gia_ManObjNum(p2), 0 ); - Gia_ManForEachCi( p1, pObj, i ) + // allocate vBmiter2Impl and vBmiter2Spec + Vec_Int_t* pVec_Int; + vBmiter2Impl = Vec_PtrAlloc( (Gia_ManObjNum(p2) + Gia_ManObjNum(p1)) ); + Vec_PtrFill( vBmiter2Impl, (Gia_ManObjNum(p2) + Gia_ManObjNum(p1)), 0 ); + Vec_PtrForEachEntry( Vec_Int_t*, vBmiter2Impl, pVec_Int, i) { - int id = pObj->Value = Gia_ManCi(p2, i)->Value = Gia_ManAppendCi( pNew ); - Vec_IntSetEntry( vMarkBmiter, id >> 1, 4 ); + Vec_PtrSetEntry(vBmiter2Impl, i, Vec_IntAlloc(2) ); } - - // TODO: record the corresponding impl node of each lit - - Gia_ManForEachAnd( p2, pObj, i ) + vBmiter2Spec = Vec_PtrAlloc( (Gia_ManObjNum(p2) + Gia_ManObjNum(p1)) ); + Vec_PtrFill( vBmiter2Spec, (Gia_ManObjNum(p2) + Gia_ManObjNum(p1)), 0 ); + Vec_PtrForEachEntry( Vec_Int_t*, vBmiter2Spec, pVec_Int, i) { - pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); - Vec_IntUpdateEntry( vMarkBmiter, pObj->Value >> 1, 3 ); + Vec_PtrSetEntry(vBmiter2Spec, i, Vec_IntAlloc(2) ); } - // TODO: find nodes in spec - - Vec_Int_t * vTypeSpec = Vec_IntAlloc( 16 ); - Vec_IntFill( vTypeSpec, Gia_ManObjNum(p1), 0 ); - int n = Gia_ManBufNum(p1) / 2; - if(biNum > 0){ - n = biNum; - } - - Gia_ManStaticFanoutStart( p1 ); - Vec_Ptr_t * vQ = Vec_PtrAlloc(16); - Vec_Ptr_t * vBO = Vec_PtrAlloc(16); - Gia_Obj_t * pObj2; - int c1 = 0; - int c2 = 0; - int count = 0; - - vIdBI = Vec_IntAlloc(16); - vIdBO = Vec_IntAlloc(16); - - Gia_ManForEachBuf( p1, pObj, i ) + Gia_ManForEachCi( p1, pObj, i ) { - if ( count < n ) - { - Vec_IntSetEntry( vTypeSpec, Gia_ObjId( p1, pObj ), 1 ); - c1++; - count ++; - - Vec_PtrPush( vQ, Gia_ObjFanin0(pObj) ); - Vec_PtrPush( vQ, Gia_ObjFanin1(pObj) ); - while ( Vec_PtrSize(vQ) != 0 ) - { - pObj2 = Vec_PtrPop(vQ); - if ( Vec_IntEntry( vTypeSpec, Gia_ObjId(p1, pObj2) ) != 0 ) continue; - c1 ++; - Vec_IntSetEntry( vTypeSpec, Gia_ObjId(p1, pObj2), 1 ); - if ( Gia_ObjFaninNum(p1, pObj2) > 0 ) Vec_PtrPush( vQ, Gia_ObjFanin0(pObj2) ); - if ( Gia_ObjFaninNum(p1, pObj2) > 1 ) Vec_PtrPush( vQ, Gia_ObjFanin1(pObj2) ); - } - - } - else - { - Vec_IntSetEntry( vTypeSpec, Gia_ObjId( p1, pObj ), 2 ); - Vec_PtrPush( vBO, pObj ); - c2 ++; - - int j; - // pObj = Gia_ObjFanin0(pObj); - Gia_ObjForEachFanoutStatic(p1, pObj, pObj2, j) - { - Vec_PtrPush( vQ, pObj2 ); - } - while ( Vec_PtrSize(vQ) != 0 ) - { - pObj2 = Vec_PtrPop(vQ); - if ( Vec_IntEntry( vTypeSpec, Gia_ObjId(p1, pObj2) ) != 0 ) continue; - Vec_IntSetEntry( vTypeSpec, Gia_ObjId(p1, pObj2), 2 ); - c2 ++; - for( int j = 0; j < Gia_ObjFanoutNum(p1, pObj2); j++ ) - { - Vec_PtrPush( vQ, Gia_ObjFanout(p1, pObj2, j) ); - } - } - - } + pObj->Value = Gia_ManCi(p2, i)->Value = Gia_ManAppendCi( pNew ); + Vec_IntPush( Vec_PtrEntry(vBmiter2Spec, pObj->Value >> 1), Gia_ObjId(p1, pObj) ); + Vec_IntPush( Vec_PtrEntry(vBmiter2Impl, pObj->Value >> 1), Gia_ObjId(p1, pObj) ); // same pi id in impl and spec } - Vec_Int_t* vFlag = Vec_IntAlloc( Gia_ManObjNum(p1) ); - Vec_IntFill( vFlag, Gia_ManObjNum(p1), 0 ); - int id; - int count_node = 0; - - // count nodes - Vec_PtrForEachEntry( Gia_Obj_t*, vBO, pObj, i ) - { - Vec_PtrPush( vQ, pObj ); - } - while( Vec_PtrSize(vQ) > 0 ) + // TODO: record the corresponding impl node of each lit + Gia_ManForEachAnd( p2, pObj, i ) { - pObj = Vec_PtrPop(vQ); - id = Gia_ObjId( p1, pObj ); - if ( Vec_IntEntry( vFlag, Gia_ObjId(p1, pObj) ) != 0 ) continue; - Vec_IntSetEntry( vFlag, Gia_ObjId(p1, pObj), 1 ); - count_node ++; - - if ( Vec_IntEntry( vTypeSpec, id ) == 1 ) - { - continue; - } - else - { - if ( Gia_ObjFaninNum(p1, pObj) > 0 ) Vec_PtrPush( vQ, Gia_ObjFanin0(pObj) ); - if ( Gia_ObjFaninNum(p1, pObj) > 1 ) Vec_PtrPush( vQ, Gia_ObjFanin1(pObj) ); - } + pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); + Vec_IntPush( Vec_PtrEntry(vBmiter2Impl, pObj->Value >> 1), Gia_ObjId(p2, pObj) ); } - printf( "BI: %d, BO: %d, Box Size: %d\n", n, Gia_ManBufNum(p1)-n, count_node ); - - - Gia_ManStaticFanoutStop( p1 ); - - printf( "spec: fanin: %d / fanout: %d / total %d\n", c1, c2, Gia_ManObjNum(p1) ); - // TODO: record hashed equivalent nodes - - count = 0; Gia_ManForEachAnd( p1, pObj, i ) { pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); - if ( Vec_IntEntry( vTypeSpec, Gia_ObjId( p1, pObj) ) > 0 ) - { - if ( Vec_IntGetEntry( vMarkBmiter, pObj->Value >> 1 ) == 3 ) // eq node in impl - { - Vec_IntUpdateEntry( vMarkBmiter, pObj->Value >> 1, 3 + Vec_IntEntry( vTypeSpec, Gia_ObjId( p1, pObj) ) ); - } - else - { - Vec_IntUpdateEntry( vMarkBmiter, pObj->Value >> 1, Vec_IntEntry( vTypeSpec, Gia_ObjId( p1, pObj) ) ); - } - } - if ( Gia_ObjIsBuf(pObj) ) - { - Vec_IntPush( vLits, pObj->Value ); - if ( count < n ) - { - Vec_IntPush( vIdBI, (pObj->Value) >> 1 ); - } - else - { - Vec_IntPush( vIdBO, (pObj->Value) >> 1 ); - } - count ++; - } - } - - - int e, c3=0, c4=0, c5=0; - c1 = 0; c2 = 0; - - Vec_IntForEachEntry( vMarkBmiter, e, i ) - { - switch (e) - { - case 1: c1++; break; - case 2: c2++; break; - case 3: c3++; break; - case 4: c4++; break; - case 5: c5++; break; - default: - break; - } + Vec_IntPush( Vec_PtrEntry(vBmiter2Spec, pObj->Value >> 1), Gia_ObjId(p1, pObj) ); } - printf("(strash) impl: eq_fanin: %d / eq_fanout: %d / total: %d\n", c4, c5, c3+c4+c5); Gia_ManForEachCo( p2, pObj, i ) { - int id = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ) << 1; - Vec_IntSetEntry( vMarkBmiter, id, 5 ); + int id = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ) >> 1; + Vec_IntPush( Vec_PtrEntry(vBmiter2Impl, id), Gia_ObjId(p2, pObj) ); } Gia_ManForEachCo( p1, pObj, i ) - Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ); + { + int id = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ) >> 1; + Vec_IntPush( Vec_PtrEntry(vBmiter2Spec, id), Gia_ObjId(p1, pObj) ); + } Vec_IntForEachEntry( vLits, iLit, i ) Gia_ManAppendCo( pNew, iLit ); Vec_IntFree( vLits ); @@ -6024,6 +5896,538 @@ Gia_Man_t * Gia_ManMiterFromBMiter( Gia_Man_t * p, int nPo ) return pNew; } +/**Function************************************************************* + + Synopsis [] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +Gia_Man_t * Gia_ManPatch( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, int biNum) +{ + Vec_Int_t * vLits; + Gia_Man_t * pNew, * pTemp; + Gia_Obj_t * pObj; + int i, iLit; + if ( Gia_ManBufNum(p1) == 0 ) { + printf( "The first AIG should have a boundary.\n" ); + return NULL; + } + if ( Gia_ManBufNum(p2) == 0 ) { + printf( "The second AIG should have a boundary.\n" ); + return NULL; + } + assert( Gia_ManBufNum(p1) > 0 ); + assert( Gia_ManBufNum(p2) > 0 ); + assert( Gia_ManBufNum(p1) == Gia_ManBufNum(p2) ); + assert( Gia_ManRegNum(p1) == 0 ); + assert( Gia_ManRegNum(p2) == 0 ); + assert( Gia_ManCiNum(p1) == Gia_ManCiNum(p2) ); + assert( Gia_ManCoNum(p1) == Gia_ManCoNum(p2) ); + if ( fVerbose ) + printf( "Mapping spec to patch with %d inputs, %d outputs, and %d buffers.\n", + Gia_ManCiNum(p1), Gia_ManCoNum(p1), Gia_ManBufNum(p1) ); + pNew = Gia_ManStart( Gia_ManObjNum(p2) ); + pNew->pName = ABC_ALLOC( char, strlen(p1->pName) + 10 ); + sprintf( pNew->pName, "%s_patch", p1->pName ); + Gia_ManHashStart( pNew ); + Gia_ManConst0(p1)->Value = 0; + Gia_ManConst0(p2)->Value = 0; + + // add patch aig first + // record lit -> patch id + Vec_Int_t* vVar2Patch = Vec_IntAlloc( Gia_ManObjNum(p2) ); + Vec_IntFill( vVar2Patch, Gia_ManObjNum(p2), -1 ); + + Gia_ManForEachCi( p2, pObj, i ) + { + pObj->Value = Gia_ManCi(p1, i)->Value = Gia_ManAppendCi( pNew ); + Vec_IntSetEntry( vVar2Patch, pObj->Value >> 1, Gia_ObjId( p2, pObj ) ); + } + Gia_ManForEachAnd( p2, pObj, i ) + { + pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); + printf( "\t%d: %d %d\n", Gia_ObjId( p2, pObj), Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); + Vec_IntSetEntry( vVar2Patch, pObj->Value >> 1, Gia_ObjId( p2, pObj ) ); + } + + + // alloc vCompl; + Vec_Bit_t * vComplBuf = Vec_BitAlloc(Gia_ManBufNum(p1)); + Vec_Bit_t * vCompl = Vec_BitAlloc(Gia_ManObjNum(p1)); + Vec_BitFill( vCompl, Gia_ManObjNum(p1), 0 ); + Gia_ManForEachBuf( p2, pObj, i ) + { + printf("\tbuf compl %d: %d\n", Gia_ObjId(p2, pObj), Gia_ObjFaninC0(pObj)); + Vec_BitPush( vComplBuf, Gia_ObjFaninC0(pObj) ); + } + int cnt = 0; + Gia_ManForEachBuf( p1, pObj, i ) + { + printf("\tbuf compl %d: %d\n", Gia_ObjId(p1, pObj), Gia_ObjFaninC0(pObj)); + if ( Vec_BitEntry( vComplBuf, cnt ) || Gia_ObjFaninC0(pObj) ) + { + Vec_BitSetEntry( vCompl, Gia_ObjId( p1, pObj ), 1 ); + printf("\tset\n"); + } + cnt++; + } + + + + // mark the box in spec + Vec_Int_t* vFlagSpec = Vec_IntAlloc( Gia_ManObjNum(p1) ); // 1: bi, 2: inside the box, 3: bo + Vec_IntFill( vFlagSpec, Gia_ManObjNum(p1), 0 ); + int cnt_buf = 0; + Gia_ManForEachBuf( p1, pObj, i ) + { + if ( cnt_buf < biNum ) + { + Vec_IntSetEntry( vFlagSpec, Gia_ObjId(p1, Gia_ObjFanin0(pObj) ), 1 ); + } + else + { + Vec_IntSetEntry( vFlagSpec, Gia_ObjId(p1, Gia_ObjFanin0(pObj) ), 3 ); + } + cnt_buf ++; + } + + int fanin0, fanin1; + Gia_ManForEachAnd( p1, pObj, i ) + { + if ( Vec_IntEntry( vFlagSpec, Gia_ObjId(p1, pObj) ) != 0 ) continue ; + fanin0 = Vec_IntEntry( vFlagSpec, Gia_ObjId(p1, Gia_ObjFanin0(pObj) ) ); + fanin1 = Vec_IntEntry( vFlagSpec, Gia_ObjId(p1, Gia_ObjFanin1(pObj) ) ); + if ( fanin0 == 1 || fanin0 == 2 || fanin1 == 1 || fanin1 == 2 ) + Vec_IntSetEntry( vFlagSpec, Gia_ObjId(p1, pObj ), 2 ); + } + + + // compute spec2impl + Vec_Int_t* vSpec2Impl = Vec_IntAlloc( Gia_ManObjNum(p1) ); + Vec_IntFill( vSpec2Impl, Gia_ManObjNum(p1), -1 ); + Vec_Int_t* vSpec, *vImpl; + int j, id; + for ( i = 0; i < Vec_PtrSize( vBmiter2Spec ); i++ ) + { + vSpec = Vec_PtrEntry( vBmiter2Spec, i ); + vImpl = Vec_PtrEntry( vBmiter2Impl, i ); + Vec_IntForEachEntry( vSpec, id, j ) + { + if ( Vec_IntEntry( vSpec2Impl, id ) == -1 && Vec_IntSize( vImpl ) > 0 ) + { + Vec_IntSetEntry( vSpec2Impl, id, Vec_IntEntry( vImpl, 0 ) ); + } + } + } + + // print + // printf("spec 2 impl:\n"); + // Vec_IntForEachEntry( vSpec2Impl, id, i ) + // { + // printf( "\t%d:\t %d\n", i, id ); + // } + + // alloc patch2impl + vPatch2Impl = Vec_IntAlloc( Gia_ManObjNum(p2) ); + Vec_IntFill( vPatch2Impl, Gia_ManObjNum(p2), -1 ); + Vec_IntSetEntry( vPatch2Impl, 0, 0 ); + + Gia_ManForEachCi( p2, pObj, i ) + { + Vec_IntSetEntry( vVar2Patch, pObj->Value >> 1, pObj->Value >> 1); + Vec_IntSetEntry( vPatch2Impl, pObj->Value>>1, Vec_IntEntry( vSpec2Impl, pObj->Value>>1) ); + } + + // set the litral on the boundary of spec as in patch and record patch2impl + Vec_Int_t* vBufLit = Vec_IntAlloc( Gia_ManBufNum( p2 ) ); + vBI_patch = Vec_IntAlloc( Gia_ManBufNum(p2) ); + vBO_patch = Vec_IntAlloc( Gia_ManBufNum(p2) ); + cnt_buf = 0; + Gia_ManForEachBuf( p2, pObj, i ) + { + // TODO: check compl + Vec_IntPush( vBufLit, Gia_ObjFanin0( pObj ) -> Value ); + if ( cnt_buf < biNum ) + { + Vec_IntPush( vBI_patch, Gia_ObjFanin0( pObj) -> Value >> 1 ); + } + else + { + Vec_IntPush( vBO_patch, Gia_ObjFanin0( pObj) -> Value >> 1 ); + } + cnt_buf++; + } + Vec_Int_t* vSpec2Patch = Vec_IntAlloc( Gia_ManObjNum(p1) ); + Vec_IntFill( vSpec2Patch, Gia_ManObjNum(p1), -1 ); + + cnt_buf = 0; + Gia_Obj_t * pObj2; + + Gia_ManForEachBuf( p1, pObj, i ) + { + // TODO: compl? + pObj2 = Gia_ObjFanin0(pObj); + pObj2 -> Value = Vec_IntEntry( vBufLit, cnt_buf ); + Vec_IntSetEntry( vSpec2Patch, Gia_ObjId( p1, pObj2 ), Vec_IntEntry( vVar2Patch, pObj2->Value>>1 ) ); + // printf( "spec node %d -> patch node %d\n", Gia_ObjId( p1, pObj2 ), Vec_IntEntry( vVar2Patch, pObj2->Value>>1 ) ); + + Vec_IntSetEntry( vPatch2Impl, pObj2 -> Value>>1, Vec_IntEntry( vSpec2Impl, Gia_ObjId(p1, pObj2) ) ); + pObj->Value = pObj2->Value; + cnt_buf++; + } + + + // hash the area outside the box in spec and record patch2impl + int lit0, lit1; + Gia_ManForEachAnd( p1, pObj, i ) { + printf( "spec node %d(%d) = %d %d\n", Gia_ObjId( p1, pObj ), Vec_IntEntry( vFlagSpec, Gia_ObjId(p1, pObj)), Gia_ObjId( p1, Gia_ObjFanin0(pObj) ), Gia_ObjId( p1, Gia_ObjFanin1(pObj) ) ); + if ( Vec_IntEntry( vFlagSpec, Gia_ObjId(p1, pObj) ) > 1 ) continue; + if ( Gia_ObjIsBuf(pObj) ) continue; + + lit0 = Gia_ObjFanin0Copy(pObj); + lit1 = Gia_ObjFanin1Copy(pObj); + if ( Vec_BitEntry( vCompl, Gia_ObjId(p1, Gia_ObjFanin0(pObj) ) ) ) lit0 ^= 1; + if ( Vec_BitEntry( vCompl, Gia_ObjId(p1, Gia_ObjFanin1(pObj) ) ) ) lit1 ^= 1; + pObj->Value = Gia_ManHashAnd( pNew, lit0, lit1 ); + + + assert( (pObj->Value>>1) < Vec_IntSize( vVar2Patch) ); + assert( Vec_IntEntry( vVar2Patch, pObj->Value>>1 ) != -1 ); + + Vec_IntSetEntry( vSpec2Patch, Gia_ObjId( p1, pObj ), Vec_IntEntry( vVar2Patch, pObj->Value>>1 ) ); + printf( "spec node %d -> patch node %d\n", Gia_ObjId( p1, pObj ), Vec_IntEntry( vVar2Patch, pObj->Value>>1 ) ); + + Vec_IntSetEntry( vPatch2Impl, pObj->Value >> 1, Vec_IntEntry( vSpec2Impl, Gia_ObjId(p1, pObj) ) ); + } + + + // print + printf("patch 2 impl:\n"); + Vec_IntForEachEntry( vPatch2Impl, id, i ) + { + printf( "\t%d:\t %d\n", i, id ); + } + + // handle co + Gia_ManForEachCo( p2, pObj, i ) + { + int id = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ) >> 1; + } + // TODO: also check spec CO + // Gia_ManForEachCo( p1, pObj, i ) + // { + // int id = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ) >> 1; + // Vec_IntPush( Vec_PtrEntry(vBmiter2Spec, id), Gia_ObjId(p1, pObj) ); + // } + + Gia_ManHashStop( pNew ); + pNew = Gia_ManCleanup( pTemp = pNew ); + Gia_ManStop( pTemp ); + return pNew; +} + + +/**Function************************************************************* + + Synopsis [] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ + +Gia_Man_t * Gia_ManPatchImpl( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, int biNum) +{ + Vec_Int_t * vLits; + Gia_Man_t * pNew, * pTemp; + Gia_Obj_t * pObj, *pObj2; + int i, j, iLit, id, id2; + assert( Gia_ManRegNum(p1) == 0 ); + assert( Gia_ManRegNum(p2) == 0 ); + assert( Gia_ManCiNum(p1) == Gia_ManCiNum(p2) ); + assert( Gia_ManCoNum(p1) == Gia_ManCoNum(p2) ); + if ( fVerbose ) + printf( "Mapping spec to patch with %d inputs, %d outputs, and %d buffers.\n", + Gia_ManCiNum(p1), Gia_ManCoNum(p1), Gia_ManBufNum(p1) ); + pNew = Gia_ManStart( Gia_ManObjNum(p2) ); + pNew->pName = ABC_ALLOC( char, strlen(p1->pName) + 10 ); + sprintf( pNew->pName, "%s_patch", p1->pName ); + Gia_ManHashStart( pNew ); + Gia_ManConst0(p1)->Value = 0; + Gia_ManConst0(p2)->Value = 0; + + + // p1: patch + // p2: impl + + // compute extended box + + Gia_ManStaticFanoutStart( p1 ); + Vec_Ptr_t* vBO = Vec_PtrAlloc(16); + Vec_Ptr_t* vBI = Vec_PtrAlloc(16); + Vec_Ptr_t* vAO = Vec_PtrAlloc(16); + Vec_Ptr_t* vAI = Vec_PtrAlloc(16); + + + + Vec_Ptr_t* vQ = Vec_PtrAlloc(16); + Vec_Int_t* vFlag = Vec_IntAlloc( Gia_ManObjNum(p1) ); + Vec_IntFill( vFlag, Gia_ManObjNum(p1), 0 ); + Vec_IntForEachEntry( vBO_patch, id, i ) + { + if ( Vec_IntEntry( vPatch2Impl, id ) == -1 ) // if no match on the boundary + Vec_PtrPush( vQ, p1->pObjs+id ); + else + Vec_PtrPush( vBO, p1->pObjs+id ); + } + + while( Vec_PtrSize(vQ) > 0 ) + { + pObj = Vec_PtrPop(vQ); + id = Gia_ObjId( p1, pObj ); + + if ( Vec_IntEntry( vFlag, id ) == 1 ) continue; + Vec_IntSetEntry( vFlag, id, 1 ); + + printf("%d\n", id); + + if ( Vec_IntEntry( vPatch2Impl, id ) != -1 ) // matched + { + Vec_PtrPush( vAO, pObj ); + } + else + { + for( j = 0; j < Gia_ObjFanoutNum(p1, pObj); j++ ) + { + Vec_PtrPush( vQ, Gia_ObjFanout(p1, pObj, j) ); + printf("\t%d\n", Gia_ObjId( p1, Gia_ObjFanout(p1, pObj, j) ) ); + } + + } + } + + // set flag 2 for FOC + Vec_IntForEachEntry( vBO_patch, id, i ) + { + Vec_PtrPush( vQ, p1->pObjs+id ); + } + while( Vec_PtrSize(vQ) > 0 ) + { + pObj = Vec_PtrPop(vQ); + id = Gia_ObjId( p1, pObj ); + + if ( Vec_IntEntry( vFlag, Gia_ObjId(p1, pObj) ) == 2 ) continue; + Vec_IntSetEntry( vFlag, Gia_ObjId(p1, pObj), 2 ); + + for( j = 0; j < Gia_ObjFanoutNum(p1, pObj); j++ ) + { + Vec_PtrPush( vQ, Gia_ObjFanout(p1, pObj, j) ); + } + } + + // set flag 3 for BO + Vec_IntForEachEntry( vBO_patch, id, i ) + { + Vec_IntSetEntry( vFlag, id, 3 ); + } + + // traverse down from unmated BI and AO + Vec_IntForEachEntry( vBI_patch, id, i ) + { + if ( Vec_IntEntry( vPatch2Impl, id ) == -1 ) // if no match on the boundary + Vec_PtrPush( vQ, p1->pObjs+id ); + else + Vec_PtrPush( vBI, p1->pObjs+id ); + } + Vec_PtrForEachEntry( Gia_Obj_t*, vAO, pObj, i ) + { + Vec_PtrPush( vQ, pObj ); + } + + // traverse down + printf("traverse down\n"); + while ( Vec_PtrSize(vQ) != 0 ) + { + pObj = Vec_PtrPop(vQ); + id = Gia_ObjId( p1, pObj ); + if ( Vec_IntEntry( vFlag, id ) == 4 ) continue; + + printf("%d\n", id); + + if ( Vec_IntEntry( vPatch2Impl, id ) != -1 && Vec_IntEntry( vFlag, id ) < 2 ) // matched + { + Vec_PtrPush( vAI, pObj ); + printf("matched\n"); + } + else if ( Vec_IntEntry( vFlag, id ) < 3 ) + { + if ( Gia_ObjFaninNum(p1, pObj) > 0 ) + { + Vec_PtrPush( vQ, Gia_ObjFanin0(pObj) ); + printf("\t%d\n", Gia_ObjId( p1, Gia_ObjFanin0(pObj) ) ); + } + + if ( Gia_ObjFaninNum(p1, pObj) > 1 ) + { + Vec_PtrPush( vQ, Gia_ObjFanin1(pObj) ); + printf("\t%d\n", Gia_ObjId( p1, Gia_ObjFanin1(pObj) ) ); + } + } + printf("2impl / flag: %d / %d\n", Vec_IntEntry( vPatch2Impl, id ), Vec_IntEntry( vFlag, id ) ); + + Vec_IntSetEntry( vFlag, id, 4 ); + } + + + // print + printf( "matched BI:"); + Vec_PtrForEachEntry( Gia_Obj_t*, vBI, pObj, i ) printf( " %d(%d)", Gia_ObjId( p1, pObj ), Vec_IntEntry( vPatch2Impl, Gia_ObjId(p1, pObj)) ); + printf("\nAI:"); + Vec_PtrForEachEntry( Gia_Obj_t*, vAI, pObj, i ) printf( " %d(%d)", Gia_ObjId( p1, pObj ), Vec_IntEntry( vPatch2Impl, Gia_ObjId(p1, pObj)) ); + printf("\nmateched BO:"); + Vec_PtrForEachEntry( Gia_Obj_t*, vBO, pObj, i ) printf( " %d(%d)", Gia_ObjId( p1, pObj ), Vec_IntEntry( vPatch2Impl, Gia_ObjId(p1, pObj)) ); + printf("\nAO:"); + Vec_PtrForEachEntry( Gia_Obj_t*, vAO, pObj, i ) printf( " %d(%d)", Gia_ObjId( p1, pObj ), Vec_IntEntry( vPatch2Impl, Gia_ObjId(p1, pObj)) ); + printf("\n"); + + // create patched impl + + // mark fanin cone of Extended Input in impl + Vec_Int_t* vFlag_impl = Vec_IntAlloc( Gia_ManObjNum(p2) ); + Vec_IntFill( vFlag_impl, Gia_ManObjNum(p2), 0 ); + + Vec_PtrForEachEntry( Gia_Obj_t*, vBI, pObj, i ) + { + Vec_PtrPush( vQ, p2->pObjs + Vec_IntEntry( vPatch2Impl, Gia_ObjId(p1, pObj) ) ); + } + Vec_PtrForEachEntry( Gia_Obj_t*, vAI, pObj, i ) + { + Vec_PtrPush( vQ, p2->pObjs + Vec_IntEntry( vPatch2Impl, Gia_ObjId(p1, pObj) ) ); + } + + while ( Vec_PtrSize(vQ) != 0 ) + { + pObj = Vec_PtrPop(vQ); + id = Gia_ObjId( p2, pObj ); + if ( Vec_IntEntry( vFlag_impl, id ) == 1 ) continue; + Vec_IntSetEntry( vFlag_impl, id, 1 ); + + if ( Gia_ObjFaninNum(p2, pObj) > 0 ) Vec_PtrPush( vQ, Gia_ObjFanin0(pObj) ); + if ( Gia_ObjFaninNum(p2, pObj) > 1 ) Vec_PtrPush( vQ, Gia_ObjFanin1(pObj) ); + } + + // add pi + Gia_ManForEachCi( p2, pObj, i ) + { + pObj->Value = Gia_ManCi(p1, i)->Value = Gia_ManAppendCi( pNew ); + } + // add fanin cone of EI in impl + int cnt = 0; + Gia_ManForEachAnd( p2, pObj, i ) + { + if ( Vec_IntEntry( vFlag_impl, Gia_ObjId(p2, pObj) ) == 0 ) continue; + pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); + printf( "%d\n", pObj->Value>>1 ); + cnt ++; + } + printf( "%d node added in the fanin cone of EI\n", cnt ); + // set literal and flag of EI in patch + // TODO: input phase + Vec_PtrForEachEntry( Gia_Obj_t*, vBI, pObj, i ) + { + id = Gia_ObjId( p1, pObj ); + pObj -> Value = ( p2 -> pObjs + Vec_IntEntry( vPatch2Impl, id ) ) -> Value; + Vec_IntSetEntry( vFlag, id, 5 ); + } + Vec_PtrForEachEntry( Gia_Obj_t*, vAI, pObj, i ) + { + id = Gia_ObjId( p1, pObj ); + pObj -> Value = ( p2 -> pObjs + Vec_IntEntry( vPatch2Impl, id ) ) -> Value; + Vec_IntSetEntry( vFlag, id, 5 ); + } + // mark fanin cone of EO in patch (to flag 5) + Vec_PtrForEachEntry( Gia_Obj_t*, vBO, pObj, i ) + Vec_PtrPush( vQ, pObj ); + Vec_PtrForEachEntry( Gia_Obj_t*, vAO, pObj, i ) + Vec_PtrPush( vQ, pObj ); + while ( Vec_PtrSize(vQ) != 0 ) + { + pObj = Vec_PtrPop(vQ); + id = Gia_ObjId( p1, pObj ); + if ( Vec_IntEntry( vFlag, id ) >= 5 ) continue; + Vec_IntSetEntry( vFlag, id, 6 ); + + if ( Gia_ObjFaninNum(p1, pObj) > 0 ) Vec_PtrPush( vQ, Gia_ObjFanin0(pObj) ); + if ( Gia_ObjFaninNum(p1, pObj) > 1 ) Vec_PtrPush( vQ, Gia_ObjFanin1(pObj) ); + } + // add fanin cone of EO to EI in patch + cnt = 0; + Gia_ManForEachAnd( p1, pObj, i ) + { + if ( Vec_IntEntry( vFlag, Gia_ObjId(p1, pObj) ) != 6 ) continue; + pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); + printf( "%d\n", pObj->Value>>1 ); + cnt ++; + } + printf( "%d node added in the extended boundary\n", cnt ); + + // set literal and flag(1) of EO in impl + Vec_PtrForEachEntry( Gia_Obj_t*, vBO, pObj, i ) + { + id = Gia_ObjId( p1, pObj ); + id2 = Vec_IntEntry( vPatch2Impl, id ); + pObj2 = p2 -> pObjs + id2; + pObj2 -> Value = pObj -> Value; + if ( Vec_BitEntry( vImpl2Spec_phase, id2 ) ) pObj2 -> Value ^= 1; + Vec_IntSetEntry( vFlag_impl, id2, 1 ); + } + Vec_PtrForEachEntry( Gia_Obj_t*, vAO, pObj, i ) + { + id = Gia_ObjId( p1, pObj ); + id2 = Vec_IntEntry( vPatch2Impl, id ); + pObj2 = p2 -> pObjs + id2; + pObj2 -> Value = pObj -> Value; + printf( "id %d matched to id %d in impl, phase %d\n", id, id2, Vec_BitEntry( vImpl2Spec_phase, id2 ) ); + if ( Vec_BitEntry( vImpl2Spec_phase, id2 ) ) pObj2 -> Value ^= 1; + Vec_IntSetEntry( vFlag_impl, id2, 1 ); + } + + // add flag 0 in impl + cnt = 0; + Gia_ManForEachAnd( p2, pObj, i ) + { + if ( Vec_IntEntry( vFlag_impl, Gia_ObjId(p2, pObj) ) != 0 ) continue; + pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); + printf( "%d\n", pObj->Value>>1 ); + cnt++; + } + printf( "%d node added in the fanout cone\n", cnt ); + + // handle co + cnt = 0; + Gia_ManForEachCo( p2, pObj, i ) + { + id = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ) >> 1; + printf( "%d\n", id ); + cnt ++; + } + + Gia_ManStaticFanoutStop( p1 ); + Gia_ManHashStop( pNew ); + pNew = Gia_ManCleanup( pTemp = pNew ); + Gia_ManStop( pTemp ); + return pNew; +} + + //////////////////////////////////////////////////////////////////////// /// END OF FILE /// //////////////////////////////////////////////////////////////////////// diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c index dab809c254..1a837d0305 100644 --- a/src/base/abci/abc.c +++ b/src/base/abci/abc.c @@ -598,6 +598,7 @@ static int Abc_CommandAbc9AddFlop ( Abc_Frame_t * pAbc, int argc, cha static int Abc_CommandAbc9BMiter ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandAbc9GenHie ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandAbc9RecoverBoundary ( Abc_Frame_t * pAbc, int argc, char ** argv ); +static int Abc_CommandAbc9StrEco ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandAbc9Test ( Abc_Frame_t * pAbc, int argc, char ** argv ); @@ -1378,6 +1379,7 @@ void Abc_Init( Abc_Frame_t * pAbc ) Cmd_CommandAdd( pAbc, "ABC9", "&bmiter", Abc_CommandAbc9BMiter, 0 ); Cmd_CommandAdd( pAbc, "ABC9", "&gen_hie", Abc_CommandAbc9GenHie, 0 ); Cmd_CommandAdd( pAbc, "ABC9", "&rb", Abc_CommandAbc9RecoverBoundary, 0 ); + Cmd_CommandAdd( pAbc, "ABC9", "&str_eco", Abc_CommandAbc9StrEco, 0 ); Cmd_CommandAdd( pAbc, "ABC9", "&test", Abc_CommandAbc9Test, 0 ); { @@ -51953,6 +51955,111 @@ int Abc_CommandAbc9RecoverBoundary( Abc_Frame_t * pAbc, int argc, char ** argv ) return 1; } +int Abc_CommandAbc9StrEco( Abc_Frame_t * pAbc, int argc, char ** argv ) +{ + extern Gia_Man_t * Gia_ManPatch( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, int biNum); + extern Gia_Man_t * Gia_ManPatchImpl( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, int biNum); + Gia_Man_t * pTemp, * pSecond, *pImpl, *pPatched; + char * FileName = NULL; + char * FileName2 = NULL; + FILE * pFile = NULL; + int c, fVerbose = 0; + int bi = 0; + Extra_UtilGetoptReset(); + while ( ( c = Extra_UtilGetopt( argc, argv, "Ivh" ) ) != EOF ) + { + switch ( c ) + { + case 'I': + if ( globalUtilOptind >= argc ) + { + Abc_Print( -1, "Command line switch \"-I\" should be followed by an integer.\n" ); + goto usage; + } + bi = atoi(argv[globalUtilOptind++]); + break; + case 'v': + fVerbose ^= 1; + break; + case 'h': + goto usage; + default: + goto usage; + } + } + if ( pAbc->pGia == NULL ) + { + Abc_Print( -1, "Abc_CommandAbc9StrEco(): There is no AIG.\n" ); + return 0; + } + if ( argc != globalUtilOptind + 2 ) + { + printf("%d\n", argc-globalUtilOptind); + Abc_Print( -1, "Abc_CommandAbc9StrEco(): AIG should be given on the command line.\n" ); + return 0; + } + + // get the input file name + FileName = argv[globalUtilOptind]; + if ( (pFile = fopen( FileName, "r" )) == NULL ) + { + Abc_Print( -1, "Cannot open input file \"%s\". ", FileName ); + if ( (FileName = Extra_FileGetSimilarName( FileName, ".aig", ".blif", ".pla", ".eqn", ".bench" )) ) + Abc_Print( 1, "Did you mean \"%s\"?", FileName ); + Abc_Print( 1, "\n" ); + return 1; + } + fclose( pFile ); + + // get the input file name 2 + FileName2 = argv[globalUtilOptind+1]; + if ( (pFile = fopen( FileName2, "r" )) == NULL ) + { + Abc_Print( -1, "Cannot open input file \"%s\". ", FileName2 ); + if ( (FileName2 = Extra_FileGetSimilarName( FileName2, ".aig", ".blif", ".pla", ".eqn", ".bench" )) ) + Abc_Print( 1, "Did you mean \"%s\"?", FileName2 ); + Abc_Print( 1, "\n" ); + return 1; + } + fclose( pFile ); + + // map spec to patch + pSecond = Gia_AigerRead( FileName, 0, 1, 0 ); + if ( pSecond == NULL ) + { + Abc_Print( -1, "Abc_CommandAbc9StrEco(): Cannot read the file name on the command line.\n" ); + return 0; + } + pTemp = Gia_ManPatch( pAbc->pGia, pSecond, fVerbose, bi); + // Gia_ManStop( pSecond ); + // Abc_FrameUpdateGia( pAbc, pTemp ); + // return 0; + + // generated patched impl + pImpl = Gia_AigerRead( FileName2, 0, 0, 0 ); + if ( pImpl == NULL ) + { + Abc_Print( -1, "Abc_CommandAbc9StrEco(): Cannot read the file name on the command line.\n" ); + return 0; + } + pPatched = Gia_ManPatchImpl( pTemp, pImpl, fVerbose, bi); + + Gia_ManStop( pSecond ); + Gia_ManStop( pImpl ); + Gia_ManStop( pTemp ); + Abc_FrameUpdateGia( pAbc, pPatched ); + return 0; + +usage: + Abc_Print( -2, "usage: &str_eco -I [-vh] \n" ); + Abc_Print( -2, "\t creates the boundary miter\n" ); + Abc_Print( -2, "\t-I : number of boundary inputs\n" ); + Abc_Print( -2, "\t-v : toggles printing verbose information [default = %s]\n", fVerbose? "yes": "no" ); + Abc_Print( -2, "\t-h : print the command usage\n"); + Abc_Print( -2, "\t : the implementation file\n"); + return 1; +} + /**Function************************************************************* Synopsis [] diff --git a/src/proof/cec/cecSatG2.c b/src/proof/cec/cecSatG2.c index 7377367e21..0659b3f60b 100644 --- a/src/proof/cec/cecSatG2.c +++ b/src/proof/cec/cecSatG2.c @@ -147,6 +147,8 @@ static inline void Cec4_ObjCleanSatId( Gia_Man_t * p, Gia_Obj_t * pObj ) extern Vec_Int_t* vMarkBmiter; extern Vec_Int_t* vIdBI; extern Vec_Int_t* vIdBO; +extern Vec_Ptr_t* vBmiter2Spec; +extern Vec_Ptr_t* vBmiter2Impl; //////////////////////////////////////////////////////////////////////// @@ -1788,6 +1790,8 @@ void Gia_ManRemoveWrongChoices( Gia_Man_t * p ) } //Abc_Print( 1, "Removed %d wrong choices.\n", Counter ); } + +extern Vec_Bit_t* vImpl2Spec_phase; int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** ppNew, int fSimOnly ) { Cec4_Man_t * pMan = Cec4_ManCreate( p, pPars ); @@ -1890,45 +1894,24 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p if ( Abc_Lit2Var(pObj->Value) == Abc_Lit2Var(pRepr->Value) ) { - // printf( "*node %d (%d) merged into node %d (%d)\n", id_obj, Vec_IntEntry( vMarkBmiter, id_obj ), id_repr, Vec_IntEntry( vMarkBmiter, id_repr) ); if ( pPars->fBMiterInfo ) { - if ( Vec_IntEntry( vMarkBmiter, id_repr ) == 3 ) + int eId, j; + Vec_Int_t *vIds_spec_repr, *vIds_impl_repr, *vIds_spec_obj, *vIds_impl_obj; + vIds_spec_repr = Vec_PtrEntry( vBmiter2Spec, id_repr ); + vIds_impl_repr = Vec_PtrEntry( vBmiter2Impl, id_repr ); + vIds_spec_obj = Vec_PtrEntry( vBmiter2Spec, id_obj ); + vIds_impl_obj = Vec_PtrEntry( vBmiter2Impl, id_obj ); + Vec_IntForEachEntry( vIds_spec_obj, eId, j) { - switch ( Vec_IntEntry( vMarkBmiter, id_obj ) ) - { - case 1: - case 4: - Vec_IntUpdateEntry( vMarkBmiter, id_repr, 4 ); - break; - case 2: - case 5: - Vec_IntUpdateEntry( vMarkBmiter, id_repr, 5 ); - break; - default: - break; - } + Vec_IntPush(vIds_spec_repr, eId); } - else + Vec_IntForEachEntry( vIds_impl_obj, eId, j) { - if ( Vec_IntEntry(vMarkBmiter, id_obj ) == 3 ) - switch ( Vec_IntEntry( vMarkBmiter, id_repr ) ) - { - case 1: - case 4: - Vec_IntUpdateEntry( vMarkBmiter, id_obj, 4 ); - break; - case 2: - case 5: - Vec_IntUpdateEntry( vMarkBmiter, id_obj, 5 ); - break; - default: - break; - - } + Vec_IntPush(vIds_impl_repr, eId); } - // TODO - Vec_IntSetEntry( vMarkBmiter, id_obj, Vec_IntEntry( vMarkBmiter, id_repr) ); + Vec_IntClear(vIds_spec_obj); + Vec_IntClear(vIds_impl_obj); } assert( (pObj->Value ^ pRepr->Value) == (pObj->fPhase ^ pRepr->fPhase) ); Gia_ObjSetProved( p, i ); @@ -1939,178 +1922,101 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p if ( Cec4_ManSweepNode(pMan, i, Gia_ObjId(p, pRepr)) && Gia_ObjProved(p, i) ) { if (pPars->fBMiterInfo){ - // printf( "node %d (%d) merged into node %d (%d)\n", id_obj, Vec_IntEntry( vMarkBmiter, id_obj ), id_repr, Vec_IntEntry( vMarkBmiter, id_repr ) ); - if ( Vec_IntEntry( vMarkBmiter, id_repr ) == 3 ) + + int eId, j; + Vec_Int_t *vIds_spec_repr, *vIds_impl_repr, *vIds_spec_obj, *vIds_impl_obj; + vIds_spec_repr = Vec_PtrEntry( vBmiter2Spec, id_repr ); + vIds_impl_repr = Vec_PtrEntry( vBmiter2Impl, id_repr ); + vIds_spec_obj = Vec_PtrEntry( vBmiter2Spec, id_obj ); + vIds_impl_obj = Vec_PtrEntry( vBmiter2Impl, id_obj ); + + Vec_IntForEachEntry( vIds_spec_obj, eId, j) { - switch ( Vec_IntEntry( vMarkBmiter, id_obj ) ) + Vec_IntPush(vIds_spec_repr, eId); + } + Vec_IntForEachEntry( vIds_impl_obj, eId, j) + { + Vec_IntPush(vIds_impl_repr, eId); + } + + // handle phase before cleaning + printf( "proven %d merged into %d (phase : %d)\n", Gia_ObjId(p, pObj), Gia_ObjId(p,pRepr), pObj->fPhase ^ pRepr -> fPhase ); + if ( Vec_IntSize(vIds_spec_repr) == 0 ) // no match + { + if ( pObj->fPhase ^ pRepr -> fPhase ) { - case 1: - case 4: - Vec_IntUpdateEntry( vMarkBmiter, id_repr, 4 ); - break; - case 2: - case 5: - Vec_IntUpdateEntry( vMarkBmiter, id_repr, 5 ); - break; - default: - break; + Vec_IntForEachEntry( vIds_impl_obj, eId, j ) + { + Vec_BitSetEntry( vImpl2Spec_phase, eId, !Vec_BitEntry(vImpl2Spec_phase, eId) ); + printf( "impl id %d's phase set to %d\n", eId, Vec_BitEntry(vImpl2Spec_phase, eId) ); + } } } - else + else if ( Vec_IntSize( vIds_spec_repr ) == Vec_IntSize( vIds_spec_obj) && Vec_IntSize( vIds_impl_obj ) == 0 ) // new match { - if ( Vec_IntEntry(vMarkBmiter, id_obj ) == 3 ) - switch ( Vec_IntEntry( vMarkBmiter, id_repr ) ) + if ( pObj->fPhase ^ pRepr -> fPhase ) + { + Vec_IntForEachEntry( vIds_impl_repr, eId, j ) { - case 1: - case 4: - Vec_IntUpdateEntry( vMarkBmiter, id_obj, 4 ); - break; - case 2: - case 5: - Vec_IntUpdateEntry( vMarkBmiter, id_obj, 5 ); - break; - default: - break; - + Vec_BitSetEntry( vImpl2Spec_phase, eId, !Vec_BitEntry(vImpl2Spec_phase, eId) ); + printf( "impl id %d's phase set to %d\n", eId, Vec_BitEntry(vImpl2Spec_phase, eId) ); + } + printf("new match flip\n"); + } + } + else if ( Vec_IntSize( vIds_spec_repr ) > 0 && Vec_IntSize( vIds_impl_obj ) > 0 ) // matched, merge impl + { + if ( ( pObj->fPhase ^ pRepr -> fPhase) ^ ( Vec_BitEntry( vImpl2Spec_phase, Vec_IntEntry(vIds_impl_repr, 0)) ^ Vec_BitEntry( vImpl2Spec_phase, Vec_IntEntry(vIds_impl_obj, 0)) ) ) + { + if ( Vec_IntSize( vIds_spec_repr ) == Vec_IntSize( vIds_spec_obj) ) // unmatched repr, matched obj, set repr bits + { + Vec_IntForEachEntry( vIds_impl_repr, eId, j ) + { + if ( j >= Vec_IntSize( vIds_impl_repr)-Vec_IntSize(vIds_impl_obj) ) break; + Vec_BitSetEntry( vImpl2Spec_phase, eId, !Vec_BitEntry(vImpl2Spec_phase, eId) ); + printf( "impl id %d's phase set to %d\n", eId, Vec_BitEntry(vImpl2Spec_phase, eId) ); + } + } + else // set obj bits + { + Vec_IntForEachEntry( vIds_impl_obj, eId, j ) + { + Vec_BitSetEntry( vImpl2Spec_phase, eId, !Vec_BitEntry(vImpl2Spec_phase, eId) ); + printf( "impl id %d's phase set to %d\n", eId, Vec_BitEntry(vImpl2Spec_phase, eId) ); + } } + } } - // TODO - Vec_IntSetEntry( vMarkBmiter, id_obj, Vec_IntEntry( vMarkBmiter, id_repr) ); + + Vec_IntClear(vIds_spec_obj); + Vec_IntClear(vIds_impl_obj); + } pObj->Value = Abc_LitNotCond( pRepr->Value, pObj->fPhase ^ pRepr->fPhase ); + + } } - if ( pPars->fBMiterInfo ) { - - // check bi, bo - Vec_Ptr_t* vAO = Vec_PtrAlloc( 16 ); // additioal output boundary - Vec_Ptr_t* vAI = Vec_PtrAlloc( 16 ); // additional input boundary - Vec_Ptr_t* vMI = Vec_PtrAlloc(16); // missing input boundary - Vec_Ptr_t* vMO = Vec_PtrAlloc(16); // missing input boundary - Vec_Ptr_t* vQ = Vec_PtrAlloc(16); // queue for fanout traversal - int val; - int cnt_TO = 0; - int cnt_TI = 0; - int cnt_SIDE = 0; - int cnt_MI = 0; - int cnt_MO = 0; - Vec_Int_t* vFlag = Vec_IntAlloc( p->nObjs ); - Vec_IntFill( vFlag, p->nObjs, 0 ); - - printf("BI:"); - Vec_IntForEachEntry( vIdBI, val, i ) + // print + Vec_Int_t* vIds_spec, *vIds_impl; + int k, id; + for( int j=0; j < Vec_PtrSize(vBmiter2Spec); j++ ) { - printf( " %d (%d)", val, Vec_IntEntry( vMarkBmiter, val) ); - if ( Vec_IntEntry( vMarkBmiter, val) <= 3 ) - { - Vec_PtrPush(vMI, &((p->pObjs)[val]) ); - } - else cnt_MI ++; - } - printf("\nBO:"); - Vec_IntForEachEntry( vIdBO, val, i ) - { - printf( " %d (%d)", val, Vec_IntEntry( vMarkBmiter, val) ); - if ( Vec_IntEntry( vMarkBmiter, val) <= 3 ) - { - Vec_PtrPush(vQ, &((p->pObjs)[val]) ); - Vec_PtrPush(vMO, &((p->pObjs)[val]) ); - Vec_IntSetEntry( vFlag, val, 2 ); - } - else cnt_MO ++; + printf("node %d: ", j); + vIds_spec = Vec_PtrEntry( vBmiter2Spec, j); + vIds_impl = Vec_PtrEntry( vBmiter2Impl, j); + Vec_IntForEachEntry(vIds_spec, id, k) + printf("%d ", id); + printf("| "); + Vec_IntForEachEntry(vIds_impl, id, k) + printf("%d ", id); + printf("\n"); } - printf("\n"); - - // find extended output boundary - - Gia_ManStaticFanoutStart( p ); - - Gia_Obj_t * pObj2; - cnt_TO -= Vec_PtrSize(vQ); - - while ( Vec_PtrSize(vQ) != 0 ) - { - pObj2 = Vec_PtrPop(vQ); - if ( Vec_IntEntry( vFlag, Gia_ObjId(p, pObj2) ) == 1 ) continue; - Vec_IntSetEntry( vFlag, Gia_ObjId(p, pObj2), 1 ); - cnt_TO ++; - - val = Vec_IntEntry(vMarkBmiter, Gia_ObjId(p, pObj2)); - if ( val == 5 || Gia_ObjIsCo( pObj2 ) ) // boundary found - { - Vec_PtrPush( vAO, pObj2 ); - continue; - } - - for( int j = 0; j < Gia_ObjFanoutNum(p, pObj2); j++ ) - { - Vec_PtrPush( vQ, Gia_ObjFanout(p, pObj2, j) ); - } - } - - Gia_ManStaticFanoutStop(p); - - - // find extneded input boundary - - Vec_PtrForEachEntry( Gia_Obj_t*, vMO, pObj, i ) - { - Vec_IntSetEntry( vFlag, Gia_ObjId(p, pObj), 2 ); - } - - int id; - Vec_PtrForEachEntry( Gia_Obj_t*, vMI, pObj, i ) Vec_PtrPush( vQ, pObj ); - Vec_PtrForEachEntry( Gia_Obj_t*, vAO, pObj, i ) Vec_PtrPush( vQ, pObj ); - cnt_TI -= Vec_PtrSize(vQ); - while ( Vec_PtrSize(vQ) > 0 ) - { - pObj = Vec_PtrPop(vQ); - id = Gia_ObjId( p, pObj ); - if ( Vec_IntEntry( vFlag, id ) == 2 ) continue; - printf( "backtrace to node %d\n", id ); - if ( Vec_IntEntry(vMarkBmiter, id ) != 2 ) cnt_TI ++; - Vec_IntSetEntry( vFlag, id, 2 ); - - - if ( Vec_IntEntry( vMarkBmiter, id ) >= 3 || Gia_ObjIsCi( pObj ) ) // matched - { - if ( Vec_IntEntry( vMarkBmiter, id ) < 5 || Gia_ObjIsCi( pObj ) ) - { - Vec_PtrPush( vAI, pObj ); - } - continue; - } - else - { - if ( Gia_ObjFaninNum(p, pObj) > 0 ) Vec_PtrPush( vQ, Gia_ObjFanin0(pObj) ); - if ( Gia_ObjFaninNum(p, pObj) > 1 ) Vec_PtrPush( vQ, Gia_ObjFanin1(pObj) ); - } - } - - - // print result - printf("extended BO with %d extra nodes:", cnt_TO); - Vec_PtrForEachEntry( Gia_Obj_t*, vAO, pObj, i ) - { - printf( " %d", Gia_ObjId(p, pObj) ); - } - printf("\n"); - - printf("extended BI with %d extra nodes:", cnt_TI); - Vec_PtrForEachEntry( Gia_Obj_t*, vAI, pObj, i ) - { - printf( " %d", Gia_ObjId(p, pObj) ); - } - printf("\n"); - - printf("matched BI: %d / matched BO: %d / AI: %d / AO: %d / Extra nodes: %d\n", cnt_MI, cnt_MO, Vec_PtrSize(vAI), Vec_PtrSize(vAO), cnt_TO + cnt_TI ); - } - if ( p->iPatsPi > 0 ) { abctime clk2 = Abc_Clock(); @@ -2155,7 +2061,6 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p Gia_ManRemoveWrongChoices( p ); return p->pCexSeq ? 0 : 1; } -extern Vec_Int_t * vMarkBmiter; Gia_Man_t * Cec4_ManSimulateTest( Gia_Man_t * p, Cec_ParFra_t * pPars ) { Gia_Man_t * pNew = NULL; @@ -2163,22 +2068,8 @@ Gia_Man_t * Cec4_ManSimulateTest( Gia_Man_t * p, Cec_ParFra_t * pPars ) // TODO if (pPars -> fBMiterInfo){ - int e, i, c1=0, c2=0, c3=0, c4=0, c5=0; - Vec_IntForEachEntry( vMarkBmiter, e, i ) - { - switch (e) - { - case 1: c1++; break; - case 2: c2++; break; - case 3: c3++; break; - case 4: c4++; break; - case 5: c5++; break; - default: - break; - } - } - printf("(fraig) impl: eq_fanin: %d / eq_fanout: %d / total: %d\n", c4, c5, c3+c4+c5); } + return pNew; } void Cec4_ManSimulateTest2( Gia_Man_t * p, int nConfs, int fVerbose ) From 62a22c757454a0bf40cccb07987fdd43aad26b40 Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Mon, 5 Feb 2024 19:26:36 -0800 Subject: [PATCH 09/33] Bug fix in blasting multipliers with different argument bit-width. --- src/base/wlc/wlcBlast.c | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) diff --git a/src/base/wlc/wlcBlast.c b/src/base/wlc/wlcBlast.c index 47d08da620..d3b2b3a051 100644 --- a/src/base/wlc/wlcBlast.c +++ b/src/base/wlc/wlcBlast.c @@ -1050,7 +1050,7 @@ void Wlc_BlastReduceMatrix2( Gia_Man_t * pNew, Vec_Wec_t * vProds, Vec_Int_t * v } -void Wlc_BlastMultiplier3( Gia_Man_t * pNew, int * pArgA, int * pArgB, int nArgA, int nArgB, Vec_Int_t * vRes, int fSigned, int fCla, Vec_Wec_t ** pvProds ) +void Wlc_BlastMultiplier3( Gia_Man_t * pNew, int * pArgA, int * pArgB, int nArgA, int nArgB, Vec_Int_t * vRes, int fSigned, int fCla, Vec_Wec_t ** pvProds, int fVerbose ) { Vec_Wec_t * vProds = Vec_WecStart( nArgA + nArgB ); Vec_Wec_t * vLevels = Vec_WecStart( nArgA + nArgB ); @@ -1064,13 +1064,17 @@ void Wlc_BlastMultiplier3( Gia_Man_t * pNew, int * pArgA, int * pArgB, int nArgA } if ( fSigned ) { - Vec_WecPush( vProds, nArgA, 1 ); - Vec_WecPush( vLevels, nArgA, 0 ); + Vec_WecPush( vProds, nArgB-1, 1 ); + Vec_WecPush( vLevels, nArgB-1, 0 ); + + Vec_WecPush( vProds, nArgA-1, 1 ); + Vec_WecPush( vLevels, nArgA-1, 0 ); Vec_WecPush( vProds, nArgA+nArgB-1, 1 ); Vec_WecPush( vLevels, nArgA+nArgB-1, 0 ); } - + if ( fVerbose ) + Vec_WecPrint( vProds, 0 ); if ( pvProds ) *pvProds = Vec_WecDup(vProds); else @@ -1117,7 +1121,7 @@ void Wlc_BlastDecoder( Gia_Man_t * pNew, int * pNum, int nNum, Vec_Int_t * vTmp, Vec_IntPush( vRes, iMint ); } } -void Wlc_BlastBooth( Gia_Man_t * pNew, int * pArgA, int * pArgB, int nArgA, int nArgB, Vec_Int_t * vRes, int fSigned, int fCla, Vec_Wec_t ** pvProds ) +void Wlc_BlastBooth( Gia_Man_t * pNew, int * pArgA, int * pArgB, int nArgA, int nArgB, Vec_Int_t * vRes, int fSigned, int fCla, Vec_Wec_t ** pvProds, int fVerbose ) { Vec_Wec_t * vProds = Vec_WecStart( nArgA + nArgB + 3 ); Vec_Wec_t * vLevels = Vec_WecStart( nArgA + nArgB + 3 ); @@ -1194,7 +1198,10 @@ void Wlc_BlastBooth( Gia_Man_t * pNew, int * pArgA, int * pArgB, int nArgA, int Vec_WecPush( vProds, k, Neg ); Vec_WecPush( vLevels, k, 0 ); } - //Vec_WecPrint( vProds, 0 ); + //Vec_WecShrink( vProds, nArgA + nArgB ); + //Vec_WecShrink( vLevels, nArgA + nArgB ); + if ( fVerbose ) + Vec_WecPrint( vProds, 0 ); //Wlc_BlastPrintMatrix( pNew, vProds, 1 ); //printf( "Cutoff ID for partial products = %d.\n", Gia_ManObjNum(pNew) ); if ( pvProds ) @@ -1832,9 +1839,9 @@ Gia_Man_t * Wlc_NtkBitBlast( Wlc_Ntk_t * p, Wlc_BstPar_t * pParIn ) if ( Wlc_NtkCountConstBits(pArg0, nRangeMax) < Wlc_NtkCountConstBits(pArg1, nRangeMax) ) ABC_SWAP( int *, pArg0, pArg1 ); if ( pPar->fBooth ) - Wlc_BlastBooth( pNew, pArg0, pArg1, nRange0, nRange1, vRes, fSigned, pPar->fCla, NULL ); + Wlc_BlastBooth( pNew, pArg0, pArg1, nRange0, nRange1, vRes, fSigned, pPar->fCla, NULL, pParIn->fVerbose ); else if ( pPar->fCla ) - Wlc_BlastMultiplier3( pNew, pArg0, pArg1, nRange0, nRange1, vRes, Wlc_ObjIsSignedFanin01(p, pObj), pPar->fCla, NULL ); + Wlc_BlastMultiplier3( pNew, pArg0, pArg1, nRange0, nRange1, vRes, Wlc_ObjIsSignedFanin01(p, pObj), pPar->fCla, NULL, pParIn->fVerbose ); else Wlc_BlastMultiplier( pNew, pArg0, pArg1, nRangeMax, nRangeMax, vTemp2, vRes, fSigned ); //Wlc_BlastMultiplierC( pNew, pArg0, pArg1, nRangeMax, nRangeMax, vTemp2, vRes, fSigned ); From d7ef3cc030bcc9da0806069a0f9a25613917c6fb Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Mon, 5 Feb 2024 19:29:50 -0800 Subject: [PATCH 10/33] Bug fix in &fx. --- src/aig/gia/giaFx.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/src/aig/gia/giaFx.c b/src/aig/gia/giaFx.c index 032ae5fc47..c20241ed1d 100644 --- a/src/aig/gia/giaFx.c +++ b/src/aig/gia/giaFx.c @@ -150,6 +150,13 @@ Vec_Wrd_t * Gia_ManComputeTruths( Gia_Man_t * p, int nCutSize, int nLutNum, int // collect and sort fanins vLeaves.nCap = vLeaves.nSize = Gia_ObjLutSize( p, i ); vLeaves.pArray = Gia_ObjLutFanins( p, i ); + if( !Vec_IntCheckUniqueSmall(&vLeaves) ) + { + Vec_IntUniqify(&vLeaves); + Vec_IntWriteEntry(p->vMapping, Vec_IntEntry(p->vMapping, i), vLeaves.nSize); + for ( k = 0; k < vLeaves.nSize; k++ ) + Vec_IntWriteEntry(p->vMapping, Vec_IntEntry(p->vMapping, i) + 1 + k, vLeaves.pArray[k]); + } assert( Vec_IntCheckUniqueSmall(&vLeaves) ); Vec_IntSelectSort( Vec_IntArray(&vLeaves), Vec_IntSize(&vLeaves) ); if ( !fReverse ) From e9a0bf6bf9989d6d140cf64e938116a3fd168e82 Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Mon, 5 Feb 2024 20:32:11 -0800 Subject: [PATCH 11/33] Adding reversing of simulation bits in &sim_read. --- src/base/abci/abc.c | 12 ++++++++---- src/misc/vec/vecWrd.h | 26 ++++++++++++++++++++++++++ 2 files changed, 34 insertions(+), 4 deletions(-) diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c index e0ca6e948f..809d62aa5e 100644 --- a/src/base/abci/abc.c +++ b/src/base/abci/abc.c @@ -34403,11 +34403,11 @@ int Abc_CommandAbc9Iwls21Test( Abc_Frame_t * pAbc, int argc, char ** argv ) ***********************************************************************/ int Abc_CommandAbc9ReadSim( Abc_Frame_t * pAbc, int argc, char ** argv ) { - int c, fOutputs = 0, nWords = 4, fTruth = 0, fVerbose = 0; + int c, fOutputs = 0, nWords = 4, fTruth = 0, fReverse = 0, fVerbose = 0; char ** pArgvNew; int nArgcNew; Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "Wtovh" ) ) != EOF ) + while ( ( c = Extra_UtilGetopt( argc, argv, "Wtrovh" ) ) != EOF ) { switch ( c ) { @@ -34425,6 +34425,9 @@ int Abc_CommandAbc9ReadSim( Abc_Frame_t * pAbc, int argc, char ** argv ) case 't': fTruth ^= 1; break; + case 'r': + fReverse ^= 1; + break; case 'o': fOutputs ^= 1; break; @@ -34455,7 +34458,7 @@ int Abc_CommandAbc9ReadSim( Abc_Frame_t * pAbc, int argc, char ** argv ) return 1; } Vec_WrdFreeP( &pAbc->pGia->vSimsPi ); - pAbc->pGia->vSimsPi = Vec_WrdStartTruthTables( Gia_ManCiNum(pAbc->pGia) ); + pAbc->pGia->vSimsPi = fReverse ? Vec_WrdStartTruthTablesRev( Gia_ManCiNum(pAbc->pGia) ) : Vec_WrdStartTruthTables( Gia_ManCiNum(pAbc->pGia) ); Vec_WrdFreeP( &pAbc->pGia->vSimsPo ); pAbc->pGia->vSimsPo = Gia_ManSimPatSimOut( pAbc->pGia, pAbc->pGia->vSimsPi, 1 ); return 0; @@ -34498,10 +34501,11 @@ int Abc_CommandAbc9ReadSim( Abc_Frame_t * pAbc, int argc, char ** argv ) return 0; usage: - Abc_Print( -2, "usage: &sim_read [-W num] [-tovh] \n" ); + Abc_Print( -2, "usage: &sim_read [-W num] [-trovh] \n" ); Abc_Print( -2, "\t reads simulation patterns from file\n" ); Abc_Print( -2, "\t-W num : the number of words to simulate [default = %d]\n", nWords ); Abc_Print( -2, "\t-t : toggle creating exhaustive simulation info [default = %s]\n", fTruth? "yes": "no" ); + Abc_Print( -2, "\t-r : toggle reversing MSB and LSB input variables [default = %s]\n", fReverse? "yes": "no" ); Abc_Print( -2, "\t-o : toggle reading output information [default = %s]\n", fOutputs? "yes": "no" ); Abc_Print( -2, "\t-v : toggle printing verbose information [default = %s]\n", fVerbose? "yes": "no" ); Abc_Print( -2, "\t-h : print the command usage\n"); diff --git a/src/misc/vec/vecWrd.h b/src/misc/vec/vecWrd.h index aa16771eff..b0d16efe67 100644 --- a/src/misc/vec/vecWrd.h +++ b/src/misc/vec/vecWrd.h @@ -195,6 +195,32 @@ static inline Vec_Wrd_t * Vec_WrdStartTruthTables( int nVars ) } return p; } +static inline Vec_Wrd_t * Vec_WrdStartTruthTablesRev( int nVars ) +{ + Vec_Wrd_t * p; + unsigned Masks[5] = { 0xAAAAAAAA, 0xCCCCCCCC, 0xF0F0F0F0, 0xFF00FF00, 0xFFFF0000 }; + int i, k, nWords; + nWords = nVars <= 6 ? 1 : (1 << (nVars - 6)); + p = Vec_WrdStart( nWords * nVars ); + for ( i = 0; i < nVars; i++ ) + { + unsigned * pTruth = (unsigned *)(p->pArray + nWords * (nVars-1-i)); + if ( i < 5 ) + { + for ( k = 0; k < 2*nWords; k++ ) + pTruth[k] = Masks[i]; + } + else + { + for ( k = 0; k < 2*nWords; k++ ) + if ( k & (1 << (i-5)) ) + pTruth[k] = ~(unsigned)0; + else + pTruth[k] = 0; + } + } + return p; +} static inline int Vec_WrdShiftOne( Vec_Wrd_t * p, int nWords ) { int i, nObjs = p->nSize/nWords; From 52e0a10bf75475ab97dc2474fff537e4c8cf6c86 Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Mon, 5 Feb 2024 20:49:36 -0800 Subject: [PATCH 12/33] Fixing a compiler problem. --- src/base/wlc/wlc.c | 4 ++-- src/base/wln/wlnBlast.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/base/wlc/wlc.c b/src/base/wlc/wlc.c index 3ba9be96db..91656efc84 100644 --- a/src/base/wlc/wlc.c +++ b/src/base/wlc/wlc.c @@ -677,7 +677,7 @@ Gia_Man_t * Wlc_ManGenTree( int nInputs, int Value, int nBits, int fVerbose ) ***********************************************************************/ Gia_Man_t * Wlc_ManGenProd( int nInputs, int fVerbose ) { - extern void Wlc_BlastBooth( Gia_Man_t * pNew, int * pArgA, int * pArgB, int nArgA, int nArgB, Vec_Int_t * vRes, int fSigned, int fCla, Vec_Wec_t ** pvProds ); + extern void Wlc_BlastBooth( Gia_Man_t * pNew, int * pArgA, int * pArgB, int nArgA, int nArgB, Vec_Int_t * vRes, int fSigned, int fCla, Vec_Wec_t ** pvProds, int fVerbose ); extern void Wlc_BlastMultiplier3( Gia_Man_t * pNew, int * pArgA, int * pArgB, int nArgA, int nArgB, Vec_Int_t * vRes, int fSigned, int fCla, Vec_Wec_t ** pvProds ); Vec_Int_t * vIns = Vec_IntAlloc( 2*nInputs ); Gia_Man_t * pTemp, * pNew; @@ -693,7 +693,7 @@ Gia_Man_t * Wlc_ManGenProd( int nInputs, int fVerbose ) // Vec_IntPush( vIns, Vec_IntEntry(vIns, i) ); Gia_ManHashAlloc( pNew ); - Wlc_BlastBooth( pNew, Vec_IntArray(vIns), Vec_IntArray(vIns)+nInputs, nInputs, nInputs, NULL, 0, 0, &vProds ); + Wlc_BlastBooth( pNew, Vec_IntArray(vIns), Vec_IntArray(vIns)+nInputs, nInputs, nInputs, NULL, 0, 0, &vProds, 0 ); //Wlc_BlastMultiplier3( pNew, Vec_IntArray(vIns), Vec_IntArray(vIns)+nInputs, nInputs, nInputs, NULL, 0, 0, &vProds ); //Vec_WecPrint( vProds, 0 ); Wlc_ManGenTreeOne( pNew, vProds, 1, fVerbose ); diff --git a/src/base/wln/wlnBlast.c b/src/base/wln/wlnBlast.c index 776cdd9022..c3281a2e08 100644 --- a/src/base/wln/wlnBlast.c +++ b/src/base/wln/wlnBlast.c @@ -69,7 +69,7 @@ void Rtl_NtkBlastNode( Gia_Man_t * pNew, int Type, int nIns, Vec_Int_t * vDatas, extern int Wlc_BlastAdder( Gia_Man_t * pNew, int * pAdd0, int * pAdd1, int nBits, int Carry ); // result is in pAdd0 extern void Wlc_BlastSubtract( Gia_Man_t * pNew, int * pAdd0, int * pAdd1, int nBits, int Carry ); // result is in pAdd0 extern int Wlc_NtkCountConstBits( int * pArray, int nSize ); - extern void Wlc_BlastBooth( Gia_Man_t * pNew, int * pArgA, int * pArgB, int nArgA, int nArgB, Vec_Int_t * vRes, int fSigned, int fCla, Vec_Wec_t ** pvProds ); + extern void Wlc_BlastBooth( Gia_Man_t * pNew, int * pArgA, int * pArgB, int nArgA, int nArgB, Vec_Int_t * vRes, int fSigned, int fCla, Vec_Wec_t ** pvProds, int fVerbose ); extern void Wlc_BlastMultiplier3( Gia_Man_t * pNew, int * pArgA, int * pArgB, int nArgA, int nArgB, Vec_Int_t * vRes, int fSigned, int fCla, Vec_Wec_t ** pvProds ); extern void Wlc_BlastZeroCondition( Gia_Man_t * pNew, int * pDiv, int nDiv, Vec_Int_t * vRes ); extern void Wlc_BlastDividerTop( Gia_Man_t * pNew, int * pNum, int nNum, int * pDiv, int nDiv, int fQuo, Vec_Int_t * vRes, int fNonRest ); @@ -303,7 +303,7 @@ void Rtl_NtkBlastNode( Gia_Man_t * pNew, int Type, int nIns, Vec_Int_t * vDatas, if ( Wlc_NtkCountConstBits(Vec_IntArray(vArg0), Vec_IntSize(vArg0)) < Wlc_NtkCountConstBits(Vec_IntArray(vArg1), Vec_IntSize(vArg1)) ) ABC_SWAP( Vec_Int_t, *vArg0, *vArg1 ) if ( fBooth ) - Wlc_BlastBooth( pNew, Vec_IntArray(vArg0), Vec_IntArray(vArg1), Vec_IntSize(vArg0), Vec_IntSize(vArg1), vRes, fSigned, fCla, NULL ); + Wlc_BlastBooth( pNew, Vec_IntArray(vArg0), Vec_IntArray(vArg1), Vec_IntSize(vArg0), Vec_IntSize(vArg1), vRes, fSigned, fCla, NULL, 0 ); else Wlc_BlastMultiplier3( pNew, Vec_IntArray(vArg0), Vec_IntArray(vArg1), Vec_IntSize(vArg0), Vec_IntSize(vArg1), vRes, fSigned, fCla, NULL ); if ( nRange > Vec_IntSize(vRes) ) From 1fd79c84302c641173e999b56b915651ff141b55 Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Thu, 29 Feb 2024 15:19:47 -0800 Subject: [PATCH 13/33] Fixing a bug in input/output name ordering. --- src/aig/gia/giaMan.c | 120 +++++++++++++++++++++++-------------------- src/base/abci/abc.c | 4 +- 2 files changed, 65 insertions(+), 59 deletions(-) diff --git a/src/aig/gia/giaMan.c b/src/aig/gia/giaMan.c index 7498630a81..5d8c86b31a 100644 --- a/src/aig/gia/giaMan.c +++ b/src/aig/gia/giaMan.c @@ -1254,7 +1254,7 @@ void Gia_ManDfsSlacksPrint( Gia_Man_t * p ) SeeAlso [] ***********************************************************************/ -void Gia_ManWriteNamesInter( FILE * pFile, char c, int n, int Start, int Skip, int nRegs ) +void Gia_ManWriteNamesInter( FILE * pFile, char c, int n, int Start, int Skip, int nRegs, int fReverse ) { int Length = Start, i, fFirst = 1; char pName[100]; @@ -1318,9 +1318,9 @@ void Gia_ManDumpInterface2( Gia_Man_t * p, FILE * pFile ) fprintf( pFile, "_inst" ); fprintf( pFile, " (\n " ); - Gia_ManWriteNamesInter( pFile, 'i', Gia_ManCiNum(p), 4, 4, Gia_ManRegNum(p) ); + Gia_ManWriteNamesInter( pFile, 'i', Gia_ManCiNum(p), 4, 4, Gia_ManRegNum(p), 0 ); fprintf( pFile, ",\n " ); - Gia_ManWriteNamesInter( pFile, 'o', Gia_ManCoNum(p), 4, 4, Gia_ManRegNum(p) ); + Gia_ManWriteNamesInter( pFile, 'o', Gia_ManCoNum(p), 4, 4, Gia_ManRegNum(p), 0 ); fprintf( pFile, "\n );\n\n" ); fprintf( pFile, "endmodule\n\n" ); @@ -1387,16 +1387,17 @@ char * Gia_ObjGetDumpName( Vec_Ptr_t * vNames, char c, int i, int d ) sprintf( pBuffer, "%c%0*d%c", c, d, i, c ); return pBuffer; } -void Gia_ManWriteNames( FILE * pFile, char c, int n, Vec_Ptr_t * vNames, int Start, int Skip, Vec_Bit_t * vObjs ) +void Gia_ManWriteNames( FILE * pFile, char c, int n, Vec_Ptr_t * vNames, int Start, int Skip, Vec_Bit_t * vObjs, int fReverse ) { int Digits = Abc_Base10Log( n ); int Length = Start, i, fFirst = 1; char * pName; for ( i = 0; i < n; i++ ) { - if ( vObjs && !Vec_BitEntry(vObjs, i) ) + int k = fReverse ? n-1-i : i; + if ( vObjs && !Vec_BitEntry(vObjs, k) ) continue; - pName = Gia_ObjGetDumpName( vNames, c, i, Digits ); + pName = Gia_ObjGetDumpName( vNames, c, k, Digits ); Length += strlen(pName) + 2; if ( Length > 60 ) { @@ -1464,26 +1465,26 @@ void Gia_ManDumpVerilogNoInter( Gia_Man_t * p, char * pFileName, Vec_Int_t * vOb if ( fVerBufs ) { fprintf( pFile, " (\n " ); - Gia_ManWriteNames( pFile, 'a', Gia_ManPiNum(p), NULL, 4, 4, NULL ); + Gia_ManWriteNames( pFile, 'a', Gia_ManPiNum(p), NULL, 4, 4, NULL, 0 ); fprintf( pFile, ",\n " ); - Gia_ManWriteNames( pFile, 'y', Gia_ManPoNum(p), NULL, 4, 4, NULL ); + Gia_ManWriteNames( pFile, 'y', Gia_ManPoNum(p), NULL, 4, 4, NULL, 0 ); fprintf( pFile, "\n );\n\n" ); fprintf( pFile, " input " ); - Gia_ManWriteNames( pFile, 'a', Gia_ManPiNum(p), NULL, 8, 4, NULL ); + Gia_ManWriteNames( pFile, 'a', Gia_ManPiNum(p), NULL, 8, 4, NULL, 0 ); fprintf( pFile, ";\n\n" ); fprintf( pFile, " output " ); - Gia_ManWriteNames( pFile, 'y', Gia_ManPoNum(p), NULL, 9, 4, NULL ); + Gia_ManWriteNames( pFile, 'y', Gia_ManPoNum(p), NULL, 9, 4, NULL, 0 ); fprintf( pFile, ";\n\n" ); fprintf( pFile, " wire " ); - Gia_ManWriteNames( pFile, 'x', Gia_ManPiNum(p), p->vNamesIn, 8, 4, NULL ); + Gia_ManWriteNames( pFile, 'x', Gia_ManPiNum(p), p->vNamesIn, 8, 4, NULL, 0 ); fprintf( pFile, ";\n\n" ); fprintf( pFile, " wire " ); - Gia_ManWriteNames( pFile, 'z', Gia_ManPoNum(p), p->vNamesOut, 9, 4, NULL ); + Gia_ManWriteNames( pFile, 'z', Gia_ManPoNum(p), p->vNamesOut, 9, 4, NULL, 0 ); fprintf( pFile, ";\n\n" ); Gia_ManForEachPi( p, pObj, i ) @@ -1503,32 +1504,32 @@ void Gia_ManDumpVerilogNoInter( Gia_Man_t * p, char * pFileName, Vec_Int_t * vOb else { fprintf( pFile, " (\n " ); - Gia_ManWriteNames( pFile, 'x', Gia_ManPiNum(p), p->vNamesIn, 4, 4, NULL ); + Gia_ManWriteNames( pFile, 'x', Gia_ManPiNum(p), p->vNamesIn, 4, 4, NULL, 0 ); fprintf( pFile, ",\n " ); - Gia_ManWriteNames( pFile, 'z', Gia_ManPoNum(p), p->vNamesOut, 4, 4, NULL ); + Gia_ManWriteNames( pFile, 'z', Gia_ManPoNum(p), p->vNamesOut, 4, 4, NULL, 0 ); fprintf( pFile, "\n );\n\n" ); fprintf( pFile, " input " ); - Gia_ManWriteNames( pFile, 'x', Gia_ManPiNum(p), p->vNamesIn, 8, 4, NULL ); + Gia_ManWriteNames( pFile, 'x', Gia_ManPiNum(p), p->vNamesIn, 8, 4, NULL, 0 ); fprintf( pFile, ";\n\n" ); fprintf( pFile, " output " ); - Gia_ManWriteNames( pFile, 'z', Gia_ManPoNum(p), p->vNamesOut, 9, 4, NULL ); + Gia_ManWriteNames( pFile, 'z', Gia_ManPoNum(p), p->vNamesOut, 9, 4, NULL, 0 ); fprintf( pFile, ";\n\n" ); } if ( Vec_BitCount(vUsed) ) { fprintf( pFile, " wire " ); - Gia_ManWriteNames( pFile, 'n', Gia_ManObjNum(p), NULL, 7, 4, vUsed ); + Gia_ManWriteNames( pFile, 'n', Gia_ManObjNum(p), NULL, 7, 4, vUsed, 0 ); fprintf( pFile, ";\n\n" ); } if ( Vec_BitCount(vInvs) ) { fprintf( pFile, " wire " ); - Gia_ManWriteNames( pFile, 'i', Gia_ManObjNum(p), NULL, 7, 4, vInvs ); + Gia_ManWriteNames( pFile, 'i', Gia_ManObjNum(p), NULL, 7, 4, vInvs, 0 ); fprintf( pFile, ";\n\n" ); } @@ -1644,26 +1645,26 @@ void Gia_ManDumpVerilogNoInterAssign( Gia_Man_t * p, char * pFileName, Vec_Int_t if ( fVerBufs ) { fprintf( pFile, " (\n " ); - Gia_ManWriteNames( pFile, 'a', Gia_ManPiNum(p), NULL, 4, 4, NULL ); + Gia_ManWriteNames( pFile, 'a', Gia_ManPiNum(p), NULL, 4, 4, NULL, 0 ); fprintf( pFile, ",\n " ); - Gia_ManWriteNames( pFile, 'y', Gia_ManPoNum(p), NULL, 4, 4, NULL ); + Gia_ManWriteNames( pFile, 'y', Gia_ManPoNum(p), NULL, 4, 4, NULL, 0 ); fprintf( pFile, "\n );\n\n" ); fprintf( pFile, " input " ); - Gia_ManWriteNames( pFile, 'a', Gia_ManPiNum(p), NULL, 8, 4, NULL ); + Gia_ManWriteNames( pFile, 'a', Gia_ManPiNum(p), NULL, 8, 4, NULL, 0 ); fprintf( pFile, ";\n\n" ); fprintf( pFile, " output " ); - Gia_ManWriteNames( pFile, 'y', Gia_ManPoNum(p), NULL, 9, 4, NULL ); + Gia_ManWriteNames( pFile, 'y', Gia_ManPoNum(p), NULL, 9, 4, NULL, 0 ); fprintf( pFile, ";\n\n" ); fprintf( pFile, " wire " ); - Gia_ManWriteNames( pFile, 'x', Gia_ManPiNum(p), p->vNamesIn, 8, 4, NULL ); + Gia_ManWriteNames( pFile, 'x', Gia_ManPiNum(p), p->vNamesIn, 8, 4, NULL, 0 ); fprintf( pFile, ";\n\n" ); fprintf( pFile, " wire " ); - Gia_ManWriteNames( pFile, 'z', Gia_ManPoNum(p), p->vNamesOut, 9, 4, NULL ); + Gia_ManWriteNames( pFile, 'z', Gia_ManPoNum(p), p->vNamesOut, 9, 4, NULL, 0 ); fprintf( pFile, ";\n\n" ); Gia_ManForEachPi( p, pObj, i ) @@ -1683,32 +1684,32 @@ void Gia_ManDumpVerilogNoInterAssign( Gia_Man_t * p, char * pFileName, Vec_Int_t else { fprintf( pFile, " (\n " ); - Gia_ManWriteNames( pFile, 'x', Gia_ManPiNum(p), p->vNamesIn, 4, 4, NULL ); + Gia_ManWriteNames( pFile, 'x', Gia_ManPiNum(p), p->vNamesIn, 4, 4, NULL, 0 ); fprintf( pFile, ",\n " ); - Gia_ManWriteNames( pFile, 'z', Gia_ManPoNum(p), p->vNamesOut, 4, 4, NULL ); + Gia_ManWriteNames( pFile, 'z', Gia_ManPoNum(p), p->vNamesOut, 4, 4, NULL, 0 ); fprintf( pFile, "\n );\n\n" ); fprintf( pFile, " input " ); - Gia_ManWriteNames( pFile, 'x', Gia_ManPiNum(p), p->vNamesIn, 8, 4, NULL ); + Gia_ManWriteNames( pFile, 'x', Gia_ManPiNum(p), p->vNamesIn, 8, 4, NULL, 0 ); fprintf( pFile, ";\n\n" ); fprintf( pFile, " output " ); - Gia_ManWriteNames( pFile, 'z', Gia_ManPoNum(p), p->vNamesOut, 9, 4, NULL ); + Gia_ManWriteNames( pFile, 'z', Gia_ManPoNum(p), p->vNamesOut, 9, 4, NULL, 0 ); fprintf( pFile, ";\n\n" ); } if ( Vec_BitCount(vUsed) ) { fprintf( pFile, " wire " ); - Gia_ManWriteNames( pFile, 'n', Gia_ManObjNum(p), NULL, 7, 4, vUsed ); + Gia_ManWriteNames( pFile, 'n', Gia_ManObjNum(p), NULL, 7, 4, vUsed, 0 ); fprintf( pFile, ";\n\n" ); } if ( Vec_BitCount(vInvs) ) { fprintf( pFile, " wire " ); - Gia_ManWriteNames( pFile, 'i', Gia_ManObjNum(p), NULL, 7, 4, vInvs ); + Gia_ManWriteNames( pFile, 'i', Gia_ManObjNum(p), NULL, 7, 4, vInvs, 0 ); fprintf( pFile, ";\n\n" ); } @@ -1838,7 +1839,7 @@ Vec_Int_t * Gia_ManCountSymbsAll( Vec_Ptr_t * vNames ) } return vArray; } -void Gia_ManDumpIoList( Gia_Man_t * p, FILE * pFile, int fOuts ) +void Gia_ManDumpIoList( Gia_Man_t * p, FILE * pFile, int fOuts, int fReverse ) { Vec_Ptr_t * vNames = fOuts ? p->vNamesOut : p->vNamesIn; if ( vNames == NULL ) @@ -1849,13 +1850,18 @@ void Gia_ManDumpIoList( Gia_Man_t * p, FILE * pFile, int fOuts ) int iName, Size, i; Vec_IntForEachEntryDouble( vArray, iName, Size, i ) { + if ( fReverse ) + { + iName = Vec_IntEntry(vArray, Vec_IntSize(vArray)-2-i); + Size = Vec_IntEntry(vArray, Vec_IntSize(vArray)-1-i); + } if ( i ) fprintf( pFile, ", " ); Gia_ManPrintOneName( pFile, (char *)Vec_PtrEntry(vNames, iName), Size ); } Vec_IntFree( vArray ); } } -void Gia_ManDumpIoRanges( Gia_Man_t * p, FILE * pFile, int fOuts, int fReverse ) +void Gia_ManDumpIoRanges( Gia_Man_t * p, FILE * pFile, int fOuts ) { Vec_Ptr_t * vNames = fOuts ? p->vNamesOut : p->vNamesIn; if ( p->vNamesOut == NULL ) @@ -1874,7 +1880,7 @@ void Gia_ManDumpIoRanges( Gia_Man_t * p, FILE * pFile, int fOuts, int fReverse ) int NumEnd = Gia_ManReadRangeNum( pNameLast, Size ); fprintf( pFile, " %s ", fOuts ? "output" : "input" ); if ( NumBeg != -1 && iName < iNameNext-1 ) - fprintf( pFile, "[%d:%d] ", fReverse ? NumBeg : NumEnd, fReverse ? NumEnd : NumBeg ); + fprintf( pFile, "[%d:%d] ", NumEnd, NumBeg ); Gia_ManPrintOneName( pFile, pName, Size ); fprintf( pFile, ";\n" ); } @@ -1916,45 +1922,45 @@ void Gia_ManDumpInterface( Gia_Man_t * p, char * pFileName, int fReverse ) Gia_ManDumpModuleName( pFile, p->pName ); fprintf( pFile, "_wrapper" ); fprintf( pFile, " ( " ); - Gia_ManDumpIoList( p, pFile, 0 ); + Gia_ManDumpIoList( p, pFile, 0, 0 ); fprintf( pFile, ", " ); - Gia_ManDumpIoList( p, pFile, 1 ); + Gia_ManDumpIoList( p, pFile, 1, 0 ); fprintf( pFile, " );\n\n" ); - Gia_ManDumpIoRanges( p, pFile, 0, fReverse ); - Gia_ManDumpIoRanges( p, pFile, 1, fReverse ); + Gia_ManDumpIoRanges( p, pFile, 0 ); + Gia_ManDumpIoRanges( p, pFile, 1 ); fprintf( pFile, "\n" ); fprintf( pFile, " wire " ); - Gia_ManWriteNames( pFile, 'x', Gia_ManPiNum(p), p->vNamesIn, 8, 4, NULL ); + Gia_ManWriteNames( pFile, 'x', Gia_ManPiNum(p), p->vNamesIn, 8, 4, NULL, 0 ); fprintf( pFile, ";\n\n" ); fprintf( pFile, " wire " ); - Gia_ManWriteNames( pFile, 'z', Gia_ManPoNum(p), p->vNamesOut, 9, 4, NULL ); + Gia_ManWriteNames( pFile, 'z', Gia_ManPoNum(p), p->vNamesOut, 9, 4, NULL, 0 ); fprintf( pFile, ";\n\n" ); fprintf( pFile, " assign { " ); - Gia_ManWriteNames( pFile, 'x', Gia_ManCiNum(p), p->vNamesIn, 8, 4, NULL ); + Gia_ManWriteNames( pFile, 'x', Gia_ManCiNum(p), p->vNamesIn, 8, 4, NULL, 1 ); fprintf( pFile, " } = { " ); - Gia_ManDumpIoList( p, pFile, 0 ); + Gia_ManDumpIoList( p, pFile, 0, 1 ); fprintf( pFile, " };\n\n" ); fprintf( pFile, " assign { " ); - Gia_ManDumpIoList( p, pFile, 1 ); + Gia_ManDumpIoList( p, pFile, 1, 1 ); fprintf( pFile, " } = { " ); - Gia_ManWriteNames( pFile, 'z', Gia_ManCoNum(p), p->vNamesOut, 9, 4, NULL ); + Gia_ManWriteNames( pFile, 'z', Gia_ManCoNum(p), p->vNamesOut, 9, 4, NULL, 1 ); fprintf( pFile, " };\n\n" ); if ( Vec_BitCount(vUsed) ) { fprintf( pFile, " wire " ); - Gia_ManWriteNames( pFile, 'n', Gia_ManObjNum(p), NULL, 7, 4, vUsed ); + Gia_ManWriteNames( pFile, 'n', Gia_ManObjNum(p), NULL, 7, 4, vUsed, 0 ); fprintf( pFile, ";\n\n" ); } if ( Vec_BitCount(vInvs) ) { fprintf( pFile, " wire " ); - Gia_ManWriteNames( pFile, 'i', Gia_ManObjNum(p), NULL, 7, 4, vInvs ); + Gia_ManWriteNames( pFile, 'i', Gia_ManObjNum(p), NULL, 7, 4, vInvs, 0 ); fprintf( pFile, ";\n\n" ); } @@ -2027,45 +2033,45 @@ void Gia_ManDumpInterfaceAssign( Gia_Man_t * p, char * pFileName, int fReverse ) Gia_ManDumpModuleName( pFile, p->pName ); fprintf( pFile, "_wrapper" ); fprintf( pFile, " ( " ); - Gia_ManDumpIoList( p, pFile, 0 ); + Gia_ManDumpIoList( p, pFile, 0, 0 ); fprintf( pFile, ", " ); - Gia_ManDumpIoList( p, pFile, 1 ); + Gia_ManDumpIoList( p, pFile, 1, 0 ); fprintf( pFile, " );\n\n" ); - Gia_ManDumpIoRanges( p, pFile, 0, fReverse ); - Gia_ManDumpIoRanges( p, pFile, 1, fReverse ); + Gia_ManDumpIoRanges( p, pFile, 0 ); + Gia_ManDumpIoRanges( p, pFile, 1 ); fprintf( pFile, "\n" ); fprintf( pFile, " wire " ); - Gia_ManWriteNames( pFile, 'x', Gia_ManPiNum(p), p->vNamesIn, 8, 4, NULL ); + Gia_ManWriteNames( pFile, 'x', Gia_ManPiNum(p), p->vNamesIn, 8, 4, NULL, 0 ); fprintf( pFile, ";\n\n" ); fprintf( pFile, " wire " ); - Gia_ManWriteNames( pFile, 'z', Gia_ManPoNum(p), p->vNamesOut, 9, 4, NULL ); + Gia_ManWriteNames( pFile, 'z', Gia_ManPoNum(p), p->vNamesOut, 9, 4, NULL, 0 ); fprintf( pFile, ";\n\n" ); fprintf( pFile, " assign { " ); - Gia_ManWriteNames( pFile, 'x', Gia_ManCiNum(p), p->vNamesIn, 8, 4, NULL ); + Gia_ManWriteNames( pFile, 'x', Gia_ManCiNum(p), p->vNamesIn, 8, 4, NULL, 1 ); fprintf( pFile, " } = { " ); - Gia_ManDumpIoList( p, pFile, 0 ); + Gia_ManDumpIoList( p, pFile, 0, 1 ); fprintf( pFile, " };\n\n" ); fprintf( pFile, " assign { " ); - Gia_ManDumpIoList( p, pFile, 1 ); + Gia_ManDumpIoList( p, pFile, 1, 1 ); fprintf( pFile, " } = { " ); - Gia_ManWriteNames( pFile, 'z', Gia_ManCoNum(p), p->vNamesOut, 9, 4, NULL ); + Gia_ManWriteNames( pFile, 'z', Gia_ManCoNum(p), p->vNamesOut, 9, 4, NULL, 1 ); fprintf( pFile, " };\n\n" ); if ( Vec_BitCount(vUsed) ) { fprintf( pFile, " wire " ); - Gia_ManWriteNames( pFile, 'n', Gia_ManObjNum(p), NULL, 7, 4, vUsed ); + Gia_ManWriteNames( pFile, 'n', Gia_ManObjNum(p), NULL, 7, 4, vUsed, 0 ); fprintf( pFile, ";\n\n" ); } if ( Vec_BitCount(vInvs) ) { fprintf( pFile, " wire " ); - Gia_ManWriteNames( pFile, 'i', Gia_ManObjNum(p), NULL, 7, 4, vInvs ); + Gia_ManWriteNames( pFile, 'i', Gia_ManObjNum(p), NULL, 7, 4, vInvs, 0 ); fprintf( pFile, ";\n\n" ); } diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c index 809d62aa5e..89683acf73 100644 --- a/src/base/abci/abc.c +++ b/src/base/abci/abc.c @@ -32150,7 +32150,7 @@ int Abc_CommandAbc9Write( Abc_Frame_t * pAbc, int argc, char ** argv ) return 0; usage: - Abc_Print( -2, "usage: &w [-upicabmlnrsvh] \n" ); + Abc_Print( -2, "usage: &w [-upicabmlnsvh] \n" ); Abc_Print( -2, "\t writes the current AIG into the AIGER file\n" ); Abc_Print( -2, "\t-u : toggle writing canonical AIG structure [default = %s]\n", fUnique? "yes" : "no" ); Abc_Print( -2, "\t-p : toggle writing Verilog with 'and' and 'not' [default = %s]\n", fVerilog? "yes" : "no" ); @@ -32161,7 +32161,7 @@ int Abc_CommandAbc9Write( Abc_Frame_t * pAbc, int argc, char ** argv ) Abc_Print( -2, "\t-m : toggle writing MiniAIG rather than AIGER [default = %s]\n", fMiniAig? "yes" : "no" ); Abc_Print( -2, "\t-l : toggle writing MiniLUT rather than AIGER [default = %s]\n", fMiniLut? "yes" : "no" ); Abc_Print( -2, "\t-n : toggle writing \'\\n\' after \'c\' in the AIGER file [default = %s]\n", fWriteNewLine? "yes": "no" ); - Abc_Print( -2, "\t-r : toggle reversing the order of input/output bits [default = %s]\n", fReverse? "yes": "no" ); + //Abc_Print( -2, "\t-r : toggle reversing the order of input/output bits [default = %s]\n", fReverse? "yes": "no" ); Abc_Print( -2, "\t-s : toggle skipping the timestamp in the output file [default = %s]\n", fSkipComment? "yes": "no" ); Abc_Print( -2, "\t-v : toggle verbose output [default = %s]\n", fVerbose? "yes": "no" ); Abc_Print( -2, "\t-h : print the command usage\n"); From 6f5656c18837f86f2a9e18fe35046fb7ee306c9f Mon Sep 17 00:00:00 2001 From: Allen Ho Date: Fri, 1 Mar 2024 16:05:41 +0800 Subject: [PATCH 14/33] shared EI/EO not handled yet --- src/aig/gia/gia.h | 23 + src/aig/gia/giaBound.c | 1043 ++++++++++++++++++++++++++++++++++++++ src/aig/gia/giaDup.c | 598 +--------------------- src/aig/gia/module.make | 3 +- src/base/abci/abc.c | 154 ++++-- src/misc/vec/vecBit.h | 21 + src/proof/cec/cecSatG2.c | 119 +---- 7 files changed, 1232 insertions(+), 729 deletions(-) create mode 100644 src/aig/gia/giaBound.c diff --git a/src/aig/gia/gia.h b/src/aig/gia/gia.h index dab6770bb5..cbd2b9484b 100644 --- a/src/aig/gia/gia.h +++ b/src/aig/gia/gia.h @@ -1789,6 +1789,29 @@ extern void Tas_ManSatPrintStats( Tas_Man_t * p ); extern int Tas_ManSolve( Tas_Man_t * p, Gia_Obj_t * pObj, Gia_Obj_t * pObj2 ); extern int Tas_ManSolveArray( Tas_Man_t * p, Vec_Ptr_t * vObjs ); +/*=== giaBound.c ===========================================================*/ +typedef struct Bnd_Man_t_ Bnd_Man_t; + +extern Bnd_Man_t* Bnd_ManStart( Gia_Man_t *pSpec, Gia_Man_t *pImpl ); +extern void Bnd_ManStop(); +//for fraig +extern void Bnd_ManMap( int iLit, int id, int spec ); +extern void Bnd_ManMerge( int id1, int id2, int phaseDiff ); +extern void Bnd_ManFinalizeMappings(); +extern void Bnd_ManPrintMappings(); +// for eco +extern int Bnd_ManCheckBound( Gia_Man_t *p ); +extern void Bnd_ManFindBound( Gia_Man_t *p ); +extern Gia_Man_t* Bnd_ManGenSpecOut( Gia_Man_t *p ); +extern Gia_Man_t* Bnd_ManGenImplOut( Gia_Man_t *p ); +extern Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPatch ); +extern void Bnd_ManSetEqOut( int eq ); +extern void Bnd_ManSetEqRes( int eq ); +extern void Bnd_ManPrintStats(); + +// util +extern Gia_Man_t* Bnd_ManCutBoundary( Gia_Man_t *p, Vec_Int_t* vEI, Vec_Int_t* vEO, Vec_Bit_t* vEI_phase, Vec_Bit_t* vEO_phase ); + ABC_NAMESPACE_HEADER_END diff --git a/src/aig/gia/giaBound.c b/src/aig/gia/giaBound.c new file mode 100644 index 0000000000..63b2c389b1 --- /dev/null +++ b/src/aig/gia/giaBound.c @@ -0,0 +1,1043 @@ +#include "gia.h" +#include "misc/tim/tim.h" +#include "misc/vec/vecWec.h" +#include "proof/cec/cec.h" + + +ABC_NAMESPACE_IMPL_START + +//////////////////////////////////////////////////////////////////////// +/// DECLARATIONS /// +//////////////////////////////////////////////////////////////////////// + +typedef struct Bnd_Man_t_ Bnd_Man_t; + +struct Bnd_Man_t_ +{ + int nBI; + int nBO; + int nBI_miss; + int nBO_miss; + int nInternal; + int nExtra; + int nMerged_spec; + int nMerged_impl; + + int nNode_spec; + int nNode_impl; + int nNode_patch; + int nNode_patched; + + int status; // 0: init 1: boundary found 2: out generated 3: patched generated + + int combLoop_spec; + int combLoop_impl; + int eq_out; + int eq_res; + int nChoice; + + Vec_Ptr_t* vBmiter2Spec; + Vec_Ptr_t* vBmiter2Impl; + Vec_Int_t* vSpec2Impl; + Vec_Bit_t* vSpec2Impl_phase; + + Vec_Int_t* vBI; + Vec_Int_t* vBO; + Vec_Int_t* vEI_spec; + Vec_Int_t* vEO_spec; + Vec_Int_t* vEI_impl; + Vec_Int_t* vEO_impl; + Vec_Bit_t* vEI_phase; + Vec_Bit_t* vEO_phase; + + Vec_Int_t* vSpec2Impl_diff; + +}; + +Bnd_Man_t* pBnd; + +//////////////////////////////////////////////////////////////////////// +/// FUNCTION DEFINITIONS /// +//////////////////////////////////////////////////////////////////////// + +void Bnd_ManSetEqOut( int eq ) { pBnd -> eq_out = eq;} +void Bnd_ManSetEqRes( int eq ) { pBnd -> eq_res = eq;} + +/**Function************************************************************* + + Synopsis [] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ + +Bnd_Man_t* Bnd_ManStart( Gia_Man_t *pSpec, Gia_Man_t *pImpl ) +{ + int i; + Bnd_Man_t* p = ABC_CALLOC( Bnd_Man_t, 1 ); + + p -> vBmiter2Spec = Vec_PtrAlloc( Gia_ManObjNum(pSpec) + Gia_ManObjNum(pImpl) ); + p -> vBmiter2Impl = Vec_PtrAlloc( Gia_ManObjNum(pSpec) + Gia_ManObjNum(pImpl) ); + Vec_PtrFill( p -> vBmiter2Spec, (Gia_ManObjNum(pSpec) + Gia_ManObjNum(pImpl)), 0 ); + Vec_PtrFill( p -> vBmiter2Impl, (Gia_ManObjNum(pSpec) + Gia_ManObjNum(pImpl)), 0 ); + for( i = 0; i < Vec_PtrSize( p -> vBmiter2Impl ); i ++ ) + { + Vec_PtrSetEntry( p -> vBmiter2Spec, i, Vec_IntAlloc(1) ); + Vec_PtrSetEntry( p -> vBmiter2Impl, i, Vec_IntAlloc(1) ); + } + + p -> vSpec2Impl = Vec_IntAlloc( Gia_ManObjNum(pSpec) ); + p -> vSpec2Impl_phase = Vec_BitAlloc( Gia_ManObjNum(pSpec) ); + Vec_IntFill( p -> vSpec2Impl, Gia_ManObjNum(pSpec), -1 ); + Vec_BitFill( p -> vSpec2Impl_phase, Gia_ManObjNum(pSpec), 0 ); + + p -> vBI = Vec_IntAlloc(16); + p -> vBO = Vec_IntAlloc(16); + p -> vEI_spec = Vec_IntAlloc(16); + p -> vEO_spec = Vec_IntAlloc(16); + p -> vEI_impl = Vec_IntAlloc(16); + p -> vEO_impl = Vec_IntAlloc(16); + p -> vEI_phase = Vec_BitAlloc(16); + p -> vEO_phase = Vec_BitAlloc(16); + + p -> nNode_spec = Gia_ManAndNum(pSpec) - Gia_ManBufNum(pSpec); + p -> nNode_impl = Gia_ManAndNum(pImpl); + p -> nNode_patch = 0; + p -> nNode_patched = 0; + + p -> status = 0; + p -> combLoop_spec = 0; + p -> combLoop_impl = 0; + p -> eq_out = 0; + p -> eq_res = 0; + + p -> nChoice = 0; + + p -> vSpec2Impl_diff = Vec_IntAlloc( Gia_ManObjNum(pSpec) ); + Vec_IntFill( p -> vSpec2Impl_diff, Gia_ManObjNum(pSpec), 0 ); + + return p; +} + +/**Function************************************************************* + + Synopsis [] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Bnd_ManStop() +{ + assert(pBnd); + + Vec_PtrFree( pBnd-> vBmiter2Spec ); + Vec_PtrFree( pBnd-> vBmiter2Impl ); + Vec_IntFree( pBnd-> vSpec2Impl ); + Vec_BitFree( pBnd-> vSpec2Impl_phase ); + + Vec_IntFree( pBnd->vBI ); + Vec_IntFree( pBnd->vBO ); + Vec_IntFree( pBnd->vEI_spec ); + Vec_IntFree( pBnd->vEO_spec ); + Vec_IntFree( pBnd->vEI_impl ); + Vec_IntFree( pBnd->vEO_impl ); + Vec_BitFree( pBnd->vEI_phase ); + Vec_BitFree( pBnd->vEO_phase ); + + Vec_IntFree( pBnd-> vSpec2Impl_diff ); + + ABC_FREE( pBnd ); +} + + +void Bnd_ManMap( int iLit, int id, int spec ) +{ + + if ( spec ) + { + Vec_IntPush( Vec_PtrEntry( pBnd -> vBmiter2Spec, iLit >> 1), id ); + Vec_BitSetEntry( pBnd -> vSpec2Impl_phase, id, iLit & 1 ); + } + else + { + assert( (iLit & 1) == 0 ); + Vec_IntPush( Vec_PtrEntry( pBnd -> vBmiter2Impl, iLit >> 1), id ); + } +} + +void Bnd_ManMerge( int id_repr, int id_obj, int phaseDiff ) +{ + + + Vec_Ptr_t* vBmiter2Spec = pBnd -> vBmiter2Spec; + Vec_Ptr_t* vBmiter2Impl = pBnd -> vBmiter2Impl; + Vec_Bit_t* vSpec2Impl_phase = pBnd -> vSpec2Impl_phase; + int id, i; + + Vec_Int_t *vIds_spec_repr, *vIds_impl_repr, *vIds_spec_obj, *vIds_impl_obj; + + vIds_spec_repr = Vec_PtrEntry( vBmiter2Spec, id_repr ); + vIds_impl_repr = Vec_PtrEntry( vBmiter2Impl, id_repr ); + vIds_spec_obj = Vec_PtrEntry( vBmiter2Spec, id_obj ); + vIds_impl_obj = Vec_PtrEntry( vBmiter2Impl, id_obj ); + + Vec_IntForEachEntry( vIds_spec_obj, id, i ) + { + Vec_IntPush(vIds_spec_repr, id); + } + Vec_IntForEachEntry( vIds_impl_obj, id, i ) + { + Vec_IntPush(vIds_impl_repr, id); + } + + // handle spec2impl phase + if ( phaseDiff ) + { + Vec_IntForEachEntry( vIds_spec_obj, id, i ) + { + Vec_BitSetEntry( vSpec2Impl_phase, id, !Vec_BitEntry(vSpec2Impl_phase, id) ); + // printf( "spec id %d's phase set to %d\n", id, Vec_BitEntry(vSpec2Impl_phase, id) ); + } + } + + // handle impl2spec phase + /* + if ( Vec_IntSize(vIds_spec_repr) == 0 ) // no match + { + if ( pObj->fPhase ^ pRepr -> fPhase ) + { + Vec_IntForEachEntry( vIds_impl_obj, eId, j ) + { + Vec_BitSetEntry( vImpl2Spec_phase, eId, !Vec_BitEntry(vImpl2Spec_phase, eId) ); + printf( "impl id %d's phase set to %d\n", eId, Vec_BitEntry(vImpl2Spec_phase, eId) ); + } + } + } + else if ( Vec_IntSize( vIds_spec_repr ) == Vec_IntSize( vIds_spec_obj) && Vec_IntSize( vIds_impl_obj ) == 0 ) // new match + { + if ( pObj->fPhase ^ pRepr -> fPhase ) + { + Vec_IntForEachEntry( vIds_impl_repr, eId, j ) + { + Vec_BitSetEntry( vImpl2Spec_phase, eId, !Vec_BitEntry(vImpl2Spec_phase, eId) ); + printf( "impl id %d's phase set to %d\n", eId, Vec_BitEntry(vImpl2Spec_phase, eId) ); + } + printf("new match flip\n"); + } + } + else if ( Vec_IntSize( vIds_spec_repr ) > 0 && Vec_IntSize( vIds_impl_obj ) > 0 ) // matched, merge impl + { + if ( ( pObj->fPhase ^ pRepr -> fPhase) ^ ( Vec_BitEntry( vImpl2Spec_phase, Vec_IntEntry(vIds_impl_repr, 0)) ^ Vec_BitEntry( vImpl2Spec_phase, Vec_IntEntry(vIds_impl_obj, 0)) ) ) + { + if ( Vec_IntSize( vIds_spec_repr ) == Vec_IntSize( vIds_spec_obj) ) // unmatched repr, matched obj, set repr bits + { + Vec_IntForEachEntry( vIds_impl_repr, eId, j ) + { + if ( j >= Vec_IntSize( vIds_impl_repr)-Vec_IntSize(vIds_impl_obj) ) break; + Vec_BitSetEntry( vImpl2Spec_phase, eId, !Vec_BitEntry(vImpl2Spec_phase, eId) ); + printf( "impl id %d's phase set to %d\n", eId, Vec_BitEntry(vImpl2Spec_phase, eId) ); + } + } + else // set obj bits + { + Vec_IntForEachEntry( vIds_impl_obj, eId, j ) + { + Vec_BitSetEntry( vImpl2Spec_phase, eId, !Vec_BitEntry(vImpl2Spec_phase, eId) ); + printf( "impl id %d's phase set to %d\n", eId, Vec_BitEntry(vImpl2Spec_phase, eId) ); + } + } + } + } + */ + + Vec_IntClear(vIds_spec_obj); + Vec_IntClear(vIds_impl_obj); + +} +void Bnd_ManFinalizeMappings() +{ + + Vec_Ptr_t* vBmiter2Spec = pBnd -> vBmiter2Spec; + Vec_Ptr_t* vBmiter2Impl = pBnd -> vBmiter2Impl; + Vec_Int_t* vSpec2Impl = pBnd -> vSpec2Impl; + + Vec_Int_t *vSpec, *vImpl; + int i, j, id; + + pBnd -> nMerged_impl = 0; + pBnd -> nMerged_spec = 0; + + + for( i = 0; i < Vec_PtrSize(vBmiter2Spec); i++ ) + { + vSpec = Vec_PtrEntry( vBmiter2Spec, i ); + vImpl = Vec_PtrEntry( vBmiter2Impl, i ); + + // create spec2impl + if ( Vec_IntSize(vSpec) != 0 && Vec_IntSize(vImpl) != 0 ) + { + Vec_IntForEachEntry( vSpec, id, j ) + { + Vec_IntSetEntry( vSpec2Impl, id, Vec_IntEntry(vImpl, 0) ); + + // record the number of different choice of vEI_impl, vEO_impl + Vec_IntSetEntry( pBnd->vSpec2Impl_diff, id, Vec_IntSize(vImpl)-1 ); + } + + + } + + // count number of nodes merged into the same circuit + if ( Vec_IntSize(vSpec) != 0 ) + { + pBnd->nMerged_spec += Vec_IntSize(vSpec) - 1; + } + if ( Vec_IntSize(vImpl) != 0 ) + { + pBnd->nMerged_impl += Vec_IntSize(vImpl) - 1; + } + + + + + } + + +} +void Bnd_ManPrintMappings() +{ + Vec_Ptr_t* vBmiter2Spec = pBnd -> vBmiter2Spec; + Vec_Ptr_t* vBmiter2Impl = pBnd -> vBmiter2Impl; + Vec_Int_t* vIds_spec, *vIds_impl; + int k, id; + for( int j=0; j < Vec_PtrSize(vBmiter2Spec); j++ ) + { + printf("node %d: ", j); + vIds_spec = Vec_PtrEntry( vBmiter2Spec, j); + vIds_impl = Vec_PtrEntry( vBmiter2Impl, j); + Vec_IntForEachEntry(vIds_spec, id, k) + printf("%d ", id); + printf("| "); + Vec_IntForEachEntry(vIds_impl, id, k) + printf("%d ", id); + printf("\n"); + } + +} + +void Bnd_ManPrintBound() +{ + + printf("%d nodes merged in spec\n", pBnd ->nMerged_spec - Vec_IntSize(pBnd->vBI) - Vec_IntSize(pBnd->vBO) ); + printf("%d nodes merged in impl\n", pBnd ->nMerged_impl ); + + printf("BI spec:"); Vec_IntPrint(pBnd -> vBI); + printf("BO spec:"); Vec_IntPrint(pBnd -> vBO); + printf("\nEI spec:"); Vec_IntPrint(pBnd -> vEI_spec); + printf("EI impl:"); Vec_IntPrint(pBnd -> vEI_impl); + printf("EI phase:"); Vec_BitPrint(pBnd -> vEI_phase); + printf("\nEO spec:"); Vec_IntPrint(pBnd -> vEO_spec); + printf("EO impl:"); Vec_IntPrint(pBnd -> vEO_impl); + printf("EO phase:"); Vec_BitPrint(pBnd -> vEO_phase); +} + +void Bnd_ManPrintStats() +{ + Bnd_Man_t* p = pBnd; + + // #internal + // nBI, nBO + // nBI_miss, nBO_miss + // nAI, nAO, nExtra + // #spec, #impl, #patched + + // combLoop_spec, combLoop_impl + + // eq_out, eq_res + // status + + // #different choice of impl on boundary + + printf("\nRESULT\n"); + printf("%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d\n", + p->nInternal, + p->nBI, p->nBO, + p->nBI_miss, p->nBO_miss, + Vec_IntSize(p->vEI_spec), Vec_IntSize(p->vEO_spec), p->nExtra, + p->nNode_spec, p->nNode_impl, p->nNode_patched, + p->combLoop_spec, p->combLoop_impl, + p->eq_out, p->eq_res, + p->status, + p->nChoice + ); +} + +/**Function************************************************************* + + Synopsis [] + + Description [check if the given boundary is valid. Return 0 if + the boundary is invalid. Return k if the boundary is valid and + there're k boundary inputs. ] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +int Bnd_ManCheckBound( Gia_Man_t * p ) +{ + int i; + Gia_Obj_t *pObj; + int valid = 1; + pBnd -> nBI = 0; + pBnd -> nBO = 0; + pBnd -> nInternal = 0; + + printf( "Checking boundary... \n"); + + Vec_Int_t *vPath; + vPath = Vec_IntAlloc( Gia_ManObjNum(p) ); + Vec_IntFill( vPath, Gia_ManObjNum(p), 0 ); + int path; + + Gia_ManForEachObjReverse1( p , pObj, i ) + { + if ( Gia_ObjIsCo( pObj ) ) + { + Vec_IntSetEntry( vPath, Gia_ObjId( p, pObj ), 1 ); + } + + path = Vec_IntEntry( vPath, Gia_ObjId(p, pObj) ); + // printf("path = %d\n", path); + + if ( path >= 8 ) + { + valid = 0; + printf("there're more than 2 bufs in a path\n"); + break; + } + + + if( Gia_ObjIsBuf( pObj ) ) + { + Vec_IntSetEntry( vPath, Gia_ObjId( p, Gia_ObjFanin0( pObj ) ), Vec_IntEntry( vPath, Gia_ObjId(p, Gia_ObjFanin0( pObj ) ) ) | path << 1 ); + if ( path == 1 ) // boundary input + { + // TODO: record BIs here since they may not be in the first n buffers + pBnd -> nBO ++; + } + } + else if ( Gia_ObjFaninNum( p, pObj ) >= 1 ) + { + Vec_IntSetEntry( vPath, Gia_ObjId( p, Gia_ObjFanin0( pObj ) ), Vec_IntEntry( vPath, Gia_ObjId(p, Gia_ObjFanin0( pObj ) ) ) | path ); + if ( Gia_ObjFaninNum( p, pObj ) >= 2 ) + { + assert( Gia_ObjFaninNum( p, pObj ) <= 2 ); + Vec_IntSetEntry( vPath, Gia_ObjId( p, Gia_ObjFanin1( pObj ) ), Vec_IntEntry( vPath, Gia_ObjId(p, Gia_ObjFanin1( pObj ) ) ) | path ); + } + if ( path == 2 ) // inside boundary + { + // TODO: record BIs here since they may not be in the first n buffers + pBnd -> nInternal ++; + } + } + else // PI or const, check validity + { + if ( (Vec_IntEntry( vPath, Gia_ObjId(p, pObj) ) | 5) != 5 ) + { + valid = 0; + printf("incorrect buf number at pi %d\n", Vec_IntEntry(vPath, Gia_ObjId(p, pObj)) ); + break; + } + } + } + + pBnd -> nBI = Gia_ManBufNum(p) - pBnd -> nBO; + + if ( !valid ) + { + printf("invalid boundary\n"); + return 0; + } + else + { + printf("valid boundary ("); + printf("#BI = %d\t#BO = %d\t", pBnd -> nBI, Gia_ManBufNum(p)- pBnd -> nBI); + printf("#Internal = %d)\n", pBnd -> nInternal ); + assert( pBnd -> nBI > 0 ); + return pBnd -> nBI; + } +} + + +int Bnd_CheckFlagRec( Gia_Man_t *p, Gia_Obj_t *pObj, Vec_Int_t* vFlag ) +{ + int id = Gia_ObjId(p, pObj); + if ( Vec_IntEntry(vFlag, id) == 1 ) return 1; + if ( Vec_IntEntry(vFlag, id) == 2 ) return 0; + + Vec_IntSetEntry(vFlag, id, 1); + + int ret = 1; + for( int i = 0; i < Gia_ObjFaninNum(p, pObj); i++ ) + { + if ( !Bnd_CheckFlagRec( p, Gia_ObjFanin(pObj, i), vFlag ) ) + { + ret = 0; + break; + } + } + return ret; + +} + +/**Function************************************************************* + + Synopsis [] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +int Bnd_ManCheckExtBound( Gia_Man_t * p, Vec_Int_t *vEI, Vec_Int_t *vEO ) +{ + Vec_Int_t *vFlag = Vec_IntAlloc( Gia_ManObjNum(p) ); + Vec_IntFill( vFlag, Gia_ManObjNum(p), 0 ); + int success = 1; + int i, id; + + Vec_IntForEachEntry( vEO, id, i ) + { + Vec_IntSetEntry( vFlag, id, 2 ); + } + + Vec_IntForEachEntry( vEI, id, i ) + { + if ( Vec_IntEntry(vFlag, id) == 2 ) continue; // BI connected to BO directly + + if ( !Bnd_CheckFlagRec( p, Gia_ManObj(p, id), vFlag ) ) + { + success = 0; + break; + } + } + + + Vec_IntFree(vFlag); + return success; +} + + + +/**Function************************************************************* + + Synopsis [] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ + +void Bnd_ManFindBound( Gia_Man_t * p ) +{ + Vec_Int_t *vFlag; + Vec_Ptr_t *vQ; + Gia_Obj_t *pObj; + int i, j, id, cnt; + + Vec_Int_t *vAI = Vec_IntAlloc(16); + Vec_Int_t *vAO = Vec_IntAlloc(16); + + Vec_Int_t *vSpec2Impl = pBnd -> vSpec2Impl; + Vec_Bit_t *vSpec2Impl_phase = pBnd -> vSpec2Impl_phase; + Vec_Int_t *vBI = pBnd -> vBI; + Vec_Int_t *vBO = pBnd -> vBO; + Vec_Int_t *vEI_spec = pBnd -> vEI_spec; + Vec_Int_t *vEO_spec = pBnd -> vEO_spec; + Vec_Int_t *vEI_impl = pBnd -> vEI_impl; + Vec_Int_t *vEO_impl = pBnd -> vEO_impl; + Vec_Bit_t *vEI_phase = pBnd -> vEI_phase; + Vec_Bit_t *vEO_phase = pBnd -> vEO_phase; + + + // prepare to compute extended boundary + vQ = Vec_PtrAlloc(16); + vFlag = Vec_IntAlloc( Gia_ManObjNum(p) ); + Vec_IntFill( vFlag, Gia_ManObjNum(p), 0 ); + + Gia_ManStaticFanoutStart(p); + + // save bo, bi + cnt = 0; + Gia_ManForEachBuf(p, pObj, i) + { + if ( cnt < pBnd -> nBI ) + { + Vec_IntPush( vBI, Gia_ObjId(p, pObj) ); + } + else + { + Vec_IntPush( vBO, Gia_ObjId(p, pObj) ); + } + cnt++; + } + printf("#BI = %d #BO = %d\n", Vec_IntSize(vBI), Vec_IntSize(vBO) ); + + // compute EO, travse with flag 1 + Vec_IntForEachEntry( vBO, id, i ) + { + if ( Vec_IntEntry( vSpec2Impl, id ) == -1 ) // BO not matched + { + Vec_PtrPush( vQ, Gia_ManObj(p, id) ); + } + else + { + Vec_IntPush(vEO_spec, id); + } + } + printf("%d BO doesn't match\n", Vec_PtrSize(vQ) ); + pBnd -> nBO_miss = Vec_PtrSize(vQ); + + int cnt_extra = - Vec_PtrSize(vQ); + while( Vec_PtrSize(vQ) > 0 ) + { + pObj = Vec_PtrPop(vQ); + id = Gia_ObjId( p, pObj ); + + if ( Vec_IntEntry( vFlag, id ) == 1 ) continue; + Vec_IntSetEntry( vFlag, id, 1 ); + + // printf("%d\n", id); + + if ( Vec_IntEntry( vSpec2Impl, id ) != -1 ) // matched + { + Vec_IntPush( vEO_spec, id ); + Vec_IntPush( vAO, id ); + } + else + { + for( j = 0; j < Gia_ObjFanoutNum(p, pObj); j++ ) + { + Vec_PtrPush( vQ, Gia_ObjFanout(p, pObj, j) ); + // printf("\t%d\n", Gia_ObjId( p1, Gia_ObjFanout(p1, pObj, j) ) ); + } + } + } + // printf("%d AO found with %d extra nodes\n", Vec_IntSize(vAO) , cnt_extra ); + printf("%d AO found\n", Vec_IntSize(vAO) ); + + + // mark TFOC of BO with flag 1 to prevent them from being selected into EI + // stop at CO + Vec_IntForEachEntry( pBnd -> vBO, id, i ) + { + Vec_PtrPush( vQ, Gia_ManObj(p, id) ); + } + Vec_IntForEachEntry( vFlag, id, i ) + { + Vec_IntSetEntry( vFlag, id, 0 ); + } + while( Vec_PtrSize(vQ) > 0 ) + { + pObj = Vec_PtrPop(vQ); + id = Gia_ObjId( p, pObj ); + + if ( Vec_IntEntry( vFlag, id ) == 1 ) continue; + Vec_IntSetEntry( vFlag, id, 1 ); + + for( j = 0; j < Gia_ObjFanoutNum(p, pObj); j++ ) + { + Vec_PtrPush( vQ, Gia_ObjFanout(p, pObj, j) ); + } + } + + + + // compute EI, traverse with flag 2 + + // add unmatched BI to queue + Vec_IntForEachEntry( vBI, id, i ) + { + if ( Vec_IntEntry( vSpec2Impl, id ) == -1 ) // BO not matched + { + Vec_PtrPush( vQ, Gia_ManObj(p, id) ); + } + else + { + Vec_IntPush(vEI_spec, id); + } + } + printf("%d BI doesn't match\n", Vec_PtrSize(vQ) ); + pBnd -> nBI_miss = Vec_PtrSize(vQ); + cnt_extra -= Vec_PtrSize(vQ); + + // add AO to queue + Vec_IntForEachEntry( vAO, id, i ) + { + Vec_PtrPush( vQ, Gia_ManObj(p, id) ); + } + + // set flag 2 for BO + Vec_IntForEachEntry( vBO, id, i ) + { + Vec_IntSetEntry( vFlag, id, 2 ); + } + + // traverse down from AI and unmatched BI + while( Vec_PtrSize(vQ) > 0 ) + { + pObj = Vec_PtrPop(vQ); + id = Gia_ObjId( p, pObj ); + + if ( Vec_IntEntry( vFlag, id ) == 2 ) continue; + cnt_extra ++; + + // printf("%d\n", id); + + if ( Vec_IntEntry(vFlag, id) != 1 && Vec_IntEntry( vSpec2Impl, id ) != -1 ) // matched + { + Vec_IntPush( vEI_spec, id ); + Vec_IntPush( vAI, id ); + } + else + { + for( j = 0; j < Gia_ObjFaninNum(p, pObj); j++ ) + { + Vec_PtrPush( vQ, Gia_ObjFanin(pObj, j) ); + // printf("\t%d\n", Gia_ObjId( p1, Gia_ObjFanout(p1, pObj, j) ) ); + } + } + + Vec_IntSetEntry( vFlag, id, 2 ); + } + printf("%d AI found with %d extra nodes in total\n", Vec_IntSize(vAI) , cnt_extra ); + pBnd -> nExtra = cnt_extra; + + + // gen vEI_impl, vEO_impl, vEI_phase, vEO_phase + Vec_IntForEachEntry( vEI_spec, id, i ) + { + Vec_IntPush( vEI_impl, Vec_IntEntry( vSpec2Impl, id ) ); + Vec_BitPush( vEI_phase, Vec_BitEntry( vSpec2Impl_phase, id ) ); + } + Vec_IntForEachEntry( vEO_spec, id, i ) + { + Vec_IntPush( vEO_impl, Vec_IntEntry( vSpec2Impl, id ) ); + Vec_BitPush( vEO_phase, Vec_BitEntry( vSpec2Impl_phase, id ) ); + } + + + // count number of choice of boundary in impl + Vec_IntForEachEntry( vEI_spec, id, i ) + { + pBnd -> nChoice += Vec_IntEntry( pBnd -> vSpec2Impl_diff, id ); + } + Vec_IntForEachEntry( vEO_spec, id, i ) + { + pBnd -> nChoice += Vec_IntEntry( pBnd -> vSpec2Impl_diff, id ); + } + + + // print + pBnd -> status = 1; + printf("#EI = %d\t#EO = %d\t#Extra Node = %d\n", Vec_IntSize(vEI_spec) , Vec_IntSize(vEO_spec), cnt_extra ); + Bnd_ManPrintBound(); + + // check boundary has comb loop + if ( !Bnd_ManCheckExtBound( p, vEI_spec, vEO_spec ) ) + { + printf("Combinational loop exist\n"); + pBnd -> combLoop_spec = 1; + } + + + // clean up + Vec_IntFree(vAI); + Vec_IntFree(vAO); +} + + + + +/**Function************************************************************* + + Synopsis [] + + Description [create circuit with the boundary changed to CI/CO] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ + +Gia_Man_t* Bnd_ManCutBoundary( Gia_Man_t *p, Vec_Int_t* vEI, Vec_Int_t* vEO, Vec_Bit_t* vEI_phase, Vec_Bit_t* vEO_phase ) +{ + Gia_Man_t * pNew, * pTemp; + Gia_Obj_t * pObj; + int i, id, lit; + + // check if the boundary has loop (EO cannot be in the TFC of EI ) + if ( !Bnd_ManCheckExtBound( p, vEI, vEO ) ) + { + printf("Combinational loop exist\n"); + pBnd -> combLoop_impl = 1; + return 0; + } + + + // initialize + pNew = Gia_ManStart( Gia_ManObjNum(p) ); + pNew -> pName = ABC_ALLOC( char, strlen(p->pName)+10); + sprintf( pNew -> pName, "%s_out", p -> pName ); + Gia_ManHashStart( pNew ); + Gia_ManConst0(p) -> Value = 0; + Gia_ManCleanValue(p); + + + // create ci for ci and eo + Gia_ManForEachCi( p, pObj, i ) + { + pObj -> Value = Gia_ManAppendCi( pNew ); + } + Vec_IntForEachEntry( vEO, id, i ) + { + Gia_ManObj( p, id ) -> Value = Gia_ManAppendCi(pNew); + if ( vEO_phase && Vec_BitEntry( vEO_phase, i ) ) + { + Gia_ManObj( p, id ) -> Value ^= 1; + } + } + + // TODO: consider where EI and EO share the same node + + // add aig nodes + Gia_ManForEachAnd(p, pObj, i) + { + if ( pObj -> Value ) continue; + pObj -> Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); + } + + // create co for co and ei + Gia_ManForEachCo(p, pObj, i) + { + Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ); + } + Vec_IntForEachEntry( vEI, id, i ) + { + lit = Gia_ManObj(p, id)->Value; + // lit = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); + if ( vEI_phase && Vec_BitEntry( vEI_phase, i ) ) lit ^= 1; + Gia_ManAppendCo( pNew, lit ); + } + + // clean up + Gia_ManHashStop( pNew ); + pNew = Gia_ManCleanup( pTemp = pNew ); + Gia_ManStop( pTemp ); + return pNew; + +} + +Gia_Man_t* Bnd_ManGenSpecOut( Gia_Man_t* p ) +{ + printf("Generating spec_out with given boundary.\n"); + Gia_Man_t *pNew = Bnd_ManCutBoundary( p, pBnd->vEI_spec, pBnd->vEO_spec, 0, 0 ); + return pNew; +} +Gia_Man_t* Bnd_ManGenImplOut( Gia_Man_t* p ) +{ + printf("Generating impl_out with given boundary.\n"); + Gia_Man_t *pNew = Bnd_ManCutBoundary( p, pBnd->vEI_impl, pBnd->vEO_impl, pBnd->vEI_phase, pBnd->vEO_phase ); + if ( pNew ) pBnd -> status = 2; + else pBnd -> combLoop_impl = 1; + return pNew; +} + +void Bnd_AddNodeRec( Gia_Man_t *p, Gia_Man_t *pNew, Gia_Obj_t *pObj ) +{ + // TODO does this mean constant zero node? + if ( pObj -> Value != 0 || Gia_ObjIsConst0(pObj) ) return; + + for( int i = 0; i < Gia_ObjFaninNum(p, pObj); i++ ) + { + Bnd_AddNodeRec( p, pNew, Gia_ObjFanin(pObj, i) ); + } + + if ( Gia_ObjIsAnd(pObj) ) + { + pObj -> Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); + } + else + { + if ( Gia_ObjIsCi(pObj) ) + { + printf("Ci with value 0 encountered (id = %d)\n", Gia_ObjId(p, pObj) ); + } + assert( Gia_ObjIsCo(pObj) ); + pObj -> Value = Gia_ObjFanin0Copy(pObj); + } +} + +Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPatch ) +{ + + Gia_Man_t * pNew, * pTemp; + Gia_Obj_t * pObj; + int i, id, cnt; + Vec_Int_t *vBI_patch, *vBO_patch; + + printf("Generating patched implementation\n"); + pBnd -> nNode_patch = Gia_ManAndNotBufNum( pPatch ); + + pNew = Gia_ManStart( Gia_ManObjNum(pOut) + Gia_ManObjNum( pSpec ) + Gia_ManObjNum(pPatch) ); + pNew -> pName = ABC_ALLOC( char, strlen(pOut->pName)+3); + sprintf( pNew -> pName, "%s_p", pOut -> pName ); + Gia_ManHashStart( pNew ); + Gia_ManCleanValue(pOut); + Gia_ManCleanValue(pSpec); + Gia_ManCleanValue(pPatch); + + // get bi and bo in patch + cnt = 0; + vBI_patch = Vec_IntAlloc(16); + vBO_patch = Vec_IntAlloc(16); + Gia_ManForEachBuf( pPatch, pObj, i ) + { + if ( cnt < pBnd -> nBI ) + { + Vec_IntPush( vBI_patch, Gia_ObjId( pPatch, pObj ) ); + } + else + { + + Vec_IntPush( vBO_patch, Gia_ObjId( pPatch, pObj ) ); + } + cnt ++; + } + assert( Vec_IntSize( vBI_patch ) == Vec_IntSize(pBnd->vBI) ); + assert( Vec_IntSize( vBO_patch ) == Vec_IntSize(pBnd->vBO) ); + assert( Bnd_ManCheckBound(pPatch) != 0 ); + + + // add Impl (real) PI + for ( i = 0; i < Gia_ManCiNum(pSpec); i++ ) + { + pObj = Gia_ManCi(pOut, i); + pObj -> Value = Gia_ManAppendCi( pNew ); + } + + // add Impl EI to CI + printf("adding EI to CI in Impl\n"); + for ( i = 0; i < Vec_IntSize( pBnd -> vEI_spec ); i++ ) + { + pObj = Gia_ManCo(pOut, i + Gia_ManCoNum(pSpec) ); + Bnd_AddNodeRec( pOut, pNew, pObj ); + + // set Spec EI + Gia_ManObj( pSpec, Vec_IntEntry(pBnd -> vEI_spec, i) ) -> Value = pObj -> Value; + printf("%d ", pObj->Value); + } + printf("\n"); + + // add Spec BI to EI + printf("adding BI to EI in Spec\n"); + Vec_IntForEachEntry( pBnd -> vBI, id, i ) + { + pObj = Gia_ManObj( pSpec, id ); + Bnd_AddNodeRec( pSpec, pNew, pObj ); + + // set patch bi + Gia_ManObj( pPatch, Vec_IntEntry( vBI_patch, i) ) -> Value = pObj -> Value; + printf("%d ", pObj->Value); + } + printf("\n"); + + // check + // cnt = 0; + // Gia_ManForEachBuf( pPatch, pObj, i ) + // { + // if ( cnt < pBnd -> nBI ) + // { + // assert(pObj -> Value != 0); + // } + // cnt++; + // } + + // add Patch BO to BI + printf("adding BO to BI in Patch\n"); + Vec_IntForEachEntry( vBO_patch, id, i ) + { + pObj = Gia_ManObj( pPatch, id ); + Bnd_AddNodeRec( pPatch, pNew, pObj ); + + // set spec bo + Gia_ManObj( pSpec, Vec_IntEntry( pBnd -> vBO, i) ) -> Value = pObj -> Value; + printf("%d ", pObj->Value); + } + printf("\n"); + + // add Spec EO to BO + printf("adding EO to BO in Spec\n"); + Vec_IntForEachEntry( pBnd -> vEO_spec, id, i ) + { + pObj = Gia_ManObj( pSpec, id ); + Bnd_AddNodeRec( pSpec, pNew, pObj ); + + // set impl EO (PI) + Gia_ManCi( pOut, i + Gia_ManCiNum(pSpec) ) -> Value = pObj -> Value; + printf("%d ", pObj->Value); + } + printf("\n"); + + // add Impl (real) PO to EO + printf("adding CO to EO in Impl\n"); + for ( i = 0; i < Gia_ManCoNum(pSpec); i++ ) + { + pObj = Gia_ManCo( pOut, i ); + Bnd_AddNodeRec( pOut, pNew, pObj ); + Gia_ManAppendCo( pNew, pObj->Value ); + printf("%d ", pObj->Value); + } + printf("\n"); + + + // clean up + Vec_IntFree( vBI_patch ); + Vec_IntFree( vBO_patch ); + Gia_ManHashStop( pNew ); + + pNew = Gia_ManCleanup( pTemp = pNew ); + Gia_ManStop( pTemp ); + + pBnd -> nNode_patched = Gia_ManAndNum( pNew ); + pBnd -> status = 3; + + return pNew; +} + + + + + +//////////////////////////////////////////////////////////////////////// +/// END OF FILE /// +//////////////////////////////////////////////////////////////////////// + + +ABC_NAMESPACE_IMPL_END \ No newline at end of file diff --git a/src/aig/gia/giaDup.c b/src/aig/gia/giaDup.c index 37b3e8e3b8..bdcbb970e7 100644 --- a/src/aig/gia/giaDup.c +++ b/src/aig/gia/giaDup.c @@ -30,12 +30,8 @@ ABC_NAMESPACE_IMPL_START /// DECLARATIONS /// //////////////////////////////////////////////////////////////////////// -Vec_Ptr_t* vBmiter2Spec; -Vec_Ptr_t* vBmiter2Impl; -Vec_Int_t* vPatch2Impl; -Vec_Bit_t* vImpl2Spec_phase; -Vec_Int_t* vBI_patch; -Vec_Int_t* vBO_patch; + +extern Bnd_Man_t* pBnd; //////////////////////////////////////////////////////////////////////// /// FUNCTION DEFINITIONS /// @@ -5674,9 +5670,9 @@ Gia_Man_t * Gia_ManDupAddFlop( Gia_Man_t * p ) SeeAlso [] ***********************************************************************/ -Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, int biNum) +Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose ) { - Vec_Int_t * vLits; + // Vec_Int_t * vLits; Gia_Man_t * pNew, * pTemp; Gia_Obj_t * pObj; int i, iLit; @@ -5694,7 +5690,7 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, assert( Gia_ManRegNum(p2) == 0 ); assert( Gia_ManCiNum(p1) == Gia_ManCiNum(p2) ); assert( Gia_ManCoNum(p1) == Gia_ManCoNum(p2) ); - vLits = Vec_IntAlloc( Gia_ManBufNum(p1) ); + // vLits = Vec_IntAlloc( Gia_ManBufNum(p1) ); if ( fVerbose ) printf( "Creating a boundary miter with %d inputs, %d outputs, and %d buffers.\n", Gia_ManCiNum(p1), Gia_ManCoNum(p1), Gia_ManBufNum(p1) ); @@ -5705,58 +5701,44 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, Gia_ManConst0(p1)->Value = 0; Gia_ManConst0(p2)->Value = 0; - // allocate vImpl2Spec_phase; - vImpl2Spec_phase = Vec_BitAlloc( Gia_ManObjNum(p2) ); - Vec_BitFill( vImpl2Spec_phase, Gia_ManObjNum(p2), 0 ); - // allocate vBmiter2Impl and vBmiter2Spec - Vec_Int_t* pVec_Int; - vBmiter2Impl = Vec_PtrAlloc( (Gia_ManObjNum(p2) + Gia_ManObjNum(p1)) ); - Vec_PtrFill( vBmiter2Impl, (Gia_ManObjNum(p2) + Gia_ManObjNum(p1)), 0 ); - Vec_PtrForEachEntry( Vec_Int_t*, vBmiter2Impl, pVec_Int, i) - { - Vec_PtrSetEntry(vBmiter2Impl, i, Vec_IntAlloc(2) ); - } - vBmiter2Spec = Vec_PtrAlloc( (Gia_ManObjNum(p2) + Gia_ManObjNum(p1)) ); - Vec_PtrFill( vBmiter2Spec, (Gia_ManObjNum(p2) + Gia_ManObjNum(p1)), 0 ); - Vec_PtrForEachEntry( Vec_Int_t*, vBmiter2Spec, pVec_Int, i) + for( int i = 0; i < Gia_ManCiNum(p1); i++ ) { - Vec_PtrSetEntry(vBmiter2Spec, i, Vec_IntAlloc(2) ); - } + int iLit = Gia_ManCi(p1, i)->Value = Gia_ManCi(p2, i) -> Value = Gia_ManAppendCi(pNew); + + pObj = Gia_ManCi(p1, i); + Bnd_ManMap( iLit, Gia_ObjId( p1, pObj ), 1 ); + + pObj = Gia_ManCi(p2, i); + Bnd_ManMap( iLit, Gia_ObjId( p2, pObj) , 0 ); - Gia_ManForEachCi( p1, pObj, i ) - { - pObj->Value = Gia_ManCi(p2, i)->Value = Gia_ManAppendCi( pNew ); - Vec_IntPush( Vec_PtrEntry(vBmiter2Spec, pObj->Value >> 1), Gia_ObjId(p1, pObj) ); - Vec_IntPush( Vec_PtrEntry(vBmiter2Impl, pObj->Value >> 1), Gia_ObjId(p1, pObj) ); // same pi id in impl and spec } - // TODO: record the corresponding impl node of each lit + // record the corresponding impl node of each lit Gia_ManForEachAnd( p2, pObj, i ) { pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); - Vec_IntPush( Vec_PtrEntry(vBmiter2Impl, pObj->Value >> 1), Gia_ObjId(p2, pObj) ); + Bnd_ManMap( pObj -> Value, Gia_ObjId(p2, pObj), 0 ); } - // TODO: record hashed equivalent nodes - Gia_ManForEachAnd( p1, pObj, i ) { + // record hashed equivalent nodes + Gia_ManForEachAnd( p1, pObj, i ) + { pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); - Vec_IntPush( Vec_PtrEntry(vBmiter2Spec, pObj->Value >> 1), Gia_ObjId(p1, pObj) ); + Bnd_ManMap( pObj -> Value, Gia_ObjId(p1, pObj), 1 ); } Gia_ManForEachCo( p2, pObj, i ) { - int id = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ) >> 1; - Vec_IntPush( Vec_PtrEntry(vBmiter2Impl, id), Gia_ObjId(p2, pObj) ); + iLit = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ); } Gia_ManForEachCo( p1, pObj, i ) { - int id = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ) >> 1; - Vec_IntPush( Vec_PtrEntry(vBmiter2Spec, id), Gia_ObjId(p1, pObj) ); + iLit = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ); } - Vec_IntForEachEntry( vLits, iLit, i ) - Gia_ManAppendCo( pNew, iLit ); - Vec_IntFree( vLits ); + // Vec_IntForEachEntry( vLits, iLit, i ) + // Gia_ManAppendCo( pNew, iLit ); + // Vec_IntFree( vLits ); Gia_ManHashStop( pNew ); pNew = Gia_ManCleanup( pTemp = pNew ); Gia_ManStop( pTemp ); @@ -5896,538 +5878,6 @@ Gia_Man_t * Gia_ManMiterFromBMiter( Gia_Man_t * p, int nPo ) return pNew; } -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Gia_Man_t * Gia_ManPatch( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, int biNum) -{ - Vec_Int_t * vLits; - Gia_Man_t * pNew, * pTemp; - Gia_Obj_t * pObj; - int i, iLit; - if ( Gia_ManBufNum(p1) == 0 ) { - printf( "The first AIG should have a boundary.\n" ); - return NULL; - } - if ( Gia_ManBufNum(p2) == 0 ) { - printf( "The second AIG should have a boundary.\n" ); - return NULL; - } - assert( Gia_ManBufNum(p1) > 0 ); - assert( Gia_ManBufNum(p2) > 0 ); - assert( Gia_ManBufNum(p1) == Gia_ManBufNum(p2) ); - assert( Gia_ManRegNum(p1) == 0 ); - assert( Gia_ManRegNum(p2) == 0 ); - assert( Gia_ManCiNum(p1) == Gia_ManCiNum(p2) ); - assert( Gia_ManCoNum(p1) == Gia_ManCoNum(p2) ); - if ( fVerbose ) - printf( "Mapping spec to patch with %d inputs, %d outputs, and %d buffers.\n", - Gia_ManCiNum(p1), Gia_ManCoNum(p1), Gia_ManBufNum(p1) ); - pNew = Gia_ManStart( Gia_ManObjNum(p2) ); - pNew->pName = ABC_ALLOC( char, strlen(p1->pName) + 10 ); - sprintf( pNew->pName, "%s_patch", p1->pName ); - Gia_ManHashStart( pNew ); - Gia_ManConst0(p1)->Value = 0; - Gia_ManConst0(p2)->Value = 0; - - // add patch aig first - // record lit -> patch id - Vec_Int_t* vVar2Patch = Vec_IntAlloc( Gia_ManObjNum(p2) ); - Vec_IntFill( vVar2Patch, Gia_ManObjNum(p2), -1 ); - - Gia_ManForEachCi( p2, pObj, i ) - { - pObj->Value = Gia_ManCi(p1, i)->Value = Gia_ManAppendCi( pNew ); - Vec_IntSetEntry( vVar2Patch, pObj->Value >> 1, Gia_ObjId( p2, pObj ) ); - } - Gia_ManForEachAnd( p2, pObj, i ) - { - pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); - printf( "\t%d: %d %d\n", Gia_ObjId( p2, pObj), Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); - Vec_IntSetEntry( vVar2Patch, pObj->Value >> 1, Gia_ObjId( p2, pObj ) ); - } - - - // alloc vCompl; - Vec_Bit_t * vComplBuf = Vec_BitAlloc(Gia_ManBufNum(p1)); - Vec_Bit_t * vCompl = Vec_BitAlloc(Gia_ManObjNum(p1)); - Vec_BitFill( vCompl, Gia_ManObjNum(p1), 0 ); - Gia_ManForEachBuf( p2, pObj, i ) - { - printf("\tbuf compl %d: %d\n", Gia_ObjId(p2, pObj), Gia_ObjFaninC0(pObj)); - Vec_BitPush( vComplBuf, Gia_ObjFaninC0(pObj) ); - } - int cnt = 0; - Gia_ManForEachBuf( p1, pObj, i ) - { - printf("\tbuf compl %d: %d\n", Gia_ObjId(p1, pObj), Gia_ObjFaninC0(pObj)); - if ( Vec_BitEntry( vComplBuf, cnt ) || Gia_ObjFaninC0(pObj) ) - { - Vec_BitSetEntry( vCompl, Gia_ObjId( p1, pObj ), 1 ); - printf("\tset\n"); - } - cnt++; - } - - - - // mark the box in spec - Vec_Int_t* vFlagSpec = Vec_IntAlloc( Gia_ManObjNum(p1) ); // 1: bi, 2: inside the box, 3: bo - Vec_IntFill( vFlagSpec, Gia_ManObjNum(p1), 0 ); - int cnt_buf = 0; - Gia_ManForEachBuf( p1, pObj, i ) - { - if ( cnt_buf < biNum ) - { - Vec_IntSetEntry( vFlagSpec, Gia_ObjId(p1, Gia_ObjFanin0(pObj) ), 1 ); - } - else - { - Vec_IntSetEntry( vFlagSpec, Gia_ObjId(p1, Gia_ObjFanin0(pObj) ), 3 ); - } - cnt_buf ++; - } - - int fanin0, fanin1; - Gia_ManForEachAnd( p1, pObj, i ) - { - if ( Vec_IntEntry( vFlagSpec, Gia_ObjId(p1, pObj) ) != 0 ) continue ; - fanin0 = Vec_IntEntry( vFlagSpec, Gia_ObjId(p1, Gia_ObjFanin0(pObj) ) ); - fanin1 = Vec_IntEntry( vFlagSpec, Gia_ObjId(p1, Gia_ObjFanin1(pObj) ) ); - if ( fanin0 == 1 || fanin0 == 2 || fanin1 == 1 || fanin1 == 2 ) - Vec_IntSetEntry( vFlagSpec, Gia_ObjId(p1, pObj ), 2 ); - } - - - // compute spec2impl - Vec_Int_t* vSpec2Impl = Vec_IntAlloc( Gia_ManObjNum(p1) ); - Vec_IntFill( vSpec2Impl, Gia_ManObjNum(p1), -1 ); - Vec_Int_t* vSpec, *vImpl; - int j, id; - for ( i = 0; i < Vec_PtrSize( vBmiter2Spec ); i++ ) - { - vSpec = Vec_PtrEntry( vBmiter2Spec, i ); - vImpl = Vec_PtrEntry( vBmiter2Impl, i ); - Vec_IntForEachEntry( vSpec, id, j ) - { - if ( Vec_IntEntry( vSpec2Impl, id ) == -1 && Vec_IntSize( vImpl ) > 0 ) - { - Vec_IntSetEntry( vSpec2Impl, id, Vec_IntEntry( vImpl, 0 ) ); - } - } - } - - // print - // printf("spec 2 impl:\n"); - // Vec_IntForEachEntry( vSpec2Impl, id, i ) - // { - // printf( "\t%d:\t %d\n", i, id ); - // } - - // alloc patch2impl - vPatch2Impl = Vec_IntAlloc( Gia_ManObjNum(p2) ); - Vec_IntFill( vPatch2Impl, Gia_ManObjNum(p2), -1 ); - Vec_IntSetEntry( vPatch2Impl, 0, 0 ); - - Gia_ManForEachCi( p2, pObj, i ) - { - Vec_IntSetEntry( vVar2Patch, pObj->Value >> 1, pObj->Value >> 1); - Vec_IntSetEntry( vPatch2Impl, pObj->Value>>1, Vec_IntEntry( vSpec2Impl, pObj->Value>>1) ); - } - - // set the litral on the boundary of spec as in patch and record patch2impl - Vec_Int_t* vBufLit = Vec_IntAlloc( Gia_ManBufNum( p2 ) ); - vBI_patch = Vec_IntAlloc( Gia_ManBufNum(p2) ); - vBO_patch = Vec_IntAlloc( Gia_ManBufNum(p2) ); - cnt_buf = 0; - Gia_ManForEachBuf( p2, pObj, i ) - { - // TODO: check compl - Vec_IntPush( vBufLit, Gia_ObjFanin0( pObj ) -> Value ); - if ( cnt_buf < biNum ) - { - Vec_IntPush( vBI_patch, Gia_ObjFanin0( pObj) -> Value >> 1 ); - } - else - { - Vec_IntPush( vBO_patch, Gia_ObjFanin0( pObj) -> Value >> 1 ); - } - cnt_buf++; - } - Vec_Int_t* vSpec2Patch = Vec_IntAlloc( Gia_ManObjNum(p1) ); - Vec_IntFill( vSpec2Patch, Gia_ManObjNum(p1), -1 ); - - cnt_buf = 0; - Gia_Obj_t * pObj2; - - Gia_ManForEachBuf( p1, pObj, i ) - { - // TODO: compl? - pObj2 = Gia_ObjFanin0(pObj); - pObj2 -> Value = Vec_IntEntry( vBufLit, cnt_buf ); - Vec_IntSetEntry( vSpec2Patch, Gia_ObjId( p1, pObj2 ), Vec_IntEntry( vVar2Patch, pObj2->Value>>1 ) ); - // printf( "spec node %d -> patch node %d\n", Gia_ObjId( p1, pObj2 ), Vec_IntEntry( vVar2Patch, pObj2->Value>>1 ) ); - - Vec_IntSetEntry( vPatch2Impl, pObj2 -> Value>>1, Vec_IntEntry( vSpec2Impl, Gia_ObjId(p1, pObj2) ) ); - pObj->Value = pObj2->Value; - cnt_buf++; - } - - - // hash the area outside the box in spec and record patch2impl - int lit0, lit1; - Gia_ManForEachAnd( p1, pObj, i ) { - printf( "spec node %d(%d) = %d %d\n", Gia_ObjId( p1, pObj ), Vec_IntEntry( vFlagSpec, Gia_ObjId(p1, pObj)), Gia_ObjId( p1, Gia_ObjFanin0(pObj) ), Gia_ObjId( p1, Gia_ObjFanin1(pObj) ) ); - if ( Vec_IntEntry( vFlagSpec, Gia_ObjId(p1, pObj) ) > 1 ) continue; - if ( Gia_ObjIsBuf(pObj) ) continue; - - lit0 = Gia_ObjFanin0Copy(pObj); - lit1 = Gia_ObjFanin1Copy(pObj); - if ( Vec_BitEntry( vCompl, Gia_ObjId(p1, Gia_ObjFanin0(pObj) ) ) ) lit0 ^= 1; - if ( Vec_BitEntry( vCompl, Gia_ObjId(p1, Gia_ObjFanin1(pObj) ) ) ) lit1 ^= 1; - pObj->Value = Gia_ManHashAnd( pNew, lit0, lit1 ); - - - assert( (pObj->Value>>1) < Vec_IntSize( vVar2Patch) ); - assert( Vec_IntEntry( vVar2Patch, pObj->Value>>1 ) != -1 ); - - Vec_IntSetEntry( vSpec2Patch, Gia_ObjId( p1, pObj ), Vec_IntEntry( vVar2Patch, pObj->Value>>1 ) ); - printf( "spec node %d -> patch node %d\n", Gia_ObjId( p1, pObj ), Vec_IntEntry( vVar2Patch, pObj->Value>>1 ) ); - - Vec_IntSetEntry( vPatch2Impl, pObj->Value >> 1, Vec_IntEntry( vSpec2Impl, Gia_ObjId(p1, pObj) ) ); - } - - - // print - printf("patch 2 impl:\n"); - Vec_IntForEachEntry( vPatch2Impl, id, i ) - { - printf( "\t%d:\t %d\n", i, id ); - } - - // handle co - Gia_ManForEachCo( p2, pObj, i ) - { - int id = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ) >> 1; - } - // TODO: also check spec CO - // Gia_ManForEachCo( p1, pObj, i ) - // { - // int id = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ) >> 1; - // Vec_IntPush( Vec_PtrEntry(vBmiter2Spec, id), Gia_ObjId(p1, pObj) ); - // } - - Gia_ManHashStop( pNew ); - pNew = Gia_ManCleanup( pTemp = pNew ); - Gia_ManStop( pTemp ); - return pNew; -} - - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ - -Gia_Man_t * Gia_ManPatchImpl( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, int biNum) -{ - Vec_Int_t * vLits; - Gia_Man_t * pNew, * pTemp; - Gia_Obj_t * pObj, *pObj2; - int i, j, iLit, id, id2; - assert( Gia_ManRegNum(p1) == 0 ); - assert( Gia_ManRegNum(p2) == 0 ); - assert( Gia_ManCiNum(p1) == Gia_ManCiNum(p2) ); - assert( Gia_ManCoNum(p1) == Gia_ManCoNum(p2) ); - if ( fVerbose ) - printf( "Mapping spec to patch with %d inputs, %d outputs, and %d buffers.\n", - Gia_ManCiNum(p1), Gia_ManCoNum(p1), Gia_ManBufNum(p1) ); - pNew = Gia_ManStart( Gia_ManObjNum(p2) ); - pNew->pName = ABC_ALLOC( char, strlen(p1->pName) + 10 ); - sprintf( pNew->pName, "%s_patch", p1->pName ); - Gia_ManHashStart( pNew ); - Gia_ManConst0(p1)->Value = 0; - Gia_ManConst0(p2)->Value = 0; - - - // p1: patch - // p2: impl - - // compute extended box - - Gia_ManStaticFanoutStart( p1 ); - Vec_Ptr_t* vBO = Vec_PtrAlloc(16); - Vec_Ptr_t* vBI = Vec_PtrAlloc(16); - Vec_Ptr_t* vAO = Vec_PtrAlloc(16); - Vec_Ptr_t* vAI = Vec_PtrAlloc(16); - - - - Vec_Ptr_t* vQ = Vec_PtrAlloc(16); - Vec_Int_t* vFlag = Vec_IntAlloc( Gia_ManObjNum(p1) ); - Vec_IntFill( vFlag, Gia_ManObjNum(p1), 0 ); - Vec_IntForEachEntry( vBO_patch, id, i ) - { - if ( Vec_IntEntry( vPatch2Impl, id ) == -1 ) // if no match on the boundary - Vec_PtrPush( vQ, p1->pObjs+id ); - else - Vec_PtrPush( vBO, p1->pObjs+id ); - } - - while( Vec_PtrSize(vQ) > 0 ) - { - pObj = Vec_PtrPop(vQ); - id = Gia_ObjId( p1, pObj ); - - if ( Vec_IntEntry( vFlag, id ) == 1 ) continue; - Vec_IntSetEntry( vFlag, id, 1 ); - - printf("%d\n", id); - - if ( Vec_IntEntry( vPatch2Impl, id ) != -1 ) // matched - { - Vec_PtrPush( vAO, pObj ); - } - else - { - for( j = 0; j < Gia_ObjFanoutNum(p1, pObj); j++ ) - { - Vec_PtrPush( vQ, Gia_ObjFanout(p1, pObj, j) ); - printf("\t%d\n", Gia_ObjId( p1, Gia_ObjFanout(p1, pObj, j) ) ); - } - - } - } - - // set flag 2 for FOC - Vec_IntForEachEntry( vBO_patch, id, i ) - { - Vec_PtrPush( vQ, p1->pObjs+id ); - } - while( Vec_PtrSize(vQ) > 0 ) - { - pObj = Vec_PtrPop(vQ); - id = Gia_ObjId( p1, pObj ); - - if ( Vec_IntEntry( vFlag, Gia_ObjId(p1, pObj) ) == 2 ) continue; - Vec_IntSetEntry( vFlag, Gia_ObjId(p1, pObj), 2 ); - - for( j = 0; j < Gia_ObjFanoutNum(p1, pObj); j++ ) - { - Vec_PtrPush( vQ, Gia_ObjFanout(p1, pObj, j) ); - } - } - - // set flag 3 for BO - Vec_IntForEachEntry( vBO_patch, id, i ) - { - Vec_IntSetEntry( vFlag, id, 3 ); - } - - // traverse down from unmated BI and AO - Vec_IntForEachEntry( vBI_patch, id, i ) - { - if ( Vec_IntEntry( vPatch2Impl, id ) == -1 ) // if no match on the boundary - Vec_PtrPush( vQ, p1->pObjs+id ); - else - Vec_PtrPush( vBI, p1->pObjs+id ); - } - Vec_PtrForEachEntry( Gia_Obj_t*, vAO, pObj, i ) - { - Vec_PtrPush( vQ, pObj ); - } - - // traverse down - printf("traverse down\n"); - while ( Vec_PtrSize(vQ) != 0 ) - { - pObj = Vec_PtrPop(vQ); - id = Gia_ObjId( p1, pObj ); - if ( Vec_IntEntry( vFlag, id ) == 4 ) continue; - - printf("%d\n", id); - - if ( Vec_IntEntry( vPatch2Impl, id ) != -1 && Vec_IntEntry( vFlag, id ) < 2 ) // matched - { - Vec_PtrPush( vAI, pObj ); - printf("matched\n"); - } - else if ( Vec_IntEntry( vFlag, id ) < 3 ) - { - if ( Gia_ObjFaninNum(p1, pObj) > 0 ) - { - Vec_PtrPush( vQ, Gia_ObjFanin0(pObj) ); - printf("\t%d\n", Gia_ObjId( p1, Gia_ObjFanin0(pObj) ) ); - } - - if ( Gia_ObjFaninNum(p1, pObj) > 1 ) - { - Vec_PtrPush( vQ, Gia_ObjFanin1(pObj) ); - printf("\t%d\n", Gia_ObjId( p1, Gia_ObjFanin1(pObj) ) ); - } - } - printf("2impl / flag: %d / %d\n", Vec_IntEntry( vPatch2Impl, id ), Vec_IntEntry( vFlag, id ) ); - - Vec_IntSetEntry( vFlag, id, 4 ); - } - - - // print - printf( "matched BI:"); - Vec_PtrForEachEntry( Gia_Obj_t*, vBI, pObj, i ) printf( " %d(%d)", Gia_ObjId( p1, pObj ), Vec_IntEntry( vPatch2Impl, Gia_ObjId(p1, pObj)) ); - printf("\nAI:"); - Vec_PtrForEachEntry( Gia_Obj_t*, vAI, pObj, i ) printf( " %d(%d)", Gia_ObjId( p1, pObj ), Vec_IntEntry( vPatch2Impl, Gia_ObjId(p1, pObj)) ); - printf("\nmateched BO:"); - Vec_PtrForEachEntry( Gia_Obj_t*, vBO, pObj, i ) printf( " %d(%d)", Gia_ObjId( p1, pObj ), Vec_IntEntry( vPatch2Impl, Gia_ObjId(p1, pObj)) ); - printf("\nAO:"); - Vec_PtrForEachEntry( Gia_Obj_t*, vAO, pObj, i ) printf( " %d(%d)", Gia_ObjId( p1, pObj ), Vec_IntEntry( vPatch2Impl, Gia_ObjId(p1, pObj)) ); - printf("\n"); - - // create patched impl - - // mark fanin cone of Extended Input in impl - Vec_Int_t* vFlag_impl = Vec_IntAlloc( Gia_ManObjNum(p2) ); - Vec_IntFill( vFlag_impl, Gia_ManObjNum(p2), 0 ); - - Vec_PtrForEachEntry( Gia_Obj_t*, vBI, pObj, i ) - { - Vec_PtrPush( vQ, p2->pObjs + Vec_IntEntry( vPatch2Impl, Gia_ObjId(p1, pObj) ) ); - } - Vec_PtrForEachEntry( Gia_Obj_t*, vAI, pObj, i ) - { - Vec_PtrPush( vQ, p2->pObjs + Vec_IntEntry( vPatch2Impl, Gia_ObjId(p1, pObj) ) ); - } - - while ( Vec_PtrSize(vQ) != 0 ) - { - pObj = Vec_PtrPop(vQ); - id = Gia_ObjId( p2, pObj ); - if ( Vec_IntEntry( vFlag_impl, id ) == 1 ) continue; - Vec_IntSetEntry( vFlag_impl, id, 1 ); - - if ( Gia_ObjFaninNum(p2, pObj) > 0 ) Vec_PtrPush( vQ, Gia_ObjFanin0(pObj) ); - if ( Gia_ObjFaninNum(p2, pObj) > 1 ) Vec_PtrPush( vQ, Gia_ObjFanin1(pObj) ); - } - - // add pi - Gia_ManForEachCi( p2, pObj, i ) - { - pObj->Value = Gia_ManCi(p1, i)->Value = Gia_ManAppendCi( pNew ); - } - // add fanin cone of EI in impl - int cnt = 0; - Gia_ManForEachAnd( p2, pObj, i ) - { - if ( Vec_IntEntry( vFlag_impl, Gia_ObjId(p2, pObj) ) == 0 ) continue; - pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); - printf( "%d\n", pObj->Value>>1 ); - cnt ++; - } - printf( "%d node added in the fanin cone of EI\n", cnt ); - // set literal and flag of EI in patch - // TODO: input phase - Vec_PtrForEachEntry( Gia_Obj_t*, vBI, pObj, i ) - { - id = Gia_ObjId( p1, pObj ); - pObj -> Value = ( p2 -> pObjs + Vec_IntEntry( vPatch2Impl, id ) ) -> Value; - Vec_IntSetEntry( vFlag, id, 5 ); - } - Vec_PtrForEachEntry( Gia_Obj_t*, vAI, pObj, i ) - { - id = Gia_ObjId( p1, pObj ); - pObj -> Value = ( p2 -> pObjs + Vec_IntEntry( vPatch2Impl, id ) ) -> Value; - Vec_IntSetEntry( vFlag, id, 5 ); - } - // mark fanin cone of EO in patch (to flag 5) - Vec_PtrForEachEntry( Gia_Obj_t*, vBO, pObj, i ) - Vec_PtrPush( vQ, pObj ); - Vec_PtrForEachEntry( Gia_Obj_t*, vAO, pObj, i ) - Vec_PtrPush( vQ, pObj ); - while ( Vec_PtrSize(vQ) != 0 ) - { - pObj = Vec_PtrPop(vQ); - id = Gia_ObjId( p1, pObj ); - if ( Vec_IntEntry( vFlag, id ) >= 5 ) continue; - Vec_IntSetEntry( vFlag, id, 6 ); - - if ( Gia_ObjFaninNum(p1, pObj) > 0 ) Vec_PtrPush( vQ, Gia_ObjFanin0(pObj) ); - if ( Gia_ObjFaninNum(p1, pObj) > 1 ) Vec_PtrPush( vQ, Gia_ObjFanin1(pObj) ); - } - // add fanin cone of EO to EI in patch - cnt = 0; - Gia_ManForEachAnd( p1, pObj, i ) - { - if ( Vec_IntEntry( vFlag, Gia_ObjId(p1, pObj) ) != 6 ) continue; - pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); - printf( "%d\n", pObj->Value>>1 ); - cnt ++; - } - printf( "%d node added in the extended boundary\n", cnt ); - - // set literal and flag(1) of EO in impl - Vec_PtrForEachEntry( Gia_Obj_t*, vBO, pObj, i ) - { - id = Gia_ObjId( p1, pObj ); - id2 = Vec_IntEntry( vPatch2Impl, id ); - pObj2 = p2 -> pObjs + id2; - pObj2 -> Value = pObj -> Value; - if ( Vec_BitEntry( vImpl2Spec_phase, id2 ) ) pObj2 -> Value ^= 1; - Vec_IntSetEntry( vFlag_impl, id2, 1 ); - } - Vec_PtrForEachEntry( Gia_Obj_t*, vAO, pObj, i ) - { - id = Gia_ObjId( p1, pObj ); - id2 = Vec_IntEntry( vPatch2Impl, id ); - pObj2 = p2 -> pObjs + id2; - pObj2 -> Value = pObj -> Value; - printf( "id %d matched to id %d in impl, phase %d\n", id, id2, Vec_BitEntry( vImpl2Spec_phase, id2 ) ); - if ( Vec_BitEntry( vImpl2Spec_phase, id2 ) ) pObj2 -> Value ^= 1; - Vec_IntSetEntry( vFlag_impl, id2, 1 ); - } - - // add flag 0 in impl - cnt = 0; - Gia_ManForEachAnd( p2, pObj, i ) - { - if ( Vec_IntEntry( vFlag_impl, Gia_ObjId(p2, pObj) ) != 0 ) continue; - pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); - printf( "%d\n", pObj->Value>>1 ); - cnt++; - } - printf( "%d node added in the fanout cone\n", cnt ); - - // handle co - cnt = 0; - Gia_ManForEachCo( p2, pObj, i ) - { - id = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ) >> 1; - printf( "%d\n", id ); - cnt ++; - } - - Gia_ManStaticFanoutStop( p1 ); - Gia_ManHashStop( pNew ); - pNew = Gia_ManCleanup( pTemp = pNew ); - Gia_ManStop( pTemp ); - return pNew; -} - - //////////////////////////////////////////////////////////////////////// /// END OF FILE /// //////////////////////////////////////////////////////////////////////// diff --git a/src/aig/gia/module.make b/src/aig/gia/module.make index 236d43b326..9e5ae3a57c 100644 --- a/src/aig/gia/module.make +++ b/src/aig/gia/module.make @@ -109,4 +109,5 @@ SRC += src/aig/gia/giaAig.c \ src/aig/gia/giaTsim.c \ src/aig/gia/giaTtopt.cpp \ src/aig/gia/giaUnate.c \ - src/aig/gia/giaUtil.c + src/aig/gia/giaUtil.c \ + src/aig/gia/giaBound.c \ No newline at end of file diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c index 1a837d0305..537e78c245 100644 --- a/src/base/abci/abc.c +++ b/src/base/abci/abc.c @@ -51695,13 +51695,14 @@ int Abc_CommandAbc9AddFlop( Abc_Frame_t * pAbc, int argc, char ** argv ) ***********************************************************************/ int Abc_CommandAbc9BMiter( Abc_Frame_t * pAbc, int argc, char ** argv ) { - extern Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, int biNum); + extern Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose ); Gia_Man_t * pTemp, * pSecond; char * FileName = NULL; FILE * pFile = NULL; int c, fVerbose = 0; int bi = 0; Extra_UtilGetoptReset(); + // TODO: use a flag to block Bnd_Man while ( ( c = Extra_UtilGetopt( argc, argv, "Ivh" ) ) != EOF ) { switch ( c ) @@ -51752,7 +51753,7 @@ int Abc_CommandAbc9BMiter( Abc_Frame_t * pAbc, int argc, char ** argv ) Abc_Print( -1, "Abc_CommandAbc9BMiter(): Cannot read the file name on the command line.\n" ); return 0; } - pTemp = Gia_ManBoundaryMiter( pAbc->pGia, pSecond, fVerbose, bi); + pTemp = Gia_ManBoundaryMiter( pAbc->pGia, pSecond, fVerbose ); Gia_ManStop( pSecond ); Abc_FrameUpdateGia( pAbc, pTemp ); return 0; @@ -51852,7 +51853,7 @@ int Abc_CommandAbc9RecoverBoundary( Abc_Frame_t * pAbc, int argc, char ** argv ) Gia_Obj_t* pObj; Gia_Man_t * pSpec = NULL; char ** pArgvNew; - int i, nArgcNew, nPo; + int nArgcNew, nPo; int nBInput = -1; char *FileName; Extra_UtilGetoptReset(); @@ -51955,29 +51956,34 @@ int Abc_CommandAbc9RecoverBoundary( Abc_Frame_t * pAbc, int argc, char ** argv ) return 1; } +extern Bnd_Man_t* pBnd; int Abc_CommandAbc9StrEco( Abc_Frame_t * pAbc, int argc, char ** argv ) { - extern Gia_Man_t * Gia_ManPatch( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, int biNum); - extern Gia_Man_t * Gia_ManPatchImpl( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose, int biNum); - Gia_Man_t * pTemp, * pSecond, *pImpl, *pPatched; + extern Gia_Man_t * Cec4_ManSimulateTest( Gia_Man_t * p, Cec_ParFra_t * pPars ); + extern void Cec4_ManSetParams( Cec_ParFra_t * pPars ); + extern Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose ); + Gia_Man_t *pImpl, *pImpl_out = 0, *pSpec_out = 0, *pMiter, *pPatch, *pPatched, *pTemp, *pBmiter;; char * FileName = NULL; - char * FileName2 = NULL; FILE * pFile = NULL; - int c, fVerbose = 0; - int bi = 0; + int c, fVerbose = 0, success = 1; + + // params + Gps_Par_t Pars, * pPars = &Pars; + memset( pPars, 0, sizeof(Gps_Par_t) ); + Cec_ParCec_t ParsCec, *pParsCec = &ParsCec; + Cec_ManCecSetDefaultParams( pParsCec ); + Cec_ParFra_t ParsFra, *pParsFra = &ParsFra; + Cec4_ManSetParams( pParsFra ); + pParsFra -> fBMiterInfo = 1; + + // TODO: save return value and return at the end of the function + + // parse options Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "Ivh" ) ) != EOF ) + while ( ( c = Extra_UtilGetopt( argc, argv, "vh" ) ) != EOF ) { switch ( c ) { - case 'I': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-I\" should be followed by an integer.\n" ); - goto usage; - } - bi = atoi(argv[globalUtilOptind++]); - break; case 'v': fVerbose ^= 1; break; @@ -51999,7 +52005,10 @@ int Abc_CommandAbc9StrEco( Abc_Frame_t * pAbc, int argc, char ** argv ) return 0; } - // get the input file name + // params + + + // read impl FileName = argv[globalUtilOptind]; if ( (pFile = fopen( FileName, "r" )) == NULL ) { @@ -52010,44 +52019,103 @@ int Abc_CommandAbc9StrEco( Abc_Frame_t * pAbc, int argc, char ** argv ) return 1; } fclose( pFile ); + pImpl = Gia_AigerRead( FileName, 0, 0, 0 ); + if ( pImpl == NULL ) + { + Abc_Print( -1, "Abc_CommandAbc9StrEco(): Cannot read the file name on the command line.\n" ); + return 0; + } - // get the input file name 2 - FileName2 = argv[globalUtilOptind+1]; - if ( (pFile = fopen( FileName2, "r" )) == NULL ) + // read patch + FileName = argv[globalUtilOptind+1]; + if ( (pFile = fopen( FileName, "r" )) == NULL ) { - Abc_Print( -1, "Cannot open input file \"%s\". ", FileName2 ); - if ( (FileName2 = Extra_FileGetSimilarName( FileName2, ".aig", ".blif", ".pla", ".eqn", ".bench" )) ) - Abc_Print( 1, "Did you mean \"%s\"?", FileName2 ); + Abc_Print( -1, "Cannot open input file \"%s\". ", FileName ); + if ( (FileName = Extra_FileGetSimilarName( FileName, ".aig", ".blif", ".pla", ".eqn", ".bench" )) ) + Abc_Print( 1, "Did you mean \"%s\"?", FileName ); Abc_Print( 1, "\n" ); return 1; } fclose( pFile ); - - // map spec to patch - pSecond = Gia_AigerRead( FileName, 0, 1, 0 ); - if ( pSecond == NULL ) + pPatch = Gia_AigerRead( FileName, 0, 1, 0 ); + if ( pPatch == NULL ) { Abc_Print( -1, "Abc_CommandAbc9StrEco(): Cannot read the file name on the command line.\n" ); return 0; } - pTemp = Gia_ManPatch( pAbc->pGia, pSecond, fVerbose, bi); - // Gia_ManStop( pSecond ); - // Abc_FrameUpdateGia( pAbc, pTemp ); - // return 0; - // generated patched impl - pImpl = Gia_AigerRead( FileName2, 0, 0, 0 ); - if ( pImpl == NULL ) + + // verify if spec eq impl + pMiter = Gia_ManMiter( pAbc->pGia, pImpl, 0, 1, 0, 0, 0 ); + assert( Cec_ManVerify( pMiter, pParsCec ) ); + Gia_ManStop(pMiter); + + // start boundary manager + pBnd = Bnd_ManStart( pAbc->pGia, pImpl ); + + // check boundary + if ( 0 == Bnd_ManCheckBound( pAbc -> pGia ) ) { - Abc_Print( -1, "Abc_CommandAbc9StrEco(): Cannot read the file name on the command line.\n" ); - return 0; - } - pPatched = Gia_ManPatchImpl( pTemp, pImpl, fVerbose, bi); + Abc_Print( -1, "Abc_CommandAbc9StrEco(): The given boundary is invalid.\n" ); + success = 0; + } + + if ( success ) + { + // create bmiter, run fraig + pBmiter = Gia_ManBoundaryMiter( pAbc -> pGia, pImpl, 0 ); + pTemp = Cec4_ManSimulateTest( pBmiter, pParsFra ); + Gia_ManStop(pBmiter); + Gia_ManStop(pTemp); + + // find + Bnd_ManFindBound( pAbc -> pGia ); + + // create spec_out and + pSpec_out = Bnd_ManGenSpecOut( pAbc -> pGia ); + if ( !pSpec_out ) success = 0; + pImpl_out = Bnd_ManGenImplOut( pImpl ); + if ( !pImpl_out ) success = 0; + + Gia_AigerWrite( pSpec_out, "spec_out.aig", 0, 0, 0 ); + Gia_AigerWrite( pImpl_out, "impl_out.aig", 0, 0, 0 ); + Gia_ManPrintStats( pSpec_out, pPars ); + Gia_ManPrintStats( pImpl_out, pPars ); + + } + + if ( success ) + { + + // check if spec_out and imnpl_out are equivalent + printf("Checking the equivalence of spec_out and impl_out\n"); + pMiter = Gia_ManMiter( pSpec_out, pImpl_out, 0, 1, 0, 0, 0 ); + Bnd_ManSetEqOut( Cec_ManVerify( pMiter, pParsCec ) ); + Gia_ManStop( pMiter ); + + // generate patched + pPatched = Bnd_ManGenPatched( pImpl_out, pAbc->pGia, pPatch ); + + // check if patched is equiv to patch + printf("Checking the equivalence of patch and patched\n"); + pMiter = Gia_ManMiter( pPatch, pPatched, 0, 1, 0, 0, 0 ); + Bnd_ManSetEqRes( Cec_ManVerify( pMiter, pParsCec ) ); + Gia_ManStop( pMiter ); + + } + + Bnd_ManPrintStats(); - Gia_ManStop( pSecond ); Gia_ManStop( pImpl ); - Gia_ManStop( pTemp ); - Abc_FrameUpdateGia( pAbc, pPatched ); + Gia_ManStop( pPatch ); + if ( pSpec_out ) Gia_ManStop( pSpec_out ); + if ( pImpl_out ) Gia_ManStop( pImpl_out ); + if ( success ) + { + Abc_FrameUpdateGia( pAbc, pPatched ); + } + Bnd_ManStop(); + return 0; usage: diff --git a/src/misc/vec/vecBit.h b/src/misc/vec/vecBit.h index e41d95aa9f..9b0af9d946 100644 --- a/src/misc/vec/vecBit.h +++ b/src/misc/vec/vecBit.h @@ -626,6 +626,27 @@ static inline void Vec_BitReset( Vec_Bit_t * p ) p->pArray[i] = 0; } + +/**Function************************************************************* + + Synopsis [] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +static inline void Vec_BitPrint( Vec_Bit_t * p ) +{ + int i, Entry; + printf( "Vector has %d entries: {", Vec_BitSize(p) ); + Vec_BitForEachEntry( p, Entry, i ) + printf( " %d", Entry ); + printf( " }\n" ); +} + ABC_NAMESPACE_HEADER_END #endif diff --git a/src/proof/cec/cecSatG2.c b/src/proof/cec/cecSatG2.c index 0659b3f60b..b198c7ffe6 100644 --- a/src/proof/cec/cecSatG2.c +++ b/src/proof/cec/cecSatG2.c @@ -143,14 +143,6 @@ static inline int Cec4_ObjSatId( Gia_Man_t * p, Gia_Obj_t * pObj ) static inline int Cec4_ObjSetSatId( Gia_Man_t * p, Gia_Obj_t * pObj, int Num ) { assert(Cec4_ObjSatId(p, pObj) == -1); Gia_ObjSetCopy2Array(p, Gia_ObjId(p, pObj), Num); Vec_IntPush(&p->vSuppVars, Gia_ObjId(p, pObj)); if ( Gia_ObjIsCi(pObj) ) Vec_IntPushTwo(&p->vCopiesTwo, Gia_ObjId(p, pObj), Num); assert(Vec_IntSize(&p->vVarMap) == Num); Vec_IntPush(&p->vVarMap, Gia_ObjId(p, pObj)); return Num; } static inline void Cec4_ObjCleanSatId( Gia_Man_t * p, Gia_Obj_t * pObj ) { assert(Cec4_ObjSatId(p, pObj) != -1); Gia_ObjSetCopy2Array(p, Gia_ObjId(p, pObj), -1); } - -extern Vec_Int_t* vMarkBmiter; -extern Vec_Int_t* vIdBI; -extern Vec_Int_t* vIdBO; -extern Vec_Ptr_t* vBmiter2Spec; -extern Vec_Ptr_t* vBmiter2Impl; - - //////////////////////////////////////////////////////////////////////// /// FUNCTION DEFINITIONS /// //////////////////////////////////////////////////////////////////////// @@ -1791,9 +1783,9 @@ void Gia_ManRemoveWrongChoices( Gia_Man_t * p ) //Abc_Print( 1, "Removed %d wrong choices.\n", Counter ); } -extern Vec_Bit_t* vImpl2Spec_phase; int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** ppNew, int fSimOnly ) { + Cec4_Man_t * pMan = Cec4_ManCreate( p, pPars ); Gia_Obj_t * pObj, * pRepr; int i, fSimulate = 1; @@ -1894,25 +1886,11 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p if ( Abc_Lit2Var(pObj->Value) == Abc_Lit2Var(pRepr->Value) ) { - if ( pPars->fBMiterInfo ) + if ( pPars->fBMiterInfo ) { - int eId, j; - Vec_Int_t *vIds_spec_repr, *vIds_impl_repr, *vIds_spec_obj, *vIds_impl_obj; - vIds_spec_repr = Vec_PtrEntry( vBmiter2Spec, id_repr ); - vIds_impl_repr = Vec_PtrEntry( vBmiter2Impl, id_repr ); - vIds_spec_obj = Vec_PtrEntry( vBmiter2Spec, id_obj ); - vIds_impl_obj = Vec_PtrEntry( vBmiter2Impl, id_obj ); - Vec_IntForEachEntry( vIds_spec_obj, eId, j) - { - Vec_IntPush(vIds_spec_repr, eId); - } - Vec_IntForEachEntry( vIds_impl_obj, eId, j) - { - Vec_IntPush(vIds_impl_repr, eId); - } - Vec_IntClear(vIds_spec_obj); - Vec_IntClear(vIds_impl_obj); + Bnd_ManMerge( id_repr, id_obj, pObj->fPhase ^ pRepr->fPhase ); } + assert( (pObj->Value ^ pRepr->Value) == (pObj->fPhase ^ pRepr->fPhase) ); Gia_ObjSetProved( p, i ); if ( Gia_ObjId(p, pRepr) == 0 ) @@ -1923,73 +1901,8 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p { if (pPars->fBMiterInfo){ - int eId, j; - Vec_Int_t *vIds_spec_repr, *vIds_impl_repr, *vIds_spec_obj, *vIds_impl_obj; - vIds_spec_repr = Vec_PtrEntry( vBmiter2Spec, id_repr ); - vIds_impl_repr = Vec_PtrEntry( vBmiter2Impl, id_repr ); - vIds_spec_obj = Vec_PtrEntry( vBmiter2Spec, id_obj ); - vIds_impl_obj = Vec_PtrEntry( vBmiter2Impl, id_obj ); - - Vec_IntForEachEntry( vIds_spec_obj, eId, j) - { - Vec_IntPush(vIds_spec_repr, eId); - } - Vec_IntForEachEntry( vIds_impl_obj, eId, j) - { - Vec_IntPush(vIds_impl_repr, eId); - } - - // handle phase before cleaning - printf( "proven %d merged into %d (phase : %d)\n", Gia_ObjId(p, pObj), Gia_ObjId(p,pRepr), pObj->fPhase ^ pRepr -> fPhase ); - if ( Vec_IntSize(vIds_spec_repr) == 0 ) // no match - { - if ( pObj->fPhase ^ pRepr -> fPhase ) - { - Vec_IntForEachEntry( vIds_impl_obj, eId, j ) - { - Vec_BitSetEntry( vImpl2Spec_phase, eId, !Vec_BitEntry(vImpl2Spec_phase, eId) ); - printf( "impl id %d's phase set to %d\n", eId, Vec_BitEntry(vImpl2Spec_phase, eId) ); - } - } - } - else if ( Vec_IntSize( vIds_spec_repr ) == Vec_IntSize( vIds_spec_obj) && Vec_IntSize( vIds_impl_obj ) == 0 ) // new match - { - if ( pObj->fPhase ^ pRepr -> fPhase ) - { - Vec_IntForEachEntry( vIds_impl_repr, eId, j ) - { - Vec_BitSetEntry( vImpl2Spec_phase, eId, !Vec_BitEntry(vImpl2Spec_phase, eId) ); - printf( "impl id %d's phase set to %d\n", eId, Vec_BitEntry(vImpl2Spec_phase, eId) ); - } - printf("new match flip\n"); - } - } - else if ( Vec_IntSize( vIds_spec_repr ) > 0 && Vec_IntSize( vIds_impl_obj ) > 0 ) // matched, merge impl - { - if ( ( pObj->fPhase ^ pRepr -> fPhase) ^ ( Vec_BitEntry( vImpl2Spec_phase, Vec_IntEntry(vIds_impl_repr, 0)) ^ Vec_BitEntry( vImpl2Spec_phase, Vec_IntEntry(vIds_impl_obj, 0)) ) ) - { - if ( Vec_IntSize( vIds_spec_repr ) == Vec_IntSize( vIds_spec_obj) ) // unmatched repr, matched obj, set repr bits - { - Vec_IntForEachEntry( vIds_impl_repr, eId, j ) - { - if ( j >= Vec_IntSize( vIds_impl_repr)-Vec_IntSize(vIds_impl_obj) ) break; - Vec_BitSetEntry( vImpl2Spec_phase, eId, !Vec_BitEntry(vImpl2Spec_phase, eId) ); - printf( "impl id %d's phase set to %d\n", eId, Vec_BitEntry(vImpl2Spec_phase, eId) ); - } - } - else // set obj bits - { - Vec_IntForEachEntry( vIds_impl_obj, eId, j ) - { - Vec_BitSetEntry( vImpl2Spec_phase, eId, !Vec_BitEntry(vImpl2Spec_phase, eId) ); - printf( "impl id %d's phase set to %d\n", eId, Vec_BitEntry(vImpl2Spec_phase, eId) ); - } - } - } - } - - Vec_IntClear(vIds_spec_obj); - Vec_IntClear(vIds_impl_obj); + Bnd_ManMerge( id_repr, id_obj, pObj->fPhase ^ pRepr->fPhase ); + // printf( "proven %d merged into %d (phase : %d)\n", Gia_ObjId(p, pObj), Gia_ObjId(p,pRepr), pObj->fPhase ^ pRepr -> fPhase ); } pObj->Value = Abc_LitNotCond( pRepr->Value, pObj->fPhase ^ pRepr->fPhase ); @@ -2001,20 +1914,8 @@ int Cec4_ManPerformSweeping( Gia_Man_t * p, Cec_ParFra_t * pPars, Gia_Man_t ** p if ( pPars->fBMiterInfo ) { // print - Vec_Int_t* vIds_spec, *vIds_impl; - int k, id; - for( int j=0; j < Vec_PtrSize(vBmiter2Spec); j++ ) - { - printf("node %d: ", j); - vIds_spec = Vec_PtrEntry( vBmiter2Spec, j); - vIds_impl = Vec_PtrEntry( vBmiter2Impl, j); - Vec_IntForEachEntry(vIds_spec, id, k) - printf("%d ", id); - printf("| "); - Vec_IntForEachEntry(vIds_impl, id, k) - printf("%d ", id); - printf("\n"); - } + Bnd_ManFinalizeMappings(); + // Bnd_ManPrintMappings(); } if ( p->iPatsPi > 0 ) @@ -2066,10 +1967,6 @@ Gia_Man_t * Cec4_ManSimulateTest( Gia_Man_t * p, Cec_ParFra_t * pPars ) Gia_Man_t * pNew = NULL; Cec4_ManPerformSweeping( p, pPars, &pNew, 0 ); - // TODO - if (pPars -> fBMiterInfo){ - } - return pNew; } void Cec4_ManSimulateTest2( Gia_Man_t * p, int nConfs, int fVerbose ) From f5f4dca013bdcf62282d88ac9d7fa2238a9c0dcd Mon Sep 17 00:00:00 2001 From: Allen Ho Date: Sat, 2 Mar 2024 21:08:10 +0800 Subject: [PATCH 15/33] clean up --- src/aig/gia/giaBound.c | 214 ++++++++++++++++++++--------------------- src/aig/gia/giaDup.c | 61 ------------ src/base/abci/abc.c | 176 ++++++++------------------------- 3 files changed, 142 insertions(+), 309 deletions(-) diff --git a/src/aig/gia/giaBound.c b/src/aig/gia/giaBound.c index 63b2c389b1..9fad955d72 100644 --- a/src/aig/gia/giaBound.c +++ b/src/aig/gia/giaBound.c @@ -34,7 +34,9 @@ struct Bnd_Man_t_ int combLoop_impl; int eq_out; int eq_res; - int nChoice; + int nChoice_spec; + int nChoice_impl; + int feedthrough; Vec_Ptr_t* vBmiter2Spec; Vec_Ptr_t* vBmiter2Impl; @@ -51,6 +53,7 @@ struct Bnd_Man_t_ Vec_Bit_t* vEO_phase; Vec_Int_t* vSpec2Impl_diff; + Vec_Int_t* vImpl2Spec_diff; // note that this include bufs, which should merge into their fanins }; @@ -115,11 +118,16 @@ Bnd_Man_t* Bnd_ManStart( Gia_Man_t *pSpec, Gia_Man_t *pImpl ) p -> eq_out = 0; p -> eq_res = 0; - p -> nChoice = 0; + p -> nChoice_spec = 0; + p -> nChoice_impl = 0; + p -> feedthrough = 0; p -> vSpec2Impl_diff = Vec_IntAlloc( Gia_ManObjNum(pSpec) ); Vec_IntFill( p -> vSpec2Impl_diff, Gia_ManObjNum(pSpec), 0 ); + p -> vImpl2Spec_diff = Vec_IntAlloc( Gia_ManObjNum(pImpl) ); + Vec_IntFill( p -> vImpl2Spec_diff, Gia_ManObjNum(pImpl), 0 ); + return p; } @@ -153,6 +161,7 @@ void Bnd_ManStop() Vec_BitFree( pBnd->vEO_phase ); Vec_IntFree( pBnd-> vSpec2Impl_diff ); + Vec_IntFree( pBnd-> vImpl2Spec_diff ); ABC_FREE( pBnd ); } @@ -208,56 +217,6 @@ void Bnd_ManMerge( int id_repr, int id_obj, int phaseDiff ) } } - // handle impl2spec phase - /* - if ( Vec_IntSize(vIds_spec_repr) == 0 ) // no match - { - if ( pObj->fPhase ^ pRepr -> fPhase ) - { - Vec_IntForEachEntry( vIds_impl_obj, eId, j ) - { - Vec_BitSetEntry( vImpl2Spec_phase, eId, !Vec_BitEntry(vImpl2Spec_phase, eId) ); - printf( "impl id %d's phase set to %d\n", eId, Vec_BitEntry(vImpl2Spec_phase, eId) ); - } - } - } - else if ( Vec_IntSize( vIds_spec_repr ) == Vec_IntSize( vIds_spec_obj) && Vec_IntSize( vIds_impl_obj ) == 0 ) // new match - { - if ( pObj->fPhase ^ pRepr -> fPhase ) - { - Vec_IntForEachEntry( vIds_impl_repr, eId, j ) - { - Vec_BitSetEntry( vImpl2Spec_phase, eId, !Vec_BitEntry(vImpl2Spec_phase, eId) ); - printf( "impl id %d's phase set to %d\n", eId, Vec_BitEntry(vImpl2Spec_phase, eId) ); - } - printf("new match flip\n"); - } - } - else if ( Vec_IntSize( vIds_spec_repr ) > 0 && Vec_IntSize( vIds_impl_obj ) > 0 ) // matched, merge impl - { - if ( ( pObj->fPhase ^ pRepr -> fPhase) ^ ( Vec_BitEntry( vImpl2Spec_phase, Vec_IntEntry(vIds_impl_repr, 0)) ^ Vec_BitEntry( vImpl2Spec_phase, Vec_IntEntry(vIds_impl_obj, 0)) ) ) - { - if ( Vec_IntSize( vIds_spec_repr ) == Vec_IntSize( vIds_spec_obj) ) // unmatched repr, matched obj, set repr bits - { - Vec_IntForEachEntry( vIds_impl_repr, eId, j ) - { - if ( j >= Vec_IntSize( vIds_impl_repr)-Vec_IntSize(vIds_impl_obj) ) break; - Vec_BitSetEntry( vImpl2Spec_phase, eId, !Vec_BitEntry(vImpl2Spec_phase, eId) ); - printf( "impl id %d's phase set to %d\n", eId, Vec_BitEntry(vImpl2Spec_phase, eId) ); - } - } - else // set obj bits - { - Vec_IntForEachEntry( vIds_impl_obj, eId, j ) - { - Vec_BitSetEntry( vImpl2Spec_phase, eId, !Vec_BitEntry(vImpl2Spec_phase, eId) ); - printf( "impl id %d's phase set to %d\n", eId, Vec_BitEntry(vImpl2Spec_phase, eId) ); - } - } - } - } - */ - Vec_IntClear(vIds_spec_obj); Vec_IntClear(vIds_impl_obj); @@ -292,6 +251,12 @@ void Bnd_ManFinalizeMappings() Vec_IntSetEntry( pBnd->vSpec2Impl_diff, id, Vec_IntSize(vImpl)-1 ); } + Vec_IntForEachEntry( vImpl, id, j ) + { + // record the number of different choice of vEI_impl, vEO_impl + Vec_IntSetEntry( pBnd->vImpl2Spec_diff, id, Vec_IntSize(vSpec)-1 ); + } + } @@ -304,10 +269,6 @@ void Bnd_ManFinalizeMappings() { pBnd->nMerged_impl += Vec_IntSize(vImpl) - 1; } - - - - } @@ -336,15 +297,14 @@ void Bnd_ManPrintMappings() void Bnd_ManPrintBound() { - printf("%d nodes merged in spec\n", pBnd ->nMerged_spec - Vec_IntSize(pBnd->vBI) - Vec_IntSize(pBnd->vBO) ); - printf("%d nodes merged in impl\n", pBnd ->nMerged_impl ); - + // printf("%d nodes merged in spec\n", pBnd ->nMerged_spec - Vec_IntSize(pBnd->vBI) - Vec_IntSize(pBnd->vBO) ); + // printf("%d nodes merged in impl\n", pBnd ->nMerged_impl ); printf("BI spec:"); Vec_IntPrint(pBnd -> vBI); printf("BO spec:"); Vec_IntPrint(pBnd -> vBO); - printf("\nEI spec:"); Vec_IntPrint(pBnd -> vEI_spec); + printf("EI spec:"); Vec_IntPrint(pBnd -> vEI_spec); printf("EI impl:"); Vec_IntPrint(pBnd -> vEI_impl); printf("EI phase:"); Vec_BitPrint(pBnd -> vEI_phase); - printf("\nEO spec:"); Vec_IntPrint(pBnd -> vEO_spec); + printf("EO spec:"); Vec_IntPrint(pBnd -> vEO_spec); printf("EO impl:"); Vec_IntPrint(pBnd -> vEO_impl); printf("EO phase:"); Vec_BitPrint(pBnd -> vEO_phase); } @@ -353,30 +313,54 @@ void Bnd_ManPrintStats() { Bnd_Man_t* p = pBnd; + + printf("\nSTATS\n"); + + int warning = 0; + if ( p->nChoice_spec > 0 ) + { + warning = 1; + printf("WARNING: multiple equiv nodes on the boundary of spec\n"); + } + if ( p->nChoice_impl > 0 ) + { + warning = 1; + printf("WARNING: multiple equiv nodes on the boundary of impl\n"); + } + if ( p->feedthrough ) + { + warning = 1; + printf("WARNING: feedthrough inside patch\n"); + } + + printf("The outsides of spec and impl are %sEQ.\n", p->eq_out ? "" : "NOT " ); + printf("The patched impl and patch are %sEQ.\n", p->eq_res ? "" : "NOT " ); + // #internal // nBI, nBO // nBI_miss, nBO_miss // nAI, nAO, nExtra // #spec, #impl, #patched - // combLoop_spec, combLoop_impl - - // eq_out, eq_res // status - // #different choice of impl on boundary + // warning (may be neq) + // eq_out, eq_res printf("\nRESULT\n"); - printf("%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d\n", + printf("%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d\n", p->nInternal, p->nBI, p->nBO, p->nBI_miss, p->nBO_miss, Vec_IntSize(p->vEI_spec), Vec_IntSize(p->vEO_spec), p->nExtra, p->nNode_spec, p->nNode_impl, p->nNode_patched, p->combLoop_spec, p->combLoop_impl, - p->eq_out, p->eq_res, p->status, - p->nChoice + p->nChoice_impl, + p->nChoice_spec, + p->feedthrough, + warning, + p->eq_out, p->eq_res ); } @@ -610,7 +594,7 @@ void Bnd_ManFindBound( Gia_Man_t * p ) Vec_IntPush(vEO_spec, id); } } - printf("%d BO doesn't match\n", Vec_PtrSize(vQ) ); + printf("%d BO doesn't match. ", Vec_PtrSize(vQ) ); pBnd -> nBO_miss = Vec_PtrSize(vQ); int cnt_extra = - Vec_PtrSize(vQ); @@ -682,7 +666,7 @@ void Bnd_ManFindBound( Gia_Man_t * p ) Vec_IntPush(vEI_spec, id); } } - printf("%d BI doesn't match\n", Vec_PtrSize(vQ) ); + printf("%d BI doesn't match. ", Vec_PtrSize(vQ) ); pBnd -> nBI_miss = Vec_PtrSize(vQ); cnt_extra -= Vec_PtrSize(vQ); @@ -742,16 +726,16 @@ void Bnd_ManFindBound( Gia_Man_t * p ) } - // count number of choice of boundary in impl + // count number of choice of boundary Vec_IntForEachEntry( vEI_spec, id, i ) - { - pBnd -> nChoice += Vec_IntEntry( pBnd -> vSpec2Impl_diff, id ); - } + pBnd -> nChoice_impl += Vec_IntEntry( pBnd -> vSpec2Impl_diff, id ); Vec_IntForEachEntry( vEO_spec, id, i ) - { - pBnd -> nChoice += Vec_IntEntry( pBnd -> vSpec2Impl_diff, id ); - } - + pBnd -> nChoice_impl += Vec_IntEntry( pBnd -> vSpec2Impl_diff, id ); + Vec_IntForEachEntry( vEI_impl, id, i ) + pBnd -> nChoice_spec += Vec_IntEntry( pBnd -> vImpl2Spec_diff, id ); + Vec_IntForEachEntry( vEO_impl, id, i ) + pBnd -> nChoice_spec += Vec_IntEntry( pBnd -> vImpl2Spec_diff, id ); + pBnd -> nChoice_spec -= ( pBnd->nBI + pBnd ->nBO - pBnd->nBI_miss - pBnd->nBO_miss); // print pBnd -> status = 1; @@ -790,6 +774,7 @@ Gia_Man_t* Bnd_ManCutBoundary( Gia_Man_t *p, Vec_Int_t* vEI, Vec_Int_t* vEO, Vec { Gia_Man_t * pNew, * pTemp; Gia_Obj_t * pObj; + Vec_Int_t * vValue; int i, id, lit; // check if the boundary has loop (EO cannot be in the TFC of EI ) @@ -809,6 +794,9 @@ Gia_Man_t* Bnd_ManCutBoundary( Gia_Man_t *p, Vec_Int_t* vEI, Vec_Int_t* vEO, Vec Gia_ManConst0(p) -> Value = 0; Gia_ManCleanValue(p); + // record the original value for eo + vValue = Vec_IntAlloc( Gia_ManObjNum(p) ); + Vec_IntFill( vValue, Gia_ManObjNum(p), -1 ); // create ci for ci and eo Gia_ManForEachCi( p, pObj, i ) @@ -817,6 +805,10 @@ Gia_Man_t* Bnd_ManCutBoundary( Gia_Man_t *p, Vec_Int_t* vEI, Vec_Int_t* vEO, Vec } Vec_IntForEachEntry( vEO, id, i ) { + if( Gia_ManObj(p, id) -> Value != 0 ) + { + Vec_IntSetEntry( vValue, id, Gia_ManObj(p, id) -> Value ); + } Gia_ManObj( p, id ) -> Value = Gia_ManAppendCi(pNew); if ( vEO_phase && Vec_BitEntry( vEO_phase, i ) ) { @@ -824,7 +816,14 @@ Gia_Man_t* Bnd_ManCutBoundary( Gia_Man_t *p, Vec_Int_t* vEI, Vec_Int_t* vEO, Vec } } - // TODO: consider where EI and EO share the same node + + // record where EI and EO share the same node + // this may cause non-equivalent + Vec_IntForEachEntry( vEI, id, i ) + { + if ( Gia_ManObj(p, id) -> Value != 0 ) + pBnd -> feedthrough = 1; + } // add aig nodes Gia_ManForEachAnd(p, pObj, i) @@ -840,13 +839,26 @@ Gia_Man_t* Bnd_ManCutBoundary( Gia_Man_t *p, Vec_Int_t* vEI, Vec_Int_t* vEO, Vec } Vec_IntForEachEntry( vEI, id, i ) { - lit = Gia_ManObj(p, id)->Value; - // lit = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); + pObj = Gia_ManObj(p, id); + // lit = Gia_ManObj(p, id)->Value; + if ( Gia_ObjIsAnd(pObj) ) lit = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); + else + { + assert(Gia_ObjIsCi(pObj) || Gia_ObjIsConst0(pObj)); + if ( Vec_IntEntry(vValue, id) != -1 ) + { + lit = Vec_IntEntry( vValue, id ); // EI at PI and EI merged with EO + } + else { + lit = pObj -> Value; // EI at PI + } + } if ( vEI_phase && Vec_BitEntry( vEI_phase, i ) ) lit ^= 1; Gia_ManAppendCo( pNew, lit ); } // clean up + Vec_IntFree( vValue ); Gia_ManHashStop( pNew ); pNew = Gia_ManCleanup( pTemp = pNew ); Gia_ManStop( pTemp ); @@ -872,7 +884,12 @@ Gia_Man_t* Bnd_ManGenImplOut( Gia_Man_t* p ) void Bnd_AddNodeRec( Gia_Man_t *p, Gia_Man_t *pNew, Gia_Obj_t *pObj ) { // TODO does this mean constant zero node? - if ( pObj -> Value != 0 || Gia_ObjIsConst0(pObj) ) return; + if ( pObj -> Value != 0 ) return; + if ( Gia_ObjIsConst0(pObj) ) + { + printf( "contant zero encountered\n"); + return; + } for( int i = 0; i < Gia_ObjFaninNum(p, pObj); i++ ) { @@ -902,7 +919,6 @@ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPat int i, id, cnt; Vec_Int_t *vBI_patch, *vBO_patch; - printf("Generating patched implementation\n"); pBnd -> nNode_patch = Gia_ManAndNotBufNum( pPatch ); pNew = Gia_ManStart( Gia_ManObjNum(pOut) + Gia_ManObjNum( pSpec ) + Gia_ManObjNum(pPatch) ); @@ -932,7 +948,6 @@ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPat } assert( Vec_IntSize( vBI_patch ) == Vec_IntSize(pBnd->vBI) ); assert( Vec_IntSize( vBO_patch ) == Vec_IntSize(pBnd->vBO) ); - assert( Bnd_ManCheckBound(pPatch) != 0 ); // add Impl (real) PI @@ -943,7 +958,7 @@ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPat } // add Impl EI to CI - printf("adding EI to CI in Impl\n"); + // printf("adding EI to CI in Impl\n"); for ( i = 0; i < Vec_IntSize( pBnd -> vEI_spec ); i++ ) { pObj = Gia_ManCo(pOut, i + Gia_ManCoNum(pSpec) ); @@ -951,12 +966,10 @@ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPat // set Spec EI Gia_ManObj( pSpec, Vec_IntEntry(pBnd -> vEI_spec, i) ) -> Value = pObj -> Value; - printf("%d ", pObj->Value); } - printf("\n"); // add Spec BI to EI - printf("adding BI to EI in Spec\n"); + // printf("adding BI to EI in Spec\n"); Vec_IntForEachEntry( pBnd -> vBI, id, i ) { pObj = Gia_ManObj( pSpec, id ); @@ -964,23 +977,10 @@ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPat // set patch bi Gia_ManObj( pPatch, Vec_IntEntry( vBI_patch, i) ) -> Value = pObj -> Value; - printf("%d ", pObj->Value); } - printf("\n"); - - // check - // cnt = 0; - // Gia_ManForEachBuf( pPatch, pObj, i ) - // { - // if ( cnt < pBnd -> nBI ) - // { - // assert(pObj -> Value != 0); - // } - // cnt++; - // } // add Patch BO to BI - printf("adding BO to BI in Patch\n"); + // printf("adding BO to BI in Patch\n"); Vec_IntForEachEntry( vBO_patch, id, i ) { pObj = Gia_ManObj( pPatch, id ); @@ -988,12 +988,10 @@ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPat // set spec bo Gia_ManObj( pSpec, Vec_IntEntry( pBnd -> vBO, i) ) -> Value = pObj -> Value; - printf("%d ", pObj->Value); } - printf("\n"); // add Spec EO to BO - printf("adding EO to BO in Spec\n"); + // printf("adding EO to BO in Spec\n"); Vec_IntForEachEntry( pBnd -> vEO_spec, id, i ) { pObj = Gia_ManObj( pSpec, id ); @@ -1001,20 +999,16 @@ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPat // set impl EO (PI) Gia_ManCi( pOut, i + Gia_ManCiNum(pSpec) ) -> Value = pObj -> Value; - printf("%d ", pObj->Value); } - printf("\n"); // add Impl (real) PO to EO - printf("adding CO to EO in Impl\n"); + // printf("adding CO to EO in Impl\n"); for ( i = 0; i < Gia_ManCoNum(pSpec); i++ ) { pObj = Gia_ManCo( pOut, i ); Bnd_AddNodeRec( pOut, pNew, pObj ); Gia_ManAppendCo( pNew, pObj->Value ); - printf("%d ", pObj->Value); } - printf("\n"); // clean up diff --git a/src/aig/gia/giaDup.c b/src/aig/gia/giaDup.c index bdcbb970e7..61acab9952 100644 --- a/src/aig/gia/giaDup.c +++ b/src/aig/gia/giaDup.c @@ -5817,67 +5817,6 @@ Gia_Man_t * Gia_ManImplFromBMiter( Gia_Man_t * p, int nPo, int nBInput ) return pNew; } -/**Function************************************************************* - - Synopsis [Duplicates AIG while putting objects in the DFS order.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Gia_Man_t * Gia_ManMiterFromBMiter( Gia_Man_t * p, int nPo ) -{ - Gia_Man_t * pNew, *pTemp; - Gia_Obj_t * pObj, *pObj2; - int i, iXor, iPo, i1, i2; - pNew = Gia_ManStart( Gia_ManObjNum(p) ); - pNew->pName = Abc_UtilStrsav( "miter" ); - Gia_ManFillValue( p ); - Gia_ManConst0(p)->Value = 0; - - // create primary inputs - Gia_ManForEachCi( p, pObj, i ) - if ( !~pObj->Value ) - pObj->Value = Gia_ManAppendCi(pNew); - - Gia_ManForEachCo( p, pObj, i ) - { - if ( i == nPo ) - { - break; - } - else - { - pObj2 = Gia_ManCo( p, i + nPo ); - - i1 = Gia_ManDupOrderDfs_rec( pNew, p, Gia_ObjFanin0(pObj) ); - i2 = Gia_ManDupOrderDfs_rec( pNew, p, Gia_ObjFanin0(pObj2) ); - - iXor = Gia_ManAppendXor2( pNew, Gia_ObjFaninC0(pObj) ? i1+1 : i1 , Gia_ObjFaninC0(pObj2 ) ? i2+1 : i2 ); - if ( i > 0 ) - { - iPo = Gia_ManAppendOr2( pNew, iPo, iXor ); - } - else - { - iPo = iXor; - } - } - } - Gia_ManAppendCo( pNew, iPo ); - - - pNew = Gia_ManCleanup( pTemp = pNew ); - Gia_ManStop( pTemp ); - pNew = Gia_ManDupNormalize( pTemp = pNew, 0 ); - Gia_ManStop( pTemp ); - - return pNew; -} - //////////////////////////////////////////////////////////////////////// /// END OF FILE /// //////////////////////////////////////////////////////////////////////// diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c index 537e78c245..ed930636b3 100644 --- a/src/base/abci/abc.c +++ b/src/base/abci/abc.c @@ -597,7 +597,6 @@ static int Abc_CommandAbc9ProdAdd ( Abc_Frame_t * pAbc, int argc, cha static int Abc_CommandAbc9AddFlop ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandAbc9BMiter ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandAbc9GenHie ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc9RecoverBoundary ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandAbc9StrEco ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandAbc9Test ( Abc_Frame_t * pAbc, int argc, char ** argv ); @@ -1378,7 +1377,6 @@ void Abc_Init( Abc_Frame_t * pAbc ) Cmd_CommandAdd( pAbc, "ABC9", "&addflop", Abc_CommandAbc9AddFlop, 0 ); Cmd_CommandAdd( pAbc, "ABC9", "&bmiter", Abc_CommandAbc9BMiter, 0 ); Cmd_CommandAdd( pAbc, "ABC9", "&gen_hie", Abc_CommandAbc9GenHie, 0 ); - Cmd_CommandAdd( pAbc, "ABC9", "&rb", Abc_CommandAbc9RecoverBoundary, 0 ); Cmd_CommandAdd( pAbc, "ABC9", "&str_eco", Abc_CommandAbc9StrEco, 0 ); Cmd_CommandAdd( pAbc, "ABC9", "&test", Abc_CommandAbc9Test, 0 ); @@ -51839,122 +51837,6 @@ int Abc_CommandAbc9GenHie( Abc_Frame_t * pAbc, int argc, char ** argv ) SeeAlso [] ***********************************************************************/ -int Abc_CommandAbc9RecoverBoundary( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - extern Gia_Man_t * Gia_ManDeepSyn( Gia_Man_t * pGia, int nIters, int nNoImpr, int TimeOut, int nAnds, int Seed, int fUseTwo, int fVerbose ); - extern Gia_Man_t * Gia_ManImplFromBMiter( Gia_Man_t * p, int nPo, int nBInput ); - extern Gia_Man_t * Gia_ManMiterFromBMiter( Gia_Man_t * p, int nPo ); - int c, nIters = 1, nNoImpr = ABC_INFINITY, TimeOut = 20, nAnds = 0, Seed = 0, fUseTwo = 0, fVerbose = 0; - - int fKeepBMiter = 0; - Gia_Man_t * pMiter; - Gia_Man_t * pImpl; - Gia_Man_t * pDup; - Gia_Obj_t* pObj; - Gia_Man_t * pSpec = NULL; - char ** pArgvNew; - int nArgcNew, nPo; - int nBInput = -1; - char *FileName; - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "vkhI," ) ) != EOF ) - { - switch ( c ) - { - case 'I': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-I\" should be followed by an integer.\n" ); - goto usage; - } - nBInput = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( nBInput < 0 ) - goto usage; - break; - case 'k': - fKeepBMiter ^= 1; - break; - case 'v': - fVerbose ^= 1; - break; - case 'h': - goto usage; - default: - goto usage; - } - } - pArgvNew = argv + globalUtilOptind; - nArgcNew = argc - globalUtilOptind; - if ( nArgcNew != 1 ) - { - Abc_Print( -1, "There is no file name.\n" ); - return 1; - } - - if ( pAbc->pGia == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc9RecoverBoundary(): There is no AIG.\n" ); - return 0; - } - FileName = pArgvNew[0]; - - - // printing - - // Gia_ManForEachCo( pAbc->pGia, pObj, i ){ - // printf("Original node: %s id: %i\n", Gia_ObjCoName(pAbc->pGia, i), i); - // } - - - /* - // perform heavy synthesis - pTemp = Gia_ManDeepSyn( pAbc->pGia, nIters, nNoImpr, TimeOut, nAnds, Seed, fUseTwo, fVerbose ); - Abc_FrameUpdateGia( pAbc, pTemp ); - // print spec/impl and boundary information - Gia_ManForEachCo( pAbc->pGia, pObj, i ){ - printf("Output node: %s id: %i\n", Gia_ObjCoName(pAbc->pGia, i), i); - } - */ - - - - // check boundary recovery status - pSpec = Gia_AigerRead( FileName, false, true, 0 ); - if ( !pSpec ) - { - Abc_Print( -1, "Abc_CommandAbc9RecoverBoundary(): fail to read spec.\n" ); - return 1; - } - nPo = Gia_ManCoNum( pSpec ); - - // duplicate - pDup = Gia_ManDup( pAbc->pGia ); - - // option 1: remove po and keep the buffers - // default nbinput: - if ( nBInput == -1 ) nBInput = (Gia_ManCoNum(pDup)-2*nPo)/2; - pImpl = Gia_ManImplFromBMiter( pDup, nPo, nBInput ); - - // option 2: build miter (with uif?) - if (!fKeepBMiter ) - { - pMiter = Gia_ManMiterFromBMiter( pAbc->pGia, nPo ); - Abc_FrameUpdateGia( pAbc, pMiter ); - } - - return 0; - -usage: - Abc_Print( -2, "usage: &rb [-vkh] \n" ); - Abc_Print( -2, "\t generate an implementation aig with specification boundary\n" ); - Abc_Print( -2, "\t-v : toggles printing verbose information [default = %s]\n", fVerbose? "yes": "no" ); - Abc_Print( -2, "\t-k : keep the bmiter and print the boundary status only.\n"); - Abc_Print( -2, "\t-I num : the number of inputs in the boundary\n"); - Abc_Print( -2, "\t-h : print the command usage\n"); - Abc_Print( -2, "\t : the specification file\n"); - return 1; -} extern Bnd_Man_t* pBnd; int Abc_CommandAbc9StrEco( Abc_Frame_t * pAbc, int argc, char ** argv ) @@ -52005,9 +51887,6 @@ int Abc_CommandAbc9StrEco( Abc_Frame_t * pAbc, int argc, char ** argv ) return 0; } - // params - - // read impl FileName = argv[globalUtilOptind]; if ( (pFile = fopen( FileName, "r" )) == NULL ) @@ -52044,20 +51923,26 @@ int Abc_CommandAbc9StrEco( Abc_Frame_t * pAbc, int argc, char ** argv ) return 0; } + // start boundary manager + pBnd = Bnd_ManStart( pAbc->pGia, pImpl ); // verify if spec eq impl pMiter = Gia_ManMiter( pAbc->pGia, pImpl, 0, 1, 0, 0, 0 ); - assert( Cec_ManVerify( pMiter, pParsCec ) ); + if ( !Cec_ManVerify( pMiter, pParsCec ) ) + { + Abc_Print( -1, "Abc_CommandAbc9StrEco(): The given impl is not equivalent to spec.\n" ); + success = 0; + } Gia_ManStop(pMiter); - // start boundary manager - pBnd = Bnd_ManStart( pAbc->pGia, pImpl ); - // check boundary - if ( 0 == Bnd_ManCheckBound( pAbc -> pGia ) ) + if ( success ) { - Abc_Print( -1, "Abc_CommandAbc9StrEco(): The given boundary is invalid.\n" ); - success = 0; + if ( 0 == Bnd_ManCheckBound( pPatch ) || 0 == Bnd_ManCheckBound( pAbc -> pGia ) ) + { + Abc_Print( -1, "Abc_CommandAbc9StrEco(): The given boundary is invalid.\n" ); + success = 0; + } } if ( success ) @@ -52077,10 +51962,10 @@ int Abc_CommandAbc9StrEco( Abc_Frame_t * pAbc, int argc, char ** argv ) pImpl_out = Bnd_ManGenImplOut( pImpl ); if ( !pImpl_out ) success = 0; - Gia_AigerWrite( pSpec_out, "spec_out.aig", 0, 0, 0 ); - Gia_AigerWrite( pImpl_out, "impl_out.aig", 0, 0, 0 ); - Gia_ManPrintStats( pSpec_out, pPars ); - Gia_ManPrintStats( pImpl_out, pPars ); + // Gia_AigerWrite( pSpec_out, "spec_out.aig", 0, 0, 0 ); + // Gia_AigerWrite( pImpl_out, "impl_out.aig", 0, 0, 0 ); + // Gia_ManPrintStats( pSpec_out, pPars ); + // Gia_ManPrintStats( pImpl_out, pPars ); } @@ -52093,11 +51978,26 @@ int Abc_CommandAbc9StrEco( Abc_Frame_t * pAbc, int argc, char ** argv ) Bnd_ManSetEqOut( Cec_ManVerify( pMiter, pParsCec ) ); Gia_ManStop( pMiter ); - // generate patched + // generate patched impl + printf("Generating patched impl\n"); pPatched = Bnd_ManGenPatched( pImpl_out, pAbc->pGia, pPatch ); + // generate patched spec just for debugging + printf("Generating patched spec\n"); + pTemp = Bnd_ManGenPatched( pSpec_out, pAbc->pGia, pPatch ); + printf("Checking the equivalence of patched spec and patched impl\n"); + pMiter = Gia_ManMiter( pTemp, pPatched, 0, 1, 0, 0, 0 ); + Cec_ManVerify( pMiter, pParsCec ); + Gia_ManStop( pMiter ); + printf("Checking the equivalence of patched spec and patch\n"); + pMiter = Gia_ManMiter( pTemp, pPatch, 0, 1, 0, 0, 0 ); + Cec_ManVerify( pMiter, pParsCec ); + Gia_ManStop( pMiter ); + + Gia_ManStop( pTemp ); + // check if patched is equiv to patch - printf("Checking the equivalence of patch and patched\n"); + printf("Checking the equivalence of patch and patched impl\n"); pMiter = Gia_ManMiter( pPatch, pPatched, 0, 1, 0, 0, 0 ); Bnd_ManSetEqRes( Cec_ManVerify( pMiter, pParsCec ) ); Gia_ManStop( pMiter ); @@ -52119,12 +52019,12 @@ int Abc_CommandAbc9StrEco( Abc_Frame_t * pAbc, int argc, char ** argv ) return 0; usage: - Abc_Print( -2, "usage: &str_eco -I [-vh] \n" ); - Abc_Print( -2, "\t creates the boundary miter\n" ); - Abc_Print( -2, "\t-I : number of boundary inputs\n" ); + Abc_Print( -2, "usage: &str_eco -I [-vh] \n" ); + Abc_Print( -2, "\t SAT-sweeping-based ECO\n" ); Abc_Print( -2, "\t-v : toggles printing verbose information [default = %s]\n", fVerbose? "yes": "no" ); Abc_Print( -2, "\t-h : print the command usage\n"); - Abc_Print( -2, "\t : the implementation file\n"); + Abc_Print( -2, "\t : the implementation aig. (should be equivalent to spec)\n"); + Abc_Print( -2, "\t : the modified spec. (should be a hierarchical AIG)\n"); return 1; } From 23654254e1e6f8965454504892fe68698e32990c Mon Sep 17 00:00:00 2001 From: Allen Ho Date: Sun, 3 Mar 2024 03:06:13 +0800 Subject: [PATCH 16/33] clean up --- src/aig/gia/giaBound.c | 99 +++++++++++++++++++++++------------------- src/base/abci/abc.c | 2 +- 2 files changed, 56 insertions(+), 45 deletions(-) diff --git a/src/aig/gia/giaBound.c b/src/aig/gia/giaBound.c index 9fad955d72..7988d86552 100644 --- a/src/aig/gia/giaBound.c +++ b/src/aig/gia/giaBound.c @@ -299,14 +299,14 @@ void Bnd_ManPrintBound() // printf("%d nodes merged in spec\n", pBnd ->nMerged_spec - Vec_IntSize(pBnd->vBI) - Vec_IntSize(pBnd->vBO) ); // printf("%d nodes merged in impl\n", pBnd ->nMerged_impl ); - printf("BI spec:"); Vec_IntPrint(pBnd -> vBI); - printf("BO spec:"); Vec_IntPrint(pBnd -> vBO); - printf("EI spec:"); Vec_IntPrint(pBnd -> vEI_spec); - printf("EI impl:"); Vec_IntPrint(pBnd -> vEI_impl); - printf("EI phase:"); Vec_BitPrint(pBnd -> vEI_phase); - printf("EO spec:"); Vec_IntPrint(pBnd -> vEO_spec); - printf("EO impl:"); Vec_IntPrint(pBnd -> vEO_impl); - printf("EO phase:"); Vec_BitPrint(pBnd -> vEO_phase); + printf("BI spec:\t"); Vec_IntPrint(pBnd -> vBI); + printf("BO spec:\t"); Vec_IntPrint(pBnd -> vBO); + printf("EI spec:\t"); Vec_IntPrint(pBnd -> vEI_spec); + printf("EI impl:\t"); Vec_IntPrint(pBnd -> vEI_impl); + printf("EI phase:\t"); Vec_BitPrint(pBnd -> vEI_phase); + printf("EO spec:\t"); Vec_IntPrint(pBnd -> vEO_spec); + printf("EO impl:\t"); Vec_IntPrint(pBnd -> vEO_impl); + printf("EO phase:\t"); Vec_BitPrint(pBnd -> vEO_phase); } void Bnd_ManPrintStats() @@ -347,21 +347,21 @@ void Bnd_ManPrintStats() // warning (may be neq) // eq_out, eq_res - printf("\nRESULT\n"); - printf("%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d\n", - p->nInternal, - p->nBI, p->nBO, - p->nBI_miss, p->nBO_miss, - Vec_IntSize(p->vEI_spec), Vec_IntSize(p->vEO_spec), p->nExtra, - p->nNode_spec, p->nNode_impl, p->nNode_patched, - p->combLoop_spec, p->combLoop_impl, - p->status, - p->nChoice_impl, - p->nChoice_spec, - p->feedthrough, - warning, - p->eq_out, p->eq_res - ); + // printf("\nRESULT\n"); + // printf("%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d\n", + // p->nInternal, + // p->nBI, p->nBO, + // p->nBI_miss, p->nBO_miss, + // Vec_IntSize(p->vEI_spec), Vec_IntSize(p->vEO_spec), p->nExtra, + // p->nNode_spec, p->nNode_impl, p->nNode_patched, + // p->combLoop_spec, p->combLoop_impl, + // p->status, + // p->nChoice_impl, + // p->nChoice_spec, + // p->feedthrough, + // warning, + // p->eq_out, p->eq_res + // ); } /**Function************************************************************* @@ -580,7 +580,6 @@ void Bnd_ManFindBound( Gia_Man_t * p ) } cnt++; } - printf("#BI = %d #BO = %d\n", Vec_IntSize(vBI), Vec_IntSize(vBO) ); // compute EO, travse with flag 1 Vec_IntForEachEntry( vBO, id, i ) @@ -785,14 +784,26 @@ Gia_Man_t* Bnd_ManCutBoundary( Gia_Man_t *p, Vec_Int_t* vEI, Vec_Int_t* vEO, Vec return 0; } + // detect feedthrough + Gia_ManFillValue(p); + Vec_IntForEachEntry(vEO, id, i) + { + Gia_ManObj(p, id) -> Value = 1; + } + Vec_IntForEachEntry(vEI, id, i) + { + if ( Gia_ManObj(p, id) -> Value == 1 ) + pBnd -> feedthrough = 1; + } // initialize pNew = Gia_ManStart( Gia_ManObjNum(p) ); pNew -> pName = ABC_ALLOC( char, strlen(p->pName)+10); sprintf( pNew -> pName, "%s_out", p -> pName ); Gia_ManHashStart( pNew ); + Gia_ManFillValue(p); Gia_ManConst0(p) -> Value = 0; - Gia_ManCleanValue(p); + // record the original value for eo vValue = Vec_IntAlloc( Gia_ManObjNum(p) ); @@ -805,7 +816,7 @@ Gia_Man_t* Bnd_ManCutBoundary( Gia_Man_t *p, Vec_Int_t* vEI, Vec_Int_t* vEO, Vec } Vec_IntForEachEntry( vEO, id, i ) { - if( Gia_ManObj(p, id) -> Value != 0 ) + if( Gia_ManObj(p, id) -> Value != ~0 ) { Vec_IntSetEntry( vValue, id, Gia_ManObj(p, id) -> Value ); } @@ -817,18 +828,10 @@ Gia_Man_t* Bnd_ManCutBoundary( Gia_Man_t *p, Vec_Int_t* vEI, Vec_Int_t* vEO, Vec } - // record where EI and EO share the same node - // this may cause non-equivalent - Vec_IntForEachEntry( vEI, id, i ) - { - if ( Gia_ManObj(p, id) -> Value != 0 ) - pBnd -> feedthrough = 1; - } - // add aig nodes Gia_ManForEachAnd(p, pObj, i) { - if ( pObj -> Value ) continue; + if ( pObj -> Value != ~0 ) continue; pObj -> Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); } @@ -884,12 +887,7 @@ Gia_Man_t* Bnd_ManGenImplOut( Gia_Man_t* p ) void Bnd_AddNodeRec( Gia_Man_t *p, Gia_Man_t *pNew, Gia_Obj_t *pObj ) { // TODO does this mean constant zero node? - if ( pObj -> Value != 0 ) return; - if ( Gia_ObjIsConst0(pObj) ) - { - printf( "contant zero encountered\n"); - return; - } + if ( pObj -> Value != ~0 ) return; for( int i = 0; i < Gia_ObjFaninNum(p, pObj); i++ ) { @@ -925,9 +923,12 @@ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPat pNew -> pName = ABC_ALLOC( char, strlen(pOut->pName)+3); sprintf( pNew -> pName, "%s_p", pOut -> pName ); Gia_ManHashStart( pNew ); - Gia_ManCleanValue(pOut); - Gia_ManCleanValue(pSpec); - Gia_ManCleanValue(pPatch); + Gia_ManFillValue(pOut); + Gia_ManFillValue(pSpec); + Gia_ManFillValue(pPatch); + Gia_ManConst0(pOut)->Value = 0; + Gia_ManConst0(pSpec)->Value = 0; + Gia_ManConst0(pPatch)->Value = 0; // get bi and bo in patch cnt = 0; @@ -966,7 +967,9 @@ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPat // set Spec EI Gia_ManObj( pSpec, Vec_IntEntry(pBnd -> vEI_spec, i) ) -> Value = pObj -> Value; + // printf(" %d",pObj -> Value); } + // printf("\n"); // add Spec BI to EI // printf("adding BI to EI in Spec\n"); @@ -977,7 +980,9 @@ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPat // set patch bi Gia_ManObj( pPatch, Vec_IntEntry( vBI_patch, i) ) -> Value = pObj -> Value; + // printf(" %d",pObj -> Value); } + // printf("\n"); // add Patch BO to BI // printf("adding BO to BI in Patch\n"); @@ -988,7 +993,9 @@ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPat // set spec bo Gia_ManObj( pSpec, Vec_IntEntry( pBnd -> vBO, i) ) -> Value = pObj -> Value; + // printf(" %d",pObj -> Value); } + // printf("\n"); // add Spec EO to BO // printf("adding EO to BO in Spec\n"); @@ -999,7 +1006,9 @@ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPat // set impl EO (PI) Gia_ManCi( pOut, i + Gia_ManCiNum(pSpec) ) -> Value = pObj -> Value; + // printf(" %d",pObj -> Value); } + // printf("\n"); // add Impl (real) PO to EO // printf("adding CO to EO in Impl\n"); @@ -1008,7 +1017,9 @@ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPat pObj = Gia_ManCo( pOut, i ); Bnd_AddNodeRec( pOut, pNew, pObj ); Gia_ManAppendCo( pNew, pObj->Value ); + // printf(" %d",pObj -> Value); } + // printf("\n"); // clean up diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c index ed930636b3..4f53096f8c 100644 --- a/src/base/abci/abc.c +++ b/src/base/abci/abc.c @@ -51997,7 +51997,7 @@ int Abc_CommandAbc9StrEco( Abc_Frame_t * pAbc, int argc, char ** argv ) Gia_ManStop( pTemp ); // check if patched is equiv to patch - printf("Checking the equivalence of patch and patched impl\n"); + printf("Checking the equivalence of patched impl and patch\n"); pMiter = Gia_ManMiter( pPatch, pPatched, 0, 1, 0, 0, 0 ); Bnd_ManSetEqRes( Cec_ManVerify( pMiter, pParsCec ) ); Gia_ManStop( pMiter ); From a1159d98dff6af1d59dba6cc3309d174c9d065d6 Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Sat, 2 Mar 2024 16:10:37 -0800 Subject: [PATCH 17/33] Fixing a compiler problem with namespaces. --- src/sat/bsat2/ParseUtils.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/sat/bsat2/ParseUtils.h b/src/sat/bsat2/ParseUtils.h index 8e0f9c8901..b7325f1745 100644 --- a/src/sat/bsat2/ParseUtils.h +++ b/src/sat/bsat2/ParseUtils.h @@ -26,6 +26,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include "misc/zlib/zlib.h" +ABC_NAMESPACE_CXX_HEADER_START + namespace Minisat { //------------------------------------------------------------------------------------------------- @@ -119,4 +121,6 @@ static bool eagerMatch(B& in, const char* str) { //================================================================================================= } +ABC_NAMESPACE_CXX_HEADER_END + #endif From 4de4605836f6bea796ced63b27b7eb6c252d6880 Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Sat, 2 Mar 2024 16:31:41 -0800 Subject: [PATCH 18/33] More changees to compile new code with namespaces. --- src/sat/bsat2/Alg.h | 4 ++++ src/sat/bsat2/Alloc.h | 4 ++++ src/sat/bsat2/Dimacs.h | 4 ++++ src/sat/bsat2/Heap.h | 4 ++++ src/sat/bsat2/MainSat.cpp | 5 +++++ src/sat/bsat2/MainSimp.cpp | 5 +++++ src/sat/bsat2/Map.h | 4 ++++ src/sat/bsat2/Options.cpp | 4 ++++ src/sat/bsat2/Options.h | 4 ++++ src/sat/bsat2/Queue.h | 4 ++++ src/sat/bsat2/SimpSolver.cpp | 4 ++++ src/sat/bsat2/SimpSolver.h | 3 +++ src/sat/bsat2/Solver.cpp | 4 ++++ src/sat/bsat2/Solver.h | 3 +++ src/sat/bsat2/SolverTypes.h | 4 ++++ src/sat/bsat2/Sort.h | 3 +++ src/sat/bsat2/System.cpp | 18 ++++++++++++++++++ src/sat/bsat2/System.h | 4 ++++ src/sat/bsat2/Vec.h | 4 ++++ src/sat/bsat2/XAlloc.h | 4 ++++ 20 files changed, 93 insertions(+) diff --git a/src/sat/bsat2/Alg.h b/src/sat/bsat2/Alg.h index 3e0745f1d3..2a5af3efff 100644 --- a/src/sat/bsat2/Alg.h +++ b/src/sat/bsat2/Alg.h @@ -23,6 +23,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include "Vec.h" +ABC_NAMESPACE_CXX_HEADER_START + namespace Minisat { //================================================================================================= @@ -81,4 +83,6 @@ static inline void append(const vec& from, vec& to){ copy(from, to, true); //================================================================================================= } +ABC_NAMESPACE_CXX_HEADER_END + #endif diff --git a/src/sat/bsat2/Alloc.h b/src/sat/bsat2/Alloc.h index 7f506cb5a9..c583bf3b68 100644 --- a/src/sat/bsat2/Alloc.h +++ b/src/sat/bsat2/Alloc.h @@ -24,6 +24,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include "XAlloc.h" #include "Vec.h" +ABC_NAMESPACE_CXX_HEADER_START + namespace Minisat { //================================================================================================= @@ -128,4 +130,6 @@ RegionAllocator::alloc(int size) //================================================================================================= } +ABC_NAMESPACE_CXX_HEADER_END + #endif diff --git a/src/sat/bsat2/Dimacs.h b/src/sat/bsat2/Dimacs.h index f26f152be2..806b869422 100644 --- a/src/sat/bsat2/Dimacs.h +++ b/src/sat/bsat2/Dimacs.h @@ -26,6 +26,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include "ParseUtils.h" #include "SolverTypes.h" +ABC_NAMESPACE_CXX_HEADER_START + namespace Minisat { //================================================================================================= @@ -86,4 +88,6 @@ static void parse_DIMACS(gzFile input_stream, Solver& S) { //================================================================================================= } +ABC_NAMESPACE_CXX_HEADER_END + #endif diff --git a/src/sat/bsat2/Heap.h b/src/sat/bsat2/Heap.h index e5b4ddb56a..bdaa7edfda 100644 --- a/src/sat/bsat2/Heap.h +++ b/src/sat/bsat2/Heap.h @@ -23,6 +23,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include "Vec.h" +ABC_NAMESPACE_CXX_HEADER_START + namespace Minisat { //================================================================================================= @@ -146,4 +148,6 @@ class Heap { //================================================================================================= } +ABC_NAMESPACE_CXX_HEADER_END + #endif diff --git a/src/sat/bsat2/MainSat.cpp b/src/sat/bsat2/MainSat.cpp index 1f61f9eecc..e988ac3ac4 100644 --- a/src/sat/bsat2/MainSat.cpp +++ b/src/sat/bsat2/MainSat.cpp @@ -29,6 +29,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include "Dimacs.h" #include "Solver.h" +ABC_NAMESPACE_IMPL_START + using namespace Minisat; //================================================================================================= @@ -195,3 +197,6 @@ extern "C" int MainSat(int argc, char** argv) exit(0); } } + + +ABC_NAMESPACE_IMPL_END diff --git a/src/sat/bsat2/MainSimp.cpp b/src/sat/bsat2/MainSimp.cpp index 4a89092108..c959e606f5 100644 --- a/src/sat/bsat2/MainSimp.cpp +++ b/src/sat/bsat2/MainSimp.cpp @@ -33,6 +33,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include "Dimacs.h" #include "SimpSolver.h" +ABC_NAMESPACE_IMPL_START + using namespace Minisat; //================================================================================================= @@ -204,3 +206,6 @@ extern "C" int MainSimp(int argc, char** argv) exit(0); } } + + +ABC_NAMESPACE_IMPL_END diff --git a/src/sat/bsat2/Map.h b/src/sat/bsat2/Map.h index 1dd22a06d3..d9a4c56310 100644 --- a/src/sat/bsat2/Map.h +++ b/src/sat/bsat2/Map.h @@ -23,6 +23,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include "IntTypes.h" #include "Vec.h" +ABC_NAMESPACE_CXX_HEADER_START + namespace Minisat { //================================================================================================= @@ -190,4 +192,6 @@ class Map { //================================================================================================= } +ABC_NAMESPACE_CXX_HEADER_END + #endif diff --git a/src/sat/bsat2/Options.cpp b/src/sat/bsat2/Options.cpp index b30cff0e5f..1f700dc0f0 100644 --- a/src/sat/bsat2/Options.cpp +++ b/src/sat/bsat2/Options.cpp @@ -21,6 +21,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include "Options.h" #include "ParseUtils.h" +ABC_NAMESPACE_IMPL_START + using namespace Minisat; int Minisat::parseOptions(int& argc, char** argv, bool strict) @@ -91,3 +93,5 @@ int Minisat::printUsageAndExit (int argc, char** argv, bool verbose) return 0; } + +ABC_NAMESPACE_IMPL_END diff --git a/src/sat/bsat2/Options.h b/src/sat/bsat2/Options.h index 439cb8f216..42bc451268 100644 --- a/src/sat/bsat2/Options.h +++ b/src/sat/bsat2/Options.h @@ -29,6 +29,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include "Vec.h" #include "ParseUtils.h" +ABC_NAMESPACE_CXX_HEADER_START + namespace Minisat { //================================================================================================== @@ -384,4 +386,6 @@ class BoolOption : public Option //================================================================================================= } +ABC_NAMESPACE_CXX_HEADER_END + #endif diff --git a/src/sat/bsat2/Queue.h b/src/sat/bsat2/Queue.h index 11b4291151..dd40e2c91d 100644 --- a/src/sat/bsat2/Queue.h +++ b/src/sat/bsat2/Queue.h @@ -25,6 +25,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA namespace Minisat { +ABC_NAMESPACE_CXX_HEADER_START + //================================================================================================= template @@ -66,4 +68,6 @@ class Queue { //================================================================================================= } +ABC_NAMESPACE_CXX_HEADER_END + #endif diff --git a/src/sat/bsat2/SimpSolver.cpp b/src/sat/bsat2/SimpSolver.cpp index 5a7a006c21..59820a47b0 100644 --- a/src/sat/bsat2/SimpSolver.cpp +++ b/src/sat/bsat2/SimpSolver.cpp @@ -22,6 +22,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include "SimpSolver.h" #include "System.h" +ABC_NAMESPACE_IMPL_START + using namespace Minisat; //================================================================================================= @@ -718,3 +720,5 @@ void SimpSolver::garbageCollect() ca.size()*ClauseAllocator::Unit_Size, to.size()*ClauseAllocator::Unit_Size); to.moveTo(ca); } + +ABC_NAMESPACE_IMPL_END \ No newline at end of file diff --git a/src/sat/bsat2/SimpSolver.h b/src/sat/bsat2/SimpSolver.h index e24b0e4305..098254a12f 100644 --- a/src/sat/bsat2/SimpSolver.h +++ b/src/sat/bsat2/SimpSolver.h @@ -24,6 +24,7 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include "Queue.h" #include "Solver.h" +ABC_NAMESPACE_CXX_HEADER_START namespace Minisat { @@ -194,4 +195,6 @@ inline lbool SimpSolver::solveLimited (const vec& assumps, bool do_simp, bo //================================================================================================= } +ABC_NAMESPACE_CXX_HEADER_END + #endif diff --git a/src/sat/bsat2/Solver.cpp b/src/sat/bsat2/Solver.cpp index 0f8b415a93..2a06424075 100644 --- a/src/sat/bsat2/Solver.cpp +++ b/src/sat/bsat2/Solver.cpp @@ -23,6 +23,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include "Sort.h" #include "Solver.h" +ABC_NAMESPACE_IMPL_START + using namespace Minisat; //================================================================================================= @@ -922,3 +924,5 @@ void Solver::garbageCollect() ca.size()*ClauseAllocator::Unit_Size, to.size()*ClauseAllocator::Unit_Size); to.moveTo(ca); } + +ABC_NAMESPACE_IMPL_END diff --git a/src/sat/bsat2/Solver.h b/src/sat/bsat2/Solver.h index fc0bb4ba2e..d14b2fec82 100644 --- a/src/sat/bsat2/Solver.h +++ b/src/sat/bsat2/Solver.h @@ -27,6 +27,7 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include "Options.h" #include "SolverTypes.h" +ABC_NAMESPACE_CXX_HEADER_START namespace Minisat { @@ -370,4 +371,6 @@ inline void Solver::toDimacs (const char* file, Lit p, Lit q, Lit r){ ve //================================================================================================= } +ABC_NAMESPACE_CXX_HEADER_END + #endif diff --git a/src/sat/bsat2/SolverTypes.h b/src/sat/bsat2/SolverTypes.h index f34deca1ca..6401a2a0c1 100644 --- a/src/sat/bsat2/SolverTypes.h +++ b/src/sat/bsat2/SolverTypes.h @@ -30,6 +30,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include "Map.h" #include "Alloc.h" +ABC_NAMESPACE_CXX_HEADER_START + namespace Minisat { //================================================================================================= @@ -404,4 +406,6 @@ inline void Clause::strengthen(Lit p) //================================================================================================= } +ABC_NAMESPACE_CXX_HEADER_END + #endif diff --git a/src/sat/bsat2/Sort.h b/src/sat/bsat2/Sort.h index cc96486d8c..15b6b7d075 100644 --- a/src/sat/bsat2/Sort.h +++ b/src/sat/bsat2/Sort.h @@ -26,6 +26,7 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA //================================================================================================= // Some sorting algorithms for vec's +ABC_NAMESPACE_CXX_HEADER_START namespace Minisat { @@ -95,4 +96,6 @@ template void sort(vec& v) { //================================================================================================= } +ABC_NAMESPACE_CXX_HEADER_END + #endif diff --git a/src/sat/bsat2/System.cpp b/src/sat/bsat2/System.cpp index c2d6259e28..e617500c2d 100644 --- a/src/sat/bsat2/System.cpp +++ b/src/sat/bsat2/System.cpp @@ -25,6 +25,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include #include +ABC_NAMESPACE_IMPL_START + using namespace Minisat; // TODO: split the memory reading functions into two: one for reading high-watermark of RSS, and @@ -72,24 +74,40 @@ double Minisat::memUsedPeak() { double peak = memReadPeak() / 1024; return peak == 0 ? memUsed() : peak; } +ABC_NAMESPACE_IMPL_END + #elif defined(__FreeBSD__) +ABC_NAMESPACE_IMPL_START + double Minisat::memUsed(void) { struct rusage ru; getrusage(RUSAGE_SELF, &ru); return (double)ru.ru_maxrss / 1024; } double MiniSat::memUsedPeak(void) { return memUsed(); } +ABC_NAMESPACE_IMPL_END #elif defined(__APPLE__) #include +ABC_NAMESPACE_IMPL_START + double Minisat::memUsed(void) { malloc_statistics_t t; malloc_zone_statistics(NULL, &t); return (double)t.max_size_in_use / (1024*1024); } +ABC_NAMESPACE_IMPL_END + #else + +ABC_NAMESPACE_IMPL_START + double Minisat::memUsed() { return 0; } double Minisat::memUsedPeak() { return 0; } + +ABC_NAMESPACE_IMPL_END + #endif + diff --git a/src/sat/bsat2/System.h b/src/sat/bsat2/System.h index d776c880c8..2952d4117b 100644 --- a/src/sat/bsat2/System.h +++ b/src/sat/bsat2/System.h @@ -29,6 +29,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA //------------------------------------------------------------------------------------------------- +ABC_NAMESPACE_CXX_HEADER_START + namespace Minisat { static inline double cpuTime(void); // CPU-time in seconds. @@ -57,4 +59,6 @@ static inline double Minisat::cpuTime(void) { #endif +ABC_NAMESPACE_CXX_HEADER_END + #endif diff --git a/src/sat/bsat2/Vec.h b/src/sat/bsat2/Vec.h index f0e07d016a..59b5583a8f 100644 --- a/src/sat/bsat2/Vec.h +++ b/src/sat/bsat2/Vec.h @@ -27,6 +27,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include "IntTypes.h" #include "XAlloc.h" +ABC_NAMESPACE_CXX_HEADER_START + namespace Minisat { //================================================================================================= @@ -127,4 +129,6 @@ void vec::clear(bool dealloc) { //================================================================================================= } +ABC_NAMESPACE_CXX_HEADER_END + #endif diff --git a/src/sat/bsat2/XAlloc.h b/src/sat/bsat2/XAlloc.h index 1da176028d..9533b6b908 100644 --- a/src/sat/bsat2/XAlloc.h +++ b/src/sat/bsat2/XAlloc.h @@ -24,6 +24,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include #include +ABC_NAMESPACE_CXX_HEADER_START + namespace Minisat { //================================================================================================= @@ -42,4 +44,6 @@ static inline void* xrealloc(void *ptr, size_t size) //================================================================================================= } +ABC_NAMESPACE_CXX_HEADER_END + #endif From f6f542c87330e15386952b12fda4ba1c7b971c30 Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Sat, 2 Mar 2024 16:38:16 -0800 Subject: [PATCH 19/33] More changes to compile with namespaces. --- src/sat/bsat2/IntTypes.h | 2 ++ src/sat/bsat2/XAlloc.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/src/sat/bsat2/IntTypes.h b/src/sat/bsat2/IntTypes.h index 1c011e83af..fdcd3d9f70 100644 --- a/src/sat/bsat2/IntTypes.h +++ b/src/sat/bsat2/IntTypes.h @@ -44,4 +44,6 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA //================================================================================================= +#include + #endif diff --git a/src/sat/bsat2/XAlloc.h b/src/sat/bsat2/XAlloc.h index 9533b6b908..fdebe502ad 100644 --- a/src/sat/bsat2/XAlloc.h +++ b/src/sat/bsat2/XAlloc.h @@ -24,6 +24,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include #include +#include + ABC_NAMESPACE_CXX_HEADER_START namespace Minisat { From ce44eda85afef96e8fb1ba4fefedad9c72358a19 Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Sat, 2 Mar 2024 16:46:09 -0800 Subject: [PATCH 20/33] More changes. --- src/sat/bsat2/Alg.h | 2 +- src/sat/bsat2/Alloc.h | 4 ++-- src/sat/bsat2/Dimacs.h | 4 ++-- src/sat/bsat2/Heap.h | 2 +- src/sat/bsat2/MainSat.cpp | 10 +++++----- src/sat/bsat2/MainSimp.cpp | 10 +++++----- src/sat/bsat2/Map.h | 4 ++-- src/sat/bsat2/Options.cpp | 6 +++--- src/sat/bsat2/Options.h | 6 +++--- src/sat/bsat2/Queue.h | 2 +- src/sat/bsat2/SimpSolver.cpp | 6 +++--- src/sat/bsat2/SimpSolver.h | 4 ++-- src/sat/bsat2/Solver.cpp | 4 ++-- src/sat/bsat2/Solver.h | 10 +++++----- src/sat/bsat2/SolverTypes.h | 10 +++++----- src/sat/bsat2/Sort.h | 2 +- src/sat/bsat2/System.cpp | 2 +- src/sat/bsat2/System.h | 2 +- src/sat/bsat2/Vec.h | 4 ++-- 19 files changed, 47 insertions(+), 47 deletions(-) diff --git a/src/sat/bsat2/Alg.h b/src/sat/bsat2/Alg.h index 2a5af3efff..87004fce87 100644 --- a/src/sat/bsat2/Alg.h +++ b/src/sat/bsat2/Alg.h @@ -21,7 +21,7 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #ifndef Minisat_Alg_h #define Minisat_Alg_h -#include "Vec.h" +#include "sat/bsat2/Vec.h" ABC_NAMESPACE_CXX_HEADER_START diff --git a/src/sat/bsat2/Alloc.h b/src/sat/bsat2/Alloc.h index c583bf3b68..a9786a9a88 100644 --- a/src/sat/bsat2/Alloc.h +++ b/src/sat/bsat2/Alloc.h @@ -21,8 +21,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #ifndef Minisat_Alloc_h #define Minisat_Alloc_h -#include "XAlloc.h" -#include "Vec.h" +#include "sat/bsat2/XAlloc.h" +#include "sat/bsat2/Vec.h" ABC_NAMESPACE_CXX_HEADER_START diff --git a/src/sat/bsat2/Dimacs.h b/src/sat/bsat2/Dimacs.h index 806b869422..0e7ad925a3 100644 --- a/src/sat/bsat2/Dimacs.h +++ b/src/sat/bsat2/Dimacs.h @@ -23,8 +23,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include -#include "ParseUtils.h" -#include "SolverTypes.h" +#include "sat/bsat2/ParseUtils.h" +#include "sat/bsat2/SolverTypes.h" ABC_NAMESPACE_CXX_HEADER_START diff --git a/src/sat/bsat2/Heap.h b/src/sat/bsat2/Heap.h index bdaa7edfda..ae50c4b57c 100644 --- a/src/sat/bsat2/Heap.h +++ b/src/sat/bsat2/Heap.h @@ -21,7 +21,7 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #ifndef Minisat_Heap_h #define Minisat_Heap_h -#include "Vec.h" +#include "sat/bsat2/Vec.h" ABC_NAMESPACE_CXX_HEADER_START diff --git a/src/sat/bsat2/MainSat.cpp b/src/sat/bsat2/MainSat.cpp index e988ac3ac4..8554662631 100644 --- a/src/sat/bsat2/MainSat.cpp +++ b/src/sat/bsat2/MainSat.cpp @@ -23,11 +23,11 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include #include "misc/zlib/zlib.h" -#include "System.h" -#include "ParseUtils.h" -#include "Options.h" -#include "Dimacs.h" -#include "Solver.h" +#include "sat/bsat2/System.h" +#include "sat/bsat2/ParseUtils.h" +#include "sat/bsat2/Options.h" +#include "sat/bsat2/Dimacs.h" +#include "sat/bsat2/Solver.h" ABC_NAMESPACE_IMPL_START diff --git a/src/sat/bsat2/MainSimp.cpp b/src/sat/bsat2/MainSimp.cpp index c959e606f5..2d0ad109e1 100644 --- a/src/sat/bsat2/MainSimp.cpp +++ b/src/sat/bsat2/MainSimp.cpp @@ -27,11 +27,11 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include #endif -#include "System.h" -#include "ParseUtils.h" -#include "Options.h" -#include "Dimacs.h" -#include "SimpSolver.h" +#include "sat/bsat2/System.h" +#include "sat/bsat2/ParseUtils.h" +#include "sat/bsat2/Options.h" +#include "sat/bsat2/Dimacs.h" +#include "sat/bsat2/SimpSolver.h" ABC_NAMESPACE_IMPL_START diff --git a/src/sat/bsat2/Map.h b/src/sat/bsat2/Map.h index d9a4c56310..374e76c9b6 100644 --- a/src/sat/bsat2/Map.h +++ b/src/sat/bsat2/Map.h @@ -20,8 +20,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #ifndef Minisat_Map_h #define Minisat_Map_h -#include "IntTypes.h" -#include "Vec.h" +#include "sat/bsat2/IntTypes.h" +#include "sat/bsat2/Vec.h" ABC_NAMESPACE_CXX_HEADER_START diff --git a/src/sat/bsat2/Options.cpp b/src/sat/bsat2/Options.cpp index 1f700dc0f0..f14059f670 100644 --- a/src/sat/bsat2/Options.cpp +++ b/src/sat/bsat2/Options.cpp @@ -17,9 +17,9 @@ DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************************************/ -#include "Sort.h" -#include "Options.h" -#include "ParseUtils.h" +#include "sat/bsat2/Sort.h" +#include "sat/bsat2/Options.h" +#include "sat/bsat2/ParseUtils.h" ABC_NAMESPACE_IMPL_START diff --git a/src/sat/bsat2/Options.h b/src/sat/bsat2/Options.h index 42bc451268..137b5a45ef 100644 --- a/src/sat/bsat2/Options.h +++ b/src/sat/bsat2/Options.h @@ -25,9 +25,9 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include #include -#include "IntTypes.h" -#include "Vec.h" -#include "ParseUtils.h" +#include "sat/bsat2/IntTypes.h" +#include "sat/bsat2/Vec.h" +#include "sat/bsat2/ParseUtils.h" ABC_NAMESPACE_CXX_HEADER_START diff --git a/src/sat/bsat2/Queue.h b/src/sat/bsat2/Queue.h index dd40e2c91d..c2b3c64ad8 100644 --- a/src/sat/bsat2/Queue.h +++ b/src/sat/bsat2/Queue.h @@ -21,7 +21,7 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #ifndef Minisat_Queue_h #define Minisat_Queue_h -#include "Vec.h" +#include "sat/bsat2/Vec.h" namespace Minisat { diff --git a/src/sat/bsat2/SimpSolver.cpp b/src/sat/bsat2/SimpSolver.cpp index 59820a47b0..59952d1542 100644 --- a/src/sat/bsat2/SimpSolver.cpp +++ b/src/sat/bsat2/SimpSolver.cpp @@ -18,9 +18,9 @@ DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************************************/ -#include "Sort.h" -#include "SimpSolver.h" -#include "System.h" +#include "sat/bsat2/Sort.h" +#include "sat/bsat2/SimpSolver.h" +#include "sat/bsat2/System.h" ABC_NAMESPACE_IMPL_START diff --git a/src/sat/bsat2/SimpSolver.h b/src/sat/bsat2/SimpSolver.h index 098254a12f..ad02c6dff8 100644 --- a/src/sat/bsat2/SimpSolver.h +++ b/src/sat/bsat2/SimpSolver.h @@ -21,8 +21,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #ifndef Minisat_SimpSolver_h #define Minisat_SimpSolver_h -#include "Queue.h" -#include "Solver.h" +#include "sat/bsat2/Queue.h" +#include "sat/bsat2/Solver.h" ABC_NAMESPACE_CXX_HEADER_START diff --git a/src/sat/bsat2/Solver.cpp b/src/sat/bsat2/Solver.cpp index 2a06424075..1c45a45385 100644 --- a/src/sat/bsat2/Solver.cpp +++ b/src/sat/bsat2/Solver.cpp @@ -20,8 +20,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include -#include "Sort.h" -#include "Solver.h" +#include "sat/bsat2/Sort.h" +#include "sat/bsat2/Solver.h" ABC_NAMESPACE_IMPL_START diff --git a/src/sat/bsat2/Solver.h b/src/sat/bsat2/Solver.h index d14b2fec82..9c9a30ee3b 100644 --- a/src/sat/bsat2/Solver.h +++ b/src/sat/bsat2/Solver.h @@ -21,11 +21,11 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #ifndef Minisat_Solver_h #define Minisat_Solver_h -#include "Vec.h" -#include "Heap.h" -#include "Alg.h" -#include "Options.h" -#include "SolverTypes.h" +#include "sat/bsat2/Vec.h" +#include "sat/bsat2/Heap.h" +#include "sat/bsat2/Alg.h" +#include "sat/bsat2/Options.h" +#include "sat/bsat2/SolverTypes.h" ABC_NAMESPACE_CXX_HEADER_START diff --git a/src/sat/bsat2/SolverTypes.h b/src/sat/bsat2/SolverTypes.h index 6401a2a0c1..64fbe980e7 100644 --- a/src/sat/bsat2/SolverTypes.h +++ b/src/sat/bsat2/SolverTypes.h @@ -24,11 +24,11 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include -#include "IntTypes.h" -#include "Alg.h" -#include "Vec.h" -#include "Map.h" -#include "Alloc.h" +#include "sat/bsat2/IntTypes.h" +#include "sat/bsat2/Alg.h" +#include "sat/bsat2/Vec.h" +#include "sat/bsat2/Map.h" +#include "sat/bsat2/Alloc.h" ABC_NAMESPACE_CXX_HEADER_START diff --git a/src/sat/bsat2/Sort.h b/src/sat/bsat2/Sort.h index 15b6b7d075..7ce99ea465 100644 --- a/src/sat/bsat2/Sort.h +++ b/src/sat/bsat2/Sort.h @@ -21,7 +21,7 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #ifndef Minisat_Sort_h #define Minisat_Sort_h -#include "Vec.h" +#include "sat/bsat2/Vec.h" //================================================================================================= // Some sorting algorithms for vec's diff --git a/src/sat/bsat2/System.cpp b/src/sat/bsat2/System.cpp index e617500c2d..2c64e7feaf 100644 --- a/src/sat/bsat2/System.cpp +++ b/src/sat/bsat2/System.cpp @@ -18,7 +18,7 @@ DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************************************/ -#include "System.h" +#include "sat/bsat2/System.h" #if defined(__linux__) diff --git a/src/sat/bsat2/System.h b/src/sat/bsat2/System.h index 2952d4117b..e3d8afba2f 100644 --- a/src/sat/bsat2/System.h +++ b/src/sat/bsat2/System.h @@ -25,7 +25,7 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include #endif -#include "IntTypes.h" +#include "sat/bsat2/IntTypes.h" //------------------------------------------------------------------------------------------------- diff --git a/src/sat/bsat2/Vec.h b/src/sat/bsat2/Vec.h index 59b5583a8f..aade19f139 100644 --- a/src/sat/bsat2/Vec.h +++ b/src/sat/bsat2/Vec.h @@ -24,8 +24,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include #include -#include "IntTypes.h" -#include "XAlloc.h" +#include "sat/bsat2/IntTypes.h" +#include "sat/bsat2/XAlloc.h" ABC_NAMESPACE_CXX_HEADER_START From b627aa7cb586b714cd109dad077d78ed0f433ffc Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Sat, 2 Mar 2024 16:57:00 -0800 Subject: [PATCH 21/33] More changes. --- src/sat/bsat2/System.h | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/src/sat/bsat2/System.h b/src/sat/bsat2/System.h index e3d8afba2f..f5ed5fa133 100644 --- a/src/sat/bsat2/System.h +++ b/src/sat/bsat2/System.h @@ -22,7 +22,7 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #define Minisat_System_h #if defined(__linux__) -#include +//#include #endif #include "sat/bsat2/IntTypes.h" @@ -39,26 +39,35 @@ extern double memUsedPeak(); // Peak-memory in mega bytes (returns 0 for } +ABC_NAMESPACE_CXX_HEADER_END + //------------------------------------------------------------------------------------------------- // Implementation of inline functions: #if defined(_MSC_VER) || defined(__MINGW32__) #include +ABC_NAMESPACE_CXX_HEADER_START + static inline double Minisat::cpuTime(void) { return (double)clock() / CLOCKS_PER_SEC; } +ABC_NAMESPACE_CXX_HEADER_END + #else #include #include #include +ABC_NAMESPACE_CXX_HEADER_START + static inline double Minisat::cpuTime(void) { struct rusage ru; getrusage(RUSAGE_SELF, &ru); return (double)ru.ru_utime.tv_sec + (double)ru.ru_utime.tv_usec / 1000000; } +ABC_NAMESPACE_CXX_HEADER_END + #endif -ABC_NAMESPACE_CXX_HEADER_END #endif From b73f1030a654b0db551d08145ba097044e90106d Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Sat, 2 Mar 2024 17:03:42 -0800 Subject: [PATCH 22/33] More changes. --- src/sat/bsat2/module.make | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/sat/bsat2/module.make b/src/sat/bsat2/module.make index ddd11b1b96..87cdc11ca4 100644 --- a/src/sat/bsat2/module.make +++ b/src/sat/bsat2/module.make @@ -1,6 +1,4 @@ SRC += src/sat/bsat2/AbcApi.cpp \ - src/sat/bsat2/MainSat.cpp \ - src/sat/bsat2/MainSimp.cpp \ src/sat/bsat2/Options.cpp \ src/sat/bsat2/SimpSolver.cpp \ src/sat/bsat2/Solver.cpp \ From eb24d29777dcc01a726cc065445ef638e2d04264 Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Sat, 2 Mar 2024 17:10:30 -0800 Subject: [PATCH 23/33] More changes. --- src/sat/bsat2/Queue.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/sat/bsat2/Queue.h b/src/sat/bsat2/Queue.h index c2b3c64ad8..8ff65b87b4 100644 --- a/src/sat/bsat2/Queue.h +++ b/src/sat/bsat2/Queue.h @@ -23,10 +23,10 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA #include "sat/bsat2/Vec.h" -namespace Minisat { - ABC_NAMESPACE_CXX_HEADER_START +namespace Minisat { + //================================================================================================= template From a747f46292ec06278d02fbb6bc785dbefba54d8c Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Sat, 2 Mar 2024 17:21:05 -0800 Subject: [PATCH 24/33] More changes to compile with g++. --- src/aig/gia/giaBound.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/src/aig/gia/giaBound.c b/src/aig/gia/giaBound.c index 7988d86552..916ed8e1f2 100644 --- a/src/aig/gia/giaBound.c +++ b/src/aig/gia/giaBound.c @@ -172,13 +172,13 @@ void Bnd_ManMap( int iLit, int id, int spec ) if ( spec ) { - Vec_IntPush( Vec_PtrEntry( pBnd -> vBmiter2Spec, iLit >> 1), id ); + Vec_IntPush( (Vec_Int_t *)Vec_PtrEntry( pBnd -> vBmiter2Spec, iLit >> 1), id ); Vec_BitSetEntry( pBnd -> vSpec2Impl_phase, id, iLit & 1 ); } else { assert( (iLit & 1) == 0 ); - Vec_IntPush( Vec_PtrEntry( pBnd -> vBmiter2Impl, iLit >> 1), id ); + Vec_IntPush( (Vec_Int_t *)Vec_PtrEntry( pBnd -> vBmiter2Impl, iLit >> 1), id ); } } @@ -193,10 +193,10 @@ void Bnd_ManMerge( int id_repr, int id_obj, int phaseDiff ) Vec_Int_t *vIds_spec_repr, *vIds_impl_repr, *vIds_spec_obj, *vIds_impl_obj; - vIds_spec_repr = Vec_PtrEntry( vBmiter2Spec, id_repr ); - vIds_impl_repr = Vec_PtrEntry( vBmiter2Impl, id_repr ); - vIds_spec_obj = Vec_PtrEntry( vBmiter2Spec, id_obj ); - vIds_impl_obj = Vec_PtrEntry( vBmiter2Impl, id_obj ); + vIds_spec_repr = (Vec_Int_t *)Vec_PtrEntry( vBmiter2Spec, id_repr ); + vIds_impl_repr = (Vec_Int_t *)Vec_PtrEntry( vBmiter2Impl, id_repr ); + vIds_spec_obj = (Vec_Int_t *)Vec_PtrEntry( vBmiter2Spec, id_obj ); + vIds_impl_obj = (Vec_Int_t *)Vec_PtrEntry( vBmiter2Impl, id_obj ); Vec_IntForEachEntry( vIds_spec_obj, id, i ) { @@ -237,8 +237,8 @@ void Bnd_ManFinalizeMappings() for( i = 0; i < Vec_PtrSize(vBmiter2Spec); i++ ) { - vSpec = Vec_PtrEntry( vBmiter2Spec, i ); - vImpl = Vec_PtrEntry( vBmiter2Impl, i ); + vSpec = (Vec_Int_t *)Vec_PtrEntry( vBmiter2Spec, i ); + vImpl = (Vec_Int_t *)Vec_PtrEntry( vBmiter2Impl, i ); // create spec2impl if ( Vec_IntSize(vSpec) != 0 && Vec_IntSize(vImpl) != 0 ) @@ -282,8 +282,8 @@ void Bnd_ManPrintMappings() for( int j=0; j < Vec_PtrSize(vBmiter2Spec); j++ ) { printf("node %d: ", j); - vIds_spec = Vec_PtrEntry( vBmiter2Spec, j); - vIds_impl = Vec_PtrEntry( vBmiter2Impl, j); + vIds_spec = (Vec_Int_t *)Vec_PtrEntry( vBmiter2Spec, j); + vIds_impl = (Vec_Int_t *)Vec_PtrEntry( vBmiter2Impl, j); Vec_IntForEachEntry(vIds_spec, id, k) printf("%d ", id); printf("| "); @@ -599,7 +599,7 @@ void Bnd_ManFindBound( Gia_Man_t * p ) int cnt_extra = - Vec_PtrSize(vQ); while( Vec_PtrSize(vQ) > 0 ) { - pObj = Vec_PtrPop(vQ); + pObj = (Gia_Obj_t *)Vec_PtrPop(vQ); id = Gia_ObjId( p, pObj ); if ( Vec_IntEntry( vFlag, id ) == 1 ) continue; @@ -637,7 +637,7 @@ void Bnd_ManFindBound( Gia_Man_t * p ) } while( Vec_PtrSize(vQ) > 0 ) { - pObj = Vec_PtrPop(vQ); + pObj = (Gia_Obj_t *)Vec_PtrPop(vQ); id = Gia_ObjId( p, pObj ); if ( Vec_IntEntry( vFlag, id ) == 1 ) continue; @@ -684,7 +684,7 @@ void Bnd_ManFindBound( Gia_Man_t * p ) // traverse down from AI and unmatched BI while( Vec_PtrSize(vQ) > 0 ) { - pObj = Vec_PtrPop(vQ); + pObj = (Gia_Obj_t *)Vec_PtrPop(vQ); id = Gia_ObjId( p, pObj ); if ( Vec_IntEntry( vFlag, id ) == 2 ) continue; From bcf04fadb6f50755b7844cc36fe19e57eca47fd7 Mon Sep 17 00:00:00 2001 From: Allen Ho Date: Mon, 4 Mar 2024 00:54:23 +0800 Subject: [PATCH 25/33] &brecover done --- src/aig/gia/gia.h | 2 + src/aig/gia/giaBound.c | 111 +++++++++++++++++++++--- src/base/abci/abc.c | 189 ++++++++++++++++++++++++++++++++++++++++- 3 files changed, 287 insertions(+), 15 deletions(-) diff --git a/src/aig/gia/gia.h b/src/aig/gia/gia.h index e0654afdab..5e8f5f36d4 100644 --- a/src/aig/gia/gia.h +++ b/src/aig/gia/gia.h @@ -1806,6 +1806,8 @@ extern void Bnd_ManFindBound( Gia_Man_t *p ); extern Gia_Man_t* Bnd_ManGenSpecOut( Gia_Man_t *p ); extern Gia_Man_t* Bnd_ManGenImplOut( Gia_Man_t *p ); extern Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPatch ); +extern Gia_Man_t* Bnd_ManGenPatched1( Gia_Man_t *pOut, Gia_Man_t *pSpec ); +extern Gia_Man_t* Bnd_ManGenPatched2( Gia_Man_t *p, Gia_Man_t *pPatch ); extern void Bnd_ManSetEqOut( int eq ); extern void Bnd_ManSetEqRes( int eq ); extern void Bnd_ManPrintStats(); diff --git a/src/aig/gia/giaBound.c b/src/aig/gia/giaBound.c index 916ed8e1f2..a3a298e354 100644 --- a/src/aig/gia/giaBound.c +++ b/src/aig/gia/giaBound.c @@ -572,7 +572,7 @@ void Bnd_ManFindBound( Gia_Man_t * p ) { if ( cnt < pBnd -> nBI ) { - Vec_IntPush( vBI, Gia_ObjId(p, pObj) ); + Vec_IntPush( vBI, Gia_ObjId(p, Gia_ObjFanin0(pObj) ) ); } else { @@ -884,27 +884,32 @@ Gia_Man_t* Bnd_ManGenImplOut( Gia_Man_t* p ) return pNew; } -void Bnd_AddNodeRec( Gia_Man_t *p, Gia_Man_t *pNew, Gia_Obj_t *pObj ) +void Bnd_AddNodeRec( Gia_Man_t *p, Gia_Man_t *pNew, Gia_Obj_t *pObj, int fSkipStrash ) { // TODO does this mean constant zero node? if ( pObj -> Value != ~0 ) return; for( int i = 0; i < Gia_ObjFaninNum(p, pObj); i++ ) { - Bnd_AddNodeRec( p, pNew, Gia_ObjFanin(pObj, i) ); + Bnd_AddNodeRec( p, pNew, Gia_ObjFanin(pObj, i), fSkipStrash ); } if ( Gia_ObjIsAnd(pObj) ) { - pObj -> Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); + if ( fSkipStrash ) + { + if ( Gia_ObjIsBuf(pObj) ) pObj -> Value = Gia_ManAppendBuf( pNew, Gia_ObjFanin0Copy(pObj) ); + else pObj -> Value = Gia_ManAppendAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); + } + else + { + pObj -> Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); + } } else { - if ( Gia_ObjIsCi(pObj) ) - { - printf("Ci with value 0 encountered (id = %d)\n", Gia_ObjId(p, pObj) ); - } assert( Gia_ObjIsCo(pObj) ); + // if ( Gia_ObjIsCi(pObj) ) printf("Ci with value ~0 encountered (id = %d)\n", Gia_ObjId(p, pObj) ); pObj -> Value = Gia_ObjFanin0Copy(pObj); } } @@ -963,7 +968,7 @@ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPat for ( i = 0; i < Vec_IntSize( pBnd -> vEI_spec ); i++ ) { pObj = Gia_ManCo(pOut, i + Gia_ManCoNum(pSpec) ); - Bnd_AddNodeRec( pOut, pNew, pObj ); + Bnd_AddNodeRec( pOut, pNew, pObj, 0 ); // set Spec EI Gia_ManObj( pSpec, Vec_IntEntry(pBnd -> vEI_spec, i) ) -> Value = pObj -> Value; @@ -976,7 +981,7 @@ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPat Vec_IntForEachEntry( pBnd -> vBI, id, i ) { pObj = Gia_ManObj( pSpec, id ); - Bnd_AddNodeRec( pSpec, pNew, pObj ); + Bnd_AddNodeRec( pSpec, pNew, pObj, 0 ); // set patch bi Gia_ManObj( pPatch, Vec_IntEntry( vBI_patch, i) ) -> Value = pObj -> Value; @@ -989,7 +994,7 @@ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPat Vec_IntForEachEntry( vBO_patch, id, i ) { pObj = Gia_ManObj( pPatch, id ); - Bnd_AddNodeRec( pPatch, pNew, pObj ); + Bnd_AddNodeRec( pPatch, pNew, pObj, 0 ); // set spec bo Gia_ManObj( pSpec, Vec_IntEntry( pBnd -> vBO, i) ) -> Value = pObj -> Value; @@ -1002,7 +1007,7 @@ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPat Vec_IntForEachEntry( pBnd -> vEO_spec, id, i ) { pObj = Gia_ManObj( pSpec, id ); - Bnd_AddNodeRec( pSpec, pNew, pObj ); + Bnd_AddNodeRec( pSpec, pNew, pObj, 0 ); // set impl EO (PI) Gia_ManCi( pOut, i + Gia_ManCiNum(pSpec) ) -> Value = pObj -> Value; @@ -1015,7 +1020,7 @@ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPat for ( i = 0; i < Gia_ManCoNum(pSpec); i++ ) { pObj = Gia_ManCo( pOut, i ); - Bnd_AddNodeRec( pOut, pNew, pObj ); + Bnd_AddNodeRec( pOut, pNew, pObj, 0 ); Gia_ManAppendCo( pNew, pObj->Value ); // printf(" %d",pObj -> Value); } @@ -1036,7 +1041,87 @@ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPat return pNew; } +Gia_Man_t* Bnd_ManGenPatched1( Gia_Man_t *pOut, Gia_Man_t *pSpec ) +{ + + Gia_Man_t * pNew, * pTemp; + Gia_Obj_t * pObj; + int i, id; + + pNew = Gia_ManStart( Gia_ManObjNum(pOut) + Gia_ManObjNum( pSpec ) ); + pNew -> pName = ABC_ALLOC( char, strlen(pOut->pName)+3); + sprintf( pNew -> pName, "%s_p", pOut -> pName ); + + Gia_ManFillValue(pOut); + Gia_ManFillValue(pSpec); + Gia_ManConst0(pOut)->Value = 0; + Gia_ManConst0(pSpec)->Value = 0; + + + // add Impl (real) PI + for ( i = 0; i < Gia_ManCiNum(pSpec); i++ ) + { + pObj = Gia_ManCi(pOut, i); + pObj -> Value = Gia_ManAppendCi( pNew ); + } + + // add Impl EI to CI + printf("adding EI to CI in Impl\n"); + for ( i = 0; i < Vec_IntSize( pBnd -> vEI_spec ); i++ ) + { + pObj = Gia_ManCo(pOut, i + Gia_ManCoNum(pSpec) ); + Bnd_AddNodeRec( pOut, pNew, pObj, 1 ); + + // set Spec EI + Gia_ManObj( pSpec, Vec_IntEntry(pBnd -> vEI_spec, i) ) -> Value = pObj -> Value; + printf(" %d",pObj -> Value); + } + printf("\n"); + + // add Spec EO to EI + // add BI -> BO -> EO to maintain the order of bufs + Vec_IntForEachEntry( pBnd -> vBI, id, i ) + { + pObj = Gia_ManObj( pSpec, id ); + Bnd_AddNodeRec( pSpec, pNew, pObj, 1 ); + } + Vec_IntForEachEntry( pBnd -> vBO, id, i ) + { + pObj = Gia_ManObj( pSpec, id ); + Bnd_AddNodeRec( pSpec, pNew, pObj, 1 ); + } + Vec_IntForEachEntry( pBnd -> vEO_spec, id, i ) + { + pObj = Gia_ManObj( pSpec, id ); + Bnd_AddNodeRec( pSpec, pNew, pObj, 1 ); + + // set impl EO (PI) + Gia_ManCi( pOut, i + Gia_ManCiNum(pSpec) ) -> Value = pObj -> Value; + // printf(" %d",pObj -> Value); + } + // printf("\n"); + + // add Impl (real) PO to EO + // printf("adding CO to EO in Impl\n"); + for ( i = 0; i < Gia_ManCoNum(pSpec); i++ ) + { + pObj = Gia_ManCo( pOut, i ); + Bnd_AddNodeRec( pOut, pNew, pObj, 1 ); + Gia_ManAppendCo( pNew, pObj->Value ); + // printf(" %d",pObj -> Value); + } + // printf("\n"); + + // clean up + pNew = Gia_ManCleanup( pTemp = pNew ); + Gia_ManStop( pTemp ); + + pBnd -> nNode_patched = Gia_ManAndNum( pNew ); + pBnd -> status = 3; + + return pNew; +} diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c index 9a558c2da8..60aa58c081 100644 --- a/src/base/abci/abc.c +++ b/src/base/abci/abc.c @@ -599,6 +599,7 @@ static int Abc_CommandAbc9ProdAdd ( Abc_Frame_t * pAbc, int argc, cha static int Abc_CommandAbc9AddFlop ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandAbc9BMiter ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandAbc9GenHie ( Abc_Frame_t * pAbc, int argc, char ** argv ); +static int Abc_CommandAbc9BRecover ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandAbc9StrEco ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandAbc9Test ( Abc_Frame_t * pAbc, int argc, char ** argv ); @@ -1381,6 +1382,7 @@ void Abc_Init( Abc_Frame_t * pAbc ) Cmd_CommandAdd( pAbc, "ABC9", "&addflop", Abc_CommandAbc9AddFlop, 0 ); Cmd_CommandAdd( pAbc, "ABC9", "&bmiter", Abc_CommandAbc9BMiter, 0 ); Cmd_CommandAdd( pAbc, "ABC9", "&gen_hie", Abc_CommandAbc9GenHie, 0 ); + Cmd_CommandAdd( pAbc, "ABC9", "&brecover", Abc_CommandAbc9BRecover, 0 ); Cmd_CommandAdd( pAbc, "ABC9", "&str_eco", Abc_CommandAbc9StrEco, 0 ); Cmd_CommandAdd( pAbc, "ABC9", "&test", Abc_CommandAbc9Test, 0 ); @@ -52092,6 +52094,191 @@ int Abc_CommandAbc9GenHie( Abc_Frame_t * pAbc, int argc, char ** argv ) ***********************************************************************/ extern Bnd_Man_t* pBnd; +int Abc_CommandAbc9BRecover( Abc_Frame_t * pAbc, int argc, char ** argv ) +{ + extern Gia_Man_t * Cec4_ManSimulateTest( Gia_Man_t * p, Cec_ParFra_t * pPars ); + extern void Cec4_ManSetParams( Cec_ParFra_t * pPars ); + extern Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose ); + Gia_Man_t *pSpec, *pImpl_out = 0, *pSpec_out = 0, *pMiter, *pPatched, *pTemp, *pBmiter; + char * FileName = NULL; + FILE * pFile = NULL; + int c, fVerbose = 0, success = 1; + + // params + Gps_Par_t Pars, * pPars = &Pars; + memset( pPars, 0, sizeof(Gps_Par_t) ); + Cec_ParCec_t ParsCec, *pParsCec = &ParsCec; + Cec_ManCecSetDefaultParams( pParsCec ); + Cec_ParFra_t ParsFra, *pParsFra = &ParsFra; + Cec4_ManSetParams( pParsFra ); + pParsFra -> fBMiterInfo = 1; + + // parse options + Extra_UtilGetoptReset(); + while ( ( c = Extra_UtilGetopt( argc, argv, "vh" ) ) != EOF ) + { + switch ( c ) + { + case 'v': + fVerbose ^= 1; + break; + case 'h': + goto usage; + default: + goto usage; + } + } + if ( pAbc->pGia == NULL ) + { + Abc_Print( -1, "Abc_CommandAbc9BRecover(): There is no AIG.\n" ); + return 0; + } + if ( argc != globalUtilOptind + 1 ) + { + printf("%d\n", argc-globalUtilOptind); + Abc_Print( -1, "Abc_CommandAbc9BRecover(): AIG should be given on the command line.\n" ); + return 0; + } + + // read spec + FileName = argv[globalUtilOptind]; + if ( (pFile = fopen( FileName, "r" )) == NULL ) + { + Abc_Print( -1, "Cannot open input file \"%s\". ", FileName ); + if ( (FileName = Extra_FileGetSimilarName( FileName, ".aig", ".blif", ".pla", ".eqn", ".bench" )) ) + Abc_Print( 1, "Did you mean \"%s\"?", FileName ); + Abc_Print( 1, "\n" ); + return 1; + } + fclose( pFile ); + pSpec = Gia_AigerRead( FileName, 0, 1, 0 ); + if ( pSpec == NULL ) + { + Abc_Print( -1, "Abc_CommandAbc9BRecover(): Cannot read the file name on the command line.\n" ); + return 0; + } + if ( Gia_ManBufNum(pSpec) == 0 ) + { + Abc_Print( -1, "Abc_CommandAbc9BRecover(): The given spec should be hierarchical.\n" ); + Gia_ManStop(pSpec); + return 0; + } + + // start boundary manager + pBnd = Bnd_ManStart( pSpec, pAbc->pGia ); + + // verify if spec eq impl + pMiter = Gia_ManMiter( pAbc->pGia, pSpec, 0, 1, 0, 0, 0 ); + if ( !Cec_ManVerify( pMiter, pParsCec ) ) + { + Abc_Print( -1, "Abc_CommandAbc9BRecover(): The given spec is not equivalent to current impl.\n" ); + success = 0; + } + Gia_ManStop(pMiter); + + // check boundary + if ( success ) + { + if ( 0 == Bnd_ManCheckBound( pSpec ) ) + { + Abc_Print( -1, "Abc_CommandAbc9BRecover(): The given spec has invalid boundary.\n" ); + success = 0; + } + } + + if ( success ) + { + // create bmiter, run fraig, record mapping + pBmiter = Gia_ManBoundaryMiter( pSpec, pAbc->pGia, 0 ); + pTemp = Cec4_ManSimulateTest( pBmiter, pParsFra ); + Gia_ManStop(pBmiter); + Gia_ManStop(pTemp); + + // find + Bnd_ManFindBound( pSpec ); + + // create spec_out and + pSpec_out = Bnd_ManGenSpecOut( pSpec ); + if ( !pSpec_out ) success = 0; + pImpl_out = Bnd_ManGenImplOut( pAbc->pGia ); + if ( !pImpl_out ) success = 0; + + // Gia_AigerWrite( pSpec_out, "spec_out.aig", 0, 0, 0 ); + // Gia_AigerWrite( pImpl_out, "impl_out.aig", 0, 0, 0 ); + // Gia_ManPrintStats( pSpec_out, pPars ); + // Gia_ManPrintStats( pImpl_out, pPars ); + } + + if ( success ) + { + + // check if spec_out and imnpl_out are equivalent + printf("Checking the equivalence of spec_out and impl_out\n"); + pMiter = Gia_ManMiter( pSpec_out, pImpl_out, 0, 1, 0, 0, 0 ); + Bnd_ManSetEqOut( Cec_ManVerify( pMiter, pParsCec ) ); + Gia_ManStop( pMiter ); + + // generate patched impl + printf("Generating patched impl\n"); + pPatched = Bnd_ManGenPatched1( pImpl_out, pSpec ); + + // // generate patched spec just for debugging + // printf("Generating patched spec\n"); + // pTemp = Bnd_ManGenPatched( pSpec_out, pAbc->pGia, pPatch ); + // printf("Checking the equivalence of patched spec and patched impl\n"); + // pMiter = Gia_ManMiter( pTemp, pPatched, 0, 1, 0, 0, 0 ); + // Cec_ManVerify( pMiter, pParsCec ); + // Gia_ManStop( pMiter ); + // printf("Checking the equivalence of patched spec and patch\n"); + // pMiter = Gia_ManMiter( pTemp, pPatch, 0, 1, 0, 0, 0 ); + // Cec_ManVerify( pMiter, pParsCec ); + // Gia_ManStop( pMiter ); + + // Gia_ManStop( pTemp ); + + // check if patched is equiv to spec + printf("Checking the equivalence of patched impl and patch\n"); + pMiter = Gia_ManMiter( pSpec, pPatched, 0, 1, 0, 0, 0 ); + Bnd_ManSetEqRes( Cec_ManVerify( pMiter, pParsCec ) ); + Gia_ManStop( pMiter ); + + } + + Bnd_ManPrintStats(); + + Gia_ManStop( pSpec ); + if ( pSpec_out ) Gia_ManStop( pSpec_out ); + if ( pImpl_out ) Gia_ManStop( pImpl_out ); + if ( success ) + { + Abc_FrameUpdateGia( pAbc, pPatched ); + } + Bnd_ManStop(); + + return 0; + +usage: + Abc_Print( -2, "usage: &str_eco -I [-vh] \n" ); + Abc_Print( -2, "\t SAT-sweeping-based ECO\n" ); + Abc_Print( -2, "\t-v : toggles printing verbose information [default = %s]\n", fVerbose? "yes": "no" ); + Abc_Print( -2, "\t-h : print the command usage\n"); + Abc_Print( -2, "\t : the implementation aig. (should be equivalent to spec)\n"); + Abc_Print( -2, "\t : the modified spec. (should be a hierarchical AIG)\n"); + return 1; +} + +/**Function************************************************************* + + Synopsis [] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ + int Abc_CommandAbc9StrEco( Abc_Frame_t * pAbc, int argc, char ** argv ) { extern Gia_Man_t * Cec4_ManSimulateTest( Gia_Man_t * p, Cec_ParFra_t * pPars ); @@ -52111,8 +52298,6 @@ int Abc_CommandAbc9StrEco( Abc_Frame_t * pAbc, int argc, char ** argv ) Cec4_ManSetParams( pParsFra ); pParsFra -> fBMiterInfo = 1; - // TODO: save return value and return at the end of the function - // parse options Extra_UtilGetoptReset(); while ( ( c = Extra_UtilGetopt( argc, argv, "vh" ) ) != EOF ) From bfbec7121121577924273574643800d8d94bcb5f Mon Sep 17 00:00:00 2001 From: Allen Ho Date: Mon, 4 Mar 2024 09:36:35 +0800 Subject: [PATCH 26/33] &stc_eco and &brecover done --- src/aig/gia/gia.h | 11 ++- src/aig/gia/giaBound.c | 190 +++++++++++++++++++++++++++++++++-------- src/base/abci/abc.c | 170 +++++++++++------------------------- 3 files changed, 212 insertions(+), 159 deletions(-) diff --git a/src/aig/gia/gia.h b/src/aig/gia/gia.h index 5e8f5f36d4..f12ab35df9 100644 --- a/src/aig/gia/gia.h +++ b/src/aig/gia/gia.h @@ -1793,21 +1793,26 @@ extern int Tas_ManSolveArray( Tas_Man_t * p, Vec_Ptr_t * vObjs ) /*=== giaBound.c ===========================================================*/ typedef struct Bnd_Man_t_ Bnd_Man_t; -extern Bnd_Man_t* Bnd_ManStart( Gia_Man_t *pSpec, Gia_Man_t *pImpl ); +extern Bnd_Man_t* Bnd_ManStart( Gia_Man_t *pSpec, Gia_Man_t *pImpl, int fVerbose ); extern void Bnd_ManStop(); + +// getter +extern int Bnd_ManGetNInternal(); +extern int Bnd_ManGetNExtra(); + //for fraig extern void Bnd_ManMap( int iLit, int id, int spec ); extern void Bnd_ManMerge( int id1, int id2, int phaseDiff ); extern void Bnd_ManFinalizeMappings(); extern void Bnd_ManPrintMappings(); // for eco -extern int Bnd_ManCheckBound( Gia_Man_t *p ); +extern int Bnd_ManCheckBound( Gia_Man_t *p, int fVerbose ); extern void Bnd_ManFindBound( Gia_Man_t *p ); extern Gia_Man_t* Bnd_ManGenSpecOut( Gia_Man_t *p ); extern Gia_Man_t* Bnd_ManGenImplOut( Gia_Man_t *p ); extern Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPatch ); extern Gia_Man_t* Bnd_ManGenPatched1( Gia_Man_t *pOut, Gia_Man_t *pSpec ); -extern Gia_Man_t* Bnd_ManGenPatched2( Gia_Man_t *p, Gia_Man_t *pPatch ); +extern Gia_Man_t* Bnd_ManGenPatched2( Gia_Man_t *pImpl, Gia_Man_t *pPatch, int fSkiptStrash, int fVerbose ); extern void Bnd_ManSetEqOut( int eq ); extern void Bnd_ManSetEqRes( int eq ); extern void Bnd_ManPrintStats(); diff --git a/src/aig/gia/giaBound.c b/src/aig/gia/giaBound.c index a3a298e354..a420b818d8 100644 --- a/src/aig/gia/giaBound.c +++ b/src/aig/gia/giaBound.c @@ -29,6 +29,7 @@ struct Bnd_Man_t_ int nNode_patched; int status; // 0: init 1: boundary found 2: out generated 3: patched generated + int fVerbose; int combLoop_spec; int combLoop_impl; @@ -57,7 +58,7 @@ struct Bnd_Man_t_ }; -Bnd_Man_t* pBnd; +Bnd_Man_t* pBnd = 0; //////////////////////////////////////////////////////////////////////// /// FUNCTION DEFINITIONS /// @@ -78,7 +79,7 @@ void Bnd_ManSetEqRes( int eq ) { pBnd -> eq_res = eq;} ***********************************************************************/ -Bnd_Man_t* Bnd_ManStart( Gia_Man_t *pSpec, Gia_Man_t *pImpl ) +Bnd_Man_t* Bnd_ManStart( Gia_Man_t *pSpec, Gia_Man_t *pImpl, int fVerbose ) { int i; Bnd_Man_t* p = ABC_CALLOC( Bnd_Man_t, 1 ); @@ -113,6 +114,8 @@ Bnd_Man_t* Bnd_ManStart( Gia_Man_t *pSpec, Gia_Man_t *pImpl ) p -> nNode_patched = 0; p -> status = 0; + p -> fVerbose = fVerbose; + p -> combLoop_spec = 0; p -> combLoop_impl = 0; p -> eq_out = 0; @@ -166,6 +169,8 @@ void Bnd_ManStop() ABC_FREE( pBnd ); } +int Bnd_ManGetNInternal() { assert(pBnd); return pBnd -> nInternal; } +int Bnd_ManGetNExtra() { assert(pBnd); return pBnd -> nExtra; } void Bnd_ManMap( int iLit, int id, int spec ) { @@ -370,23 +375,22 @@ void Bnd_ManPrintStats() Description [check if the given boundary is valid. Return 0 if the boundary is invalid. Return k if the boundary is valid and - there're k boundary inputs. ] + there're k boundary inputs. + Can be called even if Bnd_Man_t is not created] SideEffects [] SeeAlso [] ***********************************************************************/ -int Bnd_ManCheckBound( Gia_Man_t * p ) +int Bnd_ManCheckBound( Gia_Man_t * p, int fVerbose ) { int i; Gia_Obj_t *pObj; int valid = 1; - pBnd -> nBI = 0; - pBnd -> nBO = 0; - pBnd -> nInternal = 0; + int nBI = 0, nBO = 0, nInternal = 0; - printf( "Checking boundary... \n"); + if ( fVerbose ) printf( "Checking boundary... \n"); Vec_Int_t *vPath; vPath = Vec_IntAlloc( Gia_ManObjNum(p) ); @@ -417,7 +421,7 @@ int Bnd_ManCheckBound( Gia_Man_t * p ) if ( path == 1 ) // boundary input { // TODO: record BIs here since they may not be in the first n buffers - pBnd -> nBO ++; + nBO ++; } } else if ( Gia_ObjFaninNum( p, pObj ) >= 1 ) @@ -431,7 +435,7 @@ int Bnd_ManCheckBound( Gia_Man_t * p ) if ( path == 2 ) // inside boundary { // TODO: record BIs here since they may not be in the first n buffers - pBnd -> nInternal ++; + nInternal ++; } } else // PI or const, check validity @@ -445,20 +449,33 @@ int Bnd_ManCheckBound( Gia_Man_t * p ) } } - pBnd -> nBI = Gia_ManBufNum(p) - pBnd -> nBO; + nBI = Gia_ManBufNum(p) - nBO; if ( !valid ) { printf("invalid boundary\n"); return 0; } + else if ( nBI == 0 ) + { + printf("no boundary\n"); + return 0; + } else { - printf("valid boundary ("); - printf("#BI = %d\t#BO = %d\t", pBnd -> nBI, Gia_ManBufNum(p)- pBnd -> nBI); - printf("#Internal = %d)\n", pBnd -> nInternal ); - assert( pBnd -> nBI > 0 ); - return pBnd -> nBI; + if ( fVerbose ) + { + printf("valid boundary ("); + printf("#BI = %d\t#BO = %d\t", nBI, Gia_ManBufNum(p)- nBI); + printf("#Internal = %d)\n", nInternal ); + } + if ( pBnd ) + { + pBnd -> nBI = nBI; + pBnd -> nBO = nBO; + pBnd -> nInternal = nInternal; + } + return nBI; } } @@ -593,7 +610,7 @@ void Bnd_ManFindBound( Gia_Man_t * p ) Vec_IntPush(vEO_spec, id); } } - printf("%d BO doesn't match. ", Vec_PtrSize(vQ) ); + if ( pBnd -> fVerbose ) printf("%d BO doesn't match. ", Vec_PtrSize(vQ) ); pBnd -> nBO_miss = Vec_PtrSize(vQ); int cnt_extra = - Vec_PtrSize(vQ); @@ -622,7 +639,7 @@ void Bnd_ManFindBound( Gia_Man_t * p ) } } // printf("%d AO found with %d extra nodes\n", Vec_IntSize(vAO) , cnt_extra ); - printf("%d AO found\n", Vec_IntSize(vAO) ); + if ( pBnd -> fVerbose ) printf("%d AO found\n", Vec_IntSize(vAO) ); // mark TFOC of BO with flag 1 to prevent them from being selected into EI @@ -665,7 +682,7 @@ void Bnd_ManFindBound( Gia_Man_t * p ) Vec_IntPush(vEI_spec, id); } } - printf("%d BI doesn't match. ", Vec_PtrSize(vQ) ); + if ( pBnd -> fVerbose ) printf("%d BI doesn't match. ", Vec_PtrSize(vQ) ); pBnd -> nBI_miss = Vec_PtrSize(vQ); cnt_extra -= Vec_PtrSize(vQ); @@ -708,7 +725,7 @@ void Bnd_ManFindBound( Gia_Man_t * p ) Vec_IntSetEntry( vFlag, id, 2 ); } - printf("%d AI found with %d extra nodes in total\n", Vec_IntSize(vAI) , cnt_extra ); + if ( pBnd -> fVerbose ) printf("%d AI found with %d extra nodes in total\n", Vec_IntSize(vAI) , cnt_extra ); pBnd -> nExtra = cnt_extra; @@ -738,8 +755,11 @@ void Bnd_ManFindBound( Gia_Man_t * p ) // print pBnd -> status = 1; - printf("#EI = %d\t#EO = %d\t#Extra Node = %d\n", Vec_IntSize(vEI_spec) , Vec_IntSize(vEO_spec), cnt_extra ); - Bnd_ManPrintBound(); + if ( pBnd -> fVerbose ) + { + printf("#EI = %d\t#EO = %d\t#Extra Node = %d\n", Vec_IntSize(vEI_spec) , Vec_IntSize(vEO_spec), cnt_extra ); + Bnd_ManPrintBound(); + } // check boundary has comb loop if ( !Bnd_ManCheckExtBound( p, vEI_spec, vEO_spec ) ) @@ -869,15 +889,15 @@ Gia_Man_t* Bnd_ManCutBoundary( Gia_Man_t *p, Vec_Int_t* vEI, Vec_Int_t* vEO, Vec } -Gia_Man_t* Bnd_ManGenSpecOut( Gia_Man_t* p ) +Gia_Man_t* Bnd_ManGenSpecOut( Gia_Man_t* p ) { - printf("Generating spec_out with given boundary.\n"); + if ( pBnd -> fVerbose ) printf("Generating spec_out with given boundary.\n"); Gia_Man_t *pNew = Bnd_ManCutBoundary( p, pBnd->vEI_spec, pBnd->vEO_spec, 0, 0 ); return pNew; } -Gia_Man_t* Bnd_ManGenImplOut( Gia_Man_t* p ) +Gia_Man_t* Bnd_ManGenImplOut( Gia_Man_t* p) { - printf("Generating impl_out with given boundary.\n"); + if ( pBnd -> fVerbose ) printf("Generating impl_out with given boundary.\n"); Gia_Man_t *pNew = Bnd_ManCutBoundary( p, pBnd->vEI_impl, pBnd->vEO_impl, pBnd->vEI_phase, pBnd->vEO_phase ); if ( pNew ) pBnd -> status = 2; else pBnd -> combLoop_impl = 1; @@ -1066,7 +1086,7 @@ Gia_Man_t* Bnd_ManGenPatched1( Gia_Man_t *pOut, Gia_Man_t *pSpec ) } // add Impl EI to CI - printf("adding EI to CI in Impl\n"); + // printf("adding EI to CI in Impl\n"); for ( i = 0; i < Vec_IntSize( pBnd -> vEI_spec ); i++ ) { pObj = Gia_ManCo(pOut, i + Gia_ManCoNum(pSpec) ); @@ -1074,20 +1094,24 @@ Gia_Man_t* Bnd_ManGenPatched1( Gia_Man_t *pOut, Gia_Man_t *pSpec ) // set Spec EI Gia_ManObj( pSpec, Vec_IntEntry(pBnd -> vEI_spec, i) ) -> Value = pObj -> Value; - printf(" %d",pObj -> Value); + // printf(" %d",pObj -> Value); } - printf("\n"); + // printf("\n"); // add Spec EO to EI // add BI -> BO -> EO to maintain the order of bufs - Vec_IntForEachEntry( pBnd -> vBI, id, i ) - { - pObj = Gia_ManObj( pSpec, id ); - Bnd_AddNodeRec( pSpec, pNew, pObj, 1 ); - } - Vec_IntForEachEntry( pBnd -> vBO, id, i ) + // Vec_IntForEachEntry( pBnd -> vBI, id, i ) + // { + // pObj = Gia_ManObj( pSpec, id ); + // Bnd_AddNodeRec( pSpec, pNew, pObj, 1 ); + // } + // Vec_IntForEachEntry( pBnd -> vBO, id, i ) + // { + // pObj = Gia_ManObj( pSpec, id ); + // Bnd_AddNodeRec( pSpec, pNew, pObj, 1 ); + // } + Gia_ManForEachBuf( pSpec, pObj, i ) { - pObj = Gia_ManObj( pSpec, id ); Bnd_AddNodeRec( pSpec, pNew, pObj, 1 ); } Vec_IntForEachEntry( pBnd -> vEO_spec, id, i ) @@ -1123,6 +1147,100 @@ Gia_Man_t* Bnd_ManGenPatched1( Gia_Man_t *pOut, Gia_Man_t *pSpec ) return pNew; } +Gia_Man_t* Bnd_ManGenPatched2( Gia_Man_t *pImpl, Gia_Man_t *pPatch, int fSkipStrash, int fVerbose ) +{ + + Gia_Man_t * pNew, * pTemp; + Gia_Obj_t * pObj; + int i, nBI, nBI_patch, cnt; + Vec_Int_t* vLit; + + + // check boundary first + nBI = Bnd_ManCheckBound( pImpl, fVerbose ); + nBI_patch = Bnd_ManCheckBound( pPatch, fVerbose ); + if ( 0 == nBI_patch || Gia_ManBufNum(pImpl) != Gia_ManBufNum(pPatch) || nBI != nBI_patch ) + { + Abc_Print( -1, "Abc_CommandAbc9StrEco(): The given boundary is invalid.\n" ); + return 0; + } + + // prepare new network + pNew = Gia_ManStart( Gia_ManObjNum(pImpl) + Gia_ManObjNum( pPatch ) ); + pNew -> pName = ABC_ALLOC( char, strlen(pImpl->pName)+3); + sprintf( pNew -> pName, "%s_p", pImpl -> pName ); + if ( !fSkipStrash ) + { + Gia_ManHashAlloc( pNew ); + } + Gia_ManFillValue(pImpl); + Gia_ManFillValue(pPatch); + Gia_ManConst0(pImpl)->Value = 0; + Gia_ManConst0(pPatch)->Value = 0; + + vLit = Vec_IntAlloc( Gia_ManBufNum(pImpl) ); + + // add Impl (real) CI + Gia_ManForEachCi( pImpl, pObj, i ) + { + pObj -> Value = Gia_ManAppendCi( pNew ); + } + + // add Impl BI to CI + cnt = 0; + Gia_ManForEachBuf( pImpl, pObj, i ) + { + Bnd_AddNodeRec( pImpl, pNew, pObj, fSkipStrash ); + Vec_IntPush( vLit, pObj -> Value ); + cnt ++; + if ( cnt >= nBI ) break; + } + + // set BI in patch + // add patch BO to BI + cnt = 0; + Gia_ManForEachBuf( pPatch, pObj, i ) + { + if ( cnt < nBI ) + { + pObj -> Value = Vec_IntEntry( vLit, cnt ); + } + else + { + Bnd_AddNodeRec( pPatch, pNew, pObj, fSkipStrash ); + Vec_IntPush( vLit, pObj -> Value ); + } + cnt ++; + if ( cnt == nBI ) Vec_IntClear( vLit ); + } + + // set BO in impl + cnt = 0; + Gia_ManForEachBuf( pImpl, pObj, i ) + { + cnt ++; + if ( cnt <= nBI) continue; + pObj -> Value = Vec_IntEntry( vLit, cnt-nBI-1 ); + } + + // add impl CO to BO + Gia_ManForEachCo( pImpl, pObj, i ) + { + Bnd_AddNodeRec( pImpl, pNew, pObj, fSkipStrash ); + Gia_ManAppendCo( pNew, pObj -> Value ); + } + + // clean up + if ( !fSkipStrash ) + { + Gia_ManHashStop( pNew ); + } + Vec_IntFree( vLit ); + pNew = Gia_ManCleanup( pTemp = pNew ); + Gia_ManStop( pTemp ); + + return pNew; +} //////////////////////////////////////////////////////////////////////// diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c index 60aa58c081..d6363a0ccd 100644 --- a/src/base/abci/abc.c +++ b/src/base/abci/abc.c @@ -52099,7 +52099,7 @@ int Abc_CommandAbc9BRecover( Abc_Frame_t * pAbc, int argc, char ** argv ) extern Gia_Man_t * Cec4_ManSimulateTest( Gia_Man_t * p, Cec_ParFra_t * pPars ); extern void Cec4_ManSetParams( Cec_ParFra_t * pPars ); extern Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose ); - Gia_Man_t *pSpec, *pImpl_out = 0, *pSpec_out = 0, *pMiter, *pPatched, *pTemp, *pBmiter; + Gia_Man_t *pSpec, *pImpl_out = 0, *pSpec_out = 0, *pMiter, *pPatched = 0, *pTemp, *pBmiter; char * FileName = NULL; FILE * pFile = NULL; int c, fVerbose = 0, success = 1; @@ -52165,7 +52165,7 @@ int Abc_CommandAbc9BRecover( Abc_Frame_t * pAbc, int argc, char ** argv ) } // start boundary manager - pBnd = Bnd_ManStart( pSpec, pAbc->pGia ); + pBnd = Bnd_ManStart( pSpec, pAbc->pGia, fVerbose ); // verify if spec eq impl pMiter = Gia_ManMiter( pAbc->pGia, pSpec, 0, 1, 0, 0, 0 ); @@ -52179,7 +52179,7 @@ int Abc_CommandAbc9BRecover( Abc_Frame_t * pAbc, int argc, char ** argv ) // check boundary if ( success ) { - if ( 0 == Bnd_ManCheckBound( pSpec ) ) + if ( 0 == Bnd_ManCheckBound( pSpec, fVerbose ) ) { Abc_Print( -1, "Abc_CommandAbc9BRecover(): The given spec has invalid boundary.\n" ); success = 0; @@ -52209,17 +52209,24 @@ int Abc_CommandAbc9BRecover( Abc_Frame_t * pAbc, int argc, char ** argv ) // Gia_ManPrintStats( pImpl_out, pPars ); } - if ( success ) + if ( !success ) + { + printf("Abc_CommandAbc9BRecover(): The generated boundary is invalid. The circuit is not changed.\n"); + } + else { // check if spec_out and imnpl_out are equivalent - printf("Checking the equivalence of spec_out and impl_out\n"); - pMiter = Gia_ManMiter( pSpec_out, pImpl_out, 0, 1, 0, 0, 0 ); - Bnd_ManSetEqOut( Cec_ManVerify( pMiter, pParsCec ) ); - Gia_ManStop( pMiter ); + if ( fVerbose ) + { + printf("Checking the equivalence of spec_out and impl_out\n"); + pMiter = Gia_ManMiter( pSpec_out, pImpl_out, 0, 1, 0, 0, 0 ); + Bnd_ManSetEqOut( Cec_ManVerify( pMiter, pParsCec ) ); + Gia_ManStop( pMiter ); + } // generate patched impl - printf("Generating patched impl\n"); + if ( fVerbose ) printf("Generating patched impl\n"); pPatched = Bnd_ManGenPatched1( pImpl_out, pSpec ); // // generate patched spec just for debugging @@ -52237,29 +52244,35 @@ int Abc_CommandAbc9BRecover( Abc_Frame_t * pAbc, int argc, char ** argv ) // Gia_ManStop( pTemp ); // check if patched is equiv to spec - printf("Checking the equivalence of patched impl and patch\n"); + if ( fVerbose ) printf("Checking the equivalence of patched impl and spec\n"); pMiter = Gia_ManMiter( pSpec, pPatched, 0, 1, 0, 0, 0 ); - Bnd_ManSetEqRes( Cec_ManVerify( pMiter, pParsCec ) ); + success = Cec_ManVerify( pMiter, pParsCec ); + Bnd_ManSetEqRes( success ); + if ( !success ) + { + printf("Failed. The generated AIG is not equivalent.\n"); + } Gia_ManStop( pMiter ); } - Bnd_ManPrintStats(); + if ( fVerbose ) Bnd_ManPrintStats(); Gia_ManStop( pSpec ); if ( pSpec_out ) Gia_ManStop( pSpec_out ); if ( pImpl_out ) Gia_ManStop( pImpl_out ); if ( success ) { - Abc_FrameUpdateGia( pAbc, pPatched ); + printf("Success. The generated hierarchical impl is equivalent. (box size: %d -> %d)\n", Bnd_ManGetNInternal(), Bnd_ManGetNInternal() + Bnd_ManGetNExtra() ); } + if (pPatched) Abc_FrameUpdateGia( pAbc, pPatched ); Bnd_ManStop(); return 0; usage: - Abc_Print( -2, "usage: &str_eco -I [-vh] \n" ); - Abc_Print( -2, "\t SAT-sweeping-based ECO\n" ); + Abc_Print( -2, "usage: &brecover -I [-vh] \n" ); + Abc_Print( -2, "\t recover boundary using SAT-Sweeping\n" ); Abc_Print( -2, "\t-v : toggles printing verbose information [default = %s]\n", fVerbose? "yes": "no" ); Abc_Print( -2, "\t-h : print the command usage\n"); Abc_Print( -2, "\t : the implementation aig. (should be equivalent to spec)\n"); @@ -52283,11 +52296,11 @@ int Abc_CommandAbc9StrEco( Abc_Frame_t * pAbc, int argc, char ** argv ) { extern Gia_Man_t * Cec4_ManSimulateTest( Gia_Man_t * p, Cec_ParFra_t * pPars ); extern void Cec4_ManSetParams( Cec_ParFra_t * pPars ); - extern Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose ); - Gia_Man_t *pImpl, *pImpl_out = 0, *pSpec_out = 0, *pMiter, *pPatch, *pPatched, *pTemp, *pBmiter;; + Gia_Man_t *pMiter, *pPatch, *pPatched; char * FileName = NULL; FILE * pFile = NULL; - int c, fVerbose = 0, success = 1; + int c, success = 1; + int fVerbose = 0, fSkipStrash = 0; // params Gps_Par_t Pars, * pPars = &Pars; @@ -52300,13 +52313,16 @@ int Abc_CommandAbc9StrEco( Abc_Frame_t * pAbc, int argc, char ** argv ) // parse options Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "vh" ) ) != EOF ) + while ( ( c = Extra_UtilGetopt( argc, argv, "vsh" ) ) != EOF ) { switch ( c ) { case 'v': fVerbose ^= 1; break; + case 's': + fSkipStrash ^= 1; + break; case 'h': goto usage; default: @@ -52318,33 +52334,15 @@ int Abc_CommandAbc9StrEco( Abc_Frame_t * pAbc, int argc, char ** argv ) Abc_Print( -1, "Abc_CommandAbc9StrEco(): There is no AIG.\n" ); return 0; } - if ( argc != globalUtilOptind + 2 ) + if ( argc != globalUtilOptind + 1 ) { printf("%d\n", argc-globalUtilOptind); Abc_Print( -1, "Abc_CommandAbc9StrEco(): AIG should be given on the command line.\n" ); return 0; } - // read impl - FileName = argv[globalUtilOptind]; - if ( (pFile = fopen( FileName, "r" )) == NULL ) - { - Abc_Print( -1, "Cannot open input file \"%s\". ", FileName ); - if ( (FileName = Extra_FileGetSimilarName( FileName, ".aig", ".blif", ".pla", ".eqn", ".bench" )) ) - Abc_Print( 1, "Did you mean \"%s\"?", FileName ); - Abc_Print( 1, "\n" ); - return 1; - } - fclose( pFile ); - pImpl = Gia_AigerRead( FileName, 0, 0, 0 ); - if ( pImpl == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc9StrEco(): Cannot read the file name on the command line.\n" ); - return 0; - } - // read patch - FileName = argv[globalUtilOptind+1]; + FileName = argv[globalUtilOptind]; if ( (pFile = fopen( FileName, "r" )) == NULL ) { Abc_Print( -1, "Cannot open input file \"%s\". ", FileName ); @@ -52361,98 +52359,29 @@ int Abc_CommandAbc9StrEco( Abc_Frame_t * pAbc, int argc, char ** argv ) return 0; } - // start boundary manager - pBnd = Bnd_ManStart( pAbc->pGia, pImpl ); + // generate patched impl + if ( fVerbose ) printf("Generating patched impl\n"); + pPatched = Bnd_ManGenPatched2( pAbc->pGia, pPatch, fSkipStrash, fVerbose ); - // verify if spec eq impl - pMiter = Gia_ManMiter( pAbc->pGia, pImpl, 0, 1, 0, 0, 0 ); - if ( !Cec_ManVerify( pMiter, pParsCec ) ) - { - Abc_Print( -1, "Abc_CommandAbc9StrEco(): The given impl is not equivalent to spec.\n" ); - success = 0; - } - Gia_ManStop(pMiter); - - // check boundary - if ( success ) + if ( pPatched ) { - if ( 0 == Bnd_ManCheckBound( pPatch ) || 0 == Bnd_ManCheckBound( pAbc -> pGia ) ) - { - Abc_Print( -1, "Abc_CommandAbc9StrEco(): The given boundary is invalid.\n" ); - success = 0; - } - } - - if ( success ) - { - // create bmiter, run fraig - pBmiter = Gia_ManBoundaryMiter( pAbc -> pGia, pImpl, 0 ); - pTemp = Cec4_ManSimulateTest( pBmiter, pParsFra ); - Gia_ManStop(pBmiter); - Gia_ManStop(pTemp); - - // find - Bnd_ManFindBound( pAbc -> pGia ); - - // create spec_out and - pSpec_out = Bnd_ManGenSpecOut( pAbc -> pGia ); - if ( !pSpec_out ) success = 0; - pImpl_out = Bnd_ManGenImplOut( pImpl ); - if ( !pImpl_out ) success = 0; - - // Gia_AigerWrite( pSpec_out, "spec_out.aig", 0, 0, 0 ); - // Gia_AigerWrite( pImpl_out, "impl_out.aig", 0, 0, 0 ); - // Gia_ManPrintStats( pSpec_out, pPars ); - // Gia_ManPrintStats( pImpl_out, pPars ); - - } - - if ( success ) - { - - // check if spec_out and imnpl_out are equivalent - printf("Checking the equivalence of spec_out and impl_out\n"); - pMiter = Gia_ManMiter( pSpec_out, pImpl_out, 0, 1, 0, 0, 0 ); - Bnd_ManSetEqOut( Cec_ManVerify( pMiter, pParsCec ) ); - Gia_ManStop( pMiter ); - - // generate patched impl - printf("Generating patched impl\n"); - pPatched = Bnd_ManGenPatched( pImpl_out, pAbc->pGia, pPatch ); - - // generate patched spec just for debugging - printf("Generating patched spec\n"); - pTemp = Bnd_ManGenPatched( pSpec_out, pAbc->pGia, pPatch ); - printf("Checking the equivalence of patched spec and patched impl\n"); - pMiter = Gia_ManMiter( pTemp, pPatched, 0, 1, 0, 0, 0 ); - Cec_ManVerify( pMiter, pParsCec ); - Gia_ManStop( pMiter ); - printf("Checking the equivalence of patched spec and patch\n"); - pMiter = Gia_ManMiter( pTemp, pPatch, 0, 1, 0, 0, 0 ); - Cec_ManVerify( pMiter, pParsCec ); - Gia_ManStop( pMiter ); - - Gia_ManStop( pTemp ); - // check if patched is equiv to patch - printf("Checking the equivalence of patched impl and patch\n"); + if ( fVerbose ) printf("Checking the equivalence of patched impl and patch\n"); pMiter = Gia_ManMiter( pPatch, pPatched, 0, 1, 0, 0, 0 ); - Bnd_ManSetEqRes( Cec_ManVerify( pMiter, pParsCec ) ); + success = Cec_ManVerify( pMiter, pParsCec ); + if( !success ) + { + printf("Failed. The patched circuit is not equivalent.\n"); + } Gia_ManStop( pMiter ); - + Abc_FrameUpdateGia( pAbc, pPatched ); } - Bnd_ManPrintStats(); - - Gia_ManStop( pImpl ); Gia_ManStop( pPatch ); - if ( pSpec_out ) Gia_ManStop( pSpec_out ); - if ( pImpl_out ) Gia_ManStop( pImpl_out ); if ( success ) { - Abc_FrameUpdateGia( pAbc, pPatched ); + printf("Success. The patched circuit is equivalent.\n"); } - Bnd_ManStop(); return 0; @@ -52460,6 +52389,7 @@ int Abc_CommandAbc9StrEco( Abc_Frame_t * pAbc, int argc, char ** argv ) Abc_Print( -2, "usage: &str_eco -I [-vh] \n" ); Abc_Print( -2, "\t SAT-sweeping-based ECO\n" ); Abc_Print( -2, "\t-v : toggles printing verbose information [default = %s]\n", fVerbose? "yes": "no" ); + Abc_Print( -2, "\t-s : toggles skipping structural hash [default = %s]\n", fSkipStrash? "yes": "no" ); Abc_Print( -2, "\t-h : print the command usage\n"); Abc_Print( -2, "\t : the implementation aig. (should be equivalent to spec)\n"); Abc_Print( -2, "\t : the modified spec. (should be a hierarchical AIG)\n"); From d87b1cd543efaf724255da2ab74ca959bc75f920 Mon Sep 17 00:00:00 2001 From: Allen Ho Date: Mon, 4 Mar 2024 10:16:14 +0800 Subject: [PATCH 27/33] fixed some warnings in bsat2 --- src/sat/bsat2/Options.cpp | 2 ++ src/sat/bsat2/Options.h | 2 +- src/sat/bsat2/SimpSolver.cpp | 4 ++++ src/sat/bsat2/Solver.cpp | 4 ++-- src/sat/bsat2/Vec.h | 1 - 5 files changed, 9 insertions(+), 4 deletions(-) diff --git a/src/sat/bsat2/Options.cpp b/src/sat/bsat2/Options.cpp index f14059f670..a0a3817d8e 100644 --- a/src/sat/bsat2/Options.cpp +++ b/src/sat/bsat2/Options.cpp @@ -45,10 +45,12 @@ int Minisat::parseOptions(int& argc, char** argv, bool strict) } if (!parsed_ok) + { if (strict && match(argv[i], "-")) { fprintf(stderr, "ERROR! Unknown flag \"%s\". Use '--%shelp' for help.\n", argv[i], Option::getHelpPrefixString()); return 0; } // exit(0); else argv[j++] = argv[i]; + } } } diff --git a/src/sat/bsat2/Options.h b/src/sat/bsat2/Options.h index 137b5a45ef..00d46d3525 100644 --- a/src/sat/bsat2/Options.h +++ b/src/sat/bsat2/Options.h @@ -62,7 +62,7 @@ class Option struct OptionLt { bool operator()(const Option* x, const Option* y) { int test1 = strcmp(x->category, y->category); - return test1 < 0 || test1 == 0 && strcmp(x->type_name, y->type_name) < 0; + return test1 < 0 || ( test1 == 0 && strcmp(x->type_name, y->type_name) < 0 ); } }; diff --git a/src/sat/bsat2/SimpSolver.cpp b/src/sat/bsat2/SimpSolver.cpp index 59952d1542..c07ec5b97c 100644 --- a/src/sat/bsat2/SimpSolver.cpp +++ b/src/sat/bsat2/SimpSolver.cpp @@ -230,10 +230,12 @@ bool SimpSolver::merge(const Clause& _ps, const Clause& _qs, Var v, vec& ou if (var(qs[i]) != v){ for (j = 0; j < ps.size(); j++) if (var(ps[j]) == var(qs[i])) + { if (ps[j] == ~qs[i]) return false; else goto next; + } out_clause.push(qs[i]); } next:; @@ -264,10 +266,12 @@ bool SimpSolver::merge(const Clause& _ps, const Clause& _qs, Var v, int& size) if (var(__qs[i]) != v){ for (int j = 0; j < ps.size(); j++) if (var(__ps[j]) == var(__qs[i])) + { if (__ps[j] == ~__qs[i]) return false; else goto next; + } size++; } next:; diff --git a/src/sat/bsat2/Solver.cpp b/src/sat/bsat2/Solver.cpp index 1c45a45385..602692a8b8 100644 --- a/src/sat/bsat2/Solver.cpp +++ b/src/sat/bsat2/Solver.cpp @@ -211,7 +211,7 @@ void Solver::cancelUntil(int level) { for (int c = trail.size()-1; c >= trail_lim[level]; c--){ Var x = var(trail[c]); assigns [x] = l_Undef; - if (phase_saving > 1 || (phase_saving == 1) && c > trail_lim.last()) + if (phase_saving > 1 || ((phase_saving == 1) && c > trail_lim.last())) polarity[x] = sign(trail[c]); insertVarOrder(x); } qhead = trail_lim[level]; @@ -659,7 +659,7 @@ lbool Solver::search(int nof_conflicts) }else{ // NO CONFLICT - if (nof_conflicts >= 0 && conflictC >= nof_conflicts || !withinBudget()){ + if ( (nof_conflicts >= 0 && conflictC >= nof_conflicts) || !withinBudget()){ // Reached bound on number of conflicts: progress_estimate = progressEstimate(); cancelUntil(0); diff --git a/src/sat/bsat2/Vec.h b/src/sat/bsat2/Vec.h index aade19f139..f5f5499eaf 100644 --- a/src/sat/bsat2/Vec.h +++ b/src/sat/bsat2/Vec.h @@ -93,7 +93,6 @@ class vec { void moveTo(vec& dest) { dest.clear(true); dest.data = data; dest.sz = sz; dest.cap = cap; data = NULL; sz = 0; cap = 0; } }; - template void vec::capacity(int min_cap) { if (cap >= min_cap) return; From 524699d6ab7e62ec85e19a118f1f3b02a3b99040 Mon Sep 17 00:00:00 2001 From: Allen Ho Date: Mon, 4 Mar 2024 11:19:46 +0800 Subject: [PATCH 28/33] restore .gitignore, Makefile, and abc.rc --- .gitignore | 4 -- Makefile | 3 +- abc.rc | 148 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 149 insertions(+), 6 deletions(-) create mode 100644 abc.rc diff --git a/.gitignore b/.gitignore index f0c5201c6d..3fa906fefa 100644 --- a/.gitignore +++ b/.gitignore @@ -10,10 +10,6 @@ _/ _TEST/ _sandwich/ _scripts/ -*.aig -*.vcproj -*.sh -*.v lib/abc* lib/m114* lib/bip* diff --git a/Makefile b/Makefile index 9a9f7abd5f..0cc979b750 100644 --- a/Makefile +++ b/Makefile @@ -33,8 +33,7 @@ MODULES := \ src/proof/pdr src/proof/abs src/proof/live src/proof/ssc src/proof/int \ src/proof/cec src/proof/acec src/proof/dch src/proof/fraig src/proof/fra src/proof/ssw \ src/aig/aig src/aig/saig src/aig/gia src/aig/ioa src/aig/ivy src/aig/hop \ - src/aig/miniaig \ - src/sat/bsat2 + src/aig/miniaig all: $(PROG) default: $(PROG) diff --git a/abc.rc b/abc.rc new file mode 100644 index 0000000000..a3efc0b09a --- /dev/null +++ b/abc.rc @@ -0,0 +1,148 @@ +# global parameters +set check # checks intermediate networks +#set checkfio # prints warnings when fanins/fanouts are duplicated +#unset checkread # does not check new networks after reading from file +#set backup # saves backup networks retrived by "undo" and "recall" +#set savesteps 1 # sets the maximum number of backup networks to save +#set progressbar # display the progress bar + +# program names for internal calls +set dotwin dot.exe +set dotunix dot +set gsviewwin gsview32.exe +set gsviewunix gv +set siswin sis.exe +set sisunix sis +set mvsiswin mvsis.exe +set mvsisunix mvsis +set capowin MetaPl-Capo10.1-Win32.exe +set capounix MetaPl-Capo10.1 +set gnuplotwin wgnuplot.exe +set gnuplotunix gnuplot + +# Niklas Een's commands +#load_plugin C:\_projects\abc\lib\bip_win.exe "BIP" + +# standard aliases +alias hi history +alias b balance +alias cg clockgate +alias cl cleanup +alias clp collapse +alias cs care_set +alias el eliminate +alias esd ext_seq_dcs +alias f fraig +alias fs fraig_sweep +alias fsto fraig_store +alias fres fraig_restore +alias fr fretime +alias ft fraig_trust +alias ic indcut +alias lp lutpack +alias pcon print_cone +alias pd print_dsd +alias pex print_exdc -d +alias pf print_factor +alias pfan print_fanio +alias pg print_gates +alias pl print_level +alias plat print_latch +alias pio print_io +alias pk print_kmap +alias pm print_miter +alias ps print_stats +alias psb print_stats -b +alias psu print_supp +alias psy print_symm +alias pun print_unate +alias q quit +alias r read +alias ra read_aiger +alias r3 retime -M 3 +alias r3f retime -M 3 -f +alias r3b retime -M 3 -b +alias ren renode +alias rh read_hie +alias ri read_init +alias rl read_blif +alias rb read_bench +alias ret retime +alias dret dretime +alias rp read_pla +alias rt read_truth +alias rv read_verilog +alias rvl read_verlib +alias rsup read_super mcnc5_old.super +alias rlib read_library +alias rlibc read_library cadence.genlib +alias rty read_liberty +alias rlut read_lut +alias rw rewrite +alias rwz rewrite -z +alias rf refactor +alias rfz refactor -z +alias re restructure +alias rez restructure -z +alias rs resub +alias rsz resub -z +alias sa set autoexec ps +alias scl scleanup +alias sif if -s +alias so source -x +alias st strash +alias sw sweep +alias ssw ssweep +alias tr0 trace_start +alias tr1 trace_check +alias trt "r c.blif; st; tr0; b; tr1" +alias u undo +alias w write +alias wa write_aiger +alias wb write_bench +alias wc write_cnf +alias wh write_hie +alias wl write_blif +alias wp write_pla +alias wv write_verilog + +# standard scripts +alias resyn "b; rw; rwz; b; rwz; b" +alias resyn2 "b; rw; rf; b; rw; rwz; b; rfz; rwz; b" +alias resyn2a "b; rw; b; rw; rwz; b; rwz; b" +alias resyn3 "b; rs; rs -K 6; b; rsz; rsz -K 6; b; rsz -K 5; b" +alias compress "b -l; rw -l; rwz -l; b -l; rwz -l; b -l" +alias compress2 "b -l; rw -l; rf -l; b -l; rw -l; rwz -l; b -l; rfz -l; rwz -l; b -l" +alias choice "fraig_store; resyn; fraig_store; resyn2; fraig_store; fraig_restore" +alias choice2 "fraig_store; balance; fraig_store; resyn; fraig_store; resyn2; fraig_store; resyn2; fraig_store; fraig_restore" +alias rwsat "st; rw -l; b -l; rw -l; rf -l" +alias drwsat2 "st; drw; b -l; drw; drf; ifraig -C 20; drw; b -l; drw; drf" +alias share "st; multi -m; sop; fx; resyn2" +alias addinit "read_init; undc; strash; zero" +alias blif2aig "undc; strash; zero" +alias v2p "&vta_gla; &ps; &gla_derive; &put; w 1.aig; pdr -v" +alias g2p "&ps; &gla_derive; &put; w 2.aig; pdr -v" +alias &sw_ "&put; sweep; st; &get" +alias &fx_ "&put; sweep; sop; fx; st; &get" +alias &dc3 "&b; &jf -K 6; &b; &jf -K 4; &b" +alias &dc4 "&b; &jf -K 7; &fx; &b; &jf -K 5; &fx; &b" + +# resubstitution scripts for the IWLS paper +alias src_rw "st; rw -l; rwz -l; rwz -l" +alias src_rs "st; rs -K 6 -N 2 -l; rs -K 9 -N 2 -l; rs -K 12 -N 2 -l" +alias src_rws "st; rw -l; rs -K 6 -N 2 -l; rwz -l; rs -K 9 -N 2 -l; rwz -l; rs -K 12 -N 2 -l" +alias resyn2rs "b; rs -K 6; rw; rs -K 6 -N 2; rf; rs -K 8; b; rs -K 8 -N 2; rw; rs -K 10; rwz; rs -K 10 -N 2; b; rs -K 12; rfz; rs -K 12 -N 2; rwz; b" +alias r2rs "b; rs -K 6; rw; rs -K 6 -N 2; rf; rs -K 8; b; rs -K 8 -N 2; rw; rs -K 10; rwz; rs -K 10 -N 2; b; rs -K 12; rfz; rs -K 12 -N 2; rwz; b" +alias compress2rs "b -l; rs -K 6 -l; rw -l; rs -K 6 -N 2 -l; rf -l; rs -K 8 -l; b -l; rs -K 8 -N 2 -l; rw -l; rs -K 10 -l; rwz -l; rs -K 10 -N 2 -l; b -l; rs -K 12 -l; rfz -l; rs -K 12 -N 2 -l; rwz -l; b -l" +alias c2rs "b -l; rs -K 6 -l; rw -l; rs -K 6 -N 2 -l; rf -l; rs -K 8 -l; b -l; rs -K 8 -N 2 -l; rw -l; rs -K 10 -l; rwz -l; rs -K 10 -N 2 -l; b -l; rs -K 12 -l; rfz -l; rs -K 12 -N 2 -l; rwz -l; b -l" + +# use this script to convert 1-valued and DC-valued flops for an AIG +alias fix_aig "logic; undc; strash; zero" + +# use this script to convert 1-valued and DC-valued flops for a logic network coming from BLIF +alias fix_blif "undc; strash; zero" + +# lazy man's synthesis +alias recadd3 "st; rec_add3; b; rec_add3; dc2; rec_add3; if -K 8; bidec; st; rec_add3; dc2; rec_add3; if -g -K 6; st; rec_add3" + + From c607fc3101608e655760a56cfa4ec5dfb79fed6b Mon Sep 17 00:00:00 2001 From: Allen Ho Date: Mon, 4 Mar 2024 11:20:27 +0800 Subject: [PATCH 29/33] restore --- .gitignore | 2 -- 1 file changed, 2 deletions(-) diff --git a/.gitignore b/.gitignore index 3fa906fefa..cbb4241526 100644 --- a/.gitignore +++ b/.gitignore @@ -8,8 +8,6 @@ ReleaseExt/ _/ _TEST/ -_sandwich/ -_scripts/ lib/abc* lib/m114* lib/bip* From a16a0f102785468bf1b0bf4c48fbd84b179d7b5c Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Wed, 6 Mar 2024 01:40:48 -0800 Subject: [PATCH 30/33] Writing Verilog for AIG using NAND gates. --- src/aig/gia/gia.h | 1 + src/aig/gia/giaMan.c | 99 +++++++++++++++++++++++++++++++++++++++++--- src/base/abci/abc.c | 76 ++++++++++++++++++++++++++++++++-- 3 files changed, 167 insertions(+), 9 deletions(-) diff --git a/src/aig/gia/gia.h b/src/aig/gia/gia.h index f12ab35df9..704cd728b9 100644 --- a/src/aig/gia/gia.h +++ b/src/aig/gia/gia.h @@ -1532,6 +1532,7 @@ extern void Gia_ManSetRegNum( Gia_Man_t * p, int nRegs ); extern void Gia_ManReportImprovement( Gia_Man_t * p, Gia_Man_t * pNew ); extern void Gia_ManPrintNpnClasses( Gia_Man_t * p ); extern void Gia_ManDumpVerilog( Gia_Man_t * p, char * pFileName, Vec_Int_t * vObjs, int fVerBufs, int fInter, int fInterComb, int fAssign, int fReverse ); +extern void Gia_ManDumpVerilogNand( Gia_Man_t * p, char * pFileName ); /*=== giaMem.c ===========================================================*/ extern Gia_MmFixed_t * Gia_MmFixedStart( int nEntrySize, int nEntriesMax ); extern void Gia_MmFixedStop( Gia_MmFixed_t * p, int fVerbose ); diff --git a/src/aig/gia/giaMan.c b/src/aig/gia/giaMan.c index 5d8c86b31a..288c065363 100644 --- a/src/aig/gia/giaMan.c +++ b/src/aig/gia/giaMan.c @@ -1414,12 +1414,12 @@ void Gia_ManDumpVerilog( Gia_Man_t * p, char * pFileName, Vec_Int_t * vObjs, int if ( fInterComb ) { if ( fAssign ) { - extern void Gia_ManDumpInterfaceAssign( Gia_Man_t * p, char * pFileName, int fReverse ); - Gia_ManDumpInterfaceAssign( p, pFileName, fReverse ); + extern void Gia_ManDumpInterfaceAssign( Gia_Man_t * p, char * pFileName ); + Gia_ManDumpInterfaceAssign( p, pFileName ); } else { - extern void Gia_ManDumpInterface( Gia_Man_t * p, char * pFileName, int fReverse ); - Gia_ManDumpInterface( p, pFileName, fReverse ); + extern void Gia_ManDumpInterface( Gia_Man_t * p, char * pFileName ); + Gia_ManDumpInterface( p, pFileName ); } } else @@ -1899,7 +1899,7 @@ void Gia_ManDumpIoRanges( Gia_Man_t * p, FILE * pFile, int fOuts ) SeeAlso [] ***********************************************************************/ -void Gia_ManDumpInterface( Gia_Man_t * p, char * pFileName, int fReverse ) +void Gia_ManDumpInterface( Gia_Man_t * p, char * pFileName ) { Gia_Obj_t * pObj; Vec_Bit_t * vInvs, * vUsed; @@ -2010,7 +2010,7 @@ void Gia_ManDumpInterface( Gia_Man_t * p, char * pFileName, int fReverse ) Vec_BitFree( vInvs ); Vec_BitFree( vUsed ); } -void Gia_ManDumpInterfaceAssign( Gia_Man_t * p, char * pFileName, int fReverse ) +void Gia_ManDumpInterfaceAssign( Gia_Man_t * p, char * pFileName ) { Gia_Obj_t * pObj; Vec_Bit_t * vInvs, * vUsed; @@ -2123,6 +2123,93 @@ void Gia_ManDumpInterfaceAssign( Gia_Man_t * p, char * pFileName, int fReverse ) } +/**Function************************************************************* + + Synopsis [] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Gia_ManDumpNandLit( FILE * pFile, int nIns, int Lit, int nDigits ) +{ + if ( Lit == 0 ) + fprintf( pFile, "1\'b0" ); + else if ( Lit == 1 ) + fprintf( pFile, "1\'b1" ); + else if ( Abc_Lit2Var(Lit) <= nIns ) + fprintf( pFile, "%cn%0*d", (char)(Abc_LitIsCompl(Lit)? '~':' '), nDigits, Abc_Lit2Var(Lit) ); + else + fprintf( pFile, "%cn%0*d", (char)(Abc_LitIsCompl(Lit)? ' ':'~'), nDigits, Abc_Lit2Var(Lit) ); +} +void Gia_ManDumpVerilogNand( Gia_Man_t * p, char * pFileName ) +{ + Gia_Obj_t * pObj; int i, nPis = Gia_ManPiNum(p); + int nDigits = Abc_Base10Log( Gia_ManObjNum(p) ); + int nDigitsI = Abc_Base10Log( Gia_ManPiNum(p) ); + int nDigitsO = Abc_Base10Log( Gia_ManPoNum(p) ); + FILE * pFile = fopen( pFileName, "wb" ); + if ( pFile == NULL ) + { + printf( "Cannot open output file \"%s\".\n", pFileName ); + return; + } + assert( Gia_ManRegNum(p) == 0 ); + fprintf( pFile, "module " ); + Gia_ManDumpModuleName( pFile, p->pName ); + fprintf( pFile, "_wrapper" ); + fprintf( pFile, " ( " ); + if ( p->vNamesIn ) { + Gia_ManDumpIoList( p, pFile, 0, 0 ); + fprintf( pFile, ", " ); + Gia_ManDumpIoList( p, pFile, 1, 0 ); + fprintf( pFile, " );\n\n" ); + Gia_ManDumpIoRanges( p, pFile, 0 ); + Gia_ManDumpIoRanges( p, pFile, 1 ); + } + else { + fprintf( pFile, "\n " ); + Gia_ManForEachPi( p, pObj, i ) + fprintf( pFile, "%s, ", Gia_ObjGetDumpName(NULL, 'x', i, nDigitsI) ); + fprintf( pFile, "\n " ); + Gia_ManForEachPo( p, pObj, i ) + fprintf( pFile, "%s%s ", Gia_ObjGetDumpName(NULL, 'z', i, nDigitsO), i < Gia_ManPoNum(p)-1 ? ",":"" ); + fprintf( pFile, "\n);\n\n" ); + fprintf( pFile, " input" ); + Gia_ManForEachPi( p, pObj, i ) + fprintf( pFile, " %s%s", Gia_ObjGetDumpName(NULL, 'x', i, nDigitsI), i < Gia_ManPiNum(p)-1 ? ",":"" ); + fprintf( pFile, ";\n" ); + fprintf( pFile, " output" ); + Gia_ManForEachPo( p, pObj, i ) + fprintf( pFile, " %s%s", Gia_ObjGetDumpName(NULL, 'z', i, nDigitsO), i < Gia_ManPoNum(p)-1 ? ",":"" ); + fprintf( pFile, ";\n" ); + } + fprintf( pFile, "\n" ); + Gia_ManForEachPi( p, pObj, i ) + fprintf( pFile, " wire n%0*d = %s;\n", nDigits, i+1, p->vNamesIn ? (char *)Vec_PtrEntry(p->vNamesIn, i) : Gia_ObjGetDumpName(p->vNamesIn, 'x', i, nDigitsI) ); + fprintf( pFile, "\n" ); + Gia_ManForEachAnd( p, pObj, i ) + { + fprintf( pFile, " wire n%0*d = ~(", nDigits, i ); + Gia_ManDumpNandLit( pFile, nPis, Gia_ObjFaninLit0(pObj, i), nDigits ); + fprintf( pFile, " & " ); + Gia_ManDumpNandLit( pFile, nPis, Gia_ObjFaninLit1(pObj, i), nDigits ); + fprintf( pFile, ");\n" ); + } + fprintf( pFile, "\n" ); + Gia_ManForEachPo( p, pObj, i ) + { + fprintf( pFile, " assign %s = ", p->vNamesOut ? (char *)Vec_PtrEntry(p->vNamesOut, i) : Gia_ObjGetDumpName(p->vNamesOut, 'z', i, nDigitsO) ); + Gia_ManDumpNandLit( pFile, nPis, Gia_ObjFaninLit0p(p, pObj), nDigits ); + fprintf( pFile, ";\n" ); + } + fprintf( pFile, "\nendmodule\n\n" ); + fclose( pFile ); +} + /**Function************************************************************* Synopsis [Generate hierarchical design.] diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c index d6363a0ccd..9547c4a799 100644 --- a/src/base/abci/abc.c +++ b/src/base/abci/abc.c @@ -219,6 +219,7 @@ static int Abc_CommandInter ( Abc_Frame_t * pAbc, int argc, cha static int Abc_CommandBb2Wb ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandOutdec ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandNodeDup ( Abc_Frame_t * pAbc, int argc, char ** argv ); +static int Abc_CommandWrap ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandTestColor ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandTest ( Abc_Frame_t * pAbc, int argc, char ** argv ); @@ -998,6 +999,7 @@ void Abc_Init( Abc_Frame_t * pAbc ) Cmd_CommandAdd( pAbc, "Various", "bb2wb", Abc_CommandBb2Wb, 0 ); Cmd_CommandAdd( pAbc, "Various", "outdec", Abc_CommandOutdec, 1 ); Cmd_CommandAdd( pAbc, "Various", "nodedup", Abc_CommandNodeDup, 1 ); + Cmd_CommandAdd( pAbc, "Various", "wrap", Abc_CommandWrap, 0 ); Cmd_CommandAdd( pAbc, "Various", "testcolor", Abc_CommandTestColor, 0 ); Cmd_CommandAdd( pAbc, "Various", "test", Abc_CommandTest, 0 ); // Cmd_CommandAdd( pAbc, "Various", "qbf_solve", Abc_CommandTest, 0 ); @@ -14463,6 +14465,67 @@ int Abc_CommandNodeDup( Abc_Frame_t * pAbc, int argc, char ** argv ) return 1; } +/**Function************************************************************* + + Synopsis [] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +int Abc_CommandWrap( Abc_Frame_t * pAbc, int argc, char ** argv ) +{ + char * pFileName = NULL, * pFileName2 = NULL; + FILE * pFile = NULL, * pFile2 = NULL; + int c; + Extra_UtilGetoptReset(); + while ( ( c = Extra_UtilGetopt( argc, argv, "h" ) ) != EOF ) + { + switch ( c ) + { + case 'h': + goto usage; + default: + goto usage; + } + } + if ( argc != globalUtilOptind + 2 ) + { + Abc_Print( 1,"Two file names are expected on the command line.\n" ); + return 0; + } + pFileName = argv[globalUtilOptind]; + pFileName2 = argv[globalUtilOptind+1]; + pFile = fopen( pFileName, "rb" ); + pFile2 = fopen( pFileName2, "wb" ); + if ( pFile && pFile2 ) + { + char Buffer[1000]; + while ( fgets( Buffer, 1000, pFile ) != NULL ) + { + if ( Buffer[strlen(Buffer)-1] == '\n' ) + Buffer[strlen(Buffer)-1] = 0; + if ( Buffer[strlen(Buffer)-1] == '\r' ) + Buffer[strlen(Buffer)-1] = 0; + fprintf( pFile2, " printf(\"%s\\n\");\n", Buffer ); + } + } + if ( pFile ) fclose(pFile); + if ( pFile2 ) fclose(pFile2); + return 0; + +usage: + Abc_Print( -2, "usage: wrap [-h] \n" ); + Abc_Print( -2, "\t wrapping lines\n" ); + Abc_Print( -2, "\t : input text file\n"); + Abc_Print( -2, "\t : output text file\n"); + return 1; + +} + /**Function************************************************************* Synopsis [] @@ -32065,8 +32128,9 @@ int Abc_CommandAbc9Write( Abc_Frame_t * pAbc, int argc, char ** argv ) char * pFileName; char ** pArgvNew; int c, nArgcNew; - int fUnique = 0; + int fUnique = 0; int fVerilog = 0; + int fVerNand = 0; int fInter = 0; int fInterComb = 0; int fAssign = 0; @@ -32078,7 +32142,7 @@ int Abc_CommandAbc9Write( Abc_Frame_t * pAbc, int argc, char ** argv ) int fSkipComment = 0; int fVerbose = 0; Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "upicabmlnrsvh" ) ) != EOF ) + while ( ( c = Extra_UtilGetopt( argc, argv, "upqicabmlnrsvh" ) ) != EOF ) { switch ( c ) { @@ -32088,6 +32152,9 @@ int Abc_CommandAbc9Write( Abc_Frame_t * pAbc, int argc, char ** argv ) case 'p': fVerilog ^= 1; break; + case 'q': + fVerNand ^= 1; + break; case 'i': fInter ^= 1; break; @@ -32143,6 +32210,8 @@ int Abc_CommandAbc9Write( Abc_Frame_t * pAbc, int argc, char ** argv ) Gia_AigerWriteSimple( pGia, pFileName ); Gia_ManStop( pGia ); } + else if ( fVerNand ) + Gia_ManDumpVerilogNand( pAbc->pGia, pFileName ); else if ( fVerilog ) Gia_ManDumpVerilog( pAbc->pGia, pFileName, NULL, fVerBufs, fInter, fInterComb, fAssign, fReverse ); else if ( fMiniAig ) @@ -32154,10 +32223,11 @@ int Abc_CommandAbc9Write( Abc_Frame_t * pAbc, int argc, char ** argv ) return 0; usage: - Abc_Print( -2, "usage: &w [-upicabmlnsvh] \n" ); + Abc_Print( -2, "usage: &w [-upqicabmlnsvh] \n" ); Abc_Print( -2, "\t writes the current AIG into the AIGER file\n" ); Abc_Print( -2, "\t-u : toggle writing canonical AIG structure [default = %s]\n", fUnique? "yes" : "no" ); Abc_Print( -2, "\t-p : toggle writing Verilog with 'and' and 'not' [default = %s]\n", fVerilog? "yes" : "no" ); + Abc_Print( -2, "\t-q : toggle writing Verilog with NAND-gates [default = %s]\n", fVerNand? "yes" : "no" ); Abc_Print( -2, "\t-i : toggle writing the interface module in Verilog [default = %s]\n", fInter? "yes" : "no" ); Abc_Print( -2, "\t-c : toggle writing the interface module in Verilog [default = %s]\n", fInterComb? "yes" : "no" ); Abc_Print( -2, "\t-a : toggle writing the interface module with assign-statements [default = %s]\n", fAssign? "yes" : "no" ); From 015dd2a367326facf2b582b5786f7b4c0e50b1fd Mon Sep 17 00:00:00 2001 From: Allen Ho Date: Fri, 15 Mar 2024 16:56:10 +0800 Subject: [PATCH 31/33] use speculative in &brecover --- src/aig/gia/gia.h | 3 +- src/aig/gia/giaBound.c | 186 +++++++++++++++++++++++++++++------------ src/aig/gia/giaDup.c | 9 +- src/base/abci/abc.c | 22 ++++- 4 files changed, 160 insertions(+), 60 deletions(-) diff --git a/src/aig/gia/gia.h b/src/aig/gia/gia.h index f12ab35df9..3e90ba0e6a 100644 --- a/src/aig/gia/gia.h +++ b/src/aig/gia/gia.h @@ -1805,9 +1805,10 @@ extern void Bnd_ManMap( int iLit, int id, int spec ); extern void Bnd_ManMerge( int id1, int id2, int phaseDiff ); extern void Bnd_ManFinalizeMappings(); extern void Bnd_ManPrintMappings(); +extern Gia_Man_t* Bnd_ManStackGias( Gia_Man_t *pSpec, Gia_Man_t *pImpl ); // for eco extern int Bnd_ManCheckBound( Gia_Man_t *p, int fVerbose ); -extern void Bnd_ManFindBound( Gia_Man_t *p ); +extern void Bnd_ManFindBound( Gia_Man_t *p, Gia_Man_t *pImpl ); extern Gia_Man_t* Bnd_ManGenSpecOut( Gia_Man_t *p ); extern Gia_Man_t* Bnd_ManGenImplOut( Gia_Man_t *p ); extern Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPatch ); diff --git a/src/aig/gia/giaBound.c b/src/aig/gia/giaBound.c index a420b818d8..9ae21b4596 100644 --- a/src/aig/gia/giaBound.c +++ b/src/aig/gia/giaBound.c @@ -28,7 +28,6 @@ struct Bnd_Man_t_ int nNode_patch; int nNode_patched; - int status; // 0: init 1: boundary found 2: out generated 3: patched generated int fVerbose; int combLoop_spec; @@ -43,6 +42,8 @@ struct Bnd_Man_t_ Vec_Ptr_t* vBmiter2Impl; Vec_Int_t* vSpec2Impl; Vec_Bit_t* vSpec2Impl_phase; + + Vec_Int_t* vImpl2Bmiter; Vec_Int_t* vBI; Vec_Int_t* vBO; @@ -98,6 +99,9 @@ Bnd_Man_t* Bnd_ManStart( Gia_Man_t *pSpec, Gia_Man_t *pImpl, int fVerbose ) p -> vSpec2Impl_phase = Vec_BitAlloc( Gia_ManObjNum(pSpec) ); Vec_IntFill( p -> vSpec2Impl, Gia_ManObjNum(pSpec), -1 ); Vec_BitFill( p -> vSpec2Impl_phase, Gia_ManObjNum(pSpec), 0 ); + + p -> vImpl2Bmiter = Vec_IntAlloc( Gia_ManObjNum(pImpl) ); + Vec_IntFill( p -> vImpl2Bmiter, Gia_ManObjNum(pImpl), -1 ); p -> vBI = Vec_IntAlloc(16); p -> vBO = Vec_IntAlloc(16); @@ -113,7 +117,6 @@ Bnd_Man_t* Bnd_ManStart( Gia_Man_t *pSpec, Gia_Man_t *pImpl, int fVerbose ) p -> nNode_patch = 0; p -> nNode_patched = 0; - p -> status = 0; p -> fVerbose = fVerbose; p -> combLoop_spec = 0; @@ -153,6 +156,7 @@ void Bnd_ManStop() Vec_PtrFree( pBnd-> vBmiter2Impl ); Vec_IntFree( pBnd-> vSpec2Impl ); Vec_BitFree( pBnd-> vSpec2Impl_phase ); + Vec_IntFree( pBnd-> vImpl2Bmiter ); Vec_IntFree( pBnd->vBI ); Vec_IntFree( pBnd->vBO ); @@ -260,6 +264,9 @@ void Bnd_ManFinalizeMappings() { // record the number of different choice of vEI_impl, vEO_impl Vec_IntSetEntry( pBnd->vImpl2Spec_diff, id, Vec_IntSize(vSpec)-1 ); + + // vImpl2Bmiter + Vec_IntSetEntry( pBnd->vImpl2Bmiter, id, i ); } @@ -332,41 +339,41 @@ void Bnd_ManPrintStats() warning = 1; printf("WARNING: multiple equiv nodes on the boundary of impl\n"); } - if ( p->feedthrough ) - { - warning = 1; - printf("WARNING: feedthrough inside patch\n"); - } printf("The outsides of spec and impl are %sEQ.\n", p->eq_out ? "" : "NOT " ); - printf("The patched impl and patch are %sEQ.\n", p->eq_res ? "" : "NOT " ); + printf("The patched impl is %sEQ. to spec (and impl)\n", p->eq_res ? "" : "NOT " ); // #internal // nBI, nBO // nBI_miss, nBO_miss - // nAI, nAO, nExtra + // nEI, nEO, nExtra // #spec, #impl, #patched // combLoop_spec, combLoop_impl - // status - // #different choice of impl on boundary + // #choice_impl + // #choice_spec + // #feedthrough // warning (may be neq) // eq_out, eq_res - // printf("\nRESULT\n"); - // printf("%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d\n", - // p->nInternal, - // p->nBI, p->nBO, - // p->nBI_miss, p->nBO_miss, - // Vec_IntSize(p->vEI_spec), Vec_IntSize(p->vEO_spec), p->nExtra, - // p->nNode_spec, p->nNode_impl, p->nNode_patched, - // p->combLoop_spec, p->combLoop_impl, - // p->status, - // p->nChoice_impl, - // p->nChoice_spec, - // p->feedthrough, - // warning, - // p->eq_out, p->eq_res - // ); + printf("\nRESULT\n"); + printf("%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d\n", + p->nInternal, + p->nBI, p->nBO, + p->nBI_miss, p->nBO_miss, + Vec_IntSize(p->vEI_spec), Vec_IntSize(p->vEO_spec), p->nExtra, + p->nNode_spec, p->nNode_impl, p->nNode_patched, + p->combLoop_spec, p->combLoop_impl, + p->nChoice_impl, + p->nChoice_spec, + warning, + p->eq_out, p->eq_res + ); + + printf("#Choice Spec\t%d\n", p->nChoice_spec); + printf("#Choice Impl\t%d\n", p->nChoice_impl); + + + } /**Function************************************************************* @@ -541,7 +548,6 @@ int Bnd_ManCheckExtBound( Gia_Man_t * p, Vec_Int_t *vEI, Vec_Int_t *vEO ) } - /**Function************************************************************* Synopsis [] @@ -554,7 +560,7 @@ int Bnd_ManCheckExtBound( Gia_Man_t * p, Vec_Int_t *vEI, Vec_Int_t *vEO ) ***********************************************************************/ -void Bnd_ManFindBound( Gia_Man_t * p ) +void Bnd_ManFindBound( Gia_Man_t * p, Gia_Man_t * pImpl ) { Vec_Int_t *vFlag; Vec_Ptr_t *vQ; @@ -743,18 +749,16 @@ void Bnd_ManFindBound( Gia_Man_t * p ) // count number of choice of boundary - Vec_IntForEachEntry( vEI_spec, id, i ) - pBnd -> nChoice_impl += Vec_IntEntry( pBnd -> vSpec2Impl_diff, id ); Vec_IntForEachEntry( vEO_spec, id, i ) + { pBnd -> nChoice_impl += Vec_IntEntry( pBnd -> vSpec2Impl_diff, id ); - Vec_IntForEachEntry( vEI_impl, id, i ) - pBnd -> nChoice_spec += Vec_IntEntry( pBnd -> vImpl2Spec_diff, id ); + } Vec_IntForEachEntry( vEO_impl, id, i ) + { pBnd -> nChoice_spec += Vec_IntEntry( pBnd -> vImpl2Spec_diff, id ); - pBnd -> nChoice_spec -= ( pBnd->nBI + pBnd ->nBO - pBnd->nBI_miss - pBnd->nBO_miss); + } // print - pBnd -> status = 1; if ( pBnd -> fVerbose ) { printf("#EI = %d\t#EO = %d\t#Extra Node = %d\n", Vec_IntSize(vEI_spec) , Vec_IntSize(vEO_spec), cnt_extra ); @@ -764,8 +768,10 @@ void Bnd_ManFindBound( Gia_Man_t * p ) // check boundary has comb loop if ( !Bnd_ManCheckExtBound( p, vEI_spec, vEO_spec ) ) { + printf("Combinational loop exist\n"); pBnd -> combLoop_spec = 1; + } @@ -776,7 +782,6 @@ void Bnd_ManFindBound( Gia_Man_t * p ) - /**Function************************************************************* Synopsis [] @@ -804,18 +809,6 @@ Gia_Man_t* Bnd_ManCutBoundary( Gia_Man_t *p, Vec_Int_t* vEI, Vec_Int_t* vEO, Vec return 0; } - // detect feedthrough - Gia_ManFillValue(p); - Vec_IntForEachEntry(vEO, id, i) - { - Gia_ManObj(p, id) -> Value = 1; - } - Vec_IntForEachEntry(vEI, id, i) - { - if ( Gia_ManObj(p, id) -> Value == 1 ) - pBnd -> feedthrough = 1; - } - // initialize pNew = Gia_ManStart( Gia_ManObjNum(p) ); pNew -> pName = ABC_ALLOC( char, strlen(p->pName)+10); @@ -847,7 +840,6 @@ Gia_Man_t* Bnd_ManCutBoundary( Gia_Man_t *p, Vec_Int_t* vEI, Vec_Int_t* vEO, Vec } } - // add aig nodes Gia_ManForEachAnd(p, pObj, i) { @@ -899,8 +891,7 @@ Gia_Man_t* Bnd_ManGenImplOut( Gia_Man_t* p) { if ( pBnd -> fVerbose ) printf("Generating impl_out with given boundary.\n"); Gia_Man_t *pNew = Bnd_ManCutBoundary( p, pBnd->vEI_impl, pBnd->vEO_impl, pBnd->vEI_phase, pBnd->vEO_phase ); - if ( pNew ) pBnd -> status = 2; - else pBnd -> combLoop_impl = 1; + if (!pNew) pBnd -> combLoop_impl = 1; return pNew; } @@ -1056,7 +1047,6 @@ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPat Gia_ManStop( pTemp ); pBnd -> nNode_patched = Gia_ManAndNum( pNew ); - pBnd -> status = 3; return pNew; } @@ -1142,7 +1132,6 @@ Gia_Man_t* Bnd_ManGenPatched1( Gia_Man_t *pOut, Gia_Man_t *pSpec ) Gia_ManStop( pTemp ); pBnd -> nNode_patched = Gia_ManAndNum( pNew ); - pBnd -> status = 3; return pNew; } @@ -1243,6 +1232,99 @@ Gia_Man_t* Bnd_ManGenPatched2( Gia_Man_t *pImpl, Gia_Man_t *pPatch, int fSkipStr } +Gia_Man_t* Bnd_ManStackGias( Gia_Man_t *pSpec, Gia_Man_t *pImpl ) +{ + Gia_Man_t * pNew, * pTemp; + Gia_Obj_t * pObj; + + int i, iLit; + if ( Gia_ManBufNum(pSpec) == 0 ) { + printf( "The spec AIG should have a boundary.\n" ); + return NULL; + } + if ( Gia_ManBufNum(pImpl) != 0 ) { + printf( "The impl AIG should have no boundary.\n" ); + return NULL; + } + + assert( Gia_ManBufNum(pSpec) > 0 ); + assert( Gia_ManBufNum(pImpl) == 0 ); + assert( Gia_ManRegNum(pSpec) == 0 ); + assert( Gia_ManRegNum(pImpl) == 0 ); + assert( Gia_ManCiNum(pSpec) == Gia_ManCiNum(pImpl) ); + assert( Gia_ManCoNum(pSpec) == Gia_ManCoNum(pImpl) ); + + pNew = Gia_ManStart( Gia_ManObjNum(pSpec) + Gia_ManObjNum(pImpl) ); + pNew->pName = ABC_ALLOC( char, strlen(pSpec->pName) + 10 ); + sprintf( pNew->pName, "%s_stack", pSpec->pName ); + + Gia_ManHashStart( pNew ); + Gia_ManConst0(pSpec)->Value = 0; + Gia_ManConst0(pImpl)->Value = 0; + + for( int i = 0; i < Gia_ManCiNum(pSpec); i++ ) + { + int iLit = Gia_ManCi(pSpec, i)->Value = Gia_ManCi(pImpl, i) -> Value = Gia_ManAppendCi(pNew); + + pObj = Gia_ManCi(pSpec, i); + Bnd_ManMap( iLit, Gia_ObjId( pSpec, pObj ), 1 ); + + pObj = Gia_ManCi(pImpl, i); + Bnd_ManMap( iLit, Gia_ObjId( pImpl, pObj) , 0 ); + } + + // record the corresponding impl node of each lit + Gia_ManForEachAnd( pImpl, pObj, i ) + { + pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); + if ( pBnd ) Bnd_ManMap( pObj -> Value, Gia_ObjId(pImpl, pObj), 0 ); + } + + Vec_Int_t* vFlag = Vec_IntAlloc( Gia_ManObjNum( pSpec ) ); + Vec_IntFill( vFlag, Gia_ManObjNum(pSpec), 0 ); + int count = 0; + Gia_ManForEachBuf( pSpec, pObj, i ) + { + if ( count < pBnd -> nBI ) + { + // it's BI, don't record buf + Vec_IntSetEntry( vFlag, Gia_ObjId( pSpec, pObj ), 1 ); + } + else + { + // it's BO, don't record buf's fanin + Vec_IntSetEntry( vFlag, Gia_ObjId( pSpec, Gia_ObjFanin0( pObj ) ), 1 ); + } + count++; + } + + // record hashed equivalent nodes + Gia_ManForEachAnd( pSpec, pObj, i ) + { + pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); + if ( Vec_IntEntry( vFlag, Gia_ObjId( pSpec, pObj ) ) == 0 ) + { + Bnd_ManMap( pObj -> Value, Gia_ObjId(pSpec, pObj), 1 ); + } + } + Vec_IntFree( vFlag ); + + Gia_ManForEachCo( pImpl, pObj, i ) + { + iLit = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ); + } + Gia_ManForEachCo( pSpec, pObj, i ) + { + iLit = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ); + } + + Gia_ManHashStop( pNew ); + pNew = Gia_ManCleanup( pTemp = pNew ); + Gia_ManStop( pTemp ); + return pNew; +} + + //////////////////////////////////////////////////////////////////////// /// END OF FILE /// //////////////////////////////////////////////////////////////////////// diff --git a/src/aig/gia/giaDup.c b/src/aig/gia/giaDup.c index 46c6f4da02..92eb2ac893 100644 --- a/src/aig/gia/giaDup.c +++ b/src/aig/gia/giaDup.c @@ -5712,10 +5712,10 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose ) int iLit = Gia_ManCi(p1, i)->Value = Gia_ManCi(p2, i) -> Value = Gia_ManAppendCi(pNew); pObj = Gia_ManCi(p1, i); - Bnd_ManMap( iLit, Gia_ObjId( p1, pObj ), 1 ); + if ( pBnd ) Bnd_ManMap( iLit, Gia_ObjId( p1, pObj ), 1 ); pObj = Gia_ManCi(p2, i); - Bnd_ManMap( iLit, Gia_ObjId( p2, pObj) , 0 ); + if ( pBnd ) Bnd_ManMap( iLit, Gia_ObjId( p2, pObj) , 0 ); } @@ -5723,14 +5723,14 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose ) Gia_ManForEachAnd( p2, pObj, i ) { pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); - Bnd_ManMap( pObj -> Value, Gia_ObjId(p2, pObj), 0 ); + if ( pBnd ) Bnd_ManMap( pObj -> Value, Gia_ObjId(p2, pObj), 0 ); } // record hashed equivalent nodes Gia_ManForEachAnd( p1, pObj, i ) { pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); - Bnd_ManMap( pObj -> Value, Gia_ObjId(p1, pObj), 1 ); + if ( pBnd ) Bnd_ManMap( pObj -> Value, Gia_ObjId(p1, pObj), 1 ); } Gia_ManForEachCo( p2, pObj, i ) @@ -5741,6 +5741,7 @@ Gia_Man_t * Gia_ManBoundaryMiter( Gia_Man_t * p1, Gia_Man_t * p2, int fVerbose ) { iLit = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ); } + // Vec_IntForEachEntry( vLits, iLit, i ) // Gia_ManAppendCo( pNew, iLit ); // Vec_IntFree( vLits ); diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c index d6363a0ccd..7084b58975 100644 --- a/src/base/abci/abc.c +++ b/src/base/abci/abc.c @@ -52115,12 +52115,27 @@ int Abc_CommandAbc9BRecover( Abc_Frame_t * pAbc, int argc, char ** argv ) // parse options Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "vh" ) ) != EOF ) + while ( ( c = Extra_UtilGetopt( argc, argv, "vhCk" ) ) != EOF ) { switch ( c ) { case 'v': fVerbose ^= 1; + pParsFra->fVerbose ^= 1; + break; + case 'C': + if ( globalUtilOptind >= argc ) + { + Abc_Print( -1, "Command line switch \"-C\" should be followed by an integer.\n" ); + goto usage; + } + pParsFra->nBTLimit = atoi(argv[globalUtilOptind]); + globalUtilOptind++; + if ( pParsFra->nBTLimit < 0 ) + goto usage; + break; + case 'k': + pParsFra ->fUseCones ^= 1; break; case 'h': goto usage; @@ -52189,13 +52204,14 @@ int Abc_CommandAbc9BRecover( Abc_Frame_t * pAbc, int argc, char ** argv ) if ( success ) { // create bmiter, run fraig, record mapping - pBmiter = Gia_ManBoundaryMiter( pSpec, pAbc->pGia, 0 ); + // pBmiter = Gia_ManBoundaryMiter( pSpec, pAbc->pGia, 0 ); + pBmiter = Bnd_ManStackGias( pSpec, pAbc->pGia ); pTemp = Cec4_ManSimulateTest( pBmiter, pParsFra ); Gia_ManStop(pBmiter); Gia_ManStop(pTemp); // find - Bnd_ManFindBound( pSpec ); + Bnd_ManFindBound( pSpec, pAbc->pGia ); // create spec_out and pSpec_out = Bnd_ManGenSpecOut( pSpec ); From b7884aaf2b8a9715360e31ff6dc8c45d0db31d9b Mon Sep 17 00:00:00 2001 From: Allen Ho Date: Sat, 16 Mar 2024 01:40:11 +0800 Subject: [PATCH 32/33] clean up & add options for &brecover --- src/aig/gia/gia.h | 2 + src/aig/gia/giaBound.c | 155 ++++++++++++++++++++++++++--------------- src/base/abci/abc.c | 96 +++++++++++++++---------- 3 files changed, 160 insertions(+), 93 deletions(-) diff --git a/src/aig/gia/gia.h b/src/aig/gia/gia.h index 3e90ba0e6a..a850935ebd 100644 --- a/src/aig/gia/gia.h +++ b/src/aig/gia/gia.h @@ -1806,6 +1806,8 @@ extern void Bnd_ManMerge( int id1, int id2, int phaseDiff ); extern void Bnd_ManFinalizeMappings(); extern void Bnd_ManPrintMappings(); extern Gia_Man_t* Bnd_ManStackGias( Gia_Man_t *pSpec, Gia_Man_t *pImpl ); +extern int Bnd_ManCheckCoMerged( Gia_Man_t *p ); + // for eco extern int Bnd_ManCheckBound( Gia_Man_t *p, int fVerbose ); extern void Bnd_ManFindBound( Gia_Man_t *p, Gia_Man_t *pImpl ); diff --git a/src/aig/gia/giaBound.c b/src/aig/gia/giaBound.c index 9ae21b4596..f7811967d0 100644 --- a/src/aig/gia/giaBound.c +++ b/src/aig/gia/giaBound.c @@ -38,12 +38,14 @@ struct Bnd_Man_t_ int nChoice_impl; int feedthrough; + int maxNumClass; + Vec_Ptr_t* vBmiter2Spec; Vec_Ptr_t* vBmiter2Impl; - Vec_Int_t* vSpec2Impl; - Vec_Bit_t* vSpec2Impl_phase; + Vec_Bit_t* vSpec2Impl_phase; // TODO: record all phases Vec_Int_t* vImpl2Bmiter; + Vec_Int_t* vSpec2Bmiter; Vec_Int_t* vBI; Vec_Int_t* vBO; @@ -54,9 +56,6 @@ struct Bnd_Man_t_ Vec_Bit_t* vEI_phase; Vec_Bit_t* vEO_phase; - Vec_Int_t* vSpec2Impl_diff; - Vec_Int_t* vImpl2Spec_diff; // note that this include bufs, which should merge into their fanins - }; Bnd_Man_t* pBnd = 0; @@ -68,6 +67,12 @@ Bnd_Man_t* pBnd = 0; void Bnd_ManSetEqOut( int eq ) { pBnd -> eq_out = eq;} void Bnd_ManSetEqRes( int eq ) { pBnd -> eq_res = eq;} +Vec_Int_t* Bnd_ManSpec2Impl( int id ) { return (Vec_Int_t*)Vec_PtrEntry( pBnd -> vBmiter2Impl, Vec_IntEntry( pBnd->vSpec2Bmiter, id ) ); } +int Bnd_ManSpec2ImplNum( int id ) { return Vec_IntSize( (Vec_Int_t*)Vec_PtrEntry( pBnd -> vBmiter2Impl, Vec_IntEntry( pBnd->vSpec2Bmiter, id ) ) ); } + +Vec_Int_t* Bnd_ManImpl2Spec( int id ) { return (Vec_Int_t*)Vec_PtrEntry( pBnd -> vBmiter2Spec, Vec_IntEntry( pBnd->vImpl2Bmiter, id ) ); } +int Bnd_ManImpl2SpecNum( int id ) { return Vec_IntSize( (Vec_Int_t*)Vec_PtrEntry( pBnd -> vBmiter2Spec, Vec_IntEntry( pBnd->vImpl2Bmiter, id ) ) ); } + /**Function************************************************************* Synopsis [] @@ -85,23 +90,26 @@ Bnd_Man_t* Bnd_ManStart( Gia_Man_t *pSpec, Gia_Man_t *pImpl, int fVerbose ) int i; Bnd_Man_t* p = ABC_CALLOC( Bnd_Man_t, 1 ); - p -> vBmiter2Spec = Vec_PtrAlloc( Gia_ManObjNum(pSpec) + Gia_ManObjNum(pImpl) ); - p -> vBmiter2Impl = Vec_PtrAlloc( Gia_ManObjNum(pSpec) + Gia_ManObjNum(pImpl) ); - Vec_PtrFill( p -> vBmiter2Spec, (Gia_ManObjNum(pSpec) + Gia_ManObjNum(pImpl)), 0 ); - Vec_PtrFill( p -> vBmiter2Impl, (Gia_ManObjNum(pSpec) + Gia_ManObjNum(pImpl)), 0 ); + p -> maxNumClass = Gia_ManCiNum( pSpec ) + Gia_ManAndNotBufNum(pSpec) + Gia_ManAndNum(pImpl) + 2 + Gia_ManCoNum(pSpec) * 2; + // one for constant node and one for dummy + + p -> vBmiter2Spec = Vec_PtrAlloc( p -> maxNumClass ); + p -> vBmiter2Impl = Vec_PtrAlloc( p -> maxNumClass ); + Vec_PtrFill( p -> vBmiter2Spec, p -> maxNumClass, 0 ); + Vec_PtrFill( p -> vBmiter2Impl, p -> maxNumClass, 0 ); for( i = 0; i < Vec_PtrSize( p -> vBmiter2Impl ); i ++ ) { Vec_PtrSetEntry( p -> vBmiter2Spec, i, Vec_IntAlloc(1) ); Vec_PtrSetEntry( p -> vBmiter2Impl, i, Vec_IntAlloc(1) ); } - p -> vSpec2Impl = Vec_IntAlloc( Gia_ManObjNum(pSpec) ); p -> vSpec2Impl_phase = Vec_BitAlloc( Gia_ManObjNum(pSpec) ); - Vec_IntFill( p -> vSpec2Impl, Gia_ManObjNum(pSpec), -1 ); Vec_BitFill( p -> vSpec2Impl_phase, Gia_ManObjNum(pSpec), 0 ); p -> vImpl2Bmiter = Vec_IntAlloc( Gia_ManObjNum(pImpl) ); - Vec_IntFill( p -> vImpl2Bmiter, Gia_ManObjNum(pImpl), -1 ); + Vec_IntFill( p -> vImpl2Bmiter, Gia_ManObjNum(pImpl), p -> maxNumClass - 1 ); + p -> vSpec2Bmiter = Vec_IntAlloc( Gia_ManObjNum(pSpec) ); + Vec_IntFill( p -> vSpec2Bmiter, Gia_ManObjNum(pSpec), p -> maxNumClass - 1); p -> vBI = Vec_IntAlloc(16); p -> vBO = Vec_IntAlloc(16); @@ -128,12 +136,6 @@ Bnd_Man_t* Bnd_ManStart( Gia_Man_t *pSpec, Gia_Man_t *pImpl, int fVerbose ) p -> nChoice_impl = 0; p -> feedthrough = 0; - p -> vSpec2Impl_diff = Vec_IntAlloc( Gia_ManObjNum(pSpec) ); - Vec_IntFill( p -> vSpec2Impl_diff, Gia_ManObjNum(pSpec), 0 ); - - p -> vImpl2Spec_diff = Vec_IntAlloc( Gia_ManObjNum(pImpl) ); - Vec_IntFill( p -> vImpl2Spec_diff, Gia_ManObjNum(pImpl), 0 ); - return p; } @@ -154,9 +156,9 @@ void Bnd_ManStop() Vec_PtrFree( pBnd-> vBmiter2Spec ); Vec_PtrFree( pBnd-> vBmiter2Impl ); - Vec_IntFree( pBnd-> vSpec2Impl ); Vec_BitFree( pBnd-> vSpec2Impl_phase ); Vec_IntFree( pBnd-> vImpl2Bmiter ); + Vec_IntFree( pBnd-> vSpec2Bmiter ); Vec_IntFree( pBnd->vBI ); Vec_IntFree( pBnd->vBO ); @@ -167,9 +169,6 @@ void Bnd_ManStop() Vec_BitFree( pBnd->vEI_phase ); Vec_BitFree( pBnd->vEO_phase ); - Vec_IntFree( pBnd-> vSpec2Impl_diff ); - Vec_IntFree( pBnd-> vImpl2Spec_diff ); - ABC_FREE( pBnd ); } @@ -235,7 +234,6 @@ void Bnd_ManFinalizeMappings() Vec_Ptr_t* vBmiter2Spec = pBnd -> vBmiter2Spec; Vec_Ptr_t* vBmiter2Impl = pBnd -> vBmiter2Impl; - Vec_Int_t* vSpec2Impl = pBnd -> vSpec2Impl; Vec_Int_t *vSpec, *vImpl; int i, j, id; @@ -249,27 +247,16 @@ void Bnd_ManFinalizeMappings() vSpec = (Vec_Int_t *)Vec_PtrEntry( vBmiter2Spec, i ); vImpl = (Vec_Int_t *)Vec_PtrEntry( vBmiter2Impl, i ); - // create spec2impl - if ( Vec_IntSize(vSpec) != 0 && Vec_IntSize(vImpl) != 0 ) + Vec_IntForEachEntry( vSpec, id, j ) { - Vec_IntForEachEntry( vSpec, id, j ) - { - Vec_IntSetEntry( vSpec2Impl, id, Vec_IntEntry(vImpl, 0) ); - - // record the number of different choice of vEI_impl, vEO_impl - Vec_IntSetEntry( pBnd->vSpec2Impl_diff, id, Vec_IntSize(vImpl)-1 ); - } - - Vec_IntForEachEntry( vImpl, id, j ) - { - // record the number of different choice of vEI_impl, vEO_impl - Vec_IntSetEntry( pBnd->vImpl2Spec_diff, id, Vec_IntSize(vSpec)-1 ); - - // vImpl2Bmiter - Vec_IntSetEntry( pBnd->vImpl2Bmiter, id, i ); - } - + // vSpec2Bmiter + Vec_IntSetEntry( pBnd->vSpec2Bmiter, id, i ); + } + Vec_IntForEachEntry( vImpl, id, j ) + { + // vImpl2Bmiter + Vec_IntSetEntry( pBnd->vImpl2Bmiter, id, i ); } // count number of nodes merged into the same circuit @@ -283,7 +270,6 @@ void Bnd_ManFinalizeMappings() } } - } void Bnd_ManPrintMappings() { @@ -512,7 +498,7 @@ int Bnd_CheckFlagRec( Gia_Man_t *p, Gia_Obj_t *pObj, Vec_Int_t* vFlag ) Synopsis [] - Description [] + Description [check if combnational loop exist in the extended boundary] SideEffects [] @@ -552,14 +538,14 @@ int Bnd_ManCheckExtBound( Gia_Man_t * p, Vec_Int_t *vEI, Vec_Int_t *vEO ) Synopsis [] - Description [] + Description [find the extended boundary in spec + and compute the corresponding boundary in impl] SideEffects [] SeeAlso [] ***********************************************************************/ - void Bnd_ManFindBound( Gia_Man_t * p, Gia_Man_t * pImpl ) { Vec_Int_t *vFlag; @@ -570,7 +556,6 @@ void Bnd_ManFindBound( Gia_Man_t * p, Gia_Man_t * pImpl ) Vec_Int_t *vAI = Vec_IntAlloc(16); Vec_Int_t *vAO = Vec_IntAlloc(16); - Vec_Int_t *vSpec2Impl = pBnd -> vSpec2Impl; Vec_Bit_t *vSpec2Impl_phase = pBnd -> vSpec2Impl_phase; Vec_Int_t *vBI = pBnd -> vBI; Vec_Int_t *vBO = pBnd -> vBO; @@ -607,7 +592,7 @@ void Bnd_ManFindBound( Gia_Man_t * p, Gia_Man_t * pImpl ) // compute EO, travse with flag 1 Vec_IntForEachEntry( vBO, id, i ) { - if ( Vec_IntEntry( vSpec2Impl, id ) == -1 ) // BO not matched + if ( Bnd_ManSpec2ImplNum(id) == 0 ) // BO not matched { Vec_PtrPush( vQ, Gia_ManObj(p, id) ); } @@ -630,7 +615,7 @@ void Bnd_ManFindBound( Gia_Man_t * p, Gia_Man_t * pImpl ) // printf("%d\n", id); - if ( Vec_IntEntry( vSpec2Impl, id ) != -1 ) // matched + if ( Bnd_ManSpec2ImplNum(id) != 0 ) // matched { Vec_IntPush( vEO_spec, id ); Vec_IntPush( vAO, id ); @@ -679,7 +664,7 @@ void Bnd_ManFindBound( Gia_Man_t * p, Gia_Man_t * pImpl ) // add unmatched BI to queue Vec_IntForEachEntry( vBI, id, i ) { - if ( Vec_IntEntry( vSpec2Impl, id ) == -1 ) // BO not matched + if ( Bnd_ManSpec2ImplNum(id) == 0 ) // BO not matched { Vec_PtrPush( vQ, Gia_ManObj(p, id) ); } @@ -715,7 +700,7 @@ void Bnd_ManFindBound( Gia_Man_t * p, Gia_Man_t * pImpl ) // printf("%d\n", id); - if ( Vec_IntEntry(vFlag, id) != 1 && Vec_IntEntry( vSpec2Impl, id ) != -1 ) // matched + if ( Vec_IntEntry(vFlag, id) != 1 && Bnd_ManSpec2ImplNum(id) != 0 ) // matched { Vec_IntPush( vEI_spec, id ); Vec_IntPush( vAI, id ); @@ -738,12 +723,12 @@ void Bnd_ManFindBound( Gia_Man_t * p, Gia_Man_t * pImpl ) // gen vEI_impl, vEO_impl, vEI_phase, vEO_phase Vec_IntForEachEntry( vEI_spec, id, i ) { - Vec_IntPush( vEI_impl, Vec_IntEntry( vSpec2Impl, id ) ); + Vec_IntPush( vEI_impl, Vec_IntEntry( Bnd_ManSpec2Impl(id) , 0 ) ); Vec_BitPush( vEI_phase, Vec_BitEntry( vSpec2Impl_phase, id ) ); } Vec_IntForEachEntry( vEO_spec, id, i ) { - Vec_IntPush( vEO_impl, Vec_IntEntry( vSpec2Impl, id ) ); + Vec_IntPush( vEO_impl, Vec_IntEntry( Bnd_ManSpec2Impl(id), 0 ) ); Vec_BitPush( vEO_phase, Vec_BitEntry( vSpec2Impl_phase, id ) ); } @@ -751,11 +736,11 @@ void Bnd_ManFindBound( Gia_Man_t * p, Gia_Man_t * pImpl ) // count number of choice of boundary Vec_IntForEachEntry( vEO_spec, id, i ) { - pBnd -> nChoice_impl += Vec_IntEntry( pBnd -> vSpec2Impl_diff, id ); + pBnd -> nChoice_impl += Bnd_ManSpec2ImplNum( id ) - 1; } Vec_IntForEachEntry( vEO_impl, id, i ) { - pBnd -> nChoice_spec += Vec_IntEntry( pBnd -> vImpl2Spec_diff, id ); + pBnd -> nChoice_spec += Bnd_ManImpl2SpecNum( id ) - 1; } // print @@ -781,7 +766,6 @@ void Bnd_ManFindBound( Gia_Man_t * p, Gia_Man_t * pImpl ) } - /**Function************************************************************* Synopsis [] @@ -793,7 +777,6 @@ void Bnd_ManFindBound( Gia_Man_t * p, Gia_Man_t * pImpl ) SeeAlso [] ***********************************************************************/ - Gia_Man_t* Bnd_ManCutBoundary( Gia_Man_t *p, Vec_Int_t* vEI, Vec_Int_t* vEO, Vec_Bit_t* vEI_phase, Vec_Bit_t* vEO_phase ) { Gia_Man_t * pNew, * pTemp; @@ -925,6 +908,17 @@ void Bnd_AddNodeRec( Gia_Man_t *p, Gia_Man_t *pNew, Gia_Obj_t *pObj, int fSkipSt } } +/**Function************************************************************* + + Synopsis [] + + Description [perform ECO directly (not used)] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPatch ) { @@ -1051,6 +1045,17 @@ Gia_Man_t* Bnd_ManGenPatched( Gia_Man_t *pOut, Gia_Man_t *pSpec, Gia_Man_t *pPat return pNew; } +/**Function************************************************************* + + Synopsis [] + + Description [recover bounadry] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ Gia_Man_t* Bnd_ManGenPatched1( Gia_Man_t *pOut, Gia_Man_t *pSpec ) { @@ -1136,6 +1141,18 @@ Gia_Man_t* Bnd_ManGenPatched1( Gia_Man_t *pOut, Gia_Man_t *pSpec ) return pNew; } +/**Function************************************************************* + + Synopsis [] + + Description [perform eco with recovered boundary. + bnd_man is not used] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ Gia_Man_t* Bnd_ManGenPatched2( Gia_Man_t *pImpl, Gia_Man_t *pPatch, int fSkipStrash, int fVerbose ) { @@ -1318,12 +1335,36 @@ Gia_Man_t* Bnd_ManStackGias( Gia_Man_t *pSpec, Gia_Man_t *pImpl ) iLit = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) ); } + // miter + // Gia_ManForEachCo( pImpl, pObj, i ) + // { + // iLit = Gia_ManHashXor( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin0Copy(Gia_ManCo(pSpec,i)) ); + // Gia_ManAppendCo( pNew, iLit ); + // } + + Gia_ManHashStop( pNew ); pNew = Gia_ManCleanup( pTemp = pNew ); Gia_ManStop( pTemp ); return pNew; } +int Bnd_ManCheckCoMerged( Gia_Man_t* p ) +{ + int nCO = Gia_ManCoNum(p)/2; + + Gia_Obj_t* pObj1; + Gia_Obj_t* pObj2; + + for ( int i = 0; i < nCO; i++ ) + { + pObj1 = Gia_ManCo(p, i); + pObj2 = Gia_ManCo(p, i + nCO); + if ( Gia_ObjFaninLit0p(p, pObj1) != Gia_ObjFaninLit0p(p, pObj2) ) return 0; + } + return 1; +} + //////////////////////////////////////////////////////////////////////// /// END OF FILE /// diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c index 7084b58975..70b392b3c2 100644 --- a/src/base/abci/abc.c +++ b/src/base/abci/abc.c @@ -52081,6 +52081,7 @@ int Abc_CommandAbc9GenHie( Abc_Frame_t * pAbc, int argc, char ** argv ) Abc_Print( -2, "\t (the PO count of should not be less than the PI count of )\n"); return 1;} +extern Bnd_Man_t* pBnd; /**Function************************************************************* Synopsis [] @@ -52092,8 +52093,6 @@ int Abc_CommandAbc9GenHie( Abc_Frame_t * pAbc, int argc, char ** argv ) SeeAlso [] ***********************************************************************/ - -extern Bnd_Man_t* pBnd; int Abc_CommandAbc9BRecover( Abc_Frame_t * pAbc, int argc, char ** argv ) { extern Gia_Man_t * Cec4_ManSimulateTest( Gia_Man_t * p, Cec_ParFra_t * pPars ); @@ -52102,7 +52101,7 @@ int Abc_CommandAbc9BRecover( Abc_Frame_t * pAbc, int argc, char ** argv ) Gia_Man_t *pSpec, *pImpl_out = 0, *pSpec_out = 0, *pMiter, *pPatched = 0, *pTemp, *pBmiter; char * FileName = NULL; FILE * pFile = NULL; - int c, fVerbose = 0, success = 1; + int c, fVerbose = 0, success = 1, fEq = 1, fEqOut = 1; // params Gps_Par_t Pars, * pPars = &Pars; @@ -52115,7 +52114,7 @@ int Abc_CommandAbc9BRecover( Abc_Frame_t * pAbc, int argc, char ** argv ) // parse options Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "vhCk" ) ) != EOF ) + while ( ( c = Extra_UtilGetopt( argc, argv, "vhCkeo" ) ) != EOF ) { switch ( c ) { @@ -52137,6 +52136,12 @@ int Abc_CommandAbc9BRecover( Abc_Frame_t * pAbc, int argc, char ** argv ) case 'k': pParsFra ->fUseCones ^= 1; break; + case 'e': + fEq ^= 1; + break; + case 'o': + fEqOut ^= 1; + break; case 'h': goto usage; default: @@ -52182,34 +52187,33 @@ int Abc_CommandAbc9BRecover( Abc_Frame_t * pAbc, int argc, char ** argv ) // start boundary manager pBnd = Bnd_ManStart( pSpec, pAbc->pGia, fVerbose ); - // verify if spec eq impl - pMiter = Gia_ManMiter( pAbc->pGia, pSpec, 0, 1, 0, 0, 0 ); - if ( !Cec_ManVerify( pMiter, pParsCec ) ) + // check boundary + if ( 0 == Bnd_ManCheckBound( pSpec, fVerbose ) ) { - Abc_Print( -1, "Abc_CommandAbc9BRecover(): The given spec is not equivalent to current impl.\n" ); + Abc_Print( -1, "Abc_CommandAbc9BRecover(): The given spec has invalid boundary.\n" ); success = 0; } - Gia_ManStop(pMiter); - // check boundary if ( success ) { - if ( 0 == Bnd_ManCheckBound( pSpec, fVerbose ) ) + // create bmiter, run fraig, record mapping + pBmiter = Bnd_ManStackGias( pSpec, pAbc->pGia ); + pTemp = Cec4_ManSimulateTest( pBmiter, pParsFra ); + + // every output should be equivalent + // else, terminate the command (TODO?) + if ( !Bnd_ManCheckCoMerged( pTemp ) ) { - Abc_Print( -1, "Abc_CommandAbc9BRecover(): The given spec has invalid boundary.\n" ); + Abc_Print( -1, "Abc_CommandAbc9BRecover(): The given spec and impl cannot be proved equivalent.\n" ); success = 0; } - } - if ( success ) - { - // create bmiter, run fraig, record mapping - // pBmiter = Gia_ManBoundaryMiter( pSpec, pAbc->pGia, 0 ); - pBmiter = Bnd_ManStackGias( pSpec, pAbc->pGia ); - pTemp = Cec4_ManSimulateTest( pBmiter, pParsFra ); Gia_ManStop(pBmiter); Gia_ManStop(pTemp); + } + if ( success ) + { // find Bnd_ManFindBound( pSpec, pAbc->pGia ); @@ -52223,22 +52227,30 @@ int Abc_CommandAbc9BRecover( Abc_Frame_t * pAbc, int argc, char ** argv ) // Gia_AigerWrite( pImpl_out, "impl_out.aig", 0, 0, 0 ); // Gia_ManPrintStats( pSpec_out, pPars ); // Gia_ManPrintStats( pImpl_out, pPars ); - } - if ( !success ) - { - printf("Abc_CommandAbc9BRecover(): The generated boundary is invalid. The circuit is not changed.\n"); + if ( !success ) + { + printf("Abc_CommandAbc9BRecover(): The generated boundary is invalid. The circuit is not changed.\n"); + } } - else + + if ( success ) { // check if spec_out and imnpl_out are equivalent if ( fVerbose ) { - printf("Checking the equivalence of spec_out and impl_out\n"); - pMiter = Gia_ManMiter( pSpec_out, pImpl_out, 0, 1, 0, 0, 0 ); - Bnd_ManSetEqOut( Cec_ManVerify( pMiter, pParsCec ) ); - Gia_ManStop( pMiter ); + if ( fEqOut ) + { + printf("Checking the equivalence of spec_out and impl_out\n"); + pMiter = Gia_ManMiter( pSpec_out, pImpl_out, 0, 1, 0, 0, 0 ); + Bnd_ManSetEqOut( Cec_ManVerify( pMiter, pParsCec ) ); + Gia_ManStop( pMiter ); + } + else + { + printf("Skip checking the equivalence of spec_out and impl_out\n"); + } } // generate patched impl @@ -52260,15 +52272,22 @@ int Abc_CommandAbc9BRecover( Abc_Frame_t * pAbc, int argc, char ** argv ) // Gia_ManStop( pTemp ); // check if patched is equiv to spec - if ( fVerbose ) printf("Checking the equivalence of patched impl and spec\n"); - pMiter = Gia_ManMiter( pSpec, pPatched, 0, 1, 0, 0, 0 ); - success = Cec_ManVerify( pMiter, pParsCec ); - Bnd_ManSetEqRes( success ); - if ( !success ) + if ( fVerbose ) { - printf("Failed. The generated AIG is not equivalent.\n"); + if ( fEq ) printf("Checking the equivalence of patched impl and spec\n"); + else printf("Skip checking the equivalence of patched impl and spec\n"); + } + if ( fEq ) + { + pMiter = Gia_ManMiter( pSpec, pPatched, 0, 1, 0, 0, 0 ); + success = Cec_ManVerify( pMiter, pParsCec ); + Bnd_ManSetEqRes( success ); + if ( !success ) + { + printf("Failed. The generated AIG is not equivalent.\n"); + } + Gia_ManStop( pMiter ); } - Gia_ManStop( pMiter ); } @@ -52279,7 +52298,8 @@ int Abc_CommandAbc9BRecover( Abc_Frame_t * pAbc, int argc, char ** argv ) if ( pImpl_out ) Gia_ManStop( pImpl_out ); if ( success ) { - printf("Success. The generated hierarchical impl is equivalent. (box size: %d -> %d)\n", Bnd_ManGetNInternal(), Bnd_ManGetNInternal() + Bnd_ManGetNExtra() ); + if ( fEq ) printf("Success. The generated hierarchical impl is equivalent. (box size: %d -> %d)\n", Bnd_ManGetNInternal(), Bnd_ManGetNInternal() + Bnd_ManGetNExtra() ); + else printf("Success. But the equivalence in unknown (box size: %d -> %d)\n", Bnd_ManGetNInternal(), Bnd_ManGetNInternal() + Bnd_ManGetNExtra() ); } if (pPatched) Abc_FrameUpdateGia( pAbc, pPatched ); Bnd_ManStop(); @@ -52291,6 +52311,10 @@ int Abc_CommandAbc9BRecover( Abc_Frame_t * pAbc, int argc, char ** argv ) Abc_Print( -2, "\t recover boundary using SAT-Sweeping\n" ); Abc_Print( -2, "\t-v : toggles printing verbose information [default = %s]\n", fVerbose? "yes": "no" ); Abc_Print( -2, "\t-h : print the command usage\n"); + Abc_Print( -2, "\t-k : toggle using logic cones in the SAT solver [default = %s]\n", pParsFra->fUseCones? "yes": "no" ); + Abc_Print( -2, "\t-C num : the max number of conflicts at a node [default = %d]\n", pParsFra->nBTLimit ); + Abc_Print( -2, "\t-e : toggle checking the equivalence of the result [default = %s]\n", fEq? "yes": "no" ); + Abc_Print( -2, "\t-o : toggle checking the equivalence of the outsides in verbose [default = %s]\n", fEqOut? "yes": "no" ); Abc_Print( -2, "\t : the implementation aig. (should be equivalent to spec)\n"); Abc_Print( -2, "\t : the modified spec. (should be a hierarchical AIG)\n"); return 1; From 210474b08c3e018606f49eef2ae31434937ef78c Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Mon, 18 Mar 2024 07:49:35 +0900 Subject: [PATCH 33/33] Bug fix in &gen_hie. --- src/aig/gia/giaMan.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/aig/gia/giaMan.c b/src/aig/gia/giaMan.c index 288c065363..f2d403ded6 100644 --- a/src/aig/gia/giaMan.c +++ b/src/aig/gia/giaMan.c @@ -2282,6 +2282,8 @@ void Gia_GenSandwich( char ** pFNames, int nFNames, char * pFileName ) fprintf( pFile, "endmodule\n" ); fclose( pFile ); for ( i = 0; i < nFNames; i++ ) { + Vec_PtrFreeFree( pGias[i]->vNamesIn ); pGias[i]->vNamesIn = NULL; + Vec_PtrFreeFree( pGias[i]->vNamesOut ); pGias[i]->vNamesOut = NULL; Gia_ManDumpVerilog( pGias[i], Extra_FileNameGenericAppend(pGias[i]->pSpec, ".v"), NULL, 0, 0, 1, 0, 0 ); printf( "Dumped Verilog file \"%s\"\n", Extra_FileNameGenericAppend(pGias[i]->pSpec, ".v") ); }