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Release v1.4.21 (#528)
* Enable Xilinx 2021.1 tools * Update DCV instructions to 2021.1
1 parent f29834c commit 087fb29

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.gitmodules

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@@ -11,3 +11,6 @@
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[submodule "Vitis/examples/xilinx_2020.2"]
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path = Vitis/examples/xilinx_2020.2
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url = https://github.com/Xilinx/Vitis_Accel_Examples
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[submodule "Vitis/examples/xilinx_2021.1"]
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path = Vitis/examples/xilinx_2021.1
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url = https://github.com/Xilinx/Vitis_Accel_Examples

Jenkinsfile

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Jenkinsfile_int_sims

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@@ -36,12 +36,18 @@ task_label = [
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]
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// Put the latest version last
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def xilinx_versions = [ '2020.2' ]
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def xilinx_versions = [ '2021.1' ]
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// We want the default to be the latest.
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def default_xilinx_version = xilinx_versions.last()
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def simulator_tool_default_map = [
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'2019.1' : [
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'vivado': 'xilinx/SDx/2019.1.op2552052',
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'vcs': 'synopsys/vcs-mx/N-2017.12-SP2',
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'questa': 'questa/10.6c_1',
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'ies': 'incisive/15.20.063'
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],
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'2019.2' : [
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'vivado': 'xilinx/Vivado/2019.2',
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'vcs': 'synopsys/vcs-mx/O-2018.09-SP2-1',
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],
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'2020.2' : [
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'vivado': 'xilinx/Vivado/2020.2',
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'vcs': 'synopsys/vcs/Q-2020.03',
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'questa': 'questa/2019.4_3',
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'vcs': 'synopsys/vcs-mx/Q-2020.03',
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'questa': 'questa/2020.2',
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'ies': 'incisive/15.20.083'
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],
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'2021.1' : [
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'vivado': 'xilinx/Vivado/2021.1',
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'vcs': 'synopsys/vcs/R-2020.12',
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'questa': 'questa/2020.4',
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'ies': 'incisive/15.20.083'
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]
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]

README.md

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@@ -50,17 +50,18 @@ AWS marketplace offers multiple versions of the FPGA Developer AMI. The followin
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| Developer Kit Version | Tool Version Supported | Compatible FPGA Developer AMI Version |
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|-----------|-----------|------|
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| 1.4.21+ | 2021.1 | v1.11.X (Xilinx Vivado/Vitis 2021.1) |
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| 1.4.18+ | 2020.2 | v1.10.X (Xilinx Vivado/Vitis 2020.2) |
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| 1.4.16+ | 2020.1 | v1.9.0-v1.9.X (Xilinx Vivado/Vitis 2020.1) |
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| 1.4.13+ | 2019.2 | v1.8.0-v1.8.X (Xilinx Vivado/Vitis 2019.2) |
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| 1.4.11+ | 2019.1 | v1.7.0-v1.7.X (Xilinx Vivado/SDx 2019.1) |
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| 1.4.8 - 1.4.15a | 2018.3 | v1.6.0-v1.6.X (Xilinx Vivado/SDx 2018.3) |
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| 1.4.3 - 1.4.15a | 2018.2 | v1.5.0-v1.5.X (Xilinx Vivado/SDx 2018.2) |
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| 1.3.7 - 1.4.15a | 2017.4 | v1.4.0-v1.4.X (Xilinx Vivado/SDx 2017.4) |
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| 1.4.8 - 1.4.15b | 2018.3 | v1.6.0-v1.6.X (Xilinx Vivado/SDx 2018.3) |
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| 1.4.3 - 1.4.15b | 2018.2 | v1.5.0-v1.5.X (Xilinx Vivado/SDx 2018.2) |
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| 1.3.7 - 1.4.15b | 2017.4 | v1.4.0-v1.4.X (Xilinx Vivado/SDx 2017.4) |
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⚠️ Developer kit release v1.4.16 will remove support for Xilinx 2017.4, 2018.2, 2018.3 toolsets.
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While developer kit release v1.4.16 onwards will not support older Xilinx tools, you can still use them using HDK releases v1.4.15a or earlier.
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Please checkout [the latest v1.4.15a release tag from Github](https://github.com/aws/aws-fpga/releases/tag/v1.4.15a) to use Xilinx 2017.4, 2018.2, 2018.3 toolsets.
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While developer kit release v1.4.16 onwards will not support older Xilinx tools, you can still use them using HDK releases v1.4.15b or earlier.
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Please checkout [the latest v1.4.15b release tag from Github](https://github.com/aws/aws-fpga/releases/tag/v1.4.15b) to use Xilinx 2017.4, 2018.2, 2018.3 toolsets.
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⚠️ Developer kit versions prior to v1.3.7 and Developer AMI prior to v1.4 (2017.1) reached end-of-life. See [AWS forum announcement](https://forums.aws.amazon.com/ann.jspa?annID=6068) for additional details.
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RELEASE_NOTES.md

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SDAccel/docs/SDAccel_Guide_AWS_F1.md

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@@ -168,7 +168,6 @@ Conversely, code which is simply a few lines of basic operations, and has no tas
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* Xilinx web portal for [Xilinx SDAccel documentation](https://www.xilinx.com/products/design-tools/software-zone/sdaccel.html?resultsTablePreSelect=xlnxdocumenttypes:SeeAll#documentation)
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* [Xilinx SDAccel GitHub repository](https://github.com/Xilinx/SDAccel_Examples)
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* [Xilinx SDAccel landing page](https://www.xilinx.com/products/design-tools/software-zone/sdaccel.html)
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* [Vivado HLS landing page](https://www.xilinx.com/products/design-tools/vivado/integration/esl-design.html)
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* [Vivado landing page](https://www.xilinx.com/products/design-tools/vivado.html)
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* [SDAccel Environment User Guide](https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_4/ug1023-sdaccel-user-guide.pdf)
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* [SDAccel Intro Tutorial](https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_4/ug1021-sdaccel-intro-tutorial.pdf)

Vitis/README.md

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@@ -87,7 +87,7 @@ The instructions below describe how to run the Vitis SW Emulation flow using the
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```
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$ cd $VITIS_DIR/examples/xilinx/hello_world
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$ make clean
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$ make check TARGET=sw_emu DEVICE=$AWS_PLATFORM all
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$ make run TARGET=sw_emu DEVICE=$AWS_PLATFORM all
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```
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For more information on how to debug your application in a SW Emulation environment.
@@ -102,7 +102,7 @@ The instructions below describe how to run the HW Emulation flow using the Makef
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```
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$ cd $VITIS_DIR/examples/xilinx/hello_world
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$ make clean
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$ make check TARGET=hw_emu DEVICE=$AWS_PLATFORM all
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$ make run TARGET=hw_emu DEVICE=$AWS_PLATFORM all
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```
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For more information on how to debug your application in a HW Emulation environment.
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Vitis/Runtime/xrt_common_functions.sh

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export PATH=$PATH:/opt/xilinx/xrt/bin
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export LD_LIBRARY_PATH=$XILINX_XRT/lib:$LD_LIBRARY_PATH
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# copy libstdc++ from $XILINX_VITIS/lib
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if [[ $(lsb_release -si) == "Ubuntu" ]]; then
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sudo cp $XILINX_VITIS/lib/lnx64.o/Ubuntu/libstdc++.so* /opt/xilinx/xrt/lib/
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elif [[ $(lsb_release -si) == "CentOS" ]]; then
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sudo cp $XILINX_VITIS/lib/lnx64.o/Default/libstdc++.so* /opt/xilinx/xrt/lib/
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else
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info_msg "Unsupported OS."
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return 1
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if [[ $RELEASE_VER =~ .*2019\.2.* ]]; then
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# copy libstdc++ from $XILINX_VITIS/lib
107+
if [[ $(lsb_release -si) == "Ubuntu" ]]; then
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sudo cp $XILINX_VITIS/lib/lnx64.o/Ubuntu/libstdc++.so* /opt/xilinx/xrt/lib/
109+
elif [[ $(lsb_release -si) == "CentOS" ]]; then
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sudo cp $XILINX_VITIS/lib/lnx64.o/Default/libstdc++.so* /opt/xilinx/xrt/lib/
111+
elif [[ $(lsb_release -si) == "Amazon" ]]; then
112+
sudo cp /lib64/libstdc++.so* /opt/xilinx/xrt/lib/
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else
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info_msg "Unsupported OS."
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return 1
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fi
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fi
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else # No XRT available
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err_msg "Xilinx XRT runtime not installed - This is required if you are running on an F1 instance."
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# Placeholder for code to download pre-compiled RPM/DEB package and remove above message
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# install_xrt_package <Path to RPM/DEB>
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fi
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}

Vitis/docs/Create_Runtime_AMI.md

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| Vitis Version used for AFI Development | Compatible Xilinx Runtime |
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|--------------------------------------|-----------------------------|
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| 2021.1 | AWS FPGA Developer AMI 1.10.x (XRT is pre-installed) or [XRT](https://xilinx.github.io/XRT/2021.1/html/build.html) |
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| 2020.2 | AWS FPGA Developer AMI 1.10.x (XRT is pre-installed) or [XRT](https://xilinx.github.io/XRT/2020.2/html/build.html) |
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| 2020.1 | AWS FPGA Developer AMI 1.9.x (XRT is pre-installed) or [XRT](https://xilinx.github.io/XRT/2020.1/html/build.html) |
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| 2019.2 | AWS FPGA Developer AMI 1.8.x (XRT is pre-installed) or [XRT](https://xilinx.github.io/XRT/2019.2/html/build.html) |

Vitis/docs/XRT_installation_instructions.md

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| Xilinx Vitis Tool Version | XRT Release Tag | SHA | `xrt` or `xrt-aws` RPM's (Centos/RHEL) |`xrt` or`xrt-aws` RPM's (AL2) |
88
|---|---|---|---|---|
9+
|2021.1| [202110.2.11.634](https://github.com/Xilinx/XRT/releases/tag/202110.2.11.634) | 5ad5998d67080f00bca5bf15b3838cf35e0a7b26 | [xrt_202110.2.11.0_7.9.2009-x86_64-xrt.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.11.0/Patches/XRT_2021_1/xrt_202110.2.11.0_7.9.2009-x86_64-xrt.rpm) [xrt_202110.2.11.0_7.9.2009-x86_64-aws.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.11.0/Patches/XRT_2021_1/xrt_202110.2.11.0_7.9.2009-x86_64-aws.rpm) | [xrt_202110.2.11.0_2-x86_64-xrt.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.11.0/Patches/XRT_2021_1/xrt_202110.2.11.0_2-x86_64-xrt.rpm) [xrt_202110.2.11.0_2-x86_64-aws.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.11.0/Patches/XRT_2021_1/xrt_202110.2.11.0_2-x86_64-aws.rpm)|
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|2020.2| [202020.2.8.743](https://github.com/Xilinx/XRT/releases/tag/202020.2.8.743) | 77d5484b5c4daa691a7f78235053fb036829b1e9 | [xrt_202020.2.8.0_7.9.2009-x86_64-xrt.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.10.0/Patches/XRT_2020_2/xrt_202020.2.8.0_7.9.2009-x86_64-xrt.rpm) [xrt_202020.2.8.0_7.9.2009-x86_64-aws.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.10.0/Patches/XRT_2020_2/xrt_202020.2.8.0_7.9.2009-x86_64-aws.rpm) | [xrt_202020.2.8.0_2-x86_64-xrt.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.10.0/Patches/XRT_2020_2/xrt_202020.2.8.0_2-x86_64-xrt.rpm) [xrt_202020.2.8.0_2-x86_64-aws.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.10.0/Patches/XRT_2020_2/xrt_202020.2.8.0_2-x86_64-aws.rpm)|
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|2020.1| [202010.2.6.AWS](https://github.com/Xilinx/XRT/releases/tag/202010.2.6.AWS) | d09c4a458c16e8d843b3165dcf929c38f7a32b6f | [xrt_202010.2.6.0_7.7.1908-x86_64-xrt.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.9.0/Patches/XRT_2020_1/xrt_202010.2.6.0_7.7.1908-x86_64-xrt.rpm) [xrt_202010.2.6.0_7.7.1908-x86_64-aws.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.9.0/Patches/XRT_2020_1/xrt_202010.2.6.0_7.7.1908-x86_64-aws.rpm) | [xrt_202010.2.6.0_2-x86_64-xrt.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.9.0/Patches/XRT_2020_1/xrt_202010.2.6.0_2-x86_64-xrt.rpm) [xrt_202010.2.6.0_2-x86_64-aws.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.9.0/Patches/XRT_2020_1/xrt_202010.2.6.0_2-x86_64-aws.rpm)|
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|2019.2| [2019.2.0.3](https://github.com/Xilinx/XRT/releases/tag/2019.2.0.3) | 9e13d57c4563e2c19bf5f518993f6e5a8dadc18a | [xrt_201920.2.3.0_7.7.1908-xrt.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.8.0/Patches/XRT_2019_2/xrt_201920.2.3.0_7.7.1908-xrt.rpm) [xrt_201920.2.3.0_7.7.1908-aws.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.8.0/Patches/XRT_2019_2/xrt_201920.2.3.0_7.7.1908-aws.rpm) | N/A |

Vitis/examples/xilinx_2021.1

Submodule xilinx_2021.1 added at f640bc8

Vitis/kernel_version.txt

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3.10.0-1062.4.1.el7.x86_64
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3.10.0-1062.9.1.el7.x86_64
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3.10.0-1127.10.1.el7.x86_64
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3.10.0-1160.31.1.el7.x86_64
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4.14.209-160.339.amzn2.x86_64

Vitis/tests/test_build_vitis_example.py

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check_string = ""
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if check:
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check_string = "check"
105+
if xilinxVersion >= 2019.2:
106+
check_string = "run"
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106108
(rc, stdout_lines, stderr_lines) = self.run_cmd("make {0} TARGET={1} DEVICE={2} all PROFILE=yes".format(check_string, target, os.environ['AWS_PLATFORM']))
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assert rc == 0, "Vitis build failed with rc={}".format(rc)

Vitis/tests/test_find_vitis_examples.py

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ignore = True
8484
logger.info("Ignoring {} as F1 device found in ndevice.".format(root))
8585
continue
86+
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if "platform_blacklist" in description:
88+
if "aws" in description["platform_blacklist"]:
89+
ignore = True
90+
logger.info("Ignoring {} as F1 device found in ndevice.".format(root))
91+
continue
8692
else:
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ignore = True
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logger.warn("Ignoring: {} as no Makefile/description.json exist".format(root))

Vitis/tools/create_vitis_afi.sh

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#STEP 6
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#Create .awsxclbin
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283-
if [ "$RELEASE_VER" == "2020.2" ]
284-
then
283+
284+
if [[ "$RELEASE_VER" == "2020.2" || "$RELEASE_VER" == "2021.1" ]]
285+
then
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/opt/xilinx/xrt/bin/xclbinutil -i $xclbin --remove-section PARTITION_METADATA --replace-section BITSTREAM:RAW:${timestamp}_agfi_id.txt -o ${awsxclbin}.awsxclbin
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else
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/opt/xilinx/xrt/bin/xclbinutil -i $xclbin --remove-section PARTITION_METADATA --remove-section SYSTEM_METADATA --replace-section BITSTREAM:RAW:${timestamp}_agfi_id.txt -o ${awsxclbin}.awsxclbin

Vitis/vitis_xrt_version.txt

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2020.1:12115fd4054cb46a5ade62fafa74c523f59116e6
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2020.1:d09c4a458c16e8d843b3165dcf929c38f7a32b6f
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2020.2:77d5484b5c4daa691a7f78235053fb036829b1e9
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2021.1:5ad5998d67080f00bca5bf15b3838cf35e0a7b26

developer_resources/DCV.md

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1. [Install NICE DCV Server](https://docs.aws.amazon.com/dcv/latest/adminguide/setting-up-installing-linux-server.html)
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```
63-
sudo rpm --import https://s3-eu-west-1.amazonaws.com/nice-dcv-publish/NICE-GPG-KEY
64-
wget https://d1uj6qtbmh3dt5.cloudfront.net/2019.0/Servers/nice-dcv-2019.0-7318-el7.tgz
65-
tar xvf nice-dcv-2019.0-7318-el7.tgz
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cd nice-dcv-2019.0-7318-el7
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sudo yum -y install nice-dcv-server-2019.0.7318-1.el7.x86_64.rpm
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sudo yum -y install nice-xdcv-2019.0.224-1.el7.x86_64.rpm
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sudo rpm --import https://d1uj6qtbmh3dt5.cloudfront.net/NICE-GPG-KEY
64+
wget https://d1uj6qtbmh3dt5.cloudfront.net/2021.1/Servers/nice-dcv-2021.1-10598-el7-x86_64.tgz
65+
tar -xvzf nice-dcv-2021.1-10598-el7-x86_64.tgz && cd nice-dcv-2021.1-10598-el7-x86_64
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sudo yum install nice-dcv-server-2021.1.10598-1.el7.x86_64.rpm
67+
sudo yum install nice-xdcv-2021.1.392-1.el7.x86_64.rpm
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sudo systemctl enable dcvserver
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sudo systemctl start dcvserver

hdk/cl/developer_designs/Starting_Your_Own_CL.md

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<a name="modifyBuildScripts"></a>
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## 3. Modify the build scripts
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49-
The following scripts should be modified before starting the build:
50-
- `/build/constraints/*` to set all the timing, clock and placement constraints.
51-
- `/build/scripts/encrypt.tcl` CL Encryption is required, AFI creation will fail if your CL source files are not encrypted. To enable include the source file names.
52-
- `/build/scripts/create_dcp_from_cl.tcl` to update the final build scripts with right source files and IP.
53-
54-
Once your design is ready and you would like to start the build process, please refer to this [checklist](../CHECKLIST_BEFORE_BUILDING_CL.md).
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56-
Once you verified the checklist, the detailed walkthrough on how to build and submit the CL to AWS is avaiable [here](../../common/shell_v04261818/new_cl_template/build/README.md)
50+
The following scripts should be modified before starting the build:
51+
* `/build/constraints/*`
52+
* This is to set all the timing, clock and placement constraints.
53+
* `/build/scripts/encrypt.tcl`
54+
* CL Encryption is **NOT** required, but encouraged. To enable encryption, include the source file names.
55+
* `/build/scripts/create_dcp_from_cl.tcl`
56+
* This is to update the final build scripts with right source files and IP.
57+
58+
Once your design is ready, please refer to this [checklist](../CHECKLIST_BEFORE_BUILDING_CL.md) before starting the build process.
59+
60+
Once you verified the checklist, the detailed walk through on how to build and submit the CL to AWS is available [here](../../common/shell_v04261818/new_cl_template/build/README.md)
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hdk/cl/examples/cl_dram_dma/verif/scripts/Makefile.vivado

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2020
compile:
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mkdir -p $(SIM_DIR)
22-
cd $(SIM_DIR) && xsc $(C_FILES) --additional_option "-I$(C_SDK_USR_INC_DIR)" --additional_option "-I$(C_SDK_USR_UTILS_DIR)" --additional_option "-I$(C_COMMON_DIR)/include" --additional_option "-I$(C_COMMON_DIR)/src" --additional_option "-I$(C_INC_DIR)" --additional_option "-DVIVADO_SIM" --additional_option "-DSV_TEST" --additional_option "-DDMA_TEST"
22+
cd $(SIM_DIR) && xsc $(C_FILES) --gcc_compile_options "-I$(C_SDK_USR_INC_DIR)" --gcc_compile_options "-I$(C_SDK_USR_UTILS_DIR)" --gcc_compile_options "-I$(C_COMMON_DIR)/include" --gcc_compile_options "-I$(C_COMMON_DIR)/src" --gcc_compile_options "-I$(C_INC_DIR)" --gcc_compile_options "-DVIVADO_SIM" --gcc_compile_options "-DSV_TEST" --gcc_compile_options "-DDMA_TEST"
2323
cd $(SIM_DIR) && xvlog --sv -m64 --define DMA_TEST $(DEFAULT_DEFINES) --initfile $(XILINX_VIVADO)/data/xsim/ip/xsim_ip.ini --work xil_defaultlib --relax -f $(SCRIPTS_DIR)/top.vivado.f
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cd $(SIM_DIR) && xelab -m64 --initfile $(XILINX_VIVADO)/data/xsim/ip/xsim_ip.ini --timescale 1ps/1ps --debug typical --relax --mt 8 -L axi_clock_converter_v2_1_14 -L generic_baseblocks_v2_1_0 -L axi_infrastructure_v1_1_0 -L axi_register_slice_v2_1_15 -L axi_register_slice_v2_1_12 -L fifo_generator_v13_2_1 -L fifo_generator_v13_1_4 -L axi_data_fifo_v2_1_11 -L axi_crossbar_v2_1_13 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm -sv_lib dpi --snapshot tb xil_defaultlib.tb xil_defaultlib.glbl xil_defaultlib.$(TEST)
24+
cd $(SIM_DIR) && xelab -m64 --initfile $(XILINX_VIVADO)/data/xsim/ip/xsim_ip.ini --timescale 1ps/1ps --debug typical --relax --mt 8 -L axi_clock_converter_v2_1_14 -L generic_baseblocks_v2_1_0 -L axi_infrastructure_v1_1_0 -L axi_register_slice_v2_1_15 -L axi_register_slice_v2_1_12 -L fifo_generator_v13_2_1 -L fifo_generator_v13_1_4 -L axi_data_fifo_v2_1_11 -L axi_crossbar_v2_1_13 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm -sv_lib dpi --snapshot tb xil_defaultlib.tb xil_defaultlib.glbl xil_defaultlib.$(TEST)
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run:

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