diff --git a/src/faebryk/library/B0505S_1WR3.py b/src/faebryk/library/B0505S_1WR3.py index 5e93f58d..03d54ee7 100644 --- a/src/faebryk/library/B0505S_1WR3.py +++ b/src/faebryk/library/B0505S_1WR3.py @@ -27,7 +27,13 @@ class B0505S_1WR3(Module): # ---------------------------------------- # traits # ---------------------------------------- - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + @L.rt_field + def bridge(self): + return F.can_bridge_defined(self.power_in, self.power_out) + + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) datasheet = L.f_field(F.has_datasheet_defined)( "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2307211806_EVISUN-B0505S-1WR3_C7465178.pdf" diff --git a/src/faebryk/library/B4B_ZR_SM4_TF.py b/src/faebryk/library/B4B_ZR_SM4_TF.py index b44f6f52..eee664da 100644 --- a/src/faebryk/library/B4B_ZR_SM4_TF.py +++ b/src/faebryk/library/B4B_ZR_SM4_TF.py @@ -13,7 +13,9 @@ class B4B_ZR_SM4_TF(Module): datasheet = L.f_field(F.has_datasheet_defined)( "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2304140030_BOOMELE-Boom-Precision-Elec-1-5-4P_C145997.pdf" ) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("J") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.J + ) @L.rt_field def can_attach_to_footprint(self): diff --git a/src/faebryk/library/BH1750FVI_TR.py b/src/faebryk/library/BH1750FVI_TR.py index 5f723613..e08eb0cc 100644 --- a/src/faebryk/library/BH1750FVI_TR.py +++ b/src/faebryk/library/BH1750FVI_TR.py @@ -82,7 +82,9 @@ def single_electric_reference(self): F.ElectricLogic.connect_all_module_references(self) ) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) @L.rt_field def attach_to_footprint(self): diff --git a/src/faebryk/library/BJT.py b/src/faebryk/library/BJT.py index cf1c603f..03c7dde3 100644 --- a/src/faebryk/library/BJT.py +++ b/src/faebryk/library/BJT.py @@ -29,7 +29,9 @@ class OperationRegion(Enum): base: F.Electrical collector: F.Electrical - designator_prefix = L.f_field(F.has_designator_prefix_defined)("Q") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.Q + ) @rt_field def can_bridge(self): diff --git a/src/faebryk/library/ButtonCell.py b/src/faebryk/library/ButtonCell.py index 4da5e251..30810149 100644 --- a/src/faebryk/library/ButtonCell.py +++ b/src/faebryk/library/ButtonCell.py @@ -57,6 +57,8 @@ class Size(IntEnum): shape: F.TBD[Shape] size: F.TBD[Size] - designator_prefix = L.f_field(F.has_designator_prefix_defined)("B") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.B + ) # TODO merge voltage with material voltage diff --git a/src/faebryk/library/CBM9002A_56ILG.py b/src/faebryk/library/CBM9002A_56ILG.py index df840126..ed9b36a1 100644 --- a/src/faebryk/library/CBM9002A_56ILG.py +++ b/src/faebryk/library/CBM9002A_56ILG.py @@ -39,7 +39,9 @@ class CBM9002A_56ILG(Module): # ---------------------------------------- # traits # ---------------------------------------- - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) datasheet = L.f_field(F.has_datasheet_defined)( "https://corebai.com/Data/corebai/upload/file/20240201/CBM9002A.pdf" ) diff --git a/src/faebryk/library/CH340x.py b/src/faebryk/library/CH340x.py index d159ae4a..2d375d73 100644 --- a/src/faebryk/library/CH340x.py +++ b/src/faebryk/library/CH340x.py @@ -14,10 +14,12 @@ class CH340x(Module): usb: F.USB2_0 uart: F.UART - tnow: F.Electrical + tnow: F.ElectricLogic gpio_power: F.ElectricPower - designator = L.f_field(F.has_designator_prefix_defined)("U") + designator = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) datasheet = L.f_field(F.has_datasheet_defined)( "https://wch-ic.com/downloads/file/79.html" ) diff --git a/src/faebryk/library/CH342F.py b/src/faebryk/library/CH342F.py index 55a9c466..6724aca7 100644 --- a/src/faebryk/library/CH342F.py +++ b/src/faebryk/library/CH342F.py @@ -53,8 +53,8 @@ def can_attach_to_footprint(self): { "1": self.uart[0].uart.ri.signal, "2": self.usb.usb_if.buspower.lv, - "3": self.usb.usb_if.d.p, - "4": self.usb.usb_if.d.n, + "3": self.usb.usb_if.d.p.signal, + "4": self.usb.usb_if.d.n.signal, "5": self.power_io.hv, "6": self.power_3v.hv, "7": self.integrated_regulator.power_in.hv, @@ -102,8 +102,8 @@ def pin_association_heuristic(self): self.uart[1].uart.base_uart.rx.signal: ["RXD1"], self.uart[0].uart.base_uart.tx.signal: ["TXD0"], self.uart[1].uart.base_uart.tx.signal: ["TXD1"], - self.usb.usb_if.d.p: ["UD+"], - self.usb.usb_if.d.n: ["UD-"], + self.usb.usb_if.d.p.signal: ["UD+"], + self.usb.usb_if.d.n.signal: ["UD-"], self.power_3v.hv: ["V3"], self.vbus_detect.signal: ["VBUS"], self.integrated_regulator.power_in.hv: ["VDD5"], diff --git a/src/faebryk/library/CH342K.py b/src/faebryk/library/CH342K.py index 725dccb4..c0b0e0df 100644 --- a/src/faebryk/library/CH342K.py +++ b/src/faebryk/library/CH342K.py @@ -41,8 +41,8 @@ def pin_association_heuristic(self): self.uart_base[0].tx.signal: ["TXD0"], self.uart_base[1].rx.signal: ["RXD1"], self.uart_base[1].tx.signal: ["TXD1"], - self.usb.usb_if.d.p: ["UD+"], - self.usb.usb_if.d.n: ["UD-"], + self.usb.usb_if.d.p.signal: ["UD+"], + self.usb.usb_if.d.n.signal: ["UD-"], self.power_3v.hv: ["V3"], self.integrated_regulator.power_in.hv: ["VDD5"], self.power_io.hv: ["VIO"], diff --git a/src/faebryk/library/CH344.py b/src/faebryk/library/CH344.py index 796fda60..e5d16b3c 100644 --- a/src/faebryk/library/CH344.py +++ b/src/faebryk/library/CH344.py @@ -20,7 +20,7 @@ class CH344(Module): # ---------------------------------------- # modules, interfaces, parameters # ---------------------------------------- - usb: F.USB2_0 # TODO not a full USB, only data bus + usb: F.USB2_0_IF.Data uart = L.list_field(4, F.UART) act: F.ElectricLogic indicator_tx: F.ElectricLogic diff --git a/src/faebryk/library/CH344Q.py b/src/faebryk/library/CH344Q.py index 1a619d7d..fb37187c 100644 --- a/src/faebryk/library/CH344Q.py +++ b/src/faebryk/library/CH344Q.py @@ -118,13 +118,13 @@ def can_attach_to_footprint(self): "34": self.uart[3].dtr.signal, "35": self.power.lv, "36": self.power.hv, - "37": self.uart[3].base_uart.tx, - "38": self.uart[3].base_uart.rx, + "37": self.uart[3].base_uart.tx.signal, + "38": self.uart[3].base_uart.rx.signal, "39": self.uart[0].dtr.signal, "40": self.uart[0].rts.signal, "41": self.uart[0].cts.signal, - "42": self.usb.usb_if.d.n, - "43": self.usb.usb_if.d.p, + "42": self.usb.n, + "43": self.usb.p, "44": self.test.signal, "45": self.uart[3].rts.signal, "46": self.uart[3].cts.signal, diff --git a/src/faebryk/library/CH344Q_ReferenceDesign.py b/src/faebryk/library/CH344Q_ReferenceDesign.py index c9ed22a4..2296cbb7 100644 --- a/src/faebryk/library/CH344Q_ReferenceDesign.py +++ b/src/faebryk/library/CH344Q_ReferenceDesign.py @@ -50,7 +50,7 @@ def __preinit__(self): ) # TODO: per pin self.vbus_fused.connect_via(self.ldo, pwr_3v3) - self.usb.connect(self.usb_uart_converter.usb) + self.usb.usb_if.d.connect(self.usb_uart_converter.usb) self.usb_uart_converter.act.connect(self.led_act.logic_in) self.usb_uart_converter.indicator_rx.connect(self.led_rx.logic_in) @@ -80,10 +80,16 @@ def __preinit__(self): self.oscillator.crystal.frequency_tolerance.merge( F.Range.upper_bound(40 * P.ppm) ) + self.oscillator.crystal.load_capacitance.merge( + F.Range.from_center(8 * P.pF, 10 * P.pF) + ) # TODO: should be property of crystal when picked - self.vbus_fused.max_current.merge(F.Range.lower_bound(500 * P.mA)) + self.usb.usb_if.buspower.max_current.merge( + F.Range.from_center_rel(500 * P.mA, 0.1) + ) self.ldo.output_current.merge(F.Range.lower_bound(500 * P.mA)) + self.ldo.output_voltage.merge(F.Range.from_center_rel(3.3 * P.V, 0.05)) # reset lowpass self.reset_lowpass.response.merge(F.Filter.Response.LOWPASS) diff --git a/src/faebryk/library/Capacitor.py b/src/faebryk/library/Capacitor.py index cd7628df..14107527 100644 --- a/src/faebryk/library/Capacitor.py +++ b/src/faebryk/library/Capacitor.py @@ -31,7 +31,9 @@ class TemperatureCoefficient(IntEnum): temperature_coefficient: F.TBD[TemperatureCoefficient] attach_to_footprint: F.can_attach_to_footprint_symmetrically - designator_prefix = L.f_field(F.has_designator_prefix_defined)("C") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.C + ) @L.rt_field def can_bridge(self): diff --git a/src/faebryk/library/Common_Mode_Filter.py b/src/faebryk/library/Common_Mode_Filter.py index 5f60bbda..21a4ad32 100644 --- a/src/faebryk/library/Common_Mode_Filter.py +++ b/src/faebryk/library/Common_Mode_Filter.py @@ -14,4 +14,6 @@ class Common_Mode_Filter(Module): c_a = L.list_field(2, F.Electrical) c_b = L.list_field(2, F.Electrical) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("FL") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.FL + ) diff --git a/src/faebryk/library/Comparator.py b/src/faebryk/library/Comparator.py index e919c039..b8f25f9d 100644 --- a/src/faebryk/library/Comparator.py +++ b/src/faebryk/library/Comparator.py @@ -50,4 +50,6 @@ def simple_value_representation(self): ), ) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) diff --git a/src/faebryk/library/Crystal.py b/src/faebryk/library/Crystal.py index 9485c02d..96f56058 100644 --- a/src/faebryk/library/Crystal.py +++ b/src/faebryk/library/Crystal.py @@ -28,7 +28,9 @@ class Crystal(Module): # ---------------------------------------- # traits # ---------------------------------------- - designator = L.f_field(F.has_designator_prefix_defined)("XTAL") + designator = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.XTAL + ) footprint: F.can_attach_to_footprint_symmetrically # ---------------------------------------- diff --git a/src/faebryk/library/DE9Connector.py b/src/faebryk/library/DE9Connector.py index ae37c19a..2426086a 100644 --- a/src/faebryk/library/DE9Connector.py +++ b/src/faebryk/library/DE9Connector.py @@ -29,6 +29,26 @@ class DE9Connector(Module): F.has_designator_prefix.Prefix.X ) + @L.rt_field + def pin_association_heuristic(self): + return F.has_pin_association_heuristic_lookup_table( + mapping={ + self.shield: ["MH1"], + self.shield: ["MH2"], + self.contact[0]: ["1"], + self.contact[1]: ["2"], + self.contact[2]: ["3"], + self.contact[3]: ["4"], + self.contact[4]: ["5"], + self.contact[5]: ["6"], + self.contact[6]: ["7"], + self.contact[7]: ["8"], + self.contact[8]: ["9"], + }, + accept_prefix=False, + case_sensitive=False, + ) + @L.rt_field def can_attach_to_footprint(self): pinmap = {f"{i+1}": ei for i, ei in enumerate(self.contact)} diff --git a/src/faebryk/library/DifferentialPair.py b/src/faebryk/library/DifferentialPair.py index bf6af8bf..668cbe1b 100644 --- a/src/faebryk/library/DifferentialPair.py +++ b/src/faebryk/library/DifferentialPair.py @@ -9,8 +9,8 @@ class DifferentialPair(ModuleInterface): - p: F.Electrical - n: F.Electrical + p: F.SignalElectrical + n: F.SignalElectrical impedance: F.TBD[Quantity] @@ -20,8 +20,8 @@ def terminated(self) -> Self: for r in rs: r.resistance.merge(self.impedance) - terminated_bus.p.connect_via(rs[0], self.p) - terminated_bus.n.connect_via(rs[1], self.n) + terminated_bus.p.signal.connect_via(rs[0], self.p.signal) + terminated_bus.n.signal.connect_via(rs[1], self.n.signal) self.connect_shallow(terminated_bus) return terminated_bus diff --git a/src/faebryk/library/Diode.py b/src/faebryk/library/Diode.py index abe53a88..9342d5cd 100644 --- a/src/faebryk/library/Diode.py +++ b/src/faebryk/library/Diode.py @@ -29,7 +29,9 @@ def simple_value_representation(self): lambda p: p.as_unit("V"), ) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("D") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.D + ) @L.rt_field def pin_association_heuristic(self): diff --git a/src/faebryk/library/Diodes_Incorporated_AP2552W6_7.py b/src/faebryk/library/Diodes_Incorporated_AP2552W6_7.py index 3cfebbab..e770e0c0 100644 --- a/src/faebryk/library/Diodes_Incorporated_AP2552W6_7.py +++ b/src/faebryk/library/Diodes_Incorporated_AP2552W6_7.py @@ -63,7 +63,9 @@ def set_current_limit(self, current: Parameter[Quantity]) -> None: # ---------------------------------------- # traits # ---------------------------------------- - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) descriptive_properties = L.f_field(F.has_descriptive_properties_defined)( { DescriptiveProperties.manufacturer: "Diodes Incorporated", @@ -122,8 +124,10 @@ def __preinit__(self): # ------------------------------------ # connections # ------------------------------------ - F.ElectricLogic.connect_all_module_references(self, exclude={self.power_out}) - + F.ElectricLogic.connect_all_module_references(self, gnd_only=True) + F.ElectricLogic.connect_all_module_references( + self, exclude={self.power_in, self.power_out, self.ilim} + ) # ------------------------------------ # parametrization # ------------------------------------ diff --git a/src/faebryk/library/EEPROM.py b/src/faebryk/library/EEPROM.py index a14f0e26..e89b050f 100644 --- a/src/faebryk/library/EEPROM.py +++ b/src/faebryk/library/EEPROM.py @@ -36,7 +36,9 @@ def set_address(self, addr: int): # traits # ---------------------------------------- - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) @L.rt_field def single_electric_reference(self): diff --git a/src/faebryk/library/ESP32_C3.py b/src/faebryk/library/ESP32_C3.py index 5213e3f5..4355b52d 100644 --- a/src/faebryk/library/ESP32_C3.py +++ b/src/faebryk/library/ESP32_C3.py @@ -30,7 +30,9 @@ class ESP32_C3(Module): uart = L.list_field(2, F.UART_Base) # ... etc - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) datasheet = L.f_field(F.has_datasheet_defined)( "https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf" ) diff --git a/src/faebryk/library/ESP32_C3_MINI_1.py b/src/faebryk/library/ESP32_C3_MINI_1.py index 77d4b8a9..0b4000bb 100644 --- a/src/faebryk/library/ESP32_C3_MINI_1.py +++ b/src/faebryk/library/ESP32_C3_MINI_1.py @@ -132,7 +132,9 @@ def attach_to_footprint(self): return F.can_attach_to_footprint_via_pinmap(self.pinmap) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) datasheet = L.f_field(F.has_datasheet_defined)( "https://www.espressif.com/sites/default/files/documentation/esp32-c3-mini-1_datasheet_en.pdf" ) diff --git a/src/faebryk/library/ESP32_C3_MINI_1_ReferenceDesign.py b/src/faebryk/library/ESP32_C3_MINI_1_ReferenceDesign.py index 32158062..fcc1ff14 100644 --- a/src/faebryk/library/ESP32_C3_MINI_1_ReferenceDesign.py +++ b/src/faebryk/library/ESP32_C3_MINI_1_ReferenceDesign.py @@ -59,8 +59,8 @@ def __preinit__(self): # TODO: set the following in the pinmux # jtag gpio 4,5,6,7 - esp32c3.usb.usb_if.d.n.connect(esp32c3.gpio[18].signal) - esp32c3.usb.usb_if.d.p.connect(esp32c3.gpio[19].signal) + esp32c3.usb.usb_if.d.n.signal.connect(esp32c3.gpio[18].signal) + esp32c3.usb.usb_if.d.p.signal.connect(esp32c3.gpio[19].signal) # UART0 gpio 30/31 (default) esp32c3.uart[0].rx.connect(esp32c3.gpio[20]) esp32c3.uart[0].tx.connect(esp32c3.gpio[21]) diff --git a/src/faebryk/library/ElectricPower.py b/src/faebryk/library/ElectricPower.py index d8b4dfad..f8f03927 100644 --- a/src/faebryk/library/ElectricPower.py +++ b/src/faebryk/library/ElectricPower.py @@ -73,7 +73,7 @@ def fused(self, attach_to: Node | None = None): self.connect_shallow(fused_power) - fuse.trip_current.merge(F.Range(0 * P.A, self.max_current)) + fuse.trip_current.merge(F.Constant(self.max_current)) # fused_power.max_current.merge(F.Range(0 * P.A, fuse.trip_current)) if attach_to is not None: diff --git a/src/faebryk/library/Fuse.py b/src/faebryk/library/Fuse.py index 27cbd851..8a957956 100644 --- a/src/faebryk/library/Fuse.py +++ b/src/faebryk/library/Fuse.py @@ -32,4 +32,6 @@ class ResponseType(Enum): def can_bridge(self): return F.can_bridge_defined(self.unnamed[0], self.unnamed[1]) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("F") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.F + ) diff --git a/src/faebryk/library/GDT.py b/src/faebryk/library/GDT.py index 249be751..46149b66 100644 --- a/src/faebryk/library/GDT.py +++ b/src/faebryk/library/GDT.py @@ -23,4 +23,6 @@ class GDT(Module): def can_bridge(self): return F.can_bridge_defined(self.tube_1, self.tube_2) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("GDT") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.GDT + ) diff --git a/src/faebryk/library/HLK_LD2410B_P.py b/src/faebryk/library/HLK_LD2410B_P.py index 7fb8c522..88e7c620 100644 --- a/src/faebryk/library/HLK_LD2410B_P.py +++ b/src/faebryk/library/HLK_LD2410B_P.py @@ -86,7 +86,9 @@ def single_electric_reference(self): F.ElectricLogic.connect_all_module_references(self, gnd_only=True) ) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) datasheet = L.f_field(F.has_datasheet_defined)( "https://datasheet.lcsc.com/lcsc/2209271801_HI-LINK-HLK-LD2410B-P_C5183132.pdf" diff --git a/src/faebryk/library/Header.py b/src/faebryk/library/Header.py index 12e4f4ce..18f45a06 100644 --- a/src/faebryk/library/Header.py +++ b/src/faebryk/library/Header.py @@ -30,12 +30,12 @@ def __init__( vertical_pin_count: int, ) -> None: super().__init__() - self.horizontal_pin_count = horizonal_pin_count - self.vertical_pin_count = vertical_pin_count + self._horizontal_pin_count = horizonal_pin_count + self._vertical_pin_count = vertical_pin_count def __preinit__(self): - self.pin_count_horizonal.merge(self.horizontal_pin_count) - self.pin_count_vertical.merge(self.vertical_pin_count) + self.pin_count_horizonal.merge(self._horizontal_pin_count) + self.pin_count_vertical.merge(self._vertical_pin_count) pin_pitch: F.TBD[Quantity] pin_type: F.TBD[PinType] @@ -47,6 +47,10 @@ def __preinit__(self): @L.rt_field def unnamed(self): - return times(self.horizonal_pin_count * self.vertical_pin_count, F.Electrical) + return times( + self._horizontal_pin_count * self._vertical_pin_count, F.Electrical + ) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("J") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.J + ) diff --git a/src/faebryk/library/INA228.py b/src/faebryk/library/INA228.py index f3774a0c..cfb19ac1 100644 --- a/src/faebryk/library/INA228.py +++ b/src/faebryk/library/INA228.py @@ -76,6 +76,10 @@ def set_address(self, address: int = 0x00) -> None: } ) + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) + @L.rt_field def pin_association_heuristic(self): return F.has_pin_association_heuristic_lookup_table( @@ -84,8 +88,8 @@ def pin_association_heuristic(self): self.address_config_pin[1].signal: ["A1"], self.alert.signal: ["ALERT"], self.power.lv: ["GND"], - self.shunt_input.p: ["IN+"], - self.shunt_input.n: ["IN–"], + self.shunt_input.p.signal: ["IN+"], + self.shunt_input.n.signal: ["IN–"], self.i2c.scl.signal: ["SCL"], self.i2c.sda.signal: ["SDA"], self.bus_voltage_sense.signal: ["VBUS"], @@ -99,7 +103,9 @@ def __preinit__(self): # ------------------------------------ # connections # ------------------------------------ - F.ElectricLogic.connect_all_module_references(self, exclude={self.shunt_input}) + F.ElectricLogic.connect_all_module_references( + self, exclude={self.shunt_input, self.bus_voltage_sense} + ) # ------------------------------------ # parametrization diff --git a/src/faebryk/library/INA228_ReferenceDesign.py b/src/faebryk/library/INA228_ReferenceDesign.py index eb57c50b..8f2c1570 100644 --- a/src/faebryk/library/INA228_ReferenceDesign.py +++ b/src/faebryk/library/INA228_ReferenceDesign.py @@ -25,7 +25,7 @@ class ShuntedElectricPower(Module): @L.rt_field def can_bridge(self): - (F.can_bridge_defined(self.power_in, self.power_out)) + return F.can_bridge_defined(self.power_in, self.power_out) def __init__(self, lowside: bool = False, filtered: bool = False): super().__init__() @@ -33,15 +33,28 @@ def __init__(self, lowside: bool = False, filtered: bool = False): self._filtered = filtered def __preinit__(self): + self.power_in.voltage.merge( + self.power_out.voltage + ) # TODO: minus voltagedrop over shunt self.shunt_sense.p.connect_via(self.shunt, self.shunt_sense.n) if self._lowside: self.power_in.hv.connect_via(self.shunt, self.power_out.hv) self.power_in.lv.connect(self.power_out.lv) else: - self.power_in.lv.connect_via(self.shunt, self.power_out.lv) + # TODO:short? self.power_in.lv.connect_via(self.shunt, self.power_out.lv self.power_in.hv.connect(self.power_out.hv) - # TODO: add filtered option + if self._filtered: + raise NotImplementedError + # TODO: add filter + # filter_cap = self.add(F.Capacitor()) + # filter_resistors = L.list_field(2, F.Resistor) + # + # filter_cap.capacitance.merge(F.Range.from_center_rel(0.1 * P.uF, 0.01)) + # filter_cap.rated_voltage.merge(F.Range.from_center_rel(170 * P.V, 0.01) + # for res in filter_resistors: + # res.resistance.merge(10 * P.kohm) + # TODO: auto calculate, see: https://www.ti.com/lit/ug/tidu473/tidu473.pdf # ---------------------------------------- # modules, interfaces, parameters @@ -68,34 +81,19 @@ def __preinit__(self): # parametrization # ---------------------------------------- shunted_power = self.add( - L.f_field(self.ShuntedElectricPower)( - lowside=self._lowside, filtered=self._filtered - ) + self.ShuntedElectricPower(lowside=self._lowside, filtered=self._filtered) ) shunted_power.shunt.resistance.merge(F.Range.from_center_rel(15 * P.mohm, 0.01)) shunted_power.shunt.rated_power.merge(F.Range.from_center_rel(2 * P.W, 0.01)) # TODO: calculate according to datasheet p36 - # TODO: add filtered option - # if self._filtered: - # filter_cap = self.add(F.Capacitor()) - # filter_resistors = L.list_field(2, F.Resistor) - # - # filter_cap.capacitance.merge(F.Range.from_center_rel(0.1 * P.uF, 0.01)) - # filter_cap.rated_voltage.merge(F.Range.from_center_rel(170 * P.V, 0.01)) - # for res in filter_resistors: - # res.resistance.merge(10 * P.kohm) - # TODO: auto calculate, see: https://www.ti.com/lit/ug/tidu473/tidu473.pdf - # ---------------------------------------- # connections # ---------------------------------------- F.ElectricLogic.connect_all_module_references(self, gnd_only=True) self.power_load.connect_via(shunted_power, self.power_source) - self.ina288.bus_voltage_sense.signal.connect( - self.power_load.hv if self._lowside else self.power_load.lv - ) + self.ina288.bus_voltage_sense.signal.connect(self.power_load.hv) self.ina288.shunt_input.connect(shunted_power.shunt_sense) diff --git a/src/faebryk/library/ISO1540.py b/src/faebryk/library/ISO1540.py index d86d2416..8c235f41 100644 --- a/src/faebryk/library/ISO1540.py +++ b/src/faebryk/library/ISO1540.py @@ -22,6 +22,12 @@ class I2CandPower(ModuleInterface): i2c: F.I2C power: F.ElectricPower + @L.rt_field + def single_electric_reference(self): + return F.has_single_electric_reference_defined( + F.ElectricLogic.connect_all_module_references(self) + ) + # ---------------------------------------- # modules, interfaces, parameters # ---------------------------------------- @@ -31,6 +37,10 @@ class I2CandPower(ModuleInterface): # ---------------------------------------- # traits # ---------------------------------------- + @L.rt_field + def bridge(self): + return F.can_bridge_defined(self.non_iso.i2c, self.iso.i2c) + designator_prefix = L.f_field(F.has_designator_prefix_defined)( F.has_designator_prefix.Prefix.U ) diff --git a/src/faebryk/library/Inductor.py b/src/faebryk/library/Inductor.py index af9ab3c9..9120dc78 100644 --- a/src/faebryk/library/Inductor.py +++ b/src/faebryk/library/Inductor.py @@ -44,4 +44,6 @@ def simple_value_representation(self): ), ) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("L") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.L + ) diff --git a/src/faebryk/library/LDO.py b/src/faebryk/library/LDO.py index a09d7646..150ecabb 100644 --- a/src/faebryk/library/LDO.py +++ b/src/faebryk/library/LDO.py @@ -8,10 +8,14 @@ from faebryk.core.module import Module from faebryk.libs.library import L from faebryk.libs.units import P, Quantity -from faebryk.libs.util import join_if_non_empty +from faebryk.libs.util import assert_once, join_if_non_empty class LDO(Module): + @assert_once + def enable_output(self): + self.enable.set(True) + class OutputType(Enum): FIXED = auto() ADJUSTABLE = auto() @@ -44,9 +48,10 @@ def __preinit__(self): # else: # self.power_in.lv.connect(self.power_out.lv) - # LDO in & out share gnd reference - F.ElectricLogic.connect_all_node_references( - [self.power_in, self.power_out], gnd_only=True + @L.rt_field + def single_electric_reference(self): + return F.has_single_electric_reference_defined( + F.ElectricLogic.connect_all_module_references(self, gnd_only=True) ) @L.rt_field @@ -85,7 +90,9 @@ def simple_value_representation(self): ), ) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) @L.rt_field def pin_association_heuristic(self): diff --git a/src/faebryk/library/Logic74xx.py b/src/faebryk/library/Logic74xx.py index 7dcb0e52..6cf3250f 100644 --- a/src/faebryk/library/Logic74xx.py +++ b/src/faebryk/library/Logic74xx.py @@ -52,7 +52,9 @@ class Family(Enum): power: F.ElectricPower logic_family: F.TBD[Family] - designator = L.f_field(F.has_designator_prefix_defined)("U") + designator = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) @L.rt_field def single_electric_reference(self): diff --git a/src/faebryk/library/M24C08_FMN6TP.py b/src/faebryk/library/M24C08_FMN6TP.py index 5cb31235..800439b6 100644 --- a/src/faebryk/library/M24C08_FMN6TP.py +++ b/src/faebryk/library/M24C08_FMN6TP.py @@ -16,26 +16,28 @@ class M24C08_FMN6TP(Module): power: F.ElectricPower data: F.I2C - nwc: F.ElectricLogic - e = L.list_field(3, F.ElectricLogic) + write_protect: F.ElectricLogic + address_pin = L.list_field(3, F.ElectricLogic) @L.rt_field def attach_to_footprint(self): x = self return F.can_attach_to_footprint_via_pinmap( { - "1": x.e[0].signal, - "2": x.e[1].signal, - "3": x.e[2].signal, + "1": x.address_pin[0].signal, + "2": x.address_pin[1].signal, + "3": x.address_pin[2].signal, "4": x.power.lv, "5": x.data.sda.signal, "6": x.data.scl.signal, - "7": x.nwc.signal, + "7": x.write_protect.signal, "8": x.power.hv, } ) def __preinit__(self): + F.ElectricLogic.connect_all_module_references(self) + self.attach_to_footprint.attach( F.SOIC(8, size_xy=(3.9 * P.mm, 4.9 * P.mm), pitch=1.27 * P.mm) ) @@ -54,18 +56,20 @@ def __preinit__(self): ) ) - @L.rt_field - def single_electric_reference(self): - return F.has_single_electric_reference_defined( - F.ElectricLogic.connect_all_module_references(self) - ) + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + def enable_write_protection(self, protect=True): + if protect: + self.write_protect.get_trait(F.ElectricLogic.can_be_pulled).pull(up=True) + return + self.write_protect.get_trait(F.ElectricLogic.can_be_pulled).pull(up=False) def set_address(self, addr: int): - assert addr < (1 << len(self.e)) + assert addr < (1 << len(self.address_pin)) - for i, e in enumerate(self.e): + for i, e in enumerate(self.address_pin): e.set(addr & (1 << i) != 0) datasheet = L.f_field(F.has_datasheet_defined)( diff --git a/src/faebryk/library/MCP2221A.py b/src/faebryk/library/MCP2221A.py index 349ff3e4..ba8f9a2c 100644 --- a/src/faebryk/library/MCP2221A.py +++ b/src/faebryk/library/MCP2221A.py @@ -24,4 +24,6 @@ def __preinit__(self): self.power_vusb.decoupled.decouple() self.power.lv.connect(self.power_vusb.lv) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) diff --git a/src/faebryk/library/ME6211C33M5G_N.py b/src/faebryk/library/ME6211C33M5G_N.py index 3c51aa11..59d4bf5b 100644 --- a/src/faebryk/library/ME6211C33M5G_N.py +++ b/src/faebryk/library/ME6211C33M5G_N.py @@ -24,7 +24,9 @@ def __preinit__(self): if self._default_enabled: self.enable.set(True) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) @L.rt_field def attach_to_footprint(self): diff --git a/src/faebryk/library/MOSFET.py b/src/faebryk/library/MOSFET.py index 48e293ac..250c54b4 100644 --- a/src/faebryk/library/MOSFET.py +++ b/src/faebryk/library/MOSFET.py @@ -29,7 +29,9 @@ class SaturationType(Enum): gate: F.Electrical drain: F.Electrical - designator_prefix = L.f_field(F.has_designator_prefix_defined)("Q") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.Q + ) # TODO pretty confusing @L.rt_field diff --git a/src/faebryk/library/Mounting_Hole.py b/src/faebryk/library/Mounting_Hole.py index d73074f3..ff40bfb2 100644 --- a/src/faebryk/library/Mounting_Hole.py +++ b/src/faebryk/library/Mounting_Hole.py @@ -22,7 +22,9 @@ class PadType(StrEnum): Pad_Via = "Pad_Via" attach_to_footprint: F.can_attach_to_footprint_symmetrically - designator_prefix = L.f_field(F.has_designator_prefix_defined)("H") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.H + ) def __init__(self, diameter: Iso262_MetricScrewThreadSizes, pad_type: PadType): super().__init__() diff --git a/src/faebryk/library/OLED_Module.py b/src/faebryk/library/OLED_Module.py index 9357164b..b7590a4a 100644 --- a/src/faebryk/library/OLED_Module.py +++ b/src/faebryk/library/OLED_Module.py @@ -48,4 +48,6 @@ def __preinit__(self): F.Range(100 * P.uF, 220 * P.uF) ) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("OLED") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.DS + ) diff --git a/src/faebryk/library/OpAmp.py b/src/faebryk/library/OpAmp.py index 06a060cb..8b9bb054 100644 --- a/src/faebryk/library/OpAmp.py +++ b/src/faebryk/library/OpAmp.py @@ -66,4 +66,6 @@ def pin_association_heuristic(self): case_sensitive=False, ) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) diff --git a/src/faebryk/library/PJ398SM.py b/src/faebryk/library/PJ398SM.py index e1e80c93..5f1353b8 100644 --- a/src/faebryk/library/PJ398SM.py +++ b/src/faebryk/library/PJ398SM.py @@ -11,4 +11,6 @@ class PJ398SM(Module): sleeve: F.Electrical switch: F.Electrical - designator_prefix = L.f_field(F.has_designator_prefix_defined)("J") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.J + ) diff --git a/src/faebryk/library/QWIIC.py b/src/faebryk/library/QWIIC.py deleted file mode 100644 index ea476f4c..00000000 --- a/src/faebryk/library/QWIIC.py +++ /dev/null @@ -1,27 +0,0 @@ -# This file is part of the faebryk project -# SPDX-License-Identifier: MIT - -import faebryk.library._F as F -from faebryk.core.module import Module -from faebryk.libs.library import L -from faebryk.libs.units import P - - -class QWIIC(Module): - """ - Sparkfun QWIIC connection spec. Also compatible with Adafruits STEMMA QT. - Delivers 3.3V power + F.I2C over JST SH 1mm pitch 4 pin connectors - """ - - # interfaces - i2c: F.I2C - power: F.ElectricPower - - def __preinit__(self): - # set constraints - self.power.voltage.merge(F.Range.from_center_rel(3.3 * P.V, 0.05)) - # TODO: self.power.source_current.merge(F.Constant(226 * P.mA)) - - designator_prefix = L.f_field(F.has_designator_prefix_defined)("J") - - datasheet = L.f_field(F.has_datasheet_defined)("https://www.sparkfun.com/qwiic") diff --git a/src/faebryk/library/QWIIC_Connector.py b/src/faebryk/library/QWIIC_Connector.py index 644de83f..ea62562e 100644 --- a/src/faebryk/library/QWIIC_Connector.py +++ b/src/faebryk/library/QWIIC_Connector.py @@ -6,12 +6,59 @@ import faebryk.library._F as F from faebryk.core.module import Module from faebryk.libs.library import L +from faebryk.libs.picker.picker import DescriptiveProperties +from faebryk.libs.units import P logger = logging.getLogger(__name__) class QWIIC_Connector(Module): + """ + SparkFun's Qwiic Connect System uses 4-pin JST connectors to quickly interface + development boards with sensors, LCDs, relays and more via I2C. + 1x4P 4P JST SH 1mm pitch horizontal mount + """ + power: F.ElectricPower i2c: F.I2C - designator_prefix = L.f_field(F.has_designator_prefix_defined)("J") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.X + ) + descriptive_properties = L.f_field(F.has_descriptive_properties_defined)( + { + DescriptiveProperties.manufacturer: "JST Sales America", + DescriptiveProperties.partno: "SM04B-SRSS-TB(LF)(SN)", + } + ) + datasheet = L.f_field(F.has_datasheet_defined)("https://www.sparkfun.com/qwiic") + + @L.rt_field + def pin_association_heuristic(self): + return F.has_pin_association_heuristic_lookup_table( + mapping={ + self.power.lv: ["1"], + self.power.lv: ["2"], + self.i2c.sda.signal: ["3"], + self.i2c.scl.signal: ["4"], + # n.c. ["5"], + # n.c. ["6"], + }, + accept_prefix=False, + case_sensitive=False, + ) + + @L.rt_field + def can_attach_to_footprint(self): + return F.can_attach_to_footprint_via_pinmap( + { + "1": self.power.lv, + "2": self.power.hv, + "3": self.i2c.sda.signal, + "4": self.i2c.scl.signal, + } + ) + + def __preinit__(self): + self.power.voltage.merge(F.Range.from_center(3.3 * P.V, 0.3 * P.V)) + self.power.max_current.merge(F.Range.from_center_rel(226 * P.mA, 0.05)) diff --git a/src/faebryk/library/RJ45_Receptacle.py b/src/faebryk/library/RJ45_Receptacle.py index fe311f50..84c3f74d 100644 --- a/src/faebryk/library/RJ45_Receptacle.py +++ b/src/faebryk/library/RJ45_Receptacle.py @@ -18,5 +18,7 @@ class Mounting(Enum): pin = L.list_field(8, F.Electrical) shield: F.Electrical - designator_prefix = L.f_field(F.has_designator_prefix_defined)("J") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.J + ) mounting: F.TBD[Mounting] diff --git a/src/faebryk/library/RP2040.py b/src/faebryk/library/RP2040.py index 88f83e0d..d1dd7323 100644 --- a/src/faebryk/library/RP2040.py +++ b/src/faebryk/library/RP2040.py @@ -147,7 +147,9 @@ def pinmux(self): def decoupled(self): return F.can_be_decoupled_rails(self.power_io, self.power_core) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) datasheet = L.f_field(F.has_datasheet_defined)( "https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf" ) diff --git a/src/faebryk/library/RS485_Bus_Protection.py b/src/faebryk/library/RS485_Bus_Protection.py index 20c3d72d..2c8a4e78 100644 --- a/src/faebryk/library/RS485_Bus_Protection.py +++ b/src/faebryk/library/RS485_Bus_Protection.py @@ -122,10 +122,10 @@ def __preinit__(self): polarization_resistors[1].resistance.merge( F.Range(380 * P.ohm, 420 * P.ohm) ) - self.rs485_in.diff_pair.p.connect_via( + self.rs485_in.diff_pair.p.signal.connect_via( polarization_resistors[0], self.power.hv ) - self.rs485_in.diff_pair.n.connect_via( + self.rs485_in.diff_pair.n.signal.connect_via( polarization_resistors[1], self.power.lv ) @@ -162,19 +162,21 @@ def __preinit__(self): self.gdt.common.connect(self.earth) # rs485_in connections - self.rs485_in.diff_pair.n.connect(self.common_mode_filter.c_a[0]) - self.rs485_in.diff_pair.p.connect(self.common_mode_filter.c_b[0]) + self.rs485_in.diff_pair.n.signal.connect(self.common_mode_filter.c_a[0]) + self.rs485_in.diff_pair.p.signal.connect(self.common_mode_filter.c_b[0]) # rs485_out connections self.common_mode_filter.c_a[1].connect_via( self.current_limmiter_resistors[0], - self.rs485_out.diff_pair.n, + self.rs485_out.diff_pair.n.signal, ) self.common_mode_filter.c_b[1].connect_via( self.current_limmiter_resistors[1], - self.rs485_out.diff_pair.p, + self.rs485_out.diff_pair.p.signal, + ) + self.rs485_out.diff_pair.n.signal.connect_via( + self.gdt, self.rs485_out.diff_pair.p.signal ) - self.rs485_out.diff_pair.n.connect_via(self.gdt, self.rs485_out.diff_pair.p) # tvs connections # TODO: fix this, super ugly.... diff --git a/src/faebryk/library/Relay.py b/src/faebryk/library/Relay.py index 6661a18e..d0996add 100644 --- a/src/faebryk/library/Relay.py +++ b/src/faebryk/library/Relay.py @@ -29,4 +29,6 @@ class Relay(Module): contact_rated_switching_current: F.TBD[Quantity] contact_max_switchng_current: F.TBD[Quantity] - designator_prefix = L.f_field(F.has_designator_prefix_defined)("RELAY") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.K + ) diff --git a/src/faebryk/library/Resistor.py b/src/faebryk/library/Resistor.py index 6e529d2f..31f00cf3 100644 --- a/src/faebryk/library/Resistor.py +++ b/src/faebryk/library/Resistor.py @@ -20,7 +20,9 @@ class Resistor(Module): rated_voltage: F.TBD[Quantity] attach_to_footprint: F.can_attach_to_footprint_symmetrically - designator_prefix = L.f_field(F.has_designator_prefix_defined)("R") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.R + ) @L.rt_field def can_bridge(self): diff --git a/src/faebryk/library/SCD40.py b/src/faebryk/library/SCD40.py index a2ca5208..17f2c5c7 100644 --- a/src/faebryk/library/SCD40.py +++ b/src/faebryk/library/SCD40.py @@ -78,7 +78,9 @@ def __preinit__(self): F.I2C.define_max_frequency_capability(F.I2C.SpeedMode.fast_speed) ) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) datasheet = L.f_field(F.has_datasheet_defined)( "https://sensirion.com/media/documents/48C4B7FB/64C134E7/Sensirion_SCD4x_Datasheet.pdf" ) diff --git a/src/faebryk/library/SK9822_EC20.py b/src/faebryk/library/SK9822_EC20.py index 964b2ba8..3ef39d61 100644 --- a/src/faebryk/library/SK9822_EC20.py +++ b/src/faebryk/library/SK9822_EC20.py @@ -52,4 +52,6 @@ def single_electric_reference(self): "https://datasheet.lcsc.com/lcsc/2110250930_OPSCO-Optoelectronics-SK9822-EC20_C2909059.pdf" ) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("LED") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.LED + ) diff --git a/src/faebryk/library/SNx4LVC541A.py b/src/faebryk/library/SNx4LVC541A.py index a561eda6..31c4b921 100644 --- a/src/faebryk/library/SNx4LVC541A.py +++ b/src/faebryk/library/SNx4LVC541A.py @@ -27,7 +27,9 @@ class SNx4LVC541A(Module): # ---------------------------------------- # traits # ---------------------------------------- - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) datasheet = L.f_field(F.has_datasheet_defined)( "https://www.ti.com/lit/ds/symlink/sn74lvc541a.pdf?ts=1718881644774&ref_url=https%253A%252F%252Fwww.mouser.ie%252F" ) diff --git a/src/faebryk/library/SP3243E.py b/src/faebryk/library/SP3243E.py index 19c3fd13..df4f8c60 100644 --- a/src/faebryk/library/SP3243E.py +++ b/src/faebryk/library/SP3243E.py @@ -49,7 +49,9 @@ def enable_auto_online(self): # ---------------------------------------- # traits # ---------------------------------------- - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) datasheet = L.f_field(F.has_datasheet_defined)( "https://assets.maxlinear.com/web/documents/sp3243e.pdf" ) @@ -108,9 +110,16 @@ def __preinit__(self): self.uart.base_uart.baud.merge(F.Range.upper_bound(250 * P.kbaud)) + self.rs232.get_trait( + F.has_single_electric_reference + ).get_reference().voltage.merge( + F.Range.from_center(3 * P.V, 15 * P.V) + ) # TODO: Support negative numbers (-15 * P.V, 15 * P.V)) + # ------------------------------------ # connections # ------------------------------------ + F.ElectricLogic.connect_all_module_references(self, exclude=[self.rs232]) # ------------------------------------ # parametrization diff --git a/src/faebryk/library/SP3243E_ReferenceDesign.py b/src/faebryk/library/SP3243E_ReferenceDesign.py index afe106c1..7aafd05f 100644 --- a/src/faebryk/library/SP3243E_ReferenceDesign.py +++ b/src/faebryk/library/SP3243E_ReferenceDesign.py @@ -29,7 +29,13 @@ def __preinit__(self): # ---------------------------------------- # connections # ---------------------------------------- - for pwr in self.get_children(direct_only=True, types=F.ElectricPower): + self.sp3243e.power.decoupled.decouple() + for pwr in [ + self.sp3243e.positive_charge_pump_power, + self.sp3243e.negative_charge_pump_power, + self.sp3243e.voltage_doubler_charge_pump_power, + self.sp3243e.inverting_charge_pump_power, + ]: cap = pwr.decoupled.decouple() # TODO: min values according to self.power.voltage # 3.0V to 3.6V > C_all = 0.1μF diff --git a/src/faebryk/library/SPIFlash.py b/src/faebryk/library/SPIFlash.py index 4f5d5b21..3b918955 100644 --- a/src/faebryk/library/SPIFlash.py +++ b/src/faebryk/library/SPIFlash.py @@ -12,7 +12,9 @@ class SPIFlash(Module): spi = L.f_field(F.MultiSPI)(4) memory_size: F.TBD[Quantity] - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) @L.rt_field def single_reference(self): diff --git a/src/faebryk/library/SWDConnector.py b/src/faebryk/library/SWDConnector.py index 8b51791e..45a0cf35 100644 --- a/src/faebryk/library/SWDConnector.py +++ b/src/faebryk/library/SWDConnector.py @@ -9,12 +9,24 @@ class SWDConnector(Module): swd: F.SWD gnd_detect: F.ElectricLogic - vcc: F.ElectricPower + reference: F.ElectricPower - designator_prefix = L.f_field(F.has_designator_prefix_defined)("J") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.J + ) @L.rt_field def single_electric_reference(self): return F.has_single_electric_reference_defined( F.ElectricLogic.connect_all_module_references(self) ) + + def __preinit__(self): + # ------------------------------------ + # connections + # ------------------------------------ + + # ------------------------------------ + # parametrization + # ------------------------------------ + pass diff --git a/src/faebryk/library/Switch.py b/src/faebryk/library/Switch.py index bc461bdc..129477b1 100644 --- a/src/faebryk/library/Switch.py +++ b/src/faebryk/library/Switch.py @@ -26,7 +26,9 @@ class _Switch(_TSwitch[interface_type]): def __init__(self) -> None: super().__init__(interface_type) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("SW") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.S + ) attach_to_footprint: F.can_attach_to_footprint_symmetrically unnamed = L.list_field(2, interface_type) diff --git a/src/faebryk/library/TD541S485H.py b/src/faebryk/library/TD541S485H.py index a6c203b6..98461a8b 100644 --- a/src/faebryk/library/TD541S485H.py +++ b/src/faebryk/library/TD541S485H.py @@ -20,15 +20,9 @@ class TD541S485H(Module): read_enable: F.ElectricLogic write_enable: F.ElectricLogic - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") - - def __preinit__(self): - self.power.decoupled.decouple() - self.power_iso_in.decoupled.decouple() - self.power_iso_out.decoupled.decouple() - - self.power_iso_in.lv.connect(self.power_iso_out.lv) - self.power_iso_out.voltage.merge(5 * P.V) + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) @L.rt_field def attach_to_footprint(self): @@ -45,8 +39,8 @@ def attach_to_footprint(self): "8": x.power.lv, "9": x.power_iso_out.lv, "10": x.power_iso_out.hv, - "13": x.rs485.diff_pair.n, - "14": x.rs485.diff_pair.p, + "13": x.rs485.diff_pair.n.signal, + "14": x.rs485.diff_pair.p.signal, "15": x.power_iso_in.hv, "16": x.power_iso_in.lv, } @@ -55,3 +49,21 @@ def attach_to_footprint(self): datasheet = L.f_field(F.has_datasheet_defined)( "https://www.mornsun-power.com/public/uploads/pdf/TD(H)541S485H.pdf" ) + + def __preinit__(self): + self.power.decoupled.decouple() + self.power_iso_in.decoupled.decouple() + self.power_iso_out.decoupled.decouple() + + self.power_iso_in.lv.connect(self.power_iso_out.lv) + self.power_iso_out.voltage.merge(5 * P.V) + + F.ElectricLogic.connect_all_module_references( + self, + exclude=[ + self.power, + self.uart, + self.read_enable, + self.write_enable, + ], + ) diff --git a/src/faebryk/library/TPS2116.py b/src/faebryk/library/TPS2116.py index 8acce271..1a043944 100644 --- a/src/faebryk/library/TPS2116.py +++ b/src/faebryk/library/TPS2116.py @@ -2,6 +2,7 @@ # SPDX-License-Identifier: MIT import logging +from enum import Enum import faebryk.library._F as F # noqa: F401 from faebryk.libs.library import L # noqa: F401 @@ -16,6 +17,33 @@ class TPS2116(F.PowerMux): 2 to 1 1.6 V to 5.5 V, 2.5-A Low IQ Power Mux with Manual and Priority Switchover """ + class Mode(Enum): + MANUAL = 0 + """ + Manually tie mode to an external power reference. + If select is above Vref (1V), power_in[0] is selected. + If select is below Vref, power_in[1] is selected. + """ + PRIORITY = 1 + """ + This is the most automatic mode. + power_in[0] is selected by default, switchover only happens if power_in[0] is + lower than power_in[1]. + """ + SHUTDOWN = 2 + """ + Disables device. + """ + + def set_mode(self, mode: Mode): + if mode == self.Mode.PRIORITY: + self.mode.signal.connect(self.power_in[1].hv) + resistor_devider = self.add(F.ResistorVoltageDivider()) + self.power_in[0].hv.connect_via(resistor_devider, self.select.signal) + resistor_devider.node[2].connect(self.mode.reference.lv) + else: + pass + # ---------------------------------------- # modules, interfaces, parameters # ---------------------------------------- @@ -38,6 +66,21 @@ class TPS2116(F.PowerMux): "https://www.ti.com/lit/ds/symlink/tps2116.pdf" ) + @L.rt_field + def can_attach_to_footprint(self): + return F.can_attach_to_footprint_via_pinmap( + { + "1": self.power_out.lv, + "2": self.power_out.hv, + "3": self.power_in[0].hv, + "4": self.select.signal, + "5": self.mode.signal, + "6": self.power_in[1].hv, + "7": self.power_out.hv, + "8": self.status.signal, + }, + ) + @L.rt_field def pin_association_heuristic(self): return F.has_pin_association_heuristic_lookup_table( diff --git a/src/faebryk/library/TXS0102DCUR.py b/src/faebryk/library/TXS0102DCUR.py index 8648770e..03dc1712 100644 --- a/src/faebryk/library/TXS0102DCUR.py +++ b/src/faebryk/library/TXS0102DCUR.py @@ -49,7 +49,9 @@ def __preinit__(self): # side_b.reference.connect(self.voltage_b_power) side_b.add(F.has_single_electric_reference_defined(self.voltage_b_power)) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) datasheet = L.f_field(F.has_datasheet_defined)( "https://datasheet.lcsc.com/lcsc/1810292010_Texas-Instruments-TXS0102DCUR_C53434.pdf" ) diff --git a/src/faebryk/library/UART.py b/src/faebryk/library/UART.py index ce06605e..0b70617d 100644 --- a/src/faebryk/library/UART.py +++ b/src/faebryk/library/UART.py @@ -13,3 +13,10 @@ class UART(ModuleInterface): dsr: F.ElectricLogic dcd: F.ElectricLogic ri: F.ElectricLogic + + # TODO: this creates too many connections in some projects + # @L.rt_field + # def single_electric_reference(self): + # return F.has_single_electric_reference_defined( + # F.ElectricLogic.connect_all_module_references(self) + # ) diff --git a/src/faebryk/library/UART_RS485.py b/src/faebryk/library/UART_RS485.py index 312dc6fc..bf3eeee1 100644 --- a/src/faebryk/library/UART_RS485.py +++ b/src/faebryk/library/UART_RS485.py @@ -22,7 +22,10 @@ class UART_RS485(Module): gpio_voltage: F.TBD[Quantity] def __preinit__(self): + self.max_data_rate.merge(self.uart.baud) self.power.voltage.merge(F.Range(3.3 * P.V, 5.0 * P.V)) self.power.decoupled.decouple() - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) diff --git a/src/faebryk/library/USB2514B.py b/src/faebryk/library/USB2514B.py index 4946b7e3..91c336e5 100644 --- a/src/faebryk/library/USB2514B.py +++ b/src/faebryk/library/USB2514B.py @@ -45,6 +45,12 @@ def configure_usb_port( if not enable_battery_charging: self.battery_charging_enable.set_weak(on=False) + def __preinit__(self): + F.ElectricLogic.connect_all_module_references(self) + self.usb_port_disable_p.signal.connect(self.usb.p.signal) + self.usb_port_disable_n.signal.connect(self.usb.n.signal) + self.usb_power_enable.connect(self.battery_charging_enable) + class ConfigurationSource(Enum): DEFAULT = auto() """ @@ -140,6 +146,7 @@ def set_non_removable_ports( power_core: F.ElectricPower usb_upstream: F.USB2_0_IF.Data + configurable_downstream_usb = L.list_field(4, ConfigurableUSB) xtal_if: F.XtalIF external_clock_input: F.ElectricLogic @@ -157,8 +164,6 @@ def set_non_removable_ports( suspense_indicator: F.ElectricLogic high_speed_upstream_indicator: F.ElectricLogic - configurable_downstream_usb = L.list_field(4, ConfigurableUSB) - i2c: F.I2C # ---------------------------------------- @@ -177,6 +182,58 @@ def set_non_removable_ports( "https://ww1.microchip.com/downloads/aemDocuments/documents/UNG/ProductDocuments/DataSheets/USB251xB-xBi-Data-Sheet-DS00001692.pdf" ) + @L.rt_field + def can_attach_to_footprint(self): + return F.can_attach_to_footprint_via_pinmap( + { + "1": self.configurable_downstream_usb[0].usb.n.signal, + "2": self.configurable_downstream_usb[0].usb.p.signal, + "3": self.configurable_downstream_usb[1].usb.n.signal, + "4": self.configurable_downstream_usb[1].usb.p.signal, + "5": self.power_3v3.hv, + "6": self.configurable_downstream_usb[2].usb.n.signal, + "7": self.configurable_downstream_usb[2].usb.p.signal, + "8": self.configurable_downstream_usb[3].usb.n.signal, + "9": self.configurable_downstream_usb[3].usb.p.signal, + "10": self.power_3v3.hv, + "11": self.test, + "12": self.configurable_downstream_usb[ + 0 + ].battery_charging_enable.signal, + "13": self.configurable_downstream_usb[0].over_current_sense.signal, + "14": self.power_core.hv, + "15": self.power_3v3.hv, + "16": self.configurable_downstream_usb[ + 1 + ].battery_charging_enable.signal, + "17": self.configurable_downstream_usb[1].over_current_sense.signal, + "18": self.configurable_downstream_usb[ + 2 + ].battery_charging_enable.signal, + "19": self.configurable_downstream_usb[2].over_current_sense.signal, + "20": self.configurable_downstream_usb[ + 3 + ].battery_charging_enable.signal, + "21": self.configurable_downstream_usb[3].over_current_sense.signal, + "22": self.i2c.sda.signal, + "23": self.power_3v3.hv, + "24": self.i2c.scl.signal, + "25": self.high_speed_upstream_indicator.signal, + "26": self.reset.signal, + "27": self.vbus_detect.signal, + "28": self.suspense_indicator.signal, + "29": self.power_3v3_analog.hv, + "30": self.usb_upstream.n.signal, + "31": self.usb_upstream.p.signal, + "32": self.xtal_if.xout, + "33": self.xtal_if.xin, + "34": self.power_pll.hv, + "35": self.usb_bias_resistor_input.signal, + "36": self.power_3v3.hv, + "37": self.power_3v3.lv, + } + ) + @L.rt_field def pin_association_heuristic(self): return F.has_pin_association_heuristic_lookup_table( @@ -219,16 +276,32 @@ def pin_association_heuristic(self): "SUSP_IND/LOCAL_PWR/NON_REM0" ], self.test: ["TEST"], - self.configurable_downstream_usb[0].usb.n: ["USBDM_DN1/PRT_DIS_M1"], - self.configurable_downstream_usb[1].usb.n: ["USBDM_DN2/PRT_DIS_M2"], - self.configurable_downstream_usb[2].usb.n: ["USBDM_DN3/PRT_DOS_M3"], - self.configurable_downstream_usb[3].usb.n: ["USBDM_DN4/PRT_DIS_M4"], - self.usb_upstream.p: ["USBDM_UP"], - self.configurable_downstream_usb[0].usb.n: ["USBDP_DN1/PRT_DIS_P1"], - self.configurable_downstream_usb[1].usb.n: ["USBDP_DN2/PRT_DIS_P2"], - self.configurable_downstream_usb[2].usb.n: ["USBDP_DN3/PRT_DIS_P3"], - self.configurable_downstream_usb[3].usb.n: ["USBDP_DN4/PRT_DIS_P4"], - self.usb_upstream.p: ["USBDP_UP"], + self.configurable_downstream_usb[0].usb.n.signal: [ + "USBDM_DN1/PRT_DIS_M1" + ], + self.configurable_downstream_usb[1].usb.n.signal: [ + "USBDM_DN2/PRT_DIS_M2" + ], + self.configurable_downstream_usb[2].usb.n.signal: [ + "USBDM_DN3/PRT_DOS_M3" + ], + self.configurable_downstream_usb[3].usb.n.signal: [ + "USBDM_DN4/PRT_DIS_M4" + ], + self.usb_upstream.p.signal: ["USBDM_UP"], + self.configurable_downstream_usb[0].usb.p.signal: [ + "USBDP_DN1/PRT_DIS_P1" + ], + self.configurable_downstream_usb[1].usb.p.signal: [ + "USBDP_DN2/PRT_DIS_P2" + ], + self.configurable_downstream_usb[2].usb.p.signal: [ + "USBDP_DN3/PRT_DIS_P3" + ], + self.configurable_downstream_usb[3].usb.p.signal: [ + "USBDP_DN4/PRT_DIS_P4" + ], + self.usb_upstream.p.signal: ["USBDP_UP"], self.vbus_detect.signal: ["VBUS_DET"], self.power_3v3.hv: ["VDD33"], self.power_3v3_analog.hv: ["VDDA33"], @@ -250,19 +323,16 @@ def __preinit__(self): self.local_power_detection.signal, ) self.usb_removability_configuration_intput[1].connect(self.i2c.sda) - for usb_port in self.configurable_downstream_usb: - usb_port.usb.p.connect(usb_port.usb_port_disable_p.signal) - usb_port.usb.n.connect(usb_port.usb_port_disable_n.signal) - usb_port.usb_power_enable.connect(usb_port.battery_charging_enable) self.test.connect(self.power_core.lv) F.ElectricLogic.connect_all_module_references(self, gnd_only=True) F.ElectricLogic.connect_all_module_references( self, exclude={ - self.power_3v3_analog, self.power_pll, self.power_core, + self.vbus_detect, + self.local_power_detection, }, ) diff --git a/src/faebryk/library/USB2514B_ReferenceDesign.py b/src/faebryk/library/USB2514B_ReferenceDesign.py index 41da64c5..2673995d 100644 --- a/src/faebryk/library/USB2514B_ReferenceDesign.py +++ b/src/faebryk/library/USB2514B_ReferenceDesign.py @@ -52,11 +52,9 @@ def has_defined_layout(self): # TODO: layouts = [ + LVL(mod_type=F.USB2514B, layout=LayoutAbsolute(Point((0, 0, 0, L.NONE)))), LVL( - mod_type=F.PoweredLED, - layout=LayoutAbsolute( - Point((2.50, 180, L.NONE)), - ), + mod_type=F.PoweredLED, layout=LayoutAbsolute(Point((2.50, 180, L.NONE))) ), ] @@ -68,6 +66,7 @@ def __preinit__(self): # ---------------------------------------- vbus = self.usb_ufp.usb_if.buspower gnd = vbus.lv + power_3v3 = self.ldo_3v3.power_out # ---------------------------------------- # parametrization @@ -104,9 +103,19 @@ def __preinit__(self): TypicalLuminousIntensity.APPLICATION_LED_INDICATOR_INSIDE.value.value ) + self.ldo_3v3.output_voltage.merge(F.Range.from_center_rel(3.3 * P.V, 0.05)) + # ---------------------------------------- # connections # ---------------------------------------- + # power + vbus.connect(self.ldo_3v3.power_in) + power_3v3.connect( + self.hub_controller.power_3v3, + self.hub_controller.power_3v3_analog, + ) + self.ldo_3v3.enable_output() + # crystal oscillator self.crystal_oscillator.xtal_if.connect(self.hub_controller.xtal_if) self.crystal_oscillator.gnd.connect(gnd) @@ -138,5 +147,5 @@ def __preinit__(self): self.usb_ufp.usb_if.d.connect(self.hub_controller.usb_upstream) # LEDs - self.power_3v3_indicator.power.connect(self.ldo_3v3.power_out) + self.power_3v3_indicator.power.connect(power_3v3) self.hub_controller.suspense_indicator.connect(self.suspend_indicator.logic_in) diff --git a/src/faebryk/library/USB2_0_ESD_Protection.py b/src/faebryk/library/USB2_0_ESD_Protection.py index 31806124..6192b39d 100644 --- a/src/faebryk/library/USB2_0_ESD_Protection.py +++ b/src/faebryk/library/USB2_0_ESD_Protection.py @@ -31,4 +31,6 @@ def __preinit__(self): def can_bridge(self): return F.can_bridge_defined(self.usb[0].usb_if.d, self.usb[1].usb_if.d) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) diff --git a/src/faebryk/library/USB2_0_IF.py b/src/faebryk/library/USB2_0_IF.py index 694ef15c..c067bf73 100644 --- a/src/faebryk/library/USB2_0_IF.py +++ b/src/faebryk/library/USB2_0_IF.py @@ -8,13 +8,11 @@ class USB2_0_IF(ModuleInterface): class Data(F.DifferentialPair): - pass + @L.rt_field + def single_electric_reference(self): + return F.has_single_electric_reference_defined( + F.ElectricLogic.connect_all_module_references(self) + ) d: Data buspower: F.ElectricPower - - @L.rt_field - def single_electric_reference(self): - return F.has_single_electric_reference_defined( - F.ElectricLogic.connect_all_module_references(self) - ) diff --git a/src/faebryk/library/USB3.py b/src/faebryk/library/USB3.py index 7626ca2a..09be9d81 100644 --- a/src/faebryk/library/USB3.py +++ b/src/faebryk/library/USB3.py @@ -3,7 +3,6 @@ import faebryk.library._F as F from faebryk.core.moduleinterface import ModuleInterface -from faebryk.libs.library import L from faebryk.libs.units import P @@ -13,9 +12,3 @@ class USB3(ModuleInterface): def __preinit__(self): self.usb3_if.gnd_drain.connect(self.usb3_if.usb_if.buspower.lv) self.usb3_if.usb_if.buspower.voltage.merge(F.Range(4.75 * P.V, 5.5 * P.V)) - - @L.rt_field - def single_electric_reference(self): - return F.has_single_electric_reference_defined( - F.ElectricLogic.connect_all_module_references(self) - ) diff --git a/src/faebryk/library/USB3_IF.py b/src/faebryk/library/USB3_IF.py index 13421a96..ef2c7e20 100644 --- a/src/faebryk/library/USB3_IF.py +++ b/src/faebryk/library/USB3_IF.py @@ -3,7 +3,6 @@ import faebryk.library._F as F from faebryk.core.moduleinterface import ModuleInterface -from faebryk.libs.library import L class USB3_IF(ModuleInterface): @@ -11,9 +10,3 @@ class USB3_IF(ModuleInterface): rx: F.DifferentialPair tx: F.DifferentialPair gnd_drain: F.Electrical - - @L.rt_field - def single_electric_reference(self): - return F.has_single_electric_reference_defined( - F.ElectricLogic.connect_all_module_references(self) - ) diff --git a/src/faebryk/library/USB3_connector.py b/src/faebryk/library/USB3_connector.py index 13f6c416..9803c1be 100644 --- a/src/faebryk/library/USB3_connector.py +++ b/src/faebryk/library/USB3_connector.py @@ -20,4 +20,6 @@ def __preinit__(self): self.usb3.usb3_if.usb_if.buspower.lv.connect(self.usb3.usb3_if.gnd_drain) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("J") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.J + ) diff --git a/src/faebryk/library/USBLC6_2P6.py b/src/faebryk/library/USBLC6_2P6.py index 86484a52..3e8eafc7 100644 --- a/src/faebryk/library/USBLC6_2P6.py +++ b/src/faebryk/library/USBLC6_2P6.py @@ -19,16 +19,18 @@ def attach_to_footprint(self): x = self return F.can_attach_to_footprint_via_pinmap( { - "1": x.usb.usb_if.d.p, + "1": x.usb.usb_if.d.p.signal, "2": x.usb.usb_if.buspower.lv, - "3": x.usb.usb_if.d.n, - "4": x.usb.usb_if.d.n, + "3": x.usb.usb_if.d.n.signal, + "4": x.usb.usb_if.d.n.signal, "5": x.usb.usb_if.buspower.hv, - "6": x.usb.usb_if.d.p, + "6": x.usb.usb_if.d.p.signal, } ) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) datasheet = L.f_field(F.has_datasheet_defined)( "https://datasheet.lcsc.com/lcsc/2108132230_TECH-PUBLIC-USBLC6-2P6_C2827693.pdf" ) diff --git a/src/faebryk/library/USB_C.py b/src/faebryk/library/USB_C.py index 5fa63fee..38b841c5 100644 --- a/src/faebryk/library/USB_C.py +++ b/src/faebryk/library/USB_C.py @@ -3,7 +3,6 @@ import faebryk.library._F as F from faebryk.core.moduleinterface import ModuleInterface -from faebryk.libs.library import L class USB_C(ModuleInterface): @@ -14,9 +13,3 @@ class USB_C(ModuleInterface): sbu2: F.Electrical rx: F.DifferentialPair tx: F.DifferentialPair - - @L.rt_field - def single_electric_reference(self): - return F.has_single_electric_reference_defined( - F.ElectricLogic.connect_all_module_references(self) - ) diff --git a/src/faebryk/library/USB_Type_C_Receptacle_14_pin_Vertical.py b/src/faebryk/library/USB_Type_C_Receptacle_14_pin_Vertical.py index cde0452b..99a5e135 100644 --- a/src/faebryk/library/USB_Type_C_Receptacle_14_pin_Vertical.py +++ b/src/faebryk/library/USB_Type_C_Receptacle_14_pin_Vertical.py @@ -37,15 +37,15 @@ def attach_to_footprint(self): { "1": self.vbus.lv, "2": self.vbus.hv, - "3": self.usb.usb_if.d.n, - "4": self.usb.usb_if.d.p, + "3": self.usb.usb_if.d.n.signal, + "4": self.usb.usb_if.d.p.signal, "5": self.cc2, "6": self.vbus.hv, "7": self.vbus.lv, "8": self.vbus.lv, "9": self.vbus.hv, - "10": self.usb.usb_if.d.n, - "11": self.usb.usb_if.d.p, + "10": self.usb.usb_if.d.n.signal, + "11": self.usb.usb_if.d.p.signal, "12": self.cc1, "13": self.vbus.hv, "14": self.vbus.lv, @@ -53,4 +53,6 @@ def attach_to_footprint(self): } ) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("J") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.J + ) diff --git a/src/faebryk/library/USB_Type_C_Receptacle_16_pin.py b/src/faebryk/library/USB_Type_C_Receptacle_16_pin.py index 5eb5a6dc..96ea9e4a 100644 --- a/src/faebryk/library/USB_Type_C_Receptacle_16_pin.py +++ b/src/faebryk/library/USB_Type_C_Receptacle_16_pin.py @@ -31,16 +31,16 @@ def attach_to_footprint(self): "A1": gnd, "A4": vbus, "A5": self.cc1, - "A6": self.d.p, - "A7": self.d.n, + "A6": self.d.p.signal, + "A7": self.d.n.signal, "A8": self.sbu1, "A9": vbus, "A12": gnd, "B1": gnd, "B4": vbus, "B5": self.cc2, - "B6": self.d.p, - "B7": self.d.n, + "B6": self.d.p.signal, + "B7": self.d.n.signal, "B8": self.sbu2, "B9": vbus, "B12": gnd, @@ -51,4 +51,6 @@ def attach_to_footprint(self): } ) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("J") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.J + ) diff --git a/src/faebryk/library/USB_Type_C_Receptacle_24_pin.py b/src/faebryk/library/USB_Type_C_Receptacle_24_pin.py index a0b0774d..2d2b6888 100644 --- a/src/faebryk/library/USB_Type_C_Receptacle_24_pin.py +++ b/src/faebryk/library/USB_Type_C_Receptacle_24_pin.py @@ -58,4 +58,6 @@ def attach_to_footprint(self): } ) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("J") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.J + ) diff --git a/src/faebryk/library/Winbond_Elec_W25Q128JVSIQ.py b/src/faebryk/library/Winbond_Elec_W25Q128JVSIQ.py index a18c5b49..e81f365b 100644 --- a/src/faebryk/library/Winbond_Elec_W25Q128JVSIQ.py +++ b/src/faebryk/library/Winbond_Elec_W25Q128JVSIQ.py @@ -27,7 +27,9 @@ class Winbond_Elec_W25Q128JVSIQ(F.SPIFlash): # traits # ---------------------------------------- lcsc_id = L.f_field(F.has_descriptive_properties_defined)({"LCSC": "C97521"}) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) descriptive_properties = L.f_field(F.has_descriptive_properties_defined)( { DescriptiveProperties.manufacturer: "Winbond Elec", diff --git a/src/faebryk/library/Wuxi_I_core_Elec_AiP74LVC1T45GB236_TR.py b/src/faebryk/library/Wuxi_I_core_Elec_AiP74LVC1T45GB236_TR.py new file mode 100644 index 00000000..4748edca --- /dev/null +++ b/src/faebryk/library/Wuxi_I_core_Elec_AiP74LVC1T45GB236_TR.py @@ -0,0 +1,79 @@ +# This file is part of the faebryk project +# SPDX-License-Identifier: MIT + +import logging + +import faebryk.library._F as F # noqa: F401 +from faebryk.core.module import Module +from faebryk.libs.library import L # noqa: F401 +from faebryk.libs.picker.picker import DescriptiveProperties +from faebryk.libs.units import P # noqa: F401 + +logger = logging.getLogger(__name__) + + +class Wuxi_I_core_Elec_AiP74LVC1T45GB236_TR(Module): + """ + Single channel bidirectional buffer. + 1.2V-5.5V logic levels. + SOT-23-6 + """ + + # ---------------------------------------- + # modules, interfaces, parameters + # ---------------------------------------- + # TODO: Change auto-generated interface types to actual high level types + direction: F.ElectricLogic + port_a: F.ElectricLogic + power_a: F.ElectricPower + port_b: F.ElectricLogic + power_b: F.ElectricPower + + # ---------------------------------------- + # traits + # ---------------------------------------- + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) + descriptive_properties = L.f_field(F.has_descriptive_properties_defined)( + { + DescriptiveProperties.manufacturer: "Wuxi I-core Elec", + DescriptiveProperties.partno: "AiP74LVC1T45GB236.TR", + } + ) + datasheet = L.f_field(F.has_datasheet_defined)( + "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2209151800_Wuxi-I-core-Elec-AiP74LVC1T45GB236-TR_C5162251.pdf" + ) + + @L.rt_field + def pin_association_heuristic(self): + return F.has_pin_association_heuristic_lookup_table( + mapping={ + self.port_a.signal: ["A"], + self.port_b.signal: ["B"], + self.direction.signal: ["DIR"], + self.power_a.lv: ["GND"], + self.power_a.hv: ["VCC(A)"], + self.power_b.hv: ["VCC(B)"], + }, + accept_prefix=False, + case_sensitive=False, + ) + + def __preinit__(self): + # ------------------------------------ + # connections + # ------------------------------------ + F.ElectricLogic.connect_all_module_references(self, gnd_only=True) + F.ElectricLogic.connect_all_module_references( + self, exclude=[self.power_a, self.port_a, self.direction] + ) + F.ElectricLogic.connect_all_module_references( + self, exclude=[self.power_b, self.port_b] + ) + + # ------------------------------------ + # parametrization + # ------------------------------------ + self.power_a.voltage.merge(F.Range(1.2 * P.V, 5.5 * P.V)) + self.power_b.voltage.merge(F.Range(1.2 * P.V, 5.5 * P.V)) diff --git a/src/faebryk/library/XL_3528RGBW_WS2812B.py b/src/faebryk/library/XL_3528RGBW_WS2812B.py index cc27988c..bb45f3de 100644 --- a/src/faebryk/library/XL_3528RGBW_WS2812B.py +++ b/src/faebryk/library/XL_3528RGBW_WS2812B.py @@ -44,13 +44,9 @@ def is_implemented(self): do: F.ElectricLogic di: F.ElectricLogic - @L.rt_field - def single_electric_reference(self): - return F.has_single_electric_reference_defined( - F.ElectricLogic.connect_all_module_references(self) - ) - - designator_prefix = L.f_field(F.has_designator_prefix_defined)("LED") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.LED + ) # Add bridge trait @L.rt_field @@ -75,4 +71,13 @@ def attach_to_footprint(self): esphome_config: _ws2812b_esphome_config def __preinit__(self): + # ------------------------------ + # parameters + # ------------------------------ + + # ------------------------------ + # connections + # ------------------------------ self.power.decoupled.decouple() + F.ElectricLogic.connect_all_module_references(self, gnd_only=True) + F.ElectricLogic.connect_all_module_references(self, exclude=[self.power]) diff --git a/src/faebryk/library/_F.py b/src/faebryk/library/_F.py index 6c5bb6ec..f7bb7eba 100644 --- a/src/faebryk/library/_F.py +++ b/src/faebryk/library/_F.py @@ -17,10 +17,10 @@ from faebryk.library.TBD import TBD from faebryk.library.Range import Range +from faebryk.library.has_designator_prefix import has_designator_prefix from faebryk.library.Constant import Constant from faebryk.library.has_esphome_config import has_esphome_config from faebryk.library.is_esphome_bus import is_esphome_bus -from faebryk.library.has_designator_prefix import has_designator_prefix from faebryk.library.has_pcb_position import has_pcb_position from faebryk.library.has_single_electric_reference import has_single_electric_reference from faebryk.library.Power import Power @@ -48,10 +48,10 @@ from faebryk.library.is_representable_by_single_value import is_representable_by_single_value from faebryk.library.ANY import ANY from faebryk.library.Electrical import Electrical +from faebryk.library.has_designator_prefix_defined import has_designator_prefix_defined from faebryk.library.Set import Set from faebryk.library.has_esphome_config_defined import has_esphome_config_defined from faebryk.library.is_esphome_bus_defined import is_esphome_bus_defined -from faebryk.library.has_designator_prefix_defined import has_designator_prefix_defined from faebryk.library.has_pcb_position_defined import has_pcb_position_defined from faebryk.library.has_pcb_position_defined_relative import has_pcb_position_defined_relative from faebryk.library.has_pcb_position_defined_relative_to_parent import has_pcb_position_defined_relative_to_parent @@ -132,15 +132,11 @@ from faebryk.library.can_be_decoupled import can_be_decoupled from faebryk.library.is_decoupled import is_decoupled from faebryk.library.Crystal_Oscillator import Crystal_Oscillator -from faebryk.library.DifferentialPair import DifferentialPair from faebryk.library.Potentiometer import Potentiometer from faebryk.library.ResistorVoltageDivider import ResistorVoltageDivider from faebryk.library.Resistor_Voltage_Divider import Resistor_Voltage_Divider from faebryk.library.is_surge_protected_defined import is_surge_protected_defined from faebryk.library.is_decoupled_nodes import is_decoupled_nodes -from faebryk.library.Ethernet import Ethernet -from faebryk.library.RS485 import RS485 -from faebryk.library.USB_Type_C_Receptacle_24_pin import USB_Type_C_Receptacle_24_pin from faebryk.library.can_be_surge_protected_defined import can_be_surge_protected_defined from faebryk.library.can_be_decoupled_defined import can_be_decoupled_defined from faebryk.library.ElectricPower import ElectricPower @@ -150,16 +146,19 @@ from faebryk.library.Fan import Fan from faebryk.library.LED import LED from faebryk.library.OpAmp import OpAmp -from faebryk.library.RS485_Bus_Protection import RS485_Bus_Protection from faebryk.library.SignalElectrical import SignalElectrical -from faebryk.library.USB_Type_C_Receptacle_16_pin import USB_Type_C_Receptacle_16_pin from faebryk.library.can_be_decoupled_rails import can_be_decoupled_rails from faebryk.library.ButtonCell import ButtonCell from faebryk.library.PoweredLED import PoweredLED +from faebryk.library.DifferentialPair import DifferentialPair from faebryk.library.ElectricLogic import ElectricLogic from faebryk.library.FilterElectricalLC import FilterElectricalLC from faebryk.library.FilterElectricalRC import FilterElectricalRC from faebryk.library.PowerMux import PowerMux +from faebryk.library.Ethernet import Ethernet +from faebryk.library.RS485 import RS485 +from faebryk.library.USB_Type_C_Receptacle_16_pin import USB_Type_C_Receptacle_16_pin +from faebryk.library.USB_Type_C_Receptacle_24_pin import USB_Type_C_Receptacle_24_pin from faebryk.library.Diodes_Incorporated_AP2552W6_7 import Diodes_Incorporated_AP2552W6_7 from faebryk.library.ElectricLogicGate import ElectricLogicGate from faebryk.library.GenericBusProtection import GenericBusProtection @@ -177,10 +176,12 @@ from faebryk.library.TXS0102DCUR import TXS0102DCUR from faebryk.library.UART_Base import UART_Base from faebryk.library.USB2_0_IF import USB2_0_IF +from faebryk.library.Wuxi_I_core_Elec_AiP74LVC1T45GB236_TR import Wuxi_I_core_Elec_AiP74LVC1T45GB236_TR from faebryk.library.XL_3528RGBW_WS2812B import XL_3528RGBW_WS2812B from faebryk.library.can_switch_power import can_switch_power from faebryk.library.pf_74AHCT2G125 import pf_74AHCT2G125 from faebryk.library.TPS2116 import TPS2116 +from faebryk.library.RS485_Bus_Protection import RS485_Bus_Protection from faebryk.library.ElectricLogicGates import ElectricLogicGates from faebryk.library.Logic74xx import Logic74xx from faebryk.library.BH1750FVI_TR import BH1750FVI_TR @@ -189,7 +190,6 @@ from faebryk.library.ISO1540 import ISO1540 from faebryk.library.M24C08_FMN6TP import M24C08_FMN6TP from faebryk.library.OLED_Module import OLED_Module -from faebryk.library.QWIIC import QWIIC from faebryk.library.QWIIC_Connector import QWIIC_Connector from faebryk.library.SCD40 import SCD40 from faebryk.library.ME6211C33M5G_N import ME6211C33M5G_N @@ -212,11 +212,11 @@ from faebryk.library.ISO1540_ReferenceDesign import ISO1540_ReferenceDesign from faebryk.library.Winbond_Elec_W25Q128JVSIQ import Winbond_Elec_W25Q128JVSIQ from faebryk.library.RP2040 import RP2040 +from faebryk.library.CH344 import CH344 from faebryk.library.SP3243E import SP3243E from faebryk.library.CBM9002A_56ILG import CBM9002A_56ILG from faebryk.library.CH340x import CH340x from faebryk.library.CH342 import CH342 -from faebryk.library.CH344 import CH344 from faebryk.library.ESP32_C3 import ESP32_C3 from faebryk.library.MCP2221A import MCP2221A from faebryk.library.USB2_0_ESD_Protection import USB2_0_ESD_Protection @@ -226,12 +226,12 @@ from faebryk.library.PowerSwitch import PowerSwitch from faebryk.library.TI_CD4011BE import TI_CD4011BE from faebryk.library.RP2040_ReferenceDesign import RP2040_ReferenceDesign +from faebryk.library.CH344Q import CH344Q from faebryk.library.SP3243E_ReferenceDesign import SP3243E_ReferenceDesign from faebryk.library.CBM9002A_56ILG_ReferenceDesign import CBM9002A_56ILG_ReferenceDesign from faebryk.library.USB_RS485 import USB_RS485 from faebryk.library.CH342F import CH342F from faebryk.library.CH342K import CH342K -from faebryk.library.CH344Q import CH344Q from faebryk.library.ESP32_C3_MINI_1 import ESP32_C3_MINI_1 from faebryk.library.USB_C_PSU_Vertical import USB_C_PSU_Vertical from faebryk.library.USB3_connector import USB3_connector diff --git a/src/faebryk/library/has_designator_prefix.py b/src/faebryk/library/has_designator_prefix.py index e816465f..44d48662 100644 --- a/src/faebryk/library/has_designator_prefix.py +++ b/src/faebryk/library/has_designator_prefix.py @@ -2,160 +2,162 @@ # SPDX-License-Identifier: MIT from abc import abstractmethod -from enum import StrEnum, auto +from enum import StrEnum from faebryk.core.module import Module class has_designator_prefix(Module.TraitT): class Prefix(StrEnum): - A = auto() + A = "A" """Separable assembly or sub-assembly (e.g. printed circuit assembly)""" - AT = auto() + AT = "AT" """Attenuator or isolator""" - BR = auto() + BR = "BR" """ Bridge rectifier (four diodes in a package) > often changed to "D" for diode """ - B = auto() + B = "B" """Often shortened to "B" for Battery or battery holder""" - BT = auto() + BT = "BT" """Battery or battery holder > often shortened to "B" """ - BAT = auto() + BAT = "BAT" """Battery or battery holder > often shortened to "B" """ - C = auto() + C = "C" """Capacitor""" - CB = auto() + CB = "CB" """Circuit breaker""" - CN = auto() + CN = "CN" """Capacitor network > may be simplified to "C" for capacitor""" - D = auto() + D = "D" """ Diode (all types, including LED), thyristor > "D" is preferred for various types of diodes """ - CR = auto() + CR = "CR" """ Diode (all types, including LED), thyristor > "D" is preferred for various types of diodes """ - DL = auto() + DL = "DL" """Delay line""" - DN = auto() + DN = "DN" """Diode network > may be simplified to "D" for diode""" - DS = auto() + DS = "DS" """Display, general light source, lamp, signal light""" - F = auto() + F = "F" """Fuse""" - FB = auto() + FB = "FB" """Ferrite bead > sometimes changed to "L" for inductor, though "E" was used in the currently inactive standard IEEE 315 (see Clause 22.4)""" - L = auto() + L = "L" """Inductor or coil or ferrite bead > sometimes changed from "FB" for ferrite bead""" - FD = auto() + FD = "FD" """Fiducial""" - FL = auto() + FL = "FL" """Filter""" - G = auto() + G = "G" """Generator or oscillator""" - OSC = auto() + GDT = "GDT" + """Gas discharge tube""" + OSC = "OSC" """Generator or oscillator""" - GL = auto() + GL = "GL" """Graphical logo""" - GN = auto() + GN = "GN" """General network""" - H = auto() + H = "H" """Hardware, e.g., screws, nuts, washers, also used for drilled holes > sometimes hardware is expanded to "HW" """ - HW = auto() + HW = "HW" """Expanded form of "H" for hardware""" - HY = auto() + HY = "HY" """Circulator or directional coupler""" - IR = auto() + IR = "IR" """Infrared diode > often changed to "D" for diode""" - J = auto() + J = "J" """Jack (least-movable connector of a connector pair), jack connector (connector may have "male" pin contacts and/or "female" socket contacts) > all types of connectors, including pin headers.""" - JP = auto() + JP = "JP" """Jumper (link)""" - K = auto() + K = "K" """Relay or contactor""" - LD = auto() + LD = "LD" """LED > often changed to "D" for diode""" - LED = auto() + LED = "LED" """LED > often changed to "D" for diode""" - LS = auto() + LS = "LS" """Loudspeaker or buzzer""" - SPK = auto() + SPK = "SPK" """Loudspeaker or buzzer""" - M = auto() + M = "M" """Motor""" - MK = auto() + MK = "MK" """Microphone""" - MIC = auto() + MIC = "MIC" """Microphone""" - MP = auto() + MP = "MP" """Mechanical part (including screws and fasteners)""" - OP = auto() + OP = "OP" """Opto-isolator > often changed to "U" for IC""" - U = auto() + U = "U" """Shorter form of "U" (unit) preferred for Integrated Circuit instead of "IC" """ - IC = auto() + IC = "IC" """Integrated circuit (IC) > often shortened to "U" """ - P = auto() + P = "P" """Plug (most-movable connector of a connector pair), plug connector (connector may have "male" pin contacts and/or "female" socket contacts)""" - PS = auto() + PS = "PS" """Power supply""" - Q = auto() + Q = "Q" """Transistor (all types)""" - R = auto() + R = "R" """Resistor""" - RN = auto() + RN = "RN" """Resistor network > sometimes simplified to "R" for resistor, or "N" for network""" - N = auto() + N = "N" """Often used for networks, sometimes simplified from resistor network "RN" """ - RT = auto() + RT = "RT" """Thermistor > sometimes simplified to "R" for resistor""" - RV = auto() + RV = "RV" """Varistor, variable resistor""" - S = auto() + S = "S" """Switch (all types, including buttons) > sometimes "SW" is erroneously used""" - SW = auto() + SW = "SW" """Sometimes erroneously used for Switch instead of "S" """ - SA = auto() + SA = "SA" """Spark arrester""" - T = auto() + T = "T" """Transistor > often changed to "Q", but sometimes "T" is used for bipolar transistors and "Q" for FETs.""" - TC = auto() + TC = "TC" """Thermocouple""" - TP = auto() + TP = "TP" """Test point""" - TR = auto() + TR = "TR" """Transformer > sometimes changed to "L" for inductor""" - TUN = auto() + TUN = "TUN" """Tuner""" - V = auto() + V = "V" """Vacuum tube""" - VR = auto() + VR = "VR" """Voltage regulator (voltage reference), or variable resistor (potentiometer / trimmer / rheostat) > voltage regulators are often "U" for IC, pots and trimmers often "R" for resistor""" - X = auto() + X = "X" """Socket connector for another item not P or J, paired with the letter symbol for that item (XV for vacuum tube socket, XF for fuse holder, XA for printed circuit assembly connector, XU for integrated circuit connector, XDS for light socket, etc.)""" - XTAL = auto() + XTAL = "XTAL" """Crystal, ceramic resonator, powered oscillator""" - Y = auto() + Y = "Y" """Crystal, ceramic resonator, powered oscillator""" - ZD = auto() + ZD = "ZD" """Zener diode > often changed to "D" for diode""" @abstractmethod diff --git a/src/faebryk/library/pf_533984002.py b/src/faebryk/library/pf_533984002.py index df90b1ff..396c5939 100644 --- a/src/faebryk/library/pf_533984002.py +++ b/src/faebryk/library/pf_533984002.py @@ -27,4 +27,6 @@ def attach_to_footprint(self): "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/1912111437_SHOU-HAN-1-25-2P_C393945.pdf" ) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("J") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.J + ) diff --git a/src/faebryk/library/pf_74AHCT2G125.py b/src/faebryk/library/pf_74AHCT2G125.py index 8307e8f8..5d426706 100644 --- a/src/faebryk/library/pf_74AHCT2G125.py +++ b/src/faebryk/library/pf_74AHCT2G125.py @@ -46,7 +46,9 @@ def single_electric_reference(self): F.ElectricLogic.connect_all_module_references(self) ) - designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") + designator_prefix = L.f_field(F.has_designator_prefix_defined)( + F.has_designator_prefix.Prefix.U + ) @L.rt_field def can_bridge(self): diff --git a/test/library/nodes/test_electricpower.py b/test/library/nodes/test_electricpower.py index 94402774..d41f19ee 100644 --- a/test/library/nodes/test_electricpower.py +++ b/test/library/nodes/test_electricpower.py @@ -21,9 +21,7 @@ def test_fused_power(self): fuse = next(iter(power_in_fused.get_children(direct_only=False, types=F.Fuse))) - self.assertEqual( - fuse.trip_current.get_most_narrow(), F.Range(0 * P.A, 500 * P.mA) - ) + self.assertEqual(fuse.trip_current.get_most_narrow(), F.Constant(500 * P.mA)) self.assertEqual(power_out.voltage.get_most_narrow(), 10 * P.V) # self.assertEqual( # power_in_fused.max_current.get_most_narrow(), F.Range(0 * P.A, 500 * P.mA)