diff --git a/Cargo.lock b/Cargo.lock
index 1a65381e18..66d3ff6d51 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -124,14 +124,14 @@ name = "arceos-monolithic"
 version = "0.1.0"
 dependencies = [
  "arceos_posix_api",
- "axconfig",
  "axerrno",
  "axhal",
- "axlog",
+ "axmm",
  "axruntime",
  "axstd",
  "axtask",
  "crate_interface",
+ "log",
  "memory_addr",
 ]
 
@@ -443,6 +443,18 @@ dependencies = [
  "spinlock",
 ]
 
+[[package]]
+name = "axmm"
+version = "0.1.0"
+dependencies = [
+ "axconfig",
+ "axerrno",
+ "axhal",
+ "lazy_init",
+ "log",
+ "memory_addr",
+]
+
 [[package]]
 name = "axnet"
 version = "0.1.0"
@@ -472,11 +484,11 @@ dependencies = [
  "axfs",
  "axhal",
  "axlog",
+ "axmm",
  "axnet",
  "axtask",
  "crate_interface",
  "kernel_guard",
- "lazy_init",
  "percpu",
 ]
 
diff --git a/Cargo.toml b/Cargo.toml
index 7897714402..66bca37b05 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -43,6 +43,7 @@ members = [
     "modules/axfs",
     "modules/axhal",
     "modules/axlog",
+    "modules/axmm",
     "modules/axnet",
     "modules/axruntime",
     "modules/axsync",
diff --git a/crates/memory_addr/src/lib.rs b/crates/memory_addr/src/lib.rs
index 8aff4ad0db..273b1a1879 100644
--- a/crates/memory_addr/src/lib.rs
+++ b/crates/memory_addr/src/lib.rs
@@ -1,4 +1,5 @@
 #![no_std]
+#![feature(effects)]
 #![doc = include_str!("../README.md")]
 
 use core::fmt;
@@ -98,7 +99,7 @@ impl PhysAddr {
     ///
     /// See the [`align_down`] function for more information.
     #[inline]
-    pub fn align_down<U>(self, align: U) -> Self
+    pub const fn align_down<U>(self, align: U) -> Self
     where
         U: Into<usize>,
     {
@@ -109,7 +110,7 @@ impl PhysAddr {
     ///
     /// See the [`align_up`] function for more information.
     #[inline]
-    pub fn align_up<U>(self, align: U) -> Self
+    pub const fn align_up<U>(self, align: U) -> Self
     where
         U: Into<usize>,
     {
@@ -120,7 +121,7 @@ impl PhysAddr {
     ///
     /// See the [`align_offset`] function for more information.
     #[inline]
-    pub fn align_offset<U>(self, align: U) -> usize
+    pub const fn align_offset<U>(self, align: U) -> usize
     where
         U: Into<usize>,
     {
@@ -131,7 +132,7 @@ impl PhysAddr {
     ///
     /// See the [`is_aligned`] function for more information.
     #[inline]
-    pub fn is_aligned<U>(self, align: U) -> bool
+    pub const fn is_aligned<U>(self, align: U) -> bool
     where
         U: Into<usize>,
     {
@@ -140,25 +141,25 @@ impl PhysAddr {
 
     /// Aligns the address downwards to 4096 (bytes).
     #[inline]
-    pub fn align_down_4k(self) -> Self {
+    pub const fn align_down_4k(self) -> Self {
         self.align_down(PAGE_SIZE_4K)
     }
 
     /// Aligns the address upwards to 4096 (bytes).
     #[inline]
-    pub fn align_up_4k(self) -> Self {
+    pub const fn align_up_4k(self) -> Self {
         self.align_up(PAGE_SIZE_4K)
     }
 
     /// Returns the offset of the address within a 4K-sized page.
     #[inline]
-    pub fn align_offset_4k(self) -> usize {
+    pub const fn align_offset_4k(self) -> usize {
         self.align_offset(PAGE_SIZE_4K)
     }
 
     /// Checks whether the address is 4K-aligned.
     #[inline]
-    pub fn is_aligned_4k(self) -> bool {
+    pub const fn is_aligned_4k(self) -> bool {
         self.is_aligned(PAGE_SIZE_4K)
     }
 }
@@ -225,7 +226,7 @@ impl VirtAddr {
     ///
     /// See the [`is_aligned`] function for more information.
     #[inline]
-    pub fn is_aligned<U>(self, align: U) -> bool
+    pub const fn is_aligned<U>(self, align: U) -> bool
     where
         U: Into<usize>,
     {
@@ -252,7 +253,7 @@ impl VirtAddr {
 
     /// Checks whether the address is 4K-aligned.
     #[inline]
-    pub fn is_aligned_4k(self) -> bool {
+    pub const fn is_aligned_4k(self) -> bool {
         self.is_aligned(PAGE_SIZE_4K)
     }
 }
diff --git a/crates/page_table/src/bits64.rs b/crates/page_table/src/bits64.rs
index 738bf85f3c..07c66ad6c6 100644
--- a/crates/page_table/src/bits64.rs
+++ b/crates/page_table/src/bits64.rs
@@ -247,16 +247,13 @@ impl<M: PagingMetaData, PTE: GenericPTE, IF: PagingIf> PageTable64<M, PTE, IF> {
         )
     }
 
-    /// Shallow clone the page table, keeping only the given virtual memory
-    /// region.
-    pub fn clone_shallow(&self, start: VirtAddr, size: usize) -> PagingResult<Self> {
-        let pt = Self::try_new()?;
+    /// Copy entries from another page table within the given virtual memory range.
+    pub fn copy_from(&mut self, other: &Self, start: VirtAddr, size: usize) {
         if size == 0 {
-            return Ok(pt);
+            return;
         }
-
-        let src_table = Self::table_of(self.root_paddr);
-        let dst_table = Self::table_of_mut(pt.root_paddr);
+        let src_table = Self::table_of(other.root_paddr);
+        let dst_table = Self::table_of_mut(self.root_paddr);
         let index_fn = if M::LEVELS == 3 {
             p3_index
         } else if M::LEVELS == 4 {
@@ -269,7 +266,6 @@ impl<M: PagingMetaData, PTE: GenericPTE, IF: PagingIf> PageTable64<M, PTE, IF> {
         assert!(start_idx < ENTRY_COUNT);
         assert!(end_idx <= ENTRY_COUNT);
         dst_table[start_idx..end_idx].copy_from_slice(&src_table[start_idx..end_idx]);
-        Ok(pt)
     }
 }
 
diff --git a/crates/page_table_entry/src/lib.rs b/crates/page_table_entry/src/lib.rs
index bd1a269de1..ccc8d7389e 100644
--- a/crates/page_table_entry/src/lib.rs
+++ b/crates/page_table_entry/src/lib.rs
@@ -16,7 +16,7 @@
 
 mod arch;
 
-use core::fmt::Debug;
+use core::fmt::{self, Debug};
 use memory_addr::PhysAddr;
 
 pub use self::arch::*;
@@ -24,7 +24,7 @@ pub use self::arch::*;
 bitflags::bitflags! {
     /// Generic page table entry flags that indicate the corresponding mapped
     /// memory region permissions and attributes.
-    #[derive(Debug, Clone, Copy)]
+    #[derive(Clone, Copy)]
     pub struct MappingFlags: usize {
         /// The memory is readable.
         const READ          = 1 << 0;
@@ -41,6 +41,12 @@ bitflags::bitflags! {
     }
 }
 
+impl Debug for MappingFlags {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        Debug::fmt(&self.0, f)
+    }
+}
+
 /// A generic page table entry.
 ///
 /// All architecture-specific page table entry types implement this trait.
diff --git a/modules/axconfig/defconfig.toml b/modules/axconfig/defconfig.toml
index e13488d9e5..d7eabb35d1 100644
--- a/modules/axconfig/defconfig.toml
+++ b/modules/axconfig/defconfig.toml
@@ -16,6 +16,10 @@ kernel-base-vaddr = "0"
 # Linear mapping offset, for quick conversions between physical and virtual
 # addresses.
 phys-virt-offset = "0"
+# Kernel address space base.
+kernel-aspace-base = "0"
+# Kernel address space size.
+kernel-aspace-size = "0"
 # MMIO regions with format (`base_paddr`, `size`).
 mmio-regions = []
 # VirtIO MMIO regions with format (`base_paddr`, `size`).
diff --git a/modules/axhal/src/mem.rs b/modules/axhal/src/mem.rs
index ee96c4dc5d..4d0508e9fe 100644
--- a/modules/axhal/src/mem.rs
+++ b/modules/axhal/src/mem.rs
@@ -7,6 +7,7 @@ pub use memory_addr::{PhysAddr, VirtAddr, PAGE_SIZE_4K};
 
 bitflags::bitflags! {
     /// The flags of a physical memory region.
+    #[derive(Clone, Copy)]
     pub struct MemRegionFlags: usize {
         /// Readable.
         const READ          = 1 << 0;
diff --git a/modules/axmm/Cargo.toml b/modules/axmm/Cargo.toml
new file mode 100644
index 0000000000..5ef4a49d7a
--- /dev/null
+++ b/modules/axmm/Cargo.toml
@@ -0,0 +1,19 @@
+[package]
+name = "axmm"
+version = "0.1.0"
+edition = "2021"
+authors = ["Yuekai Jia <equation618@gmail.com>"]
+description = "ArceOS virtual memory management module"
+license = "GPL-3.0-or-later OR Apache-2.0"
+homepage = "https://github.com/rcore-os/arceos"
+repository = "https://github.com/rcore-os/arceos/tree/main/modules/axmm"
+documentation = "https://rcore-os.github.io/arceos/axmm/index.html"
+
+[dependencies]
+axhal = { path = "../axhal", features = ["paging"] }
+axconfig = { path = "../../modules/axconfig" }
+
+log = "0.4"
+axerrno = { path = "../../crates/axerrno" }
+lazy_init = { path = "../../crates/lazy_init" }
+memory_addr = { path = "../../crates/memory_addr" }
diff --git a/modules/axmm/src/aspace.rs b/modules/axmm/src/aspace.rs
new file mode 100644
index 0000000000..0c6f86ea60
--- /dev/null
+++ b/modules/axmm/src/aspace.rs
@@ -0,0 +1,122 @@
+use core::fmt;
+
+use axerrno::{ax_err, AxResult};
+use axhal::paging::{MappingFlags, PageTable};
+use memory_addr::{PhysAddr, VirtAddr};
+
+use crate::paging_err_to_ax_err;
+
+/// The virtual memory address space.
+pub struct AddrSpace {
+    base: VirtAddr,
+    end: VirtAddr,
+    pt: PageTable,
+}
+
+impl AddrSpace {
+    /// Returns the address space base.
+    pub const fn base(&self) -> VirtAddr {
+        self.base
+    }
+
+    /// Returns the address space end.
+    pub const fn end(&self) -> VirtAddr {
+        self.end
+    }
+
+    /// Returns the address space size.
+    pub const fn size(&self) -> usize {
+        self.end.as_usize() - self.base.as_usize()
+    }
+
+    /// Returns the reference to the inner page table.
+    pub const fn page_table(&self) -> &PageTable {
+        &self.pt
+    }
+
+    /// Returns the root physical address of the inner page table.
+    pub const fn page_table_root(&self) -> PhysAddr {
+        self.pt.root_paddr()
+    }
+
+    /// Checks if the address space contains the given virtual address.
+    pub const fn contains(&self, addr: VirtAddr) -> bool {
+        self.base.as_usize() <= addr.as_usize() && addr.as_usize() < self.end.as_usize()
+    }
+
+    /// Checks if the address space contains the given virtual address range.
+    pub const fn contains_range(&self, start: VirtAddr, size: usize) -> bool {
+        self.base.as_usize() <= start.as_usize() && start.as_usize() + size < self.end.as_usize()
+    }
+
+    /// Checks if the address space overlaps with the given virtual address range.
+    pub const fn overlaps_with(&self, start: VirtAddr, size: usize) -> bool {
+        let end = start.as_usize() + size;
+        !(end <= self.base.as_usize() || start.as_usize() >= self.end.as_usize())
+    }
+
+    /// Creates a new empty address space.
+    pub(crate) fn new_empty(base: VirtAddr, size: usize) -> AxResult<Self> {
+        Ok(Self {
+            base,
+            end: base + size,
+            pt: PageTable::try_new().map_err(paging_err_to_ax_err)?,
+        })
+    }
+
+    /// Copies page table mappings from another address space.
+    ///
+    /// It copies the page table entries only rather than the memory regions,
+    /// usually usually used to copy a portion of the kernel space mapping to
+    /// the user space.
+    pub fn copy_mappings_from(&mut self, other: &AddrSpace) -> AxResult {
+        if self.overlaps_with(other.base(), other.size()) {
+            return ax_err!(InvalidInput, "address space overlap");
+        }
+        self.pt.copy_from(&other.pt, other.base(), other.size());
+        Ok(())
+    }
+
+    /// Add a new fixed mapping for the specified virtual and physical address
+    /// range.
+    ///
+    /// The mapping is linear, i.e., `start_vaddr` is mapped to `start_paddr`,
+    /// and `start_vaddr + size` is mapped to `start_paddr + size`.
+    ///
+    /// The `flags` parameter specifies the mapping permissions and attributes.
+    pub fn map_fixed(
+        &mut self,
+        start_vaddr: VirtAddr,
+        start_paddr: PhysAddr,
+        size: usize,
+        flags: MappingFlags,
+    ) -> AxResult {
+        if !self.contains_range(start_vaddr, size) {
+            return ax_err!(InvalidInput, "address out of range");
+        }
+        self.pt
+            .map_region(start_vaddr, start_paddr, size, flags, true)
+            .map_err(paging_err_to_ax_err)?;
+        Ok(())
+    }
+
+    /// Removes the mappings for the specified virtual address range.
+    pub fn unmap(&mut self, start: VirtAddr, size: usize) -> AxResult {
+        if !self.contains_range(start, size) {
+            return ax_err!(InvalidInput, "address out of range");
+        }
+        self.pt
+            .unmap_region(start, size)
+            .map_err(paging_err_to_ax_err)?;
+        Ok(())
+    }
+}
+
+impl fmt::Debug for AddrSpace {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        f.debug_struct("AddrSpace")
+            .field("va_range", &(self.base.as_usize()..self.end.as_usize()))
+            .field("page_table_root", &self.pt.root_paddr())
+            .finish()
+    }
+}
diff --git a/modules/axmm/src/lib.rs b/modules/axmm/src/lib.rs
new file mode 100644
index 0000000000..4467e306eb
--- /dev/null
+++ b/modules/axmm/src/lib.rs
@@ -0,0 +1,89 @@
+//! [ArceOS](https://github.com/rcore-os/arceos) memory management module.
+
+#![no_std]
+
+#[macro_use]
+extern crate log;
+extern crate alloc;
+
+mod aspace;
+
+pub use self::aspace::AddrSpace;
+
+use axerrno::{AxError, AxResult};
+use axhal::mem::phys_to_virt;
+use axhal::paging::{PageTable, PagingError};
+use lazy_init::LazyInit;
+use memory_addr::{PhysAddr, VirtAddr};
+
+const USER_ASPACE_BASE: usize = 0;
+const USER_ASPACE_SIZE: usize = 0x7fff_ffff_f000;
+
+static KERNEL_ASPACE: LazyInit<AddrSpace> = LazyInit::new();
+
+fn paging_err_to_ax_err(err: PagingError) -> AxError {
+    warn!("Paging error: {:?}", err);
+    match err {
+        PagingError::NoMemory => AxError::NoMemory,
+        PagingError::NotAligned => AxError::InvalidInput,
+        PagingError::NotMapped => AxError::NotFound,
+        PagingError::AlreadyMapped => AxError::AlreadyExists,
+        PagingError::MappedToHugePage => AxError::InvalidInput,
+    }
+}
+
+/// Creates a new address space for kernel itself.
+pub fn new_kernel_aspace() -> AxResult<AddrSpace> {
+    let mut aspace = AddrSpace::new_empty(
+        VirtAddr::from(axconfig::KERNEL_ASPACE_BASE),
+        axconfig::KERNEL_ASPACE_SIZE,
+    )?;
+    for r in axhal::mem::memory_regions() {
+        aspace.map_fixed(phys_to_virt(r.paddr), r.paddr, r.size, r.flags.into())?;
+    }
+    Ok(aspace)
+}
+
+/// Creates a new address space for user processes.
+pub fn new_user_aspace() -> AxResult<AddrSpace> {
+    let mut aspace = AddrSpace::new_empty(VirtAddr::from(USER_ASPACE_BASE), USER_ASPACE_SIZE)?;
+    if !cfg!(target_arch = "aarch64") {
+        // ARMv8 use a separate page table (TTBR0_EL1) for user space, it
+        // doesn't need to copy the kernel portion to the user page table.
+        aspace.copy_mappings_from(&KERNEL_ASPACE)?;
+    }
+    Ok(aspace)
+}
+
+/// Returns the globally unique kernel address space.
+pub fn kernel_aspace() -> &'static AddrSpace {
+    &KERNEL_ASPACE
+}
+
+/// Returns the root physical address of the kernel page table.
+pub fn kernel_page_table() -> &'static PageTable {
+    KERNEL_ASPACE.page_table()
+}
+
+/// Returns the root physical address of the kernel page table.
+pub fn kernel_page_table_root() -> PhysAddr {
+    KERNEL_ASPACE.page_table_root()
+}
+
+/// Initializes virtual memory management.
+///
+/// It mainly sets up the kernel virtual memory address space and recreate a
+/// fine-grained kernel page table.
+pub fn init_memory_management() {
+    info!("Initialize virtual memory management...");
+
+    let kernel_aspace = new_kernel_aspace().expect("failed to initialize kernel address space");
+    debug!("kernel address space init OK: {:#x?}", kernel_aspace);
+    KERNEL_ASPACE.init_by(kernel_aspace);
+    axhal::paging::set_kernel_page_table(kernel_page_table());
+}
+
+/// Initializes kernel paging for secondary CPUs.
+pub fn init_memory_management_secondary() {
+    axhal::paging::set_kernel_page_table(kernel_page_table());
+}
diff --git a/modules/axruntime/Cargo.toml b/modules/axruntime/Cargo.toml
index ccd000b1d4..9c1947cf65 100644
--- a/modules/axruntime/Cargo.toml
+++ b/modules/axruntime/Cargo.toml
@@ -16,7 +16,7 @@ smp = ["axhal/smp"]
 irq = ["axhal/irq", "axtask?/irq", "percpu", "kernel_guard"]
 tls = ["axhal/tls", "axtask?/tls"]
 alloc = ["axalloc"]
-paging = ["axhal/paging", "lazy_init"]
+paging = ["axhal/paging", "axmm"]
 
 multitask = ["axtask/multitask"]
 fs = ["axdriver", "axfs"]
@@ -28,6 +28,7 @@ axhal = { path = "../axhal" }
 axlog = { path = "../axlog" }
 axconfig = { path = "../axconfig" }
 axalloc = { path = "../axalloc", optional = true }
+axmm = { path = "../axmm", optional = true }
 axdriver = { path = "../axdriver", optional = true }
 axfs = { path = "../axfs", optional = true }
 axnet = { path = "../axnet", optional = true }
@@ -37,4 +38,3 @@ axtask = { path = "../axtask", optional = true }
 crate_interface = { path = "../../crates/crate_interface" }
 percpu = { path = "../../crates/percpu", optional = true }
 kernel_guard = { path = "../../crates/kernel_guard", optional = true }
-lazy_init = { path = "../../crates/lazy_init", optional = true }
diff --git a/modules/axruntime/src/lib.rs b/modules/axruntime/src/lib.rs
index a4a1a4bf17..0627f035fe 100644
--- a/modules/axruntime/src/lib.rs
+++ b/modules/axruntime/src/lib.rs
@@ -141,10 +141,7 @@ pub extern "C" fn rust_main(cpu_id: usize, dtb: usize) -> ! {
     init_allocator();
 
     #[cfg(feature = "paging")]
-    {
-        info!("Initialize kernel page table...");
-        remap_kernel_memory().expect("remap kernel memoy failed");
-    }
+    axmm::init_memory_management();
 
     info!("Initialize platform devices...");
     axhal::platform_init();
@@ -229,32 +226,6 @@ fn init_allocator() {
     }
 }
 
-#[cfg(feature = "paging")]
-pub static KERNEL_PAGE_TABLE: lazy_init::LazyInit<axhal::paging::PageTable> =
-    lazy_init::LazyInit::new();
-
-#[cfg(feature = "paging")]
-fn remap_kernel_memory() -> Result<(), axhal::paging::PagingError> {
-    use axhal::mem::{memory_regions, phys_to_virt};
-    use axhal::paging::PageTable;
-
-    if axhal::cpu::this_cpu_is_bsp() {
-        let mut kernel_page_table = PageTable::try_new()?;
-        for r in memory_regions() {
-            kernel_page_table.map_region(
-                phys_to_virt(r.paddr),
-                r.paddr,
-                r.size,
-                r.flags.into(),
-                true,
-            )?;
-        }
-        KERNEL_PAGE_TABLE.init_by(kernel_page_table);
-    }
-    axhal::paging::set_kernel_page_table(&KERNEL_PAGE_TABLE);
-    Ok(())
-}
-
 #[cfg(feature = "irq")]
 fn init_interrupt() {
     use axhal::time::TIMER_IRQ_NUM;
diff --git a/modules/axruntime/src/mp.rs b/modules/axruntime/src/mp.rs
index 768ef5188a..f642438223 100644
--- a/modules/axruntime/src/mp.rs
+++ b/modules/axruntime/src/mp.rs
@@ -35,7 +35,7 @@ pub extern "C" fn rust_main_secondary(cpu_id: usize) -> ! {
     info!("Secondary CPU {:x} started.", cpu_id);
 
     #[cfg(feature = "paging")]
-    super::remap_kernel_memory().unwrap();
+    axmm::init_memory_management_secondary();
 
     axhal::platform_init_secondary();
 
diff --git a/platforms/aarch64-bsta1000b.toml b/platforms/aarch64-bsta1000b.toml
index 097556a9f3..e544807a4c 100644
--- a/platforms/aarch64-bsta1000b.toml
+++ b/platforms/aarch64-bsta1000b.toml
@@ -16,6 +16,10 @@ kernel-base-vaddr = "0xffff_0000_8100_0000"
 # Linear mapping offset, for quick conversions between physical and virtual
 # addresses.
 phys-virt-offset = "0xffff_0000_0000_0000"
+# Kernel address space base.
+kernel-aspace-base = "0xffff_0000_0000_0000"
+# Kernel address space size.
+kernel-aspace-size = "0x0000_ffff_ffff_f000"
 # MMIO regions with format (`base_paddr`, `size`).
 mmio-regions = [
     ["0x20008000", "0x1000"], # uart8250 UART0
diff --git a/platforms/aarch64-qemu-virt.toml b/platforms/aarch64-qemu-virt.toml
index 723bba7eb1..72eac4b7a7 100644
--- a/platforms/aarch64-qemu-virt.toml
+++ b/platforms/aarch64-qemu-virt.toml
@@ -16,6 +16,10 @@ kernel-base-vaddr = "0xffff_0000_4008_0000"
 # Linear mapping offset, for quick conversions between physical and virtual
 # addresses.
 phys-virt-offset = "0xffff_0000_0000_0000"
+# Kernel address space base.
+kernel-aspace-base = "0xffff_0000_0000_0000"
+# Kernel address space size.
+kernel-aspace-size = "0x0000_ffff_ffff_f000"
 # MMIO regions with format (`base_paddr`, `size`).
 mmio-regions = [
     ["0x0900_0000", "0x1000"],      # PL011 UART
diff --git a/platforms/aarch64-raspi4.toml b/platforms/aarch64-raspi4.toml
index f204d1d1a0..33e8b99fdf 100644
--- a/platforms/aarch64-raspi4.toml
+++ b/platforms/aarch64-raspi4.toml
@@ -16,6 +16,10 @@ kernel-base-vaddr = "0xffff_0000_0008_0000"
 # Linear mapping offset, for quick conversions between physical and virtual
 # addresses.
 phys-virt-offset = "0xffff_0000_0000_0000"
+# Kernel address space base.
+kernel-aspace-base = "0xffff_0000_0000_0000"
+# Kernel address space size.
+kernel-aspace-size = "0x0000_ffff_ffff_f000"
 # MMIO regions with format (`base_paddr`, `size`).
 mmio-regions = [
     ["0xFE20_1000", "0x1000"],      # PL011 UART
diff --git a/platforms/riscv64-qemu-virt.toml b/platforms/riscv64-qemu-virt.toml
index 8c1051c89b..f2ba4002f2 100644
--- a/platforms/riscv64-qemu-virt.toml
+++ b/platforms/riscv64-qemu-virt.toml
@@ -16,6 +16,10 @@ kernel-base-vaddr = "0xffff_ffc0_8020_0000"
 # Linear mapping offset, for quick conversions between physical and virtual
 # addresses.
 phys-virt-offset = "0xffff_ffc0_0000_0000"
+# Kernel address space base.
+kernel-aspace-base = "0xffff_ffc0_0000_0000"
+# Kernel address space size.
+kernel-aspace-size = "0x0000_003f_ffff_f000"
 # MMIO regions with format (`base_paddr`, `size`).
 mmio-regions = [
     ["0x0c00_0000", "0x21_0000"],   # PLIC
diff --git a/platforms/x86_64-pc-oslab.toml b/platforms/x86_64-pc-oslab.toml
index 03363d962f..198026ae04 100644
--- a/platforms/x86_64-pc-oslab.toml
+++ b/platforms/x86_64-pc-oslab.toml
@@ -16,6 +16,10 @@ kernel-base-vaddr = "0xffff_ff80_0020_0000"
 # Linear mapping offset, for quick conversions between physical and virtual
 # addresses.
 phys-virt-offset = "0xffff_ff80_0000_0000"
+# Kernel address space base.
+kernel-aspace-base = "0xffff_ff80_0000_0000"
+# Kernel address space size.
+kernel-aspace-size = "0x0000_007f_ffff_f000"
 # MMIO regions with format (`base_paddr`, `size`).
 mmio-regions = [
     ["0xfec0_0000", "0x1000"],      # IO APIC
diff --git a/platforms/x86_64-qemu-q35.toml b/platforms/x86_64-qemu-q35.toml
index da931dafab..b960232779 100644
--- a/platforms/x86_64-qemu-q35.toml
+++ b/platforms/x86_64-qemu-q35.toml
@@ -16,6 +16,10 @@ kernel-base-vaddr = "0xffff_ff80_0020_0000"
 # Linear mapping offset, for quick conversions between physical and virtual
 # addresses.
 phys-virt-offset = "0xffff_ff80_0000_0000"
+# Kernel address space base.
+kernel-aspace-base = "0xffff_ff80_0000_0000"
+# Kernel address space size.
+kernel-aspace-size = "0x0000_007f_ffff_f000"
 # MMIO regions with format (`base_paddr`, `size`).
 mmio-regions = [
     ["0xb000_0000", "0x1000_0000"], # PCI config space
diff --git a/variants/monolithic/Cargo.toml b/variants/monolithic/Cargo.toml
index acb02ab10a..9725a19b62 100644
--- a/variants/monolithic/Cargo.toml
+++ b/variants/monolithic/Cargo.toml
@@ -8,11 +8,11 @@ axstd = { path = "../../ulib/axstd", features = ["paging"] }
 arceos_posix_api = { path = "../../api/arceos_posix_api" }
 
 axhal = { path = "../../modules/axhal", features = ["uspace"] }
-axlog = { path = "../../modules/axlog" }
-axconfig = { path = "../../modules/axconfig" }
+axmm = { path = "../../modules/axmm" }
 axtask = { path = "../../modules/axtask" }
 axruntime = { path = "../../modules/axruntime", features = ["multitask"] }
 
+log = "0.4"
 axerrno = { path = "../../crates/axerrno" }
 memory_addr = { path = "../../crates/memory_addr" }
 crate_interface = { path = "../../crates/crate_interface" }
diff --git a/variants/monolithic/src/main.rs b/variants/monolithic/src/main.rs
index fb0a2dd9e7..34b5a93415 100644
--- a/variants/monolithic/src/main.rs
+++ b/variants/monolithic/src/main.rs
@@ -2,7 +2,7 @@
 #![no_main]
 
 #[macro_use]
-extern crate axlog;
+extern crate log;
 extern crate alloc;
 extern crate axstd;
 
@@ -14,7 +14,6 @@ use memory_addr::{PhysAddr, VirtAddr};
 use axhal::arch::UspaceContext;
 use axhal::mem::virt_to_phys;
 use axhal::paging::MappingFlags;
-use axruntime::KERNEL_PAGE_TABLE;
 use axtask::{AxTaskRef, TaskExtMut, TaskExtRef, TaskInner};
 
 const USER_STACK_SIZE: usize = 4096;
@@ -72,31 +71,26 @@ fn run_apps() -> ! {
     let ustack_top = VirtAddr::from(0x7fff_0000);
     let ustack_vaddr = ustack_top - USER_STACK_SIZE;
 
-    let kspace_base = VirtAddr::from(axconfig::PHYS_VIRT_OFFSET);
-    let kspace_size = 0x7f_ffff_f000;
-    let mut pt = KERNEL_PAGE_TABLE
-        .clone_shallow(kspace_base, kspace_size)
+    let mut uspace = axmm::new_user_aspace().unwrap();
+    uspace
+        .map_fixed(
+            entry_vaddr_align,
+            entry_paddr_align,
+            4096,
+            MappingFlags::READ | MappingFlags::EXECUTE | MappingFlags::USER,
+        )
+        .unwrap();
+    uspace
+        .map_fixed(
+            ustack_vaddr,
+            ustack_paddr,
+            4096,
+            MappingFlags::READ | MappingFlags::WRITE | MappingFlags::USER,
+        )
         .unwrap();
-
-    pt.map_region(
-        entry_vaddr_align,
-        entry_paddr_align,
-        4096,
-        MappingFlags::READ | MappingFlags::EXECUTE | MappingFlags::USER,
-        false,
-    )
-    .unwrap();
-    pt.map_region(
-        ustack_vaddr,
-        ustack_paddr,
-        4096,
-        MappingFlags::READ | MappingFlags::WRITE | MappingFlags::USER,
-        false,
-    )
-    .unwrap();
 
     spawn_user_task(
-        pt.root_paddr(),
+        uspace.page_table_root(),
         UspaceContext::new(entry_vaddr.into(), ustack_top, 2333),
     );