Fix cargo clippy warnings

api/arceos_posix_api/src/imp/io_mpx/select.rs

@@ -24,7 +24,7 @@ impl FdSets {
         let nfds = nfds.min(FD_SETSIZE);
         let nfds_usizes = nfds.div_ceil(BITS_PER_USIZE);
         let mut bits = core::mem::MaybeUninit::<[usize; FD_SETSIZE_USIZES * 3]>::uninit();
-        let bits_ptr = unsafe { core::mem::transmute(bits.as_mut_ptr()) };
+        let bits_ptr: *mut usize = unsafe { core::mem::transmute(bits.as_mut_ptr()) };
 
         let copy_from_fd_set = |bits_ptr: *mut usize, fds: *const ctypes::fd_set| unsafe {
             let dst = core::slice::from_raw_parts_mut(bits_ptr, nfds_usizes);

apps/task/tls/src/main.rs

@@ -7,6 +7,7 @@
 #[cfg(feature = "axstd")]
 extern crate axstd as std;
 
+use std::{ptr::addr_of, str::from_utf8_unchecked};
 use std::{thread, vec::Vec};
 
 #[thread_local]
@@ -56,14 +57,14 @@ fn main() {
         get!(U16),
         get!(U32),
         get!(U64),
-        get!(std::str::from_utf8_unchecked(&STR))
+        get!(from_utf8_unchecked(&*addr_of!(STR)))
     );
     assert!(get!(BOOL));
     assert_eq!(get!(U8), 0xAA);
     assert_eq!(get!(U16), 0xcafe);
     assert_eq!(get!(U32), 0xdeadbeed);
     assert_eq!(get!(U64), 0xa2ce05_a2ce05);
-    assert_eq!(get!(&STR), b"Hello, world!");
+    assert_eq!(get!(&*addr_of!(STR)), b"Hello, world!");
 
     let mut tasks = Vec::new();
     for i in 1..=10 {
@@ -85,7 +86,7 @@ fn main() {
                 get!(U16),
                 get!(U32),
                 get!(U64),
-                get!(std::str::from_utf8_unchecked(&STR))
+                get!(from_utf8_unchecked(&*addr_of!(STR)))
             );
             assert_eq!(get!(BOOL), i % 2 == 0);
             assert_eq!(get!(U8), 0xAA + i as u8);
@@ -105,7 +106,7 @@ fn main() {
     assert_eq!(get!(U16), 0xcafe);
     assert_eq!(get!(U32), 0xdeadbeed);
     assert_eq!(get!(U64), 0xa2ce05_a2ce05);
-    assert_eq!(get!(&STR), b"Hello, world!");
+    assert_eq!(get!(&*addr_of!(STR)), b"Hello, world!");
 
     println!("TLS tests run OK!");
 }

crates/axerrno/src/lib.rs

@@ -225,7 +225,7 @@ impl TryFrom<i32> for AxError {
     #[inline]
     fn try_from(value: i32) -> Result<Self, Self::Error> {
         if value > 0 && value <= core::mem::variant_count::<AxError>() as i32 {
-            Ok(unsafe { core::mem::transmute(value) })
+            Ok(unsafe { core::mem::transmute::<i32, AxError>(value) })
         } else {
             Err(value)
         }

crates/kernel_guard/src/arch/mod.rs

@@ -1,4 +1,4 @@
-#![cfg_attr(not(target_os = "none"), allow(dead_code))]
+#![cfg_attr(not(target_os = "none"), allow(dead_code, unused_imports))]
 
 cfg_if::cfg_if! {
     if #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] {

crates/linked_list/src/unsafe_list.rs

@@ -242,7 +242,7 @@ impl<A: Adapter + ?Sized> List<A> {
         // SAFETY: The safety requirements of this function satisfy those of `insert_after`.
         unsafe { self.insert_after(self.inner_ref(existing).prev, new) };
 
-        if self.first.unwrap() == existing {
+        if core::ptr::eq(self.first.unwrap().as_ptr(), existing.as_ptr()) {
             // Update the pointer to the first element as we're inserting before it.
             self.first = Some(NonNull::from(new));
         }
@@ -459,7 +459,7 @@ impl<A: Adapter + ?Sized> CommonCursor<A> {
                 if let Some(head) = list.first {
                     // SAFETY: Per the function safety requirements, `cur` is in the list.
                     let links = unsafe { list.inner_ref(cur) };
-                    if links.next != head {
+                    if !core::ptr::eq(links.next.as_ptr(), head.as_ptr()) {
                         self.cur = Some(links.next);
                     }
                 }
@@ -480,7 +480,7 @@ impl<A: Adapter + ?Sized> CommonCursor<A> {
                 let next = match self.cur.take() {
                     None => head,
                     Some(cur) => {
-                        if cur == head {
+                        if core::ptr::eq(cur.as_ptr(), head.as_ptr()) {
                             return;
                         }
                         cur

crates/timer_list/src/lib.rs

@@ -73,7 +73,7 @@ impl<E> Ord for TimerEventWrapper<E> {
 
 impl<E> PartialEq for TimerEventWrapper<E> {
     fn eq(&self, other: &Self) -> bool {
-        self.deadline.eq(&other.deadline)
+        self.deadline == other.deadline
     }
 }
 

modules/axhal/src/arch/x86_64/idt.rs

@@ -32,6 +32,7 @@ impl IdtStruct {
             )
         };
         for i in 0..NUM_INT {
+            #[allow(clippy::missing_transmute_annotations)]
             entries[i].set_handler_fn(unsafe { core::mem::transmute(ENTRIES[i]) });
         }
         idt

modules/axhal/src/platform/aarch64_bsta1000b/mem.rs

@@ -7,9 +7,11 @@ pub(crate) fn platform_regions() -> impl Iterator<Item = MemRegion> {
 }
 
 pub(crate) unsafe fn init_boot_page_table(
-    boot_pt_l0: &mut [A64PTE; 512],
-    boot_pt_l1: &mut [A64PTE; 512],
+    boot_pt_l0: *mut [A64PTE; 512],
+    boot_pt_l1: *mut [A64PTE; 512],
 ) {
+    let boot_pt_l0 = &mut *boot_pt_l0;
+    let boot_pt_l1 = &mut *boot_pt_l1;
     // 0x0000_0000_0000 ~ 0x0080_0000_0000, table
     boot_pt_l0[0] = A64PTE::new_table(PhysAddr::from(boot_pt_l1.as_ptr() as usize));
     // 0x0000_0000_0000..0x0000_4000_0000, 1G block, device memory

modules/axhal/src/platform/aarch64_common/boot.rs

@@ -1,4 +1,5 @@
 use aarch64_cpu::{asm, asm::barrier, registers::*};
+use core::ptr::addr_of_mut;
 use memory_addr::PhysAddr;
 use page_table_entry::aarch64::{MemAttr, A64PTE};
 use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
@@ -97,7 +98,7 @@ unsafe fn enable_fp() {
 }
 
 unsafe fn init_boot_page_table() {
-    crate::platform::mem::init_boot_page_table(&mut BOOT_PT_L0, &mut BOOT_PT_L1);
+    crate::platform::mem::init_boot_page_table(addr_of_mut!(BOOT_PT_L0), addr_of_mut!(BOOT_PT_L1));
 }
 
 /// The earliest entry point for the primary CPU.

modules/axhal/src/platform/aarch64_qemu_virt/mem.rs

@@ -7,9 +7,11 @@ pub(crate) fn platform_regions() -> impl Iterator<Item = MemRegion> {
 }
 
 pub(crate) unsafe fn init_boot_page_table(
-    boot_pt_l0: &mut [A64PTE; 512],
-    boot_pt_l1: &mut [A64PTE; 512],
+    boot_pt_l0: *mut [A64PTE; 512],
+    boot_pt_l1: *mut [A64PTE; 512],
 ) {
+    let boot_pt_l0 = &mut *boot_pt_l0;
+    let boot_pt_l1 = &mut *boot_pt_l1;
     // 0x0000_0000_0000 ~ 0x0080_0000_0000, table
     boot_pt_l0[0] = A64PTE::new_table(PhysAddr::from(boot_pt_l1.as_ptr() as usize));
     // 0x0000_0000_0000..0x0000_4000_0000, 1G block, device memory

modules/axhal/src/platform/aarch64_raspi/mem.rs

@@ -14,9 +14,11 @@ pub(crate) fn platform_regions() -> impl Iterator<Item = MemRegion> {
 }
 
 pub(crate) unsafe fn init_boot_page_table(
-    boot_pt_l0: &mut [A64PTE; 512],
-    boot_pt_l1: &mut [A64PTE; 512],
+    boot_pt_l0: *mut [A64PTE; 512],
+    boot_pt_l1: *mut [A64PTE; 512],
 ) {
+    let boot_pt_l0 = &mut *boot_pt_l0;
+    let boot_pt_l1 = &mut *boot_pt_l1;
     // 0x0000_0000_0000 ~ 0x0080_0000_0000, table
     boot_pt_l0[0] = A64PTE::new_table(PhysAddr::from(boot_pt_l1.as_ptr() as usize));
     // 0x0000_0000_0000..0x0000_4000_0000, 1G block, device memory

modules/axnet/src/smoltcp_impl/addr.rs

@@ -1,4 +1,4 @@
-use core::net::{IpAddr, SocketAddr};
+use core::net::{IpAddr, Ipv4Addr, SocketAddr};
 use smoltcp::wire::{IpAddress, IpEndpoint, Ipv4Address};
 
 pub const fn from_core_ipaddr(ip: IpAddr) -> IpAddress {
@@ -10,8 +10,9 @@ pub const fn from_core_ipaddr(ip: IpAddr) -> IpAddress {
 
 pub const fn into_core_ipaddr(ip: IpAddress) -> IpAddr {
     match ip {
-        IpAddress::Ipv4(ipv4) => IpAddr::V4(unsafe { core::mem::transmute(ipv4.0) }),
-        // _ => panic!("IPv6 not supported"),
+        IpAddress::Ipv4(ipv4) => {
+            IpAddr::V4(unsafe { core::mem::transmute::<[u8; 4], Ipv4Addr>(ipv4.0) })
+        } // _ => panic!("IPv6 not supported"),
     }
 }
 

modules/axtask/Cargo.toml

@@ -43,4 +43,4 @@ crate_interface = { path = "../../crates/crate_interface", optional = true }
 [dev-dependencies]
 rand = "0.8"
 axhal = { path = "../axhal", features = ["fp_simd"] }
-axtask = { path = ".", features = ["test"] }
+axtask = { path = ".", features = ["test", "multitask"] }

modules/axtask/src/lib.rs

@@ -29,6 +29,9 @@
 #![feature(doc_cfg)]
 #![feature(doc_auto_cfg)]
 
+#[cfg(test)]
+mod tests;
+
 cfg_if::cfg_if! {
     if #[cfg(feature = "multitask")] {
         #[macro_use]

modules/axtask/src/tests.rs

@@ -1,7 +1,7 @@
 use core::sync::atomic::{AtomicUsize, Ordering};
 use std::sync::{Mutex, Once};
 
-use crate::{self as axtask, current, WaitQueue};
+use crate::{api as axtask, current, WaitQueue};
 
 static INIT: Once = Once::new();
 static SERIAL: Mutex<()> = Mutex::new(());

rust-toolchain.toml

@@ -1,5 +1,5 @@
 [toolchain]
 profile = "minimal"
 channel = "nightly-2024-01-19"
-components = ["rust-src", "llvm-tools-preview", "rustfmt", "clippy"]
+components = ["rust-src", "llvm-tools", "rustfmt", "clippy"]
 targets = ["x86_64-unknown-none", "riscv64gc-unknown-none-elf", "aarch64-unknown-none-softfloat"]

scripts/make/cargo.mk

@@ -31,9 +31,11 @@ define cargo_build
   $(call run_cmd,cargo build,$(build_args) $(1) --features "$(strip $(2))")
 endef
 
+clippy_args := -A clippy::new_without_default
+
 define cargo_clippy
-  $(call run_cmd,cargo clippy,--all-features --workspace --exclude axlog $(1) $(verbose))
-  $(call run_cmd,cargo clippy,-p axlog -p percpu -p percpu_macros $(1) $(verbose))
+  $(call run_cmd,cargo clippy,--all-features --workspace --exclude axlog $(1) $(verbose) -- $(clippy_args))
+  $(call run_cmd,cargo clippy,-p axlog -p percpu -p percpu_macros $(1) $(verbose) -- $(clippy_args))
 endef
 
 all_packages := \