diff --git a/arch/arm/boot/dts/zynq-zed-adv7511-ad4696.dts b/arch/arm/boot/dts/zynq-zed-adv7511-ad4696.dts
new file mode 100644
index 00000000000000..984effb28e20db
--- /dev/null
+++ b/arch/arm/boot/dts/zynq-zed-adv7511-ad4696.dts
@@ -0,0 +1,155 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Analog Devices AD4696
+ *
+ * hdl_project: <ad469x_fmc/zed>
+ *
+ * Copyright (C) 2024 Analog Devices Inc.
+ */
+/dts-v1/;
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/iio/adi,ad4695.h>
+
+#include "zynq-zed.dtsi"
+#include "zynq-zed-adv7511.dtsi"
+
+/ {
+	refin: regulator-refin {
+		compatible = "regulator-fixed";
+		regulator-name = "refin";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
+	avdd: regulator-avdd {
+		compatible = "regulator-fixed";
+		regulator-name = "avdd";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
+	ldo_in: regulator-ldo-in {
+		compatible = "regulator-fixed";
+		regulator-name = "ldo-in";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
+	vio: regulator-vio {
+		compatible = "regulator-fixed";
+		regulator-name = "vio";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-always-on;
+	};
+
+	com: regulator-com {
+		compatible = "regulator-fixed";
+		regulator-name = "com";
+		regulator-min-microvolt = <2500000>;
+		regulator-max-microvolt = <2500000>;
+		regulator-always-on;
+	};
+
+	in3: regulator-in3 {
+		compatible = "regulator-fixed";
+		regulator-name = "in3";
+		regulator-min-microvolt = <2500000>;
+		regulator-max-microvolt = <2500000>;
+		regulator-always-on;
+	};
+};
+
+&fpga_axi {
+	rx_dma: rx-dmac@44a30000 {
+		compatible = "adi,axi-dmac-1.00.a";
+		reg = <0x44a30000 0x1000>;
+		#dma-cells = <1>;
+		interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clkc 15>;
+
+		adi,channels {
+			#size-cells = <0>;
+			#address-cells = <1>;
+
+			dma-channel@0 {
+				reg = <0>;
+				adi,source-bus-width = <32>;
+				adi,source-bus-type = <1>;
+				adi,destination-bus-width = <32>;
+				adi,destination-bus-type = <0>;
+			};
+		};
+	};
+
+	adc_trigger: pwm@44b00000 {
+		compatible = "adi,axi-pwmgen";
+		reg = <0x44b00000 0x1000>;
+		#pwm-cells = <2>;
+		clocks = <&spi_clk>;
+	};
+
+	spi_clk: axi-clkgen@44a70000 {
+		compatible = "adi,axi-clkgen-2.00.a";
+		reg = <0x44a70000 0x10000>;
+		#clock-cells = <0>;
+		clocks = <&clkc 15>, <&clkc 15>;
+		clock-names = "s_axi_aclk", "clkin1";
+		clock-output-names = "spi_clk";
+	};
+
+	axi_spi_engine: spi@44a00000 {
+		compatible = "adi-ex,axi-spi-engine-1.00.a";
+		reg = <0x44a00000 0x1FF>;
+		interrupt-parent = <&intc>;
+		interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clkc 15>, <&spi_clk>;
+		clock-names = "s_axi_aclk", "spi_clk";
+		num-cs = <1>;
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		ad4696: adc@0 {
+			compatible = "adi,ad4696";
+			reg = <0>;
+			spi-cpol;
+			spi-cpha;
+			spi-max-frequency = <5000000>;
+			avdd-supply = <&avdd>;
+			ldo-in-supply = <&ldo_in>;
+			vio-supply = <&vio>;
+			refin-supply = <&refin>;
+			com-supply = <&com>;
+			in3-supply = <&in3>;
+			reset-gpios = <&gpio0 86 GPIO_ACTIVE_LOW>;
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			/* Pseudo-differential channel between IN0 and REFGND. */
+			channel@0 {
+				reg = <0>;
+			};
+
+			/* Pseudo-differential channel between IN1 and COM. */
+			channel@1 {
+				reg = <1>;
+				common-mode-channel = <AD4695_COMMON_MODE_COM>;
+				bipolar;
+			};
+
+			/* Pseudo-differential channel between IN2 and IN3. */
+			channel@2 {
+				reg = <2>;
+				common-mode-channel = <3>;
+				bipolar;
+			};
+		};
+	};
+};